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PK ! ��}�? ? include/uapi/asm/unistd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2013 Altera Corporation * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program. If not, see <http://www.gnu.org/licenses/>. * */ #define sys_mmap2 sys_mmap_pgoff #define __ARCH_WANT_RENAMEAT #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SET_GET_RLIMIT #define __ARCH_WANT_TIME32_SYSCALLS /* Use the standard ABI for syscalls */ #include <asm-generic/unistd.h> /* Additional Nios II specific syscalls. */ #define __NR_cacheflush (__NR_arch_specific_syscall) __SYSCALL(__NR_cacheflush, sys_cacheflush) PK ! :� ; ; include/uapi/asm/Kbuildnu �[��� # SPDX-License-Identifier: GPL-2.0 generic-y += ucontext.h PK ! � ��u u include/uapi/asm/signal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright Altera Corporation (C) 2013. All rights reserved * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program. If not, see <http://www.gnu.org/licenses/>. * */ #ifndef _ASM_NIOS2_SIGNAL_H #define _ASM_NIOS2_SIGNAL_H #define SA_RESTORER 0x04000000 #include <asm-generic/signal.h> #endif /* _ASM_NIOS2_SIGNAL_H */ PK ! ]C� include/uapi/asm/ptrace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd * * based on m68k asm/processor.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _UAPI_ASM_NIOS2_PTRACE_H #define _UAPI_ASM_NIOS2_PTRACE_H #ifndef __ASSEMBLY__ #include <linux/types.h> /* * Register numbers used by 'ptrace' system call interface. */ /* GP registers */ #define PTR_R0 0 #define PTR_R1 1 #define PTR_R2 2 #define PTR_R3 3 #define PTR_R4 4 #define PTR_R5 5 #define PTR_R6 6 #define PTR_R7 7 #define PTR_R8 8 #define PTR_R9 9 #define PTR_R10 10 #define PTR_R11 11 #define PTR_R12 12 #define PTR_R13 13 #define PTR_R14 14 #define PTR_R15 15 #define PTR_R16 16 #define PTR_R17 17 #define PTR_R18 18 #define PTR_R19 19 #define PTR_R20 20 #define PTR_R21 21 #define PTR_R22 22 #define PTR_R23 23 #define PTR_R24 24 #define PTR_R25 25 #define PTR_GP 26 #define PTR_SP 27 #define PTR_FP 28 #define PTR_EA 29 #define PTR_BA 30 #define PTR_RA 31 /* Control registers */ #define PTR_PC 32 #define PTR_STATUS 33 #define PTR_ESTATUS 34 #define PTR_BSTATUS 35 #define PTR_IENABLE 36 #define PTR_IPENDING 37 #define PTR_CPUID 38 #define PTR_CTL6 39 #define PTR_EXCEPTION 40 #define PTR_PTEADDR 41 #define PTR_TLBACC 42 #define PTR_TLBMISC 43 #define PTR_ECCINJ 44 #define PTR_BADADDR 45 #define PTR_CONFIG 46 #define PTR_MPUBASE 47 #define PTR_MPUACC 48 #define NUM_PTRACE_REG (PTR_MPUACC + 1) /* User structures for general purpose registers. */ struct user_pt_regs { __u32 regs[49]; }; #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_NIOS2_PTRACE_H */ PK ! k�� include/uapi/asm/byteorder.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ /* * Copyright (C) 2009 Thomas Chou <thomas@wytron.com.tw> * Copyright (C) 2004 Microtronix Datacom Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #ifndef _ASM_NIOS2_BYTEORDER_H #define _ASM_NIOS2_BYTEORDER_H #include <linux/byteorder/little_endian.h> #endif PK ! W�m�l l include/uapi/asm/sigcontext.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ /* * Copyright (C) 2004, Microtronix Datacom Ltd. * * All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for more * details. */ #ifndef _UAPI__ASM_SIGCONTEXT_H #define _UAPI__ASM_SIGCONTEXT_H #include <linux/types.h> #define MCONTEXT_VERSION 2 struct sigcontext { int version; unsigned long gregs[32]; }; #endif PK ! ��)� � include/uapi/asm/swab.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2011 Pyramid Technical Consultants, Inc. * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this * archive for more details. */ #ifndef _ASM_NIOS2_SWAB_H #define _ASM_NIOS2_SWAB_H #include <linux/types.h> #include <asm-generic/swab.h> #ifdef CONFIG_NIOS2_CI_SWAB_SUPPORT #ifdef __GNUC__ #define __nios2_swab(x) \ __builtin_custom_ini(CONFIG_NIOS2_CI_SWAB_NO, (x)) static inline __attribute__((const)) __u16 __arch_swab16(__u16 x) { return (__u16) __nios2_swab(((__u32) x) << 16); } #define __arch_swab16 __arch_swab16 static inline __attribute__((const)) __u32 __arch_swab32(__u32 x) { return (__u32) __nios2_swab(x); } #define __arch_swab32 __arch_swab32 #endif /* __GNUC__ */ #endif /* CONFIG_NIOS2_CI_SWAB_SUPPORT */ #endif /* _ASM_NIOS2_SWAB_H */ PK ! Br��O O include/uapi/asm/elf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. * */ #ifndef _UAPI_ASM_NIOS2_ELF_H #define _UAPI_ASM_NIOS2_ELF_H #include <linux/ptrace.h> /* Relocation types */ #define R_NIOS2_NONE 0 #define R_NIOS2_S16 1 #define R_NIOS2_U16 2 #define R_NIOS2_PCREL16 3 #define R_NIOS2_CALL26 4 #define R_NIOS2_IMM5 5 #define R_NIOS2_CACHE_OPX 6 #define R_NIOS2_IMM6 7 #define R_NIOS2_IMM8 8 #define R_NIOS2_HI16 9 #define R_NIOS2_LO16 10 #define R_NIOS2_HIADJ16 11 #define R_NIOS2_BFD_RELOC_32 12 #define R_NIOS2_BFD_RELOC_16 13 #define R_NIOS2_BFD_RELOC_8 14 #define R_NIOS2_GPREL 15 #define R_NIOS2_GNU_VTINHERIT 16 #define R_NIOS2_GNU_VTENTRY 17 #define R_NIOS2_UJMP 18 #define R_NIOS2_CJMP 19 #define R_NIOS2_CALLR 20 #define R_NIOS2_ALIGN 21 /* Keep this the last entry. */ #define R_NIOS2_NUM 22 typedef unsigned long elf_greg_t; #define ELF_NGREG 49 typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef unsigned long elf_fpregset_t; /* * These are used to set parameters in the core dumps. */ #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2LSB #define ELF_ARCH EM_ALTERA_NIOS2 #endif /* _UAPI_ASM_NIOS2_ELF_H */ PK ! ���� � include/asm/mmu.hnu �[��� /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_MMU_H #define _ASM_NIOS2_MMU_H /* Default "unsigned long" context */ typedef unsigned long mm_context_t; #endif /* _ASM_NIOS2_MMU_H */ PK ! ���Nc c include/asm/entry.hnu �[��� /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_ENTRY_H #define _ASM_NIOS2_ENTRY_H #ifdef __ASSEMBLY__ #include <asm/processor.h> #include <asm/registers.h> #include <asm/asm-offsets.h> /* * Standard Nios2 interrupt entry and exit macros. * Must be called with interrupts disabled. */ .macro SAVE_ALL rdctl r24, estatus andi r24, r24, ESTATUS_EU beq r24, r0, 1f /* In supervisor mode, already on kernel stack */ movia r24, _current_thread /* Switch to current kernel stack */ ldw r24, 0(r24) /* using the thread_info */ addi r24, r24, THREAD_SIZE-PT_REGS_SIZE stw sp, PT_SP(r24) /* Save user stack before changing */ mov sp, r24 br 2f 1 : mov r24, sp addi sp, sp, -PT_REGS_SIZE /* Backup the kernel stack pointer */ stw r24, PT_SP(sp) 2 : stw r1, PT_R1(sp) stw r2, PT_R2(sp) stw r3, PT_R3(sp) stw r4, PT_R4(sp) stw r5, PT_R5(sp) stw r6, PT_R6(sp) stw r7, PT_R7(sp) stw r8, PT_R8(sp) stw r9, PT_R9(sp) stw r10, PT_R10(sp) stw r11, PT_R11(sp) stw r12, PT_R12(sp) stw r13, PT_R13(sp) stw r14, PT_R14(sp) stw r15, PT_R15(sp) movi r24, -1 stw r24, PT_ORIG_R2(sp) stw r7, PT_ORIG_R7(sp) stw ra, PT_RA(sp) stw fp, PT_FP(sp) stw gp, PT_GP(sp) rdctl r24, estatus stw r24, PT_ESTATUS(sp) stw ea, PT_EA(sp) .endm .macro RESTORE_ALL ldw r1, PT_R1(sp) /* Restore registers */ ldw r2, PT_R2(sp) ldw r3, PT_R3(sp) ldw r4, PT_R4(sp) ldw r5, PT_R5(sp) ldw r6, PT_R6(sp) ldw r7, PT_R7(sp) ldw r8, PT_R8(sp) ldw r9, PT_R9(sp) ldw r10, PT_R10(sp) ldw r11, PT_R11(sp) ldw r12, PT_R12(sp) ldw r13, PT_R13(sp) ldw r14, PT_R14(sp) ldw r15, PT_R15(sp) ldw ra, PT_RA(sp) ldw fp, PT_FP(sp) ldw gp, PT_GP(sp) ldw r24, PT_ESTATUS(sp) wrctl estatus, r24 ldw ea, PT_EA(sp) ldw sp, PT_SP(sp) /* Restore sp last */ .endm .macro SAVE_SWITCH_STACK addi sp, sp, -SWITCH_STACK_SIZE stw r16, SW_R16(sp) stw r17, SW_R17(sp) stw r18, SW_R18(sp) stw r19, SW_R19(sp) stw r20, SW_R20(sp) stw r21, SW_R21(sp) stw r22, SW_R22(sp) stw r23, SW_R23(sp) stw fp, SW_FP(sp) stw gp, SW_GP(sp) stw ra, SW_RA(sp) .endm .macro RESTORE_SWITCH_STACK ldw r16, SW_R16(sp) ldw r17, SW_R17(sp) ldw r18, SW_R18(sp) ldw r19, SW_R19(sp) ldw r20, SW_R20(sp) ldw r21, SW_R21(sp) ldw r22, SW_R22(sp) ldw r23, SW_R23(sp) ldw fp, SW_FP(sp) ldw gp, SW_GP(sp) ldw ra, SW_RA(sp) addi sp, sp, SWITCH_STACK_SIZE .endm #endif /* __ASSEMBLY__ */ #endif /* _ASM_NIOS2_ENTRY_H */ PK ! �o�1 1 include/asm/pgtable-bits.hnu �[��� /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2009 Wind River Systems Inc * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_PGTABLE_BITS_H #define _ASM_NIOS2_PGTABLE_BITS_H /* * These are actual hardware defined protection bits in the tlbacc register * which looks like this: * * 31 30 ... 26 25 24 23 22 21 20 19 18 ... 1 0 * ignored........ C R W X G PFN............ */ #define _PAGE_GLOBAL (1<<20) #define _PAGE_EXEC (1<<21) #define _PAGE_WRITE (1<<22) #define _PAGE_READ (1<<23) #define _PAGE_CACHED (1<<24) /* C: data access cacheable */ /* * Software defined bits. They are ignored by the hardware and always read back * as zero, but can be written as non-zero. */ #define _PAGE_PRESENT (1<<25) /* PTE contains a translation */ #define _PAGE_ACCESSED (1<<26) /* page referenced */ #define _PAGE_DIRTY (1<<27) /* dirty page */ #endif /* _ASM_NIOS2_PGTABLE_BITS_H */ PK ! ��s� � include/asm/cache.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2004 Microtronix Datacom Ltd. * * All rights reserved. */ #ifndef _ASM_NIOS2_CACHE_H #define _ASM_NIOS2_CACHE_H #define NIOS2_DCACHE_SIZE CONFIG_NIOS2_DCACHE_SIZE #define NIOS2_ICACHE_SIZE CONFIG_NIOS2_ICACHE_SIZE #define NIOS2_DCACHE_LINE_SIZE CONFIG_NIOS2_DCACHE_LINE_SIZE #define NIOS2_ICACHE_LINE_SHIFT 5 #define NIOS2_ICACHE_LINE_SIZE (1 << NIOS2_ICACHE_LINE_SHIFT) /* bytes per L1 cache line */ #define L1_CACHE_SHIFT NIOS2_ICACHE_LINE_SHIFT #define L1_CACHE_BYTES NIOS2_ICACHE_LINE_SIZE #define ARCH_DMA_MINALIGN L1_CACHE_BYTES #define __cacheline_aligned #define ____cacheline_aligned #endif PK ! � �� � include/asm/setup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> */ #ifndef _ASM_NIOS2_SETUP_H #define _ASM_NIOS2_SETUP_H #include <asm-generic/setup.h> #ifndef __ASSEMBLY__ #ifdef __KERNEL__ extern char exception_handler_hook[]; extern char fast_handler[]; extern char fast_handler_end[]; extern void pagetable_init(void); #endif/* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif /* _ASM_NIOS2_SETUP_H */ PK ! Tg#�� � include/asm/Kbuildnu �[��� # SPDX-License-Identifier: GPL-2.0 generic-y += cmpxchg.h generic-y += extable.h generic-y += kvm_para.h generic-y += mcs_spinlock.h generic-y += spinlock.h generic-y += user.h PK ! ^�b� � include/asm/shmparam.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright Altera Corporation (C) <2015>. All rights reserved */ #ifndef _ASM_NIOS2_SHMPARAM_H #define _ASM_NIOS2_SHMPARAM_H #define SHMLBA CONFIG_NIOS2_DCACHE_SIZE #endif /* _ASM_NIOS2_SHMPARAM_H */ PK ! �6��� � include/asm/cacheflush.hnu �[��� /* * Copyright (C) 2003 Microtronix Datacom Ltd. * Copyright (C) 2000-2002 Greg Ungerer <gerg@snapgear.com> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_CACHEFLUSH_H #define _ASM_NIOS2_CACHEFLUSH_H #include <linux/mm_types.h> /* * This flag is used to indicate that the page pointed to by a pte is clean * and does not require cleaning before returning it to the user. */ #define PG_dcache_clean PG_arch_1 struct mm_struct; extern void flush_cache_all(void); extern void flush_cache_mm(struct mm_struct *mm); extern void flush_cache_dup_mm(struct mm_struct *mm); extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); extern void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 extern void flush_dcache_page(struct page *page); extern void flush_icache_range(unsigned long start, unsigned long end); extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); #define flush_cache_vmap(start, end) flush_dcache_range(start, end) #define flush_cache_vunmap(start, end) flush_dcache_range(start, end) extern void copy_to_user_page(struct vm_area_struct *vma, struct page *page, unsigned long user_vaddr, void *dst, void *src, int len); extern void copy_from_user_page(struct vm_area_struct *vma, struct page *page, unsigned long user_vaddr, void *dst, void *src, int len); extern void flush_dcache_range(unsigned long start, unsigned long end); extern void invalidate_dcache_range(unsigned long start, unsigned long end); #define flush_dcache_mmap_lock(mapping) xa_lock_irq(&mapping->i_pages) #define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&mapping->i_pages) #endif /* _ASM_NIOS2_CACHEFLUSH_H */ PK ! ���] ] include/asm/vmalloc.hnu �[��� #ifndef _ASM_NIOS2_VMALLOC_H #define _ASM_NIOS2_VMALLOC_H #endif /* _ASM_NIOS2_VMALLOC_H */ PK ! �*� include/asm/traps.hnu �[��� /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_TRAPS_H #define _ASM_NIOS2_TRAPS_H #define TRAP_ID_SYSCALL 0 #ifndef __ASSEMBLY__ void _exception(int signo, struct pt_regs *regs, int code, unsigned long addr); #endif #endif /* _ASM_NIOS2_TRAPS_H */ PK ! 3_t�� � include/asm/asm-macros.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Macro used to simplify coding multi-line assembler. * Some of the bit test macro can simplify down to one line * depending on the mask value. * * Copyright (C) 2004 Microtronix Datacom Ltd. * * All rights reserved. */ #ifndef _ASM_NIOS2_ASMMACROS_H #define _ASM_NIOS2_ASMMACROS_H /* * ANDs reg2 with mask and places the result in reg1. * * You cannnot use the same register for reg1 & reg2. */ .macro ANDI32 reg1, reg2, mask .if \mask & 0xffff .if \mask & 0xffff0000 movhi \reg1, %hi(\mask) movui \reg1, %lo(\mask) and \reg1, \reg1, \reg2 .else andi \reg1, \reg2, %lo(\mask) .endif .else andhi \reg1, \reg2, %hi(\mask) .endif .endm /* * ORs reg2 with mask and places the result in reg1. * * It is safe to use the same register for reg1 & reg2. */ .macro ORI32 reg1, reg2, mask .if \mask & 0xffff .if \mask & 0xffff0000 orhi \reg1, \reg2, %hi(\mask) ori \reg1, \reg2, %lo(\mask) .else ori \reg1, \reg2, %lo(\mask) .endif .else orhi \reg1, \reg2, %hi(\mask) .endif .endm /* * XORs reg2 with mask and places the result in reg1. * * It is safe to use the same register for reg1 & reg2. */ .macro XORI32 reg1, reg2, mask .if \mask & 0xffff .if \mask & 0xffff0000 xorhi \reg1, \reg2, %hi(\mask) xori \reg1, \reg1, %lo(\mask) .else xori \reg1, \reg2, %lo(\mask) .endif .else xorhi \reg1, \reg2, %hi(\mask) .endif .endm /* * This is a support macro for BTBZ & BTBNZ. It checks * the bit to make sure it is valid 32 value. * * It is safe to use the same register for reg1 & reg2. */ .macro BT reg1, reg2, bit .if \bit > 31 .err .else .if \bit < 16 andi \reg1, \reg2, (1 << \bit) .else andhi \reg1, \reg2, (1 << (\bit - 16)) .endif .endif .endm /* * Tests the bit in reg2 and branches to label if the * bit is zero. The result of the bit test is stored in reg1. * * It is safe to use the same register for reg1 & reg2. */ .macro BTBZ reg1, reg2, bit, label BT \reg1, \reg2, \bit beq \reg1, r0, \label .endm /* * Tests the bit in reg2 and branches to label if the * bit is non-zero. The result of the bit test is stored in reg1. * * It is safe to use the same register for reg1 & reg2. */ .macro BTBNZ reg1, reg2, bit, label BT \reg1, \reg2, \bit bne \reg1, r0, \label .endm /* * Tests the bit in reg2 and then compliments the bit in reg2. * The result of the bit test is stored in reg1. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTC reg1, reg2, bit .if \bit > 31 .err .else .if \bit < 16 andi \reg1, \reg2, (1 << \bit) xori \reg2, \reg2, (1 << \bit) .else andhi \reg1, \reg2, (1 << (\bit - 16)) xorhi \reg2, \reg2, (1 << (\bit - 16)) .endif .endif .endm /* * Tests the bit in reg2 and then sets the bit in reg2. * The result of the bit test is stored in reg1. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTS reg1, reg2, bit .if \bit > 31 .err .else .if \bit < 16 andi \reg1, \reg2, (1 << \bit) ori \reg2, \reg2, (1 << \bit) .else andhi \reg1, \reg2, (1 << (\bit - 16)) orhi \reg2, \reg2, (1 << (\bit - 16)) .endif .endif .endm /* * Tests the bit in reg2 and then resets the bit in reg2. * The result of the bit test is stored in reg1. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTR reg1, reg2, bit .if \bit > 31 .err .else .if \bit < 16 andi \reg1, \reg2, (1 << \bit) andi \reg2, \reg2, %lo(~(1 << \bit)) .else andhi \reg1, \reg2, (1 << (\bit - 16)) andhi \reg2, \reg2, %lo(~(1 << (\bit - 16))) .endif .endif .endm /* * Tests the bit in reg2 and then compliments the bit in reg2. * The result of the bit test is stored in reg1. If the * original bit was zero it branches to label. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTCBZ reg1, reg2, bit, label BTC \reg1, \reg2, \bit beq \reg1, r0, \label .endm /* * Tests the bit in reg2 and then compliments the bit in reg2. * The result of the bit test is stored in reg1. If the * original bit was non-zero it branches to label. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTCBNZ reg1, reg2, bit, label BTC \reg1, \reg2, \bit bne \reg1, r0, \label .endm /* * Tests the bit in reg2 and then sets the bit in reg2. * The result of the bit test is stored in reg1. If the * original bit was zero it branches to label. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTSBZ reg1, reg2, bit, label BTS \reg1, \reg2, \bit beq \reg1, r0, \label .endm /* * Tests the bit in reg2 and then sets the bit in reg2. * The result of the bit test is stored in reg1. If the * original bit was non-zero it branches to label. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTSBNZ reg1, reg2, bit, label BTS \reg1, \reg2, \bit bne \reg1, r0, \label .endm /* * Tests the bit in reg2 and then resets the bit in reg2. * The result of the bit test is stored in reg1. If the * original bit was zero it branches to label. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTRBZ reg1, reg2, bit, label BTR \reg1, \reg2, \bit bne \reg1, r0, \label .endm /* * Tests the bit in reg2 and then resets the bit in reg2. * The result of the bit test is stored in reg1. If the * original bit was non-zero it branches to label. * * It is NOT safe to use the same register for reg1 & reg2. */ .macro BTRBNZ reg1, reg2, bit, label BTR \reg1, \reg2, \bit bne \reg1, r0, \label .endm /* * Tests the bits in mask against reg2 stores the result in reg1. * If the all the bits in the mask are zero it branches to label. * * It is safe to use the same register for reg1 & reg2. */ .macro TSTBZ reg1, reg2, mask, label ANDI32 \reg1, \reg2, \mask beq \reg1, r0, \label .endm /* * Tests the bits in mask against reg2 stores the result in reg1. * If the any of the bits in the mask are 1 it branches to label. * * It is safe to use the same register for reg1 & reg2. */ .macro TSTBNZ reg1, reg2, mask, label ANDI32 \reg1, \reg2, \mask bne \reg1, r0, \label .endm /* * Pushes reg onto the stack. */ .macro PUSH reg addi sp, sp, -4 stw \reg, 0(sp) .endm /* * Pops the top of the stack into reg. */ .macro POP reg ldw \reg, 0(sp) addi sp, sp, 4 .endm #endif /* _ASM_NIOS2_ASMMACROS_H */ PK ! ��*AG G include/asm/page.hnu �[��� /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * MMU support based on asm/page.h from mips which is: * * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_PAGE_H #define _ASM_NIOS2_PAGE_H #include <linux/pfn.h> #include <linux/const.h> /* * PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE - 1)) /* * PAGE_OFFSET -- the first address of the first page of memory. */ #define PAGE_OFFSET \ (CONFIG_NIOS2_MEM_BASE + CONFIG_NIOS2_KERNEL_REGION_BASE) #ifndef __ASSEMBLY__ /* * This gives the physical RAM offset. */ #define PHYS_OFFSET CONFIG_NIOS2_MEM_BASE /* * It's normally defined only for FLATMEM config but it's * used in our early mem init code for all memory models. * So always define it. */ #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET) #define clear_page(page) memset((page), 0, PAGE_SIZE) #define copy_page(to, from) memcpy((to), (from), PAGE_SIZE) struct page; extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page); extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, struct page *to); /* * These are used to make use of C type-checking. */ typedef struct page *pgtable_t; typedef struct { unsigned long pte; } pte_t; typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) #define pgd_val(x) ((x).pgd) #define pgprot_val(x) ((x).pgprot) #define __pte(x) ((pte_t) { (x) }) #define __pgd(x) ((pgd_t) { (x) }) #define __pgprot(x) ((pgprot_t) { (x) }) extern unsigned long memory_start; extern unsigned long memory_end; extern unsigned long memory_size; extern struct page *mem_map; # define __pa(x) \ ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) # define __va(x) \ ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) #define page_to_virt(page) \ ((void *)(((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET) # define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) static inline bool pfn_valid(unsigned long pfn) { /* avoid <linux/mm.h> include hell */ extern unsigned long max_mapnr; unsigned long pfn_offset = ARCH_PFN_OFFSET; return pfn >= pfn_offset && pfn < max_mapnr; } # define virt_to_page(vaddr) pfn_to_page(PFN_DOWN(virt_to_phys(vaddr))) # define virt_addr_valid(vaddr) pfn_valid(PFN_DOWN(virt_to_phys(vaddr))) # define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_NON_EXEC #include <asm-generic/memory_model.h> #include <asm-generic/getorder.h> #endif /* !__ASSEMBLY__ */ #endif /* _ASM_NIOS2_PAGE_H */ PK ! �N$ir r include/asm/tlbflush.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> */ #ifndef _ASM_NIOS2_TLBFLUSH_H #define _ASM_NIOS2_TLBFLUSH_H struct mm_struct; /* * TLB flushing: * * - flush_tlb_all() flushes all processes TLB entries * - flush_tlb_mm(mm) flushes the specified mm context TLB entries * - flush_tlb_range(vma, start, end) flushes a range of pages * - flush_tlb_page(vma, address) flushes a page * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages * - flush_tlb_kernel_page(address) flushes a kernel page * * - reload_tlb_page(vma, address, pte) flushes the TLB for address like * flush_tlb_page, then replaces it with a TLB for pte. */ extern void flush_tlb_all(void); extern void flush_tlb_mm(struct mm_struct *mm); extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long address) { flush_tlb_range(vma, address, address + PAGE_SIZE); } static inline void flush_tlb_kernel_page(unsigned long address) { flush_tlb_kernel_range(address, address + PAGE_SIZE); } extern void reload_tlb_page(struct vm_area_struct *vma, unsigned long addr, pte_t pte); #endif /* _ASM_NIOS2_TLBFLUSH_H */ PK ! ��}� � include/asm/tlb.hnu �[��� /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2009 Wind River Systems Inc * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_TLB_H #define _ASM_NIOS2_TLB_H extern void set_mmu_pid(unsigned long pid); /* * NIOS32 does have flush_tlb_range(), but it lacks a limit and fallback to * full mm invalidation. So use flush_tlb_mm() for everything. */ #include <linux/pagemap.h> #include <asm-generic/tlb.h> #endif /* _ASM_NIOS2_TLB_H */ PK ! �>�)� � include/asm/thread_info.hnu �[��� /* * NiosII low-level thread information * * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * Based on asm/thread_info_no.h from m68k which is: * * Copyright (C) 2002 David Howells <dhowells@redhat.com> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_THREAD_INFO_H #define _ASM_NIOS2_THREAD_INFO_H #ifdef __KERNEL__ /* * Size of the kernel stack for each process. */ #define THREAD_SIZE_ORDER 1 #define THREAD_SIZE 8192 /* 2 * PAGE_SIZE */ #ifndef __ASSEMBLY__ typedef struct { unsigned long seg; } mm_segment_t; /* * low level task data that entry.S needs immediate access to * - this struct should fit entirely inside of one cache line * - this struct shares the supervisor stack pages * - if the contents of this structure are changed, the assembly constants * must also be changed */ struct thread_info { struct task_struct *task; /* main task structure */ unsigned long flags; /* low level flags */ __u32 cpu; /* current CPU */ int preempt_count; /* 0 => preemptable,<0 => BUG */ mm_segment_t addr_limit; /* thread address space: 0-0x7FFFFFFF for user-thead 0-0xFFFFFFFF for kernel-thread */ struct pt_regs *regs; }; /* * macros/functions for gaining access to the thread information structure * * preempt_count needs to be 1 initially, until the scheduler is functional. */ #define INIT_THREAD_INFO(tsk) \ { \ .task = &tsk, \ .flags = 0, \ .cpu = 0, \ .preempt_count = INIT_PREEMPT_COUNT, \ .addr_limit = KERNEL_DS, \ } /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { register unsigned long sp asm("sp"); return (struct thread_info *)(sp & ~(THREAD_SIZE - 1)); } #endif /* !__ASSEMBLY__ */ /* * thread information flags * - these are process state flags that various assembly files may need to * access * - pending work-to-be-done flags are in LSW * - other flags in MSW */ #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ #define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_MEMDIE 4 /* is terminating due to OOM killer */ #define TIF_SECCOMP 5 /* secure computing */ #define TIF_SYSCALL_AUDIT 6 /* syscall auditing active */ #define TIF_NOTIFY_SIGNAL 7 /* signal notifications exist */ #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_SECCOMP (1 << TIF_SECCOMP) #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) #define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) /* work to do on interrupt/exception return */ #define _TIF_WORK_MASK 0x0000FFFE /* work to do on any return to u-space */ # define _TIF_ALLWORK_MASK 0x0000FFFF #endif /* __KERNEL__ */ #endif /* _ASM_NIOS2_THREAD_INFO_H */ PK ! ~tO include/asm/processor.hnu �[��� /* * Copyright (C) 2013 Altera Corporation * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd * Copyright (C) 2001 Ken Hill (khill@microtronix.com) * Vic Phillips (vic@microtronix.com) * * based on SPARC asm/processor_32.h which is: * * Copyright (C) 1994 David S. Miller * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_PROCESSOR_H #define _ASM_NIOS2_PROCESSOR_H #include <asm/ptrace.h> #include <asm/registers.h> #include <asm/page.h> #define NIOS2_FLAG_KTHREAD 0x00000001 /* task is a kernel thread */ #define NIOS2_OP_NOP 0x1883a #define NIOS2_OP_BREAK 0x3da03a #ifdef __KERNEL__ #define STACK_TOP TASK_SIZE #define STACK_TOP_MAX STACK_TOP #endif /* __KERNEL__ */ /* Kuser helpers is mapped to this user space address */ #define KUSER_BASE 0x1000 #define KUSER_SIZE (PAGE_SIZE) #ifndef __ASSEMBLY__ # define TASK_SIZE 0x7FFF0000UL # define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) /* The Nios processor specific thread struct. */ struct thread_struct { struct pt_regs *kregs; /* Context switch saved kernel state. */ unsigned long ksp; unsigned long kpsr; }; #define INIT_MMAP \ { &init_mm, (0), (0), __pgprot(0x0), VM_READ | VM_WRITE | VM_EXEC } # define INIT_THREAD { \ .kregs = NULL, \ .ksp = 0, \ .kpsr = 0, \ } extern void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp); struct task_struct; /* Free all resources held by a thread. */ static inline void release_thread(struct task_struct *dead_task) { } extern unsigned long __get_wchan(struct task_struct *p); #define task_pt_regs(p) \ ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1) /* Used by procfs */ #define KSTK_EIP(tsk) ((tsk)->thread.kregs->ea) #define KSTK_ESP(tsk) ((tsk)->thread.kregs->sp) #define cpu_relax() barrier() #endif /* __ASSEMBLY__ */ #endif /* _ASM_NIOS2_PROCESSOR_H */ PK ! ����> > include/asm/linkage.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2009 Thomas Chou <thomas@wytron.com.tw> * * All rights reserved. */ #ifndef _ASM_NIOS2_LINKAGE_H #define _ASM_NIOS2_LINKAGE_H /* This file is required by include/linux/linkage.h */ #define __ALIGN .align 4 #define __ALIGN_STR ".align 4" #endif PK ! ��� � include/asm/mmu_context.hnu �[��� /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 1996, 1997, 1998, 1999 by Ralf Baechle * Copyright (C) 1999 Silicon Graphics, Inc. * * based on MIPS asm/mmu_context.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_MMU_CONTEXT_H #define _ASM_NIOS2_MMU_CONTEXT_H #include <linux/mm_types.h> #include <asm-generic/mm_hooks.h> extern void mmu_context_init(void); extern unsigned long get_pid_from_context(mm_context_t *ctx); /* * For the fast tlb miss handlers, we keep a pointer to the current pgd. * processor. */ extern pgd_t *pgd_current; /* * Initialize the context related info for a new mm_struct instance. * * Set all new contexts to 0, that way the generation will never match * the currently running generation when this context is switched in. */ #define init_new_context init_new_context static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { mm->context = 0; return 0; } void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk); /* * After we have set current->mm to a new value, this activates * the context for the new mm so we see the new mappings. */ #define activate_mm activate_mm void activate_mm(struct mm_struct *prev, struct mm_struct *next); #include <asm-generic/mmu_context.h> #endif /* _ASM_NIOS2_MMU_CONTEXT_H */ PK ! �q%�) ) include/asm/ptrace.hnu �[��� /* * Copyright (C) 2013 Altera Corporation * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd * * based on m68k asm/processor.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_PTRACE_H #define _ASM_NIOS2_PTRACE_H #include <uapi/asm/ptrace.h> /* This struct defines the way the registers are stored on the stack during a system call. */ #ifndef __ASSEMBLY__ struct pt_regs { unsigned long r8; /* r8-r15 Caller-saved GP registers */ unsigned long r9; unsigned long r10; unsigned long r11; unsigned long r12; unsigned long r13; unsigned long r14; unsigned long r15; unsigned long r1; /* Assembler temporary */ unsigned long r2; /* Retval LS 32bits */ unsigned long r3; /* Retval MS 32bits */ unsigned long r4; /* r4-r7 Register arguments */ unsigned long r5; unsigned long r6; unsigned long r7; unsigned long orig_r2; /* Copy of r2 ?? */ unsigned long ra; /* Return address */ unsigned long fp; /* Frame pointer */ unsigned long sp; /* Stack pointer */ unsigned long gp; /* Global pointer */ unsigned long estatus; unsigned long ea; /* Exception return address (pc) */ unsigned long orig_r7; }; /* * This is the extended stack used by signal handlers and the context * switcher: it's pushed after the normal "struct pt_regs". */ struct switch_stack { unsigned long r16; /* r16-r23 Callee-saved GP registers */ unsigned long r17; unsigned long r18; unsigned long r19; unsigned long r20; unsigned long r21; unsigned long r22; unsigned long r23; unsigned long fp; unsigned long gp; unsigned long ra; }; #define user_mode(regs) (((regs)->estatus & ESTATUS_EU)) #define instruction_pointer(regs) ((regs)->ra) #define profile_pc(regs) instruction_pointer(regs) #define user_stack_pointer(regs) ((regs)->sp) extern void show_regs(struct pt_regs *); #define current_pt_regs() \ ((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE)\ - 1) #define force_successful_syscall_return() (current_pt_regs()->orig_r2 = -1) int do_syscall_trace_enter(void); void do_syscall_trace_exit(void); #endif /* __ASSEMBLY__ */ #endif /* _ASM_NIOS2_PTRACE_H */ PK ! ����� � include/asm/checksum.hnu �[��� /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS_CHECKSUM_H #define _ASM_NIOS_CHECKSUM_H /* Take these from lib/checksum.c */ extern __wsum csum_partial(const void *buff, int len, __wsum sum); extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); extern __sum16 ip_compute_csum(const void *buff, int len); /* * Fold a partial checksum */ static inline __sum16 csum_fold(__wsum sum) { __asm__ __volatile__( "add %0, %1, %0\n" "cmpltu r8, %0, %1\n" "srli %0, %0, 16\n" "add %0, %0, r8\n" "nor %0, %0, %0\n" : "=r" (sum) : "r" (sum << 16), "0" (sum) : "r8"); return (__force __sum16) sum; } /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ #define csum_tcpudp_nofold csum_tcpudp_nofold static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len, __u8 proto, __wsum sum) { __asm__ __volatile__( "add %0, %1, %0\n" "cmpltu r8, %0, %1\n" "add %0, %0, r8\n" /* add carry */ "add %0, %2, %0\n" "cmpltu r8, %0, %2\n" "add %0, %0, r8\n" /* add carry */ "add %0, %3, %0\n" "cmpltu r8, %0, %3\n" "add %0, %0, r8\n" /* add carry */ : "=r" (sum), "=r" (saddr) : "r" (daddr), "r" ((len + proto) << 8), "0" (sum), "1" (saddr) : "r8"); return sum; } static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, __u32 len, __u8 proto, __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); } #endif /* _ASM_NIOS_CHECKSUM_H */ PK ! ej � � include/asm/asm-offsets.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2009 Thomas Chou <thomas@wytron.com.tw> */ #include <generated/asm-offsets.h> PK ! 7��- - include/asm/kgdb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2015 Altera Corporation * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * * Based on the code posted by Kazuyasu on the Altera Forum at: * http://www.alteraforum.com/forum/showpost.php?p=77003&postcount=20 */ #ifndef _ASM_NIOS2_KGDB_H #define _ASM_NIOS2_KGDB_H #define CACHE_FLUSH_IS_SAFE 1 #define BUFMAX 2048 enum regnames { GDB_R0 = 0, GDB_AT, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7, GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15, GDB_R16, GDB_R17, GDB_R18, GDB_R19, GDB_R20, GDB_R21, GDB_R22, GDB_R23, GDB_ET, GDB_BT, GDB_GP, GDB_SP, GDB_FP, GDB_EA, GDB_BA, GDB_RA, GDB_PC, GDB_STATUS, GDB_ESTATUS, GDB_BSTATUS, GDB_IENABLE, GDB_IPENDING, GDB_CPUID, GDB_CTL6, GDB_EXCEPTION, GDB_PTEADDR, GDB_TLBACC, GDB_TLBMISC, GDB_ECCINJ, GDB_BADADDR, GDB_CONFIG, GDB_MPUBASE, GDB_MPUACC, /* do not change the last entry or anything below! */ GDB_NUMREGBYTES /* number of registers */ }; #define GDB_SIZEOF_REG sizeof(u32) #define DBG_MAX_REG_NUM (49) #define NUMREGBYTES (DBG_MAX_REG_NUM * sizeof(GDB_SIZEOF_REG)) #define BREAK_INSTR_SIZE 4 static inline void arch_kgdb_breakpoint(void) { __asm__ __volatile__("trap 30\n"); } #endif /* _ASM_NIOS2_KGDB_H */ PK ! "��.� � include/asm/irqflags.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw> */ #ifndef _ASM_IRQFLAGS_H #define _ASM_IRQFLAGS_H #include <asm/registers.h> static inline unsigned long arch_local_save_flags(void) { return RDCTL(CTL_FSTATUS); } /* * This will restore ALL status register flags, not only the interrupt * mask flag. */ static inline void arch_local_irq_restore(unsigned long flags) { WRCTL(CTL_FSTATUS, flags); } static inline void arch_local_irq_disable(void) { unsigned long flags; flags = arch_local_save_flags(); arch_local_irq_restore(flags & ~STATUS_PIE); } static inline void arch_local_irq_enable(void) { unsigned long flags; flags = arch_local_save_flags(); arch_local_irq_restore(flags | STATUS_PIE); } static inline int arch_irqs_disabled_flags(unsigned long flags) { return (flags & STATUS_PIE) == 0; } static inline int arch_irqs_disabled(void) { return arch_irqs_disabled_flags(arch_local_save_flags()); } static inline unsigned long arch_local_irq_save(void) { unsigned long flags; flags = arch_local_save_flags(); arch_local_irq_restore(flags & ~STATUS_PIE); return flags; } #endif /* _ASM_IRQFLAGS_H */ PK ! ��2�I I include/asm/syscall.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright Altera Corporation (C) <2014>. All rights reserved */ #ifndef __ASM_NIOS2_SYSCALL_H__ #define __ASM_NIOS2_SYSCALL_H__ #include <uapi/linux/audit.h> #include <linux/err.h> #include <linux/sched.h> static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs) { return regs->r2; } static inline void syscall_rollback(struct task_struct *task, struct pt_regs *regs) { regs->r2 = regs->orig_r2; regs->r7 = regs->orig_r7; } static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { return regs->r7 ? regs->r2 : 0; } static inline long syscall_get_return_value(struct task_struct *task, struct pt_regs *regs) { return regs->r2; } static inline void syscall_set_return_value(struct task_struct *task, struct pt_regs *regs, int error, long val) { if (error) { /* error < 0, but nios2 uses > 0 return value */ regs->r2 = -error; regs->r7 = 1; } else { regs->r2 = val; regs->r7 = 0; } } static inline void syscall_get_arguments(struct task_struct *task, struct pt_regs *regs, unsigned long *args) { *args++ = regs->r4; *args++ = regs->r5; *args++ = regs->r6; *args++ = regs->r7; *args++ = regs->r8; *args = regs->r9; } static inline void syscall_set_arguments(struct task_struct *task, struct pt_regs *regs, const unsigned long *args) { regs->r4 = *args++; regs->r5 = *args++; regs->r6 = *args++; regs->r7 = *args++; regs->r8 = *args++; regs->r9 = *args; } static inline int syscall_get_arch(struct task_struct *task) { return AUDIT_ARCH_NIOS2; } #endif PK ! �^r*# # include/asm/delay.hnu �[��� /* * Copyright (C) 2014 Altera Corporation * Copyright (C) 2004 Microtronix Datacom Ltd * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_DELAY_H #define _ASM_NIOS2_DELAY_H #include <asm-generic/delay.h> /* Undefined functions to get compile-time errors */ extern void __bad_udelay(void); extern void __bad_ndelay(void); extern unsigned long loops_per_jiffy; #endif /* _ASM_NIOS2_DELAY_H */ PK ! ��� � include/asm/uaccess.hnu �[��� /* * User space memory access functions for Nios II * * Copyright (C) 2010-2011, Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2009, Wind River Systems Inc * Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_UACCESS_H #define _ASM_NIOS2_UACCESS_H #include <linux/string.h> #include <asm/page.h> #include <asm/extable.h> /* * Segment stuff */ #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) #define USER_DS MAKE_MM_SEG(0x80000000UL) #define KERNEL_DS MAKE_MM_SEG(0) #define get_fs() (current_thread_info()->addr_limit) #define set_fs(seg) (current_thread_info()->addr_limit = (seg)) #define uaccess_kernel() (get_fs().seg == KERNEL_DS.seg) #define __access_ok(addr, len) \ (((signed long)(((long)get_fs().seg) & \ ((long)(addr) | (((long)(addr)) + (len)) | (len)))) == 0) #define access_ok(addr, len) \ likely(__access_ok((unsigned long)(addr), (unsigned long)(len))) # define __EX_TABLE_SECTION ".section __ex_table,\"a\"\n" #define user_addr_max() (uaccess_kernel() ? ~0UL : TASK_SIZE) /* * Zero Userspace */ static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n) { __asm__ __volatile__ ( "1: stb zero, 0(%1)\n" " addi %0, %0, -1\n" " addi %1, %1, 1\n" " bne %0, zero, 1b\n" "2:\n" __EX_TABLE_SECTION ".word 1b, 2b\n" ".previous\n" : "=r" (n), "=r" (to) : "0" (n), "1" (to) ); return n; } static inline unsigned long __must_check clear_user(void __user *to, unsigned long n) { if (!access_ok(to, n)) return n; return __clear_user(to, n); } extern unsigned long raw_copy_from_user(void *to, const void __user *from, unsigned long n); extern unsigned long raw_copy_to_user(void __user *to, const void *from, unsigned long n); #define INLINE_COPY_FROM_USER #define INLINE_COPY_TO_USER extern long strncpy_from_user(char *__to, const char __user *__from, long __len); extern __must_check long strnlen_user(const char __user *s, long n); /* Optimized macros */ #define __get_user_asm(val, insn, addr, err) \ { \ unsigned long __gu_val; \ __asm__ __volatile__( \ " movi %0, %3\n" \ "1: " insn " %1, 0(%2)\n" \ " movi %0, 0\n" \ "2:\n" \ " .section __ex_table,\"a\"\n" \ " .word 1b, 2b\n" \ " .previous" \ : "=&r" (err), "=r" (__gu_val) \ : "r" (addr), "i" (-EFAULT)); \ val = (__force __typeof__(*(addr)))__gu_val; \ } extern void __get_user_unknown(void); #define __get_user_8(val, ptr, err) do { \ u64 __val = 0; \ err = 0; \ if (raw_copy_from_user(&(__val), ptr, sizeof(val))) { \ err = -EFAULT; \ } else { \ val = (typeof(val))(typeof((val) - (val)))__val; \ } \ } while (0) #define __get_user_common(val, size, ptr, err) \ do { \ switch (size) { \ case 1: \ __get_user_asm(val, "ldbu", ptr, err); \ break; \ case 2: \ __get_user_asm(val, "ldhu", ptr, err); \ break; \ case 4: \ __get_user_asm(val, "ldw", ptr, err); \ break; \ case 8: \ __get_user_8(val, ptr, err); \ break; \ default: \ __get_user_unknown(); \ break; \ } \ } while (0) #define __get_user(x, ptr) \ ({ \ long __gu_err = -EFAULT; \ const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ __get_user_common(x, sizeof(*(ptr)), __gu_ptr, __gu_err); \ __gu_err; \ }) #define get_user(x, ptr) \ ({ \ long __gu_err = -EFAULT; \ const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ if (access_ok( __gu_ptr, sizeof(*__gu_ptr))) \ __get_user_common(x, sizeof(*__gu_ptr), \ __gu_ptr, __gu_err); \ __gu_err; \ }) #define __put_user_asm(val, insn, ptr, err) \ { \ __asm__ __volatile__( \ " movi %0, %3\n" \ "1: " insn " %1, 0(%2)\n" \ " movi %0, 0\n" \ "2:\n" \ " .section __ex_table,\"a\"\n" \ " .word 1b, 2b\n" \ " .previous\n" \ : "=&r" (err) \ : "r" (val), "r" (ptr), "i" (-EFAULT)); \ } #define put_user(x, ptr) \ ({ \ long __pu_err = -EFAULT; \ __typeof__(*(ptr)) __user *__pu_ptr = (ptr); \ __typeof__(*(ptr)) __pu_val = (__typeof(*ptr))(x); \ if (access_ok(__pu_ptr, sizeof(*__pu_ptr))) { \ switch (sizeof(*__pu_ptr)) { \ case 1: \ __put_user_asm(__pu_val, "stb", __pu_ptr, __pu_err); \ break; \ case 2: \ __put_user_asm(__pu_val, "sth", __pu_ptr, __pu_err); \ break; \ case 4: \ __put_user_asm(__pu_val, "stw", __pu_ptr, __pu_err); \ break; \ default: \ /* XXX: This looks wrong... */ \ __pu_err = 0; \ if (copy_to_user(__pu_ptr, &(__pu_val), \ sizeof(*__pu_ptr))) \ __pu_err = -EFAULT; \ break; \ } \ } \ __pu_err; \ }) #define __put_user(x, ptr) put_user(x, ptr) #endif /* _ASM_NIOS2_UACCESS_H */ PK ! ��< < include/asm/registers.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> */ #ifndef _ASM_NIOS2_REGISTERS_H #define _ASM_NIOS2_REGISTERS_H #ifndef __ASSEMBLY__ #include <asm/cpuinfo.h> #endif /* control register numbers */ #define CTL_FSTATUS 0 #define CTL_ESTATUS 1 #define CTL_BSTATUS 2 #define CTL_IENABLE 3 #define CTL_IPENDING 4 #define CTL_CPUID 5 #define CTL_RSV1 6 #define CTL_EXCEPTION 7 #define CTL_PTEADDR 8 #define CTL_TLBACC 9 #define CTL_TLBMISC 10 #define CTL_RSV2 11 #define CTL_BADADDR 12 #define CTL_CONFIG 13 #define CTL_MPUBASE 14 #define CTL_MPUACC 15 /* access control registers using GCC builtins */ #define RDCTL(r) __builtin_rdctl(r) #define WRCTL(r, v) __builtin_wrctl(r, v) /* status register bits */ #define STATUS_PIE (1 << 0) /* processor interrupt enable */ #define STATUS_U (1 << 1) /* user mode */ #define STATUS_EH (1 << 2) /* Exception mode */ /* estatus register bits */ #define ESTATUS_EPIE (1 << 0) /* processor interrupt enable */ #define ESTATUS_EU (1 << 1) /* user mode */ #define ESTATUS_EH (1 << 2) /* Exception mode */ /* tlbmisc register bits */ #define TLBMISC_PID_SHIFT 4 #ifndef __ASSEMBLY__ #define TLBMISC_PID_MASK ((1UL << cpuinfo.tlb_pid_num_bits) - 1) #endif #define TLBMISC_WAY_MASK 0xf #define TLBMISC_WAY_SHIFT 20 #define TLBMISC_PID (TLBMISC_PID_MASK << TLBMISC_PID_SHIFT) /* TLB PID */ #define TLBMISC_WE (1 << 18) /* TLB write enable */ #define TLBMISC_RD (1 << 19) /* TLB read */ #define TLBMISC_WAY (TLBMISC_WAY_MASK << TLBMISC_WAY_SHIFT) /* TLB way */ #endif /* _ASM_NIOS2_REGISTERS_H */ PK ! GI�& & include/asm/io.hnu �[��� /* * Copyright (C) 2014 Altera Corporation * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_IO_H #define _ASM_NIOS2_IO_H #include <linux/types.h> #include <asm/pgtable-bits.h> /* PCI is not supported in nios2, set this to 0. */ #define IO_SPACE_LIMIT 0 #define readb_relaxed(addr) readb(addr) #define readw_relaxed(addr) readw(addr) #define readl_relaxed(addr) readl(addr) #define writeb_relaxed(x, addr) writeb(x, addr) #define writew_relaxed(x, addr) writew(x, addr) #define writel_relaxed(x, addr) writel(x, addr) void __iomem *ioremap(unsigned long physaddr, unsigned long size); void iounmap(void __iomem *addr); /* Pages to physical address... */ #define page_to_phys(page) virt_to_phys(page_to_virt(page)) /* Macros used for converting between virtual and physical mappings. */ #define phys_to_virt(vaddr) \ ((void *)((unsigned long)(vaddr) | CONFIG_NIOS2_KERNEL_REGION_BASE)) /* Clear top 3 bits */ #define virt_to_phys(vaddr) \ ((unsigned long)((unsigned long)(vaddr) & ~0xE0000000)) #include <asm-generic/io.h> #endif /* _ASM_NIOS2_IO_H */ PK ! ���b b include/asm/switch_to.hnu �[��� /* * Copyright (C) 2004 Microtronix Datacom Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_SWITCH_TO_H #define _ASM_NIOS2_SWITCH_TO_H /* * switch_to(n) should switch tasks to task ptr, first checking that * ptr isn't the current task, in which case it does nothing. This * also clears the TS-flag if the task we switched to has used the * math co-processor latest. */ #define switch_to(prev, next, last) \ { \ void *_last; \ __asm__ __volatile__ ( \ "mov r4, %1\n" \ "mov r5, %2\n" \ "call resume\n" \ "mov %0,r4\n" \ : "=r" (_last) \ : "r" (prev), "r" (next) \ : "r4", "r5", "r7", "r8", "ra"); \ (last) = _last; \ } #endif /* _ASM_NIOS2_SWITCH_TO_H */ PK ! G�=F& & include/asm/pgtable.hnu �[��� /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> * Copyright (C) 2009 Wind River Systems Inc * * Based on asm/pgtable-32.h from mips which is: * * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_PGTABLE_H #define _ASM_NIOS2_PGTABLE_H #include <linux/io.h> #include <linux/bug.h> #include <asm/page.h> #include <asm/cacheflush.h> #include <asm/tlbflush.h> #include <asm/pgtable-bits.h> #include <asm-generic/pgtable-nopmd.h> #define VMALLOC_START CONFIG_NIOS2_KERNEL_MMU_REGION_BASE #define VMALLOC_END (CONFIG_NIOS2_KERNEL_REGION_BASE - 1) struct mm_struct; /* Helper macro */ #define MKP(x, w, r) __pgprot(_PAGE_PRESENT | _PAGE_CACHED | \ ((x) ? _PAGE_EXEC : 0) | \ ((r) ? _PAGE_READ : 0) | \ ((w) ? _PAGE_WRITE : 0)) /* * These are the macros that generic kernel code needs * (to populate protection_map[]) */ /* Remove W bit on private pages for COW support */ #define __P000 MKP(0, 0, 0) #define __P001 MKP(0, 0, 1) #define __P010 MKP(0, 0, 0) /* COW */ #define __P011 MKP(0, 0, 1) /* COW */ #define __P100 MKP(1, 0, 0) #define __P101 MKP(1, 0, 1) #define __P110 MKP(1, 0, 0) /* COW */ #define __P111 MKP(1, 0, 1) /* COW */ /* Shared pages can have exact HW mapping */ #define __S000 MKP(0, 0, 0) #define __S001 MKP(0, 0, 1) #define __S010 MKP(0, 1, 0) #define __S011 MKP(0, 1, 1) #define __S100 MKP(1, 0, 0) #define __S101 MKP(1, 0, 1) #define __S110 MKP(1, 1, 0) #define __S111 MKP(1, 1, 1) /* Used all over the kernel */ #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHED | _PAGE_READ | \ _PAGE_WRITE | _PAGE_EXEC | _PAGE_GLOBAL) #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_CACHED | _PAGE_READ | \ _PAGE_WRITE | _PAGE_ACCESSED) #define PAGE_COPY MKP(0, 0, 1) #define PGD_ORDER 0 #define PTE_ORDER 0 #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t)) #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) #define USER_PTRS_PER_PGD \ (CONFIG_NIOS2_KERNEL_MMU_REGION_BASE / PGDIR_SIZE) #define PGDIR_SHIFT 22 #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)]; /* * (pmds are folded into puds so this doesn't get actually called, * but the define is needed for a generic inline function.) */ static inline void set_pmd(pmd_t *pmdptr, pmd_t pmdval) { *pmdptr = pmdval; } static inline int pte_write(pte_t pte) \ { return pte_val(pte) & _PAGE_WRITE; } static inline int pte_dirty(pte_t pte) \ { return pte_val(pte) & _PAGE_DIRTY; } static inline int pte_young(pte_t pte) \ { return pte_val(pte) & _PAGE_ACCESSED; } #define pgprot_noncached pgprot_noncached static inline pgprot_t pgprot_noncached(pgprot_t _prot) { unsigned long prot = pgprot_val(_prot); prot &= ~_PAGE_CACHED; return __pgprot(prot); } static inline int pte_none(pte_t pte) { return !(pte_val(pte) & ~(_PAGE_GLOBAL|0xf)); } static inline int pte_present(pte_t pte) \ { return pte_val(pte) & _PAGE_PRESENT; } /* * The following only work if pte_present() is true. * Undefined behaviour if not.. */ static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; } static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; } static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; } static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; } static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; } static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { const unsigned long mask = _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC; pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); return pte; } static inline int pmd_present(pmd_t pmd) { return (pmd_val(pmd) != (unsigned long) invalid_pte_table) && (pmd_val(pmd) != 0UL); } static inline void pmd_clear(pmd_t *pmdp) { pmd_val(*pmdp) = (unsigned long) invalid_pte_table; } #define pte_pfn(pte) (pte_val(pte) & 0xfffff) #define pfn_pte(pfn, prot) (__pte(pfn | pgprot_val(prot))) #define pte_page(pte) (pfn_to_page(pte_pfn(pte))) /* * Store a linux PTE into the linux page table. */ static inline void set_pte(pte_t *ptep, pte_t pteval) { *ptep = pteval; } static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval) { unsigned long paddr = (unsigned long)page_to_virt(pte_page(pteval)); flush_dcache_range(paddr, paddr + PAGE_SIZE); set_pte(ptep, pteval); } static inline int pmd_none(pmd_t pmd) { return (pmd_val(pmd) == (unsigned long) invalid_pte_table) || (pmd_val(pmd) == 0UL); } #define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK) static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t null; pte_val(null) = (addr >> PAGE_SHIFT) & 0xf; set_pte_at(mm, addr, ptep, null); } /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ #define mk_pte(page, prot) (pfn_pte(page_to_pfn(page), prot)) /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ #define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd)) #define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) static inline unsigned long pmd_page_vaddr(pmd_t pmd) { return pmd_val(pmd); } #define pte_ERROR(e) \ pr_err("%s:%d: bad pte %08lx.\n", \ __FILE__, __LINE__, pte_val(e)) #define pgd_ERROR(e) \ pr_err("%s:%d: bad pgd %08lx.\n", \ __FILE__, __LINE__, pgd_val(e)) /* * Encode and decode a swap entry (must be !pte_none(pte) && !pte_present(pte): * * 31 30 29 28 27 26 25 24 23 22 21 20 19 18 ... 1 0 * 0 0 0 0 type. 0 0 0 0 0 0 offset......... * * This gives us up to 2**2 = 4 swap files and 2**20 * 4K = 4G per swap file. * * Note that the offset field is always non-zero, thus !pte_none(pte) is always * true. */ #define __swp_type(swp) (((swp).val >> 26) & 0x3) #define __swp_offset(swp) ((swp).val & 0xfffff) #define __swp_entry(type, off) ((swp_entry_t) { (((type) & 0x3) << 26) \ | ((off) & 0xfffff) }) #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val }) #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define kern_addr_valid(addr) (1) extern void __init paging_init(void); extern void __init mmu_init(void); extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *pte); static inline int pte_same(pte_t pte_a, pte_t pte_b); #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS static inline int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address, pte_t *ptep, pte_t entry, int dirty) { if (!pte_same(*ptep, entry)) set_ptes(vma->vm_mm, address, ptep, entry, 1); /* * update_mmu_cache will unconditionally execute, handling both * the case that the PTE changed and the spurious fault case. */ return true; } #endif /* _ASM_NIOS2_PGTABLE_H */ PK ! x��s s include/asm/elf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> */ #ifndef _ASM_NIOS2_ELF_H #define _ASM_NIOS2_ELF_H #include <uapi/asm/elf.h> /* * This is used to ensure we don't load something for the wrong architecture. */ #define elf_check_arch(x) ((x)->e_machine == EM_ALTERA_NIOS2) #define ELF_PLAT_INIT(_r, load_addr) #define CORE_DUMP_USE_REGSET #define ELF_EXEC_PAGESIZE 4096 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical use of this is to invoke "./ld.so someprog" to test out a new version of the loader. We need to make sure that it is out of the way of the program that it will "exec", and that there is sufficient room for the brk. */ #define ELF_ET_DYN_BASE 0xD0000000UL /* regs is struct pt_regs, pr_reg is elf_gregset_t (which is now struct_user_regs, they are different) */ #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 struct linux_binprm; extern int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp); #define ELF_CORE_COPY_REGS(pr_reg, regs) \ { do { \ /* Bleech. */ \ pr_reg[0] = regs->r8; \ pr_reg[1] = regs->r9; \ pr_reg[2] = regs->r10; \ pr_reg[3] = regs->r11; \ pr_reg[4] = regs->r12; \ pr_reg[5] = regs->r13; \ pr_reg[6] = regs->r14; \ pr_reg[7] = regs->r15; \ pr_reg[8] = regs->r1; \ pr_reg[9] = regs->r2; \ pr_reg[10] = regs->r3; \ pr_reg[11] = regs->r4; \ pr_reg[12] = regs->r5; \ pr_reg[13] = regs->r6; \ pr_reg[14] = regs->r7; \ pr_reg[15] = regs->orig_r2; \ pr_reg[16] = regs->ra; \ pr_reg[17] = regs->fp; \ pr_reg[18] = regs->sp; \ pr_reg[19] = regs->gp; \ pr_reg[20] = regs->estatus; \ pr_reg[21] = regs->ea; \ pr_reg[22] = regs->orig_r7; \ { \ struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \ pr_reg[23] = sw->r16; \ pr_reg[24] = sw->r17; \ pr_reg[25] = sw->r18; \ pr_reg[26] = sw->r19; \ pr_reg[27] = sw->r20; \ pr_reg[28] = sw->r21; \ pr_reg[29] = sw->r22; \ pr_reg[30] = sw->r23; \ pr_reg[31] = sw->fp; \ pr_reg[32] = sw->gp; \ pr_reg[33] = sw->ra; \ } \ } while (0); } /* This yields a mask that user programs can use to figure out what instruction set this cpu supports. */ #define ELF_HWCAP (0) /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in intent than poking at uname or /proc/cpuinfo. */ #define ELF_PLATFORM (NULL) #endif /* _ASM_NIOS2_ELF_H */ PK ! d�/�H H include/asm/syscalls.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright Altera Corporation (C) 2013. All rights reserved */ #ifndef __ASM_NIOS2_SYSCALLS_H #define __ASM_NIOS2_SYSCALLS_H int sys_cacheflush(unsigned long addr, unsigned long len, unsigned int op); #include <asm-generic/syscalls.h> #endif /* __ASM_NIOS2_SYSCALLS_H */ PK ! ��� o o include/asm/timex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright Altera Corporation (C) 2014. All rights reserved. */ #ifndef _ASM_NIOS2_TIMEX_H #define _ASM_NIOS2_TIMEX_H typedef unsigned long cycles_t; extern cycles_t get_cycles(void); #define get_cycles get_cycles #define random_get_entropy() (((unsigned long)get_cycles()) ?: random_get_entropy_fallback()) #endif PK ! �B include/asm/irq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2013 Altera Corporation * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> */ #ifndef _ASM_NIOS2_IRQ_H #define _ASM_NIOS2_IRQ_H #define NIOS2_CPU_NR_IRQS 32 #include <asm-generic/irq.h> #endif PK ! ���� include/asm/pgalloc.hnu �[��� /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994 - 2001, 2003 by Ralf Baechle * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_NIOS2_PGALLOC_H #define _ASM_NIOS2_PGALLOC_H #include <linux/mm.h> #include <asm-generic/pgalloc.h> static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte) { set_pmd(pmd, __pmd((unsigned long)pte)); } static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t pte) { set_pmd(pmd, __pmd((unsigned long)page_address(pte))); } /* * Initialize a new pmd table with invalid pointers. */ extern void pmd_init(unsigned long page, unsigned long pagetable); extern pgd_t *pgd_alloc(struct mm_struct *mm); #define __pte_free_tlb(tlb, pte, addr) \ do { \ pgtable_pte_page_dtor(pte); \ tlb_remove_page((tlb), (pte)); \ } while (0) #endif /* _ASM_NIOS2_PGALLOC_H */ PK ! U-�'j j include/asm/string.hnu �[��� /* * Copyright (C) 2004 Microtronix Datacom Ltd * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_NIOS2_STRING_H #define _ASM_NIOS2_STRING_H #ifdef __KERNEL__ #define __HAVE_ARCH_MEMSET #define __HAVE_ARCH_MEMCPY #define __HAVE_ARCH_MEMMOVE extern void *memset(void *s, int c, size_t count); extern void *memcpy(void *d, const void *s, size_t count); extern void *memmove(void *d, const void *s, size_t count); #endif /* __KERNEL__ */ #endif /* _ASM_NIOS2_STRING_H */ PK ! �+��S S include/asm/cpuinfo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> */ #ifndef _ASM_NIOS2_CPUINFO_H #define _ASM_NIOS2_CPUINFO_H #include <linux/types.h> struct cpuinfo { /* Core CPU configuration */ char cpu_impl[12]; u32 cpu_clock_freq; bool mmu; bool has_div; bool has_mul; bool has_mulx; bool has_bmx; bool has_cdx; /* CPU caches */ u32 icache_line_size; u32 icache_size; u32 dcache_line_size; u32 dcache_size; /* TLB */ u32 tlb_pid_num_bits; /* number of bits used for the PID in TLBMISC */ u32 tlb_num_ways; u32 tlb_num_ways_log2; u32 tlb_num_entries; u32 tlb_num_lines; u32 tlb_ptr_sz; /* Addresses */ u32 reset_addr; u32 exception_addr; u32 fast_tlb_miss_exc_addr; }; extern struct cpuinfo cpuinfo; extern void setup_cpuinfo(void); #endif /* _ASM_NIOS2_CPUINFO_H */ PK ! �� � boot/install.shnu �[��� #!/bin/sh # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive # for more details. # # Copyright (C) 1995 by Linus Torvalds # # Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin # # "make install" script for nios2 architecture # # Arguments: # $1 - kernel version # $2 - kernel image file # $3 - kernel map file # $4 - default install path (blank if root directory) # verify () { if [ ! -f "$1" ]; then echo "" 1>&2 echo " *** Missing file: $1" 1>&2 echo ' *** You need to run "make" before "make install".' 1>&2 echo "" 1>&2 exit 1 fi } # Make sure the files actually exist verify "$2" verify "$3" # User may have a custom install script if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi # Default install - same as make zlilo if [ -f $4/vmlinuz ]; then mv $4/vmlinuz $4/vmlinuz.old fi if [ -f $4/System.map ]; then mv $4/System.map $4/System.old fi cat $2 > $4/vmlinuz cp $3 $4/System.map sync PK ! �56� � boot/compressed/Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0 # # create a compressed vmlinux image from the original vmlinux # targets := vmlinux head.o misc.o piggy.o vmlinux.lds asflags-y := OBJECTS = $(obj)/head.o $(obj)/misc.o LDFLAGS_vmlinux := -T $(obj)/vmlinux: $(obj)/vmlinux.lds $(OBJECTS) $(obj)/piggy.o FORCE $(call if_changed,ld) LDFLAGS_piggy.o := -r --format binary --oformat elf32-littlenios2 -T $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/../vmlinux.gz FORCE $(call if_changed,ld) PK ! SQ�� � boot/Makefilenu �[��� # # arch/nios2/boot/Makefile # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive # for more details. # UIMAGE_LOADADDR = $(shell $(NM) vmlinux | awk '$$NF == "_stext" {print $$1}') UIMAGE_ENTRYADDR = $(shell $(NM) vmlinux | awk '$$NF == "_start" {print $$1}') UIMAGE_COMPRESSION = gzip OBJCOPYFLAGS_vmlinux.bin := -O binary targets += vmlinux.bin vmlinux.gz vmImage $(obj)/vmlinux.bin: vmlinux FORCE $(call if_changed,objcopy) $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE $(call if_changed,gzip) $(obj)/vmImage: $(obj)/vmlinux.gz FORCE $(call if_changed,uimage) @$(kecho) 'Kernel: $@ is ready' $(obj)/zImage: $(obj)/compressed/vmlinux FORCE $(call if_changed,objcopy) @$(kecho) 'Kernel: $@ is ready' $(obj)/compressed/vmlinux: $(obj)/vmlinux.gz FORCE $(Q)$(MAKE) $(build)=$(obj)/compressed $@ install: sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)" PK ! 3�/0� � boot/dts/Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0 obj-y := $(patsubst "%.dts",%.dtb.o,$(CONFIG_NIOS2_DTB_SOURCE)) dtstree := $(srctree)/$(src) dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) PK ! >�( ( Kbuildnu �[��� # SPDX-License-Identifier: GPL-2.0-only PK ! &0��~ ~ platform/Kconfig.platformnu �[��� # SPDX-License-Identifier: GPL-2.0-only menu "Platform options" comment "Memory settings" config NIOS2_MEM_BASE hex "Memory base address" default "0x00000000" help This is the physical address of the memory that the kernel will run from. This address is used to link the kernel and setup initial memory management. You should take the raw memory address without any MMU or cache bits set. Please not that this address is used directly so you have to manually do address translation if it's connected to a bridge. comment "Device tree" config NIOS2_DTB_AT_PHYS_ADDR bool "DTB at physical address" help When enabled you can select a physical address to load the dtb from. Normally this address is passed by a bootloader such as u-boot but using this you can use a devicetree without a bootloader. This way you can store a devicetree in NOR flash or an onchip rom. Please note that this address is used directly so you have to manually do address translation if it's connected to a bridge. Also take into account that when using an MMU you'd have to ad 0xC0000000 to your address config NIOS2_DTB_PHYS_ADDR hex "DTB Address" depends on NIOS2_DTB_AT_PHYS_ADDR default "0xC0000000" help Physical address of a dtb blob. config NIOS2_DTB_SOURCE_BOOL bool "Compile and link device tree into kernel image" depends on !COMPILE_TEST help This allows you to specify a dts (device tree source) file which will be compiled and linked into the kernel image. config NIOS2_DTB_SOURCE string "Device tree source file" depends on NIOS2_DTB_SOURCE_BOOL default "" help Absolute path to the device tree source (dts) file describing your system. comment "Nios II instructions" config NIOS2_ARCH_REVISION int "Select Nios II architecture revision" range 1 2 default 1 help Select between Nios II R1 and Nios II R2 . The architectures are binary incompatible. Default is R1 . config NIOS2_HW_MUL_SUPPORT bool "Enable MUL instruction" help Set to true if you configured the Nios II to include the MUL instruction. This will enable the -mhw-mul compiler flag. config NIOS2_HW_MULX_SUPPORT bool "Enable MULX instruction" help Set to true if you configured the Nios II to include the MULX instruction. Enables the -mhw-mulx compiler flag. config NIOS2_HW_DIV_SUPPORT bool "Enable DIV instruction" help Set to true if you configured the Nios II to include the DIV instruction. Enables the -mhw-div compiler flag. config NIOS2_BMX_SUPPORT bool "Enable BMX instructions" depends on NIOS2_ARCH_REVISION = 2 help Set to true if you configured the Nios II R2 to include the BMX Bit Manipulation Extension instructions. Enables the -mbmx compiler flag. config NIOS2_CDX_SUPPORT bool "Enable CDX instructions" depends on NIOS2_ARCH_REVISION = 2 help Set to true if you configured the Nios II R2 to include the CDX Bit Manipulation Extension instructions. Enables the -mcdx compiler flag. config NIOS2_FPU_SUPPORT bool "Custom floating point instr support" help Enables the -mcustom-fpu-cfg=60-1 compiler flag. config NIOS2_CI_SWAB_SUPPORT bool "Byteswap custom instruction" help Use the byteswap (endian converter) Nios II custom instruction provided by Altera and which can be enabled in QSYS builder. This accelerates endian conversions in the kernel (e.g. ntohs). config NIOS2_CI_SWAB_NO int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT default 0 help Number of the instruction as configured in QSYS Builder. comment "Cache settings" config CUSTOM_CACHE_SETTINGS bool "Custom cache settings" help This option allows you to tweak the cache settings used during early boot (where the information from device tree is not yet available). There should be no reason to change these values. Linux will work perfectly fine, even if the Nios II is configured with smaller caches. Say N here unless you know what you are doing. config NIOS2_DCACHE_SIZE hex "D-Cache size" if CUSTOM_CACHE_SETTINGS range 0x200 0x10000 default "0x800" help Maximum possible data cache size. config NIOS2_DCACHE_LINE_SIZE hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS range 0x10 0x20 default "0x20" help Minimum possible data cache line size. config NIOS2_ICACHE_SIZE hex "I-Cache size" if CUSTOM_CACHE_SETTINGS range 0x200 0x10000 default "0x1000" help Maximum possible instruction cache size. endmenu PK ! ����< < platform/Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0-only obj-y += platform.o PK ! ���� � lib/Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0-only # # Makefile for Nios2-specific library files. # lib-y += delay.o lib-y += memcpy.o lib-y += memmove.o lib-y += memset.o PK ! V̟� � Kconfig.debugnu �[��� # SPDX-License-Identifier: GPL-2.0 config EARLY_PRINTK bool "Activate early kernel debugging" default y depends on TTY select SERIAL_CORE_CONSOLE help Enable early printk on console. This is useful for kernel debugging when your machine crashes very early before the console code is initialized. You should normally say N here, unless you want to debug such a crash. PK ! 'ֻe e Kconfignu �[��� # SPDX-License-Identifier: GPL-2.0 config NIOS2 def_bool y select ARCH_32BIT_OFF_T select ARCH_HAS_DMA_PREP_COHERENT select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_HAS_DMA_SET_UNCACHED select ARCH_NO_SWAP select COMMON_CLK select TIMER_OF select GENERIC_ATOMIC64 select GENERIC_CPU_DEVICES select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_KGDB select IRQ_DOMAIN select MODULES_USE_ELF_RELA select OF select OF_EARLY_FLATTREE select SOC_BUS select SPARSE_IRQ select USB_ARCH_HAS_HCD if USB_SUPPORT select CPU_NO_EFFICIENT_FFS select MMU_GATHER_NO_RANGE if MMU select SET_FS config GENERIC_CSUM def_bool y config GENERIC_HWEIGHT def_bool y config GENERIC_CALIBRATE_DELAY def_bool y config NO_IOPORT_MAP def_bool y config FPU def_bool n menu "Kernel features" source "kernel/Kconfig.hz" config FORCE_MAX_ZONEORDER int "Maximum zone order" range 9 20 default "11" help The kernel memory allocator divides physically contiguous memory blocks into "zones", where each zone is a power of two number of pages. This option selects the largest power of two that the kernel keeps in the memory allocator. If you need to allocate very large blocks of physically contiguous memory, then you may need to increase this value. This config option is actually maximum order plus one. For example, a value of 11 means that the largest free memory block is 2^10 pages. endmenu source "arch/nios2/platform/Kconfig.platform" menu "Processor type and features" config MMU def_bool y config NR_CPUS int default "1" config NIOS2_ALIGNMENT_TRAP bool "Catch alignment trap" default y help Nios II CPUs cannot fetch/store data which is not bus aligned, i.e., a 2 or 4 byte fetch must start at an address divisible by 2 or 4. Any non-aligned load/store instructions will be trapped and emulated in software if you say Y here, which has a performance impact. comment "Boot options" config CMDLINE_BOOL bool "Default bootloader kernel arguments" default y config CMDLINE string "Default kernel command string" default "" depends on CMDLINE_BOOL help On some platforms, there is currently no way for the boot loader to pass arguments to the kernel. For these platforms, you can supply some command-line options at build time by entering them here. In other cases you can specify kernel args so that you don't have to set them up in board prom initialization routines. config CMDLINE_FORCE bool "Force default kernel command string" depends on CMDLINE_BOOL help Set this to have arguments from the default kernel command string override those passed by the boot loader. config NIOS2_CMDLINE_IGNORE_DTB bool "Ignore kernel command string from DTB" depends on CMDLINE_BOOL depends on !CMDLINE_FORCE default y help Set this to ignore the bootargs property from the devicetree's chosen node and fall back to CMDLINE if nothing is passed. config NIOS2_PASS_CMDLINE bool "Passed kernel command line from u-boot" help Use bootargs env variable from u-boot for kernel command line. will override "Default kernel command string". Say N if you are unsure. config NIOS2_BOOT_LINK_OFFSET hex "Link address offset for booting" default "0x00500000" help This option allows you to set the link address offset of the zImage. This can be useful if you are on a board which has a small amount of memory. endmenu menu "Advanced setup" config ADVANCED_OPTIONS bool "Prompt for advanced kernel configuration options" comment "Default settings for advanced configuration options are used" depends on !ADVANCED_OPTIONS config NIOS2_KERNEL_MMU_REGION_BASE_BOOL bool "Set custom kernel MMU region base address" depends on ADVANCED_OPTIONS help This option allows you to set the virtual address of the kernel MMU region. Say N here unless you know what you are doing. config NIOS2_KERNEL_MMU_REGION_BASE hex "Virtual base address of the kernel MMU region " if NIOS2_KERNEL_MMU_REGION_BASE_BOOL default "0x80000000" help This option allows you to set the virtual base address of the kernel MMU region. config NIOS2_KERNEL_REGION_BASE_BOOL bool "Set custom kernel region base address" depends on ADVANCED_OPTIONS help This option allows you to set the virtual address of the kernel region. Say N here unless you know what you are doing. config NIOS2_KERNEL_REGION_BASE hex "Virtual base address of the kernel region " if NIOS2_KERNEL_REGION_BASE_BOOL default "0xc0000000" config NIOS2_IO_REGION_BASE_BOOL bool "Set custom I/O region base address" depends on ADVANCED_OPTIONS help This option allows you to set the virtual address of the I/O region. Say N here unless you know what you are doing. config NIOS2_IO_REGION_BASE hex "Virtual base address of the I/O region" if NIOS2_IO_REGION_BASE_BOOL default "0xe0000000" endmenu PK ! �&f$u u Makefilenu �[��� # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive # for more details. # # Copyright (C) 2013 Altera Corporation # Copyright (C) 1994, 95, 96, 2003 by Wind River Systems # Written by Fredrik Markstrom # # This file is included by the global makefile so that you can add your own # architecture-specific flags and dependencies. Remember to do have actions # for "archclean" cleaning up for this architecture. # # Nios2 port by Wind River Systems Inc trough: # fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com KBUILD_DEFCONFIG := 3c120_defconfig UTS_SYSNAME = Linux export MMU LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) $(KCFLAGS) -print-libgcc-file-name) KBUILD_AFLAGS += -march=r$(CONFIG_NIOS2_ARCH_REVISION) KBUILD_CFLAGS += -pipe -D__linux__ -D__ELF__ KBUILD_CFLAGS += -march=r$(CONFIG_NIOS2_ARCH_REVISION) KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_HW_MUL_SUPPORT),-mhw-mul,-mno-hw-mul) KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_HW_MULX_SUPPORT),-mhw-mulx,-mno-hw-mulx) KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_HW_DIV_SUPPORT),-mhw-div,-mno-hw-div) KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_BMX_SUPPORT),-mbmx,-mno-bmx) KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_CDX_SUPPORT),-mcdx,-mno-cdx) KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_FPU_SUPPORT),-mcustom-fpu-cfg=60-1,) KBUILD_CFLAGS += -fno-optimize-sibling-calls KBUILD_CFLAGS += -DUTS_SYSNAME=\"$(UTS_SYSNAME)\" KBUILD_CFLAGS += -fno-builtin KBUILD_CFLAGS += -G 0 head-y := arch/nios2/kernel/head.o libs-y += arch/nios2/lib/ $(LIBGCC) core-y += arch/nios2/kernel/ arch/nios2/mm/ core-y += arch/nios2/platform/ INSTALL_PATH ?= /tftpboot nios2-boot := arch/$(ARCH)/boot BOOT_TARGETS = vmImage zImage PHONY += $(BOOT_TARGETS) install KBUILD_IMAGE := $(nios2-boot)/vmImage core-y += $(nios2-boot)/dts/ all: vmImage archclean: $(Q)$(MAKE) $(clean)=$(nios2-boot) $(BOOT_TARGETS): vmlinux $(Q)$(MAKE) $(build)=$(nios2-boot) $(nios2-boot)/$@ install: $(Q)$(MAKE) $(build)=$(nios2-boot) BOOTIMAGE=$(KBUILD_IMAGE) install define archhelp echo '* vmImage - Kernel-only image for U-Boot ($(KBUILD_IMAGE))' echo ' install - Install kernel using' echo ' (your) ~/bin/$(INSTALLKERNEL) or' echo ' (distribution) /sbin/$(INSTALLKERNEL) or' echo ' install to $$(INSTALL_PATH)' endef PK ! ��� ' ' mm/Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0 # # Makefile for the Nios2-specific parts of the memory manager. # obj-y += cacheflush.o obj-y += dma-mapping.o obj-y += extable.o obj-y += fault.o obj-y += init.o obj-y += ioremap.o obj-y += mmu_context.o obj-y += pgtable.o obj-y += tlb.o obj-y += uaccess.o PK ! L�w�� � kernel/Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0 # # Makefile for the nios2 linux kernel. # extra-y += head.o extra-y += vmlinux.lds obj-y += cpuinfo.o obj-y += entry.o obj-y += insnemu.o obj-y += irq.o obj-y += nios2_ksyms.o obj-y += process.o obj-y += prom.o obj-y += ptrace.o obj-y += setup.o obj-y += signal.o obj-y += sys_nios2.o obj-y += syscall_table.o obj-y += time.o obj-y += traps.o obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_NIOS2_ALIGNMENT_TRAP) += misaligned.o PK ! ��}�? ? include/uapi/asm/unistd.hnu �[��� PK ! :� ; ; � include/uapi/asm/Kbuildnu �[��� PK ! � ��u u include/uapi/asm/signal.hnu �[��� PK ! ]C� � include/uapi/asm/ptrace.hnu �[��� PK ! k�� % include/uapi/asm/byteorder.hnu �[��� PK ! W�m�l l � include/uapi/asm/sigcontext.hnu �[��� PK ! ��)� � J include/uapi/asm/swab.hnu �[��� PK ! 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