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PK ! ]�+� ioremap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/asm-mips/mach-tx49xx/ioremap.h */ #ifndef __ASM_MACH_TX49XX_IOREMAP_H #define __ASM_MACH_TX49XX_IOREMAP_H #include <linux/types.h> static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, unsigned long flags) { #ifdef CONFIG_64BIT #define TXX9_DIRECTMAP_BASE 0xfff000000ul #else #define TXX9_DIRECTMAP_BASE 0xff000000ul #endif if (offset >= TXX9_DIRECTMAP_BASE && offset < TXX9_DIRECTMAP_BASE + 0x400000) return (void __iomem *)(unsigned long)(int)offset; return NULL; } static inline int plat_iounmap(const volatile void __iomem *addr) { return (unsigned long)addr >= (unsigned long)(int)(TXX9_DIRECTMAP_BASE & 0xffffffff); } #endif /* __ASM_MACH_TX49XX_IOREMAP_H */ PK ! �,�ê � cpu-feature-overrides.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H #define __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H #define cpu_has_llsc 1 #define cpu_has_64bits 1 #define cpu_has_inclusive_pcaches 0 #define cpu_has_mips16 0 #define cpu_has_mips16e2 0 #define cpu_has_mdmx 0 #define cpu_has_mips3d 0 #define cpu_has_smartmips 0 #define cpu_has_vtag_icache 0 #define cpu_has_ic_fills_f_dc 0 #define cpu_has_dsp 0 #define cpu_has_dsp2 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r2 0 #define cpu_has_mips64r1 0 #define cpu_has_mips64r2 0 #endif /* __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H */ PK ! �e�*� � kmalloc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_MACH_TX49XX_KMALLOC_H #define __ASM_MACH_TX49XX_KMALLOC_H #define ARCH_DMA_MINALIGN L1_CACHE_BYTES #endif /* __ASM_MACH_TX49XX_KMALLOC_H */ PK ! ��o o mangle-port.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H #define __ASM_MACH_TX49XX_MANGLE_PORT_H #define __swizzle_addr_b(port) (port) #define __swizzle_addr_w(port) (port) #define __swizzle_addr_l(port) (port) #define __swizzle_addr_q(port) (port) #define ioswabb(a, x) (x) #define __mem_ioswabb(a, x) (x) #if defined(CONFIG_TOSHIBA_RBTX4939) && \ IS_ENABLED(CONFIG_SMC91X) && \ defined(__BIG_ENDIAN) #define NEEDS_TXX9_IOSWABW extern u16 (*ioswabw)(volatile u16 *a, u16 x); extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); #else #define ioswabw(a, x) le16_to_cpu((__force __le16)(x)) #define __mem_ioswabw(a, x) (x) #endif #define ioswabl(a, x) le32_to_cpu((__force __le32)(x)) #define __mem_ioswabl(a, x) (x) #define ioswabq(a, x) le64_to_cpu((__force __le64)(x)) #define __mem_ioswabq(a, x) (x) #endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */ PK ! �/� spaces.hnu �[��� /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle * Copyright (C) 2000, 2002 Maciej W. Rozycki * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. */ #ifndef _ASM_TX49XX_SPACES_H #define _ASM_TX49XX_SPACES_H #define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000) #include <asm/mach-generic/spaces.h> #endif /* __ASM_TX49XX_SPACES_H */ PK ! ]�+� ioremap.hnu �[��� PK ! �,�ê � = cpu-feature-overrides.hnu �[��� PK ! �e�*� � . kmalloc.hnu �[��� PK ! ��o o * mangle-port.hnu �[��� PK ! �/� � spaces.hnu �[��� PK ~ &
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