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PK ! ��]� � rbtree.pynu �[��� # SPDX-License-Identifier: GPL-2.0 # # Copyright 2019 Google LLC. import gdb from linux import utils rb_root_type = utils.CachedType("struct rb_root") rb_node_type = utils.CachedType("struct rb_node") def rb_first(root): if root.type == rb_root_type.get_type(): node = root.address.cast(rb_root_type.get_type().pointer()) elif root.type != rb_root_type.get_type().pointer(): raise gdb.GdbError("Must be struct rb_root not {}".format(root.type)) node = root['rb_node'] if node == 0: return None while node['rb_left']: node = node['rb_left'] return node def rb_last(root): if root.type == rb_root_type.get_type(): node = root.address.cast(rb_root_type.get_type().pointer()) elif root.type != rb_root_type.get_type().pointer(): raise gdb.GdbError("Must be struct rb_root not {}".format(root.type)) node = root['rb_node'] if node == 0: return None while node['rb_right']: node = node['rb_right'] return node def rb_parent(node): parent = gdb.Value(node['__rb_parent_color'] & ~3) return parent.cast(rb_node_type.get_type().pointer()) def rb_empty_node(node): return node['__rb_parent_color'] == node.address def rb_next(node): if node.type == rb_node_type.get_type(): node = node.address.cast(rb_node_type.get_type().pointer()) elif node.type != rb_node_type.get_type().pointer(): raise gdb.GdbError("Must be struct rb_node not {}".format(node.type)) if rb_empty_node(node): return None if node['rb_right']: node = node['rb_right'] while node['rb_left']: node = node['rb_left'] return node parent = rb_parent(node) while parent and node == parent['rb_right']: node = parent parent = rb_parent(node) return parent def rb_prev(node): if node.type == rb_node_type.get_type(): node = node.address.cast(rb_node_type.get_type().pointer()) elif node.type != rb_node_type.get_type().pointer(): raise gdb.GdbError("Must be struct rb_node not {}".format(node.type)) if rb_empty_node(node): return None if node['rb_left']: node = node['rb_left'] while node['rb_right']: node = node['rb_right'] return node.dereference() parent = rb_parent(node) while parent and node == parent['rb_left'].dereference(): node = parent parent = rb_parent(node) return parent class LxRbFirst(gdb.Function): """Lookup and return a node from an RBTree $lx_rb_first(root): Return the node at the given index. If index is omitted, the root node is dereferenced and returned.""" def __init__(self): super(LxRbFirst, self).__init__("lx_rb_first") def invoke(self, root): result = rb_first(root) if result is None: raise gdb.GdbError("No entry in tree") return result LxRbFirst() class LxRbLast(gdb.Function): """Lookup and return a node from an RBTree. $lx_rb_last(root): Return the node at the given index. If index is omitted, the root node is dereferenced and returned.""" def __init__(self): super(LxRbLast, self).__init__("lx_rb_last") def invoke(self, root): result = rb_last(root) if result is None: raise gdb.GdbError("No entry in tree") return result LxRbLast() class LxRbNext(gdb.Function): """Lookup and return a node from an RBTree. $lx_rb_next(node): Return the node at the given index. If index is omitted, the root node is dereferenced and returned.""" def __init__(self): super(LxRbNext, self).__init__("lx_rb_next") def invoke(self, node): result = rb_next(node) if result is None: raise gdb.GdbError("No entry in tree") return result LxRbNext() class LxRbPrev(gdb.Function): """Lookup and return a node from an RBTree. $lx_rb_prev(node): Return the node at the given index. If index is omitted, the root node is dereferenced and returned.""" def __init__(self): super(LxRbPrev, self).__init__("lx_rb_prev") def invoke(self, node): result = rb_prev(node) if result is None: raise gdb.GdbError("No entry in tree") return result LxRbPrev() PK ! �& �1 1 config.pynu �[��� # SPDX-License-Identifier: GPL-2.0 # # Copyright 2019 Google LLC. import gdb import zlib from linux import utils class LxConfigDump(gdb.Command): """Output kernel config to the filename specified as the command argument. Equivalent to 'zcat /proc/config.gz > config.txt' on a running target""" def __init__(self): super(LxConfigDump, self).__init__("lx-configdump", gdb.COMMAND_DATA, gdb.COMPLETE_FILENAME) def invoke(self, arg, from_tty): if len(arg) == 0: filename = "config.txt" else: filename = arg try: py_config_ptr = gdb.parse_and_eval("&kernel_config_data") py_config_ptr_end = gdb.parse_and_eval("&kernel_config_data_end") py_config_size = py_config_ptr_end - py_config_ptr except gdb.error as e: raise gdb.GdbError("Can't find config, enable CONFIG_IKCONFIG?") inf = gdb.inferiors()[0] zconfig_buf = utils.read_memoryview(inf, py_config_ptr, py_config_size).tobytes() config_buf = zlib.decompress(zconfig_buf, 16) with open(filename, 'wb') as f: f.write(config_buf) gdb.write("Dumped config to " + filename + "\n") LxConfigDump() PK ! :.�P P utils.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # common utilities # # Copyright (c) Siemens AG, 2011-2013 # # Authors: # Jan Kiszka <jan.kiszka@siemens.com> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb class CachedType: def __init__(self, name): self._type = None self._name = name def _new_objfile_handler(self, event): self._type = None gdb.events.new_objfile.disconnect(self._new_objfile_handler) def get_type(self): if self._type is None: self._type = gdb.lookup_type(self._name) if self._type is None: raise gdb.GdbError( "cannot resolve type '{0}'".format(self._name)) if hasattr(gdb, 'events') and hasattr(gdb.events, 'new_objfile'): gdb.events.new_objfile.connect(self._new_objfile_handler) return self._type long_type = CachedType("long") atomic_long_type = CachedType("atomic_long_t") def get_long_type(): global long_type return long_type.get_type() def offset_of(typeobj, field): element = gdb.Value(0).cast(typeobj) return int(str(element[field].address).split()[0], 16) def container_of(ptr, typeobj, member): return (ptr.cast(get_long_type()) - offset_of(typeobj, member)).cast(typeobj) class ContainerOf(gdb.Function): """Return pointer to containing data structure. $container_of(PTR, "TYPE", "ELEMENT"): Given PTR, return a pointer to the data structure of the type TYPE in which PTR is the address of ELEMENT. Note that TYPE and ELEMENT have to be quoted as strings.""" def __init__(self): super(ContainerOf, self).__init__("container_of") def invoke(self, ptr, typename, elementname): return container_of(ptr, gdb.lookup_type(typename.string()).pointer(), elementname.string()) ContainerOf() BIG_ENDIAN = 0 LITTLE_ENDIAN = 1 target_endianness = None def get_target_endianness(): global target_endianness if target_endianness is None: endian = gdb.execute("show endian", to_string=True) if "little endian" in endian: target_endianness = LITTLE_ENDIAN elif "big endian" in endian: target_endianness = BIG_ENDIAN else: raise gdb.GdbError("unknown endianness '{0}'".format(str(endian))) return target_endianness def read_memoryview(inf, start, length): m = inf.read_memory(start, length) if type(m) is memoryview: return m return memoryview(m) def read_u16(buffer, offset): buffer_val = buffer[offset:offset + 2] value = [0, 0] if type(buffer_val[0]) is str: value[0] = ord(buffer_val[0]) value[1] = ord(buffer_val[1]) else: value[0] = buffer_val[0] value[1] = buffer_val[1] if get_target_endianness() == LITTLE_ENDIAN: return value[0] + (value[1] << 8) else: return value[1] + (value[0] << 8) def read_u32(buffer, offset): if get_target_endianness() == LITTLE_ENDIAN: return read_u16(buffer, offset) + (read_u16(buffer, offset + 2) << 16) else: return read_u16(buffer, offset + 2) + (read_u16(buffer, offset) << 16) def read_u64(buffer, offset): if get_target_endianness() == LITTLE_ENDIAN: return read_u32(buffer, offset) + (read_u32(buffer, offset + 4) << 32) else: return read_u32(buffer, offset + 4) + (read_u32(buffer, offset) << 32) def read_ulong(buffer, offset): if get_long_type().sizeof == 8: return read_u64(buffer, offset) else: return read_u32(buffer, offset) atomic_long_counter_offset = atomic_long_type.get_type()['counter'].bitpos atomic_long_counter_sizeof = atomic_long_type.get_type()['counter'].type.sizeof def read_atomic_long(buffer, offset): global atomic_long_counter_offset global atomic_long_counter_sizeof if atomic_long_counter_sizeof == 8: return read_u64(buffer, offset + atomic_long_counter_offset) else: return read_u32(buffer, offset + atomic_long_counter_offset) target_arch = None def is_target_arch(arch): if hasattr(gdb.Frame, 'architecture'): return arch in gdb.newest_frame().architecture().name() else: global target_arch if target_arch is None: target_arch = gdb.execute("show architecture", to_string=True) return arch in target_arch GDBSERVER_QEMU = 0 GDBSERVER_KGDB = 1 gdbserver_type = None def get_gdbserver_type(): def exit_handler(event): global gdbserver_type gdbserver_type = None gdb.events.exited.disconnect(exit_handler) def probe_qemu(): try: return gdb.execute("monitor info version", to_string=True) != "" except gdb.error: return False def probe_kgdb(): try: thread_info = gdb.execute("info thread 2", to_string=True) return "shadowCPU0" in thread_info except gdb.error: return False global gdbserver_type if gdbserver_type is None: if probe_qemu(): gdbserver_type = GDBSERVER_QEMU elif probe_kgdb(): gdbserver_type = GDBSERVER_KGDB if gdbserver_type is not None and hasattr(gdb, 'events'): gdb.events.exited.connect(exit_handler) return gdbserver_type def gdb_eval_or_none(expresssion): try: return gdb.parse_and_eval(expresssion) except gdb.error: return None def dentry_name(d): parent = d['d_parent'] if parent == d or parent == 0: return "" p = dentry_name(d['d_parent']) + "/" return p + d['d_iname'].string() PK ! ��g� � device.pynu �[��� # SPDX-License-Identifier: GPL-2.0 # # Copyright (c) NXP 2019 import gdb from linux.utils import CachedType from linux.utils import container_of from linux.lists import list_for_each_entry device_private_type = CachedType('struct device_private') device_type = CachedType('struct device') subsys_private_type = CachedType('struct subsys_private') kobject_type = CachedType('struct kobject') kset_type = CachedType('struct kset') bus_type = CachedType('struct bus_type') class_type = CachedType('struct class') def dev_name(dev): dev_init_name = dev['init_name'] if dev_init_name: return dev_init_name.string() return dev['kobj']['name'].string() def kset_for_each_object(kset): return list_for_each_entry(kset['list'], kobject_type.get_type().pointer(), "entry") def for_each_bus(): for kobj in kset_for_each_object(gdb.parse_and_eval('bus_kset')): subsys = container_of(kobj, kset_type.get_type().pointer(), 'kobj') subsys_priv = container_of(subsys, subsys_private_type.get_type().pointer(), 'subsys') yield subsys_priv['bus'] def for_each_class(): for kobj in kset_for_each_object(gdb.parse_and_eval('class_kset')): subsys = container_of(kobj, kset_type.get_type().pointer(), 'kobj') subsys_priv = container_of(subsys, subsys_private_type.get_type().pointer(), 'subsys') yield subsys_priv['class'] def get_bus_by_name(name): for item in for_each_bus(): if item['name'].string() == name: return item raise gdb.GdbError("Can't find bus type {!r}".format(name)) def get_class_by_name(name): for item in for_each_class(): if item['name'].string() == name: return item raise gdb.GdbError("Can't find device class {!r}".format(name)) klist_type = CachedType('struct klist') klist_node_type = CachedType('struct klist_node') def klist_for_each(klist): return list_for_each_entry(klist['k_list'], klist_node_type.get_type().pointer(), 'n_node') def bus_for_each_device(bus): for kn in klist_for_each(bus['p']['klist_devices']): dp = container_of(kn, device_private_type.get_type().pointer(), 'knode_bus') yield dp['device'] def class_for_each_device(cls): for kn in klist_for_each(cls['p']['klist_devices']): dp = container_of(kn, device_private_type.get_type().pointer(), 'knode_class') yield dp['device'] def device_for_each_child(dev): for kn in klist_for_each(dev['p']['klist_children']): dp = container_of(kn, device_private_type.get_type().pointer(), 'knode_parent') yield dp['device'] def _show_device(dev, level=0, recursive=False): gdb.write('{}dev {}:\t{}\n'.format('\t' * level, dev_name(dev), dev)) if recursive: for child in device_for_each_child(dev): _show_device(child, level + 1, recursive) class LxDeviceListBus(gdb.Command): '''Print devices on a bus (or all buses if not specified)''' def __init__(self): super(LxDeviceListBus, self).__init__('lx-device-list-bus', gdb.COMMAND_DATA) def invoke(self, arg, from_tty): if not arg: for bus in for_each_bus(): gdb.write('bus {}:\t{}\n'.format(bus['name'].string(), bus)) for dev in bus_for_each_device(bus): _show_device(dev, level=1) else: bus = get_bus_by_name(arg) if not bus: raise gdb.GdbError("Can't find bus {!r}".format(arg)) for dev in bus_for_each_device(bus): _show_device(dev) class LxDeviceListClass(gdb.Command): '''Print devices in a class (or all classes if not specified)''' def __init__(self): super(LxDeviceListClass, self).__init__('lx-device-list-class', gdb.COMMAND_DATA) def invoke(self, arg, from_tty): if not arg: for cls in for_each_class(): gdb.write("class {}:\t{}\n".format(cls['name'].string(), cls)) for dev in class_for_each_device(cls): _show_device(dev, level=1) else: cls = get_class_by_name(arg) for dev in class_for_each_device(cls): _show_device(dev) class LxDeviceListTree(gdb.Command): '''Print a device and its children recursively''' def __init__(self): super(LxDeviceListTree, self).__init__('lx-device-list-tree', gdb.COMMAND_DATA) def invoke(self, arg, from_tty): if not arg: raise gdb.GdbError('Please provide pointer to struct device') dev = gdb.parse_and_eval(arg) if dev.type != device_type.get_type().pointer(): raise gdb.GdbError('Please provide pointer to struct device') _show_device(dev, level=0, recursive=True) class LxDeviceFindByBusName(gdb.Function): '''Find struct device by bus and name (both strings)''' def __init__(self): super(LxDeviceFindByBusName, self).__init__('lx_device_find_by_bus_name') def invoke(self, bus, name): name = name.string() bus = get_bus_by_name(bus.string()) for dev in bus_for_each_device(bus): if dev_name(dev) == name: return dev class LxDeviceFindByClassName(gdb.Function): '''Find struct device by class and name (both strings)''' def __init__(self): super(LxDeviceFindByClassName, self).__init__('lx_device_find_by_class_name') def invoke(self, cls, name): name = name.string() cls = get_class_by_name(cls.string()) for dev in class_for_each_device(cls): if dev_name(dev) == name: return dev LxDeviceListBus() LxDeviceListClass() LxDeviceListTree() LxDeviceFindByBusName() LxDeviceFindByClassName() PK ! ]��� � lists.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # list tools # # Copyright (c) Thiebaud Weksteen, 2015 # # Authors: # Thiebaud Weksteen <thiebaud@weksteen.fr> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb from linux import utils list_head = utils.CachedType("struct list_head") hlist_head = utils.CachedType("struct hlist_head") hlist_node = utils.CachedType("struct hlist_node") def list_for_each(head): if head.type == list_head.get_type().pointer(): head = head.dereference() elif head.type != list_head.get_type(): raise TypeError("Must be struct list_head not {}" .format(head.type)) if head['next'] == 0: gdb.write("list_for_each: Uninitialized list '{}' treated as empty\n" .format(head.address)) return node = head['next'].dereference() while node.address != head.address: yield node.address node = node['next'].dereference() def list_for_each_entry(head, gdbtype, member): for node in list_for_each(head): yield utils.container_of(node, gdbtype, member) def hlist_for_each(head): if head.type == hlist_head.get_type().pointer(): head = head.dereference() elif head.type != hlist_head.get_type(): raise TypeError("Must be struct hlist_head not {}" .format(head.type)) node = head['first'].dereference() while node.address: yield node.address node = node['next'].dereference() def hlist_for_each_entry(head, gdbtype, member): for node in hlist_for_each(head): yield utils.container_of(node, gdbtype, member) def list_check(head): nb = 0 if (head.type == list_head.get_type().pointer()): head = head.dereference() elif (head.type != list_head.get_type()): raise gdb.GdbError('argument must be of type (struct list_head [*])') c = head try: gdb.write("Starting with: {}\n".format(c)) except gdb.MemoryError: gdb.write('head is not accessible\n') return while True: p = c['prev'].dereference() n = c['next'].dereference() try: if p['next'] != c.address: gdb.write('prev.next != current: ' 'current@{current_addr}={current} ' 'prev@{p_addr}={p}\n'.format( current_addr=c.address, current=c, p_addr=p.address, p=p, )) return except gdb.MemoryError: gdb.write('prev is not accessible: ' 'current@{current_addr}={current}\n'.format( current_addr=c.address, current=c )) return try: if n['prev'] != c.address: gdb.write('next.prev != current: ' 'current@{current_addr}={current} ' 'next@{n_addr}={n}\n'.format( current_addr=c.address, current=c, n_addr=n.address, n=n, )) return except gdb.MemoryError: gdb.write('next is not accessible: ' 'current@{current_addr}={current}\n'.format( current_addr=c.address, current=c )) return c = n nb += 1 if c == head: gdb.write("list is consistent: {} node(s)\n".format(nb)) return class LxListChk(gdb.Command): """Verify a list consistency""" def __init__(self): super(LxListChk, self).__init__("lx-list-check", gdb.COMMAND_DATA, gdb.COMPLETE_EXPRESSION) def invoke(self, arg, from_tty): argv = gdb.string_to_argv(arg) if len(argv) != 1: raise gdb.GdbError("lx-list-check takes one argument") list_check(gdb.parse_and_eval(argv[0])) LxListChk() PK ! �-��< < constants.py.innu �[��� /* * gdb helper commands and functions for Linux kernel debugging * * Kernel constants derived from include files. * * Copyright (c) 2016 Linaro Ltd * * Authors: * Kieran Bingham <kieran.bingham@linaro.org> * * This work is licensed under the terms of the GNU GPL version 2. * */ #include <linux/clk-provider.h> #include <linux/fs.h> #include <linux/hrtimer.h> #include <linux/mount.h> #include <linux/of_fdt.h> #include <linux/threads.h> /* We need to stringify expanded macros so that they can be parsed */ #define STRING(x) #x #define XSTRING(x) STRING(x) #define LX_VALUE(x) LX_##x = x #define LX_GDBPARSED(x) LX_##x = gdb.parse_and_eval(XSTRING(x)) /* * IS_ENABLED generates (a || b) which is not compatible with python * We can only switch on configuration items we know are available * Therefore - IS_BUILTIN() is more appropriate */ #define LX_CONFIG(x) LX_##x = IS_BUILTIN(x) /* The build system will take care of deleting everything above this marker */ <!-- end-c-headers --> import gdb LX_CONFIG(CONFIG_DEBUG_INFO_REDUCED) /* linux/clk-provider.h */ if IS_BUILTIN(CONFIG_COMMON_CLK): LX_GDBPARSED(CLK_GET_RATE_NOCACHE) /* linux/fs.h */ LX_GDBPARSED(SB_RDONLY) LX_GDBPARSED(SB_SYNCHRONOUS) LX_GDBPARSED(SB_MANDLOCK) LX_GDBPARSED(SB_DIRSYNC) LX_GDBPARSED(SB_NOATIME) LX_GDBPARSED(SB_NODIRATIME) /* linux/htimer.h */ LX_GDBPARSED(hrtimer_resolution) /* linux/mount.h */ LX_VALUE(MNT_NOSUID) LX_VALUE(MNT_NODEV) LX_VALUE(MNT_NOEXEC) LX_VALUE(MNT_NOATIME) LX_VALUE(MNT_NODIRATIME) LX_VALUE(MNT_RELATIME) /* linux/threads.h */ LX_VALUE(NR_CPUS) /* linux/of_fdt.h> */ LX_VALUE(OF_DT_HEADER) /* Kernel Configs */ LX_CONFIG(CONFIG_GENERIC_CLOCKEVENTS) LX_CONFIG(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) LX_CONFIG(CONFIG_HIGH_RES_TIMERS) LX_CONFIG(CONFIG_NR_CPUS) LX_CONFIG(CONFIG_OF) LX_CONFIG(CONFIG_TICK_ONESHOT) PK ! 1�� � dmesg.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # kernel log buffer dump # # Copyright (c) Siemens AG, 2011, 2012 # # Authors: # Jan Kiszka <jan.kiszka@siemens.com> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb import sys from linux import utils printk_info_type = utils.CachedType("struct printk_info") prb_data_blk_lpos_type = utils.CachedType("struct prb_data_blk_lpos") prb_desc_type = utils.CachedType("struct prb_desc") prb_desc_ring_type = utils.CachedType("struct prb_desc_ring") prb_data_ring_type = utils.CachedType("struct prb_data_ring") printk_ringbuffer_type = utils.CachedType("struct printk_ringbuffer") class LxDmesg(gdb.Command): """Print Linux kernel log buffer.""" def __init__(self): super(LxDmesg, self).__init__("lx-dmesg", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): inf = gdb.inferiors()[0] # read in prb structure prb_addr = int(str(gdb.parse_and_eval("(void *)'printk.c'::prb")).split()[0], 16) sz = printk_ringbuffer_type.get_type().sizeof prb = utils.read_memoryview(inf, prb_addr, sz).tobytes() # read in descriptor ring structure off = printk_ringbuffer_type.get_type()['desc_ring'].bitpos // 8 addr = prb_addr + off sz = prb_desc_ring_type.get_type().sizeof desc_ring = utils.read_memoryview(inf, addr, sz).tobytes() # read in descriptor count, size, and address off = prb_desc_ring_type.get_type()['count_bits'].bitpos // 8 desc_ring_count = 1 << utils.read_u32(desc_ring, off) desc_sz = prb_desc_type.get_type().sizeof off = prb_desc_ring_type.get_type()['descs'].bitpos // 8 desc_addr = utils.read_ulong(desc_ring, off) # read in info size and address info_sz = printk_info_type.get_type().sizeof off = prb_desc_ring_type.get_type()['infos'].bitpos // 8 info_addr = utils.read_ulong(desc_ring, off) # read in text data ring structure off = printk_ringbuffer_type.get_type()['text_data_ring'].bitpos // 8 addr = prb_addr + off sz = prb_data_ring_type.get_type().sizeof text_data_ring = utils.read_memoryview(inf, addr, sz).tobytes() # read in text data size and address off = prb_data_ring_type.get_type()['size_bits'].bitpos // 8 text_data_sz = 1 << utils.read_u32(text_data_ring, off) off = prb_data_ring_type.get_type()['data'].bitpos // 8 text_data_addr = utils.read_ulong(text_data_ring, off) sv_off = prb_desc_type.get_type()['state_var'].bitpos // 8 off = prb_desc_type.get_type()['text_blk_lpos'].bitpos // 8 begin_off = off + (prb_data_blk_lpos_type.get_type()['begin'].bitpos // 8) next_off = off + (prb_data_blk_lpos_type.get_type()['next'].bitpos // 8) ts_off = printk_info_type.get_type()['ts_nsec'].bitpos // 8 len_off = printk_info_type.get_type()['text_len'].bitpos // 8 # definitions from kernel/printk/printk_ringbuffer.h desc_committed = 1 desc_finalized = 2 desc_sv_bits = utils.get_long_type().sizeof * 8 desc_flags_shift = desc_sv_bits - 2 desc_flags_mask = 3 << desc_flags_shift desc_id_mask = ~desc_flags_mask # read in tail and head descriptor ids off = prb_desc_ring_type.get_type()['tail_id'].bitpos // 8 tail_id = utils.read_atomic_long(desc_ring, off) off = prb_desc_ring_type.get_type()['head_id'].bitpos // 8 head_id = utils.read_atomic_long(desc_ring, off) did = tail_id while True: ind = did % desc_ring_count desc_off = desc_sz * ind info_off = info_sz * ind desc = utils.read_memoryview(inf, desc_addr + desc_off, desc_sz).tobytes() # skip non-committed record state = 3 & (utils.read_atomic_long(desc, sv_off) >> desc_flags_shift) if state != desc_committed and state != desc_finalized: if did == head_id: break did = (did + 1) & desc_id_mask continue begin = utils.read_ulong(desc, begin_off) % text_data_sz end = utils.read_ulong(desc, next_off) % text_data_sz info = utils.read_memoryview(inf, info_addr + info_off, info_sz).tobytes() # handle data-less record if begin & 1 == 1: text = "" else: # handle wrapping data block if begin > end: begin = 0 # skip over descriptor id text_start = begin + utils.get_long_type().sizeof text_len = utils.read_u16(info, len_off) # handle truncated message if end - text_start < text_len: text_len = end - text_start text_data = utils.read_memoryview(inf, text_data_addr + text_start, text_len).tobytes() text = text_data[0:text_len].decode(encoding='utf8', errors='replace') time_stamp = utils.read_u64(info, ts_off) for line in text.splitlines(): msg = u"[{time:12.6f}] {line}\n".format( time=time_stamp / 1000000000.0, line=line) # With python2 gdb.write will attempt to convert unicode to # ascii and might fail so pass an utf8-encoded str instead. if sys.hexversion < 0x03000000: msg = msg.encode(encoding='utf8', errors='replace') gdb.write(msg) if did == head_id: break did = (did + 1) & desc_id_mask LxDmesg() PK ! #�{XF F clk.pynu �[��� # SPDX-License-Identifier: GPL-2.0 # # Copyright (c) NXP 2019 import gdb import sys from linux import utils, lists, constants clk_core_type = utils.CachedType("struct clk_core") def clk_core_for_each_child(hlist_head): return lists.hlist_for_each_entry(hlist_head, clk_core_type.get_type().pointer(), "child_node") class LxClkSummary(gdb.Command): """Print clk tree summary Output is a subset of /sys/kernel/debug/clk/clk_summary No calls are made during printing, instead a (c) if printed after values which are cached and potentially out of date""" def __init__(self): super(LxClkSummary, self).__init__("lx-clk-summary", gdb.COMMAND_DATA) def show_subtree(self, clk, level): gdb.write("%*s%-*s %7d %8d %8d %11lu%s\n" % ( level * 3 + 1, "", 30 - level * 3, clk['name'].string(), clk['enable_count'], clk['prepare_count'], clk['protect_count'], clk['rate'], '(c)' if clk['flags'] & constants.LX_CLK_GET_RATE_NOCACHE else ' ')) for child in clk_core_for_each_child(clk['children']): self.show_subtree(child, level + 1) def invoke(self, arg, from_tty): if utils.gdb_eval_or_none("clk_root_list") is None: raise gdb.GdbError("No clocks registered") gdb.write(" enable prepare protect \n") gdb.write(" clock count count count rate \n") gdb.write("------------------------------------------------------------------------\n") for clk in clk_core_for_each_child(gdb.parse_and_eval("clk_root_list")): self.show_subtree(clk, 0) for clk in clk_core_for_each_child(gdb.parse_and_eval("clk_orphan_list")): self.show_subtree(clk, 0) LxClkSummary() class LxClkCoreLookup(gdb.Function): """Find struct clk_core by name""" def __init__(self): super(LxClkCoreLookup, self).__init__("lx_clk_core_lookup") def lookup_hlist(self, hlist_head, name): for child in clk_core_for_each_child(hlist_head): if child['name'].string() == name: return child result = self.lookup_hlist(child['children'], name) if result: return result def invoke(self, name): name = name.string() return (self.lookup_hlist(gdb.parse_and_eval("clk_root_list"), name) or self.lookup_hlist(gdb.parse_and_eval("clk_orphan_list"), name)) LxClkCoreLookup() PK ! ��O� � symbols.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # load kernel and module symbols # # Copyright (c) Siemens AG, 2011-2013 # # Authors: # Jan Kiszka <jan.kiszka@siemens.com> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb import os import re from linux import modules, utils if hasattr(gdb, 'Breakpoint'): class LoadModuleBreakpoint(gdb.Breakpoint): def __init__(self, spec, gdb_command): super(LoadModuleBreakpoint, self).__init__(spec, internal=True) self.silent = True self.gdb_command = gdb_command def stop(self): module = gdb.parse_and_eval("mod") module_name = module['name'].string() cmd = self.gdb_command # enforce update if object file is not found cmd.module_files_updated = False # Disable pagination while reporting symbol (re-)loading. # The console input is blocked in this context so that we would # get stuck waiting for the user to acknowledge paged output. show_pagination = gdb.execute("show pagination", to_string=True) pagination = show_pagination.endswith("on.\n") gdb.execute("set pagination off") if module_name in cmd.loaded_modules: gdb.write("refreshing all symbols to reload module " "'{0}'\n".format(module_name)) cmd.load_all_symbols() else: cmd.load_module_symbols(module) # restore pagination state gdb.execute("set pagination %s" % ("on" if pagination else "off")) return False class LxSymbols(gdb.Command): """(Re-)load symbols of Linux kernel and currently loaded modules. The kernel (vmlinux) is taken from the current working directly. Modules (.ko) are scanned recursively, starting in the same directory. Optionally, the module search path can be extended by a space separated list of paths passed to the lx-symbols command.""" module_paths = [] module_files = [] module_files_updated = False loaded_modules = [] breakpoint = None def __init__(self): super(LxSymbols, self).__init__("lx-symbols", gdb.COMMAND_FILES, gdb.COMPLETE_FILENAME) def _update_module_files(self): self.module_files = [] for path in self.module_paths: gdb.write("scanning for modules in {0}\n".format(path)) for root, dirs, files in os.walk(path): for name in files: if name.endswith(".ko") or name.endswith(".ko.debug"): self.module_files.append(root + "/" + name) self.module_files_updated = True def _get_module_file(self, module_name): module_pattern = ".*/{0}\.ko(?:.debug)?$".format( module_name.replace("_", r"[_\-]")) for name in self.module_files: if re.match(module_pattern, name) and os.path.exists(name): return name return None def _section_arguments(self, module): try: sect_attrs = module['sect_attrs'].dereference() except gdb.error: return "" attrs = sect_attrs['attrs'] section_name_to_address = { attrs[n]['battr']['attr']['name'].string(): attrs[n]['address'] for n in range(int(sect_attrs['nsections']))} args = [] for section_name in [".data", ".data..read_mostly", ".rodata", ".bss", ".text", ".text.hot", ".text.unlikely"]: address = section_name_to_address.get(section_name) if address: args.append(" -s {name} {addr}".format( name=section_name, addr=str(address))) return "".join(args) def load_module_symbols(self, module): module_name = module['name'].string() module_addr = str(module['core_layout']['base']).split()[0] module_file = self._get_module_file(module_name) if not module_file and not self.module_files_updated: self._update_module_files() module_file = self._get_module_file(module_name) if module_file: if utils.is_target_arch('s390'): # Module text is preceded by PLT stubs on s390. module_arch = module['arch'] plt_offset = int(module_arch['plt_offset']) plt_size = int(module_arch['plt_size']) module_addr = hex(int(module_addr, 0) + plt_offset + plt_size) gdb.write("loading @{addr}: {filename}\n".format( addr=module_addr, filename=module_file)) cmdline = "add-symbol-file {filename} {addr}{sections}".format( filename=module_file, addr=module_addr, sections=self._section_arguments(module)) gdb.execute(cmdline, to_string=True) if module_name not in self.loaded_modules: self.loaded_modules.append(module_name) else: gdb.write("no module object found for '{0}'\n".format(module_name)) def load_all_symbols(self): gdb.write("loading vmlinux\n") # Dropping symbols will disable all breakpoints. So save their states # and restore them afterward. saved_states = [] if hasattr(gdb, 'breakpoints') and not gdb.breakpoints() is None: for bp in gdb.breakpoints(): saved_states.append({'breakpoint': bp, 'enabled': bp.enabled}) # drop all current symbols and reload vmlinux orig_vmlinux = 'vmlinux' for obj in gdb.objfiles(): if obj.filename.endswith('vmlinux'): orig_vmlinux = obj.filename gdb.execute("symbol-file", to_string=True) gdb.execute("symbol-file {0}".format(orig_vmlinux)) self.loaded_modules = [] module_list = modules.module_list() if not module_list: gdb.write("no modules found\n") else: [self.load_module_symbols(module) for module in module_list] for saved_state in saved_states: saved_state['breakpoint'].enabled = saved_state['enabled'] def invoke(self, arg, from_tty): self.module_paths = [os.path.abspath(os.path.expanduser(p)) for p in arg.split()] self.module_paths.append(os.getcwd()) # enforce update self.module_files = [] self.module_files_updated = False self.load_all_symbols() if hasattr(gdb, 'Breakpoint'): if self.breakpoint is not None: self.breakpoint.delete() self.breakpoint = None self.breakpoint = LoadModuleBreakpoint( "kernel/module.c:do_init_module", self) else: gdb.write("Note: symbol update on module loading not supported " "with this gdb version\n") LxSymbols() PK ! �cg�% % modules.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # module tools # # Copyright (c) Siemens AG, 2013 # # Authors: # Jan Kiszka <jan.kiszka@siemens.com> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb from linux import cpus, utils, lists module_type = utils.CachedType("struct module") def module_list(): global module_type modules = utils.gdb_eval_or_none("modules") if modules is None: return module_ptr_type = module_type.get_type().pointer() for module in lists.list_for_each_entry(modules, module_ptr_type, "list"): yield module def find_module_by_name(name): for module in module_list(): if module['name'].string() == name: return module return None class LxModule(gdb.Function): """Find module by name and return the module variable. $lx_module("MODULE"): Given the name MODULE, iterate over all loaded modules of the target and return that module variable which MODULE matches.""" def __init__(self): super(LxModule, self).__init__("lx_module") def invoke(self, mod_name): mod_name = mod_name.string() module = find_module_by_name(mod_name) if module: return module.dereference() else: raise gdb.GdbError("Unable to find MODULE " + mod_name) LxModule() class LxLsmod(gdb.Command): """List currently loaded modules.""" _module_use_type = utils.CachedType("struct module_use") def __init__(self): super(LxLsmod, self).__init__("lx-lsmod", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): gdb.write( "Address{0} Module Size Used by\n".format( " " if utils.get_long_type().sizeof == 8 else "")) for module in module_list(): layout = module['core_layout'] gdb.write("{address} {name:<19} {size:>8} {ref}".format( address=str(layout['base']).split()[0], name=module['name'].string(), size=str(layout['size']), ref=str(module['refcnt']['counter'] - 1))) t = self._module_use_type.get_type().pointer() first = True sources = module['source_list'] for use in lists.list_for_each_entry(sources, t, "source_list"): gdb.write("{separator}{name}".format( separator=" " if first else ",", name=use['source']['name'].string())) first = False gdb.write("\n") LxLsmod() PK ! z%�z� � cpus.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # per-cpu tools # # Copyright (c) Siemens AG, 2011-2013 # # Authors: # Jan Kiszka <jan.kiszka@siemens.com> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb from linux import tasks, utils task_type = utils.CachedType("struct task_struct") MAX_CPUS = 4096 def get_current_cpu(): if utils.get_gdbserver_type() == utils.GDBSERVER_QEMU: return gdb.selected_thread().num - 1 elif utils.get_gdbserver_type() == utils.GDBSERVER_KGDB: tid = gdb.selected_thread().ptid[2] if tid > (0x100000000 - MAX_CPUS - 2): return 0x100000000 - tid - 2 else: return tasks.get_thread_info(tasks.get_task_by_pid(tid))['cpu'] else: raise gdb.GdbError("Sorry, obtaining the current CPU is not yet " "supported with this gdb server.") def per_cpu(var_ptr, cpu): if cpu == -1: cpu = get_current_cpu() if utils.is_target_arch("sparc:v9"): offset = gdb.parse_and_eval( "trap_block[{0}].__per_cpu_base".format(str(cpu))) else: try: offset = gdb.parse_and_eval( "__per_cpu_offset[{0}]".format(str(cpu))) except gdb.error: # !CONFIG_SMP case offset = 0 pointer = var_ptr.cast(utils.get_long_type()) + offset return pointer.cast(var_ptr.type).dereference() cpu_mask = {} def cpu_mask_invalidate(event): global cpu_mask cpu_mask = {} gdb.events.stop.disconnect(cpu_mask_invalidate) if hasattr(gdb.events, 'new_objfile'): gdb.events.new_objfile.disconnect(cpu_mask_invalidate) def cpu_list(mask_name): global cpu_mask mask = None if mask_name in cpu_mask: mask = cpu_mask[mask_name] if mask is None: mask = gdb.parse_and_eval(mask_name + ".bits") if hasattr(gdb, 'events'): cpu_mask[mask_name] = mask gdb.events.stop.connect(cpu_mask_invalidate) if hasattr(gdb.events, 'new_objfile'): gdb.events.new_objfile.connect(cpu_mask_invalidate) bits_per_entry = mask[0].type.sizeof * 8 num_entries = mask.type.sizeof * 8 / bits_per_entry entry = -1 bits = 0 while True: while bits == 0: entry += 1 if entry == num_entries: return bits = mask[entry] if bits != 0: bit = 0 break while bits & 1 == 0: bits >>= 1 bit += 1 cpu = entry * bits_per_entry + bit bits >>= 1 bit += 1 yield int(cpu) def each_online_cpu(): for cpu in cpu_list("__cpu_online_mask"): yield cpu def each_present_cpu(): for cpu in cpu_list("__cpu_present_mask"): yield cpu def each_possible_cpu(): for cpu in cpu_list("__cpu_possible_mask"): yield cpu def each_active_cpu(): for cpu in cpu_list("__cpu_active_mask"): yield cpu class LxCpus(gdb.Command): """List CPU status arrays Displays the known state of each CPU based on the kernel masks and can help identify the state of hotplugged CPUs""" def __init__(self): super(LxCpus, self).__init__("lx-cpus", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): gdb.write("Possible CPUs : {}\n".format(list(each_possible_cpu()))) gdb.write("Present CPUs : {}\n".format(list(each_present_cpu()))) gdb.write("Online CPUs : {}\n".format(list(each_online_cpu()))) gdb.write("Active CPUs : {}\n".format(list(each_active_cpu()))) LxCpus() class PerCpu(gdb.Function): """Return per-cpu variable. $lx_per_cpu("VAR"[, CPU]): Return the per-cpu variable called VAR for the given CPU number. If CPU is omitted, the CPU of the current context is used. Note that VAR has to be quoted as string.""" def __init__(self): super(PerCpu, self).__init__("lx_per_cpu") def invoke(self, var_name, cpu=-1): var_ptr = gdb.parse_and_eval("&" + var_name.string()) return per_cpu(var_ptr, cpu) PerCpu() def get_current_task(cpu): task_ptr_type = task_type.get_type().pointer() if utils.is_target_arch("x86"): var_ptr = gdb.parse_and_eval("¤t_task") return per_cpu(var_ptr, cpu).dereference() elif utils.is_target_arch("aarch64"): current_task_addr = gdb.parse_and_eval("$SP_EL0") if((current_task_addr >> 63) != 0): current_task = current_task_addr.cast(task_ptr_type) return current_task.dereference() else: raise gdb.GdbError("Sorry, obtaining the current task is not allowed " "while running in userspace(EL0)") else: raise gdb.GdbError("Sorry, obtaining the current task is not yet " "supported with this arch") class LxCurrentFunc(gdb.Function): """Return current task. $lx_current([CPU]): Return the per-cpu task variable for the given CPU number. If CPU is omitted, the CPU of the current context is used.""" def __init__(self): super(LxCurrentFunc, self).__init__("lx_current") def invoke(self, cpu=-1): return get_current_task(cpu) LxCurrentFunc() PK ! N��Z+" +" proc.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # Kernel proc information reader # # Copyright (c) 2016 Linaro Ltd # # Authors: # Kieran Bingham <kieran.bingham@linaro.org> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb from linux import constants from linux import utils from linux import tasks from linux import lists from struct import * class LxCmdLine(gdb.Command): """ Report the Linux Commandline used in the current kernel. Equivalent to cat /proc/cmdline on a running target""" def __init__(self): super(LxCmdLine, self).__init__("lx-cmdline", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): gdb.write(gdb.parse_and_eval("saved_command_line").string() + "\n") LxCmdLine() class LxVersion(gdb.Command): """ Report the Linux Version of the current kernel. Equivalent to cat /proc/version on a running target""" def __init__(self): super(LxVersion, self).__init__("lx-version", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): # linux_banner should contain a newline gdb.write(gdb.parse_and_eval("(char *)linux_banner").string()) LxVersion() # Resource Structure Printers # /proc/iomem # /proc/ioports def get_resources(resource, depth): while resource: yield resource, depth child = resource['child'] if child: for res, deep in get_resources(child, depth + 1): yield res, deep resource = resource['sibling'] def show_lx_resources(resource_str): resource = gdb.parse_and_eval(resource_str) width = 4 if resource['end'] < 0x10000 else 8 # Iterate straight to the first child for res, depth in get_resources(resource['child'], 0): start = int(res['start']) end = int(res['end']) gdb.write(" " * depth * 2 + "{0:0{1}x}-".format(start, width) + "{0:0{1}x} : ".format(end, width) + res['name'].string() + "\n") class LxIOMem(gdb.Command): """Identify the IO memory resource locations defined by the kernel Equivalent to cat /proc/iomem on a running target""" def __init__(self): super(LxIOMem, self).__init__("lx-iomem", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): return show_lx_resources("iomem_resource") LxIOMem() class LxIOPorts(gdb.Command): """Identify the IO port resource locations defined by the kernel Equivalent to cat /proc/ioports on a running target""" def __init__(self): super(LxIOPorts, self).__init__("lx-ioports", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): return show_lx_resources("ioport_resource") LxIOPorts() # Mount namespace viewer # /proc/mounts def info_opts(lst, opt): opts = "" for key, string in lst.items(): if opt & key: opts += string return opts FS_INFO = {constants.LX_SB_SYNCHRONOUS: ",sync", constants.LX_SB_MANDLOCK: ",mand", constants.LX_SB_DIRSYNC: ",dirsync", constants.LX_SB_NOATIME: ",noatime", constants.LX_SB_NODIRATIME: ",nodiratime"} MNT_INFO = {constants.LX_MNT_NOSUID: ",nosuid", constants.LX_MNT_NODEV: ",nodev", constants.LX_MNT_NOEXEC: ",noexec", constants.LX_MNT_NOATIME: ",noatime", constants.LX_MNT_NODIRATIME: ",nodiratime", constants.LX_MNT_RELATIME: ",relatime"} mount_type = utils.CachedType("struct mount") mount_ptr_type = mount_type.get_type().pointer() class LxMounts(gdb.Command): """Report the VFS mounts of the current process namespace. Equivalent to cat /proc/mounts on a running target An integer value can be supplied to display the mount values of that process namespace""" def __init__(self): super(LxMounts, self).__init__("lx-mounts", gdb.COMMAND_DATA) # Equivalent to proc_namespace.c:show_vfsmnt # However, that has the ability to call into s_op functions # whereas we cannot and must make do with the information we can obtain. def invoke(self, arg, from_tty): argv = gdb.string_to_argv(arg) if len(argv) >= 1: try: pid = int(argv[0]) except gdb.error: raise gdb.GdbError("Provide a PID as integer value") else: pid = 1 task = tasks.get_task_by_pid(pid) if not task: raise gdb.GdbError("Couldn't find a process with PID {}" .format(pid)) namespace = task['nsproxy']['mnt_ns'] if not namespace: raise gdb.GdbError("No namespace for current process") gdb.write("{:^18} {:^15} {:>9} {} {} options\n".format( "mount", "super_block", "devname", "pathname", "fstype")) for vfs in lists.list_for_each_entry(namespace['list'], mount_ptr_type, "mnt_list"): devname = vfs['mnt_devname'].string() devname = devname if devname else "none" pathname = "" parent = vfs while True: mntpoint = parent['mnt_mountpoint'] pathname = utils.dentry_name(mntpoint) + pathname if (parent == parent['mnt_parent']): break parent = parent['mnt_parent'] if (pathname == ""): pathname = "/" superblock = vfs['mnt']['mnt_sb'] fstype = superblock['s_type']['name'].string() s_flags = int(superblock['s_flags']) m_flags = int(vfs['mnt']['mnt_flags']) rd = "ro" if (s_flags & constants.LX_SB_RDONLY) else "rw" gdb.write("{} {} {} {} {} {}{}{} 0 0\n".format( vfs.format_string(), superblock.format_string(), devname, pathname, fstype, rd, info_opts(FS_INFO, s_flags), info_opts(MNT_INFO, m_flags))) LxMounts() class LxFdtDump(gdb.Command): """Output Flattened Device Tree header and dump FDT blob to the filename specified as the command argument. Equivalent to 'cat /proc/fdt > fdtdump.dtb' on a running target""" def __init__(self): super(LxFdtDump, self).__init__("lx-fdtdump", gdb.COMMAND_DATA, gdb.COMPLETE_FILENAME) def fdthdr_to_cpu(self, fdt_header): fdt_header_be = ">IIIIIII" fdt_header_le = "<IIIIIII" if utils.get_target_endianness() == 1: output_fmt = fdt_header_le else: output_fmt = fdt_header_be return unpack(output_fmt, pack(fdt_header_be, fdt_header['magic'], fdt_header['totalsize'], fdt_header['off_dt_struct'], fdt_header['off_dt_strings'], fdt_header['off_mem_rsvmap'], fdt_header['version'], fdt_header['last_comp_version'])) def invoke(self, arg, from_tty): if not constants.LX_CONFIG_OF: raise gdb.GdbError("Kernel not compiled with CONFIG_OF\n") if len(arg) == 0: filename = "fdtdump.dtb" else: filename = arg py_fdt_header_ptr = gdb.parse_and_eval( "(const struct fdt_header *) initial_boot_params") py_fdt_header = py_fdt_header_ptr.dereference() fdt_header = self.fdthdr_to_cpu(py_fdt_header) if fdt_header[0] != constants.LX_OF_DT_HEADER: raise gdb.GdbError("No flattened device tree magic found\n") gdb.write("fdt_magic: 0x{:02X}\n".format(fdt_header[0])) gdb.write("fdt_totalsize: 0x{:02X}\n".format(fdt_header[1])) gdb.write("off_dt_struct: 0x{:02X}\n".format(fdt_header[2])) gdb.write("off_dt_strings: 0x{:02X}\n".format(fdt_header[3])) gdb.write("off_mem_rsvmap: 0x{:02X}\n".format(fdt_header[4])) gdb.write("version: {}\n".format(fdt_header[5])) gdb.write("last_comp_version: {}\n".format(fdt_header[6])) inf = gdb.inferiors()[0] fdt_buf = utils.read_memoryview(inf, py_fdt_header_ptr, fdt_header[1]).tobytes() try: f = open(filename, 'wb') except gdb.error: raise gdb.GdbError("Could not open file to dump fdt") f.write(fdt_buf) f.close() gdb.write("Dumped fdt blob to " + filename + "\n") LxFdtDump() PK ! �Ì�7 7 __init__.pynu �[��� # nothing to do for the initialization of this package PK ! �� �h h timerlist.pynu �[��� # SPDX-License-Identifier: GPL-2.0 # # Copyright 2019 Google LLC. import binascii import gdb from linux import constants from linux import cpus from linux import rbtree from linux import utils timerqueue_node_type = utils.CachedType("struct timerqueue_node").get_type() hrtimer_type = utils.CachedType("struct hrtimer").get_type() def ktime_get(): """Returns the current time, but not very accurately We can't read the hardware timer itself to add any nanoseconds that need to be added since we last stored the time in the timekeeper. But this is probably good enough for debug purposes.""" tk_core = gdb.parse_and_eval("&tk_core") return tk_core['timekeeper']['tkr_mono']['base'] def print_timer(rb_node, idx): timerqueue = utils.container_of(rb_node, timerqueue_node_type.pointer(), "node") timer = utils.container_of(timerqueue, hrtimer_type.pointer(), "node") function = str(timer['function']).split(" ")[1].strip("<>") softexpires = timer['_softexpires'] expires = timer['node']['expires'] now = ktime_get() text = " #{}: <{}>, {}, ".format(idx, timer, function) text += "S:{:02x}\n".format(int(timer['state'])) text += " # expires at {}-{} nsecs [in {} to {} nsecs]\n".format( softexpires, expires, softexpires - now, expires - now) return text def print_active_timers(base): curr = base['active']['next']['node'] curr = curr.address.cast(rbtree.rb_node_type.get_type().pointer()) idx = 0 while curr: yield print_timer(curr, idx) curr = rbtree.rb_next(curr) idx += 1 def print_base(base): text = " .base: {}\n".format(base.address) text += " .index: {}\n".format(base['index']) text += " .resolution: {} nsecs\n".format(constants.LX_hrtimer_resolution) text += " .get_time: {}\n".format(base['get_time']) if constants.LX_CONFIG_HIGH_RES_TIMERS: text += " .offset: {} nsecs\n".format(base['offset']) text += "active timers:\n" text += "".join([x for x in print_active_timers(base)]) return text def print_cpu(hrtimer_bases, cpu, max_clock_bases): cpu_base = cpus.per_cpu(hrtimer_bases, cpu) jiffies = gdb.parse_and_eval("jiffies_64") tick_sched_ptr = gdb.parse_and_eval("&tick_cpu_sched") ts = cpus.per_cpu(tick_sched_ptr, cpu) text = "cpu: {}\n".format(cpu) for i in range(max_clock_bases): text += " clock {}:\n".format(i) text += print_base(cpu_base['clock_base'][i]) if constants.LX_CONFIG_HIGH_RES_TIMERS: fmts = [(" .{} : {} nsecs", 'expires_next'), (" .{} : {}", 'hres_active'), (" .{} : {}", 'nr_events'), (" .{} : {}", 'nr_retries'), (" .{} : {}", 'nr_hangs'), (" .{} : {}", 'max_hang_time')] text += "\n".join([s.format(f, cpu_base[f]) for s, f in fmts]) text += "\n" if constants.LX_CONFIG_TICK_ONESHOT: fmts = [(" .{} : {}", 'nohz_mode'), (" .{} : {} nsecs", 'last_tick'), (" .{} : {}", 'tick_stopped'), (" .{} : {}", 'idle_jiffies'), (" .{} : {}", 'idle_calls'), (" .{} : {}", 'idle_sleeps'), (" .{} : {} nsecs", 'idle_entrytime'), (" .{} : {} nsecs", 'idle_waketime'), (" .{} : {} nsecs", 'idle_exittime'), (" .{} : {} nsecs", 'idle_sleeptime'), (" .{}: {} nsecs", 'iowait_sleeptime'), (" .{} : {}", 'last_jiffies'), (" .{} : {}", 'next_timer'), (" .{} : {} nsecs", 'idle_expires')] text += "\n".join([s.format(f, ts[f]) for s, f in fmts]) text += "\njiffies: {}\n".format(jiffies) text += "\n" return text def print_tickdevice(td, cpu): dev = td['evtdev'] text = "Tick Device: mode: {}\n".format(td['mode']) if cpu < 0: text += "Broadcast device\n" else: text += "Per CPU device: {}\n".format(cpu) text += "Clock Event Device: " if dev == 0: text += "<NULL>\n" return text text += "{}\n".format(dev['name']) text += " max_delta_ns: {}\n".format(dev['max_delta_ns']) text += " min_delta_ns: {}\n".format(dev['min_delta_ns']) text += " mult: {}\n".format(dev['mult']) text += " shift: {}\n".format(dev['shift']) text += " mode: {}\n".format(dev['state_use_accessors']) text += " next_event: {} nsecs\n".format(dev['next_event']) text += " set_next_event: {}\n".format(dev['set_next_event']) members = [('set_state_shutdown', " shutdown: {}\n"), ('set_state_periodic', " periodic: {}\n"), ('set_state_oneshot', " oneshot: {}\n"), ('set_state_oneshot_stopped', " oneshot stopped: {}\n"), ('tick_resume', " resume: {}\n")] for member, fmt in members: if dev[member]: text += fmt.format(dev[member]) text += " event_handler: {}\n".format(dev['event_handler']) text += " retries: {}\n".format(dev['retries']) return text def pr_cpumask(mask): nr_cpu_ids = 1 if constants.LX_NR_CPUS > 1: nr_cpu_ids = gdb.parse_and_eval("nr_cpu_ids") inf = gdb.inferiors()[0] bits = mask['bits'] num_bytes = (nr_cpu_ids + 7) / 8 buf = utils.read_memoryview(inf, bits, num_bytes).tobytes() buf = binascii.b2a_hex(buf) if type(buf) is not str: buf=buf.decode() chunks = [] i = num_bytes while i > 0: i -= 1 start = i * 2 end = start + 2 chunks.append(buf[start:end]) if i != 0 and i % 4 == 0: chunks.append(',') extra = nr_cpu_ids % 8 if 0 < extra <= 4: chunks[0] = chunks[0][0] # Cut off the first 0 return "".join(chunks) class LxTimerList(gdb.Command): """Print /proc/timer_list""" def __init__(self): super(LxTimerList, self).__init__("lx-timerlist", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): hrtimer_bases = gdb.parse_and_eval("&hrtimer_bases") max_clock_bases = gdb.parse_and_eval("HRTIMER_MAX_CLOCK_BASES") text = "Timer List Version: gdb scripts\n" text += "HRTIMER_MAX_CLOCK_BASES: {}\n".format(max_clock_bases) text += "now at {} nsecs\n".format(ktime_get()) for cpu in cpus.each_online_cpu(): text += print_cpu(hrtimer_bases, cpu, max_clock_bases) if constants.LX_CONFIG_GENERIC_CLOCKEVENTS: if constants.LX_CONFIG_GENERIC_CLOCKEVENTS_BROADCAST: bc_dev = gdb.parse_and_eval("&tick_broadcast_device") text += print_tickdevice(bc_dev, -1) text += "\n" mask = gdb.parse_and_eval("tick_broadcast_mask") mask = pr_cpumask(mask) text += "tick_broadcast_mask: {}\n".format(mask) if constants.LX_CONFIG_TICK_ONESHOT: mask = gdb.parse_and_eval("tick_broadcast_oneshot_mask") mask = pr_cpumask(mask) text += "tick_broadcast_oneshot_mask: {}\n".format(mask) text += "\n" tick_cpu_devices = gdb.parse_and_eval("&tick_cpu_device") for cpu in cpus.each_online_cpu(): tick_dev = cpus.per_cpu(tick_cpu_devices, cpu) text += print_tickdevice(tick_dev, cpu) text += "\n" gdb.write(text) LxTimerList() PK ! #��1 1 tasks.pynu �[��� # # gdb helper commands and functions for Linux kernel debugging # # task & thread tools # # Copyright (c) Siemens AG, 2011-2013 # # Authors: # Jan Kiszka <jan.kiszka@siemens.com> # # This work is licensed under the terms of the GNU GPL version 2. # import gdb from linux import utils task_type = utils.CachedType("struct task_struct") def task_lists(): task_ptr_type = task_type.get_type().pointer() init_task = gdb.parse_and_eval("init_task").address t = g = init_task while True: while True: yield t t = utils.container_of(t['thread_group']['next'], task_ptr_type, "thread_group") if t == g: break t = g = utils.container_of(g['tasks']['next'], task_ptr_type, "tasks") if t == init_task: return def get_task_by_pid(pid): for task in task_lists(): if int(task['pid']) == pid: return task return None class LxTaskByPidFunc(gdb.Function): """Find Linux task by PID and return the task_struct variable. $lx_task_by_pid(PID): Given PID, iterate over all tasks of the target and return that task_struct variable which PID matches.""" def __init__(self): super(LxTaskByPidFunc, self).__init__("lx_task_by_pid") def invoke(self, pid): task = get_task_by_pid(pid) if task: return task.dereference() else: raise gdb.GdbError("No task of PID " + str(pid)) LxTaskByPidFunc() class LxPs(gdb.Command): """Dump Linux tasks.""" def __init__(self): super(LxPs, self).__init__("lx-ps", gdb.COMMAND_DATA) def invoke(self, arg, from_tty): gdb.write("{:>10} {:>12} {:>7}\n".format("TASK", "PID", "COMM")) for task in task_lists(): gdb.write("{} {:^5} {}\n".format( task.format_string().split()[0], task["pid"].format_string(), task["comm"].string())) LxPs() thread_info_type = utils.CachedType("struct thread_info") ia64_task_size = None def get_thread_info(task): thread_info_ptr_type = thread_info_type.get_type().pointer() if utils.is_target_arch("ia64"): global ia64_task_size if ia64_task_size is None: ia64_task_size = gdb.parse_and_eval("sizeof(struct task_struct)") thread_info_addr = task.address + ia64_task_size thread_info = thread_info_addr.cast(thread_info_ptr_type) else: if task.type.fields()[0].type == thread_info_type.get_type(): return task['thread_info'] thread_info = task['stack'].cast(thread_info_ptr_type) return thread_info.dereference() class LxThreadInfoFunc (gdb.Function): """Calculate Linux thread_info from task variable. $lx_thread_info(TASK): Given TASK, return the corresponding thread_info variable.""" def __init__(self): super(LxThreadInfoFunc, self).__init__("lx_thread_info") def invoke(self, task): return get_thread_info(task) LxThreadInfoFunc() class LxThreadInfoByPidFunc (gdb.Function): """Calculate Linux thread_info from task variable found by pid $lx_thread_info_by_pid(PID): Given PID, return the corresponding thread_info variable.""" def __init__(self): super(LxThreadInfoByPidFunc, self).__init__("lx_thread_info_by_pid") def invoke(self, pid): task = get_task_by_pid(pid) if task: return get_thread_info(task.dereference()) else: raise gdb.GdbError("No task of PID " + str(pid)) LxThreadInfoByPidFunc() PK ! ���� � Makefilenu �[��� # SPDX-License-Identifier: GPL-2.0 ifdef building_out_of_srctree symlinks := $(patsubst $(srctree)/$(src)/%,%,$(wildcard $(srctree)/$(src)/*.py)) quiet_cmd_symlink = SYMLINK $@ cmd_symlink = ln -fsn $(patsubst $(obj)/%,$(abspath $(srctree))/$(src)/%,$@) $@ always-y += $(symlinks) $(addprefix $(obj)/, $(symlinks)): FORCE $(call if_changed,symlink) endif quiet_cmd_gen_constants_py = GEN $@ cmd_gen_constants_py = \ $(CPP) -E -x c -P $(c_flags) $< > $@ ;\ sed -i '1,/<!-- end-c-headers -->/d;' $@ always-y += constants.py $(obj)/constants.py: $(src)/constants.py.in FORCE $(call if_changed_dep,gen_constants_py) clean-files := *.pyc *.pyo PK ! ��{cA A .gitignorenu �[��� # SPDX-License-Identifier: GPL-2.0-only *.pyc *.pyo constants.py PK ! �f� � genpd.pynu �[��� # SPDX-License-Identifier: GPL-2.0 # # Copyright (c) NXP 2019 import gdb import sys from linux.utils import CachedType, gdb_eval_or_none from linux.lists import list_for_each_entry generic_pm_domain_type = CachedType('struct generic_pm_domain') pm_domain_data_type = CachedType('struct pm_domain_data') device_link_type = CachedType('struct device_link') def kobject_get_path(kobj): path = kobj['name'].string() parent = kobj['parent'] if parent: path = kobject_get_path(parent) + '/' + path return path def rtpm_status_str(dev): if dev['power']['runtime_error']: return 'error' if dev['power']['disable_depth']: return 'unsupported' _RPM_STATUS_LOOKUP = [ "active", "resuming", "suspended", "suspending" ] return _RPM_STATUS_LOOKUP[dev['power']['runtime_status']] class LxGenPDSummary(gdb.Command): '''Print genpd summary Output is similar to /sys/kernel/debug/pm_genpd/pm_genpd_summary''' def __init__(self): super(LxGenPDSummary, self).__init__('lx-genpd-summary', gdb.COMMAND_DATA) def summary_one(self, genpd): if genpd['status'] == 0: status_string = 'on' else: status_string = 'off-{}'.format(genpd['state_idx']) child_names = [] for link in list_for_each_entry( genpd['parent_links'], device_link_type.get_type().pointer(), 'parent_node'): child_names.append(link['child']['name']) gdb.write('%-30s %-15s %s\n' % ( genpd['name'].string(), status_string, ', '.join(child_names))) # Print devices in domain for pm_data in list_for_each_entry(genpd['dev_list'], pm_domain_data_type.get_type().pointer(), 'list_node'): dev = pm_data['dev'] kobj_path = kobject_get_path(dev['kobj']) gdb.write(' %-50s %s\n' % (kobj_path, rtpm_status_str(dev))) def invoke(self, arg, from_tty): if gdb_eval_or_none("&gpd_list") is None: raise gdb.GdbError("No power domain(s) registered") gdb.write('domain status children\n'); gdb.write(' /device runtime status\n'); gdb.write('----------------------------------------------------------------------\n'); for genpd in list_for_each_entry( gdb.parse_and_eval('&gpd_list'), generic_pm_domain_type.get_type().pointer(), 'gpd_list_node'): self.summary_one(genpd) LxGenPDSummary() PK ! �x,4 4 nfs_page.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/nfs_page.h * * Copyright (C) 2000 Trond Myklebust * * NFS page cache wrapper. */ #ifndef _LINUX_NFS_PAGE_H #define _LINUX_NFS_PAGE_H #include <linux/list.h> #include <linux/pagemap.h> #include <linux/wait.h> #include <linux/sunrpc/auth.h> #include <linux/nfs_xdr.h> #include <linux/kref.h> /* * Valid flags for a dirty buffer */ enum { PG_BUSY = 0, /* nfs_{un}lock_request */ PG_MAPPED, /* page private set for buffered io */ PG_CLEAN, /* write succeeded */ PG_COMMIT_TO_DS, /* used by pnfs layouts */ PG_INODE_REF, /* extra ref held by inode when in writeback */ PG_HEADLOCK, /* page group lock of wb_head */ PG_TEARDOWN, /* page group sync for destroy */ PG_UNLOCKPAGE, /* page group sync bit in read path */ PG_UPTODATE, /* page group sync bit in read path */ PG_WB_END, /* page group sync bit in write path */ PG_REMOVE, /* page group sync bit in write path */ PG_CONTENDED1, /* Is someone waiting for a lock? */ PG_CONTENDED2, /* Is someone waiting for a lock? */ }; struct nfs_inode; struct nfs_page { struct list_head wb_list; /* Defines state of page: */ struct page *wb_page; /* page to read in/write out */ struct nfs_lock_context *wb_lock_context; /* lock context info */ pgoff_t wb_index; /* Offset >> PAGE_SHIFT */ unsigned int wb_offset, /* Offset & ~PAGE_MASK */ wb_pgbase, /* Start of page data */ wb_bytes; /* Length of request */ struct kref wb_kref; /* reference count */ unsigned long wb_flags; struct nfs_write_verifier wb_verf; /* Commit cookie */ struct nfs_page *wb_this_page; /* list of reqs for this page */ struct nfs_page *wb_head; /* head pointer for req list */ unsigned short wb_nio; /* Number of I/O attempts */ }; struct nfs_pgio_mirror; struct nfs_pageio_descriptor; struct nfs_pageio_ops { void (*pg_init)(struct nfs_pageio_descriptor *, struct nfs_page *); size_t (*pg_test)(struct nfs_pageio_descriptor *, struct nfs_page *, struct nfs_page *); int (*pg_doio)(struct nfs_pageio_descriptor *); unsigned int (*pg_get_mirror_count)(struct nfs_pageio_descriptor *, struct nfs_page *); void (*pg_cleanup)(struct nfs_pageio_descriptor *); struct nfs_pgio_mirror * (*pg_get_mirror)(struct nfs_pageio_descriptor *, u32); u32 (*pg_set_mirror)(struct nfs_pageio_descriptor *, u32); }; struct nfs_rw_ops { struct nfs_pgio_header *(*rw_alloc_header)(void); void (*rw_free_header)(struct nfs_pgio_header *); int (*rw_done)(struct rpc_task *, struct nfs_pgio_header *, struct inode *); void (*rw_result)(struct rpc_task *, struct nfs_pgio_header *); void (*rw_initiate)(struct nfs_pgio_header *, struct rpc_message *, const struct nfs_rpc_ops *, struct rpc_task_setup *, int); }; struct nfs_pgio_mirror { struct list_head pg_list; unsigned long pg_bytes_written; size_t pg_count; size_t pg_bsize; unsigned int pg_base; unsigned char pg_recoalesce : 1; }; struct nfs_pageio_descriptor { struct inode *pg_inode; const struct nfs_pageio_ops *pg_ops; const struct nfs_rw_ops *pg_rw_ops; int pg_ioflags; int pg_error; const struct rpc_call_ops *pg_rpc_callops; const struct nfs_pgio_completion_ops *pg_completion_ops; struct pnfs_layout_segment *pg_lseg; struct nfs_io_completion *pg_io_completion; struct nfs_direct_req *pg_dreq; unsigned int pg_bsize; /* default bsize for mirrors */ u32 pg_mirror_count; struct nfs_pgio_mirror *pg_mirrors; struct nfs_pgio_mirror pg_mirrors_static[1]; struct nfs_pgio_mirror *pg_mirrors_dynamic; u32 pg_mirror_idx; /* current mirror */ unsigned short pg_maxretrans; unsigned char pg_moreio : 1; }; /* arbitrarily selected limit to number of mirrors */ #define NFS_PAGEIO_DESCRIPTOR_MIRROR_MAX 16 #define NFS_WBACK_BUSY(req) (test_bit(PG_BUSY,&(req)->wb_flags)) extern struct nfs_page *nfs_create_request(struct nfs_open_context *ctx, struct page *page, unsigned int offset, unsigned int count); extern void nfs_release_request(struct nfs_page *); extern void nfs_pageio_init(struct nfs_pageio_descriptor *desc, struct inode *inode, const struct nfs_pageio_ops *pg_ops, const struct nfs_pgio_completion_ops *compl_ops, const struct nfs_rw_ops *rw_ops, size_t bsize, int how); extern int nfs_pageio_add_request(struct nfs_pageio_descriptor *, struct nfs_page *); extern int nfs_pageio_resend(struct nfs_pageio_descriptor *, struct nfs_pgio_header *); extern void nfs_pageio_complete(struct nfs_pageio_descriptor *desc); extern void nfs_pageio_cond_complete(struct nfs_pageio_descriptor *, pgoff_t); extern size_t nfs_generic_pg_test(struct nfs_pageio_descriptor *desc, struct nfs_page *prev, struct nfs_page *req); extern int nfs_wait_on_request(struct nfs_page *); extern void nfs_unlock_request(struct nfs_page *req); extern void nfs_unlock_and_release_request(struct nfs_page *); extern struct nfs_page *nfs_page_group_lock_head(struct nfs_page *req); extern void nfs_join_page_group(struct nfs_page *head, struct nfs_commit_info *cinfo, struct inode *inode); extern int nfs_page_group_lock(struct nfs_page *); extern void nfs_page_group_unlock(struct nfs_page *); extern bool nfs_page_group_sync_on_bit(struct nfs_page *, unsigned int); extern bool nfs_page_group_sync_on_bit_locked(struct nfs_page *, unsigned int); extern int nfs_page_set_headlock(struct nfs_page *req); extern void nfs_page_clear_headlock(struct nfs_page *req); extern bool nfs_async_iocounter_wait(struct rpc_task *, struct nfs_lock_context *); /* * Lock the page of an asynchronous request */ static inline int nfs_lock_request(struct nfs_page *req) { return !test_and_set_bit(PG_BUSY, &req->wb_flags); } /** * nfs_list_add_request - Insert a request into a list * @req: request * @head: head of list into which to insert the request. */ static inline void nfs_list_add_request(struct nfs_page *req, struct list_head *head) { list_add_tail(&req->wb_list, head); } /** * nfs_list_move_request - Move a request to a new list * @req: request * @head: head of list into which to insert the request. */ static inline void nfs_list_move_request(struct nfs_page *req, struct list_head *head) { list_move_tail(&req->wb_list, head); } /** * nfs_list_remove_request - Remove a request from its wb_list * @req: request */ static inline void nfs_list_remove_request(struct nfs_page *req) { if (list_empty(&req->wb_list)) return; list_del_init(&req->wb_list); } static inline struct nfs_page * nfs_list_entry(struct list_head *head) { return list_entry(head, struct nfs_page, wb_list); } static inline loff_t req_offset(struct nfs_page *req) { return (((loff_t)req->wb_index) << PAGE_SHIFT) + req->wb_offset; } static inline struct nfs_open_context * nfs_req_openctx(struct nfs_page *req) { return req->wb_lock_context->open_context; } #endif /* _LINUX_NFS_PAGE_H */ PK ! <�z z iommu-helper.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IOMMU_HELPER_H #define _LINUX_IOMMU_HELPER_H #include <linux/bug.h> #include <linux/log2.h> #include <linux/math.h> #include <linux/types.h> static inline unsigned long iommu_device_max_index(unsigned long size, unsigned long offset, u64 dma_mask) { if (size + offset > dma_mask) return dma_mask - offset + 1; else return size; } static inline int iommu_is_span_boundary(unsigned int index, unsigned int nr, unsigned long shift, unsigned long boundary_size) { BUG_ON(!is_power_of_2(boundary_size)); shift = (shift + index) & (boundary_size - 1); return shift + nr > boundary_size; } extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, unsigned long shift, unsigned long boundary_size, unsigned long align_mask); static inline unsigned long iommu_num_pages(unsigned long addr, unsigned long len, unsigned long io_page_size) { unsigned long size = (addr & (io_page_size - 1)) + len; return DIV_ROUND_UP(size, io_page_size); } #endif PK ! nxߔ� � vm_event_item.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef VM_EVENT_ITEM_H_INCLUDED #define VM_EVENT_ITEM_H_INCLUDED #ifdef CONFIG_ZONE_DMA #define DMA_ZONE(xx) xx##_DMA, #else #define DMA_ZONE(xx) #endif #ifdef CONFIG_ZONE_DMA32 #define DMA32_ZONE(xx) xx##_DMA32, #else #define DMA32_ZONE(xx) #endif #ifdef CONFIG_HIGHMEM #define HIGHMEM_ZONE(xx) xx##_HIGH, #else #define HIGHMEM_ZONE(xx) #endif #define FOR_ALL_ZONES(xx) DMA_ZONE(xx) DMA32_ZONE(xx) xx##_NORMAL, HIGHMEM_ZONE(xx) xx##_MOVABLE enum vm_event_item { PGPGIN, PGPGOUT, PSWPIN, PSWPOUT, FOR_ALL_ZONES(PGALLOC), FOR_ALL_ZONES(ALLOCSTALL), FOR_ALL_ZONES(PGSCAN_SKIP), PGFREE, PGACTIVATE, PGDEACTIVATE, PGLAZYFREE, PGFAULT, PGMAJFAULT, PGLAZYFREED, PGREFILL, PGREUSE, PGSTEAL_KSWAPD, PGSTEAL_DIRECT, PGDEMOTE_KSWAPD, PGDEMOTE_DIRECT, PGSCAN_KSWAPD, PGSCAN_DIRECT, PGSCAN_DIRECT_THROTTLE, PGSCAN_ANON, PGSCAN_FILE, PGSTEAL_ANON, PGSTEAL_FILE, #ifdef CONFIG_NUMA PGSCAN_ZONE_RECLAIM_FAILED, #endif PGINODESTEAL, SLABS_SCANNED, KSWAPD_INODESTEAL, KSWAPD_LOW_WMARK_HIT_QUICKLY, KSWAPD_HIGH_WMARK_HIT_QUICKLY, PAGEOUTRUN, PGROTATED, DROP_PAGECACHE, DROP_SLAB, OOM_KILL, #ifdef CONFIG_NUMA_BALANCING NUMA_PTE_UPDATES, NUMA_HUGE_PTE_UPDATES, NUMA_HINT_FAULTS, NUMA_HINT_FAULTS_LOCAL, NUMA_PAGE_MIGRATE, #endif #ifdef CONFIG_MIGRATION PGMIGRATE_SUCCESS, PGMIGRATE_FAIL, THP_MIGRATION_SUCCESS, THP_MIGRATION_FAIL, THP_MIGRATION_SPLIT, #endif #ifdef CONFIG_COMPACTION COMPACTMIGRATE_SCANNED, COMPACTFREE_SCANNED, COMPACTISOLATED, COMPACTSTALL, COMPACTFAIL, COMPACTSUCCESS, KCOMPACTD_WAKE, KCOMPACTD_MIGRATE_SCANNED, KCOMPACTD_FREE_SCANNED, #endif #ifdef CONFIG_HUGETLB_PAGE HTLB_BUDDY_PGALLOC, HTLB_BUDDY_PGALLOC_FAIL, #endif #ifdef CONFIG_CMA CMA_ALLOC_SUCCESS, CMA_ALLOC_FAIL, #endif UNEVICTABLE_PGCULLED, /* culled to noreclaim list */ UNEVICTABLE_PGSCANNED, /* scanned for reclaimability */ UNEVICTABLE_PGRESCUED, /* rescued from noreclaim list */ UNEVICTABLE_PGMLOCKED, UNEVICTABLE_PGMUNLOCKED, UNEVICTABLE_PGCLEARED, /* on COW, page truncate */ UNEVICTABLE_PGSTRANDED, /* unable to isolate on unlock */ #ifdef CONFIG_TRANSPARENT_HUGEPAGE THP_FAULT_ALLOC, THP_FAULT_FALLBACK, THP_FAULT_FALLBACK_CHARGE, THP_COLLAPSE_ALLOC, THP_COLLAPSE_ALLOC_FAILED, THP_FILE_ALLOC, THP_FILE_FALLBACK, THP_FILE_FALLBACK_CHARGE, THP_FILE_MAPPED, THP_SPLIT_PAGE, THP_SPLIT_PAGE_FAILED, THP_DEFERRED_SPLIT_PAGE, THP_SPLIT_PMD, #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD THP_SPLIT_PUD, #endif THP_ZERO_PAGE_ALLOC, THP_ZERO_PAGE_ALLOC_FAILED, THP_SWPOUT, THP_SWPOUT_FALLBACK, #endif #ifdef CONFIG_MEMORY_BALLOON BALLOON_INFLATE, BALLOON_DEFLATE, #ifdef CONFIG_BALLOON_COMPACTION BALLOON_MIGRATE, #endif #endif #ifdef CONFIG_DEBUG_TLBFLUSH NR_TLB_REMOTE_FLUSH, /* cpu tried to flush others' tlbs */ NR_TLB_REMOTE_FLUSH_RECEIVED,/* cpu received ipi for flush */ NR_TLB_LOCAL_FLUSH_ALL, NR_TLB_LOCAL_FLUSH_ONE, #endif /* CONFIG_DEBUG_TLBFLUSH */ #ifdef CONFIG_DEBUG_VM_VMACACHE VMACACHE_FIND_CALLS, VMACACHE_FIND_HITS, #endif #ifdef CONFIG_SWAP SWAP_RA, SWAP_RA_HIT, #endif #ifdef CONFIG_X86 DIRECT_MAP_LEVEL2_SPLIT, DIRECT_MAP_LEVEL3_SPLIT, #endif NR_VM_EVENT_ITEMS }; #ifndef CONFIG_TRANSPARENT_HUGEPAGE #define THP_FILE_ALLOC ({ BUILD_BUG(); 0; }) #define THP_FILE_FALLBACK ({ BUILD_BUG(); 0; }) #define THP_FILE_FALLBACK_CHARGE ({ BUILD_BUG(); 0; }) #define THP_FILE_MAPPED ({ BUILD_BUG(); 0; }) #endif #endif /* VM_EVENT_ITEM_H_INCLUDED */ PK ! �ʃ � � devcoredump.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright(c) 2015 Intel Deutschland GmbH */ #ifndef __DEVCOREDUMP_H #define __DEVCOREDUMP_H #include <linux/device.h> #include <linux/module.h> #include <linux/vmalloc.h> #include <linux/scatterlist.h> #include <linux/slab.h> /* * _devcd_free_sgtable - free all the memory of the given scatterlist table * (i.e. both pages and scatterlist instances) * NOTE: if two tables allocated and chained using the sg_chain function then * this function should be called only once on the first table * @table: pointer to sg_table to free */ static inline void _devcd_free_sgtable(struct scatterlist *table) { int i; struct page *page; struct scatterlist *iter; struct scatterlist *delete_iter; /* free pages */ iter = table; for_each_sg(table, iter, sg_nents(table), i) { page = sg_page(iter); if (page) __free_page(page); } /* then free all chained tables */ iter = table; delete_iter = table; /* always points on a head of a table */ while (!sg_is_last(iter)) { iter++; if (sg_is_chain(iter)) { iter = sg_chain_ptr(iter); kfree(delete_iter); delete_iter = iter; } } /* free the last table */ kfree(delete_iter); } #ifdef CONFIG_DEV_COREDUMP void dev_coredumpv(struct device *dev, void *data, size_t datalen, gfp_t gfp); void dev_coredumpm(struct device *dev, struct module *owner, void *data, size_t datalen, gfp_t gfp, ssize_t (*read)(char *buffer, loff_t offset, size_t count, void *data, size_t datalen), void (*free)(void *data)); void dev_coredumpsg(struct device *dev, struct scatterlist *table, size_t datalen, gfp_t gfp); #else static inline void dev_coredumpv(struct device *dev, void *data, size_t datalen, gfp_t gfp) { vfree(data); } static inline void dev_coredumpm(struct device *dev, struct module *owner, void *data, size_t datalen, gfp_t gfp, ssize_t (*read)(char *buffer, loff_t offset, size_t count, void *data, size_t datalen), void (*free)(void *data)) { free(data); } static inline void dev_coredumpsg(struct device *dev, struct scatterlist *table, size_t datalen, gfp_t gfp) { _devcd_free_sgtable(table); } #endif /* CONFIG_DEV_COREDUMP */ #endif /* __DEVCOREDUMP_H */ PK ! fm8�9 9 parport_pc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PARPORT_PC_H #define __LINUX_PARPORT_PC_H #include <asm/io.h> /* --- register definitions ------------------------------- */ #define ECONTROL(p) ((p)->base_hi + 0x2) #define CONFIGB(p) ((p)->base_hi + 0x1) #define CONFIGA(p) ((p)->base_hi + 0x0) #define FIFO(p) ((p)->base_hi + 0x0) #define EPPDATA(p) ((p)->base + 0x4) #define EPPADDR(p) ((p)->base + 0x3) #define CONTROL(p) ((p)->base + 0x2) #define STATUS(p) ((p)->base + 0x1) #define DATA(p) ((p)->base + 0x0) struct parport_pc_private { /* Contents of CTR. */ unsigned char ctr; /* Bitmask of writable CTR bits. */ unsigned char ctr_writable; /* Whether or not there's an ECR. */ int ecr; /* Number of PWords that FIFO will hold. */ int fifo_depth; /* Number of bytes per portword. */ int pword; /* Not used yet. */ int readIntrThreshold; int writeIntrThreshold; /* buffer suitable for DMA, if DMA enabled */ char *dma_buf; dma_addr_t dma_handle; struct list_head list; struct parport *port; }; struct parport_pc_via_data { /* ISA PnP IRQ routing register 1 */ u8 via_pci_parport_irq_reg; /* ISA PnP DMA request routing register */ u8 via_pci_parport_dma_reg; /* Register and value to enable SuperIO configuration access */ u8 via_pci_superio_config_reg; u8 via_pci_superio_config_data; /* SuperIO function register number */ u8 viacfg_function; /* parallel port control register number */ u8 viacfg_parport_control; /* Parallel port base address register */ u8 viacfg_parport_base; }; static __inline__ void parport_pc_write_data(struct parport *p, unsigned char d) { #ifdef DEBUG_PARPORT printk (KERN_DEBUG "parport_pc_write_data(%p,0x%02x)\n", p, d); #endif outb(d, DATA(p)); } static __inline__ unsigned char parport_pc_read_data(struct parport *p) { unsigned char val = inb (DATA (p)); #ifdef DEBUG_PARPORT printk (KERN_DEBUG "parport_pc_read_data(%p) = 0x%02x\n", p, val); #endif return val; } #ifdef DEBUG_PARPORT static inline void dump_parport_state (char *str, struct parport *p) { /* here's hoping that reading these ports won't side-effect anything underneath */ unsigned char ecr = inb (ECONTROL (p)); unsigned char dcr = inb (CONTROL (p)); unsigned char dsr = inb (STATUS (p)); static const char *const ecr_modes[] = {"SPP", "PS2", "PPFIFO", "ECP", "xXx", "yYy", "TST", "CFG"}; const struct parport_pc_private *priv = p->physport->private_data; int i; printk (KERN_DEBUG "*** parport state (%s): ecr=[%s", str, ecr_modes[(ecr & 0xe0) >> 5]); if (ecr & 0x10) printk (",nErrIntrEn"); if (ecr & 0x08) printk (",dmaEn"); if (ecr & 0x04) printk (",serviceIntr"); if (ecr & 0x02) printk (",f_full"); if (ecr & 0x01) printk (",f_empty"); for (i=0; i<2; i++) { printk ("] dcr(%s)=[", i ? "soft" : "hard"); dcr = i ? priv->ctr : inb (CONTROL (p)); if (dcr & 0x20) { printk ("rev"); } else { printk ("fwd"); } if (dcr & 0x10) printk (",ackIntEn"); if (!(dcr & 0x08)) printk (",N-SELECT-IN"); if (dcr & 0x04) printk (",N-INIT"); if (!(dcr & 0x02)) printk (",N-AUTOFD"); if (!(dcr & 0x01)) printk (",N-STROBE"); } printk ("] dsr=["); if (!(dsr & 0x80)) printk ("BUSY"); if (dsr & 0x40) printk (",N-ACK"); if (dsr & 0x20) printk (",PERROR"); if (dsr & 0x10) printk (",SELECT"); if (dsr & 0x08) printk (",N-FAULT"); printk ("]\n"); return; } #else /* !DEBUG_PARPORT */ #define dump_parport_state(args...) #endif /* !DEBUG_PARPORT */ /* __parport_pc_frob_control differs from parport_pc_frob_control in that * it doesn't do any extra masking. */ static __inline__ unsigned char __parport_pc_frob_control (struct parport *p, unsigned char mask, unsigned char val) { struct parport_pc_private *priv = p->physport->private_data; unsigned char ctr = priv->ctr; #ifdef DEBUG_PARPORT printk (KERN_DEBUG "__parport_pc_frob_control(%02x,%02x): %02x -> %02x\n", mask, val, ctr, ((ctr & ~mask) ^ val) & priv->ctr_writable); #endif ctr = (ctr & ~mask) ^ val; ctr &= priv->ctr_writable; /* only write writable bits. */ outb (ctr, CONTROL (p)); priv->ctr = ctr; /* Update soft copy */ return ctr; } static __inline__ void parport_pc_data_reverse (struct parport *p) { __parport_pc_frob_control (p, 0x20, 0x20); } static __inline__ void parport_pc_data_forward (struct parport *p) { __parport_pc_frob_control (p, 0x20, 0x00); } static __inline__ void parport_pc_write_control (struct parport *p, unsigned char d) { const unsigned char wm = (PARPORT_CONTROL_STROBE | PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_INIT | PARPORT_CONTROL_SELECT); /* Take this out when drivers have adapted to newer interface. */ if (d & 0x20) { printk (KERN_DEBUG "%s (%s): use data_reverse for this!\n", p->name, p->cad->name); parport_pc_data_reverse (p); } __parport_pc_frob_control (p, wm, d & wm); } static __inline__ unsigned char parport_pc_read_control(struct parport *p) { const unsigned char rm = (PARPORT_CONTROL_STROBE | PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_INIT | PARPORT_CONTROL_SELECT); const struct parport_pc_private *priv = p->physport->private_data; return priv->ctr & rm; /* Use soft copy */ } static __inline__ unsigned char parport_pc_frob_control (struct parport *p, unsigned char mask, unsigned char val) { const unsigned char wm = (PARPORT_CONTROL_STROBE | PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_INIT | PARPORT_CONTROL_SELECT); /* Take this out when drivers have adapted to newer interface. */ if (mask & 0x20) { printk (KERN_DEBUG "%s (%s): use data_%s for this!\n", p->name, p->cad->name, (val & 0x20) ? "reverse" : "forward"); if (val & 0x20) parport_pc_data_reverse (p); else parport_pc_data_forward (p); } /* Restrict mask and val to control lines. */ mask &= wm; val &= wm; return __parport_pc_frob_control (p, mask, val); } static __inline__ unsigned char parport_pc_read_status(struct parport *p) { return inb(STATUS(p)); } static __inline__ void parport_pc_disable_irq(struct parport *p) { __parport_pc_frob_control (p, 0x10, 0x00); } static __inline__ void parport_pc_enable_irq(struct parport *p) { __parport_pc_frob_control (p, 0x10, 0x10); } extern void parport_pc_release_resources(struct parport *p); extern int parport_pc_claim_resources(struct parport *p); /* PCMCIA code will want to get us to look at a port. Provide a mechanism. */ extern struct parport *parport_pc_probe_port(unsigned long base, unsigned long base_hi, int irq, int dma, struct device *dev, int irqflags); extern void parport_pc_unregister_port(struct parport *p); #endif PK ! �OYc c acpi_iort.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016, Semihalf * Author: Tomasz Nowicki <tn@semihalf.com> */ #ifndef __ACPI_IORT_H__ #define __ACPI_IORT_H__ #include <linux/acpi.h> #include <linux/fwnode.h> #include <linux/irqdomain.h> #define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL) #define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL) /* * PMCG model identifiers for use in smmu pmu driver. Please note * that this is purely for the use of software and has nothing to * do with hardware or with IORT specification. */ #define IORT_SMMU_V3_PMCG_GENERIC 0x00000000 /* Generic SMMUv3 PMCG */ #define IORT_SMMU_V3_PMCG_HISI_HIP08 0x00000001 /* HiSilicon HIP08 PMCG */ #define IORT_SMMU_V3_PMCG_HISI_HIP09 0x00000002 /* HiSilicon HIP09 PMCG */ int iort_register_domain_token(int trans_id, phys_addr_t base, struct fwnode_handle *fw_node); void iort_deregister_domain_token(int trans_id); struct fwnode_handle *iort_find_domain_token(int trans_id); #ifdef CONFIG_ACPI_IORT void acpi_iort_init(void); u32 iort_msi_map_id(struct device *dev, u32 id); struct irq_domain *iort_get_device_domain(struct device *dev, u32 id, enum irq_domain_bus_token bus_token); void acpi_configure_pmsi_domain(struct device *dev); int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id); /* IOMMU interface */ int iort_dma_get_ranges(struct device *dev, u64 *size); int iort_iommu_configure_id(struct device *dev, const u32 *id_in); int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head); phys_addr_t acpi_iort_dma_get_max_cpu_address(void); #else static inline void acpi_iort_init(void) { } static inline u32 iort_msi_map_id(struct device *dev, u32 id) { return id; } static inline struct irq_domain *iort_get_device_domain( struct device *dev, u32 id, enum irq_domain_bus_token bus_token) { return NULL; } static inline void acpi_configure_pmsi_domain(struct device *dev) { } /* IOMMU interface */ static inline int iort_dma_get_ranges(struct device *dev, u64 *size) { return -ENODEV; } static inline int iort_iommu_configure_id(struct device *dev, const u32 *id_in) { return -ENODEV; } static inline int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) { return 0; } static inline phys_addr_t acpi_iort_dma_get_max_cpu_address(void) { return PHYS_ADDR_MAX; } #endif #endif /* __ACPI_IORT_H__ */ PK ! H�)�Q �Q dma-buf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Header file for dma buffer sharing framework. * * Copyright(C) 2011 Linaro Limited. All rights reserved. * Author: Sumit Semwal <sumit.semwal@ti.com> * * Many thanks to linaro-mm-sig list, and specially * Arnd Bergmann <arnd@arndb.de>, Rob Clark <rob@ti.com> and * Daniel Vetter <daniel@ffwll.ch> for their support in creation and * refining of this idea. */ #ifndef __DMA_BUF_H__ #define __DMA_BUF_H__ #include <linux/dma-buf-map.h> #include <linux/file.h> #include <linux/err.h> #include <linux/scatterlist.h> #include <linux/list.h> #include <linux/dma-mapping.h> #include <linux/fs.h> #include <linux/dma-fence.h> #include <linux/wait.h> struct device; struct dma_buf; struct dma_buf_attachment; /** * struct dma_buf_ops - operations possible on struct dma_buf * @vmap: [optional] creates a virtual mapping for the buffer into kernel * address space. Same restrictions as for vmap and friends apply. * @vunmap: [optional] unmaps a vmap from the buffer */ struct dma_buf_ops { /** * @cache_sgt_mapping: * * If true the framework will cache the first mapping made for each * attachment. This avoids creating mappings for attachments multiple * times. */ bool cache_sgt_mapping; /** * @attach: * * This is called from dma_buf_attach() to make sure that a given * &dma_buf_attachment.dev can access the provided &dma_buf. Exporters * which support buffer objects in special locations like VRAM or * device-specific carveout areas should check whether the buffer could * be move to system memory (or directly accessed by the provided * device), and otherwise need to fail the attach operation. * * The exporter should also in general check whether the current * allocation fulfills the DMA constraints of the new device. If this * is not the case, and the allocation cannot be moved, it should also * fail the attach operation. * * Any exporter-private housekeeping data can be stored in the * &dma_buf_attachment.priv pointer. * * This callback is optional. * * Returns: * * 0 on success, negative error code on failure. It might return -EBUSY * to signal that backing storage is already allocated and incompatible * with the requirements of requesting device. */ int (*attach)(struct dma_buf *, struct dma_buf_attachment *); /** * @detach: * * This is called by dma_buf_detach() to release a &dma_buf_attachment. * Provided so that exporters can clean up any housekeeping for an * &dma_buf_attachment. * * This callback is optional. */ void (*detach)(struct dma_buf *, struct dma_buf_attachment *); /** * @pin: * * This is called by dma_buf_pin() and lets the exporter know that the * DMA-buf can't be moved any more. The exporter should pin the buffer * into system memory to make sure it is generally accessible by other * devices. * * This is called with the &dmabuf.resv object locked and is mutual * exclusive with @cache_sgt_mapping. * * This is called automatically for non-dynamic importers from * dma_buf_attach(). * * Note that similar to non-dynamic exporters in their @map_dma_buf * callback the driver must guarantee that the memory is available for * use and cleared of any old data by the time this function returns. * Drivers which pipeline their buffer moves internally must wait for * all moves and clears to complete. * * Returns: * * 0 on success, negative error code on failure. */ int (*pin)(struct dma_buf_attachment *attach); /** * @unpin: * * This is called by dma_buf_unpin() and lets the exporter know that the * DMA-buf can be moved again. * * This is called with the dmabuf->resv object locked and is mutual * exclusive with @cache_sgt_mapping. * * This callback is optional. */ void (*unpin)(struct dma_buf_attachment *attach); /** * @map_dma_buf: * * This is called by dma_buf_map_attachment() and is used to map a * shared &dma_buf into device address space, and it is mandatory. It * can only be called if @attach has been called successfully. * * This call may sleep, e.g. when the backing storage first needs to be * allocated, or moved to a location suitable for all currently attached * devices. * * Note that any specific buffer attributes required for this function * should get added to device_dma_parameters accessible via * &device.dma_params from the &dma_buf_attachment. The @attach callback * should also check these constraints. * * If this is being called for the first time, the exporter can now * choose to scan through the list of attachments for this buffer, * collate the requirements of the attached devices, and choose an * appropriate backing storage for the buffer. * * Based on enum dma_data_direction, it might be possible to have * multiple users accessing at the same time (for reading, maybe), or * any other kind of sharing that the exporter might wish to make * available to buffer-users. * * This is always called with the dmabuf->resv object locked when * the dynamic_mapping flag is true. * * Note that for non-dynamic exporters the driver must guarantee that * that the memory is available for use and cleared of any old data by * the time this function returns. Drivers which pipeline their buffer * moves internally must wait for all moves and clears to complete. * Dynamic exporters do not need to follow this rule: For non-dynamic * importers the buffer is already pinned through @pin, which has the * same requirements. Dynamic importers otoh are required to obey the * dma_resv fences. * * Returns: * * A &sg_table scatter list of the backing storage of the DMA buffer, * already mapped into the device address space of the &device attached * with the provided &dma_buf_attachment. The addresses and lengths in * the scatter list are PAGE_SIZE aligned. * * On failure, returns a negative error value wrapped into a pointer. * May also return -EINTR when a signal was received while being * blocked. * * Note that exporters should not try to cache the scatter list, or * return the same one for multiple calls. Caching is done either by the * DMA-BUF code (for non-dynamic importers) or the importer. Ownership * of the scatter list is transferred to the caller, and returned by * @unmap_dma_buf. */ struct sg_table * (*map_dma_buf)(struct dma_buf_attachment *, enum dma_data_direction); /** * @unmap_dma_buf: * * This is called by dma_buf_unmap_attachment() and should unmap and * release the &sg_table allocated in @map_dma_buf, and it is mandatory. * For static dma_buf handling this might also unpin the backing * storage if this is the last mapping of the DMA buffer. */ void (*unmap_dma_buf)(struct dma_buf_attachment *, struct sg_table *, enum dma_data_direction); /* TODO: Add try_map_dma_buf version, to return immed with -EBUSY * if the call would block. */ /** * @release: * * Called after the last dma_buf_put to release the &dma_buf, and * mandatory. */ void (*release)(struct dma_buf *); /** * @begin_cpu_access: * * This is called from dma_buf_begin_cpu_access() and allows the * exporter to ensure that the memory is actually coherent for cpu * access. The exporter also needs to ensure that cpu access is coherent * for the access direction. The direction can be used by the exporter * to optimize the cache flushing, i.e. access with a different * direction (read instead of write) might return stale or even bogus * data (e.g. when the exporter needs to copy the data to temporary * storage). * * Note that this is both called through the DMA_BUF_IOCTL_SYNC IOCTL * command for userspace mappings established through @mmap, and also * for kernel mappings established with @vmap. * * This callback is optional. * * Returns: * * 0 on success or a negative error code on failure. This can for * example fail when the backing storage can't be allocated. Can also * return -ERESTARTSYS or -EINTR when the call has been interrupted and * needs to be restarted. */ int (*begin_cpu_access)(struct dma_buf *, enum dma_data_direction); /** * @end_cpu_access: * * This is called from dma_buf_end_cpu_access() when the importer is * done accessing the CPU. The exporter can use this to flush caches and * undo anything else done in @begin_cpu_access. * * This callback is optional. * * Returns: * * 0 on success or a negative error code on failure. Can return * -ERESTARTSYS or -EINTR when the call has been interrupted and needs * to be restarted. */ int (*end_cpu_access)(struct dma_buf *, enum dma_data_direction); /** * @mmap: * * This callback is used by the dma_buf_mmap() function * * Note that the mapping needs to be incoherent, userspace is expected * to bracket CPU access using the DMA_BUF_IOCTL_SYNC interface. * * Because dma-buf buffers have invariant size over their lifetime, the * dma-buf core checks whether a vma is too large and rejects such * mappings. The exporter hence does not need to duplicate this check. * Drivers do not need to check this themselves. * * If an exporter needs to manually flush caches and hence needs to fake * coherency for mmap support, it needs to be able to zap all the ptes * pointing at the backing storage. Now linux mm needs a struct * address_space associated with the struct file stored in vma->vm_file * to do that with the function unmap_mapping_range. But the dma_buf * framework only backs every dma_buf fd with the anon_file struct file, * i.e. all dma_bufs share the same file. * * Hence exporters need to setup their own file (and address_space) * association by setting vma->vm_file and adjusting vma->vm_pgoff in * the dma_buf mmap callback. In the specific case of a gem driver the * exporter could use the shmem file already provided by gem (and set * vm_pgoff = 0). Exporters can then zap ptes by unmapping the * corresponding range of the struct address_space associated with their * own file. * * This callback is optional. * * Returns: * * 0 on success or a negative error code on failure. */ int (*mmap)(struct dma_buf *, struct vm_area_struct *vma); int (*vmap)(struct dma_buf *dmabuf, struct dma_buf_map *map); void (*vunmap)(struct dma_buf *dmabuf, struct dma_buf_map *map); }; /** * struct dma_buf - shared buffer object * * This represents a shared buffer, created by calling dma_buf_export(). The * userspace representation is a normal file descriptor, which can be created by * calling dma_buf_fd(). * * Shared dma buffers are reference counted using dma_buf_put() and * get_dma_buf(). * * Device DMA access is handled by the separate &struct dma_buf_attachment. */ struct dma_buf { /** * @size: * * Size of the buffer; invariant over the lifetime of the buffer. */ size_t size; /** * @file: * * File pointer used for sharing buffers across, and for refcounting. * See dma_buf_get() and dma_buf_put(). */ struct file *file; /** * @attachments: * * List of dma_buf_attachment that denotes all devices attached, * protected by &dma_resv lock @resv. */ struct list_head attachments; /** @ops: dma_buf_ops associated with this buffer object. */ const struct dma_buf_ops *ops; /** * @lock: * * Used internally to serialize list manipulation, attach/detach and * vmap/unmap. Note that in many cases this is superseeded by * dma_resv_lock() on @resv. */ struct mutex lock; /** * @vmapping_counter: * * Used internally to refcnt the vmaps returned by dma_buf_vmap(). * Protected by @lock. */ unsigned vmapping_counter; /** * @vmap_ptr: * The current vmap ptr if @vmapping_counter > 0. Protected by @lock. */ struct dma_buf_map vmap_ptr; /** * @exp_name: * * Name of the exporter; useful for debugging. See the * DMA_BUF_SET_NAME IOCTL. */ const char *exp_name; /** * @name: * * Userspace-provided name; useful for accounting and debugging, * protected by dma_resv_lock() on @resv and @name_lock for read access. */ const char *name; /** @name_lock: Spinlock to protect name acces for read access. */ spinlock_t name_lock; /** * @owner: * * Pointer to exporter module; used for refcounting when exporter is a * kernel module. */ struct module *owner; /** @list_node: node for dma_buf accounting and debugging. */ struct list_head list_node; /** @priv: exporter specific private data for this buffer object. */ void *priv; /** * @resv: * * Reservation object linked to this dma-buf. * * IMPLICIT SYNCHRONIZATION RULES: * * Drivers which support implicit synchronization of buffer access as * e.g. exposed in `Implicit Fence Poll Support`_ must follow the * below rules. * * - Drivers must add a shared fence through dma_resv_add_shared_fence() * for anything the userspace API considers a read access. This highly * depends upon the API and window system. * * - Similarly drivers must set the exclusive fence through * dma_resv_add_excl_fence() for anything the userspace API considers * write access. * * - Drivers may just always set the exclusive fence, since that only * causes unecessarily synchronization, but no correctness issues. * * - Some drivers only expose a synchronous userspace API with no * pipelining across drivers. These do not set any fences for their * access. An example here is v4l. * * DYNAMIC IMPORTER RULES: * * Dynamic importers, see dma_buf_attachment_is_dynamic(), have * additional constraints on how they set up fences: * * - Dynamic importers must obey the exclusive fence and wait for it to * signal before allowing access to the buffer's underlying storage * through the device. * * - Dynamic importers should set fences for any access that they can't * disable immediately from their &dma_buf_attach_ops.move_notify * callback. */ struct dma_resv *resv; /** @poll: for userspace poll support */ wait_queue_head_t poll; /** @cb_excl: for userspace poll support */ /** @cb_shared: for userspace poll support */ struct dma_buf_poll_cb_t { struct dma_fence_cb cb; wait_queue_head_t *poll; __poll_t active; } cb_in, cb_out; #ifdef CONFIG_DMABUF_SYSFS_STATS /** * @sysfs_entry: * * For exposing information about this buffer in sysfs. See also * `DMA-BUF statistics`_ for the uapi this enables. */ struct dma_buf_sysfs_entry { struct kobject kobj; struct dma_buf *dmabuf; } *sysfs_entry; #endif }; /** * struct dma_buf_attach_ops - importer operations for an attachment * * Attachment operations implemented by the importer. */ struct dma_buf_attach_ops { /** * @allow_peer2peer: * * If this is set to true the importer must be able to handle peer * resources without struct pages. */ bool allow_peer2peer; /** * @move_notify: [optional] notification that the DMA-buf is moving * * If this callback is provided the framework can avoid pinning the * backing store while mappings exists. * * This callback is called with the lock of the reservation object * associated with the dma_buf held and the mapping function must be * called with this lock held as well. This makes sure that no mapping * is created concurrently with an ongoing move operation. * * Mappings stay valid and are not directly affected by this callback. * But the DMA-buf can now be in a different physical location, so all * mappings should be destroyed and re-created as soon as possible. * * New mappings can be created after this callback returns, and will * point to the new location of the DMA-buf. */ void (*move_notify)(struct dma_buf_attachment *attach); }; /** * struct dma_buf_attachment - holds device-buffer attachment data * @dmabuf: buffer for this attachment. * @dev: device attached to the buffer. * @node: list of dma_buf_attachment, protected by dma_resv lock of the dmabuf. * @sgt: cached mapping. * @dir: direction of cached mapping. * @peer2peer: true if the importer can handle peer resources without pages. * @priv: exporter specific attachment data. * @importer_ops: importer operations for this attachment, if provided * dma_buf_map/unmap_attachment() must be called with the dma_resv lock held. * @importer_priv: importer specific attachment data. * * This structure holds the attachment information between the dma_buf buffer * and its user device(s). The list contains one attachment struct per device * attached to the buffer. * * An attachment is created by calling dma_buf_attach(), and released again by * calling dma_buf_detach(). The DMA mapping itself needed to initiate a * transfer is created by dma_buf_map_attachment() and freed again by calling * dma_buf_unmap_attachment(). */ struct dma_buf_attachment { struct dma_buf *dmabuf; struct device *dev; struct list_head node; struct sg_table *sgt; enum dma_data_direction dir; bool peer2peer; const struct dma_buf_attach_ops *importer_ops; void *importer_priv; void *priv; }; /** * struct dma_buf_export_info - holds information needed to export a dma_buf * @exp_name: name of the exporter - useful for debugging. * @owner: pointer to exporter module - used for refcounting kernel module * @ops: Attach allocator-defined dma buf ops to the new buffer * @size: Size of the buffer - invariant over the lifetime of the buffer * @flags: mode flags for the file * @resv: reservation-object, NULL to allocate default one * @priv: Attach private data of allocator to this buffer * * This structure holds the information required to export the buffer. Used * with dma_buf_export() only. */ struct dma_buf_export_info { const char *exp_name; struct module *owner; const struct dma_buf_ops *ops; size_t size; int flags; struct dma_resv *resv; void *priv; }; /** * DEFINE_DMA_BUF_EXPORT_INFO - helper macro for exporters * @name: export-info name * * DEFINE_DMA_BUF_EXPORT_INFO macro defines the &struct dma_buf_export_info, * zeroes it out and pre-populates exp_name in it. */ #define DEFINE_DMA_BUF_EXPORT_INFO(name) \ struct dma_buf_export_info name = { .exp_name = KBUILD_MODNAME, \ .owner = THIS_MODULE } /** * get_dma_buf - convenience wrapper for get_file. * @dmabuf: [in] pointer to dma_buf * * Increments the reference count on the dma-buf, needed in case of drivers * that either need to create additional references to the dmabuf on the * kernel side. For example, an exporter that needs to keep a dmabuf ptr * so that subsequent exports don't create a new dmabuf. */ static inline void get_dma_buf(struct dma_buf *dmabuf) { get_file(dmabuf->file); } /** * dma_buf_is_dynamic - check if a DMA-buf uses dynamic mappings. * @dmabuf: the DMA-buf to check * * Returns true if a DMA-buf exporter wants to be called with the dma_resv * locked for the map/unmap callbacks, false if it doesn't wants to be called * with the lock held. */ static inline bool dma_buf_is_dynamic(struct dma_buf *dmabuf) { return !!dmabuf->ops->pin; } /** * dma_buf_attachment_is_dynamic - check if a DMA-buf attachment uses dynamic * mappings * @attach: the DMA-buf attachment to check * * Returns true if a DMA-buf importer wants to call the map/unmap functions with * the dma_resv lock held. */ static inline bool dma_buf_attachment_is_dynamic(struct dma_buf_attachment *attach) { return !!attach->importer_ops; } struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf, struct device *dev); struct dma_buf_attachment * dma_buf_dynamic_attach(struct dma_buf *dmabuf, struct device *dev, const struct dma_buf_attach_ops *importer_ops, void *importer_priv); void dma_buf_detach(struct dma_buf *dmabuf, struct dma_buf_attachment *attach); int dma_buf_pin(struct dma_buf_attachment *attach); void dma_buf_unpin(struct dma_buf_attachment *attach); struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info); int dma_buf_fd(struct dma_buf *dmabuf, int flags); struct dma_buf *dma_buf_get(int fd); void dma_buf_put(struct dma_buf *dmabuf); struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *, enum dma_data_direction); void dma_buf_unmap_attachment(struct dma_buf_attachment *, struct sg_table *, enum dma_data_direction); void dma_buf_move_notify(struct dma_buf *dma_buf); int dma_buf_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction dir); int dma_buf_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction dir); int dma_buf_mmap(struct dma_buf *, struct vm_area_struct *, unsigned long); int dma_buf_vmap(struct dma_buf *dmabuf, struct dma_buf_map *map); void dma_buf_vunmap(struct dma_buf *dmabuf, struct dma_buf_map *map); #endif /* __DMA_BUF_H__ */ PK ! �S3W W usb_usual.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Interface to the libusual. * * Copyright (c) 2005 Pete Zaitcev <zaitcev@redhat.com> * Copyright (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net) * Copyright (c) 1999 Michael Gee (michael@linuxspecific.com) */ #ifndef __LINUX_USB_USUAL_H #define __LINUX_USB_USUAL_H /* We should do this for cleanliness... But other usb_foo.h do not do this. */ /* #include <linux/usb.h> */ /* * The flags field, which we store in usb_device_id.driver_info. * It is compatible with the old usb-storage flags in lower 24 bits. */ /* * Static flag definitions. We use this roundabout technique so that the * proc_info() routine can automatically display a message for each flag. */ #define US_DO_ALL_FLAGS \ US_FLAG(SINGLE_LUN, 0x00000001) \ /* allow access to only LUN 0 */ \ US_FLAG(NEED_OVERRIDE, 0x00000002) \ /* unusual_devs entry is necessary */ \ US_FLAG(SCM_MULT_TARG, 0x00000004) \ /* supports multiple targets */ \ US_FLAG(FIX_INQUIRY, 0x00000008) \ /* INQUIRY response needs faking */ \ US_FLAG(FIX_CAPACITY, 0x00000010) \ /* READ CAPACITY response too big */ \ US_FLAG(IGNORE_RESIDUE, 0x00000020) \ /* reported residue is wrong */ \ US_FLAG(BULK32, 0x00000040) \ /* Uses 32-byte CBW length */ \ US_FLAG(NOT_LOCKABLE, 0x00000080) \ /* PREVENT/ALLOW not supported */ \ US_FLAG(GO_SLOW, 0x00000100) \ /* Need delay after Command phase */ \ US_FLAG(NO_WP_DETECT, 0x00000200) \ /* Don't check for write-protect */ \ US_FLAG(MAX_SECTORS_64, 0x00000400) \ /* Sets max_sectors to 64 */ \ US_FLAG(IGNORE_DEVICE, 0x00000800) \ /* Don't claim device */ \ US_FLAG(CAPACITY_HEURISTICS, 0x00001000) \ /* sometimes sizes is too big */ \ US_FLAG(MAX_SECTORS_MIN,0x00002000) \ /* Sets max_sectors to arch min */ \ US_FLAG(BULK_IGNORE_TAG,0x00004000) \ /* Ignore tag mismatch in bulk operations */ \ US_FLAG(SANE_SENSE, 0x00008000) \ /* Sane Sense (> 18 bytes) */ \ US_FLAG(CAPACITY_OK, 0x00010000) \ /* READ CAPACITY response is correct */ \ US_FLAG(BAD_SENSE, 0x00020000) \ /* Bad Sense (never more than 18 bytes) */ \ US_FLAG(NO_READ_DISC_INFO, 0x00040000) \ /* cannot handle READ_DISC_INFO */ \ US_FLAG(NO_READ_CAPACITY_16, 0x00080000) \ /* cannot handle READ_CAPACITY_16 */ \ US_FLAG(INITIAL_READ10, 0x00100000) \ /* Initial READ(10) (and others) must be retried */ \ US_FLAG(WRITE_CACHE, 0x00200000) \ /* Write Cache status is not available */ \ US_FLAG(NEEDS_CAP16, 0x00400000) \ /* cannot handle READ_CAPACITY_10 */ \ US_FLAG(IGNORE_UAS, 0x00800000) \ /* Device advertises UAS but it is broken */ \ US_FLAG(BROKEN_FUA, 0x01000000) \ /* Cannot handle FUA in WRITE or READ CDBs */ \ US_FLAG(NO_ATA_1X, 0x02000000) \ /* Cannot handle ATA_12 or ATA_16 CDBs */ \ US_FLAG(NO_REPORT_OPCODES, 0x04000000) \ /* Cannot handle MI_REPORT_SUPPORTED_OPERATION_CODES */ \ US_FLAG(MAX_SECTORS_240, 0x08000000) \ /* Sets max_sectors to 240 */ \ US_FLAG(NO_REPORT_LUNS, 0x10000000) \ /* Cannot handle REPORT_LUNS */ \ US_FLAG(ALWAYS_SYNC, 0x20000000) \ /* lies about caching, so always sync */ \ US_FLAG(NO_SAME, 0x40000000) \ /* Cannot handle WRITE_SAME */ \ US_FLAG(SENSE_AFTER_SYNC, 0x80000000) \ /* Do REQUEST_SENSE after SYNCHRONIZE_CACHE */ \ #define US_FLAG(name, value) US_FL_##name = value , enum { US_DO_ALL_FLAGS }; #undef US_FLAG #include <linux/usb/storage.h> extern int usb_usual_ignore_device(struct usb_interface *intf); extern const struct usb_device_id usb_storage_usb_ids[]; #endif /* __LINUX_USB_USUAL_H */ PK ! IHvv� � cpu_rmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __LINUX_CPU_RMAP_H #define __LINUX_CPU_RMAP_H /* * cpu_rmap.c: CPU affinity reverse-map support * Copyright 2011 Solarflare Communications Inc. */ #include <linux/cpumask.h> #include <linux/gfp.h> #include <linux/slab.h> #include <linux/kref.h> /** * struct cpu_rmap - CPU affinity reverse-map * @refcount: kref for object * @size: Number of objects to be reverse-mapped * @used: Number of objects added * @obj: Pointer to array of object pointers * @near: For each CPU, the index and distance to the nearest object, * based on affinity masks */ struct cpu_rmap { struct kref refcount; u16 size, used; void **obj; struct { u16 index; u16 dist; } near[]; }; #define CPU_RMAP_DIST_INF 0xffff extern struct cpu_rmap *alloc_cpu_rmap(unsigned int size, gfp_t flags); extern int cpu_rmap_put(struct cpu_rmap *rmap); extern int cpu_rmap_add(struct cpu_rmap *rmap, void *obj); extern int cpu_rmap_update(struct cpu_rmap *rmap, u16 index, const struct cpumask *affinity); static inline u16 cpu_rmap_lookup_index(struct cpu_rmap *rmap, unsigned int cpu) { return rmap->near[cpu].index; } static inline void *cpu_rmap_lookup_obj(struct cpu_rmap *rmap, unsigned int cpu) { return rmap->obj[rmap->near[cpu].index]; } /** * alloc_irq_cpu_rmap - allocate CPU affinity reverse-map for IRQs * @size: Number of objects to be mapped * * Must be called in process context. */ static inline struct cpu_rmap *alloc_irq_cpu_rmap(unsigned int size) { return alloc_cpu_rmap(size, GFP_KERNEL); } extern void free_irq_cpu_rmap(struct cpu_rmap *rmap); extern int irq_cpu_rmap_add(struct cpu_rmap *rmap, int irq); #endif /* __LINUX_CPU_RMAP_H */ PK ! �(�-� � auxiliary_bus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019-2020 Intel Corporation * * Please see Documentation/driver-api/auxiliary_bus.rst for more information. */ #ifndef _AUXILIARY_BUS_H_ #define _AUXILIARY_BUS_H_ #include <linux/device.h> #include <linux/mod_devicetable.h> struct auxiliary_device { struct device dev; const char *name; u32 id; }; struct auxiliary_driver { int (*probe)(struct auxiliary_device *auxdev, const struct auxiliary_device_id *id); void (*remove)(struct auxiliary_device *auxdev); void (*shutdown)(struct auxiliary_device *auxdev); int (*suspend)(struct auxiliary_device *auxdev, pm_message_t state); int (*resume)(struct auxiliary_device *auxdev); const char *name; struct device_driver driver; const struct auxiliary_device_id *id_table; }; static inline struct auxiliary_device *to_auxiliary_dev(struct device *dev) { return container_of(dev, struct auxiliary_device, dev); } static inline struct auxiliary_driver *to_auxiliary_drv(struct device_driver *drv) { return container_of(drv, struct auxiliary_driver, driver); } int auxiliary_device_init(struct auxiliary_device *auxdev); int __auxiliary_device_add(struct auxiliary_device *auxdev, const char *modname); #define auxiliary_device_add(auxdev) __auxiliary_device_add(auxdev, KBUILD_MODNAME) static inline void auxiliary_device_uninit(struct auxiliary_device *auxdev) { put_device(&auxdev->dev); } static inline void auxiliary_device_delete(struct auxiliary_device *auxdev) { device_del(&auxdev->dev); } int __auxiliary_driver_register(struct auxiliary_driver *auxdrv, struct module *owner, const char *modname); #define auxiliary_driver_register(auxdrv) \ __auxiliary_driver_register(auxdrv, THIS_MODULE, KBUILD_MODNAME) void auxiliary_driver_unregister(struct auxiliary_driver *auxdrv); /** * module_auxiliary_driver() - Helper macro for registering an auxiliary driver * @__auxiliary_driver: auxiliary driver struct * * Helper macro for auxiliary drivers which do not do anything special in * module init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_auxiliary_driver(__auxiliary_driver) \ module_driver(__auxiliary_driver, auxiliary_driver_register, auxiliary_driver_unregister) struct auxiliary_device *auxiliary_find_device(struct device *start, const void *data, int (*match)(struct device *dev, const void *data)); #endif /* _AUXILIARY_BUS_H_ */ PK ! �& & eeprom_93xx46.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Module: eeprom_93xx46 * platform description for 93xx46 EEPROMs. */ #include <linux/gpio/consumer.h> struct eeprom_93xx46_platform_data { unsigned char flags; #define EE_ADDR8 0x01 /* 8 bit addr. cfg */ #define EE_ADDR16 0x02 /* 16 bit addr. cfg */ #define EE_READONLY 0x08 /* forbid writing */ #define EE_SIZE1K 0x10 /* 1 kb of data, that is a 93xx46 */ #define EE_SIZE2K 0x20 /* 2 kb of data, that is a 93xx56 */ #define EE_SIZE4K 0x40 /* 4 kb of data, that is a 93xx66 */ unsigned int quirks; /* Single word read transfers only; no sequential read. */ #define EEPROM_93XX46_QUIRK_SINGLE_WORD_READ (1 << 0) /* Instructions such as EWEN are (addrlen + 2) in length. */ #define EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH (1 << 1) /* Add extra cycle after address during a read */ #define EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE BIT(2) /* * optional hooks to control additional logic * before and after spi transfer. */ void (*prepare)(void *); void (*finish)(void *); struct gpio_desc *select; }; PK ! � ,� � virtio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VIRTIO_H #define _LINUX_VIRTIO_H /* Everything a virtio driver needs to work with any particular virtio * implementation. */ #include <linux/types.h> #include <linux/scatterlist.h> #include <linux/spinlock.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/gfp.h> /** * virtqueue - a queue to register buffers for sending or receiving. * @list: the chain of virtqueues for this device * @callback: the function to call when buffers are consumed (can be NULL). * @name: the name of this virtqueue (mainly for debugging) * @vdev: the virtio device this queue was created for. * @priv: a pointer for the virtqueue implementation to use. * @index: the zero-based ordinal number for this queue. * @num_free: number of elements we expect to be able to fit. * * A note on @num_free: with indirect buffers, each buffer needs one * element in the queue, otherwise a buffer will need one element per * sg element. */ struct virtqueue { struct list_head list; void (*callback)(struct virtqueue *vq); const char *name; struct virtio_device *vdev; unsigned int index; unsigned int num_free; void *priv; }; int virtqueue_add_outbuf(struct virtqueue *vq, struct scatterlist sg[], unsigned int num, void *data, gfp_t gfp); int virtqueue_add_inbuf(struct virtqueue *vq, struct scatterlist sg[], unsigned int num, void *data, gfp_t gfp); int virtqueue_add_inbuf_ctx(struct virtqueue *vq, struct scatterlist sg[], unsigned int num, void *data, void *ctx, gfp_t gfp); int virtqueue_add_sgs(struct virtqueue *vq, struct scatterlist *sgs[], unsigned int out_sgs, unsigned int in_sgs, void *data, gfp_t gfp); bool virtqueue_kick(struct virtqueue *vq); bool virtqueue_kick_prepare(struct virtqueue *vq); bool virtqueue_notify(struct virtqueue *vq); void *virtqueue_get_buf(struct virtqueue *vq, unsigned int *len); void *virtqueue_get_buf_ctx(struct virtqueue *vq, unsigned int *len, void **ctx); void virtqueue_disable_cb(struct virtqueue *vq); bool virtqueue_enable_cb(struct virtqueue *vq); unsigned virtqueue_enable_cb_prepare(struct virtqueue *vq); bool virtqueue_poll(struct virtqueue *vq, unsigned); bool virtqueue_enable_cb_delayed(struct virtqueue *vq); void *virtqueue_detach_unused_buf(struct virtqueue *vq); unsigned int virtqueue_get_vring_size(struct virtqueue *vq); bool virtqueue_is_broken(struct virtqueue *vq); const struct vring *virtqueue_get_vring(struct virtqueue *vq); dma_addr_t virtqueue_get_desc_addr(struct virtqueue *vq); dma_addr_t virtqueue_get_avail_addr(struct virtqueue *vq); dma_addr_t virtqueue_get_used_addr(struct virtqueue *vq); /** * virtio_device - representation of a device using virtio * @index: unique position on the virtio bus * @failed: saved value for VIRTIO_CONFIG_S_FAILED bit (for restore) * @config_enabled: configuration change reporting enabled * @config_change_pending: configuration change reported while disabled * @config_lock: protects configuration change reporting * @dev: underlying device. * @id: the device type identification (used to match it with a driver). * @config: the configuration ops for this device. * @vringh_config: configuration ops for host vrings. * @vqs: the list of virtqueues for this device. * @features: the features supported by both driver and device. * @priv: private pointer for the driver's use. */ struct virtio_device { int index; bool failed; bool config_enabled; bool config_change_pending; spinlock_t config_lock; spinlock_t vqs_list_lock; /* Protects VQs list access */ struct device dev; struct virtio_device_id id; const struct virtio_config_ops *config; const struct vringh_config_ops *vringh_config; struct list_head vqs; u64 features; void *priv; }; static inline struct virtio_device *dev_to_virtio(struct device *_dev) { return container_of(_dev, struct virtio_device, dev); } void virtio_add_status(struct virtio_device *dev, unsigned int status); int register_virtio_device(struct virtio_device *dev); void unregister_virtio_device(struct virtio_device *dev); bool is_virtio_device(struct device *dev); void virtio_break_device(struct virtio_device *dev); void virtio_config_changed(struct virtio_device *dev); #ifdef CONFIG_PM_SLEEP int virtio_device_freeze(struct virtio_device *dev); int virtio_device_restore(struct virtio_device *dev); #endif size_t virtio_max_dma_size(struct virtio_device *vdev); #define virtio_device_for_each_vq(vdev, vq) \ list_for_each_entry(vq, &vdev->vqs, list) /** * virtio_driver - operations for a virtio I/O driver * @driver: underlying device driver (populate name and owner). * @id_table: the ids serviced by this driver. * @feature_table: an array of feature numbers supported by this driver. * @feature_table_size: number of entries in the feature table array. * @feature_table_legacy: same as feature_table but when working in legacy mode. * @feature_table_size_legacy: number of entries in feature table legacy array. * @probe: the function to call when a device is found. Returns 0 or -errno. * @scan: optional function to call after successful probe; intended * for virtio-scsi to invoke a scan. * @remove: the function to call when a device is removed. * @config_changed: optional function to call when the device configuration * changes; may be called in interrupt context. * @freeze: optional function to call during suspend/hibernation. * @restore: optional function to call on resume. */ struct virtio_driver { struct device_driver driver; const struct virtio_device_id *id_table; const unsigned int *feature_table; unsigned int feature_table_size; const unsigned int *feature_table_legacy; unsigned int feature_table_size_legacy; int (*validate)(struct virtio_device *dev); int (*probe)(struct virtio_device *dev); void (*scan)(struct virtio_device *dev); void (*remove)(struct virtio_device *dev); void (*config_changed)(struct virtio_device *dev); #ifdef CONFIG_PM int (*freeze)(struct virtio_device *dev); int (*restore)(struct virtio_device *dev); #endif }; static inline struct virtio_driver *drv_to_virtio(struct device_driver *drv) { return container_of(drv, struct virtio_driver, driver); } int register_virtio_driver(struct virtio_driver *drv); void unregister_virtio_driver(struct virtio_driver *drv); /* module_virtio_driver() - Helper macro for drivers that don't do * anything special in module init/exit. This eliminates a lot of * boilerplate. Each module may only use this macro once, and * calling it replaces module_init() and module_exit() */ #define module_virtio_driver(__virtio_driver) \ module_driver(__virtio_driver, register_virtio_driver, \ unregister_virtio_driver) #endif /* _LINUX_VIRTIO_H */ PK ! � 7� � bpfptr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* A pointer that can point to either kernel or userspace memory. */ #ifndef _LINUX_BPFPTR_H #define _LINUX_BPFPTR_H #include <linux/sockptr.h> typedef sockptr_t bpfptr_t; static inline bool bpfptr_is_kernel(bpfptr_t bpfptr) { return bpfptr.is_kernel; } static inline bpfptr_t KERNEL_BPFPTR(void *p) { return (bpfptr_t) { .kernel = p, .is_kernel = true }; } static inline bpfptr_t USER_BPFPTR(void __user *p) { return (bpfptr_t) { .user = p }; } static inline bpfptr_t make_bpfptr(u64 addr, bool is_kernel) { if (is_kernel) return KERNEL_BPFPTR((void*) (uintptr_t) addr); else return USER_BPFPTR(u64_to_user_ptr(addr)); } static inline bool bpfptr_is_null(bpfptr_t bpfptr) { if (bpfptr_is_kernel(bpfptr)) return !bpfptr.kernel; return !bpfptr.user; } static inline void bpfptr_add(bpfptr_t *bpfptr, size_t val) { if (bpfptr_is_kernel(*bpfptr)) bpfptr->kernel += val; else bpfptr->user += val; } static inline int copy_from_bpfptr_offset(void *dst, bpfptr_t src, size_t offset, size_t size) { if (!bpfptr_is_kernel(src)) return copy_from_user(dst, src.user + offset, size); return copy_from_kernel_nofault(dst, src.kernel + offset, size); } static inline int copy_from_bpfptr(void *dst, bpfptr_t src, size_t size) { return copy_from_bpfptr_offset(dst, src, 0, size); } static inline int copy_to_bpfptr_offset(bpfptr_t dst, size_t offset, const void *src, size_t size) { return copy_to_sockptr_offset((sockptr_t) dst, offset, src, size); } static inline void *kvmemdup_bpfptr(bpfptr_t src, size_t len) { void *p = kvmalloc(len, GFP_USER | __GFP_NOWARN); if (!p) return ERR_PTR(-ENOMEM); if (copy_from_bpfptr(p, src, len)) { kvfree(p); return ERR_PTR(-EFAULT); } return p; } static inline long strncpy_from_bpfptr(char *dst, bpfptr_t src, size_t count) { if (bpfptr_is_kernel(src)) return strncpy_from_kernel_nofault(dst, src.kernel, count); return strncpy_from_user(dst, src.user, count); } #endif /* _LINUX_BPFPTR_H */ PK ! Vi��� � zsmalloc.hnu �[��� /* * zsmalloc memory allocator * * Copyright (C) 2011 Nitin Gupta * Copyright (C) 2012, 2013 Minchan Kim * * This code is released using a dual license strategy: BSD/GPL * You can choose the license that better fits your requirements. * * Released under the terms of 3-clause BSD License * Released under the terms of GNU General Public License Version 2.0 */ #ifndef _ZS_MALLOC_H_ #define _ZS_MALLOC_H_ #include <linux/types.h> /* * zsmalloc mapping modes * * NOTE: These only make a difference when a mapped object spans pages. */ enum zs_mapmode { ZS_MM_RW, /* normal read-write mapping */ ZS_MM_RO, /* read-only (no copy-out at unmap time) */ ZS_MM_WO /* write-only (no copy-in at map time) */ /* * NOTE: ZS_MM_WO should only be used for initializing new * (uninitialized) allocations. Partial writes to already * initialized allocations should use ZS_MM_RW to preserve the * existing data. */ }; struct zs_pool_stats { /* How many pages were migrated (freed) */ atomic_long_t pages_compacted; }; struct zs_pool; struct zs_pool *zs_create_pool(const char *name); void zs_destroy_pool(struct zs_pool *pool); unsigned long zs_malloc(struct zs_pool *pool, size_t size, gfp_t flags); void zs_free(struct zs_pool *pool, unsigned long obj); size_t zs_huge_class_size(struct zs_pool *pool); void *zs_map_object(struct zs_pool *pool, unsigned long handle, enum zs_mapmode mm); void zs_unmap_object(struct zs_pool *pool, unsigned long handle); unsigned long zs_get_total_pages(struct zs_pool *pool); unsigned long zs_compact(struct zs_pool *pool); void zs_pool_stats(struct zs_pool *pool, struct zs_pool_stats *stats); #endif PK ! 9v/�� � memregion.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _MEMREGION_H_ #define _MEMREGION_H_ #include <linux/types.h> #include <linux/errno.h> struct memregion_info { int target_node; }; #ifdef CONFIG_MEMREGION int memregion_alloc(gfp_t gfp); void memregion_free(int id); #else static inline int memregion_alloc(gfp_t gfp) { return -ENOMEM; } static inline void memregion_free(int id) { } #endif #endif /* _MEMREGION_H_ */ PK ! �o��3 3 acpi_mdio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ACPI helper for the MDIO (Ethernet PHY) API */ #ifndef __LINUX_ACPI_MDIO_H #define __LINUX_ACPI_MDIO_H #include <linux/phy.h> #if IS_ENABLED(CONFIG_ACPI_MDIO) int __acpi_mdiobus_register(struct mii_bus *mdio, struct fwnode_handle *fwnode, struct module *owner); static inline int acpi_mdiobus_register(struct mii_bus *mdio, struct fwnode_handle *handle) { return __acpi_mdiobus_register(mdio, handle, THIS_MODULE); } #else /* CONFIG_ACPI_MDIO */ static inline int acpi_mdiobus_register(struct mii_bus *mdio, struct fwnode_handle *fwnode) { /* * Fall back to mdiobus_register() function to register a bus. * This way, we don't have to keep compat bits around in drivers. */ return mdiobus_register(mdio); } #endif #endif /* __LINUX_ACPI_MDIO_H */ PK ! � � � vlynq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2006, 2007 Eugene Konev <ejka@openwrt.org> */ #ifndef __VLYNQ_H__ #define __VLYNQ_H__ #include <linux/device.h> #include <linux/types.h> struct module; #define VLYNQ_NUM_IRQS 32 struct vlynq_mapping { u32 size; u32 offset; }; enum vlynq_divisor { vlynq_div_auto = 0, vlynq_ldiv1, vlynq_ldiv2, vlynq_ldiv3, vlynq_ldiv4, vlynq_ldiv5, vlynq_ldiv6, vlynq_ldiv7, vlynq_ldiv8, vlynq_rdiv1, vlynq_rdiv2, vlynq_rdiv3, vlynq_rdiv4, vlynq_rdiv5, vlynq_rdiv6, vlynq_rdiv7, vlynq_rdiv8, vlynq_div_external }; struct vlynq_device_id { u32 id; enum vlynq_divisor divisor; unsigned long driver_data; }; struct vlynq_regs; struct vlynq_device { u32 id, dev_id; int local_irq; int remote_irq; enum vlynq_divisor divisor; u32 regs_start, regs_end; u32 mem_start, mem_end; u32 irq_start, irq_end; int irq; int enabled; struct vlynq_regs *local; struct vlynq_regs *remote; struct device dev; }; struct vlynq_driver { char *name; struct vlynq_device_id *id_table; int (*probe)(struct vlynq_device *dev, struct vlynq_device_id *id); void (*remove)(struct vlynq_device *dev); struct device_driver driver; }; struct plat_vlynq_ops { int (*on)(struct vlynq_device *dev); void (*off)(struct vlynq_device *dev); }; static inline struct vlynq_driver *to_vlynq_driver(struct device_driver *drv) { return container_of(drv, struct vlynq_driver, driver); } static inline struct vlynq_device *to_vlynq_device(struct device *device) { return container_of(device, struct vlynq_device, dev); } extern struct bus_type vlynq_bus_type; extern int __vlynq_register_driver(struct vlynq_driver *driver, struct module *owner); static inline int vlynq_register_driver(struct vlynq_driver *driver) { return __vlynq_register_driver(driver, THIS_MODULE); } static inline void *vlynq_get_drvdata(struct vlynq_device *dev) { return dev_get_drvdata(&dev->dev); } static inline void vlynq_set_drvdata(struct vlynq_device *dev, void *data) { dev_set_drvdata(&dev->dev, data); } static inline u32 vlynq_mem_start(struct vlynq_device *dev) { return dev->mem_start; } static inline u32 vlynq_mem_end(struct vlynq_device *dev) { return dev->mem_end; } static inline u32 vlynq_mem_len(struct vlynq_device *dev) { return dev->mem_end - dev->mem_start + 1; } static inline int vlynq_virq_to_irq(struct vlynq_device *dev, int virq) { int irq = dev->irq_start + virq; if ((irq < dev->irq_start) || (irq > dev->irq_end)) return -EINVAL; return irq; } static inline int vlynq_irq_to_virq(struct vlynq_device *dev, int irq) { if ((irq < dev->irq_start) || (irq > dev->irq_end)) return -EINVAL; return irq - dev->irq_start; } extern void vlynq_unregister_driver(struct vlynq_driver *driver); extern int vlynq_enable_device(struct vlynq_device *dev); extern void vlynq_disable_device(struct vlynq_device *dev); extern int vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset, struct vlynq_mapping *mapping); extern int vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset, struct vlynq_mapping *mapping); extern int vlynq_set_local_irq(struct vlynq_device *dev, int virq); extern int vlynq_set_remote_irq(struct vlynq_device *dev, int virq); #endif /* __VLYNQ_H__ */ PK ! ���� � idle_inject.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2018 Linaro Ltd * * Author: Daniel Lezcano <daniel.lezcano@linaro.org> * */ #ifndef __IDLE_INJECT_H__ #define __IDLE_INJECT_H__ /* private idle injection device structure */ struct idle_inject_device; struct idle_inject_device *idle_inject_register(struct cpumask *cpumask); void idle_inject_unregister(struct idle_inject_device *ii_dev); int idle_inject_start(struct idle_inject_device *ii_dev); void idle_inject_stop(struct idle_inject_device *ii_dev); void idle_inject_set_duration(struct idle_inject_device *ii_dev, unsigned int run_duration_us, unsigned int idle_duration_us); void idle_inject_get_duration(struct idle_inject_device *ii_dev, unsigned int *run_duration_us, unsigned int *idle_duration_us); void idle_inject_set_latency(struct idle_inject_device *ii_dev, unsigned int latency_us); #endif /* __IDLE_INJECT_H__ */ PK ! &�➍3 �3 dma-map-ops.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This header is for implementations of dma_map_ops and related code. * It should not be included in drivers just using the DMA API. */ #ifndef _LINUX_DMA_MAP_OPS_H #define _LINUX_DMA_MAP_OPS_H #include <linux/dma-mapping.h> #include <linux/pgtable.h> struct cma; struct dma_map_ops { void *(*alloc)(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); void (*free)(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle, unsigned long attrs); struct page *(*alloc_pages)(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); void (*free_pages)(struct device *dev, size_t size, struct page *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir); struct sg_table *(*alloc_noncontiguous)(struct device *dev, size_t size, enum dma_data_direction dir, gfp_t gfp, unsigned long attrs); void (*free_noncontiguous)(struct device *dev, size_t size, struct sg_table *sgt, enum dma_data_direction dir); int (*mmap)(struct device *, struct vm_area_struct *, void *, dma_addr_t, size_t, unsigned long attrs); int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs); dma_addr_t (*map_page)(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction dir, unsigned long attrs); void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction dir, unsigned long attrs); /* * map_sg should return a negative error code on error. See * dma_map_sgtable() for a list of appropriate error codes * and their meanings. */ int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs); void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs); dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, unsigned long attrs); void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction dir, unsigned long attrs); void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction dir); void (*sync_single_for_device)(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction dir); void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir); void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir); void (*cache_sync)(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction); int (*dma_supported)(struct device *dev, u64 mask); u64 (*get_required_mask)(struct device *dev); size_t (*max_mapping_size)(struct device *dev); size_t (*opt_mapping_size)(void); unsigned long (*get_merge_boundary)(struct device *dev); }; #ifdef CONFIG_DMA_OPS #include <asm/dma-mapping.h> static inline const struct dma_map_ops *get_dma_ops(struct device *dev) { if (dev->dma_ops) return dev->dma_ops; return get_arch_dma_ops(dev->bus); } static inline void set_dma_ops(struct device *dev, const struct dma_map_ops *dma_ops) { dev->dma_ops = dma_ops; } #else /* CONFIG_DMA_OPS */ static inline const struct dma_map_ops *get_dma_ops(struct device *dev) { return NULL; } static inline void set_dma_ops(struct device *dev, const struct dma_map_ops *dma_ops) { } #endif /* CONFIG_DMA_OPS */ #ifdef CONFIG_DMA_CMA extern struct cma *dma_contiguous_default_area; static inline struct cma *dev_get_cma_area(struct device *dev) { if (dev && dev->cma_area) return dev->cma_area; return dma_contiguous_default_area; } void dma_contiguous_reserve(phys_addr_t addr_limit); int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base, phys_addr_t limit, struct cma **res_cma, bool fixed); struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, unsigned int order, bool no_warn); bool dma_release_from_contiguous(struct device *dev, struct page *pages, int count); struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp); void dma_free_contiguous(struct device *dev, struct page *page, size_t size); void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size); #else /* CONFIG_DMA_CMA */ static inline struct cma *dev_get_cma_area(struct device *dev) { return NULL; } static inline void dma_contiguous_reserve(phys_addr_t limit) { } static inline int dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base, phys_addr_t limit, struct cma **res_cma, bool fixed) { return -ENOSYS; } static inline struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, unsigned int order, bool no_warn) { return NULL; } static inline bool dma_release_from_contiguous(struct device *dev, struct page *pages, int count) { return false; } /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */ static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp) { return NULL; } static inline void dma_free_contiguous(struct device *dev, struct page *page, size_t size) { __free_pages(page, get_order(size)); } #endif /* CONFIG_DMA_CMA*/ #ifdef CONFIG_DMA_PERNUMA_CMA void dma_pernuma_cma_reserve(void); #else static inline void dma_pernuma_cma_reserve(void) { } #endif /* CONFIG_DMA_PERNUMA_CMA */ #ifdef CONFIG_DMA_DECLARE_COHERENT int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, dma_addr_t device_addr, size_t size); void dma_release_coherent_memory(struct device *dev); int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, dma_addr_t *dma_handle, void **ret); int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, size_t size, int *ret); #else static inline int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, dma_addr_t device_addr, size_t size) { return -ENOSYS; } #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) #define dma_release_from_dev_coherent(dev, order, vaddr) (0) #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) static inline void dma_release_coherent_memory(struct device *dev) { } #endif /* CONFIG_DMA_DECLARE_COHERENT */ #ifdef CONFIG_DMA_GLOBAL_POOL void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size, dma_addr_t *dma_handle); int dma_release_from_global_coherent(int order, void *vaddr); int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, size_t size, int *ret); int dma_init_global_coherent(phys_addr_t phys_addr, size_t size); #else static inline void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size, dma_addr_t *dma_handle) { return NULL; } static inline int dma_release_from_global_coherent(int order, void *vaddr) { return 0; } static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, size_t size, int *ret) { return 0; } #endif /* CONFIG_DMA_GLOBAL_POOL */ /* * This is the actual return value from the ->alloc_noncontiguous method. * The users of the DMA API should only care about the sg_table, but to make * the DMA-API internal vmaping and freeing easier we stash away the page * array as well (except for the fallback case). This can go away any time, * e.g. when a vmap-variant that takes a scatterlist comes along. */ struct dma_sgt_handle { struct sg_table sgt; struct page **pages; }; #define sgt_handle(sgt) \ container_of((sgt), struct dma_sgt_handle, sgt) int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs); int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs); struct page *dma_common_alloc_pages(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir); struct page **dma_common_find_pages(void *cpu_addr); void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot, const void *caller); void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot, const void *caller); void dma_common_free_remap(void *cpu_addr, size_t size); struct page *dma_alloc_from_pool(struct device *dev, size_t size, void **cpu_addr, gfp_t flags, bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t)); bool dma_free_from_pool(struct device *dev, void *start, size_t size); int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start, dma_addr_t dma_start, u64 size); #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) extern bool dma_default_coherent; static inline bool dev_is_dma_coherent(struct device *dev) { return dev->dma_coherent; } #else static inline bool dev_is_dma_coherent(struct device *dev) { return true; } #endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */ void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); void arch_dma_free(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs); #ifdef CONFIG_MMU /* * Page protection so that devices that can't snoop CPU caches can use the * memory coherently. We default to pgprot_noncached which is usually used * for ioremap as a safe bet, but architectures can override this with less * strict semantics if possible. */ #ifndef pgprot_dmacoherent #define pgprot_dmacoherent(prot) pgprot_noncached(prot) #endif pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs); #else static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs) { return prot; /* no protection bits supported without page tables */ } #endif /* CONFIG_MMU */ #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, enum dma_data_direction dir); #else static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, enum dma_data_direction dir) { } #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */ #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, enum dma_data_direction dir); #else static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, enum dma_data_direction dir) { } #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */ #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL void arch_sync_dma_for_cpu_all(void); #else static inline void arch_sync_dma_for_cpu_all(void) { } #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */ #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT void arch_dma_prep_coherent(struct page *page, size_t size); #else static inline void arch_dma_prep_coherent(struct page *page, size_t size) { } #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */ #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN void arch_dma_mark_clean(phys_addr_t paddr, size_t size); #else static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size) { } #endif /* ARCH_HAS_DMA_MARK_CLEAN */ void *arch_dma_set_uncached(void *addr, size_t size); void arch_dma_clear_uncached(void *addr, size_t size); #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr); bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle); bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg, int nents); bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg, int nents); #else #define arch_dma_map_page_direct(d, a) (false) #define arch_dma_unmap_page_direct(d, a) (false) #define arch_dma_map_sg_direct(d, s, n) (false) #define arch_dma_unmap_sg_direct(d, s, n) (false) #endif #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, const struct iommu_ops *iommu, bool coherent); #else static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, const struct iommu_ops *iommu, bool coherent) { } #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS void arch_teardown_dma_ops(struct device *dev); #else static inline void arch_teardown_dma_ops(struct device *dev) { } #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */ #ifdef CONFIG_DMA_API_DEBUG void dma_debug_add_bus(struct bus_type *bus); void debug_dma_dump_mappings(struct device *dev); #else static inline void dma_debug_add_bus(struct bus_type *bus) { } static inline void debug_dma_dump_mappings(struct device *dev) { } #endif /* CONFIG_DMA_API_DEBUG */ extern const struct dma_map_ops dma_dummy_ops; #endif /* _LINUX_DMA_MAP_OPS_H */ PK ! |b�!| | mempolicy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * NUMA memory policies for Linux. * Copyright 2003,2004 Andi Kleen SuSE Labs */ #ifndef _LINUX_MEMPOLICY_H #define _LINUX_MEMPOLICY_H 1 #include <linux/sched.h> #include <linux/mmzone.h> #include <linux/dax.h> #include <linux/slab.h> #include <linux/rbtree.h> #include <linux/spinlock.h> #include <linux/nodemask.h> #include <linux/pagemap.h> #include <uapi/linux/mempolicy.h> struct mm_struct; #ifdef CONFIG_NUMA /* * Describe a memory policy. * * A mempolicy can be either associated with a process or with a VMA. * For VMA related allocations the VMA policy is preferred, otherwise * the process policy is used. Interrupts ignore the memory policy * of the current process. * * Locking policy for interleave: * In process context there is no locking because only the process accesses * its own state. All vma manipulation is somewhat protected by a down_read on * mmap_lock. * * Freeing policy: * Mempolicy objects are reference counted. A mempolicy will be freed when * mpol_put() decrements the reference count to zero. * * Duplicating policy objects: * mpol_dup() allocates a new mempolicy and copies the specified mempolicy * to the new storage. The reference count of the new object is initialized * to 1, representing the caller of mpol_dup(). */ struct mempolicy { atomic_t refcnt; unsigned short mode; /* See MPOL_* above */ unsigned short flags; /* See set_mempolicy() MPOL_F_* above */ nodemask_t nodes; /* interleave/bind/perfer */ union { nodemask_t cpuset_mems_allowed; /* relative to these nodes */ nodemask_t user_nodemask; /* nodemask passed by user */ } w; }; /* * Support for managing mempolicy data objects (clone, copy, destroy) * The default fast path of a NULL MPOL_DEFAULT policy is always inlined. */ extern void __mpol_put(struct mempolicy *pol); static inline void mpol_put(struct mempolicy *pol) { if (pol) __mpol_put(pol); } /* * Does mempolicy pol need explicit unref after use? * Currently only needed for shared policies. */ static inline int mpol_needs_cond_ref(struct mempolicy *pol) { return (pol && (pol->flags & MPOL_F_SHARED)); } static inline void mpol_cond_put(struct mempolicy *pol) { if (mpol_needs_cond_ref(pol)) __mpol_put(pol); } extern struct mempolicy *__mpol_dup(struct mempolicy *pol); static inline struct mempolicy *mpol_dup(struct mempolicy *pol) { if (pol) pol = __mpol_dup(pol); return pol; } #define vma_policy(vma) ((vma)->vm_policy) static inline void mpol_get(struct mempolicy *pol) { if (pol) atomic_inc(&pol->refcnt); } extern bool __mpol_equal(struct mempolicy *a, struct mempolicy *b); static inline bool mpol_equal(struct mempolicy *a, struct mempolicy *b) { if (a == b) return true; return __mpol_equal(a, b); } /* * Tree of shared policies for a shared memory region. * Maintain the policies in a pseudo mm that contains vmas. The vmas * carry the policy. As a special twist the pseudo mm is indexed in pages, not * bytes, so that we can work with shared memory segments bigger than * unsigned long. */ struct sp_node { struct rb_node nd; unsigned long start, end; struct mempolicy *policy; }; struct shared_policy { struct rb_root root; rwlock_t lock; }; int vma_dup_policy(struct vm_area_struct *src, struct vm_area_struct *dst); void mpol_shared_policy_init(struct shared_policy *sp, struct mempolicy *mpol); int mpol_set_shared_policy(struct shared_policy *info, struct vm_area_struct *vma, struct mempolicy *new); void mpol_free_shared_policy(struct shared_policy *p); struct mempolicy *mpol_shared_policy_lookup(struct shared_policy *sp, unsigned long idx); struct mempolicy *get_task_policy(struct task_struct *p); struct mempolicy *__get_vma_policy(struct vm_area_struct *vma, unsigned long addr); bool vma_policy_mof(struct vm_area_struct *vma); extern void numa_default_policy(void); extern void numa_policy_init(void); extern void mpol_rebind_task(struct task_struct *tsk, const nodemask_t *new); extern void mpol_rebind_mm(struct mm_struct *mm, nodemask_t *new); extern int huge_node(struct vm_area_struct *vma, unsigned long addr, gfp_t gfp_flags, struct mempolicy **mpol, nodemask_t **nodemask); extern bool init_nodemask_of_mempolicy(nodemask_t *mask); extern bool mempolicy_in_oom_domain(struct task_struct *tsk, const nodemask_t *mask); extern nodemask_t *policy_nodemask(gfp_t gfp, struct mempolicy *policy); static inline nodemask_t *policy_nodemask_current(gfp_t gfp) { struct mempolicy *mpol = get_task_policy(current); return policy_nodemask(gfp, mpol); } extern unsigned int mempolicy_slab_node(void); extern enum zone_type policy_zone; static inline void check_highest_zone(enum zone_type k) { if (k > policy_zone && k != ZONE_MOVABLE) policy_zone = k; } int do_migrate_pages(struct mm_struct *mm, const nodemask_t *from, const nodemask_t *to, int flags); #ifdef CONFIG_TMPFS extern int mpol_parse_str(char *str, struct mempolicy **mpol); #endif extern void mpol_to_str(char *buffer, int maxlen, struct mempolicy *pol); /* Check if a vma is migratable */ extern bool vma_migratable(struct vm_area_struct *vma); extern int mpol_misplaced(struct page *, struct vm_area_struct *, unsigned long); extern void mpol_put_task_policy(struct task_struct *); extern bool numa_demotion_enabled; static inline bool mpol_is_preferred_many(struct mempolicy *pol) { return (pol->mode == MPOL_PREFERRED_MANY); } #else struct mempolicy {}; static inline bool mpol_equal(struct mempolicy *a, struct mempolicy *b) { return true; } static inline void mpol_put(struct mempolicy *p) { } static inline void mpol_cond_put(struct mempolicy *pol) { } static inline void mpol_get(struct mempolicy *pol) { } struct shared_policy {}; static inline void mpol_shared_policy_init(struct shared_policy *sp, struct mempolicy *mpol) { } static inline void mpol_free_shared_policy(struct shared_policy *p) { } static inline struct mempolicy * mpol_shared_policy_lookup(struct shared_policy *sp, unsigned long idx) { return NULL; } #define vma_policy(vma) NULL static inline int vma_dup_policy(struct vm_area_struct *src, struct vm_area_struct *dst) { return 0; } static inline void numa_policy_init(void) { } static inline void numa_default_policy(void) { } static inline void mpol_rebind_task(struct task_struct *tsk, const nodemask_t *new) { } static inline void mpol_rebind_mm(struct mm_struct *mm, nodemask_t *new) { } static inline int huge_node(struct vm_area_struct *vma, unsigned long addr, gfp_t gfp_flags, struct mempolicy **mpol, nodemask_t **nodemask) { *mpol = NULL; *nodemask = NULL; return 0; } static inline bool init_nodemask_of_mempolicy(nodemask_t *m) { return false; } static inline int do_migrate_pages(struct mm_struct *mm, const nodemask_t *from, const nodemask_t *to, int flags) { return 0; } static inline void check_highest_zone(int k) { } #ifdef CONFIG_TMPFS static inline int mpol_parse_str(char *str, struct mempolicy **mpol) { return 1; /* error */ } #endif static inline int mpol_misplaced(struct page *page, struct vm_area_struct *vma, unsigned long address) { return -1; /* no node preference */ } static inline void mpol_put_task_policy(struct task_struct *task) { } static inline nodemask_t *policy_nodemask_current(gfp_t gfp) { return NULL; } #define numa_demotion_enabled false static inline bool mpol_is_preferred_many(struct mempolicy *pol) { return false; } #endif /* CONFIG_NUMA */ #endif PK ! ԯ�c� � uts.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_UTS_H #define _LINUX_UTS_H /* * Defines for what uname() should return */ #ifndef UTS_SYSNAME #define UTS_SYSNAME "Linux" #endif #ifndef UTS_NODENAME #define UTS_NODENAME CONFIG_DEFAULT_HOSTNAME /* set by sethostname() */ #endif #ifndef UTS_DOMAINNAME #define UTS_DOMAINNAME "(none)" /* set by setdomainname() */ #endif #endif PK ! ���&�w �w fscrypt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * fscrypt.h: declarations for per-file encryption * * Filesystems that implement per-file encryption must include this header * file. * * Copyright (C) 2015, Google, Inc. * * Written by Michael Halcrow, 2015. * Modified by Jaegeuk Kim, 2015. */ #ifndef _LINUX_FSCRYPT_H #define _LINUX_FSCRYPT_H #include <linux/fs.h> #include <linux/mm.h> #include <linux/slab.h> #include <uapi/linux/fscrypt.h> #define FS_CRYPTO_BLOCK_SIZE 16 union fscrypt_policy; struct fscrypt_info; struct seq_file; struct fscrypt_str { unsigned char *name; u32 len; }; struct fscrypt_name { const struct qstr *usr_fname; struct fscrypt_str disk_name; u32 hash; u32 minor_hash; struct fscrypt_str crypto_buf; bool is_nokey_name; }; #define FSTR_INIT(n, l) { .name = n, .len = l } #define FSTR_TO_QSTR(f) QSTR_INIT((f)->name, (f)->len) #define fname_name(p) ((p)->disk_name.name) #define fname_len(p) ((p)->disk_name.len) /* Maximum value for the third parameter of fscrypt_operations.set_context(). */ #define FSCRYPT_SET_CONTEXT_MAX_SIZE 40 #ifdef CONFIG_FS_ENCRYPTION /* * If set, the fscrypt bounce page pool won't be allocated (unless another * filesystem needs it). Set this if the filesystem always uses its own bounce * pages for writes and therefore won't need the fscrypt bounce page pool. */ #define FS_CFLG_OWN_PAGES (1U << 1) /* Crypto operations for filesystems */ struct fscrypt_operations { /* Set of optional flags; see above for allowed flags */ unsigned int flags; /* * If set, this is a filesystem-specific key description prefix that * will be accepted for "logon" keys for v1 fscrypt policies, in * addition to the generic prefix "fscrypt:". This functionality is * deprecated, so new filesystems shouldn't set this field. */ const char *key_prefix; /* * Get the fscrypt context of the given inode. * * @inode: the inode whose context to get * @ctx: the buffer into which to get the context * @len: length of the @ctx buffer in bytes * * Return: On success, returns the length of the context in bytes; this * may be less than @len. On failure, returns -ENODATA if the * inode doesn't have a context, -ERANGE if the context is * longer than @len, or another -errno code. */ int (*get_context)(struct inode *inode, void *ctx, size_t len); /* * Set an fscrypt context on the given inode. * * @inode: the inode whose context to set. The inode won't already have * an fscrypt context. * @ctx: the context to set * @len: length of @ctx in bytes (at most FSCRYPT_SET_CONTEXT_MAX_SIZE) * @fs_data: If called from fscrypt_set_context(), this will be the * value the filesystem passed to fscrypt_set_context(). * Otherwise (i.e. when called from * FS_IOC_SET_ENCRYPTION_POLICY) this will be NULL. * * i_rwsem will be held for write. * * Return: 0 on success, -errno on failure. */ int (*set_context)(struct inode *inode, const void *ctx, size_t len, void *fs_data); /* * Get the dummy fscrypt policy in use on the filesystem (if any). * * Filesystems only need to implement this function if they support the * test_dummy_encryption mount option. * * Return: A pointer to the dummy fscrypt policy, if the filesystem is * mounted with test_dummy_encryption; otherwise NULL. */ const union fscrypt_policy *(*get_dummy_policy)(struct super_block *sb); /* * Check whether a directory is empty. i_rwsem will be held for write. */ bool (*empty_dir)(struct inode *inode); /* The filesystem's maximum ciphertext filename length, in bytes */ unsigned int max_namelen; /* * Check whether the filesystem's inode numbers and UUID are stable, * meaning that they will never be changed even by offline operations * such as filesystem shrinking and therefore can be used in the * encryption without the possibility of files becoming unreadable. * * Filesystems only need to implement this function if they want to * support the FSCRYPT_POLICY_FLAG_IV_INO_LBLK_{32,64} flags. These * flags are designed to work around the limitations of UFS and eMMC * inline crypto hardware, and they shouldn't be used in scenarios where * such hardware isn't being used. * * Leaving this NULL is equivalent to always returning false. */ bool (*has_stable_inodes)(struct super_block *sb); /* * Get the number of bits that the filesystem uses to represent inode * numbers and file logical block numbers. * * By default, both of these are assumed to be 64-bit. This function * can be implemented to declare that either or both of these numbers is * shorter, which may allow the use of the * FSCRYPT_POLICY_FLAG_IV_INO_LBLK_{32,64} flags and/or the use of * inline crypto hardware whose maximum DUN length is less than 64 bits * (e.g., eMMC v5.2 spec compliant hardware). This function only needs * to be implemented if support for one of these features is needed. */ void (*get_ino_and_lblk_bits)(struct super_block *sb, int *ino_bits_ret, int *lblk_bits_ret); /* * Return the number of block devices to which the filesystem may write * encrypted file contents. * * If the filesystem can use multiple block devices (other than block * devices that aren't used for encrypted file contents, such as * external journal devices), and wants to support inline encryption, * then it must implement this function. Otherwise it's not needed. */ int (*get_num_devices)(struct super_block *sb); /* * If ->get_num_devices() returns a value greater than 1, then this * function is called to get the array of request_queues that the * filesystem is using -- one per block device. (There may be duplicate * entries in this array, as block devices can share a request_queue.) */ void (*get_devices)(struct super_block *sb, struct request_queue **devs); }; static inline struct fscrypt_info *fscrypt_get_info(const struct inode *inode) { /* * Pairs with the cmpxchg_release() in fscrypt_setup_encryption_info(). * I.e., another task may publish ->i_crypt_info concurrently, executing * a RELEASE barrier. We need to use smp_load_acquire() here to safely * ACQUIRE the memory the other task published. */ return smp_load_acquire(&inode->i_crypt_info); } /** * fscrypt_needs_contents_encryption() - check whether an inode needs * contents encryption * @inode: the inode to check * * Return: %true iff the inode is an encrypted regular file and the kernel was * built with fscrypt support. * * If you need to know whether the encrypt bit is set even when the kernel was * built without fscrypt support, you must use IS_ENCRYPTED() directly instead. */ static inline bool fscrypt_needs_contents_encryption(const struct inode *inode) { return IS_ENCRYPTED(inode) && S_ISREG(inode->i_mode); } /* * When d_splice_alias() moves a directory's no-key alias to its plaintext alias * as a result of the encryption key being added, DCACHE_NOKEY_NAME must be * cleared. Note that we don't have to support arbitrary moves of this flag * because fscrypt doesn't allow no-key names to be the source or target of a * rename(). */ static inline void fscrypt_handle_d_move(struct dentry *dentry) { dentry->d_flags &= ~DCACHE_NOKEY_NAME; } /** * fscrypt_is_nokey_name() - test whether a dentry is a no-key name * @dentry: the dentry to check * * This returns true if the dentry is a no-key dentry. A no-key dentry is a * dentry that was created in an encrypted directory that hasn't had its * encryption key added yet. Such dentries may be either positive or negative. * * When a filesystem is asked to create a new filename in an encrypted directory * and the new filename's dentry is a no-key dentry, it must fail the operation * with ENOKEY. This includes ->create(), ->mkdir(), ->mknod(), ->symlink(), * ->rename(), and ->link(). (However, ->rename() and ->link() are already * handled by fscrypt_prepare_rename() and fscrypt_prepare_link().) * * This is necessary because creating a filename requires the directory's * encryption key, but just checking for the key on the directory inode during * the final filesystem operation doesn't guarantee that the key was available * during the preceding dentry lookup. And the key must have already been * available during the dentry lookup in order for it to have been checked * whether the filename already exists in the directory and for the new file's * dentry not to be invalidated due to it incorrectly having the no-key flag. * * Return: %true if the dentry is a no-key name */ static inline bool fscrypt_is_nokey_name(const struct dentry *dentry) { return dentry->d_flags & DCACHE_NOKEY_NAME; } /* crypto.c */ void fscrypt_enqueue_decrypt_work(struct work_struct *); struct page *fscrypt_encrypt_pagecache_blocks(struct page *page, unsigned int len, unsigned int offs, gfp_t gfp_flags); int fscrypt_encrypt_block_inplace(const struct inode *inode, struct page *page, unsigned int len, unsigned int offs, u64 lblk_num, gfp_t gfp_flags); int fscrypt_decrypt_pagecache_blocks(struct page *page, unsigned int len, unsigned int offs); int fscrypt_decrypt_block_inplace(const struct inode *inode, struct page *page, unsigned int len, unsigned int offs, u64 lblk_num); static inline bool fscrypt_is_bounce_page(struct page *page) { return page->mapping == NULL; } static inline struct page *fscrypt_pagecache_page(struct page *bounce_page) { return (struct page *)page_private(bounce_page); } void fscrypt_free_bounce_page(struct page *bounce_page); /* policy.c */ int fscrypt_ioctl_set_policy(struct file *filp, const void __user *arg); int fscrypt_ioctl_get_policy(struct file *filp, void __user *arg); int fscrypt_ioctl_get_policy_ex(struct file *filp, void __user *arg); int fscrypt_ioctl_get_nonce(struct file *filp, void __user *arg); int fscrypt_has_permitted_context(struct inode *parent, struct inode *child); int fscrypt_set_context(struct inode *inode, void *fs_data); struct fscrypt_dummy_policy { const union fscrypt_policy *policy; }; int fscrypt_set_test_dummy_encryption(struct super_block *sb, const char *arg, struct fscrypt_dummy_policy *dummy_policy); void fscrypt_show_test_dummy_encryption(struct seq_file *seq, char sep, struct super_block *sb); static inline void fscrypt_free_dummy_policy(struct fscrypt_dummy_policy *dummy_policy) { kfree(dummy_policy->policy); dummy_policy->policy = NULL; } /* keyring.c */ void fscrypt_destroy_keyring(struct super_block *sb); int fscrypt_ioctl_add_key(struct file *filp, void __user *arg); int fscrypt_ioctl_remove_key(struct file *filp, void __user *arg); int fscrypt_ioctl_remove_key_all_users(struct file *filp, void __user *arg); int fscrypt_ioctl_get_key_status(struct file *filp, void __user *arg); /* keysetup.c */ int fscrypt_prepare_new_inode(struct inode *dir, struct inode *inode, bool *encrypt_ret); void fscrypt_put_encryption_info(struct inode *inode); void fscrypt_free_inode(struct inode *inode); int fscrypt_drop_inode(struct inode *inode); /* fname.c */ int fscrypt_setup_filename(struct inode *inode, const struct qstr *iname, int lookup, struct fscrypt_name *fname); static inline void fscrypt_free_filename(struct fscrypt_name *fname) { kfree(fname->crypto_buf.name); } int fscrypt_fname_alloc_buffer(u32 max_encrypted_len, struct fscrypt_str *crypto_str); void fscrypt_fname_free_buffer(struct fscrypt_str *crypto_str); int fscrypt_fname_disk_to_usr(const struct inode *inode, u32 hash, u32 minor_hash, const struct fscrypt_str *iname, struct fscrypt_str *oname); bool fscrypt_match_name(const struct fscrypt_name *fname, const u8 *de_name, u32 de_name_len); u64 fscrypt_fname_siphash(const struct inode *dir, const struct qstr *name); int fscrypt_d_revalidate(struct dentry *dentry, unsigned int flags); /* bio.c */ void fscrypt_decrypt_bio(struct bio *bio); int fscrypt_zeroout_range(const struct inode *inode, pgoff_t lblk, sector_t pblk, unsigned int len); /* hooks.c */ int fscrypt_file_open(struct inode *inode, struct file *filp); int __fscrypt_prepare_link(struct inode *inode, struct inode *dir, struct dentry *dentry); int __fscrypt_prepare_rename(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry, unsigned int flags); int __fscrypt_prepare_lookup(struct inode *dir, struct dentry *dentry, struct fscrypt_name *fname); int __fscrypt_prepare_readdir(struct inode *dir); int __fscrypt_prepare_setattr(struct dentry *dentry, struct iattr *attr); int fscrypt_prepare_setflags(struct inode *inode, unsigned int oldflags, unsigned int flags); int fscrypt_prepare_symlink(struct inode *dir, const char *target, unsigned int len, unsigned int max_len, struct fscrypt_str *disk_link); int __fscrypt_encrypt_symlink(struct inode *inode, const char *target, unsigned int len, struct fscrypt_str *disk_link); const char *fscrypt_get_symlink(struct inode *inode, const void *caddr, unsigned int max_size, struct delayed_call *done); int fscrypt_symlink_getattr(const struct path *path, struct kstat *stat); static inline void fscrypt_set_ops(struct super_block *sb, const struct fscrypt_operations *s_cop) { sb->s_cop = s_cop; } #else /* !CONFIG_FS_ENCRYPTION */ static inline struct fscrypt_info *fscrypt_get_info(const struct inode *inode) { return NULL; } static inline bool fscrypt_needs_contents_encryption(const struct inode *inode) { return false; } static inline void fscrypt_handle_d_move(struct dentry *dentry) { } static inline bool fscrypt_is_nokey_name(const struct dentry *dentry) { return false; } /* crypto.c */ static inline void fscrypt_enqueue_decrypt_work(struct work_struct *work) { } static inline struct page *fscrypt_encrypt_pagecache_blocks(struct page *page, unsigned int len, unsigned int offs, gfp_t gfp_flags) { return ERR_PTR(-EOPNOTSUPP); } static inline int fscrypt_encrypt_block_inplace(const struct inode *inode, struct page *page, unsigned int len, unsigned int offs, u64 lblk_num, gfp_t gfp_flags) { return -EOPNOTSUPP; } static inline int fscrypt_decrypt_pagecache_blocks(struct page *page, unsigned int len, unsigned int offs) { return -EOPNOTSUPP; } static inline int fscrypt_decrypt_block_inplace(const struct inode *inode, struct page *page, unsigned int len, unsigned int offs, u64 lblk_num) { return -EOPNOTSUPP; } static inline bool fscrypt_is_bounce_page(struct page *page) { return false; } static inline struct page *fscrypt_pagecache_page(struct page *bounce_page) { WARN_ON_ONCE(1); return ERR_PTR(-EINVAL); } static inline void fscrypt_free_bounce_page(struct page *bounce_page) { } /* policy.c */ static inline int fscrypt_ioctl_set_policy(struct file *filp, const void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_ioctl_get_policy(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_ioctl_get_policy_ex(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_ioctl_get_nonce(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_has_permitted_context(struct inode *parent, struct inode *child) { return 0; } static inline int fscrypt_set_context(struct inode *inode, void *fs_data) { return -EOPNOTSUPP; } struct fscrypt_dummy_policy { }; static inline void fscrypt_show_test_dummy_encryption(struct seq_file *seq, char sep, struct super_block *sb) { } static inline void fscrypt_free_dummy_policy(struct fscrypt_dummy_policy *dummy_policy) { } /* keyring.c */ static inline void fscrypt_destroy_keyring(struct super_block *sb) { } static inline int fscrypt_ioctl_add_key(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_ioctl_remove_key(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_ioctl_remove_key_all_users(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } static inline int fscrypt_ioctl_get_key_status(struct file *filp, void __user *arg) { return -EOPNOTSUPP; } /* keysetup.c */ static inline int fscrypt_prepare_new_inode(struct inode *dir, struct inode *inode, bool *encrypt_ret) { if (IS_ENCRYPTED(dir)) return -EOPNOTSUPP; return 0; } static inline void fscrypt_put_encryption_info(struct inode *inode) { return; } static inline void fscrypt_free_inode(struct inode *inode) { } static inline int fscrypt_drop_inode(struct inode *inode) { return 0; } /* fname.c */ static inline int fscrypt_setup_filename(struct inode *dir, const struct qstr *iname, int lookup, struct fscrypt_name *fname) { if (IS_ENCRYPTED(dir)) return -EOPNOTSUPP; memset(fname, 0, sizeof(*fname)); fname->usr_fname = iname; fname->disk_name.name = (unsigned char *)iname->name; fname->disk_name.len = iname->len; return 0; } static inline void fscrypt_free_filename(struct fscrypt_name *fname) { return; } static inline int fscrypt_fname_alloc_buffer(u32 max_encrypted_len, struct fscrypt_str *crypto_str) { return -EOPNOTSUPP; } static inline void fscrypt_fname_free_buffer(struct fscrypt_str *crypto_str) { return; } static inline int fscrypt_fname_disk_to_usr(const struct inode *inode, u32 hash, u32 minor_hash, const struct fscrypt_str *iname, struct fscrypt_str *oname) { return -EOPNOTSUPP; } static inline bool fscrypt_match_name(const struct fscrypt_name *fname, const u8 *de_name, u32 de_name_len) { /* Encryption support disabled; use standard comparison */ if (de_name_len != fname->disk_name.len) return false; return !memcmp(de_name, fname->disk_name.name, fname->disk_name.len); } static inline u64 fscrypt_fname_siphash(const struct inode *dir, const struct qstr *name) { WARN_ON_ONCE(1); return 0; } static inline int fscrypt_d_revalidate(struct dentry *dentry, unsigned int flags) { return 1; } /* bio.c */ static inline void fscrypt_decrypt_bio(struct bio *bio) { } static inline int fscrypt_zeroout_range(const struct inode *inode, pgoff_t lblk, sector_t pblk, unsigned int len) { return -EOPNOTSUPP; } /* hooks.c */ static inline int fscrypt_file_open(struct inode *inode, struct file *filp) { if (IS_ENCRYPTED(inode)) return -EOPNOTSUPP; return 0; } static inline int __fscrypt_prepare_link(struct inode *inode, struct inode *dir, struct dentry *dentry) { return -EOPNOTSUPP; } static inline int __fscrypt_prepare_rename(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry, unsigned int flags) { return -EOPNOTSUPP; } static inline int __fscrypt_prepare_lookup(struct inode *dir, struct dentry *dentry, struct fscrypt_name *fname) { return -EOPNOTSUPP; } static inline int __fscrypt_prepare_readdir(struct inode *dir) { return -EOPNOTSUPP; } static inline int __fscrypt_prepare_setattr(struct dentry *dentry, struct iattr *attr) { return -EOPNOTSUPP; } static inline int fscrypt_prepare_setflags(struct inode *inode, unsigned int oldflags, unsigned int flags) { return 0; } static inline int fscrypt_prepare_symlink(struct inode *dir, const char *target, unsigned int len, unsigned int max_len, struct fscrypt_str *disk_link) { if (IS_ENCRYPTED(dir)) return -EOPNOTSUPP; disk_link->name = (unsigned char *)target; disk_link->len = len + 1; if (disk_link->len > max_len) return -ENAMETOOLONG; return 0; } static inline int __fscrypt_encrypt_symlink(struct inode *inode, const char *target, unsigned int len, struct fscrypt_str *disk_link) { return -EOPNOTSUPP; } static inline const char *fscrypt_get_symlink(struct inode *inode, const void *caddr, unsigned int max_size, struct delayed_call *done) { return ERR_PTR(-EOPNOTSUPP); } static inline int fscrypt_symlink_getattr(const struct path *path, struct kstat *stat) { return -EOPNOTSUPP; } static inline void fscrypt_set_ops(struct super_block *sb, const struct fscrypt_operations *s_cop) { } #endif /* !CONFIG_FS_ENCRYPTION */ /* inline_crypt.c */ #ifdef CONFIG_FS_ENCRYPTION_INLINE_CRYPT bool __fscrypt_inode_uses_inline_crypto(const struct inode *inode); void fscrypt_set_bio_crypt_ctx(struct bio *bio, const struct inode *inode, u64 first_lblk, gfp_t gfp_mask); void fscrypt_set_bio_crypt_ctx_bh(struct bio *bio, const struct buffer_head *first_bh, gfp_t gfp_mask); bool fscrypt_mergeable_bio(struct bio *bio, const struct inode *inode, u64 next_lblk); bool fscrypt_mergeable_bio_bh(struct bio *bio, const struct buffer_head *next_bh); #else /* CONFIG_FS_ENCRYPTION_INLINE_CRYPT */ static inline bool __fscrypt_inode_uses_inline_crypto(const struct inode *inode) { return false; } static inline void fscrypt_set_bio_crypt_ctx(struct bio *bio, const struct inode *inode, u64 first_lblk, gfp_t gfp_mask) { } static inline void fscrypt_set_bio_crypt_ctx_bh( struct bio *bio, const struct buffer_head *first_bh, gfp_t gfp_mask) { } static inline bool fscrypt_mergeable_bio(struct bio *bio, const struct inode *inode, u64 next_lblk) { return true; } static inline bool fscrypt_mergeable_bio_bh(struct bio *bio, const struct buffer_head *next_bh) { return true; } #endif /* !CONFIG_FS_ENCRYPTION_INLINE_CRYPT */ /** * fscrypt_inode_uses_inline_crypto() - test whether an inode uses inline * encryption * @inode: an inode. If encrypted, its key must be set up. * * Return: true if the inode requires file contents encryption and if the * encryption should be done in the block layer via blk-crypto rather * than in the filesystem layer. */ static inline bool fscrypt_inode_uses_inline_crypto(const struct inode *inode) { return fscrypt_needs_contents_encryption(inode) && __fscrypt_inode_uses_inline_crypto(inode); } /** * fscrypt_inode_uses_fs_layer_crypto() - test whether an inode uses fs-layer * encryption * @inode: an inode. If encrypted, its key must be set up. * * Return: true if the inode requires file contents encryption and if the * encryption should be done in the filesystem layer rather than in the * block layer via blk-crypto. */ static inline bool fscrypt_inode_uses_fs_layer_crypto(const struct inode *inode) { return fscrypt_needs_contents_encryption(inode) && !__fscrypt_inode_uses_inline_crypto(inode); } /** * fscrypt_has_encryption_key() - check whether an inode has had its key set up * @inode: the inode to check * * Return: %true if the inode has had its encryption key set up, else %false. * * Usually this should be preceded by fscrypt_get_encryption_info() to try to * set up the key first. */ static inline bool fscrypt_has_encryption_key(const struct inode *inode) { return fscrypt_get_info(inode) != NULL; } /** * fscrypt_prepare_link() - prepare to link an inode into a possibly-encrypted * directory * @old_dentry: an existing dentry for the inode being linked * @dir: the target directory * @dentry: negative dentry for the target filename * * A new link can only be added to an encrypted directory if the directory's * encryption key is available --- since otherwise we'd have no way to encrypt * the filename. * * We also verify that the link will not violate the constraint that all files * in an encrypted directory tree use the same encryption policy. * * Return: 0 on success, -ENOKEY if the directory's encryption key is missing, * -EXDEV if the link would result in an inconsistent encryption policy, or * another -errno code. */ static inline int fscrypt_prepare_link(struct dentry *old_dentry, struct inode *dir, struct dentry *dentry) { if (IS_ENCRYPTED(dir)) return __fscrypt_prepare_link(d_inode(old_dentry), dir, dentry); return 0; } /** * fscrypt_prepare_rename() - prepare for a rename between possibly-encrypted * directories * @old_dir: source directory * @old_dentry: dentry for source file * @new_dir: target directory * @new_dentry: dentry for target location (may be negative unless exchanging) * @flags: rename flags (we care at least about %RENAME_EXCHANGE) * * Prepare for ->rename() where the source and/or target directories may be * encrypted. A new link can only be added to an encrypted directory if the * directory's encryption key is available --- since otherwise we'd have no way * to encrypt the filename. A rename to an existing name, on the other hand, * *is* cryptographically possible without the key. However, we take the more * conservative approach and just forbid all no-key renames. * * We also verify that the rename will not violate the constraint that all files * in an encrypted directory tree use the same encryption policy. * * Return: 0 on success, -ENOKEY if an encryption key is missing, -EXDEV if the * rename would cause inconsistent encryption policies, or another -errno code. */ static inline int fscrypt_prepare_rename(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry, unsigned int flags) { if (IS_ENCRYPTED(old_dir) || IS_ENCRYPTED(new_dir)) return __fscrypt_prepare_rename(old_dir, old_dentry, new_dir, new_dentry, flags); return 0; } /** * fscrypt_prepare_lookup() - prepare to lookup a name in a possibly-encrypted * directory * @dir: directory being searched * @dentry: filename being looked up * @fname: (output) the name to use to search the on-disk directory * * Prepare for ->lookup() in a directory which may be encrypted by determining * the name that will actually be used to search the directory on-disk. If the * directory's encryption policy is supported by this kernel and its encryption * key is available, then the lookup is assumed to be by plaintext name; * otherwise, it is assumed to be by no-key name. * * This will set DCACHE_NOKEY_NAME on the dentry if the lookup is by no-key * name. In this case the filesystem must assign the dentry a dentry_operations * which contains fscrypt_d_revalidate (or contains a d_revalidate method that * calls fscrypt_d_revalidate), so that the dentry will be invalidated if the * directory's encryption key is later added. * * Return: 0 on success; -ENOENT if the directory's key is unavailable but the * filename isn't a valid no-key name, so a negative dentry should be created; * or another -errno code. */ static inline int fscrypt_prepare_lookup(struct inode *dir, struct dentry *dentry, struct fscrypt_name *fname) { if (IS_ENCRYPTED(dir)) return __fscrypt_prepare_lookup(dir, dentry, fname); memset(fname, 0, sizeof(*fname)); fname->usr_fname = &dentry->d_name; fname->disk_name.name = (unsigned char *)dentry->d_name.name; fname->disk_name.len = dentry->d_name.len; return 0; } /** * fscrypt_prepare_readdir() - prepare to read a possibly-encrypted directory * @dir: the directory inode * * If the directory is encrypted and it doesn't already have its encryption key * set up, try to set it up so that the filenames will be listed in plaintext * form rather than in no-key form. * * Return: 0 on success; -errno on error. Note that the encryption key being * unavailable is not considered an error. It is also not an error if * the encryption policy is unsupported by this kernel; that is treated * like the key being unavailable, so that files can still be deleted. */ static inline int fscrypt_prepare_readdir(struct inode *dir) { if (IS_ENCRYPTED(dir)) return __fscrypt_prepare_readdir(dir); return 0; } /** * fscrypt_prepare_setattr() - prepare to change a possibly-encrypted inode's * attributes * @dentry: dentry through which the inode is being changed * @attr: attributes to change * * Prepare for ->setattr() on a possibly-encrypted inode. On an encrypted file, * most attribute changes are allowed even without the encryption key. However, * without the encryption key we do have to forbid truncates. This is needed * because the size being truncated to may not be a multiple of the filesystem * block size, and in that case we'd have to decrypt the final block, zero the * portion past i_size, and re-encrypt it. (We *could* allow truncating to a * filesystem block boundary, but it's simpler to just forbid all truncates --- * and we already forbid all other contents modifications without the key.) * * Return: 0 on success, -ENOKEY if the key is missing, or another -errno code * if a problem occurred while setting up the encryption key. */ static inline int fscrypt_prepare_setattr(struct dentry *dentry, struct iattr *attr) { if (IS_ENCRYPTED(d_inode(dentry))) return __fscrypt_prepare_setattr(dentry, attr); return 0; } /** * fscrypt_encrypt_symlink() - encrypt the symlink target if needed * @inode: symlink inode * @target: plaintext symlink target * @len: length of @target excluding null terminator * @disk_link: (in/out) the on-disk symlink target being prepared * * If the symlink target needs to be encrypted, then this function encrypts it * into @disk_link->name. fscrypt_prepare_symlink() must have been called * previously to compute @disk_link->len. If the filesystem did not allocate a * buffer for @disk_link->name after calling fscrypt_prepare_link(), then one * will be kmalloc()'ed and the filesystem will be responsible for freeing it. * * Return: 0 on success, -errno on failure */ static inline int fscrypt_encrypt_symlink(struct inode *inode, const char *target, unsigned int len, struct fscrypt_str *disk_link) { if (IS_ENCRYPTED(inode)) return __fscrypt_encrypt_symlink(inode, target, len, disk_link); return 0; } /* If *pagep is a bounce page, free it and set *pagep to the pagecache page */ static inline void fscrypt_finalize_bounce_page(struct page **pagep) { struct page *page = *pagep; if (fscrypt_is_bounce_page(page)) { *pagep = fscrypt_pagecache_page(page); fscrypt_free_bounce_page(page); } } #endif /* _LINUX_FSCRYPT_H */ PK ! ��M�> > selection.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * selection.h * * Interface between console.c, tty_io.c, vt.c, vc_screen.c and selection.c */ #ifndef _LINUX_SELECTION_H_ #define _LINUX_SELECTION_H_ #include <linux/tiocl.h> #include <linux/vt_buffer.h> struct tty_struct; struct vc_data; extern void clear_selection(void); extern int set_selection_user(const struct tiocl_selection __user *sel, struct tty_struct *tty); extern int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty); extern int paste_selection(struct tty_struct *tty); extern int sel_loadlut(char __user *p); extern int mouse_reporting(void); extern void mouse_report(struct tty_struct * tty, int butt, int mrx, int mry); bool vc_is_sel(struct vc_data *vc); extern int console_blanked; extern const unsigned char color_table[]; extern unsigned char default_red[]; extern unsigned char default_grn[]; extern unsigned char default_blu[]; extern unsigned short *screen_pos(const struct vc_data *vc, int w_offset, bool viewed); extern u16 screen_glyph(const struct vc_data *vc, int offset); extern u32 screen_glyph_unicode(const struct vc_data *vc, int offset); extern void complement_pos(struct vc_data *vc, int offset); extern void invert_screen(struct vc_data *vc, int offset, int count, bool viewed); extern void getconsxy(const struct vc_data *vc, unsigned char xy[static 2]); extern void putconsxy(struct vc_data *vc, unsigned char xy[static const 2]); extern u16 vcs_scr_readw(const struct vc_data *vc, const u16 *org); extern void vcs_scr_writew(struct vc_data *vc, u16 val, u16 *org); extern void vcs_scr_updated(struct vc_data *vc); extern int vc_uniscr_check(struct vc_data *vc); extern void vc_uniscr_copy_line(const struct vc_data *vc, void *dest, bool viewed, unsigned int row, unsigned int col, unsigned int nr); #endif PK ! � �/ / fips.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FIPS_H #define _FIPS_H #ifdef CONFIG_CRYPTO_FIPS extern int fips_enabled; extern struct atomic_notifier_head fips_fail_notif_chain; void fips_fail_notify(void); #else #define fips_enabled 0 static inline void fips_fail_notify(void) {} #endif #endif PK ! 'ҫ� � uprobes.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _LINUX_UPROBES_H #define _LINUX_UPROBES_H /* * User-space Probes (UProbes) * * Copyright (C) IBM Corporation, 2008-2012 * Authors: * Srikar Dronamraju * Jim Keniston * Copyright (C) 2011-2012 Red Hat, Inc., Peter Zijlstra */ #include <linux/errno.h> #include <linux/rbtree.h> #include <linux/types.h> #include <linux/wait.h> struct vm_area_struct; struct mm_struct; struct inode; struct notifier_block; struct page; #define UPROBE_HANDLER_REMOVE 1 #define UPROBE_HANDLER_MASK 1 #define MAX_URETPROBE_DEPTH 64 enum uprobe_filter_ctx { UPROBE_FILTER_REGISTER, UPROBE_FILTER_UNREGISTER, UPROBE_FILTER_MMAP, }; struct uprobe_consumer { int (*handler)(struct uprobe_consumer *self, struct pt_regs *regs); int (*ret_handler)(struct uprobe_consumer *self, unsigned long func, struct pt_regs *regs); bool (*filter)(struct uprobe_consumer *self, enum uprobe_filter_ctx ctx, struct mm_struct *mm); struct uprobe_consumer *next; }; #ifdef CONFIG_UPROBES #include <asm/uprobes.h> enum uprobe_task_state { UTASK_RUNNING, UTASK_SSTEP, UTASK_SSTEP_ACK, UTASK_SSTEP_TRAPPED, }; /* * uprobe_task: Metadata of a task while it singlesteps. */ struct uprobe_task { enum uprobe_task_state state; union { struct { struct arch_uprobe_task autask; unsigned long vaddr; }; struct { struct callback_head dup_xol_work; unsigned long dup_xol_addr; }; }; struct uprobe *active_uprobe; unsigned long xol_vaddr; struct return_instance *return_instances; unsigned int depth; }; struct return_instance { struct uprobe *uprobe; unsigned long func; unsigned long stack; /* stack pointer */ unsigned long orig_ret_vaddr; /* original return address */ bool chained; /* true, if instance is nested */ struct return_instance *next; /* keep as stack */ }; enum rp_check { RP_CHECK_CALL, RP_CHECK_CHAIN_CALL, RP_CHECK_RET, }; struct xol_area; struct uprobes_state { struct xol_area *xol_area; }; extern void __init uprobes_init(void); extern int set_swbp(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long vaddr); extern int set_orig_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long vaddr); extern bool is_swbp_insn(uprobe_opcode_t *insn); extern bool is_trap_insn(uprobe_opcode_t *insn); extern unsigned long uprobe_get_swbp_addr(struct pt_regs *regs); extern unsigned long uprobe_get_trap_addr(struct pt_regs *regs); extern int uprobe_write_opcode(struct arch_uprobe *auprobe, struct mm_struct *mm, unsigned long vaddr, uprobe_opcode_t); extern int uprobe_register(struct inode *inode, loff_t offset, struct uprobe_consumer *uc); extern int uprobe_register_refctr(struct inode *inode, loff_t offset, loff_t ref_ctr_offset, struct uprobe_consumer *uc); extern int uprobe_apply(struct inode *inode, loff_t offset, struct uprobe_consumer *uc, bool); extern void uprobe_unregister(struct inode *inode, loff_t offset, struct uprobe_consumer *uc); extern int uprobe_mmap(struct vm_area_struct *vma); extern void uprobe_munmap(struct vm_area_struct *vma, unsigned long start, unsigned long end); extern void uprobe_start_dup_mmap(void); extern void uprobe_end_dup_mmap(void); extern void uprobe_dup_mmap(struct mm_struct *oldmm, struct mm_struct *newmm); extern void uprobe_free_utask(struct task_struct *t); extern void uprobe_copy_process(struct task_struct *t, unsigned long flags); extern int uprobe_post_sstep_notifier(struct pt_regs *regs); extern int uprobe_pre_sstep_notifier(struct pt_regs *regs); extern void uprobe_notify_resume(struct pt_regs *regs); extern bool uprobe_deny_signal(void); extern bool arch_uprobe_skip_sstep(struct arch_uprobe *aup, struct pt_regs *regs); extern void uprobe_clear_state(struct mm_struct *mm); extern int arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long addr); extern int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs); extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs); extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk); extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data); extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs); extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs); extern bool arch_uretprobe_is_alive(struct return_instance *ret, enum rp_check ctx, struct pt_regs *regs); extern bool arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs); extern void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr, void *src, unsigned long len); #else /* !CONFIG_UPROBES */ struct uprobes_state { }; static inline void uprobes_init(void) { } #define uprobe_get_trap_addr(regs) instruction_pointer(regs) static inline int uprobe_register(struct inode *inode, loff_t offset, struct uprobe_consumer *uc) { return -ENOSYS; } static inline int uprobe_register_refctr(struct inode *inode, loff_t offset, loff_t ref_ctr_offset, struct uprobe_consumer *uc) { return -ENOSYS; } static inline int uprobe_apply(struct inode *inode, loff_t offset, struct uprobe_consumer *uc, bool add) { return -ENOSYS; } static inline void uprobe_unregister(struct inode *inode, loff_t offset, struct uprobe_consumer *uc) { } static inline int uprobe_mmap(struct vm_area_struct *vma) { return 0; } static inline void uprobe_munmap(struct vm_area_struct *vma, unsigned long start, unsigned long end) { } static inline void uprobe_start_dup_mmap(void) { } static inline void uprobe_end_dup_mmap(void) { } static inline void uprobe_dup_mmap(struct mm_struct *oldmm, struct mm_struct *newmm) { } static inline void uprobe_notify_resume(struct pt_regs *regs) { } static inline bool uprobe_deny_signal(void) { return false; } static inline void uprobe_free_utask(struct task_struct *t) { } static inline void uprobe_copy_process(struct task_struct *t, unsigned long flags) { } static inline void uprobe_clear_state(struct mm_struct *mm) { } #endif /* !CONFIG_UPROBES */ #endif /* _LINUX_UPROBES_H */ PK ! {�3e aer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2006 Intel Corp. * Tom Long Nguyen (tom.l.nguyen@intel.com) * Zhang Yanmin (yanmin.zhang@intel.com) */ #ifndef _AER_H_ #define _AER_H_ #include <linux/errno.h> #include <linux/types.h> #define AER_NONFATAL 0 #define AER_FATAL 1 #define AER_CORRECTABLE 2 #define DPC_FATAL 3 struct pci_dev; struct aer_header_log_regs { unsigned int dw0; unsigned int dw1; unsigned int dw2; unsigned int dw3; }; struct aer_capability_regs { u32 header; u32 uncor_status; u32 uncor_mask; u32 uncor_severity; u32 cor_status; u32 cor_mask; u32 cap_control; struct aer_header_log_regs header_log; u32 root_command; u32 root_status; u16 cor_err_source; u16 uncor_err_source; }; #if defined(CONFIG_PCIEAER) /* PCIe port driver needs this function to enable AER */ int pci_enable_pcie_error_reporting(struct pci_dev *dev); int pci_disable_pcie_error_reporting(struct pci_dev *dev); int pci_aer_clear_nonfatal_status(struct pci_dev *dev); void pci_save_aer_state(struct pci_dev *dev); void pci_restore_aer_state(struct pci_dev *dev); #else static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) { return -EINVAL; } static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev) { return -EINVAL; } static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev) { return -EINVAL; } static inline void pci_save_aer_state(struct pci_dev *dev) {} static inline void pci_restore_aer_state(struct pci_dev *dev) {} #endif void cper_print_aer(struct pci_dev *dev, int aer_severity, struct aer_capability_regs *aer); int cper_severity_to_aer(int cper_severity); void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, int severity, struct aer_capability_regs *aer_regs); #endif //_AER_H_ PK ! @� � bpfilter.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BPFILTER_H #define _LINUX_BPFILTER_H #include <uapi/linux/bpfilter.h> #include <linux/usermode_driver.h> #include <linux/sockptr.h> struct sock; int bpfilter_ip_set_sockopt(struct sock *sk, int optname, sockptr_t optval, unsigned int optlen); int bpfilter_ip_get_sockopt(struct sock *sk, int optname, char __user *optval, int __user *optlen); void bpfilter_umh_cleanup(struct umd_info *info); struct bpfilter_umh_ops { struct umd_info info; /* since ip_getsockopt() can run in parallel, serialize access to umh */ struct mutex lock; int (*sockopt)(struct sock *sk, int optname, sockptr_t optval, unsigned int optlen, bool is_set); int (*start)(void); }; extern struct bpfilter_umh_ops bpfilter_ops; #endif PK ! ĝZ�= �= thermal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * thermal.h ($Revision: 0 $) * * Copyright (C) 2008 Intel Corp * Copyright (C) 2008 Zhang Rui <rui.zhang@intel.com> * Copyright (C) 2008 Sujith Thomas <sujith.thomas@intel.com> */ #ifndef __THERMAL_H__ #define __THERMAL_H__ #include <linux/of.h> #include <linux/idr.h> #include <linux/device.h> #include <linux/sysfs.h> #include <linux/workqueue.h> #include <uapi/linux/thermal.h> #define THERMAL_MAX_TRIPS 12 /* invalid cooling state */ #define THERMAL_CSTATE_INVALID -1UL /* No upper/lower limit requirement */ #define THERMAL_NO_LIMIT ((u32)~0) /* Default weight of a bound cooling device */ #define THERMAL_WEIGHT_DEFAULT 0 /* use value, which < 0K, to indicate an invalid/uninitialized temperature */ #define THERMAL_TEMP_INVALID -274000 struct thermal_zone_device; struct thermal_cooling_device; struct thermal_instance; struct thermal_attr; enum thermal_trend { THERMAL_TREND_STABLE, /* temperature is stable */ THERMAL_TREND_RAISING, /* temperature is raising */ THERMAL_TREND_DROPPING, /* temperature is dropping */ THERMAL_TREND_RAISE_FULL, /* apply highest cooling action */ THERMAL_TREND_DROP_FULL, /* apply lowest cooling action */ }; /* Thermal notification reason */ enum thermal_notify_event { THERMAL_EVENT_UNSPECIFIED, /* Unspecified event */ THERMAL_EVENT_TEMP_SAMPLE, /* New Temperature sample */ THERMAL_TRIP_VIOLATED, /* TRIP Point violation */ THERMAL_TRIP_CHANGED, /* TRIP Point temperature changed */ THERMAL_DEVICE_DOWN, /* Thermal device is down */ THERMAL_DEVICE_UP, /* Thermal device is up after a down event */ THERMAL_DEVICE_POWER_CAPABILITY_CHANGED, /* power capability changed */ THERMAL_TABLE_CHANGED, /* Thermal table(s) changed */ THERMAL_EVENT_KEEP_ALIVE, /* Request for user space handler to respond */ }; struct thermal_zone_device_ops { int (*bind) (struct thermal_zone_device *, struct thermal_cooling_device *); int (*unbind) (struct thermal_zone_device *, struct thermal_cooling_device *); int (*get_temp) (struct thermal_zone_device *, int *); int (*set_trips) (struct thermal_zone_device *, int, int); int (*change_mode) (struct thermal_zone_device *, enum thermal_device_mode); int (*get_trip_type) (struct thermal_zone_device *, int, enum thermal_trip_type *); int (*get_trip_temp) (struct thermal_zone_device *, int, int *); int (*set_trip_temp) (struct thermal_zone_device *, int, int); int (*get_trip_hyst) (struct thermal_zone_device *, int, int *); int (*set_trip_hyst) (struct thermal_zone_device *, int, int); int (*get_crit_temp) (struct thermal_zone_device *, int *); int (*set_emul_temp) (struct thermal_zone_device *, int); int (*get_trend) (struct thermal_zone_device *, int, enum thermal_trend *); void (*hot)(struct thermal_zone_device *); void (*critical)(struct thermal_zone_device *); }; struct thermal_cooling_device_ops { int (*get_max_state) (struct thermal_cooling_device *, unsigned long *); int (*get_cur_state) (struct thermal_cooling_device *, unsigned long *); int (*set_cur_state) (struct thermal_cooling_device *, unsigned long); int (*get_requested_power)(struct thermal_cooling_device *, u32 *); int (*state2power)(struct thermal_cooling_device *, unsigned long, u32 *); int (*power2state)(struct thermal_cooling_device *, u32, unsigned long *); }; struct thermal_cooling_device { int id; char *type; unsigned long max_state; struct device device; struct device_node *np; void *devdata; void *stats; const struct thermal_cooling_device_ops *ops; bool updated; /* true if the cooling device does not need update */ struct mutex lock; /* protect thermal_instances list */ struct list_head thermal_instances; struct list_head node; }; /** * struct thermal_zone_device - structure for a thermal zone * @id: unique id number for each thermal zone * @type: the thermal zone device type * @device: &struct device for this thermal zone * @trip_temp_attrs: attributes for trip points for sysfs: trip temperature * @trip_type_attrs: attributes for trip points for sysfs: trip type * @trip_hyst_attrs: attributes for trip points for sysfs: trip hysteresis * @mode: current mode of this thermal zone * @devdata: private pointer for device private data * @num_trips: number of trip points the thermal zone supports * @trips_disabled; bitmap for disabled trips * @passive_delay_jiffies: number of jiffies to wait between polls when * performing passive cooling. * @polling_delay_jiffies: number of jiffies to wait between polls when * checking whether trip points have been crossed (0 for * interrupt driven systems) * @temperature: current temperature. This is only for core code, * drivers should use thermal_zone_get_temp() to get the * current temperature * @last_temperature: previous temperature read * @emul_temperature: emulated temperature when using CONFIG_THERMAL_EMULATION * @passive: 1 if you've crossed a passive trip point, 0 otherwise. * @prev_low_trip: the low current temperature if you've crossed a passive trip point. * @prev_high_trip: the above current temperature if you've crossed a passive trip point. * @need_update: if equals 1, thermal_zone_device_update needs to be invoked. * @ops: operations this &thermal_zone_device supports * @tzp: thermal zone parameters * @governor: pointer to the governor for this thermal zone * @governor_data: private pointer for governor data * @thermal_instances: list of &struct thermal_instance of this thermal zone * @ida: &struct ida to generate unique id for this zone's cooling * devices * @lock: lock to protect thermal_instances list * @node: node in thermal_tz_list (in thermal_core.c) * @poll_queue: delayed work for polling * @notify_event: Last notification event */ struct thermal_zone_device { int id; char type[THERMAL_NAME_LENGTH]; struct device device; struct attribute_group trips_attribute_group; struct thermal_attr *trip_temp_attrs; struct thermal_attr *trip_type_attrs; struct thermal_attr *trip_hyst_attrs; enum thermal_device_mode mode; void *devdata; int num_trips; unsigned long trips_disabled; /* bitmap for disabled trips */ unsigned long passive_delay_jiffies; unsigned long polling_delay_jiffies; int temperature; int last_temperature; int emul_temperature; int passive; int prev_low_trip; int prev_high_trip; atomic_t need_update; struct thermal_zone_device_ops *ops; struct thermal_zone_params *tzp; struct thermal_governor *governor; void *governor_data; struct list_head thermal_instances; struct ida ida; struct mutex lock; struct list_head node; struct delayed_work poll_queue; enum thermal_notify_event notify_event; }; /** * struct thermal_governor - structure that holds thermal governor information * @name: name of the governor * @bind_to_tz: callback called when binding to a thermal zone. If it * returns 0, the governor is bound to the thermal zone, * otherwise it fails. * @unbind_from_tz: callback called when a governor is unbound from a * thermal zone. * @throttle: callback called for every trip point even if temperature is * below the trip point temperature * @governor_list: node in thermal_governor_list (in thermal_core.c) */ struct thermal_governor { char name[THERMAL_NAME_LENGTH]; int (*bind_to_tz)(struct thermal_zone_device *tz); void (*unbind_from_tz)(struct thermal_zone_device *tz); int (*throttle)(struct thermal_zone_device *tz, int trip); struct list_head governor_list; }; /* Structure that holds binding parameters for a zone */ struct thermal_bind_params { struct thermal_cooling_device *cdev; /* * This is a measure of 'how effectively these devices can * cool 'this' thermal zone. It shall be determined by * platform characterization. This value is relative to the * rest of the weights so a cooling device whose weight is * double that of another cooling device is twice as * effective. See Documentation/driver-api/thermal/sysfs-api.rst for more * information. */ int weight; /* * This is a bit mask that gives the binding relation between this * thermal zone and cdev, for a particular trip point. * See Documentation/driver-api/thermal/sysfs-api.rst for more information. */ int trip_mask; /* * This is an array of cooling state limits. Must have exactly * 2 * thermal_zone.number_of_trip_points. It is an array consisting * of tuples <lower-state upper-state> of state limits. Each trip * will be associated with one state limit tuple when binding. * A NULL pointer means <THERMAL_NO_LIMITS THERMAL_NO_LIMITS> * on all trips. */ unsigned long *binding_limits; int (*match) (struct thermal_zone_device *tz, struct thermal_cooling_device *cdev); }; /* Structure to define Thermal Zone parameters */ struct thermal_zone_params { char governor_name[THERMAL_NAME_LENGTH]; /* * a boolean to indicate if the thermal to hwmon sysfs interface * is required. when no_hwmon == false, a hwmon sysfs interface * will be created. when no_hwmon == true, nothing will be done */ bool no_hwmon; int num_tbps; /* Number of tbp entries */ struct thermal_bind_params *tbp; /* * Sustainable power (heat) that this thermal zone can dissipate in * mW */ u32 sustainable_power; /* * Proportional parameter of the PID controller when * overshooting (i.e., when temperature is below the target) */ s32 k_po; /* * Proportional parameter of the PID controller when * undershooting */ s32 k_pu; /* Integral parameter of the PID controller */ s32 k_i; /* Derivative parameter of the PID controller */ s32 k_d; /* threshold below which the error is no longer accumulated */ s32 integral_cutoff; /* * @slope: slope of a linear temperature adjustment curve. * Used by thermal zone drivers. */ int slope; /* * @offset: offset of a linear temperature adjustment curve. * Used by thermal zone drivers (default 0). */ int offset; }; /** * struct thermal_zone_of_device_ops - callbacks for handling DT based zones * * Mandatory: * @get_temp: a pointer to a function that reads the sensor temperature. * * Optional: * @get_trend: a pointer to a function that reads the sensor temperature trend. * @set_trips: a pointer to a function that sets a temperature window. When * this window is left the driver must inform the thermal core via * thermal_zone_device_update. * @set_emul_temp: a pointer to a function that sets sensor emulated * temperature. * @set_trip_temp: a pointer to a function that sets the trip temperature on * hardware. */ struct thermal_zone_of_device_ops { int (*get_temp)(void *, int *); int (*get_trend)(void *, int, enum thermal_trend *); int (*set_trips)(void *, int, int); int (*set_emul_temp)(void *, int); int (*set_trip_temp)(void *, int, int); }; /* Function declarations */ #ifdef CONFIG_THERMAL_OF int thermal_zone_of_get_sensor_id(struct device_node *tz_np, struct device_node *sensor_np, u32 *id); struct thermal_zone_device * thermal_zone_of_sensor_register(struct device *dev, int id, void *data, const struct thermal_zone_of_device_ops *ops); void thermal_zone_of_sensor_unregister(struct device *dev, struct thermal_zone_device *tz); struct thermal_zone_device *devm_thermal_zone_of_sensor_register( struct device *dev, int id, void *data, const struct thermal_zone_of_device_ops *ops); void devm_thermal_zone_of_sensor_unregister(struct device *dev, struct thermal_zone_device *tz); #else static inline int thermal_zone_of_get_sensor_id(struct device_node *tz_np, struct device_node *sensor_np, u32 *id) { return -ENOENT; } static inline struct thermal_zone_device * thermal_zone_of_sensor_register(struct device *dev, int id, void *data, const struct thermal_zone_of_device_ops *ops) { return ERR_PTR(-ENODEV); } static inline void thermal_zone_of_sensor_unregister(struct device *dev, struct thermal_zone_device *tz) { } static inline struct thermal_zone_device *devm_thermal_zone_of_sensor_register( struct device *dev, int id, void *data, const struct thermal_zone_of_device_ops *ops) { return ERR_PTR(-ENODEV); } static inline void devm_thermal_zone_of_sensor_unregister(struct device *dev, struct thermal_zone_device *tz) { } #endif #ifdef CONFIG_THERMAL struct thermal_zone_device *thermal_zone_device_register(const char *, int, int, void *, struct thermal_zone_device_ops *, struct thermal_zone_params *, int, int); void thermal_zone_device_unregister(struct thermal_zone_device *); int thermal_zone_bind_cooling_device(struct thermal_zone_device *, int, struct thermal_cooling_device *, unsigned long, unsigned long, unsigned int); int thermal_zone_unbind_cooling_device(struct thermal_zone_device *, int, struct thermal_cooling_device *); void thermal_zone_device_update(struct thermal_zone_device *, enum thermal_notify_event); struct thermal_cooling_device *thermal_cooling_device_register(const char *, void *, const struct thermal_cooling_device_ops *); struct thermal_cooling_device * thermal_of_cooling_device_register(struct device_node *np, const char *, void *, const struct thermal_cooling_device_ops *); struct thermal_cooling_device * devm_thermal_of_cooling_device_register(struct device *dev, struct device_node *np, char *type, void *devdata, const struct thermal_cooling_device_ops *ops); void thermal_cooling_device_unregister(struct thermal_cooling_device *); struct thermal_zone_device *thermal_zone_get_zone_by_name(const char *name); int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp); int thermal_zone_get_slope(struct thermal_zone_device *tz); int thermal_zone_get_offset(struct thermal_zone_device *tz); int thermal_zone_device_enable(struct thermal_zone_device *tz); int thermal_zone_device_disable(struct thermal_zone_device *tz); void thermal_zone_device_critical(struct thermal_zone_device *tz); #else static inline struct thermal_zone_device *thermal_zone_device_register( const char *type, int trips, int mask, void *devdata, struct thermal_zone_device_ops *ops, struct thermal_zone_params *tzp, int passive_delay, int polling_delay) { return ERR_PTR(-ENODEV); } static inline void thermal_zone_device_unregister( struct thermal_zone_device *tz) { } static inline struct thermal_cooling_device * thermal_cooling_device_register(const char *type, void *devdata, const struct thermal_cooling_device_ops *ops) { return ERR_PTR(-ENODEV); } static inline struct thermal_cooling_device * thermal_of_cooling_device_register(struct device_node *np, const char *type, void *devdata, const struct thermal_cooling_device_ops *ops) { return ERR_PTR(-ENODEV); } static inline struct thermal_cooling_device * devm_thermal_of_cooling_device_register(struct device *dev, struct device_node *np, char *type, void *devdata, const struct thermal_cooling_device_ops *ops) { return ERR_PTR(-ENODEV); } static inline void thermal_cooling_device_unregister( struct thermal_cooling_device *cdev) { } static inline struct thermal_zone_device *thermal_zone_get_zone_by_name( const char *name) { return ERR_PTR(-ENODEV); } static inline int thermal_zone_get_temp( struct thermal_zone_device *tz, int *temp) { return -ENODEV; } static inline int thermal_zone_get_slope( struct thermal_zone_device *tz) { return -ENODEV; } static inline int thermal_zone_get_offset( struct thermal_zone_device *tz) { return -ENODEV; } static inline int thermal_zone_device_enable(struct thermal_zone_device *tz) { return -ENODEV; } static inline int thermal_zone_device_disable(struct thermal_zone_device *tz) { return -ENODEV; } #endif /* CONFIG_THERMAL */ #endif /* __THERMAL_H__ */ PK ! �4"� � sh_clk.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SH_CLOCK_H #define __SH_CLOCK_H #include <linux/list.h> #include <linux/seq_file.h> #include <linux/cpufreq.h> #include <linux/types.h> #include <linux/kref.h> #include <linux/clk.h> #include <linux/err.h> struct clk; struct clk_mapping { phys_addr_t phys; void __iomem *base; unsigned long len; struct kref ref; }; struct sh_clk_ops { #ifdef CONFIG_SH_CLK_CPG_LEGACY void (*init)(struct clk *clk); #endif int (*enable)(struct clk *clk); void (*disable)(struct clk *clk); unsigned long (*recalc)(struct clk *clk); int (*set_rate)(struct clk *clk, unsigned long rate); int (*set_parent)(struct clk *clk, struct clk *parent); long (*round_rate)(struct clk *clk, unsigned long rate); }; #define SH_CLK_DIV_MSK(div) ((1 << (div)) - 1) #define SH_CLK_DIV4_MSK SH_CLK_DIV_MSK(4) #define SH_CLK_DIV6_MSK SH_CLK_DIV_MSK(6) struct clk { struct list_head node; struct clk *parent; struct clk **parent_table; /* list of parents to */ unsigned short parent_num; /* choose between */ unsigned char src_shift; /* source clock field in the */ unsigned char src_width; /* configuration register */ struct sh_clk_ops *ops; struct list_head children; struct list_head sibling; /* node for children */ int usecount; unsigned long rate; unsigned long flags; void __iomem *enable_reg; void __iomem *status_reg; unsigned int enable_bit; void __iomem *mapped_reg; unsigned int div_mask; unsigned long arch_flags; void *priv; struct clk_mapping *mapping; struct cpufreq_frequency_table *freq_table; unsigned int nr_freqs; }; #define CLK_ENABLE_ON_INIT BIT(0) #define CLK_ENABLE_REG_32BIT BIT(1) /* default access size */ #define CLK_ENABLE_REG_16BIT BIT(2) #define CLK_ENABLE_REG_8BIT BIT(3) #define CLK_MASK_DIV_ON_DISABLE BIT(4) #define CLK_ENABLE_REG_MASK (CLK_ENABLE_REG_32BIT | \ CLK_ENABLE_REG_16BIT | \ CLK_ENABLE_REG_8BIT) /* drivers/sh/clk.c */ unsigned long followparent_recalc(struct clk *); void recalculate_root_clocks(void); void propagate_rate(struct clk *); int clk_reparent(struct clk *child, struct clk *parent); int clk_register(struct clk *); void clk_unregister(struct clk *); void clk_enable_init_clocks(void); struct clk_div_mult_table { unsigned int *divisors; unsigned int nr_divisors; unsigned int *multipliers; unsigned int nr_multipliers; }; struct cpufreq_frequency_table; void clk_rate_table_build(struct clk *clk, struct cpufreq_frequency_table *freq_table, int nr_freqs, struct clk_div_mult_table *src_table, unsigned long *bitmap); long clk_rate_table_round(struct clk *clk, struct cpufreq_frequency_table *freq_table, unsigned long rate); int clk_rate_table_find(struct clk *clk, struct cpufreq_frequency_table *freq_table, unsigned long rate); long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, unsigned int div_max, unsigned long rate); long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min, unsigned int mult_max, unsigned long rate); #define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \ { \ .parent = _parent, \ .enable_reg = (void __iomem *)_enable_reg, \ .enable_bit = _enable_bit, \ .status_reg = _status_reg, \ .flags = _flags, \ } #define SH_CLK_MSTP32(_p, _r, _b, _f) \ SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_32BIT) #define SH_CLK_MSTP32_STS(_p, _r, _b, _s, _f) \ SH_CLK_MSTP(_p, _r, _b, _s, _f | CLK_ENABLE_REG_32BIT) #define SH_CLK_MSTP16(_p, _r, _b, _f) \ SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_16BIT) #define SH_CLK_MSTP8(_p, _r, _b, _f) \ SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_8BIT) int sh_clk_mstp_register(struct clk *clks, int nr); /* * MSTP registration never really cared about access size, despite the * original enable/disable pairs assuming a 32-bit access. Clocks are * responsible for defining their access sizes either directly or via the * clock definition wrappers. */ static inline int __deprecated sh_clk_mstp32_register(struct clk *clks, int nr) { return sh_clk_mstp_register(clks, nr); } #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ { \ .parent = _parent, \ .enable_reg = (void __iomem *)_reg, \ .enable_bit = _shift, \ .arch_flags = _div_bitmap, \ .div_mask = SH_CLK_DIV4_MSK, \ .flags = _flags, \ } struct clk_div_table { struct clk_div_mult_table *div_mult_table; void (*kick)(struct clk *clk); }; #define clk_div4_table clk_div_table int sh_clk_div4_register(struct clk *clks, int nr, struct clk_div4_table *table); int sh_clk_div4_enable_register(struct clk *clks, int nr, struct clk_div4_table *table); int sh_clk_div4_reparent_register(struct clk *clks, int nr, struct clk_div4_table *table); #define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ _num_parents, _src_shift, _src_width) \ { \ .enable_reg = (void __iomem *)_reg, \ .enable_bit = 0, /* unused */ \ .flags = _flags | CLK_MASK_DIV_ON_DISABLE, \ .div_mask = SH_CLK_DIV6_MSK, \ .parent_table = _parents, \ .parent_num = _num_parents, \ .src_shift = _src_shift, \ .src_width = _src_width, \ } #define SH_CLK_DIV6(_parent, _reg, _flags) \ { \ .parent = _parent, \ .enable_reg = (void __iomem *)_reg, \ .enable_bit = 0, /* unused */ \ .div_mask = SH_CLK_DIV6_MSK, \ .flags = _flags | CLK_MASK_DIV_ON_DISABLE, \ } int sh_clk_div6_register(struct clk *clks, int nr); int sh_clk_div6_reparent_register(struct clk *clks, int nr); #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } /* .enable_reg will be updated to .mapping on sh_clk_fsidiv_register() */ #define SH_CLK_FSIDIV(_reg, _parent) \ { \ .enable_reg = (void __iomem *)_reg, \ .parent = _parent, \ } int sh_clk_fsidiv_register(struct clk *clks, int nr); #endif /* __SH_CLOCK_H */ PK ! �P�� � fd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FD_H #define _LINUX_FD_H #include <uapi/linux/fd.h> #ifdef CONFIG_COMPAT #include <linux/compat.h> struct compat_floppy_struct { compat_uint_t size; compat_uint_t sect; compat_uint_t head; compat_uint_t track; compat_uint_t stretch; unsigned char gap; unsigned char rate; unsigned char spec1; unsigned char fmt_gap; const compat_caddr_t name; }; #define FDGETPRM32 _IOR(2, 0x04, struct compat_floppy_struct) #endif #endif PK ! ��b�� � pch_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2010 Intel Corporation */ #ifndef PCH_DMA_H #define PCH_DMA_H #include <linux/dmaengine.h> enum pch_dma_width { PCH_DMA_WIDTH_1_BYTE, PCH_DMA_WIDTH_2_BYTES, PCH_DMA_WIDTH_4_BYTES, }; struct pch_dma_slave { struct device *dma_dev; unsigned int chan_id; dma_addr_t tx_reg; dma_addr_t rx_reg; enum pch_dma_width width; }; #endif PK ! @v� shdma-base.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * * Dmaengine driver base library for DMA controllers, found on SH-based SoCs * * extracted from shdma.c and headers * * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de> * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. */ #ifndef SHDMA_BASE_H #define SHDMA_BASE_H #include <linux/dmaengine.h> #include <linux/interrupt.h> #include <linux/list.h> #include <linux/types.h> /** * shdma_pm_state - DMA channel PM state * SHDMA_PM_ESTABLISHED: either idle or during data transfer * SHDMA_PM_BUSY: during the transfer preparation, when we have to * drop the lock temporarily * SHDMA_PM_PENDING: transfers pending */ enum shdma_pm_state { SHDMA_PM_ESTABLISHED, SHDMA_PM_BUSY, SHDMA_PM_PENDING, }; struct device; /* * Drivers, using this library are expected to embed struct shdma_dev, * struct shdma_chan, struct shdma_desc, and struct shdma_slave * in their respective device, channel, descriptor and slave objects. */ struct shdma_slave { int slave_id; }; struct shdma_desc { struct list_head node; struct dma_async_tx_descriptor async_tx; enum dma_transfer_direction direction; size_t partial; dma_cookie_t cookie; int chunks; int mark; bool cyclic; /* used as cyclic transfer */ }; struct shdma_chan { spinlock_t chan_lock; /* Channel operation lock */ struct list_head ld_queue; /* Link descriptors queue */ struct list_head ld_free; /* Free link descriptors */ struct dma_chan dma_chan; /* DMA channel */ struct device *dev; /* Channel device */ void *desc; /* buffer for descriptor array */ int desc_num; /* desc count */ size_t max_xfer_len; /* max transfer length */ int id; /* Raw id of this channel */ int irq; /* Channel IRQ */ int slave_id; /* Client ID for slave DMA */ int real_slave_id; /* argument passed to filter function */ int hw_req; /* DMA request line for slave DMA - same * as MID/RID, used with DT */ enum shdma_pm_state pm_state; }; /** * struct shdma_ops - simple DMA driver operations * desc_completed: return true, if this is the descriptor, that just has * completed (atomic) * halt_channel: stop DMA channel operation (atomic) * channel_busy: return true, if the channel is busy (atomic) * slave_addr: return slave DMA address * desc_setup: set up the hardware specific descriptor portion (atomic) * set_slave: bind channel to a slave * setup_xfer: configure channel hardware for operation (atomic) * start_xfer: start the DMA transfer (atomic) * embedded_desc: return Nth struct shdma_desc pointer from the * descriptor array * chan_irq: process channel IRQ, return true if a transfer has * completed (atomic) */ struct shdma_ops { bool (*desc_completed)(struct shdma_chan *, struct shdma_desc *); void (*halt_channel)(struct shdma_chan *); bool (*channel_busy)(struct shdma_chan *); dma_addr_t (*slave_addr)(struct shdma_chan *); int (*desc_setup)(struct shdma_chan *, struct shdma_desc *, dma_addr_t, dma_addr_t, size_t *); int (*set_slave)(struct shdma_chan *, int, dma_addr_t, bool); int (*setup_xfer)(struct shdma_chan *, int); void (*start_xfer)(struct shdma_chan *, struct shdma_desc *); struct shdma_desc *(*embedded_desc)(void *, int); bool (*chan_irq)(struct shdma_chan *, int); size_t (*get_partial)(struct shdma_chan *, struct shdma_desc *); }; struct shdma_dev { struct dma_device dma_dev; struct shdma_chan **schan; const struct shdma_ops *ops; size_t desc_size; }; #define shdma_for_each_chan(c, d, i) for (i = 0, c = (d)->schan[0]; \ i < (d)->dma_dev.chancnt; c = (d)->schan[++i]) int shdma_request_irq(struct shdma_chan *, int, unsigned long, const char *); bool shdma_reset(struct shdma_dev *sdev); void shdma_chan_probe(struct shdma_dev *sdev, struct shdma_chan *schan, int id); void shdma_chan_remove(struct shdma_chan *schan); int shdma_init(struct device *dev, struct shdma_dev *sdev, int chan_num); void shdma_cleanup(struct shdma_dev *sdev); #if IS_ENABLED(CONFIG_SH_DMAE_BASE) bool shdma_chan_filter(struct dma_chan *chan, void *arg); #else static inline bool shdma_chan_filter(struct dma_chan *chan, void *arg) { return false; } #endif #endif PK ! x�>�` ` circ_buf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * See Documentation/core-api/circular-buffers.rst for more information. */ #ifndef _LINUX_CIRC_BUF_H #define _LINUX_CIRC_BUF_H 1 struct circ_buf { char *buf; int head; int tail; }; /* Return count in buffer. */ #define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1)) /* Return space available, 0..size-1. We always leave one free char as a completely full buffer has head == tail, which is the same as empty. */ #define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size)) /* Return count up to the end of the buffer. Carefully avoid accessing head and tail more than once, so they can change underneath us without returning inconsistent results. */ #define CIRC_CNT_TO_END(head,tail,size) \ ({int end = (size) - (tail); \ int n = ((head) + end) & ((size)-1); \ n < end ? n : end;}) /* Return space available up to the end of the buffer. */ #define CIRC_SPACE_TO_END(head,tail,size) \ ({int end = (size) - 1 - (head); \ int n = (end + (tail)) & ((size)-1); \ n <= end ? n : end+1;}) #endif /* _LINUX_CIRC_BUF_H */ PK ! �> 3 3 of_clk.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * OF clock helpers */ #ifndef __LINUX_OF_CLK_H #define __LINUX_OF_CLK_H struct device_node; struct of_device_id; #if defined(CONFIG_COMMON_CLK) && defined(CONFIG_OF) unsigned int of_clk_get_parent_count(const struct device_node *np); const char *of_clk_get_parent_name(const struct device_node *np, int index); void of_clk_init(const struct of_device_id *matches); #else /* !CONFIG_COMMON_CLK || !CONFIG_OF */ static inline unsigned int of_clk_get_parent_count(const struct device_node *np) { return 0; } static inline const char *of_clk_get_parent_name(const struct device_node *np, int index) { return NULL; } static inline void of_clk_init(const struct of_device_id *matches) {} #endif /* !CONFIG_COMMON_CLK || !CONFIG_OF */ #endif /* __LINUX_OF_CLK_H */ PK ! y�{�a a if_pppox.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /*************************************************************************** * Linux PPP over X - Generic PPP transport layer sockets * Linux PPP over Ethernet (PPPoE) Socket Implementation (RFC 2516) * * This file supplies definitions required by the PPP over Ethernet driver * (pppox.c). All version information wrt this file is located in pppox.c * * License: */ #ifndef __LINUX_IF_PPPOX_H #define __LINUX_IF_PPPOX_H #include <linux/if.h> #include <linux/netdevice.h> #include <linux/ppp_channel.h> #include <linux/skbuff.h> #include <linux/workqueue.h> #include <uapi/linux/if_pppox.h> static inline struct pppoe_hdr *pppoe_hdr(const struct sk_buff *skb) { return (struct pppoe_hdr *)skb_network_header(skb); } struct pppoe_opt { struct net_device *dev; /* device associated with socket*/ int ifindex; /* ifindex of device associated with socket */ struct pppoe_addr pa; /* what this socket is bound to*/ struct sockaddr_pppox relay; /* what socket data will be relayed to (PPPoE relaying) */ struct work_struct padt_work;/* Work item for handling PADT */ }; struct pptp_opt { struct pptp_addr src_addr; struct pptp_addr dst_addr; u32 ack_sent, ack_recv; u32 seq_sent, seq_recv; int ppp_flags; }; #include <net/sock.h> struct pppox_sock { /* struct sock must be the first member of pppox_sock */ struct sock sk; struct ppp_channel chan; struct pppox_sock *next; /* for hash table */ union { struct pppoe_opt pppoe; struct pptp_opt pptp; } proto; __be16 num; }; #define pppoe_dev proto.pppoe.dev #define pppoe_ifindex proto.pppoe.ifindex #define pppoe_pa proto.pppoe.pa #define pppoe_relay proto.pppoe.relay static inline struct pppox_sock *pppox_sk(struct sock *sk) { return (struct pppox_sock *)sk; } static inline struct sock *sk_pppox(struct pppox_sock *po) { return (struct sock *)po; } struct module; struct pppox_proto { int (*create)(struct net *net, struct socket *sock, int kern); int (*ioctl)(struct socket *sock, unsigned int cmd, unsigned long arg); struct module *owner; }; extern int register_pppox_proto(int proto_num, const struct pppox_proto *pp); extern void unregister_pppox_proto(int proto_num); extern void pppox_unbind_sock(struct sock *sk);/* delete ppp-channel binding */ extern int pppox_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg); extern int pppox_compat_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg); #define PPPOEIOCSFWD32 _IOW(0xB1 ,0, compat_size_t) /* PPPoX socket states */ enum { PPPOX_NONE = 0, /* initial state */ PPPOX_CONNECTED = 1, /* connection established ==TCP_ESTABLISHED */ PPPOX_BOUND = 2, /* bound to ppp device */ PPPOX_RELAY = 4, /* forwarding is enabled */ PPPOX_DEAD = 16 /* dead, useless, please clean me up!*/ }; #endif /* !(__LINUX_IF_PPPOX_H) */ PK ! !��/( /( fsnotify.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FS_NOTIFY_H #define _LINUX_FS_NOTIFY_H /* * include/linux/fsnotify.h - generic hooks for filesystem notification, to * reduce in-source duplication from both dnotify and inotify. * * We don't compile any of this away in some complicated menagerie of ifdefs. * Instead, we rely on the code inside to optimize away as needed. * * (C) Copyright 2005 Robert Love */ #include <linux/fsnotify_backend.h> #include <linux/audit.h> #include <linux/slab.h> #include <linux/bug.h> /* * Notify this @dir inode about a change in a child directory entry. * The directory entry may have turned positive or negative or its inode may * have changed (i.e. renamed over). * * Unlike fsnotify_parent(), the event will be reported regardless of the * FS_EVENT_ON_CHILD mask on the parent inode and will not be reported if only * the child is interested and not the parent. */ static inline int fsnotify_name(__u32 mask, const void *data, int data_type, struct inode *dir, const struct qstr *name, u32 cookie) { if (atomic_long_read(&dir->i_sb->s_fsnotify_connectors) == 0) return 0; return fsnotify(mask, data, data_type, dir, name, NULL, cookie); } static inline void fsnotify_dirent(struct inode *dir, struct dentry *dentry, __u32 mask) { fsnotify_name(mask, dentry, FSNOTIFY_EVENT_DENTRY, dir, &dentry->d_name, 0); } static inline void fsnotify_inode(struct inode *inode, __u32 mask) { if (atomic_long_read(&inode->i_sb->s_fsnotify_connectors) == 0) return; if (S_ISDIR(inode->i_mode)) mask |= FS_ISDIR; fsnotify(mask, inode, FSNOTIFY_EVENT_INODE, NULL, NULL, inode, 0); } /* Notify this dentry's parent about a child's events. */ static inline int fsnotify_parent(struct dentry *dentry, __u32 mask, const void *data, int data_type) { struct inode *inode = d_inode(dentry); if (atomic_long_read(&inode->i_sb->s_fsnotify_connectors) == 0) return 0; if (S_ISDIR(inode->i_mode)) { mask |= FS_ISDIR; /* sb/mount marks are not interested in name of directory */ if (!(dentry->d_flags & DCACHE_FSNOTIFY_PARENT_WATCHED)) goto notify_child; } /* disconnected dentry cannot notify parent */ if (IS_ROOT(dentry)) goto notify_child; return __fsnotify_parent(dentry, mask, data, data_type); notify_child: return fsnotify(mask, data, data_type, NULL, NULL, inode, 0); } /* * Simple wrappers to consolidate calls to fsnotify_parent() when an event * is on a file/dentry. */ static inline void fsnotify_dentry(struct dentry *dentry, __u32 mask) { fsnotify_parent(dentry, mask, dentry, FSNOTIFY_EVENT_DENTRY); } static inline int fsnotify_file(struct file *file, __u32 mask) { const struct path *path = &file->f_path; /* * FMODE_NONOTIFY are fds generated by fanotify itself which should not * generate new events. We also don't want to generate events for * FMODE_PATH fds (involves open & close events) as they are just * handle creation / destruction events and not "real" file events. */ if (file->f_mode & (FMODE_NONOTIFY | FMODE_PATH)) return 0; return fsnotify_parent(path->dentry, mask, path, FSNOTIFY_EVENT_PATH); } /* Simple call site for access decisions */ static inline int fsnotify_perm(struct file *file, int mask) { int ret; __u32 fsnotify_mask = 0; if (!(mask & (MAY_READ | MAY_OPEN))) return 0; if (mask & MAY_OPEN) { fsnotify_mask = FS_OPEN_PERM; if (file->f_flags & __FMODE_EXEC) { ret = fsnotify_file(file, FS_OPEN_EXEC_PERM); if (ret) return ret; } } else if (mask & MAY_READ) { fsnotify_mask = FS_ACCESS_PERM; } return fsnotify_file(file, fsnotify_mask); } /* * fsnotify_link_count - inode's link count changed */ static inline void fsnotify_link_count(struct inode *inode) { fsnotify_inode(inode, FS_ATTRIB); } /* * fsnotify_move - file old_name at old_dir was moved to new_name at new_dir */ static inline void fsnotify_move(struct inode *old_dir, struct inode *new_dir, const struct qstr *old_name, int isdir, struct inode *target, struct dentry *moved) { struct inode *source = moved->d_inode; u32 fs_cookie = fsnotify_get_cookie(); __u32 old_dir_mask = FS_MOVED_FROM; __u32 new_dir_mask = FS_MOVED_TO; __u32 rename_mask = FS_RENAME; const struct qstr *new_name = &moved->d_name; if (isdir) { old_dir_mask |= FS_ISDIR; new_dir_mask |= FS_ISDIR; rename_mask |= FS_ISDIR; } /* Event with information about both old and new parent+name */ fsnotify_name(rename_mask, moved, FSNOTIFY_EVENT_DENTRY, old_dir, old_name, 0); fsnotify_name(old_dir_mask, source, FSNOTIFY_EVENT_INODE, old_dir, old_name, fs_cookie); fsnotify_name(new_dir_mask, source, FSNOTIFY_EVENT_INODE, new_dir, new_name, fs_cookie); if (target) fsnotify_link_count(target); fsnotify_inode(source, FS_MOVE_SELF); audit_inode_child(new_dir, moved, AUDIT_TYPE_CHILD_CREATE); } /* * fsnotify_inode_delete - and inode is being evicted from cache, clean up is needed */ static inline void fsnotify_inode_delete(struct inode *inode) { __fsnotify_inode_delete(inode); } /* * fsnotify_vfsmount_delete - a vfsmount is being destroyed, clean up is needed */ static inline void fsnotify_vfsmount_delete(struct vfsmount *mnt) { __fsnotify_vfsmount_delete(mnt); } /* * fsnotify_inoderemove - an inode is going away */ static inline void fsnotify_inoderemove(struct inode *inode) { fsnotify_inode(inode, FS_DELETE_SELF); __fsnotify_inode_delete(inode); } /* * fsnotify_create - 'name' was linked in * * Caller must make sure that dentry->d_name is stable. * Note: some filesystems (e.g. kernfs) leave @dentry negative and instantiate * ->d_inode later */ static inline void fsnotify_create(struct inode *dir, struct dentry *dentry) { audit_inode_child(dir, dentry, AUDIT_TYPE_CHILD_CREATE); fsnotify_dirent(dir, dentry, FS_CREATE); } /* * fsnotify_link - new hardlink in 'inode' directory * * Caller must make sure that new_dentry->d_name is stable. * Note: We have to pass also the linked inode ptr as some filesystems leave * new_dentry->d_inode NULL and instantiate inode pointer later */ static inline void fsnotify_link(struct inode *dir, struct inode *inode, struct dentry *new_dentry) { fsnotify_link_count(inode); audit_inode_child(dir, new_dentry, AUDIT_TYPE_CHILD_CREATE); fsnotify_name(FS_CREATE, inode, FSNOTIFY_EVENT_INODE, dir, &new_dentry->d_name, 0); } /* * fsnotify_delete - @dentry was unlinked and unhashed * * Caller must make sure that dentry->d_name is stable. * * Note: unlike fsnotify_unlink(), we have to pass also the unlinked inode * as this may be called after d_delete() and old_dentry may be negative. */ static inline void fsnotify_delete(struct inode *dir, struct inode *inode, struct dentry *dentry) { __u32 mask = FS_DELETE; if (S_ISDIR(inode->i_mode)) mask |= FS_ISDIR; fsnotify_name(mask, inode, FSNOTIFY_EVENT_INODE, dir, &dentry->d_name, 0); } /** * d_delete_notify - delete a dentry and call fsnotify_delete() * @dentry: The dentry to delete * * This helper is used to guaranty that the unlinked inode cannot be found * by lookup of this name after fsnotify_delete() event has been delivered. */ static inline void d_delete_notify(struct inode *dir, struct dentry *dentry) { struct inode *inode = d_inode(dentry); ihold(inode); d_delete(dentry); fsnotify_delete(dir, inode, dentry); iput(inode); } /* * fsnotify_unlink - 'name' was unlinked * * Caller must make sure that dentry->d_name is stable. */ static inline void fsnotify_unlink(struct inode *dir, struct dentry *dentry) { if (WARN_ON_ONCE(d_is_negative(dentry))) return; fsnotify_delete(dir, d_inode(dentry), dentry); } /* * fsnotify_mkdir - directory 'name' was created * * Caller must make sure that dentry->d_name is stable. * Note: some filesystems (e.g. kernfs) leave @dentry negative and instantiate * ->d_inode later */ static inline void fsnotify_mkdir(struct inode *dir, struct dentry *dentry) { audit_inode_child(dir, dentry, AUDIT_TYPE_CHILD_CREATE); fsnotify_dirent(dir, dentry, FS_CREATE | FS_ISDIR); } /* * fsnotify_rmdir - directory 'name' was removed * * Caller must make sure that dentry->d_name is stable. */ static inline void fsnotify_rmdir(struct inode *dir, struct dentry *dentry) { if (WARN_ON_ONCE(d_is_negative(dentry))) return; fsnotify_delete(dir, d_inode(dentry), dentry); } /* * fsnotify_access - file was read */ static inline void fsnotify_access(struct file *file) { fsnotify_file(file, FS_ACCESS); } /* * fsnotify_modify - file was modified */ static inline void fsnotify_modify(struct file *file) { fsnotify_file(file, FS_MODIFY); } /* * fsnotify_open - file was opened */ static inline void fsnotify_open(struct file *file) { __u32 mask = FS_OPEN; if (file->f_flags & __FMODE_EXEC) mask |= FS_OPEN_EXEC; fsnotify_file(file, mask); } /* * fsnotify_close - file was closed */ static inline void fsnotify_close(struct file *file) { __u32 mask = (file->f_mode & FMODE_WRITE) ? FS_CLOSE_WRITE : FS_CLOSE_NOWRITE; fsnotify_file(file, mask); } /* * fsnotify_xattr - extended attributes were changed */ static inline void fsnotify_xattr(struct dentry *dentry) { fsnotify_dentry(dentry, FS_ATTRIB); } /* * fsnotify_change - notify_change event. file was modified and/or metadata * was changed. */ static inline void fsnotify_change(struct dentry *dentry, unsigned int ia_valid) { __u32 mask = 0; if (ia_valid & ATTR_UID) mask |= FS_ATTRIB; if (ia_valid & ATTR_GID) mask |= FS_ATTRIB; if (ia_valid & ATTR_SIZE) mask |= FS_MODIFY; /* both times implies a utime(s) call */ if ((ia_valid & (ATTR_ATIME | ATTR_MTIME)) == (ATTR_ATIME | ATTR_MTIME)) mask |= FS_ATTRIB; else if (ia_valid & ATTR_ATIME) mask |= FS_ACCESS; else if (ia_valid & ATTR_MTIME) mask |= FS_MODIFY; if (ia_valid & ATTR_MODE) mask |= FS_ATTRIB; if (mask) fsnotify_dentry(dentry, mask); } static inline int fsnotify_sb_error(struct super_block *sb, struct inode *inode, int error) { struct fs_error_report report = { .error = error, .inode = inode, .sb = sb, }; return fsnotify(FS_ERROR, &report, FSNOTIFY_EVENT_ERROR, NULL, NULL, NULL, 0); } #endif /* _LINUX_FS_NOTIFY_H */ PK ! �Jf�S� S� phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Framework and drivers for configuring and reading different PHYs * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c * * Author: Andy Fleming * * Copyright (c) 2004 Freescale Semiconductor, Inc. */ #ifndef __PHY_H #define __PHY_H #include <linux/compiler.h> #include <linux/spinlock.h> #include <linux/ethtool.h> #include <linux/linkmode.h> #include <linux/netlink.h> #include <linux/mdio.h> #include <linux/mii.h> #include <linux/mii_timestamper.h> #include <linux/module.h> #include <linux/timer.h> #include <linux/workqueue.h> #include <linux/mod_devicetable.h> #include <linux/u64_stats_sync.h> #include <linux/irqreturn.h> #include <linux/iopoll.h> #include <linux/refcount.h> #include <linux/atomic.h> #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ SUPPORTED_TP | \ SUPPORTED_MII) #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ SUPPORTED_10baseT_Full) #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ SUPPORTED_100baseT_Full) #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ SUPPORTED_1000baseT_Full) extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) extern const int phy_basic_ports_array[3]; extern const int phy_fibre_port_array[1]; extern const int phy_all_ports_features_array[7]; extern const int phy_10_100_features_array[4]; extern const int phy_basic_t1_features_array[2]; extern const int phy_gbit_features_array[2]; extern const int phy_10gbit_features_array[1]; /* * Set phydev->irq to PHY_POLL if interrupts are not supported, * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if * the attached MAC driver handles the interrupt */ #define PHY_POLL -1 #define PHY_MAC_INTERRUPT -2 #define PHY_IS_INTERNAL 0x00000001 #define PHY_RST_AFTER_CLK_EN 0x00000002 #define PHY_POLL_CABLE_TEST 0x00000004 #define MDIO_DEVICE_IS_PHY 0x80000000 /** * enum phy_interface_t - Interface Mode definitions * * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined * @PHY_INTERFACE_MODE_MII: Median-independent interface * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay * @PHY_INTERFACE_MODE_RTBI: Reduced TBI * @PHY_INTERFACE_MODE_SMII: ??? MII * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN * @PHY_INTERFACE_MODE_MAX: Book keeping * * Describes the interface between the MAC and PHY. */ typedef enum { PHY_INTERFACE_MODE_NA, PHY_INTERFACE_MODE_INTERNAL, PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_SGMII, PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_REVMII, PHY_INTERFACE_MODE_RMII, PHY_INTERFACE_MODE_REVRMII, PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID, PHY_INTERFACE_MODE_RGMII_TXID, PHY_INTERFACE_MODE_RTBI, PHY_INTERFACE_MODE_SMII, PHY_INTERFACE_MODE_XGMII, PHY_INTERFACE_MODE_XLGMII, PHY_INTERFACE_MODE_MOCA, PHY_INTERFACE_MODE_QSGMII, PHY_INTERFACE_MODE_TRGMII, PHY_INTERFACE_MODE_100BASEX, PHY_INTERFACE_MODE_1000BASEX, PHY_INTERFACE_MODE_2500BASEX, PHY_INTERFACE_MODE_5GBASER, PHY_INTERFACE_MODE_RXAUI, PHY_INTERFACE_MODE_XAUI, /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ PHY_INTERFACE_MODE_10GBASER, PHY_INTERFACE_MODE_25GBASER, PHY_INTERFACE_MODE_USXGMII, /* 10GBASE-KR - with Clause 73 AN */ PHY_INTERFACE_MODE_10GKR, PHY_INTERFACE_MODE_MAX, } phy_interface_t; /* * phy_supported_speeds - return all speeds currently supported by a PHY device */ unsigned int phy_supported_speeds(struct phy_device *phy, unsigned int *speeds, unsigned int size); /** * phy_modes - map phy_interface_t enum to device tree binding of phy-mode * @interface: enum phy_interface_t value * * Description: maps enum &phy_interface_t defined in this file * into the device tree binding of 'phy-mode', so that Ethernet * device driver can get PHY interface from device tree. */ static inline const char *phy_modes(phy_interface_t interface) { switch (interface) { case PHY_INTERFACE_MODE_NA: return ""; case PHY_INTERFACE_MODE_INTERNAL: return "internal"; case PHY_INTERFACE_MODE_MII: return "mii"; case PHY_INTERFACE_MODE_GMII: return "gmii"; case PHY_INTERFACE_MODE_SGMII: return "sgmii"; case PHY_INTERFACE_MODE_TBI: return "tbi"; case PHY_INTERFACE_MODE_REVMII: return "rev-mii"; case PHY_INTERFACE_MODE_RMII: return "rmii"; case PHY_INTERFACE_MODE_REVRMII: return "rev-rmii"; case PHY_INTERFACE_MODE_RGMII: return "rgmii"; case PHY_INTERFACE_MODE_RGMII_ID: return "rgmii-id"; case PHY_INTERFACE_MODE_RGMII_RXID: return "rgmii-rxid"; case PHY_INTERFACE_MODE_RGMII_TXID: return "rgmii-txid"; case PHY_INTERFACE_MODE_RTBI: return "rtbi"; case PHY_INTERFACE_MODE_SMII: return "smii"; case PHY_INTERFACE_MODE_XGMII: return "xgmii"; case PHY_INTERFACE_MODE_XLGMII: return "xlgmii"; case PHY_INTERFACE_MODE_MOCA: return "moca"; case PHY_INTERFACE_MODE_QSGMII: return "qsgmii"; case PHY_INTERFACE_MODE_TRGMII: return "trgmii"; case PHY_INTERFACE_MODE_1000BASEX: return "1000base-x"; case PHY_INTERFACE_MODE_2500BASEX: return "2500base-x"; case PHY_INTERFACE_MODE_5GBASER: return "5gbase-r"; case PHY_INTERFACE_MODE_RXAUI: return "rxaui"; case PHY_INTERFACE_MODE_XAUI: return "xaui"; case PHY_INTERFACE_MODE_10GBASER: return "10gbase-r"; case PHY_INTERFACE_MODE_25GBASER: return "25gbase-r"; case PHY_INTERFACE_MODE_USXGMII: return "usxgmii"; case PHY_INTERFACE_MODE_10GKR: return "10gbase-kr"; case PHY_INTERFACE_MODE_100BASEX: return "100base-x"; default: return "unknown"; } } #define PHY_INIT_TIMEOUT 100000 #define PHY_FORCE_TIMEOUT 10 #define PHY_MAX_ADDR 32 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ #define PHY_ID_FMT "%s:%02x" #define MII_BUS_ID_SIZE 61 struct device; struct phylink; struct sfp_bus; struct sfp_upstream_ops; struct sk_buff; /** * struct mdio_bus_stats - Statistics counters for MDIO busses * @transfers: Total number of transfers, i.e. @writes + @reads * @errors: Number of MDIO transfers that returned an error * @writes: Number of write transfers * @reads: Number of read transfers * @syncp: Synchronisation for incrementing statistics */ struct mdio_bus_stats { u64_stats_t transfers; u64_stats_t errors; u64_stats_t writes; u64_stats_t reads; /* Must be last, add new statistics above */ struct u64_stats_sync syncp; }; /** * struct phy_package_shared - Shared information in PHY packages * @addr: Common PHY address used to combine PHYs in one package * @refcnt: Number of PHYs connected to this shared data * @flags: Initialization of PHY package * @priv_size: Size of the shared private data @priv * @priv: Driver private data shared across a PHY package * * Represents a shared structure between different phydev's in the same * package, for example a quad PHY. See phy_package_join() and * phy_package_leave(). */ struct phy_package_shared { int addr; refcount_t refcnt; unsigned long flags; size_t priv_size; /* private data pointer */ /* note that this pointer is shared between different phydevs and * the user has to take care of appropriate locking. It is allocated * and freed automatically by phy_package_join() and * phy_package_leave(). */ void *priv; }; /* used as bit number in atomic bitops */ #define PHY_SHARED_F_INIT_DONE 0 #define PHY_SHARED_F_PROBE_DONE 1 /** * struct mii_bus - Represents an MDIO bus * * @owner: Who owns this device * @name: User friendly name for this MDIO device, or driver name * @id: Unique identifier for this bus, typical from bus hierarchy * @priv: Driver private data * * The Bus class for PHYs. Devices which provide access to * PHYs should register using this structure */ struct mii_bus { struct module *owner; const char *name; char id[MII_BUS_ID_SIZE]; void *priv; /** @read: Perform a read transfer on the bus */ int (*read)(struct mii_bus *bus, int addr, int regnum); /** @write: Perform a write transfer on the bus */ int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); /** @reset: Perform a reset of the bus */ int (*reset)(struct mii_bus *bus); /** @stats: Statistic counters per device on the bus */ struct mdio_bus_stats stats[PHY_MAX_ADDR]; /** * @mdio_lock: A lock to ensure that only one thing can read/write * the MDIO bus at a time */ struct mutex mdio_lock; /** @parent: Parent device of this bus */ struct device *parent; /** @state: State of bus structure */ enum { MDIOBUS_ALLOCATED = 1, MDIOBUS_REGISTERED, MDIOBUS_UNREGISTERED, MDIOBUS_RELEASED, } state; /** @dev: Kernel device representation */ struct device dev; /** @mdio_map: list of all MDIO devices on bus */ struct mdio_device *mdio_map[PHY_MAX_ADDR]; /** @phy_mask: PHY addresses to be ignored when probing */ u32 phy_mask; /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ u32 phy_ignore_ta_mask; /** * @irq: An array of interrupts, each PHY's interrupt at the index * matching its address */ int irq[PHY_MAX_ADDR]; /** @reset_delay_us: GPIO reset pulse width in microseconds */ int reset_delay_us; /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ int reset_post_delay_us; /** @reset_gpiod: Reset GPIO descriptor pointer */ struct gpio_desc *reset_gpiod; /** @probe_capabilities: bus capabilities, used for probing */ enum { MDIOBUS_NO_CAP = 0, MDIOBUS_C22, MDIOBUS_C45, MDIOBUS_C22_C45, } probe_capabilities; /** @shared_lock: protect access to the shared element */ struct mutex shared_lock; /** @shared: shared state across different PHYs */ struct phy_package_shared *shared[PHY_MAX_ADDR]; }; #define to_mii_bus(d) container_of(d, struct mii_bus, dev) struct mii_bus *mdiobus_alloc_size(size_t size); /** * mdiobus_alloc - Allocate an MDIO bus structure * * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready * for the driver to register the bus. */ static inline struct mii_bus *mdiobus_alloc(void) { return mdiobus_alloc_size(0); } int __mdiobus_register(struct mii_bus *bus, struct module *owner); int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, struct module *owner); #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) #define devm_mdiobus_register(dev, bus) \ __devm_mdiobus_register(dev, bus, THIS_MODULE) void mdiobus_unregister(struct mii_bus *bus); void mdiobus_free(struct mii_bus *bus); struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) { return devm_mdiobus_alloc_size(dev, 0); } struct mii_bus *mdio_find_bus(const char *mdio_name); struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); #define PHY_INTERRUPT_DISABLED false #define PHY_INTERRUPT_ENABLED true /** * enum phy_state - PHY state machine states: * * @PHY_DOWN: PHY device and driver are not ready for anything. probe * should be called if and only if the PHY is in this state, * given that the PHY device exists. * - PHY driver probe function will set the state to @PHY_READY * * @PHY_READY: PHY is ready to send and receive packets, but the * controller is not. By default, PHYs which do not implement * probe will be set to this state by phy_probe(). * - start will set the state to UP * * @PHY_UP: The PHY and attached device are ready to do work. * Interrupts should be started here. * - timer moves to @PHY_NOLINK or @PHY_RUNNING * * @PHY_NOLINK: PHY is up, but not currently plugged in. * - irq or timer will set @PHY_RUNNING if link comes back * - phy_stop moves to @PHY_HALTED * * @PHY_RUNNING: PHY is currently up, running, and possibly sending * and/or receiving packets * - irq or timer will set @PHY_NOLINK if link goes down * - phy_stop moves to @PHY_HALTED * * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending * is not expected to work, carrier will be indicated as down. PHY will be * poll once per second, or on interrupt for it current state. * Once complete, move to UP to restart the PHY. * - phy_stop aborts the running test and moves to @PHY_HALTED * * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or * PHY is in an error state. * - phy_start moves to @PHY_UP */ enum phy_state { PHY_DOWN = 0, PHY_READY, PHY_HALTED, PHY_UP, PHY_RUNNING, PHY_NOLINK, PHY_CABLETEST, }; #define MDIO_MMD_NUM 32 /** * struct phy_c45_device_ids - 802.3-c45 Device Identifiers * @devices_in_package: IEEE 802.3 devices in package register value. * @mmds_present: bit vector of MMDs present. * @device_ids: The device identifer for each present device. */ struct phy_c45_device_ids { u32 devices_in_package; u32 mmds_present; u32 device_ids[MDIO_MMD_NUM]; }; struct macsec_context; struct macsec_ops; /** * struct phy_device - An instance of a PHY * * @mdio: MDIO bus this PHY is on * @drv: Pointer to the driver for this PHY instance * @phy_id: UID for this device found during discovery * @c45_ids: 802.3-c45 Device Identifiers if is_c45. * @is_c45: Set to true if this PHY uses clause 45 addressing. * @is_internal: Set to true if this PHY is internal to a MAC. * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. * @is_gigabit_capable: Set to true if PHY supports 1000Mbps * @has_fixups: Set to true if this PHY has fixups/quirks. * @suspended: Set to true if this PHY has been suspended successfully. * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. * @loopback_enabled: Set true if this PHY has been loopbacked successfully. * @downshifted_rate: Set true if link speed has been downshifted. * @is_on_sfp_module: Set true if PHY is located on an SFP module. * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY * @state: State of the PHY for management purposes * @dev_flags: Device-specific flags used by the PHY driver. * Bits [15:0] are free to use by the PHY driver to communicate * driver specific behavior. * Bits [23:16] are currently reserved for future use. * Bits [31:24] are reserved for defining generic * PHY driver behavior. * @irq: IRQ number of the PHY's interrupt (-1 if none) * @phy_timer: The timer for handling the state machine * @phylink: Pointer to phylink instance for this PHY * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached * @sfp_bus: SFP bus attached to this PHY's fiber port * @attached_dev: The attached enet driver's device instance ptr * @adjust_link: Callback for the enet controller to respond to changes: in the * link state. * @phy_link_change: Callback for phylink for notification of link change * @macsec_ops: MACsec offloading ops. * * @speed: Current link speed * @duplex: Current duplex * @port: Current port * @pause: Current pause * @asym_pause: Current asymmetric pause * @supported: Combined MAC/PHY supported linkmodes * @advertising: Currently advertised linkmodes * @adv_old: Saved advertised while power saving for WoL * @lp_advertising: Current link partner advertised linkmodes * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited * @autoneg: Flag autoneg being used * @link: Current link state * @autoneg_complete: Flag auto negotiation of the link has completed * @mdix: Current crossover * @mdix_ctrl: User setting of crossover * @interrupts: Flag interrupts have been enabled * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt * handling shall be postponed until PHY has resumed * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, * requiring a rerun of the interrupt handler after resume * @interface: enum phy_interface_t value * @skb: Netlink message for cable diagnostics * @nest: Netlink nest used for cable diagnostics * @ehdr: nNtlink header for cable diagnostics * @phy_led_triggers: Array of LED triggers * @phy_num_led_triggers: Number of triggers in @phy_led_triggers * @led_link_trigger: LED trigger for link up/down * @last_triggered: last LED trigger for link speed * @master_slave_set: User requested master/slave configuration * @master_slave_get: Current master/slave advertisement * @master_slave_state: Current master/slave configuration * @mii_ts: Pointer to time stamper callbacks * @lock: Mutex for serialization access to PHY * @state_queue: Work queue for state machine * @shared: Pointer to private data shared by phys in one package * @priv: Pointer to driver private data * * interrupts currently only supports enabled or disabled, * but could be changed in the future to support enabling * and disabling specific interrupts * * Contains some infrastructure for polling and interrupt * handling, as well as handling shifts in PHY hardware state */ struct phy_device { struct mdio_device mdio; /* Information about the PHY type */ /* And management functions */ struct phy_driver *drv; u32 phy_id; struct phy_c45_device_ids c45_ids; unsigned is_c45:1; unsigned is_internal:1; unsigned is_pseudo_fixed_link:1; unsigned is_gigabit_capable:1; unsigned has_fixups:1; unsigned suspended:1; unsigned suspended_by_mdio_bus:1; unsigned sysfs_links:1; unsigned loopback_enabled:1; unsigned downshifted_rate:1; unsigned is_on_sfp_module:1; unsigned mac_managed_pm:1; unsigned autoneg:1; /* The most recently read link state */ unsigned link:1; unsigned autoneg_complete:1; /* Interrupts are enabled */ unsigned interrupts:1; unsigned irq_suspended:1; unsigned irq_rerun:1; enum phy_state state; u32 dev_flags; phy_interface_t interface; /* * forced speed & duplex (no autoneg) * partner speed & duplex & pause (autoneg) */ int speed; int duplex; int port; int pause; int asym_pause; u8 master_slave_get; u8 master_slave_set; u8 master_slave_state; /* Union of PHY and Attached devices' supported link modes */ /* See ethtool.h for more info */ __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); /* used with phy_speed_down */ __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); /* Energy efficient ethernet modes which should be prohibited */ u32 eee_broken_modes; #ifdef CONFIG_LED_TRIGGER_PHY struct phy_led_trigger *phy_led_triggers; unsigned int phy_num_led_triggers; struct phy_led_trigger *last_triggered; struct phy_led_trigger *led_link_trigger; #endif /* * Interrupt number for this PHY * -1 means no interrupt */ int irq; /* private data pointer */ /* For use by PHYs to maintain extra state */ void *priv; /* shared data pointer */ /* For use by PHYs inside the same package that need a shared state. */ struct phy_package_shared *shared; /* Reporting cable test results */ struct sk_buff *skb; void *ehdr; struct nlattr *nest; /* Interrupt and Polling infrastructure */ struct delayed_work state_queue; struct mutex lock; /* This may be modified under the rtnl lock */ bool sfp_bus_attached; struct sfp_bus *sfp_bus; struct phylink *phylink; struct net_device *attached_dev; struct mii_timestamper *mii_ts; u8 mdix; u8 mdix_ctrl; void (*phy_link_change)(struct phy_device *phydev, bool up); void (*adjust_link)(struct net_device *dev); #if IS_ENABLED(CONFIG_MACSEC) /* MACsec management functions */ const struct macsec_ops *macsec_ops; #endif }; static inline struct phy_device *to_phy_device(const struct device *dev) { return container_of(to_mdio_device(dev), struct phy_device, mdio); } /** * struct phy_tdr_config - Configuration of a TDR raw test * * @first: Distance for first data collection point * @last: Distance for last data collection point * @step: Step between data collection points * @pair: Bitmap of cable pairs to collect data for * * A structure containing possible configuration parameters * for a TDR cable test. The driver does not need to implement * all the parameters, but should report what is actually used. * All distances are in centimeters. */ struct phy_tdr_config { u32 first; u32 last; u32 step; s8 pair; }; #define PHY_PAIR_ALL -1 /** * struct phy_driver - Driver structure for a particular PHY type * * @mdiodrv: Data common to all MDIO devices * @phy_id: The result of reading the UID registers of this PHY * type, and ANDing them with the phy_id_mask. This driver * only works for PHYs with IDs which match this field * @name: The friendly name of this PHY type * @phy_id_mask: Defines the important bits of the phy_id * @features: A mandatory list of features (speed, duplex, etc) * supported by this PHY * @flags: A bitfield defining certain other features this PHY * supports (like interrupts) * @driver_data: Static driver data * * All functions are optional. If config_aneg or read_status * are not implemented, the phy core uses the genphy versions. * Note that none of these functions should be called from * interrupt time. The goal is for the bus read/write functions * to be able to block when the bus transaction is happening, * and be freed up by an interrupt (The MPC85xx has this ability, * though it is not currently supported in the driver). */ struct phy_driver { struct mdio_driver_common mdiodrv; u32 phy_id; char *name; u32 phy_id_mask; const unsigned long * const features; u32 flags; const void *driver_data; /** * @soft_reset: Called to issue a PHY software reset */ int (*soft_reset)(struct phy_device *phydev); /** * @config_init: Called to initialize the PHY, * including after a reset */ int (*config_init)(struct phy_device *phydev); /** * @probe: Called during discovery. Used to set * up device-specific structures, if any */ int (*probe)(struct phy_device *phydev); /** * @get_features: Probe the hardware to determine what * abilities it has. Should only set phydev->supported. */ int (*get_features)(struct phy_device *phydev); /* PHY Power Management */ /** @suspend: Suspend the hardware, saving state if needed */ int (*suspend)(struct phy_device *phydev); /** @resume: Resume the hardware, restoring state if needed */ int (*resume)(struct phy_device *phydev); /** * @config_aneg: Configures the advertisement and resets * autonegotiation if phydev->autoneg is on, * forces the speed to the current settings in phydev * if phydev->autoneg is off */ int (*config_aneg)(struct phy_device *phydev); /** @aneg_done: Determines the auto negotiation result */ int (*aneg_done)(struct phy_device *phydev); /** @read_status: Determines the negotiated speed and duplex */ int (*read_status)(struct phy_device *phydev); /** * @config_intr: Enables or disables interrupts. * It should also clear any pending interrupts prior to enabling the * IRQs and after disabling them. */ int (*config_intr)(struct phy_device *phydev); /** @handle_interrupt: Override default interrupt handling */ irqreturn_t (*handle_interrupt)(struct phy_device *phydev); /** @remove: Clears up any memory if needed */ void (*remove)(struct phy_device *phydev); /** * @match_phy_device: Returns true if this is a suitable * driver for the given phydev. If NULL, matching is based on * phy_id and phy_id_mask. */ int (*match_phy_device)(struct phy_device *phydev); /** * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY * register changes to enable Wake on LAN, so set_wol is * provided to be called in the ethernet driver's set_wol * function. */ int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); /** * @get_wol: See set_wol, but for checking whether Wake on LAN * is enabled. */ void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); /** * @link_change_notify: Called to inform a PHY device driver * when the core is about to change the link state. This * callback is supposed to be used as fixup hook for drivers * that need to take action when the link state * changes. Drivers are by no means allowed to mess with the * PHY device structure in their implementations. */ void (*link_change_notify)(struct phy_device *dev); /** * @read_mmd: PHY specific driver override for reading a MMD * register. This function is optional for PHY specific * drivers. When not provided, the default MMD read function * will be used by phy_read_mmd(), which will use either a * direct read for Clause 45 PHYs or an indirect read for * Clause 22 PHYs. devnum is the MMD device number within the * PHY device, regnum is the register within the selected MMD * device. */ int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); /** * @write_mmd: PHY specific driver override for writing a MMD * register. This function is optional for PHY specific * drivers. When not provided, the default MMD write function * will be used by phy_write_mmd(), which will use either a * direct write for Clause 45 PHYs, or an indirect write for * Clause 22 PHYs. devnum is the MMD device number within the * PHY device, regnum is the register within the selected MMD * device. val is the value to be written. */ int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, u16 val); /** @read_page: Return the current PHY register page number */ int (*read_page)(struct phy_device *dev); /** @write_page: Set the current PHY register page number */ int (*write_page)(struct phy_device *dev, int page); /** * @module_info: Get the size and type of the eeprom contained * within a plug-in module */ int (*module_info)(struct phy_device *dev, struct ethtool_modinfo *modinfo); /** * @module_eeprom: Get the eeprom information from the plug-in * module */ int (*module_eeprom)(struct phy_device *dev, struct ethtool_eeprom *ee, u8 *data); /** @cable_test_start: Start a cable test */ int (*cable_test_start)(struct phy_device *dev); /** @cable_test_tdr_start: Start a raw TDR cable test */ int (*cable_test_tdr_start)(struct phy_device *dev, const struct phy_tdr_config *config); /** * @cable_test_get_status: Once per second, or on interrupt, * request the status of the test. */ int (*cable_test_get_status)(struct phy_device *dev, bool *finished); /* Get statistics from the PHY using ethtool */ /** @get_sset_count: Number of statistic counters */ int (*get_sset_count)(struct phy_device *dev); /** @get_strings: Names of the statistic counters */ void (*get_strings)(struct phy_device *dev, u8 *data); /** @get_stats: Return the statistic counter values */ void (*get_stats)(struct phy_device *dev, struct ethtool_stats *stats, u64 *data); /* Get and Set PHY tunables */ /** @get_tunable: Return the value of a tunable */ int (*get_tunable)(struct phy_device *dev, struct ethtool_tunable *tuna, void *data); /** @set_tunable: Set the value of a tunable */ int (*set_tunable)(struct phy_device *dev, struct ethtool_tunable *tuna, const void *data); /** @set_loopback: Set the loopback mood of the PHY */ int (*set_loopback)(struct phy_device *dev, bool enable); /** @get_sqi: Get the signal quality indication */ int (*get_sqi)(struct phy_device *dev); /** @get_sqi_max: Get the maximum signal quality indication */ int (*get_sqi_max)(struct phy_device *dev); }; #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ struct phy_driver, mdiodrv) #define PHY_ANY_ID "MATCH ANY PHY" #define PHY_ANY_UID 0xffffffff #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) /* A Structure for boards to register fixups with the PHY Lib */ struct phy_fixup { struct list_head list; char bus_id[MII_BUS_ID_SIZE + 3]; u32 phy_uid; u32 phy_uid_mask; int (*run)(struct phy_device *phydev); }; const char *phy_speed_to_str(int speed); const char *phy_duplex_to_str(unsigned int duplex); /* A structure for mapping a particular speed and duplex * combination to a particular SUPPORTED and ADVERTISED value */ struct phy_setting { u32 speed; u8 duplex; u8 bit; }; const struct phy_setting * phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact); size_t phy_speeds(unsigned int *speeds, size_t size, unsigned long *mask); void of_set_phy_supported(struct phy_device *phydev); void of_set_phy_eee_broken(struct phy_device *phydev); int phy_speed_down_core(struct phy_device *phydev); /** * phy_is_started - Convenience function to check whether PHY is started * @phydev: The phy_device struct */ static inline bool phy_is_started(struct phy_device *phydev) { return phydev->state >= PHY_UP; } void phy_resolve_aneg_pause(struct phy_device *phydev); void phy_resolve_aneg_linkmode(struct phy_device *phydev); void phy_check_downshift(struct phy_device *phydev); /** * phy_read - Convenience function for reading a given PHY register * @phydev: the phy_device struct * @regnum: register number to read * * NOTE: MUST NOT be called from interrupt context, * because the bus read/write functions may wait for an interrupt * to conclude the operation. */ static inline int phy_read(struct phy_device *phydev, u32 regnum) { return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); } #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ timeout_us, sleep_before_read) \ ({ \ int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ if (val < 0) \ __ret = val; \ if (__ret) \ phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ __ret; \ }) /** * __phy_read - convenience function for reading a given PHY register * @phydev: the phy_device struct * @regnum: register number to read * * The caller must have taken the MDIO bus lock. */ static inline int __phy_read(struct phy_device *phydev, u32 regnum) { return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); } /** * phy_write - Convenience function for writing a given PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: value to write to @regnum * * NOTE: MUST NOT be called from interrupt context, * because the bus read/write functions may wait for an interrupt * to conclude the operation. */ static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) { return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); } /** * __phy_write - Convenience function for writing a given PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: value to write to @regnum * * The caller must have taken the MDIO bus lock. */ static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) { return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); } /** * __phy_modify_changed() - Convenience function for modifying a PHY register * @phydev: a pointer to a &struct phy_device * @regnum: register number * @mask: bit mask of bits to clear * @set: bit mask of bits to set * * Unlocked helper function which allows a PHY register to be modified as * new register value = (old register value & ~mask) | set * * Returns negative errno, 0 if there was no change, and 1 in case of change */ static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) { return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, regnum, mask, set); } /* * phy_read_mmd - Convenience function for reading a register * from an MMD on a given PHY. */ int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); /** * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a * condition is met or a timeout occurs * * @phydev: The phy_device struct * @devaddr: The MMD to read from * @regnum: The register on the MMD to read * @val: Variable to read the register into * @cond: Break condition (usually involving @val) * @sleep_us: Maximum time to sleep between reads in us (0 * tight-loops). Should be less than ~20ms since usleep_range * is used (see Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * @sleep_before_read: if it is true, sleep @sleep_us before read. * Returns 0 on success and -ETIMEDOUT upon a timeout. In either * case, the last read value at @args is stored in @val. Must not * be called from atomic context if sleep_us or timeout_us are used. */ #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ sleep_us, timeout_us, sleep_before_read) \ ({ \ int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ sleep_us, timeout_us, sleep_before_read, \ phydev, devaddr, regnum); \ if (val < 0) \ __ret = val; \ if (__ret) \ phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ __ret; \ }) /* * __phy_read_mmd - Convenience function for reading a register * from an MMD on a given PHY. */ int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); /* * phy_write_mmd - Convenience function for writing a register * on an MMD on a given PHY. */ int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); /* * __phy_write_mmd - Convenience function for writing a register * on an MMD on a given PHY. */ int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, u16 mask, u16 set); int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, u16 mask, u16 set); int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 mask, u16 set); int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 mask, u16 set); /** * __phy_set_bits - Convenience function for setting bits in a PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: bits to set * * The caller must have taken the MDIO bus lock. */ static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) { return __phy_modify(phydev, regnum, 0, val); } /** * __phy_clear_bits - Convenience function for clearing bits in a PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: bits to clear * * The caller must have taken the MDIO bus lock. */ static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) { return __phy_modify(phydev, regnum, val, 0); } /** * phy_set_bits - Convenience function for setting bits in a PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: bits to set */ static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) { return phy_modify(phydev, regnum, 0, val); } /** * phy_clear_bits - Convenience function for clearing bits in a PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: bits to clear */ static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) { return phy_modify(phydev, regnum, val, 0); } /** * __phy_set_bits_mmd - Convenience function for setting bits in a register * on MMD * @phydev: the phy_device struct * @devad: the MMD containing register to modify * @regnum: register number to modify * @val: bits to set * * The caller must have taken the MDIO bus lock. */ static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) { return __phy_modify_mmd(phydev, devad, regnum, 0, val); } /** * __phy_clear_bits_mmd - Convenience function for clearing bits in a register * on MMD * @phydev: the phy_device struct * @devad: the MMD containing register to modify * @regnum: register number to modify * @val: bits to clear * * The caller must have taken the MDIO bus lock. */ static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) { return __phy_modify_mmd(phydev, devad, regnum, val, 0); } /** * phy_set_bits_mmd - Convenience function for setting bits in a register * on MMD * @phydev: the phy_device struct * @devad: the MMD containing register to modify * @regnum: register number to modify * @val: bits to set */ static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) { return phy_modify_mmd(phydev, devad, regnum, 0, val); } /** * phy_clear_bits_mmd - Convenience function for clearing bits in a register * on MMD * @phydev: the phy_device struct * @devad: the MMD containing register to modify * @regnum: register number to modify * @val: bits to clear */ static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) { return phy_modify_mmd(phydev, devad, regnum, val, 0); } /** * phy_interrupt_is_valid - Convenience function for testing a given PHY irq * @phydev: the phy_device struct * * NOTE: must be kept in sync with addition/removal of PHY_POLL and * PHY_MAC_INTERRUPT */ static inline bool phy_interrupt_is_valid(struct phy_device *phydev) { return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; } /** * phy_polling_mode - Convenience function for testing whether polling is * used to detect PHY status changes * @phydev: the phy_device struct */ static inline bool phy_polling_mode(struct phy_device *phydev) { if (phydev->state == PHY_CABLETEST) if (phydev->drv->flags & PHY_POLL_CABLE_TEST) return true; return phydev->irq == PHY_POLL; } /** * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. * @phydev: the phy_device struct */ static inline bool phy_has_hwtstamp(struct phy_device *phydev) { return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; } /** * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. * @phydev: the phy_device struct */ static inline bool phy_has_rxtstamp(struct phy_device *phydev) { return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; } /** * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or * PTP hardware clock capabilities. * @phydev: the phy_device struct */ static inline bool phy_has_tsinfo(struct phy_device *phydev) { return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; } /** * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. * @phydev: the phy_device struct */ static inline bool phy_has_txtstamp(struct phy_device *phydev) { return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; } static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) { return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); } static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, int type) { return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); } static inline int phy_ts_info(struct phy_device *phydev, struct ethtool_ts_info *tsinfo) { return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); } static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, int type) { phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); } /** * phy_is_internal - Convenience function for testing if a PHY is internal * @phydev: the phy_device struct */ static inline bool phy_is_internal(struct phy_device *phydev) { return phydev->is_internal; } /** * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module * @phydev: the phy_device struct */ static inline bool phy_on_sfp(struct phy_device *phydev) { return phydev->is_on_sfp_module; } /** * phy_interface_mode_is_rgmii - Convenience function for testing if a * PHY interface mode is RGMII (all variants) * @mode: the &phy_interface_t enum */ static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) { return mode >= PHY_INTERFACE_MODE_RGMII && mode <= PHY_INTERFACE_MODE_RGMII_TXID; }; /** * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z * negotiation * @mode: one of &enum phy_interface_t * * Returns true if the PHY interface mode uses the 16-bit negotiation * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) */ static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) { return mode == PHY_INTERFACE_MODE_1000BASEX || mode == PHY_INTERFACE_MODE_2500BASEX; } /** * phy_interface_is_rgmii - Convenience function for testing if a PHY interface * is RGMII (all variants) * @phydev: the phy_device struct */ static inline bool phy_interface_is_rgmii(struct phy_device *phydev) { return phy_interface_mode_is_rgmii(phydev->interface); }; /** * phy_is_pseudo_fixed_link - Convenience function for testing if this * PHY is the CPU port facing side of an Ethernet switch, or similar. * @phydev: the phy_device struct */ static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) { return phydev->is_pseudo_fixed_link; } int phy_save_page(struct phy_device *phydev); int phy_select_page(struct phy_device *phydev, int page); int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, u16 mask, u16 set); int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, u16 mask, u16 set); struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, bool is_c45, struct phy_c45_device_ids *c45_ids); #if IS_ENABLED(CONFIG_PHYLIB) int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); struct phy_device *device_phy_find_device(struct device *dev); struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); int phy_device_register(struct phy_device *phy); void phy_device_free(struct phy_device *phydev); #else static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) { return 0; } static inline struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) { return 0; } static inline struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) { return NULL; } static inline struct phy_device *device_phy_find_device(struct device *dev) { return NULL; } static inline struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) { return NULL; } static inline struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) { return NULL; } static inline int phy_device_register(struct phy_device *phy) { return 0; } static inline void phy_device_free(struct phy_device *phydev) { } #endif /* CONFIG_PHYLIB */ void phy_device_remove(struct phy_device *phydev); int phy_get_c45_ids(struct phy_device *phydev); int phy_init_hw(struct phy_device *phydev); int phy_suspend(struct phy_device *phydev); int phy_resume(struct phy_device *phydev); int __phy_resume(struct phy_device *phydev); int phy_loopback(struct phy_device *phydev, bool enable); void phy_sfp_attach(void *upstream, struct sfp_bus *bus); void phy_sfp_detach(void *upstream, struct sfp_bus *bus); int phy_sfp_probe(struct phy_device *phydev, const struct sfp_upstream_ops *ops); struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, phy_interface_t interface); struct phy_device *phy_find_first(struct mii_bus *bus); int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, u32 flags, phy_interface_t interface); int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, void (*handler)(struct net_device *), phy_interface_t interface); struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, void (*handler)(struct net_device *), phy_interface_t interface); void phy_disconnect(struct phy_device *phydev); void phy_detach(struct phy_device *phydev); void phy_start(struct phy_device *phydev); void phy_stop(struct phy_device *phydev); int phy_config_aneg(struct phy_device *phydev); int phy_start_aneg(struct phy_device *phydev); int phy_aneg_done(struct phy_device *phydev); int phy_speed_down(struct phy_device *phydev, bool sync); int phy_speed_up(struct phy_device *phydev); int phy_restart_aneg(struct phy_device *phydev); int phy_reset_after_clk_enable(struct phy_device *phydev); #if IS_ENABLED(CONFIG_PHYLIB) int phy_start_cable_test(struct phy_device *phydev, struct netlink_ext_ack *extack); int phy_start_cable_test_tdr(struct phy_device *phydev, struct netlink_ext_ack *extack, const struct phy_tdr_config *config); #else static inline int phy_start_cable_test(struct phy_device *phydev, struct netlink_ext_ack *extack) { NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); return -EOPNOTSUPP; } static inline int phy_start_cable_test_tdr(struct phy_device *phydev, struct netlink_ext_ack *extack, const struct phy_tdr_config *config) { NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); return -EOPNOTSUPP; } #endif int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, u16 cm); static inline void phy_device_reset(struct phy_device *phydev, int value) { mdio_device_reset(&phydev->mdio, value); } #define phydev_err(_phydev, format, args...) \ dev_err(&_phydev->mdio.dev, format, ##args) #define phydev_info(_phydev, format, args...) \ dev_info(&_phydev->mdio.dev, format, ##args) #define phydev_warn(_phydev, format, args...) \ dev_warn(&_phydev->mdio.dev, format, ##args) #define phydev_dbg(_phydev, format, args...) \ dev_dbg(&_phydev->mdio.dev, format, ##args) static inline const char *phydev_name(const struct phy_device *phydev) { return dev_name(&phydev->mdio.dev); } static inline void phy_lock_mdio_bus(struct phy_device *phydev) { mutex_lock(&phydev->mdio.bus->mdio_lock); } static inline void phy_unlock_mdio_bus(struct phy_device *phydev) { mutex_unlock(&phydev->mdio.bus->mdio_lock); } void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) __printf(2, 3); char *phy_attached_info_irq(struct phy_device *phydev) __malloc; void phy_attached_info(struct phy_device *phydev); /* Clause 22 PHY */ int genphy_read_abilities(struct phy_device *phydev); int genphy_setup_forced(struct phy_device *phydev); int genphy_restart_aneg(struct phy_device *phydev); int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); int genphy_config_eee_advert(struct phy_device *phydev); int __genphy_config_aneg(struct phy_device *phydev, bool changed); int genphy_aneg_done(struct phy_device *phydev); int genphy_update_link(struct phy_device *phydev); int genphy_read_lpa(struct phy_device *phydev); int genphy_read_status_fixed(struct phy_device *phydev); int genphy_read_status(struct phy_device *phydev); int genphy_suspend(struct phy_device *phydev); int genphy_resume(struct phy_device *phydev); int genphy_loopback(struct phy_device *phydev, bool enable); int genphy_soft_reset(struct phy_device *phydev); irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); static inline int genphy_config_aneg(struct phy_device *phydev) { return __genphy_config_aneg(phydev, false); } static inline int genphy_no_config_intr(struct phy_device *phydev) { return 0; } int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, u16 regnum); int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, u16 regnum, u16 val); /* Clause 37 */ int genphy_c37_config_aneg(struct phy_device *phydev); int genphy_c37_read_status(struct phy_device *phydev); /* Clause 45 PHY */ int genphy_c45_restart_aneg(struct phy_device *phydev); int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); int genphy_c45_aneg_done(struct phy_device *phydev); int genphy_c45_read_link(struct phy_device *phydev); int genphy_c45_read_lpa(struct phy_device *phydev); int genphy_c45_read_pma(struct phy_device *phydev); int genphy_c45_pma_setup_forced(struct phy_device *phydev); int genphy_c45_an_config_aneg(struct phy_device *phydev); int genphy_c45_an_disable_aneg(struct phy_device *phydev); int genphy_c45_read_mdix(struct phy_device *phydev); int genphy_c45_pma_read_abilities(struct phy_device *phydev); int genphy_c45_read_status(struct phy_device *phydev); int genphy_c45_config_aneg(struct phy_device *phydev); int genphy_c45_loopback(struct phy_device *phydev, bool enable); int genphy_c45_pma_resume(struct phy_device *phydev); int genphy_c45_pma_suspend(struct phy_device *phydev); /* Generic C45 PHY driver */ extern struct phy_driver genphy_c45_driver; /* The gen10g_* functions are the old Clause 45 stub */ int gen10g_config_aneg(struct phy_device *phydev); static inline int phy_read_status(struct phy_device *phydev) { if (!phydev->drv) return -EIO; if (phydev->drv->read_status) return phydev->drv->read_status(phydev); else return genphy_read_status(phydev); } void phy_driver_unregister(struct phy_driver *drv); void phy_drivers_unregister(struct phy_driver *drv, int n); int phy_driver_register(struct phy_driver *new_driver, struct module *owner); int phy_drivers_register(struct phy_driver *new_driver, int n, struct module *owner); void phy_error(struct phy_device *phydev); void phy_state_machine(struct work_struct *work); void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); void phy_trigger_machine(struct phy_device *phydev); void phy_mac_interrupt(struct phy_device *phydev); void phy_start_machine(struct phy_device *phydev); void phy_stop_machine(struct phy_device *phydev); void phy_ethtool_ksettings_get(struct phy_device *phydev, struct ethtool_link_ksettings *cmd); int phy_ethtool_ksettings_set(struct phy_device *phydev, const struct ethtool_link_ksettings *cmd); int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); int phy_disable_interrupts(struct phy_device *phydev); void phy_request_interrupt(struct phy_device *phydev); void phy_free_interrupt(struct phy_device *phydev); void phy_print_status(struct phy_device *phydev); int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); void phy_advertise_supported(struct phy_device *phydev); void phy_support_sym_pause(struct phy_device *phydev); void phy_support_asym_pause(struct phy_device *phydev); void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, bool autoneg); void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); bool phy_validate_pause(struct phy_device *phydev, struct ethtool_pauseparam *pp); void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, const int *delay_values, int size, bool is_rx); void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, bool *tx_pause, bool *rx_pause); int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, int (*run)(struct phy_device *)); int phy_register_fixup_for_id(const char *bus_id, int (*run)(struct phy_device *)); int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, int (*run)(struct phy_device *)); int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); int phy_unregister_fixup_for_id(const char *bus_id); int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); int phy_get_eee_err(struct phy_device *phydev); int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); int phy_ethtool_get_link_ksettings(struct net_device *ndev, struct ethtool_link_ksettings *cmd); int phy_ethtool_set_link_ksettings(struct net_device *ndev, const struct ethtool_link_ksettings *cmd); int phy_ethtool_nway_reset(struct net_device *ndev); int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); void phy_package_leave(struct phy_device *phydev); int devm_phy_package_join(struct device *dev, struct phy_device *phydev, int addr, size_t priv_size); #if IS_ENABLED(CONFIG_PHYLIB) int __init mdio_bus_init(void); void mdio_bus_exit(void); #endif int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); int phy_ethtool_get_sset_count(struct phy_device *phydev); int phy_ethtool_get_stats(struct phy_device *phydev, struct ethtool_stats *stats, u64 *data); static inline int phy_package_read(struct phy_device *phydev, u32 regnum) { struct phy_package_shared *shared = phydev->shared; if (!shared) return -EIO; return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); } static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) { struct phy_package_shared *shared = phydev->shared; if (!shared) return -EIO; return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); } static inline int phy_package_write(struct phy_device *phydev, u32 regnum, u16 val) { struct phy_package_shared *shared = phydev->shared; if (!shared) return -EIO; return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); } static inline int __phy_package_write(struct phy_device *phydev, u32 regnum, u16 val) { struct phy_package_shared *shared = phydev->shared; if (!shared) return -EIO; return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); } static inline bool __phy_package_set_once(struct phy_device *phydev, unsigned int b) { struct phy_package_shared *shared = phydev->shared; if (!shared) return false; return !test_and_set_bit(b, &shared->flags); } static inline bool phy_package_init_once(struct phy_device *phydev) { return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); } static inline bool phy_package_probe_once(struct phy_device *phydev) { return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); } extern struct bus_type mdio_bus_type; struct mdio_board_info { const char *bus_id; char modalias[MDIO_NAME_SIZE]; int mdio_addr; const void *platform_data; }; #if IS_ENABLED(CONFIG_MDIO_DEVICE) int mdiobus_register_board_info(const struct mdio_board_info *info, unsigned int n); #else static inline int mdiobus_register_board_info(const struct mdio_board_info *i, unsigned int n) { return 0; } #endif /** * phy_module_driver() - Helper macro for registering PHY drivers * @__phy_drivers: array of PHY drivers to register * @__count: Numbers of members in array * * Helper macro for PHY drivers which do not do anything special in module * init/exit. Each module may only use this macro once, and calling it * replaces module_init() and module_exit(). */ #define phy_module_driver(__phy_drivers, __count) \ static int __init phy_module_init(void) \ { \ return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ } \ module_init(phy_module_init); \ static void __exit phy_module_exit(void) \ { \ phy_drivers_unregister(__phy_drivers, __count); \ } \ module_exit(phy_module_exit) #define module_phy_driver(__phy_drivers) \ phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) bool phy_driver_is_genphy(struct phy_device *phydev); bool phy_driver_is_genphy_10g(struct phy_device *phydev); #endif /* __PHY_H */ PK ! � range.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RANGE_H #define _LINUX_RANGE_H #include <linux/types.h> struct range { u64 start; u64 end; }; static inline u64 range_len(const struct range *range) { return range->end - range->start + 1; } int add_range(struct range *range, int az, int nr_range, u64 start, u64 end); int add_range_with_merge(struct range *range, int az, int nr_range, u64 start, u64 end); void subtract_range(struct range *range, int az, u64 start, u64 end); int clean_sort_range(struct range *range, int az); void sort_range(struct range *range, int nr_range); #define MAX_RESOURCE ((resource_size_t)~0) static inline resource_size_t cap_resource(u64 val) { if (val > MAX_RESOURCE) return MAX_RESOURCE; return val; } #endif PK ! $��u? u? kcsan-checks.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * KCSAN access checks and modifiers. These can be used to explicitly check * uninstrumented accesses, or change KCSAN checking behaviour of accesses. * * Copyright (C) 2019, Google LLC. */ #ifndef _LINUX_KCSAN_CHECKS_H #define _LINUX_KCSAN_CHECKS_H /* Note: Only include what is already included by compiler.h. */ #include <linux/compiler_attributes.h> #include <linux/types.h> /* Access types -- if KCSAN_ACCESS_WRITE is not set, the access is a read. */ #define KCSAN_ACCESS_WRITE (1 << 0) /* Access is a write. */ #define KCSAN_ACCESS_COMPOUND (1 << 1) /* Compounded read-write instrumentation. */ #define KCSAN_ACCESS_ATOMIC (1 << 2) /* Access is atomic. */ /* The following are special, and never due to compiler instrumentation. */ #define KCSAN_ACCESS_ASSERT (1 << 3) /* Access is an assertion. */ #define KCSAN_ACCESS_SCOPED (1 << 4) /* Access is a scoped access. */ /* * __kcsan_*: Always calls into the runtime when KCSAN is enabled. This may be used * even in compilation units that selectively disable KCSAN, but must use KCSAN * to validate access to an address. Never use these in header files! */ #ifdef CONFIG_KCSAN /** * __kcsan_check_access - check generic access for races * * @ptr: address of access * @size: size of access * @type: access type modifier */ void __kcsan_check_access(const volatile void *ptr, size_t size, int type); /** * kcsan_disable_current - disable KCSAN for the current context * * Supports nesting. */ void kcsan_disable_current(void); /** * kcsan_enable_current - re-enable KCSAN for the current context * * Supports nesting. */ void kcsan_enable_current(void); void kcsan_enable_current_nowarn(void); /* Safe in uaccess regions. */ /** * kcsan_nestable_atomic_begin - begin nestable atomic region * * Accesses within the atomic region may appear to race with other accesses but * should be considered atomic. */ void kcsan_nestable_atomic_begin(void); /** * kcsan_nestable_atomic_end - end nestable atomic region */ void kcsan_nestable_atomic_end(void); /** * kcsan_flat_atomic_begin - begin flat atomic region * * Accesses within the atomic region may appear to race with other accesses but * should be considered atomic. */ void kcsan_flat_atomic_begin(void); /** * kcsan_flat_atomic_end - end flat atomic region */ void kcsan_flat_atomic_end(void); /** * kcsan_atomic_next - consider following accesses as atomic * * Force treating the next n memory accesses for the current context as atomic * operations. * * @n: number of following memory accesses to treat as atomic. */ void kcsan_atomic_next(int n); /** * kcsan_set_access_mask - set access mask * * Set the access mask for all accesses for the current context if non-zero. * Only value changes to bits set in the mask will be reported. * * @mask: bitmask */ void kcsan_set_access_mask(unsigned long mask); /* Scoped access information. */ struct kcsan_scoped_access { struct list_head list; const volatile void *ptr; size_t size; int type; }; /* * Automatically call kcsan_end_scoped_access() when kcsan_scoped_access goes * out of scope; relies on attribute "cleanup", which is supported by all * compilers that support KCSAN. */ #define __kcsan_cleanup_scoped \ __maybe_unused __attribute__((__cleanup__(kcsan_end_scoped_access))) /** * kcsan_begin_scoped_access - begin scoped access * * Begin scoped access and initialize @sa, which will cause KCSAN to * continuously check the memory range in the current thread until * kcsan_end_scoped_access() is called for @sa. * * Scoped accesses are implemented by appending @sa to an internal list for the * current execution context, and then checked on every call into the KCSAN * runtime. * * @ptr: address of access * @size: size of access * @type: access type modifier * @sa: struct kcsan_scoped_access to use for the scope of the access */ struct kcsan_scoped_access * kcsan_begin_scoped_access(const volatile void *ptr, size_t size, int type, struct kcsan_scoped_access *sa); /** * kcsan_end_scoped_access - end scoped access * * End a scoped access, which will stop KCSAN checking the memory range. * Requires that kcsan_begin_scoped_access() was previously called once for @sa. * * @sa: a previously initialized struct kcsan_scoped_access */ void kcsan_end_scoped_access(struct kcsan_scoped_access *sa); #else /* CONFIG_KCSAN */ static inline void __kcsan_check_access(const volatile void *ptr, size_t size, int type) { } static inline void kcsan_disable_current(void) { } static inline void kcsan_enable_current(void) { } static inline void kcsan_enable_current_nowarn(void) { } static inline void kcsan_nestable_atomic_begin(void) { } static inline void kcsan_nestable_atomic_end(void) { } static inline void kcsan_flat_atomic_begin(void) { } static inline void kcsan_flat_atomic_end(void) { } static inline void kcsan_atomic_next(int n) { } static inline void kcsan_set_access_mask(unsigned long mask) { } struct kcsan_scoped_access { }; #define __kcsan_cleanup_scoped __maybe_unused static inline struct kcsan_scoped_access * kcsan_begin_scoped_access(const volatile void *ptr, size_t size, int type, struct kcsan_scoped_access *sa) { return sa; } static inline void kcsan_end_scoped_access(struct kcsan_scoped_access *sa) { } #endif /* CONFIG_KCSAN */ #ifdef __SANITIZE_THREAD__ /* * Only calls into the runtime when the particular compilation unit has KCSAN * instrumentation enabled. May be used in header files. */ #define kcsan_check_access __kcsan_check_access /* * Only use these to disable KCSAN for accesses in the current compilation unit; * calls into libraries may still perform KCSAN checks. */ #define __kcsan_disable_current kcsan_disable_current #define __kcsan_enable_current kcsan_enable_current_nowarn #else static inline void kcsan_check_access(const volatile void *ptr, size_t size, int type) { } static inline void __kcsan_enable_current(void) { } static inline void __kcsan_disable_current(void) { } #endif /** * __kcsan_check_read - check regular read access for races * * @ptr: address of access * @size: size of access */ #define __kcsan_check_read(ptr, size) __kcsan_check_access(ptr, size, 0) /** * __kcsan_check_write - check regular write access for races * * @ptr: address of access * @size: size of access */ #define __kcsan_check_write(ptr, size) \ __kcsan_check_access(ptr, size, KCSAN_ACCESS_WRITE) /** * __kcsan_check_read_write - check regular read-write access for races * * @ptr: address of access * @size: size of access */ #define __kcsan_check_read_write(ptr, size) \ __kcsan_check_access(ptr, size, KCSAN_ACCESS_COMPOUND | KCSAN_ACCESS_WRITE) /** * kcsan_check_read - check regular read access for races * * @ptr: address of access * @size: size of access */ #define kcsan_check_read(ptr, size) kcsan_check_access(ptr, size, 0) /** * kcsan_check_write - check regular write access for races * * @ptr: address of access * @size: size of access */ #define kcsan_check_write(ptr, size) \ kcsan_check_access(ptr, size, KCSAN_ACCESS_WRITE) /** * kcsan_check_read_write - check regular read-write access for races * * @ptr: address of access * @size: size of access */ #define kcsan_check_read_write(ptr, size) \ kcsan_check_access(ptr, size, KCSAN_ACCESS_COMPOUND | KCSAN_ACCESS_WRITE) /* * Check for atomic accesses: if atomic accesses are not ignored, this simply * aliases to kcsan_check_access(), otherwise becomes a no-op. */ #ifdef CONFIG_KCSAN_IGNORE_ATOMICS #define kcsan_check_atomic_read(...) do { } while (0) #define kcsan_check_atomic_write(...) do { } while (0) #define kcsan_check_atomic_read_write(...) do { } while (0) #else #define kcsan_check_atomic_read(ptr, size) \ kcsan_check_access(ptr, size, KCSAN_ACCESS_ATOMIC) #define kcsan_check_atomic_write(ptr, size) \ kcsan_check_access(ptr, size, KCSAN_ACCESS_ATOMIC | KCSAN_ACCESS_WRITE) #define kcsan_check_atomic_read_write(ptr, size) \ kcsan_check_access(ptr, size, KCSAN_ACCESS_ATOMIC | KCSAN_ACCESS_WRITE | KCSAN_ACCESS_COMPOUND) #endif /** * ASSERT_EXCLUSIVE_WRITER - assert no concurrent writes to @var * * Assert that there are no concurrent writes to @var; other readers are * allowed. This assertion can be used to specify properties of concurrent code, * where violation cannot be detected as a normal data race. * * For example, if we only have a single writer, but multiple concurrent * readers, to avoid data races, all these accesses must be marked; even * concurrent marked writes racing with the single writer are bugs. * Unfortunately, due to being marked, they are no longer data races. For cases * like these, we can use the macro as follows: * * .. code-block:: c * * void writer(void) { * spin_lock(&update_foo_lock); * ASSERT_EXCLUSIVE_WRITER(shared_foo); * WRITE_ONCE(shared_foo, ...); * spin_unlock(&update_foo_lock); * } * void reader(void) { * // update_foo_lock does not need to be held! * ... = READ_ONCE(shared_foo); * } * * Note: ASSERT_EXCLUSIVE_WRITER_SCOPED(), if applicable, performs more thorough * checking if a clear scope where no concurrent writes are expected exists. * * @var: variable to assert on */ #define ASSERT_EXCLUSIVE_WRITER(var) \ __kcsan_check_access(&(var), sizeof(var), KCSAN_ACCESS_ASSERT) /* * Helper macros for implementation of for ASSERT_EXCLUSIVE_*_SCOPED(). @id is * expected to be unique for the scope in which instances of kcsan_scoped_access * are declared. */ #define __kcsan_scoped_name(c, suffix) __kcsan_scoped_##c##suffix #define __ASSERT_EXCLUSIVE_SCOPED(var, type, id) \ struct kcsan_scoped_access __kcsan_scoped_name(id, _) \ __kcsan_cleanup_scoped; \ struct kcsan_scoped_access *__kcsan_scoped_name(id, _dummy_p) \ __maybe_unused = kcsan_begin_scoped_access( \ &(var), sizeof(var), KCSAN_ACCESS_SCOPED | (type), \ &__kcsan_scoped_name(id, _)) /** * ASSERT_EXCLUSIVE_WRITER_SCOPED - assert no concurrent writes to @var in scope * * Scoped variant of ASSERT_EXCLUSIVE_WRITER(). * * Assert that there are no concurrent writes to @var for the duration of the * scope in which it is introduced. This provides a better way to fully cover * the enclosing scope, compared to multiple ASSERT_EXCLUSIVE_WRITER(), and * increases the likelihood for KCSAN to detect racing accesses. * * For example, it allows finding race-condition bugs that only occur due to * state changes within the scope itself: * * .. code-block:: c * * void writer(void) { * spin_lock(&update_foo_lock); * { * ASSERT_EXCLUSIVE_WRITER_SCOPED(shared_foo); * WRITE_ONCE(shared_foo, 42); * ... * // shared_foo should still be 42 here! * } * spin_unlock(&update_foo_lock); * } * void buggy(void) { * if (READ_ONCE(shared_foo) == 42) * WRITE_ONCE(shared_foo, 1); // bug! * } * * @var: variable to assert on */ #define ASSERT_EXCLUSIVE_WRITER_SCOPED(var) \ __ASSERT_EXCLUSIVE_SCOPED(var, KCSAN_ACCESS_ASSERT, __COUNTER__) /** * ASSERT_EXCLUSIVE_ACCESS - assert no concurrent accesses to @var * * Assert that there are no concurrent accesses to @var (no readers nor * writers). This assertion can be used to specify properties of concurrent * code, where violation cannot be detected as a normal data race. * * For example, where exclusive access is expected after determining no other * users of an object are left, but the object is not actually freed. We can * check that this property actually holds as follows: * * .. code-block:: c * * if (refcount_dec_and_test(&obj->refcnt)) { * ASSERT_EXCLUSIVE_ACCESS(*obj); * do_some_cleanup(obj); * release_for_reuse(obj); * } * * Note: * * 1. ASSERT_EXCLUSIVE_ACCESS_SCOPED(), if applicable, performs more thorough * checking if a clear scope where no concurrent accesses are expected exists. * * 2. For cases where the object is freed, `KASAN <kasan.html>`_ is a better * fit to detect use-after-free bugs. * * @var: variable to assert on */ #define ASSERT_EXCLUSIVE_ACCESS(var) \ __kcsan_check_access(&(var), sizeof(var), KCSAN_ACCESS_WRITE | KCSAN_ACCESS_ASSERT) /** * ASSERT_EXCLUSIVE_ACCESS_SCOPED - assert no concurrent accesses to @var in scope * * Scoped variant of ASSERT_EXCLUSIVE_ACCESS(). * * Assert that there are no concurrent accesses to @var (no readers nor writers) * for the entire duration of the scope in which it is introduced. This provides * a better way to fully cover the enclosing scope, compared to multiple * ASSERT_EXCLUSIVE_ACCESS(), and increases the likelihood for KCSAN to detect * racing accesses. * * @var: variable to assert on */ #define ASSERT_EXCLUSIVE_ACCESS_SCOPED(var) \ __ASSERT_EXCLUSIVE_SCOPED(var, KCSAN_ACCESS_WRITE | KCSAN_ACCESS_ASSERT, __COUNTER__) /** * ASSERT_EXCLUSIVE_BITS - assert no concurrent writes to subset of bits in @var * * Bit-granular variant of ASSERT_EXCLUSIVE_WRITER(). * * Assert that there are no concurrent writes to a subset of bits in @var; * concurrent readers are permitted. This assertion captures more detailed * bit-level properties, compared to the other (word granularity) assertions. * Only the bits set in @mask are checked for concurrent modifications, while * ignoring the remaining bits, i.e. concurrent writes (or reads) to ~mask bits * are ignored. * * Use this for variables, where some bits must not be modified concurrently, * yet other bits are expected to be modified concurrently. * * For example, variables where, after initialization, some bits are read-only, * but other bits may still be modified concurrently. A reader may wish to * assert that this is true as follows: * * .. code-block:: c * * ASSERT_EXCLUSIVE_BITS(flags, READ_ONLY_MASK); * foo = (READ_ONCE(flags) & READ_ONLY_MASK) >> READ_ONLY_SHIFT; * * Note: The access that immediately follows ASSERT_EXCLUSIVE_BITS() is assumed * to access the masked bits only, and KCSAN optimistically assumes it is * therefore safe, even in the presence of data races, and marking it with * READ_ONCE() is optional from KCSAN's point-of-view. We caution, however, that * it may still be advisable to do so, since we cannot reason about all compiler * optimizations when it comes to bit manipulations (on the reader and writer * side). If you are sure nothing can go wrong, we can write the above simply * as: * * .. code-block:: c * * ASSERT_EXCLUSIVE_BITS(flags, READ_ONLY_MASK); * foo = (flags & READ_ONLY_MASK) >> READ_ONLY_SHIFT; * * Another example, where this may be used, is when certain bits of @var may * only be modified when holding the appropriate lock, but other bits may still * be modified concurrently. Writers, where other bits may change concurrently, * could use the assertion as follows: * * .. code-block:: c * * spin_lock(&foo_lock); * ASSERT_EXCLUSIVE_BITS(flags, FOO_MASK); * old_flags = flags; * new_flags = (old_flags & ~FOO_MASK) | (new_foo << FOO_SHIFT); * if (cmpxchg(&flags, old_flags, new_flags) != old_flags) { ... } * spin_unlock(&foo_lock); * * @var: variable to assert on * @mask: only check for modifications to bits set in @mask */ #define ASSERT_EXCLUSIVE_BITS(var, mask) \ do { \ kcsan_set_access_mask(mask); \ __kcsan_check_access(&(var), sizeof(var), KCSAN_ACCESS_ASSERT);\ kcsan_set_access_mask(0); \ kcsan_atomic_next(1); \ } while (0) #endif /* _LINUX_KCSAN_CHECKS_H */ PK ! ]=�/� � stop_machine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_STOP_MACHINE #define _LINUX_STOP_MACHINE #include <linux/cpu.h> #include <linux/cpumask.h> #include <linux/smp.h> #include <linux/list.h> /* * stop_cpu[s]() is simplistic per-cpu maximum priority cpu * monopolization mechanism. The caller can specify a non-sleeping * function to be executed on a single or multiple cpus preempting all * other processes and monopolizing those cpus until it finishes. * * Resources for this mechanism are preallocated when a cpu is brought * up and requests are guaranteed to be served as long as the target * cpus are online. */ typedef int (*cpu_stop_fn_t)(void *arg); #ifdef CONFIG_SMP struct cpu_stop_work { struct list_head list; /* cpu_stopper->works */ cpu_stop_fn_t fn; unsigned long caller; void *arg; struct cpu_stop_done *done; }; int stop_one_cpu(unsigned int cpu, cpu_stop_fn_t fn, void *arg); int stop_two_cpus(unsigned int cpu1, unsigned int cpu2, cpu_stop_fn_t fn, void *arg); bool stop_one_cpu_nowait(unsigned int cpu, cpu_stop_fn_t fn, void *arg, struct cpu_stop_work *work_buf); void stop_machine_park(int cpu); void stop_machine_unpark(int cpu); void stop_machine_yield(const struct cpumask *cpumask); extern void print_stop_info(const char *log_lvl, struct task_struct *task); #else /* CONFIG_SMP */ #include <linux/workqueue.h> struct cpu_stop_work { struct work_struct work; cpu_stop_fn_t fn; void *arg; }; static inline int stop_one_cpu(unsigned int cpu, cpu_stop_fn_t fn, void *arg) { int ret = -ENOENT; preempt_disable(); if (cpu == smp_processor_id()) ret = fn(arg); preempt_enable(); return ret; } static void stop_one_cpu_nowait_workfn(struct work_struct *work) { struct cpu_stop_work *stwork = container_of(work, struct cpu_stop_work, work); preempt_disable(); stwork->fn(stwork->arg); preempt_enable(); } static inline bool stop_one_cpu_nowait(unsigned int cpu, cpu_stop_fn_t fn, void *arg, struct cpu_stop_work *work_buf) { if (cpu == smp_processor_id()) { INIT_WORK(&work_buf->work, stop_one_cpu_nowait_workfn); work_buf->fn = fn; work_buf->arg = arg; schedule_work(&work_buf->work); return true; } return false; } static inline void print_stop_info(const char *log_lvl, struct task_struct *task) { } #endif /* CONFIG_SMP */ /* * stop_machine "Bogolock": stop the entire machine, disable * interrupts. This is a very heavy lock, which is equivalent to * grabbing every spinlock (and more). So the "read" side to such a * lock is anything which disables preemption. */ #if defined(CONFIG_SMP) || defined(CONFIG_HOTPLUG_CPU) /** * stop_machine: freeze the machine on all CPUs and run this function * @fn: the function to run * @data: the data ptr for the @fn() * @cpus: the cpus to run the @fn() on (NULL = any online cpu) * * Description: This causes a thread to be scheduled on every cpu, * each of which disables interrupts. The result is that no one is * holding a spinlock or inside any other preempt-disabled region when * @fn() runs. * * This can be thought of as a very heavy write lock, equivalent to * grabbing every spinlock in the kernel. * * Protects against CPU hotplug. */ int stop_machine(cpu_stop_fn_t fn, void *data, const struct cpumask *cpus); /** * stop_machine_cpuslocked: freeze the machine on all CPUs and run this function * @fn: the function to run * @data: the data ptr for the @fn() * @cpus: the cpus to run the @fn() on (NULL = any online cpu) * * Same as above. Must be called from with in a cpus_read_lock() protected * region. Avoids nested calls to cpus_read_lock(). */ int stop_machine_cpuslocked(cpu_stop_fn_t fn, void *data, const struct cpumask *cpus); int stop_machine_from_inactive_cpu(cpu_stop_fn_t fn, void *data, const struct cpumask *cpus); #else /* CONFIG_SMP || CONFIG_HOTPLUG_CPU */ static __always_inline int stop_machine_cpuslocked(cpu_stop_fn_t fn, void *data, const struct cpumask *cpus) { unsigned long flags; int ret; local_irq_save(flags); ret = fn(data); local_irq_restore(flags); return ret; } static __always_inline int stop_machine(cpu_stop_fn_t fn, void *data, const struct cpumask *cpus) { return stop_machine_cpuslocked(fn, data, cpus); } static __always_inline int stop_machine_from_inactive_cpu(cpu_stop_fn_t fn, void *data, const struct cpumask *cpus) { return stop_machine(fn, data, cpus); } #endif /* CONFIG_SMP || CONFIG_HOTPLUG_CPU */ #endif /* _LINUX_STOP_MACHINE */ PK ! \�P1�, �, wait_bit.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_WAIT_BIT_H #define _LINUX_WAIT_BIT_H /* * Linux wait-bit related types and methods: */ #include <linux/wait.h> struct wait_bit_key { void *flags; int bit_nr; unsigned long timeout; }; struct wait_bit_queue_entry { struct wait_bit_key key; struct wait_queue_entry wq_entry; }; #define __WAIT_BIT_KEY_INITIALIZER(word, bit) \ { .flags = word, .bit_nr = bit, } typedef int wait_bit_action_f(struct wait_bit_key *key, int mode); void __wake_up_bit(struct wait_queue_head *wq_head, void *word, int bit); int __wait_on_bit(struct wait_queue_head *wq_head, struct wait_bit_queue_entry *wbq_entry, wait_bit_action_f *action, unsigned int mode); int __wait_on_bit_lock(struct wait_queue_head *wq_head, struct wait_bit_queue_entry *wbq_entry, wait_bit_action_f *action, unsigned int mode); void wake_up_bit(void *word, int bit); int out_of_line_wait_on_bit(void *word, int, wait_bit_action_f *action, unsigned int mode); int out_of_line_wait_on_bit_timeout(void *word, int, wait_bit_action_f *action, unsigned int mode, unsigned long timeout); int out_of_line_wait_on_bit_lock(void *word, int, wait_bit_action_f *action, unsigned int mode); struct wait_queue_head *bit_waitqueue(void *word, int bit); extern void __init wait_bit_init(void); int wake_bit_function(struct wait_queue_entry *wq_entry, unsigned mode, int sync, void *key); #define DEFINE_WAIT_BIT(name, word, bit) \ struct wait_bit_queue_entry name = { \ .key = __WAIT_BIT_KEY_INITIALIZER(word, bit), \ .wq_entry = { \ .private = current, \ .func = wake_bit_function, \ .entry = \ LIST_HEAD_INIT((name).wq_entry.entry), \ }, \ } extern int bit_wait(struct wait_bit_key *key, int mode); extern int bit_wait_io(struct wait_bit_key *key, int mode); extern int bit_wait_timeout(struct wait_bit_key *key, int mode); extern int bit_wait_io_timeout(struct wait_bit_key *key, int mode); /** * wait_on_bit - wait for a bit to be cleared * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @mode: the task state to sleep in * * There is a standard hashed waitqueue table for generic use. This * is the part of the hashtable's accessor API that waits on a bit. * For instance, if one were to have waiters on a bitflag, one would * call wait_on_bit() in threads waiting for the bit to clear. * One uses wait_on_bit() where one is waiting for the bit to clear, * but has no intention of setting it. * Returned value will be zero if the bit was cleared, or non-zero * if the process received a signal and the mode permitted wakeup * on that signal. */ static inline int wait_on_bit(unsigned long *word, int bit, unsigned mode) { might_sleep(); if (!test_bit(bit, word)) return 0; return out_of_line_wait_on_bit(word, bit, bit_wait, mode); } /** * wait_on_bit_io - wait for a bit to be cleared * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @mode: the task state to sleep in * * Use the standard hashed waitqueue table to wait for a bit * to be cleared. This is similar to wait_on_bit(), but calls * io_schedule() instead of schedule() for the actual waiting. * * Returned value will be zero if the bit was cleared, or non-zero * if the process received a signal and the mode permitted wakeup * on that signal. */ static inline int wait_on_bit_io(unsigned long *word, int bit, unsigned mode) { might_sleep(); if (!test_bit(bit, word)) return 0; return out_of_line_wait_on_bit(word, bit, bit_wait_io, mode); } /** * wait_on_bit_timeout - wait for a bit to be cleared or a timeout elapses * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @mode: the task state to sleep in * @timeout: timeout, in jiffies * * Use the standard hashed waitqueue table to wait for a bit * to be cleared. This is similar to wait_on_bit(), except also takes a * timeout parameter. * * Returned value will be zero if the bit was cleared before the * @timeout elapsed, or non-zero if the @timeout elapsed or process * received a signal and the mode permitted wakeup on that signal. */ static inline int wait_on_bit_timeout(unsigned long *word, int bit, unsigned mode, unsigned long timeout) { might_sleep(); if (!test_bit(bit, word)) return 0; return out_of_line_wait_on_bit_timeout(word, bit, bit_wait_timeout, mode, timeout); } /** * wait_on_bit_action - wait for a bit to be cleared * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @action: the function used to sleep, which may take special actions * @mode: the task state to sleep in * * Use the standard hashed waitqueue table to wait for a bit * to be cleared, and allow the waiting action to be specified. * This is like wait_on_bit() but allows fine control of how the waiting * is done. * * Returned value will be zero if the bit was cleared, or non-zero * if the process received a signal and the mode permitted wakeup * on that signal. */ static inline int wait_on_bit_action(unsigned long *word, int bit, wait_bit_action_f *action, unsigned mode) { might_sleep(); if (!test_bit(bit, word)) return 0; return out_of_line_wait_on_bit(word, bit, action, mode); } /** * wait_on_bit_lock - wait for a bit to be cleared, when wanting to set it * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @mode: the task state to sleep in * * There is a standard hashed waitqueue table for generic use. This * is the part of the hashtable's accessor API that waits on a bit * when one intends to set it, for instance, trying to lock bitflags. * For instance, if one were to have waiters trying to set bitflag * and waiting for it to clear before setting it, one would call * wait_on_bit() in threads waiting to be able to set the bit. * One uses wait_on_bit_lock() where one is waiting for the bit to * clear with the intention of setting it, and when done, clearing it. * * Returns zero if the bit was (eventually) found to be clear and was * set. Returns non-zero if a signal was delivered to the process and * the @mode allows that signal to wake the process. */ static inline int wait_on_bit_lock(unsigned long *word, int bit, unsigned mode) { might_sleep(); if (!test_and_set_bit(bit, word)) return 0; return out_of_line_wait_on_bit_lock(word, bit, bit_wait, mode); } /** * wait_on_bit_lock_io - wait for a bit to be cleared, when wanting to set it * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @mode: the task state to sleep in * * Use the standard hashed waitqueue table to wait for a bit * to be cleared and then to atomically set it. This is similar * to wait_on_bit(), but calls io_schedule() instead of schedule() * for the actual waiting. * * Returns zero if the bit was (eventually) found to be clear and was * set. Returns non-zero if a signal was delivered to the process and * the @mode allows that signal to wake the process. */ static inline int wait_on_bit_lock_io(unsigned long *word, int bit, unsigned mode) { might_sleep(); if (!test_and_set_bit(bit, word)) return 0; return out_of_line_wait_on_bit_lock(word, bit, bit_wait_io, mode); } /** * wait_on_bit_lock_action - wait for a bit to be cleared, when wanting to set it * @word: the word being waited on, a kernel virtual address * @bit: the bit of the word being waited on * @action: the function used to sleep, which may take special actions * @mode: the task state to sleep in * * Use the standard hashed waitqueue table to wait for a bit * to be cleared and then to set it, and allow the waiting action * to be specified. * This is like wait_on_bit() but allows fine control of how the waiting * is done. * * Returns zero if the bit was (eventually) found to be clear and was * set. Returns non-zero if a signal was delivered to the process and * the @mode allows that signal to wake the process. */ static inline int wait_on_bit_lock_action(unsigned long *word, int bit, wait_bit_action_f *action, unsigned mode) { might_sleep(); if (!test_and_set_bit(bit, word)) return 0; return out_of_line_wait_on_bit_lock(word, bit, action, mode); } extern void init_wait_var_entry(struct wait_bit_queue_entry *wbq_entry, void *var, int flags); extern void wake_up_var(void *var); extern wait_queue_head_t *__var_waitqueue(void *p); #define ___wait_var_event(var, condition, state, exclusive, ret, cmd) \ ({ \ __label__ __out; \ struct wait_queue_head *__wq_head = __var_waitqueue(var); \ struct wait_bit_queue_entry __wbq_entry; \ long __ret = ret; /* explicit shadow */ \ \ init_wait_var_entry(&__wbq_entry, var, \ exclusive ? WQ_FLAG_EXCLUSIVE : 0); \ for (;;) { \ long __int = prepare_to_wait_event(__wq_head, \ &__wbq_entry.wq_entry, \ state); \ if (condition) \ break; \ \ if (___wait_is_interruptible(state) && __int) { \ __ret = __int; \ goto __out; \ } \ \ cmd; \ } \ finish_wait(__wq_head, &__wbq_entry.wq_entry); \ __out: __ret; \ }) #define __wait_var_event(var, condition) \ ___wait_var_event(var, condition, TASK_UNINTERRUPTIBLE, 0, 0, \ schedule()) #define wait_var_event(var, condition) \ do { \ might_sleep(); \ if (condition) \ break; \ __wait_var_event(var, condition); \ } while (0) #define __wait_var_event_killable(var, condition) \ ___wait_var_event(var, condition, TASK_KILLABLE, 0, 0, \ schedule()) #define wait_var_event_killable(var, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_var_event_killable(var, condition); \ __ret; \ }) #define __wait_var_event_timeout(var, condition, timeout) \ ___wait_var_event(var, ___wait_cond_timeout(condition), \ TASK_UNINTERRUPTIBLE, 0, timeout, \ __ret = schedule_timeout(__ret)) #define wait_var_event_timeout(var, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_var_event_timeout(var, condition, timeout); \ __ret; \ }) #define __wait_var_event_interruptible(var, condition) \ ___wait_var_event(var, condition, TASK_INTERRUPTIBLE, 0, 0, \ schedule()) #define wait_var_event_interruptible(var, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_var_event_interruptible(var, condition); \ __ret; \ }) /** * clear_and_wake_up_bit - clear a bit and wake up anyone waiting on that bit * * @bit: the bit of the word being waited on * @word: the word being waited on, a kernel virtual address * * You can use this helper if bitflags are manipulated atomically rather than * non-atomically under a lock. */ static inline void clear_and_wake_up_bit(int bit, void *word) { clear_bit_unlock(bit, word); /* See wake_up_bit() for which memory barrier you need to use. */ smp_mb__after_atomic(); wake_up_bit(word, bit); } #endif /* _LINUX_WAIT_BIT_H */ PK ! ���� crc16.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * crc16.h - CRC-16 routine * * Implements the standard CRC-16: * Width 16 * Poly 0x8005 (x^16 + x^15 + x^2 + 1) * Init 0 * * Copyright (c) 2005 Ben Gardner <bgardner@wabtec.com> */ #ifndef __CRC16_H #define __CRC16_H #include <linux/types.h> extern u16 const crc16_table[256]; extern u16 crc16(u16 crc, const u8 *buffer, size_t len); static inline u16 crc16_byte(u16 crc, const u8 data) { return (crc >> 8) ^ crc16_table[(crc ^ data) & 0xff]; } #endif /* __CRC16_H */ PK ! ~�* * clkdev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/clkdev.h * * Copyright (C) 2008 Russell King. * * Helper for the clk API to assist looking up a struct clk. */ #ifndef __CLKDEV_H #define __CLKDEV_H #include <linux/slab.h> struct clk; struct clk_hw; struct device; struct clk_lookup { struct list_head node; const char *dev_id; const char *con_id; struct clk *clk; struct clk_hw *clk_hw; }; #define CLKDEV_INIT(d, n, c) \ { \ .dev_id = d, \ .con_id = n, \ .clk = c, \ } void clkdev_add(struct clk_lookup *cl); void clkdev_drop(struct clk_lookup *cl); struct clk_lookup *clkdev_create(struct clk *clk, const char *con_id, const char *dev_fmt, ...) __printf(3, 4); struct clk_lookup *clkdev_hw_create(struct clk_hw *hw, const char *con_id, const char *dev_fmt, ...) __printf(3, 4); void clkdev_add_table(struct clk_lookup *, size_t); int clk_add_alias(const char *, const char *, const char *, struct device *); int clk_register_clkdev(struct clk *, const char *, const char *); int clk_hw_register_clkdev(struct clk_hw *, const char *, const char *); int devm_clk_hw_register_clkdev(struct device *dev, struct clk_hw *hw, const char *con_id, const char *dev_id); void devm_clk_release_clkdev(struct device *dev, const char *con_id, const char *dev_id); #endif PK ! QP�9 page_reporting.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PAGE_REPORTING_H #define _LINUX_PAGE_REPORTING_H #include <linux/mmzone.h> #include <linux/scatterlist.h> /* This value should always be a power of 2, see page_reporting_cycle() */ #define PAGE_REPORTING_CAPACITY 32 struct page_reporting_dev_info { /* function that alters pages to make them "reported" */ int (*report)(struct page_reporting_dev_info *prdev, struct scatterlist *sg, unsigned int nents); /* work struct for processing reports */ struct delayed_work work; /* Current state of page reporting */ atomic_t state; /* Minimal order of page reporting */ unsigned int order; }; /* Tear-down and bring-up for page reporting devices */ void page_reporting_unregister(struct page_reporting_dev_info *prdev); int page_reporting_register(struct page_reporting_dev_info *prdev); #endif /*_LINUX_PAGE_REPORTING_H */ PK ! ���TB B shmem_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SHMEM_FS_H #define __SHMEM_FS_H #include <linux/file.h> #include <linux/swap.h> #include <linux/mempolicy.h> #include <linux/pagemap.h> #include <linux/percpu_counter.h> #include <linux/xattr.h> #include <linux/fs_parser.h> /* inode in-kernel data */ struct shmem_inode_info { spinlock_t lock; unsigned int seals; /* shmem seals */ unsigned long flags; unsigned long alloced; /* data pages alloced to file */ unsigned long swapped; /* subtotal assigned to swap */ pgoff_t fallocend; /* highest fallocate endindex */ struct list_head shrinklist; /* shrinkable hpage inodes */ struct list_head swaplist; /* chain of maybes on swap */ struct shared_policy policy; /* NUMA memory alloc policy */ struct simple_xattrs xattrs; /* list of xattrs */ atomic_t stop_eviction; /* hold when working on inode */ struct inode vfs_inode; }; struct shmem_sb_info { unsigned long max_blocks; /* How many blocks are allowed */ struct percpu_counter used_blocks; /* How many are allocated */ unsigned long max_inodes; /* How many inodes are allowed */ unsigned long free_inodes; /* How many are left for allocation */ raw_spinlock_t stat_lock; /* Serialize shmem_sb_info changes */ umode_t mode; /* Mount mode for root directory */ unsigned char huge; /* Whether to try for hugepages */ kuid_t uid; /* Mount uid for root directory */ kgid_t gid; /* Mount gid for root directory */ bool full_inums; /* If i_ino should be uint or ino_t */ ino_t next_ino; /* The next per-sb inode number to use */ ino_t __percpu *ino_batch; /* The next per-cpu inode number to use */ struct mempolicy *mpol; /* default memory policy for mappings */ spinlock_t shrinklist_lock; /* Protects shrinklist */ struct list_head shrinklist; /* List of shinkable inodes */ unsigned long shrinklist_len; /* Length of shrinklist */ }; static inline struct shmem_inode_info *SHMEM_I(struct inode *inode) { return container_of(inode, struct shmem_inode_info, vfs_inode); } /* * Functions in mm/shmem.c called directly from elsewhere: */ extern const struct fs_parameter_spec shmem_fs_parameters[]; extern int shmem_init(void); extern int shmem_init_fs_context(struct fs_context *fc); extern struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags); extern struct file *shmem_kernel_file_setup(const char *name, loff_t size, unsigned long flags); extern struct file *shmem_file_setup_with_mnt(struct vfsmount *mnt, const char *name, loff_t size, unsigned long flags); extern int shmem_zero_setup(struct vm_area_struct *); extern unsigned long shmem_get_unmapped_area(struct file *, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags); extern int shmem_lock(struct file *file, int lock, struct ucounts *ucounts); #ifdef CONFIG_SHMEM extern const struct address_space_operations shmem_aops; static inline bool shmem_mapping(struct address_space *mapping) { return mapping->a_ops == &shmem_aops; } #else static inline bool shmem_mapping(struct address_space *mapping) { return false; } #endif /* CONFIG_SHMEM */ extern void shmem_unlock_mapping(struct address_space *mapping); extern struct page *shmem_read_mapping_page_gfp(struct address_space *mapping, pgoff_t index, gfp_t gfp_mask); extern void shmem_truncate_range(struct inode *inode, loff_t start, loff_t end); extern int shmem_unuse(unsigned int type, bool frontswap, unsigned long *fs_pages_to_unuse); extern bool shmem_is_huge(struct vm_area_struct *vma, struct inode *inode, pgoff_t index); static inline bool shmem_huge_enabled(struct vm_area_struct *vma) { return shmem_is_huge(vma, file_inode(vma->vm_file), vma->vm_pgoff); } extern unsigned long shmem_swap_usage(struct vm_area_struct *vma); extern unsigned long shmem_partial_swap_usage(struct address_space *mapping, pgoff_t start, pgoff_t end); /* Flag allocation requirements to shmem_getpage */ enum sgp_type { SGP_READ, /* don't exceed i_size, don't allocate page */ SGP_NOALLOC, /* similar, but fail on hole or use fallocated page */ SGP_CACHE, /* don't exceed i_size, may allocate page */ SGP_WRITE, /* may exceed i_size, may allocate !Uptodate page */ SGP_FALLOC, /* like SGP_WRITE, but make existing page Uptodate */ }; extern int shmem_getpage(struct inode *inode, pgoff_t index, struct page **pagep, enum sgp_type sgp); static inline struct page *shmem_read_mapping_page( struct address_space *mapping, pgoff_t index) { return shmem_read_mapping_page_gfp(mapping, index, mapping_gfp_mask(mapping)); } static inline bool shmem_file(struct file *file) { if (!IS_ENABLED(CONFIG_SHMEM)) return false; if (!file || !file->f_mapping) return false; return shmem_mapping(file->f_mapping); } /* * If fallocate(FALLOC_FL_KEEP_SIZE) has been used, there may be pages * beyond i_size's notion of EOF, which fallocate has committed to reserving: * which split_huge_page() must therefore not delete. This use of a single * "fallocend" per inode errs on the side of not deleting a reservation when * in doubt: there are plenty of cases when it preserves unreserved pages. */ static inline pgoff_t shmem_fallocend(struct inode *inode, pgoff_t eof) { return max(eof, SHMEM_I(inode)->fallocend); } extern bool shmem_charge(struct inode *inode, long pages); extern void shmem_uncharge(struct inode *inode, long pages); #ifdef CONFIG_USERFAULTFD #ifdef CONFIG_SHMEM extern int shmem_mfill_atomic_pte(struct mm_struct *dst_mm, pmd_t *dst_pmd, struct vm_area_struct *dst_vma, unsigned long dst_addr, unsigned long src_addr, bool zeropage, struct page **pagep); #else /* !CONFIG_SHMEM */ #define shmem_mfill_atomic_pte(dst_mm, dst_pmd, dst_vma, dst_addr, \ src_addr, zeropage, pagep) ({ BUG(); 0; }) #endif /* CONFIG_SHMEM */ #endif /* CONFIG_USERFAULTFD */ #endif PK ! ���Í � altera_uart.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * altera_uart.h -- Altera UART driver defines. */ #ifndef __ALTUART_H #define __ALTUART_H struct altera_uart_platform_uart { unsigned long mapbase; /* Physical address base */ unsigned int irq; /* Interrupt vector */ unsigned int uartclk; /* UART clock rate */ unsigned int bus_shift; /* Bus shift (address stride) */ }; #endif /* __ALTUART_H */ PK ! b��*6u 6u fsnotify_backend.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Filesystem access notification for Linux * * Copyright (C) 2008 Red Hat, Inc., Eric Paris <eparis@redhat.com> */ #ifndef __LINUX_FSNOTIFY_BACKEND_H #define __LINUX_FSNOTIFY_BACKEND_H #ifdef __KERNEL__ #include <linux/idr.h> /* inotify uses this */ #include <linux/fs.h> /* struct inode */ #include <linux/list.h> #include <linux/path.h> /* struct path */ #include <linux/spinlock.h> #include <linux/types.h> #include <linux/atomic.h> #include <linux/user_namespace.h> #include <linux/refcount.h> #include <linux/mempool.h> #include <linux/sched/mm.h> /* * IN_* from inotfy.h lines up EXACTLY with FS_*, this is so we can easily * convert between them. dnotify only needs conversion at watch creation * so no perf loss there. fanotify isn't defined yet, so it can use the * wholes if it needs more events. */ #define FS_ACCESS 0x00000001 /* File was accessed */ #define FS_MODIFY 0x00000002 /* File was modified */ #define FS_ATTRIB 0x00000004 /* Metadata changed */ #define FS_CLOSE_WRITE 0x00000008 /* Writtable file was closed */ #define FS_CLOSE_NOWRITE 0x00000010 /* Unwrittable file closed */ #define FS_OPEN 0x00000020 /* File was opened */ #define FS_MOVED_FROM 0x00000040 /* File was moved from X */ #define FS_MOVED_TO 0x00000080 /* File was moved to Y */ #define FS_CREATE 0x00000100 /* Subfile was created */ #define FS_DELETE 0x00000200 /* Subfile was deleted */ #define FS_DELETE_SELF 0x00000400 /* Self was deleted */ #define FS_MOVE_SELF 0x00000800 /* Self was moved */ #define FS_OPEN_EXEC 0x00001000 /* File was opened for exec */ #define FS_UNMOUNT 0x00002000 /* inode on umount fs */ #define FS_Q_OVERFLOW 0x00004000 /* Event queued overflowed */ #define FS_ERROR 0x00008000 /* Filesystem Error (fanotify) */ /* * FS_IN_IGNORED overloads FS_ERROR. It is only used internally by inotify * which does not support FS_ERROR. */ #define FS_IN_IGNORED 0x00008000 /* last inotify event here */ #define FS_OPEN_PERM 0x00010000 /* open event in an permission hook */ #define FS_ACCESS_PERM 0x00020000 /* access event in a permissions hook */ #define FS_OPEN_EXEC_PERM 0x00040000 /* open/exec event in a permission hook */ /* * Set on inode mark that cares about things that happen to its children. * Always set for dnotify and inotify. * Set on inode/sb/mount marks that care about parent/name info. */ #define FS_EVENT_ON_CHILD 0x08000000 #define FS_RENAME 0x10000000 /* File was renamed */ #define FS_DN_MULTISHOT 0x20000000 /* dnotify multishot */ #define FS_ISDIR 0x40000000 /* event occurred against dir */ #define FS_MOVE (FS_MOVED_FROM | FS_MOVED_TO) /* * Directory entry modification events - reported only to directory * where entry is modified and not to a watching parent. * The watching parent may get an FS_ATTRIB|FS_EVENT_ON_CHILD event * when a directory entry inside a child subdir changes. */ #define ALL_FSNOTIFY_DIRENT_EVENTS (FS_CREATE | FS_DELETE | FS_MOVE | FS_RENAME) #define ALL_FSNOTIFY_PERM_EVENTS (FS_OPEN_PERM | FS_ACCESS_PERM | \ FS_OPEN_EXEC_PERM) /* * This is a list of all events that may get sent to a parent that is watching * with flag FS_EVENT_ON_CHILD based on fs event on a child of that directory. */ #define FS_EVENTS_POSS_ON_CHILD (ALL_FSNOTIFY_PERM_EVENTS | \ FS_ACCESS | FS_MODIFY | FS_ATTRIB | \ FS_CLOSE_WRITE | FS_CLOSE_NOWRITE | \ FS_OPEN | FS_OPEN_EXEC) /* * This is a list of all events that may get sent with the parent inode as the * @to_tell argument of fsnotify(). * It may include events that can be sent to an inode/sb/mount mark, but cannot * be sent to a parent watching children. */ #define FS_EVENTS_POSS_TO_PARENT (FS_EVENTS_POSS_ON_CHILD) /* Events that can be reported to backends */ #define ALL_FSNOTIFY_EVENTS (ALL_FSNOTIFY_DIRENT_EVENTS | \ FS_EVENTS_POSS_ON_CHILD | \ FS_DELETE_SELF | FS_MOVE_SELF | \ FS_UNMOUNT | FS_Q_OVERFLOW | FS_IN_IGNORED | \ FS_ERROR) /* Extra flags that may be reported with event or control handling of events */ #define ALL_FSNOTIFY_FLAGS (FS_ISDIR | FS_EVENT_ON_CHILD | FS_DN_MULTISHOT) #define ALL_FSNOTIFY_BITS (ALL_FSNOTIFY_EVENTS | ALL_FSNOTIFY_FLAGS) struct fsnotify_group; struct fsnotify_event; struct fsnotify_mark; struct fsnotify_event_private_data; struct fsnotify_fname; struct fsnotify_iter_info; struct mem_cgroup; /* * Each group much define these ops. The fsnotify infrastructure will call * these operations for each relevant group. * * handle_event - main call for a group to handle an fs event * @group: group to notify * @mask: event type and flags * @data: object that event happened on * @data_type: type of object for fanotify_data_XXX() accessors * @dir: optional directory associated with event - * if @file_name is not NULL, this is the directory that * @file_name is relative to * @file_name: optional file name associated with event * @cookie: inotify rename cookie * @iter_info: array of marks from this group that are interested in the event * * handle_inode_event - simple variant of handle_event() for groups that only * have inode marks and don't have ignore mask * @mark: mark to notify * @mask: event type and flags * @inode: inode that event happened on * @dir: optional directory associated with event - * if @file_name is not NULL, this is the directory that * @file_name is relative to. * Either @inode or @dir must be non-NULL. * @file_name: optional file name associated with event * @cookie: inotify rename cookie * * free_group_priv - called when a group refcnt hits 0 to clean up the private union * freeing_mark - called when a mark is being destroyed for some reason. The group * MUST be holding a reference on each mark and that reference must be * dropped in this function. inotify uses this function to send * userspace messages that marks have been removed. */ struct fsnotify_ops { int (*handle_event)(struct fsnotify_group *group, u32 mask, const void *data, int data_type, struct inode *dir, const struct qstr *file_name, u32 cookie, struct fsnotify_iter_info *iter_info); int (*handle_inode_event)(struct fsnotify_mark *mark, u32 mask, struct inode *inode, struct inode *dir, const struct qstr *file_name, u32 cookie); void (*free_group_priv)(struct fsnotify_group *group); void (*freeing_mark)(struct fsnotify_mark *mark, struct fsnotify_group *group); void (*free_event)(struct fsnotify_group *group, struct fsnotify_event *event); /* called on final put+free to free memory */ void (*free_mark)(struct fsnotify_mark *mark); }; /* * all of the information about the original object we want to now send to * a group. If you want to carry more info from the accessing task to the * listener this structure is where you need to be adding fields. */ struct fsnotify_event { struct list_head list; }; /* * A group is a "thing" that wants to receive notification about filesystem * events. The mask holds the subset of event types this group cares about. * refcnt on a group is up to the implementor and at any moment if it goes 0 * everything will be cleaned up. */ struct fsnotify_group { const struct fsnotify_ops *ops; /* how this group handles things */ /* * How the refcnt is used is up to each group. When the refcnt hits 0 * fsnotify will clean up all of the resources associated with this group. * As an example, the dnotify group will always have a refcnt=1 and that * will never change. Inotify, on the other hand, has a group per * inotify_init() and the refcnt will hit 0 only when that fd has been * closed. */ refcount_t refcnt; /* things with interest in this group */ /* needed to send notification to userspace */ spinlock_t notification_lock; /* protect the notification_list */ struct list_head notification_list; /* list of event_holder this group needs to send to userspace */ wait_queue_head_t notification_waitq; /* read() on the notification file blocks on this waitq */ unsigned int q_len; /* events on the queue */ unsigned int max_events; /* maximum events allowed on the list */ /* * Valid fsnotify group priorities. Events are send in order from highest * priority to lowest priority. We default to the lowest priority. */ #define FS_PRIO_0 0 /* normal notifiers, no permissions */ #define FS_PRIO_1 1 /* fanotify content based access control */ #define FS_PRIO_2 2 /* fanotify pre-content access */ unsigned int priority; bool shutdown; /* group is being shut down, don't queue more events */ #define FSNOTIFY_GROUP_USER 0x01 /* user allocated group */ #define FSNOTIFY_GROUP_DUPS 0x02 /* allow multiple marks per object */ #define FSNOTIFY_GROUP_NOFS 0x04 /* group lock is not direct reclaim safe */ int flags; unsigned int owner_flags; /* stored flags of mark_mutex owner */ /* stores all fastpath marks assoc with this group so they can be cleaned on unregister */ struct mutex mark_mutex; /* protect marks_list */ atomic_t user_waits; /* Number of tasks waiting for user * response */ struct list_head marks_list; /* all inode marks for this group */ struct fasync_struct *fsn_fa; /* async notification */ struct fsnotify_event *overflow_event; /* Event we queue when the * notification list is too * full */ struct mem_cgroup *memcg; /* memcg to charge allocations */ /* groups can define private fields here or use the void *private */ union { void *private; #ifdef CONFIG_INOTIFY_USER struct inotify_group_private_data { spinlock_t idr_lock; struct idr idr; struct ucounts *ucounts; } inotify_data; #endif #ifdef CONFIG_FANOTIFY struct fanotify_group_private_data { /* Hash table of events for merge */ struct hlist_head *merge_hash; /* allows a group to block waiting for a userspace response */ struct list_head access_list; wait_queue_head_t access_waitq; int flags; /* flags from fanotify_init() */ int f_flags; /* event_f_flags from fanotify_init() */ struct ucounts *ucounts; mempool_t error_events_pool; } fanotify_data; #endif /* CONFIG_FANOTIFY */ }; }; /* * These helpers are used to prevent deadlock when reclaiming inodes with * evictable marks of the same group that is allocating a new mark. */ static inline void fsnotify_group_lock(struct fsnotify_group *group) { mutex_lock(&group->mark_mutex); if (group->flags & FSNOTIFY_GROUP_NOFS) group->owner_flags = memalloc_nofs_save(); } static inline void fsnotify_group_unlock(struct fsnotify_group *group) { if (group->flags & FSNOTIFY_GROUP_NOFS) memalloc_nofs_restore(group->owner_flags); mutex_unlock(&group->mark_mutex); } static inline void fsnotify_group_assert_locked(struct fsnotify_group *group) { WARN_ON_ONCE(!mutex_is_locked(&group->mark_mutex)); if (group->flags & FSNOTIFY_GROUP_NOFS) WARN_ON_ONCE(!(current->flags & PF_MEMALLOC_NOFS)); } /* When calling fsnotify tell it if the data is a path or inode */ enum fsnotify_data_type { FSNOTIFY_EVENT_NONE, FSNOTIFY_EVENT_PATH, FSNOTIFY_EVENT_INODE, FSNOTIFY_EVENT_DENTRY, FSNOTIFY_EVENT_ERROR, }; struct fs_error_report { int error; struct inode *inode; struct super_block *sb; }; static inline struct inode *fsnotify_data_inode(const void *data, int data_type) { switch (data_type) { case FSNOTIFY_EVENT_INODE: return (struct inode *)data; case FSNOTIFY_EVENT_DENTRY: return d_inode(data); case FSNOTIFY_EVENT_PATH: return d_inode(((const struct path *)data)->dentry); case FSNOTIFY_EVENT_ERROR: return ((struct fs_error_report *)data)->inode; default: return NULL; } } static inline struct dentry *fsnotify_data_dentry(const void *data, int data_type) { switch (data_type) { case FSNOTIFY_EVENT_DENTRY: /* Non const is needed for dget() */ return (struct dentry *)data; case FSNOTIFY_EVENT_PATH: return ((const struct path *)data)->dentry; default: return NULL; } } static inline const struct path *fsnotify_data_path(const void *data, int data_type) { switch (data_type) { case FSNOTIFY_EVENT_PATH: return data; default: return NULL; } } static inline struct super_block *fsnotify_data_sb(const void *data, int data_type) { switch (data_type) { case FSNOTIFY_EVENT_INODE: return ((struct inode *)data)->i_sb; case FSNOTIFY_EVENT_DENTRY: return ((struct dentry *)data)->d_sb; case FSNOTIFY_EVENT_PATH: return ((const struct path *)data)->dentry->d_sb; case FSNOTIFY_EVENT_ERROR: return ((struct fs_error_report *) data)->sb; default: return NULL; } } static inline struct fs_error_report *fsnotify_data_error_report( const void *data, int data_type) { switch (data_type) { case FSNOTIFY_EVENT_ERROR: return (struct fs_error_report *) data; default: return NULL; } } /* * Index to merged marks iterator array that correlates to a type of watch. * The type of watched object can be deduced from the iterator type, but not * the other way around, because an event can match different watched objects * of the same object type. * For example, both parent and child are watching an object of type inode. */ enum fsnotify_iter_type { FSNOTIFY_ITER_TYPE_INODE, FSNOTIFY_ITER_TYPE_VFSMOUNT, FSNOTIFY_ITER_TYPE_SB, FSNOTIFY_ITER_TYPE_PARENT, FSNOTIFY_ITER_TYPE_INODE2, FSNOTIFY_ITER_TYPE_COUNT }; /* The type of object that a mark is attached to */ enum fsnotify_obj_type { FSNOTIFY_OBJ_TYPE_ANY = -1, FSNOTIFY_OBJ_TYPE_INODE, FSNOTIFY_OBJ_TYPE_VFSMOUNT, FSNOTIFY_OBJ_TYPE_SB, FSNOTIFY_OBJ_TYPE_COUNT, FSNOTIFY_OBJ_TYPE_DETACHED = FSNOTIFY_OBJ_TYPE_COUNT }; static inline bool fsnotify_valid_obj_type(unsigned int obj_type) { return (obj_type < FSNOTIFY_OBJ_TYPE_COUNT); } struct fsnotify_iter_info { struct fsnotify_mark *marks[FSNOTIFY_ITER_TYPE_COUNT]; struct fsnotify_group *current_group; unsigned int report_mask; int srcu_idx; }; static inline bool fsnotify_iter_should_report_type( struct fsnotify_iter_info *iter_info, int iter_type) { return (iter_info->report_mask & (1U << iter_type)); } static inline void fsnotify_iter_set_report_type( struct fsnotify_iter_info *iter_info, int iter_type) { iter_info->report_mask |= (1U << iter_type); } static inline struct fsnotify_mark *fsnotify_iter_mark( struct fsnotify_iter_info *iter_info, int iter_type) { if (fsnotify_iter_should_report_type(iter_info, iter_type)) return iter_info->marks[iter_type]; return NULL; } static inline int fsnotify_iter_step(struct fsnotify_iter_info *iter, int type, struct fsnotify_mark **markp) { while (type < FSNOTIFY_ITER_TYPE_COUNT) { *markp = fsnotify_iter_mark(iter, type); if (*markp) break; type++; } return type; } #define FSNOTIFY_ITER_FUNCS(name, NAME) \ static inline struct fsnotify_mark *fsnotify_iter_##name##_mark( \ struct fsnotify_iter_info *iter_info) \ { \ return fsnotify_iter_mark(iter_info, FSNOTIFY_ITER_TYPE_##NAME); \ } FSNOTIFY_ITER_FUNCS(inode, INODE) FSNOTIFY_ITER_FUNCS(parent, PARENT) FSNOTIFY_ITER_FUNCS(vfsmount, VFSMOUNT) FSNOTIFY_ITER_FUNCS(sb, SB) #define fsnotify_foreach_iter_type(type) \ for (type = 0; type < FSNOTIFY_ITER_TYPE_COUNT; type++) #define fsnotify_foreach_iter_mark_type(iter, mark, type) \ for (type = 0; \ type = fsnotify_iter_step(iter, type, &mark), \ type < FSNOTIFY_ITER_TYPE_COUNT; \ type++) /* * fsnotify_connp_t is what we embed in objects which connector can be attached * to. fsnotify_connp_t * is how we refer from connector back to object. */ struct fsnotify_mark_connector; typedef struct fsnotify_mark_connector __rcu *fsnotify_connp_t; /* * Inode/vfsmount/sb point to this structure which tracks all marks attached to * the inode/vfsmount/sb. The reference to inode/vfsmount/sb is held by this * structure. We destroy this structure when there are no more marks attached * to it. The structure is protected by fsnotify_mark_srcu. */ struct fsnotify_mark_connector { spinlock_t lock; unsigned short type; /* Type of object [lock] */ #define FSNOTIFY_CONN_FLAG_HAS_FSID 0x01 #define FSNOTIFY_CONN_FLAG_HAS_IREF 0x02 unsigned short flags; /* flags [lock] */ __kernel_fsid_t fsid; /* fsid of filesystem containing object */ union { /* Object pointer [lock] */ fsnotify_connp_t *obj; /* Used listing heads to free after srcu period expires */ struct fsnotify_mark_connector *destroy_next; }; struct hlist_head list; }; /* * A mark is simply an object attached to an in core inode which allows an * fsnotify listener to indicate they are either no longer interested in events * of a type matching mask or only interested in those events. * * These are flushed when an inode is evicted from core and may be flushed * when the inode is modified (as seen by fsnotify_access). Some fsnotify * users (such as dnotify) will flush these when the open fd is closed and not * at inode eviction or modification. * * Text in brackets is showing the lock(s) protecting modifications of a * particular entry. obj_lock means either inode->i_lock or * mnt->mnt_root->d_lock depending on the mark type. */ struct fsnotify_mark { /* Mask this mark is for [mark->lock, group->mark_mutex] */ __u32 mask; /* We hold one for presence in g_list. Also one ref for each 'thing' * in kernel that found and may be using this mark. */ refcount_t refcnt; /* Group this mark is for. Set on mark creation, stable until last ref * is dropped */ struct fsnotify_group *group; /* List of marks by group->marks_list. Also reused for queueing * mark into destroy_list when it's waiting for the end of SRCU period * before it can be freed. [group->mark_mutex] */ struct list_head g_list; /* Protects inode / mnt pointers, flags, masks */ spinlock_t lock; /* List of marks for inode / vfsmount [connector->lock, mark ref] */ struct hlist_node obj_list; /* Head of list of marks for an object [mark ref] */ struct fsnotify_mark_connector *connector; /* Events types and flags to ignore [mark->lock, group->mark_mutex] */ __u32 ignore_mask; /* General fsnotify mark flags */ #define FSNOTIFY_MARK_FLAG_ALIVE 0x0001 #define FSNOTIFY_MARK_FLAG_ATTACHED 0x0002 /* inotify mark flags */ #define FSNOTIFY_MARK_FLAG_EXCL_UNLINK 0x0010 #define FSNOTIFY_MARK_FLAG_IN_ONESHOT 0x0020 /* fanotify mark flags */ #define FSNOTIFY_MARK_FLAG_IGNORED_SURV_MODIFY 0x0100 #define FSNOTIFY_MARK_FLAG_NO_IREF 0x0200 #define FSNOTIFY_MARK_FLAG_HAS_IGNORE_FLAGS 0x0400 unsigned int flags; /* flags [mark->lock] */ }; #ifdef CONFIG_FSNOTIFY /* called from the vfs helpers */ /* main fsnotify call to send events */ extern int fsnotify(__u32 mask, const void *data, int data_type, struct inode *dir, const struct qstr *name, struct inode *inode, u32 cookie); extern int __fsnotify_parent(struct dentry *dentry, __u32 mask, const void *data, int data_type); extern void __fsnotify_inode_delete(struct inode *inode); extern void __fsnotify_vfsmount_delete(struct vfsmount *mnt); extern void fsnotify_sb_delete(struct super_block *sb); extern u32 fsnotify_get_cookie(void); static inline __u32 fsnotify_parent_needed_mask(__u32 mask) { /* FS_EVENT_ON_CHILD is set on marks that want parent/name info */ if (!(mask & FS_EVENT_ON_CHILD)) return 0; /* * This object might be watched by a mark that cares about parent/name * info, does it care about the specific set of events that can be * reported with parent/name info? */ return mask & FS_EVENTS_POSS_TO_PARENT; } static inline int fsnotify_inode_watches_children(struct inode *inode) { __u32 parent_mask = READ_ONCE(inode->i_fsnotify_mask); /* FS_EVENT_ON_CHILD is set if the inode may care */ if (!(parent_mask & FS_EVENT_ON_CHILD)) return 0; /* this inode might care about child events, does it care about the * specific set of events that can happen on a child? */ return parent_mask & FS_EVENTS_POSS_ON_CHILD; } /* * Update the dentry with a flag indicating the interest of its parent to receive * filesystem events when those events happens to this dentry->d_inode. */ static inline void fsnotify_update_flags(struct dentry *dentry) { assert_spin_locked(&dentry->d_lock); /* * Serialisation of setting PARENT_WATCHED on the dentries is provided * by d_lock. If inotify_inode_watched changes after we have taken * d_lock, the following fsnotify_set_children_dentry_flags call will * find our entry, so it will spin until we complete here, and update * us with the new state. */ if (fsnotify_inode_watches_children(dentry->d_parent->d_inode)) dentry->d_flags |= DCACHE_FSNOTIFY_PARENT_WATCHED; else dentry->d_flags &= ~DCACHE_FSNOTIFY_PARENT_WATCHED; } /* called from fsnotify listeners, such as fanotify or dnotify */ /* create a new group */ extern struct fsnotify_group *fsnotify_alloc_group( const struct fsnotify_ops *ops, int flags); /* get reference to a group */ extern void fsnotify_get_group(struct fsnotify_group *group); /* drop reference on a group from fsnotify_alloc_group */ extern void fsnotify_put_group(struct fsnotify_group *group); /* group destruction begins, stop queuing new events */ extern void fsnotify_group_stop_queueing(struct fsnotify_group *group); /* destroy group */ extern void fsnotify_destroy_group(struct fsnotify_group *group); /* fasync handler function */ extern int fsnotify_fasync(int fd, struct file *file, int on); /* Free event from memory */ extern void fsnotify_destroy_event(struct fsnotify_group *group, struct fsnotify_event *event); /* attach the event to the group notification queue */ extern int fsnotify_insert_event(struct fsnotify_group *group, struct fsnotify_event *event, int (*merge)(struct fsnotify_group *, struct fsnotify_event *), void (*insert)(struct fsnotify_group *, struct fsnotify_event *)); static inline int fsnotify_add_event(struct fsnotify_group *group, struct fsnotify_event *event, int (*merge)(struct fsnotify_group *, struct fsnotify_event *)) { return fsnotify_insert_event(group, event, merge, NULL); } /* Queue overflow event to a notification group */ static inline void fsnotify_queue_overflow(struct fsnotify_group *group) { fsnotify_add_event(group, group->overflow_event, NULL); } static inline bool fsnotify_is_overflow_event(u32 mask) { return mask & FS_Q_OVERFLOW; } static inline bool fsnotify_notify_queue_is_empty(struct fsnotify_group *group) { assert_spin_locked(&group->notification_lock); return list_empty(&group->notification_list); } extern bool fsnotify_notify_queue_is_empty(struct fsnotify_group *group); /* return, but do not dequeue the first event on the notification queue */ extern struct fsnotify_event *fsnotify_peek_first_event(struct fsnotify_group *group); /* return AND dequeue the first event on the notification queue */ extern struct fsnotify_event *fsnotify_remove_first_event(struct fsnotify_group *group); /* Remove event queued in the notification list */ extern void fsnotify_remove_queued_event(struct fsnotify_group *group, struct fsnotify_event *event); /* functions used to manipulate the marks attached to inodes */ /* * Canonical "ignore mask" including event flags. * * Note the subtle semantic difference from the legacy ->ignored_mask. * ->ignored_mask traditionally only meant which events should be ignored, * while ->ignore_mask also includes flags regarding the type of objects on * which events should be ignored. */ static inline __u32 fsnotify_ignore_mask(struct fsnotify_mark *mark) { __u32 ignore_mask = mark->ignore_mask; /* The event flags in ignore mask take effect */ if (mark->flags & FSNOTIFY_MARK_FLAG_HAS_IGNORE_FLAGS) return ignore_mask; /* * Legacy behavior: * - Always ignore events on dir * - Ignore events on child if parent is watching children */ ignore_mask |= FS_ISDIR; ignore_mask &= ~FS_EVENT_ON_CHILD; ignore_mask |= mark->mask & FS_EVENT_ON_CHILD; return ignore_mask; } /* Legacy ignored_mask - only event types to ignore */ static inline __u32 fsnotify_ignored_events(struct fsnotify_mark *mark) { return mark->ignore_mask & ALL_FSNOTIFY_EVENTS; } /* * Check if mask (or ignore mask) should be applied depending if victim is a * directory and whether it is reported to a watching parent. */ static inline bool fsnotify_mask_applicable(__u32 mask, bool is_dir, int iter_type) { /* Should mask be applied to a directory? */ if (is_dir && !(mask & FS_ISDIR)) return false; /* Should mask be applied to a child? */ if (iter_type == FSNOTIFY_ITER_TYPE_PARENT && !(mask & FS_EVENT_ON_CHILD)) return false; return true; } /* * Effective ignore mask taking into account if event victim is a * directory and whether it is reported to a watching parent. */ static inline __u32 fsnotify_effective_ignore_mask(struct fsnotify_mark *mark, bool is_dir, int iter_type) { __u32 ignore_mask = fsnotify_ignored_events(mark); if (!ignore_mask) return 0; /* For non-dir and non-child, no need to consult the event flags */ if (!is_dir && iter_type != FSNOTIFY_ITER_TYPE_PARENT) return ignore_mask; ignore_mask = fsnotify_ignore_mask(mark); if (!fsnotify_mask_applicable(ignore_mask, is_dir, iter_type)) return 0; return ignore_mask & ALL_FSNOTIFY_EVENTS; } /* Get mask for calculating object interest taking ignore mask into account */ static inline __u32 fsnotify_calc_mask(struct fsnotify_mark *mark) { __u32 mask = mark->mask; if (!fsnotify_ignored_events(mark)) return mask; /* Interest in FS_MODIFY may be needed for clearing ignore mask */ if (!(mark->flags & FSNOTIFY_MARK_FLAG_IGNORED_SURV_MODIFY)) mask |= FS_MODIFY; /* * If mark is interested in ignoring events on children, the object must * show interest in those events for fsnotify_parent() to notice it. */ return mask | mark->ignore_mask; } /* Get mask of events for a list of marks */ extern __u32 fsnotify_conn_mask(struct fsnotify_mark_connector *conn); /* Calculate mask of events for a list of marks */ extern void fsnotify_recalc_mask(struct fsnotify_mark_connector *conn); extern void fsnotify_init_mark(struct fsnotify_mark *mark, struct fsnotify_group *group); /* Find mark belonging to given group in the list of marks */ extern struct fsnotify_mark *fsnotify_find_mark(fsnotify_connp_t *connp, struct fsnotify_group *group); /* Get cached fsid of filesystem containing object */ extern int fsnotify_get_conn_fsid(const struct fsnotify_mark_connector *conn, __kernel_fsid_t *fsid); /* attach the mark to the object */ extern int fsnotify_add_mark(struct fsnotify_mark *mark, fsnotify_connp_t *connp, unsigned int obj_type, int add_flags, __kernel_fsid_t *fsid); extern int fsnotify_add_mark_locked(struct fsnotify_mark *mark, fsnotify_connp_t *connp, unsigned int obj_type, int add_flags, __kernel_fsid_t *fsid); /* attach the mark to the inode */ static inline int fsnotify_add_inode_mark(struct fsnotify_mark *mark, struct inode *inode, int add_flags) { return fsnotify_add_mark(mark, &inode->i_fsnotify_marks, FSNOTIFY_OBJ_TYPE_INODE, add_flags, NULL); } static inline int fsnotify_add_inode_mark_locked(struct fsnotify_mark *mark, struct inode *inode, int add_flags) { return fsnotify_add_mark_locked(mark, &inode->i_fsnotify_marks, FSNOTIFY_OBJ_TYPE_INODE, add_flags, NULL); } /* given a group and a mark, flag mark to be freed when all references are dropped */ extern void fsnotify_destroy_mark(struct fsnotify_mark *mark, struct fsnotify_group *group); /* detach mark from inode / mount list, group list, drop inode reference */ extern void fsnotify_detach_mark(struct fsnotify_mark *mark); /* free mark */ extern void fsnotify_free_mark(struct fsnotify_mark *mark); /* Wait until all marks queued for destruction are destroyed */ extern void fsnotify_wait_marks_destroyed(void); /* Clear all of the marks of a group attached to a given object type */ extern void fsnotify_clear_marks_by_group(struct fsnotify_group *group, unsigned int obj_type); /* run all the marks in a group, and clear all of the vfsmount marks */ static inline void fsnotify_clear_vfsmount_marks_by_group(struct fsnotify_group *group) { fsnotify_clear_marks_by_group(group, FSNOTIFY_OBJ_TYPE_VFSMOUNT); } /* run all the marks in a group, and clear all of the inode marks */ static inline void fsnotify_clear_inode_marks_by_group(struct fsnotify_group *group) { fsnotify_clear_marks_by_group(group, FSNOTIFY_OBJ_TYPE_INODE); } /* run all the marks in a group, and clear all of the sn marks */ static inline void fsnotify_clear_sb_marks_by_group(struct fsnotify_group *group) { fsnotify_clear_marks_by_group(group, FSNOTIFY_OBJ_TYPE_SB); } extern void fsnotify_get_mark(struct fsnotify_mark *mark); extern void fsnotify_put_mark(struct fsnotify_mark *mark); extern void fsnotify_finish_user_wait(struct fsnotify_iter_info *iter_info); extern bool fsnotify_prepare_user_wait(struct fsnotify_iter_info *iter_info); static inline void fsnotify_init_event(struct fsnotify_event *event) { INIT_LIST_HEAD(&event->list); } #else static inline int fsnotify(__u32 mask, const void *data, int data_type, struct inode *dir, const struct qstr *name, struct inode *inode, u32 cookie) { return 0; } static inline int __fsnotify_parent(struct dentry *dentry, __u32 mask, const void *data, int data_type) { return 0; } static inline void __fsnotify_inode_delete(struct inode *inode) {} static inline void __fsnotify_vfsmount_delete(struct vfsmount *mnt) {} static inline void fsnotify_sb_delete(struct super_block *sb) {} static inline void fsnotify_update_flags(struct dentry *dentry) {} static inline u32 fsnotify_get_cookie(void) { return 0; } static inline void fsnotify_unmount_inodes(struct super_block *sb) {} #endif /* CONFIG_FSNOTIFY */ #endif /* __KERNEL __ */ #endif /* __LINUX_FSNOTIFY_BACKEND_H */ PK ! �;r|" |" vga_switcheroo.hnu �[��� /* * vga_switcheroo.h - Support for laptop with dual GPU using one set of outputs * * Copyright (c) 2010 Red Hat Inc. * Author : Dave Airlie <airlied@redhat.com> * * Copyright (c) 2015 Lukas Wunner <lukas@wunner.de> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS * IN THE SOFTWARE. * */ #ifndef _LINUX_VGA_SWITCHEROO_H_ #define _LINUX_VGA_SWITCHEROO_H_ #include <linux/fb.h> struct pci_dev; /** * enum vga_switcheroo_handler_flags_t - handler flags bitmask * @VGA_SWITCHEROO_CAN_SWITCH_DDC: whether the handler is able to switch the * DDC lines separately. This signals to clients that they should call * drm_get_edid_switcheroo() to probe the EDID * @VGA_SWITCHEROO_NEEDS_EDP_CONFIG: whether the handler is unable to switch * the AUX channel separately. This signals to clients that the active * GPU needs to train the link and communicate the link parameters to the * inactive GPU (mediated by vga_switcheroo). The inactive GPU may then * skip the AUX handshake and set up its output with these pre-calibrated * values (DisplayPort specification v1.1a, section 2.5.3.3) * * Handler flags bitmask. Used by handlers to declare their capabilities upon * registering with vga_switcheroo. */ enum vga_switcheroo_handler_flags_t { VGA_SWITCHEROO_CAN_SWITCH_DDC = (1 << 0), VGA_SWITCHEROO_NEEDS_EDP_CONFIG = (1 << 1), }; /** * enum vga_switcheroo_state - client power state * @VGA_SWITCHEROO_OFF: off * @VGA_SWITCHEROO_ON: on * @VGA_SWITCHEROO_NOT_FOUND: client has not registered with vga_switcheroo. * Only used in vga_switcheroo_get_client_state() which in turn is only * called from hda_intel.c * * Client power state. */ enum vga_switcheroo_state { VGA_SWITCHEROO_OFF, VGA_SWITCHEROO_ON, /* below are referred only from vga_switcheroo_get_client_state() */ VGA_SWITCHEROO_NOT_FOUND, }; /** * enum vga_switcheroo_client_id - client identifier * @VGA_SWITCHEROO_UNKNOWN_ID: initial identifier assigned to vga clients. * Determining the id requires the handler, so GPUs are given their * true id in a delayed fashion in vga_switcheroo_enable() * @VGA_SWITCHEROO_IGD: integrated graphics device * @VGA_SWITCHEROO_DIS: discrete graphics device * @VGA_SWITCHEROO_MAX_CLIENTS: currently no more than two GPUs are supported * * Client identifier. Audio clients use the same identifier & 0x100. */ enum vga_switcheroo_client_id { VGA_SWITCHEROO_UNKNOWN_ID = 0x1000, VGA_SWITCHEROO_IGD = 0, VGA_SWITCHEROO_DIS, VGA_SWITCHEROO_MAX_CLIENTS, }; /** * struct vga_switcheroo_handler - handler callbacks * @init: initialize handler. * Optional. This gets called when vga_switcheroo is enabled, i.e. when * two vga clients have registered. It allows the handler to perform * some delayed initialization that depends on the existence of the * vga clients. Currently only the radeon and amdgpu drivers use this. * The return value is ignored * @switchto: switch outputs to given client. * Mandatory. For muxless machines this should be a no-op. Returning 0 * denotes success, anything else failure (in which case the switch is * aborted) * @switch_ddc: switch DDC lines to given client. * Optional. Should return the previous DDC owner on success or a * negative int on failure * @power_state: cut or reinstate power of given client. * Optional. The return value is ignored * @get_client_id: determine if given pci device is integrated or discrete GPU. * Mandatory * * Handler callbacks. The multiplexer itself. The @switchto and @get_client_id * methods are mandatory, all others may be set to NULL. */ struct vga_switcheroo_handler { int (*init)(void); int (*switchto)(enum vga_switcheroo_client_id id); int (*switch_ddc)(enum vga_switcheroo_client_id id); int (*power_state)(enum vga_switcheroo_client_id id, enum vga_switcheroo_state state); enum vga_switcheroo_client_id (*get_client_id)(struct pci_dev *pdev); }; /** * struct vga_switcheroo_client_ops - client callbacks * @set_gpu_state: do the equivalent of suspend/resume for the card. * Mandatory. This should not cut power to the discrete GPU, * which is the job of the handler * @reprobe: poll outputs. * Optional. This gets called after waking the GPU and switching * the outputs to it * @can_switch: check if the device is in a position to switch now. * Mandatory. The client should return false if a user space process * has one of its device files open * @gpu_bound: notify the client id to audio client when the GPU is bound. * * Client callbacks. A client can be either a GPU or an audio device on a GPU. * The @set_gpu_state and @can_switch methods are mandatory, @reprobe may be * set to NULL. For audio clients, the @reprobe member is bogus. * OTOH, @gpu_bound is only for audio clients, and not used for GPU clients. */ struct vga_switcheroo_client_ops { void (*set_gpu_state)(struct pci_dev *dev, enum vga_switcheroo_state); void (*reprobe)(struct pci_dev *dev); bool (*can_switch)(struct pci_dev *dev); void (*gpu_bound)(struct pci_dev *dev, enum vga_switcheroo_client_id); }; #if defined(CONFIG_VGA_SWITCHEROO) void vga_switcheroo_unregister_client(struct pci_dev *dev); int vga_switcheroo_register_client(struct pci_dev *dev, const struct vga_switcheroo_client_ops *ops, bool driver_power_control); int vga_switcheroo_register_audio_client(struct pci_dev *pdev, const struct vga_switcheroo_client_ops *ops, struct pci_dev *vga_dev); void vga_switcheroo_client_fb_set(struct pci_dev *dev, struct fb_info *info); int vga_switcheroo_register_handler(const struct vga_switcheroo_handler *handler, enum vga_switcheroo_handler_flags_t handler_flags); void vga_switcheroo_unregister_handler(void); enum vga_switcheroo_handler_flags_t vga_switcheroo_handler_flags(void); int vga_switcheroo_lock_ddc(struct pci_dev *pdev); int vga_switcheroo_unlock_ddc(struct pci_dev *pdev); int vga_switcheroo_process_delayed_switch(void); bool vga_switcheroo_client_probe_defer(struct pci_dev *pdev); enum vga_switcheroo_state vga_switcheroo_get_client_state(struct pci_dev *dev); int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain); void vga_switcheroo_fini_domain_pm_ops(struct device *dev); #else static inline void vga_switcheroo_unregister_client(struct pci_dev *dev) {} static inline int vga_switcheroo_register_client(struct pci_dev *dev, const struct vga_switcheroo_client_ops *ops, bool driver_power_control) { return 0; } static inline void vga_switcheroo_client_fb_set(struct pci_dev *dev, struct fb_info *info) {} static inline int vga_switcheroo_register_handler(const struct vga_switcheroo_handler *handler, enum vga_switcheroo_handler_flags_t handler_flags) { return 0; } static inline int vga_switcheroo_register_audio_client(struct pci_dev *pdev, const struct vga_switcheroo_client_ops *ops, struct pci_dev *vga_dev) { return 0; } static inline void vga_switcheroo_unregister_handler(void) {} static inline enum vga_switcheroo_handler_flags_t vga_switcheroo_handler_flags(void) { return 0; } static inline int vga_switcheroo_lock_ddc(struct pci_dev *pdev) { return -ENODEV; } static inline int vga_switcheroo_unlock_ddc(struct pci_dev *pdev) { return -ENODEV; } static inline int vga_switcheroo_process_delayed_switch(void) { return 0; } static inline bool vga_switcheroo_client_probe_defer(struct pci_dev *pdev) { return false; } static inline enum vga_switcheroo_state vga_switcheroo_get_client_state(struct pci_dev *dev) { return VGA_SWITCHEROO_ON; } static inline int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain) { return -EINVAL; } static inline void vga_switcheroo_fini_domain_pm_ops(struct device *dev) {} #endif #endif /* _LINUX_VGA_SWITCHEROO_H_ */ PK ! i:�� � seccomp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SECCOMP_H #define _LINUX_SECCOMP_H #include <uapi/linux/seccomp.h> #define SECCOMP_FILTER_FLAG_MASK (SECCOMP_FILTER_FLAG_TSYNC | \ SECCOMP_FILTER_FLAG_LOG | \ SECCOMP_FILTER_FLAG_SPEC_ALLOW | \ SECCOMP_FILTER_FLAG_NEW_LISTENER | \ SECCOMP_FILTER_FLAG_TSYNC_ESRCH) /* sizeof() the first published struct seccomp_notif_addfd */ #define SECCOMP_NOTIFY_ADDFD_SIZE_VER0 24 #define SECCOMP_NOTIFY_ADDFD_SIZE_LATEST SECCOMP_NOTIFY_ADDFD_SIZE_VER0 #ifdef CONFIG_SECCOMP #include <linux/thread_info.h> #include <linux/atomic.h> #include <asm/seccomp.h> struct seccomp_filter; /** * struct seccomp - the state of a seccomp'ed process * * @mode: indicates one of the valid values above for controlled * system calls available to a process. * @filter: must always point to a valid seccomp-filter or NULL as it is * accessed without locking during system call entry. * * @filter must only be accessed from the context of current as there * is no read locking. */ struct seccomp { int mode; atomic_t filter_count; struct seccomp_filter *filter; }; #ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER extern int __secure_computing(const struct seccomp_data *sd); static inline int secure_computing(void) { if (unlikely(test_syscall_work(SECCOMP))) return __secure_computing(NULL); return 0; } #else extern void secure_computing_strict(int this_syscall); #endif extern long prctl_get_seccomp(void); extern long prctl_set_seccomp(unsigned long, void __user *); static inline int seccomp_mode(struct seccomp *s) { return s->mode; } #else /* CONFIG_SECCOMP */ #include <linux/errno.h> struct seccomp { }; struct seccomp_filter { }; struct seccomp_data; #ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER static inline int secure_computing(void) { return 0; } #else static inline void secure_computing_strict(int this_syscall) { return; } #endif static inline int __secure_computing(const struct seccomp_data *sd) { return 0; } static inline long prctl_get_seccomp(void) { return -EINVAL; } static inline long prctl_set_seccomp(unsigned long arg2, char __user *arg3) { return -EINVAL; } static inline int seccomp_mode(struct seccomp *s) { return SECCOMP_MODE_DISABLED; } #endif /* CONFIG_SECCOMP */ #ifdef CONFIG_SECCOMP_FILTER extern void seccomp_filter_release(struct task_struct *tsk); extern void get_seccomp_filter(struct task_struct *tsk); #else /* CONFIG_SECCOMP_FILTER */ static inline void seccomp_filter_release(struct task_struct *tsk) { return; } static inline void get_seccomp_filter(struct task_struct *tsk) { return; } #endif /* CONFIG_SECCOMP_FILTER */ #if defined(CONFIG_SECCOMP_FILTER) && defined(CONFIG_CHECKPOINT_RESTORE) extern long seccomp_get_filter(struct task_struct *task, unsigned long filter_off, void __user *data); extern long seccomp_get_metadata(struct task_struct *task, unsigned long filter_off, void __user *data); #else static inline long seccomp_get_filter(struct task_struct *task, unsigned long n, void __user *data) { return -EINVAL; } static inline long seccomp_get_metadata(struct task_struct *task, unsigned long filter_off, void __user *data) { return -EINVAL; } #endif /* CONFIG_SECCOMP_FILTER && CONFIG_CHECKPOINT_RESTORE */ #ifdef CONFIG_SECCOMP_CACHE_DEBUG struct seq_file; int proc_pid_seccomp_cache(struct seq_file *m, struct pid_namespace *ns, struct pid *pid, struct task_struct *task); #endif #endif /* _LINUX_SECCOMP_H */ PK ! YSy � � ata.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2003-2004 Red Hat, Inc. All rights reserved. * Copyright 2003-2004 Jeff Garzik * * libata documentation is available via 'make {ps|pdf}docs', * as Documentation/driver-api/libata.rst * * Hardware documentation available from http://www.t13.org/ */ #ifndef __LINUX_ATA_H__ #define __LINUX_ATA_H__ #include <linux/bits.h> #include <linux/string.h> #include <linux/types.h> #include <asm/byteorder.h> /* defines only for the constants which don't work well as enums */ #define ATA_DMA_BOUNDARY 0xffffUL #define ATA_DMA_MASK 0xffffffffULL enum { /* various global constants */ ATA_MAX_DEVICES = 2, /* per bus/port */ ATA_MAX_PRD = 256, /* we could make these 256/256 */ ATA_SECT_SIZE = 512, ATA_MAX_SECTORS_128 = 128, ATA_MAX_SECTORS = 256, ATA_MAX_SECTORS_1024 = 1024, ATA_MAX_SECTORS_LBA48 = 65535,/* avoid count to be 0000h */ ATA_MAX_SECTORS_TAPE = 65535, ATA_MAX_TRIM_RNUM = 64, /* 512-byte payload / (6-byte LBA + 2-byte range per entry) */ ATA_ID_WORDS = 256, ATA_ID_CONFIG = 0, ATA_ID_CYLS = 1, ATA_ID_HEADS = 3, ATA_ID_SECTORS = 6, ATA_ID_SERNO = 10, ATA_ID_BUF_SIZE = 21, ATA_ID_FW_REV = 23, ATA_ID_PROD = 27, ATA_ID_MAX_MULTSECT = 47, ATA_ID_DWORD_IO = 48, /* before ATA-8 */ ATA_ID_TRUSTED = 48, /* ATA-8 and later */ ATA_ID_CAPABILITY = 49, ATA_ID_OLD_PIO_MODES = 51, ATA_ID_OLD_DMA_MODES = 52, ATA_ID_FIELD_VALID = 53, ATA_ID_CUR_CYLS = 54, ATA_ID_CUR_HEADS = 55, ATA_ID_CUR_SECTORS = 56, ATA_ID_MULTSECT = 59, ATA_ID_LBA_CAPACITY = 60, ATA_ID_SWDMA_MODES = 62, ATA_ID_MWDMA_MODES = 63, ATA_ID_PIO_MODES = 64, ATA_ID_EIDE_DMA_MIN = 65, ATA_ID_EIDE_DMA_TIME = 66, ATA_ID_EIDE_PIO = 67, ATA_ID_EIDE_PIO_IORDY = 68, ATA_ID_ADDITIONAL_SUPP = 69, ATA_ID_QUEUE_DEPTH = 75, ATA_ID_SATA_CAPABILITY = 76, ATA_ID_SATA_CAPABILITY_2 = 77, ATA_ID_FEATURE_SUPP = 78, ATA_ID_MAJOR_VER = 80, ATA_ID_COMMAND_SET_1 = 82, ATA_ID_COMMAND_SET_2 = 83, ATA_ID_CFSSE = 84, ATA_ID_CFS_ENABLE_1 = 85, ATA_ID_CFS_ENABLE_2 = 86, ATA_ID_CSF_DEFAULT = 87, ATA_ID_UDMA_MODES = 88, ATA_ID_HW_CONFIG = 93, ATA_ID_SPG = 98, ATA_ID_LBA_CAPACITY_2 = 100, ATA_ID_SECTOR_SIZE = 106, ATA_ID_WWN = 108, ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */ ATA_ID_COMMAND_SET_3 = 119, ATA_ID_COMMAND_SET_4 = 120, ATA_ID_LAST_LUN = 126, ATA_ID_DLF = 128, ATA_ID_CSFO = 129, ATA_ID_CFA_POWER = 160, ATA_ID_CFA_KEY_MGMT = 162, ATA_ID_CFA_MODES = 163, ATA_ID_DATA_SET_MGMT = 169, ATA_ID_SCT_CMD_XPORT = 206, ATA_ID_ROT_SPEED = 217, ATA_ID_PIO4 = (1 << 1), ATA_ID_SERNO_LEN = 20, ATA_ID_FW_REV_LEN = 8, ATA_ID_PROD_LEN = 40, ATA_ID_WWN_LEN = 8, ATA_PCI_CTL_OFS = 2, ATA_PIO0 = (1 << 0), ATA_PIO1 = ATA_PIO0 | (1 << 1), ATA_PIO2 = ATA_PIO1 | (1 << 2), ATA_PIO3 = ATA_PIO2 | (1 << 3), ATA_PIO4 = ATA_PIO3 | (1 << 4), ATA_PIO5 = ATA_PIO4 | (1 << 5), ATA_PIO6 = ATA_PIO5 | (1 << 6), ATA_PIO4_ONLY = (1 << 4), ATA_SWDMA0 = (1 << 0), ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1), ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2), ATA_SWDMA2_ONLY = (1 << 2), ATA_MWDMA0 = (1 << 0), ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1), ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2), ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3), ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4), ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2), ATA_MWDMA2_ONLY = (1 << 2), ATA_UDMA0 = (1 << 0), ATA_UDMA1 = ATA_UDMA0 | (1 << 1), ATA_UDMA2 = ATA_UDMA1 | (1 << 2), ATA_UDMA3 = ATA_UDMA2 | (1 << 3), ATA_UDMA4 = ATA_UDMA3 | (1 << 4), ATA_UDMA5 = ATA_UDMA4 | (1 << 5), ATA_UDMA6 = ATA_UDMA5 | (1 << 6), ATA_UDMA7 = ATA_UDMA6 | (1 << 7), /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ ATA_UDMA24_ONLY = (1 << 2) | (1 << 4), ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ /* DMA-related */ ATA_PRD_SZ = 8, ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ ATA_DMA_TABLE_OFS = 4, ATA_DMA_STATUS = 2, ATA_DMA_CMD = 0, ATA_DMA_WR = (1 << 3), ATA_DMA_START = (1 << 0), ATA_DMA_INTR = (1 << 2), ATA_DMA_ERR = (1 << 1), ATA_DMA_ACTIVE = (1 << 0), /* bits in ATA command block registers */ ATA_HOB = (1 << 7), /* LBA48 selector */ ATA_NIEN = (1 << 1), /* disable-irq flag */ ATA_LBA = (1 << 6), /* LBA28 selector */ ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ ATA_BUSY = (1 << 7), /* BSY status bit */ ATA_DRDY = (1 << 6), /* device ready */ ATA_DF = (1 << 5), /* device fault */ ATA_DSC = (1 << 4), /* drive seek complete */ ATA_DRQ = (1 << 3), /* data request i/o */ ATA_CORR = (1 << 2), /* corrected data error */ ATA_SENSE = (1 << 1), /* sense code available */ ATA_ERR = (1 << 0), /* have an error */ ATA_SRST = (1 << 2), /* software reset */ ATA_ICRC = (1 << 7), /* interface CRC error */ ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */ ATA_UNC = (1 << 6), /* uncorrectable media error */ ATA_MC = (1 << 5), /* media changed */ ATA_IDNF = (1 << 4), /* ID not found */ ATA_MCR = (1 << 3), /* media change requested */ ATA_ABORTED = (1 << 2), /* command aborted */ ATA_TRK0NF = (1 << 1), /* track 0 not found */ ATA_AMNF = (1 << 0), /* address mark not found */ ATAPI_LFS = 0xF0, /* last failed sense */ ATAPI_EOM = ATA_TRK0NF, /* end of media */ ATAPI_ILI = ATA_AMNF, /* illegal length indication */ ATAPI_IO = (1 << 1), ATAPI_COD = (1 << 0), /* ATA command block registers */ ATA_REG_DATA = 0x00, ATA_REG_ERR = 0x01, ATA_REG_NSECT = 0x02, ATA_REG_LBAL = 0x03, ATA_REG_LBAM = 0x04, ATA_REG_LBAH = 0x05, ATA_REG_DEVICE = 0x06, ATA_REG_STATUS = 0x07, ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ ATA_REG_CMD = ATA_REG_STATUS, ATA_REG_BYTEL = ATA_REG_LBAM, ATA_REG_BYTEH = ATA_REG_LBAH, ATA_REG_DEVSEL = ATA_REG_DEVICE, ATA_REG_IRQ = ATA_REG_NSECT, /* ATA device commands */ ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */ ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ ATA_CMD_EDD = 0x90, /* execute device diagnostic */ ATA_CMD_DOWNLOAD_MICRO = 0x92, ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93, ATA_CMD_NOP = 0x00, ATA_CMD_FLUSH = 0xE7, ATA_CMD_FLUSH_EXT = 0xEA, ATA_CMD_ID_ATA = 0xEC, ATA_CMD_ID_ATAPI = 0xA1, ATA_CMD_SERVICE = 0xA2, ATA_CMD_READ = 0xC8, ATA_CMD_READ_EXT = 0x25, ATA_CMD_READ_QUEUED = 0x26, ATA_CMD_READ_STREAM_EXT = 0x2B, ATA_CMD_READ_STREAM_DMA_EXT = 0x2A, ATA_CMD_WRITE = 0xCA, ATA_CMD_WRITE_EXT = 0x35, ATA_CMD_WRITE_QUEUED = 0x36, ATA_CMD_WRITE_STREAM_EXT = 0x3B, ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A, ATA_CMD_WRITE_FUA_EXT = 0x3D, ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E, ATA_CMD_FPDMA_READ = 0x60, ATA_CMD_FPDMA_WRITE = 0x61, ATA_CMD_NCQ_NON_DATA = 0x63, ATA_CMD_FPDMA_SEND = 0x64, ATA_CMD_FPDMA_RECV = 0x65, ATA_CMD_PIO_READ = 0x20, ATA_CMD_PIO_READ_EXT = 0x24, ATA_CMD_PIO_WRITE = 0x30, ATA_CMD_PIO_WRITE_EXT = 0x34, ATA_CMD_READ_MULTI = 0xC4, ATA_CMD_READ_MULTI_EXT = 0x29, ATA_CMD_WRITE_MULTI = 0xC5, ATA_CMD_WRITE_MULTI_EXT = 0x39, ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE, ATA_CMD_SET_FEATURES = 0xEF, ATA_CMD_SET_MULTI = 0xC6, ATA_CMD_PACKET = 0xA0, ATA_CMD_VERIFY = 0x40, ATA_CMD_VERIFY_EXT = 0x42, ATA_CMD_WRITE_UNCORR_EXT = 0x45, ATA_CMD_STANDBYNOW1 = 0xE0, ATA_CMD_IDLEIMMEDIATE = 0xE1, ATA_CMD_SLEEP = 0xE6, ATA_CMD_INIT_DEV_PARAMS = 0x91, ATA_CMD_READ_NATIVE_MAX = 0xF8, ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, ATA_CMD_SET_MAX = 0xF9, ATA_CMD_SET_MAX_EXT = 0x37, ATA_CMD_READ_LOG_EXT = 0x2F, ATA_CMD_WRITE_LOG_EXT = 0x3F, ATA_CMD_READ_LOG_DMA_EXT = 0x47, ATA_CMD_WRITE_LOG_DMA_EXT = 0x57, ATA_CMD_TRUSTED_NONDATA = 0x5B, ATA_CMD_TRUSTED_RCV = 0x5C, ATA_CMD_TRUSTED_RCV_DMA = 0x5D, ATA_CMD_TRUSTED_SND = 0x5E, ATA_CMD_TRUSTED_SND_DMA = 0x5F, ATA_CMD_PMP_READ = 0xE4, ATA_CMD_PMP_READ_DMA = 0xE9, ATA_CMD_PMP_WRITE = 0xE8, ATA_CMD_PMP_WRITE_DMA = 0xEB, ATA_CMD_CONF_OVERLAY = 0xB1, ATA_CMD_SEC_SET_PASS = 0xF1, ATA_CMD_SEC_UNLOCK = 0xF2, ATA_CMD_SEC_ERASE_PREP = 0xF3, ATA_CMD_SEC_ERASE_UNIT = 0xF4, ATA_CMD_SEC_FREEZE_LOCK = 0xF5, ATA_CMD_SEC_DISABLE_PASS = 0xF6, ATA_CMD_CONFIG_STREAM = 0x51, ATA_CMD_SMART = 0xB0, ATA_CMD_MEDIA_LOCK = 0xDE, ATA_CMD_MEDIA_UNLOCK = 0xDF, ATA_CMD_DSM = 0x06, ATA_CMD_CHK_MED_CRD_TYP = 0xD1, ATA_CMD_CFA_REQ_EXT_ERR = 0x03, ATA_CMD_CFA_WRITE_NE = 0x38, ATA_CMD_CFA_TRANS_SECT = 0x87, ATA_CMD_CFA_ERASE = 0xC0, ATA_CMD_CFA_WRITE_MULT_NE = 0xCD, ATA_CMD_REQ_SENSE_DATA = 0x0B, ATA_CMD_SANITIZE_DEVICE = 0xB4, ATA_CMD_ZAC_MGMT_IN = 0x4A, ATA_CMD_ZAC_MGMT_OUT = 0x9F, /* marked obsolete in the ATA/ATAPI-7 spec */ ATA_CMD_RESTORE = 0x10, /* Subcmds for ATA_CMD_FPDMA_RECV */ ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01, ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02, /* Subcmds for ATA_CMD_FPDMA_SEND */ ATA_SUBCMD_FPDMA_SEND_DSM = 0x00, ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02, /* Subcmds for ATA_CMD_NCQ_NON_DATA */ ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00, ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05, ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06, ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07, /* Subcmds for ATA_CMD_ZAC_MGMT_IN */ ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00, /* Subcmds for ATA_CMD_ZAC_MGMT_OUT */ ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01, ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02, ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03, ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04, /* READ_LOG_EXT pages */ ATA_LOG_DIRECTORY = 0x0, ATA_LOG_SATA_NCQ = 0x10, ATA_LOG_NCQ_NON_DATA = 0x12, ATA_LOG_NCQ_SEND_RECV = 0x13, ATA_LOG_IDENTIFY_DEVICE = 0x30, /* Identify device log pages: */ ATA_LOG_SECURITY = 0x06, ATA_LOG_SATA_SETTINGS = 0x08, ATA_LOG_ZONED_INFORMATION = 0x09, /* Identify device SATA settings log:*/ ATA_LOG_DEVSLP_OFFSET = 0x30, ATA_LOG_DEVSLP_SIZE = 0x08, ATA_LOG_DEVSLP_MDAT = 0x00, ATA_LOG_DEVSLP_MDAT_MASK = 0x1F, ATA_LOG_DEVSLP_DETO = 0x01, ATA_LOG_DEVSLP_VALID = 0x07, ATA_LOG_DEVSLP_VALID_MASK = 0x80, ATA_LOG_NCQ_PRIO_OFFSET = 0x09, /* NCQ send and receive log */ ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00, ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0), ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04, ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0), ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08, ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0), ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C, ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0), ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10, ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0), ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1), ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14, /* NCQ Non-Data log */ ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00, ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00, ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0), ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1), ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2), ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3), ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4), ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C, ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0), ATA_LOG_NCQ_NON_DATA_SIZE = 0x40, /* READ/WRITE LONG (obsolete) */ ATA_CMD_READ_LONG = 0x22, ATA_CMD_READ_LONG_ONCE = 0x23, ATA_CMD_WRITE_LONG = 0x32, ATA_CMD_WRITE_LONG_ONCE = 0x33, /* SETFEATURES stuff */ SETFEATURES_XFER = 0x03, XFER_UDMA_7 = 0x47, XFER_UDMA_6 = 0x46, XFER_UDMA_5 = 0x45, XFER_UDMA_4 = 0x44, XFER_UDMA_3 = 0x43, XFER_UDMA_2 = 0x42, XFER_UDMA_1 = 0x41, XFER_UDMA_0 = 0x40, XFER_MW_DMA_4 = 0x24, /* CFA only */ XFER_MW_DMA_3 = 0x23, /* CFA only */ XFER_MW_DMA_2 = 0x22, XFER_MW_DMA_1 = 0x21, XFER_MW_DMA_0 = 0x20, XFER_SW_DMA_2 = 0x12, XFER_SW_DMA_1 = 0x11, XFER_SW_DMA_0 = 0x10, XFER_PIO_6 = 0x0E, /* CFA only */ XFER_PIO_5 = 0x0D, /* CFA only */ XFER_PIO_4 = 0x0C, XFER_PIO_3 = 0x0B, XFER_PIO_2 = 0x0A, XFER_PIO_1 = 0x09, XFER_PIO_0 = 0x08, XFER_PIO_SLOW = 0x00, SETFEATURES_WC_ON = 0x02, /* Enable write cache */ SETFEATURES_WC_OFF = 0x82, /* Disable write cache */ SETFEATURES_RA_ON = 0xaa, /* Enable read look-ahead */ SETFEATURES_RA_OFF = 0x55, /* Disable read look-ahead */ /* Enable/Disable Automatic Acoustic Management */ SETFEATURES_AAM_ON = 0x42, SETFEATURES_AAM_OFF = 0xC2, SETFEATURES_SPINUP = 0x07, /* Spin-up drive */ SETFEATURES_SPINUP_TIMEOUT = 30000, /* 30s timeout for drive spin-up from PUIS */ SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */ SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */ /* SETFEATURE Sector counts for SATA features */ SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */ SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */ SATA_DIPM = 0x03, /* Device Initiated Power Management */ SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */ SATA_AN = 0x05, /* Asynchronous Notification */ SATA_SSP = 0x06, /* Software Settings Preservation */ SATA_DEVSLP = 0x09, /* Device Sleep */ SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */ /* feature values for SET_MAX */ ATA_SET_MAX_ADDR = 0x00, ATA_SET_MAX_PASSWD = 0x01, ATA_SET_MAX_LOCK = 0x02, ATA_SET_MAX_UNLOCK = 0x03, ATA_SET_MAX_FREEZE_LOCK = 0x04, ATA_SET_MAX_PASSWD_DMA = 0x05, ATA_SET_MAX_UNLOCK_DMA = 0x06, /* feature values for DEVICE CONFIGURATION OVERLAY */ ATA_DCO_RESTORE = 0xC0, ATA_DCO_FREEZE_LOCK = 0xC1, ATA_DCO_IDENTIFY = 0xC2, ATA_DCO_SET = 0xC3, /* feature values for SMART */ ATA_SMART_ENABLE = 0xD8, ATA_SMART_READ_VALUES = 0xD0, ATA_SMART_READ_THRESHOLDS = 0xD1, /* feature values for Data Set Management */ ATA_DSM_TRIM = 0x01, /* password used in LBA Mid / LBA High for executing SMART commands */ ATA_SMART_LBAM_PASS = 0x4F, ATA_SMART_LBAH_PASS = 0xC2, /* ATAPI stuff */ ATAPI_PKT_DMA = (1 << 0), ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: 0=to device, 1=to host */ ATAPI_CDB_LEN = 16, /* PMP stuff */ SATA_PMP_MAX_PORTS = 15, SATA_PMP_CTRL_PORT = 15, SATA_PMP_GSCR_DWORDS = 128, SATA_PMP_GSCR_PROD_ID = 0, SATA_PMP_GSCR_REV = 1, SATA_PMP_GSCR_PORT_INFO = 2, SATA_PMP_GSCR_ERROR = 32, SATA_PMP_GSCR_ERROR_EN = 33, SATA_PMP_GSCR_FEAT = 64, SATA_PMP_GSCR_FEAT_EN = 96, SATA_PMP_PSCR_STATUS = 0, SATA_PMP_PSCR_ERROR = 1, SATA_PMP_PSCR_CONTROL = 2, SATA_PMP_FEAT_BIST = (1 << 0), SATA_PMP_FEAT_PMREQ = (1 << 1), SATA_PMP_FEAT_DYNSSC = (1 << 2), SATA_PMP_FEAT_NOTIFY = (1 << 3), /* cable types */ ATA_CBL_NONE = 0, ATA_CBL_PATA40 = 1, ATA_CBL_PATA80 = 2, ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */ ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */ ATA_CBL_SATA = 6, /* SATA Status and Control Registers */ SCR_STATUS = 0, SCR_ERROR = 1, SCR_CONTROL = 2, SCR_ACTIVE = 3, SCR_NOTIFICATION = 4, /* SError bits */ SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */ SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */ SERR_DATA = (1 << 8), /* unrecovered data error */ SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */ SERR_PROTOCOL = (1 << 10), /* protocol violation */ SERR_INTERNAL = (1 << 11), /* host internal error */ SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */ SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */ SERR_COMM_WAKE = (1 << 18), /* Comm wake */ SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */ SERR_DISPARITY = (1 << 20), /* Disparity */ SERR_CRC = (1 << 21), /* CRC error */ SERR_HANDSHAKE = (1 << 22), /* Handshake error */ SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */ SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */ SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */ SERR_DEV_XCHG = (1 << 26), /* device exchanged */ }; enum ata_prot_flags { /* protocol flags */ ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */ ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */ ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */ ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */ /* taskfile protocols */ ATA_PROT_UNKNOWN = (u8)-1, ATA_PROT_NODATA = 0, ATA_PROT_PIO = ATA_PROT_FLAG_PIO, ATA_PROT_DMA = ATA_PROT_FLAG_DMA, ATA_PROT_NCQ_NODATA = ATA_PROT_FLAG_NCQ, ATA_PROT_NCQ = ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ, ATAPI_PROT_NODATA = ATA_PROT_FLAG_ATAPI, ATAPI_PROT_PIO = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO, ATAPI_PROT_DMA = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA, }; enum ata_ioctls { ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */ ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */ }; /* core structures */ struct ata_bmdma_prd { __le32 addr; __le32 flags_len; }; /* * id tests */ #define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0) #define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9)) #define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8)) #define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8)) #define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1) #define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7)) #define ata_id_is_locked(id) (((id)[ATA_ID_DLF] & 0x7) == 0x7) #define ata_id_has_atapi_AN(id) \ ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \ ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \ ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5))) #define ata_id_has_fpdma_aa(id) \ ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \ ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \ ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2))) #define ata_id_has_devslp(id) \ ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \ ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \ ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))) #define ata_id_has_ncq_autosense(id) \ ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \ ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \ ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))) #define ata_id_has_dipm(id) \ ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \ ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \ ((id)[ATA_ID_FEATURE_SUPP] & (1 << 3))) #define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10)) #define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11)) #define ata_id_u32(id,n) \ (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) #define ata_id_u64(id,n) \ ( ((u64) (id)[(n) + 3] << 48) | \ ((u64) (id)[(n) + 2] << 32) | \ ((u64) (id)[(n) + 1] << 16) | \ ((u64) (id)[(n) + 0]) ) #define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20) #define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4)) static inline bool ata_id_has_hipm(const u16 *id) { u16 val = id[ATA_ID_SATA_CAPABILITY]; if (val == 0 || val == 0xffff) return false; return val & (1 << 9); } static inline bool ata_id_has_fua(const u16 *id) { if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000) return false; return id[ATA_ID_CFSSE] & (1 << 6); } static inline bool ata_id_has_flush(const u16 *id) { if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) return false; return id[ATA_ID_COMMAND_SET_2] & (1 << 12); } static inline bool ata_id_flush_enabled(const u16 *id) { if (ata_id_has_flush(id) == 0) return false; if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000) return false; return id[ATA_ID_CFS_ENABLE_2] & (1 << 12); } static inline bool ata_id_has_flush_ext(const u16 *id) { if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) return false; return id[ATA_ID_COMMAND_SET_2] & (1 << 13); } static inline bool ata_id_flush_ext_enabled(const u16 *id) { if (ata_id_has_flush_ext(id) == 0) return false; if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000) return false; /* * some Maxtor disks have bit 13 defined incorrectly * so check bit 10 too */ return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400; } static inline u32 ata_id_logical_sector_size(const u16 *id) { /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128. * IDENTIFY DEVICE data, word 117-118. * 0xd000 ignores bit 13 (logical:physical > 1) */ if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000) return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16) + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ; return ATA_SECT_SIZE; } static inline u8 ata_id_log2_per_physical_sector(const u16 *id) { /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128. * IDENTIFY DEVICE data, word 106. * 0xe000 ignores bit 12 (logical sector > 512 bytes) */ if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000) return (id[ATA_ID_SECTOR_SIZE] & 0xf); return 0; } /* Offset of logical sectors relative to physical sectors. * * If device has more than one logical sector per physical sector * (aka 512 byte emulation), vendors might offset the "sector 0" address * so sector 63 is "naturally aligned" - e.g. FAT partition table. * This avoids Read/Mod/Write penalties when using FAT partition table * and updating "well aligned" (FS perspective) physical sectors on every * transaction. */ static inline u16 ata_id_logical_sector_offset(const u16 *id, u8 log2_per_phys) { u16 word_209 = id[209]; if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) { u16 first = word_209 & 0x3fff; if (first > 0) return (1 << log2_per_phys) - first; } return 0; } static inline bool ata_id_has_lba48(const u16 *id) { if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) return false; if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2)) return false; return id[ATA_ID_COMMAND_SET_2] & (1 << 10); } static inline bool ata_id_lba48_enabled(const u16 *id) { if (ata_id_has_lba48(id) == 0) return false; if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000) return false; return id[ATA_ID_CFS_ENABLE_2] & (1 << 10); } static inline bool ata_id_hpa_enabled(const u16 *id) { /* Yes children, word 83 valid bits cover word 82 data */ if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) return false; /* And 87 covers 85-87 */ if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000) return false; /* Check command sets enabled as well as supported */ if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0) return false; return id[ATA_ID_COMMAND_SET_1] & (1 << 10); } static inline bool ata_id_has_wcache(const u16 *id) { /* Yes children, word 83 valid bits cover word 82 data */ if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) return false; return id[ATA_ID_COMMAND_SET_1] & (1 << 5); } static inline bool ata_id_has_pm(const u16 *id) { if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) return false; return id[ATA_ID_COMMAND_SET_1] & (1 << 3); } static inline bool ata_id_rahead_enabled(const u16 *id) { if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000) return false; return id[ATA_ID_CFS_ENABLE_1] & (1 << 6); } static inline bool ata_id_wcache_enabled(const u16 *id) { if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000) return false; return id[ATA_ID_CFS_ENABLE_1] & (1 << 5); } static inline bool ata_id_has_read_log_dma_ext(const u16 *id) { /* Word 86 must have bit 15 set */ if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15))) return false; /* READ LOG DMA EXT support can be signaled either from word 119 * or from word 120. The format is the same for both words: Bit * 15 must be cleared, bit 14 set and bit 3 set. */ if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 || (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008) return true; return false; } static inline bool ata_id_has_sense_reporting(const u16 *id) { if (!(id[ATA_ID_CFS_ENABLE_2] & BIT(15))) return false; if ((id[ATA_ID_COMMAND_SET_3] & (BIT(15) | BIT(14))) != BIT(14)) return false; return id[ATA_ID_COMMAND_SET_3] & BIT(6); } static inline bool ata_id_sense_reporting_enabled(const u16 *id) { if (!ata_id_has_sense_reporting(id)) return false; /* ata_id_has_sense_reporting() == true, word 86 must have bit 15 set */ if ((id[ATA_ID_COMMAND_SET_4] & (BIT(15) | BIT(14))) != BIT(14)) return false; return id[ATA_ID_COMMAND_SET_4] & BIT(6); } /** * * Word: 206 - SCT Command Transport * 15:12 - Vendor Specific * 11:6 - Reserved * 5 - SCT Command Transport Data Tables supported * 4 - SCT Command Transport Features Control supported * 3 - SCT Command Transport Error Recovery Control supported * 2 - SCT Command Transport Write Same supported * 1 - SCT Command Transport Long Sector Access supported * 0 - SCT Command Transport supported */ static inline bool ata_id_sct_data_tables(const u16 *id) { return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false; } static inline bool ata_id_sct_features_ctrl(const u16 *id) { return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false; } static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id) { return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false; } static inline bool ata_id_sct_long_sector_access(const u16 *id) { return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false; } static inline bool ata_id_sct_supported(const u16 *id) { return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false; } /** * ata_id_major_version - get ATA level of drive * @id: Identify data * * Caveats: * ATA-1 considers identify optional * ATA-2 introduces mandatory identify * ATA-3 introduces word 80 and accurate reporting * * The practical impact of this is that ata_id_major_version cannot * reliably report on drives below ATA3. */ static inline unsigned int ata_id_major_version(const u16 *id) { unsigned int mver; if (id[ATA_ID_MAJOR_VER] == 0xFFFF) return 0; for (mver = 14; mver >= 1; mver--) if (id[ATA_ID_MAJOR_VER] & (1 << mver)) break; return mver; } static inline bool ata_id_is_sata(const u16 *id) { /* * See if word 93 is 0 AND drive is at least ATA-5 compatible * verifying that word 80 by casting it to a signed type -- * this trick allows us to filter out the reserved values of * 0x0000 and 0xffff along with the earlier ATA revisions... */ if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020) return true; return false; } static inline bool ata_id_has_tpm(const u16 *id) { /* The TPM bits are only valid on ATA8 */ if (ata_id_major_version(id) < 8) return false; if ((id[48] & 0xC000) != 0x4000) return false; return id[48] & (1 << 0); } static inline bool ata_id_has_dword_io(const u16 *id) { /* ATA 8 reuses this flag for "trusted" computing */ if (ata_id_major_version(id) > 7) return false; return id[ATA_ID_DWORD_IO] & (1 << 0); } static inline bool ata_id_has_trusted(const u16 *id) { if (ata_id_major_version(id) <= 7) return false; return id[ATA_ID_TRUSTED] & (1 << 0); } static inline bool ata_id_has_unload(const u16 *id) { if (ata_id_major_version(id) >= 7 && (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 && id[ATA_ID_CFSSE] & (1 << 13)) return true; return false; } static inline bool ata_id_has_wwn(const u16 *id) { return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100; } static inline int ata_id_form_factor(const u16 *id) { u16 val = id[168]; if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff) return 0; val &= 0xf; if (val > 5) return 0; return val; } static inline int ata_id_rotation_rate(const u16 *id) { u16 val = id[217]; if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff) return 0; if (val > 1 && val < 0x401) return 0; return val; } static inline bool ata_id_has_ncq_send_and_recv(const u16 *id) { return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6); } static inline bool ata_id_has_ncq_non_data(const u16 *id) { return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5); } static inline bool ata_id_has_ncq_prio(const u16 *id) { return id[ATA_ID_SATA_CAPABILITY] & BIT(12); } static inline bool ata_id_has_trim(const u16 *id) { if (ata_id_major_version(id) >= 7 && (id[ATA_ID_DATA_SET_MGMT] & 1)) return true; return false; } static inline bool ata_id_has_zero_after_trim(const u16 *id) { /* DSM supported, deterministic read, and read zero after trim set */ if (ata_id_has_trim(id) && (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020) return true; return false; } static inline bool ata_id_current_chs_valid(const u16 *id) { /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command has not been issued to the device then the values of id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */ return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */ id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */ id[ATA_ID_CUR_HEADS] && /* heads in current translation */ id[ATA_ID_CUR_HEADS] <= 16 && id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */ } static inline bool ata_id_is_cfa(const u16 *id) { if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */ (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */ return true; /* * CF specs don't require specific value in the word 0 anymore and yet * they forbid to report the ATA version in the word 80 and require the * CFA feature set support to be indicated in the word 83 in this case. * Unfortunately, some cards only follow either of this requirements, * and while those that don't indicate CFA feature support need some * sort of quirk list, it seems impractical for the ones that do... */ return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004; } static inline bool ata_id_is_ssd(const u16 *id) { return id[ATA_ID_ROT_SPEED] == 0x01; } static inline u8 ata_id_zoned_cap(const u16 *id) { return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3); } static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio) { /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */ if (pio > 4 && ata_id_is_cfa(id)) return false; /* For PIO3 and higher it is mandatory. */ if (pio > 2) return true; /* Turn it on when possible. */ return ata_id_has_iordy(id); } static inline bool ata_drive_40wire(const u16 *dev_id) { if (ata_id_is_sata(dev_id)) return false; /* SATA */ if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000) return false; /* 80 wire */ return true; } static inline bool ata_drive_40wire_relaxed(const u16 *dev_id) { if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000) return false; /* 80 wire */ return true; } static inline int atapi_cdb_len(const u16 *dev_id) { u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3; switch (tmp) { case 0: return 12; case 1: return 16; default: return -1; } } static inline int atapi_command_packet_set(const u16 *dev_id) { return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f; } static inline bool atapi_id_dmadir(const u16 *dev_id) { return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000); } /* * ata_id_is_lba_capacity_ok() performs a sanity check on * the claimed LBA capacity value for the device. * * Returns 1 if LBA capacity looks sensible, 0 otherwise. * * It is called only once for each device. */ static inline bool ata_id_is_lba_capacity_ok(u16 *id) { unsigned long lba_sects, chs_sects, head, tail; /* No non-LBA info .. so valid! */ if (id[ATA_ID_CYLS] == 0) return true; lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY); /* * The ATA spec tells large drives to return * C/H/S = 16383/16/63 independent of their size. * Some drives can be jumpered to use 15 heads instead of 16. * Some drives can be jumpered to use 4092 cyls instead of 16383. */ if ((id[ATA_ID_CYLS] == 16383 || (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) && id[ATA_ID_SECTORS] == 63 && (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) && (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS])) return true; chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS]; /* perform a rough sanity check on lba_sects: within 10% is OK */ if (lba_sects - chs_sects < chs_sects/10) return true; /* some drives have the word order reversed */ head = (lba_sects >> 16) & 0xffff; tail = lba_sects & 0xffff; lba_sects = head | (tail << 16); if (lba_sects - chs_sects < chs_sects/10) { *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects); return true; /* LBA capacity is (now) good */ } return false; /* LBA capacity value may be bad */ } static inline void ata_id_to_hd_driveid(u16 *id) { #ifdef __BIG_ENDIAN /* accessed in struct hd_driveid as 8-bit values */ id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]); id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]); id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]); id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]); id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]); /* as 32-bit values */ *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY); *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG); /* as 64-bit value */ *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] = ata_id_u64(id, ATA_ID_LBA_CAPACITY_2); #endif } static inline bool ata_ok(u8 status) { return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) == ATA_DRDY); } static inline bool lba_28_ok(u64 block, u32 n_block) { /* check the ending block number: must be LESS THAN 0x0fffffff */ return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS); } static inline bool lba_48_ok(u64 block, u32 n_block) { /* check the ending block number */ return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48); } #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff) #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16) #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff) #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf) #endif /* __LINUX_ATA_H__ */ PK ! ^;�� smscphy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SMSCPHY_H__ #define __LINUX_SMSCPHY_H__ #define MII_LAN83C185_ISF 29 /* Interrupt Source Flags */ #define MII_LAN83C185_IM 30 /* Interrupt Mask */ #define MII_LAN83C185_CTRL_STATUS 17 /* Mode/Status Register */ #define MII_LAN83C185_SPECIAL_MODES 18 /* Special Modes Register */ #define MII_LAN83C185_ISF_INT1 (1<<1) /* Auto-Negotiation Page Received */ #define MII_LAN83C185_ISF_INT2 (1<<2) /* Parallel Detection Fault */ #define MII_LAN83C185_ISF_INT3 (1<<3) /* Auto-Negotiation LP Ack */ #define MII_LAN83C185_ISF_INT4 (1<<4) /* Link Down */ #define MII_LAN83C185_ISF_INT5 (1<<5) /* Remote Fault Detected */ #define MII_LAN83C185_ISF_INT6 (1<<6) /* Auto-Negotiation complete */ #define MII_LAN83C185_ISF_INT7 (1<<7) /* ENERGYON */ #define MII_LAN83C185_ISF_INT_ALL (0x0e) #define MII_LAN83C185_ISF_INT_PHYLIB_EVENTS \ (MII_LAN83C185_ISF_INT6 | MII_LAN83C185_ISF_INT4 | \ MII_LAN83C185_ISF_INT7) #define MII_LAN83C185_EDPWRDOWN (1 << 13) /* EDPWRDOWN */ #define MII_LAN83C185_ENERGYON (1 << 1) /* ENERGYON */ #define MII_LAN83C185_MODE_MASK 0xE0 #define MII_LAN83C185_MODE_POWERDOWN 0xC0 /* Power Down mode */ #define MII_LAN83C185_MODE_ALL 0xE0 /* All capable mode */ #endif /* __LINUX_SMSCPHY_H__ */ PK ! <�"�] �] swap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SWAP_H #define _LINUX_SWAP_H #include <linux/spinlock.h> #include <linux/linkage.h> #include <linux/mmzone.h> #include <linux/list.h> #include <linux/memcontrol.h> #include <linux/sched.h> #include <linux/node.h> #include <linux/fs.h> #include <linux/pagemap.h> #include <linux/atomic.h> #include <linux/page-flags.h> #include <uapi/linux/mempolicy.h> #include <asm/page.h> struct notifier_block; struct bio; struct pagevec; #define SWAP_FLAG_PREFER 0x8000 /* set if swap priority specified */ #define SWAP_FLAG_PRIO_MASK 0x7fff #define SWAP_FLAG_PRIO_SHIFT 0 #define SWAP_FLAG_DISCARD 0x10000 /* enable discard for swap */ #define SWAP_FLAG_DISCARD_ONCE 0x20000 /* discard swap area at swapon-time */ #define SWAP_FLAG_DISCARD_PAGES 0x40000 /* discard page-clusters after use */ #define SWAP_FLAGS_VALID (SWAP_FLAG_PRIO_MASK | SWAP_FLAG_PREFER | \ SWAP_FLAG_DISCARD | SWAP_FLAG_DISCARD_ONCE | \ SWAP_FLAG_DISCARD_PAGES) #define SWAP_BATCH 64 static inline int current_is_kswapd(void) { return current->flags & PF_KSWAPD; } /* * MAX_SWAPFILES defines the maximum number of swaptypes: things which can * be swapped to. The swap type and the offset into that swap type are * encoded into pte's and into pgoff_t's in the swapcache. Using five bits * for the type means that the maximum number of swapcache pages is 27 bits * on 32-bit-pgoff_t architectures. And that assumes that the architecture packs * the type/offset into the pte as 5/27 as well. */ #define MAX_SWAPFILES_SHIFT 5 /* * Use some of the swap files numbers for other purposes. This * is a convenient way to hook into the VM to trigger special * actions on faults. */ /* * Unaddressable device memory support. See include/linux/hmm.h and * Documentation/vm/hmm.rst. Short description is we need struct pages for * device memory that is unaddressable (inaccessible) by CPU, so that we can * migrate part of a process memory to device memory. * * When a page is migrated from CPU to device, we set the CPU page table entry * to a special SWP_DEVICE_{READ|WRITE} entry. * * When a page is mapped by the device for exclusive access we set the CPU page * table entries to special SWP_DEVICE_EXCLUSIVE_* entries. */ #ifdef CONFIG_DEVICE_PRIVATE #define SWP_DEVICE_NUM 4 #define SWP_DEVICE_WRITE (MAX_SWAPFILES+SWP_HWPOISON_NUM+SWP_MIGRATION_NUM) #define SWP_DEVICE_READ (MAX_SWAPFILES+SWP_HWPOISON_NUM+SWP_MIGRATION_NUM+1) #define SWP_DEVICE_EXCLUSIVE_WRITE (MAX_SWAPFILES+SWP_HWPOISON_NUM+SWP_MIGRATION_NUM+2) #define SWP_DEVICE_EXCLUSIVE_READ (MAX_SWAPFILES+SWP_HWPOISON_NUM+SWP_MIGRATION_NUM+3) #else #define SWP_DEVICE_NUM 0 #endif /* * NUMA node memory migration support */ #ifdef CONFIG_MIGRATION #define SWP_MIGRATION_NUM 2 #define SWP_MIGRATION_READ (MAX_SWAPFILES + SWP_HWPOISON_NUM) #define SWP_MIGRATION_WRITE (MAX_SWAPFILES + SWP_HWPOISON_NUM + 1) #else #define SWP_MIGRATION_NUM 0 #endif /* * Handling of hardware poisoned pages with memory corruption. */ #ifdef CONFIG_MEMORY_FAILURE #define SWP_HWPOISON_NUM 1 #define SWP_HWPOISON MAX_SWAPFILES #else #define SWP_HWPOISON_NUM 0 #endif #define MAX_SWAPFILES \ ((1 << MAX_SWAPFILES_SHIFT) - SWP_DEVICE_NUM - \ SWP_MIGRATION_NUM - SWP_HWPOISON_NUM) /* * Magic header for a swap area. The first part of the union is * what the swap magic looks like for the old (limited to 128MB) * swap area format, the second part of the union adds - in the * old reserved area - some extra information. Note that the first * kilobyte is reserved for boot loader or disk label stuff... * * Having the magic at the end of the PAGE_SIZE makes detecting swap * areas somewhat tricky on machines that support multiple page sizes. * For 2.5 we'll probably want to move the magic to just beyond the * bootbits... */ union swap_header { struct { char reserved[PAGE_SIZE - 10]; char magic[10]; /* SWAP-SPACE or SWAPSPACE2 */ } magic; struct { char bootbits[1024]; /* Space for disklabel etc. */ __u32 version; __u32 last_page; __u32 nr_badpages; unsigned char sws_uuid[16]; unsigned char sws_volume[16]; __u32 padding[117]; __u32 badpages[1]; } info; }; /* * current->reclaim_state points to one of these when a task is running * memory reclaim */ struct reclaim_state { unsigned long reclaimed_slab; }; #ifdef __KERNEL__ struct address_space; struct sysinfo; struct writeback_control; struct zone; /* * A swap extent maps a range of a swapfile's PAGE_SIZE pages onto a range of * disk blocks. A list of swap extents maps the entire swapfile. (Where the * term `swapfile' refers to either a blockdevice or an IS_REG file. Apart * from setup, they're handled identically. * * We always assume that blocks are of size PAGE_SIZE. */ struct swap_extent { struct rb_node rb_node; pgoff_t start_page; pgoff_t nr_pages; sector_t start_block; }; /* * Max bad pages in the new format.. */ #define MAX_SWAP_BADPAGES \ ((offsetof(union swap_header, magic.magic) - \ offsetof(union swap_header, info.badpages)) / sizeof(int)) enum { SWP_USED = (1 << 0), /* is slot in swap_info[] used? */ SWP_WRITEOK = (1 << 1), /* ok to write to this swap? */ SWP_DISCARDABLE = (1 << 2), /* blkdev support discard */ SWP_DISCARDING = (1 << 3), /* now discarding a free cluster */ SWP_SOLIDSTATE = (1 << 4), /* blkdev seeks are cheap */ SWP_CONTINUED = (1 << 5), /* swap_map has count continuation */ SWP_BLKDEV = (1 << 6), /* its a block device */ SWP_ACTIVATED = (1 << 7), /* set after swap_activate success */ SWP_FS_OPS = (1 << 8), /* swapfile operations go through fs */ SWP_AREA_DISCARD = (1 << 9), /* single-time swap area discards */ SWP_PAGE_DISCARD = (1 << 10), /* freed swap page-cluster discards */ SWP_STABLE_WRITES = (1 << 11), /* no overwrite PG_writeback pages */ SWP_SYNCHRONOUS_IO = (1 << 12), /* synchronous IO is efficient */ /* add others here before... */ SWP_SCANNING = (1 << 14), /* refcount in scan_swap_map */ }; #define SWAP_CLUSTER_MAX 32UL #define COMPACT_CLUSTER_MAX SWAP_CLUSTER_MAX /* Bit flag in swap_map */ #define SWAP_HAS_CACHE 0x40 /* Flag page is cached, in first swap_map */ #define COUNT_CONTINUED 0x80 /* Flag swap_map continuation for full count */ /* Special value in first swap_map */ #define SWAP_MAP_MAX 0x3e /* Max count */ #define SWAP_MAP_BAD 0x3f /* Note page is bad */ #define SWAP_MAP_SHMEM 0xbf /* Owned by shmem/tmpfs */ /* Special value in each swap_map continuation */ #define SWAP_CONT_MAX 0x7f /* Max count */ /* * We use this to track usage of a cluster. A cluster is a block of swap disk * space with SWAPFILE_CLUSTER pages long and naturally aligns in disk. All * free clusters are organized into a list. We fetch an entry from the list to * get a free cluster. * * The data field stores next cluster if the cluster is free or cluster usage * counter otherwise. The flags field determines if a cluster is free. This is * protected by swap_info_struct.lock. */ struct swap_cluster_info { spinlock_t lock; /* * Protect swap_cluster_info fields * and swap_info_struct->swap_map * elements correspond to the swap * cluster */ unsigned int data:24; unsigned int flags:8; }; #define CLUSTER_FLAG_FREE 1 /* This cluster is free */ #define CLUSTER_FLAG_NEXT_NULL 2 /* This cluster has no next cluster */ #define CLUSTER_FLAG_HUGE 4 /* This cluster is backing a transparent huge page */ /* * We assign a cluster to each CPU, so each CPU can allocate swap entry from * its own cluster and swapout sequentially. The purpose is to optimize swapout * throughput. */ struct percpu_cluster { struct swap_cluster_info index; /* Current cluster index */ unsigned int next; /* Likely next allocation offset */ }; struct swap_cluster_list { struct swap_cluster_info head; struct swap_cluster_info tail; }; /* * The in-memory structure used to track swap areas. */ struct swap_info_struct { struct percpu_ref users; /* indicate and keep swap device valid. */ unsigned long flags; /* SWP_USED etc: see above */ signed short prio; /* swap priority of this type */ struct plist_node list; /* entry in swap_active_head */ signed char type; /* strange name for an index */ unsigned int max; /* extent of the swap_map */ unsigned char *swap_map; /* vmalloc'ed array of usage counts */ struct swap_cluster_info *cluster_info; /* cluster info. Only for SSD */ struct swap_cluster_list free_clusters; /* free clusters list */ unsigned int lowest_bit; /* index of first free in swap_map */ unsigned int highest_bit; /* index of last free in swap_map */ unsigned int pages; /* total of usable pages of swap */ unsigned int inuse_pages; /* number of those currently in use */ unsigned int cluster_next; /* likely index for next allocation */ unsigned int cluster_nr; /* countdown to next cluster search */ unsigned int __percpu *cluster_next_cpu; /*percpu index for next allocation */ struct percpu_cluster __percpu *percpu_cluster; /* per cpu's swap location */ struct rb_root swap_extent_root;/* root of the swap extent rbtree */ struct block_device *bdev; /* swap device or bdev of swap file */ struct file *swap_file; /* seldom referenced */ unsigned int old_block_size; /* seldom referenced */ struct completion comp; /* seldom referenced */ #ifdef CONFIG_FRONTSWAP unsigned long *frontswap_map; /* frontswap in-use, one bit per page */ atomic_t frontswap_pages; /* frontswap pages in-use counter */ #endif spinlock_t lock; /* * protect map scan related fields like * swap_map, lowest_bit, highest_bit, * inuse_pages, cluster_next, * cluster_nr, lowest_alloc, * highest_alloc, free/discard cluster * list. other fields are only changed * at swapon/swapoff, so are protected * by swap_lock. changing flags need * hold this lock and swap_lock. If * both locks need hold, hold swap_lock * first. */ spinlock_t cont_lock; /* * protect swap count continuation page * list. */ struct work_struct discard_work; /* discard worker */ struct swap_cluster_list discard_clusters; /* discard clusters list */ struct plist_node avail_lists[]; /* * entries in swap_avail_heads, one * entry per node. * Must be last as the number of the * array is nr_node_ids, which is not * a fixed value so have to allocate * dynamically. * And it has to be an array so that * plist_for_each_* can work. */ }; #ifdef CONFIG_64BIT #define SWAP_RA_ORDER_CEILING 5 #else /* Avoid stack overflow, because we need to save part of page table */ #define SWAP_RA_ORDER_CEILING 3 #define SWAP_RA_PTE_CACHE_SIZE (1 << SWAP_RA_ORDER_CEILING) #endif struct vma_swap_readahead { unsigned short win; unsigned short offset; unsigned short nr_pte; #ifdef CONFIG_64BIT pte_t *ptes; #else pte_t ptes[SWAP_RA_PTE_CACHE_SIZE]; #endif }; /* linux/mm/workingset.c */ void workingset_age_nonresident(struct lruvec *lruvec, unsigned long nr_pages); void *workingset_eviction(struct page *page, struct mem_cgroup *target_memcg); void workingset_refault(struct page *page, void *shadow); void workingset_activation(struct page *page); /* Only track the nodes of mappings with shadow entries */ void workingset_update_node(struct xa_node *node); #define mapping_set_update(xas, mapping) do { \ if (!dax_mapping(mapping) && !shmem_mapping(mapping)) \ xas_set_update(xas, workingset_update_node); \ } while (0) /* linux/mm/page_alloc.c */ extern unsigned long totalreserve_pages; extern unsigned long nr_free_buffer_pages(void); /* Definition of global_zone_page_state not available yet */ #define nr_free_pages() global_zone_page_state(NR_FREE_PAGES) /* linux/mm/swap.c */ extern void lru_note_cost(struct lruvec *lruvec, bool file, unsigned int nr_pages); extern void lru_note_cost_page(struct page *); extern void lru_cache_add(struct page *); extern void mark_page_accessed(struct page *); extern atomic_t lru_disable_count; static inline bool lru_cache_disabled(void) { return atomic_read(&lru_disable_count); } static inline void lru_cache_enable(void) { atomic_dec(&lru_disable_count); } extern void lru_cache_disable(void); extern void lru_add_drain(void); extern void lru_add_drain_cpu(int cpu); extern void lru_add_drain_cpu_zone(struct zone *zone); extern void lru_add_drain_all(void); extern void rotate_reclaimable_page(struct page *page); extern void deactivate_file_page(struct page *page); extern void deactivate_page(struct page *page); extern void mark_page_lazyfree(struct page *page); extern void swap_setup(void); extern void lru_cache_add_inactive_or_unevictable(struct page *page, struct vm_area_struct *vma); /* linux/mm/vmscan.c */ extern unsigned long zone_reclaimable_pages(struct zone *zone); extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order, gfp_t gfp_mask, nodemask_t *mask); extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *memcg, unsigned long nr_pages, gfp_t gfp_mask, bool may_swap); extern unsigned long mem_cgroup_shrink_node(struct mem_cgroup *mem, gfp_t gfp_mask, bool noswap, pg_data_t *pgdat, unsigned long *nr_scanned); extern unsigned long shrink_all_memory(unsigned long nr_pages); extern int vm_swappiness; extern int remove_mapping(struct address_space *mapping, struct page *page); extern unsigned long reclaim_pages(struct list_head *page_list); #ifdef CONFIG_NUMA extern int node_reclaim_mode; extern int sysctl_min_unmapped_ratio; extern int sysctl_min_slab_ratio; #else #define node_reclaim_mode 0 #endif static inline bool node_reclaim_enabled(void) { /* Is any node_reclaim_mode bit set? */ return node_reclaim_mode & (RECLAIM_ZONE|RECLAIM_WRITE|RECLAIM_UNMAP); } extern void check_move_unevictable_pages(struct pagevec *pvec); extern void kswapd_run(int nid); extern void kswapd_stop(int nid); #ifdef CONFIG_SWAP #include <linux/blk_types.h> /* for bio_end_io_t */ /* linux/mm/page_io.c */ extern int swap_readpage(struct page *page, bool do_poll); extern int swap_writepage(struct page *page, struct writeback_control *wbc); extern void end_swap_bio_write(struct bio *bio); extern int __swap_writepage(struct page *page, struct writeback_control *wbc, bio_end_io_t end_write_func); extern int swap_set_page_dirty(struct page *page); int add_swap_extent(struct swap_info_struct *sis, unsigned long start_page, unsigned long nr_pages, sector_t start_block); int generic_swapfile_activate(struct swap_info_struct *, struct file *, sector_t *); /* linux/mm/swap_state.c */ /* One swap address space for each 64M swap space */ #define SWAP_ADDRESS_SPACE_SHIFT 14 #define SWAP_ADDRESS_SPACE_PAGES (1 << SWAP_ADDRESS_SPACE_SHIFT) extern struct address_space *swapper_spaces[]; #define swap_address_space(entry) \ (&swapper_spaces[swp_type(entry)][swp_offset(entry) \ >> SWAP_ADDRESS_SPACE_SHIFT]) static inline unsigned long total_swapcache_pages(void) { return global_node_page_state(NR_SWAPCACHE); } extern void show_swap_cache_info(void); extern int add_to_swap(struct page *page); extern void *get_shadow_from_swap_cache(swp_entry_t entry); extern int add_to_swap_cache(struct page *page, swp_entry_t entry, gfp_t gfp, void **shadowp); extern void __delete_from_swap_cache(struct page *page, swp_entry_t entry, void *shadow); extern void delete_from_swap_cache(struct page *); extern void clear_shadow_from_swap_cache(int type, unsigned long begin, unsigned long end); extern void free_swap_cache(struct page *); extern void free_page_and_swap_cache(struct page *); extern void free_pages_and_swap_cache(struct page **, int); extern struct page *lookup_swap_cache(swp_entry_t entry, struct vm_area_struct *vma, unsigned long addr); struct page *find_get_incore_page(struct address_space *mapping, pgoff_t index); extern struct page *read_swap_cache_async(swp_entry_t, gfp_t, struct vm_area_struct *vma, unsigned long addr, bool do_poll); extern struct page *__read_swap_cache_async(swp_entry_t, gfp_t, struct vm_area_struct *vma, unsigned long addr, bool *new_page_allocated); extern struct page *swap_cluster_readahead(swp_entry_t entry, gfp_t flag, struct vm_fault *vmf); extern struct page *swapin_readahead(swp_entry_t entry, gfp_t flag, struct vm_fault *vmf); /* linux/mm/swapfile.c */ extern atomic_long_t nr_swap_pages; extern long total_swap_pages; extern atomic_t nr_rotate_swap; extern bool has_usable_swap(void); /* Swap 50% full? Release swapcache more aggressively.. */ static inline bool vm_swap_full(void) { return atomic_long_read(&nr_swap_pages) * 2 < total_swap_pages; } static inline long get_nr_swap_pages(void) { return atomic_long_read(&nr_swap_pages); } extern void si_swapinfo(struct sysinfo *); extern swp_entry_t get_swap_page(struct page *page); extern void put_swap_page(struct page *page, swp_entry_t entry); extern swp_entry_t get_swap_page_of_type(int); extern int get_swap_pages(int n, swp_entry_t swp_entries[], int entry_size); extern int add_swap_count_continuation(swp_entry_t, gfp_t); extern void swap_shmem_alloc(swp_entry_t); extern int swap_duplicate(swp_entry_t); extern int swapcache_prepare(swp_entry_t); extern void swap_free(swp_entry_t); extern void swapcache_free_entries(swp_entry_t *entries, int n); extern int free_swap_and_cache(swp_entry_t); int swap_type_of(dev_t device, sector_t offset); int find_first_swap(dev_t *device); extern unsigned int count_swap_pages(int, int); extern sector_t swapdev_block(int, pgoff_t); extern int page_swapcount(struct page *); extern int __swap_count(swp_entry_t entry); extern int __swp_swapcount(swp_entry_t entry); extern int swp_swapcount(swp_entry_t entry); extern struct swap_info_struct *page_swap_info(struct page *); extern struct swap_info_struct *swp_swap_info(swp_entry_t entry); extern bool reuse_swap_page(struct page *, int *); extern int try_to_free_swap(struct page *); struct backing_dev_info; extern int init_swap_address_space(unsigned int type, unsigned long nr_pages); extern void exit_swap_address_space(unsigned int type); extern struct swap_info_struct *get_swap_device(swp_entry_t entry); sector_t swap_page_sector(struct page *page); static inline void put_swap_device(struct swap_info_struct *si) { percpu_ref_put(&si->users); } #else /* CONFIG_SWAP */ static inline int swap_readpage(struct page *page, bool do_poll) { return 0; } static inline struct swap_info_struct *swp_swap_info(swp_entry_t entry) { return NULL; } static inline struct swap_info_struct *get_swap_device(swp_entry_t entry) { return NULL; } static inline void put_swap_device(struct swap_info_struct *si) { } static inline struct address_space *swap_address_space(swp_entry_t entry) { return NULL; } #define get_nr_swap_pages() 0L #define total_swap_pages 0L #define total_swapcache_pages() 0UL #define vm_swap_full() 0 #define si_swapinfo(val) \ do { (val)->freeswap = (val)->totalswap = 0; } while (0) /* only sparc can not include linux/pagemap.h in this file * so leave put_page and release_pages undeclared... */ #define free_page_and_swap_cache(page) \ put_page(page) #define free_pages_and_swap_cache(pages, nr) \ release_pages((pages), (nr)); static inline void free_swap_cache(struct page *page) { } static inline void show_swap_cache_info(void) { } /* used to sanity check ptes in zap_pte_range when CONFIG_SWAP=0 */ #define free_swap_and_cache(e) is_pfn_swap_entry(e) static inline int add_swap_count_continuation(swp_entry_t swp, gfp_t gfp_mask) { return 0; } static inline void swap_shmem_alloc(swp_entry_t swp) { } static inline int swap_duplicate(swp_entry_t swp) { return 0; } static inline void swap_free(swp_entry_t swp) { } static inline void put_swap_page(struct page *page, swp_entry_t swp) { } static inline struct page *swap_cluster_readahead(swp_entry_t entry, gfp_t gfp_mask, struct vm_fault *vmf) { return NULL; } static inline struct page *swapin_readahead(swp_entry_t swp, gfp_t gfp_mask, struct vm_fault *vmf) { return NULL; } static inline int swap_writepage(struct page *p, struct writeback_control *wbc) { return 0; } static inline struct page *lookup_swap_cache(swp_entry_t swp, struct vm_area_struct *vma, unsigned long addr) { return NULL; } static inline struct page *find_get_incore_page(struct address_space *mapping, pgoff_t index) { return find_get_page(mapping, index); } static inline int add_to_swap(struct page *page) { return 0; } static inline void *get_shadow_from_swap_cache(swp_entry_t entry) { return NULL; } static inline int add_to_swap_cache(struct page *page, swp_entry_t entry, gfp_t gfp_mask, void **shadowp) { return -1; } static inline void __delete_from_swap_cache(struct page *page, swp_entry_t entry, void *shadow) { } static inline void delete_from_swap_cache(struct page *page) { } static inline void clear_shadow_from_swap_cache(int type, unsigned long begin, unsigned long end) { } static inline int page_swapcount(struct page *page) { return 0; } static inline int __swap_count(swp_entry_t entry) { return 0; } static inline int __swp_swapcount(swp_entry_t entry) { return 0; } static inline int swp_swapcount(swp_entry_t entry) { return 0; } #define reuse_swap_page(page, total_map_swapcount) \ (page_trans_huge_mapcount(page, total_map_swapcount) == 1) static inline int try_to_free_swap(struct page *page) { return 0; } static inline swp_entry_t get_swap_page(struct page *page) { swp_entry_t entry; entry.val = 0; return entry; } #endif /* CONFIG_SWAP */ #ifdef CONFIG_THP_SWAP extern int split_swap_cluster(swp_entry_t entry); #else static inline int split_swap_cluster(swp_entry_t entry) { return 0; } #endif #ifdef CONFIG_MEMCG static inline int mem_cgroup_swappiness(struct mem_cgroup *memcg) { /* Cgroup2 doesn't have per-cgroup swappiness */ if (cgroup_subsys_on_dfl(memory_cgrp_subsys)) return vm_swappiness; /* root ? */ if (mem_cgroup_disabled() || mem_cgroup_is_root(memcg)) return vm_swappiness; return memcg->swappiness; } #else static inline int mem_cgroup_swappiness(struct mem_cgroup *mem) { return vm_swappiness; } #endif #if defined(CONFIG_SWAP) && defined(CONFIG_MEMCG) && defined(CONFIG_BLK_CGROUP) extern void __cgroup_throttle_swaprate(struct page *page, gfp_t gfp_mask); static inline void cgroup_throttle_swaprate(struct page *page, gfp_t gfp_mask) { if (mem_cgroup_disabled()) return; __cgroup_throttle_swaprate(page, gfp_mask); } #else static inline void cgroup_throttle_swaprate(struct page *page, gfp_t gfp_mask) { } #endif #ifdef CONFIG_MEMCG_SWAP extern void mem_cgroup_swapout(struct page *page, swp_entry_t entry); extern int __mem_cgroup_try_charge_swap(struct page *page, swp_entry_t entry); static inline int mem_cgroup_try_charge_swap(struct page *page, swp_entry_t entry) { if (mem_cgroup_disabled()) return 0; return __mem_cgroup_try_charge_swap(page, entry); } extern void __mem_cgroup_uncharge_swap(swp_entry_t entry, unsigned int nr_pages); static inline void mem_cgroup_uncharge_swap(swp_entry_t entry, unsigned int nr_pages) { if (mem_cgroup_disabled()) return; __mem_cgroup_uncharge_swap(entry, nr_pages); } extern long mem_cgroup_get_nr_swap_pages(struct mem_cgroup *memcg); extern bool mem_cgroup_swap_full(struct page *page); #else static inline void mem_cgroup_swapout(struct page *page, swp_entry_t entry) { } static inline int mem_cgroup_try_charge_swap(struct page *page, swp_entry_t entry) { return 0; } static inline void mem_cgroup_uncharge_swap(swp_entry_t entry, unsigned int nr_pages) { } static inline long mem_cgroup_get_nr_swap_pages(struct mem_cgroup *memcg) { return get_nr_swap_pages(); } static inline bool mem_cgroup_swap_full(struct page *page) { return vm_swap_full(); } #endif #endif /* __KERNEL__*/ #endif /* _LINUX_SWAP_H */ PK ! �E�� � vbox_utils.hnu �[��� /* SPDX-License-Identifier: (GPL-2.0 OR CDDL-1.0) */ /* Copyright (C) 2006-2016 Oracle Corporation */ #ifndef __VBOX_UTILS_H__ #define __VBOX_UTILS_H__ #include <linux/printk.h> #include <linux/vbox_vmmdev_types.h> struct vbg_dev; /** * vboxguest logging functions, these log both to the backdoor and call * the equivalent kernel pr_foo function. */ __printf(1, 2) void vbg_info(const char *fmt, ...); __printf(1, 2) void vbg_warn(const char *fmt, ...); __printf(1, 2) void vbg_err(const char *fmt, ...); __printf(1, 2) void vbg_err_ratelimited(const char *fmt, ...); /* Only use backdoor logging for non-dynamic debug builds */ #if defined(DEBUG) && !defined(CONFIG_DYNAMIC_DEBUG) __printf(1, 2) void vbg_debug(const char *fmt, ...); #else #define vbg_debug pr_debug #endif int vbg_hgcm_connect(struct vbg_dev *gdev, u32 requestor, struct vmmdev_hgcm_service_location *loc, u32 *client_id, int *vbox_status); int vbg_hgcm_disconnect(struct vbg_dev *gdev, u32 requestor, u32 client_id, int *vbox_status); int vbg_hgcm_call(struct vbg_dev *gdev, u32 requestor, u32 client_id, u32 function, u32 timeout_ms, struct vmmdev_hgcm_function_parameter *parms, u32 parm_count, int *vbox_status); /** * Convert a VirtualBox status code to a standard Linux kernel return value. * Return: 0 or negative errno value. * @rc: VirtualBox status code to convert. */ int vbg_status_code_to_errno(int rc); /** * Helper for the vboxsf driver to get a reference to the guest device. * Return: a pointer to the gdev; or a ERR_PTR value on error. */ struct vbg_dev *vbg_get_gdev(void); /** * Helper for the vboxsf driver to put a guest device reference. * @gdev: Reference returned by vbg_get_gdev to put. */ void vbg_put_gdev(struct vbg_dev *gdev); #endif PK ! �?� � lockd/xdr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/xdr.h * * XDR types for the NLM protocol * * Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef LOCKD_XDR_H #define LOCKD_XDR_H #include <linux/fs.h> #include <linux/nfs.h> #include <linux/sunrpc/xdr.h> #define SM_MAXSTRLEN 1024 #define SM_PRIV_SIZE 16 struct nsm_private { unsigned char data[SM_PRIV_SIZE]; }; struct svc_rqst; #define NLM_MAXCOOKIELEN 32 #define NLM_MAXSTRLEN 1024 #define nlm_granted cpu_to_be32(NLM_LCK_GRANTED) #define nlm_lck_denied cpu_to_be32(NLM_LCK_DENIED) #define nlm_lck_denied_nolocks cpu_to_be32(NLM_LCK_DENIED_NOLOCKS) #define nlm_lck_blocked cpu_to_be32(NLM_LCK_BLOCKED) #define nlm_lck_denied_grace_period cpu_to_be32(NLM_LCK_DENIED_GRACE_PERIOD) #define nlm_drop_reply cpu_to_be32(30000) /* Lock info passed via NLM */ struct nlm_lock { char * caller; unsigned int len; /* length of "caller" */ struct nfs_fh fh; struct xdr_netobj oh; u32 svid; u64 lock_start; u64 lock_len; struct file_lock fl; }; /* * NLM cookies. Technically they can be 1K, but Linux only uses 8 bytes. * FreeBSD uses 16, Apple Mac OS X 10.3 uses 20. Therefore we set it to * 32 bytes. */ struct nlm_cookie { unsigned char data[NLM_MAXCOOKIELEN]; unsigned int len; }; /* * Generic lockd arguments for all but sm_notify */ struct nlm_args { struct nlm_cookie cookie; struct nlm_lock lock; u32 block; u32 reclaim; u32 state; u32 monitor; u32 fsm_access; u32 fsm_mode; }; typedef struct nlm_args nlm_args; /* * Generic lockd result */ struct nlm_res { struct nlm_cookie cookie; __be32 status; struct nlm_lock lock; }; /* * statd callback when client has rebooted */ struct nlm_reboot { char *mon; unsigned int len; u32 state; struct nsm_private priv; }; /* * Contents of statd callback when monitored host rebooted */ #define NLMSVC_XDRSIZE sizeof(struct nlm_args) bool nlmsvc_decode_void(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_testargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_lockargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_cancargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_unlockargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_res(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_reboot(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_shareargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_decode_notify(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_encode_testres(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_encode_res(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_encode_void(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlmsvc_encode_shareres(struct svc_rqst *rqstp, struct xdr_stream *xdr); #endif /* LOCKD_XDR_H */ PK ! �)� � lockd/bind.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/bind.h * * This is the part of lockd visible to nfsd and the nfs client. * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef LINUX_LOCKD_BIND_H #define LINUX_LOCKD_BIND_H #include <linux/lockd/nlm.h> /* need xdr-encoded error codes too, so... */ #include <linux/lockd/xdr.h> #ifdef CONFIG_LOCKD_V4 #include <linux/lockd/xdr4.h> #endif /* Dummy declarations */ struct svc_rqst; struct rpc_task; /* * This is the set of functions for lockd->nfsd communication */ struct nlmsvc_binding { __be32 (*fopen)(struct svc_rqst *, struct nfs_fh *, struct file **, int mode); void (*fclose)(struct file *); }; extern const struct nlmsvc_binding *nlmsvc_ops; /* * Similar to nfs_client_initdata, but without the NFS-specific * rpc_ops field. */ struct nlmclnt_initdata { const char *hostname; const struct sockaddr *address; size_t addrlen; unsigned short protocol; u32 nfs_version; int noresvport; struct net *net; const struct nlmclnt_operations *nlmclnt_ops; const struct cred *cred; }; /* * Functions exported by the lockd module */ extern struct nlm_host *nlmclnt_init(const struct nlmclnt_initdata *nlm_init); extern void nlmclnt_done(struct nlm_host *host); /* * NLM client operations provide a means to modify RPC processing of NLM * requests. Callbacks receive a pointer to data passed into the call to * nlmclnt_proc(). */ struct nlmclnt_operations { /* Called on successful allocation of nlm_rqst, use for allocation or * reference counting. */ void (*nlmclnt_alloc_call)(void *); /* Called in rpc_task_prepare for unlock. A return value of true * indicates the callback has put the task to sleep on a waitqueue * and NLM should not call rpc_call_start(). */ bool (*nlmclnt_unlock_prepare)(struct rpc_task*, void *); /* Called when the nlm_rqst is freed, callbacks should clean up here */ void (*nlmclnt_release_call)(void *); }; extern int nlmclnt_proc(struct nlm_host *host, int cmd, struct file_lock *fl, void *data); extern int lockd_up(struct net *net, const struct cred *cred); extern void lockd_down(struct net *net); #endif /* LINUX_LOCKD_BIND_H */ PK ! �*�"/ "/ lockd/lockd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/lockd.h * * General-purpose lockd include file. * * Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef LINUX_LOCKD_LOCKD_H #define LINUX_LOCKD_LOCKD_H /* XXX: a lot of this should really be under fs/lockd. */ #include <linux/in.h> #include <linux/in6.h> #include <net/ipv6.h> #include <linux/fs.h> #include <linux/kref.h> #include <linux/refcount.h> #include <linux/utsname.h> #include <linux/lockd/bind.h> #include <linux/lockd/xdr.h> #ifdef CONFIG_LOCKD_V4 #include <linux/lockd/xdr4.h> #endif #include <linux/lockd/debug.h> #include <linux/sunrpc/svc.h> /* * Version string */ #define LOCKD_VERSION "0.5" /* * Default timeout for RPC calls (seconds) */ #define LOCKD_DFLT_TIMEO 10 /* * Lockd host handle (used both by the client and server personality). */ struct nlm_host { struct hlist_node h_hash; /* doubly linked list */ struct sockaddr_storage h_addr; /* peer address */ size_t h_addrlen; struct sockaddr_storage h_srcaddr; /* our address (optional) */ size_t h_srcaddrlen; struct rpc_clnt *h_rpcclnt; /* RPC client to talk to peer */ char *h_name; /* remote hostname */ u32 h_version; /* interface version */ unsigned short h_proto; /* transport proto */ unsigned short h_reclaiming : 1, h_server : 1, /* server side, not client side */ h_noresvport : 1, h_inuse : 1; wait_queue_head_t h_gracewait; /* wait while reclaiming */ struct rw_semaphore h_rwsem; /* Reboot recovery lock */ u32 h_state; /* pseudo-state counter */ u32 h_nsmstate; /* true remote NSM state */ u32 h_pidcount; /* Pseudopids */ refcount_t h_count; /* reference count */ struct mutex h_mutex; /* mutex for pmap binding */ unsigned long h_nextrebind; /* next portmap call */ unsigned long h_expires; /* eligible for GC */ struct list_head h_lockowners; /* Lockowners for the client */ spinlock_t h_lock; struct list_head h_granted; /* Locks in GRANTED state */ struct list_head h_reclaim; /* Locks in RECLAIM state */ struct nsm_handle *h_nsmhandle; /* NSM status handle */ char *h_addrbuf; /* address eyecatcher */ struct net *net; /* host net */ const struct cred *h_cred; char nodename[UNX_MAXNODENAME + 1]; const struct nlmclnt_operations *h_nlmclnt_ops; /* Callback ops for NLM users */ }; /* * The largest string sm_addrbuf should hold is a full-size IPv6 address * (no "::" anywhere) with a scope ID. The buffer size is computed to * hold eight groups of colon-separated four-hex-digit numbers, a * percent sign, a scope id (at most 32 bits, in decimal), and NUL. */ #define NSM_ADDRBUF ((8 * 4 + 7) + (1 + 10) + 1) struct nsm_handle { struct list_head sm_link; refcount_t sm_count; char *sm_mon_name; char *sm_name; struct sockaddr_storage sm_addr; size_t sm_addrlen; unsigned int sm_monitored : 1, sm_sticky : 1; /* don't unmonitor */ struct nsm_private sm_priv; char sm_addrbuf[NSM_ADDRBUF]; }; /* * Rigorous type checking on sockaddr type conversions */ static inline struct sockaddr_in *nlm_addr_in(const struct nlm_host *host) { return (struct sockaddr_in *)&host->h_addr; } static inline struct sockaddr *nlm_addr(const struct nlm_host *host) { return (struct sockaddr *)&host->h_addr; } static inline struct sockaddr_in *nlm_srcaddr_in(const struct nlm_host *host) { return (struct sockaddr_in *)&host->h_srcaddr; } static inline struct sockaddr *nlm_srcaddr(const struct nlm_host *host) { return (struct sockaddr *)&host->h_srcaddr; } /* * Map an fl_owner_t into a unique 32-bit "pid" */ struct nlm_lockowner { struct list_head list; refcount_t count; struct nlm_host *host; fl_owner_t owner; uint32_t pid; }; struct nlm_wait; /* * Memory chunk for NLM client RPC request. */ #define NLMCLNT_OHSIZE ((__NEW_UTS_LEN) + 10u) struct nlm_rqst { refcount_t a_count; unsigned int a_flags; /* initial RPC task flags */ struct nlm_host * a_host; /* host handle */ struct nlm_args a_args; /* arguments */ struct nlm_res a_res; /* result */ struct nlm_block * a_block; unsigned int a_retries; /* Retry count */ u8 a_owner[NLMCLNT_OHSIZE]; void * a_callback_data; /* sent to nlmclnt_operations callbacks */ }; /* * This struct describes a file held open by lockd on behalf of * an NFS client. */ struct nlm_file { struct hlist_node f_list; /* linked list */ struct nfs_fh f_handle; /* NFS file handle */ struct file * f_file[2]; /* VFS file pointers, indexed by O_ flags */ struct nlm_share * f_shares; /* DOS shares */ struct list_head f_blocks; /* blocked locks */ unsigned int f_locks; /* guesstimate # of locks */ unsigned int f_count; /* reference count */ struct mutex f_mutex; /* avoid concurrent access */ }; /* * This is a server block (i.e. a lock requested by some client which * couldn't be granted because of a conflicting lock). */ #define NLM_NEVER (~(unsigned long) 0) /* timeout on non-blocking call: */ #define NLM_TIMEOUT (7 * HZ) struct nlm_block { struct kref b_count; /* Reference count */ struct list_head b_list; /* linked list of all blocks */ struct list_head b_flist; /* linked list (per file) */ struct nlm_rqst * b_call; /* RPC args & callback info */ struct svc_serv * b_daemon; /* NLM service */ struct nlm_host * b_host; /* host handle for RPC clnt */ unsigned long b_when; /* next re-xmit */ unsigned int b_id; /* block id */ unsigned char b_granted; /* VFS granted lock */ struct nlm_file * b_file; /* file in question */ struct cache_req * b_cache_req; /* deferred request handling */ struct cache_deferred_req * b_deferred_req; unsigned int b_flags; /* block flags */ #define B_QUEUED 1 /* lock queued */ #define B_GOT_CALLBACK 2 /* got lock or conflicting lock */ #define B_TIMED_OUT 4 /* filesystem too slow to respond */ }; /* * Global variables */ extern const struct rpc_program nlm_program; extern const struct svc_procedure nlmsvc_procedures[]; #ifdef CONFIG_LOCKD_V4 extern const struct svc_procedure nlmsvc_procedures4[]; #endif extern int nlmsvc_grace_period; extern unsigned long nlmsvc_timeout; extern bool nsm_use_hostnames; extern u32 nsm_local_state; /* * Lockd client functions */ struct nlm_rqst * nlm_alloc_call(struct nlm_host *host); int nlm_async_call(struct nlm_rqst *, u32, const struct rpc_call_ops *); int nlm_async_reply(struct nlm_rqst *, u32, const struct rpc_call_ops *); void nlmclnt_release_call(struct nlm_rqst *); struct nlm_wait * nlmclnt_prepare_block(struct nlm_host *host, struct file_lock *fl); void nlmclnt_finish_block(struct nlm_wait *block); int nlmclnt_block(struct nlm_wait *block, struct nlm_rqst *req, long timeout); __be32 nlmclnt_grant(const struct sockaddr *addr, const struct nlm_lock *lock); void nlmclnt_recovery(struct nlm_host *); int nlmclnt_reclaim(struct nlm_host *, struct file_lock *, struct nlm_rqst *); void nlmclnt_next_cookie(struct nlm_cookie *); /* * Host cache */ struct nlm_host *nlmclnt_lookup_host(const struct sockaddr *sap, const size_t salen, const unsigned short protocol, const u32 version, const char *hostname, int noresvport, struct net *net, const struct cred *cred); void nlmclnt_release_host(struct nlm_host *); struct nlm_host *nlmsvc_lookup_host(const struct svc_rqst *rqstp, const char *hostname, const size_t hostname_len); void nlmsvc_release_host(struct nlm_host *); struct rpc_clnt * nlm_bind_host(struct nlm_host *); void nlm_rebind_host(struct nlm_host *); struct nlm_host * nlm_get_host(struct nlm_host *); void nlm_shutdown_hosts(void); void nlm_shutdown_hosts_net(struct net *net); void nlm_host_rebooted(const struct net *net, const struct nlm_reboot *); /* * Host monitoring */ int nsm_monitor(const struct nlm_host *host); void nsm_unmonitor(const struct nlm_host *host); struct nsm_handle *nsm_get_handle(const struct net *net, const struct sockaddr *sap, const size_t salen, const char *hostname, const size_t hostname_len); struct nsm_handle *nsm_reboot_lookup(const struct net *net, const struct nlm_reboot *info); void nsm_release(struct nsm_handle *nsm); /* * This is used in garbage collection and resource reclaim * A return value != 0 means destroy the lock/block/share */ typedef int (*nlm_host_match_fn_t)(void *cur, struct nlm_host *ref); /* * Server-side lock handling */ int lock_to_openmode(struct file_lock *); __be32 nlmsvc_lock(struct svc_rqst *, struct nlm_file *, struct nlm_host *, struct nlm_lock *, int, struct nlm_cookie *, int); __be32 nlmsvc_unlock(struct net *net, struct nlm_file *, struct nlm_lock *); __be32 nlmsvc_testlock(struct svc_rqst *, struct nlm_file *, struct nlm_host *, struct nlm_lock *, struct nlm_lock *, struct nlm_cookie *); __be32 nlmsvc_cancel_blocked(struct net *net, struct nlm_file *, struct nlm_lock *); unsigned long nlmsvc_retry_blocked(void); void nlmsvc_traverse_blocks(struct nlm_host *, struct nlm_file *, nlm_host_match_fn_t match); void nlmsvc_grant_reply(struct nlm_cookie *, __be32); void nlmsvc_release_call(struct nlm_rqst *); void nlmsvc_locks_init_private(struct file_lock *, struct nlm_host *, pid_t); /* * File handling for the server personality */ __be32 nlm_lookup_file(struct svc_rqst *, struct nlm_file **, struct nlm_lock *); void nlm_release_file(struct nlm_file *); void nlmsvc_put_lockowner(struct nlm_lockowner *); void nlmsvc_release_lockowner(struct nlm_lock *); void nlmsvc_mark_resources(struct net *); void nlmsvc_free_host_resources(struct nlm_host *); void nlmsvc_invalidate_all(void); /* * Cluster failover support */ int nlmsvc_unlock_all_by_sb(struct super_block *sb); int nlmsvc_unlock_all_by_ip(struct sockaddr *server_addr); static inline struct file *nlmsvc_file_file(struct nlm_file *file) { return file->f_file[O_RDONLY] ? file->f_file[O_RDONLY] : file->f_file[O_WRONLY]; } static inline struct inode *nlmsvc_file_inode(struct nlm_file *file) { return locks_inode(nlmsvc_file_file(file)); } static inline int __nlm_privileged_request4(const struct sockaddr *sap) { const struct sockaddr_in *sin = (struct sockaddr_in *)sap; if (ntohs(sin->sin_port) > 1023) return 0; return ipv4_is_loopback(sin->sin_addr.s_addr); } #if IS_ENABLED(CONFIG_IPV6) static inline int __nlm_privileged_request6(const struct sockaddr *sap) { const struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)sap; if (ntohs(sin6->sin6_port) > 1023) return 0; if (ipv6_addr_type(&sin6->sin6_addr) & IPV6_ADDR_MAPPED) return ipv4_is_loopback(sin6->sin6_addr.s6_addr32[3]); return ipv6_addr_type(&sin6->sin6_addr) & IPV6_ADDR_LOOPBACK; } #else /* IS_ENABLED(CONFIG_IPV6) */ static inline int __nlm_privileged_request6(const struct sockaddr *sap) { return 0; } #endif /* IS_ENABLED(CONFIG_IPV6) */ /* * Ensure incoming requests are from local privileged callers. * * Return TRUE if sender is local and is connecting via a privileged port; * otherwise return FALSE. */ static inline int nlm_privileged_requester(const struct svc_rqst *rqstp) { const struct sockaddr *sap = svc_addr(rqstp); switch (sap->sa_family) { case AF_INET: return __nlm_privileged_request4(sap); case AF_INET6: return __nlm_privileged_request6(sap); default: return 0; } } /* * Compare two NLM locks. * When the second lock is of type F_UNLCK, this acts like a wildcard. */ static inline int nlm_compare_locks(const struct file_lock *fl1, const struct file_lock *fl2) { return locks_inode(fl1->fl_file) == locks_inode(fl2->fl_file) && fl1->fl_pid == fl2->fl_pid && fl1->fl_owner == fl2->fl_owner && fl1->fl_start == fl2->fl_start && fl1->fl_end == fl2->fl_end &&(fl1->fl_type == fl2->fl_type || fl2->fl_type == F_UNLCK); } extern const struct lock_manager_operations nlmsvc_lock_operations; #endif /* LINUX_LOCKD_LOCKD_H */ PK ! %���; ; lockd/debug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/debug.h * * Debugging stuff. * * Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef LINUX_LOCKD_DEBUG_H #define LINUX_LOCKD_DEBUG_H #include <linux/sunrpc/debug.h> /* * Enable lockd debugging. * Requires RPC_DEBUG. */ #undef ifdebug #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) # define ifdebug(flag) if (unlikely(nlm_debug & NLMDBG_##flag)) #else # define ifdebug(flag) if (0) #endif /* * Debug flags */ #define NLMDBG_SVC 0x0001 #define NLMDBG_CLIENT 0x0002 #define NLMDBG_CLNTLOCK 0x0004 #define NLMDBG_SVCLOCK 0x0008 #define NLMDBG_MONITOR 0x0010 #define NLMDBG_CLNTSUBS 0x0020 #define NLMDBG_SVCSUBS 0x0040 #define NLMDBG_HOSTCACHE 0x0080 #define NLMDBG_XDR 0x0100 #define NLMDBG_ALL 0x7fff #endif /* LINUX_LOCKD_DEBUG_H */ PK ! ���n n lockd/share.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/share.h * * DOS share management for lockd. * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef LINUX_LOCKD_SHARE_H #define LINUX_LOCKD_SHARE_H /* * DOS share for a specific file */ struct nlm_share { struct nlm_share * s_next; /* linked list */ struct nlm_host * s_host; /* client host */ struct nlm_file * s_file; /* shared file */ struct xdr_netobj s_owner; /* owner handle */ u32 s_access; /* access mode */ u32 s_mode; /* deny mode */ }; __be32 nlmsvc_share_file(struct nlm_host *, struct nlm_file *, struct nlm_args *); __be32 nlmsvc_unshare_file(struct nlm_host *, struct nlm_file *, struct nlm_args *); void nlmsvc_traverse_shares(struct nlm_host *, struct nlm_file *, nlm_host_match_fn_t); #endif /* LINUX_LOCKD_SHARE_H */ PK ! Y$ � � lockd/xdr4.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/xdr4.h * * XDR types for the NLM protocol * * Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef LOCKD_XDR4_H #define LOCKD_XDR4_H #include <linux/fs.h> #include <linux/nfs.h> #include <linux/sunrpc/xdr.h> #include <linux/lockd/xdr.h> /* error codes new to NLMv4 */ #define nlm4_deadlock cpu_to_be32(NLM_DEADLCK) #define nlm4_rofs cpu_to_be32(NLM_ROFS) #define nlm4_stale_fh cpu_to_be32(NLM_STALE_FH) #define nlm4_fbig cpu_to_be32(NLM_FBIG) #define nlm4_failed cpu_to_be32(NLM_FAILED) void nlm4svc_set_file_lock_range(struct file_lock *fl, u64 off, u64 len); bool nlm4svc_decode_void(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_testargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_lockargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_cancargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_unlockargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_res(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_reboot(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_shareargs(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_decode_notify(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_encode_testres(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_encode_res(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_encode_void(struct svc_rqst *rqstp, struct xdr_stream *xdr); bool nlm4svc_encode_shareres(struct svc_rqst *rqstp, struct xdr_stream *xdr); extern const struct rpc_version nlm_version4; #endif /* LOCKD_XDR4_H */ PK ! ��� J J lockd/nlm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/lockd/nlm.h * * Declarations for the Network Lock Manager protocol. * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef LINUX_LOCKD_NLM_H #define LINUX_LOCKD_NLM_H /* Maximum file offset in file_lock.fl_end */ # define NLM_OFFSET_MAX ((s32) 0x7fffffff) # define NLM4_OFFSET_MAX ((s64) ((~(u64)0) >> 1)) /* Return states for NLM */ enum { NLM_LCK_GRANTED = 0, NLM_LCK_DENIED = 1, NLM_LCK_DENIED_NOLOCKS = 2, NLM_LCK_BLOCKED = 3, NLM_LCK_DENIED_GRACE_PERIOD = 4, #ifdef CONFIG_LOCKD_V4 NLM_DEADLCK = 5, NLM_ROFS = 6, NLM_STALE_FH = 7, NLM_FBIG = 8, NLM_FAILED = 9, #endif }; #define NLM_PROGRAM 100021 #define NLMPROC_NULL 0 #define NLMPROC_TEST 1 #define NLMPROC_LOCK 2 #define NLMPROC_CANCEL 3 #define NLMPROC_UNLOCK 4 #define NLMPROC_GRANTED 5 #define NLMPROC_TEST_MSG 6 #define NLMPROC_LOCK_MSG 7 #define NLMPROC_CANCEL_MSG 8 #define NLMPROC_UNLOCK_MSG 9 #define NLMPROC_GRANTED_MSG 10 #define NLMPROC_TEST_RES 11 #define NLMPROC_LOCK_RES 12 #define NLMPROC_CANCEL_RES 13 #define NLMPROC_UNLOCK_RES 14 #define NLMPROC_GRANTED_RES 15 #define NLMPROC_NSM_NOTIFY 16 /* statd callback */ #define NLMPROC_SHARE 20 #define NLMPROC_UNSHARE 21 #define NLMPROC_NM_LOCK 22 #define NLMPROC_FREE_ALL 23 #endif /* LINUX_LOCKD_NLM_H */ PK ! �5�LE E mii_timestamper.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Support for generic time stamping devices on MII buses. * Copyright (C) 2018 Richard Cochran <richardcochran@gmail.com> */ #ifndef _LINUX_MII_TIMESTAMPER_H #define _LINUX_MII_TIMESTAMPER_H #include <linux/device.h> #include <linux/ethtool.h> #include <linux/skbuff.h> struct phy_device; /** * struct mii_timestamper - Callback interface to MII time stamping devices. * * @rxtstamp: Requests a Rx timestamp for 'skb'. If the skb is accepted, * the MII time stamping device promises to deliver it using * netif_rx() as soon as a timestamp becomes available. One of * the PTP_CLASS_ values is passed in 'type'. The function * must return true if the skb is accepted for delivery. * * @txtstamp: Requests a Tx timestamp for 'skb'. The MII time stamping * device promises to deliver it using skb_complete_tx_timestamp() * as soon as a timestamp becomes available. One of the PTP_CLASS_ * values is passed in 'type'. * * @hwtstamp: Handles SIOCSHWTSTAMP ioctl for hardware time stamping. * * @link_state: Allows the device to respond to changes in the link * state. The caller invokes this function while holding * the phy_device mutex. * * @ts_info: Handles ethtool queries for hardware time stamping. * @device: Remembers the device to which the instance belongs. * * Drivers for PHY time stamping devices should embed their * mii_timestamper within a private structure, obtaining a reference * to it using container_of(). * * Drivers for non-PHY time stamping devices should return a pointer * to a mii_timestamper from the probe_channel() callback of their * mii_timestamping_ctrl interface. */ struct mii_timestamper { bool (*rxtstamp)(struct mii_timestamper *mii_ts, struct sk_buff *skb, int type); void (*txtstamp)(struct mii_timestamper *mii_ts, struct sk_buff *skb, int type); int (*hwtstamp)(struct mii_timestamper *mii_ts, struct ifreq *ifreq); void (*link_state)(struct mii_timestamper *mii_ts, struct phy_device *phydev); int (*ts_info)(struct mii_timestamper *mii_ts, struct ethtool_ts_info *ts_info); struct device *device; }; /** * struct mii_timestamping_ctrl - MII time stamping controller interface. * * @probe_channel: Callback into the controller driver announcing the * presence of the 'port' channel. The 'device' field * had been passed to register_mii_tstamp_controller(). * The driver must return either a pointer to a valid * MII timestamper instance or PTR_ERR. * * @release_channel: Releases an instance obtained via .probe_channel. */ struct mii_timestamping_ctrl { struct mii_timestamper *(*probe_channel)(struct device *device, unsigned int port); void (*release_channel)(struct device *device, struct mii_timestamper *mii_ts); }; #ifdef CONFIG_NETWORK_PHY_TIMESTAMPING int register_mii_tstamp_controller(struct device *device, struct mii_timestamping_ctrl *ctrl); void unregister_mii_tstamp_controller(struct device *device); struct mii_timestamper *register_mii_timestamper(struct device_node *node, unsigned int port); void unregister_mii_timestamper(struct mii_timestamper *mii_ts); #else static inline int register_mii_tstamp_controller(struct device *device, struct mii_timestamping_ctrl *ctrl) { return -EOPNOTSUPP; } static inline void unregister_mii_tstamp_controller(struct device *device) { } static inline struct mii_timestamper *register_mii_timestamper(struct device_node *node, unsigned int port) { return NULL; } static inline void unregister_mii_timestamper(struct mii_timestamper *mii_ts) { } #endif #endif PK ! 1�ԭ` ` notifier.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Routines to manage notifier chains for passing status changes to any * interested routines. We need this instead of hard coded call lists so * that modules can poke their nose into the innards. The network devices * needed them so here they are for the rest of you. * * Alan Cox <Alan.Cox@linux.org> */ #ifndef _LINUX_NOTIFIER_H #define _LINUX_NOTIFIER_H #include <linux/errno.h> #include <linux/mutex.h> #include <linux/rwsem.h> #include <linux/srcu.h> /* * Notifier chains are of four types: * * Atomic notifier chains: Chain callbacks run in interrupt/atomic * context. Callouts are not allowed to block. * Blocking notifier chains: Chain callbacks run in process context. * Callouts are allowed to block. * Raw notifier chains: There are no restrictions on callbacks, * registration, or unregistration. All locking and protection * must be provided by the caller. * SRCU notifier chains: A variant of blocking notifier chains, with * the same restrictions. * * atomic_notifier_chain_register() may be called from an atomic context, * but blocking_notifier_chain_register() and srcu_notifier_chain_register() * must be called from a process context. Ditto for the corresponding * _unregister() routines. * * atomic_notifier_chain_unregister(), blocking_notifier_chain_unregister(), * and srcu_notifier_chain_unregister() _must not_ be called from within * the call chain. * * SRCU notifier chains are an alternative form of blocking notifier chains. * They use SRCU (Sleepable Read-Copy Update) instead of rw-semaphores for * protection of the chain links. This means there is _very_ low overhead * in srcu_notifier_call_chain(): no cache bounces and no memory barriers. * As compensation, srcu_notifier_chain_unregister() is rather expensive. * SRCU notifier chains should be used when the chain will be called very * often but notifier_blocks will seldom be removed. */ struct notifier_block; typedef int (*notifier_fn_t)(struct notifier_block *nb, unsigned long action, void *data); struct notifier_block { notifier_fn_t notifier_call; struct notifier_block __rcu *next; int priority; }; struct atomic_notifier_head { spinlock_t lock; struct notifier_block __rcu *head; }; struct blocking_notifier_head { struct rw_semaphore rwsem; struct notifier_block __rcu *head; }; struct raw_notifier_head { struct notifier_block __rcu *head; }; struct srcu_notifier_head { struct mutex mutex; struct srcu_struct srcu; struct notifier_block __rcu *head; }; #define ATOMIC_INIT_NOTIFIER_HEAD(name) do { \ spin_lock_init(&(name)->lock); \ (name)->head = NULL; \ } while (0) #define BLOCKING_INIT_NOTIFIER_HEAD(name) do { \ init_rwsem(&(name)->rwsem); \ (name)->head = NULL; \ } while (0) #define RAW_INIT_NOTIFIER_HEAD(name) do { \ (name)->head = NULL; \ } while (0) /* srcu_notifier_heads must be cleaned up dynamically */ extern void srcu_init_notifier_head(struct srcu_notifier_head *nh); #define srcu_cleanup_notifier_head(name) \ cleanup_srcu_struct(&(name)->srcu); #define ATOMIC_NOTIFIER_INIT(name) { \ .lock = __SPIN_LOCK_UNLOCKED(name.lock), \ .head = NULL } #define BLOCKING_NOTIFIER_INIT(name) { \ .rwsem = __RWSEM_INITIALIZER((name).rwsem), \ .head = NULL } #define RAW_NOTIFIER_INIT(name) { \ .head = NULL } #define SRCU_NOTIFIER_INIT(name, pcpu) \ { \ .mutex = __MUTEX_INITIALIZER(name.mutex), \ .head = NULL, \ .srcu = __SRCU_STRUCT_INIT(name.srcu, pcpu), \ } #define ATOMIC_NOTIFIER_HEAD(name) \ struct atomic_notifier_head name = \ ATOMIC_NOTIFIER_INIT(name) #define BLOCKING_NOTIFIER_HEAD(name) \ struct blocking_notifier_head name = \ BLOCKING_NOTIFIER_INIT(name) #define RAW_NOTIFIER_HEAD(name) \ struct raw_notifier_head name = \ RAW_NOTIFIER_INIT(name) #ifdef CONFIG_TREE_SRCU #define _SRCU_NOTIFIER_HEAD(name, mod) \ static DEFINE_PER_CPU(struct srcu_data, name##_head_srcu_data); \ mod struct srcu_notifier_head name = \ SRCU_NOTIFIER_INIT(name, name##_head_srcu_data) #else #define _SRCU_NOTIFIER_HEAD(name, mod) \ mod struct srcu_notifier_head name = \ SRCU_NOTIFIER_INIT(name, name) #endif #define SRCU_NOTIFIER_HEAD(name) \ _SRCU_NOTIFIER_HEAD(name, /* not static */) #define SRCU_NOTIFIER_HEAD_STATIC(name) \ _SRCU_NOTIFIER_HEAD(name, static) #ifdef __KERNEL__ extern int atomic_notifier_chain_register(struct atomic_notifier_head *nh, struct notifier_block *nb); extern int blocking_notifier_chain_register(struct blocking_notifier_head *nh, struct notifier_block *nb); extern int raw_notifier_chain_register(struct raw_notifier_head *nh, struct notifier_block *nb); extern int srcu_notifier_chain_register(struct srcu_notifier_head *nh, struct notifier_block *nb); extern int atomic_notifier_chain_unregister(struct atomic_notifier_head *nh, struct notifier_block *nb); extern int blocking_notifier_chain_unregister(struct blocking_notifier_head *nh, struct notifier_block *nb); extern int raw_notifier_chain_unregister(struct raw_notifier_head *nh, struct notifier_block *nb); extern int srcu_notifier_chain_unregister(struct srcu_notifier_head *nh, struct notifier_block *nb); extern int atomic_notifier_call_chain(struct atomic_notifier_head *nh, unsigned long val, void *v); extern int blocking_notifier_call_chain(struct blocking_notifier_head *nh, unsigned long val, void *v); extern int raw_notifier_call_chain(struct raw_notifier_head *nh, unsigned long val, void *v); extern int srcu_notifier_call_chain(struct srcu_notifier_head *nh, unsigned long val, void *v); extern int blocking_notifier_call_chain_robust(struct blocking_notifier_head *nh, unsigned long val_up, unsigned long val_down, void *v); extern int raw_notifier_call_chain_robust(struct raw_notifier_head *nh, unsigned long val_up, unsigned long val_down, void *v); #define NOTIFY_DONE 0x0000 /* Don't care */ #define NOTIFY_OK 0x0001 /* Suits me */ #define NOTIFY_STOP_MASK 0x8000 /* Don't call further */ #define NOTIFY_BAD (NOTIFY_STOP_MASK|0x0002) /* Bad/Veto action */ /* * Clean way to return from the notifier and stop further calls. */ #define NOTIFY_STOP (NOTIFY_OK|NOTIFY_STOP_MASK) /* Encapsulate (negative) errno value (in particular, NOTIFY_BAD <=> EPERM). */ static inline int notifier_from_errno(int err) { if (err) return NOTIFY_STOP_MASK | (NOTIFY_OK - err); return NOTIFY_OK; } /* Restore (negative) errno value from notify return value. */ static inline int notifier_to_errno(int ret) { ret &= ~NOTIFY_STOP_MASK; return ret > NOTIFY_OK ? NOTIFY_OK - ret : 0; } /* * Declared notifiers so far. I can imagine quite a few more chains * over time (eg laptop power reset chains, reboot chain (to clean * device units up), device [un]mount chain, module load/unload chain, * low memory chain, screenblank chain (for plug in modular screenblankers) * VC switch chains (for loadable kernel svgalib VC switch helpers) etc... */ /* CPU notfiers are defined in include/linux/cpu.h. */ /* netdevice notifiers are defined in include/linux/netdevice.h */ /* reboot notifiers are defined in include/linux/reboot.h. */ /* Hibernation and suspend events are defined in include/linux/suspend.h. */ /* Virtual Terminal events are defined in include/linux/vt.h. */ #define NETLINK_URELEASE 0x0001 /* Unicast netlink socket released */ /* Console keyboard events. * Note: KBD_KEYCODE is always sent before KBD_UNBOUND_KEYCODE, KBD_UNICODE and * KBD_KEYSYM. */ #define KBD_KEYCODE 0x0001 /* Keyboard keycode, called before any other */ #define KBD_UNBOUND_KEYCODE 0x0002 /* Keyboard keycode which is not bound to any other */ #define KBD_UNICODE 0x0003 /* Keyboard unicode */ #define KBD_KEYSYM 0x0004 /* Keyboard keysym */ #define KBD_POST_KEYSYM 0x0005 /* Called after keyboard keysym interpretation */ extern struct blocking_notifier_head reboot_notifier_list; #endif /* __KERNEL__ */ #endif /* _LINUX_NOTIFIER_H */ PK ! t��B� � ceph/cls_lock_client.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CEPH_CLS_LOCK_CLIENT_H #define _LINUX_CEPH_CLS_LOCK_CLIENT_H #include <linux/ceph/osd_client.h> enum ceph_cls_lock_type { CEPH_CLS_LOCK_NONE = 0, CEPH_CLS_LOCK_EXCLUSIVE = 1, CEPH_CLS_LOCK_SHARED = 2, }; struct ceph_locker_id { struct ceph_entity_name name; /* locker's client name */ char *cookie; /* locker's cookie */ }; struct ceph_locker_info { struct ceph_entity_addr addr; /* locker's address */ }; struct ceph_locker { struct ceph_locker_id id; struct ceph_locker_info info; }; int ceph_cls_lock(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, char *lock_name, u8 type, char *cookie, char *tag, char *desc, u8 flags); int ceph_cls_unlock(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, char *lock_name, char *cookie); int ceph_cls_break_lock(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, char *lock_name, char *cookie, struct ceph_entity_name *locker); int ceph_cls_set_cookie(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, char *lock_name, u8 type, char *old_cookie, char *tag, char *new_cookie); void ceph_free_lockers(struct ceph_locker *lockers, u32 num_lockers); int ceph_cls_lock_info(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, char *lock_name, u8 *type, char **tag, struct ceph_locker **lockers, u32 *num_lockers); int ceph_cls_assert_locked(struct ceph_osd_request *req, int which, char *lock_name, u8 type, char *cookie, char *tag); #endif PK ! }��/ / ceph/string_table.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_STRING_TABLE_H #define _FS_CEPH_STRING_TABLE_H #include <linux/types.h> #include <linux/kref.h> #include <linux/rbtree.h> #include <linux/rcupdate.h> struct ceph_string { struct kref kref; union { struct rb_node node; struct rcu_head rcu; }; size_t len; char str[]; }; extern void ceph_release_string(struct kref *ref); extern struct ceph_string *ceph_find_or_create_string(const char *str, size_t len); extern bool ceph_strings_empty(void); static inline struct ceph_string *ceph_get_string(struct ceph_string *str) { kref_get(&str->kref); return str; } static inline void ceph_put_string(struct ceph_string *str) { if (!str) return; kref_put(&str->kref, ceph_release_string); } static inline int ceph_compare_string(struct ceph_string *cs, const char* str, size_t len) { size_t cs_len = cs ? cs->len : 0; if (cs_len != len) return cs_len - len; if (len == 0) return 0; return strncmp(cs->str, str, len); } #define ceph_try_get_string(x) \ ({ \ struct ceph_string *___str; \ rcu_read_lock(); \ for (;;) { \ ___str = rcu_dereference(x); \ if (!___str || \ kref_get_unless_zero(&___str->kref)) \ break; \ } \ rcu_read_unlock(); \ (___str); \ }) #endif PK ! 1@�Ún �n ceph/ceph_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * ceph_fs.h - Ceph constants and data types to share between kernel and * user space. * * Most types in this file are defined as little-endian, and are * primarily intended to describe data structures that pass over the * wire or that are stored on disk. * * LGPL2 */ #ifndef CEPH_FS_H #define CEPH_FS_H #include <linux/ceph/msgr.h> #include <linux/ceph/rados.h> /* * subprotocol versions. when specific messages types or high-level * protocols change, bump the affected components. we keep rev * internal cluster protocols separately from the public, * client-facing protocol. */ #define CEPH_OSDC_PROTOCOL 24 /* server/client */ #define CEPH_MDSC_PROTOCOL 32 /* server/client */ #define CEPH_MONC_PROTOCOL 15 /* server/client */ #define CEPH_INO_ROOT 1 #define CEPH_INO_CEPH 2 /* hidden .ceph dir */ #define CEPH_INO_DOTDOT 3 /* used by ceph fuse for parent (..) */ /* arbitrary limit on max # of monitors (cluster of 3 is typical) */ #define CEPH_MAX_MON 31 /* * legacy ceph_file_layoute */ struct ceph_file_layout_legacy { /* file -> object mapping */ __le32 fl_stripe_unit; /* stripe unit, in bytes. must be multiple of page size. */ __le32 fl_stripe_count; /* over this many objects */ __le32 fl_object_size; /* until objects are this big, then move to new objects */ __le32 fl_cas_hash; /* UNUSED. 0 = none; 1 = sha256 */ /* pg -> disk layout */ __le32 fl_object_stripe_unit; /* UNUSED. for per-object parity, if any */ /* object -> pg layout */ __le32 fl_unused; /* unused; used to be preferred primary for pg (-1 for none) */ __le32 fl_pg_pool; /* namespace, crush ruleset, rep level */ } __attribute__ ((packed)); struct ceph_string; /* * ceph_file_layout - describe data layout for a file/inode */ struct ceph_file_layout { /* file -> object mapping */ u32 stripe_unit; /* stripe unit, in bytes */ u32 stripe_count; /* over this many objects */ u32 object_size; /* until objects are this big */ s64 pool_id; /* rados pool id */ struct ceph_string __rcu *pool_ns; /* rados pool namespace */ }; extern int ceph_file_layout_is_valid(const struct ceph_file_layout *layout); extern void ceph_file_layout_from_legacy(struct ceph_file_layout *fl, struct ceph_file_layout_legacy *legacy); extern void ceph_file_layout_to_legacy(struct ceph_file_layout *fl, struct ceph_file_layout_legacy *legacy); #define CEPH_MIN_STRIPE_UNIT 65536 struct ceph_dir_layout { __u8 dl_dir_hash; /* see ceph_hash.h for ids */ __u8 dl_unused1; __u16 dl_unused2; __u32 dl_unused3; } __attribute__ ((packed)); /* crypto algorithms */ #define CEPH_CRYPTO_NONE 0x0 #define CEPH_CRYPTO_AES 0x1 #define CEPH_AES_IV "cephsageyudagreg" /* security/authentication protocols */ #define CEPH_AUTH_UNKNOWN 0x0 #define CEPH_AUTH_NONE 0x1 #define CEPH_AUTH_CEPHX 0x2 #define CEPH_AUTH_MODE_NONE 0 #define CEPH_AUTH_MODE_AUTHORIZER 1 #define CEPH_AUTH_MODE_MON 10 /* msgr2 protocol modes */ #define CEPH_CON_MODE_UNKNOWN 0x0 #define CEPH_CON_MODE_CRC 0x1 #define CEPH_CON_MODE_SECURE 0x2 #define CEPH_AUTH_UID_DEFAULT ((__u64) -1) const char *ceph_auth_proto_name(int proto); const char *ceph_con_mode_name(int mode); /********************************************* * message layer */ /* * message types */ /* misc */ #define CEPH_MSG_SHUTDOWN 1 #define CEPH_MSG_PING 2 /* client <-> monitor */ #define CEPH_MSG_MON_MAP 4 #define CEPH_MSG_MON_GET_MAP 5 #define CEPH_MSG_STATFS 13 #define CEPH_MSG_STATFS_REPLY 14 #define CEPH_MSG_MON_SUBSCRIBE 15 #define CEPH_MSG_MON_SUBSCRIBE_ACK 16 #define CEPH_MSG_AUTH 17 #define CEPH_MSG_AUTH_REPLY 18 #define CEPH_MSG_MON_GET_VERSION 19 #define CEPH_MSG_MON_GET_VERSION_REPLY 20 /* client <-> mds */ #define CEPH_MSG_MDS_MAP 21 #define CEPH_MSG_FS_MAP_USER 103 #define CEPH_MSG_CLIENT_SESSION 22 #define CEPH_MSG_CLIENT_RECONNECT 23 #define CEPH_MSG_CLIENT_REQUEST 24 #define CEPH_MSG_CLIENT_REQUEST_FORWARD 25 #define CEPH_MSG_CLIENT_REPLY 26 #define CEPH_MSG_CLIENT_METRICS 29 #define CEPH_MSG_CLIENT_CAPS 0x310 #define CEPH_MSG_CLIENT_LEASE 0x311 #define CEPH_MSG_CLIENT_SNAP 0x312 #define CEPH_MSG_CLIENT_CAPRELEASE 0x313 #define CEPH_MSG_CLIENT_QUOTA 0x314 /* pool ops */ #define CEPH_MSG_POOLOP_REPLY 48 #define CEPH_MSG_POOLOP 49 /* mon commands */ #define CEPH_MSG_MON_COMMAND 50 #define CEPH_MSG_MON_COMMAND_ACK 51 /* osd */ #define CEPH_MSG_OSD_MAP 41 #define CEPH_MSG_OSD_OP 42 #define CEPH_MSG_OSD_OPREPLY 43 #define CEPH_MSG_WATCH_NOTIFY 44 #define CEPH_MSG_OSD_BACKOFF 61 /* watch-notify operations */ enum { CEPH_WATCH_EVENT_NOTIFY = 1, /* notifying watcher */ CEPH_WATCH_EVENT_NOTIFY_COMPLETE = 2, /* notifier notified when done */ CEPH_WATCH_EVENT_DISCONNECT = 3, /* we were disconnected */ }; struct ceph_mon_request_header { __le64 have_version; __le16 session_mon; __le64 session_mon_tid; } __attribute__ ((packed)); struct ceph_mon_statfs { struct ceph_mon_request_header monhdr; struct ceph_fsid fsid; __u8 contains_data_pool; __le64 data_pool; } __attribute__ ((packed)); struct ceph_statfs { __le64 kb, kb_used, kb_avail; __le64 num_objects; } __attribute__ ((packed)); struct ceph_mon_statfs_reply { struct ceph_fsid fsid; __le64 version; struct ceph_statfs st; } __attribute__ ((packed)); struct ceph_mon_command { struct ceph_mon_request_header monhdr; struct ceph_fsid fsid; __le32 num_strs; /* always 1 */ __le32 str_len; char str[]; } __attribute__ ((packed)); struct ceph_osd_getmap { struct ceph_mon_request_header monhdr; struct ceph_fsid fsid; __le32 start; } __attribute__ ((packed)); struct ceph_mds_getmap { struct ceph_mon_request_header monhdr; struct ceph_fsid fsid; } __attribute__ ((packed)); struct ceph_client_mount { struct ceph_mon_request_header monhdr; } __attribute__ ((packed)); #define CEPH_SUBSCRIBE_ONETIME 1 /* i want only 1 update after have */ struct ceph_mon_subscribe_item { __le64 start; __u8 flags; } __attribute__ ((packed)); struct ceph_mon_subscribe_ack { __le32 duration; /* seconds */ struct ceph_fsid fsid; } __attribute__ ((packed)); #define CEPH_FS_CLUSTER_ID_NONE -1 /* * mdsmap flags */ #define CEPH_MDSMAP_DOWN (1<<0) /* cluster deliberately down */ /* * mds states * > 0 -> in * <= 0 -> out */ #define CEPH_MDS_STATE_DNE 0 /* down, does not exist. */ #define CEPH_MDS_STATE_STOPPED -1 /* down, once existed, but no subtrees. empty log. */ #define CEPH_MDS_STATE_BOOT -4 /* up, boot announcement. */ #define CEPH_MDS_STATE_STANDBY -5 /* up, idle. waiting for assignment. */ #define CEPH_MDS_STATE_CREATING -6 /* up, creating MDS instance. */ #define CEPH_MDS_STATE_STARTING -7 /* up, starting previously stopped mds */ #define CEPH_MDS_STATE_STANDBY_REPLAY -8 /* up, tailing active node's journal */ #define CEPH_MDS_STATE_REPLAYONCE -9 /* up, replaying an active node's journal */ #define CEPH_MDS_STATE_REPLAY 8 /* up, replaying journal. */ #define CEPH_MDS_STATE_RESOLVE 9 /* up, disambiguating distributed operations (import, rename, etc.) */ #define CEPH_MDS_STATE_RECONNECT 10 /* up, reconnect to clients */ #define CEPH_MDS_STATE_REJOIN 11 /* up, rejoining distributed cache */ #define CEPH_MDS_STATE_CLIENTREPLAY 12 /* up, replaying client operations */ #define CEPH_MDS_STATE_ACTIVE 13 /* up, active */ #define CEPH_MDS_STATE_STOPPING 14 /* up, but exporting metadata */ extern const char *ceph_mds_state_name(int s); /* * metadata lock types. * - these are bitmasks.. we can compose them * - they also define the lock ordering by the MDS * - a few of these are internal to the mds */ #define CEPH_LOCK_DVERSION 1 #define CEPH_LOCK_DN 2 #define CEPH_LOCK_ISNAP 16 #define CEPH_LOCK_IVERSION 32 /* mds internal */ #define CEPH_LOCK_IFILE 64 #define CEPH_LOCK_IAUTH 128 #define CEPH_LOCK_ILINK 256 #define CEPH_LOCK_IDFT 512 /* dir frag tree */ #define CEPH_LOCK_INEST 1024 /* mds internal */ #define CEPH_LOCK_IXATTR 2048 #define CEPH_LOCK_IFLOCK 4096 /* advisory file locks */ #define CEPH_LOCK_INO 8192 /* immutable inode bits; not a lock */ #define CEPH_LOCK_IPOLICY 16384 /* policy lock on dirs. MDS internal */ /* client_session ops */ enum { CEPH_SESSION_REQUEST_OPEN, CEPH_SESSION_OPEN, CEPH_SESSION_REQUEST_CLOSE, CEPH_SESSION_CLOSE, CEPH_SESSION_REQUEST_RENEWCAPS, CEPH_SESSION_RENEWCAPS, CEPH_SESSION_STALE, CEPH_SESSION_RECALL_STATE, CEPH_SESSION_FLUSHMSG, CEPH_SESSION_FLUSHMSG_ACK, CEPH_SESSION_FORCE_RO, CEPH_SESSION_REJECT, CEPH_SESSION_REQUEST_FLUSH_MDLOG, }; extern const char *ceph_session_op_name(int op); struct ceph_mds_session_head { __le32 op; __le64 seq; struct ceph_timespec stamp; __le32 max_caps, max_leases; } __attribute__ ((packed)); /* client_request */ /* * metadata ops. * & 0x001000 -> write op * & 0x010000 -> follow symlink (e.g. stat(), not lstat()). & & 0x100000 -> use weird ino/path trace */ #define CEPH_MDS_OP_WRITE 0x001000 enum { CEPH_MDS_OP_LOOKUP = 0x00100, CEPH_MDS_OP_GETATTR = 0x00101, CEPH_MDS_OP_LOOKUPHASH = 0x00102, CEPH_MDS_OP_LOOKUPPARENT = 0x00103, CEPH_MDS_OP_LOOKUPINO = 0x00104, CEPH_MDS_OP_LOOKUPNAME = 0x00105, CEPH_MDS_OP_SETXATTR = 0x01105, CEPH_MDS_OP_RMXATTR = 0x01106, CEPH_MDS_OP_SETLAYOUT = 0x01107, CEPH_MDS_OP_SETATTR = 0x01108, CEPH_MDS_OP_SETFILELOCK= 0x01109, CEPH_MDS_OP_GETFILELOCK= 0x00110, CEPH_MDS_OP_SETDIRLAYOUT=0x0110a, CEPH_MDS_OP_MKNOD = 0x01201, CEPH_MDS_OP_LINK = 0x01202, CEPH_MDS_OP_UNLINK = 0x01203, CEPH_MDS_OP_RENAME = 0x01204, CEPH_MDS_OP_MKDIR = 0x01220, CEPH_MDS_OP_RMDIR = 0x01221, CEPH_MDS_OP_SYMLINK = 0x01222, CEPH_MDS_OP_CREATE = 0x01301, CEPH_MDS_OP_OPEN = 0x00302, CEPH_MDS_OP_READDIR = 0x00305, CEPH_MDS_OP_LOOKUPSNAP = 0x00400, CEPH_MDS_OP_MKSNAP = 0x01400, CEPH_MDS_OP_RMSNAP = 0x01401, CEPH_MDS_OP_LSSNAP = 0x00402, CEPH_MDS_OP_RENAMESNAP = 0x01403, }; extern const char *ceph_mds_op_name(int op); #define CEPH_SETATTR_MODE 1 #define CEPH_SETATTR_UID 2 #define CEPH_SETATTR_GID 4 #define CEPH_SETATTR_MTIME 8 #define CEPH_SETATTR_ATIME 16 #define CEPH_SETATTR_SIZE 32 #define CEPH_SETATTR_CTIME 64 /* * Ceph setxattr request flags. */ #define CEPH_XATTR_CREATE (1 << 0) #define CEPH_XATTR_REPLACE (1 << 1) #define CEPH_XATTR_REMOVE (1 << 31) /* * readdir request flags; */ #define CEPH_READDIR_REPLY_BITFLAGS (1<<0) /* * readdir reply flags. */ #define CEPH_READDIR_FRAG_END (1<<0) #define CEPH_READDIR_FRAG_COMPLETE (1<<8) #define CEPH_READDIR_HASH_ORDER (1<<9) #define CEPH_READDIR_OFFSET_HASH (1<<10) /* * open request flags */ #define CEPH_O_RDONLY 00000000 #define CEPH_O_WRONLY 00000001 #define CEPH_O_RDWR 00000002 #define CEPH_O_CREAT 00000100 #define CEPH_O_EXCL 00000200 #define CEPH_O_TRUNC 00001000 #define CEPH_O_DIRECTORY 00200000 #define CEPH_O_NOFOLLOW 00400000 union ceph_mds_request_args { struct { __le32 mask; /* CEPH_CAP_* */ } __attribute__ ((packed)) getattr; struct { __le32 mode; __le32 uid; __le32 gid; struct ceph_timespec mtime; struct ceph_timespec atime; __le64 size, old_size; /* old_size needed by truncate */ __le32 mask; /* CEPH_SETATTR_* */ } __attribute__ ((packed)) setattr; struct { __le32 frag; /* which dir fragment */ __le32 max_entries; /* how many dentries to grab */ __le32 max_bytes; __le16 flags; __le32 offset_hash; } __attribute__ ((packed)) readdir; struct { __le32 mode; __le32 rdev; } __attribute__ ((packed)) mknod; struct { __le32 mode; } __attribute__ ((packed)) mkdir; struct { __le32 flags; __le32 mode; __le32 stripe_unit; /* layout for newly created file */ __le32 stripe_count; /* ... */ __le32 object_size; __le32 file_replication; __le32 mask; /* CEPH_CAP_* */ __le32 old_size; } __attribute__ ((packed)) open; struct { __le32 flags; __le32 osdmap_epoch; /* used for setting file/dir layouts */ } __attribute__ ((packed)) setxattr; struct { struct ceph_file_layout_legacy layout; } __attribute__ ((packed)) setlayout; struct { __u8 rule; /* currently fcntl or flock */ __u8 type; /* shared, exclusive, remove*/ __le64 owner; /* owner of the lock */ __le64 pid; /* process id requesting the lock */ __le64 start; /* initial location to lock */ __le64 length; /* num bytes to lock from start */ __u8 wait; /* will caller wait for lock to become available? */ } __attribute__ ((packed)) filelock_change; struct { __le32 mask; /* CEPH_CAP_* */ __le64 snapid; __le64 parent; __le32 hash; } __attribute__ ((packed)) lookupino; } __attribute__ ((packed)); union ceph_mds_request_args_ext { union ceph_mds_request_args old; struct { __le32 mode; __le32 uid; __le32 gid; struct ceph_timespec mtime; struct ceph_timespec atime; __le64 size, old_size; /* old_size needed by truncate */ __le32 mask; /* CEPH_SETATTR_* */ struct ceph_timespec btime; } __attribute__ ((packed)) setattr_ext; }; #define CEPH_MDS_FLAG_REPLAY 1 /* this is a replayed op */ #define CEPH_MDS_FLAG_WANT_DENTRY 2 /* want dentry in reply */ #define CEPH_MDS_FLAG_ASYNC 4 /* request is asynchronous */ struct ceph_mds_request_head_old { __le64 oldest_client_tid; __le32 mdsmap_epoch; /* on client */ __le32 flags; /* CEPH_MDS_FLAG_* */ __u8 num_retry, num_fwd; /* count retry, fwd attempts */ __le16 num_releases; /* # include cap/lease release records */ __le32 op; /* mds op code */ __le32 caller_uid, caller_gid; __le64 ino; /* use this ino for openc, mkdir, mknod, etc. (if replaying) */ union ceph_mds_request_args args; } __attribute__ ((packed)); #define CEPH_MDS_REQUEST_HEAD_VERSION 1 struct ceph_mds_request_head { __le16 version; /* struct version */ __le64 oldest_client_tid; __le32 mdsmap_epoch; /* on client */ __le32 flags; /* CEPH_MDS_FLAG_* */ __u8 num_retry, num_fwd; /* count retry, fwd attempts */ __le16 num_releases; /* # include cap/lease release records */ __le32 op; /* mds op code */ __le32 caller_uid, caller_gid; __le64 ino; /* use this ino for openc, mkdir, mknod, etc. (if replaying) */ union ceph_mds_request_args_ext args; } __attribute__ ((packed)); /* cap/lease release record */ struct ceph_mds_request_release { __le64 ino, cap_id; /* ino and unique cap id */ __le32 caps, wanted; /* new issued, wanted */ __le32 seq, issue_seq, mseq; __le32 dname_seq; /* if releasing a dentry lease, a */ __le32 dname_len; /* string follows. */ } __attribute__ ((packed)); /* client reply */ struct ceph_mds_reply_head { __le32 op; __le32 result; __le32 mdsmap_epoch; __u8 safe; /* true if committed to disk */ __u8 is_dentry, is_target; /* true if dentry, target inode records are included with reply */ } __attribute__ ((packed)); /* one for each node split */ struct ceph_frag_tree_split { __le32 frag; /* this frag splits... */ __le32 by; /* ...by this many bits */ } __attribute__ ((packed)); struct ceph_frag_tree_head { __le32 nsplits; /* num ceph_frag_tree_split records */ struct ceph_frag_tree_split splits[]; } __attribute__ ((packed)); /* capability issue, for bundling with mds reply */ struct ceph_mds_reply_cap { __le32 caps, wanted; /* caps issued, wanted */ __le64 cap_id; __le32 seq, mseq; __le64 realm; /* snap realm */ __u8 flags; /* CEPH_CAP_FLAG_* */ } __attribute__ ((packed)); #define CEPH_CAP_FLAG_AUTH (1 << 0) /* cap is issued by auth mds */ #define CEPH_CAP_FLAG_RELEASE (1 << 1) /* release the cap */ /* inode record, for bundling with mds reply */ struct ceph_mds_reply_inode { __le64 ino; __le64 snapid; __le32 rdev; __le64 version; /* inode version */ __le64 xattr_version; /* version for xattr blob */ struct ceph_mds_reply_cap cap; /* caps issued for this inode */ struct ceph_file_layout_legacy layout; struct ceph_timespec ctime, mtime, atime; __le32 time_warp_seq; __le64 size, max_size, truncate_size; __le32 truncate_seq; __le32 mode, uid, gid; __le32 nlink; __le64 files, subdirs, rbytes, rfiles, rsubdirs; /* dir stats */ struct ceph_timespec rctime; struct ceph_frag_tree_head fragtree; /* (must be at end of struct) */ } __attribute__ ((packed)); /* followed by frag array, symlink string, dir layout, xattr blob */ /* reply_lease follows dname, and reply_inode */ struct ceph_mds_reply_lease { __le16 mask; /* lease type(s) */ __le32 duration_ms; /* lease duration */ __le32 seq; } __attribute__ ((packed)); #define CEPH_LEASE_VALID (1 | 2) /* old and new bit values */ #define CEPH_LEASE_PRIMARY_LINK 4 /* primary linkage */ struct ceph_mds_reply_dirfrag { __le32 frag; /* fragment */ __le32 auth; /* auth mds, if this is a delegation point */ __le32 ndist; /* number of mds' this is replicated on */ __le32 dist[]; } __attribute__ ((packed)); #define CEPH_LOCK_FCNTL 1 #define CEPH_LOCK_FLOCK 2 #define CEPH_LOCK_FCNTL_INTR 3 #define CEPH_LOCK_FLOCK_INTR 4 #define CEPH_LOCK_SHARED 1 #define CEPH_LOCK_EXCL 2 #define CEPH_LOCK_UNLOCK 4 struct ceph_filelock { __le64 start;/* file offset to start lock at */ __le64 length; /* num bytes to lock; 0 for all following start */ __le64 client; /* which client holds the lock */ __le64 owner; /* owner the lock */ __le64 pid; /* process id holding the lock on the client */ __u8 type; /* shared lock, exclusive lock, or unlock */ } __attribute__ ((packed)); /* file access modes */ #define CEPH_FILE_MODE_PIN 0 #define CEPH_FILE_MODE_RD 1 #define CEPH_FILE_MODE_WR 2 #define CEPH_FILE_MODE_RDWR 3 /* RD | WR */ #define CEPH_FILE_MODE_LAZY 4 /* lazy io */ #define CEPH_FILE_MODE_BITS 4 #define CEPH_FILE_MODE_MASK ((1 << CEPH_FILE_MODE_BITS) - 1) int ceph_flags_to_mode(int flags); #define CEPH_INLINE_NONE ((__u64)-1) /* capability bits */ #define CEPH_CAP_PIN 1 /* no specific capabilities beyond the pin */ /* generic cap bits */ #define CEPH_CAP_GSHARED 1 /* client can reads */ #define CEPH_CAP_GEXCL 2 /* client can read and update */ #define CEPH_CAP_GCACHE 4 /* (file) client can cache reads */ #define CEPH_CAP_GRD 8 /* (file) client can read */ #define CEPH_CAP_GWR 16 /* (file) client can write */ #define CEPH_CAP_GBUFFER 32 /* (file) client can buffer writes */ #define CEPH_CAP_GWREXTEND 64 /* (file) client can extend EOF */ #define CEPH_CAP_GLAZYIO 128 /* (file) client can perform lazy io */ #define CEPH_CAP_SIMPLE_BITS 2 #define CEPH_CAP_FILE_BITS 8 /* per-lock shift */ #define CEPH_CAP_SAUTH 2 #define CEPH_CAP_SLINK 4 #define CEPH_CAP_SXATTR 6 #define CEPH_CAP_SFILE 8 #define CEPH_CAP_SFLOCK 20 #define CEPH_CAP_BITS 22 /* composed values */ #define CEPH_CAP_AUTH_SHARED (CEPH_CAP_GSHARED << CEPH_CAP_SAUTH) #define CEPH_CAP_AUTH_EXCL (CEPH_CAP_GEXCL << CEPH_CAP_SAUTH) #define CEPH_CAP_LINK_SHARED (CEPH_CAP_GSHARED << CEPH_CAP_SLINK) #define CEPH_CAP_LINK_EXCL (CEPH_CAP_GEXCL << CEPH_CAP_SLINK) #define CEPH_CAP_XATTR_SHARED (CEPH_CAP_GSHARED << CEPH_CAP_SXATTR) #define CEPH_CAP_XATTR_EXCL (CEPH_CAP_GEXCL << CEPH_CAP_SXATTR) #define CEPH_CAP_FILE(x) (x << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_SHARED (CEPH_CAP_GSHARED << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_EXCL (CEPH_CAP_GEXCL << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_CACHE (CEPH_CAP_GCACHE << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_RD (CEPH_CAP_GRD << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_WR (CEPH_CAP_GWR << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_BUFFER (CEPH_CAP_GBUFFER << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_WREXTEND (CEPH_CAP_GWREXTEND << CEPH_CAP_SFILE) #define CEPH_CAP_FILE_LAZYIO (CEPH_CAP_GLAZYIO << CEPH_CAP_SFILE) #define CEPH_CAP_FLOCK_SHARED (CEPH_CAP_GSHARED << CEPH_CAP_SFLOCK) #define CEPH_CAP_FLOCK_EXCL (CEPH_CAP_GEXCL << CEPH_CAP_SFLOCK) /* cap masks (for getattr) */ #define CEPH_STAT_CAP_INODE CEPH_CAP_PIN #define CEPH_STAT_CAP_TYPE CEPH_CAP_PIN /* mode >> 12 */ #define CEPH_STAT_CAP_SYMLINK CEPH_CAP_PIN #define CEPH_STAT_CAP_UID CEPH_CAP_AUTH_SHARED #define CEPH_STAT_CAP_GID CEPH_CAP_AUTH_SHARED #define CEPH_STAT_CAP_MODE CEPH_CAP_AUTH_SHARED #define CEPH_STAT_CAP_NLINK CEPH_CAP_LINK_SHARED #define CEPH_STAT_CAP_LAYOUT CEPH_CAP_FILE_SHARED #define CEPH_STAT_CAP_MTIME CEPH_CAP_FILE_SHARED #define CEPH_STAT_CAP_SIZE CEPH_CAP_FILE_SHARED #define CEPH_STAT_CAP_ATIME CEPH_CAP_FILE_SHARED /* fixme */ #define CEPH_STAT_CAP_XATTR CEPH_CAP_XATTR_SHARED #define CEPH_STAT_CAP_INODE_ALL (CEPH_CAP_PIN | \ CEPH_CAP_AUTH_SHARED | \ CEPH_CAP_LINK_SHARED | \ CEPH_CAP_FILE_SHARED | \ CEPH_CAP_XATTR_SHARED) #define CEPH_STAT_CAP_INLINE_DATA (CEPH_CAP_FILE_SHARED | \ CEPH_CAP_FILE_RD) #define CEPH_STAT_RSTAT CEPH_CAP_FILE_WREXTEND #define CEPH_CAP_ANY_SHARED (CEPH_CAP_AUTH_SHARED | \ CEPH_CAP_LINK_SHARED | \ CEPH_CAP_XATTR_SHARED | \ CEPH_CAP_FILE_SHARED) #define CEPH_CAP_ANY_RD (CEPH_CAP_ANY_SHARED | CEPH_CAP_FILE_RD | \ CEPH_CAP_FILE_CACHE) #define CEPH_CAP_ANY_EXCL (CEPH_CAP_AUTH_EXCL | \ CEPH_CAP_LINK_EXCL | \ CEPH_CAP_XATTR_EXCL | \ CEPH_CAP_FILE_EXCL) #define CEPH_CAP_ANY_FILE_RD (CEPH_CAP_FILE_RD | CEPH_CAP_FILE_CACHE | \ CEPH_CAP_FILE_SHARED) #define CEPH_CAP_ANY_FILE_WR (CEPH_CAP_FILE_WR | CEPH_CAP_FILE_BUFFER | \ CEPH_CAP_FILE_EXCL) #define CEPH_CAP_ANY_WR (CEPH_CAP_ANY_EXCL | CEPH_CAP_ANY_FILE_WR) #define CEPH_CAP_ANY (CEPH_CAP_ANY_RD | CEPH_CAP_ANY_EXCL | \ CEPH_CAP_ANY_FILE_WR | CEPH_CAP_FILE_LAZYIO | \ CEPH_CAP_PIN) #define CEPH_CAP_ALL_FILE (CEPH_CAP_PIN | CEPH_CAP_ANY_SHARED | \ CEPH_CAP_AUTH_EXCL | CEPH_CAP_XATTR_EXCL | \ CEPH_CAP_ANY_FILE_RD | CEPH_CAP_ANY_FILE_WR) #define CEPH_CAP_LOCKS (CEPH_LOCK_IFILE | CEPH_LOCK_IAUTH | CEPH_LOCK_ILINK | \ CEPH_LOCK_IXATTR) /* cap masks async dir operations */ #define CEPH_CAP_DIR_CREATE CEPH_CAP_FILE_CACHE #define CEPH_CAP_DIR_UNLINK CEPH_CAP_FILE_RD #define CEPH_CAP_ANY_DIR_OPS (CEPH_CAP_FILE_CACHE | CEPH_CAP_FILE_RD | \ CEPH_CAP_FILE_WREXTEND | CEPH_CAP_FILE_LAZYIO) int ceph_caps_for_mode(int mode); enum { CEPH_CAP_OP_GRANT, /* mds->client grant */ CEPH_CAP_OP_REVOKE, /* mds->client revoke */ CEPH_CAP_OP_TRUNC, /* mds->client trunc notify */ CEPH_CAP_OP_EXPORT, /* mds has exported the cap */ CEPH_CAP_OP_IMPORT, /* mds has imported the cap */ CEPH_CAP_OP_UPDATE, /* client->mds update */ CEPH_CAP_OP_DROP, /* client->mds drop cap bits */ CEPH_CAP_OP_FLUSH, /* client->mds cap writeback */ CEPH_CAP_OP_FLUSH_ACK, /* mds->client flushed */ CEPH_CAP_OP_FLUSHSNAP, /* client->mds flush snapped metadata */ CEPH_CAP_OP_FLUSHSNAP_ACK, /* mds->client flushed snapped metadata */ CEPH_CAP_OP_RELEASE, /* client->mds release (clean) cap */ CEPH_CAP_OP_RENEW, /* client->mds renewal request */ }; extern const char *ceph_cap_op_name(int op); /* flags field in client cap messages (version >= 10) */ #define CEPH_CLIENT_CAPS_SYNC (1<<0) #define CEPH_CLIENT_CAPS_NO_CAPSNAP (1<<1) #define CEPH_CLIENT_CAPS_PENDING_CAPSNAP (1<<2) /* * caps message, used for capability callbacks, acks, requests, etc. */ struct ceph_mds_caps { __le32 op; /* CEPH_CAP_OP_* */ __le64 ino, realm; __le64 cap_id; __le32 seq, issue_seq; __le32 caps, wanted, dirty; /* latest issued/wanted/dirty */ __le32 migrate_seq; __le64 snap_follows; __le32 snap_trace_len; /* authlock */ __le32 uid, gid, mode; /* linklock */ __le32 nlink; /* xattrlock */ __le32 xattr_len; __le64 xattr_version; /* filelock */ __le64 size, max_size, truncate_size; __le32 truncate_seq; struct ceph_timespec mtime, atime, ctime; struct ceph_file_layout_legacy layout; __le32 time_warp_seq; } __attribute__ ((packed)); struct ceph_mds_cap_peer { __le64 cap_id; __le32 seq; __le32 mseq; __le32 mds; __u8 flags; } __attribute__ ((packed)); /* cap release msg head */ struct ceph_mds_cap_release { __le32 num; /* number of cap_items that follow */ } __attribute__ ((packed)); struct ceph_mds_cap_item { __le64 ino; __le64 cap_id; __le32 migrate_seq, seq; } __attribute__ ((packed)); #define CEPH_MDS_LEASE_REVOKE 1 /* mds -> client */ #define CEPH_MDS_LEASE_RELEASE 2 /* client -> mds */ #define CEPH_MDS_LEASE_RENEW 3 /* client <-> mds */ #define CEPH_MDS_LEASE_REVOKE_ACK 4 /* client -> mds */ extern const char *ceph_lease_op_name(int o); /* lease msg header */ struct ceph_mds_lease { __u8 action; /* CEPH_MDS_LEASE_* */ __le16 mask; /* which lease */ __le64 ino; __le64 first, last; /* snap range */ __le32 seq; __le32 duration_ms; /* duration of renewal */ } __attribute__ ((packed)); /* followed by a __le32+string for dname */ /* client reconnect */ struct ceph_mds_cap_reconnect { __le64 cap_id; __le32 wanted; __le32 issued; __le64 snaprealm; __le64 pathbase; /* base ino for our path to this ino */ __le32 flock_len; /* size of flock state blob, if any */ } __attribute__ ((packed)); /* followed by flock blob */ struct ceph_mds_cap_reconnect_v1 { __le64 cap_id; __le32 wanted; __le32 issued; __le64 size; struct ceph_timespec mtime, atime; __le64 snaprealm; __le64 pathbase; /* base ino for our path to this ino */ } __attribute__ ((packed)); struct ceph_mds_snaprealm_reconnect { __le64 ino; /* snap realm base */ __le64 seq; /* snap seq for this snap realm */ __le64 parent; /* parent realm */ } __attribute__ ((packed)); /* * snaps */ enum { CEPH_SNAP_OP_UPDATE, /* CREATE or DESTROY */ CEPH_SNAP_OP_CREATE, CEPH_SNAP_OP_DESTROY, CEPH_SNAP_OP_SPLIT, }; extern const char *ceph_snap_op_name(int o); /* snap msg header */ struct ceph_mds_snap_head { __le32 op; /* CEPH_SNAP_OP_* */ __le64 split; /* ino to split off, if any */ __le32 num_split_inos; /* # inos belonging to new child realm */ __le32 num_split_realms; /* # child realms udner new child realm */ __le32 trace_len; /* size of snap trace blob */ } __attribute__ ((packed)); /* followed by split ino list, then split realms, then the trace blob */ /* * encode info about a snaprealm, as viewed by a client */ struct ceph_mds_snap_realm { __le64 ino; /* ino */ __le64 created; /* snap: when created */ __le64 parent; /* ino: parent realm */ __le64 parent_since; /* snap: same parent since */ __le64 seq; /* snap: version */ __le32 num_snaps; __le32 num_prior_parent_snaps; } __attribute__ ((packed)); /* followed by my snap list, then prior parent snap list */ /* * quotas */ struct ceph_mds_quota { __le64 ino; /* ino */ struct ceph_timespec rctime; __le64 rbytes; /* dir stats */ __le64 rfiles; __le64 rsubdirs; __u8 struct_v; /* compat */ __u8 struct_compat; __le32 struct_len; __le64 max_bytes; /* quota max. bytes */ __le64 max_files; /* quota max. files */ } __attribute__ ((packed)); #endif PK ! {��K K ceph/rados.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef CEPH_RADOS_H #define CEPH_RADOS_H /* * Data types for the Ceph distributed object storage layer RADOS * (Reliable Autonomic Distributed Object Store). */ #include <linux/ceph/msgr.h> /* * fs id */ struct ceph_fsid { unsigned char fsid[16]; }; static inline int ceph_fsid_compare(const struct ceph_fsid *a, const struct ceph_fsid *b) { return memcmp(a, b, sizeof(*a)); } /* * ino, object, etc. */ typedef __le64 ceph_snapid_t; #define CEPH_SNAPDIR ((__u64)(-1)) /* reserved for hidden .snap dir */ #define CEPH_NOSNAP ((__u64)(-2)) /* "head", "live" revision */ #define CEPH_MAXSNAP ((__u64)(-3)) /* largest valid snapid */ struct ceph_timespec { __le32 tv_sec; __le32 tv_nsec; } __attribute__ ((packed)); /* * object layout - how objects are mapped into PGs */ #define CEPH_OBJECT_LAYOUT_HASH 1 #define CEPH_OBJECT_LAYOUT_LINEAR 2 #define CEPH_OBJECT_LAYOUT_HASHINO 3 /* * pg layout -- how PGs are mapped onto (sets of) OSDs */ #define CEPH_PG_LAYOUT_CRUSH 0 #define CEPH_PG_LAYOUT_HASH 1 #define CEPH_PG_LAYOUT_LINEAR 2 #define CEPH_PG_LAYOUT_HYBRID 3 #define CEPH_PG_MAX_SIZE 32 /* max # osds in a single pg */ /* * placement group. * we encode this into one __le64. */ struct ceph_pg_v1 { __le16 preferred; /* preferred primary osd */ __le16 ps; /* placement seed */ __le32 pool; /* object pool */ } __attribute__ ((packed)); /* * pg_pool is a set of pgs storing a pool of objects * * pg_num -- base number of pseudorandomly placed pgs * * pgp_num -- effective number when calculating pg placement. this * is used for pg_num increases. new pgs result in data being "split" * into new pgs. for this to proceed smoothly, new pgs are intiially * colocated with their parents; that is, pgp_num doesn't increase * until the new pgs have successfully split. only _then_ are the new * pgs placed independently. * * lpg_num -- localized pg count (per device). replicas are randomly * selected. * * lpgp_num -- as above. */ #define CEPH_NOPOOL ((__u64) (-1)) /* pool id not defined */ #define CEPH_POOL_TYPE_REP 1 #define CEPH_POOL_TYPE_RAID4 2 /* never implemented */ #define CEPH_POOL_TYPE_EC 3 /* * stable_mod func is used to control number of placement groups. * similar to straight-up modulo, but produces a stable mapping as b * increases over time. b is the number of bins, and bmask is the * containing power of 2 minus 1. * * b <= bmask and bmask=(2**n)-1 * e.g., b=12 -> bmask=15, b=123 -> bmask=127 */ static inline int ceph_stable_mod(int x, int b, int bmask) { if ((x & bmask) < b) return x & bmask; else return x & (bmask >> 1); } /* * object layout - how a given object should be stored. */ struct ceph_object_layout { struct ceph_pg_v1 ol_pgid; /* raw pg, with _full_ ps precision. */ __le32 ol_stripe_unit; /* for per-object parity, if any */ } __attribute__ ((packed)); /* * compound epoch+version, used by storage layer to serialize mutations */ struct ceph_eversion { __le64 version; __le32 epoch; } __attribute__ ((packed)); /* * osd map bits */ /* status bits */ #define CEPH_OSD_EXISTS (1<<0) #define CEPH_OSD_UP (1<<1) #define CEPH_OSD_AUTOOUT (1<<2) /* osd was automatically marked out */ #define CEPH_OSD_NEW (1<<3) /* osd is new, never marked in */ extern const char *ceph_osd_state_name(int s); /* osd weights. fixed point value: 0x10000 == 1.0 ("in"), 0 == "out" */ #define CEPH_OSD_IN 0x10000 #define CEPH_OSD_OUT 0 /* osd primary-affinity. fixed point value: 0x10000 == baseline */ #define CEPH_OSD_MAX_PRIMARY_AFFINITY 0x10000 #define CEPH_OSD_DEFAULT_PRIMARY_AFFINITY 0x10000 /* * osd map flag bits */ #define CEPH_OSDMAP_NEARFULL (1<<0) /* sync writes (near ENOSPC), not set since ~luminous */ #define CEPH_OSDMAP_FULL (1<<1) /* no data writes (ENOSPC), not set since ~luminous */ #define CEPH_OSDMAP_PAUSERD (1<<2) /* pause all reads */ #define CEPH_OSDMAP_PAUSEWR (1<<3) /* pause all writes */ #define CEPH_OSDMAP_PAUSEREC (1<<4) /* pause recovery */ #define CEPH_OSDMAP_NOUP (1<<5) /* block osd boot */ #define CEPH_OSDMAP_NODOWN (1<<6) /* block osd mark-down/failure */ #define CEPH_OSDMAP_NOOUT (1<<7) /* block osd auto mark-out */ #define CEPH_OSDMAP_NOIN (1<<8) /* block osd auto mark-in */ #define CEPH_OSDMAP_NOBACKFILL (1<<9) /* block osd backfill */ #define CEPH_OSDMAP_NORECOVER (1<<10) /* block osd recovery and backfill */ #define CEPH_OSDMAP_NOSCRUB (1<<11) /* block periodic scrub */ #define CEPH_OSDMAP_NODEEP_SCRUB (1<<12) /* block periodic deep-scrub */ #define CEPH_OSDMAP_NOTIERAGENT (1<<13) /* disable tiering agent */ #define CEPH_OSDMAP_NOREBALANCE (1<<14) /* block osd backfill unless pg is degraded */ #define CEPH_OSDMAP_SORTBITWISE (1<<15) /* use bitwise hobject_t sort */ #define CEPH_OSDMAP_REQUIRE_JEWEL (1<<16) /* require jewel for booting osds */ #define CEPH_OSDMAP_REQUIRE_KRAKEN (1<<17) /* require kraken for booting osds */ #define CEPH_OSDMAP_REQUIRE_LUMINOUS (1<<18) /* require l for booting osds */ #define CEPH_OSDMAP_RECOVERY_DELETES (1<<19) /* deletes performed during recovery instead of peering */ /* * The error code to return when an OSD can't handle a write * because it is too large. */ #define OSD_WRITETOOBIG EMSGSIZE /* * osd ops * * WARNING: do not use these op codes directly. Use the helpers * defined below instead. In certain cases, op code behavior was * redefined, resulting in special-cases in the helpers. */ #define CEPH_OSD_OP_MODE 0xf000 #define CEPH_OSD_OP_MODE_RD 0x1000 #define CEPH_OSD_OP_MODE_WR 0x2000 #define CEPH_OSD_OP_MODE_RMW 0x3000 #define CEPH_OSD_OP_MODE_SUB 0x4000 #define CEPH_OSD_OP_MODE_CACHE 0x8000 #define CEPH_OSD_OP_TYPE 0x0f00 #define CEPH_OSD_OP_TYPE_LOCK 0x0100 #define CEPH_OSD_OP_TYPE_DATA 0x0200 #define CEPH_OSD_OP_TYPE_ATTR 0x0300 #define CEPH_OSD_OP_TYPE_EXEC 0x0400 #define CEPH_OSD_OP_TYPE_PG 0x0500 #define CEPH_OSD_OP_TYPE_MULTI 0x0600 /* multiobject */ #define __CEPH_OSD_OP1(mode, nr) \ (CEPH_OSD_OP_MODE_##mode | (nr)) #define __CEPH_OSD_OP(mode, type, nr) \ (CEPH_OSD_OP_MODE_##mode | CEPH_OSD_OP_TYPE_##type | (nr)) #define __CEPH_FORALL_OSD_OPS(f) \ /** data **/ \ /* read */ \ f(READ, __CEPH_OSD_OP(RD, DATA, 1), "read") \ f(STAT, __CEPH_OSD_OP(RD, DATA, 2), "stat") \ f(MAPEXT, __CEPH_OSD_OP(RD, DATA, 3), "mapext") \ \ /* fancy read */ \ f(MASKTRUNC, __CEPH_OSD_OP(RD, DATA, 4), "masktrunc") \ f(SPARSE_READ, __CEPH_OSD_OP(RD, DATA, 5), "sparse-read") \ \ f(NOTIFY, __CEPH_OSD_OP(RD, DATA, 6), "notify") \ f(NOTIFY_ACK, __CEPH_OSD_OP(RD, DATA, 7), "notify-ack") \ \ /* versioning */ \ f(ASSERT_VER, __CEPH_OSD_OP(RD, DATA, 8), "assert-version") \ \ f(LIST_WATCHERS, __CEPH_OSD_OP(RD, DATA, 9), "list-watchers") \ \ f(LIST_SNAPS, __CEPH_OSD_OP(RD, DATA, 10), "list-snaps") \ \ /* sync */ \ f(SYNC_READ, __CEPH_OSD_OP(RD, DATA, 11), "sync_read") \ \ /* write */ \ f(WRITE, __CEPH_OSD_OP(WR, DATA, 1), "write") \ f(WRITEFULL, __CEPH_OSD_OP(WR, DATA, 2), "writefull") \ f(TRUNCATE, __CEPH_OSD_OP(WR, DATA, 3), "truncate") \ f(ZERO, __CEPH_OSD_OP(WR, DATA, 4), "zero") \ f(DELETE, __CEPH_OSD_OP(WR, DATA, 5), "delete") \ \ /* fancy write */ \ f(APPEND, __CEPH_OSD_OP(WR, DATA, 6), "append") \ f(SETTRUNC, __CEPH_OSD_OP(WR, DATA, 8), "settrunc") \ f(TRIMTRUNC, __CEPH_OSD_OP(WR, DATA, 9), "trimtrunc") \ \ f(TMAPUP, __CEPH_OSD_OP(RMW, DATA, 10), "tmapup") \ f(TMAPPUT, __CEPH_OSD_OP(WR, DATA, 11), "tmapput") \ f(TMAPGET, __CEPH_OSD_OP(RD, DATA, 12), "tmapget") \ \ f(CREATE, __CEPH_OSD_OP(WR, DATA, 13), "create") \ f(ROLLBACK, __CEPH_OSD_OP(WR, DATA, 14), "rollback") \ \ f(WATCH, __CEPH_OSD_OP(WR, DATA, 15), "watch") \ \ /* omap */ \ f(OMAPGETKEYS, __CEPH_OSD_OP(RD, DATA, 17), "omap-get-keys") \ f(OMAPGETVALS, __CEPH_OSD_OP(RD, DATA, 18), "omap-get-vals") \ f(OMAPGETHEADER, __CEPH_OSD_OP(RD, DATA, 19), "omap-get-header") \ f(OMAPGETVALSBYKEYS, __CEPH_OSD_OP(RD, DATA, 20), "omap-get-vals-by-keys") \ f(OMAPSETVALS, __CEPH_OSD_OP(WR, DATA, 21), "omap-set-vals") \ f(OMAPSETHEADER, __CEPH_OSD_OP(WR, DATA, 22), "omap-set-header") \ f(OMAPCLEAR, __CEPH_OSD_OP(WR, DATA, 23), "omap-clear") \ f(OMAPRMKEYS, __CEPH_OSD_OP(WR, DATA, 24), "omap-rm-keys") \ f(OMAP_CMP, __CEPH_OSD_OP(RD, DATA, 25), "omap-cmp") \ \ /* tiering */ \ f(COPY_FROM, __CEPH_OSD_OP(WR, DATA, 26), "copy-from") \ f(COPY_FROM2, __CEPH_OSD_OP(WR, DATA, 45), "copy-from2") \ f(COPY_GET_CLASSIC, __CEPH_OSD_OP(RD, DATA, 27), "copy-get-classic") \ f(UNDIRTY, __CEPH_OSD_OP(WR, DATA, 28), "undirty") \ f(ISDIRTY, __CEPH_OSD_OP(RD, DATA, 29), "isdirty") \ f(COPY_GET, __CEPH_OSD_OP(RD, DATA, 30), "copy-get") \ f(CACHE_FLUSH, __CEPH_OSD_OP(CACHE, DATA, 31), "cache-flush") \ f(CACHE_EVICT, __CEPH_OSD_OP(CACHE, DATA, 32), "cache-evict") \ f(CACHE_TRY_FLUSH, __CEPH_OSD_OP(CACHE, DATA, 33), "cache-try-flush") \ \ /* convert tmap to omap */ \ f(TMAP2OMAP, __CEPH_OSD_OP(RMW, DATA, 34), "tmap2omap") \ \ /* hints */ \ f(SETALLOCHINT, __CEPH_OSD_OP(WR, DATA, 35), "set-alloc-hint") \ \ /** multi **/ \ f(CLONERANGE, __CEPH_OSD_OP(WR, MULTI, 1), "clonerange") \ f(ASSERT_SRC_VERSION, __CEPH_OSD_OP(RD, MULTI, 2), "assert-src-version") \ f(SRC_CMPXATTR, __CEPH_OSD_OP(RD, MULTI, 3), "src-cmpxattr") \ \ /** attrs **/ \ /* read */ \ f(GETXATTR, __CEPH_OSD_OP(RD, ATTR, 1), "getxattr") \ f(GETXATTRS, __CEPH_OSD_OP(RD, ATTR, 2), "getxattrs") \ f(CMPXATTR, __CEPH_OSD_OP(RD, ATTR, 3), "cmpxattr") \ \ /* write */ \ f(SETXATTR, __CEPH_OSD_OP(WR, ATTR, 1), "setxattr") \ f(SETXATTRS, __CEPH_OSD_OP(WR, ATTR, 2), "setxattrs") \ f(RESETXATTRS, __CEPH_OSD_OP(WR, ATTR, 3), "resetxattrs") \ f(RMXATTR, __CEPH_OSD_OP(WR, ATTR, 4), "rmxattr") \ \ /** subop **/ \ f(PULL, __CEPH_OSD_OP1(SUB, 1), "pull") \ f(PUSH, __CEPH_OSD_OP1(SUB, 2), "push") \ f(BALANCEREADS, __CEPH_OSD_OP1(SUB, 3), "balance-reads") \ f(UNBALANCEREADS, __CEPH_OSD_OP1(SUB, 4), "unbalance-reads") \ f(SCRUB, __CEPH_OSD_OP1(SUB, 5), "scrub") \ f(SCRUB_RESERVE, __CEPH_OSD_OP1(SUB, 6), "scrub-reserve") \ f(SCRUB_UNRESERVE, __CEPH_OSD_OP1(SUB, 7), "scrub-unreserve") \ f(SCRUB_STOP, __CEPH_OSD_OP1(SUB, 8), "scrub-stop") \ f(SCRUB_MAP, __CEPH_OSD_OP1(SUB, 9), "scrub-map") \ \ /** lock **/ \ f(WRLOCK, __CEPH_OSD_OP(WR, LOCK, 1), "wrlock") \ f(WRUNLOCK, __CEPH_OSD_OP(WR, LOCK, 2), "wrunlock") \ f(RDLOCK, __CEPH_OSD_OP(WR, LOCK, 3), "rdlock") \ f(RDUNLOCK, __CEPH_OSD_OP(WR, LOCK, 4), "rdunlock") \ f(UPLOCK, __CEPH_OSD_OP(WR, LOCK, 5), "uplock") \ f(DNLOCK, __CEPH_OSD_OP(WR, LOCK, 6), "dnlock") \ \ /** exec **/ \ /* note: the RD bit here is wrong; see special-case below in helper */ \ f(CALL, __CEPH_OSD_OP(RD, EXEC, 1), "call") \ \ /** pg **/ \ f(PGLS, __CEPH_OSD_OP(RD, PG, 1), "pgls") \ f(PGLS_FILTER, __CEPH_OSD_OP(RD, PG, 2), "pgls-filter") \ f(PG_HITSET_LS, __CEPH_OSD_OP(RD, PG, 3), "pg-hitset-ls") \ f(PG_HITSET_GET, __CEPH_OSD_OP(RD, PG, 4), "pg-hitset-get") enum { #define GENERATE_ENUM_ENTRY(op, opcode, str) CEPH_OSD_OP_##op = (opcode), __CEPH_FORALL_OSD_OPS(GENERATE_ENUM_ENTRY) #undef GENERATE_ENUM_ENTRY }; static inline int ceph_osd_op_type_lock(int op) { return (op & CEPH_OSD_OP_TYPE) == CEPH_OSD_OP_TYPE_LOCK; } static inline int ceph_osd_op_type_data(int op) { return (op & CEPH_OSD_OP_TYPE) == CEPH_OSD_OP_TYPE_DATA; } static inline int ceph_osd_op_type_attr(int op) { return (op & CEPH_OSD_OP_TYPE) == CEPH_OSD_OP_TYPE_ATTR; } static inline int ceph_osd_op_type_exec(int op) { return (op & CEPH_OSD_OP_TYPE) == CEPH_OSD_OP_TYPE_EXEC; } static inline int ceph_osd_op_type_pg(int op) { return (op & CEPH_OSD_OP_TYPE) == CEPH_OSD_OP_TYPE_PG; } static inline int ceph_osd_op_type_multi(int op) { return (op & CEPH_OSD_OP_TYPE) == CEPH_OSD_OP_TYPE_MULTI; } static inline int ceph_osd_op_mode_subop(int op) { return (op & CEPH_OSD_OP_MODE) == CEPH_OSD_OP_MODE_SUB; } static inline int ceph_osd_op_mode_read(int op) { return (op & CEPH_OSD_OP_MODE_RD) && op != CEPH_OSD_OP_CALL; } static inline int ceph_osd_op_mode_modify(int op) { return op & CEPH_OSD_OP_MODE_WR; } /* * note that the following tmap stuff is also defined in the ceph librados.h * any modification here needs to be updated there */ #define CEPH_OSD_TMAP_HDR 'h' #define CEPH_OSD_TMAP_SET 's' #define CEPH_OSD_TMAP_CREATE 'c' /* create key */ #define CEPH_OSD_TMAP_RM 'r' #define CEPH_OSD_TMAP_RMSLOPPY 'R' extern const char *ceph_osd_op_name(int op); /* * osd op flags * * An op may be READ, WRITE, or READ|WRITE. */ enum { CEPH_OSD_FLAG_ACK = 0x0001, /* want (or is) "ack" ack */ CEPH_OSD_FLAG_ONNVRAM = 0x0002, /* want (or is) "onnvram" ack */ CEPH_OSD_FLAG_ONDISK = 0x0004, /* want (or is) "ondisk" ack */ CEPH_OSD_FLAG_RETRY = 0x0008, /* resend attempt */ CEPH_OSD_FLAG_READ = 0x0010, /* op may read */ CEPH_OSD_FLAG_WRITE = 0x0020, /* op may write */ CEPH_OSD_FLAG_ORDERSNAP = 0x0040, /* EOLDSNAP if snapc is out of order */ CEPH_OSD_FLAG_PEERSTAT_OLD = 0x0080, /* DEPRECATED msg includes osd_peer_stat */ CEPH_OSD_FLAG_BALANCE_READS = 0x0100, CEPH_OSD_FLAG_PARALLELEXEC = 0x0200, /* execute op in parallel */ CEPH_OSD_FLAG_PGOP = 0x0400, /* pg op, no object */ CEPH_OSD_FLAG_EXEC = 0x0800, /* op may exec */ CEPH_OSD_FLAG_EXEC_PUBLIC = 0x1000, /* DEPRECATED op may exec (public) */ CEPH_OSD_FLAG_LOCALIZE_READS = 0x2000, /* read from nearby replica, if any */ CEPH_OSD_FLAG_RWORDERED = 0x4000, /* order wrt concurrent reads */ CEPH_OSD_FLAG_IGNORE_CACHE = 0x8000, /* ignore cache logic */ CEPH_OSD_FLAG_SKIPRWLOCKS = 0x10000, /* skip rw locks */ CEPH_OSD_FLAG_IGNORE_OVERLAY = 0x20000, /* ignore pool overlay */ CEPH_OSD_FLAG_FLUSH = 0x40000, /* this is part of flush */ CEPH_OSD_FLAG_MAP_SNAP_CLONE = 0x80000, /* map snap direct to clone id */ CEPH_OSD_FLAG_ENFORCE_SNAPC = 0x100000, /* use snapc provided even if pool uses pool snaps */ CEPH_OSD_FLAG_REDIRECTED = 0x200000, /* op has been redirected */ CEPH_OSD_FLAG_KNOWN_REDIR = 0x400000, /* redirect bit is authoritative */ CEPH_OSD_FLAG_FULL_TRY = 0x800000, /* try op despite full flag */ CEPH_OSD_FLAG_FULL_FORCE = 0x1000000, /* force op despite full flag */ }; enum { CEPH_OSD_OP_FLAG_EXCL = 1, /* EXCL object create */ CEPH_OSD_OP_FLAG_FAILOK = 2, /* continue despite failure */ CEPH_OSD_OP_FLAG_FADVISE_RANDOM = 0x4, /* the op is random */ CEPH_OSD_OP_FLAG_FADVISE_SEQUENTIAL = 0x8, /* the op is sequential */ CEPH_OSD_OP_FLAG_FADVISE_WILLNEED = 0x10,/* data will be accessed in the near future */ CEPH_OSD_OP_FLAG_FADVISE_DONTNEED = 0x20,/* data will not be accessed in the near future */ CEPH_OSD_OP_FLAG_FADVISE_NOCACHE = 0x40,/* data will be accessed only once by this client */ }; #define EOLDSNAPC ERESTART /* ORDERSNAP flag set; writer has old snapc*/ #define EBLOCKLISTED ESHUTDOWN /* blocklisted */ /* xattr comparison */ enum { CEPH_OSD_CMPXATTR_OP_NOP = 0, CEPH_OSD_CMPXATTR_OP_EQ = 1, CEPH_OSD_CMPXATTR_OP_NE = 2, CEPH_OSD_CMPXATTR_OP_GT = 3, CEPH_OSD_CMPXATTR_OP_GTE = 4, CEPH_OSD_CMPXATTR_OP_LT = 5, CEPH_OSD_CMPXATTR_OP_LTE = 6 }; enum { CEPH_OSD_CMPXATTR_MODE_STRING = 1, CEPH_OSD_CMPXATTR_MODE_U64 = 2 }; enum { CEPH_OSD_COPY_FROM_FLAG_FLUSH = 1, /* part of a flush operation */ CEPH_OSD_COPY_FROM_FLAG_IGNORE_OVERLAY = 2, /* ignore pool overlay */ CEPH_OSD_COPY_FROM_FLAG_IGNORE_CACHE = 4, /* ignore osd cache logic */ CEPH_OSD_COPY_FROM_FLAG_MAP_SNAP_CLONE = 8, /* map snap direct to * cloneid */ CEPH_OSD_COPY_FROM_FLAG_RWORDERED = 16, /* order with write */ CEPH_OSD_COPY_FROM_FLAG_TRUNCATE_SEQ = 32, /* send truncate_{seq,size} */ }; enum { CEPH_OSD_WATCH_OP_UNWATCH = 0, CEPH_OSD_WATCH_OP_LEGACY_WATCH = 1, /* note: use only ODD ids to prevent pre-giant code from interpreting the op as UNWATCH */ CEPH_OSD_WATCH_OP_WATCH = 3, CEPH_OSD_WATCH_OP_RECONNECT = 5, CEPH_OSD_WATCH_OP_PING = 7, }; const char *ceph_osd_watch_op_name(int o); enum { CEPH_OSD_ALLOC_HINT_FLAG_SEQUENTIAL_WRITE = 1, CEPH_OSD_ALLOC_HINT_FLAG_RANDOM_WRITE = 2, CEPH_OSD_ALLOC_HINT_FLAG_SEQUENTIAL_READ = 4, CEPH_OSD_ALLOC_HINT_FLAG_RANDOM_READ = 8, CEPH_OSD_ALLOC_HINT_FLAG_APPEND_ONLY = 16, CEPH_OSD_ALLOC_HINT_FLAG_IMMUTABLE = 32, CEPH_OSD_ALLOC_HINT_FLAG_SHORTLIVED = 64, CEPH_OSD_ALLOC_HINT_FLAG_LONGLIVED = 128, CEPH_OSD_ALLOC_HINT_FLAG_COMPRESSIBLE = 256, CEPH_OSD_ALLOC_HINT_FLAG_INCOMPRESSIBLE = 512, }; enum { CEPH_OSD_BACKOFF_OP_BLOCK = 1, CEPH_OSD_BACKOFF_OP_ACK_BLOCK = 2, CEPH_OSD_BACKOFF_OP_UNBLOCK = 3, }; /* * an individual object operation. each may be accompanied by some data * payload */ struct ceph_osd_op { __le16 op; /* CEPH_OSD_OP_* */ __le32 flags; /* CEPH_OSD_OP_FLAG_* */ union { struct { __le64 offset, length; __le64 truncate_size; __le32 truncate_seq; } __attribute__ ((packed)) extent; struct { __le32 name_len; __le32 value_len; __u8 cmp_op; /* CEPH_OSD_CMPXATTR_OP_* */ __u8 cmp_mode; /* CEPH_OSD_CMPXATTR_MODE_* */ } __attribute__ ((packed)) xattr; struct { __u8 class_len; __u8 method_len; __u8 argc; __le32 indata_len; } __attribute__ ((packed)) cls; struct { __le64 cookie, count; } __attribute__ ((packed)) pgls; struct { __le64 snapid; } __attribute__ ((packed)) snap; struct { __le64 cookie; __le64 ver; /* no longer used */ __u8 op; /* CEPH_OSD_WATCH_OP_* */ __le32 gen; /* registration generation */ } __attribute__ ((packed)) watch; struct { __le64 cookie; } __attribute__ ((packed)) notify; struct { __le64 offset, length; __le64 src_offset; } __attribute__ ((packed)) clonerange; struct { __le64 expected_object_size; __le64 expected_write_size; __le32 flags; /* CEPH_OSD_OP_ALLOC_HINT_FLAG_* */ } __attribute__ ((packed)) alloc_hint; struct { __le64 snapid; __le64 src_version; __u8 flags; /* CEPH_OSD_COPY_FROM_FLAG_* */ /* * CEPH_OSD_OP_FLAG_FADVISE_*: fadvise flags * for src object, flags for dest object are in * ceph_osd_op::flags. */ __le32 src_fadvise_flags; } __attribute__ ((packed)) copy_from; }; __le32 payload_len; } __attribute__ ((packed)); #endif PK ! ���>� � ceph/ceph_hash.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef FS_CEPH_HASH_H #define FS_CEPH_HASH_H #define CEPH_STR_HASH_LINUX 0x1 /* linux dcache hash */ #define CEPH_STR_HASH_RJENKINS 0x2 /* robert jenkins' */ extern unsigned ceph_str_hash_linux(const char *s, unsigned len); extern unsigned ceph_str_hash_rjenkins(const char *s, unsigned len); extern unsigned ceph_str_hash(int type, const char *s, unsigned len); extern const char *ceph_str_hash_name(int type); #endif PK ! Ae�ZA A ceph/buffer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __FS_CEPH_BUFFER_H #define __FS_CEPH_BUFFER_H #include <linux/kref.h> #include <linux/mm.h> #include <linux/vmalloc.h> #include <linux/types.h> #include <linux/uio.h> /* * a simple reference counted buffer. * * use kmalloc for smaller sizes, vmalloc for larger sizes. */ struct ceph_buffer { struct kref kref; struct kvec vec; size_t alloc_len; }; extern struct ceph_buffer *ceph_buffer_new(size_t len, gfp_t gfp); extern void ceph_buffer_release(struct kref *kref); static inline struct ceph_buffer *ceph_buffer_get(struct ceph_buffer *b) { kref_get(&b->kref); return b; } static inline void ceph_buffer_put(struct ceph_buffer *b) { if (b) kref_put(&b->kref, ceph_buffer_release); } extern int ceph_decode_buffer(struct ceph_buffer **b, void **p, void *end); #endif PK ! �+��j j ceph/debugfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_DEBUGFS_H #define _FS_CEPH_DEBUGFS_H #include <linux/ceph/types.h> /* debugfs.c */ extern void ceph_debugfs_init(void); extern void ceph_debugfs_cleanup(void); extern void ceph_debugfs_client_init(struct ceph_client *client); extern void ceph_debugfs_client_cleanup(struct ceph_client *client); #endif PK ! tª�G �G ceph/messenger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __FS_CEPH_MESSENGER_H #define __FS_CEPH_MESSENGER_H #include <linux/bvec.h> #include <linux/crypto.h> #include <linux/kref.h> #include <linux/mutex.h> #include <linux/net.h> #include <linux/radix-tree.h> #include <linux/uio.h> #include <linux/workqueue.h> #include <net/net_namespace.h> #include <linux/ceph/types.h> #include <linux/ceph/buffer.h> struct ceph_msg; struct ceph_connection; /* * Ceph defines these callbacks for handling connection events. */ struct ceph_connection_operations { struct ceph_connection *(*get)(struct ceph_connection *); void (*put)(struct ceph_connection *); /* handle an incoming message. */ void (*dispatch) (struct ceph_connection *con, struct ceph_msg *m); /* authorize an outgoing connection */ struct ceph_auth_handshake *(*get_authorizer) ( struct ceph_connection *con, int *proto, int force_new); int (*add_authorizer_challenge)(struct ceph_connection *con, void *challenge_buf, int challenge_buf_len); int (*verify_authorizer_reply) (struct ceph_connection *con); int (*invalidate_authorizer)(struct ceph_connection *con); /* there was some error on the socket (disconnect, whatever) */ void (*fault) (struct ceph_connection *con); /* a remote host as terminated a message exchange session, and messages * we sent (or they tried to send us) may be lost. */ void (*peer_reset) (struct ceph_connection *con); struct ceph_msg * (*alloc_msg) (struct ceph_connection *con, struct ceph_msg_header *hdr, int *skip); void (*reencode_message) (struct ceph_msg *msg); int (*sign_message) (struct ceph_msg *msg); int (*check_message_signature) (struct ceph_msg *msg); /* msgr2 authentication exchange */ int (*get_auth_request)(struct ceph_connection *con, void *buf, int *buf_len, void **authorizer, int *authorizer_len); int (*handle_auth_reply_more)(struct ceph_connection *con, void *reply, int reply_len, void *buf, int *buf_len, void **authorizer, int *authorizer_len); int (*handle_auth_done)(struct ceph_connection *con, u64 global_id, void *reply, int reply_len, u8 *session_key, int *session_key_len, u8 *con_secret, int *con_secret_len); int (*handle_auth_bad_method)(struct ceph_connection *con, int used_proto, int result, const int *allowed_protos, int proto_cnt, const int *allowed_modes, int mode_cnt); }; /* use format string %s%lld */ #define ENTITY_NAME(n) ceph_entity_type_name((n).type), le64_to_cpu((n).num) struct ceph_messenger { struct ceph_entity_inst inst; /* my name+address */ struct ceph_entity_addr my_enc_addr; atomic_t stopping; possible_net_t net; /* * the global_seq counts connections i (attempt to) initiate * in order to disambiguate certain connect race conditions. */ u32 global_seq; spinlock_t global_seq_lock; }; enum ceph_msg_data_type { CEPH_MSG_DATA_NONE, /* message contains no data payload */ CEPH_MSG_DATA_PAGES, /* data source/destination is a page array */ CEPH_MSG_DATA_PAGELIST, /* data source/destination is a pagelist */ #ifdef CONFIG_BLOCK CEPH_MSG_DATA_BIO, /* data source/destination is a bio list */ #endif /* CONFIG_BLOCK */ CEPH_MSG_DATA_BVECS, /* data source/destination is a bio_vec array */ }; #ifdef CONFIG_BLOCK struct ceph_bio_iter { struct bio *bio; struct bvec_iter iter; }; #define __ceph_bio_iter_advance_step(it, n, STEP) do { \ unsigned int __n = (n), __cur_n; \ \ while (__n) { \ BUG_ON(!(it)->iter.bi_size); \ __cur_n = min((it)->iter.bi_size, __n); \ (void)(STEP); \ bio_advance_iter((it)->bio, &(it)->iter, __cur_n); \ if (!(it)->iter.bi_size && (it)->bio->bi_next) { \ dout("__ceph_bio_iter_advance_step next bio\n"); \ (it)->bio = (it)->bio->bi_next; \ (it)->iter = (it)->bio->bi_iter; \ } \ __n -= __cur_n; \ } \ } while (0) /* * Advance @it by @n bytes. */ #define ceph_bio_iter_advance(it, n) \ __ceph_bio_iter_advance_step(it, n, 0) /* * Advance @it by @n bytes, executing BVEC_STEP for each bio_vec. */ #define ceph_bio_iter_advance_step(it, n, BVEC_STEP) \ __ceph_bio_iter_advance_step(it, n, ({ \ struct bio_vec bv; \ struct bvec_iter __cur_iter; \ \ __cur_iter = (it)->iter; \ __cur_iter.bi_size = __cur_n; \ __bio_for_each_segment(bv, (it)->bio, __cur_iter, __cur_iter) \ (void)(BVEC_STEP); \ })) #endif /* CONFIG_BLOCK */ struct ceph_bvec_iter { struct bio_vec *bvecs; struct bvec_iter iter; }; #define __ceph_bvec_iter_advance_step(it, n, STEP) do { \ BUG_ON((n) > (it)->iter.bi_size); \ (void)(STEP); \ bvec_iter_advance((it)->bvecs, &(it)->iter, (n)); \ } while (0) /* * Advance @it by @n bytes. */ #define ceph_bvec_iter_advance(it, n) \ __ceph_bvec_iter_advance_step(it, n, 0) /* * Advance @it by @n bytes, executing BVEC_STEP for each bio_vec. */ #define ceph_bvec_iter_advance_step(it, n, BVEC_STEP) \ __ceph_bvec_iter_advance_step(it, n, ({ \ struct bio_vec bv; \ struct bvec_iter __cur_iter; \ \ __cur_iter = (it)->iter; \ __cur_iter.bi_size = (n); \ for_each_bvec(bv, (it)->bvecs, __cur_iter, __cur_iter) \ (void)(BVEC_STEP); \ })) #define ceph_bvec_iter_shorten(it, n) do { \ BUG_ON((n) > (it)->iter.bi_size); \ (it)->iter.bi_size = (n); \ } while (0) struct ceph_msg_data { enum ceph_msg_data_type type; union { #ifdef CONFIG_BLOCK struct { struct ceph_bio_iter bio_pos; u32 bio_length; }; #endif /* CONFIG_BLOCK */ struct ceph_bvec_iter bvec_pos; struct { struct page **pages; size_t length; /* total # bytes */ unsigned int alignment; /* first page */ bool own_pages; }; struct ceph_pagelist *pagelist; }; }; struct ceph_msg_data_cursor { size_t total_resid; /* across all data items */ struct ceph_msg_data *data; /* current data item */ size_t resid; /* bytes not yet consumed */ bool last_piece; /* current is last piece */ bool need_crc; /* crc update needed */ union { #ifdef CONFIG_BLOCK struct ceph_bio_iter bio_iter; #endif /* CONFIG_BLOCK */ struct bvec_iter bvec_iter; struct { /* pages */ unsigned int page_offset; /* offset in page */ unsigned short page_index; /* index in array */ unsigned short page_count; /* pages in array */ }; struct { /* pagelist */ struct page *page; /* page from list */ size_t offset; /* bytes from list */ }; }; }; /* * a single message. it contains a header (src, dest, message type, etc.), * footer (crc values, mainly), a "front" message body, and possibly a * data payload (stored in some number of pages). */ struct ceph_msg { struct ceph_msg_header hdr; /* header */ union { struct ceph_msg_footer footer; /* footer */ struct ceph_msg_footer_old old_footer; /* old format footer */ }; struct kvec front; /* unaligned blobs of message */ struct ceph_buffer *middle; size_t data_length; struct ceph_msg_data *data; int num_data_items; int max_data_items; struct ceph_msg_data_cursor cursor; struct ceph_connection *con; struct list_head list_head; /* links for connection lists */ struct kref kref; bool more_to_follow; bool needs_out_seq; int front_alloc_len; struct ceph_msgpool *pool; }; /* * connection states */ #define CEPH_CON_S_CLOSED 1 #define CEPH_CON_S_PREOPEN 2 #define CEPH_CON_S_V1_BANNER 3 #define CEPH_CON_S_V1_CONNECT_MSG 4 #define CEPH_CON_S_V2_BANNER_PREFIX 5 #define CEPH_CON_S_V2_BANNER_PAYLOAD 6 #define CEPH_CON_S_V2_HELLO 7 #define CEPH_CON_S_V2_AUTH 8 #define CEPH_CON_S_V2_AUTH_SIGNATURE 9 #define CEPH_CON_S_V2_SESSION_CONNECT 10 #define CEPH_CON_S_V2_SESSION_RECONNECT 11 #define CEPH_CON_S_OPEN 12 #define CEPH_CON_S_STANDBY 13 /* * ceph_connection flag bits */ #define CEPH_CON_F_LOSSYTX 0 /* we can close channel or drop messages on errors */ #define CEPH_CON_F_KEEPALIVE_PENDING 1 /* we need to send a keepalive */ #define CEPH_CON_F_WRITE_PENDING 2 /* we have data ready to send */ #define CEPH_CON_F_SOCK_CLOSED 3 /* socket state changed to closed */ #define CEPH_CON_F_BACKOFF 4 /* need to retry queuing delayed work */ /* ceph connection fault delay defaults, for exponential backoff */ #define BASE_DELAY_INTERVAL (HZ / 4) #define MAX_DELAY_INTERVAL (15 * HZ) struct ceph_connection_v1_info { struct kvec out_kvec[8], /* sending header/footer data */ *out_kvec_cur; int out_kvec_left; /* kvec's left in out_kvec */ int out_skip; /* skip this many bytes */ int out_kvec_bytes; /* total bytes left */ bool out_more; /* there is more data after the kvecs */ bool out_msg_done; struct ceph_auth_handshake *auth; int auth_retry; /* true if we need a newer authorizer */ /* connection negotiation temps */ u8 in_banner[CEPH_BANNER_MAX_LEN]; struct ceph_entity_addr actual_peer_addr; struct ceph_entity_addr peer_addr_for_me; struct ceph_msg_connect out_connect; struct ceph_msg_connect_reply in_reply; int in_base_pos; /* bytes read */ /* message in temps */ u8 in_tag; /* protocol control byte */ struct ceph_msg_header in_hdr; __le64 in_temp_ack; /* for reading an ack */ /* message out temps */ struct ceph_msg_header out_hdr; __le64 out_temp_ack; /* for writing an ack */ struct ceph_timespec out_temp_keepalive2; /* for writing keepalive2 stamp */ u32 connect_seq; /* identify the most recent connection attempt for this session */ u32 peer_global_seq; /* peer's global seq for this connection */ }; #define CEPH_CRC_LEN 4 #define CEPH_GCM_KEY_LEN 16 #define CEPH_GCM_IV_LEN sizeof(struct ceph_gcm_nonce) #define CEPH_GCM_BLOCK_LEN 16 #define CEPH_GCM_TAG_LEN 16 #define CEPH_PREAMBLE_LEN 32 #define CEPH_PREAMBLE_INLINE_LEN 48 #define CEPH_PREAMBLE_PLAIN_LEN CEPH_PREAMBLE_LEN #define CEPH_PREAMBLE_SECURE_LEN (CEPH_PREAMBLE_LEN + \ CEPH_PREAMBLE_INLINE_LEN + \ CEPH_GCM_TAG_LEN) #define CEPH_EPILOGUE_PLAIN_LEN (1 + 3 * CEPH_CRC_LEN) #define CEPH_EPILOGUE_SECURE_LEN (CEPH_GCM_BLOCK_LEN + CEPH_GCM_TAG_LEN) #define CEPH_FRAME_MAX_SEGMENT_COUNT 4 struct ceph_frame_desc { int fd_tag; /* FRAME_TAG_* */ int fd_seg_cnt; int fd_lens[CEPH_FRAME_MAX_SEGMENT_COUNT]; /* logical */ int fd_aligns[CEPH_FRAME_MAX_SEGMENT_COUNT]; }; struct ceph_gcm_nonce { __le32 fixed; __le64 counter __packed; }; struct ceph_connection_v2_info { struct iov_iter in_iter; struct kvec in_kvecs[5]; /* recvmsg */ struct bio_vec in_bvec; /* recvmsg (in_cursor) */ int in_kvec_cnt; int in_state; /* IN_S_* */ struct iov_iter out_iter; struct kvec out_kvecs[8]; /* sendmsg */ struct bio_vec out_bvec; /* sendpage (out_cursor, out_zero), sendmsg (out_enc_pages) */ int out_kvec_cnt; int out_state; /* OUT_S_* */ int out_zero; /* # of zero bytes to send */ bool out_iter_sendpage; /* use sendpage if possible */ struct ceph_frame_desc in_desc; struct ceph_msg_data_cursor in_cursor; struct ceph_msg_data_cursor out_cursor; struct crypto_shash *hmac_tfm; /* post-auth signature */ struct crypto_aead *gcm_tfm; /* on-wire encryption */ struct aead_request *gcm_req; struct crypto_wait gcm_wait; struct ceph_gcm_nonce in_gcm_nonce; struct ceph_gcm_nonce out_gcm_nonce; struct page **out_enc_pages; int out_enc_page_cnt; int out_enc_resid; int out_enc_i; int con_mode; /* CEPH_CON_MODE_* */ void *conn_bufs[16]; int conn_buf_cnt; struct kvec in_sign_kvecs[8]; struct kvec out_sign_kvecs[8]; int in_sign_kvec_cnt; int out_sign_kvec_cnt; u64 client_cookie; u64 server_cookie; u64 global_seq; u64 connect_seq; u64 peer_global_seq; u8 in_buf[CEPH_PREAMBLE_SECURE_LEN]; u8 out_buf[CEPH_PREAMBLE_SECURE_LEN]; struct { u8 late_status; /* FRAME_LATE_STATUS_* */ union { struct { u32 front_crc; u32 middle_crc; u32 data_crc; } __packed; u8 pad[CEPH_GCM_BLOCK_LEN - 1]; }; } out_epil; }; /* * A single connection with another host. * * We maintain a queue of outgoing messages, and some session state to * ensure that we can preserve the lossless, ordered delivery of * messages in the case of a TCP disconnect. */ struct ceph_connection { void *private; const struct ceph_connection_operations *ops; struct ceph_messenger *msgr; int state; /* CEPH_CON_S_* */ atomic_t sock_state; struct socket *sock; unsigned long flags; /* CEPH_CON_F_* */ const char *error_msg; /* error message, if any */ struct ceph_entity_name peer_name; /* peer name */ struct ceph_entity_addr peer_addr; /* peer address */ u64 peer_features; struct mutex mutex; /* out queue */ struct list_head out_queue; struct list_head out_sent; /* sending or sent but unacked */ u64 out_seq; /* last message queued for send */ u64 in_seq, in_seq_acked; /* last message received, acked */ struct ceph_msg *in_msg; struct ceph_msg *out_msg; /* sending message (== tail of out_sent) */ u32 in_front_crc, in_middle_crc, in_data_crc; /* calculated crc */ struct timespec64 last_keepalive_ack; /* keepalive2 ack stamp */ struct delayed_work work; /* send|recv work */ unsigned long delay; /* current delay interval */ union { struct ceph_connection_v1_info v1; struct ceph_connection_v2_info v2; }; }; extern struct page *ceph_zero_page; void ceph_con_flag_clear(struct ceph_connection *con, unsigned long con_flag); void ceph_con_flag_set(struct ceph_connection *con, unsigned long con_flag); bool ceph_con_flag_test(struct ceph_connection *con, unsigned long con_flag); bool ceph_con_flag_test_and_clear(struct ceph_connection *con, unsigned long con_flag); bool ceph_con_flag_test_and_set(struct ceph_connection *con, unsigned long con_flag); void ceph_encode_my_addr(struct ceph_messenger *msgr); int ceph_tcp_connect(struct ceph_connection *con); int ceph_con_close_socket(struct ceph_connection *con); void ceph_con_reset_session(struct ceph_connection *con); u32 ceph_get_global_seq(struct ceph_messenger *msgr, u32 gt); void ceph_con_discard_sent(struct ceph_connection *con, u64 ack_seq); void ceph_con_discard_requeued(struct ceph_connection *con, u64 reconnect_seq); void ceph_msg_data_cursor_init(struct ceph_msg_data_cursor *cursor, struct ceph_msg *msg, size_t length); struct page *ceph_msg_data_next(struct ceph_msg_data_cursor *cursor, size_t *page_offset, size_t *length, bool *last_piece); void ceph_msg_data_advance(struct ceph_msg_data_cursor *cursor, size_t bytes); u32 ceph_crc32c_page(u32 crc, struct page *page, unsigned int page_offset, unsigned int length); bool ceph_addr_is_blank(const struct ceph_entity_addr *addr); int ceph_addr_port(const struct ceph_entity_addr *addr); void ceph_addr_set_port(struct ceph_entity_addr *addr, int p); void ceph_con_process_message(struct ceph_connection *con); int ceph_con_in_msg_alloc(struct ceph_connection *con, struct ceph_msg_header *hdr, int *skip); void ceph_con_get_out_msg(struct ceph_connection *con); /* messenger_v1.c */ int ceph_con_v1_try_read(struct ceph_connection *con); int ceph_con_v1_try_write(struct ceph_connection *con); void ceph_con_v1_revoke(struct ceph_connection *con); void ceph_con_v1_revoke_incoming(struct ceph_connection *con); bool ceph_con_v1_opened(struct ceph_connection *con); void ceph_con_v1_reset_session(struct ceph_connection *con); void ceph_con_v1_reset_protocol(struct ceph_connection *con); /* messenger_v2.c */ int ceph_con_v2_try_read(struct ceph_connection *con); int ceph_con_v2_try_write(struct ceph_connection *con); void ceph_con_v2_revoke(struct ceph_connection *con); void ceph_con_v2_revoke_incoming(struct ceph_connection *con); bool ceph_con_v2_opened(struct ceph_connection *con); void ceph_con_v2_reset_session(struct ceph_connection *con); void ceph_con_v2_reset_protocol(struct ceph_connection *con); extern const char *ceph_pr_addr(const struct ceph_entity_addr *addr); extern int ceph_parse_ips(const char *c, const char *end, struct ceph_entity_addr *addr, int max_count, int *count); extern int ceph_msgr_init(void); extern void ceph_msgr_exit(void); extern void ceph_msgr_flush(void); extern void ceph_messenger_init(struct ceph_messenger *msgr, struct ceph_entity_addr *myaddr); extern void ceph_messenger_fini(struct ceph_messenger *msgr); extern void ceph_messenger_reset_nonce(struct ceph_messenger *msgr); extern void ceph_con_init(struct ceph_connection *con, void *private, const struct ceph_connection_operations *ops, struct ceph_messenger *msgr); extern void ceph_con_open(struct ceph_connection *con, __u8 entity_type, __u64 entity_num, struct ceph_entity_addr *addr); extern bool ceph_con_opened(struct ceph_connection *con); extern void ceph_con_close(struct ceph_connection *con); extern void ceph_con_send(struct ceph_connection *con, struct ceph_msg *msg); extern void ceph_msg_revoke(struct ceph_msg *msg); extern void ceph_msg_revoke_incoming(struct ceph_msg *msg); extern void ceph_con_keepalive(struct ceph_connection *con); extern bool ceph_con_keepalive_expired(struct ceph_connection *con, unsigned long interval); void ceph_msg_data_add_pages(struct ceph_msg *msg, struct page **pages, size_t length, size_t alignment, bool own_pages); extern void ceph_msg_data_add_pagelist(struct ceph_msg *msg, struct ceph_pagelist *pagelist); #ifdef CONFIG_BLOCK void ceph_msg_data_add_bio(struct ceph_msg *msg, struct ceph_bio_iter *bio_pos, u32 length); #endif /* CONFIG_BLOCK */ void ceph_msg_data_add_bvecs(struct ceph_msg *msg, struct ceph_bvec_iter *bvec_pos); struct ceph_msg *ceph_msg_new2(int type, int front_len, int max_data_items, gfp_t flags, bool can_fail); extern struct ceph_msg *ceph_msg_new(int type, int front_len, gfp_t flags, bool can_fail); extern struct ceph_msg *ceph_msg_get(struct ceph_msg *msg); extern void ceph_msg_put(struct ceph_msg *msg); extern void ceph_msg_dump(struct ceph_msg *msg); #endif PK ! R��b. . ceph/types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_TYPES_H #define _FS_CEPH_TYPES_H /* needed before including ceph_fs.h */ #include <linux/in.h> #include <linux/types.h> #include <linux/fcntl.h> #include <linux/string.h> #include <linux/ceph/ceph_fs.h> #include <linux/ceph/ceph_frag.h> #include <linux/ceph/ceph_hash.h> /* * Identify inodes by both their ino AND snapshot id (a u64). */ struct ceph_vino { u64 ino; u64 snap; }; /* context for the caps reservation mechanism */ struct ceph_cap_reservation { int count; int used; }; #endif PK ! ��� � ceph/ceph_frag.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef FS_CEPH_FRAG_H #define FS_CEPH_FRAG_H /* * "Frags" are a way to describe a subset of a 32-bit number space, * using a mask and a value to match against that mask. Any given frag * (subset of the number space) can be partitioned into 2^n sub-frags. * * Frags are encoded into a 32-bit word: * 8 upper bits = "bits" * 24 lower bits = "value" * (We could go to 5+27 bits, but who cares.) * * We use the _most_ significant bits of the 24 bit value. This makes * values logically sort. * * Unfortunately, because the "bits" field is still in the high bits, we * can't sort encoded frags numerically. However, it does allow you * to feed encoded frags as values into frag_contains_value. */ static inline __u32 ceph_frag_make(__u32 b, __u32 v) { return (b << 24) | (v & (0xffffffu << (24-b)) & 0xffffffu); } static inline __u32 ceph_frag_bits(__u32 f) { return f >> 24; } static inline __u32 ceph_frag_value(__u32 f) { return f & 0xffffffu; } static inline __u32 ceph_frag_mask(__u32 f) { return (0xffffffu << (24-ceph_frag_bits(f))) & 0xffffffu; } static inline __u32 ceph_frag_mask_shift(__u32 f) { return 24 - ceph_frag_bits(f); } static inline bool ceph_frag_contains_value(__u32 f, __u32 v) { return (v & ceph_frag_mask(f)) == ceph_frag_value(f); } static inline __u32 ceph_frag_make_child(__u32 f, int by, int i) { int newbits = ceph_frag_bits(f) + by; return ceph_frag_make(newbits, ceph_frag_value(f) | (i << (24 - newbits))); } static inline bool ceph_frag_is_leftmost(__u32 f) { return ceph_frag_value(f) == 0; } static inline bool ceph_frag_is_rightmost(__u32 f) { return ceph_frag_value(f) == ceph_frag_mask(f); } static inline __u32 ceph_frag_next(__u32 f) { return ceph_frag_make(ceph_frag_bits(f), ceph_frag_value(f) + (0x1000000 >> ceph_frag_bits(f))); } /* * comparator to sort frags logically, as when traversing the * number space in ascending order... */ int ceph_frag_compare(__u32 a, __u32 b); #endif PK ! �8��� � ceph/striper.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CEPH_STRIPER_H #define _LINUX_CEPH_STRIPER_H #include <linux/list.h> #include <linux/types.h> struct ceph_file_layout; void ceph_calc_file_object_mapping(struct ceph_file_layout *l, u64 off, u64 len, u64 *objno, u64 *objoff, u32 *xlen); struct ceph_object_extent { struct list_head oe_item; u64 oe_objno; u64 oe_off; u64 oe_len; }; static inline void ceph_object_extent_init(struct ceph_object_extent *ex) { INIT_LIST_HEAD(&ex->oe_item); } /* * Called for each mapped stripe unit. * * @bytes: number of bytes mapped, i.e. the minimum of the full length * requested (file extent length) or the remainder of the stripe * unit within an object */ typedef void (*ceph_object_extent_fn_t)(struct ceph_object_extent *ex, u32 bytes, void *arg); int ceph_file_to_extents(struct ceph_file_layout *l, u64 off, u64 len, struct list_head *object_extents, struct ceph_object_extent *alloc_fn(void *arg), void *alloc_arg, ceph_object_extent_fn_t action_fn, void *action_arg); int ceph_iterate_extents(struct ceph_file_layout *l, u64 off, u64 len, struct list_head *object_extents, ceph_object_extent_fn_t action_fn, void *action_arg); struct ceph_file_extent { u64 fe_off; u64 fe_len; }; static inline u64 ceph_file_extents_bytes(struct ceph_file_extent *file_extents, u32 num_file_extents) { u64 bytes = 0; u32 i; for (i = 0; i < num_file_extents; i++) bytes += file_extents[i].fe_len; return bytes; } int ceph_extent_to_file(struct ceph_file_layout *l, u64 objno, u64 objoff, u64 objlen, struct ceph_file_extent **file_extents, u32 *num_file_extents); u64 ceph_get_num_objects(struct ceph_file_layout *l, u64 size); #endif PK ! -6���" �" ceph/ceph_features.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __CEPH_FEATURES #define __CEPH_FEATURES /* * Each time we reclaim bits for reuse we need to specify another bit * that, if present, indicates we have the new incarnation of that * feature. Base case is 1 (first use). */ #define CEPH_FEATURE_INCARNATION_1 (0ull) #define CEPH_FEATURE_INCARNATION_2 (1ull<<57) // SERVER_JEWEL #define CEPH_FEATURE_INCARNATION_3 ((1ull<<57)|(1ull<<28)) // SERVER_MIMIC #define DEFINE_CEPH_FEATURE(bit, incarnation, name) \ static const uint64_t __maybe_unused CEPH_FEATURE_##name = (1ULL<<bit); \ static const uint64_t __maybe_unused CEPH_FEATUREMASK_##name = \ (1ULL<<bit | CEPH_FEATURE_INCARNATION_##incarnation); /* this bit is ignored but still advertised by release *when* */ #define DEFINE_CEPH_FEATURE_DEPRECATED(bit, incarnation, name, when) \ static const uint64_t __maybe_unused DEPRECATED_CEPH_FEATURE_##name = (1ULL<<bit); \ static const uint64_t __maybe_unused DEPRECATED_CEPH_FEATUREMASK_##name = \ (1ULL<<bit | CEPH_FEATURE_INCARNATION_##incarnation); /* * this bit is ignored by release *unused* and not advertised by * release *unadvertised* */ #define DEFINE_CEPH_FEATURE_RETIRED(bit, inc, name, unused, unadvertised) /* * test for a feature. this test is safer than a typical mask against * the bit because it ensures that we have the bit AND the marker for the * bit's incarnation. this must be used in any case where the features * bits may include an old meaning of the bit. */ #define CEPH_HAVE_FEATURE(x, name) \ (((x) & (CEPH_FEATUREMASK_##name)) == (CEPH_FEATUREMASK_##name)) /* * Notes on deprecation: * * A *major* release is a release through which all upgrades must pass * (e.g., jewel). For example, no pre-jewel server will ever talk to * a post-jewel server (mon, osd, etc). * * For feature bits used *only* on the server-side: * * - In the first phase we indicate that a feature is DEPRECATED as of * a particular release. This is the first major release X (say, * jewel) that does not depend on its peers advertising the feature. * That is, it safely assumes its peers all have the feature. We * indicate this with the DEPRECATED macro. For example, * * DEFINE_CEPH_FEATURE_DEPRECATED( 2, 1, MONCLOCKCHECK, JEWEL) * * because 10.2.z (jewel) did not care if its peers advertised this * feature bit. * * - In the second phase we stop advertising the bit and call it * RETIRED. This can normally be done in the *next* major release * following the one in which we marked the feature DEPRECATED. In * the above example, for 12.0.z (luminous) we can say: * * DEFINE_CEPH_FEATURE_RETIRED( 2, 1, MONCLOCKCHECK, JEWEL, LUMINOUS) * * - The bit can be reused in the first post-luminous release, 13.0.z * (m). * * This ensures that no two versions who have different meanings for * the bit ever speak to each other. */ DEFINE_CEPH_FEATURE( 0, 1, UID) DEFINE_CEPH_FEATURE( 1, 1, NOSRCADDR) DEFINE_CEPH_FEATURE_RETIRED( 2, 1, MONCLOCKCHECK, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE( 2, 3, SERVER_NAUTILUS) DEFINE_CEPH_FEATURE( 3, 1, FLOCK) DEFINE_CEPH_FEATURE( 4, 1, SUBSCRIBE2) DEFINE_CEPH_FEATURE( 5, 1, MONNAMES) DEFINE_CEPH_FEATURE( 6, 1, RECONNECT_SEQ) DEFINE_CEPH_FEATURE( 7, 1, DIRLAYOUTHASH) DEFINE_CEPH_FEATURE( 8, 1, OBJECTLOCATOR) DEFINE_CEPH_FEATURE( 9, 1, PGID64) DEFINE_CEPH_FEATURE(10, 1, INCSUBOSDMAP) DEFINE_CEPH_FEATURE(11, 1, PGPOOL3) DEFINE_CEPH_FEATURE(12, 1, OSDREPLYMUX) DEFINE_CEPH_FEATURE(13, 1, OSDENC) DEFINE_CEPH_FEATURE_RETIRED(14, 1, OMAP, HAMMER, JEWEL) DEFINE_CEPH_FEATURE(14, 2, SERVER_KRAKEN) DEFINE_CEPH_FEATURE(15, 1, MONENC) DEFINE_CEPH_FEATURE_RETIRED(16, 1, QUERY_T, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE_RETIRED(17, 1, INDEP_PG_MAP, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE(18, 1, CRUSH_TUNABLES) DEFINE_CEPH_FEATURE_RETIRED(19, 1, CHUNKY_SCRUB, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE_RETIRED(20, 1, MON_NULLROUTE, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE_RETIRED(21, 1, MON_GV, HAMMER, JEWEL) DEFINE_CEPH_FEATURE(21, 2, SERVER_LUMINOUS) DEFINE_CEPH_FEATURE(21, 2, RESEND_ON_SPLIT) // overlap DEFINE_CEPH_FEATURE(21, 2, RADOS_BACKOFF) // overlap DEFINE_CEPH_FEATURE(21, 2, OSDMAP_PG_UPMAP) // overlap DEFINE_CEPH_FEATURE(21, 2, CRUSH_CHOOSE_ARGS) // overlap DEFINE_CEPH_FEATURE_RETIRED(22, 1, BACKFILL_RESERVATION, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE(23, 1, MSG_AUTH) DEFINE_CEPH_FEATURE_RETIRED(24, 1, RECOVERY_RESERVATION, JEWEL, LUNINOUS) DEFINE_CEPH_FEATURE(25, 1, CRUSH_TUNABLES2) DEFINE_CEPH_FEATURE(26, 1, CREATEPOOLID) DEFINE_CEPH_FEATURE(27, 1, REPLY_CREATE_INODE) DEFINE_CEPH_FEATURE_RETIRED(28, 1, OSD_HBMSGS, HAMMER, JEWEL) DEFINE_CEPH_FEATURE(28, 2, SERVER_MIMIC) DEFINE_CEPH_FEATURE(29, 1, MDSENC) DEFINE_CEPH_FEATURE(30, 1, OSDHASHPSPOOL) DEFINE_CEPH_FEATURE(31, 1, MON_SINGLE_PAXOS) // deprecate me DEFINE_CEPH_FEATURE_RETIRED(32, 1, OSD_SNAPMAPPER, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE_RETIRED(33, 1, MON_SCRUB, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE_RETIRED(34, 1, OSD_PACKED_RECOVERY, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE(35, 1, OSD_CACHEPOOL) DEFINE_CEPH_FEATURE(36, 1, CRUSH_V2) DEFINE_CEPH_FEATURE(37, 1, EXPORT_PEER) DEFINE_CEPH_FEATURE(38, 1, OSD_ERASURE_CODES) DEFINE_CEPH_FEATURE(38, 1, OSD_OSD_TMAP2OMAP) // overlap DEFINE_CEPH_FEATURE(39, 1, OSDMAP_ENC) DEFINE_CEPH_FEATURE(40, 1, MDS_INLINE_DATA) DEFINE_CEPH_FEATURE(41, 1, CRUSH_TUNABLES3) DEFINE_CEPH_FEATURE(41, 1, OSD_PRIMARY_AFFINITY) // overlap DEFINE_CEPH_FEATURE(42, 1, MSGR_KEEPALIVE2) DEFINE_CEPH_FEATURE(43, 1, OSD_POOLRESEND) DEFINE_CEPH_FEATURE(44, 1, ERASURE_CODE_PLUGINS_V2) DEFINE_CEPH_FEATURE_RETIRED(45, 1, OSD_SET_ALLOC_HINT, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE(46, 1, OSD_FADVISE_FLAGS) DEFINE_CEPH_FEATURE_RETIRED(46, 1, OSD_REPOP, JEWEL, LUMINOUS) // overlap DEFINE_CEPH_FEATURE_RETIRED(46, 1, OSD_OBJECT_DIGEST, JEWEL, LUMINOUS) // overlap DEFINE_CEPH_FEATURE_RETIRED(46, 1, OSD_TRANSACTION_MAY_LAYOUT, JEWEL, LUMINOUS) // overlap DEFINE_CEPH_FEATURE(47, 1, MDS_QUOTA) DEFINE_CEPH_FEATURE(48, 1, CRUSH_V4) DEFINE_CEPH_FEATURE_RETIRED(49, 1, OSD_MIN_SIZE_RECOVERY, JEWEL, LUMINOUS) DEFINE_CEPH_FEATURE_RETIRED(49, 1, OSD_PROXY_FEATURES, JEWEL, LUMINOUS) // overlap DEFINE_CEPH_FEATURE(50, 1, MON_METADATA) DEFINE_CEPH_FEATURE(51, 1, OSD_BITWISE_HOBJ_SORT) DEFINE_CEPH_FEATURE(52, 1, OSD_PROXY_WRITE_FEATURES) DEFINE_CEPH_FEATURE(53, 1, ERASURE_CODE_PLUGINS_V3) DEFINE_CEPH_FEATURE(54, 1, OSD_HITSET_GMT) DEFINE_CEPH_FEATURE(55, 1, HAMMER_0_94_4) DEFINE_CEPH_FEATURE(56, 1, NEW_OSDOP_ENCODING) DEFINE_CEPH_FEATURE(57, 1, MON_STATEFUL_SUB) DEFINE_CEPH_FEATURE(57, 1, MON_ROUTE_OSDMAP) // overlap DEFINE_CEPH_FEATURE(57, 1, OSDSUBOP_NO_SNAPCONTEXT) // overlap DEFINE_CEPH_FEATURE(57, 1, SERVER_JEWEL) // overlap DEFINE_CEPH_FEATURE(58, 1, CRUSH_TUNABLES5) DEFINE_CEPH_FEATURE(58, 1, NEW_OSDOPREPLY_ENCODING) // overlap DEFINE_CEPH_FEATURE(58, 1, FS_FILE_LAYOUT_V2) // overlap DEFINE_CEPH_FEATURE(59, 1, FS_BTIME) DEFINE_CEPH_FEATURE(59, 1, FS_CHANGE_ATTR) // overlap DEFINE_CEPH_FEATURE(59, 1, MSG_ADDR2) // overlap DEFINE_CEPH_FEATURE(60, 1, OSD_RECOVERY_DELETES) // *do not share this bit* DEFINE_CEPH_FEATURE(61, 1, CEPHX_V2) // *do not share this bit* DEFINE_CEPH_FEATURE(62, 1, RESERVED) // do not use; used as a sentinal DEFINE_CEPH_FEATURE_DEPRECATED(63, 1, RESERVED_BROKEN, LUMINOUS) // client-facing /* * Features supported. */ #define CEPH_FEATURES_SUPPORTED_DEFAULT \ (CEPH_FEATURE_NOSRCADDR | \ CEPH_FEATURE_SERVER_NAUTILUS | \ CEPH_FEATURE_FLOCK | \ CEPH_FEATURE_SUBSCRIBE2 | \ CEPH_FEATURE_MONNAMES | \ CEPH_FEATURE_RECONNECT_SEQ | \ CEPH_FEATURE_DIRLAYOUTHASH | \ CEPH_FEATURE_PGID64 | \ CEPH_FEATURE_PGPOOL3 | \ CEPH_FEATURE_OSDENC | \ CEPH_FEATURE_MONENC | \ CEPH_FEATURE_CRUSH_TUNABLES | \ CEPH_FEATURE_SERVER_LUMINOUS | \ CEPH_FEATURE_RESEND_ON_SPLIT | \ CEPH_FEATURE_RADOS_BACKOFF | \ CEPH_FEATURE_OSDMAP_PG_UPMAP | \ CEPH_FEATURE_CRUSH_CHOOSE_ARGS | \ CEPH_FEATURE_MSG_AUTH | \ CEPH_FEATURE_CRUSH_TUNABLES2 | \ CEPH_FEATURE_REPLY_CREATE_INODE | \ CEPH_FEATURE_SERVER_MIMIC | \ CEPH_FEATURE_MDSENC | \ CEPH_FEATURE_OSDHASHPSPOOL | \ CEPH_FEATURE_OSD_CACHEPOOL | \ CEPH_FEATURE_CRUSH_V2 | \ CEPH_FEATURE_EXPORT_PEER | \ CEPH_FEATURE_OSDMAP_ENC | \ CEPH_FEATURE_MDS_INLINE_DATA | \ CEPH_FEATURE_CRUSH_TUNABLES3 | \ CEPH_FEATURE_OSD_PRIMARY_AFFINITY | \ CEPH_FEATURE_MSGR_KEEPALIVE2 | \ CEPH_FEATURE_OSD_POOLRESEND | \ CEPH_FEATURE_MDS_QUOTA | \ CEPH_FEATURE_CRUSH_V4 | \ CEPH_FEATURE_NEW_OSDOP_ENCODING | \ CEPH_FEATURE_SERVER_JEWEL | \ CEPH_FEATURE_MON_STATEFUL_SUB | \ CEPH_FEATURE_CRUSH_TUNABLES5 | \ CEPH_FEATURE_NEW_OSDOPREPLY_ENCODING | \ CEPH_FEATURE_MSG_ADDR2 | \ CEPH_FEATURE_CEPHX_V2) #define CEPH_FEATURES_REQUIRED_DEFAULT 0 #endif PK ! |i�d> d> ceph/osd_client.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_OSD_CLIENT_H #define _FS_CEPH_OSD_CLIENT_H #include <linux/bitrev.h> #include <linux/completion.h> #include <linux/kref.h> #include <linux/mempool.h> #include <linux/rbtree.h> #include <linux/refcount.h> #include <linux/ktime.h> #include <linux/ceph/types.h> #include <linux/ceph/osdmap.h> #include <linux/ceph/messenger.h> #include <linux/ceph/msgpool.h> #include <linux/ceph/auth.h> #include <linux/ceph/pagelist.h> struct ceph_msg; struct ceph_snap_context; struct ceph_osd_request; struct ceph_osd_client; /* * completion callback for async writepages */ typedef void (*ceph_osdc_callback_t)(struct ceph_osd_request *); #define CEPH_HOMELESS_OSD -1 /* a given osd we're communicating with */ struct ceph_osd { refcount_t o_ref; struct ceph_osd_client *o_osdc; int o_osd; int o_incarnation; struct rb_node o_node; struct ceph_connection o_con; struct rb_root o_requests; struct rb_root o_linger_requests; struct rb_root o_backoff_mappings; struct rb_root o_backoffs_by_id; struct list_head o_osd_lru; struct ceph_auth_handshake o_auth; unsigned long lru_ttl; struct list_head o_keepalive_item; struct mutex lock; }; #define CEPH_OSD_SLAB_OPS 2 #define CEPH_OSD_MAX_OPS 16 enum ceph_osd_data_type { CEPH_OSD_DATA_TYPE_NONE = 0, CEPH_OSD_DATA_TYPE_PAGES, CEPH_OSD_DATA_TYPE_PAGELIST, #ifdef CONFIG_BLOCK CEPH_OSD_DATA_TYPE_BIO, #endif /* CONFIG_BLOCK */ CEPH_OSD_DATA_TYPE_BVECS, }; struct ceph_osd_data { enum ceph_osd_data_type type; union { struct { struct page **pages; u64 length; u32 alignment; bool pages_from_pool; bool own_pages; }; struct ceph_pagelist *pagelist; #ifdef CONFIG_BLOCK struct { struct ceph_bio_iter bio_pos; u32 bio_length; }; #endif /* CONFIG_BLOCK */ struct { struct ceph_bvec_iter bvec_pos; u32 num_bvecs; }; }; }; struct ceph_osd_req_op { u16 op; /* CEPH_OSD_OP_* */ u32 flags; /* CEPH_OSD_OP_FLAG_* */ u32 indata_len; /* request */ u32 outdata_len; /* reply */ s32 rval; union { struct ceph_osd_data raw_data_in; struct { u64 offset, length; u64 truncate_size; u32 truncate_seq; struct ceph_osd_data osd_data; } extent; struct { u32 name_len; u32 value_len; __u8 cmp_op; /* CEPH_OSD_CMPXATTR_OP_* */ __u8 cmp_mode; /* CEPH_OSD_CMPXATTR_MODE_* */ struct ceph_osd_data osd_data; } xattr; struct { const char *class_name; const char *method_name; struct ceph_osd_data request_info; struct ceph_osd_data request_data; struct ceph_osd_data response_data; __u8 class_len; __u8 method_len; u32 indata_len; } cls; struct { u64 cookie; __u8 op; /* CEPH_OSD_WATCH_OP_ */ u32 gen; } watch; struct { struct ceph_osd_data request_data; } notify_ack; struct { u64 cookie; struct ceph_osd_data request_data; struct ceph_osd_data response_data; } notify; struct { struct ceph_osd_data response_data; } list_watchers; struct { u64 expected_object_size; u64 expected_write_size; u32 flags; /* CEPH_OSD_OP_ALLOC_HINT_FLAG_* */ } alloc_hint; struct { u64 snapid; u64 src_version; u8 flags; u32 src_fadvise_flags; struct ceph_osd_data osd_data; } copy_from; }; }; struct ceph_osd_request_target { struct ceph_object_id base_oid; struct ceph_object_locator base_oloc; struct ceph_object_id target_oid; struct ceph_object_locator target_oloc; struct ceph_pg pgid; /* last raw pg we mapped to */ struct ceph_spg spgid; /* last actual spg we mapped to */ u32 pg_num; u32 pg_num_mask; struct ceph_osds acting; struct ceph_osds up; int size; int min_size; bool sort_bitwise; bool recovery_deletes; unsigned int flags; /* CEPH_OSD_FLAG_* */ bool used_replica; bool paused; u32 epoch; u32 last_force_resend; int osd; }; /* an in-flight request */ struct ceph_osd_request { u64 r_tid; /* unique for this client */ struct rb_node r_node; struct rb_node r_mc_node; /* map check */ struct work_struct r_complete_work; struct ceph_osd *r_osd; struct ceph_osd_request_target r_t; #define r_base_oid r_t.base_oid #define r_base_oloc r_t.base_oloc #define r_flags r_t.flags struct ceph_msg *r_request, *r_reply; u32 r_sent; /* >0 if r_request is sending/sent */ /* request osd ops array */ unsigned int r_num_ops; int r_result; struct ceph_osd_client *r_osdc; struct kref r_kref; bool r_mempool; struct completion r_completion; /* private to osd_client.c */ ceph_osdc_callback_t r_callback; struct inode *r_inode; /* for use by callbacks */ struct list_head r_private_item; /* ditto */ void *r_priv; /* ditto */ /* set by submitter */ u64 r_snapid; /* for reads, CEPH_NOSNAP o/w */ struct ceph_snap_context *r_snapc; /* for writes */ struct timespec64 r_mtime; /* ditto */ u64 r_data_offset; /* ditto */ bool r_linger; /* don't resend on failure */ /* internal */ unsigned long r_stamp; /* jiffies, send or check time */ unsigned long r_start_stamp; /* jiffies */ ktime_t r_start_latency; /* ktime_t */ ktime_t r_end_latency; /* ktime_t */ int r_attempts; u32 r_map_dne_bound; struct ceph_osd_req_op r_ops[]; }; struct ceph_request_redirect { struct ceph_object_locator oloc; }; /* * osd request identifier * * caller name + incarnation# + tid to unique identify this request */ struct ceph_osd_reqid { struct ceph_entity_name name; __le64 tid; __le32 inc; } __packed; struct ceph_blkin_trace_info { __le64 trace_id; __le64 span_id; __le64 parent_span_id; } __packed; typedef void (*rados_watchcb2_t)(void *arg, u64 notify_id, u64 cookie, u64 notifier_id, void *data, size_t data_len); typedef void (*rados_watcherrcb_t)(void *arg, u64 cookie, int err); struct ceph_osd_linger_request { struct ceph_osd_client *osdc; u64 linger_id; bool committed; bool is_watch; /* watch or notify */ struct ceph_osd *osd; struct ceph_osd_request *reg_req; struct ceph_osd_request *ping_req; unsigned long ping_sent; unsigned long watch_valid_thru; struct list_head pending_lworks; struct ceph_osd_request_target t; u32 map_dne_bound; struct timespec64 mtime; struct kref kref; struct mutex lock; struct rb_node node; /* osd */ struct rb_node osdc_node; /* osdc */ struct rb_node mc_node; /* map check */ struct list_head scan_item; struct completion reg_commit_wait; struct completion notify_finish_wait; int reg_commit_error; int notify_finish_error; int last_error; u32 register_gen; u64 notify_id; rados_watchcb2_t wcb; rados_watcherrcb_t errcb; void *data; struct ceph_pagelist *request_pl; struct page **notify_id_pages; struct page ***preply_pages; size_t *preply_len; }; struct ceph_watch_item { struct ceph_entity_name name; u64 cookie; struct ceph_entity_addr addr; }; struct ceph_spg_mapping { struct rb_node node; struct ceph_spg spgid; struct rb_root backoffs; }; struct ceph_hobject_id { void *key; size_t key_len; void *oid; size_t oid_len; u64 snapid; u32 hash; u8 is_max; void *nspace; size_t nspace_len; s64 pool; /* cache */ u32 hash_reverse_bits; }; static inline void ceph_hoid_build_hash_cache(struct ceph_hobject_id *hoid) { hoid->hash_reverse_bits = bitrev32(hoid->hash); } /* * PG-wide backoff: [begin, end) * per-object backoff: begin == end */ struct ceph_osd_backoff { struct rb_node spg_node; struct rb_node id_node; struct ceph_spg spgid; u64 id; struct ceph_hobject_id *begin; struct ceph_hobject_id *end; }; #define CEPH_LINGER_ID_START 0xffff000000000000ULL struct ceph_osd_client { struct ceph_client *client; struct ceph_osdmap *osdmap; /* current map */ struct rw_semaphore lock; struct rb_root osds; /* osds */ struct list_head osd_lru; /* idle osds */ spinlock_t osd_lru_lock; u32 epoch_barrier; struct ceph_osd homeless_osd; atomic64_t last_tid; /* tid of last request */ u64 last_linger_id; struct rb_root linger_requests; /* lingering requests */ struct rb_root map_checks; struct rb_root linger_map_checks; atomic_t num_requests; atomic_t num_homeless; int abort_err; struct delayed_work timeout_work; struct delayed_work osds_timeout_work; #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_file; #endif mempool_t *req_mempool; struct ceph_msgpool msgpool_op; struct ceph_msgpool msgpool_op_reply; struct workqueue_struct *notify_wq; struct workqueue_struct *completion_wq; }; static inline bool ceph_osdmap_flag(struct ceph_osd_client *osdc, int flag) { return osdc->osdmap->flags & flag; } extern int ceph_osdc_setup(void); extern void ceph_osdc_cleanup(void); extern int ceph_osdc_init(struct ceph_osd_client *osdc, struct ceph_client *client); extern void ceph_osdc_stop(struct ceph_osd_client *osdc); extern void ceph_osdc_reopen_osds(struct ceph_osd_client *osdc); extern void ceph_osdc_handle_reply(struct ceph_osd_client *osdc, struct ceph_msg *msg); extern void ceph_osdc_handle_map(struct ceph_osd_client *osdc, struct ceph_msg *msg); void ceph_osdc_update_epoch_barrier(struct ceph_osd_client *osdc, u32 eb); void ceph_osdc_abort_requests(struct ceph_osd_client *osdc, int err); void ceph_osdc_clear_abort_err(struct ceph_osd_client *osdc); #define osd_req_op_data(oreq, whch, typ, fld) \ ({ \ struct ceph_osd_request *__oreq = (oreq); \ unsigned int __whch = (whch); \ BUG_ON(__whch >= __oreq->r_num_ops); \ &__oreq->r_ops[__whch].typ.fld; \ }) struct ceph_osd_req_op *osd_req_op_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, u32 flags); extern void osd_req_op_raw_data_in_pages(struct ceph_osd_request *, unsigned int which, struct page **pages, u64 length, u32 alignment, bool pages_from_pool, bool own_pages); extern void osd_req_op_extent_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, u64 offset, u64 length, u64 truncate_size, u32 truncate_seq); extern void osd_req_op_extent_update(struct ceph_osd_request *osd_req, unsigned int which, u64 length); extern void osd_req_op_extent_dup_last(struct ceph_osd_request *osd_req, unsigned int which, u64 offset_inc); extern struct ceph_osd_data *osd_req_op_extent_osd_data( struct ceph_osd_request *osd_req, unsigned int which); extern void osd_req_op_extent_osd_data_pages(struct ceph_osd_request *, unsigned int which, struct page **pages, u64 length, u32 alignment, bool pages_from_pool, bool own_pages); extern void osd_req_op_extent_osd_data_pagelist(struct ceph_osd_request *, unsigned int which, struct ceph_pagelist *pagelist); #ifdef CONFIG_BLOCK void osd_req_op_extent_osd_data_bio(struct ceph_osd_request *osd_req, unsigned int which, struct ceph_bio_iter *bio_pos, u32 bio_length); #endif /* CONFIG_BLOCK */ void osd_req_op_extent_osd_data_bvecs(struct ceph_osd_request *osd_req, unsigned int which, struct bio_vec *bvecs, u32 num_bvecs, u32 bytes); void osd_req_op_extent_osd_data_bvec_pos(struct ceph_osd_request *osd_req, unsigned int which, struct ceph_bvec_iter *bvec_pos); extern void osd_req_op_cls_request_data_pagelist(struct ceph_osd_request *, unsigned int which, struct ceph_pagelist *pagelist); extern void osd_req_op_cls_request_data_pages(struct ceph_osd_request *, unsigned int which, struct page **pages, u64 length, u32 alignment, bool pages_from_pool, bool own_pages); void osd_req_op_cls_request_data_bvecs(struct ceph_osd_request *osd_req, unsigned int which, struct bio_vec *bvecs, u32 num_bvecs, u32 bytes); extern void osd_req_op_cls_response_data_pages(struct ceph_osd_request *, unsigned int which, struct page **pages, u64 length, u32 alignment, bool pages_from_pool, bool own_pages); int osd_req_op_cls_init(struct ceph_osd_request *osd_req, unsigned int which, const char *class, const char *method); extern int osd_req_op_xattr_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, const char *name, const void *value, size_t size, u8 cmp_op, u8 cmp_mode); extern void osd_req_op_alloc_hint_init(struct ceph_osd_request *osd_req, unsigned int which, u64 expected_object_size, u64 expected_write_size, u32 flags); extern struct ceph_osd_request *ceph_osdc_alloc_request(struct ceph_osd_client *osdc, struct ceph_snap_context *snapc, unsigned int num_ops, bool use_mempool, gfp_t gfp_flags); int ceph_osdc_alloc_messages(struct ceph_osd_request *req, gfp_t gfp); extern struct ceph_osd_request *ceph_osdc_new_request(struct ceph_osd_client *, struct ceph_file_layout *layout, struct ceph_vino vino, u64 offset, u64 *len, unsigned int which, int num_ops, int opcode, int flags, struct ceph_snap_context *snapc, u32 truncate_seq, u64 truncate_size, bool use_mempool); extern void ceph_osdc_get_request(struct ceph_osd_request *req); extern void ceph_osdc_put_request(struct ceph_osd_request *req); extern int ceph_osdc_start_request(struct ceph_osd_client *osdc, struct ceph_osd_request *req, bool nofail); extern void ceph_osdc_cancel_request(struct ceph_osd_request *req); extern int ceph_osdc_wait_request(struct ceph_osd_client *osdc, struct ceph_osd_request *req); extern void ceph_osdc_sync(struct ceph_osd_client *osdc); extern void ceph_osdc_flush_notifies(struct ceph_osd_client *osdc); void ceph_osdc_maybe_request_map(struct ceph_osd_client *osdc); int ceph_osdc_call(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, const char *class, const char *method, unsigned int flags, struct page *req_page, size_t req_len, struct page **resp_pages, size_t *resp_len); int ceph_osdc_copy_from(struct ceph_osd_client *osdc, u64 src_snapid, u64 src_version, struct ceph_object_id *src_oid, struct ceph_object_locator *src_oloc, u32 src_fadvise_flags, struct ceph_object_id *dst_oid, struct ceph_object_locator *dst_oloc, u32 dst_fadvise_flags, u32 truncate_seq, u64 truncate_size, u8 copy_from_flags); /* watch/notify */ struct ceph_osd_linger_request * ceph_osdc_watch(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, rados_watchcb2_t wcb, rados_watcherrcb_t errcb, void *data); int ceph_osdc_unwatch(struct ceph_osd_client *osdc, struct ceph_osd_linger_request *lreq); int ceph_osdc_notify_ack(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, u64 notify_id, u64 cookie, void *payload, u32 payload_len); int ceph_osdc_notify(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, void *payload, u32 payload_len, u32 timeout, struct page ***preply_pages, size_t *preply_len); int ceph_osdc_watch_check(struct ceph_osd_client *osdc, struct ceph_osd_linger_request *lreq); int ceph_osdc_list_watchers(struct ceph_osd_client *osdc, struct ceph_object_id *oid, struct ceph_object_locator *oloc, struct ceph_watch_item **watchers, u32 *num_watchers); #endif PK ! ��Q>� � ceph/ceph_debug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_DEBUG_H #define _FS_CEPH_DEBUG_H #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/string.h> #ifdef CONFIG_CEPH_LIB_PRETTYDEBUG /* * wrap pr_debug to include a filename:lineno prefix on each line. * this incurs some overhead (kernel size and execution time) due to * the extra function call at each call site. */ # if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG) # define dout(fmt, ...) \ pr_debug("%.*s %12.12s:%-4d : " fmt, \ 8 - (int)sizeof(KBUILD_MODNAME), " ", \ kbasename(__FILE__), __LINE__, ##__VA_ARGS__) # else /* faux printk call just to see any compiler warnings. */ # define dout(fmt, ...) do { \ if (0) \ printk(KERN_DEBUG fmt, ##__VA_ARGS__); \ } while (0) # endif #else /* * or, just wrap pr_debug */ # define dout(fmt, ...) pr_debug(" " fmt, ##__VA_ARGS__) #endif #endif PK ! �[Hm� � ceph/mdsmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_MDSMAP_H #define _FS_CEPH_MDSMAP_H #include <linux/bug.h> #include <linux/ceph/types.h> /* * mds map - describe servers in the mds cluster. * * we limit fields to those the client actually xcares about */ struct ceph_mds_info { u64 global_id; struct ceph_entity_addr addr; s32 state; int num_export_targets; bool laggy; u32 *export_targets; }; struct ceph_mdsmap { u32 m_epoch, m_client_epoch, m_last_failure; u32 m_root; u32 m_session_timeout; /* seconds */ u32 m_session_autoclose; /* seconds */ u64 m_max_file_size; u32 m_max_mds; /* expected up:active mds number */ u32 m_num_active_mds; /* actual up:active mds number */ u32 possible_max_rank; /* possible max rank index */ struct ceph_mds_info *m_info; /* which object pools file data can be stored in */ int m_num_data_pg_pools; u64 *m_data_pg_pools; u64 m_cas_pg_pool; bool m_enabled; bool m_damaged; int m_num_laggy; }; static inline struct ceph_entity_addr * ceph_mdsmap_get_addr(struct ceph_mdsmap *m, int w) { if (w >= m->possible_max_rank) return NULL; return &m->m_info[w].addr; } static inline int ceph_mdsmap_get_state(struct ceph_mdsmap *m, int w) { BUG_ON(w < 0); if (w >= m->possible_max_rank) return CEPH_MDS_STATE_DNE; return m->m_info[w].state; } static inline bool ceph_mdsmap_is_laggy(struct ceph_mdsmap *m, int w) { if (w >= 0 && w < m->possible_max_rank) return m->m_info[w].laggy; return false; } extern int ceph_mdsmap_get_random_mds(struct ceph_mdsmap *m); struct ceph_mdsmap *ceph_mdsmap_decode(void **p, void *end, bool msgr2); extern void ceph_mdsmap_destroy(struct ceph_mdsmap *m); extern bool ceph_mdsmap_is_cluster_available(struct ceph_mdsmap *m); #endif PK ! H%K K ceph/mon_client.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_MON_CLIENT_H #define _FS_CEPH_MON_CLIENT_H #include <linux/completion.h> #include <linux/kref.h> #include <linux/rbtree.h> #include <linux/ceph/messenger.h> struct ceph_client; struct ceph_mount_args; struct ceph_auth_client; /* * The monitor map enumerates the set of all monitors. */ struct ceph_monmap { struct ceph_fsid fsid; u32 epoch; u32 num_mon; struct ceph_entity_inst mon_inst[]; }; struct ceph_mon_client; struct ceph_mon_generic_request; /* * Generic mechanism for resending monitor requests. */ typedef void (*ceph_monc_request_func_t)(struct ceph_mon_client *monc, int newmon); /* a pending monitor request */ struct ceph_mon_request { struct ceph_mon_client *monc; struct delayed_work delayed_work; unsigned long delay; ceph_monc_request_func_t do_request; }; typedef void (*ceph_monc_callback_t)(struct ceph_mon_generic_request *); /* * ceph_mon_generic_request is being used for the statfs and * mon_get_version requests which are being done a bit differently * because we need to get data back to the caller */ struct ceph_mon_generic_request { struct ceph_mon_client *monc; struct kref kref; u64 tid; struct rb_node node; int result; struct completion completion; ceph_monc_callback_t complete_cb; u64 private_data; /* r_tid/linger_id */ struct ceph_msg *request; /* original request */ struct ceph_msg *reply; /* and reply */ union { struct ceph_statfs *st; u64 newest; } u; }; struct ceph_mon_client { struct ceph_client *client; struct ceph_monmap *monmap; struct mutex mutex; struct delayed_work delayed_work; struct ceph_auth_client *auth; struct ceph_msg *m_auth, *m_auth_reply, *m_subscribe, *m_subscribe_ack; int pending_auth; bool hunting; int cur_mon; /* last monitor i contacted */ unsigned long sub_renew_after; unsigned long sub_renew_sent; struct ceph_connection con; bool had_a_connection; int hunt_mult; /* [1..CEPH_MONC_HUNT_MAX_MULT] */ /* pending generic requests */ struct rb_root generic_request_tree; u64 last_tid; /* subs, indexed with CEPH_SUB_* */ struct { struct ceph_mon_subscribe_item item; bool want; u32 have; /* epoch */ } subs[4]; int fs_cluster_id; /* "mdsmap.<id>" sub */ #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_file; #endif }; extern int ceph_monmap_contains(struct ceph_monmap *m, struct ceph_entity_addr *addr); extern int ceph_monc_init(struct ceph_mon_client *monc, struct ceph_client *cl); extern void ceph_monc_stop(struct ceph_mon_client *monc); extern void ceph_monc_reopen_session(struct ceph_mon_client *monc); enum { CEPH_SUB_MONMAP = 0, CEPH_SUB_OSDMAP, CEPH_SUB_FSMAP, CEPH_SUB_MDSMAP, }; extern const char *ceph_sub_str[]; /* * The model here is to indicate that we need a new map of at least * epoch @epoch, and also call in when we receive a map. We will * periodically rerequest the map from the monitor cluster until we * get what we want. */ bool ceph_monc_want_map(struct ceph_mon_client *monc, int sub, u32 epoch, bool continuous); void ceph_monc_got_map(struct ceph_mon_client *monc, int sub, u32 epoch); void ceph_monc_renew_subs(struct ceph_mon_client *monc); extern int ceph_monc_wait_osdmap(struct ceph_mon_client *monc, u32 epoch, unsigned long timeout); int ceph_monc_do_statfs(struct ceph_mon_client *monc, u64 data_pool, struct ceph_statfs *buf); int ceph_monc_get_version(struct ceph_mon_client *monc, const char *what, u64 *newest); int ceph_monc_get_version_async(struct ceph_mon_client *monc, const char *what, ceph_monc_callback_t cb, u64 private_data); int ceph_monc_blocklist_add(struct ceph_mon_client *monc, struct ceph_entity_addr *client_addr); extern int ceph_monc_open_session(struct ceph_mon_client *monc); extern int ceph_monc_validate_auth(struct ceph_mon_client *monc); #endif PK ! v?�+ + ceph/msgpool.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_MSGPOOL #define _FS_CEPH_MSGPOOL #include <linux/mempool.h> /* * we use memory pools for preallocating messages we may receive, to * avoid unexpected OOM conditions. */ struct ceph_msgpool { const char *name; mempool_t *pool; int type; /* preallocated message type */ int front_len; /* preallocated payload size */ int max_data_items; }; int ceph_msgpool_init(struct ceph_msgpool *pool, int type, int front_len, int max_data_items, int size, const char *name); extern void ceph_msgpool_destroy(struct ceph_msgpool *pool); struct ceph_msg *ceph_msgpool_get(struct ceph_msgpool *pool, int front_len, int max_data_items); extern void ceph_msgpool_put(struct ceph_msgpool *, struct ceph_msg *); #endif PK ! ��;� � ceph/msgr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef CEPH_MSGR_H #define CEPH_MSGR_H /* * Data types for message passing layer used by Ceph. */ #define CEPH_MON_PORT 6789 /* default monitor port */ /* * tcp connection banner. include a protocol version. and adjust * whenever the wire protocol changes. try to keep this string length * constant. */ #define CEPH_BANNER "ceph v027" #define CEPH_BANNER_LEN 9 #define CEPH_BANNER_MAX_LEN 30 /* * messenger V2 connection banner prefix. * The full banner string should have the form: "ceph v2\n<le16>" * the 2 bytes are the length of the remaining banner. */ #define CEPH_BANNER_V2 "ceph v2\n" #define CEPH_BANNER_V2_LEN 8 #define CEPH_BANNER_V2_PREFIX_LEN (CEPH_BANNER_V2_LEN + sizeof(__le16)) /* * messenger V2 features */ #define CEPH_MSGR2_INCARNATION_1 (0ull) #define DEFINE_MSGR2_FEATURE(bit, incarnation, name) \ static const uint64_t __maybe_unused CEPH_MSGR2_FEATURE_##name = (1ULL << bit); \ static const uint64_t __maybe_unused CEPH_MSGR2_FEATUREMASK_##name = \ (1ULL << bit | CEPH_MSGR2_INCARNATION_##incarnation); #define HAVE_MSGR2_FEATURE(x, name) \ (((x) & (CEPH_MSGR2_FEATUREMASK_##name)) == (CEPH_MSGR2_FEATUREMASK_##name)) DEFINE_MSGR2_FEATURE( 0, 1, REVISION_1) // msgr2.1 #define CEPH_MSGR2_SUPPORTED_FEATURES (CEPH_MSGR2_FEATURE_REVISION_1) #define CEPH_MSGR2_REQUIRED_FEATURES (CEPH_MSGR2_FEATURE_REVISION_1) /* * Rollover-safe type and comparator for 32-bit sequence numbers. * Comparator returns -1, 0, or 1. */ typedef __u32 ceph_seq_t; static inline __s32 ceph_seq_cmp(__u32 a, __u32 b) { return (__s32)a - (__s32)b; } /* * entity_name -- logical name for a process participating in the * network, e.g. 'mds0' or 'osd3'. */ struct ceph_entity_name { __u8 type; /* CEPH_ENTITY_TYPE_* */ __le64 num; } __attribute__ ((packed)); #define CEPH_ENTITY_TYPE_MON 0x01 #define CEPH_ENTITY_TYPE_MDS 0x02 #define CEPH_ENTITY_TYPE_OSD 0x04 #define CEPH_ENTITY_TYPE_CLIENT 0x08 #define CEPH_ENTITY_TYPE_AUTH 0x20 #define CEPH_ENTITY_TYPE_ANY 0xFF extern const char *ceph_entity_type_name(int type); /* * entity_addr -- network address */ struct ceph_entity_addr { __le32 type; /* CEPH_ENTITY_ADDR_TYPE_* */ __le32 nonce; /* unique id for process (e.g. pid) */ struct sockaddr_storage in_addr; } __attribute__ ((packed)); static inline bool ceph_addr_equal_no_type(const struct ceph_entity_addr *lhs, const struct ceph_entity_addr *rhs) { return !memcmp(&lhs->in_addr, &rhs->in_addr, sizeof(lhs->in_addr)) && lhs->nonce == rhs->nonce; } struct ceph_entity_inst { struct ceph_entity_name name; struct ceph_entity_addr addr; } __attribute__ ((packed)); /* used by message exchange protocol */ #define CEPH_MSGR_TAG_READY 1 /* server->client: ready for messages */ #define CEPH_MSGR_TAG_RESETSESSION 2 /* server->client: reset, try again */ #define CEPH_MSGR_TAG_WAIT 3 /* server->client: wait for racing incoming connection */ #define CEPH_MSGR_TAG_RETRY_SESSION 4 /* server->client + cseq: try again with higher cseq */ #define CEPH_MSGR_TAG_RETRY_GLOBAL 5 /* server->client + gseq: try again with higher gseq */ #define CEPH_MSGR_TAG_CLOSE 6 /* closing pipe */ #define CEPH_MSGR_TAG_MSG 7 /* message */ #define CEPH_MSGR_TAG_ACK 8 /* message ack */ #define CEPH_MSGR_TAG_KEEPALIVE 9 /* just a keepalive byte! */ #define CEPH_MSGR_TAG_BADPROTOVER 10 /* bad protocol version */ #define CEPH_MSGR_TAG_BADAUTHORIZER 11 /* bad authorizer */ #define CEPH_MSGR_TAG_FEATURES 12 /* insufficient features */ #define CEPH_MSGR_TAG_SEQ 13 /* 64-bit int follows with seen seq number */ #define CEPH_MSGR_TAG_KEEPALIVE2 14 /* keepalive2 byte + ceph_timespec */ #define CEPH_MSGR_TAG_KEEPALIVE2_ACK 15 /* keepalive2 reply */ #define CEPH_MSGR_TAG_CHALLENGE_AUTHORIZER 16 /* cephx v2 doing server challenge */ /* * connection negotiation */ struct ceph_msg_connect { __le64 features; /* supported feature bits */ __le32 host_type; /* CEPH_ENTITY_TYPE_* */ __le32 global_seq; /* count connections initiated by this host */ __le32 connect_seq; /* count connections initiated in this session */ __le32 protocol_version; __le32 authorizer_protocol; __le32 authorizer_len; __u8 flags; /* CEPH_MSG_CONNECT_* */ } __attribute__ ((packed)); struct ceph_msg_connect_reply { __u8 tag; __le64 features; /* feature bits for this session */ __le32 global_seq; __le32 connect_seq; __le32 protocol_version; __le32 authorizer_len; __u8 flags; } __attribute__ ((packed)); #define CEPH_MSG_CONNECT_LOSSY 1 /* messages i send may be safely dropped */ /* * message header */ struct ceph_msg_header_old { __le64 seq; /* message seq# for this session */ __le64 tid; /* transaction id */ __le16 type; /* message type */ __le16 priority; /* priority. higher value == higher priority */ __le16 version; /* version of message encoding */ __le32 front_len; /* bytes in main payload */ __le32 middle_len;/* bytes in middle payload */ __le32 data_len; /* bytes of data payload */ __le16 data_off; /* sender: include full offset; receiver: mask against ~PAGE_MASK */ struct ceph_entity_inst src, orig_src; __le32 reserved; __le32 crc; /* header crc32c */ } __attribute__ ((packed)); struct ceph_msg_header { __le64 seq; /* message seq# for this session */ __le64 tid; /* transaction id */ __le16 type; /* message type */ __le16 priority; /* priority. higher value == higher priority */ __le16 version; /* version of message encoding */ __le32 front_len; /* bytes in main payload */ __le32 middle_len;/* bytes in middle payload */ __le32 data_len; /* bytes of data payload */ __le16 data_off; /* sender: include full offset; receiver: mask against ~PAGE_MASK */ struct ceph_entity_name src; __le16 compat_version; __le16 reserved; __le32 crc; /* header crc32c */ } __attribute__ ((packed)); struct ceph_msg_header2 { __le64 seq; /* message seq# for this session */ __le64 tid; /* transaction id */ __le16 type; /* message type */ __le16 priority; /* priority. higher value == higher priority */ __le16 version; /* version of message encoding */ __le32 data_pre_padding_len; __le16 data_off; /* sender: include full offset; receiver: mask against ~PAGE_MASK */ __le64 ack_seq; __u8 flags; /* oldest code we think can decode this. unknown if zero. */ __le16 compat_version; __le16 reserved; } __attribute__ ((packed)); #define CEPH_MSG_PRIO_LOW 64 #define CEPH_MSG_PRIO_DEFAULT 127 #define CEPH_MSG_PRIO_HIGH 196 #define CEPH_MSG_PRIO_HIGHEST 255 /* * follows data payload */ struct ceph_msg_footer_old { __le32 front_crc, middle_crc, data_crc; __u8 flags; } __attribute__ ((packed)); struct ceph_msg_footer { __le32 front_crc, middle_crc, data_crc; // sig holds the 64 bits of the digital signature for the message PLR __le64 sig; __u8 flags; } __attribute__ ((packed)); #define CEPH_MSG_FOOTER_COMPLETE (1<<0) /* msg wasn't aborted */ #define CEPH_MSG_FOOTER_NOCRC (1<<1) /* no data crc */ #define CEPH_MSG_FOOTER_SIGNED (1<<2) /* msg was signed */ #endif PK ! Z��}2) 2) ceph/libceph.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_LIBCEPH_H #define _FS_CEPH_LIBCEPH_H #include <linux/ceph/ceph_debug.h> #include <asm/unaligned.h> #include <linux/backing-dev.h> #include <linux/completion.h> #include <linux/exportfs.h> #include <linux/bug.h> #include <linux/fs.h> #include <linux/mempool.h> #include <linux/pagemap.h> #include <linux/wait.h> #include <linux/writeback.h> #include <linux/slab.h> #include <linux/refcount.h> #include <linux/ceph/types.h> #include <linux/ceph/messenger.h> #include <linux/ceph/msgpool.h> #include <linux/ceph/mon_client.h> #include <linux/ceph/osd_client.h> #include <linux/ceph/ceph_fs.h> #include <linux/ceph/string_table.h> /* * mount options */ #define CEPH_OPT_FSID (1<<0) #define CEPH_OPT_NOSHARE (1<<1) /* don't share client with other sbs */ #define CEPH_OPT_MYIP (1<<2) /* specified my ip */ #define CEPH_OPT_NOCRC (1<<3) /* no data crc on writes (msgr1) */ #define CEPH_OPT_TCP_NODELAY (1<<4) /* TCP_NODELAY on TCP sockets */ #define CEPH_OPT_NOMSGSIGN (1<<5) /* don't sign msgs (msgr1) */ #define CEPH_OPT_ABORT_ON_FULL (1<<6) /* abort w/ ENOSPC when full */ #define CEPH_OPT_DEFAULT (CEPH_OPT_TCP_NODELAY) #define ceph_set_opt(client, opt) \ (client)->options->flags |= CEPH_OPT_##opt; #define ceph_test_opt(client, opt) \ (!!((client)->options->flags & CEPH_OPT_##opt)) struct ceph_options { int flags; struct ceph_fsid fsid; struct ceph_entity_addr my_addr; unsigned long mount_timeout; /* jiffies */ unsigned long osd_idle_ttl; /* jiffies */ unsigned long osd_keepalive_timeout; /* jiffies */ unsigned long osd_request_timeout; /* jiffies */ u32 read_from_replica; /* CEPH_OSD_FLAG_BALANCE/LOCALIZE_READS */ int con_modes[2]; /* CEPH_CON_MODE_* */ /* * any type that can't be simply compared or doesn't need * to be compared should go beyond this point, * ceph_compare_options() should be updated accordingly */ struct ceph_entity_addr *mon_addr; /* should be the first pointer type of args */ int num_mon; char *name; struct ceph_crypto_key *key; struct rb_root crush_locs; }; /* * defaults */ #define CEPH_MOUNT_TIMEOUT_DEFAULT msecs_to_jiffies(60 * 1000) #define CEPH_OSD_KEEPALIVE_DEFAULT msecs_to_jiffies(5 * 1000) #define CEPH_OSD_IDLE_TTL_DEFAULT msecs_to_jiffies(60 * 1000) #define CEPH_OSD_REQUEST_TIMEOUT_DEFAULT 0 /* no timeout */ #define CEPH_READ_FROM_REPLICA_DEFAULT 0 /* read from primary */ #define CEPH_MONC_HUNT_INTERVAL msecs_to_jiffies(3 * 1000) #define CEPH_MONC_PING_INTERVAL msecs_to_jiffies(10 * 1000) #define CEPH_MONC_PING_TIMEOUT msecs_to_jiffies(30 * 1000) #define CEPH_MONC_HUNT_BACKOFF 2 #define CEPH_MONC_HUNT_MAX_MULT 10 #define CEPH_MSG_MAX_CONTROL_LEN (16*1024*1024) #define CEPH_MSG_MAX_FRONT_LEN (16*1024*1024) #define CEPH_MSG_MAX_MIDDLE_LEN (16*1024*1024) /* * The largest possible rbd data object is 32M. * The largest possible rbd object map object is 64M. * * There is no limit on the size of cephfs objects, but it has to obey * rsize and wsize mount options anyway. */ #define CEPH_MSG_MAX_DATA_LEN (64*1024*1024) #define CEPH_AUTH_NAME_DEFAULT "guest" /* mount state */ enum { CEPH_MOUNT_MOUNTING, CEPH_MOUNT_MOUNTED, CEPH_MOUNT_UNMOUNTING, CEPH_MOUNT_UNMOUNTED, CEPH_MOUNT_SHUTDOWN, CEPH_MOUNT_RECOVER, }; static inline unsigned long ceph_timeout_jiffies(unsigned long timeout) { return timeout ?: MAX_SCHEDULE_TIMEOUT; } struct ceph_mds_client; /* * per client state * * possibly shared by multiple mount points, if they are * mounting the same ceph filesystem/cluster. */ struct ceph_client { struct ceph_fsid fsid; bool have_fsid; void *private; struct ceph_options *options; struct mutex mount_mutex; /* serialize mount attempts */ wait_queue_head_t auth_wq; int auth_err; int (*extra_mon_dispatch)(struct ceph_client *, struct ceph_msg *); u64 supported_features; u64 required_features; struct ceph_messenger msgr; /* messenger instance */ struct ceph_mon_client monc; struct ceph_osd_client osdc; #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_dir; struct dentry *debugfs_monmap; struct dentry *debugfs_osdmap; struct dentry *debugfs_options; #endif }; #define from_msgr(ms) container_of(ms, struct ceph_client, msgr) static inline bool ceph_msgr2(struct ceph_client *client) { return client->options->con_modes[0] != CEPH_CON_MODE_UNKNOWN; } /* * snapshots */ /* * A "snap context" is the set of existing snapshots when we * write data. It is used by the OSD to guide its COW behavior. * * The ceph_snap_context is refcounted, and attached to each dirty * page, indicating which context the dirty data belonged when it was * dirtied. */ struct ceph_snap_context { refcount_t nref; u64 seq; u32 num_snaps; u64 snaps[]; }; extern struct ceph_snap_context *ceph_create_snap_context(u32 snap_count, gfp_t gfp_flags); extern struct ceph_snap_context *ceph_get_snap_context( struct ceph_snap_context *sc); extern void ceph_put_snap_context(struct ceph_snap_context *sc); /* * calculate the number of pages a given length and offset map onto, * if we align the data. */ static inline int calc_pages_for(u64 off, u64 len) { return ((off+len+PAGE_SIZE-1) >> PAGE_SHIFT) - (off >> PAGE_SHIFT); } #define RB_BYVAL(a) (a) #define RB_BYPTR(a) (&(a)) #define RB_CMP3WAY(a, b) ((a) < (b) ? -1 : (a) > (b)) #define DEFINE_RB_INSDEL_FUNCS2(name, type, keyfld, cmpexp, keyexp, nodefld) \ static bool __insert_##name(struct rb_root *root, type *t) \ { \ struct rb_node **n = &root->rb_node; \ struct rb_node *parent = NULL; \ \ BUG_ON(!RB_EMPTY_NODE(&t->nodefld)); \ \ while (*n) { \ type *cur = rb_entry(*n, type, nodefld); \ int cmp; \ \ parent = *n; \ cmp = cmpexp(keyexp(t->keyfld), keyexp(cur->keyfld)); \ if (cmp < 0) \ n = &(*n)->rb_left; \ else if (cmp > 0) \ n = &(*n)->rb_right; \ else \ return false; \ } \ \ rb_link_node(&t->nodefld, parent, n); \ rb_insert_color(&t->nodefld, root); \ return true; \ } \ static void __maybe_unused insert_##name(struct rb_root *root, type *t) \ { \ if (!__insert_##name(root, t)) \ BUG(); \ } \ static void erase_##name(struct rb_root *root, type *t) \ { \ BUG_ON(RB_EMPTY_NODE(&t->nodefld)); \ rb_erase(&t->nodefld, root); \ RB_CLEAR_NODE(&t->nodefld); \ } /* * @lookup_param_type is a parameter and not constructed from (@type, * @keyfld) with typeof() because adding const is too unwieldy. */ #define DEFINE_RB_LOOKUP_FUNC2(name, type, keyfld, cmpexp, keyexp, \ lookup_param_type, nodefld) \ static type *lookup_##name(struct rb_root *root, lookup_param_type key) \ { \ struct rb_node *n = root->rb_node; \ \ while (n) { \ type *cur = rb_entry(n, type, nodefld); \ int cmp; \ \ cmp = cmpexp(key, keyexp(cur->keyfld)); \ if (cmp < 0) \ n = n->rb_left; \ else if (cmp > 0) \ n = n->rb_right; \ else \ return cur; \ } \ \ return NULL; \ } #define DEFINE_RB_FUNCS2(name, type, keyfld, cmpexp, keyexp, \ lookup_param_type, nodefld) \ DEFINE_RB_INSDEL_FUNCS2(name, type, keyfld, cmpexp, keyexp, nodefld) \ DEFINE_RB_LOOKUP_FUNC2(name, type, keyfld, cmpexp, keyexp, \ lookup_param_type, nodefld) /* * Shorthands for integer keys. */ #define DEFINE_RB_INSDEL_FUNCS(name, type, keyfld, nodefld) \ DEFINE_RB_INSDEL_FUNCS2(name, type, keyfld, RB_CMP3WAY, RB_BYVAL, nodefld) #define DEFINE_RB_LOOKUP_FUNC(name, type, keyfld, nodefld) \ extern type __lookup_##name##_key; \ DEFINE_RB_LOOKUP_FUNC2(name, type, keyfld, RB_CMP3WAY, RB_BYVAL, \ typeof(__lookup_##name##_key.keyfld), nodefld) #define DEFINE_RB_FUNCS(name, type, keyfld, nodefld) \ DEFINE_RB_INSDEL_FUNCS(name, type, keyfld, nodefld) \ DEFINE_RB_LOOKUP_FUNC(name, type, keyfld, nodefld) extern struct kmem_cache *ceph_inode_cachep; extern struct kmem_cache *ceph_cap_cachep; extern struct kmem_cache *ceph_cap_flush_cachep; extern struct kmem_cache *ceph_dentry_cachep; extern struct kmem_cache *ceph_file_cachep; extern struct kmem_cache *ceph_dir_file_cachep; extern struct kmem_cache *ceph_mds_request_cachep; extern mempool_t *ceph_wb_pagevec_pool; /* ceph_common.c */ extern bool libceph_compatible(void *data); extern const char *ceph_msg_type_name(int type); extern int ceph_check_fsid(struct ceph_client *client, struct ceph_fsid *fsid); extern void *ceph_kvmalloc(size_t size, gfp_t flags); struct fs_parameter; struct fc_log; struct ceph_options *ceph_alloc_options(void); int ceph_parse_mon_ips(const char *buf, size_t len, struct ceph_options *opt, struct fc_log *l); int ceph_parse_param(struct fs_parameter *param, struct ceph_options *opt, struct fc_log *l); int ceph_print_client_options(struct seq_file *m, struct ceph_client *client, bool show_all); extern void ceph_destroy_options(struct ceph_options *opt); extern int ceph_compare_options(struct ceph_options *new_opt, struct ceph_client *client); struct ceph_client *ceph_create_client(struct ceph_options *opt, void *private); struct ceph_entity_addr *ceph_client_addr(struct ceph_client *client); u64 ceph_client_gid(struct ceph_client *client); extern void ceph_destroy_client(struct ceph_client *client); extern void ceph_reset_client_addr(struct ceph_client *client); extern int __ceph_open_session(struct ceph_client *client, unsigned long started); extern int ceph_open_session(struct ceph_client *client); int ceph_wait_for_latest_osdmap(struct ceph_client *client, unsigned long timeout); /* pagevec.c */ extern void ceph_release_page_vector(struct page **pages, int num_pages); extern void ceph_put_page_vector(struct page **pages, int num_pages, bool dirty); extern struct page **ceph_alloc_page_vector(int num_pages, gfp_t flags); extern int ceph_copy_user_to_page_vector(struct page **pages, const void __user *data, loff_t off, size_t len); extern void ceph_copy_to_page_vector(struct page **pages, const void *data, loff_t off, size_t len); extern void ceph_copy_from_page_vector(struct page **pages, void *data, loff_t off, size_t len); extern void ceph_zero_page_vector_range(int off, int len, struct page **pages); #endif /* _FS_CEPH_SUPER_H */ PK ! 2�' �' ceph/decode.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __CEPH_DECODE_H #define __CEPH_DECODE_H #include <linux/err.h> #include <linux/bug.h> #include <linux/slab.h> #include <linux/time.h> #include <asm/unaligned.h> #include <linux/ceph/types.h> /* * in all cases, * void **p pointer to position pointer * void *end pointer to end of buffer (last byte + 1) */ static inline u64 ceph_decode_64(void **p) { u64 v = get_unaligned_le64(*p); *p += sizeof(u64); return v; } static inline u32 ceph_decode_32(void **p) { u32 v = get_unaligned_le32(*p); *p += sizeof(u32); return v; } static inline u16 ceph_decode_16(void **p) { u16 v = get_unaligned_le16(*p); *p += sizeof(u16); return v; } static inline u8 ceph_decode_8(void **p) { u8 v = *(u8 *)*p; (*p)++; return v; } static inline void ceph_decode_copy(void **p, void *pv, size_t n) { memcpy(pv, *p, n); *p += n; } /* * bounds check input. */ static inline bool ceph_has_room(void **p, void *end, size_t n) { return end >= *p && n <= end - *p; } #define ceph_decode_need(p, end, n, bad) \ do { \ if (!likely(ceph_has_room(p, end, n))) \ goto bad; \ } while (0) #define ceph_decode_64_safe(p, end, v, bad) \ do { \ ceph_decode_need(p, end, sizeof(u64), bad); \ v = ceph_decode_64(p); \ } while (0) #define ceph_decode_32_safe(p, end, v, bad) \ do { \ ceph_decode_need(p, end, sizeof(u32), bad); \ v = ceph_decode_32(p); \ } while (0) #define ceph_decode_16_safe(p, end, v, bad) \ do { \ ceph_decode_need(p, end, sizeof(u16), bad); \ v = ceph_decode_16(p); \ } while (0) #define ceph_decode_8_safe(p, end, v, bad) \ do { \ ceph_decode_need(p, end, sizeof(u8), bad); \ v = ceph_decode_8(p); \ } while (0) #define ceph_decode_copy_safe(p, end, pv, n, bad) \ do { \ ceph_decode_need(p, end, n, bad); \ ceph_decode_copy(p, pv, n); \ } while (0) /* * Allocate a buffer big enough to hold the wire-encoded string, and * decode the string into it. The resulting string will always be * terminated with '\0'. If successful, *p will be advanced * past the decoded data. Also, if lenp is not a null pointer, the * length (not including the terminating '\0') will be recorded in * *lenp. Note that a zero-length string is a valid return value. * * Returns a pointer to the newly-allocated string buffer, or a * pointer-coded errno if an error occurs. Neither *p nor *lenp * will have been updated if an error is returned. * * There are two possible failures: * - converting the string would require accessing memory at or * beyond the "end" pointer provided (-ERANGE) * - memory could not be allocated for the result (-ENOMEM) */ static inline char *ceph_extract_encoded_string(void **p, void *end, size_t *lenp, gfp_t gfp) { u32 len; void *sp = *p; char *buf; ceph_decode_32_safe(&sp, end, len, bad); if (!ceph_has_room(&sp, end, len)) goto bad; buf = kmalloc(len + 1, gfp); if (!buf) return ERR_PTR(-ENOMEM); if (len) memcpy(buf, sp, len); buf[len] = '\0'; *p = (char *) *p + sizeof (u32) + len; if (lenp) *lenp = (size_t) len; return buf; bad: return ERR_PTR(-ERANGE); } /* * skip helpers */ #define ceph_decode_skip_n(p, end, n, bad) \ do { \ ceph_decode_need(p, end, n, bad); \ *p += n; \ } while (0) #define ceph_decode_skip_64(p, end, bad) \ ceph_decode_skip_n(p, end, sizeof(u64), bad) #define ceph_decode_skip_32(p, end, bad) \ ceph_decode_skip_n(p, end, sizeof(u32), bad) #define ceph_decode_skip_16(p, end, bad) \ ceph_decode_skip_n(p, end, sizeof(u16), bad) #define ceph_decode_skip_8(p, end, bad) \ ceph_decode_skip_n(p, end, sizeof(u8), bad) #define ceph_decode_skip_string(p, end, bad) \ do { \ u32 len; \ \ ceph_decode_32_safe(p, end, len, bad); \ ceph_decode_skip_n(p, end, len, bad); \ } while (0) #define ceph_decode_skip_set(p, end, type, bad) \ do { \ u32 len; \ \ ceph_decode_32_safe(p, end, len, bad); \ while (len--) \ ceph_decode_skip_##type(p, end, bad); \ } while (0) #define ceph_decode_skip_map(p, end, ktype, vtype, bad) \ do { \ u32 len; \ \ ceph_decode_32_safe(p, end, len, bad); \ while (len--) { \ ceph_decode_skip_##ktype(p, end, bad); \ ceph_decode_skip_##vtype(p, end, bad); \ } \ } while (0) #define ceph_decode_skip_map_of_map(p, end, ktype1, ktype2, vtype2, bad) \ do { \ u32 len; \ \ ceph_decode_32_safe(p, end, len, bad); \ while (len--) { \ ceph_decode_skip_##ktype1(p, end, bad); \ ceph_decode_skip_map(p, end, ktype2, vtype2, bad); \ } \ } while (0) /* * struct ceph_timespec <-> struct timespec64 */ static inline void ceph_decode_timespec64(struct timespec64 *ts, const struct ceph_timespec *tv) { /* * This will still overflow in year 2106. We could extend * the protocol to steal two more bits from tv_nsec to * add three more 136 year epochs after that the way ext4 * does if necessary. */ ts->tv_sec = (time64_t)le32_to_cpu(tv->tv_sec); ts->tv_nsec = (long)le32_to_cpu(tv->tv_nsec); } static inline void ceph_encode_timespec64(struct ceph_timespec *tv, const struct timespec64 *ts) { tv->tv_sec = cpu_to_le32((u32)ts->tv_sec); tv->tv_nsec = cpu_to_le32((u32)ts->tv_nsec); } /* * sockaddr_storage <-> ceph_sockaddr */ #define CEPH_ENTITY_ADDR_TYPE_NONE 0 #define CEPH_ENTITY_ADDR_TYPE_LEGACY __cpu_to_le32(1) #define CEPH_ENTITY_ADDR_TYPE_MSGR2 __cpu_to_le32(2) #define CEPH_ENTITY_ADDR_TYPE_ANY __cpu_to_le32(3) static inline void ceph_encode_banner_addr(struct ceph_entity_addr *a) { __be16 ss_family = htons(a->in_addr.ss_family); a->in_addr.ss_family = *(__u16 *)&ss_family; /* Banner addresses require TYPE_NONE */ a->type = CEPH_ENTITY_ADDR_TYPE_NONE; } static inline void ceph_decode_banner_addr(struct ceph_entity_addr *a) { __be16 ss_family = *(__be16 *)&a->in_addr.ss_family; a->in_addr.ss_family = ntohs(ss_family); WARN_ON(a->in_addr.ss_family == 512); a->type = CEPH_ENTITY_ADDR_TYPE_LEGACY; } extern int ceph_decode_entity_addr(void **p, void *end, struct ceph_entity_addr *addr); int ceph_decode_entity_addrvec(void **p, void *end, bool msgr2, struct ceph_entity_addr *addr); int ceph_entity_addr_encoding_len(const struct ceph_entity_addr *addr); void ceph_encode_entity_addr(void **p, const struct ceph_entity_addr *addr); /* * encoders */ static inline void ceph_encode_64(void **p, u64 v) { put_unaligned_le64(v, (__le64 *)*p); *p += sizeof(u64); } static inline void ceph_encode_32(void **p, u32 v) { put_unaligned_le32(v, (__le32 *)*p); *p += sizeof(u32); } static inline void ceph_encode_16(void **p, u16 v) { put_unaligned_le16(v, (__le16 *)*p); *p += sizeof(u16); } static inline void ceph_encode_8(void **p, u8 v) { *(u8 *)*p = v; (*p)++; } static inline void ceph_encode_copy(void **p, const void *s, int len) { memcpy(*p, s, len); *p += len; } /* * filepath, string encoders */ static inline void ceph_encode_filepath(void **p, void *end, u64 ino, const char *path) { u32 len = path ? strlen(path) : 0; BUG_ON(*p + 1 + sizeof(ino) + sizeof(len) + len > end); ceph_encode_8(p, 1); ceph_encode_64(p, ino); ceph_encode_32(p, len); if (len) memcpy(*p, path, len); *p += len; } static inline void ceph_encode_string(void **p, void *end, const char *s, u32 len) { BUG_ON(*p + sizeof(len) + len > end); ceph_encode_32(p, len); if (len) memcpy(*p, s, len); *p += len; } /* * version and length starting block encoders/decoders */ /* current code version (u8) + compat code version (u8) + len of struct (u32) */ #define CEPH_ENCODING_START_BLK_LEN 6 /** * ceph_start_encoding - start encoding block * @struct_v: current (code) version of the encoding * @struct_compat: oldest code version that can decode it * @struct_len: length of struct encoding */ static inline void ceph_start_encoding(void **p, u8 struct_v, u8 struct_compat, u32 struct_len) { ceph_encode_8(p, struct_v); ceph_encode_8(p, struct_compat); ceph_encode_32(p, struct_len); } /** * ceph_start_decoding - start decoding block * @v: current version of the encoding that the code supports * @name: name of the struct (free-form) * @struct_v: out param for the encoding version * @struct_len: out param for the length of struct encoding * * Validates the length of struct encoding, so unsafe ceph_decode_* * variants can be used for decoding. */ static inline int ceph_start_decoding(void **p, void *end, u8 v, const char *name, u8 *struct_v, u32 *struct_len) { u8 struct_compat; ceph_decode_need(p, end, CEPH_ENCODING_START_BLK_LEN, bad); *struct_v = ceph_decode_8(p); struct_compat = ceph_decode_8(p); if (v < struct_compat) { pr_warn("got struct_v %d struct_compat %d > %d of %s\n", *struct_v, struct_compat, v, name); return -EINVAL; } *struct_len = ceph_decode_32(p); ceph_decode_need(p, end, *struct_len, bad); return 0; bad: return -ERANGE; } #define ceph_encode_need(p, end, n, bad) \ do { \ if (!likely(ceph_has_room(p, end, n))) \ goto bad; \ } while (0) #define ceph_encode_64_safe(p, end, v, bad) \ do { \ ceph_encode_need(p, end, sizeof(u64), bad); \ ceph_encode_64(p, v); \ } while (0) #define ceph_encode_32_safe(p, end, v, bad) \ do { \ ceph_encode_need(p, end, sizeof(u32), bad); \ ceph_encode_32(p, v); \ } while (0) #define ceph_encode_16_safe(p, end, v, bad) \ do { \ ceph_encode_need(p, end, sizeof(u16), bad); \ ceph_encode_16(p, v); \ } while (0) #define ceph_encode_8_safe(p, end, v, bad) \ do { \ ceph_encode_need(p, end, sizeof(u8), bad); \ ceph_encode_8(p, v); \ } while (0) #define ceph_encode_copy_safe(p, end, pv, n, bad) \ do { \ ceph_encode_need(p, end, n, bad); \ ceph_encode_copy(p, pv, n); \ } while (0) #define ceph_encode_string_safe(p, end, s, n, bad) \ do { \ ceph_encode_need(p, end, n, bad); \ ceph_encode_string(p, end, s, n); \ } while (0) #endif PK ! j/ª:$ :$ ceph/osdmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_OSDMAP_H #define _FS_CEPH_OSDMAP_H #include <linux/rbtree.h> #include <linux/ceph/types.h> #include <linux/ceph/decode.h> #include <linux/crush/crush.h> /* * The osd map describes the current membership of the osd cluster and * specifies the mapping of objects to placement groups and placement * groups to (sets of) osds. That is, it completely specifies the * (desired) distribution of all data objects in the system at some * point in time. * * Each map version is identified by an epoch, which increases monotonically. * * The map can be updated either via an incremental map (diff) describing * the change between two successive epochs, or as a fully encoded map. */ struct ceph_pg { uint64_t pool; uint32_t seed; }; #define CEPH_SPG_NOSHARD -1 struct ceph_spg { struct ceph_pg pgid; s8 shard; }; int ceph_pg_compare(const struct ceph_pg *lhs, const struct ceph_pg *rhs); int ceph_spg_compare(const struct ceph_spg *lhs, const struct ceph_spg *rhs); #define CEPH_POOL_FLAG_HASHPSPOOL (1ULL << 0) /* hash pg seed and pool id together */ #define CEPH_POOL_FLAG_FULL (1ULL << 1) /* pool is full */ #define CEPH_POOL_FLAG_FULL_QUOTA (1ULL << 10) /* pool ran out of quota, will set FULL too */ #define CEPH_POOL_FLAG_NEARFULL (1ULL << 11) /* pool is nearfull */ struct ceph_pg_pool_info { struct rb_node node; s64 id; u8 type; /* CEPH_POOL_TYPE_* */ u8 size; u8 min_size; u8 crush_ruleset; u8 object_hash; u32 last_force_request_resend; u32 pg_num, pgp_num; int pg_num_mask, pgp_num_mask; s64 read_tier; s64 write_tier; /* wins for read+write ops */ u64 flags; /* CEPH_POOL_FLAG_* */ char *name; bool was_full; /* for handle_one_map() */ }; static inline bool ceph_can_shift_osds(struct ceph_pg_pool_info *pool) { switch (pool->type) { case CEPH_POOL_TYPE_REP: return true; case CEPH_POOL_TYPE_EC: return false; default: BUG(); } } struct ceph_object_locator { s64 pool; struct ceph_string *pool_ns; }; static inline void ceph_oloc_init(struct ceph_object_locator *oloc) { oloc->pool = -1; oloc->pool_ns = NULL; } static inline bool ceph_oloc_empty(const struct ceph_object_locator *oloc) { return oloc->pool == -1; } void ceph_oloc_copy(struct ceph_object_locator *dest, const struct ceph_object_locator *src); void ceph_oloc_destroy(struct ceph_object_locator *oloc); /* * 51-char inline_name is long enough for all cephfs and all but one * rbd requests: <imgname> in "<imgname>.rbd"/"rbd_id.<imgname>" can be * arbitrarily long (~PAGE_SIZE). It's done once during rbd map; all * other rbd requests fit into inline_name. * * Makes ceph_object_id 64 bytes on 64-bit. */ #define CEPH_OID_INLINE_LEN 52 /* * Both inline and external buffers have space for a NUL-terminator, * which is carried around. It's not required though - RADOS object * names don't have to be NUL-terminated and may contain NULs. */ struct ceph_object_id { char *name; char inline_name[CEPH_OID_INLINE_LEN]; int name_len; }; #define __CEPH_OID_INITIALIZER(oid) { .name = (oid).inline_name } #define CEPH_DEFINE_OID_ONSTACK(oid) \ struct ceph_object_id oid = __CEPH_OID_INITIALIZER(oid) static inline void ceph_oid_init(struct ceph_object_id *oid) { *oid = (struct ceph_object_id) __CEPH_OID_INITIALIZER(*oid); } static inline bool ceph_oid_empty(const struct ceph_object_id *oid) { return oid->name == oid->inline_name && !oid->name_len; } void ceph_oid_copy(struct ceph_object_id *dest, const struct ceph_object_id *src); __printf(2, 3) void ceph_oid_printf(struct ceph_object_id *oid, const char *fmt, ...); __printf(3, 4) int ceph_oid_aprintf(struct ceph_object_id *oid, gfp_t gfp, const char *fmt, ...); void ceph_oid_destroy(struct ceph_object_id *oid); struct workspace_manager { struct list_head idle_ws; spinlock_t ws_lock; /* Number of free workspaces */ int free_ws; /* Total number of allocated workspaces */ atomic_t total_ws; /* Waiters for a free workspace */ wait_queue_head_t ws_wait; }; struct ceph_pg_mapping { struct rb_node node; struct ceph_pg pgid; union { struct { int len; int osds[]; } pg_temp, pg_upmap; struct { int osd; } primary_temp; struct { int len; int from_to[][2]; } pg_upmap_items; }; }; struct ceph_osdmap { struct ceph_fsid fsid; u32 epoch; struct ceph_timespec created, modified; u32 flags; /* CEPH_OSDMAP_* */ u32 max_osd; /* size of osd_state, _offload, _addr arrays */ u32 *osd_state; /* CEPH_OSD_* */ u32 *osd_weight; /* 0 = failed, 0x10000 = 100% normal */ struct ceph_entity_addr *osd_addr; struct rb_root pg_temp; struct rb_root primary_temp; /* remap (post-CRUSH, pre-up) */ struct rb_root pg_upmap; /* PG := raw set */ struct rb_root pg_upmap_items; /* from -> to within raw set */ u32 *osd_primary_affinity; struct rb_root pg_pools; u32 pool_max; /* the CRUSH map specifies the mapping of placement groups to * the list of osds that store+replicate them. */ struct crush_map *crush; struct workspace_manager crush_wsm; }; static inline bool ceph_osd_exists(struct ceph_osdmap *map, int osd) { return osd >= 0 && osd < map->max_osd && (map->osd_state[osd] & CEPH_OSD_EXISTS); } static inline bool ceph_osd_is_up(struct ceph_osdmap *map, int osd) { return ceph_osd_exists(map, osd) && (map->osd_state[osd] & CEPH_OSD_UP); } static inline bool ceph_osd_is_down(struct ceph_osdmap *map, int osd) { return !ceph_osd_is_up(map, osd); } char *ceph_osdmap_state_str(char *str, int len, u32 state); extern u32 ceph_get_primary_affinity(struct ceph_osdmap *map, int osd); static inline struct ceph_entity_addr *ceph_osd_addr(struct ceph_osdmap *map, int osd) { if (osd >= map->max_osd) return NULL; return &map->osd_addr[osd]; } #define CEPH_PGID_ENCODING_LEN (1 + 8 + 4 + 4) static inline int ceph_decode_pgid(void **p, void *end, struct ceph_pg *pgid) { __u8 version; if (!ceph_has_room(p, end, CEPH_PGID_ENCODING_LEN)) { pr_warn("incomplete pg encoding\n"); return -EINVAL; } version = ceph_decode_8(p); if (version > 1) { pr_warn("do not understand pg encoding %d > 1\n", (int)version); return -EINVAL; } pgid->pool = ceph_decode_64(p); pgid->seed = ceph_decode_32(p); *p += 4; /* skip deprecated preferred value */ return 0; } struct ceph_osdmap *ceph_osdmap_alloc(void); struct ceph_osdmap *ceph_osdmap_decode(void **p, void *end, bool msgr2); struct ceph_osdmap *osdmap_apply_incremental(void **p, void *end, bool msgr2, struct ceph_osdmap *map); extern void ceph_osdmap_destroy(struct ceph_osdmap *map); struct ceph_osds { int osds[CEPH_PG_MAX_SIZE]; int size; int primary; /* id, NOT index */ }; static inline void ceph_osds_init(struct ceph_osds *set) { set->size = 0; set->primary = -1; } void ceph_osds_copy(struct ceph_osds *dest, const struct ceph_osds *src); bool ceph_pg_is_split(const struct ceph_pg *pgid, u32 old_pg_num, u32 new_pg_num); bool ceph_is_new_interval(const struct ceph_osds *old_acting, const struct ceph_osds *new_acting, const struct ceph_osds *old_up, const struct ceph_osds *new_up, int old_size, int new_size, int old_min_size, int new_min_size, u32 old_pg_num, u32 new_pg_num, bool old_sort_bitwise, bool new_sort_bitwise, bool old_recovery_deletes, bool new_recovery_deletes, const struct ceph_pg *pgid); bool ceph_osds_changed(const struct ceph_osds *old_acting, const struct ceph_osds *new_acting, bool any_change); void __ceph_object_locator_to_pg(struct ceph_pg_pool_info *pi, const struct ceph_object_id *oid, const struct ceph_object_locator *oloc, struct ceph_pg *raw_pgid); int ceph_object_locator_to_pg(struct ceph_osdmap *osdmap, const struct ceph_object_id *oid, const struct ceph_object_locator *oloc, struct ceph_pg *raw_pgid); void ceph_pg_to_up_acting_osds(struct ceph_osdmap *osdmap, struct ceph_pg_pool_info *pi, const struct ceph_pg *raw_pgid, struct ceph_osds *up, struct ceph_osds *acting); bool ceph_pg_to_primary_shard(struct ceph_osdmap *osdmap, struct ceph_pg_pool_info *pi, const struct ceph_pg *raw_pgid, struct ceph_spg *spgid); int ceph_pg_to_acting_primary(struct ceph_osdmap *osdmap, const struct ceph_pg *raw_pgid); struct crush_loc { char *cl_type_name; char *cl_name; }; struct crush_loc_node { struct rb_node cl_node; struct crush_loc cl_loc; /* pointers into cl_data */ char cl_data[]; }; int ceph_parse_crush_location(char *crush_location, struct rb_root *locs); int ceph_compare_crush_locs(struct rb_root *locs1, struct rb_root *locs2); void ceph_clear_crush_locs(struct rb_root *locs); int ceph_get_crush_locality(struct ceph_osdmap *osdmap, int id, struct rb_root *locs); extern struct ceph_pg_pool_info *ceph_pg_pool_by_id(struct ceph_osdmap *map, u64 id); extern const char *ceph_pg_pool_name_by_id(struct ceph_osdmap *map, u64 id); extern int ceph_pg_poolid_by_name(struct ceph_osdmap *map, const char *name); u64 ceph_pg_pool_flags(struct ceph_osdmap *map, u64 id); #endif PK ! txm:� � ceph/pagelist.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __FS_CEPH_PAGELIST_H #define __FS_CEPH_PAGELIST_H #include <asm/byteorder.h> #include <linux/refcount.h> #include <linux/list.h> #include <linux/types.h> struct ceph_pagelist { struct list_head head; void *mapped_tail; size_t length; size_t room; struct list_head free_list; size_t num_pages_free; refcount_t refcnt; }; struct ceph_pagelist_cursor { struct ceph_pagelist *pl; /* pagelist, for error checking */ struct list_head *page_lru; /* page in list */ size_t room; /* room remaining to reset to */ }; struct ceph_pagelist *ceph_pagelist_alloc(gfp_t gfp_flags); extern void ceph_pagelist_release(struct ceph_pagelist *pl); extern int ceph_pagelist_append(struct ceph_pagelist *pl, const void *d, size_t l); extern int ceph_pagelist_reserve(struct ceph_pagelist *pl, size_t space); extern int ceph_pagelist_free_reserve(struct ceph_pagelist *pl); extern void ceph_pagelist_set_cursor(struct ceph_pagelist *pl, struct ceph_pagelist_cursor *c); extern int ceph_pagelist_truncate(struct ceph_pagelist *pl, struct ceph_pagelist_cursor *c); static inline int ceph_pagelist_encode_64(struct ceph_pagelist *pl, u64 v) { __le64 ev = cpu_to_le64(v); return ceph_pagelist_append(pl, &ev, sizeof(ev)); } static inline int ceph_pagelist_encode_32(struct ceph_pagelist *pl, u32 v) { __le32 ev = cpu_to_le32(v); return ceph_pagelist_append(pl, &ev, sizeof(ev)); } static inline int ceph_pagelist_encode_16(struct ceph_pagelist *pl, u16 v) { __le16 ev = cpu_to_le16(v); return ceph_pagelist_append(pl, &ev, sizeof(ev)); } static inline int ceph_pagelist_encode_8(struct ceph_pagelist *pl, u8 v) { return ceph_pagelist_append(pl, &v, 1); } static inline int ceph_pagelist_encode_string(struct ceph_pagelist *pl, char *s, u32 len) { int ret = ceph_pagelist_encode_32(pl, len); if (ret) return ret; if (len) return ceph_pagelist_append(pl, s, len); return 0; } #endif PK ! Lz_�^ ^ ceph/auth.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FS_CEPH_AUTH_H #define _FS_CEPH_AUTH_H #include <linux/ceph/types.h> #include <linux/ceph/buffer.h> /* * Abstract interface for communicating with the authenticate module. * There is some handshake that takes place between us and the monitor * to acquire the necessary keys. These are used to generate an * 'authorizer' that we use when connecting to a service (mds, osd). */ struct ceph_auth_client; struct ceph_msg; struct ceph_authorizer { void (*destroy)(struct ceph_authorizer *); }; struct ceph_auth_handshake { struct ceph_authorizer *authorizer; void *authorizer_buf; size_t authorizer_buf_len; void *authorizer_reply_buf; size_t authorizer_reply_buf_len; int (*sign_message)(struct ceph_auth_handshake *auth, struct ceph_msg *msg); int (*check_message_signature)(struct ceph_auth_handshake *auth, struct ceph_msg *msg); }; struct ceph_auth_client_ops { /* * true if we are authenticated and can connect to * services. */ int (*is_authenticated)(struct ceph_auth_client *ac); /* * true if we should (re)authenticate, e.g., when our tickets * are getting old and crusty. */ int (*should_authenticate)(struct ceph_auth_client *ac); /* * build requests and process replies during monitor * handshake. if handle_reply returns -EAGAIN, we build * another request. */ int (*build_request)(struct ceph_auth_client *ac, void *buf, void *end); int (*handle_reply)(struct ceph_auth_client *ac, u64 global_id, void *buf, void *end, u8 *session_key, int *session_key_len, u8 *con_secret, int *con_secret_len); /* * Create authorizer for connecting to a service, and verify * the response to authenticate the service. */ int (*create_authorizer)(struct ceph_auth_client *ac, int peer_type, struct ceph_auth_handshake *auth); /* ensure that an existing authorizer is up to date */ int (*update_authorizer)(struct ceph_auth_client *ac, int peer_type, struct ceph_auth_handshake *auth); int (*add_authorizer_challenge)(struct ceph_auth_client *ac, struct ceph_authorizer *a, void *challenge_buf, int challenge_buf_len); int (*verify_authorizer_reply)(struct ceph_auth_client *ac, struct ceph_authorizer *a, void *reply, int reply_len, u8 *session_key, int *session_key_len, u8 *con_secret, int *con_secret_len); void (*invalidate_authorizer)(struct ceph_auth_client *ac, int peer_type); /* reset when we (re)connect to a monitor */ void (*reset)(struct ceph_auth_client *ac); void (*destroy)(struct ceph_auth_client *ac); int (*sign_message)(struct ceph_auth_handshake *auth, struct ceph_msg *msg); int (*check_message_signature)(struct ceph_auth_handshake *auth, struct ceph_msg *msg); }; struct ceph_auth_client { u32 protocol; /* CEPH_AUTH_* */ void *private; /* for use by protocol implementation */ const struct ceph_auth_client_ops *ops; /* null iff protocol==0 */ bool negotiating; /* true if negotiating protocol */ const char *name; /* entity name */ u64 global_id; /* our unique id in system */ const struct ceph_crypto_key *key; /* our secret key */ unsigned want_keys; /* which services we want */ int preferred_mode; /* CEPH_CON_MODE_* */ int fallback_mode; /* ditto */ struct mutex mutex; }; void ceph_auth_set_global_id(struct ceph_auth_client *ac, u64 global_id); struct ceph_auth_client *ceph_auth_init(const char *name, const struct ceph_crypto_key *key, const int *con_modes); extern void ceph_auth_destroy(struct ceph_auth_client *ac); extern void ceph_auth_reset(struct ceph_auth_client *ac); extern int ceph_auth_build_hello(struct ceph_auth_client *ac, void *buf, size_t len); extern int ceph_handle_auth_reply(struct ceph_auth_client *ac, void *buf, size_t len, void *reply_buf, size_t reply_len); int ceph_auth_entity_name_encode(const char *name, void **p, void *end); extern int ceph_build_auth(struct ceph_auth_client *ac, void *msg_buf, size_t msg_len); extern int ceph_auth_is_authenticated(struct ceph_auth_client *ac); int __ceph_auth_get_authorizer(struct ceph_auth_client *ac, struct ceph_auth_handshake *auth, int peer_type, bool force_new, int *proto, int *pref_mode, int *fallb_mode); void ceph_auth_destroy_authorizer(struct ceph_authorizer *a); int ceph_auth_add_authorizer_challenge(struct ceph_auth_client *ac, struct ceph_authorizer *a, void *challenge_buf, int challenge_buf_len); int ceph_auth_verify_authorizer_reply(struct ceph_auth_client *ac, struct ceph_authorizer *a, void *reply, int reply_len, u8 *session_key, int *session_key_len, u8 *con_secret, int *con_secret_len); extern void ceph_auth_invalidate_authorizer(struct ceph_auth_client *ac, int peer_type); static inline int ceph_auth_sign_message(struct ceph_auth_handshake *auth, struct ceph_msg *msg) { if (auth->sign_message) return auth->sign_message(auth, msg); return 0; } static inline int ceph_auth_check_message_signature(struct ceph_auth_handshake *auth, struct ceph_msg *msg) { if (auth->check_message_signature) return auth->check_message_signature(auth, msg); return 0; } int ceph_auth_get_request(struct ceph_auth_client *ac, void *buf, int buf_len); int ceph_auth_handle_reply_more(struct ceph_auth_client *ac, void *reply, int reply_len, void *buf, int buf_len); int ceph_auth_handle_reply_done(struct ceph_auth_client *ac, u64 global_id, void *reply, int reply_len, u8 *session_key, int *session_key_len, u8 *con_secret, int *con_secret_len); bool ceph_auth_handle_bad_method(struct ceph_auth_client *ac, int used_proto, int result, const int *allowed_protos, int proto_cnt, const int *allowed_modes, int mode_cnt); int ceph_auth_get_authorizer(struct ceph_auth_client *ac, struct ceph_auth_handshake *auth, int peer_type, void *buf, int *buf_len); int ceph_auth_handle_svc_reply_more(struct ceph_auth_client *ac, struct ceph_auth_handshake *auth, void *reply, int reply_len, void *buf, int *buf_len); int ceph_auth_handle_svc_reply_done(struct ceph_auth_client *ac, struct ceph_auth_handshake *auth, void *reply, int reply_len, u8 *session_key, int *session_key_len, u8 *con_secret, int *con_secret_len); bool ceph_auth_handle_bad_authorizer(struct ceph_auth_client *ac, int peer_type, int used_proto, int result, const int *allowed_protos, int proto_cnt, const int *allowed_modes, int mode_cnt); #endif PK ! �{�B� � slimbus.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2011-2017, The Linux Foundation */ #ifndef _LINUX_SLIMBUS_H #define _LINUX_SLIMBUS_H #include <linux/device.h> #include <linux/module.h> #include <linux/completion.h> #include <linux/mod_devicetable.h> extern struct bus_type slimbus_bus; /** * struct slim_eaddr - Enumeration address for a SLIMbus device * @instance: Instance value * @dev_index: Device index * @prod_code: Product code * @manf_id: Manufacturer Id for the device */ struct slim_eaddr { u8 instance; u8 dev_index; u16 prod_code; u16 manf_id; } __packed; /** * enum slim_device_status - slim device status * @SLIM_DEVICE_STATUS_DOWN: Slim device is absent or not reported yet. * @SLIM_DEVICE_STATUS_UP: Slim device is announced on the bus. * @SLIM_DEVICE_STATUS_RESERVED: Reserved for future use. */ enum slim_device_status { SLIM_DEVICE_STATUS_DOWN = 0, SLIM_DEVICE_STATUS_UP, SLIM_DEVICE_STATUS_RESERVED, }; struct slim_controller; /** * struct slim_device - Slim device handle. * @dev: Driver model representation of the device. * @e_addr: Enumeration address of this device. * @status: slim device status * @ctrl: slim controller instance. * @laddr: 1-byte Logical address of this device. * @is_laddr_valid: indicates if the laddr is valid or not * @stream_list: List of streams on this device * @stream_list_lock: lock to protect the stream list * * This is the client/device handle returned when a SLIMbus * device is registered with a controller. * Pointer to this structure is used by client-driver as a handle. */ struct slim_device { struct device dev; struct slim_eaddr e_addr; struct slim_controller *ctrl; enum slim_device_status status; u8 laddr; bool is_laddr_valid; struct list_head stream_list; spinlock_t stream_list_lock; }; #define to_slim_device(d) container_of(d, struct slim_device, dev) /** * struct slim_driver - SLIMbus 'generic device' (slave) device driver * (similar to 'spi_device' on SPI) * @probe: Binds this driver to a SLIMbus device. * @remove: Unbinds this driver from the SLIMbus device. * @shutdown: Standard shutdown callback used during powerdown/halt. * @device_status: This callback is called when * - The device reports present and gets a laddr assigned * - The device reports absent, or the bus goes down. * @driver: SLIMbus device drivers should initialize name and owner field of * this structure * @id_table: List of SLIMbus devices supported by this driver */ struct slim_driver { int (*probe)(struct slim_device *sl); void (*remove)(struct slim_device *sl); void (*shutdown)(struct slim_device *sl); int (*device_status)(struct slim_device *sl, enum slim_device_status s); struct device_driver driver; const struct slim_device_id *id_table; }; #define to_slim_driver(d) container_of(d, struct slim_driver, driver) /** * struct slim_val_inf - Slimbus value or information element * @start_offset: Specifies starting offset in information/value element map * @rbuf: buffer to read the values * @wbuf: buffer to write * @num_bytes: upto 16. This ensures that the message will fit the slicesize * per SLIMbus spec * @comp: completion for asynchronous operations, valid only if TID is * required for transaction, like REQUEST operations. * Rest of the transactions are synchronous anyway. */ struct slim_val_inf { u16 start_offset; u8 num_bytes; u8 *rbuf; const u8 *wbuf; struct completion *comp; }; #define SLIM_DEVICE_MAX_CHANNELS 256 /* A SLIMBus Device may have frmo 0 to 31 Ports (inclusive) */ #define SLIM_DEVICE_MAX_PORTS 32 /** * struct slim_stream_config - SLIMbus stream configuration * Configuring a stream is done at hw_params or prepare call * from audio drivers where they have all the required information * regarding rate, number of channels and so on. * There is a 1:1 mapping of channel and ports. * * @rate: data rate * @bps: bits per data sample * @ch_count: number of channels * @chs: pointer to list of channel numbers * @port_mask: port mask of ports to use for this stream * @direction: direction of the stream, SNDRV_PCM_STREAM_PLAYBACK * or SNDRV_PCM_STREAM_CAPTURE. */ struct slim_stream_config { unsigned int rate; unsigned int bps; /* MAX 256 channels */ unsigned int ch_count; unsigned int *chs; /* Max 32 ports per device */ unsigned long port_mask; int direction; }; /* * use a macro to avoid include chaining to get THIS_MODULE */ #define slim_driver_register(drv) \ __slim_driver_register(drv, THIS_MODULE) int __slim_driver_register(struct slim_driver *drv, struct module *owner); void slim_driver_unregister(struct slim_driver *drv); /** * module_slim_driver() - Helper macro for registering a SLIMbus driver * @__slim_driver: slimbus_driver struct * * Helper macro for SLIMbus drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_slim_driver(__slim_driver) \ module_driver(__slim_driver, slim_driver_register, \ slim_driver_unregister) static inline void *slim_get_devicedata(const struct slim_device *dev) { return dev_get_drvdata(&dev->dev); } static inline void slim_set_devicedata(struct slim_device *dev, void *data) { dev_set_drvdata(&dev->dev, data); } struct slim_device *of_slim_get_device(struct slim_controller *ctrl, struct device_node *np); struct slim_device *slim_get_device(struct slim_controller *ctrl, struct slim_eaddr *e_addr); int slim_get_logical_addr(struct slim_device *sbdev); /* Information Element management messages */ #define SLIM_MSG_MC_REQUEST_INFORMATION 0x20 #define SLIM_MSG_MC_REQUEST_CLEAR_INFORMATION 0x21 #define SLIM_MSG_MC_REPLY_INFORMATION 0x24 #define SLIM_MSG_MC_CLEAR_INFORMATION 0x28 #define SLIM_MSG_MC_REPORT_INFORMATION 0x29 /* Value Element management messages */ #define SLIM_MSG_MC_REQUEST_VALUE 0x60 #define SLIM_MSG_MC_REQUEST_CHANGE_VALUE 0x61 #define SLIM_MSG_MC_REPLY_VALUE 0x64 #define SLIM_MSG_MC_CHANGE_VALUE 0x68 int slim_xfer_msg(struct slim_device *sbdev, struct slim_val_inf *msg, u8 mc); int slim_readb(struct slim_device *sdev, u32 addr); int slim_writeb(struct slim_device *sdev, u32 addr, u8 value); int slim_read(struct slim_device *sdev, u32 addr, size_t count, u8 *val); int slim_write(struct slim_device *sdev, u32 addr, size_t count, u8 *val); /* SLIMbus Stream apis */ struct slim_stream_runtime; struct slim_stream_runtime *slim_stream_allocate(struct slim_device *dev, const char *sname); int slim_stream_prepare(struct slim_stream_runtime *stream, struct slim_stream_config *c); int slim_stream_enable(struct slim_stream_runtime *stream); int slim_stream_disable(struct slim_stream_runtime *stream); int slim_stream_unprepare(struct slim_stream_runtime *stream); int slim_stream_free(struct slim_stream_runtime *stream); #endif /* _LINUX_SLIMBUS_H */ PK ! �lw nfs_ssc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/nfs_ssc.h * * Author: Dai Ngo <dai.ngo@oracle.com> * * Copyright (c) 2020, Oracle and/or its affiliates. */ #include <linux/nfs_fs.h> #include <linux/sunrpc/svc.h> extern struct nfs_ssc_client_ops_tbl nfs_ssc_client_tbl; /* * NFS_V4 */ struct nfs4_ssc_client_ops { struct file *(*sco_open)(struct vfsmount *ss_mnt, struct nfs_fh *src_fh, nfs4_stateid *stateid); void (*sco_close)(struct file *filep); }; /* * NFS_FS */ struct nfs_ssc_client_ops { void (*sco_sb_deactive)(struct super_block *sb); }; struct nfs_ssc_client_ops_tbl { const struct nfs4_ssc_client_ops *ssc_nfs4_ops; const struct nfs_ssc_client_ops *ssc_nfs_ops; }; extern void nfs42_ssc_register_ops(void); extern void nfs42_ssc_unregister_ops(void); extern void nfs42_ssc_register(const struct nfs4_ssc_client_ops *ops); extern void nfs42_ssc_unregister(const struct nfs4_ssc_client_ops *ops); #ifdef CONFIG_NFSD_V4_2_INTER_SSC static inline struct file *nfs42_ssc_open(struct vfsmount *ss_mnt, struct nfs_fh *src_fh, nfs4_stateid *stateid) { if (nfs_ssc_client_tbl.ssc_nfs4_ops) return (*nfs_ssc_client_tbl.ssc_nfs4_ops->sco_open)(ss_mnt, src_fh, stateid); return ERR_PTR(-EIO); } static inline void nfs42_ssc_close(struct file *filep) { if (nfs_ssc_client_tbl.ssc_nfs4_ops) (*nfs_ssc_client_tbl.ssc_nfs4_ops->sco_close)(filep); } #endif struct nfsd4_ssc_umount_item { struct list_head nsui_list; bool nsui_busy; /* * nsui_refcnt inited to 2, 1 on list and 1 for consumer. Entry * is removed when refcnt drops to 1 and nsui_expire expires. */ refcount_t nsui_refcnt; unsigned long nsui_expire; struct vfsmount *nsui_vfsmount; char nsui_ipaddr[RPC_MAX_ADDRBUFLEN + 1]; }; /* * NFS_FS */ extern void nfs_ssc_register(const struct nfs_ssc_client_ops *ops); extern void nfs_ssc_unregister(const struct nfs_ssc_client_ops *ops); static inline void nfs_do_sb_deactive(struct super_block *sb) { if (nfs_ssc_client_tbl.ssc_nfs_ops) (*nfs_ssc_client_tbl.ssc_nfs_ops->sco_sb_deactive)(sb); } PK ! A�Y(� � stackleak.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_STACKLEAK_H #define _LINUX_STACKLEAK_H #include <linux/sched.h> #include <linux/sched/task_stack.h> /* * Check that the poison value points to the unused hole in the * virtual memory map for your platform. */ #define STACKLEAK_POISON -0xBEEF #define STACKLEAK_SEARCH_DEPTH 128 #ifdef CONFIG_GCC_PLUGIN_STACKLEAK #include <asm/stacktrace.h> static inline void stackleak_task_init(struct task_struct *t) { t->lowest_stack = (unsigned long)end_of_stack(t) + sizeof(unsigned long); # ifdef CONFIG_STACKLEAK_METRICS t->prev_lowest_stack = t->lowest_stack; # endif } #ifdef CONFIG_STACKLEAK_RUNTIME_DISABLE int stack_erasing_sysctl(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); #endif #else /* !CONFIG_GCC_PLUGIN_STACKLEAK */ static inline void stackleak_task_init(struct task_struct *t) { } #endif #endif PK ! o�ܼ� � once_lite.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ONCE_LITE_H #define _LINUX_ONCE_LITE_H #include <linux/types.h> /* Call a function once. Similar to DO_ONCE(), but does not use jump label * patching via static keys. */ #define DO_ONCE_LITE(func, ...) \ DO_ONCE_LITE_IF(true, func, ##__VA_ARGS__) #define __ONCE_LITE_IF(condition) \ ({ \ static bool __section(".data.once") __already_done; \ bool __ret_cond = !!(condition); \ bool __ret_once = false; \ \ if (unlikely(__ret_cond && !__already_done)) { \ __already_done = true; \ __ret_once = true; \ } \ unlikely(__ret_once); \ }) #define DO_ONCE_LITE_IF(condition, func, ...) \ ({ \ bool __ret_do_once = !!(condition); \ \ if (__ONCE_LITE_IF(__ret_do_once)) \ func(__VA_ARGS__); \ \ unlikely(__ret_do_once); \ }) #endif /* _LINUX_ONCE_LITE_H */ PK ! ����* �* dccp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DCCP_H #define _LINUX_DCCP_H #include <linux/in.h> #include <linux/interrupt.h> #include <linux/ktime.h> #include <linux/list.h> #include <linux/uio.h> #include <linux/workqueue.h> #include <net/inet_connection_sock.h> #include <net/inet_sock.h> #include <net/inet_timewait_sock.h> #include <net/tcp_states.h> #include <uapi/linux/dccp.h> enum dccp_state { DCCP_OPEN = TCP_ESTABLISHED, DCCP_REQUESTING = TCP_SYN_SENT, DCCP_LISTEN = TCP_LISTEN, DCCP_RESPOND = TCP_SYN_RECV, /* * States involved in closing a DCCP connection: * 1) ACTIVE_CLOSEREQ is entered by a server sending a CloseReq. * * 2) CLOSING can have three different meanings (RFC 4340, 8.3): * a. Client has performed active-close, has sent a Close to the server * from state OPEN or PARTOPEN, and is waiting for the final Reset * (in this case, SOCK_DONE == 1). * b. Client is asked to perform passive-close, by receiving a CloseReq * in (PART)OPEN state. It sends a Close and waits for final Reset * (in this case, SOCK_DONE == 0). * c. Server performs an active-close as in (a), keeps TIMEWAIT state. * * 3) The following intermediate states are employed to give passively * closing nodes a chance to process their unread data: * - PASSIVE_CLOSE (from OPEN => CLOSED) and * - PASSIVE_CLOSEREQ (from (PART)OPEN to CLOSING; case (b) above). */ DCCP_ACTIVE_CLOSEREQ = TCP_FIN_WAIT1, DCCP_PASSIVE_CLOSE = TCP_CLOSE_WAIT, /* any node receiving a Close */ DCCP_CLOSING = TCP_CLOSING, DCCP_TIME_WAIT = TCP_TIME_WAIT, DCCP_CLOSED = TCP_CLOSE, DCCP_NEW_SYN_RECV = TCP_NEW_SYN_RECV, DCCP_PARTOPEN = TCP_MAX_STATES, DCCP_PASSIVE_CLOSEREQ, /* clients receiving CloseReq */ DCCP_MAX_STATES }; enum { DCCPF_OPEN = TCPF_ESTABLISHED, DCCPF_REQUESTING = TCPF_SYN_SENT, DCCPF_LISTEN = TCPF_LISTEN, DCCPF_RESPOND = TCPF_SYN_RECV, DCCPF_ACTIVE_CLOSEREQ = TCPF_FIN_WAIT1, DCCPF_CLOSING = TCPF_CLOSING, DCCPF_TIME_WAIT = TCPF_TIME_WAIT, DCCPF_CLOSED = TCPF_CLOSE, DCCPF_NEW_SYN_RECV = TCPF_NEW_SYN_RECV, DCCPF_PARTOPEN = (1 << DCCP_PARTOPEN), }; static inline struct dccp_hdr *dccp_hdr(const struct sk_buff *skb) { return (struct dccp_hdr *)skb_transport_header(skb); } static inline struct dccp_hdr *dccp_zeroed_hdr(struct sk_buff *skb, int headlen) { skb_push(skb, headlen); skb_reset_transport_header(skb); return memset(skb_transport_header(skb), 0, headlen); } static inline struct dccp_hdr_ext *dccp_hdrx(const struct dccp_hdr *dh) { return (struct dccp_hdr_ext *)((unsigned char *)dh + sizeof(*dh)); } static inline unsigned int __dccp_basic_hdr_len(const struct dccp_hdr *dh) { return sizeof(*dh) + (dh->dccph_x ? sizeof(struct dccp_hdr_ext) : 0); } static inline unsigned int dccp_basic_hdr_len(const struct sk_buff *skb) { const struct dccp_hdr *dh = dccp_hdr(skb); return __dccp_basic_hdr_len(dh); } static inline __u64 dccp_hdr_seq(const struct dccp_hdr *dh) { __u64 seq_nr = ntohs(dh->dccph_seq); if (dh->dccph_x != 0) seq_nr = (seq_nr << 32) + ntohl(dccp_hdrx(dh)->dccph_seq_low); else seq_nr += (u32)dh->dccph_seq2 << 16; return seq_nr; } static inline struct dccp_hdr_request *dccp_hdr_request(struct sk_buff *skb) { return (struct dccp_hdr_request *)(skb_transport_header(skb) + dccp_basic_hdr_len(skb)); } static inline struct dccp_hdr_ack_bits *dccp_hdr_ack_bits(const struct sk_buff *skb) { return (struct dccp_hdr_ack_bits *)(skb_transport_header(skb) + dccp_basic_hdr_len(skb)); } static inline u64 dccp_hdr_ack_seq(const struct sk_buff *skb) { const struct dccp_hdr_ack_bits *dhack = dccp_hdr_ack_bits(skb); return ((u64)ntohs(dhack->dccph_ack_nr_high) << 32) + ntohl(dhack->dccph_ack_nr_low); } static inline struct dccp_hdr_response *dccp_hdr_response(struct sk_buff *skb) { return (struct dccp_hdr_response *)(skb_transport_header(skb) + dccp_basic_hdr_len(skb)); } static inline struct dccp_hdr_reset *dccp_hdr_reset(struct sk_buff *skb) { return (struct dccp_hdr_reset *)(skb_transport_header(skb) + dccp_basic_hdr_len(skb)); } static inline unsigned int __dccp_hdr_len(const struct dccp_hdr *dh) { return __dccp_basic_hdr_len(dh) + dccp_packet_hdr_len(dh->dccph_type); } static inline unsigned int dccp_hdr_len(const struct sk_buff *skb) { return __dccp_hdr_len(dccp_hdr(skb)); } /** * struct dccp_request_sock - represent DCCP-specific connection request * @dreq_inet_rsk: structure inherited from * @dreq_iss: initial sequence number, sent on the first Response (RFC 4340, 7.1) * @dreq_gss: greatest sequence number sent (for retransmitted Responses) * @dreq_isr: initial sequence number received in the first Request * @dreq_gsr: greatest sequence number received (for retransmitted Request(s)) * @dreq_service: service code present on the Request (there is just one) * @dreq_featneg: feature negotiation options for this connection * The following two fields are analogous to the ones in dccp_sock: * @dreq_timestamp_echo: last received timestamp to echo (13.1) * @dreq_timestamp_echo: the time of receiving the last @dreq_timestamp_echo */ struct dccp_request_sock { struct inet_request_sock dreq_inet_rsk; __u64 dreq_iss; __u64 dreq_gss; __u64 dreq_isr; __u64 dreq_gsr; __be32 dreq_service; spinlock_t dreq_lock; struct list_head dreq_featneg; __u32 dreq_timestamp_echo; __u32 dreq_timestamp_time; }; static inline struct dccp_request_sock *dccp_rsk(const struct request_sock *req) { return (struct dccp_request_sock *)req; } extern struct inet_timewait_death_row dccp_death_row; extern int dccp_parse_options(struct sock *sk, struct dccp_request_sock *dreq, struct sk_buff *skb); struct dccp_options_received { u64 dccpor_ndp:48; u32 dccpor_timestamp; u32 dccpor_timestamp_echo; u32 dccpor_elapsed_time; }; struct ccid; enum dccp_role { DCCP_ROLE_UNDEFINED, DCCP_ROLE_LISTEN, DCCP_ROLE_CLIENT, DCCP_ROLE_SERVER, }; struct dccp_service_list { __u32 dccpsl_nr; __be32 dccpsl_list[]; }; #define DCCP_SERVICE_INVALID_VALUE htonl((__u32)-1) #define DCCP_SERVICE_CODE_IS_ABSENT 0 static inline bool dccp_list_has_service(const struct dccp_service_list *sl, const __be32 service) { if (likely(sl != NULL)) { u32 i = sl->dccpsl_nr; while (i--) if (sl->dccpsl_list[i] == service) return true; } return false; } struct dccp_ackvec; /** * struct dccp_sock - DCCP socket state * * @dccps_swl - sequence number window low * @dccps_swh - sequence number window high * @dccps_awl - acknowledgement number window low * @dccps_awh - acknowledgement number window high * @dccps_iss - initial sequence number sent * @dccps_isr - initial sequence number received * @dccps_osr - first OPEN sequence number received * @dccps_gss - greatest sequence number sent * @dccps_gsr - greatest valid sequence number received * @dccps_gar - greatest valid ack number received on a non-Sync; initialized to %dccps_iss * @dccps_service - first (passive sock) or unique (active sock) service code * @dccps_service_list - second .. last service code on passive socket * @dccps_timestamp_echo - latest timestamp received on a TIMESTAMP option * @dccps_timestamp_time - time of receiving latest @dccps_timestamp_echo * @dccps_l_ack_ratio - feature-local Ack Ratio * @dccps_r_ack_ratio - feature-remote Ack Ratio * @dccps_l_seq_win - local Sequence Window (influences ack number validity) * @dccps_r_seq_win - remote Sequence Window (influences seq number validity) * @dccps_pcslen - sender partial checksum coverage (via sockopt) * @dccps_pcrlen - receiver partial checksum coverage (via sockopt) * @dccps_send_ndp_count - local Send NDP Count feature (7.7.2) * @dccps_ndp_count - number of Non Data Packets since last data packet * @dccps_mss_cache - current value of MSS (path MTU minus header sizes) * @dccps_rate_last - timestamp for rate-limiting DCCP-Sync (RFC 4340, 7.5.4) * @dccps_featneg - tracks feature-negotiation state (mostly during handshake) * @dccps_hc_rx_ackvec - rx half connection ack vector * @dccps_hc_rx_ccid - CCID used for the receiver (or receiving half-connection) * @dccps_hc_tx_ccid - CCID used for the sender (or sending half-connection) * @dccps_options_received - parsed set of retrieved options * @dccps_qpolicy - TX dequeueing policy, one of %dccp_packet_dequeueing_policy * @dccps_tx_qlen - maximum length of the TX queue * @dccps_role - role of this sock, one of %dccp_role * @dccps_hc_rx_insert_options - receiver wants to add options when acking * @dccps_hc_tx_insert_options - sender wants to add options when sending * @dccps_server_timewait - server holds timewait state on close (RFC 4340, 8.3) * @dccps_sync_scheduled - flag which signals "send out-of-band message soon" * @dccps_xmitlet - tasklet scheduled by the TX CCID to dequeue data packets * @dccps_xmit_timer - used by the TX CCID to delay sending (rate-based pacing) * @dccps_syn_rtt - RTT sample from Request/Response exchange (in usecs) */ struct dccp_sock { /* inet_connection_sock has to be the first member of dccp_sock */ struct inet_connection_sock dccps_inet_connection; #define dccps_syn_rtt dccps_inet_connection.icsk_ack.lrcvtime __u64 dccps_swl; __u64 dccps_swh; __u64 dccps_awl; __u64 dccps_awh; __u64 dccps_iss; __u64 dccps_isr; __u64 dccps_osr; __u64 dccps_gss; __u64 dccps_gsr; __u64 dccps_gar; __be32 dccps_service; __u32 dccps_mss_cache; struct dccp_service_list *dccps_service_list; __u32 dccps_timestamp_echo; __u32 dccps_timestamp_time; __u16 dccps_l_ack_ratio; __u16 dccps_r_ack_ratio; __u64 dccps_l_seq_win:48; __u64 dccps_r_seq_win:48; __u8 dccps_pcslen:4; __u8 dccps_pcrlen:4; __u8 dccps_send_ndp_count:1; __u64 dccps_ndp_count:48; unsigned long dccps_rate_last; struct list_head dccps_featneg; struct dccp_ackvec *dccps_hc_rx_ackvec; struct ccid *dccps_hc_rx_ccid; struct ccid *dccps_hc_tx_ccid; struct dccp_options_received dccps_options_received; __u8 dccps_qpolicy; __u32 dccps_tx_qlen; enum dccp_role dccps_role:2; __u8 dccps_hc_rx_insert_options:1; __u8 dccps_hc_tx_insert_options:1; __u8 dccps_server_timewait:1; __u8 dccps_sync_scheduled:1; struct tasklet_struct dccps_xmitlet; struct timer_list dccps_xmit_timer; }; static inline struct dccp_sock *dccp_sk(const struct sock *sk) { return (struct dccp_sock *)sk; } static inline const char *dccp_role(const struct sock *sk) { switch (dccp_sk(sk)->dccps_role) { case DCCP_ROLE_UNDEFINED: return "undefined"; case DCCP_ROLE_LISTEN: return "listen"; case DCCP_ROLE_SERVER: return "server"; case DCCP_ROLE_CLIENT: return "client"; } return NULL; } extern void dccp_syn_ack_timeout(const struct request_sock *req); #endif /* _LINUX_DCCP_H */ PK ! v4m�u �u cpumask.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_CPUMASK_H #define __LINUX_CPUMASK_H /* * Cpumasks provide a bitmap suitable for representing the * set of CPU's in a system, one bit position per CPU number. In general, * only nr_cpu_ids (<= NR_CPUS) bits are valid. */ #include <linux/kernel.h> #include <linux/threads.h> #include <linux/bitmap.h> #include <linux/atomic.h> #include <linux/bug.h> /* Don't assign or return these: may not be this big! */ typedef struct cpumask { DECLARE_BITMAP(bits, NR_CPUS); } cpumask_t; /** * cpumask_bits - get the bits in a cpumask * @maskp: the struct cpumask * * * You should only assume nr_cpu_ids bits of this mask are valid. This is * a macro so it's const-correct. */ #define cpumask_bits(maskp) ((maskp)->bits) /** * cpumask_pr_args - printf args to output a cpumask * @maskp: cpumask to be printed * * Can be used to provide arguments for '%*pb[l]' when printing a cpumask. */ #define cpumask_pr_args(maskp) nr_cpu_ids, cpumask_bits(maskp) #if NR_CPUS == 1 #define nr_cpu_ids 1U #else extern unsigned int nr_cpu_ids; #endif #ifdef CONFIG_CPUMASK_OFFSTACK /* Assuming NR_CPUS is huge, a runtime limit is more efficient. Also, * not all bits may be allocated. */ #define nr_cpumask_bits nr_cpu_ids #else #define nr_cpumask_bits ((unsigned int)NR_CPUS) #endif /* * The following particular system cpumasks and operations manage * possible, present, active and online cpus. * * cpu_possible_mask- has bit 'cpu' set iff cpu is populatable * cpu_present_mask - has bit 'cpu' set iff cpu is populated * cpu_online_mask - has bit 'cpu' set iff cpu available to scheduler * cpu_active_mask - has bit 'cpu' set iff cpu available to migration * * If !CONFIG_HOTPLUG_CPU, present == possible, and active == online. * * The cpu_possible_mask is fixed at boot time, as the set of CPU id's * that it is possible might ever be plugged in at anytime during the * life of that system boot. The cpu_present_mask is dynamic(*), * representing which CPUs are currently plugged in. And * cpu_online_mask is the dynamic subset of cpu_present_mask, * indicating those CPUs available for scheduling. * * If HOTPLUG is enabled, then cpu_possible_mask is forced to have * all NR_CPUS bits set, otherwise it is just the set of CPUs that * ACPI reports present at boot. * * If HOTPLUG is enabled, then cpu_present_mask varies dynamically, * depending on what ACPI reports as currently plugged in, otherwise * cpu_present_mask is just a copy of cpu_possible_mask. * * (*) Well, cpu_present_mask is dynamic in the hotplug case. If not * hotplug, it's a copy of cpu_possible_mask, hence fixed at boot. * * Subtleties: * 1) UP arch's (NR_CPUS == 1, CONFIG_SMP not defined) hardcode * assumption that their single CPU is online. The UP * cpu_{online,possible,present}_masks are placebos. Changing them * will have no useful affect on the following num_*_cpus() * and cpu_*() macros in the UP case. This ugliness is a UP * optimization - don't waste any instructions or memory references * asking if you're online or how many CPUs there are if there is * only one CPU. */ extern struct cpumask __cpu_possible_mask; extern struct cpumask __cpu_online_mask; extern struct cpumask __cpu_present_mask; extern struct cpumask __cpu_active_mask; extern struct cpumask __cpu_dying_mask; #define cpu_possible_mask ((const struct cpumask *)&__cpu_possible_mask) #define cpu_online_mask ((const struct cpumask *)&__cpu_online_mask) #define cpu_present_mask ((const struct cpumask *)&__cpu_present_mask) #define cpu_active_mask ((const struct cpumask *)&__cpu_active_mask) #define cpu_dying_mask ((const struct cpumask *)&__cpu_dying_mask) extern atomic_t __num_online_cpus; extern cpumask_t cpus_booted_once_mask; static inline void cpu_max_bits_warn(unsigned int cpu, unsigned int bits) { #ifdef CONFIG_DEBUG_PER_CPU_MAPS WARN_ON_ONCE(cpu >= bits); #endif /* CONFIG_DEBUG_PER_CPU_MAPS */ } /* verify cpu argument to cpumask_* operators */ static inline unsigned int cpumask_check(unsigned int cpu) { cpu_max_bits_warn(cpu, nr_cpumask_bits); return cpu; } #if NR_CPUS == 1 /* Uniprocessor. Assume all masks are "1". */ static inline unsigned int cpumask_first(const struct cpumask *srcp) { return 0; } static inline unsigned int cpumask_last(const struct cpumask *srcp) { return 0; } /* Valid inputs for n are -1 and 0. */ static inline unsigned int cpumask_next(int n, const struct cpumask *srcp) { return n+1; } static inline unsigned int cpumask_next_zero(int n, const struct cpumask *srcp) { return n+1; } static inline unsigned int cpumask_next_and(int n, const struct cpumask *srcp, const struct cpumask *andp) { return n+1; } static inline unsigned int cpumask_next_wrap(int n, const struct cpumask *mask, int start, bool wrap) { /* cpu0 unless stop condition, wrap and at cpu0, then nr_cpumask_bits */ return (wrap && n == 0); } /* cpu must be a valid cpu, ie 0, so there's no other choice. */ static inline unsigned int cpumask_any_but(const struct cpumask *mask, unsigned int cpu) { return 1; } static inline unsigned int cpumask_local_spread(unsigned int i, int node) { return 0; } static inline int cpumask_any_and_distribute(const struct cpumask *src1p, const struct cpumask *src2p) { return cpumask_next_and(-1, src1p, src2p); } static inline int cpumask_any_distribute(const struct cpumask *srcp) { return cpumask_first(srcp); } #define for_each_cpu(cpu, mask) \ for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask) #define for_each_cpu_not(cpu, mask) \ for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask) #define for_each_cpu_wrap(cpu, mask, start) \ for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask, (void)(start)) #define for_each_cpu_and(cpu, mask1, mask2) \ for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask1, (void)mask2) #else /** * cpumask_first - get the first cpu in a cpumask * @srcp: the cpumask pointer * * Returns >= nr_cpu_ids if no cpus set. */ static inline unsigned int cpumask_first(const struct cpumask *srcp) { return find_first_bit(cpumask_bits(srcp), nr_cpumask_bits); } /** * cpumask_last - get the last CPU in a cpumask * @srcp: - the cpumask pointer * * Returns >= nr_cpumask_bits if no CPUs set. */ static inline unsigned int cpumask_last(const struct cpumask *srcp) { return find_last_bit(cpumask_bits(srcp), nr_cpumask_bits); } unsigned int __pure cpumask_next(int n, const struct cpumask *srcp); /** * cpumask_next_zero - get the next unset cpu in a cpumask * @n: the cpu prior to the place to search (ie. return will be > @n) * @srcp: the cpumask pointer * * Returns >= nr_cpu_ids if no further cpus unset. */ static inline unsigned int cpumask_next_zero(int n, const struct cpumask *srcp) { /* -1 is a legal arg here. */ if (n != -1) cpumask_check(n); return find_next_zero_bit(cpumask_bits(srcp), nr_cpumask_bits, n+1); } int __pure cpumask_next_and(int n, const struct cpumask *, const struct cpumask *); int __pure cpumask_any_but(const struct cpumask *mask, unsigned int cpu); unsigned int cpumask_local_spread(unsigned int i, int node); int cpumask_any_and_distribute(const struct cpumask *src1p, const struct cpumask *src2p); int cpumask_any_distribute(const struct cpumask *srcp); /** * for_each_cpu - iterate over every cpu in a mask * @cpu: the (optionally unsigned) integer iterator * @mask: the cpumask pointer * * After the loop, cpu is >= nr_cpu_ids. */ #define for_each_cpu(cpu, mask) \ for ((cpu) = -1; \ (cpu) = cpumask_next((cpu), (mask)), \ (cpu) < nr_cpu_ids;) /** * for_each_cpu_not - iterate over every cpu in a complemented mask * @cpu: the (optionally unsigned) integer iterator * @mask: the cpumask pointer * * After the loop, cpu is >= nr_cpu_ids. */ #define for_each_cpu_not(cpu, mask) \ for ((cpu) = -1; \ (cpu) = cpumask_next_zero((cpu), (mask)), \ (cpu) < nr_cpu_ids;) extern int cpumask_next_wrap(int n, const struct cpumask *mask, int start, bool wrap); /** * for_each_cpu_wrap - iterate over every cpu in a mask, starting at a specified location * @cpu: the (optionally unsigned) integer iterator * @mask: the cpumask pointer * @start: the start location * * The implementation does not assume any bit in @mask is set (including @start). * * After the loop, cpu is >= nr_cpu_ids. */ #define for_each_cpu_wrap(cpu, mask, start) \ for ((cpu) = cpumask_next_wrap((start)-1, (mask), (start), false); \ (cpu) < nr_cpumask_bits; \ (cpu) = cpumask_next_wrap((cpu), (mask), (start), true)) /** * for_each_cpu_and - iterate over every cpu in both masks * @cpu: the (optionally unsigned) integer iterator * @mask1: the first cpumask pointer * @mask2: the second cpumask pointer * * This saves a temporary CPU mask in many places. It is equivalent to: * struct cpumask tmp; * cpumask_and(&tmp, &mask1, &mask2); * for_each_cpu(cpu, &tmp) * ... * * After the loop, cpu is >= nr_cpu_ids. */ #define for_each_cpu_and(cpu, mask1, mask2) \ for ((cpu) = -1; \ (cpu) = cpumask_next_and((cpu), (mask1), (mask2)), \ (cpu) < nr_cpu_ids;) #endif /* SMP */ #define CPU_BITS_NONE \ { \ [0 ... BITS_TO_LONGS(NR_CPUS)-1] = 0UL \ } #define CPU_BITS_CPU0 \ { \ [0] = 1UL \ } /** * cpumask_set_cpu - set a cpu in a cpumask * @cpu: cpu number (< nr_cpu_ids) * @dstp: the cpumask pointer */ static inline void cpumask_set_cpu(unsigned int cpu, struct cpumask *dstp) { set_bit(cpumask_check(cpu), cpumask_bits(dstp)); } static inline void __cpumask_set_cpu(unsigned int cpu, struct cpumask *dstp) { __set_bit(cpumask_check(cpu), cpumask_bits(dstp)); } /** * cpumask_clear_cpu - clear a cpu in a cpumask * @cpu: cpu number (< nr_cpu_ids) * @dstp: the cpumask pointer */ static inline void cpumask_clear_cpu(int cpu, struct cpumask *dstp) { clear_bit(cpumask_check(cpu), cpumask_bits(dstp)); } static inline void __cpumask_clear_cpu(int cpu, struct cpumask *dstp) { __clear_bit(cpumask_check(cpu), cpumask_bits(dstp)); } /** * cpumask_test_cpu - test for a cpu in a cpumask * @cpu: cpu number (< nr_cpu_ids) * @cpumask: the cpumask pointer * * Returns 1 if @cpu is set in @cpumask, else returns 0 */ static inline int cpumask_test_cpu(int cpu, const struct cpumask *cpumask) { return test_bit(cpumask_check(cpu), cpumask_bits((cpumask))); } /** * cpumask_test_and_set_cpu - atomically test and set a cpu in a cpumask * @cpu: cpu number (< nr_cpu_ids) * @cpumask: the cpumask pointer * * Returns 1 if @cpu is set in old bitmap of @cpumask, else returns 0 * * test_and_set_bit wrapper for cpumasks. */ static inline int cpumask_test_and_set_cpu(int cpu, struct cpumask *cpumask) { return test_and_set_bit(cpumask_check(cpu), cpumask_bits(cpumask)); } /** * cpumask_test_and_clear_cpu - atomically test and clear a cpu in a cpumask * @cpu: cpu number (< nr_cpu_ids) * @cpumask: the cpumask pointer * * Returns 1 if @cpu is set in old bitmap of @cpumask, else returns 0 * * test_and_clear_bit wrapper for cpumasks. */ static inline int cpumask_test_and_clear_cpu(int cpu, struct cpumask *cpumask) { return test_and_clear_bit(cpumask_check(cpu), cpumask_bits(cpumask)); } /** * cpumask_setall - set all cpus (< nr_cpu_ids) in a cpumask * @dstp: the cpumask pointer */ static inline void cpumask_setall(struct cpumask *dstp) { bitmap_fill(cpumask_bits(dstp), nr_cpumask_bits); } /** * cpumask_clear - clear all cpus (< nr_cpu_ids) in a cpumask * @dstp: the cpumask pointer */ static inline void cpumask_clear(struct cpumask *dstp) { bitmap_zero(cpumask_bits(dstp), nr_cpumask_bits); } /** * cpumask_and - *dstp = *src1p & *src2p * @dstp: the cpumask result * @src1p: the first input * @src2p: the second input * * If *@dstp is empty, returns 0, else returns 1 */ static inline int cpumask_and(struct cpumask *dstp, const struct cpumask *src1p, const struct cpumask *src2p) { return bitmap_and(cpumask_bits(dstp), cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_or - *dstp = *src1p | *src2p * @dstp: the cpumask result * @src1p: the first input * @src2p: the second input */ static inline void cpumask_or(struct cpumask *dstp, const struct cpumask *src1p, const struct cpumask *src2p) { bitmap_or(cpumask_bits(dstp), cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_xor - *dstp = *src1p ^ *src2p * @dstp: the cpumask result * @src1p: the first input * @src2p: the second input */ static inline void cpumask_xor(struct cpumask *dstp, const struct cpumask *src1p, const struct cpumask *src2p) { bitmap_xor(cpumask_bits(dstp), cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_andnot - *dstp = *src1p & ~*src2p * @dstp: the cpumask result * @src1p: the first input * @src2p: the second input * * If *@dstp is empty, returns 0, else returns 1 */ static inline int cpumask_andnot(struct cpumask *dstp, const struct cpumask *src1p, const struct cpumask *src2p) { return bitmap_andnot(cpumask_bits(dstp), cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_complement - *dstp = ~*srcp * @dstp: the cpumask result * @srcp: the input to invert */ static inline void cpumask_complement(struct cpumask *dstp, const struct cpumask *srcp) { bitmap_complement(cpumask_bits(dstp), cpumask_bits(srcp), nr_cpumask_bits); } /** * cpumask_equal - *src1p == *src2p * @src1p: the first input * @src2p: the second input */ static inline bool cpumask_equal(const struct cpumask *src1p, const struct cpumask *src2p) { return bitmap_equal(cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_or_equal - *src1p | *src2p == *src3p * @src1p: the first input * @src2p: the second input * @src3p: the third input */ static inline bool cpumask_or_equal(const struct cpumask *src1p, const struct cpumask *src2p, const struct cpumask *src3p) { return bitmap_or_equal(cpumask_bits(src1p), cpumask_bits(src2p), cpumask_bits(src3p), nr_cpumask_bits); } /** * cpumask_intersects - (*src1p & *src2p) != 0 * @src1p: the first input * @src2p: the second input */ static inline bool cpumask_intersects(const struct cpumask *src1p, const struct cpumask *src2p) { return bitmap_intersects(cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_subset - (*src1p & ~*src2p) == 0 * @src1p: the first input * @src2p: the second input * * Returns 1 if *@src1p is a subset of *@src2p, else returns 0 */ static inline int cpumask_subset(const struct cpumask *src1p, const struct cpumask *src2p) { return bitmap_subset(cpumask_bits(src1p), cpumask_bits(src2p), nr_cpumask_bits); } /** * cpumask_empty - *srcp == 0 * @srcp: the cpumask to that all cpus < nr_cpu_ids are clear. */ static inline bool cpumask_empty(const struct cpumask *srcp) { return bitmap_empty(cpumask_bits(srcp), nr_cpumask_bits); } /** * cpumask_full - *srcp == 0xFFFFFFFF... * @srcp: the cpumask to that all cpus < nr_cpu_ids are set. */ static inline bool cpumask_full(const struct cpumask *srcp) { return bitmap_full(cpumask_bits(srcp), nr_cpumask_bits); } /** * cpumask_weight - Count of bits in *srcp * @srcp: the cpumask to count bits (< nr_cpu_ids) in. */ static inline unsigned int cpumask_weight(const struct cpumask *srcp) { return bitmap_weight(cpumask_bits(srcp), nr_cpumask_bits); } /** * cpumask_shift_right - *dstp = *srcp >> n * @dstp: the cpumask result * @srcp: the input to shift * @n: the number of bits to shift by */ static inline void cpumask_shift_right(struct cpumask *dstp, const struct cpumask *srcp, int n) { bitmap_shift_right(cpumask_bits(dstp), cpumask_bits(srcp), n, nr_cpumask_bits); } /** * cpumask_shift_left - *dstp = *srcp << n * @dstp: the cpumask result * @srcp: the input to shift * @n: the number of bits to shift by */ static inline void cpumask_shift_left(struct cpumask *dstp, const struct cpumask *srcp, int n) { bitmap_shift_left(cpumask_bits(dstp), cpumask_bits(srcp), n, nr_cpumask_bits); } /** * cpumask_copy - *dstp = *srcp * @dstp: the result * @srcp: the input cpumask */ static inline void cpumask_copy(struct cpumask *dstp, const struct cpumask *srcp) { bitmap_copy(cpumask_bits(dstp), cpumask_bits(srcp), nr_cpumask_bits); } /** * cpumask_any - pick a "random" cpu from *srcp * @srcp: the input cpumask * * Returns >= nr_cpu_ids if no cpus set. */ #define cpumask_any(srcp) cpumask_first(srcp) /** * cpumask_first_and - return the first cpu from *srcp1 & *srcp2 * @src1p: the first input * @src2p: the second input * * Returns >= nr_cpu_ids if no cpus set in both. See also cpumask_next_and(). */ #define cpumask_first_and(src1p, src2p) cpumask_next_and(-1, (src1p), (src2p)) /** * cpumask_any_and - pick a "random" cpu from *mask1 & *mask2 * @mask1: the first input cpumask * @mask2: the second input cpumask * * Returns >= nr_cpu_ids if no cpus set. */ #define cpumask_any_and(mask1, mask2) cpumask_first_and((mask1), (mask2)) /** * cpumask_of - the cpumask containing just a given cpu * @cpu: the cpu (<= nr_cpu_ids) */ #define cpumask_of(cpu) (get_cpu_mask(cpu)) /** * cpumask_parse_user - extract a cpumask from a user string * @buf: the buffer to extract from * @len: the length of the buffer * @dstp: the cpumask to set. * * Returns -errno, or 0 for success. */ static inline int cpumask_parse_user(const char __user *buf, int len, struct cpumask *dstp) { return bitmap_parse_user(buf, len, cpumask_bits(dstp), nr_cpumask_bits); } /** * cpumask_parselist_user - extract a cpumask from a user string * @buf: the buffer to extract from * @len: the length of the buffer * @dstp: the cpumask to set. * * Returns -errno, or 0 for success. */ static inline int cpumask_parselist_user(const char __user *buf, int len, struct cpumask *dstp) { return bitmap_parselist_user(buf, len, cpumask_bits(dstp), nr_cpumask_bits); } /** * cpumask_parse - extract a cpumask from a string * @buf: the buffer to extract from * @dstp: the cpumask to set. * * Returns -errno, or 0 for success. */ static inline int cpumask_parse(const char *buf, struct cpumask *dstp) { return bitmap_parse(buf, UINT_MAX, cpumask_bits(dstp), nr_cpumask_bits); } /** * cpulist_parse - extract a cpumask from a user string of ranges * @buf: the buffer to extract from * @dstp: the cpumask to set. * * Returns -errno, or 0 for success. */ static inline int cpulist_parse(const char *buf, struct cpumask *dstp) { return bitmap_parselist(buf, cpumask_bits(dstp), nr_cpumask_bits); } /** * cpumask_size - size to allocate for a 'struct cpumask' in bytes */ static inline unsigned int cpumask_size(void) { return bitmap_size(nr_cpumask_bits); } /* * cpumask_var_t: struct cpumask for stack usage. * * Oh, the wicked games we play! In order to make kernel coding a * little more difficult, we typedef cpumask_var_t to an array or a * pointer: doing &mask on an array is a noop, so it still works. * * ie. * cpumask_var_t tmpmask; * if (!alloc_cpumask_var(&tmpmask, GFP_KERNEL)) * return -ENOMEM; * * ... use 'tmpmask' like a normal struct cpumask * ... * * free_cpumask_var(tmpmask); * * * However, one notable exception is there. alloc_cpumask_var() allocates * only nr_cpumask_bits bits (in the other hand, real cpumask_t always has * NR_CPUS bits). Therefore you don't have to dereference cpumask_var_t. * * cpumask_var_t tmpmask; * if (!alloc_cpumask_var(&tmpmask, GFP_KERNEL)) * return -ENOMEM; * * var = *tmpmask; * * This code makes NR_CPUS length memcopy and brings to a memory corruption. * cpumask_copy() provide safe copy functionality. * * Note that there is another evil here: If you define a cpumask_var_t * as a percpu variable then the way to obtain the address of the cpumask * structure differently influences what this_cpu_* operation needs to be * used. Please use this_cpu_cpumask_var_t in those cases. The direct use * of this_cpu_ptr() or this_cpu_read() will lead to failures when the * other type of cpumask_var_t implementation is configured. * * Please also note that __cpumask_var_read_mostly can be used to declare * a cpumask_var_t variable itself (not its content) as read mostly. */ #ifdef CONFIG_CPUMASK_OFFSTACK typedef struct cpumask *cpumask_var_t; #define this_cpu_cpumask_var_ptr(x) this_cpu_read(x) #define __cpumask_var_read_mostly __read_mostly bool alloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node); bool alloc_cpumask_var(cpumask_var_t *mask, gfp_t flags); bool zalloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node); bool zalloc_cpumask_var(cpumask_var_t *mask, gfp_t flags); void alloc_bootmem_cpumask_var(cpumask_var_t *mask); void free_cpumask_var(cpumask_var_t mask); void free_bootmem_cpumask_var(cpumask_var_t mask); static inline bool cpumask_available(cpumask_var_t mask) { return mask != NULL; } #else typedef struct cpumask cpumask_var_t[1]; #define this_cpu_cpumask_var_ptr(x) this_cpu_ptr(x) #define __cpumask_var_read_mostly static inline bool alloc_cpumask_var(cpumask_var_t *mask, gfp_t flags) { return true; } static inline bool alloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node) { return true; } static inline bool zalloc_cpumask_var(cpumask_var_t *mask, gfp_t flags) { cpumask_clear(*mask); return true; } static inline bool zalloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node) { cpumask_clear(*mask); return true; } static inline void alloc_bootmem_cpumask_var(cpumask_var_t *mask) { } static inline void free_cpumask_var(cpumask_var_t mask) { } static inline void free_bootmem_cpumask_var(cpumask_var_t mask) { } static inline bool cpumask_available(cpumask_var_t mask) { return true; } #endif /* CONFIG_CPUMASK_OFFSTACK */ /* It's common to want to use cpu_all_mask in struct member initializers, * so it has to refer to an address rather than a pointer. */ extern const DECLARE_BITMAP(cpu_all_bits, NR_CPUS); #define cpu_all_mask to_cpumask(cpu_all_bits) /* First bits of cpu_bit_bitmap are in fact unset. */ #define cpu_none_mask to_cpumask(cpu_bit_bitmap[0]) #define for_each_possible_cpu(cpu) for_each_cpu((cpu), cpu_possible_mask) #define for_each_online_cpu(cpu) for_each_cpu((cpu), cpu_online_mask) #define for_each_present_cpu(cpu) for_each_cpu((cpu), cpu_present_mask) /* Wrappers for arch boot code to manipulate normally-constant masks */ void init_cpu_present(const struct cpumask *src); void init_cpu_possible(const struct cpumask *src); void init_cpu_online(const struct cpumask *src); static inline void reset_cpu_possible_mask(void) { bitmap_zero(cpumask_bits(&__cpu_possible_mask), NR_CPUS); } static inline void set_cpu_possible(unsigned int cpu, bool possible) { if (possible) cpumask_set_cpu(cpu, &__cpu_possible_mask); else cpumask_clear_cpu(cpu, &__cpu_possible_mask); } static inline void set_cpu_present(unsigned int cpu, bool present) { if (present) cpumask_set_cpu(cpu, &__cpu_present_mask); else cpumask_clear_cpu(cpu, &__cpu_present_mask); } void set_cpu_online(unsigned int cpu, bool online); static inline void set_cpu_active(unsigned int cpu, bool active) { if (active) cpumask_set_cpu(cpu, &__cpu_active_mask); else cpumask_clear_cpu(cpu, &__cpu_active_mask); } static inline void set_cpu_dying(unsigned int cpu, bool dying) { if (dying) cpumask_set_cpu(cpu, &__cpu_dying_mask); else cpumask_clear_cpu(cpu, &__cpu_dying_mask); } /** * to_cpumask - convert an NR_CPUS bitmap to a struct cpumask * * @bitmap: the bitmap * * There are a few places where cpumask_var_t isn't appropriate and * static cpumasks must be used (eg. very early boot), yet we don't * expose the definition of 'struct cpumask'. * * This does the conversion, and can be used as a constant initializer. */ #define to_cpumask(bitmap) \ ((struct cpumask *)(1 ? (bitmap) \ : (void *)sizeof(__check_is_bitmap(bitmap)))) static inline int __check_is_bitmap(const unsigned long *bitmap) { return 1; } /* * Special-case data structure for "single bit set only" constant CPU masks. * * We pre-generate all the 64 (or 32) possible bit positions, with enough * padding to the left and the right, and return the constant pointer * appropriately offset. */ extern const unsigned long cpu_bit_bitmap[BITS_PER_LONG+1][BITS_TO_LONGS(NR_CPUS)]; static inline const struct cpumask *get_cpu_mask(unsigned int cpu) { const unsigned long *p = cpu_bit_bitmap[1 + cpu % BITS_PER_LONG]; p -= cpu / BITS_PER_LONG; return to_cpumask(p); } #if NR_CPUS > 1 /** * num_online_cpus() - Read the number of online CPUs * * Despite the fact that __num_online_cpus is of type atomic_t, this * interface gives only a momentary snapshot and is not protected against * concurrent CPU hotplug operations unless invoked from a cpuhp_lock held * region. */ static inline unsigned int num_online_cpus(void) { return atomic_read(&__num_online_cpus); } #define num_possible_cpus() cpumask_weight(cpu_possible_mask) #define num_present_cpus() cpumask_weight(cpu_present_mask) #define num_active_cpus() cpumask_weight(cpu_active_mask) static inline bool cpu_online(unsigned int cpu) { return cpumask_test_cpu(cpu, cpu_online_mask); } static inline bool cpu_possible(unsigned int cpu) { return cpumask_test_cpu(cpu, cpu_possible_mask); } static inline bool cpu_present(unsigned int cpu) { return cpumask_test_cpu(cpu, cpu_present_mask); } static inline bool cpu_active(unsigned int cpu) { return cpumask_test_cpu(cpu, cpu_active_mask); } static inline bool cpu_dying(unsigned int cpu) { return cpumask_test_cpu(cpu, cpu_dying_mask); } #else #define num_online_cpus() 1U #define num_possible_cpus() 1U #define num_present_cpus() 1U #define num_active_cpus() 1U static inline bool cpu_online(unsigned int cpu) { return cpu == 0; } static inline bool cpu_possible(unsigned int cpu) { return cpu == 0; } static inline bool cpu_present(unsigned int cpu) { return cpu == 0; } static inline bool cpu_active(unsigned int cpu) { return cpu == 0; } static inline bool cpu_dying(unsigned int cpu) { return false; } #endif /* NR_CPUS > 1 */ #define cpu_is_offline(cpu) unlikely(!cpu_online(cpu)) #if NR_CPUS <= BITS_PER_LONG #define CPU_BITS_ALL \ { \ [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \ } #else /* NR_CPUS > BITS_PER_LONG */ #define CPU_BITS_ALL \ { \ [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \ } #endif /* NR_CPUS > BITS_PER_LONG */ /** * cpumap_print_to_pagebuf - copies the cpumask into the buffer either * as comma-separated list of cpus or hex values of cpumask * @list: indicates whether the cpumap must be list * @mask: the cpumask to copy * @buf: the buffer to copy into * * Returns the length of the (null-terminated) @buf string, zero if * nothing is copied. */ static inline ssize_t cpumap_print_to_pagebuf(bool list, char *buf, const struct cpumask *mask) { return bitmap_print_to_pagebuf(list, buf, cpumask_bits(mask), nr_cpu_ids); } /** * cpumap_print_bitmask_to_buf - copies the cpumask into the buffer as * hex values of cpumask * * @buf: the buffer to copy into * @mask: the cpumask to copy * @off: in the string from which we are copying, we copy to @buf * @count: the maximum number of bytes to print * * The function prints the cpumask into the buffer as hex values of * cpumask; Typically used by bin_attribute to export cpumask bitmask * ABI. * * Returns the length of how many bytes have been copied, excluding * terminating '\0'. */ static inline ssize_t cpumap_print_bitmask_to_buf(char *buf, const struct cpumask *mask, loff_t off, size_t count) { return bitmap_print_bitmask_to_buf(buf, cpumask_bits(mask), nr_cpu_ids, off, count) - 1; } /** * cpumap_print_list_to_buf - copies the cpumask into the buffer as * comma-separated list of cpus * * Everything is same with the above cpumap_print_bitmask_to_buf() * except the print format. */ static inline ssize_t cpumap_print_list_to_buf(char *buf, const struct cpumask *mask, loff_t off, size_t count) { return bitmap_print_list_to_buf(buf, cpumask_bits(mask), nr_cpu_ids, off, count) - 1; } #if NR_CPUS <= BITS_PER_LONG #define CPU_MASK_ALL \ (cpumask_t) { { \ [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \ } } #else #define CPU_MASK_ALL \ (cpumask_t) { { \ [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ [BITS_TO_LONGS(NR_CPUS)-1] = BITMAP_LAST_WORD_MASK(NR_CPUS) \ } } #endif /* NR_CPUS > BITS_PER_LONG */ #define CPU_MASK_NONE \ (cpumask_t) { { \ [0 ... BITS_TO_LONGS(NR_CPUS)-1] = 0UL \ } } #define CPU_MASK_CPU0 \ (cpumask_t) { { \ [0] = 1UL \ } } /* * Provide a valid theoretical max size for cpumap and cpulist sysfs files * to avoid breaking userspace which may allocate a buffer based on the size * reported by e.g. fstat. * * for cpumap NR_CPUS * 9/32 - 1 should be an exact length. * * For cpulist 7 is (ceil(log10(NR_CPUS)) + 1) allowing for NR_CPUS to be up * to 2 orders of magnitude larger than 8192. And then we divide by 2 to * cover a worst-case of every other cpu being on one of two nodes for a * very large NR_CPUS. * * Use PAGE_SIZE as a minimum for smaller configurations while avoiding * unsigned comparison to -1. */ #define CPUMAP_FILE_MAX_BYTES (((NR_CPUS * 9)/32 > PAGE_SIZE) \ ? (NR_CPUS * 9)/32 - 1 : PAGE_SIZE) #define CPULIST_FILE_MAX_BYTES (((NR_CPUS * 7)/2 > PAGE_SIZE) ? (NR_CPUS * 7)/2 : PAGE_SIZE) #endif /* __LINUX_CPUMASK_H */ PK ! B��$ �$ dev_printk.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * dev_printk.h - printk messages helpers for devices * * Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org> * Copyright (c) 2004-2009 Greg Kroah-Hartman <gregkh@suse.de> * Copyright (c) 2008-2009 Novell Inc. * */ #ifndef _DEVICE_PRINTK_H_ #define _DEVICE_PRINTK_H_ #include <linux/compiler.h> #include <linux/types.h> #include <linux/ratelimit.h> #ifndef dev_fmt #define dev_fmt(fmt) fmt #endif struct device; #define PRINTK_INFO_SUBSYSTEM_LEN 16 #define PRINTK_INFO_DEVICE_LEN 48 struct dev_printk_info { char subsystem[PRINTK_INFO_SUBSYSTEM_LEN]; char device[PRINTK_INFO_DEVICE_LEN]; }; #ifdef CONFIG_PRINTK __printf(3, 0) __cold int dev_vprintk_emit(int level, const struct device *dev, const char *fmt, va_list args); __printf(3, 4) __cold int dev_printk_emit(int level, const struct device *dev, const char *fmt, ...); __printf(3, 4) __cold void _dev_printk(const char *level, const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_emerg(const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_alert(const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_crit(const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_err(const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_warn(const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_notice(const struct device *dev, const char *fmt, ...); __printf(2, 3) __cold void _dev_info(const struct device *dev, const char *fmt, ...); #else static inline __printf(3, 0) int dev_vprintk_emit(int level, const struct device *dev, const char *fmt, va_list args) { return 0; } static inline __printf(3, 4) int dev_printk_emit(int level, const struct device *dev, const char *fmt, ...) { return 0; } static inline void __dev_printk(const char *level, const struct device *dev, struct va_format *vaf) {} static inline __printf(3, 4) void _dev_printk(const char *level, const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_emerg(const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_crit(const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_alert(const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_err(const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_warn(const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_notice(const struct device *dev, const char *fmt, ...) {} static inline __printf(2, 3) void _dev_info(const struct device *dev, const char *fmt, ...) {} #endif /* * Need to take variadic arguments even though we don't use them, as dev_fmt() * may only just have been expanded and may result in multiple arguments. */ #define dev_printk_index_emit(level, fmt, ...) \ printk_index_subsys_emit("%s %s: ", level, fmt) #define dev_printk_index_wrap(_p_func, level, dev, fmt, ...) \ ({ \ dev_printk_index_emit(level, fmt); \ _p_func(dev, fmt, ##__VA_ARGS__); \ }) /* * Some callsites directly call dev_printk rather than going through the * dev_<level> infrastructure, so we need to emit here as well as inside those * level-specific macros. Only one index entry will be produced, either way, * since dev_printk's `fmt` isn't known at compile time if going through the * dev_<level> macros. * * dev_fmt() isn't called for dev_printk when used directly, as it's used by * the dev_<level> macros internally which already have dev_fmt() processed. * * We also can't use dev_printk_index_wrap directly, because we have a separate * level to process. */ #define dev_printk(level, dev, fmt, ...) \ ({ \ dev_printk_index_emit(level, fmt); \ _dev_printk(level, dev, fmt, ##__VA_ARGS__); \ }) /* * Dummy dev_printk for disabled debugging statements to use whilst maintaining * gcc's format checking. */ #define dev_no_printk(level, dev, fmt, ...) \ ({ \ if (0) \ _dev_printk(level, dev, fmt, ##__VA_ARGS__); \ }) /* * #defines for all the dev_<level> macros to prefix with whatever * possible use of #define dev_fmt(fmt) ... */ #define dev_emerg(dev, fmt, ...) \ dev_printk_index_wrap(_dev_emerg, KERN_EMERG, dev, dev_fmt(fmt), ##__VA_ARGS__) #define dev_crit(dev, fmt, ...) \ dev_printk_index_wrap(_dev_crit, KERN_CRIT, dev, dev_fmt(fmt), ##__VA_ARGS__) #define dev_alert(dev, fmt, ...) \ dev_printk_index_wrap(_dev_alert, KERN_ALERT, dev, dev_fmt(fmt), ##__VA_ARGS__) #define dev_err(dev, fmt, ...) \ dev_printk_index_wrap(_dev_err, KERN_ERR, dev, dev_fmt(fmt), ##__VA_ARGS__) #define dev_warn(dev, fmt, ...) \ dev_printk_index_wrap(_dev_warn, KERN_WARNING, dev, dev_fmt(fmt), ##__VA_ARGS__) #define dev_notice(dev, fmt, ...) \ dev_printk_index_wrap(_dev_notice, KERN_NOTICE, dev, dev_fmt(fmt), ##__VA_ARGS__) #define dev_info(dev, fmt, ...) \ dev_printk_index_wrap(_dev_info, KERN_INFO, dev, dev_fmt(fmt), ##__VA_ARGS__) #if defined(CONFIG_DYNAMIC_DEBUG) || \ (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE)) #define dev_dbg(dev, fmt, ...) \ dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__) #elif defined(DEBUG) #define dev_dbg(dev, fmt, ...) \ dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__) #else #define dev_dbg(dev, fmt, ...) \ dev_no_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__) #endif #ifdef CONFIG_PRINTK #define dev_level_once(dev_level, dev, fmt, ...) \ do { \ static bool __print_once __read_mostly; \ \ if (!__print_once) { \ __print_once = true; \ dev_level(dev, fmt, ##__VA_ARGS__); \ } \ } while (0) #else #define dev_level_once(dev_level, dev, fmt, ...) \ do { \ if (0) \ dev_level(dev, fmt, ##__VA_ARGS__); \ } while (0) #endif #define dev_emerg_once(dev, fmt, ...) \ dev_level_once(dev_emerg, dev, fmt, ##__VA_ARGS__) #define dev_alert_once(dev, fmt, ...) \ dev_level_once(dev_alert, dev, fmt, ##__VA_ARGS__) #define dev_crit_once(dev, fmt, ...) \ dev_level_once(dev_crit, dev, fmt, ##__VA_ARGS__) #define dev_err_once(dev, fmt, ...) \ dev_level_once(dev_err, dev, fmt, ##__VA_ARGS__) #define dev_warn_once(dev, fmt, ...) \ dev_level_once(dev_warn, dev, fmt, ##__VA_ARGS__) #define dev_notice_once(dev, fmt, ...) \ dev_level_once(dev_notice, dev, fmt, ##__VA_ARGS__) #define dev_info_once(dev, fmt, ...) \ dev_level_once(dev_info, dev, fmt, ##__VA_ARGS__) #define dev_dbg_once(dev, fmt, ...) \ dev_level_once(dev_dbg, dev, fmt, ##__VA_ARGS__) #define dev_level_ratelimited(dev_level, dev, fmt, ...) \ do { \ static DEFINE_RATELIMIT_STATE(_rs, \ DEFAULT_RATELIMIT_INTERVAL, \ DEFAULT_RATELIMIT_BURST); \ if (__ratelimit(&_rs)) \ dev_level(dev, fmt, ##__VA_ARGS__); \ } while (0) #define dev_emerg_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_emerg, dev, fmt, ##__VA_ARGS__) #define dev_alert_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_alert, dev, fmt, ##__VA_ARGS__) #define dev_crit_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_crit, dev, fmt, ##__VA_ARGS__) #define dev_err_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_err, dev, fmt, ##__VA_ARGS__) #define dev_warn_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_warn, dev, fmt, ##__VA_ARGS__) #define dev_notice_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_notice, dev, fmt, ##__VA_ARGS__) #define dev_info_ratelimited(dev, fmt, ...) \ dev_level_ratelimited(dev_info, dev, fmt, ##__VA_ARGS__) #if defined(CONFIG_DYNAMIC_DEBUG) || \ (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE)) /* descriptor check is first to prevent flooding with "callbacks suppressed" */ #define dev_dbg_ratelimited(dev, fmt, ...) \ do { \ static DEFINE_RATELIMIT_STATE(_rs, \ DEFAULT_RATELIMIT_INTERVAL, \ DEFAULT_RATELIMIT_BURST); \ DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt); \ if (DYNAMIC_DEBUG_BRANCH(descriptor) && \ __ratelimit(&_rs)) \ __dynamic_dev_dbg(&descriptor, dev, dev_fmt(fmt), \ ##__VA_ARGS__); \ } while (0) #elif defined(DEBUG) #define dev_dbg_ratelimited(dev, fmt, ...) \ do { \ static DEFINE_RATELIMIT_STATE(_rs, \ DEFAULT_RATELIMIT_INTERVAL, \ DEFAULT_RATELIMIT_BURST); \ if (__ratelimit(&_rs)) \ dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__); \ } while (0) #else #define dev_dbg_ratelimited(dev, fmt, ...) \ dev_no_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__) #endif #ifdef VERBOSE_DEBUG #define dev_vdbg dev_dbg #else #define dev_vdbg(dev, fmt, ...) \ dev_no_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__) #endif /* * dev_WARN*() acts like dev_printk(), but with the key difference of * using WARN/WARN_ONCE to include file/line information and a backtrace. */ #define dev_WARN(dev, format, arg...) \ WARN(1, "%s %s: " format, dev_driver_string(dev), dev_name(dev), ## arg) #define dev_WARN_ONCE(dev, condition, format, arg...) \ WARN_ONCE(condition, "%s %s: " format, \ dev_driver_string(dev), dev_name(dev), ## arg) #endif /* _DEVICE_PRINTK_H_ */ PK ! ؚ �� � ratelimit.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RATELIMIT_H #define _LINUX_RATELIMIT_H #include <linux/ratelimit_types.h> #include <linux/sched.h> #include <linux/spinlock.h> static inline void ratelimit_state_init(struct ratelimit_state *rs, int interval, int burst) { memset(rs, 0, sizeof(*rs)); raw_spin_lock_init(&rs->lock); rs->interval = interval; rs->burst = burst; } static inline void ratelimit_default_init(struct ratelimit_state *rs) { return ratelimit_state_init(rs, DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST); } static inline void ratelimit_state_exit(struct ratelimit_state *rs) { if (!(rs->flags & RATELIMIT_MSG_ON_RELEASE)) return; if (rs->missed) { pr_warn("%s: %d output lines suppressed due to ratelimiting\n", current->comm, rs->missed); rs->missed = 0; } } static inline void ratelimit_set_flags(struct ratelimit_state *rs, unsigned long flags) { rs->flags = flags; } extern struct ratelimit_state printk_ratelimit_state; #ifdef CONFIG_PRINTK #define WARN_ON_RATELIMIT(condition, state) ({ \ bool __rtn_cond = !!(condition); \ WARN_ON(__rtn_cond && __ratelimit(state)); \ __rtn_cond; \ }) #define WARN_RATELIMIT(condition, format, ...) \ ({ \ static DEFINE_RATELIMIT_STATE(_rs, \ DEFAULT_RATELIMIT_INTERVAL, \ DEFAULT_RATELIMIT_BURST); \ int rtn = !!(condition); \ \ if (unlikely(rtn && __ratelimit(&_rs))) \ WARN(rtn, format, ##__VA_ARGS__); \ \ rtn; \ }) #else #define WARN_ON_RATELIMIT(condition, state) \ WARN_ON(condition) #define WARN_RATELIMIT(condition, format, ...) \ ({ \ int rtn = WARN(condition, format, ##__VA_ARGS__); \ rtn; \ }) #endif #endif /* _LINUX_RATELIMIT_H */ PK ! $���/� /� mv643xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * mv643xx.h - MV-643XX Internal registers definition file. * * Copyright 2002 Momentum Computer, Inc. * Author: Matthew Dharm <mdharm@momenco.com> * Copyright 2002 GALILEO TECHNOLOGY, LTD. */ #ifndef __ASM_MV643XX_H #define __ASM_MV643XX_H #include <asm/types.h> #include <linux/mv643xx_eth.h> #include <linux/mv643xx_i2c.h> /****************************************/ /* Processor Address Space */ /****************************************/ /* DDR SDRAM BAR and size registers */ #define MV64340_CS_0_BASE_ADDR 0x008 #define MV64340_CS_0_SIZE 0x010 #define MV64340_CS_1_BASE_ADDR 0x208 #define MV64340_CS_1_SIZE 0x210 #define MV64340_CS_2_BASE_ADDR 0x018 #define MV64340_CS_2_SIZE 0x020 #define MV64340_CS_3_BASE_ADDR 0x218 #define MV64340_CS_3_SIZE 0x220 /* Devices BAR and size registers */ #define MV64340_DEV_CS0_BASE_ADDR 0x028 #define MV64340_DEV_CS0_SIZE 0x030 #define MV64340_DEV_CS1_BASE_ADDR 0x228 #define MV64340_DEV_CS1_SIZE 0x230 #define MV64340_DEV_CS2_BASE_ADDR 0x248 #define MV64340_DEV_CS2_SIZE 0x250 #define MV64340_DEV_CS3_BASE_ADDR 0x038 #define MV64340_DEV_CS3_SIZE 0x040 #define MV64340_BOOTCS_BASE_ADDR 0x238 #define MV64340_BOOTCS_SIZE 0x240 /* PCI 0 BAR and size registers */ #define MV64340_PCI_0_IO_BASE_ADDR 0x048 #define MV64340_PCI_0_IO_SIZE 0x050 #define MV64340_PCI_0_MEMORY0_BASE_ADDR 0x058 #define MV64340_PCI_0_MEMORY0_SIZE 0x060 #define MV64340_PCI_0_MEMORY1_BASE_ADDR 0x080 #define MV64340_PCI_0_MEMORY1_SIZE 0x088 #define MV64340_PCI_0_MEMORY2_BASE_ADDR 0x258 #define MV64340_PCI_0_MEMORY2_SIZE 0x260 #define MV64340_PCI_0_MEMORY3_BASE_ADDR 0x280 #define MV64340_PCI_0_MEMORY3_SIZE 0x288 /* PCI 1 BAR and size registers */ #define MV64340_PCI_1_IO_BASE_ADDR 0x090 #define MV64340_PCI_1_IO_SIZE 0x098 #define MV64340_PCI_1_MEMORY0_BASE_ADDR 0x0a0 #define MV64340_PCI_1_MEMORY0_SIZE 0x0a8 #define MV64340_PCI_1_MEMORY1_BASE_ADDR 0x0b0 #define MV64340_PCI_1_MEMORY1_SIZE 0x0b8 #define MV64340_PCI_1_MEMORY2_BASE_ADDR 0x2a0 #define MV64340_PCI_1_MEMORY2_SIZE 0x2a8 #define MV64340_PCI_1_MEMORY3_BASE_ADDR 0x2b0 #define MV64340_PCI_1_MEMORY3_SIZE 0x2b8 /* SRAM base address */ #define MV64340_INTEGRATED_SRAM_BASE_ADDR 0x268 /* internal registers space base address */ #define MV64340_INTERNAL_SPACE_BASE_ADDR 0x068 /* Enables the CS , DEV_CS , PCI 0 and PCI 1 windows above */ #define MV64340_BASE_ADDR_ENABLE 0x278 /****************************************/ /* PCI remap registers */ /****************************************/ /* PCI 0 */ #define MV64340_PCI_0_IO_ADDR_REMAP 0x0f0 #define MV64340_PCI_0_MEMORY0_LOW_ADDR_REMAP 0x0f8 #define MV64340_PCI_0_MEMORY0_HIGH_ADDR_REMAP 0x320 #define MV64340_PCI_0_MEMORY1_LOW_ADDR_REMAP 0x100 #define MV64340_PCI_0_MEMORY1_HIGH_ADDR_REMAP 0x328 #define MV64340_PCI_0_MEMORY2_LOW_ADDR_REMAP 0x2f8 #define MV64340_PCI_0_MEMORY2_HIGH_ADDR_REMAP 0x330 #define MV64340_PCI_0_MEMORY3_LOW_ADDR_REMAP 0x300 #define MV64340_PCI_0_MEMORY3_HIGH_ADDR_REMAP 0x338 /* PCI 1 */ #define MV64340_PCI_1_IO_ADDR_REMAP 0x108 #define MV64340_PCI_1_MEMORY0_LOW_ADDR_REMAP 0x110 #define MV64340_PCI_1_MEMORY0_HIGH_ADDR_REMAP 0x340 #define MV64340_PCI_1_MEMORY1_LOW_ADDR_REMAP 0x118 #define MV64340_PCI_1_MEMORY1_HIGH_ADDR_REMAP 0x348 #define MV64340_PCI_1_MEMORY2_LOW_ADDR_REMAP 0x310 #define MV64340_PCI_1_MEMORY2_HIGH_ADDR_REMAP 0x350 #define MV64340_PCI_1_MEMORY3_LOW_ADDR_REMAP 0x318 #define MV64340_PCI_1_MEMORY3_HIGH_ADDR_REMAP 0x358 #define MV64340_CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0 #define MV64340_CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8 #define MV64340_CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0 #define MV64340_CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8 #define MV64340_CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0 #define MV64340_CPU_GE_HEADERS_RETARGET_BASE 0x3d8 #define MV64340_CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e0 #define MV64340_CPU_IDMA_HEADERS_RETARGET_BASE 0x3e8 /****************************************/ /* CPU Control Registers */ /****************************************/ #define MV64340_CPU_CONFIG 0x000 #define MV64340_CPU_MODE 0x120 #define MV64340_CPU_MASTER_CONTROL 0x160 #define MV64340_CPU_CROSS_BAR_CONTROL_LOW 0x150 #define MV64340_CPU_CROSS_BAR_CONTROL_HIGH 0x158 #define MV64340_CPU_CROSS_BAR_TIMEOUT 0x168 /****************************************/ /* SMP RegisterS */ /****************************************/ #define MV64340_SMP_WHO_AM_I 0x200 #define MV64340_SMP_CPU0_DOORBELL 0x214 #define MV64340_SMP_CPU0_DOORBELL_CLEAR 0x21C #define MV64340_SMP_CPU1_DOORBELL 0x224 #define MV64340_SMP_CPU1_DOORBELL_CLEAR 0x22C #define MV64340_SMP_CPU0_DOORBELL_MASK 0x234 #define MV64340_SMP_CPU1_DOORBELL_MASK 0x23C #define MV64340_SMP_SEMAPHOR0 0x244 #define MV64340_SMP_SEMAPHOR1 0x24c #define MV64340_SMP_SEMAPHOR2 0x254 #define MV64340_SMP_SEMAPHOR3 0x25c #define MV64340_SMP_SEMAPHOR4 0x264 #define MV64340_SMP_SEMAPHOR5 0x26c #define MV64340_SMP_SEMAPHOR6 0x274 #define MV64340_SMP_SEMAPHOR7 0x27c /****************************************/ /* CPU Sync Barrier Register */ /****************************************/ #define MV64340_CPU_0_SYNC_BARRIER_TRIGGER 0x0c0 #define MV64340_CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8 #define MV64340_CPU_1_SYNC_BARRIER_TRIGGER 0x0d0 #define MV64340_CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8 /****************************************/ /* CPU Access Protect */ /****************************************/ #define MV64340_CPU_PROTECT_WINDOW_0_BASE_ADDR 0x180 #define MV64340_CPU_PROTECT_WINDOW_0_SIZE 0x188 #define MV64340_CPU_PROTECT_WINDOW_1_BASE_ADDR 0x190 #define MV64340_CPU_PROTECT_WINDOW_1_SIZE 0x198 #define MV64340_CPU_PROTECT_WINDOW_2_BASE_ADDR 0x1a0 #define MV64340_CPU_PROTECT_WINDOW_2_SIZE 0x1a8 #define MV64340_CPU_PROTECT_WINDOW_3_BASE_ADDR 0x1b0 #define MV64340_CPU_PROTECT_WINDOW_3_SIZE 0x1b8 /****************************************/ /* CPU Error Report */ /****************************************/ #define MV64340_CPU_ERROR_ADDR_LOW 0x070 #define MV64340_CPU_ERROR_ADDR_HIGH 0x078 #define MV64340_CPU_ERROR_DATA_LOW 0x128 #define MV64340_CPU_ERROR_DATA_HIGH 0x130 #define MV64340_CPU_ERROR_PARITY 0x138 #define MV64340_CPU_ERROR_CAUSE 0x140 #define MV64340_CPU_ERROR_MASK 0x148 /****************************************/ /* CPU Interface Debug Registers */ /****************************************/ #define MV64340_PUNIT_SLAVE_DEBUG_LOW 0x360 #define MV64340_PUNIT_SLAVE_DEBUG_HIGH 0x368 #define MV64340_PUNIT_MASTER_DEBUG_LOW 0x370 #define MV64340_PUNIT_MASTER_DEBUG_HIGH 0x378 #define MV64340_PUNIT_MMASK 0x3e4 /****************************************/ /* Integrated SRAM Registers */ /****************************************/ #define MV64340_SRAM_CONFIG 0x380 #define MV64340_SRAM_TEST_MODE 0X3F4 #define MV64340_SRAM_ERROR_CAUSE 0x388 #define MV64340_SRAM_ERROR_ADDR 0x390 #define MV64340_SRAM_ERROR_ADDR_HIGH 0X3F8 #define MV64340_SRAM_ERROR_DATA_LOW 0x398 #define MV64340_SRAM_ERROR_DATA_HIGH 0x3a0 #define MV64340_SRAM_ERROR_DATA_PARITY 0x3a8 /****************************************/ /* SDRAM Configuration */ /****************************************/ #define MV64340_SDRAM_CONFIG 0x1400 #define MV64340_D_UNIT_CONTROL_LOW 0x1404 #define MV64340_D_UNIT_CONTROL_HIGH 0x1424 #define MV64340_SDRAM_TIMING_CONTROL_LOW 0x1408 #define MV64340_SDRAM_TIMING_CONTROL_HIGH 0x140c #define MV64340_SDRAM_ADDR_CONTROL 0x1410 #define MV64340_SDRAM_OPEN_PAGES_CONTROL 0x1414 #define MV64340_SDRAM_OPERATION 0x1418 #define MV64340_SDRAM_MODE 0x141c #define MV64340_EXTENDED_DRAM_MODE 0x1420 #define MV64340_SDRAM_CROSS_BAR_CONTROL_LOW 0x1430 #define MV64340_SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434 #define MV64340_SDRAM_CROSS_BAR_TIMEOUT 0x1438 #define MV64340_SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0 #define MV64340_SDRAM_DATA_PADS_CALIBRATION 0x14c4 /****************************************/ /* SDRAM Error Report */ /****************************************/ #define MV64340_SDRAM_ERROR_DATA_LOW 0x1444 #define MV64340_SDRAM_ERROR_DATA_HIGH 0x1440 #define MV64340_SDRAM_ERROR_ADDR 0x1450 #define MV64340_SDRAM_RECEIVED_ECC 0x1448 #define MV64340_SDRAM_CALCULATED_ECC 0x144c #define MV64340_SDRAM_ECC_CONTROL 0x1454 #define MV64340_SDRAM_ECC_ERROR_COUNTER 0x1458 /******************************************/ /* Controlled Delay Line (CDL) Registers */ /******************************************/ #define MV64340_DFCDL_CONFIG0 0x1480 #define MV64340_DFCDL_CONFIG1 0x1484 #define MV64340_DLL_WRITE 0x1488 #define MV64340_DLL_READ 0x148c #define MV64340_SRAM_ADDR 0x1490 #define MV64340_SRAM_DATA0 0x1494 #define MV64340_SRAM_DATA1 0x1498 #define MV64340_SRAM_DATA2 0x149c #define MV64340_DFCL_PROBE 0x14a0 /******************************************/ /* Debug Registers */ /******************************************/ #define MV64340_DUNIT_DEBUG_LOW 0x1460 #define MV64340_DUNIT_DEBUG_HIGH 0x1464 #define MV64340_DUNIT_MMASK 0X1b40 /****************************************/ /* Device Parameters */ /****************************************/ #define MV64340_DEVICE_BANK0_PARAMETERS 0x45c #define MV64340_DEVICE_BANK1_PARAMETERS 0x460 #define MV64340_DEVICE_BANK2_PARAMETERS 0x464 #define MV64340_DEVICE_BANK3_PARAMETERS 0x468 #define MV64340_DEVICE_BOOT_BANK_PARAMETERS 0x46c #define MV64340_DEVICE_INTERFACE_CONTROL 0x4c0 #define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW 0x4c8 #define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH 0x4cc #define MV64340_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT 0x4c4 /****************************************/ /* Device interrupt registers */ /****************************************/ #define MV64340_DEVICE_INTERRUPT_CAUSE 0x4d0 #define MV64340_DEVICE_INTERRUPT_MASK 0x4d4 #define MV64340_DEVICE_ERROR_ADDR 0x4d8 #define MV64340_DEVICE_ERROR_DATA 0x4dc #define MV64340_DEVICE_ERROR_PARITY 0x4e0 /****************************************/ /* Device debug registers */ /****************************************/ #define MV64340_DEVICE_DEBUG_LOW 0x4e4 #define MV64340_DEVICE_DEBUG_HIGH 0x4e8 #define MV64340_RUNIT_MMASK 0x4f0 /****************************************/ /* PCI Slave Address Decoding registers */ /****************************************/ #define MV64340_PCI_0_CS_0_BANK_SIZE 0xc08 #define MV64340_PCI_1_CS_0_BANK_SIZE 0xc88 #define MV64340_PCI_0_CS_1_BANK_SIZE 0xd08 #define MV64340_PCI_1_CS_1_BANK_SIZE 0xd88 #define MV64340_PCI_0_CS_2_BANK_SIZE 0xc0c #define MV64340_PCI_1_CS_2_BANK_SIZE 0xc8c #define MV64340_PCI_0_CS_3_BANK_SIZE 0xd0c #define MV64340_PCI_1_CS_3_BANK_SIZE 0xd8c #define MV64340_PCI_0_DEVCS_0_BANK_SIZE 0xc10 #define MV64340_PCI_1_DEVCS_0_BANK_SIZE 0xc90 #define MV64340_PCI_0_DEVCS_1_BANK_SIZE 0xd10 #define MV64340_PCI_1_DEVCS_1_BANK_SIZE 0xd90 #define MV64340_PCI_0_DEVCS_2_BANK_SIZE 0xd18 #define MV64340_PCI_1_DEVCS_2_BANK_SIZE 0xd98 #define MV64340_PCI_0_DEVCS_3_BANK_SIZE 0xc14 #define MV64340_PCI_1_DEVCS_3_BANK_SIZE 0xc94 #define MV64340_PCI_0_DEVCS_BOOT_BANK_SIZE 0xd14 #define MV64340_PCI_1_DEVCS_BOOT_BANK_SIZE 0xd94 #define MV64340_PCI_0_P2P_MEM0_BAR_SIZE 0xd1c #define MV64340_PCI_1_P2P_MEM0_BAR_SIZE 0xd9c #define MV64340_PCI_0_P2P_MEM1_BAR_SIZE 0xd20 #define MV64340_PCI_1_P2P_MEM1_BAR_SIZE 0xda0 #define MV64340_PCI_0_P2P_I_O_BAR_SIZE 0xd24 #define MV64340_PCI_1_P2P_I_O_BAR_SIZE 0xda4 #define MV64340_PCI_0_CPU_BAR_SIZE 0xd28 #define MV64340_PCI_1_CPU_BAR_SIZE 0xda8 #define MV64340_PCI_0_INTERNAL_SRAM_BAR_SIZE 0xe00 #define MV64340_PCI_1_INTERNAL_SRAM_BAR_SIZE 0xe80 #define MV64340_PCI_0_EXPANSION_ROM_BAR_SIZE 0xd2c #define MV64340_PCI_1_EXPANSION_ROM_BAR_SIZE 0xd9c #define MV64340_PCI_0_BASE_ADDR_REG_ENABLE 0xc3c #define MV64340_PCI_1_BASE_ADDR_REG_ENABLE 0xcbc #define MV64340_PCI_0_CS_0_BASE_ADDR_REMAP 0xc48 #define MV64340_PCI_1_CS_0_BASE_ADDR_REMAP 0xcc8 #define MV64340_PCI_0_CS_1_BASE_ADDR_REMAP 0xd48 #define MV64340_PCI_1_CS_1_BASE_ADDR_REMAP 0xdc8 #define MV64340_PCI_0_CS_2_BASE_ADDR_REMAP 0xc4c #define MV64340_PCI_1_CS_2_BASE_ADDR_REMAP 0xccc #define MV64340_PCI_0_CS_3_BASE_ADDR_REMAP 0xd4c #define MV64340_PCI_1_CS_3_BASE_ADDR_REMAP 0xdcc #define MV64340_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP 0xF04 #define MV64340_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP 0xF84 #define MV64340_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP 0xF08 #define MV64340_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP 0xF88 #define MV64340_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP 0xF0C #define MV64340_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP 0xF8C #define MV64340_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP 0xF10 #define MV64340_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP 0xF90 #define MV64340_PCI_0_DEVCS_0_BASE_ADDR_REMAP 0xc50 #define MV64340_PCI_1_DEVCS_0_BASE_ADDR_REMAP 0xcd0 #define MV64340_PCI_0_DEVCS_1_BASE_ADDR_REMAP 0xd50 #define MV64340_PCI_1_DEVCS_1_BASE_ADDR_REMAP 0xdd0 #define MV64340_PCI_0_DEVCS_2_BASE_ADDR_REMAP 0xd58 #define MV64340_PCI_1_DEVCS_2_BASE_ADDR_REMAP 0xdd8 #define MV64340_PCI_0_DEVCS_3_BASE_ADDR_REMAP 0xc54 #define MV64340_PCI_1_DEVCS_3_BASE_ADDR_REMAP 0xcd4 #define MV64340_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xd54 #define MV64340_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xdd4 #define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xd5c #define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xddc #define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xd60 #define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xde0 #define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xd64 #define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xde4 #define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xd68 #define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xde8 #define MV64340_PCI_0_P2P_I_O_BASE_ADDR_REMAP 0xd6c #define MV64340_PCI_1_P2P_I_O_BASE_ADDR_REMAP 0xdec #define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_LOW 0xd70 #define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_LOW 0xdf0 #define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74 #define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4 #define MV64340_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf00 #define MV64340_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80 #define MV64340_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP 0xf38 #define MV64340_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP 0xfb8 #define MV64340_PCI_0_ADDR_DECODE_CONTROL 0xd3c #define MV64340_PCI_1_ADDR_DECODE_CONTROL 0xdbc #define MV64340_PCI_0_HEADERS_RETARGET_CONTROL 0xF40 #define MV64340_PCI_1_HEADERS_RETARGET_CONTROL 0xFc0 #define MV64340_PCI_0_HEADERS_RETARGET_BASE 0xF44 #define MV64340_PCI_1_HEADERS_RETARGET_BASE 0xFc4 #define MV64340_PCI_0_HEADERS_RETARGET_HIGH 0xF48 #define MV64340_PCI_1_HEADERS_RETARGET_HIGH 0xFc8 /***********************************/ /* PCI Control Register Map */ /***********************************/ #define MV64340_PCI_0_DLL_STATUS_AND_COMMAND 0x1d20 #define MV64340_PCI_1_DLL_STATUS_AND_COMMAND 0x1da0 #define MV64340_PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C #define MV64340_PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C #define MV64340_PCI_0_COMMAND 0xc00 #define MV64340_PCI_1_COMMAND 0xc80 #define MV64340_PCI_0_MODE 0xd00 #define MV64340_PCI_1_MODE 0xd80 #define MV64340_PCI_0_RETRY 0xc04 #define MV64340_PCI_1_RETRY 0xc84 #define MV64340_PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04 #define MV64340_PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84 #define MV64340_PCI_0_MSI_TRIGGER_TIMER 0xc38 #define MV64340_PCI_1_MSI_TRIGGER_TIMER 0xcb8 #define MV64340_PCI_0_ARBITER_CONTROL 0x1d00 #define MV64340_PCI_1_ARBITER_CONTROL 0x1d80 #define MV64340_PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08 #define MV64340_PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88 #define MV64340_PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c #define MV64340_PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c #define MV64340_PCI_0_CROSS_BAR_TIMEOUT 0x1d04 #define MV64340_PCI_1_CROSS_BAR_TIMEOUT 0x1d84 #define MV64340_PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18 #define MV64340_PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98 #define MV64340_PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10 #define MV64340_PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90 #define MV64340_PCI_0_P2P_CONFIG 0x1d14 #define MV64340_PCI_1_P2P_CONFIG 0x1d94 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04 #define MV64340_PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14 #define MV64340_PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24 #define MV64340_PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34 #define MV64340_PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44 #define MV64340_PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50 #define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54 #define MV64340_PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84 #define MV64340_PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94 #define MV64340_PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4 #define MV64340_PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4 #define MV64340_PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4 #define MV64340_PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0 #define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4 #define MV64340_PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8 /****************************************/ /* PCI Configuration Access Registers */ /****************************************/ #define MV64340_PCI_0_CONFIG_ADDR 0xcf8 #define MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc #define MV64340_PCI_1_CONFIG_ADDR 0xc78 #define MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c #define MV64340_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34 #define MV64340_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4 /****************************************/ /* PCI Error Report Registers */ /****************************************/ #define MV64340_PCI_0_SERR_MASK 0xc28 #define MV64340_PCI_1_SERR_MASK 0xca8 #define MV64340_PCI_0_ERROR_ADDR_LOW 0x1d40 #define MV64340_PCI_1_ERROR_ADDR_LOW 0x1dc0 #define MV64340_PCI_0_ERROR_ADDR_HIGH 0x1d44 #define MV64340_PCI_1_ERROR_ADDR_HIGH 0x1dc4 #define MV64340_PCI_0_ERROR_ATTRIBUTE 0x1d48 #define MV64340_PCI_1_ERROR_ATTRIBUTE 0x1dc8 #define MV64340_PCI_0_ERROR_COMMAND 0x1d50 #define MV64340_PCI_1_ERROR_COMMAND 0x1dd0 #define MV64340_PCI_0_ERROR_CAUSE 0x1d58 #define MV64340_PCI_1_ERROR_CAUSE 0x1dd8 #define MV64340_PCI_0_ERROR_MASK 0x1d5c #define MV64340_PCI_1_ERROR_MASK 0x1ddc /****************************************/ /* PCI Debug Registers */ /****************************************/ #define MV64340_PCI_0_MMASK 0X1D24 #define MV64340_PCI_1_MMASK 0X1DA4 /*********************************************/ /* PCI Configuration, Function 0, Registers */ /*********************************************/ #define MV64340_PCI_DEVICE_AND_VENDOR_ID 0x000 #define MV64340_PCI_STATUS_AND_COMMAND 0x004 #define MV64340_PCI_CLASS_CODE_AND_REVISION_ID 0x008 #define MV64340_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C #define MV64340_PCI_SCS_0_BASE_ADDR_LOW 0x010 #define MV64340_PCI_SCS_0_BASE_ADDR_HIGH 0x014 #define MV64340_PCI_SCS_1_BASE_ADDR_LOW 0x018 #define MV64340_PCI_SCS_1_BASE_ADDR_HIGH 0x01C #define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020 #define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024 #define MV64340_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c #define MV64340_PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030 #define MV64340_PCI_CAPABILTY_LIST_POINTER 0x034 #define MV64340_PCI_INTERRUPT_PIN_AND_LINE 0x03C /* capability list */ #define MV64340_PCI_POWER_MANAGEMENT_CAPABILITY 0x040 #define MV64340_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044 #define MV64340_PCI_VPD_ADDR 0x048 #define MV64340_PCI_VPD_DATA 0x04c #define MV64340_PCI_MSI_MESSAGE_CONTROL 0x050 #define MV64340_PCI_MSI_MESSAGE_ADDR 0x054 #define MV64340_PCI_MSI_MESSAGE_UPPER_ADDR 0x058 #define MV64340_PCI_MSI_MESSAGE_DATA 0x05c #define MV64340_PCI_X_COMMAND 0x060 #define MV64340_PCI_X_STATUS 0x064 #define MV64340_PCI_COMPACT_PCI_HOT_SWAP 0x068 /***********************************************/ /* PCI Configuration, Function 1, Registers */ /***********************************************/ #define MV64340_PCI_SCS_2_BASE_ADDR_LOW 0x110 #define MV64340_PCI_SCS_2_BASE_ADDR_HIGH 0x114 #define MV64340_PCI_SCS_3_BASE_ADDR_LOW 0x118 #define MV64340_PCI_SCS_3_BASE_ADDR_HIGH 0x11c #define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120 #define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124 /***********************************************/ /* PCI Configuration, Function 2, Registers */ /***********************************************/ #define MV64340_PCI_DEVCS_0_BASE_ADDR_LOW 0x210 #define MV64340_PCI_DEVCS_0_BASE_ADDR_HIGH 0x214 #define MV64340_PCI_DEVCS_1_BASE_ADDR_LOW 0x218 #define MV64340_PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c #define MV64340_PCI_DEVCS_2_BASE_ADDR_LOW 0x220 #define MV64340_PCI_DEVCS_2_BASE_ADDR_HIGH 0x224 /***********************************************/ /* PCI Configuration, Function 3, Registers */ /***********************************************/ #define MV64340_PCI_DEVCS_3_BASE_ADDR_LOW 0x310 #define MV64340_PCI_DEVCS_3_BASE_ADDR_HIGH 0x314 #define MV64340_PCI_BOOT_CS_BASE_ADDR_LOW 0x318 #define MV64340_PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c #define MV64340_PCI_CPU_BASE_ADDR_LOW 0x220 #define MV64340_PCI_CPU_BASE_ADDR_HIGH 0x224 /***********************************************/ /* PCI Configuration, Function 4, Registers */ /***********************************************/ #define MV64340_PCI_P2P_MEM0_BASE_ADDR_LOW 0x410 #define MV64340_PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414 #define MV64340_PCI_P2P_MEM1_BASE_ADDR_LOW 0x418 #define MV64340_PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c #define MV64340_PCI_P2P_I_O_BASE_ADDR 0x420 #define MV64340_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424 /****************************************/ /* Messaging Unit Registers (I20) */ /****************************************/ #define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010 #define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014 #define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018 #define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C #define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020 #define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024 #define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028 #define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C #define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030 #define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034 #define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040 #define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044 #define MV64340_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050 #define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054 #define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060 #define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064 #define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068 #define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C #define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070 #define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074 #define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8 #define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC #define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090 #define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094 #define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098 #define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C #define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0 #define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4 #define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8 #define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC #define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0 #define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4 #define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0 #define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4 #define MV64340_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0 #define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4 #define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0 #define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4 #define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8 #define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC #define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0 #define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4 #define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078 #define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C #define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10 #define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14 #define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18 #define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C #define MV64340_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20 #define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24 #define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28 #define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C #define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30 #define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34 #define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40 #define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44 #define MV64340_I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50 #define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54 #define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60 #define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64 #define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68 #define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C #define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70 #define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74 #define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8 #define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC #define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90 #define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94 #define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98 #define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C #define MV64340_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0 #define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4 #define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8 #define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC #define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0 #define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4 #define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0 #define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4 #define MV64340_I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0 #define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4 #define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0 #define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4 #define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8 #define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC #define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0 #define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4 #define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78 #define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C /****************************************/ /* Ethernet Unit Registers */ /****************************************/ /*******************************************/ /* CUNIT Registers */ /*******************************************/ /* Address Decoding Register Map */ #define MV64340_CUNIT_BASE_ADDR_REG0 0xf200 #define MV64340_CUNIT_BASE_ADDR_REG1 0xf208 #define MV64340_CUNIT_BASE_ADDR_REG2 0xf210 #define MV64340_CUNIT_BASE_ADDR_REG3 0xf218 #define MV64340_CUNIT_SIZE0 0xf204 #define MV64340_CUNIT_SIZE1 0xf20c #define MV64340_CUNIT_SIZE2 0xf214 #define MV64340_CUNIT_SIZE3 0xf21c #define MV64340_CUNIT_HIGH_ADDR_REMAP_REG0 0xf240 #define MV64340_CUNIT_HIGH_ADDR_REMAP_REG1 0xf244 #define MV64340_CUNIT_BASE_ADDR_ENABLE_REG 0xf250 #define MV64340_MPSC0_ACCESS_PROTECTION_REG 0xf254 #define MV64340_MPSC1_ACCESS_PROTECTION_REG 0xf258 #define MV64340_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C /* Error Report Registers */ #define MV64340_CUNIT_INTERRUPT_CAUSE_REG 0xf310 #define MV64340_CUNIT_INTERRUPT_MASK_REG 0xf314 #define MV64340_CUNIT_ERROR_ADDR 0xf318 /* Cunit Control Registers */ #define MV64340_CUNIT_ARBITER_CONTROL_REG 0xf300 #define MV64340_CUNIT_CONFIG_REG 0xb40c #define MV64340_CUNIT_CRROSBAR_TIMEOUT_REG 0xf304 /* Cunit Debug Registers */ #define MV64340_CUNIT_DEBUG_LOW 0xf340 #define MV64340_CUNIT_DEBUG_HIGH 0xf344 #define MV64340_CUNIT_MMASK 0xf380 /* MPSCs Clocks Routing Registers */ #define MV64340_MPSC_ROUTING_REG 0xb400 #define MV64340_MPSC_RX_CLOCK_ROUTING_REG 0xb404 #define MV64340_MPSC_TX_CLOCK_ROUTING_REG 0xb408 /* MPSCs Interrupts Registers */ #define MV64340_MPSC_CAUSE_REG(port) (0xb804 + (port<<3)) #define MV64340_MPSC_MASK_REG(port) (0xb884 + (port<<3)) #define MV64340_MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12)) #define MV64340_MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12)) #define MV64340_MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG1(port) (0x800c + (port<<12)) #define MV64340_MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG5(port) (0x801c + (port<<12)) #define MV64340_MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12)) #define MV64340_MPSC_CHANNEL_REG9(port) (0x802c + (port<<12)) #define MV64340_MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12)) /* MPSC0 Registers */ /***************************************/ /* SDMA Registers */ /***************************************/ #define MV64340_SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13)) #define MV64340_SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13)) #define MV64340_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13)) #define MV64340_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13)) #define MV64340_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13)) #define MV64340_SDMA_CAUSE_REG 0xb800 #define MV64340_SDMA_MASK_REG 0xb880 /* BRG Interrupts */ #define MV64340_BRG_CONFIG_REG(brg) (0xb200 + (brg<<3)) #define MV64340_BRG_BAUDE_TUNING_REG(brg) (0xb208 + (brg<<3)) #define MV64340_BRG_CAUSE_REG 0xb834 #define MV64340_BRG_MASK_REG 0xb8b4 /****************************************/ /* DMA Channel Control */ /****************************************/ #define MV64340_DMA_CHANNEL0_CONTROL 0x840 #define MV64340_DMA_CHANNEL0_CONTROL_HIGH 0x880 #define MV64340_DMA_CHANNEL1_CONTROL 0x844 #define MV64340_DMA_CHANNEL1_CONTROL_HIGH 0x884 #define MV64340_DMA_CHANNEL2_CONTROL 0x848 #define MV64340_DMA_CHANNEL2_CONTROL_HIGH 0x888 #define MV64340_DMA_CHANNEL3_CONTROL 0x84C #define MV64340_DMA_CHANNEL3_CONTROL_HIGH 0x88C /****************************************/ /* IDMA Registers */ /****************************************/ #define MV64340_DMA_CHANNEL0_BYTE_COUNT 0x800 #define MV64340_DMA_CHANNEL1_BYTE_COUNT 0x804 #define MV64340_DMA_CHANNEL2_BYTE_COUNT 0x808 #define MV64340_DMA_CHANNEL3_BYTE_COUNT 0x80C #define MV64340_DMA_CHANNEL0_SOURCE_ADDR 0x810 #define MV64340_DMA_CHANNEL1_SOURCE_ADDR 0x814 #define MV64340_DMA_CHANNEL2_SOURCE_ADDR 0x818 #define MV64340_DMA_CHANNEL3_SOURCE_ADDR 0x81c #define MV64340_DMA_CHANNEL0_DESTINATION_ADDR 0x820 #define MV64340_DMA_CHANNEL1_DESTINATION_ADDR 0x824 #define MV64340_DMA_CHANNEL2_DESTINATION_ADDR 0x828 #define MV64340_DMA_CHANNEL3_DESTINATION_ADDR 0x82C #define MV64340_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER 0x830 #define MV64340_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER 0x834 #define MV64340_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER 0x838 #define MV64340_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER 0x83C #define MV64340_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER 0x870 #define MV64340_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER 0x874 #define MV64340_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER 0x878 #define MV64340_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER 0x87C /* IDMA Address Decoding Base Address Registers */ #define MV64340_DMA_BASE_ADDR_REG0 0xa00 #define MV64340_DMA_BASE_ADDR_REG1 0xa08 #define MV64340_DMA_BASE_ADDR_REG2 0xa10 #define MV64340_DMA_BASE_ADDR_REG3 0xa18 #define MV64340_DMA_BASE_ADDR_REG4 0xa20 #define MV64340_DMA_BASE_ADDR_REG5 0xa28 #define MV64340_DMA_BASE_ADDR_REG6 0xa30 #define MV64340_DMA_BASE_ADDR_REG7 0xa38 /* IDMA Address Decoding Size Address Register */ #define MV64340_DMA_SIZE_REG0 0xa04 #define MV64340_DMA_SIZE_REG1 0xa0c #define MV64340_DMA_SIZE_REG2 0xa14 #define MV64340_DMA_SIZE_REG3 0xa1c #define MV64340_DMA_SIZE_REG4 0xa24 #define MV64340_DMA_SIZE_REG5 0xa2c #define MV64340_DMA_SIZE_REG6 0xa34 #define MV64340_DMA_SIZE_REG7 0xa3C /* IDMA Address Decoding High Address Remap and Access Protection Registers */ #define MV64340_DMA_HIGH_ADDR_REMAP_REG0 0xa60 #define MV64340_DMA_HIGH_ADDR_REMAP_REG1 0xa64 #define MV64340_DMA_HIGH_ADDR_REMAP_REG2 0xa68 #define MV64340_DMA_HIGH_ADDR_REMAP_REG3 0xa6C #define MV64340_DMA_BASE_ADDR_ENABLE_REG 0xa80 #define MV64340_DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70 #define MV64340_DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74 #define MV64340_DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78 #define MV64340_DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c #define MV64340_DMA_ARBITER_CONTROL 0x860 #define MV64340_DMA_CROSS_BAR_TIMEOUT 0x8d0 /* IDMA Headers Retarget Registers */ #define MV64340_DMA_HEADERS_RETARGET_CONTROL 0xa84 #define MV64340_DMA_HEADERS_RETARGET_BASE 0xa88 /* IDMA Interrupt Register */ #define MV64340_DMA_INTERRUPT_CAUSE_REG 0x8c0 #define MV64340_DMA_INTERRUPT_CAUSE_MASK 0x8c4 #define MV64340_DMA_ERROR_ADDR 0x8c8 #define MV64340_DMA_ERROR_SELECT 0x8cc /* IDMA Debug Register ( for internal use ) */ #define MV64340_DMA_DEBUG_LOW 0x8e0 #define MV64340_DMA_DEBUG_HIGH 0x8e4 #define MV64340_DMA_SPARE 0xA8C /****************************************/ /* Timer_Counter */ /****************************************/ #define MV64340_TIMER_COUNTER0 0x850 #define MV64340_TIMER_COUNTER1 0x854 #define MV64340_TIMER_COUNTER2 0x858 #define MV64340_TIMER_COUNTER3 0x85C #define MV64340_TIMER_COUNTER_0_3_CONTROL 0x864 #define MV64340_TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868 #define MV64340_TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c /****************************************/ /* Watchdog registers */ /****************************************/ #define MV64340_WATCHDOG_CONFIG_REG 0xb410 #define MV64340_WATCHDOG_VALUE_REG 0xb414 /****************************************/ /* I2C Registers */ /****************************************/ #define MV64XXX_I2C_OFFSET 0xc000 #define MV64XXX_I2C_REG_BLOCK_SIZE 0x0020 /****************************************/ /* GPP Interface Registers */ /****************************************/ #define MV64340_GPP_IO_CONTROL 0xf100 #define MV64340_GPP_LEVEL_CONTROL 0xf110 #define MV64340_GPP_VALUE 0xf104 #define MV64340_GPP_INTERRUPT_CAUSE 0xf108 #define MV64340_GPP_INTERRUPT_MASK0 0xf10c #define MV64340_GPP_INTERRUPT_MASK1 0xf114 #define MV64340_GPP_VALUE_SET 0xf118 #define MV64340_GPP_VALUE_CLEAR 0xf11c /****************************************/ /* Interrupt Controller Registers */ /****************************************/ /****************************************/ /* Interrupts */ /****************************************/ #define MV64340_MAIN_INTERRUPT_CAUSE_LOW 0x004 #define MV64340_MAIN_INTERRUPT_CAUSE_HIGH 0x00c #define MV64340_CPU_INTERRUPT0_MASK_LOW 0x014 #define MV64340_CPU_INTERRUPT0_MASK_HIGH 0x01c #define MV64340_CPU_INTERRUPT0_SELECT_CAUSE 0x024 #define MV64340_CPU_INTERRUPT1_MASK_LOW 0x034 #define MV64340_CPU_INTERRUPT1_MASK_HIGH 0x03c #define MV64340_CPU_INTERRUPT1_SELECT_CAUSE 0x044 #define MV64340_INTERRUPT0_MASK_0_LOW 0x054 #define MV64340_INTERRUPT0_MASK_0_HIGH 0x05c #define MV64340_INTERRUPT0_SELECT_CAUSE 0x064 #define MV64340_INTERRUPT1_MASK_0_LOW 0x074 #define MV64340_INTERRUPT1_MASK_0_HIGH 0x07c #define MV64340_INTERRUPT1_SELECT_CAUSE 0x084 /****************************************/ /* MPP Interface Registers */ /****************************************/ #define MV64340_MPP_CONTROL0 0xf000 #define MV64340_MPP_CONTROL1 0xf004 #define MV64340_MPP_CONTROL2 0xf008 #define MV64340_MPP_CONTROL3 0xf00c /****************************************/ /* Serial Initialization registers */ /****************************************/ #define MV64340_SERIAL_INIT_LAST_DATA 0xf324 #define MV64340_SERIAL_INIT_CONTROL 0xf328 #define MV64340_SERIAL_INIT_STATUS 0xf32c extern void mv64340_irq_init(unsigned int base); #endif /* __ASM_MV643XX_H */ PK ! �r ( ( minmax.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MINMAX_H #define _LINUX_MINMAX_H #include <linux/build_bug.h> #include <linux/compiler.h> #include <linux/const.h> #include <linux/types.h> /* * min()/max()/clamp() macros must accomplish several things: * * - Avoid multiple evaluations of the arguments (so side-effects like * "x++" happen only once) when non-constant. * - Perform signed v unsigned type-checking (to generate compile * errors instead of nasty runtime surprises). * - Unsigned char/short are always promoted to signed int and can be * compared against signed or unsigned arguments. * - Unsigned arguments can be compared against non-negative signed constants. * - Comparison of a signed argument against an unsigned constant fails * even if the constant is below __INT_MAX__ and could be cast to int. */ #define __typecheck(x, y) \ (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) /* * __sign_use for integer expressions: * bit #0 set if ok for unsigned comparisons * bit #1 set if ok for signed comparisons * * In particular, statically non-negative signed integer expressions * are ok for both. * * NOTE! Unsigned types smaller than 'int' are implicitly converted to 'int' * in expressions, and are accepted for signed conversions for now. * This is debatable. * * Note that 'x' is the original expression, and 'ux' is the unique variable * that contains the value. * * We use 'ux' for pure type checking, and 'x' for when we need to look at the * value (but without evaluating it for side effects! * Careful to only ever evaluate it with sizeof() or __builtin_constant_p() etc). * * Pointers end up being checked by the normal C type rules at the actual * comparison, and these expressions only need to be careful to not cause * warnings for pointer use. */ #define __sign_use(ux) (is_signed_type(typeof(ux)) ? \ (2 + __is_nonneg(ux)) : (1 + 2 * (sizeof(ux) < 4))) /* * Check whether a signed value is always non-negative. * * A cast is needed to avoid any warnings from values that aren't signed * integer types (in which case the result doesn't matter). * * On 64-bit any integer or pointer type can safely be cast to 'long long'. * But on 32-bit we need to avoid warnings about casting pointers to integers * of different sizes without truncating 64-bit values so 'long' or 'long long' * must be used depending on the size of the value. * * This does not work for 128-bit signed integers since the cast would truncate * them, but we do not use s128 types in the kernel (we do use 'u128', * but they are handled by the !is_signed_type() case). */ #if __SIZEOF_POINTER__ == __SIZEOF_LONG_LONG__ #define __is_nonneg(ux) statically_true((long long)(ux) >= 0) #else #define __is_nonneg(ux) statically_true( \ (typeof(__builtin_choose_expr(sizeof(ux) > 4, 1LL, 1L)))(ux) >= 0) #endif #define __types_ok(ux, uy) \ (__sign_use(ux) & __sign_use(uy)) #define __types_ok3(ux, uy, uz) \ (__sign_use(ux) & __sign_use(uy) & __sign_use(uz)) #define __cmp_op_min < #define __cmp_op_max > #define __cmp(op, x, y) ((x) __cmp_op_##op (y) ? (x) : (y)) #define __cmp_once_unique(op, type, x, y, ux, uy) \ ({ type ux = (x); type uy = (y); __cmp(op, ux, uy); }) #define __cmp_once(op, type, x, y) \ __cmp_once_unique(op, type, x, y, __UNIQUE_ID(x_), __UNIQUE_ID(y_)) #define __careful_cmp_once(op, x, y, ux, uy) ({ \ __auto_type ux = (x); __auto_type uy = (y); \ BUILD_BUG_ON_MSG(!__types_ok(ux, uy), \ #op"("#x", "#y") signedness error"); \ __cmp(op, ux, uy); }) #define __careful_cmp(op, x, y) \ __careful_cmp_once(op, x, y, __UNIQUE_ID(x_), __UNIQUE_ID(y_)) /** * min - return minimum of two values of the same or compatible types * @x: first value * @y: second value */ #define min(x, y) __careful_cmp(min, x, y) /** * max - return maximum of two values of the same or compatible types * @x: first value * @y: second value */ #define max(x, y) __careful_cmp(max, x, y) /** * umin - return minimum of two non-negative values * Signed types are zero extended to match a larger unsigned type. * @x: first value * @y: second value */ #define umin(x, y) \ __careful_cmp(min, (x) + 0u + 0ul + 0ull, (y) + 0u + 0ul + 0ull) /** * umax - return maximum of two non-negative values * @x: first value * @y: second value */ #define umax(x, y) \ __careful_cmp(max, (x) + 0u + 0ul + 0ull, (y) + 0u + 0ul + 0ull) #define __careful_op3(op, x, y, z, ux, uy, uz) ({ \ __auto_type ux = (x); __auto_type uy = (y);__auto_type uz = (z);\ BUILD_BUG_ON_MSG(!__types_ok3(ux, uy, uz), \ #op"3("#x", "#y", "#z") signedness error"); \ __cmp(op, ux, __cmp(op, uy, uz)); }) /** * min3 - return minimum of three values * @x: first value * @y: second value * @z: third value */ #define min3(x, y, z) \ __careful_op3(min, x, y, z, __UNIQUE_ID(x_), __UNIQUE_ID(y_), __UNIQUE_ID(z_)) /** * max3 - return maximum of three values * @x: first value * @y: second value * @z: third value */ #define max3(x, y, z) \ __careful_op3(max, x, y, z, __UNIQUE_ID(x_), __UNIQUE_ID(y_), __UNIQUE_ID(z_)) /** * min_t - return minimum of two values, using the specified type * @type: data type to use * @x: first value * @y: second value */ #define min_t(type, x, y) __cmp_once(min, type, x, y) /** * max_t - return maximum of two values, using the specified type * @type: data type to use * @x: first value * @y: second value */ #define max_t(type, x, y) __cmp_once(max, type, x, y) /** * min_not_zero - return the minimum that is _not_ zero, unless both are zero * @x: value1 * @y: value2 */ #define min_not_zero(x, y) ({ \ typeof(x) __x = (x); \ typeof(y) __y = (y); \ __x == 0 ? __y : ((__y == 0) ? __x : min(__x, __y)); }) #define __clamp(val, lo, hi) \ ((val) >= (hi) ? (hi) : ((val) <= (lo) ? (lo) : (val))) #define __clamp_once(type, val, lo, hi, uval, ulo, uhi) ({ \ type uval = (val); \ type ulo = (lo); \ type uhi = (hi); \ BUILD_BUG_ON_MSG(statically_true(ulo > uhi), \ "clamp() low limit " #lo " greater than high limit " #hi); \ BUILD_BUG_ON_MSG(!__types_ok3(uval, ulo, uhi), \ "clamp("#val", "#lo", "#hi") signedness error"); \ __clamp(uval, ulo, uhi); }) #define __careful_clamp(type, val, lo, hi) \ __clamp_once(type, val, lo, hi, __UNIQUE_ID(v_), __UNIQUE_ID(l_), __UNIQUE_ID(h_)) /** * clamp - return a value clamped to a given range with typechecking * @val: current value * @lo: lowest allowable value * @hi: highest allowable value * * This macro checks @val/@lo/@hi to make sure they have compatible * signedness. */ #define clamp(val, lo, hi) __careful_clamp(__auto_type, val, lo, hi) /** * clamp_t - return a value clamped to a given range using a given type * @type: the type of variable to use * @val: current value * @lo: minimum allowable value * @hi: maximum allowable value * * This macro does no typechecking and uses temporary variables of type * @type to make all the comparisons. */ #define clamp_t(type, val, lo, hi) __careful_clamp(type, val, lo, hi) /** * clamp_val - return a value clamped to a given range using val's type * @val: current value * @lo: minimum allowable value * @hi: maximum allowable value * * This macro does no typechecking and uses temporary variables of whatever * type the input argument @val is. This is useful when @val is an unsigned * type and @lo and @hi are literals that will otherwise be assigned a signed * integer type. */ #define clamp_val(val, lo, hi) __careful_clamp(typeof(val), val, lo, hi) /* * Do not check the array parameter using __must_be_array(). * In the following legit use-case where the "array" passed is a simple pointer, * __must_be_array() will return a failure. * --- 8< --- * int *buff * ... * min = min_array(buff, nb_items); * --- 8< --- * * The first typeof(&(array)[0]) is needed in order to support arrays of both * 'int *buff' and 'int buff[N]' types. * * The array can be an array of const items. * typeof() keeps the const qualifier. Use __unqual_scalar_typeof() in order * to discard the const qualifier for the __element variable. */ #define __minmax_array(op, array, len) ({ \ typeof(&(array)[0]) __array = (array); \ typeof(len) __len = (len); \ __unqual_scalar_typeof(__array[0]) __element = __array[--__len];\ while (__len--) \ __element = op(__element, __array[__len]); \ __element; }) /** * min_array - return minimum of values present in an array * @array: array * @len: array length * * Note that @len must not be zero (empty array). */ #define min_array(array, len) __minmax_array(min, array, len) /** * max_array - return maximum of values present in an array * @array: array * @len: array length * * Note that @len must not be zero (empty array). */ #define max_array(array, len) __minmax_array(max, array, len) static inline bool in_range64(u64 val, u64 start, u64 len) { return (val - start) < len; } static inline bool in_range32(u32 val, u32 start, u32 len) { return (val - start) < len; } /** * in_range - Determine if a value lies within a range. * @val: Value to test. * @start: First value in range. * @len: Number of values in range. * * This is more efficient than "if (start <= val && val < (start + len))". * It also gives a different answer if @start + @len overflows the size of * the type by a sufficient amount to encompass @val. Decide for yourself * which behaviour you want, or prove that start + len never overflow. * Do not blindly replace one form with the other. */ #define in_range(val, start, len) \ ((sizeof(start) | sizeof(len) | sizeof(val)) <= sizeof(u32) ? \ in_range32(val, start, len) : in_range64(val, start, len)) /** * swap - swap values of @a and @b * @a: first value * @b: second value */ #define swap(a, b) \ do { typeof(a) __tmp = (a); (a) = (b); (b) = __tmp; } while (0) /* * Use these carefully: no type checking, and uses the arguments * multiple times. Use for obvious constants only. */ #define MIN(a, b) __cmp(min, a, b) #define MAX(a, b) __cmp(max, a, b) #define MIN_T(type, a, b) __cmp(min, (type)(a), (type)(b)) #define MAX_T(type, a, b) __cmp(max, (type)(a), (type)(b)) #endif /* _LINUX_MINMAX_H */ PK ! ���� � tnum.hnu �[��� /* tnum: tracked (or tristate) numbers * * A tnum tracks knowledge about the bits of a value. Each bit can be either * known (0 or 1), or unknown (x). Arithmetic operations on tnums will * propagate the unknown bits such that the tnum result represents all the * possible results for possible values of the operands. */ #ifndef _LINUX_TNUM_H #define _LINUX_TNUM_H #include <linux/types.h> struct tnum { u64 value; u64 mask; }; /* Constructors */ /* Represent a known constant as a tnum. */ struct tnum tnum_const(u64 value); /* A completely unknown value */ extern const struct tnum tnum_unknown; /* A value that's unknown except that @min <= value <= @max */ struct tnum tnum_range(u64 min, u64 max); /* Arithmetic and logical ops */ /* Shift a tnum left (by a fixed shift) */ struct tnum tnum_lshift(struct tnum a, u8 shift); /* Shift (rsh) a tnum right (by a fixed shift) */ struct tnum tnum_rshift(struct tnum a, u8 shift); /* Shift (arsh) a tnum right (by a fixed min_shift) */ struct tnum tnum_arshift(struct tnum a, u8 min_shift, u8 insn_bitness); /* Add two tnums, return @a + @b */ struct tnum tnum_add(struct tnum a, struct tnum b); /* Subtract two tnums, return @a - @b */ struct tnum tnum_sub(struct tnum a, struct tnum b); /* Bitwise-AND, return @a & @b */ struct tnum tnum_and(struct tnum a, struct tnum b); /* Bitwise-OR, return @a | @b */ struct tnum tnum_or(struct tnum a, struct tnum b); /* Bitwise-XOR, return @a ^ @b */ struct tnum tnum_xor(struct tnum a, struct tnum b); /* Multiply two tnums, return @a * @b */ struct tnum tnum_mul(struct tnum a, struct tnum b); /* Return a tnum representing numbers satisfying both @a and @b */ struct tnum tnum_intersect(struct tnum a, struct tnum b); /* Return @a with all but the lowest @size bytes cleared */ struct tnum tnum_cast(struct tnum a, u8 size); /* Returns true if @a is a known constant */ static inline bool tnum_is_const(struct tnum a) { return !a.mask; } /* Returns true if @a == tnum_const(@b) */ static inline bool tnum_equals_const(struct tnum a, u64 b) { return tnum_is_const(a) && a.value == b; } /* Returns true if @a is completely unknown */ static inline bool tnum_is_unknown(struct tnum a) { return !~a.mask; } /* Returns true if @a is known to be a multiple of @size. * @size must be a power of two. */ bool tnum_is_aligned(struct tnum a, u64 size); /* Returns true if @b represents a subset of @a. */ bool tnum_in(struct tnum a, struct tnum b); /* Formatting functions. These have snprintf-like semantics: they will write * up to @size bytes (including the terminating NUL byte), and return the number * of bytes (excluding the terminating NUL) which would have been written had * sufficient space been available. (Thus tnum_sbin always returns 64.) */ /* Format a tnum as a pair of hex numbers (value; mask) */ int tnum_strn(char *str, size_t size, struct tnum a); /* Format a tnum as tristate binary expansion */ int tnum_sbin(char *str, size_t size, struct tnum a); /* Returns the 32-bit subreg */ struct tnum tnum_subreg(struct tnum a); /* Returns the tnum with the lower 32-bit subreg cleared */ struct tnum tnum_clear_subreg(struct tnum a); /* Returns the tnum with the lower 32-bit subreg set to value */ struct tnum tnum_const_subreg(struct tnum a, u32 value); /* Returns true if 32-bit subreg @a is a known constant*/ static inline bool tnum_subreg_is_const(struct tnum a) { return !(tnum_subreg(a)).mask; } #endif /* _LINUX_TNUM_H */ PK ! Յ�˴ � instrumentation.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_INSTRUMENTATION_H #define __LINUX_INSTRUMENTATION_H #if defined(CONFIG_DEBUG_ENTRY) && defined(CONFIG_STACK_VALIDATION) #include <linux/stringify.h> /* Begin/end of an instrumentation safe region */ #define __instrumentation_begin(c) ({ \ asm volatile(__stringify(c) ": nop\n\t" \ ".pushsection .discard.instr_begin\n\t" \ ".long " __stringify(c) "b - .\n\t" \ ".popsection\n\t" : : "i" (c)); \ }) #define instrumentation_begin() __instrumentation_begin(__COUNTER__) /* * Because instrumentation_{begin,end}() can nest, objtool validation considers * _begin() a +1 and _end() a -1 and computes a sum over the instructions. * When the value is greater than 0, we consider instrumentation allowed. * * There is a problem with code like: * * noinstr void foo() * { * instrumentation_begin(); * ... * if (cond) { * instrumentation_begin(); * ... * instrumentation_end(); * } * bar(); * instrumentation_end(); * } * * If instrumentation_end() would be an empty label, like all the other * annotations, the inner _end(), which is at the end of a conditional block, * would land on the instruction after the block. * * If we then consider the sum of the !cond path, we'll see that the call to * bar() is with a 0-value, even though, we meant it to happen with a positive * value. * * To avoid this, have _end() be a NOP instruction, this ensures it will be * part of the condition block and does not escape. */ #define __instrumentation_end(c) ({ \ asm volatile(__stringify(c) ": nop\n\t" \ ".pushsection .discard.instr_end\n\t" \ ".long " __stringify(c) "b - .\n\t" \ ".popsection\n\t" : : "i" (c)); \ }) #define instrumentation_end() __instrumentation_end(__COUNTER__) #else # define instrumentation_begin() do { } while(0) # define instrumentation_end() do { } while(0) #endif #endif /* __LINUX_INSTRUMENTATION_H */ PK ! �9��� � pxa168_eth.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* *pxa168 ethernet platform device data definition file. */ #ifndef __LINUX_PXA168_ETH_H #define __LINUX_PXA168_ETH_H #include <linux/phy.h> struct pxa168_eth_platform_data { int port_number; int phy_addr; /* * If speed is 0, then speed and duplex are autonegotiated. */ int speed; /* 0, SPEED_10, SPEED_100 */ int duplex; /* DUPLEX_HALF or DUPLEX_FULL */ phy_interface_t intf; /* * Override default RX/TX queue sizes if nonzero. */ int rx_queue_size; int tx_queue_size; /* * init callback is used for board specific initialization * e.g on Aspenite its used to initialize the PHY transceiver. */ int (*init)(void); }; #endif /* __LINUX_PXA168_ETH_H */ PK ! ת�W3 3 init_task.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX__INIT_TASK_H #define _LINUX__INIT_TASK_H #include <linux/rcupdate.h> #include <linux/irqflags.h> #include <linux/utsname.h> #include <linux/lockdep.h> #include <linux/ftrace.h> #include <linux/ipc.h> #include <linux/pid_namespace.h> #include <linux/user_namespace.h> #include <linux/securebits.h> #include <linux/seqlock.h> #include <linux/rbtree.h> #include <linux/refcount.h> #include <linux/sched/autogroup.h> #include <net/net_namespace.h> #include <linux/sched/rt.h> #include <linux/livepatch.h> #include <linux/mm_types.h> #include <asm/thread_info.h> extern struct files_struct init_files; extern struct fs_struct init_fs; extern struct nsproxy init_nsproxy; extern struct cred init_cred; #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE #define INIT_PREV_CPUTIME(x) .prev_cputime = { \ .lock = __RAW_SPIN_LOCK_UNLOCKED(x.prev_cputime.lock), \ }, #else #define INIT_PREV_CPUTIME(x) #endif #define INIT_TASK_COMM "swapper" /* Attach to the init_task data structure for proper alignment */ #ifdef CONFIG_ARCH_TASK_STRUCT_ON_STACK #define __init_task_data __section(".data..init_task") #else #define __init_task_data /**/ #endif /* Attach to the thread_info data structure for proper alignment */ #define __init_thread_info __section(".data..init_thread_info") #endif PK ! ��X�� � bpf_local_storage.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2019 Facebook * Copyright 2020 Google LLC. */ #ifndef _BPF_LOCAL_STORAGE_H #define _BPF_LOCAL_STORAGE_H #include <linux/bpf.h> #include <linux/rculist.h> #include <linux/list.h> #include <linux/hash.h> #include <linux/types.h> #include <uapi/linux/btf.h> #define BPF_LOCAL_STORAGE_CACHE_SIZE 16 struct bpf_local_storage_map_bucket { struct hlist_head list; raw_spinlock_t lock; }; /* Thp map is not the primary owner of a bpf_local_storage_elem. * Instead, the container object (eg. sk->sk_bpf_storage) is. * * The map (bpf_local_storage_map) is for two purposes * 1. Define the size of the "local storage". It is * the map's value_size. * * 2. Maintain a list to keep track of all elems such * that they can be cleaned up during the map destruction. * * When a bpf local storage is being looked up for a * particular object, the "bpf_map" pointer is actually used * as the "key" to search in the list of elem in * the respective bpf_local_storage owned by the object. * * e.g. sk->sk_bpf_storage is the mini-map with the "bpf_map" pointer * as the searching key. */ struct bpf_local_storage_map { struct bpf_map map; /* Lookup elem does not require accessing the map. * * Updating/Deleting requires a bucket lock to * link/unlink the elem from the map. Having * multiple buckets to improve contention. */ struct bpf_local_storage_map_bucket *buckets; u32 bucket_log; u16 elem_size; u16 cache_idx; }; struct bpf_local_storage_data { /* smap is used as the searching key when looking up * from the object's bpf_local_storage. * * Put it in the same cacheline as the data to minimize * the number of cachelines accessed during the cache hit case. */ struct bpf_local_storage_map __rcu *smap; u8 data[] __aligned(8); }; /* Linked to bpf_local_storage and bpf_local_storage_map */ struct bpf_local_storage_elem { struct hlist_node map_node; /* Linked to bpf_local_storage_map */ struct hlist_node snode; /* Linked to bpf_local_storage */ struct bpf_local_storage __rcu *local_storage; struct rcu_head rcu; /* 8 bytes hole */ /* The data is stored in another cacheline to minimize * the number of cachelines access during a cache hit. */ struct bpf_local_storage_data sdata ____cacheline_aligned; }; struct bpf_local_storage { struct bpf_local_storage_data __rcu *cache[BPF_LOCAL_STORAGE_CACHE_SIZE]; struct hlist_head list; /* List of bpf_local_storage_elem */ void *owner; /* The object that owns the above "list" of * bpf_local_storage_elem. */ struct rcu_head rcu; raw_spinlock_t lock; /* Protect adding/removing from the "list" */ }; /* U16_MAX is much more than enough for sk local storage * considering a tcp_sock is ~2k. */ #define BPF_LOCAL_STORAGE_MAX_VALUE_SIZE \ min_t(u32, \ (KMALLOC_MAX_SIZE - MAX_BPF_STACK - \ sizeof(struct bpf_local_storage_elem)), \ (U16_MAX - sizeof(struct bpf_local_storage_elem))) #define SELEM(_SDATA) \ container_of((_SDATA), struct bpf_local_storage_elem, sdata) #define SDATA(_SELEM) (&(_SELEM)->sdata) #define BPF_LOCAL_STORAGE_CACHE_SIZE 16 struct bpf_local_storage_cache { spinlock_t idx_lock; u64 idx_usage_counts[BPF_LOCAL_STORAGE_CACHE_SIZE]; }; #define DEFINE_BPF_STORAGE_CACHE(name) \ static struct bpf_local_storage_cache name = { \ .idx_lock = __SPIN_LOCK_UNLOCKED(name.idx_lock), \ } u16 bpf_local_storage_cache_idx_get(struct bpf_local_storage_cache *cache); void bpf_local_storage_cache_idx_free(struct bpf_local_storage_cache *cache, u16 idx); /* Helper functions for bpf_local_storage */ int bpf_local_storage_map_alloc_check(union bpf_attr *attr); struct bpf_local_storage_map *bpf_local_storage_map_alloc(union bpf_attr *attr); struct bpf_local_storage_data * bpf_local_storage_lookup(struct bpf_local_storage *local_storage, struct bpf_local_storage_map *smap, bool cacheit_lockit); void bpf_local_storage_map_free(struct bpf_local_storage_map *smap, int __percpu *busy_counter); int bpf_local_storage_map_check_btf(const struct bpf_map *map, const struct btf *btf, const struct btf_type *key_type, const struct btf_type *value_type); void bpf_selem_link_storage_nolock(struct bpf_local_storage *local_storage, struct bpf_local_storage_elem *selem); bool bpf_selem_unlink_storage_nolock(struct bpf_local_storage *local_storage, struct bpf_local_storage_elem *selem, bool uncharge_omem); void bpf_selem_unlink(struct bpf_local_storage_elem *selem); void bpf_selem_link_map(struct bpf_local_storage_map *smap, struct bpf_local_storage_elem *selem); void bpf_selem_unlink_map(struct bpf_local_storage_elem *selem); struct bpf_local_storage_elem * bpf_selem_alloc(struct bpf_local_storage_map *smap, void *owner, void *value, bool charge_mem); int bpf_local_storage_alloc(void *owner, struct bpf_local_storage_map *smap, struct bpf_local_storage_elem *first_selem); struct bpf_local_storage_data * bpf_local_storage_update(void *owner, struct bpf_local_storage_map *smap, void *value, u64 map_flags); #endif /* _BPF_LOCAL_STORAGE_H */ PK ! �a�L� � interconnect.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018-2019, Linaro Ltd. * Author: Georgi Djakov <georgi.djakov@linaro.org> */ #ifndef __LINUX_INTERCONNECT_H #define __LINUX_INTERCONNECT_H #include <linux/mutex.h> #include <linux/types.h> /* macros for converting to icc units */ #define Bps_to_icc(x) ((x) / 1000) #define kBps_to_icc(x) (x) #define MBps_to_icc(x) ((x) * 1000) #define GBps_to_icc(x) ((x) * 1000 * 1000) #define bps_to_icc(x) (1) #define kbps_to_icc(x) ((x) / 8 + ((x) % 8 ? 1 : 0)) #define Mbps_to_icc(x) ((x) * 1000 / 8) #define Gbps_to_icc(x) ((x) * 1000 * 1000 / 8) struct icc_path; struct device; /** * struct icc_bulk_data - Data used for bulk icc operations. * * @path: reference to the interconnect path (internal use) * @name: the name from the "interconnect-names" DT property * @avg_bw: average bandwidth in icc units * @peak_bw: peak bandwidth in icc units */ struct icc_bulk_data { struct icc_path *path; const char *name; u32 avg_bw; u32 peak_bw; }; int __must_check of_icc_bulk_get(struct device *dev, int num_paths, struct icc_bulk_data *paths); void icc_bulk_put(int num_paths, struct icc_bulk_data *paths); int icc_bulk_set_bw(int num_paths, const struct icc_bulk_data *paths); int icc_bulk_enable(int num_paths, const struct icc_bulk_data *paths); void icc_bulk_disable(int num_paths, const struct icc_bulk_data *paths); #if IS_ENABLED(CONFIG_INTERCONNECT) struct icc_path *icc_get(struct device *dev, const int src_id, const int dst_id); struct icc_path *of_icc_get(struct device *dev, const char *name); struct icc_path *devm_of_icc_get(struct device *dev, const char *name); struct icc_path *of_icc_get_by_index(struct device *dev, int idx); void icc_put(struct icc_path *path); int icc_enable(struct icc_path *path); int icc_disable(struct icc_path *path); int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw); void icc_set_tag(struct icc_path *path, u32 tag); const char *icc_get_name(struct icc_path *path); #else static inline struct icc_path *icc_get(struct device *dev, const int src_id, const int dst_id) { return NULL; } static inline struct icc_path *of_icc_get(struct device *dev, const char *name) { return NULL; } static inline struct icc_path *devm_of_icc_get(struct device *dev, const char *name) { return NULL; } static inline struct icc_path *of_icc_get_by_index(struct device *dev, int idx) { return NULL; } static inline void icc_put(struct icc_path *path) { } static inline int icc_enable(struct icc_path *path) { return 0; } static inline int icc_disable(struct icc_path *path) { return 0; } static inline int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw) { return 0; } static inline void icc_set_tag(struct icc_path *path, u32 tag) { } static inline const char *icc_get_name(struct icc_path *path) { return NULL; } #endif /* CONFIG_INTERCONNECT */ #endif /* __LINUX_INTERCONNECT_H */ PK ! dm" " threads.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_THREADS_H #define _LINUX_THREADS_H /* * The default limit for the nr of threads is now in * /proc/sys/kernel/threads-max. */ /* * Maximum supported processors. Setting this smaller saves quite a * bit of memory. Use nr_cpu_ids instead of this except for static bitmaps. */ #ifndef CONFIG_NR_CPUS /* FIXME: This should be fixed in the arch's Kconfig */ #define CONFIG_NR_CPUS 1 #endif /* Places which use this should consider cpumask_var_t. */ #define NR_CPUS CONFIG_NR_CPUS #define MIN_THREADS_LEFT_FOR_ROOT 4 /* * This controls the default maximum pid allocated to a process */ #define PID_MAX_DEFAULT (CONFIG_BASE_SMALL ? 0x1000 : 0x8000) /* * A maximum of 4 million PIDs should be enough for a while. * [NOTE: PID/TIDs are limited to 2^30 ~= 1 billion, see FUTEX_TID_MASK.] */ #define PID_MAX_LIMIT (CONFIG_BASE_SMALL ? PAGE_SIZE * 8 : \ (sizeof(long) > 4 ? 4 * 1024 * 1024 : PID_MAX_DEFAULT)) /* * Define a minimum number of pids per cpu. Heuristically based * on original pid max of 32k for 32 cpus. Also, increase the * minimum settable value for pid_max on the running system based * on similar defaults. See kernel/pid.c:pid_idr_init() for details. */ #define PIDS_PER_CPU_DEFAULT 1024 #define PIDS_PER_CPU_MIN 8 #endif PK ! ��_�� � sed-opal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright © 2016 Intel Corporation * * Authors: * Rafael Antognolli <rafael.antognolli@intel.com> * Scott Bauer <scott.bauer@intel.com> */ #ifndef LINUX_OPAL_H #define LINUX_OPAL_H #include <uapi/linux/sed-opal.h> #include <linux/kernel.h> struct opal_dev; typedef int (sec_send_recv)(void *data, u16 spsp, u8 secp, void *buffer, size_t len, bool send); #ifdef CONFIG_BLK_SED_OPAL void free_opal_dev(struct opal_dev *dev); bool opal_unlock_from_suspend(struct opal_dev *dev); struct opal_dev *init_opal_dev(void *data, sec_send_recv *send_recv); int sed_ioctl(struct opal_dev *dev, unsigned int cmd, void __user *ioctl_ptr); static inline bool is_sed_ioctl(unsigned int cmd) { switch (cmd) { case IOC_OPAL_SAVE: case IOC_OPAL_LOCK_UNLOCK: case IOC_OPAL_TAKE_OWNERSHIP: case IOC_OPAL_ACTIVATE_LSP: case IOC_OPAL_SET_PW: case IOC_OPAL_ACTIVATE_USR: case IOC_OPAL_REVERT_TPR: case IOC_OPAL_LR_SETUP: case IOC_OPAL_ADD_USR_TO_LR: case IOC_OPAL_ENABLE_DISABLE_MBR: case IOC_OPAL_ERASE_LR: case IOC_OPAL_SECURE_ERASE_LR: case IOC_OPAL_PSID_REVERT_TPR: case IOC_OPAL_MBR_DONE: case IOC_OPAL_WRITE_SHADOW_MBR: case IOC_OPAL_GENERIC_TABLE_RW: return true; } return false; } #else static inline void free_opal_dev(struct opal_dev *dev) { } static inline bool is_sed_ioctl(unsigned int cmd) { return false; } static inline int sed_ioctl(struct opal_dev *dev, unsigned int cmd, void __user *ioctl_ptr) { return 0; } static inline bool opal_unlock_from_suspend(struct opal_dev *dev) { return false; } #define init_opal_dev(data, send_recv) NULL #endif /* CONFIG_BLK_SED_OPAL */ #endif /* LINUX_OPAL_H */ PK ! q�b�x x ks8842.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ks8842.h KS8842 platform data struct definition * Copyright (c) 2010 Intel Corporation */ #ifndef _LINUX_KS8842_H #define _LINUX_KS8842_H #include <linux/if_ether.h> /** * struct ks8842_platform_data - Platform data of the KS8842 network driver * @macaddr: The MAC address of the device, set to all 0:s to use the on in * the chip. * @rx_dma_channel: The DMA channel to use for RX, -1 for none. * @tx_dma_channel: The DMA channel to use for TX, -1 for none. * */ struct ks8842_platform_data { u8 macaddr[ETH_ALEN]; int rx_dma_channel; int tx_dma_channel; }; #endif PK ! 3.h h prime_numbers.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PRIME_NUMBERS_H #define __LINUX_PRIME_NUMBERS_H #include <linux/types.h> bool is_prime_number(unsigned long x); unsigned long next_prime_number(unsigned long x); /** * for_each_prime_number - iterate over each prime upto a value * @prime: the current prime number in this iteration * @max: the upper limit * * Starting from the first prime number 2 iterate over each prime number up to * the @max value. On each iteration, @prime is set to the current prime number. * @max should be less than ULONG_MAX to ensure termination. To begin with * @prime set to 1 on the first iteration use for_each_prime_number_from() * instead. */ #define for_each_prime_number(prime, max) \ for_each_prime_number_from((prime), 2, (max)) /** * for_each_prime_number_from - iterate over each prime upto a value * @prime: the current prime number in this iteration * @from: the initial value * @max: the upper limit * * Starting from @from iterate over each successive prime number up to the * @max value. On each iteration, @prime is set to the current prime number. * @max should be less than ULONG_MAX, and @from less than @max, to ensure * termination. */ #define for_each_prime_number_from(prime, from, max) \ for (prime = (from); prime <= (max); prime = next_prime_number(prime)) #endif /* !__LINUX_PRIME_NUMBERS_H */ PK ! ��#k�j �j pci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * pci.h * * PCI defines and function prototypes * Copyright 1994, Drew Eckhardt * Copyright 1997--1999 Martin Mares <mj@ucw.cz> * * PCI Express ASPM defines and function prototypes * Copyright (c) 2007 Intel Corp. * Zhang Yanmin (yanmin.zhang@intel.com) * Shaohua Li (shaohua.li@intel.com) * * For more information, please consult the following manuals (look at * http://www.pcisig.com/ for how to get them): * * PCI BIOS Specification * PCI Local Bus Specification * PCI to PCI Bridge Specification * PCI Express Specification * PCI System Design Guide */ #ifndef LINUX_PCI_H #define LINUX_PCI_H #include <linux/mod_devicetable.h> #include <linux/types.h> #include <linux/init.h> #include <linux/ioport.h> #include <linux/list.h> #include <linux/compiler.h> #include <linux/errno.h> #include <linux/kobject.h> #include <linux/atomic.h> #include <linux/device.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/resource_ext.h> #include <uapi/linux/pci.h> #include <linux/pci_ids.h> #define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ PCI_STATUS_SIG_SYSTEM_ERROR | \ PCI_STATUS_REC_MASTER_ABORT | \ PCI_STATUS_REC_TARGET_ABORT | \ PCI_STATUS_SIG_TARGET_ABORT | \ PCI_STATUS_PARITY) /* Number of reset methods used in pci_reset_fn_methods array in pci.c */ #define PCI_NUM_RESET_METHODS 7 #define PCI_RESET_PROBE true #define PCI_RESET_DO_RESET false /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded * in a single byte as follows: * * 7:3 = slot * 2:0 = function * * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h. * In the interest of not exposing interfaces to user-space unnecessarily, * the following kernel-only defines are being added here. */ #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) /* pci_slot represents a physical slot */ struct pci_slot { struct pci_bus *bus; /* Bus this slot is on */ struct list_head list; /* Node in list of slots */ struct hotplug_slot *hotplug; /* Hotplug info (move here) */ unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ struct kobject kobj; }; static inline const char *pci_slot_name(const struct pci_slot *slot) { return kobject_name(&slot->kobj); } /* File state for mmap()s on /proc/bus/pci/X/Y */ enum pci_mmap_state { pci_mmap_io, pci_mmap_mem }; /* For PCI devices, the region numbers are assigned this way: */ enum { /* #0-5: standard PCI resources */ PCI_STD_RESOURCES, PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1, /* #6: expansion ROM resource */ PCI_ROM_RESOURCE, /* Device-specific resources */ #ifdef CONFIG_PCI_IOV PCI_IOV_RESOURCES, PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, #endif /* PCI-to-PCI (P2P) bridge windows */ #define PCI_BRIDGE_IO_WINDOW (PCI_BRIDGE_RESOURCES + 0) #define PCI_BRIDGE_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 1) #define PCI_BRIDGE_PREF_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 2) /* CardBus bridge windows */ #define PCI_CB_BRIDGE_IO_0_WINDOW (PCI_BRIDGE_RESOURCES + 0) #define PCI_CB_BRIDGE_IO_1_WINDOW (PCI_BRIDGE_RESOURCES + 1) #define PCI_CB_BRIDGE_MEM_0_WINDOW (PCI_BRIDGE_RESOURCES + 2) #define PCI_CB_BRIDGE_MEM_1_WINDOW (PCI_BRIDGE_RESOURCES + 3) /* Total number of bridge resources for P2P and CardBus */ #define PCI_BRIDGE_RESOURCE_NUM 4 /* Resources assigned to buses behind the bridge */ PCI_BRIDGE_RESOURCES, PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + PCI_BRIDGE_RESOURCE_NUM - 1, /* Total resources associated with a PCI device */ PCI_NUM_RESOURCES, /* Preserve this for compatibility */ DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES, }; /** * enum pci_interrupt_pin - PCI INTx interrupt values * @PCI_INTERRUPT_UNKNOWN: Unknown or unassigned interrupt * @PCI_INTERRUPT_INTA: PCI INTA pin * @PCI_INTERRUPT_INTB: PCI INTB pin * @PCI_INTERRUPT_INTC: PCI INTC pin * @PCI_INTERRUPT_INTD: PCI INTD pin * * Corresponds to values for legacy PCI INTx interrupts, as can be found in the * PCI_INTERRUPT_PIN register. */ enum pci_interrupt_pin { PCI_INTERRUPT_UNKNOWN, PCI_INTERRUPT_INTA, PCI_INTERRUPT_INTB, PCI_INTERRUPT_INTC, PCI_INTERRUPT_INTD, }; /* The number of legacy PCI INTx interrupts */ #define PCI_NUM_INTX 4 /* * Reading from a device that doesn't respond typically returns ~0. A * successful read from a device may also return ~0, so you need additional * information to reliably identify errors. */ #define PCI_ERROR_RESPONSE (~0ULL) #define PCI_SET_ERROR_RESPONSE(val) (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE)) #define PCI_POSSIBLE_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE)) /* * pci_power_t values must match the bits in the Capabilities PME_Support * and Control/Status PowerState fields in the Power Management capability. */ typedef int __bitwise pci_power_t; #define PCI_D0 ((pci_power_t __force) 0) #define PCI_D1 ((pci_power_t __force) 1) #define PCI_D2 ((pci_power_t __force) 2) #define PCI_D3hot ((pci_power_t __force) 3) #define PCI_D3cold ((pci_power_t __force) 4) #define PCI_UNKNOWN ((pci_power_t __force) 5) #define PCI_POWER_ERROR ((pci_power_t __force) -1) /* Remember to update this when the list above changes! */ extern const char *pci_power_names[]; static inline const char *pci_power_name(pci_power_t state) { return pci_power_names[1 + (__force int) state]; } /** * typedef pci_channel_state_t * * The pci_channel state describes connectivity between the CPU and * the PCI device. If some PCI bus between here and the PCI device * has crashed or locked up, this info is reflected here. */ typedef unsigned int __bitwise pci_channel_state_t; enum { /* I/O channel is in normal state */ pci_channel_io_normal = (__force pci_channel_state_t) 1, /* I/O to channel is blocked */ pci_channel_io_frozen = (__force pci_channel_state_t) 2, /* PCI card is dead */ pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, }; typedef unsigned int __bitwise pcie_reset_state_t; enum pcie_reset_state { /* Reset is NOT asserted (Use to deassert reset) */ pcie_deassert_reset = (__force pcie_reset_state_t) 1, /* Use #PERST to reset PCIe device */ pcie_warm_reset = (__force pcie_reset_state_t) 2, /* Use PCIe Hot Reset to reset device */ pcie_hot_reset = (__force pcie_reset_state_t) 3 }; typedef unsigned short __bitwise pci_dev_flags_t; enum pci_dev_flags { /* INTX_DISABLE in PCI_COMMAND register disables MSI too */ PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), /* Device configuration is irrevocably lost if disabled into D3 */ PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), /* Provide indication device is assigned by a Virtual Machine Manager */ PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2), /* Flag for quirk use to store if quirk-specific ACS is enabled */ PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3), /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), /* Do not use bus resets for device */ PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), /* Do not use PM reset even if device advertises NoSoftRst- */ PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), /* Get VPD from function 0 VPD */ PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), /* A non-root bridge where translation occurs, stop alias search here */ PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT = (__force pci_dev_flags_t) (1 << 9), /* Do not use FLR even if device advertises PCI_AF_CAP */ PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10), /* Don't use Relaxed Ordering for TLPs directed at this device */ PCI_DEV_FLAGS_NO_RELAXED_ORDERING = (__force pci_dev_flags_t) (1 << 11), /* Enable ASPM regardless of how LnkCtl is programmed */ PCI_DEV_FLAGS_ENABLE_ASPM = (__force pci_dev_flags_t) (1 << 12), /* Device does honor MSI masking despite saying otherwise */ PCI_DEV_FLAGS_HAS_MSI_MASKING = (__force pci_dev_flags_t) (1 << 13), }; enum pci_irq_reroute_variant { INTEL_IRQ_REROUTE_VARIANT = 1, MAX_IRQ_REROUTE_VARIANTS = 3 }; typedef unsigned short __bitwise pci_bus_flags_t; enum pci_bus_flags { PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, PCI_BUS_FLAGS_NO_AERSID = (__force pci_bus_flags_t) 4, PCI_BUS_FLAGS_NO_EXTCFG = (__force pci_bus_flags_t) 8, }; /* Values from Link Status register, PCIe r3.1, sec 7.8.8 */ enum pcie_link_width { PCIE_LNK_WIDTH_RESRV = 0x00, PCIE_LNK_X1 = 0x01, PCIE_LNK_X2 = 0x02, PCIE_LNK_X4 = 0x04, PCIE_LNK_X8 = 0x08, PCIE_LNK_X12 = 0x0c, PCIE_LNK_X16 = 0x10, PCIE_LNK_X32 = 0x20, PCIE_LNK_WIDTH_UNKNOWN = 0xff, }; /* See matching string table in pci_speed_string() */ enum pci_bus_speed { PCI_SPEED_33MHz = 0x00, PCI_SPEED_66MHz = 0x01, PCI_SPEED_66MHz_PCIX = 0x02, PCI_SPEED_100MHz_PCIX = 0x03, PCI_SPEED_133MHz_PCIX = 0x04, PCI_SPEED_66MHz_PCIX_ECC = 0x05, PCI_SPEED_100MHz_PCIX_ECC = 0x06, PCI_SPEED_133MHz_PCIX_ECC = 0x07, PCI_SPEED_66MHz_PCIX_266 = 0x09, PCI_SPEED_100MHz_PCIX_266 = 0x0a, PCI_SPEED_133MHz_PCIX_266 = 0x0b, AGP_UNKNOWN = 0x0c, AGP_1X = 0x0d, AGP_2X = 0x0e, AGP_4X = 0x0f, AGP_8X = 0x10, PCI_SPEED_66MHz_PCIX_533 = 0x11, PCI_SPEED_100MHz_PCIX_533 = 0x12, PCI_SPEED_133MHz_PCIX_533 = 0x13, PCIE_SPEED_2_5GT = 0x14, PCIE_SPEED_5_0GT = 0x15, PCIE_SPEED_8_0GT = 0x16, PCIE_SPEED_16_0GT = 0x17, PCIE_SPEED_32_0GT = 0x18, PCIE_SPEED_64_0GT = 0x19, PCI_SPEED_UNKNOWN = 0xff, }; enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev); enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev); struct pci_vpd { struct mutex lock; unsigned int len; u8 cap; }; struct irq_affinity; struct pcie_link_state; struct pci_sriov; struct pci_p2pdma; struct rcec_ea; /* struct pci_dev - describes a PCI device * * @is_hotplug_bridge: Hotplug bridge of any kind (e.g. PCIe Hot-Plug Capable, * Conventional PCI Hot-Plug, ACPI slot). * Such bridges are allocated additional MMIO and bus * number resources to allow for hierarchy expansion. * @is_pciehp: PCIe Hot-Plug Capable bridge. */ struct pci_dev { struct list_head bus_list; /* Node in per-bus list */ struct pci_bus *bus; /* Bus this device is on */ struct pci_bus *subordinate; /* Bus this device bridges to */ void *sysdata; /* Hook for sys-specific extension */ struct proc_dir_entry *procent; /* Device entry in /proc/bus/pci */ struct pci_slot *slot; /* Physical slot this device is in */ unsigned int devfn; /* Encoded device & function index */ unsigned short vendor; unsigned short device; unsigned short subsystem_vendor; unsigned short subsystem_device; unsigned int class; /* 3 bytes: (base,sub,prog-if) */ u8 revision; /* PCI revision, low byte of class word */ u8 hdr_type; /* PCI header type (`multi' flag masked out) */ #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ struct aer_stats *aer_stats; /* AER stats for this device */ #endif #ifdef CONFIG_PCIEPORTBUS struct rcec_ea *rcec_ea; /* RCEC cached endpoint association */ struct pci_dev *rcec; /* Associated RCEC device */ #endif u32 devcap; /* PCIe Device Capabilities */ u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ u8 msix_cap; /* MSI-X capability offset */ u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ u8 rom_base_reg; /* Config register controlling ROM */ u8 pin; /* Interrupt pin this device uses */ u16 pcie_flags_reg; /* Cached PCIe Capabilities Register */ unsigned long *dma_alias_mask;/* Mask of enabled devfn aliases */ struct pci_driver *driver; /* Driver bound to this device */ u64 dma_mask; /* Mask of the bits of bus address this device implements. Normally this is 0xffffffff. You only need to change this if your device has broken DMA or supports 64-bit transfers. */ struct device_dma_parameters dma_parms; pci_power_t current_state; /* Current operating state. In ACPI, this is D0-D3, D0 being fully functional, and D3 being off. */ unsigned int imm_ready:1; /* Supports Immediate Readiness */ u8 pm_cap; /* PM capability offset */ unsigned int pme_support:5; /* Bitmask of states from which PME# can be generated */ unsigned int pme_poll:1; /* Poll device's PME status bit */ unsigned int d1_support:1; /* Low power state D1 is supported */ unsigned int d2_support:1; /* Low power state D2 is supported */ unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ unsigned int no_d3cold:1; /* D3cold is forbidden */ unsigned int bridge_d3:1; /* Allow D3 for bridge */ unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ unsigned int mmio_always_on:1; /* Disallow turning off io/mem decoding during BAR sizing */ unsigned int wakeup_prepared:1; unsigned int runtime_d3cold:1; /* Whether go through runtime D3cold, not set for devices powered on/off by the corresponding bridge */ unsigned int skip_bus_pm:1; /* Internal: Skip bus-level PM */ unsigned int ignore_hotplug:1; /* Ignore hotplug events */ unsigned int hotplug_user_indicators:1; /* SlotCtl indicators controlled exclusively by user sysfs */ unsigned int clear_retrain_link:1; /* Need to clear Retrain Link bit manually */ unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */ unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ #ifdef CONFIG_PCIEASPM struct pcie_link_state *link_state; /* ASPM link state */ unsigned int ltr_path:1; /* Latency Tolerance Reporting supported from root to here */ u16 l1ss; /* L1SS Capability pointer */ #endif unsigned int pasid_no_tlp:1; /* PASID works without TLP Prefix */ unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */ pci_channel_state_t error_state; /* Current connectivity state */ struct device dev; /* Generic device interface */ int cfg_size; /* Size of config space */ /* * Instead of touching interrupt line and base address registers * directly, use the values stored here. They might be different! */ unsigned int irq; struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ bool match_driver; /* Skip attaching driver */ unsigned int transparent:1; /* Subtractive decode bridge */ unsigned int io_window:1; /* Bridge has I/O window */ unsigned int pref_window:1; /* Bridge has pref mem window */ unsigned int pref_64_window:1; /* Pref mem window is 64-bit */ unsigned int multifunction:1; /* Multi-function device */ unsigned int is_busmaster:1; /* Is busmaster */ unsigned int no_msi:1; /* May not use MSI */ unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ unsigned int block_cfg_access:1; /* Config space access blocked */ unsigned int broken_parity_status:1; /* Generates false positive parity */ unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */ unsigned int msi_enabled:1; unsigned int msix_enabled:1; unsigned int ari_enabled:1; /* ARI forwarding */ unsigned int ats_enabled:1; /* Address Translation Svc */ unsigned int pasid_enabled:1; /* Process Address Space ID */ unsigned int pri_enabled:1; /* Page Request Interface */ unsigned int is_managed:1; unsigned int needs_freset:1; /* Requires fundamental reset */ unsigned int state_saved:1; unsigned int is_physfn:1; unsigned int is_virtfn:1; unsigned int is_hotplug_bridge:1; unsigned int is_pciehp:1; unsigned int shpc_managed:1; /* SHPC owned by shpchp */ unsigned int is_thunderbolt:1; /* Thunderbolt controller */ /* * Devices marked being untrusted are the ones that can potentially * execute DMA attacks and similar. They are typically connected * through external ports such as Thunderbolt but not limited to * that. When an IOMMU is enabled they should be getting full * mappings to make sure they cannot access arbitrary memory. */ unsigned int untrusted:1; /* * Info from the platform, e.g., ACPI or device tree, may mark a * device as "external-facing". An external-facing device is * itself internal but devices downstream from it are external. */ unsigned int external_facing:1; unsigned int broken_intx_masking:1; /* INTx masking can't be used */ unsigned int io_window_1k:1; /* Intel bridge 1K I/O windows */ unsigned int irq_managed:1; unsigned int non_compliant_bars:1; /* Broken BARs; ignore them */ unsigned int is_probed:1; /* Device probing in progress */ unsigned int link_active_reporting:1;/* Device capable of reporting link active */ unsigned int no_vf_scan:1; /* Don't scan for VFs after IOV enablement */ unsigned int no_command_memory:1; /* No PCI_COMMAND_MEMORY */ unsigned int rom_bar_overlap:1; /* ROM BAR disable broken */ pci_dev_flags_t dev_flags; atomic_t enable_cnt; /* pci_enable_device has been called */ u32 saved_config_space[16]; /* Config space saved at suspend time */ struct hlist_head saved_cap_space; int rom_attr_enabled; /* Display of ROM attribute enabled? */ struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */ #ifdef CONFIG_HOTPLUG_PCI_PCIE unsigned int broken_cmd_compl:1; /* No compl for some cmds */ #endif #ifdef CONFIG_PCIE_PTM u16 ptm_cap; /* PTM Capability */ unsigned int ptm_root:1; unsigned int ptm_enabled:1; u8 ptm_granularity; #endif #ifdef CONFIG_PCI_MSI const struct attribute_group **msi_irq_groups; #endif struct pci_vpd vpd; #ifdef CONFIG_PCIE_DPC u16 dpc_cap; unsigned int dpc_rp_extensions:1; u8 dpc_rp_log_size; #endif #ifdef CONFIG_PCI_ATS union { struct pci_sriov *sriov; /* PF: SR-IOV info */ struct pci_dev *physfn; /* VF: related PF */ }; u16 ats_cap; /* ATS Capability offset */ u8 ats_stu; /* ATS Smallest Translation Unit */ #endif #ifdef CONFIG_PCI_PRI u16 pri_cap; /* PRI Capability offset */ u32 pri_reqs_alloc; /* Number of PRI requests allocated */ unsigned int pasid_required:1; /* PRG Response PASID Required */ #endif #ifdef CONFIG_PCI_PASID u16 pasid_cap; /* PASID Capability offset */ u16 pasid_features; #endif #ifdef CONFIG_PCI_P2PDMA struct pci_p2pdma __rcu *p2pdma; #endif u16 acs_cap; /* ACS Capability offset */ phys_addr_t rom; /* Physical address if not from BAR */ size_t romlen; /* Length if not from BAR */ char *driver_override; /* Driver name to force a match */ unsigned long priv_flags; /* Private flags for the PCI driver */ /* These methods index pci_reset_fn_methods[] */ u8 reset_methods[PCI_NUM_RESET_METHODS]; /* In priority order */ }; static inline struct pci_dev *pci_physfn(struct pci_dev *dev) { #ifdef CONFIG_PCI_IOV if (dev->is_virtfn) dev = dev->physfn; #endif return dev; } struct pci_dev *pci_alloc_dev(struct pci_bus *bus); #define to_pci_dev(n) container_of(n, struct pci_dev, dev) #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) static inline int pci_channel_offline(struct pci_dev *pdev) { return (pdev->error_state != pci_channel_io_normal); } /* * Currently in ACPI spec, for each PCI host bridge, PCI Segment * Group number is limited to a 16-bit value, therefore (int)-1 is * not a valid PCI domain number, and can be used as a sentinel * value indicating ->domain_nr is not set by the driver (and * CONFIG_PCI_DOMAINS_GENERIC=y archs will set it with * pci_bus_find_domain_nr()). */ #define PCI_DOMAIN_NR_NOT_SET (-1) struct pci_host_bridge { struct device dev; struct pci_bus *bus; /* Root bus */ struct pci_ops *ops; struct pci_ops *child_ops; void *sysdata; int busnr; int domain_nr; struct list_head windows; /* resource_entry */ struct list_head dma_ranges; /* dma ranges resource list */ u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */ int (*map_irq)(const struct pci_dev *, u8, u8); void (*release_fn)(struct pci_host_bridge *); void *release_data; unsigned int ignore_reset_delay:1; /* For entire hierarchy */ unsigned int no_ext_tags:1; /* No Extended Tags */ unsigned int no_inc_mrrs:1; /* No Increase MRRS */ unsigned int native_aer:1; /* OS may use PCIe AER */ unsigned int native_pcie_hotplug:1; /* OS may use PCIe hotplug */ unsigned int native_shpc_hotplug:1; /* OS may use SHPC hotplug */ unsigned int native_pme:1; /* OS may use PCIe PME */ unsigned int native_ltr:1; /* OS may use PCIe LTR */ unsigned int native_dpc:1; /* OS may use PCIe DPC */ unsigned int preserve_config:1; /* Preserve FW resource setup */ unsigned int size_windows:1; /* Enable root bus sizing */ unsigned int msi_domain:1; /* Bridge wants MSI domain */ /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev, const struct resource *res, resource_size_t start, resource_size_t size, resource_size_t align); unsigned long private[] ____cacheline_aligned; }; #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) static inline void *pci_host_bridge_priv(struct pci_host_bridge *bridge) { return (void *)bridge->private; } static inline struct pci_host_bridge *pci_host_bridge_from_priv(void *priv) { return container_of(priv, struct pci_host_bridge, private); } struct pci_host_bridge *pci_alloc_host_bridge(size_t priv); struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev, size_t priv); void pci_free_host_bridge(struct pci_host_bridge *bridge); struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); void pci_set_host_bridge_release(struct pci_host_bridge *bridge, void (*release_fn)(struct pci_host_bridge *), void *release_data); int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); /* * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond * to P2P or CardBus bridge windows) go in a table. Additional ones (for * buses below host bridges or subtractive decode bridges) go in the list. * Use pci_bus_for_each_resource() to iterate through all the resources. */ /* * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly * and there's no way to program the bridge with the details of the window. * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- * decode bit set, because they are explicit and can be programmed with _SRS. */ #define PCI_SUBTRACTIVE_DECODE 0x1 struct pci_bus_resource { struct list_head list; struct resource *res; unsigned int flags; }; #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ struct pci_bus { struct list_head node; /* Node in list of buses */ struct pci_bus *parent; /* Parent bus this bridge is on */ struct list_head children; /* List of child buses */ struct list_head devices; /* List of devices on this bus */ struct pci_dev *self; /* Bridge device as seen by parent */ struct list_head slots; /* List of slots on this bus; protected by pci_slot_mutex */ struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; struct list_head resources; /* Address space routed to this bus */ struct resource busn_res; /* Bus numbers routed to this bus */ struct pci_ops *ops; /* Configuration access functions */ void *sysdata; /* Hook for sys-specific extension */ struct proc_dir_entry *procdir; /* Directory entry in /proc/bus/pci */ unsigned char number; /* Bus number */ unsigned char primary; /* Number of primary bridge */ unsigned char max_bus_speed; /* enum pci_bus_speed */ unsigned char cur_bus_speed; /* enum pci_bus_speed */ #ifdef CONFIG_PCI_DOMAINS_GENERIC int domain_nr; #endif char name[48]; unsigned short bridge_ctl; /* Manage NO_ISA/FBB/et al behaviors */ pci_bus_flags_t bus_flags; /* Inherited by child buses */ struct device *bridge; struct device dev; struct bin_attribute *legacy_io; /* Legacy I/O for this bus */ struct bin_attribute *legacy_mem; /* Legacy mem */ unsigned int is_added:1; unsigned int unsafe_warn:1; /* warned about RW1C config write */ }; #define to_pci_bus(n) container_of(n, struct pci_bus, dev) static inline u16 pci_dev_id(struct pci_dev *dev) { return PCI_DEVID(dev->bus->number, dev->devfn); } /* * Returns true if the PCI bus is root (behind host-PCI bridge), * false otherwise * * Some code assumes that "bus->self == NULL" means that bus is a root bus. * This is incorrect because "virtual" buses added for SR-IOV (via * virtfn_add_bus()) have "bus->self == NULL" but are not root buses. */ static inline bool pci_is_root_bus(struct pci_bus *pbus) { return !(pbus->parent); } /** * pci_is_bridge - check if the PCI device is a bridge * @dev: PCI device * * Return true if the PCI device is bridge whether it has subordinate * or not. */ static inline bool pci_is_bridge(struct pci_dev *dev) { return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; } #define for_each_pci_bridge(dev, bus) \ list_for_each_entry(dev, &bus->devices, bus_list) \ if (!pci_is_bridge(dev)) {} else static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) { dev = pci_physfn(dev); if (pci_is_root_bus(dev->bus)) return NULL; return dev->bus->self; } #ifdef CONFIG_PCI_MSI static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return pci_dev->msi_enabled || pci_dev->msix_enabled; } #else static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } #endif /* Error values that may be returned by PCI functions */ #define PCIBIOS_SUCCESSFUL 0x00 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 #define PCIBIOS_BAD_VENDOR_ID 0x83 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 #define PCIBIOS_SET_FAILED 0x88 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 /* Translate above to generic errno for passing back through non-PCI code */ static inline int pcibios_err_to_errno(int err) { if (err <= PCIBIOS_SUCCESSFUL) return err; /* Assume already errno */ switch (err) { case PCIBIOS_FUNC_NOT_SUPPORTED: return -ENOENT; case PCIBIOS_BAD_VENDOR_ID: return -ENOTTY; case PCIBIOS_DEVICE_NOT_FOUND: return -ENODEV; case PCIBIOS_BAD_REGISTER_NUMBER: return -EFAULT; case PCIBIOS_SET_FAILED: return -EIO; case PCIBIOS_BUFFER_TOO_SMALL: return -ENOSPC; } return -ERANGE; } /* Low-level architecture-dependent routines */ struct pci_ops { int (*add_bus)(struct pci_bus *bus); void (*remove_bus)(struct pci_bus *bus); void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); }; /* * ACPI needs to be able to access PCI config space before we've done a * PCI bus scan and created pci_bus structures. */ int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 *val); int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 val); #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT typedef u64 pci_bus_addr_t; #else typedef u32 pci_bus_addr_t; #endif struct pci_bus_region { pci_bus_addr_t start; pci_bus_addr_t end; }; struct pci_dynids { spinlock_t lock; /* Protects list, index */ struct list_head list; /* For IDs added at runtime */ }; /* * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides * a set of callbacks in struct pci_error_handlers, that device driver * will be notified of PCI bus errors, and will be driven to recovery * when an error occurs. */ typedef unsigned int __bitwise pci_ers_result_t; enum pci_ers_result { /* No result/none/not supported in device driver */ PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, /* Device driver can recover without slot reset */ PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, /* Device driver wants slot to be reset */ PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, /* Device has completely failed, is unrecoverable */ PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, /* Device driver is fully recovered and operational */ PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, /* No AER capabilities registered for the driver */ PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6, }; /* PCI bus error event callbacks */ struct pci_error_handlers { /* PCI bus error detected on this device */ pci_ers_result_t (*error_detected)(struct pci_dev *dev, pci_channel_state_t error); /* MMIO has been re-enabled, but not DMA */ pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); /* PCI slot has been reset */ pci_ers_result_t (*slot_reset)(struct pci_dev *dev); /* PCI function reset prepare or completed */ void (*reset_prepare)(struct pci_dev *dev); void (*reset_done)(struct pci_dev *dev); /* Device driver may resume normal operations */ void (*resume)(struct pci_dev *dev); }; struct module; /** * struct pci_driver - PCI driver structure * @node: List of driver structures. * @name: Driver name. * @id_table: Pointer to table of device IDs the driver is * interested in. Most drivers should export this * table using MODULE_DEVICE_TABLE(pci,...). * @probe: This probing function gets called (during execution * of pci_register_driver() for already existing * devices or later if a new device gets inserted) for * all PCI devices which match the ID table and are not * "owned" by the other drivers yet. This function gets * passed a "struct pci_dev \*" for each device whose * entry in the ID table matches the device. The probe * function returns zero when the driver chooses to * take "ownership" of the device or an error code * (negative number) otherwise. * The probe function always gets called from process * context, so it can sleep. * @remove: The remove() function gets called whenever a device * being handled by this driver is removed (either during * deregistration of the driver or when it's manually * pulled out of a hot-pluggable slot). * The remove function always gets called from process * context, so it can sleep. * @suspend: Put device into low power state. * @resume: Wake device from low power state. * (Please see Documentation/power/pci.rst for descriptions * of PCI Power Management and the related functions.) * @shutdown: Hook into reboot_notifier_list (kernel/sys.c). * Intended to stop any idling DMA operations. * Useful for enabling wake-on-lan (NIC) or changing * the power state of a device before reboot. * e.g. drivers/net/e100.c. * @sriov_configure: Optional driver callback to allow configuration of * number of VFs to enable via sysfs "sriov_numvfs" file. * @sriov_set_msix_vec_count: PF Driver callback to change number of MSI-X * vectors on a VF. Triggered via sysfs "sriov_vf_msix_count". * This will change MSI-X Table Size in the VF Message Control * registers. * @sriov_get_vf_total_msix: PF driver callback to get the total number of * MSI-X vectors available for distribution to the VFs. * @err_handler: See Documentation/PCI/pci-error-recovery.rst * @groups: Sysfs attribute groups. * @dev_groups: Attributes attached to the device that will be * created once it is bound to the driver. * @driver: Driver model structure. * @dynids: List of dynamically added device IDs. */ struct pci_driver { struct list_head node; const char *name; const struct pci_device_id *id_table; /* Must be non-NULL for probe to be called */ int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ int (*suspend)(struct pci_dev *dev, pm_message_t state); /* Device suspended */ int (*resume)(struct pci_dev *dev); /* Device woken up */ void (*shutdown)(struct pci_dev *dev); int (*sriov_configure)(struct pci_dev *dev, int num_vfs); /* On PF */ int (*sriov_set_msix_vec_count)(struct pci_dev *vf, int msix_vec_count); /* On PF */ u32 (*sriov_get_vf_total_msix)(struct pci_dev *pf); const struct pci_error_handlers *err_handler; const struct attribute_group **groups; const struct attribute_group **dev_groups; struct device_driver driver; struct pci_dynids dynids; }; #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) /** * PCI_DEVICE - macro used to describe a specific PCI device * @vend: the 16 bit PCI Vendor ID * @dev: the 16 bit PCI Device ID * * This macro is used to create a struct pci_device_id that matches a * specific device. The subvendor and subdevice fields will be set to * PCI_ANY_ID. */ #define PCI_DEVICE(vend,dev) \ .vendor = (vend), .device = (dev), \ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID /** * PCI_DEVICE_DRIVER_OVERRIDE - macro used to describe a PCI device with * override_only flags. * @vend: the 16 bit PCI Vendor ID * @dev: the 16 bit PCI Device ID * @driver_override: the 32 bit PCI Device override_only * * This macro is used to create a struct pci_device_id that matches only a * driver_override device. The subvendor and subdevice fields will be set to * PCI_ANY_ID. */ #define PCI_DEVICE_DRIVER_OVERRIDE(vend, dev, driver_override) \ .vendor = (vend), .device = (dev), .subvendor = PCI_ANY_ID, \ .subdevice = PCI_ANY_ID, .override_only = (driver_override) /** * PCI_DRIVER_OVERRIDE_DEVICE_VFIO - macro used to describe a VFIO * "driver_override" PCI device. * @vend: the 16 bit PCI Vendor ID * @dev: the 16 bit PCI Device ID * * This macro is used to create a struct pci_device_id that matches a * specific device. The subvendor and subdevice fields will be set to * PCI_ANY_ID and the driver_override will be set to * PCI_ID_F_VFIO_DRIVER_OVERRIDE. */ #define PCI_DRIVER_OVERRIDE_DEVICE_VFIO(vend, dev) \ PCI_DEVICE_DRIVER_OVERRIDE(vend, dev, PCI_ID_F_VFIO_DRIVER_OVERRIDE) /** * PCI_DEVICE_SUB - macro used to describe a specific PCI device with subsystem * @vend: the 16 bit PCI Vendor ID * @dev: the 16 bit PCI Device ID * @subvend: the 16 bit PCI Subvendor ID * @subdev: the 16 bit PCI Subdevice ID * * This macro is used to create a struct pci_device_id that matches a * specific device with subsystem information. */ #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ .vendor = (vend), .device = (dev), \ .subvendor = (subvend), .subdevice = (subdev) /** * PCI_DEVICE_CLASS - macro used to describe a specific PCI device class * @dev_class: the class, subclass, prog-if triple for this device * @dev_class_mask: the class mask for this device * * This macro is used to create a struct pci_device_id that matches a * specific PCI class. The vendor, device, subvendor, and subdevice * fields will be set to PCI_ANY_ID. */ #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ .class = (dev_class), .class_mask = (dev_class_mask), \ .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID /** * PCI_VDEVICE - macro used to describe a specific PCI device in short form * @vend: the vendor name * @dev: the 16 bit PCI Device ID * * This macro is used to create a struct pci_device_id that matches a * specific PCI device. The subvendor, and subdevice fields will be set * to PCI_ANY_ID. The macro allows the next field to follow as the device * private data. */ #define PCI_VDEVICE(vend, dev) \ .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 /** * PCI_DEVICE_DATA - macro used to describe a specific PCI device in very short form * @vend: the vendor name (without PCI_VENDOR_ID_ prefix) * @dev: the device name (without PCI_DEVICE_ID_<vend>_ prefix) * @data: the driver data to be filled * * This macro is used to create a struct pci_device_id that matches a * specific PCI device. The subvendor, and subdevice fields will be set * to PCI_ANY_ID. */ #define PCI_DEVICE_DATA(vend, dev, data) \ .vendor = PCI_VENDOR_ID_##vend, .device = PCI_DEVICE_ID_##vend##_##dev, \ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0, \ .driver_data = (kernel_ulong_t)(data) enum { PCI_REASSIGN_ALL_RSRC = 0x00000001, /* Ignore firmware setup */ PCI_REASSIGN_ALL_BUS = 0x00000002, /* Reassign all bus numbers */ PCI_PROBE_ONLY = 0x00000004, /* Use existing setup */ PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, /* Don't do ISA alignment */ PCI_ENABLE_PROC_DOMAINS = 0x00000010, /* Enable domains in /proc */ PCI_COMPAT_DOMAIN_0 = 0x00000020, /* ... except domain 0 */ PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* Scan all, not just dev 0 */ }; #define PCI_IRQ_LEGACY (1 << 0) /* Allow legacy interrupts */ #define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */ #define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */ #define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */ /* These external functions are only available when PCI support is enabled */ #ifdef CONFIG_PCI extern unsigned int pci_flags; static inline void pci_set_flags(int flags) { pci_flags = flags; } static inline void pci_add_flags(int flags) { pci_flags |= flags; } static inline void pci_clear_flags(int flags) { pci_flags &= ~flags; } static inline int pci_has_flag(int flag) { return pci_flags & flag; } void pcie_bus_configure_settings(struct pci_bus *bus); enum pcie_bus_config_types { PCIE_BUS_TUNE_OFF, /* Don't touch MPS at all */ PCIE_BUS_DEFAULT, /* Ensure MPS matches upstream bridge */ PCIE_BUS_SAFE, /* Use largest MPS boot-time devices support */ PCIE_BUS_PERFORMANCE, /* Use MPS and MRRS for best performance */ PCIE_BUS_PEER2PEER, /* Set MPS = 128 for all devices */ }; extern enum pcie_bus_config_types pcie_bus_config; extern struct bus_type pci_bus_type; /* Do NOT directly access these two variables, unless you are arch-specific PCI * code, or PCI core code. */ extern struct list_head pci_root_buses; /* List of all known PCI buses */ /* Some device drivers need know if PCI is initiated */ int no_pci_devices(void); void pcibios_resource_survey_bus(struct pci_bus *bus); void pcibios_bus_add_device(struct pci_dev *pdev); void pcibios_add_bus(struct pci_bus *bus); void pcibios_remove_bus(struct pci_bus *bus); void pcibios_fixup_bus(struct pci_bus *); int __must_check pcibios_enable_device(struct pci_dev *, int mask); /* Architecture-specific versions may override this (weak) */ char *pcibios_setup(char *str); /* Used only when drivers/pci/setup.c is used */ resource_size_t pcibios_align_resource(void *, const struct resource *, resource_size_t, resource_size_t); /* Weak but can be overridden by arch */ void pci_fixup_cardbus(struct pci_bus *); /* Generic PCI functions used internally */ void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, struct resource *res); void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, struct pci_bus_region *region); void pcibios_scan_specific_bus(int busn); struct pci_bus *pci_find_bus(int domain, int busnr); void pci_bus_add_devices(const struct pci_bus *bus); struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); struct pci_bus *pci_create_root_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata, struct list_head *resources); int pci_host_probe(struct pci_host_bridge *bridge); int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); void pci_bus_release_busn_res(struct pci_bus *b); struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata, struct list_head *resources); int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge); struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr); struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, const char *name, struct hotplug_slot *hotplug); void pci_destroy_slot(struct pci_slot *slot); #ifdef CONFIG_SYSFS void pci_dev_assign_slot(struct pci_dev *dev); #else static inline void pci_dev_assign_slot(struct pci_dev *dev) { } #endif int pci_scan_slot(struct pci_bus *bus, int devfn); struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); unsigned int pci_scan_child_bus(struct pci_bus *bus); void pci_bus_add_device(struct pci_dev *dev); void pci_read_bridge_bases(struct pci_bus *child); struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res); u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin); int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); struct pci_dev *pci_dev_get(struct pci_dev *dev); void pci_dev_put(struct pci_dev *dev); void pci_remove_bus(struct pci_bus *b); void pci_stop_and_remove_bus_device(struct pci_dev *dev); void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev); void pci_stop_root_bus(struct pci_bus *bus); void pci_remove_root_bus(struct pci_bus *bus); void pci_setup_cardbus(struct pci_bus *bus); void pcibios_setup_bridge(struct pci_bus *bus, unsigned long type); void pci_sort_breadthfirst(void); #define dev_is_pci(d) ((d)->bus == &pci_bus_type) #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) /* Generic PCI functions exported to card drivers */ u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); u8 pci_find_capability(struct pci_dev *dev, int cap); u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap); u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap); u16 pci_find_ext_capability(struct pci_dev *dev, int cap); u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap); struct pci_bus *pci_find_next_bus(const struct pci_bus *from); u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap); u64 pci_get_dsn(struct pci_dev *dev); struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, struct pci_dev *from); struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from); struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, unsigned int devfn); struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); int pci_dev_present(const struct pci_device_id *ids); int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val); int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val); int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 *val); int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val); int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val); int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val); int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val); int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val); int pci_read_config_dword(const struct pci_dev *dev, int where, u32 *val); int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val); int pci_write_config_word(const struct pci_dev *dev, int where, u16 val); int pci_write_config_dword(const struct pci_dev *dev, int where, u32 val); int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val); int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, u16 clear, u16 set); int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos, u32 clear, u32 set); static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, u16 set) { return pcie_capability_clear_and_set_word(dev, pos, 0, set); } static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos, u32 set) { return pcie_capability_clear_and_set_dword(dev, pos, 0, set); } static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, u16 clear) { return pcie_capability_clear_and_set_word(dev, pos, clear, 0); } static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos, u32 clear) { return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); } /* User-space driven config access */ int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); int __must_check pci_enable_device(struct pci_dev *dev); int __must_check pci_enable_device_io(struct pci_dev *dev); int __must_check pci_enable_device_mem(struct pci_dev *dev); int __must_check pci_reenable_device(struct pci_dev *); int __must_check pcim_enable_device(struct pci_dev *pdev); void pcim_pin_device(struct pci_dev *pdev); static inline bool pci_intx_mask_supported(struct pci_dev *pdev) { /* * INTx masking is supported if PCI_COMMAND_INTX_DISABLE is * writable and no quirk has marked the feature broken. */ return !pdev->broken_intx_masking; } static inline int pci_is_enabled(struct pci_dev *pdev) { return (atomic_read(&pdev->enable_cnt) > 0); } static inline int pci_is_managed(struct pci_dev *pdev) { return pdev->is_managed; } void pci_disable_device(struct pci_dev *dev); extern unsigned int pcibios_max_latency; void pci_set_master(struct pci_dev *dev); void pci_clear_master(struct pci_dev *dev); int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); int pci_set_cacheline_size(struct pci_dev *dev); int __must_check pci_set_mwi(struct pci_dev *dev); int __must_check pcim_set_mwi(struct pci_dev *dev); int pci_try_set_mwi(struct pci_dev *dev); void pci_clear_mwi(struct pci_dev *dev); void pci_disable_parity(struct pci_dev *dev); void pci_intx(struct pci_dev *dev, int enable); bool pci_check_and_mask_intx(struct pci_dev *dev); bool pci_check_and_unmask_intx(struct pci_dev *dev); int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask); int pci_wait_for_pending_transaction(struct pci_dev *dev); int pcix_get_max_mmrbc(struct pci_dev *dev); int pcix_get_mmrbc(struct pci_dev *dev); int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); int pcie_get_readrq(struct pci_dev *dev); int pcie_set_readrq(struct pci_dev *dev, int rq); int pcie_get_mps(struct pci_dev *dev); int pcie_set_mps(struct pci_dev *dev, int mps); u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, enum pci_bus_speed *speed, enum pcie_link_width *width); void pcie_print_link_status(struct pci_dev *dev); int pcie_reset_flr(struct pci_dev *dev, bool probe); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); int pci_reset_function_locked(struct pci_dev *dev); int pci_try_reset_function(struct pci_dev *dev); int pci_probe_reset_slot(struct pci_slot *slot); int pci_probe_reset_bus(struct pci_bus *bus); int pci_reset_bus(struct pci_dev *dev); void pci_reset_secondary_bus(struct pci_dev *dev); void pcibios_reset_secondary_bus(struct pci_dev *dev); void pci_update_resource(struct pci_dev *dev, int resno); int __must_check pci_assign_resource(struct pci_dev *dev, int i); int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); void pci_release_resource(struct pci_dev *dev, int resno); static inline int pci_rebar_bytes_to_size(u64 bytes) { bytes = roundup_pow_of_two(bytes); /* Return BAR size as defined in the resizable BAR specification */ return max(ilog2(bytes), 20) - 20; } u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar); int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size); int pci_select_bars(struct pci_dev *dev, unsigned long flags); bool pci_device_is_present(struct pci_dev *pdev); void pci_ignore_hotplug(struct pci_dev *dev); struct pci_dev *pci_real_dma_dev(struct pci_dev *dev); int pci_status_get_and_clear_errors(struct pci_dev *pdev); int __printf(6, 7) pci_request_irq(struct pci_dev *dev, unsigned int nr, irq_handler_t handler, irq_handler_t thread_fn, void *dev_id, const char *fmt, ...); void pci_free_irq(struct pci_dev *dev, unsigned int nr, void *dev_id); /* ROM control related routines */ int pci_enable_rom(struct pci_dev *pdev); void pci_disable_rom(struct pci_dev *pdev); void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); /* Power management related routines */ int pci_save_state(struct pci_dev *dev); void pci_restore_state(struct pci_dev *dev); struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state); int pci_load_and_free_saved_state(struct pci_dev *dev, struct pci_saved_state **state); int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state); int pci_set_power_state(struct pci_dev *dev, pci_power_t state); pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); void pci_pme_active(struct pci_dev *dev, bool enable); int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable); int pci_wake_from_d3(struct pci_dev *dev, bool enable); int pci_prepare_to_sleep(struct pci_dev *dev); int pci_back_from_sleep(struct pci_dev *dev); bool pci_dev_run_wake(struct pci_dev *dev); void pci_d3cold_enable(struct pci_dev *dev); void pci_d3cold_disable(struct pci_dev *dev); bool pcie_relaxed_ordering_enabled(struct pci_dev *dev); void pci_resume_bus(struct pci_bus *bus); void pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state); /* For use by arch with custom probe code */ void set_pcie_port_type(struct pci_dev *pdev); void set_pcie_hotplug_bridge(struct pci_dev *pdev); /* Functions for PCI Hotplug drivers to use */ unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); unsigned int pci_rescan_bus(struct pci_bus *bus); void pci_lock_rescan_remove(void); void pci_unlock_rescan_remove(void); /* Vital Product Data routines */ ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); void pci_bus_assign_resources(const struct pci_bus *bus); void pci_bus_claim_resources(struct pci_bus *bus); void pci_bus_size_bridges(struct pci_bus *bus); int pci_claim_resource(struct pci_dev *, int); int pci_claim_bridge_resource(struct pci_dev *bridge, int i); void pci_assign_unassigned_resources(void); void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); void pci_assign_unassigned_bus_resources(struct pci_bus *bus); void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus); int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type); void pdev_enable_device(struct pci_dev *); int pci_enable_resources(struct pci_dev *, int mask); void pci_assign_irq(struct pci_dev *dev); struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res); #define HAVE_PCI_REQ_REGIONS 2 int __must_check pci_request_regions(struct pci_dev *, const char *); int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); void pci_release_regions(struct pci_dev *); int __must_check pci_request_region(struct pci_dev *, int, const char *); void pci_release_region(struct pci_dev *, int); int pci_request_selected_regions(struct pci_dev *, int, const char *); int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); void pci_release_selected_regions(struct pci_dev *, int); /* drivers/pci/bus.c */ void pci_add_resource(struct list_head *resources, struct resource *res); void pci_add_resource_offset(struct list_head *resources, struct resource *res, resource_size_t offset); void pci_free_resource_list(struct list_head *resources); void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); void pci_bus_remove_resources(struct pci_bus *bus); void pci_bus_remove_resource(struct pci_bus *bus, struct resource *res); int devm_request_pci_bus_resources(struct device *dev, struct list_head *resources); /* Temporary until new and working PCI SBR API in place */ int pci_bridge_secondary_bus_reset(struct pci_dev *dev); #define pci_bus_for_each_resource(bus, res, i) \ for (i = 0; \ (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ i++) int __must_check pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, resource_size_t size, resource_size_t align, resource_size_t min, unsigned long type_mask, resource_size_t (*alignf)(void *, const struct resource *, resource_size_t, resource_size_t), void *alignf_data); int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr, resource_size_t size); unsigned long pci_address_to_pio(phys_addr_t addr); phys_addr_t pci_pio_to_address(unsigned long pio); int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); int devm_pci_remap_iospace(struct device *dev, const struct resource *res, phys_addr_t phys_addr); void pci_unmap_iospace(struct resource *res); void __iomem *devm_pci_remap_cfgspace(struct device *dev, resource_size_t offset, resource_size_t size); void __iomem *devm_pci_remap_cfg_resource(struct device *dev, struct resource *res); static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) { struct pci_bus_region region; pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]); return region.start; } /* Proper probing supporting hot-pluggable devices */ int __must_check __pci_register_driver(struct pci_driver *, struct module *, const char *mod_name); /* pci_register_driver() must be a macro so KBUILD_MODNAME can be expanded */ #define pci_register_driver(driver) \ __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) void pci_unregister_driver(struct pci_driver *dev); /** * module_pci_driver() - Helper macro for registering a PCI driver * @__pci_driver: pci_driver struct * * Helper macro for PCI drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_pci_driver(__pci_driver) \ module_driver(__pci_driver, pci_register_driver, pci_unregister_driver) /** * builtin_pci_driver() - Helper macro for registering a PCI driver * @__pci_driver: pci_driver struct * * Helper macro for PCI drivers which do not do anything special in their * init code. This eliminates a lot of boilerplate. Each driver may only * use this macro once, and calling it replaces device_initcall(...) */ #define builtin_pci_driver(__pci_driver) \ builtin_driver(__pci_driver, pci_register_driver) struct pci_driver *pci_dev_driver(const struct pci_dev *dev); int pci_add_dynid(struct pci_driver *drv, unsigned int vendor, unsigned int device, unsigned int subvendor, unsigned int subdevice, unsigned int class, unsigned int class_mask, unsigned long driver_data); const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev); int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass); void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata); int pci_cfg_space_size(struct pci_dev *dev); unsigned char pci_bus_max_busnr(struct pci_bus *bus); void pci_setup_bridge(struct pci_bus *bus); resource_size_t pcibios_window_alignment(struct pci_bus *bus, unsigned long type); #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) int pci_set_vga_state(struct pci_dev *pdev, bool decode, unsigned int command_bits, u32 flags); /* * Virtual interrupts allow for more interrupts to be allocated * than the device has interrupts for. These are not programmed * into the device's MSI-X table and must be handled by some * other driver means. */ #define PCI_IRQ_VIRTUAL (1 << 4) #define PCI_IRQ_ALL_TYPES \ (PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX) /* kmem_cache style wrapper around pci_alloc_consistent() */ #include <linux/dmapool.h> #define pci_pool dma_pool #define pci_pool_create(name, pdev, size, align, allocation) \ dma_pool_create(name, &pdev->dev, size, align, allocation) #define pci_pool_destroy(pool) dma_pool_destroy(pool) #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) #define pci_pool_zalloc(pool, flags, handle) \ dma_pool_zalloc(pool, flags, handle) #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) struct msix_entry { u32 vector; /* Kernel uses to write allocated vector */ u16 entry; /* Driver uses to specify entry, OS writes */ }; #ifdef CONFIG_PCI_MSI int pci_msi_vec_count(struct pci_dev *dev); void pci_disable_msi(struct pci_dev *dev); int pci_msix_vec_count(struct pci_dev *dev); void pci_disable_msix(struct pci_dev *dev); void pci_restore_msi_state(struct pci_dev *dev); int pci_msi_enabled(void); int pci_enable_msi(struct pci_dev *dev); int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec); static inline int pci_enable_msix_exact(struct pci_dev *dev, struct msix_entry *entries, int nvec) { int rc = pci_enable_msix_range(dev, entries, nvec, nvec); if (rc < 0) return rc; return 0; } int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *affd); void pci_free_irq_vectors(struct pci_dev *dev); int pci_irq_vector(struct pci_dev *dev, unsigned int nr); const struct cpumask *pci_irq_get_affinity(struct pci_dev *pdev, int vec); #else static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } static inline void pci_disable_msi(struct pci_dev *dev) { } static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } static inline void pci_disable_msix(struct pci_dev *dev) { } static inline void pci_restore_msi_state(struct pci_dev *dev) { } static inline int pci_msi_enabled(void) { return 0; } static inline int pci_enable_msi(struct pci_dev *dev) { return -ENOSYS; } static inline int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec) { return -ENOSYS; } static inline int pci_enable_msix_exact(struct pci_dev *dev, struct msix_entry *entries, int nvec) { return -ENOSYS; } static inline int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *aff_desc) { if ((flags & PCI_IRQ_LEGACY) && min_vecs == 1 && dev->irq) return 1; return -ENOSPC; } static inline void pci_free_irq_vectors(struct pci_dev *dev) { } static inline int pci_irq_vector(struct pci_dev *dev, unsigned int nr) { if (WARN_ON_ONCE(nr > 0)) return -EINVAL; return dev->irq; } static inline const struct cpumask *pci_irq_get_affinity(struct pci_dev *pdev, int vec) { return cpu_possible_mask; } #endif /** * pci_irqd_intx_xlate() - Translate PCI INTx value to an IRQ domain hwirq * @d: the INTx IRQ domain * @node: the DT node for the device whose interrupt we're translating * @intspec: the interrupt specifier data from the DT * @intsize: the number of entries in @intspec * @out_hwirq: pointer at which to write the hwirq number * @out_type: pointer at which to write the interrupt type * * Translate a PCI INTx interrupt number from device tree in the range 1-4, as * stored in the standard PCI_INTERRUPT_PIN register, to a value in the range * 0-3 suitable for use in a 4 entry IRQ domain. That is, subtract one from the * INTx value to obtain the hwirq number. * * Returns 0 on success, or -EINVAL if the interrupt specifier is out of range. */ static inline int pci_irqd_intx_xlate(struct irq_domain *d, struct device_node *node, const u32 *intspec, unsigned int intsize, unsigned long *out_hwirq, unsigned int *out_type) { const u32 intx = intspec[0]; if (intx < PCI_INTERRUPT_INTA || intx > PCI_INTERRUPT_INTD) return -EINVAL; *out_hwirq = intx - PCI_INTERRUPT_INTA; return 0; } #ifdef CONFIG_PCIEPORTBUS extern bool pcie_ports_disabled; extern bool pcie_ports_native; #else #define pcie_ports_disabled true #define pcie_ports_native false #endif #define PCIE_LINK_STATE_L0S BIT(0) #define PCIE_LINK_STATE_L1 BIT(1) #define PCIE_LINK_STATE_CLKPM BIT(2) #define PCIE_LINK_STATE_L1_1 BIT(3) #define PCIE_LINK_STATE_L1_2 BIT(4) #define PCIE_LINK_STATE_L1_1_PCIPM BIT(5) #define PCIE_LINK_STATE_L1_2_PCIPM BIT(6) #ifdef CONFIG_PCIEASPM int pci_disable_link_state(struct pci_dev *pdev, int state); int pci_disable_link_state_locked(struct pci_dev *pdev, int state); void pcie_no_aspm(void); bool pcie_aspm_support_enabled(void); bool pcie_aspm_enabled(struct pci_dev *pdev); bool pcie_aspm_capable(struct pci_dev *pdev); #else static inline int pci_disable_link_state(struct pci_dev *pdev, int state) { return 0; } static inline int pci_disable_link_state_locked(struct pci_dev *pdev, int state) { return 0; } static inline void pcie_no_aspm(void) { } static inline bool pcie_aspm_support_enabled(void) { return false; } static inline bool pcie_aspm_enabled(struct pci_dev *pdev) { return false; } static inline bool pcie_aspm_capable(struct pci_dev *pdev) { return false; } #endif #ifdef CONFIG_PCIEAER bool pci_aer_available(void); #else static inline bool pci_aer_available(void) { return false; } #endif bool pci_ats_disabled(void); #ifdef CONFIG_PCIE_PTM int pci_enable_ptm(struct pci_dev *dev, u8 *granularity); void pci_disable_ptm(struct pci_dev *dev); bool pcie_ptm_enabled(struct pci_dev *dev); #else static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity) { return -EINVAL; } static inline void pci_disable_ptm(struct pci_dev *dev) { } static inline bool pcie_ptm_enabled(struct pci_dev *dev) { return false; } #endif void pci_cfg_access_lock(struct pci_dev *dev); bool pci_cfg_access_trylock(struct pci_dev *dev); void pci_cfg_access_unlock(struct pci_dev *dev); void pci_dev_lock(struct pci_dev *dev); int pci_dev_trylock(struct pci_dev *dev); void pci_dev_unlock(struct pci_dev *dev); /* * PCI domain support. Sometimes called PCI segment (eg by ACPI), * a PCI domain is defined to be a set of PCI buses which share * configuration space. */ #ifdef CONFIG_PCI_DOMAINS extern int pci_domains_supported; #else enum { pci_domains_supported = 0 }; static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } static inline int pci_proc_domain(struct pci_bus *bus) { return 0; } #endif /* CONFIG_PCI_DOMAINS */ /* * Generic implementation for PCI domain support. If your * architecture does not need custom management of PCI * domains then this implementation will be used */ #ifdef CONFIG_PCI_DOMAINS_GENERIC static inline int pci_domain_nr(struct pci_bus *bus) { return bus->domain_nr; } #ifdef CONFIG_ACPI int acpi_pci_bus_find_domain_nr(struct pci_bus *bus); #else static inline int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) { return 0; } #endif int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent); void pci_bus_release_domain_nr(struct pci_bus *bus, struct device *parent); #endif /* Some architectures require additional setup to direct VGA traffic */ typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, unsigned int command_bits, u32 flags); void pci_register_set_vga_state(arch_set_vga_state_t func); static inline int pci_request_io_regions(struct pci_dev *pdev, const char *name) { return pci_request_selected_regions(pdev, pci_select_bars(pdev, IORESOURCE_IO), name); } static inline void pci_release_io_regions(struct pci_dev *pdev) { return pci_release_selected_regions(pdev, pci_select_bars(pdev, IORESOURCE_IO)); } static inline int pci_request_mem_regions(struct pci_dev *pdev, const char *name) { return pci_request_selected_regions(pdev, pci_select_bars(pdev, IORESOURCE_MEM), name); } static inline void pci_release_mem_regions(struct pci_dev *pdev) { return pci_release_selected_regions(pdev, pci_select_bars(pdev, IORESOURCE_MEM)); } #else /* CONFIG_PCI is not enabled */ static inline void pci_set_flags(int flags) { } static inline void pci_add_flags(int flags) { } static inline void pci_clear_flags(int flags) { } static inline int pci_has_flag(int flag) { return 0; } /* * If the system does not have PCI, clearly these return errors. Define * these as simple inline functions to avoid hair in drivers. */ #define _PCI_NOP(o, s, t) \ static inline int pci_##o##_config_##s(struct pci_dev *dev, \ int where, t val) \ { return PCIBIOS_FUNC_NOT_SUPPORTED; } #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ _PCI_NOP(o, word, u16 x) \ _PCI_NOP(o, dword, u32 x) _PCI_NOP_ALL(read, *) _PCI_NOP_ALL(write,) static inline struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, struct pci_dev *from) { return NULL; } static inline struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from) { return NULL; } static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from) { return NULL; } #define pci_dev_present(ids) (0) #define no_pci_devices() (1) #define pci_dev_put(dev) do { } while (0) static inline void pci_set_master(struct pci_dev *dev) { } static inline void pci_clear_master(struct pci_dev *dev) { } static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } static inline void pci_disable_device(struct pci_dev *dev) { } static inline int pcim_enable_device(struct pci_dev *pdev) { return -EIO; } static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY; } static inline int __must_check __pci_register_driver(struct pci_driver *drv, struct module *owner, const char *mod_name) { return 0; } static inline int pci_register_driver(struct pci_driver *drv) { return 0; } static inline void pci_unregister_driver(struct pci_driver *drv) { } static inline u8 pci_find_capability(struct pci_dev *dev, int cap) { return 0; } static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, int cap) { return 0; } static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) { return 0; } static inline u64 pci_get_dsn(struct pci_dev *dev) { return 0; } /* Power management related routines */ static inline int pci_save_state(struct pci_dev *dev) { return 0; } static inline void pci_restore_state(struct pci_dev *dev) { } static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; } static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) { return 0; } static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; } static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; } static inline struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res) { return NULL; } static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) { return -EIO; } static inline void pci_release_regions(struct pci_dev *dev) { } static inline int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr, resource_size_t size) { return -EINVAL; } static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; } static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) { return NULL; } static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn) { return NULL; } static inline struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, unsigned int devfn) { return NULL; } static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; } #define dev_is_pci(d) (false) #define dev_is_pf(d) (false) static inline bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags) { return false; } static inline int pci_irqd_intx_xlate(struct irq_domain *d, struct device_node *node, const u32 *intspec, unsigned int intsize, unsigned long *out_hwirq, unsigned int *out_type) { return -EINVAL; } static inline const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev) { return NULL; } static inline bool pci_ats_disabled(void) { return true; } static inline int pci_irq_vector(struct pci_dev *dev, unsigned int nr) { return -EINVAL; } static inline int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *aff_desc) { return -ENOSPC; } #endif /* CONFIG_PCI */ static inline int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags) { return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags, NULL); } /* Include architecture-dependent settings and functions */ #include <asm/pci.h> /* These two functions provide almost identical functionality. Depending * on the architecture, one will be implemented as a wrapper around the * other (in drivers/pci/mmap.c). * * pci_mmap_resource_range() maps a specific BAR, and vm->vm_pgoff * is expected to be an offset within that region. * * pci_mmap_page_range() is the legacy architecture-specific interface, * which accepts a "user visible" resource address converted by * pci_resource_to_user(), as used in the legacy mmap() interface in * /proc/bus/pci/. */ int pci_mmap_resource_range(struct pci_dev *dev, int bar, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); int pci_mmap_page_range(struct pci_dev *pdev, int bar, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); #ifndef arch_can_pci_mmap_wc #define arch_can_pci_mmap_wc() 0 #endif #ifndef arch_can_pci_mmap_io #define arch_can_pci_mmap_io() 0 #define pci_iobar_pfn(pdev, bar, vma) (-EINVAL) #else int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma); #endif #ifndef pci_root_bus_fwnode #define pci_root_bus_fwnode(bus) NULL #endif /* * These helpers provide future and backwards compatibility * for accessing popular PCI BAR info */ #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) #define pci_resource_len(dev,bar) \ ((pci_resource_end((dev), (bar)) == 0) ? 0 : \ \ (pci_resource_end((dev), (bar)) - \ pci_resource_start((dev), (bar)) + 1)) /* * Similar to the helpers above, these manipulate per-pci_dev * driver-specific data. They are really just a wrapper around * the generic device structure functions of these calls. */ static inline void *pci_get_drvdata(struct pci_dev *pdev) { return dev_get_drvdata(&pdev->dev); } static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) { dev_set_drvdata(&pdev->dev, data); } static inline const char *pci_name(const struct pci_dev *pdev) { return dev_name(&pdev->dev); } void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, resource_size_t *start, resource_size_t *end); /* * The world is not perfect and supplies us with broken PCI devices. * For at least a part of these bugs we need a work-around, so both * generic (drivers/pci/quirks.c) and per-architecture code can define * fixup hooks to be called for particular buggy devices. */ struct pci_fixup { u16 vendor; /* Or PCI_ANY_ID */ u16 device; /* Or PCI_ANY_ID */ u32 class; /* Or PCI_ANY_ID */ unsigned int class_shift; /* should be 0, 8, 16 */ #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS int hook_offset; #else void (*hook)(struct pci_dev *dev); #endif }; enum pci_fixup_pass { pci_fixup_early, /* Before probing BARs */ pci_fixup_header, /* After reading configuration header */ pci_fixup_final, /* Final phase of device fixups */ pci_fixup_enable, /* pci_enable_device() time */ pci_fixup_resume, /* pci_device_resume() */ pci_fixup_suspend, /* pci_device_suspend() */ pci_fixup_resume_early, /* pci_device_resume_early() */ pci_fixup_suspend_late, /* pci_device_suspend_late() */ }; #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS #define ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, hook) \ __ADDRESSABLE(hook) \ asm(".section " #sec ", \"a\" \n" \ ".balign 16 \n" \ ".short " #vendor ", " #device " \n" \ ".long " #class ", " #class_shift " \n" \ ".long " #hook " - . \n" \ ".previous \n"); /* * Clang's LTO may rename static functions in C, but has no way to * handle such renamings when referenced from inline asm. To work * around this, create global C stubs for these cases. */ #ifdef CONFIG_LTO_CLANG #define __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, hook, stub) \ void __cficanonical stub(struct pci_dev *dev); \ void __cficanonical stub(struct pci_dev *dev) \ { \ hook(dev); \ } \ ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, stub) #else #define __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, hook, stub) \ ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, hook) #endif #define DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, hook) \ __DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class, \ class_shift, hook, __UNIQUE_ID(hook)) #else /* Anonymous variables would be nice... */ #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \ class_shift, hook) \ static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \ __attribute__((__section__(#section), aligned((sizeof(void *))))) \ = { vendor, device, class, class_shift, hook }; #endif #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ resume##hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ resume_early##hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ suspend##hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ class_shift, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ suspend_late##hook, vendor, device, class, class_shift, hook) #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ resume##hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ resume_early##hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ suspend##hook, vendor, device, PCI_ANY_ID, 0, hook) #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ suspend_late##hook, vendor, device, PCI_ANY_ID, 0, hook) #ifdef CONFIG_PCI_QUIRKS void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); #else static inline void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) { } #endif void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name); int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, const char *name); void pcim_iounmap_regions(struct pci_dev *pdev, int mask); extern int pci_pci_problems; #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ #define PCIPCI_TRITON 2 #define PCIPCI_NATOMA 4 #define PCIPCI_VIAETBF 8 #define PCIPCI_VSFX 16 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ extern unsigned long pci_cardbus_io_size; extern unsigned long pci_cardbus_mem_size; extern u8 pci_dfl_cache_line_size; extern u8 pci_cache_line_size; /* Architecture-specific versions may override these (weak) */ void pcibios_disable_device(struct pci_dev *dev); void pcibios_set_master(struct pci_dev *dev); int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); int pcibios_add_device(struct pci_dev *dev); void pcibios_release_device(struct pci_dev *dev); #ifdef CONFIG_PCI void pcibios_penalize_isa_irq(int irq, int active); #else static inline void pcibios_penalize_isa_irq(int irq, int active) {} #endif int pcibios_alloc_irq(struct pci_dev *dev); void pcibios_free_irq(struct pci_dev *dev); resource_size_t pcibios_default_alignment(void); #if defined(CONFIG_PCI_MMCONFIG) || defined(CONFIG_ACPI_MCFG) void __init pci_mmcfg_early_init(void); void __init pci_mmcfg_late_init(void); #else static inline void pci_mmcfg_early_init(void) { } static inline void pci_mmcfg_late_init(void) { } #endif int pci_ext_cfg_avail(void); void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar); #ifdef CONFIG_PCI_IOV int pci_iov_virtfn_bus(struct pci_dev *dev, int id); int pci_iov_virtfn_devfn(struct pci_dev *dev, int id); int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); void pci_disable_sriov(struct pci_dev *dev); int pci_iov_sysfs_link(struct pci_dev *dev, struct pci_dev *virtfn, int id); int pci_iov_add_virtfn(struct pci_dev *dev, int id); void pci_iov_remove_virtfn(struct pci_dev *dev, int id); int pci_num_vf(struct pci_dev *dev); int pci_vfs_assigned(struct pci_dev *dev); int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs); int pci_sriov_get_totalvfs(struct pci_dev *dev); int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn); resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno); void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool probe); /* Arch may override these (weak) */ int pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs); int pcibios_sriov_disable(struct pci_dev *pdev); resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno); #else static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id) { return -ENOSYS; } static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id) { return -ENOSYS; } static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) { return -ENODEV; } static inline int pci_iov_sysfs_link(struct pci_dev *dev, struct pci_dev *virtfn, int id) { return -ENODEV; } static inline int pci_iov_add_virtfn(struct pci_dev *dev, int id) { return -ENOSYS; } static inline void pci_iov_remove_virtfn(struct pci_dev *dev, int id) { } static inline void pci_disable_sriov(struct pci_dev *dev) { } static inline int pci_num_vf(struct pci_dev *dev) { return 0; } static inline int pci_vfs_assigned(struct pci_dev *dev) { return 0; } static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) { return 0; } static inline int pci_sriov_get_totalvfs(struct pci_dev *dev) { return 0; } #define pci_sriov_configure_simple NULL static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) { return 0; } static inline void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool probe) { } #endif #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) void pci_hp_create_module_link(struct pci_slot *pci_slot); void pci_hp_remove_module_link(struct pci_slot *pci_slot); #endif /** * pci_pcie_cap - get the saved PCIe capability offset * @dev: PCI device * * PCIe capability offset is calculated at PCI device initialization * time and saved in the data structure. This function returns saved * PCIe capability offset. Using this instead of pci_find_capability() * reduces unnecessary search in the PCI configuration space. If you * need to calculate PCIe capability offset from raw device for some * reasons, please use pci_find_capability() instead. */ static inline int pci_pcie_cap(struct pci_dev *dev) { return dev->pcie_cap; } /** * pci_is_pcie - check if the PCI device is PCI Express capable * @dev: PCI device * * Returns: true if the PCI device is PCI Express capable, false otherwise. */ static inline bool pci_is_pcie(struct pci_dev *dev) { return pci_pcie_cap(dev); } /** * pcie_caps_reg - get the PCIe Capabilities Register * @dev: PCI device */ static inline u16 pcie_caps_reg(const struct pci_dev *dev) { return dev->pcie_flags_reg; } /** * pci_pcie_type - get the PCIe device/port type * @dev: PCI device */ static inline int pci_pcie_type(const struct pci_dev *dev) { return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; } /** * pcie_find_root_port - Get the PCIe root port device * @dev: PCI device * * Traverse up the parent chain and return the PCIe Root Port PCI Device * for a given PCI/PCIe Device. */ static inline struct pci_dev *pcie_find_root_port(struct pci_dev *dev) { while (dev) { if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) return dev; dev = pci_upstream_bridge(dev); } return NULL; } static inline bool pci_dev_is_disconnected(const struct pci_dev *dev) { return dev->error_state == pci_channel_io_perm_failure; } void pci_request_acs(void); bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); bool pci_acs_path_enabled(struct pci_dev *start, struct pci_dev *end, u16 acs_flags); int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask); #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) /* Large Resource Data Type Tag Item Names */ #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) #define PCI_VPD_RO_KEYWORD_PARTNO "PN" #define PCI_VPD_RO_KEYWORD_SERIALNO "SN" #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" /** * pci_vpd_alloc - Allocate buffer and read VPD into it * @dev: PCI device * @size: pointer to field where VPD length is returned * * Returns pointer to allocated buffer or an ERR_PTR in case of failure */ void *pci_vpd_alloc(struct pci_dev *dev, unsigned int *size); /** * pci_vpd_find_id_string - Locate id string in VPD * @buf: Pointer to buffered VPD data * @len: The length of the buffer area in which to search * @size: Pointer to field where length of id string is returned * * Returns the index of the id string or -ENOENT if not found. */ int pci_vpd_find_id_string(const u8 *buf, unsigned int len, unsigned int *size); /** * pci_vpd_find_ro_info_keyword - Locate info field keyword in VPD RO section * @buf: Pointer to buffered VPD data * @len: The length of the buffer area in which to search * @kw: The keyword to search for * @size: Pointer to field where length of found keyword data is returned * * Returns the index of the information field keyword data or -ENOENT if * not found. */ int pci_vpd_find_ro_info_keyword(const void *buf, unsigned int len, const char *kw, unsigned int *size); /** * pci_vpd_check_csum - Check VPD checksum * @buf: Pointer to buffered VPD data * @len: VPD size * * Returns 1 if VPD has no checksum, otherwise 0 or an errno */ int pci_vpd_check_csum(const void *buf, unsigned int len); /* PCI <-> OF binding helpers */ #ifdef CONFIG_OF struct device_node; struct irq_domain; struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); bool pci_host_of_has_msi_map(struct device *dev); /* Arch may override this (weak) */ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus); #else /* CONFIG_OF */ static inline struct irq_domain * pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } static inline bool pci_host_of_has_msi_map(struct device *dev) { return false; } #endif /* CONFIG_OF */ static inline struct device_node * pci_device_to_OF_node(const struct pci_dev *pdev) { return pdev ? pdev->dev.of_node : NULL; } static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) { return bus ? bus->dev.of_node : NULL; } #ifdef CONFIG_ACPI struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus); void pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)); bool pci_pr3_present(struct pci_dev *pdev); #else static inline struct irq_domain * pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; } static inline bool pci_pr3_present(struct pci_dev *pdev) { return false; } #endif #if defined(CONFIG_X86) && defined(CONFIG_ACPI) bool arch_pci_dev_is_removable(struct pci_dev *pdev); #else static inline bool arch_pci_dev_is_removable(struct pci_dev *pdev) { return false; } #endif #ifdef CONFIG_EEH static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) { return pdev->dev.archdata.edev; } #endif void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from, unsigned nr_devfns); bool pci_devs_are_dma_aliases(struct pci_dev *dev1, struct pci_dev *dev2); int pci_for_each_dma_alias(struct pci_dev *pdev, int (*fn)(struct pci_dev *pdev, u16 alias, void *data), void *data); /* Helper functions for operation of device flag */ static inline void pci_set_dev_assigned(struct pci_dev *pdev) { pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; } static inline void pci_clear_dev_assigned(struct pci_dev *pdev) { pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; } static inline bool pci_is_dev_assigned(struct pci_dev *pdev) { return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; } /** * pci_ari_enabled - query ARI forwarding status * @bus: the PCI bus * * Returns true if ARI forwarding is enabled. */ static inline bool pci_ari_enabled(struct pci_bus *bus) { return bus->self && bus->self->ari_enabled; } /** * pci_is_thunderbolt_attached - whether device is on a Thunderbolt daisy chain * @pdev: PCI device to check * * Walk upwards from @pdev and check for each encountered bridge if it's part * of a Thunderbolt controller. Reaching the host bridge means @pdev is not * Thunderbolt-attached. (But rather soldered to the mainboard usually.) */ static inline bool pci_is_thunderbolt_attached(struct pci_dev *pdev) { struct pci_dev *parent = pdev; if (pdev->is_thunderbolt) return true; while ((parent = pci_upstream_bridge(parent))) if (parent->is_thunderbolt) return true; return false; } #if defined(CONFIG_PCIEPORTBUS) || defined(CONFIG_EEH) void pci_uevent_ers(struct pci_dev *pdev, enum pci_ers_result err_type); #endif /* Provide the legacy pci_dma_* API */ #include <linux/pci-dma-compat.h> #define pci_printk(level, pdev, fmt, arg...) \ dev_printk(level, &(pdev)->dev, fmt, ##arg) #define pci_emerg(pdev, fmt, arg...) dev_emerg(&(pdev)->dev, fmt, ##arg) #define pci_alert(pdev, fmt, arg...) dev_alert(&(pdev)->dev, fmt, ##arg) #define pci_crit(pdev, fmt, arg...) dev_crit(&(pdev)->dev, fmt, ##arg) #define pci_err(pdev, fmt, arg...) dev_err(&(pdev)->dev, fmt, ##arg) #define pci_warn(pdev, fmt, arg...) dev_warn(&(pdev)->dev, fmt, ##arg) #define pci_notice(pdev, fmt, arg...) dev_notice(&(pdev)->dev, fmt, ##arg) #define pci_info(pdev, fmt, arg...) dev_info(&(pdev)->dev, fmt, ##arg) #define pci_dbg(pdev, fmt, arg...) dev_dbg(&(pdev)->dev, fmt, ##arg) #define pci_notice_ratelimited(pdev, fmt, arg...) \ dev_notice_ratelimited(&(pdev)->dev, fmt, ##arg) #define pci_info_ratelimited(pdev, fmt, arg...) \ dev_info_ratelimited(&(pdev)->dev, fmt, ##arg) #define pci_WARN(pdev, condition, fmt, arg...) \ WARN(condition, "%s %s: " fmt, \ dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg) #define pci_WARN_ONCE(pdev, condition, fmt, arg...) \ WARN_ONCE(condition, "%s %s: " fmt, \ dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg) #endif /* LINUX_PCI_H */ PK ! �� � hw_breakpoint.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_HW_BREAKPOINT_H #define _LINUX_HW_BREAKPOINT_H #include <linux/perf_event.h> #include <uapi/linux/hw_breakpoint.h> #ifdef CONFIG_HAVE_HW_BREAKPOINT extern int __init init_hw_breakpoint(void); static inline void hw_breakpoint_init(struct perf_event_attr *attr) { memset(attr, 0, sizeof(*attr)); attr->type = PERF_TYPE_BREAKPOINT; attr->size = sizeof(*attr); /* * As it's for in-kernel or ptrace use, we want it to be pinned * and to call its callback every hits. */ attr->pinned = 1; attr->sample_period = 1; } static inline void ptrace_breakpoint_init(struct perf_event_attr *attr) { hw_breakpoint_init(attr); attr->exclude_kernel = 1; } static inline unsigned long hw_breakpoint_addr(struct perf_event *bp) { return bp->attr.bp_addr; } static inline int hw_breakpoint_type(struct perf_event *bp) { return bp->attr.bp_type; } static inline unsigned long hw_breakpoint_len(struct perf_event *bp) { return bp->attr.bp_len; } extern struct perf_event * register_user_hw_breakpoint(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context, struct task_struct *tsk); /* FIXME: only change from the attr, and don't unregister */ extern int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *attr); extern int modify_user_hw_breakpoint_check(struct perf_event *bp, struct perf_event_attr *attr, bool check); /* * Kernel breakpoints are not associated with any particular thread. */ extern struct perf_event * register_wide_hw_breakpoint_cpu(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context, int cpu); extern struct perf_event * __percpu * register_wide_hw_breakpoint(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context); extern int register_perf_hw_breakpoint(struct perf_event *bp); extern void unregister_hw_breakpoint(struct perf_event *bp); extern void unregister_wide_hw_breakpoint(struct perf_event * __percpu *cpu_events); extern int dbg_reserve_bp_slot(struct perf_event *bp); extern int dbg_release_bp_slot(struct perf_event *bp); extern int reserve_bp_slot(struct perf_event *bp); extern void release_bp_slot(struct perf_event *bp); int hw_breakpoint_weight(struct perf_event *bp); int arch_reserve_bp_slot(struct perf_event *bp); void arch_release_bp_slot(struct perf_event *bp); void arch_unregister_hw_breakpoint(struct perf_event *bp); extern void flush_ptrace_hw_breakpoint(struct task_struct *tsk); static inline struct arch_hw_breakpoint *counter_arch_bp(struct perf_event *bp) { return &bp->hw.info; } #else /* !CONFIG_HAVE_HW_BREAKPOINT */ static inline int __init init_hw_breakpoint(void) { return 0; } static inline struct perf_event * register_user_hw_breakpoint(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context, struct task_struct *tsk) { return NULL; } static inline int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *attr) { return -ENOSYS; } static inline int modify_user_hw_breakpoint_check(struct perf_event *bp, struct perf_event_attr *attr, bool check) { return -ENOSYS; } static inline struct perf_event * register_wide_hw_breakpoint_cpu(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context, int cpu) { return NULL; } static inline struct perf_event * __percpu * register_wide_hw_breakpoint(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context) { return NULL; } static inline int register_perf_hw_breakpoint(struct perf_event *bp) { return -ENOSYS; } static inline void unregister_hw_breakpoint(struct perf_event *bp) { } static inline void unregister_wide_hw_breakpoint(struct perf_event * __percpu *cpu_events) { } static inline int reserve_bp_slot(struct perf_event *bp) {return -ENOSYS; } static inline void release_bp_slot(struct perf_event *bp) { } static inline void flush_ptrace_hw_breakpoint(struct task_struct *tsk) { } static inline struct arch_hw_breakpoint *counter_arch_bp(struct perf_event *bp) { return NULL; } #endif /* CONFIG_HAVE_HW_BREAKPOINT */ #endif /* _LINUX_HW_BREAKPOINT_H */ PK ! �v�� � ioprio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef IOPRIO_H #define IOPRIO_H #include <linux/sched.h> #include <linux/sched/rt.h> #include <linux/iocontext.h> #include <uapi/linux/ioprio.h> /* * Default IO priority. */ #define IOPRIO_DEFAULT IOPRIO_PRIO_VALUE(IOPRIO_CLASS_NONE, 0) /* * Check that a priority value has a valid class. */ static inline bool ioprio_valid(unsigned short ioprio) { unsigned short class = IOPRIO_PRIO_CLASS(ioprio); return class > IOPRIO_CLASS_NONE && class <= IOPRIO_CLASS_IDLE; } /* * if process has set io priority explicitly, use that. if not, convert * the cpu scheduler nice value to an io priority */ static inline int task_nice_ioprio(struct task_struct *task) { return (task_nice(task) + 20) / 5; } /* * This is for the case where the task hasn't asked for a specific IO class. * Check for idle and rt task process, and return appropriate IO class. */ static inline int task_nice_ioclass(struct task_struct *task) { if (task->policy == SCHED_IDLE) return IOPRIO_CLASS_IDLE; else if (task_is_realtime(task)) return IOPRIO_CLASS_RT; else return IOPRIO_CLASS_BE; } /* * If the calling process has set an I/O priority, use that. Otherwise, return * the default I/O priority. */ static inline int get_current_ioprio(void) { struct io_context *ioc = current->io_context; if (ioc) return ioc->ioprio; return IOPRIO_DEFAULT; } /* * For inheritance, return the highest of the two given priorities */ extern int ioprio_best(unsigned short aprio, unsigned short bprio); extern int set_task_ioprio(struct task_struct *task, int ioprio); #ifdef CONFIG_BLOCK extern int ioprio_check_cap(int ioprio); #else static inline int ioprio_check_cap(int ioprio) { return -ENOTBLK; } #endif /* CONFIG_BLOCK */ #endif PK ! 6���� � bsg-lib.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * BSG helper library * * Copyright (C) 2008 James Smart, Emulex Corporation * Copyright (C) 2011 Red Hat, Inc. All rights reserved. * Copyright (C) 2011 Mike Christie */ #ifndef _BLK_BSG_ #define _BLK_BSG_ #include <linux/blkdev.h> #include <scsi/scsi_request.h> struct bsg_job; struct request; struct device; struct scatterlist; struct request_queue; typedef int (bsg_job_fn) (struct bsg_job *); typedef enum blk_eh_timer_return (bsg_timeout_fn)(struct request *); struct bsg_buffer { unsigned int payload_len; int sg_cnt; struct scatterlist *sg_list; }; struct bsg_job { struct device *dev; struct kref kref; unsigned int timeout; /* Transport/driver specific request/reply structs */ void *request; void *reply; unsigned int request_len; unsigned int reply_len; /* * On entry : reply_len indicates the buffer size allocated for * the reply. * * Upon completion : the message handler must set reply_len * to indicates the size of the reply to be returned to the * caller. */ /* DMA payloads for the request/response */ struct bsg_buffer request_payload; struct bsg_buffer reply_payload; int result; unsigned int reply_payload_rcv_len; /* BIDI support */ struct request *bidi_rq; struct bio *bidi_bio; void *dd_data; /* Used for driver-specific storage */ }; void bsg_job_done(struct bsg_job *job, int result, unsigned int reply_payload_rcv_len); struct request_queue *bsg_setup_queue(struct device *dev, const char *name, bsg_job_fn *job_fn, bsg_timeout_fn *timeout, int dd_job_size); void bsg_remove_queue(struct request_queue *q); void bsg_job_put(struct bsg_job *job); int __must_check bsg_job_get(struct bsg_job *job); #endif PK ! q���; �; pnp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Linux Plug and Play Support * Copyright by Adam Belay <ambx1@neo.rr.com> * Copyright (C) 2008 Hewlett-Packard Development Company, L.P. * Bjorn Helgaas <bjorn.helgaas@hp.com> */ #ifndef _LINUX_PNP_H #define _LINUX_PNP_H #include <linux/device.h> #include <linux/list.h> #include <linux/errno.h> #include <linux/mod_devicetable.h> #include <linux/console.h> #define PNP_NAME_LEN 50 struct pnp_protocol; struct pnp_dev; /* * Resource Management */ #ifdef CONFIG_PNP struct resource *pnp_get_resource(struct pnp_dev *dev, unsigned long type, unsigned int num); #else static inline struct resource *pnp_get_resource(struct pnp_dev *dev, unsigned long type, unsigned int num) { return NULL; } #endif static inline int pnp_resource_valid(struct resource *res) { if (res) return 1; return 0; } static inline int pnp_resource_enabled(struct resource *res) { if (res && !(res->flags & IORESOURCE_DISABLED)) return 1; return 0; } static inline resource_size_t pnp_resource_len(struct resource *res) { if (res->start == 0 && res->end == 0) return 0; return resource_size(res); } static inline resource_size_t pnp_port_start(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_IO, bar); if (pnp_resource_valid(res)) return res->start; return 0; } static inline resource_size_t pnp_port_end(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_IO, bar); if (pnp_resource_valid(res)) return res->end; return 0; } static inline unsigned long pnp_port_flags(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_IO, bar); if (pnp_resource_valid(res)) return res->flags; return IORESOURCE_IO | IORESOURCE_AUTO; } static inline int pnp_port_valid(struct pnp_dev *dev, unsigned int bar) { return pnp_resource_valid(pnp_get_resource(dev, IORESOURCE_IO, bar)); } static inline resource_size_t pnp_port_len(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_IO, bar); if (pnp_resource_valid(res)) return pnp_resource_len(res); return 0; } static inline resource_size_t pnp_mem_start(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_MEM, bar); if (pnp_resource_valid(res)) return res->start; return 0; } static inline resource_size_t pnp_mem_end(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_MEM, bar); if (pnp_resource_valid(res)) return res->end; return 0; } static inline unsigned long pnp_mem_flags(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_MEM, bar); if (pnp_resource_valid(res)) return res->flags; return IORESOURCE_MEM | IORESOURCE_AUTO; } static inline int pnp_mem_valid(struct pnp_dev *dev, unsigned int bar) { return pnp_resource_valid(pnp_get_resource(dev, IORESOURCE_MEM, bar)); } static inline resource_size_t pnp_mem_len(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_MEM, bar); if (pnp_resource_valid(res)) return pnp_resource_len(res); return 0; } static inline resource_size_t pnp_irq(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_IRQ, bar); if (pnp_resource_valid(res)) return res->start; return -1; } static inline unsigned long pnp_irq_flags(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_IRQ, bar); if (pnp_resource_valid(res)) return res->flags; return IORESOURCE_IRQ | IORESOURCE_AUTO; } static inline int pnp_irq_valid(struct pnp_dev *dev, unsigned int bar) { return pnp_resource_valid(pnp_get_resource(dev, IORESOURCE_IRQ, bar)); } static inline resource_size_t pnp_dma(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_DMA, bar); if (pnp_resource_valid(res)) return res->start; return -1; } static inline unsigned long pnp_dma_flags(struct pnp_dev *dev, unsigned int bar) { struct resource *res = pnp_get_resource(dev, IORESOURCE_DMA, bar); if (pnp_resource_valid(res)) return res->flags; return IORESOURCE_DMA | IORESOURCE_AUTO; } static inline int pnp_dma_valid(struct pnp_dev *dev, unsigned int bar) { return pnp_resource_valid(pnp_get_resource(dev, IORESOURCE_DMA, bar)); } /* * Device Management */ struct pnp_card { struct device dev; /* Driver Model device interface */ unsigned char number; /* used as an index, must be unique */ struct list_head global_list; /* node in global list of cards */ struct list_head protocol_list; /* node in protocol's list of cards */ struct list_head devices; /* devices attached to the card */ struct pnp_protocol *protocol; struct pnp_id *id; /* contains supported EISA IDs */ char name[PNP_NAME_LEN]; /* contains a human-readable name */ unsigned char pnpver; /* Plug & Play version */ unsigned char productver; /* product version */ unsigned int serial; /* serial number */ unsigned char checksum; /* if zero - checksum passed */ struct proc_dir_entry *procdir; /* directory entry in /proc/bus/isapnp */ }; #define global_to_pnp_card(n) list_entry(n, struct pnp_card, global_list) #define protocol_to_pnp_card(n) list_entry(n, struct pnp_card, protocol_list) #define to_pnp_card(n) container_of(n, struct pnp_card, dev) #define pnp_for_each_card(card) \ list_for_each_entry(card, &pnp_cards, global_list) struct pnp_card_link { struct pnp_card *card; struct pnp_card_driver *driver; void *driver_data; pm_message_t pm_state; }; static inline void *pnp_get_card_drvdata(struct pnp_card_link *pcard) { return pcard->driver_data; } static inline void pnp_set_card_drvdata(struct pnp_card_link *pcard, void *data) { pcard->driver_data = data; } struct pnp_dev { struct device dev; /* Driver Model device interface */ u64 dma_mask; unsigned int number; /* used as an index, must be unique */ int status; struct list_head global_list; /* node in global list of devices */ struct list_head protocol_list; /* node in list of device's protocol */ struct list_head card_list; /* node in card's list of devices */ struct list_head rdev_list; /* node in cards list of requested devices */ struct pnp_protocol *protocol; struct pnp_card *card; /* card the device is attached to, none if NULL */ struct pnp_driver *driver; struct pnp_card_link *card_link; struct pnp_id *id; /* supported EISA IDs */ int active; int capabilities; unsigned int num_dependent_sets; struct list_head resources; struct list_head options; char name[PNP_NAME_LEN]; /* contains a human-readable name */ int flags; /* used by protocols */ struct proc_dir_entry *procent; /* device entry in /proc/bus/isapnp */ void *data; }; #define global_to_pnp_dev(n) list_entry(n, struct pnp_dev, global_list) #define card_to_pnp_dev(n) list_entry(n, struct pnp_dev, card_list) #define protocol_to_pnp_dev(n) list_entry(n, struct pnp_dev, protocol_list) #define to_pnp_dev(n) container_of(n, struct pnp_dev, dev) #define pnp_for_each_dev(dev) list_for_each_entry(dev, &pnp_global, global_list) #define card_for_each_dev(card, dev) \ list_for_each_entry(dev, &(card)->devices, card_list) #define pnp_dev_name(dev) (dev)->name static inline void *pnp_get_drvdata(struct pnp_dev *pdev) { return dev_get_drvdata(&pdev->dev); } static inline void pnp_set_drvdata(struct pnp_dev *pdev, void *data) { dev_set_drvdata(&pdev->dev, data); } struct pnp_fixup { char id[7]; void (*quirk_function) (struct pnp_dev * dev); /* fixup function */ }; /* config parameters */ #define PNP_CONFIG_NORMAL 0x0001 #define PNP_CONFIG_FORCE 0x0002 /* disables validity checking */ /* capabilities */ #define PNP_READ 0x0001 #define PNP_WRITE 0x0002 #define PNP_DISABLE 0x0004 #define PNP_CONFIGURABLE 0x0008 #define PNP_REMOVABLE 0x0010 #define PNP_CONSOLE 0x0020 #define pnp_can_read(dev) (((dev)->protocol->get) && \ ((dev)->capabilities & PNP_READ)) #define pnp_can_write(dev) (((dev)->protocol->set) && \ ((dev)->capabilities & PNP_WRITE)) #define pnp_can_disable(dev) (((dev)->protocol->disable) && \ ((dev)->capabilities & PNP_DISABLE) && \ (!((dev)->capabilities & PNP_CONSOLE) || \ console_suspend_enabled)) #define pnp_can_configure(dev) ((!(dev)->active) && \ ((dev)->capabilities & PNP_CONFIGURABLE)) #define pnp_can_suspend(dev) (((dev)->protocol->suspend) && \ (!((dev)->capabilities & PNP_CONSOLE) || \ console_suspend_enabled)) #ifdef CONFIG_ISAPNP extern struct pnp_protocol isapnp_protocol; #define pnp_device_is_isapnp(dev) ((dev)->protocol == (&isapnp_protocol)) #else #define pnp_device_is_isapnp(dev) 0 #endif extern struct mutex pnp_res_mutex; #ifdef CONFIG_PNPBIOS extern struct pnp_protocol pnpbios_protocol; extern bool arch_pnpbios_disabled(void); #define pnp_device_is_pnpbios(dev) ((dev)->protocol == (&pnpbios_protocol)) #else #define pnp_device_is_pnpbios(dev) 0 #define arch_pnpbios_disabled() false #endif #ifdef CONFIG_PNPACPI extern struct pnp_protocol pnpacpi_protocol; static inline struct acpi_device *pnp_acpi_device(struct pnp_dev *dev) { if (dev->protocol == &pnpacpi_protocol) return dev->data; return NULL; } #else #define pnp_acpi_device(dev) 0 #endif /* status */ #define PNP_READY 0x0000 #define PNP_ATTACHED 0x0001 #define PNP_BUSY 0x0002 #define PNP_FAULTY 0x0004 /* isapnp specific macros */ #define isapnp_card_number(dev) ((dev)->card ? (dev)->card->number : -1) #define isapnp_csn_number(dev) ((dev)->number) /* * Driver Management */ struct pnp_id { char id[PNP_ID_LEN]; struct pnp_id *next; }; struct pnp_driver { const char *name; const struct pnp_device_id *id_table; unsigned int flags; int (*probe) (struct pnp_dev *dev, const struct pnp_device_id *dev_id); void (*remove) (struct pnp_dev *dev); void (*shutdown) (struct pnp_dev *dev); int (*suspend) (struct pnp_dev *dev, pm_message_t state); int (*resume) (struct pnp_dev *dev); struct device_driver driver; }; #define to_pnp_driver(drv) container_of(drv, struct pnp_driver, driver) struct pnp_card_driver { struct list_head global_list; char *name; const struct pnp_card_device_id *id_table; unsigned int flags; int (*probe) (struct pnp_card_link *card, const struct pnp_card_device_id *card_id); void (*remove) (struct pnp_card_link *card); int (*suspend) (struct pnp_card_link *card, pm_message_t state); int (*resume) (struct pnp_card_link *card); struct pnp_driver link; }; #define to_pnp_card_driver(drv) container_of(drv, struct pnp_card_driver, link) /* pnp driver flags */ #define PNP_DRIVER_RES_DO_NOT_CHANGE 0x0001 /* do not change the state of the device */ #define PNP_DRIVER_RES_DISABLE 0x0003 /* ensure the device is disabled */ /* * Protocol Management */ struct pnp_protocol { struct list_head protocol_list; char *name; /* resource control functions */ int (*get) (struct pnp_dev *dev); int (*set) (struct pnp_dev *dev); int (*disable) (struct pnp_dev *dev); /* protocol specific suspend/resume */ bool (*can_wakeup) (struct pnp_dev *dev); int (*suspend) (struct pnp_dev * dev, pm_message_t state); int (*resume) (struct pnp_dev * dev); /* used by pnp layer only (look but don't touch) */ unsigned char number; /* protocol number */ struct device dev; /* link to driver model */ struct list_head cards; struct list_head devices; }; #define to_pnp_protocol(n) list_entry(n, struct pnp_protocol, protocol_list) #define protocol_for_each_card(protocol, card) \ list_for_each_entry(card, &(protocol)->cards, protocol_list) #define protocol_for_each_dev(protocol, dev) \ list_for_each_entry(dev, &(protocol)->devices, protocol_list) extern struct bus_type pnp_bus_type; #if defined(CONFIG_PNP) /* device management */ int pnp_device_attach(struct pnp_dev *pnp_dev); void pnp_device_detach(struct pnp_dev *pnp_dev); extern struct list_head pnp_global; extern int pnp_platform_devices; /* multidevice card support */ struct pnp_dev *pnp_request_card_device(struct pnp_card_link *clink, const char *id, struct pnp_dev *from); void pnp_release_card_device(struct pnp_dev *dev); int pnp_register_card_driver(struct pnp_card_driver *drv); void pnp_unregister_card_driver(struct pnp_card_driver *drv); extern struct list_head pnp_cards; /* resource management */ int pnp_possible_config(struct pnp_dev *dev, int type, resource_size_t base, resource_size_t size); int pnp_auto_config_dev(struct pnp_dev *dev); int pnp_start_dev(struct pnp_dev *dev); int pnp_stop_dev(struct pnp_dev *dev); int pnp_activate_dev(struct pnp_dev *dev); int pnp_disable_dev(struct pnp_dev *dev); int pnp_range_reserved(resource_size_t start, resource_size_t end); /* protocol helpers */ int pnp_is_active(struct pnp_dev *dev); int compare_pnp_id(struct pnp_id *pos, const char *id); int pnp_register_driver(struct pnp_driver *drv); void pnp_unregister_driver(struct pnp_driver *drv); #else /* device management */ static inline int pnp_device_attach(struct pnp_dev *pnp_dev) { return -ENODEV; } static inline void pnp_device_detach(struct pnp_dev *pnp_dev) { } #define pnp_platform_devices 0 /* multidevice card support */ static inline struct pnp_dev *pnp_request_card_device(struct pnp_card_link *clink, const char *id, struct pnp_dev *from) { return NULL; } static inline void pnp_release_card_device(struct pnp_dev *dev) { } static inline int pnp_register_card_driver(struct pnp_card_driver *drv) { return -ENODEV; } static inline void pnp_unregister_card_driver(struct pnp_card_driver *drv) { } /* resource management */ static inline int pnp_possible_config(struct pnp_dev *dev, int type, resource_size_t base, resource_size_t size) { return 0; } static inline int pnp_auto_config_dev(struct pnp_dev *dev) { return -ENODEV; } static inline int pnp_start_dev(struct pnp_dev *dev) { return -ENODEV; } static inline int pnp_stop_dev(struct pnp_dev *dev) { return -ENODEV; } static inline int pnp_activate_dev(struct pnp_dev *dev) { return -ENODEV; } static inline int pnp_disable_dev(struct pnp_dev *dev) { return -ENODEV; } static inline int pnp_range_reserved(resource_size_t start, resource_size_t end) { return 0;} /* protocol helpers */ static inline int pnp_is_active(struct pnp_dev *dev) { return 0; } static inline int compare_pnp_id(struct pnp_id *pos, const char *id) { return -ENODEV; } static inline int pnp_register_driver(struct pnp_driver *drv) { return -ENODEV; } static inline void pnp_unregister_driver(struct pnp_driver *drv) { } #endif /* CONFIG_PNP */ /** * module_pnp_driver() - Helper macro for registering a PnP driver * @__pnp_driver: pnp_driver struct * * Helper macro for PnP drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_pnp_driver(__pnp_driver) \ module_driver(__pnp_driver, pnp_register_driver, \ pnp_unregister_driver) #endif /* _LINUX_PNP_H */ PK ! F��gG G elf-randomize.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ELF_RANDOMIZE_H #define _ELF_RANDOMIZE_H struct mm_struct; #ifndef CONFIG_ARCH_HAS_ELF_RANDOMIZE static inline unsigned long arch_mmap_rnd(void) { return 0; } # if defined(arch_randomize_brk) && defined(CONFIG_COMPAT_BRK) # define compat_brk_randomized # endif # ifndef arch_randomize_brk # define arch_randomize_brk(mm) (mm->brk) # endif #else extern unsigned long arch_mmap_rnd(void); extern unsigned long arch_randomize_brk(struct mm_struct *mm); # ifdef CONFIG_COMPAT_BRK # define compat_brk_randomized # endif #endif #endif PK ! ��dS� � fixp-arith.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _FIXP_ARITH_H #define _FIXP_ARITH_H #include <linux/math64.h> /* * Simplistic fixed-point arithmetics. * Hmm, I'm probably duplicating some code :( * * Copyright (c) 2002 Johann Deneux */ /* * * Should you need to contact me, the author, you can do so by * e-mail - mail your message to <johann.deneux@gmail.com> */ #include <linux/types.h> static const s32 sin_table[] = { 0x00000000, 0x023be165, 0x04779632, 0x06b2f1d2, 0x08edc7b6, 0x0b27eb5c, 0x0d61304d, 0x0f996a26, 0x11d06c96, 0x14060b67, 0x163a1a7d, 0x186c6ddd, 0x1a9cd9ac, 0x1ccb3236, 0x1ef74bf2, 0x2120fb82, 0x234815ba, 0x256c6f9e, 0x278dde6e, 0x29ac379f, 0x2bc750e8, 0x2ddf003f, 0x2ff31bdd, 0x32037a44, 0x340ff241, 0x36185aee, 0x381c8bb5, 0x3a1c5c56, 0x3c17a4e7, 0x3e0e3ddb, 0x3fffffff, 0x41ecc483, 0x43d464fa, 0x45b6bb5d, 0x4793a20f, 0x496af3e1, 0x4b3c8c11, 0x4d084650, 0x4ecdfec6, 0x508d9210, 0x5246dd48, 0x53f9be04, 0x55a6125a, 0x574bb8e5, 0x58ea90c2, 0x5a827999, 0x5c135399, 0x5d9cff82, 0x5f1f5ea0, 0x609a52d1, 0x620dbe8a, 0x637984d3, 0x64dd894f, 0x6639b039, 0x678dde6d, 0x68d9f963, 0x6a1de735, 0x6b598ea1, 0x6c8cd70a, 0x6db7a879, 0x6ed9eba0, 0x6ff389de, 0x71046d3c, 0x720c8074, 0x730baeec, 0x7401e4bf, 0x74ef0ebb, 0x75d31a5f, 0x76adf5e5, 0x777f903b, 0x7847d908, 0x7906c0af, 0x79bc384c, 0x7a6831b8, 0x7b0a9f8c, 0x7ba3751c, 0x7c32a67c, 0x7cb82884, 0x7d33f0c8, 0x7da5f5a3, 0x7e0e2e31, 0x7e6c924f, 0x7ec11aa3, 0x7f0bc095, 0x7f4c7e52, 0x7f834ecf, 0x7fb02dc4, 0x7fd317b3, 0x7fec09e1, 0x7ffb025e, 0x7fffffff }; /** * __fixp_sin32() returns the sin of an angle in degrees * * @degrees: angle, in degrees, from 0 to 360. * * The returned value ranges from -0x7fffffff to +0x7fffffff. */ static inline s32 __fixp_sin32(int degrees) { s32 ret; bool negative = false; if (degrees > 180) { negative = true; degrees -= 180; } if (degrees > 90) degrees = 180 - degrees; ret = sin_table[degrees]; return negative ? -ret : ret; } /** * fixp_sin32() returns the sin of an angle in degrees * * @degrees: angle, in degrees. The angle can be positive or negative * * The returned value ranges from -0x7fffffff to +0x7fffffff. */ static inline s32 fixp_sin32(int degrees) { degrees = (degrees % 360 + 360) % 360; return __fixp_sin32(degrees); } /* cos(x) = sin(x + 90 degrees) */ #define fixp_cos32(v) fixp_sin32((v) + 90) /* * 16 bits variants * * The returned value ranges from -0x7fff to 0x7fff */ #define fixp_sin16(v) (fixp_sin32(v) >> 16) #define fixp_cos16(v) (fixp_cos32(v) >> 16) /** * fixp_sin32_rad() - calculates the sin of an angle in radians * * @radians: angle, in radians * @twopi: value to be used for 2*pi * * Provides a variant for the cases where just 360 * values is not enough. This function uses linear * interpolation to a wider range of values given by * twopi var. * * Experimental tests gave a maximum difference of * 0.000038 between the value calculated by sin() and * the one produced by this function, when twopi is * equal to 360000. That seems to be enough precision * for practical purposes. * * Please notice that two high numbers for twopi could cause * overflows, so the routine will not allow values of twopi * bigger than 1^18. */ static inline s32 fixp_sin32_rad(u32 radians, u32 twopi) { int degrees; s32 v1, v2, dx, dy; s64 tmp; /* * Avoid too large values for twopi, as we don't want overflows. */ BUG_ON(twopi > 1 << 18); degrees = (radians * 360) / twopi; tmp = radians - (degrees * twopi) / 360; degrees = (degrees % 360 + 360) % 360; v1 = __fixp_sin32(degrees); v2 = fixp_sin32(degrees + 1); dx = twopi / 360; dy = v2 - v1; tmp *= dy; return v1 + div_s64(tmp, dx); } /* cos(x) = sin(x + pi/2 radians) */ #define fixp_cos32_rad(rad, twopi) \ fixp_sin32_rad(rad + twopi / 4, twopi) /** * fixp_linear_interpolate() - interpolates a value from two known points * * @x0: x value of point 0 * @y0: y value of point 0 * @x1: x value of point 1 * @y1: y value of point 1 * @x: the linear interpolant */ static inline int fixp_linear_interpolate(int x0, int y0, int x1, int y1, int x) { if (y0 == y1 || x == x0) return y0; if (x1 == x0 || x == x1) return y1; return y0 + ((y1 - y0) * (x - x0) / (x1 - x0)); } #endif PK ! s��6� � rwlock_api_smp.hnu �[��� #ifndef __LINUX_RWLOCK_API_SMP_H #define __LINUX_RWLOCK_API_SMP_H #ifndef __LINUX_SPINLOCK_API_SMP_H # error "please don't include this file directly" #endif /* * include/linux/rwlock_api_smp.h * * spinlock API declarations on SMP (and debug) * (implemented in kernel/spinlock.c) * * portions Copyright 2005, Red Hat, Inc., Ingo Molnar * Released under the General Public License (GPL). */ void __lockfunc _raw_read_lock(rwlock_t *lock) __acquires(lock); void __lockfunc _raw_write_lock(rwlock_t *lock) __acquires(lock); void __lockfunc _raw_read_lock_bh(rwlock_t *lock) __acquires(lock); void __lockfunc _raw_write_lock_bh(rwlock_t *lock) __acquires(lock); void __lockfunc _raw_read_lock_irq(rwlock_t *lock) __acquires(lock); void __lockfunc _raw_write_lock_irq(rwlock_t *lock) __acquires(lock); unsigned long __lockfunc _raw_read_lock_irqsave(rwlock_t *lock) __acquires(lock); unsigned long __lockfunc _raw_write_lock_irqsave(rwlock_t *lock) __acquires(lock); int __lockfunc _raw_read_trylock(rwlock_t *lock); int __lockfunc _raw_write_trylock(rwlock_t *lock); void __lockfunc _raw_read_unlock(rwlock_t *lock) __releases(lock); void __lockfunc _raw_write_unlock(rwlock_t *lock) __releases(lock); void __lockfunc _raw_read_unlock_bh(rwlock_t *lock) __releases(lock); void __lockfunc _raw_write_unlock_bh(rwlock_t *lock) __releases(lock); void __lockfunc _raw_read_unlock_irq(rwlock_t *lock) __releases(lock); void __lockfunc _raw_write_unlock_irq(rwlock_t *lock) __releases(lock); void __lockfunc _raw_read_unlock_irqrestore(rwlock_t *lock, unsigned long flags) __releases(lock); void __lockfunc _raw_write_unlock_irqrestore(rwlock_t *lock, unsigned long flags) __releases(lock); #ifdef CONFIG_INLINE_READ_LOCK #define _raw_read_lock(lock) __raw_read_lock(lock) #endif #ifdef CONFIG_INLINE_WRITE_LOCK #define _raw_write_lock(lock) __raw_write_lock(lock) #endif #ifdef CONFIG_INLINE_READ_LOCK_BH #define _raw_read_lock_bh(lock) __raw_read_lock_bh(lock) #endif #ifdef CONFIG_INLINE_WRITE_LOCK_BH #define _raw_write_lock_bh(lock) __raw_write_lock_bh(lock) #endif #ifdef CONFIG_INLINE_READ_LOCK_IRQ #define _raw_read_lock_irq(lock) __raw_read_lock_irq(lock) #endif #ifdef CONFIG_INLINE_WRITE_LOCK_IRQ #define _raw_write_lock_irq(lock) __raw_write_lock_irq(lock) #endif #ifdef CONFIG_INLINE_READ_LOCK_IRQSAVE #define _raw_read_lock_irqsave(lock) __raw_read_lock_irqsave(lock) #endif #ifdef CONFIG_INLINE_WRITE_LOCK_IRQSAVE #define _raw_write_lock_irqsave(lock) __raw_write_lock_irqsave(lock) #endif #ifdef CONFIG_INLINE_READ_TRYLOCK #define _raw_read_trylock(lock) __raw_read_trylock(lock) #endif #ifdef CONFIG_INLINE_WRITE_TRYLOCK #define _raw_write_trylock(lock) __raw_write_trylock(lock) #endif #ifdef CONFIG_INLINE_READ_UNLOCK #define _raw_read_unlock(lock) __raw_read_unlock(lock) #endif #ifdef CONFIG_INLINE_WRITE_UNLOCK #define _raw_write_unlock(lock) __raw_write_unlock(lock) #endif #ifdef CONFIG_INLINE_READ_UNLOCK_BH #define _raw_read_unlock_bh(lock) __raw_read_unlock_bh(lock) #endif #ifdef CONFIG_INLINE_WRITE_UNLOCK_BH #define _raw_write_unlock_bh(lock) __raw_write_unlock_bh(lock) #endif #ifdef CONFIG_INLINE_READ_UNLOCK_IRQ #define _raw_read_unlock_irq(lock) __raw_read_unlock_irq(lock) #endif #ifdef CONFIG_INLINE_WRITE_UNLOCK_IRQ #define _raw_write_unlock_irq(lock) __raw_write_unlock_irq(lock) #endif #ifdef CONFIG_INLINE_READ_UNLOCK_IRQRESTORE #define _raw_read_unlock_irqrestore(lock, flags) \ __raw_read_unlock_irqrestore(lock, flags) #endif #ifdef CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE #define _raw_write_unlock_irqrestore(lock, flags) \ __raw_write_unlock_irqrestore(lock, flags) #endif static inline int __raw_read_trylock(rwlock_t *lock) { preempt_disable(); if (do_raw_read_trylock(lock)) { rwlock_acquire_read(&lock->dep_map, 0, 1, _RET_IP_); return 1; } preempt_enable(); return 0; } static inline int __raw_write_trylock(rwlock_t *lock) { preempt_disable(); if (do_raw_write_trylock(lock)) { rwlock_acquire(&lock->dep_map, 0, 1, _RET_IP_); return 1; } preempt_enable(); return 0; } /* * If lockdep is enabled then we use the non-preemption spin-ops * even on CONFIG_PREEMPT, because lockdep assumes that interrupts are * not re-enabled during lock-acquire (which the preempt-spin-ops do): */ #if !defined(CONFIG_GENERIC_LOCKBREAK) || defined(CONFIG_DEBUG_LOCK_ALLOC) static inline void __raw_read_lock(rwlock_t *lock) { preempt_disable(); rwlock_acquire_read(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_read_trylock, do_raw_read_lock); } static inline unsigned long __raw_read_lock_irqsave(rwlock_t *lock) { unsigned long flags; local_irq_save(flags); preempt_disable(); rwlock_acquire_read(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED_FLAGS(lock, do_raw_read_trylock, do_raw_read_lock, do_raw_read_lock_flags, &flags); return flags; } static inline void __raw_read_lock_irq(rwlock_t *lock) { local_irq_disable(); preempt_disable(); rwlock_acquire_read(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_read_trylock, do_raw_read_lock); } static inline void __raw_read_lock_bh(rwlock_t *lock) { __local_bh_disable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); rwlock_acquire_read(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_read_trylock, do_raw_read_lock); } static inline unsigned long __raw_write_lock_irqsave(rwlock_t *lock) { unsigned long flags; local_irq_save(flags); preempt_disable(); rwlock_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED_FLAGS(lock, do_raw_write_trylock, do_raw_write_lock, do_raw_write_lock_flags, &flags); return flags; } static inline void __raw_write_lock_irq(rwlock_t *lock) { local_irq_disable(); preempt_disable(); rwlock_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_write_trylock, do_raw_write_lock); } static inline void __raw_write_lock_bh(rwlock_t *lock) { __local_bh_disable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); rwlock_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_write_trylock, do_raw_write_lock); } static inline void __raw_write_lock(rwlock_t *lock) { preempt_disable(); rwlock_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_write_trylock, do_raw_write_lock); } #endif /* !CONFIG_GENERIC_LOCKBREAK || CONFIG_DEBUG_LOCK_ALLOC */ static inline void __raw_write_unlock(rwlock_t *lock) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_write_unlock(lock); preempt_enable(); } static inline void __raw_read_unlock(rwlock_t *lock) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_read_unlock(lock); preempt_enable(); } static inline void __raw_read_unlock_irqrestore(rwlock_t *lock, unsigned long flags) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_read_unlock(lock); local_irq_restore(flags); preempt_enable(); } static inline void __raw_read_unlock_irq(rwlock_t *lock) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_read_unlock(lock); local_irq_enable(); preempt_enable(); } static inline void __raw_read_unlock_bh(rwlock_t *lock) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_read_unlock(lock); __local_bh_enable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); } static inline void __raw_write_unlock_irqrestore(rwlock_t *lock, unsigned long flags) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_write_unlock(lock); local_irq_restore(flags); preempt_enable(); } static inline void __raw_write_unlock_irq(rwlock_t *lock) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_write_unlock(lock); local_irq_enable(); preempt_enable(); } static inline void __raw_write_unlock_bh(rwlock_t *lock) { rwlock_release(&lock->dep_map, _RET_IP_); do_raw_write_unlock(lock); __local_bh_enable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); } #endif /* __LINUX_RWLOCK_API_SMP_H */ PK ! �����@ �@ pe.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2011 Red Hat, Inc. * All rights reserved. * * Author(s): Peter Jones <pjones@redhat.com> */ #ifndef __LINUX_PE_H #define __LINUX_PE_H #include <linux/types.h> /* * Linux EFI stub v1.0 adds the following functionality: * - Loading initrd from the LINUX_EFI_INITRD_MEDIA_GUID device path, * - Loading/starting the kernel from firmware that targets a different * machine type, via the entrypoint exposed in the .compat PE/COFF section. * * The recommended way of loading and starting v1.0 or later kernels is to use * the LoadImage() and StartImage() EFI boot services, and expose the initrd * via the LINUX_EFI_INITRD_MEDIA_GUID device path. * * Versions older than v1.0 support initrd loading via the image load options * (using initrd=, limited to the volume from which the kernel itself was * loaded), or via arch specific means (bootparams, DT, etc). * * On x86, LoadImage() and StartImage() can be omitted if the EFI handover * protocol is implemented, which can be inferred from the version, * handover_offset and xloadflags fields in the bootparams structure. */ #define LINUX_EFISTUB_MAJOR_VERSION 0x1 #define LINUX_EFISTUB_MINOR_VERSION 0x0 #define MZ_MAGIC 0x5a4d /* "MZ" */ #define PE_MAGIC 0x00004550 /* "PE\0\0" */ #define PE_OPT_MAGIC_PE32 0x010b #define PE_OPT_MAGIC_PE32_ROM 0x0107 #define PE_OPT_MAGIC_PE32PLUS 0x020b /* machine type */ #define IMAGE_FILE_MACHINE_UNKNOWN 0x0000 #define IMAGE_FILE_MACHINE_AM33 0x01d3 #define IMAGE_FILE_MACHINE_AMD64 0x8664 #define IMAGE_FILE_MACHINE_ARM 0x01c0 #define IMAGE_FILE_MACHINE_ARMV7 0x01c4 #define IMAGE_FILE_MACHINE_ARM64 0xaa64 #define IMAGE_FILE_MACHINE_EBC 0x0ebc #define IMAGE_FILE_MACHINE_I386 0x014c #define IMAGE_FILE_MACHINE_IA64 0x0200 #define IMAGE_FILE_MACHINE_M32R 0x9041 #define IMAGE_FILE_MACHINE_MIPS16 0x0266 #define IMAGE_FILE_MACHINE_MIPSFPU 0x0366 #define IMAGE_FILE_MACHINE_MIPSFPU16 0x0466 #define IMAGE_FILE_MACHINE_POWERPC 0x01f0 #define IMAGE_FILE_MACHINE_POWERPCFP 0x01f1 #define IMAGE_FILE_MACHINE_R4000 0x0166 #define IMAGE_FILE_MACHINE_RISCV32 0x5032 #define IMAGE_FILE_MACHINE_RISCV64 0x5064 #define IMAGE_FILE_MACHINE_RISCV128 0x5128 #define IMAGE_FILE_MACHINE_SH3 0x01a2 #define IMAGE_FILE_MACHINE_SH3DSP 0x01a3 #define IMAGE_FILE_MACHINE_SH3E 0x01a4 #define IMAGE_FILE_MACHINE_SH4 0x01a6 #define IMAGE_FILE_MACHINE_SH5 0x01a8 #define IMAGE_FILE_MACHINE_THUMB 0x01c2 #define IMAGE_FILE_MACHINE_WCEMIPSV2 0x0169 /* flags */ #define IMAGE_FILE_RELOCS_STRIPPED 0x0001 #define IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 #define IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 #define IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 #define IMAGE_FILE_AGGRESSIVE_WS_TRIM 0x0010 #define IMAGE_FILE_LARGE_ADDRESS_AWARE 0x0020 #define IMAGE_FILE_16BIT_MACHINE 0x0040 #define IMAGE_FILE_BYTES_REVERSED_LO 0x0080 #define IMAGE_FILE_32BIT_MACHINE 0x0100 #define IMAGE_FILE_DEBUG_STRIPPED 0x0200 #define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP 0x0400 #define IMAGE_FILE_NET_RUN_FROM_SWAP 0x0800 #define IMAGE_FILE_SYSTEM 0x1000 #define IMAGE_FILE_DLL 0x2000 #define IMAGE_FILE_UP_SYSTEM_ONLY 0x4000 #define IMAGE_FILE_BYTES_REVERSED_HI 0x8000 #define IMAGE_FILE_OPT_ROM_MAGIC 0x107 #define IMAGE_FILE_OPT_PE32_MAGIC 0x10b #define IMAGE_FILE_OPT_PE32_PLUS_MAGIC 0x20b #define IMAGE_SUBSYSTEM_UNKNOWN 0 #define IMAGE_SUBSYSTEM_NATIVE 1 #define IMAGE_SUBSYSTEM_WINDOWS_GUI 2 #define IMAGE_SUBSYSTEM_WINDOWS_CUI 3 #define IMAGE_SUBSYSTEM_POSIX_CUI 7 #define IMAGE_SUBSYSTEM_WINDOWS_CE_GUI 9 #define IMAGE_SUBSYSTEM_EFI_APPLICATION 10 #define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 #define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12 #define IMAGE_SUBSYSTEM_EFI_ROM_IMAGE 13 #define IMAGE_SUBSYSTEM_XBOX 14 #define IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE 0x0040 #define IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY 0x0080 #define IMAGE_DLL_CHARACTERISTICS_NX_COMPAT 0x0100 #define IMAGE_DLLCHARACTERISTICS_NO_ISOLATION 0x0200 #define IMAGE_DLLCHARACTERISTICS_NO_SEH 0x0400 #define IMAGE_DLLCHARACTERISTICS_NO_BIND 0x0800 #define IMAGE_DLLCHARACTERISTICS_WDM_DRIVER 0x2000 #define IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE 0x8000 /* they actually defined 0x00000000 as well, but I think we'll skip that one. */ #define IMAGE_SCN_RESERVED_0 0x00000001 #define IMAGE_SCN_RESERVED_1 0x00000002 #define IMAGE_SCN_RESERVED_2 0x00000004 #define IMAGE_SCN_TYPE_NO_PAD 0x00000008 /* don't pad - obsolete */ #define IMAGE_SCN_RESERVED_3 0x00000010 #define IMAGE_SCN_CNT_CODE 0x00000020 /* .text */ #define IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040 /* .data */ #define IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080 /* .bss */ #define IMAGE_SCN_LNK_OTHER 0x00000100 /* reserved */ #define IMAGE_SCN_LNK_INFO 0x00000200 /* .drectve comments */ #define IMAGE_SCN_RESERVED_4 0x00000400 #define IMAGE_SCN_LNK_REMOVE 0x00000800 /* .o only - scn to be rm'd*/ #define IMAGE_SCN_LNK_COMDAT 0x00001000 /* .o only - COMDAT data */ #define IMAGE_SCN_RESERVED_5 0x00002000 /* spec omits this */ #define IMAGE_SCN_RESERVED_6 0x00004000 /* spec omits this */ #define IMAGE_SCN_GPREL 0x00008000 /* global pointer referenced data */ /* spec lists 0x20000 twice, I suspect they meant 0x10000 for one of them */ #define IMAGE_SCN_MEM_PURGEABLE 0x00010000 /* reserved for "future" use */ #define IMAGE_SCN_16BIT 0x00020000 /* reserved for "future" use */ #define IMAGE_SCN_LOCKED 0x00040000 /* reserved for "future" use */ #define IMAGE_SCN_PRELOAD 0x00080000 /* reserved for "future" use */ /* and here they just stuck a 1-byte integer in the middle of a bitfield */ #define IMAGE_SCN_ALIGN_1BYTES 0x00100000 /* it does what it says on the box */ #define IMAGE_SCN_ALIGN_2BYTES 0x00200000 #define IMAGE_SCN_ALIGN_4BYTES 0x00300000 #define IMAGE_SCN_ALIGN_8BYTES 0x00400000 #define IMAGE_SCN_ALIGN_16BYTES 0x00500000 #define IMAGE_SCN_ALIGN_32BYTES 0x00600000 #define IMAGE_SCN_ALIGN_64BYTES 0x00700000 #define IMAGE_SCN_ALIGN_128BYTES 0x00800000 #define IMAGE_SCN_ALIGN_256BYTES 0x00900000 #define IMAGE_SCN_ALIGN_512BYTES 0x00a00000 #define IMAGE_SCN_ALIGN_1024BYTES 0x00b00000 #define IMAGE_SCN_ALIGN_2048BYTES 0x00c00000 #define IMAGE_SCN_ALIGN_4096BYTES 0x00d00000 #define IMAGE_SCN_ALIGN_8192BYTES 0x00e00000 #define IMAGE_SCN_LNK_NRELOC_OVFL 0x01000000 /* extended relocations */ #define IMAGE_SCN_MEM_DISCARDABLE 0x02000000 /* scn can be discarded */ #define IMAGE_SCN_MEM_NOT_CACHED 0x04000000 /* cannot be cached */ #define IMAGE_SCN_MEM_NOT_PAGED 0x08000000 /* not pageable */ #define IMAGE_SCN_MEM_SHARED 0x10000000 /* can be shared */ #define IMAGE_SCN_MEM_EXECUTE 0x20000000 /* can be executed as code */ #define IMAGE_SCN_MEM_READ 0x40000000 /* readable */ #define IMAGE_SCN_MEM_WRITE 0x80000000 /* writeable */ #define IMAGE_DEBUG_TYPE_CODEVIEW 2 #ifndef __ASSEMBLY__ struct mz_hdr { uint16_t magic; /* MZ_MAGIC */ uint16_t lbsize; /* size of last used block */ uint16_t blocks; /* pages in file, 0x3 */ uint16_t relocs; /* relocations */ uint16_t hdrsize; /* header size in "paragraphs" */ uint16_t min_extra_pps; /* .bss */ uint16_t max_extra_pps; /* runtime limit for the arena size */ uint16_t ss; /* relative stack segment */ uint16_t sp; /* initial %sp register */ uint16_t checksum; /* word checksum */ uint16_t ip; /* initial %ip register */ uint16_t cs; /* initial %cs relative to load segment */ uint16_t reloc_table_offset; /* offset of the first relocation */ uint16_t overlay_num; /* overlay number. set to 0. */ uint16_t reserved0[4]; /* reserved */ uint16_t oem_id; /* oem identifier */ uint16_t oem_info; /* oem specific */ uint16_t reserved1[10]; /* reserved */ uint32_t peaddr; /* address of pe header */ char message[]; /* message to print */ }; struct mz_reloc { uint16_t offset; uint16_t segment; }; struct pe_hdr { uint32_t magic; /* PE magic */ uint16_t machine; /* machine type */ uint16_t sections; /* number of sections */ uint32_t timestamp; /* time_t */ uint32_t symbol_table; /* symbol table offset */ uint32_t symbols; /* number of symbols */ uint16_t opt_hdr_size; /* size of optional header */ uint16_t flags; /* flags */ }; /* the fact that pe32 isn't padded where pe32+ is 64-bit means union won't * work right. vomit. */ struct pe32_opt_hdr { /* "standard" header */ uint16_t magic; /* file type */ uint8_t ld_major; /* linker major version */ uint8_t ld_minor; /* linker minor version */ uint32_t text_size; /* size of text section(s) */ uint32_t data_size; /* size of data section(s) */ uint32_t bss_size; /* size of bss section(s) */ uint32_t entry_point; /* file offset of entry point */ uint32_t code_base; /* relative code addr in ram */ uint32_t data_base; /* relative data addr in ram */ /* "windows" header */ uint32_t image_base; /* preferred load address */ uint32_t section_align; /* alignment in bytes */ uint32_t file_align; /* file alignment in bytes */ uint16_t os_major; /* major OS version */ uint16_t os_minor; /* minor OS version */ uint16_t image_major; /* major image version */ uint16_t image_minor; /* minor image version */ uint16_t subsys_major; /* major subsystem version */ uint16_t subsys_minor; /* minor subsystem version */ uint32_t win32_version; /* reserved, must be 0 */ uint32_t image_size; /* image size */ uint32_t header_size; /* header size rounded up to file_align */ uint32_t csum; /* checksum */ uint16_t subsys; /* subsystem */ uint16_t dll_flags; /* more flags! */ uint32_t stack_size_req;/* amt of stack requested */ uint32_t stack_size; /* amt of stack required */ uint32_t heap_size_req; /* amt of heap requested */ uint32_t heap_size; /* amt of heap required */ uint32_t loader_flags; /* reserved, must be 0 */ uint32_t data_dirs; /* number of data dir entries */ }; struct pe32plus_opt_hdr { uint16_t magic; /* file type */ uint8_t ld_major; /* linker major version */ uint8_t ld_minor; /* linker minor version */ uint32_t text_size; /* size of text section(s) */ uint32_t data_size; /* size of data section(s) */ uint32_t bss_size; /* size of bss section(s) */ uint32_t entry_point; /* file offset of entry point */ uint32_t code_base; /* relative code addr in ram */ /* "windows" header */ uint64_t image_base; /* preferred load address */ uint32_t section_align; /* alignment in bytes */ uint32_t file_align; /* file alignment in bytes */ uint16_t os_major; /* major OS version */ uint16_t os_minor; /* minor OS version */ uint16_t image_major; /* major image version */ uint16_t image_minor; /* minor image version */ uint16_t subsys_major; /* major subsystem version */ uint16_t subsys_minor; /* minor subsystem version */ uint32_t win32_version; /* reserved, must be 0 */ uint32_t image_size; /* image size */ uint32_t header_size; /* header size rounded up to file_align */ uint32_t csum; /* checksum */ uint16_t subsys; /* subsystem */ uint16_t dll_flags; /* more flags! */ uint64_t stack_size_req;/* amt of stack requested */ uint64_t stack_size; /* amt of stack required */ uint64_t heap_size_req; /* amt of heap requested */ uint64_t heap_size; /* amt of heap required */ uint32_t loader_flags; /* reserved, must be 0 */ uint32_t data_dirs; /* number of data dir entries */ }; struct data_dirent { uint32_t virtual_address; /* relative to load address */ uint32_t size; }; struct data_directory { struct data_dirent exports; /* .edata */ struct data_dirent imports; /* .idata */ struct data_dirent resources; /* .rsrc */ struct data_dirent exceptions; /* .pdata */ struct data_dirent certs; /* certs */ struct data_dirent base_relocations; /* .reloc */ struct data_dirent debug; /* .debug */ struct data_dirent arch; /* reservered */ struct data_dirent global_ptr; /* global pointer reg. Size=0 */ struct data_dirent tls; /* .tls */ struct data_dirent load_config; /* load configuration structure */ struct data_dirent bound_imports; /* no idea */ struct data_dirent import_addrs; /* import address table */ struct data_dirent delay_imports; /* delay-load import table */ struct data_dirent clr_runtime_hdr; /* .cor (object only) */ struct data_dirent reserved; }; struct section_header { char name[8]; /* name or "/12\0" string tbl offset */ uint32_t virtual_size; /* size of loaded section in ram */ uint32_t virtual_address; /* relative virtual address */ uint32_t raw_data_size; /* size of the section */ uint32_t data_addr; /* file pointer to first page of sec */ uint32_t relocs; /* file pointer to relocation entries */ uint32_t line_numbers; /* line numbers! */ uint16_t num_relocs; /* number of relocations */ uint16_t num_lin_numbers; /* srsly. */ uint32_t flags; }; enum x64_coff_reloc_type { IMAGE_REL_AMD64_ABSOLUTE = 0, IMAGE_REL_AMD64_ADDR64, IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32N, IMAGE_REL_AMD64_REL32, IMAGE_REL_AMD64_REL32_1, IMAGE_REL_AMD64_REL32_2, IMAGE_REL_AMD64_REL32_3, IMAGE_REL_AMD64_REL32_4, IMAGE_REL_AMD64_REL32_5, IMAGE_REL_AMD64_SECTION, IMAGE_REL_AMD64_SECREL, IMAGE_REL_AMD64_SECREL7, IMAGE_REL_AMD64_TOKEN, IMAGE_REL_AMD64_SREL32, IMAGE_REL_AMD64_PAIR, IMAGE_REL_AMD64_SSPAN32, }; enum arm_coff_reloc_type { IMAGE_REL_ARM_ABSOLUTE, IMAGE_REL_ARM_ADDR32, IMAGE_REL_ARM_ADDR32N, IMAGE_REL_ARM_BRANCH2, IMAGE_REL_ARM_BRANCH1, IMAGE_REL_ARM_SECTION, IMAGE_REL_ARM_SECREL, }; enum sh_coff_reloc_type { IMAGE_REL_SH3_ABSOLUTE, IMAGE_REL_SH3_DIRECT16, IMAGE_REL_SH3_DIRECT32, IMAGE_REL_SH3_DIRECT8, IMAGE_REL_SH3_DIRECT8_WORD, IMAGE_REL_SH3_DIRECT8_LONG, IMAGE_REL_SH3_DIRECT4, IMAGE_REL_SH3_DIRECT4_WORD, IMAGE_REL_SH3_DIRECT4_LONG, IMAGE_REL_SH3_PCREL8_WORD, IMAGE_REL_SH3_PCREL8_LONG, IMAGE_REL_SH3_PCREL12_WORD, IMAGE_REL_SH3_STARTOF_SECTION, IMAGE_REL_SH3_SIZEOF_SECTION, IMAGE_REL_SH3_SECTION, IMAGE_REL_SH3_SECREL, IMAGE_REL_SH3_DIRECT32_NB, IMAGE_REL_SH3_GPREL4_LONG, IMAGE_REL_SH3_TOKEN, IMAGE_REL_SHM_PCRELPT, IMAGE_REL_SHM_REFLO, IMAGE_REL_SHM_REFHALF, IMAGE_REL_SHM_RELLO, IMAGE_REL_SHM_RELHALF, IMAGE_REL_SHM_PAIR, IMAGE_REL_SHM_NOMODE, }; enum ppc_coff_reloc_type { IMAGE_REL_PPC_ABSOLUTE, IMAGE_REL_PPC_ADDR64, IMAGE_REL_PPC_ADDR32, IMAGE_REL_PPC_ADDR24, IMAGE_REL_PPC_ADDR16, IMAGE_REL_PPC_ADDR14, IMAGE_REL_PPC_REL24, IMAGE_REL_PPC_REL14, IMAGE_REL_PPC_ADDR32N, IMAGE_REL_PPC_SECREL, IMAGE_REL_PPC_SECTION, IMAGE_REL_PPC_SECREL16, IMAGE_REL_PPC_REFHI, IMAGE_REL_PPC_REFLO, IMAGE_REL_PPC_PAIR, IMAGE_REL_PPC_SECRELLO, IMAGE_REL_PPC_GPREL, IMAGE_REL_PPC_TOKEN, }; enum x86_coff_reloc_type { IMAGE_REL_I386_ABSOLUTE, IMAGE_REL_I386_DIR16, IMAGE_REL_I386_REL16, IMAGE_REL_I386_DIR32, IMAGE_REL_I386_DIR32NB, IMAGE_REL_I386_SEG12, IMAGE_REL_I386_SECTION, IMAGE_REL_I386_SECREL, IMAGE_REL_I386_TOKEN, IMAGE_REL_I386_SECREL7, IMAGE_REL_I386_REL32, }; enum ia64_coff_reloc_type { IMAGE_REL_IA64_ABSOLUTE, IMAGE_REL_IA64_IMM14, IMAGE_REL_IA64_IMM22, IMAGE_REL_IA64_IMM64, IMAGE_REL_IA64_DIR32, IMAGE_REL_IA64_DIR64, IMAGE_REL_IA64_PCREL21B, IMAGE_REL_IA64_PCREL21M, IMAGE_REL_IA64_PCREL21F, IMAGE_REL_IA64_GPREL22, IMAGE_REL_IA64_LTOFF22, IMAGE_REL_IA64_SECTION, IMAGE_REL_IA64_SECREL22, IMAGE_REL_IA64_SECREL64I, IMAGE_REL_IA64_SECREL32, IMAGE_REL_IA64_DIR32NB, IMAGE_REL_IA64_SREL14, IMAGE_REL_IA64_SREL22, IMAGE_REL_IA64_SREL32, IMAGE_REL_IA64_UREL32, IMAGE_REL_IA64_PCREL60X, IMAGE_REL_IA64_PCREL60B, IMAGE_REL_IA64_PCREL60F, IMAGE_REL_IA64_PCREL60I, IMAGE_REL_IA64_PCREL60M, IMAGE_REL_IA64_IMMGPREL6, IMAGE_REL_IA64_TOKEN, IMAGE_REL_IA64_GPREL32, IMAGE_REL_IA64_ADDEND, }; struct coff_reloc { uint32_t virtual_address; uint32_t symbol_table_index; union { enum x64_coff_reloc_type x64_type; enum arm_coff_reloc_type arm_type; enum sh_coff_reloc_type sh_type; enum ppc_coff_reloc_type ppc_type; enum x86_coff_reloc_type x86_type; enum ia64_coff_reloc_type ia64_type; uint16_t data; }; }; /* * Definitions for the contents of the certs data block */ #define WIN_CERT_TYPE_PKCS_SIGNED_DATA 0x0002 #define WIN_CERT_TYPE_EFI_OKCS115 0x0EF0 #define WIN_CERT_TYPE_EFI_GUID 0x0EF1 #define WIN_CERT_REVISION_1_0 0x0100 #define WIN_CERT_REVISION_2_0 0x0200 struct win_certificate { uint32_t length; uint16_t revision; uint16_t cert_type; }; #endif /* !__ASSEMBLY__ */ #endif /* __LINUX_PE_H */ PK ! O&�m fcdevice.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. NET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Definitions for the Fibre Channel handlers. * * Version: @(#)fcdevice.h 1.0.0 09/26/98 * * Authors: Vineet Abraham <vma@iol.unh.edu> * * Relocated to include/linux where it belongs by Alan Cox * <gw4pts@gw4pts.ampr.org> * * WARNING: This move may well be temporary. This file will get merged with others RSN. */ #ifndef _LINUX_FCDEVICE_H #define _LINUX_FCDEVICE_H #include <linux/if_fc.h> #ifdef __KERNEL__ struct net_device *alloc_fcdev(int sizeof_priv); #endif #endif /* _LINUX_FCDEVICE_H */ PK ! �Z�� � pfn.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PFN_H_ #define _LINUX_PFN_H_ #ifndef __ASSEMBLY__ #include <linux/types.h> /* * pfn_t: encapsulates a page-frame number that is optionally backed * by memmap (struct page). Whether a pfn_t has a 'struct page' * backing is indicated by flags in the high bits of the value. */ typedef struct { u64 val; } pfn_t; #endif #define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK) #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) #define PFN_PHYS(x) ((phys_addr_t)(x) << PAGE_SHIFT) #define PHYS_PFN(x) ((unsigned long)((x) >> PAGE_SHIFT)) #endif PK ! b|�" lis3lv02d.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LIS3LV02D_H_ #define __LIS3LV02D_H_ /** * struct lis3lv02d_platform_data - lis3 chip family platform data * @click_flags: Click detection unit configuration * @click_thresh_x: Click detection unit x axis threshold * @click_thresh_y: Click detection unit y axis threshold * @click_thresh_z: Click detection unit z axis threshold * @click_time_limit: Click detection unit time parameter * @click_latency: Click detection unit latency parameter * @click_window: Click detection unit window parameter * @irq_cfg: On chip irq source and type configuration (click / * data available / wake up, open drain, polarity) * @irq_flags1: Additional irq triggering flags for irq channel 0 * @irq_flags2: Additional irq triggering flags for irq channel 1 * @duration1: Wake up unit 1 duration parameter * @duration2: Wake up unit 2 duration parameter * @wakeup_flags: Wake up unit 1 flags * @wakeup_thresh: Wake up unit 1 threshold value * @wakeup_flags2: Wake up unit 2 flags * @wakeup_thresh2: Wake up unit 2 threshold value * @hipass_ctrl: High pass filter control (enable / disable, cut off * frequency) * @axis_x: Sensor orientation remapping for x-axis * @axis_y: Sensor orientation remapping for y-axis * @axis_z: Sensor orientation remapping for z-axis * @driver_features: Enable bits for different features. Disabled by default * @default_rate: Default sampling rate. 0 means reset default * @setup_resources: Interrupt line setup call back function * @release_resources: Interrupt line release call back function * @st_min_limits[3]: Selftest acceptance minimum values * @st_max_limits[3]: Selftest acceptance maximum values * @irq2: Irq line 2 number * * Platform data is used to setup the sensor chip. Meaning of the different * chip features can be found from the data sheet. It is publicly available * at www.st.com web pages. Currently the platform data is used * only for the 8 bit device. The 8 bit device has two wake up / free fall * detection units and click detection unit. There are plenty of ways to * configure the chip which makes is quite hard to explain deeper meaning of * the fields here. Behaviour of the detection blocks varies heavily depending * on the configuration. For example, interrupt detection block can use high * pass filtered data which makes it react to the changes in the acceleration. * Irq_flags can be used to enable interrupt detection on the both edges. * With proper chip configuration this produces interrupt when some trigger * starts and when it goes away. */ struct lis3lv02d_platform_data { /* please note: the 'click' feature is only supported for * LIS[32]02DL variants of the chip and will be ignored for * others */ #define LIS3_CLICK_SINGLE_X (1 << 0) #define LIS3_CLICK_DOUBLE_X (1 << 1) #define LIS3_CLICK_SINGLE_Y (1 << 2) #define LIS3_CLICK_DOUBLE_Y (1 << 3) #define LIS3_CLICK_SINGLE_Z (1 << 4) #define LIS3_CLICK_DOUBLE_Z (1 << 5) unsigned char click_flags; unsigned char click_thresh_x; unsigned char click_thresh_y; unsigned char click_thresh_z; unsigned char click_time_limit; unsigned char click_latency; unsigned char click_window; #define LIS3_IRQ1_DISABLE (0 << 0) #define LIS3_IRQ1_FF_WU_1 (1 << 0) #define LIS3_IRQ1_FF_WU_2 (2 << 0) #define LIS3_IRQ1_FF_WU_12 (3 << 0) #define LIS3_IRQ1_DATA_READY (4 << 0) #define LIS3_IRQ1_CLICK (7 << 0) #define LIS3_IRQ1_MASK (7 << 0) #define LIS3_IRQ2_DISABLE (0 << 3) #define LIS3_IRQ2_FF_WU_1 (1 << 3) #define LIS3_IRQ2_FF_WU_2 (2 << 3) #define LIS3_IRQ2_FF_WU_12 (3 << 3) #define LIS3_IRQ2_DATA_READY (4 << 3) #define LIS3_IRQ2_CLICK (7 << 3) #define LIS3_IRQ2_MASK (7 << 3) #define LIS3_IRQ_OPEN_DRAIN (1 << 6) #define LIS3_IRQ_ACTIVE_LOW (1 << 7) unsigned char irq_cfg; unsigned char irq_flags1; /* Additional irq edge / level flags */ unsigned char irq_flags2; /* Additional irq edge / level flags */ unsigned char duration1; unsigned char duration2; #define LIS3_WAKEUP_X_LO (1 << 0) #define LIS3_WAKEUP_X_HI (1 << 1) #define LIS3_WAKEUP_Y_LO (1 << 2) #define LIS3_WAKEUP_Y_HI (1 << 3) #define LIS3_WAKEUP_Z_LO (1 << 4) #define LIS3_WAKEUP_Z_HI (1 << 5) unsigned char wakeup_flags; unsigned char wakeup_thresh; unsigned char wakeup_flags2; unsigned char wakeup_thresh2; #define LIS3_HIPASS_CUTFF_8HZ 0 #define LIS3_HIPASS_CUTFF_4HZ 1 #define LIS3_HIPASS_CUTFF_2HZ 2 #define LIS3_HIPASS_CUTFF_1HZ 3 #define LIS3_HIPASS1_DISABLE (1 << 2) #define LIS3_HIPASS2_DISABLE (1 << 3) unsigned char hipass_ctrl; #define LIS3_NO_MAP 0 #define LIS3_DEV_X 1 #define LIS3_DEV_Y 2 #define LIS3_DEV_Z 3 #define LIS3_INV_DEV_X -1 #define LIS3_INV_DEV_Y -2 #define LIS3_INV_DEV_Z -3 s8 axis_x; s8 axis_y; s8 axis_z; #define LIS3_USE_BLOCK_READ 0x02 u16 driver_features; int default_rate; int (*setup_resources)(void); int (*release_resources)(void); /* Limits for selftest are specified in chip data sheet */ s16 st_min_limits[3]; /* min pass limit x, y, z */ s16 st_max_limits[3]; /* max pass limit x, y, z */ int irq2; }; #endif /* __LIS3LV02D_H_ */ PK ! ��i� � olpc-ec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_OLPC_EC_H #define _LINUX_OLPC_EC_H #include <linux/bits.h> /* XO-1 EC commands */ #define EC_FIRMWARE_REV 0x08 #define EC_WRITE_SCI_MASK 0x1b #define EC_WAKE_UP_WLAN 0x24 #define EC_WLAN_LEAVE_RESET 0x25 #define EC_DCON_POWER_MODE 0x26 #define EC_READ_EB_MODE 0x2a #define EC_SET_SCI_INHIBIT 0x32 #define EC_SET_SCI_INHIBIT_RELEASE 0x34 #define EC_WLAN_ENTER_RESET 0x35 #define EC_WRITE_EXT_SCI_MASK 0x38 #define EC_SCI_QUERY 0x84 #define EC_EXT_SCI_QUERY 0x85 /* SCI source values */ #define EC_SCI_SRC_GAME BIT(0) #define EC_SCI_SRC_BATTERY BIT(1) #define EC_SCI_SRC_BATSOC BIT(2) #define EC_SCI_SRC_BATERR BIT(3) #define EC_SCI_SRC_EBOOK BIT(4) /* XO-1 only */ #define EC_SCI_SRC_WLAN BIT(5) /* XO-1 only */ #define EC_SCI_SRC_ACPWR BIT(6) #define EC_SCI_SRC_BATCRIT BIT(7) #define EC_SCI_SRC_GPWAKE BIT(8) /* XO-1.5 only */ #define EC_SCI_SRC_ALL GENMASK(8, 0) struct platform_device; struct olpc_ec_driver { int (*suspend)(struct platform_device *); int (*resume)(struct platform_device *); int (*ec_cmd)(u8, u8 *, size_t, u8 *, size_t, void *); bool wakeup_available; }; #ifdef CONFIG_OLPC_EC extern void olpc_ec_driver_register(struct olpc_ec_driver *drv, void *arg); extern int olpc_ec_cmd(u8 cmd, u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen); extern void olpc_ec_wakeup_set(u16 value); extern void olpc_ec_wakeup_clear(u16 value); extern int olpc_ec_mask_write(u16 bits); extern int olpc_ec_sci_query(u16 *sci_value); extern bool olpc_ec_wakeup_available(void); #else static inline int olpc_ec_cmd(u8 cmd, u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen) { return -ENODEV; } static inline void olpc_ec_wakeup_set(u16 value) { } static inline void olpc_ec_wakeup_clear(u16 value) { } static inline bool olpc_ec_wakeup_available(void) { return false; } #endif /* CONFIG_OLPC_EC */ #endif /* _LINUX_OLPC_EC_H */ PK ! �f'�H H serial_8250.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * linux/include/linux/serial_8250.h * * Copyright (C) 2004 Russell King */ #ifndef _LINUX_SERIAL_8250_H #define _LINUX_SERIAL_8250_H #include <linux/serial_core.h> #include <linux/serial_reg.h> #include <linux/platform_device.h> /* * This is the platform device platform_data structure */ struct plat_serial8250_port { unsigned long iobase; /* io base address */ void __iomem *membase; /* ioremap cookie or NULL */ resource_size_t mapbase; /* resource base */ unsigned int irq; /* interrupt number */ unsigned long irqflags; /* request_irq flags */ unsigned int uartclk; /* UART clock rate */ void *private_data; unsigned char regshift; /* register shift */ unsigned char iotype; /* UPIO_* */ unsigned char hub6; unsigned char has_sysrq; /* supports magic SysRq */ upf_t flags; /* UPF_* flags */ unsigned int type; /* If UPF_FIXED_TYPE */ unsigned int (*serial_in)(struct uart_port *, int); void (*serial_out)(struct uart_port *, int, int); void (*set_termios)(struct uart_port *, struct ktermios *new, struct ktermios *old); void (*set_ldisc)(struct uart_port *, struct ktermios *); unsigned int (*get_mctrl)(struct uart_port *); int (*handle_irq)(struct uart_port *); void (*pm)(struct uart_port *, unsigned int state, unsigned old); void (*handle_break)(struct uart_port *); }; /* * Allocate 8250 platform device IDs. Nothing is implied by * the numbering here, except for the legacy entry being -1. */ enum { PLAT8250_DEV_LEGACY = -1, PLAT8250_DEV_PLATFORM, PLAT8250_DEV_PLATFORM1, PLAT8250_DEV_PLATFORM2, PLAT8250_DEV_FOURPORT, PLAT8250_DEV_ACCENT, PLAT8250_DEV_BOCA, PLAT8250_DEV_EXAR_ST16C554, PLAT8250_DEV_HUB6, PLAT8250_DEV_AU1X00, PLAT8250_DEV_SM501, }; struct uart_8250_dma; struct uart_8250_port; /** * 8250 core driver operations * * @setup_irq() Setup irq handling. The universal 8250 driver links this * port to the irq chain. Other drivers may @request_irq(). * @release_irq() Undo irq handling. The universal 8250 driver unlinks * the port from the irq chain. */ struct uart_8250_ops { int (*setup_irq)(struct uart_8250_port *); void (*release_irq)(struct uart_8250_port *); void (*setup_timer)(struct uart_8250_port *); }; struct uart_8250_em485 { struct hrtimer start_tx_timer; /* "rs485 start tx" timer */ struct hrtimer stop_tx_timer; /* "rs485 stop tx" timer */ struct hrtimer *active_timer; /* pointer to active timer */ struct uart_8250_port *port; /* for hrtimer callbacks */ unsigned int tx_stopped:1; /* tx is currently stopped */ }; /* * This should be used by drivers which want to register * their own 8250 ports without registering their own * platform device. Using these will make your driver * dependent on the 8250 driver. */ struct uart_8250_port { struct uart_port port; struct timer_list timer; /* "no irq" timer */ struct list_head list; /* ports on this IRQ */ u32 capabilities; /* port capabilities */ unsigned short bugs; /* port bugs */ unsigned int tx_loadsz; /* transmit fifo load size */ unsigned char acr; unsigned char fcr; unsigned char ier; unsigned char lcr; unsigned char mcr; unsigned char mcr_mask; /* mask of user bits */ unsigned char mcr_force; /* mask of forced bits */ unsigned char cur_iotype; /* Running I/O type */ unsigned int rpm_tx_active; unsigned char canary; /* non-zero during system sleep * if no_console_suspend */ unsigned char probe; struct mctrl_gpios *gpios; #define UART_PROBE_RSA (1 << 0) /* * Some bits in registers are cleared on a read, so they must * be saved whenever the register is read but the bits will not * be immediately processed. */ #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS unsigned char lsr_saved_flags; #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA unsigned char msr_saved_flags; struct uart_8250_dma *dma; const struct uart_8250_ops *ops; /* 8250 specific callbacks */ int (*dl_read)(struct uart_8250_port *); void (*dl_write)(struct uart_8250_port *, int); struct uart_8250_em485 *em485; void (*rs485_start_tx)(struct uart_8250_port *); void (*rs485_stop_tx)(struct uart_8250_port *); /* Serial port overrun backoff */ struct delayed_work overrun_backoff; u32 overrun_backoff_time_ms; }; static inline struct uart_8250_port *up_to_u8250p(struct uart_port *up) { return container_of(up, struct uart_8250_port, port); } int serial8250_register_8250_port(const struct uart_8250_port *); void serial8250_unregister_port(int line); void serial8250_suspend_port(int line); void serial8250_resume_port(int line); extern int early_serial_setup(struct uart_port *port); extern int early_serial8250_setup(struct earlycon_device *device, const char *options); extern void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk); extern void serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old); extern void serial8250_do_set_ldisc(struct uart_port *port, struct ktermios *termios); extern unsigned int serial8250_do_get_mctrl(struct uart_port *port); extern int serial8250_do_startup(struct uart_port *port); extern void serial8250_do_shutdown(struct uart_port *port); extern void serial8250_do_pm(struct uart_port *port, unsigned int state, unsigned int oldstate); extern void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl); extern void serial8250_do_set_divisor(struct uart_port *port, unsigned int baud, unsigned int quot, unsigned int quot_frac); extern int fsl8250_handle_irq(struct uart_port *port); int serial8250_handle_irq(struct uart_port *port, unsigned int iir); unsigned char serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr); void serial8250_read_char(struct uart_8250_port *up, unsigned char lsr); void serial8250_tx_chars(struct uart_8250_port *up); unsigned int serial8250_modem_status(struct uart_8250_port *up); void serial8250_init_port(struct uart_8250_port *up); void serial8250_set_defaults(struct uart_8250_port *up); void serial8250_console_write(struct uart_8250_port *up, const char *s, unsigned int count); int serial8250_console_setup(struct uart_port *port, char *options, bool probe); int serial8250_console_exit(struct uart_port *port); extern void serial8250_set_isa_configurator(void (*v) (int port, struct uart_port *up, u32 *capabilities)); #ifdef CONFIG_SERIAL_8250_RT288X unsigned int au_serial_in(struct uart_port *p, int offset); void au_serial_out(struct uart_port *p, int offset, int value); #endif #endif PK ! ���� glob.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_GLOB_H #define _LINUX_GLOB_H #include <linux/types.h> /* For bool */ #include <linux/compiler.h> /* For __pure */ bool __pure glob_match(char const *pat, char const *str); #endif /* _LINUX_GLOB_H */ PK ! ZAQ1r r cb710.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * cb710/cb710.h * * Copyright by Michał Mirosław, 2008-2009 */ #ifndef LINUX_CB710_DRIVER_H #define LINUX_CB710_DRIVER_H #include <linux/io.h> #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/pci.h> #include <linux/platform_device.h> #include <linux/mmc/host.h> struct cb710_slot; typedef int (*cb710_irq_handler_t)(struct cb710_slot *); /* per-virtual-slot structure */ struct cb710_slot { struct platform_device pdev; void __iomem *iobase; cb710_irq_handler_t irq_handler; }; /* per-device structure */ struct cb710_chip { struct pci_dev *pdev; void __iomem *iobase; unsigned platform_id; #ifdef CONFIG_CB710_DEBUG_ASSUMPTIONS atomic_t slot_refs_count; #endif unsigned slot_mask; unsigned slots; spinlock_t irq_lock; struct cb710_slot slot[]; }; /* NOTE: cb710_chip.slots is modified only during device init/exit and * they are all serialized wrt themselves */ /* cb710_chip.slot_mask values */ #define CB710_SLOT_MMC 1 #define CB710_SLOT_MS 2 #define CB710_SLOT_SM 4 /* slot port accessors - so the logic is more clear in the code */ #define CB710_PORT_ACCESSORS(t) \ static inline void cb710_write_port_##t(struct cb710_slot *slot, \ unsigned port, u##t value) \ { \ iowrite##t(value, slot->iobase + port); \ } \ \ static inline u##t cb710_read_port_##t(struct cb710_slot *slot, \ unsigned port) \ { \ return ioread##t(slot->iobase + port); \ } \ \ static inline void cb710_modify_port_##t(struct cb710_slot *slot, \ unsigned port, u##t set, u##t clear) \ { \ iowrite##t( \ (ioread##t(slot->iobase + port) & ~clear)|set, \ slot->iobase + port); \ } CB710_PORT_ACCESSORS(8) CB710_PORT_ACCESSORS(16) CB710_PORT_ACCESSORS(32) void cb710_pci_update_config_reg(struct pci_dev *pdev, int reg, uint32_t and, uint32_t xor); void cb710_set_irq_handler(struct cb710_slot *slot, cb710_irq_handler_t handler); /* some device struct walking */ static inline struct cb710_slot *cb710_pdev_to_slot( struct platform_device *pdev) { return container_of(pdev, struct cb710_slot, pdev); } static inline struct cb710_chip *cb710_slot_to_chip(struct cb710_slot *slot) { return dev_get_drvdata(slot->pdev.dev.parent); } static inline struct device *cb710_slot_dev(struct cb710_slot *slot) { return &slot->pdev.dev; } static inline struct device *cb710_chip_dev(struct cb710_chip *chip) { return &chip->pdev->dev; } /* debugging aids */ #ifdef CONFIG_CB710_DEBUG void cb710_dump_regs(struct cb710_chip *chip, unsigned dump); #else #define cb710_dump_regs(c, d) do {} while (0) #endif #define CB710_DUMP_REGS_MMC 0x0F #define CB710_DUMP_REGS_MS 0x30 #define CB710_DUMP_REGS_SM 0xC0 #define CB710_DUMP_REGS_ALL 0xFF #define CB710_DUMP_REGS_MASK 0xFF #define CB710_DUMP_ACCESS_8 0x100 #define CB710_DUMP_ACCESS_16 0x200 #define CB710_DUMP_ACCESS_32 0x400 #define CB710_DUMP_ACCESS_ALL 0x700 #define CB710_DUMP_ACCESS_MASK 0x700 #endif /* LINUX_CB710_DRIVER_H */ /* * cb710/sgbuf2.h * * Copyright by Michał Mirosław, 2008-2009 */ #ifndef LINUX_CB710_SG_H #define LINUX_CB710_SG_H #include <linux/highmem.h> #include <linux/scatterlist.h> /* * 32-bit PIO mapping sg iterator * * Hides scatterlist access issues - fragment boundaries, alignment, page * mapping - for drivers using 32-bit-word-at-a-time-PIO (ie. PCI devices * without DMA support). * * Best-case reading (transfer from device): * sg_miter_start(, SG_MITER_TO_SG); * cb710_sg_dwiter_write_from_io(); * sg_miter_stop(); * * Best-case writing (transfer to device): * sg_miter_start(, SG_MITER_FROM_SG); * cb710_sg_dwiter_read_to_io(); * sg_miter_stop(); */ uint32_t cb710_sg_dwiter_read_next_block(struct sg_mapping_iter *miter); void cb710_sg_dwiter_write_next_block(struct sg_mapping_iter *miter, uint32_t data); /** * cb710_sg_dwiter_write_from_io - transfer data to mapped buffer from 32-bit IO port * @miter: sg mapping iter * @port: PIO port - IO or MMIO address * @count: number of 32-bit words to transfer * * Description: * Reads @count 32-bit words from register @port and stores it in * buffer iterated by @miter. Data that would overflow the buffer * is silently ignored. Iterator is advanced by 4*@count bytes * or to the buffer's end whichever is closer. * * Context: * IRQ disabled if the SG_MITER_ATOMIC is set. Don't care otherwise. */ static inline void cb710_sg_dwiter_write_from_io(struct sg_mapping_iter *miter, void __iomem *port, size_t count) { while (count-- > 0) cb710_sg_dwiter_write_next_block(miter, ioread32(port)); } /** * cb710_sg_dwiter_read_to_io - transfer data to 32-bit IO port from mapped buffer * @miter: sg mapping iter * @port: PIO port - IO or MMIO address * @count: number of 32-bit words to transfer * * Description: * Writes @count 32-bit words to register @port from buffer iterated * through @miter. If buffer ends before @count words are written * missing data is replaced by zeroes. @miter is advanced by 4*@count * bytes or to the buffer's end whichever is closer. * * Context: * IRQ disabled if the SG_MITER_ATOMIC is set. Don't care otherwise. */ static inline void cb710_sg_dwiter_read_to_io(struct sg_mapping_iter *miter, void __iomem *port, size_t count) { while (count-- > 0) iowrite32(cb710_sg_dwiter_read_next_block(miter), port); } #endif /* LINUX_CB710_SG_H */ PK ! 5.��� � task_io_accounting.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * task_io_accounting: a structure which is used for recording a single task's * IO statistics. * * Don't include this header file directly - it is designed to be dragged in via * sched.h. * * Blame Andrew Morton for all this. */ struct task_io_accounting { #ifdef CONFIG_TASK_XACCT /* bytes read */ u64 rchar; /* bytes written */ u64 wchar; /* # of read syscalls */ u64 syscr; /* # of write syscalls */ u64 syscw; #endif /* CONFIG_TASK_XACCT */ #ifdef CONFIG_TASK_IO_ACCOUNTING /* * The number of bytes which this task has caused to be read from * storage. */ u64 read_bytes; /* * The number of bytes which this task has caused, or shall cause to be * written to disk. */ u64 write_bytes; /* * A task can cause "negative" IO too. If this task truncates some * dirty pagecache, some IO which another task has been accounted for * (in its write_bytes) will not be happening. We _could_ just * subtract that from the truncating task's write_bytes, but there is * information loss in doing that. */ u64 cancelled_write_bytes; #endif /* CONFIG_TASK_IO_ACCOUNTING */ }; PK ! b2�5 5 nd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. */ #ifndef __LINUX_ND_H__ #define __LINUX_ND_H__ #include <linux/fs.h> #include <linux/ndctl.h> #include <linux/device.h> #include <linux/badblocks.h> enum nvdimm_event { NVDIMM_REVALIDATE_POISON, NVDIMM_REVALIDATE_REGION, }; enum nvdimm_claim_class { NVDIMM_CCLASS_NONE, NVDIMM_CCLASS_BTT, NVDIMM_CCLASS_BTT2, NVDIMM_CCLASS_PFN, NVDIMM_CCLASS_DAX, NVDIMM_CCLASS_UNKNOWN, }; struct nd_device_driver { struct device_driver drv; unsigned long type; int (*probe)(struct device *dev); void (*remove)(struct device *dev); void (*shutdown)(struct device *dev); void (*notify)(struct device *dev, enum nvdimm_event event); }; static inline struct nd_device_driver *to_nd_device_driver( struct device_driver *drv) { return container_of(drv, struct nd_device_driver, drv); }; /** * struct nd_namespace_common - core infrastructure of a namespace * @force_raw: ignore other personalities for the namespace (e.g. btt) * @dev: device model node * @claim: when set a another personality has taken ownership of the namespace * @claim_class: restrict claim type to a given class * @rw_bytes: access the raw namespace capacity with byte-aligned transfers */ struct nd_namespace_common { int force_raw; struct device dev; struct device *claim; enum nvdimm_claim_class claim_class; int (*rw_bytes)(struct nd_namespace_common *, resource_size_t offset, void *buf, size_t size, int rw, unsigned long flags); }; static inline struct nd_namespace_common *to_ndns(struct device *dev) { return container_of(dev, struct nd_namespace_common, dev); } /** * struct nd_namespace_io - device representation of a persistent memory range * @dev: namespace device created by the nd region driver * @res: struct resource conversion of a NFIT SPA table * @size: cached resource_size(@res) for fast path size checks * @addr: virtual address to access the namespace range * @bb: badblocks list for the namespace range */ struct nd_namespace_io { struct nd_namespace_common common; struct resource res; resource_size_t size; void *addr; struct badblocks bb; }; /** * struct nd_namespace_pmem - namespace device for dimm-backed interleaved memory * @nsio: device and system physical address range to drive * @lbasize: logical sector size for the namespace in block-device-mode * @alt_name: namespace name supplied in the dimm label * @uuid: namespace name supplied in the dimm label * @id: ida allocated id */ struct nd_namespace_pmem { struct nd_namespace_io nsio; unsigned long lbasize; char *alt_name; u8 *uuid; int id; }; /** * struct nd_namespace_blk - namespace for dimm-bounded persistent memory * @alt_name: namespace name supplied in the dimm label * @uuid: namespace name supplied in the dimm label * @id: ida allocated id * @lbasize: blk namespaces have a native sector size when btt not present * @size: sum of all the resource ranges allocated to this namespace * @num_resources: number of dpa extents to claim * @res: discontiguous dpa extents for given dimm */ struct nd_namespace_blk { struct nd_namespace_common common; char *alt_name; u8 *uuid; int id; unsigned long lbasize; resource_size_t size; int num_resources; struct resource **res; }; static inline struct nd_namespace_io *to_nd_namespace_io(const struct device *dev) { return container_of(dev, struct nd_namespace_io, common.dev); } static inline struct nd_namespace_pmem *to_nd_namespace_pmem(const struct device *dev) { struct nd_namespace_io *nsio = to_nd_namespace_io(dev); return container_of(nsio, struct nd_namespace_pmem, nsio); } static inline struct nd_namespace_blk *to_nd_namespace_blk(const struct device *dev) { return container_of(dev, struct nd_namespace_blk, common.dev); } /** * nvdimm_read_bytes() - synchronously read bytes from an nvdimm namespace * @ndns: device to read * @offset: namespace-relative starting offset * @buf: buffer to fill * @size: transfer length * * @buf is up-to-date upon return from this routine. */ static inline int nvdimm_read_bytes(struct nd_namespace_common *ndns, resource_size_t offset, void *buf, size_t size, unsigned long flags) { return ndns->rw_bytes(ndns, offset, buf, size, READ, flags); } /** * nvdimm_write_bytes() - synchronously write bytes to an nvdimm namespace * @ndns: device to write * @offset: namespace-relative starting offset * @buf: buffer to drain * @size: transfer length * * NVDIMM Namepaces disks do not implement sectors internally. Depending on * the @ndns, the contents of @buf may be in cpu cache, platform buffers, * or on backing memory media upon return from this routine. Flushing * to media is handled internal to the @ndns driver, if at all. */ static inline int nvdimm_write_bytes(struct nd_namespace_common *ndns, resource_size_t offset, void *buf, size_t size, unsigned long flags) { return ndns->rw_bytes(ndns, offset, buf, size, WRITE, flags); } #define MODULE_ALIAS_ND_DEVICE(type) \ MODULE_ALIAS("nd:t" __stringify(type) "*") #define ND_DEVICE_MODALIAS_FMT "nd:t%d" struct nd_region; void nvdimm_region_notify(struct nd_region *nd_region, enum nvdimm_event event); int __must_check __nd_driver_register(struct nd_device_driver *nd_drv, struct module *module, const char *mod_name); static inline void nd_driver_unregister(struct nd_device_driver *drv) { driver_unregister(&drv->drv); } #define nd_driver_register(driver) \ __nd_driver_register(driver, THIS_MODULE, KBUILD_MODNAME) #define module_nd_driver(driver) \ module_driver(driver, nd_driver_register, nd_driver_unregister) #endif /* __LINUX_ND_H__ */ PK ! m�,* * rfkill.hnu �[��� /* * Copyright (C) 2006 - 2007 Ivo van Doorn * Copyright (C) 2007 Dmitry Torokhov * Copyright 2009 Johannes Berg <johannes@sipsolutions.net> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef __RFKILL_H #define __RFKILL_H #include <uapi/linux/rfkill.h> /* don't allow anyone to use these in the kernel */ enum rfkill_user_states { RFKILL_USER_STATE_SOFT_BLOCKED = RFKILL_STATE_SOFT_BLOCKED, RFKILL_USER_STATE_UNBLOCKED = RFKILL_STATE_UNBLOCKED, RFKILL_USER_STATE_HARD_BLOCKED = RFKILL_STATE_HARD_BLOCKED, }; #undef RFKILL_STATE_SOFT_BLOCKED #undef RFKILL_STATE_UNBLOCKED #undef RFKILL_STATE_HARD_BLOCKED #include <linux/kernel.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/leds.h> #include <linux/err.h> struct device; /* this is opaque */ struct rfkill; /** * struct rfkill_ops - rfkill driver methods * * @poll: poll the rfkill block state(s) -- only assign this method * when you need polling. When called, simply call one of the * rfkill_set{,_hw,_sw}_state family of functions. If the hw * is getting unblocked you need to take into account the return * value of those functions to make sure the software block is * properly used. * @query: query the rfkill block state(s) and call exactly one of the * rfkill_set{,_hw,_sw}_state family of functions. Assign this * method if input events can cause hardware state changes to make * the rfkill core query your driver before setting a requested * block. * @set_block: turn the transmitter on (blocked == false) or off * (blocked == true) -- ignore and return 0 when hard blocked. * This callback must be assigned. */ struct rfkill_ops { void (*poll)(struct rfkill *rfkill, void *data); void (*query)(struct rfkill *rfkill, void *data); int (*set_block)(void *data, bool blocked); }; #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) /** * rfkill_alloc - Allocate rfkill structure * @name: name of the struct -- the string is not copied internally * @parent: device that has rf switch on it * @type: type of the switch (RFKILL_TYPE_*) * @ops: rfkill methods * @ops_data: data passed to each method * * This function should be called by the transmitter driver to allocate an * rfkill structure. Returns %NULL on failure. */ struct rfkill * __must_check rfkill_alloc(const char *name, struct device *parent, const enum rfkill_type type, const struct rfkill_ops *ops, void *ops_data); /** * rfkill_register - Register a rfkill structure. * @rfkill: rfkill structure to be registered * * This function should be called by the transmitter driver to register * the rfkill structure. Before calling this function the driver needs * to be ready to service method calls from rfkill. * * If rfkill_init_sw_state() is not called before registration, * set_block() will be called to initialize the software blocked state * to a default value. * * If the hardware blocked state is not set before registration, * it is assumed to be unblocked. */ int __must_check rfkill_register(struct rfkill *rfkill); /** * rfkill_pause_polling(struct rfkill *rfkill) * * Pause polling -- say transmitter is off for other reasons. * NOTE: not necessary for suspend/resume -- in that case the * core stops polling anyway (but will also correctly handle * the case of polling having been paused before suspend.) */ void rfkill_pause_polling(struct rfkill *rfkill); /** * rfkill_resume_polling(struct rfkill *rfkill) * * Resume polling * NOTE: not necessary for suspend/resume -- in that case the * core stops polling anyway */ void rfkill_resume_polling(struct rfkill *rfkill); /** * rfkill_unregister - Unregister a rfkill structure. * @rfkill: rfkill structure to be unregistered * * This function should be called by the network driver during device * teardown to destroy rfkill structure. Until it returns, the driver * needs to be able to service method calls. */ void rfkill_unregister(struct rfkill *rfkill); /** * rfkill_destroy - Free rfkill structure * @rfkill: rfkill structure to be destroyed * * Destroys the rfkill structure. */ void rfkill_destroy(struct rfkill *rfkill); /** * rfkill_set_hw_state_reason - Set the internal rfkill hardware block state * with a reason * @rfkill: pointer to the rfkill class to modify. * @blocked: the current hardware block state to set * @reason: one of &enum rfkill_hard_block_reasons * * Prefer to use rfkill_set_hw_state if you don't need any special reason. */ bool rfkill_set_hw_state_reason(struct rfkill *rfkill, bool blocked, unsigned long reason); /** * rfkill_set_hw_state - Set the internal rfkill hardware block state * @rfkill: pointer to the rfkill class to modify. * @blocked: the current hardware block state to set * * rfkill drivers that get events when the hard-blocked state changes * use this function to notify the rfkill core (and through that also * userspace) of the current state. They should also use this after * resume if the state could have changed. * * You need not (but may) call this function if poll_state is assigned. * * This function can be called in any context, even from within rfkill * callbacks. * * The function returns the combined block state (true if transmitter * should be blocked) so that drivers need not keep track of the soft * block state -- which they might not be able to. */ static inline bool rfkill_set_hw_state(struct rfkill *rfkill, bool blocked) { return rfkill_set_hw_state_reason(rfkill, blocked, RFKILL_HARD_BLOCK_SIGNAL); } /** * rfkill_set_sw_state - Set the internal rfkill software block state * @rfkill: pointer to the rfkill class to modify. * @blocked: the current software block state to set * * rfkill drivers that get events when the soft-blocked state changes * (yes, some platforms directly act on input but allow changing again) * use this function to notify the rfkill core (and through that also * userspace) of the current state. * * Drivers should also call this function after resume if the state has * been changed by the user. This only makes sense for "persistent" * devices (see rfkill_init_sw_state()). * * This function can be called in any context, even from within rfkill * callbacks. * * The function returns the combined block state (true if transmitter * should be blocked). */ bool rfkill_set_sw_state(struct rfkill *rfkill, bool blocked); /** * rfkill_init_sw_state - Initialize persistent software block state * @rfkill: pointer to the rfkill class to modify. * @blocked: the current software block state to set * * rfkill drivers that preserve their software block state over power off * use this function to notify the rfkill core (and through that also * userspace) of their initial state. It should only be used before * registration. * * In addition, it marks the device as "persistent", an attribute which * can be read by userspace. Persistent devices are expected to preserve * their own state when suspended. */ void rfkill_init_sw_state(struct rfkill *rfkill, bool blocked); /** * rfkill_set_states - Set the internal rfkill block states * @rfkill: pointer to the rfkill class to modify. * @sw: the current software block state to set * @hw: the current hardware block state to set * * This function can be called in any context, even from within rfkill * callbacks. */ void rfkill_set_states(struct rfkill *rfkill, bool sw, bool hw); /** * rfkill_blocked - Query rfkill block state * * @rfkill: rfkill struct to query */ bool rfkill_blocked(struct rfkill *rfkill); /** * rfkill_find_type - Helper for finding rfkill type by name * @name: the name of the type * * Returns enum rfkill_type that corresponds to the name. */ enum rfkill_type rfkill_find_type(const char *name); #else /* !RFKILL */ static inline struct rfkill * __must_check rfkill_alloc(const char *name, struct device *parent, const enum rfkill_type type, const struct rfkill_ops *ops, void *ops_data) { return ERR_PTR(-ENODEV); } static inline int __must_check rfkill_register(struct rfkill *rfkill) { if (rfkill == ERR_PTR(-ENODEV)) return 0; return -EINVAL; } static inline void rfkill_pause_polling(struct rfkill *rfkill) { } static inline void rfkill_resume_polling(struct rfkill *rfkill) { } static inline void rfkill_unregister(struct rfkill *rfkill) { } static inline void rfkill_destroy(struct rfkill *rfkill) { } static inline bool rfkill_set_hw_state_reason(struct rfkill *rfkill, bool blocked, unsigned long reason) { return blocked; } static inline bool rfkill_set_hw_state(struct rfkill *rfkill, bool blocked) { return blocked; } static inline bool rfkill_set_sw_state(struct rfkill *rfkill, bool blocked) { return blocked; } static inline void rfkill_init_sw_state(struct rfkill *rfkill, bool blocked) { } static inline void rfkill_set_states(struct rfkill *rfkill, bool sw, bool hw) { } static inline bool rfkill_blocked(struct rfkill *rfkill) { return false; } static inline enum rfkill_type rfkill_find_type(const char *name) { return RFKILL_TYPE_ALL; } #endif /* RFKILL || RFKILL_MODULE */ #ifdef CONFIG_RFKILL_LEDS /** * rfkill_get_led_trigger_name - Get the LED trigger name for the button's LED. * This function might return a NULL pointer if registering of the * LED trigger failed. Use this as "default_trigger" for the LED. */ const char *rfkill_get_led_trigger_name(struct rfkill *rfkill); /** * rfkill_set_led_trigger_name - Set the LED trigger name * @rfkill: rfkill struct * @name: LED trigger name * * This function sets the LED trigger name of the radio LED * trigger that rfkill creates. It is optional, but if called * must be called before rfkill_register() to be effective. */ void rfkill_set_led_trigger_name(struct rfkill *rfkill, const char *name); #else static inline const char *rfkill_get_led_trigger_name(struct rfkill *rfkill) { return NULL; } static inline void rfkill_set_led_trigger_name(struct rfkill *rfkill, const char *name) { } #endif #endif /* RFKILL_H */ PK ! ?� O� � prandom.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/prandom.h * * Include file for the fast pseudo-random 32-bit * generation. */ #ifndef _LINUX_PRANDOM_H #define _LINUX_PRANDOM_H #include <linux/types.h> #include <linux/percpu.h> #include <linux/siphash.h> u32 prandom_u32(void); void prandom_bytes(void *buf, size_t nbytes); void prandom_seed(u32 seed); void prandom_reseed_late(void); DECLARE_PER_CPU(unsigned long, net_rand_noise); #define PRANDOM_ADD_NOISE(a, b, c, d) \ prandom_u32_add_noise((unsigned long)(a), (unsigned long)(b), \ (unsigned long)(c), (unsigned long)(d)) #if BITS_PER_LONG == 64 /* * The core SipHash round function. Each line can be executed in * parallel given enough CPU resources. */ #define PRND_SIPROUND(v0, v1, v2, v3) SIPHASH_PERMUTATION(v0, v1, v2, v3) #define PRND_K0 (SIPHASH_CONST_0 ^ SIPHASH_CONST_2) #define PRND_K1 (SIPHASH_CONST_1 ^ SIPHASH_CONST_3) #elif BITS_PER_LONG == 32 /* * On 32-bit machines, we use HSipHash, a reduced-width version of SipHash. * This is weaker, but 32-bit machines are not used for high-traffic * applications, so there is less output for an attacker to analyze. */ #define PRND_SIPROUND(v0, v1, v2, v3) HSIPHASH_PERMUTATION(v0, v1, v2, v3) #define PRND_K0 (HSIPHASH_CONST_0 ^ HSIPHASH_CONST_2) #define PRND_K1 (HSIPHASH_CONST_1 ^ HSIPHASH_CONST_3) #else #error Unsupported BITS_PER_LONG #endif static inline void prandom_u32_add_noise(unsigned long a, unsigned long b, unsigned long c, unsigned long d) { /* * This is not used cryptographically; it's just * a convenient 4-word hash function. (3 xor, 2 add, 2 rol) */ a ^= raw_cpu_read(net_rand_noise); PRND_SIPROUND(a, b, c, d); raw_cpu_write(net_rand_noise, d); } struct rnd_state { __u32 s1, s2, s3, s4; }; u32 prandom_u32_state(struct rnd_state *state); void prandom_bytes_state(struct rnd_state *state, void *buf, size_t nbytes); void prandom_seed_full_state(struct rnd_state __percpu *pcpu_state); #define prandom_init_once(pcpu_state) \ DO_ONCE(prandom_seed_full_state, (pcpu_state)) /** * prandom_u32_max - returns a pseudo-random number in interval [0, ep_ro) * @ep_ro: right open interval endpoint * * Returns a pseudo-random number that is in interval [0, ep_ro). Note * that the result depends on PRNG being well distributed in [0, ~0U] * u32 space. Here we use maximally equidistributed combined Tausworthe * generator, that is, prandom_u32(). This is useful when requesting a * random index of an array containing ep_ro elements, for example. * * Returns: pseudo-random number in interval [0, ep_ro) */ static inline u32 prandom_u32_max(u32 ep_ro) { return (u32)(((u64) prandom_u32() * ep_ro) >> 32); } /* * Handle minimum values for seeds */ static inline u32 __seed(u32 x, u32 m) { return (x < m) ? x + m : x; } /** * prandom_seed_state - set seed for prandom_u32_state(). * @state: pointer to state structure to receive the seed. * @seed: arbitrary 64-bit value to use as a seed. */ static inline void prandom_seed_state(struct rnd_state *state, u64 seed) { u32 i = ((seed >> 32) ^ (seed << 10) ^ seed) & 0xffffffffUL; state->s1 = __seed(i, 2U); state->s2 = __seed(i, 8U); state->s3 = __seed(i, 16U); state->s4 = __seed(i, 128U); PRANDOM_ADD_NOISE(state, i, 0, 0); } /* Pseudo random number generator from numerical recipes. */ static inline u32 next_pseudo_random32(u32 seed) { return seed * 1664525 + 1013904223; } #endif PK ! ^oe e cuda.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for talking to the CUDA. The CUDA is a microcontroller * which controls the ADB, system power, RTC, and various other things. * * Copyright (C) 1996 Paul Mackerras. */ #ifndef _LINUX_CUDA_H #define _LINUX_CUDA_H #include <linux/rtc.h> #include <uapi/linux/cuda.h> extern int find_via_cuda(void); extern int cuda_request(struct adb_request *req, void (*done)(struct adb_request *), int nbytes, ...); extern void cuda_poll(void); extern time64_t cuda_get_time(void); extern int cuda_set_rtc_time(struct rtc_time *tm); #endif /* _LINUX_CUDA_H */ PK ! ���G G ioasid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_IOASID_H #define __LINUX_IOASID_H #include <linux/types.h> #include <linux/errno.h> #define INVALID_IOASID ((ioasid_t)-1) typedef unsigned int ioasid_t; typedef ioasid_t (*ioasid_alloc_fn_t)(ioasid_t min, ioasid_t max, void *data); typedef void (*ioasid_free_fn_t)(ioasid_t ioasid, void *data); struct ioasid_set { int dummy; }; /** * struct ioasid_allocator_ops - IOASID allocator helper functions and data * * @alloc: helper function to allocate IOASID * @free: helper function to free IOASID * @list: for tracking ops that share helper functions but not data * @pdata: data belong to the allocator, provided when calling alloc() */ struct ioasid_allocator_ops { ioasid_alloc_fn_t alloc; ioasid_free_fn_t free; struct list_head list; void *pdata; }; #define DECLARE_IOASID_SET(name) struct ioasid_set name = { 0 } #if IS_ENABLED(CONFIG_IOASID) ioasid_t ioasid_alloc(struct ioasid_set *set, ioasid_t min, ioasid_t max, void *private); void ioasid_get(ioasid_t ioasid); bool ioasid_put(ioasid_t ioasid); void *ioasid_find(struct ioasid_set *set, ioasid_t ioasid, bool (*getter)(void *)); int ioasid_register_allocator(struct ioasid_allocator_ops *allocator); void ioasid_unregister_allocator(struct ioasid_allocator_ops *allocator); int ioasid_set_data(ioasid_t ioasid, void *data); #else /* !CONFIG_IOASID */ static inline ioasid_t ioasid_alloc(struct ioasid_set *set, ioasid_t min, ioasid_t max, void *private) { return INVALID_IOASID; } static inline void ioasid_get(ioasid_t ioasid) { } static inline bool ioasid_put(ioasid_t ioasid) { return false; } static inline void *ioasid_find(struct ioasid_set *set, ioasid_t ioasid, bool (*getter)(void *)) { return NULL; } static inline int ioasid_register_allocator(struct ioasid_allocator_ops *allocator) { return -ENOTSUPP; } static inline void ioasid_unregister_allocator(struct ioasid_allocator_ops *allocator) { } static inline int ioasid_set_data(ioasid_t ioasid, void *data) { return -ENOTSUPP; } #endif /* CONFIG_IOASID */ #endif /* __LINUX_IOASID_H */ PK ! ЭS* icmp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Definitions for the ICMP protocol. * * Version: @(#)icmp.h 1.0.3 04/28/93 * * Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> */ #ifndef _LINUX_ICMP_H #define _LINUX_ICMP_H #include <linux/skbuff.h> #include <uapi/linux/icmp.h> #include <uapi/linux/errqueue.h> static inline struct icmphdr *icmp_hdr(const struct sk_buff *skb) { return (struct icmphdr *)skb_transport_header(skb); } static inline bool icmp_is_err(int type) { switch (type) { case ICMP_DEST_UNREACH: case ICMP_SOURCE_QUENCH: case ICMP_REDIRECT: case ICMP_TIME_EXCEEDED: case ICMP_PARAMETERPROB: return true; } return false; } void ip_icmp_error_rfc4884(const struct sk_buff *skb, struct sock_ee_data_rfc4884 *out, int thlen, int off); #endif /* _LINUX_ICMP_H */ PK ! �� � � limits.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LIMITS_H #define _LINUX_LIMITS_H #include <uapi/linux/limits.h> #include <linux/types.h> #include <vdso/limits.h> #define SIZE_MAX (~(size_t)0) #define PHYS_ADDR_MAX (~(phys_addr_t)0) #define U8_MAX ((u8)~0U) #define S8_MAX ((s8)(U8_MAX >> 1)) #define S8_MIN ((s8)(-S8_MAX - 1)) #define U16_MAX ((u16)~0U) #define S16_MAX ((s16)(U16_MAX >> 1)) #define S16_MIN ((s16)(-S16_MAX - 1)) #define U32_MAX ((u32)~0U) #define U32_MIN ((u32)0) #define S32_MAX ((s32)(U32_MAX >> 1)) #define S32_MIN ((s32)(-S32_MAX - 1)) #define U64_MAX ((u64)~0ULL) #define S64_MAX ((s64)(U64_MAX >> 1)) #define S64_MIN ((s64)(-S64_MAX - 1)) #endif /* _LINUX_LIMITS_H */ PK ! ���� � crush/mapper.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef CEPH_CRUSH_MAPPER_H #define CEPH_CRUSH_MAPPER_H /* * CRUSH functions for find rules and then mapping an input to an * output set. * * LGPL2 */ #include "crush.h" extern int crush_find_rule(const struct crush_map *map, int ruleset, int type, int size); int crush_do_rule(const struct crush_map *map, int ruleno, int x, int *result, int result_max, const __u32 *weight, int weight_max, void *cwin, const struct crush_choose_arg *choose_args); /* * Returns the exact amount of workspace that will need to be used * for a given combination of crush_map and result_max. The caller can * then allocate this much on its own, either on the stack, in a * per-thread long-lived buffer, or however it likes. */ static inline size_t crush_work_size(const struct crush_map *map, int result_max) { return map->working_size + result_max * 3 * sizeof(__u32); } void crush_init_workspace(const struct crush_map *map, void *v); #endif PK ! "�� � crush/hash.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef CEPH_CRUSH_HASH_H #define CEPH_CRUSH_HASH_H #ifdef __KERNEL__ # include <linux/types.h> #else # include "crush_compat.h" #endif #define CRUSH_HASH_RJENKINS1 0 #define CRUSH_HASH_DEFAULT CRUSH_HASH_RJENKINS1 extern const char *crush_hash_name(int type); extern __u32 crush_hash32(int type, __u32 a); extern __u32 crush_hash32_2(int type, __u32 a, __u32 b); extern __u32 crush_hash32_3(int type, __u32 a, __u32 b, __u32 c); extern __u32 crush_hash32_4(int type, __u32 a, __u32 b, __u32 c, __u32 d); extern __u32 crush_hash32_5(int type, __u32 a, __u32 b, __u32 c, __u32 d, __u32 e); #endif PK ! _#+�D+ D+ crush/crush.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef CEPH_CRUSH_CRUSH_H #define CEPH_CRUSH_CRUSH_H #ifdef __KERNEL__ # include <linux/rbtree.h> # include <linux/types.h> #else # include "crush_compat.h" #endif /* * CRUSH is a pseudo-random data distribution algorithm that * efficiently distributes input values (typically, data objects) * across a heterogeneous, structured storage cluster. * * The algorithm was originally described in detail in this paper * (although the algorithm has evolved somewhat since then): * * https://www.ssrc.ucsc.edu/Papers/weil-sc06.pdf * * LGPL2 */ #define CRUSH_MAGIC 0x00010000ul /* for detecting algorithm revisions */ #define CRUSH_MAX_DEPTH 10 /* max crush hierarchy depth */ #define CRUSH_MAX_RULESET (1<<8) /* max crush ruleset number */ #define CRUSH_MAX_RULES CRUSH_MAX_RULESET /* should be the same as max rulesets */ #define CRUSH_MAX_DEVICE_WEIGHT (100u * 0x10000u) #define CRUSH_MAX_BUCKET_WEIGHT (65535u * 0x10000u) #define CRUSH_ITEM_UNDEF 0x7ffffffe /* undefined result (internal use only) */ #define CRUSH_ITEM_NONE 0x7fffffff /* no result */ /* * CRUSH uses user-defined "rules" to describe how inputs should be * mapped to devices. A rule consists of sequence of steps to perform * to generate the set of output devices. */ struct crush_rule_step { __u32 op; __s32 arg1; __s32 arg2; }; /* step op codes */ enum { CRUSH_RULE_NOOP = 0, CRUSH_RULE_TAKE = 1, /* arg1 = value to start with */ CRUSH_RULE_CHOOSE_FIRSTN = 2, /* arg1 = num items to pick */ /* arg2 = type */ CRUSH_RULE_CHOOSE_INDEP = 3, /* same */ CRUSH_RULE_EMIT = 4, /* no args */ CRUSH_RULE_CHOOSELEAF_FIRSTN = 6, CRUSH_RULE_CHOOSELEAF_INDEP = 7, CRUSH_RULE_SET_CHOOSE_TRIES = 8, /* override choose_total_tries */ CRUSH_RULE_SET_CHOOSELEAF_TRIES = 9, /* override chooseleaf_descend_once */ CRUSH_RULE_SET_CHOOSE_LOCAL_TRIES = 10, CRUSH_RULE_SET_CHOOSE_LOCAL_FALLBACK_TRIES = 11, CRUSH_RULE_SET_CHOOSELEAF_VARY_R = 12, CRUSH_RULE_SET_CHOOSELEAF_STABLE = 13 }; /* * for specifying choose num (arg1) relative to the max parameter * passed to do_rule */ #define CRUSH_CHOOSE_N 0 #define CRUSH_CHOOSE_N_MINUS(x) (-(x)) /* * The rule mask is used to describe what the rule is intended for. * Given a ruleset and size of output set, we search through the * rule list for a matching rule_mask. */ struct crush_rule_mask { __u8 ruleset; __u8 type; __u8 min_size; __u8 max_size; }; struct crush_rule { __u32 len; struct crush_rule_mask mask; struct crush_rule_step steps[]; }; #define crush_rule_size(len) (sizeof(struct crush_rule) + \ (len)*sizeof(struct crush_rule_step)) /* * A bucket is a named container of other items (either devices or * other buckets). Items within a bucket are chosen using one of a * few different algorithms. The table summarizes how the speed of * each option measures up against mapping stability when items are * added or removed. * * Bucket Alg Speed Additions Removals * ------------------------------------------------ * uniform O(1) poor poor * list O(n) optimal poor * tree O(log n) good good * straw O(n) better better * straw2 O(n) optimal optimal */ enum { CRUSH_BUCKET_UNIFORM = 1, CRUSH_BUCKET_LIST = 2, CRUSH_BUCKET_TREE = 3, CRUSH_BUCKET_STRAW = 4, CRUSH_BUCKET_STRAW2 = 5, }; extern const char *crush_bucket_alg_name(int alg); /* * although tree was a legacy algorithm, it has been buggy, so * exclude it. */ #define CRUSH_LEGACY_ALLOWED_BUCKET_ALGS ( \ (1 << CRUSH_BUCKET_UNIFORM) | \ (1 << CRUSH_BUCKET_LIST) | \ (1 << CRUSH_BUCKET_STRAW)) struct crush_bucket { __s32 id; /* this'll be negative */ __u16 type; /* non-zero; type=0 is reserved for devices */ __u8 alg; /* one of CRUSH_BUCKET_* */ __u8 hash; /* which hash function to use, CRUSH_HASH_* */ __u32 weight; /* 16-bit fixed point */ __u32 size; /* num items */ __s32 *items; }; /** @ingroup API * * Replacement weights for each item in a bucket. The size of the * array must be exactly the size of the straw2 bucket, just as the * item_weights array. * */ struct crush_weight_set { __u32 *weights; /*!< 16.16 fixed point weights in the same order as items */ __u32 size; /*!< size of the __weights__ array */ }; /** @ingroup API * * Replacement weights and ids for a given straw2 bucket, for * placement purposes. * * When crush_do_rule() chooses the Nth item from a straw2 bucket, the * replacement weights found at __weight_set[N]__ are used instead of * the weights from __item_weights__. If __N__ is greater than * __weight_set_size__, the weights found at __weight_set_size-1__ are * used instead. For instance if __weight_set__ is: * * [ [ 0x10000, 0x20000 ], // position 0 * [ 0x20000, 0x40000 ] ] // position 1 * * choosing the 0th item will use position 0 weights [ 0x10000, 0x20000 ] * choosing the 1th item will use position 1 weights [ 0x20000, 0x40000 ] * choosing the 2th item will use position 1 weights [ 0x20000, 0x40000 ] * etc. * */ struct crush_choose_arg { __s32 *ids; /*!< values to use instead of items */ __u32 ids_size; /*!< size of the __ids__ array */ struct crush_weight_set *weight_set; /*!< weight replacements for a given position */ __u32 weight_set_size; /*!< size of the __weight_set__ array */ }; /** @ingroup API * * Replacement weights and ids for each bucket in the crushmap. The * __size__ of the __args__ array must be exactly the same as the * __map->max_buckets__. * * The __crush_choose_arg__ at index N will be used when choosing * an item from the bucket __map->buckets[N]__ bucket, provided it * is a straw2 bucket. * */ struct crush_choose_arg_map { #ifdef __KERNEL__ struct rb_node node; s64 choose_args_index; #endif struct crush_choose_arg *args; /*!< replacement for each bucket in the crushmap */ __u32 size; /*!< size of the __args__ array */ }; struct crush_bucket_uniform { struct crush_bucket h; __u32 item_weight; /* 16-bit fixed point; all items equally weighted */ }; struct crush_bucket_list { struct crush_bucket h; __u32 *item_weights; /* 16-bit fixed point */ __u32 *sum_weights; /* 16-bit fixed point. element i is sum of weights 0..i, inclusive */ }; struct crush_bucket_tree { struct crush_bucket h; /* note: h.size is _tree_ size, not number of actual items */ __u8 num_nodes; __u32 *node_weights; }; struct crush_bucket_straw { struct crush_bucket h; __u32 *item_weights; /* 16-bit fixed point */ __u32 *straws; /* 16-bit fixed point */ }; struct crush_bucket_straw2 { struct crush_bucket h; __u32 *item_weights; /* 16-bit fixed point */ }; /* * CRUSH map includes all buckets, rules, etc. */ struct crush_map { struct crush_bucket **buckets; struct crush_rule **rules; __s32 max_buckets; __u32 max_rules; __s32 max_devices; /* choose local retries before re-descent */ __u32 choose_local_tries; /* choose local attempts using a fallback permutation before * re-descent */ __u32 choose_local_fallback_tries; /* choose attempts before giving up */ __u32 choose_total_tries; /* attempt chooseleaf inner descent once for firstn mode; on * reject retry outer descent. Note that this does *not* * apply to a collision: in that case we will retry as we used * to. */ __u32 chooseleaf_descend_once; /* if non-zero, feed r into chooseleaf, bit-shifted right by (r-1) * bits. a value of 1 is best for new clusters. for legacy clusters * that want to limit reshuffling, a value of 3 or 4 will make the * mappings line up a bit better with previous mappings. */ __u8 chooseleaf_vary_r; /* if true, it makes chooseleaf firstn to return stable results (if * no local retry) so that data migrations would be optimal when some * device fails. */ __u8 chooseleaf_stable; /* * This value is calculated after decode or construction by * the builder. It is exposed here (rather than having a * 'build CRUSH working space' function) so that callers can * reserve a static buffer, allocate space on the stack, or * otherwise avoid calling into the heap allocator if they * want to. The size of the working space depends on the map, * while the size of the scratch vector passed to the mapper * depends on the size of the desired result set. * * Nothing stops the caller from allocating both in one swell * foop and passing in two points, though. */ size_t working_size; #ifndef __KERNEL__ /* * version 0 (original) of straw_calc has various flaws. version 1 * fixes a few of them. */ __u8 straw_calc_version; /* * allowed bucket algs is a bitmask, here the bit positions * are CRUSH_BUCKET_*. note that these are *bits* and * CRUSH_BUCKET_* values are not, so we need to or together (1 * << CRUSH_BUCKET_WHATEVER). The 0th bit is not used to * minimize confusion (bucket type values start at 1). */ __u32 allowed_bucket_algs; __u32 *choose_tries; #else /* device/bucket type id -> type name (CrushWrapper::type_map) */ struct rb_root type_names; /* device/bucket id -> name (CrushWrapper::name_map) */ struct rb_root names; /* CrushWrapper::choose_args */ struct rb_root choose_args; #endif }; /* crush.c */ extern int crush_get_bucket_item_weight(const struct crush_bucket *b, int pos); extern void crush_destroy_bucket_uniform(struct crush_bucket_uniform *b); extern void crush_destroy_bucket_list(struct crush_bucket_list *b); extern void crush_destroy_bucket_tree(struct crush_bucket_tree *b); extern void crush_destroy_bucket_straw(struct crush_bucket_straw *b); extern void crush_destroy_bucket_straw2(struct crush_bucket_straw2 *b); extern void crush_destroy_bucket(struct crush_bucket *b); extern void crush_destroy_rule(struct crush_rule *r); extern void crush_destroy(struct crush_map *map); static inline int crush_calc_tree_node(int i) { return ((i+1) << 1)-1; } /* * These data structures are private to the CRUSH implementation. They * are exposed in this header file because builder needs their * definitions to calculate the total working size. * * Moving this out of the crush map allow us to treat the CRUSH map as * immutable within the mapper and removes the requirement for a CRUSH * map lock. */ struct crush_work_bucket { __u32 perm_x; /* @x for which *perm is defined */ __u32 perm_n; /* num elements of *perm that are permuted/defined */ __u32 *perm; /* Permutation of the bucket's items */ }; struct crush_work { struct crush_work_bucket **work; /* Per-bucket working store */ #ifdef __KERNEL__ struct list_head item; #endif }; #ifdef __KERNEL__ /* osdmap.c */ void clear_crush_names(struct rb_root *root); void clear_choose_args(struct crush_map *c); #endif #endif PK ! ���* * blockgroup_lock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BLOCKGROUP_LOCK_H #define _LINUX_BLOCKGROUP_LOCK_H /* * Per-blockgroup locking for ext2 and ext3. * * Simple hashed spinlocking. */ #include <linux/spinlock.h> #include <linux/cache.h> #ifdef CONFIG_SMP #define NR_BG_LOCKS (4 << ilog2(NR_CPUS < 32 ? NR_CPUS : 32)) #else #define NR_BG_LOCKS 1 #endif struct bgl_lock { spinlock_t lock; } ____cacheline_aligned_in_smp; struct blockgroup_lock { struct bgl_lock locks[NR_BG_LOCKS]; }; static inline void bgl_lock_init(struct blockgroup_lock *bgl) { int i; for (i = 0; i < NR_BG_LOCKS; i++) spin_lock_init(&bgl->locks[i].lock); } static inline spinlock_t * bgl_lock_ptr(struct blockgroup_lock *bgl, unsigned int block_group) { return &bgl->locks[block_group & (NR_BG_LOCKS-1)].lock; } #endif PK ! �� =F =F scatterlist.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCATTERLIST_H #define _LINUX_SCATTERLIST_H #include <linux/string.h> #include <linux/types.h> #include <linux/bug.h> #include <linux/mm.h> #include <asm/io.h> struct scatterlist { unsigned long page_link; unsigned int offset; unsigned int length; dma_addr_t dma_address; #ifdef CONFIG_NEED_SG_DMA_LENGTH unsigned int dma_length; #endif }; /* * These macros should be used after a dma_map_sg call has been done * to get bus addresses of each of the SG entries and their lengths. * You should only work with the number of sg entries dma_map_sg * returns, or alternatively stop on the first sg_dma_len(sg) which * is 0. */ #define sg_dma_address(sg) ((sg)->dma_address) #ifdef CONFIG_NEED_SG_DMA_LENGTH #define sg_dma_len(sg) ((sg)->dma_length) #else #define sg_dma_len(sg) ((sg)->length) #endif struct sg_table { struct scatterlist *sgl; /* the list */ unsigned int nents; /* number of mapped entries */ unsigned int orig_nents; /* original size of list */ }; struct sg_append_table { struct sg_table sgt; /* The scatter list table */ struct scatterlist *prv; /* last populated sge in the table */ unsigned int total_nents; /* Total entries in the table */ }; /* * Notes on SG table design. * * We use the unsigned long page_link field in the scatterlist struct to place * the page pointer AND encode information about the sg table as well. The two * lower bits are reserved for this information. * * If bit 0 is set, then the page_link contains a pointer to the next sg * table list. Otherwise the next entry is at sg + 1. * * If bit 1 is set, then this sg entry is the last element in a list. * * See sg_next(). * */ #define SG_CHAIN 0x01UL #define SG_END 0x02UL /* * We overload the LSB of the page pointer to indicate whether it's * a valid sg entry, or whether it points to the start of a new scatterlist. * Those low bits are there for everyone! (thanks mason :-) */ #define sg_is_chain(sg) ((sg)->page_link & SG_CHAIN) #define sg_is_last(sg) ((sg)->page_link & SG_END) #define sg_chain_ptr(sg) \ ((struct scatterlist *) ((sg)->page_link & ~(SG_CHAIN | SG_END))) /** * sg_assign_page - Assign a given page to an SG entry * @sg: SG entry * @page: The page * * Description: * Assign page to sg entry. Also see sg_set_page(), the most commonly used * variant. * **/ static inline void sg_assign_page(struct scatterlist *sg, struct page *page) { unsigned long page_link = sg->page_link & (SG_CHAIN | SG_END); /* * In order for the low bit stealing approach to work, pages * must be aligned at a 32-bit boundary as a minimum. */ BUG_ON((unsigned long) page & (SG_CHAIN | SG_END)); #ifdef CONFIG_DEBUG_SG BUG_ON(sg_is_chain(sg)); #endif sg->page_link = page_link | (unsigned long) page; } /** * sg_set_page - Set sg entry to point at given page * @sg: SG entry * @page: The page * @len: Length of data * @offset: Offset into page * * Description: * Use this function to set an sg entry pointing at a page, never assign * the page directly. We encode sg table information in the lower bits * of the page pointer. See sg_page() for looking up the page belonging * to an sg entry. * **/ static inline void sg_set_page(struct scatterlist *sg, struct page *page, unsigned int len, unsigned int offset) { sg_assign_page(sg, page); sg->offset = offset; sg->length = len; } static inline struct page *sg_page(struct scatterlist *sg) { #ifdef CONFIG_DEBUG_SG BUG_ON(sg_is_chain(sg)); #endif return (struct page *)((sg)->page_link & ~(SG_CHAIN | SG_END)); } /** * sg_set_buf - Set sg entry to point at given data * @sg: SG entry * @buf: Data * @buflen: Data length * **/ static inline void sg_set_buf(struct scatterlist *sg, const void *buf, unsigned int buflen) { #ifdef CONFIG_DEBUG_SG BUG_ON(!virt_addr_valid(buf)); #endif sg_set_page(sg, virt_to_page(buf), buflen, offset_in_page(buf)); } /* * Loop over each sg element, following the pointer to a new list if necessary */ #define for_each_sg(sglist, sg, nr, __i) \ for (__i = 0, sg = (sglist); __i < (nr); __i++, sg = sg_next(sg)) /* * Loop over each sg element in the given sg_table object. */ #define for_each_sgtable_sg(sgt, sg, i) \ for_each_sg((sgt)->sgl, sg, (sgt)->orig_nents, i) /* * Loop over each sg element in the given *DMA mapped* sg_table object. * Please use sg_dma_address(sg) and sg_dma_len(sg) to extract DMA addresses * of the each element. */ #define for_each_sgtable_dma_sg(sgt, sg, i) \ for_each_sg((sgt)->sgl, sg, (sgt)->nents, i) static inline void __sg_chain(struct scatterlist *chain_sg, struct scatterlist *sgl) { /* * offset and length are unused for chain entry. Clear them. */ chain_sg->offset = 0; chain_sg->length = 0; /* * Set lowest bit to indicate a link pointer, and make sure to clear * the termination bit if it happens to be set. */ chain_sg->page_link = ((unsigned long) sgl | SG_CHAIN) & ~SG_END; } /** * sg_chain - Chain two sglists together * @prv: First scatterlist * @prv_nents: Number of entries in prv * @sgl: Second scatterlist * * Description: * Links @prv@ and @sgl@ together, to form a longer scatterlist. * **/ static inline void sg_chain(struct scatterlist *prv, unsigned int prv_nents, struct scatterlist *sgl) { __sg_chain(&prv[prv_nents - 1], sgl); } /** * sg_mark_end - Mark the end of the scatterlist * @sg: SG entryScatterlist * * Description: * Marks the passed in sg entry as the termination point for the sg * table. A call to sg_next() on this entry will return NULL. * **/ static inline void sg_mark_end(struct scatterlist *sg) { /* * Set termination bit, clear potential chain bit */ sg->page_link |= SG_END; sg->page_link &= ~SG_CHAIN; } /** * sg_unmark_end - Undo setting the end of the scatterlist * @sg: SG entryScatterlist * * Description: * Removes the termination marker from the given entry of the scatterlist. * **/ static inline void sg_unmark_end(struct scatterlist *sg) { sg->page_link &= ~SG_END; } /** * sg_phys - Return physical address of an sg entry * @sg: SG entry * * Description: * This calls page_to_phys() on the page in this sg entry, and adds the * sg offset. The caller must know that it is legal to call page_to_phys() * on the sg page. * **/ static inline dma_addr_t sg_phys(struct scatterlist *sg) { return page_to_phys(sg_page(sg)) + sg->offset; } /** * sg_virt - Return virtual address of an sg entry * @sg: SG entry * * Description: * This calls page_address() on the page in this sg entry, and adds the * sg offset. The caller must know that the sg page has a valid virtual * mapping. * **/ static inline void *sg_virt(struct scatterlist *sg) { return page_address(sg_page(sg)) + sg->offset; } /** * sg_init_marker - Initialize markers in sg table * @sgl: The SG table * @nents: Number of entries in table * **/ static inline void sg_init_marker(struct scatterlist *sgl, unsigned int nents) { sg_mark_end(&sgl[nents - 1]); } int sg_nents(struct scatterlist *sg); int sg_nents_for_len(struct scatterlist *sg, u64 len); struct scatterlist *sg_next(struct scatterlist *); struct scatterlist *sg_last(struct scatterlist *s, unsigned int); void sg_init_table(struct scatterlist *, unsigned int); void sg_init_one(struct scatterlist *, const void *, unsigned int); int sg_split(struct scatterlist *in, const int in_mapped_nents, const off_t skip, const int nb_splits, const size_t *split_sizes, struct scatterlist **out, int *out_mapped_nents, gfp_t gfp_mask); typedef struct scatterlist *(sg_alloc_fn)(unsigned int, gfp_t); typedef void (sg_free_fn)(struct scatterlist *, unsigned int); void __sg_free_table(struct sg_table *, unsigned int, unsigned int, sg_free_fn *, unsigned int); void sg_free_table(struct sg_table *); void sg_free_append_table(struct sg_append_table *sgt); int __sg_alloc_table(struct sg_table *, unsigned int, unsigned int, struct scatterlist *, unsigned int, gfp_t, sg_alloc_fn *); int sg_alloc_table(struct sg_table *, unsigned int, gfp_t); int sg_alloc_append_table_from_pages(struct sg_append_table *sgt, struct page **pages, unsigned int n_pages, unsigned int offset, unsigned long size, unsigned int max_segment, unsigned int left_pages, gfp_t gfp_mask); int sg_alloc_table_from_pages_segment(struct sg_table *sgt, struct page **pages, unsigned int n_pages, unsigned int offset, unsigned long size, unsigned int max_segment, gfp_t gfp_mask); /** * sg_alloc_table_from_pages - Allocate and initialize an sg table from * an array of pages * @sgt: The sg table header to use * @pages: Pointer to an array of page pointers * @n_pages: Number of pages in the pages array * @offset: Offset from start of the first page to the start of a buffer * @size: Number of valid bytes in the buffer (after offset) * @gfp_mask: GFP allocation mask * * Description: * Allocate and initialize an sg table from a list of pages. Contiguous * ranges of the pages are squashed into a single scatterlist node. A user * may provide an offset at a start and a size of valid data in a buffer * specified by the page array. The returned sg table is released by * sg_free_table. * * Returns: * 0 on success, negative error on failure */ static inline int sg_alloc_table_from_pages(struct sg_table *sgt, struct page **pages, unsigned int n_pages, unsigned int offset, unsigned long size, gfp_t gfp_mask) { return sg_alloc_table_from_pages_segment(sgt, pages, n_pages, offset, size, UINT_MAX, gfp_mask); } #ifdef CONFIG_SGL_ALLOC struct scatterlist *sgl_alloc_order(unsigned long long length, unsigned int order, bool chainable, gfp_t gfp, unsigned int *nent_p); struct scatterlist *sgl_alloc(unsigned long long length, gfp_t gfp, unsigned int *nent_p); void sgl_free_n_order(struct scatterlist *sgl, int nents, int order); void sgl_free_order(struct scatterlist *sgl, int order); void sgl_free(struct scatterlist *sgl); #endif /* CONFIG_SGL_ALLOC */ size_t sg_copy_buffer(struct scatterlist *sgl, unsigned int nents, void *buf, size_t buflen, off_t skip, bool to_buffer); size_t sg_copy_from_buffer(struct scatterlist *sgl, unsigned int nents, const void *buf, size_t buflen); size_t sg_copy_to_buffer(struct scatterlist *sgl, unsigned int nents, void *buf, size_t buflen); size_t sg_pcopy_from_buffer(struct scatterlist *sgl, unsigned int nents, const void *buf, size_t buflen, off_t skip); size_t sg_pcopy_to_buffer(struct scatterlist *sgl, unsigned int nents, void *buf, size_t buflen, off_t skip); size_t sg_zero_buffer(struct scatterlist *sgl, unsigned int nents, size_t buflen, off_t skip); /* * Maximum number of entries that will be allocated in one piece, if * a list larger than this is required then chaining will be utilized. */ #define SG_MAX_SINGLE_ALLOC (PAGE_SIZE / sizeof(struct scatterlist)) /* * The maximum number of SG segments that we will put inside a * scatterlist (unless chaining is used). Should ideally fit inside a * single page, to avoid a higher order allocation. We could define this * to SG_MAX_SINGLE_ALLOC to pack correctly at the highest order. The * minimum value is 32 */ #define SG_CHUNK_SIZE 128 /* * Like SG_CHUNK_SIZE, but for archs that have sg chaining. This limit * is totally arbitrary, a setting of 2048 will get you at least 8mb ios. */ #ifdef CONFIG_ARCH_NO_SG_CHAIN #define SG_MAX_SEGMENTS SG_CHUNK_SIZE #else #define SG_MAX_SEGMENTS 2048 #endif #ifdef CONFIG_SG_POOL void sg_free_table_chained(struct sg_table *table, unsigned nents_first_chunk); int sg_alloc_table_chained(struct sg_table *table, int nents, struct scatterlist *first_chunk, unsigned nents_first_chunk); #endif /* * sg page iterator * * Iterates over sg entries page-by-page. On each successful iteration, you * can call sg_page_iter_page(@piter) to get the current page. * @piter->sg will point to the sg holding this page and @piter->sg_pgoffset to * the page's page offset within the sg. The iteration will stop either when a * maximum number of sg entries was reached or a terminating sg * (sg_last(sg) == true) was reached. */ struct sg_page_iter { struct scatterlist *sg; /* sg holding the page */ unsigned int sg_pgoffset; /* page offset within the sg */ /* these are internal states, keep away */ unsigned int __nents; /* remaining sg entries */ int __pg_advance; /* nr pages to advance at the * next step */ }; /* * sg page iterator for DMA addresses * * This is the same as sg_page_iter however you can call * sg_page_iter_dma_address(@dma_iter) to get the page's DMA * address. sg_page_iter_page() cannot be called on this iterator. */ struct sg_dma_page_iter { struct sg_page_iter base; }; bool __sg_page_iter_next(struct sg_page_iter *piter); bool __sg_page_iter_dma_next(struct sg_dma_page_iter *dma_iter); void __sg_page_iter_start(struct sg_page_iter *piter, struct scatterlist *sglist, unsigned int nents, unsigned long pgoffset); /** * sg_page_iter_page - get the current page held by the page iterator * @piter: page iterator holding the page */ static inline struct page *sg_page_iter_page(struct sg_page_iter *piter) { return nth_page(sg_page(piter->sg), piter->sg_pgoffset); } /** * sg_page_iter_dma_address - get the dma address of the current page held by * the page iterator. * @dma_iter: page iterator holding the page */ static inline dma_addr_t sg_page_iter_dma_address(struct sg_dma_page_iter *dma_iter) { return sg_dma_address(dma_iter->base.sg) + (dma_iter->base.sg_pgoffset << PAGE_SHIFT); } /** * for_each_sg_page - iterate over the pages of the given sg list * @sglist: sglist to iterate over * @piter: page iterator to hold current page, sg, sg_pgoffset * @nents: maximum number of sg entries to iterate over * @pgoffset: starting page offset (in pages) * * Callers may use sg_page_iter_page() to get each page pointer. * In each loop it operates on PAGE_SIZE unit. */ #define for_each_sg_page(sglist, piter, nents, pgoffset) \ for (__sg_page_iter_start((piter), (sglist), (nents), (pgoffset)); \ __sg_page_iter_next(piter);) /** * for_each_sg_dma_page - iterate over the pages of the given sg list * @sglist: sglist to iterate over * @dma_iter: DMA page iterator to hold current page * @dma_nents: maximum number of sg entries to iterate over, this is the value * returned from dma_map_sg * @pgoffset: starting page offset (in pages) * * Callers may use sg_page_iter_dma_address() to get each page's DMA address. * In each loop it operates on PAGE_SIZE unit. */ #define for_each_sg_dma_page(sglist, dma_iter, dma_nents, pgoffset) \ for (__sg_page_iter_start(&(dma_iter)->base, sglist, dma_nents, \ pgoffset); \ __sg_page_iter_dma_next(dma_iter);) /** * for_each_sgtable_page - iterate over all pages in the sg_table object * @sgt: sg_table object to iterate over * @piter: page iterator to hold current page * @pgoffset: starting page offset (in pages) * * Iterates over the all memory pages in the buffer described by * a scatterlist stored in the given sg_table object. * See also for_each_sg_page(). In each loop it operates on PAGE_SIZE unit. */ #define for_each_sgtable_page(sgt, piter, pgoffset) \ for_each_sg_page((sgt)->sgl, piter, (sgt)->orig_nents, pgoffset) /** * for_each_sgtable_dma_page - iterate over the DMA mapped sg_table object * @sgt: sg_table object to iterate over * @dma_iter: DMA page iterator to hold current page * @pgoffset: starting page offset (in pages) * * Iterates over the all DMA mapped pages in the buffer described by * a scatterlist stored in the given sg_table object. * See also for_each_sg_dma_page(). In each loop it operates on PAGE_SIZE * unit. */ #define for_each_sgtable_dma_page(sgt, dma_iter, pgoffset) \ for_each_sg_dma_page((sgt)->sgl, dma_iter, (sgt)->nents, pgoffset) /* * Mapping sg iterator * * Iterates over sg entries mapping page-by-page. On each successful * iteration, @miter->page points to the mapped page and * @miter->length bytes of data can be accessed at @miter->addr. As * long as an iteration is enclosed between start and stop, the user * is free to choose control structure and when to stop. * * @miter->consumed is set to @miter->length on each iteration. It * can be adjusted if the user can't consume all the bytes in one go. * Also, a stopped iteration can be resumed by calling next on it. * This is useful when iteration needs to release all resources and * continue later (e.g. at the next interrupt). */ #define SG_MITER_ATOMIC (1 << 0) /* use kmap_atomic */ #define SG_MITER_TO_SG (1 << 1) /* flush back to phys on unmap */ #define SG_MITER_FROM_SG (1 << 2) /* nop */ struct sg_mapping_iter { /* the following three fields can be accessed directly */ struct page *page; /* currently mapped page */ void *addr; /* pointer to the mapped area */ size_t length; /* length of the mapped area */ size_t consumed; /* number of consumed bytes */ struct sg_page_iter piter; /* page iterator */ /* these are internal states, keep away */ unsigned int __offset; /* offset within page */ unsigned int __remaining; /* remaining bytes on page */ unsigned int __flags; }; void sg_miter_start(struct sg_mapping_iter *miter, struct scatterlist *sgl, unsigned int nents, unsigned int flags); bool sg_miter_skip(struct sg_mapping_iter *miter, off_t offset); bool sg_miter_next(struct sg_mapping_iter *miter); void sg_miter_stop(struct sg_mapping_iter *miter); #endif /* _LINUX_SCATTERLIST_H */ PK ! 3u��+ + fs_stack.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FS_STACK_H #define _LINUX_FS_STACK_H /* This file defines generic functions used primarily by stackable * filesystems; none of these functions require i_mutex to be held. */ #include <linux/fs.h> /* externs for fs/stack.c */ extern void fsstack_copy_attr_all(struct inode *dest, const struct inode *src); extern void fsstack_copy_inode_size(struct inode *dst, struct inode *src); /* inlines */ static inline void fsstack_copy_attr_atime(struct inode *dest, const struct inode *src) { dest->i_atime = src->i_atime; } static inline void fsstack_copy_attr_times(struct inode *dest, const struct inode *src) { dest->i_atime = src->i_atime; dest->i_mtime = src->i_mtime; dest->i_ctime = src->i_ctime; } #endif /* _LINUX_FS_STACK_H */ PK ! �Lj|. |. sm501-regs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* sm501-regs.h * * Copyright 2006 Simtec Electronics * * Silicon Motion SM501 register definitions */ /* System Configuration area */ /* System config base */ #define SM501_SYS_CONFIG (0x000000) /* config 1 */ #define SM501_SYSTEM_CONTROL (0x000000) #define SM501_SYSCTRL_PANEL_TRISTATE (1<<0) #define SM501_SYSCTRL_MEM_TRISTATE (1<<1) #define SM501_SYSCTRL_CRT_TRISTATE (1<<2) #define SM501_SYSCTRL_PCI_SLAVE_BURST_MASK (3<<4) #define SM501_SYSCTRL_PCI_SLAVE_BURST_1 (0<<4) #define SM501_SYSCTRL_PCI_SLAVE_BURST_2 (1<<4) #define SM501_SYSCTRL_PCI_SLAVE_BURST_4 (2<<4) #define SM501_SYSCTRL_PCI_SLAVE_BURST_8 (3<<4) #define SM501_SYSCTRL_PCI_CLOCK_RUN_EN (1<<6) #define SM501_SYSCTRL_PCI_RETRY_DISABLE (1<<7) #define SM501_SYSCTRL_PCI_SUBSYS_LOCK (1<<11) #define SM501_SYSCTRL_PCI_BURST_READ_EN (1<<15) #define SM501_SYSCTRL_2D_ENGINE_STATUS (1<<19) /* miscellaneous control */ #define SM501_MISC_CONTROL (0x000004) #define SM501_MISC_BUS_SH (0x0) #define SM501_MISC_BUS_PCI (0x1) #define SM501_MISC_BUS_XSCALE (0x2) #define SM501_MISC_BUS_NEC (0x6) #define SM501_MISC_BUS_MASK (0x7) #define SM501_MISC_VR_62MB (1<<3) #define SM501_MISC_CDR_RESET (1<<7) #define SM501_MISC_USB_LB (1<<8) #define SM501_MISC_USB_SLAVE (1<<9) #define SM501_MISC_BL_1 (1<<10) #define SM501_MISC_MC (1<<11) #define SM501_MISC_DAC_POWER (1<<12) #define SM501_MISC_IRQ_INVERT (1<<16) #define SM501_MISC_SH (1<<17) #define SM501_MISC_HOLD_EMPTY (0<<18) #define SM501_MISC_HOLD_8 (1<<18) #define SM501_MISC_HOLD_16 (2<<18) #define SM501_MISC_HOLD_24 (3<<18) #define SM501_MISC_HOLD_32 (4<<18) #define SM501_MISC_HOLD_MASK (7<<18) #define SM501_MISC_FREQ_12 (1<<24) #define SM501_MISC_PNL_24BIT (1<<25) #define SM501_MISC_8051_LE (1<<26) #define SM501_GPIO31_0_CONTROL (0x000008) #define SM501_GPIO63_32_CONTROL (0x00000C) #define SM501_DRAM_CONTROL (0x000010) /* command list */ #define SM501_ARBTRTN_CONTROL (0x000014) /* command list */ #define SM501_COMMAND_LIST_STATUS (0x000024) /* interrupt debug */ #define SM501_RAW_IRQ_STATUS (0x000028) #define SM501_RAW_IRQ_CLEAR (0x000028) #define SM501_IRQ_STATUS (0x00002C) #define SM501_IRQ_MASK (0x000030) #define SM501_DEBUG_CONTROL (0x000034) /* power management */ #define SM501_POWERMODE_P2X_SRC (1<<29) #define SM501_POWERMODE_V2X_SRC (1<<20) #define SM501_POWERMODE_M_SRC (1<<12) #define SM501_POWERMODE_M1_SRC (1<<4) #define SM501_CURRENT_GATE (0x000038) #define SM501_CURRENT_CLOCK (0x00003C) #define SM501_POWER_MODE_0_GATE (0x000040) #define SM501_POWER_MODE_0_CLOCK (0x000044) #define SM501_POWER_MODE_1_GATE (0x000048) #define SM501_POWER_MODE_1_CLOCK (0x00004C) #define SM501_SLEEP_MODE_GATE (0x000050) #define SM501_POWER_MODE_CONTROL (0x000054) /* power gates for units within the 501 */ #define SM501_GATE_HOST (0) #define SM501_GATE_MEMORY (1) #define SM501_GATE_DISPLAY (2) #define SM501_GATE_2D_ENGINE (3) #define SM501_GATE_CSC (4) #define SM501_GATE_ZVPORT (5) #define SM501_GATE_GPIO (6) #define SM501_GATE_UART0 (7) #define SM501_GATE_UART1 (8) #define SM501_GATE_SSP (10) #define SM501_GATE_USB_HOST (11) #define SM501_GATE_USB_GADGET (12) #define SM501_GATE_UCONTROLLER (17) #define SM501_GATE_AC97 (18) /* panel clock */ #define SM501_CLOCK_P2XCLK (24) /* crt clock */ #define SM501_CLOCK_V2XCLK (16) /* main clock */ #define SM501_CLOCK_MCLK (8) /* SDRAM controller clock */ #define SM501_CLOCK_M1XCLK (0) /* config 2 */ #define SM501_PCI_MASTER_BASE (0x000058) #define SM501_ENDIAN_CONTROL (0x00005C) #define SM501_DEVICEID (0x000060) /* 0x050100A0 */ #define SM501_DEVICEID_SM501 (0x05010000) #define SM501_DEVICEID_IDMASK (0xffff0000) #define SM501_DEVICEID_REVMASK (0x000000ff) #define SM501_PLLCLOCK_COUNT (0x000064) #define SM501_MISC_TIMING (0x000068) #define SM501_CURRENT_SDRAM_CLOCK (0x00006C) #define SM501_PROGRAMMABLE_PLL_CONTROL (0x000074) /* GPIO base */ #define SM501_GPIO (0x010000) #define SM501_GPIO_DATA_LOW (0x00) #define SM501_GPIO_DATA_HIGH (0x04) #define SM501_GPIO_DDR_LOW (0x08) #define SM501_GPIO_DDR_HIGH (0x0C) #define SM501_GPIO_IRQ_SETUP (0x10) #define SM501_GPIO_IRQ_STATUS (0x14) #define SM501_GPIO_IRQ_RESET (0x14) /* I2C controller base */ #define SM501_I2C (0x010040) #define SM501_I2C_BYTE_COUNT (0x00) #define SM501_I2C_CONTROL (0x01) #define SM501_I2C_STATUS (0x02) #define SM501_I2C_RESET (0x02) #define SM501_I2C_SLAVE_ADDRESS (0x03) #define SM501_I2C_DATA (0x04) /* SSP base */ #define SM501_SSP (0x020000) /* Uart 0 base */ #define SM501_UART0 (0x030000) /* Uart 1 base */ #define SM501_UART1 (0x030020) /* USB host port base */ #define SM501_USB_HOST (0x040000) /* USB slave/gadget base */ #define SM501_USB_GADGET (0x060000) /* USB slave/gadget data port base */ #define SM501_USB_GADGET_DATA (0x070000) /* Display controller/video engine base */ #define SM501_DC (0x080000) /* common defines for the SM501 address registers */ #define SM501_ADDR_FLIP (1<<31) #define SM501_ADDR_EXT (1<<27) #define SM501_ADDR_CS1 (1<<26) #define SM501_ADDR_MASK (0x3f << 26) #define SM501_FIFO_MASK (0x3 << 16) #define SM501_FIFO_1 (0x0 << 16) #define SM501_FIFO_3 (0x1 << 16) #define SM501_FIFO_7 (0x2 << 16) #define SM501_FIFO_11 (0x3 << 16) /* common registers for panel and the crt */ #define SM501_OFF_DC_H_TOT (0x000) #define SM501_OFF_DC_V_TOT (0x008) #define SM501_OFF_DC_H_SYNC (0x004) #define SM501_OFF_DC_V_SYNC (0x00C) #define SM501_DC_PANEL_CONTROL (0x000) #define SM501_DC_PANEL_CONTROL_FPEN (1<<27) #define SM501_DC_PANEL_CONTROL_BIAS (1<<26) #define SM501_DC_PANEL_CONTROL_DATA (1<<25) #define SM501_DC_PANEL_CONTROL_VDD (1<<24) #define SM501_DC_PANEL_CONTROL_DP (1<<23) #define SM501_DC_PANEL_CONTROL_TFT_888 (0<<21) #define SM501_DC_PANEL_CONTROL_TFT_333 (1<<21) #define SM501_DC_PANEL_CONTROL_TFT_444 (2<<21) #define SM501_DC_PANEL_CONTROL_DE (1<<20) #define SM501_DC_PANEL_CONTROL_LCD_TFT (0<<18) #define SM501_DC_PANEL_CONTROL_LCD_STN8 (1<<18) #define SM501_DC_PANEL_CONTROL_LCD_STN12 (2<<18) #define SM501_DC_PANEL_CONTROL_CP (1<<14) #define SM501_DC_PANEL_CONTROL_VSP (1<<13) #define SM501_DC_PANEL_CONTROL_HSP (1<<12) #define SM501_DC_PANEL_CONTROL_CK (1<<9) #define SM501_DC_PANEL_CONTROL_TE (1<<8) #define SM501_DC_PANEL_CONTROL_VPD (1<<7) #define SM501_DC_PANEL_CONTROL_VP (1<<6) #define SM501_DC_PANEL_CONTROL_HPD (1<<5) #define SM501_DC_PANEL_CONTROL_HP (1<<4) #define SM501_DC_PANEL_CONTROL_GAMMA (1<<3) #define SM501_DC_PANEL_CONTROL_EN (1<<2) #define SM501_DC_PANEL_CONTROL_8BPP (0<<0) #define SM501_DC_PANEL_CONTROL_16BPP (1<<0) #define SM501_DC_PANEL_CONTROL_32BPP (2<<0) #define SM501_DC_PANEL_PANNING_CONTROL (0x004) #define SM501_DC_PANEL_COLOR_KEY (0x008) #define SM501_DC_PANEL_FB_ADDR (0x00C) #define SM501_DC_PANEL_FB_OFFSET (0x010) #define SM501_DC_PANEL_FB_WIDTH (0x014) #define SM501_DC_PANEL_FB_HEIGHT (0x018) #define SM501_DC_PANEL_TL_LOC (0x01C) #define SM501_DC_PANEL_BR_LOC (0x020) #define SM501_DC_PANEL_H_TOT (0x024) #define SM501_DC_PANEL_H_SYNC (0x028) #define SM501_DC_PANEL_V_TOT (0x02C) #define SM501_DC_PANEL_V_SYNC (0x030) #define SM501_DC_PANEL_CUR_LINE (0x034) #define SM501_DC_VIDEO_CONTROL (0x040) #define SM501_DC_VIDEO_FB0_ADDR (0x044) #define SM501_DC_VIDEO_FB_WIDTH (0x048) #define SM501_DC_VIDEO_FB0_LAST_ADDR (0x04C) #define SM501_DC_VIDEO_TL_LOC (0x050) #define SM501_DC_VIDEO_BR_LOC (0x054) #define SM501_DC_VIDEO_SCALE (0x058) #define SM501_DC_VIDEO_INIT_SCALE (0x05C) #define SM501_DC_VIDEO_YUV_CONSTANTS (0x060) #define SM501_DC_VIDEO_FB1_ADDR (0x064) #define SM501_DC_VIDEO_FB1_LAST_ADDR (0x068) #define SM501_DC_VIDEO_ALPHA_CONTROL (0x080) #define SM501_DC_VIDEO_ALPHA_FB_ADDR (0x084) #define SM501_DC_VIDEO_ALPHA_FB_OFFSET (0x088) #define SM501_DC_VIDEO_ALPHA_FB_LAST_ADDR (0x08C) #define SM501_DC_VIDEO_ALPHA_TL_LOC (0x090) #define SM501_DC_VIDEO_ALPHA_BR_LOC (0x094) #define SM501_DC_VIDEO_ALPHA_SCALE (0x098) #define SM501_DC_VIDEO_ALPHA_INIT_SCALE (0x09C) #define SM501_DC_VIDEO_ALPHA_CHROMA_KEY (0x0A0) #define SM501_DC_VIDEO_ALPHA_COLOR_LOOKUP (0x0A4) #define SM501_DC_PANEL_HWC_BASE (0x0F0) #define SM501_DC_PANEL_HWC_ADDR (0x0F0) #define SM501_DC_PANEL_HWC_LOC (0x0F4) #define SM501_DC_PANEL_HWC_COLOR_1_2 (0x0F8) #define SM501_DC_PANEL_HWC_COLOR_3 (0x0FC) #define SM501_HWC_EN (1<<31) #define SM501_OFF_HWC_ADDR (0x00) #define SM501_OFF_HWC_LOC (0x04) #define SM501_OFF_HWC_COLOR_1_2 (0x08) #define SM501_OFF_HWC_COLOR_3 (0x0C) #define SM501_DC_ALPHA_CONTROL (0x100) #define SM501_DC_ALPHA_FB_ADDR (0x104) #define SM501_DC_ALPHA_FB_OFFSET (0x108) #define SM501_DC_ALPHA_TL_LOC (0x10C) #define SM501_DC_ALPHA_BR_LOC (0x110) #define SM501_DC_ALPHA_CHROMA_KEY (0x114) #define SM501_DC_ALPHA_COLOR_LOOKUP (0x118) #define SM501_DC_CRT_CONTROL (0x200) #define SM501_DC_CRT_CONTROL_TVP (1<<15) #define SM501_DC_CRT_CONTROL_CP (1<<14) #define SM501_DC_CRT_CONTROL_VSP (1<<13) #define SM501_DC_CRT_CONTROL_HSP (1<<12) #define SM501_DC_CRT_CONTROL_VS (1<<11) #define SM501_DC_CRT_CONTROL_BLANK (1<<10) #define SM501_DC_CRT_CONTROL_SEL (1<<9) #define SM501_DC_CRT_CONTROL_TE (1<<8) #define SM501_DC_CRT_CONTROL_PIXEL_MASK (0xF << 4) #define SM501_DC_CRT_CONTROL_GAMMA (1<<3) #define SM501_DC_CRT_CONTROL_ENABLE (1<<2) #define SM501_DC_CRT_CONTROL_8BPP (0<<0) #define SM501_DC_CRT_CONTROL_16BPP (1<<0) #define SM501_DC_CRT_CONTROL_32BPP (2<<0) #define SM501_DC_CRT_FB_ADDR (0x204) #define SM501_DC_CRT_FB_OFFSET (0x208) #define SM501_DC_CRT_H_TOT (0x20C) #define SM501_DC_CRT_H_SYNC (0x210) #define SM501_DC_CRT_V_TOT (0x214) #define SM501_DC_CRT_V_SYNC (0x218) #define SM501_DC_CRT_SIGNATURE_ANALYZER (0x21C) #define SM501_DC_CRT_CUR_LINE (0x220) #define SM501_DC_CRT_MONITOR_DETECT (0x224) #define SM501_DC_CRT_HWC_BASE (0x230) #define SM501_DC_CRT_HWC_ADDR (0x230) #define SM501_DC_CRT_HWC_LOC (0x234) #define SM501_DC_CRT_HWC_COLOR_1_2 (0x238) #define SM501_DC_CRT_HWC_COLOR_3 (0x23C) #define SM501_DC_PANEL_PALETTE (0x400) #define SM501_DC_VIDEO_PALETTE (0x800) #define SM501_DC_CRT_PALETTE (0xC00) /* Zoom Video port base */ #define SM501_ZVPORT (0x090000) /* AC97/I2S base */ #define SM501_AC97 (0x0A0000) /* 8051 micro controller base */ #define SM501_UCONTROLLER (0x0B0000) /* 8051 micro controller SRAM base */ #define SM501_UCONTROLLER_SRAM (0x0C0000) /* DMA base */ #define SM501_DMA (0x0D0000) /* 2d engine base */ #define SM501_2D_ENGINE (0x100000) #define SM501_2D_SOURCE (0x00) #define SM501_2D_DESTINATION (0x04) #define SM501_2D_DIMENSION (0x08) #define SM501_2D_CONTROL (0x0C) #define SM501_2D_PITCH (0x10) #define SM501_2D_FOREGROUND (0x14) #define SM501_2D_BACKGROUND (0x18) #define SM501_2D_STRETCH (0x1C) #define SM501_2D_COLOR_COMPARE (0x20) #define SM501_2D_COLOR_COMPARE_MASK (0x24) #define SM501_2D_MASK (0x28) #define SM501_2D_CLIP_TL (0x2C) #define SM501_2D_CLIP_BR (0x30) #define SM501_2D_MONO_PATTERN_LOW (0x34) #define SM501_2D_MONO_PATTERN_HIGH (0x38) #define SM501_2D_WINDOW_WIDTH (0x3C) #define SM501_2D_SOURCE_BASE (0x40) #define SM501_2D_DESTINATION_BASE (0x44) #define SM501_2D_ALPHA (0x48) #define SM501_2D_WRAP (0x4C) #define SM501_2D_STATUS (0x50) #define SM501_CSC_Y_SOURCE_BASE (0xC8) #define SM501_CSC_CONSTANTS (0xCC) #define SM501_CSC_Y_SOURCE_X (0xD0) #define SM501_CSC_Y_SOURCE_Y (0xD4) #define SM501_CSC_U_SOURCE_BASE (0xD8) #define SM501_CSC_V_SOURCE_BASE (0xDC) #define SM501_CSC_SOURCE_DIMENSION (0xE0) #define SM501_CSC_SOURCE_PITCH (0xE4) #define SM501_CSC_DESTINATION (0xE8) #define SM501_CSC_DESTINATION_DIMENSION (0xEC) #define SM501_CSC_DESTINATION_PITCH (0xF0) #define SM501_CSC_SCALE_FACTOR (0xF4) #define SM501_CSC_DESTINATION_BASE (0xF8) #define SM501_CSC_CONTROL (0xFC) /* 2d engine data port base */ #define SM501_2D_ENGINE_DATA (0x110000) PK ! �'��@ @ omapfb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * File: include/linux/omapfb.h * * Framebuffer driver for TI OMAP boards * * Copyright (C) 2004 Nokia Corporation * Author: Imre Deak <imre.deak@nokia.com> */ #ifndef __LINUX_OMAPFB_H__ #define __LINUX_OMAPFB_H__ #include <uapi/linux/omapfb.h> struct omap_lcd_config { char panel_name[16]; char ctrl_name[16]; s16 nreset_gpio; u8 data_lines; }; struct omapfb_platform_data { struct omap_lcd_config lcd; }; void __init omapfb_set_lcd_config(const struct omap_lcd_config *config); #endif /* __OMAPFB_H */ PK ! ,��� � mnt_namespace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NAMESPACE_H_ #define _NAMESPACE_H_ #ifdef __KERNEL__ struct mnt_namespace; struct fs_struct; struct user_namespace; struct ns_common; struct vfsmount; extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *, struct user_namespace *, struct fs_struct *); extern void put_mnt_ns(struct mnt_namespace *ns); extern struct ns_common *from_mnt_ns(struct mnt_namespace *); extern int is_current_mnt_ns(struct vfsmount *mnt); extern const struct file_operations proc_mounts_operations; extern const struct file_operations proc_mountinfo_operations; extern const struct file_operations proc_mountstats_operations; #endif #endif PK ! :���� � led-lm3530.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2011 ST-Ericsson SA. * Copyright (C) 2009 Motorola, Inc. * * Simple driver for National Semiconductor LM35330 Backlight driver chip * * Author: Shreshtha Kumar SAHU <shreshthakumar.sahu@stericsson.com> * based on leds-lm3530.c by Dan Murphy <D.Murphy@motorola.com> */ #ifndef _LINUX_LED_LM3530_H__ #define _LINUX_LED_LM3530_H__ #define LM3530_FS_CURR_5mA (0) /* Full Scale Current */ #define LM3530_FS_CURR_8mA (1) #define LM3530_FS_CURR_12mA (2) #define LM3530_FS_CURR_15mA (3) #define LM3530_FS_CURR_19mA (4) #define LM3530_FS_CURR_22mA (5) #define LM3530_FS_CURR_26mA (6) #define LM3530_FS_CURR_29mA (7) #define LM3530_ALS_AVRG_TIME_32ms (0) /* ALS Averaging Time */ #define LM3530_ALS_AVRG_TIME_64ms (1) #define LM3530_ALS_AVRG_TIME_128ms (2) #define LM3530_ALS_AVRG_TIME_256ms (3) #define LM3530_ALS_AVRG_TIME_512ms (4) #define LM3530_ALS_AVRG_TIME_1024ms (5) #define LM3530_ALS_AVRG_TIME_2048ms (6) #define LM3530_ALS_AVRG_TIME_4096ms (7) #define LM3530_RAMP_TIME_1ms (0) /* Brigtness Ramp Time */ #define LM3530_RAMP_TIME_130ms (1) /* Max to 0 and vice versa */ #define LM3530_RAMP_TIME_260ms (2) #define LM3530_RAMP_TIME_520ms (3) #define LM3530_RAMP_TIME_1s (4) #define LM3530_RAMP_TIME_2s (5) #define LM3530_RAMP_TIME_4s (6) #define LM3530_RAMP_TIME_8s (7) /* ALS Resistor Select */ #define LM3530_ALS_IMPD_Z (0x00) /* ALS Impedance */ #define LM3530_ALS_IMPD_13_53kOhm (0x01) #define LM3530_ALS_IMPD_9_01kOhm (0x02) #define LM3530_ALS_IMPD_5_41kOhm (0x03) #define LM3530_ALS_IMPD_2_27kOhm (0x04) #define LM3530_ALS_IMPD_1_94kOhm (0x05) #define LM3530_ALS_IMPD_1_81kOhm (0x06) #define LM3530_ALS_IMPD_1_6kOhm (0x07) #define LM3530_ALS_IMPD_1_138kOhm (0x08) #define LM3530_ALS_IMPD_1_05kOhm (0x09) #define LM3530_ALS_IMPD_1_011kOhm (0x0A) #define LM3530_ALS_IMPD_941Ohm (0x0B) #define LM3530_ALS_IMPD_759Ohm (0x0C) #define LM3530_ALS_IMPD_719Ohm (0x0D) #define LM3530_ALS_IMPD_700Ohm (0x0E) #define LM3530_ALS_IMPD_667Ohm (0x0F) enum lm3530_mode { LM3530_BL_MODE_MANUAL = 0, /* "man" */ LM3530_BL_MODE_ALS, /* "als" */ LM3530_BL_MODE_PWM, /* "pwm" */ }; /* ALS input select */ enum lm3530_als_mode { LM3530_INPUT_AVRG = 0, /* ALS1 and ALS2 input average */ LM3530_INPUT_ALS1, /* ALS1 Input */ LM3530_INPUT_ALS2, /* ALS2 Input */ LM3530_INPUT_CEIL, /* Max of ALS1 and ALS2 */ }; /* PWM Platform Specific Data */ struct lm3530_pwm_data { void (*pwm_set_intensity) (int brightness, int max_brightness); int (*pwm_get_intensity) (int max_brightness); }; /** * struct lm3530_platform_data * @mode: mode of operation i.e. Manual, ALS or PWM * @als_input_mode: select source of ALS input - ALS1/2 or average * @max_current: full scale LED current * @pwm_pol_hi: PWM input polarity - active high/active low * @als_avrg_time: ALS input averaging time * @brt_ramp_law: brightness mapping mode - exponential/linear * @brt_ramp_fall: rate of fall of led current * @brt_ramp_rise: rate of rise of led current * @als1_resistor_sel: internal resistance from ALS1 input to ground * @als2_resistor_sel: internal resistance from ALS2 input to ground * @als_vmin: als input voltage calibrated for max brightness in mV * @als_vmax: als input voltage calibrated for min brightness in mV * @brt_val: brightness value (0-127) * @pwm_data: PWM control functions (only valid when the mode is PWM) */ struct lm3530_platform_data { enum lm3530_mode mode; enum lm3530_als_mode als_input_mode; u8 max_current; bool pwm_pol_hi; u8 als_avrg_time; bool brt_ramp_law; u8 brt_ramp_fall; u8 brt_ramp_rise; u8 als1_resistor_sel; u8 als2_resistor_sel; u32 als_vmin; u32 als_vmax; u8 brt_val; struct lm3530_pwm_data pwm_data; }; #endif /* _LINUX_LED_LM3530_H__ */ PK ! T8ՉL L rio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * RapidIO interconnect services * (RapidIO Interconnect Specification, http://www.rapidio.org) * * Copyright 2005 MontaVista Software, Inc. * Matt Porter <mporter@kernel.crashing.org> */ #ifndef LINUX_RIO_H #define LINUX_RIO_H #include <linux/types.h> #include <linux/ioport.h> #include <linux/list.h> #include <linux/errno.h> #include <linux/device.h> #include <linux/rio_regs.h> #include <linux/mod_devicetable.h> #ifdef CONFIG_RAPIDIO_DMA_ENGINE #include <linux/dmaengine.h> #endif #define RIO_NO_HOPCOUNT -1 #define RIO_INVALID_DESTID 0xffff #define RIO_MAX_MPORTS 8 #define RIO_MAX_MPORT_RESOURCES 16 #define RIO_MAX_DEV_RESOURCES 16 #define RIO_MAX_MPORT_NAME 40 #define RIO_GLOBAL_TABLE 0xff /* Indicates access of a switch's global routing table if it has multiple (or per port) tables */ #define RIO_INVALID_ROUTE 0xff /* Indicates that a route table entry is invalid (no route exists for the device ID) */ #define RIO_MAX_ROUTE_ENTRIES(size) (size ? (1 << 16) : (1 << 8)) #define RIO_ANY_DESTID(size) (size ? 0xffff : 0xff) #define RIO_MAX_MBOX 4 #define RIO_MAX_MSG_SIZE 0x1000 /* * Error values that may be returned by RIO functions. */ #define RIO_SUCCESSFUL 0x00 #define RIO_BAD_SIZE 0x81 /* * For RIO devices, the region numbers are assigned this way: * * 0 RapidIO outbound doorbells * 1-15 RapidIO memory regions * * For RIO master ports, the region number are assigned this way: * * 0 RapidIO inbound doorbells * 1 RapidIO inbound mailboxes * 2 RapidIO outbound mailboxes */ #define RIO_DOORBELL_RESOURCE 0 #define RIO_INB_MBOX_RESOURCE 1 #define RIO_OUTB_MBOX_RESOURCE 2 #define RIO_PW_MSG_SIZE 64 /* * A component tag value (stored in the component tag CSR) is used as device's * unique identifier assigned during enumeration. Besides being used for * identifying switches (which do not have device ID register), it also is used * by error management notification and therefore has to be assigned * to endpoints as well. */ #define RIO_CTAG_RESRVD 0xfffe0000 /* Reserved */ #define RIO_CTAG_UDEVID 0x0001ffff /* Unique device identifier */ extern struct bus_type rio_bus_type; extern struct class rio_mport_class; struct rio_mport; struct rio_dev; union rio_pw_msg; /** * struct rio_switch - RIO switch info * @node: Node in global list of switches * @route_table: Copy of switch routing table * @port_ok: Status of each port (one bit per port) - OK=1 or UNINIT=0 * @ops: pointer to switch-specific operations * @lock: lock to serialize operations updates * @nextdev: Array of per-port pointers to the next attached device */ struct rio_switch { struct list_head node; u8 *route_table; u32 port_ok; struct rio_switch_ops *ops; spinlock_t lock; struct rio_dev *nextdev[]; }; /** * struct rio_switch_ops - Per-switch operations * @owner: The module owner of this structure * @add_entry: Callback for switch-specific route add function * @get_entry: Callback for switch-specific route get function * @clr_table: Callback for switch-specific clear route table function * @set_domain: Callback for switch-specific domain setting function * @get_domain: Callback for switch-specific domain get function * @em_init: Callback for switch-specific error management init function * @em_handle: Callback for switch-specific error management handler function * * Defines the operations that are necessary to initialize/control * a particular RIO switch device. */ struct rio_switch_ops { struct module *owner; int (*add_entry) (struct rio_mport *mport, u16 destid, u8 hopcount, u16 table, u16 route_destid, u8 route_port); int (*get_entry) (struct rio_mport *mport, u16 destid, u8 hopcount, u16 table, u16 route_destid, u8 *route_port); int (*clr_table) (struct rio_mport *mport, u16 destid, u8 hopcount, u16 table); int (*set_domain) (struct rio_mport *mport, u16 destid, u8 hopcount, u8 sw_domain); int (*get_domain) (struct rio_mport *mport, u16 destid, u8 hopcount, u8 *sw_domain); int (*em_init) (struct rio_dev *dev); int (*em_handle) (struct rio_dev *dev, u8 swport); }; enum rio_device_state { RIO_DEVICE_INITIALIZING, RIO_DEVICE_RUNNING, RIO_DEVICE_GONE, RIO_DEVICE_SHUTDOWN, }; /** * struct rio_dev - RIO device info * @global_list: Node in list of all RIO devices * @net_list: Node in list of RIO devices in a network * @net: Network this device is a part of * @do_enum: Enumeration flag * @did: Device ID * @vid: Vendor ID * @device_rev: Device revision * @asm_did: Assembly device ID * @asm_vid: Assembly vendor ID * @asm_rev: Assembly revision * @efptr: Extended feature pointer * @pef: Processing element features * @swpinfo: Switch port info * @src_ops: Source operation capabilities * @dst_ops: Destination operation capabilities * @comp_tag: RIO component tag * @phys_efptr: RIO device extended features pointer * @phys_rmap: LP-Serial Register Map Type (1 or 2) * @em_efptr: RIO Error Management features pointer * @dma_mask: Mask of bits of RIO address this device implements * @driver: Driver claiming this device * @dev: Device model device * @riores: RIO resources this device owns * @pwcback: port-write callback function for this device * @destid: Network destination ID (or associated destid for switch) * @hopcount: Hopcount to this device * @prev: Previous RIO device connected to the current one * @state: device state * @rswitch: struct rio_switch (if valid for this device) */ struct rio_dev { struct list_head global_list; /* node in list of all RIO devices */ struct list_head net_list; /* node in per net list */ struct rio_net *net; /* RIO net this device resides in */ bool do_enum; u16 did; u16 vid; u32 device_rev; u16 asm_did; u16 asm_vid; u16 asm_rev; u16 efptr; u32 pef; u32 swpinfo; u32 src_ops; u32 dst_ops; u32 comp_tag; u32 phys_efptr; u32 phys_rmap; u32 em_efptr; u64 dma_mask; struct rio_driver *driver; /* RIO driver claiming this device */ struct device dev; /* LDM device structure */ struct resource riores[RIO_MAX_DEV_RESOURCES]; int (*pwcback) (struct rio_dev *rdev, union rio_pw_msg *msg, int step); u16 destid; u8 hopcount; struct rio_dev *prev; atomic_t state; struct rio_switch rswitch[]; /* RIO switch info */ }; #define rio_dev_g(n) list_entry(n, struct rio_dev, global_list) #define rio_dev_f(n) list_entry(n, struct rio_dev, net_list) #define to_rio_dev(n) container_of(n, struct rio_dev, dev) #define sw_to_rio_dev(n) container_of(n, struct rio_dev, rswitch[0]) #define to_rio_mport(n) container_of(n, struct rio_mport, dev) #define to_rio_net(n) container_of(n, struct rio_net, dev) /** * struct rio_msg - RIO message event * @res: Mailbox resource * @mcback: Message event callback */ struct rio_msg { struct resource *res; void (*mcback) (struct rio_mport * mport, void *dev_id, int mbox, int slot); }; /** * struct rio_dbell - RIO doorbell event * @node: Node in list of doorbell events * @res: Doorbell resource * @dinb: Doorbell event callback * @dev_id: Device specific pointer to pass on event */ struct rio_dbell { struct list_head node; struct resource *res; void (*dinb) (struct rio_mport *mport, void *dev_id, u16 src, u16 dst, u16 info); void *dev_id; }; /** * struct rio_mport - RIO master port info * @dbells: List of doorbell events * @pwrites: List of portwrite events * @node: Node in global list of master ports * @nnode: Node in network list of master ports * @net: RIO net this mport is attached to * @lock: lock to synchronize lists manipulations * @iores: I/O mem resource that this master port interface owns * @riores: RIO resources that this master port interfaces owns * @inb_msg: RIO inbound message event descriptors * @outb_msg: RIO outbound message event descriptors * @host_deviceid: Host device ID associated with this master port * @ops: configuration space functions * @id: Port ID, unique among all ports * @index: Port index, unique among all port interfaces of the same type * @sys_size: RapidIO common transport system size * @phys_efptr: RIO port extended features pointer * @phys_rmap: LP-Serial EFB Register Mapping type (1 or 2). * @name: Port name string * @dev: device structure associated with an mport * @priv: Master port private data * @dma: DMA device associated with mport * @nscan: RapidIO network enumeration/discovery operations * @state: mport device state * @pwe_refcnt: port-write enable ref counter to track enable/disable requests */ struct rio_mport { struct list_head dbells; /* list of doorbell events */ struct list_head pwrites; /* list of portwrite events */ struct list_head node; /* node in global list of ports */ struct list_head nnode; /* node in net list of ports */ struct rio_net *net; /* RIO net this mport is attached to */ struct mutex lock; struct resource iores; struct resource riores[RIO_MAX_MPORT_RESOURCES]; struct rio_msg inb_msg[RIO_MAX_MBOX]; struct rio_msg outb_msg[RIO_MAX_MBOX]; int host_deviceid; /* Host device ID */ struct rio_ops *ops; /* low-level architecture-dependent routines */ unsigned char id; /* port ID, unique among all ports */ unsigned char index; /* port index, unique among all port interfaces of the same type */ unsigned int sys_size; /* RapidIO common transport system size. * 0 - Small size. 256 devices. * 1 - Large size, 65536 devices. */ u32 phys_efptr; u32 phys_rmap; unsigned char name[RIO_MAX_MPORT_NAME]; struct device dev; void *priv; /* Master port private data */ #ifdef CONFIG_RAPIDIO_DMA_ENGINE struct dma_device dma; #endif struct rio_scan *nscan; atomic_t state; unsigned int pwe_refcnt; }; static inline int rio_mport_is_running(struct rio_mport *mport) { return atomic_read(&mport->state) == RIO_DEVICE_RUNNING; } /* * Enumeration/discovery control flags */ #define RIO_SCAN_ENUM_NO_WAIT 0x00000001 /* Do not wait for enum completed */ /** * struct rio_net - RIO network info * @node: Node in global list of RIO networks * @devices: List of devices in this network * @switches: List of switches in this network * @mports: List of master ports accessing this network * @hport: Default port for accessing this network * @id: RIO network ID * @dev: Device object * @enum_data: private data specific to a network enumerator * @release: enumerator-specific release callback */ struct rio_net { struct list_head node; /* node in list of networks */ struct list_head devices; /* list of devices in this net */ struct list_head switches; /* list of switches in this net */ struct list_head mports; /* list of ports accessing net */ struct rio_mport *hport; /* primary port for accessing net */ unsigned char id; /* RIO network ID */ struct device dev; void *enum_data; /* private data for enumerator of the network */ void (*release)(struct rio_net *net); }; enum rio_link_speed { RIO_LINK_DOWN = 0, /* SRIO Link not initialized */ RIO_LINK_125 = 1, /* 1.25 GBaud */ RIO_LINK_250 = 2, /* 2.5 GBaud */ RIO_LINK_312 = 3, /* 3.125 GBaud */ RIO_LINK_500 = 4, /* 5.0 GBaud */ RIO_LINK_625 = 5 /* 6.25 GBaud */ }; enum rio_link_width { RIO_LINK_1X = 0, RIO_LINK_1XR = 1, RIO_LINK_2X = 3, RIO_LINK_4X = 2, RIO_LINK_8X = 4, RIO_LINK_16X = 5 }; enum rio_mport_flags { RIO_MPORT_DMA = (1 << 0), /* supports DMA data transfers */ RIO_MPORT_DMA_SG = (1 << 1), /* DMA supports HW SG mode */ RIO_MPORT_IBSG = (1 << 2), /* inbound mapping supports SG */ }; /** * struct rio_mport_attr - RIO mport device attributes * @flags: mport device capability flags * @link_speed: SRIO link speed value (as defined by RapidIO specification) * @link_width: SRIO link width value (as defined by RapidIO specification) * @dma_max_sge: number of SG list entries that can be handled by DMA channel(s) * @dma_max_size: max number of bytes in single DMA transfer (SG entry) * @dma_align: alignment shift for DMA operations (as for other DMA operations) */ struct rio_mport_attr { int flags; int link_speed; int link_width; /* DMA capability info: valid only if RIO_MPORT_DMA flag is set */ int dma_max_sge; int dma_max_size; int dma_align; }; /* Low-level architecture-dependent routines */ /** * struct rio_ops - Low-level RIO configuration space operations * @lcread: Callback to perform local (master port) read of config space. * @lcwrite: Callback to perform local (master port) write of config space. * @cread: Callback to perform network read of config space. * @cwrite: Callback to perform network write of config space. * @dsend: Callback to send a doorbell message. * @pwenable: Callback to enable/disable port-write message handling. * @open_outb_mbox: Callback to initialize outbound mailbox. * @close_outb_mbox: Callback to shut down outbound mailbox. * @open_inb_mbox: Callback to initialize inbound mailbox. * @close_inb_mbox: Callback to shut down inbound mailbox. * @add_outb_message: Callback to add a message to an outbound mailbox queue. * @add_inb_buffer: Callback to add a buffer to an inbound mailbox queue. * @get_inb_message: Callback to get a message from an inbound mailbox queue. * @map_inb: Callback to map RapidIO address region into local memory space. * @unmap_inb: Callback to unmap RapidIO address region mapped with map_inb(). * @query_mport: Callback to query mport device attributes. * @map_outb: Callback to map outbound address region into local memory space. * @unmap_outb: Callback to unmap outbound RapidIO address region. */ struct rio_ops { int (*lcread) (struct rio_mport *mport, int index, u32 offset, int len, u32 *data); int (*lcwrite) (struct rio_mport *mport, int index, u32 offset, int len, u32 data); int (*cread) (struct rio_mport *mport, int index, u16 destid, u8 hopcount, u32 offset, int len, u32 *data); int (*cwrite) (struct rio_mport *mport, int index, u16 destid, u8 hopcount, u32 offset, int len, u32 data); int (*dsend) (struct rio_mport *mport, int index, u16 destid, u16 data); int (*pwenable) (struct rio_mport *mport, int enable); int (*open_outb_mbox)(struct rio_mport *mport, void *dev_id, int mbox, int entries); void (*close_outb_mbox)(struct rio_mport *mport, int mbox); int (*open_inb_mbox)(struct rio_mport *mport, void *dev_id, int mbox, int entries); void (*close_inb_mbox)(struct rio_mport *mport, int mbox); int (*add_outb_message)(struct rio_mport *mport, struct rio_dev *rdev, int mbox, void *buffer, size_t len); int (*add_inb_buffer)(struct rio_mport *mport, int mbox, void *buf); void *(*get_inb_message)(struct rio_mport *mport, int mbox); int (*map_inb)(struct rio_mport *mport, dma_addr_t lstart, u64 rstart, u64 size, u32 flags); void (*unmap_inb)(struct rio_mport *mport, dma_addr_t lstart); int (*query_mport)(struct rio_mport *mport, struct rio_mport_attr *attr); int (*map_outb)(struct rio_mport *mport, u16 destid, u64 rstart, u32 size, u32 flags, dma_addr_t *laddr); void (*unmap_outb)(struct rio_mport *mport, u16 destid, u64 rstart); }; #define RIO_RESOURCE_MEM 0x00000100 #define RIO_RESOURCE_DOORBELL 0x00000200 #define RIO_RESOURCE_MAILBOX 0x00000400 #define RIO_RESOURCE_CACHEABLE 0x00010000 #define RIO_RESOURCE_PCI 0x00020000 #define RIO_RESOURCE_BUSY 0x80000000 /** * struct rio_driver - RIO driver info * @node: Node in list of drivers * @name: RIO driver name * @id_table: RIO device ids to be associated with this driver * @probe: RIO device inserted * @remove: RIO device removed * @shutdown: shutdown notification callback * @suspend: RIO device suspended * @resume: RIO device awakened * @enable_wake: RIO device enable wake event * @driver: LDM driver struct * * Provides info on a RIO device driver for insertion/removal and * power management purposes. */ struct rio_driver { struct list_head node; char *name; const struct rio_device_id *id_table; int (*probe) (struct rio_dev * dev, const struct rio_device_id * id); void (*remove) (struct rio_dev * dev); void (*shutdown)(struct rio_dev *dev); int (*suspend) (struct rio_dev * dev, u32 state); int (*resume) (struct rio_dev * dev); int (*enable_wake) (struct rio_dev * dev, u32 state, int enable); struct device_driver driver; }; #define to_rio_driver(drv) container_of(drv,struct rio_driver, driver) union rio_pw_msg { struct { u32 comptag; /* Component Tag CSR */ u32 errdetect; /* Port N Error Detect CSR */ u32 is_port; /* Implementation specific + PortID */ u32 ltlerrdet; /* LTL Error Detect CSR */ u32 padding[12]; } em; u32 raw[RIO_PW_MSG_SIZE/sizeof(u32)]; }; #ifdef CONFIG_RAPIDIO_DMA_ENGINE /* * enum rio_write_type - RIO write transaction types used in DMA transfers * * Note: RapidIO specification defines write (NWRITE) and * write-with-response (NWRITE_R) data transfer operations. * Existing DMA controllers that service RapidIO may use one of these operations * for entire data transfer or their combination with only the last data packet * requires response. */ enum rio_write_type { RDW_DEFAULT, /* default method used by DMA driver */ RDW_ALL_NWRITE, /* all packets use NWRITE */ RDW_ALL_NWRITE_R, /* all packets use NWRITE_R */ RDW_LAST_NWRITE_R, /* last packet uses NWRITE_R, others - NWRITE */ }; struct rio_dma_ext { u16 destid; u64 rio_addr; /* low 64-bits of 66-bit RapidIO address */ u8 rio_addr_u; /* upper 2-bits of 66-bit RapidIO address */ enum rio_write_type wr_type; /* preferred RIO write operation type */ }; struct rio_dma_data { /* Local data (as scatterlist) */ struct scatterlist *sg; /* I/O scatter list */ unsigned int sg_len; /* size of scatter list */ /* Remote device address (flat buffer) */ u64 rio_addr; /* low 64-bits of 66-bit RapidIO address */ u8 rio_addr_u; /* upper 2-bits of 66-bit RapidIO address */ enum rio_write_type wr_type; /* preferred RIO write operation type */ }; static inline struct rio_mport *dma_to_mport(struct dma_device *ddev) { return container_of(ddev, struct rio_mport, dma); } #endif /* CONFIG_RAPIDIO_DMA_ENGINE */ /** * struct rio_scan - RIO enumeration and discovery operations * @owner: The module owner of this structure * @enumerate: Callback to perform RapidIO fabric enumeration. * @discover: Callback to perform RapidIO fabric discovery. */ struct rio_scan { struct module *owner; int (*enumerate)(struct rio_mport *mport, u32 flags); int (*discover)(struct rio_mport *mport, u32 flags); }; /** * struct rio_scan_node - list node to register RapidIO enumeration and * discovery methods with RapidIO core. * @mport_id: ID of an mport (net) serviced by this enumerator * @node: node in global list of registered enumerators * @ops: RIO enumeration and discovery operations */ struct rio_scan_node { int mport_id; struct list_head node; struct rio_scan *ops; }; /* Architecture and hardware-specific functions */ extern int rio_mport_initialize(struct rio_mport *); extern int rio_register_mport(struct rio_mport *); extern int rio_unregister_mport(struct rio_mport *); extern int rio_open_inb_mbox(struct rio_mport *, void *, int, int); extern void rio_close_inb_mbox(struct rio_mport *, int); extern int rio_open_outb_mbox(struct rio_mport *, void *, int, int); extern void rio_close_outb_mbox(struct rio_mport *, int); extern int rio_query_mport(struct rio_mport *port, struct rio_mport_attr *mport_attr); #endif /* LINUX_RIO_H */ PK ! �U+�� � blk-pm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _BLK_PM_H_ #define _BLK_PM_H_ struct device; struct request_queue; /* * block layer runtime pm functions */ #ifdef CONFIG_PM extern void blk_pm_runtime_init(struct request_queue *q, struct device *dev); extern int blk_pre_runtime_suspend(struct request_queue *q); extern void blk_post_runtime_suspend(struct request_queue *q, int err); extern void blk_pre_runtime_resume(struct request_queue *q); extern void blk_post_runtime_resume(struct request_queue *q); extern void blk_set_runtime_active(struct request_queue *q); #else static inline void blk_pm_runtime_init(struct request_queue *q, struct device *dev) {} #endif #endif /* _BLK_PM_H_ */ PK ! �Tl/�U �U drbd_genl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * General overview: * full generic netlink message: * |nlmsghdr|genlmsghdr|<payload> * * payload: * |optional fixed size family header|<sequence of netlink attributes> * * sequence of netlink attributes: * I chose to have all "top level" attributes NLA_NESTED, * corresponding to some real struct. * So we have a sequence of |tla, len|<nested nla sequence> * * nested nla sequence: * may be empty, or contain a sequence of netlink attributes * representing the struct fields. * * The tag number of any field (regardless of containing struct) * will be available as T_ ## field_name, * so you cannot have the same field name in two differnt structs. * * The tag numbers themselves are per struct, though, * so should always begin at 1 (not 0, that is the special "NLA_UNSPEC" type, * which we won't use here). * The tag numbers are used as index in the respective nla_policy array. * * GENL_struct(tag_name, tag_number, struct name, struct fields) - struct and policy * genl_magic_struct.h * generates the struct declaration, * generates an entry in the tla enum, * genl_magic_func.h * generates an entry in the static tla policy * with .type = NLA_NESTED * generates the static <struct_name>_nl_policy definition, * and static conversion functions * * genl_magic_func.h * * GENL_mc_group(group) * genl_magic_struct.h * does nothing * genl_magic_func.h * defines and registers the mcast group, * and provides a send helper * * GENL_notification(op_name, op_num, mcast_group, tla list) * These are notifications to userspace. * * genl_magic_struct.h * generates an entry in the genl_ops enum, * genl_magic_func.h * does nothing * * mcast group: the name of the mcast group this notification should be * expected on * tla list: the list of expected top level attributes, * for documentation and sanity checking. * * GENL_op(op_name, op_num, flags and handler, tla list) - "genl operations" * These are requests from userspace. * * _op and _notification share the same "number space", * op_nr will be assigned to "genlmsghdr->cmd" * * genl_magic_struct.h * generates an entry in the genl_ops enum, * genl_magic_func.h * generates an entry in the static genl_ops array, * and static register/unregister functions to * genl_register_family(). * * flags and handler: * GENL_op_init( .doit = x, .dumpit = y, .flags = something) * GENL_doit(x) => .dumpit = NULL, .flags = GENL_ADMIN_PERM * tla list: the list of expected top level attributes, * for documentation and sanity checking. */ /* * STRUCTS */ /* this is sent kernel -> userland on various error conditions, and contains * informational textual info, which is supposedly human readable. * The computer relevant return code is in the drbd_genlmsghdr. */ GENL_struct(DRBD_NLA_CFG_REPLY, 1, drbd_cfg_reply, /* "arbitrary" size strings, nla_policy.len = 0 */ __str_field(1, DRBD_GENLA_F_MANDATORY, info_text, 0) ) /* Configuration requests typically need a context to operate on. * Possible keys are device minor (fits in the drbd_genlmsghdr), * the replication link (aka connection) name, * and/or the replication group (aka resource) name, * and the volume id within the resource. */ GENL_struct(DRBD_NLA_CFG_CONTEXT, 2, drbd_cfg_context, __u32_field(1, DRBD_GENLA_F_MANDATORY, ctx_volume) __str_field(2, DRBD_GENLA_F_MANDATORY, ctx_resource_name, 128) __bin_field(3, DRBD_GENLA_F_MANDATORY, ctx_my_addr, 128) __bin_field(4, DRBD_GENLA_F_MANDATORY, ctx_peer_addr, 128) ) GENL_struct(DRBD_NLA_DISK_CONF, 3, disk_conf, __str_field(1, DRBD_F_REQUIRED | DRBD_F_INVARIANT, backing_dev, 128) __str_field(2, DRBD_F_REQUIRED | DRBD_F_INVARIANT, meta_dev, 128) __s32_field(3, DRBD_F_REQUIRED | DRBD_F_INVARIANT, meta_dev_idx) /* use the resize command to try and change the disk_size */ __u64_field(4, DRBD_GENLA_F_MANDATORY | DRBD_F_INVARIANT, disk_size) /* we could change the max_bio_bvecs, * but it won't propagate through the stack */ __u32_field(5, DRBD_GENLA_F_MANDATORY | DRBD_F_INVARIANT, max_bio_bvecs) __u32_field_def(6, DRBD_GENLA_F_MANDATORY, on_io_error, DRBD_ON_IO_ERROR_DEF) __u32_field_def(7, DRBD_GENLA_F_MANDATORY, fencing, DRBD_FENCING_DEF) __u32_field_def(8, DRBD_GENLA_F_MANDATORY, resync_rate, DRBD_RESYNC_RATE_DEF) __s32_field_def(9, DRBD_GENLA_F_MANDATORY, resync_after, DRBD_MINOR_NUMBER_DEF) __u32_field_def(10, DRBD_GENLA_F_MANDATORY, al_extents, DRBD_AL_EXTENTS_DEF) __u32_field_def(11, DRBD_GENLA_F_MANDATORY, c_plan_ahead, DRBD_C_PLAN_AHEAD_DEF) __u32_field_def(12, DRBD_GENLA_F_MANDATORY, c_delay_target, DRBD_C_DELAY_TARGET_DEF) __u32_field_def(13, DRBD_GENLA_F_MANDATORY, c_fill_target, DRBD_C_FILL_TARGET_DEF) __u32_field_def(14, DRBD_GENLA_F_MANDATORY, c_max_rate, DRBD_C_MAX_RATE_DEF) __u32_field_def(15, DRBD_GENLA_F_MANDATORY, c_min_rate, DRBD_C_MIN_RATE_DEF) __u32_field_def(20, DRBD_GENLA_F_MANDATORY, disk_timeout, DRBD_DISK_TIMEOUT_DEF) __u32_field_def(21, 0 /* OPTIONAL */, read_balancing, DRBD_READ_BALANCING_DEF) __u32_field_def(25, 0 /* OPTIONAL */, rs_discard_granularity, DRBD_RS_DISCARD_GRANULARITY_DEF) __flg_field_def(16, DRBD_GENLA_F_MANDATORY, disk_barrier, DRBD_DISK_BARRIER_DEF) __flg_field_def(17, DRBD_GENLA_F_MANDATORY, disk_flushes, DRBD_DISK_FLUSHES_DEF) __flg_field_def(18, DRBD_GENLA_F_MANDATORY, disk_drain, DRBD_DISK_DRAIN_DEF) __flg_field_def(19, DRBD_GENLA_F_MANDATORY, md_flushes, DRBD_MD_FLUSHES_DEF) __flg_field_def(23, 0 /* OPTIONAL */, al_updates, DRBD_AL_UPDATES_DEF) __flg_field_def(24, 0 /* OPTIONAL */, discard_zeroes_if_aligned, DRBD_DISCARD_ZEROES_IF_ALIGNED_DEF) __flg_field_def(26, 0 /* OPTIONAL */, disable_write_same, DRBD_DISABLE_WRITE_SAME_DEF) ) GENL_struct(DRBD_NLA_RESOURCE_OPTS, 4, res_opts, __str_field_def(1, DRBD_GENLA_F_MANDATORY, cpu_mask, DRBD_CPU_MASK_SIZE) __u32_field_def(2, DRBD_GENLA_F_MANDATORY, on_no_data, DRBD_ON_NO_DATA_DEF) ) GENL_struct(DRBD_NLA_NET_CONF, 5, net_conf, __str_field_def(1, DRBD_GENLA_F_MANDATORY | DRBD_F_SENSITIVE, shared_secret, SHARED_SECRET_MAX) __str_field_def(2, DRBD_GENLA_F_MANDATORY, cram_hmac_alg, SHARED_SECRET_MAX) __str_field_def(3, DRBD_GENLA_F_MANDATORY, integrity_alg, SHARED_SECRET_MAX) __str_field_def(4, DRBD_GENLA_F_MANDATORY, verify_alg, SHARED_SECRET_MAX) __str_field_def(5, DRBD_GENLA_F_MANDATORY, csums_alg, SHARED_SECRET_MAX) __u32_field_def(6, DRBD_GENLA_F_MANDATORY, wire_protocol, DRBD_PROTOCOL_DEF) __u32_field_def(7, DRBD_GENLA_F_MANDATORY, connect_int, DRBD_CONNECT_INT_DEF) __u32_field_def(8, DRBD_GENLA_F_MANDATORY, timeout, DRBD_TIMEOUT_DEF) __u32_field_def(9, DRBD_GENLA_F_MANDATORY, ping_int, DRBD_PING_INT_DEF) __u32_field_def(10, DRBD_GENLA_F_MANDATORY, ping_timeo, DRBD_PING_TIMEO_DEF) __u32_field_def(11, DRBD_GENLA_F_MANDATORY, sndbuf_size, DRBD_SNDBUF_SIZE_DEF) __u32_field_def(12, DRBD_GENLA_F_MANDATORY, rcvbuf_size, DRBD_RCVBUF_SIZE_DEF) __u32_field_def(13, DRBD_GENLA_F_MANDATORY, ko_count, DRBD_KO_COUNT_DEF) __u32_field_def(14, DRBD_GENLA_F_MANDATORY, max_buffers, DRBD_MAX_BUFFERS_DEF) __u32_field_def(15, DRBD_GENLA_F_MANDATORY, max_epoch_size, DRBD_MAX_EPOCH_SIZE_DEF) __u32_field_def(16, DRBD_GENLA_F_MANDATORY, unplug_watermark, DRBD_UNPLUG_WATERMARK_DEF) __u32_field_def(17, DRBD_GENLA_F_MANDATORY, after_sb_0p, DRBD_AFTER_SB_0P_DEF) __u32_field_def(18, DRBD_GENLA_F_MANDATORY, after_sb_1p, DRBD_AFTER_SB_1P_DEF) __u32_field_def(19, DRBD_GENLA_F_MANDATORY, after_sb_2p, DRBD_AFTER_SB_2P_DEF) __u32_field_def(20, DRBD_GENLA_F_MANDATORY, rr_conflict, DRBD_RR_CONFLICT_DEF) __u32_field_def(21, DRBD_GENLA_F_MANDATORY, on_congestion, DRBD_ON_CONGESTION_DEF) __u32_field_def(22, DRBD_GENLA_F_MANDATORY, cong_fill, DRBD_CONG_FILL_DEF) __u32_field_def(23, DRBD_GENLA_F_MANDATORY, cong_extents, DRBD_CONG_EXTENTS_DEF) __flg_field_def(24, DRBD_GENLA_F_MANDATORY, two_primaries, DRBD_ALLOW_TWO_PRIMARIES_DEF) __flg_field(25, DRBD_GENLA_F_MANDATORY | DRBD_F_INVARIANT, discard_my_data) __flg_field_def(26, DRBD_GENLA_F_MANDATORY, tcp_cork, DRBD_TCP_CORK_DEF) __flg_field_def(27, DRBD_GENLA_F_MANDATORY, always_asbp, DRBD_ALWAYS_ASBP_DEF) __flg_field(28, DRBD_GENLA_F_MANDATORY | DRBD_F_INVARIANT, tentative) __flg_field_def(29, DRBD_GENLA_F_MANDATORY, use_rle, DRBD_USE_RLE_DEF) /* 9: __u32_field_def(30, DRBD_GENLA_F_MANDATORY, fencing_policy, DRBD_FENCING_DEF) */ /* 9: __str_field_def(31, DRBD_GENLA_F_MANDATORY, name, SHARED_SECRET_MAX) */ /* 9: __u32_field(32, DRBD_F_REQUIRED | DRBD_F_INVARIANT, peer_node_id) */ __flg_field_def(33, 0 /* OPTIONAL */, csums_after_crash_only, DRBD_CSUMS_AFTER_CRASH_ONLY_DEF) __u32_field_def(34, 0 /* OPTIONAL */, sock_check_timeo, DRBD_SOCKET_CHECK_TIMEO_DEF) ) GENL_struct(DRBD_NLA_SET_ROLE_PARMS, 6, set_role_parms, __flg_field(1, DRBD_GENLA_F_MANDATORY, assume_uptodate) ) GENL_struct(DRBD_NLA_RESIZE_PARMS, 7, resize_parms, __u64_field(1, DRBD_GENLA_F_MANDATORY, resize_size) __flg_field(2, DRBD_GENLA_F_MANDATORY, resize_force) __flg_field(3, DRBD_GENLA_F_MANDATORY, no_resync) __u32_field_def(4, 0 /* OPTIONAL */, al_stripes, DRBD_AL_STRIPES_DEF) __u32_field_def(5, 0 /* OPTIONAL */, al_stripe_size, DRBD_AL_STRIPE_SIZE_DEF) ) GENL_struct(DRBD_NLA_STATE_INFO, 8, state_info, /* the reason of the broadcast, * if this is an event triggered broadcast. */ __u32_field(1, DRBD_GENLA_F_MANDATORY, sib_reason) __u32_field(2, DRBD_F_REQUIRED, current_state) __u64_field(3, DRBD_GENLA_F_MANDATORY, capacity) __u64_field(4, DRBD_GENLA_F_MANDATORY, ed_uuid) /* These are for broadcast from after state change work. * prev_state and new_state are from the moment the state change took * place, new_state is not neccessarily the same as current_state, * there may have been more state changes since. Which will be * broadcasted soon, in their respective after state change work. */ __u32_field(5, DRBD_GENLA_F_MANDATORY, prev_state) __u32_field(6, DRBD_GENLA_F_MANDATORY, new_state) /* if we have a local disk: */ __bin_field(7, DRBD_GENLA_F_MANDATORY, uuids, (UI_SIZE*sizeof(__u64))) __u32_field(8, DRBD_GENLA_F_MANDATORY, disk_flags) __u64_field(9, DRBD_GENLA_F_MANDATORY, bits_total) __u64_field(10, DRBD_GENLA_F_MANDATORY, bits_oos) /* and in case resync or online verify is active */ __u64_field(11, DRBD_GENLA_F_MANDATORY, bits_rs_total) __u64_field(12, DRBD_GENLA_F_MANDATORY, bits_rs_failed) /* for pre and post notifications of helper execution */ __str_field(13, DRBD_GENLA_F_MANDATORY, helper, 32) __u32_field(14, DRBD_GENLA_F_MANDATORY, helper_exit_code) __u64_field(15, 0, send_cnt) __u64_field(16, 0, recv_cnt) __u64_field(17, 0, read_cnt) __u64_field(18, 0, writ_cnt) __u64_field(19, 0, al_writ_cnt) __u64_field(20, 0, bm_writ_cnt) __u32_field(21, 0, ap_bio_cnt) __u32_field(22, 0, ap_pending_cnt) __u32_field(23, 0, rs_pending_cnt) ) GENL_struct(DRBD_NLA_START_OV_PARMS, 9, start_ov_parms, __u64_field(1, DRBD_GENLA_F_MANDATORY, ov_start_sector) __u64_field(2, DRBD_GENLA_F_MANDATORY, ov_stop_sector) ) GENL_struct(DRBD_NLA_NEW_C_UUID_PARMS, 10, new_c_uuid_parms, __flg_field(1, DRBD_GENLA_F_MANDATORY, clear_bm) ) GENL_struct(DRBD_NLA_TIMEOUT_PARMS, 11, timeout_parms, __u32_field(1, DRBD_F_REQUIRED, timeout_type) ) GENL_struct(DRBD_NLA_DISCONNECT_PARMS, 12, disconnect_parms, __flg_field(1, DRBD_GENLA_F_MANDATORY, force_disconnect) ) GENL_struct(DRBD_NLA_DETACH_PARMS, 13, detach_parms, __flg_field(1, DRBD_GENLA_F_MANDATORY, force_detach) ) GENL_struct(DRBD_NLA_RESOURCE_INFO, 15, resource_info, __u32_field(1, 0, res_role) __flg_field(2, 0, res_susp) __flg_field(3, 0, res_susp_nod) __flg_field(4, 0, res_susp_fen) /* __flg_field(5, 0, res_weak) */ ) GENL_struct(DRBD_NLA_DEVICE_INFO, 16, device_info, __u32_field(1, 0, dev_disk_state) ) GENL_struct(DRBD_NLA_CONNECTION_INFO, 17, connection_info, __u32_field(1, 0, conn_connection_state) __u32_field(2, 0, conn_role) ) GENL_struct(DRBD_NLA_PEER_DEVICE_INFO, 18, peer_device_info, __u32_field(1, 0, peer_repl_state) __u32_field(2, 0, peer_disk_state) __u32_field(3, 0, peer_resync_susp_user) __u32_field(4, 0, peer_resync_susp_peer) __u32_field(5, 0, peer_resync_susp_dependency) ) GENL_struct(DRBD_NLA_RESOURCE_STATISTICS, 19, resource_statistics, __u32_field(1, 0, res_stat_write_ordering) ) GENL_struct(DRBD_NLA_DEVICE_STATISTICS, 20, device_statistics, __u64_field(1, 0, dev_size) /* (sectors) */ __u64_field(2, 0, dev_read) /* (sectors) */ __u64_field(3, 0, dev_write) /* (sectors) */ __u64_field(4, 0, dev_al_writes) /* activity log writes (count) */ __u64_field(5, 0, dev_bm_writes) /* bitmap writes (count) */ __u32_field(6, 0, dev_upper_pending) /* application requests in progress */ __u32_field(7, 0, dev_lower_pending) /* backing device requests in progress */ __flg_field(8, 0, dev_upper_blocked) __flg_field(9, 0, dev_lower_blocked) __flg_field(10, 0, dev_al_suspended) /* activity log suspended */ __u64_field(11, 0, dev_exposed_data_uuid) __u64_field(12, 0, dev_current_uuid) __u32_field(13, 0, dev_disk_flags) __bin_field(14, 0, history_uuids, HISTORY_UUIDS * sizeof(__u64)) ) GENL_struct(DRBD_NLA_CONNECTION_STATISTICS, 21, connection_statistics, __flg_field(1, 0, conn_congested) ) GENL_struct(DRBD_NLA_PEER_DEVICE_STATISTICS, 22, peer_device_statistics, __u64_field(1, 0, peer_dev_received) /* sectors */ __u64_field(2, 0, peer_dev_sent) /* sectors */ __u32_field(3, 0, peer_dev_pending) /* number of requests */ __u32_field(4, 0, peer_dev_unacked) /* number of requests */ __u64_field(5, 0, peer_dev_out_of_sync) /* sectors */ __u64_field(6, 0, peer_dev_resync_failed) /* sectors */ __u64_field(7, 0, peer_dev_bitmap_uuid) __u32_field(9, 0, peer_dev_flags) ) GENL_struct(DRBD_NLA_NOTIFICATION_HEADER, 23, drbd_notification_header, __u32_field(1, DRBD_GENLA_F_MANDATORY, nh_type) ) GENL_struct(DRBD_NLA_HELPER, 24, drbd_helper_info, __str_field(1, DRBD_GENLA_F_MANDATORY, helper_name, 32) __u32_field(2, DRBD_GENLA_F_MANDATORY, helper_status) ) /* * Notifications and commands (genlmsghdr->cmd) */ GENL_mc_group(events) /* kernel -> userspace announcement of changes */ GENL_notification( DRBD_EVENT, 1, events, GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_STATE_INFO, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NET_CONF, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_DISK_CONF, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_SYNCER_CONF, DRBD_GENLA_F_MANDATORY) ) /* query kernel for specific or all info */ GENL_op( DRBD_ADM_GET_STATUS, 2, GENL_op_init( .doit = drbd_adm_get_status, .dumpit = drbd_adm_get_status_all, /* anyone may ask for the status, * it is broadcasted anyways */ ), /* To select the object .doit. * Or a subset of objects in .dumpit. */ GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_GENLA_F_MANDATORY) ) /* add DRBD minor devices as volumes to resources */ GENL_op(DRBD_ADM_NEW_MINOR, 5, GENL_doit(drbd_adm_new_minor), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_DEL_MINOR, 6, GENL_doit(drbd_adm_del_minor), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) /* add or delete resources */ GENL_op(DRBD_ADM_NEW_RESOURCE, 7, GENL_doit(drbd_adm_new_resource), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_DEL_RESOURCE, 8, GENL_doit(drbd_adm_del_resource), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_RESOURCE_OPTS, 9, GENL_doit(drbd_adm_resource_opts), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_RESOURCE_OPTS, DRBD_GENLA_F_MANDATORY) ) GENL_op( DRBD_ADM_CONNECT, 10, GENL_doit(drbd_adm_connect), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NET_CONF, DRBD_F_REQUIRED) ) GENL_op( DRBD_ADM_CHG_NET_OPTS, 29, GENL_doit(drbd_adm_net_opts), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NET_CONF, DRBD_F_REQUIRED) ) GENL_op(DRBD_ADM_DISCONNECT, 11, GENL_doit(drbd_adm_disconnect), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_ATTACH, 12, GENL_doit(drbd_adm_attach), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_DISK_CONF, DRBD_F_REQUIRED) ) GENL_op(DRBD_ADM_CHG_DISK_OPTS, 28, GENL_doit(drbd_adm_disk_opts), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_DISK_OPTS, DRBD_F_REQUIRED) ) GENL_op( DRBD_ADM_RESIZE, 13, GENL_doit(drbd_adm_resize), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_RESIZE_PARMS, DRBD_GENLA_F_MANDATORY) ) GENL_op( DRBD_ADM_PRIMARY, 14, GENL_doit(drbd_adm_set_role), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_SET_ROLE_PARMS, DRBD_F_REQUIRED) ) GENL_op( DRBD_ADM_SECONDARY, 15, GENL_doit(drbd_adm_set_role), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_SET_ROLE_PARMS, DRBD_F_REQUIRED) ) GENL_op( DRBD_ADM_NEW_C_UUID, 16, GENL_doit(drbd_adm_new_c_uuid), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NEW_C_UUID_PARMS, DRBD_GENLA_F_MANDATORY) ) GENL_op( DRBD_ADM_START_OV, 17, GENL_doit(drbd_adm_start_ov), GENL_tla_expected(DRBD_NLA_START_OV_PARMS, DRBD_GENLA_F_MANDATORY) ) GENL_op(DRBD_ADM_DETACH, 18, GENL_doit(drbd_adm_detach), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_DETACH_PARMS, DRBD_GENLA_F_MANDATORY)) GENL_op(DRBD_ADM_INVALIDATE, 19, GENL_doit(drbd_adm_invalidate), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_INVAL_PEER, 20, GENL_doit(drbd_adm_invalidate_peer), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_PAUSE_SYNC, 21, GENL_doit(drbd_adm_pause_sync), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_RESUME_SYNC, 22, GENL_doit(drbd_adm_resume_sync), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_SUSPEND_IO, 23, GENL_doit(drbd_adm_suspend_io), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_RESUME_IO, 24, GENL_doit(drbd_adm_resume_io), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_OUTDATE, 25, GENL_doit(drbd_adm_outdate), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_GET_TIMEOUT_TYPE, 26, GENL_doit(drbd_adm_get_timeout_type), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_DOWN, 27, GENL_doit(drbd_adm_down), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED)) GENL_op(DRBD_ADM_GET_RESOURCES, 30, GENL_op_init( .dumpit = drbd_adm_dump_resources, ), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_RESOURCE_INFO, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_RESOURCE_STATISTICS, DRBD_GENLA_F_MANDATORY)) GENL_op(DRBD_ADM_GET_DEVICES, 31, GENL_op_init( .dumpit = drbd_adm_dump_devices, .done = drbd_adm_dump_devices_done, ), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_DEVICE_INFO, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_DEVICE_STATISTICS, DRBD_GENLA_F_MANDATORY)) GENL_op(DRBD_ADM_GET_CONNECTIONS, 32, GENL_op_init( .dumpit = drbd_adm_dump_connections, .done = drbd_adm_dump_connections_done, ), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_CONNECTION_INFO, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_CONNECTION_STATISTICS, DRBD_GENLA_F_MANDATORY)) GENL_op(DRBD_ADM_GET_PEER_DEVICES, 33, GENL_op_init( .dumpit = drbd_adm_dump_peer_devices, .done = drbd_adm_dump_peer_devices_done, ), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_PEER_DEVICE_INFO, DRBD_GENLA_F_MANDATORY) GENL_tla_expected(DRBD_NLA_PEER_DEVICE_STATISTICS, DRBD_GENLA_F_MANDATORY)) GENL_notification( DRBD_RESOURCE_STATE, 34, events, GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NOTIFICATION_HEADER, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_RESOURCE_INFO, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_RESOURCE_STATISTICS, DRBD_F_REQUIRED)) GENL_notification( DRBD_DEVICE_STATE, 35, events, GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NOTIFICATION_HEADER, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_DEVICE_INFO, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_DEVICE_STATISTICS, DRBD_F_REQUIRED)) GENL_notification( DRBD_CONNECTION_STATE, 36, events, GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NOTIFICATION_HEADER, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_CONNECTION_INFO, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_CONNECTION_STATISTICS, DRBD_F_REQUIRED)) GENL_notification( DRBD_PEER_DEVICE_STATE, 37, events, GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_NOTIFICATION_HEADER, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_PEER_DEVICE_INFO, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_PEER_DEVICE_STATISTICS, DRBD_F_REQUIRED)) GENL_op( DRBD_ADM_GET_INITIAL_STATE, 38, GENL_op_init( .dumpit = drbd_adm_get_initial_state, ), GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_GENLA_F_MANDATORY)) GENL_notification( DRBD_HELPER, 40, events, GENL_tla_expected(DRBD_NLA_CFG_CONTEXT, DRBD_F_REQUIRED) GENL_tla_expected(DRBD_NLA_HELPER, DRBD_F_REQUIRED)) GENL_notification( DRBD_INITIAL_STATE_DONE, 41, events, GENL_tla_expected(DRBD_NLA_NOTIFICATION_HEADER, DRBD_F_REQUIRED)) PK ! d*�_� � pstore.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Persistent Storage - pstore.h * * Copyright (C) 2010 Intel Corporation <tony.luck@intel.com> * * This code is the generic layer to export data records from platform * level persistent storage via a file system. */ #ifndef _LINUX_PSTORE_H #define _LINUX_PSTORE_H #include <linux/compiler.h> #include <linux/errno.h> #include <linux/kmsg_dump.h> #include <linux/mutex.h> #include <linux/spinlock.h> #include <linux/time.h> #include <linux/types.h> struct module; /* * pstore record types (see fs/pstore/platform.c for pstore_type_names[]) * These values may be written to storage (see EFI vars backend), so * they are kind of an ABI. Be careful changing the mappings. */ enum pstore_type_id { /* Frontend storage types */ PSTORE_TYPE_DMESG = 0, PSTORE_TYPE_MCE = 1, PSTORE_TYPE_CONSOLE = 2, PSTORE_TYPE_FTRACE = 3, /* PPC64-specific partition types */ PSTORE_TYPE_PPC_RTAS = 4, PSTORE_TYPE_PPC_OF = 5, PSTORE_TYPE_PPC_COMMON = 6, PSTORE_TYPE_PMSG = 7, PSTORE_TYPE_PPC_OPAL = 8, /* End of the list */ PSTORE_TYPE_MAX }; const char *pstore_type_to_name(enum pstore_type_id type); enum pstore_type_id pstore_name_to_type(const char *name); struct pstore_info; /** * struct pstore_record - details of a pstore record entry * @psi: pstore backend driver information * @type: pstore record type * @id: per-type unique identifier for record * @time: timestamp of the record * @buf: pointer to record contents * @size: size of @buf * @ecc_notice_size: * ECC information for @buf * * Valid for PSTORE_TYPE_DMESG @type: * * @count: Oops count since boot * @reason: kdump reason for notification * @part: position in a multipart record * @compressed: whether the buffer is compressed * */ struct pstore_record { struct pstore_info *psi; enum pstore_type_id type; u64 id; struct timespec64 time; char *buf; ssize_t size; ssize_t ecc_notice_size; int count; enum kmsg_dump_reason reason; unsigned int part; bool compressed; }; /** * struct pstore_info - backend pstore driver structure * * @owner: module which is responsible for this backend driver * @name: name of the backend driver * * @buf_lock: spinlock to serialize access to @buf * @buf: preallocated crash dump buffer * @bufsize: size of @buf available for crash dump bytes (must match * smallest number of bytes available for writing to a * backend entry, since compressed bytes don't take kindly * to being truncated) * * @read_mutex: serializes @open, @read, @close, and @erase callbacks * @flags: bitfield of frontends the backend can accept writes for * @max_reason: Used when PSTORE_FLAGS_DMESG is set. Contains the * kmsg_dump_reason enum value. KMSG_DUMP_UNDEF means * "use existing kmsg_dump() filtering, based on the * printk.always_kmsg_dump boot param" (which is either * KMSG_DUMP_OOPS when false, or KMSG_DUMP_MAX when * true); see printk.always_kmsg_dump for more details. * @data: backend-private pointer passed back during callbacks * * Callbacks: * * @open: * Notify backend that pstore is starting a full read of backend * records. Followed by one or more @read calls, and a final @close. * * @psi: in: pointer to the struct pstore_info for the backend * * Returns 0 on success, and non-zero on error. * * @close: * Notify backend that pstore has finished a full read of backend * records. Always preceded by an @open call and one or more @read * calls. * * @psi: in: pointer to the struct pstore_info for the backend * * Returns 0 on success, and non-zero on error. (Though pstore will * ignore the error.) * * @read: * Read next available backend record. Called after a successful * @open. * * @record: * pointer to record to populate. @buf should be allocated * by the backend and filled. At least @type and @id should * be populated, since these are used when creating pstorefs * file names. * * Returns record size on success, zero when no more records are * available, or negative on error. * * @write: * A newly generated record needs to be written to backend storage. * * @record: * pointer to record metadata. When @type is PSTORE_TYPE_DMESG, * @buf will be pointing to the preallocated @psi.buf, since * memory allocation may be broken during an Oops. Regardless, * @buf must be proccesed or copied before returning. The * backend is also expected to write @id with something that * can help identify this record to a future @erase callback. * The @time field will be prepopulated with the current time, * when available. The @size field will have the size of data * in @buf. * * Returns 0 on success, and non-zero on error. * * @write_user: * Perform a frontend write to a backend record, using a specified * buffer that is coming directly from userspace, instead of the * @record @buf. * * @record: pointer to record metadata. * @buf: pointer to userspace contents to write to backend * * Returns 0 on success, and non-zero on error. * * @erase: * Delete a record from backend storage. Different backends * identify records differently, so entire original record is * passed back to assist in identification of what the backend * should remove from storage. * * @record: pointer to record metadata. * * Returns 0 on success, and non-zero on error. * */ struct pstore_info { struct module *owner; const char *name; spinlock_t buf_lock; char *buf; size_t bufsize; struct mutex read_mutex; int flags; int max_reason; void *data; int (*open)(struct pstore_info *psi); int (*close)(struct pstore_info *psi); ssize_t (*read)(struct pstore_record *record); int (*write)(struct pstore_record *record); int (*write_user)(struct pstore_record *record, const char __user *buf); int (*erase)(struct pstore_record *record); }; /* Supported frontends */ #define PSTORE_FLAGS_DMESG BIT(0) #define PSTORE_FLAGS_CONSOLE BIT(1) #define PSTORE_FLAGS_FTRACE BIT(2) #define PSTORE_FLAGS_PMSG BIT(3) extern int pstore_register(struct pstore_info *); extern void pstore_unregister(struct pstore_info *); struct pstore_ftrace_record { unsigned long ip; unsigned long parent_ip; u64 ts; }; /* * ftrace related stuff: Both backends and frontends need these so expose * them here. */ #if NR_CPUS <= 2 && defined(CONFIG_ARM_THUMB) #define PSTORE_CPU_IN_IP 0x1 #elif NR_CPUS <= 4 && defined(CONFIG_ARM) #define PSTORE_CPU_IN_IP 0x3 #endif #define TS_CPU_SHIFT 8 #define TS_CPU_MASK (BIT(TS_CPU_SHIFT) - 1) /* * If CPU number can be stored in IP, store it there, otherwise store it in * the time stamp. This means more timestamp resolution is available when * the CPU can be stored in the IP. */ #ifdef PSTORE_CPU_IN_IP static inline void pstore_ftrace_encode_cpu(struct pstore_ftrace_record *rec, unsigned int cpu) { rec->ip |= cpu; } static inline unsigned int pstore_ftrace_decode_cpu(struct pstore_ftrace_record *rec) { return rec->ip & PSTORE_CPU_IN_IP; } static inline u64 pstore_ftrace_read_timestamp(struct pstore_ftrace_record *rec) { return rec->ts; } static inline void pstore_ftrace_write_timestamp(struct pstore_ftrace_record *rec, u64 val) { rec->ts = val; } #else static inline void pstore_ftrace_encode_cpu(struct pstore_ftrace_record *rec, unsigned int cpu) { rec->ts &= ~(TS_CPU_MASK); rec->ts |= cpu; } static inline unsigned int pstore_ftrace_decode_cpu(struct pstore_ftrace_record *rec) { return rec->ts & TS_CPU_MASK; } static inline u64 pstore_ftrace_read_timestamp(struct pstore_ftrace_record *rec) { return rec->ts >> TS_CPU_SHIFT; } static inline void pstore_ftrace_write_timestamp(struct pstore_ftrace_record *rec, u64 val) { rec->ts = (rec->ts & TS_CPU_MASK) | (val << TS_CPU_SHIFT); } #endif #endif /*_LINUX_PSTORE_H*/ PK ! ��~PE E sync_core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SYNC_CORE_H #define _LINUX_SYNC_CORE_H #ifdef CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE #include <asm/sync_core.h> #else /* * This is a dummy sync_core_before_usermode() implementation that can be used * on all architectures which return to user-space through core serializing * instructions. * If your architecture returns to user-space through non-core-serializing * instructions, you need to write your own functions. */ static inline void sync_core_before_usermode(void) { } #endif #endif /* _LINUX_SYNC_CORE_H */ PK ! ���� kmod.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __LINUX_KMOD_H__ #define __LINUX_KMOD_H__ /* * include/linux/kmod.h */ #include <linux/umh.h> #include <linux/gfp.h> #include <linux/stddef.h> #include <linux/errno.h> #include <linux/compiler.h> #include <linux/workqueue.h> #include <linux/sysctl.h> #define KMOD_PATH_LEN 256 #ifdef CONFIG_MODULES extern char modprobe_path[]; /* for sysctl */ /* modprobe exit status on success, -ve on error. Return value * usually useless though. */ extern __printf(2, 3) int __request_module(bool wait, const char *name, ...); #define request_module(mod...) __request_module(true, mod) #define request_module_nowait(mod...) __request_module(false, mod) #define try_then_request_module(x, mod...) \ ((x) ?: (__request_module(true, mod), (x))) #else static inline int request_module(const char *name, ...) { return -ENOSYS; } static inline int request_module_nowait(const char *name, ...) { return -ENOSYS; } #define try_then_request_module(x, mod...) (x) #endif #endif /* __LINUX_KMOD_H__ */ PK ! ��W�� � dca.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. */ #ifndef DCA_H #define DCA_H #include <linux/pci.h> /* DCA Provider API */ /* DCA Notifier Interface */ void dca_register_notify(struct notifier_block *nb); void dca_unregister_notify(struct notifier_block *nb); #define DCA_PROVIDER_ADD 0x0001 #define DCA_PROVIDER_REMOVE 0x0002 struct dca_provider { struct list_head node; const struct dca_ops *ops; struct device *cd; int id; }; struct dca_domain { struct list_head node; struct list_head dca_providers; struct pci_bus *pci_rc; }; struct dca_ops { int (*add_requester) (struct dca_provider *, struct device *); int (*remove_requester) (struct dca_provider *, struct device *); u8 (*get_tag) (struct dca_provider *, struct device *, int cpu); int (*dev_managed) (struct dca_provider *, struct device *); }; struct dca_provider *alloc_dca_provider(const struct dca_ops *ops, int priv_size); void free_dca_provider(struct dca_provider *dca); int register_dca_provider(struct dca_provider *dca, struct device *dev); void unregister_dca_provider(struct dca_provider *dca, struct device *dev); static inline void *dca_priv(struct dca_provider *dca) { return (void *)dca + sizeof(struct dca_provider); } /* Requester API */ #define DCA_GET_TAG_TWO_ARGS int dca_add_requester(struct device *dev); int dca_remove_requester(struct device *dev); u8 dca_get_tag(int cpu); u8 dca3_get_tag(struct device *dev, int cpu); /* internal stuff */ int __init dca_sysfs_init(void); void __exit dca_sysfs_exit(void); int dca_sysfs_add_provider(struct dca_provider *dca, struct device *dev); void dca_sysfs_remove_provider(struct dca_provider *dca); int dca_sysfs_add_req(struct dca_provider *dca, struct device *dev, int slot); void dca_sysfs_remove_req(struct dca_provider *dca, int slot); #endif /* DCA_H */ PK ! ���E E rcutiny.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Read-Copy Update mechanism for mutual exclusion, the Bloatwatch edition. * * Copyright IBM Corporation, 2008 * * Author: Paul E. McKenney <paulmck@linux.ibm.com> * * For detailed explanation of Read-Copy Update mechanism see - * Documentation/RCU */ #ifndef __LINUX_TINY_H #define __LINUX_TINY_H #include <asm/param.h> /* for HZ */ unsigned long get_state_synchronize_rcu(void); unsigned long start_poll_synchronize_rcu(void); bool poll_state_synchronize_rcu(unsigned long oldstate); static inline void cond_synchronize_rcu(unsigned long oldstate) { might_sleep(); } extern void rcu_barrier(void); static inline void synchronize_rcu_expedited(void) { synchronize_rcu(); } /* * Add one more declaration of kvfree() here. It is * not so straight forward to just include <linux/mm.h> * where it is defined due to getting many compile * errors caused by that include. */ extern void kvfree(const void *addr); static inline void kvfree_call_rcu(struct rcu_head *head, rcu_callback_t func) { if (head) { call_rcu(head, func); return; } // kvfree_rcu(one_arg) call. might_sleep(); synchronize_rcu(); kvfree((void *) func); } void rcu_qs(void); static inline void rcu_softirq_qs(void) { rcu_qs(); } #define rcu_note_context_switch(preempt) \ do { \ rcu_qs(); \ rcu_tasks_qs(current, (preempt)); \ } while (0) static inline int rcu_needs_cpu(u64 basemono, u64 *nextevt) { *nextevt = KTIME_MAX; return 0; } /* * Take advantage of the fact that there is only one CPU, which * allows us to ignore virtualization-based context switches. */ static inline void rcu_virt_note_context_switch(int cpu) { } static inline void rcu_cpu_stall_reset(void) { } static inline int rcu_jiffies_till_stall_check(void) { return 21 * HZ; } static inline void rcu_idle_enter(void) { } static inline void rcu_idle_exit(void) { } static inline void rcu_irq_enter(void) { } static inline void rcu_irq_exit_irqson(void) { } static inline void rcu_irq_enter_irqson(void) { } static inline void rcu_irq_exit(void) { } static inline void rcu_irq_exit_check_preempt(void) { } #define rcu_is_idle_cpu(cpu) \ (is_idle_task(current) && !in_nmi() && !in_irq() && !in_serving_softirq()) static inline void exit_rcu(void) { } static inline bool rcu_preempt_need_deferred_qs(struct task_struct *t) { return false; } static inline void rcu_preempt_deferred_qs(struct task_struct *t) { } #ifdef CONFIG_SRCU void rcu_scheduler_starting(void); #else /* #ifndef CONFIG_SRCU */ static inline void rcu_scheduler_starting(void) { } #endif /* #else #ifndef CONFIG_SRCU */ static inline void rcu_end_inkernel_boot(void) { } static inline bool rcu_inkernel_boot_has_ended(void) { return true; } static inline bool rcu_is_watching(void) { return true; } static inline void rcu_momentary_dyntick_idle(void) { } static inline void kfree_rcu_scheduler_running(void) { } static inline bool rcu_gp_might_be_stalled(void) { return false; } /* Avoid RCU read-side critical sections leaking across. */ static inline void rcu_all_qs(void) { barrier(); } /* RCUtree hotplug events */ #define rcutree_prepare_cpu NULL #define rcutree_online_cpu NULL #define rcutree_offline_cpu NULL #define rcutree_dead_cpu NULL #define rcutree_dying_cpu NULL static inline void rcu_cpu_starting(unsigned int cpu) { } #endif /* __LINUX_RCUTINY_H */ PK ! ��(�� � coda.hnu �[��� /* You may distribute this file under either of the two licenses that follow at your discretion. */ /* BLURB lgpl Coda File System Release 5 Copyright (c) 1987-1999 Carnegie Mellon University Additional copyrights listed below This code is distributed "AS IS" without warranty of any kind under the terms of the GNU Library General Public Licence Version 2, as shown in the file LICENSE, or under the license shown below. The technical and financial contributors to Coda are listed in the file CREDITS. Additional copyrights */ /* Coda: an Experimental Distributed File System Release 4.0 Copyright (c) 1987-1999 Carnegie Mellon University All Rights Reserved Permission to use, copy, modify and distribute this software and its documentation is hereby granted, provided that both the copyright notice and this permission notice appear in all copies of the software, derivative works or modified versions, and any portions thereof, and that both notices appear in supporting documentation, and that credit is given to Carnegie Mellon University in all documents and publicity pertaining to direct or indirect use of this code or its derivatives. CODA IS AN EXPERIMENTAL SOFTWARE SYSTEM AND IS KNOWN TO HAVE BUGS, SOME OF WHICH MAY HAVE SERIOUS CONSEQUENCES. CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING DIRECTLY OR INDIRECTLY FROM THE USE OF THIS SOFTWARE OR OF ANY DERIVATIVE WORK. Carnegie Mellon encourages users of this software to return any improvements or extensions that they make, and to grant Carnegie Mellon the rights to redistribute these changes without encumbrance. */ /* * * Based on cfs.h from Mach, but revamped for increased simplicity. * Linux modifications by * Peter Braam, Aug 1996 */ #ifndef _CODA_HEADER_ #define _CODA_HEADER_ typedef unsigned long long u_quad_t; #include <uapi/linux/coda.h> #endif PK ! ���� psci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * * Copyright (C) 2015 ARM Limited */ #ifndef __LINUX_PSCI_H #define __LINUX_PSCI_H #include <linux/arm-smccc.h> #include <linux/init.h> #include <linux/types.h> #define PSCI_POWER_STATE_TYPE_STANDBY 0 #define PSCI_POWER_STATE_TYPE_POWER_DOWN 1 bool psci_tos_resident_on(int cpu); int psci_cpu_suspend_enter(u32 state); bool psci_power_state_is_valid(u32 state); int psci_set_osi_mode(bool enable); bool psci_has_osi_support(void); struct psci_operations { u32 (*get_version)(void); int (*cpu_suspend)(u32 state, unsigned long entry_point); int (*cpu_off)(u32 state); int (*cpu_on)(unsigned long cpuid, unsigned long entry_point); int (*migrate)(unsigned long cpuid); int (*affinity_info)(unsigned long target_affinity, unsigned long lowest_affinity_level); int (*migrate_info_type)(void); }; extern struct psci_operations psci_ops; struct psci_0_1_function_ids { u32 cpu_suspend; u32 cpu_on; u32 cpu_off; u32 migrate; }; struct psci_0_1_function_ids get_psci_0_1_function_ids(void); #if defined(CONFIG_ARM_PSCI_FW) int __init psci_dt_init(void); #else static inline int psci_dt_init(void) { return 0; } #endif #if defined(CONFIG_ARM_PSCI_FW) && defined(CONFIG_ACPI) int __init psci_acpi_init(void); bool __init acpi_psci_present(void); bool acpi_psci_use_hvc(void); #else static inline int psci_acpi_init(void) { return 0; } static inline bool acpi_psci_present(void) { return false; } static inline bool acpi_psci_use_hvc(void) {return false; } #endif #endif /* __LINUX_PSCI_H */ PK ! � �� � intel_th.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Intel(R) Trace Hub data structures for implementing buffer sinks. * * Copyright (C) 2019 Intel Corporation. */ #ifndef _INTEL_TH_H_ #define _INTEL_TH_H_ #include <linux/scatterlist.h> /* MSC operating modes (MSC_MODE) */ enum { MSC_MODE_SINGLE = 0, MSC_MODE_MULTI, MSC_MODE_EXI, MSC_MODE_DEBUG, }; struct msu_buffer { const char *name; /* * ->assign() called when buffer 'mode' is set to this driver * (aka mode_store()) * @device: struct device * of the msc * @mode: allows the driver to set HW mode (see the enum above) * Returns: a pointer to a private structure associated with this * msc or NULL in case of error. This private structure * will then be passed into all other callbacks. */ void *(*assign)(struct device *dev, int *mode); /* ->unassign(): some other mode is selected, clean up */ void (*unassign)(void *priv); /* * ->alloc_window(): allocate memory for the window of a given * size * @sgt: pointer to sg_table, can be overridden by the buffer * driver, or kept intact * Returns: number of sg table entries <= number of pages; * 0 is treated as an allocation failure. */ int (*alloc_window)(void *priv, struct sg_table **sgt, size_t size); void (*free_window)(void *priv, struct sg_table *sgt); /* ->activate(): trace has started */ void (*activate)(void *priv); /* ->deactivate(): trace is about to stop */ void (*deactivate)(void *priv); /* * ->ready(): window @sgt is filled up to the last block OR * tracing is stopped by the user; this window contains * @bytes data. The window in question transitions into * the "LOCKED" state, indicating that it can't be used * by hardware. To clear this state and make the window * available to the hardware again, call * intel_th_msc_window_unlock(). */ int (*ready)(void *priv, struct sg_table *sgt, size_t bytes); }; int intel_th_msu_buffer_register(const struct msu_buffer *mbuf, struct module *owner); void intel_th_msu_buffer_unregister(const struct msu_buffer *mbuf); void intel_th_msc_window_unlock(struct device *dev, struct sg_table *sgt); #define module_intel_th_msu_buffer(__buffer) \ static int __init __buffer##_init(void) \ { \ return intel_th_msu_buffer_register(&(__buffer), THIS_MODULE); \ } \ module_init(__buffer##_init); \ static void __exit __buffer##_exit(void) \ { \ intel_th_msu_buffer_unregister(&(__buffer)); \ } \ module_exit(__buffer##_exit); #endif /* _INTEL_TH_H_ */ PK ! ���(� � if_fddi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Global definitions for the ANSI FDDI interface. * * Version: @(#)if_fddi.h 1.0.2 Sep 29 2004 * * Author: Lawrence V. Stefani, <stefani@lkg.dec.com> * * if_fddi.h is based on previous if_ether.h and if_tr.h work by * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> * Donald Becker, <becker@super.org> * Alan Cox, <alan@lxorguk.ukuu.org.uk> * Steve Whitehouse, <gw7rrm@eeshack3.swan.ac.uk> * Peter De Schrijver, <stud11@cc4.kuleuven.ac.be> */ #ifndef _LINUX_IF_FDDI_H #define _LINUX_IF_FDDI_H #include <linux/netdevice.h> #include <uapi/linux/if_fddi.h> /* Define FDDI statistics structure */ struct fddi_statistics { /* Generic statistics. */ struct net_device_stats gen; /* Detailed FDDI statistics. Adopted from RFC 1512 */ __u8 smt_station_id[8]; __u32 smt_op_version_id; __u32 smt_hi_version_id; __u32 smt_lo_version_id; __u8 smt_user_data[32]; __u32 smt_mib_version_id; __u32 smt_mac_cts; __u32 smt_non_master_cts; __u32 smt_master_cts; __u32 smt_available_paths; __u32 smt_config_capabilities; __u32 smt_config_policy; __u32 smt_connection_policy; __u32 smt_t_notify; __u32 smt_stat_rpt_policy; __u32 smt_trace_max_expiration; __u32 smt_bypass_present; __u32 smt_ecm_state; __u32 smt_cf_state; __u32 smt_remote_disconnect_flag; __u32 smt_station_status; __u32 smt_peer_wrap_flag; __u32 smt_time_stamp; __u32 smt_transition_time_stamp; __u32 mac_frame_status_functions; __u32 mac_t_max_capability; __u32 mac_tvx_capability; __u32 mac_available_paths; __u32 mac_current_path; __u8 mac_upstream_nbr[FDDI_K_ALEN]; __u8 mac_downstream_nbr[FDDI_K_ALEN]; __u8 mac_old_upstream_nbr[FDDI_K_ALEN]; __u8 mac_old_downstream_nbr[FDDI_K_ALEN]; __u32 mac_dup_address_test; __u32 mac_requested_paths; __u32 mac_downstream_port_type; __u8 mac_smt_address[FDDI_K_ALEN]; __u32 mac_t_req; __u32 mac_t_neg; __u32 mac_t_max; __u32 mac_tvx_value; __u32 mac_frame_cts; __u32 mac_copied_cts; __u32 mac_transmit_cts; __u32 mac_error_cts; __u32 mac_lost_cts; __u32 mac_frame_error_threshold; __u32 mac_frame_error_ratio; __u32 mac_rmt_state; __u32 mac_da_flag; __u32 mac_una_da_flag; __u32 mac_frame_error_flag; __u32 mac_ma_unitdata_available; __u32 mac_hardware_present; __u32 mac_ma_unitdata_enable; __u32 path_tvx_lower_bound; __u32 path_t_max_lower_bound; __u32 path_max_t_req; __u32 path_configuration[8]; __u32 port_my_type[2]; __u32 port_neighbor_type[2]; __u32 port_connection_policies[2]; __u32 port_mac_indicated[2]; __u32 port_current_path[2]; __u8 port_requested_paths[3*2]; __u32 port_mac_placement[2]; __u32 port_available_paths[2]; __u32 port_pmd_class[2]; __u32 port_connection_capabilities[2]; __u32 port_bs_flag[2]; __u32 port_lct_fail_cts[2]; __u32 port_ler_estimate[2]; __u32 port_lem_reject_cts[2]; __u32 port_lem_cts[2]; __u32 port_ler_cutoff[2]; __u32 port_ler_alarm[2]; __u32 port_connect_state[2]; __u32 port_pcm_state[2]; __u32 port_pc_withhold[2]; __u32 port_ler_flag[2]; __u32 port_hardware_present[2]; }; #endif /* _LINUX_IF_FDDI_H */ PK ! �;�a a rcutree.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Read-Copy Update mechanism for mutual exclusion (tree-based version) * * Copyright IBM Corporation, 2008 * * Author: Dipankar Sarma <dipankar@in.ibm.com> * Paul E. McKenney <paulmck@linux.ibm.com> Hierarchical algorithm * * Based on the original work by Paul McKenney <paulmck@linux.ibm.com> * and inputs from Rusty Russell, Andrea Arcangeli and Andi Kleen. * * For detailed explanation of Read-Copy Update mechanism see - * Documentation/RCU */ #ifndef __LINUX_RCUTREE_H #define __LINUX_RCUTREE_H void rcu_softirq_qs(void); void rcu_note_context_switch(bool preempt); int rcu_needs_cpu(u64 basem, u64 *nextevt); void rcu_cpu_stall_reset(void); /* * Note a virtualization-based context switch. This is simply a * wrapper around rcu_note_context_switch(), which allows TINY_RCU * to save a few bytes. The caller must have disabled interrupts. */ static inline void rcu_virt_note_context_switch(int cpu) { rcu_note_context_switch(false); } void synchronize_rcu_expedited(void); void kvfree_call_rcu(struct rcu_head *head, rcu_callback_t func); void rcu_barrier(void); bool rcu_eqs_special_set(int cpu); void rcu_momentary_dyntick_idle(void); void kfree_rcu_scheduler_running(void); bool rcu_gp_might_be_stalled(void); unsigned long get_state_synchronize_rcu(void); unsigned long start_poll_synchronize_rcu(void); bool poll_state_synchronize_rcu(unsigned long oldstate); void cond_synchronize_rcu(unsigned long oldstate); void rcu_idle_enter(void); void rcu_idle_exit(void); void rcu_irq_enter(void); void rcu_irq_exit(void); void rcu_irq_enter_irqson(void); void rcu_irq_exit_irqson(void); bool rcu_is_idle_cpu(int cpu); #ifdef CONFIG_PROVE_RCU void rcu_irq_exit_check_preempt(void); #else static inline void rcu_irq_exit_check_preempt(void) { } #endif void exit_rcu(void); void rcu_scheduler_starting(void); extern int rcu_scheduler_active __read_mostly; void rcu_end_inkernel_boot(void); bool rcu_inkernel_boot_has_ended(void); bool rcu_is_watching(void); #ifndef CONFIG_PREEMPT_RCU void rcu_all_qs(void); #endif /* RCUtree hotplug events */ int rcutree_prepare_cpu(unsigned int cpu); int rcutree_online_cpu(unsigned int cpu); int rcutree_offline_cpu(unsigned int cpu); int rcutree_dead_cpu(unsigned int cpu); int rcutree_dying_cpu(unsigned int cpu); void rcu_cpu_starting(unsigned int cpu); #endif /* __LINUX_RCUTREE_H */ PK ! ��B\� � kconfig.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_KCONFIG_H #define __LINUX_KCONFIG_H #include <generated/autoconf.h> #ifdef CONFIG_CPU_BIG_ENDIAN #define __BIG_ENDIAN 4321 #else #define __LITTLE_ENDIAN 1234 #endif #define __ARG_PLACEHOLDER_1 0, #define __take_second_arg(__ignored, val, ...) val /* * The use of "&&" / "||" is limited in certain expressions. * The following enable to calculate "and" / "or" with macro expansion only. */ #define __and(x, y) ___and(x, y) #define ___and(x, y) ____and(__ARG_PLACEHOLDER_##x, y) #define ____and(arg1_or_junk, y) __take_second_arg(arg1_or_junk y, 0) #define __or(x, y) ___or(x, y) #define ___or(x, y) ____or(__ARG_PLACEHOLDER_##x, y) #define ____or(arg1_or_junk, y) __take_second_arg(arg1_or_junk 1, y) /* * Helper macros to use CONFIG_ options in C/CPP expressions. Note that * these only work with boolean and tristate options. */ /* * Getting something that works in C and CPP for an arg that may or may * not be defined is tricky. Here, if we have "#define CONFIG_BOOGER 1" * we match on the placeholder define, insert the "0," for arg1 and generate * the triplet (0, 1, 0). Then the last step cherry picks the 2nd arg (a one). * When CONFIG_BOOGER is not defined, we generate a (... 1, 0) pair, and when * the last step cherry picks the 2nd arg, we get a zero. */ #define __is_defined(x) ___is_defined(x) #define ___is_defined(val) ____is_defined(__ARG_PLACEHOLDER_##val) #define ____is_defined(arg1_or_junk) __take_second_arg(arg1_or_junk 1, 0) /* * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0 * otherwise. For boolean options, this is equivalent to * IS_ENABLED(CONFIG_FOO). */ #define IS_BUILTIN(option) __is_defined(option) /* * IS_MODULE(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'm', 0 * otherwise. CONFIG_FOO=m results in "#define CONFIG_FOO_MODULE 1" in * autoconf.h. */ #define IS_MODULE(option) __is_defined(option##_MODULE) /* * IS_REACHABLE(CONFIG_FOO) evaluates to 1 if the currently compiled * code can call a function defined in code compiled based on CONFIG_FOO. * This is similar to IS_ENABLED(), but returns false when invoked from * built-in code when CONFIG_FOO is set to 'm'. */ #define IS_REACHABLE(option) __or(IS_BUILTIN(option), \ __and(IS_MODULE(option), __is_defined(MODULE))) /* * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm', * 0 otherwise. Note that CONFIG_FOO=y results in "#define CONFIG_FOO 1" in * autoconf.h, while CONFIG_FOO=m results in "#define CONFIG_FOO_MODULE 1". */ #define IS_ENABLED(option) __or(IS_BUILTIN(option), IS_MODULE(option)) #endif /* __LINUX_KCONFIG_H */ PK ! } ��� � regmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __LINUX_REGMAP_H #define __LINUX_REGMAP_H /* * Register map access API * * Copyright 2011 Wolfson Microelectronics plc * * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> */ #include <linux/list.h> #include <linux/rbtree.h> #include <linux/ktime.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/bug.h> #include <linux/lockdep.h> #include <linux/iopoll.h> #include <linux/fwnode.h> struct module; struct clk; struct device; struct device_node; struct i2c_client; struct i3c_device; struct irq_domain; struct mdio_device; struct slim_device; struct spi_device; struct spmi_device; struct regmap; struct regmap_range_cfg; struct regmap_field; struct snd_ac97; struct sdw_slave; /* An enum of all the supported cache types */ enum regcache_type { REGCACHE_NONE, REGCACHE_RBTREE, REGCACHE_COMPRESSED, REGCACHE_FLAT, }; /** * struct reg_default - Default value for a register. * * @reg: Register address. * @def: Register default value. * * We use an array of structs rather than a simple array as many modern devices * have very sparse register maps. */ struct reg_default { unsigned int reg; unsigned int def; }; /** * struct reg_sequence - An individual write from a sequence of writes. * * @reg: Register address. * @def: Register value. * @delay_us: Delay to be applied after the register write in microseconds * * Register/value pairs for sequences of writes with an optional delay in * microseconds to be applied after each write. */ struct reg_sequence { unsigned int reg; unsigned int def; unsigned int delay_us; }; #define REG_SEQ(_reg, _def, _delay_us) { \ .reg = _reg, \ .def = _def, \ .delay_us = _delay_us, \ } #define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) /** * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs * * @map: Regmap to read from * @addr: Address to poll * @val: Unsigned integer variable to read the value into * @cond: Break condition (usually involving @val) * @sleep_us: Maximum time to sleep between reads in us (0 * tight-loops). Should be less than ~20ms since usleep_range * is used (see Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read * error return value in case of a error read. In the two former cases, * the last read value at @addr is stored in @val. Must not be called * from atomic context if sleep_us or timeout_us are used. * * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. */ #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ ({ \ int __ret, __tmp; \ __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \ sleep_us, timeout_us, false, (map), (addr), &(val)); \ __ret ?: __tmp; \ }) /** * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs * * @map: Regmap to read from * @addr: Address to poll * @val: Unsigned integer variable to read the value into * @cond: Break condition (usually involving @val) * @delay_us: Time to udelay between reads in us (0 tight-loops). * Should be less than ~10us since udelay is used * (see Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read * error return value in case of a error read. In the two former cases, * the last read value at @addr is stored in @val. * * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h. * * Note: In general regmap cannot be used in atomic context. If you want to use * this macro then first setup your regmap for atomic use (flat or no cache * and MMIO regmap). */ #define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \ ({ \ u64 __timeout_us = (timeout_us); \ unsigned long __delay_us = (delay_us); \ ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ int __ret; \ for (;;) { \ __ret = regmap_read((map), (addr), &(val)); \ if (__ret) \ break; \ if (cond) \ break; \ if ((__timeout_us) && \ ktime_compare(ktime_get(), __timeout) > 0) { \ __ret = regmap_read((map), (addr), &(val)); \ break; \ } \ if (__delay_us) \ udelay(__delay_us); \ } \ __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ }) /** * regmap_field_read_poll_timeout - Poll until a condition is met or timeout * * @field: Regmap field to read from * @val: Unsigned integer variable to read the value into * @cond: Break condition (usually involving @val) * @sleep_us: Maximum time to sleep between reads in us (0 * tight-loops). Should be less than ~20ms since usleep_range * is used (see Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read * error return value in case of a error read. In the two former cases, * the last read value at @addr is stored in @val. Must not be called * from atomic context if sleep_us or timeout_us are used. * * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. */ #define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ ({ \ int __ret, __tmp; \ __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \ sleep_us, timeout_us, false, (field), &(val)); \ __ret ?: __tmp; \ }) #ifdef CONFIG_REGMAP enum regmap_endian { /* Unspecified -> 0 -> Backwards compatible default */ REGMAP_ENDIAN_DEFAULT = 0, REGMAP_ENDIAN_BIG, REGMAP_ENDIAN_LITTLE, REGMAP_ENDIAN_NATIVE, }; /** * struct regmap_range - A register range, used for access related checks * (readable/writeable/volatile/precious checks) * * @range_min: address of first register * @range_max: address of last register */ struct regmap_range { unsigned int range_min; unsigned int range_max; }; #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } /** * struct regmap_access_table - A table of register ranges for access checks * * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" * @n_yes_ranges: size of the above array * @no_ranges: pointer to an array of regmap ranges used as "no ranges" * @n_no_ranges: size of the above array * * A table of ranges including some yes ranges and some no ranges. * If a register belongs to a no_range, the corresponding check function * will return false. If a register belongs to a yes range, the corresponding * check function will return true. "no_ranges" are searched first. */ struct regmap_access_table { const struct regmap_range *yes_ranges; unsigned int n_yes_ranges; const struct regmap_range *no_ranges; unsigned int n_no_ranges; }; typedef void (*regmap_lock)(void *); typedef void (*regmap_unlock)(void *); /** * struct regmap_config - Configuration for the register map of a device. * * @name: Optional name of the regmap. Useful when a device has multiple * register regions. * * @reg_bits: Number of bits in a register address, mandatory. * @reg_stride: The register address stride. Valid register addresses are a * multiple of this value. If set to 0, a value of 1 will be * used. * @pad_bits: Number of bits of padding between register and value. * @val_bits: Number of bits in a register value, mandatory. * * @writeable_reg: Optional callback returning true if the register * can be written to. If this field is NULL but wr_table * (see below) is not, the check is performed on such table * (a register is writeable if it belongs to one of the ranges * specified by wr_table). * @readable_reg: Optional callback returning true if the register * can be read from. If this field is NULL but rd_table * (see below) is not, the check is performed on such table * (a register is readable if it belongs to one of the ranges * specified by rd_table). * @volatile_reg: Optional callback returning true if the register * value can't be cached. If this field is NULL but * volatile_table (see below) is not, the check is performed on * such table (a register is volatile if it belongs to one of * the ranges specified by volatile_table). * @precious_reg: Optional callback returning true if the register * should not be read outside of a call from the driver * (e.g., a clear on read interrupt status register). If this * field is NULL but precious_table (see below) is not, the * check is performed on such table (a register is precious if * it belongs to one of the ranges specified by precious_table). * @writeable_noinc_reg: Optional callback returning true if the register * supports multiple write operations without incrementing * the register number. If this field is NULL but * wr_noinc_table (see below) is not, the check is * performed on such table (a register is no increment * writeable if it belongs to one of the ranges specified * by wr_noinc_table). * @readable_noinc_reg: Optional callback returning true if the register * supports multiple read operations without incrementing * the register number. If this field is NULL but * rd_noinc_table (see below) is not, the check is * performed on such table (a register is no increment * readable if it belongs to one of the ranges specified * by rd_noinc_table). * @disable_locking: This regmap is either protected by external means or * is guaranteed not to be accessed from multiple threads. * Don't use any locking mechanisms. * @lock: Optional lock callback (overrides regmap's default lock * function, based on spinlock or mutex). * @unlock: As above for unlocking. * @lock_arg: this field is passed as the only argument of lock/unlock * functions (ignored in case regular lock/unlock functions * are not overridden). * @reg_read: Optional callback that if filled will be used to perform * all the reads from the registers. Should only be provided for * devices whose read operation cannot be represented as a simple * read operation on a bus such as SPI, I2C, etc. Most of the * devices do not need this. * @reg_write: Same as above for writing. * @reg_update_bits: Optional callback that if filled will be used to perform * all the update_bits(rmw) operation. Should only be provided * if the function require special handling with lock and reg * handling and the operation cannot be represented as a simple * update_bits operation on a bus such as SPI, I2C, etc. * @read: Optional callback that if filled will be used to perform all the * bulk reads from the registers. Data is returned in the buffer used * to transmit data. * @write: Same as above for writing. * @max_raw_read: Max raw read size that can be used on the device. * @max_raw_write: Max raw write size that can be used on the device. * @fast_io: Register IO is fast. Use a spinlock instead of a mutex * to perform locking. This field is ignored if custom lock/unlock * functions are used (see fields lock/unlock of struct regmap_config). * This field is a duplicate of a similar file in * 'struct regmap_bus' and serves exact same purpose. * Use it only for "no-bus" cases. * @max_register: Optional, specifies the maximum valid register address. * @wr_table: Optional, points to a struct regmap_access_table specifying * valid ranges for write access. * @rd_table: As above, for read access. * @volatile_table: As above, for volatile registers. * @precious_table: As above, for precious registers. * @wr_noinc_table: As above, for no increment writeable registers. * @rd_noinc_table: As above, for no increment readable registers. * @reg_defaults: Power on reset values for registers (for use with * register cache support). * @num_reg_defaults: Number of elements in reg_defaults. * * @read_flag_mask: Mask to be set in the top bytes of the register when doing * a read. * @write_flag_mask: Mask to be set in the top bytes of the register when doing * a write. If both read_flag_mask and write_flag_mask are * empty and zero_flag_mask is not set the regmap_bus default * masks are used. * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even * if they are both empty. * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers. * This can avoid load on devices which don't require strict * orderings, but drivers should carefully add any explicit * memory barriers when they may require them. * @use_single_read: If set, converts the bulk read operation into a series of * single read operations. This is useful for a device that * does not support bulk read. * @use_single_write: If set, converts the bulk write operation into a series of * single write operations. This is useful for a device that * does not support bulk write. * @can_multi_write: If set, the device supports the multi write mode of bulk * write operations, if clear multi write requests will be * split into individual write operations * * @cache_type: The actual cache type. * @reg_defaults_raw: Power on reset values for registers (for use with * register cache support). * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. * @reg_format_endian: Endianness for formatted register addresses. If this is * DEFAULT, the @reg_format_endian_default value from the * regmap bus is used. * @val_format_endian: Endianness for formatted register values. If this is * DEFAULT, the @reg_format_endian_default value from the * regmap bus is used. * * @ranges: Array of configuration entries for virtual address ranges. * @num_ranges: Number of range configuration entries. * @use_hwlock: Indicate if a hardware spinlock should be used. * @use_raw_spinlock: Indicate if a raw spinlock should be used. * @hwlock_id: Specify the hardware spinlock id. * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, * HWLOCK_IRQ or 0. * @can_sleep: Optional, specifies whether regmap operations can sleep. */ struct regmap_config { const char *name; int reg_bits; int reg_stride; int pad_bits; int val_bits; bool (*writeable_reg)(struct device *dev, unsigned int reg); bool (*readable_reg)(struct device *dev, unsigned int reg); bool (*volatile_reg)(struct device *dev, unsigned int reg); bool (*precious_reg)(struct device *dev, unsigned int reg); bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg); bool (*readable_noinc_reg)(struct device *dev, unsigned int reg); bool disable_locking; regmap_lock lock; regmap_unlock unlock; void *lock_arg; int (*reg_read)(void *context, unsigned int reg, unsigned int *val); int (*reg_write)(void *context, unsigned int reg, unsigned int val); int (*reg_update_bits)(void *context, unsigned int reg, unsigned int mask, unsigned int val); /* Bulk read/write */ int (*read)(void *context, const void *reg_buf, size_t reg_size, void *val_buf, size_t val_size); int (*write)(void *context, const void *data, size_t count); size_t max_raw_read; size_t max_raw_write; bool fast_io; unsigned int max_register; const struct regmap_access_table *wr_table; const struct regmap_access_table *rd_table; const struct regmap_access_table *volatile_table; const struct regmap_access_table *precious_table; const struct regmap_access_table *wr_noinc_table; const struct regmap_access_table *rd_noinc_table; const struct reg_default *reg_defaults; unsigned int num_reg_defaults; enum regcache_type cache_type; const void *reg_defaults_raw; unsigned int num_reg_defaults_raw; unsigned long read_flag_mask; unsigned long write_flag_mask; bool zero_flag_mask; bool use_single_read; bool use_single_write; bool use_relaxed_mmio; bool can_multi_write; enum regmap_endian reg_format_endian; enum regmap_endian val_format_endian; const struct regmap_range_cfg *ranges; unsigned int num_ranges; bool use_hwlock; bool use_raw_spinlock; unsigned int hwlock_id; unsigned int hwlock_mode; bool can_sleep; }; /** * struct regmap_range_cfg - Configuration for indirectly accessed or paged * registers. * * @name: Descriptive name for diagnostics * * @range_min: Address of the lowest register address in virtual range. * @range_max: Address of the highest register in virtual range. * * @selector_reg: Register with selector field. * @selector_mask: Bit mask for selector value. * @selector_shift: Bit shift for selector value. * * @window_start: Address of first (lowest) register in data window. * @window_len: Number of registers in data window. * * Registers, mapped to this virtual range, are accessed in two steps: * 1. page selector register update; * 2. access through data window registers. */ struct regmap_range_cfg { const char *name; /* Registers of virtual address range */ unsigned int range_min; unsigned int range_max; /* Page selector for indirect addressing */ unsigned int selector_reg; unsigned int selector_mask; int selector_shift; /* Data window (per each page) */ unsigned int window_start; unsigned int window_len; }; struct regmap_async; typedef int (*regmap_hw_write)(void *context, const void *data, size_t count); typedef int (*regmap_hw_gather_write)(void *context, const void *reg, size_t reg_len, const void *val, size_t val_len); typedef int (*regmap_hw_async_write)(void *context, const void *reg, size_t reg_len, const void *val, size_t val_len, struct regmap_async *async); typedef int (*regmap_hw_read)(void *context, const void *reg_buf, size_t reg_size, void *val_buf, size_t val_size); typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, unsigned int *val); typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, unsigned int val); typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, unsigned int mask, unsigned int val); typedef struct regmap_async *(*regmap_hw_async_alloc)(void); typedef void (*regmap_hw_free_context)(void *context); /** * struct regmap_bus - Description of a hardware bus for the register map * infrastructure. * * @fast_io: Register IO is fast. Use a spinlock instead of a mutex * to perform locking. This field is ignored if custom lock/unlock * functions are used (see fields lock/unlock of * struct regmap_config). * @write: Write operation. * @gather_write: Write operation with split register/value, return -ENOTSUPP * if not implemented on a given device. * @async_write: Write operation which completes asynchronously, optional and * must serialise with respect to non-async I/O. * @reg_write: Write a single register value to the given register address. This * write operation has to complete when returning from the function. * @reg_update_bits: Update bits operation to be used against volatile * registers, intended for devices supporting some mechanism * for setting clearing bits without having to * read/modify/write. * @read: Read operation. Data is returned in the buffer used to transmit * data. * @reg_read: Read a single register value from a given register address. * @free_context: Free context. * @async_alloc: Allocate a regmap_async() structure. * @read_flag_mask: Mask to be set in the top byte of the register when doing * a read. * @reg_format_endian_default: Default endianness for formatted register * addresses. Used when the regmap_config specifies DEFAULT. If this is * DEFAULT, BIG is assumed. * @val_format_endian_default: Default endianness for formatted register * values. Used when the regmap_config specifies DEFAULT. If this is * DEFAULT, BIG is assumed. * @max_raw_read: Max raw read size that can be used on the bus. * @max_raw_write: Max raw write size that can be used on the bus. * @free_on_exit: kfree this on exit of regmap */ struct regmap_bus { bool fast_io; regmap_hw_write write; regmap_hw_gather_write gather_write; regmap_hw_async_write async_write; regmap_hw_reg_write reg_write; regmap_hw_reg_update_bits reg_update_bits; regmap_hw_read read; regmap_hw_reg_read reg_read; regmap_hw_free_context free_context; regmap_hw_async_alloc async_alloc; u8 read_flag_mask; enum regmap_endian reg_format_endian_default; enum regmap_endian val_format_endian_default; size_t max_raw_read; size_t max_raw_write; bool free_on_exit; }; /* * __regmap_init functions. * * These functions take a lock key and name parameter, and should not be called * directly. Instead, use the regmap_init macros that generate a key and name * for each call. */ struct regmap *__regmap_init(struct device *dev, const struct regmap_bus *bus, void *bus_context, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_i2c(struct i2c_client *i2c, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_sccb(struct i2c_client *i2c, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_slimbus(struct slim_device *slimbus, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_spi(struct spi_device *dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_w1(struct device *w1_dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, void __iomem *regs, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_sdw(struct sdw_slave *sdw, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__regmap_init_spi_avmm(struct spi_device *spi, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init(struct device *dev, const struct regmap_bus *bus, void *bus_context, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_spi(struct spi_device *dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_w1(struct device *w1_dev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id, void __iomem *regs, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); /* * Wrapper for regmap_init macros to include a unique lockdep key and name * for each call. No-op if CONFIG_LOCKDEP is not set. * * @fn: Real function to call (in the form __[*_]regmap_init[_*]) * @name: Config variable name (#config in the calling macro) **/ #ifdef CONFIG_LOCKDEP #define __regmap_lockdep_wrapper(fn, name, ...) \ ( \ ({ \ static struct lock_class_key _key; \ fn(__VA_ARGS__, &_key, \ KBUILD_BASENAME ":" \ __stringify(__LINE__) ":" \ "(" name ")->lock"); \ }) \ ) #else #define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) #endif /** * regmap_init() - Initialise register map * * @dev: Device that will be interacted with * @bus: Bus-specific callbacks to use with device * @bus_context: Data passed to bus-specific callbacks * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. This function should generally not be called * directly, it should be called by bus-specific init functions. */ #define regmap_init(dev, bus, bus_context, config) \ __regmap_lockdep_wrapper(__regmap_init, #config, \ dev, bus, bus_context, config) int regmap_attach_dev(struct device *dev, struct regmap *map, const struct regmap_config *config); /** * regmap_init_i2c() - Initialise register map * * @i2c: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_i2c(i2c, config) \ __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ i2c, config) /** * regmap_init_mdio() - Initialise register map * * @mdio_dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_mdio(mdio_dev, config) \ __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \ mdio_dev, config) /** * regmap_init_sccb() - Initialise register map * * @i2c: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_sccb(i2c, config) \ __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \ i2c, config) /** * regmap_init_slimbus() - Initialise register map * * @slimbus: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_slimbus(slimbus, config) \ __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \ slimbus, config) /** * regmap_init_spi() - Initialise register map * * @dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_spi(dev, config) \ __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ dev, config) /** * regmap_init_spmi_base() - Create regmap for the Base register space * * @dev: SPMI device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_spmi_base(dev, config) \ __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ dev, config) /** * regmap_init_spmi_ext() - Create regmap for Ext register space * * @dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_spmi_ext(dev, config) \ __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ dev, config) /** * regmap_init_w1() - Initialise register map * * @w1_dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_w1(w1_dev, config) \ __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ w1_dev, config) /** * regmap_init_mmio_clk() - Initialise register map with register clock * * @dev: Device that will be interacted with * @clk_id: register clock consumer ID * @regs: Pointer to memory-mapped IO region * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_mmio_clk(dev, clk_id, regs, config) \ __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ dev, clk_id, regs, config) /** * regmap_init_mmio() - Initialise register map * * @dev: Device that will be interacted with * @regs: Pointer to memory-mapped IO region * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_mmio(dev, regs, config) \ regmap_init_mmio_clk(dev, NULL, regs, config) /** * regmap_init_ac97() - Initialise AC'97 register map * * @ac97: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_ac97(ac97, config) \ __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ ac97, config) bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); /** * regmap_init_sdw() - Initialise register map * * @sdw: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_sdw(sdw, config) \ __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \ sdw, config) /** * regmap_init_sdw_mbq() - Initialise register map * * @sdw: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer to * a struct regmap. */ #define regmap_init_sdw_mbq(sdw, config) \ __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \ sdw, config) /** * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave * to AVMM Bus Bridge * * @spi: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. */ #define regmap_init_spi_avmm(spi, config) \ __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \ spi, config) /** * devm_regmap_init() - Initialise managed register map * * @dev: Device that will be interacted with * @bus: Bus-specific callbacks to use with device * @bus_context: Data passed to bus-specific callbacks * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. This function should generally not be called * directly, it should be called by bus-specific init functions. The * map will be automatically freed by the device management code. */ #define devm_regmap_init(dev, bus, bus_context, config) \ __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ dev, bus, bus_context, config) /** * devm_regmap_init_i2c() - Initialise managed register map * * @i2c: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_i2c(i2c, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ i2c, config) /** * devm_regmap_init_mdio() - Initialise managed register map * * @mdio_dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_mdio(mdio_dev, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \ mdio_dev, config) /** * devm_regmap_init_sccb() - Initialise managed register map * * @i2c: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_sccb(i2c, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \ i2c, config) /** * devm_regmap_init_spi() - Initialise register map * * @dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The map will be automatically freed by the * device management code. */ #define devm_regmap_init_spi(dev, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ dev, config) /** * devm_regmap_init_spmi_base() - Create managed regmap for Base register space * * @dev: SPMI device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_spmi_base(dev, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ dev, config) /** * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space * * @dev: SPMI device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_spmi_ext(dev, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ dev, config) /** * devm_regmap_init_w1() - Initialise managed register map * * @w1_dev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_w1(w1_dev, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ w1_dev, config) /** * devm_regmap_init_mmio_clk() - Initialise managed register map with clock * * @dev: Device that will be interacted with * @clk_id: register clock consumer ID * @regs: Pointer to memory-mapped IO region * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ dev, clk_id, regs, config) /** * devm_regmap_init_mmio() - Initialise managed register map * * @dev: Device that will be interacted with * @regs: Pointer to memory-mapped IO region * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_mmio(dev, regs, config) \ devm_regmap_init_mmio_clk(dev, NULL, regs, config) /** * devm_regmap_init_ac97() - Initialise AC'97 register map * * @ac97: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_ac97(ac97, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ ac97, config) /** * devm_regmap_init_sdw() - Initialise managed register map * * @sdw: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_sdw(sdw, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \ sdw, config) /** * devm_regmap_init_sdw_mbq() - Initialise managed register map * * @sdw: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_sdw_mbq(sdw, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \ sdw, config) /** * devm_regmap_init_slimbus() - Initialise managed register map * * @slimbus: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_slimbus(slimbus, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \ slimbus, config) /** * devm_regmap_init_i3c() - Initialise managed register map * * @i3c: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_i3c(i3c, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \ i3c, config) /** * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave * to AVMM Bus Bridge * * @spi: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The map will be automatically freed by the * device management code. */ #define devm_regmap_init_spi_avmm(spi, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \ spi, config) int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk); void regmap_mmio_detach_clk(struct regmap *map); void regmap_exit(struct regmap *map); int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config); struct regmap *dev_get_regmap(struct device *dev, const char *name); struct device *regmap_get_device(struct regmap *map); int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); int regmap_raw_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_noinc_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, size_t val_count); int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, int num_regs); int regmap_multi_reg_write_bypassed(struct regmap *map, const struct reg_sequence *regs, int num_regs); int regmap_raw_write_async(struct regmap *map, unsigned int reg, const void *val, size_t val_len); int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, size_t val_len); int regmap_noinc_read(struct regmap *map, unsigned int reg, void *val, size_t val_len); int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, size_t val_count); int regmap_update_bits_base(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val, bool *change, bool async, bool force); static inline int regmap_update_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val) { return regmap_update_bits_base(map, reg, mask, val, NULL, false, false); } static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val) { return regmap_update_bits_base(map, reg, mask, val, NULL, true, false); } static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val, bool *change) { return regmap_update_bits_base(map, reg, mask, val, change, false, false); } static inline int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val, bool *change) { return regmap_update_bits_base(map, reg, mask, val, change, true, false); } static inline int regmap_write_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val) { return regmap_update_bits_base(map, reg, mask, val, NULL, false, true); } int regmap_get_val_bytes(struct regmap *map); int regmap_get_max_register(struct regmap *map); int regmap_get_reg_stride(struct regmap *map); int regmap_async_complete(struct regmap *map); bool regmap_can_raw_write(struct regmap *map); size_t regmap_get_raw_read_max(struct regmap *map); size_t regmap_get_raw_write_max(struct regmap *map); int regcache_sync(struct regmap *map); int regcache_sync_region(struct regmap *map, unsigned int min, unsigned int max); int regcache_drop_region(struct regmap *map, unsigned int min, unsigned int max); void regcache_cache_only(struct regmap *map, bool enable); void regcache_cache_bypass(struct regmap *map, bool enable); void regcache_mark_dirty(struct regmap *map); bool regmap_check_range_table(struct regmap *map, unsigned int reg, const struct regmap_access_table *table); int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, int num_regs); int regmap_parse_val(struct regmap *map, const void *buf, unsigned int *val); static inline bool regmap_reg_in_range(unsigned int reg, const struct regmap_range *range) { return reg >= range->range_min && reg <= range->range_max; } bool regmap_reg_in_ranges(unsigned int reg, const struct regmap_range *ranges, unsigned int nranges); static inline int regmap_set_bits(struct regmap *map, unsigned int reg, unsigned int bits) { return regmap_update_bits_base(map, reg, bits, bits, NULL, false, false); } static inline int regmap_clear_bits(struct regmap *map, unsigned int reg, unsigned int bits) { return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false); } int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits); /** * struct reg_field - Description of an register field * * @reg: Offset of the register within the regmap bank * @lsb: lsb of the register field. * @msb: msb of the register field. * @id_size: port size if it has some ports * @id_offset: address offset for each ports */ struct reg_field { unsigned int reg; unsigned int lsb; unsigned int msb; unsigned int id_size; unsigned int id_offset; }; #define REG_FIELD(_reg, _lsb, _msb) { \ .reg = _reg, \ .lsb = _lsb, \ .msb = _msb, \ } #define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ .reg = _reg, \ .lsb = _lsb, \ .msb = _msb, \ .id_size = _size, \ .id_offset = _offset, \ } struct regmap_field *regmap_field_alloc(struct regmap *regmap, struct reg_field reg_field); void regmap_field_free(struct regmap_field *field); struct regmap_field *devm_regmap_field_alloc(struct device *dev, struct regmap *regmap, struct reg_field reg_field); void devm_regmap_field_free(struct device *dev, struct regmap_field *field); int regmap_field_bulk_alloc(struct regmap *regmap, struct regmap_field **rm_field, const struct reg_field *reg_field, int num_fields); void regmap_field_bulk_free(struct regmap_field *field); int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap, struct regmap_field **field, const struct reg_field *reg_field, int num_fields); void devm_regmap_field_bulk_free(struct device *dev, struct regmap_field *field); int regmap_field_read(struct regmap_field *field, unsigned int *val); int regmap_field_update_bits_base(struct regmap_field *field, unsigned int mask, unsigned int val, bool *change, bool async, bool force); int regmap_fields_read(struct regmap_field *field, unsigned int id, unsigned int *val); int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, unsigned int mask, unsigned int val, bool *change, bool async, bool force); static inline int regmap_field_write(struct regmap_field *field, unsigned int val) { return regmap_field_update_bits_base(field, ~0, val, NULL, false, false); } static inline int regmap_field_force_write(struct regmap_field *field, unsigned int val) { return regmap_field_update_bits_base(field, ~0, val, NULL, false, true); } static inline int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) { return regmap_field_update_bits_base(field, mask, val, NULL, false, false); } static inline int regmap_field_force_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) { return regmap_field_update_bits_base(field, mask, val, NULL, false, true); } static inline int regmap_fields_write(struct regmap_field *field, unsigned int id, unsigned int val) { return regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, false); } static inline int regmap_fields_force_write(struct regmap_field *field, unsigned int id, unsigned int val) { return regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, true); } static inline int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, unsigned int mask, unsigned int val) { return regmap_fields_update_bits_base(field, id, mask, val, NULL, false, false); } static inline int regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, unsigned int mask, unsigned int val) { return regmap_fields_update_bits_base(field, id, mask, val, NULL, false, true); } /** * struct regmap_irq_type - IRQ type definitions. * * @type_reg_offset: Offset register for the irq type setting. * @type_rising_val: Register value to configure RISING type irq. * @type_falling_val: Register value to configure FALLING type irq. * @type_level_low_val: Register value to configure LEVEL_LOW type irq. * @type_level_high_val: Register value to configure LEVEL_HIGH type irq. * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types. */ struct regmap_irq_type { unsigned int type_reg_offset; unsigned int type_reg_mask; unsigned int type_rising_val; unsigned int type_falling_val; unsigned int type_level_low_val; unsigned int type_level_high_val; unsigned int types_supported; }; /** * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. * * @reg_offset: Offset of the status/mask register within the bank * @mask: Mask used to flag/control the register. * @type: IRQ trigger type setting details if supported. */ struct regmap_irq { unsigned int reg_offset; unsigned int mask; struct regmap_irq_type type; }; #define REGMAP_IRQ_REG(_irq, _off, _mask) \ [_irq] = { .reg_offset = (_off), .mask = (_mask) } #define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ [_id] = { \ .mask = BIT((_id) % (_reg_bits)), \ .reg_offset = (_id) / (_reg_bits), \ } #define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } struct regmap_irq_sub_irq_map { unsigned int num_regs; unsigned int *offset; }; /** * struct regmap_irq_chip - Description of a generic regmap irq_chip. * * @name: Descriptive name for IRQ controller. * * @main_status: Base main status register address. For chips which have * interrupts arranged in separate sub-irq blocks with own IRQ * registers and which have a main IRQ registers indicating * sub-irq blocks with unhandled interrupts. For such chips fill * sub-irq register information in status_base, mask_base and * ack_base. * @num_main_status_bits: Should be given to chips where number of meaningfull * main status bits differs from num_regs. * @sub_reg_offsets: arrays of mappings from main register bits to sub irq * registers. First item in array describes the registers * for first main status bit. Second array for second bit etc. * Offset is given as sub register status offset to * status_base. Should contain num_regs arrays. * Can be provided for chips with more complex mapping than * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... * When used with not_fixed_stride, each one-element array * member contains offset calculated as address from each * peripheral to first peripheral. * @num_main_regs: Number of 'main status' irq registers for chips which have * main_status set. * * @status_base: Base status register address. * @mask_base: Base mask register address. * @mask_writeonly: Base mask register is write only. * @unmask_base: Base unmask register address. for chips who have * separate mask and unmask registers * @ack_base: Base ack address. If zero then the chip is clear on read. * Using zero value is possible with @use_ack bit. * @wake_base: Base address for wake enables. If zero unsupported. * @type_base: Base address for irq type. If zero unsupported. * @virt_reg_base: Base addresses for extra config regs. * @irq_reg_stride: Stride to use for chips where registers are not contiguous. * @init_ack_masked: Ack all masked interrupts once during initalization. * @mask_invert: Inverted mask register: cleared bits are masked out. * @use_ack: Use @ack register even if it is zero. * @ack_invert: Inverted ack register: cleared bits for ack. * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts. * @wake_invert: Inverted wake register: cleared bits are wake enabled. * @type_invert: Invert the type flags. * @type_in_mask: Use the mask registers for controlling irq type. For * interrupts defining type_rising/falling_mask use mask_base * for edge configuration and never update bits in type_base. * @clear_on_unmask: For chips with interrupts cleared on read: read the status * registers before unmasking interrupts to clear any bits * set when they were masked. * @not_fixed_stride: Used when chip peripherals are not laid out with fixed * stride. Must be used with sub_reg_offsets containing the * offsets to each peripheral. * @status_invert: Inverted status register: cleared bits are active interrupts. * @runtime_pm: Hold a runtime PM lock on the device when accessing it. * * @num_regs: Number of registers in each control bank. * @irqs: Descriptors for individual IRQs. Interrupt numbers are * assigned based on the index in the array of the interrupt. * @num_irqs: Number of descriptors. * @num_type_reg: Number of type registers. * @num_virt_regs: Number of non-standard irq configuration registers. * If zero unsupported. * @type_reg_stride: Stride to use for chips where type registers are not * contiguous. * @handle_pre_irq: Driver specific callback to handle interrupt from device * before regmap_irq_handler process the interrupts. * @handle_post_irq: Driver specific callback to handle interrupt from device * after handling the interrupts in regmap_irq_handler(). * @set_type_virt: Driver specific callback to extend regmap_irq_set_type() * and configure virt regs. * @irq_drv_data: Driver specific IRQ data which is passed as parameter when * driver specific pre/post interrupt handler is called. * * This is not intended to handle every possible interrupt controller, but * it should handle a substantial proportion of those that are found in the * wild. */ struct regmap_irq_chip { const char *name; unsigned int main_status; unsigned int num_main_status_bits; struct regmap_irq_sub_irq_map *sub_reg_offsets; int num_main_regs; unsigned int status_base; unsigned int mask_base; unsigned int unmask_base; unsigned int ack_base; unsigned int wake_base; unsigned int type_base; unsigned int *virt_reg_base; unsigned int irq_reg_stride; bool mask_writeonly:1; bool init_ack_masked:1; bool mask_invert:1; bool use_ack:1; bool ack_invert:1; bool clear_ack:1; bool wake_invert:1; bool runtime_pm:1; bool type_invert:1; bool type_in_mask:1; bool clear_on_unmask:1; bool not_fixed_stride:1; bool status_invert:1; int num_regs; const struct regmap_irq *irqs; int num_irqs; int num_type_reg; int num_virt_regs; unsigned int type_reg_stride; int (*handle_pre_irq)(void *irq_drv_data); int (*handle_post_irq)(void *irq_drv_data); int (*set_type_virt)(unsigned int **buf, unsigned int type, unsigned long hwirq, int reg); void *irq_drv_data; }; struct regmap_irq_chip_data; int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data); int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data); void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data); int devm_regmap_add_irq_chip_fwnode(struct device *dev, struct fwnode_handle *fwnode, struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data); void devm_regmap_del_irq_chip(struct device *dev, int irq, struct regmap_irq_chip_data *data); int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); #else /* * These stubs should only ever be called by generic code which has * regmap based facilities, if they ever get called at runtime * something is going wrong and something probably needs to select * REGMAP. */ static inline int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_raw_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, const void *val, size_t val_len) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_noinc_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, size_t val_count) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, size_t val_len) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_noinc_read(struct regmap *map, unsigned int reg, void *val, size_t val_len) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, size_t val_count) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val, bool *change, bool async, bool force) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_set_bits(struct regmap *map, unsigned int reg, unsigned int bits) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_clear_bits(struct regmap *map, unsigned int reg, unsigned int bits) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_field_update_bits_base(struct regmap_field *field, unsigned int mask, unsigned int val, bool *change, bool async, bool force) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, unsigned int mask, unsigned int val, bool *change, bool async, bool force) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_update_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val, bool *change) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val, bool *change) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_write_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_field_write(struct regmap_field *field, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_field_force_write(struct regmap_field *field, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_field_force_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_fields_write(struct regmap_field *field, unsigned int id, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_fields_force_write(struct regmap_field *field, unsigned int id, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, unsigned int mask, unsigned int val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_get_val_bytes(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_get_max_register(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_get_reg_stride(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regcache_sync(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regcache_sync_region(struct regmap *map, unsigned int min, unsigned int max) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regcache_drop_region(struct regmap *map, unsigned int min, unsigned int max) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline void regcache_cache_only(struct regmap *map, bool enable) { WARN_ONCE(1, "regmap API is disabled"); } static inline void regcache_cache_bypass(struct regmap *map, bool enable) { WARN_ONCE(1, "regmap API is disabled"); } static inline void regcache_mark_dirty(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); } static inline void regmap_async_complete(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); } static inline int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, int num_regs) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline int regmap_parse_val(struct regmap *map, const void *buf, unsigned int *val) { WARN_ONCE(1, "regmap API is disabled"); return -EINVAL; } static inline struct regmap *dev_get_regmap(struct device *dev, const char *name) { return NULL; } static inline struct device *regmap_get_device(struct regmap *map) { WARN_ONCE(1, "regmap API is disabled"); return NULL; } #endif #endif PK ! ����e e vtime.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KERNEL_VTIME_H #define _LINUX_KERNEL_VTIME_H #include <linux/context_tracking_state.h> #include <linux/sched.h> #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE #include <asm/vtime.h> #endif /* * Common vtime APIs */ #ifdef CONFIG_VIRT_CPU_ACCOUNTING extern void vtime_account_kernel(struct task_struct *tsk); extern void vtime_account_idle(struct task_struct *tsk); #endif /* !CONFIG_VIRT_CPU_ACCOUNTING */ #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN extern void arch_vtime_task_switch(struct task_struct *tsk); extern void vtime_user_enter(struct task_struct *tsk); extern void vtime_user_exit(struct task_struct *tsk); extern void vtime_guest_enter(struct task_struct *tsk); extern void vtime_guest_exit(struct task_struct *tsk); extern void vtime_init_idle(struct task_struct *tsk, int cpu); #else /* !CONFIG_VIRT_CPU_ACCOUNTING_GEN */ static inline void vtime_user_enter(struct task_struct *tsk) { } static inline void vtime_user_exit(struct task_struct *tsk) { } static inline void vtime_guest_enter(struct task_struct *tsk) { } static inline void vtime_guest_exit(struct task_struct *tsk) { } static inline void vtime_init_idle(struct task_struct *tsk, int cpu) { } #endif #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE extern void vtime_account_irq(struct task_struct *tsk, unsigned int offset); extern void vtime_account_softirq(struct task_struct *tsk); extern void vtime_account_hardirq(struct task_struct *tsk); extern void vtime_flush(struct task_struct *tsk); #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ static inline void vtime_account_irq(struct task_struct *tsk, unsigned int offset) { } static inline void vtime_account_softirq(struct task_struct *tsk) { } static inline void vtime_account_hardirq(struct task_struct *tsk) { } static inline void vtime_flush(struct task_struct *tsk) { } #endif /* * vtime_accounting_enabled_this_cpu() definitions/declarations */ #if defined(CONFIG_VIRT_CPU_ACCOUNTING_NATIVE) static inline bool vtime_accounting_enabled_this_cpu(void) { return true; } extern void vtime_task_switch(struct task_struct *prev); static __always_inline void vtime_account_guest_enter(void) { vtime_account_kernel(current); current->flags |= PF_VCPU; } static __always_inline void vtime_account_guest_exit(void) { vtime_account_kernel(current); current->flags &= ~PF_VCPU; } #elif defined(CONFIG_VIRT_CPU_ACCOUNTING_GEN) /* * Checks if vtime is enabled on some CPU. Cputime readers want to be careful * in that case and compute the tickless cputime. * For now vtime state is tied to context tracking. We might want to decouple * those later if necessary. */ static inline bool vtime_accounting_enabled(void) { return context_tracking_enabled(); } static inline bool vtime_accounting_enabled_cpu(int cpu) { return context_tracking_enabled_cpu(cpu); } static inline bool vtime_accounting_enabled_this_cpu(void) { return context_tracking_enabled_this_cpu(); } extern void vtime_task_switch_generic(struct task_struct *prev); static inline void vtime_task_switch(struct task_struct *prev) { if (vtime_accounting_enabled_this_cpu()) vtime_task_switch_generic(prev); } static __always_inline void vtime_account_guest_enter(void) { if (vtime_accounting_enabled_this_cpu()) vtime_guest_enter(current); else current->flags |= PF_VCPU; } static __always_inline void vtime_account_guest_exit(void) { if (vtime_accounting_enabled_this_cpu()) vtime_guest_exit(current); else current->flags &= ~PF_VCPU; } #else /* !CONFIG_VIRT_CPU_ACCOUNTING */ static inline bool vtime_accounting_enabled_this_cpu(void) { return false; } static inline void vtime_task_switch(struct task_struct *prev) { } static __always_inline void vtime_account_guest_enter(void) { current->flags |= PF_VCPU; } static __always_inline void vtime_account_guest_exit(void) { current->flags &= ~PF_VCPU; } #endif #ifdef CONFIG_IRQ_TIME_ACCOUNTING extern void irqtime_account_irq(struct task_struct *tsk, unsigned int offset); #else static inline void irqtime_account_irq(struct task_struct *tsk, unsigned int offset) { } #endif static inline void account_softirq_enter(struct task_struct *tsk) { vtime_account_irq(tsk, SOFTIRQ_OFFSET); irqtime_account_irq(tsk, SOFTIRQ_OFFSET); } static inline void account_softirq_exit(struct task_struct *tsk) { vtime_account_softirq(tsk); irqtime_account_irq(tsk, 0); } static inline void account_hardirq_enter(struct task_struct *tsk) { vtime_account_irq(tsk, HARDIRQ_OFFSET); irqtime_account_irq(tsk, HARDIRQ_OFFSET); } static inline void account_hardirq_exit(struct task_struct *tsk) { vtime_account_hardirq(tsk); irqtime_account_irq(tsk, 0); } #endif /* _LINUX_KERNEL_VTIME_H */ PK ! ��I� � entry-kvm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_ENTRYKVM_H #define __LINUX_ENTRYKVM_H #include <linux/static_call_types.h> #include <linux/tracehook.h> #include <linux/syscalls.h> #include <linux/seccomp.h> #include <linux/sched.h> #include <linux/tick.h> /* Transfer to guest mode work */ #ifdef CONFIG_KVM_XFER_TO_GUEST_WORK #ifndef ARCH_XFER_TO_GUEST_MODE_WORK # define ARCH_XFER_TO_GUEST_MODE_WORK (0) #endif #define XFER_TO_GUEST_MODE_WORK \ (_TIF_NEED_RESCHED | _TIF_SIGPENDING | _TIF_NOTIFY_SIGNAL | \ _TIF_NOTIFY_RESUME | ARCH_XFER_TO_GUEST_MODE_WORK) struct kvm_vcpu; /** * arch_xfer_to_guest_mode_handle_work - Architecture specific xfer to guest * mode work handling function. * @vcpu: Pointer to current's VCPU data * @ti_work: Cached TIF flags gathered in xfer_to_guest_mode_handle_work() * * Invoked from xfer_to_guest_mode_handle_work(). Defaults to NOOP. Can be * replaced by architecture specific code. */ static inline int arch_xfer_to_guest_mode_handle_work(struct kvm_vcpu *vcpu, unsigned long ti_work); #ifndef arch_xfer_to_guest_mode_work static inline int arch_xfer_to_guest_mode_handle_work(struct kvm_vcpu *vcpu, unsigned long ti_work) { return 0; } #endif /** * xfer_to_guest_mode_handle_work - Check and handle pending work which needs * to be handled before going to guest mode * @vcpu: Pointer to current's VCPU data * * Returns: 0 or an error code */ int xfer_to_guest_mode_handle_work(struct kvm_vcpu *vcpu); /** * xfer_to_guest_mode_prepare - Perform last minute preparation work that * need to be handled while IRQs are disabled * upon entering to guest. * * Has to be invoked with interrupts disabled before the last call * to xfer_to_guest_mode_work_pending(). */ static inline void xfer_to_guest_mode_prepare(void) { lockdep_assert_irqs_disabled(); tick_nohz_user_enter_prepare(); } /** * __xfer_to_guest_mode_work_pending - Check if work is pending * * Returns: True if work pending, False otherwise. * * Bare variant of xfer_to_guest_mode_work_pending(). Can be called from * interrupt enabled code for racy quick checks with care. */ static inline bool __xfer_to_guest_mode_work_pending(void) { unsigned long ti_work = read_thread_flags(); return !!(ti_work & XFER_TO_GUEST_MODE_WORK); } /** * xfer_to_guest_mode_work_pending - Check if work is pending which needs to be * handled before returning to guest mode * * Returns: True if work pending, False otherwise. * * Has to be invoked with interrupts disabled before the transition to * guest mode. */ static inline bool xfer_to_guest_mode_work_pending(void) { lockdep_assert_irqs_disabled(); return __xfer_to_guest_mode_work_pending(); } #endif /* CONFIG_KVM_XFER_TO_GUEST_WORK */ #endif PK ! �.Jkh h generic-radix-tree.hnu �[��� #ifndef _LINUX_GENERIC_RADIX_TREE_H #define _LINUX_GENERIC_RADIX_TREE_H /** * DOC: Generic radix trees/sparse arrays * * Very simple and minimalistic, supporting arbitrary size entries up to * PAGE_SIZE. * * A genradix is defined with the type it will store, like so: * * static GENRADIX(struct foo) foo_genradix; * * The main operations are: * * - genradix_init(radix) - initialize an empty genradix * * - genradix_free(radix) - free all memory owned by the genradix and * reinitialize it * * - genradix_ptr(radix, idx) - gets a pointer to the entry at idx, returning * NULL if that entry does not exist * * - genradix_ptr_alloc(radix, idx, gfp) - gets a pointer to an entry, * allocating it if necessary * * - genradix_for_each(radix, iter, p) - iterate over each entry in a genradix * * The radix tree allocates one page of entries at a time, so entries may exist * that were never explicitly allocated - they will be initialized to all * zeroes. * * Internally, a genradix is just a radix tree of pages, and indexing works in * terms of byte offsets. The wrappers in this header file use sizeof on the * type the radix contains to calculate a byte offset from the index - see * __idx_to_offset. */ #include <asm/page.h> #include <linux/bug.h> #include <linux/kernel.h> #include <linux/log2.h> struct genradix_root; struct __genradix { struct genradix_root *root; }; /* * NOTE: currently, sizeof(_type) must not be larger than PAGE_SIZE: */ #define __GENRADIX_INITIALIZER \ { \ .tree = { \ .root = NULL, \ } \ } /* * We use a 0 size array to stash the type we're storing without taking any * space at runtime - then the various accessor macros can use typeof() to get * to it for casts/sizeof - we also force the alignment so that storing a type * with a ridiculous alignment doesn't blow up the alignment or size of the * genradix. */ #define GENRADIX(_type) \ struct { \ struct __genradix tree; \ _type type[0] __aligned(1); \ } #define DEFINE_GENRADIX(_name, _type) \ GENRADIX(_type) _name = __GENRADIX_INITIALIZER /** * genradix_init - initialize a genradix * @_radix: genradix to initialize * * Does not fail */ #define genradix_init(_radix) \ do { \ *(_radix) = (typeof(*_radix)) __GENRADIX_INITIALIZER; \ } while (0) void __genradix_free(struct __genradix *); /** * genradix_free: free all memory owned by a genradix * @_radix: the genradix to free * * After freeing, @_radix will be reinitialized and empty */ #define genradix_free(_radix) __genradix_free(&(_radix)->tree) static inline size_t __idx_to_offset(size_t idx, size_t obj_size) { if (__builtin_constant_p(obj_size)) BUILD_BUG_ON(obj_size > PAGE_SIZE); else BUG_ON(obj_size > PAGE_SIZE); if (!is_power_of_2(obj_size)) { size_t objs_per_page = PAGE_SIZE / obj_size; return (idx / objs_per_page) * PAGE_SIZE + (idx % objs_per_page) * obj_size; } else { return idx * obj_size; } } #define __genradix_cast(_radix) (typeof((_radix)->type[0]) *) #define __genradix_obj_size(_radix) sizeof((_radix)->type[0]) #define __genradix_idx_to_offset(_radix, _idx) \ __idx_to_offset(_idx, __genradix_obj_size(_radix)) void *__genradix_ptr(struct __genradix *, size_t); /** * genradix_ptr - get a pointer to a genradix entry * @_radix: genradix to access * @_idx: index to fetch * * Returns a pointer to entry at @_idx, or NULL if that entry does not exist. */ #define genradix_ptr(_radix, _idx) \ (__genradix_cast(_radix) \ __genradix_ptr(&(_radix)->tree, \ __genradix_idx_to_offset(_radix, _idx))) void *__genradix_ptr_alloc(struct __genradix *, size_t, gfp_t); /** * genradix_ptr_alloc - get a pointer to a genradix entry, allocating it * if necessary * @_radix: genradix to access * @_idx: index to fetch * @_gfp: gfp mask * * Returns a pointer to entry at @_idx, or NULL on allocation failure */ #define genradix_ptr_alloc(_radix, _idx, _gfp) \ (__genradix_cast(_radix) \ __genradix_ptr_alloc(&(_radix)->tree, \ __genradix_idx_to_offset(_radix, _idx), \ _gfp)) struct genradix_iter { size_t offset; size_t pos; }; /** * genradix_iter_init - initialize a genradix_iter * @_radix: genradix that will be iterated over * @_idx: index to start iterating from */ #define genradix_iter_init(_radix, _idx) \ ((struct genradix_iter) { \ .pos = (_idx), \ .offset = __genradix_idx_to_offset((_radix), (_idx)),\ }) void *__genradix_iter_peek(struct genradix_iter *, struct __genradix *, size_t); /** * genradix_iter_peek - get first entry at or above iterator's current * position * @_iter: a genradix_iter * @_radix: genradix being iterated over * * If no more entries exist at or above @_iter's current position, returns NULL */ #define genradix_iter_peek(_iter, _radix) \ (__genradix_cast(_radix) \ __genradix_iter_peek(_iter, &(_radix)->tree, \ PAGE_SIZE / __genradix_obj_size(_radix))) static inline void __genradix_iter_advance(struct genradix_iter *iter, size_t obj_size) { iter->offset += obj_size; if (!is_power_of_2(obj_size) && (iter->offset & (PAGE_SIZE - 1)) + obj_size > PAGE_SIZE) iter->offset = round_up(iter->offset, PAGE_SIZE); iter->pos++; } #define genradix_iter_advance(_iter, _radix) \ __genradix_iter_advance(_iter, __genradix_obj_size(_radix)) #define genradix_for_each_from(_radix, _iter, _p, _start) \ for (_iter = genradix_iter_init(_radix, _start); \ (_p = genradix_iter_peek(&_iter, _radix)) != NULL; \ genradix_iter_advance(&_iter, _radix)) /** * genradix_for_each - iterate over entry in a genradix * @_radix: genradix to iterate over * @_iter: a genradix_iter to track current position * @_p: pointer to genradix entry type * * On every iteration, @_p will point to the current entry, and @_iter.pos * will be the current entry's index. */ #define genradix_for_each(_radix, _iter, _p) \ genradix_for_each_from(_radix, _iter, _p, 0) int __genradix_prealloc(struct __genradix *, size_t, gfp_t); /** * genradix_prealloc - preallocate entries in a generic radix tree * @_radix: genradix to preallocate * @_nr: number of entries to preallocate * @_gfp: gfp mask * * Returns 0 on success, -ENOMEM on failure */ #define genradix_prealloc(_radix, _nr, _gfp) \ __genradix_prealloc(&(_radix)->tree, \ __genradix_idx_to_offset(_radix, _nr + 1),\ _gfp) #endif /* _LINUX_GENERIC_RADIX_TREE_H */ PK ! ��_� ip.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Definitions for the IP protocol. * * Version: @(#)ip.h 1.0.2 04/28/93 * * Authors: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> */ #ifndef _LINUX_IP_H #define _LINUX_IP_H #include <linux/skbuff.h> #include <uapi/linux/ip.h> static inline struct iphdr *ip_hdr(const struct sk_buff *skb) { return (struct iphdr *)skb_network_header(skb); } static inline struct iphdr *inner_ip_hdr(const struct sk_buff *skb) { return (struct iphdr *)skb_inner_network_header(skb); } static inline struct iphdr *ipip_hdr(const struct sk_buff *skb) { return (struct iphdr *)skb_transport_header(skb); } static inline unsigned int ip_transport_len(const struct sk_buff *skb) { return ntohs(ip_hdr(skb)->tot_len) - skb_network_header_len(skb); } #endif /* _LINUX_IP_H */ PK ! �C�O �O memblock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _LINUX_MEMBLOCK_H #define _LINUX_MEMBLOCK_H #ifdef __KERNEL__ /* * Logical memory blocks. * * Copyright (C) 2001 Peter Bergner, IBM Corp. */ #include <linux/init.h> #include <linux/mm.h> #include <asm/dma.h> extern unsigned long max_low_pfn; extern unsigned long min_low_pfn; /* * highest page */ extern unsigned long max_pfn; /* * highest possible page */ extern unsigned long long max_possible_pfn; /** * enum memblock_flags - definition of memory region attributes * @MEMBLOCK_NONE: no special request * @MEMBLOCK_HOTPLUG: hotpluggable region * @MEMBLOCK_MIRROR: mirrored region * @MEMBLOCK_NOMAP: don't add to kernel direct mapping and treat as * reserved in the memory map; refer to memblock_mark_nomap() description * for further details */ enum memblock_flags { MEMBLOCK_NONE = 0x0, /* No special request */ MEMBLOCK_HOTPLUG = 0x1, /* hotpluggable region */ MEMBLOCK_MIRROR = 0x2, /* mirrored region */ MEMBLOCK_NOMAP = 0x4, /* don't add to kernel direct mapping */ }; /** * struct memblock_region - represents a memory region * @base: base address of the region * @size: size of the region * @flags: memory region attributes * @nid: NUMA node id */ struct memblock_region { phys_addr_t base; phys_addr_t size; enum memblock_flags flags; #ifdef CONFIG_NUMA int nid; #endif }; /** * struct memblock_type - collection of memory regions of certain type * @cnt: number of regions * @max: size of the allocated array * @total_size: size of all regions * @regions: array of regions * @name: the memory type symbolic name */ struct memblock_type { unsigned long cnt; unsigned long max; phys_addr_t total_size; struct memblock_region *regions; char *name; }; /** * struct memblock - memblock allocator metadata * @bottom_up: is bottom up direction? * @current_limit: physical address of the current allocation limit * @memory: usable memory regions * @reserved: reserved memory regions */ struct memblock { bool bottom_up; /* is bottom up direction? */ phys_addr_t current_limit; struct memblock_type memory; struct memblock_type reserved; }; extern struct memblock memblock; #ifndef CONFIG_ARCH_KEEP_MEMBLOCK #define __init_memblock __meminit #define __initdata_memblock __meminitdata void memblock_discard(void); #else #define __init_memblock #define __initdata_memblock static inline void memblock_discard(void) {} #endif void memblock_allow_resize(void); int memblock_add_node(phys_addr_t base, phys_addr_t size, int nid, enum memblock_flags flags); int memblock_add(phys_addr_t base, phys_addr_t size); int memblock_remove(phys_addr_t base, phys_addr_t size); int memblock_free(phys_addr_t base, phys_addr_t size); int memblock_reserve(phys_addr_t base, phys_addr_t size); #ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP int memblock_physmem_add(phys_addr_t base, phys_addr_t size); #endif void memblock_trim_memory(phys_addr_t align); bool memblock_overlaps_region(struct memblock_type *type, phys_addr_t base, phys_addr_t size); int memblock_mark_hotplug(phys_addr_t base, phys_addr_t size); int memblock_clear_hotplug(phys_addr_t base, phys_addr_t size); int memblock_mark_mirror(phys_addr_t base, phys_addr_t size); int memblock_mark_nomap(phys_addr_t base, phys_addr_t size); int memblock_clear_nomap(phys_addr_t base, phys_addr_t size); void memblock_free_all(void); void memblock_free_ptr(void *ptr, size_t size); void reset_node_managed_pages(pg_data_t *pgdat); void reset_all_zones_managed_pages(void); /* Low level functions */ void __next_mem_range(u64 *idx, int nid, enum memblock_flags flags, struct memblock_type *type_a, struct memblock_type *type_b, phys_addr_t *out_start, phys_addr_t *out_end, int *out_nid); void __next_mem_range_rev(u64 *idx, int nid, enum memblock_flags flags, struct memblock_type *type_a, struct memblock_type *type_b, phys_addr_t *out_start, phys_addr_t *out_end, int *out_nid); void __memblock_free_late(phys_addr_t base, phys_addr_t size); #ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP static inline void __next_physmem_range(u64 *idx, struct memblock_type *type, phys_addr_t *out_start, phys_addr_t *out_end) { extern struct memblock_type physmem; __next_mem_range(idx, NUMA_NO_NODE, MEMBLOCK_NONE, &physmem, type, out_start, out_end, NULL); } /** * for_each_physmem_range - iterate through physmem areas not included in type. * @i: u64 used as loop variable * @type: ptr to memblock_type which excludes from the iteration, can be %NULL * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL */ #define for_each_physmem_range(i, type, p_start, p_end) \ for (i = 0, __next_physmem_range(&i, type, p_start, p_end); \ i != (u64)ULLONG_MAX; \ __next_physmem_range(&i, type, p_start, p_end)) #endif /* CONFIG_HAVE_MEMBLOCK_PHYS_MAP */ /** * __for_each_mem_range - iterate through memblock areas from type_a and not * included in type_b. Or just type_a if type_b is NULL. * @i: u64 used as loop variable * @type_a: ptr to memblock_type to iterate * @type_b: ptr to memblock_type which excludes from the iteration * @nid: node selector, %NUMA_NO_NODE for all nodes * @flags: pick from blocks based on memory attributes * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * @p_nid: ptr to int for nid of the range, can be %NULL */ #define __for_each_mem_range(i, type_a, type_b, nid, flags, \ p_start, p_end, p_nid) \ for (i = 0, __next_mem_range(&i, nid, flags, type_a, type_b, \ p_start, p_end, p_nid); \ i != (u64)ULLONG_MAX; \ __next_mem_range(&i, nid, flags, type_a, type_b, \ p_start, p_end, p_nid)) /** * __for_each_mem_range_rev - reverse iterate through memblock areas from * type_a and not included in type_b. Or just type_a if type_b is NULL. * @i: u64 used as loop variable * @type_a: ptr to memblock_type to iterate * @type_b: ptr to memblock_type which excludes from the iteration * @nid: node selector, %NUMA_NO_NODE for all nodes * @flags: pick from blocks based on memory attributes * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * @p_nid: ptr to int for nid of the range, can be %NULL */ #define __for_each_mem_range_rev(i, type_a, type_b, nid, flags, \ p_start, p_end, p_nid) \ for (i = (u64)ULLONG_MAX, \ __next_mem_range_rev(&i, nid, flags, type_a, type_b, \ p_start, p_end, p_nid); \ i != (u64)ULLONG_MAX; \ __next_mem_range_rev(&i, nid, flags, type_a, type_b, \ p_start, p_end, p_nid)) /** * for_each_mem_range - iterate through memory areas. * @i: u64 used as loop variable * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL */ #define for_each_mem_range(i, p_start, p_end) \ __for_each_mem_range(i, &memblock.memory, NULL, NUMA_NO_NODE, \ MEMBLOCK_HOTPLUG, p_start, p_end, NULL) /** * for_each_mem_range_rev - reverse iterate through memblock areas from * type_a and not included in type_b. Or just type_a if type_b is NULL. * @i: u64 used as loop variable * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL */ #define for_each_mem_range_rev(i, p_start, p_end) \ __for_each_mem_range_rev(i, &memblock.memory, NULL, NUMA_NO_NODE, \ MEMBLOCK_HOTPLUG, p_start, p_end, NULL) /** * for_each_reserved_mem_range - iterate over all reserved memblock areas * @i: u64 used as loop variable * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * * Walks over reserved areas of memblock. Available as soon as memblock * is initialized. */ #define for_each_reserved_mem_range(i, p_start, p_end) \ __for_each_mem_range(i, &memblock.reserved, NULL, NUMA_NO_NODE, \ MEMBLOCK_NONE, p_start, p_end, NULL) static inline bool memblock_is_hotpluggable(struct memblock_region *m) { return m->flags & MEMBLOCK_HOTPLUG; } static inline bool memblock_is_mirror(struct memblock_region *m) { return m->flags & MEMBLOCK_MIRROR; } static inline bool memblock_is_nomap(struct memblock_region *m) { return m->flags & MEMBLOCK_NOMAP; } int memblock_search_pfn_nid(unsigned long pfn, unsigned long *start_pfn, unsigned long *end_pfn); void __next_mem_pfn_range(int *idx, int nid, unsigned long *out_start_pfn, unsigned long *out_end_pfn, int *out_nid); /** * for_each_mem_pfn_range - early memory pfn range iterator * @i: an integer used as loop variable * @nid: node selector, %MAX_NUMNODES for all nodes * @p_start: ptr to ulong for start pfn of the range, can be %NULL * @p_end: ptr to ulong for end pfn of the range, can be %NULL * @p_nid: ptr to int for nid of the range, can be %NULL * * Walks over configured memory ranges. */ #define for_each_mem_pfn_range(i, nid, p_start, p_end, p_nid) \ for (i = -1, __next_mem_pfn_range(&i, nid, p_start, p_end, p_nid); \ i >= 0; __next_mem_pfn_range(&i, nid, p_start, p_end, p_nid)) #ifdef CONFIG_DEFERRED_STRUCT_PAGE_INIT void __next_mem_pfn_range_in_zone(u64 *idx, struct zone *zone, unsigned long *out_spfn, unsigned long *out_epfn); /** * for_each_free_mem_pfn_range_in_zone - iterate through zone specific free * memblock areas * @i: u64 used as loop variable * @zone: zone in which all of the memory blocks reside * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * * Walks over free (memory && !reserved) areas of memblock in a specific * zone. Available once memblock and an empty zone is initialized. The main * assumption is that the zone start, end, and pgdat have been associated. * This way we can use the zone to determine NUMA node, and if a given part * of the memblock is valid for the zone. */ #define for_each_free_mem_pfn_range_in_zone(i, zone, p_start, p_end) \ for (i = 0, \ __next_mem_pfn_range_in_zone(&i, zone, p_start, p_end); \ i != U64_MAX; \ __next_mem_pfn_range_in_zone(&i, zone, p_start, p_end)) /** * for_each_free_mem_pfn_range_in_zone_from - iterate through zone specific * free memblock areas from a given point * @i: u64 used as loop variable * @zone: zone in which all of the memory blocks reside * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * * Walks over free (memory && !reserved) areas of memblock in a specific * zone, continuing from current position. Available as soon as memblock is * initialized. */ #define for_each_free_mem_pfn_range_in_zone_from(i, zone, p_start, p_end) \ for (; i != U64_MAX; \ __next_mem_pfn_range_in_zone(&i, zone, p_start, p_end)) int __init deferred_page_init_max_threads(const struct cpumask *node_cpumask); #endif /* CONFIG_DEFERRED_STRUCT_PAGE_INIT */ /** * for_each_free_mem_range - iterate through free memblock areas * @i: u64 used as loop variable * @nid: node selector, %NUMA_NO_NODE for all nodes * @flags: pick from blocks based on memory attributes * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * @p_nid: ptr to int for nid of the range, can be %NULL * * Walks over free (memory && !reserved) areas of memblock. Available as * soon as memblock is initialized. */ #define for_each_free_mem_range(i, nid, flags, p_start, p_end, p_nid) \ __for_each_mem_range(i, &memblock.memory, &memblock.reserved, \ nid, flags, p_start, p_end, p_nid) /** * for_each_free_mem_range_reverse - rev-iterate through free memblock areas * @i: u64 used as loop variable * @nid: node selector, %NUMA_NO_NODE for all nodes * @flags: pick from blocks based on memory attributes * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL * @p_nid: ptr to int for nid of the range, can be %NULL * * Walks over free (memory && !reserved) areas of memblock in reverse * order. Available as soon as memblock is initialized. */ #define for_each_free_mem_range_reverse(i, nid, flags, p_start, p_end, \ p_nid) \ __for_each_mem_range_rev(i, &memblock.memory, &memblock.reserved, \ nid, flags, p_start, p_end, p_nid) int memblock_set_node(phys_addr_t base, phys_addr_t size, struct memblock_type *type, int nid); #ifdef CONFIG_NUMA static inline void memblock_set_region_node(struct memblock_region *r, int nid) { r->nid = nid; } static inline int memblock_get_region_node(const struct memblock_region *r) { return r->nid; } #else static inline void memblock_set_region_node(struct memblock_region *r, int nid) { } static inline int memblock_get_region_node(const struct memblock_region *r) { return 0; } #endif /* CONFIG_NUMA */ /* Flags for memblock allocation APIs */ #define MEMBLOCK_ALLOC_ANYWHERE (~(phys_addr_t)0) #define MEMBLOCK_ALLOC_ACCESSIBLE 0 #define MEMBLOCK_ALLOC_KASAN 1 /* We are using top down, so it is safe to use 0 here */ #define MEMBLOCK_LOW_LIMIT 0 #ifndef ARCH_LOW_ADDRESS_LIMIT #define ARCH_LOW_ADDRESS_LIMIT 0xffffffffUL #endif phys_addr_t memblock_phys_alloc_range(phys_addr_t size, phys_addr_t align, phys_addr_t start, phys_addr_t end); phys_addr_t memblock_alloc_range_nid(phys_addr_t size, phys_addr_t align, phys_addr_t start, phys_addr_t end, int nid, bool exact_nid); phys_addr_t memblock_phys_alloc_try_nid(phys_addr_t size, phys_addr_t align, int nid); static __always_inline phys_addr_t memblock_phys_alloc(phys_addr_t size, phys_addr_t align) { return memblock_phys_alloc_range(size, align, 0, MEMBLOCK_ALLOC_ACCESSIBLE); } void *memblock_alloc_exact_nid_raw(phys_addr_t size, phys_addr_t align, phys_addr_t min_addr, phys_addr_t max_addr, int nid); void *memblock_alloc_try_nid_raw(phys_addr_t size, phys_addr_t align, phys_addr_t min_addr, phys_addr_t max_addr, int nid); void *memblock_alloc_try_nid(phys_addr_t size, phys_addr_t align, phys_addr_t min_addr, phys_addr_t max_addr, int nid); static __always_inline void *memblock_alloc(phys_addr_t size, phys_addr_t align) { return memblock_alloc_try_nid(size, align, MEMBLOCK_LOW_LIMIT, MEMBLOCK_ALLOC_ACCESSIBLE, NUMA_NO_NODE); } static inline void *memblock_alloc_raw(phys_addr_t size, phys_addr_t align) { return memblock_alloc_try_nid_raw(size, align, MEMBLOCK_LOW_LIMIT, MEMBLOCK_ALLOC_ACCESSIBLE, NUMA_NO_NODE); } static inline void *memblock_alloc_from(phys_addr_t size, phys_addr_t align, phys_addr_t min_addr) { return memblock_alloc_try_nid(size, align, min_addr, MEMBLOCK_ALLOC_ACCESSIBLE, NUMA_NO_NODE); } static inline void *memblock_alloc_low(phys_addr_t size, phys_addr_t align) { return memblock_alloc_try_nid(size, align, MEMBLOCK_LOW_LIMIT, ARCH_LOW_ADDRESS_LIMIT, NUMA_NO_NODE); } static inline void *memblock_alloc_node(phys_addr_t size, phys_addr_t align, int nid) { return memblock_alloc_try_nid(size, align, MEMBLOCK_LOW_LIMIT, MEMBLOCK_ALLOC_ACCESSIBLE, nid); } static inline void memblock_free_late(phys_addr_t base, phys_addr_t size) { __memblock_free_late(base, size); } /* * Set the allocation direction to bottom-up or top-down. */ static inline __init_memblock void memblock_set_bottom_up(bool enable) { memblock.bottom_up = enable; } /* * Check if the allocation direction is bottom-up or not. * if this is true, that said, memblock will allocate memory * in bottom-up direction. */ static inline __init_memblock bool memblock_bottom_up(void) { return memblock.bottom_up; } phys_addr_t memblock_phys_mem_size(void); phys_addr_t memblock_reserved_size(void); phys_addr_t memblock_start_of_DRAM(void); phys_addr_t memblock_end_of_DRAM(void); void memblock_enforce_memory_limit(phys_addr_t memory_limit); void memblock_cap_memory_range(phys_addr_t base, phys_addr_t size); void memblock_mem_limit_remove_map(phys_addr_t limit); bool memblock_is_memory(phys_addr_t addr); bool memblock_is_map_memory(phys_addr_t addr); bool memblock_is_region_memory(phys_addr_t base, phys_addr_t size); bool memblock_is_reserved(phys_addr_t addr); bool memblock_is_region_reserved(phys_addr_t base, phys_addr_t size); void memblock_dump_all(void); /** * memblock_set_current_limit - Set the current allocation limit to allow * limiting allocations to what is currently * accessible during boot * @limit: New limit value (physical address) */ void memblock_set_current_limit(phys_addr_t limit); phys_addr_t memblock_get_current_limit(void); /* * pfn conversion functions * * While the memory MEMBLOCKs should always be page aligned, the reserved * MEMBLOCKs may not be. This accessor attempt to provide a very clear * idea of what they return for such non aligned MEMBLOCKs. */ /** * memblock_region_memory_base_pfn - get the lowest pfn of the memory region * @reg: memblock_region structure * * Return: the lowest pfn intersecting with the memory region */ static inline unsigned long memblock_region_memory_base_pfn(const struct memblock_region *reg) { return PFN_UP(reg->base); } /** * memblock_region_memory_end_pfn - get the end pfn of the memory region * @reg: memblock_region structure * * Return: the end_pfn of the reserved region */ static inline unsigned long memblock_region_memory_end_pfn(const struct memblock_region *reg) { return PFN_DOWN(reg->base + reg->size); } /** * memblock_region_reserved_base_pfn - get the lowest pfn of the reserved region * @reg: memblock_region structure * * Return: the lowest pfn intersecting with the reserved region */ static inline unsigned long memblock_region_reserved_base_pfn(const struct memblock_region *reg) { return PFN_DOWN(reg->base); } /** * memblock_region_reserved_end_pfn - get the end pfn of the reserved region * @reg: memblock_region structure * * Return: the end_pfn of the reserved region */ static inline unsigned long memblock_region_reserved_end_pfn(const struct memblock_region *reg) { return PFN_UP(reg->base + reg->size); } /** * for_each_mem_region - itereate over memory regions * @region: loop variable */ #define for_each_mem_region(region) \ for (region = memblock.memory.regions; \ region < (memblock.memory.regions + memblock.memory.cnt); \ region++) /** * for_each_reserved_mem_region - itereate over reserved memory regions * @region: loop variable */ #define for_each_reserved_mem_region(region) \ for (region = memblock.reserved.regions; \ region < (memblock.reserved.regions + memblock.reserved.cnt); \ region++) extern void *alloc_large_system_hash(const char *tablename, unsigned long bucketsize, unsigned long numentries, int scale, int flags, unsigned int *_hash_shift, unsigned int *_hash_mask, unsigned long low_limit, unsigned long high_limit); #define HASH_EARLY 0x00000001 /* Allocating during early boot? */ #define HASH_SMALL 0x00000002 /* sub-page allocation allowed, min * shift passed via *_hash_shift */ #define HASH_ZERO 0x00000004 /* Zero allocated hash table */ /* Only NUMA needs hash distribution. 64bit NUMA architectures have * sufficient vmalloc space. */ #ifdef CONFIG_NUMA #define HASHDIST_DEFAULT IS_ENABLED(CONFIG_64BIT) extern int hashdist; /* Distribute hashes across NUMA nodes? */ #else #define hashdist (0) #endif #ifdef CONFIG_MEMTEST extern void early_memtest(phys_addr_t start, phys_addr_t end); #else static inline void early_memtest(phys_addr_t start, phys_addr_t end) { } #endif #endif /* __KERNEL__ */ #endif /* _LINUX_MEMBLOCK_H */ PK ! ��í8 8 davinci_emac.hnu �[��� /* * TI DaVinci EMAC platform support * * Author: Kevin Hilman, Deep Root Systems, LLC * * 2007 (c) Deep Root Systems, LLC. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. */ #ifndef _LINUX_DAVINCI_EMAC_H #define _LINUX_DAVINCI_EMAC_H #include <linux/if_ether.h> #include <linux/nvmem-consumer.h> struct mdio_platform_data { unsigned long bus_freq; }; struct emac_platform_data { char mac_addr[ETH_ALEN]; u32 ctrl_reg_offset; u32 ctrl_mod_reg_offset; u32 ctrl_ram_offset; u32 hw_ram_addr; u32 ctrl_ram_size; /* * phy_id can be one of the following: * - NULL : use the first phy on the bus, * - "" : force to 100/full, no mdio control * - "<bus>:<addr>" : use the specified bus and phy */ const char *phy_id; u8 rmii_en; u8 version; bool no_bd_ram; void (*interrupt_enable) (void); void (*interrupt_disable) (void); }; enum { EMAC_VERSION_1, /* DM644x */ EMAC_VERSION_2, /* DM646x */ }; #endif PK ! ���BO O tboot.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * tboot.h: shared data structure with tboot and kernel and functions * used by kernel for runtime support of Intel(R) Trusted * Execution Technology * * Copyright (c) 2006-2009, Intel Corporation */ #ifndef _LINUX_TBOOT_H #define _LINUX_TBOOT_H /* these must have the values from 0-5 in this order */ enum { TB_SHUTDOWN_REBOOT = 0, TB_SHUTDOWN_S5, TB_SHUTDOWN_S4, TB_SHUTDOWN_S3, TB_SHUTDOWN_HALT, TB_SHUTDOWN_WFS }; #ifdef CONFIG_INTEL_TXT #include <linux/acpi.h> /* used to communicate between tboot and the launched kernel */ #define TB_KEY_SIZE 64 /* 512 bits */ #define MAX_TB_MAC_REGIONS 32 struct tboot_mac_region { u64 start; /* must be 64 byte -aligned */ u32 size; /* must be 64 byte -granular */ } __packed; /* GAS - Generic Address Structure (ACPI 2.0+) */ struct tboot_acpi_generic_address { u8 space_id; u8 bit_width; u8 bit_offset; u8 access_width; u64 address; } __packed; /* * combines Sx info from FADT and FACS tables per ACPI 2.0+ spec * (https://uefi.org/specifications) */ struct tboot_acpi_sleep_info { struct tboot_acpi_generic_address pm1a_cnt_blk; struct tboot_acpi_generic_address pm1b_cnt_blk; struct tboot_acpi_generic_address pm1a_evt_blk; struct tboot_acpi_generic_address pm1b_evt_blk; u16 pm1a_cnt_val; u16 pm1b_cnt_val; u64 wakeup_vector; u32 vector_width; u64 kernel_s3_resume_vector; } __packed; /* * shared memory page used for communication between tboot and kernel */ struct tboot { /* * version 3+ fields: */ /* TBOOT_UUID */ u8 uuid[16]; /* version number: 5 is current */ u32 version; /* physical addr of tb_log_t log */ u32 log_addr; /* * physical addr of entry point for tboot shutdown and * type of shutdown (TB_SHUTDOWN_*) being requested */ u32 shutdown_entry; u32 shutdown_type; /* kernel-specified ACPI info for Sx shutdown */ struct tboot_acpi_sleep_info acpi_sinfo; /* tboot location in memory (physical) */ u32 tboot_base; u32 tboot_size; /* memory regions (phys addrs) for tboot to MAC on S3 */ u8 num_mac_regions; struct tboot_mac_region mac_regions[MAX_TB_MAC_REGIONS]; /* * version 4+ fields: */ /* symmetric key for use by kernel; will be encrypted on S3 */ u8 s3_key[TB_KEY_SIZE]; /* * version 5+ fields: */ /* used to 4byte-align num_in_wfs */ u8 reserved_align[3]; /* number of processors in wait-for-SIPI */ u32 num_in_wfs; } __packed; /* * UUID for tboot data struct to facilitate matching * defined as {663C8DFF-E8B3-4b82-AABF-19EA4D057A08} by tboot, which is * represented as {} in the char array used here */ #define TBOOT_UUID {0xff, 0x8d, 0x3c, 0x66, 0xb3, 0xe8, 0x82, 0x4b, 0xbf,\ 0xaa, 0x19, 0xea, 0x4d, 0x5, 0x7a, 0x8} bool tboot_enabled(void); extern void tboot_probe(void); extern void tboot_shutdown(u32 shutdown_type); extern struct acpi_table_header *tboot_get_dmar_table( struct acpi_table_header *dmar_tbl); extern int tboot_force_iommu(void); #else #define tboot_enabled() 0 #define tboot_probe() do { } while (0) #define tboot_shutdown(shutdown_type) do { } while (0) #define tboot_sleep(sleep_state, pm1a_control, pm1b_control) \ do { } while (0) #define tboot_get_dmar_table(dmar_tbl) (dmar_tbl) #define tboot_force_iommu() 0 #endif /* !CONFIG_INTEL_TXT */ #endif /* _LINUX_TBOOT_H */ PK ! fU6 blk-mq-rdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BLK_MQ_RDMA_H #define _LINUX_BLK_MQ_RDMA_H struct blk_mq_tag_set; struct ib_device; int blk_mq_rdma_map_queues(struct blk_mq_queue_map *map, struct ib_device *dev, int first_vec); #endif /* _LINUX_BLK_MQ_RDMA_H */ PK ! ��oD D hdlcdrv.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * hdlcdrv.h -- HDLC packet radio network driver. * The Linux soundcard driver for 1200 baud and 9600 baud packet radio * (C) 1996-1998 by Thomas Sailer, HB9JNX/AE4WA */ #ifndef _HDLCDRV_H #define _HDLCDRV_H #include <linux/netdevice.h> #include <linux/if.h> #include <linux/spinlock.h> #include <uapi/linux/hdlcdrv.h> #define HDLCDRV_MAGIC 0x5ac6e778 #define HDLCDRV_HDLCBUFFER 32 /* should be a power of 2 for speed reasons */ #define HDLCDRV_BITBUFFER 256 /* should be a power of 2 for speed reasons */ #undef HDLCDRV_LOOPBACK /* define for HDLC debugging purposes */ #define HDLCDRV_DEBUG /* maximum packet length, excluding CRC */ #define HDLCDRV_MAXFLEN 400 struct hdlcdrv_hdlcbuffer { spinlock_t lock; unsigned rd, wr; unsigned short buf[HDLCDRV_HDLCBUFFER]; }; #ifdef HDLCDRV_DEBUG struct hdlcdrv_bitbuffer { unsigned int rd; unsigned int wr; unsigned int shreg; unsigned char buffer[HDLCDRV_BITBUFFER]; }; static inline void hdlcdrv_add_bitbuffer(struct hdlcdrv_bitbuffer *buf, unsigned int bit) { unsigned char new; new = buf->shreg & 1; buf->shreg >>= 1; buf->shreg |= (!!bit) << 7; if (new) { buf->buffer[buf->wr] = buf->shreg; buf->wr = (buf->wr+1) % sizeof(buf->buffer); buf->shreg = 0x80; } } static inline void hdlcdrv_add_bitbuffer_word(struct hdlcdrv_bitbuffer *buf, unsigned int bits) { buf->buffer[buf->wr] = bits & 0xff; buf->wr = (buf->wr+1) % sizeof(buf->buffer); buf->buffer[buf->wr] = (bits >> 8) & 0xff; buf->wr = (buf->wr+1) % sizeof(buf->buffer); } #endif /* HDLCDRV_DEBUG */ /* -------------------------------------------------------------------- */ /* * Information that need to be kept for each driver. */ struct hdlcdrv_ops { /* * first some informations needed by the hdlcdrv routines */ const char *drvname; const char *drvinfo; /* * the routines called by the hdlcdrv routines */ int (*open)(struct net_device *); int (*close)(struct net_device *); int (*ioctl)(struct net_device *, void __user *, struct hdlcdrv_ioctl *, int); }; struct hdlcdrv_state { int magic; int opened; const struct hdlcdrv_ops *ops; struct { int bitrate; } par; struct hdlcdrv_pttoutput { int dma2; int seriobase; int pariobase; int midiiobase; unsigned int flags; } ptt_out; struct hdlcdrv_channel_params ch_params; struct hdlcdrv_hdlcrx { struct hdlcdrv_hdlcbuffer hbuf; unsigned long in_hdlc_rx; /* 0 = sync hunt, != 0 receiving */ int rx_state; unsigned int bitstream; unsigned int bitbuf; int numbits; unsigned char dcd; int len; unsigned char *bp; unsigned char buffer[HDLCDRV_MAXFLEN+2]; } hdlcrx; struct hdlcdrv_hdlctx { struct hdlcdrv_hdlcbuffer hbuf; unsigned long in_hdlc_tx; /* * 0 = send flags * 1 = send txtail (flags) * 2 = send packet */ int tx_state; int numflags; unsigned int bitstream; unsigned char ptt; int calibrate; int slotcnt; unsigned int bitbuf; int numbits; int len; unsigned char *bp; unsigned char buffer[HDLCDRV_MAXFLEN+2]; } hdlctx; #ifdef HDLCDRV_DEBUG struct hdlcdrv_bitbuffer bitbuf_channel; struct hdlcdrv_bitbuffer bitbuf_hdlc; #endif /* HDLCDRV_DEBUG */ int ptt_keyed; /* queued skb for transmission */ struct sk_buff *skb; }; /* -------------------------------------------------------------------- */ static inline int hdlcdrv_hbuf_full(struct hdlcdrv_hdlcbuffer *hb) { unsigned long flags; int ret; spin_lock_irqsave(&hb->lock, flags); ret = !((HDLCDRV_HDLCBUFFER - 1 + hb->rd - hb->wr) % HDLCDRV_HDLCBUFFER); spin_unlock_irqrestore(&hb->lock, flags); return ret; } /* -------------------------------------------------------------------- */ static inline int hdlcdrv_hbuf_empty(struct hdlcdrv_hdlcbuffer *hb) { unsigned long flags; int ret; spin_lock_irqsave(&hb->lock, flags); ret = (hb->rd == hb->wr); spin_unlock_irqrestore(&hb->lock, flags); return ret; } /* -------------------------------------------------------------------- */ static inline unsigned short hdlcdrv_hbuf_get(struct hdlcdrv_hdlcbuffer *hb) { unsigned long flags; unsigned short val; unsigned newr; spin_lock_irqsave(&hb->lock, flags); if (hb->rd == hb->wr) val = 0; else { newr = (hb->rd+1) % HDLCDRV_HDLCBUFFER; val = hb->buf[hb->rd]; hb->rd = newr; } spin_unlock_irqrestore(&hb->lock, flags); return val; } /* -------------------------------------------------------------------- */ static inline void hdlcdrv_hbuf_put(struct hdlcdrv_hdlcbuffer *hb, unsigned short val) { unsigned newp; unsigned long flags; spin_lock_irqsave(&hb->lock, flags); newp = (hb->wr+1) % HDLCDRV_HDLCBUFFER; if (newp != hb->rd) { hb->buf[hb->wr] = val & 0xffff; hb->wr = newp; } spin_unlock_irqrestore(&hb->lock, flags); } /* -------------------------------------------------------------------- */ static inline void hdlcdrv_putbits(struct hdlcdrv_state *s, unsigned int bits) { hdlcdrv_hbuf_put(&s->hdlcrx.hbuf, bits); } static inline unsigned int hdlcdrv_getbits(struct hdlcdrv_state *s) { unsigned int ret; if (hdlcdrv_hbuf_empty(&s->hdlctx.hbuf)) { if (s->hdlctx.calibrate > 0) s->hdlctx.calibrate--; else s->hdlctx.ptt = 0; ret = 0; } else ret = hdlcdrv_hbuf_get(&s->hdlctx.hbuf); #ifdef HDLCDRV_LOOPBACK hdlcdrv_hbuf_put(&s->hdlcrx.hbuf, ret); #endif /* HDLCDRV_LOOPBACK */ return ret; } static inline void hdlcdrv_channelbit(struct hdlcdrv_state *s, unsigned int bit) { #ifdef HDLCDRV_DEBUG hdlcdrv_add_bitbuffer(&s->bitbuf_channel, bit); #endif /* HDLCDRV_DEBUG */ } static inline void hdlcdrv_setdcd(struct hdlcdrv_state *s, int dcd) { s->hdlcrx.dcd = !!dcd; } static inline int hdlcdrv_ptt(struct hdlcdrv_state *s) { return s->hdlctx.ptt || (s->hdlctx.calibrate > 0); } /* -------------------------------------------------------------------- */ void hdlcdrv_receiver(struct net_device *, struct hdlcdrv_state *); void hdlcdrv_transmitter(struct net_device *, struct hdlcdrv_state *); void hdlcdrv_arbitrate(struct net_device *, struct hdlcdrv_state *); struct net_device *hdlcdrv_register(const struct hdlcdrv_ops *ops, unsigned int privsize, const char *ifname, unsigned int baseaddr, unsigned int irq, unsigned int dma); void hdlcdrv_unregister(struct net_device *dev); /* -------------------------------------------------------------------- */ #endif /* _HDLCDRV_H */ PK ! �? 8 8 cache.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_CACHE_H #define __LINUX_CACHE_H #include <uapi/linux/kernel.h> #include <asm/cache.h> #ifndef L1_CACHE_ALIGN #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) #endif #ifndef SMP_CACHE_BYTES #define SMP_CACHE_BYTES L1_CACHE_BYTES #endif /* * __read_mostly is used to keep rarely changing variables out of frequently * updated cachelines. Its use should be reserved for data that is used * frequently in hot paths. Performance traces can help decide when to use * this. You want __read_mostly data to be tightly packed, so that in the * best case multiple frequently read variables for a hot path will be next * to each other in order to reduce the number of cachelines needed to * execute a critical path. We should be mindful and selective of its use. * ie: if you're going to use it please supply a *good* justification in your * commit log */ #ifndef __read_mostly #define __read_mostly #endif /* * __ro_after_init is used to mark things that are read-only after init (i.e. * after mark_rodata_ro() has been called). These are effectively read-only, * but may get written to during init, so can't live in .rodata (via "const"). */ #ifndef __ro_after_init #define __ro_after_init __section(".data..ro_after_init") #endif #ifndef ____cacheline_aligned #define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) #endif #ifndef ____cacheline_aligned_in_smp #ifdef CONFIG_SMP #define ____cacheline_aligned_in_smp ____cacheline_aligned #else #define ____cacheline_aligned_in_smp #endif /* CONFIG_SMP */ #endif #ifndef __cacheline_aligned #define __cacheline_aligned \ __attribute__((__aligned__(SMP_CACHE_BYTES), \ __section__(".data..cacheline_aligned"))) #endif /* __cacheline_aligned */ #ifndef __cacheline_aligned_in_smp #ifdef CONFIG_SMP #define __cacheline_aligned_in_smp __cacheline_aligned #else #define __cacheline_aligned_in_smp #endif /* CONFIG_SMP */ #endif /* * The maximum alignment needed for some critical structures * These could be inter-node cacheline sizes/L3 cacheline * size etc. Define this in asm/cache.h for your arch */ #ifndef INTERNODE_CACHE_SHIFT #define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT #endif #if !defined(____cacheline_internodealigned_in_smp) #if defined(CONFIG_SMP) #define ____cacheline_internodealigned_in_smp \ __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) #else #define ____cacheline_internodealigned_in_smp #endif #endif #ifndef CONFIG_ARCH_HAS_CACHE_LINE_SIZE #define cache_line_size() L1_CACHE_BYTES #endif #endif /* __LINUX_CACHE_H */ PK ! � drbd_genl_api.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DRBD_GENL_STRUCT_H #define DRBD_GENL_STRUCT_H /** * struct drbd_genlmsghdr - DRBD specific header used in NETLINK_GENERIC requests * @minor: * For admin requests (user -> kernel): which minor device to operate on. * For (unicast) replies or informational (broadcast) messages * (kernel -> user): which minor device the information is about. * If we do not operate on minors, but on connections or resources, * the minor value shall be (~0), and the attribute DRBD_NLA_CFG_CONTEXT * is used instead. * @flags: possible operation modifiers (relevant only for user->kernel): * DRBD_GENL_F_SET_DEFAULTS * @volume: * When creating a new minor (adding it to a resource), the resource needs * to know which volume number within the resource this is supposed to be. * The volume number corresponds to the same volume number on the remote side, * whereas the minor number on the remote side may be different * (union with flags). * @ret_code: kernel->userland unicast cfg reply return code (union with flags); */ struct drbd_genlmsghdr { __u32 minor; union { __u32 flags; __s32 ret_code; }; }; /* To be used in drbd_genlmsghdr.flags */ enum { DRBD_GENL_F_SET_DEFAULTS = 1, }; enum drbd_state_info_bcast_reason { SIB_GET_STATUS_REPLY = 1, SIB_STATE_CHANGE = 2, SIB_HELPER_PRE = 3, SIB_HELPER_POST = 4, SIB_SYNC_PROGRESS = 5, }; /* hack around predefined gcc/cpp "linux=1", * we cannot possibly include <1/drbd_genl.h> */ #undef linux #include <linux/drbd.h> #define GENL_MAGIC_VERSION API_VERSION #define GENL_MAGIC_FAMILY drbd #define GENL_MAGIC_FAMILY_HDRSZ sizeof(struct drbd_genlmsghdr) #define GENL_MAGIC_INCLUDE_FILE <linux/drbd_genl.h> #include <linux/genl_magic_struct.h> #endif PK ! 8��t ? ? key.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Authentication token and access key management * * Copyright (C) 2004, 2007 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) * * See Documentation/security/keys/core.rst for information on keys/keyrings. */ #ifndef _LINUX_KEY_H #define _LINUX_KEY_H #include <linux/types.h> #include <linux/list.h> #include <linux/rbtree.h> #include <linux/rcupdate.h> #include <linux/sysctl.h> #include <linux/rwsem.h> #include <linux/atomic.h> #include <linux/assoc_array.h> #include <linux/refcount.h> #include <linux/time64.h> #ifdef __KERNEL__ #include <linux/uidgid.h> /* key handle serial number */ typedef int32_t key_serial_t; /* key handle permissions mask */ typedef uint32_t key_perm_t; struct key; struct net; #ifdef CONFIG_KEYS #undef KEY_DEBUGGING #define KEY_POS_VIEW 0x01000000 /* possessor can view a key's attributes */ #define KEY_POS_READ 0x02000000 /* possessor can read key payload / view keyring */ #define KEY_POS_WRITE 0x04000000 /* possessor can update key payload / add link to keyring */ #define KEY_POS_SEARCH 0x08000000 /* possessor can find a key in search / search a keyring */ #define KEY_POS_LINK 0x10000000 /* possessor can create a link to a key/keyring */ #define KEY_POS_SETATTR 0x20000000 /* possessor can set key attributes */ #define KEY_POS_ALL 0x3f000000 #define KEY_USR_VIEW 0x00010000 /* user permissions... */ #define KEY_USR_READ 0x00020000 #define KEY_USR_WRITE 0x00040000 #define KEY_USR_SEARCH 0x00080000 #define KEY_USR_LINK 0x00100000 #define KEY_USR_SETATTR 0x00200000 #define KEY_USR_ALL 0x003f0000 #define KEY_GRP_VIEW 0x00000100 /* group permissions... */ #define KEY_GRP_READ 0x00000200 #define KEY_GRP_WRITE 0x00000400 #define KEY_GRP_SEARCH 0x00000800 #define KEY_GRP_LINK 0x00001000 #define KEY_GRP_SETATTR 0x00002000 #define KEY_GRP_ALL 0x00003f00 #define KEY_OTH_VIEW 0x00000001 /* third party permissions... */ #define KEY_OTH_READ 0x00000002 #define KEY_OTH_WRITE 0x00000004 #define KEY_OTH_SEARCH 0x00000008 #define KEY_OTH_LINK 0x00000010 #define KEY_OTH_SETATTR 0x00000020 #define KEY_OTH_ALL 0x0000003f #define KEY_PERM_UNDEF 0xffffffff /* * The permissions required on a key that we're looking up. */ enum key_need_perm { KEY_NEED_UNSPECIFIED, /* Needed permission unspecified */ KEY_NEED_VIEW, /* Require permission to view attributes */ KEY_NEED_READ, /* Require permission to read content */ KEY_NEED_WRITE, /* Require permission to update / modify */ KEY_NEED_SEARCH, /* Require permission to search (keyring) or find (key) */ KEY_NEED_LINK, /* Require permission to link */ KEY_NEED_SETATTR, /* Require permission to change attributes */ KEY_NEED_UNLINK, /* Require permission to unlink key */ KEY_SYSADMIN_OVERRIDE, /* Special: override by CAP_SYS_ADMIN */ KEY_AUTHTOKEN_OVERRIDE, /* Special: override by possession of auth token */ KEY_DEFER_PERM_CHECK, /* Special: permission check is deferred */ }; struct seq_file; struct user_struct; struct signal_struct; struct cred; struct key_type; struct key_owner; struct key_tag; struct keyring_list; struct keyring_name; struct key_tag { struct rcu_head rcu; refcount_t usage; bool removed; /* T when subject removed */ }; struct keyring_index_key { /* [!] If this structure is altered, the union in struct key must change too! */ unsigned long hash; /* Hash value */ union { struct { #ifdef __LITTLE_ENDIAN /* Put desc_len at the LSB of x */ u16 desc_len; char desc[sizeof(long) - 2]; /* First few chars of description */ #else char desc[sizeof(long) - 2]; /* First few chars of description */ u16 desc_len; #endif }; unsigned long x; }; struct key_type *type; struct key_tag *domain_tag; /* Domain of operation */ const char *description; }; union key_payload { void __rcu *rcu_data0; void *data[4]; }; /*****************************************************************************/ /* * key reference with possession attribute handling * * NOTE! key_ref_t is a typedef'd pointer to a type that is not actually * defined. This is because we abuse the bottom bit of the reference to carry a * flag to indicate whether the calling process possesses that key in one of * its keyrings. * * the key_ref_t has been made a separate type so that the compiler can reject * attempts to dereference it without proper conversion. * * the three functions are used to assemble and disassemble references */ typedef struct __key_reference_with_attributes *key_ref_t; static inline key_ref_t make_key_ref(const struct key *key, bool possession) { return (key_ref_t) ((unsigned long) key | possession); } static inline struct key *key_ref_to_ptr(const key_ref_t key_ref) { return (struct key *) ((unsigned long) key_ref & ~1UL); } static inline bool is_key_possessed(const key_ref_t key_ref) { return (unsigned long) key_ref & 1UL; } typedef int (*key_restrict_link_func_t)(struct key *dest_keyring, const struct key_type *type, const union key_payload *payload, struct key *restriction_key); struct key_restriction { key_restrict_link_func_t check; struct key *key; struct key_type *keytype; }; enum key_state { KEY_IS_UNINSTANTIATED, KEY_IS_POSITIVE, /* Positively instantiated */ }; /*****************************************************************************/ /* * authentication token / access credential / keyring * - types of key include: * - keyrings * - disk encryption IDs * - Kerberos TGTs and tickets */ struct key { refcount_t usage; /* number of references */ key_serial_t serial; /* key serial number */ union { struct list_head graveyard_link; struct rb_node serial_node; }; #ifdef CONFIG_KEY_NOTIFICATIONS struct watch_list *watchers; /* Entities watching this key for changes */ #endif struct rw_semaphore sem; /* change vs change sem */ struct key_user *user; /* owner of this key */ void *security; /* security data for this key */ union { time64_t expiry; /* time at which key expires (or 0) */ time64_t revoked_at; /* time at which key was revoked */ }; time64_t last_used_at; /* last time used for LRU keyring discard */ kuid_t uid; kgid_t gid; key_perm_t perm; /* access permissions */ unsigned short quotalen; /* length added to quota */ unsigned short datalen; /* payload data length * - may not match RCU dereferenced payload * - payload should contain own length */ short state; /* Key state (+) or rejection error (-) */ #ifdef KEY_DEBUGGING unsigned magic; #define KEY_DEBUG_MAGIC 0x18273645u #endif unsigned long flags; /* status flags (change with bitops) */ #define KEY_FLAG_DEAD 0 /* set if key type has been deleted */ #define KEY_FLAG_REVOKED 1 /* set if key had been revoked */ #define KEY_FLAG_IN_QUOTA 2 /* set if key consumes quota */ #define KEY_FLAG_USER_CONSTRUCT 3 /* set if key is being constructed in userspace */ #define KEY_FLAG_ROOT_CAN_CLEAR 4 /* set if key can be cleared by root without permission */ #define KEY_FLAG_INVALIDATED 5 /* set if key has been invalidated */ #define KEY_FLAG_BUILTIN 6 /* set if key is built in to the kernel */ #define KEY_FLAG_ROOT_CAN_INVAL 7 /* set if key can be invalidated by root without permission */ #define KEY_FLAG_KEEP 8 /* set if key should not be removed */ #define KEY_FLAG_UID_KEYRING 9 /* set if key is a user or user session keyring */ /* the key type and key description string * - the desc is used to match a key against search criteria * - it should be a printable string * - eg: for krb5 AFS, this might be "afs@REDHAT.COM" */ union { struct keyring_index_key index_key; struct { unsigned long hash; unsigned long len_desc; struct key_type *type; /* type of key */ struct key_tag *domain_tag; /* Domain of operation */ char *description; }; }; /* key data * - this is used to hold the data actually used in cryptography or * whatever */ union { union key_payload payload; struct { /* Keyring bits */ struct list_head name_link; struct assoc_array keys; }; }; /* This is set on a keyring to restrict the addition of a link to a key * to it. If this structure isn't provided then it is assumed that the * keyring is open to any addition. It is ignored for non-keyring * keys. Only set this value using keyring_restrict(), keyring_alloc(), * or key_alloc(). * * This is intended for use with rings of trusted keys whereby addition * to the keyring needs to be controlled. KEY_ALLOC_BYPASS_RESTRICTION * overrides this, allowing the kernel to add extra keys without * restriction. */ struct key_restriction *restrict_link; }; extern struct key *key_alloc(struct key_type *type, const char *desc, kuid_t uid, kgid_t gid, const struct cred *cred, key_perm_t perm, unsigned long flags, struct key_restriction *restrict_link); #define KEY_ALLOC_IN_QUOTA 0x0000 /* add to quota, reject if would overrun */ #define KEY_ALLOC_QUOTA_OVERRUN 0x0001 /* add to quota, permit even if overrun */ #define KEY_ALLOC_NOT_IN_QUOTA 0x0002 /* not in quota */ #define KEY_ALLOC_BUILT_IN 0x0004 /* Key is built into kernel */ #define KEY_ALLOC_BYPASS_RESTRICTION 0x0008 /* Override the check on restricted keyrings */ #define KEY_ALLOC_UID_KEYRING 0x0010 /* allocating a user or user session keyring */ #define KEY_ALLOC_SET_KEEP 0x0020 /* Set the KEEP flag on the key/keyring */ extern void key_revoke(struct key *key); extern void key_invalidate(struct key *key); extern void key_put(struct key *key); extern bool key_put_tag(struct key_tag *tag); extern void key_remove_domain(struct key_tag *domain_tag); static inline struct key *__key_get(struct key *key) { refcount_inc(&key->usage); return key; } static inline struct key *key_get(struct key *key) { return key ? __key_get(key) : key; } static inline void key_ref_put(key_ref_t key_ref) { key_put(key_ref_to_ptr(key_ref)); } extern struct key *request_key_tag(struct key_type *type, const char *description, struct key_tag *domain_tag, const char *callout_info); extern struct key *request_key_rcu(struct key_type *type, const char *description, struct key_tag *domain_tag); extern struct key *request_key_with_auxdata(struct key_type *type, const char *description, struct key_tag *domain_tag, const void *callout_info, size_t callout_len, void *aux); /** * request_key - Request a key and wait for construction * @type: Type of key. * @description: The searchable description of the key. * @callout_info: The data to pass to the instantiation upcall (or NULL). * * As for request_key_tag(), but with the default global domain tag. */ static inline struct key *request_key(struct key_type *type, const char *description, const char *callout_info) { return request_key_tag(type, description, NULL, callout_info); } #ifdef CONFIG_NET /** * request_key_net - Request a key for a net namespace and wait for construction * @type: Type of key. * @description: The searchable description of the key. * @net: The network namespace that is the key's domain of operation. * @callout_info: The data to pass to the instantiation upcall (or NULL). * * As for request_key() except that it does not add the returned key to a * keyring if found, new keys are always allocated in the user's quota, the * callout_info must be a NUL-terminated string and no auxiliary data can be * passed. Only keys that operate the specified network namespace are used. * * Furthermore, it then works as wait_for_key_construction() to wait for the * completion of keys undergoing construction with a non-interruptible wait. */ #define request_key_net(type, description, net, callout_info) \ request_key_tag(type, description, net->key_domain, callout_info) /** * request_key_net_rcu - Request a key for a net namespace under RCU conditions * @type: Type of key. * @description: The searchable description of the key. * @net: The network namespace that is the key's domain of operation. * * As for request_key_rcu() except that only keys that operate the specified * network namespace are used. */ #define request_key_net_rcu(type, description, net) \ request_key_rcu(type, description, net->key_domain) #endif /* CONFIG_NET */ extern int wait_for_key_construction(struct key *key, bool intr); extern int key_validate(const struct key *key); extern key_ref_t key_create_or_update(key_ref_t keyring, const char *type, const char *description, const void *payload, size_t plen, key_perm_t perm, unsigned long flags); extern int key_update(key_ref_t key, const void *payload, size_t plen); extern int key_link(struct key *keyring, struct key *key); extern int key_move(struct key *key, struct key *from_keyring, struct key *to_keyring, unsigned int flags); extern int key_unlink(struct key *keyring, struct key *key); extern struct key *keyring_alloc(const char *description, kuid_t uid, kgid_t gid, const struct cred *cred, key_perm_t perm, unsigned long flags, struct key_restriction *restrict_link, struct key *dest); extern int restrict_link_reject(struct key *keyring, const struct key_type *type, const union key_payload *payload, struct key *restriction_key); extern int keyring_clear(struct key *keyring); extern key_ref_t keyring_search(key_ref_t keyring, struct key_type *type, const char *description, bool recurse); extern int keyring_add_key(struct key *keyring, struct key *key); extern int keyring_restrict(key_ref_t keyring, const char *type, const char *restriction); extern struct key *key_lookup(key_serial_t id); static inline key_serial_t key_serial(const struct key *key) { return key ? key->serial : 0; } extern void key_set_timeout(struct key *, unsigned); extern key_ref_t lookup_user_key(key_serial_t id, unsigned long flags, enum key_need_perm need_perm); extern void key_free_user_ns(struct user_namespace *); static inline short key_read_state(const struct key *key) { /* Barrier versus mark_key_instantiated(). */ return smp_load_acquire(&key->state); } /** * key_is_positive - Determine if a key has been positively instantiated * @key: The key to check. * * Return true if the specified key has been positively instantiated, false * otherwise. */ static inline bool key_is_positive(const struct key *key) { return key_read_state(key) == KEY_IS_POSITIVE; } static inline bool key_is_negative(const struct key *key) { return key_read_state(key) < 0; } #define dereference_key_rcu(KEY) \ (rcu_dereference((KEY)->payload.rcu_data0)) #define dereference_key_locked(KEY) \ (rcu_dereference_protected((KEY)->payload.rcu_data0, \ rwsem_is_locked(&((struct key *)(KEY))->sem))) #define rcu_assign_keypointer(KEY, PAYLOAD) \ do { \ rcu_assign_pointer((KEY)->payload.rcu_data0, (PAYLOAD)); \ } while (0) #ifdef CONFIG_SYSCTL extern struct ctl_table key_sysctls[]; #endif /* * the userspace interface */ extern int install_thread_keyring_to_cred(struct cred *cred); extern void key_fsuid_changed(struct cred *new_cred); extern void key_fsgid_changed(struct cred *new_cred); extern void key_init(void); #else /* CONFIG_KEYS */ #define key_validate(k) 0 #define key_serial(k) 0 #define key_get(k) ({ NULL; }) #define key_revoke(k) do { } while(0) #define key_invalidate(k) do { } while(0) #define key_put(k) do { } while(0) #define key_ref_put(k) do { } while(0) #define make_key_ref(k, p) NULL #define key_ref_to_ptr(k) NULL #define is_key_possessed(k) 0 #define key_fsuid_changed(c) do { } while(0) #define key_fsgid_changed(c) do { } while(0) #define key_init() do { } while(0) #define key_free_user_ns(ns) do { } while(0) #define key_remove_domain(d) do { } while(0) #endif /* CONFIG_KEYS */ #endif /* __KERNEL__ */ #endif /* _LINUX_KEY_H */ PK ! �ދm{ { fsl-diu-fb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. * * Freescale DIU Frame Buffer device driver * * Authors: Hongjun Chen <hong-jun.chen@freescale.com> * Paul Widmer <paul.widmer@freescale.com> * Srikanth Srinivasan <srikanth.srinivasan@freescale.com> * York Sun <yorksun@freescale.com> * * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix */ #ifndef __FSL_DIU_FB_H__ #define __FSL_DIU_FB_H__ #include <linux/types.h> struct mfb_chroma_key { int enable; __u8 red_max; __u8 green_max; __u8 blue_max; __u8 red_min; __u8 green_min; __u8 blue_min; }; struct aoi_display_offset { __s32 x_aoi_d; __s32 y_aoi_d; }; #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) #define MFB_SET_ALPHA _IOW('M', 0, __u8) #define MFB_GET_ALPHA _IOR('M', 0, __u8) #define MFB_SET_AOID _IOW('M', 4, struct aoi_display_offset) #define MFB_GET_AOID _IOR('M', 4, struct aoi_display_offset) #define MFB_SET_PIXFMT _IOW('M', 8, __u32) #define MFB_GET_PIXFMT _IOR('M', 8, __u32) /* * The MPC5121 BSP comes with a gamma_set utility that initializes the * gamma table. Unfortunately, it uses bad values for the IOCTL commands, * but there's nothing we can do about it now. These ioctls are only * supported on the MPC5121. */ #define MFB_SET_GAMMA _IOW('M', 1, __u8) #define MFB_GET_GAMMA _IOR('M', 1, __u8) /* * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the * wrong value for 'size' field of the ioctl. The current macros above use the * right size, but we still need to provide backwards compatibility, at least * for a while. */ #define MFB_SET_PIXFMT_OLD 0x80014d08 #define MFB_GET_PIXFMT_OLD 0x40014d08 #ifdef __KERNEL__ /* * These are the fields of area descriptor(in DDR memory) for every plane */ struct diu_ad { /* Word 0(32-bit) in DDR memory */ /* __u16 comp; */ /* __u16 pixel_s:2; */ /* __u16 palette:1; */ /* __u16 red_c:2; */ /* __u16 green_c:2; */ /* __u16 blue_c:2; */ /* __u16 alpha_c:3; */ /* __u16 byte_f:1; */ /* __u16 res0:3; */ __be32 pix_fmt; /* hard coding pixel format */ /* Word 1(32-bit) in DDR memory */ __le32 addr; /* Word 2(32-bit) in DDR memory */ /* __u32 delta_xs:11; */ /* __u32 res1:1; */ /* __u32 delta_ys:11; */ /* __u32 res2:1; */ /* __u32 g_alpha:8; */ __le32 src_size_g_alpha; /* Word 3(32-bit) in DDR memory */ /* __u32 delta_xi:11; */ /* __u32 res3:5; */ /* __u32 delta_yi:11; */ /* __u32 res4:3; */ /* __u32 flip:2; */ __le32 aoi_size; /* Word 4(32-bit) in DDR memory */ /*__u32 offset_xi:11; __u32 res5:5; __u32 offset_yi:11; __u32 res6:5; */ __le32 offset_xyi; /* Word 5(32-bit) in DDR memory */ /*__u32 offset_xd:11; __u32 res7:5; __u32 offset_yd:11; __u32 res8:5; */ __le32 offset_xyd; /* Word 6(32-bit) in DDR memory */ __u8 ckmax_r; __u8 ckmax_g; __u8 ckmax_b; __u8 res9; /* Word 7(32-bit) in DDR memory */ __u8 ckmin_r; __u8 ckmin_g; __u8 ckmin_b; __u8 res10; /* __u32 res10:8; */ /* Word 8(32-bit) in DDR memory */ __le32 next_ad; /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ __u32 paddr; } __attribute__ ((packed)); /* DIU register map */ struct diu { __be32 desc[3]; __be32 gamma; __be32 palette; __be32 cursor; __be32 curs_pos; __be32 diu_mode; __be32 bgnd; __be32 bgnd_wb; __be32 disp_size; __be32 wb_size; __be32 wb_mem_addr; __be32 hsyn_para; __be32 vsyn_para; __be32 syn_pol; __be32 thresholds; __be32 int_status; __be32 int_mask; __be32 colorbar[8]; __be32 filling; __be32 plut; } __attribute__ ((packed)); /* * Modes of operation of DIU. The DIU supports five different modes, but * the driver only supports modes 0 and 1. */ #define MFB_MODE0 0 /* DIU off */ #define MFB_MODE1 1 /* All three planes output to display */ #endif /* __KERNEL__ */ #endif /* __FSL_DIU_FB_H__ */ PK ! w%�(� � inet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Swansea University Computer Society NET3 * * This work is derived from NET2Debugged, which is in turn derived * from NET2D which was written by: * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> * * This work was derived from Ross Biro's inspirational work * for the LINUX operating system. His version numbers were: * * $Id: Space.c,v 0.8.4.5 1992/12/12 19:25:04 bir7 Exp $ * $Id: arp.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $ * $Id: arp.h,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $ * $Id: dev.c,v 0.8.4.13 1993/01/23 18:00:11 bir7 Exp $ * $Id: dev.h,v 0.8.4.7 1993/01/23 18:00:11 bir7 Exp $ * $Id: eth.c,v 0.8.4.4 1993/01/22 23:21:38 bir7 Exp $ * $Id: eth.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $ * $Id: icmp.c,v 0.8.4.9 1993/01/23 18:00:11 bir7 Exp $ * $Id: icmp.h,v 0.8.4.2 1992/11/15 14:55:30 bir7 Exp $ * $Id: ip.c,v 0.8.4.8 1992/12/12 19:25:04 bir7 Exp $ * $Id: ip.h,v 0.8.4.2 1993/01/23 18:00:11 bir7 Exp $ * $Id: loopback.c,v 0.8.4.8 1993/01/23 18:00:11 bir7 Exp $ * $Id: packet.c,v 0.8.4.7 1993/01/26 22:04:00 bir7 Exp $ * $Id: protocols.c,v 0.8.4.3 1992/11/15 14:55:30 bir7 Exp $ * $Id: raw.c,v 0.8.4.12 1993/01/26 22:04:00 bir7 Exp $ * $Id: sock.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $ * $Id: sock.h,v 0.8.4.7 1993/01/26 22:04:00 bir7 Exp $ * $Id: tcp.c,v 0.8.4.16 1993/01/26 22:04:00 bir7 Exp $ * $Id: tcp.h,v 0.8.4.7 1993/01/22 22:58:08 bir7 Exp $ * $Id: timer.c,v 0.8.4.8 1993/01/23 18:00:11 bir7 Exp $ * $Id: timer.h,v 0.8.4.2 1993/01/23 18:00:11 bir7 Exp $ * $Id: udp.c,v 0.8.4.12 1993/01/26 22:04:00 bir7 Exp $ * $Id: udp.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $ * $Id: we.c,v 0.8.4.10 1993/01/23 18:00:11 bir7 Exp $ * $Id: wereg.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $ */ #ifndef _LINUX_INET_H #define _LINUX_INET_H #include <linux/types.h> #include <net/net_namespace.h> #include <linux/socket.h> /* * These mimic similar macros defined in user-space for inet_ntop(3). * See /usr/include/netinet/in.h . */ #define INET_ADDRSTRLEN (16) #define INET6_ADDRSTRLEN (48) extern __be32 in_aton(const char *str); extern int in4_pton(const char *src, int srclen, u8 *dst, int delim, const char **end); extern int in6_pton(const char *src, int srclen, u8 *dst, int delim, const char **end); extern int inet_pton_with_scope(struct net *net, unsigned short af, const char *src, const char *port, struct sockaddr_storage *addr); extern bool inet_addr_is_any(struct sockaddr *addr); #endif /* _LINUX_INET_H */ PK ! �!��� � kvm_dirty_ring.hnu �[��� #ifndef KVM_DIRTY_RING_H #define KVM_DIRTY_RING_H #include <linux/kvm.h> /** * kvm_dirty_ring: KVM internal dirty ring structure * * @dirty_index: free running counter that points to the next slot in * dirty_ring->dirty_gfns, where a new dirty page should go * @reset_index: free running counter that points to the next dirty page * in dirty_ring->dirty_gfns for which dirty trap needs to * be reenabled * @size: size of the compact list, dirty_ring->dirty_gfns * @soft_limit: when the number of dirty pages in the list reaches this * limit, vcpu that owns this ring should exit to userspace * to allow userspace to harvest all the dirty pages * @dirty_gfns: the array to keep the dirty gfns * @index: index of this dirty ring */ struct kvm_dirty_ring { u32 dirty_index; u32 reset_index; u32 size; u32 soft_limit; struct kvm_dirty_gfn *dirty_gfns; int index; }; #if (KVM_DIRTY_LOG_PAGE_OFFSET == 0) /* * If KVM_DIRTY_LOG_PAGE_OFFSET not defined, kvm_dirty_ring.o should * not be included as well, so define these nop functions for the arch. */ static inline u32 kvm_dirty_ring_get_rsvd_entries(void) { return 0; } static inline int kvm_dirty_ring_alloc(struct kvm_dirty_ring *ring, int index, u32 size) { return 0; } static inline struct kvm_dirty_ring *kvm_dirty_ring_get(struct kvm *kvm) { return NULL; } static inline int kvm_dirty_ring_reset(struct kvm *kvm, struct kvm_dirty_ring *ring) { return 0; } static inline void kvm_dirty_ring_push(struct kvm_dirty_ring *ring, u32 slot, u64 offset) { } static inline struct page *kvm_dirty_ring_get_page(struct kvm_dirty_ring *ring, u32 offset) { return NULL; } static inline void kvm_dirty_ring_free(struct kvm_dirty_ring *ring) { } static inline bool kvm_dirty_ring_soft_full(struct kvm_dirty_ring *ring) { return true; } #else /* KVM_DIRTY_LOG_PAGE_OFFSET == 0 */ u32 kvm_dirty_ring_get_rsvd_entries(void); int kvm_dirty_ring_alloc(struct kvm_dirty_ring *ring, int index, u32 size); struct kvm_dirty_ring *kvm_dirty_ring_get(struct kvm *kvm); /* * called with kvm->slots_lock held, returns the number of * processed pages. */ int kvm_dirty_ring_reset(struct kvm *kvm, struct kvm_dirty_ring *ring); /* * returns =0: successfully pushed * <0: unable to push, need to wait */ void kvm_dirty_ring_push(struct kvm_dirty_ring *ring, u32 slot, u64 offset); /* for use in vm_operations_struct */ struct page *kvm_dirty_ring_get_page(struct kvm_dirty_ring *ring, u32 offset); void kvm_dirty_ring_free(struct kvm_dirty_ring *ring); bool kvm_dirty_ring_soft_full(struct kvm_dirty_ring *ring); #endif /* KVM_DIRTY_LOG_PAGE_OFFSET == 0 */ #endif /* KVM_DIRTY_RING_H */ PK ! ���wI I hugetlb_cgroup.hnu �[��� /* * Copyright IBM Corporation, 2012 * Author Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2.1 of the GNU Lesser General Public License * as published by the Free Software Foundation. * * This program is distributed in the hope that it would be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. * */ #ifndef _LINUX_HUGETLB_CGROUP_H #define _LINUX_HUGETLB_CGROUP_H #include <linux/mmdebug.h> struct hugetlb_cgroup; struct resv_map; struct file_region; #ifdef CONFIG_CGROUP_HUGETLB /* * Minimum page order trackable by hugetlb cgroup. * At least 4 pages are necessary for all the tracking information. * The second tail page (hpage[SUBPAGE_INDEX_CGROUP]) is the fault * usage cgroup. The third tail page (hpage[SUBPAGE_INDEX_CGROUP_RSVD]) * is the reservation usage cgroup. */ #define HUGETLB_CGROUP_MIN_ORDER order_base_2(__MAX_CGROUP_SUBPAGE_INDEX + 1) enum hugetlb_memory_event { HUGETLB_MAX, HUGETLB_NR_MEMORY_EVENTS, }; struct hugetlb_cgroup { struct cgroup_subsys_state css; /* * the counter to account for hugepages from hugetlb. */ struct page_counter hugepage[HUGE_MAX_HSTATE]; /* * the counter to account for hugepage reservations from hugetlb. */ struct page_counter rsvd_hugepage[HUGE_MAX_HSTATE]; atomic_long_t events[HUGE_MAX_HSTATE][HUGETLB_NR_MEMORY_EVENTS]; atomic_long_t events_local[HUGE_MAX_HSTATE][HUGETLB_NR_MEMORY_EVENTS]; /* Handle for "hugetlb.events" */ struct cgroup_file events_file[HUGE_MAX_HSTATE]; /* Handle for "hugetlb.events.local" */ struct cgroup_file events_local_file[HUGE_MAX_HSTATE]; }; static inline struct hugetlb_cgroup * __hugetlb_cgroup_from_page(struct page *page, bool rsvd) { VM_BUG_ON_PAGE(!PageHuge(page), page); if (compound_order(page) < HUGETLB_CGROUP_MIN_ORDER) return NULL; if (rsvd) return (void *)page_private(page + SUBPAGE_INDEX_CGROUP_RSVD); else return (void *)page_private(page + SUBPAGE_INDEX_CGROUP); } static inline struct hugetlb_cgroup *hugetlb_cgroup_from_page(struct page *page) { return __hugetlb_cgroup_from_page(page, false); } static inline struct hugetlb_cgroup * hugetlb_cgroup_from_page_rsvd(struct page *page) { return __hugetlb_cgroup_from_page(page, true); } static inline int __set_hugetlb_cgroup(struct page *page, struct hugetlb_cgroup *h_cg, bool rsvd) { VM_BUG_ON_PAGE(!PageHuge(page), page); if (compound_order(page) < HUGETLB_CGROUP_MIN_ORDER) return -1; if (rsvd) set_page_private(page + SUBPAGE_INDEX_CGROUP_RSVD, (unsigned long)h_cg); else set_page_private(page + SUBPAGE_INDEX_CGROUP, (unsigned long)h_cg); return 0; } static inline int set_hugetlb_cgroup(struct page *page, struct hugetlb_cgroup *h_cg) { return __set_hugetlb_cgroup(page, h_cg, false); } static inline int set_hugetlb_cgroup_rsvd(struct page *page, struct hugetlb_cgroup *h_cg) { return __set_hugetlb_cgroup(page, h_cg, true); } static inline bool hugetlb_cgroup_disabled(void) { return !cgroup_subsys_enabled(hugetlb_cgrp_subsys); } static inline void hugetlb_cgroup_put_rsvd_cgroup(struct hugetlb_cgroup *h_cg) { css_put(&h_cg->css); } static inline void resv_map_dup_hugetlb_cgroup_uncharge_info( struct resv_map *resv_map) { if (resv_map->css) css_get(resv_map->css); } extern int hugetlb_cgroup_charge_cgroup(int idx, unsigned long nr_pages, struct hugetlb_cgroup **ptr); extern int hugetlb_cgroup_charge_cgroup_rsvd(int idx, unsigned long nr_pages, struct hugetlb_cgroup **ptr); extern void hugetlb_cgroup_commit_charge(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg, struct page *page); extern void hugetlb_cgroup_commit_charge_rsvd(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg, struct page *page); extern void hugetlb_cgroup_uncharge_page(int idx, unsigned long nr_pages, struct page *page); extern void hugetlb_cgroup_uncharge_page_rsvd(int idx, unsigned long nr_pages, struct page *page); extern void hugetlb_cgroup_uncharge_cgroup(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg); extern void hugetlb_cgroup_uncharge_cgroup_rsvd(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg); extern void hugetlb_cgroup_uncharge_counter(struct resv_map *resv, unsigned long start, unsigned long end); extern void hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, struct file_region *rg, unsigned long nr_pages, bool region_del); extern void hugetlb_cgroup_file_init(void) __init; extern void hugetlb_cgroup_migrate(struct page *oldhpage, struct page *newhpage); #else static inline void hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, struct file_region *rg, unsigned long nr_pages, bool region_del) { } static inline struct hugetlb_cgroup *hugetlb_cgroup_from_page(struct page *page) { return NULL; } static inline struct hugetlb_cgroup * hugetlb_cgroup_from_page_resv(struct page *page) { return NULL; } static inline struct hugetlb_cgroup * hugetlb_cgroup_from_page_rsvd(struct page *page) { return NULL; } static inline int set_hugetlb_cgroup(struct page *page, struct hugetlb_cgroup *h_cg) { return 0; } static inline int set_hugetlb_cgroup_rsvd(struct page *page, struct hugetlb_cgroup *h_cg) { return 0; } static inline bool hugetlb_cgroup_disabled(void) { return true; } static inline void hugetlb_cgroup_put_rsvd_cgroup(struct hugetlb_cgroup *h_cg) { } static inline void resv_map_dup_hugetlb_cgroup_uncharge_info( struct resv_map *resv_map) { } static inline int hugetlb_cgroup_charge_cgroup(int idx, unsigned long nr_pages, struct hugetlb_cgroup **ptr) { return 0; } static inline int hugetlb_cgroup_charge_cgroup_rsvd(int idx, unsigned long nr_pages, struct hugetlb_cgroup **ptr) { return 0; } static inline void hugetlb_cgroup_commit_charge(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg, struct page *page) { } static inline void hugetlb_cgroup_commit_charge_rsvd(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg, struct page *page) { } static inline void hugetlb_cgroup_uncharge_page(int idx, unsigned long nr_pages, struct page *page) { } static inline void hugetlb_cgroup_uncharge_page_rsvd(int idx, unsigned long nr_pages, struct page *page) { } static inline void hugetlb_cgroup_uncharge_cgroup(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg) { } static inline void hugetlb_cgroup_uncharge_cgroup_rsvd(int idx, unsigned long nr_pages, struct hugetlb_cgroup *h_cg) { } static inline void hugetlb_cgroup_uncharge_counter(struct resv_map *resv, unsigned long start, unsigned long end) { } static inline void hugetlb_cgroup_file_init(void) { } static inline void hugetlb_cgroup_migrate(struct page *oldhpage, struct page *newhpage) { } #endif /* CONFIG_MEM_RES_CTLR_HUGETLB */ #endif PK ! ���VF� F� rtsx_pci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * * Author: * Wei WANG <wei_wang@realsil.com.cn> */ #ifndef __RTSX_PCI_H #define __RTSX_PCI_H #include <linux/sched.h> #include <linux/pci.h> #include <linux/rtsx_common.h> #define MAX_RW_REG_CNT 1024 #define RTSX_HCBAR 0x00 #define RTSX_HCBCTLR 0x04 #define STOP_CMD (0x01 << 28) #define READ_REG_CMD 0 #define WRITE_REG_CMD 1 #define CHECK_REG_CMD 2 #define RTSX_HDBAR 0x08 #define RTSX_SG_INT 0x04 #define RTSX_SG_END 0x02 #define RTSX_SG_VALID 0x01 #define RTSX_SG_NO_OP 0x00 #define RTSX_SG_TRANS_DATA (0x02 << 4) #define RTSX_SG_LINK_DESC (0x03 << 4) #define RTSX_HDBCTLR 0x0C #define SDMA_MODE 0x00 #define ADMA_MODE (0x02 << 26) #define STOP_DMA (0x01 << 28) #define TRIG_DMA (0x01 << 31) #define RTSX_HAIMR 0x10 #define HAIMR_TRANS_START (0x01 << 31) #define HAIMR_READ 0x00 #define HAIMR_WRITE (0x01 << 30) #define HAIMR_READ_START (HAIMR_TRANS_START | HAIMR_READ) #define HAIMR_WRITE_START (HAIMR_TRANS_START | HAIMR_WRITE) #define HAIMR_TRANS_END (HAIMR_TRANS_START) #define RTSX_BIPR 0x14 #define CMD_DONE_INT (1 << 31) #define DATA_DONE_INT (1 << 30) #define TRANS_OK_INT (1 << 29) #define TRANS_FAIL_INT (1 << 28) #define XD_INT (1 << 27) #define MS_INT (1 << 26) #define SD_INT (1 << 25) #define GPIO0_INT (1 << 24) #define OC_INT (1 << 23) #define SD_WRITE_PROTECT (1 << 19) #define XD_EXIST (1 << 18) #define MS_EXIST (1 << 17) #define SD_EXIST (1 << 16) #define DELINK_INT GPIO0_INT #define MS_OC_INT (1 << 23) #define SD_OC_INT (1 << 22) #define CARD_INT (XD_INT | MS_INT | SD_INT) #define NEED_COMPLETE_INT (DATA_DONE_INT | TRANS_OK_INT | TRANS_FAIL_INT) #define RTSX_INT (CMD_DONE_INT | NEED_COMPLETE_INT | \ CARD_INT | GPIO0_INT | OC_INT) #define CARD_EXIST (XD_EXIST | MS_EXIST | SD_EXIST) #define RTSX_BIER 0x18 #define CMD_DONE_INT_EN (1 << 31) #define DATA_DONE_INT_EN (1 << 30) #define TRANS_OK_INT_EN (1 << 29) #define TRANS_FAIL_INT_EN (1 << 28) #define XD_INT_EN (1 << 27) #define MS_INT_EN (1 << 26) #define SD_INT_EN (1 << 25) #define GPIO0_INT_EN (1 << 24) #define OC_INT_EN (1 << 23) #define DELINK_INT_EN GPIO0_INT_EN #define MS_OC_INT_EN (1 << 23) #define SD_OC_INT_EN (1 << 22) #define RTSX_DUM_REG 0x1C /* * macros for easy use */ #define rtsx_pci_writel(pcr, reg, value) \ iowrite32(value, (pcr)->remap_addr + reg) #define rtsx_pci_readl(pcr, reg) \ ioread32((pcr)->remap_addr + reg) #define rtsx_pci_writew(pcr, reg, value) \ iowrite16(value, (pcr)->remap_addr + reg) #define rtsx_pci_readw(pcr, reg) \ ioread16((pcr)->remap_addr + reg) #define rtsx_pci_writeb(pcr, reg, value) \ iowrite8(value, (pcr)->remap_addr + reg) #define rtsx_pci_readb(pcr, reg) \ ioread8((pcr)->remap_addr + reg) #define STATE_TRANS_NONE 0 #define STATE_TRANS_CMD 1 #define STATE_TRANS_BUF 2 #define STATE_TRANS_SG 3 #define TRANS_NOT_READY 0 #define TRANS_RESULT_OK 1 #define TRANS_RESULT_FAIL 2 #define TRANS_NO_DEVICE 3 #define RTSX_RESV_BUF_LEN 4096 #define HOST_CMDS_BUF_LEN 1024 #define HOST_SG_TBL_BUF_LEN (RTSX_RESV_BUF_LEN - HOST_CMDS_BUF_LEN) #define HOST_SG_TBL_ITEMS (HOST_SG_TBL_BUF_LEN / 8) #define MAX_SG_ITEM_LEN 0x80000 #define HOST_TO_DEVICE 0 #define DEVICE_TO_HOST 1 #define OUTPUT_3V3 0 #define OUTPUT_1V8 1 #define RTSX_PHASE_MAX 32 #define RX_TUNING_CNT 3 #define MS_CFG 0xFD40 #define SAMPLE_TIME_RISING 0x00 #define SAMPLE_TIME_FALLING 0x80 #define PUSH_TIME_DEFAULT 0x00 #define PUSH_TIME_ODD 0x40 #define NO_EXTEND_TOGGLE 0x00 #define EXTEND_TOGGLE_CHK 0x20 #define MS_BUS_WIDTH_1 0x00 #define MS_BUS_WIDTH_4 0x10 #define MS_BUS_WIDTH_8 0x18 #define MS_2K_SECTOR_MODE 0x04 #define MS_512_SECTOR_MODE 0x00 #define MS_TOGGLE_TIMEOUT_EN 0x00 #define MS_TOGGLE_TIMEOUT_DISEN 0x01 #define MS_NO_CHECK_INT 0x02 #define MS_TPC 0xFD41 #define MS_TRANS_CFG 0xFD42 #define WAIT_INT 0x80 #define NO_WAIT_INT 0x00 #define NO_AUTO_READ_INT_REG 0x00 #define AUTO_READ_INT_REG 0x40 #define MS_CRC16_ERR 0x20 #define MS_RDY_TIMEOUT 0x10 #define MS_INT_CMDNK 0x08 #define MS_INT_BREQ 0x04 #define MS_INT_ERR 0x02 #define MS_INT_CED 0x01 #define MS_TRANSFER 0xFD43 #define MS_TRANSFER_START 0x80 #define MS_TRANSFER_END 0x40 #define MS_TRANSFER_ERR 0x20 #define MS_BS_STATE 0x10 #define MS_TM_READ_BYTES 0x00 #define MS_TM_NORMAL_READ 0x01 #define MS_TM_WRITE_BYTES 0x04 #define MS_TM_NORMAL_WRITE 0x05 #define MS_TM_AUTO_READ 0x08 #define MS_TM_AUTO_WRITE 0x0C #define MS_INT_REG 0xFD44 #define MS_BYTE_CNT 0xFD45 #define MS_SECTOR_CNT_L 0xFD46 #define MS_SECTOR_CNT_H 0xFD47 #define MS_DBUS_H 0xFD48 #define SD_CFG1 0xFDA0 #define SD_CLK_DIVIDE_0 0x00 #define SD_CLK_DIVIDE_256 0xC0 #define SD_CLK_DIVIDE_128 0x80 #define SD_BUS_WIDTH_1BIT 0x00 #define SD_BUS_WIDTH_4BIT 0x01 #define SD_BUS_WIDTH_8BIT 0x02 #define SD_ASYNC_FIFO_NOT_RST 0x10 #define SD_20_MODE 0x00 #define SD_DDR_MODE 0x04 #define SD_30_MODE 0x08 #define SD_CLK_DIVIDE_MASK 0xC0 #define SD_MODE_SELECT_MASK 0x0C #define SD_CFG2 0xFDA1 #define SD_CALCULATE_CRC7 0x00 #define SD_NO_CALCULATE_CRC7 0x80 #define SD_CHECK_CRC16 0x00 #define SD_NO_CHECK_CRC16 0x40 #define SD_NO_CHECK_WAIT_CRC_TO 0x20 #define SD_WAIT_BUSY_END 0x08 #define SD_NO_WAIT_BUSY_END 0x00 #define SD_CHECK_CRC7 0x00 #define SD_NO_CHECK_CRC7 0x04 #define SD_RSP_LEN_0 0x00 #define SD_RSP_LEN_6 0x01 #define SD_RSP_LEN_17 0x02 #define SD_RSP_TYPE_R0 0x04 #define SD_RSP_TYPE_R1 0x01 #define SD_RSP_TYPE_R1b 0x09 #define SD_RSP_TYPE_R2 0x02 #define SD_RSP_TYPE_R3 0x05 #define SD_RSP_TYPE_R4 0x05 #define SD_RSP_TYPE_R5 0x01 #define SD_RSP_TYPE_R6 0x01 #define SD_RSP_TYPE_R7 0x01 #define SD_CFG3 0xFDA2 #define SD30_CLK_END_EN 0x10 #define SD_RSP_80CLK_TIMEOUT_EN 0x01 #define SD_STAT1 0xFDA3 #define SD_CRC7_ERR 0x80 #define SD_CRC16_ERR 0x40 #define SD_CRC_WRITE_ERR 0x20 #define SD_CRC_WRITE_ERR_MASK 0x1C #define GET_CRC_TIME_OUT 0x02 #define SD_TUNING_COMPARE_ERR 0x01 #define SD_STAT2 0xFDA4 #define SD_RSP_80CLK_TIMEOUT 0x01 #define SD_BUS_STAT 0xFDA5 #define SD_CLK_TOGGLE_EN 0x80 #define SD_CLK_FORCE_STOP 0x40 #define SD_DAT3_STATUS 0x10 #define SD_DAT2_STATUS 0x08 #define SD_DAT1_STATUS 0x04 #define SD_DAT0_STATUS 0x02 #define SD_CMD_STATUS 0x01 #define SD_PAD_CTL 0xFDA6 #define SD_IO_USING_1V8 0x80 #define SD_IO_USING_3V3 0x7F #define TYPE_A_DRIVING 0x00 #define TYPE_B_DRIVING 0x01 #define TYPE_C_DRIVING 0x02 #define TYPE_D_DRIVING 0x03 #define SD_SAMPLE_POINT_CTL 0xFDA7 #define DDR_FIX_RX_DAT 0x00 #define DDR_VAR_RX_DAT 0x80 #define DDR_FIX_RX_DAT_EDGE 0x00 #define DDR_FIX_RX_DAT_14_DELAY 0x40 #define DDR_FIX_RX_CMD 0x00 #define DDR_VAR_RX_CMD 0x20 #define DDR_FIX_RX_CMD_POS_EDGE 0x00 #define DDR_FIX_RX_CMD_14_DELAY 0x10 #define SD20_RX_POS_EDGE 0x00 #define SD20_RX_14_DELAY 0x08 #define SD20_RX_SEL_MASK 0x08 #define SD_PUSH_POINT_CTL 0xFDA8 #define DDR_FIX_TX_CMD_DAT 0x00 #define DDR_VAR_TX_CMD_DAT 0x80 #define DDR_FIX_TX_DAT_14_TSU 0x00 #define DDR_FIX_TX_DAT_12_TSU 0x40 #define DDR_FIX_TX_CMD_NEG_EDGE 0x00 #define DDR_FIX_TX_CMD_14_AHEAD 0x20 #define SD20_TX_NEG_EDGE 0x00 #define SD20_TX_14_AHEAD 0x10 #define SD20_TX_SEL_MASK 0x10 #define DDR_VAR_SDCLK_POL_SWAP 0x01 #define SD_CMD0 0xFDA9 #define SD_CMD_START 0x40 #define SD_CMD1 0xFDAA #define SD_CMD2 0xFDAB #define SD_CMD3 0xFDAC #define SD_CMD4 0xFDAD #define SD_CMD5 0xFDAE #define SD_BYTE_CNT_L 0xFDAF #define SD_BYTE_CNT_H 0xFDB0 #define SD_BLOCK_CNT_L 0xFDB1 #define SD_BLOCK_CNT_H 0xFDB2 #define SD_TRANSFER 0xFDB3 #define SD_TRANSFER_START 0x80 #define SD_TRANSFER_END 0x40 #define SD_STAT_IDLE 0x20 #define SD_TRANSFER_ERR 0x10 #define SD_TM_NORMAL_WRITE 0x00 #define SD_TM_AUTO_WRITE_3 0x01 #define SD_TM_AUTO_WRITE_4 0x02 #define SD_TM_AUTO_READ_3 0x05 #define SD_TM_AUTO_READ_4 0x06 #define SD_TM_CMD_RSP 0x08 #define SD_TM_AUTO_WRITE_1 0x09 #define SD_TM_AUTO_WRITE_2 0x0A #define SD_TM_NORMAL_READ 0x0C #define SD_TM_AUTO_READ_1 0x0D #define SD_TM_AUTO_READ_2 0x0E #define SD_TM_AUTO_TUNING 0x0F #define SD_CMD_STATE 0xFDB5 #define SD_CMD_IDLE 0x80 #define SD_DATA_STATE 0xFDB6 #define SD_DATA_IDLE 0x80 #define REG_SD_STOP_SDCLK_CFG 0xFDB8 #define SD30_CLK_STOP_CFG_EN 0x04 #define SD30_CLK_STOP_CFG1 0x02 #define SD30_CLK_STOP_CFG0 0x01 #define REG_PRE_RW_MODE 0xFD70 #define EN_INFINITE_MODE 0x01 #define REG_CRC_DUMMY_0 0xFD71 #define CFG_SD_POW_AUTO_PD (1<<0) #define SRCTL 0xFC13 #define DCM_DRP_CTL 0xFC23 #define DCM_RESET 0x08 #define DCM_LOCKED 0x04 #define DCM_208M 0x00 #define DCM_TX 0x01 #define DCM_RX 0x02 #define DCM_DRP_TRIG 0xFC24 #define DRP_START 0x80 #define DRP_DONE 0x40 #define DCM_DRP_CFG 0xFC25 #define DRP_WRITE 0x80 #define DRP_READ 0x00 #define DCM_WRITE_ADDRESS_50 0x50 #define DCM_WRITE_ADDRESS_51 0x51 #define DCM_READ_ADDRESS_00 0x00 #define DCM_READ_ADDRESS_51 0x51 #define DCM_DRP_WR_DATA_L 0xFC26 #define DCM_DRP_WR_DATA_H 0xFC27 #define DCM_DRP_RD_DATA_L 0xFC28 #define DCM_DRP_RD_DATA_H 0xFC29 #define SD_VPCLK0_CTL 0xFC2A #define SD_VPCLK1_CTL 0xFC2B #define PHASE_SELECT_MASK 0x1F #define SD_DCMPS0_CTL 0xFC2C #define SD_DCMPS1_CTL 0xFC2D #define SD_VPTX_CTL SD_VPCLK0_CTL #define SD_VPRX_CTL SD_VPCLK1_CTL #define PHASE_CHANGE 0x80 #define PHASE_NOT_RESET 0x40 #define SD_DCMPS_TX_CTL SD_DCMPS0_CTL #define SD_DCMPS_RX_CTL SD_DCMPS1_CTL #define DCMPS_CHANGE 0x80 #define DCMPS_CHANGE_DONE 0x40 #define DCMPS_ERROR 0x20 #define DCMPS_CURRENT_PHASE 0x1F #define CARD_CLK_SOURCE 0xFC2E #define CRC_FIX_CLK (0x00 << 0) #define CRC_VAR_CLK0 (0x01 << 0) #define CRC_VAR_CLK1 (0x02 << 0) #define SD30_FIX_CLK (0x00 << 2) #define SD30_VAR_CLK0 (0x01 << 2) #define SD30_VAR_CLK1 (0x02 << 2) #define SAMPLE_FIX_CLK (0x00 << 4) #define SAMPLE_VAR_CLK0 (0x01 << 4) #define SAMPLE_VAR_CLK1 (0x02 << 4) #define CARD_PWR_CTL 0xFD50 #define PMOS_STRG_MASK 0x10 #define PMOS_STRG_800mA 0x10 #define PMOS_STRG_400mA 0x00 #define SD_POWER_OFF 0x03 #define SD_PARTIAL_POWER_ON 0x01 #define SD_POWER_ON 0x00 #define SD_POWER_MASK 0x03 #define MS_POWER_OFF 0x0C #define MS_PARTIAL_POWER_ON 0x04 #define MS_POWER_ON 0x00 #define MS_POWER_MASK 0x0C #define BPP_POWER_OFF 0x0F #define BPP_POWER_5_PERCENT_ON 0x0E #define BPP_POWER_10_PERCENT_ON 0x0C #define BPP_POWER_15_PERCENT_ON 0x08 #define BPP_POWER_ON 0x00 #define BPP_POWER_MASK 0x0F #define SD_VCC_PARTIAL_POWER_ON 0x02 #define SD_VCC_POWER_ON 0x00 #define CARD_CLK_SWITCH 0xFD51 #define RTL8411B_PACKAGE_MODE 0xFD51 #define CARD_SHARE_MODE 0xFD52 #define CARD_SHARE_MASK 0x0F #define CARD_SHARE_MULTI_LUN 0x00 #define CARD_SHARE_NORMAL 0x00 #define CARD_SHARE_48_SD 0x04 #define CARD_SHARE_48_MS 0x08 #define CARD_SHARE_BAROSSA_SD 0x01 #define CARD_SHARE_BAROSSA_MS 0x02 #define CARD_DRIVE_SEL 0xFD53 #define MS_DRIVE_8mA (0x01 << 6) #define MMC_DRIVE_8mA (0x01 << 4) #define XD_DRIVE_8mA (0x01 << 2) #define GPIO_DRIVE_8mA 0x01 #define RTS5209_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | MMC_DRIVE_8mA |\ XD_DRIVE_8mA | GPIO_DRIVE_8mA) #define RTL8411_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | MMC_DRIVE_8mA |\ XD_DRIVE_8mA) #define RTSX_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | GPIO_DRIVE_8mA) #define CARD_STOP 0xFD54 #define SPI_STOP 0x01 #define XD_STOP 0x02 #define SD_STOP 0x04 #define MS_STOP 0x08 #define SPI_CLR_ERR 0x10 #define XD_CLR_ERR 0x20 #define SD_CLR_ERR 0x40 #define MS_CLR_ERR 0x80 #define CARD_OE 0xFD55 #define SD_OUTPUT_EN 0x04 #define MS_OUTPUT_EN 0x08 #define CARD_AUTO_BLINK 0xFD56 #define CARD_GPIO_DIR 0xFD57 #define CARD_GPIO 0xFD58 #define CARD_DATA_SOURCE 0xFD5B #define PINGPONG_BUFFER 0x01 #define RING_BUFFER 0x00 #define SD30_CLK_DRIVE_SEL 0xFD5A #define DRIVER_TYPE_A 0x05 #define DRIVER_TYPE_B 0x03 #define DRIVER_TYPE_C 0x02 #define DRIVER_TYPE_D 0x01 #define CARD_SELECT 0xFD5C #define SD_MOD_SEL 2 #define MS_MOD_SEL 3 #define SD30_DRIVE_SEL 0xFD5E #define CFG_DRIVER_TYPE_A 0x02 #define CFG_DRIVER_TYPE_B 0x03 #define CFG_DRIVER_TYPE_C 0x01 #define CFG_DRIVER_TYPE_D 0x00 #define SD30_CMD_DRIVE_SEL 0xFD5E #define SD30_DAT_DRIVE_SEL 0xFD5F #define CARD_CLK_EN 0xFD69 #define SD_CLK_EN 0x04 #define MS_CLK_EN 0x08 #define SD40_CLK_EN 0x10 #define SDIO_CTRL 0xFD6B #define CD_PAD_CTL 0xFD73 #define CD_DISABLE_MASK 0x07 #define MS_CD_DISABLE 0x04 #define SD_CD_DISABLE 0x02 #define XD_CD_DISABLE 0x01 #define CD_DISABLE 0x07 #define CD_ENABLE 0x00 #define MS_CD_EN_ONLY 0x03 #define SD_CD_EN_ONLY 0x05 #define XD_CD_EN_ONLY 0x06 #define FORCE_CD_LOW_MASK 0x38 #define FORCE_CD_XD_LOW 0x08 #define FORCE_CD_SD_LOW 0x10 #define FORCE_CD_MS_LOW 0x20 #define CD_AUTO_DISABLE 0x40 #define FPDCTL 0xFC00 #define SSC_POWER_DOWN 0x01 #define SD_OC_POWER_DOWN 0x02 #define ALL_POWER_DOWN 0x03 #define OC_POWER_DOWN 0x02 #define PDINFO 0xFC01 #define CLK_CTL 0xFC02 #define CHANGE_CLK 0x01 #define CLK_LOW_FREQ 0x01 #define CLK_DIV 0xFC03 #define CLK_DIV_1 0x01 #define CLK_DIV_2 0x02 #define CLK_DIV_4 0x03 #define CLK_DIV_8 0x04 #define CLK_SEL 0xFC04 #define SSC_DIV_N_0 0xFC0F #define SSC_DIV_N_1 0xFC10 #define SSC_CTL1 0xFC11 #define SSC_RSTB 0x80 #define SSC_8X_EN 0x40 #define SSC_FIX_FRAC 0x20 #define SSC_SEL_1M 0x00 #define SSC_SEL_2M 0x08 #define SSC_SEL_4M 0x10 #define SSC_SEL_8M 0x18 #define SSC_CTL2 0xFC12 #define SSC_DEPTH_MASK 0x07 #define SSC_DEPTH_DISALBE 0x00 #define SSC_DEPTH_4M 0x01 #define SSC_DEPTH_2M 0x02 #define SSC_DEPTH_1M 0x03 #define SSC_DEPTH_500K 0x04 #define SSC_DEPTH_250K 0x05 #define RCCTL 0xFC14 #define FPGA_PULL_CTL 0xFC1D #define OLT_LED_CTL 0xFC1E #define LED_SHINE_MASK 0x08 #define LED_SHINE_EN 0x08 #define LED_SHINE_DISABLE 0x00 #define GPIO_CTL 0xFC1F #define LDO_CTL 0xFC1E #define BPP_ASIC_1V7 0x00 #define BPP_ASIC_1V8 0x01 #define BPP_ASIC_1V9 0x02 #define BPP_ASIC_2V0 0x03 #define BPP_ASIC_2V7 0x04 #define BPP_ASIC_2V8 0x05 #define BPP_ASIC_3V2 0x06 #define BPP_ASIC_3V3 0x07 #define BPP_REG_TUNED18 0x07 #define BPP_TUNED18_SHIFT_8402 5 #define BPP_TUNED18_SHIFT_8411 4 #define BPP_PAD_MASK 0x04 #define BPP_PAD_3V3 0x04 #define BPP_PAD_1V8 0x00 #define BPP_LDO_POWB 0x03 #define BPP_LDO_ON 0x00 #define BPP_LDO_SUSPEND 0x02 #define BPP_LDO_OFF 0x03 #define EFUSE_CTL 0xFC30 #define EFUSE_ADD 0xFC31 #define SYS_VER 0xFC32 #define EFUSE_DATAL 0xFC34 #define EFUSE_DATAH 0xFC35 #define CARD_PULL_CTL1 0xFD60 #define CARD_PULL_CTL2 0xFD61 #define CARD_PULL_CTL3 0xFD62 #define CARD_PULL_CTL4 0xFD63 #define CARD_PULL_CTL5 0xFD64 #define CARD_PULL_CTL6 0xFD65 /* PCI Express Related Registers */ #define IRQEN0 0xFE20 #define IRQSTAT0 0xFE21 #define DMA_DONE_INT 0x80 #define SUSPEND_INT 0x40 #define LINK_RDY_INT 0x20 #define LINK_DOWN_INT 0x10 #define IRQEN1 0xFE22 #define IRQSTAT1 0xFE23 #define TLPRIEN 0xFE24 #define TLPRISTAT 0xFE25 #define TLPTIEN 0xFE26 #define TLPTISTAT 0xFE27 #define DMATC0 0xFE28 #define DMATC1 0xFE29 #define DMATC2 0xFE2A #define DMATC3 0xFE2B #define DMACTL 0xFE2C #define DMA_RST 0x80 #define DMA_BUSY 0x04 #define DMA_DIR_TO_CARD 0x00 #define DMA_DIR_FROM_CARD 0x02 #define DMA_EN 0x01 #define DMA_128 (0 << 4) #define DMA_256 (1 << 4) #define DMA_512 (2 << 4) #define DMA_1024 (3 << 4) #define DMA_PACK_SIZE_MASK 0x30 #define BCTL 0xFE2D #define RBBC0 0xFE2E #define RBBC1 0xFE2F #define RBDAT 0xFE30 #define RBCTL 0xFE34 #define U_AUTO_DMA_EN_MASK 0x20 #define U_AUTO_DMA_DISABLE 0x00 #define RB_FLUSH 0x80 #define CFGADDR0 0xFE35 #define CFGADDR1 0xFE36 #define CFGDATA0 0xFE37 #define CFGDATA1 0xFE38 #define CFGDATA2 0xFE39 #define CFGDATA3 0xFE3A #define CFGRWCTL 0xFE3B #define PHYRWCTL 0xFE3C #define PHYDATA0 0xFE3D #define PHYDATA1 0xFE3E #define PHYADDR 0xFE3F #define MSGRXDATA0 0xFE40 #define MSGRXDATA1 0xFE41 #define MSGRXDATA2 0xFE42 #define MSGRXDATA3 0xFE43 #define MSGTXDATA0 0xFE44 #define MSGTXDATA1 0xFE45 #define MSGTXDATA2 0xFE46 #define MSGTXDATA3 0xFE47 #define MSGTXCTL 0xFE48 #define LTR_CTL 0xFE4A #define LTR_TX_EN_MASK BIT(7) #define LTR_TX_EN_1 BIT(7) #define LTR_TX_EN_0 0 #define LTR_LATENCY_MODE_MASK BIT(6) #define LTR_LATENCY_MODE_HW 0 #define LTR_LATENCY_MODE_SW BIT(6) #define OBFF_CFG 0xFE4C #define OBFF_EN_MASK 0x03 #define OBFF_DISABLE 0x00 #define CDRESUMECTL 0xFE52 #define WAKE_SEL_CTL 0xFE54 #define PCLK_CTL 0xFE55 #define PCLK_MODE_SEL 0x20 #define PME_FORCE_CTL 0xFE56 #define ASPM_FORCE_CTL 0xFE57 #define FORCE_ASPM_CTL0 0x10 #define FORCE_ASPM_CTL1 0x20 #define FORCE_ASPM_VAL_MASK 0x03 #define FORCE_ASPM_L1_EN 0x02 #define FORCE_ASPM_L0_EN 0x01 #define FORCE_ASPM_NO_ASPM 0x00 #define PM_CLK_FORCE_CTL 0xFE58 #define CLK_PM_EN 0x01 #define FUNC_FORCE_CTL 0xFE59 #define FUNC_FORCE_UPME_XMT_DBG 0x02 #define PERST_GLITCH_WIDTH 0xFE5C #define CHANGE_LINK_STATE 0xFE5B #define RESET_LOAD_REG 0xFE5E #define EFUSE_CONTENT 0xFE5F #define HOST_SLEEP_STATE 0xFE60 #define HOST_ENTER_S1 1 #define HOST_ENTER_S3 2 #define SDIO_CFG 0xFE70 #define PM_EVENT_DEBUG 0xFE71 #define PME_DEBUG_0 0x08 #define NFTS_TX_CTRL 0xFE72 #define PWR_GATE_CTRL 0xFE75 #define PWR_GATE_EN 0x01 #define LDO3318_PWR_MASK 0x06 #define LDO_ON 0x00 #define LDO_SUSPEND 0x04 #define LDO_OFF 0x06 #define PWD_SUSPEND_EN 0xFE76 #define LDO_PWR_SEL 0xFE78 #define L1SUB_CONFIG1 0xFE8D #define AUX_CLK_ACTIVE_SEL_MASK 0x01 #define MAC_CKSW_DONE 0x00 #define L1SUB_CONFIG2 0xFE8E #define L1SUB_AUTO_CFG 0x02 #define L1SUB_CONFIG3 0xFE8F #define L1OFF_MBIAS2_EN_5250 BIT(7) #define DUMMY_REG_RESET_0 0xFE90 #define IC_VERSION_MASK 0x0F #define REG_VREF 0xFE97 #define PWD_SUSPND_EN 0x10 #define RTS5260_DMA_RST_CTL_0 0xFEBF #define RTS5260_DMA_RST 0x80 #define RTS5260_ADMA3_RST 0x40 #define AUTOLOAD_CFG_BASE 0xFF00 #define RELINK_TIME_MASK 0x01 #define PETXCFG 0xFF03 #define FORCE_CLKREQ_DELINK_MASK BIT(7) #define FORCE_CLKREQ_LOW 0x80 #define FORCE_CLKREQ_HIGH 0x00 #define PM_CTRL1 0xFF44 #define CD_RESUME_EN_MASK 0xF0 #define PM_CTRL2 0xFF45 #define PM_CTRL3 0xFF46 #define SDIO_SEND_PME_EN 0x80 #define FORCE_RC_MODE_ON 0x40 #define FORCE_RX50_LINK_ON 0x20 #define D3_DELINK_MODE_EN 0x10 #define USE_PESRTB_CTL_DELINK 0x08 #define DELAY_PIN_WAKE 0x04 #define RESET_PIN_WAKE 0x02 #define PM_WAKE_EN 0x01 #define PM_CTRL4 0xFF47 /* FW config info register */ #define RTS5261_FW_CFG_INFO0 0xFF50 #define RTS5261_FW_EXPRESS_TEST_MASK (0x01 << 0) #define RTS5261_FW_EA_MODE_MASK (0x01 << 5) #define RTS5261_FW_CFG0 0xFF54 #define RTS5261_FW_ENTER_EXPRESS (0x01 << 0) #define RTS5261_FW_CFG1 0xFF55 #define RTS5261_SYS_CLK_SEL_MCU_CLK (0x01 << 7) #define RTS5261_CRC_CLK_SEL_MCU_CLK (0x01 << 6) #define RTS5261_FAKE_MCU_CLOCK_GATING (0x01 << 5) #define RTS5261_MCU_BUS_SEL_MASK (0x01 << 4) #define RTS5261_MCU_CLOCK_SEL_MASK (0x03 << 2) #define RTS5261_MCU_CLOCK_SEL_16M (0x01 << 2) #define RTS5261_MCU_CLOCK_GATING (0x01 << 1) #define RTS5261_DRIVER_ENABLE_FW (0x01 << 0) #define REG_CFG_OOBS_OFF_TIMER 0xFEA6 #define REG_CFG_OOBS_ON_TIMER 0xFEA7 #define REG_CFG_VCM_ON_TIMER 0xFEA8 #define REG_CFG_OOBS_POLLING 0xFEA9 /* Memory mapping */ #define SRAM_BASE 0xE600 #define RBUF_BASE 0xF400 #define PPBUF_BASE1 0xF800 #define PPBUF_BASE2 0xFA00 #define IMAGE_FLAG_ADDR0 0xCE80 #define IMAGE_FLAG_ADDR1 0xCE81 #define RREF_CFG 0xFF6C #define RREF_VBGSEL_MASK 0x38 #define RREF_VBGSEL_1V25 0x28 #define OOBS_CONFIG 0xFF6E #define OOBS_AUTOK_DIS 0x80 #define OOBS_VAL_MASK 0x1F #define LDO_DV18_CFG 0xFF70 #define LDO_DV18_SR_MASK 0xC0 #define LDO_DV18_SR_DF 0x40 #define DV331812_MASK 0x70 #define DV331812_33 0x70 #define DV331812_17 0x30 #define LDO_CONFIG2 0xFF71 #define LDO_D3318_MASK 0x07 #define LDO_D3318_33V 0x07 #define LDO_D3318_18V 0x02 #define DV331812_VDD1 0x04 #define DV331812_POWERON 0x08 #define DV331812_POWEROFF 0x00 #define LDO_VCC_CFG0 0xFF72 #define LDO_VCC_LMTVTH_MASK 0x30 #define LDO_VCC_LMTVTH_2A 0x10 /*RTS5260*/ #define RTS5260_DVCC_TUNE_MASK 0x70 #define RTS5260_DVCC_33 0x70 /*RTS5261*/ #define RTS5261_LDO1_CFG0 0xFF72 #define RTS5261_LDO1_OCP_THD_MASK (0x07 << 5) #define RTS5261_LDO1_OCP_EN (0x01 << 4) #define RTS5261_LDO1_OCP_LMT_THD_MASK (0x03 << 2) #define RTS5261_LDO1_OCP_LMT_EN (0x01 << 1) #define LDO_VCC_CFG1 0xFF73 #define LDO_VCC_REF_TUNE_MASK 0x30 #define LDO_VCC_REF_1V2 0x20 #define LDO_VCC_TUNE_MASK 0x07 #define LDO_VCC_1V8 0x04 #define LDO_VCC_3V3 0x07 #define LDO_VCC_LMT_EN 0x08 /*RTS5260*/ #define LDO_POW_SDVDD1_MASK 0x08 #define LDO_POW_SDVDD1_ON 0x08 #define LDO_POW_SDVDD1_OFF 0x00 #define LDO_VIO_CFG 0xFF75 #define LDO_VIO_SR_MASK 0xC0 #define LDO_VIO_SR_DF 0x40 #define LDO_VIO_REF_TUNE_MASK 0x30 #define LDO_VIO_REF_1V2 0x20 #define LDO_VIO_TUNE_MASK 0x07 #define LDO_VIO_1V7 0x03 #define LDO_VIO_1V8 0x04 #define LDO_VIO_3V3 0x07 #define LDO_DV12S_CFG 0xFF76 #define LDO_REF12_TUNE_MASK 0x18 #define LDO_REF12_TUNE_DF 0x10 #define LDO_D12_TUNE_MASK 0x07 #define LDO_D12_TUNE_DF 0x04 #define LDO_AV12S_CFG 0xFF77 #define LDO_AV12S_TUNE_MASK 0x07 #define LDO_AV12S_TUNE_DF 0x04 #define SD40_LDO_CTL1 0xFE7D #define SD40_VIO_TUNE_MASK 0x70 #define SD40_VIO_TUNE_1V7 0x30 #define SD_VIO_LDO_1V8 0x40 #define SD_VIO_LDO_3V3 0x70 #define RTS5260_AUTOLOAD_CFG4 0xFF7F #define RTS5260_MIMO_DISABLE 0x8A /*RTS5261*/ #define RTS5261_AUX_CLK_16M_EN (1 << 5) #define RTS5260_REG_GPIO_CTL0 0xFC1A #define RTS5260_REG_GPIO_MASK 0x01 #define RTS5260_REG_GPIO_ON 0x01 #define RTS5260_REG_GPIO_OFF 0x00 #define PWR_GLOBAL_CTRL 0xF200 #define PCIE_L1_2_EN 0x0C #define PCIE_L1_1_EN 0x0A #define PCIE_L1_0_EN 0x09 #define PWR_FE_CTL 0xF201 #define PCIE_L1_2_PD_FE_EN 0x0C #define PCIE_L1_1_PD_FE_EN 0x0A #define PCIE_L1_0_PD_FE_EN 0x09 #define CFG_PCIE_APHY_OFF_0 0xF204 #define CFG_PCIE_APHY_OFF_0_DEFAULT 0xBF #define CFG_PCIE_APHY_OFF_1 0xF205 #define CFG_PCIE_APHY_OFF_1_DEFAULT 0xFF #define CFG_PCIE_APHY_OFF_2 0xF206 #define CFG_PCIE_APHY_OFF_2_DEFAULT 0x01 #define CFG_PCIE_APHY_OFF_3 0xF207 #define CFG_PCIE_APHY_OFF_3_DEFAULT 0x00 #define CFG_L1_0_PCIE_MAC_RET_VALUE 0xF20C #define CFG_L1_0_PCIE_DPHY_RET_VALUE 0xF20E #define CFG_L1_0_SYS_RET_VALUE 0xF210 #define CFG_L1_0_CRC_MISC_RET_VALUE 0xF212 #define CFG_L1_0_CRC_SD30_RET_VALUE 0xF214 #define CFG_L1_0_CRC_SD40_RET_VALUE 0xF216 #define CFG_LP_FPWM_VALUE 0xF219 #define CFG_LP_FPWM_VALUE_DEFAULT 0x18 #define PWC_CDR 0xF253 #define PWC_CDR_DEFAULT 0x03 #define CFG_L1_0_RET_VALUE_DEFAULT 0x1B #define CFG_L1_0_CRC_MISC_RET_VALUE_DEFAULT 0x0C /* OCPCTL */ #define SD_DETECT_EN 0x08 #define SD_OCP_INT_EN 0x04 #define SD_OCP_INT_CLR 0x02 #define SD_OC_CLR 0x01 #define SDVIO_DETECT_EN (1 << 7) #define SDVIO_OCP_INT_EN (1 << 6) #define SDVIO_OCP_INT_CLR (1 << 5) #define SDVIO_OC_CLR (1 << 4) /* OCPSTAT */ #define SD_OCP_DETECT 0x08 #define SD_OC_NOW 0x04 #define SD_OC_EVER 0x02 #define SDVIO_OC_NOW (1 << 6) #define SDVIO_OC_EVER (1 << 5) #define REG_OCPCTL 0xFD6A #define REG_OCPSTAT 0xFD6E #define REG_OCPGLITCH 0xFD6C #define REG_OCPPARA1 0xFD6B #define REG_OCPPARA2 0xFD6D /* rts5260 DV3318 OCP-related registers */ #define REG_DV3318_OCPCTL 0xFD89 #define DV3318_OCP_TIME_MASK 0xF0 #define DV3318_DETECT_EN 0x08 #define DV3318_OCP_INT_EN 0x04 #define DV3318_OCP_INT_CLR 0x02 #define DV3318_OCP_CLR 0x01 #define REG_DV3318_OCPSTAT 0xFD8A #define DV3318_OCP_GlITCH_TIME_MASK 0xF0 #define DV3318_OCP_DETECT 0x08 #define DV3318_OCP_NOW 0x04 #define DV3318_OCP_EVER 0x02 #define SD_OCP_GLITCH_MASK 0x0F /* OCPPARA1 */ #define SDVIO_OCP_TIME_60 0x00 #define SDVIO_OCP_TIME_100 0x10 #define SDVIO_OCP_TIME_200 0x20 #define SDVIO_OCP_TIME_400 0x30 #define SDVIO_OCP_TIME_600 0x40 #define SDVIO_OCP_TIME_800 0x50 #define SDVIO_OCP_TIME_1100 0x60 #define SDVIO_OCP_TIME_MASK 0x70 #define SD_OCP_TIME_60 0x00 #define SD_OCP_TIME_100 0x01 #define SD_OCP_TIME_200 0x02 #define SD_OCP_TIME_400 0x03 #define SD_OCP_TIME_600 0x04 #define SD_OCP_TIME_800 0x05 #define SD_OCP_TIME_1100 0x06 #define SD_OCP_TIME_MASK 0x07 /* OCPPARA2 */ #define SDVIO_OCP_THD_190 0x00 #define SDVIO_OCP_THD_250 0x10 #define SDVIO_OCP_THD_320 0x20 #define SDVIO_OCP_THD_380 0x30 #define SDVIO_OCP_THD_440 0x40 #define SDVIO_OCP_THD_500 0x50 #define SDVIO_OCP_THD_570 0x60 #define SDVIO_OCP_THD_630 0x70 #define SDVIO_OCP_THD_MASK 0x70 #define SD_OCP_THD_450 0x00 #define SD_OCP_THD_550 0x01 #define SD_OCP_THD_650 0x02 #define SD_OCP_THD_750 0x03 #define SD_OCP_THD_850 0x04 #define SD_OCP_THD_950 0x05 #define SD_OCP_THD_1050 0x06 #define SD_OCP_THD_1150 0x07 #define SD_OCP_THD_MASK 0x07 #define SDVIO_OCP_GLITCH_MASK 0xF0 #define SDVIO_OCP_GLITCH_NONE 0x00 #define SDVIO_OCP_GLITCH_50U 0x10 #define SDVIO_OCP_GLITCH_100U 0x20 #define SDVIO_OCP_GLITCH_200U 0x30 #define SDVIO_OCP_GLITCH_600U 0x40 #define SDVIO_OCP_GLITCH_800U 0x50 #define SDVIO_OCP_GLITCH_1M 0x60 #define SDVIO_OCP_GLITCH_2M 0x70 #define SDVIO_OCP_GLITCH_3M 0x80 #define SDVIO_OCP_GLITCH_4M 0x90 #define SDVIO_OCP_GLIVCH_5M 0xA0 #define SDVIO_OCP_GLITCH_6M 0xB0 #define SDVIO_OCP_GLITCH_7M 0xC0 #define SDVIO_OCP_GLITCH_8M 0xD0 #define SDVIO_OCP_GLITCH_9M 0xE0 #define SDVIO_OCP_GLITCH_10M 0xF0 #define SD_OCP_GLITCH_MASK 0x0F #define SD_OCP_GLITCH_NONE 0x00 #define SD_OCP_GLITCH_50U 0x01 #define SD_OCP_GLITCH_100U 0x02 #define SD_OCP_GLITCH_200U 0x03 #define SD_OCP_GLITCH_600U 0x04 #define SD_OCP_GLITCH_800U 0x05 #define SD_OCP_GLITCH_1M 0x06 #define SD_OCP_GLITCH_2M 0x07 #define SD_OCP_GLITCH_3M 0x08 #define SD_OCP_GLITCH_4M 0x09 #define SD_OCP_GLIVCH_5M 0x0A #define SD_OCP_GLITCH_6M 0x0B #define SD_OCP_GLITCH_7M 0x0C #define SD_OCP_GLITCH_8M 0x0D #define SD_OCP_GLITCH_9M 0x0E #define SD_OCP_GLITCH_10M 0x0F /* Phy register */ #define PHY_PCR 0x00 #define PHY_PCR_FORCE_CODE 0xB000 #define PHY_PCR_OOBS_CALI_50 0x0800 #define PHY_PCR_OOBS_VCM_08 0x0200 #define PHY_PCR_OOBS_SEN_90 0x0040 #define PHY_PCR_RSSI_EN 0x0002 #define PHY_PCR_RX10K 0x0001 #define PHY_RCR0 0x01 #define PHY_RCR1 0x02 #define PHY_RCR1_ADP_TIME_4 0x0400 #define PHY_RCR1_VCO_COARSE 0x001F #define PHY_RCR1_INIT_27S 0x0A1F #define PHY_SSCCR2 0x02 #define PHY_SSCCR2_PLL_NCODE 0x0A00 #define PHY_SSCCR2_TIME0 0x001C #define PHY_SSCCR2_TIME2_WIDTH 0x0003 #define PHY_RCR2 0x03 #define PHY_RCR2_EMPHASE_EN 0x8000 #define PHY_RCR2_NADJR 0x4000 #define PHY_RCR2_CDR_SR_2 0x0100 #define PHY_RCR2_FREQSEL_12 0x0040 #define PHY_RCR2_CDR_SC_12P 0x0010 #define PHY_RCR2_CALIB_LATE 0x0002 #define PHY_RCR2_INIT_27S 0xC152 #define PHY_SSCCR3 0x03 #define PHY_SSCCR3_STEP_IN 0x2740 #define PHY_SSCCR3_CHECK_DELAY 0x0008 #define _PHY_ANA03 0x03 #define _PHY_ANA03_TIMER_MAX 0x2700 #define _PHY_ANA03_OOBS_DEB_EN 0x0040 #define _PHY_CMU_DEBUG_EN 0x0008 #define PHY_RTCR 0x04 #define PHY_RDR 0x05 #define PHY_RDR_RXDSEL_1_9 0x4000 #define PHY_SSC_AUTO_PWD 0x0600 #define PHY_TCR0 0x06 #define PHY_TCR1 0x07 #define PHY_TUNE 0x08 #define PHY_TUNE_TUNEREF_1_0 0x4000 #define PHY_TUNE_VBGSEL_1252 0x0C00 #define PHY_TUNE_SDBUS_33 0x0200 #define PHY_TUNE_TUNED18 0x01C0 #define PHY_TUNE_TUNED12 0X0020 #define PHY_TUNE_TUNEA12 0x0004 #define PHY_TUNE_VOLTAGE_MASK 0xFC3F #define PHY_TUNE_VOLTAGE_3V3 0x03C0 #define PHY_TUNE_D18_1V8 0x0100 #define PHY_TUNE_D18_1V7 0x0080 #define PHY_ANA08 0x08 #define PHY_ANA08_RX_EQ_DCGAIN 0x5000 #define PHY_ANA08_SEL_RX_EN 0x0400 #define PHY_ANA08_RX_EQ_VAL 0x03C0 #define PHY_ANA08_SCP 0x0020 #define PHY_ANA08_SEL_IPI 0x0004 #define PHY_IMR 0x09 #define PHY_BPCR 0x0A #define PHY_BPCR_IBRXSEL 0x0400 #define PHY_BPCR_IBTXSEL 0x0100 #define PHY_BPCR_IB_FILTER 0x0080 #define PHY_BPCR_CMIRROR_EN 0x0040 #define PHY_BIST 0x0B #define PHY_RAW_L 0x0C #define PHY_RAW_H 0x0D #define PHY_RAW_DATA 0x0E #define PHY_HOST_CLK_CTRL 0x0F #define PHY_DMR 0x10 #define PHY_BACR 0x11 #define PHY_BACR_BASIC_MASK 0xFFF3 #define PHY_IER 0x12 #define PHY_BCSR 0x13 #define PHY_BPR 0x14 #define PHY_BPNR2 0x15 #define PHY_BPNR 0x16 #define PHY_BRNR2 0x17 #define PHY_BENR 0x18 #define PHY_REV 0x19 #define PHY_REV_RESV 0xE000 #define PHY_REV_RXIDLE_LATCHED 0x1000 #define PHY_REV_P1_EN 0x0800 #define PHY_REV_RXIDLE_EN 0x0400 #define PHY_REV_CLKREQ_TX_EN 0x0200 #define PHY_REV_CLKREQ_RX_EN 0x0100 #define PHY_REV_CLKREQ_DT_1_0 0x0040 #define PHY_REV_STOP_CLKRD 0x0020 #define PHY_REV_RX_PWST 0x0008 #define PHY_REV_STOP_CLKWR 0x0004 #define _PHY_REV0 0x19 #define _PHY_REV0_FILTER_OUT 0x3800 #define _PHY_REV0_CDR_BYPASS_PFD 0x0100 #define _PHY_REV0_CDR_RX_IDLE_BYPASS 0x0002 #define PHY_FLD0 0x1A #define PHY_ANA1A 0x1A #define PHY_ANA1A_TXR_LOOPBACK 0x2000 #define PHY_ANA1A_RXT_BIST 0x0500 #define PHY_ANA1A_TXR_BIST 0x0040 #define PHY_ANA1A_REV 0x0006 #define PHY_FLD0_INIT_27S 0x2546 #define PHY_FLD1 0x1B #define PHY_FLD2 0x1C #define PHY_FLD3 0x1D #define PHY_FLD3_TIMER_4 0x0800 #define PHY_FLD3_TIMER_6 0x0020 #define PHY_FLD3_RXDELINK 0x0004 #define PHY_FLD3_INIT_27S 0x0004 #define PHY_ANA1D 0x1D #define PHY_ANA1D_DEBUG_ADDR 0x0004 #define _PHY_FLD0 0x1D #define _PHY_FLD0_CLK_REQ_20C 0x8000 #define _PHY_FLD0_RX_IDLE_EN 0x1000 #define _PHY_FLD0_BIT_ERR_RSTN 0x0800 #define _PHY_FLD0_BER_COUNT 0x01E0 #define _PHY_FLD0_BER_TIMER 0x001E #define _PHY_FLD0_CHECK_EN 0x0001 #define PHY_FLD4 0x1E #define PHY_FLD4_FLDEN_SEL 0x4000 #define PHY_FLD4_REQ_REF 0x2000 #define PHY_FLD4_RXAMP_OFF 0x1000 #define PHY_FLD4_REQ_ADDA 0x0800 #define PHY_FLD4_BER_COUNT 0x00E0 #define PHY_FLD4_BER_TIMER 0x000A #define PHY_FLD4_BER_CHK_EN 0x0001 #define PHY_FLD4_INIT_27S 0x5C7F #define PHY_DIG1E 0x1E #define PHY_DIG1E_REV 0x4000 #define PHY_DIG1E_D0_X_D1 0x1000 #define PHY_DIG1E_RX_ON_HOST 0x0800 #define PHY_DIG1E_RCLK_REF_HOST 0x0400 #define PHY_DIG1E_RCLK_TX_EN_KEEP 0x0040 #define PHY_DIG1E_RCLK_TX_TERM_KEEP 0x0020 #define PHY_DIG1E_RCLK_RX_EIDLE_ON 0x0010 #define PHY_DIG1E_TX_TERM_KEEP 0x0008 #define PHY_DIG1E_RX_TERM_KEEP 0x0004 #define PHY_DIG1E_TX_EN_KEEP 0x0002 #define PHY_DIG1E_RX_EN_KEEP 0x0001 #define PHY_DUM_REG 0x1F #define PCR_SETTING_REG1 0x724 #define PCR_SETTING_REG2 0x814 #define PCR_SETTING_REG3 0x747 #define rtsx_pci_init_cmd(pcr) ((pcr)->ci = 0) #define RTS5227_DEVICE_ID 0x5227 #define RTS_MAX_TIMES_FREQ_REDUCTION 8 struct rtsx_pcr; struct pcr_handle { struct rtsx_pcr *pcr; }; struct pcr_ops { int (*write_phy)(struct rtsx_pcr *pcr, u8 addr, u16 val); int (*read_phy)(struct rtsx_pcr *pcr, u8 addr, u16 *val); int (*extra_init_hw)(struct rtsx_pcr *pcr); int (*optimize_phy)(struct rtsx_pcr *pcr); int (*turn_on_led)(struct rtsx_pcr *pcr); int (*turn_off_led)(struct rtsx_pcr *pcr); int (*enable_auto_blink)(struct rtsx_pcr *pcr); int (*disable_auto_blink)(struct rtsx_pcr *pcr); int (*card_power_on)(struct rtsx_pcr *pcr, int card); int (*card_power_off)(struct rtsx_pcr *pcr, int card); int (*switch_output_voltage)(struct rtsx_pcr *pcr, u8 voltage); unsigned int (*cd_deglitch)(struct rtsx_pcr *pcr); int (*conv_clk_and_div_n)(int clk, int dir); void (*fetch_vendor_settings)(struct rtsx_pcr *pcr); void (*force_power_down)(struct rtsx_pcr *pcr, u8 pm_state, bool runtime); void (*stop_cmd)(struct rtsx_pcr *pcr); void (*set_aspm)(struct rtsx_pcr *pcr, bool enable); void (*set_l1off_cfg_sub_d0)(struct rtsx_pcr *pcr, int active); void (*enable_ocp)(struct rtsx_pcr *pcr); void (*disable_ocp)(struct rtsx_pcr *pcr); void (*init_ocp)(struct rtsx_pcr *pcr); void (*process_ocp)(struct rtsx_pcr *pcr); int (*get_ocpstat)(struct rtsx_pcr *pcr, u8 *val); void (*clear_ocpstat)(struct rtsx_pcr *pcr); }; enum PDEV_STAT {PDEV_STAT_IDLE, PDEV_STAT_RUN}; enum ASPM_MODE {ASPM_MODE_CFG, ASPM_MODE_REG}; #define ASPM_L1_1_EN BIT(0) #define ASPM_L1_2_EN BIT(1) #define PM_L1_1_EN BIT(2) #define PM_L1_2_EN BIT(3) #define LTR_L1SS_PWR_GATE_EN BIT(4) #define L1_SNOOZE_TEST_EN BIT(5) #define LTR_L1SS_PWR_GATE_CHECK_CARD_EN BIT(6) /* * struct rtsx_cr_option - card reader option * @dev_flags: device flags * @force_clkreq_0: force clock request * @ltr_en: enable ltr mode flag * @ltr_enabled: ltr mode in configure space flag * @ltr_active: ltr mode status * @ltr_active_latency: ltr mode active latency * @ltr_idle_latency: ltr mode idle latency * @ltr_l1off_latency: ltr mode l1off latency * @l1_snooze_delay: l1 snooze delay * @ltr_l1off_sspwrgate: ltr l1off sspwrgate * @ltr_l1off_snooze_sspwrgate: ltr l1off snooze sspwrgate * @ocp_en: enable ocp flag * @sd_400mA_ocp_thd: 400mA ocp thd * @sd_800mA_ocp_thd: 800mA ocp thd */ struct rtsx_cr_option { u32 dev_flags; bool force_clkreq_0; bool ltr_en; bool ltr_enabled; bool ltr_active; u32 ltr_active_latency; u32 ltr_idle_latency; u32 ltr_l1off_latency; u32 l1_snooze_delay; u8 ltr_l1off_sspwrgate; u8 ltr_l1off_snooze_sspwrgate; bool ocp_en; u8 sd_400mA_ocp_thd; u8 sd_800mA_ocp_thd; }; /* * struct rtsx_hw_param - card reader hardware param * @interrupt_en: indicate which interrutp enable * @ocp_glitch: ocp glitch time */ struct rtsx_hw_param { u32 interrupt_en; u8 ocp_glitch; }; #define rtsx_set_dev_flag(cr, flag) \ ((cr)->option.dev_flags |= (flag)) #define rtsx_clear_dev_flag(cr, flag) \ ((cr)->option.dev_flags &= ~(flag)) #define rtsx_check_dev_flag(cr, flag) \ ((cr)->option.dev_flags & (flag)) struct rtsx_pcr { struct pci_dev *pci; unsigned int id; struct rtsx_cr_option option; struct rtsx_hw_param hw_param; /* pci resources */ unsigned long addr; void __iomem *remap_addr; int irq; /* host reserved buffer */ void *rtsx_resv_buf; dma_addr_t rtsx_resv_buf_addr; void *host_cmds_ptr; dma_addr_t host_cmds_addr; int ci; void *host_sg_tbl_ptr; dma_addr_t host_sg_tbl_addr; int sgi; u32 bier; char trans_result; unsigned int card_inserted; unsigned int card_removed; unsigned int card_exist; struct delayed_work carddet_work; spinlock_t lock; struct mutex pcr_mutex; struct completion *done; struct completion *finish_me; unsigned int cur_clock; bool remove_pci; bool msi_en; #define EXTRA_CAPS_SD_SDR50 (1 << 0) #define EXTRA_CAPS_SD_SDR104 (1 << 1) #define EXTRA_CAPS_SD_DDR50 (1 << 2) #define EXTRA_CAPS_MMC_HSDDR (1 << 3) #define EXTRA_CAPS_MMC_HS200 (1 << 4) #define EXTRA_CAPS_MMC_8BIT (1 << 5) #define EXTRA_CAPS_NO_MMC (1 << 7) #define EXTRA_CAPS_SD_EXPRESS (1 << 8) u32 extra_caps; #define IC_VER_A 0 #define IC_VER_B 1 #define IC_VER_C 2 #define IC_VER_D 3 u8 ic_version; u8 sd30_drive_sel_1v8; u8 sd30_drive_sel_3v3; u8 card_drive_sel; #define ASPM_L1_EN 0x02 u8 aspm_en; enum ASPM_MODE aspm_mode; bool aspm_enabled; #define PCR_MS_PMOS (1 << 0) #define PCR_REVERSE_SOCKET (1 << 1) u32 flags; u32 tx_initial_phase; u32 rx_initial_phase; const u32 *sd_pull_ctl_enable_tbl; const u32 *sd_pull_ctl_disable_tbl; const u32 *ms_pull_ctl_enable_tbl; const u32 *ms_pull_ctl_disable_tbl; const struct pcr_ops *ops; enum PDEV_STAT state; u16 reg_pm_ctrl3; int num_slots; struct rtsx_slot *slots; u8 dma_error_count; u8 ocp_stat; u8 ocp_stat2; u8 rtd3_en; }; #define PID_524A 0x524A #define PID_5249 0x5249 #define PID_5250 0x5250 #define PID_525A 0x525A #define PID_5260 0x5260 #define PID_5261 0x5261 #define PID_5228 0x5228 #define CHK_PCI_PID(pcr, pid) ((pcr)->pci->device == (pid)) #define PCI_VID(pcr) ((pcr)->pci->vendor) #define PCI_PID(pcr) ((pcr)->pci->device) #define is_version(pcr, pid, ver) \ (CHK_PCI_PID(pcr, pid) && (pcr)->ic_version == (ver)) #define is_version_higher_than(pcr, pid, ver) \ (CHK_PCI_PID(pcr, pid) && (pcr)->ic_version > (ver)) #define pcr_dbg(pcr, fmt, arg...) \ dev_dbg(&(pcr)->pci->dev, fmt, ##arg) #define SDR104_PHASE(val) ((val) & 0xFF) #define SDR50_PHASE(val) (((val) >> 8) & 0xFF) #define DDR50_PHASE(val) (((val) >> 16) & 0xFF) #define SDR104_TX_PHASE(pcr) SDR104_PHASE((pcr)->tx_initial_phase) #define SDR50_TX_PHASE(pcr) SDR50_PHASE((pcr)->tx_initial_phase) #define DDR50_TX_PHASE(pcr) DDR50_PHASE((pcr)->tx_initial_phase) #define SDR104_RX_PHASE(pcr) SDR104_PHASE((pcr)->rx_initial_phase) #define SDR50_RX_PHASE(pcr) SDR50_PHASE((pcr)->rx_initial_phase) #define DDR50_RX_PHASE(pcr) DDR50_PHASE((pcr)->rx_initial_phase) #define SET_CLOCK_PHASE(sdr104, sdr50, ddr50) \ (((ddr50) << 16) | ((sdr50) << 8) | (sdr104)) void rtsx_pci_start_run(struct rtsx_pcr *pcr); int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data); int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data); int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val); int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val); void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr); void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, u8 cmd_type, u16 reg_addr, u8 mask, u8 data); void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr); int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout); int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, int num_sg, bool read, int timeout); int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, int num_sg, bool read); void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, int num_sg, bool read); int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, int count, bool read, int timeout); int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len); int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len); int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card); int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card); int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, u8 ssc_depth, bool initial_mode, bool double_clk, bool vpclk); int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card); int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card); int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card); int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage); unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr); void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr); static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr) { return (u8 *)(pcr->host_cmds_ptr); } static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val) { rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val); } static inline int rtsx_pci_update_phy(struct rtsx_pcr *pcr, u8 addr, u16 mask, u16 append) { int err; u16 val; err = rtsx_pci_read_phy_register(pcr, addr, &val); if (err < 0) return err; return rtsx_pci_write_phy_register(pcr, addr, (val & mask) | append); } #endif PK ! �a�� � usb/tcpm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2015-2017 Google, Inc */ #ifndef __LINUX_USB_TCPM_H #define __LINUX_USB_TCPM_H #include <linux/bitops.h> #include <linux/usb/typec.h> #include "pd.h" enum typec_cc_status { TYPEC_CC_OPEN, TYPEC_CC_RA, TYPEC_CC_RD, TYPEC_CC_RP_DEF, TYPEC_CC_RP_1_5, TYPEC_CC_RP_3_0, }; /* Collision Avoidance */ #define SINK_TX_NG TYPEC_CC_RP_1_5 #define SINK_TX_OK TYPEC_CC_RP_3_0 enum typec_cc_polarity { TYPEC_POLARITY_CC1, TYPEC_POLARITY_CC2, }; /* Time to wait for TCPC to complete transmit */ #define PD_T_TCPC_TX_TIMEOUT 100 /* in ms */ #define PD_ROLE_SWAP_TIMEOUT (MSEC_PER_SEC * 10) #define PD_PPS_CTRL_TIMEOUT (MSEC_PER_SEC * 10) enum tcpm_transmit_status { TCPC_TX_SUCCESS = 0, TCPC_TX_DISCARDED = 1, TCPC_TX_FAILED = 2, }; enum tcpm_transmit_type { TCPC_TX_SOP = 0, TCPC_TX_SOP_PRIME = 1, TCPC_TX_SOP_PRIME_PRIME = 2, TCPC_TX_SOP_DEBUG_PRIME = 3, TCPC_TX_SOP_DEBUG_PRIME_PRIME = 4, TCPC_TX_HARD_RESET = 5, TCPC_TX_CABLE_RESET = 6, TCPC_TX_BIST_MODE_2 = 7 }; /* Mux state attributes */ #define TCPC_MUX_USB_ENABLED BIT(0) /* USB enabled */ #define TCPC_MUX_DP_ENABLED BIT(1) /* DP enabled */ #define TCPC_MUX_POLARITY_INVERTED BIT(2) /* Polarity inverted */ /** * struct tcpc_dev - Port configuration and callback functions * @fwnode: Pointer to port fwnode * @get_vbus: Called to read current VBUS state * @get_current_limit: * Optional; called by the tcpm core when configured as a snk * and cc=Rp-def. This allows the tcpm to provide a fallback * current-limit detection method for the cc=Rp-def case. * For example, some tcpcs may include BC1.2 charger detection * and use that in this case. * @set_cc: Called to set value of CC pins * @apply_rc: Optional; Needed to move TCPCI based chipset to APPLY_RC state * as stated by the TCPCI specification. * @get_cc: Called to read current CC pin values * @set_polarity: * Called to set polarity * @set_vconn: Called to enable or disable VCONN * @set_vbus: Called to enable or disable VBUS * @set_current_limit: * Optional; called to set current limit as negotiated * with partner. * @set_pd_rx: Called to enable or disable reception of PD messages * @set_roles: Called to set power and data roles * @start_toggling: * Optional; if supported by hardware, called to start dual-role * toggling or single-role connection detection. Toggling stops * automatically if a connection is established. * @try_role: Optional; called to set a preferred role * @pd_transmit:Called to transmit PD message * @set_bist_data: Turn on/off bist data mode for compliance testing * @enable_frs: * Optional; Called to enable/disable PD 3.0 fast role swap. * Enabling frs is accessory dependent as not all PD3.0 * accessories support fast role swap. * @frs_sourcing_vbus: * Optional; Called to notify that vbus is now being sourced. * Low level drivers can perform chip specific operations, if any. * @enable_auto_vbus_discharge: * Optional; TCPCI spec based TCPC implementations can optionally * support hardware to autonomously dischrge vbus upon disconnecting * as sink or source. TCPM signals TCPC to enable the mechanism upon * entering connected state and signals disabling upon disconnect. * @set_auto_vbus_discharge_threshold: * Mandatory when enable_auto_vbus_discharge is implemented. TCPM * calls this function to allow lower levels drivers to program the * vbus threshold voltage below which the vbus discharge circuit * will be turned on. requested_vbus_voltage is set to 0 when vbus * is going to disappear knowingly i.e. during PR_SWAP and * HARD_RESET etc. * @is_vbus_vsafe0v: * Optional; TCPCI spec based TCPC implementations are expected to * detect VSAFE0V voltage level at vbus. When detection of VSAFE0V * is supported by TCPC, set this callback for TCPM to query * whether vbus is at VSAFE0V when needed. * Returns true when vbus is at VSAFE0V, false otherwise. * @set_partner_usb_comm_capable: * Optional; The USB Communications Capable bit indicates if port * partner is capable of communication over the USB data lines * (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit. */ struct tcpc_dev { struct fwnode_handle *fwnode; int (*init)(struct tcpc_dev *dev); int (*get_vbus)(struct tcpc_dev *dev); int (*get_current_limit)(struct tcpc_dev *dev); int (*set_cc)(struct tcpc_dev *dev, enum typec_cc_status cc); int (*apply_rc)(struct tcpc_dev *dev, enum typec_cc_status cc, enum typec_cc_polarity polarity); int (*get_cc)(struct tcpc_dev *dev, enum typec_cc_status *cc1, enum typec_cc_status *cc2); int (*set_polarity)(struct tcpc_dev *dev, enum typec_cc_polarity polarity); int (*set_vconn)(struct tcpc_dev *dev, bool on); int (*set_vbus)(struct tcpc_dev *dev, bool on, bool charge); int (*set_current_limit)(struct tcpc_dev *dev, u32 max_ma, u32 mv); int (*set_pd_rx)(struct tcpc_dev *dev, bool on); int (*set_roles)(struct tcpc_dev *dev, bool attached, enum typec_role role, enum typec_data_role data); int (*start_toggling)(struct tcpc_dev *dev, enum typec_port_type port_type, enum typec_cc_status cc); int (*try_role)(struct tcpc_dev *dev, int role); int (*pd_transmit)(struct tcpc_dev *dev, enum tcpm_transmit_type type, const struct pd_message *msg, unsigned int negotiated_rev); int (*set_bist_data)(struct tcpc_dev *dev, bool on); int (*enable_frs)(struct tcpc_dev *dev, bool enable); void (*frs_sourcing_vbus)(struct tcpc_dev *dev); int (*enable_auto_vbus_discharge)(struct tcpc_dev *dev, bool enable); int (*set_auto_vbus_discharge_threshold)(struct tcpc_dev *dev, enum typec_pwr_opmode mode, bool pps_active, u32 requested_vbus_voltage, u32 pps_apdo_min_voltage); bool (*is_vbus_vsafe0v)(struct tcpc_dev *dev); void (*set_partner_usb_comm_capable)(struct tcpc_dev *dev, bool enable); }; struct tcpm_port; struct tcpm_port *tcpm_register_port(struct device *dev, struct tcpc_dev *tcpc); void tcpm_unregister_port(struct tcpm_port *port); void tcpm_vbus_change(struct tcpm_port *port); void tcpm_cc_change(struct tcpm_port *port); void tcpm_sink_frs(struct tcpm_port *port); void tcpm_sourcing_vbus(struct tcpm_port *port); void tcpm_pd_receive(struct tcpm_port *port, const struct pd_message *msg); void tcpm_pd_transmit_complete(struct tcpm_port *port, enum tcpm_transmit_status status); void tcpm_pd_hard_reset(struct tcpm_port *port); void tcpm_tcpc_reset(struct tcpm_port *port); #endif /* __LINUX_USB_TCPM_H */ PK ! 4<�� � usb/phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * USB PHY defines * * These APIs may be used between USB controllers. USB device drivers * (for either host or peripheral roles) don't use these calls; they * continue to use just usb_device and usb_gadget. */ #ifndef __LINUX_USB_PHY_H #define __LINUX_USB_PHY_H #include <linux/extcon.h> #include <linux/notifier.h> #include <linux/usb.h> #include <uapi/linux/usb/charger.h> enum usb_phy_interface { USBPHY_INTERFACE_MODE_UNKNOWN, USBPHY_INTERFACE_MODE_UTMI, USBPHY_INTERFACE_MODE_UTMIW, USBPHY_INTERFACE_MODE_ULPI, USBPHY_INTERFACE_MODE_SERIAL, USBPHY_INTERFACE_MODE_HSIC, }; enum usb_phy_events { USB_EVENT_NONE, /* no events or cable disconnected */ USB_EVENT_VBUS, /* vbus valid event */ USB_EVENT_ID, /* id was grounded */ USB_EVENT_CHARGER, /* usb dedicated charger */ USB_EVENT_ENUMERATED, /* gadget driver enumerated */ }; /* associate a type with PHY */ enum usb_phy_type { USB_PHY_TYPE_UNDEFINED, USB_PHY_TYPE_USB2, USB_PHY_TYPE_USB3, }; /* OTG defines lots of enumeration states before device reset */ enum usb_otg_state { OTG_STATE_UNDEFINED = 0, /* single-role peripheral, and dual-role default-b */ OTG_STATE_B_IDLE, OTG_STATE_B_SRP_INIT, OTG_STATE_B_PERIPHERAL, /* extra dual-role default-b states */ OTG_STATE_B_WAIT_ACON, OTG_STATE_B_HOST, /* dual-role default-a */ OTG_STATE_A_IDLE, OTG_STATE_A_WAIT_VRISE, OTG_STATE_A_WAIT_BCON, OTG_STATE_A_HOST, OTG_STATE_A_SUSPEND, OTG_STATE_A_PERIPHERAL, OTG_STATE_A_WAIT_VFALL, OTG_STATE_A_VBUS_ERR, }; struct usb_phy; struct usb_otg; /* for phys connected thru an ULPI interface, the user must * provide access ops */ struct usb_phy_io_ops { int (*read)(struct usb_phy *x, u32 reg); int (*write)(struct usb_phy *x, u32 val, u32 reg); }; struct usb_charger_current { unsigned int sdp_min; unsigned int sdp_max; unsigned int dcp_min; unsigned int dcp_max; unsigned int cdp_min; unsigned int cdp_max; unsigned int aca_min; unsigned int aca_max; }; struct usb_phy { struct device *dev; const char *label; unsigned int flags; enum usb_phy_type type; enum usb_phy_events last_event; struct usb_otg *otg; struct device *io_dev; struct usb_phy_io_ops *io_ops; void __iomem *io_priv; /* to support extcon device */ struct extcon_dev *edev; struct extcon_dev *id_edev; struct notifier_block vbus_nb; struct notifier_block id_nb; struct notifier_block type_nb; /* Support USB charger */ enum usb_charger_type chg_type; enum usb_charger_state chg_state; struct usb_charger_current chg_cur; struct work_struct chg_work; /* for notification of usb_phy_events */ struct atomic_notifier_head notifier; /* to pass extra port status to the root hub */ u16 port_status; u16 port_change; /* to support controllers that have multiple phys */ struct list_head head; /* initialize/shutdown the phy */ int (*init)(struct usb_phy *x); void (*shutdown)(struct usb_phy *x); /* enable/disable VBUS */ int (*set_vbus)(struct usb_phy *x, int on); /* effective for B devices, ignored for A-peripheral */ int (*set_power)(struct usb_phy *x, unsigned mA); /* Set phy into suspend mode */ int (*set_suspend)(struct usb_phy *x, int suspend); /* * Set wakeup enable for PHY, in that case, the PHY can be * woken up from suspend status due to external events, * like vbus change, dp/dm change and id. */ int (*set_wakeup)(struct usb_phy *x, bool enabled); /* notify phy connect status change */ int (*notify_connect)(struct usb_phy *x, enum usb_device_speed speed); int (*notify_disconnect)(struct usb_phy *x, enum usb_device_speed speed); /* * Charger detection method can be implemented if you need to * manually detect the charger type. */ enum usb_charger_type (*charger_detect)(struct usb_phy *x); }; /* for board-specific init logic */ extern int usb_add_phy(struct usb_phy *, enum usb_phy_type type); extern int usb_add_phy_dev(struct usb_phy *); extern void usb_remove_phy(struct usb_phy *); /* helpers for direct access thru low-level io interface */ static inline int usb_phy_io_read(struct usb_phy *x, u32 reg) { if (x && x->io_ops && x->io_ops->read) return x->io_ops->read(x, reg); return -EINVAL; } static inline int usb_phy_io_write(struct usb_phy *x, u32 val, u32 reg) { if (x && x->io_ops && x->io_ops->write) return x->io_ops->write(x, val, reg); return -EINVAL; } static inline int usb_phy_init(struct usb_phy *x) { if (x && x->init) return x->init(x); return 0; } static inline void usb_phy_shutdown(struct usb_phy *x) { if (x && x->shutdown) x->shutdown(x); } static inline int usb_phy_vbus_on(struct usb_phy *x) { if (!x || !x->set_vbus) return 0; return x->set_vbus(x, true); } static inline int usb_phy_vbus_off(struct usb_phy *x) { if (!x || !x->set_vbus) return 0; return x->set_vbus(x, false); } /* for usb host and peripheral controller drivers */ #if IS_ENABLED(CONFIG_USB_PHY) extern struct usb_phy *usb_get_phy(enum usb_phy_type type); extern struct usb_phy *devm_usb_get_phy(struct device *dev, enum usb_phy_type type); extern struct usb_phy *devm_usb_get_phy_by_phandle(struct device *dev, const char *phandle, u8 index); extern struct usb_phy *devm_usb_get_phy_by_node(struct device *dev, struct device_node *node, struct notifier_block *nb); extern void usb_put_phy(struct usb_phy *); extern void devm_usb_put_phy(struct device *dev, struct usb_phy *x); extern void usb_phy_set_event(struct usb_phy *x, unsigned long event); extern void usb_phy_set_charger_current(struct usb_phy *usb_phy, unsigned int mA); extern void usb_phy_get_charger_current(struct usb_phy *usb_phy, unsigned int *min, unsigned int *max); extern void usb_phy_set_charger_state(struct usb_phy *usb_phy, enum usb_charger_state state); #else static inline struct usb_phy *usb_get_phy(enum usb_phy_type type) { return ERR_PTR(-ENXIO); } static inline struct usb_phy *devm_usb_get_phy(struct device *dev, enum usb_phy_type type) { return ERR_PTR(-ENXIO); } static inline struct usb_phy *devm_usb_get_phy_by_phandle(struct device *dev, const char *phandle, u8 index) { return ERR_PTR(-ENXIO); } static inline struct usb_phy *devm_usb_get_phy_by_node(struct device *dev, struct device_node *node, struct notifier_block *nb) { return ERR_PTR(-ENXIO); } static inline void usb_put_phy(struct usb_phy *x) { } static inline void devm_usb_put_phy(struct device *dev, struct usb_phy *x) { } static inline void usb_phy_set_event(struct usb_phy *x, unsigned long event) { } static inline void usb_phy_set_charger_current(struct usb_phy *usb_phy, unsigned int mA) { } static inline void usb_phy_get_charger_current(struct usb_phy *usb_phy, unsigned int *min, unsigned int *max) { } static inline void usb_phy_set_charger_state(struct usb_phy *usb_phy, enum usb_charger_state state) { } #endif static inline int usb_phy_set_power(struct usb_phy *x, unsigned mA) { if (!x) return 0; usb_phy_set_charger_current(x, mA); if (x->set_power) return x->set_power(x, mA); return 0; } /* Context: can sleep */ static inline int usb_phy_set_suspend(struct usb_phy *x, int suspend) { if (x && x->set_suspend != NULL) return x->set_suspend(x, suspend); else return 0; } static inline int usb_phy_set_wakeup(struct usb_phy *x, bool enabled) { if (x && x->set_wakeup) return x->set_wakeup(x, enabled); else return 0; } static inline int usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed) { if (x && x->notify_connect) return x->notify_connect(x, speed); else return 0; } static inline int usb_phy_notify_disconnect(struct usb_phy *x, enum usb_device_speed speed) { if (x && x->notify_disconnect) return x->notify_disconnect(x, speed); else return 0; } /* notifiers */ static inline int usb_register_notifier(struct usb_phy *x, struct notifier_block *nb) { return atomic_notifier_chain_register(&x->notifier, nb); } static inline void usb_unregister_notifier(struct usb_phy *x, struct notifier_block *nb) { atomic_notifier_chain_unregister(&x->notifier, nb); } static inline const char *usb_phy_type_string(enum usb_phy_type type) { switch (type) { case USB_PHY_TYPE_USB2: return "USB2 PHY"; case USB_PHY_TYPE_USB3: return "USB3 PHY"; default: return "UNKNOWN PHY TYPE"; } } #endif /* __LINUX_USB_PHY_H */ PK ! �F�F F usb/sl811.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * board initialization should put one of these into dev->platform_data * and place the sl811hs onto platform_bus named "sl811-hcd". */ #ifndef __LINUX_USB_SL811_H #define __LINUX_USB_SL811_H struct sl811_platform_data { unsigned can_wakeup:1; /* given port_power, msec/2 after power on till power good */ u8 potpg; /* mA/2 power supplied on this port (max = default = 250) */ u8 power; /* sl811 relies on an external source of VBUS current */ void (*port_power)(struct device *dev, int is_on); /* pulse sl811 nRST (probably with a GPIO) */ void (*reset)(struct device *dev); /* some boards need something like these: */ /* int (*check_overcurrent)(struct device *dev); */ /* void (*clock_enable)(struct device *dev, int is_on); */ }; #endif /* __LINUX_USB_SL811_H */ PK ! �%� � � usb/tcpci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2015-2017 Google, Inc * * USB Type-C Port Controller Interface. */ #ifndef __LINUX_USB_TCPCI_H #define __LINUX_USB_TCPCI_H #include <linux/usb/typec.h> #include <linux/usb/tcpm.h> #define TCPC_VENDOR_ID 0x0 #define TCPC_PRODUCT_ID 0x2 #define TCPC_BCD_DEV 0x4 #define TCPC_TC_REV 0x6 #define TCPC_PD_REV 0x8 #define TCPC_PD_INT_REV 0xa #define TCPC_ALERT 0x10 #define TCPC_ALERT_EXTND BIT(14) #define TCPC_ALERT_EXTENDED_STATUS BIT(13) #define TCPC_ALERT_VBUS_DISCNCT BIT(11) #define TCPC_ALERT_RX_BUF_OVF BIT(10) #define TCPC_ALERT_FAULT BIT(9) #define TCPC_ALERT_V_ALARM_LO BIT(8) #define TCPC_ALERT_V_ALARM_HI BIT(7) #define TCPC_ALERT_TX_SUCCESS BIT(6) #define TCPC_ALERT_TX_DISCARDED BIT(5) #define TCPC_ALERT_TX_FAILED BIT(4) #define TCPC_ALERT_RX_HARD_RST BIT(3) #define TCPC_ALERT_RX_STATUS BIT(2) #define TCPC_ALERT_POWER_STATUS BIT(1) #define TCPC_ALERT_CC_STATUS BIT(0) #define TCPC_ALERT_MASK 0x12 #define TCPC_POWER_STATUS_MASK 0x14 #define TCPC_FAULT_STATUS_MASK 0x15 #define TCPC_EXTENDED_STATUS_MASK 0x16 #define TCPC_EXTENDED_STATUS_MASK_VSAFE0V BIT(0) #define TCPC_ALERT_EXTENDED_MASK 0x17 #define TCPC_SINK_FAST_ROLE_SWAP BIT(0) #define TCPC_CONFIG_STD_OUTPUT 0x18 #define TCPC_TCPC_CTRL 0x19 #define TCPC_TCPC_CTRL_ORIENTATION BIT(0) #define PLUG_ORNT_CC1 0 #define PLUG_ORNT_CC2 1 #define TCPC_TCPC_CTRL_BIST_TM BIT(1) #define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT BIT(6) #define TCPC_EXTENDED_STATUS 0x20 #define TCPC_EXTENDED_STATUS_VSAFE0V BIT(0) #define TCPC_ROLE_CTRL 0x1a #define TCPC_ROLE_CTRL_DRP BIT(6) #define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4 #define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3 #define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0 #define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1 #define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2 #define TCPC_ROLE_CTRL_CC2_SHIFT 2 #define TCPC_ROLE_CTRL_CC2_MASK 0x3 #define TCPC_ROLE_CTRL_CC1_SHIFT 0 #define TCPC_ROLE_CTRL_CC1_MASK 0x3 #define TCPC_ROLE_CTRL_CC_RA 0x0 #define TCPC_ROLE_CTRL_CC_RP 0x1 #define TCPC_ROLE_CTRL_CC_RD 0x2 #define TCPC_ROLE_CTRL_CC_OPEN 0x3 #define TCPC_FAULT_CTRL 0x1b #define TCPC_POWER_CTRL 0x1c #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0) #define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3) #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4) #define TCPC_DIS_VOLT_ALRM BIT(5) #define TCPC_POWER_CTRL_VBUS_VOLT_MON BIT(6) #define TCPC_FAST_ROLE_SWAP_EN BIT(7) #define TCPC_CC_STATUS 0x1d #define TCPC_CC_STATUS_TOGGLING BIT(5) #define TCPC_CC_STATUS_TERM BIT(4) #define TCPC_CC_STATUS_TERM_RP 0 #define TCPC_CC_STATUS_TERM_RD 1 #define TCPC_CC_STATE_SRC_OPEN 0 #define TCPC_CC_STATUS_CC2_SHIFT 2 #define TCPC_CC_STATUS_CC2_MASK 0x3 #define TCPC_CC_STATUS_CC1_SHIFT 0 #define TCPC_CC_STATUS_CC1_MASK 0x3 #define TCPC_POWER_STATUS 0x1e #define TCPC_POWER_STATUS_DBG_ACC_CON BIT(7) #define TCPC_POWER_STATUS_UNINIT BIT(6) #define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4) #define TCPC_POWER_STATUS_VBUS_DET BIT(3) #define TCPC_POWER_STATUS_VBUS_PRES BIT(2) #define TCPC_POWER_STATUS_VCONN_PRES BIT(1) #define TCPC_POWER_STATUS_SINKING_VBUS BIT(0) #define TCPC_FAULT_STATUS 0x1f #define TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT BIT(7) #define TCPC_ALERT_EXTENDED 0x21 #define TCPC_COMMAND 0x23 #define TCPC_CMD_WAKE_I2C 0x11 #define TCPC_CMD_DISABLE_VBUS_DETECT 0x22 #define TCPC_CMD_ENABLE_VBUS_DETECT 0x33 #define TCPC_CMD_DISABLE_SINK_VBUS 0x44 #define TCPC_CMD_SINK_VBUS 0x55 #define TCPC_CMD_DISABLE_SRC_VBUS 0x66 #define TCPC_CMD_SRC_VBUS_DEFAULT 0x77 #define TCPC_CMD_SRC_VBUS_HIGH 0x88 #define TCPC_CMD_LOOK4CONNECTION 0x99 #define TCPC_CMD_RXONEMORE 0xAA #define TCPC_CMD_I2C_IDLE 0xFF #define TCPC_DEV_CAP_1 0x24 #define TCPC_DEV_CAP_2 0x26 #define TCPC_STD_INPUT_CAP 0x28 #define TCPC_STD_OUTPUT_CAP 0x29 #define TCPC_MSG_HDR_INFO 0x2e #define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3) #define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0) #define TCPC_MSG_HDR_INFO_REV_SHIFT 1 #define TCPC_MSG_HDR_INFO_REV_MASK 0x3 #define TCPC_RX_DETECT 0x2f #define TCPC_RX_DETECT_HARD_RESET BIT(5) #define TCPC_RX_DETECT_SOP BIT(0) #define TCPC_RX_DETECT_SOP1 BIT(1) #define TCPC_RX_DETECT_SOP2 BIT(2) #define TCPC_RX_DETECT_DBG1 BIT(3) #define TCPC_RX_DETECT_DBG2 BIT(4) #define TCPC_RX_BYTE_CNT 0x30 #define TCPC_RX_BUF_FRAME_TYPE 0x31 #define TCPC_RX_BUF_FRAME_TYPE_SOP 0 #define TCPC_RX_HDR 0x32 #define TCPC_RX_DATA 0x34 /* through 0x4f */ #define TCPC_TRANSMIT 0x50 #define TCPC_TRANSMIT_RETRY_SHIFT 4 #define TCPC_TRANSMIT_RETRY_MASK 0x3 #define TCPC_TRANSMIT_TYPE_SHIFT 0 #define TCPC_TRANSMIT_TYPE_MASK 0x7 #define TCPC_TX_BYTE_CNT 0x51 #define TCPC_TX_HDR 0x52 #define TCPC_TX_DATA 0x54 /* through 0x6f */ #define TCPC_VBUS_VOLTAGE 0x70 #define TCPC_VBUS_VOLTAGE_MASK 0x3ff #define TCPC_VBUS_VOLTAGE_LSB_MV 25 #define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV 25 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX 0x3ff #define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74 #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76 #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78 /* I2C_WRITE_BYTE_COUNT + 1 when TX_BUF_BYTE_x is only accessible I2C_WRITE_BYTE_COUNT */ #define TCPC_TRANSMIT_BUFFER_MAX_LEN 31 struct tcpci; /* * @TX_BUF_BYTE_x_hidden: * optional; Set when TX_BUF_BYTE_x can only be accessed through I2C_WRITE_BYTE_COUNT. * @frs_sourcing_vbus: * Optional; Callback to perform chip specific operations when FRS * is sourcing vbus. * @auto_discharge_disconnect: * Optional; Enables TCPC to autonously discharge vbus on disconnect. * @vbus_vsafe0v: * optional; Set when TCPC can detect whether vbus is at VSAFE0V. * @set_partner_usb_comm_capable: * Optional; The USB Communications Capable bit indicates if port * partner is capable of communication over the USB data lines * (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit. */ struct tcpci_data { struct regmap *regmap; unsigned char TX_BUF_BYTE_x_hidden:1; unsigned char auto_discharge_disconnect:1; unsigned char vbus_vsafe0v:1; int (*init)(struct tcpci *tcpci, struct tcpci_data *data); int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data, bool enable); int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data, enum typec_cc_status cc); int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool source, bool sink); void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data); void (*set_partner_usb_comm_capable)(struct tcpci *tcpci, struct tcpci_data *data, bool capable); }; struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data); void tcpci_unregister_port(struct tcpci *tcpci); irqreturn_t tcpci_irq(struct tcpci *tcpci); struct tcpm_port; struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci); #endif /* __LINUX_USB_TCPCI_H */ PK ! �= ?� � usb/isp1301.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * NXP ISP1301 USB transceiver driver * * Copyright (C) 2012 Roland Stigge <stigge@antcom.de> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #ifndef __LINUX_USB_ISP1301_H #define __LINUX_USB_ISP1301_H #include <linux/of.h> /* I2C Register definitions: */ #define ISP1301_I2C_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ #define MC1_SPEED_REG (1 << 0) #define MC1_SUSPEND_REG (1 << 1) #define MC1_DAT_SE0 (1 << 2) #define MC1_TRANSPARENT (1 << 3) #define MC1_BDIS_ACON_EN (1 << 4) #define MC1_OE_INT_EN (1 << 5) #define MC1_UART_EN (1 << 6) #define MC1_MASK 0x7f #define ISP1301_I2C_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */ #define MC2_GLOBAL_PWR_DN (1 << 0) #define MC2_SPD_SUSP_CTRL (1 << 1) #define MC2_BI_DI (1 << 2) #define MC2_TRANSP_BDIR0 (1 << 3) #define MC2_TRANSP_BDIR1 (1 << 4) #define MC2_AUDIO_EN (1 << 5) #define MC2_PSW_EN (1 << 6) #define MC2_EN2V7 (1 << 7) #define ISP1301_I2C_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */ #define OTG1_DP_PULLUP (1 << 0) #define OTG1_DM_PULLUP (1 << 1) #define OTG1_DP_PULLDOWN (1 << 2) #define OTG1_DM_PULLDOWN (1 << 3) #define OTG1_ID_PULLDOWN (1 << 4) #define OTG1_VBUS_DRV (1 << 5) #define OTG1_VBUS_DISCHRG (1 << 6) #define OTG1_VBUS_CHRG (1 << 7) #define ISP1301_I2C_OTG_CONTROL_2 0x10 /* u8 readonly */ #define OTG_B_SESS_END (1 << 6) #define OTG_B_SESS_VLD (1 << 7) #define ISP1301_I2C_INTERRUPT_SOURCE 0x8 #define ISP1301_I2C_INTERRUPT_LATCH 0xA #define ISP1301_I2C_INTERRUPT_FALLING 0xC #define ISP1301_I2C_INTERRUPT_RISING 0xE #define INT_VBUS_VLD (1 << 0) #define INT_SESS_VLD (1 << 1) #define INT_DP_HI (1 << 2) #define INT_ID_GND (1 << 3) #define INT_DM_HI (1 << 4) #define INT_ID_FLOAT (1 << 5) #define INT_BDIS_ACON (1 << 6) #define INT_CR_INT (1 << 7) #define ISP1301_I2C_REG_CLEAR_ADDR 1 /* Register Address Modifier */ struct i2c_client *isp1301_get_client(struct device_node *node); #endif /* __LINUX_USB_ISP1301_H */ PK ! �I�^ ^ usb/iowarrior.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_USB_IOWARRIOR_H #define __LINUX_USB_IOWARRIOR_H #define CODEMERCS_MAGIC_NUMBER 0xC0 /* like COde Mercenaries */ /* Define the ioctl commands for reading and writing data */ #define IOW_WRITE _IOW(CODEMERCS_MAGIC_NUMBER, 1, __u8 *) #define IOW_READ _IOW(CODEMERCS_MAGIC_NUMBER, 2, __u8 *) /* A struct for available device info which is read with the ioctl IOW_GETINFO. To be compatible with 2.4 userspace which didn't have an easy way to get this information. */ struct iowarrior_info { /* vendor id : supposed to be USB_VENDOR_ID_CODEMERCS in all cases */ __u32 vendor; /* product id : depends on type of chip (USB_DEVICE_ID_CODEMERCS_X) */ __u32 product; /* the serial number of our chip (if a serial-number is not available * this is empty string) */ __u8 serial[9]; /* revision number of the chip */ __u32 revision; /* USB-speed of the device (0=UNKNOWN, 1=LOW, 2=FULL 3=HIGH) */ __u32 speed; /* power consumption of the device in mA */ __u32 power; /* the number of the endpoint */ __u32 if_num; /* size of the data-packets on this interface */ __u32 report_size; }; /* Get some device-information (product-id , serial-number etc.) in order to identify a chip. */ #define IOW_GETINFO _IOR(CODEMERCS_MAGIC_NUMBER, 3, struct iowarrior_info) #endif /* __LINUX_USB_IOWARRIOR_H */ PK ! �l�0� � usb/g_hid.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * g_hid.h -- Header file for USB HID gadget driver * * Copyright (C) 2010 Fabien Chouteau <fabien.chouteau@barco.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __LINUX_USB_G_HID_H #define __LINUX_USB_G_HID_H struct hidg_func_descriptor { unsigned char subclass; unsigned char protocol; unsigned short report_length; unsigned short report_desc_length; unsigned char report_desc[]; }; #endif /* __LINUX_USB_G_HID_H */ PK ! �� �7 �7 usb/audio-v3.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2017 Ruslan Bilovol <ruslan.bilovol@gmail.com> * * This file holds USB constants and structures defined * by the USB DEVICE CLASS DEFINITION FOR AUDIO DEVICES Release 3.0. */ #ifndef __LINUX_USB_AUDIO_V3_H #define __LINUX_USB_AUDIO_V3_H #include <linux/types.h> /* * v1.0, v2.0 and v3.0 of this standard have many things in common. For the rest * of the definitions, please refer to audio.h and audio-v2.h */ /* All High Capability descriptors have these 2 fields at the beginning */ struct uac3_hc_descriptor_header { __le16 wLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __le16 wDescriptorID; } __attribute__ ((packed)); /* 4.3.1 CLUSTER DESCRIPTOR HEADER */ struct uac3_cluster_header_descriptor { __le16 wLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __le16 wDescriptorID; __u8 bNrChannels; } __attribute__ ((packed)); /* 4.3.2.1 SEGMENTS */ struct uac3_cluster_segment_descriptor { __le16 wLength; __u8 bSegmentType; /* __u8[0]; segment-specific data */ } __attribute__ ((packed)); /* 4.3.2.1.1 END SEGMENT */ struct uac3_cluster_end_segment_descriptor { __le16 wLength; __u8 bSegmentType; /* Constant END_SEGMENT */ } __attribute__ ((packed)); /* 4.3.2.1.3.1 INFORMATION SEGMENT */ struct uac3_cluster_information_segment_descriptor { __le16 wLength; __u8 bSegmentType; __u8 bChPurpose; __u8 bChRelationship; __u8 bChGroupID; } __attribute__ ((packed)); /* 4.5.2 CLASS-SPECIFIC AC INTERFACE DESCRIPTOR */ struct uac3_ac_header_descriptor { __u8 bLength; /* 10 */ __u8 bDescriptorType; /* CS_INTERFACE descriptor type */ __u8 bDescriptorSubtype; /* HEADER descriptor subtype */ __u8 bCategory; /* includes Clock Source, Unit, Terminal, and Power Domain desc. */ __le16 wTotalLength; __le32 bmControls; } __attribute__ ((packed)); /* 4.5.2.1 INPUT TERMINAL DESCRIPTOR */ struct uac3_input_terminal_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bTerminalID; __le16 wTerminalType; __u8 bAssocTerminal; __u8 bCSourceID; __le32 bmControls; __le16 wClusterDescrID; __le16 wExTerminalDescrID; __le16 wConnectorsDescrID; __le16 wTerminalDescrStr; } __attribute__((packed)); /* 4.5.2.2 OUTPUT TERMINAL DESCRIPTOR */ struct uac3_output_terminal_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bTerminalID; __le16 wTerminalType; __u8 bAssocTerminal; __u8 bSourceID; __u8 bCSourceID; __le32 bmControls; __le16 wExTerminalDescrID; __le16 wConnectorsDescrID; __le16 wTerminalDescrStr; } __attribute__((packed)); /* 4.5.2.7 FEATURE UNIT DESCRIPTOR */ struct uac3_feature_unit_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bUnitID; __u8 bSourceID; /* bmaControls is actually u32, * but u8 is needed for the hybrid parser */ __u8 bmaControls[]; /* variable length */ /* wFeatureDescrStr omitted */ } __attribute__((packed)); #define UAC3_DT_FEATURE_UNIT_SIZE(ch) (7 + ((ch) + 1) * 4) /* As above, but more useful for defining your own descriptors */ #define DECLARE_UAC3_FEATURE_UNIT_DESCRIPTOR(ch) \ struct uac3_feature_unit_descriptor_##ch { \ __u8 bLength; \ __u8 bDescriptorType; \ __u8 bDescriptorSubtype; \ __u8 bUnitID; \ __u8 bSourceID; \ __le32 bmaControls[ch + 1]; \ __le16 wFeatureDescrStr; \ } __attribute__ ((packed)) /* 4.5.2.12 CLOCK SOURCE DESCRIPTOR */ struct uac3_clock_source_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bClockID; __u8 bmAttributes; __le32 bmControls; __u8 bReferenceTerminal; __le16 wClockSourceStr; } __attribute__((packed)); /* bmAttribute fields */ #define UAC3_CLOCK_SOURCE_TYPE_EXT 0x0 #define UAC3_CLOCK_SOURCE_TYPE_INT 0x1 #define UAC3_CLOCK_SOURCE_ASYNC (0 << 2) #define UAC3_CLOCK_SOURCE_SYNCED_TO_SOF (1 << 1) /* 4.5.2.13 CLOCK SELECTOR DESCRIPTOR */ struct uac3_clock_selector_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bClockID; __u8 bNrInPins; __u8 baCSourceID[]; /* bmControls and wCSelectorDescrStr omitted */ } __attribute__((packed)); /* 4.5.2.14 CLOCK MULTIPLIER DESCRIPTOR */ struct uac3_clock_multiplier_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bClockID; __u8 bCSourceID; __le32 bmControls; __le16 wCMultiplierDescrStr; } __attribute__((packed)); /* 4.5.2.15 POWER DOMAIN DESCRIPTOR */ struct uac3_power_domain_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bPowerDomainID; __le16 waRecoveryTime1; __le16 waRecoveryTime2; __u8 bNrEntities; __u8 baEntityID[]; /* wPDomainDescrStr omitted */ } __attribute__((packed)); /* As above, but more useful for defining your own descriptors */ #define DECLARE_UAC3_POWER_DOMAIN_DESCRIPTOR(n) \ struct uac3_power_domain_descriptor_##n { \ __u8 bLength; \ __u8 bDescriptorType; \ __u8 bDescriptorSubtype; \ __u8 bPowerDomainID; \ __le16 waRecoveryTime1; \ __le16 waRecoveryTime2; \ __u8 bNrEntities; \ __u8 baEntityID[n]; \ __le16 wPDomainDescrStr; \ } __attribute__ ((packed)) /* 4.7.2 CLASS-SPECIFIC AS INTERFACE DESCRIPTOR */ struct uac3_as_header_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bTerminalLink; __le32 bmControls; __le16 wClusterDescrID; __le64 bmFormats; __u8 bSubslotSize; __u8 bBitResolution; __le16 bmAuxProtocols; __u8 bControlSize; } __attribute__((packed)); #define UAC3_FORMAT_TYPE_I_RAW_DATA (1 << 6) /* 4.8.1.2 CLASS-SPECIFIC AS ISOCHRONOUS AUDIO DATA ENDPOINT DESCRIPTOR */ struct uac3_iso_endpoint_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __le32 bmControls; __u8 bLockDelayUnits; __le16 wLockDelay; } __attribute__((packed)); /* 5.2.1.6.1 INSERTION CONTROL PARAMETER BLOCK */ struct uac3_insertion_ctl_blk { __u8 bSize; __u8 bmConInserted; } __attribute__ ((packed)); /* 6.1 INTERRUPT DATA MESSAGE */ struct uac3_interrupt_data_msg { __u8 bInfo; __u8 bSourceType; __le16 wValue; __le16 wIndex; } __attribute__((packed)); /* A.2 AUDIO AUDIO FUNCTION SUBCLASS CODES */ #define UAC3_FUNCTION_SUBCLASS_UNDEFINED 0x00 #define UAC3_FUNCTION_SUBCLASS_FULL_ADC_3_0 0x01 /* BADD profiles */ #define UAC3_FUNCTION_SUBCLASS_GENERIC_IO 0x20 #define UAC3_FUNCTION_SUBCLASS_HEADPHONE 0x21 #define UAC3_FUNCTION_SUBCLASS_SPEAKER 0x22 #define UAC3_FUNCTION_SUBCLASS_MICROPHONE 0x23 #define UAC3_FUNCTION_SUBCLASS_HEADSET 0x24 #define UAC3_FUNCTION_SUBCLASS_HEADSET_ADAPTER 0x25 #define UAC3_FUNCTION_SUBCLASS_SPEAKERPHONE 0x26 /* A.7 AUDIO FUNCTION CATEGORY CODES */ #define UAC3_FUNCTION_SUBCLASS_UNDEFINED 0x00 #define UAC3_FUNCTION_DESKTOP_SPEAKER 0x01 #define UAC3_FUNCTION_HOME_THEATER 0x02 #define UAC3_FUNCTION_MICROPHONE 0x03 #define UAC3_FUNCTION_HEADSET 0x04 #define UAC3_FUNCTION_TELEPHONE 0x05 #define UAC3_FUNCTION_CONVERTER 0x06 #define UAC3_FUNCTION_SOUND_RECORDER 0x07 #define UAC3_FUNCTION_IO_BOX 0x08 #define UAC3_FUNCTION_MUSICAL_INSTRUMENT 0x09 #define UAC3_FUNCTION_PRO_AUDIO 0x0a #define UAC3_FUNCTION_AUDIO_VIDEO 0x0b #define UAC3_FUNCTION_CONTROL_PANEL 0x0c #define UAC3_FUNCTION_HEADPHONE 0x0d #define UAC3_FUNCTION_GENERIC_SPEAKER 0x0e #define UAC3_FUNCTION_HEADSET_ADAPTER 0x0f #define UAC3_FUNCTION_SPEAKERPHONE 0x10 #define UAC3_FUNCTION_OTHER 0xff /* A.8 AUDIO CLASS-SPECIFIC DESCRIPTOR TYPES */ #define UAC3_CS_UNDEFINED 0x20 #define UAC3_CS_DEVICE 0x21 #define UAC3_CS_CONFIGURATION 0x22 #define UAC3_CS_STRING 0x23 #define UAC3_CS_INTERFACE 0x24 #define UAC3_CS_ENDPOINT 0x25 #define UAC3_CS_CLUSTER 0x26 /* A.10 CLUSTER DESCRIPTOR SEGMENT TYPES */ #define UAC3_SEGMENT_UNDEFINED 0x00 #define UAC3_CLUSTER_DESCRIPTION 0x01 #define UAC3_CLUSTER_VENDOR_DEFINED 0x1F #define UAC3_CHANNEL_INFORMATION 0x20 #define UAC3_CHANNEL_AMBISONIC 0x21 #define UAC3_CHANNEL_DESCRIPTION 0x22 #define UAC3_CHANNEL_VENDOR_DEFINED 0xFE #define UAC3_END_SEGMENT 0xFF /* A.11 CHANNEL PURPOSE DEFINITIONS */ #define UAC3_PURPOSE_UNDEFINED 0x00 #define UAC3_PURPOSE_GENERIC_AUDIO 0x01 #define UAC3_PURPOSE_VOICE 0x02 #define UAC3_PURPOSE_SPEECH 0x03 #define UAC3_PURPOSE_AMBIENT 0x04 #define UAC3_PURPOSE_REFERENCE 0x05 #define UAC3_PURPOSE_ULTRASONIC 0x06 #define UAC3_PURPOSE_VIBROKINETIC 0x07 #define UAC3_PURPOSE_NON_AUDIO 0xFF /* A.12 CHANNEL RELATIONSHIP DEFINITIONS */ #define UAC3_CH_RELATIONSHIP_UNDEFINED 0x00 #define UAC3_CH_MONO 0x01 #define UAC3_CH_LEFT 0x02 #define UAC3_CH_RIGHT 0x03 #define UAC3_CH_ARRAY 0x04 #define UAC3_CH_PATTERN_X 0x20 #define UAC3_CH_PATTERN_Y 0x21 #define UAC3_CH_PATTERN_A 0x22 #define UAC3_CH_PATTERN_B 0x23 #define UAC3_CH_PATTERN_M 0x24 #define UAC3_CH_PATTERN_S 0x25 #define UAC3_CH_FRONT_LEFT 0x80 #define UAC3_CH_FRONT_RIGHT 0x81 #define UAC3_CH_FRONT_CENTER 0x82 #define UAC3_CH_FRONT_LEFT_OF_CENTER 0x83 #define UAC3_CH_FRONT_RIGHT_OF_CENTER 0x84 #define UAC3_CH_FRONT_WIDE_LEFT 0x85 #define UAC3_CH_FRONT_WIDE_RIGHT 0x86 #define UAC3_CH_SIDE_LEFT 0x87 #define UAC3_CH_SIDE_RIGHT 0x88 #define UAC3_CH_SURROUND_ARRAY_LEFT 0x89 #define UAC3_CH_SURROUND_ARRAY_RIGHT 0x8A #define UAC3_CH_BACK_LEFT 0x8B #define UAC3_CH_BACK_RIGHT 0x8C #define UAC3_CH_BACK_CENTER 0x8D #define UAC3_CH_BACK_LEFT_OF_CENTER 0x8E #define UAC3_CH_BACK_RIGHT_OF_CENTER 0x8F #define UAC3_CH_BACK_WIDE_LEFT 0x90 #define UAC3_CH_BACK_WIDE_RIGHT 0x91 #define UAC3_CH_TOP_CENTER 0x92 #define UAC3_CH_TOP_FRONT_LEFT 0x93 #define UAC3_CH_TOP_FRONT_RIGHT 0x94 #define UAC3_CH_TOP_FRONT_CENTER 0x95 #define UAC3_CH_TOP_FRONT_LOC 0x96 #define UAC3_CH_TOP_FRONT_ROC 0x97 #define UAC3_CH_TOP_FRONT_WIDE_LEFT 0x98 #define UAC3_CH_TOP_FRONT_WIDE_RIGHT 0x99 #define UAC3_CH_TOP_SIDE_LEFT 0x9A #define UAC3_CH_TOP_SIDE_RIGHT 0x9B #define UAC3_CH_TOP_SURR_ARRAY_LEFT 0x9C #define UAC3_CH_TOP_SURR_ARRAY_RIGHT 0x9D #define UAC3_CH_TOP_BACK_LEFT 0x9E #define UAC3_CH_TOP_BACK_RIGHT 0x9F #define UAC3_CH_TOP_BACK_CENTER 0xA0 #define UAC3_CH_TOP_BACK_LOC 0xA1 #define UAC3_CH_TOP_BACK_ROC 0xA2 #define UAC3_CH_TOP_BACK_WIDE_LEFT 0xA3 #define UAC3_CH_TOP_BACK_WIDE_RIGHT 0xA4 #define UAC3_CH_BOTTOM_CENTER 0xA5 #define UAC3_CH_BOTTOM_FRONT_LEFT 0xA6 #define UAC3_CH_BOTTOM_FRONT_RIGHT 0xA7 #define UAC3_CH_BOTTOM_FRONT_CENTER 0xA8 #define UAC3_CH_BOTTOM_FRONT_LOC 0xA9 #define UAC3_CH_BOTTOM_FRONT_ROC 0xAA #define UAC3_CH_BOTTOM_FRONT_WIDE_LEFT 0xAB #define UAC3_CH_BOTTOM_FRONT_WIDE_RIGHT 0xAC #define UAC3_CH_BOTTOM_SIDE_LEFT 0xAD #define UAC3_CH_BOTTOM_SIDE_RIGHT 0xAE #define UAC3_CH_BOTTOM_SURR_ARRAY_LEFT 0xAF #define UAC3_CH_BOTTOM_SURR_ARRAY_RIGHT 0xB0 #define UAC3_CH_BOTTOM_BACK_LEFT 0xB1 #define UAC3_CH_BOTTOM_BACK_RIGHT 0xB2 #define UAC3_CH_BOTTOM_BACK_CENTER 0xB3 #define UAC3_CH_BOTTOM_BACK_LOC 0xB4 #define UAC3_CH_BOTTOM_BACK_ROC 0xB5 #define UAC3_CH_BOTTOM_BACK_WIDE_LEFT 0xB6 #define UAC3_CH_BOTTOM_BACK_WIDE_RIGHT 0xB7 #define UAC3_CH_LOW_FREQUENCY_EFFECTS 0xB8 #define UAC3_CH_LFE_LEFT 0xB9 #define UAC3_CH_LFE_RIGHT 0xBA #define UAC3_CH_HEADPHONE_LEFT 0xBB #define UAC3_CH_HEADPHONE_RIGHT 0xBC /* A.15 AUDIO CLASS-SPECIFIC AC INTERFACE DESCRIPTOR SUBTYPES */ /* see audio.h for the rest, which is identical to v1 */ #define UAC3_EXTENDED_TERMINAL 0x04 #define UAC3_MIXER_UNIT 0x05 #define UAC3_SELECTOR_UNIT 0x06 #define UAC3_FEATURE_UNIT 0x07 #define UAC3_EFFECT_UNIT 0x08 #define UAC3_PROCESSING_UNIT 0x09 #define UAC3_EXTENSION_UNIT 0x0a #define UAC3_CLOCK_SOURCE 0x0b #define UAC3_CLOCK_SELECTOR 0x0c #define UAC3_CLOCK_MULTIPLIER 0x0d #define UAC3_SAMPLE_RATE_CONVERTER 0x0e #define UAC3_CONNECTORS 0x0f #define UAC3_POWER_DOMAIN 0x10 /* A.20 PROCESSING UNIT PROCESS TYPES */ #define UAC3_PROCESS_UNDEFINED 0x00 #define UAC3_PROCESS_UP_DOWNMIX 0x01 #define UAC3_PROCESS_STEREO_EXTENDER 0x02 #define UAC3_PROCESS_MULTI_FUNCTION 0x03 /* A.22 AUDIO CLASS-SPECIFIC REQUEST CODES */ /* see audio-v2.h for the rest, which is identical to v2 */ #define UAC3_CS_REQ_INTEN 0x04 #define UAC3_CS_REQ_STRING 0x05 #define UAC3_CS_REQ_HIGH_CAPABILITY_DESCRIPTOR 0x06 /* A.23.1 AUDIOCONTROL INTERFACE CONTROL SELECTORS */ #define UAC3_AC_CONTROL_UNDEFINED 0x00 #define UAC3_AC_ACTIVE_INTERFACE_CONTROL 0x01 #define UAC3_AC_POWER_DOMAIN_CONTROL 0x02 /* A.23.5 TERMINAL CONTROL SELECTORS */ #define UAC3_TE_UNDEFINED 0x00 #define UAC3_TE_INSERTION 0x01 #define UAC3_TE_OVERLOAD 0x02 #define UAC3_TE_UNDERFLOW 0x03 #define UAC3_TE_OVERFLOW 0x04 #define UAC3_TE_LATENCY 0x05 /* A.23.10 PROCESSING UNITS CONTROL SELECTROS */ /* Up/Down Mixer */ #define UAC3_UD_MODE_SELECT 0x01 /* Stereo Extender */ #define UAC3_EXT_WIDTH_CONTROL 0x01 /* BADD predefined Unit/Terminal values */ #define UAC3_BADD_IT_ID1 1 /* Input Terminal ID1: bTerminalID = 1 */ #define UAC3_BADD_FU_ID2 2 /* Feature Unit ID2: bUnitID = 2 */ #define UAC3_BADD_OT_ID3 3 /* Output Terminal ID3: bTerminalID = 3 */ #define UAC3_BADD_IT_ID4 4 /* Input Terminal ID4: bTerminalID = 4 */ #define UAC3_BADD_FU_ID5 5 /* Feature Unit ID5: bUnitID = 5 */ #define UAC3_BADD_OT_ID6 6 /* Output Terminal ID6: bTerminalID = 6 */ #define UAC3_BADD_FU_ID7 7 /* Feature Unit ID7: bUnitID = 7 */ #define UAC3_BADD_MU_ID8 8 /* Mixer Unit ID8: bUnitID = 8 */ #define UAC3_BADD_CS_ID9 9 /* Clock Source Entity ID9: bClockID = 9 */ #define UAC3_BADD_PD_ID10 10 /* Power Domain ID10: bPowerDomainID = 10 */ #define UAC3_BADD_PD_ID11 11 /* Power Domain ID11: bPowerDomainID = 11 */ /* BADD wMaxPacketSize of AS endpoints */ #define UAC3_BADD_EP_MAXPSIZE_SYNC_MONO_16 0x0060 #define UAC3_BADD_EP_MAXPSIZE_ASYNC_MONO_16 0x0062 #define UAC3_BADD_EP_MAXPSIZE_SYNC_MONO_24 0x0090 #define UAC3_BADD_EP_MAXPSIZE_ASYNC_MONO_24 0x0093 #define UAC3_BADD_EP_MAXPSIZE_SYNC_STEREO_16 0x00C0 #define UAC3_BADD_EP_MAXPSIZE_ASYNC_STEREO_16 0x00C4 #define UAC3_BADD_EP_MAXPSIZE_SYNC_STEREO_24 0x0120 #define UAC3_BADD_EP_MAXPSIZE_ASYNC_STEREO_24 0x0126 /* BADD sample rate is always fixed to 48kHz */ #define UAC3_BADD_SAMPLING_RATE 48000 /* BADD power domains recovery times in 50us increments */ #define UAC3_BADD_PD_RECOVER_D1D0 0x0258 /* 30ms */ #define UAC3_BADD_PD_RECOVER_D2D0 0x1770 /* 300ms */ #endif /* __LINUX_USB_AUDIO_V3_H */ PK ! P| �F �F usb/r8a66597.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * R8A66597 driver platform data * * Copyright (C) 2009 Renesas Solutions Corp. * * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ #ifndef __LINUX_USB_R8A66597_H #define __LINUX_USB_R8A66597_H #define R8A66597_PLATDATA_XTAL_12MHZ 0x01 #define R8A66597_PLATDATA_XTAL_24MHZ 0x02 #define R8A66597_PLATDATA_XTAL_48MHZ 0x03 struct r8a66597_platdata { /* This callback can control port power instead of DVSTCTR register. */ void (*port_power)(int port, int power); /* This parameter is for BUSWAIT */ u16 buswait; /* set one = on chip controller, set zero = external controller */ unsigned on_chip:1; /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */ unsigned xtal:2; /* set one = 3.3V, set zero = 1.5V */ unsigned vif:1; /* set one = big endian, set zero = little endian */ unsigned endian:1; /* (external controller only) set one = WR0_N shorted to WR1_N */ unsigned wr0_shorted_to_wr1:1; /* set one = using SUDMAC */ unsigned sudmac:1; }; /* Register definitions */ #define SYSCFG0 0x00 #define SYSCFG1 0x02 #define SYSSTS0 0x04 #define SYSSTS1 0x06 #define DVSTCTR0 0x08 #define DVSTCTR1 0x0A #define TESTMODE 0x0C #define PINCFG 0x0E #define DMA0CFG 0x10 #define DMA1CFG 0x12 #define CFIFO 0x14 #define D0FIFO 0x18 #define D1FIFO 0x1C #define CFIFOSEL 0x20 #define CFIFOCTR 0x22 #define CFIFOSIE 0x24 #define D0FIFOSEL 0x28 #define D0FIFOCTR 0x2A #define D1FIFOSEL 0x2C #define D1FIFOCTR 0x2E #define INTENB0 0x30 #define INTENB1 0x32 #define INTENB2 0x34 #define BRDYENB 0x36 #define NRDYENB 0x38 #define BEMPENB 0x3A #define SOFCFG 0x3C #define INTSTS0 0x40 #define INTSTS1 0x42 #define INTSTS2 0x44 #define BRDYSTS 0x46 #define NRDYSTS 0x48 #define BEMPSTS 0x4A #define FRMNUM 0x4C #define UFRMNUM 0x4E #define USBADDR 0x50 #define USBREQ 0x54 #define USBVAL 0x56 #define USBINDX 0x58 #define USBLENG 0x5A #define DCPCFG 0x5C #define DCPMAXP 0x5E #define DCPCTR 0x60 #define PIPESEL 0x64 #define PIPECFG 0x68 #define PIPEBUF 0x6A #define PIPEMAXP 0x6C #define PIPEPERI 0x6E #define PIPE1CTR 0x70 #define PIPE2CTR 0x72 #define PIPE3CTR 0x74 #define PIPE4CTR 0x76 #define PIPE5CTR 0x78 #define PIPE6CTR 0x7A #define PIPE7CTR 0x7C #define PIPE8CTR 0x7E #define PIPE9CTR 0x80 #define PIPE1TRE 0x90 #define PIPE1TRN 0x92 #define PIPE2TRE 0x94 #define PIPE2TRN 0x96 #define PIPE3TRE 0x98 #define PIPE3TRN 0x9A #define PIPE4TRE 0x9C #define PIPE4TRN 0x9E #define PIPE5TRE 0xA0 #define PIPE5TRN 0xA2 #define DEVADD0 0xD0 #define DEVADD1 0xD2 #define DEVADD2 0xD4 #define DEVADD3 0xD6 #define DEVADD4 0xD8 #define DEVADD5 0xDA #define DEVADD6 0xDC #define DEVADD7 0xDE #define DEVADD8 0xE0 #define DEVADD9 0xE2 #define DEVADDA 0xE4 /* System Configuration Control Register */ #define XTAL 0xC000 /* b15-14: Crystal selection */ #define XTAL48 0x8000 /* 48MHz */ #define XTAL24 0x4000 /* 24MHz */ #define XTAL12 0x0000 /* 12MHz */ #define XCKE 0x2000 /* b13: External clock enable */ #define PLLC 0x0800 /* b11: PLL control */ #define SCKE 0x0400 /* b10: USB clock enable */ #define PCSDIS 0x0200 /* b9: not CS wakeup */ #define LPSME 0x0100 /* b8: Low power sleep mode */ #define HSE 0x0080 /* b7: Hi-speed enable */ #define DCFM 0x0040 /* b6: Controller function select */ #define DRPD 0x0020 /* b5: D+/- pull down control */ #define DPRPU 0x0010 /* b4: D+ pull up control */ #define USBE 0x0001 /* b0: USB module operation enable */ /* System Configuration Status Register */ #define OVCBIT 0x8000 /* b15-14: Over-current bit */ #define OVCMON 0xC000 /* b15-14: Over-current monitor */ #define SOFEA 0x0020 /* b5: SOF monitor */ #define IDMON 0x0004 /* b3: ID-pin monitor */ #define LNST 0x0003 /* b1-0: D+, D- line status */ #define SE1 0x0003 /* SE1 */ #define FS_KSTS 0x0002 /* Full-Speed K State */ #define FS_JSTS 0x0001 /* Full-Speed J State */ #define LS_JSTS 0x0002 /* Low-Speed J State */ #define LS_KSTS 0x0001 /* Low-Speed K State */ #define SE0 0x0000 /* SE0 */ /* Device State Control Register */ #define EXTLP0 0x0400 /* b10: External port */ #define VBOUT 0x0200 /* b9: VBUS output */ #define WKUP 0x0100 /* b8: Remote wakeup */ #define RWUPE 0x0080 /* b7: Remote wakeup sense */ #define USBRST 0x0040 /* b6: USB reset enable */ #define RESUME 0x0020 /* b5: Resume enable */ #define UACT 0x0010 /* b4: USB bus enable */ #define RHST 0x0007 /* b1-0: Reset handshake status */ #define HSPROC 0x0004 /* HS handshake is processing */ #define HSMODE 0x0003 /* Hi-Speed mode */ #define FSMODE 0x0002 /* Full-Speed mode */ #define LSMODE 0x0001 /* Low-Speed mode */ #define UNDECID 0x0000 /* Undecided */ /* Test Mode Register */ #define UTST 0x000F /* b3-0: Test select */ #define H_TST_PACKET 0x000C /* HOST TEST Packet */ #define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */ #define H_TST_K 0x000A /* HOST TEST K */ #define H_TST_J 0x0009 /* HOST TEST J */ #define H_TST_NORMAL 0x0000 /* HOST Normal Mode */ #define P_TST_PACKET 0x0004 /* PERI TEST Packet */ #define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */ #define P_TST_K 0x0002 /* PERI TEST K */ #define P_TST_J 0x0001 /* PERI TEST J */ #define P_TST_NORMAL 0x0000 /* PERI Normal Mode */ /* Data Pin Configuration Register */ #define LDRV 0x8000 /* b15: Drive Current Adjust */ #define VIF1 0x0000 /* VIF = 1.8V */ #define VIF3 0x8000 /* VIF = 3.3V */ #define INTA 0x0001 /* b1: USB INT-pin active */ /* DMAx Pin Configuration Register */ #define DREQA 0x4000 /* b14: Dreq active select */ #define BURST 0x2000 /* b13: Burst mode */ #define DACKA 0x0400 /* b10: Dack active select */ #define DFORM 0x0380 /* b9-7: DMA mode select */ #define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */ #define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */ #define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */ #define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */ #define DENDA 0x0040 /* b6: Dend active select */ #define PKTM 0x0020 /* b5: Packet mode */ #define DENDE 0x0010 /* b4: Dend enable */ #define OBUS 0x0004 /* b2: OUTbus mode */ /* CFIFO/DxFIFO Port Select Register */ #define RCNT 0x8000 /* b15: Read count mode */ #define REW 0x4000 /* b14: Buffer rewind */ #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ #define DREQE 0x1000 /* b12: DREQ output enable */ #define MBW_8 0x0000 /* 8bit */ #define MBW_16 0x0400 /* 16bit */ #define MBW_32 0x0800 /* 32bit */ #define BIGEND 0x0100 /* b8: Big endian mode */ #define BYTE_LITTLE 0x0000 /* little dendian */ #define BYTE_BIG 0x0100 /* big endifan */ #define ISEL 0x0020 /* b5: DCP FIFO port direction select */ #define CURPIPE 0x000F /* b2-0: PIPE select */ /* CFIFO/DxFIFO Port Control Register */ #define BVAL 0x8000 /* b15: Buffer valid flag */ #define BCLR 0x4000 /* b14: Buffer clear */ #define FRDY 0x2000 /* b13: FIFO ready */ #define DTLN 0x0FFF /* b11-0: FIFO received data length */ /* Interrupt Enable Register 0 */ #define VBSE 0x8000 /* b15: VBUS interrupt */ #define RSME 0x4000 /* b14: Resume interrupt */ #define SOFE 0x2000 /* b13: Frame update interrupt */ #define DVSE 0x1000 /* b12: Device state transition interrupt */ #define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */ #define BEMPE 0x0400 /* b10: Buffer empty interrupt */ #define NRDYE 0x0200 /* b9: Buffer not ready interrupt */ #define BRDYE 0x0100 /* b8: Buffer ready interrupt */ /* Interrupt Enable Register 1 */ #define OVRCRE 0x8000 /* b15: Over-current interrupt */ #define BCHGE 0x4000 /* b14: USB us chenge interrupt */ #define DTCHE 0x1000 /* b12: Detach sense interrupt */ #define ATTCHE 0x0800 /* b11: Attach sense interrupt */ #define EOFERRE 0x0040 /* b6: EOF error interrupt */ #define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */ #define SACKE 0x0010 /* b4: SETUP ACK interrupt */ /* BRDY Interrupt Enable/Status Register */ #define BRDY9 0x0200 /* b9: PIPE9 */ #define BRDY8 0x0100 /* b8: PIPE8 */ #define BRDY7 0x0080 /* b7: PIPE7 */ #define BRDY6 0x0040 /* b6: PIPE6 */ #define BRDY5 0x0020 /* b5: PIPE5 */ #define BRDY4 0x0010 /* b4: PIPE4 */ #define BRDY3 0x0008 /* b3: PIPE3 */ #define BRDY2 0x0004 /* b2: PIPE2 */ #define BRDY1 0x0002 /* b1: PIPE1 */ #define BRDY0 0x0001 /* b1: PIPE0 */ /* NRDY Interrupt Enable/Status Register */ #define NRDY9 0x0200 /* b9: PIPE9 */ #define NRDY8 0x0100 /* b8: PIPE8 */ #define NRDY7 0x0080 /* b7: PIPE7 */ #define NRDY6 0x0040 /* b6: PIPE6 */ #define NRDY5 0x0020 /* b5: PIPE5 */ #define NRDY4 0x0010 /* b4: PIPE4 */ #define NRDY3 0x0008 /* b3: PIPE3 */ #define NRDY2 0x0004 /* b2: PIPE2 */ #define NRDY1 0x0002 /* b1: PIPE1 */ #define NRDY0 0x0001 /* b1: PIPE0 */ /* BEMP Interrupt Enable/Status Register */ #define BEMP9 0x0200 /* b9: PIPE9 */ #define BEMP8 0x0100 /* b8: PIPE8 */ #define BEMP7 0x0080 /* b7: PIPE7 */ #define BEMP6 0x0040 /* b6: PIPE6 */ #define BEMP5 0x0020 /* b5: PIPE5 */ #define BEMP4 0x0010 /* b4: PIPE4 */ #define BEMP3 0x0008 /* b3: PIPE3 */ #define BEMP2 0x0004 /* b2: PIPE2 */ #define BEMP1 0x0002 /* b1: PIPE1 */ #define BEMP0 0x0001 /* b0: PIPE0 */ /* SOF Pin Configuration Register */ #define TRNENSEL 0x0100 /* b8: Select transaction enable period */ #define BRDYM 0x0040 /* b6: BRDY clear timing */ #define INTL 0x0020 /* b5: Interrupt sense select */ #define EDGESTS 0x0010 /* b4: */ #define SOFMODE 0x000C /* b3-2: SOF pin select */ #define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */ #define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */ #define SOF_DISABLE 0x0000 /* SOF OUT Disable */ /* Interrupt Status Register 0 */ #define VBINT 0x8000 /* b15: VBUS interrupt */ #define RESM 0x4000 /* b14: Resume interrupt */ #define SOFR 0x2000 /* b13: SOF frame update interrupt */ #define DVST 0x1000 /* b12: Device state transition interrupt */ #define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */ #define BEMP 0x0400 /* b10: Buffer empty interrupt */ #define NRDY 0x0200 /* b9: Buffer not ready interrupt */ #define BRDY 0x0100 /* b8: Buffer ready interrupt */ #define VBSTS 0x0080 /* b7: VBUS input port */ #define DVSQ 0x0070 /* b6-4: Device state */ #define DS_SPD_CNFG 0x0070 /* Suspend Configured */ #define DS_SPD_ADDR 0x0060 /* Suspend Address */ #define DS_SPD_DFLT 0x0050 /* Suspend Default */ #define DS_SPD_POWR 0x0040 /* Suspend Powered */ #define DS_SUSP 0x0040 /* Suspend */ #define DS_CNFG 0x0030 /* Configured */ #define DS_ADDS 0x0020 /* Address */ #define DS_DFLT 0x0010 /* Default */ #define DS_POWR 0x0000 /* Powered */ #define DVSQS 0x0030 /* b5-4: Device state */ #define VALID 0x0008 /* b3: Setup packet detected flag */ #define CTSQ 0x0007 /* b2-0: Control transfer stage */ #define CS_SQER 0x0006 /* Sequence error */ #define CS_WRND 0x0005 /* Control write nodata status stage */ #define CS_WRSS 0x0004 /* Control write status stage */ #define CS_WRDS 0x0003 /* Control write data stage */ #define CS_RDSS 0x0002 /* Control read status stage */ #define CS_RDDS 0x0001 /* Control read data stage */ #define CS_IDST 0x0000 /* Idle or setup stage */ /* Interrupt Status Register 1 */ #define OVRCR 0x8000 /* b15: Over-current interrupt */ #define BCHG 0x4000 /* b14: USB bus chenge interrupt */ #define DTCH 0x1000 /* b12: Detach sense interrupt */ #define ATTCH 0x0800 /* b11: Attach sense interrupt */ #define EOFERR 0x0040 /* b6: EOF-error interrupt */ #define SIGN 0x0020 /* b5: Setup ignore interrupt */ #define SACK 0x0010 /* b4: Setup acknowledge interrupt */ /* Frame Number Register */ #define OVRN 0x8000 /* b15: Overrun error */ #define CRCE 0x4000 /* b14: Received data error */ #define FRNM 0x07FF /* b10-0: Frame number */ /* Micro Frame Number Register */ #define UFRNM 0x0007 /* b2-0: Micro frame number */ /* Default Control Pipe Maxpacket Size Register */ /* Pipe Maxpacket Size Register */ #define DEVSEL 0xF000 /* b15-14: Device address select */ #define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */ /* Default Control Pipe Control Register */ #define BSTS 0x8000 /* b15: Buffer status */ #define SUREQ 0x4000 /* b14: Send USB request */ #define CSCLR 0x2000 /* b13: complete-split status clear */ #define CSSTS 0x1000 /* b12: complete-split status */ #define SUREQCLR 0x0800 /* b11: stop setup request */ #define SQCLR 0x0100 /* b8: Sequence toggle bit clear */ #define SQSET 0x0080 /* b7: Sequence toggle bit set */ #define SQMON 0x0040 /* b6: Sequence toggle bit monitor */ #define PBUSY 0x0020 /* b5: pipe busy */ #define PINGE 0x0010 /* b4: ping enable */ #define CCPL 0x0004 /* b2: Enable control transfer complete */ #define PID 0x0003 /* b1-0: Response PID */ #define PID_STALL11 0x0003 /* STALL */ #define PID_STALL 0x0002 /* STALL */ #define PID_BUF 0x0001 /* BUF */ #define PID_NAK 0x0000 /* NAK */ /* Pipe Window Select Register */ #define PIPENM 0x0007 /* b2-0: Pipe select */ /* Pipe Configuration Register */ #define R8A66597_TYP 0xC000 /* b15-14: Transfer type */ #define R8A66597_ISO 0xC000 /* Isochronous */ #define R8A66597_INT 0x8000 /* Interrupt */ #define R8A66597_BULK 0x4000 /* Bulk */ #define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */ #define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */ #define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */ #define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */ #define R8A66597_DIR 0x0010 /* b4: Transfer direction select */ #define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */ /* Pipe Buffer Configuration Register */ #define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */ #define BUFNMB 0x007F /* b6-0: Pipe buffer number */ #define PIPE0BUF 256 #define PIPExBUF 64 /* Pipe Maxpacket Size Register */ #define MXPS 0x07FF /* b10-0: Maxpacket size */ /* Pipe Cycle Configuration Register */ #define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */ #define IITV 0x0007 /* b2-0: Isochronous interval */ /* Pipex Control Register */ #define BSTS 0x8000 /* b15: Buffer status */ #define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */ #define CSCLR 0x2000 /* b13: complete-split status clear */ #define CSSTS 0x1000 /* b12: complete-split status */ #define ATREPM 0x0400 /* b10: Auto repeat mode */ #define ACLRM 0x0200 /* b9: Out buffer auto clear mode */ #define SQCLR 0x0100 /* b8: Sequence toggle bit clear */ #define SQSET 0x0080 /* b7: Sequence toggle bit set */ #define SQMON 0x0040 /* b6: Sequence toggle bit monitor */ #define PBUSY 0x0020 /* b5: pipe busy */ #define PID 0x0003 /* b1-0: Response PID */ /* PIPExTRE */ #define TRENB 0x0200 /* b9: Transaction counter enable */ #define TRCLR 0x0100 /* b8: Transaction counter clear */ /* PIPExTRN */ #define TRNCNT 0xFFFF /* b15-0: Transaction counter */ /* DEVADDx */ #define UPPHUB 0x7800 #define HUBPORT 0x0700 #define USBSPD 0x00C0 #define RTPORT 0x0001 /* SUDMAC registers */ #define CH0CFG 0x00 #define CH1CFG 0x04 #define CH0BA 0x10 #define CH1BA 0x14 #define CH0BBC 0x18 #define CH1BBC 0x1C #define CH0CA 0x20 #define CH1CA 0x24 #define CH0CBC 0x28 #define CH1CBC 0x2C #define CH0DEN 0x30 #define CH1DEN 0x34 #define DSTSCLR 0x38 #define DBUFCTRL 0x3C #define DINTCTRL 0x40 #define DINTSTS 0x44 #define DINTSTSCLR 0x48 #define CH0SHCTRL 0x50 #define CH1SHCTRL 0x54 /* SUDMAC Configuration Registers */ #define SENDBUFM 0x1000 /* b12: Transmit Buffer Mode */ #define RCVENDM 0x0100 /* b8: Receive Data Transfer End Mode */ #define LBA_WAIT 0x0030 /* b5-4: Local Bus Access Wait */ /* DMA Enable Registers */ #define DEN 0x0001 /* b1: DMA Transfer Enable */ /* DMA Status Clear Register */ #define CH1STCLR 0x0002 /* b2: Ch1 DMA Status Clear */ #define CH0STCLR 0x0001 /* b1: Ch0 DMA Status Clear */ /* DMA Buffer Control Register */ #define CH1BUFW 0x0200 /* b9: Ch1 DMA Buffer Data Transfer Enable */ #define CH0BUFW 0x0100 /* b8: Ch0 DMA Buffer Data Transfer Enable */ #define CH1BUFS 0x0002 /* b2: Ch1 DMA Buffer Data Status */ #define CH0BUFS 0x0001 /* b1: Ch0 DMA Buffer Data Status */ /* DMA Interrupt Control Register */ #define CH1ERRE 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Enable */ #define CH0ERRE 0x0100 /* b8: Ch0 SHwy Res Err Detect Int Enable */ #define CH1ENDE 0x0002 /* b2: Ch1 DMA Transfer End Int Enable */ #define CH0ENDE 0x0001 /* b1: Ch0 DMA Transfer End Int Enable */ /* DMA Interrupt Status Register */ #define CH1ERRS 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Status */ #define CH0ERRS 0x0100 /* b8: Ch0 SHwy Res Err Detect Int Status */ #define CH1ENDS 0x0002 /* b2: Ch1 DMA Transfer End Int Status */ #define CH0ENDS 0x0001 /* b1: Ch0 DMA Transfer End Int Status */ /* DMA Interrupt Status Clear Register */ #define CH1ERRC 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Stat Clear */ #define CH0ERRC 0x0100 /* b8: Ch0 SHwy Res Err Detect Int Stat Clear */ #define CH1ENDC 0x0002 /* b2: Ch1 DMA Transfer End Int Stat Clear */ #define CH0ENDC 0x0001 /* b1: Ch0 DMA Transfer End Int Stat Clear */ #endif /* __LINUX_USB_R8A66597_H */ PK ! 5k�w�� �� usb/gadget.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * <linux/usb/gadget.h> * * We call the USB code inside a Linux-based peripheral device a "gadget" * driver, except for the hardware-specific bus glue. One USB host can * talk to many USB gadgets, but the gadgets are only able to communicate * to one host. * * * (C) Copyright 2002-2004 by David Brownell * All Rights Reserved. * * This software is licensed under the GNU GPL version 2. */ #ifndef __LINUX_USB_GADGET_H #define __LINUX_USB_GADGET_H #include <linux/cleanup.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/list.h> #include <linux/slab.h> #include <linux/scatterlist.h> #include <linux/types.h> #include <linux/workqueue.h> #include <linux/usb/ch9.h> #define UDC_TRACE_STR_MAX 512 struct usb_ep; /** * struct usb_request - describes one i/o request * @ep: The associated endpoint set by usb_ep_alloc_request(). * @buf: Buffer used for data. Always provide this; some controllers * only use PIO, or don't use DMA for some endpoints. * @dma: DMA address corresponding to 'buf'. If you don't set this * field, and the usb controller needs one, it is responsible * for mapping and unmapping the buffer. * @sg: a scatterlist for SG-capable controllers. * @num_sgs: number of SG entries * @num_mapped_sgs: number of SG entries mapped to DMA (internal) * @length: Length of that data * @stream_id: The stream id, when USB3.0 bulk streams are being used * @is_last: Indicates if this is the last request of a stream_id before * switching to a different stream (required for DWC3 controllers). * @no_interrupt: If true, hints that no completion irq is needed. * Helpful sometimes with deep request queues that are handled * directly by DMA controllers. * @zero: If true, when writing data, makes the last packet be "short" * by adding a zero length packet as needed; * @short_not_ok: When reading data, makes short packets be * treated as errors (queue stops advancing till cleanup). * @dma_mapped: Indicates if request has been mapped to DMA (internal) * @complete: Function called when request completes, so this request and * its buffer may be re-used. The function will always be called with * interrupts disabled, and it must not sleep. * Reads terminate with a short packet, or when the buffer fills, * whichever comes first. When writes terminate, some data bytes * will usually still be in flight (often in a hardware fifo). * Errors (for reads or writes) stop the queue from advancing * until the completion function returns, so that any transfers * invalidated by the error may first be dequeued. * @context: For use by the completion callback * @list: For use by the gadget driver. * @frame_number: Reports the interval number in (micro)frame in which the * isochronous transfer was transmitted or received. * @status: Reports completion code, zero or a negative errno. * Normally, faults block the transfer queue from advancing until * the completion callback returns. * Code "-ESHUTDOWN" indicates completion caused by device disconnect, * or when the driver disabled the endpoint. * @actual: Reports bytes transferred to/from the buffer. For reads (OUT * transfers) this may be less than the requested length. If the * short_not_ok flag is set, short reads are treated as errors * even when status otherwise indicates successful completion. * Note that for writes (IN transfers) some data bytes may still * reside in a device-side FIFO when the request is reported as * complete. * * These are allocated/freed through the endpoint they're used with. The * hardware's driver can add extra per-request data to the memory it returns, * which often avoids separate memory allocations (potential failures), * later when the request is queued. * * Request flags affect request handling, such as whether a zero length * packet is written (the "zero" flag), whether a short read should be * treated as an error (blocking request queue advance, the "short_not_ok" * flag), or hinting that an interrupt is not required (the "no_interrupt" * flag, for use with deep request queues). * * Bulk endpoints can use any size buffers, and can also be used for interrupt * transfers. interrupt-only endpoints can be much less functional. * * NOTE: this is analogous to 'struct urb' on the host side, except that * it's thinner and promotes more pre-allocation. */ struct usb_request { struct usb_ep *ep; void *buf; unsigned length; dma_addr_t dma; struct scatterlist *sg; unsigned num_sgs; unsigned num_mapped_sgs; unsigned stream_id:16; unsigned is_last:1; unsigned no_interrupt:1; unsigned zero:1; unsigned short_not_ok:1; unsigned dma_mapped:1; void (*complete)(struct usb_ep *ep, struct usb_request *req); void *context; struct list_head list; unsigned frame_number; /* ISO ONLY */ int status; unsigned actual; }; /*-------------------------------------------------------------------------*/ /* endpoint-specific parts of the api to the usb controller hardware. * unlike the urb model, (de)multiplexing layers are not required. * (so this api could slash overhead if used on the host side...) * * note that device side usb controllers commonly differ in how many * endpoints they support, as well as their capabilities. */ struct usb_ep_ops { int (*enable) (struct usb_ep *ep, const struct usb_endpoint_descriptor *desc); int (*disable) (struct usb_ep *ep); void (*dispose) (struct usb_ep *ep); struct usb_request *(*alloc_request) (struct usb_ep *ep, gfp_t gfp_flags); void (*free_request) (struct usb_ep *ep, struct usb_request *req); int (*queue) (struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags); int (*dequeue) (struct usb_ep *ep, struct usb_request *req); int (*set_halt) (struct usb_ep *ep, int value); int (*set_wedge) (struct usb_ep *ep); int (*fifo_status) (struct usb_ep *ep); void (*fifo_flush) (struct usb_ep *ep); }; /** * struct usb_ep_caps - endpoint capabilities description * @type_control:Endpoint supports control type (reserved for ep0). * @type_iso:Endpoint supports isochronous transfers. * @type_bulk:Endpoint supports bulk transfers. * @type_int:Endpoint supports interrupt transfers. * @dir_in:Endpoint supports IN direction. * @dir_out:Endpoint supports OUT direction. */ struct usb_ep_caps { unsigned type_control:1; unsigned type_iso:1; unsigned type_bulk:1; unsigned type_int:1; unsigned dir_in:1; unsigned dir_out:1; }; #define USB_EP_CAPS_TYPE_CONTROL 0x01 #define USB_EP_CAPS_TYPE_ISO 0x02 #define USB_EP_CAPS_TYPE_BULK 0x04 #define USB_EP_CAPS_TYPE_INT 0x08 #define USB_EP_CAPS_TYPE_ALL \ (USB_EP_CAPS_TYPE_ISO | USB_EP_CAPS_TYPE_BULK | USB_EP_CAPS_TYPE_INT) #define USB_EP_CAPS_DIR_IN 0x01 #define USB_EP_CAPS_DIR_OUT 0x02 #define USB_EP_CAPS_DIR_ALL (USB_EP_CAPS_DIR_IN | USB_EP_CAPS_DIR_OUT) #define USB_EP_CAPS(_type, _dir) \ { \ .type_control = !!(_type & USB_EP_CAPS_TYPE_CONTROL), \ .type_iso = !!(_type & USB_EP_CAPS_TYPE_ISO), \ .type_bulk = !!(_type & USB_EP_CAPS_TYPE_BULK), \ .type_int = !!(_type & USB_EP_CAPS_TYPE_INT), \ .dir_in = !!(_dir & USB_EP_CAPS_DIR_IN), \ .dir_out = !!(_dir & USB_EP_CAPS_DIR_OUT), \ } /** * struct usb_ep - device side representation of USB endpoint * @name:identifier for the endpoint, such as "ep-a" or "ep9in-bulk" * @ops: Function pointers used to access hardware-specific operations. * @ep_list:the gadget's ep_list holds all of its endpoints * @caps:The structure describing types and directions supported by endpoint. * @enabled: The current endpoint enabled/disabled state. * @claimed: True if this endpoint is claimed by a function. * @maxpacket:The maximum packet size used on this endpoint. The initial * value can sometimes be reduced (hardware allowing), according to * the endpoint descriptor used to configure the endpoint. * @maxpacket_limit:The maximum packet size value which can be handled by this * endpoint. It's set once by UDC driver when endpoint is initialized, and * should not be changed. Should not be confused with maxpacket. * @max_streams: The maximum number of streams supported * by this EP (0 - 16, actual number is 2^n) * @mult: multiplier, 'mult' value for SS Isoc EPs * @maxburst: the maximum number of bursts supported by this EP (for usb3) * @driver_data:for use by the gadget driver. * @address: used to identify the endpoint when finding descriptor that * matches connection speed * @desc: endpoint descriptor. This pointer is set before the endpoint is * enabled and remains valid until the endpoint is disabled. * @comp_desc: In case of SuperSpeed support, this is the endpoint companion * descriptor that is used to configure the endpoint * * the bus controller driver lists all the general purpose endpoints in * gadget->ep_list. the control endpoint (gadget->ep0) is not in that list, * and is accessed only in response to a driver setup() callback. */ struct usb_ep { void *driver_data; const char *name; const struct usb_ep_ops *ops; struct list_head ep_list; struct usb_ep_caps caps; bool claimed; bool enabled; unsigned maxpacket:16; unsigned maxpacket_limit:16; unsigned max_streams:16; unsigned mult:2; unsigned maxburst:5; u8 address; const struct usb_endpoint_descriptor *desc; const struct usb_ss_ep_comp_descriptor *comp_desc; }; /*-------------------------------------------------------------------------*/ #if IS_ENABLED(CONFIG_USB_GADGET) void usb_ep_set_maxpacket_limit(struct usb_ep *ep, unsigned maxpacket_limit); int usb_ep_enable(struct usb_ep *ep); int usb_ep_disable(struct usb_ep *ep); struct usb_request *usb_ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags); void usb_ep_free_request(struct usb_ep *ep, struct usb_request *req); int usb_ep_queue(struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags); int usb_ep_dequeue(struct usb_ep *ep, struct usb_request *req); int usb_ep_set_halt(struct usb_ep *ep); int usb_ep_clear_halt(struct usb_ep *ep); int usb_ep_set_wedge(struct usb_ep *ep); int usb_ep_fifo_status(struct usb_ep *ep); void usb_ep_fifo_flush(struct usb_ep *ep); #else static inline void usb_ep_set_maxpacket_limit(struct usb_ep *ep, unsigned maxpacket_limit) { } static inline int usb_ep_enable(struct usb_ep *ep) { return 0; } static inline int usb_ep_disable(struct usb_ep *ep) { return 0; } static inline struct usb_request *usb_ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) { return NULL; } static inline void usb_ep_free_request(struct usb_ep *ep, struct usb_request *req) { } static inline int usb_ep_queue(struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags) { return 0; } static inline int usb_ep_dequeue(struct usb_ep *ep, struct usb_request *req) { return 0; } static inline int usb_ep_set_halt(struct usb_ep *ep) { return 0; } static inline int usb_ep_clear_halt(struct usb_ep *ep) { return 0; } static inline int usb_ep_set_wedge(struct usb_ep *ep) { return 0; } static inline int usb_ep_fifo_status(struct usb_ep *ep) { return 0; } static inline void usb_ep_fifo_flush(struct usb_ep *ep) { } #endif /* USB_GADGET */ /*-------------------------------------------------------------------------*/ /** * free_usb_request - frees a usb_request object and its buffer * @req: the request being freed * * This helper function frees both the request's buffer and the request object * itself by calling usb_ep_free_request(). Its signature is designed to be used * with DEFINE_FREE() to enable automatic, scope-based cleanup for usb_request * pointers. */ static inline void free_usb_request(struct usb_request *req) { if (!req) return; kfree(req->buf); usb_ep_free_request(req->ep, req); } DEFINE_FREE(free_usb_request, struct usb_request *, free_usb_request(_T)) /*-------------------------------------------------------------------------*/ struct usb_dcd_config_params { __u8 bU1devExitLat; /* U1 Device exit Latency */ #define USB_DEFAULT_U1_DEV_EXIT_LAT 0x01 /* Less then 1 microsec */ __le16 bU2DevExitLat; /* U2 Device exit Latency */ #define USB_DEFAULT_U2_DEV_EXIT_LAT 0x1F4 /* Less then 500 microsec */ __u8 besl_baseline; /* Recommended baseline BESL (0-15) */ __u8 besl_deep; /* Recommended deep BESL (0-15) */ #define USB_DEFAULT_BESL_UNSPECIFIED 0xFF /* No recommended value */ }; struct usb_gadget; struct usb_gadget_driver; struct usb_udc; /* the rest of the api to the controller hardware: device operations, * which don't involve endpoints (or i/o). */ struct usb_gadget_ops { int (*get_frame)(struct usb_gadget *); int (*wakeup)(struct usb_gadget *); int (*func_wakeup)(struct usb_gadget *gadget, int intf_id); int (*set_remote_wakeup)(struct usb_gadget *, int set); int (*set_selfpowered) (struct usb_gadget *, int is_selfpowered); int (*vbus_session) (struct usb_gadget *, int is_active); int (*vbus_draw) (struct usb_gadget *, unsigned mA); int (*pullup) (struct usb_gadget *, int is_on); int (*ioctl)(struct usb_gadget *, unsigned code, unsigned long param); void (*get_config_params)(struct usb_gadget *, struct usb_dcd_config_params *); int (*udc_start)(struct usb_gadget *, struct usb_gadget_driver *); int (*udc_stop)(struct usb_gadget *); void (*udc_set_speed)(struct usb_gadget *, enum usb_device_speed); void (*udc_set_ssp_rate)(struct usb_gadget *gadget, enum usb_ssp_rate rate); void (*udc_async_callbacks)(struct usb_gadget *gadget, bool enable); struct usb_ep *(*match_ep)(struct usb_gadget *, struct usb_endpoint_descriptor *, struct usb_ss_ep_comp_descriptor *); int (*check_config)(struct usb_gadget *gadget); }; /** * struct usb_gadget - represents a usb device * @work: (internal use) Workqueue to be used for sysfs_notify() * @udc: struct usb_udc pointer for this gadget * @ops: Function pointers used to access hardware-specific operations. * @ep0: Endpoint zero, used when reading or writing responses to * driver setup() requests * @ep_list: List of other endpoints supported by the device. * @speed: Speed of current connection to USB host. * @max_speed: Maximal speed the UDC can handle. UDC must support this * and all slower speeds. * @ssp_rate: Current connected SuperSpeed Plus signaling rate and lane count. * @max_ssp_rate: Maximum SuperSpeed Plus signaling rate and lane count the UDC * can handle. The UDC must support this and all slower speeds and lower * number of lanes. * @state: the state we are now (attached, suspended, configured, etc) * @state_lock: Spinlock protecting the `state` and `teardown` members. * @teardown: True if the device is undergoing teardown, used to prevent * new work from being scheduled during cleanup. * @name: Identifies the controller hardware type. Used in diagnostics * and sometimes configuration. * @dev: Driver model state for this abstract device. * @isoch_delay: value from Set Isoch Delay request. Only valid on SS/SSP * @out_epnum: last used out ep number * @in_epnum: last used in ep number * @mA: last set mA value * @otg_caps: OTG capabilities of this gadget. * @sg_supported: true if we can handle scatter-gather * @is_otg: True if the USB device port uses a Mini-AB jack, so that the * gadget driver must provide a USB OTG descriptor. * @is_a_peripheral: False unless is_otg, the "A" end of a USB cable * is in the Mini-AB jack, and HNP has been used to switch roles * so that the "A" device currently acts as A-Peripheral, not A-Host. * @a_hnp_support: OTG device feature flag, indicating that the A-Host * supports HNP at this port. * @a_alt_hnp_support: OTG device feature flag, indicating that the A-Host * only supports HNP on a different root port. * @b_hnp_enable: OTG device feature flag, indicating that the A-Host * enabled HNP support. * @hnp_polling_support: OTG device feature flag, indicating if the OTG device * in peripheral mode can support HNP polling. * @host_request_flag: OTG device feature flag, indicating if A-Peripheral * or B-Peripheral wants to take host role. * @quirk_ep_out_aligned_size: epout requires buffer size to be aligned to * MaxPacketSize. * @quirk_altset_not_supp: UDC controller doesn't support alt settings. * @quirk_stall_not_supp: UDC controller doesn't support stalling. * @quirk_zlp_not_supp: UDC controller doesn't support ZLP. * @quirk_avoids_skb_reserve: udc/platform wants to avoid skb_reserve() in * u_ether.c to improve performance. * @is_selfpowered: if the gadget is self-powered. * @deactivated: True if gadget is deactivated - in deactivated state it cannot * be connected. * @connected: True if gadget is connected. * @lpm_capable: If the gadget max_speed is FULL or HIGH, this flag * indicates that it supports LPM as per the LPM ECN & errata. * @wakeup_capable: True if gadget is capable of sending remote wakeup. * @wakeup_armed: True if gadget is armed by the host for remote wakeup. * @irq: the interrupt number for device controller. * * Gadgets have a mostly-portable "gadget driver" implementing device * functions, handling all usb configurations and interfaces. Gadget * drivers talk to hardware-specific code indirectly, through ops vectors. * That insulates the gadget driver from hardware details, and packages * the hardware endpoints through generic i/o queues. The "usb_gadget" * and "usb_ep" interfaces provide that insulation from the hardware. * * Except for the driver data, all fields in this structure are * read-only to the gadget driver. That driver data is part of the * "driver model" infrastructure in 2.6 (and later) kernels, and for * earlier systems is grouped in a similar structure that's not known * to the rest of the kernel. * * Values of the three OTG device feature flags are updated before the * setup() call corresponding to USB_REQ_SET_CONFIGURATION, and before * driver suspend() calls. They are valid only when is_otg, and when the * device is acting as a B-Peripheral (so is_a_peripheral is false). */ struct usb_gadget { struct work_struct work; struct usb_udc *udc; /* readonly to gadget driver */ const struct usb_gadget_ops *ops; struct usb_ep *ep0; struct list_head ep_list; /* of usb_ep */ enum usb_device_speed speed; enum usb_device_speed max_speed; /* USB SuperSpeed Plus only */ enum usb_ssp_rate ssp_rate; enum usb_ssp_rate max_ssp_rate; enum usb_device_state state; spinlock_t state_lock; bool teardown; const char *name; struct device dev; unsigned isoch_delay; unsigned out_epnum; unsigned in_epnum; unsigned mA; struct usb_otg_caps *otg_caps; unsigned sg_supported:1; unsigned is_otg:1; unsigned is_a_peripheral:1; unsigned b_hnp_enable:1; unsigned a_hnp_support:1; unsigned a_alt_hnp_support:1; unsigned hnp_polling_support:1; unsigned host_request_flag:1; unsigned quirk_ep_out_aligned_size:1; unsigned quirk_altset_not_supp:1; unsigned quirk_stall_not_supp:1; unsigned quirk_zlp_not_supp:1; unsigned quirk_avoids_skb_reserve:1; unsigned is_selfpowered:1; unsigned deactivated:1; unsigned connected:1; unsigned lpm_capable:1; unsigned wakeup_capable:1; unsigned wakeup_armed:1; int irq; }; #define work_to_gadget(w) (container_of((w), struct usb_gadget, work)) /* Interface to the device model */ static inline void set_gadget_data(struct usb_gadget *gadget, void *data) { dev_set_drvdata(&gadget->dev, data); } static inline void *get_gadget_data(struct usb_gadget *gadget) { return dev_get_drvdata(&gadget->dev); } static inline struct usb_gadget *dev_to_usb_gadget(struct device *dev) { return container_of(dev, struct usb_gadget, dev); } static inline struct usb_gadget *usb_get_gadget(struct usb_gadget *gadget) { get_device(&gadget->dev); return gadget; } static inline void usb_put_gadget(struct usb_gadget *gadget) { put_device(&gadget->dev); } extern void usb_initialize_gadget(struct device *parent, struct usb_gadget *gadget, void (*release)(struct device *dev)); extern int usb_add_gadget(struct usb_gadget *gadget); extern void usb_del_gadget(struct usb_gadget *gadget); /* Legacy device-model interface */ extern int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget, void (*release)(struct device *dev)); extern int usb_add_gadget_udc(struct device *parent, struct usb_gadget *gadget); extern void usb_del_gadget_udc(struct usb_gadget *gadget); extern char *usb_get_gadget_udc_name(void); /* iterates the non-control endpoints; 'tmp' is a struct usb_ep pointer */ #define gadget_for_each_ep(tmp, gadget) \ list_for_each_entry(tmp, &(gadget)->ep_list, ep_list) /** * usb_ep_align - returns @len aligned to ep's maxpacketsize. * @ep: the endpoint whose maxpacketsize is used to align @len * @len: buffer size's length to align to @ep's maxpacketsize * * This helper is used to align buffer's size to an ep's maxpacketsize. */ static inline size_t usb_ep_align(struct usb_ep *ep, size_t len) { int max_packet_size = (size_t)usb_endpoint_maxp(ep->desc); return round_up(len, max_packet_size); } /** * usb_ep_align_maybe - returns @len aligned to ep's maxpacketsize if gadget * requires quirk_ep_out_aligned_size, otherwise returns len. * @g: controller to check for quirk * @ep: the endpoint whose maxpacketsize is used to align @len * @len: buffer size's length to align to @ep's maxpacketsize * * This helper is used in case it's required for any reason to check and maybe * align buffer's size to an ep's maxpacketsize. */ static inline size_t usb_ep_align_maybe(struct usb_gadget *g, struct usb_ep *ep, size_t len) { return g->quirk_ep_out_aligned_size ? usb_ep_align(ep, len) : len; } /** * gadget_is_altset_supported - return true iff the hardware supports * altsettings * @g: controller to check for quirk */ static inline int gadget_is_altset_supported(struct usb_gadget *g) { return !g->quirk_altset_not_supp; } /** * gadget_is_stall_supported - return true iff the hardware supports stalling * @g: controller to check for quirk */ static inline int gadget_is_stall_supported(struct usb_gadget *g) { return !g->quirk_stall_not_supp; } /** * gadget_is_zlp_supported - return true iff the hardware supports zlp * @g: controller to check for quirk */ static inline int gadget_is_zlp_supported(struct usb_gadget *g) { return !g->quirk_zlp_not_supp; } /** * gadget_avoids_skb_reserve - return true iff the hardware would like to avoid * skb_reserve to improve performance. * @g: controller to check for quirk */ static inline int gadget_avoids_skb_reserve(struct usb_gadget *g) { return g->quirk_avoids_skb_reserve; } /** * gadget_is_dualspeed - return true iff the hardware handles high speed * @g: controller that might support both high and full speeds */ static inline int gadget_is_dualspeed(struct usb_gadget *g) { return g->max_speed >= USB_SPEED_HIGH; } /** * gadget_is_superspeed() - return true if the hardware handles superspeed * @g: controller that might support superspeed */ static inline int gadget_is_superspeed(struct usb_gadget *g) { return g->max_speed >= USB_SPEED_SUPER; } /** * gadget_is_superspeed_plus() - return true if the hardware handles * superspeed plus * @g: controller that might support superspeed plus */ static inline int gadget_is_superspeed_plus(struct usb_gadget *g) { return g->max_speed >= USB_SPEED_SUPER_PLUS; } /** * gadget_is_otg - return true iff the hardware is OTG-ready * @g: controller that might have a Mini-AB connector * * This is a runtime test, since kernels with a USB-OTG stack sometimes * run on boards which only have a Mini-B (or Mini-A) connector. */ static inline int gadget_is_otg(struct usb_gadget *g) { #ifdef CONFIG_USB_OTG return g->is_otg; #else return 0; #endif } /*-------------------------------------------------------------------------*/ #if IS_ENABLED(CONFIG_USB_GADGET) int usb_gadget_frame_number(struct usb_gadget *gadget); int usb_gadget_wakeup(struct usb_gadget *gadget); int usb_gadget_set_remote_wakeup(struct usb_gadget *gadget, int set); int usb_gadget_set_selfpowered(struct usb_gadget *gadget); int usb_gadget_clear_selfpowered(struct usb_gadget *gadget); int usb_gadget_vbus_connect(struct usb_gadget *gadget); int usb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA); int usb_gadget_vbus_disconnect(struct usb_gadget *gadget); int usb_gadget_connect(struct usb_gadget *gadget); int usb_gadget_disconnect(struct usb_gadget *gadget); int usb_gadget_deactivate(struct usb_gadget *gadget); int usb_gadget_activate(struct usb_gadget *gadget); int usb_gadget_check_config(struct usb_gadget *gadget); #else static inline int usb_gadget_frame_number(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_wakeup(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_set_remote_wakeup(struct usb_gadget *gadget, int set) { return 0; } static inline int usb_gadget_set_selfpowered(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_clear_selfpowered(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_vbus_connect(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA) { return 0; } static inline int usb_gadget_vbus_disconnect(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_connect(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_disconnect(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_deactivate(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_activate(struct usb_gadget *gadget) { return 0; } static inline int usb_gadget_check_config(struct usb_gadget *gadget) { return 0; } #endif /* CONFIG_USB_GADGET */ /*-------------------------------------------------------------------------*/ /** * struct usb_gadget_driver - driver for usb gadget devices * @function: String describing the gadget's function * @max_speed: Highest speed the driver handles. * @setup: Invoked for ep0 control requests that aren't handled by * the hardware level driver. Most calls must be handled by * the gadget driver, including descriptor and configuration * management. The 16 bit members of the setup data are in * USB byte order. Called in_interrupt; this may not sleep. Driver * queues a response to ep0, or returns negative to stall. * @disconnect: Invoked after all transfers have been stopped, * when the host is disconnected. May be called in_interrupt; this * may not sleep. Some devices can't detect disconnect, so this might * not be called except as part of controller shutdown. * @bind: the driver's bind callback * @unbind: Invoked when the driver is unbound from a gadget, * usually from rmmod (after a disconnect is reported). * Called in a context that permits sleeping. * @suspend: Invoked on USB suspend. May be called in_interrupt. * @resume: Invoked on USB resume. May be called in_interrupt. * @reset: Invoked on USB bus reset. It is mandatory for all gadget drivers * and should be called in_interrupt. * @driver: Driver model state for this driver. * @udc_name: A name of UDC this driver should be bound to. If udc_name is NULL, * this driver will be bound to any available UDC. * @pending: UDC core private data used for deferred probe of this driver. * @match_existing_only: If udc is not found, return an error and don't add this * gadget driver to list of pending driver * * Devices are disabled till a gadget driver successfully bind()s, which * means the driver will handle setup() requests needed to enumerate (and * meet "chapter 9" requirements) then do some useful work. * * If gadget->is_otg is true, the gadget driver must provide an OTG * descriptor during enumeration, or else fail the bind() call. In such * cases, no USB traffic may flow until both bind() returns without * having called usb_gadget_disconnect(), and the USB host stack has * initialized. * * Drivers use hardware-specific knowledge to configure the usb hardware. * endpoint addressing is only one of several hardware characteristics that * are in descriptors the ep0 implementation returns from setup() calls. * * Except for ep0 implementation, most driver code shouldn't need change to * run on top of different usb controllers. It'll use endpoints set up by * that ep0 implementation. * * The usb controller driver handles a few standard usb requests. Those * include set_address, and feature flags for devices, interfaces, and * endpoints (the get_status, set_feature, and clear_feature requests). * * Accordingly, the driver's setup() callback must always implement all * get_descriptor requests, returning at least a device descriptor and * a configuration descriptor. Drivers must make sure the endpoint * descriptors match any hardware constraints. Some hardware also constrains * other descriptors. (The pxa250 allows only configurations 1, 2, or 3). * * The driver's setup() callback must also implement set_configuration, * and should also implement set_interface, get_configuration, and * get_interface. Setting a configuration (or interface) is where * endpoints should be activated or (config 0) shut down. * * (Note that only the default control endpoint is supported. Neither * hosts nor devices generally support control traffic except to ep0.) * * Most devices will ignore USB suspend/resume operations, and so will * not provide those callbacks. However, some may need to change modes * when the host is not longer directing those activities. For example, * local controls (buttons, dials, etc) may need to be re-enabled since * the (remote) host can't do that any longer; or an error state might * be cleared, to make the device behave identically whether or not * power is maintained. */ struct usb_gadget_driver { char *function; enum usb_device_speed max_speed; int (*bind)(struct usb_gadget *gadget, struct usb_gadget_driver *driver); void (*unbind)(struct usb_gadget *); int (*setup)(struct usb_gadget *, const struct usb_ctrlrequest *); void (*disconnect)(struct usb_gadget *); void (*suspend)(struct usb_gadget *); void (*resume)(struct usb_gadget *); void (*reset)(struct usb_gadget *); /* FIXME support safe rmmod */ struct device_driver driver; char *udc_name; struct list_head pending; unsigned match_existing_only:1; }; /*-------------------------------------------------------------------------*/ /* driver modules register and unregister, as usual. * these calls must be made in a context that can sleep. * * these will usually be implemented directly by the hardware-dependent * usb bus interface driver, which will only support a single driver. */ /** * usb_gadget_probe_driver - probe a gadget driver * @driver: the driver being registered * Context: can sleep * * Call this in your gadget driver's module initialization function, * to tell the underlying usb controller driver about your driver. * The @bind() function will be called to bind it to a gadget before this * registration call returns. It's expected that the @bind() function will * be in init sections. */ int usb_gadget_probe_driver(struct usb_gadget_driver *driver); /** * usb_gadget_unregister_driver - unregister a gadget driver * @driver:the driver being unregistered * Context: can sleep * * Call this in your gadget driver's module cleanup function, * to tell the underlying usb controller that your driver is * going away. If the controller is connected to a USB host, * it will first disconnect(). The driver is also requested * to unbind() and clean up any device state, before this procedure * finally returns. It's expected that the unbind() functions * will be in exit sections, so may not be linked in some kernels. */ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver); /*-------------------------------------------------------------------------*/ /* utility to simplify dealing with string descriptors */ /** * struct usb_string - wraps a C string and its USB id * @id:the (nonzero) ID for this string * @s:the string, in UTF-8 encoding * * If you're using usb_gadget_get_string(), use this to wrap a string * together with its ID. */ struct usb_string { u8 id; const char *s; }; /** * struct usb_gadget_strings - a set of USB strings in a given language * @language:identifies the strings' language (0x0409 for en-us) * @strings:array of strings with their ids * * If you're using usb_gadget_get_string(), use this to wrap all the * strings for a given language. */ struct usb_gadget_strings { u16 language; /* 0x0409 for en-us */ struct usb_string *strings; }; struct usb_gadget_string_container { struct list_head list; u8 *stash[]; }; /* put descriptor for string with that id into buf (buflen >= 256) */ int usb_gadget_get_string(const struct usb_gadget_strings *table, int id, u8 *buf); /* check if the given language identifier is valid */ bool usb_validate_langid(u16 langid); /*-------------------------------------------------------------------------*/ /* utility to simplify managing config descriptors */ /* write vector of descriptors into buffer */ int usb_descriptor_fillbuf(void *, unsigned, const struct usb_descriptor_header **); /* build config descriptor from single descriptor vector */ int usb_gadget_config_buf(const struct usb_config_descriptor *config, void *buf, unsigned buflen, const struct usb_descriptor_header **desc); /* copy a NULL-terminated vector of descriptors */ struct usb_descriptor_header **usb_copy_descriptors( struct usb_descriptor_header **); /** * usb_free_descriptors - free descriptors returned by usb_copy_descriptors() * @v: vector of descriptors */ static inline void usb_free_descriptors(struct usb_descriptor_header **v) { kfree(v); } struct usb_function; int usb_assign_descriptors(struct usb_function *f, struct usb_descriptor_header **fs, struct usb_descriptor_header **hs, struct usb_descriptor_header **ss, struct usb_descriptor_header **ssp); void usb_free_all_descriptors(struct usb_function *f); struct usb_descriptor_header *usb_otg_descriptor_alloc( struct usb_gadget *gadget); int usb_otg_descriptor_init(struct usb_gadget *gadget, struct usb_descriptor_header *otg_desc); /*-------------------------------------------------------------------------*/ /* utility to simplify map/unmap of usb_requests to/from DMA */ #ifdef CONFIG_HAS_DMA extern int usb_gadget_map_request_by_dev(struct device *dev, struct usb_request *req, int is_in); extern int usb_gadget_map_request(struct usb_gadget *gadget, struct usb_request *req, int is_in); extern void usb_gadget_unmap_request_by_dev(struct device *dev, struct usb_request *req, int is_in); extern void usb_gadget_unmap_request(struct usb_gadget *gadget, struct usb_request *req, int is_in); #else /* !CONFIG_HAS_DMA */ static inline int usb_gadget_map_request_by_dev(struct device *dev, struct usb_request *req, int is_in) { return -ENOSYS; } static inline int usb_gadget_map_request(struct usb_gadget *gadget, struct usb_request *req, int is_in) { return -ENOSYS; } static inline void usb_gadget_unmap_request_by_dev(struct device *dev, struct usb_request *req, int is_in) { } static inline void usb_gadget_unmap_request(struct usb_gadget *gadget, struct usb_request *req, int is_in) { } #endif /* !CONFIG_HAS_DMA */ /*-------------------------------------------------------------------------*/ /* utility to set gadget state properly */ extern void usb_gadget_set_state(struct usb_gadget *gadget, enum usb_device_state state); /*-------------------------------------------------------------------------*/ /* utility to tell udc core that the bus reset occurs */ extern void usb_gadget_udc_reset(struct usb_gadget *gadget, struct usb_gadget_driver *driver); /*-------------------------------------------------------------------------*/ /* utility to give requests back to the gadget layer */ extern void usb_gadget_giveback_request(struct usb_ep *ep, struct usb_request *req); /*-------------------------------------------------------------------------*/ /* utility to find endpoint by name */ extern struct usb_ep *gadget_find_ep_by_name(struct usb_gadget *g, const char *name); /*-------------------------------------------------------------------------*/ /* utility to check if endpoint caps match descriptor needs */ extern int usb_gadget_ep_match_desc(struct usb_gadget *gadget, struct usb_ep *ep, struct usb_endpoint_descriptor *desc, struct usb_ss_ep_comp_descriptor *ep_comp); /*-------------------------------------------------------------------------*/ /* utility to update vbus status for udc core, it may be scheduled */ extern void usb_udc_vbus_handler(struct usb_gadget *gadget, bool status); /*-------------------------------------------------------------------------*/ /* utility wrapping a simple endpoint selection policy */ extern struct usb_ep *usb_ep_autoconfig(struct usb_gadget *, struct usb_endpoint_descriptor *); extern struct usb_ep *usb_ep_autoconfig_ss(struct usb_gadget *, struct usb_endpoint_descriptor *, struct usb_ss_ep_comp_descriptor *); extern void usb_ep_autoconfig_release(struct usb_ep *); extern void usb_ep_autoconfig_reset(struct usb_gadget *); #endif /* __LINUX_USB_GADGET_H */ PK ! \��� � usb/ohci_pdriver.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __USB_CORE_OHCI_PDRIVER_H #define __USB_CORE_OHCI_PDRIVER_H /** * struct usb_ohci_pdata - platform_data for generic ohci driver * * @big_endian_desc: BE descriptors * @big_endian_mmio: BE registers * @no_big_frame_no: no big endian frame_no shift * @num_ports: number of ports * * These are general configuration options for the OHCI controller. All of * these options are activating more or less workarounds for some hardware. */ struct usb_ohci_pdata { unsigned big_endian_desc:1; unsigned big_endian_mmio:1; unsigned no_big_frame_no:1; unsigned int num_ports; /* Turn on all power and clocks */ int (*power_on)(struct platform_device *pdev); /* Turn off all power and clocks */ void (*power_off)(struct platform_device *pdev); /* Turn on only VBUS suspend power and hotplug detection, * turn off everything else */ void (*power_suspend)(struct platform_device *pdev); }; #endif /* __USB_CORE_OHCI_PDRIVER_H */ PK ! ��� usb/ccid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2018 Vincent Pelletier */ /* */ #ifndef __CCID_H #define __CCID_H #include <linux/types.h> #define USB_INTERFACE_CLASS_CCID 0x0b struct ccid_descriptor { __u8 bLength; __u8 bDescriptorType; __le16 bcdCCID; __u8 bMaxSlotIndex; __u8 bVoltageSupport; __le32 dwProtocols; __le32 dwDefaultClock; __le32 dwMaximumClock; __u8 bNumClockSupported; __le32 dwDataRate; __le32 dwMaxDataRate; __u8 bNumDataRatesSupported; __le32 dwMaxIFSD; __le32 dwSynchProtocols; __le32 dwMechanical; __le32 dwFeatures; __le32 dwMaxCCIDMessageLength; __u8 bClassGetResponse; __u8 bClassEnvelope; __le16 wLcdLayout; __u8 bPINSupport; __u8 bMaxCCIDBusySlots; } __attribute__ ((packed)); #endif /* __CCID_H */ PK ! =0M� � usb/typec_dp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __USB_TYPEC_DP_H #define __USB_TYPEC_DP_H #include <linux/usb/typec_altmode.h> #define USB_TYPEC_DP_SID 0xff01 /* USB IF has not assigned a Standard ID (SID) for VirtualLink, * so the manufacturers of VirtualLink adapters use their Vendor * IDs as the SVID. */ #define USB_TYPEC_NVIDIA_VLINK_SID 0x955 /* NVIDIA VirtualLink */ #define USB_TYPEC_DP_MODE 1 /* * Connector states matching the pin assignments in DisplayPort Alt Mode * Specification. * * These values are meant primarily to be used by the mux drivers, but they are * also used as the "value" part in the alternate mode notification chain, so * receivers of those notifications will always see them. * * Note. DisplayPort USB Type-C Alt Mode Specification version 1.0b deprecated * pin assignments A, B and F, but they are still defined here for legacy * purposes. */ enum { TYPEC_DP_STATE_A = TYPEC_STATE_MODAL, /* Not supported after v1.0b */ TYPEC_DP_STATE_B, /* Not supported after v1.0b */ TYPEC_DP_STATE_C, TYPEC_DP_STATE_D, TYPEC_DP_STATE_E, TYPEC_DP_STATE_F, /* Not supported after v1.0b */ }; /* * struct typec_displayport_data - DisplayPort Alt Mode specific data * @status: Status Update command VDO content * @conf: Configure command VDO content * * This structure is delivered as the data part with the notifications. It * contains the VDOs from the two DisplayPort Type-C alternate mode specific * commands: Status Update and Configure. * * @status will show for example the status of the HPD signal. */ struct typec_displayport_data { u32 status; u32 conf; }; enum { DP_PIN_ASSIGN_A, /* Not supported after v1.0b */ DP_PIN_ASSIGN_B, /* Not supported after v1.0b */ DP_PIN_ASSIGN_C, DP_PIN_ASSIGN_D, DP_PIN_ASSIGN_E, DP_PIN_ASSIGN_F, /* Not supported after v1.0b */ DP_PIN_ASSIGN_MAX, }; /* DisplayPort alt mode specific commands */ #define DP_CMD_STATUS_UPDATE VDO_CMD_VENDOR(0) #define DP_CMD_CONFIGURE VDO_CMD_VENDOR(1) /* DisplayPort Capabilities VDO bits (returned with Discover Modes) */ #define DP_CAP_CAPABILITY(_cap_) ((_cap_) & 3) #define DP_CAP_UFP_D 1 #define DP_CAP_DFP_D 2 #define DP_CAP_DFP_D_AND_UFP_D 3 #define DP_CAP_DP_SIGNALING BIT(2) /* Always set */ #define DP_CAP_GEN2 BIT(3) /* Reserved after v1.0b */ #define DP_CAP_RECEPTACLE BIT(6) #define DP_CAP_USB BIT(7) #define DP_CAP_DFP_D_PIN_ASSIGN(_cap_) (((_cap_) & GENMASK(15, 8)) >> 8) #define DP_CAP_UFP_D_PIN_ASSIGN(_cap_) (((_cap_) & GENMASK(23, 16)) >> 16) /* Get pin assignment taking plug & receptacle into consideration */ #define DP_CAP_PIN_ASSIGN_UFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ DP_CAP_UFP_D_PIN_ASSIGN(_cap_) : DP_CAP_DFP_D_PIN_ASSIGN(_cap_)) #define DP_CAP_PIN_ASSIGN_DFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ DP_CAP_DFP_D_PIN_ASSIGN(_cap_) : DP_CAP_UFP_D_PIN_ASSIGN(_cap_)) /* DisplayPort Status Update VDO bits */ #define DP_STATUS_CONNECTION(_status_) ((_status_) & 3) #define DP_STATUS_CON_DISABLED 0 #define DP_STATUS_CON_DFP_D 1 #define DP_STATUS_CON_UFP_D 2 #define DP_STATUS_CON_BOTH 3 #define DP_STATUS_POWER_LOW BIT(2) #define DP_STATUS_ENABLED BIT(3) #define DP_STATUS_PREFER_MULTI_FUNC BIT(4) #define DP_STATUS_SWITCH_TO_USB BIT(5) #define DP_STATUS_EXIT_DP_MODE BIT(6) #define DP_STATUS_HPD_STATE BIT(7) /* 0 = HPD_Low, 1 = HPD_High */ #define DP_STATUS_IRQ_HPD BIT(8) /* DisplayPort Configurations VDO bits */ #define DP_CONF_CURRENTLY(_conf_) ((_conf_) & 3) #define DP_CONF_UFP_U_AS_DFP_D BIT(0) #define DP_CONF_UFP_U_AS_UFP_D BIT(1) #define DP_CONF_SIGNALING_DP BIT(2) #define DP_CONF_SIGNALING_GEN_2 BIT(3) /* Reserved after v1.0b */ #define DP_CONF_PIN_ASSIGNEMENT_SHIFT 8 #define DP_CONF_PIN_ASSIGNEMENT_MASK GENMASK(15, 8) /* Helper for setting/getting the pin assignment value to the configuration */ #define DP_CONF_SET_PIN_ASSIGN(_a_) ((_a_) << 8) #define DP_CONF_GET_PIN_ASSIGN(_conf_) (((_conf_) & GENMASK(15, 8)) >> 8) #endif /* __USB_TYPEC_DP_H */ PK ! �Qet� � usb/musb-ux500.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2013 ST-Ericsson AB * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __MUSB_UX500_H__ #define __MUSB_UX500_H__ enum ux500_musb_vbus_id_status { UX500_MUSB_NONE = 0, UX500_MUSB_VBUS, UX500_MUSB_ID, UX500_MUSB_CHARGER, UX500_MUSB_ENUMERATED, UX500_MUSB_RIDA, UX500_MUSB_RIDB, UX500_MUSB_RIDC, UX500_MUSB_PREPARE, UX500_MUSB_CLEAN, }; #endif /* __MUSB_UX500_H__ */ PK ! jP��) ) usb/usb338x.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * USB 338x super/high/full speed USB device controller. * Unlike many such controllers, this one talks PCI. * * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com) * Copyright (C) 2003 David Brownell * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #ifndef __LINUX_USB_USB338X_H #define __LINUX_USB_USB338X_H #include <linux/usb/net2280.h> /* * Extra defined bits for net2280 registers */ #define SCRATCH 0x0b #define DEFECT7374_FSM_FIELD 28 #define SUPER_SPEED 8 #define DMA_REQUEST_OUTSTANDING 5 #define DMA_PAUSE_DONE_INTERRUPT 26 #define SET_ISOCHRONOUS_DELAY 24 #define SET_SEL 22 #define SUPER_SPEED_MODE 8 /*ep_cfg*/ #define MAX_BURST_SIZE 24 #define EP_FIFO_BYTE_COUNT 16 #define IN_ENDPOINT_ENABLE 14 #define IN_ENDPOINT_TYPE 12 #define OUT_ENDPOINT_ENABLE 10 #define OUT_ENDPOINT_TYPE 8 #define USB3380_EP_CFG_MASK_IN ((0x3 << IN_ENDPOINT_TYPE) | \ BIT(IN_ENDPOINT_ENABLE)) #define USB3380_EP_CFG_MASK_OUT ((0x3 << OUT_ENDPOINT_TYPE) | \ BIT(OUT_ENDPOINT_ENABLE)) struct usb338x_usb_ext_regs { u32 usbclass; #define DEVICE_PROTOCOL 16 #define DEVICE_SUB_CLASS 8 #define DEVICE_CLASS 0 u32 ss_sel; #define U2_SYSTEM_EXIT_LATENCY 8 #define U1_SYSTEM_EXIT_LATENCY 0 u32 ss_del; #define U2_DEVICE_EXIT_LATENCY 8 #define U1_DEVICE_EXIT_LATENCY 0 u32 usb2lpm; #define USB_L1_LPM_HIRD 2 #define USB_L1_LPM_REMOTE_WAKE 1 #define USB_L1_LPM_SUPPORT 0 u32 usb3belt; #define BELT_MULTIPLIER 10 #define BEST_EFFORT_LATENCY_TOLERANCE 0 u32 usbctl2; #define LTM_ENABLE 7 #define U2_ENABLE 6 #define U1_ENABLE 5 #define FUNCTION_SUSPEND 4 #define USB3_CORE_ENABLE 3 #define USB2_CORE_ENABLE 2 #define SERIAL_NUMBER_STRING_ENABLE 0 u32 in_timeout; #define GPEP3_TIMEOUT 19 #define GPEP2_TIMEOUT 18 #define GPEP1_TIMEOUT 17 #define GPEP0_TIMEOUT 16 #define GPEP3_TIMEOUT_VALUE 13 #define GPEP3_TIMEOUT_ENABLE 12 #define GPEP2_TIMEOUT_VALUE 9 #define GPEP2_TIMEOUT_ENABLE 8 #define GPEP1_TIMEOUT_VALUE 5 #define GPEP1_TIMEOUT_ENABLE 4 #define GPEP0_TIMEOUT_VALUE 1 #define GPEP0_TIMEOUT_ENABLE 0 u32 isodelay; #define ISOCHRONOUS_DELAY 0 } __packed; struct usb338x_fifo_regs { /* offset 0x0500, 0x0520, 0x0540, 0x0560, 0x0580 */ u32 ep_fifo_size_base; #define IN_FIFO_BASE_ADDRESS 22 #define IN_FIFO_SIZE 16 #define OUT_FIFO_BASE_ADDRESS 6 #define OUT_FIFO_SIZE 0 u32 ep_fifo_out_wrptr; u32 ep_fifo_out_rdptr; u32 ep_fifo_in_wrptr; u32 ep_fifo_in_rdptr; u32 unused[3]; } __packed; /* Link layer */ struct usb338x_ll_regs { /* offset 0x700 */ u32 ll_ltssm_ctrl1; u32 ll_ltssm_ctrl2; u32 ll_ltssm_ctrl3; u32 unused1; /* 0x710 */ u32 unused2; u32 ll_general_ctrl0; u32 ll_general_ctrl1; #define PM_U3_AUTO_EXIT 29 #define PM_U2_AUTO_EXIT 28 #define PM_U1_AUTO_EXIT 27 #define PM_FORCE_U2_ENTRY 26 #define PM_FORCE_U1_ENTRY 25 #define PM_LGO_COLLISION_SEND_LAU 24 #define PM_DIR_LINK_REJECT 23 #define PM_FORCE_LINK_ACCEPT 22 #define PM_DIR_ENTRY_U3 20 #define PM_DIR_ENTRY_U2 19 #define PM_DIR_ENTRY_U1 18 #define PM_U2_ENABLE 17 #define PM_U1_ENABLE 16 #define SKP_THRESHOLD_ADJUST_FMW 8 #define RESEND_DPP_ON_LRTY_FMW 7 #define DL_BIT_VALUE_FMW 6 #define FORCE_DL_BIT 5 u32 ll_general_ctrl2; #define SELECT_INVERT_LANE_POLARITY 7 #define FORCE_INVERT_LANE_POLARITY 6 /* 0x720 */ u32 ll_general_ctrl3; u32 ll_general_ctrl4; u32 ll_error_gen; u32 unused3; /* 0x730 */ u32 unused4[4]; /* 0x740 */ u32 unused5[2]; u32 ll_lfps_5; #define TIMER_LFPS_6US 16 u32 ll_lfps_6; #define TIMER_LFPS_80US 0 /* 0x750 */ u32 unused6[8]; /* 0x770 */ u32 unused7[3]; u32 ll_tsn_counters_2; #define HOT_TX_NORESET_TS2 24 /* 0x780 */ u32 ll_tsn_counters_3; #define HOT_RX_RESET_TS2 0 u32 unused8[3]; /* 0x790 */ u32 unused9; u32 ll_lfps_timers_2; #define LFPS_TIMERS_2_WORKAROUND_VALUE 0x084d u32 unused10; u32 ll_tsn_chicken_bit; #define RECOVERY_IDLE_TO_RECOVER_FMW 3 } __packed; /* protocol layer */ struct usb338x_pl_regs { /* offset 0x800 */ u32 pl_reg_1; u32 pl_reg_2; u32 pl_reg_3; u32 pl_reg_4; u32 pl_ep_ctrl; /* Protocol Layer Endpoint Control*/ #define PL_EP_CTRL 0x810 #define ENDPOINT_SELECT 0 /* [4:0] */ #define EP_INITIALIZED 16 #define SEQUENCE_NUMBER_RESET 17 #define CLEAR_ACK_ERROR_CODE 20 u32 pl_reg_6; u32 pl_reg_7; u32 pl_reg_8; u32 pl_ep_status_1; /* Protocol Layer Endpoint Status 1*/ #define PL_EP_STATUS_1 0x820 #define STATE 16 #define ACK_GOOD_NORMAL 0x11 #define ACK_GOOD_MORE_ACKS_TO_COME 0x16 u32 pl_ep_status_2; u32 pl_ep_status_3; /* Protocol Layer Endpoint Status 3*/ #define PL_EP_STATUS_3 0x828 #define SEQUENCE_NUMBER 0 u32 pl_ep_status_4; /* Protocol Layer Endpoint Status 4*/ #define PL_EP_STATUS_4 0x82c u32 pl_ep_cfg_4; /* Protocol Layer Endpoint Configuration 4*/ #define PL_EP_CFG_4 0x830 #define NON_CTRL_IN_TOLERATE_BAD_DIR 6 } __packed; #endif /* __LINUX_USB_USB338X_H */ PK ! X&ʳO O usb/role.hnu �[��� // SPDX-License-Identifier: GPL-2.0 #ifndef __LINUX_USB_ROLE_H #define __LINUX_USB_ROLE_H #include <linux/device.h> struct usb_role_switch; enum usb_role { USB_ROLE_NONE, USB_ROLE_HOST, USB_ROLE_DEVICE, }; typedef int (*usb_role_switch_set_t)(struct usb_role_switch *sw, enum usb_role role); typedef enum usb_role (*usb_role_switch_get_t)(struct usb_role_switch *sw); /** * struct usb_role_switch_desc - USB Role Switch Descriptor * @fwnode: The device node to be associated with the role switch * @usb2_port: Optional reference to the host controller port device (USB2) * @usb3_port: Optional reference to the host controller port device (USB3) * @udc: Optional reference to the peripheral controller device * @set: Callback for setting the role * @get: Callback for getting the role (optional) * @allow_userspace_control: If true userspace may change the role through sysfs * @driver_data: Private data pointer * @name: Name for the switch (optional) * * @usb2_port and @usb3_port will point to the USB host port and @udc to the USB * device controller behind the USB connector with the role switch. If * @usb2_port, @usb3_port and @udc are included in the description, the * reference count for them should be incremented by the caller of * usb_role_switch_register() before registering the switch. */ struct usb_role_switch_desc { struct fwnode_handle *fwnode; struct device *usb2_port; struct device *usb3_port; struct device *udc; usb_role_switch_set_t set; usb_role_switch_get_t get; bool allow_userspace_control; void *driver_data; const char *name; }; #if IS_ENABLED(CONFIG_USB_ROLE_SWITCH) int usb_role_switch_set_role(struct usb_role_switch *sw, enum usb_role role); enum usb_role usb_role_switch_get_role(struct usb_role_switch *sw); struct usb_role_switch *usb_role_switch_get(struct device *dev); struct usb_role_switch *fwnode_usb_role_switch_get(struct fwnode_handle *node); void usb_role_switch_put(struct usb_role_switch *sw); struct usb_role_switch * usb_role_switch_find_by_fwnode(const struct fwnode_handle *fwnode); struct usb_role_switch * usb_role_switch_register(struct device *parent, const struct usb_role_switch_desc *desc); void usb_role_switch_unregister(struct usb_role_switch *sw); void usb_role_switch_set_drvdata(struct usb_role_switch *sw, void *data); void *usb_role_switch_get_drvdata(struct usb_role_switch *sw); const char *usb_role_string(enum usb_role role); #else static inline int usb_role_switch_set_role(struct usb_role_switch *sw, enum usb_role role) { return 0; } static inline enum usb_role usb_role_switch_get_role(struct usb_role_switch *sw) { return USB_ROLE_NONE; } static inline struct usb_role_switch *usb_role_switch_get(struct device *dev) { return ERR_PTR(-ENODEV); } static inline struct usb_role_switch * fwnode_usb_role_switch_get(struct fwnode_handle *node) { return ERR_PTR(-ENODEV); } static inline void usb_role_switch_put(struct usb_role_switch *sw) { } static inline struct usb_role_switch * usb_role_switch_find_by_fwnode(const struct fwnode_handle *fwnode) { return NULL; } static inline struct usb_role_switch * usb_role_switch_register(struct device *parent, const struct usb_role_switch_desc *desc) { return ERR_PTR(-ENODEV); } static inline void usb_role_switch_unregister(struct usb_role_switch *sw) { } static inline void usb_role_switch_set_drvdata(struct usb_role_switch *sw, void *data) { } static inline void *usb_role_switch_get_drvdata(struct usb_role_switch *sw) { return NULL; } static inline const char *usb_role_string(enum usb_role role) { return "unknown"; } #endif #endif /* __LINUX_USB_ROLE_H */ PK ! 6_�r� � usb/pd_ado.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2017 Dialog Semiconductor * * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> */ #ifndef __LINUX_USB_PD_ADO_H #define __LINUX_USB_PD_ADO_H /* ADO : Alert Data Object */ #define USB_PD_ADO_TYPE_SHIFT 24 #define USB_PD_ADO_TYPE_MASK 0xff #define USB_PD_ADO_FIXED_BATT_SHIFT 20 #define USB_PD_ADO_FIXED_BATT_MASK 0xf #define USB_PD_ADO_HOT_SWAP_BATT_SHIFT 16 #define USB_PD_ADO_HOT_SWAP_BATT_MASK 0xf #define USB_PD_ADO_TYPE_BATT_STATUS_CHANGE BIT(1) #define USB_PD_ADO_TYPE_OCP BIT(2) #define USB_PD_ADO_TYPE_OTP BIT(3) #define USB_PD_ADO_TYPE_OP_COND_CHANGE BIT(4) #define USB_PD_ADO_TYPE_SRC_INPUT_CHANGE BIT(5) #define USB_PD_ADO_TYPE_OVP BIT(6) static inline unsigned int usb_pd_ado_type(u32 ado) { return (ado >> USB_PD_ADO_TYPE_SHIFT) & USB_PD_ADO_TYPE_MASK; } static inline unsigned int usb_pd_ado_fixed_batt(u32 ado) { return (ado >> USB_PD_ADO_FIXED_BATT_SHIFT) & USB_PD_ADO_FIXED_BATT_MASK; } static inline unsigned int usb_pd_ado_hot_swap_batt(u32 ado) { return (ado >> USB_PD_ADO_HOT_SWAP_BATT_SHIFT) & USB_PD_ADO_HOT_SWAP_BATT_MASK; } #endif /* __LINUX_USB_PD_ADO_H */ PK ! �d���; �; usb/pd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2015-2017 Google, Inc */ #ifndef __LINUX_USB_PD_H #define __LINUX_USB_PD_H #include <linux/kernel.h> #include <linux/types.h> #include <linux/usb/typec.h> /* USB PD Messages */ enum pd_ctrl_msg_type { /* 0 Reserved */ PD_CTRL_GOOD_CRC = 1, PD_CTRL_GOTO_MIN = 2, PD_CTRL_ACCEPT = 3, PD_CTRL_REJECT = 4, PD_CTRL_PING = 5, PD_CTRL_PS_RDY = 6, PD_CTRL_GET_SOURCE_CAP = 7, PD_CTRL_GET_SINK_CAP = 8, PD_CTRL_DR_SWAP = 9, PD_CTRL_PR_SWAP = 10, PD_CTRL_VCONN_SWAP = 11, PD_CTRL_WAIT = 12, PD_CTRL_SOFT_RESET = 13, /* 14-15 Reserved */ PD_CTRL_NOT_SUPP = 16, PD_CTRL_GET_SOURCE_CAP_EXT = 17, PD_CTRL_GET_STATUS = 18, PD_CTRL_FR_SWAP = 19, PD_CTRL_GET_PPS_STATUS = 20, PD_CTRL_GET_COUNTRY_CODES = 21, /* 22-31 Reserved */ }; enum pd_data_msg_type { /* 0 Reserved */ PD_DATA_SOURCE_CAP = 1, PD_DATA_REQUEST = 2, PD_DATA_BIST = 3, PD_DATA_SINK_CAP = 4, PD_DATA_BATT_STATUS = 5, PD_DATA_ALERT = 6, PD_DATA_GET_COUNTRY_INFO = 7, PD_DATA_ENTER_USB = 8, /* 9-14 Reserved */ PD_DATA_VENDOR_DEF = 15, /* 16-31 Reserved */ }; enum pd_ext_msg_type { /* 0 Reserved */ PD_EXT_SOURCE_CAP_EXT = 1, PD_EXT_STATUS = 2, PD_EXT_GET_BATT_CAP = 3, PD_EXT_GET_BATT_STATUS = 4, PD_EXT_BATT_CAP = 5, PD_EXT_GET_MANUFACTURER_INFO = 6, PD_EXT_MANUFACTURER_INFO = 7, PD_EXT_SECURITY_REQUEST = 8, PD_EXT_SECURITY_RESPONSE = 9, PD_EXT_FW_UPDATE_REQUEST = 10, PD_EXT_FW_UPDATE_RESPONSE = 11, PD_EXT_PPS_STATUS = 12, PD_EXT_COUNTRY_INFO = 13, PD_EXT_COUNTRY_CODES = 14, /* 15-31 Reserved */ }; #define PD_REV10 0x0 #define PD_REV20 0x1 #define PD_REV30 0x2 #define PD_MAX_REV PD_REV30 #define PD_HEADER_EXT_HDR BIT(15) #define PD_HEADER_CNT_SHIFT 12 #define PD_HEADER_CNT_MASK 0x7 #define PD_HEADER_ID_SHIFT 9 #define PD_HEADER_ID_MASK 0x7 #define PD_HEADER_PWR_ROLE BIT(8) #define PD_HEADER_REV_SHIFT 6 #define PD_HEADER_REV_MASK 0x3 #define PD_HEADER_DATA_ROLE BIT(5) #define PD_HEADER_TYPE_SHIFT 0 #define PD_HEADER_TYPE_MASK 0x1f #define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \ ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \ ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \ ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \ (rev << PD_HEADER_REV_SHIFT) | \ (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \ (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \ ((ext_hdr) ? PD_HEADER_EXT_HDR : 0)) #define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \ cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0))) static inline unsigned int pd_header_cnt(u16 header) { return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK; } static inline unsigned int pd_header_cnt_le(__le16 header) { return pd_header_cnt(le16_to_cpu(header)); } static inline unsigned int pd_header_type(u16 header) { return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK; } static inline unsigned int pd_header_type_le(__le16 header) { return pd_header_type(le16_to_cpu(header)); } static inline unsigned int pd_header_msgid(u16 header) { return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK; } static inline unsigned int pd_header_msgid_le(__le16 header) { return pd_header_msgid(le16_to_cpu(header)); } static inline unsigned int pd_header_rev(u16 header) { return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK; } static inline unsigned int pd_header_rev_le(__le16 header) { return pd_header_rev(le16_to_cpu(header)); } #define PD_EXT_HDR_CHUNKED BIT(15) #define PD_EXT_HDR_CHUNK_NUM_SHIFT 11 #define PD_EXT_HDR_CHUNK_NUM_MASK 0xf #define PD_EXT_HDR_REQ_CHUNK BIT(10) #define PD_EXT_HDR_DATA_SIZE_SHIFT 0 #define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff #define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \ ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \ ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \ (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \ ((chunked) ? PD_EXT_HDR_CHUNKED : 0)) #define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \ cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked))) static inline unsigned int pd_ext_header_chunk_num(u16 ext_header) { return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) & PD_EXT_HDR_CHUNK_NUM_MASK; } static inline unsigned int pd_ext_header_data_size(u16 ext_header) { return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) & PD_EXT_HDR_DATA_SIZE_MASK; } static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header) { return pd_ext_header_data_size(le16_to_cpu(ext_header)); } #define PD_MAX_PAYLOAD 7 #define PD_EXT_MAX_CHUNK_DATA 26 /** * struct pd_chunked_ext_message_data - PD chunked extended message data as * seen on wire * @header: PD extended message header * @data: PD extended message data */ struct pd_chunked_ext_message_data { __le16 header; u8 data[PD_EXT_MAX_CHUNK_DATA]; } __packed; /** * struct pd_message - PD message as seen on wire * @header: PD message header * @payload: PD message payload * @ext_msg: PD message chunked extended message data */ struct pd_message { __le16 header; union { __le32 payload[PD_MAX_PAYLOAD]; struct pd_chunked_ext_message_data ext_msg; }; } __packed; /* PDO: Power Data Object */ #define PDO_MAX_OBJECTS 7 enum pd_pdo_type { PDO_TYPE_FIXED = 0, PDO_TYPE_BATT = 1, PDO_TYPE_VAR = 2, PDO_TYPE_APDO = 3, }; #define PDO_TYPE_SHIFT 30 #define PDO_TYPE_MASK 0x3 #define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT) #define PDO_VOLT_MASK 0x3ff #define PDO_CURR_MASK 0x3ff #define PDO_PWR_MASK 0x3ff #define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */ #define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */ #define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */ #define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */ #define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */ #define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */ #define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */ #define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */ #define PDO_FIXED_FRS_CURR_SHIFT 23 #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) #define PDO_FIXED(mv, ma, flags) \ (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \ PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma)) #define VSAFE5V 5000 /* mv units */ #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */ #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */ #define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT) #define PDO_BATT(min_mv, max_mv, max_mw) \ (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \ PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw)) #define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */ #define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */ #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */ #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT) #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT) #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) #define PDO_VAR(min_mv, max_mv, max_ma) \ (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \ PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma)) enum pd_apdo_type { APDO_TYPE_PPS = 0, }; #define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */ #define PDO_APDO_TYPE_MASK 0x3 #define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT) #define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */ #define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */ #define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */ #define PDO_PPS_APDO_VOLT_MASK 0xff #define PDO_PPS_APDO_CURR_MASK 0x7f #define PDO_PPS_APDO_MIN_VOLT(mv) \ ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT) #define PDO_PPS_APDO_MAX_VOLT(mv) \ ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT) #define PDO_PPS_APDO_MAX_CURR(ma) \ ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT) #define PDO_PPS_APDO(min_mv, max_mv, max_ma) \ (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \ PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \ PDO_PPS_APDO_MAX_CURR(max_ma)) static inline enum pd_pdo_type pdo_type(u32 pdo) { return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK; } static inline unsigned int pdo_fixed_voltage(u32 pdo) { return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; } static inline unsigned int pdo_min_voltage(u32 pdo) { return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; } static inline unsigned int pdo_max_voltage(u32 pdo) { return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; } static inline unsigned int pdo_max_current(u32 pdo) { return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10; } static inline unsigned int pdo_max_power(u32 pdo) { return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250; } static inline enum pd_apdo_type pdo_apdo_type(u32 pdo) { return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK; } static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo) { return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) & PDO_PPS_APDO_VOLT_MASK) * 100; } static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo) { return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) & PDO_PPS_APDO_VOLT_MASK) * 100; } static inline unsigned int pdo_pps_apdo_max_current(u32 pdo) { return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) & PDO_PPS_APDO_CURR_MASK) * 50; } /* RDO: Request Data Object */ #define RDO_OBJ_POS_SHIFT 28 #define RDO_OBJ_POS_MASK 0x7 #define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */ #define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */ #define RDO_USB_COMM BIT(25) /* USB communications capable */ #define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */ #define RDO_PWR_MASK 0x3ff #define RDO_CURR_MASK 0x3ff #define RDO_FIXED_OP_CURR_SHIFT 10 #define RDO_FIXED_MAX_CURR_SHIFT 0 #define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT) #define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT) #define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT) #define RDO_FIXED(idx, op_ma, max_ma, flags) \ (RDO_OBJ(idx) | (flags) | \ PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma)) #define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */ #define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ #define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT) #define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT) #define RDO_BATT(idx, op_mw, max_mw, flags) \ (RDO_OBJ(idx) | (flags) | \ RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw)) #define RDO_PROG_VOLT_MASK 0x7ff #define RDO_PROG_CURR_MASK 0x7f #define RDO_PROG_VOLT_SHIFT 9 #define RDO_PROG_CURR_SHIFT 0 #define RDO_PROG_VOLT_MV_STEP 20 #define RDO_PROG_CURR_MA_STEP 50 #define PDO_PROG_OUT_VOLT(mv) \ ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT) #define PDO_PROG_OP_CURR(ma) \ ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT) #define RDO_PROG(idx, out_mv, op_ma, flags) \ (RDO_OBJ(idx) | (flags) | \ PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma)) static inline unsigned int rdo_index(u32 rdo) { return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK; } static inline unsigned int rdo_op_current(u32 rdo) { return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10; } static inline unsigned int rdo_max_current(u32 rdo) { return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) & RDO_CURR_MASK) * 10; } static inline unsigned int rdo_op_power(u32 rdo) { return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250; } static inline unsigned int rdo_max_power(u32 rdo) { return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250; } /* Enter_USB Data Object */ #define EUDO_USB_MODE_MASK GENMASK(30, 28) #define EUDO_USB_MODE_SHIFT 28 #define EUDO_USB_MODE_USB2 0 #define EUDO_USB_MODE_USB3 1 #define EUDO_USB_MODE_USB4 2 #define EUDO_USB4_DRD BIT(26) #define EUDO_USB3_DRD BIT(25) #define EUDO_CABLE_SPEED_MASK GENMASK(23, 21) #define EUDO_CABLE_SPEED_SHIFT 21 #define EUDO_CABLE_SPEED_USB2 0 #define EUDO_CABLE_SPEED_USB3_GEN1 1 #define EUDO_CABLE_SPEED_USB4_GEN2 2 #define EUDO_CABLE_SPEED_USB4_GEN3 3 #define EUDO_CABLE_TYPE_MASK GENMASK(20, 19) #define EUDO_CABLE_TYPE_SHIFT 19 #define EUDO_CABLE_TYPE_PASSIVE 0 #define EUDO_CABLE_TYPE_RE_TIMER 1 #define EUDO_CABLE_TYPE_RE_DRIVER 2 #define EUDO_CABLE_TYPE_OPTICAL 3 #define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17) #define EUDO_CABLE_CURRENT_SHIFT 17 #define EUDO_CABLE_CURRENT_NOTSUPP 0 #define EUDO_CABLE_CURRENT_3A 2 #define EUDO_CABLE_CURRENT_5A 3 #define EUDO_PCIE_SUPPORT BIT(16) #define EUDO_DP_SUPPORT BIT(15) #define EUDO_TBT_SUPPORT BIT(14) #define EUDO_HOST_PRESENT BIT(13) /* USB PD timers and counters */ #define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */ #define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */ #define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */ #define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */ #define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */ #define PD_T_SOURCE_ACTIVITY 45 #define PD_T_SINK_ACTIVITY 135 #define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */ #define PD_T_PS_TRANSITION 500 #define PD_T_SRC_TRANSITION 35 #define PD_T_DRP_SNK 40 #define PD_T_DRP_SRC 30 #define PD_T_PS_SOURCE_OFF 920 #define PD_T_PS_SOURCE_ON 480 #define PD_T_PS_SOURCE_ON_PRS 450 /* 390 - 480ms */ #define PD_T_PS_HARD_RESET 30 #define PD_T_SRC_RECOVER 760 #define PD_T_SRC_RECOVER_MAX 1000 #define PD_T_SRC_TURN_ON 275 #define PD_T_SAFE_0V 650 #define PD_T_VCONN_SOURCE_ON 100 #define PD_T_SINK_REQUEST 100 /* 100 ms minimum */ #define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */ #define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */ #define PD_T_NEWSRC 250 /* Maximum of 275ms */ #define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */ #define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */ #define PD_T_SINK_TX 16 /* 16 - 20 ms */ #define PD_T_CHUNK_NOT_SUPP 42 /* 40 - 50 ms */ #define PD_T_DRP_TRY 100 /* 75 - 150 ms */ #define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */ #define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */ #define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */ #define PD_T_TRY_CC_DEBOUNCE 15 /* 10 - 20 ms */ #define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP) #define PD_N_HARD_RESET_COUNT 2 #define PD_P_SNK_STDBY_MW 2500 /* 2500 mW */ #endif /* __LINUX_USB_PD_H */ PK ! � y�� � usb/typec_tbt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __USB_TYPEC_TBT_H #define __USB_TYPEC_TBT_H #include <linux/usb/typec_altmode.h> #define USB_TYPEC_VENDOR_INTEL 0x8087 /* Alias for convenience */ #define USB_TYPEC_TBT_SID USB_TYPEC_VENDOR_INTEL /* Connector state for Thunderbolt3 */ #define TYPEC_TBT_MODE TYPEC_STATE_MODAL /** * struct typec_thunderbolt_data - Thundebolt3 Alt Mode specific data * @device_mode: Device Discover Mode VDO * @cable_mode: Cable Discover Mode VDO * @enter_vdo: Enter Mode VDO */ struct typec_thunderbolt_data { u32 device_mode; u32 cable_mode; u32 enter_vdo; }; /* TBT3 Device Discover Mode VDO bits */ #define TBT_MODE BIT(0) #define TBT_ADAPTER(_vdo_) (((_vdo_) & BIT(16)) >> 16) #define TBT_ADAPTER_LEGACY 0 #define TBT_ADAPTER_TBT3 1 #define TBT_INTEL_SPECIFIC_B0 BIT(26) #define TBT_VENDOR_SPECIFIC_B0 BIT(30) #define TBT_VENDOR_SPECIFIC_B1 BIT(31) #define TBT_SET_ADAPTER(a) (((a) & 1) << 16) /* TBT3 Cable Discover Mode VDO bits */ #define TBT_CABLE_SPEED(_vdo_) (((_vdo_) & GENMASK(18, 16)) >> 16) #define TBT_CABLE_USB3_GEN1 1 #define TBT_CABLE_USB3_PASSIVE 2 #define TBT_CABLE_10_AND_20GBPS 3 #define TBT_CABLE_ROUNDED_SUPPORT(_vdo_) \ (((_vdo_) & GENMASK(20, 19)) >> 19) #define TBT_GEN3_NON_ROUNDED 0 #define TBT_GEN3_GEN4_ROUNDED_NON_ROUNDED 1 #define TBT_CABLE_OPTICAL BIT(21) #define TBT_CABLE_RETIMER BIT(22) #define TBT_CABLE_LINK_TRAINING BIT(23) #define TBT_SET_CABLE_SPEED(_s_) (((_s_) & GENMASK(2, 0)) << 16) #define TBT_SET_CABLE_ROUNDED(_g_) (((_g_) & GENMASK(1, 0)) << 19) /* TBT3 Device Enter Mode VDO bits */ #define TBT_ENTER_MODE_CABLE_SPEED(s) TBT_SET_CABLE_SPEED(s) #define TBT_ENTER_MODE_ACTIVE_CABLE BIT(24) #endif /* __USB_TYPEC_TBT_H */ PK ! C���8 8 usb/audio-v2.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2010 Daniel Mack <daniel@caiaq.de> * * This software is distributed under the terms of the GNU General Public * License ("GPL") version 2, as published by the Free Software Foundation. * * This file holds USB constants and structures defined * by the USB Device Class Definition for Audio Devices in version 2.0. * Comments below reference relevant sections of the documents contained * in http://www.usb.org/developers/devclass_docs/Audio2.0_final.zip */ #ifndef __LINUX_USB_AUDIO_V2_H #define __LINUX_USB_AUDIO_V2_H #include <linux/types.h> /* v1.0 and v2.0 of this standard have many things in common. For the rest * of the definitions, please refer to audio.h */ /* * bmControl field decoders * * From the USB Audio spec v2.0: * * bmaControls() is a (ch+1)-element array of 4-byte bitmaps, * each containing a set of bit pairs. If a Control is present, * it must be Host readable. If a certain Control is not * present then the bit pair must be set to 0b00. * If a Control is present but read-only, the bit pair must be * set to 0b01. If a Control is also Host programmable, the bit * pair must be set to 0b11. The value 0b10 is not allowed. * */ static inline bool uac_v2v3_control_is_readable(u32 bmControls, u8 control) { return (bmControls >> ((control - 1) * 2)) & 0x1; } static inline bool uac_v2v3_control_is_writeable(u32 bmControls, u8 control) { return (bmControls >> ((control - 1) * 2)) & 0x2; } /* 4.7.2 Class-Specific AC Interface Descriptor */ struct uac2_ac_header_descriptor { __u8 bLength; /* 9 */ __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */ __u8 bDescriptorSubtype; /* UAC_MS_HEADER */ __le16 bcdADC; /* 0x0200 */ __u8 bCategory; __le16 wTotalLength; /* includes Unit and Terminal desc. */ __u8 bmControls; } __packed; /* 2.3.1.6 Type I Format Type Descriptor (Frmts20 final.pdf)*/ struct uac2_format_type_i_descriptor { __u8 bLength; /* in bytes: 6 */ __u8 bDescriptorType; /* USB_DT_CS_INTERFACE */ __u8 bDescriptorSubtype; /* FORMAT_TYPE */ __u8 bFormatType; /* FORMAT_TYPE_1 */ __u8 bSubslotSize; /* {1,2,3,4} */ __u8 bBitResolution; } __packed; /* 4.7.2.1 Clock Source Descriptor */ struct uac_clock_source_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bClockID; __u8 bmAttributes; __u8 bmControls; __u8 bAssocTerminal; __u8 iClockSource; } __attribute__((packed)); /* bmAttribute fields */ #define UAC_CLOCK_SOURCE_TYPE_EXT 0x0 #define UAC_CLOCK_SOURCE_TYPE_INT_FIXED 0x1 #define UAC_CLOCK_SOURCE_TYPE_INT_VAR 0x2 #define UAC_CLOCK_SOURCE_TYPE_INT_PROG 0x3 #define UAC_CLOCK_SOURCE_SYNCED_TO_SOF (1 << 2) /* 4.7.2.2 Clock Source Descriptor */ struct uac_clock_selector_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bClockID; __u8 bNrInPins; __u8 baCSourceID[]; /* bmControls and iClockSource omitted */ } __attribute__((packed)); /* 4.7.2.3 Clock Multiplier Descriptor */ struct uac_clock_multiplier_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bClockID; __u8 bCSourceID; __u8 bmControls; __u8 iClockMultiplier; } __attribute__((packed)); /* 4.7.2.4 Input terminal descriptor */ struct uac2_input_terminal_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bTerminalID; __le16 wTerminalType; __u8 bAssocTerminal; __u8 bCSourceID; __u8 bNrChannels; __le32 bmChannelConfig; __u8 iChannelNames; __le16 bmControls; __u8 iTerminal; } __attribute__((packed)); /* 4.7.2.5 Output terminal descriptor */ struct uac2_output_terminal_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bTerminalID; __le16 wTerminalType; __u8 bAssocTerminal; __u8 bSourceID; __u8 bCSourceID; __le16 bmControls; __u8 iTerminal; } __attribute__((packed)); /* 4.7.2.8 Feature Unit Descriptor */ struct uac2_feature_unit_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bUnitID; __u8 bSourceID; /* bmaControls is actually u32, * but u8 is needed for the hybrid parser */ __u8 bmaControls[]; /* variable length */ } __attribute__((packed)); #define UAC2_DT_FEATURE_UNIT_SIZE(ch) (6 + ((ch) + 1) * 4) /* As above, but more useful for defining your own descriptors: */ #define DECLARE_UAC2_FEATURE_UNIT_DESCRIPTOR(ch) \ struct uac2_feature_unit_descriptor_##ch { \ __u8 bLength; \ __u8 bDescriptorType; \ __u8 bDescriptorSubtype; \ __u8 bUnitID; \ __u8 bSourceID; \ __le32 bmaControls[ch + 1]; \ __u8 iFeature; \ } __packed /* 4.7.2.10 Effect Unit Descriptor */ struct uac2_effect_unit_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bUnitID; __le16 wEffectType; __u8 bSourceID; __u8 bmaControls[]; /* variable length */ } __attribute__((packed)); /* 4.9.2 Class-Specific AS Interface Descriptor */ struct uac2_as_header_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bDescriptorSubtype; __u8 bTerminalLink; __u8 bmControls; __u8 bFormatType; __le32 bmFormats; __u8 bNrChannels; __le32 bmChannelConfig; __u8 iChannelNames; } __attribute__((packed)); #define UAC2_FORMAT_TYPE_I_RAW_DATA (1 << 31) /* 4.10.1.2 Class-Specific AS Isochronous Audio Data Endpoint Descriptor */ struct uac2_iso_endpoint_descriptor { __u8 bLength; /* in bytes: 8 */ __u8 bDescriptorType; /* USB_DT_CS_ENDPOINT */ __u8 bDescriptorSubtype; /* EP_GENERAL */ __u8 bmAttributes; __u8 bmControls; __u8 bLockDelayUnits; __le16 wLockDelay; } __attribute__((packed)); #define UAC2_CONTROL_PITCH (3 << 0) #define UAC2_CONTROL_DATA_OVERRUN (3 << 2) #define UAC2_CONTROL_DATA_UNDERRUN (3 << 4) /* 5.2.5.4.2 Connector Control Parameter Block */ struct uac2_connectors_ctl_blk { __u8 bNrChannels; __le32 bmChannelConfig; __u8 iChannelNames; } __attribute__((packed)); /* 6.1 Interrupt Data Message */ #define UAC2_INTERRUPT_DATA_MSG_VENDOR (1 << 0) #define UAC2_INTERRUPT_DATA_MSG_EP (1 << 1) struct uac2_interrupt_data_msg { __u8 bInfo; __u8 bAttribute; __le16 wValue; __le16 wIndex; } __attribute__((packed)); /* A.7 Audio Function Category Codes */ #define UAC2_FUNCTION_SUBCLASS_UNDEFINED 0x00 #define UAC2_FUNCTION_DESKTOP_SPEAKER 0x01 #define UAC2_FUNCTION_HOME_THEATER 0x02 #define UAC2_FUNCTION_MICROPHONE 0x03 #define UAC2_FUNCTION_HEADSET 0x04 #define UAC2_FUNCTION_TELEPHONE 0x05 #define UAC2_FUNCTION_CONVERTER 0x06 #define UAC2_FUNCTION_SOUND_RECORDER 0x07 #define UAC2_FUNCTION_IO_BOX 0x08 #define UAC2_FUNCTION_MUSICAL_INSTRUMENT 0x09 #define UAC2_FUNCTION_PRO_AUDIO 0x0a #define UAC2_FUNCTION_AUDIO_VIDEO 0x0b #define UAC2_FUNCTION_CONTROL_PANEL 0x0c #define UAC2_FUNCTION_OTHER 0xff /* A.9 Audio Class-Specific AC Interface Descriptor Subtypes */ /* see audio.h for the rest, which is identical to v1 */ #define UAC2_EFFECT_UNIT 0x07 #define UAC2_PROCESSING_UNIT_V2 0x08 #define UAC2_EXTENSION_UNIT_V2 0x09 #define UAC2_CLOCK_SOURCE 0x0a #define UAC2_CLOCK_SELECTOR 0x0b #define UAC2_CLOCK_MULTIPLIER 0x0c #define UAC2_SAMPLE_RATE_CONVERTER 0x0d /* A.10 Audio Class-Specific AS Interface Descriptor Subtypes */ /* see audio.h for the rest, which is identical to v1 */ #define UAC2_ENCODER 0x03 #define UAC2_DECODER 0x04 /* A.11 Effect Unit Effect Types */ #define UAC2_EFFECT_UNDEFINED 0x00 #define UAC2_EFFECT_PARAM_EQ 0x01 #define UAC2_EFFECT_REVERB 0x02 #define UAC2_EFFECT_MOD_DELAY 0x03 #define UAC2_EFFECT_DYN_RANGE_COMP 0x04 /* A.12 Processing Unit Process Types */ #define UAC2_PROCESS_UNDEFINED 0x00 #define UAC2_PROCESS_UP_DOWNMIX 0x01 #define UAC2_PROCESS_DOLBY_PROLOCIC 0x02 #define UAC2_PROCESS_STEREO_EXTENDER 0x03 /* A.14 Audio Class-Specific Request Codes */ #define UAC2_CS_CUR 0x01 #define UAC2_CS_RANGE 0x02 #define UAC2_CS_MEM 0x03 /* A.15 Encoder Type Codes */ #define UAC2_ENCODER_UNDEFINED 0x00 #define UAC2_ENCODER_OTHER 0x01 #define UAC2_ENCODER_MPEG 0x02 #define UAC2_ENCODER_AC3 0x03 #define UAC2_ENCODER_WMA 0x04 #define UAC2_ENCODER_DTS 0x05 /* A.16 Decoder Type Codes */ #define UAC2_DECODER_UNDEFINED 0x00 #define UAC2_DECODER_OTHER 0x01 #define UAC2_DECODER_MPEG 0x02 #define UAC2_DECODER_AC3 0x03 #define UAC2_DECODER_WMA 0x04 #define UAC2_DECODER_DTS 0x05 /* A.17.1 Clock Source Control Selectors */ #define UAC2_CS_UNDEFINED 0x00 #define UAC2_CS_CONTROL_SAM_FREQ 0x01 #define UAC2_CS_CONTROL_CLOCK_VALID 0x02 /* A.17.2 Clock Selector Control Selectors */ #define UAC2_CX_UNDEFINED 0x00 #define UAC2_CX_CLOCK_SELECTOR 0x01 /* A.17.3 Clock Multiplier Control Selectors */ #define UAC2_CM_UNDEFINED 0x00 #define UAC2_CM_NUMERATOR 0x01 #define UAC2_CM_DENOMINTATOR 0x02 /* A.17.4 Terminal Control Selectors */ #define UAC2_TE_UNDEFINED 0x00 #define UAC2_TE_COPY_PROTECT 0x01 #define UAC2_TE_CONNECTOR 0x02 #define UAC2_TE_OVERLOAD 0x03 #define UAC2_TE_CLUSTER 0x04 #define UAC2_TE_UNDERFLOW 0x05 #define UAC2_TE_OVERFLOW 0x06 #define UAC2_TE_LATENCY 0x07 /* A.17.5 Mixer Control Selectors */ #define UAC2_MU_UNDEFINED 0x00 #define UAC2_MU_MIXER 0x01 #define UAC2_MU_CLUSTER 0x02 #define UAC2_MU_UNDERFLOW 0x03 #define UAC2_MU_OVERFLOW 0x04 #define UAC2_MU_LATENCY 0x05 /* A.17.6 Selector Control Selectors */ #define UAC2_SU_UNDEFINED 0x00 #define UAC2_SU_SELECTOR 0x01 #define UAC2_SU_LATENCY 0x02 /* A.17.7 Feature Unit Control Selectors */ /* see audio.h for the rest, which is identical to v1 */ #define UAC2_FU_INPUT_GAIN 0x0b #define UAC2_FU_INPUT_GAIN_PAD 0x0c #define UAC2_FU_PHASE_INVERTER 0x0d #define UAC2_FU_UNDERFLOW 0x0e #define UAC2_FU_OVERFLOW 0x0f #define UAC2_FU_LATENCY 0x10 /* A.17.8.1 Parametric Equalizer Section Effect Unit Control Selectors */ #define UAC2_PE_UNDEFINED 0x00 #define UAC2_PE_ENABLE 0x01 #define UAC2_PE_CENTERFREQ 0x02 #define UAC2_PE_QFACTOR 0x03 #define UAC2_PE_GAIN 0x04 #define UAC2_PE_UNDERFLOW 0x05 #define UAC2_PE_OVERFLOW 0x06 #define UAC2_PE_LATENCY 0x07 /* A.17.8.2 Reverberation Effect Unit Control Selectors */ #define UAC2_RV_UNDEFINED 0x00 #define UAC2_RV_ENABLE 0x01 #define UAC2_RV_TYPE 0x02 #define UAC2_RV_LEVEL 0x03 #define UAC2_RV_TIME 0x04 #define UAC2_RV_FEEDBACK 0x05 #define UAC2_RV_PREDELAY 0x06 #define UAC2_RV_DENSITY 0x07 #define UAC2_RV_HIFREQ_ROLLOFF 0x08 #define UAC2_RV_UNDERFLOW 0x09 #define UAC2_RV_OVERFLOW 0x0a #define UAC2_RV_LATENCY 0x0b /* A.17.8.3 Modulation Delay Effect Control Selectors */ #define UAC2_MD_UNDEFINED 0x00 #define UAC2_MD_ENABLE 0x01 #define UAC2_MD_BALANCE 0x02 #define UAC2_MD_RATE 0x03 #define UAC2_MD_DEPTH 0x04 #define UAC2_MD_TIME 0x05 #define UAC2_MD_FEEDBACK 0x06 #define UAC2_MD_UNDERFLOW 0x07 #define UAC2_MD_OVERFLOW 0x08 #define UAC2_MD_LATENCY 0x09 /* A.17.8.4 Dynamic Range Compressor Effect Unit Control Selectors */ #define UAC2_DR_UNDEFINED 0x00 #define UAC2_DR_ENABLE 0x01 #define UAC2_DR_COMPRESSION_RATE 0x02 #define UAC2_DR_MAXAMPL 0x03 #define UAC2_DR_THRESHOLD 0x04 #define UAC2_DR_ATTACK_TIME 0x05 #define UAC2_DR_RELEASE_TIME 0x06 #define UAC2_DR_UNDEFLOW 0x07 #define UAC2_DR_OVERFLOW 0x08 #define UAC2_DR_LATENCY 0x09 /* A.17.9.1 Up/Down-mix Processing Unit Control Selectors */ #define UAC2_UD_UNDEFINED 0x00 #define UAC2_UD_ENABLE 0x01 #define UAC2_UD_MODE_SELECT 0x02 #define UAC2_UD_CLUSTER 0x03 #define UAC2_UD_UNDERFLOW 0x04 #define UAC2_UD_OVERFLOW 0x05 #define UAC2_UD_LATENCY 0x06 /* A.17.9.2 Dolby Prologic[tm] Processing Unit Control Selectors */ #define UAC2_DP_UNDEFINED 0x00 #define UAC2_DP_ENABLE 0x01 #define UAC2_DP_MODE_SELECT 0x02 #define UAC2_DP_CLUSTER 0x03 #define UAC2_DP_UNDERFFLOW 0x04 #define UAC2_DP_OVERFLOW 0x05 #define UAC2_DP_LATENCY 0x06 /* A.17.9.3 Stereo Expander Processing Unit Control Selectors */ #define UAC2_ST_EXT_UNDEFINED 0x00 #define UAC2_ST_EXT_ENABLE 0x01 #define UAC2_ST_EXT_WIDTH 0x02 #define UAC2_ST_EXT_UNDEFLOW 0x03 #define UAC2_ST_EXT_OVERFLOW 0x04 #define UAC2_ST_EXT_LATENCY 0x05 /* A.17.10 Extension Unit Control Selectors */ #define UAC2_XU_UNDEFINED 0x00 #define UAC2_XU_ENABLE 0x01 #define UAC2_XU_CLUSTER 0x02 #define UAC2_XU_UNDERFLOW 0x03 #define UAC2_XU_OVERFLOW 0x04 #define UAC2_XU_LATENCY 0x05 /* A.17.11 AudioStreaming Interface Control Selectors */ #define UAC2_AS_UNDEFINED 0x00 #define UAC2_AS_ACT_ALT_SETTING 0x01 #define UAC2_AS_VAL_ALT_SETTINGS 0x02 #define UAC2_AS_AUDIO_DATA_FORMAT 0x03 /* A.17.12 Encoder Control Selectors */ #define UAC2_EN_UNDEFINED 0x00 #define UAC2_EN_BIT_RATE 0x01 #define UAC2_EN_QUALITY 0x02 #define UAC2_EN_VBR 0x03 #define UAC2_EN_TYPE 0x04 #define UAC2_EN_UNDERFLOW 0x05 #define UAC2_EN_OVERFLOW 0x06 #define UAC2_EN_ENCODER_ERROR 0x07 #define UAC2_EN_PARAM1 0x08 #define UAC2_EN_PARAM2 0x09 #define UAC2_EN_PARAM3 0x0a #define UAC2_EN_PARAM4 0x0b #define UAC2_EN_PARAM5 0x0c #define UAC2_EN_PARAM6 0x0d #define UAC2_EN_PARAM7 0x0e #define UAC2_EN_PARAM8 0x0f /* A.17.13.1 MPEG Decoder Control Selectors */ #define UAC2_MPEG_UNDEFINED 0x00 #define UAC2_MPEG_DUAL_CHANNEL 0x01 #define UAC2_MPEG_SECOND_STEREO 0x02 #define UAC2_MPEG_MULTILINGUAL 0x03 #define UAC2_MPEG_DYN_RANGE 0x04 #define UAC2_MPEG_SCALING 0x05 #define UAC2_MPEG_HILO_SCALING 0x06 #define UAC2_MPEG_UNDERFLOW 0x07 #define UAC2_MPEG_OVERFLOW 0x08 #define UAC2_MPEG_DECODER_ERROR 0x09 /* A17.13.2 AC3 Decoder Control Selectors */ #define UAC2_AC3_UNDEFINED 0x00 #define UAC2_AC3_MODE 0x01 #define UAC2_AC3_DYN_RANGE 0x02 #define UAC2_AC3_SCALING 0x03 #define UAC2_AC3_HILO_SCALING 0x04 #define UAC2_AC3_UNDERFLOW 0x05 #define UAC2_AC3_OVERFLOW 0x06 #define UAC2_AC3_DECODER_ERROR 0x07 /* A17.13.3 WMA Decoder Control Selectors */ #define UAC2_WMA_UNDEFINED 0x00 #define UAC2_WMA_UNDERFLOW 0x01 #define UAC2_WMA_OVERFLOW 0x02 #define UAC2_WMA_DECODER_ERROR 0x03 /* A17.13.4 DTS Decoder Control Selectors */ #define UAC2_DTS_UNDEFINED 0x00 #define UAC2_DTS_UNDERFLOW 0x01 #define UAC2_DTS_OVERFLOW 0x02 #define UAC2_DTS_DECODER_ERROR 0x03 /* A17.14 Endpoint Control Selectors */ #define UAC2_EP_CS_UNDEFINED 0x00 #define UAC2_EP_CS_PITCH 0x01 #define UAC2_EP_CS_DATA_OVERRUN 0x02 #define UAC2_EP_CS_DATA_UNDERRUN 0x03 #endif /* __LINUX_USB_AUDIO_V2_H */ PK ! ���|U U usb/storage.hnu �[��� // SPDX-License-Identifier: GPL-2.0 #ifndef __LINUX_USB_STORAGE_H #define __LINUX_USB_STORAGE_H /* * linux/usb/storage.h * * Copyright Matthew Wilcox for Intel Corp, 2010 * * This file contains definitions taken from the * USB Mass Storage Class Specification Overview * * Distributed under the terms of the GNU GPL, version two. */ /* Storage subclass codes */ #define USB_SC_RBC 0x01 /* Typically, flash devices */ #define USB_SC_8020 0x02 /* CD-ROM */ #define USB_SC_QIC 0x03 /* QIC-157 Tapes */ #define USB_SC_UFI 0x04 /* Floppy */ #define USB_SC_8070 0x05 /* Removable media */ #define USB_SC_SCSI 0x06 /* Transparent */ #define USB_SC_LOCKABLE 0x07 /* Password-protected */ #define USB_SC_ISD200 0xf0 /* ISD200 ATA */ #define USB_SC_CYP_ATACB 0xf1 /* Cypress ATACB */ #define USB_SC_DEVICE 0xff /* Use device's value */ /* Storage protocol codes */ #define USB_PR_CBI 0x00 /* Control/Bulk/Interrupt */ #define USB_PR_CB 0x01 /* Control/Bulk w/o interrupt */ #define USB_PR_BULK 0x50 /* bulk only */ #define USB_PR_UAS 0x62 /* USB Attached SCSI */ #define USB_PR_USBAT 0x80 /* SCM-ATAPI bridge */ #define USB_PR_EUSB_SDDR09 0x81 /* SCM-SCSI bridge for SDDR-09 */ #define USB_PR_SDDR55 0x82 /* SDDR-55 (made up) */ #define USB_PR_DPCM_USB 0xf0 /* Combination CB/SDDR09 */ #define USB_PR_FREECOM 0xf1 /* Freecom */ #define USB_PR_DATAFAB 0xf2 /* Datafab chipsets */ #define USB_PR_JUMPSHOT 0xf3 /* Lexar Jumpshot */ #define USB_PR_ALAUDA 0xf4 /* Alauda chipsets */ #define USB_PR_KARMA 0xf5 /* Rio Karma */ #define USB_PR_DEVICE 0xff /* Use device's value */ /* * Bulk only data structures */ /* command block wrapper */ struct bulk_cb_wrap { __le32 Signature; /* contains 'USBC' */ __u32 Tag; /* unique per command id */ __le32 DataTransferLength; /* size of data */ __u8 Flags; /* direction in bit 0 */ __u8 Lun; /* LUN normally 0 */ __u8 Length; /* length of the CDB */ __u8 CDB[16]; /* max command */ }; #define US_BULK_CB_WRAP_LEN 31 #define US_BULK_CB_SIGN 0x43425355 /* spells out 'USBC' */ #define US_BULK_FLAG_IN (1 << 7) #define US_BULK_FLAG_OUT 0 /* command status wrapper */ struct bulk_cs_wrap { __le32 Signature; /* contains 'USBS' */ __u32 Tag; /* same as original command */ __le32 Residue; /* amount not transferred */ __u8 Status; /* see below */ }; #define US_BULK_CS_WRAP_LEN 13 #define US_BULK_CS_SIGN 0x53425355 /* spells out 'USBS' */ #define US_BULK_STAT_OK 0 #define US_BULK_STAT_FAIL 1 #define US_BULK_STAT_PHASE 2 /* bulk-only class specific requests */ #define US_BULK_RESET_REQUEST 0xff #define US_BULK_GET_MAX_LUN 0xfe #endif PK ! �.��<f <f usb/composite.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * composite.h -- framework for usb gadgets which are composite devices * * Copyright (C) 2006-2008 David Brownell * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef __LINUX_USB_COMPOSITE_H #define __LINUX_USB_COMPOSITE_H /* * This framework is an optional layer on top of the USB Gadget interface, * making it easier to build (a) Composite devices, supporting multiple * functions within any single configuration, and (b) Multi-configuration * devices, also supporting multiple functions but without necessarily * having more than one function per configuration. * * Example: a device with a single configuration supporting both network * link and mass storage functions is a composite device. Those functions * might alternatively be packaged in individual configurations, but in * the composite model the host can use both functions at the same time. */ #include <linux/bcd.h> #include <linux/version.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> #include <linux/log2.h> #include <linux/configfs.h> /* * USB function drivers should return USB_GADGET_DELAYED_STATUS if they * wish to delay the data/status stages of the control transfer till they * are ready. The control transfer will then be kept from completing till * all the function drivers that requested for USB_GADGET_DELAYED_STAUS * invoke usb_composite_setup_continue(). */ #define USB_GADGET_DELAYED_STATUS 0x7fff /* Impossibly large value */ /* big enough to hold our biggest descriptor */ #define USB_COMP_EP0_BUFSIZ 4096 /* OS feature descriptor length <= 4kB */ #define USB_COMP_EP0_OS_DESC_BUFSIZ 4096 #define USB_MS_TO_HS_INTERVAL(x) (ilog2((x * 1000 / 125)) + 1) struct usb_configuration; /** * struct usb_os_desc_ext_prop - describes one "Extended Property" * @entry: used to keep a list of extended properties * @type: Extended Property type * @name_len: Extended Property unicode name length, including terminating '\0' * @name: Extended Property name * @data_len: Length of Extended Property blob (for unicode store double len) * @data: Extended Property blob * @item: Represents this Extended Property in configfs */ struct usb_os_desc_ext_prop { struct list_head entry; u8 type; int name_len; char *name; int data_len; char *data; struct config_item item; }; /** * struct usb_os_desc - describes OS descriptors associated with one interface * @ext_compat_id: 16 bytes of "Compatible ID" and "Subcompatible ID" * @ext_prop: Extended Properties list * @ext_prop_len: Total length of Extended Properties blobs * @ext_prop_count: Number of Extended Properties * @opts_mutex: Optional mutex protecting config data of a usb_function_instance * @group: Represents OS descriptors associated with an interface in configfs * @owner: Module associated with this OS descriptor */ struct usb_os_desc { char *ext_compat_id; struct list_head ext_prop; int ext_prop_len; int ext_prop_count; struct mutex *opts_mutex; struct config_group group; struct module *owner; }; /** * struct usb_os_desc_table - describes OS descriptors associated with one * interface of a usb_function * @if_id: Interface id * @os_desc: "Extended Compatibility ID" and "Extended Properties" of the * interface * * Each interface can have at most one "Extended Compatibility ID" and a * number of "Extended Properties". */ struct usb_os_desc_table { int if_id; struct usb_os_desc *os_desc; }; /** * struct usb_function - describes one function of a configuration * @name: For diagnostics, identifies the function. * @strings: tables of strings, keyed by identifiers assigned during bind() * and by language IDs provided in control requests * @fs_descriptors: Table of full (or low) speed descriptors, using interface and * string identifiers assigned during @bind(). If this pointer is null, * the function will not be available at full speed (or at low speed). * @hs_descriptors: Table of high speed descriptors, using interface and * string identifiers assigned during @bind(). If this pointer is null, * the function will not be available at high speed. * @ss_descriptors: Table of super speed descriptors, using interface and * string identifiers assigned during @bind(). If this * pointer is null after initiation, the function will not * be available at super speed. * @ssp_descriptors: Table of super speed plus descriptors, using * interface and string identifiers assigned during @bind(). If * this pointer is null after initiation, the function will not * be available at super speed plus. * @config: assigned when @usb_add_function() is called; this is the * configuration with which this function is associated. * @os_desc_table: Table of (interface id, os descriptors) pairs. The function * can expose more than one interface. If an interface is a member of * an IAD, only the first interface of IAD has its entry in the table. * @os_desc_n: Number of entries in os_desc_table * @bind: Before the gadget can register, all of its functions bind() to the * available resources including string and interface identifiers used * in interface or class descriptors; endpoints; I/O buffers; and so on. * @unbind: Reverses @bind; called as a side effect of unregistering the * driver which added this function. * @free_func: free the struct usb_function. * @mod: (internal) points to the module that created this structure. * @set_alt: (REQUIRED) Reconfigures altsettings; function drivers may * initialize usb_ep.driver data at this time (when it is used). * Note that setting an interface to its current altsetting resets * interface state, and that all interfaces have a disabled state. * @get_alt: Returns the active altsetting. If this is not provided, * then only altsetting zero is supported. * @disable: (REQUIRED) Indicates the function should be disabled. Reasons * include host resetting or reconfiguring the gadget, and disconnection. * @setup: Used for interface-specific control requests. * @req_match: Tests if a given class request can be handled by this function. * @suspend: Notifies functions when the host stops sending USB traffic. * @resume: Notifies functions when the host restarts USB traffic. * @get_status: Returns function status as a reply to * GetStatus() request when the recipient is Interface. * @func_suspend: callback to be called when * SetFeature(FUNCTION_SUSPEND) is reseived * @func_suspended: Indicates whether the function is in function suspend state. * @func_wakeup_armed: Indicates whether the function is armed by the host for * wakeup signaling. * * A single USB function uses one or more interfaces, and should in most * cases support operation at both full and high speeds. Each function is * associated by @usb_add_function() with a one configuration; that function * causes @bind() to be called so resources can be allocated as part of * setting up a gadget driver. Those resources include endpoints, which * should be allocated using @usb_ep_autoconfig(). * * To support dual speed operation, a function driver provides descriptors * for both high and full speed operation. Except in rare cases that don't * involve bulk endpoints, each speed needs different endpoint descriptors. * * Function drivers choose their own strategies for managing instance data. * The simplest strategy just declares it "static', which means the function * can only be activated once. If the function needs to be exposed in more * than one configuration at a given speed, it needs to support multiple * usb_function structures (one for each configuration). * * A more complex strategy might encapsulate a @usb_function structure inside * a driver-specific instance structure to allows multiple activations. An * example of multiple activations might be a CDC ACM function that supports * two or more distinct instances within the same configuration, providing * several independent logical data links to a USB host. */ struct usb_function { const char *name; struct usb_gadget_strings **strings; struct usb_descriptor_header **fs_descriptors; struct usb_descriptor_header **hs_descriptors; struct usb_descriptor_header **ss_descriptors; struct usb_descriptor_header **ssp_descriptors; struct usb_configuration *config; struct usb_os_desc_table *os_desc_table; unsigned os_desc_n; /* REVISIT: bind() functions can be marked __init, which * makes trouble for section mismatch analysis. See if * we can't restructure things to avoid mismatching. * Related: unbind() may kfree() but bind() won't... */ /* configuration management: bind/unbind */ int (*bind)(struct usb_configuration *, struct usb_function *); void (*unbind)(struct usb_configuration *, struct usb_function *); void (*free_func)(struct usb_function *f); struct module *mod; /* runtime state management */ int (*set_alt)(struct usb_function *, unsigned interface, unsigned alt); int (*get_alt)(struct usb_function *, unsigned interface); void (*disable)(struct usb_function *); int (*setup)(struct usb_function *, const struct usb_ctrlrequest *); bool (*req_match)(struct usb_function *, const struct usb_ctrlrequest *, bool config0); void (*suspend)(struct usb_function *); void (*resume)(struct usb_function *); /* USB 3.0 additions */ int (*get_status)(struct usb_function *); int (*func_suspend)(struct usb_function *, u8 suspend_opt); bool func_suspended; bool func_wakeup_armed; /* private: */ /* internals */ struct list_head list; DECLARE_BITMAP(endpoints, 32); const struct usb_function_instance *fi; unsigned int bind_deactivated:1; }; int usb_add_function(struct usb_configuration *, struct usb_function *); int usb_function_deactivate(struct usb_function *); int usb_function_activate(struct usb_function *); int usb_interface_id(struct usb_configuration *, struct usb_function *); int config_ep_by_speed_and_alt(struct usb_gadget *g, struct usb_function *f, struct usb_ep *_ep, u8 alt); int config_ep_by_speed(struct usb_gadget *g, struct usb_function *f, struct usb_ep *_ep); int usb_func_wakeup(struct usb_function *func); #define MAX_CONFIG_INTERFACES 16 /* arbitrary; max 255 */ /** * struct usb_configuration - represents one gadget configuration * @label: For diagnostics, describes the configuration. * @strings: Tables of strings, keyed by identifiers assigned during @bind() * and by language IDs provided in control requests. * @descriptors: Table of descriptors preceding all function descriptors. * Examples include OTG and vendor-specific descriptors. * @unbind: Reverses @bind; called as a side effect of unregistering the * driver which added this configuration. * @setup: Used to delegate control requests that aren't handled by standard * device infrastructure or directed at a specific interface. * @bConfigurationValue: Copied into configuration descriptor. * @iConfiguration: Copied into configuration descriptor. * @bmAttributes: Copied into configuration descriptor. * @MaxPower: Power consumption in mA. Used to compute bMaxPower in the * configuration descriptor after considering the bus speed. * @cdev: assigned by @usb_add_config() before calling @bind(); this is * the device associated with this configuration. * * Configurations are building blocks for gadget drivers structured around * function drivers. Simple USB gadgets require only one function and one * configuration, and handle dual-speed hardware by always providing the same * functionality. Slightly more complex gadgets may have more than one * single-function configuration at a given speed; or have configurations * that only work at one speed. * * Composite devices are, by definition, ones with configurations which * include more than one function. * * The lifecycle of a usb_configuration includes allocation, initialization * of the fields described above, and calling @usb_add_config() to set up * internal data and bind it to a specific device. The configuration's * @bind() method is then used to initialize all the functions and then * call @usb_add_function() for them. * * Those functions would normally be independent of each other, but that's * not mandatory. CDC WMC devices are an example where functions often * depend on other functions, with some functions subsidiary to others. * Such interdependency may be managed in any way, so long as all of the * descriptors complete by the time the composite driver returns from * its bind() routine. */ struct usb_configuration { const char *label; struct usb_gadget_strings **strings; const struct usb_descriptor_header **descriptors; /* REVISIT: bind() functions can be marked __init, which * makes trouble for section mismatch analysis. See if * we can't restructure things to avoid mismatching... */ /* configuration management: unbind/setup */ void (*unbind)(struct usb_configuration *); int (*setup)(struct usb_configuration *, const struct usb_ctrlrequest *); /* fields in the config descriptor */ u8 bConfigurationValue; u8 iConfiguration; u8 bmAttributes; u16 MaxPower; struct usb_composite_dev *cdev; /* private: */ /* internals */ struct list_head list; struct list_head functions; u8 next_interface_id; unsigned superspeed:1; unsigned highspeed:1; unsigned fullspeed:1; unsigned superspeed_plus:1; struct usb_function *interface[MAX_CONFIG_INTERFACES]; }; int usb_add_config(struct usb_composite_dev *, struct usb_configuration *, int (*)(struct usb_configuration *)); void usb_remove_config(struct usb_composite_dev *, struct usb_configuration *); /* predefined index for usb_composite_driver */ enum { USB_GADGET_MANUFACTURER_IDX = 0, USB_GADGET_PRODUCT_IDX, USB_GADGET_SERIAL_IDX, USB_GADGET_FIRST_AVAIL_IDX, }; /** * struct usb_composite_driver - groups configurations into a gadget * @name: For diagnostics, identifies the driver. * @dev: Template descriptor for the device, including default device * identifiers. * @strings: tables of strings, keyed by identifiers assigned during @bind * and language IDs provided in control requests. Note: The first entries * are predefined. The first entry that may be used is * USB_GADGET_FIRST_AVAIL_IDX * @max_speed: Highest speed the driver supports. * @needs_serial: set to 1 if the gadget needs userspace to provide * a serial number. If one is not provided, warning will be printed. * @bind: (REQUIRED) Used to allocate resources that are shared across the * whole device, such as string IDs, and add its configurations using * @usb_add_config(). This may fail by returning a negative errno * value; it should return zero on successful initialization. * @unbind: Reverses @bind; called as a side effect of unregistering * this driver. * @disconnect: optional driver disconnect method * @suspend: Notifies when the host stops sending USB traffic, * after function notifications * @resume: Notifies configuration when the host restarts USB traffic, * before function notifications * @gadget_driver: Gadget driver controlling this driver * * Devices default to reporting self powered operation. Devices which rely * on bus powered operation should report this in their @bind method. * * Before returning from @bind, various fields in the template descriptor * may be overridden. These include the idVendor/idProduct/bcdDevice values * normally to bind the appropriate host side driver, and the three strings * (iManufacturer, iProduct, iSerialNumber) normally used to provide user * meaningful device identifiers. (The strings will not be defined unless * they are defined in @dev and @strings.) The correct ep0 maxpacket size * is also reported, as defined by the underlying controller driver. */ struct usb_composite_driver { const char *name; const struct usb_device_descriptor *dev; struct usb_gadget_strings **strings; enum usb_device_speed max_speed; unsigned needs_serial:1; int (*bind)(struct usb_composite_dev *cdev); int (*unbind)(struct usb_composite_dev *); void (*disconnect)(struct usb_composite_dev *); /* global suspend hooks */ void (*suspend)(struct usb_composite_dev *); void (*resume)(struct usb_composite_dev *); struct usb_gadget_driver gadget_driver; }; extern int usb_composite_probe(struct usb_composite_driver *driver); extern void usb_composite_unregister(struct usb_composite_driver *driver); /** * module_usb_composite_driver() - Helper macro for registering a USB gadget * composite driver * @__usb_composite_driver: usb_composite_driver struct * * Helper macro for USB gadget composite drivers which do not do anything * special in module init/exit. This eliminates a lot of boilerplate. Each * module may only use this macro once, and calling it replaces module_init() * and module_exit() */ #define module_usb_composite_driver(__usb_composite_driver) \ module_driver(__usb_composite_driver, usb_composite_probe, \ usb_composite_unregister) extern void usb_composite_setup_continue(struct usb_composite_dev *cdev); extern int composite_dev_prepare(struct usb_composite_driver *composite, struct usb_composite_dev *cdev); extern int composite_os_desc_req_prepare(struct usb_composite_dev *cdev, struct usb_ep *ep0); void composite_dev_cleanup(struct usb_composite_dev *cdev); void check_remote_wakeup_config(struct usb_gadget *g, struct usb_configuration *c); static inline struct usb_composite_driver *to_cdriver( struct usb_gadget_driver *gdrv) { return container_of(gdrv, struct usb_composite_driver, gadget_driver); } #define OS_STRING_QW_SIGN_LEN 14 #define OS_STRING_IDX 0xEE /** * struct usb_composite_dev - represents one composite usb gadget * @gadget: read-only, abstracts the gadget's usb peripheral controller * @req: used for control responses; buffer is pre-allocated * @os_desc_req: used for OS descriptors responses; buffer is pre-allocated * @config: the currently active configuration * @qw_sign: qwSignature part of the OS string * @b_vendor_code: bMS_VendorCode part of the OS string * @use_os_string: false by default, interested gadgets set it * @os_desc_config: the configuration to be used with OS descriptors * @setup_pending: true when setup request is queued but not completed * @os_desc_pending: true when os_desc request is queued but not completed * * One of these devices is allocated and initialized before the * associated device driver's bind() is called. * * OPEN ISSUE: it appears that some WUSB devices will need to be * built by combining a normal (wired) gadget with a wireless one. * This revision of the gadget framework should probably try to make * sure doing that won't hurt too much. * * One notion for how to handle Wireless USB devices involves: * * (a) a second gadget here, discovery mechanism TBD, but likely * needing separate "register/unregister WUSB gadget" calls; * (b) updates to usb_gadget to include flags "is it wireless", * "is it wired", plus (presumably in a wrapper structure) * bandgroup and PHY info; * (c) presumably a wireless_ep wrapping a usb_ep, and reporting * wireless-specific parameters like maxburst and maxsequence; * (d) configurations that are specific to wireless links; * (e) function drivers that understand wireless configs and will * support wireless for (additional) function instances; * (f) a function to support association setup (like CBAF), not * necessarily requiring a wireless adapter; * (g) composite device setup that can create one or more wireless * configs, including appropriate association setup support; * (h) more, TBD. */ struct usb_composite_dev { struct usb_gadget *gadget; struct usb_request *req; struct usb_request *os_desc_req; struct usb_configuration *config; /* OS String is a custom (yet popular) extension to the USB standard. */ u8 qw_sign[OS_STRING_QW_SIGN_LEN]; u8 b_vendor_code; struct usb_configuration *os_desc_config; unsigned int use_os_string:1; /* private: */ /* internals */ unsigned int suspended:1; struct usb_device_descriptor desc; struct list_head configs; struct list_head gstrings; struct usb_composite_driver *driver; u8 next_string_id; char *def_manufacturer; /* the gadget driver won't enable the data pullup * while the deactivation count is nonzero. */ unsigned deactivations; /* the composite driver won't complete the control transfer's * data/status stages till delayed_status is zero. */ int delayed_status; /* protects deactivations and delayed_status counts*/ spinlock_t lock; /* public: */ unsigned int setup_pending:1; unsigned int os_desc_pending:1; }; extern int usb_string_id(struct usb_composite_dev *c); extern int usb_string_ids_tab(struct usb_composite_dev *c, struct usb_string *str); extern struct usb_string *usb_gstrings_attach(struct usb_composite_dev *cdev, struct usb_gadget_strings **sp, unsigned n_strings); extern int usb_string_ids_n(struct usb_composite_dev *c, unsigned n); extern void composite_disconnect(struct usb_gadget *gadget); extern void composite_reset(struct usb_gadget *gadget); extern int composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl); extern void composite_suspend(struct usb_gadget *gadget); extern void composite_resume(struct usb_gadget *gadget); /* * Some systems will need runtime overrides for the product identifiers * published in the device descriptor, either numbers or strings or both. * String parameters are in UTF-8 (superset of ASCII's 7 bit characters). */ struct usb_composite_overwrite { u16 idVendor; u16 idProduct; u16 bcdDevice; char *serial_number; char *manufacturer; char *product; }; #define USB_GADGET_COMPOSITE_OPTIONS() \ static struct usb_composite_overwrite coverwrite; \ \ module_param_named(idVendor, coverwrite.idVendor, ushort, S_IRUGO); \ MODULE_PARM_DESC(idVendor, "USB Vendor ID"); \ \ module_param_named(idProduct, coverwrite.idProduct, ushort, S_IRUGO); \ MODULE_PARM_DESC(idProduct, "USB Product ID"); \ \ module_param_named(bcdDevice, coverwrite.bcdDevice, ushort, S_IRUGO); \ MODULE_PARM_DESC(bcdDevice, "USB Device version (BCD)"); \ \ module_param_named(iSerialNumber, coverwrite.serial_number, charp, \ S_IRUGO); \ MODULE_PARM_DESC(iSerialNumber, "SerialNumber string"); \ \ module_param_named(iManufacturer, coverwrite.manufacturer, charp, \ S_IRUGO); \ MODULE_PARM_DESC(iManufacturer, "USB Manufacturer string"); \ \ module_param_named(iProduct, coverwrite.product, charp, S_IRUGO); \ MODULE_PARM_DESC(iProduct, "USB Product string") void usb_composite_overwrite_options(struct usb_composite_dev *cdev, struct usb_composite_overwrite *covr); static inline u16 get_default_bcdDevice(void) { u16 bcdDevice; bcdDevice = bin2bcd(LINUX_VERSION_MAJOR) << 8; bcdDevice |= bin2bcd(LINUX_VERSION_PATCHLEVEL); return bcdDevice; } struct usb_function_driver { const char *name; struct module *mod; struct list_head list; struct usb_function_instance *(*alloc_inst)(void); struct usb_function *(*alloc_func)(struct usb_function_instance *inst); }; struct usb_function_instance { struct config_group group; struct list_head cfs_list; struct usb_function_driver *fd; int (*set_inst_name)(struct usb_function_instance *inst, const char *name); void (*free_func_inst)(struct usb_function_instance *inst); }; void usb_function_unregister(struct usb_function_driver *f); int usb_function_register(struct usb_function_driver *newf); void usb_put_function_instance(struct usb_function_instance *fi); void usb_put_function(struct usb_function *f); struct usb_function_instance *usb_get_function_instance(const char *name); struct usb_function *usb_get_function(struct usb_function_instance *fi); struct usb_configuration *usb_get_config(struct usb_composite_dev *cdev, int val); int usb_add_config_only(struct usb_composite_dev *cdev, struct usb_configuration *config); void usb_remove_function(struct usb_configuration *c, struct usb_function *f); #define DECLARE_USB_FUNCTION(_name, _inst_alloc, _func_alloc) \ static struct usb_function_driver _name ## usb_func = { \ .name = __stringify(_name), \ .mod = THIS_MODULE, \ .alloc_inst = _inst_alloc, \ .alloc_func = _func_alloc, \ }; \ MODULE_ALIAS("usbfunc:"__stringify(_name)); #define DECLARE_USB_FUNCTION_INIT(_name, _inst_alloc, _func_alloc) \ DECLARE_USB_FUNCTION(_name, _inst_alloc, _func_alloc) \ static int __init _name ## mod_init(void) \ { \ return usb_function_register(&_name ## usb_func); \ } \ static void __exit _name ## mod_exit(void) \ { \ usb_function_unregister(&_name ## usb_func); \ } \ module_init(_name ## mod_init); \ module_exit(_name ## mod_exit) /* messaging utils */ #define DBG(d, fmt, args...) \ dev_dbg(&(d)->gadget->dev , fmt , ## args) #define VDBG(d, fmt, args...) \ dev_vdbg(&(d)->gadget->dev , fmt , ## args) #define ERROR(d, fmt, args...) \ dev_err(&(d)->gadget->dev , fmt , ## args) #define WARNING(d, fmt, args...) \ dev_warn(&(d)->gadget->dev , fmt , ## args) #define INFO(d, fmt, args...) \ dev_info(&(d)->gadget->dev , fmt , ## args) #endif /* __LINUX_USB_COMPOSITE_H */ PK ! '�w� � usb/gadget_configfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __GADGET_CONFIGFS__ #define __GADGET_CONFIGFS__ #include <linux/configfs.h> int check_user_usb_string(const char *name, struct usb_gadget_strings *stringtab_dev); #define GS_STRINGS_W(__struct, __name) \ static ssize_t __struct##_##__name##_store(struct config_item *item, \ const char *page, size_t len) \ { \ struct __struct *gs = to_##__struct(item); \ int ret; \ \ ret = usb_string_copy(page, &gs->__name); \ if (ret) \ return ret; \ return len; \ } #define GS_STRINGS_R(__struct, __name) \ static ssize_t __struct##_##__name##_show(struct config_item *item, char *page) \ { \ struct __struct *gs = to_##__struct(item); \ return sprintf(page, "%s\n", gs->__name ?: ""); \ } #define GS_STRINGS_RW(struct_name, _name) \ GS_STRINGS_R(struct_name, _name) \ GS_STRINGS_W(struct_name, _name) \ CONFIGFS_ATTR(struct_name##_, _name) #define USB_CONFIG_STRING_RW_OPS(struct_in) \ static struct configfs_item_operations struct_in##_langid_item_ops = { \ .release = struct_in##_attr_release, \ }; \ \ static struct config_item_type struct_in##_langid_type = { \ .ct_item_ops = &struct_in##_langid_item_ops, \ .ct_attrs = struct_in##_langid_attrs, \ .ct_owner = THIS_MODULE, \ } #define USB_CONFIG_STRINGS_LANG(struct_in, struct_member) \ static struct config_group *struct_in##_strings_make( \ struct config_group *group, \ const char *name) \ { \ struct struct_member *gi; \ struct struct_in *gs; \ struct struct_in *new; \ int langs = 0; \ int ret; \ \ new = kzalloc(sizeof(*new), GFP_KERNEL); \ if (!new) \ return ERR_PTR(-ENOMEM); \ \ ret = check_user_usb_string(name, &new->stringtab_dev); \ if (ret) \ goto err; \ config_group_init_type_name(&new->group, name, \ &struct_in##_langid_type); \ \ gi = container_of(group, struct struct_member, strings_group); \ ret = -EEXIST; \ list_for_each_entry(gs, &gi->string_list, list) { \ if (gs->stringtab_dev.language == new->stringtab_dev.language) \ goto err; \ langs++; \ } \ ret = -EOVERFLOW; \ if (langs >= MAX_USB_STRING_LANGS) \ goto err; \ \ list_add_tail(&new->list, &gi->string_list); \ return &new->group; \ err: \ kfree(new); \ return ERR_PTR(ret); \ } \ \ static void struct_in##_strings_drop( \ struct config_group *group, \ struct config_item *item) \ { \ config_item_put(item); \ } \ \ static struct configfs_group_operations struct_in##_strings_ops = { \ .make_group = &struct_in##_strings_make, \ .drop_item = &struct_in##_strings_drop, \ }; \ \ static struct config_item_type struct_in##_strings_type = { \ .ct_group_ops = &struct_in##_strings_ops, \ .ct_owner = THIS_MODULE, \ } #endif PK ! B��| usb/irda.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * USB IrDA Bridge Device Definition */ #ifndef __LINUX_USB_IRDA_H #define __LINUX_USB_IRDA_H /* This device should use Application-specific class */ #define USB_SUBCLASS_IRDA 0x02 /*-------------------------------------------------------------------------*/ /* Class-Specific requests (bRequest field) */ #define USB_REQ_CS_IRDA_RECEIVING 1 #define USB_REQ_CS_IRDA_CHECK_MEDIA_BUSY 3 #define USB_REQ_CS_IRDA_RATE_SNIFF 4 #define USB_REQ_CS_IRDA_UNICAST_LIST 5 #define USB_REQ_CS_IRDA_GET_CLASS_DESC 6 /*-------------------------------------------------------------------------*/ /* Class-Specific descriptor */ #define USB_DT_CS_IRDA 0x21 /*-------------------------------------------------------------------------*/ /* Data sizes */ #define USB_IRDA_DS_2048 (1 << 5) #define USB_IRDA_DS_1024 (1 << 4) #define USB_IRDA_DS_512 (1 << 3) #define USB_IRDA_DS_256 (1 << 2) #define USB_IRDA_DS_128 (1 << 1) #define USB_IRDA_DS_64 (1 << 0) /* Window sizes */ #define USB_IRDA_WS_7 (1 << 6) #define USB_IRDA_WS_6 (1 << 5) #define USB_IRDA_WS_5 (1 << 4) #define USB_IRDA_WS_4 (1 << 3) #define USB_IRDA_WS_3 (1 << 2) #define USB_IRDA_WS_2 (1 << 1) #define USB_IRDA_WS_1 (1 << 0) /* Min turnaround times in usecs */ #define USB_IRDA_MTT_0 (1 << 7) #define USB_IRDA_MTT_10 (1 << 6) #define USB_IRDA_MTT_50 (1 << 5) #define USB_IRDA_MTT_100 (1 << 4) #define USB_IRDA_MTT_500 (1 << 3) #define USB_IRDA_MTT_1000 (1 << 2) #define USB_IRDA_MTT_5000 (1 << 1) #define USB_IRDA_MTT_10000 (1 << 0) /* Baud rates */ #define USB_IRDA_BR_4000000 (1 << 8) #define USB_IRDA_BR_1152000 (1 << 7) #define USB_IRDA_BR_576000 (1 << 6) #define USB_IRDA_BR_115200 (1 << 5) #define USB_IRDA_BR_57600 (1 << 4) #define USB_IRDA_BR_38400 (1 << 3) #define USB_IRDA_BR_19200 (1 << 2) #define USB_IRDA_BR_9600 (1 << 1) #define USB_IRDA_BR_2400 (1 << 0) /* Additional BOFs */ #define USB_IRDA_AB_0 (1 << 7) #define USB_IRDA_AB_1 (1 << 6) #define USB_IRDA_AB_2 (1 << 5) #define USB_IRDA_AB_3 (1 << 4) #define USB_IRDA_AB_6 (1 << 3) #define USB_IRDA_AB_12 (1 << 2) #define USB_IRDA_AB_24 (1 << 1) #define USB_IRDA_AB_48 (1 << 0) /* IRDA Rate Sniff */ #define USB_IRDA_RATE_SNIFF 1 /*-------------------------------------------------------------------------*/ struct usb_irda_cs_descriptor { __u8 bLength; __u8 bDescriptorType; __le16 bcdSpecRevision; __u8 bmDataSize; __u8 bmWindowSize; __u8 bmMinTurnaroundTime; __le16 wBaudRate; __u8 bmAdditionalBOFs; __u8 bIrdaRateSniff; __u8 bMaxUnicastList; } __attribute__ ((packed)); /*-------------------------------------------------------------------------*/ /* Data Format */ #define USB_IRDA_STATUS_MEDIA_BUSY (1 << 7) /* The following is a 4-bit value used for both * inbound and outbound headers: * * 0 - speed ignored * 1 - 2400 bps * 2 - 9600 bps * 3 - 19200 bps * 4 - 38400 bps * 5 - 57600 bps * 6 - 115200 bps * 7 - 576000 bps * 8 - 1.152 Mbps * 9 - 4 Mbps * 10..15 - Reserved */ #define USB_IRDA_STATUS_LINK_SPEED 0x0f #define USB_IRDA_LS_NO_CHANGE 0 #define USB_IRDA_LS_2400 1 #define USB_IRDA_LS_9600 2 #define USB_IRDA_LS_19200 3 #define USB_IRDA_LS_38400 4 #define USB_IRDA_LS_57600 5 #define USB_IRDA_LS_115200 6 #define USB_IRDA_LS_576000 7 #define USB_IRDA_LS_1152000 8 #define USB_IRDA_LS_4000000 9 /* The following is a 4-bit value used only for * outbound header: * * 0 - No change (BOF ignored) * 1 - 48 BOFs * 2 - 24 BOFs * 3 - 12 BOFs * 4 - 6 BOFs * 5 - 3 BOFs * 6 - 2 BOFs * 7 - 1 BOFs * 8 - 0 BOFs * 9..15 - Reserved */ #define USB_IRDA_EXTRA_BOFS 0xf0 struct usb_irda_inbound_header { __u8 bmStatus; }; struct usb_irda_outbound_header { __u8 bmChange; }; #endif /* __LINUX_USB_IRDA_H */ PK ! J���D �D usb/serial.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * USB Serial Converter stuff * * Copyright (C) 1999 - 2012 * Greg Kroah-Hartman (greg@kroah.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * */ #ifndef __LINUX_USB_SERIAL_H #define __LINUX_USB_SERIAL_H #include <linux/kref.h> #include <linux/mutex.h> #include <linux/serial.h> #include <linux/kfifo.h> /* The maximum number of ports one device can grab at once */ #define MAX_NUM_PORTS 16 /* USB serial flags */ #define USB_SERIAL_WRITE_BUSY 0 #define USB_SERIAL_THROTTLED 1 /** * usb_serial_port: structure for the specific ports of a device. * @serial: pointer back to the struct usb_serial owner of this port. * @port: pointer to the corresponding tty_port for this port. * @lock: spinlock to grab when updating portions of this structure. * @minor: the minor number of the port * @port_number: the struct usb_serial port number of this port (starts at 0) * @interrupt_in_buffer: pointer to the interrupt in buffer for this port. * @interrupt_in_urb: pointer to the interrupt in struct urb for this port. * @interrupt_in_endpointAddress: endpoint address for the interrupt in pipe * for this port. * @interrupt_out_buffer: pointer to the interrupt out buffer for this port. * @interrupt_out_size: the size of the interrupt_out_buffer, in bytes. * @interrupt_out_urb: pointer to the interrupt out struct urb for this port. * @interrupt_out_endpointAddress: endpoint address for the interrupt out pipe * for this port. * @bulk_in_buffer: pointer to the bulk in buffer for this port. * @bulk_in_size: the size of the bulk_in_buffer, in bytes. * @read_urb: pointer to the bulk in struct urb for this port. * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this * port. * @bulk_in_buffers: pointers to the bulk in buffers for this port * @read_urbs: pointers to the bulk in urbs for this port * @read_urbs_free: status bitmap the for bulk in urbs * @bulk_out_buffer: pointer to the bulk out buffer for this port. * @bulk_out_size: the size of the bulk_out_buffer, in bytes. * @write_urb: pointer to the bulk out struct urb for this port. * @write_fifo: kfifo used to buffer outgoing data * @bulk_out_buffers: pointers to the bulk out buffers for this port * @write_urbs: pointers to the bulk out urbs for this port * @write_urbs_free: status bitmap the for bulk out urbs * @icount: interrupt counters * @tx_bytes: number of bytes currently in host stack queues * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this * port. * @flags: usb serial port flags * @work: work queue entry for the line discipline waking up. * @dev: pointer to the serial device * * This structure is used by the usb-serial core and drivers for the specific * ports of a device. */ struct usb_serial_port { struct usb_serial *serial; struct tty_port port; spinlock_t lock; u32 minor; u8 port_number; unsigned char *interrupt_in_buffer; struct urb *interrupt_in_urb; __u8 interrupt_in_endpointAddress; unsigned char *interrupt_out_buffer; int interrupt_out_size; struct urb *interrupt_out_urb; __u8 interrupt_out_endpointAddress; unsigned char *bulk_in_buffer; int bulk_in_size; struct urb *read_urb; __u8 bulk_in_endpointAddress; unsigned char *bulk_in_buffers[2]; struct urb *read_urbs[2]; unsigned long read_urbs_free; unsigned char *bulk_out_buffer; int bulk_out_size; struct urb *write_urb; struct kfifo write_fifo; unsigned char *bulk_out_buffers[2]; struct urb *write_urbs[2]; unsigned long write_urbs_free; __u8 bulk_out_endpointAddress; struct async_icount icount; int tx_bytes; unsigned long flags; struct work_struct work; unsigned long sysrq; /* sysrq timeout */ struct device dev; }; #define to_usb_serial_port(d) container_of(d, struct usb_serial_port, dev) /* get and set the port private data pointer helper functions */ static inline void *usb_get_serial_port_data(struct usb_serial_port *port) { return dev_get_drvdata(&port->dev); } static inline void usb_set_serial_port_data(struct usb_serial_port *port, void *data) { dev_set_drvdata(&port->dev, data); } /** * usb_serial - structure used by the usb-serial core for a device * @dev: pointer to the struct usb_device for this device * @type: pointer to the struct usb_serial_driver for this device * @interface: pointer to the struct usb_interface for this device * @sibling: pointer to the struct usb_interface of any sibling interface * @suspend_count: number of suspended (sibling) interfaces * @num_ports: the number of ports this device has * @num_interrupt_in: number of interrupt in endpoints we have * @num_interrupt_out: number of interrupt out endpoints we have * @num_bulk_in: number of bulk in endpoints we have * @num_bulk_out: number of bulk out endpoints we have * @port: array of struct usb_serial_port structures for the different ports. * @private: place to put any driver specific information that is needed. The * usb-serial driver is required to manage this data, the usb-serial core * will not touch this. Use usb_get_serial_data() and * usb_set_serial_data() to access this. */ struct usb_serial { struct usb_device *dev; struct usb_serial_driver *type; struct usb_interface *interface; struct usb_interface *sibling; unsigned int suspend_count; unsigned char disconnected:1; unsigned char attached:1; unsigned char minors_reserved:1; unsigned char num_ports; unsigned char num_port_pointers; unsigned char num_interrupt_in; unsigned char num_interrupt_out; unsigned char num_bulk_in; unsigned char num_bulk_out; struct usb_serial_port *port[MAX_NUM_PORTS]; struct kref kref; struct mutex disc_mutex; void *private; }; #define to_usb_serial(d) container_of(d, struct usb_serial, kref) /* get and set the serial private data pointer helper functions */ static inline void *usb_get_serial_data(struct usb_serial *serial) { return serial->private; } static inline void usb_set_serial_data(struct usb_serial *serial, void *data) { serial->private = data; } struct usb_serial_endpoints { unsigned char num_bulk_in; unsigned char num_bulk_out; unsigned char num_interrupt_in; unsigned char num_interrupt_out; struct usb_endpoint_descriptor *bulk_in[MAX_NUM_PORTS]; struct usb_endpoint_descriptor *bulk_out[MAX_NUM_PORTS]; struct usb_endpoint_descriptor *interrupt_in[MAX_NUM_PORTS]; struct usb_endpoint_descriptor *interrupt_out[MAX_NUM_PORTS]; }; /** * usb_serial_driver - describes a usb serial driver * @description: pointer to a string that describes this driver. This string * used in the syslog messages when a device is inserted or removed. * @id_table: pointer to a list of usb_device_id structures that define all * of the devices this structure can support. * @num_ports: the number of different ports this device will have. * @num_bulk_in: minimum number of bulk-in endpoints * @num_bulk_out: minimum number of bulk-out endpoints * @num_interrupt_in: minimum number of interrupt-in endpoints * @num_interrupt_out: minimum number of interrupt-out endpoints * @bulk_in_size: minimum number of bytes to allocate for bulk-in buffer * (0 = end-point size) * @bulk_out_size: bytes to allocate for bulk-out buffer (0 = end-point size) * @calc_num_ports: pointer to a function to determine how many ports this * device has dynamically. It can also be used to verify the number of * endpoints or to modify the port-endpoint mapping. It will be called * after the probe() callback is called, but before attach(). * @probe: pointer to the driver's probe function. * This will be called when the device is inserted into the system, * but before the device has been fully initialized by the usb_serial * subsystem. Use this function to download any firmware to the device, * or any other early initialization that might be needed. * Return 0 to continue on with the initialization sequence. Anything * else will abort it. * @attach: pointer to the driver's attach function. * This will be called when the struct usb_serial structure is fully * set up. Do any local initialization of the device, or any private * memory structure allocation at this point in time. * @disconnect: pointer to the driver's disconnect function. This will be * called when the device is unplugged or unbound from the driver. * @release: pointer to the driver's release function. This will be called * when the usb_serial data structure is about to be destroyed. * @usb_driver: pointer to the struct usb_driver that controls this * device. This is necessary to allow dynamic ids to be added to * the driver from sysfs. * * This structure is defines a USB Serial driver. It provides all of * the information that the USB serial core code needs. If the function * pointers are defined, then the USB serial core code will call them when * the corresponding tty port functions are called. If they are not * called, the generic serial function will be used instead. * * The driver.owner field should be set to the module owner of this driver. * The driver.name field should be set to the name of this driver (remember * it will show up in sysfs, so it needs to be short and to the point. * Using the module name is a good idea.) */ struct usb_serial_driver { const char *description; const struct usb_device_id *id_table; struct list_head driver_list; struct device_driver driver; struct usb_driver *usb_driver; struct usb_dynids dynids; unsigned char num_ports; unsigned char num_bulk_in; unsigned char num_bulk_out; unsigned char num_interrupt_in; unsigned char num_interrupt_out; size_t bulk_in_size; size_t bulk_out_size; int (*probe)(struct usb_serial *serial, const struct usb_device_id *id); int (*attach)(struct usb_serial *serial); int (*calc_num_ports)(struct usb_serial *serial, struct usb_serial_endpoints *epds); void (*disconnect)(struct usb_serial *serial); void (*release)(struct usb_serial *serial); int (*port_probe)(struct usb_serial_port *port); void (*port_remove)(struct usb_serial_port *port); int (*suspend)(struct usb_serial *serial, pm_message_t message); int (*resume)(struct usb_serial *serial); int (*reset_resume)(struct usb_serial *serial); /* serial function calls */ /* Called by console and by the tty layer */ int (*open)(struct tty_struct *tty, struct usb_serial_port *port); void (*close)(struct usb_serial_port *port); int (*write)(struct tty_struct *tty, struct usb_serial_port *port, const unsigned char *buf, int count); /* Called only by the tty layer */ unsigned int (*write_room)(struct tty_struct *tty); int (*ioctl)(struct tty_struct *tty, unsigned int cmd, unsigned long arg); void (*get_serial)(struct tty_struct *tty, struct serial_struct *ss); int (*set_serial)(struct tty_struct *tty, struct serial_struct *ss); void (*set_termios)(struct tty_struct *tty, struct usb_serial_port *port, struct ktermios *old); void (*break_ctl)(struct tty_struct *tty, int break_state); unsigned int (*chars_in_buffer)(struct tty_struct *tty); void (*wait_until_sent)(struct tty_struct *tty, long timeout); bool (*tx_empty)(struct usb_serial_port *port); void (*throttle)(struct tty_struct *tty); void (*unthrottle)(struct tty_struct *tty); int (*tiocmget)(struct tty_struct *tty); int (*tiocmset)(struct tty_struct *tty, unsigned int set, unsigned int clear); int (*tiocmiwait)(struct tty_struct *tty, unsigned long arg); int (*get_icount)(struct tty_struct *tty, struct serial_icounter_struct *icount); /* Called by the tty layer for port level work. There may or may not be an attached tty at this point */ void (*dtr_rts)(struct usb_serial_port *port, int on); int (*carrier_raised)(struct usb_serial_port *port); /* Called by the usb serial hooks to allow the user to rework the termios state */ void (*init_termios)(struct tty_struct *tty); /* USB events */ void (*read_int_callback)(struct urb *urb); void (*write_int_callback)(struct urb *urb); void (*read_bulk_callback)(struct urb *urb); void (*write_bulk_callback)(struct urb *urb); /* Called by the generic read bulk callback */ void (*process_read_urb)(struct urb *urb); /* Called by the generic write implementation */ int (*prepare_write_buffer)(struct usb_serial_port *port, void *dest, size_t size); }; #define to_usb_serial_driver(d) \ container_of(d, struct usb_serial_driver, driver) int usb_serial_register_drivers(struct usb_serial_driver *const serial_drivers[], const char *name, const struct usb_device_id *id_table); void usb_serial_deregister_drivers(struct usb_serial_driver *const serial_drivers[]); void usb_serial_port_softint(struct usb_serial_port *port); int usb_serial_suspend(struct usb_interface *intf, pm_message_t message); int usb_serial_resume(struct usb_interface *intf); /* USB Serial console functions */ #ifdef CONFIG_USB_SERIAL_CONSOLE void usb_serial_console_init(int minor); void usb_serial_console_exit(void); void usb_serial_console_disconnect(struct usb_serial *serial); #else static inline void usb_serial_console_init(int minor) { } static inline void usb_serial_console_exit(void) { } static inline void usb_serial_console_disconnect(struct usb_serial *serial) {} #endif /* Functions needed by other parts of the usbserial core */ struct usb_serial_port *usb_serial_port_get_by_minor(unsigned int minor); void usb_serial_put(struct usb_serial *serial); int usb_serial_claim_interface(struct usb_serial *serial, struct usb_interface *intf); int usb_serial_generic_open(struct tty_struct *tty, struct usb_serial_port *port); int usb_serial_generic_write_start(struct usb_serial_port *port, gfp_t mem_flags); int usb_serial_generic_write(struct tty_struct *tty, struct usb_serial_port *port, const unsigned char *buf, int count); void usb_serial_generic_close(struct usb_serial_port *port); int usb_serial_generic_resume(struct usb_serial *serial); unsigned int usb_serial_generic_write_room(struct tty_struct *tty); unsigned int usb_serial_generic_chars_in_buffer(struct tty_struct *tty); void usb_serial_generic_wait_until_sent(struct tty_struct *tty, long timeout); void usb_serial_generic_read_bulk_callback(struct urb *urb); void usb_serial_generic_write_bulk_callback(struct urb *urb); void usb_serial_generic_throttle(struct tty_struct *tty); void usb_serial_generic_unthrottle(struct tty_struct *tty); int usb_serial_generic_tiocmiwait(struct tty_struct *tty, unsigned long arg); int usb_serial_generic_get_icount(struct tty_struct *tty, struct serial_icounter_struct *icount); int usb_serial_generic_register(void); void usb_serial_generic_deregister(void); int usb_serial_generic_submit_read_urbs(struct usb_serial_port *port, gfp_t mem_flags); void usb_serial_generic_process_read_urb(struct urb *urb); int usb_serial_generic_prepare_write_buffer(struct usb_serial_port *port, void *dest, size_t size); #if defined(CONFIG_USB_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) int usb_serial_handle_sysrq_char(struct usb_serial_port *port, unsigned int ch); int usb_serial_handle_break(struct usb_serial_port *port); #else static inline int usb_serial_handle_sysrq_char(struct usb_serial_port *port, unsigned int ch) { return 0; } static inline int usb_serial_handle_break(struct usb_serial_port *port) { return 0; } #endif void usb_serial_handle_dcd_change(struct usb_serial_port *usb_port, struct tty_struct *tty, unsigned int status); int usb_serial_bus_register(struct usb_serial_driver *device); void usb_serial_bus_deregister(struct usb_serial_driver *device); extern struct bus_type usb_serial_bus_type; extern struct tty_driver *usb_serial_tty_driver; static inline void usb_serial_debug_data(struct device *dev, const char *function, int size, const unsigned char *data) { dev_dbg(dev, "%s - length = %d, data = %*ph\n", function, size, size, data); } /* * Macro for reporting errors in write path to avoid infinite loop * when port is used as a console. */ #define dev_err_console(usport, fmt, ...) \ do { \ static bool __print_once; \ struct usb_serial_port *__port = (usport); \ \ if (!__port->port.console || !__print_once) { \ __print_once = true; \ dev_err(&__port->dev, fmt, ##__VA_ARGS__); \ } \ } while (0) /* * module_usb_serial_driver() - Helper macro for registering a USB Serial driver * @__serial_drivers: list of usb_serial drivers to register * @__ids: all device ids that @__serial_drivers bind to * * Helper macro for USB serial drivers which do not do anything special * in module init/exit. This eliminates a lot of boilerplate. Each * module may only use this macro once, and calling it replaces * module_init() and module_exit() * */ #define usb_serial_module_driver(__name, __serial_drivers, __ids) \ static int __init usb_serial_module_init(void) \ { \ return usb_serial_register_drivers(__serial_drivers, \ __name, __ids); \ } \ module_init(usb_serial_module_init); \ static void __exit usb_serial_module_exit(void) \ { \ usb_serial_deregister_drivers(__serial_drivers); \ } \ module_exit(usb_serial_module_exit); #define module_usb_serial_driver(__serial_drivers, __ids) \ usb_serial_module_driver(KBUILD_MODNAME, __serial_drivers, __ids) #endif /* __LINUX_USB_SERIAL_H */ PK ! ac%mI* I* usb/usbnet.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * USB Networking Link Interface * * Copyright (C) 2000-2005 by David Brownell <dbrownell@users.sourceforge.net> * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __LINUX_USB_USBNET_H #define __LINUX_USB_USBNET_H /* interface from usbnet core to each USB networking link we handle */ struct usbnet { /* housekeeping */ struct usb_device *udev; struct usb_interface *intf; const struct driver_info *driver_info; const char *driver_name; void *driver_priv; wait_queue_head_t wait; struct mutex phy_mutex; unsigned char suspend_count; unsigned char pkt_cnt, pkt_err; unsigned short rx_qlen, tx_qlen; unsigned can_dma_sg:1; /* i/o info: pipes etc */ unsigned in, out; struct usb_host_endpoint *status; unsigned maxpacket; struct timer_list delay; const char *padding_pkt; /* protocol/interface state */ struct net_device *net; int msg_enable; unsigned long data[5]; u32 xid; u32 hard_mtu; /* count any extra framing */ size_t rx_urb_size; /* size for rx urbs */ struct mii_if_info mii; long rx_speed; /* If MII not used */ long tx_speed; /* If MII not used */ # define SPEED_UNSET -1 /* various kinds of pending driver work */ struct sk_buff_head rxq; struct sk_buff_head txq; struct sk_buff_head done; struct sk_buff_head rxq_pause; struct urb *interrupt; unsigned interrupt_count; struct mutex interrupt_mutex; struct usb_anchor deferred; struct tasklet_struct bh; struct work_struct kevent; unsigned long flags; # define EVENT_TX_HALT 0 # define EVENT_RX_HALT 1 # define EVENT_RX_MEMORY 2 # define EVENT_STS_SPLIT 3 # define EVENT_LINK_RESET 4 # define EVENT_RX_PAUSED 5 # define EVENT_DEV_ASLEEP 6 # define EVENT_DEV_OPEN 7 # define EVENT_DEVICE_REPORT_IDLE 8 # define EVENT_NO_RUNTIME_PM 9 # define EVENT_RX_KILL 10 # define EVENT_LINK_CHANGE 11 # define EVENT_SET_RX_MODE 12 # define EVENT_NO_IP_ALIGN 13 # define EVENT_LINK_CARRIER_ON 14 /* This one is special, as it indicates that the device is going away * there are cyclic dependencies between tasklet, timer and bh * that must be broken */ # define EVENT_UNPLUG 31 }; static inline bool usbnet_going_away(struct usbnet *ubn) { return test_bit(EVENT_UNPLUG, &ubn->flags); } static inline void usbnet_mark_going_away(struct usbnet *ubn) { set_bit(EVENT_UNPLUG, &ubn->flags); } static inline struct usb_driver *driver_of(struct usb_interface *intf) { return to_usb_driver(intf->dev.driver); } /* interface from the device/framing level "minidriver" to core */ struct driver_info { char *description; int flags; /* framing is CDC Ethernet, not writing ZLPs (hw issues), or optionally: */ #define FLAG_FRAMING_NC 0x0001 /* guard against device dropouts */ #define FLAG_FRAMING_GL 0x0002 /* genelink batches packets */ #define FLAG_FRAMING_Z 0x0004 /* zaurus adds a trailer */ #define FLAG_FRAMING_RN 0x0008 /* RNDIS batches, plus huge header */ #define FLAG_NO_SETINT 0x0010 /* device can't set_interface() */ #define FLAG_ETHER 0x0020 /* maybe use "eth%d" names */ #define FLAG_FRAMING_AX 0x0040 /* AX88772/178 packets */ #define FLAG_WLAN 0x0080 /* use "wlan%d" names */ #define FLAG_AVOID_UNLINK_URBS 0x0100 /* don't unlink urbs at usbnet_stop() */ #define FLAG_SEND_ZLP 0x0200 /* hw requires ZLPs are sent */ #define FLAG_WWAN 0x0400 /* use "wwan%d" names */ #define FLAG_LINK_INTR 0x0800 /* updates link (carrier) status */ #define FLAG_POINTTOPOINT 0x1000 /* possibly use "usb%d" names */ /* * Indicates to usbnet, that USB driver accumulates multiple IP packets. * Affects statistic (counters) and short packet handling. */ #define FLAG_MULTI_PACKET 0x2000 #define FLAG_RX_ASSEMBLE 0x4000 /* rx packets may span >1 frames */ #define FLAG_NOARP 0x8000 /* device can't do ARP */ /* init device ... can sleep, or cause probe() failure */ int (*bind)(struct usbnet *, struct usb_interface *); /* cleanup device ... can sleep, but can't fail */ void (*unbind)(struct usbnet *, struct usb_interface *); /* reset device ... can sleep */ int (*reset)(struct usbnet *); /* stop device ... can sleep */ int (*stop)(struct usbnet *); /* see if peer is connected ... can sleep */ int (*check_connect)(struct usbnet *); /* (dis)activate runtime power management */ int (*manage_power)(struct usbnet *, int); /* for status polling */ void (*status)(struct usbnet *, struct urb *); /* link reset handling, called from defer_kevent */ int (*link_reset)(struct usbnet *); /* fixup rx packet (strip framing) */ int (*rx_fixup)(struct usbnet *dev, struct sk_buff *skb); /* fixup tx packet (add framing) */ struct sk_buff *(*tx_fixup)(struct usbnet *dev, struct sk_buff *skb, gfp_t flags); /* recover from timeout */ void (*recover)(struct usbnet *dev); /* early initialization code, can sleep. This is for minidrivers * having 'subminidrivers' that need to do extra initialization * right after minidriver have initialized hardware. */ int (*early_init)(struct usbnet *dev); /* called by minidriver when receiving indication */ void (*indication)(struct usbnet *dev, void *ind, int indlen); /* rx mode change (device changes address list filtering) */ void (*set_rx_mode)(struct usbnet *dev); /* for new devices, use the descriptor-reading code instead */ int in; /* rx endpoint */ int out; /* tx endpoint */ unsigned long data; /* Misc driver specific data */ }; /* Minidrivers are just drivers using the "usbnet" core as a powerful * network-specific subroutine library ... that happens to do pretty * much everything except custom framing and chip-specific stuff. */ extern int usbnet_probe(struct usb_interface *, const struct usb_device_id *); extern int usbnet_suspend(struct usb_interface *, pm_message_t); extern int usbnet_resume(struct usb_interface *); extern void usbnet_disconnect(struct usb_interface *); extern void usbnet_device_suggests_idle(struct usbnet *dev); extern int usbnet_read_cmd(struct usbnet *dev, u8 cmd, u8 reqtype, u16 value, u16 index, void *data, u16 size); extern int usbnet_write_cmd(struct usbnet *dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void *data, u16 size); extern int usbnet_read_cmd_nopm(struct usbnet *dev, u8 cmd, u8 reqtype, u16 value, u16 index, void *data, u16 size); extern int usbnet_write_cmd_nopm(struct usbnet *dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void *data, u16 size); extern int usbnet_write_cmd_async(struct usbnet *dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void *data, u16 size); /* Drivers that reuse some of the standard USB CDC infrastructure * (notably, using multiple interfaces according to the CDC * union descriptor) get some helper code. */ struct cdc_state { struct usb_cdc_header_desc *header; struct usb_cdc_union_desc *u; struct usb_cdc_ether_desc *ether; struct usb_interface *control; struct usb_interface *data; }; extern void usbnet_cdc_update_filter(struct usbnet *dev); extern int usbnet_generic_cdc_bind(struct usbnet *, struct usb_interface *); extern int usbnet_ether_cdc_bind(struct usbnet *dev, struct usb_interface *intf); extern int usbnet_cdc_bind(struct usbnet *, struct usb_interface *); extern void usbnet_cdc_unbind(struct usbnet *, struct usb_interface *); extern void usbnet_cdc_status(struct usbnet *, struct urb *); /* CDC and RNDIS support the same host-chosen packet filters for IN transfers */ #define DEFAULT_FILTER (USB_CDC_PACKET_TYPE_BROADCAST \ |USB_CDC_PACKET_TYPE_ALL_MULTICAST \ |USB_CDC_PACKET_TYPE_PROMISCUOUS \ |USB_CDC_PACKET_TYPE_DIRECTED) /* we record the state for each of our queued skbs */ enum skb_state { illegal = 0, tx_start, tx_done, rx_start, rx_done, rx_cleanup, unlink_start }; struct skb_data { /* skb->cb is one of these */ struct urb *urb; struct usbnet *dev; enum skb_state state; long length; unsigned long packets; }; /* Drivers that set FLAG_MULTI_PACKET must call this in their * tx_fixup method before returning an skb. */ static inline void usbnet_set_skb_tx_stats(struct sk_buff *skb, unsigned long packets, long bytes_delta) { struct skb_data *entry = (struct skb_data *) skb->cb; entry->packets = packets; entry->length = bytes_delta; } extern int usbnet_open(struct net_device *net); extern int usbnet_stop(struct net_device *net); extern netdev_tx_t usbnet_start_xmit(struct sk_buff *skb, struct net_device *net); extern void usbnet_tx_timeout(struct net_device *net, unsigned int txqueue); extern int usbnet_change_mtu(struct net_device *net, int new_mtu); extern int usbnet_get_endpoints(struct usbnet *, struct usb_interface *); extern int usbnet_get_ethernet_addr(struct usbnet *, int); extern void usbnet_defer_kevent(struct usbnet *, int); extern void usbnet_skb_return(struct usbnet *, struct sk_buff *); extern void usbnet_unlink_rx_urbs(struct usbnet *); extern void usbnet_pause_rx(struct usbnet *); extern void usbnet_resume_rx(struct usbnet *); extern void usbnet_purge_paused_rxq(struct usbnet *); extern int usbnet_get_link_ksettings_mii(struct net_device *net, struct ethtool_link_ksettings *cmd); extern int usbnet_set_link_ksettings_mii(struct net_device *net, const struct ethtool_link_ksettings *cmd); extern int usbnet_get_link_ksettings_internal(struct net_device *net, struct ethtool_link_ksettings *cmd); extern u32 usbnet_get_link(struct net_device *net); extern u32 usbnet_get_msglevel(struct net_device *); extern void usbnet_set_msglevel(struct net_device *, u32); extern void usbnet_set_rx_mode(struct net_device *net); extern void usbnet_get_drvinfo(struct net_device *, struct ethtool_drvinfo *); extern int usbnet_nway_reset(struct net_device *net); extern int usbnet_manage_power(struct usbnet *, int); extern void usbnet_link_change(struct usbnet *, bool, bool); extern int usbnet_status_start(struct usbnet *dev, gfp_t mem_flags); extern void usbnet_status_stop(struct usbnet *dev); extern void usbnet_update_max_qlen(struct usbnet *dev); #endif /* __LINUX_USB_USBNET_H */ PK ! �z�& & usb/ch9.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This file holds USB constants and structures that are needed for * USB device APIs. These are used by the USB device model, which is * defined in chapter 9 of the USB 2.0 specification and in the * Wireless USB 1.0 (spread around). Linux has several APIs in C that * need these: * * - the host side Linux-USB kernel driver API; * - the "usbfs" user space API; and * - the Linux "gadget" device/peripheral side driver API. * * USB 2.0 adds an additional "On The Go" (OTG) mode, which lets systems * act either as a USB host or as a USB device. That means the host and * device side APIs benefit from working well together. * * There's also "Wireless USB", using low power short range radios for * peripheral interconnection but otherwise building on the USB framework. * * Note all descriptors are declared '__attribute__((packed))' so that: * * [a] they never get padded, either internally (USB spec writers * probably handled that) or externally; * * [b] so that accessing bigger-than-a-bytes fields will never * generate bus errors on any platform, even when the location of * its descriptor inside a bundle isn't "naturally aligned", and * * [c] for consistency, removing all doubt even when it appears to * someone that the two other points are non-issues for that * particular descriptor type. */ #ifndef __LINUX_USB_CH9_H #define __LINUX_USB_CH9_H #include <linux/device.h> #include <uapi/linux/usb/ch9.h> /* USB 3.2 SuperSpeed Plus phy signaling rate generation and lane count */ enum usb_ssp_rate { USB_SSP_GEN_UNKNOWN = 0, USB_SSP_GEN_2x1, USB_SSP_GEN_1x2, USB_SSP_GEN_2x2, }; extern const char *usb_ep_type_string(int ep_type); extern const char *usb_speed_string(enum usb_device_speed speed); extern enum usb_device_speed usb_get_maximum_speed(struct device *dev); extern enum usb_ssp_rate usb_get_maximum_ssp_rate(struct device *dev); extern const char *usb_state_string(enum usb_device_state state); unsigned int usb_decode_interval(const struct usb_endpoint_descriptor *epd, enum usb_device_speed speed); #ifdef CONFIG_TRACING extern const char *usb_decode_ctrl(char *str, size_t size, __u8 bRequestType, __u8 bRequest, __u16 wValue, __u16 wIndex, __u16 wLength); #endif #endif /* __LINUX_USB_CH9_H */ PK ! �� � usb/tegra_usb_phy.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2010 Google, Inc. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #ifndef __TEGRA_USB_PHY_H #define __TEGRA_USB_PHY_H #include <linux/clk.h> #include <linux/gpio.h> #include <linux/reset.h> #include <linux/usb/otg.h> /* * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers * should be set up by clk-tegra, false if by the PHY code * has_hostpc: true if the USB controller has the HOSTPC extension, which * changes the location of the PHCD and PTS fields * requires_usbmode_setup: true if the USBMODE register needs to be set to * enter host mode * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level * and hsdiscon_level should be set for adequate signal quality */ struct tegra_phy_soc_config { bool utmi_pll_config_in_car_module; bool has_hostpc; bool requires_usbmode_setup; bool requires_extra_tuning_parameters; }; struct tegra_utmip_config { u8 hssync_start_delay; u8 elastic_limit; u8 idle_wait_delay; u8 term_range_adj; bool xcvr_setup_use_fuses; u8 xcvr_setup; u8 xcvr_lsfslew; u8 xcvr_lsrslew; u8 xcvr_hsslew; u8 hssquelch_level; u8 hsdiscon_level; }; enum tegra_usb_phy_port_speed { TEGRA_USB_PHY_PORT_SPEED_FULL = 0, TEGRA_USB_PHY_PORT_SPEED_LOW, TEGRA_USB_PHY_PORT_SPEED_HIGH, }; struct tegra_xtal_freq; struct tegra_usb_phy { int instance; const struct tegra_xtal_freq *freq; void __iomem *regs; void __iomem *pad_regs; struct clk *clk; struct clk *pll_u; struct clk *pad_clk; struct regulator *vbus; enum usb_dr_mode mode; void *config; const struct tegra_phy_soc_config *soc_config; struct usb_phy *ulpi; struct usb_phy u_phy; bool is_legacy_phy; bool is_ulpi_phy; struct gpio_desc *reset_gpio; struct reset_control *pad_rst; bool wakeup_enabled; bool pad_wakeup; bool powered_on; }; void tegra_usb_phy_preresume(struct usb_phy *phy); void tegra_usb_phy_postresume(struct usb_phy *phy); void tegra_ehci_phy_restore_start(struct usb_phy *phy, enum tegra_usb_phy_port_speed port_speed); void tegra_ehci_phy_restore_end(struct usb_phy *phy); #endif /* __TEGRA_USB_PHY_H */ PK ! 1�� � usb/renesas_usbhs.hnu �[��� // SPDX-License-Identifier: GPL-1.0+ /* * Renesas USB * * Copyright (C) 2011 Renesas Solutions Corp. * Copyright (C) 2019 Renesas Electronics Corporation * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ #ifndef RENESAS_USB_H #define RENESAS_USB_H #include <linux/notifier.h> #include <linux/platform_device.h> #include <linux/usb/ch9.h> /* * module type * * it will be return value from get_id */ enum { USBHS_HOST = 0, USBHS_GADGET, USBHS_MAX, }; /* * callback functions for platform * * These functions are called from driver for platform */ struct renesas_usbhs_platform_callback { /* * option: * * Hardware init function for platform. * it is called when driver was probed. */ int (*hardware_init)(struct platform_device *pdev); /* * option: * * Hardware exit function for platform. * it is called when driver was removed */ int (*hardware_exit)(struct platform_device *pdev); /* * option: * * for board specific clock control */ int (*power_ctrl)(struct platform_device *pdev, void __iomem *base, int enable); /* * option: * * Phy reset for platform */ int (*phy_reset)(struct platform_device *pdev); /* * get USB ID function * - USBHS_HOST * - USBHS_GADGET */ int (*get_id)(struct platform_device *pdev); /* * get VBUS status function. */ int (*get_vbus)(struct platform_device *pdev); /* * option: * * VBUS control is needed for Host */ int (*set_vbus)(struct platform_device *pdev, int enable); /* * option: * extcon notifier to set host/peripheral mode. */ int (*notifier)(struct notifier_block *nb, unsigned long event, void *data); }; /* * parameters for renesas usbhs * * some register needs USB chip specific parameters. * This struct show it to driver */ struct renesas_usbhs_driver_pipe_config { u8 type; /* USB_ENDPOINT_XFER_xxx */ u16 bufsize; u8 bufnum; bool double_buf; }; #define RENESAS_USBHS_PIPE(_type, _size, _num, _double_buf) { \ .type = (_type), \ .bufsize = (_size), \ .bufnum = (_num), \ .double_buf = (_double_buf), \ } struct renesas_usbhs_driver_param { /* * pipe settings */ struct renesas_usbhs_driver_pipe_config *pipe_configs; int pipe_size; /* pipe_configs array size */ /* * option: * * for BUSWAIT :: BWAIT * see * renesas_usbhs/common.c :: usbhsc_set_buswait() * */ int buswait_bwait; /* * option: * * delay time from notify_hotplug callback */ int detection_delay; /* msec */ /* * option: * * dma id for dmaengine * The data transfer direction on D0FIFO/D1FIFO should be * fixed for keeping consistency. * So, the platform id settings will be.. * .d0_tx_id = xx_TX, * .d1_rx_id = xx_RX, * or * .d1_tx_id = xx_TX, * .d0_rx_id = xx_RX, */ int d0_tx_id; int d0_rx_id; int d1_tx_id; int d1_rx_id; int d2_tx_id; int d2_rx_id; int d3_tx_id; int d3_rx_id; /* * option: * * pio <--> dma border. */ int pio_dma_border; /* default is 64byte */ /* * option: */ u32 has_usb_dmac:1; /* for USB-DMAC */ u32 runtime_pwctrl:1; u32 has_cnen:1; u32 cfifo_byte_addr:1; /* CFIFO is byte addressable */ #define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */ u32 multi_clks:1; u32 has_new_pipe_configs:1; }; /* * option: * * platform information for renesas_usbhs driver. */ struct renesas_usbhs_platform_info { /* * option: * * platform set these functions before * call platform_add_devices if needed */ struct renesas_usbhs_platform_callback platform_callback; /* * option: * * driver use these param for some register */ struct renesas_usbhs_driver_param driver_param; }; /* * macro for platform */ #define renesas_usbhs_get_info(pdev)\ ((struct renesas_usbhs_platform_info *)(pdev)->dev.platform_data) #endif /* RENESAS_USB_H */ PK ! טj� � usb/pd_ext_sdb.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2017 Dialog Semiconductor * * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> */ #ifndef __LINUX_USB_PD_EXT_SDB_H #define __LINUX_USB_PD_EXT_SDB_H /* SDB : Status Data Block */ enum usb_pd_ext_sdb_fields { USB_PD_EXT_SDB_INTERNAL_TEMP = 0, USB_PD_EXT_SDB_PRESENT_INPUT, USB_PD_EXT_SDB_PRESENT_BATT_INPUT, USB_PD_EXT_SDB_EVENT_FLAGS, USB_PD_EXT_SDB_TEMP_STATUS, USB_PD_EXT_SDB_DATA_SIZE, }; /* Event Flags */ #define USB_PD_EXT_SDB_EVENT_OCP BIT(1) #define USB_PD_EXT_SDB_EVENT_OTP BIT(2) #define USB_PD_EXT_SDB_EVENT_OVP BIT(3) #define USB_PD_EXT_SDB_EVENT_CF_CV_MODE BIT(4) #endif /* __LINUX_USB_PD_EXT_SDB_H */ PK ! �KY�� � usb/chipidea.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Platform data for the chipidea USB dual role controller */ #ifndef __LINUX_USB_CHIPIDEA_H #define __LINUX_USB_CHIPIDEA_H #include <linux/extcon.h> #include <linux/usb/otg.h> struct ci_hdrc; /** * struct ci_hdrc_cable - structure for external connector cable state tracking * @connected: true if cable is connected, false otherwise * @changed: set to true when extcon event happen * @enabled: set to true if we've enabled the vbus or id interrupt * @edev: device which generate events * @ci: driver state of the chipidea device * @nb: hold event notification callback * @conn: used for notification registration */ struct ci_hdrc_cable { bool connected; bool changed; bool enabled; struct extcon_dev *edev; struct ci_hdrc *ci; struct notifier_block nb; }; struct ci_hdrc_platform_data { const char *name; /* offset of the capability registers */ uintptr_t capoffset; unsigned power_budget; struct phy *phy; /* old usb_phy interface */ struct usb_phy *usb_phy; enum usb_phy_interface phy_mode; unsigned long flags; #define CI_HDRC_REGS_SHARED BIT(0) #define CI_HDRC_DISABLE_DEVICE_STREAMING BIT(1) #define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2) #define CI_HDRC_DISABLE_HOST_STREAMING BIT(3) #define CI_HDRC_DISABLE_STREAMING (CI_HDRC_DISABLE_DEVICE_STREAMING | \ CI_HDRC_DISABLE_HOST_STREAMING) /* * Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1, * but otg is not supported (no register otgsc). */ #define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4) #define CI_HDRC_IMX28_WRITE_FIX BIT(5) #define CI_HDRC_FORCE_FULLSPEED BIT(6) #define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7) #define CI_HDRC_SET_NON_ZERO_TTHA BIT(8) #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9) #define CI_HDRC_OVERRIDE_TX_BURST BIT(10) #define CI_HDRC_OVERRIDE_RX_BURST BIT(11) #define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12) /* Glue layer manages phy */ #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) #define CI_HDRC_IMX_IS_HSIC BIT(14) #define CI_HDRC_PMQOS BIT(15) enum usb_dr_mode dr_mode; #define CI_HDRC_CONTROLLER_RESET_EVENT 0 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 #define CI_HDRC_IMX_HSIC_ACTIVE_EVENT 2 #define CI_HDRC_IMX_HSIC_SUSPEND_EVENT 3 #define CI_HDRC_CONTROLLER_VBUS_EVENT 4 int (*notify_event) (struct ci_hdrc *ci, unsigned event); struct regulator *reg_vbus; struct usb_otg_caps ci_otg_caps; bool tpl_support; /* interrupt threshold setting */ u32 itc_setting; u32 ahb_burst_config; u32 tx_burst_size; u32 rx_burst_size; /* VBUS and ID signal state tracking, using extcon framework */ struct ci_hdrc_cable vbus_extcon; struct ci_hdrc_cable id_extcon; u32 phy_clkgate_delay_us; /* pins */ struct pinctrl *pctl; struct pinctrl_state *pins_default; struct pinctrl_state *pins_host; struct pinctrl_state *pins_device; /* platform-specific hooks */ int (*hub_control)(struct ci_hdrc *ci, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength, bool *done, unsigned long *flags); void (*enter_lpm)(struct ci_hdrc *ci, bool enable); }; /* Default offset of capability registers */ #define DEF_CAPOFFSET 0x100 /* Add ci hdrc device */ struct platform_device *ci_hdrc_add_device(struct device *dev, struct resource *res, int nres, struct ci_hdrc_platform_data *platdata); /* Remove ci hdrc device */ void ci_hdrc_remove_device(struct platform_device *pdev); /* Get current available role */ enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev); #endif PK ! 5 &= usb/ulpi.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * ulpi.h -- ULPI defines and function prorotypes * * Copyright (C) 2010 Nokia Corporation * * This software is distributed under the terms of the GNU General * Public License ("GPL") as published by the Free Software Foundation, * version 2 of that License. */ #ifndef __LINUX_USB_ULPI_H #define __LINUX_USB_ULPI_H #include <linux/usb/otg.h> #include <linux/ulpi/regs.h> /*-------------------------------------------------------------------------*/ /* * ULPI Flags */ #define ULPI_OTG_ID_PULLUP (1 << 0) #define ULPI_OTG_DP_PULLDOWN_DIS (1 << 1) #define ULPI_OTG_DM_PULLDOWN_DIS (1 << 2) #define ULPI_OTG_DISCHRGVBUS (1 << 3) #define ULPI_OTG_CHRGVBUS (1 << 4) #define ULPI_OTG_DRVVBUS (1 << 5) #define ULPI_OTG_DRVVBUS_EXT (1 << 6) #define ULPI_OTG_EXTVBUSIND (1 << 7) #define ULPI_IC_6PIN_SERIAL (1 << 8) #define ULPI_IC_3PIN_SERIAL (1 << 9) #define ULPI_IC_CARKIT (1 << 10) #define ULPI_IC_CLKSUSPM (1 << 11) #define ULPI_IC_AUTORESUME (1 << 12) #define ULPI_IC_EXTVBUS_INDINV (1 << 13) #define ULPI_IC_IND_PASSTHRU (1 << 14) #define ULPI_IC_PROTECT_DIS (1 << 15) #define ULPI_FC_HS (1 << 16) #define ULPI_FC_FS (1 << 17) #define ULPI_FC_LS (1 << 18) #define ULPI_FC_FS4LS (1 << 19) #define ULPI_FC_TERMSEL (1 << 20) #define ULPI_FC_OP_NORM (1 << 21) #define ULPI_FC_OP_NODRV (1 << 22) #define ULPI_FC_OP_DIS_NRZI (1 << 23) #define ULPI_FC_OP_NSYNC_NEOP (1 << 24) #define ULPI_FC_RST (1 << 25) #define ULPI_FC_SUSPM (1 << 26) /*-------------------------------------------------------------------------*/ #if IS_ENABLED(CONFIG_USB_ULPI) struct usb_phy *otg_ulpi_create(struct usb_phy_io_ops *ops, unsigned int flags); struct usb_phy *devm_otg_ulpi_create(struct device *dev, struct usb_phy_io_ops *ops, unsigned int flags); #else static inline struct usb_phy *otg_ulpi_create(struct usb_phy_io_ops *ops, unsigned int flags) { return NULL; } static inline struct usb_phy *devm_otg_ulpi_create(struct device *dev, struct usb_phy_io_ops *ops, unsigned int flags) { return NULL; } #endif #ifdef CONFIG_USB_ULPI_VIEWPORT /* access ops for controllers with a viewport register */ extern struct usb_phy_io_ops ulpi_viewport_access_ops; #endif #endif /* __LINUX_USB_ULPI_H */ PK ! Lx �w" w" usb/otg-fsm.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* Copyright (C) 2007,2008 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __LINUX_USB_OTG_FSM_H #define __LINUX_USB_OTG_FSM_H #include <linux/mutex.h> #include <linux/errno.h> #define PROTO_UNDEF (0) #define PROTO_HOST (1) #define PROTO_GADGET (2) #define OTG_STS_SELECTOR 0xF000 /* OTG status selector, according to * OTG and EH 2.0 Chapter 6.2.3 * Table:6-4 */ #define HOST_REQUEST_FLAG 1 /* Host request flag, according to * OTG and EH 2.0 Charpter 6.2.3 * Table:6-5 */ #define T_HOST_REQ_POLL (1500) /* 1500ms, HNP polling interval */ enum otg_fsm_timer { /* Standard OTG timers */ A_WAIT_VRISE, A_WAIT_VFALL, A_WAIT_BCON, A_AIDL_BDIS, B_ASE0_BRST, A_BIDL_ADIS, B_AIDL_BDIS, /* Auxiliary timers */ B_SE0_SRP, B_SRP_FAIL, A_WAIT_ENUM, B_DATA_PLS, B_SSEND_SRP, NUM_OTG_FSM_TIMERS, }; /** * struct otg_fsm - OTG state machine according to the OTG spec * * OTG hardware Inputs * * Common inputs for A and B device * @id: TRUE for B-device, FALSE for A-device. * @adp_change: TRUE when current ADP measurement (n) value, compared to the * ADP measurement taken at n-2, differs by more than CADP_THR * @power_up: TRUE when the OTG device first powers up its USB system and * ADP measurement taken if ADP capable * * A-Device state inputs * @a_srp_det: TRUE if the A-device detects SRP * @a_vbus_vld: TRUE when VBUS voltage is in regulation * @b_conn: TRUE if the A-device detects connection from the B-device * @a_bus_resume: TRUE when the B-device detects that the A-device is signaling * a resume (K state) * B-Device state inputs * @a_bus_suspend: TRUE when the B-device detects that the A-device has put the * bus into suspend * @a_conn: TRUE if the B-device detects a connection from the A-device * @b_se0_srp: TRUE when the line has been at SE0 for more than the minimum * time before generating SRP * @b_ssend_srp: TRUE when the VBUS has been below VOTG_SESS_VLD for more than * the minimum time before generating SRP * @b_sess_vld: TRUE when the B-device detects that the voltage on VBUS is * above VOTG_SESS_VLD * @test_device: TRUE when the B-device switches to B-Host and detects an OTG * test device. This must be set by host/hub driver * * Application inputs (A-Device) * @a_bus_drop: TRUE when A-device application needs to power down the bus * @a_bus_req: TRUE when A-device application wants to use the bus. * FALSE to suspend the bus * * Application inputs (B-Device) * @b_bus_req: TRUE during the time that the Application running on the * B-device wants to use the bus * * Auxiliary inputs (OTG v1.3 only. Obsolete now.) * @a_sess_vld: TRUE if the A-device detects that VBUS is above VA_SESS_VLD * @b_bus_suspend: TRUE when the A-device detects that the B-device has put * the bus into suspend * @b_bus_resume: TRUE when the A-device detects that the B-device is signaling * resume on the bus * * OTG Output status. Read only for users. Updated by OTG FSM helpers defined * in this file * * Outputs for Both A and B device * @drv_vbus: TRUE when A-device is driving VBUS * @loc_conn: TRUE when the local device has signaled that it is connected * to the bus * @loc_sof: TRUE when the local device is generating activity on the bus * @adp_prb: TRUE when the local device is in the process of doing * ADP probing * * Outputs for B-device state * @adp_sns: TRUE when the B-device is in the process of carrying out * ADP sensing * @data_pulse: TRUE when the B-device is performing data line pulsing * * Internal Variables * * a_set_b_hnp_en: TRUE when the A-device has successfully set the * b_hnp_enable bit in the B-device. * Unused as OTG fsm uses otg->host->b_hnp_enable instead * b_srp_done: TRUE when the B-device has completed initiating SRP * b_hnp_enable: TRUE when the B-device has accepted the * SetFeature(b_hnp_enable) B-device. * Unused as OTG fsm uses otg->gadget->b_hnp_enable instead * a_clr_err: Asserted (by application ?) to clear a_vbus_err due to an * overcurrent condition and causes the A-device to transition * to a_wait_vfall */ struct otg_fsm { /* Input */ int id; int adp_change; int power_up; int a_srp_det; int a_vbus_vld; int b_conn; int a_bus_resume; int a_bus_suspend; int a_conn; int b_se0_srp; int b_ssend_srp; int b_sess_vld; int test_device; int a_bus_drop; int a_bus_req; int b_bus_req; /* Auxiliary inputs */ int a_sess_vld; int b_bus_resume; int b_bus_suspend; /* Output */ int drv_vbus; int loc_conn; int loc_sof; int adp_prb; int adp_sns; int data_pulse; /* Internal variables */ int a_set_b_hnp_en; int b_srp_done; int b_hnp_enable; int a_clr_err; /* Informative variables. All unused as of now */ int a_bus_drop_inf; int a_bus_req_inf; int a_clr_err_inf; int b_bus_req_inf; /* Auxiliary informative variables */ int a_suspend_req_inf; /* Timeout indicator for timers */ int a_wait_vrise_tmout; int a_wait_vfall_tmout; int a_wait_bcon_tmout; int a_aidl_bdis_tmout; int b_ase0_brst_tmout; int a_bidl_adis_tmout; struct otg_fsm_ops *ops; struct usb_otg *otg; /* Current usb protocol used: 0:undefine; 1:host; 2:client */ int protocol; struct mutex lock; u8 *host_req_flag; struct delayed_work hnp_polling_work; bool hnp_work_inited; bool state_changed; }; struct otg_fsm_ops { void (*chrg_vbus)(struct otg_fsm *fsm, int on); void (*drv_vbus)(struct otg_fsm *fsm, int on); void (*loc_conn)(struct otg_fsm *fsm, int on); void (*loc_sof)(struct otg_fsm *fsm, int on); void (*start_pulse)(struct otg_fsm *fsm); void (*start_adp_prb)(struct otg_fsm *fsm); void (*start_adp_sns)(struct otg_fsm *fsm); void (*add_timer)(struct otg_fsm *fsm, enum otg_fsm_timer timer); void (*del_timer)(struct otg_fsm *fsm, enum otg_fsm_timer timer); int (*start_host)(struct otg_fsm *fsm, int on); int (*start_gadget)(struct otg_fsm *fsm, int on); }; static inline int otg_chrg_vbus(struct otg_fsm *fsm, int on) { if (!fsm->ops->chrg_vbus) return -EOPNOTSUPP; fsm->ops->chrg_vbus(fsm, on); return 0; } static inline int otg_drv_vbus(struct otg_fsm *fsm, int on) { if (!fsm->ops->drv_vbus) return -EOPNOTSUPP; if (fsm->drv_vbus != on) { fsm->drv_vbus = on; fsm->ops->drv_vbus(fsm, on); } return 0; } static inline int otg_loc_conn(struct otg_fsm *fsm, int on) { if (!fsm->ops->loc_conn) return -EOPNOTSUPP; if (fsm->loc_conn != on) { fsm->loc_conn = on; fsm->ops->loc_conn(fsm, on); } return 0; } static inline int otg_loc_sof(struct otg_fsm *fsm, int on) { if (!fsm->ops->loc_sof) return -EOPNOTSUPP; if (fsm->loc_sof != on) { fsm->loc_sof = on; fsm->ops->loc_sof(fsm, on); } return 0; } static inline int otg_start_pulse(struct otg_fsm *fsm) { if (!fsm->ops->start_pulse) return -EOPNOTSUPP; if (!fsm->data_pulse) { fsm->data_pulse = 1; fsm->ops->start_pulse(fsm); } return 0; } static inline int otg_start_adp_prb(struct otg_fsm *fsm) { if (!fsm->ops->start_adp_prb) return -EOPNOTSUPP; if (!fsm->adp_prb) { fsm->adp_sns = 0; fsm->adp_prb = 1; fsm->ops->start_adp_prb(fsm); } return 0; } static inline int otg_start_adp_sns(struct otg_fsm *fsm) { if (!fsm->ops->start_adp_sns) return -EOPNOTSUPP; if (!fsm->adp_sns) { fsm->adp_sns = 1; fsm->ops->start_adp_sns(fsm); } return 0; } static inline int otg_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer timer) { if (!fsm->ops->add_timer) return -EOPNOTSUPP; fsm->ops->add_timer(fsm, timer); return 0; } static inline int otg_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer timer) { if (!fsm->ops->del_timer) return -EOPNOTSUPP; fsm->ops->del_timer(fsm, timer); return 0; } static inline int otg_start_host(struct otg_fsm *fsm, int on) { if (!fsm->ops->start_host) return -EOPNOTSUPP; return fsm->ops->start_host(fsm, on); } static inline int otg_start_gadget(struct otg_fsm *fsm, int on) { if (!fsm->ops->start_gadget) return -EOPNOTSUPP; return fsm->ops->start_gadget(fsm, on); } int otg_statemachine(struct otg_fsm *fsm); #endif /* __LINUX_USB_OTG_FSM_H */ PK ! g�v% v% usb/typec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_USB_TYPEC_H #define __LINUX_USB_TYPEC_H #include <linux/types.h> /* USB Type-C Specification releases */ #define USB_TYPEC_REV_1_0 0x100 /* 1.0 */ #define USB_TYPEC_REV_1_1 0x110 /* 1.1 */ #define USB_TYPEC_REV_1_2 0x120 /* 1.2 */ #define USB_TYPEC_REV_1_3 0x130 /* 1.3 */ #define USB_TYPEC_REV_1_4 0x140 /* 1.4 */ #define USB_TYPEC_REV_2_0 0x200 /* 2.0 */ struct typec_partner; struct typec_cable; struct typec_plug; struct typec_port; struct typec_altmode_ops; struct fwnode_handle; struct device; enum typec_port_type { TYPEC_PORT_SRC, TYPEC_PORT_SNK, TYPEC_PORT_DRP, }; enum typec_port_data { TYPEC_PORT_DFP, TYPEC_PORT_UFP, TYPEC_PORT_DRD, }; enum typec_plug_type { USB_PLUG_NONE, USB_PLUG_TYPE_A, USB_PLUG_TYPE_B, USB_PLUG_TYPE_C, USB_PLUG_CAPTIVE, }; enum typec_data_role { TYPEC_DEVICE, TYPEC_HOST, }; enum typec_role { TYPEC_SINK, TYPEC_SOURCE, }; enum typec_pwr_opmode { TYPEC_PWR_MODE_USB, TYPEC_PWR_MODE_1_5A, TYPEC_PWR_MODE_3_0A, TYPEC_PWR_MODE_PD, }; enum typec_accessory { TYPEC_ACCESSORY_NONE, TYPEC_ACCESSORY_AUDIO, TYPEC_ACCESSORY_DEBUG, }; #define TYPEC_MAX_ACCESSORY 3 enum typec_orientation { TYPEC_ORIENTATION_NONE, TYPEC_ORIENTATION_NORMAL, TYPEC_ORIENTATION_REVERSE, }; /* * struct enter_usb_data - Enter_USB Message details * @eudo: Enter_USB Data Object * @active_link_training: Active Cable Plug Link Training * * @active_link_training is a flag that should be set with uni-directional SBRX * communication, and left 0 with passive cables and with bi-directional SBRX * communication. */ struct enter_usb_data { u32 eudo; unsigned char active_link_training:1; }; /* * struct usb_pd_identity - USB Power Delivery identity data * @id_header: ID Header VDO * @cert_stat: Cert Stat VDO * @product: Product VDO * @vdo: Product Type Specific VDOs * * USB power delivery Discover Identity command response data. * * REVISIT: This is USB Power Delivery specific information, so this structure * probable belongs to USB Power Delivery header file once we have them. */ struct usb_pd_identity { u32 id_header; u32 cert_stat; u32 product; u32 vdo[3]; }; int typec_partner_set_identity(struct typec_partner *partner); int typec_cable_set_identity(struct typec_cable *cable); /* * struct typec_altmode_desc - USB Type-C Alternate Mode Descriptor * @svid: Standard or Vendor ID * @mode: Index of the Mode * @vdo: VDO returned by Discover Modes USB PD command * @roles: Only for ports. DRP if the mode is available in both roles * * Description of an Alternate Mode which a connector, cable plug or partner * supports. */ struct typec_altmode_desc { u16 svid; u8 mode; u32 vdo; /* Only used with ports */ enum typec_port_data roles; }; void typec_partner_set_pd_revision(struct typec_partner *partner, u16 pd_revision); int typec_partner_set_num_altmodes(struct typec_partner *partner, int num_altmodes); struct typec_altmode *typec_partner_register_altmode(struct typec_partner *partner, const struct typec_altmode_desc *desc); int typec_plug_set_num_altmodes(struct typec_plug *plug, int num_altmodes); struct typec_altmode *typec_plug_register_altmode(struct typec_plug *plug, const struct typec_altmode_desc *desc); struct typec_altmode *typec_port_register_altmode(struct typec_port *port, const struct typec_altmode_desc *desc); void typec_port_register_altmodes(struct typec_port *port, const struct typec_altmode_ops *ops, void *drvdata, struct typec_altmode **altmodes, size_t n); void typec_unregister_altmode(struct typec_altmode *altmode); struct typec_port *typec_altmode2port(struct typec_altmode *alt); void typec_altmode_update_active(struct typec_altmode *alt, bool active); enum typec_plug_index { TYPEC_PLUG_SOP_P, TYPEC_PLUG_SOP_PP, }; /* * struct typec_plug_desc - USB Type-C Cable Plug Descriptor * @index: SOP Prime for the plug connected to DFP and SOP Double Prime for the * plug connected to UFP * * Represents USB Type-C Cable Plug. */ struct typec_plug_desc { enum typec_plug_index index; }; /* * struct typec_cable_desc - USB Type-C Cable Descriptor * @type: The plug type from USB PD Cable VDO * @active: Is the cable active or passive * @identity: Result of Discover Identity command * @pd_revision: USB Power Delivery Specification revision if supported * * Represents USB Type-C Cable attached to USB Type-C port. */ struct typec_cable_desc { enum typec_plug_type type; unsigned int active:1; struct usb_pd_identity *identity; u16 pd_revision; /* 0300H = "3.0" */ }; /* * struct typec_partner_desc - USB Type-C Partner Descriptor * @usb_pd: USB Power Delivery support * @accessory: Audio, Debug or none. * @identity: Discover Identity command data * @pd_revision: USB Power Delivery Specification Revision if supported * * Details about a partner that is attached to USB Type-C port. If @identity * member exists when partner is registered, a directory named "identity" is * created to sysfs for the partner device. * * @pd_revision is based on the setting of the "Specification Revision" field * in the message header on the initial "Source Capabilities" message received * from the partner, or a "Request" message received from the partner, depending * on whether our port is a Sink or a Source. */ struct typec_partner_desc { unsigned int usb_pd:1; enum typec_accessory accessory; struct usb_pd_identity *identity; u16 pd_revision; /* 0300H = "3.0" */ }; /** * struct typec_operations - USB Type-C Port Operations * @try_role: Set data role preference for DRP port * @dr_set: Set Data Role * @pr_set: Set Power Role * @vconn_set: Source VCONN * @port_type_set: Set port type */ struct typec_operations { int (*try_role)(struct typec_port *port, int role); int (*dr_set)(struct typec_port *port, enum typec_data_role role); int (*pr_set)(struct typec_port *port, enum typec_role role); int (*vconn_set)(struct typec_port *port, enum typec_role role); int (*port_type_set)(struct typec_port *port, enum typec_port_type type); }; enum usb_pd_svdm_ver { SVDM_VER_1_0 = 0, SVDM_VER_2_0 = 1, SVDM_VER_MAX = SVDM_VER_2_0, }; /* * struct typec_capability - USB Type-C Port Capabilities * @type: Supported power role of the port * @data: Supported data role of the port * @revision: USB Type-C Specification release. Binary coded decimal * @pd_revision: USB Power Delivery Specification revision if supported * @svdm_version: USB PD Structured VDM version if supported * @prefer_role: Initial role preference (DRP ports). * @accessory: Supported Accessory Modes * @fwnode: Optional fwnode of the port * @driver_data: Private pointer for driver specific info * @ops: Port operations vector * * Static capabilities of a single USB Type-C port. */ struct typec_capability { enum typec_port_type type; enum typec_port_data data; u16 revision; /* 0120H = "1.2" */ u16 pd_revision; /* 0300H = "3.0" */ enum usb_pd_svdm_ver svdm_version; int prefer_role; enum typec_accessory accessory[TYPEC_MAX_ACCESSORY]; unsigned int orientation_aware:1; struct fwnode_handle *fwnode; void *driver_data; const struct typec_operations *ops; }; /* Specific to try_role(). Indicates the user want's to clear the preference. */ #define TYPEC_NO_PREFERRED_ROLE (-1) struct typec_port *typec_register_port(struct device *parent, const struct typec_capability *cap); void typec_unregister_port(struct typec_port *port); struct typec_partner *typec_register_partner(struct typec_port *port, struct typec_partner_desc *desc); void typec_unregister_partner(struct typec_partner *partner); struct typec_cable *typec_register_cable(struct typec_port *port, struct typec_cable_desc *desc); void typec_unregister_cable(struct typec_cable *cable); struct typec_cable *typec_cable_get(struct typec_port *port); void typec_cable_put(struct typec_cable *cable); int typec_cable_is_active(struct typec_cable *cable); struct typec_plug *typec_register_plug(struct typec_cable *cable, struct typec_plug_desc *desc); void typec_unregister_plug(struct typec_plug *plug); void typec_set_data_role(struct typec_port *port, enum typec_data_role role); void typec_set_pwr_role(struct typec_port *port, enum typec_role role); void typec_set_vconn_role(struct typec_port *port, enum typec_role role); void typec_set_pwr_opmode(struct typec_port *port, enum typec_pwr_opmode mode); int typec_set_orientation(struct typec_port *port, enum typec_orientation orientation); enum typec_orientation typec_get_orientation(struct typec_port *port); int typec_set_mode(struct typec_port *port, int mode); void *typec_get_drvdata(struct typec_port *port); int typec_get_fw_cap(struct typec_capability *cap, struct fwnode_handle *fwnode); int typec_find_pwr_opmode(const char *name); int typec_find_orientation(const char *name); int typec_find_port_power_role(const char *name); int typec_find_power_role(const char *name); int typec_find_port_data_role(const char *name); void typec_partner_set_svdm_version(struct typec_partner *partner, enum usb_pd_svdm_ver svdm_version); int typec_get_negotiated_svdm_version(struct typec_port *port); #if IS_REACHABLE(CONFIG_TYPEC) int typec_link_port(struct device *port); void typec_unlink_port(struct device *port); #else static inline int typec_link_port(struct device *port) { return 0; } static inline void typec_unlink_port(struct device *port) { } #endif #endif /* __LINUX_USB_TYPEC_H */ PK ! ұ��� � usb/isp116x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Board initialization code should put one of these into dev->platform_data * and place the isp116x onto platform_bus. */ #ifndef __LINUX_USB_ISP116X_H #define __LINUX_USB_ISP116X_H struct isp116x_platform_data { /* Enable internal resistors on downstream ports */ unsigned sel15Kres:1; /* On-chip overcurrent detection */ unsigned oc_enable:1; /* INT output polarity */ unsigned int_act_high:1; /* INT edge or level triggered */ unsigned int_edge_triggered:1; /* Enable wakeup by devices on usb bus (e.g. wakeup by attachment/detachment or by device activity such as moving a mouse). When chosen, this option prevents stopping internal clock, increasing thereby power consumption in suspended state. */ unsigned remote_wakeup_enable:1; /* Inter-io delay (ns). The chip is picky about access timings; it expects at least: 150ns delay between consecutive accesses to DATA_REG, 300ns delay between access to ADDR_REG and DATA_REG OE, WE MUST NOT be changed during these intervals */ void (*delay) (struct device *dev, int delay); }; #endif /* __LINUX_USB_ISP116X_H */ PK ! ľDI+ + usb/r8152.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020 Realtek Semiconductor Corp. All rights reserved. */ #ifndef __LINUX_R8152_H #define __LINUX_R8152_H #define RTL8152_REQT_READ 0xc0 #define RTL8152_REQT_WRITE 0x40 #define RTL8152_REQ_GET_REGS 0x05 #define RTL8152_REQ_SET_REGS 0x05 #define BYTE_EN_DWORD 0xff #define BYTE_EN_WORD 0x33 #define BYTE_EN_BYTE 0x11 #define BYTE_EN_SIX_BYTES 0x3f #define BYTE_EN_START_MASK 0x0f #define BYTE_EN_END_MASK 0xf0 #define MCU_TYPE_PLA 0x0100 #define MCU_TYPE_USB 0x0000 /* Define these values to match your device */ #define VENDOR_ID_REALTEK 0x0bda #define VENDOR_ID_MICROSOFT 0x045e #define VENDOR_ID_SAMSUNG 0x04e8 #define VENDOR_ID_LENOVO 0x17ef #define VENDOR_ID_LINKSYS 0x13b1 #define VENDOR_ID_NVIDIA 0x0955 #define VENDOR_ID_TPLINK 0x2357 #define VENDOR_ID_DLINK 0x2001 #define VENDOR_ID_DELL 0x413c #define VENDOR_ID_ASUS 0x0b05 #if IS_REACHABLE(CONFIG_USB_RTL8152) extern u8 rtl8152_get_version(struct usb_interface *intf); #endif #endif /* __LINUX_R8152_H */ PK ! �6�U U usb/ehci_def.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2001-2002 by David Brownell * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __LINUX_USB_EHCI_DEF_H #define __LINUX_USB_EHCI_DEF_H #include <linux/usb/ehci-dbgp.h> /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ /* Section 2.2 Host Controller Capability Registers */ struct ehci_caps { /* these fields are specified as 8 and 16 bit registers, * but some hosts can't perform 8 or 16 bit PCI accesses. * some hosts treat caplength and hciversion as parts of a 32-bit * register, others treat them as two separate registers, this * affects the memory map for big endian controllers. */ u32 hc_capbase; #define HC_LENGTH(ehci, p) (0x00ff&((p) >> /* bits 7:0 / offset 00h */ \ (ehci_big_endian_capbase(ehci) ? 24 : 0))) #define HC_VERSION(ehci, p) (0xffff&((p) >> /* bits 31:16 / offset 02h */ \ (ehci_big_endian_capbase(ehci) ? 0 : 16))) u32 hcs_params; /* HCSPARAMS - offset 0x4 */ #define HCS_DEBUG_PORT(p) (((p)>>20)&0xf) /* bits 23:20, debug port? */ #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */ #define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */ #define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */ #define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */ #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */ #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */ #define HCS_N_PORTS_MAX 15 /* N_PORTS valid 0x1-0xF */ u32 hcc_params; /* HCCPARAMS - offset 0x8 */ /* EHCI 1.1 addendum */ #define HCC_32FRAME_PERIODIC_LIST(p) ((p)&(1 << 19)) #define HCC_PER_PORT_CHANGE_EVENT(p) ((p)&(1 << 18)) #define HCC_LPM(p) ((p)&(1 << 17)) #define HCC_HW_PREFETCH(p) ((p)&(1 << 16)) #define HCC_EXT_CAPS(p) (((p)>>8)&0xff) /* for pci extended caps */ #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */ #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */ #define HCC_CANPARK(p) ((p)&(1 << 2)) /* true: can park on async qh */ #define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/ #define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */ u8 portroute[8]; /* nibbles for routing - offset 0xC */ }; /* Section 2.3 Host Controller Operational Registers */ struct ehci_regs { /* USBCMD: offset 0x00 */ u32 command; /* EHCI 1.1 addendum */ #define CMD_HIRD (0xf<<24) /* host initiated resume duration */ #define CMD_PPCEE (1<<15) /* per port change event enable */ #define CMD_FSP (1<<14) /* fully synchronized prefetch */ #define CMD_ASPE (1<<13) /* async schedule prefetch enable */ #define CMD_PSPE (1<<12) /* periodic schedule prefetch enable */ /* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */ #define CMD_PARK (1<<11) /* enable "park" on async qh */ #define CMD_PARK_CNT(c) (((c)>>8)&3) /* how many transfers to park for */ #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */ #define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */ #define CMD_ASE (1<<5) /* async schedule enable */ #define CMD_PSE (1<<4) /* periodic schedule enable */ /* 3:2 is periodic frame list size */ #define CMD_RESET (1<<1) /* reset HC not bus */ #define CMD_RUN (1<<0) /* start/stop HC */ /* USBSTS: offset 0x04 */ u32 status; #define STS_PPCE_MASK (0xff<<16) /* Per-Port change event 1-16 */ #define STS_ASS (1<<15) /* Async Schedule Status */ #define STS_PSS (1<<14) /* Periodic Schedule Status */ #define STS_RECL (1<<13) /* Reclamation */ #define STS_HALT (1<<12) /* Not running (any reason) */ /* some bits reserved */ /* these STS_* flags are also intr_enable bits (USBINTR) */ #define STS_IAA (1<<5) /* Interrupted on async advance */ #define STS_FATAL (1<<4) /* such as some PCI access errors */ #define STS_FLR (1<<3) /* frame list rolled over */ #define STS_PCD (1<<2) /* port change detect */ #define STS_ERR (1<<1) /* "error" completion (overflow, ...) */ #define STS_INT (1<<0) /* "normal" completion (short, ...) */ /* USBINTR: offset 0x08 */ u32 intr_enable; /* FRINDEX: offset 0x0C */ u32 frame_index; /* current microframe number */ /* CTRLDSSEGMENT: offset 0x10 */ u32 segment; /* address bits 63:32 if needed */ /* PERIODICLISTBASE: offset 0x14 */ u32 frame_list; /* points to periodic list */ /* ASYNCLISTADDR: offset 0x18 */ u32 async_next; /* address of next async queue head */ u32 reserved1[2]; /* TXFILLTUNING: offset 0x24 */ u32 txfill_tuning; /* TX FIFO Tuning register */ #define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */ u32 reserved2[6]; /* CONFIGFLAG: offset 0x40 */ u32 configured_flag; #define FLAG_CF (1<<0) /* true: we'll support "high speed" */ union { /* PORTSC: offset 0x44 */ u32 port_status[HCS_N_PORTS_MAX]; /* up to N_PORTS */ /* EHCI 1.1 addendum */ #define PORTSC_SUSPEND_STS_ACK 0 #define PORTSC_SUSPEND_STS_NYET 1 #define PORTSC_SUSPEND_STS_STALL 2 #define PORTSC_SUSPEND_STS_ERR 3 #define PORT_DEV_ADDR (0x7f<<25) /* device address */ #define PORT_SSTS (0x3<<23) /* suspend status */ /* 31:23 reserved */ #define PORT_WKOC_E (1<<22) /* wake on overcurrent (enable) */ #define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */ #define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */ /* 19:16 for port testing */ #define PORT_TEST(x) (((x)&0xf)<<16) /* Port Test Control */ #define PORT_TEST_PKT PORT_TEST(0x4) /* Port Test Control - packet test */ #define PORT_TEST_FORCE PORT_TEST(0x5) /* Port Test Control - force enable */ #define PORT_LED_OFF (0<<14) #define PORT_LED_AMBER (1<<14) #define PORT_LED_GREEN (2<<14) #define PORT_LED_MASK (3<<14) #define PORT_OWNER (1<<13) /* true: companion hc owns this port */ #define PORT_POWER (1<<12) /* true: has power (see PPC) */ #define PORT_USB11(x) (((x)&(3<<10)) == (1<<10)) /* USB 1.1 device */ #define PORT_LS_MASK (3<<10) /* Link status (SE0, K or J */ /* 9 reserved */ #define PORT_LPM (1<<9) /* LPM transaction */ #define PORT_RESET (1<<8) /* reset port */ #define PORT_SUSPEND (1<<7) /* suspend port */ #define PORT_RESUME (1<<6) /* resume it */ #define PORT_OCC (1<<5) /* over current change */ #define PORT_OC (1<<4) /* over current active */ #define PORT_PEC (1<<3) /* port enable change */ #define PORT_PE (1<<2) /* port enable */ #define PORT_CSC (1<<1) /* connect status change */ #define PORT_CONNECT (1<<0) /* device connected */ #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC) struct { u32 reserved3[9]; /* USBMODE: offset 0x68 */ u32 usbmode; /* USB Device mode */ }; #define USBMODE_SDIS (1<<3) /* Stream disable */ #define USBMODE_BE (1<<2) /* BE/LE endianness select */ #define USBMODE_CM_HC (3<<0) /* host controller mode */ #define USBMODE_CM_IDLE (0<<0) /* idle state */ }; /* Moorestown has some non-standard registers, partially due to the fact that * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to * PORTSCx */ union { struct { u32 reserved4; /* HOSTPC: offset 0x84 */ u32 hostpc[HCS_N_PORTS_MAX]; #define HOSTPC_PHCD (1<<22) /* Phy clock disable */ #define HOSTPC_PSPD (3<<25) /* Port speed detection */ }; /* Broadcom-proprietary USB_EHCI_INSNREG00 @ 0x80 */ u32 brcm_insnreg[4]; }; u32 reserved5[2]; /* USBMODE_EX: offset 0xc8 */ u32 usbmode_ex; /* USB Device mode extension */ #define USBMODE_EX_VBPS (1<<5) /* VBus Power Select On */ #define USBMODE_EX_HC (3<<0) /* host controller mode */ }; #endif /* __LINUX_USB_EHCI_DEF_H */ PK ! ���4� � usb/rndis_host.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Host Side support for RNDIS Networking Links * Copyright (C) 2005 by David Brownell * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __LINUX_USB_RNDIS_HOST_H #define __LINUX_USB_RNDIS_HOST_H #include <linux/rndis.h> /* * CONTROL uses CDC "encapsulated commands" with funky notifications. * - control-out: SEND_ENCAPSULATED * - interrupt-in: RESPONSE_AVAILABLE * - control-in: GET_ENCAPSULATED * * We'll try to ignore the RESPONSE_AVAILABLE notifications. * * REVISIT some RNDIS implementations seem to have curious issues still * to be resolved. */ struct rndis_msg_hdr { __le32 msg_type; /* RNDIS_MSG_* */ __le32 msg_len; /* followed by data that varies between messages */ __le32 request_id; __le32 status; /* ... and more */ } __attribute__ ((packed)); /* MS-Windows uses this strange size, but RNDIS spec says 1024 minimum */ #define CONTROL_BUFFER_SIZE 1025 /* RNDIS defines an (absurdly huge) 10 second control timeout, * but ActiveSync seems to use a more usual 5 second timeout * (which matches the USB 2.0 spec). */ #define RNDIS_CONTROL_TIMEOUT_MS (5 * 1000) struct rndis_data_hdr { __le32 msg_type; /* RNDIS_MSG_PACKET */ __le32 msg_len; /* rndis_data_hdr + data_len + pad */ __le32 data_offset; /* 36 -- right after header */ __le32 data_len; /* ... real packet size */ __le32 oob_data_offset; /* zero */ __le32 oob_data_len; /* zero */ __le32 num_oob; /* zero */ __le32 packet_data_offset; /* zero */ __le32 packet_data_len; /* zero */ __le32 vc_handle; /* zero */ __le32 reserved; /* zero */ } __attribute__ ((packed)); struct rndis_init { /* OUT */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_INIT */ __le32 msg_len; /* 24 */ __le32 request_id; __le32 major_version; /* of rndis (1.0) */ __le32 minor_version; __le32 max_transfer_size; } __attribute__ ((packed)); struct rndis_init_c { /* IN */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_INIT_C */ __le32 msg_len; __le32 request_id; __le32 status; __le32 major_version; /* of rndis (1.0) */ __le32 minor_version; __le32 device_flags; __le32 medium; /* zero == 802.3 */ __le32 max_packets_per_message; __le32 max_transfer_size; __le32 packet_alignment; /* max 7; (1<<n) bytes */ __le32 af_list_offset; /* zero */ __le32 af_list_size; /* zero */ } __attribute__ ((packed)); struct rndis_halt { /* OUT (no reply) */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_HALT */ __le32 msg_len; __le32 request_id; } __attribute__ ((packed)); struct rndis_query { /* OUT */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_QUERY */ __le32 msg_len; __le32 request_id; __le32 oid; __le32 len; __le32 offset; /*?*/ __le32 handle; /* zero */ } __attribute__ ((packed)); struct rndis_query_c { /* IN */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_QUERY_C */ __le32 msg_len; __le32 request_id; __le32 status; __le32 len; __le32 offset; } __attribute__ ((packed)); struct rndis_set { /* OUT */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_SET */ __le32 msg_len; __le32 request_id; __le32 oid; __le32 len; __le32 offset; /*?*/ __le32 handle; /* zero */ } __attribute__ ((packed)); struct rndis_set_c { /* IN */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_SET_C */ __le32 msg_len; __le32 request_id; __le32 status; } __attribute__ ((packed)); struct rndis_reset { /* IN */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_RESET */ __le32 msg_len; __le32 reserved; } __attribute__ ((packed)); struct rndis_reset_c { /* OUT */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_RESET_C */ __le32 msg_len; __le32 status; __le32 addressing_lost; } __attribute__ ((packed)); struct rndis_indicate { /* IN (unrequested) */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_INDICATE */ __le32 msg_len; __le32 status; __le32 length; __le32 offset; /**/ __le32 diag_status; __le32 error_offset; /**/ __le32 message; } __attribute__ ((packed)); struct rndis_keepalive { /* OUT (optionally IN) */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_KEEPALIVE */ __le32 msg_len; __le32 request_id; } __attribute__ ((packed)); struct rndis_keepalive_c { /* IN (optionally OUT) */ /* header and: */ __le32 msg_type; /* RNDIS_MSG_KEEPALIVE_C */ __le32 msg_len; __le32 request_id; __le32 status; } __attribute__ ((packed)); /* default filter used with RNDIS devices */ #define RNDIS_DEFAULT_FILTER ( \ RNDIS_PACKET_TYPE_DIRECTED | \ RNDIS_PACKET_TYPE_BROADCAST | \ RNDIS_PACKET_TYPE_ALL_MULTICAST | \ RNDIS_PACKET_TYPE_PROMISCUOUS) /* Flags to require specific physical medium type for generic_rndis_bind() */ #define FLAG_RNDIS_PHYM_NOT_WIRELESS 0x0001 #define FLAG_RNDIS_PHYM_WIRELESS 0x0002 /* Flags for driver_info::data */ #define RNDIS_DRIVER_DATA_POLL_STATUS 1 /* poll status before control */ extern void rndis_status(struct usbnet *dev, struct urb *urb); extern int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen); extern int generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags); extern void rndis_unbind(struct usbnet *dev, struct usb_interface *intf); extern int rndis_rx_fixup(struct usbnet *dev, struct sk_buff *skb); extern struct sk_buff * rndis_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags); #endif /* __LINUX_USB_RNDIS_HOST_H */ PK ! ZܬoZ Z usb/cdc_ncm.hnu �[��� // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) /* * Copyright (C) ST-Ericsson 2010-2012 * Contact: Alexey Orishko <alexey.orishko@stericsson.com> * Original author: Hans Petter Selasky <hans.petter.selasky@stericsson.com> * * USB Host Driver for Network Control Model (NCM) * http://www.usb.org/developers/devclass_docs/NCM10.zip * * The NCM encoding, decoding and initialization logic * derives from FreeBSD 8.x. if_cdce.c and if_cdcereg.h * * This software is available to you under a choice of one of two * licenses. You may choose this file to be licensed under the terms * of the GNU General Public License (GPL) Version 2 or the 2-clause * BSD license listed below: * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #ifndef __LINUX_USB_CDC_NCM_H #define __LINUX_USB_CDC_NCM_H #define CDC_NCM_COMM_ALTSETTING_NCM 0 #define CDC_NCM_COMM_ALTSETTING_MBIM 1 #define CDC_NCM_DATA_ALTSETTING_NCM 1 #define CDC_NCM_DATA_ALTSETTING_MBIM 2 /* CDC NCM subclass 3.3.1 */ #define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10 /* CDC NCM subclass 3.3.2 */ #define USB_CDC_NCM_NDP32_LENGTH_MIN 0x20 /* Maximum NTB length */ #define CDC_NCM_NTB_MAX_SIZE_TX 32768 /* bytes */ #define CDC_NCM_NTB_MAX_SIZE_RX 32768 /* bytes */ /* Initial NTB length */ #define CDC_NCM_NTB_DEF_SIZE_TX 16384 /* bytes */ #define CDC_NCM_NTB_DEF_SIZE_RX 16384 /* bytes */ /* Minimum value for MaxDatagramSize, ch. 6.2.9 */ #define CDC_NCM_MIN_DATAGRAM_SIZE 1514 /* bytes */ /* Minimum value for MaxDatagramSize, ch. 8.1.3 */ #define CDC_MBIM_MIN_DATAGRAM_SIZE 2048 /* bytes */ #define CDC_NCM_MIN_TX_PKT 512 /* bytes */ /* Default value for MaxDatagramSize */ #define CDC_NCM_MAX_DATAGRAM_SIZE 8192 /* bytes */ /* * Maximum amount of datagrams in NCM Datagram Pointer Table, not counting * the last NULL entry. */ #define CDC_NCM_DPT_DATAGRAMS_MAX 40 /* Restart the timer, if amount of datagrams is less than given value */ #define CDC_NCM_RESTART_TIMER_DATAGRAM_CNT 3 #define CDC_NCM_TIMER_PENDING_CNT 2 #define CDC_NCM_TIMER_INTERVAL_USEC 400UL #define CDC_NCM_TIMER_INTERVAL_MIN 5UL #define CDC_NCM_TIMER_INTERVAL_MAX (U32_MAX / NSEC_PER_USEC) /* Driver flags */ #define CDC_NCM_FLAG_NDP_TO_END 0x02 /* NDP is placed at end of frame */ #define CDC_MBIM_FLAG_AVOID_ALTSETTING_TOGGLE 0x04 /* Avoid altsetting toggle during init */ #define CDC_NCM_FLAG_PREFER_NTB32 0x08 /* prefer NDP32 over NDP16 */ #define cdc_ncm_comm_intf_is_mbim(x) ((x)->desc.bInterfaceSubClass == USB_CDC_SUBCLASS_MBIM && \ (x)->desc.bInterfaceProtocol == USB_CDC_PROTO_NONE) #define cdc_ncm_data_intf_is_mbim(x) ((x)->desc.bInterfaceProtocol == USB_CDC_MBIM_PROTO_NTB) struct cdc_ncm_ctx { struct usb_cdc_ncm_ntb_parameters ncm_parm; struct hrtimer tx_timer; struct tasklet_struct bh; struct usbnet *dev; const struct usb_cdc_ncm_desc *func_desc; const struct usb_cdc_mbim_desc *mbim_desc; const struct usb_cdc_mbim_extended_desc *mbim_extended_desc; const struct usb_cdc_ether_desc *ether_desc; struct usb_interface *control; struct usb_interface *data; struct sk_buff *tx_curr_skb; struct sk_buff *tx_rem_skb; __le32 tx_rem_sign; spinlock_t mtx; atomic_t stop; int drvflags; u32 timer_interval; u32 max_ndp_size; u8 is_ndp16; union { struct usb_cdc_ncm_ndp16 *delayed_ndp16; struct usb_cdc_ncm_ndp32 *delayed_ndp32; }; u32 tx_timer_pending; u32 tx_curr_frame_num; u32 rx_max; u32 tx_max; u32 tx_curr_size; u32 tx_low_mem_max_cnt; u32 tx_low_mem_val; u32 max_datagram_size; u16 tx_max_datagrams; u16 tx_remainder; u16 tx_modulus; u16 tx_ndp_modulus; u16 tx_seq; u16 rx_seq; u16 min_tx_pkt; /* statistics */ u32 tx_curr_frame_payload; u32 tx_reason_ntb_full; u32 tx_reason_ndp_full; u32 tx_reason_timeout; u32 tx_reason_max_datagram; u64 tx_overhead; u64 tx_ntbs; u64 rx_overhead; u64 rx_ntbs; }; u8 cdc_ncm_select_altsetting(struct usb_interface *intf); int cdc_ncm_change_mtu(struct net_device *net, int new_mtu); int cdc_ncm_bind_common(struct usbnet *dev, struct usb_interface *intf, u8 data_altsetting, int drvflags); void cdc_ncm_unbind(struct usbnet *dev, struct usb_interface *intf); struct sk_buff *cdc_ncm_fill_tx_frame(struct usbnet *dev, struct sk_buff *skb, __le32 sign); int cdc_ncm_rx_verify_nth16(struct cdc_ncm_ctx *ctx, struct sk_buff *skb_in); int cdc_ncm_rx_verify_ndp16(struct sk_buff *skb_in, int ndpoffset); int cdc_ncm_rx_verify_nth32(struct cdc_ncm_ctx *ctx, struct sk_buff *skb_in); int cdc_ncm_rx_verify_ndp32(struct sk_buff *skb_in, int ndpoffset); struct sk_buff * cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags); int cdc_ncm_rx_fixup(struct usbnet *dev, struct sk_buff *skb_in); #endif /* __LINUX_USB_CDC_NCM_H */ PK ! �ZV:9 9 usb/xhci-dbgp.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Standalone xHCI debug capability driver * * Copyright (C) 2016 Intel Corporation * * Author: Lu Baolu <baolu.lu@linux.intel.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __LINUX_XHCI_DBGP_H #define __LINUX_XHCI_DBGP_H #ifdef CONFIG_EARLY_PRINTK_USB_XDBC int __init early_xdbc_parse_parameter(char *s); int __init early_xdbc_setup_hardware(void); void __init early_xdbc_register_console(void); #else static inline int __init early_xdbc_setup_hardware(void) { return -ENODEV; } static inline void __init early_xdbc_register_console(void) { } #endif /* CONFIG_EARLY_PRINTK_USB_XDBC */ #endif /* __LINUX_XHCI_DBGP_H */ PK ! �Uq�@ �@ usb/pd_vdo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2015-2017 Google, Inc */ #ifndef __LINUX_USB_PD_VDO_H #define __LINUX_USB_PD_VDO_H #include "pd.h" /* * VDO : Vendor Defined Message Object * VDM object is minimum of VDM header + 6 additional data objects. */ #define VDO_MAX_OBJECTS 6 #define VDO_MAX_SIZE (VDO_MAX_OBJECTS + 1) /* * VDM header * ---------- * <31:16> :: SVID * <15> :: VDM type ( 1b == structured, 0b == unstructured ) * <14:13> :: Structured VDM version * <12:11> :: reserved * <10:8> :: object position (1-7 valid ... used for enter/exit mode only) * <7:6> :: command type (SVDM only?) * <5> :: reserved (SVDM), command type (UVDM) * <4:0> :: command */ #define VDO(vid, type, ver, custom) \ (((vid) << 16) | \ ((type) << 15) | \ ((ver) << 13) | \ ((custom) & 0x7FFF)) #define VDO_SVDM_TYPE (1 << 15) #define VDO_SVDM_VERS(x) ((x) << 13) #define VDO_OPOS(x) ((x) << 8) #define VDO_CMDT(x) ((x) << 6) #define VDO_SVDM_VERS_MASK VDO_SVDM_VERS(0x3) #define VDO_OPOS_MASK VDO_OPOS(0x7) #define VDO_CMDT_MASK VDO_CMDT(0x3) #define CMDT_INIT 0 #define CMDT_RSP_ACK 1 #define CMDT_RSP_NAK 2 #define CMDT_RSP_BUSY 3 /* reserved for SVDM ... for Google UVDM */ #define VDO_SRC_INITIATOR (0 << 5) #define VDO_SRC_RESPONDER (1 << 5) #define CMD_DISCOVER_IDENT 1 #define CMD_DISCOVER_SVID 2 #define CMD_DISCOVER_MODES 3 #define CMD_ENTER_MODE 4 #define CMD_EXIT_MODE 5 #define CMD_ATTENTION 6 #define VDO_CMD_VENDOR(x) (((0x10 + (x)) & 0x1f)) /* ChromeOS specific commands */ #define VDO_CMD_VERSION VDO_CMD_VENDOR(0) #define VDO_CMD_SEND_INFO VDO_CMD_VENDOR(1) #define VDO_CMD_READ_INFO VDO_CMD_VENDOR(2) #define VDO_CMD_REBOOT VDO_CMD_VENDOR(5) #define VDO_CMD_FLASH_ERASE VDO_CMD_VENDOR(6) #define VDO_CMD_FLASH_WRITE VDO_CMD_VENDOR(7) #define VDO_CMD_ERASE_SIG VDO_CMD_VENDOR(8) #define VDO_CMD_PING_ENABLE VDO_CMD_VENDOR(10) #define VDO_CMD_CURRENT VDO_CMD_VENDOR(11) #define VDO_CMD_FLIP VDO_CMD_VENDOR(12) #define VDO_CMD_GET_LOG VDO_CMD_VENDOR(13) #define VDO_CMD_CCD_EN VDO_CMD_VENDOR(14) #define PD_VDO_VID(vdo) ((vdo) >> 16) #define PD_VDO_SVDM(vdo) (((vdo) >> 15) & 1) #define PD_VDO_SVDM_VER(vdo) (((vdo) >> 13) & 0x3) #define PD_VDO_OPOS(vdo) (((vdo) >> 8) & 0x7) #define PD_VDO_CMD(vdo) ((vdo) & 0x1f) #define PD_VDO_CMDT(vdo) (((vdo) >> 6) & 0x3) /* * SVDM Identity request -> response * * Request is simply properly formatted SVDM header * * Response is 4 data objects: * [0] :: SVDM header * [1] :: Identitiy header * [2] :: Cert Stat VDO * [3] :: (Product | Cable) VDO * [4] :: AMA VDO * */ #define VDO_INDEX_HDR 0 #define VDO_INDEX_IDH 1 #define VDO_INDEX_CSTAT 2 #define VDO_INDEX_CABLE 3 #define VDO_INDEX_PRODUCT 3 #define VDO_INDEX_AMA 4 /* * SVDM Identity Header * -------------------- * <31> :: data capable as a USB host * <30> :: data capable as a USB device * <29:27> :: product type (UFP / Cable / VPD) * <26> :: modal operation supported (1b == yes) * <25:23> :: product type (DFP) (SVDM version 2.0+ only; set to zero in version 1.0) * <22:21> :: connector type (SVDM version 2.0+ only; set to zero in version 1.0) * <20:16> :: Reserved, Shall be set to zero * <15:0> :: USB-IF assigned VID for this cable vendor */ /* PD Rev2.0 definition */ #define IDH_PTYPE_UNDEF 0 /* SOP Product Type (UFP) */ #define IDH_PTYPE_NOT_UFP 0 #define IDH_PTYPE_HUB 1 #define IDH_PTYPE_PERIPH 2 #define IDH_PTYPE_PSD 3 #define IDH_PTYPE_AMA 5 /* SOP' Product Type (Cable Plug / VPD) */ #define IDH_PTYPE_NOT_CABLE 0 #define IDH_PTYPE_PCABLE 3 #define IDH_PTYPE_ACABLE 4 #define IDH_PTYPE_VPD 6 /* SOP Product Type (DFP) */ #define IDH_PTYPE_NOT_DFP 0 #define IDH_PTYPE_DFP_HUB 1 #define IDH_PTYPE_DFP_HOST 2 #define IDH_PTYPE_DFP_PB 3 /* ID Header Mask */ #define IDH_DFP_MASK GENMASK(25, 23) #define IDH_CONN_MASK GENMASK(22, 21) #define VDO_IDH(usbh, usbd, ufp_cable, is_modal, dfp, conn, vid) \ ((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \ | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \ | ((vid) & 0xffff)) #define PD_IDH_PTYPE(vdo) (((vdo) >> 27) & 0x7) #define PD_IDH_VID(vdo) ((vdo) & 0xffff) #define PD_IDH_MODAL_SUPP(vdo) ((vdo) & (1 << 26)) #define PD_IDH_DFP_PTYPE(vdo) (((vdo) >> 23) & 0x7) #define PD_IDH_CONN_TYPE(vdo) (((vdo) >> 21) & 0x3) /* * Cert Stat VDO * ------------- * <31:0> : USB-IF assigned XID for this cable */ #define PD_CSTAT_XID(vdo) (vdo) #define VDO_CERT(xid) ((xid) & 0xffffffff) /* * Product VDO * ----------- * <31:16> : USB Product ID * <15:0> : USB bcdDevice */ #define VDO_PRODUCT(pid, bcd) (((pid) & 0xffff) << 16 | ((bcd) & 0xffff)) #define PD_PRODUCT_PID(vdo) (((vdo) >> 16) & 0xffff) /* * UFP VDO (PD Revision 3.0+ only) * -------- * <31:29> :: UFP VDO version * <28> :: Reserved * <27:24> :: Device capability * <23:22> :: Connector type (10b == receptacle, 11b == captive plug) * <21:11> :: Reserved * <10:8> :: Vconn power (AMA only) * <7> :: Vconn required (AMA only, 0b == no, 1b == yes) * <6> :: Vbus required (AMA only, 0b == yes, 1b == no) * <5:3> :: Alternate modes * <2:0> :: USB highest speed */ #define PD_VDO_UFP_DEVCAP(vdo) (((vdo) & GENMASK(27, 24)) >> 24) /* UFP VDO Version */ #define UFP_VDO_VER1_2 2 /* Device Capability */ #define DEV_USB2_CAPABLE BIT(0) #define DEV_USB2_BILLBOARD BIT(1) #define DEV_USB3_CAPABLE BIT(2) #define DEV_USB4_CAPABLE BIT(3) /* Connector Type */ #define UFP_RECEPTACLE 2 #define UFP_CAPTIVE 3 /* Vconn Power (AMA only, set to AMA_VCONN_NOT_REQ if Vconn is not required) */ #define AMA_VCONN_PWR_1W 0 #define AMA_VCONN_PWR_1W5 1 #define AMA_VCONN_PWR_2W 2 #define AMA_VCONN_PWR_3W 3 #define AMA_VCONN_PWR_4W 4 #define AMA_VCONN_PWR_5W 5 #define AMA_VCONN_PWR_6W 6 /* Vconn Required (AMA only) */ #define AMA_VCONN_NOT_REQ 0 #define AMA_VCONN_REQ 1 /* Vbus Required (AMA only) */ #define AMA_VBUS_REQ 0 #define AMA_VBUS_NOT_REQ 1 /* Alternate Modes */ #define UFP_ALTMODE_NOT_SUPP 0 #define UFP_ALTMODE_TBT3 BIT(0) #define UFP_ALTMODE_RECFG BIT(1) #define UFP_ALTMODE_NO_RECFG BIT(2) /* USB Highest Speed */ #define UFP_USB2_ONLY 0 #define UFP_USB32_GEN1 1 #define UFP_USB32_4_GEN2 2 #define UFP_USB4_GEN3 3 #define VDO_UFP(ver, cap, conn, vcpwr, vcr, vbr, alt, spd) \ (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \ | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \ | ((spd) & 0x7)) /* * DFP VDO (PD Revision 3.0+ only) * -------- * <31:29> :: DFP VDO version * <28:27> :: Reserved * <26:24> :: Host capability * <23:22> :: Connector type (10b == receptacle, 11b == captive plug) * <21:5> :: Reserved * <4:0> :: Port number */ #define PD_VDO_DFP_HOSTCAP(vdo) (((vdo) & GENMASK(26, 24)) >> 24) #define DFP_VDO_VER1_1 1 #define HOST_USB2_CAPABLE BIT(0) #define HOST_USB3_CAPABLE BIT(1) #define HOST_USB4_CAPABLE BIT(2) #define DFP_RECEPTACLE 2 #define DFP_CAPTIVE 3 #define VDO_DFP(ver, cap, conn, pnum) \ (((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \ | ((pnum) & 0x1f)) /* * Cable VDO (for both Passive and Active Cable VDO in PD Rev2.0) * --------- * <31:28> :: Cable HW version * <27:24> :: Cable FW version * <23:20> :: Reserved, Shall be set to zero * <19:18> :: type-C to Type-A/B/C/Captive (00b == A, 01 == B, 10 == C, 11 == Captive) * <17> :: Reserved, Shall be set to zero * <16:13> :: cable latency (0001 == <10ns(~1m length)) * <12:11> :: cable termination type (11b == both ends active VCONN req) * <10> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable) * <9> :: SSTX2 Directionality support * <8> :: SSRX1 Directionality support * <7> :: SSRX2 Directionality support * <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A) * <4> :: Vbus through cable (0b == no, 1b == yes) * <3> :: SOP" controller present? (0b == no, 1b == yes) * <2:0> :: USB SS Signaling support * * Passive Cable VDO (PD Rev3.0+) * --------- * <31:28> :: Cable HW version * <27:24> :: Cable FW version * <23:21> :: VDO version * <20> :: Reserved, Shall be set to zero * <19:18> :: Type-C to Type-C/Captive (10b == C, 11b == Captive) * <17> :: Reserved, Shall be set to zero * <16:13> :: cable latency (0001 == <10ns(~1m length)) * <12:11> :: cable termination type (10b == Vconn not req, 01b == Vconn req) * <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V) * <8:7> :: Reserved, Shall be set to zero * <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A) * <4:3> :: Reserved, Shall be set to zero * <2:0> :: USB highest speed * * Active Cable VDO 1 (PD Rev3.0+) * --------- * <31:28> :: Cable HW version * <27:24> :: Cable FW version * <23:21> :: VDO version * <20> :: Reserved, Shall be set to zero * <19:18> :: Connector type (10b == C, 11b == Captive) * <17> :: Reserved, Shall be set to zero * <16:13> :: cable latency (0001 == <10ns(~1m length)) * <12:11> :: cable termination type (10b == one end active, 11b == both ends active VCONN req) * <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V) * <8> :: SBU supported (0b == supported, 1b == not supported) * <7> :: SBU type (0b == passive, 1b == active) * <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A) * <4> :: Vbus through cable (0b == no, 1b == yes) * <3> :: SOP" controller present? (0b == no, 1b == yes) * <2:0> :: USB highest speed */ /* Cable VDO Version */ #define CABLE_VDO_VER1_0 0 #define CABLE_VDO_VER1_3 3 /* Connector Type (_ATYPE and _BTYPE are for PD Rev2.0 only) */ #define CABLE_ATYPE 0 #define CABLE_BTYPE 1 #define CABLE_CTYPE 2 #define CABLE_CAPTIVE 3 /* Cable Latency */ #define CABLE_LATENCY_1M 1 #define CABLE_LATENCY_2M 2 #define CABLE_LATENCY_3M 3 #define CABLE_LATENCY_4M 4 #define CABLE_LATENCY_5M 5 #define CABLE_LATENCY_6M 6 #define CABLE_LATENCY_7M 7 #define CABLE_LATENCY_7M_PLUS 8 /* Cable Termination Type */ #define PCABLE_VCONN_NOT_REQ 0 #define PCABLE_VCONN_REQ 1 #define ACABLE_ONE_END 2 #define ACABLE_BOTH_END 3 /* Maximum Vbus Voltage */ #define CABLE_MAX_VBUS_20V 0 #define CABLE_MAX_VBUS_30V 1 #define CABLE_MAX_VBUS_40V 2 #define CABLE_MAX_VBUS_50V 3 /* Active Cable SBU Supported/Type */ #define ACABLE_SBU_SUPP 0 #define ACABLE_SBU_NOT_SUPP 1 #define ACABLE_SBU_PASSIVE 0 #define ACABLE_SBU_ACTIVE 1 /* Vbus Current Handling Capability */ #define CABLE_CURR_DEF 0 #define CABLE_CURR_3A 1 #define CABLE_CURR_5A 2 /* USB SuperSpeed Signaling Support (PD Rev2.0) */ #define CABLE_USBSS_U2_ONLY 0 #define CABLE_USBSS_U31_GEN1 1 #define CABLE_USBSS_U31_GEN2 2 /* USB Highest Speed */ #define CABLE_USB2_ONLY 0 #define CABLE_USB32_GEN1 1 #define CABLE_USB32_4_GEN2 2 #define CABLE_USB4_GEN3 3 #define VDO_CABLE(hw, fw, cbl, lat, term, tx1d, tx2d, rx1d, rx2d, cur, vps, sopp, usbss) \ (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18 \ | ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 | (tx1d) << 10 \ | (tx2d) << 9 | (rx1d) << 8 | (rx2d) << 7 | ((cur) & 0x3) << 5 \ | (vps) << 4 | (sopp) << 3 | ((usbss) & 0x7)) #define VDO_PCABLE(hw, fw, ver, conn, lat, term, vbm, cur, spd) \ (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \ | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \ | ((vbm) & 0x3) << 9 | ((cur) & 0x3) << 5 | ((spd) & 0x7)) #define VDO_ACABLE1(hw, fw, ver, conn, lat, term, vbm, sbu, sbut, cur, vbt, sopp, spd) \ (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \ | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \ | ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5 \ | (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7)) #define VDO_TYPEC_CABLE_TYPE(vdo) (((vdo) >> 18) & 0x3) /* * Active Cable VDO 2 * --------- * <31:24> :: Maximum operating temperature * <23:16> :: Shutdown temperature * <15> :: Reserved, Shall be set to zero * <14:12> :: U3/CLd power * <11> :: U3 to U0 transition mode (0b == direct, 1b == through U3S) * <10> :: Physical connection (0b == copper, 1b == optical) * <9> :: Active element (0b == redriver, 1b == retimer) * <8> :: USB4 supported (0b == yes, 1b == no) * <7:6> :: USB2 hub hops consumed * <5> :: USB2 supported (0b == yes, 1b == no) * <4> :: USB3.2 supported (0b == yes, 1b == no) * <3> :: USB lanes supported (0b == one lane, 1b == two lanes) * <2> :: Optically isolated active cable (0b == no, 1b == yes) * <1> :: Reserved, Shall be set to zero * <0> :: USB gen (0b == gen1, 1b == gen2+) */ /* U3/CLd Power*/ #define ACAB2_U3_CLD_10MW_PLUS 0 #define ACAB2_U3_CLD_10MW 1 #define ACAB2_U3_CLD_5MW 2 #define ACAB2_U3_CLD_1MW 3 #define ACAB2_U3_CLD_500UW 4 #define ACAB2_U3_CLD_200UW 5 #define ACAB2_U3_CLD_50UW 6 /* Other Active Cable VDO 2 Fields */ #define ACAB2_U3U0_DIRECT 0 #define ACAB2_U3U0_U3S 1 #define ACAB2_PHY_COPPER 0 #define ACAB2_PHY_OPTICAL 1 #define ACAB2_REDRIVER 0 #define ACAB2_RETIMER 1 #define ACAB2_USB4_SUPP 0 #define ACAB2_USB4_NOT_SUPP 1 #define ACAB2_USB2_SUPP 0 #define ACAB2_USB2_NOT_SUPP 1 #define ACAB2_USB32_SUPP 0 #define ACAB2_USB32_NOT_SUPP 1 #define ACAB2_LANES_ONE 0 #define ACAB2_LANES_TWO 1 #define ACAB2_OPT_ISO_NO 0 #define ACAB2_OPT_ISO_YES 1 #define ACAB2_GEN_1 0 #define ACAB2_GEN_2_PLUS 1 #define VDO_ACABLE2(mtemp, stemp, u3p, trans, phy, ele, u4, hops, u2, u32, lane, iso, gen) \ (((mtemp) & 0xff) << 24 | ((stemp) & 0xff) << 16 | ((u3p) & 0x7) << 12 \ | (trans) << 11 | (phy) << 10 | (ele) << 9 | (u4) << 8 \ | ((hops) & 0x3) << 6 | (u2) << 5 | (u32) << 4 | (lane) << 3 \ | (iso) << 2 | (gen)) /* * AMA VDO (PD Rev2.0) * --------- * <31:28> :: Cable HW version * <27:24> :: Cable FW version * <23:12> :: Reserved, Shall be set to zero * <11> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable) * <10> :: SSTX2 Directionality support * <9> :: SSRX1 Directionality support * <8> :: SSRX2 Directionality support * <7:5> :: Vconn power * <4> :: Vconn power required * <3> :: Vbus power required * <2:0> :: USB SS Signaling support */ #define VDO_AMA(hw, fw, tx1d, tx2d, rx1d, rx2d, vcpwr, vcr, vbr, usbss) \ (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 \ | (tx1d) << 11 | (tx2d) << 10 | (rx1d) << 9 | (rx2d) << 8 \ | ((vcpwr) & 0x7) << 5 | (vcr) << 4 | (vbr) << 3 \ | ((usbss) & 0x7)) #define PD_VDO_AMA_VCONN_REQ(vdo) (((vdo) >> 4) & 1) #define PD_VDO_AMA_VBUS_REQ(vdo) (((vdo) >> 3) & 1) #define AMA_USBSS_U2_ONLY 0 #define AMA_USBSS_U31_GEN1 1 #define AMA_USBSS_U31_GEN2 2 #define AMA_USBSS_BBONLY 3 /* * VPD VDO * --------- * <31:28> :: HW version * <27:24> :: FW version * <23:21> :: VDO version * <20:17> :: Reserved, Shall be set to zero * <16:15> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V) * <14> :: Charge through current support (0b == 3A, 1b == 5A) * <13> :: Reserved, Shall be set to zero * <12:7> :: Vbus impedance * <6:1> :: Ground impedance * <0> :: Charge through support (0b == no, 1b == yes) */ #define VPD_VDO_VER1_0 0 #define VPD_MAX_VBUS_20V 0 #define VPD_MAX_VBUS_30V 1 #define VPD_MAX_VBUS_40V 2 #define VPD_MAX_VBUS_50V 3 #define VPDCT_CURR_3A 0 #define VPDCT_CURR_5A 1 #define VPDCT_NOT_SUPP 0 #define VPDCT_SUPP 1 #define VDO_VPD(hw, fw, ver, vbm, curr, vbi, gi, ct) \ (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \ | ((vbm) & 0x3) << 15 | (curr) << 14 | ((vbi) & 0x3f) << 7 \ | ((gi) & 0x3f) << 1 | (ct)) /* * SVDM Discover SVIDs request -> response * * Request is properly formatted VDM Header with discover SVIDs command. * Response is a set of SVIDs of all supported SVIDs with all zero's to * mark the end of SVIDs. If more than 12 SVIDs are supported command SHOULD be * repeated. */ #define VDO_SVID(svid0, svid1) (((svid0) & 0xffff) << 16 | ((svid1) & 0xffff)) #define PD_VDO_SVID_SVID0(vdo) ((vdo) >> 16) #define PD_VDO_SVID_SVID1(vdo) ((vdo) & 0xffff) /* USB-IF SIDs */ #define USB_SID_PD 0xff00 /* power delivery */ #define USB_SID_DISPLAYPORT 0xff01 #define USB_SID_MHL 0xff02 /* Mobile High-Definition Link */ /* VDM command timeouts (in ms) */ #define PD_T_VDM_UNSTRUCTURED 500 #define PD_T_VDM_BUSY 100 #define PD_T_VDM_WAIT_MODE_E 100 #define PD_T_VDM_SNDR_RSP 30 #define PD_T_VDM_E_MODE 25 #define PD_T_VDM_RCVR_RSP 15 #endif /* __LINUX_USB_PD_VDO_H */ PK ! �v�l usb/ezusb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __EZUSB_H #define __EZUSB_H extern int ezusb_fx1_set_reset(struct usb_device *dev, unsigned char reset_bit); extern int ezusb_fx1_ihex_firmware_download(struct usb_device *dev, const char *firmware_path); #endif /* __EZUSB_H */ PK ! ZL3�c c usb/quirks.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This file holds the definitions of quirks found in USB devices. * Only quirks that affect the whole device, not an interface, * belong here. */ #ifndef __LINUX_USB_QUIRKS_H #define __LINUX_USB_QUIRKS_H /* string descriptors must not be fetched using a 255-byte read */ #define USB_QUIRK_STRING_FETCH_255 BIT(0) /* device can't resume correctly so reset it instead */ #define USB_QUIRK_RESET_RESUME BIT(1) /* device can't handle Set-Interface requests */ #define USB_QUIRK_NO_SET_INTF BIT(2) /* device can't handle its Configuration or Interface strings */ #define USB_QUIRK_CONFIG_INTF_STRINGS BIT(3) /* device can't be reset(e.g morph devices), don't use reset */ #define USB_QUIRK_RESET BIT(4) /* device has more interface descriptions than the bNumInterfaces count, and can't handle talking to these interfaces */ #define USB_QUIRK_HONOR_BNUMINTERFACES BIT(5) /* device needs a pause during initialization, after we read the device descriptor */ #define USB_QUIRK_DELAY_INIT BIT(6) /* * For high speed and super speed interrupt endpoints, the USB 2.0 and * USB 3.0 spec require the interval in microframes * (1 microframe = 125 microseconds) to be calculated as * interval = 2 ^ (bInterval-1). * * Devices with this quirk report their bInterval as the result of this * calculation instead of the exponent variable used in the calculation. */ #define USB_QUIRK_LINEAR_UFRAME_INTR_BINTERVAL BIT(7) /* device can't handle device_qualifier descriptor requests */ #define USB_QUIRK_DEVICE_QUALIFIER BIT(8) /* device generates spurious wakeup, ignore remote wakeup capability */ #define USB_QUIRK_IGNORE_REMOTE_WAKEUP BIT(9) /* device can't handle Link Power Management */ #define USB_QUIRK_NO_LPM BIT(10) /* * Device reports its bInterval as linear frames instead of the * USB 2.0 calculation. */ #define USB_QUIRK_LINEAR_FRAME_INTR_BINTERVAL BIT(11) /* * Device needs to be disconnected before suspend to prevent spurious * wakeup. */ #define USB_QUIRK_DISCONNECT_SUSPEND BIT(12) /* Device needs a pause after every control message. */ #define USB_QUIRK_DELAY_CTRL_MSG BIT(13) /* Hub needs extra delay after resetting its port. */ #define USB_QUIRK_HUB_SLOW_RESET BIT(14) /* device has endpoints that should be ignored */ #define USB_QUIRK_ENDPOINT_IGNORE BIT(15) #endif /* __LINUX_USB_QUIRKS_H */ PK ! ;(�� � usb/functionfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_FUNCTIONFS_H__ #define __LINUX_FUNCTIONFS_H__ 1 #include <uapi/linux/usb/functionfs.h> #endif PK ! ��� [ [ usb/ehci_pdriver.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __USB_CORE_EHCI_PDRIVER_H #define __USB_CORE_EHCI_PDRIVER_H struct platform_device; struct usb_hcd; /** * struct usb_ehci_pdata - platform_data for generic ehci driver * * @caps_offset: offset of the EHCI Capability Registers to the start of * the io memory region provided to the driver. * @has_tt: set to 1 if TT is integrated in root hub. * @port_power_on: set to 1 if the controller needs a power up after * initialization. * @port_power_off: set to 1 if the controller needs to be powered down * after initialization. * @no_io_watchdog: set to 1 if the controller does not need the I/O * watchdog to run. * @reset_on_resume: set to 1 if the controller needs to be reset after * a suspend / resume cycle (but can't detect that itself). * * These are general configuration options for the EHCI controller. All of * these options are activating more or less workarounds for some hardware. */ struct usb_ehci_pdata { int caps_offset; unsigned has_tt:1; unsigned has_synopsys_hc_bug:1; unsigned big_endian_desc:1; unsigned big_endian_mmio:1; unsigned no_io_watchdog:1; unsigned reset_on_resume:1; unsigned dma_mask_64:1; unsigned spurious_oc:1; /* Turn on all power and clocks */ int (*power_on)(struct platform_device *pdev); /* Turn off all power and clocks */ void (*power_off)(struct platform_device *pdev); /* Turn on only VBUS suspend power and hotplug detection, * turn off everything else */ void (*power_suspend)(struct platform_device *pdev); int (*pre_setup)(struct usb_hcd *hcd); }; #endif /* __USB_CORE_EHCI_PDRIVER_H */ PK ! z� 3 3 usb/ehci-dbgp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Standalone EHCI usb debug driver * * Originally written by: * Eric W. Biederman" <ebiederm@xmission.com> and * Yinghai Lu <yhlu.kernel@gmail.com> * * Changes for early/late printk and HW errata: * Jason Wessel <jason.wessel@windriver.com> * Copyright (C) 2009 Wind River Systems, Inc. * */ #ifndef __LINUX_USB_EHCI_DBGP_H #define __LINUX_USB_EHCI_DBGP_H #include <linux/console.h> #include <linux/types.h> /* Appendix C, Debug port ... intended for use with special "debug devices" * that can help if there's no serial console. (nonstandard enumeration.) */ struct ehci_dbg_port { u32 control; #define DBGP_OWNER (1<<30) #define DBGP_ENABLED (1<<28) #define DBGP_DONE (1<<16) #define DBGP_INUSE (1<<10) #define DBGP_ERRCODE(x) (((x)>>7)&0x07) # define DBGP_ERR_BAD 1 # define DBGP_ERR_SIGNAL 2 #define DBGP_ERROR (1<<6) #define DBGP_GO (1<<5) #define DBGP_OUT (1<<4) #define DBGP_LEN(x) (((x)>>0)&0x0f) u32 pids; #define DBGP_PID_GET(x) (((x)>>16)&0xff) #define DBGP_PID_SET(data, tok) (((data)<<8)|(tok)) u32 data03; u32 data47; u32 address; #define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) }; #ifdef CONFIG_EARLY_PRINTK_DBGP extern int early_dbgp_init(char *s); extern struct console early_dbgp_console; #endif /* CONFIG_EARLY_PRINTK_DBGP */ struct usb_hcd; #ifdef CONFIG_XEN_DOM0 extern int xen_dbgp_reset_prep(struct usb_hcd *); extern int xen_dbgp_external_startup(struct usb_hcd *); #else static inline int xen_dbgp_reset_prep(struct usb_hcd *hcd) { return 1; /* Shouldn't this be 0? */ } static inline int xen_dbgp_external_startup(struct usb_hcd *hcd) { return -1; } #endif #ifdef CONFIG_EARLY_PRINTK_DBGP /* Call backs from ehci host driver to ehci debug driver */ extern int dbgp_external_startup(struct usb_hcd *); extern int dbgp_reset_prep(struct usb_hcd *); #else static inline int dbgp_reset_prep(struct usb_hcd *hcd) { return xen_dbgp_reset_prep(hcd); } static inline int dbgp_external_startup(struct usb_hcd *hcd) { return xen_dbgp_external_startup(hcd); } #endif #endif /* __LINUX_USB_EHCI_DBGP_H */ PK ! �t�48^ 8^ usb/net2280.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * NetChip 2280 high/full speed USB device controller. * Unlike many such controllers, this one talks PCI. * * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com) * Copyright (C) 2003 David Brownell * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __LINUX_USB_NET2280_H #define __LINUX_USB_NET2280_H /*-------------------------------------------------------------------------*/ /* NET2280 MEMORY MAPPED REGISTERS * * The register layout came from the chip documentation, and the bit * number definitions were extracted from chip specification. * * Use the shift operator ('<<') to build bit masks, with readl/writel * to access the registers through PCI. */ /* main registers, BAR0 + 0x0000 */ struct net2280_regs { /* offset 0x0000 */ u32 devinit; #define LOCAL_CLOCK_FREQUENCY 8 #define FORCE_PCI_RESET 7 #define PCI_ID 6 #define PCI_ENABLE 5 #define FIFO_SOFT_RESET 4 #define CFG_SOFT_RESET 3 #define PCI_SOFT_RESET 2 #define USB_SOFT_RESET 1 #define M8051_RESET 0 u32 eectl; #define EEPROM_ADDRESS_WIDTH 23 #define EEPROM_CHIP_SELECT_ACTIVE 22 #define EEPROM_PRESENT 21 #define EEPROM_VALID 20 #define EEPROM_BUSY 19 #define EEPROM_CHIP_SELECT_ENABLE 18 #define EEPROM_BYTE_READ_START 17 #define EEPROM_BYTE_WRITE_START 16 #define EEPROM_READ_DATA 8 #define EEPROM_WRITE_DATA 0 u32 eeclkfreq; u32 _unused0; /* offset 0x0010 */ u32 pciirqenb0; /* interrupt PCI master ... */ #define SETUP_PACKET_INTERRUPT_ENABLE 7 #define ENDPOINT_F_INTERRUPT_ENABLE 6 #define ENDPOINT_E_INTERRUPT_ENABLE 5 #define ENDPOINT_D_INTERRUPT_ENABLE 4 #define ENDPOINT_C_INTERRUPT_ENABLE 3 #define ENDPOINT_B_INTERRUPT_ENABLE 2 #define ENDPOINT_A_INTERRUPT_ENABLE 1 #define ENDPOINT_0_INTERRUPT_ENABLE 0 u32 pciirqenb1; #define PCI_INTERRUPT_ENABLE 31 #define POWER_STATE_CHANGE_INTERRUPT_ENABLE 27 #define PCI_ARBITER_TIMEOUT_INTERRUPT_ENABLE 26 #define PCI_PARITY_ERROR_INTERRUPT_ENABLE 25 #define PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE 20 #define PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE 19 #define PCI_TARGET_ABORT_ASSERTED_INTERRUPT_ENABLE 18 #define PCI_RETRY_ABORT_INTERRUPT_ENABLE 17 #define PCI_MASTER_CYCLE_DONE_INTERRUPT_ENABLE 16 #define GPIO_INTERRUPT_ENABLE 13 #define DMA_D_INTERRUPT_ENABLE 12 #define DMA_C_INTERRUPT_ENABLE 11 #define DMA_B_INTERRUPT_ENABLE 10 #define DMA_A_INTERRUPT_ENABLE 9 #define EEPROM_DONE_INTERRUPT_ENABLE 8 #define VBUS_INTERRUPT_ENABLE 7 #define CONTROL_STATUS_INTERRUPT_ENABLE 6 #define ROOT_PORT_RESET_INTERRUPT_ENABLE 4 #define SUSPEND_REQUEST_INTERRUPT_ENABLE 3 #define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 2 #define RESUME_INTERRUPT_ENABLE 1 #define SOF_INTERRUPT_ENABLE 0 u32 cpu_irqenb0; /* ... or onboard 8051 */ #define SETUP_PACKET_INTERRUPT_ENABLE 7 #define ENDPOINT_F_INTERRUPT_ENABLE 6 #define ENDPOINT_E_INTERRUPT_ENABLE 5 #define ENDPOINT_D_INTERRUPT_ENABLE 4 #define ENDPOINT_C_INTERRUPT_ENABLE 3 #define ENDPOINT_B_INTERRUPT_ENABLE 2 #define ENDPOINT_A_INTERRUPT_ENABLE 1 #define ENDPOINT_0_INTERRUPT_ENABLE 0 u32 cpu_irqenb1; #define CPU_INTERRUPT_ENABLE 31 #define POWER_STATE_CHANGE_INTERRUPT_ENABLE 27 #define PCI_ARBITER_TIMEOUT_INTERRUPT_ENABLE 26 #define PCI_PARITY_ERROR_INTERRUPT_ENABLE 25 #define PCI_INTA_INTERRUPT_ENABLE 24 #define PCI_PME_INTERRUPT_ENABLE 23 #define PCI_SERR_INTERRUPT_ENABLE 22 #define PCI_PERR_INTERRUPT_ENABLE 21 #define PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE 20 #define PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE 19 #define PCI_RETRY_ABORT_INTERRUPT_ENABLE 17 #define PCI_MASTER_CYCLE_DONE_INTERRUPT_ENABLE 16 #define GPIO_INTERRUPT_ENABLE 13 #define DMA_D_INTERRUPT_ENABLE 12 #define DMA_C_INTERRUPT_ENABLE 11 #define DMA_B_INTERRUPT_ENABLE 10 #define DMA_A_INTERRUPT_ENABLE 9 #define EEPROM_DONE_INTERRUPT_ENABLE 8 #define VBUS_INTERRUPT_ENABLE 7 #define CONTROL_STATUS_INTERRUPT_ENABLE 6 #define ROOT_PORT_RESET_INTERRUPT_ENABLE 4 #define SUSPEND_REQUEST_INTERRUPT_ENABLE 3 #define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 2 #define RESUME_INTERRUPT_ENABLE 1 #define SOF_INTERRUPT_ENABLE 0 /* offset 0x0020 */ u32 _unused1; u32 usbirqenb1; #define USB_INTERRUPT_ENABLE 31 #define POWER_STATE_CHANGE_INTERRUPT_ENABLE 27 #define PCI_ARBITER_TIMEOUT_INTERRUPT_ENABLE 26 #define PCI_PARITY_ERROR_INTERRUPT_ENABLE 25 #define PCI_INTA_INTERRUPT_ENABLE 24 #define PCI_PME_INTERRUPT_ENABLE 23 #define PCI_SERR_INTERRUPT_ENABLE 22 #define PCI_PERR_INTERRUPT_ENABLE 21 #define PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE 20 #define PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE 19 #define PCI_RETRY_ABORT_INTERRUPT_ENABLE 17 #define PCI_MASTER_CYCLE_DONE_INTERRUPT_ENABLE 16 #define GPIO_INTERRUPT_ENABLE 13 #define DMA_D_INTERRUPT_ENABLE 12 #define DMA_C_INTERRUPT_ENABLE 11 #define DMA_B_INTERRUPT_ENABLE 10 #define DMA_A_INTERRUPT_ENABLE 9 #define EEPROM_DONE_INTERRUPT_ENABLE 8 #define VBUS_INTERRUPT_ENABLE 7 #define CONTROL_STATUS_INTERRUPT_ENABLE 6 #define ROOT_PORT_RESET_INTERRUPT_ENABLE 4 #define SUSPEND_REQUEST_INTERRUPT_ENABLE 3 #define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 2 #define RESUME_INTERRUPT_ENABLE 1 #define SOF_INTERRUPT_ENABLE 0 u32 irqstat0; #define INTA_ASSERTED 12 #define SETUP_PACKET_INTERRUPT 7 #define ENDPOINT_F_INTERRUPT 6 #define ENDPOINT_E_INTERRUPT 5 #define ENDPOINT_D_INTERRUPT 4 #define ENDPOINT_C_INTERRUPT 3 #define ENDPOINT_B_INTERRUPT 2 #define ENDPOINT_A_INTERRUPT 1 #define ENDPOINT_0_INTERRUPT 0 #define USB3380_IRQSTAT0_EP_INTR_MASK_IN (0xF << 17) #define USB3380_IRQSTAT0_EP_INTR_MASK_OUT (0xF << 1) u32 irqstat1; #define POWER_STATE_CHANGE_INTERRUPT 27 #define PCI_ARBITER_TIMEOUT_INTERRUPT 26 #define PCI_PARITY_ERROR_INTERRUPT 25 #define PCI_INTA_INTERRUPT 24 #define PCI_PME_INTERRUPT 23 #define PCI_SERR_INTERRUPT 22 #define PCI_PERR_INTERRUPT 21 #define PCI_MASTER_ABORT_RECEIVED_INTERRUPT 20 #define PCI_TARGET_ABORT_RECEIVED_INTERRUPT 19 #define PCI_RETRY_ABORT_INTERRUPT 17 #define PCI_MASTER_CYCLE_DONE_INTERRUPT 16 #define SOF_DOWN_INTERRUPT 14 #define GPIO_INTERRUPT 13 #define DMA_D_INTERRUPT 12 #define DMA_C_INTERRUPT 11 #define DMA_B_INTERRUPT 10 #define DMA_A_INTERRUPT 9 #define EEPROM_DONE_INTERRUPT 8 #define VBUS_INTERRUPT 7 #define CONTROL_STATUS_INTERRUPT 6 #define ROOT_PORT_RESET_INTERRUPT 4 #define SUSPEND_REQUEST_INTERRUPT 3 #define SUSPEND_REQUEST_CHANGE_INTERRUPT 2 #define RESUME_INTERRUPT 1 #define SOF_INTERRUPT 0 /* offset 0x0030 */ u32 idxaddr; u32 idxdata; u32 fifoctl; #define PCI_BASE2_RANGE 16 #define IGNORE_FIFO_AVAILABILITY 3 #define PCI_BASE2_SELECT 2 #define FIFO_CONFIGURATION_SELECT 0 u32 _unused2; /* offset 0x0040 */ u32 memaddr; #define START 28 #define DIRECTION 27 #define FIFO_DIAGNOSTIC_SELECT 24 #define MEMORY_ADDRESS 0 u32 memdata0; u32 memdata1; u32 _unused3; /* offset 0x0050 */ u32 gpioctl; #define GPIO3_LED_SELECT 12 #define GPIO3_INTERRUPT_ENABLE 11 #define GPIO2_INTERRUPT_ENABLE 10 #define GPIO1_INTERRUPT_ENABLE 9 #define GPIO0_INTERRUPT_ENABLE 8 #define GPIO3_OUTPUT_ENABLE 7 #define GPIO2_OUTPUT_ENABLE 6 #define GPIO1_OUTPUT_ENABLE 5 #define GPIO0_OUTPUT_ENABLE 4 #define GPIO3_DATA 3 #define GPIO2_DATA 2 #define GPIO1_DATA 1 #define GPIO0_DATA 0 u32 gpiostat; #define GPIO3_INTERRUPT 3 #define GPIO2_INTERRUPT 2 #define GPIO1_INTERRUPT 1 #define GPIO0_INTERRUPT 0 } __attribute__ ((packed)); /* usb control, BAR0 + 0x0080 */ struct net2280_usb_regs { /* offset 0x0080 */ u32 stdrsp; #define STALL_UNSUPPORTED_REQUESTS 31 #define SET_TEST_MODE 16 #define GET_OTHER_SPEED_CONFIGURATION 15 #define GET_DEVICE_QUALIFIER 14 #define SET_ADDRESS 13 #define ENDPOINT_SET_CLEAR_HALT 12 #define DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP 11 #define GET_STRING_DESCRIPTOR_2 10 #define GET_STRING_DESCRIPTOR_1 9 #define GET_STRING_DESCRIPTOR_0 8 #define GET_SET_INTERFACE 6 #define GET_SET_CONFIGURATION 5 #define GET_CONFIGURATION_DESCRIPTOR 4 #define GET_DEVICE_DESCRIPTOR 3 #define GET_ENDPOINT_STATUS 2 #define GET_INTERFACE_STATUS 1 #define GET_DEVICE_STATUS 0 u32 prodvendid; #define PRODUCT_ID 16 #define VENDOR_ID 0 u32 relnum; u32 usbctl; #define SERIAL_NUMBER_INDEX 16 #define PRODUCT_ID_STRING_ENABLE 13 #define VENDOR_ID_STRING_ENABLE 12 #define USB_ROOT_PORT_WAKEUP_ENABLE 11 #define VBUS_PIN 10 #define TIMED_DISCONNECT 9 #define SUSPEND_IMMEDIATELY 7 #define SELF_POWERED_USB_DEVICE 6 #define REMOTE_WAKEUP_SUPPORT 5 #define PME_POLARITY 4 #define USB_DETECT_ENABLE 3 #define PME_WAKEUP_ENABLE 2 #define DEVICE_REMOTE_WAKEUP_ENABLE 1 #define SELF_POWERED_STATUS 0 /* offset 0x0090 */ u32 usbstat; #define HIGH_SPEED 7 #define FULL_SPEED 6 #define GENERATE_RESUME 5 #define GENERATE_DEVICE_REMOTE_WAKEUP 4 u32 xcvrdiag; #define FORCE_HIGH_SPEED_MODE 31 #define FORCE_FULL_SPEED_MODE 30 #define USB_TEST_MODE 24 #define LINE_STATE 16 #define TRANSCEIVER_OPERATION_MODE 2 #define TRANSCEIVER_SELECT 1 #define TERMINATION_SELECT 0 u32 setup0123; u32 setup4567; /* offset 0x0090 */ u32 _unused0; u32 ouraddr; #define FORCE_IMMEDIATE 7 #define OUR_USB_ADDRESS 0 u32 ourconfig; } __attribute__ ((packed)); /* pci control, BAR0 + 0x0100 */ struct net2280_pci_regs { /* offset 0x0100 */ u32 pcimstctl; #define PCI_ARBITER_PARK_SELECT 13 #define PCI_MULTI LEVEL_ARBITER 12 #define PCI_RETRY_ABORT_ENABLE 11 #define DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE 10 #define DMA_READ_MULTIPLE_ENABLE 9 #define DMA_READ_LINE_ENABLE 8 #define PCI_MASTER_COMMAND_SELECT 6 #define MEM_READ_OR_WRITE 0 #define IO_READ_OR_WRITE 1 #define CFG_READ_OR_WRITE 2 #define PCI_MASTER_START 5 #define PCI_MASTER_READ_WRITE 4 #define PCI_MASTER_WRITE 0 #define PCI_MASTER_READ 1 #define PCI_MASTER_BYTE_WRITE_ENABLES 0 u32 pcimstaddr; u32 pcimstdata; u32 pcimststat; #define PCI_ARBITER_CLEAR 2 #define PCI_EXTERNAL_ARBITER 1 #define PCI_HOST_MODE 0 } __attribute__ ((packed)); /* dma control, BAR0 + 0x0180 ... array of four structs like this, * for channels 0..3. see also struct net2280_dma: descriptor * that can be loaded into some of these registers. */ struct net2280_dma_regs { /* [11.7] */ /* offset 0x0180, 0x01a0, 0x01c0, 0x01e0, */ u32 dmactl; #define DMA_SCATTER_GATHER_DONE_INTERRUPT_ENABLE 25 #define DMA_CLEAR_COUNT_ENABLE 21 #define DESCRIPTOR_POLLING_RATE 19 #define POLL_CONTINUOUS 0 #define POLL_1_USEC 1 #define POLL_100_USEC 2 #define POLL_1_MSEC 3 #define DMA_VALID_BIT_POLLING_ENABLE 18 #define DMA_VALID_BIT_ENABLE 17 #define DMA_SCATTER_GATHER_ENABLE 16 #define DMA_OUT_AUTO_START_ENABLE 4 #define DMA_PREEMPT_ENABLE 3 #define DMA_FIFO_VALIDATE 2 #define DMA_ENABLE 1 #define DMA_ADDRESS_HOLD 0 u32 dmastat; #define DMA_ABORT_DONE_INTERRUPT 27 #define DMA_SCATTER_GATHER_DONE_INTERRUPT 25 #define DMA_TRANSACTION_DONE_INTERRUPT 24 #define DMA_ABORT 1 #define DMA_START 0 u32 _unused0[2]; /* offset 0x0190, 0x01b0, 0x01d0, 0x01f0, */ u32 dmacount; #define VALID_BIT 31 #define DMA_DIRECTION 30 #define DMA_DONE_INTERRUPT_ENABLE 29 #define END_OF_CHAIN 28 #define DMA_BYTE_COUNT_MASK ((1<<24)-1) #define DMA_BYTE_COUNT 0 u32 dmaaddr; u32 dmadesc; u32 _unused1; } __attribute__ ((packed)); /* dedicated endpoint registers, BAR0 + 0x0200 */ struct net2280_dep_regs { /* [11.8] */ /* offset 0x0200, 0x0210, 0x220, 0x230, 0x240 */ u32 dep_cfg; /* offset 0x0204, 0x0214, 0x224, 0x234, 0x244 */ u32 dep_rsp; u32 _unused[2]; } __attribute__ ((packed)); /* configurable endpoint registers, BAR0 + 0x0300 ... array of seven structs * like this, for ep0 then the configurable endpoints A..F * ep0 reserved for control; E and F have only 64 bytes of fifo */ struct net2280_ep_regs { /* [11.9] */ /* offset 0x0300, 0x0320, 0x0340, 0x0360, 0x0380, 0x03a0, 0x03c0 */ u32 ep_cfg; #define ENDPOINT_BYTE_COUNT 16 #define ENDPOINT_ENABLE 10 #define ENDPOINT_TYPE 8 #define ENDPOINT_DIRECTION 7 #define ENDPOINT_NUMBER 0 u32 ep_rsp; #define SET_NAK_OUT_PACKETS 15 #define SET_EP_HIDE_STATUS_PHASE 14 #define SET_EP_FORCE_CRC_ERROR 13 #define SET_INTERRUPT_MODE 12 #define SET_CONTROL_STATUS_PHASE_HANDSHAKE 11 #define SET_NAK_OUT_PACKETS_MODE 10 #define SET_ENDPOINT_TOGGLE 9 #define SET_ENDPOINT_HALT 8 #define CLEAR_NAK_OUT_PACKETS 7 #define CLEAR_EP_HIDE_STATUS_PHASE 6 #define CLEAR_EP_FORCE_CRC_ERROR 5 #define CLEAR_INTERRUPT_MODE 4 #define CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE 3 #define CLEAR_NAK_OUT_PACKETS_MODE 2 #define CLEAR_ENDPOINT_TOGGLE 1 #define CLEAR_ENDPOINT_HALT 0 u32 ep_irqenb; #define SHORT_PACKET_OUT_DONE_INTERRUPT_ENABLE 6 #define SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE 5 #define DATA_PACKET_RECEIVED_INTERRUPT_ENABLE 3 #define DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE 2 #define DATA_OUT_PING_TOKEN_INTERRUPT_ENABLE 1 #define DATA_IN_TOKEN_INTERRUPT_ENABLE 0 u32 ep_stat; #define FIFO_VALID_COUNT 24 #define HIGH_BANDWIDTH_OUT_TRANSACTION_PID 22 #define TIMEOUT 21 #define USB_STALL_SENT 20 #define USB_IN_NAK_SENT 19 #define USB_IN_ACK_RCVD 18 #define USB_OUT_PING_NAK_SENT 17 #define USB_OUT_ACK_SENT 16 #define FIFO_OVERFLOW 13 #define FIFO_UNDERFLOW 12 #define FIFO_FULL 11 #define FIFO_EMPTY 10 #define FIFO_FLUSH 9 #define SHORT_PACKET_OUT_DONE_INTERRUPT 6 #define SHORT_PACKET_TRANSFERRED_INTERRUPT 5 #define NAK_OUT_PACKETS 4 #define DATA_PACKET_RECEIVED_INTERRUPT 3 #define DATA_PACKET_TRANSMITTED_INTERRUPT 2 #define DATA_OUT_PING_TOKEN_INTERRUPT 1 #define DATA_IN_TOKEN_INTERRUPT 0 /* offset 0x0310, 0x0330, 0x0350, 0x0370, 0x0390, 0x03b0, 0x03d0 */ u32 ep_avail; u32 ep_data; u32 _unused0[2]; } __attribute__ ((packed)); #endif /* __LINUX_USB_NET2280_H */ PK ! �$� � usb/cdc.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * USB CDC common helpers * * Copyright (c) 2015 Oliver Neukum <oneukum@suse.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. */ #ifndef __LINUX_USB_CDC_H #define __LINUX_USB_CDC_H #include <uapi/linux/usb/cdc.h> /* * inofficial magic numbers */ #define CDC_PHONET_MAGIC_NUMBER 0xAB /* * parsing CDC headers */ struct usb_cdc_parsed_header { struct usb_cdc_union_desc *usb_cdc_union_desc; struct usb_cdc_header_desc *usb_cdc_header_desc; struct usb_cdc_call_mgmt_descriptor *usb_cdc_call_mgmt_descriptor; struct usb_cdc_acm_descriptor *usb_cdc_acm_descriptor; struct usb_cdc_country_functional_desc *usb_cdc_country_functional_desc; struct usb_cdc_network_terminal_desc *usb_cdc_network_terminal_desc; struct usb_cdc_ether_desc *usb_cdc_ether_desc; struct usb_cdc_dmm_desc *usb_cdc_dmm_desc; struct usb_cdc_mdlm_desc *usb_cdc_mdlm_desc; struct usb_cdc_mdlm_detail_desc *usb_cdc_mdlm_detail_desc; struct usb_cdc_obex_desc *usb_cdc_obex_desc; struct usb_cdc_ncm_desc *usb_cdc_ncm_desc; struct usb_cdc_mbim_desc *usb_cdc_mbim_desc; struct usb_cdc_mbim_extended_desc *usb_cdc_mbim_extended_desc; bool phonet_magic_present; }; struct usb_interface; int cdc_parse_cdc_header(struct usb_cdc_parsed_header *hdr, struct usb_interface *intf, u8 *buffer, int buflen); #endif /* __LINUX_USB_CDC_H */ PK ! ̟y�� � usb/audio.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * <linux/usb/audio.h> -- USB Audio definitions. * * Copyright (C) 2006 Thumtronics Pty Ltd. * Developed for Thumtronics by Grey Innovation * Ben Williamson <ben.williamson@greyinnovation.com> * * This software is distributed under the terms of the GNU General Public * License ("GPL") version 2, as published by the Free Software Foundation. * * This file holds USB constants and structures defined * by the USB Device Class Definition for Audio Devices. * Comments below reference relevant sections of that document: * * http://www.usb.org/developers/devclass_docs/audio10.pdf * * Types and defines in this file are either specific to version 1.0 of * this standard or common for newer versions. */ #ifndef __LINUX_USB_AUDIO_H #define __LINUX_USB_AUDIO_H #include <uapi/linux/usb/audio.h> struct usb_audio_control { struct list_head list; const char *name; u8 type; int data[5]; int (*set)(struct usb_audio_control *con, u8 cmd, int value); int (*get)(struct usb_audio_control *con, u8 cmd); }; struct usb_audio_control_selector { struct list_head list; struct list_head control; u8 id; const char *name; u8 type; struct usb_descriptor_header *desc; }; #endif /* __LINUX_USB_AUDIO_H */ PK ! r���+ + usb/pd_bdo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2015-2017 Google, Inc */ #ifndef __LINUX_USB_PD_BDO_H #define __LINUX_USB_PD_BDO_H /* BDO : BIST Data Object */ #define BDO_MODE_RECV (0 << 28) #define BDO_MODE_TRANSMIT (1 << 28) #define BDO_MODE_COUNTERS (2 << 28) #define BDO_MODE_CARRIER0 (3 << 28) #define BDO_MODE_CARRIER1 (4 << 28) #define BDO_MODE_CARRIER2 (5 << 28) #define BDO_MODE_CARRIER3 (6 << 28) #define BDO_MODE_EYE (7 << 28) #define BDO_MODE_TESTDATA (8 << 28) #define BDO_MODE_MASK(mode) ((mode) & 0xf0000000) #endif PK ! �-��F F usb/usb_phy_generic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_USB_NOP_XCEIV_H #define __LINUX_USB_NOP_XCEIV_H #include <linux/usb/otg.h> #if IS_ENABLED(CONFIG_NOP_USB_XCEIV) /* sometimes transceivers are accessed only through e.g. ULPI */ extern struct platform_device *usb_phy_generic_register(void); extern void usb_phy_generic_unregister(struct platform_device *); #else static inline struct platform_device *usb_phy_generic_register(void) { return NULL; } static inline void usb_phy_generic_unregister(struct platform_device *pdev) { } #endif #endif /* __LINUX_USB_NOP_XCEIV_H */ PK ! pHdK K usb/c67x00.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * usb_c67x00.h: platform definitions for the Cypress C67X00 USB chip * * Copyright (C) 2006-2008 Barco N.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, * MA 02110-1301 USA. */ #ifndef _LINUX_USB_C67X00_H #define _LINUX_USB_C67X00_H /* SIE configuration */ #define C67X00_SIE_UNUSED 0 #define C67X00_SIE_HOST 1 #define C67X00_SIE_PERIPHERAL_A 2 /* peripheral on A port */ #define C67X00_SIE_PERIPHERAL_B 3 /* peripheral on B port */ #define c67x00_sie_config(config, n) (((config)>>(4*(n)))&0x3) #define C67X00_SIE1_UNUSED (C67X00_SIE_UNUSED << 0) #define C67X00_SIE1_HOST (C67X00_SIE_HOST << 0) #define C67X00_SIE1_PERIPHERAL_A (C67X00_SIE_PERIPHERAL_A << 0) #define C67X00_SIE1_PERIPHERAL_B (C67X00_SIE_PERIPHERAL_B << 0) #define C67X00_SIE2_UNUSED (C67X00_SIE_UNUSED << 4) #define C67X00_SIE2_HOST (C67X00_SIE_HOST << 4) #define C67X00_SIE2_PERIPHERAL_A (C67X00_SIE_PERIPHERAL_A << 4) #define C67X00_SIE2_PERIPHERAL_B (C67X00_SIE_PERIPHERAL_B << 4) struct c67x00_platform_data { int sie_config; /* SIEs config (C67X00_SIEx_*) */ unsigned long hpi_regstep; /* Step between HPI registers */ }; #endif /* _LINUX_USB_C67X00_H */ PK ! .8~� � usb/phy_companion.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * phy-companion.h -- phy companion to indicate the comparator part of PHY * * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * Author: Kishon Vijay Abraham I <kishon@ti.com> * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #ifndef __DRIVERS_PHY_COMPANION_H #define __DRIVERS_PHY_COMPANION_H #include <linux/usb/otg.h> /* phy_companion to take care of VBUS, ID and srp capabilities */ struct phy_companion { /* effective for A-peripheral, ignored for B devices */ int (*set_vbus)(struct phy_companion *x, bool enabled); /* for B devices only: start session with A-Host */ int (*start_srp)(struct phy_companion *x); }; #endif /* __DRIVERS_PHY_COMPANION_H */ PK ! r*�� � usb/input.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2005 Dmitry Torokhov * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. */ #ifndef __LINUX_USB_INPUT_H #define __LINUX_USB_INPUT_H #include <linux/usb.h> #include <linux/input.h> #include <asm/byteorder.h> static inline void usb_to_input_id(const struct usb_device *dev, struct input_id *id) { id->bustype = BUS_USB; id->vendor = le16_to_cpu(dev->descriptor.idVendor); id->product = le16_to_cpu(dev->descriptor.idProduct); id->version = le16_to_cpu(dev->descriptor.bcdDevice); } #endif /* __LINUX_USB_INPUT_H */ PK ! �7�� � usb/typec_altmode.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __USB_TYPEC_ALTMODE_H #define __USB_TYPEC_ALTMODE_H #include <linux/mod_devicetable.h> #include <linux/usb/typec.h> #include <linux/device.h> #define MODE_DISCOVERY_MAX 6 struct typec_altmode_ops; /** * struct typec_altmode - USB Type-C alternate mode device * @dev: Driver model's view of this device * @svid: Standard or Vendor ID (SVID) of the alternate mode * @mode: Index of the Mode * @vdo: VDO returned by Discover Modes USB PD command * @active: Tells has the mode been entered or not * @desc: Optional human readable description of the mode * @ops: Operations vector from the driver */ struct typec_altmode { struct device dev; u16 svid; int mode; u32 vdo; unsigned int active:1; char *desc; const struct typec_altmode_ops *ops; }; #define to_typec_altmode(d) container_of(d, struct typec_altmode, dev) static inline void typec_altmode_set_drvdata(struct typec_altmode *altmode, void *data) { dev_set_drvdata(&altmode->dev, data); } static inline void *typec_altmode_get_drvdata(struct typec_altmode *altmode) { return dev_get_drvdata(&altmode->dev); } /** * struct typec_altmode_ops - Alternate mode specific operations vector * @enter: Operations to be executed with Enter Mode Command * @exit: Operations to be executed with Exit Mode Command * @attention: Callback for Attention Command * @vdm: Callback for SVID specific commands * @notify: Communication channel for platform and the alternate mode * @activate: User callback for Enter/Exit Mode */ struct typec_altmode_ops { int (*enter)(struct typec_altmode *altmode, u32 *vdo); int (*exit)(struct typec_altmode *altmode); void (*attention)(struct typec_altmode *altmode, u32 vdo); int (*vdm)(struct typec_altmode *altmode, const u32 hdr, const u32 *vdo, int cnt); int (*notify)(struct typec_altmode *altmode, unsigned long conf, void *data); int (*activate)(struct typec_altmode *altmode, int activate); }; int typec_altmode_enter(struct typec_altmode *altmode, u32 *vdo); int typec_altmode_exit(struct typec_altmode *altmode); int typec_altmode_attention(struct typec_altmode *altmode, u32 vdo); int typec_altmode_vdm(struct typec_altmode *altmode, const u32 header, const u32 *vdo, int count); int typec_altmode_notify(struct typec_altmode *altmode, unsigned long conf, void *data); const struct typec_altmode * typec_altmode_get_partner(struct typec_altmode *altmode); /* * These are the connector states (USB, Safe and Alt Mode) defined in USB Type-C * Specification. SVID specific connector states are expected to follow and * start from the value TYPEC_STATE_MODAL. */ enum { TYPEC_STATE_SAFE, /* USB Safe State */ TYPEC_STATE_USB, /* USB Operation */ TYPEC_STATE_MODAL, /* Alternate Modes */ }; /* * For the muxes there is no difference between Accessory Modes and Alternate * Modes, so the Accessory Modes are supplied with specific modal state values * here. Unlike with Alternate Modes, where the mux will be linked with the * alternate mode device, the mux for Accessory Modes will be linked with the * port device instead. * * Port drivers can use TYPEC_MODE_AUDIO and TYPEC_MODE_DEBUG as the mode * value for typec_set_mode() when accessory modes are supported. * * USB4 also requires that the pins on the connector are repurposed, just like * Alternate Modes. USB4 mode is however not entered with the Enter Mode Command * like the Alternate Modes are, but instead with a special Enter_USB Message. * The Enter_USB Message can also be used for setting to connector to operate in * USB 3.2 or in USB 2.0 mode instead of USB4. * * The Enter_USB specific "USB Modes" are also supplied here as special modal * state values, just like the Accessory Modes. */ enum { TYPEC_MODE_USB2 = TYPEC_STATE_MODAL, /* USB 2.0 mode */ TYPEC_MODE_USB3, /* USB 3.2 mode */ TYPEC_MODE_USB4, /* USB4 mode */ TYPEC_MODE_AUDIO, /* Audio Accessory */ TYPEC_MODE_DEBUG, /* Debug Accessory */ }; #define TYPEC_MODAL_STATE(_state_) ((_state_) + TYPEC_STATE_MODAL) struct typec_altmode *typec_altmode_get_plug(struct typec_altmode *altmode, enum typec_plug_index index); void typec_altmode_put_plug(struct typec_altmode *plug); struct typec_altmode *typec_match_altmode(struct typec_altmode **altmodes, size_t n, u16 svid, u8 mode); /** * typec_altmode_get_orientation - Get cable plug orientation * altmode: Handle to the alternate mode */ static inline enum typec_orientation typec_altmode_get_orientation(struct typec_altmode *altmode) { return typec_get_orientation(typec_altmode2port(altmode)); } /** * typec_altmode_get_svdm_version - Get negotiated SVDM version * @altmode: Handle to the alternate mode */ static inline int typec_altmode_get_svdm_version(struct typec_altmode *altmode) { return typec_get_negotiated_svdm_version(typec_altmode2port(altmode)); } /** * struct typec_altmode_driver - USB Type-C alternate mode device driver * @id_table: Null terminated array of SVIDs * @probe: Callback for device binding * @remove: Callback for device unbinding * @driver: Device driver model driver * * These drivers will be bind to the partner alternate mode devices. They will * handle all SVID specific communication. */ struct typec_altmode_driver { const struct typec_device_id *id_table; int (*probe)(struct typec_altmode *altmode); void (*remove)(struct typec_altmode *altmode); struct device_driver driver; }; #define to_altmode_driver(d) container_of(d, struct typec_altmode_driver, \ driver) /** * typec_altmode_register_driver - registers a USB Type-C alternate mode * device driver * @drv: pointer to struct typec_altmode_driver * * These drivers will be bind to the partner alternate mode devices. They will * handle all SVID specific communication. */ #define typec_altmode_register_driver(drv) \ __typec_altmode_register_driver(drv, THIS_MODULE) int __typec_altmode_register_driver(struct typec_altmode_driver *drv, struct module *module); /** * typec_altmode_unregister_driver - unregisters a USB Type-C alternate mode * device driver * @drv: pointer to struct typec_altmode_driver * * These drivers will be bind to the partner alternate mode devices. They will * handle all SVID specific communication. */ void typec_altmode_unregister_driver(struct typec_altmode_driver *drv); #define module_typec_altmode_driver(__typec_altmode_driver) \ module_driver(__typec_altmode_driver, typec_altmode_register_driver, \ typec_altmode_unregister_driver) #endif /* __USB_TYPEC_ALTMODE_H */ PK ! fZ���n �n usb/hcd.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2001-2002 by David Brownell * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __USB_CORE_HCD_H #define __USB_CORE_HCD_H #ifdef __KERNEL__ #include <linux/rwsem.h> #include <linux/interrupt.h> #include <linux/idr.h> #define MAX_TOPO_LEVEL 6 /* This file contains declarations of usbcore internals that are mostly * used or exposed by Host Controller Drivers. */ /* * USB Packet IDs (PIDs) */ #define USB_PID_EXT 0xf0 /* USB 2.0 LPM ECN */ #define USB_PID_OUT 0xe1 #define USB_PID_ACK 0xd2 #define USB_PID_DATA0 0xc3 #define USB_PID_PING 0xb4 /* USB 2.0 */ #define USB_PID_SOF 0xa5 #define USB_PID_NYET 0x96 /* USB 2.0 */ #define USB_PID_DATA2 0x87 /* USB 2.0 */ #define USB_PID_SPLIT 0x78 /* USB 2.0 */ #define USB_PID_IN 0x69 #define USB_PID_NAK 0x5a #define USB_PID_DATA1 0x4b #define USB_PID_PREAMBLE 0x3c /* Token mode */ #define USB_PID_ERR 0x3c /* USB 2.0: handshake mode */ #define USB_PID_SETUP 0x2d #define USB_PID_STALL 0x1e #define USB_PID_MDATA 0x0f /* USB 2.0 */ /*-------------------------------------------------------------------------*/ /* * USB Host Controller Driver (usb_hcd) framework * * Since "struct usb_bus" is so thin, you can't share much code in it. * This framework is a layer over that, and should be more shareable. */ /*-------------------------------------------------------------------------*/ struct giveback_urb_bh { bool running; bool high_prio; spinlock_t lock; struct list_head head; struct tasklet_struct bh; struct usb_host_endpoint *completing_ep; }; enum usb_dev_authorize_policy { USB_DEVICE_AUTHORIZE_NONE = 0, USB_DEVICE_AUTHORIZE_ALL = 1, USB_DEVICE_AUTHORIZE_INTERNAL = 2, }; struct usb_hcd { /* * housekeeping */ struct usb_bus self; /* hcd is-a bus */ struct kref kref; /* reference counter */ const char *product_desc; /* product/vendor string */ int speed; /* Speed for this roothub. * May be different from * hcd->driver->flags & HCD_MASK */ char irq_descr[24]; /* driver + bus # */ struct timer_list rh_timer; /* drives root-hub polling */ struct urb *status_urb; /* the current status urb */ #ifdef CONFIG_PM struct work_struct wakeup_work; /* for remote wakeup */ #endif struct work_struct died_work; /* for when the device dies */ /* * hardware info/state */ const struct hc_driver *driver; /* hw-specific hooks */ /* * OTG and some Host controllers need software interaction with phys; * other external phys should be software-transparent */ struct usb_phy *usb_phy; struct usb_phy_roothub *phy_roothub; /* Flags that need to be manipulated atomically because they can * change while the host controller is running. Always use * set_bit() or clear_bit() to change their values. */ unsigned long flags; #define HCD_FLAG_HW_ACCESSIBLE 0 /* at full power */ #define HCD_FLAG_POLL_RH 2 /* poll for rh status? */ #define HCD_FLAG_POLL_PENDING 3 /* status has changed? */ #define HCD_FLAG_WAKEUP_PENDING 4 /* root hub is resuming? */ #define HCD_FLAG_RH_RUNNING 5 /* root hub is running? */ #define HCD_FLAG_DEAD 6 /* controller has died? */ #define HCD_FLAG_INTF_AUTHORIZED 7 /* authorize interfaces? */ #define HCD_FLAG_DEFER_RH_REGISTER 8 /* Defer roothub registration */ /* The flags can be tested using these macros; they are likely to * be slightly faster than test_bit(). */ #define HCD_HW_ACCESSIBLE(hcd) ((hcd)->flags & (1U << HCD_FLAG_HW_ACCESSIBLE)) #define HCD_POLL_RH(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_RH)) #define HCD_POLL_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_PENDING)) #define HCD_WAKEUP_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_WAKEUP_PENDING)) #define HCD_RH_RUNNING(hcd) ((hcd)->flags & (1U << HCD_FLAG_RH_RUNNING)) #define HCD_DEAD(hcd) ((hcd)->flags & (1U << HCD_FLAG_DEAD)) #define HCD_DEFER_RH_REGISTER(hcd) ((hcd)->flags & (1U << HCD_FLAG_DEFER_RH_REGISTER)) /* * Specifies if interfaces are authorized by default * or they require explicit user space authorization; this bit is * settable through /sys/class/usb_host/X/interface_authorized_default */ #define HCD_INTF_AUTHORIZED(hcd) \ ((hcd)->flags & (1U << HCD_FLAG_INTF_AUTHORIZED)) /* * Specifies if devices are authorized by default * or they require explicit user space authorization; this bit is * settable through /sys/class/usb_host/X/authorized_default */ enum usb_dev_authorize_policy dev_policy; /* Flags that get set only during HCD registration or removal. */ unsigned rh_registered:1;/* is root hub registered? */ unsigned rh_pollable:1; /* may we poll the root hub? */ unsigned msix_enabled:1; /* driver has MSI-X enabled? */ unsigned msi_enabled:1; /* driver has MSI enabled? */ /* * do not manage the PHY state in the HCD core, instead let the driver * handle this (for example if the PHY can only be turned on after a * specific event) */ unsigned skip_phy_initialization:1; /* The next flag is a stopgap, to be removed when all the HCDs * support the new root-hub polling mechanism. */ unsigned uses_new_polling:1; unsigned wireless:1; /* Wireless USB HCD */ unsigned has_tt:1; /* Integrated TT in root hub */ unsigned amd_resume_bug:1; /* AMD remote wakeup quirk */ unsigned can_do_streams:1; /* HC supports streams */ unsigned tpl_support:1; /* OTG & EH TPL support */ unsigned cant_recv_wakeups:1; /* wakeup requests from downstream aren't received */ unsigned int irq; /* irq allocated */ void __iomem *regs; /* device memory/io */ resource_size_t rsrc_start; /* memory/io resource start */ resource_size_t rsrc_len; /* memory/io resource length */ unsigned power_budget; /* in mA, 0 = no limit */ struct giveback_urb_bh high_prio_bh; struct giveback_urb_bh low_prio_bh; /* bandwidth_mutex should be taken before adding or removing * any new bus bandwidth constraints: * 1. Before adding a configuration for a new device. * 2. Before removing the configuration to put the device into * the addressed state. * 3. Before selecting a different configuration. * 4. Before selecting an alternate interface setting. * * bandwidth_mutex should be dropped after a successful control message * to the device, or resetting the bandwidth after a failed attempt. */ struct mutex *address0_mutex; struct mutex *bandwidth_mutex; struct usb_hcd *shared_hcd; struct usb_hcd *primary_hcd; #define HCD_BUFFER_POOLS 4 struct dma_pool *pool[HCD_BUFFER_POOLS]; int state; # define __ACTIVE 0x01 # define __SUSPEND 0x04 # define __TRANSIENT 0x80 # define HC_STATE_HALT 0 # define HC_STATE_RUNNING (__ACTIVE) # define HC_STATE_QUIESCING (__SUSPEND|__TRANSIENT|__ACTIVE) # define HC_STATE_RESUMING (__SUSPEND|__TRANSIENT) # define HC_STATE_SUSPENDED (__SUSPEND) #define HC_IS_RUNNING(state) ((state) & __ACTIVE) #define HC_IS_SUSPENDED(state) ((state) & __SUSPEND) /* memory pool for HCs having local memory, or %NULL */ struct gen_pool *localmem_pool; /* more shared queuing code would be good; it should support * smarter scheduling, handle transaction translators, etc; * input size of periodic table to an interrupt scheduler. * (ohci 32, uhci 1024, ehci 256/512/1024). */ /* The HC driver's private data is stored at the end of * this structure. */ unsigned long hcd_priv[] __attribute__ ((aligned(sizeof(s64)))); }; /* 2.4 does this a bit differently ... */ static inline struct usb_bus *hcd_to_bus(struct usb_hcd *hcd) { return &hcd->self; } static inline struct usb_hcd *bus_to_hcd(struct usb_bus *bus) { return container_of(bus, struct usb_hcd, self); } /*-------------------------------------------------------------------------*/ struct hc_driver { const char *description; /* "ehci-hcd" etc */ const char *product_desc; /* product/vendor string */ size_t hcd_priv_size; /* size of private data */ /* irq handler */ irqreturn_t (*irq) (struct usb_hcd *hcd); int flags; #define HCD_MEMORY 0x0001 /* HC regs use memory (else I/O) */ #define HCD_DMA 0x0002 /* HC uses DMA */ #define HCD_SHARED 0x0004 /* Two (or more) usb_hcds share HW */ #define HCD_USB11 0x0010 /* USB 1.1 */ #define HCD_USB2 0x0020 /* USB 2.0 */ #define HCD_USB25 0x0030 /* Wireless USB 1.0 (USB 2.5)*/ #define HCD_USB3 0x0040 /* USB 3.0 */ #define HCD_USB31 0x0050 /* USB 3.1 */ #define HCD_USB32 0x0060 /* USB 3.2 */ #define HCD_MASK 0x0070 #define HCD_BH 0x0100 /* URB complete in BH context */ /* called to init HCD and root hub */ int (*reset) (struct usb_hcd *hcd); int (*start) (struct usb_hcd *hcd); /* NOTE: these suspend/resume calls relate to the HC as * a whole, not just the root hub; they're for PCI bus glue. */ /* called after suspending the hub, before entering D3 etc */ int (*pci_suspend)(struct usb_hcd *hcd, bool do_wakeup); /* called after entering D0 (etc), before resuming the hub */ int (*pci_resume)(struct usb_hcd *hcd, bool hibernated); /* cleanly make HCD stop writing memory and doing I/O */ void (*stop) (struct usb_hcd *hcd); /* shutdown HCD */ void (*shutdown) (struct usb_hcd *hcd); /* return current frame number */ int (*get_frame_number) (struct usb_hcd *hcd); /* manage i/o requests, device state */ int (*urb_enqueue)(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags); int (*urb_dequeue)(struct usb_hcd *hcd, struct urb *urb, int status); /* * (optional) these hooks allow an HCD to override the default DMA * mapping and unmapping routines. In general, they shouldn't be * necessary unless the host controller has special DMA requirements, * such as alignment constraints. If these are not specified, the * general usb_hcd_(un)?map_urb_for_dma functions will be used instead * (and it may be a good idea to call these functions in your HCD * implementation) */ int (*map_urb_for_dma)(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags); void (*unmap_urb_for_dma)(struct usb_hcd *hcd, struct urb *urb); /* hw synch, freeing endpoint resources that urb_dequeue can't */ void (*endpoint_disable)(struct usb_hcd *hcd, struct usb_host_endpoint *ep); /* (optional) reset any endpoint state such as sequence number and current window */ void (*endpoint_reset)(struct usb_hcd *hcd, struct usb_host_endpoint *ep); /* root hub support */ int (*hub_status_data) (struct usb_hcd *hcd, char *buf); int (*hub_control) (struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength); int (*bus_suspend)(struct usb_hcd *); int (*bus_resume)(struct usb_hcd *); int (*start_port_reset)(struct usb_hcd *, unsigned port_num); unsigned long (*get_resuming_ports)(struct usb_hcd *); /* force handover of high-speed port to full-speed companion */ void (*relinquish_port)(struct usb_hcd *, int); /* has a port been handed over to a companion? */ int (*port_handed_over)(struct usb_hcd *, int); /* CLEAR_TT_BUFFER completion callback */ void (*clear_tt_buffer_complete)(struct usb_hcd *, struct usb_host_endpoint *); /* xHCI specific functions */ /* Called by usb_alloc_dev to alloc HC device structures */ int (*alloc_dev)(struct usb_hcd *, struct usb_device *); /* Called by usb_disconnect to free HC device structures */ void (*free_dev)(struct usb_hcd *, struct usb_device *); /* Change a group of bulk endpoints to support multiple stream IDs */ int (*alloc_streams)(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint **eps, unsigned int num_eps, unsigned int num_streams, gfp_t mem_flags); /* Reverts a group of bulk endpoints back to not using stream IDs. * Can fail if we run out of memory. */ int (*free_streams)(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint **eps, unsigned int num_eps, gfp_t mem_flags); /* Bandwidth computation functions */ /* Note that add_endpoint() can only be called once per endpoint before * check_bandwidth() or reset_bandwidth() must be called. * drop_endpoint() can only be called once per endpoint also. * A call to xhci_drop_endpoint() followed by a call to * xhci_add_endpoint() will add the endpoint to the schedule with * possibly new parameters denoted by a different endpoint descriptor * in usb_host_endpoint. A call to xhci_add_endpoint() followed by a * call to xhci_drop_endpoint() is not allowed. */ /* Allocate endpoint resources and add them to a new schedule */ int (*add_endpoint)(struct usb_hcd *, struct usb_device *, struct usb_host_endpoint *); /* Drop an endpoint from a new schedule */ int (*drop_endpoint)(struct usb_hcd *, struct usb_device *, struct usb_host_endpoint *); /* Check that a new hardware configuration, set using * endpoint_enable and endpoint_disable, does not exceed bus * bandwidth. This must be called before any set configuration * or set interface requests are sent to the device. */ int (*check_bandwidth)(struct usb_hcd *, struct usb_device *); /* Reset the device schedule to the last known good schedule, * which was set from a previous successful call to * check_bandwidth(). This reverts any add_endpoint() and * drop_endpoint() calls since that last successful call. * Used for when a check_bandwidth() call fails due to resource * or bandwidth constraints. */ void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *); /* Set the hardware-chosen device address */ int (*address_device)(struct usb_hcd *, struct usb_device *udev, unsigned int timeout_ms); /* prepares the hardware to send commands to the device */ int (*enable_device)(struct usb_hcd *, struct usb_device *udev); /* Notifies the HCD after a hub descriptor is fetched. * Will block. */ int (*update_hub_device)(struct usb_hcd *, struct usb_device *hdev, struct usb_tt *tt, gfp_t mem_flags); int (*reset_device)(struct usb_hcd *, struct usb_device *); /* Notifies the HCD after a device is connected and its * address is set */ int (*update_device)(struct usb_hcd *, struct usb_device *); int (*set_usb2_hw_lpm)(struct usb_hcd *, struct usb_device *, int); /* USB 3.0 Link Power Management */ /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */ int (*enable_usb3_lpm_timeout)(struct usb_hcd *, struct usb_device *, enum usb3_link_state state); /* The xHCI host controller can still fail the command to * disable the LPM timeouts, so this can return an error code. */ int (*disable_usb3_lpm_timeout)(struct usb_hcd *, struct usb_device *, enum usb3_link_state state); int (*find_raw_port_number)(struct usb_hcd *, int); /* Call for power on/off the port if necessary */ int (*port_power)(struct usb_hcd *hcd, int portnum, bool enable); /* Call for SINGLE_STEP_SET_FEATURE Test for USB2 EH certification */ #define EHSET_TEST_SINGLE_STEP_SET_FEATURE 0x06 int (*submit_single_step_set_feature)(struct usb_hcd *, struct urb *, int); }; static inline int hcd_giveback_urb_in_bh(struct usb_hcd *hcd) { return hcd->driver->flags & HCD_BH; } static inline bool hcd_periodic_completion_in_progress(struct usb_hcd *hcd, struct usb_host_endpoint *ep) { return hcd->high_prio_bh.completing_ep == ep; } static inline bool hcd_uses_dma(struct usb_hcd *hcd) { return IS_ENABLED(CONFIG_HAS_DMA) && (hcd->driver->flags & HCD_DMA); } extern int usb_hcd_link_urb_to_ep(struct usb_hcd *hcd, struct urb *urb); extern int usb_hcd_check_unlink_urb(struct usb_hcd *hcd, struct urb *urb, int status); extern void usb_hcd_unlink_urb_from_ep(struct usb_hcd *hcd, struct urb *urb); extern int usb_hcd_submit_urb(struct urb *urb, gfp_t mem_flags); extern int usb_hcd_unlink_urb(struct urb *urb, int status); extern void usb_hcd_giveback_urb(struct usb_hcd *hcd, struct urb *urb, int status); extern int usb_hcd_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags); extern void usb_hcd_unmap_urb_setup_for_dma(struct usb_hcd *, struct urb *); extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *); extern void usb_hcd_flush_endpoint(struct usb_device *udev, struct usb_host_endpoint *ep); extern void usb_hcd_disable_endpoint(struct usb_device *udev, struct usb_host_endpoint *ep); extern void usb_hcd_reset_endpoint(struct usb_device *udev, struct usb_host_endpoint *ep); extern void usb_hcd_synchronize_unlinks(struct usb_device *udev); extern int usb_hcd_alloc_bandwidth(struct usb_device *udev, struct usb_host_config *new_config, struct usb_host_interface *old_alt, struct usb_host_interface *new_alt); extern int usb_hcd_get_frame_number(struct usb_device *udev); struct usb_hcd *__usb_create_hcd(const struct hc_driver *driver, struct device *sysdev, struct device *dev, const char *bus_name, struct usb_hcd *primary_hcd); extern struct usb_hcd *usb_create_hcd(const struct hc_driver *driver, struct device *dev, const char *bus_name); extern struct usb_hcd *usb_create_shared_hcd(const struct hc_driver *driver, struct device *dev, const char *bus_name, struct usb_hcd *shared_hcd); extern struct usb_hcd *usb_get_hcd(struct usb_hcd *hcd); extern void usb_put_hcd(struct usb_hcd *hcd); extern int usb_hcd_is_primary_hcd(struct usb_hcd *hcd); extern int usb_add_hcd(struct usb_hcd *hcd, unsigned int irqnum, unsigned long irqflags); extern void usb_remove_hcd(struct usb_hcd *hcd); extern int usb_hcd_find_raw_port_number(struct usb_hcd *hcd, int port1); int usb_hcd_setup_local_mem(struct usb_hcd *hcd, phys_addr_t phys_addr, dma_addr_t dma, size_t size); struct platform_device; extern void usb_hcd_platform_shutdown(struct platform_device *dev); #ifdef CONFIG_USB_HCD_TEST_MODE extern int ehset_single_step_set_feature(struct usb_hcd *hcd, int port); #else static inline int ehset_single_step_set_feature(struct usb_hcd *hcd, int port) { return 0; } #endif /* CONFIG_USB_HCD_TEST_MODE */ #ifdef CONFIG_USB_PCI struct pci_dev; struct pci_device_id; extern int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id, const struct hc_driver *driver); extern void usb_hcd_pci_remove(struct pci_dev *dev); extern void usb_hcd_pci_shutdown(struct pci_dev *dev); extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev); extern const struct dev_pm_ops usb_hcd_pci_pm_ops; #endif /* CONFIG_USB_PCI */ /* pci-ish (pdev null is ok) buffer alloc/mapping support */ void usb_init_pool_max(void); int hcd_buffer_create(struct usb_hcd *hcd); void hcd_buffer_destroy(struct usb_hcd *hcd); void *hcd_buffer_alloc(struct usb_bus *bus, size_t size, gfp_t mem_flags, dma_addr_t *dma); void hcd_buffer_free(struct usb_bus *bus, size_t size, void *addr, dma_addr_t dma); void *hcd_buffer_alloc_pages(struct usb_hcd *hcd, size_t size, gfp_t mem_flags, dma_addr_t *dma); void hcd_buffer_free_pages(struct usb_hcd *hcd, size_t size, void *addr, dma_addr_t dma); /* generic bus glue, needed for host controllers that don't use PCI */ extern irqreturn_t usb_hcd_irq(int irq, void *__hcd); extern void usb_hc_died(struct usb_hcd *hcd); extern void usb_hcd_poll_rh_status(struct usb_hcd *hcd); extern void usb_wakeup_notification(struct usb_device *hdev, unsigned int portnum); extern void usb_hcd_start_port_resume(struct usb_bus *bus, int portnum); extern void usb_hcd_end_port_resume(struct usb_bus *bus, int portnum); /* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */ #define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1) #define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep))) #define usb_settoggle(dev, ep, out, bit) \ ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \ ((bit) << (ep))) /* -------------------------------------------------------------------------- */ /* Enumeration is only for the hub driver, or HCD virtual root hubs */ extern struct usb_device *usb_alloc_dev(struct usb_device *parent, struct usb_bus *, unsigned port); extern int usb_new_device(struct usb_device *dev); extern void usb_disconnect(struct usb_device **); extern int usb_get_configuration(struct usb_device *dev); extern void usb_destroy_configuration(struct usb_device *dev); /*-------------------------------------------------------------------------*/ /* * HCD Root Hub support */ #include <linux/usb/ch11.h> /* * As of USB 2.0, full/low speed devices are segregated into trees. * One type grows from USB 1.1 host controllers (OHCI, UHCI etc). * The other type grows from high speed hubs when they connect to * full/low speed devices using "Transaction Translators" (TTs). * * TTs should only be known to the hub driver, and high speed bus * drivers (only EHCI for now). They affect periodic scheduling and * sometimes control/bulk error recovery. */ struct usb_device; struct usb_tt { struct usb_device *hub; /* upstream highspeed hub */ int multi; /* true means one TT per port */ unsigned think_time; /* think time in ns */ void *hcpriv; /* HCD private data */ /* for control/bulk error recovery (CLEAR_TT_BUFFER) */ spinlock_t lock; struct list_head clear_list; /* of usb_tt_clear */ struct work_struct clear_work; }; struct usb_tt_clear { struct list_head clear_list; unsigned tt; u16 devinfo; struct usb_hcd *hcd; struct usb_host_endpoint *ep; }; extern int usb_hub_clear_tt_buffer(struct urb *urb); extern void usb_ep0_reinit(struct usb_device *); /* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */ #define DeviceRequest \ ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8) #define DeviceOutRequest \ ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_DEVICE)<<8) #define InterfaceRequest \ ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) #define EndpointRequest \ ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT)<<8) #define EndpointOutRequest \ ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT)<<8) /* class requests from the USB 2.0 hub spec, table 11-15 */ #define HUB_CLASS_REQ(dir, type, request) ((((dir) | (type)) << 8) | (request)) /* GetBusState and SetHubDescriptor are optional, omitted */ #define ClearHubFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, USB_REQ_CLEAR_FEATURE) #define ClearPortFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, USB_REQ_CLEAR_FEATURE) #define GetHubDescriptor HUB_CLASS_REQ(USB_DIR_IN, USB_RT_HUB, USB_REQ_GET_DESCRIPTOR) #define GetHubStatus HUB_CLASS_REQ(USB_DIR_IN, USB_RT_HUB, USB_REQ_GET_STATUS) #define GetPortStatus HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, USB_REQ_GET_STATUS) #define SetHubFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, USB_REQ_SET_FEATURE) #define SetPortFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, USB_REQ_SET_FEATURE) #define ClearTTBuffer HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, HUB_CLEAR_TT_BUFFER) #define ResetTT HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, HUB_RESET_TT) #define GetTTState HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, HUB_GET_TT_STATE) #define StopTT HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, HUB_STOP_TT) /*-------------------------------------------------------------------------*/ /* class requests from USB 3.1 hub spec, table 10-7 */ #define SetHubDepth HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, HUB_SET_DEPTH) #define GetPortErrorCount HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, HUB_GET_PORT_ERR_COUNT) /* * Generic bandwidth allocation constants/support */ #define FRAME_TIME_USECS 1000L #define BitTime(bytecount) (7 * 8 * bytecount / 6) /* with integer truncation */ /* Trying not to use worst-case bit-stuffing * of (7/6 * 8 * bytecount) = 9.33 * bytecount */ /* bytecount = data payload byte count */ #define NS_TO_US(ns) DIV_ROUND_UP(ns, 1000L) /* convert nanoseconds to microseconds, rounding up */ /* * Full/low speed bandwidth allocation constants/support. */ #define BW_HOST_DELAY 1000L /* nanoseconds */ #define BW_HUB_LS_SETUP 333L /* nanoseconds */ /* 4 full-speed bit times (est.) */ #define FRAME_TIME_BITS 12000L /* frame = 1 millisecond */ #define FRAME_TIME_MAX_BITS_ALLOC (90L * FRAME_TIME_BITS / 100L) #define FRAME_TIME_MAX_USECS_ALLOC (90L * FRAME_TIME_USECS / 100L) /* * Ceiling [nano/micro]seconds (typical) for that many bytes at high speed * ISO is a bit less, no ACK ... from USB 2.0 spec, 5.11.3 (and needed * to preallocate bandwidth) */ #define USB2_HOST_DELAY 5 /* nsec, guess */ #define HS_NSECS(bytes) (((55 * 8 * 2083) \ + (2083UL * (3 + BitTime(bytes))))/1000 \ + USB2_HOST_DELAY) #define HS_NSECS_ISO(bytes) (((38 * 8 * 2083) \ + (2083UL * (3 + BitTime(bytes))))/1000 \ + USB2_HOST_DELAY) #define HS_USECS(bytes) NS_TO_US(HS_NSECS(bytes)) #define HS_USECS_ISO(bytes) NS_TO_US(HS_NSECS_ISO(bytes)) extern long usb_calc_bus_time(int speed, int is_input, int isoc, int bytecount); /*-------------------------------------------------------------------------*/ extern void usb_set_device_state(struct usb_device *udev, enum usb_device_state new_state); /*-------------------------------------------------------------------------*/ /* exported only within usbcore */ extern struct idr usb_bus_idr; extern struct mutex usb_bus_idr_lock; extern wait_queue_head_t usb_kill_urb_queue; #define usb_endpoint_out(ep_dir) (!((ep_dir) & USB_DIR_IN)) #ifdef CONFIG_PM extern unsigned usb_wakeup_enabled_descendants(struct usb_device *udev); extern void usb_root_hub_lost_power(struct usb_device *rhdev); extern int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg); extern int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg); extern void usb_hcd_resume_root_hub(struct usb_hcd *hcd); #else static inline unsigned usb_wakeup_enabled_descendants(struct usb_device *udev) { return 0; } static inline void usb_hcd_resume_root_hub(struct usb_hcd *hcd) { return; } #endif /* CONFIG_PM */ /*-------------------------------------------------------------------------*/ #if defined(CONFIG_USB_MON) || defined(CONFIG_USB_MON_MODULE) struct usb_mon_operations { void (*urb_submit)(struct usb_bus *bus, struct urb *urb); void (*urb_submit_error)(struct usb_bus *bus, struct urb *urb, int err); void (*urb_complete)(struct usb_bus *bus, struct urb *urb, int status); /* void (*urb_unlink)(struct usb_bus *bus, struct urb *urb); */ }; extern const struct usb_mon_operations *mon_ops; static inline void usbmon_urb_submit(struct usb_bus *bus, struct urb *urb) { if (bus->monitored) (*mon_ops->urb_submit)(bus, urb); } static inline void usbmon_urb_submit_error(struct usb_bus *bus, struct urb *urb, int error) { if (bus->monitored) (*mon_ops->urb_submit_error)(bus, urb, error); } static inline void usbmon_urb_complete(struct usb_bus *bus, struct urb *urb, int status) { if (bus->monitored) (*mon_ops->urb_complete)(bus, urb, status); } int usb_mon_register(const struct usb_mon_operations *ops); void usb_mon_deregister(void); #else static inline void usbmon_urb_submit(struct usb_bus *bus, struct urb *urb) {} static inline void usbmon_urb_submit_error(struct usb_bus *bus, struct urb *urb, int error) {} static inline void usbmon_urb_complete(struct usb_bus *bus, struct urb *urb, int status) {} #endif /* CONFIG_USB_MON || CONFIG_USB_MON_MODULE */ /*-------------------------------------------------------------------------*/ /* random stuff */ /* This rwsem is for use only by the hub driver and ehci-hcd. * Nobody else should touch it. */ extern struct rw_semaphore ehci_cf_port_reset_rwsem; /* Keep track of which host controller drivers are loaded */ #define USB_UHCI_LOADED 0 #define USB_OHCI_LOADED 1 #define USB_EHCI_LOADED 2 extern unsigned long usb_hcds_loaded; #endif /* __KERNEL__ */ #endif /* __USB_CORE_HCD_H */ PK ! �SX usb/musb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This is used to for host and peripheral modes of the driver for * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC. * * Board initialization should put one of these into dev->platform_data, * probably on some platform_device named "musb-hdrc". It encapsulates * key configuration differences between boards. */ #ifndef __LINUX_USB_MUSB_H #define __LINUX_USB_MUSB_H /* The USB role is defined by the connector used on the board, so long as * standards are being followed. (Developer boards sometimes won't.) */ enum musb_mode { MUSB_UNDEFINED = 0, MUSB_HOST, /* A or Mini-A connector */ MUSB_PERIPHERAL, /* B or Mini-B connector */ MUSB_OTG /* Mini-AB connector */ }; struct clk; enum musb_fifo_style { FIFO_RXTX, FIFO_TX, FIFO_RX } __attribute__ ((packed)); enum musb_buf_mode { BUF_SINGLE, BUF_DOUBLE } __attribute__ ((packed)); struct musb_fifo_cfg { u8 hw_ep_num; enum musb_fifo_style style; enum musb_buf_mode mode; u16 maxpacket; }; #define MUSB_EP_FIFO(ep, st, m, pkt) \ { \ .hw_ep_num = ep, \ .style = st, \ .mode = m, \ .maxpacket = pkt, \ } #define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \ MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt) #define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \ MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt) struct musb_hdrc_eps_bits { const char name[16]; u8 bits; }; struct musb_hdrc_config { struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */ unsigned fifo_cfg_size; /* size of the fifo configuration */ /* MUSB configuration-specific details */ unsigned multipoint:1; /* multipoint device */ unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */ /* need to explicitly de-assert the port reset after resume? */ unsigned host_port_deassert_reset_at_resume:1; u8 num_eps; /* number of endpoints _with_ ep0 */ u8 ram_bits; /* ram address size */ u32 maximum_speed; }; struct musb_hdrc_platform_data { /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */ u8 mode; /* for clk_get() */ const char *clock; /* (HOST or OTG) switch VBUS on/off */ int (*set_vbus)(struct device *dev, int is_on); /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */ u8 power; /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */ u8 min_power; /* (HOST or OTG) msec/2 after VBUS on till power good */ u8 potpgt; /* (HOST or OTG) program PHY for external Vbus */ unsigned extvbus:1; /* Power the device on or off */ int (*set_power)(int state); /* MUSB configuration-specific details */ const struct musb_hdrc_config *config; /* Architecture specific board data */ void *board_data; /* Platform specific struct musb_ops pointer */ const void *platform_ops; }; enum musb_vbus_id_status { MUSB_UNKNOWN = 0, MUSB_ID_GROUND, MUSB_ID_FLOAT, MUSB_VBUS_VALID, MUSB_VBUS_OFF, }; #if IS_ENABLED(CONFIG_USB_MUSB_HDRC) int musb_mailbox(enum musb_vbus_id_status status); #else static inline int musb_mailbox(enum musb_vbus_id_status status) { return 0; } #endif /* TUSB 6010 support */ #define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */ #define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */ #define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */ #ifdef CONFIG_ARCH_OMAP2 extern int __init tusb6010_setup_interface( struct musb_hdrc_platform_data *data, unsigned ps_refclk, unsigned waitpin, unsigned async_cs, unsigned sync_cs, unsigned irq, unsigned dmachan); extern int tusb6010_platform_retime(unsigned is_refclk); #endif /* OMAP2 */ #endif /* __LINUX_USB_MUSB_H */ PK ! !�� V V usb/otg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* USB OTG (On The Go) defines */ /* * * These APIs may be used between USB controllers. USB device drivers * (for either host or peripheral roles) don't use these calls; they * continue to use just usb_device and usb_gadget. */ #ifndef __LINUX_USB_OTG_H #define __LINUX_USB_OTG_H #include <linux/phy/phy.h> #include <linux/usb/phy.h> struct usb_otg { u8 default_a; struct phy *phy; /* old usb_phy interface */ struct usb_phy *usb_phy; struct usb_bus *host; struct usb_gadget *gadget; enum usb_otg_state state; /* bind/unbind the host controller */ int (*set_host)(struct usb_otg *otg, struct usb_bus *host); /* bind/unbind the peripheral controller */ int (*set_peripheral)(struct usb_otg *otg, struct usb_gadget *gadget); /* effective for A-peripheral, ignored for B devices */ int (*set_vbus)(struct usb_otg *otg, bool enabled); /* for B devices only: start session with A-Host */ int (*start_srp)(struct usb_otg *otg); /* start or continue HNP role switch */ int (*start_hnp)(struct usb_otg *otg); }; /** * struct usb_otg_caps - describes the otg capabilities of the device * @otg_rev: The OTG revision number the device is compliant with, it's * in binary-coded decimal (i.e. 2.0 is 0200H). * @hnp_support: Indicates if the device supports HNP. * @srp_support: Indicates if the device supports SRP. * @adp_support: Indicates if the device supports ADP. */ struct usb_otg_caps { u16 otg_rev; bool hnp_support; bool srp_support; bool adp_support; }; extern const char *usb_otg_state_string(enum usb_otg_state state); /* Context: can sleep */ static inline int otg_start_hnp(struct usb_otg *otg) { if (otg && otg->start_hnp) return otg->start_hnp(otg); return -ENOTSUPP; } /* Context: can sleep */ static inline int otg_set_vbus(struct usb_otg *otg, bool enabled) { if (otg && otg->set_vbus) return otg->set_vbus(otg, enabled); return -ENOTSUPP; } /* for HCDs */ static inline int otg_set_host(struct usb_otg *otg, struct usb_bus *host) { if (otg && otg->set_host) return otg->set_host(otg, host); return -ENOTSUPP; } /* for usb peripheral controller drivers */ /* Context: can sleep */ static inline int otg_set_peripheral(struct usb_otg *otg, struct usb_gadget *periph) { if (otg && otg->set_peripheral) return otg->set_peripheral(otg, periph); return -ENOTSUPP; } static inline int otg_start_srp(struct usb_otg *otg) { if (otg && otg->start_srp) return otg->start_srp(otg); return -ENOTSUPP; } /* for OTG controller drivers (and maybe other stuff) */ extern int usb_bus_start_enum(struct usb_bus *bus, unsigned port_num); enum usb_dr_mode { USB_DR_MODE_UNKNOWN, USB_DR_MODE_HOST, USB_DR_MODE_PERIPHERAL, USB_DR_MODE_OTG, }; /** * usb_get_dr_mode - Get dual role mode for given device * @dev: Pointer to the given device * * The function gets phy interface string from property 'dr_mode', * and returns the corresponding enum usb_dr_mode */ extern enum usb_dr_mode usb_get_dr_mode(struct device *dev); extern enum usb_dr_mode usb_get_role_switch_default_mode(struct device *dev); #endif /* __LINUX_USB_OTG_H */ PK ! ZL \� � usb/cdc-wdm.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * USB CDC Device Management subdriver * * Copyright (c) 2012 Bjørn Mork <bjorn@mork.no> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. */ #ifndef __LINUX_USB_CDC_WDM_H #define __LINUX_USB_CDC_WDM_H #include <linux/wwan.h> #include <uapi/linux/usb/cdc-wdm.h> extern struct usb_driver *usb_cdc_wdm_register(struct usb_interface *intf, struct usb_endpoint_descriptor *ep, int bufsize, enum wwan_port_type type, int (*manage_power)(struct usb_interface *, int)); #endif /* __LINUX_USB_CDC_WDM_H */ PK ! ~>�C C usb/typec_mux.hnu �[��� // SPDX-License-Identifier: GPL-2.0 #ifndef __USB_TYPEC_MUX #define __USB_TYPEC_MUX #include <linux/property.h> #include <linux/usb/typec.h> struct device; struct typec_mux; struct typec_switch; struct typec_altmode; struct fwnode_handle; typedef int (*typec_switch_set_fn_t)(struct typec_switch *sw, enum typec_orientation orientation); struct typec_switch_desc { struct fwnode_handle *fwnode; typec_switch_set_fn_t set; const char *name; void *drvdata; }; struct typec_switch *fwnode_typec_switch_get(struct fwnode_handle *fwnode); void typec_switch_put(struct typec_switch *sw); int typec_switch_set(struct typec_switch *sw, enum typec_orientation orientation); static inline struct typec_switch *typec_switch_get(struct device *dev) { return fwnode_typec_switch_get(dev_fwnode(dev)); } struct typec_switch * typec_switch_register(struct device *parent, const struct typec_switch_desc *desc); void typec_switch_unregister(struct typec_switch *sw); void typec_switch_set_drvdata(struct typec_switch *sw, void *data); void *typec_switch_get_drvdata(struct typec_switch *sw); struct typec_mux_state { struct typec_altmode *alt; unsigned long mode; void *data; }; typedef int (*typec_mux_set_fn_t)(struct typec_mux *mux, struct typec_mux_state *state); struct typec_mux_desc { struct fwnode_handle *fwnode; typec_mux_set_fn_t set; const char *name; void *drvdata; }; struct typec_mux *fwnode_typec_mux_get(struct fwnode_handle *fwnode, const struct typec_altmode_desc *desc); void typec_mux_put(struct typec_mux *mux); int typec_mux_set(struct typec_mux *mux, struct typec_mux_state *state); static inline struct typec_mux * typec_mux_get(struct device *dev, const struct typec_altmode_desc *desc) { return fwnode_typec_mux_get(dev_fwnode(dev), desc); } struct typec_mux * typec_mux_register(struct device *parent, const struct typec_mux_desc *desc); void typec_mux_unregister(struct typec_mux *mux); void typec_mux_set_drvdata(struct typec_mux *mux, void *data); void *typec_mux_get_drvdata(struct typec_mux *mux); #endif /* __USB_TYPEC_MUX */ PK ! ts4 C C usb/of.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * OF helpers for usb devices. * * This file is released under the GPLv2 */ #ifndef __LINUX_USB_OF_H #define __LINUX_USB_OF_H #include <linux/usb/ch9.h> #include <linux/usb/otg.h> #include <linux/usb/phy.h> struct usb_device; #if IS_ENABLED(CONFIG_OF) enum usb_dr_mode of_usb_get_dr_mode_by_phy(struct device_node *np, int arg0); bool of_usb_host_tpl_support(struct device_node *np); int of_usb_update_otg_caps(struct device_node *np, struct usb_otg_caps *otg_caps); struct device_node *usb_of_get_device_node(struct usb_device *hub, int port1); bool usb_of_has_combined_node(struct usb_device *udev); struct device_node *usb_of_get_interface_node(struct usb_device *udev, u8 config, u8 ifnum); struct device *usb_of_get_companion_dev(struct device *dev); #else static inline enum usb_dr_mode of_usb_get_dr_mode_by_phy(struct device_node *np, int arg0) { return USB_DR_MODE_UNKNOWN; } static inline bool of_usb_host_tpl_support(struct device_node *np) { return false; } static inline int of_usb_update_otg_caps(struct device_node *np, struct usb_otg_caps *otg_caps) { return 0; } static inline struct device_node * usb_of_get_device_node(struct usb_device *hub, int port1) { return NULL; } static inline bool usb_of_has_combined_node(struct usb_device *udev) { return false; } static inline struct device_node * usb_of_get_interface_node(struct usb_device *udev, u8 config, u8 ifnum) { return NULL; } static inline struct device *usb_of_get_companion_dev(struct device *dev) { return NULL; } #endif #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_USB_SUPPORT) enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np); #else static inline enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np) { return USBPHY_INTERFACE_MODE_UNKNOWN; } #endif #endif /* __LINUX_USB_OF_H */ PK ! �#�q� � usb/m66592.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * M66592 driver platform data * * Copyright (C) 2009 Renesas Solutions Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ #ifndef __LINUX_USB_M66592_H #define __LINUX_USB_M66592_H #define M66592_PLATDATA_XTAL_12MHZ 0x01 #define M66592_PLATDATA_XTAL_24MHZ 0x02 #define M66592_PLATDATA_XTAL_48MHZ 0x03 struct m66592_platdata { /* one = on chip controller, zero = external controller */ unsigned on_chip:1; /* one = big endian, zero = little endian */ unsigned endian:1; /* (external controller only) M66592_PLATDATA_XTAL_nnMHZ */ unsigned xtal:2; /* (external controller only) one = 3.3V, zero = 1.5V */ unsigned vif:1; /* (external controller only) set one = WR0_N shorted to WR1_N */ unsigned wr0_shorted_to_wr1:1; }; #endif /* __LINUX_USB_M66592_H */ PK ! ����I I usb/uas.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __USB_UAS_H__ #define __USB_UAS_H__ #include <scsi/scsi.h> #include <scsi/scsi_cmnd.h> /* Common header for all IUs */ struct iu { __u8 iu_id; __u8 rsvd1; __be16 tag; } __attribute__((__packed__)); enum { IU_ID_COMMAND = 0x01, IU_ID_STATUS = 0x03, IU_ID_RESPONSE = 0x04, IU_ID_TASK_MGMT = 0x05, IU_ID_READ_READY = 0x06, IU_ID_WRITE_READY = 0x07, }; enum { TMF_ABORT_TASK = 0x01, TMF_ABORT_TASK_SET = 0x02, TMF_CLEAR_TASK_SET = 0x04, TMF_LOGICAL_UNIT_RESET = 0x08, TMF_I_T_NEXUS_RESET = 0x10, TMF_CLEAR_ACA = 0x40, TMF_QUERY_TASK = 0x80, TMF_QUERY_TASK_SET = 0x81, TMF_QUERY_ASYNC_EVENT = 0x82, }; enum { RC_TMF_COMPLETE = 0x00, RC_INVALID_INFO_UNIT = 0x02, RC_TMF_NOT_SUPPORTED = 0x04, RC_TMF_FAILED = 0x05, RC_TMF_SUCCEEDED = 0x08, RC_INCORRECT_LUN = 0x09, RC_OVERLAPPED_TAG = 0x0a, }; struct command_iu { __u8 iu_id; __u8 rsvd1; __be16 tag; __u8 prio_attr; __u8 rsvd5; __u8 len; __u8 rsvd7; struct scsi_lun lun; __u8 cdb[16]; /* XXX: Overflow-checking tools may misunderstand */ } __attribute__((__packed__)); struct task_mgmt_iu { __u8 iu_id; __u8 rsvd1; __be16 tag; __u8 function; __u8 rsvd2; __be16 task_tag; struct scsi_lun lun; } __attribute__((__packed__)); /* * Also used for the Read Ready and Write Ready IUs since they have the * same first four bytes */ struct sense_iu { __u8 iu_id; __u8 rsvd1; __be16 tag; __be16 status_qual; __u8 status; __u8 rsvd7[7]; __be16 len; __u8 sense[SCSI_SENSE_BUFFERSIZE]; } __attribute__((__packed__)); struct response_iu { __u8 iu_id; __u8 rsvd1; __be16 tag; __u8 add_response_info[3]; __u8 response_code; } __attribute__((__packed__)); struct usb_pipe_usage_descriptor { __u8 bLength; __u8 bDescriptorType; __u8 bPipeID; __u8 Reserved; } __attribute__((__packed__)); enum { CMD_PIPE_ID = 1, STATUS_PIPE_ID = 2, DATA_IN_PIPE_ID = 3, DATA_OUT_PIPE_ID = 4, UAS_SIMPLE_TAG = 0, UAS_HEAD_TAG = 1, UAS_ORDERED_TAG = 2, UAS_ACA = 4, }; #endif PK ! ���\ \ usb/isp1362.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * board initialization code should put one of these into dev->platform_data * and place the isp1362 onto platform_bus. */ #ifndef __LINUX_USB_ISP1362_H__ #define __LINUX_USB_ISP1362_H__ struct isp1362_platform_data { /* Enable internal pulldown resistors on downstream ports */ unsigned sel15Kres:1; /* Clock cannot be stopped */ unsigned clknotstop:1; /* On-chip overcurrent protection */ unsigned oc_enable:1; /* INT output polarity */ unsigned int_act_high:1; /* INT edge or level triggered */ unsigned int_edge_triggered:1; /* DREQ output polarity */ unsigned dreq_act_high:1; /* DACK input polarity */ unsigned dack_act_high:1; /* chip can be resumed via H_WAKEUP pin */ unsigned remote_wakeup_connected:1; /* Switch or not to switch (keep always powered) */ unsigned no_power_switching:1; /* Ganged port power switching (0) or individual port power switching (1) */ unsigned power_switching_mode:1; /* Given port_power, msec/2 after power on till power good */ u8 potpg; /* Hardware reset set/clear */ void (*reset) (struct device *dev, int set); /* Clock start/stop */ void (*clock) (struct device *dev, int start); /* Inter-io delay (ns). The chip is picky about access timings; it * expects at least: * 110ns delay between consecutive accesses to DATA_REG, * 300ns delay between access to ADDR_REG and DATA_REG (registers) * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory) * WE MUST NOT be activated during these intervals (even without CS!) */ void (*delay) (struct device *dev, unsigned int delay); }; #endif PK ! ��� � � secretmem.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _LINUX_SECRETMEM_H #define _LINUX_SECRETMEM_H #ifdef CONFIG_SECRETMEM extern const struct address_space_operations secretmem_aops; static inline bool page_is_secretmem(struct page *page) { struct address_space *mapping; /* * Using page_mapping() is quite slow because of the actual call * instruction and repeated compound_head(page) inside the * page_mapping() function. * We know that secretmem pages are not compound, so we can * save a couple of cycles here. */ if (PageCompound(page)) return false; mapping = (struct address_space *) ((unsigned long)page->mapping & ~PAGE_MAPPING_FLAGS); if (!mapping || mapping != page->mapping) return false; return mapping->a_ops == &secretmem_aops; } bool vma_is_secretmem(struct vm_area_struct *vma); bool secretmem_active(void); #else static inline bool vma_is_secretmem(struct vm_area_struct *vma) { return false; } static inline bool page_is_secretmem(struct page *page) { return false; } static inline bool secretmem_active(void) { return false; } #endif /* CONFIG_SECRETMEM */ #endif /* _LINUX_SECRETMEM_H */ PK ! � �� � openvswitch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2007-2011 Nicira Networks. */ #ifndef _LINUX_OPENVSWITCH_H #define _LINUX_OPENVSWITCH_H 1 #include <uapi/linux/openvswitch.h> #define OVS_CLONE_ATTR_EXEC 0 /* Specify an u32 value. When nonzero, * actions in clone will not change flow * keys. False otherwise. */ #endif /* _LINUX_OPENVSWITCH_H */ PK ! wܐH� � nvram.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_NVRAM_H #define _LINUX_NVRAM_H #include <linux/errno.h> #include <uapi/linux/nvram.h> #ifdef CONFIG_PPC #include <asm/machdep.h> #endif /** * struct nvram_ops - NVRAM functionality made available to drivers * @read: validate checksum (if any) then load a range of bytes from NVRAM * @write: store a range of bytes to NVRAM then update checksum (if any) * @read_byte: load a single byte from NVRAM * @write_byte: store a single byte to NVRAM * @get_size: return the fixed number of bytes in the NVRAM * * Architectures which provide an nvram ops struct need not implement all * of these methods. If the NVRAM hardware can be accessed only one byte * at a time then it may be sufficient to provide .read_byte and .write_byte. * If the NVRAM has a checksum (and it is to be checked) the .read and * .write methods can be used to implement that efficiently. * * Portable drivers may use the wrapper functions defined here. * The nvram_read() and nvram_write() functions call the .read and .write * methods when available and fall back on the .read_byte and .write_byte * methods otherwise. */ struct nvram_ops { ssize_t (*get_size)(void); unsigned char (*read_byte)(int); void (*write_byte)(unsigned char, int); ssize_t (*read)(char *, size_t, loff_t *); ssize_t (*write)(char *, size_t, loff_t *); #if defined(CONFIG_X86) || defined(CONFIG_M68K) long (*initialize)(void); long (*set_checksum)(void); #endif }; extern const struct nvram_ops arch_nvram_ops; static inline ssize_t nvram_get_size(void) { #ifdef CONFIG_PPC if (ppc_md.nvram_size) return ppc_md.nvram_size(); #else if (arch_nvram_ops.get_size) return arch_nvram_ops.get_size(); #endif return -ENODEV; } static inline unsigned char nvram_read_byte(int addr) { #ifdef CONFIG_PPC if (ppc_md.nvram_read_val) return ppc_md.nvram_read_val(addr); #else if (arch_nvram_ops.read_byte) return arch_nvram_ops.read_byte(addr); #endif return 0xFF; } static inline void nvram_write_byte(unsigned char val, int addr) { #ifdef CONFIG_PPC if (ppc_md.nvram_write_val) ppc_md.nvram_write_val(addr, val); #else if (arch_nvram_ops.write_byte) arch_nvram_ops.write_byte(val, addr); #endif } static inline ssize_t nvram_read_bytes(char *buf, size_t count, loff_t *ppos) { ssize_t nvram_size = nvram_get_size(); loff_t i; char *p = buf; if (nvram_size < 0) return nvram_size; for (i = *ppos; count > 0 && i < nvram_size; ++i, ++p, --count) *p = nvram_read_byte(i); *ppos = i; return p - buf; } static inline ssize_t nvram_write_bytes(char *buf, size_t count, loff_t *ppos) { ssize_t nvram_size = nvram_get_size(); loff_t i; char *p = buf; if (nvram_size < 0) return nvram_size; for (i = *ppos; count > 0 && i < nvram_size; ++i, ++p, --count) nvram_write_byte(*p, i); *ppos = i; return p - buf; } static inline ssize_t nvram_read(char *buf, size_t count, loff_t *ppos) { #ifdef CONFIG_PPC if (ppc_md.nvram_read) return ppc_md.nvram_read(buf, count, ppos); #else if (arch_nvram_ops.read) return arch_nvram_ops.read(buf, count, ppos); #endif return nvram_read_bytes(buf, count, ppos); } static inline ssize_t nvram_write(char *buf, size_t count, loff_t *ppos) { #ifdef CONFIG_PPC if (ppc_md.nvram_write) return ppc_md.nvram_write(buf, count, ppos); #else if (arch_nvram_ops.write) return arch_nvram_ops.write(buf, count, ppos); #endif return nvram_write_bytes(buf, count, ppos); } #endif /* _LINUX_NVRAM_H */ PK ! �*NL L sram.hnu �[��� /* * Generic SRAM Driver Interface * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __LINUX_SRAM_H__ #define __LINUX_SRAM_H__ struct gen_pool; #ifdef CONFIG_SRAM_EXEC void *sram_exec_copy(struct gen_pool *pool, void *dst, void *src, size_t size); #else static inline void *sram_exec_copy(struct gen_pool *pool, void *dst, void *src, size_t size) { return NULL; } #endif /* CONFIG_SRAM_EXEC */ #endif /* __LINUX_SRAM_H__ */ PK ! °'6� � time.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TIME_H #define _LINUX_TIME_H # include <linux/cache.h> # include <linux/math64.h> # include <linux/time64.h> extern struct timezone sys_tz; int get_timespec64(struct timespec64 *ts, const struct __kernel_timespec __user *uts); int put_timespec64(const struct timespec64 *ts, struct __kernel_timespec __user *uts); int get_itimerspec64(struct itimerspec64 *it, const struct __kernel_itimerspec __user *uit); int put_itimerspec64(const struct itimerspec64 *it, struct __kernel_itimerspec __user *uit); extern time64_t mktime64(const unsigned int year, const unsigned int mon, const unsigned int day, const unsigned int hour, const unsigned int min, const unsigned int sec); #ifdef CONFIG_POSIX_TIMERS extern void clear_itimer(void); #else static inline void clear_itimer(void) {} #endif extern long do_utimes(int dfd, const char __user *filename, struct timespec64 *times, int flags); /* * Similar to the struct tm in userspace <time.h>, but it needs to be here so * that the kernel source is self contained. */ struct tm { /* * the number of seconds after the minute, normally in the range * 0 to 59, but can be up to 60 to allow for leap seconds */ int tm_sec; /* the number of minutes after the hour, in the range 0 to 59*/ int tm_min; /* the number of hours past midnight, in the range 0 to 23 */ int tm_hour; /* the day of the month, in the range 1 to 31 */ int tm_mday; /* the number of months since January, in the range 0 to 11 */ int tm_mon; /* the number of years since 1900 */ long tm_year; /* the number of days since Sunday, in the range 0 to 6 */ int tm_wday; /* the number of days since January 1, in the range 0 to 365 */ int tm_yday; }; void time64_to_tm(time64_t totalsecs, int offset, struct tm *result); # include <linux/time32.h> static inline bool itimerspec64_valid(const struct itimerspec64 *its) { if (!timespec64_valid(&(its->it_interval)) || !timespec64_valid(&(its->it_value))) return false; return true; } /** * time_after32 - compare two 32-bit relative times * @a: the time which may be after @b * @b: the time which may be before @a * * time_after32(a, b) returns true if the time @a is after time @b. * time_before32(b, a) returns true if the time @b is before time @a. * * Similar to time_after(), compare two 32-bit timestamps for relative * times. This is useful for comparing 32-bit seconds values that can't * be converted to 64-bit values (e.g. due to disk format or wire protocol * issues) when it is known that the times are less than 68 years apart. */ #define time_after32(a, b) ((s32)((u32)(b) - (u32)(a)) < 0) #define time_before32(b, a) time_after32(a, b) /** * time_between32 - check if a 32-bit timestamp is within a given time range * @t: the time which may be within [l,h] * @l: the lower bound of the range * @h: the higher bound of the range * * time_before32(t, l, h) returns true if @l <= @t <= @h. All operands are * treated as 32-bit integers. * * Equivalent to !(time_before32(@t, @l) || time_after32(@t, @h)). */ #define time_between32(t, l, h) ((u32)(h) - (u32)(l) >= (u32)(t) - (u32)(l)) # include <vdso/time.h> #endif PK ! �@0� � net/intel/iidc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (C) 2021, Intel Corporation. */ #ifndef _IIDC_H_ #define _IIDC_H_ #include <linux/auxiliary_bus.h> #include <linux/dcbnl.h> #include <linux/device.h> #include <linux/if_ether.h> #include <linux/kernel.h> #include <linux/netdevice.h> enum iidc_event_type { IIDC_EVENT_BEFORE_MTU_CHANGE, IIDC_EVENT_AFTER_MTU_CHANGE, IIDC_EVENT_BEFORE_TC_CHANGE, IIDC_EVENT_AFTER_TC_CHANGE, IIDC_EVENT_CRIT_ERR, IIDC_EVENT_NBITS /* must be last */ }; enum iidc_reset_type { IIDC_PFR, IIDC_CORER, IIDC_GLOBR, }; #define IIDC_MAX_USER_PRIORITY 8 /* Struct to hold per RDMA Qset info */ struct iidc_rdma_qset_params { /* Qset TEID returned to the RDMA driver in * ice_add_rdma_qset and used by RDMA driver * for calls to ice_del_rdma_qset */ u32 teid; /* Qset TEID */ u16 qs_handle; /* RDMA driver provides this */ u16 vport_id; /* VSI index */ u8 tc; /* TC branch the Qset should belong to */ }; struct iidc_qos_info { u64 tc_ctx; u8 rel_bw; u8 prio_type; u8 egress_virt_up; u8 ingress_virt_up; }; /* Struct to pass QoS info */ struct iidc_qos_params { struct iidc_qos_info tc_info[IEEE_8021QAZ_MAX_TCS]; u8 up2tc[IIDC_MAX_USER_PRIORITY]; u8 vport_relative_bw; u8 vport_priority_type; u8 num_tc; }; struct iidc_event { DECLARE_BITMAP(type, IIDC_EVENT_NBITS); u32 reg; }; struct ice_pf; int ice_add_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset); int ice_del_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset); int ice_rdma_request_reset(struct ice_pf *pf, enum iidc_reset_type reset_type); int ice_rdma_update_vsi_filter(struct ice_pf *pf, u16 vsi_id, bool enable); void ice_get_qos_params(struct ice_pf *pf, struct iidc_qos_params *qos); #define IIDC_RDMA_ROCE_NAME "roce" /* Structure representing auxiliary driver tailored information about the core * PCI dev, each auxiliary driver using the IIDC interface will have an * instance of this struct dedicated to it. */ struct iidc_auxiliary_dev { struct auxiliary_device adev; struct ice_pf *pf; }; /* structure representing the auxiliary driver. This struct is to be * allocated and populated by the auxiliary driver's owner. The core PCI * driver will access these ops by performing a container_of on the * auxiliary_device->dev.driver. */ struct iidc_auxiliary_drv { struct auxiliary_driver adrv; /* This event_handler is meant to be a blocking call. For instance, * when a BEFORE_MTU_CHANGE event comes in, the event_handler will not * return until the auxiliary driver is ready for the MTU change to * happen. */ void (*event_handler)(struct ice_pf *pf, struct iidc_event *event); }; #endif /* _IIDC_H_*/ PK ! q�#� net/intel/i40e_client.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright(c) 2013 - 2018 Intel Corporation. */ #ifndef _I40E_CLIENT_H_ #define _I40E_CLIENT_H_ #include <linux/auxiliary_bus.h> #define I40E_CLIENT_STR_LENGTH 10 /* Client interface version should be updated anytime there is a change in the * existing APIs or data structures. */ #define I40E_CLIENT_VERSION_MAJOR 0 #define I40E_CLIENT_VERSION_MINOR 01 #define I40E_CLIENT_VERSION_BUILD 00 #define I40E_CLIENT_VERSION_STR \ __stringify(I40E_CLIENT_VERSION_MAJOR) "." \ __stringify(I40E_CLIENT_VERSION_MINOR) "." \ __stringify(I40E_CLIENT_VERSION_BUILD) struct i40e_client_version { u8 major; u8 minor; u8 build; u8 rsvd; }; enum i40e_client_state { __I40E_CLIENT_NULL, __I40E_CLIENT_REGISTERED }; enum i40e_client_instance_state { __I40E_CLIENT_INSTANCE_NONE, __I40E_CLIENT_INSTANCE_OPENED, }; struct i40e_ops; struct i40e_client; #define I40E_QUEUE_INVALID_IDX 0xFFFF struct i40e_qv_info { u32 v_idx; /* msix_vector */ u16 ceq_idx; u16 aeq_idx; u8 itr_idx; }; struct i40e_qvlist_info { u32 num_vectors; struct i40e_qv_info qv_info[]; }; /* set of LAN parameters useful for clients managed by LAN */ /* Struct to hold per priority info */ struct i40e_prio_qos_params { u16 qs_handle; /* qs handle for prio */ u8 tc; /* TC mapped to prio */ u8 reserved; }; #define I40E_CLIENT_MAX_USER_PRIORITY 8 /* Struct to hold Client QoS */ struct i40e_qos_params { struct i40e_prio_qos_params prio_qos[I40E_CLIENT_MAX_USER_PRIORITY]; }; struct i40e_params { struct i40e_qos_params qos; u16 mtu; }; /* Structure to hold Lan device info for a client device */ struct i40e_info { struct i40e_client_version version; u8 lanmac[6]; struct net_device *netdev; struct pci_dev *pcidev; struct auxiliary_device *aux_dev; u8 __iomem *hw_addr; u8 fid; /* function id, PF id or VF id */ #define I40E_CLIENT_FTYPE_PF 0 u8 ftype; /* function type, PF or VF */ void *pf; /* All L2 params that could change during the life span of the PF * and needs to be communicated to the client when they change */ struct i40e_qvlist_info *qvlist_info; struct i40e_params params; struct i40e_ops *ops; u16 msix_count; /* number of msix vectors*/ /* Array down below will be dynamically allocated based on msix_count */ struct msix_entry *msix_entries; u16 itr_index; /* Which ITR index the PE driver is suppose to use */ u16 fw_maj_ver; /* firmware major version */ u16 fw_min_ver; /* firmware minor version */ u32 fw_build; /* firmware build number */ }; struct i40e_auxiliary_device { struct auxiliary_device aux_dev; struct i40e_info *ldev; }; #define I40E_CLIENT_RESET_LEVEL_PF 1 #define I40E_CLIENT_RESET_LEVEL_CORE 2 #define I40E_CLIENT_VSI_FLAG_TCP_ENABLE BIT(1) struct i40e_ops { /* setup_q_vector_list enables queues with a particular vector */ int (*setup_qvlist)(struct i40e_info *ldev, struct i40e_client *client, struct i40e_qvlist_info *qv_info); int (*virtchnl_send)(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id, u8 *msg, u16 len); /* If the PE Engine is unresponsive, RDMA driver can request a reset. * The level helps determine the level of reset being requested. */ void (*request_reset)(struct i40e_info *ldev, struct i40e_client *client, u32 level); /* API for the RDMA driver to set certain VSI flags that control * PE Engine. */ int (*update_vsi_ctxt)(struct i40e_info *ldev, struct i40e_client *client, bool is_vf, u32 vf_id, u32 flag, u32 valid_flag); }; struct i40e_client_ops { /* Should be called from register_client() or whenever PF is ready * to create a specific client instance. */ int (*open)(struct i40e_info *ldev, struct i40e_client *client); /* Should be called when netdev is unavailable or when unregister * call comes in. If the close is happenening due to a reset being * triggered set the reset bit to true. */ void (*close)(struct i40e_info *ldev, struct i40e_client *client, bool reset); /* called when some l2 managed parameters changes - mtu */ void (*l2_param_change)(struct i40e_info *ldev, struct i40e_client *client, struct i40e_params *params); int (*virtchnl_receive)(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id, u8 *msg, u16 len); /* called when a VF is reset by the PF */ void (*vf_reset)(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id); /* called when the number of VFs changes */ void (*vf_enable)(struct i40e_info *ldev, struct i40e_client *client, u32 num_vfs); /* returns true if VF is capable of specified offload */ int (*vf_capable)(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id); }; /* Client device */ struct i40e_client_instance { struct list_head list; struct i40e_info lan_info; struct i40e_client *client; unsigned long state; }; struct i40e_client { struct list_head list; /* list of registered clients */ char name[I40E_CLIENT_STR_LENGTH]; struct i40e_client_version version; unsigned long state; /* client state */ atomic_t ref_cnt; /* Count of all the client devices of this kind */ u32 flags; u8 type; #define I40E_CLIENT_IWARP 0 const struct i40e_client_ops *ops; /* client ops provided by the client */ }; static inline bool i40e_client_is_registered(struct i40e_client *client) { return test_bit(__I40E_CLIENT_REGISTERED, &client->state); } void i40e_client_device_register(struct i40e_info *ldev, struct i40e_client *client); void i40e_client_device_unregister(struct i40e_info *ldev); #endif /* _I40E_CLIENT_H_ */ PK ! �eo7� � trace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TRACE_H #define _LINUX_TRACE_H #define TRACE_EXPORT_FUNCTION BIT(0) #define TRACE_EXPORT_EVENT BIT(1) #define TRACE_EXPORT_MARKER BIT(2) /* * The trace export - an export of Ftrace output. The trace_export * can process traces and export them to a registered destination as * an addition to the current only output of Ftrace - i.e. ring buffer. * * If you want traces to be sent to some other place rather than ring * buffer only, just need to register a new trace_export and implement * its own .write() function for writing traces to the storage. * * next - pointer to the next trace_export * write - copy traces which have been delt with ->commit() to * the destination * flags - which ftrace to be exported */ struct trace_export { struct trace_export __rcu *next; void (*write)(struct trace_export *, const void *, unsigned int); int flags; }; struct trace_array; #ifdef CONFIG_TRACING int register_ftrace_export(struct trace_export *export); int unregister_ftrace_export(struct trace_export *export); /** * trace_array_puts - write a constant string into the trace buffer. * @tr: The trace array to write to * @str: The constant string to write */ #define trace_array_puts(tr, str) \ ({ \ str ? __trace_array_puts(tr, _THIS_IP_, str, strlen(str)) : -1; \ }) int __trace_array_puts(struct trace_array *tr, unsigned long ip, const char *str, int size); void trace_printk_init_buffers(void); __printf(3, 4) int trace_array_printk(struct trace_array *tr, unsigned long ip, const char *fmt, ...); int trace_array_init_printk(struct trace_array *tr); void trace_array_put(struct trace_array *tr); struct trace_array *trace_array_get_by_name(const char *name); int trace_array_destroy(struct trace_array *tr); /* For osnoise tracer */ int osnoise_arch_register(void); void osnoise_arch_unregister(void); void osnoise_trace_irq_entry(int id); void osnoise_trace_irq_exit(int id, const char *desc); #else /* CONFIG_TRACING */ static inline int register_ftrace_export(struct trace_export *export) { return -EINVAL; } static inline int unregister_ftrace_export(struct trace_export *export) { return 0; } static inline void trace_printk_init_buffers(void) { } static inline __printf(3, 4) int trace_array_printk(struct trace_array *tr, unsigned long ip, const char *fmt, ...) { return 0; } static inline int trace_array_init_printk(struct trace_array *tr) { return -EINVAL; } static inline void trace_array_put(struct trace_array *tr) { } static inline struct trace_array *trace_array_get_by_name(const char *name) { return NULL; } static inline int trace_array_destroy(struct trace_array *tr) { return 0; } #endif /* CONFIG_TRACING */ #endif /* _LINUX_TRACE_H */ PK ! �|��}? }? sfp.hnu �[��� #ifndef LINUX_SFP_H #define LINUX_SFP_H #include <linux/phy.h> struct sfp_eeprom_base { u8 phys_id; u8 phys_ext_id; u8 connector; #if defined __BIG_ENDIAN_BITFIELD u8 e10g_base_er:1; u8 e10g_base_lrm:1; u8 e10g_base_lr:1; u8 e10g_base_sr:1; u8 if_1x_sx:1; u8 if_1x_lx:1; u8 if_1x_copper_active:1; u8 if_1x_copper_passive:1; u8 escon_mmf_1310_led:1; u8 escon_smf_1310_laser:1; u8 sonet_oc192_short_reach:1; u8 sonet_reach_bit1:1; u8 sonet_reach_bit2:1; u8 sonet_oc48_long_reach:1; u8 sonet_oc48_intermediate_reach:1; u8 sonet_oc48_short_reach:1; u8 unallocated_5_7:1; u8 sonet_oc12_smf_long_reach:1; u8 sonet_oc12_smf_intermediate_reach:1; u8 sonet_oc12_short_reach:1; u8 unallocated_5_3:1; u8 sonet_oc3_smf_long_reach:1; u8 sonet_oc3_smf_intermediate_reach:1; u8 sonet_oc3_short_reach:1; u8 e_base_px:1; u8 e_base_bx10:1; u8 e100_base_fx:1; u8 e100_base_lx:1; u8 e1000_base_t:1; u8 e1000_base_cx:1; u8 e1000_base_lx:1; u8 e1000_base_sx:1; u8 fc_ll_v:1; u8 fc_ll_s:1; u8 fc_ll_i:1; u8 fc_ll_l:1; u8 fc_ll_m:1; u8 fc_tech_sa:1; u8 fc_tech_lc:1; u8 fc_tech_electrical_inter_enclosure:1; u8 fc_tech_electrical_intra_enclosure:1; u8 fc_tech_sn:1; u8 fc_tech_sl:1; u8 fc_tech_ll:1; u8 sfp_ct_active:1; u8 sfp_ct_passive:1; u8 unallocated_8_1:1; u8 unallocated_8_0:1; u8 fc_media_tw:1; u8 fc_media_tp:1; u8 fc_media_mi:1; u8 fc_media_tv:1; u8 fc_media_m6:1; u8 fc_media_m5:1; u8 unallocated_9_1:1; u8 fc_media_sm:1; u8 fc_speed_1200:1; u8 fc_speed_800:1; u8 fc_speed_1600:1; u8 fc_speed_400:1; u8 fc_speed_3200:1; u8 fc_speed_200:1; u8 unallocated_10_1:1; u8 fc_speed_100:1; #elif defined __LITTLE_ENDIAN_BITFIELD u8 if_1x_copper_passive:1; u8 if_1x_copper_active:1; u8 if_1x_lx:1; u8 if_1x_sx:1; u8 e10g_base_sr:1; u8 e10g_base_lr:1; u8 e10g_base_lrm:1; u8 e10g_base_er:1; u8 sonet_oc3_short_reach:1; u8 sonet_oc3_smf_intermediate_reach:1; u8 sonet_oc3_smf_long_reach:1; u8 unallocated_5_3:1; u8 sonet_oc12_short_reach:1; u8 sonet_oc12_smf_intermediate_reach:1; u8 sonet_oc12_smf_long_reach:1; u8 unallocated_5_7:1; u8 sonet_oc48_short_reach:1; u8 sonet_oc48_intermediate_reach:1; u8 sonet_oc48_long_reach:1; u8 sonet_reach_bit2:1; u8 sonet_reach_bit1:1; u8 sonet_oc192_short_reach:1; u8 escon_smf_1310_laser:1; u8 escon_mmf_1310_led:1; u8 e1000_base_sx:1; u8 e1000_base_lx:1; u8 e1000_base_cx:1; u8 e1000_base_t:1; u8 e100_base_lx:1; u8 e100_base_fx:1; u8 e_base_bx10:1; u8 e_base_px:1; u8 fc_tech_electrical_inter_enclosure:1; u8 fc_tech_lc:1; u8 fc_tech_sa:1; u8 fc_ll_m:1; u8 fc_ll_l:1; u8 fc_ll_i:1; u8 fc_ll_s:1; u8 fc_ll_v:1; u8 unallocated_8_0:1; u8 unallocated_8_1:1; u8 sfp_ct_passive:1; u8 sfp_ct_active:1; u8 fc_tech_ll:1; u8 fc_tech_sl:1; u8 fc_tech_sn:1; u8 fc_tech_electrical_intra_enclosure:1; u8 fc_media_sm:1; u8 unallocated_9_1:1; u8 fc_media_m5:1; u8 fc_media_m6:1; u8 fc_media_tv:1; u8 fc_media_mi:1; u8 fc_media_tp:1; u8 fc_media_tw:1; u8 fc_speed_100:1; u8 unallocated_10_1:1; u8 fc_speed_200:1; u8 fc_speed_3200:1; u8 fc_speed_400:1; u8 fc_speed_1600:1; u8 fc_speed_800:1; u8 fc_speed_1200:1; #else #error Unknown Endian #endif u8 encoding; u8 br_nominal; u8 rate_id; u8 link_len[6]; char vendor_name[16]; u8 extended_cc; char vendor_oui[3]; char vendor_pn[16]; char vendor_rev[4]; union { __be16 optical_wavelength; __be16 cable_compliance; struct { #if defined __BIG_ENDIAN_BITFIELD u8 reserved60_2:6; u8 fc_pi_4_app_h:1; u8 sff8431_app_e:1; u8 reserved61:8; #elif defined __LITTLE_ENDIAN_BITFIELD u8 sff8431_app_e:1; u8 fc_pi_4_app_h:1; u8 reserved60_2:6; u8 reserved61:8; #else #error Unknown Endian #endif } __packed passive; struct { #if defined __BIG_ENDIAN_BITFIELD u8 reserved60_4:4; u8 fc_pi_4_lim:1; u8 sff8431_lim:1; u8 fc_pi_4_app_h:1; u8 sff8431_app_e:1; u8 reserved61:8; #elif defined __LITTLE_ENDIAN_BITFIELD u8 sff8431_app_e:1; u8 fc_pi_4_app_h:1; u8 sff8431_lim:1; u8 fc_pi_4_lim:1; u8 reserved60_4:4; u8 reserved61:8; #else #error Unknown Endian #endif } __packed active; } __packed; u8 reserved62; u8 cc_base; } __packed; struct sfp_eeprom_ext { __be16 options; u8 br_max; u8 br_min; char vendor_sn[16]; char datecode[8]; u8 diagmon; u8 enhopts; u8 sff8472_compliance; u8 cc_ext; } __packed; /** * struct sfp_eeprom_id - raw SFP module identification information * @base: base SFP module identification structure * @ext: extended SFP module identification structure * * See the SFF-8472 specification and related documents for the definition * of these structure members. This can be obtained from * https://www.snia.org/technology-communities/sff/specifications */ struct sfp_eeprom_id { struct sfp_eeprom_base base; struct sfp_eeprom_ext ext; } __packed; struct sfp_diag { __be16 temp_high_alarm; __be16 temp_low_alarm; __be16 temp_high_warn; __be16 temp_low_warn; __be16 volt_high_alarm; __be16 volt_low_alarm; __be16 volt_high_warn; __be16 volt_low_warn; __be16 bias_high_alarm; __be16 bias_low_alarm; __be16 bias_high_warn; __be16 bias_low_warn; __be16 txpwr_high_alarm; __be16 txpwr_low_alarm; __be16 txpwr_high_warn; __be16 txpwr_low_warn; __be16 rxpwr_high_alarm; __be16 rxpwr_low_alarm; __be16 rxpwr_high_warn; __be16 rxpwr_low_warn; __be16 laser_temp_high_alarm; __be16 laser_temp_low_alarm; __be16 laser_temp_high_warn; __be16 laser_temp_low_warn; __be16 tec_cur_high_alarm; __be16 tec_cur_low_alarm; __be16 tec_cur_high_warn; __be16 tec_cur_low_warn; __be32 cal_rxpwr4; __be32 cal_rxpwr3; __be32 cal_rxpwr2; __be32 cal_rxpwr1; __be32 cal_rxpwr0; __be16 cal_txi_slope; __be16 cal_txi_offset; __be16 cal_txpwr_slope; __be16 cal_txpwr_offset; __be16 cal_t_slope; __be16 cal_t_offset; __be16 cal_v_slope; __be16 cal_v_offset; } __packed; /* SFF8024 defined constants */ enum { SFF8024_ID_UNK = 0x00, SFF8024_ID_SFF_8472 = 0x02, SFF8024_ID_SFP = 0x03, SFF8024_ID_DWDM_SFP = 0x0b, SFF8024_ID_QSFP_8438 = 0x0c, SFF8024_ID_QSFP_8436_8636 = 0x0d, SFF8024_ID_QSFP28_8636 = 0x11, SFF8024_ENCODING_UNSPEC = 0x00, SFF8024_ENCODING_8B10B = 0x01, SFF8024_ENCODING_4B5B = 0x02, SFF8024_ENCODING_NRZ = 0x03, SFF8024_ENCODING_8472_MANCHESTER= 0x04, SFF8024_ENCODING_8472_SONET = 0x05, SFF8024_ENCODING_8472_64B66B = 0x06, SFF8024_ENCODING_8436_MANCHESTER= 0x06, SFF8024_ENCODING_8436_SONET = 0x04, SFF8024_ENCODING_8436_64B66B = 0x05, SFF8024_ENCODING_256B257B = 0x07, SFF8024_ENCODING_PAM4 = 0x08, SFF8024_CONNECTOR_UNSPEC = 0x00, /* codes 01-05 not supportable on SFP, but some modules have single SC */ SFF8024_CONNECTOR_SC = 0x01, SFF8024_CONNECTOR_FIBERJACK = 0x06, SFF8024_CONNECTOR_LC = 0x07, SFF8024_CONNECTOR_MT_RJ = 0x08, SFF8024_CONNECTOR_MU = 0x09, SFF8024_CONNECTOR_SG = 0x0a, SFF8024_CONNECTOR_OPTICAL_PIGTAIL= 0x0b, SFF8024_CONNECTOR_MPO_1X12 = 0x0c, SFF8024_CONNECTOR_MPO_2X16 = 0x0d, SFF8024_CONNECTOR_HSSDC_II = 0x20, SFF8024_CONNECTOR_COPPER_PIGTAIL= 0x21, SFF8024_CONNECTOR_RJ45 = 0x22, SFF8024_CONNECTOR_NOSEPARATE = 0x23, SFF8024_CONNECTOR_MXC_2X16 = 0x24, SFF8024_ECC_UNSPEC = 0x00, SFF8024_ECC_100G_25GAUI_C2M_AOC = 0x01, SFF8024_ECC_100GBASE_SR4_25GBASE_SR = 0x02, SFF8024_ECC_100GBASE_LR4_25GBASE_LR = 0x03, SFF8024_ECC_100GBASE_ER4_25GBASE_ER = 0x04, SFF8024_ECC_100GBASE_SR10 = 0x05, SFF8024_ECC_100GBASE_CR4 = 0x0b, SFF8024_ECC_25GBASE_CR_S = 0x0c, SFF8024_ECC_25GBASE_CR_N = 0x0d, SFF8024_ECC_10GBASE_T_SFI = 0x16, SFF8024_ECC_10GBASE_T_SR = 0x1c, SFF8024_ECC_5GBASE_T = 0x1d, SFF8024_ECC_2_5GBASE_T = 0x1e, }; /* SFP EEPROM registers */ enum { SFP_PHYS_ID = 0x00, SFP_PHYS_EXT_ID = 0x01, SFP_CONNECTOR = 0x02, SFP_COMPLIANCE = 0x03, SFP_ENCODING = 0x0b, SFP_BR_NOMINAL = 0x0c, SFP_RATE_ID = 0x0d, SFP_LINK_LEN_SM_KM = 0x0e, SFP_LINK_LEN_SM_100M = 0x0f, SFP_LINK_LEN_50UM_OM2_10M = 0x10, SFP_LINK_LEN_62_5UM_OM1_10M = 0x11, SFP_LINK_LEN_COPPER_1M = 0x12, SFP_LINK_LEN_50UM_OM4_10M = 0x12, SFP_LINK_LEN_50UM_OM3_10M = 0x13, SFP_VENDOR_NAME = 0x14, SFP_VENDOR_OUI = 0x25, SFP_VENDOR_PN = 0x28, SFP_VENDOR_REV = 0x38, SFP_OPTICAL_WAVELENGTH_MSB = 0x3c, SFP_OPTICAL_WAVELENGTH_LSB = 0x3d, SFP_CABLE_SPEC = 0x3c, SFP_CC_BASE = 0x3f, SFP_OPTIONS = 0x40, /* 2 bytes, MSB, LSB */ SFP_BR_MAX = 0x42, SFP_BR_MIN = 0x43, SFP_VENDOR_SN = 0x44, SFP_DATECODE = 0x54, SFP_DIAGMON = 0x5c, SFP_ENHOPTS = 0x5d, SFP_SFF8472_COMPLIANCE = 0x5e, SFP_CC_EXT = 0x5f, SFP_PHYS_EXT_ID_SFP = 0x04, SFP_OPTIONS_HIGH_POWER_LEVEL = BIT(13), SFP_OPTIONS_PAGING_A2 = BIT(12), SFP_OPTIONS_RETIMER = BIT(11), SFP_OPTIONS_COOLED_XCVR = BIT(10), SFP_OPTIONS_POWER_DECL = BIT(9), SFP_OPTIONS_RX_LINEAR_OUT = BIT(8), SFP_OPTIONS_RX_DECISION_THRESH = BIT(7), SFP_OPTIONS_TUNABLE_TX = BIT(6), SFP_OPTIONS_RATE_SELECT = BIT(5), SFP_OPTIONS_TX_DISABLE = BIT(4), SFP_OPTIONS_TX_FAULT = BIT(3), SFP_OPTIONS_LOS_INVERTED = BIT(2), SFP_OPTIONS_LOS_NORMAL = BIT(1), SFP_DIAGMON_DDM = BIT(6), SFP_DIAGMON_INT_CAL = BIT(5), SFP_DIAGMON_EXT_CAL = BIT(4), SFP_DIAGMON_RXPWR_AVG = BIT(3), SFP_DIAGMON_ADDRMODE = BIT(2), SFP_ENHOPTS_ALARMWARN = BIT(7), SFP_ENHOPTS_SOFT_TX_DISABLE = BIT(6), SFP_ENHOPTS_SOFT_TX_FAULT = BIT(5), SFP_ENHOPTS_SOFT_RX_LOS = BIT(4), SFP_ENHOPTS_SOFT_RATE_SELECT = BIT(3), SFP_ENHOPTS_APP_SELECT_SFF8079 = BIT(2), SFP_ENHOPTS_SOFT_RATE_SFF8431 = BIT(1), SFP_SFF8472_COMPLIANCE_NONE = 0x00, SFP_SFF8472_COMPLIANCE_REV9_3 = 0x01, SFP_SFF8472_COMPLIANCE_REV9_5 = 0x02, SFP_SFF8472_COMPLIANCE_REV10_2 = 0x03, SFP_SFF8472_COMPLIANCE_REV10_4 = 0x04, SFP_SFF8472_COMPLIANCE_REV11_0 = 0x05, SFP_SFF8472_COMPLIANCE_REV11_3 = 0x06, SFP_SFF8472_COMPLIANCE_REV11_4 = 0x07, SFP_SFF8472_COMPLIANCE_REV12_0 = 0x08, }; /* SFP Diagnostics */ enum { /* Alarm and warnings stored MSB at lower address then LSB */ SFP_TEMP_HIGH_ALARM = 0x00, SFP_TEMP_LOW_ALARM = 0x02, SFP_TEMP_HIGH_WARN = 0x04, SFP_TEMP_LOW_WARN = 0x06, SFP_VOLT_HIGH_ALARM = 0x08, SFP_VOLT_LOW_ALARM = 0x0a, SFP_VOLT_HIGH_WARN = 0x0c, SFP_VOLT_LOW_WARN = 0x0e, SFP_BIAS_HIGH_ALARM = 0x10, SFP_BIAS_LOW_ALARM = 0x12, SFP_BIAS_HIGH_WARN = 0x14, SFP_BIAS_LOW_WARN = 0x16, SFP_TXPWR_HIGH_ALARM = 0x18, SFP_TXPWR_LOW_ALARM = 0x1a, SFP_TXPWR_HIGH_WARN = 0x1c, SFP_TXPWR_LOW_WARN = 0x1e, SFP_RXPWR_HIGH_ALARM = 0x20, SFP_RXPWR_LOW_ALARM = 0x22, SFP_RXPWR_HIGH_WARN = 0x24, SFP_RXPWR_LOW_WARN = 0x26, SFP_LASER_TEMP_HIGH_ALARM = 0x28, SFP_LASER_TEMP_LOW_ALARM = 0x2a, SFP_LASER_TEMP_HIGH_WARN = 0x2c, SFP_LASER_TEMP_LOW_WARN = 0x2e, SFP_TEC_CUR_HIGH_ALARM = 0x30, SFP_TEC_CUR_LOW_ALARM = 0x32, SFP_TEC_CUR_HIGH_WARN = 0x34, SFP_TEC_CUR_LOW_WARN = 0x36, SFP_CAL_RXPWR4 = 0x38, SFP_CAL_RXPWR3 = 0x3c, SFP_CAL_RXPWR2 = 0x40, SFP_CAL_RXPWR1 = 0x44, SFP_CAL_RXPWR0 = 0x48, SFP_CAL_TXI_SLOPE = 0x4c, SFP_CAL_TXI_OFFSET = 0x4e, SFP_CAL_TXPWR_SLOPE = 0x50, SFP_CAL_TXPWR_OFFSET = 0x52, SFP_CAL_T_SLOPE = 0x54, SFP_CAL_T_OFFSET = 0x56, SFP_CAL_V_SLOPE = 0x58, SFP_CAL_V_OFFSET = 0x5a, SFP_CHKSUM = 0x5f, SFP_TEMP = 0x60, SFP_VCC = 0x62, SFP_TX_BIAS = 0x64, SFP_TX_POWER = 0x66, SFP_RX_POWER = 0x68, SFP_LASER_TEMP = 0x6a, SFP_TEC_CUR = 0x6c, SFP_STATUS = 0x6e, SFP_STATUS_TX_DISABLE = BIT(7), SFP_STATUS_TX_DISABLE_FORCE = BIT(6), SFP_STATUS_TX_FAULT = BIT(2), SFP_STATUS_RX_LOS = BIT(1), SFP_ALARM0 = 0x70, SFP_ALARM0_TEMP_HIGH = BIT(7), SFP_ALARM0_TEMP_LOW = BIT(6), SFP_ALARM0_VCC_HIGH = BIT(5), SFP_ALARM0_VCC_LOW = BIT(4), SFP_ALARM0_TX_BIAS_HIGH = BIT(3), SFP_ALARM0_TX_BIAS_LOW = BIT(2), SFP_ALARM0_TXPWR_HIGH = BIT(1), SFP_ALARM0_TXPWR_LOW = BIT(0), SFP_ALARM1 = 0x71, SFP_ALARM1_RXPWR_HIGH = BIT(7), SFP_ALARM1_RXPWR_LOW = BIT(6), SFP_WARN0 = 0x74, SFP_WARN0_TEMP_HIGH = BIT(7), SFP_WARN0_TEMP_LOW = BIT(6), SFP_WARN0_VCC_HIGH = BIT(5), SFP_WARN0_VCC_LOW = BIT(4), SFP_WARN0_TX_BIAS_HIGH = BIT(3), SFP_WARN0_TX_BIAS_LOW = BIT(2), SFP_WARN0_TXPWR_HIGH = BIT(1), SFP_WARN0_TXPWR_LOW = BIT(0), SFP_WARN1 = 0x75, SFP_WARN1_RXPWR_HIGH = BIT(7), SFP_WARN1_RXPWR_LOW = BIT(6), SFP_EXT_STATUS = 0x76, SFP_VSL = 0x78, SFP_PAGE = 0x7f, }; struct fwnode_handle; struct ethtool_eeprom; struct ethtool_modinfo; struct sfp_bus; /** * struct sfp_upstream_ops - upstream operations structure * @attach: called when the sfp socket driver is bound to the upstream * (mandatory). * @detach: called when the sfp socket driver is unbound from the upstream * (mandatory). * @module_insert: called after a module has been detected to determine * whether the module is supported for the upstream device. * @module_remove: called after the module has been removed. * @module_start: called after the PHY probe step * @module_stop: called before the PHY is removed * @link_down: called when the link is non-operational for whatever * reason. * @link_up: called when the link is operational. * @connect_phy: called when an I2C accessible PHY has been detected * on the module. * @disconnect_phy: called when a module with an I2C accessible PHY has * been removed. */ struct sfp_upstream_ops { void (*attach)(void *priv, struct sfp_bus *bus); void (*detach)(void *priv, struct sfp_bus *bus); int (*module_insert)(void *priv, const struct sfp_eeprom_id *id); void (*module_remove)(void *priv); int (*module_start)(void *priv); void (*module_stop)(void *priv); void (*link_down)(void *priv); void (*link_up)(void *priv); int (*connect_phy)(void *priv, struct phy_device *); void (*disconnect_phy)(void *priv); }; #if IS_ENABLED(CONFIG_SFP) int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id, unsigned long *support); bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id); void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id, unsigned long *support); phy_interface_t sfp_select_interface(struct sfp_bus *bus, unsigned long *link_modes); int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo); int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee, u8 *data); int sfp_get_module_eeprom_by_page(struct sfp_bus *bus, const struct ethtool_module_eeprom *page, struct netlink_ext_ack *extack); void sfp_upstream_start(struct sfp_bus *bus); void sfp_upstream_stop(struct sfp_bus *bus); void sfp_bus_put(struct sfp_bus *bus); struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode); int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, const struct sfp_upstream_ops *ops); void sfp_bus_del_upstream(struct sfp_bus *bus); #else static inline int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id, unsigned long *support) { return PORT_OTHER; } static inline bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id) { return false; } static inline void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id, unsigned long *support) { } static inline phy_interface_t sfp_select_interface(struct sfp_bus *bus, unsigned long *link_modes) { return PHY_INTERFACE_MODE_NA; } static inline int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo) { return -EOPNOTSUPP; } static inline int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee, u8 *data) { return -EOPNOTSUPP; } static inline int sfp_get_module_eeprom_by_page(struct sfp_bus *bus, const struct ethtool_module_eeprom *page, struct netlink_ext_ack *extack) { return -EOPNOTSUPP; } static inline void sfp_upstream_start(struct sfp_bus *bus) { } static inline void sfp_upstream_stop(struct sfp_bus *bus) { } static inline void sfp_bus_put(struct sfp_bus *bus) { } static inline struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode) { return NULL; } static inline int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, const struct sfp_upstream_ops *ops) { return 0; } static inline void sfp_bus_del_upstream(struct sfp_bus *bus) { } #endif #endif PK ! Kg&� � rtc/m48t59.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/rtc/m48t59.h * * Definitions for the platform data of m48t59 RTC chip driver. * * Copyright (c) 2007 Wind River Systems, Inc. * * Mark Zhan <rongkai.zhan@windriver.com> */ #ifndef _LINUX_RTC_M48T59_H_ #define _LINUX_RTC_M48T59_H_ /* * M48T59 Register Offset */ #define M48T59_YEAR 0xf #define M48T59_MONTH 0xe #define M48T59_MDAY 0xd /* Day of Month */ #define M48T59_WDAY 0xc /* Day of Week */ #define M48T59_WDAY_CB 0x20 /* Century Bit */ #define M48T59_WDAY_CEB 0x10 /* Century Enable Bit */ #define M48T59_HOUR 0xb #define M48T59_MIN 0xa #define M48T59_SEC 0x9 #define M48T59_CNTL 0x8 #define M48T59_CNTL_READ 0x40 #define M48T59_CNTL_WRITE 0x80 #define M48T59_WATCHDOG 0x7 #define M48T59_INTR 0x6 #define M48T59_INTR_AFE 0x80 /* Alarm Interrupt Enable */ #define M48T59_INTR_ABE 0x20 #define M48T59_ALARM_DATE 0x5 #define M48T59_ALARM_HOUR 0x4 #define M48T59_ALARM_MIN 0x3 #define M48T59_ALARM_SEC 0x2 #define M48T59_UNUSED 0x1 #define M48T59_FLAGS 0x0 #define M48T59_FLAGS_WDT 0x80 /* watchdog timer expired */ #define M48T59_FLAGS_AF 0x40 /* alarm */ #define M48T59_FLAGS_BF 0x10 /* low battery */ #define M48T59RTC_TYPE_M48T59 0 /* to keep compatibility */ #define M48T59RTC_TYPE_M48T02 1 #define M48T59RTC_TYPE_M48T08 2 struct m48t59_plat_data { /* The method to access M48T59 registers */ void (*write_byte)(struct device *dev, u32 ofs, u8 val); unsigned char (*read_byte)(struct device *dev, u32 ofs); int type; /* RTC model */ /* ioaddr mapped externally */ void __iomem *ioaddr; /* offset to RTC registers, automatically set according to the type */ unsigned int offset; }; #endif /* _LINUX_RTC_M48T59_H_ */ PK ! ����6 �6 rtc/ds1685.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Definitions for the registers, addresses, and platform data of the * DS1685/DS1687-series RTC chips. * * This Driver also works for the DS17X85/DS17X87 RTC chips. Functionally * similar to the DS1685/DS1687, they support a few extra features which * include larger, battery-backed NV-SRAM, burst-mode access, and an RTC * write counter. * * Copyright (C) 2011-2014 Joshua Kinard <kumba@gentoo.org>. * Copyright (C) 2009 Matthias Fuchs <matthias.fuchs@esd-electronics.com>. * * References: * DS1685/DS1687 3V/5V Real-Time Clocks, 19-5215, Rev 4/10. * DS17x85/DS17x87 3V/5V Real-Time Clocks, 19-5222, Rev 4/10. * DS1689/DS1693 3V/5V Serialized Real-Time Clocks, Rev 112105. * Application Note 90, Using the Multiplex Bus RTC Extended Features. */ #ifndef _LINUX_RTC_DS1685_H_ #define _LINUX_RTC_DS1685_H_ #include <linux/rtc.h> #include <linux/platform_device.h> #include <linux/workqueue.h> /** * struct ds1685_priv - DS1685 private data structure. * @dev: pointer to the rtc_device structure. * @regs: iomapped base address pointer of the RTC registers. * @regstep: padding/step size between registers (optional). * @baseaddr: base address of the RTC device. * @size: resource size. * @lock: private lock variable for spin locking/unlocking. * @work: private workqueue. * @irq: IRQ number assigned to the RTC device. * @prepare_poweroff: pointer to platform pre-poweroff function. * @wake_alarm: pointer to platform wake alarm function. * @post_ram_clear: pointer to platform post ram-clear function. */ struct ds1685_priv { struct rtc_device *dev; void __iomem *regs; void __iomem *data; u32 regstep; int irq_num; bool bcd_mode; bool no_irq; u8 (*read)(struct ds1685_priv *, int); void (*write)(struct ds1685_priv *, int, u8); void (*prepare_poweroff)(void); void (*wake_alarm)(void); void (*post_ram_clear)(void); }; /** * struct ds1685_rtc_platform_data - platform data structure. * @plat_prepare_poweroff: platform-specific pre-poweroff function. * @plat_wake_alarm: platform-specific wake alarm function. * @plat_post_ram_clear: platform-specific post ram-clear function. * * If your platform needs to use a custom padding/step size between * registers, or uses one or more of the extended interrupts and needs special * handling, then include this header file in your platform definition and * set regstep and the plat_* pointers as appropriate. */ struct ds1685_rtc_platform_data { const u32 regstep; const bool bcd_mode; const bool no_irq; const bool uie_unsupported; void (*plat_prepare_poweroff)(void); void (*plat_wake_alarm)(void); void (*plat_post_ram_clear)(void); enum { ds1685_reg_direct, ds1685_reg_indirect } access_type; }; /* * Time Registers. */ #define RTC_SECS 0x00 /* Seconds 00-59 */ #define RTC_SECS_ALARM 0x01 /* Alarm Seconds 00-59 */ #define RTC_MINS 0x02 /* Minutes 00-59 */ #define RTC_MINS_ALARM 0x03 /* Alarm Minutes 00-59 */ #define RTC_HRS 0x04 /* Hours 01-12 AM/PM || 00-23 */ #define RTC_HRS_ALARM 0x05 /* Alarm Hours 01-12 AM/PM || 00-23 */ #define RTC_WDAY 0x06 /* Day of Week 01-07 */ #define RTC_MDAY 0x07 /* Day of Month 01-31 */ #define RTC_MONTH 0x08 /* Month 01-12 */ #define RTC_YEAR 0x09 /* Year 00-99 */ #define RTC_CENTURY 0x48 /* Century 00-99 */ #define RTC_MDAY_ALARM 0x49 /* Alarm Day of Month 01-31 */ /* * Bit masks for the Time registers in BCD Mode (DM = 0). */ #define RTC_SECS_BCD_MASK 0x7f /* - x x x x x x x */ #define RTC_MINS_BCD_MASK 0x7f /* - x x x x x x x */ #define RTC_HRS_12_BCD_MASK 0x1f /* - - - x x x x x */ #define RTC_HRS_24_BCD_MASK 0x3f /* - - x x x x x x */ #define RTC_MDAY_BCD_MASK 0x3f /* - - x x x x x x */ #define RTC_MONTH_BCD_MASK 0x1f /* - - - x x x x x */ #define RTC_YEAR_BCD_MASK 0xff /* x x x x x x x x */ /* * Bit masks for the Time registers in BIN Mode (DM = 1). */ #define RTC_SECS_BIN_MASK 0x3f /* - - x x x x x x */ #define RTC_MINS_BIN_MASK 0x3f /* - - x x x x x x */ #define RTC_HRS_12_BIN_MASK 0x0f /* - - - - x x x x */ #define RTC_HRS_24_BIN_MASK 0x1f /* - - - x x x x x */ #define RTC_MDAY_BIN_MASK 0x1f /* - - - x x x x x */ #define RTC_MONTH_BIN_MASK 0x0f /* - - - - x x x x */ #define RTC_YEAR_BIN_MASK 0x7f /* - x x x x x x x */ /* * Bit masks common for the Time registers in BCD or BIN Mode. */ #define RTC_WDAY_MASK 0x07 /* - - - - - x x x */ #define RTC_CENTURY_MASK 0xff /* x x x x x x x x */ #define RTC_MDAY_ALARM_MASK 0xff /* x x x x x x x x */ #define RTC_HRS_AMPM_MASK BIT(7) /* Mask for the AM/PM bit */ /* * Control Registers. */ #define RTC_CTRL_A 0x0a /* Control Register A */ #define RTC_CTRL_B 0x0b /* Control Register B */ #define RTC_CTRL_C 0x0c /* Control Register C */ #define RTC_CTRL_D 0x0d /* Control Register D */ #define RTC_EXT_CTRL_4A 0x4a /* Extended Control Register 4A */ #define RTC_EXT_CTRL_4B 0x4b /* Extended Control Register 4B */ /* * Bit names in Control Register A. */ #define RTC_CTRL_A_UIP BIT(7) /* Update In Progress */ #define RTC_CTRL_A_DV2 BIT(6) /* Countdown Chain */ #define RTC_CTRL_A_DV1 BIT(5) /* Oscillator Enable */ #define RTC_CTRL_A_DV0 BIT(4) /* Bank Select */ #define RTC_CTRL_A_RS2 BIT(2) /* Rate-Selection Bit 2 */ #define RTC_CTRL_A_RS3 BIT(3) /* Rate-Selection Bit 3 */ #define RTC_CTRL_A_RS1 BIT(1) /* Rate-Selection Bit 1 */ #define RTC_CTRL_A_RS0 BIT(0) /* Rate-Selection Bit 0 */ #define RTC_CTRL_A_RS_MASK 0x0f /* RS3 + RS2 + RS1 + RS0 */ /* * Bit names in Control Register B. */ #define RTC_CTRL_B_SET BIT(7) /* SET Bit */ #define RTC_CTRL_B_PIE BIT(6) /* Periodic-Interrupt Enable */ #define RTC_CTRL_B_AIE BIT(5) /* Alarm-Interrupt Enable */ #define RTC_CTRL_B_UIE BIT(4) /* Update-Ended Interrupt-Enable */ #define RTC_CTRL_B_SQWE BIT(3) /* Square-Wave Enable */ #define RTC_CTRL_B_DM BIT(2) /* Data Mode */ #define RTC_CTRL_B_2412 BIT(1) /* 12-Hr/24-Hr Mode */ #define RTC_CTRL_B_DSE BIT(0) /* Daylight Savings Enable */ #define RTC_CTRL_B_PAU_MASK 0x70 /* PIE + AIE + UIE */ /* * Bit names in Control Register C. * * BIT(0), BIT(1), BIT(2), & BIT(3) are unused, always return 0, and cannot * be written to. */ #define RTC_CTRL_C_IRQF BIT(7) /* Interrupt-Request Flag */ #define RTC_CTRL_C_PF BIT(6) /* Periodic-Interrupt Flag */ #define RTC_CTRL_C_AF BIT(5) /* Alarm-Interrupt Flag */ #define RTC_CTRL_C_UF BIT(4) /* Update-Ended Interrupt Flag */ #define RTC_CTRL_C_PAU_MASK 0x70 /* PF + AF + UF */ /* * Bit names in Control Register D. * * BIT(0) through BIT(6) are unused, always return 0, and cannot * be written to. */ #define RTC_CTRL_D_VRT BIT(7) /* Valid RAM and Time */ /* * Bit names in Extended Control Register 4A. * * On the DS1685/DS1687/DS1689/DS1693, BIT(4) and BIT(5) are reserved for * future use. They can be read from and written to, but have no effect * on the RTC's operation. * * On the DS17x85/DS17x87, BIT(5) is Burst-Mode Enable (BME), and allows * access to the extended NV-SRAM by automatically incrementing the address * register when they are read from or written to. */ #define RTC_CTRL_4A_VRT2 BIT(7) /* Auxillary Battery Status */ #define RTC_CTRL_4A_INCR BIT(6) /* Increment-in-Progress Status */ #define RTC_CTRL_4A_PAB BIT(3) /* Power-Active Bar Control */ #define RTC_CTRL_4A_RF BIT(2) /* RAM-Clear Flag */ #define RTC_CTRL_4A_WF BIT(1) /* Wake-Up Alarm Flag */ #define RTC_CTRL_4A_KF BIT(0) /* Kickstart Flag */ #if !defined(CONFIG_RTC_DRV_DS1685) && !defined(CONFIG_RTC_DRV_DS1689) #define RTC_CTRL_4A_BME BIT(5) /* Burst-Mode Enable */ #endif #define RTC_CTRL_4A_RWK_MASK 0x07 /* RF + WF + KF */ /* * Bit names in Extended Control Register 4B. */ #define RTC_CTRL_4B_ABE BIT(7) /* Auxillary Battery Enable */ #define RTC_CTRL_4B_E32K BIT(6) /* Enable 32.768Hz on SQW Pin */ #define RTC_CTRL_4B_CS BIT(5) /* Crystal Select */ #define RTC_CTRL_4B_RCE BIT(4) /* RAM Clear-Enable */ #define RTC_CTRL_4B_PRS BIT(3) /* PAB Reset-Select */ #define RTC_CTRL_4B_RIE BIT(2) /* RAM Clear-Interrupt Enable */ #define RTC_CTRL_4B_WIE BIT(1) /* Wake-Up Alarm-Interrupt Enable */ #define RTC_CTRL_4B_KSE BIT(0) /* Kickstart Interrupt-Enable */ #define RTC_CTRL_4B_RWK_MASK 0x07 /* RIE + WIE + KSE */ /* * Misc register names in Bank 1. * * The DV0 bit in Control Register A must be set to 1 for these registers * to become available, including Extended Control Registers 4A & 4B. */ #define RTC_BANK1_SSN_MODEL 0x40 /* Model Number */ #define RTC_BANK1_SSN_BYTE_1 0x41 /* 1st Byte of Serial Number */ #define RTC_BANK1_SSN_BYTE_2 0x42 /* 2nd Byte of Serial Number */ #define RTC_BANK1_SSN_BYTE_3 0x43 /* 3rd Byte of Serial Number */ #define RTC_BANK1_SSN_BYTE_4 0x44 /* 4th Byte of Serial Number */ #define RTC_BANK1_SSN_BYTE_5 0x45 /* 5th Byte of Serial Number */ #define RTC_BANK1_SSN_BYTE_6 0x46 /* 6th Byte of Serial Number */ #define RTC_BANK1_SSN_CRC 0x47 /* Serial CRC Byte */ #define RTC_BANK1_RAM_DATA_PORT 0x53 /* Extended RAM Data Port */ /* * Model-specific registers in Bank 1. * * The addresses below differ depending on the model of the RTC chip * selected in the kernel configuration. Not all of these features are * supported in the main driver at present. * * DS1685/DS1687 - Extended NV-SRAM address (LSB only). * DS1689/DS1693 - Vcc, Vbat, Pwr Cycle Counters & Customer-specific S/N. * DS17x85/DS17x87 - Extended NV-SRAM addresses (MSB & LSB) & Write counter. */ #if defined(CONFIG_RTC_DRV_DS1685) #define RTC_BANK1_RAM_ADDR 0x50 /* NV-SRAM Addr */ #elif defined(CONFIG_RTC_DRV_DS1689) #define RTC_BANK1_VCC_CTR_LSB 0x54 /* Vcc Counter Addr (LSB) */ #define RTC_BANK1_VCC_CTR_MSB 0x57 /* Vcc Counter Addr (MSB) */ #define RTC_BANK1_VBAT_CTR_LSB 0x58 /* Vbat Counter Addr (LSB) */ #define RTC_BANK1_VBAT_CTR_MSB 0x5b /* Vbat Counter Addr (MSB) */ #define RTC_BANK1_PWR_CTR_LSB 0x5c /* Pwr Cycle Counter Addr (LSB) */ #define RTC_BANK1_PWR_CTR_MSB 0x5d /* Pwr Cycle Counter Addr (MSB) */ #define RTC_BANK1_UNIQ_SN 0x60 /* Customer-specific S/N */ #else /* DS17x85/DS17x87 */ #define RTC_BANK1_RAM_ADDR_LSB 0x50 /* NV-SRAM Addr (LSB) */ #define RTC_BANK1_RAM_ADDR_MSB 0x51 /* NV-SRAM Addr (MSB) */ #define RTC_BANK1_WRITE_CTR 0x5e /* RTC Write Counter */ #endif /* * Model numbers. * * The DS1688/DS1691 and DS1689/DS1693 chips share the same model number * and the manual doesn't indicate any major differences. As such, they * are regarded as the same chip in this driver. */ #define RTC_MODEL_DS1685 0x71 /* DS1685/DS1687 */ #define RTC_MODEL_DS17285 0x72 /* DS17285/DS17287 */ #define RTC_MODEL_DS1689 0x73 /* DS1688/DS1691/DS1689/DS1693 */ #define RTC_MODEL_DS17485 0x74 /* DS17485/DS17487 */ #define RTC_MODEL_DS17885 0x78 /* DS17885/DS17887 */ /* * Periodic Interrupt Rates / Square-Wave Output Frequency * * Periodic rates are selected by setting the RS3-RS0 bits in Control * Register A and enabled via either the E32K bit in Extended Control * Register 4B or the SQWE bit in Control Register B. * * E32K overrides the settings of RS3-RS0 and outputs a frequency of 32768Hz * on the SQW pin of the RTC chip. While there are 16 possible selections, * the 1-of-16 decoder is only able to divide the base 32768Hz signal into 13 * smaller frequencies. The values 0x01 and 0x02 are not used and are * synonymous with 0x08 and 0x09, respectively. * * When E32K is set to a logic 1, periodic interrupts are disabled and reading * /dev/rtc will return -EINVAL. This also applies if the periodic interrupt * frequency is set to 0Hz. * * Not currently used by the rtc-ds1685 driver because the RTC core removed * support for hardware-generated periodic-interrupts in favour of * hrtimer-generated interrupts. But these defines are kept around for use * in userland, as documentation to the hardware, and possible future use if * hardware-generated periodic interrupts are ever added back. */ /* E32K RS3 RS2 RS1 RS0 */ #define RTC_SQW_8192HZ 0x03 /* 0 0 0 1 1 */ #define RTC_SQW_4096HZ 0x04 /* 0 0 1 0 0 */ #define RTC_SQW_2048HZ 0x05 /* 0 0 1 0 1 */ #define RTC_SQW_1024HZ 0x06 /* 0 0 1 1 0 */ #define RTC_SQW_512HZ 0x07 /* 0 0 1 1 1 */ #define RTC_SQW_256HZ 0x08 /* 0 1 0 0 0 */ #define RTC_SQW_128HZ 0x09 /* 0 1 0 0 1 */ #define RTC_SQW_64HZ 0x0a /* 0 1 0 1 0 */ #define RTC_SQW_32HZ 0x0b /* 0 1 0 1 1 */ #define RTC_SQW_16HZ 0x0c /* 0 1 1 0 0 */ #define RTC_SQW_8HZ 0x0d /* 0 1 1 0 1 */ #define RTC_SQW_4HZ 0x0e /* 0 1 1 1 0 */ #define RTC_SQW_2HZ 0x0f /* 0 1 1 1 1 */ #define RTC_SQW_0HZ 0x00 /* 0 0 0 0 0 */ #define RTC_SQW_32768HZ 32768 /* 1 - - - - */ #define RTC_MAX_USER_FREQ 8192 /* * NVRAM data & addresses: * - 50 bytes of NVRAM are available just past the clock registers. * - 64 additional bytes are available in Bank0. * * Extended, battery-backed NV-SRAM: * - DS1685/DS1687 - 128 bytes. * - DS1689/DS1693 - 0 bytes. * - DS17285/DS17287 - 2048 bytes. * - DS17485/DS17487 - 4096 bytes. * - DS17885/DS17887 - 8192 bytes. */ #define NVRAM_TIME_BASE 0x0e /* NVRAM Addr in Time regs */ #define NVRAM_BANK0_BASE 0x40 /* NVRAM Addr in Bank0 regs */ #define NVRAM_SZ_TIME 50 #define NVRAM_SZ_BANK0 64 #if defined(CONFIG_RTC_DRV_DS1685) # define NVRAM_SZ_EXTND 128 #elif defined(CONFIG_RTC_DRV_DS1689) # define NVRAM_SZ_EXTND 0 #elif defined(CONFIG_RTC_DRV_DS17285) # define NVRAM_SZ_EXTND 2048 #elif defined(CONFIG_RTC_DRV_DS17485) # define NVRAM_SZ_EXTND 4096 #elif defined(CONFIG_RTC_DRV_DS17885) # define NVRAM_SZ_EXTND 8192 #endif #define NVRAM_TOTAL_SZ_BANK0 (NVRAM_SZ_TIME + NVRAM_SZ_BANK0) #define NVRAM_TOTAL_SZ (NVRAM_TOTAL_SZ_BANK0 + NVRAM_SZ_EXTND) /* * Function Prototypes. */ extern void __noreturn ds1685_rtc_poweroff(struct platform_device *pdev); #endif /* _LINUX_RTC_DS1685_H_ */ PK ! ��%�" " rtc/ds1307.hnu �[��� /* * ds1307.h - platform_data for the ds1307 (and variants) rtc driver * (C) Copyright 2012 by Wolfram Sang, Pengutronix e.K. * same license as the driver */ #ifndef _LINUX_DS1307_H #define _LINUX_DS1307_H #include <linux/types.h> #define DS1307_TRICKLE_CHARGER_250_OHM 0x01 #define DS1307_TRICKLE_CHARGER_2K_OHM 0x02 #define DS1307_TRICKLE_CHARGER_4K_OHM 0x03 #define DS1307_TRICKLE_CHARGER_NO_DIODE 0x04 #define DS1307_TRICKLE_CHARGER_DIODE 0x08 struct ds1307_platform_data { u8 trickle_charger_setup; }; #endif /* _LINUX_DS1307_H */ PK ! v� � rtc/ds1286.hnu �[��� /* * Copyright (C) 1998, 1999, 2003 Ralf Baechle * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef __LINUX_DS1286_H #define __LINUX_DS1286_H /********************************************************************** * register summary **********************************************************************/ #define RTC_HUNDREDTH_SECOND 0 #define RTC_SECONDS 1 #define RTC_MINUTES 2 #define RTC_MINUTES_ALARM 3 #define RTC_HOURS 4 #define RTC_HOURS_ALARM 5 #define RTC_DAY 6 #define RTC_DAY_ALARM 7 #define RTC_DATE 8 #define RTC_MONTH 9 #define RTC_YEAR 10 #define RTC_CMD 11 #define RTC_WHSEC 12 #define RTC_WSEC 13 #define RTC_UNUSED 14 /* RTC_*_alarm is always true if 2 MSBs are set */ # define RTC_ALARM_DONT_CARE 0xC0 /* * Bits in the month register */ #define RTC_EOSC 0x80 #define RTC_ESQW 0x40 /* * Bits in the Command register */ #define RTC_TDF 0x01 #define RTC_WAF 0x02 #define RTC_TDM 0x04 #define RTC_WAM 0x08 #define RTC_PU_LVL 0x10 #define RTC_IBH_LO 0x20 #define RTC_IPSW 0x40 #define RTC_TE 0x80 #endif /* __LINUX_DS1286_H */ PK ! 3XW � � rtc/rtc-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RTCOMAP_H_ #define _LINUX_RTCOMAP_H_ int omap_rtc_power_off_program(struct device *dev); #endif /* _LINUX_RTCOMAP_H_ */ PK ! y��4: : elfnote-lto.hnu �[��� #ifndef __ELFNOTE_LTO_H #define __ELFNOTE_LTO_H #include <linux/elfnote.h> #define LINUX_ELFNOTE_LTO_INFO 0x101 #ifdef CONFIG_LTO #define BUILD_LTO_INFO ELFNOTE32("Linux", LINUX_ELFNOTE_LTO_INFO, 1) #else #define BUILD_LTO_INFO ELFNOTE32("Linux", LINUX_ELFNOTE_LTO_INFO, 0) #endif #endif /* __ELFNOTE_LTO_H */ PK ! �[�� � ks8851_mll.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ks8861_mll platform data struct definition * Copyright (c) 2012 BTicino S.p.A. */ #ifndef _LINUX_KS8851_MLL_H #define _LINUX_KS8851_MLL_H #include <linux/if_ether.h> /** * struct ks8851_mll_platform_data - Platform data of the KS8851_MLL network driver * @macaddr: The MAC address of the device, set to all 0:s to use the on in * the chip. */ struct ks8851_mll_platform_data { u8 mac_addr[ETH_ALEN]; }; #endif PK ! NG�� extable.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_EXTABLE_H #define _LINUX_EXTABLE_H #include <linux/stddef.h> /* for NULL */ #include <linux/types.h> struct module; struct exception_table_entry; const struct exception_table_entry * search_extable(const struct exception_table_entry *base, const size_t num, unsigned long value); void sort_extable(struct exception_table_entry *start, struct exception_table_entry *finish); void sort_main_extable(void); void trim_init_extable(struct module *m); /* Given an address, look for it in the exception tables */ const struct exception_table_entry *search_exception_tables(unsigned long add); const struct exception_table_entry * search_kernel_exception_table(unsigned long addr); #ifdef CONFIG_MODULES /* For extable.c to search modules' exception tables. */ const struct exception_table_entry *search_module_extables(unsigned long addr); #else static inline const struct exception_table_entry * search_module_extables(unsigned long addr) { return NULL; } #endif /*CONFIG_MODULES*/ #ifdef CONFIG_BPF_JIT const struct exception_table_entry *search_bpf_extables(unsigned long addr); #else static inline const struct exception_table_entry * search_bpf_extables(unsigned long addr) { return NULL; } #endif #endif /* _LINUX_EXTABLE_H */ PK ! ^sYd d seg6_local.hnu �[��� #ifndef _LINUX_SEG6_LOCAL_H #define _LINUX_SEG6_LOCAL_H #include <uapi/linux/seg6_local.h> #endif PK ! =�P�4@ 4@ jump_label.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_JUMP_LABEL_H #define _LINUX_JUMP_LABEL_H /* * Jump label support * * Copyright (C) 2009-2012 Jason Baron <jbaron@redhat.com> * Copyright (C) 2011-2012 Red Hat, Inc., Peter Zijlstra * * DEPRECATED API: * * The use of 'struct static_key' directly, is now DEPRECATED. In addition * static_key_{true,false}() is also DEPRECATED. IE DO NOT use the following: * * struct static_key false = STATIC_KEY_INIT_FALSE; * struct static_key true = STATIC_KEY_INIT_TRUE; * static_key_true() * static_key_false() * * The updated API replacements are: * * DEFINE_STATIC_KEY_TRUE(key); * DEFINE_STATIC_KEY_FALSE(key); * DEFINE_STATIC_KEY_ARRAY_TRUE(keys, count); * DEFINE_STATIC_KEY_ARRAY_FALSE(keys, count); * static_branch_likely() * static_branch_unlikely() * * Jump labels provide an interface to generate dynamic branches using * self-modifying code. Assuming toolchain and architecture support, if we * define a "key" that is initially false via "DEFINE_STATIC_KEY_FALSE(key)", * an "if (static_branch_unlikely(&key))" statement is an unconditional branch * (which defaults to false - and the true block is placed out of line). * Similarly, we can define an initially true key via * "DEFINE_STATIC_KEY_TRUE(key)", and use it in the same * "if (static_branch_unlikely(&key))", in which case we will generate an * unconditional branch to the out-of-line true branch. Keys that are * initially true or false can be using in both static_branch_unlikely() * and static_branch_likely() statements. * * At runtime we can change the branch target by setting the key * to true via a call to static_branch_enable(), or false using * static_branch_disable(). If the direction of the branch is switched by * these calls then we run-time modify the branch target via a * no-op -> jump or jump -> no-op conversion. For example, for an * initially false key that is used in an "if (static_branch_unlikely(&key))" * statement, setting the key to true requires us to patch in a jump * to the out-of-line of true branch. * * In addition to static_branch_{enable,disable}, we can also reference count * the key or branch direction via static_branch_{inc,dec}. Thus, * static_branch_inc() can be thought of as a 'make more true' and * static_branch_dec() as a 'make more false'. * * Since this relies on modifying code, the branch modifying functions * must be considered absolute slow paths (machine wide synchronization etc.). * OTOH, since the affected branches are unconditional, their runtime overhead * will be absolutely minimal, esp. in the default (off) case where the total * effect is a single NOP of appropriate size. The on case will patch in a jump * to the out-of-line block. * * When the control is directly exposed to userspace, it is prudent to delay the * decrement to avoid high frequency code modifications which can (and do) * cause significant performance degradation. Struct static_key_deferred and * static_key_slow_dec_deferred() provide for this. * * Lacking toolchain and or architecture support, static keys fall back to a * simple conditional branch. * * Additional babbling in: Documentation/staging/static-keys.rst */ #ifndef __ASSEMBLY__ #include <linux/types.h> #include <linux/compiler.h> extern bool static_key_initialized; #define STATIC_KEY_CHECK_USE(key) WARN(!static_key_initialized, \ "%s(): static key '%pS' used before call to jump_label_init()", \ __func__, (key)) #ifdef CONFIG_JUMP_LABEL struct static_key { atomic_t enabled; /* * Note: * To make anonymous unions work with old compilers, the static * initialization of them requires brackets. This creates a dependency * on the order of the struct with the initializers. If any fields * are added, STATIC_KEY_INIT_TRUE and STATIC_KEY_INIT_FALSE may need * to be modified. * * bit 0 => 1 if key is initially true * 0 if initially false * bit 1 => 1 if points to struct static_key_mod * 0 if points to struct jump_entry */ union { unsigned long type; struct jump_entry *entries; struct static_key_mod *next; }; }; #else struct static_key { atomic_t enabled; }; #endif /* CONFIG_JUMP_LABEL */ #endif /* __ASSEMBLY__ */ #ifdef CONFIG_JUMP_LABEL #include <asm/jump_label.h> #ifndef __ASSEMBLY__ #ifdef CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE struct jump_entry { s32 code; s32 target; long key; // key may be far away from the core kernel under KASLR }; static inline unsigned long jump_entry_code(const struct jump_entry *entry) { return (unsigned long)&entry->code + entry->code; } static inline unsigned long jump_entry_target(const struct jump_entry *entry) { return (unsigned long)&entry->target + entry->target; } static inline struct static_key *jump_entry_key(const struct jump_entry *entry) { long offset = entry->key & ~3L; return (struct static_key *)((unsigned long)&entry->key + offset); } #else static inline unsigned long jump_entry_code(const struct jump_entry *entry) { return entry->code; } static inline unsigned long jump_entry_target(const struct jump_entry *entry) { return entry->target; } static inline struct static_key *jump_entry_key(const struct jump_entry *entry) { return (struct static_key *)((unsigned long)entry->key & ~3UL); } #endif static inline bool jump_entry_is_branch(const struct jump_entry *entry) { return (unsigned long)entry->key & 1UL; } static inline bool jump_entry_is_init(const struct jump_entry *entry) { return (unsigned long)entry->key & 2UL; } static inline void jump_entry_set_init(struct jump_entry *entry, bool set) { if (set) entry->key |= 2; else entry->key &= ~2; } static inline int jump_entry_size(struct jump_entry *entry) { #ifdef JUMP_LABEL_NOP_SIZE return JUMP_LABEL_NOP_SIZE; #else return arch_jump_entry_size(entry); #endif } #endif #endif #ifndef __ASSEMBLY__ enum jump_label_type { JUMP_LABEL_NOP = 0, JUMP_LABEL_JMP, }; struct module; #ifdef CONFIG_JUMP_LABEL #define JUMP_TYPE_FALSE 0UL #define JUMP_TYPE_TRUE 1UL #define JUMP_TYPE_LINKED 2UL #define JUMP_TYPE_MASK 3UL static __always_inline bool static_key_false(struct static_key *key) { return arch_static_branch(key, false); } static __always_inline bool static_key_true(struct static_key *key) { return !arch_static_branch(key, true); } extern struct jump_entry __start___jump_table[]; extern struct jump_entry __stop___jump_table[]; extern void jump_label_init(void); extern void jump_label_lock(void); extern void jump_label_unlock(void); extern void arch_jump_label_transform(struct jump_entry *entry, enum jump_label_type type); extern void arch_jump_label_transform_static(struct jump_entry *entry, enum jump_label_type type); extern bool arch_jump_label_transform_queue(struct jump_entry *entry, enum jump_label_type type); extern void arch_jump_label_transform_apply(void); extern int jump_label_text_reserved(void *start, void *end); extern void static_key_slow_inc(struct static_key *key); extern void static_key_slow_dec(struct static_key *key); extern void static_key_slow_inc_cpuslocked(struct static_key *key); extern void static_key_slow_dec_cpuslocked(struct static_key *key); extern void jump_label_apply_nops(struct module *mod); extern int static_key_count(struct static_key *key); extern void static_key_enable(struct static_key *key); extern void static_key_disable(struct static_key *key); extern void static_key_enable_cpuslocked(struct static_key *key); extern void static_key_disable_cpuslocked(struct static_key *key); /* * We should be using ATOMIC_INIT() for initializing .enabled, but * the inclusion of atomic.h is problematic for inclusion of jump_label.h * in 'low-level' headers. Thus, we are initializing .enabled with a * raw value, but have added a BUILD_BUG_ON() to catch any issues in * jump_label_init() see: kernel/jump_label.c. */ #define STATIC_KEY_INIT_TRUE \ { .enabled = { 1 }, \ { .entries = (void *)JUMP_TYPE_TRUE } } #define STATIC_KEY_INIT_FALSE \ { .enabled = { 0 }, \ { .entries = (void *)JUMP_TYPE_FALSE } } #else /* !CONFIG_JUMP_LABEL */ #include <linux/atomic.h> #include <linux/bug.h> static __always_inline int static_key_count(struct static_key *key) { return arch_atomic_read(&key->enabled); } static __always_inline void jump_label_init(void) { static_key_initialized = true; } static __always_inline bool static_key_false(struct static_key *key) { if (unlikely_notrace(static_key_count(key) > 0)) return true; return false; } static __always_inline bool static_key_true(struct static_key *key) { if (likely_notrace(static_key_count(key) > 0)) return true; return false; } static inline void static_key_slow_inc(struct static_key *key) { STATIC_KEY_CHECK_USE(key); atomic_inc(&key->enabled); } static inline void static_key_slow_dec(struct static_key *key) { STATIC_KEY_CHECK_USE(key); atomic_dec(&key->enabled); } #define static_key_slow_inc_cpuslocked(key) static_key_slow_inc(key) #define static_key_slow_dec_cpuslocked(key) static_key_slow_dec(key) static inline int jump_label_text_reserved(void *start, void *end) { return 0; } static inline void jump_label_lock(void) {} static inline void jump_label_unlock(void) {} static inline int jump_label_apply_nops(struct module *mod) { return 0; } static inline void static_key_enable(struct static_key *key) { STATIC_KEY_CHECK_USE(key); if (atomic_read(&key->enabled) != 0) { WARN_ON_ONCE(atomic_read(&key->enabled) != 1); return; } atomic_set(&key->enabled, 1); } static inline void static_key_disable(struct static_key *key) { STATIC_KEY_CHECK_USE(key); if (atomic_read(&key->enabled) != 1) { WARN_ON_ONCE(atomic_read(&key->enabled) != 0); return; } atomic_set(&key->enabled, 0); } #define static_key_enable_cpuslocked(k) static_key_enable((k)) #define static_key_disable_cpuslocked(k) static_key_disable((k)) #define STATIC_KEY_INIT_TRUE { .enabled = ATOMIC_INIT(1) } #define STATIC_KEY_INIT_FALSE { .enabled = ATOMIC_INIT(0) } #endif /* CONFIG_JUMP_LABEL */ #define STATIC_KEY_INIT STATIC_KEY_INIT_FALSE #define jump_label_enabled static_key_enabled /* -------------------------------------------------------------------------- */ /* * Two type wrappers around static_key, such that we can use compile time * type differentiation to emit the right code. * * All the below code is macros in order to play type games. */ struct static_key_true { struct static_key key; }; struct static_key_false { struct static_key key; }; #define STATIC_KEY_TRUE_INIT (struct static_key_true) { .key = STATIC_KEY_INIT_TRUE, } #define STATIC_KEY_FALSE_INIT (struct static_key_false){ .key = STATIC_KEY_INIT_FALSE, } #define DEFINE_STATIC_KEY_TRUE(name) \ struct static_key_true name = STATIC_KEY_TRUE_INIT #define DEFINE_STATIC_KEY_TRUE_RO(name) \ struct static_key_true name __ro_after_init = STATIC_KEY_TRUE_INIT #define DECLARE_STATIC_KEY_TRUE(name) \ extern struct static_key_true name #define DEFINE_STATIC_KEY_FALSE(name) \ struct static_key_false name = STATIC_KEY_FALSE_INIT #define DEFINE_STATIC_KEY_FALSE_RO(name) \ struct static_key_false name __ro_after_init = STATIC_KEY_FALSE_INIT #define DECLARE_STATIC_KEY_FALSE(name) \ extern struct static_key_false name #define DEFINE_STATIC_KEY_ARRAY_TRUE(name, count) \ struct static_key_true name[count] = { \ [0 ... (count) - 1] = STATIC_KEY_TRUE_INIT, \ } #define DEFINE_STATIC_KEY_ARRAY_FALSE(name, count) \ struct static_key_false name[count] = { \ [0 ... (count) - 1] = STATIC_KEY_FALSE_INIT, \ } #define _DEFINE_STATIC_KEY_1(name) DEFINE_STATIC_KEY_TRUE(name) #define _DEFINE_STATIC_KEY_0(name) DEFINE_STATIC_KEY_FALSE(name) #define DEFINE_STATIC_KEY_MAYBE(cfg, name) \ __PASTE(_DEFINE_STATIC_KEY_, IS_ENABLED(cfg))(name) #define _DEFINE_STATIC_KEY_RO_1(name) DEFINE_STATIC_KEY_TRUE_RO(name) #define _DEFINE_STATIC_KEY_RO_0(name) DEFINE_STATIC_KEY_FALSE_RO(name) #define DEFINE_STATIC_KEY_MAYBE_RO(cfg, name) \ __PASTE(_DEFINE_STATIC_KEY_RO_, IS_ENABLED(cfg))(name) #define _DECLARE_STATIC_KEY_1(name) DECLARE_STATIC_KEY_TRUE(name) #define _DECLARE_STATIC_KEY_0(name) DECLARE_STATIC_KEY_FALSE(name) #define DECLARE_STATIC_KEY_MAYBE(cfg, name) \ __PASTE(_DECLARE_STATIC_KEY_, IS_ENABLED(cfg))(name) extern bool ____wrong_branch_error(void); #define static_key_enabled(x) \ ({ \ if (!__builtin_types_compatible_p(typeof(*x), struct static_key) && \ !__builtin_types_compatible_p(typeof(*x), struct static_key_true) &&\ !__builtin_types_compatible_p(typeof(*x), struct static_key_false)) \ ____wrong_branch_error(); \ static_key_count((struct static_key *)x) > 0; \ }) #ifdef CONFIG_JUMP_LABEL /* * Combine the right initial value (type) with the right branch order * to generate the desired result. * * * type\branch| likely (1) | unlikely (0) * -----------+-----------------------+------------------ * | | * true (1) | ... | ... * | NOP | JMP L * | <br-stmts> | 1: ... * | L: ... | * | | * | | L: <br-stmts> * | | jmp 1b * | | * -----------+-----------------------+------------------ * | | * false (0) | ... | ... * | JMP L | NOP * | <br-stmts> | 1: ... * | L: ... | * | | * | | L: <br-stmts> * | | jmp 1b * | | * -----------+-----------------------+------------------ * * The initial value is encoded in the LSB of static_key::entries, * type: 0 = false, 1 = true. * * The branch type is encoded in the LSB of jump_entry::key, * branch: 0 = unlikely, 1 = likely. * * This gives the following logic table: * * enabled type branch instuction * -----------------------------+----------- * 0 0 0 | NOP * 0 0 1 | JMP * 0 1 0 | NOP * 0 1 1 | JMP * * 1 0 0 | JMP * 1 0 1 | NOP * 1 1 0 | JMP * 1 1 1 | NOP * * Which gives the following functions: * * dynamic: instruction = enabled ^ branch * static: instruction = type ^ branch * * See jump_label_type() / jump_label_init_type(). */ #define static_branch_likely(x) \ ({ \ bool branch; \ if (__builtin_types_compatible_p(typeof(*x), struct static_key_true)) \ branch = !arch_static_branch(&(x)->key, true); \ else if (__builtin_types_compatible_p(typeof(*x), struct static_key_false)) \ branch = !arch_static_branch_jump(&(x)->key, true); \ else \ branch = ____wrong_branch_error(); \ likely_notrace(branch); \ }) #define static_branch_unlikely(x) \ ({ \ bool branch; \ if (__builtin_types_compatible_p(typeof(*x), struct static_key_true)) \ branch = arch_static_branch_jump(&(x)->key, false); \ else if (__builtin_types_compatible_p(typeof(*x), struct static_key_false)) \ branch = arch_static_branch(&(x)->key, false); \ else \ branch = ____wrong_branch_error(); \ unlikely_notrace(branch); \ }) #else /* !CONFIG_JUMP_LABEL */ #define static_branch_likely(x) likely_notrace(static_key_enabled(&(x)->key)) #define static_branch_unlikely(x) unlikely_notrace(static_key_enabled(&(x)->key)) #endif /* CONFIG_JUMP_LABEL */ #define static_branch_maybe(config, x) \ (IS_ENABLED(config) ? static_branch_likely(x) \ : static_branch_unlikely(x)) /* * Advanced usage; refcount, branch is enabled when: count != 0 */ #define static_branch_inc(x) static_key_slow_inc(&(x)->key) #define static_branch_dec(x) static_key_slow_dec(&(x)->key) #define static_branch_inc_cpuslocked(x) static_key_slow_inc_cpuslocked(&(x)->key) #define static_branch_dec_cpuslocked(x) static_key_slow_dec_cpuslocked(&(x)->key) /* * Normal usage; boolean enable/disable. */ #define static_branch_enable(x) static_key_enable(&(x)->key) #define static_branch_disable(x) static_key_disable(&(x)->key) #define static_branch_enable_cpuslocked(x) static_key_enable_cpuslocked(&(x)->key) #define static_branch_disable_cpuslocked(x) static_key_disable_cpuslocked(&(x)->key) #endif /* __ASSEMBLY__ */ #endif /* _LINUX_JUMP_LABEL_H */ PK ! o-�sq q elfcore.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ELFCORE_H #define _LINUX_ELFCORE_H #include <linux/user.h> #include <linux/bug.h> #include <linux/sched/task_stack.h> #include <linux/types.h> #include <linux/signal.h> #include <linux/time.h> #include <linux/ptrace.h> #include <linux/fs.h> #include <linux/elf.h> struct coredump_params; struct elf_siginfo { int si_signo; /* signal number */ int si_code; /* extra code */ int si_errno; /* errno */ }; /* * Definitions to generate Intel SVR4-like core files. * These mostly have the same names as the SVR4 types with "elf_" * tacked on the front to prevent clashes with linux definitions, * and the typedef forms have been avoided. This is mostly like * the SVR4 structure, but more Linuxy, with things that Linux does * not support and which gdb doesn't really use excluded. */ struct elf_prstatus_common { struct elf_siginfo pr_info; /* Info associated with signal */ short pr_cursig; /* Current signal */ unsigned long pr_sigpend; /* Set of pending signals */ unsigned long pr_sighold; /* Set of held signals */ pid_t pr_pid; pid_t pr_ppid; pid_t pr_pgrp; pid_t pr_sid; struct __kernel_old_timeval pr_utime; /* User time */ struct __kernel_old_timeval pr_stime; /* System time */ struct __kernel_old_timeval pr_cutime; /* Cumulative user time */ struct __kernel_old_timeval pr_cstime; /* Cumulative system time */ }; struct elf_prstatus { struct elf_prstatus_common common; elf_gregset_t pr_reg; /* GP registers */ int pr_fpvalid; /* True if math co-processor being used. */ }; #define ELF_PRARGSZ (80) /* Number of chars for args */ struct elf_prpsinfo { char pr_state; /* numeric process state */ char pr_sname; /* char for pr_state */ char pr_zomb; /* zombie */ char pr_nice; /* nice val */ unsigned long pr_flag; /* flags */ __kernel_uid_t pr_uid; __kernel_gid_t pr_gid; pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid; /* Lots missing */ char pr_fname[16]; /* filename of executable */ char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */ }; static inline void elf_core_copy_regs(elf_gregset_t *elfregs, struct pt_regs *regs) { #ifdef ELF_CORE_COPY_REGS ELF_CORE_COPY_REGS((*elfregs), regs) #else BUG_ON(sizeof(*elfregs) != sizeof(*regs)); *(struct pt_regs *)elfregs = *regs; #endif } static inline void elf_core_copy_kernel_regs(elf_gregset_t *elfregs, struct pt_regs *regs) { #ifdef ELF_CORE_COPY_KERNEL_REGS ELF_CORE_COPY_KERNEL_REGS((*elfregs), regs); #else elf_core_copy_regs(elfregs, regs); #endif } static inline int elf_core_copy_task_regs(struct task_struct *t, elf_gregset_t* elfregs) { #if defined (ELF_CORE_COPY_TASK_REGS) return ELF_CORE_COPY_TASK_REGS(t, elfregs); #elif defined (task_pt_regs) elf_core_copy_regs(elfregs, task_pt_regs(t)); #endif return 0; } extern int dump_fpu (struct pt_regs *, elf_fpregset_t *); static inline int elf_core_copy_task_fpregs(struct task_struct *t, struct pt_regs *regs, elf_fpregset_t *fpu) { #ifdef ELF_CORE_COPY_FPREGS return ELF_CORE_COPY_FPREGS(t, fpu); #else return dump_fpu(regs, fpu); #endif } #if (defined(CONFIG_UML) && defined(CONFIG_X86_32)) || defined(CONFIG_IA64) /* * These functions parameterize elf_core_dump in fs/binfmt_elf.c to write out * extra segments containing the gate DSO contents. Dumping its * contents makes post-mortem fully interpretable later without matching up * the same kernel and hardware config to see what PC values meant. * Dumping its extra ELF program headers includes all the other information * a debugger needs to easily find how the gate DSO was being used. */ extern Elf_Half elf_core_extra_phdrs(void); extern int elf_core_write_extra_phdrs(struct coredump_params *cprm, loff_t offset); extern int elf_core_write_extra_data(struct coredump_params *cprm); extern size_t elf_core_extra_data_size(void); #else static inline Elf_Half elf_core_extra_phdrs(void) { return 0; } static inline int elf_core_write_extra_phdrs(struct coredump_params *cprm, loff_t offset) { return 1; } static inline int elf_core_write_extra_data(struct coredump_params *cprm) { return 1; } static inline size_t elf_core_extra_data_size(void) { return 0; } #endif #endif /* _LINUX_ELFCORE_H */ PK ! KVF�� � sunxi-rsb.hnu �[��� /* * Allwinner Reduced Serial Bus Driver * * Copyright (c) 2015 Chen-Yu Tsai * * Author: Chen-Yu Tsai <wens@csie.org> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef _SUNXI_RSB_H #define _SUNXI_RSB_H #include <linux/device.h> #include <linux/regmap.h> #include <linux/types.h> struct sunxi_rsb; /** * struct sunxi_rsb_device - Basic representation of an RSB device * @dev: Driver model representation of the device. * @ctrl: RSB controller managing the bus hosting this device. * @rtaddr: This device's runtime address * @hwaddr: This device's hardware address */ struct sunxi_rsb_device { struct device dev; struct sunxi_rsb *rsb; int irq; u8 rtaddr; u16 hwaddr; }; static inline struct sunxi_rsb_device *to_sunxi_rsb_device(struct device *d) { return container_of(d, struct sunxi_rsb_device, dev); } static inline void *sunxi_rsb_device_get_drvdata(const struct sunxi_rsb_device *rdev) { return dev_get_drvdata(&rdev->dev); } static inline void sunxi_rsb_device_set_drvdata(struct sunxi_rsb_device *rdev, void *data) { dev_set_drvdata(&rdev->dev, data); } /** * struct sunxi_rsb_driver - RSB slave device driver * @driver: RSB device drivers should initialize name and owner field of * this structure. * @probe: binds this driver to a RSB device. * @remove: unbinds this driver from the RSB device. */ struct sunxi_rsb_driver { struct device_driver driver; int (*probe)(struct sunxi_rsb_device *rdev); void (*remove)(struct sunxi_rsb_device *rdev); }; static inline struct sunxi_rsb_driver *to_sunxi_rsb_driver(struct device_driver *d) { return container_of(d, struct sunxi_rsb_driver, driver); } int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv); /** * sunxi_rsb_driver_unregister() - unregister an RSB client driver * @rdrv: the driver to unregister */ static inline void sunxi_rsb_driver_unregister(struct sunxi_rsb_driver *rdrv) { if (rdrv) driver_unregister(&rdrv->driver); } #define module_sunxi_rsb_driver(__sunxi_rsb_driver) \ module_driver(__sunxi_rsb_driver, sunxi_rsb_driver_register, \ sunxi_rsb_driver_unregister) struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev, const struct regmap_config *config, struct lock_class_key *lock_key, const char *lock_name); /** * devm_regmap_init_sunxi_rsb(): Initialise managed register map * * @rdev: Device that will be interacted with * @config: Configuration for register map * * The return value will be an ERR_PTR() on error or a valid pointer * to a struct regmap. The regmap will be automatically freed by the * device management code. */ #define devm_regmap_init_sunxi_rsb(rdev, config) \ __regmap_lockdep_wrapper(__devm_regmap_init_sunxi_rsb, #config, \ rdev, config) #endif /* _SUNXI_RSB_H */ PK ! ��A� � user-return-notifier.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_USER_RETURN_NOTIFIER_H #define _LINUX_USER_RETURN_NOTIFIER_H #ifdef CONFIG_USER_RETURN_NOTIFIER #include <linux/list.h> #include <linux/sched.h> struct user_return_notifier { void (*on_user_return)(struct user_return_notifier *urn); struct hlist_node link; }; void user_return_notifier_register(struct user_return_notifier *urn); void user_return_notifier_unregister(struct user_return_notifier *urn); static inline void propagate_user_return_notify(struct task_struct *prev, struct task_struct *next) { if (test_tsk_thread_flag(prev, TIF_USER_RETURN_NOTIFY)) { clear_tsk_thread_flag(prev, TIF_USER_RETURN_NOTIFY); set_tsk_thread_flag(next, TIF_USER_RETURN_NOTIFY); } } void fire_user_return_notifiers(void); static inline void clear_user_return_notifier(struct task_struct *p) { clear_tsk_thread_flag(p, TIF_USER_RETURN_NOTIFY); } #else struct user_return_notifier {}; static inline void propagate_user_return_notify(struct task_struct *prev, struct task_struct *next) { } static inline void fire_user_return_notifiers(void) {} static inline void clear_user_return_notifier(struct task_struct *p) {} #endif #endif PK ! T^0M� � platform_data/ina2xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Driver for Texas Instruments INA219, INA226 power monitor chips * * Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com> * * For further information, see the Documentation/hwmon/ina2xx.rst file. */ /** * struct ina2xx_platform_data - ina2xx info * @shunt_uohms shunt resistance in microohms */ struct ina2xx_platform_data { long shunt_uohms; }; PK ! ��� platform_data/davinci_asp.hnu �[��� /* * TI DaVinci Audio Serial Port support * * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __DAVINCI_ASP_H #define __DAVINCI_ASP_H #include <linux/genalloc.h> struct davinci_mcasp_pdata { u32 tx_dma_offset; u32 rx_dma_offset; int asp_chan_q; /* event queue number for ASP channel */ int ram_chan_q; /* event queue number for RAM channel */ /* * Allowing this is more efficient and eliminates left and right swaps * caused by underruns, but will swap the left and right channels * when compared to previous behavior. */ unsigned enable_channel_combine:1; unsigned sram_size_playback; unsigned sram_size_capture; struct gen_pool *sram_pool; /* * If McBSP peripheral gets the clock from an external pin, * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR * and MCBSP_CLKS. * Depending on different hardware connections it is possible * to use this setting to change the behaviour of McBSP * driver. */ int clk_input_pin; /* * This flag works when both clock and FS are outputs for the cpu * and makes clock more accurate (FS is not symmetrical and the * clock is very fast. * The clock becoming faster is named * i2s continuous serial clock (I2S_SCK) and it is an externally * visible bit clock. * * first line : WordSelect * second line : ContinuousSerialClock * third line: SerialData * * SYMMETRICAL APPROACH: * _______________________ LEFT * _| RIGHT |______________________| * _ _ _ _ _ _ _ _ * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_ * _ _ _ _ _ _ _ _ * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_ * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ * * ACCURATE CLOCK APPROACH: * ______________ LEFT * _| RIGHT |_______________________________| * _ _ _ _ _ _ _ _ _ * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| | * _ _ _ _ dummy cycles * _/ \_ ... _/ \_/ \_ ... _/ \__________________ * \_/ \_/ \_/ \_/ * */ bool i2s_accurate_sck; /* McASP specific fields */ int tdm_slots; u8 op_mode; u8 dismod; u8 num_serializer; u8 *serial_dir; u8 version; u8 txnumevt; u8 rxnumevt; int tx_dma_channel; int rx_dma_channel; }; /* TODO: Fix arch/arm/mach-davinci/ users and remove this define */ #define snd_platform_data davinci_mcasp_pdata enum { MCASP_VERSION_1 = 0, /* DM646x */ MCASP_VERSION_2, /* DA8xx/OMAPL1x */ MCASP_VERSION_3, /* TI81xx/AM33xx */ MCASP_VERSION_4, /* DRA7xxx */ MCASP_VERSION_OMAP, /* OMAP4/5 */ }; enum mcbsp_clk_input_pin { MCBSP_CLKR = 0, /* as in DM365 */ MCBSP_CLKS, }; #define INACTIVE_MODE 0 #define TX_MODE 1 #define RX_MODE 2 #define DAVINCI_MCASP_IIS_MODE 0 #define DAVINCI_MCASP_DIT_MODE 1 #endif PK ! ߍsS^ ^ platform_data/mmp_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MMP Platform DMA Management * * Copyright (c) 2011 Marvell Semiconductors Inc. */ #ifndef MMP_DMA_H #define MMP_DMA_H struct dma_slave_map; struct mmp_dma_platdata { int dma_channels; int nb_requestors; int slave_map_cnt; const struct dma_slave_map *slave_map; }; #endif /* MMP_DMA_H */ PK ! <�vW� � platform_data/video_s3c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLATFORM_DATA_VIDEO_S3C #define __PLATFORM_DATA_VIDEO_S3C /* S3C_FB_MAX_WIN * Set to the maximum number of windows that any of the supported hardware * can use. Since the platform data uses this for an array size, having it * set to the maximum of any version of the hardware can do is safe. */ #define S3C_FB_MAX_WIN (5) /** * struct s3c_fb_pd_win - per window setup data * @xres : The window X size. * @yres : The window Y size. * @virtual_x: The virtual X size. * @virtual_y: The virtual Y size. */ struct s3c_fb_pd_win { unsigned short default_bpp; unsigned short max_bpp; unsigned short xres; unsigned short yres; unsigned short virtual_x; unsigned short virtual_y; }; /** * struct s3c_fb_platdata - S3C driver platform specific information * @setup_gpio: Setup the external GPIO pins to the right state to transfer * the data from the display system to the connected display * device. * @vidcon0: The base vidcon0 values to control the panel data format. * @vidcon1: The base vidcon1 values to control the panel data output. * @vtiming: Video timing when connected to a RGB type panel. * @win: The setup data for each hardware window, or NULL for unused. * @display_mode: The LCD output display mode. * * The platform data supplies the video driver with all the information * it requires to work with the display(s) attached to the machine. It * controls the initial mode, the number of display windows (0 is always * the base framebuffer) that are initialised etc. * */ struct s3c_fb_platdata { void (*setup_gpio)(void); struct s3c_fb_pd_win *win[S3C_FB_MAX_WIN]; struct fb_videomode *vtiming; u32 vidcon0; u32 vidcon1; }; #endif PK ! �s'�J J platform_data/gsc_hwmon.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _GSC_HWMON_H #define _GSC_HWMON_H enum gsc_hwmon_mode { mode_temperature, mode_voltage_24bit, mode_voltage_raw, mode_voltage_16bit, mode_fan, mode_max, }; /** * struct gsc_hwmon_channel - configuration parameters * @reg: I2C register offset * @mode: channel mode * @name: channel name * @mvoffset: voltage offset * @vdiv: voltage divider array (2 resistor values in milli-ohms) */ struct gsc_hwmon_channel { unsigned int reg; unsigned int mode; const char *name; unsigned int mvoffset; unsigned int vdiv[2]; }; /** * struct gsc_hwmon_platform_data - platform data for gsc_hwmon driver * @channels: pointer to array of gsc_hwmon_channel structures * describing channels * @nchannels: number of elements in @channels array * @vreference: voltage reference (mV) * @resolution: ADC bit resolution * @fan_base: register base for FAN controller */ struct gsc_hwmon_platform_data { const struct gsc_hwmon_channel *channels; int nchannels; unsigned int resolution; unsigned int vreference; unsigned int fan_base; }; #endif PK ! '��6� � platform_data/asoc-palm27x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _INCLUDE_PALMASOC_H_ #define _INCLUDE_PALMASOC_H_ struct palm27x_asoc_info { int jack_gpio; }; #endif PK ! ��*�� � # platform_data/asoc-s3c24xx_simtec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * Simtec Audio support. */ /** * struct s3c24xx_audio_simtec_pdata - platform data for simtec audio * @use_mpllin: Select codec clock from MPLLin * @output_cdclk: Need to output CDCLK to the codec * @have_mic: Set if we have a MIC socket * @have_lout: Set if we have a LineOut socket * @amp_gpio: GPIO pin to enable the AMP * @amp_gain: Option GPIO to control AMP gain */ struct s3c24xx_audio_simtec_pdata { unsigned int use_mpllin:1; unsigned int output_cdclk:1; unsigned int have_mic:1; unsigned int have_lout:1; int amp_gpio; int amp_gain[2]; void (*startup)(void); }; PK ! �� Ѻ � platform_data/g762.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Platform data structure for g762 fan controller driver * * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org> */ #ifndef __LINUX_PLATFORM_DATA_G762_H__ #define __LINUX_PLATFORM_DATA_G762_H__ /* * Following structure can be used to set g762 driver platform specific data * during board init. Note that passing a sparse structure is possible but * will result in non-specified attributes to be set to default value, hence * overloading those installed during boot (e.g. by u-boot). */ struct g762_platform_data { u32 fan_startv; u32 fan_gear_mode; u32 pwm_polarity; u32 clk_freq; }; #endif /* __LINUX_PLATFORM_DATA_G762_H__ */ PK ! è�dV V platform_data/sht3x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2016 Sensirion AG, Switzerland * Author: David Frey <david.frey@sensirion.com> * Author: Pascal Sachs <pascal.sachs@sensirion.com> */ #ifndef __SHT3X_H_ #define __SHT3X_H_ struct sht3x_platform_data { bool blocking_io; bool high_precision; }; #endif /* __SHT3X_H_ */ PK ! $��<� � ! platform_data/mtd-davinci-aemif.hnu �[��� /* * TI DaVinci AEMIF support * * Copyright 2010 (C) Texas Instruments, Inc. https://www.ti.com/ * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef _MACH_DAVINCI_AEMIF_H #define _MACH_DAVINCI_AEMIF_H #include <linux/platform_device.h> #define NRCSR_OFFSET 0x00 #define AWCCR_OFFSET 0x04 #define A1CR_OFFSET 0x10 #define ACR_ASIZE_MASK 0x3 #define ACR_EW_MASK BIT(30) #define ACR_SS_MASK BIT(31) /* All timings in nanoseconds */ struct davinci_aemif_timing { u8 wsetup; u8 wstrobe; u8 whold; u8 rsetup; u8 rstrobe; u8 rhold; u8 ta; }; #endif PK ! k��Q platform_data/keyscan-davinci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2009 Texas Instruments, Inc * * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com> */ #ifndef DAVINCI_KEYSCAN_H #define DAVINCI_KEYSCAN_H #include <linux/io.h> enum davinci_matrix_types { DAVINCI_KEYSCAN_MATRIX_4X4, DAVINCI_KEYSCAN_MATRIX_5X3, }; struct davinci_ks_platform_data { int (*device_enable)(struct device *dev); unsigned short *keymap; u32 keymapsize; u8 rep:1; u8 strobe; u8 interval; u8 matrix_type; }; #endif PK ! X_��� � platform_data/ad5761.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter * * Copyright 2016 Qtechnology A/S * 2016 Ricardo Ribalda <ribalda@kernel.org> */ #ifndef __LINUX_PLATFORM_DATA_AD5761_H__ #define __LINUX_PLATFORM_DATA_AD5761_H__ /** * enum ad5761_voltage_range - Voltage range the AD5761 is configured for. * @AD5761_VOLTAGE_RANGE_M10V_10V: -10V to 10V * @AD5761_VOLTAGE_RANGE_0V_10V: 0V to 10V * @AD5761_VOLTAGE_RANGE_M5V_5V: -5V to 5V * @AD5761_VOLTAGE_RANGE_0V_5V: 0V to 5V * @AD5761_VOLTAGE_RANGE_M2V5_7V5: -2.5V to 7.5V * @AD5761_VOLTAGE_RANGE_M3V_3V: -3V to 3V * @AD5761_VOLTAGE_RANGE_0V_16V: 0V to 16V * @AD5761_VOLTAGE_RANGE_0V_20V: 0V to 20V */ enum ad5761_voltage_range { AD5761_VOLTAGE_RANGE_M10V_10V, AD5761_VOLTAGE_RANGE_0V_10V, AD5761_VOLTAGE_RANGE_M5V_5V, AD5761_VOLTAGE_RANGE_0V_5V, AD5761_VOLTAGE_RANGE_M2V5_7V5, AD5761_VOLTAGE_RANGE_M3V_3V, AD5761_VOLTAGE_RANGE_0V_16V, AD5761_VOLTAGE_RANGE_0V_20V, }; /** * struct ad5761_platform_data - AD5761 DAC driver platform data * @voltage_range: Voltage range the AD5761 is configured for */ struct ad5761_platform_data { enum ad5761_voltage_range voltage_range; }; #endif PK ! ���� � " platform_data/keypad-nomadik-ske.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2010 * * Author: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com> * * ux500 Scroll key and Keypad Encoder (SKE) header */ #ifndef __SKE_H #define __SKE_H #include <linux/input/matrix_keypad.h> /* register definitions for SKE peripheral */ #define SKE_CR 0x00 #define SKE_VAL0 0x04 #define SKE_VAL1 0x08 #define SKE_DBCR 0x0C #define SKE_IMSC 0x10 #define SKE_RIS 0x14 #define SKE_MIS 0x18 #define SKE_ICR 0x1C /* * Keypad module */ /** * struct keypad_platform_data - structure for platform specific data * @init: pointer to keypad init function * @exit: pointer to keypad deinitialisation function * @keymap_data: matrix scan code table for keycodes * @krow: maximum number of rows * @kcol: maximum number of columns * @debounce_ms: platform specific debounce time * @no_autorepeat: flag for auto repetition * @wakeup_enable: allow waking up the system */ struct ske_keypad_platform_data { int (*init)(void); int (*exit)(void); const struct matrix_keymap_data *keymap_data; u8 krow; u8 kcol; u8 debounce_ms; bool no_autorepeat; bool wakeup_enable; }; #endif /*__SKE_KPD_H*/ PK ! �W� � platform_data/video-mx3fb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2008 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> */ #ifndef __ASM_ARCH_MX3FB_H__ #define __ASM_ARCH_MX3FB_H__ #include <linux/device.h> #include <linux/fb.h> /* Proprietary FB_SYNC_ flags */ #define FB_SYNC_OE_ACT_HIGH 0x80000000 #define FB_SYNC_CLK_INVERT 0x40000000 #define FB_SYNC_DATA_INVERT 0x20000000 #define FB_SYNC_CLK_IDLE_EN 0x10000000 #define FB_SYNC_SHARP_MODE 0x08000000 #define FB_SYNC_SWAP_RGB 0x04000000 #define FB_SYNC_CLK_SEL_EN 0x02000000 /* * Specify the way your display is connected. The IPU can arbitrarily * map the internal colors to the external data lines. We only support * the following mappings at the moment. */ enum disp_data_mapping { /* blue -> d[0..5], green -> d[6..11], red -> d[12..17] */ IPU_DISP_DATA_MAPPING_RGB666, /* blue -> d[0..4], green -> d[5..10], red -> d[11..15] */ IPU_DISP_DATA_MAPPING_RGB565, /* blue -> d[0..7], green -> d[8..15], red -> d[16..23] */ IPU_DISP_DATA_MAPPING_RGB888, }; /** * struct mx3fb_platform_data - mx3fb platform data * * @dma_dev: pointer to the dma-device, used for dma-slave connection * @mode: pointer to a platform-provided per mxc_register_fb() videomode */ struct mx3fb_platform_data { struct device *dma_dev; const char *name; const struct fb_videomode *mode; int num_modes; enum disp_data_mapping disp_data_fmt; }; #endif PK ! � � � $ platform_data/mouse-pxa930_trkball.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARCH_PXA930_TRKBALL_H #define __ASM_ARCH_PXA930_TRKBALL_H struct pxa930_trkball_platform_data { int x_filter; int y_filter; }; #endif /* __ASM_ARCH_PXA930_TRKBALL_H */ PK ! �Tb platform_data/adau17x1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781 codecs * * Copyright 2011-2014 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __LINUX_PLATFORM_DATA_ADAU17X1_H__ #define __LINUX_PLATFORM_DATA_ADAU17X1_H__ /** * enum adau17x1_micbias_voltage - Microphone bias voltage * @ADAU17X1_MICBIAS_0_90_AVDD: 0.9 * AVDD * @ADAU17X1_MICBIAS_0_65_AVDD: 0.65 * AVDD */ enum adau17x1_micbias_voltage { ADAU17X1_MICBIAS_0_90_AVDD = 0, ADAU17X1_MICBIAS_0_65_AVDD = 1, }; /** * enum adau1761_digmic_jackdet_pin_mode - Configuration of the JACKDET/MICIN pin * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: Disable the pin * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC: Configure the pin for usage as * digital microphone input. * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT: Configure the pin for jack * insertion detection. */ enum adau1761_digmic_jackdet_pin_mode { ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE, ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC, ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT, }; /** * adau1761_jackdetect_debounce_time - Jack insertion detection debounce time * @ADAU1761_JACKDETECT_DEBOUNCE_5MS: 5 milliseconds * @ADAU1761_JACKDETECT_DEBOUNCE_10MS: 10 milliseconds * @ADAU1761_JACKDETECT_DEBOUNCE_20MS: 20 milliseconds * @ADAU1761_JACKDETECT_DEBOUNCE_40MS: 40 milliseconds */ enum adau1761_jackdetect_debounce_time { ADAU1761_JACKDETECT_DEBOUNCE_5MS = 0, ADAU1761_JACKDETECT_DEBOUNCE_10MS = 1, ADAU1761_JACKDETECT_DEBOUNCE_20MS = 2, ADAU1761_JACKDETECT_DEBOUNCE_40MS = 3, }; /** * enum adau1761_output_mode - Output mode configuration * @ADAU1761_OUTPUT_MODE_HEADPHONE: Headphone output * @ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS: Capless headphone output * @ADAU1761_OUTPUT_MODE_LINE: Line output */ enum adau1761_output_mode { ADAU1761_OUTPUT_MODE_HEADPHONE, ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS, ADAU1761_OUTPUT_MODE_LINE, }; /** * struct adau1761_platform_data - ADAU1761 Codec driver platform data * @input_differential: If true the input pins will be configured in * differential mode. * @lineout_mode: Output mode for the LOUT/ROUT pins * @headphone_mode: Output mode for the LHP/RHP pins * @digmic_jackdetect_pin_mode: JACKDET/MICIN pin configuration * @jackdetect_debounce_time: Jack insertion detection debounce time. * Note: This value will only be used, if the JACKDET/MICIN pin is configured * for jack insertion detection. * @jackdetect_active_low: If true the jack insertion detection is active low. * Othwise it will be active high. * @micbias_voltage: Microphone voltage bias */ struct adau1761_platform_data { bool input_differential; enum adau1761_output_mode lineout_mode; enum adau1761_output_mode headphone_mode; enum adau1761_digmic_jackdet_pin_mode digmic_jackdetect_pin_mode; enum adau1761_jackdetect_debounce_time jackdetect_debounce_time; bool jackdetect_active_low; enum adau17x1_micbias_voltage micbias_voltage; }; /** * struct adau1781_platform_data - ADAU1781 Codec driver platform data * @left_input_differential: If true configure the left input as * differential input. * @right_input_differential: If true configure the right input as differntial * input. * @use_dmic: If true configure the MIC pins as digital microphone pins instead * of analog microphone pins. * @micbias_voltage: Microphone voltage bias */ struct adau1781_platform_data { bool left_input_differential; bool right_input_differential; bool use_dmic; enum adau17x1_micbias_voltage micbias_voltage; }; #endif PK ! �] platform_data/pm33xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * TI pm33xx platform data * * Copyright (C) 2016-2018 Texas Instruments, Inc. * Dave Gerlach <d-gerlach@ti.com> */ #ifndef _LINUX_PLATFORM_DATA_PM33XX_H #define _LINUX_PLATFORM_DATA_PM33XX_H #include <linux/kbuild.h> #include <linux/types.h> /* * WFI Flags for sleep code control * * These flags allow PM code to exclude certain operations from happening * in the low level ASM code found in sleep33xx.S and sleep43xx.S * * WFI_FLAG_FLUSH_CACHE: Flush the ARM caches and disable caching. Only * needed when MPU will lose context. * WFI_FLAG_SELF_REFRESH: Let EMIF place DDR memory into self-refresh and * disable EMIF. * WFI_FLAG_SAVE_EMIF: Save context of all EMIF registers and restore in * resume path. Only needed if PER domain loses context * and must also have WFI_FLAG_SELF_REFRESH set. * WFI_FLAG_WAKE_M3: Disable MPU clock or clockdomain to cause wkup_m3 to * execute when WFI instruction executes. * WFI_FLAG_RTC_ONLY: Configure the RTC to enter RTC+DDR mode. */ #define WFI_FLAG_FLUSH_CACHE BIT(0) #define WFI_FLAG_SELF_REFRESH BIT(1) #define WFI_FLAG_SAVE_EMIF BIT(2) #define WFI_FLAG_WAKE_M3 BIT(3) #define WFI_FLAG_RTC_ONLY BIT(4) #ifndef __ASSEMBLER__ struct am33xx_pm_sram_addr { void (*do_wfi)(void); unsigned long *do_wfi_sz; unsigned long *resume_offset; unsigned long *emif_sram_table; unsigned long *ro_sram_data; unsigned long resume_address; }; struct am33xx_pm_platform_data { int (*init)(int (*idle)(u32 wfi_flags)); int (*deinit)(void); int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long), unsigned long args); int (*cpu_suspend)(int (*fn)(unsigned long), unsigned long args); void (*begin_suspend)(void); void (*finish_suspend)(void); struct am33xx_pm_sram_addr *(*get_sram_addrs)(void); void (*save_context)(void); void (*restore_context)(void); int (*check_off_mode_enable)(void); }; struct am33xx_pm_sram_data { u32 wfi_flags; u32 l2_aux_ctrl_val; u32 l2_prefetch_ctrl_val; } __packed __aligned(8); struct am33xx_pm_ro_sram_data { u32 amx3_pm_sram_data_virt; u32 amx3_pm_sram_data_phys; void __iomem *rtc_base_virt; } __packed __aligned(8); #endif /* __ASSEMBLER__ */ #endif /* _LINUX_PLATFORM_DATA_PM33XX_H */ PK ! q4� y y platform_data/ams-delta-fiq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/platform_data/ams-delta-fiq.h * * Taken from the original Amstrad modifications to fiq.h * * Copyright (c) 2004 Amstrad Plc * Copyright (c) 2006 Matt Callow * Copyright (c) 2010 Janusz Krzysztofik * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H #define __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H /* * These are the offsets from the beginning of the fiq_buffer. They are put here * since the buffer and header need to be accessed by drivers servicing devices * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. */ #define FIQ_MASK 0 #define FIQ_STATE 1 #define FIQ_KEYS_CNT 2 #define FIQ_TAIL_OFFSET 3 #define FIQ_HEAD_OFFSET 4 #define FIQ_BUF_LEN 5 #define FIQ_KEY 6 #define FIQ_MISSED_KEYS 7 #define FIQ_BUFFER_START 8 #define FIQ_GPIO_INT_MASK 9 #define FIQ_KEYS_HICNT 10 #define FIQ_IRQ_PEND 11 #define FIQ_SIR_CODE_L1 12 #define IRQ_SIR_CODE_L2 13 #define FIQ_CNT_INT_00 14 #define FIQ_CNT_INT_KEY 15 #define FIQ_CNT_INT_MDM 16 #define FIQ_CNT_INT_03 17 #define FIQ_CNT_INT_HSW 18 #define FIQ_CNT_INT_05 19 #define FIQ_CNT_INT_06 20 #define FIQ_CNT_INT_07 21 #define FIQ_CNT_INT_08 22 #define FIQ_CNT_INT_09 23 #define FIQ_CNT_INT_10 24 #define FIQ_CNT_INT_11 25 #define FIQ_CNT_INT_12 26 #define FIQ_CNT_INT_13 27 #define FIQ_CNT_INT_14 28 #define FIQ_CNT_INT_15 29 #define FIQ_CIRC_BUFF 30 /*Start of circular buffer */ #endif PK ! x,�{S S platform_data/dma-imx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ #ifndef __ASM_ARCH_MXC_DMA_H__ #define __ASM_ARCH_MXC_DMA_H__ #include <linux/scatterlist.h> #include <linux/device.h> #include <linux/dmaengine.h> /* * This enumerates peripheral types. Used for SDMA. */ enum sdma_peripheral_type { IMX_DMATYPE_SSI, /* MCU domain SSI */ IMX_DMATYPE_SSI_SP, /* Shared SSI */ IMX_DMATYPE_MMC, /* MMC */ IMX_DMATYPE_SDHC, /* SDHC */ IMX_DMATYPE_UART, /* MCU domain UART */ IMX_DMATYPE_UART_SP, /* Shared UART */ IMX_DMATYPE_FIRI, /* FIRI */ IMX_DMATYPE_CSPI, /* MCU domain CSPI */ IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ IMX_DMATYPE_SIM, /* SIM */ IMX_DMATYPE_ATA, /* ATA */ IMX_DMATYPE_CCM, /* CCM */ IMX_DMATYPE_EXT, /* External peripheral */ IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ IMX_DMATYPE_DSP, /* DSP */ IMX_DMATYPE_MEMORY, /* Memory */ IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ IMX_DMATYPE_SPDIF, /* SPDIF */ IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ IMX_DMATYPE_ASRC, /* ASRC */ IMX_DMATYPE_ESAI, /* ESAI */ IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */ IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ IMX_DMATYPE_SAI, /* SAI */ }; enum imx_dma_prio { DMA_PRIO_HIGH = 0, DMA_PRIO_MEDIUM = 1, DMA_PRIO_LOW = 2 }; struct imx_dma_data { int dma_request; /* DMA request line */ int dma_request2; /* secondary DMA request line */ enum sdma_peripheral_type peripheral_type; int priority; }; static inline int imx_dma_is_ipu(struct dma_chan *chan) { return !strcmp(dev_name(chan->device->dev), "ipu-core"); } static inline int imx_dma_is_general_purpose(struct dma_chan *chan) { return !strcmp(chan->device->dev->driver->name, "imx-sdma") || !strcmp(chan->device->dev->driver->name, "imx-dma"); } #endif PK ! NM �[ [ platform_data/cyttsp4.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Header file for: * Cypress TrueTouch(TM) Standard Product (TTSP) touchscreen drivers. * For use with Cypress Txx3xx parts. * Supported parts include: * CY8CTST341 * CY8CTMA340 * * Copyright (C) 2009, 2010, 2011 Cypress Semiconductor, Inc. * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org> * * Contact Cypress Semiconductor at www.cypress.com (kev@cypress.com) */ #ifndef _CYTTSP4_H_ #define _CYTTSP4_H_ #define CYTTSP4_MT_NAME "cyttsp4_mt" #define CYTTSP4_I2C_NAME "cyttsp4_i2c_adapter" #define CYTTSP4_SPI_NAME "cyttsp4_spi_adapter" #define CY_TOUCH_SETTINGS_MAX 32 struct touch_framework { const uint16_t *abs; uint8_t size; uint8_t enable_vkeys; } __packed; struct cyttsp4_mt_platform_data { struct touch_framework *frmwrk; unsigned short flags; char const *inp_dev_name; }; struct touch_settings { const uint8_t *data; uint32_t size; uint8_t tag; } __packed; struct cyttsp4_core_platform_data { int irq_gpio; int rst_gpio; int level_irq_udelay; int (*xres)(struct cyttsp4_core_platform_data *pdata, struct device *dev); int (*init)(struct cyttsp4_core_platform_data *pdata, int on, struct device *dev); int (*power)(struct cyttsp4_core_platform_data *pdata, int on, struct device *dev, atomic_t *ignore_irq); int (*irq_stat)(struct cyttsp4_core_platform_data *pdata, struct device *dev); struct touch_settings *sett[CY_TOUCH_SETTINGS_MAX]; }; struct cyttsp4_platform_data { struct cyttsp4_core_platform_data *core_pdata; struct cyttsp4_mt_platform_data *mt_pdata; }; #endif /* _CYTTSP4_H_ */ PK ! xWLj� � platform_data/davinci-cpufreq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * TI DaVinci CPUFreq platform support. * * Copyright (C) 2009 Texas Instruments, Inc. https://www.ti.com/ */ #ifndef _MACH_DAVINCI_CPUFREQ_H #define _MACH_DAVINCI_CPUFREQ_H #include <linux/cpufreq.h> struct davinci_cpufreq_config { struct cpufreq_frequency_table *freq_table; int (*set_voltage)(unsigned int index); int (*init)(void); }; #endif /* _MACH_DAVINCI_CPUFREQ_H */ PK ! G��Q� � platform_data/pinctrl-single.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _PINCTRL_SINGLE_H #define _PINCTRL_SINGLE_H /** * irq: optional wake-up interrupt * rearm: optional soc specific rearm function * * Note that the irq and rearm setup should come from device * tree except for omap where there are still some dependencies * to the legacy PRM code. */ struct pcs_pdata { int irq; void (*rearm)(void); }; #endif /* _PINCTRL_SINGLE_H */ PK ! �u� � � platform_data/i2c-imx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * i2c.h - i.MX I2C driver header file * * Copyright (c) 2008, Darius Augulis <augulis.darius@gmail.com> */ #ifndef __ASM_ARCH_I2C_H_ #define __ASM_ARCH_I2C_H_ /** * struct imxi2c_platform_data - structure of platform data for MXC I2C driver * @bitrate: Bus speed measured in Hz * **/ struct imxi2c_platform_data { u32 bitrate; }; #endif /* __ASM_ARCH_I2C_H_ */ PK ! ��1` ` platform_data/hsmmc-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MMC definitions for OMAP2 * * Copyright (C) 2006 Nokia Corporation */ /* * struct omap_hsmmc_dev_attr.flags possibilities * * OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can * operate with either 1.8Vdc or 3.0Vdc card voltages; this flag * should be set if this is the case. See for example Section 22.5.3 * "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia * Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R). * * OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers * don't work correctly on some MMC controller instances on some * OMAP3 SoCs; this flag should be set if this is the case. See * for example Advisory 2.1.1.128 "MMC: Multiple Block Read * Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_ * Revision F (October 2010) (SPRZ278F). */ #define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0) #define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1) #define OMAP_HSMMC_SWAKEUP_MISSING BIT(2) struct omap_hsmmc_dev_attr { u8 flags; }; struct mmc_card; struct omap_hsmmc_platform_data { /* back-link to device */ struct device *dev; /* set if your board has components or wiring that limits the * maximum frequency on the MMC bus */ unsigned int max_freq; /* Integrating attributes from the omap_hwmod layer */ u8 controller_flags; /* Register offset deviation */ u16 reg_offset; /* * 4/8 wires and any additional host capabilities * need to OR'd all capabilities (ref. linux/mmc/host.h) */ u32 caps; /* Used for the MMC driver on 2430 and later */ u32 pm_caps; /* PM capabilities of the mmc */ /* nonremovable e.g. eMMC */ unsigned nonremovable:1; /* eMMC does not handle power off when not in sleep state */ unsigned no_regulator_off_init:1; /* we can put the features above into this variable */ #define HSMMC_HAS_PBIAS (1 << 0) #define HSMMC_HAS_UPDATED_RESET (1 << 1) #define HSMMC_HAS_HSPE_SUPPORT (1 << 2) unsigned features; /* string specifying a particular variant of hardware */ char *version; const char *name; u32 ocr_mask; }; PK ! 0 �" �" platform_data/cros_ec_proto.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * ChromeOS Embedded Controller protocol interface. * * Copyright (C) 2012 Google, Inc */ #ifndef __LINUX_CROS_EC_PROTO_H #define __LINUX_CROS_EC_PROTO_H #include <linux/device.h> #include <linux/lockdep_types.h> #include <linux/mutex.h> #include <linux/notifier.h> #include <linux/platform_data/cros_ec_commands.h> #define CROS_EC_DEV_NAME "cros_ec" #define CROS_EC_DEV_FP_NAME "cros_fp" #define CROS_EC_DEV_ISH_NAME "cros_ish" #define CROS_EC_DEV_PD_NAME "cros_pd" #define CROS_EC_DEV_SCP_NAME "cros_scp" #define CROS_EC_DEV_TP_NAME "cros_tp" /* * The EC is unresponsive for a time after a reboot command. Add a * simple delay to make sure that the bus stays locked. */ #define EC_REBOOT_DELAY_MS 50 /* * Max bus-specific overhead incurred by request/responses. * I2C requires 1 additional byte for requests. * I2C requires 2 additional bytes for responses. * SPI requires up to 32 additional bytes for responses. */ #define EC_PROTO_VERSION_UNKNOWN 0 #define EC_MAX_REQUEST_OVERHEAD 1 #define EC_MAX_RESPONSE_OVERHEAD 32 /* * Command interface between EC and AP, for LPC, I2C and SPI interfaces. */ enum { EC_MSG_TX_HEADER_BYTES = 3, EC_MSG_TX_TRAILER_BYTES = 1, EC_MSG_TX_PROTO_BYTES = EC_MSG_TX_HEADER_BYTES + EC_MSG_TX_TRAILER_BYTES, EC_MSG_RX_PROTO_BYTES = 3, /* Max length of messages for proto 2*/ EC_PROTO2_MSG_BYTES = EC_PROTO2_MAX_PARAM_SIZE + EC_MSG_TX_PROTO_BYTES, EC_MAX_MSG_BYTES = 64 * 1024, }; /** * struct cros_ec_command - Information about a ChromeOS EC command. * @version: Command version number (often 0). * @command: Command to send (EC_CMD_...). * @outsize: Outgoing length in bytes. * @insize: Max number of bytes to accept from the EC. * @result: EC's response to the command (separate from communication failure). * @data: Where to put the incoming data from EC and outgoing data to EC. */ struct cros_ec_command { uint32_t version; uint32_t command; uint32_t outsize; uint32_t insize; uint32_t result; uint8_t data[]; }; /** * struct cros_ec_device - Information about a ChromeOS EC device. * @phys_name: Name of physical comms layer (e.g. 'i2c-4'). * @dev: Device pointer for physical comms device * @was_wake_device: True if this device was set to wake the system from * sleep at the last suspend. * @cros_class: The class structure for this device. * @cmd_readmem: Direct read of the EC memory-mapped region, if supported. * @offset: Is within EC_LPC_ADDR_MEMMAP region. * @bytes: Number of bytes to read. zero means "read a string" (including * the trailing '\0'). At most only EC_MEMMAP_SIZE bytes can be * read. Caller must ensure that the buffer is large enough for the * result when reading a string. * @max_request: Max size of message requested. * @max_response: Max size of message response. * @max_passthru: Max sice of passthru message. * @proto_version: The protocol version used for this device. * @priv: Private data. * @irq: Interrupt to use. * @id: Device id. * @din: Input buffer (for data from EC). This buffer will always be * dword-aligned and include enough space for up to 7 word-alignment * bytes also, so we can ensure that the body of the message is always * dword-aligned (64-bit). We use this alignment to keep ARM and x86 * happy. Probably word alignment would be OK, there might be a small * performance advantage to using dword. * @dout: Output buffer (for data to EC). This buffer will always be * dword-aligned and include enough space for up to 7 word-alignment * bytes also, so we can ensure that the body of the message is always * dword-aligned (64-bit). We use this alignment to keep ARM and x86 * happy. Probably word alignment would be OK, there might be a small * performance advantage to using dword. * @din_size: Size of din buffer to allocate (zero to use static din). * @dout_size: Size of dout buffer to allocate (zero to use static dout). * @wake_enabled: True if this device can wake the system from sleep. * @suspended: True if this device had been suspended. * @cmd_xfer: Send command to EC and get response. * Returns the number of bytes received if the communication * succeeded, but that doesn't mean the EC was happy with the * command. The caller should check msg.result for the EC's result * code. * @pkt_xfer: Send packet to EC and get response. * @lockdep_key: Lockdep class for each instance. Unused if CONFIG_LOCKDEP is * not enabled. * @lock: One transaction at a time. * @mkbp_event_supported: 0 if MKBP not supported. Otherwise its value is * the maximum supported version of the MKBP host event * command + 1. * @host_sleep_v1: True if this EC supports the sleep v1 command. * @event_notifier: Interrupt event notifier for transport devices. * @event_data: Raw payload transferred with the MKBP event. * @event_size: Size in bytes of the event data. * @host_event_wake_mask: Mask of host events that cause wake from suspend. * @last_event_time: exact time from the hard irq when we got notified of * a new event. * @notifier_ready: The notifier_block to let the kernel re-query EC * communication protocol when the EC sends * EC_HOST_EVENT_INTERFACE_READY. * @ec: The platform_device used by the mfd driver to interface with the * main EC. * @pd: The platform_device used by the mfd driver to interface with the * PD behind an EC. */ struct cros_ec_device { /* These are used by other drivers that want to talk to the EC */ const char *phys_name; struct device *dev; bool was_wake_device; struct class *cros_class; int (*cmd_readmem)(struct cros_ec_device *ec, unsigned int offset, unsigned int bytes, void *dest); /* These are used to implement the platform-specific interface */ u16 max_request; u16 max_response; u16 max_passthru; u16 proto_version; void *priv; int irq; u8 *din; u8 *dout; int din_size; int dout_size; bool wake_enabled; bool suspended; int (*cmd_xfer)(struct cros_ec_device *ec, struct cros_ec_command *msg); int (*pkt_xfer)(struct cros_ec_device *ec, struct cros_ec_command *msg); struct lock_class_key lockdep_key; struct mutex lock; u8 mkbp_event_supported; bool host_sleep_v1; struct blocking_notifier_head event_notifier; struct ec_response_get_next_event_v1 event_data; int event_size; u32 host_event_wake_mask; u32 last_resume_result; ktime_t last_event_time; struct notifier_block notifier_ready; /* The platform devices used by the mfd driver */ struct platform_device *ec; struct platform_device *pd; }; /** * struct cros_ec_platform - ChromeOS EC platform information. * @ec_name: Name of EC device (e.g. 'cros-ec', 'cros-pd', ...) * used in /dev/ and sysfs. * @cmd_offset: Offset to apply for each command. Set when * registering a device behind another one. */ struct cros_ec_platform { const char *ec_name; u16 cmd_offset; }; /** * struct cros_ec_dev - ChromeOS EC device entry point. * @class_dev: Device structure used in sysfs. * @ec_dev: cros_ec_device structure to talk to the physical device. * @dev: Pointer to the platform device. * @debug_info: cros_ec_debugfs structure for debugging information. * @has_kb_wake_angle: True if at least 2 accelerometer are connected to the EC. * @cmd_offset: Offset to apply for each command. * @features: Features supported by the EC. */ struct cros_ec_dev { struct device class_dev; struct cros_ec_device *ec_dev; struct device *dev; struct cros_ec_debugfs *debug_info; bool has_kb_wake_angle; u16 cmd_offset; u32 features[2]; }; #define to_cros_ec_dev(dev) container_of(dev, struct cros_ec_dev, class_dev) int cros_ec_prepare_tx(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); int cros_ec_check_result(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); int cros_ec_query_all(struct cros_ec_device *ec_dev); int cros_ec_get_next_event(struct cros_ec_device *ec_dev, bool *wake_event, bool *has_more_events); u32 cros_ec_get_host_event(struct cros_ec_device *ec_dev); int cros_ec_check_features(struct cros_ec_dev *ec, int feature); int cros_ec_get_sensor_count(struct cros_ec_dev *ec); /** * cros_ec_get_time_ns() - Return time in ns. * * This is the function used to record the time for last_event_time in struct * cros_ec_device during the hard irq. * * Return: ktime_t format since boot. */ static inline ktime_t cros_ec_get_time_ns(void) { return ktime_get_boottime_ns(); } #endif /* __LINUX_CROS_EC_PROTO_H */ PK ! |�U$� � platform_data/max6639.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MAX6639_H #define _LINUX_MAX6639_H #include <linux/types.h> /* platform data for the MAX6639 temperature sensor and fan control */ struct max6639_platform_data { bool pwm_polarity; /* Polarity low (0) or high (1, default) */ int ppr; /* Pulses per rotation 1..4 (default == 2) */ int rpm_range; /* 2000, 4000 (default), 8000 or 16000 */ }; #endif /* _LINUX_MAX6639_H */ PK ! bH?3 3 platform_data/dma-s3c24xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * S3C24XX DMA handling * * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> */ /* Helper to encode the source selection constraints for early s3c socs. */ #define S3C24XX_DMA_CHANREQ(src, chan) ((BIT(3) | src) << chan * 4) enum s3c24xx_dma_bus { S3C24XX_DMA_APB, S3C24XX_DMA_AHB, }; /** * @bus: on which bus does the peripheral reside - AHB or APB. * @handshake: is a handshake with the peripheral necessary * @chansel: channel selection information, depending on variant; reqsel for * s3c2443 and later and channel-selection map for earlier SoCs * see CHANSEL doc in s3c2443-dma.c */ struct s3c24xx_dma_channel { enum s3c24xx_dma_bus bus; bool handshake; u16 chansel; }; struct dma_slave_map; /** * struct s3c24xx_dma_platdata - platform specific settings * @num_phy_channels: number of physical channels * @channels: array of virtual channel descriptions * @num_channels: number of virtual channels * @slave_map: dma slave map matching table * @slavecnt: number of elements in slave_map */ struct s3c24xx_dma_platdata { int num_phy_channels; struct s3c24xx_dma_channel *channels; int num_channels; const struct dma_slave_map *slave_map; int slavecnt; }; struct dma_chan; bool s3c24xx_dma_filter(struct dma_chan *chan, void *param); PK ! >�a�� � platform_data/b53.hnu �[��� /* * B53 platform data * * Copyright (C) 2013 Jonas Gorski <jogo@openwrt.org> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef __B53_H #define __B53_H #include <linux/types.h> #include <linux/platform_data/dsa.h> struct b53_platform_data { /* Must be first such that dsa_register_switch() can access it */ struct dsa_chip_data cd; u32 chip_id; u16 enabled_ports; /* only used by MMAP'd driver */ unsigned big_endian:1; void __iomem *regs; }; #endif PK ! ���/ / platform_data/shtc1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2014 Sensirion AG, Switzerland * Author: Johannes Winkelmann <johannes.winkelmann@sensirion.com> */ #ifndef __SHTC1_H_ #define __SHTC1_H_ struct shtc1_platform_data { bool blocking_io; bool high_precision; }; #endif /* __SHTC1_H_ */ PK ! �� platform_data/spi-davinci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2009 Texas Instruments. */ #ifndef __ARCH_ARM_DAVINCI_SPI_H #define __ARCH_ARM_DAVINCI_SPI_H #include <linux/platform_data/edma.h> #define SPI_INTERN_CS 0xFF enum { SPI_VERSION_1, /* For DM355/DM365/DM6467 */ SPI_VERSION_2, /* For DA8xx */ }; /** * davinci_spi_platform_data - Platform data for SPI master device on DaVinci * * @version: version of the SPI IP. Different DaVinci devices have slightly * varying versions of the same IP. * @num_chipselect: number of chipselects supported by this SPI master * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt * controller withn the SoC. Possible values are 0 and 1. * @cshold_bug: set this to true if the SPI controller on your chip requires * a write to CSHOLD bit in between transfers (like in DM355). * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any * device on the bus. */ struct davinci_spi_platform_data { u8 version; u8 num_chipselect; u8 intr_line; u8 prescaler_limit; bool cshold_bug; enum dma_event_q dma_event_q; }; /** * davinci_spi_config - Per-chip-select configuration for SPI slave devices * * @wdelay: amount of delay between transmissions. Measured in number of * SPI module clocks. * @odd_parity: polarity of parity flag at the end of transmit data stream. * 0 - odd parity, 1 - even parity. * @parity_enable: enable transmission of parity at end of each transmit * data stream. * @io_type: type of IO transfer. Choose between polled, interrupt and DMA. * @timer_disable: disable chip-select timers (setup and hold) * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks. * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks. * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured * in number of SPI clocks. * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in * number of SPI clocks. */ struct davinci_spi_config { u8 wdelay; u8 odd_parity; u8 parity_enable; #define SPI_IO_TYPE_INTR 0 #define SPI_IO_TYPE_POLL 1 #define SPI_IO_TYPE_DMA 2 u8 io_type; u8 timer_disable; u8 c2tdelay; u8 t2cdelay; u8 t2edelay; u8 c2edelay; }; #endif /* __ARCH_ARM_DAVINCI_SPI_H */ PK ! %U�� platform_data/serial-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Driver for OMAP-UART controller. * Based on drivers/serial/8250.c * * Copyright (C) 2010 Texas Instruments. * * Authors: * Govindraj R <govindraj.raja@ti.com> * Thara Gopinath <thara@ti.com> */ #ifndef __OMAP_SERIAL_H__ #define __OMAP_SERIAL_H__ #include <linux/serial_core.h> #include <linux/device.h> #include <linux/pm_qos.h> #define OMAP_SERIAL_DRIVER_NAME "omap_uart" /* * Use tty device name as ttyO, [O -> OMAP] * in bootargs we specify as console=ttyO0 if uart1 * is used as console uart. */ #define OMAP_SERIAL_NAME "ttyO" struct omap_uart_port_info { bool dma_enabled; /* To specify DMA Mode */ unsigned int uartclk; /* UART clock rate */ upf_t flags; /* UPF_* flags */ unsigned int dma_rx_buf_size; unsigned int dma_rx_timeout; unsigned int autosuspend_timeout; unsigned int dma_rx_poll_rate; int (*get_context_loss_count)(struct device *); void (*enable_wakeup)(struct device *, bool); }; #endif /* __OMAP_SERIAL_H__ */ PK ! 2��}� � platform_data/phy-da8xx-usb.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * phy-da8xx-usb - TI DaVinci DA8xx USB PHY driver * * Copyright (C) 2018 David Lechner <david@lechnology.com> */ #ifndef __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__ #define __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__ #include <linux/regmap.h> /** * da8xx_usb_phy_platform_data * @cfgchip: CFGCHIP syscon regmap */ struct da8xx_usb_phy_platform_data { struct regmap *cfgchip; }; #endif /* __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__ */ PK ! | �W W platform_data/ad7266.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD7266/65 SPI ADC driver * * Copyright 2012 Analog Devices Inc. */ #ifndef __IIO_ADC_AD7266_H__ #define __IIO_ADC_AD7266_H__ /** * enum ad7266_range - AD7266 reference voltage range * @AD7266_RANGE_VREF: Device is configured for input range 0V - VREF * (RANGE pin set to low) * @AD7266_RANGE_2VREF: Device is configured for input range 0V - 2VREF * (RANGE pin set to high) */ enum ad7266_range { AD7266_RANGE_VREF, AD7266_RANGE_2VREF, }; /** * enum ad7266_mode - AD7266 sample mode * @AD7266_MODE_DIFF: Device is configured for full differential mode * (SGL/DIFF pin set to low, AD0 pin set to low) * @AD7266_MODE_PSEUDO_DIFF: Device is configured for pseudo differential mode * (SGL/DIFF pin set to low, AD0 pin set to high) * @AD7266_MODE_SINGLE_ENDED: Device is configured for single-ended mode * (SGL/DIFF pin set to high) */ enum ad7266_mode { AD7266_MODE_DIFF, AD7266_MODE_PSEUDO_DIFF, AD7266_MODE_SINGLE_ENDED, }; /** * struct ad7266_platform_data - Platform data for the AD7266 driver * @range: Reference voltage range the device is configured for * @mode: Sample mode the device is configured for * @fixed_addr: Whether the address pins are hard-wired */ struct ad7266_platform_data { enum ad7266_range range; enum ad7266_mode mode; bool fixed_addr; }; #endif PK ! WI&q q platform_data/i2c-s3c2410.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2004-2009 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * * S3C - I2C Controller platform_device info */ #ifndef __I2C_S3C2410_H #define __I2C_S3C2410_H __FILE__ #define S3C_IICFLG_FILTER (1<<0) /* enable s3c2440 filter */ struct platform_device; /** * struct s3c2410_platform_i2c - Platform data for s3c I2C. * @bus_num: The bus number to use (if possible). * @flags: Any flags for the I2C bus (E.g. S3C_IICFLK_FILTER). * @slave_addr: The I2C address for the slave device (if enabled). * @frequency: The desired frequency in Hz of the bus. This is * guaranteed to not be exceeded. If the caller does * not care, use zero and the driver will select a * useful default. * @sda_delay: The delay (in ns) applied to SDA edges. * @cfg_gpio: A callback to configure the pins for I2C operation. */ struct s3c2410_platform_i2c { int bus_num; unsigned int flags; unsigned int slave_addr; unsigned long frequency; unsigned int sda_delay; void (*cfg_gpio)(struct platform_device *dev); }; /** * s3c_i2c0_set_platdata - set platform data for i2c0 device * @i2c: The platform data to set, or NULL for default data. * * Register the given platform data for use with the i2c0 device. This * call copies the platform data, so the caller can use __initdata for * their copy. * * This call will set cfg_gpio if is null to the default platform * implementation. * * Any user of s3c_device_i2c0 should call this, even if it is with * NULL to ensure that the device is given the default platform data * as the driver will no longer carry defaults. */ extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *i2c); /* defined by architecture to configure gpio */ extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); extern void s3c_i2c2_cfg_gpio(struct platform_device *dev); extern void s3c_i2c3_cfg_gpio(struct platform_device *dev); extern void s3c_i2c4_cfg_gpio(struct platform_device *dev); extern void s3c_i2c5_cfg_gpio(struct platform_device *dev); extern void s3c_i2c6_cfg_gpio(struct platform_device *dev); extern void s3c_i2c7_cfg_gpio(struct platform_device *dev); extern struct s3c2410_platform_i2c default_i2c_data; #endif /* __I2C_S3C2410_H */ PK ! ��T�y y platform_data/lm3639_bl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Simple driver for Texas Instruments LM3630 LED Flash driver chip * Copyright (C) 2012 Texas Instruments */ #ifndef __LINUX_LM3639_H #define __LINUX_LM3639_H #define LM3639_NAME "lm3639_bl" enum lm3639_pwm { LM3639_PWM_DISABLE = 0x00, LM3639_PWM_EN_ACTLOW = 0x48, LM3639_PWM_EN_ACTHIGH = 0x40, }; enum lm3639_strobe { LM3639_STROBE_DISABLE = 0x00, LM3639_STROBE_EN_ACTLOW = 0x10, LM3639_STROBE_EN_ACTHIGH = 0x30, }; enum lm3639_txpin { LM3639_TXPIN_DISABLE = 0x00, LM3639_TXPIN_EN_ACTLOW = 0x04, LM3639_TXPIN_EN_ACTHIGH = 0x0C, }; enum lm3639_fleds { LM3639_FLED_DIASBLE_ALL = 0x00, LM3639_FLED_EN_1 = 0x40, LM3639_FLED_EN_2 = 0x20, LM3639_FLED_EN_ALL = 0x60, }; enum lm3639_bleds { LM3639_BLED_DIASBLE_ALL = 0x00, LM3639_BLED_EN_1 = 0x10, LM3639_BLED_EN_2 = 0x08, LM3639_BLED_EN_ALL = 0x18, }; enum lm3639_bled_mode { LM3639_BLED_MODE_EXPONETIAL = 0x00, LM3639_BLED_MODE_LINEAR = 0x10, }; struct lm3639_platform_data { unsigned int max_brt_led; unsigned int init_brt_led; /* input pins */ enum lm3639_pwm pin_pwm; enum lm3639_strobe pin_strobe; enum lm3639_txpin pin_tx; /* output pins */ enum lm3639_fleds fled_pins; enum lm3639_bleds bled_pins; enum lm3639_bled_mode bled_mode; void (*pwm_set_intensity) (int brightness, int max_brightness); int (*pwm_get_intensity) (void); }; #endif /* __LINUX_LM3639_H */ PK ! �T�� platform_data/ntc_thermistor.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * ntc_thermistor.h - NTC Thermistors * * Copyright (C) 2010 Samsung Electronics * MyungJoo Ham <myungjoo.ham@samsung.com> */ #ifndef _LINUX_NTC_H #define _LINUX_NTC_H struct iio_channel; enum ntc_thermistor_type { TYPE_B57330V2103, TYPE_B57891S0103, TYPE_NCPXXWB473, TYPE_NCPXXWF104, TYPE_NCPXXWL333, TYPE_NCPXXXH103, }; struct ntc_thermistor_platform_data { /* * One (not both) of read_uV and read_ohm should be provided and only * one of the two should be provided. * Both functions should return negative value for an error case. * * pullup_uV, pullup_ohm, pulldown_ohm, and connect are required to use * read_uV() * * How to setup pullup_ohm, pulldown_ohm, and connect is * described at Documentation/hwmon/ntc_thermistor.rst * * pullup/down_ohm: 0 for infinite / not-connected * * chan: iio_channel pointer to communicate with the ADC which the * thermistor is using for conversion of the analog values. */ int (*read_uv)(struct ntc_thermistor_platform_data *); unsigned int pullup_uv; unsigned int pullup_ohm; unsigned int pulldown_ohm; enum { NTC_CONNECTED_POSITIVE, NTC_CONNECTED_GROUND } connect; struct iio_channel *chan; int (*read_ohm)(void); }; #endif /* _LINUX_NTC_H */ PK ! ��� platform_data/dma-iop32x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2006, Intel Corporation. */ #ifndef IOP_ADMA_H #define IOP_ADMA_H #include <linux/types.h> #include <linux/dmaengine.h> #include <linux/interrupt.h> #define IOP_ADMA_SLOT_SIZE 32 #define IOP_ADMA_THRESHOLD 4 #ifdef DEBUG #define IOP_PARANOIA 1 #else #define IOP_PARANOIA 0 #endif #define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x)) #define DMA0_ID 0 #define DMA1_ID 1 #define AAU_ID 2 /** * struct iop_adma_device - internal representation of an ADMA device * @pdev: Platform device * @id: HW ADMA Device selector * @dma_desc_pool: base of DMA descriptor region (DMA address) * @dma_desc_pool_virt: base of DMA descriptor region (CPU address) * @common: embedded struct dma_device */ struct iop_adma_device { struct platform_device *pdev; int id; dma_addr_t dma_desc_pool; void *dma_desc_pool_virt; struct dma_device common; }; /** * struct iop_adma_chan - internal representation of an ADMA device * @pending: allows batching of hardware operations * @lock: serializes enqueue/dequeue operations to the slot pool * @mmr_base: memory mapped register base * @chain: device chain view of the descriptors * @device: parent device * @common: common dmaengine channel object members * @last_used: place holder for allocation to continue from where it left off * @all_slots: complete domain of slots usable by the channel * @slots_allocated: records the actual size of the descriptor slot pool * @irq_tasklet: bottom half where iop_adma_slot_cleanup runs */ struct iop_adma_chan { int pending; spinlock_t lock; /* protects the descriptor slot pool */ void __iomem *mmr_base; struct list_head chain; struct iop_adma_device *device; struct dma_chan common; struct iop_adma_desc_slot *last_used; struct list_head all_slots; int slots_allocated; struct tasklet_struct irq_tasklet; }; /** * struct iop_adma_desc_slot - IOP-ADMA software descriptor * @slot_node: node on the iop_adma_chan.all_slots list * @chain_node: node on the op_adma_chan.chain list * @hw_desc: virtual address of the hardware descriptor chain * @phys: hardware address of the hardware descriptor chain * @group_head: first operation in a transaction * @slot_cnt: total slots used in an transaction (group of operations) * @slots_per_op: number of slots per operation * @idx: pool index * @tx_list: list of descriptors that are associated with one operation * @async_tx: support for the async_tx api * @group_list: list of slots that make up a multi-descriptor transaction * for example transfer lengths larger than the supported hw max * @xor_check_result: result of zero sum * @crc32_result: result crc calculation */ struct iop_adma_desc_slot { struct list_head slot_node; struct list_head chain_node; void *hw_desc; struct iop_adma_desc_slot *group_head; u16 slot_cnt; u16 slots_per_op; u16 idx; struct list_head tx_list; struct dma_async_tx_descriptor async_tx; union { u32 *xor_check_result; u32 *crc32_result; u32 *pq_check_result; }; }; struct iop_adma_platform_data { int hw_id; dma_cap_mask_t cap_mask; size_t pool_size; }; #define to_iop_sw_desc(addr_hw_desc) \ container_of(addr_hw_desc, struct iop_adma_desc_slot, hw_desc) #define iop_hw_desc_slot_idx(hw_desc, idx) \ ( (void *) (((unsigned long) hw_desc) + ((idx) << 5)) ) #endif PK ! ��+J) ) platform_data/shmob_drm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * shmob_drm.h -- SH Mobile DRM driver * * Copyright (C) 2012 Renesas Corporation * * Laurent Pinchart (laurent.pinchart@ideasonboard.com) */ #ifndef __SHMOB_DRM_H__ #define __SHMOB_DRM_H__ #include <drm/drm_mode.h> enum shmob_drm_clk_source { SHMOB_DRM_CLK_BUS, SHMOB_DRM_CLK_PERIPHERAL, SHMOB_DRM_CLK_EXTERNAL, }; enum shmob_drm_interface { SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */ SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */ SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */ SHMOB_DRM_IFACE_RGB12B, /* 12bpp */ SHMOB_DRM_IFACE_RGB16, /* 16bpp */ SHMOB_DRM_IFACE_RGB18, /* 18bpp */ SHMOB_DRM_IFACE_RGB24, /* 24bpp */ SHMOB_DRM_IFACE_YUV422, /* 16bpp */ SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */ SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */ SHMOB_DRM_IFACE_SYS8C, /* 18bpp, 2:8:8 */ SHMOB_DRM_IFACE_SYS8D, /* 16bpp, 8:8 */ SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */ SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */ SHMOB_DRM_IFACE_SYS16A, /* 16bpp */ SHMOB_DRM_IFACE_SYS16B, /* 18bpp, 16:2 */ SHMOB_DRM_IFACE_SYS16C, /* 18bpp, 2:16 */ SHMOB_DRM_IFACE_SYS18, /* 18bpp */ SHMOB_DRM_IFACE_SYS24, /* 24bpp */ }; struct shmob_drm_backlight_data { const char *name; int max_brightness; int (*get_brightness)(void); int (*set_brightness)(int brightness); }; struct shmob_drm_panel_data { unsigned int width_mm; /* Panel width in mm */ unsigned int height_mm; /* Panel height in mm */ struct drm_mode_modeinfo mode; }; struct shmob_drm_sys_interface_data { unsigned int read_latch:6; unsigned int read_setup:8; unsigned int read_cycle:8; unsigned int read_strobe:8; unsigned int write_setup:8; unsigned int write_cycle:8; unsigned int write_strobe:8; unsigned int cs_setup:3; unsigned int vsync_active_high:1; unsigned int vsync_dir_input:1; }; #define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */ #define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */ #define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */ #define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */ #define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4) /* Disable dotclock during blanking */ struct shmob_drm_interface_data { enum shmob_drm_interface interface; struct shmob_drm_sys_interface_data sys; unsigned int clk_div; unsigned int flags; }; struct shmob_drm_platform_data { enum shmob_drm_clk_source clk_source; struct shmob_drm_interface_data iface; struct shmob_drm_panel_data panel; struct shmob_drm_backlight_data backlight; }; #endif /* __SHMOB_DRM_H__ */ PK ! L䦁� � platform_data/brcmfmac.hnu �[��� /* * Copyright (c) 201 Broadcom Corporation * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef _LINUX_BRCMFMAC_PLATFORM_H #define _LINUX_BRCMFMAC_PLATFORM_H #define BRCMFMAC_PDATA_NAME "brcmfmac" #define BRCMFMAC_COUNTRY_BUF_SZ 4 /* * Platform specific driver functions and data. Through the platform specific * device data functions and data can be provided to help the brcmfmac driver to * operate with the device in combination with the used platform. */ /** * Note: the brcmfmac can be loaded as module or be statically built-in into * the kernel. If built-in then do note that it uses module_init (and * module_exit) routines which equal device_initcall. So if you intend to * create a module with the platform specific data for the brcmfmac and have * it built-in to the kernel then use a higher initcall then device_initcall * (see init.h). If this is not done then brcmfmac will load without problems * but will not pickup the platform data. * * When the driver does not "detect" platform driver data then it will continue * without reporting anything and just assume there is no data needed. Which is * probably true for most platforms. */ /** * enum brcmf_bus_type - Bus type identifier. Currently SDIO, USB and PCIE are * supported. */ enum brcmf_bus_type { BRCMF_BUSTYPE_SDIO, BRCMF_BUSTYPE_USB, BRCMF_BUSTYPE_PCIE }; /** * struct brcmfmac_sdio_pd - SDIO Device specific platform data. * * @txglomsz: SDIO txglom size. Use 0 if default of driver is to be * used. * @drive_strength: is the preferred drive_strength to be used for the SDIO * pins. If 0 then a default value will be used. This is * the target drive strength, the exact drive strength * which will be used depends on the capabilities of the * device. * @oob_irq_supported: does the board have support for OOB interrupts. SDIO * in-band interrupts are relatively slow and for having * less overhead on interrupt processing an out of band * interrupt can be used. If the HW supports this then * enable this by setting this field to true and configure * the oob related fields. * @oob_irq_nr, * @oob_irq_flags: the OOB interrupt information. The values are used for * registering the irq using request_irq function. * @broken_sg_support: flag for broken sg list support of SDIO host controller. * Set this to true if the SDIO host controller has higher * align requirement than 32 bytes for each scatterlist * item. * @sd_head_align: alignment requirement for start of data buffer. * @sd_sgentry_align: length alignment requirement for each sg entry. * @reset: This function can get called if the device communication * broke down. This functionality is particularly useful in * case of SDIO type devices. It is possible to reset a * dongle via sdio data interface, but it requires that * this is fully functional. This function is chip/module * specific and this function should return only after the * complete reset has completed. */ struct brcmfmac_sdio_pd { int txglomsz; unsigned int drive_strength; bool oob_irq_supported; unsigned int oob_irq_nr; unsigned long oob_irq_flags; bool broken_sg_support; unsigned short sd_head_align; unsigned short sd_sgentry_align; void (*reset)(void); }; /** * struct brcmfmac_pd_cc_entry - Struct for translating user space country code * (iso3166) to firmware country code and * revision. * * @iso3166: iso3166 alpha 2 country code string. * @cc: firmware country code string. * @rev: firmware country code revision. */ struct brcmfmac_pd_cc_entry { char iso3166[BRCMFMAC_COUNTRY_BUF_SZ]; char cc[BRCMFMAC_COUNTRY_BUF_SZ]; s32 rev; }; /** * struct brcmfmac_pd_cc - Struct for translating country codes as set by user * space to a country code and rev which can be used by * firmware. * * @table_size: number of entries in table (> 0) * @table: array of 1 or more elements with translation information. */ struct brcmfmac_pd_cc { int table_size; struct brcmfmac_pd_cc_entry table[0]; }; /** * struct brcmfmac_pd_device - Device specific platform data. (id/rev/bus_type) * is the unique identifier of the device. * * @id: ID of the device for which this data is. In case of SDIO * or PCIE this is the chipid as identified by chip.c In * case of USB this is the chipid as identified by the * device query. * @rev: chip revision, see id. * @bus_type: The type of bus. Some chipid/rev exist for different bus * types. Each bus type has its own set of settings. * @feature_disable: Bitmask of features to disable (override), See feature.c * in brcmfmac for details. * @country_codes: If available, pointer to struct for translating country * codes. * @bus: Bus specific (union) device settings. Currently only * SDIO. */ struct brcmfmac_pd_device { unsigned int id; unsigned int rev; enum brcmf_bus_type bus_type; unsigned int feature_disable; struct brcmfmac_pd_cc *country_codes; union { struct brcmfmac_sdio_pd sdio; } bus; }; /** * struct brcmfmac_platform_data - BRCMFMAC specific platform data. * * @power_on: This function is called by the brcmfmac driver when the module * gets loaded. This can be particularly useful for low power * devices. The platform spcific routine may for example decide to * power up the complete device. If there is no use-case for this * function then provide NULL. * @power_off: This function is called by the brcmfmac when the module gets * unloaded. At this point the devices can be powered down or * otherwise be reset. So if an actual power_off is not supported * but reset is supported by the devices then reset the devices * when this function gets called. This can be particularly useful * for low power devices. If there is no use-case for this * function then provide NULL. */ struct brcmfmac_platform_data { void (*power_on)(void); void (*power_off)(void); char *fw_alternative_path; int device_count; struct brcmfmac_pd_device devices[0]; }; #endif /* _LINUX_BRCMFMAC_PLATFORM_H */ PK ! @0� � platform_data/bcmgenet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PLATFORM_DATA_BCMGENET_H__ #define __LINUX_PLATFORM_DATA_BCMGENET_H__ #include <linux/types.h> #include <linux/if_ether.h> #include <linux/phy.h> struct bcmgenet_platform_data { bool mdio_enabled; phy_interface_t phy_interface; int phy_address; int phy_speed; int phy_duplex; u8 mac_address[ETH_ALEN]; int genet_version; }; #endif PK ! �LDj j platform_data/sa11x0-serial.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Author: Nicolas Pitre * * Moved and changed lots, Russell King * * Low level machine dependent UART functions. */ #ifndef SA11X0_SERIAL_H #define SA11X0_SERIAL_H struct uart_port; struct uart_info; /* * This is a temporary structure for registering these * functions; it is intended to be discarded after boot. */ struct sa1100_port_fns { void (*set_mctrl)(struct uart_port *, u_int); u_int (*get_mctrl)(struct uart_port *); void (*pm)(struct uart_port *, u_int, u_int); int (*set_wake)(struct uart_port *, u_int); }; #ifdef CONFIG_SERIAL_SA1100 void sa1100_register_uart_fns(struct sa1100_port_fns *fns); void sa1100_register_uart(int idx, int port); #else static inline void sa1100_register_uart_fns(struct sa1100_port_fns *fns) { } static inline void sa1100_register_uart(int idx, int port) { } #endif #endif PK ! m�@=K K platform_data/ltc4245.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Platform Data for LTC4245 hardware monitor chip * * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> */ #ifndef LINUX_LTC4245_H #define LINUX_LTC4245_H #include <linux/types.h> struct ltc4245_platform_data { bool use_extra_gpios; }; #endif /* LINUX_LTC4245_H */ PK ! Ě�� � platform_data/omap1_bl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __OMAP1_BL_H__ #define __OMAP1_BL_H__ #include <linux/device.h> struct omap_backlight_config { int default_intensity; int (*set_power)(struct device *dev, int state); }; #endif PK ! �)��� � platform_data/tsl2772.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Device driver for monitoring ambient light intensity (lux) * and proximity (prox) within the TAOS TSL2772 family of devices. * * Copyright (c) 2012, TAOS Corporation. * Copyright (c) 2017-2018 Brian Masney <masneyb@onstation.org> */ #ifndef __TSL2772_H #define __TSL2772_H struct tsl2772_lux { unsigned int ch0; unsigned int ch1; }; /* Max number of segments allowable in LUX table */ #define TSL2772_MAX_LUX_TABLE_SIZE 6 /* The default LUX tables all have 3 elements. */ #define TSL2772_DEF_LUX_TABLE_SZ 3 #define TSL2772_DEFAULT_TABLE_BYTES (sizeof(struct tsl2772_lux) * \ TSL2772_DEF_LUX_TABLE_SZ) /* Proximity diode to use */ #define TSL2772_DIODE0 0x01 #define TSL2772_DIODE1 0x02 #define TSL2772_DIODE_BOTH 0x03 /* LED Power */ #define TSL2772_100_mA 0x00 #define TSL2772_50_mA 0x01 #define TSL2772_25_mA 0x02 #define TSL2772_13_mA 0x03 /** * struct tsl2772_settings - Settings for the tsl2772 driver * @als_time: Integration time of the ALS channel ADCs in 2.73 ms * increments. Total integration time is * (256 - als_time) * 2.73. * @als_gain: Index into the tsl2772_als_gain array. * @als_gain_trim: Default gain trim to account for aperture effects. * @wait_time: Time between proximity and ALS cycles in 2.73 * periods. * @prox_time: Integration time of the proximity ADC in 2.73 ms * increments. Total integration time is * (256 - prx_time) * 2.73. * @prox_gain: Index into the tsl2772_prx_gain array. * @als_prox_config: The value of the ALS / Proximity configuration * register. * @als_cal_target: Known external ALS reading for calibration. * @als_persistence: H/W Filters, Number of 'out of limits' ALS readings. * @als_interrupt_en: Enable/Disable ALS interrupts * @als_thresh_low: CH0 'low' count to trigger interrupt. * @als_thresh_high: CH0 'high' count to trigger interrupt. * @prox_persistence: H/W Filters, Number of 'out of limits' proximity * readings. * @prox_interrupt_en: Enable/Disable proximity interrupts. * @prox_thres_low: Low threshold proximity detection. * @prox_thres_high: High threshold proximity detection. * @prox_pulse_count: Number if proximity emitter pulses. * @prox_max_samples_cal: The number of samples that are taken when performing * a proximity calibration. * @prox_diode Which diode(s) to use for driving the external * LED(s) for proximity sensing. * @prox_power The amount of power to use for the external LED(s). */ struct tsl2772_settings { int als_time; int als_gain; int als_gain_trim; int wait_time; int prox_time; int prox_gain; int als_prox_config; int als_cal_target; u8 als_persistence; bool als_interrupt_en; int als_thresh_low; int als_thresh_high; u8 prox_persistence; bool prox_interrupt_en; int prox_thres_low; int prox_thres_high; int prox_pulse_count; int prox_max_samples_cal; int prox_diode; int prox_power; }; /** * struct tsl2772_platform_data - Platform callback, glass and defaults * @platform_lux_table: Device specific glass coefficents * @platform_default_settings: Device specific power on defaults */ struct tsl2772_platform_data { struct tsl2772_lux platform_lux_table[TSL2772_MAX_LUX_TABLE_SIZE]; struct tsl2772_settings *platform_default_settings; }; #endif /* __TSL2772_H */ PK ! (٩r+ + platform_data/omap-twl4030.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /** * omap-twl4030.h - ASoC machine driver for TI SoC based boards with twl4030 * codec, header. * * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com * All rights reserved. * * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ #ifndef _OMAP_TWL4030_H_ #define _OMAP_TWL4030_H_ /* To select if only one channel is connected in a stereo port */ #define OMAP_TWL4030_LEFT (1 << 0) #define OMAP_TWL4030_RIGHT (1 << 1) struct omap_tw4030_pdata { const char *card_name; /* Voice port is connected to McBSP3 */ bool voice_connected; /* The driver will parse the connection flags if this flag is set */ bool custom_routing; /* Flags to indicate connected audio ports. */ u8 has_hs; u8 has_hf; u8 has_predriv; u8 has_carkit; bool has_ear; bool has_mainmic; bool has_submic; bool has_hsmic; bool has_carkitmic; bool has_digimic0; bool has_digimic1; u8 has_linein; /* Jack detect GPIO or <= 0 if it is not implemented */ int jack_detect; }; #endif /* _OMAP_TWL4030_H_ */ PK ! 8�J J platform_data/lcd-mipid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LCD_MIPID_H #define __LCD_MIPID_H enum mipid_test_num { MIPID_TEST_RGB_LINES, }; enum mipid_test_result { MIPID_TEST_SUCCESS, MIPID_TEST_INVALID, MIPID_TEST_FAILED, }; #ifdef __KERNEL__ struct mipid_platform_data { int nreset_gpio; int data_lines; void (*shutdown)(struct mipid_platform_data *pdata); void (*set_bklight_level)(struct mipid_platform_data *pdata, int level); int (*get_bklight_level)(struct mipid_platform_data *pdata); int (*get_bklight_max)(struct mipid_platform_data *pdata); }; #endif #endif PK ! Թ�� � ! platform_data/gpio/gpio-amd-fch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * AMD FCH gpio driver platform-data * * Copyright (C) 2018 metux IT consult * Author: Enrico Weigelt <info@metux.net> * */ #ifndef __LINUX_PLATFORM_DATA_GPIO_AMD_FCH_H #define __LINUX_PLATFORM_DATA_GPIO_AMD_FCH_H #define AMD_FCH_GPIO_DRIVER_NAME "gpio_amd_fch" /* * gpio register index definitions */ #define AMD_FCH_GPIO_REG_GPIO49 0x40 #define AMD_FCH_GPIO_REG_GPIO50 0x41 #define AMD_FCH_GPIO_REG_GPIO51 0x42 #define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 0x43 #define AMD_FCH_GPIO_REG_GPIO57 0x44 #define AMD_FCH_GPIO_REG_GPIO58 0x45 #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1 0x46 #define AMD_FCH_GPIO_REG_GPIO64 0x47 #define AMD_FCH_GPIO_REG_GPIO68 0x48 #define AMD_FCH_GPIO_REG_GPIO66_SPKR 0x5B #define AMD_FCH_GPIO_REG_GPIO71 0x4D #define AMD_FCH_GPIO_REG_GPIO32_GE1 0x59 #define AMD_FCH_GPIO_REG_GPIO33_GE2 0x5A #define AMT_FCH_GPIO_REG_GEVT22 0x09 /* * struct amd_fch_gpio_pdata - GPIO chip platform data * @gpio_num: number of entries * @gpio_reg: array of gpio registers * @gpio_names: array of gpio names */ struct amd_fch_gpio_pdata { int gpio_num; int *gpio_reg; const char * const *gpio_names; }; #endif /* __LINUX_PLATFORM_DATA_GPIO_AMD_FCH_H */ PK ! ���� � platform_data/gpio-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * OMAP GPIO handling defines and functions * * Copyright (C) 2003-2005 Nokia Corporation * * Written by Juha Yrjölä <juha.yrjola@nokia.com> */ #ifndef __ASM_ARCH_OMAP_GPIO_H #define __ASM_ARCH_OMAP_GPIO_H #ifndef __ASSEMBLER__ #include <linux/io.h> #include <linux/platform_device.h> #endif #define OMAP1_MPUIO_BASE 0xfffb5000 /* * These are the omap15xx/16xx offsets. The omap7xx offset are * OMAP_MPUIO_ / 2 offsets below. */ #define OMAP_MPUIO_INPUT_LATCH 0x00 #define OMAP_MPUIO_OUTPUT 0x04 #define OMAP_MPUIO_IO_CNTL 0x08 #define OMAP_MPUIO_KBR_LATCH 0x10 #define OMAP_MPUIO_KBC 0x14 #define OMAP_MPUIO_GPIO_EVENT_MODE 0x18 #define OMAP_MPUIO_GPIO_INT_EDGE 0x1c #define OMAP_MPUIO_KBD_INT 0x20 #define OMAP_MPUIO_GPIO_INT 0x24 #define OMAP_MPUIO_KBD_MASKIT 0x28 #define OMAP_MPUIO_GPIO_MASKIT 0x2c #define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 #define OMAP_MPUIO_LATCH 0x34 #define OMAP34XX_NR_GPIOS 6 /* * OMAP1510 GPIO registers */ #define OMAP1510_GPIO_DATA_INPUT 0x00 #define OMAP1510_GPIO_DATA_OUTPUT 0x04 #define OMAP1510_GPIO_DIR_CONTROL 0x08 #define OMAP1510_GPIO_INT_CONTROL 0x0c #define OMAP1510_GPIO_INT_MASK 0x10 #define OMAP1510_GPIO_INT_STATUS 0x14 #define OMAP1510_GPIO_PIN_CONTROL 0x18 #define OMAP1510_IH_GPIO_BASE 64 /* * OMAP1610 specific GPIO registers */ #define OMAP1610_GPIO_REVISION 0x0000 #define OMAP1610_GPIO_SYSCONFIG 0x0010 #define OMAP1610_GPIO_SYSSTATUS 0x0014 #define OMAP1610_GPIO_IRQSTATUS1 0x0018 #define OMAP1610_GPIO_IRQENABLE1 0x001c #define OMAP1610_GPIO_WAKEUPENABLE 0x0028 #define OMAP1610_GPIO_DATAIN 0x002c #define OMAP1610_GPIO_DATAOUT 0x0030 #define OMAP1610_GPIO_DIRECTION 0x0034 #define OMAP1610_GPIO_EDGE_CTRL1 0x0038 #define OMAP1610_GPIO_EDGE_CTRL2 0x003c #define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c #define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8 #define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0 #define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc #define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8 #define OMAP1610_GPIO_SET_DATAOUT 0x00f0 /* * OMAP7XX specific GPIO registers */ #define OMAP7XX_GPIO_DATA_INPUT 0x00 #define OMAP7XX_GPIO_DATA_OUTPUT 0x04 #define OMAP7XX_GPIO_DIR_CONTROL 0x08 #define OMAP7XX_GPIO_INT_CONTROL 0x0c #define OMAP7XX_GPIO_INT_MASK 0x10 #define OMAP7XX_GPIO_INT_STATUS 0x14 /* * omap2+ specific GPIO registers */ #define OMAP24XX_GPIO_REVISION 0x0000 #define OMAP24XX_GPIO_SYSCONFIG 0x0010 #define OMAP24XX_GPIO_IRQSTATUS1 0x0018 #define OMAP24XX_GPIO_IRQSTATUS2 0x0028 #define OMAP24XX_GPIO_IRQENABLE2 0x002c #define OMAP24XX_GPIO_IRQENABLE1 0x001c #define OMAP24XX_GPIO_WAKE_EN 0x0020 #define OMAP24XX_GPIO_CTRL 0x0030 #define OMAP24XX_GPIO_OE 0x0034 #define OMAP24XX_GPIO_DATAIN 0x0038 #define OMAP24XX_GPIO_DATAOUT 0x003c #define OMAP24XX_GPIO_LEVELDETECT0 0x0040 #define OMAP24XX_GPIO_LEVELDETECT1 0x0044 #define OMAP24XX_GPIO_RISINGDETECT 0x0048 #define OMAP24XX_GPIO_FALLINGDETECT 0x004c #define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 #define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 #define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 #define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 #define OMAP24XX_GPIO_CLEARWKUENA 0x0080 #define OMAP24XX_GPIO_SETWKUENA 0x0084 #define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 #define OMAP24XX_GPIO_SETDATAOUT 0x0094 #define OMAP4_GPIO_REVISION 0x0000 #define OMAP4_GPIO_SYSCONFIG 0x0010 #define OMAP4_GPIO_EOI 0x0020 #define OMAP4_GPIO_IRQSTATUSRAW0 0x0024 #define OMAP4_GPIO_IRQSTATUSRAW1 0x0028 #define OMAP4_GPIO_IRQSTATUS0 0x002c #define OMAP4_GPIO_IRQSTATUS1 0x0030 #define OMAP4_GPIO_IRQSTATUSSET0 0x0034 #define OMAP4_GPIO_IRQSTATUSSET1 0x0038 #define OMAP4_GPIO_IRQSTATUSCLR0 0x003c #define OMAP4_GPIO_IRQSTATUSCLR1 0x0040 #define OMAP4_GPIO_IRQWAKEN0 0x0044 #define OMAP4_GPIO_IRQWAKEN1 0x0048 #define OMAP4_GPIO_IRQENABLE1 0x011c #define OMAP4_GPIO_WAKE_EN 0x0120 #define OMAP4_GPIO_IRQSTATUS2 0x0128 #define OMAP4_GPIO_IRQENABLE2 0x012c #define OMAP4_GPIO_CTRL 0x0130 #define OMAP4_GPIO_OE 0x0134 #define OMAP4_GPIO_DATAIN 0x0138 #define OMAP4_GPIO_DATAOUT 0x013c #define OMAP4_GPIO_LEVELDETECT0 0x0140 #define OMAP4_GPIO_LEVELDETECT1 0x0144 #define OMAP4_GPIO_RISINGDETECT 0x0148 #define OMAP4_GPIO_FALLINGDETECT 0x014c #define OMAP4_GPIO_DEBOUNCENABLE 0x0150 #define OMAP4_GPIO_DEBOUNCINGTIME 0x0154 #define OMAP4_GPIO_CLEARIRQENABLE1 0x0160 #define OMAP4_GPIO_SETIRQENABLE1 0x0164 #define OMAP4_GPIO_CLEARWKUENA 0x0180 #define OMAP4_GPIO_SETWKUENA 0x0184 #define OMAP4_GPIO_CLEARDATAOUT 0x0190 #define OMAP4_GPIO_SETDATAOUT 0x0194 #define OMAP_MAX_GPIO_LINES 192 #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) #ifndef __ASSEMBLER__ struct omap_gpio_reg_offs { u16 revision; u16 sysconfig; u16 direction; u16 datain; u16 dataout; u16 set_dataout; u16 clr_dataout; u16 irqstatus; u16 irqstatus2; u16 irqstatus_raw0; u16 irqstatus_raw1; u16 irqenable; u16 irqenable2; u16 set_irqenable; u16 clr_irqenable; u16 debounce; u16 debounce_en; u16 ctrl; u16 wkup_en; u16 leveldetect0; u16 leveldetect1; u16 risingdetect; u16 fallingdetect; u16 irqctrl; u16 edgectrl1; u16 edgectrl2; u16 pinctrl; bool irqenable_inv; }; struct omap_gpio_platform_data { int bank_type; int bank_width; /* GPIO bank width */ int bank_stride; /* Only needed for omap1 MPUIO */ bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ bool loses_context; /* whether the bank would ever lose context */ bool is_mpuio; /* whether the bank is of type MPUIO */ u32 non_wakeup_gpios; const struct omap_gpio_reg_offs *regs; /* Return context loss count due to PM states changing */ int (*get_context_loss_count)(struct device *dev); }; #endif /* __ASSEMBLER__ */ #endif PK ! ��� platform_data/wkup_m3.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * TI Wakeup M3 remote processor platform data * * Copyright (C) 2014-2015 Texas Instruments, Inc. * * Dave Gerlach <d-gerlach@ti.com> */ #ifndef _LINUX_PLATFORM_DATA_WKUP_M3_H #define _LINUX_PLATFORM_DATA_WKUP_M3_H struct platform_device; struct wkup_m3_platform_data { const char *reset_name; int (*assert_reset)(struct platform_device *pdev, const char *name); int (*deassert_reset)(struct platform_device *pdev, const char *name); }; #endif /* _LINUX_PLATFORM_DATA_WKUP_M3_H */ PK ! ���� � platform_data/lp855x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * LP855x Backlight Driver * * Copyright (C) 2011 Texas Instruments */ #ifndef _LP855X_H #define _LP855X_H #define BL_CTL_SHFT (0) #define BRT_MODE_SHFT (1) #define BRT_MODE_MASK (0x06) /* Enable backlight. Only valid when BRT_MODE=10(I2C only) */ #define ENABLE_BL (1) #define DISABLE_BL (0) #define I2C_CONFIG(id) id ## _I2C_CONFIG #define PWM_CONFIG(id) id ## _PWM_CONFIG /* DEVICE CONTROL register - LP8550 */ #define LP8550_PWM_CONFIG (LP8550_PWM_ONLY << BRT_MODE_SHFT) #define LP8550_I2C_CONFIG ((ENABLE_BL << BL_CTL_SHFT) | \ (LP8550_I2C_ONLY << BRT_MODE_SHFT)) /* DEVICE CONTROL register - LP8551 */ #define LP8551_PWM_CONFIG LP8550_PWM_CONFIG #define LP8551_I2C_CONFIG LP8550_I2C_CONFIG /* DEVICE CONTROL register - LP8552 */ #define LP8552_PWM_CONFIG LP8550_PWM_CONFIG #define LP8552_I2C_CONFIG LP8550_I2C_CONFIG /* DEVICE CONTROL register - LP8553 */ #define LP8553_PWM_CONFIG LP8550_PWM_CONFIG #define LP8553_I2C_CONFIG LP8550_I2C_CONFIG /* CONFIG register - LP8555 */ #define LP8555_PWM_STANDBY BIT(7) #define LP8555_PWM_FILTER BIT(6) #define LP8555_RELOAD_EPROM BIT(3) /* use it if EPROMs should be reset when the backlight turns on */ #define LP8555_OFF_OPENLEDS BIT(2) #define LP8555_PWM_CONFIG LP8555_PWM_ONLY #define LP8555_I2C_CONFIG LP8555_I2C_ONLY #define LP8555_COMB1_CONFIG LP8555_COMBINED1 #define LP8555_COMB2_CONFIG LP8555_COMBINED2 /* DEVICE CONTROL register - LP8556 */ #define LP8556_PWM_CONFIG (LP8556_PWM_ONLY << BRT_MODE_SHFT) #define LP8556_COMB1_CONFIG (LP8556_COMBINED1 << BRT_MODE_SHFT) #define LP8556_I2C_CONFIG ((ENABLE_BL << BL_CTL_SHFT) | \ (LP8556_I2C_ONLY << BRT_MODE_SHFT)) #define LP8556_COMB2_CONFIG (LP8556_COMBINED2 << BRT_MODE_SHFT) #define LP8556_FAST_CONFIG BIT(7) /* use it if EPROMs should be maintained when exiting the low power mode */ /* CONFIG register - LP8557 */ #define LP8557_PWM_STANDBY BIT(7) #define LP8557_PWM_FILTER BIT(6) #define LP8557_RELOAD_EPROM BIT(3) /* use it if EPROMs should be reset when the backlight turns on */ #define LP8557_OFF_OPENLEDS BIT(2) #define LP8557_PWM_CONFIG LP8557_PWM_ONLY #define LP8557_I2C_CONFIG LP8557_I2C_ONLY #define LP8557_COMB1_CONFIG LP8557_COMBINED1 #define LP8557_COMB2_CONFIG LP8557_COMBINED2 enum lp855x_chip_id { LP8550, LP8551, LP8552, LP8553, LP8555, LP8556, LP8557, }; enum lp8550_brighntess_source { LP8550_PWM_ONLY, LP8550_I2C_ONLY = 2, }; enum lp8551_brighntess_source { LP8551_PWM_ONLY = LP8550_PWM_ONLY, LP8551_I2C_ONLY = LP8550_I2C_ONLY, }; enum lp8552_brighntess_source { LP8552_PWM_ONLY = LP8550_PWM_ONLY, LP8552_I2C_ONLY = LP8550_I2C_ONLY, }; enum lp8553_brighntess_source { LP8553_PWM_ONLY = LP8550_PWM_ONLY, LP8553_I2C_ONLY = LP8550_I2C_ONLY, }; enum lp8555_brightness_source { LP8555_PWM_ONLY, LP8555_I2C_ONLY, LP8555_COMBINED1, /* Brightness register with shaped PWM */ LP8555_COMBINED2, /* PWM with shaped brightness register */ }; enum lp8556_brightness_source { LP8556_PWM_ONLY, LP8556_COMBINED1, /* pwm + i2c before the shaper block */ LP8556_I2C_ONLY, LP8556_COMBINED2, /* pwm + i2c after the shaper block */ }; enum lp8557_brightness_source { LP8557_PWM_ONLY, LP8557_I2C_ONLY, LP8557_COMBINED1, /* pwm + i2c after the shaper block */ LP8557_COMBINED2, /* pwm + i2c before the shaper block */ }; struct lp855x_rom_data { u8 addr; u8 val; }; /** * struct lp855x_platform_data - lp855 platform-specific data * @name : Backlight driver name. If it is not defined, default name is set. * @device_control : value of DEVICE CONTROL register * @initial_brightness : initial value of backlight brightness * @period_ns : platform specific pwm period value. unit is nano. * Only valid when mode is PWM_BASED. * @size_program : total size of lp855x_rom_data * @rom_data : list of new eeprom/eprom registers */ struct lp855x_platform_data { const char *name; u8 device_control; u8 initial_brightness; unsigned int period_ns; int size_program; struct lp855x_rom_data *rom_data; }; #endif PK ! �=��� � platform_data/wilco-ec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * ChromeOS Wilco Embedded Controller * * Copyright 2018 Google LLC */ #ifndef WILCO_EC_H #define WILCO_EC_H #include <linux/mutex.h> #include <linux/types.h> /* Message flags for using the mailbox() interface */ #define WILCO_EC_FLAG_NO_RESPONSE BIT(0) /* EC does not respond */ /* Normal commands have a maximum 32 bytes of data */ #define EC_MAILBOX_DATA_SIZE 32 struct device; struct resource; struct platform_device; /** * struct wilco_ec_device - Wilco Embedded Controller handle. * @dev: Device handle. * @mailbox_lock: Mutex to ensure one mailbox command at a time. * @io_command: I/O port for mailbox command. Provided by ACPI. * @io_data: I/O port for mailbox data. Provided by ACPI. * @io_packet: I/O port for mailbox packet data. Provided by ACPI. * @data_buffer: Buffer used for EC communication. The same buffer * is used to hold the request and the response. * @data_size: Size of the data buffer used for EC communication. * @debugfs_pdev: The child platform_device used by the debugfs sub-driver. * @rtc_pdev: The child platform_device used by the RTC sub-driver. * @charger_pdev: Child platform_device used by the charger config sub-driver. * @telem_pdev: The child platform_device used by the telemetry sub-driver. */ struct wilco_ec_device { struct device *dev; struct mutex mailbox_lock; struct resource *io_command; struct resource *io_data; struct resource *io_packet; void *data_buffer; size_t data_size; struct platform_device *debugfs_pdev; struct platform_device *rtc_pdev; struct platform_device *charger_pdev; struct platform_device *telem_pdev; }; /** * struct wilco_ec_request - Mailbox request message format. * @struct_version: Should be %EC_MAILBOX_PROTO_VERSION * @checksum: Sum of all bytes must be 0. * @mailbox_id: Mailbox identifier, specifies the command set. * @mailbox_version: Mailbox interface version %EC_MAILBOX_VERSION * @reserved: Set to zero. * @data_size: Length of following data. */ struct wilco_ec_request { u8 struct_version; u8 checksum; u16 mailbox_id; u8 mailbox_version; u8 reserved; u16 data_size; } __packed; /** * struct wilco_ec_response - Mailbox response message format. * @struct_version: Should be %EC_MAILBOX_PROTO_VERSION * @checksum: Sum of all bytes must be 0. * @result: Result code from the EC. Non-zero indicates an error. * @data_size: Length of the response data buffer. * @reserved: Set to zero. * @data: Response data buffer. Max size is %EC_MAILBOX_DATA_SIZE_EXTENDED. */ struct wilco_ec_response { u8 struct_version; u8 checksum; u16 result; u16 data_size; u8 reserved[2]; u8 data[]; } __packed; /** * enum wilco_ec_msg_type - Message type to select a set of command codes. * @WILCO_EC_MSG_LEGACY: Legacy EC messages for standard EC behavior. * @WILCO_EC_MSG_PROPERTY: Get/Set/Sync EC controlled NVRAM property. * @WILCO_EC_MSG_TELEMETRY: Request telemetry data from the EC. */ enum wilco_ec_msg_type { WILCO_EC_MSG_LEGACY = 0x00f0, WILCO_EC_MSG_PROPERTY = 0x00f2, WILCO_EC_MSG_TELEMETRY = 0x00f5, }; /** * struct wilco_ec_message - Request and response message. * @type: Mailbox message type. * @flags: Message flags, e.g. %WILCO_EC_FLAG_NO_RESPONSE. * @request_size: Number of bytes to send to the EC. * @request_data: Buffer containing the request data. * @response_size: Number of bytes to read from EC. * @response_data: Buffer containing the response data, should be * response_size bytes and allocated by caller. */ struct wilco_ec_message { enum wilco_ec_msg_type type; u8 flags; size_t request_size; void *request_data; size_t response_size; void *response_data; }; /** * wilco_ec_mailbox() - Send request to the EC and receive the response. * @ec: Wilco EC device. * @msg: Wilco EC message. * * Return: Number of bytes received or negative error code on failure. */ int wilco_ec_mailbox(struct wilco_ec_device *ec, struct wilco_ec_message *msg); /** * wilco_keyboard_leds_init() - Set up the keyboard backlight LEDs. * @ec: EC device to query. * * After this call, the keyboard backlight will be exposed through a an LED * device at /sys/class/leds. * * This may sleep because it uses wilco_ec_mailbox(). * * Return: 0 on success, negative error code on failure. */ int wilco_keyboard_leds_init(struct wilco_ec_device *ec); /* * A Property is typically a data item that is stored to NVRAM * by the EC. Each of these data items has an index associated * with it, known as the Property ID (PID). Properties may have * variable lengths, up to a max of WILCO_EC_PROPERTY_MAX_SIZE * bytes. Properties can be simple integers, or they may be more * complex binary data. */ #define WILCO_EC_PROPERTY_MAX_SIZE 4 /** * struct ec_property_set_msg - Message to get or set a property. * @property_id: Which property to get or set. * @length: Number of bytes of |data| that are used. * @data: Actual property data. */ struct wilco_ec_property_msg { u32 property_id; int length; u8 data[WILCO_EC_PROPERTY_MAX_SIZE]; }; /** * wilco_ec_get_property() - Retrieve a property from the EC. * @ec: Embedded Controller device. * @prop_msg: Message for request and response. * * The property_id field of |prop_msg| should be filled before calling this * function. The result will be stored in the data and length fields. * * Return: 0 on success, negative error code on failure. */ int wilco_ec_get_property(struct wilco_ec_device *ec, struct wilco_ec_property_msg *prop_msg); /** * wilco_ec_set_property() - Store a property on the EC. * @ec: Embedded Controller device. * @prop_msg: Message for request and response. * * The property_id, length, and data fields of |prop_msg| should be * filled before calling this function. * * Return: 0 on success, negative error code on failure. */ int wilco_ec_set_property(struct wilco_ec_device *ec, struct wilco_ec_property_msg *prop_msg); /** * wilco_ec_get_byte_property() - Retrieve a byte-size property from the EC. * @ec: Embedded Controller device. * @property_id: Which property to retrieve. * @val: The result value, will be filled by this function. * * Return: 0 on success, negative error code on failure. */ int wilco_ec_get_byte_property(struct wilco_ec_device *ec, u32 property_id, u8 *val); /** * wilco_ec_get_byte_property() - Store a byte-size property on the EC. * @ec: Embedded Controller device. * @property_id: Which property to store. * @val: Value to store. * * Return: 0 on success, negative error code on failure. */ int wilco_ec_set_byte_property(struct wilco_ec_device *ec, u32 property_id, u8 val); /** * wilco_ec_add_sysfs() - Create sysfs entries * @ec: Wilco EC device * * wilco_ec_remove_sysfs() needs to be called afterwards * to perform the necessary cleanup. * * Return: 0 on success or negative error code on failure. */ int wilco_ec_add_sysfs(struct wilco_ec_device *ec); void wilco_ec_remove_sysfs(struct wilco_ec_device *ec); #endif /* WILCO_EC_H */ PK ! ���c) ) platform_data/mmc-pxamci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef ASMARM_ARCH_MMC_H #define ASMARM_ARCH_MMC_H #include <linux/mmc/host.h> #include <linux/interrupt.h> struct device; struct mmc_host; struct pxamci_platform_data { unsigned int ocr_mask; /* available voltages */ unsigned long detect_delay_ms; /* delay in millisecond before detecting cards after interrupt */ int (*init)(struct device *, irq_handler_t , void *); int (*get_ro)(struct device *); int (*setpower)(struct device *, unsigned int); void (*exit)(struct device *, void *); bool gpio_card_ro_invert; /* gpio ro is inverted */ }; extern void pxa_set_mci_info(struct pxamci_platform_data *info); extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info); extern void pxa3xx_set_mci3_info(struct pxamci_platform_data *info); #endif PK ! �1d�p p platform_data/adp8860.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Definitions and platform data for Analog Devices * Backlight drivers ADP8860 * * Copyright 2009-2010 Analog Devices Inc. */ #ifndef __LINUX_I2C_ADP8860_H #define __LINUX_I2C_ADP8860_H #include <linux/leds.h> #include <linux/types.h> #define ID_ADP8860 8860 #define ADP8860_MAX_BRIGHTNESS 0x7F #define FLAG_OFFT_SHIFT 8 /* * LEDs subdevice platform data */ #define ADP8860_LED_DIS_BLINK (0 << FLAG_OFFT_SHIFT) #define ADP8860_LED_OFFT_600ms (1 << FLAG_OFFT_SHIFT) #define ADP8860_LED_OFFT_1200ms (2 << FLAG_OFFT_SHIFT) #define ADP8860_LED_OFFT_1800ms (3 << FLAG_OFFT_SHIFT) #define ADP8860_LED_ONT_200ms 0 #define ADP8860_LED_ONT_600ms 1 #define ADP8860_LED_ONT_800ms 2 #define ADP8860_LED_ONT_1200ms 3 #define ADP8860_LED_D7 (7) #define ADP8860_LED_D6 (6) #define ADP8860_LED_D5 (5) #define ADP8860_LED_D4 (4) #define ADP8860_LED_D3 (3) #define ADP8860_LED_D2 (2) #define ADP8860_LED_D1 (1) /* * Backlight subdevice platform data */ #define ADP8860_BL_D7 (1 << 6) #define ADP8860_BL_D6 (1 << 5) #define ADP8860_BL_D5 (1 << 4) #define ADP8860_BL_D4 (1 << 3) #define ADP8860_BL_D3 (1 << 2) #define ADP8860_BL_D2 (1 << 1) #define ADP8860_BL_D1 (1 << 0) #define ADP8860_FADE_T_DIS 0 /* Fade Timer Disabled */ #define ADP8860_FADE_T_300ms 1 /* 0.3 Sec */ #define ADP8860_FADE_T_600ms 2 #define ADP8860_FADE_T_900ms 3 #define ADP8860_FADE_T_1200ms 4 #define ADP8860_FADE_T_1500ms 5 #define ADP8860_FADE_T_1800ms 6 #define ADP8860_FADE_T_2100ms 7 #define ADP8860_FADE_T_2400ms 8 #define ADP8860_FADE_T_2700ms 9 #define ADP8860_FADE_T_3000ms 10 #define ADP8860_FADE_T_3500ms 11 #define ADP8860_FADE_T_4000ms 12 #define ADP8860_FADE_T_4500ms 13 #define ADP8860_FADE_T_5000ms 14 #define ADP8860_FADE_T_5500ms 15 /* 5.5 Sec */ #define ADP8860_FADE_LAW_LINEAR 0 #define ADP8860_FADE_LAW_SQUARE 1 #define ADP8860_FADE_LAW_CUBIC1 2 #define ADP8860_FADE_LAW_CUBIC2 3 #define ADP8860_BL_AMBL_FILT_80ms 0 /* Light sensor filter time */ #define ADP8860_BL_AMBL_FILT_160ms 1 #define ADP8860_BL_AMBL_FILT_320ms 2 #define ADP8860_BL_AMBL_FILT_640ms 3 #define ADP8860_BL_AMBL_FILT_1280ms 4 #define ADP8860_BL_AMBL_FILT_2560ms 5 #define ADP8860_BL_AMBL_FILT_5120ms 6 #define ADP8860_BL_AMBL_FILT_10240ms 7 /* 10.24 sec */ /* * Blacklight current 0..30mA */ #define ADP8860_BL_CUR_mA(I) ((I * 127) / 30) /* * L2 comparator current 0..1106uA */ #define ADP8860_L2_COMP_CURR_uA(I) ((I * 255) / 1106) /* * L3 comparator current 0..138uA */ #define ADP8860_L3_COMP_CURR_uA(I) ((I * 255) / 138) struct adp8860_backlight_platform_data { u8 bl_led_assign; /* 1 = Backlight 0 = Individual LED */ u8 bl_fade_in; /* Backlight Fade-In Timer */ u8 bl_fade_out; /* Backlight Fade-Out Timer */ u8 bl_fade_law; /* fade-on/fade-off transfer characteristic */ u8 en_ambl_sens; /* 1 = enable ambient light sensor */ u8 abml_filt; /* Light sensor filter time */ u8 l1_daylight_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l1_daylight_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l2_office_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l2_office_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l3_dark_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l3_dark_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l2_trip; /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */ u8 l2_hyst; /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */ u8 l3_trip; /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */ u8 l3_hyst; /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */ /** * Independent Current Sinks / LEDS * Sinks not assigned to the Backlight can be exposed to * user space using the LEDS CLASS interface */ int num_leds; struct led_info *leds; u8 led_fade_in; /* LED Fade-In Timer */ u8 led_fade_out; /* LED Fade-Out Timer */ u8 led_fade_law; /* fade-on/fade-off transfer characteristic */ u8 led_on_time; /** * Gain down disable. Setting this option does not allow the * charge pump to switch to lower gains. NOT AVAILABLE on ADP8860 * 1 = the charge pump doesn't switch down in gain until all LEDs are 0. * The charge pump switches up in gain as needed. This feature is * useful if the ADP8863 charge pump is used to drive an external load. * This feature must be used when utilizing small fly capacitors * (0402 or smaller). * 0 = the charge pump automatically switches up and down in gain. * This provides optimal efficiency, but is not suitable for driving * loads that are not connected through the ADP8863 diode drivers. * Additionally, the charge pump fly capacitors should be low ESR * and sized 0603 or greater. */ u8 gdwn_dis; }; #endif /* __LINUX_I2C_ADP8860_H */ PK ! h�p&T T platform_data/apds990x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * This file is part of the APDS990x sensor driver. * Chip is combined proximity and ambient light sensor. * * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies). * * Contact: Samu Onkalo <samu.p.onkalo@nokia.com> */ #ifndef __APDS990X_H__ #define __APDS990X_H__ #define APDS_IRLED_CURR_12mA 0x3 #define APDS_IRLED_CURR_25mA 0x2 #define APDS_IRLED_CURR_50mA 0x1 #define APDS_IRLED_CURR_100mA 0x0 /** * struct apds990x_chip_factors - defines effect of the cover window * @ga: Total glass attenuation * @cf1: clear channel factor 1 for raw to lux conversion * @irf1: IR channel factor 1 for raw to lux conversion * @cf2: clear channel factor 2 for raw to lux conversion * @irf2: IR channel factor 2 for raw to lux conversion * @df: device factor for conversion formulas * * Structure for tuning ALS calculation to match with environment. * Values depend on the material above the sensor and the sensor * itself. If the GA is zero, driver will use uncovered sensor default values * format: decimal value * APDS_PARAM_SCALE except df which is plain integer. */ #define APDS_PARAM_SCALE 4096 struct apds990x_chip_factors { int ga; int cf1; int irf1; int cf2; int irf2; int df; }; /** * struct apds990x_platform_data - platform data for apsd990x.c driver * @cf: chip factor data * @pddrive: IR-led driving current * @ppcount: number of IR pulses used for proximity estimation * @setup_resources: interrupt line setup call back function * @release_resources: interrupt line release call back function * * Proximity detection result depends heavily on correct ppcount, pdrive * and cover window. * */ struct apds990x_platform_data { struct apds990x_chip_factors cf; u8 pdrive; u8 ppcount; int (*setup_resources)(void); int (*release_resources)(void); }; #endif PK ! A�b platform_data/tda9950.hnu �[��� #ifndef LINUX_PLATFORM_DATA_TDA9950_H #define LINUX_PLATFORM_DATA_TDA9950_H struct device; struct tda9950_glue { struct device *parent; unsigned long irq_flags; void *data; int (*init)(void *); void (*exit)(void *); int (*open)(void *); void (*release)(void *); }; #endif PK ! F� � platform_data/ds620.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DS620_H #define _LINUX_DS620_H #include <linux/types.h> #include <linux/i2c.h> /* platform data for the DS620 temperature sensor and thermostat */ struct ds620_platform_data { /* * Thermostat output pin PO mode: * 0 = always low (default) * 1 = PO_LOW * 2 = PO_HIGH * * (see Documentation/hwmon/ds620.rst) */ int pomode; }; #endif /* _LINUX_DS620_H */ PK ! E��� platform_data/ad7791.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PLATFORM_DATA_AD7791__ #define __LINUX_PLATFORM_DATA_AD7791__ /** * struct ad7791_platform_data - AD7791 device platform data * @buffered: If set to true configure the device for buffered input mode. * @burnout_current: If set to true the 100mA burnout current is enabled. * @unipolar: If set to true sample in unipolar mode, if set to false sample in * bipolar mode. */ struct ad7791_platform_data { bool buffered; bool burnout_current; bool unipolar; }; #endif PK ! ��� � platform_data/ssm2518.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * SSM2518 amplifier audio driver * * Copyright 2013 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __LINUX_PLATFORM_DATA_SSM2518_H__ #define __LINUX_PLATFORM_DATA_SSM2518_H__ /** * struct ssm2518_platform_data - Platform data for the ssm2518 driver * @enable_gpio: GPIO connected to the nSD pin. Set to -1 if the nSD pin is * hardwired. */ struct ssm2518_platform_data { int enable_gpio; }; #endif PK ! DMԓ� � platform_data/usb3503.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __USB3503_H__ #define __USB3503_H__ #define USB3503_I2C_NAME "usb3503" #define USB3503_OFF_PORT1 (1 << 1) #define USB3503_OFF_PORT2 (1 << 2) #define USB3503_OFF_PORT3 (1 << 3) enum usb3503_mode { USB3503_MODE_UNKNOWN, USB3503_MODE_HUB, USB3503_MODE_STANDBY, }; struct usb3503_platform_data { enum usb3503_mode initial_mode; u8 port_off_mask; }; #endif PK ! �'�;� � platform_data/mmc-sdhci-s3c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLATFORM_DATA_SDHCI_S3C_H #define __PLATFORM_DATA_SDHCI_S3C_H struct platform_device; enum cd_types { S3C_SDHCI_CD_INTERNAL, /* use mmc internal CD line */ S3C_SDHCI_CD_EXTERNAL, /* use external callback */ S3C_SDHCI_CD_GPIO, /* use external gpio pin for CD line */ S3C_SDHCI_CD_NONE, /* no CD line, use polling to detect card */ S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */ }; /** * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI * @max_width: The maximum number of data bits supported. * @host_caps: Standard MMC host capabilities bit field. * @host_caps2: The second standard MMC host capabilities bit field. * @cd_type: Type of Card Detection method (see cd_types enum above) * @ext_cd_init: Initialize external card detect subsystem. Called on * sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL. * notify_func argument is a callback to the sdhci-s3c driver * that triggers the card detection event. Callback arguments: * dev is pointer to platform device of the host controller, * state is new state of the card (0 - removed, 1 - inserted). * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on * sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL. * notify_func argument is the same callback as for ext_cd_init. * @ext_cd_gpio: gpio pin used for external CD line, valid only if * cd_type == S3C_SDHCI_CD_GPIO * @ext_cd_gpio_invert: invert values for external CD gpio line * @cfg_gpio: Configure the GPIO for a specific card bit-width * * Initialisation data specific to either the machine or the platform * for the device driver to use or call-back when configuring gpio or * card speed information. */ struct s3c_sdhci_platdata { unsigned int max_width; unsigned int host_caps; unsigned int host_caps2; unsigned int pm_caps; enum cd_types cd_type; int ext_cd_gpio; bool ext_cd_gpio_invert; int (*ext_cd_init)(void (*notify_func)(struct platform_device *, int state)); int (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *, int state)); void (*cfg_gpio)(struct platform_device *dev, int width); }; #endif /* __PLATFORM_DATA_SDHCI_S3C_H */ PK ! �� �� � platform_data/dmtimer-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * DMTIMER platform data for TI OMAP platforms * * Copyright (C) 2012 Texas Instruments * Author: Jon Hunter <jon-hunter@ti.com> */ #ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__ #define __PLATFORM_DATA_DMTIMER_OMAP_H__ struct omap_dm_timer_ops { struct omap_dm_timer *(*request_by_node)(struct device_node *np); struct omap_dm_timer *(*request_specific)(int timer_id); struct omap_dm_timer *(*request)(void); int (*free)(struct omap_dm_timer *timer); void (*enable)(struct omap_dm_timer *timer); void (*disable)(struct omap_dm_timer *timer); int (*get_irq)(struct omap_dm_timer *timer); int (*set_int_enable)(struct omap_dm_timer *timer, unsigned int value); int (*set_int_disable)(struct omap_dm_timer *timer, u32 mask); struct clk *(*get_fclk)(struct omap_dm_timer *timer); int (*start)(struct omap_dm_timer *timer); int (*stop)(struct omap_dm_timer *timer); int (*set_source)(struct omap_dm_timer *timer, int source); int (*set_load)(struct omap_dm_timer *timer, unsigned int value); int (*set_match)(struct omap_dm_timer *timer, int enable, unsigned int match); int (*set_pwm)(struct omap_dm_timer *timer, int def_on, int toggle, int trigger, int autoreload); int (*get_pwm_status)(struct omap_dm_timer *timer); int (*set_prescaler)(struct omap_dm_timer *timer, int prescaler); unsigned int (*read_counter)(struct omap_dm_timer *timer); int (*write_counter)(struct omap_dm_timer *timer, unsigned int value); unsigned int (*read_status)(struct omap_dm_timer *timer); int (*write_status)(struct omap_dm_timer *timer, unsigned int value); }; struct dmtimer_platform_data { /* set_timer_src - Only used for OMAP1 devices */ int (*set_timer_src)(struct platform_device *pdev, int source); u32 timer_capability; u32 timer_errata; int (*get_context_loss_count)(struct device *); const struct omap_dm_timer_ops *timer_ops; }; #endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */ PK ! ���Z� � platform_data/eth-ep93xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PLATFORM_DATA_ETH_EP93XX #define _LINUX_PLATFORM_DATA_ETH_EP93XX struct ep93xx_eth_data { unsigned char dev_addr[6]; unsigned char phy_id; }; #endif PK ! ���g3 3 platform_data/adp5588.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Analog Devices ADP5588 I/O Expander and QWERTY Keypad Controller * * Copyright 2009-2010 Analog Devices Inc. */ #ifndef _ADP5588_H #define _ADP5588_H #define DEV_ID 0x00 /* Device ID */ #define CFG 0x01 /* Configuration Register1 */ #define INT_STAT 0x02 /* Interrupt Status Register */ #define KEY_LCK_EC_STAT 0x03 /* Key Lock and Event Counter Register */ #define Key_EVENTA 0x04 /* Key Event Register A */ #define Key_EVENTB 0x05 /* Key Event Register B */ #define Key_EVENTC 0x06 /* Key Event Register C */ #define Key_EVENTD 0x07 /* Key Event Register D */ #define Key_EVENTE 0x08 /* Key Event Register E */ #define Key_EVENTF 0x09 /* Key Event Register F */ #define Key_EVENTG 0x0A /* Key Event Register G */ #define Key_EVENTH 0x0B /* Key Event Register H */ #define Key_EVENTI 0x0C /* Key Event Register I */ #define Key_EVENTJ 0x0D /* Key Event Register J */ #define KP_LCK_TMR 0x0E /* Keypad Lock1 to Lock2 Timer */ #define UNLOCK1 0x0F /* Unlock Key1 */ #define UNLOCK2 0x10 /* Unlock Key2 */ #define GPIO_INT_STAT1 0x11 /* GPIO Interrupt Status */ #define GPIO_INT_STAT2 0x12 /* GPIO Interrupt Status */ #define GPIO_INT_STAT3 0x13 /* GPIO Interrupt Status */ #define GPIO_DAT_STAT1 0x14 /* GPIO Data Status, Read twice to clear */ #define GPIO_DAT_STAT2 0x15 /* GPIO Data Status, Read twice to clear */ #define GPIO_DAT_STAT3 0x16 /* GPIO Data Status, Read twice to clear */ #define GPIO_DAT_OUT1 0x17 /* GPIO DATA OUT */ #define GPIO_DAT_OUT2 0x18 /* GPIO DATA OUT */ #define GPIO_DAT_OUT3 0x19 /* GPIO DATA OUT */ #define GPIO_INT_EN1 0x1A /* GPIO Interrupt Enable */ #define GPIO_INT_EN2 0x1B /* GPIO Interrupt Enable */ #define GPIO_INT_EN3 0x1C /* GPIO Interrupt Enable */ #define KP_GPIO1 0x1D /* Keypad or GPIO Selection */ #define KP_GPIO2 0x1E /* Keypad or GPIO Selection */ #define KP_GPIO3 0x1F /* Keypad or GPIO Selection */ #define GPI_EM1 0x20 /* GPI Event Mode 1 */ #define GPI_EM2 0x21 /* GPI Event Mode 2 */ #define GPI_EM3 0x22 /* GPI Event Mode 3 */ #define GPIO_DIR1 0x23 /* GPIO Data Direction */ #define GPIO_DIR2 0x24 /* GPIO Data Direction */ #define GPIO_DIR3 0x25 /* GPIO Data Direction */ #define GPIO_INT_LVL1 0x26 /* GPIO Edge/Level Detect */ #define GPIO_INT_LVL2 0x27 /* GPIO Edge/Level Detect */ #define GPIO_INT_LVL3 0x28 /* GPIO Edge/Level Detect */ #define Debounce_DIS1 0x29 /* Debounce Disable */ #define Debounce_DIS2 0x2A /* Debounce Disable */ #define Debounce_DIS3 0x2B /* Debounce Disable */ #define GPIO_PULL1 0x2C /* GPIO Pull Disable */ #define GPIO_PULL2 0x2D /* GPIO Pull Disable */ #define GPIO_PULL3 0x2E /* GPIO Pull Disable */ #define CMP_CFG_STAT 0x30 /* Comparator Configuration and Status Register */ #define CMP_CONFG_SENS1 0x31 /* Sensor1 Comparator Configuration Register */ #define CMP_CONFG_SENS2 0x32 /* L2 Light Sensor Reference Level, Output Falling for Sensor 1 */ #define CMP1_LVL2_TRIP 0x33 /* L2 Light Sensor Hysteresis (Active when Output Rising) for Sensor 1 */ #define CMP1_LVL2_HYS 0x34 /* L3 Light Sensor Reference Level, Output Falling For Sensor 1 */ #define CMP1_LVL3_TRIP 0x35 /* L3 Light Sensor Hysteresis (Active when Output Rising) For Sensor 1 */ #define CMP1_LVL3_HYS 0x36 /* Sensor 2 Comparator Configuration Register */ #define CMP2_LVL2_TRIP 0x37 /* L2 Light Sensor Reference Level, Output Falling for Sensor 2 */ #define CMP2_LVL2_HYS 0x38 /* L2 Light Sensor Hysteresis (Active when Output Rising) for Sensor 2 */ #define CMP2_LVL3_TRIP 0x39 /* L3 Light Sensor Reference Level, Output Falling For Sensor 2 */ #define CMP2_LVL3_HYS 0x3A /* L3 Light Sensor Hysteresis (Active when Output Rising) For Sensor 2 */ #define CMP1_ADC_DAT_R1 0x3B /* Comparator 1 ADC data Register1 */ #define CMP1_ADC_DAT_R2 0x3C /* Comparator 1 ADC data Register2 */ #define CMP2_ADC_DAT_R1 0x3D /* Comparator 2 ADC data Register1 */ #define CMP2_ADC_DAT_R2 0x3E /* Comparator 2 ADC data Register2 */ #define ADP5588_DEVICE_ID_MASK 0xF /* Configuration Register1 */ #define ADP5588_AUTO_INC (1 << 7) #define ADP5588_GPIEM_CFG (1 << 6) #define ADP5588_OVR_FLOW_M (1 << 5) #define ADP5588_INT_CFG (1 << 4) #define ADP5588_OVR_FLOW_IEN (1 << 3) #define ADP5588_K_LCK_IM (1 << 2) #define ADP5588_GPI_IEN (1 << 1) #define ADP5588_KE_IEN (1 << 0) /* Interrupt Status Register */ #define ADP5588_CMP2_INT (1 << 5) #define ADP5588_CMP1_INT (1 << 4) #define ADP5588_OVR_FLOW_INT (1 << 3) #define ADP5588_K_LCK_INT (1 << 2) #define ADP5588_GPI_INT (1 << 1) #define ADP5588_KE_INT (1 << 0) /* Key Lock and Event Counter Register */ #define ADP5588_K_LCK_EN (1 << 6) #define ADP5588_LCK21 0x30 #define ADP5588_KEC 0xF #define ADP5588_MAXGPIO 18 #define ADP5588_BANK(offs) ((offs) >> 3) #define ADP5588_BIT(offs) (1u << ((offs) & 0x7)) /* Put one of these structures in i2c_board_info platform_data */ #define ADP5588_KEYMAPSIZE 80 #define GPI_PIN_ROW0 97 #define GPI_PIN_ROW1 98 #define GPI_PIN_ROW2 99 #define GPI_PIN_ROW3 100 #define GPI_PIN_ROW4 101 #define GPI_PIN_ROW5 102 #define GPI_PIN_ROW6 103 #define GPI_PIN_ROW7 104 #define GPI_PIN_COL0 105 #define GPI_PIN_COL1 106 #define GPI_PIN_COL2 107 #define GPI_PIN_COL3 108 #define GPI_PIN_COL4 109 #define GPI_PIN_COL5 110 #define GPI_PIN_COL6 111 #define GPI_PIN_COL7 112 #define GPI_PIN_COL8 113 #define GPI_PIN_COL9 114 #define GPI_PIN_ROW_BASE GPI_PIN_ROW0 #define GPI_PIN_ROW_END GPI_PIN_ROW7 #define GPI_PIN_COL_BASE GPI_PIN_COL0 #define GPI_PIN_COL_END GPI_PIN_COL9 #define GPI_PIN_BASE GPI_PIN_ROW_BASE #define GPI_PIN_END GPI_PIN_COL_END #define ADP5588_GPIMAPSIZE_MAX (GPI_PIN_END - GPI_PIN_BASE + 1) struct adp5588_gpi_map { unsigned short pin; unsigned short sw_evt; }; struct adp5588_kpad_platform_data { int rows; /* Number of rows */ int cols; /* Number of columns */ const unsigned short *keymap; /* Pointer to keymap */ unsigned short keymapsize; /* Keymap size */ unsigned repeat:1; /* Enable key repeat */ unsigned en_keylock:1; /* Enable Key Lock feature */ unsigned short unlock_key1; /* Unlock Key 1 */ unsigned short unlock_key2; /* Unlock Key 2 */ const struct adp5588_gpi_map *gpimap; unsigned short gpimapsize; const struct adp5588_gpio_platform_data *gpio_data; }; struct i2c_client; /* forward declaration */ struct adp5588_gpio_platform_data { int gpio_start; /* GPIO Chip base # */ const char *const *names; unsigned irq_base; /* interrupt base # */ unsigned pullup_dis_mask; /* Pull-Up Disable Mask */ int (*setup)(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *context); int (*teardown)(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *context); void *context; }; #endif PK ! ث�& & platform_data/txx9/ndfmc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * * (C) Copyright TOSHIBA CORPORATION 2007 */ #ifndef __TXX9_NDFMC_H #define __TXX9_NDFMC_H #define NDFMC_PLAT_FLAG_USE_BSPRT 0x01 #define NDFMC_PLAT_FLAG_NO_RSTR 0x02 #define NDFMC_PLAT_FLAG_HOLDADD 0x04 #define NDFMC_PLAT_FLAG_DUMMYWRITE 0x08 struct txx9ndfmc_platform_data { unsigned int shift; unsigned int gbus_clock; unsigned int hold; /* hold time in nanosecond */ unsigned int spw; /* strobe pulse width in nanosecond */ unsigned int flags; unsigned char ch_mask; /* available channel bitmask */ unsigned char wp_mask; /* write-protect bitmask */ unsigned char wide_mask; /* 16bit-nand bitmask */ }; void txx9_ndfmc_init(unsigned long baseaddr, const struct txx9ndfmc_platform_data *plat_data); #endif /* __TXX9_NDFMC_H */ PK ! 妔� platform_data/video-imxfb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This structure describes the machine which we are running on. */ #ifndef __MACH_IMXFB_H__ #define __MACH_IMXFB_H__ #include <linux/fb.h> #define PCR_TFT (1 << 31) #define PCR_COLOR (1 << 30) #define PCR_PBSIZ_1 (0 << 28) #define PCR_PBSIZ_2 (1 << 28) #define PCR_PBSIZ_4 (2 << 28) #define PCR_PBSIZ_8 (3 << 28) #define PCR_BPIX_1 (0 << 25) #define PCR_BPIX_2 (1 << 25) #define PCR_BPIX_4 (2 << 25) #define PCR_BPIX_8 (3 << 25) #define PCR_BPIX_12 (4 << 25) #define PCR_BPIX_16 (5 << 25) #define PCR_BPIX_18 (6 << 25) #define PCR_PIXPOL (1 << 24) #define PCR_FLMPOL (1 << 23) #define PCR_LPPOL (1 << 22) #define PCR_CLKPOL (1 << 21) #define PCR_OEPOL (1 << 20) #define PCR_SCLKIDLE (1 << 19) #define PCR_END_SEL (1 << 18) #define PCR_END_BYTE_SWAP (1 << 17) #define PCR_REV_VS (1 << 16) #define PCR_ACD_SEL (1 << 15) #define PCR_ACD(x) (((x) & 0x7f) << 8) #define PCR_SCLK_SEL (1 << 7) #define PCR_SHARP (1 << 6) #define PCR_PCD(x) ((x) & 0x3f) #define PWMR_CLS(x) (((x) & 0x1ff) << 16) #define PWMR_LDMSK (1 << 15) #define PWMR_SCR1 (1 << 10) #define PWMR_SCR0 (1 << 9) #define PWMR_CC_EN (1 << 8) #define PWMR_PW(x) ((x) & 0xff) #define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) #define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) #define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) #define LSCR1_GRAY2(x) (((x) & 0xf) << 4) #define LSCR1_GRAY1(x) (((x) & 0xf)) struct imx_fb_videomode { struct fb_videomode mode; u32 pcr; bool aus_mode; unsigned char bpp; }; struct imx_fb_platform_data { struct imx_fb_videomode *mode; int num_modes; u_int pwmr; u_int lscr1; u_int dmacr; int (*init)(struct platform_device *); void (*exit)(struct platform_device *); }; #endif /* ifndef __MACH_IMXFB_H__ */ PK ! �݈�� � platform_data/mtd-davinci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * mach-davinci/nand.h * * Copyright © 2006 Texas Instruments. * * Ported to 2.6.23 Copyright © 2008 by * Sander Huijsen <Shuijsen@optelecom-nkf.com> * Troy Kisky <troy.kisky@boundarydevices.com> * Dirk Behme <Dirk.Behme@gmail.com> * * -------------------------------------------------------------------------- */ #ifndef __ARCH_ARM_DAVINCI_NAND_H #define __ARCH_ARM_DAVINCI_NAND_H #include <linux/mtd/rawnand.h> #define NANDFCR_OFFSET 0x60 #define NANDFSR_OFFSET 0x64 #define NANDF1ECC_OFFSET 0x70 /* 4-bit ECC syndrome registers */ #define NAND_4BIT_ECC_LOAD_OFFSET 0xbc #define NAND_4BIT_ECC1_OFFSET 0xc0 #define NAND_4BIT_ECC2_OFFSET 0xc4 #define NAND_4BIT_ECC3_OFFSET 0xc8 #define NAND_4BIT_ECC4_OFFSET 0xcc #define NAND_ERR_ADD1_OFFSET 0xd0 #define NAND_ERR_ADD2_OFFSET 0xd4 #define NAND_ERR_ERRVAL1_OFFSET 0xd8 #define NAND_ERR_ERRVAL2_OFFSET 0xdc /* NOTE: boards don't need to use these address bits * for ALE/CLE unless they support booting from NAND. * They're used unless platform data overrides them. */ #define MASK_ALE 0x08 #define MASK_CLE 0x10 struct davinci_nand_pdata { /* platform_data */ uint32_t mask_ale; uint32_t mask_cle; /* * 0-indexed chip-select number of the asynchronous * interface to which the NAND device has been connected. * * So, if you have NAND connected to CS3 of DA850, you * will pass '1' here. Since the asynchronous interface * on DA850 starts from CS2. */ uint32_t core_chipsel; /* for packages using two chipselects */ uint32_t mask_chipsel; /* board's default static partition info */ struct mtd_partition *parts; unsigned nr_parts; /* none == NAND_ECC_ENGINE_TYPE_NONE (strongly *not* advised!!) * soft == NAND_ECC_ENGINE_TYPE_SOFT * else == NAND_ECC_ENGINE_TYPE_ON_HOST, according to ecc_bits * * All DaVinci-family chips support 1-bit hardware ECC. * Newer ones also support 4-bit ECC, but are awkward * using it with large page chips. */ enum nand_ecc_engine_type engine_type; enum nand_ecc_placement ecc_placement; u8 ecc_bits; /* e.g. NAND_BUSWIDTH_16 */ unsigned options; /* e.g. NAND_BBT_USE_FLASH */ unsigned bbt_options; /* Main and mirror bbt descriptor overrides */ struct nand_bbt_descr *bbt_td; struct nand_bbt_descr *bbt_md; /* Access timings */ struct davinci_aemif_timing *timing; }; #endif /* __ARCH_ARM_DAVINCI_NAND_H */ PK ! � L�{ { platform_data/dma-mcf-edma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Freescale eDMA platform data, ColdFire SoC's family. * * Copyright (c) 2017 Angelo Dureghello <angelo@sysam.it> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __LINUX_PLATFORM_DATA_MCF_EDMA_H__ #define __LINUX_PLATFORM_DATA_MCF_EDMA_H__ struct dma_slave_map; bool mcf_edma_filter_fn(struct dma_chan *chan, void *param); #define MCF_EDMA_FILTER_PARAM(ch) ((void *)ch) /** * struct mcf_edma_platform_data - platform specific data for eDMA engine * * @ver The eDMA module version. * @dma_channels The number of eDMA channels. */ struct mcf_edma_platform_data { int dma_channels; const struct dma_slave_map *slave_map; int slavecnt; }; #endif /* __LINUX_PLATFORM_DATA_MCF_EDMA_H__ */ PK ! ';`=� � platform_data/nfcmrvl.hnu �[��� /* * Copyright (C) 2015, Marvell International Ltd. * * This software file (the "File") is distributed by Marvell International * Ltd. under the terms of the GNU General Public License Version 2, June 1991 * (the "License"). You may use, redistribute and/or modify this File in * accordance with the terms and conditions of the License, a copy of which * is available on the worldwide web at * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. * * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE * ARE EXPRESSLY DISCLAIMED. The License provides additional details about * this warranty disclaimer. */ #ifndef _NFCMRVL_PTF_H_ #define _NFCMRVL_PTF_H_ struct nfcmrvl_platform_data { /* * Generic */ /* GPIO that is wired to RESET_N signal */ int reset_n_io; /* Tell if transport is muxed in HCI one */ unsigned int hci_muxed; /* * UART specific */ /* Tell if UART needs flow control at init */ unsigned int flow_control; /* Tell if firmware supports break control for power management */ unsigned int break_control; /* * I2C specific */ unsigned int irq; unsigned int irq_polarity; }; #endif /* _NFCMRVL_PTF_H_ */ PK ! ��r[� � platform_data/wiznet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Ethernet driver for the WIZnet W5x00 chip. */ #ifndef PLATFORM_DATA_WIZNET_H #define PLATFORM_DATA_WIZNET_H #include <linux/if_ether.h> struct wiznet_platform_data { int link_gpio; u8 mac_addr[ETH_ALEN]; }; #ifndef CONFIG_WIZNET_BUS_SHIFT #define CONFIG_WIZNET_BUS_SHIFT 0 #endif #define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT) #define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT) #endif /* PLATFORM_DATA_WIZNET_H */ PK ! �wL�U U platform_data/i2c-xiic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * i2c-xiic.h * Copyright (c) 2009 Intel Corporation */ /* Supports: * Xilinx IIC */ #ifndef _LINUX_I2C_XIIC_H #define _LINUX_I2C_XIIC_H /** * struct xiic_i2c_platform_data - Platform data of the Xilinx I2C driver * @num_devices: Number of devices that shall be added when the driver * is probed. * @devices: The actuall devices to add. * * This purpose of this platform data struct is to be able to provide a number * of devices that should be added to the I2C bus. The reason is that sometimes * the I2C board info is not enough, a new PCI board can for instance be * plugged into a standard PC, and the bus number might be unknown at * early init time. */ struct xiic_i2c_platform_data { u8 num_devices; struct i2c_board_info const *devices; }; #endif /* _LINUX_I2C_XIIC_H */ PK ! Y�8! ! platform_data/rtc-v3020.hnu �[��� /* * v3020.h - Registers definition and platform data structure for the v3020 RTC. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2006, 8D Technologies inc. */ #ifndef __LINUX_V3020_H #define __LINUX_V3020_H /* The v3020 has only one data pin but which one * is used depends on the board. */ struct v3020_platform_data { int leftshift; /* (1<<(leftshift)) & readl() */ unsigned int use_gpio:1; unsigned int gpio_cs; unsigned int gpio_wr; unsigned int gpio_rd; unsigned int gpio_io; }; #define V3020_STATUS_0 0x00 #define V3020_STATUS_1 0x01 #define V3020_SECONDS 0x02 #define V3020_MINUTES 0x03 #define V3020_HOURS 0x04 #define V3020_MONTH_DAY 0x05 #define V3020_MONTH 0x06 #define V3020_YEAR 0x07 #define V3020_WEEK_DAY 0x08 #define V3020_WEEK 0x09 #define V3020_IS_COMMAND(val) ((val)>=0x0E) #define V3020_CMD_RAM2CLOCK 0x0E #define V3020_CMD_CLOCK2RAM 0x0F #endif /* __LINUX_V3020_H */ PK ! +��<� � # platform_data/pcmcia-pxa2xx_viper.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ARCOM_PCMCIA_H #define __ARCOM_PCMCIA_H struct arcom_pcmcia_pdata { int cd_gpio; int rdy_gpio; int pwr_gpio; void (*reset)(int state); }; #endif PK ! �0�ZL L platform_data/dma-hsu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Driver for the High Speed UART DMA * * Copyright (C) 2015 Intel Corporation */ #ifndef _PLATFORM_DATA_DMA_HSU_H #define _PLATFORM_DATA_DMA_HSU_H #include <linux/device.h> struct hsu_dma_slave { struct device *dma_dev; int chan_id; }; #endif /* _PLATFORM_DATA_DMA_HSU_H */ PK ! ���3� � platform_data/gpio_backlight.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * gpio_backlight.h - Simple GPIO-controlled backlight */ #ifndef __GPIO_BACKLIGHT_H__ #define __GPIO_BACKLIGHT_H__ struct device; struct gpio_backlight_platform_data { struct device *fbdev; }; #endif PK ! �r� � platform_data/intel-mid_wdt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * intel-mid_wdt: generic Intel MID SCU watchdog driver * * Copyright (C) 2014 Intel Corporation. All rights reserved. * Contact: David Cohen <david.a.cohen@linux.intel.com> */ #ifndef __INTEL_MID_WDT_H__ #define __INTEL_MID_WDT_H__ #include <linux/platform_device.h> struct intel_mid_wdt_pdata { int irq; int (*probe)(struct platform_device *pdev); }; #endif /*__INTEL_MID_WDT_H__*/ PK ! �I�� platform_data/clk-s3c2410.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2020 Krzysztof Kozlowski <krzk@kernel.org> */ #ifndef __LINUX_PLATFORM_DATA_CLK_S3C2410_H_ #define __LINUX_PLATFORM_DATA_CLK_S3C2410_H_ /** * struct s3c2410_clk_platform_data - platform data for S3C2410 clock driver * * @modify_misccr: Function to modify the MISCCR and return the new value */ struct s3c2410_clk_platform_data { unsigned int (*modify_misccr)(unsigned int clr, unsigned int chg); }; #endif /* __LINUX_PLATFORM_DATA_CLK_S3C2410_H_ */ PK ! ���a a " platform_data/invensense_mpu6050.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012 Invensense, Inc. */ #ifndef __INV_MPU6050_PLATFORM_H_ #define __INV_MPU6050_PLATFORM_H_ /** * struct inv_mpu6050_platform_data - Platform data for the mpu driver * @orientation: Orientation matrix of the chip (deprecated in favor of * mounting matrix retrieved from device-tree) * * Contains platform specific information on how to configure the MPU6050 to * work on this platform. The orientation matrices are 3x3 rotation matrices * that are applied to the data to rotate from the mounting orientation to the * platform orientation. The values must be one of 0, 1, or -1 and each row and * column should have exactly 1 non-zero value. * * Deprecated in favor of mounting matrix retrieved from device-tree. */ struct inv_mpu6050_platform_data { __s8 orientation[9]; }; #endif PK ! ���* * platform_data/elm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * BCH Error Location Module * * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __ELM_H #define __ELM_H enum bch_ecc { BCH4_ECC = 0, BCH8_ECC, BCH16_ECC, }; /* ELM support 8 error syndrome process */ #define ERROR_VECTOR_MAX 8 /** * struct elm_errorvec - error vector for elm * @error_reported: set true for vectors error is reported * @error_uncorrectable: number of uncorrectable errors * @error_count: number of correctable errors in the sector * @error_loc: buffer for error location * */ struct elm_errorvec { bool error_reported; bool error_uncorrectable; int error_count; int error_loc[16]; }; #if IS_ENABLED(CONFIG_MTD_NAND_OMAP_BCH) void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc, struct elm_errorvec *err_vec); int elm_config(struct device *dev, enum bch_ecc bch_type, int ecc_steps, int ecc_step_size, int ecc_syndrome_size); #else static inline void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc, struct elm_errorvec *err_vec) { } static inline int elm_config(struct device *dev, enum bch_ecc bch_type, int ecc_steps, int ecc_step_size, int ecc_syndrome_size) { return -ENOSYS; } #endif /* CONFIG_MTD_NAND_OMAP_BCH */ #endif /* __ELM_H */ PK ! ��� � platform_data/st_sensors_pdata.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * STMicroelectronics sensors platform-data driver * * Copyright 2013 STMicroelectronics Inc. * * Denis Ciocca <denis.ciocca@st.com> */ #ifndef ST_SENSORS_PDATA_H #define ST_SENSORS_PDATA_H /** * struct st_sensors_platform_data - Platform data for the ST sensors * @drdy_int_pin: Redirect DRDY on pin 1 (1) or pin 2 (2). * Available only for accelerometer, magnetometer and pressure sensors. * Accelerometer DRDY on LSM330 available only on pin 1 (see datasheet). * Magnetometer DRDY is supported only on LSM9DS0. * @open_drain: set the interrupt line to be open drain if possible. * @spi_3wire: enable spi-3wire mode. * @pullups: enable/disable i2c controller pullup resistors. * @wakeup_source: enable/disable device as wakeup generator. */ struct st_sensors_platform_data { u8 drdy_int_pin; bool open_drain; bool spi_3wire; bool pullups; bool wakeup_source; }; #endif /* ST_SENSORS_PDATA_H */ PK ! �#� platform_data/media/s5p_hdmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Driver header for S5P HDMI chip. * * Copyright (c) 2011 Samsung Electronics, Co. Ltd * Contact: Tomasz Stanislawski <t.stanislaws@samsung.com> */ #ifndef S5P_HDMI_H #define S5P_HDMI_H struct i2c_board_info; /** * @hdmiphy_bus: controller id for HDMIPHY bus * @hdmiphy_info: template for HDMIPHY I2C device * @mhl_bus: controller id for MHL control bus * @mhl_info: template for MHL I2C device * @hpd_gpio: GPIO for Hot-Plug-Detect pin * * NULL pointer for *_info fields indicates that * the corresponding chip is not present */ struct s5p_hdmi_platform_data { int hdmiphy_bus; struct i2c_board_info *hdmiphy_info; int mhl_bus; struct i2c_board_info *mhl_info; int hpd_gpio; }; #endif /* S5P_HDMI_H */ PK ! ,eλ � platform_data/media/timb_video.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * timb_video.h Platform struct for the Timberdale video driver * Copyright (c) 2009-2010 Intel Corporation */ #ifndef _TIMB_VIDEO_ #define _TIMB_VIDEO_ 1 #include <linux/i2c.h> struct timb_video_platform_data { int dma_channel; int i2c_adapter; /* The I2C adapter where the encoder is attached */ struct { const char *module_name; struct i2c_board_info *info; } encoder; }; #endif PK ! * �e e platform_data/media/camera-pxa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* camera.h - PXA camera driver header file Copyright (C) 2003, Intel Corporation Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> */ #ifndef __ASM_ARCH_CAMERA_H_ #define __ASM_ARCH_CAMERA_H_ #define PXA_CAMERA_MASTER 1 #define PXA_CAMERA_DATAWIDTH_4 2 #define PXA_CAMERA_DATAWIDTH_5 4 #define PXA_CAMERA_DATAWIDTH_8 8 #define PXA_CAMERA_DATAWIDTH_9 0x10 #define PXA_CAMERA_DATAWIDTH_10 0x20 #define PXA_CAMERA_PCLK_EN 0x40 #define PXA_CAMERA_MCLK_EN 0x80 #define PXA_CAMERA_PCP 0x100 #define PXA_CAMERA_HSP 0x200 #define PXA_CAMERA_VSP 0x400 struct pxacamera_platform_data { unsigned long flags; unsigned long mclk_10khz; int sensor_i2c_adapter_id; int sensor_i2c_address; }; extern void pxa_set_camera_info(struct pxacamera_platform_data *); #endif /* __ASM_ARCH_CAMERA_H_ */ PK ! k�Np p platform_data/media/mmp-camera.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Information for the Marvell Armada MMP camera */ #include <media/v4l2-mediabus.h> enum dphy3_algo { DPHY3_ALGO_DEFAULT = 0, DPHY3_ALGO_PXA910, DPHY3_ALGO_PXA2128 }; struct mmp_camera_platform_data { enum v4l2_mbus_type bus_type; int mclk_src; /* which clock source the MCLK derives from */ int mclk_div; /* Clock Divider Value for MCLK */ /* * MIPI support */ int dphy[3]; /* DPHY: CSI2_DPHY3, CSI2_DPHY5, CSI2_DPHY6 */ enum dphy3_algo dphy3_algo; /* algos for calculate CSI2_DPHY3 */ int lane; /* ccic used lane number; 0 means DVP mode */ int lane_clk; }; PK ! ��V� � platform_data/media/si4713.hnu �[��� /* * include/linux/platform_data/media/si4713.h * * Board related data definitions for Si4713 i2c device driver. * * Copyright (c) 2009 Nokia Corporation * Contact: Eduardo Valentin <eduardo.valentin@nokia.com> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. * */ #ifndef SI4713_H #define SI4713_H /* The SI4713 I2C sensor chip has a fixed slave address of 0xc6 or 0x22. */ #define SI4713_I2C_ADDR_BUSEN_HIGH 0x63 #define SI4713_I2C_ADDR_BUSEN_LOW 0x11 /* * Platform dependent definition */ struct si4713_platform_data { bool is_platform_device; }; /* * Structure to query for Received Noise Level (RNL). */ struct si4713_rnl { __u32 index; /* modulator index */ __u32 frequency; /* frequency to perform rnl measurement */ __s32 rnl; /* result of measurement in dBuV */ __u32 reserved[4]; /* drivers and apps must init this to 0 */ }; /* * This is the ioctl number to query for rnl. Users must pass a * struct si4713_rnl pointer specifying desired frequency in 'frequency' field * following driver capabilities (i.e V4L2_TUNER_CAP_LOW). * Driver must return measured value in the same structure, filling 'rnl' field. */ #define SI4713_IOC_MEASURE_RNL _IOWR('V', BASE_VIDIOC_PRIVATE + 0, \ struct si4713_rnl) #endif /* ifndef SI4713_H*/ PK ! �~�� � platform_data/media/timb_radio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * timb_radio.h Platform struct for the Timberdale radio driver * Copyright (c) 2009 Intel Corporation */ #ifndef _TIMB_RADIO_ #define _TIMB_RADIO_ 1 #include <linux/i2c.h> struct timb_radio_platform_data { int i2c_adapter; /* I2C adapter where the tuner and dsp are attached */ struct i2c_board_info *tuner; struct i2c_board_info *dsp; }; #endif PK ! $d��� � platform_data/media/omap4iss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef ARCH_ARM_PLAT_OMAP4_ISS_H #define ARCH_ARM_PLAT_OMAP4_ISS_H #include <linux/i2c.h> struct iss_device; enum iss_interface_type { ISS_INTERFACE_CSI2A_PHY1, ISS_INTERFACE_CSI2B_PHY2, }; /** * struct iss_csiphy_lane: CSI2 lane position and polarity * @pos: position of the lane * @pol: polarity of the lane */ struct iss_csiphy_lane { u8 pos; u8 pol; }; #define ISS_CSIPHY1_NUM_DATA_LANES 4 #define ISS_CSIPHY2_NUM_DATA_LANES 1 /** * struct iss_csiphy_lanes_cfg - CSI2 lane configuration * @data: Configuration of one or two data lanes * @clk: Clock lane configuration */ struct iss_csiphy_lanes_cfg { struct iss_csiphy_lane data[ISS_CSIPHY1_NUM_DATA_LANES]; struct iss_csiphy_lane clk; }; /** * struct iss_csi2_platform_data - CSI2 interface platform data * @crc: Enable the cyclic redundancy check * @vpclk_div: Video port output clock control */ struct iss_csi2_platform_data { unsigned crc:1; unsigned vpclk_div:2; struct iss_csiphy_lanes_cfg lanecfg; }; struct iss_subdev_i2c_board_info { struct i2c_board_info *board_info; int i2c_adapter_id; }; struct iss_v4l2_subdevs_group { struct iss_subdev_i2c_board_info *subdevs; enum iss_interface_type interface; union { struct iss_csi2_platform_data csi2; } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */ }; struct iss_platform_data { struct iss_v4l2_subdevs_group *subdevs; void (*set_constraints)(struct iss_device *iss, bool enable); }; #endif PK ! �54 T T platform_data/ti-aemif.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * TI DaVinci AEMIF platform glue. * * Copyright (C) 2017 BayLibre SAS * * Author: * Bartosz Golaszewski <bgolaszewski@baylibre.com> */ #ifndef __TI_DAVINCI_AEMIF_DATA_H__ #define __TI_DAVINCI_AEMIF_DATA_H__ #include <linux/of_platform.h> /** * struct aemif_abus_data - Async bus configuration parameters. * * @cs - Chip-select number. */ struct aemif_abus_data { u32 cs; }; /** * struct aemif_platform_data - Data to set up the TI aemif driver. * * @dev_lookup: of_dev_auxdata passed to of_platform_populate() for aemif * subdevices. * @cs_offset: Lowest allowed chip-select number. * @abus_data: Array of async bus configuration entries. * @num_abus_data: Number of abus entries. * @sub_devices: Array of platform subdevices. * @num_sub_devices: Number of subdevices. */ struct aemif_platform_data { struct of_dev_auxdata *dev_lookup; u32 cs_offset; struct aemif_abus_data *abus_data; size_t num_abus_data; struct platform_device *sub_devices; size_t num_sub_devices; }; #endif /* __TI_DAVINCI_AEMIF_DATA_H__ */ PK ! �k��� � platform_data/usb-pxa3xx-ulpi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * PXA3xx U2D header * * Copyright (C) 2010 CompuLab Ltd. * * Igor Grinberg <grinberg@compulab.co.il> */ #ifndef __PXA310_U2D__ #define __PXA310_U2D__ #include <linux/usb/ulpi.h> struct pxa3xx_u2d_platform_data { #define ULPI_SER_6PIN (1 << 0) #define ULPI_SER_3PIN (1 << 1) unsigned int ulpi_mode; int (*init)(struct device *); void (*exit)(struct device *); }; /* Start PXA3xx U2D host */ int pxa3xx_u2d_start_hc(struct usb_bus *host); /* Stop PXA3xx U2D host */ void pxa3xx_u2d_stop_hc(struct usb_bus *host); extern void pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info); #endif /* __PXA310_U2D__ */ PK ! ���Z� � platform_data/ti-sysc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __TI_SYSC_DATA_H__ #define __TI_SYSC_DATA_H__ enum ti_sysc_module_type { TI_SYSC_OMAP2, TI_SYSC_OMAP2_TIMER, TI_SYSC_OMAP3_SHAM, TI_SYSC_OMAP3_AES, TI_SYSC_OMAP4, TI_SYSC_OMAP4_TIMER, TI_SYSC_OMAP4_SIMPLE, TI_SYSC_OMAP34XX_SR, TI_SYSC_OMAP36XX_SR, TI_SYSC_OMAP4_SR, TI_SYSC_OMAP4_MCASP, TI_SYSC_OMAP4_USB_HOST_FS, TI_SYSC_DRA7_MCAN, TI_SYSC_PRUSS, }; struct ti_sysc_cookie { void *data; void *clkdm; }; /** * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets * @midle_shift: Offset of the midle bit * @clkact_shift: Offset of the clockactivity bit * @sidle_shift: Offset of the sidle bit * @enwkup_shift: Offset of the enawakeup bit * @srst_shift: Offset of the softreset bit * @autoidle_shift: Offset of the autoidle bit * @dmadisable_shift: Offset of the dmadisable bit * @emufree_shift; Offset of the emufree bit * * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a * feature is not available. */ struct sysc_regbits { s8 midle_shift; s8 clkact_shift; s8 sidle_shift; s8 enwkup_shift; s8 srst_shift; s8 autoidle_shift; s8 dmadisable_shift; s8 emufree_shift; }; #define SYSC_QUIRK_REINIT_ON_CTX_LOST BIT(28) #define SYSC_QUIRK_REINIT_ON_RESUME BIT(27) #define SYSC_QUIRK_GPMC_DEBUG BIT(26) #define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25) #define SYSC_MODULE_QUIRK_PRUSS BIT(24) #define SYSC_MODULE_QUIRK_DSS_RESET BIT(23) #define SYSC_MODULE_QUIRK_RTC_UNLOCK BIT(22) #define SYSC_QUIRK_CLKDM_NOAUTO BIT(21) #define SYSC_QUIRK_FORCE_MSTANDBY BIT(20) #define SYSC_MODULE_QUIRK_AESS BIT(19) #define SYSC_MODULE_QUIRK_SGX BIT(18) #define SYSC_MODULE_QUIRK_HDQ1W BIT(17) #define SYSC_MODULE_QUIRK_I2C BIT(16) #define SYSC_MODULE_QUIRK_WDT BIT(15) #define SYSS_QUIRK_RESETDONE_INVERTED BIT(14) #define SYSC_QUIRK_SWSUP_MSTANDBY BIT(13) #define SYSC_QUIRK_SWSUP_SIDLE_ACT BIT(12) #define SYSC_QUIRK_SWSUP_SIDLE BIT(11) #define SYSC_QUIRK_EXT_OPT_CLOCK BIT(10) #define SYSC_QUIRK_LEGACY_IDLE BIT(9) #define SYSC_QUIRK_RESET_STATUS BIT(8) #define SYSC_QUIRK_NO_IDLE BIT(7) #define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6) #define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5) #define SYSC_QUIRK_OPT_CLKS_NEEDED BIT(4) #define SYSC_QUIRK_OPT_CLKS_IN_RESET BIT(3) #define SYSC_QUIRK_16BIT BIT(2) #define SYSC_QUIRK_UNCACHED BIT(1) #define SYSC_QUIRK_USE_CLOCKACT BIT(0) #define SYSC_NR_IDLEMODES 4 /** * struct sysc_capabilities - capabilities for an interconnect target module * @type: sysc type identifier for the module * @sysc_mask: bitmask of supported SYSCONFIG register bits * @regbits: bitmask of SYSCONFIG register bits * @mod_quirks: bitmask of module specific quirks */ struct sysc_capabilities { const enum ti_sysc_module_type type; const u32 sysc_mask; const struct sysc_regbits *regbits; const u32 mod_quirks; }; /** * struct sysc_config - configuration for an interconnect target module * @sysc_val: configured value for sysc register * @syss_mask: configured mask value for SYSSTATUS register * @midlemodes: bitmask of supported master idle modes * @sidlemodes: bitmask of supported slave idle modes * @srst_udelay: optional delay needed after OCP soft reset * @quirks: bitmask of enabled quirks */ struct sysc_config { u32 sysc_val; u32 syss_mask; u8 midlemodes; u8 sidlemodes; u8 srst_udelay; u32 quirks; }; enum sysc_registers { SYSC_REVISION, SYSC_SYSCONFIG, SYSC_SYSSTATUS, SYSC_MAX_REGS, }; /** * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module * @name: legacy "ti,hwmods" module name * @module_pa: physical address of the interconnect target module * @module_size: size of the interconnect target module * @offsets: array of register offsets as listed in enum sysc_registers * @nr_offsets: number of registers * @cap: interconnect target module capabilities * @cfg: interconnect target module configuration * * This data is enough to allocate a new struct omap_hwmod_class_sysconfig * based on device tree data parsed by ti-sysc driver. */ struct ti_sysc_module_data { const char *name; u64 module_pa; u32 module_size; int *offsets; int nr_offsets; const struct sysc_capabilities *cap; struct sysc_config *cfg; }; struct device; struct clk; struct ti_sysc_platform_data { struct of_dev_auxdata *auxdata; bool (*soc_type_gp)(void); int (*init_clockdomain)(struct device *dev, struct clk *fck, struct clk *ick, struct ti_sysc_cookie *cookie); void (*clkdm_deny_idle)(struct device *dev, const struct ti_sysc_cookie *cookie); void (*clkdm_allow_idle)(struct device *dev, const struct ti_sysc_cookie *cookie); int (*init_module)(struct device *dev, const struct ti_sysc_module_data *data, struct ti_sysc_cookie *cookie); int (*enable_module)(struct device *dev, const struct ti_sysc_cookie *cookie); int (*idle_module)(struct device *dev, const struct ti_sysc_cookie *cookie); int (*shutdown_module)(struct device *dev, const struct ti_sysc_cookie *cookie); }; #endif /* __TI_SYSC_DATA_H__ */ PK ! '� � � platform_data/hwmon-s3c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2005 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * http://armlinux.simtec.co.uk/ * * S3C - HWMon interface for ADC */ #ifndef __HWMON_S3C_H__ #define __HWMON_S3C_H__ /** * s3c_hwmon_chcfg - channel configuration * @name: The name to give this channel. * @mult: Multiply the ADC value read by this. * @div: Divide the value from the ADC by this. * * The value read from the ADC is converted to a value that * hwmon expects (mV) by result = (value_read * @mult) / @div. */ struct s3c_hwmon_chcfg { const char *name; unsigned int mult; unsigned int div; }; /** * s3c_hwmon_pdata - HWMON platform data * @in: One configuration for each possible channel used. */ struct s3c_hwmon_pdata { struct s3c_hwmon_chcfg *in[8]; }; /** * s3c_hwmon_set_platdata - Set platform data for S3C HWMON device * @pd: Platform data to register to device. * * Register the given platform data for use with the S3C HWMON device. * The call will copy the platform data, so the board definitions can * make the structure itself __initdata. */ extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd); #endif /* __HWMON_S3C_H__ */ PK ! ��.T T platform_data/usb-davinci.hnu �[��� /* * USB related definitions * * Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef __ASM_ARCH_USB_H #define __ASM_ARCH_USB_H /* Passed as the platform data to the OHCI driver */ struct da8xx_ohci_root_hub { /* Time from power on to power good (in 2 ms units) */ u8 potpgt; }; void davinci_setup_usb(unsigned mA, unsigned potpgt_ms); #endif /* ifndef __ASM_ARCH_USB_H */ PK ! v��� � platform_data/asoc-ux500-msp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2010 * * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson */ #ifndef __MSP_H #define __MSP_H #include <linux/platform_data/dma-ste-dma40.h> /* Platform data structure for a MSP I2S-device */ struct msp_i2s_platform_data { int id; struct stedma40_chan_cfg *msp_i2s_dma_rx; struct stedma40_chan_cfg *msp_i2s_dma_tx; }; #endif PK ! ��I L L platform_data/itco_wdt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Platform data for the Intel TCO Watchdog */ #ifndef _ITCO_WDT_H_ #define _ITCO_WDT_H_ /* Watchdog resources */ #define ICH_RES_IO_TCO 0 #define ICH_RES_IO_SMI 1 #define ICH_RES_MEM_OFF 2 #define ICH_RES_MEM_GCS_PMC 0 /** * struct itco_wdt_platform_data - iTCO_wdt platform data * @name: Name of the platform * @version: iTCO version * @no_reboot_use_pmc: Use PMC BXT API to set and clear NO_REBOOT bit */ struct itco_wdt_platform_data { char name[32]; unsigned int version; bool no_reboot_use_pmc; }; #endif /* _ITCO_WDT_H_ */ PK ! ;hI platform_data/mtd-nand-omap2.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2006 Micron Technology Inc. */ #ifndef _MTD_NAND_OMAP2_H #define _MTD_NAND_OMAP2_H #include <linux/mtd/partitions.h> #define GPMC_BCH_NUM_REMAINDER 8 enum nand_io { NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ NAND_OMAP_POLLED, /* polled mode, without prefetch */ NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */ NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ }; enum omap_ecc { /* * 1-bit ECC: calculation and correction by SW * ECC stored at end of spare area */ OMAP_ECC_HAM1_CODE_SW = 0, /* * 1-bit ECC: calculation by GPMC, Error detection by Software * ECC layout compatible with ROM code layout */ OMAP_ECC_HAM1_CODE_HW, /* 4-bit ECC calculation by GPMC, Error detection by Software */ OMAP_ECC_BCH4_CODE_HW_DETECTION_SW, /* 4-bit ECC calculation by GPMC, Error detection by ELM */ OMAP_ECC_BCH4_CODE_HW, /* 8-bit ECC calculation by GPMC, Error detection by Software */ OMAP_ECC_BCH8_CODE_HW_DETECTION_SW, /* 8-bit ECC calculation by GPMC, Error detection by ELM */ OMAP_ECC_BCH8_CODE_HW, /* 16-bit ECC calculation by GPMC, Error detection by ELM */ OMAP_ECC_BCH16_CODE_HW, }; struct gpmc_nand_regs { void __iomem *gpmc_nand_command; void __iomem *gpmc_nand_address; void __iomem *gpmc_nand_data; void __iomem *gpmc_prefetch_config1; void __iomem *gpmc_prefetch_config2; void __iomem *gpmc_prefetch_control; void __iomem *gpmc_prefetch_status; void __iomem *gpmc_ecc_config; void __iomem *gpmc_ecc_control; void __iomem *gpmc_ecc_size_config; void __iomem *gpmc_ecc1_result; void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER]; }; #endif PK ! � �u u platform_data/mlxcpld.hnu �[��� /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ /* * Mellanox I2C multiplexer support in CPLD * * Copyright (C) 2016-2020 Mellanox Technologies */ #ifndef _LINUX_I2C_MLXCPLD_H #define _LINUX_I2C_MLXCPLD_H /* Platform data for the CPLD I2C multiplexers */ /* mlxcpld_mux_plat_data - per mux data, used with i2c_register_board_info * @chan_ids - channels array * @num_adaps - number of adapters * @sel_reg_addr - mux select register offset in CPLD space * @reg_size: register size in bytes * @handle: handle to be passed by callback * @completion_notify: callback to notify when all the adapters are created */ struct mlxcpld_mux_plat_data { int *chan_ids; int num_adaps; int sel_reg_addr; u8 reg_size; void *handle; int (*completion_notify)(void *handle, struct i2c_adapter *parent, struct i2c_adapter *adapters[]); }; #endif /* _LINUX_I2C_MLXCPLD_H */ PK ! ��c� platform_data/keypad-ep93xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __KEYPAD_EP93XX_H #define __KEYPAD_EP93XX_H struct matrix_keymap_data; /* flags for the ep93xx_keypad driver */ #define EP93XX_KEYPAD_DISABLE_3_KEY (1<<0) /* disable 3-key reset */ #define EP93XX_KEYPAD_DIAG_MODE (1<<1) /* diagnostic mode */ #define EP93XX_KEYPAD_BACK_DRIVE (1<<2) /* back driving mode */ #define EP93XX_KEYPAD_TEST_MODE (1<<3) /* scan only column 0 */ #define EP93XX_KEYPAD_AUTOREPEAT (1<<4) /* enable key autorepeat */ /** * struct ep93xx_keypad_platform_data - platform specific device structure * @keymap_data: pointer to &matrix_keymap_data * @debounce: debounce start count; terminal count is 0xff * @prescale: row/column counter pre-scaler load value * @flags: see above */ struct ep93xx_keypad_platform_data { struct matrix_keymap_data *keymap_data; unsigned int debounce; unsigned int prescale; unsigned int flags; unsigned int clk_rate; }; #define EP93XX_MATRIX_ROWS (8) #define EP93XX_MATRIX_COLS (8) #endif /* __KEYPAD_EP93XX_H */ PK ! u��F� � platform_data/fb-s3c2410.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org> * * Inspired by pxafb.h */ #ifndef __ASM_PLAT_FB_S3C2410_H #define __ASM_PLAT_FB_S3C2410_H __FILE__ #include <linux/compiler_types.h> struct s3c2410fb_hw { unsigned long lcdcon1; unsigned long lcdcon2; unsigned long lcdcon3; unsigned long lcdcon4; unsigned long lcdcon5; }; /* LCD description */ struct s3c2410fb_display { /* LCD type */ unsigned type; #define S3C2410_LCDCON1_DSCAN4 (0<<5) #define S3C2410_LCDCON1_STN4 (1<<5) #define S3C2410_LCDCON1_STN8 (2<<5) #define S3C2410_LCDCON1_TFT (3<<5) #define S3C2410_LCDCON1_TFT1BPP (8<<1) #define S3C2410_LCDCON1_TFT2BPP (9<<1) #define S3C2410_LCDCON1_TFT4BPP (10<<1) #define S3C2410_LCDCON1_TFT8BPP (11<<1) #define S3C2410_LCDCON1_TFT16BPP (12<<1) #define S3C2410_LCDCON1_TFT24BPP (13<<1) /* Screen size */ unsigned short width; unsigned short height; /* Screen info */ unsigned short xres; unsigned short yres; unsigned short bpp; unsigned pixclock; /* pixclock in picoseconds */ unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ /* lcd configuration registers */ unsigned long lcdcon5; #define S3C2410_LCDCON5_BPP24BL (1<<12) #define S3C2410_LCDCON5_FRM565 (1<<11) #define S3C2410_LCDCON5_INVVCLK (1<<10) #define S3C2410_LCDCON5_INVVLINE (1<<9) #define S3C2410_LCDCON5_INVVFRAME (1<<8) #define S3C2410_LCDCON5_INVVD (1<<7) #define S3C2410_LCDCON5_INVVDEN (1<<6) #define S3C2410_LCDCON5_INVPWREN (1<<5) #define S3C2410_LCDCON5_INVLEND (1<<4) #define S3C2410_LCDCON5_PWREN (1<<3) #define S3C2410_LCDCON5_ENLEND (1<<2) #define S3C2410_LCDCON5_BSWP (1<<1) #define S3C2410_LCDCON5_HWSWP (1<<0) }; struct s3c2410fb_mach_info { struct s3c2410fb_display *displays; /* attached displays info */ unsigned num_displays; /* number of defined displays */ unsigned default_display; /* GPIOs */ unsigned long gpcup; unsigned long gpcup_mask; unsigned long gpccon; unsigned long gpccon_mask; unsigned long gpdup; unsigned long gpdup_mask; unsigned long gpdcon; unsigned long gpdcon_mask; void __iomem * gpccon_reg; void __iomem * gpcup_reg; void __iomem * gpdcon_reg; void __iomem * gpdup_reg; /* lpc3600 control register */ unsigned long lpcsel; }; extern void s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); #endif /* __ASM_PLAT_FB_S3C2410_H */ PK ! ��Ԙ� � platform_data/bd6107.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * bd6107.h - Rohm BD6107 LEDs Driver */ #ifndef __BD6107_H__ #define __BD6107_H__ struct device; struct bd6107_platform_data { struct device *fbdev; unsigned int def_value; }; #endif PK ! ib�( ( platform_data/xilinx-ll-temac.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_XILINX_LL_TEMAC_H #define __LINUX_XILINX_LL_TEMAC_H #include <linux/if_ether.h> #include <linux/phy.h> #include <linux/spinlock.h> struct ll_temac_platform_data { bool txcsum; /* Enable/disable TX checksum */ bool rxcsum; /* Enable/disable RX checksum */ u8 mac_addr[ETH_ALEN]; /* MAC address (6 bytes) */ /* Clock frequency for input to MDIO clock generator */ u32 mdio_clk_freq; unsigned long long mdio_bus_id; /* Unique id for MDIO bus */ int phy_addr; /* Address of the PHY to connect to */ phy_interface_t phy_interface; /* PHY interface mode */ bool reg_little_endian; /* Little endian TEMAC register access */ bool dma_little_endian; /* Little endian DMA register access */ /* Pre-initialized mutex to use for synchronizing indirect * register access. When using both interfaces of a single * TEMAC IP block, the same mutex should be passed here, as * they share the same DCR bus bridge. */ spinlock_t *indirect_lock; /* DMA channel control setup */ u8 tx_irq_timeout; /* TX Interrupt Delay Time-out */ u8 tx_irq_count; /* TX Interrupt Coalescing Threshold Count */ u8 rx_irq_timeout; /* RX Interrupt Delay Time-out */ u8 rx_irq_count; /* RX Interrupt Coalescing Threshold Count */ }; #endif /* __LINUX_XILINX_LL_TEMAC_H */ PK ! q� 0 0 platform_data/i2c-gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * i2c-gpio interface to platform code * * Copyright (C) 2007 Atmel Corporation */ #ifndef _LINUX_I2C_GPIO_H #define _LINUX_I2C_GPIO_H /** * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz * @timeout: clock stretching timeout in jiffies. If the slave keeps * SCL low for longer than this, the transfer will time out. * @sda_is_open_drain: SDA is configured as open drain, i.e. the pin * isn't actively driven high when setting the output value high. * gpio_get_value() must return the actual pin state even if the * pin is configured as an output. * @scl_is_open_drain: SCL is set up as open drain. Same requirements * as for sda_is_open_drain apply. * @scl_is_output_only: SCL output drivers cannot be turned off. */ struct i2c_gpio_platform_data { int udelay; int timeout; unsigned int sda_is_open_drain:1; unsigned int scl_is_open_drain:1; unsigned int scl_is_output_only:1; }; #endif /* _LINUX_I2C_GPIO_H */ PK ! 3-6�9 9 platform_data/zforce_ts.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* drivers/input/touchscreen/zforce.c * * Copyright (C) 2012-2013 MundoReader S.L. */ #ifndef _LINUX_INPUT_ZFORCE_TS_H #define _LINUX_INPUT_ZFORCE_TS_H struct zforce_ts_platdata { unsigned int x_max; unsigned int y_max; }; #endif /* _LINUX_INPUT_ZFORCE_TS_H */ PK ! q �+ platform_data/eth_ixp4xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLATFORM_DATA_ETH_IXP4XX #define __PLATFORM_DATA_ETH_IXP4XX #include <linux/types.h> #define IXP4XX_ETH_NPEA 0x00 #define IXP4XX_ETH_NPEB 0x10 #define IXP4XX_ETH_NPEC 0x20 /* Information about built-in Ethernet MAC interfaces */ struct eth_plat_info { u8 phy; /* MII PHY ID, 0 - 31 */ u8 rxq; /* configurable, currently 0 - 31 only */ u8 txreadyq; u8 hwaddr[6]; u8 npe; /* NPE instance used by this interface */ bool has_mdio; /* If this instance has an MDIO bus */ }; #endif PK ! �I6#v v platform_data/atmel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * atmel platform data */ #ifndef __ATMEL_H__ #define __ATMEL_H__ /* FIXME: this needs a better location, but gets stuff building again */ #ifdef CONFIG_ATMEL_PM extern int at91_suspend_entering_slow_clock(void); #else static inline int at91_suspend_entering_slow_clock(void) { return 0; } #endif #endif /* __ATMEL_H__ */ PK ! �N� platform_data/adp8870.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Definitions and platform data for Analog Devices * Backlight drivers ADP8870 * * Copyright 2009-2010 Analog Devices Inc. */ #ifndef __LINUX_I2C_ADP8870_H #define __LINUX_I2C_ADP8870_H #define ID_ADP8870 8870 #define ADP8870_MAX_BRIGHTNESS 0x7F #define FLAG_OFFT_SHIFT 8 /* * LEDs subdevice platform data */ #define ADP8870_LED_DIS_BLINK (0 << FLAG_OFFT_SHIFT) #define ADP8870_LED_OFFT_600ms (1 << FLAG_OFFT_SHIFT) #define ADP8870_LED_OFFT_1200ms (2 << FLAG_OFFT_SHIFT) #define ADP8870_LED_OFFT_1800ms (3 << FLAG_OFFT_SHIFT) #define ADP8870_LED_ONT_200ms 0 #define ADP8870_LED_ONT_600ms 1 #define ADP8870_LED_ONT_800ms 2 #define ADP8870_LED_ONT_1200ms 3 #define ADP8870_LED_D7 (7) #define ADP8870_LED_D6 (6) #define ADP8870_LED_D5 (5) #define ADP8870_LED_D4 (4) #define ADP8870_LED_D3 (3) #define ADP8870_LED_D2 (2) #define ADP8870_LED_D1 (1) /* * Backlight subdevice platform data */ #define ADP8870_BL_D7 (1 << 6) #define ADP8870_BL_D6 (1 << 5) #define ADP8870_BL_D5 (1 << 4) #define ADP8870_BL_D4 (1 << 3) #define ADP8870_BL_D3 (1 << 2) #define ADP8870_BL_D2 (1 << 1) #define ADP8870_BL_D1 (1 << 0) #define ADP8870_FADE_T_DIS 0 /* Fade Timer Disabled */ #define ADP8870_FADE_T_300ms 1 /* 0.3 Sec */ #define ADP8870_FADE_T_600ms 2 #define ADP8870_FADE_T_900ms 3 #define ADP8870_FADE_T_1200ms 4 #define ADP8870_FADE_T_1500ms 5 #define ADP8870_FADE_T_1800ms 6 #define ADP8870_FADE_T_2100ms 7 #define ADP8870_FADE_T_2400ms 8 #define ADP8870_FADE_T_2700ms 9 #define ADP8870_FADE_T_3000ms 10 #define ADP8870_FADE_T_3500ms 11 #define ADP8870_FADE_T_4000ms 12 #define ADP8870_FADE_T_4500ms 13 #define ADP8870_FADE_T_5000ms 14 #define ADP8870_FADE_T_5500ms 15 /* 5.5 Sec */ #define ADP8870_FADE_LAW_LINEAR 0 #define ADP8870_FADE_LAW_SQUARE 1 #define ADP8870_FADE_LAW_CUBIC1 2 #define ADP8870_FADE_LAW_CUBIC2 3 #define ADP8870_BL_AMBL_FILT_80ms 0 /* Light sensor filter time */ #define ADP8870_BL_AMBL_FILT_160ms 1 #define ADP8870_BL_AMBL_FILT_320ms 2 #define ADP8870_BL_AMBL_FILT_640ms 3 #define ADP8870_BL_AMBL_FILT_1280ms 4 #define ADP8870_BL_AMBL_FILT_2560ms 5 #define ADP8870_BL_AMBL_FILT_5120ms 6 #define ADP8870_BL_AMBL_FILT_10240ms 7 /* 10.24 sec */ /* * Blacklight current 0..30mA */ #define ADP8870_BL_CUR_mA(I) ((I * 127) / 30) /* * L2 comparator current 0..1106uA */ #define ADP8870_L2_COMP_CURR_uA(I) ((I * 255) / 1106) /* * L3 comparator current 0..551uA */ #define ADP8870_L3_COMP_CURR_uA(I) ((I * 255) / 551) /* * L4 comparator current 0..275uA */ #define ADP8870_L4_COMP_CURR_uA(I) ((I * 255) / 275) /* * L5 comparator current 0..138uA */ #define ADP8870_L5_COMP_CURR_uA(I) ((I * 255) / 138) struct adp8870_backlight_platform_data { u8 bl_led_assign; /* 1 = Backlight 0 = Individual LED */ u8 pwm_assign; /* 1 = Enables PWM mode */ u8 bl_fade_in; /* Backlight Fade-In Timer */ u8 bl_fade_out; /* Backlight Fade-Out Timer */ u8 bl_fade_law; /* fade-on/fade-off transfer characteristic */ u8 en_ambl_sens; /* 1 = enable ambient light sensor */ u8 abml_filt; /* Light sensor filter time */ u8 l1_daylight_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l1_daylight_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l2_bright_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l2_bright_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l3_office_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l3_office_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l4_indoor_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l4_indor_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l5_dark_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l5_dark_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */ u8 l2_trip; /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */ u8 l2_hyst; /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */ u8 l3_trip; /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */ u8 l3_hyst; /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */ u8 l4_trip; /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */ u8 l4_hyst; /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */ u8 l5_trip; /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */ u8 l5_hyst; /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */ /** * Independent Current Sinks / LEDS * Sinks not assigned to the Backlight can be exposed to * user space using the LEDS CLASS interface */ int num_leds; struct led_info *leds; u8 led_fade_in; /* LED Fade-In Timer */ u8 led_fade_out; /* LED Fade-Out Timer */ u8 led_fade_law; /* fade-on/fade-off transfer characteristic */ u8 led_on_time; }; #endif /* __LINUX_I2C_ADP8870_H */ PK ! �+�B� � platform_data/pca953x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PCA953X_H #define _LINUX_PCA953X_H #include <linux/types.h> #include <linux/i2c.h> /* platform data for the PCA9539 16-bit I/O expander driver */ struct pca953x_platform_data { /* number of the first GPIO */ unsigned gpio_base; /* initial polarity inversion setting */ u32 invert; /* interrupt base */ int irq_base; void *context; /* param to setup/teardown */ int (*setup)(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *context); int (*teardown)(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *context); const char *const *names; }; #endif /* _LINUX_PCA953X_H */ PK ! Ga�� � platform_data/ad5755.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2012 Analog Devices Inc. */ #ifndef __LINUX_PLATFORM_DATA_AD5755_H__ #define __LINUX_PLATFORM_DATA_AD5755_H__ enum ad5755_mode { AD5755_MODE_VOLTAGE_0V_5V = 0, AD5755_MODE_VOLTAGE_0V_10V = 1, AD5755_MODE_VOLTAGE_PLUSMINUS_5V = 2, AD5755_MODE_VOLTAGE_PLUSMINUS_10V = 3, AD5755_MODE_CURRENT_4mA_20mA = 4, AD5755_MODE_CURRENT_0mA_20mA = 5, AD5755_MODE_CURRENT_0mA_24mA = 6, }; enum ad5755_dc_dc_phase { AD5755_DC_DC_PHASE_ALL_SAME_EDGE = 0, AD5755_DC_DC_PHASE_A_B_SAME_EDGE_C_D_OPP_EDGE = 1, AD5755_DC_DC_PHASE_A_C_SAME_EDGE_B_D_OPP_EDGE = 2, AD5755_DC_DC_PHASE_90_DEGREE = 3, }; enum ad5755_dc_dc_freq { AD5755_DC_DC_FREQ_250kHZ = 0, AD5755_DC_DC_FREQ_410kHZ = 1, AD5755_DC_DC_FREQ_650kHZ = 2, }; enum ad5755_dc_dc_maxv { AD5755_DC_DC_MAXV_23V = 0, AD5755_DC_DC_MAXV_24V5 = 1, AD5755_DC_DC_MAXV_27V = 2, AD5755_DC_DC_MAXV_29V5 = 3, }; enum ad5755_slew_rate { AD5755_SLEW_RATE_64k = 0, AD5755_SLEW_RATE_32k = 1, AD5755_SLEW_RATE_16k = 2, AD5755_SLEW_RATE_8k = 3, AD5755_SLEW_RATE_4k = 4, AD5755_SLEW_RATE_2k = 5, AD5755_SLEW_RATE_1k = 6, AD5755_SLEW_RATE_500 = 7, AD5755_SLEW_RATE_250 = 8, AD5755_SLEW_RATE_125 = 9, AD5755_SLEW_RATE_64 = 10, AD5755_SLEW_RATE_32 = 11, AD5755_SLEW_RATE_16 = 12, AD5755_SLEW_RATE_8 = 13, AD5755_SLEW_RATE_4 = 14, AD5755_SLEW_RATE_0_5 = 15, }; enum ad5755_slew_step_size { AD5755_SLEW_STEP_SIZE_1 = 0, AD5755_SLEW_STEP_SIZE_2 = 1, AD5755_SLEW_STEP_SIZE_4 = 2, AD5755_SLEW_STEP_SIZE_8 = 3, AD5755_SLEW_STEP_SIZE_16 = 4, AD5755_SLEW_STEP_SIZE_32 = 5, AD5755_SLEW_STEP_SIZE_64 = 6, AD5755_SLEW_STEP_SIZE_128 = 7, AD5755_SLEW_STEP_SIZE_256 = 8, }; /** * struct ad5755_platform_data - AD5755 DAC driver platform data * @ext_dc_dc_compenstation_resistor: Whether an external DC-DC converter * compensation register is used. * @dc_dc_phase: DC-DC converter phase. * @dc_dc_freq: DC-DC converter frequency. * @dc_dc_maxv: DC-DC maximum allowed boost voltage. * @dac.mode: The mode to be used for the DAC output. * @dac.ext_current_sense_resistor: Whether an external current sense resistor * is used. * @dac.enable_voltage_overrange: Whether to enable 20% voltage output overrange. * @dac.slew.enable: Whether to enable digital slew. * @dac.slew.rate: Slew rate of the digital slew. * @dac.slew.step_size: Slew step size of the digital slew. **/ struct ad5755_platform_data { bool ext_dc_dc_compenstation_resistor; enum ad5755_dc_dc_phase dc_dc_phase; enum ad5755_dc_dc_freq dc_dc_freq; enum ad5755_dc_dc_maxv dc_dc_maxv; struct { enum ad5755_mode mode; bool ext_current_sense_resistor; bool enable_voltage_overrange; struct { bool enable; enum ad5755_slew_rate rate; enum ad5755_slew_step_size step_size; } slew; } dac[4]; }; #endif PK ! ^�=�C C platform_data/i2c-davinci.hnu �[��� /* * DaVinci I2C controller platform_device info * * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> * * 2007 (c) MontaVista Software, Inc. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. */ #ifndef __ASM_ARCH_I2C_H #define __ASM_ARCH_I2C_H /* All frequencies are expressed in kHz */ struct davinci_i2c_platform_data { unsigned int bus_freq; /* standard bus frequency (kHz) */ unsigned int bus_delay; /* post-transaction delay (usec) */ bool gpio_recovery; /* Use GPIO recovery method */ bool has_pfunc; /* Chip has a ICPFUNC register */ }; /* for board setup code */ void davinci_init_i2c(struct davinci_i2c_platform_data *); #endif /* __ASM_ARCH_I2C_H */ PK ! �k8� � platform_data/usb-ohci-s3c2410.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* arch/arm/plat-samsung/include/plat/usb-control.h * * Copyright (c) 2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * * S3C - USB host port information */ #ifndef __ASM_ARCH_USBCONTROL_H #define __ASM_ARCH_USBCONTROL_H #define S3C_HCDFLG_USED (1) struct s3c2410_hcd_port { unsigned char flags; unsigned char power; unsigned char oc_status; unsigned char oc_changed; }; struct s3c2410_hcd_info { struct usb_hcd *hcd; struct s3c2410_hcd_port port[2]; void (*power_control)(int port, int to); void (*enable_oc)(struct s3c2410_hcd_info *, int on); void (*report_oc)(struct s3c2410_hcd_info *, int ports); }; static inline void s3c2410_usb_report_oc(struct s3c2410_hcd_info *info, int ports) { if (info->report_oc != NULL) { (info->report_oc)(info, ports); } } extern void s3c_ohci_set_platdata(struct s3c2410_hcd_info *info); #endif /*__ASM_ARCH_USBCONTROL_H */ PK ! �}.V9 9 platform_data/keyboard-spear.hnu �[��� /* * Copyright (C) 2010 ST Microelectronics * Rajeev Kumar <rajeevkumar.linux@gmail.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __PLAT_KEYBOARD_H #define __PLAT_KEYBOARD_H #include <linux/bitops.h> #include <linux/input.h> #include <linux/input/matrix_keypad.h> #include <linux/types.h> #define DECLARE_9x9_KEYMAP(_name) \ int _name[] = { \ KEY(0, 0, KEY_ESC), \ KEY(0, 1, KEY_1), \ KEY(0, 2, KEY_2), \ KEY(0, 3, KEY_3), \ KEY(0, 4, KEY_4), \ KEY(0, 5, KEY_5), \ KEY(0, 6, KEY_6), \ KEY(0, 7, KEY_7), \ KEY(0, 8, KEY_8), \ KEY(1, 0, KEY_9), \ KEY(1, 1, KEY_MINUS), \ KEY(1, 2, KEY_EQUAL), \ KEY(1, 3, KEY_BACKSPACE), \ KEY(1, 4, KEY_TAB), \ KEY(1, 5, KEY_Q), \ KEY(1, 6, KEY_W), \ KEY(1, 7, KEY_E), \ KEY(1, 8, KEY_R), \ KEY(2, 0, KEY_T), \ KEY(2, 1, KEY_Y), \ KEY(2, 2, KEY_U), \ KEY(2, 3, KEY_I), \ KEY(2, 4, KEY_O), \ KEY(2, 5, KEY_P), \ KEY(2, 6, KEY_LEFTBRACE), \ KEY(2, 7, KEY_RIGHTBRACE), \ KEY(2, 8, KEY_ENTER), \ KEY(3, 0, KEY_LEFTCTRL), \ KEY(3, 1, KEY_A), \ KEY(3, 2, KEY_S), \ KEY(3, 3, KEY_D), \ KEY(3, 4, KEY_F), \ KEY(3, 5, KEY_G), \ KEY(3, 6, KEY_H), \ KEY(3, 7, KEY_J), \ KEY(3, 8, KEY_K), \ KEY(4, 0, KEY_L), \ KEY(4, 1, KEY_SEMICOLON), \ KEY(4, 2, KEY_APOSTROPHE), \ KEY(4, 3, KEY_GRAVE), \ KEY(4, 4, KEY_LEFTSHIFT), \ KEY(4, 5, KEY_BACKSLASH), \ KEY(4, 6, KEY_Z), \ KEY(4, 7, KEY_X), \ KEY(4, 8, KEY_C), \ KEY(5, 0, KEY_V), \ KEY(5, 1, KEY_B), \ KEY(5, 2, KEY_N), \ KEY(5, 3, KEY_M), \ KEY(5, 4, KEY_COMMA), \ KEY(5, 5, KEY_DOT), \ KEY(5, 6, KEY_SLASH), \ KEY(5, 7, KEY_RIGHTSHIFT), \ KEY(5, 8, KEY_KPASTERISK), \ KEY(6, 0, KEY_LEFTALT), \ KEY(6, 1, KEY_SPACE), \ KEY(6, 2, KEY_CAPSLOCK), \ KEY(6, 3, KEY_F1), \ KEY(6, 4, KEY_F2), \ KEY(6, 5, KEY_F3), \ KEY(6, 6, KEY_F4), \ KEY(6, 7, KEY_F5), \ KEY(6, 8, KEY_F6), \ KEY(7, 0, KEY_F7), \ KEY(7, 1, KEY_F8), \ KEY(7, 2, KEY_F9), \ KEY(7, 3, KEY_F10), \ KEY(7, 4, KEY_NUMLOCK), \ KEY(7, 5, KEY_SCROLLLOCK), \ KEY(7, 6, KEY_KP7), \ KEY(7, 7, KEY_KP8), \ KEY(7, 8, KEY_KP9), \ KEY(8, 0, KEY_KPMINUS), \ KEY(8, 1, KEY_KP4), \ KEY(8, 2, KEY_KP5), \ KEY(8, 3, KEY_KP6), \ KEY(8, 4, KEY_KPPLUS), \ KEY(8, 5, KEY_KP1), \ KEY(8, 6, KEY_KP2), \ KEY(8, 7, KEY_KP3), \ KEY(8, 8, KEY_KP0), \ } #define DECLARE_6x6_KEYMAP(_name) \ int _name[] = { \ KEY(0, 0, KEY_RESERVED), \ KEY(0, 1, KEY_1), \ KEY(0, 2, KEY_2), \ KEY(0, 3, KEY_3), \ KEY(0, 4, KEY_4), \ KEY(0, 5, KEY_5), \ KEY(1, 0, KEY_Q), \ KEY(1, 1, KEY_W), \ KEY(1, 2, KEY_E), \ KEY(1, 3, KEY_R), \ KEY(1, 4, KEY_T), \ KEY(1, 5, KEY_Y), \ KEY(2, 0, KEY_D), \ KEY(2, 1, KEY_F), \ KEY(2, 2, KEY_G), \ KEY(2, 3, KEY_H), \ KEY(2, 4, KEY_J), \ KEY(2, 5, KEY_K), \ KEY(3, 0, KEY_B), \ KEY(3, 1, KEY_N), \ KEY(3, 2, KEY_M), \ KEY(3, 3, KEY_COMMA), \ KEY(3, 4, KEY_DOT), \ KEY(3, 5, KEY_SLASH), \ KEY(4, 0, KEY_F6), \ KEY(4, 1, KEY_F7), \ KEY(4, 2, KEY_F8), \ KEY(4, 3, KEY_F9), \ KEY(4, 4, KEY_F10), \ KEY(4, 5, KEY_NUMLOCK), \ KEY(5, 0, KEY_KP2), \ KEY(5, 1, KEY_KP3), \ KEY(5, 2, KEY_KP0), \ KEY(5, 3, KEY_KPDOT), \ KEY(5, 4, KEY_RO), \ KEY(5, 5, KEY_ZENKAKUHANKAKU), \ } #define KEYPAD_9x9 0 #define KEYPAD_6x6 1 #define KEYPAD_2x2 2 /** * struct kbd_platform_data - spear keyboard platform data * keymap: pointer to keymap data (table and size) * rep: enables key autorepeat * mode: choose keyboard support(9x9, 6x6, 2x2) * suspended_rate: rate at which keyboard would operate in suspended mode * * This structure is supposed to be used by platform code to supply * keymaps to drivers that implement keyboards. */ struct kbd_platform_data { const struct matrix_keymap_data *keymap; bool rep; unsigned int mode; unsigned int suspended_rate; }; #endif /* __PLAT_KEYBOARD_H */ PK ! �j�l� � platform_data/usb-ohci-pxa27x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef ASMARM_ARCH_OHCI_H #define ASMARM_ARCH_OHCI_H struct device; struct pxaohci_platform_data { int (*init)(struct device *); void (*exit)(struct device *); unsigned long flags; #define ENABLE_PORT1 (1 << 0) #define ENABLE_PORT2 (1 << 1) #define ENABLE_PORT3 (1 << 2) #define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3) #define POWER_SENSE_LOW (1 << 3) #define POWER_CONTROL_LOW (1 << 4) #define NO_OC_PROTECTION (1 << 5) #define OC_MODE_GLOBAL (0 << 6) #define OC_MODE_PERPORT (1 << 6) int power_on_delay; /* Power On to Power Good time - in ms * HCD must wait for this duration before * accessing a powered on port */ int port_mode; #define PMM_NPS_MODE 1 #define PMM_GLOBAL_MODE 2 #define PMM_PERPORT_MODE 3 int power_budget; }; extern void pxa_set_ohci_info(struct pxaohci_platform_data *info); #endif PK ! �+y�� � platform_data/clk-davinci-pll.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * PLL clock driver for TI Davinci SoCs * * Copyright (C) 2018 David Lechner <david@lechnology.com> */ #ifndef __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ #define __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ #include <linux/regmap.h> /** * davinci_pll_platform_data * @cfgchip: CFGCHIP syscon regmap */ struct davinci_pll_platform_data { struct regmap *cfgchip; }; #endif /* __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ */ PK ! ���� � platform_data/pata_ixp4xx_cf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLATFORM_DATA_PATA_IXP4XX_H #define __PLATFORM_DATA_PATA_IXP4XX_H #include <linux/types.h> /* * This structure provide a means for the board setup code * to give information to th pata_ixp4xx driver. It is * passed as platform_data. */ struct ixp4xx_pata_data { volatile u32 *cs0_cfg; volatile u32 *cs1_cfg; unsigned long cs0_bits; unsigned long cs1_bits; void __iomem *cmd; void __iomem *ctl; }; #endif PK ! ?rQ� � platform_data/mcs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2009 - 2010 Samsung Electronics Co.Ltd * Author: Joonyoung Shim <jy0922.shim@samsung.com> * Author: HeungJun Kim <riverful.kim@samsung.com> */ #ifndef __LINUX_MCS_H #define __LINUX_MCS_H #define MCS_KEY_MAP(v, c) ((((v) & 0xff) << 16) | ((c) & 0xffff)) #define MCS_KEY_VAL(v) (((v) >> 16) & 0xff) #define MCS_KEY_CODE(v) ((v) & 0xffff) struct mcs_platform_data { void (*poweron)(bool); void (*cfg_pin)(void); /* touchscreen */ unsigned int x_size; unsigned int y_size; /* touchkey */ const u32 *keymap; unsigned int keymap_size; unsigned int key_maxval; bool no_autorepeat; }; #endif /* __LINUX_MCS_H */ PK ! ]y�,� � & platform_data/keyboard-pxa930_rotary.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARCH_PXA930_ROTARY_H #define __ASM_ARCH_PXA930_ROTARY_H /* NOTE: * * rotary can be either interpreted as a ralative input event (e.g. * REL_WHEEL or REL_HWHEEL) or a specific key event (e.g. UP/DOWN * or LEFT/RIGHT), depending on if up_key & down_key are assigned * or rel_code is assigned a non-zero value. When all are non-zero, * up_key and down_key will be preferred. */ struct pxa930_rotary_platform_data { int up_key; int down_key; int rel_code; }; void __init pxa930_set_rotarykey_info(struct pxa930_rotary_platform_data *info); #endif /* __ASM_ARCH_PXA930_ROTARY_H */ PK ! �P�o o platform_data/st33zp24.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * STMicroelectronics TPM Linux driver for TPM 1.2 ST33ZP24 * Copyright (C) 2009 - 2016 STMicroelectronics */ #ifndef __ST33ZP24_H__ #define __ST33ZP24_H__ #define TPM_ST33_I2C "st33zp24-i2c" #define TPM_ST33_SPI "st33zp24-spi" struct st33zp24_platform_data { int io_lpcpd; }; #endif /* __ST33ZP24_H__ */ PK ! :�´i i platform_data/spi-mt65xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MTK SPI bus driver definitions * * Copyright (c) 2015 MediaTek Inc. * Author: Leilk Liu <leilk.liu@mediatek.com> */ #ifndef ____LINUX_PLATFORM_DATA_SPI_MTK_H #define ____LINUX_PLATFORM_DATA_SPI_MTK_H /* Board specific platform_data */ struct mtk_chip_config { u32 sample_sel; u32 tick_delay; }; #endif PK ! (Ʋn- - platform_data/s3c-hsudc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * S3C24XX USB 2.0 High-speed USB controller gadget driver * * Copyright (c) 2010 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * * The S3C24XX USB 2.0 high-speed USB controller supports upto 9 endpoints. * Each endpoint can be configured as either in or out endpoint. Endpoints * can be configured for Bulk or Interrupt transfer mode. */ #ifndef __LINUX_USB_S3C_HSUDC_H #define __LINUX_USB_S3C_HSUDC_H /** * s3c24xx_hsudc_platdata - Platform data for USB High-Speed gadget controller. * @epnum: Number of endpoints to be instantiated by the controller driver. * @gpio_init: Platform specific USB related GPIO initialization. * @gpio_uninit: Platform specific USB releted GPIO uninitialzation. * * Representation of platform data for the S3C24XX USB 2.0 High Speed gadget * controllers. */ struct s3c24xx_hsudc_platdata { unsigned int epnum; void (*gpio_init)(void); void (*gpio_uninit)(void); void (*phy_init)(void); void (*phy_uninit)(void); }; #endif /* __LINUX_USB_S3C_HSUDC_H */ PK ! T�Es s ! platform_data/cros_ec_sensorhub.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Chrome OS EC MEMS Sensor Hub driver. * * Copyright 2019 Google LLC */ #ifndef __LINUX_PLATFORM_DATA_CROS_EC_SENSORHUB_H #define __LINUX_PLATFORM_DATA_CROS_EC_SENSORHUB_H #include <linux/ktime.h> #include <linux/mutex.h> #include <linux/notifier.h> #include <linux/platform_data/cros_ec_commands.h> struct iio_dev; /** * struct cros_ec_sensor_platform - ChromeOS EC sensor platform information. * @sensor_num: Id of the sensor, as reported by the EC. */ struct cros_ec_sensor_platform { u8 sensor_num; }; /** * typedef cros_ec_sensorhub_push_data_cb_t - Callback function to send datum * to specific sensors. * * @indio_dev: The IIO device that will process the sample. * @data: Vector array of the ring sample. * @timestamp: Timestamp in host timespace when the sample was acquired by * the EC. */ typedef int (*cros_ec_sensorhub_push_data_cb_t)(struct iio_dev *indio_dev, s16 *data, s64 timestamp); struct cros_ec_sensorhub_sensor_push_data { struct iio_dev *indio_dev; cros_ec_sensorhub_push_data_cb_t push_data_cb; }; enum { CROS_EC_SENSOR_LAST_TS, CROS_EC_SENSOR_NEW_TS, CROS_EC_SENSOR_ALL_TS }; struct cros_ec_sensors_ring_sample { u8 sensor_id; u8 flag; s16 vector[3]; s64 timestamp; } __packed; /* State used for cros_ec_ring_fix_overflow */ struct cros_ec_sensors_ec_overflow_state { s64 offset; s64 last; }; /* Length of the filter, how long to remember entries for */ #define CROS_EC_SENSORHUB_TS_HISTORY_SIZE 64 /** * struct cros_ec_sensors_ts_filter_state - Timestamp filetr state. * * @x_offset: x is EC interrupt time. x_offset its last value. * @y_offset: y is the difference between AP and EC time, y_offset its last * value. * @x_history: The past history of x, relative to x_offset. * @y_history: The past history of y, relative to y_offset. * @m_history: rate between y and x. * @history_len: Amount of valid historic data in the arrays. * @temp_buf: Temporary buffer used when updating the filter. * @median_m: median value of m_history * @median_error: final error to apply to AP interrupt timestamp to get the * "true timestamp" the event occurred. */ struct cros_ec_sensors_ts_filter_state { s64 x_offset, y_offset; s64 x_history[CROS_EC_SENSORHUB_TS_HISTORY_SIZE]; s64 y_history[CROS_EC_SENSORHUB_TS_HISTORY_SIZE]; s64 m_history[CROS_EC_SENSORHUB_TS_HISTORY_SIZE]; int history_len; s64 temp_buf[CROS_EC_SENSORHUB_TS_HISTORY_SIZE]; s64 median_m; s64 median_error; }; /* struct cros_ec_sensors_ts_batch_state - State of batch of a single sensor. * * Use to store information to batch data using median fileter information. * * @penul_ts: last but one batch timestamp (penultimate timestamp). * Used for timestamp spreading calculations * when a batch shows up. * @penul_len: last but one batch length. * @last_ts: Last batch timestam. * @last_len: Last batch length. * @newest_sensor_event: Last sensor timestamp. */ struct cros_ec_sensors_ts_batch_state { s64 penul_ts; int penul_len; s64 last_ts; int last_len; s64 newest_sensor_event; }; /* * struct cros_ec_sensorhub - Sensor Hub device data. * * @dev: Device object, mostly used for logging. * @ec: Embedded Controller where the hub is located. * @sensor_num: Number of MEMS sensors present in the EC. * @msg: Structure to send FIFO requests. * @params: Pointer to parameters in msg. * @resp: Pointer to responses in msg. * @cmd_lock : Lock for sending msg. * @notifier: Notifier to kick the FIFO interrupt. * @ring: Preprocessed ring to store events. * @fifo_timestamp: Array for event timestamp and spreading. * @fifo_info: Copy of FIFO information coming from the EC. * @fifo_size: Size of the ring. * @batch_state: Per sensor information of the last batches received. * @overflow_a: For handling timestamp overflow for a time (sensor events) * @overflow_b: For handling timestamp overflow for b time (ec interrupts) * @filter: Medium fileter structure. * @tight_timestamps: Set to truen when EC support tight timestamping: * The timestamps reported from the EC have low jitter. * Timestamps also come before every sample. Set either * by feature bits coming from the EC or userspace. * @future_timestamp_count: Statistics used to compute shaved time. * This occurs when timestamp interpolation from EC * time to AP time accidentally puts timestamps in * the future. These timestamps are clamped to * `now` and these count/total_ns maintain the * statistics for how much time was removed in a * given period. * @future_timestamp_total_ns: Total amount of time shaved. * @push_data: Array of callback to send datums to iio sensor object. */ struct cros_ec_sensorhub { struct device *dev; struct cros_ec_dev *ec; int sensor_num; struct cros_ec_command *msg; struct ec_params_motion_sense *params; struct ec_response_motion_sense *resp; struct mutex cmd_lock; /* Lock for protecting msg structure. */ struct notifier_block notifier; struct cros_ec_sensors_ring_sample *ring; ktime_t fifo_timestamp[CROS_EC_SENSOR_ALL_TS]; struct ec_response_motion_sense_fifo_info *fifo_info; int fifo_size; struct cros_ec_sensors_ts_batch_state *batch_state; struct cros_ec_sensors_ec_overflow_state overflow_a; struct cros_ec_sensors_ec_overflow_state overflow_b; struct cros_ec_sensors_ts_filter_state filter; int tight_timestamps; s32 future_timestamp_count; s64 future_timestamp_total_ns; struct cros_ec_sensorhub_sensor_push_data *push_data; }; int cros_ec_sensorhub_register_push_data(struct cros_ec_sensorhub *sensorhub, u8 sensor_num, struct iio_dev *indio_dev, cros_ec_sensorhub_push_data_cb_t cb); void cros_ec_sensorhub_unregister_push_data(struct cros_ec_sensorhub *sensorhub, u8 sensor_num); int cros_ec_sensorhub_ring_allocate(struct cros_ec_sensorhub *sensorhub); int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub); void cros_ec_sensorhub_ring_remove(void *arg); int cros_ec_sensorhub_ring_fifo_enable(struct cros_ec_sensorhub *sensorhub, bool on); #endif /* __LINUX_PLATFORM_DATA_CROS_EC_SENSORHUB_H */ PK ! ]Y�,j j platform_data/iommu-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * omap iommu: main structures * * Copyright (C) 2008-2009 Nokia Corporation * * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> */ #include <linux/platform_device.h> struct iommu_platform_data { const char *reset_name; int (*assert_reset)(struct platform_device *pdev, const char *name); int (*deassert_reset)(struct platform_device *pdev, const char *name); int (*device_enable)(struct platform_device *pdev); int (*device_idle)(struct platform_device *pdev); int (*set_pwrdm_constraint)(struct platform_device *pdev, bool request, u8 *pwrst); }; PK ! � �m� � platform_data/ads7828.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * TI ADS7828 A/D Converter platform data definition * * Copyright (c) 2012 Savoir-faire Linux Inc. * Vivien Didelot <vivien.didelot@savoirfairelinux.com> * * For further information, see the Documentation/hwmon/ads7828.rst file. */ #ifndef _PDATA_ADS7828_H #define _PDATA_ADS7828_H /** * struct ads7828_platform_data - optional ADS7828 connectivity info * @diff_input: Differential input mode. * @ext_vref: Use an external voltage reference. * @vref_mv: Voltage reference value, if external. */ struct ads7828_platform_data { bool diff_input; bool ext_vref; unsigned int vref_mv; }; #endif /* _PDATA_ADS7828_H */ PK ! }�X�M M platform_data/cros_ec_chardev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * ChromeOS EC device interface. * * Copyright (C) 2014 Google, Inc. */ #ifndef _UAPI_LINUX_CROS_EC_DEV_H_ #define _UAPI_LINUX_CROS_EC_DEV_H_ #include <linux/bits.h> #include <linux/ioctl.h> #include <linux/types.h> #include <linux/platform_data/cros_ec_commands.h> #define CROS_EC_DEV_VERSION "1.0.0" /** * struct cros_ec_readmem - Struct used to read mapped memory. * @offset: Within EC_LPC_ADDR_MEMMAP region. * @bytes: Number of bytes to read. Zero means "read a string" (including '\0') * At most only EC_MEMMAP_SIZE bytes can be read. * @buffer: Where to store the result. The ioctl returns the number of bytes * read or negative on error. */ struct cros_ec_readmem { uint32_t offset; uint32_t bytes; uint8_t buffer[EC_MEMMAP_SIZE]; }; #define CROS_EC_DEV_IOC 0xEC #define CROS_EC_DEV_IOCXCMD _IOWR(CROS_EC_DEV_IOC, 0, struct cros_ec_command) #define CROS_EC_DEV_IOCRDMEM _IOWR(CROS_EC_DEV_IOC, 1, struct cros_ec_readmem) #define CROS_EC_DEV_IOCEVENTMASK _IO(CROS_EC_DEV_IOC, 2) #endif /* _CROS_EC_DEV_H_ */ PK ! E�4�6 6 platform_data/arm-ux500-pm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2010-2013 * Author: Rickard Andersson <rickard.andersson@stericsson.com> for * ST-Ericsson. * Author: Daniel Lezcano <daniel.lezcano@linaro.org> for Linaro. */ #ifndef ARM_UX500_PM_H #define ARM_UX500_PM_H int prcmu_gic_decouple(void); int prcmu_gic_recouple(void); bool prcmu_gic_pending_irq(void); bool prcmu_pending_irq(void); bool prcmu_is_cpu_in_wfi(int cpu); int prcmu_copy_gic_settings(void); void ux500_pm_init(u32 phy_base, u32 size); #endif /* ARM_UX500_PM_H */ PK ! ����( ( platform_data/s3c-hsotg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* include/linux/platform_data/s3c-hsotg.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * http://armlinux.simtec.co.uk/ * * S3C USB2.0 High-speed / OtG platform information */ #ifndef __LINUX_USB_S3C_HSOTG_H #define __LINUX_USB_S3C_HSOTG_H struct platform_device; enum dwc2_hsotg_dmamode { S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */ S3C_HSOTG_DMA_ONLY, /* always use DMA */ S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ }; /** * struct dwc2_hsotg_plat - platform data for high-speed otg/udc * @dma: Whether to use DMA or not. * @is_osc: The clock source is an oscillator, not a crystal */ struct dwc2_hsotg_plat { enum dwc2_hsotg_dmamode dma; unsigned int is_osc:1; int phy_type; int (*phy_init)(struct platform_device *pdev, int type); int (*phy_exit)(struct platform_device *pdev, int type); }; extern void dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd); #endif /* __LINUX_USB_S3C_HSOTG_H */ PK ! � platform_data/edma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * TI EDMA definitions * * Copyright (C) 2006-2013 Texas Instruments. */ /* * This EDMA3 programming framework exposes two basic kinds of resource: * * Channel Triggers transfers, usually from a hardware event but * also manually or by "chaining" from DMA completions. * Each channel is coupled to a Parameter RAM (PaRAM) slot. * * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM * "set"), source and destination addresses, a link to a * next PaRAM slot (if any), options for the transfer, and * instructions for updating those addresses. There are * more than twice as many slots as event channels. * * Each PaRAM set describes a sequence of transfers, either for one large * buffer or for several discontiguous smaller buffers. An EDMA transfer * is driven only from a channel, which performs the transfers specified * in its PaRAM slot until there are no more transfers. When that last * transfer completes, the "link" field may be used to reload the channel's * PaRAM slot with a new transfer descriptor. * * The EDMA Channel Controller (CC) maps requests from channels into physical * Transfer Controller (TC) requests when the channel triggers (by hardware * or software events, or by chaining). The two physical DMA channels provided * by the TCs are thus shared by many logical channels. * * DaVinci hardware also has a "QDMA" mechanism which is not currently * supported through this interface. (DSP firmware uses it though.) */ #ifndef EDMA_H_ #define EDMA_H_ enum dma_event_q { EVENTQ_0 = 0, EVENTQ_1 = 1, EVENTQ_2 = 2, EVENTQ_3 = 3, EVENTQ_DEFAULT = -1 }; #define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan)) #define EDMA_CTLR(i) ((i) >> 16) #define EDMA_CHAN_SLOT(i) ((i) & 0xffff) #define EDMA_FILTER_PARAM(ctlr, chan) ((int[]) { EDMA_CTLR_CHAN(ctlr, chan) }) struct edma_rsv_info { const s16 (*rsv_chans)[2]; const s16 (*rsv_slots)[2]; }; struct dma_slave_map; /* platform_data for EDMA driver */ struct edma_soc_info { /* * Default queue is expected to be a low-priority queue. * This way, long transfers on the default queue started * by the codec engine will not cause audio defects. */ enum dma_event_q default_queue; /* Resource reservation for other cores */ struct edma_rsv_info *rsv; /* List of channels allocated for memcpy, terminated with -1 */ s32 *memcpy_channels; s8 (*queue_priority_mapping)[2]; const s16 (*xbar_chans)[2]; const struct dma_slave_map *slave_map; int slavecnt; }; #endif PK ! va�� platform_data/uio_dmem_genirq.hnu �[��� /* * include/linux/platform_data/uio_dmem_genirq.h * * Copyright (C) 2012 Damian Hobson-Garcia * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _UIO_DMEM_GENIRQ_H #define _UIO_DMEM_GENIRQ_H #include <linux/uio_driver.h> struct uio_dmem_genirq_pdata { struct uio_info uioinfo; unsigned int *dynamic_region_sizes; unsigned int num_dynamic_regions; }; #endif /* _UIO_DMEM_GENIRQ_H */ PK ! a�� � platform_data/mv_usb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2011 Marvell International Ltd. All rights reserved. */ #ifndef __MV_PLATFORM_USB_H #define __MV_PLATFORM_USB_H enum { MV_USB_MODE_OTG, MV_USB_MODE_HOST, }; enum { VBUS_LOW = 0, VBUS_HIGH = 1 << 0, }; struct mv_usb_addon_irq { unsigned int irq; int (*poll)(void); }; struct mv_usb_platform_data { struct mv_usb_addon_irq *id; /* Only valid for OTG. ID pin change*/ struct mv_usb_addon_irq *vbus; /* valid for OTG/UDC. VBUS change*/ /* only valid for HCD. OTG or Host only*/ unsigned int mode; /* This flag is used for that needs id pin checked by otg */ unsigned int disable_otg_clock_gating:1; /* Force a_bus_req to be asserted */ unsigned int otg_force_a_bus_req:1; int (*phy_init)(void __iomem *regbase); void (*phy_deinit)(void __iomem *regbase); int (*set_vbus)(unsigned int vbus); }; #endif PK ! v�#� � platform_data/serial-sccnxp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * NXP (Philips) SCC+++(SCN+++) serial driver * * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru> * * Based on sc26xx.c, by Thomas Bogendörfer (tsbogend@alpha.franken.de) */ #ifndef _PLATFORM_DATA_SERIAL_SCCNXP_H_ #define _PLATFORM_DATA_SERIAL_SCCNXP_H_ #define SCCNXP_MAX_UARTS 2 /* Output lines */ #define LINE_OP0 1 #define LINE_OP1 2 #define LINE_OP2 3 #define LINE_OP3 4 #define LINE_OP4 5 #define LINE_OP5 6 #define LINE_OP6 7 #define LINE_OP7 8 /* Input lines */ #define LINE_IP0 9 #define LINE_IP1 10 #define LINE_IP2 11 #define LINE_IP3 12 #define LINE_IP4 13 #define LINE_IP5 14 #define LINE_IP6 15 /* Signals */ #define DTR_OP 0 /* DTR */ #define RTS_OP 4 /* RTS */ #define DSR_IP 8 /* DSR */ #define CTS_IP 12 /* CTS */ #define DCD_IP 16 /* DCD */ #define RNG_IP 20 /* RNG */ #define DIR_OP 24 /* Special signal for control RS-485. * Goes high when transmit, * then goes low. */ /* Routing control signal 'sig' to line 'line' */ #define MCTRL_SIG(sig, line) ((line) << (sig)) /* * Example board initialization data: * * static struct resource sc2892_resources[] = { * DEFINE_RES_MEM(UART_PHYS_START, 0x10), * DEFINE_RES_IRQ(IRQ_EXT2), * }; * * static struct sccnxp_pdata sc2892_info = { * .mctrl_cfg[0] = MCTRL_SIG(DIR_OP, LINE_OP0), * .mctrl_cfg[1] = MCTRL_SIG(DIR_OP, LINE_OP1), * }; * * static struct platform_device sc2892 = { * .name = "sc2892", * .id = -1, * .resource = sc2892_resources, * .num_resources = ARRAY_SIZE(sc2892_resources), * .dev = { * .platform_data = &sc2892_info, * }, * }; */ /* SCCNXP platform data structure */ struct sccnxp_pdata { /* Shift for A0 line */ const u8 reg_shift; /* Modem control lines configuration */ const u32 mctrl_cfg[SCCNXP_MAX_UARTS]; /* Timer value for polling mode (usecs) */ const unsigned int poll_time_us; }; #endif PK ! $]�| | platform_data/gpio-htc-egpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * HTC simple EGPIO irq and gpio extender */ #ifndef __HTC_EGPIO_H__ #define __HTC_EGPIO_H__ /* Descriptive values for all-in or all-out htc_egpio_chip descriptors. */ #define HTC_EGPIO_OUTPUT (~0) #define HTC_EGPIO_INPUT 0 /** * struct htc_egpio_chip - descriptor to create gpio_chip for register range * @reg_start: index of first register * @gpio_base: gpio number of first pin in this register range * @num_gpios: number of gpios in this register range, max BITS_PER_LONG * (number of registers = DIV_ROUND_UP(num_gpios, reg_width)) * @direction: bitfield, '0' = input, '1' = output, */ struct htc_egpio_chip { int reg_start; int gpio_base; int num_gpios; unsigned long direction; unsigned long initial_values; }; /** * struct htc_egpio_platform_data - description provided by the arch * @irq_base: beginning of available IRQs (eg, IRQ_BOARD_START) * @num_irqs: number of irqs * @reg_width: number of bits per register, either 8 or 16 bit * @bus_width: alignment of the registers, either 16 or 32 bit * @invert_acks: set if chip requires writing '0' to ack an irq, instead of '1' * @ack_register: location of the irq/ack register * @chip: pointer to array of htc_egpio_chip descriptors * @num_chips: number of egpio chip descriptors */ struct htc_egpio_platform_data { int bus_width; int reg_width; int irq_base; int num_irqs; int invert_acks; int ack_register; struct htc_egpio_chip *chip; int num_chips; }; #endif PK ! g�ɧ� � platform_data/omapdss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2016 Texas Instruments, Inc. */ #ifndef __OMAPDSS_PDATA_H #define __OMAPDSS_PDATA_H enum omapdss_version { OMAPDSS_VER_UNKNOWN = 0, OMAPDSS_VER_OMAP24xx, OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */ OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */ OMAPDSS_VER_OMAP3630, OMAPDSS_VER_AM35xx, OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */ OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */ OMAPDSS_VER_OMAP4, /* All other OMAP4s */ OMAPDSS_VER_OMAP5, OMAPDSS_VER_AM43xx, OMAPDSS_VER_DRA7xx, }; /* Board specific data */ struct omap_dss_board_info { int (*dsi_enable_pads)(int dsi_id, unsigned int lane_mask); void (*dsi_disable_pads)(int dsi_id, unsigned int lane_mask); int (*set_min_bus_tput)(struct device *dev, unsigned long r); enum omapdss_version version; }; #endif /* __OMAPDSS_PDATA_H */ PK ! � I� � platform_data/i2c-ocores.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * i2c-ocores.h - definitions for the i2c-ocores interface * * Peter Korsgaard <peter@korsgaard.com> */ #ifndef _LINUX_I2C_OCORES_H #define _LINUX_I2C_OCORES_H struct ocores_i2c_platform_data { u32 reg_shift; /* register offset shift value */ u32 reg_io_width; /* register io read/write width */ u32 clock_khz; /* input clock in kHz */ u32 bus_khz; /* bus clock in kHz */ bool big_endian; /* registers are big endian */ u8 num_devices; /* number of devices in the devices list */ struct i2c_board_info const *devices; /* devices connected to the bus */ }; #endif /* _LINUX_I2C_OCORES_H */ PK ! �M�j platform_data/spi-s3c64xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2009 Samsung Electronics Ltd. * Jaswinder Singh <jassi.brar@samsung.com> */ #ifndef __SPI_S3C64XX_H #define __SPI_S3C64XX_H #include <linux/dmaengine.h> struct platform_device; /** * struct s3c64xx_spi_csinfo - ChipSelect description * @fb_delay: Slave specific feedback delay. * Refer to FB_CLK_SEL register definition in SPI chapter. * @line: Custom 'identity' of the CS line. * * This is per SPI-Slave Chipselect information. * Allocate and initialize one in machine init code and make the * spi_board_info.controller_data point to it. */ struct s3c64xx_spi_csinfo { u8 fb_delay; unsigned line; }; /** * struct s3c64xx_spi_info - SPI Controller defining structure * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. * @num_cs: Number of CS this controller emulates. * @cfg_gpio: Configure pins for this SPI controller. */ struct s3c64xx_spi_info { int src_clk_nr; int num_cs; bool no_cs; int (*cfg_gpio)(void); }; /** * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board * initialization code. * @cfg_gpio: Pointer to gpio setup function. * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. * @num_cs: Number of elements in the 'cs' array. * * Call this from machine init code for each SPI Controller that * has some chips attached to it. */ extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, int num_cs); extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, int num_cs); extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, int num_cs); /* defined by architecture to configure gpio */ extern int s3c64xx_spi0_cfg_gpio(void); extern int s3c64xx_spi1_cfg_gpio(void); extern int s3c64xx_spi2_cfg_gpio(void); extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; #endif /*__SPI_S3C64XX_H */ PK ! (��� � platform_data/mmc-esdhc-mcf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PLATFORM_DATA_MCF_ESDHC_H__ #define __LINUX_PLATFORM_DATA_MCF_ESDHC_H__ enum cd_types { ESDHC_CD_NONE, /* no CD, neither controller nor gpio */ ESDHC_CD_CONTROLLER, /* mmc controller internal CD */ ESDHC_CD_PERMANENT, /* no CD, card permanently wired to host */ }; struct mcf_esdhc_platform_data { int max_bus_width; int cd_type; }; #endif /* __LINUX_PLATFORM_DATA_MCF_ESDHC_H__ */ PK ! <��s4 4 platform_data/keypad-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com> */ #ifndef __KEYPAD_OMAP_H #define __KEYPAD_OMAP_H #ifndef CONFIG_ARCH_OMAP1 #warning Please update the board to use matrix-keypad driver #define omap_readw(reg) 0 #define omap_writew(val, reg) do {} while (0) #endif #include <linux/input/matrix_keypad.h> struct omap_kp_platform_data { int rows; int cols; const struct matrix_keymap_data *keymap_data; bool rep; unsigned long delay; bool dbounce; /* specific to OMAP242x*/ unsigned int *row_gpios; unsigned int *col_gpios; }; /* Group (0..3) -- when multiple keys are pressed, only the * keys pressed in the same group are considered as pressed. This is * in order to workaround certain crappy HW designs that produce ghost * keypresses. Two free bits, not used by neither row/col nor keynum, * must be available for use as group bits. The below GROUP_SHIFT * macro definition is based on some prior knowledge of the * matrix_keypad defined KEY() macro internals. */ #define GROUP_SHIFT 14 #define GROUP_0 (0 << GROUP_SHIFT) #define GROUP_1 (1 << GROUP_SHIFT) #define GROUP_2 (2 << GROUP_SHIFT) #define GROUP_3 (3 << GROUP_SHIFT) #define GROUP_MASK GROUP_3 #if KEY_MAX & GROUP_MASK #error Group bits in conflict with keynum bits #endif #endif PK ! �G�� platform_data/ad7793.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD7792/AD7793 SPI ADC driver * * Copyright 2011 Analog Devices Inc. */ #ifndef __LINUX_PLATFORM_DATA_AD7793_H__ #define __LINUX_PLATFORM_DATA_AD7793_H__ /** * enum ad7793_clock_source - AD7793 clock source selection * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin. * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin. * @AD7793_CLK_SRC_EXT: Use external clock. * @AD7793_CLK_SRC_EXT_DIV2: Use external clock divided by 2. */ enum ad7793_clock_source { AD7793_CLK_SRC_INT, AD7793_CLK_SRC_INT_CO, AD7793_CLK_SRC_EXT, AD7793_CLK_SRC_EXT_DIV2, }; /** * enum ad7793_bias_voltage - AD7793 bias voltage selection * @AD7793_BIAS_VOLTAGE_DISABLED: Bias voltage generator disabled * @AD7793_BIAS_VOLTAGE_AIN1: Bias voltage connected to AIN1(-). * @AD7793_BIAS_VOLTAGE_AIN2: Bias voltage connected to AIN2(-). * @AD7793_BIAS_VOLTAGE_AIN3: Bias voltage connected to AIN3(-). * Only valid for AD7795/AD7796. */ enum ad7793_bias_voltage { AD7793_BIAS_VOLTAGE_DISABLED, AD7793_BIAS_VOLTAGE_AIN1, AD7793_BIAS_VOLTAGE_AIN2, AD7793_BIAS_VOLTAGE_AIN3, }; /** * enum ad7793_refsel - AD7793 reference voltage selection * @AD7793_REFSEL_REFIN1: External reference applied between REFIN1(+) * and REFIN1(-). * @AD7793_REFSEL_REFIN2: External reference applied between REFIN2(+) * and REFIN1(-). Only valid for AD7795/AD7796. * @AD7793_REFSEL_INTERNAL: Internal 1.17 V reference. */ enum ad7793_refsel { AD7793_REFSEL_REFIN1 = 0, AD7793_REFSEL_REFIN2 = 1, AD7793_REFSEL_INTERNAL = 2, }; /** * enum ad7793_current_source_direction - AD7793 excitation current direction * @AD7793_IEXEC1_IOUT1_IEXEC2_IOUT2: Current source IEXC1 connected to pin * IOUT1, current source IEXC2 connected to pin IOUT2. * @AD7793_IEXEC1_IOUT2_IEXEC2_IOUT1: Current source IEXC2 connected to pin * IOUT1, current source IEXC1 connected to pin IOUT2. * @AD7793_IEXEC1_IEXEC2_IOUT1: Both current sources connected to pin IOUT1. * Only valid when the current sources are set to 10 uA or 210 uA. * @AD7793_IEXEC1_IEXEC2_IOUT2: Both current sources connected to Pin IOUT2. * Only valid when the current ources are set to 10 uA or 210 uA. */ enum ad7793_current_source_direction { AD7793_IEXEC1_IOUT1_IEXEC2_IOUT2 = 0, AD7793_IEXEC1_IOUT2_IEXEC2_IOUT1 = 1, AD7793_IEXEC1_IEXEC2_IOUT1 = 2, AD7793_IEXEC1_IEXEC2_IOUT2 = 3, }; /** * enum ad7793_excitation_current - AD7793 excitation current selection * @AD7793_IX_DISABLED: Excitation current Disabled. * @AD7793_IX_10uA: Enable 10 micro-ampere excitation current. * @AD7793_IX_210uA: Enable 210 micro-ampere excitation current. * @AD7793_IX_1mA: Enable 1 milli-Ampere excitation current. */ enum ad7793_excitation_current { AD7793_IX_DISABLED = 0, AD7793_IX_10uA = 1, AD7793_IX_210uA = 2, AD7793_IX_1mA = 3, }; /** * struct ad7793_platform_data - AD7793 platform data * @clock_src: Clock source selection * @burnout_current: If set to true the 100nA burnout current is enabled. * @boost_enable: Enable boost for the bias voltage generator. * @buffered: If set to true configure the device for buffered input mode. * @unipolar: If set to true sample in unipolar mode, if set to false sample in * bipolar mode. * @refsel: Reference voltage selection * @bias_voltage: Bias voltage selection * @exitation_current: Excitation current selection * @current_source_direction: Excitation current direction selection */ struct ad7793_platform_data { enum ad7793_clock_source clock_src; bool burnout_current; bool boost_enable; bool buffered; bool unipolar; enum ad7793_refsel refsel; enum ad7793_bias_voltage bias_voltage; enum ad7793_excitation_current exitation_current; enum ad7793_current_source_direction current_source_direction; }; #endif /* IIO_ADC_AD7793_H_ */ PK ! 3��ِ � platform_data/max6697.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * max6697.h * Copyright (c) 2012 Guenter Roeck <linux@roeck-us.net> */ #ifndef MAX6697_H #define MAX6697_H #include <linux/types.h> /* * For all bit masks: * bit 0: local temperature * bit 1..7: remote temperatures */ struct max6697_platform_data { bool smbus_timeout_disable; /* set to disable SMBus timeouts */ bool extended_range_enable; /* set to enable extended temp range */ bool beta_compensation; /* set to enable beta compensation */ u8 alert_mask; /* set bit to 1 to disable alert */ u8 over_temperature_mask; /* set bit to 1 to disable */ u8 resistance_cancellation; /* set bit to 0 to disable * bit mask for MAX6581, * boolean for other chips */ u8 ideality_mask; /* set bit to 0 to disable */ u8 ideality_value; /* transistor ideality as per * MAX6581 datasheet */ }; #endif /* MAX6697_H */ PK ! 8���4 4 platform_data/asoc-ti-mcbsp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Defines for Multi-Channel Buffered Serial Port * * Copyright (C) 2002 RidgeRun, Inc. * Author: Steve Johnson */ #ifndef __ASOC_TI_MCBSP_H #define __ASOC_TI_MCBSP_H #include <linux/spinlock.h> #include <linux/clk.h> /* Platform specific configuration */ struct omap_mcbsp_ops { void (*request)(unsigned int); void (*free)(unsigned int); }; struct omap_mcbsp_platform_data { struct omap_mcbsp_ops *ops; u16 buffer_size; u8 reg_size; u8 reg_step; /* McBSP platform and instance specific features */ bool has_wakeup; /* Wakeup capability */ bool has_ccr; /* Transceiver has configuration control registers */ int (*force_ick_on)(struct clk *clk, bool force_on); }; void omap3_mcbsp_init_pdata_callback(struct omap_mcbsp_platform_data *pdata); #endif PK ! ��_ܵ � platform_data/xtalk-bridge.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * SGI PCI Xtalk Bridge */ #ifndef PLATFORM_DATA_XTALK_BRIDGE_H #define PLATFORM_DATA_XTALK_BRIDGE_H #include <asm/sn/types.h> struct xtalk_bridge_platform_data { struct resource mem; struct resource io; unsigned long bridge_addr; unsigned long intr_addr; unsigned long mem_offset; unsigned long io_offset; nasid_t nasid; int masterwid; }; #endif /* PLATFORM_DATA_XTALK_BRIDGE_H */ PK ! U�,�2 2 platform_data/leds-lm3642.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012 Texas Instruments * * Simple driver for Texas Instruments LM3642 LED driver chip * * Author: G.Shark Jeong <gshark.jeong@gmail.com> * Daniel Jeong <daniel.jeong@ti.com> */ #ifndef __LINUX_LM3642_H #define __LINUX_LM3642_H #define LM3642_NAME "leds-lm3642" enum lm3642_torch_pin_enable { LM3642_TORCH_PIN_DISABLE = 0x00, LM3642_TORCH_PIN_ENABLE = 0x10, }; enum lm3642_strobe_pin_enable { LM3642_STROBE_PIN_DISABLE = 0x00, LM3642_STROBE_PIN_ENABLE = 0x20, }; enum lm3642_tx_pin_enable { LM3642_TX_PIN_DISABLE = 0x00, LM3642_TX_PIN_ENABLE = 0x40, }; struct lm3642_platform_data { enum lm3642_torch_pin_enable torch_pin; enum lm3642_strobe_pin_enable strobe_pin; enum lm3642_tx_pin_enable tx_pin; }; #endif /* __LINUX_LM3642_H */ PK ! ��y platform_data/ti-prm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * TI PRM (Power & Reset Manager) platform data * * Copyright (C) 2019 Texas Instruments, Inc. * * Tero Kristo <t-kristo@ti.com> */ #ifndef _LINUX_PLATFORM_DATA_TI_PRM_H #define _LINUX_PLATFORM_DATA_TI_PRM_H struct clockdomain; struct ti_prm_platform_data { void (*clkdm_deny_idle)(struct clockdomain *clkdm); void (*clkdm_allow_idle)(struct clockdomain *clkdm); struct clockdomain * (*clkdm_lookup)(const char *name); }; #endif /* _LINUX_PLATFORM_DATA_TI_PRM_H */ PK ! &a��b b platform_data/i2c-pxa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * i2c_pxa.h * * Copyright (C) 2002 Intrinsyc Software Inc. */ #ifndef _I2C_PXA_H_ #define _I2C_PXA_H_ struct i2c_pxa_platform_data { unsigned int class; unsigned int use_pio :1; unsigned int fast_mode :1; unsigned int high_mode:1; unsigned char master_code; unsigned long rate; }; #endif PK ! ��T5 5 platform_data/mtd-nand-s3c2410.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - NAND device controller platform_device info */ #ifndef __MTD_NAND_S3C2410_H #define __MTD_NAND_S3C2410_H #include <linux/mtd/rawnand.h> /** * struct s3c2410_nand_set - define a set of one or more nand chips * @flash_bbt: Openmoko u-boot can create a Bad Block Table * Setting this flag will allow the kernel to * look for it at boot time and also skip the NAND * scan. * @options: Default value to set into 'struct nand_chip' options. * @nr_chips: Number of chips in this set * @nr_partitions: Number of partitions pointed to by @partitions * @name: Name of set (optional) * @nr_map: Map for low-layer logical to physical chip numbers (option) * @partitions: The mtd partition list * * define a set of one or more nand chips registered with an unique mtd. Also * allows to pass flag to the underlying NAND layer. 'disable_ecc' will trigger * a warning at boot time. */ struct s3c2410_nand_set { unsigned int flash_bbt:1; unsigned int options; int nr_chips; int nr_partitions; char *name; int *nr_map; struct mtd_partition *partitions; struct device_node *of_node; }; struct s3c2410_platform_nand { /* timing information for controller, all times in nanoseconds */ int tacls; /* time for active CLE/ALE to nWE/nOE */ int twrph0; /* active time for nWE/nOE */ int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */ unsigned int ignore_unset_ecc:1; enum nand_ecc_engine_type engine_type; int nr_sets; struct s3c2410_nand_set *sets; void (*select_chip)(struct s3c2410_nand_set *, int chip); }; /** * s3c_nand_set_platdata() - register NAND platform data. * @nand: The NAND platform data to register with s3c_device_nand. * * This function copies the given NAND platform data, @nand and registers * it with the s3c_device_nand. This allows @nand to be __initdata. */ extern void s3c_nand_set_platdata(struct s3c2410_platform_nand *nand); #endif /*__MTD_NAND_S3C2410_H */ PK ! ���K K platform_data/asoc-s3c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2009 Samsung Electronics Co. Ltd * Author: Jaswinder Singh <jassi.brar@samsung.com> */ /* The machine init code calls s3c*_ac97_setup_gpio with * one of these defines in order to select appropriate bank * of GPIO for AC97 pins */ #define S3C64XX_AC97_GPD 0 #define S3C64XX_AC97_GPE 1 #include <linux/dmaengine.h> extern void s3c64xx_ac97_setup_gpio(int); struct samsung_i2s_type { /* If the Primary DAI has 5.1 Channels */ #define QUIRK_PRI_6CHAN (1 << 0) /* If the I2S block has a Stereo Overlay Channel */ #define QUIRK_SEC_DAI (1 << 1) /* * If the I2S block has no internal prescalar or MUX (I2SMOD[10] bit) * The Machine driver must provide suitably set clock to the I2S block. */ #define QUIRK_NO_MUXPSR (1 << 2) #define QUIRK_NEED_RSTCLR (1 << 3) #define QUIRK_SUPPORTS_TDM (1 << 4) #define QUIRK_SUPPORTS_IDMA (1 << 5) /* Quirks of the I2S controller */ u32 quirks; dma_addr_t idma_addr; }; /** * struct s3c_audio_pdata - common platform data for audio device drivers * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode */ struct s3c_audio_pdata { int (*cfg_gpio)(struct platform_device *); dma_filter_fn dma_filter; void *dma_playback; void *dma_capture; void *dma_play_sec; void *dma_capture_mic; struct samsung_i2s_type type; }; PK ! F�h� � platform_data/simplefb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * simplefb.h - Simple Framebuffer Device * * Copyright (C) 2013 David Herrmann <dh.herrmann@gmail.com> */ #ifndef __PLATFORM_DATA_SIMPLEFB_H__ #define __PLATFORM_DATA_SIMPLEFB_H__ #include <drm/drm_fourcc.h> #include <linux/fb.h> #include <linux/types.h> /* format array, use it to initialize a "struct simplefb_format" array */ #define SIMPLEFB_FORMATS \ { \ { "r5g6b5", 16, {11, 5}, {5, 6}, {0, 5}, {0, 0}, DRM_FORMAT_RGB565 }, \ { "r5g5b5a1", 16, {11, 5}, {6, 5}, {1, 5}, {0, 1}, DRM_FORMAT_RGBA5551 }, \ { "x1r5g5b5", 16, {10, 5}, {5, 5}, {0, 5}, {0, 0}, DRM_FORMAT_XRGB1555 }, \ { "a1r5g5b5", 16, {10, 5}, {5, 5}, {0, 5}, {15, 1}, DRM_FORMAT_ARGB1555 }, \ { "r8g8b8", 24, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_RGB888 }, \ { "x8r8g8b8", 32, {16, 8}, {8, 8}, {0, 8}, {0, 0}, DRM_FORMAT_XRGB8888 }, \ { "a8r8g8b8", 32, {16, 8}, {8, 8}, {0, 8}, {24, 8}, DRM_FORMAT_ARGB8888 }, \ { "a8b8g8r8", 32, {0, 8}, {8, 8}, {16, 8}, {24, 8}, DRM_FORMAT_ABGR8888 }, \ { "x2r10g10b10", 32, {20, 10}, {10, 10}, {0, 10}, {0, 0}, DRM_FORMAT_XRGB2101010 }, \ { "a2r10g10b10", 32, {20, 10}, {10, 10}, {0, 10}, {30, 2}, DRM_FORMAT_ARGB2101010 }, \ } /* * Data-Format for Simple-Framebuffers * @name: unique 0-terminated name that can be used to identify the mode * @red,green,blue: Offsets and sizes of the single RGB parts * @transp: Offset and size of the alpha bits. length=0 means no alpha * @fourcc: 32bit DRM four-CC code (see drm_fourcc.h) */ struct simplefb_format { const char *name; u32 bits_per_pixel; struct fb_bitfield red; struct fb_bitfield green; struct fb_bitfield blue; struct fb_bitfield transp; u32 fourcc; }; /* * Simple-Framebuffer description * If the arch-boot code creates simple-framebuffers without DT support, it * can pass the width, height, stride and format via this platform-data object. * The framebuffer location must be given as IORESOURCE_MEM resource. * @format must be a format as described in "struct simplefb_format" above. */ struct simplefb_platform_data { u32 width; u32 height; u32 stride; const char *format; }; #endif /* __PLATFORM_DATA_SIMPLEFB_H__ */ PK ! y_��� � platform_data/asoc-kirkwood.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLAT_AUDIO_H #define __PLAT_AUDIO_H struct kirkwood_asoc_platform_data { int burst; }; #endif PK ! woKI I platform_data/dma-dw.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Driver for the Synopsys DesignWare DMA Controller * * Copyright (C) 2007 Atmel Corporation * Copyright (C) 2010-2011 ST Microelectronics */ #ifndef _PLATFORM_DATA_DMA_DW_H #define _PLATFORM_DATA_DMA_DW_H #include <linux/bits.h> #include <linux/types.h> #define DW_DMA_MAX_NR_MASTERS 4 #define DW_DMA_MAX_NR_CHANNELS 8 #define DW_DMA_MIN_BURST 1 #define DW_DMA_MAX_BURST 256 struct device; /** * struct dw_dma_slave - Controller-specific information about a slave * * @dma_dev: required DMA master device * @src_id: src request line * @dst_id: dst request line * @m_master: memory master for transfers on allocated channel * @p_master: peripheral master for transfers on allocated channel * @channels: mask of the channels permitted for allocation (zero value means any) * @hs_polarity:set active low polarity of handshake interface */ struct dw_dma_slave { struct device *dma_dev; u8 src_id; u8 dst_id; u8 m_master; u8 p_master; u8 channels; bool hs_polarity; }; /** * struct dw_dma_platform_data - Controller configuration parameters * @nr_masters: Number of AHB masters supported by the controller * @nr_channels: Number of channels supported by hardware (max 8) * @chan_allocation_order: Allocate channels starting from 0 or 7 * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0. * @block_size: Maximum block size supported by the controller * @data_width: Maximum data width supported by hardware per AHB master * (in bytes, power of 2) * @multi_block: Multi block transfers supported by hardware per channel. * @max_burst: Maximum value of burst transaction size supported by hardware * per channel (in units of CTL.SRC_TR_WIDTH/CTL.DST_TR_WIDTH). * @protctl: Protection control signals setting per channel. * @quirks: Optional platform quirks. */ struct dw_dma_platform_data { u32 nr_masters; u32 nr_channels; #define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */ #define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */ u32 chan_allocation_order; #define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */ #define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */ u32 chan_priority; u32 block_size; u32 data_width[DW_DMA_MAX_NR_MASTERS]; u32 multi_block[DW_DMA_MAX_NR_CHANNELS]; u32 max_burst[DW_DMA_MAX_NR_CHANNELS]; #define CHAN_PROTCTL_PRIVILEGED BIT(0) #define CHAN_PROTCTL_BUFFERABLE BIT(1) #define CHAN_PROTCTL_CACHEABLE BIT(2) #define CHAN_PROTCTL_MASK GENMASK(2, 0) u32 protctl; #define DW_DMA_QUIRK_XBAR_PRESENT BIT(0) u32 quirks; }; #endif /* _PLATFORM_DATA_DMA_DW_H */ PK ! �� platform_data/mtd-orion_nand.hnu �[��� /* * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __MTD_ORION_NAND_H #define __MTD_ORION_NAND_H /* * Device bus NAND private data */ struct orion_nand_data { struct mtd_partition *parts; u32 nr_parts; u8 ale; /* address line number connected to ALE */ u8 cle; /* address line number connected to CLE */ u8 width; /* buswidth */ u8 chip_delay; }; #endif PK ! +�L� � platform_data/microchip-ksz.hnu �[��� /* * Microchip KSZ series switch platform data * * Copyright (C) 2017 * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef __MICROCHIP_KSZ_H #define __MICROCHIP_KSZ_H #include <linux/types.h> struct ksz_platform_data { u32 chip_id; u16 enabled_ports; }; #endif PK ! ��=� � platform_data/lm3630a_bl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Simple driver for Texas Instruments LM3630A LED Flash driver chip * Copyright (C) 2012 Texas Instruments */ #ifndef __LINUX_LM3630A_H #define __LINUX_LM3630A_H #define LM3630A_NAME "lm3630a_bl" enum lm3630a_pwm_ctrl { LM3630A_PWM_DISABLE = 0x00, LM3630A_PWM_BANK_A, LM3630A_PWM_BANK_B, LM3630A_PWM_BANK_ALL, LM3630A_PWM_BANK_A_ACT_LOW = 0x05, LM3630A_PWM_BANK_B_ACT_LOW, LM3630A_PWM_BANK_ALL_ACT_LOW, }; enum lm3630a_leda_ctrl { LM3630A_LEDA_DISABLE = 0x00, LM3630A_LEDA_ENABLE = 0x04, LM3630A_LEDA_ENABLE_LINEAR = 0x14, }; enum lm3630a_ledb_ctrl { LM3630A_LEDB_DISABLE = 0x00, LM3630A_LEDB_ON_A = 0x01, LM3630A_LEDB_ENABLE = 0x02, LM3630A_LEDB_ENABLE_LINEAR = 0x0A, }; #define LM3630A_MAX_BRIGHTNESS 255 /* *@leda_label : optional led a label. *@leda_init_brt : led a init brightness. 4~255 *@leda_max_brt : led a max brightness. 4~255 *@leda_ctrl : led a disable, enable linear, enable exponential *@ledb_label : optional led b label. *@ledb_init_brt : led b init brightness. 4~255 *@ledb_max_brt : led b max brightness. 4~255 *@ledb_ctrl : led b disable, enable linear, enable exponential *@pwm_period : pwm period *@pwm_ctrl : pwm disable, bank a or b, active high or low */ struct lm3630a_platform_data { /* led a config. */ const char *leda_label; int leda_init_brt; int leda_max_brt; enum lm3630a_leda_ctrl leda_ctrl; /* led b config. */ const char *ledb_label; int ledb_init_brt; int ledb_max_brt; enum lm3630a_ledb_ctrl ledb_ctrl; /* pwm config. */ unsigned int pwm_period; enum lm3630a_pwm_ctrl pwm_ctrl; }; #endif /* __LINUX_LM3630A_H */ PK ! �O�_= = platform_data/max732x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_I2C_MAX732X_H #define __LINUX_I2C_MAX732X_H /* platform data for the MAX732x 8/16-bit I/O expander driver */ struct max732x_platform_data { /* number of the first GPIO */ unsigned gpio_base; /* interrupt base */ int irq_base; void *context; /* param to setup/teardown */ int (*setup)(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *context); int (*teardown)(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *context); }; #endif /* __LINUX_I2C_MAX732X_H */ PK ! �|��g g platform_data/max197.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Maxim MAX197 A/D Converter Driver * * Copyright (c) 2012 Savoir-faire Linux Inc. * Vivien Didelot <vivien.didelot@savoirfairelinux.com> * * For further information, see the Documentation/hwmon/max197.rst file. */ #ifndef _PDATA_MAX197_H #define _PDATA_MAX197_H /** * struct max197_platform_data - MAX197 connectivity info * @convert: Function used to start a conversion with control byte ctrl. * It must return the raw data, or a negative error code. */ struct max197_platform_data { int (*convert)(u8 ctrl); }; #endif /* _PDATA_MAX197_H */ PK ! ��c�9 9 platform_data/ux500_wdt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST Ericsson SA 2011 * * STE Ux500 Watchdog platform data */ #ifndef __UX500_WDT_H #define __UX500_WDT_H /** * struct ux500_wdt_data */ struct ux500_wdt_data { unsigned int timeout; bool has_28_bits_resolution; }; #endif /* __UX500_WDT_H */ PK ! Y t platform_data/dma-ste-dma40.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2007-2010 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson */ #ifndef STE_DMA40_H #define STE_DMA40_H #include <linux/dmaengine.h> #include <linux/scatterlist.h> #include <linux/workqueue.h> #include <linux/interrupt.h> /* * Maxium size for a single dma descriptor * Size is limited to 16 bits. * Size is in the units of addr-widths (1,2,4,8 bytes) * Larger transfers will be split up to multiple linked desc */ #define STEDMA40_MAX_SEG_SIZE 0xFFFF /* dev types for memcpy */ #define STEDMA40_DEV_DST_MEMORY (-1) #define STEDMA40_DEV_SRC_MEMORY (-1) enum stedma40_mode { STEDMA40_MODE_LOGICAL = 0, STEDMA40_MODE_PHYSICAL, STEDMA40_MODE_OPERATION, }; enum stedma40_mode_opt { STEDMA40_PCHAN_BASIC_MODE = 0, STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0, STEDMA40_PCHAN_MODULO_MODE, STEDMA40_PCHAN_DOUBLE_DST_MODE, STEDMA40_LCHAN_SRC_PHY_DST_LOG, STEDMA40_LCHAN_SRC_LOG_DST_PHY, }; #define STEDMA40_ESIZE_8_BIT 0x0 #define STEDMA40_ESIZE_16_BIT 0x1 #define STEDMA40_ESIZE_32_BIT 0x2 #define STEDMA40_ESIZE_64_BIT 0x3 /* The value 4 indicates that PEN-reg shall be set to 0 */ #define STEDMA40_PSIZE_PHY_1 0x4 #define STEDMA40_PSIZE_PHY_2 0x0 #define STEDMA40_PSIZE_PHY_4 0x1 #define STEDMA40_PSIZE_PHY_8 0x2 #define STEDMA40_PSIZE_PHY_16 0x3 /* * The number of elements differ in logical and * physical mode */ #define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2 #define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4 #define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 #define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 /* Maximum number of possible physical channels */ #define STEDMA40_MAX_PHYS 32 enum stedma40_flow_ctrl { STEDMA40_NO_FLOW_CTRL, STEDMA40_FLOW_CTRL, }; /** * struct stedma40_half_channel_info - dst/src channel configuration * * @big_endian: true if the src/dst should be read as big endian * @data_width: Data width of the src/dst hardware * @p_size: Burst size * @flow_ctrl: Flow control on/off. */ struct stedma40_half_channel_info { bool big_endian; enum dma_slave_buswidth data_width; int psize; enum stedma40_flow_ctrl flow_ctrl; }; /** * struct stedma40_chan_cfg - Structure to be filled by client drivers. * * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH * @high_priority: true if high-priority * @realtime: true if realtime mode is to be enabled. Only available on DMA40 * version 3+, i.e DB8500v2+ * @mode: channel mode: physical, logical, or operation * @mode_opt: options for the chosen channel mode * @dev_type: src/dst device type (driver uses dir to figure out which) * @src_info: Parameters for dst half channel * @dst_info: Parameters for dst half channel * @use_fixed_channel: if true, use physical channel specified by phy_channel * @phy_channel: physical channel to use, only if use_fixed_channel is true * * This structure has to be filled by the client drivers. * It is recommended to do all dma configurations for clients in the machine. * */ struct stedma40_chan_cfg { enum dma_transfer_direction dir; bool high_priority; bool realtime; enum stedma40_mode mode; enum stedma40_mode_opt mode_opt; int dev_type; struct stedma40_half_channel_info src_info; struct stedma40_half_channel_info dst_info; bool use_fixed_channel; int phy_channel; }; /** * struct stedma40_platform_data - Configuration struct for the dma device. * * @dev_tx: mapping between destination event line and io address * @dev_rx: mapping between source event line and io address * @disabled_channels: A vector, ending with -1, that marks physical channels * that are for different reasons not available for the driver. * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW * which avoids HW bug that exists in some versions of the controller. * SoftLLI introduces relink overhead that could impact performace for * certain use cases. * @num_of_soft_lli_chans: The number of channels that needs to be configured * to use SoftLLI. * @use_esram_lcla: flag for mapping the lcla into esram region * @num_of_memcpy_chans: The number of channels reserved for memcpy. * @num_of_phy_chans: The number of physical channels implemented in HW. * 0 means reading the number of channels from DMA HW but this is only valid * for 'multiple of 4' channels, like 8. */ struct stedma40_platform_data { int disabled_channels[STEDMA40_MAX_PHYS]; int *soft_lli_chans; int num_of_soft_lli_chans; bool use_esram_lcla; int num_of_memcpy_chans; int num_of_phy_chans; }; #ifdef CONFIG_STE_DMA40 /** * stedma40_filter() - Provides stedma40_chan_cfg to the * ste_dma40 dma driver via the dmaengine framework. * does some checking of what's provided. * * Never directly called by client. It used by dmaengine. * @chan: dmaengine handle. * @data: Must be of type: struct stedma40_chan_cfg and is * the configuration of the framework. * * */ bool stedma40_filter(struct dma_chan *chan, void *data); /** * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave * (=device) * * @chan: dmaengine handle * @addr: source or destination physicall address. * @size: bytes to transfer * @direction: direction of transfer * @flags: is actually enum dma_ctrl_flags. See dmaengine.h */ static inline struct dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, dma_addr_t addr, unsigned int size, enum dma_transfer_direction direction, unsigned long flags) { struct scatterlist sg; sg_init_table(&sg, 1); sg.dma_address = addr; sg.length = size; return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags); } #else static inline bool stedma40_filter(struct dma_chan *chan, void *data) { return false; } static inline struct dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, dma_addr_t addr, unsigned int size, enum dma_transfer_direction direction, unsigned long flags) { return NULL; } #endif #endif PK ! ���2� � platform_data/irda-pxaficp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef ASMARM_ARCH_IRDA_H #define ASMARM_ARCH_IRDA_H /* board specific transceiver capabilities */ #define IR_OFF 1 #define IR_SIRMODE 2 #define IR_FIRMODE 4 struct pxaficp_platform_data { int transceiver_cap; void (*transceiver_mode)(struct device *dev, int mode); int (*startup)(struct device *dev); void (*shutdown)(struct device *dev); int gpio_pwdown; /* powerdown GPIO for the IrDA chip */ bool gpio_pwdown_inverted; /* gpio_pwdown is inverted */ }; extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); #if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) void pxa2xx_transceiver_mode(struct device *dev, int mode); #endif #endif PK ! U"�t� � platform_data/pxa2xx_udc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This supports machine-specific differences in how the PXA2xx * USB Device Controller (UDC) is wired. * * It is set in linux/arch/arm/mach-pxa/<machine>.c or in * linux/arch/mach-ixp4xx/<machine>.c and used in * the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c */ #ifndef PXA2XX_UDC_H #define PXA2XX_UDC_H struct pxa2xx_udc_mach_info { int (*udc_is_connected)(void); /* do we see host? */ void (*udc_command)(int cmd); #define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */ #define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */ /* Boards following the design guidelines in the developer's manual, * with on-chip GPIOs not Lubbock's weird hardware, can have a sane * VBUS IRQ and omit the methods above. Store the GPIO number * here. Note that sometimes the signals go through inverters... */ bool gpio_pullup_inverted; int gpio_pullup; /* high == pullup activated */ }; #endif PK ! �VӴ � platform_data/tsl2563.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_TSL2563_H #define __LINUX_TSL2563_H struct tsl2563_platform_data { int cover_comp_gain; }; #endif /* __LINUX_TSL2563_H */ PK ! I��1� � platform_data/lm8323.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * lm8323.h - Configuration for LM8323 keypad driver. */ #ifndef __LINUX_LM8323_H #define __LINUX_LM8323_H #include <linux/types.h> /* * Largest keycode that the chip can send, plus one, * so keys can be mapped directly at the index of the * LM8323 keycode instead of subtracting one. */ #define LM8323_KEYMAP_SIZE (0x7f + 1) #define LM8323_NUM_PWMS 3 struct lm8323_platform_data { int debounce_time; /* Time to watch for key bouncing, in ms. */ int active_time; /* Idle time until sleep, in ms. */ int size_x; int size_y; bool repeat; const unsigned short *keymap; const char *pwm_names[LM8323_NUM_PWMS]; const char *name; /* Device name. */ }; #endif /* __LINUX_LM8323_H */ PK ! a��0 0 platform_data/ata-samsung_cf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2010 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Samsung CF-ATA platform_device info */ #ifndef __ATA_SAMSUNG_CF_H #define __ATA_SAMSUNG_CF_H __FILE__ /** * struct s3c_ide_platdata - S3C IDE driver platform data. * @setup_gpio: Setup the external GPIO pins to the right state for data * transfer in true-ide mode. */ struct s3c_ide_platdata { void (*setup_gpio)(void); }; /* * s3c_ide_set_platdata() - Setup the platform specifc data for IDE driver. * @pdata: Platform data for IDE driver. */ extern void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata); /* architecture-specific IDE configuration */ extern void s3c64xx_ide_setup_gpio(void); extern void s5pv210_ide_setup_gpio(void); #endif /*__ATA_SAMSUNG_CF_H */ PK ! ��� platform_data/crypto-ux500.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2011 * * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson */ #ifndef _CRYPTO_UX500_H #define _CRYPTO_UX500_H #include <linux/dmaengine.h> #include <linux/platform_data/dma-ste-dma40.h> struct hash_platform_data { void *mem_to_engine; bool (*dma_filter)(struct dma_chan *chan, void *filter_param); }; struct cryp_platform_data { struct stedma40_chan_cfg mem_to_engine; struct stedma40_chan_cfg engine_to_mem; }; #endif PK ! ��rV� � platform_data/rtc-ds2404.hnu �[��� /* * ds2404.h - platform data structure for the DS2404 RTC. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2012 Sven Schnelle <svens@stackframe.org> */ #ifndef __LINUX_DS2404_H #define __LINUX_DS2404_H struct ds2404_platform_data { unsigned int gpio_rst; unsigned int gpio_clk; unsigned int gpio_dq; }; #endif PK ! ę�p� � platform_data/mv88e6xxx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __DSA_MV88E6XXX_H #define __DSA_MV88E6XXX_H #include <linux/platform_data/dsa.h> struct dsa_mv88e6xxx_pdata { /* Must be first, such that dsa_register_switch() can access this * without gory pointer manipulations */ struct dsa_chip_data cd; const char *compatible; unsigned int enabled_ports; struct net_device *netdev; u32 eeprom_len; int irq; }; #endif PK ! y� � platform_data/net-cw1200.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2011 * * Author: Dmitry Tarnyagin <dmitry.tarnyagin@stericsson.com> */ #ifndef CW1200_PLAT_H_INCLUDED #define CW1200_PLAT_H_INCLUDED struct cw1200_platform_data_spi { u8 spi_bits_per_word; /* REQUIRED */ u16 ref_clk; /* REQUIRED (in KHz) */ /* All others are optional */ bool have_5ghz; int reset; /* GPIO to RSTn signal (0 disables) */ int powerup; /* GPIO to POWERUP signal (0 disables) */ int (*power_ctrl)(const struct cw1200_platform_data_spi *pdata, bool enable); /* Control 3v3 / 1v8 supply */ int (*clk_ctrl)(const struct cw1200_platform_data_spi *pdata, bool enable); /* Control CLK32K */ const u8 *macaddr; /* if NULL, use cw1200_mac_template module parameter */ const char *sdd_file; /* if NULL, will use default for detected hw type */ }; struct cw1200_platform_data_sdio { u16 ref_clk; /* REQUIRED (in KHz) */ /* All others are optional */ bool have_5ghz; bool no_nptb; /* SDIO hardware does not support non-power-of-2-blocksizes */ int reset; /* GPIO to RSTn signal (0 disables) */ int powerup; /* GPIO to POWERUP signal (0 disables) */ int irq; /* IRQ line or 0 to use SDIO IRQ */ int (*power_ctrl)(const struct cw1200_platform_data_sdio *pdata, bool enable); /* Control 3v3 / 1v8 supply */ int (*clk_ctrl)(const struct cw1200_platform_data_sdio *pdata, bool enable); /* Control CLK32K */ const u8 *macaddr; /* if NULL, use cw1200_mac_template module parameter */ const char *sdd_file; /* if NULL, will use default for detected hw type */ }; /* An example of SPI support in your board setup file: static struct cw1200_platform_data_spi cw1200_platform_data = { .ref_clk = 38400, .spi_bits_per_word = 16, .reset = GPIO_RF_RESET, .powerup = GPIO_RF_POWERUP, .macaddr = wifi_mac_addr, .sdd_file = "sdd_sagrad_1091_1098.bin", }; static struct spi_board_info myboard_spi_devices[] __initdata = { { .modalias = "cw1200_wlan_spi", .max_speed_hz = 52000000, .bus_num = 0, .irq = WIFI_IRQ, .platform_data = &cw1200_platform_data, .chip_select = 0, }, }; */ /* An example of SDIO support in your board setup file: static struct cw1200_platform_data_sdio my_cw1200_platform_data = { .ref_clk = 38400, .have_5ghz = false, .sdd_file = "sdd_myplatform.bin", }; cw1200_sdio_set_platform_data(&my_cw1200_platform_data); */ void __init cw1200_sdio_set_platform_data(struct cw1200_platform_data_sdio *pdata); #endif /* CW1200_PLAT_H_INCLUDED */ PK ! T�su u platform_data/dsa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __DSA_PDATA_H #define __DSA_PDATA_H struct device; struct net_device; #define DSA_MAX_SWITCHES 4 #define DSA_MAX_PORTS 12 #define DSA_RTABLE_NONE -1 struct dsa_chip_data { /* * How to access the switch configuration registers. */ struct device *host_dev; int sw_addr; /* * Reference to network devices */ struct device *netdev[DSA_MAX_PORTS]; /* set to size of eeprom if supported by the switch */ int eeprom_len; /* Device tree node pointer for this specific switch chip * used during switch setup in case additional properties * and resources needs to be used */ struct device_node *of_node; /* * The names of the switch's ports. Use "cpu" to * designate the switch port that the cpu is connected to, * "dsa" to indicate that this port is a DSA link to * another switch, NULL to indicate the port is unused, * or any other string to indicate this is a physical port. */ char *port_names[DSA_MAX_PORTS]; struct device_node *port_dn[DSA_MAX_PORTS]; /* * An array of which element [a] indicates which port on this * switch should be used to send packets to that are destined * for switch a. Can be NULL if there is only one switch chip. */ s8 rtable[DSA_MAX_SWITCHES]; }; struct dsa_platform_data { /* * Reference to a Linux network interface that connects * to the root switch chip of the tree. */ struct device *netdev; struct net_device *of_netdev; /* * Info structs describing each of the switch chips * connected via this network interface. */ int nr_chips; struct dsa_chip_data *chip; }; #endif /* __DSA_PDATA_H */ PK ! oe�� � $ platform_data/hirschmann-hellcreek.hnu �[��� /* SPDX-License-Identifier: (GPL-2.0 or MIT) */ /* * Hirschmann Hellcreek TSN switch platform data. * * Copyright (C) 2020 Linutronix GmbH * Author Kurt Kanzenbach <kurt@linutronix.de> */ #ifndef _HIRSCHMANN_HELLCREEK_H_ #define _HIRSCHMANN_HELLCREEK_H_ #include <linux/types.h> struct hellcreek_platform_data { const char *name; /* Switch name */ int num_ports; /* Amount of switch ports */ int is_100_mbits; /* Is it configured to 100 or 1000 mbit/s */ int qbv_support; /* Qbv support on front TSN ports */ int qbv_on_cpu_port; /* Qbv support on the CPU port */ int qbu_support; /* Qbu support on front TSN ports */ u16 module_id; /* Module identificaton */ }; #endif /* _HIRSCHMANN_HELLCREEK_H_ */ PK ! �Nj�� � platform_data/dma-mmp_tdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * SRAM Memory Management * * Copyright (c) 2011 Marvell Semiconductors Inc. */ #ifndef __DMA_MMP_TDMA_H #define __DMA_MMP_TDMA_H #include <linux/genalloc.h> /* ARBITRARY: SRAM allocations are multiples of this 2^N size */ #define SRAM_GRANULARITY 512 enum sram_type { MMP_SRAM_UNDEFINED = 0, MMP_ASRAM, MMP_ISRAM, }; struct sram_platdata { char *pool_name; int granularity; }; #ifdef CONFIG_MMP_SRAM extern struct gen_pool *sram_get_gpool(char *pool_name); #else static inline struct gen_pool *sram_get_gpool(char *pool_name) { return NULL; } #endif #endif /* __DMA_MMP_TDMA_H */ PK ! B�f� � platform_data/i2c-mux-gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * i2c-mux-gpio interface to platform code * * Peter Korsgaard <peter.korsgaard@barco.com> */ #ifndef _LINUX_I2C_MUX_GPIO_H #define _LINUX_I2C_MUX_GPIO_H /* MUX has no specific idle mode */ #define I2C_MUX_GPIO_NO_IDLE ((unsigned)-1) /** * struct i2c_mux_gpio_platform_data - Platform-dependent data for i2c-mux-gpio * @parent: Parent I2C bus adapter number * @base_nr: Base I2C bus number to number adapters from or zero for dynamic * @values: Array of bitmasks of GPIO settings (low/high) for each * position * @n_values: Number of multiplexer positions (busses to instantiate) * @classes: Optional I2C auto-detection classes * @idle: Bitmask to write to MUX when idle or GPIO_I2CMUX_NO_IDLE if not used */ struct i2c_mux_gpio_platform_data { int parent; int base_nr; const unsigned *values; int n_values; const unsigned *classes; unsigned idle; }; #endif /* _LINUX_I2C_MUX_GPIO_H */ PK ! 'H� � platform_data/asoc-imx-ssi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __MACH_SSI_H #define __MACH_SSI_H struct snd_ac97; extern unsigned char imx_ssi_fiq_start, imx_ssi_fiq_end; extern unsigned long imx_ssi_fiq_base, imx_ssi_fiq_tx_buffer, imx_ssi_fiq_rx_buffer; struct imx_ssi_platform_data { unsigned int flags; #define IMX_SSI_DMA (1 << 0) #define IMX_SSI_USE_AC97 (1 << 1) #define IMX_SSI_NET (1 << 2) #define IMX_SSI_SYN (1 << 3) #define IMX_SSI_USE_I2S_SLAVE (1 << 4) void (*ac97_reset) (struct snd_ac97 *ac97); void (*ac97_warm_reset)(struct snd_ac97 *ac97); }; extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); #endif /* __MACH_SSI_H */ PK ! ��� < < platform_data/uio_pruss.hnu �[��� /* * include/linux/platform_data/uio_pruss.h * * Platform data for uio_pruss driver * * Copyright (C) 2010-11 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _UIO_PRUSS_H_ #define _UIO_PRUSS_H_ /* To configure the PRUSS INTC base offset for UIO driver */ struct uio_pruss_pdata { u32 pintc_base; struct gen_pool *sram_pool; }; #endif /* _UIO_PRUSS_H_ */ PK ! ��O� � platform_data/timer-ixp4xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __TIMER_IXP4XX_H #define __TIMER_IXP4XX_H #include <linux/ioport.h> void __init ixp4xx_timer_setup(resource_size_t timerbase, int timer_irq, unsigned int timer_freq); #endif PK ! ڠp�� � platform_data/regulator-haptic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Regulator Haptic Platform Data * * Copyright (c) 2014 Samsung Electronics Co., Ltd. * Author: Jaewon Kim <jaewon02.kim@samsung.com> * Author: Hyunhee Kim <hyunhee.kim@samsung.com> */ #ifndef _REGULATOR_HAPTIC_H #define _REGULATOR_HAPTIC_H /* * struct regulator_haptic_data - Platform device data * * @max_volt: maximum voltage value supplied to the haptic motor. * <The unit of the voltage is a micro> * @min_volt: minimum voltage value supplied to the haptic motor. * <The unit of the voltage is a micro> */ struct regulator_haptic_data { unsigned int max_volt; unsigned int min_volt; }; #endif /* _REGULATOR_HAPTIC_H */ PK ! ����� � platform_data/x86/intel-spi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Intel PCH/PCU SPI flash driver. * * Copyright (C) 2016, Intel Corporation * Author: Mika Westerberg <mika.westerberg@linux.intel.com> */ #ifndef INTEL_SPI_PDATA_H #define INTEL_SPI_PDATA_H enum intel_spi_type { INTEL_SPI_BYT = 1, INTEL_SPI_LPT, INTEL_SPI_BXT, INTEL_SPI_CNL, }; /** * struct intel_spi_boardinfo - Board specific data for Intel SPI driver * @type: Type which this controller is compatible with * @set_writeable: Try to make the chip writeable (optional) * @data: Data to be passed to @set_writeable can be %NULL */ struct intel_spi_boardinfo { enum intel_spi_type type; bool (*set_writeable)(void __iomem *base, void *data); void *data; }; #endif /* INTEL_SPI_PDATA_H */ PK ! �<��� � platform_data/x86/apple.hnu �[��� #ifndef PLATFORM_DATA_X86_APPLE_H #define PLATFORM_DATA_X86_APPLE_H #ifdef CONFIG_X86 /** * x86_apple_machine - whether the machine is an x86 Apple Macintosh */ extern bool x86_apple_machine; #else #define x86_apple_machine false #endif #endif PK ! �n�� platform_data/x86/soc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Helpers for Intel SoC model detection * * Copyright (c) 2019, Intel Corporation. */ #ifndef __PLATFORM_DATA_X86_SOC_H #define __PLATFORM_DATA_X86_SOC_H #if IS_ENABLED(CONFIG_X86) #include <asm/cpu_device_id.h> #include <asm/intel-family.h> #define SOC_INTEL_IS_CPU(soc, type) \ static inline bool soc_intel_is_##soc(void) \ { \ static const struct x86_cpu_id soc##_cpu_ids[] = { \ X86_MATCH_INTEL_FAM6_MODEL(type, NULL), \ {} \ }; \ const struct x86_cpu_id *id; \ \ id = x86_match_cpu(soc##_cpu_ids); \ if (id) \ return true; \ return false; \ } SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT); SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT); SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT); SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS); SOC_INTEL_IS_CPU(cml, KABYLAKE_L); #else /* IS_ENABLED(CONFIG_X86) */ static inline bool soc_intel_is_byt(void) { return false; } static inline bool soc_intel_is_cht(void) { return false; } static inline bool soc_intel_is_apl(void) { return false; } static inline bool soc_intel_is_glk(void) { return false; } static inline bool soc_intel_is_cml(void) { return false; } #endif /* IS_ENABLED(CONFIG_X86) */ #endif /* __PLATFORM_DATA_X86_SOC_H */ PK ! ��V� � platform_data/x86/clk-lpss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Intel Low Power Subsystem clocks. * * Copyright (C) 2013, Intel Corporation * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> * Rafael J. Wysocki <rafael.j.wysocki@intel.com> */ #ifndef __CLK_LPSS_H #define __CLK_LPSS_H struct lpss_clk_data { const char *name; struct clk *clk; }; extern int lpss_atom_clk_init(void); #endif /* __CLK_LPSS_H */ PK ! h��� � platform_data/x86/clk-pmc-atom.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Intel Atom platform clocks for BayTrail and CherryTrail SoC. * * Copyright (C) 2016, Intel Corporation * Author: Irina Tirdea <irina.tirdea@intel.com> */ #ifndef __PLATFORM_DATA_X86_CLK_PMC_ATOM_H #define __PLATFORM_DATA_X86_CLK_PMC_ATOM_H /** * struct pmc_clk - PMC platform clock configuration * * @name: identified, typically pmc_plt_clk_<x>, x=[0..5] * @freq: in Hz, 19.2MHz and 25MHz (Baytrail only) supported * @parent_name: one of 'xtal' or 'osc' */ struct pmc_clk { const char *name; unsigned long freq; const char *parent_name; }; /** * struct pmc_clk_data - common PMC clock configuration * * @base: PMC clock register base offset * @clks: pointer to set of registered clocks, typically 0..5 * @critical: flag to indicate if firmware enabled pmc_plt_clks * should be marked as critial or not */ struct pmc_clk_data { void __iomem *base; const struct pmc_clk *clks; bool critical; }; #endif /* __PLATFORM_DATA_X86_CLK_PMC_ATOM_H */ PK ! ˊ�� platform_data/x86/asus-wmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLATFORM_DATA_X86_ASUS_WMI_H #define __PLATFORM_DATA_X86_ASUS_WMI_H #include <linux/errno.h> #include <linux/types.h> /* WMI Methods */ #define ASUS_WMI_METHODID_SPEC 0x43455053 /* BIOS SPECification */ #define ASUS_WMI_METHODID_SFBD 0x44424653 /* Set First Boot Device */ #define ASUS_WMI_METHODID_GLCD 0x44434C47 /* Get LCD status */ #define ASUS_WMI_METHODID_GPID 0x44495047 /* Get Panel ID?? (Resol) */ #define ASUS_WMI_METHODID_QMOD 0x444F4D51 /* Quiet MODe */ #define ASUS_WMI_METHODID_SPLV 0x4C425053 /* Set Panel Light Value */ #define ASUS_WMI_METHODID_AGFN 0x4E464741 /* Atk Generic FuNction */ #define ASUS_WMI_METHODID_SFUN 0x4E554653 /* FUNCtionalities */ #define ASUS_WMI_METHODID_SDSP 0x50534453 /* Set DiSPlay output */ #define ASUS_WMI_METHODID_GDSP 0x50534447 /* Get DiSPlay output */ #define ASUS_WMI_METHODID_DEVP 0x50564544 /* DEVice Policy */ #define ASUS_WMI_METHODID_OSVR 0x5256534F /* OS VeRsion */ #define ASUS_WMI_METHODID_DCTS 0x53544344 /* Device status (DCTS) */ #define ASUS_WMI_METHODID_DSTS 0x53545344 /* Device status (DSTS) */ #define ASUS_WMI_METHODID_BSTS 0x53545342 /* Bios STatuS ? */ #define ASUS_WMI_METHODID_DEVS 0x53564544 /* DEVice Set */ #define ASUS_WMI_METHODID_CFVS 0x53564643 /* CPU Frequency Volt Set */ #define ASUS_WMI_METHODID_KBFT 0x5446424B /* KeyBoard FilTer */ #define ASUS_WMI_METHODID_INIT 0x54494E49 /* INITialize */ #define ASUS_WMI_METHODID_HKEY 0x59454B48 /* Hot KEY ?? */ #define ASUS_WMI_UNSUPPORTED_METHOD 0xFFFFFFFE /* Wireless */ #define ASUS_WMI_DEVID_HW_SWITCH 0x00010001 #define ASUS_WMI_DEVID_WIRELESS_LED 0x00010002 #define ASUS_WMI_DEVID_CWAP 0x00010003 #define ASUS_WMI_DEVID_WLAN 0x00010011 #define ASUS_WMI_DEVID_WLAN_LED 0x00010012 #define ASUS_WMI_DEVID_BLUETOOTH 0x00010013 #define ASUS_WMI_DEVID_GPS 0x00010015 #define ASUS_WMI_DEVID_WIMAX 0x00010017 #define ASUS_WMI_DEVID_WWAN3G 0x00010019 #define ASUS_WMI_DEVID_UWB 0x00010021 /* Leds */ /* 0x000200XX and 0x000400XX */ #define ASUS_WMI_DEVID_LED1 0x00020011 #define ASUS_WMI_DEVID_LED2 0x00020012 #define ASUS_WMI_DEVID_LED3 0x00020013 #define ASUS_WMI_DEVID_LED4 0x00020014 #define ASUS_WMI_DEVID_LED5 0x00020015 #define ASUS_WMI_DEVID_LED6 0x00020016 /* Backlight and Brightness */ #define ASUS_WMI_DEVID_ALS_ENABLE 0x00050001 /* Ambient Light Sensor */ #define ASUS_WMI_DEVID_BACKLIGHT 0x00050011 #define ASUS_WMI_DEVID_BRIGHTNESS 0x00050012 #define ASUS_WMI_DEVID_KBD_BACKLIGHT 0x00050021 #define ASUS_WMI_DEVID_LIGHT_SENSOR 0x00050022 /* ?? */ #define ASUS_WMI_DEVID_LIGHTBAR 0x00050025 #define ASUS_WMI_DEVID_FAN_BOOST_MODE 0x00110018 #define ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY 0x00120075 /* Misc */ #define ASUS_WMI_DEVID_PANEL_OD 0x00050019 #define ASUS_WMI_DEVID_CAMERA 0x00060013 #define ASUS_WMI_DEVID_LID_FLIP 0x00060062 #define ASUS_WMI_DEVID_LID_FLIP_ROG 0x00060077 /* Storage */ #define ASUS_WMI_DEVID_CARDREADER 0x00080013 /* Input */ #define ASUS_WMI_DEVID_TOUCHPAD 0x00100011 #define ASUS_WMI_DEVID_TOUCHPAD_LED 0x00100012 #define ASUS_WMI_DEVID_FNLOCK 0x00100023 /* Fan, Thermal */ #define ASUS_WMI_DEVID_THERMAL_CTRL 0x00110011 #define ASUS_WMI_DEVID_FAN_CTRL 0x00110012 /* deprecated */ #define ASUS_WMI_DEVID_CPU_FAN_CTRL 0x00110013 /* Power */ #define ASUS_WMI_DEVID_PROCESSOR_STATE 0x00120012 /* Deep S3 / Resume on LID open */ #define ASUS_WMI_DEVID_LID_RESUME 0x00120031 /* Maximum charging percentage */ #define ASUS_WMI_DEVID_RSOC 0x00120057 /* Keyboard dock */ #define ASUS_WMI_DEVID_KBD_DOCK 0x00120063 /* dgpu on/off */ #define ASUS_WMI_DEVID_EGPU 0x00090019 /* dgpu on/off */ #define ASUS_WMI_DEVID_DGPU 0x00090020 /* DSTS masks */ #define ASUS_WMI_DSTS_STATUS_BIT 0x00000001 #define ASUS_WMI_DSTS_UNKNOWN_BIT 0x00000002 #define ASUS_WMI_DSTS_PRESENCE_BIT 0x00010000 #define ASUS_WMI_DSTS_USER_BIT 0x00020000 #define ASUS_WMI_DSTS_BIOS_BIT 0x00040000 #define ASUS_WMI_DSTS_BRIGHTNESS_MASK 0x000000FF #define ASUS_WMI_DSTS_MAX_BRIGTH_MASK 0x0000FF00 #define ASUS_WMI_DSTS_LIGHTBAR_MASK 0x0000000F #if IS_REACHABLE(CONFIG_ASUS_WMI) int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, u32 *retval); #else static inline int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, u32 *retval) { return -ENODEV; } #endif #endif /* __PLATFORM_DATA_X86_ASUS_WMI_H */ PK ! �Ye e platform_data/x86/pmc_atom.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Intel Atom SOC Power Management Controller Header File * Copyright (c) 2014, Intel Corporation. */ #ifndef PMC_ATOM_H #define PMC_ATOM_H #include <linux/bits.h> /* ValleyView Power Control Unit PCI Device ID */ #define PCI_DEVICE_ID_VLV_PMC 0x0F1C /* CherryTrail Power Control Unit PCI Device ID */ #define PCI_DEVICE_ID_CHT_PMC 0x229C /* PMC Memory mapped IO registers */ #define PMC_BASE_ADDR_OFFSET 0x44 #define PMC_BASE_ADDR_MASK 0xFFFFFE00 #define PMC_MMIO_REG_LEN 0x100 #define PMC_REG_BIT_WIDTH 32 /* BIOS uses FUNC_DIS to disable specific function */ #define PMC_FUNC_DIS 0x34 #define PMC_FUNC_DIS_2 0x38 /* CHT specific bits in FUNC_DIS2 register */ #define BIT_FD_GMM BIT(3) #define BIT_FD_ISH BIT(4) /* S0ix wake event control */ #define PMC_S0IX_WAKE_EN 0x3C #define BIT_LPC_CLOCK_RUN BIT(4) #define BIT_SHARED_IRQ_GPSC BIT(5) #define BIT_ORED_DEDICATED_IRQ_GPSS BIT(18) #define BIT_ORED_DEDICATED_IRQ_GPSC BIT(19) #define BIT_SHARED_IRQ_GPSS BIT(20) #define PMC_WAKE_EN_SETTING ~(BIT_LPC_CLOCK_RUN | \ BIT_SHARED_IRQ_GPSC | \ BIT_ORED_DEDICATED_IRQ_GPSS | \ BIT_ORED_DEDICATED_IRQ_GPSC | \ BIT_SHARED_IRQ_GPSS) /* The timers accumulate time spent in sleep state */ #define PMC_S0IR_TMR 0x80 #define PMC_S0I1_TMR 0x84 #define PMC_S0I2_TMR 0x88 #define PMC_S0I3_TMR 0x8C #define PMC_S0_TMR 0x90 /* Sleep state counter is in units of of 32us */ #define PMC_TMR_SHIFT 5 /* Power status of power islands */ #define PMC_PSS 0x98 #define PMC_PSS_BIT_GBE BIT(0) #define PMC_PSS_BIT_SATA BIT(1) #define PMC_PSS_BIT_HDA BIT(2) #define PMC_PSS_BIT_SEC BIT(3) #define PMC_PSS_BIT_PCIE BIT(4) #define PMC_PSS_BIT_LPSS BIT(5) #define PMC_PSS_BIT_LPE BIT(6) #define PMC_PSS_BIT_DFX BIT(7) #define PMC_PSS_BIT_USH_CTRL BIT(8) #define PMC_PSS_BIT_USH_SUS BIT(9) #define PMC_PSS_BIT_USH_VCCS BIT(10) #define PMC_PSS_BIT_USH_VCCA BIT(11) #define PMC_PSS_BIT_OTG_CTRL BIT(12) #define PMC_PSS_BIT_OTG_VCCS BIT(13) #define PMC_PSS_BIT_OTG_VCCA_CLK BIT(14) #define PMC_PSS_BIT_OTG_VCCA BIT(15) #define PMC_PSS_BIT_USB BIT(16) #define PMC_PSS_BIT_USB_SUS BIT(17) /* CHT specific bits in PSS register */ #define PMC_PSS_BIT_CHT_UFS BIT(7) #define PMC_PSS_BIT_CHT_UXD BIT(11) #define PMC_PSS_BIT_CHT_UXD_FD BIT(12) #define PMC_PSS_BIT_CHT_UX_ENG BIT(15) #define PMC_PSS_BIT_CHT_USB_SUS BIT(16) #define PMC_PSS_BIT_CHT_GMM BIT(17) #define PMC_PSS_BIT_CHT_ISH BIT(18) #define PMC_PSS_BIT_CHT_DFX_MASTER BIT(26) #define PMC_PSS_BIT_CHT_DFX_CLUSTER1 BIT(27) #define PMC_PSS_BIT_CHT_DFX_CLUSTER2 BIT(28) #define PMC_PSS_BIT_CHT_DFX_CLUSTER3 BIT(29) #define PMC_PSS_BIT_CHT_DFX_CLUSTER4 BIT(30) #define PMC_PSS_BIT_CHT_DFX_CLUSTER5 BIT(31) /* These registers reflect D3 status of functions */ #define PMC_D3_STS_0 0xA0 #define BIT_LPSS1_F0_DMA BIT(0) #define BIT_LPSS1_F1_PWM1 BIT(1) #define BIT_LPSS1_F2_PWM2 BIT(2) #define BIT_LPSS1_F3_HSUART1 BIT(3) #define BIT_LPSS1_F4_HSUART2 BIT(4) #define BIT_LPSS1_F5_SPI BIT(5) #define BIT_LPSS1_F6_XXX BIT(6) #define BIT_LPSS1_F7_XXX BIT(7) #define BIT_SCC_EMMC BIT(8) #define BIT_SCC_SDIO BIT(9) #define BIT_SCC_SDCARD BIT(10) #define BIT_SCC_MIPI BIT(11) #define BIT_HDA BIT(12) #define BIT_LPE BIT(13) #define BIT_OTG BIT(14) #define BIT_USH BIT(15) #define BIT_GBE BIT(16) #define BIT_SATA BIT(17) #define BIT_USB_EHCI BIT(18) #define BIT_SEC BIT(19) #define BIT_PCIE_PORT0 BIT(20) #define BIT_PCIE_PORT1 BIT(21) #define BIT_PCIE_PORT2 BIT(22) #define BIT_PCIE_PORT3 BIT(23) #define BIT_LPSS2_F0_DMA BIT(24) #define BIT_LPSS2_F1_I2C1 BIT(25) #define BIT_LPSS2_F2_I2C2 BIT(26) #define BIT_LPSS2_F3_I2C3 BIT(27) #define BIT_LPSS2_F4_I2C4 BIT(28) #define BIT_LPSS2_F5_I2C5 BIT(29) #define BIT_LPSS2_F6_I2C6 BIT(30) #define BIT_LPSS2_F7_I2C7 BIT(31) #define PMC_D3_STS_1 0xA4 #define BIT_SMB BIT(0) #define BIT_OTG_SS_PHY BIT(1) #define BIT_USH_SS_PHY BIT(2) #define BIT_DFX BIT(3) /* CHT specific bits in PMC_D3_STS_1 register */ #define BIT_STS_GMM BIT(1) #define BIT_STS_ISH BIT(2) /* PMC I/O Registers */ #define ACPI_BASE_ADDR_OFFSET 0x40 #define ACPI_BASE_ADDR_MASK 0xFFFFFE00 #define ACPI_MMIO_REG_LEN 0x100 #define PM1_CNT 0x4 #define SLEEP_TYPE_MASK GENMASK(12, 10) #define SLEEP_TYPE_S5 0x1C00 #define SLEEP_ENABLE BIT(13) extern int pmc_atom_read(int offset, u32 *value); extern int pmc_atom_write(int offset, u32 value); #endif /* PMC_ATOM_H */ PK ! U�{� � platform_data/lp8755.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * LP8755 High Performance Power Management Unit Driver:System Interface Driver * * Copyright (C) 2012 Texas Instruments * * Author: Daniel(Geon Si) Jeong <daniel.jeong@ti.com> * G.Shark Jeong <gshark.jeong@gmail.com> */ #ifndef _LP8755_H #define _LP8755_H #include <linux/regulator/consumer.h> #define LP8755_NAME "lp8755-regulator" /* *PWR FAULT : power fault detected *OCP : over current protect activated *OVP : over voltage protect activated *TEMP_WARN : thermal warning *TEMP_SHDN : thermal shutdonw detected *I_LOAD : current measured */ #define LP8755_EVENT_PWR_FAULT REGULATOR_EVENT_FAIL #define LP8755_EVENT_OCP REGULATOR_EVENT_OVER_CURRENT #define LP8755_EVENT_OVP 0x10000 #define LP8755_EVENT_TEMP_WARN 0x2000 #define LP8755_EVENT_TEMP_SHDN REGULATOR_EVENT_OVER_TEMP #define LP8755_EVENT_I_LOAD 0x40000 enum lp8755_bucks { LP8755_BUCK0 = 0, LP8755_BUCK1, LP8755_BUCK2, LP8755_BUCK3, LP8755_BUCK4, LP8755_BUCK5, LP8755_BUCK_MAX, }; /** * multiphase configuration options */ enum lp8755_mphase_config { MPHASE_CONF0, MPHASE_CONF1, MPHASE_CONF2, MPHASE_CONF3, MPHASE_CONF4, MPHASE_CONF5, MPHASE_CONF6, MPHASE_CONF7, MPHASE_CONF8, MPHASE_CONF_MAX }; /** * struct lp8755_platform_data * @mphase_type : Multiphase Switcher Configurations. * @buck_data : buck0~6 init voltage in uV */ struct lp8755_platform_data { int mphase; struct regulator_init_data *buck_data[LP8755_BUCK_MAX]; }; #endif PK ! �! �= = platform_data/ad7887.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * AD7887 SPI ADC driver * * Copyright 2010 Analog Devices Inc. */ #ifndef IIO_ADC_AD7887_H_ #define IIO_ADC_AD7887_H_ /** * struct ad7887_platform_data - AD7887 ADC driver platform data * @en_dual: Whether to use dual channel mode. If set to true AIN1 becomes the * second input channel, and Vref is internally connected to Vdd. If set to * false the device is used in single channel mode and AIN1/Vref is used as * VREF input. */ struct ad7887_platform_data { bool en_dual; }; #endif /* IIO_ADC_AD7887_H_ */ PK ! K�cn� � platform_data/i2c-mux-reg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * I2C multiplexer using a single register * * Copyright 2015 Freescale Semiconductor * York Sun <yorksun@freescale.com> */ #ifndef __LINUX_PLATFORM_DATA_I2C_MUX_REG_H #define __LINUX_PLATFORM_DATA_I2C_MUX_REG_H /** * struct i2c_mux_reg_platform_data - Platform-dependent data for i2c-mux-reg * @parent: Parent I2C bus adapter number * @base_nr: Base I2C bus number to number adapters from or zero for dynamic * @values: Array of value for each channel * @n_values: Number of multiplexer channels * @little_endian: Indicating if the register is in little endian * @write_only: Reading the register is not allowed by hardware * @classes: Optional I2C auto-detection classes * @idle: Value to write to mux when idle * @idle_in_use: indicate if idle value is in use * @reg: Virtual address of the register to switch channel * @reg_size: register size in bytes */ struct i2c_mux_reg_platform_data { int parent; int base_nr; const unsigned int *values; int n_values; bool little_endian; bool write_only; const unsigned int *classes; u32 idle; bool idle_in_use; void __iomem *reg; resource_size_t reg_size; }; #endif /* __LINUX_PLATFORM_DATA_I2C_MUX_REG_H */ PK ! S(D� � platform_data/ad5449.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog * Converter driver. * * Copyright 2012 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __LINUX_PLATFORM_DATA_AD5449_H__ #define __LINUX_PLATFORM_DATA_AD5449_H__ /** * enum ad5449_sdo_mode - AD5449 SDO pin configuration * @AD5449_SDO_DRIVE_FULL: Drive the SDO pin with full strength. * @AD5449_SDO_DRIVE_WEAK: Drive the SDO pin with not full strength. * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode. * @AD5449_SDO_DISABLED: Disable the SDO pin, in this mode it is not possible to * read back from the device. */ enum ad5449_sdo_mode { AD5449_SDO_DRIVE_FULL = 0x0, AD5449_SDO_DRIVE_WEAK = 0x1, AD5449_SDO_OPEN_DRAIN = 0x2, AD5449_SDO_DISABLED = 0x3, }; /** * struct ad5449_platform_data - Platform data for the ad5449 DAC driver * @sdo_mode: SDO pin mode * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the * outputs to midscale (true) or to zero scale(false). */ struct ad5449_platform_data { enum ad5449_sdo_mode sdo_mode; bool hardware_clear_to_midscale; }; #endif PK ! �IN�� � platform_data/video-ep93xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __VIDEO_EP93XX_H #define __VIDEO_EP93XX_H struct platform_device; struct fb_info; /* VideoAttributes flags */ #define EP93XXFB_STATE_MACHINE_ENABLE (1 << 0) #define EP93XXFB_PIXEL_CLOCK_ENABLE (1 << 1) #define EP93XXFB_VSYNC_ENABLE (1 << 2) #define EP93XXFB_PIXEL_DATA_ENABLE (1 << 3) #define EP93XXFB_COMPOSITE_SYNC (1 << 4) #define EP93XXFB_SYNC_VERT_HIGH (1 << 5) #define EP93XXFB_SYNC_HORIZ_HIGH (1 << 6) #define EP93XXFB_SYNC_BLANK_HIGH (1 << 7) #define EP93XXFB_PCLK_FALLING (1 << 8) #define EP93XXFB_ENABLE_AC (1 << 9) #define EP93XXFB_ENABLE_LCD (1 << 10) #define EP93XXFB_ENABLE_CCIR (1 << 12) #define EP93XXFB_USE_PARALLEL_INTERFACE (1 << 13) #define EP93XXFB_ENABLE_INTERRUPT (1 << 14) #define EP93XXFB_USB_INTERLACE (1 << 16) #define EP93XXFB_USE_EQUALIZATION (1 << 17) #define EP93XXFB_USE_DOUBLE_HORZ (1 << 18) #define EP93XXFB_USE_DOUBLE_VERT (1 << 19) #define EP93XXFB_USE_BLANK_PIXEL (1 << 20) #define EP93XXFB_USE_SDCSN0 (0 << 21) #define EP93XXFB_USE_SDCSN1 (1 << 21) #define EP93XXFB_USE_SDCSN2 (2 << 21) #define EP93XXFB_USE_SDCSN3 (3 << 21) #define EP93XXFB_ENABLE (EP93XXFB_STATE_MACHINE_ENABLE | \ EP93XXFB_PIXEL_CLOCK_ENABLE | \ EP93XXFB_VSYNC_ENABLE | \ EP93XXFB_PIXEL_DATA_ENABLE) struct ep93xxfb_mach_info { unsigned int flags; int (*setup)(struct platform_device *pdev); void (*teardown)(struct platform_device *pdev); void (*blank)(int blank_mode, struct fb_info *info); }; #endif /* __VIDEO_EP93XX_H */ PK ! v��h h platform_data/sdhci-pic32.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Purna Chandra Mandal, purna.mandal@microchip.com * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. */ #ifndef __PIC32_SDHCI_PDATA_H__ #define __PIC32_SDHCI_PDATA_H__ struct pic32_sdhci_platform_data { /* read & write fifo threshold */ int (*setup_dma)(u32 rfifo, u32 wfifo); }; #endif PK ! l:�� � platform_data/wan_ixp4xx_hss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PLATFORM_DATA_WAN_IXP4XX_HSS_H #define __PLATFORM_DATA_WAN_IXP4XX_HSS_H #include <linux/types.h> /* Information about built-in HSS (synchronous serial) interfaces */ struct hss_plat_info { int (*set_clock)(int port, unsigned int clock_type); int (*open)(int port, void *pdev, void (*set_carrier_cb)(void *pdev, int carrier)); void (*close)(int port, void *pdev); u8 txreadyq; u32 timer_freq; }; #endif PK ! �ޝ<A A platform_data/usb-omap.hnu �[��� /* * usb-omap.h - Platform data for the various OMAP USB IPs * * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com * * This software is distributed under the terms of the GNU General Public * License ("GPL") version 2, as published by the Free Software Foundation. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #define OMAP3_HS_USB_PORTS 3 enum usbhs_omap_port_mode { OMAP_USBHS_PORT_MODE_UNUSED, OMAP_EHCI_PORT_MODE_PHY, OMAP_EHCI_PORT_MODE_TLL, OMAP_EHCI_PORT_MODE_HSIC, OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0, OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM, OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0, OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM, OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0, OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM, OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0, OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM, OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0, OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM }; struct usbtll_omap_platform_data { enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; }; struct ehci_hcd_omap_platform_data { enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; int reset_gpio_port[OMAP3_HS_USB_PORTS]; struct regulator *regulator[OMAP3_HS_USB_PORTS]; unsigned phy_reset:1; }; struct ohci_hcd_omap_platform_data { enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; unsigned es2_compatibility:1; }; struct usbhs_omap_platform_data { int nports; enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; int reset_gpio_port[OMAP3_HS_USB_PORTS]; struct regulator *regulator[OMAP3_HS_USB_PORTS]; struct ehci_hcd_omap_platform_data *ehci_data; struct ohci_hcd_omap_platform_data *ohci_data; /* OMAP3 <= ES2.1 have a single ulpi bypass control bit */ unsigned single_ulpi_bypass:1; unsigned es2_compatibility:1; unsigned phy_reset:1; }; /*-------------------------------------------------------------------------*/ struct omap_musb_board_data { u8 interface_type; u8 mode; u16 power; unsigned extvbus:1; void (*set_phy_power)(u8 on); void (*clear_irq)(void); void (*set_mode)(u8 mode); void (*reset)(void); }; enum musb_interface { MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI }; PK ! Ԗ�:� � platform_data/usb-ehci-orion.hnu �[��� /* * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __USB_EHCI_ORION_H #define __USB_EHCI_ORION_H #include <linux/mbus.h> enum orion_ehci_phy_ver { EHCI_PHY_ORION, EHCI_PHY_DD, EHCI_PHY_KW, EHCI_PHY_NA, }; struct orion_ehci_data { enum orion_ehci_phy_ver phy_version; }; #endif PK ! �p�� � platform_data/isl9305.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * isl9305 - Intersil ISL9305 DCDC regulator * * Copyright 2014 Linaro Ltd * * Author: Mark Brown <broonie@kernel.org> */ #ifndef __ISL9305_H #define __ISL9305_H #define ISL9305_DCD1 0 #define ISL9305_DCD2 1 #define ISL9305_LDO1 2 #define ISL9305_LDO2 3 #define ISL9305_MAX_REGULATOR ISL9305_LDO2 struct regulator_init_data; struct isl9305_pdata { struct regulator_init_data *init_data[ISL9305_MAX_REGULATOR + 1]; }; #endif PK ! �x�x- - platform_data/usb-s3c2410_udc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* arch/arm/plat-samsung/include/plat/udc.h * * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> * * Changelog: * 14-Mar-2005 RTP Created file * 02-Aug-2005 RTP File rename * 07-Sep-2005 BJD Minor cleanups, changed cmd to enum * 18-Jan-2007 HMW Add per-platform vbus_draw function */ #ifndef __ASM_ARM_ARCH_UDC_H #define __ASM_ARM_ARCH_UDC_H enum s3c2410_udc_cmd_e { S3C2410_UDC_P_ENABLE = 1, /* Pull-up enable */ S3C2410_UDC_P_DISABLE = 2, /* Pull-up disable */ S3C2410_UDC_P_RESET = 3, /* UDC reset, in case of */ }; struct s3c2410_udc_mach_info { void (*udc_command)(enum s3c2410_udc_cmd_e); void (*vbus_draw)(unsigned int ma); unsigned int pullup_pin; unsigned int pullup_pin_inverted; unsigned int vbus_pin; unsigned char vbus_pin_inverted; }; extern void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *); struct s3c24xx_hsudc_platdata; extern void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd); #endif /* __ASM_ARM_ARCH_UDC_H */ PK ! �뭶 � platform_data/bh1770glc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * This file is part of the ROHM BH1770GLC / OSRAM SFH7770 sensor driver. * Chip is combined proximity and ambient light sensor. * * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies). * * Contact: Samu Onkalo <samu.p.onkalo@nokia.com> */ #ifndef __BH1770_H__ #define __BH1770_H__ /** * struct bh1770_platform_data - platform data for bh1770glc driver * @led_def_curr: IR led driving current. * @glass_attenuation: Attenuation factor for covering window. * @setup_resources: Call back for interrupt line setup function * @release_resources: Call back for interrupte line release function * * Example of glass attenuation: 16384 * 385 / 100 means attenuation factor * of 3.85. i.e. light_above_sensor = light_above_cover_window / 3.85 */ struct bh1770_platform_data { #define BH1770_LED_5mA 0 #define BH1770_LED_10mA 1 #define BH1770_LED_20mA 2 #define BH1770_LED_50mA 3 #define BH1770_LED_100mA 4 #define BH1770_LED_150mA 5 #define BH1770_LED_200mA 6 __u8 led_def_curr; #define BH1770_NEUTRAL_GA 16384 /* 16384 / 16384 = 1 */ __u32 glass_attenuation; int (*setup_resources)(void); int (*release_resources)(void); }; #endif PK ! �;38. . platform_data/usb-musb-ux500.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2011 * * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com> */ #ifndef __ASM_ARCH_USB_H #define __ASM_ARCH_USB_H #include <linux/dmaengine.h> #define UX500_MUSB_DMA_NUM_RX_TX_CHANNELS 8 struct ux500_musb_board_data { void **dma_rx_param_array; void **dma_tx_param_array; bool (*dma_filter)(struct dma_chan *chan, void *filter_param); }; void ux500_add_usb(struct device *parent, resource_size_t base, int irq, int *dma_rx_cfg, int *dma_tx_cfg); #endif PK ! )X� platform_data/mdio-bcm-unimac.hnu �[��� #ifndef __MDIO_BCM_UNIMAC_PDATA_H #define __MDIO_BCM_UNIMAC_PDATA_H struct unimac_mdio_pdata { u32 phy_mask; int (*wait_func)(void *data); void *wait_func_data; const char *bus_name; }; #define UNIMAC_MDIO_DRV_NAME "unimac-mdio" #endif /* __MDIO_BCM_UNIMAC_PDATA_H */ PK ! �]� platform_data/mfd-mcp-sa11x0.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2005 Russell King. */ #ifndef __MFD_MCP_SA11X0_H #define __MFD_MCP_SA11X0_H #include <linux/types.h> struct mcp_plat_data { u32 mccr0; u32 mccr1; unsigned int sclk_rate; void *codec_pdata; }; #endif PK ! /��̛ � platform_data/irda-sa11x0.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/arm/include/asm/mach/irda.h * * Copyright (C) 2004 Russell King. */ #ifndef __ASM_ARM_MACH_IRDA_H #define __ASM_ARM_MACH_IRDA_H struct irda_platform_data { int (*startup)(struct device *); void (*shutdown)(struct device *); int (*set_power)(struct device *, unsigned int state); void (*set_speed)(struct device *, unsigned int speed); }; #endif PK ! �4� platform_data/clk-fch.hnu �[��� /* SPDX-License-Identifier: MIT */ /* * clock framework for AMD misc clocks * * Copyright 2018 Advanced Micro Devices, Inc. */ #ifndef __CLK_FCH_H #define __CLK_FCH_H #include <linux/compiler.h> struct fch_clk_data { void __iomem *base; u32 is_rv; }; #endif /* __CLK_FCH_H */ PK ! � � � platform_data/emif_plat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Definitions for TI EMIF device platform data * * Copyright (C) 2012 Texas Instruments, Inc. * * Aneesh V <aneesh@ti.com> */ #ifndef __EMIF_PLAT_H #define __EMIF_PLAT_H /* Low power modes - EMIF_PWR_MGMT_CTRL */ #define EMIF_LP_MODE_DISABLE 0 #define EMIF_LP_MODE_CLOCK_STOP 1 #define EMIF_LP_MODE_SELF_REFRESH 2 #define EMIF_LP_MODE_PWR_DN 4 /* Hardware capabilities */ #define EMIF_HW_CAPS_LL_INTERFACE 0x00000001 /* * EMIF IP Revisions * EMIF4D - Used in OMAP4 * EMIF4D5 - Used in OMAP5 */ #define EMIF_4D 1 #define EMIF_4D5 2 /* * PHY types * ATTILAPHY - Used in OMAP4 * INTELLIPHY - Used in OMAP5 */ #define EMIF_PHY_TYPE_ATTILAPHY 1 #define EMIF_PHY_TYPE_INTELLIPHY 2 /* Custom config requests */ #define EMIF_CUSTOM_CONFIG_LPMODE 0x00000001 #define EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL 0x00000002 #define EMIF_CUSTOM_CONFIG_EXTENDED_TEMP_PART 0x00000004 #ifndef __ASSEMBLY__ /** * struct ddr_device_info - All information about the DDR device except AC * timing parameters * @type: Device type (LPDDR2-S4, LPDDR2-S2 etc) * @density: Device density * @io_width: Bus width * @cs1_used: Whether there is a DDR device attached to the second * chip-select(CS1) of this EMIF instance * @cal_resistors_per_cs: Whether there is one calibration resistor per * chip-select or whether it's a single one for both * @manufacturer: Manufacturer name string */ struct ddr_device_info { u32 type; u32 density; u32 io_width; u32 cs1_used; u32 cal_resistors_per_cs; char manufacturer[10]; }; /** * struct emif_custom_configs - Custom configuration parameters/policies * passed from the platform layer * @mask: Mask to indicate which configs are requested * @lpmode: LPMODE to be used in PWR_MGMT_CTRL register * @lpmode_timeout_performance: Timeout before LPMODE entry when higher * performance is desired at the cost of power (typically * at higher OPPs) * @lpmode_timeout_power: Timeout before LPMODE entry when better power * savings is desired and performance is not important * (typically at lower loads indicated by lower OPPs) * @lpmode_freq_threshold: The DDR frequency threshold to identify between * the above two cases: * timeout = (freq >= lpmode_freq_threshold) ? * lpmode_timeout_performance : * lpmode_timeout_power; * @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal * temperature(in milliseconds). When temperature is high * polling is done 4 times as frequently. */ struct emif_custom_configs { u32 mask; u32 lpmode; u32 lpmode_timeout_performance; u32 lpmode_timeout_power; u32 lpmode_freq_threshold; u32 temp_alert_poll_interval_ms; }; /** * struct emif_platform_data - Platform data passed on EMIF platform * device creation. Used by the driver. * @hw_caps: Hw capabilities of the EMIF IP in the respective SoC * @device_info: Device info structure containing information such * as type, bus width, density etc * @timings: Timings information from device datasheet passed * as an array of 'struct lpddr2_timings'. Can be NULL * if if default timings are ok * @timings_arr_size: Size of the timings array. Depends on the number * of different frequencies for which timings data * is provided * @min_tck: Minimum value of some timing parameters in terms * of number of cycles. Can be NULL if default values * are ok * @custom_configs: Custom configurations requested by SoC or board * code and the data for them. Can be NULL if default * configurations done by the driver are ok. See * documentation for 'struct emif_custom_configs' for * more details */ struct emif_platform_data { u32 hw_caps; struct ddr_device_info *device_info; const struct lpddr2_timings *timings; u32 timings_arr_size; const struct lpddr2_min_tck *min_tck; struct emif_custom_configs *custom_configs; u32 ip_rev; u32 phy_type; }; #endif /* __ASSEMBLY__ */ #endif /* __LINUX_EMIF_H */ PK ! M�5� � platform_data/omap-wd-timer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * OMAP2+ WDTIMER-specific function prototypes * * Copyright (C) 2012 Texas Instruments, Inc. * Paul Walmsley */ #ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H #define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H #include <linux/types.h> /* * Standardized OMAP reset source bits * * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h * and are the only ones needed in the watchdog driver. */ #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 /** * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause * * The function pointed to by @read_reset_sources must return its data * in a standard format - search for RST_SRC_ID_SHIFT in * arch/arm/mach-omap2 */ struct omap_wd_timer_platform_data { u32 (*read_reset_sources)(void); }; #endif PK ! ��DOT T platform_data/mmp_audio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MMP Platform AUDIO Management * * Copyright (c) 2011 Marvell Semiconductors Inc. */ #ifndef MMP_AUDIO_H #define MMP_AUDIO_H struct mmp_audio_platdata { u32 period_max_capture; u32 buffer_max_capture; u32 period_max_playback; u32 buffer_max_playback; }; #endif /* MMP_AUDIO_H */ PK ! ����J J platform_data/gpio-ath79.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Atheros AR7XXX/AR9XXX GPIO controller platform data * * Copyright (C) 2015 Alban Bedel <albeu@free.fr> */ #ifndef __LINUX_PLATFORM_DATA_GPIO_ATH79_H #define __LINUX_PLATFORM_DATA_GPIO_ATH79_H struct ath79_gpio_platform_data { unsigned ngpios; bool oe_inverted; }; #endif PK ! ��,�� � platform_data/lp8727.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * LP8727 Micro/Mini USB IC with integrated charger * * Copyright (C) 2011 Texas Instruments * Copyright (C) 2011 National Semiconductor */ #ifndef _LP8727_H #define _LP8727_H enum lp8727_eoc_level { LP8727_EOC_5P, LP8727_EOC_10P, LP8727_EOC_16P, LP8727_EOC_20P, LP8727_EOC_25P, LP8727_EOC_33P, LP8727_EOC_50P, }; enum lp8727_ichg { LP8727_ICHG_90mA, LP8727_ICHG_100mA, LP8727_ICHG_400mA, LP8727_ICHG_450mA, LP8727_ICHG_500mA, LP8727_ICHG_600mA, LP8727_ICHG_700mA, LP8727_ICHG_800mA, LP8727_ICHG_900mA, LP8727_ICHG_1000mA, }; /** * struct lp8727_chg_param * @eoc_level : end of charge level setting * @ichg : charging current */ struct lp8727_chg_param { enum lp8727_eoc_level eoc_level; enum lp8727_ichg ichg; }; /** * struct lp8727_platform_data * @get_batt_present : check battery status - exists or not * @get_batt_level : get battery voltage (mV) * @get_batt_capacity : get battery capacity (%) * @get_batt_temp : get battery temperature * @ac : charging parameters for AC type charger * @usb : charging parameters for USB type charger * @debounce_msec : interrupt debounce time */ struct lp8727_platform_data { u8 (*get_batt_present)(void); u16 (*get_batt_level)(void); u8 (*get_batt_capacity)(void); u8 (*get_batt_temp)(void); struct lp8727_chg_param *ac; struct lp8727_chg_param *usb; unsigned int debounce_msec; }; #endif PK ! �I � � ! platform_data/cros_usbpd_notify.hnu �[��� // SPDX-License-Identifier: GPL-2.0-only /* * ChromeOS EC Power Delivery Notifier Driver * * Copyright 2020 Google LLC */ #ifndef __LINUX_PLATFORM_DATA_CROS_USBPD_NOTIFY_H #define __LINUX_PLATFORM_DATA_CROS_USBPD_NOTIFY_H #include <linux/notifier.h> int cros_usbpd_register_notify(struct notifier_block *nb); void cros_usbpd_unregister_notify(struct notifier_block *nb); #endif /* __LINUX_PLATFORM_DATA_CROS_USBPD_NOTIFY_H */ PK ! �,6�, , platform_data/mtd-nand-pxa3xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARCH_PXA3XX_NAND_H #define __ASM_ARCH_PXA3XX_NAND_H #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> /* * Current pxa3xx_nand controller has two chip select which both be workable but * historically all platforms remaining on platform data used only one. Switch * to device tree if you need more. */ struct pxa3xx_nand_platform_data { /* Keep OBM/bootloader NFC timing configuration */ bool keep_config; /* Use a flash-based bad block table */ bool flash_bbt; /* Requested ECC strength and ECC step size */ int ecc_strength, ecc_step_size; /* Partitions */ const struct mtd_partition *parts; unsigned int nr_parts; }; extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); #endif /* __ASM_ARCH_PXA3XX_NAND_H */ PK ! h��z� � platform_data/pxa_sdhci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/platform_data/pxa_sdhci.h * * Copyright 2010 Marvell * Zhangfei Gao <zhangfei.gao@marvell.com> * * PXA Platform - SDHCI platform data definitions */ #ifndef _PXA_SDHCI_H_ #define _PXA_SDHCI_H_ /* pxa specific flag */ /* Require clock free running */ #define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0) /* card always wired to host, like on-chip emmc */ #define PXA_FLAG_CARD_PERMANENT (1<<1) /* Board design supports 8-bit data on SD/SDIO BUS */ #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2) /* * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI * @flags: flags for platform requirement * @clk_delay_cycles: * mmp2: each step is roughly 100ps, 5bits width * pxa910: each step is 1ns, 4bits width * @clk_delay_sel: select clk_delay, used on pxa910 * 0: choose feedback clk * 1: choose feedback clk + delay value * 2: choose internal clk * @clk_delay_enable: enable clk_delay or not, used on pxa910 * @max_speed: the maximum speed supported * @host_caps: Standard MMC host capabilities bit field. * @quirks: quirks of platfrom * @quirks2: quirks2 of platfrom * @pm_caps: pm_caps of platfrom */ struct sdhci_pxa_platdata { unsigned int flags; unsigned int clk_delay_cycles; unsigned int clk_delay_sel; bool clk_delay_enable; unsigned int max_speed; u32 host_caps; u32 host_caps2; unsigned int quirks; unsigned int quirks2; unsigned int pm_caps; }; #endif /* _PXA_SDHCI_H_ */ PK ! ��= � � platform_data/sc18is602.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for NXP SC18IS602/603 * * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> * * For further information, see the Documentation/spi/spi-sc18is602.rst file. */ /** * struct sc18is602_platform_data - sc18is602 info * @clock_frequency SC18IS603 oscillator frequency */ struct sc18is602_platform_data { u32 clock_frequency; }; PK ! _B'�( ( platform_data/max3421-hcd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2014 eGauge Systems LLC * Contributed by David Mosberger-Tang <davidm@egauge.net> * * Platform-data structure for MAX3421 USB HCD driver. * */ #ifndef MAX3421_HCD_PLAT_H_INCLUDED #define MAX3421_HCD_PLAT_H_INCLUDED /* * This structure defines the mapping of certain auxiliary functions to the * MAX3421E GPIO pins. The chip has eight GP inputs and eight GP outputs. * A value of 0 indicates that the pin is not used/wired to anything. * * At this point, the only control the max3421-hcd driver cares about is * to control Vbus (5V to the peripheral). */ struct max3421_hcd_platform_data { u8 vbus_gpout; /* pin controlling Vbus */ u8 vbus_active_level; /* level that turns on power */ }; #endif /* MAX3421_HCD_PLAT_H_INCLUDED */ PK ! �Ȥ:� � platform_data/mmc-s3cmci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ARCH_MCI_H #define _ARCH_MCI_H /** * struct s3c24xx_mci_pdata - sd/mmc controller platform data * @no_wprotect: Set this to indicate there is no write-protect switch. * @no_detect: Set this if there is no detect switch. * @wprotect_invert: Invert the default sense of the write protect switch. * @use_dma: Set to allow the use of DMA. * @gpio_detect: GPIO number for the card detect line. * @gpio_wprotect: GPIO number for the write protect line. * @ocr_avail: The mask of the available power states, non-zero to use. * @set_power: Callback to control the power mode. * * The @gpio_detect is used for card detection when @no_wprotect is unset, * and the default sense is that 0 returned from gpio_get_value() means * that a card is inserted. If @detect_invert is set, then the value from * gpio_get_value() is inverted, which makes 1 mean card inserted. * * The driver will use @gpio_wprotect to signal whether the card is write * protected if @no_wprotect is not set. A 0 returned from gpio_get_value() * means the card is read/write, and 1 means read-only. The @wprotect_invert * will invert the value returned from gpio_get_value(). * * Card power is set by @ocr_availa, using MCC_VDD_ constants if it is set * to a non-zero value, otherwise the default of 3.2-3.4V is used. */ struct s3c24xx_mci_pdata { unsigned int no_wprotect:1; unsigned int no_detect:1; unsigned int wprotect_invert:1; unsigned int use_dma:1; unsigned long ocr_avail; void (*set_power)(unsigned char power_mode, unsigned short vdd); struct gpio_desc *bus[6]; }; /** * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device * @pdata: The platform data * * Copy the platform data supplied by @pdata so that this can be marked * __initdata. */ extern void s3c24xx_mci_def_set_power(unsigned char power_mode, unsigned short vdd); extern void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata); #endif /* _ARCH_NCI_H */ PK ! �cpc platform_data/gpmc-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * OMAP GPMC Platform data * * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com * Roger Quadros <rogerq@ti.com> */ #ifndef _GPMC_OMAP_H_ #define _GPMC_OMAP_H_ /* Maximum Number of Chip Selects */ #define GPMC_CS_NUM 8 /* bool type time settings */ struct gpmc_bool_timings { bool cycle2cyclediffcsen; bool cycle2cyclesamecsen; bool we_extra_delay; bool oe_extra_delay; bool adv_extra_delay; bool cs_extra_delay; bool time_para_granularity; }; /* * Note that all values in this struct are in nanoseconds except sync_clk * (which is in picoseconds), while the register values are in gpmc_fck cycles. */ struct gpmc_timings { /* Minimum clock period for synchronous mode (in picoseconds) */ u32 sync_clk; /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */ u32 cs_on; /* Assertion time */ u32 cs_rd_off; /* Read deassertion time */ u32 cs_wr_off; /* Write deassertion time */ /* ADV signal timings corresponding to GPMC_CONFIG3 */ u32 adv_on; /* Assertion time */ u32 adv_rd_off; /* Read deassertion time */ u32 adv_wr_off; /* Write deassertion time */ u32 adv_aad_mux_on; /* ADV assertion time for AAD */ u32 adv_aad_mux_rd_off; /* ADV read deassertion time for AAD */ u32 adv_aad_mux_wr_off; /* ADV write deassertion time for AAD */ /* WE signals timings corresponding to GPMC_CONFIG4 */ u32 we_on; /* WE assertion time */ u32 we_off; /* WE deassertion time */ /* OE signals timings corresponding to GPMC_CONFIG4 */ u32 oe_on; /* OE assertion time */ u32 oe_off; /* OE deassertion time */ u32 oe_aad_mux_on; /* OE assertion time for AAD */ u32 oe_aad_mux_off; /* OE deassertion time for AAD */ /* Access time and cycle time timings corresponding to GPMC_CONFIG5 */ u32 page_burst_access; /* Multiple access word delay */ u32 access; /* Start-cycle to first data valid delay */ u32 rd_cycle; /* Total read cycle time */ u32 wr_cycle; /* Total write cycle time */ u32 bus_turnaround; u32 cycle2cycle_delay; u32 wait_monitoring; u32 clk_activation; /* The following are only on OMAP3430 */ u32 wr_access; /* WRACCESSTIME */ u32 wr_data_mux_bus; /* WRDATAONADMUXBUS */ struct gpmc_bool_timings bool_timings; }; /* Device timings in picoseconds */ struct gpmc_device_timings { u32 t_ceasu; /* address setup to CS valid */ u32 t_avdasu; /* address setup to ADV valid */ /* XXX: try to combine t_avdp_r & t_avdp_w. Issue is * of tusb using these timings even for sync whilst * ideally for adv_rd/(wr)_off it should have considered * t_avdh instead. This indirectly necessitates r/w * variations of t_avdp as it is possible to have one * sync & other async */ u32 t_avdp_r; /* ADV low time (what about t_cer ?) */ u32 t_avdp_w; u32 t_aavdh; /* address hold time */ u32 t_oeasu; /* address setup to OE valid */ u32 t_aa; /* access time from ADV assertion */ u32 t_iaa; /* initial access time */ u32 t_oe; /* access time from OE assertion */ u32 t_ce; /* access time from CS asertion */ u32 t_rd_cycle; /* read cycle time */ u32 t_cez_r; /* read CS deassertion to high Z */ u32 t_cez_w; /* write CS deassertion to high Z */ u32 t_oez; /* OE deassertion to high Z */ u32 t_weasu; /* address setup to WE valid */ u32 t_wpl; /* write assertion time */ u32 t_wph; /* write deassertion time */ u32 t_wr_cycle; /* write cycle time */ u32 clk; u32 t_bacc; /* burst access valid clock to output delay */ u32 t_ces; /* CS setup time to clk */ u32 t_avds; /* ADV setup time to clk */ u32 t_avdh; /* ADV hold time from clk */ u32 t_ach; /* address hold time from clk */ u32 t_rdyo; /* clk to ready valid */ u32 t_ce_rdyz; /* XXX: description ?, or use t_cez instead */ u32 t_ce_avd; /* CS on to ADV on delay */ /* XXX: check the possibility of combining * cyc_aavhd_oe & cyc_aavdh_we */ u8 cyc_aavdh_oe;/* read address hold time in cycles */ u8 cyc_aavdh_we;/* write address hold time in cycles */ u8 cyc_oe; /* access time from OE assertion in cycles */ u8 cyc_wpl; /* write deassertion time in cycles */ u32 cyc_iaa; /* initial access time in cycles */ /* extra delays */ bool ce_xdelay; bool avd_xdelay; bool oe_xdelay; bool we_xdelay; }; #define GPMC_BURST_4 4 /* 4 word burst */ #define GPMC_BURST_8 8 /* 8 word burst */ #define GPMC_BURST_16 16 /* 16 word burst */ #define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */ #define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */ #define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */ #define GPMC_MUX_AD 2 /* Addr-Data multiplex */ struct gpmc_settings { bool burst_wrap; /* enables wrap bursting */ bool burst_read; /* enables read page/burst mode */ bool burst_write; /* enables write page/burst mode */ bool device_nand; /* device is NAND */ bool sync_read; /* enables synchronous reads */ bool sync_write; /* enables synchronous writes */ bool wait_on_read; /* monitor wait on reads */ bool wait_on_write; /* monitor wait on writes */ u32 burst_len; /* page/burst length */ u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ }; /* Data for each chip select */ struct gpmc_omap_cs_data { bool valid; /* data is valid */ bool is_nand; /* device within this CS is NAND */ struct gpmc_settings *settings; struct gpmc_device_timings *device_timings; struct gpmc_timings *gpmc_timings; struct platform_device *pdev; /* device within this CS region */ unsigned int pdata_size; }; struct gpmc_omap_platform_data { struct gpmc_omap_cs_data cs[GPMC_CS_NUM]; }; #endif /* _GPMC_OMAP_H */ PK ! ��+�i i platform_data/cpuidle-exynos.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2014 Samsung Electronics Co., Ltd. * http://www.samsung.com */ #ifndef __CPUIDLE_EXYNOS_H #define __CPUIDLE_EXYNOS_H struct cpuidle_exynos_data { int (*cpu0_enter_aftr)(void); int (*cpu1_powerdown)(void); void (*pre_enter_aftr)(void); void (*post_enter_aftr)(void); }; #endif PK ! r�D�� � platform_data/sgi-w1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * SGI One-Wire (W1) IP */ #ifndef PLATFORM_DATA_SGI_W1_H #define PLATFORM_DATA_SGI_W1_H struct sgi_w1_platform_data { char dev_id[64]; }; #endif /* PLATFORM_DATA_SGI_W1_H */ PK ! ^�jT� � platform_data/spi-omap2-mcspi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _OMAP2_MCSPI_H #define _OMAP2_MCSPI_H #define OMAP4_MCSPI_REG_OFFSET 0x100 #define MCSPI_PINDIR_D0_IN_D1_OUT 0 #define MCSPI_PINDIR_D0_OUT_D1_IN 1 struct omap2_mcspi_platform_config { unsigned short num_cs; unsigned int regs_offset; unsigned int pin_dir:1; size_t max_xfer_len; }; struct omap2_mcspi_device_config { unsigned turbo_mode:1; /* toggle chip select after every word */ unsigned cs_per_word:1; }; #endif PK ! �p�P� � platform_data/keypad-pxa27x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARCH_PXA27x_KEYPAD_H #define __ASM_ARCH_PXA27x_KEYPAD_H #include <linux/input.h> #include <linux/input/matrix_keypad.h> #define MAX_MATRIX_KEY_ROWS (8) #define MAX_MATRIX_KEY_COLS (8) #define MATRIX_ROW_SHIFT (3) #define MAX_DIRECT_KEY_NUM (8) /* pxa3xx keypad platform specific parameters * * NOTE: * 1. direct_key_num indicates the number of keys in the direct keypad * _plus_ the number of rotary-encoder sensor inputs, this can be * left as 0 if only rotary encoders are enabled, the driver will * automatically calculate this * * 2. direct_key_map is the key code map for the direct keys, if rotary * encoder(s) are enabled, direct key 0/1(2/3) will be ignored * * 3. rotary can be either interpreted as a relative input event (e.g. * REL_WHEEL/REL_HWHEEL) or specific keys (e.g. UP/DOWN/LEFT/RIGHT) * * 4. matrix key and direct key will use the same debounce_interval by * default, which should be sufficient in most cases * * pxa168 keypad platform specific parameter * * NOTE: * clear_wakeup_event callback is a workaround required to clear the * keypad interrupt. The keypad wake must be cleared in addition to * reading the MI/DI bits in the KPC register. */ struct pxa27x_keypad_platform_data { /* code map for the matrix keys */ const struct matrix_keymap_data *matrix_keymap_data; unsigned int matrix_key_rows; unsigned int matrix_key_cols; /* direct keys */ int direct_key_num; unsigned int direct_key_map[MAX_DIRECT_KEY_NUM]; /* the key output may be low active */ int direct_key_low_active; /* give board a chance to choose the start direct key */ unsigned int direct_key_mask; /* rotary encoders 0 */ int enable_rotary0; int rotary0_rel_code; int rotary0_up_key; int rotary0_down_key; /* rotary encoders 1 */ int enable_rotary1; int rotary1_rel_code; int rotary1_up_key; int rotary1_down_key; /* key debounce interval */ unsigned int debounce_interval; /* clear wakeup event requirement for pxa168 */ void (*clear_wakeup_event)(void); }; extern void pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info); #endif /* __ASM_ARCH_PXA27x_KEYPAD_H */ PK ! uU�(� � platform_data/i2c-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __I2C_OMAP_H__ #define __I2C_OMAP_H__ #include <linux/platform_device.h> /* * Version 2 of the I2C peripheral unit has a different register * layout and extra registers. The ID register in the V2 peripheral * unit on the OMAP4430 reports the same ID as the V1 peripheral * unit on the OMAP3530, so we must inform the driver which IP * version we know it is running on from platform / cpu-specific * code using these constants in the hwmod class definition. */ #define OMAP_I2C_IP_VERSION_1 1 #define OMAP_I2C_IP_VERSION_2 2 /* struct omap_i2c_bus_platform_data .flags meanings */ #define OMAP_I2C_FLAG_NO_FIFO BIT(0) #define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) #define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) #define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) #define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) /* how the CPU address bus must be translated for I2C unit access */ #define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 #define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) #define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) #define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 struct omap_i2c_bus_platform_data { u32 clkrate; u32 rev; u32 flags; void (*set_mpu_wkup_lat)(struct device *dev, long set); }; #endif PK ! � 5! ! platform_data/pcf857x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PCF857X_H #define __LINUX_PCF857X_H /** * struct pcf857x_platform_data - data to set up pcf857x driver * @gpio_base: number of the chip's first GPIO * @n_latch: optional bit-inverse of initial register value; if * you leave this initialized to zero the driver will act * like the chip was just reset * @setup: optional callback issued once the GPIOs are valid * @teardown: optional callback issued before the GPIOs are invalidated * @context: optional parameter passed to setup() and teardown() * * In addition to the I2C_BOARD_INFO() state appropriate to each chip, * the i2c_board_info used with the pcf875x driver must provide its * platform_data (pointer to one of these structures) with at least * the gpio_base value initialized. * * The @setup callback may be used with the kind of board-specific glue * which hands the (now-valid) GPIOs to other drivers, or which puts * devices in their initial states using these GPIOs. * * These GPIO chips are only "quasi-bidirectional"; read the chip specs * to understand the behavior. They don't have separate registers to * record which pins are used for input or output, record which output * values are driven, or provide access to input values. That must be * inferred by reading the chip's value and knowing the last value written * to it. If you leave n_latch initialized to zero, that last written * value is presumed to be all ones (as if the chip were just reset). */ struct pcf857x_platform_data { unsigned gpio_base; unsigned n_latch; int (*setup)(struct i2c_client *client, int gpio, unsigned ngpio, void *context); int (*teardown)(struct i2c_client *client, int gpio, unsigned ngpio, void *context); void *context; }; #endif /* __LINUX_PCF857X_H */ PK ! ?ᶉ platform_data/mdio-gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * MDIO-GPIO bus platform data structure */ #ifndef __LINUX_MDIO_GPIO_PDATA_H #define __LINUX_MDIO_GPIO_PDATA_H struct mdio_gpio_platform_data { u32 phy_mask; u32 phy_ignore_ta_mask; }; #endif /* __LINUX_MDIO_GPIO_PDATA_H */ PK ! �y��{ { platform_data/leds-lp55xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * LP55XX Platform Data Header * * Copyright (C) 2012 Texas Instruments * * Author: Milo(Woogyom) Kim <milo.kim@ti.com> * * Derived from leds-lp5521.h, leds-lp5523.h */ #ifndef _LEDS_LP55XX_H #define _LEDS_LP55XX_H #include <linux/gpio/consumer.h> #include <linux/led-class-multicolor.h> /* Clock configuration */ #define LP55XX_CLOCK_AUTO 0 #define LP55XX_CLOCK_INT 1 #define LP55XX_CLOCK_EXT 2 #define LP55XX_MAX_GROUPED_CHAN 4 struct lp55xx_led_config { const char *name; const char *default_trigger; u8 chan_nr; u8 led_current; /* mA x10, 0 if led is not connected */ u8 max_current; int num_colors; unsigned int max_channel; int color_id[LED_COLOR_ID_MAX]; int output_num[LED_COLOR_ID_MAX]; }; struct lp55xx_predef_pattern { const u8 *r; const u8 *g; const u8 *b; u8 size_r; u8 size_g; u8 size_b; }; enum lp8501_pwr_sel { LP8501_ALL_VDD, /* D1~9 are connected to VDD */ LP8501_6VDD_3VOUT, /* D1~6 with VDD, D7~9 with VOUT */ LP8501_3VDD_6VOUT, /* D1~6 with VOUT, D7~9 with VDD */ LP8501_ALL_VOUT, /* D1~9 are connected to VOUT */ }; /* * struct lp55xx_platform_data * @led_config : Configurable led class device * @num_channels : Number of LED channels * @label : Used for naming LEDs * @clock_mode : Input clock mode. LP55XX_CLOCK_AUTO or _INT or _EXT * @setup_resources : Platform specific function before enabling the chip * @release_resources : Platform specific function after disabling the chip * @enable_gpiod : enable GPIO descriptor * @patterns : Predefined pattern data for RGB channels * @num_patterns : Number of patterns * @update_config : Value of CONFIG register */ struct lp55xx_platform_data { /* LED channel configuration */ struct lp55xx_led_config *led_config; u8 num_channels; const char *label; /* Clock configuration */ u8 clock_mode; /* optional enable GPIO */ struct gpio_desc *enable_gpiod; /* Predefined pattern data */ struct lp55xx_predef_pattern *patterns; unsigned int num_patterns; /* LP8501 specific */ enum lp8501_pwr_sel pwr_sel; }; #endif /* _LEDS_LP55XX_H */ PK ! � �� � platform_data/syscon.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef PLATFORM_DATA_SYSCON_H #define PLATFORM_DATA_SYSCON_H struct syscon_platform_data { const char *label; }; #endif PK ! ����7 7 platform_data/spi-ep93xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_MACH_EP93XX_SPI_H #define __ASM_MACH_EP93XX_SPI_H struct spi_device; /** * struct ep93xx_spi_info - EP93xx specific SPI descriptor * @use_dma: use DMA for the transfers */ struct ep93xx_spi_info { bool use_dma; }; #endif /* __ASM_MACH_EP93XX_SPI_H */ PK ! �� � platform_data/spi-clps711x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * CLPS711X SPI bus driver definitions * * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru> */ #ifndef ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H #define ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H /* Board specific platform_data */ struct spi_clps711x_pdata { int *chipselect; /* Array of GPIO-numbers */ int num_chipselect; /* Total count of GPIOs */ }; #endif PK ! MUm�� � platform_data/video-pxafb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Support for the xscale frame buffer. * * Author: Jean-Frederic Clere * Created: Sep 22, 2003 * Copyright: jfclere@sinix.net */ #include <linux/fb.h> #include <mach/regs-lcd.h> /* * Supported LCD connections * * bits 0 - 3: for LCD panel type: * * STN - for passive matrix * DSTN - for dual scan passive matrix * TFT - for active matrix * * bits 4 - 9 : for bus width * bits 10-17 : for AC Bias Pin Frequency * bit 18 : for output enable polarity * bit 19 : for pixel clock edge * bit 20 : for output pixel format when base is RGBT16 */ #define LCD_CONN_TYPE(_x) ((_x) & 0x0f) #define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) #define LCD_TYPE_MASK 0xf #define LCD_TYPE_UNKNOWN 0 #define LCD_TYPE_MONO_STN 1 #define LCD_TYPE_MONO_DSTN 2 #define LCD_TYPE_COLOR_STN 3 #define LCD_TYPE_COLOR_DSTN 4 #define LCD_TYPE_COLOR_TFT 5 #define LCD_TYPE_SMART_PANEL 6 #define LCD_TYPE_MAX 7 #define LCD_MONO_STN_4BPP ((4 << 4) | LCD_TYPE_MONO_STN) #define LCD_MONO_STN_8BPP ((8 << 4) | LCD_TYPE_MONO_STN) #define LCD_MONO_DSTN_8BPP ((8 << 4) | LCD_TYPE_MONO_DSTN) #define LCD_COLOR_STN_8BPP ((8 << 4) | LCD_TYPE_COLOR_STN) #define LCD_COLOR_DSTN_16BPP ((16 << 4) | LCD_TYPE_COLOR_DSTN) #define LCD_COLOR_TFT_8BPP ((8 << 4) | LCD_TYPE_COLOR_TFT) #define LCD_COLOR_TFT_16BPP ((16 << 4) | LCD_TYPE_COLOR_TFT) #define LCD_COLOR_TFT_18BPP ((18 << 4) | LCD_TYPE_COLOR_TFT) #define LCD_SMART_PANEL_8BPP ((8 << 4) | LCD_TYPE_SMART_PANEL) #define LCD_SMART_PANEL_16BPP ((16 << 4) | LCD_TYPE_SMART_PANEL) #define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL) #define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10) #define LCD_BIAS_ACTIVE_HIGH (0 << 18) #define LCD_BIAS_ACTIVE_LOW (1 << 18) #define LCD_PCLK_EDGE_RISE (0 << 19) #define LCD_PCLK_EDGE_FALL (1 << 19) #define LCD_ALTERNATE_MAPPING (1 << 20) /* * This structure describes the machine which we are running on. * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine * of linux/drivers/video/pxafb.c */ struct pxafb_mode_info { u_long pixclock; u_short xres; u_short yres; u_char bpp; u_int cmap_greyscale:1, depth:8, transparency:1, unused:22; /* Parallel Mode Timing */ u_char hsync_len; u_char left_margin; u_char right_margin; u_char vsync_len; u_char upper_margin; u_char lower_margin; u_char sync; /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details * Note: * 1. all parameters in nanosecond (ns) * 2. a0cs{rd,wr}_set_hld are controlled by the same register bits * in pxa27x and pxa3xx, initialize them to the same value or * the larger one will be used * 3. same to {rd,wr}_pulse_width * * 4. LCD_PCLK_EDGE_{RISE,FALL} controls the L_PCLK_WR polarity * 5. sync & FB_SYNC_HOR_HIGH_ACT controls the L_LCLK_A0 * 6. sync & FB_SYNC_VERT_HIGH_ACT controls the L_LCLK_RD */ unsigned a0csrd_set_hld; /* A0 and CS Setup/Hold Time before/after L_FCLK_RD */ unsigned a0cswr_set_hld; /* A0 and CS Setup/Hold Time before/after L_PCLK_WR */ unsigned wr_pulse_width; /* L_PCLK_WR pulse width */ unsigned rd_pulse_width; /* L_FCLK_RD pulse width */ unsigned cmd_inh_time; /* Command Inhibit time between two writes */ unsigned op_hold_time; /* Output Hold time from L_FCLK_RD negation */ }; struct pxafb_mach_info { struct pxafb_mode_info *modes; unsigned int num_modes; unsigned int lcd_conn; unsigned long video_mem_size; u_int fixed_modes:1, cmap_inverse:1, cmap_static:1, acceleration_enabled:1, unused:28; /* The following should be defined in LCCR0 * LCCR0_Act or LCCR0_Pas Active or Passive * LCCR0_Sngl or LCCR0_Dual Single/Dual panel * LCCR0_Mono or LCCR0_Color Mono/Color * LCCR0_4PixMono or LCCR0_8PixMono (in mono single mode) * LCCR0_DMADel(Tcpu) (optional) DMA request delay * * The following should not be defined in LCCR0: * LCCR0_OUM, LCCR0_BM, LCCR0_QDM, LCCR0_DIS, LCCR0_EFM * LCCR0_IUM, LCCR0_SFM, LCCR0_LDM, LCCR0_ENB */ u_int lccr0; /* The following should be defined in LCCR3 * LCCR3_OutEnH or LCCR3_OutEnL Output enable polarity * LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type * LCCR3_Acb(X) AB Bias pin frequency * LCCR3_DPC (optional) Double Pixel Clock mode (untested) * * The following should not be defined in LCCR3 * LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp */ u_int lccr3; /* The following should be defined in LCCR4 * LCCR4_PAL_FOR_0 or LCCR4_PAL_FOR_1 or LCCR4_PAL_FOR_2 * * All other bits in LCCR4 should be left alone. */ u_int lccr4; void (*pxafb_backlight_power)(int); void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); void (*smart_update)(struct fb_info *); }; void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); unsigned long pxafb_get_hsync_time(struct device *dev); #ifdef CONFIG_FB_PXA_SMARTPANEL extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); extern int pxafb_smart_flush(struct fb_info *info); #else static inline int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int n) { return 0; } static inline int pxafb_smart_flush(struct fb_info *info) { return 0; } #endif PK ! ֙�w w platform_data/dma-mv_xor.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Marvell XOR platform device data definition file. */ #ifndef __DMA_MV_XOR_H #define __DMA_MV_XOR_H #include <linux/dmaengine.h> #include <linux/mbus.h> #define MV_XOR_NAME "mv_xor" struct mv_xor_channel_data { dma_cap_mask_t cap_mask; }; struct mv_xor_platform_data { struct mv_xor_channel_data *channels; }; #endif PK ! R�m/2 2 platform_data/si5351.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Si5351A/B/C programmable clock generator platform_data. */ #ifndef __LINUX_PLATFORM_DATA_SI5351_H__ #define __LINUX_PLATFORM_DATA_SI5351_H__ /** * enum si5351_pll_src - Si5351 pll clock source * @SI5351_PLL_SRC_DEFAULT: default, do not change eeprom config * @SI5351_PLL_SRC_XTAL: pll source clock is XTAL input * @SI5351_PLL_SRC_CLKIN: pll source clock is CLKIN input (Si5351C only) */ enum si5351_pll_src { SI5351_PLL_SRC_DEFAULT = 0, SI5351_PLL_SRC_XTAL = 1, SI5351_PLL_SRC_CLKIN = 2, }; /** * enum si5351_multisynth_src - Si5351 multisynth clock source * @SI5351_MULTISYNTH_SRC_DEFAULT: default, do not change eeprom config * @SI5351_MULTISYNTH_SRC_VCO0: multisynth source clock is VCO0 * @SI5351_MULTISYNTH_SRC_VCO1: multisynth source clock is VCO1/VXCO */ enum si5351_multisynth_src { SI5351_MULTISYNTH_SRC_DEFAULT = 0, SI5351_MULTISYNTH_SRC_VCO0 = 1, SI5351_MULTISYNTH_SRC_VCO1 = 2, }; /** * enum si5351_clkout_src - Si5351 clock output clock source * @SI5351_CLKOUT_SRC_DEFAULT: default, do not change eeprom config * @SI5351_CLKOUT_SRC_MSYNTH_N: clkout N source clock is multisynth N * @SI5351_CLKOUT_SRC_MSYNTH_0_4: clkout N source clock is multisynth 0 (N<4) * or 4 (N>=4) * @SI5351_CLKOUT_SRC_XTAL: clkout N source clock is XTAL * @SI5351_CLKOUT_SRC_CLKIN: clkout N source clock is CLKIN (Si5351C only) */ enum si5351_clkout_src { SI5351_CLKOUT_SRC_DEFAULT = 0, SI5351_CLKOUT_SRC_MSYNTH_N = 1, SI5351_CLKOUT_SRC_MSYNTH_0_4 = 2, SI5351_CLKOUT_SRC_XTAL = 3, SI5351_CLKOUT_SRC_CLKIN = 4, }; /** * enum si5351_drive_strength - Si5351 clock output drive strength * @SI5351_DRIVE_DEFAULT: default, do not change eeprom config * @SI5351_DRIVE_2MA: 2mA clock output drive strength * @SI5351_DRIVE_4MA: 4mA clock output drive strength * @SI5351_DRIVE_6MA: 6mA clock output drive strength * @SI5351_DRIVE_8MA: 8mA clock output drive strength */ enum si5351_drive_strength { SI5351_DRIVE_DEFAULT = 0, SI5351_DRIVE_2MA = 2, SI5351_DRIVE_4MA = 4, SI5351_DRIVE_6MA = 6, SI5351_DRIVE_8MA = 8, }; /** * enum si5351_disable_state - Si5351 clock output disable state * @SI5351_DISABLE_DEFAULT: default, do not change eeprom config * @SI5351_DISABLE_LOW: CLKx is set to a LOW state when disabled * @SI5351_DISABLE_HIGH: CLKx is set to a HIGH state when disabled * @SI5351_DISABLE_FLOATING: CLKx is set to a FLOATING state when * disabled * @SI5351_DISABLE_NEVER: CLKx is NEVER disabled */ enum si5351_disable_state { SI5351_DISABLE_DEFAULT = 0, SI5351_DISABLE_LOW, SI5351_DISABLE_HIGH, SI5351_DISABLE_FLOATING, SI5351_DISABLE_NEVER, }; /** * struct si5351_clkout_config - Si5351 clock output configuration * @clkout: clkout number * @multisynth_src: multisynth source clock * @clkout_src: clkout source clock * @pll_master: if true, clkout can also change pll rate * @pll_reset: if true, clkout can reset its pll * @drive: output drive strength * @rate: initial clkout rate, or default if 0 */ struct si5351_clkout_config { enum si5351_multisynth_src multisynth_src; enum si5351_clkout_src clkout_src; enum si5351_drive_strength drive; enum si5351_disable_state disable_state; bool pll_master; bool pll_reset; unsigned long rate; }; /** * struct si5351_platform_data - Platform data for the Si5351 clock driver * @clk_xtal: xtal input clock * @clk_clkin: clkin input clock * @pll_src: array of pll source clock setting * @clkout: array of clkout configuration */ struct si5351_platform_data { enum si5351_pll_src pll_src[2]; struct si5351_clkout_config clkout[8]; }; #endif PK ! C^¿5 5 platform_data/mmc-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MMC definitions for OMAP2 * * Copyright (C) 2006 Nokia Corporation */ #define OMAP_MMC_MAX_SLOTS 2 struct mmc_card; struct omap_mmc_platform_data { /* back-link to device */ struct device *dev; /* number of slots per controller */ unsigned nr_slots:2; /* set if your board has components or wiring that limits the * maximum frequency on the MMC bus */ unsigned int max_freq; /* switch the bus to a new slot */ int (*switch_slot)(struct device *dev, int slot); /* initialize board-specific MMC functionality, can be NULL if * not supported */ int (*init)(struct device *dev); void (*cleanup)(struct device *dev); void (*shutdown)(struct device *dev); /* Return context loss count due to PM states changing */ int (*get_context_loss_count)(struct device *dev); /* Integrating attributes from the omap_hwmod layer */ u8 controller_flags; /* Register offset deviation */ u16 reg_offset; struct omap_mmc_slot_data { /* * 4/8 wires and any additional host capabilities * need to OR'd all capabilities (ref. linux/mmc/host.h) */ u8 wires; /* Used for the MMC driver on omap1 and 2420 */ u32 caps; /* Used for the MMC driver on 2430 and later */ u32 pm_caps; /* PM capabilities of the mmc */ /* * nomux means "standard" muxing is wrong on this board, and * that board-specific code handled it before common init logic. */ unsigned nomux:1; /* switch pin can be for card detect (default) or card cover */ unsigned cover:1; /* use the internal clock */ unsigned internal_clock:1; /* nonremovable e.g. eMMC */ unsigned nonremovable:1; /* Try to sleep or power off when possible */ unsigned power_saving:1; /* If using power_saving and the MMC power is not to go off */ unsigned no_off:1; /* eMMC does not handle power off when not in sleep state */ unsigned no_regulator_off_init:1; /* Regulator off remapped to sleep */ unsigned vcc_aux_disable_is_sleep:1; /* we can put the features above into this variable */ #define MMC_OMAP7XX (1 << 3) #define MMC_OMAP15XX (1 << 4) #define MMC_OMAP16XX (1 << 5) unsigned features; int switch_pin; /* gpio (card detect) */ int gpio_wp; /* gpio (write protect) */ int (*set_bus_mode)(struct device *dev, int slot, int bus_mode); int (*set_power)(struct device *dev, int slot, int power_on, int vdd); int (*get_ro)(struct device *dev, int slot); void (*remux)(struct device *dev, int slot, int power_on); /* Call back before enabling / disabling regulators */ void (*before_set_reg)(struct device *dev, int slot, int power_on, int vdd); /* Call back after enabling / disabling regulators */ void (*after_set_reg)(struct device *dev, int slot, int power_on, int vdd); /* if we have special card, init it using this callback */ void (*init_card)(struct mmc_card *card); /* return MMC cover switch state, can be NULL if not supported. * * possible return values: * 0 - closed * 1 - open */ int (*get_cover_state)(struct device *dev, int slot); const char *name; u32 ocr_mask; /* Card detection */ int (*card_detect)(struct device *dev, int slot); unsigned int ban_openended:1; } slots[OMAP_MMC_MAX_SLOTS]; }; extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); PK ! ��� � platform_data/dma-ep93xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H #include <linux/types.h> #include <linux/dmaengine.h> #include <linux/dma-mapping.h> /* * M2P channels. * * Note that these values are also directly used for setting the PPALLOC * register. */ #define EP93XX_DMA_I2S1 0 #define EP93XX_DMA_I2S2 1 #define EP93XX_DMA_AAC1 2 #define EP93XX_DMA_AAC2 3 #define EP93XX_DMA_AAC3 4 #define EP93XX_DMA_I2S3 5 #define EP93XX_DMA_UART1 6 #define EP93XX_DMA_UART2 7 #define EP93XX_DMA_UART3 8 #define EP93XX_DMA_IRDA 9 /* M2M channels */ #define EP93XX_DMA_SSP 10 #define EP93XX_DMA_IDE 11 /** * struct ep93xx_dma_data - configuration data for the EP93xx dmaengine * @port: peripheral which is requesting the channel * @direction: TX/RX channel * @name: optional name for the channel, this is displayed in /proc/interrupts * * This information is passed as private channel parameter in a filter * function. Note that this is only needed for slave/cyclic channels. For * memcpy channels %NULL data should be passed. */ struct ep93xx_dma_data { int port; enum dma_transfer_direction direction; const char *name; }; /** * struct ep93xx_dma_chan_data - platform specific data for a DMA channel * @name: name of the channel, used for getting the right clock for the channel * @base: mapped registers * @irq: interrupt number used by this channel */ struct ep93xx_dma_chan_data { const char *name; void __iomem *base; int irq; }; /** * struct ep93xx_dma_platform_data - platform data for the dmaengine driver * @channels: array of channels which are passed to the driver * @num_channels: number of channels in the array * * This structure is passed to the DMA engine driver via platform data. For * M2P channels, contract is that even channels are for TX and odd for RX. * There is no requirement for the M2M channels. */ struct ep93xx_dma_platform_data { struct ep93xx_dma_chan_data *channels; size_t num_channels; }; static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan) { return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p"); } /** * ep93xx_dma_chan_direction - returns direction the channel can be used * @chan: channel * * This function can be used in filter functions to find out whether the * channel supports given DMA direction. Only M2P channels have such * limitation, for M2M channels the direction is configurable. */ static inline enum dma_transfer_direction ep93xx_dma_chan_direction(struct dma_chan *chan) { if (!ep93xx_dma_chan_is_m2p(chan)) return DMA_TRANS_NONE; /* even channels are for TX, odd for RX */ return (chan->chan_id % 2 == 0) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; } #endif /* __ASM_ARCH_DMA_H */ PK ! �'�� platform_data/lv5207lp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * lv5207lp.h - Sanyo LV5207LP LEDs Driver */ #ifndef __LV5207LP_H__ #define __LV5207LP_H__ struct device; struct lv5207lp_platform_data { struct device *fbdev; unsigned int max_value; unsigned int def_value; }; #endif PK ! ٵ�^b b platform_data/mlxreg.hnu �[��� /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ /* * Copyright (C) 2017-2020 Mellanox Technologies Ltd. */ #ifndef __LINUX_PLATFORM_DATA_MLXREG_H #define __LINUX_PLATFORM_DATA_MLXREG_H #define MLXREG_CORE_LABEL_MAX_SIZE 32 #define MLXREG_CORE_WD_FEATURE_NOWAYOUT BIT(0) #define MLXREG_CORE_WD_FEATURE_START_AT_BOOT BIT(1) /** * enum mlxreg_wdt_type - type of HW watchdog * * TYPE1 HW watchdog implementation exist in old systems. * All new systems have TYPE2 HW watchdog. * TYPE3 HW watchdog can exist on all systems with new CPLD. * TYPE3 is selected by WD capability bit. */ enum mlxreg_wdt_type { MLX_WDT_TYPE1, MLX_WDT_TYPE2, MLX_WDT_TYPE3, }; /** * struct mlxreg_hotplug_device - I2C device data: * * @adapter: I2C device adapter; * @client: I2C device client; * @brdinfo: device board information; * @nr: I2C device adapter number, to which device is to be attached; * * Structure represents I2C hotplug device static data (board topology) and * dynamic data (related kernel objects handles). */ struct mlxreg_hotplug_device { struct i2c_adapter *adapter; struct i2c_client *client; struct i2c_board_info *brdinfo; int nr; }; /** * struct mlxreg_core_data - attributes control data: * * @label: attribute label; * @reg: attribute register; * @mask: attribute access mask; * @bit: attribute effective bit; * @capability: attribute capability register; * @reg_prsnt: attribute presence register; * @mode: access mode; * @np - pointer to node platform associated with attribute; * @hpdev - hotplug device data; * @health_cntr: dynamic device health indication counter; * @attached: true if device has been attached after good health indication; * @regnum: number of registers occupied by multi-register attribute; */ struct mlxreg_core_data { char label[MLXREG_CORE_LABEL_MAX_SIZE]; u32 reg; u32 mask; u32 bit; u32 capability; u32 reg_prsnt; umode_t mode; struct device_node *np; struct mlxreg_hotplug_device hpdev; u32 health_cntr; bool attached; u8 regnum; }; /** * struct mlxreg_core_item - same type components controlled by the driver: * * @data: component data; * @aggr_mask: group aggregation mask; * @reg: group interrupt status register; * @mask: group interrupt mask; * @capability: group capability register; * @cache: last status value for elements fro the same group; * @count: number of available elements in the group; * @ind: element's index inside the group; * @inversed: if 0: 0 for signal status is OK, if 1 - 1 is OK; * @health: true if device has health indication, false in other case; */ struct mlxreg_core_item { struct mlxreg_core_data *data; u32 aggr_mask; u32 reg; u32 mask; u32 capability; u32 cache; u8 count; u8 ind; u8 inversed; u8 health; }; /** * struct mlxreg_core_platform_data - platform data: * * @data: instance private data; * @regmap: register map of parent device; * @counter: number of instances; * @features: supported features of device; * @version: implementation version; * @identity: device identity name; * @capability: device capability register; */ struct mlxreg_core_platform_data { struct mlxreg_core_data *data; void *regmap; int counter; u32 features; u32 version; char identity[MLXREG_CORE_LABEL_MAX_SIZE]; u32 capability; }; /** * struct mlxreg_core_hotplug_platform_data - hotplug platform data: * * @items: same type components with the hotplug capability; * @irq: platform interrupt number; * @regmap: register map of parent device; * @counter: number of the components with the hotplug capability; * @cell: location of top aggregation interrupt register; * @mask: top aggregation interrupt common mask; * @cell_low: location of low aggregation interrupt register; * @mask_low: low aggregation interrupt common mask; * @deferred_nr: I2C adapter number must be exist prior probing execution; * @shift_nr: I2C adapter numbers must be incremented by this value; */ struct mlxreg_core_hotplug_platform_data { struct mlxreg_core_item *items; int irq; void *regmap; int counter; u32 cell; u32 mask; u32 cell_low; u32 mask_low; int deferred_nr; int shift_nr; }; #endif /* __LINUX_PLATFORM_DATA_MLXREG_H */ PK ! BC� � platform_data/mmc-davinci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Board-specific MMC configuration */ #ifndef _DAVINCI_MMC_H #define _DAVINCI_MMC_H #include <linux/types.h> #include <linux/mmc/host.h> struct davinci_mmc_config { /* get_cd()/get_wp() may sleep */ int (*get_cd)(int module); int (*get_ro)(int module); void (*set_power)(int module, bool on); /* wires == 0 is equivalent to wires == 4 (4-bit parallel) */ u8 wires; u32 max_freq; /* any additional host capabilities: OR'd in to mmc->f_caps */ u32 caps; /* Number of sg segments */ u8 nr_sg; }; void davinci_setup_mmc(int module, struct davinci_mmc_config *config); enum { MMC_CTLR_VERSION_1 = 0, /* DM644x and DM355 */ MMC_CTLR_VERSION_2, /* DA830 */ }; #endif PK ! �{^<� � platform_data/leds-lm355x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012 Texas Instruments * * Simple driver for Texas Instruments LM355x LED driver chip * * Author: G.Shark Jeong <gshark.jeong@gmail.com> * Daniel Jeong <daniel.jeong@ti.com> */ #define LM355x_NAME "leds-lm355x" #define LM3554_NAME "leds-lm3554" #define LM3556_NAME "leds-lm3556" /* lm3554 : strobe def. on */ enum lm355x_strobe { LM355x_PIN_STROBE_DISABLE = 0x00, LM355x_PIN_STROBE_ENABLE = 0x01, }; enum lm355x_torch { LM355x_PIN_TORCH_DISABLE = 0, LM3554_PIN_TORCH_ENABLE = 0x80, LM3556_PIN_TORCH_ENABLE = 0x10, }; enum lm355x_tx2 { LM355x_PIN_TX_DISABLE = 0, LM3554_PIN_TX_ENABLE = 0x20, LM3556_PIN_TX_ENABLE = 0x40, }; enum lm355x_ntc { LM355x_PIN_NTC_DISABLE = 0, LM3554_PIN_NTC_ENABLE = 0x08, LM3556_PIN_NTC_ENABLE = 0x80, }; enum lm355x_pmode { LM355x_PMODE_DISABLE = 0, LM355x_PMODE_ENABLE = 0x04, }; /* * struct lm3554_platform_data * @pin_strobe: strobe input * @pin_torch : input pin * lm3554-tx1/torch/gpio1 * lm3556-torch * @pin_tx2 : input pin * lm3554-envm/tx2/gpio2 * lm3556-tx pin * @ntc_pin : output pin * lm3554-ledi/ntc * lm3556-temp pin * @pass_mode : pass mode */ struct lm355x_platform_data { enum lm355x_strobe pin_strobe; enum lm355x_torch pin_tx1; enum lm355x_tx2 pin_tx2; enum lm355x_ntc ntc_pin; enum lm355x_pmode pass_mode; }; PK ! 8��` ` platform_data/leds-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2006 Samsung Electronics * Kyungmin Park <kyungmin.park@samsung.com> */ #ifndef ASMARM_ARCH_LED_H #define ASMARM_ARCH_LED_H struct omap_led_config { struct led_classdev cdev; s16 gpio; }; struct omap_led_platform_data { s16 nr_leds; struct omap_led_config *leds; }; #endif PK ! _ �S S # platform_data/touchscreen-s3c2410.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> */ #ifndef __TOUCHSCREEN_S3C2410_H #define __TOUCHSCREEN_S3C2410_H struct s3c2410_ts_mach_info { int delay; int presc; int oversampling_shift; void (*cfg_gpio)(struct platform_device *dev); }; extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *); extern void s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *); /* defined by architecture to configure gpio */ extern void s3c24xx_ts_cfg_gpio(struct platform_device *dev); #endif /*__TOUCHSCREEN_S3C2410_H */ PK ! ���BY Y platform_data/leds-s3c24xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2006 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * S3C24XX - LEDs GPIO connector */ #ifndef __LEDS_S3C24XX_H #define __LEDS_S3C24XX_H struct s3c24xx_led_platdata { char *name; char *def_trigger; }; #endif /* __LEDS_S3C24XX_H */ PK ! �1u^� ^� platform_data/cros_ec_commands.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Host communication command constants for ChromeOS EC * * Copyright (C) 2012 Google, Inc * * NOTE: This file is auto-generated from ChromeOS EC Open Source code from * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h */ /* Host communication command constants for Chrome EC */ #ifndef __CROS_EC_COMMANDS_H #define __CROS_EC_COMMANDS_H #define BUILD_ASSERT(_cond) /* * Current version of this protocol * * TODO(crosbug.com/p/11223): This is effectively useless; protocol is * determined in other ways. Remove this once the kernel code no longer * depends on it. */ #define EC_PROTO_VERSION 0x00000002 /* Command version mask */ #define EC_VER_MASK(version) BIT(version) /* I/O addresses for ACPI commands */ #define EC_LPC_ADDR_ACPI_DATA 0x62 #define EC_LPC_ADDR_ACPI_CMD 0x66 /* I/O addresses for host command */ #define EC_LPC_ADDR_HOST_DATA 0x200 #define EC_LPC_ADDR_HOST_CMD 0x204 /* I/O addresses for host command args and params */ /* Protocol version 2 */ #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is * EC_PROTO2_MAX_PARAM_SIZE */ /* Protocol version 3 */ #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ /* * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff * and they tell the kernel that so we have to think of it as two parts. */ #define EC_HOST_CMD_REGION0 0x800 #define EC_HOST_CMD_REGION1 0x880 #define EC_HOST_CMD_REGION_SIZE 0x80 /* EC command register bit functions */ #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ #define EC_LPC_ADDR_MEMMAP 0x900 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ /* The offset address of each type of data in mapped memory. */ #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ /* Unused 0x28 - 0x2f */ #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ /* Unused 0x31 - 0x33 */ #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ /* Battery values are all 32 bits, unless otherwise noted. */ #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ /* Unused 0x4f */ #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ /* Unused 0x84 - 0x8f */ #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ /* Unused 0x91 */ #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ /* 0x94 - 0x99: 1st Accelerometer */ /* 0x9a - 0x9f: 2nd Accelerometer */ #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ /* Unused 0xa6 - 0xdf */ /* * ACPI is unable to access memory mapped data at or above this offset due to * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe * which might be needed by ACPI. */ #define EC_MEMMAP_NO_ACPI 0xe0 /* Define the format of the accelerometer mapped memory status byte. */ #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ #define EC_TEMP_SENSOR_ENTRIES 16 /* * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. * * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. */ #define EC_TEMP_SENSOR_B_ENTRIES 8 /* Special values for mapped temperature sensors */ #define EC_TEMP_SENSOR_NOT_PRESENT 0xff #define EC_TEMP_SENSOR_ERROR 0xfe #define EC_TEMP_SENSOR_NOT_POWERED 0xfd #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc /* * The offset of temperature value stored in mapped memory. This allows * reporting a temperature range of 200K to 454K = -73C to 181C. */ #define EC_TEMP_SENSOR_OFFSET 200 /* * Number of ALS readings at EC_MEMMAP_ALS */ #define EC_ALS_ENTRIES 2 /* * The default value a temperature sensor will return when it is present but * has not been read this boot. This is a reasonable number to avoid * triggering alarms on the host. */ #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ #define EC_BATT_FLAG_AC_PRESENT 0x01 #define EC_BATT_FLAG_BATT_PRESENT 0x02 #define EC_BATT_FLAG_DISCHARGING 0x04 #define EC_BATT_FLAG_CHARGING 0x08 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 /* Set if some of the static/dynamic data is invalid (or outdated). */ #define EC_BATT_FLAG_INVALID_DATA 0x20 /* Switch flags at EC_MEMMAP_SWITCHES */ #define EC_SWITCH_LID_OPEN 0x01 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 /* Was recovery requested via keyboard; now unused. */ #define EC_SWITCH_IGNORE1 0x08 /* Recovery requested via dedicated signal (from servo board) */ #define EC_SWITCH_DEDICATED_RECOVERY 0x10 /* Was fake developer mode switch; now unused. Remove in next refactor. */ #define EC_SWITCH_IGNORE0 0x20 /* Host command interface flags */ /* Host command interface supports LPC args (LPC interface only) */ #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 /* Host command interface supports version 3 protocol */ #define EC_HOST_CMD_FLAG_VERSION_3 0x02 /* Wireless switch flags */ #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ /*****************************************************************************/ /* * ACPI commands * * These are valid ONLY on the ACPI command/data port. */ /* * ACPI Read Embedded Controller * * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). * * Use the following sequence: * * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD * - Wait for EC_LPC_CMDR_PENDING bit to clear * - Write address to EC_LPC_ADDR_ACPI_DATA * - Wait for EC_LPC_CMDR_DATA bit to set * - Read value from EC_LPC_ADDR_ACPI_DATA */ #define EC_CMD_ACPI_READ 0x0080 /* * ACPI Write Embedded Controller * * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). * * Use the following sequence: * * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD * - Wait for EC_LPC_CMDR_PENDING bit to clear * - Write address to EC_LPC_ADDR_ACPI_DATA * - Wait for EC_LPC_CMDR_PENDING bit to clear * - Write value to EC_LPC_ADDR_ACPI_DATA */ #define EC_CMD_ACPI_WRITE 0x0081 /* * ACPI Burst Enable Embedded Controller * * This enables burst mode on the EC to allow the host to issue several * commands back-to-back. While in this mode, writes to mapped multi-byte * data are locked out to ensure data consistency. */ #define EC_CMD_ACPI_BURST_ENABLE 0x0082 /* * ACPI Burst Disable Embedded Controller * * This disables burst mode on the EC and stops preventing EC writes to mapped * multi-byte data. */ #define EC_CMD_ACPI_BURST_DISABLE 0x0083 /* * ACPI Query Embedded Controller * * This clears the lowest-order bit in the currently pending host events, and * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, * event 0x80000000 = 32), or 0 if no event was pending. */ #define EC_CMD_ACPI_QUERY_EVENT 0x0084 /* Valid addresses in ACPI memory space, for read/write commands */ /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ #define EC_ACPI_MEM_VERSION 0x00 /* * Test location; writing value here updates test compliment byte to (0xff - * value). */ #define EC_ACPI_MEM_TEST 0x01 /* Test compliment; writes here are ignored. */ #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 /* Keyboard backlight brightness percent (0 - 100) */ #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ #define EC_ACPI_MEM_FAN_DUTY 0x04 /* * DPTF temp thresholds. Any of the EC's temp sensors can have up to two * independent thresholds attached to them. The current value of the ID * register determines which sensor is affected by the THRESHOLD and COMMIT * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme * as the memory-mapped sensors. The COMMIT register applies those settings. * * The spec does not mandate any way to read back the threshold settings * themselves, but when a threshold is crossed the AP needs a way to determine * which sensor(s) are responsible. Each reading of the ID register clears and * returns one sensor ID that has crossed one of its threshold (in either * direction) since the last read. A value of 0xFF means "no new thresholds * have tripped". Setting or enabling the thresholds for a sensor will clear * the unread event count for that sensor. */ #define EC_ACPI_MEM_TEMP_ID 0x05 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 /* * Here are the bits for the COMMIT register: * bit 0 selects the threshold index for the chosen sensor (0/1) * bit 1 enables/disables the selected threshold (0 = off, 1 = on) * Each write to the commit register affects one threshold. */ #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) /* * Example: * * Set the thresholds for sensor 2 to 50 C and 60 C: * write 2 to [0x05] -- select temp sensor 2 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET * write 0x2 to [0x07] -- enable threshold 0 with this value * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET * write 0x3 to [0x07] -- enable threshold 1 with this value * * Disable the 60 C threshold, leaving the 50 C threshold unchanged: * write 2 to [0x05] -- select temp sensor 2 * write 0x1 to [0x07] -- disable threshold 1 */ /* DPTF battery charging current limit */ #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 /* Charging limit is specified in 64 mA steps */ #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 /* Value to disable DPTF battery charging limit */ #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff /* * Report device orientation * Bits Definition * 3:1 Device DPTF Profile Number (DDPN) * 0 = Reserved for backward compatibility (indicates no valid * profile number. Host should fall back to using TBMD). * 1..7 = DPTF Profile number to indicate to host which table needs * to be loaded. * 0 Tablet Mode Device Indicator (TBMD) */ #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 #define EC_ACPI_MEM_TBMD_SHIFT 0 #define EC_ACPI_MEM_TBMD_MASK 0x1 #define EC_ACPI_MEM_DDPN_SHIFT 1 #define EC_ACPI_MEM_DDPN_MASK 0x7 /* * Report device features. Uses the same format as the host command, except: * * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set * of features", which is of limited interest when the system is already * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since * these are supported, it defaults to 0. * This allows detecting the presence of this field since older versions of * the EC codebase would simply return 0xff to that unknown address. Check * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits * are valid. */ #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 /* * USB Port Power. Each bit indicates whether the corresponding USB ports' power * is enabled (1) or disabled (0). * bit 0 USB port ID 0 * ... * bit 7 USB port ID 7 */ #define EC_ACPI_MEM_USB_PORT_POWER 0x13 /* * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. */ #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 /* Current version of ACPI memory address space */ #define EC_ACPI_MEM_VERSION_CURRENT 2 /* * This header file is used in coreboot both in C and ACPI code. The ACPI code * is pre-processed to handle constants but the ASL compiler is unable to * handle actual C code so keep it separate. */ /* * Attributes for EC request and response packets. Just defining __packed * results in inefficient assembly code on ARM, if the structure is actually * 32-bit aligned, as it should be for all buffers. * * Be very careful when adding these to existing structures. They will round * up the structure size to the specified boundary. * * Also be very careful to make that if a structure is included in some other * parent structure that the alignment will still be true given the packing of * the parent structure. This is particularly important if the sub-structure * will be passed as a pointer to another function, since that function will * not know about the misaligment caused by the parent structure's packing. * * Also be very careful using __packed - particularly when nesting non-packed * structures inside packed ones. In fact, DO NOT use __packed directly; * always use one of these attributes. * * Once everything is annotated properly, the following search strings should * not return ANY matches in this file other than right here: * * "__packed" - generates inefficient code; all sub-structs must also be packed * * "struct [^_]" - all structs should be annotated, except for structs that are * members of other structs/unions (and their original declarations should be * annotated). */ /* * Packed structures make no assumption about alignment, so they do inefficient * byte-wise reads. */ #define __ec_align1 __packed #define __ec_align2 __packed #define __ec_align4 __packed #define __ec_align_size1 __packed #define __ec_align_offset1 __packed #define __ec_align_offset2 __packed #define __ec_todo_packed __packed #define __ec_todo_unpacked /* LPC command status byte masks */ /* EC has written a byte in the data register and host hasn't read it yet */ #define EC_LPC_STATUS_TO_HOST 0x01 /* Host has written a command/data byte and the EC hasn't read it yet */ #define EC_LPC_STATUS_FROM_HOST 0x02 /* EC is processing a command */ #define EC_LPC_STATUS_PROCESSING 0x04 /* Last write to EC was a command, not data */ #define EC_LPC_STATUS_LAST_CMD 0x08 /* EC is in burst mode */ #define EC_LPC_STATUS_BURST_MODE 0x10 /* SCI event is pending (requesting SCI query) */ #define EC_LPC_STATUS_SCI_PENDING 0x20 /* SMI event is pending (requesting SMI query) */ #define EC_LPC_STATUS_SMI_PENDING 0x40 /* (reserved) */ #define EC_LPC_STATUS_RESERVED 0x80 /* * EC is busy. This covers both the EC processing a command, and the host has * written a new command but the EC hasn't picked it up yet. */ #define EC_LPC_STATUS_BUSY_MASK \ (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) /* * Host command response codes (16-bit). Note that response codes should be * stored in a uint16_t rather than directly in a value of this type. */ enum ec_status { EC_RES_SUCCESS = 0, EC_RES_INVALID_COMMAND = 1, EC_RES_ERROR = 2, EC_RES_INVALID_PARAM = 3, EC_RES_ACCESS_DENIED = 4, EC_RES_INVALID_RESPONSE = 5, EC_RES_INVALID_VERSION = 6, EC_RES_INVALID_CHECKSUM = 7, EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ EC_RES_UNAVAILABLE = 9, /* No response available */ EC_RES_TIMEOUT = 10, /* We got a timeout */ EC_RES_OVERFLOW = 11, /* Table / data overflow */ EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ EC_RES_BUS_ERROR = 15, /* Communications bus error */ EC_RES_BUSY = 16, /* Up but too busy. Should retry */ EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ }; /* * Host event codes. Note these are 1-based, not 0-based, because ACPI query * EC command uses code 0 to mean "no event pending". We explicitly specify * each value in the enum listing so they won't change if we delete/insert an * item or rearrange the list (it needs to be stable across platforms, not * just within a single compiled instance). */ enum host_event_code { EC_HOST_EVENT_LID_CLOSED = 1, EC_HOST_EVENT_LID_OPEN = 2, EC_HOST_EVENT_POWER_BUTTON = 3, EC_HOST_EVENT_AC_CONNECTED = 4, EC_HOST_EVENT_AC_DISCONNECTED = 5, EC_HOST_EVENT_BATTERY_LOW = 6, EC_HOST_EVENT_BATTERY_CRITICAL = 7, EC_HOST_EVENT_BATTERY = 8, EC_HOST_EVENT_THERMAL_THRESHOLD = 9, /* Event generated by a device attached to the EC */ EC_HOST_EVENT_DEVICE = 10, EC_HOST_EVENT_THERMAL = 11, EC_HOST_EVENT_USB_CHARGER = 12, EC_HOST_EVENT_KEY_PRESSED = 13, /* * EC has finished initializing the host interface. The host can check * for this event following sending a EC_CMD_REBOOT_EC command to * determine when the EC is ready to accept subsequent commands. */ EC_HOST_EVENT_INTERFACE_READY = 14, /* Keyboard recovery combo has been pressed */ EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, /* Shutdown due to thermal overload */ EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, /* Shutdown due to battery level too low */ EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, /* Suggest that the AP throttle itself */ EC_HOST_EVENT_THROTTLE_START = 18, /* Suggest that the AP resume normal speed */ EC_HOST_EVENT_THROTTLE_STOP = 19, /* Hang detect logic detected a hang and host event timeout expired */ EC_HOST_EVENT_HANG_DETECT = 20, /* Hang detect logic detected a hang and warm rebooted the AP */ EC_HOST_EVENT_HANG_REBOOT = 21, /* PD MCU triggering host event */ EC_HOST_EVENT_PD_MCU = 22, /* Battery Status flags have changed */ EC_HOST_EVENT_BATTERY_STATUS = 23, /* EC encountered a panic, triggering a reset */ EC_HOST_EVENT_PANIC = 24, /* Keyboard fastboot combo has been pressed */ EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, /* EC RTC event occurred */ EC_HOST_EVENT_RTC = 26, /* Emulate MKBP event */ EC_HOST_EVENT_MKBP = 27, /* EC desires to change state of host-controlled USB mux */ EC_HOST_EVENT_USB_MUX = 28, /* TABLET/LAPTOP mode or detachable base attach/detach event */ EC_HOST_EVENT_MODE_CHANGE = 29, /* Keyboard recovery combo with hardware reinitialization */ EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, /* WoV */ EC_HOST_EVENT_WOV = 31, /* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be * considered invalid by the host. This can happen when reading the * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is * not initialized on the EC, or improperly configured on the host. */ EC_HOST_EVENT_INVALID = 32 }; /* Host event mask */ #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) /** * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS * @flags: The host argument flags. * @command_version: Command version. * @data_size: The length of data. * @checksum: Checksum; sum of command + flags + command_version + data_size + * all params/response data bytes. */ struct ec_lpc_host_args { uint8_t flags; uint8_t command_version; uint8_t data_size; uint8_t checksum; } __ec_align4; /* Flags for ec_lpc_host_args.flags */ /* * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command * params. * * If EC gets a command and this flag is not set, this is an old-style command. * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with * unknown length. EC must respond with an old-style response (that is, * without setting EC_HOST_ARGS_FLAG_TO_HOST). */ #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 /* * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. * * If EC responds to a command and this flag is not set, this is an old-style * response. Command version is 0 and response data from EC is at * EC_LPC_ADDR_OLD_PARAM with unknown length. */ #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 /*****************************************************************************/ /* * Byte codes returned by EC over SPI interface. * * These can be used by the AP to debug the EC interface, and to determine * when the EC is not in a state where it will ever get around to responding * to the AP. * * Example of sequence of bytes read from EC for a current good transfer: * 1. - - AP asserts chip select (CS#) * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request * 3. - - EC starts handling CS# interrupt * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in * bytes looking for EC_SPI_FRAME_START * 6. - - EC finishes processing and sets up response * 7. EC_SPI_FRAME_START - AP reads frame byte * 8. (response packet) - AP reads response packet * 9. EC_SPI_PAST_END - Any additional bytes read by AP * 10 - - AP deasserts chip select * 11 - - EC processes CS# interrupt and sets up DMA for * next request * * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than * the following byte values: * EC_SPI_OLD_READY * EC_SPI_RX_READY * EC_SPI_RECEIVING * EC_SPI_PROCESSING * * Then the EC found an error in the request, or was not ready for the request * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, * because the EC is unable to tell when the AP is done sending its request. */ /* * Framing byte which precedes a response packet from the EC. After sending a * request, the AP will clock in bytes until it sees the framing byte, then * clock in the response packet. */ #define EC_SPI_FRAME_START 0xec /* * Padding bytes which are clocked out after the end of a response packet. */ #define EC_SPI_PAST_END 0xed /* * EC is ready to receive, and has ignored the byte sent by the AP. EC expects * that the AP will send a valid packet header (starting with * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. */ #define EC_SPI_RX_READY 0xf8 /* * EC has started receiving the request from the AP, but hasn't started * processing it yet. */ #define EC_SPI_RECEIVING 0xf9 /* EC has received the entire request from the AP and is processing it. */ #define EC_SPI_PROCESSING 0xfa /* * EC received bad data from the AP, such as a packet header with an invalid * length. EC will ignore all data until chip select deasserts. */ #define EC_SPI_RX_BAD_DATA 0xfb /* * EC received data from the AP before it was ready. That is, the AP asserted * chip select and started clocking data before the EC was ready to receive it. * EC will ignore all data until chip select deasserts. */ #define EC_SPI_NOT_READY 0xfc /* * EC was ready to receive a request from the AP. EC has treated the byte sent * by the AP as part of a request packet, or (for old-style ECs) is processing * a fully received packet but is not ready to respond yet. */ #define EC_SPI_OLD_READY 0xfd /*****************************************************************************/ /* * Protocol version 2 for I2C and SPI send a request this way: * * 0 EC_CMD_VERSION0 + (command version) * 1 Command number * 2 Length of params = N * 3..N+2 Params, if any * N+3 8-bit checksum of bytes 0..N+2 * * The corresponding response is: * * 0 Result code (EC_RES_*) * 1 Length of params = M * 2..M+1 Params, if any * M+2 8-bit checksum of bytes 0..M+1 */ #define EC_PROTO2_REQUEST_HEADER_BYTES 3 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ EC_PROTO2_REQUEST_TRAILER_BYTES) #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ EC_PROTO2_RESPONSE_TRAILER_BYTES) /* Parameter length was limited by the LPC interface */ #define EC_PROTO2_MAX_PARAM_SIZE 0xfc /* Maximum request and response packet sizes for protocol version 2 */ #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ EC_PROTO2_MAX_PARAM_SIZE) #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ EC_PROTO2_MAX_PARAM_SIZE) /*****************************************************************************/ /* * Value written to legacy command port / prefix byte to indicate protocol * 3+ structs are being used. Usage is bus-dependent. */ #define EC_COMMAND_PROTOCOL_3 0xda #define EC_HOST_REQUEST_VERSION 3 /** * struct ec_host_request - Version 3 request from host. * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it * receives a header with a version it doesn't know how to * parse. * @checksum: Checksum of request and data; sum of all bytes including checksum * should total to 0. * @command: Command to send (EC_CMD_...) * @command_version: Command version. * @reserved: Unused byte in current protocol version; set to 0. * @data_len: Length of data which follows this header. */ struct ec_host_request { uint8_t struct_version; uint8_t checksum; uint16_t command; uint8_t command_version; uint8_t reserved; uint16_t data_len; } __ec_align4; #define EC_HOST_RESPONSE_VERSION 3 /** * struct ec_host_response - Version 3 response from EC. * @struct_version: Struct version (=3). * @checksum: Checksum of response and data; sum of all bytes including * checksum should total to 0. * @result: EC's response to the command (separate from communication failure) * @data_len: Length of data which follows this header. * @reserved: Unused bytes in current protocol version; set to 0. */ struct ec_host_response { uint8_t struct_version; uint8_t checksum; uint16_t result; uint16_t data_len; uint16_t reserved; } __ec_align4; /*****************************************************************************/ /* * Host command protocol V4. * * Packets always start with a request or response header. They are followed * by data_len bytes of data. If the data_crc_present flag is set, the data * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 * polynomial. * * Host algorithm when sending a request q: * * 101) tries_left=(some value, e.g. 3); * 102) q.seq_num++ * 103) q.seq_dup=0 * 104) Calculate q.header_crc. * 105) Send request q to EC. * 106) Wait for response r. Go to 201 if received or 301 if timeout. * * 201) If r.struct_version != 4, go to 301. * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. * 204) If r.seq_num != q.seq_num, go to 301. * 205) If r.seq_dup == q.seq_dup, return success. * 207) If r.seq_dup == 1, go to 301. * 208) Return error. * * 301) If --tries_left <= 0, return error. * 302) If q.seq_dup == 1, go to 105. * 303) q.seq_dup = 1 * 304) Go to 104. * * EC algorithm when receiving a request q. * EC has response buffer r, error buffer e. * * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION * and go to 301 * 102) If q.header_crc mismatches calculated CRC, set e.result = * EC_RES_INVALID_HEADER_CRC and go to 301 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC * and go to 301. * 104) If q.seq_dup == 0, go to 201. * 105) If q.seq_num != r.seq_num, go to 201. * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. * * 201) Process request q into response r. * 202) r.seq_num = q.seq_num * 203) r.seq_dup = q.seq_dup * 204) Calculate r.header_crc * 205) If r.data_len > 0 and data is no longer available, set e.result = * EC_RES_DUP_UNAVAILABLE and go to 301. * 206) Send response r. * * 301) e.seq_num = q.seq_num * 302) e.seq_dup = q.seq_dup * 303) Calculate e.header_crc. * 304) Send error response e. */ /* Version 4 request from host */ struct ec_host_request4 { /* * bits 0-3: struct_version: Structure version (=4) * bit 4: is_response: Is response (=0) * bits 5-6: seq_num: Sequence number * bit 7: seq_dup: Sequence duplicate flag */ uint8_t fields0; /* * bits 0-4: command_version: Command version * bits 5-6: Reserved (set 0, ignore on read) * bit 7: data_crc_present: Is data CRC present after data */ uint8_t fields1; /* Command code (EC_CMD_*) */ uint16_t command; /* Length of data which follows this header (not including data CRC) */ uint16_t data_len; /* Reserved (set 0, ignore on read) */ uint8_t reserved; /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ uint8_t header_crc; } __ec_align4; /* Version 4 response from EC */ struct ec_host_response4 { /* * bits 0-3: struct_version: Structure version (=4) * bit 4: is_response: Is response (=1) * bits 5-6: seq_num: Sequence number * bit 7: seq_dup: Sequence duplicate flag */ uint8_t fields0; /* * bits 0-6: Reserved (set 0, ignore on read) * bit 7: data_crc_present: Is data CRC present after data */ uint8_t fields1; /* Result code (EC_RES_*) */ uint16_t result; /* Length of data which follows this header (not including data CRC) */ uint16_t data_len; /* Reserved (set 0, ignore on read) */ uint8_t reserved; /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ uint8_t header_crc; } __ec_align4; /* Fields in fields0 byte */ #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 /* Fields in fields1 byte */ #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 /*****************************************************************************/ /* * Notes on commands: * * Each command is an 16-bit command value. Commands which take params or * return response data specify structures for that data. If no structure is * specified, the command does not input or output data, respectively. * Parameter/response length is implicit in the structs. Some underlying * communication protocols (I2C, SPI) may add length or checksum headers, but * those are implementation-dependent and not defined here. * * All commands MUST be #defined to be 4-digit UPPER CASE hex values * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. */ /*****************************************************************************/ /* General / test commands */ /* * Get protocol version, used to deal with non-backward compatible protocol * changes. */ #define EC_CMD_PROTO_VERSION 0x0000 /** * struct ec_response_proto_version - Response to the proto version command. * @version: The protocol version. */ struct ec_response_proto_version { uint32_t version; } __ec_align4; /* * Hello. This is a simple command to test the EC is responsive to * commands. */ #define EC_CMD_HELLO 0x0001 /** * struct ec_params_hello - Parameters to the hello command. * @in_data: Pass anything here. */ struct ec_params_hello { uint32_t in_data; } __ec_align4; /** * struct ec_response_hello - Response to the hello command. * @out_data: Output will be in_data + 0x01020304. */ struct ec_response_hello { uint32_t out_data; } __ec_align4; /* Get version number */ #define EC_CMD_GET_VERSION 0x0002 enum ec_current_image { EC_IMAGE_UNKNOWN = 0, EC_IMAGE_RO, EC_IMAGE_RW }; /** * struct ec_response_get_version - Response to the get version command. * @version_string_ro: Null-terminated RO firmware version string. * @version_string_rw: Null-terminated RW firmware version string. * @reserved: Unused bytes; was previously RW-B firmware version string. * @current_image: One of ec_current_image. */ struct ec_response_get_version { char version_string_ro[32]; char version_string_rw[32]; char reserved[32]; uint32_t current_image; } __ec_align4; /* Read test */ #define EC_CMD_READ_TEST 0x0003 /** * struct ec_params_read_test - Parameters for the read test command. * @offset: Starting value for read buffer. * @size: Size to read in bytes. */ struct ec_params_read_test { uint32_t offset; uint32_t size; } __ec_align4; /** * struct ec_response_read_test - Response to the read test command. * @data: Data returned by the read test command. */ struct ec_response_read_test { uint32_t data[32]; } __ec_align4; /* * Get build information * * Response is null-terminated string. */ #define EC_CMD_GET_BUILD_INFO 0x0004 /* Get chip info */ #define EC_CMD_GET_CHIP_INFO 0x0005 /** * struct ec_response_get_chip_info - Response to the get chip info command. * @vendor: Null-terminated string for chip vendor. * @name: Null-terminated string for chip name. * @revision: Null-terminated string for chip mask version. */ struct ec_response_get_chip_info { char vendor[32]; char name[32]; char revision[32]; } __ec_align4; /* Get board HW version */ #define EC_CMD_GET_BOARD_VERSION 0x0006 /** * struct ec_response_board_version - Response to the board version command. * @board_version: A monotonously incrementing number. */ struct ec_response_board_version { uint16_t board_version; } __ec_align2; /* * Read memory-mapped data. * * This is an alternate interface to memory-mapped data for bus protocols * which don't support direct-mapped memory - I2C, SPI, etc. * * Response is params.size bytes of data. */ #define EC_CMD_READ_MEMMAP 0x0007 /** * struct ec_params_read_memmap - Parameters for the read memory map command. * @offset: Offset in memmap (EC_MEMMAP_*). * @size: Size to read in bytes. */ struct ec_params_read_memmap { uint8_t offset; uint8_t size; } __ec_align1; /* Read versions supported for a command */ #define EC_CMD_GET_CMD_VERSIONS 0x0008 /** * struct ec_params_get_cmd_versions - Parameters for the get command versions. * @cmd: Command to check. */ struct ec_params_get_cmd_versions { uint8_t cmd; } __ec_align1; /** * struct ec_params_get_cmd_versions_v1 - Parameters for the get command * versions (v1) * @cmd: Command to check. */ struct ec_params_get_cmd_versions_v1 { uint16_t cmd; } __ec_align2; /** * struct ec_response_get_cmd_version - Response to the get command versions. * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with * a desired version. */ struct ec_response_get_cmd_versions { uint32_t version_mask; } __ec_align4; /* * Check EC communications status (busy). This is needed on i2c/spi but not * on lpc since it has its own out-of-band busy indicator. * * lpc must read the status from the command register. Attempting this on * lpc will overwrite the args/parameter space and corrupt its data. */ #define EC_CMD_GET_COMMS_STATUS 0x0009 /* Avoid using ec_status which is for return values */ enum ec_comms_status { EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ }; /** * struct ec_response_get_comms_status - Response to the get comms status * command. * @flags: Mask of enum ec_comms_status. */ struct ec_response_get_comms_status { uint32_t flags; /* Mask of enum ec_comms_status */ } __ec_align4; /* Fake a variety of responses, purely for testing purposes. */ #define EC_CMD_TEST_PROTOCOL 0x000A /* Tell the EC what to send back to us. */ struct ec_params_test_protocol { uint32_t ec_result; uint32_t ret_len; uint8_t buf[32]; } __ec_align4; /* Here it comes... */ struct ec_response_test_protocol { uint8_t buf[32]; } __ec_align4; /* Get protocol information */ #define EC_CMD_GET_PROTOCOL_INFO 0x000B /* Flags for ec_response_get_protocol_info.flags */ /* EC_RES_IN_PROGRESS may be returned if a command is slow */ #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) /** * struct ec_response_get_protocol_info - Response to the get protocol info. * @protocol_versions: Bitmask of protocol versions supported (1 << n means * version n). * @max_request_packet_size: Maximum request packet size in bytes. * @max_response_packet_size: Maximum response packet size in bytes. * @flags: see EC_PROTOCOL_INFO_* */ struct ec_response_get_protocol_info { /* Fields which exist if at least protocol version 3 supported */ uint32_t protocol_versions; uint16_t max_request_packet_size; uint16_t max_response_packet_size; uint32_t flags; } __ec_align4; /*****************************************************************************/ /* Get/Set miscellaneous values */ /* The upper byte of .flags tells what to do (nothing means "get") */ #define EC_GSV_SET 0x80000000 /* * The lower three bytes of .flags identifies the parameter, if that has * meaning for an individual command. */ #define EC_GSV_PARAM_MASK 0x00ffffff struct ec_params_get_set_value { uint32_t flags; uint32_t value; } __ec_align4; struct ec_response_get_set_value { uint32_t flags; uint32_t value; } __ec_align4; /* More than one command can use these structs to get/set parameters. */ #define EC_CMD_GSV_PAUSE_IN_S5 0x000C /*****************************************************************************/ /* List the features supported by the firmware */ #define EC_CMD_GET_FEATURES 0x000D /* Supported features */ enum ec_feature_code { /* * This image contains a limited set of features. Another image * in RW partition may support more features. */ EC_FEATURE_LIMITED = 0, /* * Commands for probing/reading/writing/erasing the flash in the * EC are present. */ EC_FEATURE_FLASH = 1, /* * Can control the fan speed directly. */ EC_FEATURE_PWM_FAN = 2, /* * Can control the intensity of the keyboard backlight. */ EC_FEATURE_PWM_KEYB = 3, /* * Support Google lightbar, introduced on Pixel. */ EC_FEATURE_LIGHTBAR = 4, /* Control of LEDs */ EC_FEATURE_LED = 5, /* Exposes an interface to control gyro and sensors. * The host goes through the EC to access these sensors. * In addition, the EC may provide composite sensors, like lid angle. */ EC_FEATURE_MOTION_SENSE = 6, /* The keyboard is controlled by the EC */ EC_FEATURE_KEYB = 7, /* The AP can use part of the EC flash as persistent storage. */ EC_FEATURE_PSTORE = 8, /* The EC monitors BIOS port 80h, and can return POST codes. */ EC_FEATURE_PORT80 = 9, /* * Thermal management: include TMP specific commands. * Higher level than direct fan control. */ EC_FEATURE_THERMAL = 10, /* Can switch the screen backlight on/off */ EC_FEATURE_BKLIGHT_SWITCH = 11, /* Can switch the wifi module on/off */ EC_FEATURE_WIFI_SWITCH = 12, /* Monitor host events, through for example SMI or SCI */ EC_FEATURE_HOST_EVENTS = 13, /* The EC exposes GPIO commands to control/monitor connected devices. */ EC_FEATURE_GPIO = 14, /* The EC can send i2c messages to downstream devices. */ EC_FEATURE_I2C = 15, /* Command to control charger are included */ EC_FEATURE_CHARGER = 16, /* Simple battery support. */ EC_FEATURE_BATTERY = 17, /* * Support Smart battery protocol * (Common Smart Battery System Interface Specification) */ EC_FEATURE_SMART_BATTERY = 18, /* EC can detect when the host hangs. */ EC_FEATURE_HANG_DETECT = 19, /* Report power information, for pit only */ EC_FEATURE_PMU = 20, /* Another Cros EC device is present downstream of this one */ EC_FEATURE_SUB_MCU = 21, /* Support USB Power delivery (PD) commands */ EC_FEATURE_USB_PD = 22, /* Control USB multiplexer, for audio through USB port for instance. */ EC_FEATURE_USB_MUX = 23, /* Motion Sensor code has an internal software FIFO */ EC_FEATURE_MOTION_SENSE_FIFO = 24, /* Support temporary secure vstore */ EC_FEATURE_VSTORE = 25, /* EC decides on USB-C SS mux state, muxes configured by host */ EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, /* EC has RTC feature that can be controlled by host commands */ EC_FEATURE_RTC = 27, /* The MCU exposes a Fingerprint sensor */ EC_FEATURE_FINGERPRINT = 28, /* The MCU exposes a Touchpad */ EC_FEATURE_TOUCHPAD = 29, /* The MCU has RWSIG task enabled */ EC_FEATURE_RWSIG = 30, /* EC has device events support */ EC_FEATURE_DEVICE_EVENT = 31, /* EC supports the unified wake masks for LPC/eSPI systems */ EC_FEATURE_UNIFIED_WAKE_MASKS = 32, /* EC supports 64-bit host events */ EC_FEATURE_HOST_EVENT64 = 33, /* EC runs code in RAM (not in place, a.k.a. XIP) */ EC_FEATURE_EXEC_IN_RAM = 34, /* EC supports CEC commands */ EC_FEATURE_CEC = 35, /* EC supports tight sensor timestamping. */ EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, /* * EC supports tablet mode detection aligned to Chrome and allows * setting of threshold by host command using * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, /* The MCU is a System Companion Processor (SCP). */ EC_FEATURE_SCP = 39, /* The MCU is an Integrated Sensor Hub */ EC_FEATURE_ISH = 40, /* New TCPMv2 TYPEC_ prefaced commands supported */ EC_FEATURE_TYPEC_CMD = 41, /* * The EC will wait for direction from the AP to enter Type-C alternate * modes or USB4. */ EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, /* * The EC will wait for an acknowledge from the AP after setting the * mux. */ EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, }; #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) struct ec_response_get_features { uint32_t flags[2]; } __ec_align4; /*****************************************************************************/ /* Get the board's SKU ID from EC */ #define EC_CMD_GET_SKU_ID 0x000E /* Set SKU ID from AP */ #define EC_CMD_SET_SKU_ID 0x000F struct ec_sku_id_info { uint32_t sku_id; } __ec_align4; /*****************************************************************************/ /* Flash commands */ /* Get flash info */ #define EC_CMD_FLASH_INFO 0x0010 #define EC_VER_FLASH_INFO 2 /** * struct ec_response_flash_info - Response to the flash info command. * @flash_size: Usable flash size in bytes. * @write_block_size: Write block size. Write offset and size must be a * multiple of this. * @erase_block_size: Erase block size. Erase offset and size must be a * multiple of this. * @protect_block_size: Protection block size. Protection offset and size * must be a multiple of this. * * Version 0 returns these fields. */ struct ec_response_flash_info { uint32_t flash_size; uint32_t write_block_size; uint32_t erase_block_size; uint32_t protect_block_size; } __ec_align4; /* * Flags for version 1+ flash info command * EC flash erases bits to 0 instead of 1. */ #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) /* * Flash must be selected for read/write/erase operations to succeed. This may * be necessary on a chip where write/erase can be corrupted by other board * activity, or where the chip needs to enable some sort of programming voltage, * or where the read/write/erase operations require cleanly suspending other * chip functionality. */ #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) /** * struct ec_response_flash_info_1 - Response to the flash info v1 command. * @flash_size: Usable flash size in bytes. * @write_block_size: Write block size. Write offset and size must be a * multiple of this. * @erase_block_size: Erase block size. Erase offset and size must be a * multiple of this. * @protect_block_size: Protection block size. Protection offset and size * must be a multiple of this. * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if * size is exactly this and offset is a multiple of this. * For example, an EC may have a write buffer which can do * half-page operations if data is aligned, and a slower * word-at-a-time write mode. * @flags: Flags; see EC_FLASH_INFO_* * * Version 1 returns the same initial fields as version 0, with additional * fields following. * * gcc anonymous structs don't seem to get along with the __packed directive; * if they did we'd define the version 0 structure as a sub-structure of this * one. * * Version 2 supports flash banks of different sizes: * The caller specified the number of banks it has preallocated * (num_banks_desc) * The EC returns the number of banks describing the flash memory. * It adds banks descriptions up to num_banks_desc. */ struct ec_response_flash_info_1 { /* Version 0 fields; see above for description */ uint32_t flash_size; uint32_t write_block_size; uint32_t erase_block_size; uint32_t protect_block_size; /* Version 1 adds these fields: */ uint32_t write_ideal_size; uint32_t flags; } __ec_align4; struct ec_params_flash_info_2 { /* Number of banks to describe */ uint16_t num_banks_desc; /* Reserved; set 0; ignore on read */ uint8_t reserved[2]; } __ec_align4; struct ec_flash_bank { /* Number of sector is in this bank. */ uint16_t count; /* Size in power of 2 of each sector (8 --> 256 bytes) */ uint8_t size_exp; /* Minimal write size for the sectors in this bank */ uint8_t write_size_exp; /* Erase size for the sectors in this bank */ uint8_t erase_size_exp; /* Size for write protection, usually identical to erase size. */ uint8_t protect_size_exp; /* Reserved; set 0; ignore on read */ uint8_t reserved[2]; }; struct ec_response_flash_info_2 { /* Total flash in the EC. */ uint32_t flash_size; /* Flags; see EC_FLASH_INFO_* */ uint32_t flags; /* Maximum size to use to send data to write to the EC. */ uint32_t write_ideal_size; /* Number of banks present in the EC. */ uint16_t num_banks_total; /* Number of banks described in banks array. */ uint16_t num_banks_desc; struct ec_flash_bank banks[]; } __ec_align4; /* * Read flash * * Response is params.size bytes of data. */ #define EC_CMD_FLASH_READ 0x0011 /** * struct ec_params_flash_read - Parameters for the flash read command. * @offset: Byte offset to read. * @size: Size to read in bytes. */ struct ec_params_flash_read { uint32_t offset; uint32_t size; } __ec_align4; /* Write flash */ #define EC_CMD_FLASH_WRITE 0x0012 #define EC_VER_FLASH_WRITE 1 /* Version 0 of the flash command supported only 64 bytes of data */ #define EC_FLASH_WRITE_VER0_SIZE 64 /** * struct ec_params_flash_write - Parameters for the flash write command. * @offset: Byte offset to write. * @size: Size to write in bytes. */ struct ec_params_flash_write { uint32_t offset; uint32_t size; /* Followed by data to write */ } __ec_align4; /* Erase flash */ #define EC_CMD_FLASH_ERASE 0x0013 /** * struct ec_params_flash_erase - Parameters for the flash erase command, v0. * @offset: Byte offset to erase. * @size: Size to erase in bytes. */ struct ec_params_flash_erase { uint32_t offset; uint32_t size; } __ec_align4; /* * v1 add async erase: * subcommands can returns: * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. * EC_RES_ERROR : other errors. * EC_RES_BUSY : an existing erase operation is in progress. * EC_RES_ACCESS_DENIED: Trying to erase running image. * * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just * properly queued. The user must call ERASE_GET_RESULT subcommand to get * the proper result. * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. * ERASE_GET_RESULT command may timeout on EC where flash access is not * permitted while erasing. (For instance, STM32F4). */ enum ec_flash_erase_cmd { FLASH_ERASE_SECTOR, /* Erase and wait for result */ FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ }; /** * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. * @cmd: One of ec_flash_erase_cmd. * @reserved: Pad byte; currently always contains 0. * @flag: No flags defined yet; set to 0. * @params: Same as v0 parameters. */ struct ec_params_flash_erase_v1 { uint8_t cmd; uint8_t reserved; uint16_t flag; struct ec_params_flash_erase params; } __ec_align4; /* * Get/set flash protection. * * If mask!=0, sets/clear the requested bits of flags. Depending on the * firmware write protect GPIO, not all flags will take effect immediately; * some flags require a subsequent hard reset to take effect. Check the * returned flags bits to see what actually happened. * * If mask=0, simply returns the current flags state. */ #define EC_CMD_FLASH_PROTECT 0x0015 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ /* Flags for flash protection */ /* RO flash code protected when the EC boots */ #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) /* * RO flash code protected now. If this bit is set, at-boot status cannot * be changed. */ #define EC_FLASH_PROTECT_RO_NOW BIT(1) /* Entire flash code protected now, until reboot. */ #define EC_FLASH_PROTECT_ALL_NOW BIT(2) /* Flash write protect GPIO is asserted now */ #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) /* * Error - flash protection is in inconsistent state. At least one bank of * flash which should be protected is not protected. Usually fixed by * re-requesting the desired flags, or by a hard reset if that fails. */ #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) /* Entire flash code protected when the EC boots */ #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) /* RW flash code protected when the EC boots */ #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) /* RW flash code protected now. */ #define EC_FLASH_PROTECT_RW_NOW BIT(8) /* Rollback information flash region protected when the EC boots */ #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) /* Rollback information flash region protected now */ #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) /** * struct ec_params_flash_protect - Parameters for the flash protect command. * @mask: Bits in flags to apply. * @flags: New flags to apply. */ struct ec_params_flash_protect { uint32_t mask; uint32_t flags; } __ec_align4; /** * struct ec_response_flash_protect - Response to the flash protect command. * @flags: Current value of flash protect flags. * @valid_flags: Flags which are valid on this platform. This allows the * caller to distinguish between flags which aren't set vs. flags * which can't be set on this platform. * @writable_flags: Flags which can be changed given the current protection * state. */ struct ec_response_flash_protect { uint32_t flags; uint32_t valid_flags; uint32_t writable_flags; } __ec_align4; /* * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash * write protect. These commands may be reused with version > 0. */ /* Get the region offset/size */ #define EC_CMD_FLASH_REGION_INFO 0x0016 #define EC_VER_FLASH_REGION_INFO 1 enum ec_flash_region { /* Region which holds read-only EC image */ EC_FLASH_REGION_RO = 0, /* * Region which holds active RW image. 'Active' is different from * 'running'. Active means 'scheduled-to-run'. Since RO image always * scheduled to run, active/non-active applies only to RW images (for * the same reason 'update' applies only to RW images. It's a state of * an image on a flash. Running image can be RO, RW_A, RW_B but active * image can only be RW_A or RW_B. In recovery mode, an active RW image * doesn't enter 'running' state but it's still active on a flash. */ EC_FLASH_REGION_ACTIVE, /* * Region which should be write-protected in the factory (a superset of * EC_FLASH_REGION_RO) */ EC_FLASH_REGION_WP_RO, /* Region which holds updatable (non-active) RW image */ EC_FLASH_REGION_UPDATE, /* Number of regions */ EC_FLASH_REGION_COUNT, }; /* * 'RW' is vague if there are multiple RW images; we mean the active one, * so the old constant is deprecated. */ #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE /** * struct ec_params_flash_region_info - Parameters for the flash region info * command. * @region: Flash region; see EC_FLASH_REGION_* */ struct ec_params_flash_region_info { uint32_t region; } __ec_align4; struct ec_response_flash_region_info { uint32_t offset; uint32_t size; } __ec_align4; /* Read/write VbNvContext */ #define EC_CMD_VBNV_CONTEXT 0x0017 #define EC_VER_VBNV_CONTEXT 1 #define EC_VBNV_BLOCK_SIZE 16 enum ec_vbnvcontext_op { EC_VBNV_CONTEXT_OP_READ, EC_VBNV_CONTEXT_OP_WRITE, }; struct ec_params_vbnvcontext { uint32_t op; uint8_t block[EC_VBNV_BLOCK_SIZE]; } __ec_align4; struct ec_response_vbnvcontext { uint8_t block[EC_VBNV_BLOCK_SIZE]; } __ec_align4; /* Get SPI flash information */ #define EC_CMD_FLASH_SPI_INFO 0x0018 struct ec_response_flash_spi_info { /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ uint8_t jedec[3]; /* Pad byte; currently always contains 0 */ uint8_t reserved0; /* Manufacturer / device ID from command 0x90 */ uint8_t mfr_dev_id[2]; /* Status registers from command 0x05 and 0x35 */ uint8_t sr1, sr2; } __ec_align1; /* Select flash during flash operations */ #define EC_CMD_FLASH_SELECT 0x0019 /** * struct ec_params_flash_select - Parameters for the flash select command. * @select: 1 to select flash, 0 to deselect flash */ struct ec_params_flash_select { uint8_t select; } __ec_align4; /*****************************************************************************/ /* PWM commands */ /* Get fan target RPM */ #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 struct ec_response_pwm_get_fan_rpm { uint32_t rpm; } __ec_align4; /* Set target fan RPM */ #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 /* Version 0 of input params */ struct ec_params_pwm_set_fan_target_rpm_v0 { uint32_t rpm; } __ec_align4; /* Version 1 of input params */ struct ec_params_pwm_set_fan_target_rpm_v1 { uint32_t rpm; uint8_t fan_idx; } __ec_align_size1; /* Get keyboard backlight */ /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 struct ec_response_pwm_get_keyboard_backlight { uint8_t percent; uint8_t enabled; } __ec_align1; /* Set keyboard backlight */ /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 struct ec_params_pwm_set_keyboard_backlight { uint8_t percent; } __ec_align1; /* Set target fan PWM duty cycle */ #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 /* Version 0 of input params */ struct ec_params_pwm_set_fan_duty_v0 { uint32_t percent; } __ec_align4; /* Version 1 of input params */ struct ec_params_pwm_set_fan_duty_v1 { uint32_t percent; uint8_t fan_idx; } __ec_align_size1; #define EC_CMD_PWM_SET_DUTY 0x0025 /* 16 bit duty cycle, 0xffff = 100% */ #define EC_PWM_MAX_DUTY 0xffff enum ec_pwm_type { /* All types, indexed by board-specific enum pwm_channel */ EC_PWM_TYPE_GENERIC = 0, /* Keyboard backlight */ EC_PWM_TYPE_KB_LIGHT, /* Display backlight */ EC_PWM_TYPE_DISPLAY_LIGHT, EC_PWM_TYPE_COUNT, }; struct ec_params_pwm_set_duty { uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ uint8_t pwm_type; /* ec_pwm_type */ uint8_t index; /* Type-specific index, or 0 if unique */ } __ec_align4; #define EC_CMD_PWM_GET_DUTY 0x0026 struct ec_params_pwm_get_duty { uint8_t pwm_type; /* ec_pwm_type */ uint8_t index; /* Type-specific index, or 0 if unique */ } __ec_align1; struct ec_response_pwm_get_duty { uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ } __ec_align2; /*****************************************************************************/ /* * Lightbar commands. This looks worse than it is. Since we only use one HOST * command to say "talk to the lightbar", we put the "and tell it to do X" part * into a subcommand. We'll make separate structs for subcommands with * different input args, so that we know how much to expect. */ #define EC_CMD_LIGHTBAR_CMD 0x0028 struct rgb_s { uint8_t r, g, b; } __ec_todo_unpacked; #define LB_BATTERY_LEVELS 4 /* * List of tweakable parameters. NOTE: It's __packed so it can be sent in a * host command, but the alignment is the same regardless. Keep it that way. */ struct lightbar_params_v0 { /* Timing */ int32_t google_ramp_up; int32_t google_ramp_down; int32_t s3s0_ramp_up; int32_t s0_tick_delay[2]; /* AC=0/1 */ int32_t s0a_tick_delay[2]; /* AC=0/1 */ int32_t s0s3_ramp_down; int32_t s3_sleep_for; int32_t s3_ramp_up; int32_t s3_ramp_down; /* Oscillation */ uint8_t new_s0; uint8_t osc_min[2]; /* AC=0/1 */ uint8_t osc_max[2]; /* AC=0/1 */ uint8_t w_ofs[2]; /* AC=0/1 */ /* Brightness limits based on the backlight and AC. */ uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ uint8_t bright_bl_on_min[2]; /* AC=0/1 */ uint8_t bright_bl_on_max[2]; /* AC=0/1 */ /* Battery level thresholds */ uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; /* Map [AC][battery_level] to color index */ uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ } __ec_todo_packed; struct lightbar_params_v1 { /* Timing */ int32_t google_ramp_up; int32_t google_ramp_down; int32_t s3s0_ramp_up; int32_t s0_tick_delay[2]; /* AC=0/1 */ int32_t s0a_tick_delay[2]; /* AC=0/1 */ int32_t s0s3_ramp_down; int32_t s3_sleep_for; int32_t s3_ramp_up; int32_t s3_ramp_down; int32_t s5_ramp_up; int32_t s5_ramp_down; int32_t tap_tick_delay; int32_t tap_gate_delay; int32_t tap_display_time; /* Tap-for-battery params */ uint8_t tap_pct_red; uint8_t tap_pct_green; uint8_t tap_seg_min_on; uint8_t tap_seg_max_on; uint8_t tap_seg_osc; uint8_t tap_idx[3]; /* Oscillation */ uint8_t osc_min[2]; /* AC=0/1 */ uint8_t osc_max[2]; /* AC=0/1 */ uint8_t w_ofs[2]; /* AC=0/1 */ /* Brightness limits based on the backlight and AC. */ uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ uint8_t bright_bl_on_min[2]; /* AC=0/1 */ uint8_t bright_bl_on_max[2]; /* AC=0/1 */ /* Battery level thresholds */ uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; /* Map [AC][battery_level] to color index */ uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ /* s5: single color pulse on inhibited power-up */ uint8_t s5_idx; /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ } __ec_todo_packed; /* Lightbar command params v2 * crbug.com/467716 * * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by * logical groups to make it more manageable ( < 120 bytes). * * NOTE: Each of these groups must be less than 120 bytes. */ struct lightbar_params_v2_timing { /* Timing */ int32_t google_ramp_up; int32_t google_ramp_down; int32_t s3s0_ramp_up; int32_t s0_tick_delay[2]; /* AC=0/1 */ int32_t s0a_tick_delay[2]; /* AC=0/1 */ int32_t s0s3_ramp_down; int32_t s3_sleep_for; int32_t s3_ramp_up; int32_t s3_ramp_down; int32_t s5_ramp_up; int32_t s5_ramp_down; int32_t tap_tick_delay; int32_t tap_gate_delay; int32_t tap_display_time; } __ec_todo_packed; struct lightbar_params_v2_tap { /* Tap-for-battery params */ uint8_t tap_pct_red; uint8_t tap_pct_green; uint8_t tap_seg_min_on; uint8_t tap_seg_max_on; uint8_t tap_seg_osc; uint8_t tap_idx[3]; } __ec_todo_packed; struct lightbar_params_v2_oscillation { /* Oscillation */ uint8_t osc_min[2]; /* AC=0/1 */ uint8_t osc_max[2]; /* AC=0/1 */ uint8_t w_ofs[2]; /* AC=0/1 */ } __ec_todo_packed; struct lightbar_params_v2_brightness { /* Brightness limits based on the backlight and AC. */ uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ uint8_t bright_bl_on_min[2]; /* AC=0/1 */ uint8_t bright_bl_on_max[2]; /* AC=0/1 */ } __ec_todo_packed; struct lightbar_params_v2_thresholds { /* Battery level thresholds */ uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; } __ec_todo_packed; struct lightbar_params_v2_colors { /* Map [AC][battery_level] to color index */ uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ /* s5: single color pulse on inhibited power-up */ uint8_t s5_idx; /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ } __ec_todo_packed; /* Lightbar program. */ #define EC_LB_PROG_LEN 192 struct lightbar_program { uint8_t size; uint8_t data[EC_LB_PROG_LEN]; } __ec_todo_unpacked; struct ec_params_lightbar { uint8_t cmd; /* Command (see enum lightbar_command) */ union { /* * The following commands have no args: * * dump, off, on, init, get_seq, get_params_v0, get_params_v1, * version, get_brightness, get_demo, suspend, resume, * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, * get_params_v2_bright, get_params_v2_thlds, * get_params_v2_colors * * Don't use an empty struct, because C++ hates that. */ struct __ec_todo_unpacked { uint8_t num; } set_brightness, seq, demo; struct __ec_todo_unpacked { uint8_t ctrl, reg, value; } reg; struct __ec_todo_unpacked { uint8_t led, red, green, blue; } set_rgb; struct __ec_todo_unpacked { uint8_t led; } get_rgb; struct __ec_todo_unpacked { uint8_t enable; } manual_suspend_ctrl; struct lightbar_params_v0 set_params_v0; struct lightbar_params_v1 set_params_v1; struct lightbar_params_v2_timing set_v2par_timing; struct lightbar_params_v2_tap set_v2par_tap; struct lightbar_params_v2_oscillation set_v2par_osc; struct lightbar_params_v2_brightness set_v2par_bright; struct lightbar_params_v2_thresholds set_v2par_thlds; struct lightbar_params_v2_colors set_v2par_colors; struct lightbar_program set_program; }; } __ec_todo_packed; struct ec_response_lightbar { union { struct __ec_todo_unpacked { struct __ec_todo_unpacked { uint8_t reg; uint8_t ic0; uint8_t ic1; } vals[23]; } dump; struct __ec_todo_unpacked { uint8_t num; } get_seq, get_brightness, get_demo; struct lightbar_params_v0 get_params_v0; struct lightbar_params_v1 get_params_v1; struct lightbar_params_v2_timing get_params_v2_timing; struct lightbar_params_v2_tap get_params_v2_tap; struct lightbar_params_v2_oscillation get_params_v2_osc; struct lightbar_params_v2_brightness get_params_v2_bright; struct lightbar_params_v2_thresholds get_params_v2_thlds; struct lightbar_params_v2_colors get_params_v2_colors; struct __ec_todo_unpacked { uint32_t num; uint32_t flags; } version; struct __ec_todo_unpacked { uint8_t red, green, blue; } get_rgb; /* * The following commands have no response: * * off, on, init, set_brightness, seq, reg, set_rgb, demo, * set_params_v0, set_params_v1, set_program, * manual_suspend_ctrl, suspend, resume, set_v2par_timing, * set_v2par_tap, set_v2par_osc, set_v2par_bright, * set_v2par_thlds, set_v2par_colors */ }; } __ec_todo_packed; /* Lightbar commands */ enum lightbar_command { LIGHTBAR_CMD_DUMP = 0, LIGHTBAR_CMD_OFF = 1, LIGHTBAR_CMD_ON = 2, LIGHTBAR_CMD_INIT = 3, LIGHTBAR_CMD_SET_BRIGHTNESS = 4, LIGHTBAR_CMD_SEQ = 5, LIGHTBAR_CMD_REG = 6, LIGHTBAR_CMD_SET_RGB = 7, LIGHTBAR_CMD_GET_SEQ = 8, LIGHTBAR_CMD_DEMO = 9, LIGHTBAR_CMD_GET_PARAMS_V0 = 10, LIGHTBAR_CMD_SET_PARAMS_V0 = 11, LIGHTBAR_CMD_VERSION = 12, LIGHTBAR_CMD_GET_BRIGHTNESS = 13, LIGHTBAR_CMD_GET_RGB = 14, LIGHTBAR_CMD_GET_DEMO = 15, LIGHTBAR_CMD_GET_PARAMS_V1 = 16, LIGHTBAR_CMD_SET_PARAMS_V1 = 17, LIGHTBAR_CMD_SET_PROGRAM = 18, LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, LIGHTBAR_CMD_SUSPEND = 20, LIGHTBAR_CMD_RESUME = 21, LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, LIGHTBAR_NUM_CMDS }; /*****************************************************************************/ /* LED control commands */ #define EC_CMD_LED_CONTROL 0x0029 enum ec_led_id { /* LED to indicate battery state of charge */ EC_LED_ID_BATTERY_LED = 0, /* * LED to indicate system power state (on or in suspend). * May be on power button or on C-panel. */ EC_LED_ID_POWER_LED, /* LED on power adapter or its plug */ EC_LED_ID_ADAPTER_LED, /* LED to indicate left side */ EC_LED_ID_LEFT_LED, /* LED to indicate right side */ EC_LED_ID_RIGHT_LED, /* LED to indicate recovery mode with HW_REINIT */ EC_LED_ID_RECOVERY_HW_REINIT_LED, /* LED to indicate sysrq debug mode. */ EC_LED_ID_SYSRQ_DEBUG_LED, EC_LED_ID_COUNT }; /* LED control flags */ #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ enum ec_led_colors { EC_LED_COLOR_RED = 0, EC_LED_COLOR_GREEN, EC_LED_COLOR_BLUE, EC_LED_COLOR_YELLOW, EC_LED_COLOR_WHITE, EC_LED_COLOR_AMBER, EC_LED_COLOR_COUNT }; struct ec_params_led_control { uint8_t led_id; /* Which LED to control */ uint8_t flags; /* Control flags */ uint8_t brightness[EC_LED_COLOR_COUNT]; } __ec_align1; struct ec_response_led_control { /* * Available brightness value range. * * Range 0 means color channel not present. * Range 1 means on/off control. * Other values means the LED is control by PWM. */ uint8_t brightness_range[EC_LED_COLOR_COUNT]; } __ec_align1; /*****************************************************************************/ /* Verified boot commands */ /* * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be * reused for other purposes with version > 0. */ /* Verified boot hash command */ #define EC_CMD_VBOOT_HASH 0x002A struct ec_params_vboot_hash { uint8_t cmd; /* enum ec_vboot_hash_cmd */ uint8_t hash_type; /* enum ec_vboot_hash_type */ uint8_t nonce_size; /* Nonce size; may be 0 */ uint8_t reserved0; /* Reserved; set 0 */ uint32_t offset; /* Offset in flash to hash */ uint32_t size; /* Number of bytes to hash */ uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ } __ec_align4; struct ec_response_vboot_hash { uint8_t status; /* enum ec_vboot_hash_status */ uint8_t hash_type; /* enum ec_vboot_hash_type */ uint8_t digest_size; /* Size of hash digest in bytes */ uint8_t reserved0; /* Ignore; will be 0 */ uint32_t offset; /* Offset in flash which was hashed */ uint32_t size; /* Number of bytes hashed */ uint8_t hash_digest[64]; /* Hash digest data */ } __ec_align4; enum ec_vboot_hash_cmd { EC_VBOOT_HASH_GET = 0, /* Get current hash status */ EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ }; enum ec_vboot_hash_type { EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ }; enum ec_vboot_hash_status { EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ }; /* * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. * If one of these is specified, the EC will automatically update offset and * size to the correct values for the specified image (RO or RW). */ #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc /* * 'RW' is vague if there are multiple RW images; we mean the active one, * so the old constant is deprecated. */ #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE /*****************************************************************************/ /* * Motion sense commands. We'll make separate structs for sub-commands with * different input args, so that we know how much to expect. */ #define EC_CMD_MOTION_SENSE_CMD 0x002B /* Motion sense commands */ enum motionsense_command { /* * Dump command returns all motion sensor data including motion sense * module flags and individual sensor flags. */ MOTIONSENSE_CMD_DUMP = 0, /* * Info command returns data describing the details of a given sensor, * including enum motionsensor_type, enum motionsensor_location, and * enum motionsensor_chip. */ MOTIONSENSE_CMD_INFO = 1, /* * EC Rate command is a setter/getter command for the EC sampling rate * in milliseconds. * It is per sensor, the EC run sample task at the minimum of all * sensors EC_RATE. * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR * to collect all the sensor samples. * For sensor with hardware FIFO, EC_RATE is used as the maximal delay * to process of all motion sensors in milliseconds. */ MOTIONSENSE_CMD_EC_RATE = 2, /* * Sensor ODR command is a setter/getter command for the output data * rate of a specific motion sensor in millihertz. */ MOTIONSENSE_CMD_SENSOR_ODR = 3, /* * Sensor range command is a setter/getter command for the range of * a specified motion sensor in +/-G's or +/- deg/s. */ MOTIONSENSE_CMD_SENSOR_RANGE = 4, /* * Setter/getter command for the keyboard wake angle. When the lid * angle is greater than this value, keyboard wake is disabled in S3, * and when the lid angle goes less than this value, keyboard wake is * enabled. Note, the lid angle measurement is an approximate, * un-calibrated value, hence the wake angle isn't exact. */ MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, /* * Returns a single sensor data. */ MOTIONSENSE_CMD_DATA = 6, /* * Return sensor fifo info. */ MOTIONSENSE_CMD_FIFO_INFO = 7, /* * Insert a flush element in the fifo and return sensor fifo info. * The host can use that element to synchronize its operation. */ MOTIONSENSE_CMD_FIFO_FLUSH = 8, /* * Return a portion of the fifo. */ MOTIONSENSE_CMD_FIFO_READ = 9, /* * Perform low level calibration. * On sensors that support it, ask to do offset calibration. */ MOTIONSENSE_CMD_PERFORM_CALIB = 10, /* * Sensor Offset command is a setter/getter command for the offset * used for calibration. * The offsets can be calculated by the host, or via * PERFORM_CALIB command. */ MOTIONSENSE_CMD_SENSOR_OFFSET = 11, /* * List available activities for a MOTION sensor. * Indicates if they are enabled or disabled. */ MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, /* * Activity management * Enable/Disable activity recognition. */ MOTIONSENSE_CMD_SET_ACTIVITY = 13, /* * Lid Angle */ MOTIONSENSE_CMD_LID_ANGLE = 14, /* * Allow the FIFO to trigger interrupt via MKBP events. * By default the FIFO does not send interrupt to process the FIFO * until the AP is ready or it is coming from a wakeup sensor. */ MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, /* * Spoof the readings of the sensors. The spoofed readings can be set * to arbitrary values, or will lock to the last read actual values. */ MOTIONSENSE_CMD_SPOOF = 16, /* Set lid angle for tablet mode detection. */ MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, /* * Sensor Scale command is a setter/getter command for the calibration * scale. */ MOTIONSENSE_CMD_SENSOR_SCALE = 18, /* Number of motionsense sub-commands. */ MOTIONSENSE_NUM_CMDS }; /* List of motion sensor types. */ enum motionsensor_type { MOTIONSENSE_TYPE_ACCEL = 0, MOTIONSENSE_TYPE_GYRO = 1, MOTIONSENSE_TYPE_MAG = 2, MOTIONSENSE_TYPE_PROX = 3, MOTIONSENSE_TYPE_LIGHT = 4, MOTIONSENSE_TYPE_ACTIVITY = 5, MOTIONSENSE_TYPE_BARO = 6, MOTIONSENSE_TYPE_SYNC = 7, MOTIONSENSE_TYPE_MAX, }; /* List of motion sensor locations. */ enum motionsensor_location { MOTIONSENSE_LOC_BASE = 0, MOTIONSENSE_LOC_LID = 1, MOTIONSENSE_LOC_CAMERA = 2, MOTIONSENSE_LOC_MAX, }; /* List of motion sensor chips. */ enum motionsensor_chip { MOTIONSENSE_CHIP_KXCJ9 = 0, MOTIONSENSE_CHIP_LSM6DS0 = 1, MOTIONSENSE_CHIP_BMI160 = 2, MOTIONSENSE_CHIP_SI1141 = 3, MOTIONSENSE_CHIP_SI1142 = 4, MOTIONSENSE_CHIP_SI1143 = 5, MOTIONSENSE_CHIP_KX022 = 6, MOTIONSENSE_CHIP_L3GD20H = 7, MOTIONSENSE_CHIP_BMA255 = 8, MOTIONSENSE_CHIP_BMP280 = 9, MOTIONSENSE_CHIP_OPT3001 = 10, MOTIONSENSE_CHIP_BH1730 = 11, MOTIONSENSE_CHIP_GPIO = 12, MOTIONSENSE_CHIP_LIS2DH = 13, MOTIONSENSE_CHIP_LSM6DSM = 14, MOTIONSENSE_CHIP_LIS2DE = 15, MOTIONSENSE_CHIP_LIS2MDL = 16, MOTIONSENSE_CHIP_LSM6DS3 = 17, MOTIONSENSE_CHIP_LSM6DSO = 18, MOTIONSENSE_CHIP_LNG2DM = 19, MOTIONSENSE_CHIP_MAX, }; /* List of orientation positions */ enum motionsensor_orientation { MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, MOTIONSENSE_ORIENTATION_PORTRAIT = 1, MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, MOTIONSENSE_ORIENTATION_UNKNOWN = 4, }; struct ec_response_motion_sensor_data { /* Flags for each sensor. */ uint8_t flags; /* Sensor number the data comes from. */ uint8_t sensor_num; /* Each sensor is up to 3-axis. */ union { int16_t data[3]; struct __ec_todo_packed { uint16_t reserved; uint32_t timestamp; }; struct __ec_todo_unpacked { uint8_t activity; /* motionsensor_activity */ uint8_t state; int16_t add_info[2]; }; }; } __ec_todo_packed; /* Note: used in ec_response_get_next_data */ struct ec_response_motion_sense_fifo_info { /* Size of the fifo */ uint16_t size; /* Amount of space used in the fifo */ uint16_t count; /* Timestamp recorded in us. * aka accurate timestamp when host event was triggered. */ uint32_t timestamp; /* Total amount of vector lost */ uint16_t total_lost; /* Lost events since the last fifo_info, per sensors */ uint16_t lost[]; } __ec_todo_packed; struct ec_response_motion_sense_fifo_data { uint32_t number_data; struct ec_response_motion_sensor_data data[]; } __ec_todo_packed; /* List supported activity recognition */ enum motionsensor_activity { MOTIONSENSE_ACTIVITY_RESERVED = 0, MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, MOTIONSENSE_ACTIVITY_ORIENTATION = 3, }; struct ec_motion_sense_activity { uint8_t sensor_num; uint8_t activity; /* one of enum motionsensor_activity */ uint8_t enable; /* 1: enable, 0: disable */ uint8_t reserved; uint16_t parameters[3]; /* activity dependent parameters */ } __ec_todo_unpacked; /* Module flag masks used for the dump sub-command. */ #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) /* Sensor flag masks used for the dump sub-command. */ #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) /* * Flush entry for synchronization. * data contains time stamp */ #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) /* * Send this value for the data element to only perform a read. If you * send any other value, the EC will interpret it as data to set and will * return the actual value set. */ #define EC_MOTION_SENSE_NO_VALUE -1 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ /* Set Calibration information */ #define MOTION_SENSE_SET_OFFSET BIT(0) /* Default Scale value, factor 1. */ #define MOTION_SENSE_DEFAULT_SCALE BIT(15) #define LID_ANGLE_UNRELIABLE 500 enum motionsense_spoof_mode { /* Disable spoof mode. */ MOTIONSENSE_SPOOF_MODE_DISABLE = 0, /* Enable spoof mode, but use provided component values. */ MOTIONSENSE_SPOOF_MODE_CUSTOM, /* Enable spoof mode, but use the current sensor values. */ MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, /* Query the current spoof mode status for the sensor. */ MOTIONSENSE_SPOOF_MODE_QUERY, }; struct ec_params_motion_sense { uint8_t cmd; union { /* Used for MOTIONSENSE_CMD_DUMP. */ struct __ec_todo_unpacked { /* * Maximal number of sensor the host is expecting. * 0 means the host is only interested in the number * of sensors controlled by the EC. */ uint8_t max_sensor_count; } dump; /* * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. */ struct __ec_todo_unpacked { /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. * kb_wake_angle: angle to wakup AP. */ int16_t data; } kb_wake_angle; /* * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA * and MOTIONSENSE_CMD_PERFORM_CALIB. */ struct __ec_todo_unpacked { uint8_t sensor_num; } info, info_3, data, fifo_flush, perform_calib, list_activities; /* * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR * and MOTIONSENSE_CMD_SENSOR_RANGE. */ struct __ec_todo_unpacked { uint8_t sensor_num; /* Rounding flag, true for round-up, false for down. */ uint8_t roundup; uint16_t reserved; /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ int32_t data; } ec_rate, sensor_odr, sensor_range; /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ struct __ec_todo_packed { uint8_t sensor_num; /* * bit 0: If set (MOTION_SENSE_SET_OFFSET), set * the calibration information in the EC. * If unset, just retrieve calibration information. */ uint16_t flags; /* * Temperature at calibration, in units of 0.01 C * 0x8000: invalid / unknown. * 0x0: 0C * 0x7fff: +327.67C */ int16_t temp; /* * Offset for calibration. * Unit: * Accelerometer: 1/1024 g * Gyro: 1/1024 deg/s * Compass: 1/16 uT */ int16_t offset[3]; } sensor_offset; /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ struct __ec_todo_packed { uint8_t sensor_num; /* * bit 0: If set (MOTION_SENSE_SET_OFFSET), set * the calibration information in the EC. * If unset, just retrieve calibration information. */ uint16_t flags; /* * Temperature at calibration, in units of 0.01 C * 0x8000: invalid / unknown. * 0x0: 0C * 0x7fff: +327.67C */ int16_t temp; /* * Scale for calibration: * By default scale is 1, it is encoded on 16bits: * 1 = BIT(15) * ~2 = 0xFFFF * ~0 = 0. */ uint16_t scale[3]; } sensor_scale; /* Used for MOTIONSENSE_CMD_FIFO_INFO */ /* (no params) */ /* Used for MOTIONSENSE_CMD_FIFO_READ */ struct __ec_todo_unpacked { /* * Number of expected vector to return. * EC may return less or 0 if none available. */ uint32_t max_data_vector; } fifo_read; struct ec_motion_sense_activity set_activity; /* Used for MOTIONSENSE_CMD_LID_ANGLE */ /* (no params) */ /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ struct __ec_todo_unpacked { /* * 1: enable, 0 disable fifo, * EC_MOTION_SENSE_NO_VALUE return value. */ int8_t enable; } fifo_int_enable; /* Used for MOTIONSENSE_CMD_SPOOF */ struct __ec_todo_packed { uint8_t sensor_id; /* See enum motionsense_spoof_mode. */ uint8_t spoof_enable; /* Ignored, used for alignment. */ uint8_t reserved; /* Individual component values to spoof. */ int16_t components[3]; } spoof; /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ struct __ec_todo_unpacked { /* * Lid angle threshold for switching between tablet and * clamshell mode. */ int16_t lid_angle; /* * Hysteresis degree to prevent fluctuations between * clamshell and tablet mode if lid angle keeps * changing around the threshold. Lid motion driver will * use lid_angle + hys_degree to trigger tablet mode and * lid_angle - hys_degree to trigger clamshell mode. */ int16_t hys_degree; } tablet_mode_threshold; }; } __ec_todo_packed; struct ec_response_motion_sense { union { /* Used for MOTIONSENSE_CMD_DUMP */ struct __ec_todo_unpacked { /* Flags representing the motion sensor module. */ uint8_t module_flags; /* Number of sensors managed directly by the EC. */ uint8_t sensor_count; /* * Sensor data is truncated if response_max is too small * for holding all the data. */ struct ec_response_motion_sensor_data sensor[0]; } dump; /* Used for MOTIONSENSE_CMD_INFO. */ struct __ec_todo_unpacked { /* Should be element of enum motionsensor_type. */ uint8_t type; /* Should be element of enum motionsensor_location. */ uint8_t location; /* Should be element of enum motionsensor_chip. */ uint8_t chip; } info; /* Used for MOTIONSENSE_CMD_INFO version 3 */ struct __ec_todo_unpacked { /* Should be element of enum motionsensor_type. */ uint8_t type; /* Should be element of enum motionsensor_location. */ uint8_t location; /* Should be element of enum motionsensor_chip. */ uint8_t chip; /* Minimum sensor sampling frequency */ uint32_t min_frequency; /* Maximum sensor sampling frequency */ uint32_t max_frequency; /* Max number of sensor events that could be in fifo */ uint32_t fifo_max_event_count; } info_3; /* Used for MOTIONSENSE_CMD_DATA */ struct ec_response_motion_sensor_data data; /* * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, * MOTIONSENSE_CMD_SENSOR_RANGE, * MOTIONSENSE_CMD_KB_WAKE_ANGLE, * MOTIONSENSE_CMD_FIFO_INT_ENABLE and * MOTIONSENSE_CMD_SPOOF. */ struct __ec_todo_unpacked { /* Current value of the parameter queried. */ int32_t ret; } ec_rate, sensor_odr, sensor_range, kb_wake_angle, fifo_int_enable, spoof; /* * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, * PERFORM_CALIB. */ struct __ec_todo_unpacked { int16_t temp; int16_t offset[3]; } sensor_offset, perform_calib; /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ struct __ec_todo_unpacked { int16_t temp; uint16_t scale[3]; } sensor_scale; struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; struct ec_response_motion_sense_fifo_data fifo_read; struct __ec_todo_packed { uint16_t reserved; uint32_t enabled; uint32_t disabled; } list_activities; /* No params for set activity */ /* Used for MOTIONSENSE_CMD_LID_ANGLE */ struct __ec_todo_unpacked { /* * Angle between 0 and 360 degree if available, * LID_ANGLE_UNRELIABLE otherwise. */ uint16_t value; } lid_angle; /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ struct __ec_todo_unpacked { /* * Lid angle threshold for switching between tablet and * clamshell mode. */ uint16_t lid_angle; /* Hysteresis degree. */ uint16_t hys_degree; } tablet_mode_threshold; }; } __ec_todo_packed; /*****************************************************************************/ /* Force lid open command */ /* Make lid event always open */ #define EC_CMD_FORCE_LID_OPEN 0x002C struct ec_params_force_lid_open { uint8_t enabled; } __ec_align1; /*****************************************************************************/ /* Configure the behavior of the power button */ #define EC_CMD_CONFIG_POWER_BUTTON 0x002D enum ec_config_power_button_flags { /* Enable/Disable power button pulses for x86 devices */ EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), }; struct ec_params_config_power_button { /* See enum ec_config_power_button_flags */ uint8_t flags; } __ec_align1; /*****************************************************************************/ /* USB charging control commands */ /* Set USB port charging mode */ #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 struct ec_params_usb_charge_set_mode { uint8_t usb_port_id; uint8_t mode:7; uint8_t inhibit_charge:1; } __ec_align1; /*****************************************************************************/ /* Persistent storage for host */ /* Maximum bytes that can be read/written in a single command */ #define EC_PSTORE_SIZE_MAX 64 /* Get persistent storage info */ #define EC_CMD_PSTORE_INFO 0x0040 struct ec_response_pstore_info { /* Persistent storage size, in bytes */ uint32_t pstore_size; /* Access size; read/write offset and size must be a multiple of this */ uint32_t access_size; } __ec_align4; /* * Read persistent storage * * Response is params.size bytes of data. */ #define EC_CMD_PSTORE_READ 0x0041 struct ec_params_pstore_read { uint32_t offset; /* Byte offset to read */ uint32_t size; /* Size to read in bytes */ } __ec_align4; /* Write persistent storage */ #define EC_CMD_PSTORE_WRITE 0x0042 struct ec_params_pstore_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ uint8_t data[EC_PSTORE_SIZE_MAX]; } __ec_align4; /*****************************************************************************/ /* Real-time clock */ /* RTC params and response structures */ struct ec_params_rtc { uint32_t time; } __ec_align4; struct ec_response_rtc { uint32_t time; } __ec_align4; /* These use ec_response_rtc */ #define EC_CMD_RTC_GET_VALUE 0x0044 #define EC_CMD_RTC_GET_ALARM 0x0045 /* These all use ec_params_rtc */ #define EC_CMD_RTC_SET_VALUE 0x0046 #define EC_CMD_RTC_SET_ALARM 0x0047 /* Pass as time param to SET_ALARM to clear the current alarm */ #define EC_RTC_ALARM_CLEAR 0 /*****************************************************************************/ /* Port80 log access */ /* Maximum entries that can be read/written in a single command */ #define EC_PORT80_SIZE_MAX 32 /* Get last port80 code from previous boot */ #define EC_CMD_PORT80_LAST_BOOT 0x0048 #define EC_CMD_PORT80_READ 0x0048 enum ec_port80_subcmd { EC_PORT80_GET_INFO = 0, EC_PORT80_READ_BUFFER, }; struct ec_params_port80_read { uint16_t subcmd; union { struct __ec_todo_unpacked { uint32_t offset; uint32_t num_entries; } read_buffer; }; } __ec_todo_packed; struct ec_response_port80_read { union { struct __ec_todo_unpacked { uint32_t writes; uint32_t history_size; uint32_t last_boot; } get_info; struct __ec_todo_unpacked { uint16_t codes[EC_PORT80_SIZE_MAX]; } data; }; } __ec_todo_packed; struct ec_response_port80_last_boot { uint16_t code; } __ec_align2; /*****************************************************************************/ /* Temporary secure storage for host verified boot use */ /* Number of bytes in a vstore slot */ #define EC_VSTORE_SLOT_SIZE 64 /* Maximum number of vstore slots */ #define EC_VSTORE_SLOT_MAX 32 /* Get persistent storage info */ #define EC_CMD_VSTORE_INFO 0x0049 struct ec_response_vstore_info { /* Indicates which slots are locked */ uint32_t slot_locked; /* Total number of slots available */ uint8_t slot_count; } __ec_align_size1; /* * Read temporary secure storage * * Response is EC_VSTORE_SLOT_SIZE bytes of data. */ #define EC_CMD_VSTORE_READ 0x004A struct ec_params_vstore_read { uint8_t slot; /* Slot to read from */ } __ec_align1; struct ec_response_vstore_read { uint8_t data[EC_VSTORE_SLOT_SIZE]; } __ec_align1; /* * Write temporary secure storage and lock it. */ #define EC_CMD_VSTORE_WRITE 0x004B struct ec_params_vstore_write { uint8_t slot; /* Slot to write to */ uint8_t data[EC_VSTORE_SLOT_SIZE]; } __ec_align1; /*****************************************************************************/ /* Thermal engine commands. Note that there are two implementations. We'll * reuse the command number, but the data and behavior is incompatible. * Version 0 is what originally shipped on Link. * Version 1 separates the CPU thermal limits from the fan control. */ #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 /* The version 0 structs are opaque. You have to know what they are for * the get/set commands to make any sense. */ /* Version 0 - set */ struct ec_params_thermal_set_threshold { uint8_t sensor_type; uint8_t threshold_id; uint16_t value; } __ec_align2; /* Version 0 - get */ struct ec_params_thermal_get_threshold { uint8_t sensor_type; uint8_t threshold_id; } __ec_align1; struct ec_response_thermal_get_threshold { uint16_t value; } __ec_align2; /* The version 1 structs are visible. */ enum ec_temp_thresholds { EC_TEMP_THRESH_WARN = 0, EC_TEMP_THRESH_HIGH, EC_TEMP_THRESH_HALT, EC_TEMP_THRESH_COUNT }; /* * Thermal configuration for one temperature sensor. Temps are in degrees K. * Zero values will be silently ignored by the thermal task. * * Set 'temp_host' value allows thermal task to trigger some event with 1 degree * hysteresis. * For example, * temp_host[EC_TEMP_THRESH_HIGH] = 300 K * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K * EC will throttle ap when temperature >= 301 K, and release throttling when * temperature <= 299 K. * * Set 'temp_host_release' value allows thermal task has a custom hysteresis. * For example, * temp_host[EC_TEMP_THRESH_HIGH] = 300 K * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K * EC will throttle ap when temperature >= 301 K, and release throttling when * temperature <= 294 K. * * Note that this structure is a sub-structure of * ec_params_thermal_set_threshold_v1, but maintains its alignment there. */ struct ec_thermal_config { uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ uint32_t temp_fan_off; /* no active cooling needed */ uint32_t temp_fan_max; /* max active cooling needed */ } __ec_align4; /* Version 1 - get config for one sensor. */ struct ec_params_thermal_get_threshold_v1 { uint32_t sensor_num; } __ec_align4; /* This returns a struct ec_thermal_config */ /* * Version 1 - set config for one sensor. * Use read-modify-write for best results! */ struct ec_params_thermal_set_threshold_v1 { uint32_t sensor_num; struct ec_thermal_config cfg; } __ec_align4; /* This returns no data */ /****************************************************************************/ /* Toggle automatic fan control */ #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 /* Version 1 of input params */ struct ec_params_auto_fan_ctrl_v1 { uint8_t fan_idx; } __ec_align1; /* Get/Set TMP006 calibration data */ #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 /* * The original TMP006 calibration only needed four params, but now we need * more. Since the algorithm is nothing but magic numbers anyway, we'll leave * the params opaque. The v1 "get" response will include the algorithm number * and how many params it requires. That way we can change the EC code without * needing to update this file. We can also use a different algorithm on each * sensor. */ /* This is the same struct for both v0 and v1. */ struct ec_params_tmp006_get_calibration { uint8_t index; } __ec_align1; /* Version 0 */ struct ec_response_tmp006_get_calibration_v0 { float s0; float b0; float b1; float b2; } __ec_align4; struct ec_params_tmp006_set_calibration_v0 { uint8_t index; uint8_t reserved[3]; float s0; float b0; float b1; float b2; } __ec_align4; /* Version 1 */ struct ec_response_tmp006_get_calibration_v1 { uint8_t algorithm; uint8_t num_params; uint8_t reserved[2]; float val[]; } __ec_align4; struct ec_params_tmp006_set_calibration_v1 { uint8_t index; uint8_t algorithm; uint8_t num_params; uint8_t reserved; float val[]; } __ec_align4; /* Read raw TMP006 data */ #define EC_CMD_TMP006_GET_RAW 0x0055 struct ec_params_tmp006_get_raw { uint8_t index; } __ec_align1; struct ec_response_tmp006_get_raw { int32_t t; /* In 1/100 K */ int32_t v; /* In nV */ } __ec_align4; /*****************************************************************************/ /* MKBP - Matrix KeyBoard Protocol */ /* * Read key state * * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for * expected response size. * * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. */ #define EC_CMD_MKBP_STATE 0x0060 /* * Provide information about various MKBP things. See enum ec_mkbp_info_type. */ #define EC_CMD_MKBP_INFO 0x0061 struct ec_response_mkbp_info { uint32_t rows; uint32_t cols; /* Formerly "switches", which was 0. */ uint8_t reserved; } __ec_align_size1; struct ec_params_mkbp_info { uint8_t info_type; uint8_t event_type; } __ec_align1; enum ec_mkbp_info_type { /* * Info about the keyboard matrix: number of rows and columns. * * Returns struct ec_response_mkbp_info. */ EC_MKBP_INFO_KBD = 0, /* * For buttons and switches, info about which specifically are * supported. event_type must be set to one of the values in enum * ec_mkbp_event. * * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte * bitmask indicating which buttons or switches are present. See the * bit inidices below. */ EC_MKBP_INFO_SUPPORTED = 1, /* * Instantaneous state of buttons and switches. * * event_type must be set to one of the values in enum ec_mkbp_event. * * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] * indicating the current state of the keyboard matrix. * * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw * event state. * * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the * state of supported buttons. * * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the * state of supported switches. */ EC_MKBP_INFO_CURRENT = 2, }; /* Simulate key press */ #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 struct ec_params_mkbp_simulate_key { uint8_t col; uint8_t row; uint8_t pressed; } __ec_align1; #define EC_CMD_GET_KEYBOARD_ID 0x0063 struct ec_response_keyboard_id { uint32_t keyboard_id; } __ec_align4; enum keyboard_id { KEYBOARD_ID_UNSUPPORTED = 0, KEYBOARD_ID_UNREADABLE = 0xffffffff, }; /* Configure keyboard scanning */ #define EC_CMD_MKBP_SET_CONFIG 0x0064 #define EC_CMD_MKBP_GET_CONFIG 0x0065 /* flags */ enum mkbp_config_flags { EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ }; enum mkbp_config_valid { EC_MKBP_VALID_SCAN_PERIOD = BIT(0), EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), }; /* * Configuration for our key scanning algorithm. * * Note that this is used as a sub-structure of * ec_{params/response}_mkbp_get_config. */ struct ec_mkbp_config { uint32_t valid_mask; /* valid fields */ uint8_t flags; /* some flags (enum mkbp_config_flags) */ uint8_t valid_flags; /* which flags are valid */ uint16_t scan_period_us; /* period between start of scans */ /* revert to interrupt mode after no activity for this long */ uint32_t poll_timeout_us; /* * minimum post-scan relax time. Once we finish a scan we check * the time until we are due to start the next one. If this time is * shorter this field, we use this instead. */ uint16_t min_post_scan_delay_us; /* delay between setting up output and waiting for it to settle */ uint16_t output_settle_us; uint16_t debounce_down_us; /* time for debounce on key down */ uint16_t debounce_up_us; /* time for debounce on key up */ /* maximum depth to allow for fifo (0 = no keyscan output) */ uint8_t fifo_max_depth; } __ec_align_size1; struct ec_params_mkbp_set_config { struct ec_mkbp_config config; } __ec_align_size1; struct ec_response_mkbp_get_config { struct ec_mkbp_config config; } __ec_align_size1; /* Run the key scan emulation */ #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 enum ec_keyscan_seq_cmd { EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ }; enum ec_collect_flags { /* * Indicates this scan was processed by the EC. Due to timing, some * scans may be skipped. */ EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), }; struct ec_collect_item { uint8_t flags; /* some flags (enum ec_collect_flags) */ } __ec_align1; struct ec_params_keyscan_seq_ctrl { uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ union { struct __ec_align1 { uint8_t active; /* still active */ uint8_t num_items; /* number of items */ /* Current item being presented */ uint8_t cur_item; } status; struct __ec_todo_unpacked { /* * Absolute time for this scan, measured from the * start of the sequence. */ uint32_t time_us; uint8_t scan[0]; /* keyscan data */ } add; struct __ec_align1 { uint8_t start_item; /* First item to return */ uint8_t num_items; /* Number of items to return */ } collect; }; } __ec_todo_packed; struct ec_result_keyscan_seq_ctrl { union { struct __ec_todo_unpacked { uint8_t num_items; /* Number of items */ /* Data for each item */ struct ec_collect_item item[0]; } collect; }; } __ec_todo_packed; /* * Get the next pending MKBP event. * * Returns EC_RES_UNAVAILABLE if there is no event pending. */ #define EC_CMD_GET_NEXT_EVENT 0x0067 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 /* * We use the most significant bit of the event type to indicate to the host * that the EC has more MKBP events available to provide. */ #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) /* The mask to apply to get the raw event type */ #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) enum ec_mkbp_event { /* Keyboard matrix changed. The event data is the new matrix state. */ EC_MKBP_EVENT_KEY_MATRIX = 0, /* New host event. The event data is 4 bytes of host event flags. */ EC_MKBP_EVENT_HOST_EVENT = 1, /* New Sensor FIFO data. The event data is fifo_info structure. */ EC_MKBP_EVENT_SENSOR_FIFO = 2, /* The state of the non-matrixed buttons have changed. */ EC_MKBP_EVENT_BUTTON = 3, /* The state of the switches have changed. */ EC_MKBP_EVENT_SWITCH = 4, /* New Fingerprint sensor event, the event data is fp_events bitmap. */ EC_MKBP_EVENT_FINGERPRINT = 5, /* * Sysrq event: send emulated sysrq. The event data is sysrq, * corresponding to the key to be pressed. */ EC_MKBP_EVENT_SYSRQ = 6, /* * New 64-bit host event. * The event data is 8 bytes of host event flags. */ EC_MKBP_EVENT_HOST_EVENT64 = 7, /* Notify the AP that something happened on CEC */ EC_MKBP_EVENT_CEC_EVENT = 8, /* Send an incoming CEC message to the AP */ EC_MKBP_EVENT_CEC_MESSAGE = 9, /* Number of MKBP events */ EC_MKBP_EVENT_COUNT, }; BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); union __ec_align_offset1 ec_response_get_next_data { uint8_t key_matrix[13]; /* Unaligned */ uint32_t host_event; uint64_t host_event64; struct __ec_todo_unpacked { /* For aligning the fifo_info */ uint8_t reserved[3]; struct ec_response_motion_sense_fifo_info info; } sensor_fifo; uint32_t buttons; uint32_t switches; uint32_t fp_events; uint32_t sysrq; /* CEC events from enum mkbp_cec_event */ uint32_t cec_events; }; union __ec_align_offset1 ec_response_get_next_data_v1 { uint8_t key_matrix[16]; /* Unaligned */ uint32_t host_event; uint64_t host_event64; struct __ec_todo_unpacked { /* For aligning the fifo_info */ uint8_t reserved[3]; struct ec_response_motion_sense_fifo_info info; } sensor_fifo; uint32_t buttons; uint32_t switches; uint32_t fp_events; uint32_t sysrq; /* CEC events from enum mkbp_cec_event */ uint32_t cec_events; uint8_t cec_message[16]; }; BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); struct ec_response_get_next_event { uint8_t event_type; /* Followed by event data if any */ union ec_response_get_next_data data; } __ec_align1; struct ec_response_get_next_event_v1 { uint8_t event_type; /* Followed by event data if any */ union ec_response_get_next_data_v1 data; } __ec_align1; /* Bit indices for buttons and switches.*/ /* Buttons */ #define EC_MKBP_POWER_BUTTON 0 #define EC_MKBP_VOL_UP 1 #define EC_MKBP_VOL_DOWN 2 #define EC_MKBP_RECOVERY 3 /* Switches */ #define EC_MKBP_LID_OPEN 0 #define EC_MKBP_TABLET_MODE 1 #define EC_MKBP_BASE_ATTACHED 2 #define EC_MKBP_FRONT_PROXIMITY 3 /* Run keyboard factory test scanning */ #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 struct ec_response_keyboard_factory_test { uint16_t shorted; /* Keyboard pins are shorted */ } __ec_align2; /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ >> EC_MKBP_FP_MATCH_IDX_OFFSET) #define EC_MKBP_FP_ENROLL BIT(27) #define EC_MKBP_FP_MATCH BIT(28) #define EC_MKBP_FP_FINGER_DOWN BIT(29) #define EC_MKBP_FP_FINGER_UP BIT(30) #define EC_MKBP_FP_IMAGE_READY BIT(31) /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ #define EC_MKBP_FP_ERR_ENROLL_OK 0 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 /* Can be used to detect if image was usable for enrollment or not. */ #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ #define EC_MKBP_FP_ERR_MATCH_NO 0 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 #define EC_MKBP_FP_ERR_MATCH_YES 1 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 /*****************************************************************************/ /* Temperature sensor commands */ /* Read temperature sensor info */ #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 struct ec_params_temp_sensor_get_info { uint8_t id; } __ec_align1; struct ec_response_temp_sensor_get_info { char sensor_name[32]; uint8_t sensor_type; } __ec_align1; /*****************************************************************************/ /* * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI * commands accidentally sent to the wrong interface. See the ACPI section * below. */ /*****************************************************************************/ /* Host event commands */ /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ /* * Host event mask params and response structures, shared by all of the host * event commands below. */ struct ec_params_host_event_mask { uint32_t mask; } __ec_align4; struct ec_response_host_event_mask { uint32_t mask; } __ec_align4; /* These all use ec_response_host_event_mask */ #define EC_CMD_HOST_EVENT_GET_B 0x0087 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D /* These all use ec_params_host_event_mask */ #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B #define EC_CMD_HOST_EVENT_CLEAR 0x008C #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F /* * Unified host event programming interface - Should be used by newer versions * of BIOS/OS to program host events and masks */ struct ec_params_host_event { /* Action requested by host - one of enum ec_host_event_action. */ uint8_t action; /* * Mask type that the host requested the action on - one of * enum ec_host_event_mask_type. */ uint8_t mask_type; /* Set to 0, ignore on read */ uint16_t reserved; /* Value to be used in case of set operations. */ uint64_t value; } __ec_align4; /* * Response structure returned by EC_CMD_HOST_EVENT. * Update the value on a GET request. Set to 0 on GET/CLEAR */ struct ec_response_host_event { /* Mask value in case of get operation */ uint64_t value; } __ec_align4; enum ec_host_event_action { /* * params.value is ignored. Value of mask_type populated * in response.value */ EC_HOST_EVENT_GET, /* Bits in params.value are set */ EC_HOST_EVENT_SET, /* Bits in params.value are cleared */ EC_HOST_EVENT_CLEAR, }; enum ec_host_event_mask_type { /* Main host event copy */ EC_HOST_EVENT_MAIN, /* Copy B of host events */ EC_HOST_EVENT_B, /* SCI Mask */ EC_HOST_EVENT_SCI_MASK, /* SMI Mask */ EC_HOST_EVENT_SMI_MASK, /* Mask of events that should be always reported in hostevents */ EC_HOST_EVENT_ALWAYS_REPORT_MASK, /* Active wake mask */ EC_HOST_EVENT_ACTIVE_WAKE_MASK, /* Lazy wake mask for S0ix */ EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, /* Lazy wake mask for S3 */ EC_HOST_EVENT_LAZY_WAKE_MASK_S3, /* Lazy wake mask for S5 */ EC_HOST_EVENT_LAZY_WAKE_MASK_S5, }; #define EC_CMD_HOST_EVENT 0x00A4 /*****************************************************************************/ /* Switch commands */ /* Enable/disable LCD backlight */ #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 struct ec_params_switch_enable_backlight { uint8_t enabled; } __ec_align1; /* Enable/disable WLAN/Bluetooth */ #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 /* Version 0 params; no response */ struct ec_params_switch_enable_wireless_v0 { uint8_t enabled; } __ec_align1; /* Version 1 params */ struct ec_params_switch_enable_wireless_v1 { /* Flags to enable now */ uint8_t now_flags; /* Which flags to copy from now_flags */ uint8_t now_mask; /* * Flags to leave enabled in S3, if they're on at the S0->S3 * transition. (Other flags will be disabled by the S0->S3 * transition.) */ uint8_t suspend_flags; /* Which flags to copy from suspend_flags */ uint8_t suspend_mask; } __ec_align1; /* Version 1 response */ struct ec_response_switch_enable_wireless_v1 { /* Flags to enable now */ uint8_t now_flags; /* Flags to leave enabled in S3 */ uint8_t suspend_flags; } __ec_align1; /*****************************************************************************/ /* GPIO commands. Only available on EC if write protect has been disabled. */ /* Set GPIO output value */ #define EC_CMD_GPIO_SET 0x0092 struct ec_params_gpio_set { char name[32]; uint8_t val; } __ec_align1; /* Get GPIO value */ #define EC_CMD_GPIO_GET 0x0093 /* Version 0 of input params and response */ struct ec_params_gpio_get { char name[32]; } __ec_align1; struct ec_response_gpio_get { uint8_t val; } __ec_align1; /* Version 1 of input params and response */ struct ec_params_gpio_get_v1 { uint8_t subcmd; union { struct __ec_align1 { char name[32]; } get_value_by_name; struct __ec_align1 { uint8_t index; } get_info; }; } __ec_align1; struct ec_response_gpio_get_v1 { union { struct __ec_align1 { uint8_t val; } get_value_by_name, get_count; struct __ec_todo_unpacked { uint8_t val; char name[32]; uint32_t flags; } get_info; }; } __ec_todo_packed; enum gpio_get_subcmd { EC_GPIO_GET_BY_NAME = 0, EC_GPIO_GET_COUNT = 1, EC_GPIO_GET_INFO = 2, }; /*****************************************************************************/ /* I2C commands. Only available when flash write protect is unlocked. */ /* * CAUTION: These commands are deprecated, and are not supported anymore in EC * builds >= 8398.0.0 (see crosbug.com/p/23570). * * Use EC_CMD_I2C_PASSTHRU instead. */ /* Read I2C bus */ #define EC_CMD_I2C_READ 0x0094 struct ec_params_i2c_read { uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t read_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; } __ec_align_size1; struct ec_response_i2c_read { uint16_t data; } __ec_align2; /* Write I2C bus */ #define EC_CMD_I2C_WRITE 0x0095 struct ec_params_i2c_write { uint16_t data; uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t write_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; } __ec_align_size1; /*****************************************************************************/ /* Charge state commands. Only available when flash write protect unlocked. */ /* Force charge state machine to stop charging the battery or force it to * discharge the battery. */ #define EC_CMD_CHARGE_CONTROL 0x0096 #define EC_VER_CHARGE_CONTROL 1 enum ec_charge_control_mode { CHARGE_CONTROL_NORMAL = 0, CHARGE_CONTROL_IDLE, CHARGE_CONTROL_DISCHARGE, }; struct ec_params_charge_control { uint32_t mode; /* enum charge_control_mode */ } __ec_align4; /*****************************************************************************/ /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 /* * Read data from the saved snapshot. If the subcmd parameter is * CONSOLE_READ_NEXT, this will return data starting from the beginning of * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the * end of the previous snapshot. * * The params are only looked at in version >= 1 of this command. Prior * versions will just default to CONSOLE_READ_NEXT behavior. * * Response is null-terminated string. Empty string, if there is no more * remaining output. */ #define EC_CMD_CONSOLE_READ 0x0098 enum ec_console_read_subcmd { CONSOLE_READ_NEXT = 0, CONSOLE_READ_RECENT }; struct ec_params_console_read_v1 { uint8_t subcmd; /* enum ec_console_read_subcmd */ } __ec_align1; /*****************************************************************************/ /* * Cut off battery power immediately or after the host has shut down. * * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. * EC_RES_SUCCESS if the command was successful. * EC_RES_ERROR if the cut off command failed. */ #define EC_CMD_BATTERY_CUT_OFF 0x0099 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) struct ec_params_battery_cutoff { uint8_t flags; } __ec_align1; /*****************************************************************************/ /* USB port mux control. */ /* * Switch USB mux or return to automatic switching. */ #define EC_CMD_USB_MUX 0x009A struct ec_params_usb_mux { uint8_t mux; } __ec_align1; /*****************************************************************************/ /* LDOs / FETs control. */ enum ec_ldo_state { EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ }; /* * Switch on/off a LDO. */ #define EC_CMD_LDO_SET 0x009B struct ec_params_ldo_set { uint8_t index; uint8_t state; } __ec_align1; /* * Get LDO state. */ #define EC_CMD_LDO_GET 0x009C struct ec_params_ldo_get { uint8_t index; } __ec_align1; struct ec_response_ldo_get { uint8_t state; } __ec_align1; /*****************************************************************************/ /* Power info. */ /* * Get power info. */ #define EC_CMD_POWER_INFO 0x009D struct ec_response_power_info { uint32_t usb_dev_type; uint16_t voltage_ac; uint16_t voltage_system; uint16_t current_system; uint16_t usb_current_limit; } __ec_align4; /*****************************************************************************/ /* I2C passthru command */ #define EC_CMD_I2C_PASSTHRU 0x009E /* Read data; if not present, message is a write */ #define EC_I2C_FLAG_READ BIT(15) /* Mask for address */ #define EC_I2C_ADDR_MASK 0x3ff #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ /* Any error */ #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) struct ec_params_i2c_passthru_msg { uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ uint16_t len; /* Number of bytes to read or write */ } __ec_align2; struct ec_params_i2c_passthru { uint8_t port; /* I2C port number */ uint8_t num_msgs; /* Number of messages */ struct ec_params_i2c_passthru_msg msg[]; /* Data to write for all messages is concatenated here */ } __ec_align2; struct ec_response_i2c_passthru { uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ uint8_t num_msgs; /* Number of messages processed */ uint8_t data[]; /* Data read by messages concatenated here */ } __ec_align1; /*****************************************************************************/ /* Power button hang detect */ #define EC_CMD_HANG_DETECT 0x009F /* Reasons to start hang detection timer */ /* Power button pressed */ #define EC_HANG_START_ON_POWER_PRESS BIT(0) /* Lid closed */ #define EC_HANG_START_ON_LID_CLOSE BIT(1) /* Lid opened */ #define EC_HANG_START_ON_LID_OPEN BIT(2) /* Start of AP S3->S0 transition (booting or resuming from suspend) */ #define EC_HANG_START_ON_RESUME BIT(3) /* Reasons to cancel hang detection */ /* Power button released */ #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) /* Any host command from AP received */ #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ #define EC_HANG_STOP_ON_SUSPEND BIT(10) /* * If this flag is set, all the other fields are ignored, and the hang detect * timer is started. This provides the AP a way to start the hang timer * without reconfiguring any of the other hang detect settings. Note that * you must previously have configured the timeouts. */ #define EC_HANG_START_NOW BIT(30) /* * If this flag is set, all the other fields are ignored (including * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer * without reconfiguring any of the other hang detect settings. */ #define EC_HANG_STOP_NOW BIT(31) struct ec_params_hang_detect { /* Flags; see EC_HANG_* */ uint32_t flags; /* Timeout in msec before generating host event, if enabled */ uint16_t host_event_timeout_msec; /* Timeout in msec before generating warm reboot, if enabled */ uint16_t warm_reboot_timeout_msec; } __ec_align4; /*****************************************************************************/ /* Commands for battery charging */ /* * This is the single catch-all host command to exchange data regarding the * charge state machine (v2 and up). */ #define EC_CMD_CHARGE_STATE 0x00A0 /* Subcommands for this host command */ enum charge_state_command { CHARGE_STATE_CMD_GET_STATE, CHARGE_STATE_CMD_GET_PARAM, CHARGE_STATE_CMD_SET_PARAM, CHARGE_STATE_NUM_CMDS }; /* * Known param numbers are defined here. Ranges are reserved for board-specific * params, which are handled by the particular implementations. */ enum charge_state_params { CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ CS_PARAM_CHG_CURRENT, /* charger current limit */ CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ CS_PARAM_CHG_STATUS, /* charger-specific status */ CS_PARAM_CHG_OPTION, /* charger-specific options */ CS_PARAM_LIMIT_POWER, /* * Check if power is limited due to * low battery and / or a weak external * charger. READ ONLY. */ /* How many so far? */ CS_NUM_BASE_PARAMS, /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, /* Range for CONFIG_CHARGE_STATE_DEBUG params */ CS_PARAM_DEBUG_MIN = 0x20000, CS_PARAM_DEBUG_CTL_MODE = 0x20000, CS_PARAM_DEBUG_MANUAL_MODE, CS_PARAM_DEBUG_SEEMS_DEAD, CS_PARAM_DEBUG_SEEMS_DISCONNECTED, CS_PARAM_DEBUG_BATT_REMOVED, CS_PARAM_DEBUG_MANUAL_CURRENT, CS_PARAM_DEBUG_MANUAL_VOLTAGE, CS_PARAM_DEBUG_MAX = 0x2ffff, /* Other custom param ranges go here... */ }; struct ec_params_charge_state { uint8_t cmd; /* enum charge_state_command */ union { /* get_state has no args */ struct __ec_todo_unpacked { uint32_t param; /* enum charge_state_param */ } get_param; struct __ec_todo_unpacked { uint32_t param; /* param to set */ uint32_t value; /* value to set */ } set_param; }; } __ec_todo_packed; struct ec_response_charge_state { union { struct __ec_align4 { int ac; int chg_voltage; int chg_current; int chg_input_current; int batt_state_of_charge; } get_state; struct __ec_align4 { uint32_t value; } get_param; /* set_param returns no args */ }; } __ec_align4; /* * Set maximum battery charging current. */ #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 struct ec_params_current_limit { uint32_t limit; /* in mA */ } __ec_align4; /* * Set maximum external voltage / current. */ #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 /* Command v0 is used only on Spring and is obsolete + unsupported */ struct ec_params_external_power_limit_v1 { uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ } __ec_align2; #define EC_POWER_LIMIT_NONE 0xffff /* * Set maximum voltage & current of a dedicated charge port */ #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 struct ec_params_dedicated_charger_limit { uint16_t current_lim; /* in mA */ uint16_t voltage_lim; /* in mV */ } __ec_align2; /*****************************************************************************/ /* Hibernate/Deep Sleep Commands */ /* Set the delay before going into hibernation. */ #define EC_CMD_HIBERNATION_DELAY 0x00A8 struct ec_params_hibernation_delay { /* * Seconds to wait in G3 before hibernate. Pass in 0 to read the * current settings without changing them. */ uint32_t seconds; } __ec_align4; struct ec_response_hibernation_delay { /* * The current time in seconds in which the system has been in the G3 * state. This value is reset if the EC transitions out of G3. */ uint32_t time_g3; /* * The current time remaining in seconds until the EC should hibernate. * This value is also reset if the EC transitions out of G3. */ uint32_t time_remaining; /* * The current time in seconds that the EC should wait in G3 before * hibernating. */ uint32_t hibernate_delay; } __ec_align4; /* Inform the EC when entering a sleep state */ #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 enum host_sleep_event { HOST_SLEEP_EVENT_S3_SUSPEND = 1, HOST_SLEEP_EVENT_S3_RESUME = 2, HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, HOST_SLEEP_EVENT_S0IX_RESUME = 4, /* S3 suspend with additional enabled wake sources */ HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, }; struct ec_params_host_sleep_event { uint8_t sleep_event; } __ec_align1; /* * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep * transition failures */ #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 /* Disable timeout detection for this sleep transition */ #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF struct ec_params_host_sleep_event_v1 { /* The type of sleep being entered or exited. */ uint8_t sleep_event; /* Padding */ uint8_t reserved; union { /* Parameters that apply for suspend messages. */ struct { /* * The timeout in milliseconds between when this message * is received and when the EC will declare sleep * transition failure if the sleep signal is not * asserted. */ uint16_t sleep_timeout_ms; } suspend_params; /* No parameters for non-suspend messages. */ }; } __ec_align2; /* A timeout occurred when this bit is set */ #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 /* * The mask defining which bits correspond to the number of sleep transitions, * as well as the maximum number of suspend line transitions that will be * reported back to the host. */ #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF struct ec_response_host_sleep_event_v1 { union { /* Response fields that apply for resume messages. */ struct { /* * The number of sleep power signal transitions that * occurred since the suspend message. The high bit * indicates a timeout occurred. */ uint32_t sleep_transitions; } resume_response; /* No response fields for non-resume messages. */ }; } __ec_align4; /*****************************************************************************/ /* Device events */ #define EC_CMD_DEVICE_EVENT 0x00AA enum ec_device_event { EC_DEVICE_EVENT_TRACKPAD, EC_DEVICE_EVENT_DSP, EC_DEVICE_EVENT_WIFI, EC_DEVICE_EVENT_WLC, }; enum ec_device_event_param { /* Get and clear pending device events */ EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, /* Get device event mask */ EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, /* Set device event mask */ EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, }; #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) struct ec_params_device_event { uint32_t event_mask; uint8_t param; } __ec_align_size1; struct ec_response_device_event { uint32_t event_mask; } __ec_align4; /*****************************************************************************/ /* Smart battery pass-through */ /* Get / Set 16-bit smart battery registers */ #define EC_CMD_SB_READ_WORD 0x00B0 #define EC_CMD_SB_WRITE_WORD 0x00B1 /* Get / Set string smart battery parameters * formatted as SMBUS "block". */ #define EC_CMD_SB_READ_BLOCK 0x00B2 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 struct ec_params_sb_rd { uint8_t reg; } __ec_align1; struct ec_response_sb_rd_word { uint16_t value; } __ec_align2; struct ec_params_sb_wr_word { uint8_t reg; uint16_t value; } __ec_align1; struct ec_response_sb_rd_block { uint8_t data[32]; } __ec_align1; struct ec_params_sb_wr_block { uint8_t reg; uint16_t data[32]; } __ec_align1; /*****************************************************************************/ /* Battery vendor parameters * * Get or set vendor-specific parameters in the battery. Implementations may * differ between boards or batteries. On a set operation, the response * contains the actual value set, which may be rounded or clipped from the * requested value. */ #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 enum ec_battery_vendor_param_mode { BATTERY_VENDOR_PARAM_MODE_GET = 0, BATTERY_VENDOR_PARAM_MODE_SET, }; struct ec_params_battery_vendor_param { uint32_t param; uint32_t value; uint8_t mode; } __ec_align_size1; struct ec_response_battery_vendor_param { uint32_t value; } __ec_align4; /*****************************************************************************/ /* * Smart Battery Firmware Update Commands */ #define EC_CMD_SB_FW_UPDATE 0x00B5 enum ec_sb_fw_update_subcmd { EC_SB_FW_UPDATE_PREPARE = 0x0, EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ EC_SB_FW_UPDATE_END = 0x4, EC_SB_FW_UPDATE_STATUS = 0x5, EC_SB_FW_UPDATE_PROTECT = 0x6, EC_SB_FW_UPDATE_MAX = 0x7, }; #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 struct ec_sb_fw_update_header { uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ uint16_t fw_id; /* firmware id */ } __ec_align4; struct ec_params_sb_fw_update { struct ec_sb_fw_update_header hdr; union { /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ /* EC_SB_FW_UPDATE_INFO = 0x1 */ /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ /* EC_SB_FW_UPDATE_END = 0x4 */ /* EC_SB_FW_UPDATE_STATUS = 0x5 */ /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ /* Those have no args */ /* EC_SB_FW_UPDATE_WRITE = 0x3 */ struct __ec_align4 { uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; } write; }; } __ec_align4; struct ec_response_sb_fw_update { union { /* EC_SB_FW_UPDATE_INFO = 0x1 */ struct __ec_align1 { uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; } info; /* EC_SB_FW_UPDATE_STATUS = 0x5 */ struct __ec_align1 { uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; } status; }; } __ec_align1; /* * Entering Verified Boot Mode Command * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. * Valid Modes are: normal, developer, and recovery. */ #define EC_CMD_ENTERING_MODE 0x00B6 struct ec_params_entering_mode { int vboot_mode; } __ec_align4; #define VBOOT_MODE_NORMAL 0 #define VBOOT_MODE_DEVELOPER 1 #define VBOOT_MODE_RECOVERY 2 /*****************************************************************************/ /* * I2C passthru protection command: Protects I2C tunnels against access on * certain addresses (board-specific). */ #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 enum ec_i2c_passthru_protect_subcmd { EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, }; struct ec_params_i2c_passthru_protect { uint8_t subcmd; uint8_t port; /* I2C port number */ } __ec_align1; struct ec_response_i2c_passthru_protect { uint8_t status; /* Status flags (0: unlocked, 1: locked) */ } __ec_align1; /*****************************************************************************/ /* * HDMI CEC commands * * These commands are for sending and receiving message via HDMI CEC */ #define MAX_CEC_MSG_LEN 16 /* CEC message from the AP to be written on the CEC bus */ #define EC_CMD_CEC_WRITE_MSG 0x00B8 /** * struct ec_params_cec_write - Message to write to the CEC bus * @msg: message content to write to the CEC bus */ struct ec_params_cec_write { uint8_t msg[MAX_CEC_MSG_LEN]; } __ec_align1; /* Set various CEC parameters */ #define EC_CMD_CEC_SET 0x00BA /** * struct ec_params_cec_set - CEC parameters set * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC * or 1 to enable CEC functionality, in case cmd is * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical * address between 0 and 15 or 0xff to unregister */ struct ec_params_cec_set { uint8_t cmd; /* enum cec_command */ uint8_t val; } __ec_align1; /* Read various CEC parameters */ #define EC_CMD_CEC_GET 0x00BB /** * struct ec_params_cec_get - CEC parameters get * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS */ struct ec_params_cec_get { uint8_t cmd; /* enum cec_command */ } __ec_align1; /** * struct ec_response_cec_get - CEC parameters get response * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is * disabled or 1 if CEC functionality is enabled, * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the * configured logical address between 0 and 15 or 0xff if unregistered */ struct ec_response_cec_get { uint8_t val; } __ec_align1; /* CEC parameters command */ enum cec_command { /* CEC reading, writing and events enable */ CEC_CMD_ENABLE, /* CEC logical address */ CEC_CMD_LOGICAL_ADDRESS, }; /* Events from CEC to AP */ enum mkbp_cec_event { /* Outgoing message was acknowledged by a follower */ EC_MKBP_CEC_SEND_OK = BIT(0), /* Outgoing message was not acknowledged */ EC_MKBP_CEC_SEND_FAILED = BIT(1), }; /*****************************************************************************/ /* Commands for audio codec. */ #define EC_CMD_EC_CODEC 0x00BC enum ec_codec_subcmd { EC_CODEC_GET_CAPABILITIES = 0x0, EC_CODEC_GET_SHM_ADDR = 0x1, EC_CODEC_SET_SHM_ADDR = 0x2, EC_CODEC_SUBCMD_COUNT, }; enum ec_codec_cap { EC_CODEC_CAP_WOV_AUDIO_SHM = 0, EC_CODEC_CAP_WOV_LANG_SHM = 1, EC_CODEC_CAP_LAST = 32, }; enum ec_codec_shm_id { EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, EC_CODEC_SHM_ID_WOV_LANG = 0x1, EC_CODEC_SHM_ID_LAST, }; enum ec_codec_shm_type { EC_CODEC_SHM_TYPE_EC_RAM = 0x0, EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, }; struct __ec_align1 ec_param_ec_codec_get_shm_addr { uint8_t shm_id; uint8_t reserved[3]; }; struct __ec_align4 ec_param_ec_codec_set_shm_addr { uint64_t phys_addr; uint32_t len; uint8_t shm_id; uint8_t reserved[3]; }; struct __ec_align4 ec_param_ec_codec { uint8_t cmd; /* enum ec_codec_subcmd */ uint8_t reserved[3]; union { struct ec_param_ec_codec_get_shm_addr get_shm_addr_param; struct ec_param_ec_codec_set_shm_addr set_shm_addr_param; }; }; struct __ec_align4 ec_response_ec_codec_get_capabilities { uint32_t capabilities; }; struct __ec_align4 ec_response_ec_codec_get_shm_addr { uint64_t phys_addr; uint32_t len; uint8_t type; uint8_t reserved[3]; }; /*****************************************************************************/ /* Commands for DMIC on audio codec. */ #define EC_CMD_EC_CODEC_DMIC 0x00BD enum ec_codec_dmic_subcmd { EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, EC_CODEC_DMIC_SUBCMD_COUNT, }; enum ec_codec_dmic_channel { EC_CODEC_DMIC_CHANNEL_0 = 0x0, EC_CODEC_DMIC_CHANNEL_1 = 0x1, EC_CODEC_DMIC_CHANNEL_2 = 0x2, EC_CODEC_DMIC_CHANNEL_3 = 0x3, EC_CODEC_DMIC_CHANNEL_4 = 0x4, EC_CODEC_DMIC_CHANNEL_5 = 0x5, EC_CODEC_DMIC_CHANNEL_6 = 0x6, EC_CODEC_DMIC_CHANNEL_7 = 0x7, EC_CODEC_DMIC_CHANNEL_COUNT, }; struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { uint8_t channel; /* enum ec_codec_dmic_channel */ uint8_t gain; uint8_t reserved[2]; }; struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { uint8_t channel; /* enum ec_codec_dmic_channel */ uint8_t reserved[3]; }; struct __ec_align4 ec_param_ec_codec_dmic { uint8_t cmd; /* enum ec_codec_dmic_subcmd */ uint8_t reserved[3]; union { struct ec_param_ec_codec_dmic_set_gain_idx set_gain_idx_param; struct ec_param_ec_codec_dmic_get_gain_idx get_gain_idx_param; }; }; struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { uint8_t max_gain; }; struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { uint8_t gain; }; /*****************************************************************************/ /* Commands for I2S RX on audio codec. */ #define EC_CMD_EC_CODEC_I2S_RX 0x00BE enum ec_codec_i2s_rx_subcmd { EC_CODEC_I2S_RX_ENABLE = 0x0, EC_CODEC_I2S_RX_DISABLE = 0x1, EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, EC_CODEC_I2S_RX_SET_BCLK = 0x4, EC_CODEC_I2S_RX_RESET = 0x5, EC_CODEC_I2S_RX_SUBCMD_COUNT, }; enum ec_codec_i2s_rx_sample_depth { EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, }; enum ec_codec_i2s_rx_daifmt { EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, EC_CODEC_I2S_RX_DAIFMT_COUNT, }; struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { uint8_t depth; uint8_t reserved[3]; }; struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { uint8_t left; uint8_t right; uint8_t reserved[2]; }; struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { uint8_t daifmt; uint8_t reserved[3]; }; struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { uint32_t bclk; }; struct __ec_align4 ec_param_ec_codec_i2s_rx { uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ uint8_t reserved[3]; union { struct ec_param_ec_codec_i2s_rx_set_sample_depth set_sample_depth_param; struct ec_param_ec_codec_i2s_rx_set_daifmt set_daifmt_param; struct ec_param_ec_codec_i2s_rx_set_bclk set_bclk_param; }; }; /*****************************************************************************/ /* Commands for WoV on audio codec. */ #define EC_CMD_EC_CODEC_WOV 0x00BF enum ec_codec_wov_subcmd { EC_CODEC_WOV_SET_LANG = 0x0, EC_CODEC_WOV_SET_LANG_SHM = 0x1, EC_CODEC_WOV_GET_LANG = 0x2, EC_CODEC_WOV_ENABLE = 0x3, EC_CODEC_WOV_DISABLE = 0x4, EC_CODEC_WOV_READ_AUDIO = 0x5, EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, EC_CODEC_WOV_SUBCMD_COUNT, }; /* * @hash is SHA256 of the whole language model. * @total_len indicates the length of whole language model. * @offset is the cursor from the beginning of the model. * @buf is the packet buffer. * @len denotes how many bytes in the buf. */ struct __ec_align4 ec_param_ec_codec_wov_set_lang { uint8_t hash[32]; uint32_t total_len; uint32_t offset; uint8_t buf[128]; uint32_t len; }; struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { uint8_t hash[32]; uint32_t total_len; }; struct __ec_align4 ec_param_ec_codec_wov { uint8_t cmd; /* enum ec_codec_wov_subcmd */ uint8_t reserved[3]; union { struct ec_param_ec_codec_wov_set_lang set_lang_param; struct ec_param_ec_codec_wov_set_lang_shm set_lang_shm_param; }; }; struct __ec_align4 ec_response_ec_codec_wov_get_lang { uint8_t hash[32]; }; struct __ec_align4 ec_response_ec_codec_wov_read_audio { uint8_t buf[128]; uint32_t len; }; struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { uint32_t offset; uint32_t len; }; /*****************************************************************************/ /* System commands */ /* * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't * necessarily reboot the EC. Rename to "image" or something similar? */ #define EC_CMD_REBOOT_EC 0x00D2 /* Command */ enum ec_reboot_cmd { EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ /* (command 3 was jump to RW-B) */ EC_REBOOT_COLD = 4, /* Cold-reboot */ EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ }; /* Flags for ec_params_reboot_ec.reboot_flags */ #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ struct ec_params_reboot_ec { uint8_t cmd; /* enum ec_reboot_cmd */ uint8_t flags; /* See EC_REBOOT_FLAG_* */ } __ec_align1; /* * Get information on last EC panic. * * Returns variable-length platform-dependent panic information. See panic.h * for details. */ #define EC_CMD_GET_PANIC_INFO 0x00D3 /*****************************************************************************/ /* * Special commands * * These do not follow the normal rules for commands. See each command for * details. */ /* * Reboot NOW * * This command will work even when the EC LPC interface is busy, because the * reboot command is processed at interrupt level. Note that when the EC * reboots, the host will reboot too, so there is no response to this command. * * Use EC_CMD_REBOOT_EC to reboot the EC more politely. */ #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ /* * Resend last response (not supported on LPC). * * Returns EC_RES_UNAVAILABLE if there is no response available - for example, * there was no previous command, or the previous command's response was too * big to save. */ #define EC_CMD_RESEND_RESPONSE 0x00DB /* * This header byte on a command indicate version 0. Any header byte less * than this means that we are talking to an old EC which doesn't support * versioning. In that case, we assume version 0. * * Header bytes greater than this indicate a later version. For example, * EC_CMD_VERSION0 + 1 means we are using version 1. * * The old EC interface must not use commands 0xdc or higher. */ #define EC_CMD_VERSION0 0x00DC /*****************************************************************************/ /* * PD commands * * These commands are for PD MCU communication. */ /* EC to PD MCU exchange status command */ #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 #define EC_VER_PD_EXCHANGE_STATUS 2 enum pd_charge_state { PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ PD_CHARGE_NONE, /* No charging allowed */ PD_CHARGE_5V, /* 5V charging only */ PD_CHARGE_MAX /* Charge at max voltage */ }; /* Status of EC being sent to PD */ #define EC_STATUS_HIBERNATING BIT(0) struct ec_params_pd_status { uint8_t status; /* EC status */ int8_t batt_soc; /* battery state of charge */ uint8_t charge_state; /* charging state (from enum pd_charge_state) */ } __ec_align1; /* Status of PD being sent back to EC */ #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ PD_STATUS_TCPC_ALERT_1 | \ PD_STATUS_HOST_EVENT) struct ec_response_pd_status { uint32_t curr_lim_ma; /* input current limit */ uint16_t status; /* PD MCU status */ int8_t active_charge_port; /* active charging port */ } __ec_align_size1; /* AP to PD MCU host event status command, cleared on read */ #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 /* PD MCU host event status bits */ #define PD_EVENT_UPDATE_DEVICE BIT(0) #define PD_EVENT_POWER_CHANGE BIT(1) #define PD_EVENT_IDENTITY_RECEIVED BIT(2) #define PD_EVENT_DATA_SWAP BIT(3) struct ec_response_host_event_status { uint32_t status; /* PD MCU host event status */ } __ec_align4; /* Set USB type-C port role and muxes */ #define EC_CMD_USB_PD_CONTROL 0x0101 enum usb_pd_control_role { USB_PD_CTRL_ROLE_NO_CHANGE = 0, USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, USB_PD_CTRL_ROLE_FORCE_SINK = 3, USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, USB_PD_CTRL_ROLE_FREEZE = 5, USB_PD_CTRL_ROLE_COUNT }; enum usb_pd_control_mux { USB_PD_CTRL_MUX_NO_CHANGE = 0, USB_PD_CTRL_MUX_NONE = 1, USB_PD_CTRL_MUX_USB = 2, USB_PD_CTRL_MUX_DP = 3, USB_PD_CTRL_MUX_DOCK = 4, USB_PD_CTRL_MUX_AUTO = 5, USB_PD_CTRL_MUX_COUNT }; enum usb_pd_control_swap { USB_PD_CTRL_SWAP_NONE = 0, USB_PD_CTRL_SWAP_DATA = 1, USB_PD_CTRL_SWAP_POWER = 2, USB_PD_CTRL_SWAP_VCONN = 3, USB_PD_CTRL_SWAP_COUNT }; struct ec_params_usb_pd_control { uint8_t port; uint8_t role; uint8_t mux; uint8_t swap; } __ec_align1; #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ struct ec_response_usb_pd_control { uint8_t enabled; uint8_t role; uint8_t polarity; uint8_t state; } __ec_align1; struct ec_response_usb_pd_control_v1 { uint8_t enabled; uint8_t role; uint8_t polarity; char state[32]; } __ec_align1; /* Values representing usbc PD CC state */ #define USBC_PD_CC_NONE 0 /* No accessory connected */ #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ /* Active/Passive Cable */ #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) /* Optical/Non-optical cable */ #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) /* Active Link Uni-Direction */ #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) struct ec_response_usb_pd_control_v2 { uint8_t enabled; uint8_t role; uint8_t polarity; char state[32]; uint8_t cc_state; /* enum pd_cc_states representing cc state */ uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ uint8_t reserved; /* Reserved for future use */ uint8_t control_flags; /* USB_PD_CTRL_*flags */ uint8_t cable_speed; /* TBT_SS_* cable speed */ uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ } __ec_align1; #define EC_CMD_USB_PD_PORTS 0x0102 /* Maximum number of PD ports on a device, num_ports will be <= this */ #define EC_USB_PD_MAX_PORTS 8 struct ec_response_usb_pd_ports { uint8_t num_ports; } __ec_align1; #define EC_CMD_USB_PD_POWER_INFO 0x0103 #define PD_POWER_CHARGING_PORT 0xff struct ec_params_usb_pd_power_info { uint8_t port; } __ec_align1; enum usb_chg_type { USB_CHG_TYPE_NONE, USB_CHG_TYPE_PD, USB_CHG_TYPE_C, USB_CHG_TYPE_PROPRIETARY, USB_CHG_TYPE_BC12_DCP, USB_CHG_TYPE_BC12_CDP, USB_CHG_TYPE_BC12_SDP, USB_CHG_TYPE_OTHER, USB_CHG_TYPE_VBUS, USB_CHG_TYPE_UNKNOWN, USB_CHG_TYPE_DEDICATED, }; enum usb_power_roles { USB_PD_PORT_POWER_DISCONNECTED, USB_PD_PORT_POWER_SOURCE, USB_PD_PORT_POWER_SINK, USB_PD_PORT_POWER_SINK_NOT_CHARGING, }; struct usb_chg_measures { uint16_t voltage_max; uint16_t voltage_now; uint16_t current_max; uint16_t current_lim; } __ec_align2; struct ec_response_usb_pd_power_info { uint8_t role; uint8_t type; uint8_t dualrole; uint8_t reserved1; struct usb_chg_measures meas; uint32_t max_power; } __ec_align4; /* * This command will return the number of USB PD charge port + the number * of dedicated port present. * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports */ #define EC_CMD_CHARGE_PORT_COUNT 0x0105 struct ec_response_charge_port_count { uint8_t port_count; } __ec_align1; /* Write USB-PD device FW */ #define EC_CMD_USB_PD_FW_UPDATE 0x0110 enum usb_pd_fw_update_cmds { USB_PD_FW_REBOOT, USB_PD_FW_FLASH_ERASE, USB_PD_FW_FLASH_WRITE, USB_PD_FW_ERASE_SIG, }; struct ec_params_usb_pd_fw_update { uint16_t dev_id; uint8_t cmd; uint8_t port; uint32_t size; /* Size to write in bytes */ /* Followed by data to write */ } __ec_align4; /* Write USB-PD Accessory RW_HASH table entry */ #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 /* RW hash is first 20 bytes of SHA-256 of RW section */ #define PD_RW_HASH_SIZE 20 struct ec_params_usb_pd_rw_hash_entry { uint16_t dev_id; uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; uint8_t reserved; /* * For alignment of current_image * TODO(rspangler) but it's not aligned! * Should have been reserved[2]. */ uint32_t current_image; /* One of ec_current_image */ } __ec_align1; /* Read USB-PD Accessory info */ #define EC_CMD_USB_PD_DEV_INFO 0x0112 struct ec_params_usb_pd_info_request { uint8_t port; } __ec_align1; /* Read USB-PD Device discovery info */ #define EC_CMD_USB_PD_DISCOVERY 0x0113 struct ec_params_usb_pd_discovery_entry { uint16_t vid; /* USB-IF VID */ uint16_t pid; /* USB-IF PID */ uint8_t ptype; /* product type (hub,periph,cable,ama) */ } __ec_align_size1; /* Override default charge behavior */ #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 /* Negative port parameters have special meaning */ enum usb_pd_override_ports { OVERRIDE_DONT_CHARGE = -2, OVERRIDE_OFF = -1, /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ }; struct ec_params_charge_port_override { int16_t override_port; /* Override port# */ } __ec_align2; /* * Read (and delete) one entry of PD event log. * TODO(crbug.com/751742): Make this host command more generic to accommodate * future non-PD logs that use the same internal EC event_log. */ #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 struct ec_response_pd_log { uint32_t timestamp; /* relative timestamp in milliseconds */ uint8_t type; /* event type : see PD_EVENT_xx below */ uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ uint16_t data; /* type-defined data payload */ uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ } __ec_align4; /* The timestamp is the microsecond counter shifted to get about a ms. */ #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ #define PD_LOG_SIZE_MASK 0x1f #define PD_LOG_PORT_MASK 0xe0 #define PD_LOG_PORT_SHIFT 5 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ ((size) & PD_LOG_SIZE_MASK)) #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) /* PD event log : entry types */ /* PD MCU events */ #define PD_EVENT_MCU_BASE 0x00 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) /* Reserved for custom board event */ #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) /* PD generic accessory events */ #define PD_EVENT_ACC_BASE 0x20 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) /* PD power supply events */ #define PD_EVENT_PS_BASE 0x40 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) /* PD video dongles events */ #define PD_EVENT_VIDEO_BASE 0x60 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) /* Returned in the "type" field, when there is no entry available */ #define PD_EVENT_NO_ENTRY 0xff /* * PD_EVENT_MCU_CHARGE event definition : * the payload is "struct usb_chg_measures" * the data field contains the port state flags as defined below : */ /* Port partner is a dual role device */ #define CHARGE_FLAGS_DUAL_ROLE BIT(15) /* Port is the pending override port */ #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) /* Port is the override port */ #define CHARGE_FLAGS_OVERRIDE BIT(13) /* Charger type */ #define CHARGE_FLAGS_TYPE_SHIFT 3 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) /* Power delivery role */ #define CHARGE_FLAGS_ROLE_MASK (7 << 0) /* * PD_EVENT_PS_FAULT data field flags definition : */ #define PS_FAULT_OCP 1 #define PS_FAULT_FAST_OCP 2 #define PS_FAULT_OVP 3 #define PS_FAULT_DISCH 4 /* * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". */ struct mcdp_version { uint8_t major; uint8_t minor; uint16_t build; } __ec_align4; struct mcdp_info { uint8_t family[2]; uint8_t chipid[2]; struct mcdp_version irom; struct mcdp_version fw; } __ec_align4; /* struct mcdp_info field decoding */ #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) /* Get/Set USB-PD Alternate mode info */ #define EC_CMD_USB_PD_GET_AMODE 0x0116 struct ec_params_usb_pd_get_mode_request { uint16_t svid_idx; /* SVID index to get */ uint8_t port; /* port */ } __ec_align_size1; struct ec_params_usb_pd_get_mode_response { uint16_t svid; /* SVID */ uint16_t opos; /* Object Position */ uint32_t vdo[6]; /* Mode VDOs */ } __ec_align4; #define EC_CMD_USB_PD_SET_AMODE 0x0117 enum pd_mode_cmd { PD_EXIT_MODE = 0, PD_ENTER_MODE = 1, /* Not a command. Do NOT remove. */ PD_MODE_CMD_COUNT, }; struct ec_params_usb_pd_set_mode_request { uint32_t cmd; /* enum pd_mode_cmd */ uint16_t svid; /* SVID to set */ uint8_t opos; /* Object Position */ uint8_t port; /* port */ } __ec_align4; /* Ask the PD MCU to record a log of a requested type */ #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 struct ec_params_pd_write_log_entry { uint8_t type; /* event type : see PD_EVENT_xx above */ uint8_t port; /* port#, or 0 for events unrelated to a given port */ } __ec_align1; /* Control USB-PD chip */ #define EC_CMD_PD_CONTROL 0x0119 enum ec_pd_control_cmd { PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ PD_RESET, /* Force reset the PD chip */ PD_CONTROL_DISABLE, /* Disable further calls to this command */ PD_CHIP_ON, /* Power on the PD chip */ }; struct ec_params_pd_control { uint8_t chip; /* chip id */ uint8_t subcmd; } __ec_align1; /* Get info about USB-C SS muxes */ #define EC_CMD_USB_PD_MUX_INFO 0x011A struct ec_params_usb_pd_mux_info { uint8_t port; /* USB-C port number */ } __ec_align1; /* Flags representing mux state */ #define USB_PD_MUX_NONE 0 /* Open switch */ #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ struct ec_response_usb_pd_mux_info { uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ } __ec_align1; #define EC_CMD_PD_CHIP_INFO 0x011B struct ec_params_pd_chip_info { uint8_t port; /* USB-C port number */ uint8_t renew; /* Force renewal */ } __ec_align1; struct ec_response_pd_chip_info { uint16_t vendor_id; uint16_t product_id; uint16_t device_id; union { uint8_t fw_version_string[8]; uint64_t fw_version_number; }; } __ec_align2; struct ec_response_pd_chip_info_v1 { uint16_t vendor_id; uint16_t product_id; uint16_t device_id; union { uint8_t fw_version_string[8]; uint64_t fw_version_number; }; union { uint8_t min_req_fw_version_string[8]; uint64_t min_req_fw_version_number; }; } __ec_align2; /* Run RW signature verification and get status */ #define EC_CMD_RWSIG_CHECK_STATUS 0x011C struct ec_response_rwsig_check_status { uint32_t status; } __ec_align4; /* For controlling RWSIG task */ #define EC_CMD_RWSIG_ACTION 0x011D enum rwsig_action { RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ }; struct ec_params_rwsig_action { uint32_t action; } __ec_align4; /* Run verification on a slot */ #define EC_CMD_EFS_VERIFY 0x011E struct ec_params_efs_verify { uint8_t region; /* enum ec_flash_region */ } __ec_align1; /* * Retrieve info from Cros Board Info store. Response is based on the data * type. Integers return a uint32. Strings return a string, using the response * size to determine how big it is. */ #define EC_CMD_GET_CROS_BOARD_INFO 0x011F /* * Write info into Cros Board Info on EEPROM. Write fails if the board has * hardware write-protect enabled. */ #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 enum cbi_data_tag { CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ CBI_TAG_COUNT, }; /* * Flags to control read operation * * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify * write was successful without reboot. */ #define CBI_GET_RELOAD BIT(0) struct ec_params_get_cbi { uint32_t tag; /* enum cbi_data_tag */ uint32_t flag; /* CBI_GET_* */ } __ec_align4; /* * Flags to control write behavior. * * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's * useful when writing multiple fields in a row. * INIT: Need to be set when creating a new CBI from scratch. All fields * will be initialized to zero first. */ #define CBI_SET_NO_SYNC BIT(0) #define CBI_SET_INIT BIT(1) struct ec_params_set_cbi { uint32_t tag; /* enum cbi_data_tag */ uint32_t flag; /* CBI_SET_* */ uint32_t size; /* Data size */ uint8_t data[]; /* For string and raw data */ } __ec_align1; /* * Information about resets of the AP by the EC and the EC's own uptime. */ #define EC_CMD_GET_UPTIME_INFO 0x0121 struct ec_response_uptime_info { /* * Number of milliseconds since the last EC boot. Sysjump resets * typically do not restart the EC's time_since_boot epoch. * * WARNING: The EC's sense of time is much less accurate than the AP's * sense of time, in both phase and frequency. This timebase is similar * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. */ uint32_t time_since_ec_boot_ms; /* * Number of times the AP was reset by the EC since the last EC boot. * Note that the AP may be held in reset by the EC during the initial * boot sequence, such that the very first AP boot may count as more * than one here. */ uint32_t ap_resets_since_ec_boot; /* * The set of flags which describe the EC's most recent reset. See * include/system.h RESET_FLAG_* for details. */ uint32_t ec_reset_flags; /* Empty log entries have both the cause and timestamp set to zero. */ struct ap_reset_log_entry { /* * See include/chipset.h: enum chipset_{reset,shutdown}_reason * for details. */ uint16_t reset_cause; /* Reserved for protocol growth. */ uint16_t reserved; /* * The time of the reset's assertion, in milliseconds since the * last EC boot, in the same epoch as time_since_ec_boot_ms. * Set to zero if the log entry is empty. */ uint32_t reset_time_ms; } recent_ap_reset[4]; } __ec_align4; /* * Add entropy to the device secret (stored in the rollback region). * * Depending on the chip, the operation may take a long time (e.g. to erase * flash), so the commands are asynchronous. */ #define EC_CMD_ADD_ENTROPY 0x0122 enum add_entropy_action { /* Add entropy to the current secret. */ ADD_ENTROPY_ASYNC = 0, /* * Add entropy, and also make sure that the previous secret is erased. * (this can be implemented by adding entropy multiple times until * all rolback blocks have been overwritten). */ ADD_ENTROPY_RESET_ASYNC = 1, /* Read back result from the previous operation. */ ADD_ENTROPY_GET_RESULT = 2, }; struct ec_params_rollback_add_entropy { uint8_t action; } __ec_align1; /* * Perform a single read of a given ADC channel. */ #define EC_CMD_ADC_READ 0x0123 struct ec_params_adc_read { uint8_t adc_channel; } __ec_align1; struct ec_response_adc_read { int32_t adc_value; } __ec_align4; /* * Read back rollback info */ #define EC_CMD_ROLLBACK_INFO 0x0124 struct ec_response_rollback_info { int32_t id; /* Incrementing number to indicate which region to use. */ int32_t rollback_min_version; int32_t rw_rollback_version; } __ec_align4; /* Issue AP reset */ #define EC_CMD_AP_RESET 0x0125 /** * Get the number of peripheral charge ports */ #define EC_CMD_PCHG_COUNT 0x0134 #define EC_PCHG_MAX_PORTS 8 struct ec_response_pchg_count { uint8_t port_count; } __ec_align1; /** * Get the status of a peripheral charge port */ #define EC_CMD_PCHG 0x0135 struct ec_params_pchg { uint8_t port; } __ec_align1; struct ec_response_pchg { uint32_t error; /* enum pchg_error */ uint8_t state; /* enum pchg_state state */ uint8_t battery_percentage; uint8_t unused0; uint8_t unused1; /* Fields added in version 1 */ uint32_t fw_version; uint32_t dropped_event_count; } __ec_align2; enum pchg_state { /* Charger is reset and not initialized. */ PCHG_STATE_RESET = 0, /* Charger is initialized or disabled. */ PCHG_STATE_INITIALIZED, /* Charger is enabled and ready to detect a device. */ PCHG_STATE_ENABLED, /* Device is in proximity. */ PCHG_STATE_DETECTED, /* Device is being charged. */ PCHG_STATE_CHARGING, /* Device is fully charged. It implies DETECTED (& not charging). */ PCHG_STATE_FULL, /* In download (a.k.a. firmware update) mode */ PCHG_STATE_DOWNLOAD, /* In download mode. Ready for receiving data. */ PCHG_STATE_DOWNLOADING, /* Device is ready for data communication. */ PCHG_STATE_CONNECTED, /* Put no more entry below */ PCHG_STATE_COUNT, }; #define EC_PCHG_STATE_TEXT { \ [PCHG_STATE_RESET] = "RESET", \ [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ [PCHG_STATE_ENABLED] = "ENABLED", \ [PCHG_STATE_DETECTED] = "DETECTED", \ [PCHG_STATE_CHARGING] = "CHARGING", \ [PCHG_STATE_FULL] = "FULL", \ [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ [PCHG_STATE_CONNECTED] = "CONNECTED", \ } /*****************************************************************************/ /* Voltage regulator controls */ /* * Get basic info of voltage regulator for given index. * * Returns the regulator name and supported voltage list in mV. */ #define EC_CMD_REGULATOR_GET_INFO 0x012C /* Maximum length of regulator name */ #define EC_REGULATOR_NAME_MAX_LEN 16 /* Maximum length of the supported voltage list. */ #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 struct ec_params_regulator_get_info { uint32_t index; } __ec_align4; struct ec_response_regulator_get_info { char name[EC_REGULATOR_NAME_MAX_LEN]; uint16_t num_voltages; uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; } __ec_align2; /* * Configure the regulator as enabled / disabled. */ #define EC_CMD_REGULATOR_ENABLE 0x012D struct ec_params_regulator_enable { uint32_t index; uint8_t enable; } __ec_align4; /* * Query if the regulator is enabled. * * Returns 1 if the regulator is enabled, 0 if not. */ #define EC_CMD_REGULATOR_IS_ENABLED 0x012E struct ec_params_regulator_is_enabled { uint32_t index; } __ec_align4; struct ec_response_regulator_is_enabled { uint8_t enabled; } __ec_align1; /* * Set voltage for the voltage regulator within the range specified. * * The driver should select the voltage in range closest to min_mv. * * Also note that this might be called before the regulator is enabled, and the * setting should be in effect after the regulator is enabled. */ #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F struct ec_params_regulator_set_voltage { uint32_t index; uint32_t min_mv; uint32_t max_mv; } __ec_align4; /* * Get the currently configured voltage for the voltage regulator. * * Note that this might be called before the regulator is enabled, and this * should return the configured output voltage if the regulator is enabled. */ #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 struct ec_params_regulator_get_voltage { uint32_t index; } __ec_align4; struct ec_response_regulator_get_voltage { uint32_t voltage_mv; } __ec_align4; /* * Gather all discovery information for the given port and partner type. * * Note that if discovery has not yet completed, only the currently completed * responses will be filled in. If the discovery data structures are changed * in the process of the command running, BUSY will be returned. * * VDO field sizes are set to the maximum possible number of VDOs a VDM may * contain, while the number of SVIDs here is selected to fit within the PROTO2 * maximum parameter size. */ #define EC_CMD_TYPEC_DISCOVERY 0x0131 enum typec_partner_type { TYPEC_PARTNER_SOP = 0, TYPEC_PARTNER_SOP_PRIME = 1, }; struct ec_params_typec_discovery { uint8_t port; uint8_t partner_type; /* enum typec_partner_type */ } __ec_align1; struct svid_mode_info { uint16_t svid; uint16_t mode_count; /* Number of modes partner sent */ uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ }; struct ec_response_typec_discovery { uint8_t identity_count; /* Number of identity VDOs partner sent */ uint8_t svid_count; /* Number of SVIDs partner sent */ uint16_t reserved; uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ struct svid_mode_info svids[0]; } __ec_align1; /* USB Type-C commands for AP-controlled device policy. */ #define EC_CMD_TYPEC_CONTROL 0x0132 enum typec_control_command { TYPEC_CONTROL_COMMAND_EXIT_MODES, TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, TYPEC_CONTROL_COMMAND_ENTER_MODE, }; struct ec_params_typec_control { uint8_t port; uint8_t command; /* enum typec_control_command */ uint16_t reserved; /* * This section will be interpreted based on |command|. Define a * placeholder structure to avoid having to increase the size and bump * the command version when adding new sub-commands. */ union { uint32_t clear_events_mask; uint8_t mode_to_enter; /* enum typec_mode */ uint8_t placeholder[128]; }; } __ec_align1; /* * Gather all status information for a port. * * Note: this covers many of the return fields from the deprecated * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the * discovery data. The "enum pd_cc_states" is defined with the deprecated * EC_CMD_USB_PD_CONTROL command. * * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. */ #define EC_CMD_TYPEC_STATUS 0x0133 /* * Power role. * * Note this is also used for PD header creation, and values align to those in * the Power Delivery Specification Revision 3.0 (See * 6.2.1.1.4 Port Power Role). */ enum pd_power_role { PD_ROLE_SINK = 0, PD_ROLE_SOURCE = 1 }; /* * Data role. * * Note this is also used for PD header creation, and the first two values * align to those in the Power Delivery Specification Revision 3.0 (See * 6.2.1.1.6 Port Data Role). */ enum pd_data_role { PD_ROLE_UFP = 0, PD_ROLE_DFP = 1, PD_ROLE_DISCONNECTED = 2, }; enum pd_vconn_role { PD_ROLE_VCONN_OFF = 0, PD_ROLE_VCONN_SRC = 1, }; /* * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, * regardless of whether a debug accessory is connected. */ enum tcpc_cc_polarity { /* * _CCx: is used to indicate the polarity while not connected to * a Debug Accessory. Only one CC line will assert a resistor and * the other will be open. */ POLARITY_CC1 = 0, POLARITY_CC2 = 1, /* * _CCx_DTS is used to indicate the polarity while connected to a * SRC Debug Accessory. Assert resistors on both lines. */ POLARITY_CC1_DTS = 2, POLARITY_CC2_DTS = 3, /* * The current TCPC code relies on these specific POLARITY values. * Adding in a check to verify if the list grows for any reason * that this will give a hint that other places need to be * adjusted. */ POLARITY_COUNT }; #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) #define PD_STATUS_EVENT_HARD_RESET BIT(2) struct ec_params_typec_status { uint8_t port; } __ec_align1; struct ec_response_typec_status { uint8_t pd_enabled; /* PD communication enabled - bool */ uint8_t dev_connected; /* Device connected - bool */ uint8_t sop_connected; /* Device is SOP PD capable - bool */ uint8_t source_cap_count; /* Number of Source Cap PDOs */ uint8_t power_role; /* enum pd_power_role */ uint8_t data_role; /* enum pd_data_role */ uint8_t vconn_role; /* enum pd_vconn_role */ uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ uint8_t polarity; /* enum tcpc_cc_polarity */ uint8_t cc_state; /* enum pd_cc_states */ uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ char tc_state[32]; /* TC state name */ uint32_t events; /* PD_STATUS_EVENT bitmask */ /* * BCD PD revisions for partners * * The format has the PD major reversion in the upper nibble, and PD * minor version in the next nibble. Following two nibbles are * currently 0. * ex. PD 3.2 would map to 0x3200 * * PD major/minor will be 0 if no PD device is connected. */ uint16_t sop_revision; uint16_t sop_prime_revision; uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ } __ec_align1; /*****************************************************************************/ /* The command range 0x200-0x2FF is reserved for Rotor. */ /*****************************************************************************/ /* * Reserve a range of host commands for the CR51 firmware. */ #define EC_CMD_CR51_BASE 0x0300 #define EC_CMD_CR51_LAST 0x03FF /*****************************************************************************/ /* Fingerprint MCU commands: range 0x0400-0x040x */ /* Fingerprint SPI sensor passthru command: prototyping ONLY */ #define EC_CMD_FP_PASSTHRU 0x0400 #define EC_FP_FLAG_NOT_COMPLETE 0x1 struct ec_params_fp_passthru { uint16_t len; /* Number of bytes to write then read */ uint16_t flags; /* EC_FP_FLAG_xxx */ uint8_t data[]; /* Data to send */ } __ec_align2; /* Configure the Fingerprint MCU behavior */ #define EC_CMD_FP_MODE 0x0402 /* Put the sensor in its lowest power mode */ #define FP_MODE_DEEPSLEEP BIT(0) /* Wait to see a finger on the sensor */ #define FP_MODE_FINGER_DOWN BIT(1) /* Poll until the finger has left the sensor */ #define FP_MODE_FINGER_UP BIT(2) /* Capture the current finger image */ #define FP_MODE_CAPTURE BIT(3) /* Finger enrollment session on-going */ #define FP_MODE_ENROLL_SESSION BIT(4) /* Enroll the current finger image */ #define FP_MODE_ENROLL_IMAGE BIT(5) /* Try to match the current finger image */ #define FP_MODE_MATCH BIT(6) /* Reset and re-initialize the sensor. */ #define FP_MODE_RESET_SENSOR BIT(7) /* special value: don't change anything just read back current mode */ #define FP_MODE_DONT_CHANGE BIT(31) #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ FP_MODE_FINGER_DOWN | \ FP_MODE_FINGER_UP | \ FP_MODE_CAPTURE | \ FP_MODE_ENROLL_SESSION | \ FP_MODE_ENROLL_IMAGE | \ FP_MODE_MATCH | \ FP_MODE_RESET_SENSOR | \ FP_MODE_DONT_CHANGE) /* Capture types defined in bits [30..28] */ #define FP_MODE_CAPTURE_TYPE_SHIFT 28 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) /* * This enum must remain ordered, if you add new values you must ensure that * FP_CAPTURE_TYPE_MAX is still the last one. */ enum fp_capture_type { /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ FP_CAPTURE_VENDOR_FORMAT = 0, /* Simple raw image capture (produces width x height x bpp bits) */ FP_CAPTURE_SIMPLE_IMAGE = 1, /* Self test pattern (e.g. checkerboard) */ FP_CAPTURE_PATTERN0 = 2, /* Self test pattern (e.g. inverted checkerboard) */ FP_CAPTURE_PATTERN1 = 3, /* Capture for Quality test with fixed contrast */ FP_CAPTURE_QUALITY_TEST = 4, /* Capture for pixel reset value test */ FP_CAPTURE_RESET_TEST = 5, FP_CAPTURE_TYPE_MAX, }; /* Extracts the capture type from the sensor 'mode' word */ #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ >> FP_MODE_CAPTURE_TYPE_SHIFT) struct ec_params_fp_mode { uint32_t mode; /* as defined by FP_MODE_ constants */ } __ec_align4; struct ec_response_fp_mode { uint32_t mode; /* as defined by FP_MODE_ constants */ } __ec_align4; /* Retrieve Fingerprint sensor information */ #define EC_CMD_FP_INFO 0x0403 /* Number of dead pixels detected on the last maintenance */ #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) /* Unknown number of dead pixels detected on the last maintenance */ #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) /* No interrupt from the sensor */ #define FP_ERROR_NO_IRQ BIT(12) /* SPI communication error */ #define FP_ERROR_SPI_COMM BIT(13) /* Invalid sensor Hardware ID */ #define FP_ERROR_BAD_HWID BIT(14) /* Sensor initialization failed */ #define FP_ERROR_INIT_FAIL BIT(15) struct ec_response_fp_info_v0 { /* Sensor identification */ uint32_t vendor_id; uint32_t product_id; uint32_t model_id; uint32_t version; /* Image frame characteristics */ uint32_t frame_size; uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ uint16_t width; uint16_t height; uint16_t bpp; uint16_t errors; /* see FP_ERROR_ flags above */ } __ec_align4; struct ec_response_fp_info { /* Sensor identification */ uint32_t vendor_id; uint32_t product_id; uint32_t model_id; uint32_t version; /* Image frame characteristics */ uint32_t frame_size; uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ uint16_t width; uint16_t height; uint16_t bpp; uint16_t errors; /* see FP_ERROR_ flags above */ /* Template/finger current information */ uint32_t template_size; /* max template size in bytes */ uint16_t template_max; /* maximum number of fingers/templates */ uint16_t template_valid; /* number of valid fingers/templates */ uint32_t template_dirty; /* bitmap of templates with MCU side changes */ uint32_t template_version; /* version of the template format */ } __ec_align4; /* Get the last captured finger frame or a template content */ #define EC_CMD_FP_FRAME 0x0404 /* constants defining the 'offset' field which also contains the frame index */ #define FP_FRAME_INDEX_SHIFT 28 /* Frame buffer where the captured image is stored */ #define FP_FRAME_INDEX_RAW_IMAGE 0 /* First frame buffer holding a template */ #define FP_FRAME_INDEX_TEMPLATE 1 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF /* Version of the format of the encrypted templates. */ #define FP_TEMPLATE_FORMAT_VERSION 3 /* Constants for encryption parameters */ #define FP_CONTEXT_NONCE_BYTES 12 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) #define FP_CONTEXT_TAG_BYTES 16 #define FP_CONTEXT_SALT_BYTES 16 #define FP_CONTEXT_TPM_BYTES 32 struct ec_fp_template_encryption_metadata { /* * Version of the structure format (N=3). */ uint16_t struct_version; /* Reserved bytes, set to 0. */ uint16_t reserved; /* * The salt is *only* ever used for key derivation. The nonce is unique, * a different one is used for every message. */ uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; uint8_t salt[FP_CONTEXT_SALT_BYTES]; uint8_t tag[FP_CONTEXT_TAG_BYTES]; }; struct ec_params_fp_frame { /* * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE * in the high nibble, and the real offset within the frame in * FP_FRAME_OFFSET_MASK. */ uint32_t offset; uint32_t size; } __ec_align4; /* Load a template into the MCU */ #define EC_CMD_FP_TEMPLATE 0x0405 /* Flag in the 'size' field indicating that the full template has been sent */ #define FP_TEMPLATE_COMMIT 0x80000000 struct ec_params_fp_template { uint32_t offset; uint32_t size; uint8_t data[]; } __ec_align4; /* Clear the current fingerprint user context and set a new one */ #define EC_CMD_FP_CONTEXT 0x0406 struct ec_params_fp_context { uint32_t userid[FP_CONTEXT_USERID_WORDS]; } __ec_align4; #define EC_CMD_FP_STATS 0x0407 #define FPSTATS_CAPTURE_INV BIT(0) #define FPSTATS_MATCHING_INV BIT(1) struct ec_response_fp_stats { uint32_t capture_time_us; uint32_t matching_time_us; uint32_t overall_time_us; struct { uint32_t lo; uint32_t hi; } overall_t0; uint8_t timestamps_invalid; int8_t template_matched; } __ec_align2; #define EC_CMD_FP_SEED 0x0408 struct ec_params_fp_seed { /* * Version of the structure format (N=3). */ uint16_t struct_version; /* Reserved bytes, set to 0. */ uint16_t reserved; /* Seed from the TPM. */ uint8_t seed[FP_CONTEXT_TPM_BYTES]; } __ec_align4; #define EC_CMD_FP_ENC_STATUS 0x0409 /* FP TPM seed has been set or not */ #define FP_ENC_STATUS_SEED_SET BIT(0) struct ec_response_fp_encryption_status { /* Used bits in encryption engine status */ uint32_t valid_flags; /* Encryption engine status */ uint32_t status; } __ec_align4; /*****************************************************************************/ /* Touchpad MCU commands: range 0x0500-0x05FF */ /* Perform touchpad self test */ #define EC_CMD_TP_SELF_TEST 0x0500 /* Get number of frame types, and the size of each type */ #define EC_CMD_TP_FRAME_INFO 0x0501 struct ec_response_tp_frame_info { uint32_t n_frames; uint32_t frame_sizes[]; } __ec_align4; /* Create a snapshot of current frame readings */ #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 /* Read the frame */ #define EC_CMD_TP_FRAME_GET 0x0503 struct ec_params_tp_frame_get { uint32_t frame_index; uint32_t offset; uint32_t size; } __ec_align4; /*****************************************************************************/ /* EC-EC communication commands: range 0x0600-0x06FF */ #define EC_COMM_TEXT_MAX 8 /* * Get battery static information, i.e. information that never changes, or * very infrequently. */ #define EC_CMD_BATTERY_GET_STATIC 0x0600 /** * struct ec_params_battery_static_info - Battery static info parameters * @index: Battery index. */ struct ec_params_battery_static_info { uint8_t index; } __ec_align_size1; /** * struct ec_response_battery_static_info - Battery static info response * @design_capacity: Battery Design Capacity (mAh) * @design_voltage: Battery Design Voltage (mV) * @manufacturer: Battery Manufacturer String * @model: Battery Model Number String * @serial: Battery Serial Number String * @type: Battery Type String * @cycle_count: Battery Cycle Count */ struct ec_response_battery_static_info { uint16_t design_capacity; uint16_t design_voltage; char manufacturer[EC_COMM_TEXT_MAX]; char model[EC_COMM_TEXT_MAX]; char serial[EC_COMM_TEXT_MAX]; char type[EC_COMM_TEXT_MAX]; /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ uint32_t cycle_count; } __ec_align4; /* * Get battery dynamic information, i.e. information that is likely to change * every time it is read. */ #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 /** * struct ec_params_battery_dynamic_info - Battery dynamic info parameters * @index: Battery index. */ struct ec_params_battery_dynamic_info { uint8_t index; } __ec_align_size1; /** * struct ec_response_battery_dynamic_info - Battery dynamic info response * @actual_voltage: Battery voltage (mV) * @actual_current: Battery current (mA); negative=discharging * @remaining_capacity: Remaining capacity (mAh) * @full_capacity: Capacity (mAh, might change occasionally) * @flags: Flags, see EC_BATT_FLAG_* * @desired_voltage: Charging voltage desired by battery (mV) * @desired_current: Charging current desired by battery (mA) */ struct ec_response_battery_dynamic_info { int16_t actual_voltage; int16_t actual_current; int16_t remaining_capacity; int16_t full_capacity; int16_t flags; int16_t desired_voltage; int16_t desired_current; } __ec_align2; /* * Control charger chip. Used to control charger chip on the slave. */ #define EC_CMD_CHARGER_CONTROL 0x0602 /** * struct ec_params_charger_control - Charger control parameters * @max_current: Charger current (mA). Positive to allow base to draw up to * max_current and (possibly) charge battery, negative to request current * from base (OTG). * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is * >= 0. * @allow_charging: Allow base battery charging (only makes sense if * max_current > 0). */ struct ec_params_charger_control { int16_t max_current; uint16_t otg_voltage; uint8_t allow_charging; } __ec_align_size1; /* Get ACK from the USB-C SS muxes */ #define EC_CMD_USB_PD_MUX_ACK 0x0603 struct ec_params_usb_pd_mux_ack { uint8_t port; /* USB-C port number */ } __ec_align1; /*****************************************************************************/ /* * Reserve a range of host commands for board-specific, experimental, or * special purpose features. These can be (re)used without updating this file. * * CAUTION: Don't go nuts with this. Shipping products should document ALL * their EC commands for easier development, testing, debugging, and support. * * All commands MUST be #defined to be 4-digit UPPER CASE hex values * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. * * In your experimental code, you may want to do something like this: * * #define EC_CMD_MAGIC_FOO 0x0000 * #define EC_CMD_MAGIC_BAR 0x0001 * #define EC_CMD_MAGIC_HEY 0x0002 * * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, * EC_VER_MASK(0); * * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, * EC_VER_MASK(0); * * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, * EC_VER_MASK(0); */ #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF /* * Given the private host command offset, calculate the true private host * command value. */ #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ (EC_CMD_BOARD_SPECIFIC_BASE + (command)) /*****************************************************************************/ /* * Passthru commands * * Some platforms have sub-processors chained to each other. For example. * * AP <--> EC <--> PD MCU * * The top 2 bits of the command number are used to indicate which device the * command is intended for. Device 0 is always the device receiving the * command; other device mapping is board-specific. * * When a device receives a command to be passed to a sub-processor, it passes * it on with the device number set back to 0. This allows the sub-processor * to remain blissfully unaware of whether the command originated on the next * device up the chain, or was passed through from the AP. * * In the above example, if the AP wants to send command 0x0002 to the PD MCU, * AP sends command 0x4002 to the EC * EC sends command 0x0002 to the PD MCU * EC forwards PD MCU response back to the AP */ /* Offset and max command number for sub-device n */ #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) /*****************************************************************************/ /* * Deprecated constants. These constants have been renamed for clarity. The * meaning and size has not changed. Programs that use the old names should * switch to the new names soon, as the old names may not be carried forward * forever. */ #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE #endif /* __CROS_EC_COMMANDS_H */ PK ! ���|# # platform_data/i2c-pca-platform.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef I2C_PCA9564_PLATFORM_H #define I2C_PCA9564_PLATFORM_H struct i2c_pca9564_pf_platform_data { int i2c_clock_speed; /* values are defined in linux/i2c-algo-pca.h */ int timeout; /* timeout in jiffies */ }; #endif /* I2C_PCA9564_PLATFORM_H */ PK ! &�=� � ! platform_data/clk-da8xx-cfgchip.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * clk-da8xx-cfgchip - TI DaVinci DA8xx CFGCHIP clock driver * * Copyright (C) 2018 David Lechner <david@lechnology.com> */ #ifndef __LINUX_PLATFORM_DATA_CLK_DA8XX_CFGCHIP_H__ #define __LINUX_PLATFORM_DATA_CLK_DA8XX_CFGCHIP_H__ #include <linux/regmap.h> /** * da8xx_cfgchip_clk_platform_data * @cfgchip: CFGCHIP syscon regmap */ struct da8xx_cfgchip_clk_platform_data { struct regmap *cfgchip; }; #endif /* __LINUX_PLATFORM_DATA_CLK_DA8XX_CFGCHIP_H__ */ PK ! ��D � � platform_data/usb-omap1.hnu �[��� /* * Platform data for OMAP1 USB * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive for * more details. */ #ifndef __LINUX_USB_OMAP1_H #define __LINUX_USB_OMAP1_H #include <linux/platform_device.h> struct omap_usb_config { /* Configure drivers according to the connectors on your board: * - "A" connector (rectagular) * ... for host/OHCI use, set "register_host". * - "B" connector (squarish) or "Mini-B" * ... for device/gadget use, set "register_dev". * - "Mini-AB" connector (very similar to Mini-B) * ... for OTG use as device OR host, initialize "otg" */ unsigned register_host:1; unsigned register_dev:1; u8 otg; /* port number, 1-based: usb1 == 2 */ const char *extcon; /* extcon device for OTG */ u8 hmc_mode; /* implicitly true if otg: host supports remote wakeup? */ u8 rwc; /* signaling pins used to talk to transceiver on usbN: * 0 == usbN unused * 2 == usb0-only, using internal transceiver * 3 == 3 wire bidirectional * 4 == 4 wire bidirectional * 6 == 6 wire unidirectional (or TLL) */ u8 pins[3]; struct platform_device *udc_device; struct platform_device *ohci_device; struct platform_device *otg_device; u32 (*usb0_init)(unsigned nwires, unsigned is_device); u32 (*usb1_init)(unsigned nwires); u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); int (*ocpi_enable)(void); void (*lb_reset)(void); }; #endif /* __LINUX_USB_OMAP1_H */ PK ! @?Z�� � platform_data/ata-pxa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Generic PXA PATA driver * * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> */ #ifndef __MACH_PATA_PXA_H__ #define __MACH_PATA_PXA_H__ struct pata_pxa_pdata { /* PXA DMA DREQ<0:2> pin */ uint32_t dma_dreq; /* Register shift */ uint32_t reg_shift; /* IRQ flags */ uint32_t irq_flags; }; #endif /* __MACH_PATA_PXA_H__ */ PK ! 2V V platform_data/gpio-davinci.hnu �[��� /* * DaVinci GPIO Platform Related Defines * * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __DAVINCI_GPIO_PLATFORM_H #define __DAVINCI_GPIO_PLATFORM_H struct davinci_gpio_platform_data { bool no_auto_base; u32 base; u32 ngpio; u32 gpio_unbanked; }; /* Convert GPIO signal to GPIO pin number */ #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio)) #endif PK ! � �IK K platform_data/mmc-mxcmmc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef ASMARM_ARCH_MMC_H #define ASMARM_ARCH_MMC_H #include <linux/interrupt.h> #include <linux/mmc/host.h> struct device; /* board specific SDHC data, optional. * If not present, a writable card with 3,3V is assumed. */ struct imxmmc_platform_data { /* Return values for the get_ro callback should be: * 0 for a read/write card * 1 for a read-only card * -ENOSYS when not supported (equal to NULL callback) * or a negative errno value when something bad happened */ int (*get_ro)(struct device *); /* board specific hook to (de)initialize the SD slot. * The board code can call 'handler' on a card detection * change giving data as argument. */ int (*init)(struct device *dev, irq_handler_t handler, void *data); void (*exit)(struct device *dev, void *data); /* available voltages. If not given, assume * MMC_VDD_32_33 | MMC_VDD_33_34 */ unsigned int ocr_avail; /* adjust slot voltage */ void (*setpower)(struct device *, unsigned int vdd); /* enable card detect using DAT3 */ int dat3_card_detect; }; #endif PK ! N���� � platform_data/tsc2007.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_I2C_TSC2007_H #define __LINUX_I2C_TSC2007_H /* linux/platform_data/tsc2007.h */ struct tsc2007_platform_data { u16 model; /* 2007. */ u16 x_plate_ohms; /* must be non-zero value */ u16 max_rt; /* max. resistance above which samples are ignored */ unsigned long poll_period; /* time (in ms) between samples */ int fuzzx; /* fuzz factor for X, Y and pressure axes */ int fuzzy; int fuzzz; int (*get_pendown_state)(struct device *); /* If needed, clear 2nd level interrupt source */ void (*clear_penirq)(void); int (*init_platform_hw)(void); void (*exit_platform_hw)(void); }; #endif PK ! .���� � platform_data/voltage-omap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * OMAP Voltage Management Routines * * Copyright (C) 2011, Texas Instruments, Inc. */ #ifndef __ARCH_ARM_OMAP_VOLTAGE_H #define __ARCH_ARM_OMAP_VOLTAGE_H /** * struct omap_volt_data - Omap voltage specific data. * @voltage_nominal: The possible voltage value in uV * @sr_efuse_offs: The offset of the efuse register(from system * control module base address) from where to read * the n-target value for the smartreflex module. * @sr_errminlimit: Error min limit value for smartreflex. This value * differs at differnet opp and thus is linked * with voltage. * @vp_errorgain: Error gain value for the voltage processor. This * field also differs according to the voltage/opp. */ struct omap_volt_data { u32 volt_nominal; u32 sr_efuse_offs; u8 sr_errminlimit; u8 vp_errgain; }; struct voltagedomain; struct voltagedomain *voltdm_lookup(const char *name); int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); #endif PK ! �.N@� � svga.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SVGA_H #define _LINUX_SVGA_H #include <linux/pci.h> #include <video/vga.h> /* Terminator for register set */ #define VGA_REGSET_END_VAL 0xFF #define VGA_REGSET_END {VGA_REGSET_END_VAL, 0, 0} struct vga_regset { u8 regnum; u8 lowbit; u8 highbit; }; /* ------------------------------------------------------------------------- */ #define SVGA_FORMAT_END_VAL 0xFFFF #define SVGA_FORMAT_END {SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0} struct svga_fb_format { /* var part */ u32 bits_per_pixel; struct fb_bitfield red; struct fb_bitfield green; struct fb_bitfield blue; struct fb_bitfield transp; u32 nonstd; /* fix part */ u32 type; u32 type_aux; u32 visual; u32 xpanstep; u32 xresstep; }; struct svga_timing_regs { const struct vga_regset *h_total_regs; const struct vga_regset *h_display_regs; const struct vga_regset *h_blank_start_regs; const struct vga_regset *h_blank_end_regs; const struct vga_regset *h_sync_start_regs; const struct vga_regset *h_sync_end_regs; const struct vga_regset *v_total_regs; const struct vga_regset *v_display_regs; const struct vga_regset *v_blank_start_regs; const struct vga_regset *v_blank_end_regs; const struct vga_regset *v_sync_start_regs; const struct vga_regset *v_sync_end_regs; }; struct svga_pll { u16 m_min; u16 m_max; u16 n_min; u16 n_max; u16 r_min; u16 r_max; /* r_max < 32 */ u32 f_vco_min; u32 f_vco_max; u32 f_base; }; /* Write a value to the attribute register */ static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) { vga_r(regbase, VGA_IS1_RC); vga_w(regbase, VGA_ATT_IW, index); vga_w(regbase, VGA_ATT_W, data); } /* Write a value to a sequence register with a mask */ static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) { vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask)); } /* Write a value to a CRT register with a mask */ static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) { vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask)); } static inline int svga_primary_device(struct pci_dev *dev) { u16 flags; pci_read_config_word(dev, PCI_COMMAND, &flags); return (flags & PCI_COMMAND_IO); } void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); void svga_set_default_gfx_regs(void __iomem *regbase); void svga_set_default_atc_regs(void __iomem *regbase); void svga_set_default_seq_regs(void __iomem *regbase); void svga_set_default_crt_regs(void __iomem *regbase); void svga_set_textmode_vga_regs(void __iomem *regbase); void svga_settile(struct fb_info *info, struct fb_tilemap *map); void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area); void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect); void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit); void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor); int svga_get_tilemax(struct fb_info *info); void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps, struct fb_var_screeninfo *var); int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node); int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node); void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node); int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix); #endif /* _LINUX_SVGA_H */ PK ! ���9b b leds-pca9532.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * pca9532.h - platform data structure for pca9532 led controller * * Copyright (C) 2008 Riku Voipio <riku.voipio@movial.fi> * * Datasheet: http://www.nxp.com/acrobat/datasheets/PCA9532_3.pdf */ #ifndef __LINUX_PCA9532_H #define __LINUX_PCA9532_H #include <linux/leds.h> #include <linux/workqueue.h> #include <dt-bindings/leds/leds-pca9532.h> enum pca9532_state { PCA9532_OFF = 0x0, PCA9532_ON = 0x1, PCA9532_PWM0 = 0x2, PCA9532_PWM1 = 0x3, PCA9532_KEEP = 0xff, }; struct pca9532_led { u8 id; struct i2c_client *client; const char *name; const char *default_trigger; struct led_classdev ldev; struct work_struct work; u32 type; enum pca9532_state state; }; struct pca9532_platform_data { struct pca9532_led leds[16]; u8 pwm[2]; u8 psc[2]; int gpio_base; }; #endif /* __LINUX_PCA9532_H */ PK ! �A�C� � vt_buffer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/vt_buffer.h -- Access to VT screen buffer * * (c) 1998 Martin Mares <mj@ucw.cz> * * This is a set of macros and functions which are used in the * console driver and related code to access the screen buffer. * In most cases the console works with simple in-memory buffer, * but when handling hardware text mode consoles, we store * the foreground console directly in video memory. */ #ifndef _LINUX_VT_BUFFER_H_ #define _LINUX_VT_BUFFER_H_ #include <linux/string.h> #if IS_ENABLED(CONFIG_VGA_CONSOLE) || IS_ENABLED(CONFIG_MDA_CONSOLE) #include <asm/vga.h> #endif #ifndef VT_BUF_HAVE_RW #define scr_writew(val, addr) (*(addr) = (val)) #define scr_readw(addr) (*(addr)) #endif #ifndef VT_BUF_HAVE_MEMSETW static inline void scr_memsetw(u16 *s, u16 c, unsigned int count) { #ifdef VT_BUF_HAVE_RW count /= 2; while (count--) scr_writew(c, s++); #else memset16(s, c, count / 2); #endif } #endif #ifndef VT_BUF_HAVE_MEMCPYW static inline void scr_memcpyw(u16 *d, const u16 *s, unsigned int count) { #ifdef VT_BUF_HAVE_RW count /= 2; while (count--) scr_writew(scr_readw(s++), d++); #else memcpy(d, s, count); #endif } #endif #ifndef VT_BUF_HAVE_MEMMOVEW static inline void scr_memmovew(u16 *d, const u16 *s, unsigned int count) { #ifdef VT_BUF_HAVE_RW if (d < s) scr_memcpyw(d, s, count); else { count /= 2; d += count; s += count; while (count--) scr_writew(scr_readw(--s), --d); } #else memmove(d, s, count); #endif } #endif #endif PK ! �P�e � � hid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 1999 Andreas Gal * Copyright (c) 2000-2001 Vojtech Pavlik * Copyright (c) 2006-2007 Jiri Kosina */ /* * * Should you need to contact me, the author, you can do so either by * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail: * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic */ #ifndef __HID_H #define __HID_H #include <linux/bitops.h> #include <linux/types.h> #include <linux/slab.h> #include <linux/list.h> #include <linux/mod_devicetable.h> /* hid_device_id */ #include <linux/timer.h> #include <linux/workqueue.h> #include <linux/input.h> #include <linux/semaphore.h> #include <linux/mutex.h> #include <linux/power_supply.h> #include <uapi/linux/hid.h> /* * We parse each description item into this structure. Short items data * values are expanded to 32-bit signed int, long items contain a pointer * into the data area. */ struct hid_item { unsigned format; __u8 size; __u8 type; __u8 tag; union { __u8 u8; __s8 s8; __u16 u16; __s16 s16; __u32 u32; __s32 s32; __u8 *longdata; } data; }; /* * HID report item format */ #define HID_ITEM_FORMAT_SHORT 0 #define HID_ITEM_FORMAT_LONG 1 /* * Special tag indicating long items */ #define HID_ITEM_TAG_LONG 15 /* * HID report descriptor item type (prefix bit 2,3) */ #define HID_ITEM_TYPE_MAIN 0 #define HID_ITEM_TYPE_GLOBAL 1 #define HID_ITEM_TYPE_LOCAL 2 #define HID_ITEM_TYPE_RESERVED 3 /* * HID report descriptor main item tags */ #define HID_MAIN_ITEM_TAG_INPUT 8 #define HID_MAIN_ITEM_TAG_OUTPUT 9 #define HID_MAIN_ITEM_TAG_FEATURE 11 #define HID_MAIN_ITEM_TAG_BEGIN_COLLECTION 10 #define HID_MAIN_ITEM_TAG_END_COLLECTION 12 /* * HID report descriptor main item contents */ #define HID_MAIN_ITEM_CONSTANT 0x001 #define HID_MAIN_ITEM_VARIABLE 0x002 #define HID_MAIN_ITEM_RELATIVE 0x004 #define HID_MAIN_ITEM_WRAP 0x008 #define HID_MAIN_ITEM_NONLINEAR 0x010 #define HID_MAIN_ITEM_NO_PREFERRED 0x020 #define HID_MAIN_ITEM_NULL_STATE 0x040 #define HID_MAIN_ITEM_VOLATILE 0x080 #define HID_MAIN_ITEM_BUFFERED_BYTE 0x100 /* * HID report descriptor collection item types */ #define HID_COLLECTION_PHYSICAL 0 #define HID_COLLECTION_APPLICATION 1 #define HID_COLLECTION_LOGICAL 2 #define HID_COLLECTION_NAMED_ARRAY 4 /* * HID report descriptor global item tags */ #define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0 #define HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM 1 #define HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM 2 #define HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM 3 #define HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM 4 #define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 5 #define HID_GLOBAL_ITEM_TAG_UNIT 6 #define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 7 #define HID_GLOBAL_ITEM_TAG_REPORT_ID 8 #define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 9 #define HID_GLOBAL_ITEM_TAG_PUSH 10 #define HID_GLOBAL_ITEM_TAG_POP 11 /* * HID report descriptor local item tags */ #define HID_LOCAL_ITEM_TAG_USAGE 0 #define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1 #define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2 #define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3 #define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4 #define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5 #define HID_LOCAL_ITEM_TAG_STRING_INDEX 7 #define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8 #define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9 #define HID_LOCAL_ITEM_TAG_DELIMITER 10 /* * HID usage tables */ #define HID_USAGE_PAGE 0xffff0000 #define HID_UP_UNDEFINED 0x00000000 #define HID_UP_GENDESK 0x00010000 #define HID_UP_SIMULATION 0x00020000 #define HID_UP_GENDEVCTRLS 0x00060000 #define HID_UP_KEYBOARD 0x00070000 #define HID_UP_LED 0x00080000 #define HID_UP_BUTTON 0x00090000 #define HID_UP_ORDINAL 0x000a0000 #define HID_UP_TELEPHONY 0x000b0000 #define HID_UP_CONSUMER 0x000c0000 #define HID_UP_DIGITIZER 0x000d0000 #define HID_UP_PID 0x000f0000 #define HID_UP_BATTERY 0x00850000 #define HID_UP_HPVENDOR 0xff7f0000 #define HID_UP_HPVENDOR2 0xff010000 #define HID_UP_MSVENDOR 0xff000000 #define HID_UP_CUSTOM 0x00ff0000 #define HID_UP_LOGIVENDOR 0xffbc0000 #define HID_UP_LOGIVENDOR2 0xff090000 #define HID_UP_LOGIVENDOR3 0xff430000 #define HID_UP_LNVENDOR 0xffa00000 #define HID_UP_SENSOR 0x00200000 #define HID_UP_ASUSVENDOR 0xff310000 #define HID_UP_GOOGLEVENDOR 0xffd10000 #define HID_USAGE 0x0000ffff #define HID_GD_POINTER 0x00010001 #define HID_GD_MOUSE 0x00010002 #define HID_GD_JOYSTICK 0x00010004 #define HID_GD_GAMEPAD 0x00010005 #define HID_GD_KEYBOARD 0x00010006 #define HID_GD_KEYPAD 0x00010007 #define HID_GD_MULTIAXIS 0x00010008 /* * Microsoft Win8 Wireless Radio Controls extensions CA, see: * http://www.usb.org/developers/hidpage/HUTRR40RadioHIDUsagesFinal.pdf */ #define HID_GD_WIRELESS_RADIO_CTLS 0x0001000c /* * System Multi-Axis, see: * http://www.usb.org/developers/hidpage/HUTRR62_-_Generic_Desktop_CA_for_System_Multi-Axis_Controllers.txt */ #define HID_GD_SYSTEM_MULTIAXIS 0x0001000e #define HID_GD_X 0x00010030 #define HID_GD_Y 0x00010031 #define HID_GD_Z 0x00010032 #define HID_GD_RX 0x00010033 #define HID_GD_RY 0x00010034 #define HID_GD_RZ 0x00010035 #define HID_GD_SLIDER 0x00010036 #define HID_GD_DIAL 0x00010037 #define HID_GD_WHEEL 0x00010038 #define HID_GD_HATSWITCH 0x00010039 #define HID_GD_BUFFER 0x0001003a #define HID_GD_BYTECOUNT 0x0001003b #define HID_GD_MOTION 0x0001003c #define HID_GD_START 0x0001003d #define HID_GD_SELECT 0x0001003e #define HID_GD_VX 0x00010040 #define HID_GD_VY 0x00010041 #define HID_GD_VZ 0x00010042 #define HID_GD_VBRX 0x00010043 #define HID_GD_VBRY 0x00010044 #define HID_GD_VBRZ 0x00010045 #define HID_GD_VNO 0x00010046 #define HID_GD_FEATURE 0x00010047 #define HID_GD_RESOLUTION_MULTIPLIER 0x00010048 #define HID_GD_SYSTEM_CONTROL 0x00010080 #define HID_GD_UP 0x00010090 #define HID_GD_DOWN 0x00010091 #define HID_GD_RIGHT 0x00010092 #define HID_GD_LEFT 0x00010093 /* Microsoft Win8 Wireless Radio Controls CA usage codes */ #define HID_GD_RFKILL_BTN 0x000100c6 #define HID_GD_RFKILL_LED 0x000100c7 #define HID_GD_RFKILL_SWITCH 0x000100c8 #define HID_DC_BATTERYSTRENGTH 0x00060020 #define HID_CP_CONSUMER_CONTROL 0x000c0001 #define HID_CP_AC_PAN 0x000c0238 #define HID_DG_DIGITIZER 0x000d0001 #define HID_DG_PEN 0x000d0002 #define HID_DG_LIGHTPEN 0x000d0003 #define HID_DG_TOUCHSCREEN 0x000d0004 #define HID_DG_TOUCHPAD 0x000d0005 #define HID_DG_WHITEBOARD 0x000d0006 #define HID_DG_STYLUS 0x000d0020 #define HID_DG_PUCK 0x000d0021 #define HID_DG_FINGER 0x000d0022 #define HID_DG_TIPPRESSURE 0x000d0030 #define HID_DG_BARRELPRESSURE 0x000d0031 #define HID_DG_INRANGE 0x000d0032 #define HID_DG_TOUCH 0x000d0033 #define HID_DG_UNTOUCH 0x000d0034 #define HID_DG_TAP 0x000d0035 #define HID_DG_TABLETFUNCTIONKEY 0x000d0039 #define HID_DG_PROGRAMCHANGEKEY 0x000d003a #define HID_DG_BATTERYSTRENGTH 0x000d003b #define HID_DG_INVERT 0x000d003c #define HID_DG_TILT_X 0x000d003d #define HID_DG_TILT_Y 0x000d003e #define HID_DG_TWIST 0x000d0041 #define HID_DG_TIPSWITCH 0x000d0042 #define HID_DG_TIPSWITCH2 0x000d0043 #define HID_DG_BARRELSWITCH 0x000d0044 #define HID_DG_ERASER 0x000d0045 #define HID_DG_TABLETPICK 0x000d0046 #define HID_CP_CONSUMERCONTROL 0x000c0001 #define HID_CP_NUMERICKEYPAD 0x000c0002 #define HID_CP_PROGRAMMABLEBUTTONS 0x000c0003 #define HID_CP_MICROPHONE 0x000c0004 #define HID_CP_HEADPHONE 0x000c0005 #define HID_CP_GRAPHICEQUALIZER 0x000c0006 #define HID_CP_FUNCTIONBUTTONS 0x000c0036 #define HID_CP_SELECTION 0x000c0080 #define HID_CP_MEDIASELECTION 0x000c0087 #define HID_CP_SELECTDISC 0x000c00ba #define HID_CP_VOLUMEUP 0x000c00e9 #define HID_CP_VOLUMEDOWN 0x000c00ea #define HID_CP_PLAYBACKSPEED 0x000c00f1 #define HID_CP_PROXIMITY 0x000c0109 #define HID_CP_SPEAKERSYSTEM 0x000c0160 #define HID_CP_CHANNELLEFT 0x000c0161 #define HID_CP_CHANNELRIGHT 0x000c0162 #define HID_CP_CHANNELCENTER 0x000c0163 #define HID_CP_CHANNELFRONT 0x000c0164 #define HID_CP_CHANNELCENTERFRONT 0x000c0165 #define HID_CP_CHANNELSIDE 0x000c0166 #define HID_CP_CHANNELSURROUND 0x000c0167 #define HID_CP_CHANNELLOWFREQUENCYENHANCEMENT 0x000c0168 #define HID_CP_CHANNELTOP 0x000c0169 #define HID_CP_CHANNELUNKNOWN 0x000c016a #define HID_CP_APPLICATIONLAUNCHBUTTONS 0x000c0180 #define HID_CP_GENERICGUIAPPLICATIONCONTROLS 0x000c0200 #define HID_DG_DEVICECONFIG 0x000d000e #define HID_DG_DEVICESETTINGS 0x000d0023 #define HID_DG_AZIMUTH 0x000d003f #define HID_DG_CONFIDENCE 0x000d0047 #define HID_DG_WIDTH 0x000d0048 #define HID_DG_HEIGHT 0x000d0049 #define HID_DG_CONTACTID 0x000d0051 #define HID_DG_INPUTMODE 0x000d0052 #define HID_DG_DEVICEINDEX 0x000d0053 #define HID_DG_CONTACTCOUNT 0x000d0054 #define HID_DG_CONTACTMAX 0x000d0055 #define HID_DG_SCANTIME 0x000d0056 #define HID_DG_SURFACESWITCH 0x000d0057 #define HID_DG_BUTTONSWITCH 0x000d0058 #define HID_DG_BUTTONTYPE 0x000d0059 #define HID_DG_BARRELSWITCH2 0x000d005a #define HID_DG_TOOLSERIALNUMBER 0x000d005b #define HID_DG_LATENCYMODE 0x000d0060 #define HID_BAT_ABSOLUTESTATEOFCHARGE 0x00850065 #define HID_VD_ASUS_CUSTOM_MEDIA_KEYS 0xff310076 /* * HID report types --- Ouch! HID spec says 1 2 3! */ #define HID_INPUT_REPORT 0 #define HID_OUTPUT_REPORT 1 #define HID_FEATURE_REPORT 2 #define HID_REPORT_TYPES 3 /* * HID connect requests */ #define HID_CONNECT_HIDINPUT BIT(0) #define HID_CONNECT_HIDINPUT_FORCE BIT(1) #define HID_CONNECT_HIDRAW BIT(2) #define HID_CONNECT_HIDDEV BIT(3) #define HID_CONNECT_HIDDEV_FORCE BIT(4) #define HID_CONNECT_FF BIT(5) #define HID_CONNECT_DRIVER BIT(6) #define HID_CONNECT_DEFAULT (HID_CONNECT_HIDINPUT|HID_CONNECT_HIDRAW| \ HID_CONNECT_HIDDEV|HID_CONNECT_FF) /* * HID device quirks. */ /* * Increase this if you need to configure more HID quirks at module load time */ #define MAX_USBHID_BOOT_QUIRKS 4 #define HID_QUIRK_INVERT BIT(0) #define HID_QUIRK_NOTOUCH BIT(1) #define HID_QUIRK_IGNORE BIT(2) #define HID_QUIRK_NOGET BIT(3) #define HID_QUIRK_HIDDEV_FORCE BIT(4) #define HID_QUIRK_BADPAD BIT(5) #define HID_QUIRK_MULTI_INPUT BIT(6) #define HID_QUIRK_HIDINPUT_FORCE BIT(7) /* BIT(8) reserved for backward compatibility, was HID_QUIRK_NO_EMPTY_INPUT */ /* BIT(9) reserved for backward compatibility, was NO_INIT_INPUT_REPORTS */ #define HID_QUIRK_ALWAYS_POLL BIT(10) #define HID_QUIRK_INPUT_PER_APP BIT(11) #define HID_QUIRK_X_INVERT BIT(12) #define HID_QUIRK_Y_INVERT BIT(13) #define HID_QUIRK_SKIP_OUTPUT_REPORTS BIT(16) #define HID_QUIRK_SKIP_OUTPUT_REPORT_ID BIT(17) #define HID_QUIRK_NO_OUTPUT_REPORTS_ON_INTR_EP BIT(18) #define HID_QUIRK_HAVE_SPECIAL_DRIVER BIT(19) #define HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE BIT(20) #define HID_QUIRK_FULLSPEED_INTERVAL BIT(28) #define HID_QUIRK_NO_INIT_REPORTS BIT(29) #define HID_QUIRK_NO_IGNORE BIT(30) #define HID_QUIRK_NO_INPUT_SYNC BIT(31) /* * HID device groups * * Note: HID_GROUP_ANY is declared in linux/mod_devicetable.h * and has a value of 0x0000 */ #define HID_GROUP_GENERIC 0x0001 #define HID_GROUP_MULTITOUCH 0x0002 #define HID_GROUP_SENSOR_HUB 0x0003 #define HID_GROUP_MULTITOUCH_WIN_8 0x0004 /* * Vendor specific HID device groups */ #define HID_GROUP_RMI 0x0100 #define HID_GROUP_WACOM 0x0101 #define HID_GROUP_LOGITECH_DJ_DEVICE 0x0102 #define HID_GROUP_STEAM 0x0103 #define HID_GROUP_LOGITECH_27MHZ_DEVICE 0x0104 #define HID_GROUP_VIVALDI 0x0105 /* * HID protocol status */ #define HID_REPORT_PROTOCOL 1 #define HID_BOOT_PROTOCOL 0 /* * This is the global environment of the parser. This information is * persistent for main-items. The global environment can be saved and * restored with PUSH/POP statements. */ struct hid_global { unsigned usage_page; __s32 logical_minimum; __s32 logical_maximum; __s32 physical_minimum; __s32 physical_maximum; __s32 unit_exponent; unsigned unit; unsigned report_id; unsigned report_size; unsigned report_count; }; /* * This is the local environment. It is persistent up the next main-item. */ #define HID_MAX_USAGES 12288 #define HID_DEFAULT_NUM_COLLECTIONS 16 struct hid_local { unsigned usage[HID_MAX_USAGES]; /* usage array */ u8 usage_size[HID_MAX_USAGES]; /* usage size array */ unsigned collection_index[HID_MAX_USAGES]; /* collection index array */ unsigned usage_index; unsigned usage_minimum; unsigned delimiter_depth; unsigned delimiter_branch; }; /* * This is the collection stack. We climb up the stack to determine * application and function of each field. */ struct hid_collection { int parent_idx; /* device->collection */ unsigned type; unsigned usage; unsigned level; }; struct hid_usage { unsigned hid; /* hid usage code */ unsigned collection_index; /* index into collection array */ unsigned usage_index; /* index into usage array */ __s8 resolution_multiplier;/* Effective Resolution Multiplier (HUT v1.12, 4.3.1), default: 1 */ /* hidinput data */ __s8 wheel_factor; /* 120/resolution_multiplier */ __u16 code; /* input driver code */ __u8 type; /* input driver type */ __s8 hat_min; /* hat switch fun */ __s8 hat_max; /* ditto */ __s8 hat_dir; /* ditto */ __s16 wheel_accumulated; /* hi-res wheel */ }; struct hid_input; struct hid_field { unsigned physical; /* physical usage for this field */ unsigned logical; /* logical usage for this field */ unsigned application; /* application usage for this field */ struct hid_usage *usage; /* usage table for this function */ unsigned maxusage; /* maximum usage index */ unsigned flags; /* main-item flags (i.e. volatile,array,constant) */ unsigned report_offset; /* bit offset in the report */ unsigned report_size; /* size of this field in the report */ unsigned report_count; /* number of this field in the report */ unsigned report_type; /* (input,output,feature) */ __s32 *value; /* last known value(s) */ __s32 logical_minimum; __s32 logical_maximum; __s32 physical_minimum; __s32 physical_maximum; __s32 unit_exponent; unsigned unit; struct hid_report *report; /* associated report */ unsigned index; /* index into report->field[] */ /* hidinput data */ struct hid_input *hidinput; /* associated input structure */ __u16 dpad; /* dpad input code */ }; #define HID_MAX_FIELDS 256 struct hid_report { struct list_head list; struct list_head hidinput_list; unsigned int id; /* id of this report */ unsigned int type; /* report type */ unsigned int application; /* application usage for this report */ struct hid_field *field[HID_MAX_FIELDS]; /* fields of the report */ unsigned maxfield; /* maximum valid field index */ unsigned size; /* size of the report (bits) */ struct hid_device *device; /* associated device */ }; #define HID_MAX_IDS 256 struct hid_report_enum { unsigned numbered; struct list_head report_list; struct hid_report *report_id_hash[HID_MAX_IDS]; }; #define HID_MIN_BUFFER_SIZE 64 /* make sure there is at least a packet size of space */ #define HID_MAX_BUFFER_SIZE 16384 /* 16kb */ #define HID_CONTROL_FIFO_SIZE 256 /* to init devices with >100 reports */ #define HID_OUTPUT_FIFO_SIZE 64 struct hid_control_fifo { unsigned char dir; struct hid_report *report; char *raw_report; }; struct hid_output_fifo { struct hid_report *report; char *raw_report; }; #define HID_CLAIMED_INPUT BIT(0) #define HID_CLAIMED_HIDDEV BIT(1) #define HID_CLAIMED_HIDRAW BIT(2) #define HID_CLAIMED_DRIVER BIT(3) #define HID_STAT_ADDED BIT(0) #define HID_STAT_PARSED BIT(1) #define HID_STAT_DUP_DETECTED BIT(2) #define HID_STAT_REPROBED BIT(3) struct hid_input { struct list_head list; struct hid_report *report; struct input_dev *input; const char *name; bool registered; struct list_head reports; /* the list of reports */ unsigned int application; /* application usage for this input */ }; enum hid_type { HID_TYPE_OTHER = 0, HID_TYPE_USBMOUSE, HID_TYPE_USBNONE }; enum hid_battery_status { HID_BATTERY_UNKNOWN = 0, HID_BATTERY_QUERIED, /* Kernel explicitly queried battery strength */ HID_BATTERY_REPORTED, /* Device sent unsolicited battery strength report */ }; struct hid_driver; struct hid_ll_driver; struct hid_device { /* device report descriptor */ __u8 *dev_rdesc; unsigned dev_rsize; __u8 *rdesc; unsigned rsize; struct hid_collection *collection; /* List of HID collections */ unsigned collection_size; /* Number of allocated hid_collections */ unsigned maxcollection; /* Number of parsed collections */ unsigned maxapplication; /* Number of applications */ __u16 bus; /* BUS ID */ __u16 group; /* Report group */ __u32 vendor; /* Vendor ID */ __u32 product; /* Product ID */ __u32 version; /* HID version */ enum hid_type type; /* device type (mouse, kbd, ...) */ unsigned country; /* HID country */ struct hid_report_enum report_enum[HID_REPORT_TYPES]; struct work_struct led_work; /* delayed LED worker */ struct semaphore driver_input_lock; /* protects the current driver */ struct device dev; /* device */ struct hid_driver *driver; struct hid_ll_driver *ll_driver; struct mutex ll_open_lock; unsigned int ll_open_count; #ifdef CONFIG_HID_BATTERY_STRENGTH /* * Power supply information for HID devices which report * battery strength. power_supply was successfully registered if * battery is non-NULL. */ struct power_supply *battery; __s32 battery_capacity; __s32 battery_min; __s32 battery_max; __s32 battery_report_type; __s32 battery_report_id; enum hid_battery_status battery_status; bool battery_avoid_query; ktime_t battery_ratelimit_time; #endif unsigned long status; /* see STAT flags above */ unsigned claimed; /* Claimed by hidinput, hiddev? */ unsigned quirks; /* Various quirks the device can pull on us */ unsigned initial_quirks; /* Initial set of quirks supplied when creating device */ bool io_started; /* If IO has started */ struct list_head inputs; /* The list of inputs */ void *hiddev; /* The hiddev structure */ void *hidraw; char name[128]; /* Device name */ char phys[64]; /* Device physical location */ char uniq[64]; /* Device unique identifier (serial #) */ void *driver_data; /* temporary hid_ff handling (until moved to the drivers) */ int (*ff_init)(struct hid_device *); /* hiddev event handler */ int (*hiddev_connect)(struct hid_device *, unsigned int); void (*hiddev_disconnect)(struct hid_device *); void (*hiddev_hid_event) (struct hid_device *, struct hid_field *field, struct hid_usage *, __s32); void (*hiddev_report_event) (struct hid_device *, struct hid_report *); /* debugging support via debugfs */ unsigned short debug; struct dentry *debug_dir; struct dentry *debug_rdesc; struct dentry *debug_events; struct list_head debug_list; spinlock_t debug_list_lock; wait_queue_head_t debug_wait; struct kref ref; unsigned int id; /* system unique id */ }; void hiddev_free(struct kref *ref); #define to_hid_device(pdev) \ container_of(pdev, struct hid_device, dev) static inline void *hid_get_drvdata(struct hid_device *hdev) { return dev_get_drvdata(&hdev->dev); } static inline void hid_set_drvdata(struct hid_device *hdev, void *data) { dev_set_drvdata(&hdev->dev, data); } #define HID_GLOBAL_STACK_SIZE 4 #define HID_COLLECTION_STACK_SIZE 4 #define HID_SCAN_FLAG_MT_WIN_8 BIT(0) #define HID_SCAN_FLAG_VENDOR_SPECIFIC BIT(1) #define HID_SCAN_FLAG_GD_POINTER BIT(2) struct hid_parser { struct hid_global global; struct hid_global global_stack[HID_GLOBAL_STACK_SIZE]; unsigned int global_stack_ptr; struct hid_local local; unsigned int *collection_stack; unsigned int collection_stack_ptr; unsigned int collection_stack_size; struct hid_device *device; unsigned int scan_flags; }; struct hid_class_descriptor { __u8 bDescriptorType; __le16 wDescriptorLength; } __attribute__ ((packed)); struct hid_descriptor { __u8 bLength; __u8 bDescriptorType; __le16 bcdHID; __u8 bCountryCode; __u8 bNumDescriptors; struct hid_class_descriptor rpt_desc; struct hid_class_descriptor opt_descs[]; } __attribute__ ((packed)); #define HID_DEVICE(b, g, ven, prod) \ .bus = (b), .group = (g), .vendor = (ven), .product = (prod) #define HID_USB_DEVICE(ven, prod) \ .bus = BUS_USB, .vendor = (ven), .product = (prod) #define HID_BLUETOOTH_DEVICE(ven, prod) \ .bus = BUS_BLUETOOTH, .vendor = (ven), .product = (prod) #define HID_I2C_DEVICE(ven, prod) \ .bus = BUS_I2C, .vendor = (ven), .product = (prod) #define HID_REPORT_ID(rep) \ .report_type = (rep) #define HID_USAGE_ID(uhid, utype, ucode) \ .usage_hid = (uhid), .usage_type = (utype), .usage_code = (ucode) /* we don't want to catch types and codes equal to 0 */ #define HID_TERMINATOR (HID_ANY_ID - 1) struct hid_report_id { __u32 report_type; }; struct hid_usage_id { __u32 usage_hid; __u32 usage_type; __u32 usage_code; }; /** * struct hid_driver * @name: driver name (e.g. "Footech_bar-wheel") * @id_table: which devices is this driver for (must be non-NULL for probe * to be called) * @dyn_list: list of dynamically added device ids * @dyn_lock: lock protecting @dyn_list * @match: check if the given device is handled by this driver * @probe: new device inserted * @remove: device removed (NULL if not a hot-plug capable driver) * @report_table: on which reports to call raw_event (NULL means all) * @raw_event: if report in report_table, this hook is called (NULL means nop) * @usage_table: on which events to call event (NULL means all) * @event: if usage in usage_table, this hook is called (NULL means nop) * @report: this hook is called after parsing a report (NULL means nop) * @report_fixup: called before report descriptor parsing (NULL means nop) * @input_mapping: invoked on input registering before mapping an usage * @input_mapped: invoked on input registering after mapping an usage * @input_configured: invoked just before the device is registered * @feature_mapping: invoked on feature registering * @suspend: invoked on suspend (NULL means nop) * @resume: invoked on resume if device was not reset (NULL means nop) * @reset_resume: invoked on resume if device was reset (NULL means nop) * * probe should return -errno on error, or 0 on success. During probe, * input will not be passed to raw_event unless hid_device_io_start is * called. * * raw_event and event should return negative on error, any other value will * pass the event on to .event() typically return 0 for success. * * input_mapping shall return a negative value to completely ignore this usage * (e.g. doubled or invalid usage), zero to continue with parsing of this * usage by generic code (no special handling needed) or positive to skip * generic parsing (needed special handling which was done in the hook already) * input_mapped shall return negative to inform the layer that this usage * should not be considered for further processing or zero to notify that * no processing was performed and should be done in a generic manner * Both these functions may be NULL which means the same behavior as returning * zero from them. */ struct hid_driver { char *name; const struct hid_device_id *id_table; struct list_head dyn_list; spinlock_t dyn_lock; bool (*match)(struct hid_device *dev, bool ignore_special_driver); int (*probe)(struct hid_device *dev, const struct hid_device_id *id); void (*remove)(struct hid_device *dev); const struct hid_report_id *report_table; int (*raw_event)(struct hid_device *hdev, struct hid_report *report, u8 *data, int size); const struct hid_usage_id *usage_table; int (*event)(struct hid_device *hdev, struct hid_field *field, struct hid_usage *usage, __s32 value); void (*report)(struct hid_device *hdev, struct hid_report *report); __u8 *(*report_fixup)(struct hid_device *hdev, __u8 *buf, unsigned int *size); int (*input_mapping)(struct hid_device *hdev, struct hid_input *hidinput, struct hid_field *field, struct hid_usage *usage, unsigned long **bit, int *max); int (*input_mapped)(struct hid_device *hdev, struct hid_input *hidinput, struct hid_field *field, struct hid_usage *usage, unsigned long **bit, int *max); int (*input_configured)(struct hid_device *hdev, struct hid_input *hidinput); void (*feature_mapping)(struct hid_device *hdev, struct hid_field *field, struct hid_usage *usage); #ifdef CONFIG_PM int (*suspend)(struct hid_device *hdev, pm_message_t message); int (*resume)(struct hid_device *hdev); int (*reset_resume)(struct hid_device *hdev); #endif /* private: */ struct device_driver driver; }; #define to_hid_driver(pdrv) \ container_of(pdrv, struct hid_driver, driver) /** * hid_ll_driver - low level driver callbacks * @start: called on probe to start the device * @stop: called on remove * @open: called by input layer on open * @close: called by input layer on close * @power: request underlying hardware to enter requested power mode * @parse: this method is called only once to parse the device data, * shouldn't allocate anything to not leak memory * @request: send report request to device (e.g. feature report) * @wait: wait for buffered io to complete (send/recv reports) * @raw_request: send raw report request to device (e.g. feature report) * @output_report: send output report to device * @idle: send idle request to device * @may_wakeup: return if device may act as a wakeup source during system-suspend * @max_buffer_size: over-ride maximum data buffer size (default: HID_MAX_BUFFER_SIZE) */ struct hid_ll_driver { int (*start)(struct hid_device *hdev); void (*stop)(struct hid_device *hdev); int (*open)(struct hid_device *hdev); void (*close)(struct hid_device *hdev); int (*power)(struct hid_device *hdev, int level); int (*parse)(struct hid_device *hdev); void (*request)(struct hid_device *hdev, struct hid_report *report, int reqtype); int (*wait)(struct hid_device *hdev); int (*raw_request) (struct hid_device *hdev, unsigned char reportnum, __u8 *buf, size_t len, unsigned char rtype, int reqtype); int (*output_report) (struct hid_device *hdev, __u8 *buf, size_t len); int (*idle)(struct hid_device *hdev, int report, int idle, int reqtype); bool (*may_wakeup)(struct hid_device *hdev); unsigned int max_buffer_size; }; extern struct hid_ll_driver i2c_hid_ll_driver; extern struct hid_ll_driver hidp_hid_driver; extern struct hid_ll_driver uhid_hid_driver; extern struct hid_ll_driver usb_hid_driver; static inline bool hid_is_using_ll_driver(struct hid_device *hdev, struct hid_ll_driver *driver) { return hdev->ll_driver == driver; } static inline bool hid_is_usb(struct hid_device *hdev) { return hid_is_using_ll_driver(hdev, &usb_hid_driver); } #define PM_HINT_FULLON 1<<5 #define PM_HINT_NORMAL 1<<1 /* Applications from HID Usage Tables 4/8/99 Version 1.1 */ /* We ignore a few input applications that are not widely used */ #define IS_INPUT_APPLICATION(a) \ (((a >= HID_UP_GENDESK) && (a <= HID_GD_MULTIAXIS)) \ || ((a >= HID_DG_PEN) && (a <= HID_DG_WHITEBOARD)) \ || (a == HID_GD_SYSTEM_CONTROL) || (a == HID_CP_CONSUMER_CONTROL) \ || (a == HID_GD_WIRELESS_RADIO_CTLS)) /* HID core API */ extern int hid_debug; extern bool hid_ignore(struct hid_device *); extern int hid_add_device(struct hid_device *); extern void hid_destroy_device(struct hid_device *); extern struct bus_type hid_bus_type; extern int __must_check __hid_register_driver(struct hid_driver *, struct module *, const char *mod_name); /* use a define to avoid include chaining to get THIS_MODULE & friends */ #define hid_register_driver(driver) \ __hid_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) extern void hid_unregister_driver(struct hid_driver *); /** * module_hid_driver() - Helper macro for registering a HID driver * @__hid_driver: hid_driver struct * * Helper macro for HID drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_hid_driver(__hid_driver) \ module_driver(__hid_driver, hid_register_driver, \ hid_unregister_driver) extern void hidinput_hid_event(struct hid_device *, struct hid_field *, struct hid_usage *, __s32); extern void hidinput_report_event(struct hid_device *hid, struct hid_report *report); extern int hidinput_connect(struct hid_device *hid, unsigned int force); extern void hidinput_disconnect(struct hid_device *); int hid_set_field(struct hid_field *, unsigned, __s32); int hid_input_report(struct hid_device *, int type, u8 *, u32, int); int hidinput_find_field(struct hid_device *hid, unsigned int type, unsigned int code, struct hid_field **field); struct hid_field *hidinput_get_led_field(struct hid_device *hid); unsigned int hidinput_count_leds(struct hid_device *hid); __s32 hidinput_calc_abs_res(const struct hid_field *field, __u16 code); void hid_output_report(struct hid_report *report, __u8 *data); int __hid_request(struct hid_device *hid, struct hid_report *rep, int reqtype); u8 *hid_alloc_report_buf(struct hid_report *report, gfp_t flags); struct hid_device *hid_allocate_device(void); struct hid_report *hid_register_report(struct hid_device *device, unsigned int type, unsigned int id, unsigned int application); int hid_parse_report(struct hid_device *hid, __u8 *start, unsigned size); struct hid_report *hid_validate_values(struct hid_device *hid, unsigned int type, unsigned int id, unsigned int field_index, unsigned int report_counts); void hid_setup_resolution_multiplier(struct hid_device *hid); int hid_open_report(struct hid_device *device); int hid_check_keys_pressed(struct hid_device *hid); int hid_connect(struct hid_device *hid, unsigned int connect_mask); void hid_disconnect(struct hid_device *hid); bool hid_match_one_id(const struct hid_device *hdev, const struct hid_device_id *id); const struct hid_device_id *hid_match_id(const struct hid_device *hdev, const struct hid_device_id *id); const struct hid_device_id *hid_match_device(struct hid_device *hdev, struct hid_driver *hdrv); bool hid_compare_device_paths(struct hid_device *hdev_a, struct hid_device *hdev_b, char separator); s32 hid_snto32(__u32 value, unsigned n); __u32 hid_field_extract(const struct hid_device *hid, __u8 *report, unsigned offset, unsigned n); /** * hid_device_io_start - enable HID input during probe, remove * * @hid: the device * * This should only be called during probe or remove and only be * called by the thread calling probe or remove. It will allow * incoming packets to be delivered to the driver. */ static inline void hid_device_io_start(struct hid_device *hid) { if (hid->io_started) { dev_warn(&hid->dev, "io already started\n"); return; } hid->io_started = true; up(&hid->driver_input_lock); } /** * hid_device_io_stop - disable HID input during probe, remove * * @hid: the device * * Should only be called after hid_device_io_start. It will prevent * incoming packets from going to the driver for the duration of * probe, remove. If called during probe, packets will still go to the * driver after probe is complete. This function should only be called * by the thread calling probe or remove. */ static inline void hid_device_io_stop(struct hid_device *hid) { if (!hid->io_started) { dev_warn(&hid->dev, "io already stopped\n"); return; } hid->io_started = false; down(&hid->driver_input_lock); } /** * hid_map_usage - map usage input bits * * @hidinput: hidinput which we are interested in * @usage: usage to fill in * @bit: pointer to input->{}bit (out parameter) * @max: maximal valid usage->code to consider later (out parameter) * @type: input event type (EV_KEY, EV_REL, ...) * @c: code which corresponds to this usage and type * * The value pointed to by @bit will be set to NULL if either @type is * an unhandled event type, or if @c is out of range for @type. This * can be used as an error condition. */ static inline void hid_map_usage(struct hid_input *hidinput, struct hid_usage *usage, unsigned long **bit, int *max, __u8 type, unsigned int c) { struct input_dev *input = hidinput->input; unsigned long *bmap = NULL; unsigned int limit = 0; switch (type) { case EV_ABS: bmap = input->absbit; limit = ABS_MAX; break; case EV_REL: bmap = input->relbit; limit = REL_MAX; break; case EV_KEY: bmap = input->keybit; limit = KEY_MAX; break; case EV_LED: bmap = input->ledbit; limit = LED_MAX; break; } if (unlikely(c > limit || !bmap)) { pr_warn_ratelimited("%s: Invalid code %d type %d\n", input->name, c, type); *bit = NULL; return; } usage->type = type; usage->code = c; *max = limit; *bit = bmap; } /** * hid_map_usage_clear - map usage input bits and clear the input bit * * @hidinput: hidinput which we are interested in * @usage: usage to fill in * @bit: pointer to input->{}bit (out parameter) * @max: maximal valid usage->code to consider later (out parameter) * @type: input event type (EV_KEY, EV_REL, ...) * @c: code which corresponds to this usage and type * * The same as hid_map_usage, except the @c bit is also cleared in supported * bits (@bit). */ static inline void hid_map_usage_clear(struct hid_input *hidinput, struct hid_usage *usage, unsigned long **bit, int *max, __u8 type, __u16 c) { hid_map_usage(hidinput, usage, bit, max, type, c); if (*bit) clear_bit(usage->code, *bit); } /** * hid_parse - parse HW reports * * @hdev: hid device * * Call this from probe after you set up the device (if needed). Your * report_fixup will be called (if non-NULL) after reading raw report from * device before passing it to hid layer for real parsing. */ static inline int __must_check hid_parse(struct hid_device *hdev) { return hid_open_report(hdev); } int __must_check hid_hw_start(struct hid_device *hdev, unsigned int connect_mask); void hid_hw_stop(struct hid_device *hdev); int __must_check hid_hw_open(struct hid_device *hdev); void hid_hw_close(struct hid_device *hdev); /** * hid_hw_power - requests underlying HW to go into given power mode * * @hdev: hid device * @level: requested power level (one of %PM_HINT_* defines) * * This function requests underlying hardware to enter requested power * mode. */ static inline int hid_hw_power(struct hid_device *hdev, int level) { return hdev->ll_driver->power ? hdev->ll_driver->power(hdev, level) : 0; } /** * hid_hw_request - send report request to device * * @hdev: hid device * @report: report to send * @reqtype: hid request type */ static inline void hid_hw_request(struct hid_device *hdev, struct hid_report *report, int reqtype) { if (hdev->ll_driver->request) return hdev->ll_driver->request(hdev, report, reqtype); __hid_request(hdev, report, reqtype); } /** * hid_hw_raw_request - send report request to device * * @hdev: hid device * @reportnum: report ID * @buf: in/out data to transfer * @len: length of buf * @rtype: HID report type * @reqtype: HID_REQ_GET_REPORT or HID_REQ_SET_REPORT * * Return: count of data transferred, negative if error * * Same behavior as hid_hw_request, but with raw buffers instead. */ static inline int hid_hw_raw_request(struct hid_device *hdev, unsigned char reportnum, __u8 *buf, size_t len, unsigned char rtype, int reqtype) { if (len < 1 || len > HID_MAX_BUFFER_SIZE || !buf) return -EINVAL; return hdev->ll_driver->raw_request(hdev, reportnum, buf, len, rtype, reqtype); } /** * hid_hw_output_report - send output report to device * * @hdev: hid device * @buf: raw data to transfer * @len: length of buf * * Return: count of data transferred, negative if error */ static inline int hid_hw_output_report(struct hid_device *hdev, __u8 *buf, size_t len) { if (len < 1 || len > HID_MAX_BUFFER_SIZE || !buf) return -EINVAL; if (hdev->ll_driver->output_report) return hdev->ll_driver->output_report(hdev, buf, len); return -ENOSYS; } /** * hid_hw_idle - send idle request to device * * @hdev: hid device * @report: report to control * @idle: idle state * @reqtype: hid request type */ static inline int hid_hw_idle(struct hid_device *hdev, int report, int idle, int reqtype) { if (hdev->ll_driver->idle) return hdev->ll_driver->idle(hdev, report, idle, reqtype); return 0; } /** * hid_may_wakeup - return if the hid device may act as a wakeup source during system-suspend * * @hdev: hid device */ static inline bool hid_hw_may_wakeup(struct hid_device *hdev) { if (hdev->ll_driver->may_wakeup) return hdev->ll_driver->may_wakeup(hdev); if (hdev->dev.parent) return device_may_wakeup(hdev->dev.parent); return false; } /** * hid_hw_wait - wait for buffered io to complete * * @hdev: hid device */ static inline void hid_hw_wait(struct hid_device *hdev) { if (hdev->ll_driver->wait) hdev->ll_driver->wait(hdev); } /** * hid_report_len - calculate the report length * * @report: the report we want to know the length */ static inline u32 hid_report_len(struct hid_report *report) { return DIV_ROUND_UP(report->size, 8) + (report->id > 0); } int hid_report_raw_event(struct hid_device *hid, int type, u8 *data, u32 size, int interrupt); /* HID quirks API */ unsigned long hid_lookup_quirk(const struct hid_device *hdev); int hid_quirks_init(char **quirks_param, __u16 bus, int count); void hid_quirks_exit(__u16 bus); #ifdef CONFIG_HID_PID int hid_pidff_init(struct hid_device *hid); #else #define hid_pidff_init NULL #endif #define dbg_hid(fmt, ...) \ do { \ if (hid_debug) \ printk(KERN_DEBUG "%s: " fmt, __FILE__, ##__VA_ARGS__); \ } while (0) #define hid_err(hid, fmt, ...) \ dev_err(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_notice(hid, fmt, ...) \ dev_notice(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_warn(hid, fmt, ...) \ dev_warn(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_info(hid, fmt, ...) \ dev_info(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_dbg(hid, fmt, ...) \ dev_dbg(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_err_once(hid, fmt, ...) \ dev_err_once(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_notice_once(hid, fmt, ...) \ dev_notice_once(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_warn_once(hid, fmt, ...) \ dev_warn_once(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_info_once(hid, fmt, ...) \ dev_info_once(&(hid)->dev, fmt, ##__VA_ARGS__) #define hid_dbg_once(hid, fmt, ...) \ dev_dbg_once(&(hid)->dev, fmt, ##__VA_ARGS__) #endif PK ! 9 Gs�C �C entry-common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_ENTRYCOMMON_H #define __LINUX_ENTRYCOMMON_H #include <linux/static_call_types.h> #include <linux/tracehook.h> #include <linux/syscalls.h> #include <linux/seccomp.h> #include <linux/sched.h> #include <asm/entry-common.h> /* * Define dummy _TIF work flags if not defined by the architecture or for * disabled functionality. */ #ifndef _TIF_PATCH_PENDING # define _TIF_PATCH_PENDING (0) #endif #ifndef _TIF_UPROBE # define _TIF_UPROBE (0) #endif /* * SYSCALL_WORK flags handled in syscall_enter_from_user_mode() */ #ifndef ARCH_SYSCALL_WORK_ENTER # define ARCH_SYSCALL_WORK_ENTER (0) #endif /* * SYSCALL_WORK flags handled in syscall_exit_to_user_mode() */ #ifndef ARCH_SYSCALL_WORK_EXIT # define ARCH_SYSCALL_WORK_EXIT (0) #endif #define SYSCALL_WORK_ENTER (SYSCALL_WORK_SECCOMP | \ SYSCALL_WORK_SYSCALL_TRACEPOINT | \ SYSCALL_WORK_SYSCALL_TRACE | \ SYSCALL_WORK_SYSCALL_EMU | \ SYSCALL_WORK_SYSCALL_AUDIT | \ SYSCALL_WORK_SYSCALL_USER_DISPATCH | \ ARCH_SYSCALL_WORK_ENTER) #define SYSCALL_WORK_EXIT (SYSCALL_WORK_SYSCALL_TRACEPOINT | \ SYSCALL_WORK_SYSCALL_TRACE | \ SYSCALL_WORK_SYSCALL_AUDIT | \ SYSCALL_WORK_SYSCALL_USER_DISPATCH | \ SYSCALL_WORK_SYSCALL_EXIT_TRAP | \ ARCH_SYSCALL_WORK_EXIT) /* * TIF flags handled in exit_to_user_mode_loop() */ #ifndef ARCH_EXIT_TO_USER_MODE_WORK # define ARCH_EXIT_TO_USER_MODE_WORK (0) #endif #define EXIT_TO_USER_MODE_WORK \ (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_UPROBE | \ _TIF_NEED_RESCHED | _TIF_PATCH_PENDING | _TIF_NOTIFY_SIGNAL | \ ARCH_EXIT_TO_USER_MODE_WORK) /** * arch_check_user_regs - Architecture specific sanity check for user mode regs * @regs: Pointer to currents pt_regs * * Defaults to an empty implementation. Can be replaced by architecture * specific code. * * Invoked from syscall_enter_from_user_mode() in the non-instrumentable * section. Use __always_inline so the compiler cannot push it out of line * and make it instrumentable. */ static __always_inline void arch_check_user_regs(struct pt_regs *regs); #ifndef arch_check_user_regs static __always_inline void arch_check_user_regs(struct pt_regs *regs) {} #endif /** * arch_syscall_enter_tracehook - Wrapper around tracehook_report_syscall_entry() * @regs: Pointer to currents pt_regs * * Returns: 0 on success or an error code to skip the syscall. * * Defaults to tracehook_report_syscall_entry(). Can be replaced by * architecture specific code. * * Invoked from syscall_enter_from_user_mode() */ static inline __must_check int arch_syscall_enter_tracehook(struct pt_regs *regs); #ifndef arch_syscall_enter_tracehook static inline __must_check int arch_syscall_enter_tracehook(struct pt_regs *regs) { return tracehook_report_syscall_entry(regs); } #endif /** * enter_from_user_mode - Establish state when coming from user mode * * Syscall/interrupt entry disables interrupts, but user mode is traced as * interrupts enabled. Also with NO_HZ_FULL RCU might be idle. * * 1) Tell lockdep that interrupts are disabled * 2) Invoke context tracking if enabled to reactivate RCU * 3) Trace interrupts off state * * Invoked from architecture specific syscall entry code with interrupts * disabled. The calling code has to be non-instrumentable. When the * function returns all state is correct and interrupts are still * disabled. The subsequent functions can be instrumented. * * This is invoked when there is architecture specific functionality to be * done between establishing state and enabling interrupts. The caller must * enable interrupts before invoking syscall_enter_from_user_mode_work(). */ void enter_from_user_mode(struct pt_regs *regs); /** * syscall_enter_from_user_mode_prepare - Establish state and enable interrupts * @regs: Pointer to currents pt_regs * * Invoked from architecture specific syscall entry code with interrupts * disabled. The calling code has to be non-instrumentable. When the * function returns all state is correct, interrupts are enabled and the * subsequent functions can be instrumented. * * This handles lockdep, RCU (context tracking) and tracing state, i.e. * the functionality provided by enter_from_user_mode(). * * This is invoked when there is extra architecture specific functionality * to be done between establishing state and handling user mode entry work. */ void syscall_enter_from_user_mode_prepare(struct pt_regs *regs); /** * syscall_enter_from_user_mode_work - Check and handle work before invoking * a syscall * @regs: Pointer to currents pt_regs * @syscall: The syscall number * * Invoked from architecture specific syscall entry code with interrupts * enabled after invoking syscall_enter_from_user_mode_prepare() and extra * architecture specific work. * * Returns: The original or a modified syscall number * * If the returned syscall number is -1 then the syscall should be * skipped. In this case the caller may invoke syscall_set_error() or * syscall_set_return_value() first. If neither of those are called and -1 * is returned, then the syscall will fail with ENOSYS. * * It handles the following work items: * * 1) syscall_work flag dependent invocations of * arch_syscall_enter_tracehook(), __secure_computing(), trace_sys_enter() * 2) Invocation of audit_syscall_entry() */ long syscall_enter_from_user_mode_work(struct pt_regs *regs, long syscall); /** * syscall_enter_from_user_mode - Establish state and check and handle work * before invoking a syscall * @regs: Pointer to currents pt_regs * @syscall: The syscall number * * Invoked from architecture specific syscall entry code with interrupts * disabled. The calling code has to be non-instrumentable. When the * function returns all state is correct, interrupts are enabled and the * subsequent functions can be instrumented. * * This is combination of syscall_enter_from_user_mode_prepare() and * syscall_enter_from_user_mode_work(). * * Returns: The original or a modified syscall number. See * syscall_enter_from_user_mode_work() for further explanation. */ long syscall_enter_from_user_mode(struct pt_regs *regs, long syscall); /** * local_irq_enable_exit_to_user - Exit to user variant of local_irq_enable() * @ti_work: Cached TIF flags gathered with interrupts disabled * * Defaults to local_irq_enable(). Can be supplied by architecture specific * code. */ static inline void local_irq_enable_exit_to_user(unsigned long ti_work); #ifndef local_irq_enable_exit_to_user static inline void local_irq_enable_exit_to_user(unsigned long ti_work) { local_irq_enable(); } #endif /** * local_irq_disable_exit_to_user - Exit to user variant of local_irq_disable() * * Defaults to local_irq_disable(). Can be supplied by architecture specific * code. */ static inline void local_irq_disable_exit_to_user(void); #ifndef local_irq_disable_exit_to_user static inline void local_irq_disable_exit_to_user(void) { local_irq_disable(); } #endif /** * arch_exit_to_user_mode_work - Architecture specific TIF work for exit * to user mode. * @regs: Pointer to currents pt_regs * @ti_work: Cached TIF flags gathered with interrupts disabled * * Invoked from exit_to_user_mode_loop() with interrupt enabled * * Defaults to NOOP. Can be supplied by architecture specific code. */ static inline void arch_exit_to_user_mode_work(struct pt_regs *regs, unsigned long ti_work); #ifndef arch_exit_to_user_mode_work static inline void arch_exit_to_user_mode_work(struct pt_regs *regs, unsigned long ti_work) { } #endif /** * arch_exit_to_user_mode_prepare - Architecture specific preparation for * exit to user mode. * @regs: Pointer to currents pt_regs * @ti_work: Cached TIF flags gathered with interrupts disabled * * Invoked from exit_to_user_mode_prepare() with interrupt disabled as the last * function before return. Defaults to NOOP. */ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs, unsigned long ti_work); #ifndef arch_exit_to_user_mode_prepare static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs, unsigned long ti_work) { } #endif /** * arch_exit_to_user_mode - Architecture specific final work before * exit to user mode. * * Invoked from exit_to_user_mode() with interrupt disabled as the last * function before return. Defaults to NOOP. * * This needs to be __always_inline because it is non-instrumentable code * invoked after context tracking switched to user mode. * * An architecture implementation must not do anything complex, no locking * etc. The main purpose is for speculation mitigations. */ static __always_inline void arch_exit_to_user_mode(void); #ifndef arch_exit_to_user_mode static __always_inline void arch_exit_to_user_mode(void) { } #endif /** * arch_do_signal_or_restart - Architecture specific signal delivery function * @regs: Pointer to currents pt_regs * @has_signal: actual signal to handle * * Invoked from exit_to_user_mode_loop(). */ void arch_do_signal_or_restart(struct pt_regs *regs, bool has_signal); /** * arch_syscall_exit_tracehook - Wrapper around tracehook_report_syscall_exit() * @regs: Pointer to currents pt_regs * @step: Indicator for single step * * Defaults to tracehook_report_syscall_exit(). Can be replaced by * architecture specific code. * * Invoked from syscall_exit_to_user_mode() */ static inline void arch_syscall_exit_tracehook(struct pt_regs *regs, bool step); #ifndef arch_syscall_exit_tracehook static inline void arch_syscall_exit_tracehook(struct pt_regs *regs, bool step) { tracehook_report_syscall_exit(regs, step); } #endif /** * exit_to_user_mode - Fixup state when exiting to user mode * * Syscall/interrupt exit enables interrupts, but the kernel state is * interrupts disabled when this is invoked. Also tell RCU about it. * * 1) Trace interrupts on state * 2) Invoke context tracking if enabled to adjust RCU state * 3) Invoke architecture specific last minute exit code, e.g. speculation * mitigations, etc.: arch_exit_to_user_mode() * 4) Tell lockdep that interrupts are enabled * * Invoked from architecture specific code when syscall_exit_to_user_mode() * is not suitable as the last step before returning to userspace. Must be * invoked with interrupts disabled and the caller must be * non-instrumentable. * The caller has to invoke syscall_exit_to_user_mode_work() before this. */ void exit_to_user_mode(void); /** * syscall_exit_to_user_mode_work - Handle work before returning to user mode * @regs: Pointer to currents pt_regs * * Same as step 1 and 2 of syscall_exit_to_user_mode() but without calling * exit_to_user_mode() to perform the final transition to user mode. * * Calling convention is the same as for syscall_exit_to_user_mode() and it * returns with all work handled and interrupts disabled. The caller must * invoke exit_to_user_mode() before actually switching to user mode to * make the final state transitions. Interrupts must stay disabled between * return from this function and the invocation of exit_to_user_mode(). */ void syscall_exit_to_user_mode_work(struct pt_regs *regs); /** * syscall_exit_to_user_mode - Handle work before returning to user mode * @regs: Pointer to currents pt_regs * * Invoked with interrupts enabled and fully valid regs. Returns with all * work handled, interrupts disabled such that the caller can immediately * switch to user mode. Called from architecture specific syscall and ret * from fork code. * * The call order is: * 1) One-time syscall exit work: * - rseq syscall exit * - audit * - syscall tracing * - tracehook (single stepping) * * 2) Preparatory work * - Exit to user mode loop (common TIF handling). Invokes * arch_exit_to_user_mode_work() for architecture specific TIF work * - Architecture specific one time work arch_exit_to_user_mode_prepare() * - Address limit and lockdep checks * * 3) Final transition (lockdep, tracing, context tracking, RCU), i.e. the * functionality in exit_to_user_mode(). * * This is a combination of syscall_exit_to_user_mode_work() (1,2) and * exit_to_user_mode(). This function is preferred unless there is a * compelling architectural reason to use the separate functions. */ void syscall_exit_to_user_mode(struct pt_regs *regs); /** * irqentry_enter_from_user_mode - Establish state before invoking the irq handler * @regs: Pointer to currents pt_regs * * Invoked from architecture specific entry code with interrupts disabled. * Can only be called when the interrupt entry came from user mode. The * calling code must be non-instrumentable. When the function returns all * state is correct and the subsequent functions can be instrumented. * * The function establishes state (lockdep, RCU (context tracking), tracing) */ void irqentry_enter_from_user_mode(struct pt_regs *regs); /** * irqentry_exit_to_user_mode - Interrupt exit work * @regs: Pointer to current's pt_regs * * Invoked with interrupts disabled and fully valid regs. Returns with all * work handled, interrupts disabled such that the caller can immediately * switch to user mode. Called from architecture specific interrupt * handling code. * * The call order is #2 and #3 as described in syscall_exit_to_user_mode(). * Interrupt exit is not invoking #1 which is the syscall specific one time * work. */ void irqentry_exit_to_user_mode(struct pt_regs *regs); #ifndef irqentry_state /** * struct irqentry_state - Opaque object for exception state storage * @exit_rcu: Used exclusively in the irqentry_*() calls; signals whether the * exit path has to invoke rcu_irq_exit(). * @lockdep: Used exclusively in the irqentry_nmi_*() calls; ensures that * lockdep state is restored correctly on exit from nmi. * * This opaque object is filled in by the irqentry_*_enter() functions and * must be passed back into the corresponding irqentry_*_exit() functions * when the exception is complete. * * Callers of irqentry_*_[enter|exit]() must consider this structure opaque * and all members private. Descriptions of the members are provided to aid in * the maintenance of the irqentry_*() functions. */ typedef struct irqentry_state { union { bool exit_rcu; bool lockdep; }; } irqentry_state_t; #endif /** * irqentry_enter - Handle state tracking on ordinary interrupt entries * @regs: Pointer to pt_regs of interrupted context * * Invokes: * - lockdep irqflag state tracking as low level ASM entry disabled * interrupts. * * - Context tracking if the exception hit user mode. * * - The hardirq tracer to keep the state consistent as low level ASM * entry disabled interrupts. * * As a precondition, this requires that the entry came from user mode, * idle, or a kernel context in which RCU is watching. * * For kernel mode entries RCU handling is done conditional. If RCU is * watching then the only RCU requirement is to check whether the tick has * to be restarted. If RCU is not watching then rcu_irq_enter() has to be * invoked on entry and rcu_irq_exit() on exit. * * Avoiding the rcu_irq_enter/exit() calls is an optimization but also * solves the problem of kernel mode pagefaults which can schedule, which * is not possible after invoking rcu_irq_enter() without undoing it. * * For user mode entries irqentry_enter_from_user_mode() is invoked to * establish the proper context for NOHZ_FULL. Otherwise scheduling on exit * would not be possible. * * Returns: An opaque object that must be passed to idtentry_exit() */ irqentry_state_t noinstr irqentry_enter(struct pt_regs *regs); /** * irqentry_exit_cond_resched - Conditionally reschedule on return from interrupt * * Conditional reschedule with additional sanity checks. */ void irqentry_exit_cond_resched(void); #ifdef CONFIG_PREEMPT_DYNAMIC DECLARE_STATIC_CALL(irqentry_exit_cond_resched, irqentry_exit_cond_resched); #endif /** * irqentry_exit - Handle return from exception that used irqentry_enter() * @regs: Pointer to pt_regs (exception entry regs) * @state: Return value from matching call to irqentry_enter() * * Depending on the return target (kernel/user) this runs the necessary * preemption and work checks if possible and required and returns to * the caller with interrupts disabled and no further work pending. * * This is the last action before returning to the low level ASM code which * just needs to return to the appropriate context. * * Counterpart to irqentry_enter(). */ void noinstr irqentry_exit(struct pt_regs *regs, irqentry_state_t state); /** * irqentry_nmi_enter - Handle NMI entry * @regs: Pointer to currents pt_regs * * Similar to irqentry_enter() but taking care of the NMI constraints. */ irqentry_state_t noinstr irqentry_nmi_enter(struct pt_regs *regs); /** * irqentry_nmi_exit - Handle return from NMI handling * @regs: Pointer to pt_regs (NMI entry regs) * @irq_state: Return value from matching call to irqentry_nmi_enter() * * Last action before returning to the low level assembly code. * * Counterpart to irqentry_nmi_enter(). */ void noinstr irqentry_nmi_exit(struct pt_regs *regs, irqentry_state_t irq_state); #endif PK ! -D�� � latencytop.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * latencytop.h: Infrastructure for displaying latency * * (C) Copyright 2008 Intel Corporation * Author: Arjan van de Ven <arjan@linux.intel.com> * */ #ifndef _INCLUDE_GUARD_LATENCYTOP_H_ #define _INCLUDE_GUARD_LATENCYTOP_H_ #include <linux/compiler.h> struct task_struct; #ifdef CONFIG_LATENCYTOP #define LT_SAVECOUNT 32 #define LT_BACKTRACEDEPTH 12 struct latency_record { unsigned long backtrace[LT_BACKTRACEDEPTH]; unsigned int count; unsigned long time; unsigned long max; }; extern int latencytop_enabled; void __account_scheduler_latency(struct task_struct *task, int usecs, int inter); static inline void account_scheduler_latency(struct task_struct *task, int usecs, int inter) { if (unlikely(latencytop_enabled)) __account_scheduler_latency(task, usecs, inter); } void clear_tsk_latency_tracing(struct task_struct *p); int sysctl_latencytop(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); #else static inline void account_scheduler_latency(struct task_struct *task, int usecs, int inter) { } static inline void clear_tsk_latency_tracing(struct task_struct *p) { } #endif #endif PK ! �� ( ( auto_dev-ioctl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2008 Red Hat, Inc. All rights reserved. * Copyright 2008 Ian Kent <raven@themaw.net> */ #ifndef _LINUX_AUTO_DEV_IOCTL_H #define _LINUX_AUTO_DEV_IOCTL_H #include <uapi/linux/auto_dev-ioctl.h> #endif /* _LINUX_AUTO_DEV_IOCTL_H */ PK ! A�<�� � ipmi_smi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * ipmi_smi.h * * MontaVista IPMI system management interface * * Author: MontaVista Software, Inc. * Corey Minyard <minyard@mvista.com> * source@mvista.com * * Copyright 2002 MontaVista Software Inc. * */ #ifndef __LINUX_IPMI_SMI_H #define __LINUX_IPMI_SMI_H #include <linux/ipmi_msgdefs.h> #include <linux/proc_fs.h> #include <linux/platform_device.h> #include <linux/ipmi.h> struct device; /* * This files describes the interface for IPMI system management interface * drivers to bind into the IPMI message handler. */ /* Structure for the low-level drivers. */ struct ipmi_smi; /* * Flags for set_check_watch() below. Tells if the SMI should be * waiting for watchdog timeouts, commands and/or messages. */ #define IPMI_WATCH_MASK_CHECK_MESSAGES (1 << 0) #define IPMI_WATCH_MASK_CHECK_WATCHDOG (1 << 1) #define IPMI_WATCH_MASK_CHECK_COMMANDS (1 << 2) /* * Messages to/from the lower layer. The smi interface will take one * of these to send. After the send has occurred and a response has * been received, it will report this same data structure back up to * the upper layer. If an error occurs, it should fill in the * response with an error code in the completion code location. When * asynchronous data is received, one of these is allocated, the * data_size is set to zero and the response holds the data from the * get message or get event command that the interface initiated. * Note that it is the interfaces responsibility to detect * asynchronous data and messages and request them from the * interface. */ struct ipmi_smi_msg { struct list_head link; long msgid; void *user_data; int data_size; unsigned char data[IPMI_MAX_MSG_LENGTH]; int rsp_size; unsigned char rsp[IPMI_MAX_MSG_LENGTH]; /* * Will be called when the system is done with the message * (presumably to free it). */ void (*done)(struct ipmi_smi_msg *msg); }; struct ipmi_smi_handlers { struct module *owner; /* * The low-level interface cannot start sending messages to * the upper layer until this function is called. This may * not be NULL, the lower layer must take the interface from * this call. */ int (*start_processing)(void *send_info, struct ipmi_smi *new_intf); /* * When called, the low-level interface should disable all * processing, it should be complete shut down when it returns. */ void (*shutdown)(void *send_info); /* * Get the detailed private info of the low level interface and store * it into the structure of ipmi_smi_data. For example: the * ACPI device handle will be returned for the pnp_acpi IPMI device. */ int (*get_smi_info)(void *send_info, struct ipmi_smi_info *data); /* * Called to enqueue an SMI message to be sent. This * operation is not allowed to fail. If an error occurs, it * should report back the error in a received message. It may * do this in the current call context, since no write locks * are held when this is run. Message are delivered one at * a time by the message handler, a new message will not be * delivered until the previous message is returned. */ void (*sender)(void *send_info, struct ipmi_smi_msg *msg); /* * Called by the upper layer to request that we try to get * events from the BMC we are attached to. */ void (*request_events)(void *send_info); /* * Called by the upper layer when some user requires that the * interface watch for received messages and watchdog * pretimeouts (basically do a "Get Flags", or not. Used by * the SMI to know if it should watch for these. This may be * NULL if the SMI does not implement it. watch_mask is from * IPMI_WATCH_MASK_xxx above. The interface should run slower * timeouts for just watchdog checking or faster timeouts when * waiting for the message queue. */ void (*set_need_watch)(void *send_info, unsigned int watch_mask); /* * Called when flushing all pending messages. */ void (*flush_messages)(void *send_info); /* * Called when the interface should go into "run to * completion" mode. If this call sets the value to true, the * interface should make sure that all messages are flushed * out and that none are pending, and any new requests are run * to completion immediately. */ void (*set_run_to_completion)(void *send_info, bool run_to_completion); /* * Called to poll for work to do. This is so upper layers can * poll for operations during things like crash dumps. */ void (*poll)(void *send_info); /* * Enable/disable firmware maintenance mode. Note that this * is *not* the modes defined, this is simply an on/off * setting. The message handler does the mode handling. Note * that this is called from interrupt context, so it cannot * block. */ void (*set_maintenance_mode)(void *send_info, bool enable); }; struct ipmi_device_id { unsigned char device_id; unsigned char device_revision; unsigned char firmware_revision_1; unsigned char firmware_revision_2; unsigned char ipmi_version; unsigned char additional_device_support; unsigned int manufacturer_id; unsigned int product_id; unsigned char aux_firmware_revision[4]; unsigned int aux_firmware_revision_set : 1; }; #define ipmi_version_major(v) ((v)->ipmi_version & 0xf) #define ipmi_version_minor(v) ((v)->ipmi_version >> 4) /* * Take a pointer to an IPMI response and extract device id information from * it. @netfn is in the IPMI_NETFN_ format, so may need to be shifted from * a SI response. */ static inline int ipmi_demangle_device_id(uint8_t netfn, uint8_t cmd, const unsigned char *data, unsigned int data_len, struct ipmi_device_id *id) { if (data_len < 7) return -EINVAL; if (netfn != IPMI_NETFN_APP_RESPONSE || cmd != IPMI_GET_DEVICE_ID_CMD) /* Strange, didn't get the response we expected. */ return -EINVAL; if (data[0] != 0) /* That's odd, it shouldn't be able to fail. */ return -EINVAL; data++; data_len--; id->device_id = data[0]; id->device_revision = data[1]; id->firmware_revision_1 = data[2]; id->firmware_revision_2 = data[3]; id->ipmi_version = data[4]; id->additional_device_support = data[5]; if (data_len >= 11) { id->manufacturer_id = (data[6] | (data[7] << 8) | (data[8] << 16)); id->product_id = data[9] | (data[10] << 8); } else { id->manufacturer_id = 0; id->product_id = 0; } if (data_len >= 15) { memcpy(id->aux_firmware_revision, data+11, 4); id->aux_firmware_revision_set = 1; } else id->aux_firmware_revision_set = 0; return 0; } /* * Add a low-level interface to the IPMI driver. Note that if the * interface doesn't know its slave address, it should pass in zero. * The low-level interface should not deliver any messages to the * upper layer until the start_processing() function in the handlers * is called, and the lower layer must get the interface from that * call. */ int ipmi_add_smi(struct module *owner, const struct ipmi_smi_handlers *handlers, void *send_info, struct device *dev, unsigned char slave_addr); #define ipmi_register_smi(handlers, send_info, dev, slave_addr) \ ipmi_add_smi(THIS_MODULE, handlers, send_info, dev, slave_addr) /* * Remove a low-level interface from the IPMI driver. This will * return an error if the interface is still in use by a user. */ void ipmi_unregister_smi(struct ipmi_smi *intf); /* * The lower layer reports received messages through this interface. * The data_size should be zero if this is an asynchronous message. If * the lower layer gets an error sending a message, it should format * an error response in the message response. */ void ipmi_smi_msg_received(struct ipmi_smi *intf, struct ipmi_smi_msg *msg); /* The lower layer received a watchdog pre-timeout on interface. */ void ipmi_smi_watchdog_pretimeout(struct ipmi_smi *intf); struct ipmi_smi_msg *ipmi_alloc_smi_msg(void); static inline void ipmi_free_smi_msg(struct ipmi_smi_msg *msg) { msg->done(msg); } #endif /* __LINUX_IPMI_SMI_H */ PK ! �y�g m m intel-iommu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2006-2015, Intel Corporation. * * Authors: Ashok Raj <ashok.raj@intel.com> * Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> * David Woodhouse <David.Woodhouse@intel.com> */ #ifndef _INTEL_IOMMU_H_ #define _INTEL_IOMMU_H_ #include <linux/types.h> #include <linux/iova.h> #include <linux/io.h> #include <linux/idr.h> #include <linux/mmu_notifier.h> #include <linux/list.h> #include <linux/iommu.h> #include <linux/io-64-nonatomic-lo-hi.h> #include <linux/dmar.h> #include <linux/ioasid.h> #include <linux/bitfield.h> #include <asm/cacheflush.h> #include <asm/iommu.h> /* * VT-d hardware uses 4KiB page size regardless of host page size. */ #define VTD_PAGE_SHIFT (12) #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT) #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) #define VTD_STRIDE_SHIFT (9) #define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT) #define DMA_PTE_READ BIT_ULL(0) #define DMA_PTE_WRITE BIT_ULL(1) #define DMA_PTE_LARGE_PAGE BIT_ULL(7) #define DMA_PTE_SNP BIT_ULL(11) #define DMA_FL_PTE_PRESENT BIT_ULL(0) #define DMA_FL_PTE_US BIT_ULL(2) #define DMA_FL_PTE_ACCESS BIT_ULL(5) #define DMA_FL_PTE_DIRTY BIT_ULL(6) #define DMA_FL_PTE_XD BIT_ULL(63) #define ADDR_WIDTH_5LEVEL (57) #define ADDR_WIDTH_4LEVEL (48) #define CONTEXT_TT_MULTI_LEVEL 0 #define CONTEXT_TT_DEV_IOTLB 1 #define CONTEXT_TT_PASS_THROUGH 2 #define CONTEXT_PASIDE BIT_ULL(3) /* * Intel IOMMU register specification per version 1.0 public spec. */ #define DMAR_VER_REG 0x0 /* Arch version supported by this IOMMU */ #define DMAR_CAP_REG 0x8 /* Hardware supported capabilities */ #define DMAR_ECAP_REG 0x10 /* Extended capabilities supported */ #define DMAR_GCMD_REG 0x18 /* Global command register */ #define DMAR_GSTS_REG 0x1c /* Global status register */ #define DMAR_RTADDR_REG 0x20 /* Root entry table */ #define DMAR_CCMD_REG 0x28 /* Context command reg */ #define DMAR_FSTS_REG 0x34 /* Fault Status register */ #define DMAR_FECTL_REG 0x38 /* Fault control register */ #define DMAR_FEDATA_REG 0x3c /* Fault event interrupt data register */ #define DMAR_FEADDR_REG 0x40 /* Fault event interrupt addr register */ #define DMAR_FEUADDR_REG 0x44 /* Upper address register */ #define DMAR_AFLOG_REG 0x58 /* Advanced Fault control */ #define DMAR_PMEN_REG 0x64 /* Enable Protected Memory Region */ #define DMAR_PLMBASE_REG 0x68 /* PMRR Low addr */ #define DMAR_PLMLIMIT_REG 0x6c /* PMRR low limit */ #define DMAR_PHMBASE_REG 0x70 /* pmrr high base addr */ #define DMAR_PHMLIMIT_REG 0x78 /* pmrr high limit */ #define DMAR_IQH_REG 0x80 /* Invalidation queue head register */ #define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */ #define DMAR_IQ_SHIFT 4 /* Invalidation queue head/tail shift */ #define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */ #define DMAR_ICS_REG 0x9c /* Invalidation complete status register */ #define DMAR_IQER_REG 0xb0 /* Invalidation queue error record register */ #define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr register */ #define DMAR_PQH_REG 0xc0 /* Page request queue head register */ #define DMAR_PQT_REG 0xc8 /* Page request queue tail register */ #define DMAR_PQA_REG 0xd0 /* Page request queue address register */ #define DMAR_PRS_REG 0xdc /* Page request status register */ #define DMAR_PECTL_REG 0xe0 /* Page request event control register */ #define DMAR_PEDATA_REG 0xe4 /* Page request event interrupt data register */ #define DMAR_PEADDR_REG 0xe8 /* Page request event interrupt addr register */ #define DMAR_PEUADDR_REG 0xec /* Page request event Upper address register */ #define DMAR_MTRRCAP_REG 0x100 /* MTRR capability register */ #define DMAR_MTRRDEF_REG 0x108 /* MTRR default type register */ #define DMAR_MTRR_FIX64K_00000_REG 0x120 /* MTRR Fixed range registers */ #define DMAR_MTRR_FIX16K_80000_REG 0x128 #define DMAR_MTRR_FIX16K_A0000_REG 0x130 #define DMAR_MTRR_FIX4K_C0000_REG 0x138 #define DMAR_MTRR_FIX4K_C8000_REG 0x140 #define DMAR_MTRR_FIX4K_D0000_REG 0x148 #define DMAR_MTRR_FIX4K_D8000_REG 0x150 #define DMAR_MTRR_FIX4K_E0000_REG 0x158 #define DMAR_MTRR_FIX4K_E8000_REG 0x160 #define DMAR_MTRR_FIX4K_F0000_REG 0x168 #define DMAR_MTRR_FIX4K_F8000_REG 0x170 #define DMAR_MTRR_PHYSBASE0_REG 0x180 /* MTRR Variable range registers */ #define DMAR_MTRR_PHYSMASK0_REG 0x188 #define DMAR_MTRR_PHYSBASE1_REG 0x190 #define DMAR_MTRR_PHYSMASK1_REG 0x198 #define DMAR_MTRR_PHYSBASE2_REG 0x1a0 #define DMAR_MTRR_PHYSMASK2_REG 0x1a8 #define DMAR_MTRR_PHYSBASE3_REG 0x1b0 #define DMAR_MTRR_PHYSMASK3_REG 0x1b8 #define DMAR_MTRR_PHYSBASE4_REG 0x1c0 #define DMAR_MTRR_PHYSMASK4_REG 0x1c8 #define DMAR_MTRR_PHYSBASE5_REG 0x1d0 #define DMAR_MTRR_PHYSMASK5_REG 0x1d8 #define DMAR_MTRR_PHYSBASE6_REG 0x1e0 #define DMAR_MTRR_PHYSMASK6_REG 0x1e8 #define DMAR_MTRR_PHYSBASE7_REG 0x1f0 #define DMAR_MTRR_PHYSMASK7_REG 0x1f8 #define DMAR_MTRR_PHYSBASE8_REG 0x200 #define DMAR_MTRR_PHYSMASK8_REG 0x208 #define DMAR_MTRR_PHYSBASE9_REG 0x210 #define DMAR_MTRR_PHYSMASK9_REG 0x218 #define DMAR_VCCAP_REG 0xe30 /* Virtual command capability register */ #define DMAR_VCMD_REG 0xe00 /* Virtual command register */ #define DMAR_VCRSP_REG 0xe10 /* Virtual command response register */ #define DMAR_IQER_REG_IQEI(reg) FIELD_GET(GENMASK_ULL(3, 0), reg) #define DMAR_IQER_REG_ITESID(reg) FIELD_GET(GENMASK_ULL(47, 32), reg) #define DMAR_IQER_REG_ICESID(reg) FIELD_GET(GENMASK_ULL(63, 48), reg) #define OFFSET_STRIDE (9) #define dmar_readq(a) readq(a) #define dmar_writeq(a,v) writeq(v,a) #define dmar_readl(a) readl(a) #define dmar_writel(a, v) writel(v, a) #define DMAR_VER_MAJOR(v) (((v) & 0xf0) >> 4) #define DMAR_VER_MINOR(v) ((v) & 0x0f) /* * Decoding Capability Register */ #define cap_5lp_support(c) (((c) >> 60) & 1) #define cap_pi_support(c) (((c) >> 59) & 1) #define cap_fl1gp_support(c) (((c) >> 56) & 1) #define cap_read_drain(c) (((c) >> 55) & 1) #define cap_write_drain(c) (((c) >> 54) & 1) #define cap_max_amask_val(c) (((c) >> 48) & 0x3f) #define cap_num_fault_regs(c) ((((c) >> 40) & 0xff) + 1) #define cap_pgsel_inv(c) (((c) >> 39) & 1) #define cap_super_page_val(c) (((c) >> 34) & 0xf) #define cap_super_offset(c) (((find_first_bit(&cap_super_page_val(c), 4)) \ * OFFSET_STRIDE) + 21) #define cap_fault_reg_offset(c) ((((c) >> 24) & 0x3ff) * 16) #define cap_max_fault_reg_offset(c) \ (cap_fault_reg_offset(c) + cap_num_fault_regs(c) * 16) #define cap_zlr(c) (((c) >> 22) & 1) #define cap_isoch(c) (((c) >> 23) & 1) #define cap_mgaw(c) ((((c) >> 16) & 0x3f) + 1) #define cap_sagaw(c) (((c) >> 8) & 0x1f) #define cap_caching_mode(c) (((c) >> 7) & 1) #define cap_phmr(c) (((c) >> 6) & 1) #define cap_plmr(c) (((c) >> 5) & 1) #define cap_rwbf(c) (((c) >> 4) & 1) #define cap_afl(c) (((c) >> 3) & 1) #define cap_ndoms(c) (((unsigned long)1) << (4 + 2 * ((c) & 0x7))) /* * Extended Capability Register */ #define ecap_rps(e) (((e) >> 49) & 0x1) #define ecap_smpwc(e) (((e) >> 48) & 0x1) #define ecap_flts(e) (((e) >> 47) & 0x1) #define ecap_slts(e) (((e) >> 46) & 0x1) #define ecap_slads(e) (((e) >> 45) & 0x1) #define ecap_vcs(e) (((e) >> 44) & 0x1) #define ecap_smts(e) (((e) >> 43) & 0x1) #define ecap_dit(e) (((e) >> 41) & 0x1) #define ecap_pds(e) (((e) >> 42) & 0x1) #define ecap_pasid(e) (((e) >> 40) & 0x1) #define ecap_pss(e) (((e) >> 35) & 0x1f) #define ecap_eafs(e) (((e) >> 34) & 0x1) #define ecap_nwfs(e) (((e) >> 33) & 0x1) #define ecap_srs(e) (((e) >> 31) & 0x1) #define ecap_ers(e) (((e) >> 30) & 0x1) #define ecap_prs(e) (((e) >> 29) & 0x1) #define ecap_broken_pasid(e) (((e) >> 28) & 0x1) #define ecap_dis(e) (((e) >> 27) & 0x1) #define ecap_nest(e) (((e) >> 26) & 0x1) #define ecap_mts(e) (((e) >> 25) & 0x1) #define ecap_iotlb_offset(e) ((((e) >> 8) & 0x3ff) * 16) #define ecap_max_iotlb_offset(e) (ecap_iotlb_offset(e) + 16) #define ecap_coherent(e) ((e) & 0x1) #define ecap_qis(e) ((e) & 0x2) #define ecap_pass_through(e) (((e) >> 6) & 0x1) #define ecap_eim_support(e) (((e) >> 4) & 0x1) #define ecap_ir_support(e) (((e) >> 3) & 0x1) #define ecap_dev_iotlb_support(e) (((e) >> 2) & 0x1) #define ecap_max_handle_mask(e) (((e) >> 20) & 0xf) #define ecap_sc_support(e) (((e) >> 7) & 0x1) /* Snooping Control */ /* Virtual command interface capability */ #define vccap_pasid(v) (((v) & DMA_VCS_PAS)) /* PASID allocation */ /* IOTLB_REG */ #define DMA_TLB_FLUSH_GRANU_OFFSET 60 #define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60) #define DMA_TLB_DSI_FLUSH (((u64)2) << 60) #define DMA_TLB_PSI_FLUSH (((u64)3) << 60) #define DMA_TLB_IIRG(type) ((type >> 60) & 3) #define DMA_TLB_IAIG(val) (((val) >> 57) & 3) #define DMA_TLB_READ_DRAIN (((u64)1) << 49) #define DMA_TLB_WRITE_DRAIN (((u64)1) << 48) #define DMA_TLB_DID(id) (((u64)((id) & 0xffff)) << 32) #define DMA_TLB_IVT (((u64)1) << 63) #define DMA_TLB_IH_NONLEAF (((u64)1) << 6) #define DMA_TLB_MAX_SIZE (0x3f) /* INVALID_DESC */ #define DMA_CCMD_INVL_GRANU_OFFSET 61 #define DMA_ID_TLB_GLOBAL_FLUSH (((u64)1) << 4) #define DMA_ID_TLB_DSI_FLUSH (((u64)2) << 4) #define DMA_ID_TLB_PSI_FLUSH (((u64)3) << 4) #define DMA_ID_TLB_READ_DRAIN (((u64)1) << 7) #define DMA_ID_TLB_WRITE_DRAIN (((u64)1) << 6) #define DMA_ID_TLB_DID(id) (((u64)((id & 0xffff) << 16))) #define DMA_ID_TLB_IH_NONLEAF (((u64)1) << 6) #define DMA_ID_TLB_ADDR(addr) (addr) #define DMA_ID_TLB_ADDR_MASK(mask) (mask) /* PMEN_REG */ #define DMA_PMEN_EPM (((u32)1)<<31) #define DMA_PMEN_PRS (((u32)1)<<0) /* GCMD_REG */ #define DMA_GCMD_TE (((u32)1) << 31) #define DMA_GCMD_SRTP (((u32)1) << 30) #define DMA_GCMD_SFL (((u32)1) << 29) #define DMA_GCMD_EAFL (((u32)1) << 28) #define DMA_GCMD_WBF (((u32)1) << 27) #define DMA_GCMD_QIE (((u32)1) << 26) #define DMA_GCMD_SIRTP (((u32)1) << 24) #define DMA_GCMD_IRE (((u32) 1) << 25) #define DMA_GCMD_CFI (((u32) 1) << 23) /* GSTS_REG */ #define DMA_GSTS_TES (((u32)1) << 31) #define DMA_GSTS_RTPS (((u32)1) << 30) #define DMA_GSTS_FLS (((u32)1) << 29) #define DMA_GSTS_AFLS (((u32)1) << 28) #define DMA_GSTS_WBFS (((u32)1) << 27) #define DMA_GSTS_QIES (((u32)1) << 26) #define DMA_GSTS_IRTPS (((u32)1) << 24) #define DMA_GSTS_IRES (((u32)1) << 25) #define DMA_GSTS_CFIS (((u32)1) << 23) /* DMA_RTADDR_REG */ #define DMA_RTADDR_SMT (((u64)1) << 10) /* CCMD_REG */ #define DMA_CCMD_ICC (((u64)1) << 63) #define DMA_CCMD_GLOBAL_INVL (((u64)1) << 61) #define DMA_CCMD_DOMAIN_INVL (((u64)2) << 61) #define DMA_CCMD_DEVICE_INVL (((u64)3) << 61) #define DMA_CCMD_FM(m) (((u64)((m) & 0x3)) << 32) #define DMA_CCMD_MASK_NOBIT 0 #define DMA_CCMD_MASK_1BIT 1 #define DMA_CCMD_MASK_2BIT 2 #define DMA_CCMD_MASK_3BIT 3 #define DMA_CCMD_SID(s) (((u64)((s) & 0xffff)) << 16) #define DMA_CCMD_DID(d) ((u64)((d) & 0xffff)) /* FECTL_REG */ #define DMA_FECTL_IM (((u32)1) << 31) /* FSTS_REG */ #define DMA_FSTS_PFO (1 << 0) /* Primary Fault Overflow */ #define DMA_FSTS_PPF (1 << 1) /* Primary Pending Fault */ #define DMA_FSTS_IQE (1 << 4) /* Invalidation Queue Error */ #define DMA_FSTS_ICE (1 << 5) /* Invalidation Completion Error */ #define DMA_FSTS_ITE (1 << 6) /* Invalidation Time-out Error */ #define DMA_FSTS_PRO (1 << 7) /* Page Request Overflow */ #define dma_fsts_fault_record_index(s) (((s) >> 8) & 0xff) /* FRCD_REG, 32 bits access */ #define DMA_FRCD_F (((u32)1) << 31) #define dma_frcd_type(d) ((d >> 30) & 1) #define dma_frcd_fault_reason(c) (c & 0xff) #define dma_frcd_source_id(c) (c & 0xffff) #define dma_frcd_pasid_value(c) (((c) >> 8) & 0xfffff) #define dma_frcd_pasid_present(c) (((c) >> 31) & 1) /* low 64 bit */ #define dma_frcd_page_addr(d) (d & (((u64)-1) << PAGE_SHIFT)) /* PRS_REG */ #define DMA_PRS_PPR ((u32)1) #define DMA_PRS_PRO ((u32)2) #define DMA_VCS_PAS ((u64)1) #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \ do { \ cycles_t start_time = get_cycles(); \ while (1) { \ sts = op(iommu->reg + offset); \ if (cond) \ break; \ if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\ panic("DMAR hardware is malfunctioning\n"); \ cpu_relax(); \ } \ } while (0) #define QI_LENGTH 256 /* queue length */ enum { QI_FREE, QI_IN_USE, QI_DONE, QI_ABORT }; #define QI_CC_TYPE 0x1 #define QI_IOTLB_TYPE 0x2 #define QI_DIOTLB_TYPE 0x3 #define QI_IEC_TYPE 0x4 #define QI_IWD_TYPE 0x5 #define QI_EIOTLB_TYPE 0x6 #define QI_PC_TYPE 0x7 #define QI_DEIOTLB_TYPE 0x8 #define QI_PGRP_RESP_TYPE 0x9 #define QI_PSTRM_RESP_TYPE 0xa #define QI_IEC_SELECTIVE (((u64)1) << 4) #define QI_IEC_IIDEX(idx) (((u64)(idx & 0xffff) << 32)) #define QI_IEC_IM(m) (((u64)(m & 0x1f) << 27)) #define QI_IWD_STATUS_DATA(d) (((u64)d) << 32) #define QI_IWD_STATUS_WRITE (((u64)1) << 5) #define QI_IWD_FENCE (((u64)1) << 6) #define QI_IWD_PRQ_DRAIN (((u64)1) << 7) #define QI_IOTLB_DID(did) (((u64)did) << 16) #define QI_IOTLB_DR(dr) (((u64)dr) << 7) #define QI_IOTLB_DW(dw) (((u64)dw) << 6) #define QI_IOTLB_GRAN(gran) (((u64)gran) >> (DMA_TLB_FLUSH_GRANU_OFFSET-4)) #define QI_IOTLB_ADDR(addr) (((u64)addr) & VTD_PAGE_MASK) #define QI_IOTLB_IH(ih) (((u64)ih) << 6) #define QI_IOTLB_AM(am) (((u8)am) & 0x3f) #define QI_CC_FM(fm) (((u64)fm) << 48) #define QI_CC_SID(sid) (((u64)sid) << 32) #define QI_CC_DID(did) (((u64)did) << 16) #define QI_CC_GRAN(gran) (((u64)gran) >> (DMA_CCMD_INVL_GRANU_OFFSET-4)) #define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32) #define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16) #define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK) #define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \ ((u64)((pfsid >> 4) & 0xfff) << 52)) #define QI_DEV_IOTLB_SIZE 1 #define QI_DEV_IOTLB_MAX_INVS 32 #define QI_PC_PASID(pasid) (((u64)pasid) << 32) #define QI_PC_DID(did) (((u64)did) << 16) #define QI_PC_GRAN(gran) (((u64)gran) << 4) /* PASID cache invalidation granu */ #define QI_PC_ALL_PASIDS 0 #define QI_PC_PASID_SEL 1 #define QI_PC_GLOBAL 3 #define QI_EIOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK) #define QI_EIOTLB_IH(ih) (((u64)ih) << 6) #define QI_EIOTLB_AM(am) (((u64)am) & 0x3f) #define QI_EIOTLB_PASID(pasid) (((u64)pasid) << 32) #define QI_EIOTLB_DID(did) (((u64)did) << 16) #define QI_EIOTLB_GRAN(gran) (((u64)gran) << 4) /* QI Dev-IOTLB inv granu */ #define QI_DEV_IOTLB_GRAN_ALL 1 #define QI_DEV_IOTLB_GRAN_PASID_SEL 0 #define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK) #define QI_DEV_EIOTLB_SIZE (((u64)1) << 11) #define QI_DEV_EIOTLB_PASID(p) ((u64)((p) & 0xfffff) << 32) #define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16) #define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4) #define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \ ((u64)((pfsid >> 4) & 0xfff) << 52)) #define QI_DEV_EIOTLB_MAX_INVS 32 /* Page group response descriptor QW0 */ #define QI_PGRP_PASID_P(p) (((u64)(p)) << 4) #define QI_PGRP_PDP(p) (((u64)(p)) << 5) #define QI_PGRP_RESP_CODE(res) (((u64)(res)) << 12) #define QI_PGRP_DID(rid) (((u64)(rid)) << 16) #define QI_PGRP_PASID(pasid) (((u64)(pasid)) << 32) /* Page group response descriptor QW1 */ #define QI_PGRP_LPIG(x) (((u64)(x)) << 2) #define QI_PGRP_IDX(idx) (((u64)(idx)) << 3) #define QI_RESP_SUCCESS 0x0 #define QI_RESP_INVALID 0x1 #define QI_RESP_FAILURE 0xf #define QI_GRAN_NONG_PASID 2 #define QI_GRAN_PSI_PASID 3 #define qi_shift(iommu) (DMAR_IQ_SHIFT + !!ecap_smts((iommu)->ecap)) struct qi_desc { u64 qw0; u64 qw1; u64 qw2; u64 qw3; }; struct q_inval { raw_spinlock_t q_lock; void *desc; /* invalidation queue */ int *desc_status; /* desc status */ int free_head; /* first free entry */ int free_tail; /* last free entry */ int free_cnt; }; struct dmar_pci_notify_info; #ifdef CONFIG_IRQ_REMAP /* 1MB - maximum possible interrupt remapping table size */ #define INTR_REMAP_PAGE_ORDER 8 #define INTR_REMAP_TABLE_REG_SIZE 0xf #define INTR_REMAP_TABLE_REG_SIZE_MASK 0xf #define INTR_REMAP_TABLE_ENTRIES 65536 struct irq_domain; struct ir_table { struct irte *base; unsigned long *bitmap; }; void intel_irq_remap_add_device(struct dmar_pci_notify_info *info); #else static inline void intel_irq_remap_add_device(struct dmar_pci_notify_info *info) { } #endif struct iommu_flush { void (*flush_context)(struct intel_iommu *iommu, u16 did, u16 sid, u8 fm, u64 type); void (*flush_iotlb)(struct intel_iommu *iommu, u16 did, u64 addr, unsigned int size_order, u64 type); }; enum { SR_DMAR_FECTL_REG, SR_DMAR_FEDATA_REG, SR_DMAR_FEADDR_REG, SR_DMAR_FEUADDR_REG, MAX_SR_DMAR_REGS }; #define VTD_FLAG_TRANS_PRE_ENABLED (1 << 0) #define VTD_FLAG_IRQ_REMAP_PRE_ENABLED (1 << 1) #define VTD_FLAG_SVM_CAPABLE (1 << 2) extern int intel_iommu_sm; extern spinlock_t device_domain_lock; #define sm_supported(iommu) (intel_iommu_sm && ecap_smts((iommu)->ecap)) #define pasid_supported(iommu) (sm_supported(iommu) && \ ecap_pasid((iommu)->ecap)) struct pasid_entry; struct pasid_state_entry; struct page_req_dsc; /* * 0: Present * 1-11: Reserved * 12-63: Context Ptr (12 - (haw-1)) * 64-127: Reserved */ struct root_entry { u64 lo; u64 hi; }; /* * low 64 bits: * 0: present * 1: fault processing disable * 2-3: translation type * 12-63: address space root * high 64 bits: * 0-2: address width * 3-6: aval * 8-23: domain id */ struct context_entry { u64 lo; u64 hi; }; /* * When VT-d works in the scalable mode, it allows DMA translation to * happen through either first level or second level page table. This * bit marks that the DMA translation for the domain goes through the * first level page table, otherwise, it goes through the second level. */ #define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1) /* * Domain represents a virtual machine which demands iommu nested * translation mode support. */ #define DOMAIN_FLAG_NESTING_MODE BIT(2) struct dmar_domain { int nid; /* node id */ unsigned int iommu_refcnt[DMAR_UNITS_SUPPORTED]; /* Refcount of devices per iommu */ u16 iommu_did[DMAR_UNITS_SUPPORTED]; /* Domain ids per IOMMU. Use u16 since * domain ids are 16 bit wide according * to VT-d spec, section 9.3 */ u8 has_iotlb_device: 1; u8 iommu_coherency: 1; /* indicate coherency of iommu access */ u8 iommu_snooping: 1; /* indicate snooping control feature */ struct list_head devices; /* all devices' list */ struct list_head subdevices; /* all subdevices' list */ struct iova_domain iovad; /* iova's that belong to this domain */ struct dma_pte *pgd; /* virtual address */ int gaw; /* max guest address width */ /* adjusted guest address width, 0 is level 2 30-bit */ int agaw; int flags; /* flags to find out type of domain */ int iommu_superpage;/* Level of superpages supported: 0 == 4KiB (no superpages), 1 == 2MiB, 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */ u64 max_addr; /* maximum mapped address */ u32 default_pasid; /* * The default pasid used for non-SVM * traffic on mediated devices. */ struct iommu_domain domain; /* generic domain data structure for iommu core */ }; struct intel_iommu { void __iomem *reg; /* Pointer to hardware regs, virtual addr */ u64 reg_phys; /* physical address of hw register set */ u64 reg_size; /* size of hw register set */ u64 cap; u64 ecap; u64 vccap; u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */ raw_spinlock_t register_lock; /* protect register handling */ int seq_id; /* sequence id of the iommu */ int agaw; /* agaw of this iommu */ int msagaw; /* max sagaw of this iommu */ unsigned int irq, pr_irq; u16 segment; /* PCI segment# */ unsigned char name[13]; /* Device Name */ #ifdef CONFIG_INTEL_IOMMU unsigned long *domain_ids; /* bitmap of domains */ struct dmar_domain ***domains; /* ptr to domains */ unsigned long *copied_tables; /* bitmap of copied tables */ spinlock_t lock; /* protect context, domain ids */ struct root_entry *root_entry; /* virtual address */ struct iommu_flush flush; #endif #ifdef CONFIG_INTEL_IOMMU_SVM struct page_req_dsc *prq; unsigned char prq_name[16]; /* Name for PRQ interrupt */ struct completion prq_complete; struct ioasid_allocator_ops pasid_allocator; /* Custom allocator for PASIDs */ #endif struct iopf_queue *iopf_queue; unsigned char iopfq_name[16]; struct q_inval *qi; /* Queued invalidation info */ u32 iommu_state[MAX_SR_DMAR_REGS]; /* Store iommu states between suspend and resume.*/ #ifdef CONFIG_IRQ_REMAP struct ir_table *ir_table; /* Interrupt remapping info */ struct irq_domain *ir_domain; struct irq_domain *ir_msi_domain; #endif struct iommu_device iommu; /* IOMMU core code handle */ int node; u32 flags; /* Software defined flags */ struct dmar_drhd_unit *drhd; void *perf_statistic; }; /* Per subdevice private data */ struct subdev_domain_info { struct list_head link_phys; /* link to phys device siblings */ struct list_head link_domain; /* link to domain siblings */ struct device *pdev; /* physical device derived from */ struct dmar_domain *domain; /* aux-domain */ int users; /* user count */ }; /* PCI domain-device relationship */ struct device_domain_info { struct list_head link; /* link to domain siblings */ struct list_head global; /* link to global list */ struct list_head subdevices; /* subdevices sibling */ u32 segment; /* PCI segment number */ u8 bus; /* PCI bus number */ u8 devfn; /* PCI devfn number */ u16 pfsid; /* SRIOV physical function source ID */ u8 pasid_supported:3; u8 pasid_enabled:1; u8 pri_supported:1; u8 pri_enabled:1; u8 ats_supported:1; u8 ats_enabled:1; u8 auxd_enabled:1; /* Multiple domains per device */ u8 ats_qdep; struct device *dev; /* it's NULL for PCIe-to-PCI bridge */ struct intel_iommu *iommu; /* IOMMU used by this device */ struct dmar_domain *domain; /* pointer to domain */ struct pasid_table *pasid_table; /* pasid table */ }; static inline void __iommu_flush_cache( struct intel_iommu *iommu, void *addr, int size) { if (!ecap_coherent(iommu->ecap)) clflush_cache_range(addr, size); } /* Convert generic struct iommu_domain to private struct dmar_domain */ static inline struct dmar_domain *to_dmar_domain(struct iommu_domain *dom) { return container_of(dom, struct dmar_domain, domain); } /* * 0: readable * 1: writable * 2-6: reserved * 7: super page * 8-10: available * 11: snoop behavior * 12-63: Host physical address */ struct dma_pte { u64 val; }; static inline void dma_clear_pte(struct dma_pte *pte) { pte->val = 0; } static inline u64 dma_pte_addr(struct dma_pte *pte) { #ifdef CONFIG_64BIT return pte->val & VTD_PAGE_MASK & (~DMA_FL_PTE_XD); #else /* Must have a full atomic 64-bit read */ return __cmpxchg64(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK & (~DMA_FL_PTE_XD); #endif } static inline bool dma_pte_present(struct dma_pte *pte) { return (pte->val & 3) != 0; } static inline bool dma_pte_superpage(struct dma_pte *pte) { return (pte->val & DMA_PTE_LARGE_PAGE); } static inline int first_pte_in_page(struct dma_pte *pte) { return !((unsigned long)pte & ~VTD_PAGE_MASK); } static inline bool context_present(struct context_entry *context) { return (context->lo & 1); } extern struct dmar_drhd_unit * dmar_find_matched_drhd_unit(struct pci_dev *dev); extern int dmar_find_matched_atsr_unit(struct pci_dev *dev); extern int dmar_enable_qi(struct intel_iommu *iommu); extern void dmar_disable_qi(struct intel_iommu *iommu); extern int dmar_reenable_qi(struct intel_iommu *iommu); extern void qi_global_iec(struct intel_iommu *iommu); extern void qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid, u8 fm, u64 type); extern void qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr, unsigned int size_order, u64 type); extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid, u16 qdep, u64 addr, unsigned mask); void qi_flush_piotlb(struct intel_iommu *iommu, u16 did, u32 pasid, u64 addr, unsigned long npages, bool ih); void qi_flush_dev_iotlb_pasid(struct intel_iommu *iommu, u16 sid, u16 pfsid, u32 pasid, u16 qdep, u64 addr, unsigned int size_order); void qi_flush_pasid_cache(struct intel_iommu *iommu, u16 did, u64 granu, u32 pasid); int qi_submit_sync(struct intel_iommu *iommu, struct qi_desc *desc, unsigned int count, unsigned long options); /* * Options used in qi_submit_sync: * QI_OPT_WAIT_DRAIN - Wait for PRQ drain completion, spec 6.5.2.8. */ #define QI_OPT_WAIT_DRAIN BIT(0) extern int dmar_ir_support(void); void *alloc_pgtable_page(int node); void free_pgtable_page(void *vaddr); struct intel_iommu *domain_get_iommu(struct dmar_domain *domain); void iommu_flush_write_buffer(struct intel_iommu *iommu); int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev); struct dmar_domain *find_domain(struct device *dev); struct device_domain_info *get_domain_info(struct device *dev); struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn); #ifdef CONFIG_INTEL_IOMMU_SVM extern void intel_svm_check(struct intel_iommu *iommu); extern int intel_svm_enable_prq(struct intel_iommu *iommu); extern int intel_svm_finish_prq(struct intel_iommu *iommu); int intel_svm_bind_gpasid(struct iommu_domain *domain, struct device *dev, struct iommu_gpasid_bind_data *data); int intel_svm_unbind_gpasid(struct device *dev, u32 pasid); struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm, void *drvdata); void intel_svm_unbind(struct iommu_sva *handle); u32 intel_svm_get_pasid(struct iommu_sva *handle); int intel_svm_page_response(struct device *dev, struct iommu_fault_event *evt, struct iommu_page_response *msg); struct intel_svm_dev { struct list_head list; struct rcu_head rcu; struct device *dev; struct intel_iommu *iommu; struct iommu_sva sva; unsigned long prq_seq_number; u32 pasid; int users; u16 did; u16 dev_iotlb:1; u16 sid, qdep; }; struct intel_svm { struct mmu_notifier notifier; struct mm_struct *mm; unsigned int flags; u32 pasid; int gpasid; /* In case that guest PASID is different from host PASID */ struct list_head devs; }; #else static inline void intel_svm_check(struct intel_iommu *iommu) {} #endif #ifdef CONFIG_INTEL_IOMMU_DEBUGFS void intel_iommu_debugfs_init(void); #else static inline void intel_iommu_debugfs_init(void) {} #endif /* CONFIG_INTEL_IOMMU_DEBUGFS */ extern const struct attribute_group *intel_iommu_groups[]; struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus, u8 devfn, int alloc); #ifdef CONFIG_INTEL_IOMMU extern int iommu_calculate_agaw(struct intel_iommu *iommu); extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu); extern int dmar_disabled; extern int intel_iommu_enabled; extern int intel_iommu_gfx_mapped; #else static inline int iommu_calculate_agaw(struct intel_iommu *iommu) { return 0; } static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu) { return 0; } #define dmar_disabled (1) #define intel_iommu_enabled (0) #endif static inline const char *decode_prq_descriptor(char *str, size_t size, u64 dw0, u64 dw1, u64 dw2, u64 dw3) { char *buf = str; int bytes; bytes = snprintf(buf, size, "rid=0x%llx addr=0x%llx %c%c%c%c%c pasid=0x%llx index=0x%llx", FIELD_GET(GENMASK_ULL(31, 16), dw0), FIELD_GET(GENMASK_ULL(63, 12), dw1), dw1 & BIT_ULL(0) ? 'r' : '-', dw1 & BIT_ULL(1) ? 'w' : '-', dw0 & BIT_ULL(52) ? 'x' : '-', dw0 & BIT_ULL(53) ? 'p' : '-', dw1 & BIT_ULL(2) ? 'l' : '-', FIELD_GET(GENMASK_ULL(51, 32), dw0), FIELD_GET(GENMASK_ULL(11, 3), dw1)); /* Private Data */ if (dw0 & BIT_ULL(9)) { size -= bytes; buf += bytes; snprintf(buf, size, " private=0x%llx/0x%llx\n", dw2, dw3); } return str; } #endif PK ! or�q q genl_magic_struct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef GENL_MAGIC_STRUCT_H #define GENL_MAGIC_STRUCT_H #ifndef GENL_MAGIC_FAMILY # error "you need to define GENL_MAGIC_FAMILY before inclusion" #endif #ifndef GENL_MAGIC_VERSION # error "you need to define GENL_MAGIC_VERSION before inclusion" #endif #ifndef GENL_MAGIC_INCLUDE_FILE # error "you need to define GENL_MAGIC_INCLUDE_FILE before inclusion" #endif #include <linux/genetlink.h> #include <linux/types.h> #define CONCAT__(a,b) a ## b #define CONCAT_(a,b) CONCAT__(a,b) extern int CONCAT_(GENL_MAGIC_FAMILY, _genl_register)(void); extern void CONCAT_(GENL_MAGIC_FAMILY, _genl_unregister)(void); /* * Extension of genl attribute validation policies {{{2 */ /* * @DRBD_GENLA_F_MANDATORY: By default, netlink ignores attributes it does not * know about. This flag can be set in nlattr->nla_type to indicate that this * attribute must not be ignored. * * We check and remove this flag in drbd_nla_check_mandatory() before * validating the attribute types and lengths via nla_parse_nested(). */ #define DRBD_GENLA_F_MANDATORY (1 << 14) /* * Flags specific to drbd and not visible at the netlink layer, used in * <struct>_from_attrs and <struct>_to_skb: * * @DRBD_F_REQUIRED: Attribute is required; a request without this attribute is * invalid. * * @DRBD_F_SENSITIVE: Attribute includes sensitive information and must not be * included in unpriviledged get requests or broadcasts. * * @DRBD_F_INVARIANT: Attribute is set when an object is initially created, but * cannot subsequently be changed. */ #define DRBD_F_REQUIRED (1 << 0) #define DRBD_F_SENSITIVE (1 << 1) #define DRBD_F_INVARIANT (1 << 2) #define __nla_type(x) ((__u16)((x) & NLA_TYPE_MASK & ~DRBD_GENLA_F_MANDATORY)) /* }}}1 * MAGIC * multi-include macro expansion magic starts here */ /* MAGIC helpers {{{2 */ static inline int nla_put_u64_0pad(struct sk_buff *skb, int attrtype, u64 value) { return nla_put_64bit(skb, attrtype, sizeof(u64), &value, 0); } /* possible field types */ #define __flg_field(attr_nr, attr_flag, name) \ __field(attr_nr, attr_flag, name, NLA_U8, char, \ nla_get_u8, nla_put_u8, false) #define __u8_field(attr_nr, attr_flag, name) \ __field(attr_nr, attr_flag, name, NLA_U8, unsigned char, \ nla_get_u8, nla_put_u8, false) #define __u16_field(attr_nr, attr_flag, name) \ __field(attr_nr, attr_flag, name, NLA_U16, __u16, \ nla_get_u16, nla_put_u16, false) #define __u32_field(attr_nr, attr_flag, name) \ __field(attr_nr, attr_flag, name, NLA_U32, __u32, \ nla_get_u32, nla_put_u32, false) #define __s32_field(attr_nr, attr_flag, name) \ __field(attr_nr, attr_flag, name, NLA_U32, __s32, \ nla_get_u32, nla_put_u32, true) #define __u64_field(attr_nr, attr_flag, name) \ __field(attr_nr, attr_flag, name, NLA_U64, __u64, \ nla_get_u64, nla_put_u64_0pad, false) #define __str_field(attr_nr, attr_flag, name, maxlen) \ __array(attr_nr, attr_flag, name, NLA_NUL_STRING, char, maxlen, \ nla_strscpy, nla_put, false) #define __bin_field(attr_nr, attr_flag, name, maxlen) \ __array(attr_nr, attr_flag, name, NLA_BINARY, char, maxlen, \ nla_memcpy, nla_put, false) /* fields with default values */ #define __flg_field_def(attr_nr, attr_flag, name, default) \ __flg_field(attr_nr, attr_flag, name) #define __u32_field_def(attr_nr, attr_flag, name, default) \ __u32_field(attr_nr, attr_flag, name) #define __s32_field_def(attr_nr, attr_flag, name, default) \ __s32_field(attr_nr, attr_flag, name) #define __str_field_def(attr_nr, attr_flag, name, maxlen) \ __str_field(attr_nr, attr_flag, name, maxlen) #define GENL_op_init(args...) args #define GENL_doit(handler) \ .doit = handler, \ .flags = GENL_ADMIN_PERM, #define GENL_dumpit(handler) \ .dumpit = handler, \ .flags = GENL_ADMIN_PERM, /* }}}1 * Magic: define the enum symbols for genl_ops * Magic: define the enum symbols for top level attributes * Magic: define the enum symbols for nested attributes * {{{2 */ #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) #undef GENL_mc_group #define GENL_mc_group(group) #undef GENL_notification #define GENL_notification(op_name, op_num, mcast_group, tla_list) \ op_name = op_num, #undef GENL_op #define GENL_op(op_name, op_num, handler, tla_list) \ op_name = op_num, enum { #include GENL_MAGIC_INCLUDE_FILE }; #undef GENL_notification #define GENL_notification(op_name, op_num, mcast_group, tla_list) #undef GENL_op #define GENL_op(op_name, op_num, handler, attr_list) #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ tag_name = tag_number, enum { #include GENL_MAGIC_INCLUDE_FILE }; #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ enum { \ s_fields \ }; #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, \ __get, __put, __is_signed) \ T_ ## name = (__u16)(attr_nr | ((attr_flag) & DRBD_GENLA_F_MANDATORY)), #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, \ maxlen, __get, __put, __is_signed) \ T_ ## name = (__u16)(attr_nr | ((attr_flag) & DRBD_GENLA_F_MANDATORY)), #include GENL_MAGIC_INCLUDE_FILE /* }}}1 * Magic: compile time assert unique numbers for operations * Magic: -"- unique numbers for top level attributes * Magic: -"- unique numbers for nested attributes * {{{2 */ #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) #undef GENL_op #define GENL_op(op_name, op_num, handler, attr_list) \ case op_name: #undef GENL_notification #define GENL_notification(op_name, op_num, mcast_group, tla_list) \ case op_name: static inline void ct_assert_unique_operations(void) { switch (0) { #include GENL_MAGIC_INCLUDE_FILE case 0: ; } } #undef GENL_op #define GENL_op(op_name, op_num, handler, attr_list) #undef GENL_notification #define GENL_notification(op_name, op_num, mcast_group, tla_list) #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ case tag_number: static inline void ct_assert_unique_top_level_attributes(void) { switch (0) { #include GENL_MAGIC_INCLUDE_FILE case 0: ; } } #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ static inline void ct_assert_unique_ ## s_name ## _attributes(void) \ { \ switch (0) { \ s_fields \ case 0: \ ; \ } \ } #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, __get, __put, \ __is_signed) \ case attr_nr: #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, maxlen, \ __get, __put, __is_signed) \ case attr_nr: #include GENL_MAGIC_INCLUDE_FILE /* }}}1 * Magic: declare structs * struct <name> { * fields * }; * {{{2 */ #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ struct s_name { s_fields }; #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, __get, __put, \ __is_signed) \ type name; #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, maxlen, \ __get, __put, __is_signed) \ type name[maxlen]; \ __u32 name ## _len; #include GENL_MAGIC_INCLUDE_FILE #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ enum { \ s_fields \ }; #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, __get, __put, \ is_signed) \ F_ ## name ## _IS_SIGNED = is_signed, #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, maxlen, \ __get, __put, is_signed) \ F_ ## name ## _IS_SIGNED = is_signed, #include GENL_MAGIC_INCLUDE_FILE /* }}}1 */ #endif /* GENL_MAGIC_STRUCT_H */ PK ! ��p�� � if_macvlan.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IF_MACVLAN_H #define _LINUX_IF_MACVLAN_H #include <linux/if_link.h> #include <linux/if_vlan.h> #include <linux/list.h> #include <linux/netdevice.h> #include <linux/netlink.h> #include <net/netlink.h> #include <linux/u64_stats_sync.h> struct macvlan_port; #define MACVLAN_MC_FILTER_BITS 8 #define MACVLAN_MC_FILTER_SZ (1 << MACVLAN_MC_FILTER_BITS) struct macvlan_dev { struct net_device *dev; struct list_head list; struct hlist_node hlist; struct macvlan_port *port; struct net_device *lowerdev; void *accel_priv; struct vlan_pcpu_stats __percpu *pcpu_stats; DECLARE_BITMAP(mc_filter, MACVLAN_MC_FILTER_SZ); netdev_features_t set_features; enum macvlan_mode mode; u16 flags; unsigned int macaddr_count; u32 bc_queue_len_req; #ifdef CONFIG_NET_POLL_CONTROLLER struct netpoll *netpoll; #endif }; static inline void macvlan_count_rx(const struct macvlan_dev *vlan, unsigned int len, bool success, bool multicast) { if (likely(success)) { struct vlan_pcpu_stats *pcpu_stats; pcpu_stats = get_cpu_ptr(vlan->pcpu_stats); u64_stats_update_begin(&pcpu_stats->syncp); pcpu_stats->rx_packets++; pcpu_stats->rx_bytes += len; if (multicast) pcpu_stats->rx_multicast++; u64_stats_update_end(&pcpu_stats->syncp); put_cpu_ptr(vlan->pcpu_stats); } else { this_cpu_inc(vlan->pcpu_stats->rx_errors); } } extern void macvlan_common_setup(struct net_device *dev); extern int macvlan_common_newlink(struct net *src_net, struct net_device *dev, struct nlattr *tb[], struct nlattr *data[], struct netlink_ext_ack *extack); extern void macvlan_dellink(struct net_device *dev, struct list_head *head); extern int macvlan_link_register(struct rtnl_link_ops *ops); #if IS_ENABLED(CONFIG_MACVLAN) static inline struct net_device * macvlan_dev_real_dev(const struct net_device *dev) { struct macvlan_dev *macvlan = netdev_priv(dev); return macvlan->lowerdev; } #else static inline struct net_device * macvlan_dev_real_dev(const struct net_device *dev) { BUG(); return NULL; } #endif static inline void *macvlan_accel_priv(struct net_device *dev) { struct macvlan_dev *macvlan = netdev_priv(dev); return macvlan->accel_priv; } static inline bool macvlan_supports_dest_filter(struct net_device *dev) { struct macvlan_dev *macvlan = netdev_priv(dev); return macvlan->mode == MACVLAN_MODE_PRIVATE || macvlan->mode == MACVLAN_MODE_VEPA || macvlan->mode == MACVLAN_MODE_BRIDGE; } static inline int macvlan_release_l2fw_offload(struct net_device *dev) { struct macvlan_dev *macvlan = netdev_priv(dev); macvlan->accel_priv = NULL; return dev_uc_add(macvlan->lowerdev, dev->dev_addr); } #endif /* _LINUX_IF_MACVLAN_H */ PK ! y6` elevator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ELEVATOR_H #define _LINUX_ELEVATOR_H #include <linux/percpu.h> #include <linux/hashtable.h> #ifdef CONFIG_BLOCK struct io_cq; struct elevator_type; #ifdef CONFIG_BLK_DEBUG_FS struct blk_mq_debugfs_attr; #endif /* * Return values from elevator merger */ enum elv_merge { ELEVATOR_NO_MERGE = 0, ELEVATOR_FRONT_MERGE = 1, ELEVATOR_BACK_MERGE = 2, ELEVATOR_DISCARD_MERGE = 3, }; struct blk_mq_alloc_data; struct blk_mq_hw_ctx; struct elevator_mq_ops { int (*init_sched)(struct request_queue *, struct elevator_type *); void (*exit_sched)(struct elevator_queue *); int (*init_hctx)(struct blk_mq_hw_ctx *, unsigned int); void (*exit_hctx)(struct blk_mq_hw_ctx *, unsigned int); void (*depth_updated)(struct blk_mq_hw_ctx *); bool (*allow_merge)(struct request_queue *, struct request *, struct bio *); bool (*bio_merge)(struct request_queue *, struct bio *, unsigned int); int (*request_merge)(struct request_queue *q, struct request **, struct bio *); void (*request_merged)(struct request_queue *, struct request *, enum elv_merge); void (*requests_merged)(struct request_queue *, struct request *, struct request *); void (*limit_depth)(unsigned int, struct blk_mq_alloc_data *); void (*prepare_request)(struct request *); void (*finish_request)(struct request *); void (*insert_requests)(struct blk_mq_hw_ctx *, struct list_head *, bool); struct request *(*dispatch_request)(struct blk_mq_hw_ctx *); bool (*has_work)(struct blk_mq_hw_ctx *); void (*completed_request)(struct request *, u64); void (*requeue_request)(struct request *); struct request *(*former_request)(struct request_queue *, struct request *); struct request *(*next_request)(struct request_queue *, struct request *); void (*init_icq)(struct io_cq *); void (*exit_icq)(struct io_cq *); }; #define ELV_NAME_MAX (16) struct elv_fs_entry { struct attribute attr; ssize_t (*show)(struct elevator_queue *, char *); ssize_t (*store)(struct elevator_queue *, const char *, size_t); }; /* * identifies an elevator type, such as AS or deadline */ struct elevator_type { /* managed by elevator core */ struct kmem_cache *icq_cache; /* fields provided by elevator implementation */ struct elevator_mq_ops ops; size_t icq_size; /* see iocontext.h */ size_t icq_align; /* ditto */ struct elv_fs_entry *elevator_attrs; const char *elevator_name; const char *elevator_alias; const unsigned int elevator_features; struct module *elevator_owner; #ifdef CONFIG_BLK_DEBUG_FS const struct blk_mq_debugfs_attr *queue_debugfs_attrs; const struct blk_mq_debugfs_attr *hctx_debugfs_attrs; #endif /* managed by elevator core */ char icq_cache_name[ELV_NAME_MAX + 6]; /* elvname + "_io_cq" */ struct list_head list; }; #define ELV_HASH_BITS 6 void elv_rqhash_del(struct request_queue *q, struct request *rq); void elv_rqhash_add(struct request_queue *q, struct request *rq); void elv_rqhash_reposition(struct request_queue *q, struct request *rq); struct request *elv_rqhash_find(struct request_queue *q, sector_t offset); /* * each queue has an elevator_queue associated with it */ struct elevator_queue { struct elevator_type *type; void *elevator_data; struct kobject kobj; struct mutex sysfs_lock; unsigned int registered:1; DECLARE_HASHTABLE(hash, ELV_HASH_BITS); }; /* * block elevator interface */ extern enum elv_merge elv_merge(struct request_queue *, struct request **, struct bio *); extern void elv_merge_requests(struct request_queue *, struct request *, struct request *); extern void elv_merged_request(struct request_queue *, struct request *, enum elv_merge); extern bool elv_attempt_insert_merge(struct request_queue *, struct request *, struct list_head *); extern struct request *elv_former_request(struct request_queue *, struct request *); extern struct request *elv_latter_request(struct request_queue *, struct request *); void elevator_init_mq(struct request_queue *q); /* * io scheduler registration */ extern int elv_register(struct elevator_type *); extern void elv_unregister(struct elevator_type *); /* * io scheduler sysfs switching */ extern ssize_t elv_iosched_show(struct request_queue *, char *); extern ssize_t elv_iosched_store(struct request_queue *, const char *, size_t); extern bool elv_bio_merge_ok(struct request *, struct bio *); extern struct elevator_queue *elevator_alloc(struct request_queue *, struct elevator_type *); /* * Helper functions. */ extern struct request *elv_rb_former_request(struct request_queue *, struct request *); extern struct request *elv_rb_latter_request(struct request_queue *, struct request *); /* * rb support functions. */ extern void elv_rb_add(struct rb_root *, struct request *); extern void elv_rb_del(struct rb_root *, struct request *); extern struct request *elv_rb_find(struct rb_root *, sector_t); /* * Insertion selection */ #define ELEVATOR_INSERT_FRONT 1 #define ELEVATOR_INSERT_BACK 2 #define ELEVATOR_INSERT_SORT 3 #define ELEVATOR_INSERT_REQUEUE 4 #define ELEVATOR_INSERT_FLUSH 5 #define ELEVATOR_INSERT_SORT_MERGE 6 #define rq_end_sector(rq) (blk_rq_pos(rq) + blk_rq_sectors(rq)) #define rb_entry_rq(node) rb_entry((node), struct request, rb_node) #define rq_entry_fifo(ptr) list_entry((ptr), struct request, queuelist) #define rq_fifo_clear(rq) list_del_init(&(rq)->queuelist) /* * Elevator features. */ /* Supports zoned block devices sequential write constraint */ #define ELEVATOR_F_ZBD_SEQ_WRITE (1U << 0) /* Supports scheduling on multiple hardware queues */ #define ELEVATOR_F_MQ_AWARE (1U << 1) #endif /* CONFIG_BLOCK */ #endif PK ! �&譹 � mc6821.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _MC6821_H_ #define _MC6821_H_ /* * This file describes the memery mapping of the MC6821 PIA. * The unions describe overlayed registers. Which of them is used is * determined by bit 2 of the corresponding control register. * this files expects the PIA_REG_PADWIDTH to be defined the numeric * value of the register spacing. * * Data came from MFC-31-Developer Kit (from Ralph Seidel, * zodiac@darkness.gun.de) and Motorola Data Sheet (from * Richard Hirst, srh@gpt.co.uk) * * 6.11.95 copyright Joerg Dorchain (dorchain@mpi-sb.mpg.de) * */ #ifndef PIA_REG_PADWIDTH #define PIA_REG_PADWIDTH 255 #endif struct pia { union { volatile u_char pra; volatile u_char ddra; } ua; u_char pad1[PIA_REG_PADWIDTH]; volatile u_char cra; u_char pad2[PIA_REG_PADWIDTH]; union { volatile u_char prb; volatile u_char ddrb; } ub; u_char pad3[PIA_REG_PADWIDTH]; volatile u_char crb; u_char pad4[PIA_REG_PADWIDTH]; }; #define ppra ua.pra #define pddra ua.ddra #define pprb ub.prb #define pddrb ub.ddrb #define PIA_C1_ENABLE_IRQ (1<<0) #define PIA_C1_LOW_TO_HIGH (1<<1) #define PIA_DDR (1<<2) #define PIA_IRQ2 (1<<6) #define PIA_IRQ1 (1<<7) #endif PK ! r�S � � page-flags-layout.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef PAGE_FLAGS_LAYOUT_H #define PAGE_FLAGS_LAYOUT_H #include <linux/numa.h> #include <generated/bounds.h> /* * When a memory allocation must conform to specific limitations (such * as being suitable for DMA) the caller will pass in hints to the * allocator in the gfp_mask, in the zone modifier bits. These bits * are used to select a priority ordered list of memory zones which * match the requested limits. See gfp_zone() in include/linux/gfp.h */ #if MAX_NR_ZONES < 2 #define ZONES_SHIFT 0 #elif MAX_NR_ZONES <= 2 #define ZONES_SHIFT 1 #elif MAX_NR_ZONES <= 4 #define ZONES_SHIFT 2 #elif MAX_NR_ZONES <= 8 #define ZONES_SHIFT 3 #else #error ZONES_SHIFT "Too many zones configured" #endif #define ZONES_WIDTH ZONES_SHIFT #ifdef CONFIG_SPARSEMEM #include <asm/sparsemem.h> #define SECTIONS_SHIFT (MAX_PHYSMEM_BITS - SECTION_SIZE_BITS) #else #define SECTIONS_SHIFT 0 #endif #ifndef BUILD_VDSO32_64 /* * page->flags layout: * * There are five possibilities for how page->flags get laid out. The first * pair is for the normal case without sparsemem. The second pair is for * sparsemem when there is plenty of space for node and section information. * The last is when there is insufficient space in page->flags and a separate * lookup is necessary. * * No sparsemem or sparsemem vmemmap: | NODE | ZONE | ... | FLAGS | * " plus space for last_cpupid: | NODE | ZONE | LAST_CPUPID ... | FLAGS | * classic sparse with space for node:| SECTION | NODE | ZONE | ... | FLAGS | * " plus space for last_cpupid: | SECTION | NODE | ZONE | LAST_CPUPID ... | FLAGS | * classic sparse no space for node: | SECTION | ZONE | ... | FLAGS | */ #if defined(CONFIG_SPARSEMEM) && !defined(CONFIG_SPARSEMEM_VMEMMAP) #define SECTIONS_WIDTH SECTIONS_SHIFT #else #define SECTIONS_WIDTH 0 #endif #if ZONES_WIDTH + SECTIONS_WIDTH + NODES_SHIFT <= BITS_PER_LONG - NR_PAGEFLAGS #define NODES_WIDTH NODES_SHIFT #elif defined(CONFIG_SPARSEMEM_VMEMMAP) #error "Vmemmap: No space for nodes field in page flags" #else #define NODES_WIDTH 0 #endif /* * Note that this #define MUST have a value so that it can be tested with * the IS_ENABLED() macro. */ #if NODES_SHIFT != 0 && NODES_WIDTH == 0 #define NODE_NOT_IN_PAGE_FLAGS 1 #endif #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS) #define KASAN_TAG_WIDTH 8 #else #define KASAN_TAG_WIDTH 0 #endif #ifdef CONFIG_NUMA_BALANCING #define LAST__PID_SHIFT 8 #define LAST__PID_MASK ((1 << LAST__PID_SHIFT)-1) #define LAST__CPU_SHIFT NR_CPUS_BITS #define LAST__CPU_MASK ((1 << LAST__CPU_SHIFT)-1) #define LAST_CPUPID_SHIFT (LAST__PID_SHIFT+LAST__CPU_SHIFT) #else #define LAST_CPUPID_SHIFT 0 #endif #if ZONES_WIDTH + SECTIONS_WIDTH + NODES_WIDTH + KASAN_TAG_WIDTH + LAST_CPUPID_SHIFT \ <= BITS_PER_LONG - NR_PAGEFLAGS #define LAST_CPUPID_WIDTH LAST_CPUPID_SHIFT #else #define LAST_CPUPID_WIDTH 0 #endif #if LAST_CPUPID_SHIFT != 0 && LAST_CPUPID_WIDTH == 0 #define LAST_CPUPID_NOT_IN_PAGE_FLAGS #endif #if ZONES_WIDTH + SECTIONS_WIDTH + NODES_WIDTH + KASAN_TAG_WIDTH + LAST_CPUPID_WIDTH \ > BITS_PER_LONG - NR_PAGEFLAGS #error "Not enough bits in page flags" #endif #endif #endif /* _LINUX_PAGE_FLAGS_LAYOUT */ PK ! q!�k� � syscall_user_dispatch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2020 Collabora Ltd. */ #ifndef _SYSCALL_USER_DISPATCH_H #define _SYSCALL_USER_DISPATCH_H #include <linux/thread_info.h> #ifdef CONFIG_GENERIC_ENTRY struct syscall_user_dispatch { char __user *selector; unsigned long offset; unsigned long len; bool on_dispatch; }; int set_syscall_user_dispatch(unsigned long mode, unsigned long offset, unsigned long len, char __user *selector); #define clear_syscall_work_syscall_user_dispatch(tsk) \ clear_task_syscall_work(tsk, SYSCALL_USER_DISPATCH) #else struct syscall_user_dispatch {}; static inline int set_syscall_user_dispatch(unsigned long mode, unsigned long offset, unsigned long len, char __user *selector) { return -EINVAL; } static inline void clear_syscall_work_syscall_user_dispatch(struct task_struct *tsk) { } #endif /* CONFIG_GENERIC_ENTRY */ #endif /* _SYSCALL_USER_DISPATCH_H */ PK ! yG� q q fb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FB_H #define _LINUX_FB_H #include <linux/refcount.h> #include <linux/kgdb.h> #include <uapi/linux/fb.h> #define FBIO_CURSOR _IOWR('F', 0x08, struct fb_cursor_user) #include <linux/fs.h> #include <linux/init.h> #include <linux/workqueue.h> #include <linux/notifier.h> #include <linux/list.h> #include <linux/backlight.h> #include <linux/slab.h> #include <asm/io.h> struct vm_area_struct; struct fb_info; struct device; struct file; struct videomode; struct device_node; /* Definitions below are used in the parsed monitor specs */ #define FB_DPMS_ACTIVE_OFF 1 #define FB_DPMS_SUSPEND 2 #define FB_DPMS_STANDBY 4 #define FB_DISP_DDI 1 #define FB_DISP_ANA_700_300 2 #define FB_DISP_ANA_714_286 4 #define FB_DISP_ANA_1000_400 8 #define FB_DISP_ANA_700_000 16 #define FB_DISP_MONO 32 #define FB_DISP_RGB 64 #define FB_DISP_MULTI 128 #define FB_DISP_UNKNOWN 256 #define FB_SIGNAL_NONE 0 #define FB_SIGNAL_BLANK_BLANK 1 #define FB_SIGNAL_SEPARATE 2 #define FB_SIGNAL_COMPOSITE 4 #define FB_SIGNAL_SYNC_ON_GREEN 8 #define FB_SIGNAL_SERRATION_ON 16 #define FB_MISC_PRIM_COLOR 1 #define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */ #define FB_MISC_HDMI 4 struct fb_chroma { __u32 redx; /* in fraction of 1024 */ __u32 greenx; __u32 bluex; __u32 whitex; __u32 redy; __u32 greeny; __u32 bluey; __u32 whitey; }; struct fb_monspecs { struct fb_chroma chroma; struct fb_videomode *modedb; /* mode database */ __u8 manufacturer[4]; /* Manufacturer */ __u8 monitor[14]; /* Monitor String */ __u8 serial_no[14]; /* Serial Number */ __u8 ascii[14]; /* ? */ __u32 modedb_len; /* mode database length */ __u32 model; /* Monitor Model */ __u32 serial; /* Serial Number - Integer */ __u32 year; /* Year manufactured */ __u32 week; /* Week Manufactured */ __u32 hfmin; /* hfreq lower limit (Hz) */ __u32 hfmax; /* hfreq upper limit (Hz) */ __u32 dclkmin; /* pixelclock lower limit (Hz) */ __u32 dclkmax; /* pixelclock upper limit (Hz) */ __u16 input; /* display type - see FB_DISP_* */ __u16 dpms; /* DPMS support - see FB_DPMS_ */ __u16 signal; /* Signal Type - see FB_SIGNAL_* */ __u16 vfmin; /* vfreq lower limit (Hz) */ __u16 vfmax; /* vfreq upper limit (Hz) */ __u16 gamma; /* Gamma - in fractions of 100 */ __u16 gtf : 1; /* supports GTF */ __u16 misc; /* Misc flags - see FB_MISC_* */ __u8 version; /* EDID version... */ __u8 revision; /* ...and revision */ __u8 max_x; /* Maximum horizontal size (cm) */ __u8 max_y; /* Maximum vertical size (cm) */ }; struct fb_cmap_user { __u32 start; /* First entry */ __u32 len; /* Number of entries */ __u16 __user *red; /* Red values */ __u16 __user *green; __u16 __user *blue; __u16 __user *transp; /* transparency, can be NULL */ }; struct fb_image_user { __u32 dx; /* Where to place image */ __u32 dy; __u32 width; /* Size of image */ __u32 height; __u32 fg_color; /* Only used when a mono bitmap */ __u32 bg_color; __u8 depth; /* Depth of the image */ const char __user *data; /* Pointer to image data */ struct fb_cmap_user cmap; /* color map info */ }; struct fb_cursor_user { __u16 set; /* what to set */ __u16 enable; /* cursor on/off */ __u16 rop; /* bitop operation */ const char __user *mask; /* cursor mask bits */ struct fbcurpos hot; /* cursor hot spot */ struct fb_image_user image; /* Cursor image */ }; /* * Register/unregister for framebuffer events */ /* The resolution of the passed in fb_info about to change */ #define FB_EVENT_MODE_CHANGE 0x01 #ifdef CONFIG_GUMSTIX_AM200EPD /* only used by mach-pxa/am200epd.c */ #define FB_EVENT_FB_REGISTERED 0x05 #define FB_EVENT_FB_UNREGISTERED 0x06 #endif /* A display blank is requested */ #define FB_EVENT_BLANK 0x09 struct fb_event { struct fb_info *info; void *data; }; struct fb_blit_caps { u32 x; u32 y; u32 len; u32 flags; }; #ifdef CONFIG_FB_NOTIFY extern int fb_register_client(struct notifier_block *nb); extern int fb_unregister_client(struct notifier_block *nb); extern int fb_notifier_call_chain(unsigned long val, void *v); #else static inline int fb_register_client(struct notifier_block *nb) { return 0; }; static inline int fb_unregister_client(struct notifier_block *nb) { return 0; }; static inline int fb_notifier_call_chain(unsigned long val, void *v) { return 0; }; #endif /* * Pixmap structure definition * * The purpose of this structure is to translate data * from the hardware independent format of fbdev to what * format the hardware needs. */ #define FB_PIXMAP_DEFAULT 1 /* used internally by fbcon */ #define FB_PIXMAP_SYSTEM 2 /* memory is in system RAM */ #define FB_PIXMAP_IO 4 /* memory is iomapped */ #define FB_PIXMAP_SYNC 256 /* set if GPU can DMA */ struct fb_pixmap { u8 *addr; /* pointer to memory */ u32 size; /* size of buffer in bytes */ u32 offset; /* current offset to buffer */ u32 buf_align; /* byte alignment of each bitmap */ u32 scan_align; /* alignment per scanline */ u32 access_align; /* alignment per read/write (bits) */ u32 flags; /* see FB_PIXMAP_* */ u32 blit_x; /* supported bit block dimensions (1-32)*/ u32 blit_y; /* Format: blit_x = 1 << (width - 1) */ /* blit_y = 1 << (height - 1) */ /* if 0, will be set to 0xffffffff (all)*/ /* access methods */ void (*writeio)(struct fb_info *info, void __iomem *dst, void *src, unsigned int size); void (*readio) (struct fb_info *info, void *dst, void __iomem *src, unsigned int size); }; #ifdef CONFIG_FB_DEFERRED_IO struct fb_deferred_io_pageref { struct page *page; unsigned long offset; /* private */ struct list_head list; }; struct fb_deferred_io { /* delay between mkwrite and deferred handler */ unsigned long delay; bool sort_pagereflist; /* sort pagelist by offset */ int open_count; /* number of opened files; protected by fb_info lock */ struct mutex lock; /* mutex that protects the pageref list */ struct list_head pagereflist; /* list of pagerefs for touched pages */ /* callback */ void (*first_io)(struct fb_info *info); void (*deferred_io)(struct fb_info *info, struct list_head *pagelist); }; #endif /* * Frame buffer operations * * LOCKING NOTE: those functions must _ALL_ be called with the console * semaphore held, this is the only suitable locking mechanism we have * in 2.6. Some may be called at interrupt time at this point though. * * The exception to this is the debug related hooks. Putting the fb * into a debug state (e.g. flipping to the kernel console) and restoring * it must be done in a lock-free manner, so low level drivers should * keep track of the initial console (if applicable) and may need to * perform direct, unlocked hardware writes in these hooks. */ struct fb_ops { /* open/release and usage marking */ struct module *owner; int (*fb_open)(struct fb_info *info, int user); int (*fb_release)(struct fb_info *info, int user); /* For framebuffers with strange non linear layouts or that do not * work with normal memory mapped access */ ssize_t (*fb_read)(struct fb_info *info, char __user *buf, size_t count, loff_t *ppos); ssize_t (*fb_write)(struct fb_info *info, const char __user *buf, size_t count, loff_t *ppos); /* checks var and eventually tweaks it to something supported, * DO NOT MODIFY PAR */ int (*fb_check_var)(struct fb_var_screeninfo *var, struct fb_info *info); /* set the video mode according to info->var */ int (*fb_set_par)(struct fb_info *info); /* set color register */ int (*fb_setcolreg)(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info); /* set color registers in batch */ int (*fb_setcmap)(struct fb_cmap *cmap, struct fb_info *info); /* blank display */ int (*fb_blank)(int blank, struct fb_info *info); /* pan display */ int (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info); /* Draws a rectangle */ void (*fb_fillrect) (struct fb_info *info, const struct fb_fillrect *rect); /* Copy data from area to another */ void (*fb_copyarea) (struct fb_info *info, const struct fb_copyarea *region); /* Draws a image to the display */ void (*fb_imageblit) (struct fb_info *info, const struct fb_image *image); /* Draws cursor */ int (*fb_cursor) (struct fb_info *info, struct fb_cursor *cursor); /* wait for blit idle, optional */ int (*fb_sync)(struct fb_info *info); /* perform fb specific ioctl (optional) */ int (*fb_ioctl)(struct fb_info *info, unsigned int cmd, unsigned long arg); /* Handle 32bit compat ioctl (optional) */ int (*fb_compat_ioctl)(struct fb_info *info, unsigned cmd, unsigned long arg); /* perform fb specific mmap */ int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); /* get capability given var */ void (*fb_get_caps)(struct fb_info *info, struct fb_blit_caps *caps, struct fb_var_screeninfo *var); /* teardown any resources to do with this framebuffer */ void (*fb_destroy)(struct fb_info *info); /* called at KDB enter and leave time to prepare the console */ int (*fb_debug_enter)(struct fb_info *info); int (*fb_debug_leave)(struct fb_info *info); }; #ifdef CONFIG_FB_TILEBLITTING #define FB_TILE_CURSOR_NONE 0 #define FB_TILE_CURSOR_UNDERLINE 1 #define FB_TILE_CURSOR_LOWER_THIRD 2 #define FB_TILE_CURSOR_LOWER_HALF 3 #define FB_TILE_CURSOR_TWO_THIRDS 4 #define FB_TILE_CURSOR_BLOCK 5 struct fb_tilemap { __u32 width; /* width of each tile in pixels */ __u32 height; /* height of each tile in scanlines */ __u32 depth; /* color depth of each tile */ __u32 length; /* number of tiles in the map */ const __u8 *data; /* actual tile map: a bitmap array, packed to the nearest byte */ }; struct fb_tilerect { __u32 sx; /* origin in the x-axis */ __u32 sy; /* origin in the y-axis */ __u32 width; /* number of tiles in the x-axis */ __u32 height; /* number of tiles in the y-axis */ __u32 index; /* what tile to use: index to tile map */ __u32 fg; /* foreground color */ __u32 bg; /* background color */ __u32 rop; /* raster operation */ }; struct fb_tilearea { __u32 sx; /* source origin in the x-axis */ __u32 sy; /* source origin in the y-axis */ __u32 dx; /* destination origin in the x-axis */ __u32 dy; /* destination origin in the y-axis */ __u32 width; /* number of tiles in the x-axis */ __u32 height; /* number of tiles in the y-axis */ }; struct fb_tileblit { __u32 sx; /* origin in the x-axis */ __u32 sy; /* origin in the y-axis */ __u32 width; /* number of tiles in the x-axis */ __u32 height; /* number of tiles in the y-axis */ __u32 fg; /* foreground color */ __u32 bg; /* background color */ __u32 length; /* number of tiles to draw */ __u32 *indices; /* array of indices to tile map */ }; struct fb_tilecursor { __u32 sx; /* cursor position in the x-axis */ __u32 sy; /* cursor position in the y-axis */ __u32 mode; /* 0 = erase, 1 = draw */ __u32 shape; /* see FB_TILE_CURSOR_* */ __u32 fg; /* foreground color */ __u32 bg; /* background color */ }; struct fb_tile_ops { /* set tile characteristics */ void (*fb_settile)(struct fb_info *info, struct fb_tilemap *map); /* all dimensions from hereon are in terms of tiles */ /* move a rectangular region of tiles from one area to another*/ void (*fb_tilecopy)(struct fb_info *info, struct fb_tilearea *area); /* fill a rectangular region with a tile */ void (*fb_tilefill)(struct fb_info *info, struct fb_tilerect *rect); /* copy an array of tiles */ void (*fb_tileblit)(struct fb_info *info, struct fb_tileblit *blit); /* cursor */ void (*fb_tilecursor)(struct fb_info *info, struct fb_tilecursor *cursor); /* get maximum length of the tile map */ int (*fb_get_tilemax)(struct fb_info *info); }; #endif /* CONFIG_FB_TILEBLITTING */ /* FBINFO_* = fb_info.flags bit flags */ #define FBINFO_DEFAULT 0 #define FBINFO_HWACCEL_DISABLED 0x0002 /* When FBINFO_HWACCEL_DISABLED is set: * Hardware acceleration is turned off. Software implementations * of required functions (copyarea(), fillrect(), and imageblit()) * takes over; acceleration engine should be in a quiescent state */ /* hints */ #define FBINFO_VIRTFB 0x0004 /* FB is System RAM, not device. */ #define FBINFO_PARTIAL_PAN_OK 0x0040 /* otw use pan only for double-buffering */ #define FBINFO_READS_FAST 0x0080 /* soft-copy faster than rendering */ /* hardware supported ops */ /* semantics: when a bit is set, it indicates that the operation is * accelerated by hardware. * required functions will still work even if the bit is not set. * optional functions may not even exist if the flag bit is not set. */ #define FBINFO_HWACCEL_NONE 0x0000 #define FBINFO_HWACCEL_COPYAREA 0x0100 /* required */ #define FBINFO_HWACCEL_FILLRECT 0x0200 /* required */ #define FBINFO_HWACCEL_IMAGEBLIT 0x0400 /* required */ #define FBINFO_HWACCEL_ROTATE 0x0800 /* optional */ #define FBINFO_HWACCEL_XPAN 0x1000 /* optional */ #define FBINFO_HWACCEL_YPAN 0x2000 /* optional */ #define FBINFO_HWACCEL_YWRAP 0x4000 /* optional */ #define FBINFO_MISC_TILEBLITTING 0x20000 /* use tile blitting */ /* A driver may set this flag to indicate that it does want a set_par to be * called every time when fbcon_switch is executed. The advantage is that with * this flag set you can really be sure that set_par is always called before * any of the functions dependent on the correct hardware state or altering * that state, even if you are using some broken X releases. The disadvantage * is that it introduces unwanted delays to every console switch if set_par * is slow. It is a good idea to try this flag in the drivers initialization * code whenever there is a bug report related to switching between X and the * framebuffer console. */ #define FBINFO_MISC_ALWAYS_SETPAR 0x40000 /* where the fb is a firmware driver, and can be replaced with a proper one */ #define FBINFO_MISC_FIRMWARE 0x80000 /* * Host and GPU endianness differ. */ #define FBINFO_FOREIGN_ENDIAN 0x100000 /* * Big endian math. This is the same flags as above, but with different * meaning, it is set by the fb subsystem depending FOREIGN_ENDIAN flag * and host endianness. Drivers should not use this flag. */ #define FBINFO_BE_MATH 0x100000 /* * Hide smem_start in the FBIOGET_FSCREENINFO IOCTL. This is used by modern DRM * drivers to stop userspace from trying to share buffers behind the kernel's * back. Instead dma-buf based buffer sharing should be used. */ #define FBINFO_HIDE_SMEM_START 0x200000 struct fb_info { refcount_t count; int node; int flags; /* * -1 by default, set to a FB_ROTATE_* value by the driver, if it knows * a lcd is not mounted upright and fbcon should rotate to compensate. */ int fbcon_rotate_hint; struct mutex lock; /* Lock for open/release/ioctl funcs */ struct mutex mm_lock; /* Lock for fb_mmap and smem_* fields */ struct fb_var_screeninfo var; /* Current var */ struct fb_fix_screeninfo fix; /* Current fix */ struct fb_monspecs monspecs; /* Current Monitor specs */ struct work_struct queue; /* Framebuffer event queue */ struct fb_pixmap pixmap; /* Image hardware mapper */ struct fb_pixmap sprite; /* Cursor hardware mapper */ struct fb_cmap cmap; /* Current cmap */ struct list_head modelist; /* mode list */ struct fb_videomode *mode; /* current mode */ #if IS_ENABLED(CONFIG_FB_BACKLIGHT) /* assigned backlight device */ /* set before framebuffer registration, remove after unregister */ struct backlight_device *bl_dev; /* Backlight level curve */ struct mutex bl_curve_mutex; u8 bl_curve[FB_BACKLIGHT_LEVELS]; #endif #ifdef CONFIG_FB_DEFERRED_IO struct delayed_work deferred_work; unsigned long npagerefs; struct fb_deferred_io_pageref *pagerefs; struct fb_deferred_io *fbdefio; #endif const struct fb_ops *fbops; struct device *device; /* This is the parent */ struct device *dev; /* This is this fb device */ int class_flag; /* private sysfs flags */ #ifdef CONFIG_FB_TILEBLITTING struct fb_tile_ops *tileops; /* Tile Blitting */ #endif union { char __iomem *screen_base; /* Virtual address */ char *screen_buffer; }; unsigned long screen_size; /* Amount of ioremapped VRAM or 0 */ void *pseudo_palette; /* Fake palette of 16 colors */ #define FBINFO_STATE_RUNNING 0 #define FBINFO_STATE_SUSPENDED 1 u32 state; /* Hardware state i.e suspend */ void *fbcon_par; /* fbcon use-only private area */ /* From here on everything is device dependent */ void *par; /* we need the PCI or similar aperture base/size not smem_start/size as smem_start may just be an object allocated inside the aperture so may not actually overlap */ struct apertures_struct { unsigned int count; struct aperture { resource_size_t base; resource_size_t size; } ranges[0]; } *apertures; bool skip_vt_switch; /* no VT switch on suspend/resume required */ bool forced_out; /* set when being removed by another driver */ }; static inline struct apertures_struct *alloc_apertures(unsigned int max_num) { struct apertures_struct *a; a = kzalloc(struct_size(a, ranges, max_num), GFP_KERNEL); if (!a) return NULL; a->count = max_num; return a; } #define FBINFO_FLAG_DEFAULT FBINFO_DEFAULT /* This will go away * fbset currently hacks in FB_ACCELF_TEXT into var.accel_flags * when it wants to turn the acceleration engine on. This is * really a separate operation, and should be modified via sysfs. * But for now, we leave it broken with the following define */ #define STUPID_ACCELF_TEXT_SHIT // This will go away #if defined(__sparc__) /* We map all of our framebuffers such that big-endian accesses * are what we want, so the following is sufficient. */ // This will go away #define fb_readb sbus_readb #define fb_readw sbus_readw #define fb_readl sbus_readl #define fb_readq sbus_readq #define fb_writeb sbus_writeb #define fb_writew sbus_writew #define fb_writel sbus_writel #define fb_writeq sbus_writeq #define fb_memset sbus_memset_io #define fb_memcpy_fromfb sbus_memcpy_fromio #define fb_memcpy_tofb sbus_memcpy_toio #elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || \ defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || \ defined(__arm__) || defined(__aarch64__) #define fb_readb __raw_readb #define fb_readw __raw_readw #define fb_readl __raw_readl #define fb_readq __raw_readq #define fb_writeb __raw_writeb #define fb_writew __raw_writew #define fb_writel __raw_writel #define fb_writeq __raw_writeq #define fb_memset memset_io #define fb_memcpy_fromfb memcpy_fromio #define fb_memcpy_tofb memcpy_toio #else #define fb_readb(addr) (*(volatile u8 *) (addr)) #define fb_readw(addr) (*(volatile u16 *) (addr)) #define fb_readl(addr) (*(volatile u32 *) (addr)) #define fb_readq(addr) (*(volatile u64 *) (addr)) #define fb_writeb(b,addr) (*(volatile u8 *) (addr) = (b)) #define fb_writew(b,addr) (*(volatile u16 *) (addr) = (b)) #define fb_writel(b,addr) (*(volatile u32 *) (addr) = (b)) #define fb_writeq(b,addr) (*(volatile u64 *) (addr) = (b)) #define fb_memset memset #define fb_memcpy_fromfb memcpy #define fb_memcpy_tofb memcpy #endif #define FB_LEFT_POS(p, bpp) (fb_be_math(p) ? (32 - (bpp)) : 0) #define FB_SHIFT_HIGH(p, val, bits) (fb_be_math(p) ? (val) >> (bits) : \ (val) << (bits)) #define FB_SHIFT_LOW(p, val, bits) (fb_be_math(p) ? (val) << (bits) : \ (val) >> (bits)) /* * `Generic' versions of the frame buffer device operations */ extern int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var); extern int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var); extern int fb_blank(struct fb_info *info, int blank); extern void cfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect); extern void cfb_copyarea(struct fb_info *info, const struct fb_copyarea *area); extern void cfb_imageblit(struct fb_info *info, const struct fb_image *image); /* * Drawing operations where framebuffer is in system RAM */ extern void sys_fillrect(struct fb_info *info, const struct fb_fillrect *rect); extern void sys_copyarea(struct fb_info *info, const struct fb_copyarea *area); extern void sys_imageblit(struct fb_info *info, const struct fb_image *image); extern ssize_t fb_sys_read(struct fb_info *info, char __user *buf, size_t count, loff_t *ppos); extern ssize_t fb_sys_write(struct fb_info *info, const char __user *buf, size_t count, loff_t *ppos); /* drivers/video/fbmem.c */ extern int register_framebuffer(struct fb_info *fb_info); extern void unregister_framebuffer(struct fb_info *fb_info); extern int remove_conflicting_pci_framebuffers(struct pci_dev *pdev, const char *name); extern int remove_conflicting_framebuffers(struct apertures_struct *a, const char *name, bool primary); extern bool is_firmware_framebuffer(struct apertures_struct *a); extern int fb_prepare_logo(struct fb_info *fb_info, int rotate); extern int fb_show_logo(struct fb_info *fb_info, int rotate); extern char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size); extern void fb_pad_unaligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 idx, u32 height, u32 shift_high, u32 shift_low, u32 mod); extern void fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch, u32 height); extern void fb_set_suspend(struct fb_info *info, int state); extern int fb_get_color_depth(struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix); extern int fb_get_options(const char *name, char **option); extern int fb_new_modelist(struct fb_info *info); extern struct fb_info *registered_fb[FB_MAX]; extern int num_registered_fb; extern bool fb_center_logo; extern int fb_logo_count; extern struct class *fb_class; #define for_each_registered_fb(i) \ for (i = 0; i < FB_MAX; i++) \ if (!registered_fb[i]) {} else static inline void lock_fb_info(struct fb_info *info) { mutex_lock(&info->lock); } static inline void unlock_fb_info(struct fb_info *info) { mutex_unlock(&info->lock); } static inline void __fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch, u32 height) { u32 i, j; d_pitch -= s_pitch; for (i = height; i--; ) { /* s_pitch is a few bytes at the most, memcpy is suboptimal */ for (j = 0; j < s_pitch; j++) *dst++ = *src++; dst += d_pitch; } } /* drivers/video/fb_defio.c */ int fb_deferred_io_mmap(struct fb_info *info, struct vm_area_struct *vma); extern int fb_deferred_io_init(struct fb_info *info); extern void fb_deferred_io_open(struct fb_info *info, struct inode *inode, struct file *file); extern void fb_deferred_io_release(struct fb_info *info); extern void fb_deferred_io_cleanup(struct fb_info *info); extern int fb_deferred_io_fsync(struct file *file, loff_t start, loff_t end, int datasync); static inline bool fb_be_math(struct fb_info *info) { #ifdef CONFIG_FB_FOREIGN_ENDIAN #if defined(CONFIG_FB_BOTH_ENDIAN) return info->flags & FBINFO_BE_MATH; #elif defined(CONFIG_FB_BIG_ENDIAN) return true; #elif defined(CONFIG_FB_LITTLE_ENDIAN) return false; #endif /* CONFIG_FB_BOTH_ENDIAN */ #else #ifdef __BIG_ENDIAN return true; #else return false; #endif /* __BIG_ENDIAN */ #endif /* CONFIG_FB_FOREIGN_ENDIAN */ } /* drivers/video/fbsysfs.c */ extern struct fb_info *framebuffer_alloc(size_t size, struct device *dev); extern void framebuffer_release(struct fb_info *info); extern int fb_init_device(struct fb_info *fb_info); extern void fb_cleanup_device(struct fb_info *head); extern void fb_bl_default_curve(struct fb_info *fb_info, u8 off, u8 min, u8 max); /* drivers/video/fbmon.c */ #define FB_MAXTIMINGS 0 #define FB_VSYNCTIMINGS 1 #define FB_HSYNCTIMINGS 2 #define FB_DCLKTIMINGS 3 #define FB_IGNOREMON 0x100 #define FB_MODE_IS_UNKNOWN 0 #define FB_MODE_IS_DETAILED 1 #define FB_MODE_IS_STANDARD 2 #define FB_MODE_IS_VESA 4 #define FB_MODE_IS_CALCULATED 8 #define FB_MODE_IS_FIRST 16 #define FB_MODE_IS_FROM_VAR 32 extern int fbmon_dpms(const struct fb_info *fb_info); extern int fb_get_mode(int flags, u32 val, struct fb_var_screeninfo *var, struct fb_info *info); extern int fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info); extern int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var); extern const unsigned char *fb_firmware_edid(struct device *device); extern void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs); extern void fb_destroy_modedb(struct fb_videomode *modedb); extern int fb_find_mode_cvt(struct fb_videomode *mode, int margins, int rb); extern unsigned char *fb_ddc_read(struct i2c_adapter *adapter); extern int of_get_fb_videomode(struct device_node *np, struct fb_videomode *fb, int index); extern int fb_videomode_from_videomode(const struct videomode *vm, struct fb_videomode *fbmode); /* drivers/video/modedb.c */ #define VESA_MODEDB_SIZE 43 #define DMT_SIZE 0x50 extern void fb_var_to_videomode(struct fb_videomode *mode, const struct fb_var_screeninfo *var); extern void fb_videomode_to_var(struct fb_var_screeninfo *var, const struct fb_videomode *mode); extern int fb_mode_is_equal(const struct fb_videomode *mode1, const struct fb_videomode *mode2); extern int fb_add_videomode(const struct fb_videomode *mode, struct list_head *head); extern void fb_delete_videomode(const struct fb_videomode *mode, struct list_head *head); extern const struct fb_videomode *fb_match_mode(const struct fb_var_screeninfo *var, struct list_head *head); extern const struct fb_videomode *fb_find_best_mode(const struct fb_var_screeninfo *var, struct list_head *head); extern const struct fb_videomode *fb_find_nearest_mode(const struct fb_videomode *mode, struct list_head *head); extern void fb_destroy_modelist(struct list_head *head); extern void fb_videomode_to_modelist(const struct fb_videomode *modedb, int num, struct list_head *head); extern const struct fb_videomode *fb_find_best_display(const struct fb_monspecs *specs, struct list_head *head); /* drivers/video/fbcmap.c */ extern int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp); extern int fb_alloc_cmap_gfp(struct fb_cmap *cmap, int len, int transp, gfp_t flags); extern void fb_dealloc_cmap(struct fb_cmap *cmap); extern int fb_copy_cmap(const struct fb_cmap *from, struct fb_cmap *to); extern int fb_cmap_to_user(const struct fb_cmap *from, struct fb_cmap_user *to); extern int fb_set_cmap(struct fb_cmap *cmap, struct fb_info *fb_info); extern int fb_set_user_cmap(struct fb_cmap_user *cmap, struct fb_info *fb_info); extern const struct fb_cmap *fb_default_cmap(int len); extern void fb_invert_cmaps(void); struct fb_videomode { const char *name; /* optional */ u32 refresh; /* optional */ u32 xres; u32 yres; u32 pixclock; u32 left_margin; u32 right_margin; u32 upper_margin; u32 lower_margin; u32 hsync_len; u32 vsync_len; u32 sync; u32 vmode; u32 flag; }; struct dmt_videomode { u32 dmt_id; u32 std_2byte_code; u32 cvt_3byte_code; const struct fb_videomode *mode; }; extern const char *fb_mode_option; extern const struct fb_videomode vesa_modes[]; extern const struct dmt_videomode dmt_modes[]; struct fb_modelist { struct list_head list; struct fb_videomode mode; }; extern int fb_find_mode(struct fb_var_screeninfo *var, struct fb_info *info, const char *mode_option, const struct fb_videomode *db, unsigned int dbsize, const struct fb_videomode *default_mode, unsigned int default_bpp); /* Convenience logging macros */ #define fb_err(fb_info, fmt, ...) \ pr_err("fb%d: " fmt, (fb_info)->node, ##__VA_ARGS__) #define fb_notice(info, fmt, ...) \ pr_notice("fb%d: " fmt, (fb_info)->node, ##__VA_ARGS__) #define fb_warn(fb_info, fmt, ...) \ pr_warn("fb%d: " fmt, (fb_info)->node, ##__VA_ARGS__) #define fb_info(fb_info, fmt, ...) \ pr_info("fb%d: " fmt, (fb_info)->node, ##__VA_ARGS__) #define fb_dbg(fb_info, fmt, ...) \ pr_debug("fb%d: " fmt, (fb_info)->node, ##__VA_ARGS__) #endif /* _LINUX_FB_H */ PK ! ��P�o o ptp_pch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * PTP PCH * * Copyright 2019 Linaro Ltd. * * Author Lee Jones <lee.jones@linaro.org> */ #ifndef _PTP_PCH_H_ #define _PTP_PCH_H_ void pch_ch_control_write(struct pci_dev *pdev, u32 val); u32 pch_ch_event_read(struct pci_dev *pdev); void pch_ch_event_write(struct pci_dev *pdev, u32 val); u32 pch_src_uuid_lo_read(struct pci_dev *pdev); u32 pch_src_uuid_hi_read(struct pci_dev *pdev); u64 pch_rx_snap_read(struct pci_dev *pdev); u64 pch_tx_snap_read(struct pci_dev *pdev); int pch_set_station_address(u8 *addr, struct pci_dev *pdev); #endif /* _PTP_PCH_H_ */ PK ! �/��b b crc32poly.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CRC32_POLY_H #define _LINUX_CRC32_POLY_H /* * There are multiple 16-bit CRC polynomials in common use, but this is * *the* standard CRC-32 polynomial, first popularized by Ethernet. * x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x^1+x^0 */ #define CRC32_POLY_LE 0xedb88320 #define CRC32_POLY_BE 0x04c11db7 /* * This is the CRC32c polynomial, as outlined by Castagnoli. * x^32+x^28+x^27+x^26+x^25+x^23+x^22+x^20+x^19+x^18+x^14+x^13+x^11+x^10+x^9+ * x^8+x^6+x^0 */ #define CRC32C_POLY_LE 0x82F63B78 #endif /* _LINUX_CRC32_POLY_H */ PK ! u�Q�$; $; vmstat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VMSTAT_H #define _LINUX_VMSTAT_H #include <linux/types.h> #include <linux/percpu.h> #include <linux/mmzone.h> #include <linux/vm_event_item.h> #include <linux/atomic.h> #include <linux/static_key.h> #include <linux/mmdebug.h> extern int sysctl_stat_interval; #ifdef CONFIG_NUMA #define ENABLE_NUMA_STAT 1 #define DISABLE_NUMA_STAT 0 extern int sysctl_vm_numa_stat; DECLARE_STATIC_KEY_TRUE(vm_numa_stat_key); int sysctl_vm_numa_stat_handler(struct ctl_table *table, int write, void *buffer, size_t *length, loff_t *ppos); #endif struct reclaim_stat { unsigned nr_dirty; unsigned nr_unqueued_dirty; unsigned nr_congested; unsigned nr_writeback; unsigned nr_immediate; unsigned nr_pageout; unsigned nr_activate[ANON_AND_FILE]; unsigned nr_ref_keep; unsigned nr_unmap_fail; unsigned nr_lazyfree_fail; }; enum writeback_stat_item { NR_DIRTY_THRESHOLD, NR_DIRTY_BG_THRESHOLD, NR_VM_WRITEBACK_STAT_ITEMS, }; #ifdef CONFIG_VM_EVENT_COUNTERS /* * Light weight per cpu counter implementation. * * Counters should only be incremented and no critical kernel component * should rely on the counter values. * * Counters are handled completely inline. On many platforms the code * generated will simply be the increment of a global address. */ struct vm_event_state { unsigned long event[NR_VM_EVENT_ITEMS]; }; DECLARE_PER_CPU(struct vm_event_state, vm_event_states); /* * vm counters are allowed to be racy. Use raw_cpu_ops to avoid the * local_irq_disable overhead. */ static inline void __count_vm_event(enum vm_event_item item) { raw_cpu_inc(vm_event_states.event[item]); } static inline void count_vm_event(enum vm_event_item item) { this_cpu_inc(vm_event_states.event[item]); } static inline void __count_vm_events(enum vm_event_item item, long delta) { raw_cpu_add(vm_event_states.event[item], delta); } static inline void count_vm_events(enum vm_event_item item, long delta) { this_cpu_add(vm_event_states.event[item], delta); } extern void all_vm_events(unsigned long *); extern void vm_events_fold_cpu(int cpu); #else /* Disable counters */ static inline void count_vm_event(enum vm_event_item item) { } static inline void count_vm_events(enum vm_event_item item, long delta) { } static inline void __count_vm_event(enum vm_event_item item) { } static inline void __count_vm_events(enum vm_event_item item, long delta) { } static inline void all_vm_events(unsigned long *ret) { } static inline void vm_events_fold_cpu(int cpu) { } #endif /* CONFIG_VM_EVENT_COUNTERS */ #ifdef CONFIG_NUMA_BALANCING #define count_vm_numa_event(x) count_vm_event(x) #define count_vm_numa_events(x, y) count_vm_events(x, y) #else #define count_vm_numa_event(x) do {} while (0) #define count_vm_numa_events(x, y) do { (void)(y); } while (0) #endif /* CONFIG_NUMA_BALANCING */ #ifdef CONFIG_DEBUG_TLBFLUSH #define count_vm_tlb_event(x) count_vm_event(x) #define count_vm_tlb_events(x, y) count_vm_events(x, y) #else #define count_vm_tlb_event(x) do {} while (0) #define count_vm_tlb_events(x, y) do { (void)(y); } while (0) #endif #ifdef CONFIG_DEBUG_VM_VMACACHE #define count_vm_vmacache_event(x) count_vm_event(x) #else #define count_vm_vmacache_event(x) do {} while (0) #endif #define __count_zid_vm_events(item, zid, delta) \ __count_vm_events(item##_NORMAL - ZONE_NORMAL + zid, delta) /* * Zone and node-based page accounting with per cpu differentials. */ extern atomic_long_t vm_zone_stat[NR_VM_ZONE_STAT_ITEMS]; extern atomic_long_t vm_node_stat[NR_VM_NODE_STAT_ITEMS]; extern atomic_long_t vm_numa_event[NR_VM_NUMA_EVENT_ITEMS]; #ifdef CONFIG_NUMA static inline void zone_numa_event_add(long x, struct zone *zone, enum numa_stat_item item) { atomic_long_add(x, &zone->vm_numa_event[item]); atomic_long_add(x, &vm_numa_event[item]); } static inline unsigned long zone_numa_event_state(struct zone *zone, enum numa_stat_item item) { return atomic_long_read(&zone->vm_numa_event[item]); } static inline unsigned long global_numa_event_state(enum numa_stat_item item) { return atomic_long_read(&vm_numa_event[item]); } #endif /* CONFIG_NUMA */ static inline void zone_page_state_add(long x, struct zone *zone, enum zone_stat_item item) { atomic_long_add(x, &zone->vm_stat[item]); atomic_long_add(x, &vm_zone_stat[item]); } static inline void node_page_state_add(long x, struct pglist_data *pgdat, enum node_stat_item item) { atomic_long_add(x, &pgdat->vm_stat[item]); atomic_long_add(x, &vm_node_stat[item]); } static inline unsigned long global_zone_page_state(enum zone_stat_item item) { long x = atomic_long_read(&vm_zone_stat[item]); #ifdef CONFIG_SMP if (x < 0) x = 0; #endif return x; } static inline unsigned long global_node_page_state_pages(enum node_stat_item item) { long x = atomic_long_read(&vm_node_stat[item]); #ifdef CONFIG_SMP if (x < 0) x = 0; #endif return x; } static inline unsigned long global_node_page_state(enum node_stat_item item) { VM_WARN_ON_ONCE(vmstat_item_in_bytes(item)); return global_node_page_state_pages(item); } static inline unsigned long zone_page_state(struct zone *zone, enum zone_stat_item item) { long x = atomic_long_read(&zone->vm_stat[item]); #ifdef CONFIG_SMP if (x < 0) x = 0; #endif return x; } /* * More accurate version that also considers the currently pending * deltas. For that we need to loop over all cpus to find the current * deltas. There is no synchronization so the result cannot be * exactly accurate either. */ static inline unsigned long zone_page_state_snapshot(struct zone *zone, enum zone_stat_item item) { long x = atomic_long_read(&zone->vm_stat[item]); #ifdef CONFIG_SMP int cpu; for_each_online_cpu(cpu) x += per_cpu_ptr(zone->per_cpu_zonestats, cpu)->vm_stat_diff[item]; if (x < 0) x = 0; #endif return x; } #ifdef CONFIG_NUMA /* See __count_vm_event comment on why raw_cpu_inc is used. */ static inline void __count_numa_event(struct zone *zone, enum numa_stat_item item) { struct per_cpu_zonestat __percpu *pzstats = zone->per_cpu_zonestats; raw_cpu_inc(pzstats->vm_numa_event[item]); } static inline void __count_numa_events(struct zone *zone, enum numa_stat_item item, long delta) { struct per_cpu_zonestat __percpu *pzstats = zone->per_cpu_zonestats; raw_cpu_add(pzstats->vm_numa_event[item], delta); } extern unsigned long sum_zone_node_page_state(int node, enum zone_stat_item item); extern unsigned long sum_zone_numa_event_state(int node, enum numa_stat_item item); extern unsigned long node_page_state(struct pglist_data *pgdat, enum node_stat_item item); extern unsigned long node_page_state_pages(struct pglist_data *pgdat, enum node_stat_item item); extern void fold_vm_numa_events(void); #else #define sum_zone_node_page_state(node, item) global_zone_page_state(item) #define node_page_state(node, item) global_node_page_state(item) #define node_page_state_pages(node, item) global_node_page_state_pages(item) static inline void fold_vm_numa_events(void) { } #endif /* CONFIG_NUMA */ #ifdef CONFIG_SMP void __mod_zone_page_state(struct zone *, enum zone_stat_item item, long); void __inc_zone_page_state(struct page *, enum zone_stat_item); void __dec_zone_page_state(struct page *, enum zone_stat_item); void __mod_node_page_state(struct pglist_data *, enum node_stat_item item, long); void __inc_node_page_state(struct page *, enum node_stat_item); void __dec_node_page_state(struct page *, enum node_stat_item); void mod_zone_page_state(struct zone *, enum zone_stat_item, long); void inc_zone_page_state(struct page *, enum zone_stat_item); void dec_zone_page_state(struct page *, enum zone_stat_item); void mod_node_page_state(struct pglist_data *, enum node_stat_item, long); void inc_node_page_state(struct page *, enum node_stat_item); void dec_node_page_state(struct page *, enum node_stat_item); extern void inc_node_state(struct pglist_data *, enum node_stat_item); extern void __inc_zone_state(struct zone *, enum zone_stat_item); extern void __inc_node_state(struct pglist_data *, enum node_stat_item); extern void dec_zone_state(struct zone *, enum zone_stat_item); extern void __dec_zone_state(struct zone *, enum zone_stat_item); extern void __dec_node_state(struct pglist_data *, enum node_stat_item); void quiet_vmstat(void); void cpu_vm_stats_fold(int cpu); void refresh_zone_stat_thresholds(void); struct ctl_table; int vmstat_refresh(struct ctl_table *, int write, void *buffer, size_t *lenp, loff_t *ppos); void drain_zonestat(struct zone *zone, struct per_cpu_zonestat *); int calculate_pressure_threshold(struct zone *zone); int calculate_normal_threshold(struct zone *zone); void set_pgdat_percpu_threshold(pg_data_t *pgdat, int (*calculate_pressure)(struct zone *)); #else /* CONFIG_SMP */ /* * We do not maintain differentials in a single processor configuration. * The functions directly modify the zone and global counters. */ static inline void __mod_zone_page_state(struct zone *zone, enum zone_stat_item item, long delta) { zone_page_state_add(delta, zone, item); } static inline void __mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, int delta) { if (vmstat_item_in_bytes(item)) { /* * Only cgroups use subpage accounting right now; at * the global level, these items still change in * multiples of whole pages. Store them as pages * internally to keep the per-cpu counters compact. */ VM_WARN_ON_ONCE(delta & (PAGE_SIZE - 1)); delta >>= PAGE_SHIFT; } node_page_state_add(delta, pgdat, item); } static inline void __inc_zone_state(struct zone *zone, enum zone_stat_item item) { atomic_long_inc(&zone->vm_stat[item]); atomic_long_inc(&vm_zone_stat[item]); } static inline void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) { atomic_long_inc(&pgdat->vm_stat[item]); atomic_long_inc(&vm_node_stat[item]); } static inline void __dec_zone_state(struct zone *zone, enum zone_stat_item item) { atomic_long_dec(&zone->vm_stat[item]); atomic_long_dec(&vm_zone_stat[item]); } static inline void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) { atomic_long_dec(&pgdat->vm_stat[item]); atomic_long_dec(&vm_node_stat[item]); } static inline void __inc_zone_page_state(struct page *page, enum zone_stat_item item) { __inc_zone_state(page_zone(page), item); } static inline void __inc_node_page_state(struct page *page, enum node_stat_item item) { __inc_node_state(page_pgdat(page), item); } static inline void __dec_zone_page_state(struct page *page, enum zone_stat_item item) { __dec_zone_state(page_zone(page), item); } static inline void __dec_node_page_state(struct page *page, enum node_stat_item item) { __dec_node_state(page_pgdat(page), item); } /* * We only use atomic operations to update counters. So there is no need to * disable interrupts. */ #define inc_zone_page_state __inc_zone_page_state #define dec_zone_page_state __dec_zone_page_state #define mod_zone_page_state __mod_zone_page_state #define inc_node_page_state __inc_node_page_state #define dec_node_page_state __dec_node_page_state #define mod_node_page_state __mod_node_page_state #define inc_zone_state __inc_zone_state #define inc_node_state __inc_node_state #define dec_zone_state __dec_zone_state #define set_pgdat_percpu_threshold(pgdat, callback) { } static inline void refresh_zone_stat_thresholds(void) { } static inline void cpu_vm_stats_fold(int cpu) { } static inline void quiet_vmstat(void) { } static inline void drain_zonestat(struct zone *zone, struct per_cpu_zonestat *pzstats) { } #endif /* CONFIG_SMP */ static inline void __mod_zone_freepage_state(struct zone *zone, int nr_pages, int migratetype) { __mod_zone_page_state(zone, NR_FREE_PAGES, nr_pages); if (is_migrate_cma(migratetype)) __mod_zone_page_state(zone, NR_FREE_CMA_PAGES, nr_pages); } extern const char * const vmstat_text[]; static inline const char *zone_stat_name(enum zone_stat_item item) { return vmstat_text[item]; } #ifdef CONFIG_NUMA static inline const char *numa_stat_name(enum numa_stat_item item) { return vmstat_text[NR_VM_ZONE_STAT_ITEMS + item]; } #endif /* CONFIG_NUMA */ static inline const char *node_stat_name(enum node_stat_item item) { return vmstat_text[NR_VM_ZONE_STAT_ITEMS + NR_VM_NUMA_EVENT_ITEMS + item]; } static inline const char *lru_list_name(enum lru_list lru) { return node_stat_name(NR_LRU_BASE + (enum node_stat_item)lru) + 3; // skip "nr_" } static inline const char *writeback_stat_name(enum writeback_stat_item item) { return vmstat_text[NR_VM_ZONE_STAT_ITEMS + NR_VM_NUMA_EVENT_ITEMS + NR_VM_NODE_STAT_ITEMS + item]; } #if defined(CONFIG_VM_EVENT_COUNTERS) || defined(CONFIG_MEMCG) static inline const char *vm_event_name(enum vm_event_item item) { return vmstat_text[NR_VM_ZONE_STAT_ITEMS + NR_VM_NUMA_EVENT_ITEMS + NR_VM_NODE_STAT_ITEMS + NR_VM_WRITEBACK_STAT_ITEMS + item]; } #endif /* CONFIG_VM_EVENT_COUNTERS || CONFIG_MEMCG */ #ifdef CONFIG_MEMCG void __mod_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val); static inline void mod_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val) { unsigned long flags; local_irq_save(flags); __mod_lruvec_state(lruvec, idx, val); local_irq_restore(flags); } void __mod_lruvec_page_state(struct page *page, enum node_stat_item idx, int val); static inline void mod_lruvec_page_state(struct page *page, enum node_stat_item idx, int val) { unsigned long flags; local_irq_save(flags); __mod_lruvec_page_state(page, idx, val); local_irq_restore(flags); } #else static inline void __mod_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val) { __mod_node_page_state(lruvec_pgdat(lruvec), idx, val); } static inline void mod_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val) { mod_node_page_state(lruvec_pgdat(lruvec), idx, val); } static inline void __mod_lruvec_page_state(struct page *page, enum node_stat_item idx, int val) { __mod_node_page_state(page_pgdat(page), idx, val); } static inline void mod_lruvec_page_state(struct page *page, enum node_stat_item idx, int val) { mod_node_page_state(page_pgdat(page), idx, val); } #endif /* CONFIG_MEMCG */ static inline void inc_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx) { mod_lruvec_state(lruvec, idx, 1); } static inline void __inc_lruvec_page_state(struct page *page, enum node_stat_item idx) { __mod_lruvec_page_state(page, idx, 1); } static inline void __dec_lruvec_page_state(struct page *page, enum node_stat_item idx) { __mod_lruvec_page_state(page, idx, -1); } static inline void inc_lruvec_page_state(struct page *page, enum node_stat_item idx) { mod_lruvec_page_state(page, idx, 1); } static inline void dec_lruvec_page_state(struct page *page, enum node_stat_item idx) { mod_lruvec_page_state(page, idx, -1); } #endif /* _LINUX_VMSTAT_H */ PK ! ��:� tty_buffer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TTY_BUFFER_H #define _LINUX_TTY_BUFFER_H #include <linux/atomic.h> #include <linux/llist.h> #include <linux/mutex.h> #include <linux/workqueue.h> struct tty_buffer { union { struct tty_buffer *next; struct llist_node free; }; int used; int size; int commit; int read; int flags; /* Data points here */ unsigned long data[]; }; /* Values for .flags field of tty_buffer */ #define TTYB_NORMAL 1 /* buffer has no flags buffer */ static inline unsigned char *char_buf_ptr(struct tty_buffer *b, int ofs) { return ((unsigned char *)b->data) + ofs; } static inline char *flag_buf_ptr(struct tty_buffer *b, int ofs) { return (char *)char_buf_ptr(b, ofs) + b->size; } struct tty_bufhead { struct tty_buffer *head; /* Queue head */ struct work_struct work; struct mutex lock; atomic_t priority; struct tty_buffer sentinel; struct llist_head free; /* Free queue head */ atomic_t mem_used; /* In-use buffers excluding free list */ int mem_limit; struct tty_buffer *tail; /* Active buffer */ }; /* * When a break, frame error, or parity error happens, these codes are * stuffed into the flags buffer. */ #define TTY_NORMAL 0 #define TTY_BREAK 1 #define TTY_FRAME 2 #define TTY_PARITY 3 #define TTY_OVERRUN 4 #endif PK ! �v�Z Z sort.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SORT_H #define _LINUX_SORT_H #include <linux/types.h> void sort_r(void *base, size_t num, size_t size, cmp_r_func_t cmp_func, swap_func_t swap_func, const void *priv); void sort(void *base, size_t num, size_t size, cmp_func_t cmp_func, swap_func_t swap_func); #endif PK ! $�!5� � ksm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_KSM_H #define __LINUX_KSM_H /* * Memory merging support. * * This code enables dynamic sharing of identical pages found in different * memory areas, even if they are not shared by fork(). */ #include <linux/bitops.h> #include <linux/mm.h> #include <linux/pagemap.h> #include <linux/rmap.h> #include <linux/sched.h> #include <linux/sched/coredump.h> struct stable_node; struct mem_cgroup; #ifdef CONFIG_KSM int ksm_madvise(struct vm_area_struct *vma, unsigned long start, unsigned long end, int advice, unsigned long *vm_flags); int __ksm_enter(struct mm_struct *mm); void __ksm_exit(struct mm_struct *mm); static inline int ksm_fork(struct mm_struct *mm, struct mm_struct *oldmm) { if (test_bit(MMF_VM_MERGEABLE, &oldmm->flags)) return __ksm_enter(mm); return 0; } static inline void ksm_exit(struct mm_struct *mm) { if (test_bit(MMF_VM_MERGEABLE, &mm->flags)) __ksm_exit(mm); } /* * When do_swap_page() first faults in from swap what used to be a KSM page, * no problem, it will be assigned to this vma's anon_vma; but thereafter, * it might be faulted into a different anon_vma (or perhaps to a different * offset in the same anon_vma). do_swap_page() cannot do all the locking * needed to reconstitute a cross-anon_vma KSM page: for now it has to make * a copy, and leave remerging the pages to a later pass of ksmd. * * We'd like to make this conditional on vma->vm_flags & VM_MERGEABLE, * but what if the vma was unmerged while the page was swapped out? */ struct page *ksm_might_need_to_copy(struct page *page, struct vm_area_struct *vma, unsigned long address); void rmap_walk_ksm(struct page *page, struct rmap_walk_control *rwc); void ksm_migrate_page(struct page *newpage, struct page *oldpage); #else /* !CONFIG_KSM */ static inline int ksm_fork(struct mm_struct *mm, struct mm_struct *oldmm) { return 0; } static inline void ksm_exit(struct mm_struct *mm) { } #ifdef CONFIG_MMU static inline int ksm_madvise(struct vm_area_struct *vma, unsigned long start, unsigned long end, int advice, unsigned long *vm_flags) { return 0; } static inline struct page *ksm_might_need_to_copy(struct page *page, struct vm_area_struct *vma, unsigned long address) { return page; } static inline void rmap_walk_ksm(struct page *page, struct rmap_walk_control *rwc) { } static inline void ksm_migrate_page(struct page *newpage, struct page *oldpage) { } #endif /* CONFIG_MMU */ #endif /* !CONFIG_KSM */ #endif /* __LINUX_KSM_H */ PK ! ?�DNg$ g$ uio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Berkeley style UIO structures - Alan Cox 1994. */ #ifndef __LINUX_UIO_H #define __LINUX_UIO_H #include <linux/kernel.h> #include <linux/thread_info.h> #include <uapi/linux/uio.h> struct page; struct pipe_inode_info; struct kvec { void *iov_base; /* and that should *never* hold a userland pointer */ size_t iov_len; }; enum iter_type { /* iter types */ ITER_IOVEC, ITER_KVEC, ITER_BVEC, ITER_PIPE, ITER_XARRAY, ITER_DISCARD, }; struct iov_iter_state { size_t iov_offset; size_t count; unsigned long nr_segs; }; struct iov_iter { u8 iter_type; bool nofault; bool data_source; size_t iov_offset; size_t count; union { const struct iovec *iov; const struct kvec *kvec; const struct bio_vec *bvec; struct xarray *xarray; struct pipe_inode_info *pipe; }; union { unsigned long nr_segs; struct { unsigned int head; unsigned int start_head; }; loff_t xarray_start; }; }; static inline enum iter_type iov_iter_type(const struct iov_iter *i) { return i->iter_type; } static inline void iov_iter_save_state(struct iov_iter *iter, struct iov_iter_state *state) { state->iov_offset = iter->iov_offset; state->count = iter->count; state->nr_segs = iter->nr_segs; } static inline bool iter_is_iovec(const struct iov_iter *i) { return iov_iter_type(i) == ITER_IOVEC; } static inline bool iov_iter_is_kvec(const struct iov_iter *i) { return iov_iter_type(i) == ITER_KVEC; } static inline bool iov_iter_is_bvec(const struct iov_iter *i) { return iov_iter_type(i) == ITER_BVEC; } static inline bool iov_iter_is_pipe(const struct iov_iter *i) { return iov_iter_type(i) == ITER_PIPE; } static inline bool iov_iter_is_discard(const struct iov_iter *i) { return iov_iter_type(i) == ITER_DISCARD; } static inline bool iov_iter_is_xarray(const struct iov_iter *i) { return iov_iter_type(i) == ITER_XARRAY; } static inline unsigned char iov_iter_rw(const struct iov_iter *i) { return i->data_source ? WRITE : READ; } /* * Total number of bytes covered by an iovec. * * NOTE that it is not safe to use this function until all the iovec's * segment lengths have been validated. Because the individual lengths can * overflow a size_t when added together. */ static inline size_t iov_length(const struct iovec *iov, unsigned long nr_segs) { unsigned long seg; size_t ret = 0; for (seg = 0; seg < nr_segs; seg++) ret += iov[seg].iov_len; return ret; } static inline struct iovec iov_iter_iovec(const struct iov_iter *iter) { return (struct iovec) { .iov_base = iter->iov->iov_base + iter->iov_offset, .iov_len = min(iter->count, iter->iov->iov_len - iter->iov_offset), }; } size_t copy_page_from_iter_atomic(struct page *page, unsigned offset, size_t bytes, struct iov_iter *i); void iov_iter_advance(struct iov_iter *i, size_t bytes); void iov_iter_revert(struct iov_iter *i, size_t bytes); size_t fault_in_iov_iter_readable(const struct iov_iter *i, size_t bytes); size_t fault_in_iov_iter_writeable(const struct iov_iter *i, size_t bytes); size_t iov_iter_single_seg_count(const struct iov_iter *i); size_t copy_page_to_iter(struct page *page, size_t offset, size_t bytes, struct iov_iter *i); size_t copy_page_from_iter(struct page *page, size_t offset, size_t bytes, struct iov_iter *i); size_t _copy_to_iter(const void *addr, size_t bytes, struct iov_iter *i); size_t _copy_from_iter(void *addr, size_t bytes, struct iov_iter *i); size_t _copy_from_iter_nocache(void *addr, size_t bytes, struct iov_iter *i); static __always_inline __must_check size_t copy_to_iter(const void *addr, size_t bytes, struct iov_iter *i) { if (unlikely(!check_copy_size(addr, bytes, true))) return 0; else return _copy_to_iter(addr, bytes, i); } static __always_inline __must_check size_t copy_from_iter(void *addr, size_t bytes, struct iov_iter *i) { if (unlikely(!check_copy_size(addr, bytes, false))) return 0; else return _copy_from_iter(addr, bytes, i); } static __always_inline __must_check bool copy_from_iter_full(void *addr, size_t bytes, struct iov_iter *i) { size_t copied = copy_from_iter(addr, bytes, i); if (likely(copied == bytes)) return true; iov_iter_revert(i, copied); return false; } static __always_inline __must_check size_t copy_from_iter_nocache(void *addr, size_t bytes, struct iov_iter *i) { if (unlikely(!check_copy_size(addr, bytes, false))) return 0; else return _copy_from_iter_nocache(addr, bytes, i); } static __always_inline __must_check bool copy_from_iter_full_nocache(void *addr, size_t bytes, struct iov_iter *i) { size_t copied = copy_from_iter_nocache(addr, bytes, i); if (likely(copied == bytes)) return true; iov_iter_revert(i, copied); return false; } #ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE /* * Note, users like pmem that depend on the stricter semantics of * copy_from_iter_flushcache() than copy_from_iter_nocache() must check for * IS_ENABLED(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) before assuming that the * destination is flushed from the cache on return. */ size_t _copy_from_iter_flushcache(void *addr, size_t bytes, struct iov_iter *i); #else #define _copy_from_iter_flushcache _copy_from_iter_nocache #endif #ifdef CONFIG_ARCH_HAS_COPY_MC size_t _copy_mc_to_iter(const void *addr, size_t bytes, struct iov_iter *i); #else #define _copy_mc_to_iter _copy_to_iter #endif static __always_inline __must_check size_t copy_from_iter_flushcache(void *addr, size_t bytes, struct iov_iter *i) { if (unlikely(!check_copy_size(addr, bytes, false))) return 0; else return _copy_from_iter_flushcache(addr, bytes, i); } static __always_inline __must_check size_t copy_mc_to_iter(void *addr, size_t bytes, struct iov_iter *i) { if (unlikely(!check_copy_size(addr, bytes, true))) return 0; else return _copy_mc_to_iter(addr, bytes, i); } size_t iov_iter_zero(size_t bytes, struct iov_iter *); unsigned long iov_iter_alignment(const struct iov_iter *i); unsigned long iov_iter_gap_alignment(const struct iov_iter *i); void iov_iter_init(struct iov_iter *i, unsigned int direction, const struct iovec *iov, unsigned long nr_segs, size_t count); void iov_iter_kvec(struct iov_iter *i, unsigned int direction, const struct kvec *kvec, unsigned long nr_segs, size_t count); void iov_iter_bvec(struct iov_iter *i, unsigned int direction, const struct bio_vec *bvec, unsigned long nr_segs, size_t count); void iov_iter_pipe(struct iov_iter *i, unsigned int direction, struct pipe_inode_info *pipe, size_t count); void iov_iter_discard(struct iov_iter *i, unsigned int direction, size_t count); void iov_iter_xarray(struct iov_iter *i, unsigned int direction, struct xarray *xarray, loff_t start, size_t count); ssize_t iov_iter_get_pages(struct iov_iter *i, struct page **pages, size_t maxsize, unsigned maxpages, size_t *start); ssize_t iov_iter_get_pages_alloc(struct iov_iter *i, struct page ***pages, size_t maxsize, size_t *start); int iov_iter_npages(const struct iov_iter *i, int maxpages); void iov_iter_restore(struct iov_iter *i, struct iov_iter_state *state); const void *dup_iter(struct iov_iter *new, struct iov_iter *old, gfp_t flags); static inline size_t iov_iter_count(const struct iov_iter *i) { return i->count; } /* * Cap the iov_iter by given limit; note that the second argument is * *not* the new size - it's upper limit for such. Passing it a value * greater than the amount of data in iov_iter is fine - it'll just do * nothing in that case. */ static inline void iov_iter_truncate(struct iov_iter *i, u64 count) { /* * count doesn't have to fit in size_t - comparison extends both * operands to u64 here and any value that would be truncated by * conversion in assignement is by definition greater than all * values of size_t, including old i->count. */ if (i->count > count) i->count = count; } /* * reexpand a previously truncated iterator; count must be no more than how much * we had shrunk it. */ static inline void iov_iter_reexpand(struct iov_iter *i, size_t count) { i->count = count; } struct csum_state { __wsum csum; size_t off; }; size_t csum_and_copy_to_iter(const void *addr, size_t bytes, void *csstate, struct iov_iter *i); size_t csum_and_copy_from_iter(void *addr, size_t bytes, __wsum *csum, struct iov_iter *i); static __always_inline __must_check bool csum_and_copy_from_iter_full(void *addr, size_t bytes, __wsum *csum, struct iov_iter *i) { size_t copied = csum_and_copy_from_iter(addr, bytes, csum, i); if (likely(copied == bytes)) return true; iov_iter_revert(i, copied); return false; } size_t hash_and_copy_to_iter(const void *addr, size_t bytes, void *hashp, struct iov_iter *i); struct iovec *iovec_from_user(const struct iovec __user *uvector, unsigned long nr_segs, unsigned long fast_segs, struct iovec *fast_iov, bool compat); ssize_t import_iovec(int type, const struct iovec __user *uvec, unsigned nr_segs, unsigned fast_segs, struct iovec **iovp, struct iov_iter *i); ssize_t __import_iovec(int type, const struct iovec __user *uvec, unsigned nr_segs, unsigned fast_segs, struct iovec **iovp, struct iov_iter *i, bool compat); int import_single_range(int type, void __user *buf, size_t len, struct iovec *iov, struct iov_iter *i); #endif PK ! � �* * osq_lock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_OSQ_LOCK_H #define __LINUX_OSQ_LOCK_H /* * An MCS like lock especially tailored for optimistic spinning for sleeping * lock implementations (mutex, rwsem, etc). */ struct optimistic_spin_node { struct optimistic_spin_node *next, *prev; int locked; /* 1 if lock acquired */ int cpu; /* encoded CPU # + 1 value */ }; struct optimistic_spin_queue { /* * Stores an encoded value of the CPU # of the tail node in the queue. * If the queue is empty, then it's set to OSQ_UNLOCKED_VAL. */ atomic_t tail; }; #define OSQ_UNLOCKED_VAL (0) /* Init macro and function. */ #define OSQ_LOCK_UNLOCKED { ATOMIC_INIT(OSQ_UNLOCKED_VAL) } static inline void osq_lock_init(struct optimistic_spin_queue *lock) { atomic_set(&lock->tail, OSQ_UNLOCKED_VAL); } extern bool osq_lock(struct optimistic_spin_queue *lock); extern void osq_unlock(struct optimistic_spin_queue *lock); static inline bool osq_is_locked(struct optimistic_spin_queue *lock) { return atomic_read(&lock->tail) != OSQ_UNLOCKED_VAL; } #endif PK ! ��35 5 edd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/edd.h * Copyright (C) 2002, 2003, 2004 Dell Inc. * by Matt Domsch <Matt_Domsch@dell.com> * * structures and definitions for the int 13h, ax={41,48}h * BIOS Enhanced Disk Drive Services * This is based on the T13 group document D1572 Revision 0 (August 14 2002) * available at http://www.t13.org/docs2002/d1572r0.pdf. It is * very similar to D1484 Revision 3 http://www.t13.org/docs2002/d1484r3.pdf * * In a nutshell, arch/{i386,x86_64}/boot/setup.S populates a scratch * table in the boot_params that contains a list of BIOS-enumerated * boot devices. * In arch/{i386,x86_64}/kernel/setup.c, this information is * transferred into the edd structure, and in drivers/firmware/edd.c, that * information is used to identify BIOS boot disk. The code in setup.S * is very sensitive to the size of these structures. */ #ifndef _LINUX_EDD_H #define _LINUX_EDD_H #include <uapi/linux/edd.h> #ifndef __ASSEMBLY__ extern struct edd edd; #endif /*!__ASSEMBLY__ */ #endif /* _LINUX_EDD_H */ PK ! x�^T- - intel-svm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2015 Intel Corporation. * * Authors: David Woodhouse <David.Woodhouse@intel.com> */ #ifndef __INTEL_SVM_H__ #define __INTEL_SVM_H__ /* Values for rxwp in fault_cb callback */ #define SVM_REQ_READ (1<<3) #define SVM_REQ_WRITE (1<<2) #define SVM_REQ_EXEC (1<<1) #define SVM_REQ_PRIV (1<<0) /* Page Request Queue depth */ #define PRQ_ORDER 2 #define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x20) #define PRQ_DEPTH ((0x1000 << PRQ_ORDER) >> 5) /* * The SVM_FLAG_SUPERVISOR_MODE flag requests a PASID which can be used only * for access to kernel addresses. No IOTLB flushes are automatically done * for kernel mappings; it is valid only for access to the kernel's static * 1:1 mapping of physical memory — not to vmalloc or even module mappings. * A future API addition may permit the use of such ranges, by means of an * explicit IOTLB flush call (akin to the DMA API's unmap method). * * It is unlikely that we will ever hook into flush_tlb_kernel_range() to * do such IOTLB flushes automatically. */ #define SVM_FLAG_SUPERVISOR_MODE BIT(0) /* * The SVM_FLAG_GUEST_MODE flag is used when a PASID bind is for guest * processes. Compared to the host bind, the primary differences are: * 1. mm life cycle management * 2. fault reporting */ #define SVM_FLAG_GUEST_MODE BIT(1) /* * The SVM_FLAG_GUEST_PASID flag is used when a guest has its own PASID space, * which requires guest and host PASID translation at both directions. */ #define SVM_FLAG_GUEST_PASID BIT(2) #endif /* __INTEL_SVM_H__ */ PK ! �>��# �# hid-sensor-hub.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * HID Sensors Driver * Copyright (c) 2012, Intel Corporation. */ #ifndef _HID_SENSORS_HUB_H #define _HID_SENSORS_HUB_H #include <linux/hid.h> #include <linux/hid-sensor-ids.h> #include <linux/iio/iio.h> #include <linux/iio/trigger.h> /** * struct hid_sensor_hub_attribute_info - Attribute info * @usage_id: Parent usage id of a physical device. * @attrib_id: Attribute id for this attribute. * @report_id: Report id in which this information resides. * @index: Field index in the report. * @units: Measurment unit for this attribute. * @unit_expo: Exponent used in the data. * @size: Size in bytes for data size. * @logical_minimum: Logical minimum value for this attribute. * @logical_maximum: Logical maximum value for this attribute. */ struct hid_sensor_hub_attribute_info { u32 usage_id; u32 attrib_id; s32 report_id; s32 index; s32 units; s32 unit_expo; s32 size; s32 logical_minimum; s32 logical_maximum; }; /** * struct sensor_hub_pending - Synchronous read pending information * @status: Pending status true/false. * @ready: Completion synchronization data. * @usage_id: Usage id for physical device, E.g. Gyro usage id. * @attr_usage_id: Usage Id of a field, E.g. X-AXIS for a gyro. * @raw_size: Response size for a read request. * @raw_data: Place holder for received response. */ struct sensor_hub_pending { bool status; struct completion ready; u32 usage_id; u32 attr_usage_id; int raw_size; u8 *raw_data; }; /** * struct hid_sensor_hub_device - Stores the hub instance data * @hdev: Stores the hid instance. * @vendor_id: Vendor id of hub device. * @product_id: Product id of hub device. * @usage: Usage id for this hub device instance. * @start_collection_index: Starting index for a phy type collection * @end_collection_index: Last index for a phy type collection * @mutex_ptr: synchronizing mutex pointer. * @pending: Holds information of pending sync read request. */ struct hid_sensor_hub_device { struct hid_device *hdev; u32 vendor_id; u32 product_id; u32 usage; int start_collection_index; int end_collection_index; struct mutex *mutex_ptr; struct sensor_hub_pending pending; }; /** * struct hid_sensor_hub_callbacks - Client callback functions * @pdev: Platform device instance of the client driver. * @suspend: Suspend callback. * @resume: Resume callback. * @capture_sample: Callback to get a sample. * @send_event: Send notification to indicate all samples are * captured, process and send event */ struct hid_sensor_hub_callbacks { struct platform_device *pdev; int (*suspend)(struct hid_sensor_hub_device *hsdev, void *priv); int (*resume)(struct hid_sensor_hub_device *hsdev, void *priv); int (*capture_sample)(struct hid_sensor_hub_device *hsdev, u32 usage_id, size_t raw_len, char *raw_data, void *priv); int (*send_event)(struct hid_sensor_hub_device *hsdev, u32 usage_id, void *priv); }; /** * sensor_hub_device_open() - Open hub device * @hsdev: Hub device instance. * * Used to open hid device for sensor hub. */ int sensor_hub_device_open(struct hid_sensor_hub_device *hsdev); /** * sensor_hub_device_clode() - Close hub device * @hsdev: Hub device instance. * * Used to clode hid device for sensor hub. */ void sensor_hub_device_close(struct hid_sensor_hub_device *hsdev); /* Registration functions */ /** * sensor_hub_register_callback() - Register client callbacks * @hsdev: Hub device instance. * @usage_id: Usage id of the client (E.g. 0x200076 for Gyro). * @usage_callback: Callback function storage * * Used to register callbacks by client processing drivers. Sensor * hub core driver will call these callbacks to offload processing * of data streams and notifications. */ int sensor_hub_register_callback(struct hid_sensor_hub_device *hsdev, u32 usage_id, struct hid_sensor_hub_callbacks *usage_callback); /** * sensor_hub_remove_callback() - Remove client callbacks * @hsdev: Hub device instance. * @usage_id: Usage id of the client (E.g. 0x200076 for Gyro). * * If there is a callback registred, this call will remove that * callbacks, so that it will stop data and event notifications. */ int sensor_hub_remove_callback(struct hid_sensor_hub_device *hsdev, u32 usage_id); /* Hid sensor hub core interfaces */ /** * sensor_hub_input_get_attribute_info() - Get an attribute information * @hsdev: Hub device instance. * @type: Type of this attribute, input/output/feature * @usage_id: Attribute usage id of parent physical device as per spec * @attr_usage_id: Attribute usage id as per spec * @info: return information about attribute after parsing report * * Parses report and returns the attribute information such as report id, * field index, units and exponent etc. */ int sensor_hub_input_get_attribute_info(struct hid_sensor_hub_device *hsdev, u8 type, u32 usage_id, u32 attr_usage_id, struct hid_sensor_hub_attribute_info *info); /** * sensor_hub_input_attr_get_raw_value() - Synchronous read request * @hsdev: Hub device instance. * @usage_id: Attribute usage id of parent physical device as per spec * @attr_usage_id: Attribute usage id as per spec * @report_id: Report id to look for * @flag: Synchronous or asynchronous read * @is_signed: If true then fields < 32 bits will be sign-extended * * Issues a synchronous or asynchronous read request for an input attribute. * Return: data up to 32 bits. */ enum sensor_hub_read_flags { SENSOR_HUB_SYNC, SENSOR_HUB_ASYNC, }; int sensor_hub_input_attr_get_raw_value(struct hid_sensor_hub_device *hsdev, u32 usage_id, u32 attr_usage_id, u32 report_id, enum sensor_hub_read_flags flag, bool is_signed ); /** * sensor_hub_set_feature() - Feature set request * @hsdev: Hub device instance. * @report_id: Report id to look for * @field_index: Field index inside a report * @buffer_size: size of the buffer * @buffer: buffer to use in the feature set * * Used to set a field in feature report. For example this can set polling * interval, sensitivity, activate/deactivate state. */ int sensor_hub_set_feature(struct hid_sensor_hub_device *hsdev, u32 report_id, u32 field_index, int buffer_size, void *buffer); /** * sensor_hub_get_feature() - Feature get request * @hsdev: Hub device instance. * @report_id: Report id to look for * @field_index: Field index inside a report * @buffer_size: size of the buffer * @buffer: buffer to copy output * * Used to get a field in feature report. For example this can get polling * interval, sensitivity, activate/deactivate state. * Return: On success, it returns the number of bytes copied to buffer. * On failure, it returns value < 0. */ int sensor_hub_get_feature(struct hid_sensor_hub_device *hsdev, u32 report_id, u32 field_index, int buffer_size, void *buffer); /* hid-sensor-attributes */ /* Common hid sensor iio structure */ struct hid_sensor_common { struct hid_sensor_hub_device *hsdev; struct platform_device *pdev; unsigned usage_id; atomic_t data_ready; atomic_t user_requested_state; atomic_t runtime_pm_enable; int poll_interval; int raw_hystersis; int latency_ms; struct iio_trigger *trigger; int timestamp_ns_scale; struct hid_sensor_hub_attribute_info poll; struct hid_sensor_hub_attribute_info report_state; struct hid_sensor_hub_attribute_info power_state; struct hid_sensor_hub_attribute_info sensitivity; struct hid_sensor_hub_attribute_info sensitivity_rel; struct hid_sensor_hub_attribute_info report_latency; struct work_struct work; }; /* Convert from hid unit expo to regular exponent */ static inline int hid_sensor_convert_exponent(int unit_expo) { if (unit_expo < 0x08) return unit_expo; else if (unit_expo <= 0x0f) return -(0x0f-unit_expo+1); else return 0; } int hid_sensor_parse_common_attributes(struct hid_sensor_hub_device *hsdev, u32 usage_id, struct hid_sensor_common *st, const u32 *sensitivity_addresses, u32 sensitivity_addresses_len); int hid_sensor_write_raw_hyst_value(struct hid_sensor_common *st, int val1, int val2); int hid_sensor_write_raw_hyst_rel_value(struct hid_sensor_common *st, int val1, int val2); int hid_sensor_read_raw_hyst_value(struct hid_sensor_common *st, int *val1, int *val2); int hid_sensor_read_raw_hyst_rel_value(struct hid_sensor_common *st, int *val1, int *val2); int hid_sensor_write_samp_freq_value(struct hid_sensor_common *st, int val1, int val2); int hid_sensor_read_samp_freq_value(struct hid_sensor_common *st, int *val1, int *val2); int hid_sensor_get_usage_index(struct hid_sensor_hub_device *hsdev, u32 report_id, int field_index, u32 usage_id); int hid_sensor_format_scale(u32 usage_id, struct hid_sensor_hub_attribute_info *attr_info, int *val0, int *val1); s32 hid_sensor_read_poll_value(struct hid_sensor_common *st); int64_t hid_sensor_convert_timestamp(struct hid_sensor_common *st, int64_t raw_value); bool hid_sensor_batch_mode_supported(struct hid_sensor_common *st); int hid_sensor_set_report_latency(struct hid_sensor_common *st, int latency); int hid_sensor_get_report_latency(struct hid_sensor_common *st); #endif PK ! G�.� � libps2.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LIBPS2_H #define _LIBPS2_H /* * Copyright (C) 1999-2002 Vojtech Pavlik * Copyright (C) 2004 Dmitry Torokhov */ #include <linux/bitops.h> #include <linux/mutex.h> #include <linux/types.h> #include <linux/wait.h> #define PS2_CMD_SETSCALE11 0x00e6 #define PS2_CMD_SETRES 0x10e8 #define PS2_CMD_GETID 0x02f2 #define PS2_CMD_RESET_BAT 0x02ff #define PS2_RET_BAT 0xaa #define PS2_RET_ID 0x00 #define PS2_RET_ACK 0xfa #define PS2_RET_NAK 0xfe #define PS2_RET_ERR 0xfc #define PS2_FLAG_ACK BIT(0) /* Waiting for ACK/NAK */ #define PS2_FLAG_CMD BIT(1) /* Waiting for a command to finish */ #define PS2_FLAG_CMD1 BIT(2) /* Waiting for the first byte of command response */ #define PS2_FLAG_WAITID BIT(3) /* Command executing is GET ID */ #define PS2_FLAG_NAK BIT(4) /* Last transmission was NAKed */ #define PS2_FLAG_ACK_CMD BIT(5) /* Waiting to ACK the command (first) byte */ struct ps2dev { struct serio *serio; /* Ensures that only one command is executing at a time */ struct mutex cmd_mutex; /* Used to signal completion from interrupt handler */ wait_queue_head_t wait; unsigned long flags; u8 cmdbuf[8]; u8 cmdcnt; u8 nak; }; void ps2_init(struct ps2dev *ps2dev, struct serio *serio); int ps2_sendbyte(struct ps2dev *ps2dev, u8 byte, unsigned int timeout); void ps2_drain(struct ps2dev *ps2dev, size_t maxbytes, unsigned int timeout); void ps2_begin_command(struct ps2dev *ps2dev); void ps2_end_command(struct ps2dev *ps2dev); int __ps2_command(struct ps2dev *ps2dev, u8 *param, unsigned int command); int ps2_command(struct ps2dev *ps2dev, u8 *param, unsigned int command); int ps2_sliced_command(struct ps2dev *ps2dev, u8 command); bool ps2_handle_ack(struct ps2dev *ps2dev, u8 data); bool ps2_handle_response(struct ps2dev *ps2dev, u8 data); void ps2_cmd_aborted(struct ps2dev *ps2dev); bool ps2_is_keyboard_id(u8 id); #endif /* _LIBPS2_H */ PK ! t� � arch_topology.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/arch_topology.h - arch specific cpu topology information */ #ifndef _LINUX_ARCH_TOPOLOGY_H_ #define _LINUX_ARCH_TOPOLOGY_H_ #include <linux/types.h> #include <linux/percpu.h> void topology_normalize_cpu_scale(void); int topology_update_cpu_topology(void); struct device_node; bool topology_parse_cpu_capacity(struct device_node *cpu_node, int cpu); DECLARE_PER_CPU(unsigned long, cpu_scale); static inline unsigned long topology_get_cpu_scale(int cpu) { return per_cpu(cpu_scale, cpu); } void topology_set_cpu_scale(unsigned int cpu, unsigned long capacity); DECLARE_PER_CPU(unsigned long, arch_freq_scale); static inline unsigned long topology_get_freq_scale(int cpu) { return per_cpu(arch_freq_scale, cpu); } void topology_set_freq_scale(const struct cpumask *cpus, unsigned long cur_freq, unsigned long max_freq); bool topology_scale_freq_invariant(void); enum scale_freq_source { SCALE_FREQ_SOURCE_CPUFREQ = 0, SCALE_FREQ_SOURCE_ARCH, SCALE_FREQ_SOURCE_CPPC, }; struct scale_freq_data { enum scale_freq_source source; void (*set_freq_scale)(void); }; void topology_scale_freq_tick(void); void topology_set_scale_freq_source(struct scale_freq_data *data, const struct cpumask *cpus); void topology_clear_scale_freq_source(enum scale_freq_source source, const struct cpumask *cpus); DECLARE_PER_CPU(unsigned long, thermal_pressure); static inline unsigned long topology_get_thermal_pressure(int cpu) { return per_cpu(thermal_pressure, cpu); } void topology_set_thermal_pressure(const struct cpumask *cpus, unsigned long th_pressure); struct cpu_topology { int thread_id; int core_id; int package_id; int llc_id; cpumask_t thread_sibling; cpumask_t core_sibling; cpumask_t llc_sibling; }; #ifdef CONFIG_GENERIC_ARCH_TOPOLOGY extern struct cpu_topology cpu_topology[NR_CPUS]; #define topology_physical_package_id(cpu) (cpu_topology[cpu].package_id) #define topology_core_id(cpu) (cpu_topology[cpu].core_id) #define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) #define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) #define topology_llc_cpumask(cpu) (&cpu_topology[cpu].llc_sibling) void init_cpu_topology(void); void store_cpu_topology(unsigned int cpuid); const struct cpumask *cpu_coregroup_mask(int cpu); void update_siblings_masks(unsigned int cpu); void remove_cpu_topology(unsigned int cpuid); void reset_cpu_topology(void); int parse_acpi_topology(void); #endif #endif /* _LINUX_ARCH_TOPOLOGY_H_ */ PK ! R5�> �> radix-tree.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2001 Momchil Velikov * Portions Copyright (C) 2001 Christoph Hellwig * Copyright (C) 2006 Nick Piggin * Copyright (C) 2012 Konstantin Khlebnikov */ #ifndef _LINUX_RADIX_TREE_H #define _LINUX_RADIX_TREE_H #include <linux/bitops.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/percpu.h> #include <linux/preempt.h> #include <linux/rcupdate.h> #include <linux/spinlock.h> #include <linux/types.h> #include <linux/xarray.h> /* Keep unconverted code working */ #define radix_tree_root xarray #define radix_tree_node xa_node /* * The bottom two bits of the slot determine how the remaining bits in the * slot are interpreted: * * 00 - data pointer * 10 - internal entry * x1 - value entry * * The internal entry may be a pointer to the next level in the tree, a * sibling entry, or an indicator that the entry in this slot has been moved * to another location in the tree and the lookup should be restarted. While * NULL fits the 'data pointer' pattern, it means that there is no entry in * the tree for this index (no matter what level of the tree it is found at). * This means that storing a NULL entry in the tree is the same as deleting * the entry from the tree. */ #define RADIX_TREE_ENTRY_MASK 3UL #define RADIX_TREE_INTERNAL_NODE 2UL static inline bool radix_tree_is_internal_node(void *ptr) { return ((unsigned long)ptr & RADIX_TREE_ENTRY_MASK) == RADIX_TREE_INTERNAL_NODE; } /*** radix-tree API starts here ***/ #define RADIX_TREE_MAP_SHIFT XA_CHUNK_SHIFT #define RADIX_TREE_MAP_SIZE (1UL << RADIX_TREE_MAP_SHIFT) #define RADIX_TREE_MAP_MASK (RADIX_TREE_MAP_SIZE-1) #define RADIX_TREE_MAX_TAGS XA_MAX_MARKS #define RADIX_TREE_TAG_LONGS XA_MARK_LONGS #define RADIX_TREE_INDEX_BITS (8 /* CHAR_BIT */ * sizeof(unsigned long)) #define RADIX_TREE_MAX_PATH (DIV_ROUND_UP(RADIX_TREE_INDEX_BITS, \ RADIX_TREE_MAP_SHIFT)) /* The IDR tag is stored in the low bits of xa_flags */ #define ROOT_IS_IDR ((__force gfp_t)4) /* The top bits of xa_flags are used to store the root tags */ #define ROOT_TAG_SHIFT (__GFP_BITS_SHIFT) #define RADIX_TREE_INIT(name, mask) XARRAY_INIT(name, mask) #define RADIX_TREE(name, mask) \ struct radix_tree_root name = RADIX_TREE_INIT(name, mask) #define INIT_RADIX_TREE(root, mask) xa_init_flags(root, mask) static inline bool radix_tree_empty(const struct radix_tree_root *root) { return root->xa_head == NULL; } /** * struct radix_tree_iter - radix tree iterator state * * @index: index of current slot * @next_index: one beyond the last index for this chunk * @tags: bit-mask for tag-iterating * @node: node that contains current slot * * This radix tree iterator works in terms of "chunks" of slots. A chunk is a * subinterval of slots contained within one radix tree leaf node. It is * described by a pointer to its first slot and a struct radix_tree_iter * which holds the chunk's position in the tree and its size. For tagged * iteration radix_tree_iter also holds the slots' bit-mask for one chosen * radix tree tag. */ struct radix_tree_iter { unsigned long index; unsigned long next_index; unsigned long tags; struct radix_tree_node *node; }; /** * Radix-tree synchronization * * The radix-tree API requires that users provide all synchronisation (with * specific exceptions, noted below). * * Synchronization of access to the data items being stored in the tree, and * management of their lifetimes must be completely managed by API users. * * For API usage, in general, * - any function _modifying_ the tree or tags (inserting or deleting * items, setting or clearing tags) must exclude other modifications, and * exclude any functions reading the tree. * - any function _reading_ the tree or tags (looking up items or tags, * gang lookups) must exclude modifications to the tree, but may occur * concurrently with other readers. * * The notable exceptions to this rule are the following functions: * __radix_tree_lookup * radix_tree_lookup * radix_tree_lookup_slot * radix_tree_tag_get * radix_tree_gang_lookup * radix_tree_gang_lookup_tag * radix_tree_gang_lookup_tag_slot * radix_tree_tagged * * The first 7 functions are able to be called locklessly, using RCU. The * caller must ensure calls to these functions are made within rcu_read_lock() * regions. Other readers (lock-free or otherwise) and modifications may be * running concurrently. * * It is still required that the caller manage the synchronization and lifetimes * of the items. So if RCU lock-free lookups are used, typically this would mean * that the items have their own locks, or are amenable to lock-free access; and * that the items are freed by RCU (or only freed after having been deleted from * the radix tree *and* a synchronize_rcu() grace period). * * (Note, rcu_assign_pointer and rcu_dereference are not needed to control * access to data items when inserting into or looking up from the radix tree) * * Note that the value returned by radix_tree_tag_get() may not be relied upon * if only the RCU read lock is held. Functions to set/clear tags and to * delete nodes running concurrently with it may affect its result such that * two consecutive reads in the same locked section may return different * values. If reliability is required, modification functions must also be * excluded from concurrency. * * radix_tree_tagged is able to be called without locking or RCU. */ /** * radix_tree_deref_slot - dereference a slot * @slot: slot pointer, returned by radix_tree_lookup_slot * * For use with radix_tree_lookup_slot(). Caller must hold tree at least read * locked across slot lookup and dereference. Not required if write lock is * held (ie. items cannot be concurrently inserted). * * radix_tree_deref_retry must be used to confirm validity of the pointer if * only the read lock is held. * * Return: entry stored in that slot. */ static inline void *radix_tree_deref_slot(void __rcu **slot) { return rcu_dereference(*slot); } /** * radix_tree_deref_slot_protected - dereference a slot with tree lock held * @slot: slot pointer, returned by radix_tree_lookup_slot * * Similar to radix_tree_deref_slot. The caller does not hold the RCU read * lock but it must hold the tree lock to prevent parallel updates. * * Return: entry stored in that slot. */ static inline void *radix_tree_deref_slot_protected(void __rcu **slot, spinlock_t *treelock) { return rcu_dereference_protected(*slot, lockdep_is_held(treelock)); } /** * radix_tree_deref_retry - check radix_tree_deref_slot * @arg: pointer returned by radix_tree_deref_slot * Returns: 0 if retry is not required, otherwise retry is required * * radix_tree_deref_retry must be used with radix_tree_deref_slot. */ static inline int radix_tree_deref_retry(void *arg) { return unlikely(radix_tree_is_internal_node(arg)); } /** * radix_tree_exception - radix_tree_deref_slot returned either exception? * @arg: value returned by radix_tree_deref_slot * Returns: 0 if well-aligned pointer, non-0 if either kind of exception. */ static inline int radix_tree_exception(void *arg) { return unlikely((unsigned long)arg & RADIX_TREE_ENTRY_MASK); } int radix_tree_insert(struct radix_tree_root *, unsigned long index, void *); void *__radix_tree_lookup(const struct radix_tree_root *, unsigned long index, struct radix_tree_node **nodep, void __rcu ***slotp); void *radix_tree_lookup(const struct radix_tree_root *, unsigned long); void __rcu **radix_tree_lookup_slot(const struct radix_tree_root *, unsigned long index); void __radix_tree_replace(struct radix_tree_root *, struct radix_tree_node *, void __rcu **slot, void *entry); void radix_tree_iter_replace(struct radix_tree_root *, const struct radix_tree_iter *, void __rcu **slot, void *entry); void radix_tree_replace_slot(struct radix_tree_root *, void __rcu **slot, void *entry); void radix_tree_iter_delete(struct radix_tree_root *, struct radix_tree_iter *iter, void __rcu **slot); void *radix_tree_delete_item(struct radix_tree_root *, unsigned long, void *); void *radix_tree_delete(struct radix_tree_root *, unsigned long); unsigned int radix_tree_gang_lookup(const struct radix_tree_root *, void **results, unsigned long first_index, unsigned int max_items); int radix_tree_preload(gfp_t gfp_mask); int radix_tree_maybe_preload(gfp_t gfp_mask); void radix_tree_init(void); void *radix_tree_tag_set(struct radix_tree_root *, unsigned long index, unsigned int tag); void *radix_tree_tag_clear(struct radix_tree_root *, unsigned long index, unsigned int tag); int radix_tree_tag_get(const struct radix_tree_root *, unsigned long index, unsigned int tag); void radix_tree_iter_tag_clear(struct radix_tree_root *, const struct radix_tree_iter *iter, unsigned int tag); unsigned int radix_tree_gang_lookup_tag(const struct radix_tree_root *, void **results, unsigned long first_index, unsigned int max_items, unsigned int tag); unsigned int radix_tree_gang_lookup_tag_slot(const struct radix_tree_root *, void __rcu ***results, unsigned long first_index, unsigned int max_items, unsigned int tag); int radix_tree_tagged(const struct radix_tree_root *, unsigned int tag); static inline void radix_tree_preload_end(void) { preempt_enable(); } void __rcu **idr_get_free(struct radix_tree_root *root, struct radix_tree_iter *iter, gfp_t gfp, unsigned long max); enum { RADIX_TREE_ITER_TAG_MASK = 0x0f, /* tag index in lower nybble */ RADIX_TREE_ITER_TAGGED = 0x10, /* lookup tagged slots */ RADIX_TREE_ITER_CONTIG = 0x20, /* stop at first hole */ }; /** * radix_tree_iter_init - initialize radix tree iterator * * @iter: pointer to iterator state * @start: iteration starting index * Returns: NULL */ static __always_inline void __rcu ** radix_tree_iter_init(struct radix_tree_iter *iter, unsigned long start) { /* * Leave iter->tags uninitialized. radix_tree_next_chunk() will fill it * in the case of a successful tagged chunk lookup. If the lookup was * unsuccessful or non-tagged then nobody cares about ->tags. * * Set index to zero to bypass next_index overflow protection. * See the comment in radix_tree_next_chunk() for details. */ iter->index = 0; iter->next_index = start; return NULL; } /** * radix_tree_next_chunk - find next chunk of slots for iteration * * @root: radix tree root * @iter: iterator state * @flags: RADIX_TREE_ITER_* flags and tag index * Returns: pointer to chunk first slot, or NULL if there no more left * * This function looks up the next chunk in the radix tree starting from * @iter->next_index. It returns a pointer to the chunk's first slot. * Also it fills @iter with data about chunk: position in the tree (index), * its end (next_index), and constructs a bit mask for tagged iterating (tags). */ void __rcu **radix_tree_next_chunk(const struct radix_tree_root *, struct radix_tree_iter *iter, unsigned flags); /** * radix_tree_iter_lookup - look up an index in the radix tree * @root: radix tree root * @iter: iterator state * @index: key to look up * * If @index is present in the radix tree, this function returns the slot * containing it and updates @iter to describe the entry. If @index is not * present, it returns NULL. */ static inline void __rcu ** radix_tree_iter_lookup(const struct radix_tree_root *root, struct radix_tree_iter *iter, unsigned long index) { radix_tree_iter_init(iter, index); return radix_tree_next_chunk(root, iter, RADIX_TREE_ITER_CONTIG); } /** * radix_tree_iter_retry - retry this chunk of the iteration * @iter: iterator state * * If we iterate over a tree protected only by the RCU lock, a race * against deletion or creation may result in seeing a slot for which * radix_tree_deref_retry() returns true. If so, call this function * and continue the iteration. */ static inline __must_check void __rcu **radix_tree_iter_retry(struct radix_tree_iter *iter) { iter->next_index = iter->index; iter->tags = 0; return NULL; } static inline unsigned long __radix_tree_iter_add(struct radix_tree_iter *iter, unsigned long slots) { return iter->index + slots; } /** * radix_tree_iter_resume - resume iterating when the chunk may be invalid * @slot: pointer to current slot * @iter: iterator state * Returns: New slot pointer * * If the iterator needs to release then reacquire a lock, the chunk may * have been invalidated by an insertion or deletion. Call this function * before releasing the lock to continue the iteration from the next index. */ void __rcu **__must_check radix_tree_iter_resume(void __rcu **slot, struct radix_tree_iter *iter); /** * radix_tree_chunk_size - get current chunk size * * @iter: pointer to radix tree iterator * Returns: current chunk size */ static __always_inline long radix_tree_chunk_size(struct radix_tree_iter *iter) { return iter->next_index - iter->index; } /** * radix_tree_next_slot - find next slot in chunk * * @slot: pointer to current slot * @iter: pointer to iterator state * @flags: RADIX_TREE_ITER_*, should be constant * Returns: pointer to next slot, or NULL if there no more left * * This function updates @iter->index in the case of a successful lookup. * For tagged lookup it also eats @iter->tags. * * There are several cases where 'slot' can be passed in as NULL to this * function. These cases result from the use of radix_tree_iter_resume() or * radix_tree_iter_retry(). In these cases we don't end up dereferencing * 'slot' because either: * a) we are doing tagged iteration and iter->tags has been set to 0, or * b) we are doing non-tagged iteration, and iter->index and iter->next_index * have been set up so that radix_tree_chunk_size() returns 1 or 0. */ static __always_inline void __rcu **radix_tree_next_slot(void __rcu **slot, struct radix_tree_iter *iter, unsigned flags) { if (flags & RADIX_TREE_ITER_TAGGED) { iter->tags >>= 1; if (unlikely(!iter->tags)) return NULL; if (likely(iter->tags & 1ul)) { iter->index = __radix_tree_iter_add(iter, 1); slot++; goto found; } if (!(flags & RADIX_TREE_ITER_CONTIG)) { unsigned offset = __ffs(iter->tags); iter->tags >>= offset++; iter->index = __radix_tree_iter_add(iter, offset); slot += offset; goto found; } } else { long count = radix_tree_chunk_size(iter); while (--count > 0) { slot++; iter->index = __radix_tree_iter_add(iter, 1); if (likely(*slot)) goto found; if (flags & RADIX_TREE_ITER_CONTIG) { /* forbid switching to the next chunk */ iter->next_index = 0; break; } } } return NULL; found: return slot; } /** * radix_tree_for_each_slot - iterate over non-empty slots * * @slot: the void** variable for pointer to slot * @root: the struct radix_tree_root pointer * @iter: the struct radix_tree_iter pointer * @start: iteration starting index * * @slot points to radix tree slot, @iter->index contains its index. */ #define radix_tree_for_each_slot(slot, root, iter, start) \ for (slot = radix_tree_iter_init(iter, start) ; \ slot || (slot = radix_tree_next_chunk(root, iter, 0)) ; \ slot = radix_tree_next_slot(slot, iter, 0)) /** * radix_tree_for_each_tagged - iterate over tagged slots * * @slot: the void** variable for pointer to slot * @root: the struct radix_tree_root pointer * @iter: the struct radix_tree_iter pointer * @start: iteration starting index * @tag: tag index * * @slot points to radix tree slot, @iter->index contains its index. */ #define radix_tree_for_each_tagged(slot, root, iter, start, tag) \ for (slot = radix_tree_iter_init(iter, start) ; \ slot || (slot = radix_tree_next_chunk(root, iter, \ RADIX_TREE_ITER_TAGGED | tag)) ; \ slot = radix_tree_next_slot(slot, iter, \ RADIX_TREE_ITER_TAGGED | tag)) #endif /* _LINUX_RADIX_TREE_H */ PK ! Оa� � mdio-mux.hnu �[��� /* * MDIO bus multiplexer framwork. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2011, 2012 Cavium, Inc. */ #ifndef __LINUX_MDIO_MUX_H #define __LINUX_MDIO_MUX_H #include <linux/device.h> #include <linux/phy.h> /* mdio_mux_init() - Initialize a MDIO mux * @dev The device owning the MDIO mux * @mux_node The device node of the MDIO mux * @switch_fn The function called for switching target MDIO child * mux_handle A pointer to a (void *) used internaly by mdio-mux * @data Private data used by switch_fn() * @mux_bus An optional parent bus (Other case are to use parent_bus property) */ int mdio_mux_init(struct device *dev, struct device_node *mux_node, int (*switch_fn) (int cur, int desired, void *data), void **mux_handle, void *data, struct mii_bus *mux_bus); void mdio_mux_uninit(void *mux_handle); #endif /* __LINUX_MDIO_MUX_H */ PK ! *� � kthread.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KTHREAD_H #define _LINUX_KTHREAD_H /* Simple interface for creating and stopping kernel threads without mess. */ #include <linux/err.h> #include <linux/sched.h> struct mm_struct; __printf(4, 5) struct task_struct *kthread_create_on_node(int (*threadfn)(void *data), void *data, int node, const char namefmt[], ...); /** * kthread_create - create a kthread on the current node * @threadfn: the function to run in the thread * @data: data pointer for @threadfn() * @namefmt: printf-style format string for the thread name * @arg: arguments for @namefmt. * * This macro will create a kthread on the current node, leaving it in * the stopped state. This is just a helper for kthread_create_on_node(); * see the documentation there for more details. */ #define kthread_create(threadfn, data, namefmt, arg...) \ kthread_create_on_node(threadfn, data, NUMA_NO_NODE, namefmt, ##arg) struct task_struct *kthread_create_on_cpu(int (*threadfn)(void *data), void *data, unsigned int cpu, const char *namefmt); void set_kthread_struct(struct task_struct *p); void kthread_set_per_cpu(struct task_struct *k, int cpu); bool kthread_is_per_cpu(struct task_struct *k); /** * kthread_run - create and wake a thread. * @threadfn: the function to run until signal_pending(current). * @data: data ptr for @threadfn. * @namefmt: printf-style name for the thread. * * Description: Convenient wrapper for kthread_create() followed by * wake_up_process(). Returns the kthread or ERR_PTR(-ENOMEM). */ #define kthread_run(threadfn, data, namefmt, ...) \ ({ \ struct task_struct *__k \ = kthread_create(threadfn, data, namefmt, ## __VA_ARGS__); \ if (!IS_ERR(__k)) \ wake_up_process(__k); \ __k; \ }) /** * kthread_run_on_cpu - create and wake a cpu bound thread. * @threadfn: the function to run until signal_pending(current). * @data: data ptr for @threadfn. * @cpu: The cpu on which the thread should be bound, * @namefmt: printf-style name for the thread. Format is restricted * to "name.*%u". Code fills in cpu number. * * Description: Convenient wrapper for kthread_create_on_cpu() * followed by wake_up_process(). Returns the kthread or * ERR_PTR(-ENOMEM). */ static inline struct task_struct * kthread_run_on_cpu(int (*threadfn)(void *data), void *data, unsigned int cpu, const char *namefmt) { struct task_struct *p; p = kthread_create_on_cpu(threadfn, data, cpu, namefmt); if (!IS_ERR(p)) wake_up_process(p); return p; } void free_kthread_struct(struct task_struct *k); void kthread_bind(struct task_struct *k, unsigned int cpu); void kthread_bind_mask(struct task_struct *k, const struct cpumask *mask); int kthread_stop(struct task_struct *k); bool kthread_should_stop(void); bool kthread_should_park(void); bool __kthread_should_park(struct task_struct *k); bool kthread_freezable_should_stop(bool *was_frozen); void *kthread_func(struct task_struct *k); void *kthread_data(struct task_struct *k); void *kthread_probe_data(struct task_struct *k); int kthread_park(struct task_struct *k); void kthread_unpark(struct task_struct *k); void kthread_parkme(void); void kthread_exit(long result) __noreturn; int kthreadd(void *unused); extern struct task_struct *kthreadd_task; extern int tsk_fork_get_node(struct task_struct *tsk); /* * Simple work processor based on kthread. * * This provides easier way to make use of kthreads. A kthread_work * can be queued and flushed using queue/kthread_flush_work() * respectively. Queued kthread_works are processed by a kthread * running kthread_worker_fn(). */ struct kthread_work; typedef void (*kthread_work_func_t)(struct kthread_work *work); void kthread_delayed_work_timer_fn(struct timer_list *t); enum { KTW_FREEZABLE = 1 << 0, /* freeze during suspend */ }; struct kthread_worker { unsigned int flags; raw_spinlock_t lock; struct list_head work_list; struct list_head delayed_work_list; struct task_struct *task; struct kthread_work *current_work; }; struct kthread_work { struct list_head node; kthread_work_func_t func; struct kthread_worker *worker; /* Number of canceling calls that are running at the moment. */ int canceling; }; struct kthread_delayed_work { struct kthread_work work; struct timer_list timer; }; #define KTHREAD_WORKER_INIT(worker) { \ .lock = __RAW_SPIN_LOCK_UNLOCKED((worker).lock), \ .work_list = LIST_HEAD_INIT((worker).work_list), \ .delayed_work_list = LIST_HEAD_INIT((worker).delayed_work_list),\ } #define KTHREAD_WORK_INIT(work, fn) { \ .node = LIST_HEAD_INIT((work).node), \ .func = (fn), \ } #define KTHREAD_DELAYED_WORK_INIT(dwork, fn) { \ .work = KTHREAD_WORK_INIT((dwork).work, (fn)), \ .timer = __TIMER_INITIALIZER(kthread_delayed_work_timer_fn,\ TIMER_IRQSAFE), \ } #define DEFINE_KTHREAD_WORKER(worker) \ struct kthread_worker worker = KTHREAD_WORKER_INIT(worker) #define DEFINE_KTHREAD_WORK(work, fn) \ struct kthread_work work = KTHREAD_WORK_INIT(work, fn) #define DEFINE_KTHREAD_DELAYED_WORK(dwork, fn) \ struct kthread_delayed_work dwork = \ KTHREAD_DELAYED_WORK_INIT(dwork, fn) /* * kthread_worker.lock needs its own lockdep class key when defined on * stack with lockdep enabled. Use the following macros in such cases. */ #ifdef CONFIG_LOCKDEP # define KTHREAD_WORKER_INIT_ONSTACK(worker) \ ({ kthread_init_worker(&worker); worker; }) # define DEFINE_KTHREAD_WORKER_ONSTACK(worker) \ struct kthread_worker worker = KTHREAD_WORKER_INIT_ONSTACK(worker) #else # define DEFINE_KTHREAD_WORKER_ONSTACK(worker) DEFINE_KTHREAD_WORKER(worker) #endif extern void __kthread_init_worker(struct kthread_worker *worker, const char *name, struct lock_class_key *key); #define kthread_init_worker(worker) \ do { \ static struct lock_class_key __key; \ __kthread_init_worker((worker), "("#worker")->lock", &__key); \ } while (0) #define kthread_init_work(work, fn) \ do { \ memset((work), 0, sizeof(struct kthread_work)); \ INIT_LIST_HEAD(&(work)->node); \ (work)->func = (fn); \ } while (0) #define kthread_init_delayed_work(dwork, fn) \ do { \ kthread_init_work(&(dwork)->work, (fn)); \ timer_setup(&(dwork)->timer, \ kthread_delayed_work_timer_fn, \ TIMER_IRQSAFE); \ } while (0) int kthread_worker_fn(void *worker_ptr); __printf(2, 3) struct kthread_worker * kthread_create_worker(unsigned int flags, const char namefmt[], ...); __printf(3, 4) struct kthread_worker * kthread_create_worker_on_cpu(int cpu, unsigned int flags, const char namefmt[], ...); bool kthread_queue_work(struct kthread_worker *worker, struct kthread_work *work); bool kthread_queue_delayed_work(struct kthread_worker *worker, struct kthread_delayed_work *dwork, unsigned long delay); bool kthread_mod_delayed_work(struct kthread_worker *worker, struct kthread_delayed_work *dwork, unsigned long delay); void kthread_flush_work(struct kthread_work *work); void kthread_flush_worker(struct kthread_worker *worker); bool kthread_cancel_work_sync(struct kthread_work *work); bool kthread_cancel_delayed_work_sync(struct kthread_delayed_work *work); void kthread_destroy_worker(struct kthread_worker *worker); void kthread_use_mm(struct mm_struct *mm); void kthread_unuse_mm(struct mm_struct *mm); struct cgroup_subsys_state; #ifdef CONFIG_BLK_CGROUP void kthread_associate_blkcg(struct cgroup_subsys_state *css); struct cgroup_subsys_state *kthread_blkcg(void); #else static inline void kthread_associate_blkcg(struct cgroup_subsys_state *css) { } static inline struct cgroup_subsys_state *kthread_blkcg(void) { return NULL; } #endif #endif /* _LINUX_KTHREAD_H */ PK ! /��d �d interrupt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* interrupt.h */ #ifndef _LINUX_INTERRUPT_H #define _LINUX_INTERRUPT_H #include <linux/kernel.h> #include <linux/bitops.h> #include <linux/cpumask.h> #include <linux/irqreturn.h> #include <linux/irqnr.h> #include <linux/hardirq.h> #include <linux/irqflags.h> #include <linux/hrtimer.h> #include <linux/kref.h> #include <linux/workqueue.h> #include <linux/jump_label.h> #include <linux/atomic.h> #include <asm/ptrace.h> #include <asm/irq.h> #include <asm/sections.h> /* * These correspond to the IORESOURCE_IRQ_* defines in * linux/ioport.h to select the interrupt line behaviour. When * requesting an interrupt without specifying a IRQF_TRIGGER, the * setting should be assumed to be "as already configured", which * may be as per machine or firmware initialisation. */ #define IRQF_TRIGGER_NONE 0x00000000 #define IRQF_TRIGGER_RISING 0x00000001 #define IRQF_TRIGGER_FALLING 0x00000002 #define IRQF_TRIGGER_HIGH 0x00000004 #define IRQF_TRIGGER_LOW 0x00000008 #define IRQF_TRIGGER_MASK (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW | \ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING) #define IRQF_TRIGGER_PROBE 0x00000010 /* * These flags used only by the kernel as part of the * irq handling routines. * * IRQF_SHARED - allow sharing the irq among several devices * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur * IRQF_TIMER - Flag to mark this interrupt as timer interrupt * IRQF_PERCPU - Interrupt is per cpu * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is * registered first in a shared interrupt is considered for * performance reasons) * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished. * Used by threaded interrupts which need to keep the * irq line disabled until the threaded handler has been run. * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee * that this interrupt will wake the system from a suspended * state. See Documentation/power/suspend-and-interrupts.rst * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set * IRQF_NO_THREAD - Interrupt cannot be threaded * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device * resume time. * IRQF_COND_SUSPEND - If the IRQ is shared with a NO_SUSPEND user, execute this * interrupt handler after suspending interrupts. For system * wakeup devices users need to implement wakeup detection in * their interrupt handlers. * IRQF_NO_AUTOEN - Don't enable IRQ or NMI automatically when users request it. * Users will enable it explicitly by enable_irq() or enable_nmi() * later. * IRQF_NO_DEBUG - Exclude from runnaway detection for IPI and similar handlers, * depends on IRQF_PERCPU. */ #define IRQF_SHARED 0x00000080 #define IRQF_PROBE_SHARED 0x00000100 #define __IRQF_TIMER 0x00000200 #define IRQF_PERCPU 0x00000400 #define IRQF_NOBALANCING 0x00000800 #define IRQF_IRQPOLL 0x00001000 #define IRQF_ONESHOT 0x00002000 #define IRQF_NO_SUSPEND 0x00004000 #define IRQF_FORCE_RESUME 0x00008000 #define IRQF_NO_THREAD 0x00010000 #define IRQF_EARLY_RESUME 0x00020000 #define IRQF_COND_SUSPEND 0x00040000 #define IRQF_NO_AUTOEN 0x00080000 #define IRQF_NO_DEBUG 0x00100000 #define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) /* * These values can be returned by request_any_context_irq() and * describe the context the interrupt will be run in. * * IRQC_IS_HARDIRQ - interrupt runs in hardirq context * IRQC_IS_NESTED - interrupt runs in a nested threaded context */ enum { IRQC_IS_HARDIRQ = 0, IRQC_IS_NESTED, }; typedef irqreturn_t (*irq_handler_t)(int, void *); /** * struct irqaction - per interrupt action descriptor * @handler: interrupt handler function * @name: name of the device * @dev_id: cookie to identify the device * @percpu_dev_id: cookie to identify the device * @next: pointer to the next irqaction for shared interrupts * @irq: interrupt number * @flags: flags (see IRQF_* above) * @thread_fn: interrupt handler function for threaded interrupts * @thread: thread pointer for threaded interrupts * @secondary: pointer to secondary irqaction (force threading) * @thread_flags: flags related to @thread * @thread_mask: bitmask for keeping track of @thread activity * @dir: pointer to the proc/irq/NN/name entry */ struct irqaction { irq_handler_t handler; void *dev_id; void __percpu *percpu_dev_id; struct irqaction *next; irq_handler_t thread_fn; struct task_struct *thread; struct irqaction *secondary; unsigned int irq; unsigned int flags; unsigned long thread_flags; unsigned long thread_mask; const char *name; struct proc_dir_entry *dir; } ____cacheline_internodealigned_in_smp; extern irqreturn_t no_action(int cpl, void *dev_id); /* * If a (PCI) device interrupt is not connected we set dev->irq to * IRQ_NOTCONNECTED. This causes request_irq() to fail with -ENOTCONN, so we * can distingiush that case from other error returns. * * 0x80000000 is guaranteed to be outside the available range of interrupts * and easy to distinguish from other possible incorrect values. */ #define IRQ_NOTCONNECTED (1U << 31) extern int __must_check request_threaded_irq(unsigned int irq, irq_handler_t handler, irq_handler_t thread_fn, unsigned long flags, const char *name, void *dev); /** * request_irq - Add a handler for an interrupt line * @irq: The interrupt line to allocate * @handler: Function to be called when the IRQ occurs. * Primary handler for threaded interrupts * If NULL, the default primary handler is installed * @flags: Handling flags * @name: Name of the device generating this interrupt * @dev: A cookie passed to the handler function * * This call allocates an interrupt and establishes a handler; see * the documentation for request_threaded_irq() for details. */ static inline int __must_check request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *name, void *dev) { return request_threaded_irq(irq, handler, NULL, flags, name, dev); } extern int __must_check request_any_context_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *name, void *dev_id); extern int __must_check __request_percpu_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *devname, void __percpu *percpu_dev_id); extern int __must_check request_nmi(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *name, void *dev); static inline int __must_check request_percpu_irq(unsigned int irq, irq_handler_t handler, const char *devname, void __percpu *percpu_dev_id) { return __request_percpu_irq(irq, handler, 0, devname, percpu_dev_id); } extern int __must_check request_percpu_nmi(unsigned int irq, irq_handler_t handler, const char *devname, void __percpu *dev); extern const void *free_irq(unsigned int, void *); extern void free_percpu_irq(unsigned int, void __percpu *); extern const void *free_nmi(unsigned int irq, void *dev_id); extern void free_percpu_nmi(unsigned int irq, void __percpu *percpu_dev_id); struct device; extern int __must_check devm_request_threaded_irq(struct device *dev, unsigned int irq, irq_handler_t handler, irq_handler_t thread_fn, unsigned long irqflags, const char *devname, void *dev_id); static inline int __must_check devm_request_irq(struct device *dev, unsigned int irq, irq_handler_t handler, unsigned long irqflags, const char *devname, void *dev_id) { return devm_request_threaded_irq(dev, irq, handler, NULL, irqflags, devname, dev_id); } extern int __must_check devm_request_any_context_irq(struct device *dev, unsigned int irq, irq_handler_t handler, unsigned long irqflags, const char *devname, void *dev_id); extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id); /* * On lockdep we dont want to enable hardirqs in hardirq * context. Use local_irq_enable_in_hardirq() to annotate * kernel code that has to do this nevertheless (pretty much * the only valid case is for old/broken hardware that is * insanely slow). * * NOTE: in theory this might break fragile code that relies * on hardirq delivery - in practice we dont seem to have such * places left. So the only effect should be slightly increased * irqs-off latencies. */ #ifdef CONFIG_LOCKDEP # define local_irq_enable_in_hardirq() do { } while (0) #else # define local_irq_enable_in_hardirq() local_irq_enable() #endif bool irq_has_action(unsigned int irq); extern void disable_irq_nosync(unsigned int irq); extern bool disable_hardirq(unsigned int irq); extern void disable_irq(unsigned int irq); extern void disable_percpu_irq(unsigned int irq); extern void enable_irq(unsigned int irq); extern void enable_percpu_irq(unsigned int irq, unsigned int type); extern bool irq_percpu_is_enabled(unsigned int irq); extern void irq_wake_thread(unsigned int irq, void *dev_id); extern void disable_nmi_nosync(unsigned int irq); extern void disable_percpu_nmi(unsigned int irq); extern void enable_nmi(unsigned int irq); extern void enable_percpu_nmi(unsigned int irq, unsigned int type); extern int prepare_percpu_nmi(unsigned int irq); extern void teardown_percpu_nmi(unsigned int irq); extern int irq_inject_interrupt(unsigned int irq); /* The following three functions are for the core kernel use only. */ extern void suspend_device_irqs(void); extern void resume_device_irqs(void); extern void rearm_wake_irq(unsigned int irq); /** * struct irq_affinity_notify - context for notification of IRQ affinity changes * @irq: Interrupt to which notification applies * @kref: Reference count, for internal use * @work: Work item, for internal use * @notify: Function to be called on change. This will be * called in process context. * @release: Function to be called on release. This will be * called in process context. Once registered, the * structure must only be freed when this function is * called or later. */ struct irq_affinity_notify { unsigned int irq; struct kref kref; struct work_struct work; void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); void (*release)(struct kref *ref); }; #define IRQ_AFFINITY_MAX_SETS 4 /** * struct irq_affinity - Description for automatic irq affinity assignements * @pre_vectors: Don't apply affinity to @pre_vectors at beginning of * the MSI(-X) vector space * @post_vectors: Don't apply affinity to @post_vectors at end of * the MSI(-X) vector space * @nr_sets: The number of interrupt sets for which affinity * spreading is required * @set_size: Array holding the size of each interrupt set * @calc_sets: Callback for calculating the number and size * of interrupt sets * @priv: Private data for usage by @calc_sets, usually a * pointer to driver/device specific data. */ struct irq_affinity { unsigned int pre_vectors; unsigned int post_vectors; unsigned int nr_sets; unsigned int set_size[IRQ_AFFINITY_MAX_SETS]; void (*calc_sets)(struct irq_affinity *, unsigned int nvecs); void *priv; }; /** * struct irq_affinity_desc - Interrupt affinity descriptor * @mask: cpumask to hold the affinity assignment * @is_managed: 1 if the interrupt is managed internally */ struct irq_affinity_desc { struct cpumask mask; unsigned int is_managed : 1; }; #if defined(CONFIG_SMP) extern cpumask_var_t irq_default_affinity; extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask); extern int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask); extern int irq_can_set_affinity(unsigned int irq); extern int irq_select_affinity(unsigned int irq); extern int __irq_apply_affinity_hint(unsigned int irq, const struct cpumask *m, bool setaffinity); /** * irq_update_affinity_hint - Update the affinity hint * @irq: Interrupt to update * @m: cpumask pointer (NULL to clear the hint) * * Updates the affinity hint, but does not change the affinity of the interrupt. */ static inline int irq_update_affinity_hint(unsigned int irq, const struct cpumask *m) { return __irq_apply_affinity_hint(irq, m, false); } /** * irq_set_affinity_and_hint - Update the affinity hint and apply the provided * cpumask to the interrupt * @irq: Interrupt to update * @m: cpumask pointer (NULL to clear the hint) * * Updates the affinity hint and if @m is not NULL it applies it as the * affinity of that interrupt. */ static inline int irq_set_affinity_and_hint(unsigned int irq, const struct cpumask *m) { return __irq_apply_affinity_hint(irq, m, true); } /* * Deprecated. Use irq_update_affinity_hint() or irq_set_affinity_and_hint() * instead. */ static inline int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) { return irq_set_affinity_and_hint(irq, m); } extern int irq_update_affinity_desc(unsigned int irq, struct irq_affinity_desc *affinity); extern int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify); struct irq_affinity_desc * irq_create_affinity_masks(unsigned int nvec, struct irq_affinity *affd); unsigned int irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, const struct irq_affinity *affd); #else /* CONFIG_SMP */ static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) { return -EINVAL; } static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) { return 0; } static inline int irq_can_set_affinity(unsigned int irq) { return 0; } static inline int irq_select_affinity(unsigned int irq) { return 0; } static inline int irq_update_affinity_hint(unsigned int irq, const struct cpumask *m) { return -EINVAL; } static inline int irq_set_affinity_and_hint(unsigned int irq, const struct cpumask *m) { return -EINVAL; } static inline int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) { return -EINVAL; } static inline int irq_update_affinity_desc(unsigned int irq, struct irq_affinity_desc *affinity) { return -EINVAL; } static inline int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) { return 0; } static inline struct irq_affinity_desc * irq_create_affinity_masks(unsigned int nvec, struct irq_affinity *affd) { return NULL; } static inline unsigned int irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, const struct irq_affinity *affd) { return maxvec; } #endif /* CONFIG_SMP */ /* * Special lockdep variants of irq disabling/enabling. * These should be used for locking constructs that * know that a particular irq context which is disabled, * and which is the only irq-context user of a lock, * that it's safe to take the lock in the irq-disabled * section without disabling hardirqs. * * On !CONFIG_LOCKDEP they are equivalent to the normal * irq disable/enable methods. */ static inline void disable_irq_nosync_lockdep(unsigned int irq) { disable_irq_nosync(irq); #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) local_irq_disable(); #endif } static inline void disable_irq_nosync_lockdep_irqsave(unsigned int irq, unsigned long *flags) { disable_irq_nosync(irq); #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) local_irq_save(*flags); #endif } static inline void disable_irq_lockdep(unsigned int irq) { disable_irq(irq); #ifdef CONFIG_LOCKDEP local_irq_disable(); #endif } static inline void enable_irq_lockdep(unsigned int irq) { #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) local_irq_enable(); #endif enable_irq(irq); } static inline void enable_irq_lockdep_irqrestore(unsigned int irq, unsigned long *flags) { #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) local_irq_restore(*flags); #endif enable_irq(irq); } /* IRQ wakeup (PM) control: */ extern int irq_set_irq_wake(unsigned int irq, unsigned int on); static inline int enable_irq_wake(unsigned int irq) { return irq_set_irq_wake(irq, 1); } static inline int disable_irq_wake(unsigned int irq) { return irq_set_irq_wake(irq, 0); } /* * irq_get_irqchip_state/irq_set_irqchip_state specific flags */ enum irqchip_irq_state { IRQCHIP_STATE_PENDING, /* Is interrupt pending? */ IRQCHIP_STATE_ACTIVE, /* Is interrupt in progress? */ IRQCHIP_STATE_MASKED, /* Is interrupt masked? */ IRQCHIP_STATE_LINE_LEVEL, /* Is IRQ line high? */ }; extern int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, bool *state); extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, bool state); #ifdef CONFIG_IRQ_FORCED_THREADING # ifdef CONFIG_PREEMPT_RT # define force_irqthreads() (true) # else DECLARE_STATIC_KEY_FALSE(force_irqthreads_key); # define force_irqthreads() (static_branch_unlikely(&force_irqthreads_key)) # endif #else #define force_irqthreads() (false) #endif #ifndef local_softirq_pending #ifndef local_softirq_pending_ref #define local_softirq_pending_ref irq_stat.__softirq_pending #endif #define local_softirq_pending() (__this_cpu_read(local_softirq_pending_ref)) #define set_softirq_pending(x) (__this_cpu_write(local_softirq_pending_ref, (x))) #define or_softirq_pending(x) (__this_cpu_or(local_softirq_pending_ref, (x))) #endif /* local_softirq_pending */ /* Some architectures might implement lazy enabling/disabling of * interrupts. In some cases, such as stop_machine, we might want * to ensure that after a local_irq_disable(), interrupts have * really been disabled in hardware. Such architectures need to * implement the following hook. */ #ifndef hard_irq_disable #define hard_irq_disable() do { } while(0) #endif /* PLEASE, avoid to allocate new softirqs, if you need not _really_ high frequency threaded job scheduling. For almost all the purposes tasklets are more than enough. F.e. all serial device BHs et al. should be converted to tasklets, not to softirqs. */ enum { HI_SOFTIRQ=0, TIMER_SOFTIRQ, NET_TX_SOFTIRQ, NET_RX_SOFTIRQ, BLOCK_SOFTIRQ, IRQ_POLL_SOFTIRQ, TASKLET_SOFTIRQ, SCHED_SOFTIRQ, HRTIMER_SOFTIRQ, RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */ NR_SOFTIRQS }; #define SOFTIRQ_STOP_IDLE_MASK (~(1 << RCU_SOFTIRQ)) /* map softirq index to softirq name. update 'softirq_to_name' in * kernel/softirq.c when adding a new softirq. */ extern const char * const softirq_to_name[NR_SOFTIRQS]; /* softirq mask and active fields moved to irq_cpustat_t in * asm/hardirq.h to get better cache usage. KAO */ struct softirq_action { void (*action)(struct softirq_action *); }; asmlinkage void do_softirq(void); asmlinkage void __do_softirq(void); extern void open_softirq(int nr, void (*action)(struct softirq_action *)); extern void softirq_init(void); extern void __raise_softirq_irqoff(unsigned int nr); extern void raise_softirq_irqoff(unsigned int nr); extern void raise_softirq(unsigned int nr); DECLARE_PER_CPU(struct task_struct *, ksoftirqd); static inline struct task_struct *this_cpu_ksoftirqd(void) { return this_cpu_read(ksoftirqd); } /* Tasklets --- multithreaded analogue of BHs. This API is deprecated. Please consider using threaded IRQs instead: https://lore.kernel.org/lkml/20200716081538.2sivhkj4hcyrusem@linutronix.de Main feature differing them of generic softirqs: tasklet is running only on one CPU simultaneously. Main feature differing them of BHs: different tasklets may be run simultaneously on different CPUs. Properties: * If tasklet_schedule() is called, then tasklet is guaranteed to be executed on some cpu at least once after this. * If the tasklet is already scheduled, but its execution is still not started, it will be executed only once. * If this tasklet is already running on another CPU (or schedule is called from tasklet itself), it is rescheduled for later. * Tasklet is strictly serialized wrt itself, but not wrt another tasklets. If client needs some intertask synchronization, he makes it with spinlocks. */ struct tasklet_struct { struct tasklet_struct *next; unsigned long state; atomic_t count; bool use_callback; union { void (*func)(unsigned long data); void (*callback)(struct tasklet_struct *t); }; unsigned long data; }; #define DECLARE_TASKLET(name, _callback) \ struct tasklet_struct name = { \ .count = ATOMIC_INIT(0), \ .callback = _callback, \ .use_callback = true, \ } #define DECLARE_TASKLET_DISABLED(name, _callback) \ struct tasklet_struct name = { \ .count = ATOMIC_INIT(1), \ .callback = _callback, \ .use_callback = true, \ } #define from_tasklet(var, callback_tasklet, tasklet_fieldname) \ container_of(callback_tasklet, typeof(*var), tasklet_fieldname) #define DECLARE_TASKLET_OLD(name, _func) \ struct tasklet_struct name = { \ .count = ATOMIC_INIT(0), \ .func = _func, \ } #define DECLARE_TASKLET_DISABLED_OLD(name, _func) \ struct tasklet_struct name = { \ .count = ATOMIC_INIT(1), \ .func = _func, \ } enum { TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ }; #if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT) static inline int tasklet_trylock(struct tasklet_struct *t) { return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); } void tasklet_unlock(struct tasklet_struct *t); void tasklet_unlock_wait(struct tasklet_struct *t); void tasklet_unlock_spin_wait(struct tasklet_struct *t); #else static inline int tasklet_trylock(struct tasklet_struct *t) { return 1; } static inline void tasklet_unlock(struct tasklet_struct *t) { } static inline void tasklet_unlock_wait(struct tasklet_struct *t) { } static inline void tasklet_unlock_spin_wait(struct tasklet_struct *t) { } #endif extern void __tasklet_schedule(struct tasklet_struct *t); static inline void tasklet_schedule(struct tasklet_struct *t) { if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) __tasklet_schedule(t); } extern void __tasklet_hi_schedule(struct tasklet_struct *t); static inline void tasklet_hi_schedule(struct tasklet_struct *t) { if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) __tasklet_hi_schedule(t); } static inline void tasklet_disable_nosync(struct tasklet_struct *t) { atomic_inc(&t->count); smp_mb__after_atomic(); } /* * Do not use in new code. Disabling tasklets from atomic contexts is * error prone and should be avoided. */ static inline void tasklet_disable_in_atomic(struct tasklet_struct *t) { tasklet_disable_nosync(t); tasklet_unlock_spin_wait(t); smp_mb(); } static inline void tasklet_disable(struct tasklet_struct *t) { tasklet_disable_nosync(t); tasklet_unlock_wait(t); smp_mb(); } static inline void tasklet_enable(struct tasklet_struct *t) { smp_mb__before_atomic(); atomic_dec(&t->count); } extern void tasklet_kill(struct tasklet_struct *t); extern void tasklet_init(struct tasklet_struct *t, void (*func)(unsigned long), unsigned long data); extern void tasklet_setup(struct tasklet_struct *t, void (*callback)(struct tasklet_struct *)); /* * Autoprobing for irqs: * * probe_irq_on() and probe_irq_off() provide robust primitives * for accurate IRQ probing during kernel initialization. They are * reasonably simple to use, are not "fooled" by spurious interrupts, * and, unlike other attempts at IRQ probing, they do not get hung on * stuck interrupts (such as unused PS2 mouse interfaces on ASUS boards). * * For reasonably foolproof probing, use them as follows: * * 1. clear and/or mask the device's internal interrupt. * 2. sti(); * 3. irqs = probe_irq_on(); // "take over" all unassigned idle IRQs * 4. enable the device and cause it to trigger an interrupt. * 5. wait for the device to interrupt, using non-intrusive polling or a delay. * 6. irq = probe_irq_off(irqs); // get IRQ number, 0=none, negative=multiple * 7. service the device to clear its pending interrupt. * 8. loop again if paranoia is required. * * probe_irq_on() returns a mask of allocated irq's. * * probe_irq_off() takes the mask as a parameter, * and returns the irq number which occurred, * or zero if none occurred, or a negative irq number * if more than one irq occurred. */ #if !defined(CONFIG_GENERIC_IRQ_PROBE) static inline unsigned long probe_irq_on(void) { return 0; } static inline int probe_irq_off(unsigned long val) { return 0; } static inline unsigned int probe_irq_mask(unsigned long val) { return 0; } #else extern unsigned long probe_irq_on(void); /* returns 0 on failure */ extern int probe_irq_off(unsigned long); /* returns 0 or negative on failure */ extern unsigned int probe_irq_mask(unsigned long); /* returns mask of ISA interrupts */ #endif #ifdef CONFIG_PROC_FS /* Initialize /proc/irq/ */ extern void init_irq_proc(void); #else static inline void init_irq_proc(void) { } #endif #ifdef CONFIG_IRQ_TIMINGS void irq_timings_enable(void); void irq_timings_disable(void); u64 irq_timings_next_event(u64 now); #endif struct seq_file; int show_interrupts(struct seq_file *p, void *v); int arch_show_interrupts(struct seq_file *p, int prec); extern int early_irq_init(void); extern int arch_probe_nr_irqs(void); extern int arch_early_irq_init(void); /* * We want to know which function is an entrypoint of a hardirq or a softirq. */ #ifndef __irq_entry # define __irq_entry __section(".irqentry.text") #endif #define __softirq_entry __section(".softirqentry.text") #endif PK ! ڃ~ G G seqno-fence.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * seqno-fence, using a dma-buf to synchronize fencing * * Copyright (C) 2012 Texas Instruments * Copyright (C) 2012 Canonical Ltd * Authors: * Rob Clark <robdclark@gmail.com> * Maarten Lankhorst <maarten.lankhorst@canonical.com> */ #ifndef __LINUX_SEQNO_FENCE_H #define __LINUX_SEQNO_FENCE_H #include <linux/dma-fence.h> #include <linux/dma-buf.h> enum seqno_fence_condition { SEQNO_FENCE_WAIT_GEQUAL, SEQNO_FENCE_WAIT_NONZERO }; struct seqno_fence { struct dma_fence base; const struct dma_fence_ops *ops; struct dma_buf *sync_buf; uint32_t seqno_ofs; enum seqno_fence_condition condition; }; extern const struct dma_fence_ops seqno_fence_ops; /** * to_seqno_fence - cast a fence to a seqno_fence * @fence: fence to cast to a seqno_fence * * Returns NULL if the fence is not a seqno_fence, * or the seqno_fence otherwise. */ static inline struct seqno_fence * to_seqno_fence(struct dma_fence *fence) { if (fence->ops != &seqno_fence_ops) return NULL; return container_of(fence, struct seqno_fence, base); } /** * seqno_fence_init - initialize a seqno fence * @fence: seqno_fence to initialize * @lock: pointer to spinlock to use for fence * @sync_buf: buffer containing the memory location to signal on * @context: the execution context this fence is a part of * @seqno_ofs: the offset within @sync_buf * @seqno: the sequence # to signal on * @cond: fence wait condition * @ops: the fence_ops for operations on this seqno fence * * This function initializes a struct seqno_fence with passed parameters, * and takes a reference on sync_buf which is released on fence destruction. * * A seqno_fence is a dma_fence which can complete in software when * enable_signaling is called, but it also completes when * (s32)((sync_buf)[seqno_ofs] - seqno) >= 0 is true * * The seqno_fence will take a refcount on the sync_buf until it's * destroyed, but actual lifetime of sync_buf may be longer if one of the * callers take a reference to it. * * Certain hardware have instructions to insert this type of wait condition * in the command stream, so no intervention from software would be needed. * This type of fence can be destroyed before completed, however a reference * on the sync_buf dma-buf can be taken. It is encouraged to re-use the same * dma-buf for sync_buf, since mapping or unmapping the sync_buf to the * device's vm can be expensive. * * It is recommended for creators of seqno_fence to call dma_fence_signal() * before destruction. This will prevent possible issues from wraparound at * time of issue vs time of check, since users can check dma_fence_is_signaled() * before submitting instructions for the hardware to wait on the fence. * However, when ops.enable_signaling is not called, it doesn't have to be * done as soon as possible, just before there's any real danger of seqno * wraparound. */ static inline void seqno_fence_init(struct seqno_fence *fence, spinlock_t *lock, struct dma_buf *sync_buf, uint32_t context, uint32_t seqno_ofs, uint32_t seqno, enum seqno_fence_condition cond, const struct dma_fence_ops *ops) { BUG_ON(!fence || !sync_buf || !ops); BUG_ON(!ops->wait || !ops->enable_signaling || !ops->get_driver_name || !ops->get_timeline_name); /* * ops is used in dma_fence_init for get_driver_name, so needs to be * initialized first */ fence->ops = ops; dma_fence_init(&fence->base, &seqno_fence_ops, lock, context, seqno); get_dma_buf(sync_buf); fence->sync_buf = sync_buf; fence->seqno_ofs = seqno_ofs; fence->condition = cond; } #endif /* __LINUX_SEQNO_FENCE_H */ PK ! ���� � pl320-ipc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* */ int pl320_ipc_transmit(u32 *data); int pl320_ipc_register_notifier(struct notifier_block *nb); int pl320_ipc_unregister_notifier(struct notifier_block *nb); PK ! ���!�$ �$ pipe_fs_i.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PIPE_FS_I_H #define _LINUX_PIPE_FS_I_H #define PIPE_DEF_BUFFERS 16 #define PIPE_BUF_FLAG_LRU 0x01 /* page is on the LRU */ #define PIPE_BUF_FLAG_ATOMIC 0x02 /* was atomically mapped */ #define PIPE_BUF_FLAG_GIFT 0x04 /* page is a gift */ #define PIPE_BUF_FLAG_PACKET 0x08 /* read() as a packet */ #define PIPE_BUF_FLAG_CAN_MERGE 0x10 /* can merge buffers */ #define PIPE_BUF_FLAG_WHOLE 0x20 /* read() must return entire buffer or error */ #ifdef CONFIG_WATCH_QUEUE #define PIPE_BUF_FLAG_LOSS 0x40 /* Message loss happened after this buffer */ #endif /** * struct pipe_buffer - a linux kernel pipe buffer * @page: the page containing the data for the pipe buffer * @offset: offset of data inside the @page * @len: length of data inside the @page * @ops: operations associated with this buffer. See @pipe_buf_operations. * @flags: pipe buffer flags. See above. * @private: private data owned by the ops. **/ struct pipe_buffer { struct page *page; unsigned int offset, len; const struct pipe_buf_operations *ops; unsigned int flags; unsigned long private; }; /** * struct pipe_inode_info - a linux kernel pipe * @mutex: mutex protecting the whole thing * @rd_wait: reader wait point in case of empty pipe * @wr_wait: writer wait point in case of full pipe * @head: The point of buffer production * @tail: The point of buffer consumption * @note_loss: The next read() should insert a data-lost message * @max_usage: The maximum number of slots that may be used in the ring * @ring_size: total number of buffers (should be a power of 2) * @nr_accounted: The amount this pipe accounts for in user->pipe_bufs * @tmp_page: cached released page * @readers: number of current readers of this pipe * @writers: number of current writers of this pipe * @files: number of struct file referring this pipe (protected by ->i_lock) * @r_counter: reader counter * @w_counter: writer counter * @poll_usage: is this pipe used for epoll, which has crazy wakeups? * @fasync_readers: reader side fasync * @fasync_writers: writer side fasync * @bufs: the circular array of pipe buffers * @user: the user who created this pipe * @watch_queue: If this pipe is a watch_queue, this is the stuff for that **/ struct pipe_inode_info { struct mutex mutex; wait_queue_head_t rd_wait, wr_wait; unsigned int head; unsigned int tail; unsigned int max_usage; unsigned int ring_size; #ifdef CONFIG_WATCH_QUEUE bool note_loss; #endif unsigned int nr_accounted; unsigned int readers; unsigned int writers; unsigned int files; unsigned int r_counter; unsigned int w_counter; bool poll_usage; struct page *tmp_page; struct fasync_struct *fasync_readers; struct fasync_struct *fasync_writers; struct pipe_buffer *bufs; struct user_struct *user; #ifdef CONFIG_WATCH_QUEUE struct watch_queue *watch_queue; #endif }; /* * Note on the nesting of these functions: * * ->confirm() * ->try_steal() * * That is, ->try_steal() must be called on a confirmed buffer. See below for * the meaning of each operation. Also see the kerneldoc in fs/pipe.c for the * pipe and generic variants of these hooks. */ struct pipe_buf_operations { /* * ->confirm() verifies that the data in the pipe buffer is there * and that the contents are good. If the pages in the pipe belong * to a file system, we may need to wait for IO completion in this * hook. Returns 0 for good, or a negative error value in case of * error. If not present all pages are considered good. */ int (*confirm)(struct pipe_inode_info *, struct pipe_buffer *); /* * When the contents of this pipe buffer has been completely * consumed by a reader, ->release() is called. */ void (*release)(struct pipe_inode_info *, struct pipe_buffer *); /* * Attempt to take ownership of the pipe buffer and its contents. * ->try_steal() returns %true for success, in which case the contents * of the pipe (the buf->page) is locked and now completely owned by the * caller. The page may then be transferred to a different mapping, the * most often used case is insertion into different file address space * cache. */ bool (*try_steal)(struct pipe_inode_info *, struct pipe_buffer *); /* * Get a reference to the pipe buffer. */ bool (*get)(struct pipe_inode_info *, struct pipe_buffer *); }; /** * pipe_has_watch_queue - Check whether the pipe is a watch_queue, * i.e. it was created with O_NOTIFICATION_PIPE * @pipe: The pipe to check * * Return: true if pipe is a watch queue, false otherwise. */ static inline bool pipe_has_watch_queue(const struct pipe_inode_info *pipe) { #ifdef CONFIG_WATCH_QUEUE return pipe->watch_queue != NULL; #else return false; #endif } /** * pipe_empty - Return true if the pipe is empty * @head: The pipe ring head pointer * @tail: The pipe ring tail pointer */ static inline bool pipe_empty(unsigned int head, unsigned int tail) { return head == tail; } /** * pipe_occupancy - Return number of slots used in the pipe * @head: The pipe ring head pointer * @tail: The pipe ring tail pointer */ static inline unsigned int pipe_occupancy(unsigned int head, unsigned int tail) { return head - tail; } /** * pipe_full - Return true if the pipe is full * @head: The pipe ring head pointer * @tail: The pipe ring tail pointer * @limit: The maximum amount of slots available. */ static inline bool pipe_full(unsigned int head, unsigned int tail, unsigned int limit) { return pipe_occupancy(head, tail) >= limit; } /** * pipe_space_for_user - Return number of slots available to userspace * @head: The pipe ring head pointer * @tail: The pipe ring tail pointer * @pipe: The pipe info structure */ static inline unsigned int pipe_space_for_user(unsigned int head, unsigned int tail, struct pipe_inode_info *pipe) { unsigned int p_occupancy, p_space; p_occupancy = pipe_occupancy(head, tail); if (p_occupancy >= pipe->max_usage) return 0; p_space = pipe->ring_size - p_occupancy; if (p_space > pipe->max_usage) p_space = pipe->max_usage; return p_space; } /** * pipe_buf_get - get a reference to a pipe_buffer * @pipe: the pipe that the buffer belongs to * @buf: the buffer to get a reference to * * Return: %true if the reference was successfully obtained. */ static inline __must_check bool pipe_buf_get(struct pipe_inode_info *pipe, struct pipe_buffer *buf) { return buf->ops->get(pipe, buf); } /** * pipe_buf_release - put a reference to a pipe_buffer * @pipe: the pipe that the buffer belongs to * @buf: the buffer to put a reference to */ static inline void pipe_buf_release(struct pipe_inode_info *pipe, struct pipe_buffer *buf) { const struct pipe_buf_operations *ops = buf->ops; buf->ops = NULL; ops->release(pipe, buf); } /** * pipe_buf_confirm - verify contents of the pipe buffer * @pipe: the pipe that the buffer belongs to * @buf: the buffer to confirm */ static inline int pipe_buf_confirm(struct pipe_inode_info *pipe, struct pipe_buffer *buf) { if (!buf->ops->confirm) return 0; return buf->ops->confirm(pipe, buf); } /** * pipe_buf_try_steal - attempt to take ownership of a pipe_buffer * @pipe: the pipe that the buffer belongs to * @buf: the buffer to attempt to steal */ static inline bool pipe_buf_try_steal(struct pipe_inode_info *pipe, struct pipe_buffer *buf) { if (!buf->ops->try_steal) return false; return buf->ops->try_steal(pipe, buf); } static inline void pipe_discard_from(struct pipe_inode_info *pipe, unsigned int old_head) { unsigned int mask = pipe->ring_size - 1; while (pipe->head > old_head) pipe_buf_release(pipe, &pipe->bufs[--pipe->head & mask]); } /* Differs from PIPE_BUF in that PIPE_SIZE is the length of the actual memory allocation, whereas PIPE_BUF makes atomicity guarantees. */ #define PIPE_SIZE PAGE_SIZE /* Pipe lock and unlock operations */ void pipe_lock(struct pipe_inode_info *); void pipe_unlock(struct pipe_inode_info *); void pipe_double_lock(struct pipe_inode_info *, struct pipe_inode_info *); extern unsigned int pipe_max_size; extern unsigned long pipe_user_pages_hard; extern unsigned long pipe_user_pages_soft; /* Wait for a pipe to be readable/writable while dropping the pipe lock */ void pipe_wait_readable(struct pipe_inode_info *); void pipe_wait_writable(struct pipe_inode_info *); struct pipe_inode_info *alloc_pipe_info(void); void free_pipe_info(struct pipe_inode_info *); /* Generic pipe buffer ops functions */ bool generic_pipe_buf_get(struct pipe_inode_info *, struct pipe_buffer *); bool generic_pipe_buf_try_steal(struct pipe_inode_info *, struct pipe_buffer *); void generic_pipe_buf_release(struct pipe_inode_info *, struct pipe_buffer *); extern const struct pipe_buf_operations nosteal_pipe_buf_ops; unsigned long account_pipe_buffers(struct user_struct *user, unsigned long old, unsigned long new); bool too_many_pipe_buffers_soft(unsigned long user_bufs); bool too_many_pipe_buffers_hard(unsigned long user_bufs); bool pipe_is_unprivileged_user(void); /* for F_SETPIPE_SZ and F_GETPIPE_SZ */ int pipe_resize_ring(struct pipe_inode_info *pipe, unsigned int nr_slots); long pipe_fcntl(struct file *, unsigned int, unsigned long arg); struct pipe_inode_info *get_pipe_info(struct file *file, bool for_splice); int create_pipe_files(struct file **, int); unsigned int round_pipe_size(unsigned long size); #endif PK ! �S� � font.hnu �[��� /* * font.h -- `Soft' font definitions * * Created 1995 by Geert Uytterhoeven * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #ifndef _VIDEO_FONT_H #define _VIDEO_FONT_H #include <linux/types.h> struct font_desc { int idx; const char *name; unsigned int width, height; unsigned int charcount; const void *data; int pref; }; #define VGA8x8_IDX 0 #define VGA8x16_IDX 1 #define PEARL8x8_IDX 2 #define VGA6x11_IDX 3 #define FONT7x14_IDX 4 #define FONT10x18_IDX 5 #define SUN8x16_IDX 6 #define SUN12x22_IDX 7 #define ACORN8x8_IDX 8 #define MINI4x6_IDX 9 #define FONT6x10_IDX 10 #define TER16x32_IDX 11 #define FONT6x8_IDX 12 extern const struct font_desc font_vga_8x8, font_vga_8x16, font_pearl_8x8, font_vga_6x11, font_7x14, font_10x18, font_sun_8x16, font_sun_12x22, font_acorn_8x8, font_mini_4x6, font_6x10, font_ter_16x32, font_6x8; /* Find a font with a specific name */ extern const struct font_desc *find_font(const char *name); /* Get the default font for a specific screen size */ extern const struct font_desc *get_default_font(int xres, int yres, u32 font_w, u32 font_h); /* Max. length for the name of a predefined font */ #define MAX_FONT_NAME 32 /* Extra word getters */ #define REFCOUNT(fd) (((int *)(fd))[-1]) #define FNTSIZE(fd) (((int *)(fd))[-2]) #define FNTCHARCNT(fd) (((int *)(fd))[-3]) #define FNTSUM(fd) (((int *)(fd))[-4]) #define FONT_EXTRA_WORDS 4 struct font_data { unsigned int extra[FONT_EXTRA_WORDS]; const unsigned char data[]; } __packed; #endif /* _VIDEO_FONT_H */ PK ! �\ҧ� � pci-dma-compat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* include this file if the platform implements the dma_ DMA Mapping API * and wants to provide the pci_ DMA Mapping API in terms of it */ #ifndef _ASM_GENERIC_PCI_DMA_COMPAT_H #define _ASM_GENERIC_PCI_DMA_COMPAT_H #include <linux/dma-mapping.h> /* This defines the direction arg to the DMA mapping routines. */ #define PCI_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL #define PCI_DMA_TODEVICE DMA_TO_DEVICE #define PCI_DMA_FROMDEVICE DMA_FROM_DEVICE #define PCI_DMA_NONE DMA_NONE static inline void * pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) { return dma_alloc_coherent(&hwdev->dev, size, dma_handle, GFP_ATOMIC); } static inline void * pci_zalloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) { return dma_alloc_coherent(&hwdev->dev, size, dma_handle, GFP_ATOMIC); } static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) { dma_free_coherent(&hwdev->dev, size, vaddr, dma_handle); } static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction) { return dma_map_single(&hwdev->dev, ptr, size, (enum dma_data_direction)direction); } static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction) { dma_unmap_single(&hwdev->dev, dma_addr, size, (enum dma_data_direction)direction); } static inline dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, unsigned long offset, size_t size, int direction) { return dma_map_page(&hwdev->dev, page, offset, size, (enum dma_data_direction)direction); } static inline void pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address, size_t size, int direction) { dma_unmap_page(&hwdev->dev, dma_address, size, (enum dma_data_direction)direction); } static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { return dma_map_sg(&hwdev->dev, sg, nents, (enum dma_data_direction)direction); } static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { dma_unmap_sg(&hwdev->dev, sg, nents, (enum dma_data_direction)direction); } static inline void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction) { dma_sync_single_for_cpu(&hwdev->dev, dma_handle, size, (enum dma_data_direction)direction); } static inline void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction) { dma_sync_single_for_device(&hwdev->dev, dma_handle, size, (enum dma_data_direction)direction); } static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction) { dma_sync_sg_for_cpu(&hwdev->dev, sg, nelems, (enum dma_data_direction)direction); } static inline void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction) { dma_sync_sg_for_device(&hwdev->dev, sg, nelems, (enum dma_data_direction)direction); } static inline int pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr) { return dma_mapping_error(&pdev->dev, dma_addr); } #ifdef CONFIG_PCI static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return dma_set_mask(&dev->dev, mask); } static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) { return dma_set_coherent_mask(&dev->dev, mask); } #else static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; } static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; } #endif #endif PK ! ҁ��� � in6.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Types and definitions for AF_INET6 * Linux INET6 implementation * * Authors: * Pedro Roque <roque@di.fc.ul.pt> * * Sources: * IPv6 Program Interfaces for BSD Systems * <draft-ietf-ipngwg-bsd-api-05.txt> * * Advanced Sockets API for IPv6 * <draft-stevens-advanced-api-00.txt> */ #ifndef _LINUX_IN6_H #define _LINUX_IN6_H #include <uapi/linux/in6.h> /* IPv6 Wildcard Address (::) and Loopback Address (::1) defined in RFC2553 * NOTE: Be aware the IN6ADDR_* constants and in6addr_* externals are defined * in network byte order, not in host byte order as are the IPv4 equivalents */ extern const struct in6_addr in6addr_any; #define IN6ADDR_ANY_INIT { { { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } } } extern const struct in6_addr in6addr_loopback; #define IN6ADDR_LOOPBACK_INIT { { { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } } } extern const struct in6_addr in6addr_linklocal_allnodes; #define IN6ADDR_LINKLOCAL_ALLNODES_INIT \ { { { 0xff,2,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } } } extern const struct in6_addr in6addr_linklocal_allrouters; #define IN6ADDR_LINKLOCAL_ALLROUTERS_INIT \ { { { 0xff,2,0,0,0,0,0,0,0,0,0,0,0,0,0,2 } } } extern const struct in6_addr in6addr_interfacelocal_allnodes; #define IN6ADDR_INTERFACELOCAL_ALLNODES_INIT \ { { { 0xff,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } } } extern const struct in6_addr in6addr_interfacelocal_allrouters; #define IN6ADDR_INTERFACELOCAL_ALLROUTERS_INIT \ { { { 0xff,1,0,0,0,0,0,0,0,0,0,0,0,0,0,2 } } } extern const struct in6_addr in6addr_sitelocal_allrouters; #define IN6ADDR_SITELOCAL_ALLROUTERS_INIT \ { { { 0xff,5,0,0,0,0,0,0,0,0,0,0,0,0,0,2 } } } #endif PK ! E��O� � kvm_para.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_KVM_PARA_H #define __LINUX_KVM_PARA_H #include <uapi/linux/kvm_para.h> static inline bool kvm_para_has_feature(unsigned int feature) { return !!(kvm_arch_para_features() & (1UL << feature)); } static inline bool kvm_para_has_hint(unsigned int feature) { return !!(kvm_arch_para_hints() & (1UL << feature)); } #endif /* __LINUX_KVM_PARA_H */ PK ! /�� elfcore-compat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ELFCORE_COMPAT_H #define _LINUX_ELFCORE_COMPAT_H #include <linux/elf.h> #include <linux/elfcore.h> #include <linux/compat.h> /* * Make sure these layouts match the linux/elfcore.h native definitions. */ struct compat_elf_siginfo { compat_int_t si_signo; compat_int_t si_code; compat_int_t si_errno; }; struct compat_elf_prstatus_common { struct compat_elf_siginfo pr_info; short pr_cursig; compat_ulong_t pr_sigpend; compat_ulong_t pr_sighold; compat_pid_t pr_pid; compat_pid_t pr_ppid; compat_pid_t pr_pgrp; compat_pid_t pr_sid; struct old_timeval32 pr_utime; struct old_timeval32 pr_stime; struct old_timeval32 pr_cutime; struct old_timeval32 pr_cstime; }; struct compat_elf_prpsinfo { char pr_state; char pr_sname; char pr_zomb; char pr_nice; compat_ulong_t pr_flag; __compat_uid_t pr_uid; __compat_gid_t pr_gid; compat_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid; char pr_fname[16]; char pr_psargs[ELF_PRARGSZ]; }; #ifdef CONFIG_ARCH_HAS_ELFCORE_COMPAT #include <asm/elfcore-compat.h> #endif struct compat_elf_prstatus { struct compat_elf_prstatus_common common; compat_elf_gregset_t pr_reg; compat_int_t pr_fpvalid; }; #endif /* _LINUX_ELFCORE_COMPAT_H */ PK ! ��gp�� �� xarray.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ #ifndef _LINUX_XARRAY_H #define _LINUX_XARRAY_H /* * eXtensible Arrays * Copyright (c) 2017 Microsoft Corporation * Author: Matthew Wilcox <willy@infradead.org> * * See Documentation/core-api/xarray.rst for how to use the XArray. */ #include <linux/bug.h> #include <linux/compiler.h> #include <linux/gfp.h> #include <linux/kconfig.h> #include <linux/kernel.h> #include <linux/rcupdate.h> #include <linux/sched/mm.h> #include <linux/spinlock.h> #include <linux/types.h> /* * The bottom two bits of the entry determine how the XArray interprets * the contents: * * 00: Pointer entry * 10: Internal entry * x1: Value entry or tagged pointer * * Attempting to store internal entries in the XArray is a bug. * * Most internal entries are pointers to the next node in the tree. * The following internal entries have a special meaning: * * 0-62: Sibling entries * 256: Retry entry * 257: Zero entry * * Errors are also represented as internal entries, but use the negative * space (-4094 to -2). They're never stored in the slots array; only * returned by the normal API. */ #define BITS_PER_XA_VALUE (BITS_PER_LONG - 1) /** * xa_mk_value() - Create an XArray entry from an integer. * @v: Value to store in XArray. * * Context: Any context. * Return: An entry suitable for storing in the XArray. */ static inline void *xa_mk_value(unsigned long v) { WARN_ON((long)v < 0); return (void *)((v << 1) | 1); } /** * xa_to_value() - Get value stored in an XArray entry. * @entry: XArray entry. * * Context: Any context. * Return: The value stored in the XArray entry. */ static inline unsigned long xa_to_value(const void *entry) { return (unsigned long)entry >> 1; } /** * xa_is_value() - Determine if an entry is a value. * @entry: XArray entry. * * Context: Any context. * Return: True if the entry is a value, false if it is a pointer. */ static inline bool xa_is_value(const void *entry) { return (unsigned long)entry & 1; } /** * xa_tag_pointer() - Create an XArray entry for a tagged pointer. * @p: Plain pointer. * @tag: Tag value (0, 1 or 3). * * If the user of the XArray prefers, they can tag their pointers instead * of storing value entries. Three tags are available (0, 1 and 3). * These are distinct from the xa_mark_t as they are not replicated up * through the array and cannot be searched for. * * Context: Any context. * Return: An XArray entry. */ static inline void *xa_tag_pointer(void *p, unsigned long tag) { return (void *)((unsigned long)p | tag); } /** * xa_untag_pointer() - Turn an XArray entry into a plain pointer. * @entry: XArray entry. * * If you have stored a tagged pointer in the XArray, call this function * to get the untagged version of the pointer. * * Context: Any context. * Return: A pointer. */ static inline void *xa_untag_pointer(void *entry) { return (void *)((unsigned long)entry & ~3UL); } /** * xa_pointer_tag() - Get the tag stored in an XArray entry. * @entry: XArray entry. * * If you have stored a tagged pointer in the XArray, call this function * to get the tag of that pointer. * * Context: Any context. * Return: A tag. */ static inline unsigned int xa_pointer_tag(void *entry) { return (unsigned long)entry & 3UL; } /* * xa_mk_internal() - Create an internal entry. * @v: Value to turn into an internal entry. * * Internal entries are used for a number of purposes. Entries 0-255 are * used for sibling entries (only 0-62 are used by the current code). 256 * is used for the retry entry. 257 is used for the reserved / zero entry. * Negative internal entries are used to represent errnos. Node pointers * are also tagged as internal entries in some situations. * * Context: Any context. * Return: An XArray internal entry corresponding to this value. */ static inline void *xa_mk_internal(unsigned long v) { return (void *)((v << 2) | 2); } /* * xa_to_internal() - Extract the value from an internal entry. * @entry: XArray entry. * * Context: Any context. * Return: The value which was stored in the internal entry. */ static inline unsigned long xa_to_internal(const void *entry) { return (unsigned long)entry >> 2; } /* * xa_is_internal() - Is the entry an internal entry? * @entry: XArray entry. * * Context: Any context. * Return: %true if the entry is an internal entry. */ static inline bool xa_is_internal(const void *entry) { return ((unsigned long)entry & 3) == 2; } #define XA_ZERO_ENTRY xa_mk_internal(257) /** * xa_is_zero() - Is the entry a zero entry? * @entry: Entry retrieved from the XArray * * The normal API will return NULL as the contents of a slot containing * a zero entry. You can only see zero entries by using the advanced API. * * Return: %true if the entry is a zero entry. */ static inline bool xa_is_zero(const void *entry) { return unlikely(entry == XA_ZERO_ENTRY); } /** * xa_is_err() - Report whether an XArray operation returned an error * @entry: Result from calling an XArray function * * If an XArray operation cannot complete an operation, it will return * a special value indicating an error. This function tells you * whether an error occurred; xa_err() tells you which error occurred. * * Context: Any context. * Return: %true if the entry indicates an error. */ static inline bool xa_is_err(const void *entry) { return unlikely(xa_is_internal(entry) && entry >= xa_mk_internal(-MAX_ERRNO)); } /** * xa_err() - Turn an XArray result into an errno. * @entry: Result from calling an XArray function. * * If an XArray operation cannot complete an operation, it will return * a special pointer value which encodes an errno. This function extracts * the errno from the pointer value, or returns 0 if the pointer does not * represent an errno. * * Context: Any context. * Return: A negative errno or 0. */ static inline int xa_err(void *entry) { /* xa_to_internal() would not do sign extension. */ if (xa_is_err(entry)) return (long)entry >> 2; return 0; } /** * struct xa_limit - Represents a range of IDs. * @min: The lowest ID to allocate (inclusive). * @max: The maximum ID to allocate (inclusive). * * This structure is used either directly or via the XA_LIMIT() macro * to communicate the range of IDs that are valid for allocation. * Three common ranges are predefined for you: * * xa_limit_32b - [0 - UINT_MAX] * * xa_limit_31b - [0 - INT_MAX] * * xa_limit_16b - [0 - USHRT_MAX] */ struct xa_limit { u32 max; u32 min; }; #define XA_LIMIT(_min, _max) (struct xa_limit) { .min = _min, .max = _max } #define xa_limit_32b XA_LIMIT(0, UINT_MAX) #define xa_limit_31b XA_LIMIT(0, INT_MAX) #define xa_limit_16b XA_LIMIT(0, USHRT_MAX) typedef unsigned __bitwise xa_mark_t; #define XA_MARK_0 ((__force xa_mark_t)0U) #define XA_MARK_1 ((__force xa_mark_t)1U) #define XA_MARK_2 ((__force xa_mark_t)2U) #define XA_PRESENT ((__force xa_mark_t)8U) #define XA_MARK_MAX XA_MARK_2 #define XA_FREE_MARK XA_MARK_0 enum xa_lock_type { XA_LOCK_IRQ = 1, XA_LOCK_BH = 2, }; /* * Values for xa_flags. The radix tree stores its GFP flags in the xa_flags, * and we remain compatible with that. */ #define XA_FLAGS_LOCK_IRQ ((__force gfp_t)XA_LOCK_IRQ) #define XA_FLAGS_LOCK_BH ((__force gfp_t)XA_LOCK_BH) #define XA_FLAGS_TRACK_FREE ((__force gfp_t)4U) #define XA_FLAGS_ZERO_BUSY ((__force gfp_t)8U) #define XA_FLAGS_ALLOC_WRAPPED ((__force gfp_t)16U) #define XA_FLAGS_ACCOUNT ((__force gfp_t)32U) #define XA_FLAGS_MARK(mark) ((__force gfp_t)((1U << __GFP_BITS_SHIFT) << \ (__force unsigned)(mark))) /* ALLOC is for a normal 0-based alloc. ALLOC1 is for an 1-based alloc */ #define XA_FLAGS_ALLOC (XA_FLAGS_TRACK_FREE | XA_FLAGS_MARK(XA_FREE_MARK)) #define XA_FLAGS_ALLOC1 (XA_FLAGS_TRACK_FREE | XA_FLAGS_ZERO_BUSY) /** * struct xarray - The anchor of the XArray. * @xa_lock: Lock that protects the contents of the XArray. * * To use the xarray, define it statically or embed it in your data structure. * It is a very small data structure, so it does not usually make sense to * allocate it separately and keep a pointer to it in your data structure. * * You may use the xa_lock to protect your own data structures as well. */ /* * If all of the entries in the array are NULL, @xa_head is a NULL pointer. * If the only non-NULL entry in the array is at index 0, @xa_head is that * entry. If any other entry in the array is non-NULL, @xa_head points * to an @xa_node. */ struct xarray { spinlock_t xa_lock; /* private: The rest of the data structure is not to be used directly. */ gfp_t xa_flags; void __rcu * xa_head; }; #define XARRAY_INIT(name, flags) { \ .xa_lock = __SPIN_LOCK_UNLOCKED(name.xa_lock), \ .xa_flags = flags, \ .xa_head = NULL, \ } /** * DEFINE_XARRAY_FLAGS() - Define an XArray with custom flags. * @name: A string that names your XArray. * @flags: XA_FLAG values. * * This is intended for file scope definitions of XArrays. It declares * and initialises an empty XArray with the chosen name and flags. It is * equivalent to calling xa_init_flags() on the array, but it does the * initialisation at compiletime instead of runtime. */ #define DEFINE_XARRAY_FLAGS(name, flags) \ struct xarray name = XARRAY_INIT(name, flags) /** * DEFINE_XARRAY() - Define an XArray. * @name: A string that names your XArray. * * This is intended for file scope definitions of XArrays. It declares * and initialises an empty XArray with the chosen name. It is equivalent * to calling xa_init() on the array, but it does the initialisation at * compiletime instead of runtime. */ #define DEFINE_XARRAY(name) DEFINE_XARRAY_FLAGS(name, 0) /** * DEFINE_XARRAY_ALLOC() - Define an XArray which allocates IDs starting at 0. * @name: A string that names your XArray. * * This is intended for file scope definitions of allocating XArrays. * See also DEFINE_XARRAY(). */ #define DEFINE_XARRAY_ALLOC(name) DEFINE_XARRAY_FLAGS(name, XA_FLAGS_ALLOC) /** * DEFINE_XARRAY_ALLOC1() - Define an XArray which allocates IDs starting at 1. * @name: A string that names your XArray. * * This is intended for file scope definitions of allocating XArrays. * See also DEFINE_XARRAY(). */ #define DEFINE_XARRAY_ALLOC1(name) DEFINE_XARRAY_FLAGS(name, XA_FLAGS_ALLOC1) void *xa_load(struct xarray *, unsigned long index); void *xa_store(struct xarray *, unsigned long index, void *entry, gfp_t); void *xa_erase(struct xarray *, unsigned long index); void *xa_store_range(struct xarray *, unsigned long first, unsigned long last, void *entry, gfp_t); bool xa_get_mark(struct xarray *, unsigned long index, xa_mark_t); void xa_set_mark(struct xarray *, unsigned long index, xa_mark_t); void xa_clear_mark(struct xarray *, unsigned long index, xa_mark_t); void *xa_find(struct xarray *xa, unsigned long *index, unsigned long max, xa_mark_t) __attribute__((nonnull(2))); void *xa_find_after(struct xarray *xa, unsigned long *index, unsigned long max, xa_mark_t) __attribute__((nonnull(2))); unsigned int xa_extract(struct xarray *, void **dst, unsigned long start, unsigned long max, unsigned int n, xa_mark_t); void xa_destroy(struct xarray *); /** * xa_init_flags() - Initialise an empty XArray with flags. * @xa: XArray. * @flags: XA_FLAG values. * * If you need to initialise an XArray with special flags (eg you need * to take the lock from interrupt context), use this function instead * of xa_init(). * * Context: Any context. */ static inline void xa_init_flags(struct xarray *xa, gfp_t flags) { spin_lock_init(&xa->xa_lock); xa->xa_flags = flags; xa->xa_head = NULL; } /** * xa_init() - Initialise an empty XArray. * @xa: XArray. * * An empty XArray is full of NULL entries. * * Context: Any context. */ static inline void xa_init(struct xarray *xa) { xa_init_flags(xa, 0); } /** * xa_empty() - Determine if an array has any present entries. * @xa: XArray. * * Context: Any context. * Return: %true if the array contains only NULL pointers. */ static inline bool xa_empty(const struct xarray *xa) { return xa->xa_head == NULL; } /** * xa_marked() - Inquire whether any entry in this array has a mark set * @xa: Array * @mark: Mark value * * Context: Any context. * Return: %true if any entry has this mark set. */ static inline bool xa_marked(const struct xarray *xa, xa_mark_t mark) { return xa->xa_flags & XA_FLAGS_MARK(mark); } /** * xa_for_each_range() - Iterate over a portion of an XArray. * @xa: XArray. * @index: Index of @entry. * @entry: Entry retrieved from array. * @start: First index to retrieve from array. * @last: Last index to retrieve from array. * * During the iteration, @entry will have the value of the entry stored * in @xa at @index. You may modify @index during the iteration if you * want to skip or reprocess indices. It is safe to modify the array * during the iteration. At the end of the iteration, @entry will be set * to NULL and @index will have a value less than or equal to max. * * xa_for_each_range() is O(n.log(n)) while xas_for_each() is O(n). You have * to handle your own locking with xas_for_each(), and if you have to unlock * after each iteration, it will also end up being O(n.log(n)). * xa_for_each_range() will spin if it hits a retry entry; if you intend to * see retry entries, you should use the xas_for_each() iterator instead. * The xas_for_each() iterator will expand into more inline code than * xa_for_each_range(). * * Context: Any context. Takes and releases the RCU lock. */ #define xa_for_each_range(xa, index, entry, start, last) \ for (index = start, \ entry = xa_find(xa, &index, last, XA_PRESENT); \ entry; \ entry = xa_find_after(xa, &index, last, XA_PRESENT)) /** * xa_for_each_start() - Iterate over a portion of an XArray. * @xa: XArray. * @index: Index of @entry. * @entry: Entry retrieved from array. * @start: First index to retrieve from array. * * During the iteration, @entry will have the value of the entry stored * in @xa at @index. You may modify @index during the iteration if you * want to skip or reprocess indices. It is safe to modify the array * during the iteration. At the end of the iteration, @entry will be set * to NULL and @index will have a value less than or equal to max. * * xa_for_each_start() is O(n.log(n)) while xas_for_each() is O(n). You have * to handle your own locking with xas_for_each(), and if you have to unlock * after each iteration, it will also end up being O(n.log(n)). * xa_for_each_start() will spin if it hits a retry entry; if you intend to * see retry entries, you should use the xas_for_each() iterator instead. * The xas_for_each() iterator will expand into more inline code than * xa_for_each_start(). * * Context: Any context. Takes and releases the RCU lock. */ #define xa_for_each_start(xa, index, entry, start) \ xa_for_each_range(xa, index, entry, start, ULONG_MAX) /** * xa_for_each() - Iterate over present entries in an XArray. * @xa: XArray. * @index: Index of @entry. * @entry: Entry retrieved from array. * * During the iteration, @entry will have the value of the entry stored * in @xa at @index. You may modify @index during the iteration if you want * to skip or reprocess indices. It is safe to modify the array during the * iteration. At the end of the iteration, @entry will be set to NULL and * @index will have a value less than or equal to max. * * xa_for_each() is O(n.log(n)) while xas_for_each() is O(n). You have * to handle your own locking with xas_for_each(), and if you have to unlock * after each iteration, it will also end up being O(n.log(n)). xa_for_each() * will spin if it hits a retry entry; if you intend to see retry entries, * you should use the xas_for_each() iterator instead. The xas_for_each() * iterator will expand into more inline code than xa_for_each(). * * Context: Any context. Takes and releases the RCU lock. */ #define xa_for_each(xa, index, entry) \ xa_for_each_start(xa, index, entry, 0) /** * xa_for_each_marked() - Iterate over marked entries in an XArray. * @xa: XArray. * @index: Index of @entry. * @entry: Entry retrieved from array. * @filter: Selection criterion. * * During the iteration, @entry will have the value of the entry stored * in @xa at @index. The iteration will skip all entries in the array * which do not match @filter. You may modify @index during the iteration * if you want to skip or reprocess indices. It is safe to modify the array * during the iteration. At the end of the iteration, @entry will be set to * NULL and @index will have a value less than or equal to max. * * xa_for_each_marked() is O(n.log(n)) while xas_for_each_marked() is O(n). * You have to handle your own locking with xas_for_each(), and if you have * to unlock after each iteration, it will also end up being O(n.log(n)). * xa_for_each_marked() will spin if it hits a retry entry; if you intend to * see retry entries, you should use the xas_for_each_marked() iterator * instead. The xas_for_each_marked() iterator will expand into more inline * code than xa_for_each_marked(). * * Context: Any context. Takes and releases the RCU lock. */ #define xa_for_each_marked(xa, index, entry, filter) \ for (index = 0, entry = xa_find(xa, &index, ULONG_MAX, filter); \ entry; entry = xa_find_after(xa, &index, ULONG_MAX, filter)) #define xa_trylock(xa) spin_trylock(&(xa)->xa_lock) #define xa_lock(xa) spin_lock(&(xa)->xa_lock) #define xa_unlock(xa) spin_unlock(&(xa)->xa_lock) #define xa_lock_bh(xa) spin_lock_bh(&(xa)->xa_lock) #define xa_unlock_bh(xa) spin_unlock_bh(&(xa)->xa_lock) #define xa_lock_irq(xa) spin_lock_irq(&(xa)->xa_lock) #define xa_unlock_irq(xa) spin_unlock_irq(&(xa)->xa_lock) #define xa_lock_irqsave(xa, flags) \ spin_lock_irqsave(&(xa)->xa_lock, flags) #define xa_unlock_irqrestore(xa, flags) \ spin_unlock_irqrestore(&(xa)->xa_lock, flags) #define xa_lock_nested(xa, subclass) \ spin_lock_nested(&(xa)->xa_lock, subclass) #define xa_lock_bh_nested(xa, subclass) \ spin_lock_bh_nested(&(xa)->xa_lock, subclass) #define xa_lock_irq_nested(xa, subclass) \ spin_lock_irq_nested(&(xa)->xa_lock, subclass) #define xa_lock_irqsave_nested(xa, flags, subclass) \ spin_lock_irqsave_nested(&(xa)->xa_lock, flags, subclass) /* * Versions of the normal API which require the caller to hold the * xa_lock. If the GFP flags allow it, they will drop the lock to * allocate memory, then reacquire it afterwards. These functions * may also re-enable interrupts if the XArray flags indicate the * locking should be interrupt safe. */ void *__xa_erase(struct xarray *, unsigned long index); void *__xa_store(struct xarray *, unsigned long index, void *entry, gfp_t); void *__xa_cmpxchg(struct xarray *, unsigned long index, void *old, void *entry, gfp_t); int __must_check __xa_insert(struct xarray *, unsigned long index, void *entry, gfp_t); int __must_check __xa_alloc(struct xarray *, u32 *id, void *entry, struct xa_limit, gfp_t); int __must_check __xa_alloc_cyclic(struct xarray *, u32 *id, void *entry, struct xa_limit, u32 *next, gfp_t); void __xa_set_mark(struct xarray *, unsigned long index, xa_mark_t); void __xa_clear_mark(struct xarray *, unsigned long index, xa_mark_t); /** * xa_store_bh() - Store this entry in the XArray. * @xa: XArray. * @index: Index into array. * @entry: New entry. * @gfp: Memory allocation flags. * * This function is like calling xa_store() except it disables softirqs * while holding the array lock. * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. * Return: The old entry at this index or xa_err() if an error happened. */ static inline void *xa_store_bh(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) { void *curr; might_alloc(gfp); xa_lock_bh(xa); curr = __xa_store(xa, index, entry, gfp); xa_unlock_bh(xa); return curr; } /** * xa_store_irq() - Store this entry in the XArray. * @xa: XArray. * @index: Index into array. * @entry: New entry. * @gfp: Memory allocation flags. * * This function is like calling xa_store() except it disables interrupts * while holding the array lock. * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. * Return: The old entry at this index or xa_err() if an error happened. */ static inline void *xa_store_irq(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) { void *curr; might_alloc(gfp); xa_lock_irq(xa); curr = __xa_store(xa, index, entry, gfp); xa_unlock_irq(xa); return curr; } /** * xa_erase_bh() - Erase this entry from the XArray. * @xa: XArray. * @index: Index of entry. * * After this function returns, loading from @index will return %NULL. * If the index is part of a multi-index entry, all indices will be erased * and none of the entries will be part of a multi-index entry. * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. * Return: The entry which used to be at this index. */ static inline void *xa_erase_bh(struct xarray *xa, unsigned long index) { void *entry; xa_lock_bh(xa); entry = __xa_erase(xa, index); xa_unlock_bh(xa); return entry; } /** * xa_erase_irq() - Erase this entry from the XArray. * @xa: XArray. * @index: Index of entry. * * After this function returns, loading from @index will return %NULL. * If the index is part of a multi-index entry, all indices will be erased * and none of the entries will be part of a multi-index entry. * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. * Return: The entry which used to be at this index. */ static inline void *xa_erase_irq(struct xarray *xa, unsigned long index) { void *entry; xa_lock_irq(xa); entry = __xa_erase(xa, index); xa_unlock_irq(xa); return entry; } /** * xa_cmpxchg() - Conditionally replace an entry in the XArray. * @xa: XArray. * @index: Index into array. * @old: Old value to test against. * @entry: New value to place in array. * @gfp: Memory allocation flags. * * If the entry at @index is the same as @old, replace it with @entry. * If the return value is equal to @old, then the exchange was successful. * * Context: Any context. Takes and releases the xa_lock. May sleep * if the @gfp flags permit. * Return: The old value at this index or xa_err() if an error happened. */ static inline void *xa_cmpxchg(struct xarray *xa, unsigned long index, void *old, void *entry, gfp_t gfp) { void *curr; might_alloc(gfp); xa_lock(xa); curr = __xa_cmpxchg(xa, index, old, entry, gfp); xa_unlock(xa); return curr; } /** * xa_cmpxchg_bh() - Conditionally replace an entry in the XArray. * @xa: XArray. * @index: Index into array. * @old: Old value to test against. * @entry: New value to place in array. * @gfp: Memory allocation flags. * * This function is like calling xa_cmpxchg() except it disables softirqs * while holding the array lock. * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. May sleep if the @gfp flags permit. * Return: The old value at this index or xa_err() if an error happened. */ static inline void *xa_cmpxchg_bh(struct xarray *xa, unsigned long index, void *old, void *entry, gfp_t gfp) { void *curr; might_alloc(gfp); xa_lock_bh(xa); curr = __xa_cmpxchg(xa, index, old, entry, gfp); xa_unlock_bh(xa); return curr; } /** * xa_cmpxchg_irq() - Conditionally replace an entry in the XArray. * @xa: XArray. * @index: Index into array. * @old: Old value to test against. * @entry: New value to place in array. * @gfp: Memory allocation flags. * * This function is like calling xa_cmpxchg() except it disables interrupts * while holding the array lock. * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. May sleep if the @gfp flags permit. * Return: The old value at this index or xa_err() if an error happened. */ static inline void *xa_cmpxchg_irq(struct xarray *xa, unsigned long index, void *old, void *entry, gfp_t gfp) { void *curr; might_alloc(gfp); xa_lock_irq(xa); curr = __xa_cmpxchg(xa, index, old, entry, gfp); xa_unlock_irq(xa); return curr; } /** * xa_insert() - Store this entry in the XArray unless another entry is * already present. * @xa: XArray. * @index: Index into array. * @entry: New entry. * @gfp: Memory allocation flags. * * Inserting a NULL entry will store a reserved entry (like xa_reserve()) * if no entry is present. Inserting will fail if a reserved entry is * present, even though loading from this index will return NULL. * * Context: Any context. Takes and releases the xa_lock. May sleep if * the @gfp flags permit. * Return: 0 if the store succeeded. -EBUSY if another entry was present. * -ENOMEM if memory could not be allocated. */ static inline int __must_check xa_insert(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) { int err; might_alloc(gfp); xa_lock(xa); err = __xa_insert(xa, index, entry, gfp); xa_unlock(xa); return err; } /** * xa_insert_bh() - Store this entry in the XArray unless another entry is * already present. * @xa: XArray. * @index: Index into array. * @entry: New entry. * @gfp: Memory allocation flags. * * Inserting a NULL entry will store a reserved entry (like xa_reserve()) * if no entry is present. Inserting will fail if a reserved entry is * present, even though loading from this index will return NULL. * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. May sleep if the @gfp flags permit. * Return: 0 if the store succeeded. -EBUSY if another entry was present. * -ENOMEM if memory could not be allocated. */ static inline int __must_check xa_insert_bh(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) { int err; might_alloc(gfp); xa_lock_bh(xa); err = __xa_insert(xa, index, entry, gfp); xa_unlock_bh(xa); return err; } /** * xa_insert_irq() - Store this entry in the XArray unless another entry is * already present. * @xa: XArray. * @index: Index into array. * @entry: New entry. * @gfp: Memory allocation flags. * * Inserting a NULL entry will store a reserved entry (like xa_reserve()) * if no entry is present. Inserting will fail if a reserved entry is * present, even though loading from this index will return NULL. * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. May sleep if the @gfp flags permit. * Return: 0 if the store succeeded. -EBUSY if another entry was present. * -ENOMEM if memory could not be allocated. */ static inline int __must_check xa_insert_irq(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) { int err; might_alloc(gfp); xa_lock_irq(xa); err = __xa_insert(xa, index, entry, gfp); xa_unlock_irq(xa); return err; } /** * xa_alloc() - Find somewhere to store this entry in the XArray. * @xa: XArray. * @id: Pointer to ID. * @entry: New entry. * @limit: Range of ID to allocate. * @gfp: Memory allocation flags. * * Finds an empty entry in @xa between @limit.min and @limit.max, * stores the index into the @id pointer, then stores the entry at * that index. A concurrent lookup will not see an uninitialised @id. * * Context: Any context. Takes and releases the xa_lock. May sleep if * the @gfp flags permit. * Return: 0 on success, -ENOMEM if memory could not be allocated or * -EBUSY if there are no free entries in @limit. */ static inline __must_check int xa_alloc(struct xarray *xa, u32 *id, void *entry, struct xa_limit limit, gfp_t gfp) { int err; might_alloc(gfp); xa_lock(xa); err = __xa_alloc(xa, id, entry, limit, gfp); xa_unlock(xa); return err; } /** * xa_alloc_bh() - Find somewhere to store this entry in the XArray. * @xa: XArray. * @id: Pointer to ID. * @entry: New entry. * @limit: Range of ID to allocate. * @gfp: Memory allocation flags. * * Finds an empty entry in @xa between @limit.min and @limit.max, * stores the index into the @id pointer, then stores the entry at * that index. A concurrent lookup will not see an uninitialised @id. * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. May sleep if the @gfp flags permit. * Return: 0 on success, -ENOMEM if memory could not be allocated or * -EBUSY if there are no free entries in @limit. */ static inline int __must_check xa_alloc_bh(struct xarray *xa, u32 *id, void *entry, struct xa_limit limit, gfp_t gfp) { int err; might_alloc(gfp); xa_lock_bh(xa); err = __xa_alloc(xa, id, entry, limit, gfp); xa_unlock_bh(xa); return err; } /** * xa_alloc_irq() - Find somewhere to store this entry in the XArray. * @xa: XArray. * @id: Pointer to ID. * @entry: New entry. * @limit: Range of ID to allocate. * @gfp: Memory allocation flags. * * Finds an empty entry in @xa between @limit.min and @limit.max, * stores the index into the @id pointer, then stores the entry at * that index. A concurrent lookup will not see an uninitialised @id. * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. May sleep if the @gfp flags permit. * Return: 0 on success, -ENOMEM if memory could not be allocated or * -EBUSY if there are no free entries in @limit. */ static inline int __must_check xa_alloc_irq(struct xarray *xa, u32 *id, void *entry, struct xa_limit limit, gfp_t gfp) { int err; might_alloc(gfp); xa_lock_irq(xa); err = __xa_alloc(xa, id, entry, limit, gfp); xa_unlock_irq(xa); return err; } /** * xa_alloc_cyclic() - Find somewhere to store this entry in the XArray. * @xa: XArray. * @id: Pointer to ID. * @entry: New entry. * @limit: Range of allocated ID. * @next: Pointer to next ID to allocate. * @gfp: Memory allocation flags. * * Finds an empty entry in @xa between @limit.min and @limit.max, * stores the index into the @id pointer, then stores the entry at * that index. A concurrent lookup will not see an uninitialised @id. * The search for an empty entry will start at @next and will wrap * around if necessary. * * Context: Any context. Takes and releases the xa_lock. May sleep if * the @gfp flags permit. * Return: 0 if the allocation succeeded without wrapping. 1 if the * allocation succeeded after wrapping, -ENOMEM if memory could not be * allocated or -EBUSY if there are no free entries in @limit. */ static inline int xa_alloc_cyclic(struct xarray *xa, u32 *id, void *entry, struct xa_limit limit, u32 *next, gfp_t gfp) { int err; might_alloc(gfp); xa_lock(xa); err = __xa_alloc_cyclic(xa, id, entry, limit, next, gfp); xa_unlock(xa); return err; } /** * xa_alloc_cyclic_bh() - Find somewhere to store this entry in the XArray. * @xa: XArray. * @id: Pointer to ID. * @entry: New entry. * @limit: Range of allocated ID. * @next: Pointer to next ID to allocate. * @gfp: Memory allocation flags. * * Finds an empty entry in @xa between @limit.min and @limit.max, * stores the index into the @id pointer, then stores the entry at * that index. A concurrent lookup will not see an uninitialised @id. * The search for an empty entry will start at @next and will wrap * around if necessary. * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. May sleep if the @gfp flags permit. * Return: 0 if the allocation succeeded without wrapping. 1 if the * allocation succeeded after wrapping, -ENOMEM if memory could not be * allocated or -EBUSY if there are no free entries in @limit. */ static inline int xa_alloc_cyclic_bh(struct xarray *xa, u32 *id, void *entry, struct xa_limit limit, u32 *next, gfp_t gfp) { int err; might_alloc(gfp); xa_lock_bh(xa); err = __xa_alloc_cyclic(xa, id, entry, limit, next, gfp); xa_unlock_bh(xa); return err; } /** * xa_alloc_cyclic_irq() - Find somewhere to store this entry in the XArray. * @xa: XArray. * @id: Pointer to ID. * @entry: New entry. * @limit: Range of allocated ID. * @next: Pointer to next ID to allocate. * @gfp: Memory allocation flags. * * Finds an empty entry in @xa between @limit.min and @limit.max, * stores the index into the @id pointer, then stores the entry at * that index. A concurrent lookup will not see an uninitialised @id. * The search for an empty entry will start at @next and will wrap * around if necessary. * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. May sleep if the @gfp flags permit. * Return: 0 if the allocation succeeded without wrapping. 1 if the * allocation succeeded after wrapping, -ENOMEM if memory could not be * allocated or -EBUSY if there are no free entries in @limit. */ static inline int xa_alloc_cyclic_irq(struct xarray *xa, u32 *id, void *entry, struct xa_limit limit, u32 *next, gfp_t gfp) { int err; might_alloc(gfp); xa_lock_irq(xa); err = __xa_alloc_cyclic(xa, id, entry, limit, next, gfp); xa_unlock_irq(xa); return err; } /** * xa_reserve() - Reserve this index in the XArray. * @xa: XArray. * @index: Index into array. * @gfp: Memory allocation flags. * * Ensures there is somewhere to store an entry at @index in the array. * If there is already something stored at @index, this function does * nothing. If there was nothing there, the entry is marked as reserved. * Loading from a reserved entry returns a %NULL pointer. * * If you do not use the entry that you have reserved, call xa_release() * or xa_erase() to free any unnecessary memory. * * Context: Any context. Takes and releases the xa_lock. * May sleep if the @gfp flags permit. * Return: 0 if the reservation succeeded or -ENOMEM if it failed. */ static inline __must_check int xa_reserve(struct xarray *xa, unsigned long index, gfp_t gfp) { return xa_err(xa_cmpxchg(xa, index, NULL, XA_ZERO_ENTRY, gfp)); } /** * xa_reserve_bh() - Reserve this index in the XArray. * @xa: XArray. * @index: Index into array. * @gfp: Memory allocation flags. * * A softirq-disabling version of xa_reserve(). * * Context: Any context. Takes and releases the xa_lock while * disabling softirqs. * Return: 0 if the reservation succeeded or -ENOMEM if it failed. */ static inline __must_check int xa_reserve_bh(struct xarray *xa, unsigned long index, gfp_t gfp) { return xa_err(xa_cmpxchg_bh(xa, index, NULL, XA_ZERO_ENTRY, gfp)); } /** * xa_reserve_irq() - Reserve this index in the XArray. * @xa: XArray. * @index: Index into array. * @gfp: Memory allocation flags. * * An interrupt-disabling version of xa_reserve(). * * Context: Process context. Takes and releases the xa_lock while * disabling interrupts. * Return: 0 if the reservation succeeded or -ENOMEM if it failed. */ static inline __must_check int xa_reserve_irq(struct xarray *xa, unsigned long index, gfp_t gfp) { return xa_err(xa_cmpxchg_irq(xa, index, NULL, XA_ZERO_ENTRY, gfp)); } /** * xa_release() - Release a reserved entry. * @xa: XArray. * @index: Index of entry. * * After calling xa_reserve(), you can call this function to release the * reservation. If the entry at @index has been stored to, this function * will do nothing. */ static inline void xa_release(struct xarray *xa, unsigned long index) { xa_cmpxchg(xa, index, XA_ZERO_ENTRY, NULL, 0); } /* Everything below here is the Advanced API. Proceed with caution. */ /* * The xarray is constructed out of a set of 'chunks' of pointers. Choosing * the best chunk size requires some tradeoffs. A power of two recommends * itself so that we can walk the tree based purely on shifts and masks. * Generally, the larger the better; as the number of slots per level of the * tree increases, the less tall the tree needs to be. But that needs to be * balanced against the memory consumption of each node. On a 64-bit system, * xa_node is currently 576 bytes, and we get 7 of them per 4kB page. If we * doubled the number of slots per node, we'd get only 3 nodes per 4kB page. */ #ifndef XA_CHUNK_SHIFT #define XA_CHUNK_SHIFT (CONFIG_BASE_SMALL ? 4 : 6) #endif #define XA_CHUNK_SIZE (1UL << XA_CHUNK_SHIFT) #define XA_CHUNK_MASK (XA_CHUNK_SIZE - 1) #define XA_MAX_MARKS 3 #define XA_MARK_LONGS DIV_ROUND_UP(XA_CHUNK_SIZE, BITS_PER_LONG) /* * @count is the count of every non-NULL element in the ->slots array * whether that is a value entry, a retry entry, a user pointer, * a sibling entry or a pointer to the next level of the tree. * @nr_values is the count of every element in ->slots which is * either a value entry or a sibling of a value entry. */ struct xa_node { unsigned char shift; /* Bits remaining in each slot */ unsigned char offset; /* Slot offset in parent */ unsigned char count; /* Total entry count */ unsigned char nr_values; /* Value entry count */ struct xa_node __rcu *parent; /* NULL at top of tree */ struct xarray *array; /* The array we belong to */ union { struct list_head private_list; /* For tree user */ struct rcu_head rcu_head; /* Used when freeing node */ }; void __rcu *slots[XA_CHUNK_SIZE]; union { unsigned long tags[XA_MAX_MARKS][XA_MARK_LONGS]; unsigned long marks[XA_MAX_MARKS][XA_MARK_LONGS]; }; }; void xa_dump(const struct xarray *); void xa_dump_node(const struct xa_node *); #ifdef XA_DEBUG #define XA_BUG_ON(xa, x) do { \ if (x) { \ xa_dump(xa); \ BUG(); \ } \ } while (0) #define XA_NODE_BUG_ON(node, x) do { \ if (x) { \ if (node) xa_dump_node(node); \ BUG(); \ } \ } while (0) #else #define XA_BUG_ON(xa, x) do { } while (0) #define XA_NODE_BUG_ON(node, x) do { } while (0) #endif /* Private */ static inline void *xa_head(const struct xarray *xa) { return rcu_dereference_check(xa->xa_head, lockdep_is_held(&xa->xa_lock)); } /* Private */ static inline void *xa_head_locked(const struct xarray *xa) { return rcu_dereference_protected(xa->xa_head, lockdep_is_held(&xa->xa_lock)); } /* Private */ static inline void *xa_entry(const struct xarray *xa, const struct xa_node *node, unsigned int offset) { XA_NODE_BUG_ON(node, offset >= XA_CHUNK_SIZE); return rcu_dereference_check(node->slots[offset], lockdep_is_held(&xa->xa_lock)); } /* Private */ static inline void *xa_entry_locked(const struct xarray *xa, const struct xa_node *node, unsigned int offset) { XA_NODE_BUG_ON(node, offset >= XA_CHUNK_SIZE); return rcu_dereference_protected(node->slots[offset], lockdep_is_held(&xa->xa_lock)); } /* Private */ static inline struct xa_node *xa_parent(const struct xarray *xa, const struct xa_node *node) { return rcu_dereference_check(node->parent, lockdep_is_held(&xa->xa_lock)); } /* Private */ static inline struct xa_node *xa_parent_locked(const struct xarray *xa, const struct xa_node *node) { return rcu_dereference_protected(node->parent, lockdep_is_held(&xa->xa_lock)); } /* Private */ static inline void *xa_mk_node(const struct xa_node *node) { return (void *)((unsigned long)node | 2); } /* Private */ static inline struct xa_node *xa_to_node(const void *entry) { return (struct xa_node *)((unsigned long)entry - 2); } /* Private */ static inline bool xa_is_node(const void *entry) { return xa_is_internal(entry) && (unsigned long)entry > 4096; } /* Private */ static inline void *xa_mk_sibling(unsigned int offset) { return xa_mk_internal(offset); } /* Private */ static inline unsigned long xa_to_sibling(const void *entry) { return xa_to_internal(entry); } /** * xa_is_sibling() - Is the entry a sibling entry? * @entry: Entry retrieved from the XArray * * Return: %true if the entry is a sibling entry. */ static inline bool xa_is_sibling(const void *entry) { return IS_ENABLED(CONFIG_XARRAY_MULTI) && xa_is_internal(entry) && (entry < xa_mk_sibling(XA_CHUNK_SIZE - 1)); } #define XA_RETRY_ENTRY xa_mk_internal(256) /** * xa_is_retry() - Is the entry a retry entry? * @entry: Entry retrieved from the XArray * * Return: %true if the entry is a retry entry. */ static inline bool xa_is_retry(const void *entry) { return unlikely(entry == XA_RETRY_ENTRY); } /** * xa_is_advanced() - Is the entry only permitted for the advanced API? * @entry: Entry to be stored in the XArray. * * Return: %true if the entry cannot be stored by the normal API. */ static inline bool xa_is_advanced(const void *entry) { return xa_is_internal(entry) && (entry <= XA_RETRY_ENTRY); } /** * typedef xa_update_node_t - A callback function from the XArray. * @node: The node which is being processed * * This function is called every time the XArray updates the count of * present and value entries in a node. It allows advanced users to * maintain the private_list in the node. * * Context: The xa_lock is held and interrupts may be disabled. * Implementations should not drop the xa_lock, nor re-enable * interrupts. */ typedef void (*xa_update_node_t)(struct xa_node *node); void xa_delete_node(struct xa_node *, xa_update_node_t); /* * The xa_state is opaque to its users. It contains various different pieces * of state involved in the current operation on the XArray. It should be * declared on the stack and passed between the various internal routines. * The various elements in it should not be accessed directly, but only * through the provided accessor functions. The below documentation is for * the benefit of those working on the code, not for users of the XArray. * * @xa_node usually points to the xa_node containing the slot we're operating * on (and @xa_offset is the offset in the slots array). If there is a * single entry in the array at index 0, there are no allocated xa_nodes to * point to, and so we store %NULL in @xa_node. @xa_node is set to * the value %XAS_RESTART if the xa_state is not walked to the correct * position in the tree of nodes for this operation. If an error occurs * during an operation, it is set to an %XAS_ERROR value. If we run off the * end of the allocated nodes, it is set to %XAS_BOUNDS. */ struct xa_state { struct xarray *xa; unsigned long xa_index; unsigned char xa_shift; unsigned char xa_sibs; unsigned char xa_offset; unsigned char xa_pad; /* Helps gcc generate better code */ struct xa_node *xa_node; struct xa_node *xa_alloc; xa_update_node_t xa_update; }; /* * We encode errnos in the xas->xa_node. If an error has happened, we need to * drop the lock to fix it, and once we've done so the xa_state is invalid. */ #define XA_ERROR(errno) ((struct xa_node *)(((unsigned long)errno << 2) | 2UL)) #define XAS_BOUNDS ((struct xa_node *)1UL) #define XAS_RESTART ((struct xa_node *)3UL) #define __XA_STATE(array, index, shift, sibs) { \ .xa = array, \ .xa_index = index, \ .xa_shift = shift, \ .xa_sibs = sibs, \ .xa_offset = 0, \ .xa_pad = 0, \ .xa_node = XAS_RESTART, \ .xa_alloc = NULL, \ .xa_update = NULL \ } /** * XA_STATE() - Declare an XArray operation state. * @name: Name of this operation state (usually xas). * @array: Array to operate on. * @index: Initial index of interest. * * Declare and initialise an xa_state on the stack. */ #define XA_STATE(name, array, index) \ struct xa_state name = __XA_STATE(array, index, 0, 0) /** * XA_STATE_ORDER() - Declare an XArray operation state. * @name: Name of this operation state (usually xas). * @array: Array to operate on. * @index: Initial index of interest. * @order: Order of entry. * * Declare and initialise an xa_state on the stack. This variant of * XA_STATE() allows you to specify the 'order' of the element you * want to operate on.` */ #define XA_STATE_ORDER(name, array, index, order) \ struct xa_state name = __XA_STATE(array, \ (index >> order) << order, \ order - (order % XA_CHUNK_SHIFT), \ (1U << (order % XA_CHUNK_SHIFT)) - 1) #define xas_marked(xas, mark) xa_marked((xas)->xa, (mark)) #define xas_trylock(xas) xa_trylock((xas)->xa) #define xas_lock(xas) xa_lock((xas)->xa) #define xas_unlock(xas) xa_unlock((xas)->xa) #define xas_lock_bh(xas) xa_lock_bh((xas)->xa) #define xas_unlock_bh(xas) xa_unlock_bh((xas)->xa) #define xas_lock_irq(xas) xa_lock_irq((xas)->xa) #define xas_unlock_irq(xas) xa_unlock_irq((xas)->xa) #define xas_lock_irqsave(xas, flags) \ xa_lock_irqsave((xas)->xa, flags) #define xas_unlock_irqrestore(xas, flags) \ xa_unlock_irqrestore((xas)->xa, flags) /** * xas_error() - Return an errno stored in the xa_state. * @xas: XArray operation state. * * Return: 0 if no error has been noted. A negative errno if one has. */ static inline int xas_error(const struct xa_state *xas) { return xa_err(xas->xa_node); } /** * xas_set_err() - Note an error in the xa_state. * @xas: XArray operation state. * @err: Negative error number. * * Only call this function with a negative @err; zero or positive errors * will probably not behave the way you think they should. If you want * to clear the error from an xa_state, use xas_reset(). */ static inline void xas_set_err(struct xa_state *xas, long err) { xas->xa_node = XA_ERROR(err); } /** * xas_invalid() - Is the xas in a retry or error state? * @xas: XArray operation state. * * Return: %true if the xas cannot be used for operations. */ static inline bool xas_invalid(const struct xa_state *xas) { return (unsigned long)xas->xa_node & 3; } /** * xas_valid() - Is the xas a valid cursor into the array? * @xas: XArray operation state. * * Return: %true if the xas can be used for operations. */ static inline bool xas_valid(const struct xa_state *xas) { return !xas_invalid(xas); } /** * xas_is_node() - Does the xas point to a node? * @xas: XArray operation state. * * Return: %true if the xas currently references a node. */ static inline bool xas_is_node(const struct xa_state *xas) { return xas_valid(xas) && xas->xa_node; } /* True if the pointer is something other than a node */ static inline bool xas_not_node(struct xa_node *node) { return ((unsigned long)node & 3) || !node; } /* True if the node represents RESTART or an error */ static inline bool xas_frozen(struct xa_node *node) { return (unsigned long)node & 2; } /* True if the node represents head-of-tree, RESTART or BOUNDS */ static inline bool xas_top(struct xa_node *node) { return node <= XAS_RESTART; } /** * xas_reset() - Reset an XArray operation state. * @xas: XArray operation state. * * Resets the error or walk state of the @xas so future walks of the * array will start from the root. Use this if you have dropped the * xarray lock and want to reuse the xa_state. * * Context: Any context. */ static inline void xas_reset(struct xa_state *xas) { xas->xa_node = XAS_RESTART; } /** * xas_retry() - Retry the operation if appropriate. * @xas: XArray operation state. * @entry: Entry from xarray. * * The advanced functions may sometimes return an internal entry, such as * a retry entry or a zero entry. This function sets up the @xas to restart * the walk from the head of the array if needed. * * Context: Any context. * Return: true if the operation needs to be retried. */ static inline bool xas_retry(struct xa_state *xas, const void *entry) { if (xa_is_zero(entry)) return true; if (!xa_is_retry(entry)) return false; xas_reset(xas); return true; } void *xas_load(struct xa_state *); void *xas_store(struct xa_state *, void *entry); void *xas_find(struct xa_state *, unsigned long max); void *xas_find_conflict(struct xa_state *); bool xas_get_mark(const struct xa_state *, xa_mark_t); void xas_set_mark(const struct xa_state *, xa_mark_t); void xas_clear_mark(const struct xa_state *, xa_mark_t); void *xas_find_marked(struct xa_state *, unsigned long max, xa_mark_t); void xas_init_marks(const struct xa_state *); bool xas_nomem(struct xa_state *, gfp_t); void xas_pause(struct xa_state *); void xas_create_range(struct xa_state *); #ifdef CONFIG_XARRAY_MULTI int xa_get_order(struct xarray *, unsigned long index); void xas_split(struct xa_state *, void *entry, unsigned int order); void xas_split_alloc(struct xa_state *, void *entry, unsigned int order, gfp_t); #else static inline int xa_get_order(struct xarray *xa, unsigned long index) { return 0; } static inline void xas_split(struct xa_state *xas, void *entry, unsigned int order) { xas_store(xas, entry); } static inline void xas_split_alloc(struct xa_state *xas, void *entry, unsigned int order, gfp_t gfp) { } #endif /** * xas_reload() - Refetch an entry from the xarray. * @xas: XArray operation state. * * Use this function to check that a previously loaded entry still has * the same value. This is useful for the lockless pagecache lookup where * we walk the array with only the RCU lock to protect us, lock the page, * then check that the page hasn't moved since we looked it up. * * The caller guarantees that @xas is still valid. If it may be in an * error or restart state, call xas_load() instead. * * Return: The entry at this location in the xarray. */ static inline void *xas_reload(struct xa_state *xas) { struct xa_node *node = xas->xa_node; void *entry; char offset; if (!node) return xa_head(xas->xa); if (IS_ENABLED(CONFIG_XARRAY_MULTI)) { offset = (xas->xa_index >> node->shift) & XA_CHUNK_MASK; entry = xa_entry(xas->xa, node, offset); if (!xa_is_sibling(entry)) return entry; offset = xa_to_sibling(entry); } else { offset = xas->xa_offset; } return xa_entry(xas->xa, node, offset); } /** * xas_set() - Set up XArray operation state for a different index. * @xas: XArray operation state. * @index: New index into the XArray. * * Move the operation state to refer to a different index. This will * have the effect of starting a walk from the top; see xas_next() * to move to an adjacent index. */ static inline void xas_set(struct xa_state *xas, unsigned long index) { xas->xa_index = index; xas->xa_node = XAS_RESTART; } /** * xas_set_order() - Set up XArray operation state for a multislot entry. * @xas: XArray operation state. * @index: Target of the operation. * @order: Entry occupies 2^@order indices. */ static inline void xas_set_order(struct xa_state *xas, unsigned long index, unsigned int order) { #ifdef CONFIG_XARRAY_MULTI xas->xa_index = order < BITS_PER_LONG ? (index >> order) << order : 0; xas->xa_shift = order - (order % XA_CHUNK_SHIFT); xas->xa_sibs = (1 << (order % XA_CHUNK_SHIFT)) - 1; xas->xa_node = XAS_RESTART; #else BUG_ON(order > 0); xas_set(xas, index); #endif } /** * xas_set_update() - Set up XArray operation state for a callback. * @xas: XArray operation state. * @update: Function to call when updating a node. * * The XArray can notify a caller after it has updated an xa_node. * This is advanced functionality and is only needed by the page cache. */ static inline void xas_set_update(struct xa_state *xas, xa_update_node_t update) { xas->xa_update = update; } /** * xas_next_entry() - Advance iterator to next present entry. * @xas: XArray operation state. * @max: Highest index to return. * * xas_next_entry() is an inline function to optimise xarray traversal for * speed. It is equivalent to calling xas_find(), and will call xas_find() * for all the hard cases. * * Return: The next present entry after the one currently referred to by @xas. */ static inline void *xas_next_entry(struct xa_state *xas, unsigned long max) { struct xa_node *node = xas->xa_node; void *entry; if (unlikely(xas_not_node(node) || node->shift || xas->xa_offset != (xas->xa_index & XA_CHUNK_MASK))) return xas_find(xas, max); do { if (unlikely(xas->xa_index >= max)) return xas_find(xas, max); if (unlikely(xas->xa_offset == XA_CHUNK_MASK)) return xas_find(xas, max); entry = xa_entry(xas->xa, node, xas->xa_offset + 1); if (unlikely(xa_is_internal(entry))) return xas_find(xas, max); xas->xa_offset++; xas->xa_index++; } while (!entry); return entry; } /* Private */ static inline unsigned int xas_find_chunk(struct xa_state *xas, bool advance, xa_mark_t mark) { unsigned long *addr = xas->xa_node->marks[(__force unsigned)mark]; unsigned int offset = xas->xa_offset; if (advance) offset++; if (XA_CHUNK_SIZE == BITS_PER_LONG) { if (offset < XA_CHUNK_SIZE) { unsigned long data = *addr & (~0UL << offset); if (data) return __ffs(data); } return XA_CHUNK_SIZE; } return find_next_bit(addr, XA_CHUNK_SIZE, offset); } /** * xas_next_marked() - Advance iterator to next marked entry. * @xas: XArray operation state. * @max: Highest index to return. * @mark: Mark to search for. * * xas_next_marked() is an inline function to optimise xarray traversal for * speed. It is equivalent to calling xas_find_marked(), and will call * xas_find_marked() for all the hard cases. * * Return: The next marked entry after the one currently referred to by @xas. */ static inline void *xas_next_marked(struct xa_state *xas, unsigned long max, xa_mark_t mark) { struct xa_node *node = xas->xa_node; void *entry; unsigned int offset; if (unlikely(xas_not_node(node) || node->shift)) return xas_find_marked(xas, max, mark); offset = xas_find_chunk(xas, true, mark); xas->xa_offset = offset; xas->xa_index = (xas->xa_index & ~XA_CHUNK_MASK) + offset; if (xas->xa_index > max) return NULL; if (offset == XA_CHUNK_SIZE) return xas_find_marked(xas, max, mark); entry = xa_entry(xas->xa, node, offset); if (!entry) return xas_find_marked(xas, max, mark); return entry; } /* * If iterating while holding a lock, drop the lock and reschedule * every %XA_CHECK_SCHED loops. */ enum { XA_CHECK_SCHED = 4096, }; /** * xas_for_each() - Iterate over a range of an XArray. * @xas: XArray operation state. * @entry: Entry retrieved from the array. * @max: Maximum index to retrieve from array. * * The loop body will be executed for each entry present in the xarray * between the current xas position and @max. @entry will be set to * the entry retrieved from the xarray. It is safe to delete entries * from the array in the loop body. You should hold either the RCU lock * or the xa_lock while iterating. If you need to drop the lock, call * xas_pause() first. */ #define xas_for_each(xas, entry, max) \ for (entry = xas_find(xas, max); entry; \ entry = xas_next_entry(xas, max)) /** * xas_for_each_marked() - Iterate over a range of an XArray. * @xas: XArray operation state. * @entry: Entry retrieved from the array. * @max: Maximum index to retrieve from array. * @mark: Mark to search for. * * The loop body will be executed for each marked entry in the xarray * between the current xas position and @max. @entry will be set to * the entry retrieved from the xarray. It is safe to delete entries * from the array in the loop body. You should hold either the RCU lock * or the xa_lock while iterating. If you need to drop the lock, call * xas_pause() first. */ #define xas_for_each_marked(xas, entry, max, mark) \ for (entry = xas_find_marked(xas, max, mark); entry; \ entry = xas_next_marked(xas, max, mark)) /** * xas_for_each_conflict() - Iterate over a range of an XArray. * @xas: XArray operation state. * @entry: Entry retrieved from the array. * * The loop body will be executed for each entry in the XArray that * lies within the range specified by @xas. If the loop terminates * normally, @entry will be %NULL. The user may break out of the loop, * which will leave @entry set to the conflicting entry. The caller * may also call xa_set_err() to exit the loop while setting an error * to record the reason. */ #define xas_for_each_conflict(xas, entry) \ while ((entry = xas_find_conflict(xas))) void *__xas_next(struct xa_state *); void *__xas_prev(struct xa_state *); /** * xas_prev() - Move iterator to previous index. * @xas: XArray operation state. * * If the @xas was in an error state, it will remain in an error state * and this function will return %NULL. If the @xas has never been walked, * it will have the effect of calling xas_load(). Otherwise one will be * subtracted from the index and the state will be walked to the correct * location in the array for the next operation. * * If the iterator was referencing index 0, this function wraps * around to %ULONG_MAX. * * Return: The entry at the new index. This may be %NULL or an internal * entry. */ static inline void *xas_prev(struct xa_state *xas) { struct xa_node *node = xas->xa_node; if (unlikely(xas_not_node(node) || node->shift || xas->xa_offset == 0)) return __xas_prev(xas); xas->xa_index--; xas->xa_offset--; return xa_entry(xas->xa, node, xas->xa_offset); } /** * xas_next() - Move state to next index. * @xas: XArray operation state. * * If the @xas was in an error state, it will remain in an error state * and this function will return %NULL. If the @xas has never been walked, * it will have the effect of calling xas_load(). Otherwise one will be * added to the index and the state will be walked to the correct * location in the array for the next operation. * * If the iterator was referencing index %ULONG_MAX, this function wraps * around to 0. * * Return: The entry at the new index. This may be %NULL or an internal * entry. */ static inline void *xas_next(struct xa_state *xas) { struct xa_node *node = xas->xa_node; if (unlikely(xas_not_node(node) || node->shift || xas->xa_offset == XA_CHUNK_MASK)) return __xas_next(xas); xas->xa_index++; xas->xa_offset++; return xa_entry(xas->xa, node, xas->xa_offset); } #endif /* _LINUX_XARRAY_H */ PK ! ���[u u stmmac.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /******************************************************************************* Header file for stmmac platform data Copyright (C) 2009 STMicroelectronics Ltd Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> *******************************************************************************/ #ifndef __STMMAC_PLATFORM_DATA #define __STMMAC_PLATFORM_DATA #include <linux/platform_device.h> #include <linux/phy.h> #define MTL_MAX_RX_QUEUES 8 #define MTL_MAX_TX_QUEUES 8 #define STMMAC_CH_MAX 8 #define STMMAC_RX_COE_NONE 0 #define STMMAC_RX_COE_TYPE1 1 #define STMMAC_RX_COE_TYPE2 2 /* Define the macros for CSR clock range parameters to be passed by * platform code. * This could also be configured at run time using CPU freq framework. */ /* MDC Clock Selection define*/ #define STMMAC_CSR_60_100M 0x0 /* MDC = clk_scr_i/42 */ #define STMMAC_CSR_100_150M 0x1 /* MDC = clk_scr_i/62 */ #define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */ #define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */ #define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ #define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */ /* MTL algorithms identifiers */ #define MTL_TX_ALGORITHM_WRR 0x0 #define MTL_TX_ALGORITHM_WFQ 0x1 #define MTL_TX_ALGORITHM_DWRR 0x2 #define MTL_TX_ALGORITHM_SP 0x3 #define MTL_RX_ALGORITHM_SP 0x4 #define MTL_RX_ALGORITHM_WSP 0x5 /* RX/TX Queue Mode */ #define MTL_QUEUE_AVB 0x0 #define MTL_QUEUE_DCB 0x1 /* The MDC clock could be set higher than the IEEE 802.3 * specified frequency limit 0f 2.5 MHz, by programming a clock divider * of value different than the above defined values. The resultant MDIO * clock frequency of 12.5 MHz is applicable for the interfacing chips * supporting higher MDC clocks. * The MDC clock selection macros need to be defined for MDC clock rate * of 12.5 MHz, corresponding to the following selection. */ #define STMMAC_CSR_I_4 0x8 /* clk_csr_i/4 */ #define STMMAC_CSR_I_6 0x9 /* clk_csr_i/6 */ #define STMMAC_CSR_I_8 0xA /* clk_csr_i/8 */ #define STMMAC_CSR_I_10 0xB /* clk_csr_i/10 */ #define STMMAC_CSR_I_12 0xC /* clk_csr_i/12 */ #define STMMAC_CSR_I_14 0xD /* clk_csr_i/14 */ #define STMMAC_CSR_I_16 0xE /* clk_csr_i/16 */ #define STMMAC_CSR_I_18 0xF /* clk_csr_i/18 */ /* AXI DMA Burst length supported */ #define DMA_AXI_BLEN_4 (1 << 1) #define DMA_AXI_BLEN_8 (1 << 2) #define DMA_AXI_BLEN_16 (1 << 3) #define DMA_AXI_BLEN_32 (1 << 4) #define DMA_AXI_BLEN_64 (1 << 5) #define DMA_AXI_BLEN_128 (1 << 6) #define DMA_AXI_BLEN_256 (1 << 7) #define DMA_AXI_BLEN_ALL (DMA_AXI_BLEN_4 | DMA_AXI_BLEN_8 | DMA_AXI_BLEN_16 \ | DMA_AXI_BLEN_32 | DMA_AXI_BLEN_64 \ | DMA_AXI_BLEN_128 | DMA_AXI_BLEN_256) /* Platfrom data for platform device structure's platform_data field */ struct stmmac_mdio_bus_data { unsigned int phy_mask; unsigned int has_xpcs; unsigned int xpcs_an_inband; int *irqs; int probed_phy_irq; bool needs_reset; }; struct stmmac_dma_cfg { int pbl; int txpbl; int rxpbl; bool pblx8; int fixed_burst; int mixed_burst; bool aal; bool eame; bool multi_msi_en; bool dche; }; #define AXI_BLEN 7 struct stmmac_axi { bool axi_lpi_en; bool axi_xit_frm; u32 axi_wr_osr_lmt; u32 axi_rd_osr_lmt; bool axi_kbbe; u32 axi_blen[AXI_BLEN]; bool axi_fb; bool axi_mb; bool axi_rb; }; #define EST_GCL 1024 struct stmmac_est { struct mutex lock; int enable; u32 btr_reserve[2]; u32 btr_offset[2]; u32 btr[2]; u32 ctr[2]; u32 ter; u32 gcl_unaligned[EST_GCL]; u32 gcl[EST_GCL]; u32 gcl_size; }; struct stmmac_rxq_cfg { u8 mode_to_use; u32 chan; u8 pkt_route; bool use_prio; u32 prio; }; struct stmmac_txq_cfg { u32 weight; u8 mode_to_use; /* Credit Base Shaper parameters */ u32 send_slope; u32 idle_slope; u32 high_credit; u32 low_credit; bool use_prio; u32 prio; int tbs_en; }; /* FPE link state */ enum stmmac_fpe_state { FPE_STATE_OFF = 0, FPE_STATE_CAPABLE = 1, FPE_STATE_ENTERING_ON = 2, FPE_STATE_ON = 3, }; /* FPE link-partner hand-shaking mPacket type */ enum stmmac_mpacket_type { MPACKET_VERIFY = 0, MPACKET_RESPONSE = 1, }; enum stmmac_fpe_task_state_t { __FPE_REMOVING, __FPE_TASK_SCHED, }; struct stmmac_fpe_cfg { bool enable; /* FPE enable */ bool hs_enable; /* FPE handshake enable */ enum stmmac_fpe_state lp_fpe_state; /* Link Partner FPE state */ enum stmmac_fpe_state lo_fpe_state; /* Local station FPE state */ u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ }; struct stmmac_safety_feature_cfg { u32 tsoee; u32 mrxpee; u32 mestee; u32 mrxee; u32 mtxee; u32 epsi; u32 edpp; u32 prtyen; u32 tmouten; }; struct plat_stmmacenet_data { int bus_id; int phy_addr; int interface; phy_interface_t phy_interface; struct stmmac_mdio_bus_data *mdio_bus_data; struct device_node *phy_node; struct device_node *phylink_node; struct device_node *mdio_node; struct stmmac_dma_cfg *dma_cfg; struct stmmac_est *est; struct stmmac_fpe_cfg *fpe_cfg; struct stmmac_safety_feature_cfg *safety_feat_cfg; int clk_csr; int has_gmac; int enh_desc; int tx_coe; int rx_coe; int bugged_jumbo; int pmt; int force_sf_dma_mode; int force_thresh_dma_mode; int riwt_off; int max_speed; int maxmtu; int multicast_filter_bins; int unicast_filter_entries; int tx_fifo_size; int rx_fifo_size; u32 addr64; u32 rx_queues_to_use; u32 tx_queues_to_use; u8 rx_sched_algorithm; u8 tx_sched_algorithm; struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES]; struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES]; void (*fix_mac_speed)(void *priv, unsigned int speed); int (*serdes_powerup)(struct net_device *ndev, void *priv); void (*serdes_powerdown)(struct net_device *ndev, void *priv); void (*speed_mode_2500)(struct net_device *ndev, void *priv); void (*ptp_clk_freq_config)(void *priv); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); struct mac_device_info *(*setup)(void *priv); int (*clks_config)(void *priv, bool enabled); int (*crosststamp)(ktime_t *device, struct system_counterval_t *system, void *ctx); void (*dump_debug_regs)(void *priv); void *bsp_priv; struct clk *stmmac_clk; struct clk *pclk; struct clk *clk_ptp_ref; unsigned int clk_ptp_rate; unsigned int clk_ref_rate; unsigned int mult_fact_100ns; s32 ptp_max_adj; struct reset_control *stmmac_rst; struct reset_control *stmmac_ahb_rst; struct stmmac_axi *axi; int has_gmac4; bool has_sun8i; bool tso_en; int rss_en; int mac_port_sel_speed; bool en_tx_lpi_clockgating; bool rx_clk_runs_in_lpi; int has_xgmac; bool vlan_fail_q_en; u8 vlan_fail_q; unsigned int eee_usecs_rate; struct pci_dev *pdev; bool has_crossts; int int_snapshot_num; int ext_snapshot_num; bool int_snapshot_en; bool ext_snapshot_en; bool multi_msi_en; int msi_mac_vec; int msi_wol_vec; int msi_lpi_vec; int msi_sfty_ce_vec; int msi_sfty_ue_vec; int msi_rx_base_vec; int msi_tx_base_vec; bool use_phy_wol; bool sph_disable; }; #endif PK ! �N� auto_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 1997 Transmeta Corporation - All Rights Reserved */ #ifndef _LINUX_AUTO_FS_H #define _LINUX_AUTO_FS_H #include <linux/fs.h> #include <linux/ioctl.h> #include <uapi/linux/auto_fs.h> #endif /* _LINUX_AUTO_FS_H */ PK ! � ��� � percpu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PERCPU_H #define __LINUX_PERCPU_H #include <linux/mmdebug.h> #include <linux/preempt.h> #include <linux/smp.h> #include <linux/cpumask.h> #include <linux/printk.h> #include <linux/pfn.h> #include <linux/init.h> #include <linux/cleanup.h> #include <asm/percpu.h> /* enough to cover all DEFINE_PER_CPUs in modules */ #ifdef CONFIG_MODULES #define PERCPU_MODULE_RESERVE (8 << 10) #else #define PERCPU_MODULE_RESERVE 0 #endif /* minimum unit size, also is the maximum supported allocation size */ #define PCPU_MIN_UNIT_SIZE PFN_ALIGN(32 << 10) /* minimum allocation size and shift in bytes */ #define PCPU_MIN_ALLOC_SHIFT 2 #define PCPU_MIN_ALLOC_SIZE (1 << PCPU_MIN_ALLOC_SHIFT) /* * The PCPU_BITMAP_BLOCK_SIZE must be the same size as PAGE_SIZE as the * updating of hints is used to manage the nr_empty_pop_pages in both * the chunk and globally. */ #define PCPU_BITMAP_BLOCK_SIZE PAGE_SIZE #define PCPU_BITMAP_BLOCK_BITS (PCPU_BITMAP_BLOCK_SIZE >> \ PCPU_MIN_ALLOC_SHIFT) /* * Percpu allocator can serve percpu allocations before slab is * initialized which allows slab to depend on the percpu allocator. * The following two parameters decide how much resource to * preallocate for this. Keep PERCPU_DYNAMIC_RESERVE equal to or * larger than PERCPU_DYNAMIC_EARLY_SIZE. */ #define PERCPU_DYNAMIC_EARLY_SLOTS 128 #define PERCPU_DYNAMIC_EARLY_SIZE (12 << 10) /* * PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy * back on the first chunk for dynamic percpu allocation if arch is * manually allocating and mapping it for faster access (as a part of * large page mapping for example). * * The following values give between one and two pages of free space * after typical minimal boot (2-way SMP, single disk and NIC) with * both defconfig and a distro config on x86_64 and 32. More * intelligent way to determine this would be nice. */ #if BITS_PER_LONG > 32 #define PERCPU_DYNAMIC_RESERVE (28 << 10) #else #define PERCPU_DYNAMIC_RESERVE (20 << 10) #endif extern void *pcpu_base_addr; extern const unsigned long *pcpu_unit_offsets; struct pcpu_group_info { int nr_units; /* aligned # of units */ unsigned long base_offset; /* base address offset */ unsigned int *cpu_map; /* unit->cpu map, empty * entries contain NR_CPUS */ }; struct pcpu_alloc_info { size_t static_size; size_t reserved_size; size_t dyn_size; size_t unit_size; size_t atom_size; size_t alloc_size; size_t __ai_size; /* internal, don't use */ int nr_groups; /* 0 if grouping unnecessary */ struct pcpu_group_info groups[]; }; enum pcpu_fc { PCPU_FC_AUTO, PCPU_FC_EMBED, PCPU_FC_PAGE, PCPU_FC_NR, }; extern const char * const pcpu_fc_names[PCPU_FC_NR]; extern enum pcpu_fc pcpu_chosen_fc; typedef void * (*pcpu_fc_alloc_fn_t)(unsigned int cpu, size_t size, size_t align); typedef void (*pcpu_fc_free_fn_t)(void *ptr, size_t size); typedef void (*pcpu_fc_populate_pte_fn_t)(unsigned long addr); typedef int (pcpu_fc_cpu_distance_fn_t)(unsigned int from, unsigned int to); extern struct pcpu_alloc_info * __init pcpu_alloc_alloc_info(int nr_groups, int nr_units); extern void __init pcpu_free_alloc_info(struct pcpu_alloc_info *ai); extern void __init pcpu_setup_first_chunk(const struct pcpu_alloc_info *ai, void *base_addr); #ifdef CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK extern int __init pcpu_embed_first_chunk(size_t reserved_size, size_t dyn_size, size_t atom_size, pcpu_fc_cpu_distance_fn_t cpu_distance_fn, pcpu_fc_alloc_fn_t alloc_fn, pcpu_fc_free_fn_t free_fn); #endif #ifdef CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK extern int __init pcpu_page_first_chunk(size_t reserved_size, pcpu_fc_alloc_fn_t alloc_fn, pcpu_fc_free_fn_t free_fn, pcpu_fc_populate_pte_fn_t populate_pte_fn); #endif extern void __percpu *__alloc_reserved_percpu(size_t size, size_t align); extern bool __is_kernel_percpu_address(unsigned long addr, unsigned long *can_addr); extern bool is_kernel_percpu_address(unsigned long addr); #if !defined(CONFIG_SMP) || !defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) extern void __init setup_per_cpu_areas(void); #endif extern void __percpu *__alloc_percpu_gfp(size_t size, size_t align, gfp_t gfp); extern void __percpu *__alloc_percpu(size_t size, size_t align); extern void free_percpu(void __percpu *__pdata); DEFINE_FREE(free_percpu, void __percpu *, free_percpu(_T)) extern phys_addr_t per_cpu_ptr_to_phys(void *addr); #define alloc_percpu_gfp(type, gfp) \ (typeof(type) __percpu *)__alloc_percpu_gfp(sizeof(type), \ __alignof__(type), gfp) #define alloc_percpu(type) \ (typeof(type) __percpu *)__alloc_percpu(sizeof(type), \ __alignof__(type)) extern unsigned long pcpu_nr_pages(void); #endif /* __LINUX_PERCPU_H */ PK ! �߷b� � atomic/atomic-arch-fallback.hnu �[��� // SPDX-License-Identifier: GPL-2.0 // Generated by scripts/atomic/gen-atomic-fallback.sh // DO NOT MODIFY THIS FILE DIRECTLY #ifndef _LINUX_ATOMIC_FALLBACK_H #define _LINUX_ATOMIC_FALLBACK_H #include <linux/compiler.h> #ifndef arch_xchg_relaxed #define arch_xchg_acquire arch_xchg #define arch_xchg_release arch_xchg #define arch_xchg_relaxed arch_xchg #else /* arch_xchg_relaxed */ #ifndef arch_xchg_acquire #define arch_xchg_acquire(...) \ __atomic_op_acquire(arch_xchg, __VA_ARGS__) #endif #ifndef arch_xchg_release #define arch_xchg_release(...) \ __atomic_op_release(arch_xchg, __VA_ARGS__) #endif #ifndef arch_xchg #define arch_xchg(...) \ __atomic_op_fence(arch_xchg, __VA_ARGS__) #endif #endif /* arch_xchg_relaxed */ #ifndef arch_cmpxchg_relaxed #define arch_cmpxchg_acquire arch_cmpxchg #define arch_cmpxchg_release arch_cmpxchg #define arch_cmpxchg_relaxed arch_cmpxchg #else /* arch_cmpxchg_relaxed */ #ifndef arch_cmpxchg_acquire #define arch_cmpxchg_acquire(...) \ __atomic_op_acquire(arch_cmpxchg, __VA_ARGS__) #endif #ifndef arch_cmpxchg_release #define arch_cmpxchg_release(...) \ __atomic_op_release(arch_cmpxchg, __VA_ARGS__) #endif #ifndef arch_cmpxchg #define arch_cmpxchg(...) \ __atomic_op_fence(arch_cmpxchg, __VA_ARGS__) #endif #endif /* arch_cmpxchg_relaxed */ #ifndef arch_cmpxchg64_relaxed #define arch_cmpxchg64_acquire arch_cmpxchg64 #define arch_cmpxchg64_release arch_cmpxchg64 #define arch_cmpxchg64_relaxed arch_cmpxchg64 #else /* arch_cmpxchg64_relaxed */ #ifndef arch_cmpxchg64_acquire #define arch_cmpxchg64_acquire(...) \ __atomic_op_acquire(arch_cmpxchg64, __VA_ARGS__) #endif #ifndef arch_cmpxchg64_release #define arch_cmpxchg64_release(...) \ __atomic_op_release(arch_cmpxchg64, __VA_ARGS__) #endif #ifndef arch_cmpxchg64 #define arch_cmpxchg64(...) \ __atomic_op_fence(arch_cmpxchg64, __VA_ARGS__) #endif #endif /* arch_cmpxchg64_relaxed */ #ifndef arch_try_cmpxchg_relaxed #ifdef arch_try_cmpxchg #define arch_try_cmpxchg_acquire arch_try_cmpxchg #define arch_try_cmpxchg_release arch_try_cmpxchg #define arch_try_cmpxchg_relaxed arch_try_cmpxchg #endif /* arch_try_cmpxchg */ #ifndef arch_try_cmpxchg #define arch_try_cmpxchg(_ptr, _oldp, _new) \ ({ \ typeof(*(_ptr)) *___op = (_oldp), ___o = *___op, ___r; \ ___r = arch_cmpxchg((_ptr), ___o, (_new)); \ if (unlikely(___r != ___o)) \ *___op = ___r; \ likely(___r == ___o); \ }) #endif /* arch_try_cmpxchg */ #ifndef arch_try_cmpxchg_acquire #define arch_try_cmpxchg_acquire(_ptr, _oldp, _new) \ ({ \ typeof(*(_ptr)) *___op = (_oldp), ___o = *___op, ___r; \ ___r = arch_cmpxchg_acquire((_ptr), ___o, (_new)); \ if (unlikely(___r != ___o)) \ *___op = ___r; \ likely(___r == ___o); \ }) #endif /* arch_try_cmpxchg_acquire */ #ifndef arch_try_cmpxchg_release #define arch_try_cmpxchg_release(_ptr, _oldp, _new) \ ({ \ typeof(*(_ptr)) *___op = (_oldp), ___o = *___op, ___r; \ ___r = arch_cmpxchg_release((_ptr), ___o, (_new)); \ if (unlikely(___r != ___o)) \ *___op = ___r; \ likely(___r == ___o); \ }) #endif /* arch_try_cmpxchg_release */ #ifndef arch_try_cmpxchg_relaxed #define arch_try_cmpxchg_relaxed(_ptr, _oldp, _new) \ ({ \ typeof(*(_ptr)) *___op = (_oldp), ___o = *___op, ___r; \ ___r = arch_cmpxchg_relaxed((_ptr), ___o, (_new)); \ if (unlikely(___r != ___o)) \ *___op = ___r; \ likely(___r == ___o); \ }) #endif /* arch_try_cmpxchg_relaxed */ #else /* arch_try_cmpxchg_relaxed */ #ifndef arch_try_cmpxchg_acquire #define arch_try_cmpxchg_acquire(...) \ __atomic_op_acquire(arch_try_cmpxchg, __VA_ARGS__) #endif #ifndef arch_try_cmpxchg_release #define arch_try_cmpxchg_release(...) \ __atomic_op_release(arch_try_cmpxchg, __VA_ARGS__) #endif #ifndef arch_try_cmpxchg #define arch_try_cmpxchg(...) \ __atomic_op_fence(arch_try_cmpxchg, __VA_ARGS__) #endif #endif /* arch_try_cmpxchg_relaxed */ #ifndef arch_atomic_read_acquire static __always_inline int arch_atomic_read_acquire(const atomic_t *v) { int ret; if (__native_word(atomic_t)) { ret = smp_load_acquire(&(v)->counter); } else { ret = arch_atomic_read(v); __atomic_acquire_fence(); } return ret; } #define arch_atomic_read_acquire arch_atomic_read_acquire #endif #ifndef arch_atomic_set_release static __always_inline void arch_atomic_set_release(atomic_t *v, int i) { if (__native_word(atomic_t)) { smp_store_release(&(v)->counter, i); } else { __atomic_release_fence(); arch_atomic_set(v, i); } } #define arch_atomic_set_release arch_atomic_set_release #endif #ifndef arch_atomic_add_return_relaxed #define arch_atomic_add_return_acquire arch_atomic_add_return #define arch_atomic_add_return_release arch_atomic_add_return #define arch_atomic_add_return_relaxed arch_atomic_add_return #else /* arch_atomic_add_return_relaxed */ #ifndef arch_atomic_add_return_acquire static __always_inline int arch_atomic_add_return_acquire(int i, atomic_t *v) { int ret = arch_atomic_add_return_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_add_return_acquire arch_atomic_add_return_acquire #endif #ifndef arch_atomic_add_return_release static __always_inline int arch_atomic_add_return_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_add_return_relaxed(i, v); } #define arch_atomic_add_return_release arch_atomic_add_return_release #endif #ifndef arch_atomic_add_return static __always_inline int arch_atomic_add_return(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_add_return_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_add_return arch_atomic_add_return #endif #endif /* arch_atomic_add_return_relaxed */ #ifndef arch_atomic_fetch_add_relaxed #define arch_atomic_fetch_add_acquire arch_atomic_fetch_add #define arch_atomic_fetch_add_release arch_atomic_fetch_add #define arch_atomic_fetch_add_relaxed arch_atomic_fetch_add #else /* arch_atomic_fetch_add_relaxed */ #ifndef arch_atomic_fetch_add_acquire static __always_inline int arch_atomic_fetch_add_acquire(int i, atomic_t *v) { int ret = arch_atomic_fetch_add_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_add_acquire arch_atomic_fetch_add_acquire #endif #ifndef arch_atomic_fetch_add_release static __always_inline int arch_atomic_fetch_add_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_add_relaxed(i, v); } #define arch_atomic_fetch_add_release arch_atomic_fetch_add_release #endif #ifndef arch_atomic_fetch_add static __always_inline int arch_atomic_fetch_add(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_add_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_add arch_atomic_fetch_add #endif #endif /* arch_atomic_fetch_add_relaxed */ #ifndef arch_atomic_sub_return_relaxed #define arch_atomic_sub_return_acquire arch_atomic_sub_return #define arch_atomic_sub_return_release arch_atomic_sub_return #define arch_atomic_sub_return_relaxed arch_atomic_sub_return #else /* arch_atomic_sub_return_relaxed */ #ifndef arch_atomic_sub_return_acquire static __always_inline int arch_atomic_sub_return_acquire(int i, atomic_t *v) { int ret = arch_atomic_sub_return_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_sub_return_acquire arch_atomic_sub_return_acquire #endif #ifndef arch_atomic_sub_return_release static __always_inline int arch_atomic_sub_return_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_sub_return_relaxed(i, v); } #define arch_atomic_sub_return_release arch_atomic_sub_return_release #endif #ifndef arch_atomic_sub_return static __always_inline int arch_atomic_sub_return(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_sub_return_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_sub_return arch_atomic_sub_return #endif #endif /* arch_atomic_sub_return_relaxed */ #ifndef arch_atomic_fetch_sub_relaxed #define arch_atomic_fetch_sub_acquire arch_atomic_fetch_sub #define arch_atomic_fetch_sub_release arch_atomic_fetch_sub #define arch_atomic_fetch_sub_relaxed arch_atomic_fetch_sub #else /* arch_atomic_fetch_sub_relaxed */ #ifndef arch_atomic_fetch_sub_acquire static __always_inline int arch_atomic_fetch_sub_acquire(int i, atomic_t *v) { int ret = arch_atomic_fetch_sub_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_sub_acquire arch_atomic_fetch_sub_acquire #endif #ifndef arch_atomic_fetch_sub_release static __always_inline int arch_atomic_fetch_sub_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_sub_relaxed(i, v); } #define arch_atomic_fetch_sub_release arch_atomic_fetch_sub_release #endif #ifndef arch_atomic_fetch_sub static __always_inline int arch_atomic_fetch_sub(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_sub_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_sub arch_atomic_fetch_sub #endif #endif /* arch_atomic_fetch_sub_relaxed */ #ifndef arch_atomic_inc static __always_inline void arch_atomic_inc(atomic_t *v) { arch_atomic_add(1, v); } #define arch_atomic_inc arch_atomic_inc #endif #ifndef arch_atomic_inc_return_relaxed #ifdef arch_atomic_inc_return #define arch_atomic_inc_return_acquire arch_atomic_inc_return #define arch_atomic_inc_return_release arch_atomic_inc_return #define arch_atomic_inc_return_relaxed arch_atomic_inc_return #endif /* arch_atomic_inc_return */ #ifndef arch_atomic_inc_return static __always_inline int arch_atomic_inc_return(atomic_t *v) { return arch_atomic_add_return(1, v); } #define arch_atomic_inc_return arch_atomic_inc_return #endif #ifndef arch_atomic_inc_return_acquire static __always_inline int arch_atomic_inc_return_acquire(atomic_t *v) { return arch_atomic_add_return_acquire(1, v); } #define arch_atomic_inc_return_acquire arch_atomic_inc_return_acquire #endif #ifndef arch_atomic_inc_return_release static __always_inline int arch_atomic_inc_return_release(atomic_t *v) { return arch_atomic_add_return_release(1, v); } #define arch_atomic_inc_return_release arch_atomic_inc_return_release #endif #ifndef arch_atomic_inc_return_relaxed static __always_inline int arch_atomic_inc_return_relaxed(atomic_t *v) { return arch_atomic_add_return_relaxed(1, v); } #define arch_atomic_inc_return_relaxed arch_atomic_inc_return_relaxed #endif #else /* arch_atomic_inc_return_relaxed */ #ifndef arch_atomic_inc_return_acquire static __always_inline int arch_atomic_inc_return_acquire(atomic_t *v) { int ret = arch_atomic_inc_return_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic_inc_return_acquire arch_atomic_inc_return_acquire #endif #ifndef arch_atomic_inc_return_release static __always_inline int arch_atomic_inc_return_release(atomic_t *v) { __atomic_release_fence(); return arch_atomic_inc_return_relaxed(v); } #define arch_atomic_inc_return_release arch_atomic_inc_return_release #endif #ifndef arch_atomic_inc_return static __always_inline int arch_atomic_inc_return(atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_inc_return_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic_inc_return arch_atomic_inc_return #endif #endif /* arch_atomic_inc_return_relaxed */ #ifndef arch_atomic_fetch_inc_relaxed #ifdef arch_atomic_fetch_inc #define arch_atomic_fetch_inc_acquire arch_atomic_fetch_inc #define arch_atomic_fetch_inc_release arch_atomic_fetch_inc #define arch_atomic_fetch_inc_relaxed arch_atomic_fetch_inc #endif /* arch_atomic_fetch_inc */ #ifndef arch_atomic_fetch_inc static __always_inline int arch_atomic_fetch_inc(atomic_t *v) { return arch_atomic_fetch_add(1, v); } #define arch_atomic_fetch_inc arch_atomic_fetch_inc #endif #ifndef arch_atomic_fetch_inc_acquire static __always_inline int arch_atomic_fetch_inc_acquire(atomic_t *v) { return arch_atomic_fetch_add_acquire(1, v); } #define arch_atomic_fetch_inc_acquire arch_atomic_fetch_inc_acquire #endif #ifndef arch_atomic_fetch_inc_release static __always_inline int arch_atomic_fetch_inc_release(atomic_t *v) { return arch_atomic_fetch_add_release(1, v); } #define arch_atomic_fetch_inc_release arch_atomic_fetch_inc_release #endif #ifndef arch_atomic_fetch_inc_relaxed static __always_inline int arch_atomic_fetch_inc_relaxed(atomic_t *v) { return arch_atomic_fetch_add_relaxed(1, v); } #define arch_atomic_fetch_inc_relaxed arch_atomic_fetch_inc_relaxed #endif #else /* arch_atomic_fetch_inc_relaxed */ #ifndef arch_atomic_fetch_inc_acquire static __always_inline int arch_atomic_fetch_inc_acquire(atomic_t *v) { int ret = arch_atomic_fetch_inc_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_inc_acquire arch_atomic_fetch_inc_acquire #endif #ifndef arch_atomic_fetch_inc_release static __always_inline int arch_atomic_fetch_inc_release(atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_inc_relaxed(v); } #define arch_atomic_fetch_inc_release arch_atomic_fetch_inc_release #endif #ifndef arch_atomic_fetch_inc static __always_inline int arch_atomic_fetch_inc(atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_inc_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_inc arch_atomic_fetch_inc #endif #endif /* arch_atomic_fetch_inc_relaxed */ #ifndef arch_atomic_dec static __always_inline void arch_atomic_dec(atomic_t *v) { arch_atomic_sub(1, v); } #define arch_atomic_dec arch_atomic_dec #endif #ifndef arch_atomic_dec_return_relaxed #ifdef arch_atomic_dec_return #define arch_atomic_dec_return_acquire arch_atomic_dec_return #define arch_atomic_dec_return_release arch_atomic_dec_return #define arch_atomic_dec_return_relaxed arch_atomic_dec_return #endif /* arch_atomic_dec_return */ #ifndef arch_atomic_dec_return static __always_inline int arch_atomic_dec_return(atomic_t *v) { return arch_atomic_sub_return(1, v); } #define arch_atomic_dec_return arch_atomic_dec_return #endif #ifndef arch_atomic_dec_return_acquire static __always_inline int arch_atomic_dec_return_acquire(atomic_t *v) { return arch_atomic_sub_return_acquire(1, v); } #define arch_atomic_dec_return_acquire arch_atomic_dec_return_acquire #endif #ifndef arch_atomic_dec_return_release static __always_inline int arch_atomic_dec_return_release(atomic_t *v) { return arch_atomic_sub_return_release(1, v); } #define arch_atomic_dec_return_release arch_atomic_dec_return_release #endif #ifndef arch_atomic_dec_return_relaxed static __always_inline int arch_atomic_dec_return_relaxed(atomic_t *v) { return arch_atomic_sub_return_relaxed(1, v); } #define arch_atomic_dec_return_relaxed arch_atomic_dec_return_relaxed #endif #else /* arch_atomic_dec_return_relaxed */ #ifndef arch_atomic_dec_return_acquire static __always_inline int arch_atomic_dec_return_acquire(atomic_t *v) { int ret = arch_atomic_dec_return_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic_dec_return_acquire arch_atomic_dec_return_acquire #endif #ifndef arch_atomic_dec_return_release static __always_inline int arch_atomic_dec_return_release(atomic_t *v) { __atomic_release_fence(); return arch_atomic_dec_return_relaxed(v); } #define arch_atomic_dec_return_release arch_atomic_dec_return_release #endif #ifndef arch_atomic_dec_return static __always_inline int arch_atomic_dec_return(atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_dec_return_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic_dec_return arch_atomic_dec_return #endif #endif /* arch_atomic_dec_return_relaxed */ #ifndef arch_atomic_fetch_dec_relaxed #ifdef arch_atomic_fetch_dec #define arch_atomic_fetch_dec_acquire arch_atomic_fetch_dec #define arch_atomic_fetch_dec_release arch_atomic_fetch_dec #define arch_atomic_fetch_dec_relaxed arch_atomic_fetch_dec #endif /* arch_atomic_fetch_dec */ #ifndef arch_atomic_fetch_dec static __always_inline int arch_atomic_fetch_dec(atomic_t *v) { return arch_atomic_fetch_sub(1, v); } #define arch_atomic_fetch_dec arch_atomic_fetch_dec #endif #ifndef arch_atomic_fetch_dec_acquire static __always_inline int arch_atomic_fetch_dec_acquire(atomic_t *v) { return arch_atomic_fetch_sub_acquire(1, v); } #define arch_atomic_fetch_dec_acquire arch_atomic_fetch_dec_acquire #endif #ifndef arch_atomic_fetch_dec_release static __always_inline int arch_atomic_fetch_dec_release(atomic_t *v) { return arch_atomic_fetch_sub_release(1, v); } #define arch_atomic_fetch_dec_release arch_atomic_fetch_dec_release #endif #ifndef arch_atomic_fetch_dec_relaxed static __always_inline int arch_atomic_fetch_dec_relaxed(atomic_t *v) { return arch_atomic_fetch_sub_relaxed(1, v); } #define arch_atomic_fetch_dec_relaxed arch_atomic_fetch_dec_relaxed #endif #else /* arch_atomic_fetch_dec_relaxed */ #ifndef arch_atomic_fetch_dec_acquire static __always_inline int arch_atomic_fetch_dec_acquire(atomic_t *v) { int ret = arch_atomic_fetch_dec_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_dec_acquire arch_atomic_fetch_dec_acquire #endif #ifndef arch_atomic_fetch_dec_release static __always_inline int arch_atomic_fetch_dec_release(atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_dec_relaxed(v); } #define arch_atomic_fetch_dec_release arch_atomic_fetch_dec_release #endif #ifndef arch_atomic_fetch_dec static __always_inline int arch_atomic_fetch_dec(atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_dec_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_dec arch_atomic_fetch_dec #endif #endif /* arch_atomic_fetch_dec_relaxed */ #ifndef arch_atomic_fetch_and_relaxed #define arch_atomic_fetch_and_acquire arch_atomic_fetch_and #define arch_atomic_fetch_and_release arch_atomic_fetch_and #define arch_atomic_fetch_and_relaxed arch_atomic_fetch_and #else /* arch_atomic_fetch_and_relaxed */ #ifndef arch_atomic_fetch_and_acquire static __always_inline int arch_atomic_fetch_and_acquire(int i, atomic_t *v) { int ret = arch_atomic_fetch_and_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_and_acquire arch_atomic_fetch_and_acquire #endif #ifndef arch_atomic_fetch_and_release static __always_inline int arch_atomic_fetch_and_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_and_relaxed(i, v); } #define arch_atomic_fetch_and_release arch_atomic_fetch_and_release #endif #ifndef arch_atomic_fetch_and static __always_inline int arch_atomic_fetch_and(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_and_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_and arch_atomic_fetch_and #endif #endif /* arch_atomic_fetch_and_relaxed */ #ifndef arch_atomic_andnot static __always_inline void arch_atomic_andnot(int i, atomic_t *v) { arch_atomic_and(~i, v); } #define arch_atomic_andnot arch_atomic_andnot #endif #ifndef arch_atomic_fetch_andnot_relaxed #ifdef arch_atomic_fetch_andnot #define arch_atomic_fetch_andnot_acquire arch_atomic_fetch_andnot #define arch_atomic_fetch_andnot_release arch_atomic_fetch_andnot #define arch_atomic_fetch_andnot_relaxed arch_atomic_fetch_andnot #endif /* arch_atomic_fetch_andnot */ #ifndef arch_atomic_fetch_andnot static __always_inline int arch_atomic_fetch_andnot(int i, atomic_t *v) { return arch_atomic_fetch_and(~i, v); } #define arch_atomic_fetch_andnot arch_atomic_fetch_andnot #endif #ifndef arch_atomic_fetch_andnot_acquire static __always_inline int arch_atomic_fetch_andnot_acquire(int i, atomic_t *v) { return arch_atomic_fetch_and_acquire(~i, v); } #define arch_atomic_fetch_andnot_acquire arch_atomic_fetch_andnot_acquire #endif #ifndef arch_atomic_fetch_andnot_release static __always_inline int arch_atomic_fetch_andnot_release(int i, atomic_t *v) { return arch_atomic_fetch_and_release(~i, v); } #define arch_atomic_fetch_andnot_release arch_atomic_fetch_andnot_release #endif #ifndef arch_atomic_fetch_andnot_relaxed static __always_inline int arch_atomic_fetch_andnot_relaxed(int i, atomic_t *v) { return arch_atomic_fetch_and_relaxed(~i, v); } #define arch_atomic_fetch_andnot_relaxed arch_atomic_fetch_andnot_relaxed #endif #else /* arch_atomic_fetch_andnot_relaxed */ #ifndef arch_atomic_fetch_andnot_acquire static __always_inline int arch_atomic_fetch_andnot_acquire(int i, atomic_t *v) { int ret = arch_atomic_fetch_andnot_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_andnot_acquire arch_atomic_fetch_andnot_acquire #endif #ifndef arch_atomic_fetch_andnot_release static __always_inline int arch_atomic_fetch_andnot_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_andnot_relaxed(i, v); } #define arch_atomic_fetch_andnot_release arch_atomic_fetch_andnot_release #endif #ifndef arch_atomic_fetch_andnot static __always_inline int arch_atomic_fetch_andnot(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_andnot_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_andnot arch_atomic_fetch_andnot #endif #endif /* arch_atomic_fetch_andnot_relaxed */ #ifndef arch_atomic_fetch_or_relaxed #define arch_atomic_fetch_or_acquire arch_atomic_fetch_or #define arch_atomic_fetch_or_release arch_atomic_fetch_or #define arch_atomic_fetch_or_relaxed arch_atomic_fetch_or #else /* arch_atomic_fetch_or_relaxed */ #ifndef arch_atomic_fetch_or_acquire static __always_inline int arch_atomic_fetch_or_acquire(int i, atomic_t *v) { int ret = arch_atomic_fetch_or_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_or_acquire arch_atomic_fetch_or_acquire #endif #ifndef arch_atomic_fetch_or_release static __always_inline int arch_atomic_fetch_or_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_or_relaxed(i, v); } #define arch_atomic_fetch_or_release arch_atomic_fetch_or_release #endif #ifndef arch_atomic_fetch_or static __always_inline int arch_atomic_fetch_or(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_or_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_or arch_atomic_fetch_or #endif #endif /* arch_atomic_fetch_or_relaxed */ #ifndef arch_atomic_fetch_xor_relaxed #define arch_atomic_fetch_xor_acquire arch_atomic_fetch_xor #define arch_atomic_fetch_xor_release arch_atomic_fetch_xor #define arch_atomic_fetch_xor_relaxed arch_atomic_fetch_xor #else /* arch_atomic_fetch_xor_relaxed */ #ifndef arch_atomic_fetch_xor_acquire static __always_inline int arch_atomic_fetch_xor_acquire(int i, atomic_t *v) { int ret = arch_atomic_fetch_xor_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic_fetch_xor_acquire arch_atomic_fetch_xor_acquire #endif #ifndef arch_atomic_fetch_xor_release static __always_inline int arch_atomic_fetch_xor_release(int i, atomic_t *v) { __atomic_release_fence(); return arch_atomic_fetch_xor_relaxed(i, v); } #define arch_atomic_fetch_xor_release arch_atomic_fetch_xor_release #endif #ifndef arch_atomic_fetch_xor static __always_inline int arch_atomic_fetch_xor(int i, atomic_t *v) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_fetch_xor_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic_fetch_xor arch_atomic_fetch_xor #endif #endif /* arch_atomic_fetch_xor_relaxed */ #ifndef arch_atomic_xchg_relaxed #define arch_atomic_xchg_acquire arch_atomic_xchg #define arch_atomic_xchg_release arch_atomic_xchg #define arch_atomic_xchg_relaxed arch_atomic_xchg #else /* arch_atomic_xchg_relaxed */ #ifndef arch_atomic_xchg_acquire static __always_inline int arch_atomic_xchg_acquire(atomic_t *v, int i) { int ret = arch_atomic_xchg_relaxed(v, i); __atomic_acquire_fence(); return ret; } #define arch_atomic_xchg_acquire arch_atomic_xchg_acquire #endif #ifndef arch_atomic_xchg_release static __always_inline int arch_atomic_xchg_release(atomic_t *v, int i) { __atomic_release_fence(); return arch_atomic_xchg_relaxed(v, i); } #define arch_atomic_xchg_release arch_atomic_xchg_release #endif #ifndef arch_atomic_xchg static __always_inline int arch_atomic_xchg(atomic_t *v, int i) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_xchg_relaxed(v, i); __atomic_post_full_fence(); return ret; } #define arch_atomic_xchg arch_atomic_xchg #endif #endif /* arch_atomic_xchg_relaxed */ #ifndef arch_atomic_cmpxchg_relaxed #define arch_atomic_cmpxchg_acquire arch_atomic_cmpxchg #define arch_atomic_cmpxchg_release arch_atomic_cmpxchg #define arch_atomic_cmpxchg_relaxed arch_atomic_cmpxchg #else /* arch_atomic_cmpxchg_relaxed */ #ifndef arch_atomic_cmpxchg_acquire static __always_inline int arch_atomic_cmpxchg_acquire(atomic_t *v, int old, int new) { int ret = arch_atomic_cmpxchg_relaxed(v, old, new); __atomic_acquire_fence(); return ret; } #define arch_atomic_cmpxchg_acquire arch_atomic_cmpxchg_acquire #endif #ifndef arch_atomic_cmpxchg_release static __always_inline int arch_atomic_cmpxchg_release(atomic_t *v, int old, int new) { __atomic_release_fence(); return arch_atomic_cmpxchg_relaxed(v, old, new); } #define arch_atomic_cmpxchg_release arch_atomic_cmpxchg_release #endif #ifndef arch_atomic_cmpxchg static __always_inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new) { int ret; __atomic_pre_full_fence(); ret = arch_atomic_cmpxchg_relaxed(v, old, new); __atomic_post_full_fence(); return ret; } #define arch_atomic_cmpxchg arch_atomic_cmpxchg #endif #endif /* arch_atomic_cmpxchg_relaxed */ #ifndef arch_atomic_try_cmpxchg_relaxed #ifdef arch_atomic_try_cmpxchg #define arch_atomic_try_cmpxchg_acquire arch_atomic_try_cmpxchg #define arch_atomic_try_cmpxchg_release arch_atomic_try_cmpxchg #define arch_atomic_try_cmpxchg_relaxed arch_atomic_try_cmpxchg #endif /* arch_atomic_try_cmpxchg */ #ifndef arch_atomic_try_cmpxchg static __always_inline bool arch_atomic_try_cmpxchg(atomic_t *v, int *old, int new) { int r, o = *old; r = arch_atomic_cmpxchg(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic_try_cmpxchg arch_atomic_try_cmpxchg #endif #ifndef arch_atomic_try_cmpxchg_acquire static __always_inline bool arch_atomic_try_cmpxchg_acquire(atomic_t *v, int *old, int new) { int r, o = *old; r = arch_atomic_cmpxchg_acquire(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic_try_cmpxchg_acquire arch_atomic_try_cmpxchg_acquire #endif #ifndef arch_atomic_try_cmpxchg_release static __always_inline bool arch_atomic_try_cmpxchg_release(atomic_t *v, int *old, int new) { int r, o = *old; r = arch_atomic_cmpxchg_release(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic_try_cmpxchg_release arch_atomic_try_cmpxchg_release #endif #ifndef arch_atomic_try_cmpxchg_relaxed static __always_inline bool arch_atomic_try_cmpxchg_relaxed(atomic_t *v, int *old, int new) { int r, o = *old; r = arch_atomic_cmpxchg_relaxed(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic_try_cmpxchg_relaxed arch_atomic_try_cmpxchg_relaxed #endif #else /* arch_atomic_try_cmpxchg_relaxed */ #ifndef arch_atomic_try_cmpxchg_acquire static __always_inline bool arch_atomic_try_cmpxchg_acquire(atomic_t *v, int *old, int new) { bool ret = arch_atomic_try_cmpxchg_relaxed(v, old, new); __atomic_acquire_fence(); return ret; } #define arch_atomic_try_cmpxchg_acquire arch_atomic_try_cmpxchg_acquire #endif #ifndef arch_atomic_try_cmpxchg_release static __always_inline bool arch_atomic_try_cmpxchg_release(atomic_t *v, int *old, int new) { __atomic_release_fence(); return arch_atomic_try_cmpxchg_relaxed(v, old, new); } #define arch_atomic_try_cmpxchg_release arch_atomic_try_cmpxchg_release #endif #ifndef arch_atomic_try_cmpxchg static __always_inline bool arch_atomic_try_cmpxchg(atomic_t *v, int *old, int new) { bool ret; __atomic_pre_full_fence(); ret = arch_atomic_try_cmpxchg_relaxed(v, old, new); __atomic_post_full_fence(); return ret; } #define arch_atomic_try_cmpxchg arch_atomic_try_cmpxchg #endif #endif /* arch_atomic_try_cmpxchg_relaxed */ #ifndef arch_atomic_sub_and_test /** * arch_atomic_sub_and_test - subtract value from variable and test result * @i: integer value to subtract * @v: pointer of type atomic_t * * Atomically subtracts @i from @v and returns * true if the result is zero, or false for all * other cases. */ static __always_inline bool arch_atomic_sub_and_test(int i, atomic_t *v) { return arch_atomic_sub_return(i, v) == 0; } #define arch_atomic_sub_and_test arch_atomic_sub_and_test #endif #ifndef arch_atomic_dec_and_test /** * arch_atomic_dec_and_test - decrement and test * @v: pointer of type atomic_t * * Atomically decrements @v by 1 and * returns true if the result is 0, or false for all other * cases. */ static __always_inline bool arch_atomic_dec_and_test(atomic_t *v) { return arch_atomic_dec_return(v) == 0; } #define arch_atomic_dec_and_test arch_atomic_dec_and_test #endif #ifndef arch_atomic_inc_and_test /** * arch_atomic_inc_and_test - increment and test * @v: pointer of type atomic_t * * Atomically increments @v by 1 * and returns true if the result is zero, or false for all * other cases. */ static __always_inline bool arch_atomic_inc_and_test(atomic_t *v) { return arch_atomic_inc_return(v) == 0; } #define arch_atomic_inc_and_test arch_atomic_inc_and_test #endif #ifndef arch_atomic_add_negative /** * arch_atomic_add_negative - add and test if negative * @i: integer value to add * @v: pointer of type atomic_t * * Atomically adds @i to @v and returns true * if the result is negative, or false when * result is greater than or equal to zero. */ static __always_inline bool arch_atomic_add_negative(int i, atomic_t *v) { return arch_atomic_add_return(i, v) < 0; } #define arch_atomic_add_negative arch_atomic_add_negative #endif #ifndef arch_atomic_fetch_add_unless /** * arch_atomic_fetch_add_unless - add unless the number is already a given value * @v: pointer of type atomic_t * @a: the amount to add to v... * @u: ...unless v is equal to u. * * Atomically adds @a to @v, so long as @v was not already @u. * Returns original value of @v */ static __always_inline int arch_atomic_fetch_add_unless(atomic_t *v, int a, int u) { int c = arch_atomic_read(v); do { if (unlikely(c == u)) break; } while (!arch_atomic_try_cmpxchg(v, &c, c + a)); return c; } #define arch_atomic_fetch_add_unless arch_atomic_fetch_add_unless #endif #ifndef arch_atomic_add_unless /** * arch_atomic_add_unless - add unless the number is already a given value * @v: pointer of type atomic_t * @a: the amount to add to v... * @u: ...unless v is equal to u. * * Atomically adds @a to @v, if @v was not already @u. * Returns true if the addition was done. */ static __always_inline bool arch_atomic_add_unless(atomic_t *v, int a, int u) { return arch_atomic_fetch_add_unless(v, a, u) != u; } #define arch_atomic_add_unless arch_atomic_add_unless #endif #ifndef arch_atomic_inc_not_zero /** * arch_atomic_inc_not_zero - increment unless the number is zero * @v: pointer of type atomic_t * * Atomically increments @v by 1, if @v is non-zero. * Returns true if the increment was done. */ static __always_inline bool arch_atomic_inc_not_zero(atomic_t *v) { return arch_atomic_add_unless(v, 1, 0); } #define arch_atomic_inc_not_zero arch_atomic_inc_not_zero #endif #ifndef arch_atomic_inc_unless_negative static __always_inline bool arch_atomic_inc_unless_negative(atomic_t *v) { int c = arch_atomic_read(v); do { if (unlikely(c < 0)) return false; } while (!arch_atomic_try_cmpxchg(v, &c, c + 1)); return true; } #define arch_atomic_inc_unless_negative arch_atomic_inc_unless_negative #endif #ifndef arch_atomic_dec_unless_positive static __always_inline bool arch_atomic_dec_unless_positive(atomic_t *v) { int c = arch_atomic_read(v); do { if (unlikely(c > 0)) return false; } while (!arch_atomic_try_cmpxchg(v, &c, c - 1)); return true; } #define arch_atomic_dec_unless_positive arch_atomic_dec_unless_positive #endif #ifndef arch_atomic_dec_if_positive static __always_inline int arch_atomic_dec_if_positive(atomic_t *v) { int dec, c = arch_atomic_read(v); do { dec = c - 1; if (unlikely(dec < 0)) break; } while (!arch_atomic_try_cmpxchg(v, &c, dec)); return dec; } #define arch_atomic_dec_if_positive arch_atomic_dec_if_positive #endif #ifdef CONFIG_GENERIC_ATOMIC64 #include <asm-generic/atomic64.h> #endif #ifndef arch_atomic64_read_acquire static __always_inline s64 arch_atomic64_read_acquire(const atomic64_t *v) { s64 ret; if (__native_word(atomic64_t)) { ret = smp_load_acquire(&(v)->counter); } else { ret = arch_atomic64_read(v); __atomic_acquire_fence(); } return ret; } #define arch_atomic64_read_acquire arch_atomic64_read_acquire #endif #ifndef arch_atomic64_set_release static __always_inline void arch_atomic64_set_release(atomic64_t *v, s64 i) { if (__native_word(atomic64_t)) { smp_store_release(&(v)->counter, i); } else { __atomic_release_fence(); arch_atomic64_set(v, i); } } #define arch_atomic64_set_release arch_atomic64_set_release #endif #ifndef arch_atomic64_add_return_relaxed #define arch_atomic64_add_return_acquire arch_atomic64_add_return #define arch_atomic64_add_return_release arch_atomic64_add_return #define arch_atomic64_add_return_relaxed arch_atomic64_add_return #else /* arch_atomic64_add_return_relaxed */ #ifndef arch_atomic64_add_return_acquire static __always_inline s64 arch_atomic64_add_return_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_add_return_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_add_return_acquire arch_atomic64_add_return_acquire #endif #ifndef arch_atomic64_add_return_release static __always_inline s64 arch_atomic64_add_return_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_add_return_relaxed(i, v); } #define arch_atomic64_add_return_release arch_atomic64_add_return_release #endif #ifndef arch_atomic64_add_return static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_add_return_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_add_return arch_atomic64_add_return #endif #endif /* arch_atomic64_add_return_relaxed */ #ifndef arch_atomic64_fetch_add_relaxed #define arch_atomic64_fetch_add_acquire arch_atomic64_fetch_add #define arch_atomic64_fetch_add_release arch_atomic64_fetch_add #define arch_atomic64_fetch_add_relaxed arch_atomic64_fetch_add #else /* arch_atomic64_fetch_add_relaxed */ #ifndef arch_atomic64_fetch_add_acquire static __always_inline s64 arch_atomic64_fetch_add_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_fetch_add_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_add_acquire arch_atomic64_fetch_add_acquire #endif #ifndef arch_atomic64_fetch_add_release static __always_inline s64 arch_atomic64_fetch_add_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_add_relaxed(i, v); } #define arch_atomic64_fetch_add_release arch_atomic64_fetch_add_release #endif #ifndef arch_atomic64_fetch_add static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_add_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_add arch_atomic64_fetch_add #endif #endif /* arch_atomic64_fetch_add_relaxed */ #ifndef arch_atomic64_sub_return_relaxed #define arch_atomic64_sub_return_acquire arch_atomic64_sub_return #define arch_atomic64_sub_return_release arch_atomic64_sub_return #define arch_atomic64_sub_return_relaxed arch_atomic64_sub_return #else /* arch_atomic64_sub_return_relaxed */ #ifndef arch_atomic64_sub_return_acquire static __always_inline s64 arch_atomic64_sub_return_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_sub_return_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_sub_return_acquire arch_atomic64_sub_return_acquire #endif #ifndef arch_atomic64_sub_return_release static __always_inline s64 arch_atomic64_sub_return_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_sub_return_relaxed(i, v); } #define arch_atomic64_sub_return_release arch_atomic64_sub_return_release #endif #ifndef arch_atomic64_sub_return static __always_inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_sub_return_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_sub_return arch_atomic64_sub_return #endif #endif /* arch_atomic64_sub_return_relaxed */ #ifndef arch_atomic64_fetch_sub_relaxed #define arch_atomic64_fetch_sub_acquire arch_atomic64_fetch_sub #define arch_atomic64_fetch_sub_release arch_atomic64_fetch_sub #define arch_atomic64_fetch_sub_relaxed arch_atomic64_fetch_sub #else /* arch_atomic64_fetch_sub_relaxed */ #ifndef arch_atomic64_fetch_sub_acquire static __always_inline s64 arch_atomic64_fetch_sub_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_fetch_sub_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_sub_acquire arch_atomic64_fetch_sub_acquire #endif #ifndef arch_atomic64_fetch_sub_release static __always_inline s64 arch_atomic64_fetch_sub_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_sub_relaxed(i, v); } #define arch_atomic64_fetch_sub_release arch_atomic64_fetch_sub_release #endif #ifndef arch_atomic64_fetch_sub static __always_inline s64 arch_atomic64_fetch_sub(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_sub_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_sub arch_atomic64_fetch_sub #endif #endif /* arch_atomic64_fetch_sub_relaxed */ #ifndef arch_atomic64_inc static __always_inline void arch_atomic64_inc(atomic64_t *v) { arch_atomic64_add(1, v); } #define arch_atomic64_inc arch_atomic64_inc #endif #ifndef arch_atomic64_inc_return_relaxed #ifdef arch_atomic64_inc_return #define arch_atomic64_inc_return_acquire arch_atomic64_inc_return #define arch_atomic64_inc_return_release arch_atomic64_inc_return #define arch_atomic64_inc_return_relaxed arch_atomic64_inc_return #endif /* arch_atomic64_inc_return */ #ifndef arch_atomic64_inc_return static __always_inline s64 arch_atomic64_inc_return(atomic64_t *v) { return arch_atomic64_add_return(1, v); } #define arch_atomic64_inc_return arch_atomic64_inc_return #endif #ifndef arch_atomic64_inc_return_acquire static __always_inline s64 arch_atomic64_inc_return_acquire(atomic64_t *v) { return arch_atomic64_add_return_acquire(1, v); } #define arch_atomic64_inc_return_acquire arch_atomic64_inc_return_acquire #endif #ifndef arch_atomic64_inc_return_release static __always_inline s64 arch_atomic64_inc_return_release(atomic64_t *v) { return arch_atomic64_add_return_release(1, v); } #define arch_atomic64_inc_return_release arch_atomic64_inc_return_release #endif #ifndef arch_atomic64_inc_return_relaxed static __always_inline s64 arch_atomic64_inc_return_relaxed(atomic64_t *v) { return arch_atomic64_add_return_relaxed(1, v); } #define arch_atomic64_inc_return_relaxed arch_atomic64_inc_return_relaxed #endif #else /* arch_atomic64_inc_return_relaxed */ #ifndef arch_atomic64_inc_return_acquire static __always_inline s64 arch_atomic64_inc_return_acquire(atomic64_t *v) { s64 ret = arch_atomic64_inc_return_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_inc_return_acquire arch_atomic64_inc_return_acquire #endif #ifndef arch_atomic64_inc_return_release static __always_inline s64 arch_atomic64_inc_return_release(atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_inc_return_relaxed(v); } #define arch_atomic64_inc_return_release arch_atomic64_inc_return_release #endif #ifndef arch_atomic64_inc_return static __always_inline s64 arch_atomic64_inc_return(atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_inc_return_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_inc_return arch_atomic64_inc_return #endif #endif /* arch_atomic64_inc_return_relaxed */ #ifndef arch_atomic64_fetch_inc_relaxed #ifdef arch_atomic64_fetch_inc #define arch_atomic64_fetch_inc_acquire arch_atomic64_fetch_inc #define arch_atomic64_fetch_inc_release arch_atomic64_fetch_inc #define arch_atomic64_fetch_inc_relaxed arch_atomic64_fetch_inc #endif /* arch_atomic64_fetch_inc */ #ifndef arch_atomic64_fetch_inc static __always_inline s64 arch_atomic64_fetch_inc(atomic64_t *v) { return arch_atomic64_fetch_add(1, v); } #define arch_atomic64_fetch_inc arch_atomic64_fetch_inc #endif #ifndef arch_atomic64_fetch_inc_acquire static __always_inline s64 arch_atomic64_fetch_inc_acquire(atomic64_t *v) { return arch_atomic64_fetch_add_acquire(1, v); } #define arch_atomic64_fetch_inc_acquire arch_atomic64_fetch_inc_acquire #endif #ifndef arch_atomic64_fetch_inc_release static __always_inline s64 arch_atomic64_fetch_inc_release(atomic64_t *v) { return arch_atomic64_fetch_add_release(1, v); } #define arch_atomic64_fetch_inc_release arch_atomic64_fetch_inc_release #endif #ifndef arch_atomic64_fetch_inc_relaxed static __always_inline s64 arch_atomic64_fetch_inc_relaxed(atomic64_t *v) { return arch_atomic64_fetch_add_relaxed(1, v); } #define arch_atomic64_fetch_inc_relaxed arch_atomic64_fetch_inc_relaxed #endif #else /* arch_atomic64_fetch_inc_relaxed */ #ifndef arch_atomic64_fetch_inc_acquire static __always_inline s64 arch_atomic64_fetch_inc_acquire(atomic64_t *v) { s64 ret = arch_atomic64_fetch_inc_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_inc_acquire arch_atomic64_fetch_inc_acquire #endif #ifndef arch_atomic64_fetch_inc_release static __always_inline s64 arch_atomic64_fetch_inc_release(atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_inc_relaxed(v); } #define arch_atomic64_fetch_inc_release arch_atomic64_fetch_inc_release #endif #ifndef arch_atomic64_fetch_inc static __always_inline s64 arch_atomic64_fetch_inc(atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_inc_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_inc arch_atomic64_fetch_inc #endif #endif /* arch_atomic64_fetch_inc_relaxed */ #ifndef arch_atomic64_dec static __always_inline void arch_atomic64_dec(atomic64_t *v) { arch_atomic64_sub(1, v); } #define arch_atomic64_dec arch_atomic64_dec #endif #ifndef arch_atomic64_dec_return_relaxed #ifdef arch_atomic64_dec_return #define arch_atomic64_dec_return_acquire arch_atomic64_dec_return #define arch_atomic64_dec_return_release arch_atomic64_dec_return #define arch_atomic64_dec_return_relaxed arch_atomic64_dec_return #endif /* arch_atomic64_dec_return */ #ifndef arch_atomic64_dec_return static __always_inline s64 arch_atomic64_dec_return(atomic64_t *v) { return arch_atomic64_sub_return(1, v); } #define arch_atomic64_dec_return arch_atomic64_dec_return #endif #ifndef arch_atomic64_dec_return_acquire static __always_inline s64 arch_atomic64_dec_return_acquire(atomic64_t *v) { return arch_atomic64_sub_return_acquire(1, v); } #define arch_atomic64_dec_return_acquire arch_atomic64_dec_return_acquire #endif #ifndef arch_atomic64_dec_return_release static __always_inline s64 arch_atomic64_dec_return_release(atomic64_t *v) { return arch_atomic64_sub_return_release(1, v); } #define arch_atomic64_dec_return_release arch_atomic64_dec_return_release #endif #ifndef arch_atomic64_dec_return_relaxed static __always_inline s64 arch_atomic64_dec_return_relaxed(atomic64_t *v) { return arch_atomic64_sub_return_relaxed(1, v); } #define arch_atomic64_dec_return_relaxed arch_atomic64_dec_return_relaxed #endif #else /* arch_atomic64_dec_return_relaxed */ #ifndef arch_atomic64_dec_return_acquire static __always_inline s64 arch_atomic64_dec_return_acquire(atomic64_t *v) { s64 ret = arch_atomic64_dec_return_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_dec_return_acquire arch_atomic64_dec_return_acquire #endif #ifndef arch_atomic64_dec_return_release static __always_inline s64 arch_atomic64_dec_return_release(atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_dec_return_relaxed(v); } #define arch_atomic64_dec_return_release arch_atomic64_dec_return_release #endif #ifndef arch_atomic64_dec_return static __always_inline s64 arch_atomic64_dec_return(atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_dec_return_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_dec_return arch_atomic64_dec_return #endif #endif /* arch_atomic64_dec_return_relaxed */ #ifndef arch_atomic64_fetch_dec_relaxed #ifdef arch_atomic64_fetch_dec #define arch_atomic64_fetch_dec_acquire arch_atomic64_fetch_dec #define arch_atomic64_fetch_dec_release arch_atomic64_fetch_dec #define arch_atomic64_fetch_dec_relaxed arch_atomic64_fetch_dec #endif /* arch_atomic64_fetch_dec */ #ifndef arch_atomic64_fetch_dec static __always_inline s64 arch_atomic64_fetch_dec(atomic64_t *v) { return arch_atomic64_fetch_sub(1, v); } #define arch_atomic64_fetch_dec arch_atomic64_fetch_dec #endif #ifndef arch_atomic64_fetch_dec_acquire static __always_inline s64 arch_atomic64_fetch_dec_acquire(atomic64_t *v) { return arch_atomic64_fetch_sub_acquire(1, v); } #define arch_atomic64_fetch_dec_acquire arch_atomic64_fetch_dec_acquire #endif #ifndef arch_atomic64_fetch_dec_release static __always_inline s64 arch_atomic64_fetch_dec_release(atomic64_t *v) { return arch_atomic64_fetch_sub_release(1, v); } #define arch_atomic64_fetch_dec_release arch_atomic64_fetch_dec_release #endif #ifndef arch_atomic64_fetch_dec_relaxed static __always_inline s64 arch_atomic64_fetch_dec_relaxed(atomic64_t *v) { return arch_atomic64_fetch_sub_relaxed(1, v); } #define arch_atomic64_fetch_dec_relaxed arch_atomic64_fetch_dec_relaxed #endif #else /* arch_atomic64_fetch_dec_relaxed */ #ifndef arch_atomic64_fetch_dec_acquire static __always_inline s64 arch_atomic64_fetch_dec_acquire(atomic64_t *v) { s64 ret = arch_atomic64_fetch_dec_relaxed(v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_dec_acquire arch_atomic64_fetch_dec_acquire #endif #ifndef arch_atomic64_fetch_dec_release static __always_inline s64 arch_atomic64_fetch_dec_release(atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_dec_relaxed(v); } #define arch_atomic64_fetch_dec_release arch_atomic64_fetch_dec_release #endif #ifndef arch_atomic64_fetch_dec static __always_inline s64 arch_atomic64_fetch_dec(atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_dec_relaxed(v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_dec arch_atomic64_fetch_dec #endif #endif /* arch_atomic64_fetch_dec_relaxed */ #ifndef arch_atomic64_fetch_and_relaxed #define arch_atomic64_fetch_and_acquire arch_atomic64_fetch_and #define arch_atomic64_fetch_and_release arch_atomic64_fetch_and #define arch_atomic64_fetch_and_relaxed arch_atomic64_fetch_and #else /* arch_atomic64_fetch_and_relaxed */ #ifndef arch_atomic64_fetch_and_acquire static __always_inline s64 arch_atomic64_fetch_and_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_fetch_and_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_and_acquire arch_atomic64_fetch_and_acquire #endif #ifndef arch_atomic64_fetch_and_release static __always_inline s64 arch_atomic64_fetch_and_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_and_relaxed(i, v); } #define arch_atomic64_fetch_and_release arch_atomic64_fetch_and_release #endif #ifndef arch_atomic64_fetch_and static __always_inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_and_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_and arch_atomic64_fetch_and #endif #endif /* arch_atomic64_fetch_and_relaxed */ #ifndef arch_atomic64_andnot static __always_inline void arch_atomic64_andnot(s64 i, atomic64_t *v) { arch_atomic64_and(~i, v); } #define arch_atomic64_andnot arch_atomic64_andnot #endif #ifndef arch_atomic64_fetch_andnot_relaxed #ifdef arch_atomic64_fetch_andnot #define arch_atomic64_fetch_andnot_acquire arch_atomic64_fetch_andnot #define arch_atomic64_fetch_andnot_release arch_atomic64_fetch_andnot #define arch_atomic64_fetch_andnot_relaxed arch_atomic64_fetch_andnot #endif /* arch_atomic64_fetch_andnot */ #ifndef arch_atomic64_fetch_andnot static __always_inline s64 arch_atomic64_fetch_andnot(s64 i, atomic64_t *v) { return arch_atomic64_fetch_and(~i, v); } #define arch_atomic64_fetch_andnot arch_atomic64_fetch_andnot #endif #ifndef arch_atomic64_fetch_andnot_acquire static __always_inline s64 arch_atomic64_fetch_andnot_acquire(s64 i, atomic64_t *v) { return arch_atomic64_fetch_and_acquire(~i, v); } #define arch_atomic64_fetch_andnot_acquire arch_atomic64_fetch_andnot_acquire #endif #ifndef arch_atomic64_fetch_andnot_release static __always_inline s64 arch_atomic64_fetch_andnot_release(s64 i, atomic64_t *v) { return arch_atomic64_fetch_and_release(~i, v); } #define arch_atomic64_fetch_andnot_release arch_atomic64_fetch_andnot_release #endif #ifndef arch_atomic64_fetch_andnot_relaxed static __always_inline s64 arch_atomic64_fetch_andnot_relaxed(s64 i, atomic64_t *v) { return arch_atomic64_fetch_and_relaxed(~i, v); } #define arch_atomic64_fetch_andnot_relaxed arch_atomic64_fetch_andnot_relaxed #endif #else /* arch_atomic64_fetch_andnot_relaxed */ #ifndef arch_atomic64_fetch_andnot_acquire static __always_inline s64 arch_atomic64_fetch_andnot_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_fetch_andnot_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_andnot_acquire arch_atomic64_fetch_andnot_acquire #endif #ifndef arch_atomic64_fetch_andnot_release static __always_inline s64 arch_atomic64_fetch_andnot_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_andnot_relaxed(i, v); } #define arch_atomic64_fetch_andnot_release arch_atomic64_fetch_andnot_release #endif #ifndef arch_atomic64_fetch_andnot static __always_inline s64 arch_atomic64_fetch_andnot(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_andnot_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_andnot arch_atomic64_fetch_andnot #endif #endif /* arch_atomic64_fetch_andnot_relaxed */ #ifndef arch_atomic64_fetch_or_relaxed #define arch_atomic64_fetch_or_acquire arch_atomic64_fetch_or #define arch_atomic64_fetch_or_release arch_atomic64_fetch_or #define arch_atomic64_fetch_or_relaxed arch_atomic64_fetch_or #else /* arch_atomic64_fetch_or_relaxed */ #ifndef arch_atomic64_fetch_or_acquire static __always_inline s64 arch_atomic64_fetch_or_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_fetch_or_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_or_acquire arch_atomic64_fetch_or_acquire #endif #ifndef arch_atomic64_fetch_or_release static __always_inline s64 arch_atomic64_fetch_or_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_or_relaxed(i, v); } #define arch_atomic64_fetch_or_release arch_atomic64_fetch_or_release #endif #ifndef arch_atomic64_fetch_or static __always_inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_or_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_or arch_atomic64_fetch_or #endif #endif /* arch_atomic64_fetch_or_relaxed */ #ifndef arch_atomic64_fetch_xor_relaxed #define arch_atomic64_fetch_xor_acquire arch_atomic64_fetch_xor #define arch_atomic64_fetch_xor_release arch_atomic64_fetch_xor #define arch_atomic64_fetch_xor_relaxed arch_atomic64_fetch_xor #else /* arch_atomic64_fetch_xor_relaxed */ #ifndef arch_atomic64_fetch_xor_acquire static __always_inline s64 arch_atomic64_fetch_xor_acquire(s64 i, atomic64_t *v) { s64 ret = arch_atomic64_fetch_xor_relaxed(i, v); __atomic_acquire_fence(); return ret; } #define arch_atomic64_fetch_xor_acquire arch_atomic64_fetch_xor_acquire #endif #ifndef arch_atomic64_fetch_xor_release static __always_inline s64 arch_atomic64_fetch_xor_release(s64 i, atomic64_t *v) { __atomic_release_fence(); return arch_atomic64_fetch_xor_relaxed(i, v); } #define arch_atomic64_fetch_xor_release arch_atomic64_fetch_xor_release #endif #ifndef arch_atomic64_fetch_xor static __always_inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_fetch_xor_relaxed(i, v); __atomic_post_full_fence(); return ret; } #define arch_atomic64_fetch_xor arch_atomic64_fetch_xor #endif #endif /* arch_atomic64_fetch_xor_relaxed */ #ifndef arch_atomic64_xchg_relaxed #define arch_atomic64_xchg_acquire arch_atomic64_xchg #define arch_atomic64_xchg_release arch_atomic64_xchg #define arch_atomic64_xchg_relaxed arch_atomic64_xchg #else /* arch_atomic64_xchg_relaxed */ #ifndef arch_atomic64_xchg_acquire static __always_inline s64 arch_atomic64_xchg_acquire(atomic64_t *v, s64 i) { s64 ret = arch_atomic64_xchg_relaxed(v, i); __atomic_acquire_fence(); return ret; } #define arch_atomic64_xchg_acquire arch_atomic64_xchg_acquire #endif #ifndef arch_atomic64_xchg_release static __always_inline s64 arch_atomic64_xchg_release(atomic64_t *v, s64 i) { __atomic_release_fence(); return arch_atomic64_xchg_relaxed(v, i); } #define arch_atomic64_xchg_release arch_atomic64_xchg_release #endif #ifndef arch_atomic64_xchg static __always_inline s64 arch_atomic64_xchg(atomic64_t *v, s64 i) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_xchg_relaxed(v, i); __atomic_post_full_fence(); return ret; } #define arch_atomic64_xchg arch_atomic64_xchg #endif #endif /* arch_atomic64_xchg_relaxed */ #ifndef arch_atomic64_cmpxchg_relaxed #define arch_atomic64_cmpxchg_acquire arch_atomic64_cmpxchg #define arch_atomic64_cmpxchg_release arch_atomic64_cmpxchg #define arch_atomic64_cmpxchg_relaxed arch_atomic64_cmpxchg #else /* arch_atomic64_cmpxchg_relaxed */ #ifndef arch_atomic64_cmpxchg_acquire static __always_inline s64 arch_atomic64_cmpxchg_acquire(atomic64_t *v, s64 old, s64 new) { s64 ret = arch_atomic64_cmpxchg_relaxed(v, old, new); __atomic_acquire_fence(); return ret; } #define arch_atomic64_cmpxchg_acquire arch_atomic64_cmpxchg_acquire #endif #ifndef arch_atomic64_cmpxchg_release static __always_inline s64 arch_atomic64_cmpxchg_release(atomic64_t *v, s64 old, s64 new) { __atomic_release_fence(); return arch_atomic64_cmpxchg_relaxed(v, old, new); } #define arch_atomic64_cmpxchg_release arch_atomic64_cmpxchg_release #endif #ifndef arch_atomic64_cmpxchg static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new) { s64 ret; __atomic_pre_full_fence(); ret = arch_atomic64_cmpxchg_relaxed(v, old, new); __atomic_post_full_fence(); return ret; } #define arch_atomic64_cmpxchg arch_atomic64_cmpxchg #endif #endif /* arch_atomic64_cmpxchg_relaxed */ #ifndef arch_atomic64_try_cmpxchg_relaxed #ifdef arch_atomic64_try_cmpxchg #define arch_atomic64_try_cmpxchg_acquire arch_atomic64_try_cmpxchg #define arch_atomic64_try_cmpxchg_release arch_atomic64_try_cmpxchg #define arch_atomic64_try_cmpxchg_relaxed arch_atomic64_try_cmpxchg #endif /* arch_atomic64_try_cmpxchg */ #ifndef arch_atomic64_try_cmpxchg static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) { s64 r, o = *old; r = arch_atomic64_cmpxchg(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg #endif #ifndef arch_atomic64_try_cmpxchg_acquire static __always_inline bool arch_atomic64_try_cmpxchg_acquire(atomic64_t *v, s64 *old, s64 new) { s64 r, o = *old; r = arch_atomic64_cmpxchg_acquire(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic64_try_cmpxchg_acquire arch_atomic64_try_cmpxchg_acquire #endif #ifndef arch_atomic64_try_cmpxchg_release static __always_inline bool arch_atomic64_try_cmpxchg_release(atomic64_t *v, s64 *old, s64 new) { s64 r, o = *old; r = arch_atomic64_cmpxchg_release(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic64_try_cmpxchg_release arch_atomic64_try_cmpxchg_release #endif #ifndef arch_atomic64_try_cmpxchg_relaxed static __always_inline bool arch_atomic64_try_cmpxchg_relaxed(atomic64_t *v, s64 *old, s64 new) { s64 r, o = *old; r = arch_atomic64_cmpxchg_relaxed(v, o, new); if (unlikely(r != o)) *old = r; return likely(r == o); } #define arch_atomic64_try_cmpxchg_relaxed arch_atomic64_try_cmpxchg_relaxed #endif #else /* arch_atomic64_try_cmpxchg_relaxed */ #ifndef arch_atomic64_try_cmpxchg_acquire static __always_inline bool arch_atomic64_try_cmpxchg_acquire(atomic64_t *v, s64 *old, s64 new) { bool ret = arch_atomic64_try_cmpxchg_relaxed(v, old, new); __atomic_acquire_fence(); return ret; } #define arch_atomic64_try_cmpxchg_acquire arch_atomic64_try_cmpxchg_acquire #endif #ifndef arch_atomic64_try_cmpxchg_release static __always_inline bool arch_atomic64_try_cmpxchg_release(atomic64_t *v, s64 *old, s64 new) { __atomic_release_fence(); return arch_atomic64_try_cmpxchg_relaxed(v, old, new); } #define arch_atomic64_try_cmpxchg_release arch_atomic64_try_cmpxchg_release #endif #ifndef arch_atomic64_try_cmpxchg static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) { bool ret; __atomic_pre_full_fence(); ret = arch_atomic64_try_cmpxchg_relaxed(v, old, new); __atomic_post_full_fence(); return ret; } #define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg #endif #endif /* arch_atomic64_try_cmpxchg_relaxed */ #ifndef arch_atomic64_sub_and_test /** * arch_atomic64_sub_and_test - subtract value from variable and test result * @i: integer value to subtract * @v: pointer of type atomic64_t * * Atomically subtracts @i from @v and returns * true if the result is zero, or false for all * other cases. */ static __always_inline bool arch_atomic64_sub_and_test(s64 i, atomic64_t *v) { return arch_atomic64_sub_return(i, v) == 0; } #define arch_atomic64_sub_and_test arch_atomic64_sub_and_test #endif #ifndef arch_atomic64_dec_and_test /** * arch_atomic64_dec_and_test - decrement and test * @v: pointer of type atomic64_t * * Atomically decrements @v by 1 and * returns true if the result is 0, or false for all other * cases. */ static __always_inline bool arch_atomic64_dec_and_test(atomic64_t *v) { return arch_atomic64_dec_return(v) == 0; } #define arch_atomic64_dec_and_test arch_atomic64_dec_and_test #endif #ifndef arch_atomic64_inc_and_test /** * arch_atomic64_inc_and_test - increment and test * @v: pointer of type atomic64_t * * Atomically increments @v by 1 * and returns true if the result is zero, or false for all * other cases. */ static __always_inline bool arch_atomic64_inc_and_test(atomic64_t *v) { return arch_atomic64_inc_return(v) == 0; } #define arch_atomic64_inc_and_test arch_atomic64_inc_and_test #endif #ifndef arch_atomic64_add_negative /** * arch_atomic64_add_negative - add and test if negative * @i: integer value to add * @v: pointer of type atomic64_t * * Atomically adds @i to @v and returns true * if the result is negative, or false when * result is greater than or equal to zero. */ static __always_inline bool arch_atomic64_add_negative(s64 i, atomic64_t *v) { return arch_atomic64_add_return(i, v) < 0; } #define arch_atomic64_add_negative arch_atomic64_add_negative #endif #ifndef arch_atomic64_fetch_add_unless /** * arch_atomic64_fetch_add_unless - add unless the number is already a given value * @v: pointer of type atomic64_t * @a: the amount to add to v... * @u: ...unless v is equal to u. * * Atomically adds @a to @v, so long as @v was not already @u. * Returns original value of @v */ static __always_inline s64 arch_atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) { s64 c = arch_atomic64_read(v); do { if (unlikely(c == u)) break; } while (!arch_atomic64_try_cmpxchg(v, &c, c + a)); return c; } #define arch_atomic64_fetch_add_unless arch_atomic64_fetch_add_unless #endif #ifndef arch_atomic64_add_unless /** * arch_atomic64_add_unless - add unless the number is already a given value * @v: pointer of type atomic64_t * @a: the amount to add to v... * @u: ...unless v is equal to u. * * Atomically adds @a to @v, if @v was not already @u. * Returns true if the addition was done. */ static __always_inline bool arch_atomic64_add_unless(atomic64_t *v, s64 a, s64 u) { return arch_atomic64_fetch_add_unless(v, a, u) != u; } #define arch_atomic64_add_unless arch_atomic64_add_unless #endif #ifndef arch_atomic64_inc_not_zero /** * arch_atomic64_inc_not_zero - increment unless the number is zero * @v: pointer of type atomic64_t * * Atomically increments @v by 1, if @v is non-zero. * Returns true if the increment was done. */ static __always_inline bool arch_atomic64_inc_not_zero(atomic64_t *v) { return arch_atomic64_add_unless(v, 1, 0); } #define arch_atomic64_inc_not_zero arch_atomic64_inc_not_zero #endif #ifndef arch_atomic64_inc_unless_negative static __always_inline bool arch_atomic64_inc_unless_negative(atomic64_t *v) { s64 c = arch_atomic64_read(v); do { if (unlikely(c < 0)) return false; } while (!arch_atomic64_try_cmpxchg(v, &c, c + 1)); return true; } #define arch_atomic64_inc_unless_negative arch_atomic64_inc_unless_negative #endif #ifndef arch_atomic64_dec_unless_positive static __always_inline bool arch_atomic64_dec_unless_positive(atomic64_t *v) { s64 c = arch_atomic64_read(v); do { if (unlikely(c > 0)) return false; } while (!arch_atomic64_try_cmpxchg(v, &c, c - 1)); return true; } #define arch_atomic64_dec_unless_positive arch_atomic64_dec_unless_positive #endif #ifndef arch_atomic64_dec_if_positive static __always_inline s64 arch_atomic64_dec_if_positive(atomic64_t *v) { s64 dec, c = arch_atomic64_read(v); do { dec = c - 1; if (unlikely(dec < 0)) break; } while (!arch_atomic64_try_cmpxchg(v, &c, dec)); return dec; } #define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive #endif #endif /* _LINUX_ATOMIC_FALLBACK_H */ // 8e2cc06bc0d2c0967d2f8424762bd48555ee40ae PK ! ۞,�� � atomic/atomic-instrumented.hnu �[��� // SPDX-License-Identifier: GPL-2.0 // Generated by scripts/atomic/gen-atomic-instrumented.sh // DO NOT MODIFY THIS FILE DIRECTLY /* * This file provides wrappers with KASAN instrumentation for atomic operations. * To use this functionality an arch's atomic.h file needs to define all * atomic operations with arch_ prefix (e.g. arch_atomic_read()) and include * this file at the end. This file provides atomic_read() that forwards to * arch_atomic_read() for actual atomic operation. * Note: if an arch atomic operation is implemented by means of other atomic * operations (e.g. atomic_read()/atomic_cmpxchg() loop), then it needs to use * arch_ variants (i.e. arch_atomic_read()/arch_atomic_cmpxchg()) to avoid * double instrumentation. */ #ifndef _LINUX_ATOMIC_INSTRUMENTED_H #define _LINUX_ATOMIC_INSTRUMENTED_H #include <linux/build_bug.h> #include <linux/compiler.h> #include <linux/instrumented.h> static __always_inline int atomic_read(const atomic_t *v) { instrument_atomic_read(v, sizeof(*v)); return arch_atomic_read(v); } static __always_inline int atomic_read_acquire(const atomic_t *v) { instrument_atomic_read(v, sizeof(*v)); return arch_atomic_read_acquire(v); } static __always_inline void atomic_set(atomic_t *v, int i) { instrument_atomic_write(v, sizeof(*v)); arch_atomic_set(v, i); } static __always_inline void atomic_set_release(atomic_t *v, int i) { instrument_atomic_write(v, sizeof(*v)); arch_atomic_set_release(v, i); } static __always_inline void atomic_add(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_add(i, v); } static __always_inline int atomic_add_return(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_add_return(i, v); } static __always_inline int atomic_add_return_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_add_return_acquire(i, v); } static __always_inline int atomic_add_return_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_add_return_release(i, v); } static __always_inline int atomic_add_return_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_add_return_relaxed(i, v); } static __always_inline int atomic_fetch_add(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_add(i, v); } static __always_inline int atomic_fetch_add_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_add_acquire(i, v); } static __always_inline int atomic_fetch_add_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_add_release(i, v); } static __always_inline int atomic_fetch_add_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_add_relaxed(i, v); } static __always_inline void atomic_sub(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_sub(i, v); } static __always_inline int atomic_sub_return(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_sub_return(i, v); } static __always_inline int atomic_sub_return_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_sub_return_acquire(i, v); } static __always_inline int atomic_sub_return_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_sub_return_release(i, v); } static __always_inline int atomic_sub_return_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_sub_return_relaxed(i, v); } static __always_inline int atomic_fetch_sub(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_sub(i, v); } static __always_inline int atomic_fetch_sub_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_sub_acquire(i, v); } static __always_inline int atomic_fetch_sub_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_sub_release(i, v); } static __always_inline int atomic_fetch_sub_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_sub_relaxed(i, v); } static __always_inline void atomic_inc(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_inc(v); } static __always_inline int atomic_inc_return(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_return(v); } static __always_inline int atomic_inc_return_acquire(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_return_acquire(v); } static __always_inline int atomic_inc_return_release(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_return_release(v); } static __always_inline int atomic_inc_return_relaxed(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_return_relaxed(v); } static __always_inline int atomic_fetch_inc(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_inc(v); } static __always_inline int atomic_fetch_inc_acquire(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_inc_acquire(v); } static __always_inline int atomic_fetch_inc_release(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_inc_release(v); } static __always_inline int atomic_fetch_inc_relaxed(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_inc_relaxed(v); } static __always_inline void atomic_dec(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_dec(v); } static __always_inline int atomic_dec_return(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_return(v); } static __always_inline int atomic_dec_return_acquire(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_return_acquire(v); } static __always_inline int atomic_dec_return_release(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_return_release(v); } static __always_inline int atomic_dec_return_relaxed(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_return_relaxed(v); } static __always_inline int atomic_fetch_dec(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_dec(v); } static __always_inline int atomic_fetch_dec_acquire(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_dec_acquire(v); } static __always_inline int atomic_fetch_dec_release(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_dec_release(v); } static __always_inline int atomic_fetch_dec_relaxed(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_dec_relaxed(v); } static __always_inline void atomic_and(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_and(i, v); } static __always_inline int atomic_fetch_and(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_and(i, v); } static __always_inline int atomic_fetch_and_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_and_acquire(i, v); } static __always_inline int atomic_fetch_and_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_and_release(i, v); } static __always_inline int atomic_fetch_and_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_and_relaxed(i, v); } static __always_inline void atomic_andnot(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_andnot(i, v); } static __always_inline int atomic_fetch_andnot(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_andnot(i, v); } static __always_inline int atomic_fetch_andnot_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_andnot_acquire(i, v); } static __always_inline int atomic_fetch_andnot_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_andnot_release(i, v); } static __always_inline int atomic_fetch_andnot_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_andnot_relaxed(i, v); } static __always_inline void atomic_or(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_or(i, v); } static __always_inline int atomic_fetch_or(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_or(i, v); } static __always_inline int atomic_fetch_or_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_or_acquire(i, v); } static __always_inline int atomic_fetch_or_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_or_release(i, v); } static __always_inline int atomic_fetch_or_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_or_relaxed(i, v); } static __always_inline void atomic_xor(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_xor(i, v); } static __always_inline int atomic_fetch_xor(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_xor(i, v); } static __always_inline int atomic_fetch_xor_acquire(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_xor_acquire(i, v); } static __always_inline int atomic_fetch_xor_release(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_xor_release(i, v); } static __always_inline int atomic_fetch_xor_relaxed(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_xor_relaxed(i, v); } static __always_inline int atomic_xchg(atomic_t *v, int i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_xchg(v, i); } static __always_inline int atomic_xchg_acquire(atomic_t *v, int i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_xchg_acquire(v, i); } static __always_inline int atomic_xchg_release(atomic_t *v, int i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_xchg_release(v, i); } static __always_inline int atomic_xchg_relaxed(atomic_t *v, int i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_xchg_relaxed(v, i); } static __always_inline int atomic_cmpxchg(atomic_t *v, int old, int new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_cmpxchg(v, old, new); } static __always_inline int atomic_cmpxchg_acquire(atomic_t *v, int old, int new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_cmpxchg_acquire(v, old, new); } static __always_inline int atomic_cmpxchg_release(atomic_t *v, int old, int new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_cmpxchg_release(v, old, new); } static __always_inline int atomic_cmpxchg_relaxed(atomic_t *v, int old, int new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_cmpxchg_relaxed(v, old, new); } static __always_inline bool atomic_try_cmpxchg(atomic_t *v, int *old, int new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_try_cmpxchg(v, old, new); } static __always_inline bool atomic_try_cmpxchg_acquire(atomic_t *v, int *old, int new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_try_cmpxchg_acquire(v, old, new); } static __always_inline bool atomic_try_cmpxchg_release(atomic_t *v, int *old, int new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_try_cmpxchg_release(v, old, new); } static __always_inline bool atomic_try_cmpxchg_relaxed(atomic_t *v, int *old, int new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_try_cmpxchg_relaxed(v, old, new); } static __always_inline bool atomic_sub_and_test(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_sub_and_test(i, v); } static __always_inline bool atomic_dec_and_test(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_and_test(v); } static __always_inline bool atomic_inc_and_test(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_and_test(v); } static __always_inline bool atomic_add_negative(int i, atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_add_negative(i, v); } static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_fetch_add_unless(v, a, u); } static __always_inline bool atomic_add_unless(atomic_t *v, int a, int u) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_add_unless(v, a, u); } static __always_inline bool atomic_inc_not_zero(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_not_zero(v); } static __always_inline bool atomic_inc_unless_negative(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_inc_unless_negative(v); } static __always_inline bool atomic_dec_unless_positive(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_unless_positive(v); } static __always_inline int atomic_dec_if_positive(atomic_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_dec_if_positive(v); } static __always_inline s64 atomic64_read(const atomic64_t *v) { instrument_atomic_read(v, sizeof(*v)); return arch_atomic64_read(v); } static __always_inline s64 atomic64_read_acquire(const atomic64_t *v) { instrument_atomic_read(v, sizeof(*v)); return arch_atomic64_read_acquire(v); } static __always_inline void atomic64_set(atomic64_t *v, s64 i) { instrument_atomic_write(v, sizeof(*v)); arch_atomic64_set(v, i); } static __always_inline void atomic64_set_release(atomic64_t *v, s64 i) { instrument_atomic_write(v, sizeof(*v)); arch_atomic64_set_release(v, i); } static __always_inline void atomic64_add(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_add(i, v); } static __always_inline s64 atomic64_add_return(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_add_return(i, v); } static __always_inline s64 atomic64_add_return_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_add_return_acquire(i, v); } static __always_inline s64 atomic64_add_return_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_add_return_release(i, v); } static __always_inline s64 atomic64_add_return_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_add_return_relaxed(i, v); } static __always_inline s64 atomic64_fetch_add(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_add(i, v); } static __always_inline s64 atomic64_fetch_add_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_add_acquire(i, v); } static __always_inline s64 atomic64_fetch_add_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_add_release(i, v); } static __always_inline s64 atomic64_fetch_add_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_add_relaxed(i, v); } static __always_inline void atomic64_sub(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_sub(i, v); } static __always_inline s64 atomic64_sub_return(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_sub_return(i, v); } static __always_inline s64 atomic64_sub_return_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_sub_return_acquire(i, v); } static __always_inline s64 atomic64_sub_return_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_sub_return_release(i, v); } static __always_inline s64 atomic64_sub_return_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_sub_return_relaxed(i, v); } static __always_inline s64 atomic64_fetch_sub(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_sub(i, v); } static __always_inline s64 atomic64_fetch_sub_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_sub_acquire(i, v); } static __always_inline s64 atomic64_fetch_sub_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_sub_release(i, v); } static __always_inline s64 atomic64_fetch_sub_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_sub_relaxed(i, v); } static __always_inline void atomic64_inc(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_inc(v); } static __always_inline s64 atomic64_inc_return(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_return(v); } static __always_inline s64 atomic64_inc_return_acquire(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_return_acquire(v); } static __always_inline s64 atomic64_inc_return_release(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_return_release(v); } static __always_inline s64 atomic64_inc_return_relaxed(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_return_relaxed(v); } static __always_inline s64 atomic64_fetch_inc(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_inc(v); } static __always_inline s64 atomic64_fetch_inc_acquire(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_inc_acquire(v); } static __always_inline s64 atomic64_fetch_inc_release(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_inc_release(v); } static __always_inline s64 atomic64_fetch_inc_relaxed(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_inc_relaxed(v); } static __always_inline void atomic64_dec(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_dec(v); } static __always_inline s64 atomic64_dec_return(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_return(v); } static __always_inline s64 atomic64_dec_return_acquire(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_return_acquire(v); } static __always_inline s64 atomic64_dec_return_release(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_return_release(v); } static __always_inline s64 atomic64_dec_return_relaxed(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_return_relaxed(v); } static __always_inline s64 atomic64_fetch_dec(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_dec(v); } static __always_inline s64 atomic64_fetch_dec_acquire(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_dec_acquire(v); } static __always_inline s64 atomic64_fetch_dec_release(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_dec_release(v); } static __always_inline s64 atomic64_fetch_dec_relaxed(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_dec_relaxed(v); } static __always_inline void atomic64_and(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_and(i, v); } static __always_inline s64 atomic64_fetch_and(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_and(i, v); } static __always_inline s64 atomic64_fetch_and_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_and_acquire(i, v); } static __always_inline s64 atomic64_fetch_and_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_and_release(i, v); } static __always_inline s64 atomic64_fetch_and_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_and_relaxed(i, v); } static __always_inline void atomic64_andnot(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_andnot(i, v); } static __always_inline s64 atomic64_fetch_andnot(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_andnot(i, v); } static __always_inline s64 atomic64_fetch_andnot_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_andnot_acquire(i, v); } static __always_inline s64 atomic64_fetch_andnot_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_andnot_release(i, v); } static __always_inline s64 atomic64_fetch_andnot_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_andnot_relaxed(i, v); } static __always_inline void atomic64_or(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_or(i, v); } static __always_inline s64 atomic64_fetch_or(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_or(i, v); } static __always_inline s64 atomic64_fetch_or_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_or_acquire(i, v); } static __always_inline s64 atomic64_fetch_or_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_or_release(i, v); } static __always_inline s64 atomic64_fetch_or_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_or_relaxed(i, v); } static __always_inline void atomic64_xor(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic64_xor(i, v); } static __always_inline s64 atomic64_fetch_xor(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_xor(i, v); } static __always_inline s64 atomic64_fetch_xor_acquire(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_xor_acquire(i, v); } static __always_inline s64 atomic64_fetch_xor_release(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_xor_release(i, v); } static __always_inline s64 atomic64_fetch_xor_relaxed(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_xor_relaxed(i, v); } static __always_inline s64 atomic64_xchg(atomic64_t *v, s64 i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_xchg(v, i); } static __always_inline s64 atomic64_xchg_acquire(atomic64_t *v, s64 i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_xchg_acquire(v, i); } static __always_inline s64 atomic64_xchg_release(atomic64_t *v, s64 i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_xchg_release(v, i); } static __always_inline s64 atomic64_xchg_relaxed(atomic64_t *v, s64 i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_xchg_relaxed(v, i); } static __always_inline s64 atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_cmpxchg(v, old, new); } static __always_inline s64 atomic64_cmpxchg_acquire(atomic64_t *v, s64 old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_cmpxchg_acquire(v, old, new); } static __always_inline s64 atomic64_cmpxchg_release(atomic64_t *v, s64 old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_cmpxchg_release(v, old, new); } static __always_inline s64 atomic64_cmpxchg_relaxed(atomic64_t *v, s64 old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_cmpxchg_relaxed(v, old, new); } static __always_inline bool atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic64_try_cmpxchg(v, old, new); } static __always_inline bool atomic64_try_cmpxchg_acquire(atomic64_t *v, s64 *old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic64_try_cmpxchg_acquire(v, old, new); } static __always_inline bool atomic64_try_cmpxchg_release(atomic64_t *v, s64 *old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic64_try_cmpxchg_release(v, old, new); } static __always_inline bool atomic64_try_cmpxchg_relaxed(atomic64_t *v, s64 *old, s64 new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic64_try_cmpxchg_relaxed(v, old, new); } static __always_inline bool atomic64_sub_and_test(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_sub_and_test(i, v); } static __always_inline bool atomic64_dec_and_test(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_and_test(v); } static __always_inline bool atomic64_inc_and_test(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_and_test(v); } static __always_inline bool atomic64_add_negative(s64 i, atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_add_negative(i, v); } static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_fetch_add_unless(v, a, u); } static __always_inline bool atomic64_add_unless(atomic64_t *v, s64 a, s64 u) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_add_unless(v, a, u); } static __always_inline bool atomic64_inc_not_zero(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_not_zero(v); } static __always_inline bool atomic64_inc_unless_negative(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_inc_unless_negative(v); } static __always_inline bool atomic64_dec_unless_positive(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_unless_positive(v); } static __always_inline s64 atomic64_dec_if_positive(atomic64_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic64_dec_if_positive(v); } static __always_inline long atomic_long_read(const atomic_long_t *v) { instrument_atomic_read(v, sizeof(*v)); return arch_atomic_long_read(v); } static __always_inline long atomic_long_read_acquire(const atomic_long_t *v) { instrument_atomic_read(v, sizeof(*v)); return arch_atomic_long_read_acquire(v); } static __always_inline void atomic_long_set(atomic_long_t *v, long i) { instrument_atomic_write(v, sizeof(*v)); arch_atomic_long_set(v, i); } static __always_inline void atomic_long_set_release(atomic_long_t *v, long i) { instrument_atomic_write(v, sizeof(*v)); arch_atomic_long_set_release(v, i); } static __always_inline void atomic_long_add(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_add(i, v); } static __always_inline long atomic_long_add_return(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_add_return(i, v); } static __always_inline long atomic_long_add_return_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_add_return_acquire(i, v); } static __always_inline long atomic_long_add_return_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_add_return_release(i, v); } static __always_inline long atomic_long_add_return_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_add_return_relaxed(i, v); } static __always_inline long atomic_long_fetch_add(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_add(i, v); } static __always_inline long atomic_long_fetch_add_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_add_acquire(i, v); } static __always_inline long atomic_long_fetch_add_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_add_release(i, v); } static __always_inline long atomic_long_fetch_add_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_add_relaxed(i, v); } static __always_inline void atomic_long_sub(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_sub(i, v); } static __always_inline long atomic_long_sub_return(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_sub_return(i, v); } static __always_inline long atomic_long_sub_return_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_sub_return_acquire(i, v); } static __always_inline long atomic_long_sub_return_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_sub_return_release(i, v); } static __always_inline long atomic_long_sub_return_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_sub_return_relaxed(i, v); } static __always_inline long atomic_long_fetch_sub(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_sub(i, v); } static __always_inline long atomic_long_fetch_sub_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_sub_acquire(i, v); } static __always_inline long atomic_long_fetch_sub_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_sub_release(i, v); } static __always_inline long atomic_long_fetch_sub_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_sub_relaxed(i, v); } static __always_inline void atomic_long_inc(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_inc(v); } static __always_inline long atomic_long_inc_return(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_return(v); } static __always_inline long atomic_long_inc_return_acquire(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_return_acquire(v); } static __always_inline long atomic_long_inc_return_release(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_return_release(v); } static __always_inline long atomic_long_inc_return_relaxed(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_return_relaxed(v); } static __always_inline long atomic_long_fetch_inc(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_inc(v); } static __always_inline long atomic_long_fetch_inc_acquire(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_inc_acquire(v); } static __always_inline long atomic_long_fetch_inc_release(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_inc_release(v); } static __always_inline long atomic_long_fetch_inc_relaxed(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_inc_relaxed(v); } static __always_inline void atomic_long_dec(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_dec(v); } static __always_inline long atomic_long_dec_return(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_return(v); } static __always_inline long atomic_long_dec_return_acquire(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_return_acquire(v); } static __always_inline long atomic_long_dec_return_release(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_return_release(v); } static __always_inline long atomic_long_dec_return_relaxed(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_return_relaxed(v); } static __always_inline long atomic_long_fetch_dec(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_dec(v); } static __always_inline long atomic_long_fetch_dec_acquire(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_dec_acquire(v); } static __always_inline long atomic_long_fetch_dec_release(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_dec_release(v); } static __always_inline long atomic_long_fetch_dec_relaxed(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_dec_relaxed(v); } static __always_inline void atomic_long_and(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_and(i, v); } static __always_inline long atomic_long_fetch_and(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_and(i, v); } static __always_inline long atomic_long_fetch_and_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_and_acquire(i, v); } static __always_inline long atomic_long_fetch_and_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_and_release(i, v); } static __always_inline long atomic_long_fetch_and_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_and_relaxed(i, v); } static __always_inline void atomic_long_andnot(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_andnot(i, v); } static __always_inline long atomic_long_fetch_andnot(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_andnot(i, v); } static __always_inline long atomic_long_fetch_andnot_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_andnot_acquire(i, v); } static __always_inline long atomic_long_fetch_andnot_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_andnot_release(i, v); } static __always_inline long atomic_long_fetch_andnot_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_andnot_relaxed(i, v); } static __always_inline void atomic_long_or(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_or(i, v); } static __always_inline long atomic_long_fetch_or(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_or(i, v); } static __always_inline long atomic_long_fetch_or_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_or_acquire(i, v); } static __always_inline long atomic_long_fetch_or_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_or_release(i, v); } static __always_inline long atomic_long_fetch_or_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_or_relaxed(i, v); } static __always_inline void atomic_long_xor(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); arch_atomic_long_xor(i, v); } static __always_inline long atomic_long_fetch_xor(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_xor(i, v); } static __always_inline long atomic_long_fetch_xor_acquire(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_xor_acquire(i, v); } static __always_inline long atomic_long_fetch_xor_release(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_xor_release(i, v); } static __always_inline long atomic_long_fetch_xor_relaxed(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_xor_relaxed(i, v); } static __always_inline long atomic_long_xchg(atomic_long_t *v, long i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_xchg(v, i); } static __always_inline long atomic_long_xchg_acquire(atomic_long_t *v, long i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_xchg_acquire(v, i); } static __always_inline long atomic_long_xchg_release(atomic_long_t *v, long i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_xchg_release(v, i); } static __always_inline long atomic_long_xchg_relaxed(atomic_long_t *v, long i) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_xchg_relaxed(v, i); } static __always_inline long atomic_long_cmpxchg(atomic_long_t *v, long old, long new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_cmpxchg(v, old, new); } static __always_inline long atomic_long_cmpxchg_acquire(atomic_long_t *v, long old, long new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_cmpxchg_acquire(v, old, new); } static __always_inline long atomic_long_cmpxchg_release(atomic_long_t *v, long old, long new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_cmpxchg_release(v, old, new); } static __always_inline long atomic_long_cmpxchg_relaxed(atomic_long_t *v, long old, long new) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_cmpxchg_relaxed(v, old, new); } static __always_inline bool atomic_long_try_cmpxchg(atomic_long_t *v, long *old, long new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_long_try_cmpxchg(v, old, new); } static __always_inline bool atomic_long_try_cmpxchg_acquire(atomic_long_t *v, long *old, long new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_long_try_cmpxchg_acquire(v, old, new); } static __always_inline bool atomic_long_try_cmpxchg_release(atomic_long_t *v, long *old, long new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_long_try_cmpxchg_release(v, old, new); } static __always_inline bool atomic_long_try_cmpxchg_relaxed(atomic_long_t *v, long *old, long new) { instrument_atomic_read_write(v, sizeof(*v)); instrument_atomic_read_write(old, sizeof(*old)); return arch_atomic_long_try_cmpxchg_relaxed(v, old, new); } static __always_inline bool atomic_long_sub_and_test(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_sub_and_test(i, v); } static __always_inline bool atomic_long_dec_and_test(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_and_test(v); } static __always_inline bool atomic_long_inc_and_test(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_and_test(v); } static __always_inline bool atomic_long_add_negative(long i, atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_add_negative(i, v); } static __always_inline long atomic_long_fetch_add_unless(atomic_long_t *v, long a, long u) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_fetch_add_unless(v, a, u); } static __always_inline bool atomic_long_add_unless(atomic_long_t *v, long a, long u) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_add_unless(v, a, u); } static __always_inline bool atomic_long_inc_not_zero(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_not_zero(v); } static __always_inline bool atomic_long_inc_unless_negative(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_inc_unless_negative(v); } static __always_inline bool atomic_long_dec_unless_positive(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_unless_positive(v); } static __always_inline long atomic_long_dec_if_positive(atomic_long_t *v) { instrument_atomic_read_write(v, sizeof(*v)); return arch_atomic_long_dec_if_positive(v); } #define xchg(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_xchg(__ai_ptr, __VA_ARGS__); \ }) #define xchg_acquire(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_xchg_acquire(__ai_ptr, __VA_ARGS__); \ }) #define xchg_release(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_xchg_release(__ai_ptr, __VA_ARGS__); \ }) #define xchg_relaxed(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_xchg_relaxed(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg_acquire(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg_acquire(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg_release(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg_release(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg_relaxed(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg_relaxed(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg64(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg64(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg64_acquire(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg64_acquire(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg64_release(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg64_release(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg64_relaxed(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg64_relaxed(__ai_ptr, __VA_ARGS__); \ }) #define try_cmpxchg(ptr, oldp, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ typeof(oldp) __ai_oldp = (oldp); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ instrument_atomic_write(__ai_oldp, sizeof(*__ai_oldp)); \ arch_try_cmpxchg(__ai_ptr, __ai_oldp, __VA_ARGS__); \ }) #define try_cmpxchg_acquire(ptr, oldp, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ typeof(oldp) __ai_oldp = (oldp); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ instrument_atomic_write(__ai_oldp, sizeof(*__ai_oldp)); \ arch_try_cmpxchg_acquire(__ai_ptr, __ai_oldp, __VA_ARGS__); \ }) #define try_cmpxchg_release(ptr, oldp, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ typeof(oldp) __ai_oldp = (oldp); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ instrument_atomic_write(__ai_oldp, sizeof(*__ai_oldp)); \ arch_try_cmpxchg_release(__ai_ptr, __ai_oldp, __VA_ARGS__); \ }) #define try_cmpxchg_relaxed(ptr, oldp, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ typeof(oldp) __ai_oldp = (oldp); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ instrument_atomic_write(__ai_oldp, sizeof(*__ai_oldp)); \ arch_try_cmpxchg_relaxed(__ai_ptr, __ai_oldp, __VA_ARGS__); \ }) #define cmpxchg_local(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg_local(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg64_local(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_cmpxchg64_local(__ai_ptr, __VA_ARGS__); \ }) #define sync_cmpxchg(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, sizeof(*__ai_ptr)); \ arch_sync_cmpxchg(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg_double(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, 2 * sizeof(*__ai_ptr)); \ arch_cmpxchg_double(__ai_ptr, __VA_ARGS__); \ }) #define cmpxchg_double_local(ptr, ...) \ ({ \ typeof(ptr) __ai_ptr = (ptr); \ instrument_atomic_write(__ai_ptr, 2 * sizeof(*__ai_ptr)); \ arch_cmpxchg_double_local(__ai_ptr, __VA_ARGS__); \ }) #endif /* _LINUX_ATOMIC_INSTRUMENTED_H */ // 2a9553f0a9d5619f19151092df5cabbbf16ce835 PK ! �@W @W atomic/atomic-long.hnu �[��� // SPDX-License-Identifier: GPL-2.0 // Generated by scripts/atomic/gen-atomic-long.sh // DO NOT MODIFY THIS FILE DIRECTLY #ifndef _LINUX_ATOMIC_LONG_H #define _LINUX_ATOMIC_LONG_H #include <linux/compiler.h> #include <asm/types.h> #ifdef CONFIG_64BIT typedef atomic64_t atomic_long_t; #define ATOMIC_LONG_INIT(i) ATOMIC64_INIT(i) #define atomic_long_cond_read_acquire atomic64_cond_read_acquire #define atomic_long_cond_read_relaxed atomic64_cond_read_relaxed #else typedef atomic_t atomic_long_t; #define ATOMIC_LONG_INIT(i) ATOMIC_INIT(i) #define atomic_long_cond_read_acquire atomic_cond_read_acquire #define atomic_long_cond_read_relaxed atomic_cond_read_relaxed #endif #ifdef CONFIG_64BIT static __always_inline long arch_atomic_long_read(const atomic_long_t *v) { return arch_atomic64_read(v); } static __always_inline long arch_atomic_long_read_acquire(const atomic_long_t *v) { return arch_atomic64_read_acquire(v); } static __always_inline void arch_atomic_long_set(atomic_long_t *v, long i) { arch_atomic64_set(v, i); } static __always_inline void arch_atomic_long_set_release(atomic_long_t *v, long i) { arch_atomic64_set_release(v, i); } static __always_inline void arch_atomic_long_add(long i, atomic_long_t *v) { arch_atomic64_add(i, v); } static __always_inline long arch_atomic_long_add_return(long i, atomic_long_t *v) { return arch_atomic64_add_return(i, v); } static __always_inline long arch_atomic_long_add_return_acquire(long i, atomic_long_t *v) { return arch_atomic64_add_return_acquire(i, v); } static __always_inline long arch_atomic_long_add_return_release(long i, atomic_long_t *v) { return arch_atomic64_add_return_release(i, v); } static __always_inline long arch_atomic_long_add_return_relaxed(long i, atomic_long_t *v) { return arch_atomic64_add_return_relaxed(i, v); } static __always_inline long arch_atomic_long_fetch_add(long i, atomic_long_t *v) { return arch_atomic64_fetch_add(i, v); } static __always_inline long arch_atomic_long_fetch_add_acquire(long i, atomic_long_t *v) { return arch_atomic64_fetch_add_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_add_release(long i, atomic_long_t *v) { return arch_atomic64_fetch_add_release(i, v); } static __always_inline long arch_atomic_long_fetch_add_relaxed(long i, atomic_long_t *v) { return arch_atomic64_fetch_add_relaxed(i, v); } static __always_inline void arch_atomic_long_sub(long i, atomic_long_t *v) { arch_atomic64_sub(i, v); } static __always_inline long arch_atomic_long_sub_return(long i, atomic_long_t *v) { return arch_atomic64_sub_return(i, v); } static __always_inline long arch_atomic_long_sub_return_acquire(long i, atomic_long_t *v) { return arch_atomic64_sub_return_acquire(i, v); } static __always_inline long arch_atomic_long_sub_return_release(long i, atomic_long_t *v) { return arch_atomic64_sub_return_release(i, v); } static __always_inline long arch_atomic_long_sub_return_relaxed(long i, atomic_long_t *v) { return arch_atomic64_sub_return_relaxed(i, v); } static __always_inline long arch_atomic_long_fetch_sub(long i, atomic_long_t *v) { return arch_atomic64_fetch_sub(i, v); } static __always_inline long arch_atomic_long_fetch_sub_acquire(long i, atomic_long_t *v) { return arch_atomic64_fetch_sub_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_sub_release(long i, atomic_long_t *v) { return arch_atomic64_fetch_sub_release(i, v); } static __always_inline long arch_atomic_long_fetch_sub_relaxed(long i, atomic_long_t *v) { return arch_atomic64_fetch_sub_relaxed(i, v); } static __always_inline void arch_atomic_long_inc(atomic_long_t *v) { arch_atomic64_inc(v); } static __always_inline long arch_atomic_long_inc_return(atomic_long_t *v) { return arch_atomic64_inc_return(v); } static __always_inline long arch_atomic_long_inc_return_acquire(atomic_long_t *v) { return arch_atomic64_inc_return_acquire(v); } static __always_inline long arch_atomic_long_inc_return_release(atomic_long_t *v) { return arch_atomic64_inc_return_release(v); } static __always_inline long arch_atomic_long_inc_return_relaxed(atomic_long_t *v) { return arch_atomic64_inc_return_relaxed(v); } static __always_inline long arch_atomic_long_fetch_inc(atomic_long_t *v) { return arch_atomic64_fetch_inc(v); } static __always_inline long arch_atomic_long_fetch_inc_acquire(atomic_long_t *v) { return arch_atomic64_fetch_inc_acquire(v); } static __always_inline long arch_atomic_long_fetch_inc_release(atomic_long_t *v) { return arch_atomic64_fetch_inc_release(v); } static __always_inline long arch_atomic_long_fetch_inc_relaxed(atomic_long_t *v) { return arch_atomic64_fetch_inc_relaxed(v); } static __always_inline void arch_atomic_long_dec(atomic_long_t *v) { arch_atomic64_dec(v); } static __always_inline long arch_atomic_long_dec_return(atomic_long_t *v) { return arch_atomic64_dec_return(v); } static __always_inline long arch_atomic_long_dec_return_acquire(atomic_long_t *v) { return arch_atomic64_dec_return_acquire(v); } static __always_inline long arch_atomic_long_dec_return_release(atomic_long_t *v) { return arch_atomic64_dec_return_release(v); } static __always_inline long arch_atomic_long_dec_return_relaxed(atomic_long_t *v) { return arch_atomic64_dec_return_relaxed(v); } static __always_inline long arch_atomic_long_fetch_dec(atomic_long_t *v) { return arch_atomic64_fetch_dec(v); } static __always_inline long arch_atomic_long_fetch_dec_acquire(atomic_long_t *v) { return arch_atomic64_fetch_dec_acquire(v); } static __always_inline long arch_atomic_long_fetch_dec_release(atomic_long_t *v) { return arch_atomic64_fetch_dec_release(v); } static __always_inline long arch_atomic_long_fetch_dec_relaxed(atomic_long_t *v) { return arch_atomic64_fetch_dec_relaxed(v); } static __always_inline void arch_atomic_long_and(long i, atomic_long_t *v) { arch_atomic64_and(i, v); } static __always_inline long arch_atomic_long_fetch_and(long i, atomic_long_t *v) { return arch_atomic64_fetch_and(i, v); } static __always_inline long arch_atomic_long_fetch_and_acquire(long i, atomic_long_t *v) { return arch_atomic64_fetch_and_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_and_release(long i, atomic_long_t *v) { return arch_atomic64_fetch_and_release(i, v); } static __always_inline long arch_atomic_long_fetch_and_relaxed(long i, atomic_long_t *v) { return arch_atomic64_fetch_and_relaxed(i, v); } static __always_inline void arch_atomic_long_andnot(long i, atomic_long_t *v) { arch_atomic64_andnot(i, v); } static __always_inline long arch_atomic_long_fetch_andnot(long i, atomic_long_t *v) { return arch_atomic64_fetch_andnot(i, v); } static __always_inline long arch_atomic_long_fetch_andnot_acquire(long i, atomic_long_t *v) { return arch_atomic64_fetch_andnot_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_andnot_release(long i, atomic_long_t *v) { return arch_atomic64_fetch_andnot_release(i, v); } static __always_inline long arch_atomic_long_fetch_andnot_relaxed(long i, atomic_long_t *v) { return arch_atomic64_fetch_andnot_relaxed(i, v); } static __always_inline void arch_atomic_long_or(long i, atomic_long_t *v) { arch_atomic64_or(i, v); } static __always_inline long arch_atomic_long_fetch_or(long i, atomic_long_t *v) { return arch_atomic64_fetch_or(i, v); } static __always_inline long arch_atomic_long_fetch_or_acquire(long i, atomic_long_t *v) { return arch_atomic64_fetch_or_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_or_release(long i, atomic_long_t *v) { return arch_atomic64_fetch_or_release(i, v); } static __always_inline long arch_atomic_long_fetch_or_relaxed(long i, atomic_long_t *v) { return arch_atomic64_fetch_or_relaxed(i, v); } static __always_inline void arch_atomic_long_xor(long i, atomic_long_t *v) { arch_atomic64_xor(i, v); } static __always_inline long arch_atomic_long_fetch_xor(long i, atomic_long_t *v) { return arch_atomic64_fetch_xor(i, v); } static __always_inline long arch_atomic_long_fetch_xor_acquire(long i, atomic_long_t *v) { return arch_atomic64_fetch_xor_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_xor_release(long i, atomic_long_t *v) { return arch_atomic64_fetch_xor_release(i, v); } static __always_inline long arch_atomic_long_fetch_xor_relaxed(long i, atomic_long_t *v) { return arch_atomic64_fetch_xor_relaxed(i, v); } static __always_inline long arch_atomic_long_xchg(atomic_long_t *v, long i) { return arch_atomic64_xchg(v, i); } static __always_inline long arch_atomic_long_xchg_acquire(atomic_long_t *v, long i) { return arch_atomic64_xchg_acquire(v, i); } static __always_inline long arch_atomic_long_xchg_release(atomic_long_t *v, long i) { return arch_atomic64_xchg_release(v, i); } static __always_inline long arch_atomic_long_xchg_relaxed(atomic_long_t *v, long i) { return arch_atomic64_xchg_relaxed(v, i); } static __always_inline long arch_atomic_long_cmpxchg(atomic_long_t *v, long old, long new) { return arch_atomic64_cmpxchg(v, old, new); } static __always_inline long arch_atomic_long_cmpxchg_acquire(atomic_long_t *v, long old, long new) { return arch_atomic64_cmpxchg_acquire(v, old, new); } static __always_inline long arch_atomic_long_cmpxchg_release(atomic_long_t *v, long old, long new) { return arch_atomic64_cmpxchg_release(v, old, new); } static __always_inline long arch_atomic_long_cmpxchg_relaxed(atomic_long_t *v, long old, long new) { return arch_atomic64_cmpxchg_relaxed(v, old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg(atomic_long_t *v, long *old, long new) { return arch_atomic64_try_cmpxchg(v, (s64 *)old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg_acquire(atomic_long_t *v, long *old, long new) { return arch_atomic64_try_cmpxchg_acquire(v, (s64 *)old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg_release(atomic_long_t *v, long *old, long new) { return arch_atomic64_try_cmpxchg_release(v, (s64 *)old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg_relaxed(atomic_long_t *v, long *old, long new) { return arch_atomic64_try_cmpxchg_relaxed(v, (s64 *)old, new); } static __always_inline bool arch_atomic_long_sub_and_test(long i, atomic_long_t *v) { return arch_atomic64_sub_and_test(i, v); } static __always_inline bool arch_atomic_long_dec_and_test(atomic_long_t *v) { return arch_atomic64_dec_and_test(v); } static __always_inline bool arch_atomic_long_inc_and_test(atomic_long_t *v) { return arch_atomic64_inc_and_test(v); } static __always_inline bool arch_atomic_long_add_negative(long i, atomic_long_t *v) { return arch_atomic64_add_negative(i, v); } static __always_inline long arch_atomic_long_fetch_add_unless(atomic_long_t *v, long a, long u) { return arch_atomic64_fetch_add_unless(v, a, u); } static __always_inline bool arch_atomic_long_add_unless(atomic_long_t *v, long a, long u) { return arch_atomic64_add_unless(v, a, u); } static __always_inline bool arch_atomic_long_inc_not_zero(atomic_long_t *v) { return arch_atomic64_inc_not_zero(v); } static __always_inline bool arch_atomic_long_inc_unless_negative(atomic_long_t *v) { return arch_atomic64_inc_unless_negative(v); } static __always_inline bool arch_atomic_long_dec_unless_positive(atomic_long_t *v) { return arch_atomic64_dec_unless_positive(v); } static __always_inline long arch_atomic_long_dec_if_positive(atomic_long_t *v) { return arch_atomic64_dec_if_positive(v); } #else /* CONFIG_64BIT */ static __always_inline long arch_atomic_long_read(const atomic_long_t *v) { return arch_atomic_read(v); } static __always_inline long arch_atomic_long_read_acquire(const atomic_long_t *v) { return arch_atomic_read_acquire(v); } static __always_inline void arch_atomic_long_set(atomic_long_t *v, long i) { arch_atomic_set(v, i); } static __always_inline void arch_atomic_long_set_release(atomic_long_t *v, long i) { arch_atomic_set_release(v, i); } static __always_inline void arch_atomic_long_add(long i, atomic_long_t *v) { arch_atomic_add(i, v); } static __always_inline long arch_atomic_long_add_return(long i, atomic_long_t *v) { return arch_atomic_add_return(i, v); } static __always_inline long arch_atomic_long_add_return_acquire(long i, atomic_long_t *v) { return arch_atomic_add_return_acquire(i, v); } static __always_inline long arch_atomic_long_add_return_release(long i, atomic_long_t *v) { return arch_atomic_add_return_release(i, v); } static __always_inline long arch_atomic_long_add_return_relaxed(long i, atomic_long_t *v) { return arch_atomic_add_return_relaxed(i, v); } static __always_inline long arch_atomic_long_fetch_add(long i, atomic_long_t *v) { return arch_atomic_fetch_add(i, v); } static __always_inline long arch_atomic_long_fetch_add_acquire(long i, atomic_long_t *v) { return arch_atomic_fetch_add_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_add_release(long i, atomic_long_t *v) { return arch_atomic_fetch_add_release(i, v); } static __always_inline long arch_atomic_long_fetch_add_relaxed(long i, atomic_long_t *v) { return arch_atomic_fetch_add_relaxed(i, v); } static __always_inline void arch_atomic_long_sub(long i, atomic_long_t *v) { arch_atomic_sub(i, v); } static __always_inline long arch_atomic_long_sub_return(long i, atomic_long_t *v) { return arch_atomic_sub_return(i, v); } static __always_inline long arch_atomic_long_sub_return_acquire(long i, atomic_long_t *v) { return arch_atomic_sub_return_acquire(i, v); } static __always_inline long arch_atomic_long_sub_return_release(long i, atomic_long_t *v) { return arch_atomic_sub_return_release(i, v); } static __always_inline long arch_atomic_long_sub_return_relaxed(long i, atomic_long_t *v) { return arch_atomic_sub_return_relaxed(i, v); } static __always_inline long arch_atomic_long_fetch_sub(long i, atomic_long_t *v) { return arch_atomic_fetch_sub(i, v); } static __always_inline long arch_atomic_long_fetch_sub_acquire(long i, atomic_long_t *v) { return arch_atomic_fetch_sub_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_sub_release(long i, atomic_long_t *v) { return arch_atomic_fetch_sub_release(i, v); } static __always_inline long arch_atomic_long_fetch_sub_relaxed(long i, atomic_long_t *v) { return arch_atomic_fetch_sub_relaxed(i, v); } static __always_inline void arch_atomic_long_inc(atomic_long_t *v) { arch_atomic_inc(v); } static __always_inline long arch_atomic_long_inc_return(atomic_long_t *v) { return arch_atomic_inc_return(v); } static __always_inline long arch_atomic_long_inc_return_acquire(atomic_long_t *v) { return arch_atomic_inc_return_acquire(v); } static __always_inline long arch_atomic_long_inc_return_release(atomic_long_t *v) { return arch_atomic_inc_return_release(v); } static __always_inline long arch_atomic_long_inc_return_relaxed(atomic_long_t *v) { return arch_atomic_inc_return_relaxed(v); } static __always_inline long arch_atomic_long_fetch_inc(atomic_long_t *v) { return arch_atomic_fetch_inc(v); } static __always_inline long arch_atomic_long_fetch_inc_acquire(atomic_long_t *v) { return arch_atomic_fetch_inc_acquire(v); } static __always_inline long arch_atomic_long_fetch_inc_release(atomic_long_t *v) { return arch_atomic_fetch_inc_release(v); } static __always_inline long arch_atomic_long_fetch_inc_relaxed(atomic_long_t *v) { return arch_atomic_fetch_inc_relaxed(v); } static __always_inline void arch_atomic_long_dec(atomic_long_t *v) { arch_atomic_dec(v); } static __always_inline long arch_atomic_long_dec_return(atomic_long_t *v) { return arch_atomic_dec_return(v); } static __always_inline long arch_atomic_long_dec_return_acquire(atomic_long_t *v) { return arch_atomic_dec_return_acquire(v); } static __always_inline long arch_atomic_long_dec_return_release(atomic_long_t *v) { return arch_atomic_dec_return_release(v); } static __always_inline long arch_atomic_long_dec_return_relaxed(atomic_long_t *v) { return arch_atomic_dec_return_relaxed(v); } static __always_inline long arch_atomic_long_fetch_dec(atomic_long_t *v) { return arch_atomic_fetch_dec(v); } static __always_inline long arch_atomic_long_fetch_dec_acquire(atomic_long_t *v) { return arch_atomic_fetch_dec_acquire(v); } static __always_inline long arch_atomic_long_fetch_dec_release(atomic_long_t *v) { return arch_atomic_fetch_dec_release(v); } static __always_inline long arch_atomic_long_fetch_dec_relaxed(atomic_long_t *v) { return arch_atomic_fetch_dec_relaxed(v); } static __always_inline void arch_atomic_long_and(long i, atomic_long_t *v) { arch_atomic_and(i, v); } static __always_inline long arch_atomic_long_fetch_and(long i, atomic_long_t *v) { return arch_atomic_fetch_and(i, v); } static __always_inline long arch_atomic_long_fetch_and_acquire(long i, atomic_long_t *v) { return arch_atomic_fetch_and_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_and_release(long i, atomic_long_t *v) { return arch_atomic_fetch_and_release(i, v); } static __always_inline long arch_atomic_long_fetch_and_relaxed(long i, atomic_long_t *v) { return arch_atomic_fetch_and_relaxed(i, v); } static __always_inline void arch_atomic_long_andnot(long i, atomic_long_t *v) { arch_atomic_andnot(i, v); } static __always_inline long arch_atomic_long_fetch_andnot(long i, atomic_long_t *v) { return arch_atomic_fetch_andnot(i, v); } static __always_inline long arch_atomic_long_fetch_andnot_acquire(long i, atomic_long_t *v) { return arch_atomic_fetch_andnot_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_andnot_release(long i, atomic_long_t *v) { return arch_atomic_fetch_andnot_release(i, v); } static __always_inline long arch_atomic_long_fetch_andnot_relaxed(long i, atomic_long_t *v) { return arch_atomic_fetch_andnot_relaxed(i, v); } static __always_inline void arch_atomic_long_or(long i, atomic_long_t *v) { arch_atomic_or(i, v); } static __always_inline long arch_atomic_long_fetch_or(long i, atomic_long_t *v) { return arch_atomic_fetch_or(i, v); } static __always_inline long arch_atomic_long_fetch_or_acquire(long i, atomic_long_t *v) { return arch_atomic_fetch_or_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_or_release(long i, atomic_long_t *v) { return arch_atomic_fetch_or_release(i, v); } static __always_inline long arch_atomic_long_fetch_or_relaxed(long i, atomic_long_t *v) { return arch_atomic_fetch_or_relaxed(i, v); } static __always_inline void arch_atomic_long_xor(long i, atomic_long_t *v) { arch_atomic_xor(i, v); } static __always_inline long arch_atomic_long_fetch_xor(long i, atomic_long_t *v) { return arch_atomic_fetch_xor(i, v); } static __always_inline long arch_atomic_long_fetch_xor_acquire(long i, atomic_long_t *v) { return arch_atomic_fetch_xor_acquire(i, v); } static __always_inline long arch_atomic_long_fetch_xor_release(long i, atomic_long_t *v) { return arch_atomic_fetch_xor_release(i, v); } static __always_inline long arch_atomic_long_fetch_xor_relaxed(long i, atomic_long_t *v) { return arch_atomic_fetch_xor_relaxed(i, v); } static __always_inline long arch_atomic_long_xchg(atomic_long_t *v, long i) { return arch_atomic_xchg(v, i); } static __always_inline long arch_atomic_long_xchg_acquire(atomic_long_t *v, long i) { return arch_atomic_xchg_acquire(v, i); } static __always_inline long arch_atomic_long_xchg_release(atomic_long_t *v, long i) { return arch_atomic_xchg_release(v, i); } static __always_inline long arch_atomic_long_xchg_relaxed(atomic_long_t *v, long i) { return arch_atomic_xchg_relaxed(v, i); } static __always_inline long arch_atomic_long_cmpxchg(atomic_long_t *v, long old, long new) { return arch_atomic_cmpxchg(v, old, new); } static __always_inline long arch_atomic_long_cmpxchg_acquire(atomic_long_t *v, long old, long new) { return arch_atomic_cmpxchg_acquire(v, old, new); } static __always_inline long arch_atomic_long_cmpxchg_release(atomic_long_t *v, long old, long new) { return arch_atomic_cmpxchg_release(v, old, new); } static __always_inline long arch_atomic_long_cmpxchg_relaxed(atomic_long_t *v, long old, long new) { return arch_atomic_cmpxchg_relaxed(v, old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg(atomic_long_t *v, long *old, long new) { return arch_atomic_try_cmpxchg(v, (int *)old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg_acquire(atomic_long_t *v, long *old, long new) { return arch_atomic_try_cmpxchg_acquire(v, (int *)old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg_release(atomic_long_t *v, long *old, long new) { return arch_atomic_try_cmpxchg_release(v, (int *)old, new); } static __always_inline bool arch_atomic_long_try_cmpxchg_relaxed(atomic_long_t *v, long *old, long new) { return arch_atomic_try_cmpxchg_relaxed(v, (int *)old, new); } static __always_inline bool arch_atomic_long_sub_and_test(long i, atomic_long_t *v) { return arch_atomic_sub_and_test(i, v); } static __always_inline bool arch_atomic_long_dec_and_test(atomic_long_t *v) { return arch_atomic_dec_and_test(v); } static __always_inline bool arch_atomic_long_inc_and_test(atomic_long_t *v) { return arch_atomic_inc_and_test(v); } static __always_inline bool arch_atomic_long_add_negative(long i, atomic_long_t *v) { return arch_atomic_add_negative(i, v); } static __always_inline long arch_atomic_long_fetch_add_unless(atomic_long_t *v, long a, long u) { return arch_atomic_fetch_add_unless(v, a, u); } static __always_inline bool arch_atomic_long_add_unless(atomic_long_t *v, long a, long u) { return arch_atomic_add_unless(v, a, u); } static __always_inline bool arch_atomic_long_inc_not_zero(atomic_long_t *v) { return arch_atomic_inc_not_zero(v); } static __always_inline bool arch_atomic_long_inc_unless_negative(atomic_long_t *v) { return arch_atomic_inc_unless_negative(v); } static __always_inline bool arch_atomic_long_dec_unless_positive(atomic_long_t *v) { return arch_atomic_dec_unless_positive(v); } static __always_inline long arch_atomic_long_dec_if_positive(atomic_long_t *v) { return arch_atomic_dec_if_positive(v); } #endif /* CONFIG_64BIT */ #endif /* _LINUX_ATOMIC_LONG_H */ // e8f0e08ff072b74d180eabe2ad001282b38c2c88 PK ! c@95� � util_macros.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_HELPER_MACROS_H_ #define _LINUX_HELPER_MACROS_H_ /** * find_closest - locate the closest element in a sorted array * @x: The reference value. * @a: The array in which to look for the closest element. Must be sorted * in ascending order. * @as: Size of 'a'. * * Returns the index of the element closest to 'x'. * Note: If using an array of negative numbers (or mixed positive numbers), * then be sure that 'x' is of a signed-type to get good results. */ #define find_closest(x, a, as) \ ({ \ typeof(as) __fc_i, __fc_as = (as) - 1; \ long __fc_mid_x, __fc_x = (x); \ long __fc_left, __fc_right; \ typeof(*a) const *__fc_a = (a); \ for (__fc_i = 0; __fc_i < __fc_as; __fc_i++) { \ __fc_mid_x = (__fc_a[__fc_i] + __fc_a[__fc_i + 1]) / 2; \ if (__fc_x <= __fc_mid_x) { \ __fc_left = __fc_x - __fc_a[__fc_i]; \ __fc_right = __fc_a[__fc_i + 1] - __fc_x; \ if (__fc_right < __fc_left) \ __fc_i++; \ break; \ } \ } \ (__fc_i); \ }) /** * find_closest_descending - locate the closest element in a sorted array * @x: The reference value. * @a: The array in which to look for the closest element. Must be sorted * in descending order. * @as: Size of 'a'. * * Similar to find_closest() but 'a' is expected to be sorted in descending * order. The iteration is done in reverse order, so that the comparison * of '__fc_right' & '__fc_left' also works for unsigned numbers. */ #define find_closest_descending(x, a, as) \ ({ \ typeof(as) __fc_i, __fc_as = (as) - 1; \ long __fc_mid_x, __fc_x = (x); \ long __fc_left, __fc_right; \ typeof(*a) const *__fc_a = (a); \ for (__fc_i = __fc_as; __fc_i >= 1; __fc_i--) { \ __fc_mid_x = (__fc_a[__fc_i] + __fc_a[__fc_i - 1]) / 2; \ if (__fc_x <= __fc_mid_x) { \ __fc_left = __fc_x - __fc_a[__fc_i]; \ __fc_right = __fc_a[__fc_i - 1] - __fc_x; \ if (__fc_right < __fc_left) \ __fc_i--; \ break; \ } \ } \ (__fc_i); \ }) /** * is_insidevar - check if the @ptr points inside the @var memory range. * @ptr: the pointer to a memory address. * @var: the variable which address and size identify the memory range. * * Evaluates to true if the address in @ptr lies within the memory * range allocated to @var. */ #define is_insidevar(ptr, var) \ ((uintptr_t)(ptr) >= (uintptr_t)(var) && \ (uintptr_t)(ptr) < (uintptr_t)(var) + sizeof(var)) #endif PK ! J���A A math.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MATH_H #define _LINUX_MATH_H #include <asm/div64.h> #include <uapi/linux/kernel.h> /* * This looks more complex than it should be. But we need to * get the type for the ~ right in round_down (it needs to be * as wide as the result!), and we want to evaluate the macro * arguments just once each. */ #define __round_mask(x, y) ((__typeof__(x))((y)-1)) /** * round_up - round up to next specified power of 2 * @x: the value to round * @y: multiple to round up to (must be a power of 2) * * Rounds @x up to next multiple of @y (which must be a power of 2). * To perform arbitrary rounding up, use roundup() below. */ #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) /** * round_down - round down to next specified power of 2 * @x: the value to round * @y: multiple to round down to (must be a power of 2) * * Rounds @x down to next multiple of @y (which must be a power of 2). * To perform arbitrary rounding down, use rounddown() below. */ #define round_down(x, y) ((x) & ~__round_mask(x, y)) #define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP #define DIV_ROUND_DOWN_ULL(ll, d) \ ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; }) #define DIV_ROUND_UP_ULL(ll, d) \ DIV_ROUND_DOWN_ULL((unsigned long long)(ll) + (d) - 1, (d)) #if BITS_PER_LONG == 32 # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d) #else # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP(ll,d) #endif /** * roundup - round up to the next specified multiple * @x: the value to up * @y: multiple to round up to * * Rounds @x up to next multiple of @y. If @y will always be a power * of 2, consider using the faster round_up(). */ #define roundup(x, y) ( \ { \ typeof(y) __y = y; \ (((x) + (__y - 1)) / __y) * __y; \ } \ ) /** * rounddown - round down to next specified multiple * @x: the value to round * @y: multiple to round down to * * Rounds @x down to next multiple of @y. If @y will always be a power * of 2, consider using the faster round_down(). */ #define rounddown(x, y) ( \ { \ typeof(x) __x = (x); \ __x - (__x % (y)); \ } \ ) /* * Divide positive or negative dividend by positive or negative divisor * and round to closest integer. Result is undefined for negative * divisors if the dividend variable type is unsigned and for negative * dividends if the divisor variable type is unsigned. */ #define DIV_ROUND_CLOSEST(x, divisor)( \ { \ typeof(x) __x = x; \ typeof(divisor) __d = divisor; \ (((typeof(x))-1) > 0 || \ ((typeof(divisor))-1) > 0 || \ (((__x) > 0) == ((__d) > 0))) ? \ (((__x) + ((__d) / 2)) / (__d)) : \ (((__x) - ((__d) / 2)) / (__d)); \ } \ ) /* * Same as above but for u64 dividends. divisor must be a 32-bit * number. */ #define DIV_ROUND_CLOSEST_ULL(x, divisor)( \ { \ typeof(divisor) __d = divisor; \ unsigned long long _tmp = (x) + (__d) / 2; \ do_div(_tmp, __d); \ _tmp; \ } \ ) /* * Multiplies an integer by a fraction, while avoiding unnecessary * overflow or loss of precision. */ #define mult_frac(x, numer, denom)( \ { \ typeof(x) quot = (x) / (denom); \ typeof(x) rem = (x) % (denom); \ (quot * (numer)) + ((rem * (numer)) / (denom)); \ } \ ) #define sector_div(a, b) do_div(a, b) /** * abs - return absolute value of an argument * @x: the value. If it is unsigned type, it is converted to signed type first. * char is treated as if it was signed (regardless of whether it really is) * but the macro's return type is preserved as char. * * Return: an absolute value of x. */ #define abs(x) __abs_choose_expr(x, long long, \ __abs_choose_expr(x, long, \ __abs_choose_expr(x, int, \ __abs_choose_expr(x, short, \ __abs_choose_expr(x, char, \ __builtin_choose_expr( \ __builtin_types_compatible_p(typeof(x), char), \ (char)({ signed char __x = (x); __x<0?-__x:__x; }), \ ((void)0))))))) #define __abs_choose_expr(x, type, other) __builtin_choose_expr( \ __builtin_types_compatible_p(typeof(x), signed type) || \ __builtin_types_compatible_p(typeof(x), unsigned type), \ ({ signed type __x = (x); __x < 0 ? -__x : __x; }), other) /** * reciprocal_scale - "scale" a value into range [0, ep_ro) * @val: value * @ep_ro: right open interval endpoint * * Perform a "reciprocal multiplication" in order to "scale" a value into * range [0, @ep_ro), where the upper interval endpoint is right-open. * This is useful, e.g. for accessing a index of an array containing * @ep_ro elements, for example. Think of it as sort of modulus, only that * the result isn't that of modulo. ;) Note that if initial input is a * small value, then result will return 0. * * Return: a result based on @val in interval [0, @ep_ro). */ static inline u32 reciprocal_scale(u32 val, u32 ep_ro) { return (u32)(((u64) val * ep_ro) >> 32); } u64 int_pow(u64 base, unsigned int exp); unsigned long int_sqrt(unsigned long); #if BITS_PER_LONG < 64 u32 int_sqrt64(u64 x); #else static inline u32 int_sqrt64(u64 x) { return (u32)int_sqrt(x); } #endif #endif /* _LINUX_MATH_H */ PK ! s� � of_reserved_mem.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __OF_RESERVED_MEM_H #define __OF_RESERVED_MEM_H #include <linux/device.h> #include <linux/of.h> struct of_phandle_args; struct reserved_mem_ops; struct reserved_mem { const char *name; unsigned long fdt_node; unsigned long phandle; const struct reserved_mem_ops *ops; phys_addr_t base; phys_addr_t size; void *priv; }; struct reserved_mem_ops { int (*device_init)(struct reserved_mem *rmem, struct device *dev); void (*device_release)(struct reserved_mem *rmem, struct device *dev); }; typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem); #ifdef CONFIG_OF_RESERVED_MEM #define RESERVEDMEM_OF_DECLARE(name, compat, init) \ _OF_DECLARE(reservedmem, name, compat, init, reservedmem_of_init_fn) int of_reserved_mem_device_init_by_idx(struct device *dev, struct device_node *np, int idx); int of_reserved_mem_device_init_by_name(struct device *dev, struct device_node *np, const char *name); void of_reserved_mem_device_release(struct device *dev); struct reserved_mem *of_reserved_mem_lookup(struct device_node *np); #else #define RESERVEDMEM_OF_DECLARE(name, compat, init) \ _OF_DECLARE_STUB(reservedmem, name, compat, init, reservedmem_of_init_fn) static inline int of_reserved_mem_device_init_by_idx(struct device *dev, struct device_node *np, int idx) { return -ENOSYS; } static inline int of_reserved_mem_device_init_by_name(struct device *dev, struct device_node *np, const char *name) { return -ENOSYS; } static inline void of_reserved_mem_device_release(struct device *pdev) { } static inline struct reserved_mem *of_reserved_mem_lookup(struct device_node *np) { return NULL; } #endif /** * of_reserved_mem_device_init() - assign reserved memory region to given device * @dev: Pointer to the device to configure * * This function assigns respective DMA-mapping operations based on the first * reserved memory region specified by 'memory-region' property in device tree * node of the given device. * * Returns error code or zero on success. */ static inline int of_reserved_mem_device_init(struct device *dev) { return of_reserved_mem_device_init_by_idx(dev, dev->of_node, 0); } #endif /* __OF_RESERVED_MEM_H */ PK ! �;s�( ( i8253.hnu �[��� /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Machine specific IO port address definition for generic. * Written by Osamu Tomita <tomita@cinet.co.jp> */ #ifndef __LINUX_I8253_H #define __LINUX_I8253_H #include <linux/param.h> #include <linux/spinlock.h> #include <linux/timex.h> /* i8253A PIT registers */ #define PIT_MODE 0x43 #define PIT_CH0 0x40 #define PIT_CH2 0x42 #define PIT_LATCH ((PIT_TICK_RATE + HZ/2) / HZ) extern raw_spinlock_t i8253_lock; extern struct clock_event_device i8253_clockevent; extern void clockevent_i8253_init(bool oneshot); extern void clockevent_i8253_disable(void); extern void setup_pit_timer(void); #endif /* __LINUX_I8253_H */ PK ! l?�� � ath9k_platform.hnu �[��� /* * Copyright (c) 2008 Atheros Communications Inc. * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org> * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef _LINUX_ATH9K_PLATFORM_H #define _LINUX_ATH9K_PLATFORM_H #define ATH9K_PLAT_EEP_MAX_WORDS 2048 struct ath9k_platform_data { const char *eeprom_name; u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS]; u8 *macaddr; int led_pin; u32 gpio_mask; u32 gpio_val; u32 bt_active_pin; u32 bt_priority_pin; u32 wlan_active_pin; bool endian_check; bool is_clk_25mhz; bool tx_gain_buffalo; bool disable_2ghz; bool disable_5ghz; bool led_active_high; int (*get_mac_revision)(void); int (*external_reset)(void); bool use_eeprom; }; #endif /* _LINUX_ATH9K_PLATFORM_H */ PK ! v^�#7 7 if_bridge.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Linux ethernet bridge * * Authors: * Lennert Buytenhek <buytenh@gnu.org> */ #ifndef _LINUX_IF_BRIDGE_H #define _LINUX_IF_BRIDGE_H #include <linux/netdevice.h> #include <uapi/linux/if_bridge.h> #include <linux/bitops.h> struct br_ip { union { __be32 ip4; #if IS_ENABLED(CONFIG_IPV6) struct in6_addr ip6; #endif } src; union { __be32 ip4; #if IS_ENABLED(CONFIG_IPV6) struct in6_addr ip6; #endif unsigned char mac_addr[ETH_ALEN]; } dst; __be16 proto; __u16 vid; }; struct br_ip_list { struct list_head list; struct br_ip addr; }; #define BR_HAIRPIN_MODE BIT(0) #define BR_BPDU_GUARD BIT(1) #define BR_ROOT_BLOCK BIT(2) #define BR_MULTICAST_FAST_LEAVE BIT(3) #define BR_ADMIN_COST BIT(4) #define BR_LEARNING BIT(5) #define BR_FLOOD BIT(6) #define BR_AUTO_MASK (BR_FLOOD | BR_LEARNING) #define BR_PROMISC BIT(7) #define BR_PROXYARP BIT(8) #define BR_LEARNING_SYNC BIT(9) #define BR_PROXYARP_WIFI BIT(10) #define BR_MCAST_FLOOD BIT(11) #define BR_MULTICAST_TO_UNICAST BIT(12) #define BR_VLAN_TUNNEL BIT(13) #define BR_BCAST_FLOOD BIT(14) #define BR_NEIGH_SUPPRESS BIT(15) #define BR_ISOLATED BIT(16) #define BR_MRP_AWARE BIT(17) #define BR_MRP_LOST_CONT BIT(18) #define BR_MRP_LOST_IN_CONT BIT(19) #define BR_TX_FWD_OFFLOAD BIT(20) #define BR_DEFAULT_AGEING_TIME (300 * HZ) struct net_bridge; void brioctl_set(int (*hook)(struct net *net, unsigned int cmd, void __user *uarg)); int br_ioctl_call(struct net *net, unsigned int cmd, void __user *uarg); #if IS_ENABLED(CONFIG_BRIDGE) && IS_ENABLED(CONFIG_BRIDGE_IGMP_SNOOPING) int br_multicast_list_adjacent(struct net_device *dev, struct list_head *br_ip_list); bool br_multicast_has_querier_anywhere(struct net_device *dev, int proto); bool br_multicast_has_querier_adjacent(struct net_device *dev, int proto); bool br_multicast_has_router_adjacent(struct net_device *dev, int proto); bool br_multicast_enabled(const struct net_device *dev); bool br_multicast_router(const struct net_device *dev); #else static inline int br_multicast_list_adjacent(struct net_device *dev, struct list_head *br_ip_list) { return 0; } static inline bool br_multicast_has_querier_anywhere(struct net_device *dev, int proto) { return false; } static inline bool br_multicast_has_querier_adjacent(struct net_device *dev, int proto) { return false; } static inline bool br_multicast_has_router_adjacent(struct net_device *dev, int proto) { return true; } static inline bool br_multicast_enabled(const struct net_device *dev) { return false; } static inline bool br_multicast_router(const struct net_device *dev) { return false; } #endif #if IS_ENABLED(CONFIG_BRIDGE) && IS_ENABLED(CONFIG_BRIDGE_VLAN_FILTERING) bool br_vlan_enabled(const struct net_device *dev); int br_vlan_get_pvid(const struct net_device *dev, u16 *p_pvid); int br_vlan_get_pvid_rcu(const struct net_device *dev, u16 *p_pvid); int br_vlan_get_proto(const struct net_device *dev, u16 *p_proto); int br_vlan_get_info(const struct net_device *dev, u16 vid, struct bridge_vlan_info *p_vinfo); int br_vlan_get_info_rcu(const struct net_device *dev, u16 vid, struct bridge_vlan_info *p_vinfo); #else static inline bool br_vlan_enabled(const struct net_device *dev) { return false; } static inline int br_vlan_get_pvid(const struct net_device *dev, u16 *p_pvid) { return -EINVAL; } static inline int br_vlan_get_proto(const struct net_device *dev, u16 *p_proto) { return -EINVAL; } static inline int br_vlan_get_pvid_rcu(const struct net_device *dev, u16 *p_pvid) { return -EINVAL; } static inline int br_vlan_get_info(const struct net_device *dev, u16 vid, struct bridge_vlan_info *p_vinfo) { return -EINVAL; } static inline int br_vlan_get_info_rcu(const struct net_device *dev, u16 vid, struct bridge_vlan_info *p_vinfo) { return -EINVAL; } #endif #if IS_ENABLED(CONFIG_BRIDGE) struct net_device *br_fdb_find_port(const struct net_device *br_dev, const unsigned char *addr, __u16 vid); void br_fdb_clear_offload(const struct net_device *dev, u16 vid); bool br_port_flag_is_set(const struct net_device *dev, unsigned long flag); u8 br_port_get_stp_state(const struct net_device *dev); clock_t br_get_ageing_time(const struct net_device *br_dev); #else static inline struct net_device * br_fdb_find_port(const struct net_device *br_dev, const unsigned char *addr, __u16 vid) { return NULL; } static inline void br_fdb_clear_offload(const struct net_device *dev, u16 vid) { } static inline bool br_port_flag_is_set(const struct net_device *dev, unsigned long flag) { return false; } static inline u8 br_port_get_stp_state(const struct net_device *dev) { return BR_STATE_DISABLED; } static inline clock_t br_get_ageing_time(const struct net_device *br_dev) { return 0; } #endif #endif PK ! ?�2R� � asn1_decoder.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* ASN.1 decoder * * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_ASN1_DECODER_H #define _LINUX_ASN1_DECODER_H #include <linux/asn1.h> struct asn1_decoder; extern int asn1_ber_decoder(const struct asn1_decoder *decoder, void *context, const unsigned char *data, size_t datalen); #endif /* _LINUX_ASN1_DECODER_H */ PK ! ,REUa a dma-direct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Internals of the DMA direct mapping implementation. Only for use by the * DMA mapping code and IOMMU drivers. */ #ifndef _LINUX_DMA_DIRECT_H #define _LINUX_DMA_DIRECT_H 1 #include <linux/dma-mapping.h> #include <linux/dma-map-ops.h> #include <linux/memblock.h> /* for min_low_pfn */ #include <linux/mem_encrypt.h> #include <linux/swiotlb.h> extern unsigned int zone_dma_bits; /* * Record the mapping of CPU physical to DMA addresses for a given region. */ struct bus_dma_region { phys_addr_t cpu_start; dma_addr_t dma_start; u64 size; u64 offset; }; static inline dma_addr_t translate_phys_to_dma(struct device *dev, phys_addr_t paddr) { const struct bus_dma_region *m; for (m = dev->dma_range_map; m->size; m++) if (paddr >= m->cpu_start && paddr - m->cpu_start < m->size) return (dma_addr_t)paddr - m->offset; /* make sure dma_capable fails when no translation is available */ return DMA_MAPPING_ERROR; } static inline phys_addr_t translate_dma_to_phys(struct device *dev, dma_addr_t dma_addr) { const struct bus_dma_region *m; for (m = dev->dma_range_map; m->size; m++) if (dma_addr >= m->dma_start && dma_addr - m->dma_start < m->size) return (phys_addr_t)dma_addr + m->offset; return (phys_addr_t)-1; } #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA #include <asm/dma-direct.h> #ifndef phys_to_dma_unencrypted #define phys_to_dma_unencrypted phys_to_dma #endif #else static inline dma_addr_t phys_to_dma_unencrypted(struct device *dev, phys_addr_t paddr) { if (dev->dma_range_map) return translate_phys_to_dma(dev, paddr); return paddr; } /* * If memory encryption is supported, phys_to_dma will set the memory encryption * bit in the DMA address, and dma_to_phys will clear it. * phys_to_dma_unencrypted is for use on special unencrypted memory like swiotlb * buffers. */ static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) { return __sme_set(phys_to_dma_unencrypted(dev, paddr)); } static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr) { phys_addr_t paddr; if (dev->dma_range_map) paddr = translate_dma_to_phys(dev, dma_addr); else paddr = dma_addr; return __sme_clr(paddr); } #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED bool force_dma_unencrypted(struct device *dev); #else static inline bool force_dma_unencrypted(struct device *dev) { return false; } #endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size, bool is_ram) { dma_addr_t end = addr + size - 1; if (addr == DMA_MAPPING_ERROR) return false; if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) return false; return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit); } u64 dma_direct_get_required_mask(struct device *dev); void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs); struct page *dma_direct_alloc_pages(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); void dma_direct_free_pages(struct device *dev, size_t size, struct page *page, dma_addr_t dma_addr, enum dma_data_direction dir); int dma_direct_supported(struct device *dev, u64 mask); dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr, size_t size, enum dma_data_direction dir, unsigned long attrs); #endif /* _LINUX_DMA_DIRECT_H */ PK ! W� � evm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * evm.h * * Copyright (c) 2009 IBM Corporation * Author: Mimi Zohar <zohar@us.ibm.com> */ #ifndef _LINUX_EVM_H #define _LINUX_EVM_H #include <linux/integrity.h> #include <linux/xattr.h> struct integrity_iint_cache; #ifdef CONFIG_EVM extern int evm_set_key(void *key, size_t keylen); extern enum integrity_status evm_verifyxattr(struct dentry *dentry, const char *xattr_name, void *xattr_value, size_t xattr_value_len, struct integrity_iint_cache *iint); extern int evm_inode_setattr(struct dentry *dentry, struct iattr *attr); extern void evm_inode_post_setattr(struct dentry *dentry, int ia_valid); extern int evm_inode_setxattr(struct user_namespace *mnt_userns, struct dentry *dentry, const char *name, const void *value, size_t size); extern void evm_inode_post_setxattr(struct dentry *dentry, const char *xattr_name, const void *xattr_value, size_t xattr_value_len); extern int evm_inode_removexattr(struct user_namespace *mnt_userns, struct dentry *dentry, const char *xattr_name); extern void evm_inode_post_removexattr(struct dentry *dentry, const char *xattr_name); extern int evm_inode_init_security(struct inode *inode, const struct xattr *xattr_array, struct xattr *evm); extern bool evm_revalidate_status(const char *xattr_name); extern int evm_protected_xattr_if_enabled(const char *req_xattr_name); extern int evm_read_protected_xattrs(struct dentry *dentry, u8 *buffer, int buffer_size, char type, bool canonical_fmt); #ifdef CONFIG_FS_POSIX_ACL extern int posix_xattr_acl(const char *xattrname); #else static inline int posix_xattr_acl(const char *xattrname) { return 0; } #endif #else static inline int evm_set_key(void *key, size_t keylen) { return -EOPNOTSUPP; } #ifdef CONFIG_INTEGRITY static inline enum integrity_status evm_verifyxattr(struct dentry *dentry, const char *xattr_name, void *xattr_value, size_t xattr_value_len, struct integrity_iint_cache *iint) { return INTEGRITY_UNKNOWN; } #endif static inline int evm_inode_setattr(struct dentry *dentry, struct iattr *attr) { return 0; } static inline void evm_inode_post_setattr(struct dentry *dentry, int ia_valid) { return; } static inline int evm_inode_setxattr(struct user_namespace *mnt_userns, struct dentry *dentry, const char *name, const void *value, size_t size) { return 0; } static inline void evm_inode_post_setxattr(struct dentry *dentry, const char *xattr_name, const void *xattr_value, size_t xattr_value_len) { return; } static inline int evm_inode_removexattr(struct user_namespace *mnt_userns, struct dentry *dentry, const char *xattr_name) { return 0; } static inline void evm_inode_post_removexattr(struct dentry *dentry, const char *xattr_name) { return; } static inline int evm_inode_init_security(struct inode *inode, const struct xattr *xattr_array, struct xattr *evm) { return 0; } static inline bool evm_revalidate_status(const char *xattr_name) { return false; } static inline int evm_protected_xattr_if_enabled(const char *req_xattr_name) { return false; } static inline int evm_read_protected_xattrs(struct dentry *dentry, u8 *buffer, int buffer_size, char type, bool canonical_fmt) { return -EOPNOTSUPP; } #endif /* CONFIG_EVM */ #endif /* LINUX_EVM_H */ PK ! [��� � intel_rapl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Data types and headers for RAPL support * * Copyright (C) 2019 Intel Corporation. * * Author: Zhang Rui <rui.zhang@intel.com> */ #ifndef __INTEL_RAPL_H__ #define __INTEL_RAPL_H__ #include <linux/types.h> #include <linux/powercap.h> #include <linux/cpuhotplug.h> enum rapl_domain_type { RAPL_DOMAIN_PACKAGE, /* entire package/socket */ RAPL_DOMAIN_PP0, /* core power plane */ RAPL_DOMAIN_PP1, /* graphics uncore */ RAPL_DOMAIN_DRAM, /* DRAM control_type */ RAPL_DOMAIN_PLATFORM, /* PSys control_type */ RAPL_DOMAIN_MAX, }; enum rapl_domain_reg_id { RAPL_DOMAIN_REG_LIMIT, RAPL_DOMAIN_REG_STATUS, RAPL_DOMAIN_REG_PERF, RAPL_DOMAIN_REG_POLICY, RAPL_DOMAIN_REG_INFO, RAPL_DOMAIN_REG_PL4, RAPL_DOMAIN_REG_MAX, }; struct rapl_domain; enum rapl_primitives { ENERGY_COUNTER, POWER_LIMIT1, POWER_LIMIT2, POWER_LIMIT4, FW_LOCK, PL1_ENABLE, /* power limit 1, aka long term */ PL1_CLAMP, /* allow frequency to go below OS request */ PL2_ENABLE, /* power limit 2, aka short term, instantaneous */ PL2_CLAMP, PL4_ENABLE, /* power limit 4, aka max peak power */ TIME_WINDOW1, /* long term */ TIME_WINDOW2, /* short term */ THERMAL_SPEC_POWER, MAX_POWER, MIN_POWER, MAX_TIME_WINDOW, THROTTLED_TIME, PRIORITY_LEVEL, /* below are not raw primitive data */ AVERAGE_POWER, NR_RAPL_PRIMITIVES, }; struct rapl_domain_data { u64 primitives[NR_RAPL_PRIMITIVES]; unsigned long timestamp; }; #define NR_POWER_LIMITS (3) struct rapl_power_limit { struct powercap_zone_constraint *constraint; int prim_id; /* primitive ID used to enable */ struct rapl_domain *domain; const char *name; u64 last_power_limit; }; struct rapl_package; #define RAPL_DOMAIN_NAME_LENGTH 16 struct rapl_domain { char name[RAPL_DOMAIN_NAME_LENGTH]; enum rapl_domain_type id; u64 regs[RAPL_DOMAIN_REG_MAX]; struct powercap_zone power_zone; struct rapl_domain_data rdd; struct rapl_power_limit rpl[NR_POWER_LIMITS]; u64 attr_map; /* track capabilities */ unsigned int state; unsigned int domain_energy_unit; struct rapl_package *rp; }; struct reg_action { u64 reg; u64 mask; u64 value; int err; }; /** * struct rapl_if_priv: private data for different RAPL interfaces * @control_type: Each RAPL interface must have its own powercap * control type. * @platform_rapl_domain: Optional. Some RAPL interface may have platform * level RAPL control. * @pcap_rapl_online: CPU hotplug state for each RAPL interface. * @reg_unit: Register for getting energy/power/time unit. * @regs: Register sets for different RAPL Domains. * @limits: Number of power limits supported by each domain. * @read_raw: Callback for reading RAPL interface specific * registers. * @write_raw: Callback for writing RAPL interface specific * registers. */ struct rapl_if_priv { struct powercap_control_type *control_type; struct rapl_domain *platform_rapl_domain; enum cpuhp_state pcap_rapl_online; u64 reg_unit; u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX]; int limits[RAPL_DOMAIN_MAX]; int (*read_raw)(int cpu, struct reg_action *ra); int (*write_raw)(int cpu, struct reg_action *ra); }; /* maximum rapl package domain name: package-%d-die-%d */ #define PACKAGE_DOMAIN_NAME_LENGTH 30 struct rapl_package { unsigned int id; /* logical die id, equals physical 1-die systems */ unsigned int nr_domains; unsigned long domain_map; /* bit map of active domains */ unsigned int power_unit; unsigned int energy_unit; unsigned int time_unit; struct rapl_domain *domains; /* array of domains, sized at runtime */ struct powercap_zone *power_zone; /* keep track of parent zone */ unsigned long power_limit_irq; /* keep track of package power limit * notify interrupt enable status. */ struct list_head plist; int lead_cpu; /* one active cpu per package for access */ /* Track active cpus */ struct cpumask cpumask; char name[PACKAGE_DOMAIN_NAME_LENGTH]; struct rapl_if_priv *priv; }; struct rapl_package *rapl_find_package_domain(int cpu, struct rapl_if_priv *priv); struct rapl_package *rapl_add_package(int cpu, struct rapl_if_priv *priv); void rapl_remove_package(struct rapl_package *rp); #endif /* __INTEL_RAPL_H__ */ PK ! �J�� � rtnetlink.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_RTNETLINK_H #define __LINUX_RTNETLINK_H #include <linux/mutex.h> #include <linux/netdevice.h> #include <linux/wait.h> #include <linux/refcount.h> #include <uapi/linux/rtnetlink.h> extern int rtnetlink_send(struct sk_buff *skb, struct net *net, u32 pid, u32 group, int echo); extern int rtnl_unicast(struct sk_buff *skb, struct net *net, u32 pid); extern void rtnl_notify(struct sk_buff *skb, struct net *net, u32 pid, u32 group, struct nlmsghdr *nlh, gfp_t flags); extern void rtnl_set_sk_err(struct net *net, u32 group, int error); extern int rtnetlink_put_metrics(struct sk_buff *skb, u32 *metrics); extern int rtnl_put_cacheinfo(struct sk_buff *skb, struct dst_entry *dst, u32 id, long expires, u32 error); void rtmsg_ifinfo(int type, struct net_device *dev, unsigned change, gfp_t flags); void rtmsg_ifinfo_newnet(int type, struct net_device *dev, unsigned int change, gfp_t flags, int *new_nsid, int new_ifindex); struct sk_buff *rtmsg_ifinfo_build_skb(int type, struct net_device *dev, unsigned change, u32 event, gfp_t flags, int *new_nsid, int new_ifindex); void rtmsg_ifinfo_send(struct sk_buff *skb, struct net_device *dev, gfp_t flags); /* RTNL is used as a global lock for all changes to network configuration */ extern void rtnl_lock(void); extern void rtnl_unlock(void); extern int rtnl_trylock(void); extern int rtnl_is_locked(void); extern int rtnl_lock_killable(void); extern bool refcount_dec_and_rtnl_lock(refcount_t *r); extern wait_queue_head_t netdev_unregistering_wq; extern struct rw_semaphore pernet_ops_rwsem; extern struct rw_semaphore net_rwsem; #ifdef CONFIG_PROVE_LOCKING extern bool lockdep_rtnl_is_held(void); #else static inline bool lockdep_rtnl_is_held(void) { return true; } #endif /* #ifdef CONFIG_PROVE_LOCKING */ /** * rcu_dereference_rtnl - rcu_dereference with debug checking * @p: The pointer to read, prior to dereferencing * * Do an rcu_dereference(p), but check caller either holds rcu_read_lock() * or RTNL. Note : Please prefer rtnl_dereference() or rcu_dereference() */ #define rcu_dereference_rtnl(p) \ rcu_dereference_check(p, lockdep_rtnl_is_held()) /** * rcu_dereference_bh_rtnl - rcu_dereference_bh with debug checking * @p: The pointer to read, prior to dereference * * Do an rcu_dereference_bh(p), but check caller either holds rcu_read_lock_bh() * or RTNL. Note : Please prefer rtnl_dereference() or rcu_dereference_bh() */ #define rcu_dereference_bh_rtnl(p) \ rcu_dereference_bh_check(p, lockdep_rtnl_is_held()) /** * rtnl_dereference - fetch RCU pointer when updates are prevented by RTNL * @p: The pointer to read, prior to dereferencing * * Return the value of the specified RCU-protected pointer, but omit * the READ_ONCE(), because caller holds RTNL. */ #define rtnl_dereference(p) \ rcu_dereference_protected(p, lockdep_rtnl_is_held()) static inline struct netdev_queue *dev_ingress_queue(struct net_device *dev) { return rtnl_dereference(dev->ingress_queue); } static inline struct netdev_queue *dev_ingress_queue_rcu(struct net_device *dev) { return rcu_dereference(dev->ingress_queue); } struct netdev_queue *dev_ingress_queue_create(struct net_device *dev); #ifdef CONFIG_NET_INGRESS void net_inc_ingress_queue(void); void net_dec_ingress_queue(void); #endif #ifdef CONFIG_NET_EGRESS void net_inc_egress_queue(void); void net_dec_egress_queue(void); #endif void rtnetlink_init(void); void __rtnl_unlock(void); void rtnl_kfree_skbs(struct sk_buff *head, struct sk_buff *tail); #define ASSERT_RTNL() \ WARN_ONCE(!rtnl_is_locked(), \ "RTNL: assertion failed at %s (%d)\n", __FILE__, __LINE__) extern int ndo_dflt_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb, struct net_device *dev, struct net_device *filter_dev, int *idx); extern int ndo_dflt_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], struct net_device *dev, const unsigned char *addr, u16 vid, u16 flags); extern int ndo_dflt_fdb_del(struct ndmsg *ndm, struct nlattr *tb[], struct net_device *dev, const unsigned char *addr, u16 vid); extern int ndo_dflt_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, struct net_device *dev, u16 mode, u32 flags, u32 mask, int nlflags, u32 filter_mask, int (*vlan_fill)(struct sk_buff *skb, struct net_device *dev, u32 filter_mask)); #endif /* __LINUX_RTNETLINK_H */ PK ! k -�K �K device-mapper.hnu �[��� /* * Copyright (C) 2001 Sistina Software (UK) Limited. * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved. * * This file is released under the LGPL. */ #ifndef _LINUX_DEVICE_MAPPER_H #define _LINUX_DEVICE_MAPPER_H #include <linux/bio.h> #include <linux/blkdev.h> #include <linux/dm-ioctl.h> #include <linux/math64.h> #include <linux/ratelimit.h> struct dm_dev; struct dm_target; struct dm_table; struct dm_report_zones_args; struct mapped_device; struct bio_vec; /* * Type of table, mapped_device's mempool and request_queue */ enum dm_queue_mode { DM_TYPE_NONE = 0, DM_TYPE_BIO_BASED = 1, DM_TYPE_REQUEST_BASED = 2, DM_TYPE_DAX_BIO_BASED = 3, }; typedef enum { STATUSTYPE_INFO, STATUSTYPE_TABLE, STATUSTYPE_IMA } status_type_t; union map_info { void *ptr; }; /* * In the constructor the target parameter will already have the * table, type, begin and len fields filled in. */ typedef int (*dm_ctr_fn) (struct dm_target *target, unsigned int argc, char **argv); /* * The destructor doesn't need to free the dm_target, just * anything hidden ti->private. */ typedef void (*dm_dtr_fn) (struct dm_target *ti); /* * The map function must return: * < 0: error * = 0: The target will handle the io by resubmitting it later * = 1: simple remap complete * = 2: The target wants to push back the io */ typedef int (*dm_map_fn) (struct dm_target *ti, struct bio *bio); typedef int (*dm_clone_and_map_request_fn) (struct dm_target *ti, struct request *rq, union map_info *map_context, struct request **clone); typedef void (*dm_release_clone_request_fn) (struct request *clone, union map_info *map_context); /* * Returns: * < 0 : error (currently ignored) * 0 : ended successfully * 1 : for some reason the io has still not completed (eg, * multipath target might want to requeue a failed io). * 2 : The target wants to push back the io */ typedef int (*dm_endio_fn) (struct dm_target *ti, struct bio *bio, blk_status_t *error); typedef int (*dm_request_endio_fn) (struct dm_target *ti, struct request *clone, blk_status_t error, union map_info *map_context); typedef void (*dm_presuspend_fn) (struct dm_target *ti); typedef void (*dm_presuspend_undo_fn) (struct dm_target *ti); typedef void (*dm_postsuspend_fn) (struct dm_target *ti); typedef int (*dm_preresume_fn) (struct dm_target *ti); typedef void (*dm_resume_fn) (struct dm_target *ti); typedef void (*dm_status_fn) (struct dm_target *ti, status_type_t status_type, unsigned status_flags, char *result, unsigned maxlen); typedef int (*dm_message_fn) (struct dm_target *ti, unsigned argc, char **argv, char *result, unsigned maxlen); typedef int (*dm_prepare_ioctl_fn) (struct dm_target *ti, struct block_device **bdev); #ifdef CONFIG_BLK_DEV_ZONED typedef int (*dm_report_zones_fn) (struct dm_target *ti, struct dm_report_zones_args *args, unsigned int nr_zones); #else /* * Define dm_report_zones_fn so that targets can assign to NULL if * CONFIG_BLK_DEV_ZONED disabled. Otherwise each target needs to do * awkward #ifdefs in their target_type, etc. */ typedef int (*dm_report_zones_fn) (struct dm_target *dummy); #endif /* * These iteration functions are typically used to check (and combine) * properties of underlying devices. * E.g. Does at least one underlying device support flush? * Does any underlying device not support WRITE_SAME? * * The callout function is called once for each contiguous section of * an underlying device. State can be maintained in *data. * Return non-zero to stop iterating through any further devices. */ typedef int (*iterate_devices_callout_fn) (struct dm_target *ti, struct dm_dev *dev, sector_t start, sector_t len, void *data); /* * This function must iterate through each section of device used by the * target until it encounters a non-zero return code, which it then returns. * Returns zero if no callout returned non-zero. */ typedef int (*dm_iterate_devices_fn) (struct dm_target *ti, iterate_devices_callout_fn fn, void *data); typedef void (*dm_io_hints_fn) (struct dm_target *ti, struct queue_limits *limits); /* * Returns: * 0: The target can handle the next I/O immediately. * 1: The target can't handle the next I/O immediately. */ typedef int (*dm_busy_fn) (struct dm_target *ti); /* * Returns: * < 0 : error * >= 0 : the number of bytes accessible at the address */ typedef long (*dm_dax_direct_access_fn) (struct dm_target *ti, pgoff_t pgoff, long nr_pages, void **kaddr, pfn_t *pfn); typedef size_t (*dm_dax_copy_iter_fn)(struct dm_target *ti, pgoff_t pgoff, void *addr, size_t bytes, struct iov_iter *i); typedef int (*dm_dax_zero_page_range_fn)(struct dm_target *ti, pgoff_t pgoff, size_t nr_pages); void dm_error(const char *message); struct dm_dev { struct block_device *bdev; struct dax_device *dax_dev; fmode_t mode; char name[16]; }; dev_t dm_get_dev_t(const char *path); /* * Constructors should call these functions to ensure destination devices * are opened/closed correctly. */ int dm_get_device(struct dm_target *ti, const char *path, fmode_t mode, struct dm_dev **result); void dm_put_device(struct dm_target *ti, struct dm_dev *d); /* * Information about a target type */ struct target_type { uint64_t features; const char *name; struct module *module; unsigned version[3]; dm_ctr_fn ctr; dm_dtr_fn dtr; dm_map_fn map; dm_clone_and_map_request_fn clone_and_map_rq; dm_release_clone_request_fn release_clone_rq; dm_endio_fn end_io; dm_request_endio_fn rq_end_io; dm_presuspend_fn presuspend; dm_presuspend_undo_fn presuspend_undo; dm_postsuspend_fn postsuspend; dm_preresume_fn preresume; dm_resume_fn resume; dm_status_fn status; dm_message_fn message; dm_prepare_ioctl_fn prepare_ioctl; dm_report_zones_fn report_zones; dm_busy_fn busy; dm_iterate_devices_fn iterate_devices; dm_io_hints_fn io_hints; dm_dax_direct_access_fn direct_access; dm_dax_copy_iter_fn dax_copy_from_iter; dm_dax_copy_iter_fn dax_copy_to_iter; dm_dax_zero_page_range_fn dax_zero_page_range; /* For internal device-mapper use. */ struct list_head list; }; /* * Target features */ /* * Any table that contains an instance of this target must have only one. */ #define DM_TARGET_SINGLETON 0x00000001 #define dm_target_needs_singleton(type) ((type)->features & DM_TARGET_SINGLETON) /* * Indicates that a target does not support read-only devices. */ #define DM_TARGET_ALWAYS_WRITEABLE 0x00000002 #define dm_target_always_writeable(type) \ ((type)->features & DM_TARGET_ALWAYS_WRITEABLE) /* * Any device that contains a table with an instance of this target may never * have tables containing any different target type. */ #define DM_TARGET_IMMUTABLE 0x00000004 #define dm_target_is_immutable(type) ((type)->features & DM_TARGET_IMMUTABLE) /* * Indicates that a target may replace any target; even immutable targets. * .map, .map_rq, .clone_and_map_rq and .release_clone_rq are all defined. */ #define DM_TARGET_WILDCARD 0x00000008 #define dm_target_is_wildcard(type) ((type)->features & DM_TARGET_WILDCARD) /* * A target implements own bio data integrity. */ #define DM_TARGET_INTEGRITY 0x00000010 #define dm_target_has_integrity(type) ((type)->features & DM_TARGET_INTEGRITY) /* * A target passes integrity data to the lower device. */ #define DM_TARGET_PASSES_INTEGRITY 0x00000020 #define dm_target_passes_integrity(type) ((type)->features & DM_TARGET_PASSES_INTEGRITY) /* * Indicates support for zoned block devices: * - DM_TARGET_ZONED_HM: the target also supports host-managed zoned * block devices but does not support combining different zoned models. * - DM_TARGET_MIXED_ZONED_MODEL: the target supports combining multiple * devices with different zoned models. */ #ifdef CONFIG_BLK_DEV_ZONED #define DM_TARGET_ZONED_HM 0x00000040 #define dm_target_supports_zoned_hm(type) ((type)->features & DM_TARGET_ZONED_HM) #else #define DM_TARGET_ZONED_HM 0x00000000 #define dm_target_supports_zoned_hm(type) (false) #endif /* * A target handles REQ_NOWAIT */ #define DM_TARGET_NOWAIT 0x00000080 #define dm_target_supports_nowait(type) ((type)->features & DM_TARGET_NOWAIT) /* * A target supports passing through inline crypto support. */ #define DM_TARGET_PASSES_CRYPTO 0x00000100 #define dm_target_passes_crypto(type) ((type)->features & DM_TARGET_PASSES_CRYPTO) #ifdef CONFIG_BLK_DEV_ZONED #define DM_TARGET_MIXED_ZONED_MODEL 0x00000200 #define dm_target_supports_mixed_zoned_model(type) \ ((type)->features & DM_TARGET_MIXED_ZONED_MODEL) #else #define DM_TARGET_MIXED_ZONED_MODEL 0x00000000 #define dm_target_supports_mixed_zoned_model(type) (false) #endif struct dm_target { struct dm_table *table; struct target_type *type; /* target limits */ sector_t begin; sector_t len; /* If non-zero, maximum size of I/O submitted to a target. */ uint32_t max_io_len; /* * A number of zero-length barrier bios that will be submitted * to the target for the purpose of flushing cache. * * The bio number can be accessed with dm_bio_get_target_bio_nr. * It is a responsibility of the target driver to remap these bios * to the real underlying devices. */ unsigned num_flush_bios; /* * The number of discard bios that will be submitted to the target. * The bio number can be accessed with dm_bio_get_target_bio_nr. */ unsigned num_discard_bios; /* * The number of secure erase bios that will be submitted to the target. * The bio number can be accessed with dm_bio_get_target_bio_nr. */ unsigned num_secure_erase_bios; /* * The number of WRITE SAME bios that will be submitted to the target. * The bio number can be accessed with dm_bio_get_target_bio_nr. */ unsigned num_write_same_bios; /* * The number of WRITE ZEROES bios that will be submitted to the target. * The bio number can be accessed with dm_bio_get_target_bio_nr. */ unsigned num_write_zeroes_bios; /* * The minimum number of extra bytes allocated in each io for the * target to use. */ unsigned per_io_data_size; /* target specific data */ void *private; /* Used to provide an error string from the ctr */ char *error; /* * Set if this target needs to receive flushes regardless of * whether or not its underlying devices have support. */ bool flush_supported:1; /* * Set if this target needs to receive discards regardless of * whether or not its underlying devices have support. */ bool discards_supported:1; /* * Set if we need to limit the number of in-flight bios when swapping. */ bool limit_swap_bios:1; /* * Set if this target implements a a zoned device and needs emulation of * zone append operations using regular writes. */ bool emulate_zone_append:1; }; void *dm_per_bio_data(struct bio *bio, size_t data_size); struct bio *dm_bio_from_per_bio_data(void *data, size_t data_size); unsigned dm_bio_get_target_bio_nr(const struct bio *bio); u64 dm_start_time_ns_from_clone(struct bio *bio); int dm_register_target(struct target_type *t); void dm_unregister_target(struct target_type *t); /* * Target argument parsing. */ struct dm_arg_set { unsigned argc; char **argv; }; /* * The minimum and maximum value of a numeric argument, together with * the error message to use if the number is found to be outside that range. */ struct dm_arg { unsigned min; unsigned max; char *error; }; /* * Validate the next argument, either returning it as *value or, if invalid, * returning -EINVAL and setting *error. */ int dm_read_arg(const struct dm_arg *arg, struct dm_arg_set *arg_set, unsigned *value, char **error); /* * Process the next argument as the start of a group containing between * arg->min and arg->max further arguments. Either return the size as * *num_args or, if invalid, return -EINVAL and set *error. */ int dm_read_arg_group(const struct dm_arg *arg, struct dm_arg_set *arg_set, unsigned *num_args, char **error); /* * Return the current argument and shift to the next. */ const char *dm_shift_arg(struct dm_arg_set *as); /* * Move through num_args arguments. */ void dm_consume_args(struct dm_arg_set *as, unsigned num_args); /*----------------------------------------------------------------- * Functions for creating and manipulating mapped devices. * Drop the reference with dm_put when you finish with the object. *---------------------------------------------------------------*/ /* * DM_ANY_MINOR chooses the next available minor number. */ #define DM_ANY_MINOR (-1) int dm_create(int minor, struct mapped_device **md); /* * Reference counting for md. */ struct mapped_device *dm_get_md(dev_t dev); void dm_get(struct mapped_device *md); int dm_hold(struct mapped_device *md); void dm_put(struct mapped_device *md); /* * An arbitrary pointer may be stored alongside a mapped device. */ void dm_set_mdptr(struct mapped_device *md, void *ptr); void *dm_get_mdptr(struct mapped_device *md); /* * A device can still be used while suspended, but I/O is deferred. */ int dm_suspend(struct mapped_device *md, unsigned suspend_flags); int dm_resume(struct mapped_device *md); /* * Event functions. */ uint32_t dm_get_event_nr(struct mapped_device *md); int dm_wait_event(struct mapped_device *md, int event_nr); uint32_t dm_next_uevent_seq(struct mapped_device *md); void dm_uevent_add(struct mapped_device *md, struct list_head *elist); /* * Info functions. */ const char *dm_device_name(struct mapped_device *md); int dm_copy_name_and_uuid(struct mapped_device *md, char *name, char *uuid); struct gendisk *dm_disk(struct mapped_device *md); int dm_suspended(struct dm_target *ti); int dm_post_suspending(struct dm_target *ti); int dm_noflush_suspending(struct dm_target *ti); void dm_accept_partial_bio(struct bio *bio, unsigned n_sectors); union map_info *dm_get_rq_mapinfo(struct request *rq); #ifdef CONFIG_BLK_DEV_ZONED struct dm_report_zones_args { struct dm_target *tgt; sector_t next_sector; void *orig_data; report_zones_cb orig_cb; unsigned int zone_idx; /* must be filled by ->report_zones before calling dm_report_zones_cb */ sector_t start; }; int dm_report_zones(struct block_device *bdev, sector_t start, sector_t sector, struct dm_report_zones_args *args, unsigned int nr_zones); #endif /* CONFIG_BLK_DEV_ZONED */ /* * Device mapper functions to parse and create devices specified by the * parameter "dm-mod.create=" */ int __init dm_early_create(struct dm_ioctl *dmi, struct dm_target_spec **spec_array, char **target_params_array); struct queue_limits *dm_get_queue_limits(struct mapped_device *md); /* * Geometry functions. */ int dm_get_geometry(struct mapped_device *md, struct hd_geometry *geo); int dm_set_geometry(struct mapped_device *md, struct hd_geometry *geo); /*----------------------------------------------------------------- * Functions for manipulating device-mapper tables. *---------------------------------------------------------------*/ /* * First create an empty table. */ int dm_table_create(struct dm_table **result, fmode_t mode, unsigned num_targets, struct mapped_device *md); /* * Then call this once for each target. */ int dm_table_add_target(struct dm_table *t, const char *type, sector_t start, sector_t len, char *params); /* * Target can use this to set the table's type. * Can only ever be called from a target's ctr. * Useful for "hybrid" target (supports both bio-based * and request-based). */ void dm_table_set_type(struct dm_table *t, enum dm_queue_mode type); /* * Finally call this to make the table ready for use. */ int dm_table_complete(struct dm_table *t); /* * Destroy the table when finished. */ void dm_table_destroy(struct dm_table *t); /* * Target may require that it is never sent I/O larger than len. */ int __must_check dm_set_target_max_io_len(struct dm_target *ti, sector_t len); /* * Table reference counting. */ struct dm_table *dm_get_live_table(struct mapped_device *md, int *srcu_idx); void dm_put_live_table(struct mapped_device *md, int srcu_idx); void dm_sync_table(struct mapped_device *md); /* * Queries */ sector_t dm_table_get_size(struct dm_table *t); unsigned int dm_table_get_num_targets(struct dm_table *t); fmode_t dm_table_get_mode(struct dm_table *t); struct mapped_device *dm_table_get_md(struct dm_table *t); const char *dm_table_device_name(struct dm_table *t); /* * Trigger an event. */ void dm_table_event(struct dm_table *t); /* * Run the queue for request-based targets. */ void dm_table_run_md_queue_async(struct dm_table *t); /* * The device must be suspended before calling this method. * Returns the previous table, which the caller must destroy. */ struct dm_table *dm_swap_table(struct mapped_device *md, struct dm_table *t); /* * Table keyslot manager functions */ void dm_destroy_keyslot_manager(struct blk_keyslot_manager *ksm); /*----------------------------------------------------------------- * Macros. *---------------------------------------------------------------*/ #define DM_NAME "device-mapper" #define DM_FMT(fmt) DM_NAME ": " DM_MSG_PREFIX ": " fmt "\n" #define DMCRIT(fmt, ...) pr_crit(DM_FMT(fmt), ##__VA_ARGS__) #define DMERR(fmt, ...) pr_err(DM_FMT(fmt), ##__VA_ARGS__) #define DMERR_LIMIT(fmt, ...) pr_err_ratelimited(DM_FMT(fmt), ##__VA_ARGS__) #define DMWARN(fmt, ...) pr_warn(DM_FMT(fmt), ##__VA_ARGS__) #define DMWARN_LIMIT(fmt, ...) pr_warn_ratelimited(DM_FMT(fmt), ##__VA_ARGS__) #define DMINFO(fmt, ...) pr_info(DM_FMT(fmt), ##__VA_ARGS__) #define DMINFO_LIMIT(fmt, ...) pr_info_ratelimited(DM_FMT(fmt), ##__VA_ARGS__) #define DMDEBUG(fmt, ...) pr_debug(DM_FMT(fmt), ##__VA_ARGS__) #define DMDEBUG_LIMIT(fmt, ...) pr_debug_ratelimited(DM_FMT(fmt), ##__VA_ARGS__) #define DMEMIT(x...) sz += ((sz >= maxlen) ? \ 0 : scnprintf(result + sz, maxlen - sz, x)) #define DMEMIT_TARGET_NAME_VERSION(y) \ DMEMIT("target_name=%s,target_version=%u.%u.%u", \ (y)->name, (y)->version[0], (y)->version[1], (y)->version[2]) /* * Definitions of return values from target end_io function. */ #define DM_ENDIO_DONE 0 #define DM_ENDIO_INCOMPLETE 1 #define DM_ENDIO_REQUEUE 2 #define DM_ENDIO_DELAY_REQUEUE 3 /* * Definitions of return values from target map function. */ #define DM_MAPIO_SUBMITTED 0 #define DM_MAPIO_REMAPPED 1 #define DM_MAPIO_REQUEUE DM_ENDIO_REQUEUE #define DM_MAPIO_DELAY_REQUEUE DM_ENDIO_DELAY_REQUEUE #define DM_MAPIO_KILL 4 #define dm_sector_div64(x, y)( \ { \ u64 _res; \ (x) = div64_u64_rem(x, y, &_res); \ _res; \ } \ ) /* * Ceiling(n / sz) */ #define dm_div_up(n, sz) (((n) + (sz) - 1) / (sz)) #define dm_sector_div_up(n, sz) ( \ { \ sector_t _r = ((n) + (sz) - 1); \ sector_div(_r, (sz)); \ _r; \ } \ ) /* * ceiling(n / size) * size */ #define dm_round_up(n, sz) (dm_div_up((n), (sz)) * (sz)) /* * Sector offset taken relative to the start of the target instead of * relative to the start of the device. */ #define dm_target_offset(ti, sector) ((sector) - (ti)->begin) static inline sector_t to_sector(unsigned long long n) { return (n >> SECTOR_SHIFT); } static inline unsigned long to_bytes(sector_t n) { return (n << SECTOR_SHIFT); } #endif /* _LINUX_DEVICE_MAPPER_H */ PK ! ���*�p �p cgroup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CGROUP_H #define _LINUX_CGROUP_H /* * cgroup interface * * Copyright (C) 2003 BULL SA * Copyright (C) 2004-2006 Silicon Graphics, Inc. * */ #include <linux/sched.h> #include <linux/cpumask.h> #include <linux/nodemask.h> #include <linux/rculist.h> #include <linux/cgroupstats.h> #include <linux/fs.h> #include <linux/seq_file.h> #include <linux/kernfs.h> #include <linux/jump_label.h> #include <linux/types.h> #include <linux/ns_common.h> #include <linux/nsproxy.h> #include <linux/user_namespace.h> #include <linux/refcount.h> #include <linux/kernel_stat.h> #include <linux/cgroup-defs.h> struct kernel_clone_args; #ifdef CONFIG_CGROUPS /* * All weight knobs on the default hierarchy should use the following min, * default and max values. The default value is the logarithmic center of * MIN and MAX and allows 100x to be expressed in both directions. */ #define CGROUP_WEIGHT_MIN 1 #define CGROUP_WEIGHT_DFL 100 #define CGROUP_WEIGHT_MAX 10000 /* walk only threadgroup leaders */ #define CSS_TASK_ITER_PROCS (1U << 0) /* walk all threaded css_sets in the domain */ #define CSS_TASK_ITER_THREADED (1U << 1) /* internal flags */ #define CSS_TASK_ITER_SKIPPED (1U << 16) /* a css_task_iter should be treated as an opaque object */ struct css_task_iter { struct cgroup_subsys *ss; unsigned int flags; struct list_head *cset_pos; struct list_head *cset_head; struct list_head *tcset_pos; struct list_head *tcset_head; struct list_head *task_pos; struct list_head *cur_tasks_head; struct css_set *cur_cset; struct css_set *cur_dcset; struct task_struct *cur_task; struct list_head iters_node; /* css_set->task_iters */ }; extern struct file_system_type cgroup_fs_type; extern struct cgroup_root cgrp_dfl_root; extern struct css_set init_css_set; #define SUBSYS(_x) extern struct cgroup_subsys _x ## _cgrp_subsys; #include <linux/cgroup_subsys.h> #undef SUBSYS #define SUBSYS(_x) \ extern struct static_key_true _x ## _cgrp_subsys_enabled_key; \ extern struct static_key_true _x ## _cgrp_subsys_on_dfl_key; #include <linux/cgroup_subsys.h> #undef SUBSYS /** * cgroup_subsys_enabled - fast test on whether a subsys is enabled * @ss: subsystem in question */ #define cgroup_subsys_enabled(ss) \ static_branch_likely(&ss ## _enabled_key) /** * cgroup_subsys_on_dfl - fast test on whether a subsys is on default hierarchy * @ss: subsystem in question */ #define cgroup_subsys_on_dfl(ss) \ static_branch_likely(&ss ## _on_dfl_key) bool css_has_online_children(struct cgroup_subsys_state *css); struct cgroup_subsys_state *css_from_id(int id, struct cgroup_subsys *ss); struct cgroup_subsys_state *cgroup_e_css(struct cgroup *cgroup, struct cgroup_subsys *ss); struct cgroup_subsys_state *cgroup_get_e_css(struct cgroup *cgroup, struct cgroup_subsys *ss); struct cgroup_subsys_state *css_tryget_online_from_dir(struct dentry *dentry, struct cgroup_subsys *ss); struct cgroup *cgroup_get_from_path(const char *path); struct cgroup *cgroup_get_from_fd(int fd); int cgroup_attach_task_all(struct task_struct *from, struct task_struct *); int cgroup_transfer_tasks(struct cgroup *to, struct cgroup *from); int cgroup_add_dfl_cftypes(struct cgroup_subsys *ss, struct cftype *cfts); int cgroup_add_legacy_cftypes(struct cgroup_subsys *ss, struct cftype *cfts); int cgroup_rm_cftypes(struct cftype *cfts); void cgroup_file_notify(struct cgroup_file *cfile); int task_cgroup_path(struct task_struct *task, char *buf, size_t buflen); int cgroupstats_build(struct cgroupstats *stats, struct dentry *dentry); int proc_cgroup_show(struct seq_file *m, struct pid_namespace *ns, struct pid *pid, struct task_struct *tsk); void cgroup_fork(struct task_struct *p); extern int cgroup_can_fork(struct task_struct *p, struct kernel_clone_args *kargs); extern void cgroup_cancel_fork(struct task_struct *p, struct kernel_clone_args *kargs); extern void cgroup_post_fork(struct task_struct *p, struct kernel_clone_args *kargs); void cgroup_exit(struct task_struct *p); void cgroup_release(struct task_struct *p); void cgroup_free(struct task_struct *p); int cgroup_init_early(void); int cgroup_init(void); int cgroup_parse_float(const char *input, unsigned dec_shift, s64 *v); /* * Iteration helpers and macros. */ struct cgroup_subsys_state *css_next_child(struct cgroup_subsys_state *pos, struct cgroup_subsys_state *parent); struct cgroup_subsys_state *css_next_descendant_pre(struct cgroup_subsys_state *pos, struct cgroup_subsys_state *css); struct cgroup_subsys_state *css_rightmost_descendant(struct cgroup_subsys_state *pos); struct cgroup_subsys_state *css_next_descendant_post(struct cgroup_subsys_state *pos, struct cgroup_subsys_state *css); struct task_struct *cgroup_taskset_first(struct cgroup_taskset *tset, struct cgroup_subsys_state **dst_cssp); struct task_struct *cgroup_taskset_next(struct cgroup_taskset *tset, struct cgroup_subsys_state **dst_cssp); void css_task_iter_start(struct cgroup_subsys_state *css, unsigned int flags, struct css_task_iter *it); struct task_struct *css_task_iter_next(struct css_task_iter *it); void css_task_iter_end(struct css_task_iter *it); /** * css_for_each_child - iterate through children of a css * @pos: the css * to use as the loop cursor * @parent: css whose children to walk * * Walk @parent's children. Must be called under rcu_read_lock(). * * If a subsystem synchronizes ->css_online() and the start of iteration, a * css which finished ->css_online() is guaranteed to be visible in the * future iterations and will stay visible until the last reference is put. * A css which hasn't finished ->css_online() or already finished * ->css_offline() may show up during traversal. It's each subsystem's * responsibility to synchronize against on/offlining. * * It is allowed to temporarily drop RCU read lock during iteration. The * caller is responsible for ensuring that @pos remains accessible until * the start of the next iteration by, for example, bumping the css refcnt. */ #define css_for_each_child(pos, parent) \ for ((pos) = css_next_child(NULL, (parent)); (pos); \ (pos) = css_next_child((pos), (parent))) /** * css_for_each_descendant_pre - pre-order walk of a css's descendants * @pos: the css * to use as the loop cursor * @root: css whose descendants to walk * * Walk @root's descendants. @root is included in the iteration and the * first node to be visited. Must be called under rcu_read_lock(). * * If a subsystem synchronizes ->css_online() and the start of iteration, a * css which finished ->css_online() is guaranteed to be visible in the * future iterations and will stay visible until the last reference is put. * A css which hasn't finished ->css_online() or already finished * ->css_offline() may show up during traversal. It's each subsystem's * responsibility to synchronize against on/offlining. * * For example, the following guarantees that a descendant can't escape * state updates of its ancestors. * * my_online(@css) * { * Lock @css's parent and @css; * Inherit state from the parent; * Unlock both. * } * * my_update_state(@css) * { * css_for_each_descendant_pre(@pos, @css) { * Lock @pos; * if (@pos == @css) * Update @css's state; * else * Verify @pos is alive and inherit state from its parent; * Unlock @pos; * } * } * * As long as the inheriting step, including checking the parent state, is * enclosed inside @pos locking, double-locking the parent isn't necessary * while inheriting. The state update to the parent is guaranteed to be * visible by walking order and, as long as inheriting operations to the * same @pos are atomic to each other, multiple updates racing each other * still result in the correct state. It's guaranateed that at least one * inheritance happens for any css after the latest update to its parent. * * If checking parent's state requires locking the parent, each inheriting * iteration should lock and unlock both @pos->parent and @pos. * * Alternatively, a subsystem may choose to use a single global lock to * synchronize ->css_online() and ->css_offline() against tree-walking * operations. * * It is allowed to temporarily drop RCU read lock during iteration. The * caller is responsible for ensuring that @pos remains accessible until * the start of the next iteration by, for example, bumping the css refcnt. */ #define css_for_each_descendant_pre(pos, css) \ for ((pos) = css_next_descendant_pre(NULL, (css)); (pos); \ (pos) = css_next_descendant_pre((pos), (css))) /** * css_for_each_descendant_post - post-order walk of a css's descendants * @pos: the css * to use as the loop cursor * @css: css whose descendants to walk * * Similar to css_for_each_descendant_pre() but performs post-order * traversal instead. @root is included in the iteration and the last * node to be visited. * * If a subsystem synchronizes ->css_online() and the start of iteration, a * css which finished ->css_online() is guaranteed to be visible in the * future iterations and will stay visible until the last reference is put. * A css which hasn't finished ->css_online() or already finished * ->css_offline() may show up during traversal. It's each subsystem's * responsibility to synchronize against on/offlining. * * Note that the walk visibility guarantee example described in pre-order * walk doesn't apply the same to post-order walks. */ #define css_for_each_descendant_post(pos, css) \ for ((pos) = css_next_descendant_post(NULL, (css)); (pos); \ (pos) = css_next_descendant_post((pos), (css))) /** * cgroup_taskset_for_each - iterate cgroup_taskset * @task: the loop cursor * @dst_css: the destination css * @tset: taskset to iterate * * @tset may contain multiple tasks and they may belong to multiple * processes. * * On the v2 hierarchy, there may be tasks from multiple processes and they * may not share the source or destination csses. * * On traditional hierarchies, when there are multiple tasks in @tset, if a * task of a process is in @tset, all tasks of the process are in @tset. * Also, all are guaranteed to share the same source and destination csses. * * Iteration is not in any specific order. */ #define cgroup_taskset_for_each(task, dst_css, tset) \ for ((task) = cgroup_taskset_first((tset), &(dst_css)); \ (task); \ (task) = cgroup_taskset_next((tset), &(dst_css))) /** * cgroup_taskset_for_each_leader - iterate group leaders in a cgroup_taskset * @leader: the loop cursor * @dst_css: the destination css * @tset: taskset to iterate * * Iterate threadgroup leaders of @tset. For single-task migrations, @tset * may not contain any. */ #define cgroup_taskset_for_each_leader(leader, dst_css, tset) \ for ((leader) = cgroup_taskset_first((tset), &(dst_css)); \ (leader); \ (leader) = cgroup_taskset_next((tset), &(dst_css))) \ if ((leader) != (leader)->group_leader) \ ; \ else /* * Inline functions. */ static inline u64 cgroup_id(const struct cgroup *cgrp) { return cgrp->kn->id; } /** * css_get - obtain a reference on the specified css * @css: target css * * The caller must already have a reference. */ static inline void css_get(struct cgroup_subsys_state *css) { if (!(css->flags & CSS_NO_REF)) percpu_ref_get(&css->refcnt); } /** * css_get_many - obtain references on the specified css * @css: target css * @n: number of references to get * * The caller must already have a reference. */ static inline void css_get_many(struct cgroup_subsys_state *css, unsigned int n) { if (!(css->flags & CSS_NO_REF)) percpu_ref_get_many(&css->refcnt, n); } /** * css_tryget - try to obtain a reference on the specified css * @css: target css * * Obtain a reference on @css unless it already has reached zero and is * being released. This function doesn't care whether @css is on or * offline. The caller naturally needs to ensure that @css is accessible * but doesn't have to be holding a reference on it - IOW, RCU protected * access is good enough for this function. Returns %true if a reference * count was successfully obtained; %false otherwise. */ static inline bool css_tryget(struct cgroup_subsys_state *css) { if (!(css->flags & CSS_NO_REF)) return percpu_ref_tryget(&css->refcnt); return true; } /** * css_tryget_online - try to obtain a reference on the specified css if online * @css: target css * * Obtain a reference on @css if it's online. The caller naturally needs * to ensure that @css is accessible but doesn't have to be holding a * reference on it - IOW, RCU protected access is good enough for this * function. Returns %true if a reference count was successfully obtained; * %false otherwise. */ static inline bool css_tryget_online(struct cgroup_subsys_state *css) { if (!(css->flags & CSS_NO_REF)) return percpu_ref_tryget_live(&css->refcnt); return true; } /** * css_is_dying - test whether the specified css is dying * @css: target css * * Test whether @css is in the process of offlining or already offline. In * most cases, ->css_online() and ->css_offline() callbacks should be * enough; however, the actual offline operations are RCU delayed and this * test returns %true also when @css is scheduled to be offlined. * * This is useful, for example, when the use case requires synchronous * behavior with respect to cgroup removal. cgroup removal schedules css * offlining but the css can seem alive while the operation is being * delayed. If the delay affects user visible semantics, this test can be * used to resolve the situation. */ static inline bool css_is_dying(struct cgroup_subsys_state *css) { return !(css->flags & CSS_NO_REF) && percpu_ref_is_dying(&css->refcnt); } /** * css_put - put a css reference * @css: target css * * Put a reference obtained via css_get() and css_tryget_online(). */ static inline void css_put(struct cgroup_subsys_state *css) { if (!(css->flags & CSS_NO_REF)) percpu_ref_put(&css->refcnt); } /** * css_put_many - put css references * @css: target css * @n: number of references to put * * Put references obtained via css_get() and css_tryget_online(). */ static inline void css_put_many(struct cgroup_subsys_state *css, unsigned int n) { if (!(css->flags & CSS_NO_REF)) percpu_ref_put_many(&css->refcnt, n); } static inline void cgroup_get(struct cgroup *cgrp) { css_get(&cgrp->self); } static inline bool cgroup_tryget(struct cgroup *cgrp) { return css_tryget(&cgrp->self); } static inline void cgroup_put(struct cgroup *cgrp) { css_put(&cgrp->self); } /** * task_css_set_check - obtain a task's css_set with extra access conditions * @task: the task to obtain css_set for * @__c: extra condition expression to be passed to rcu_dereference_check() * * A task's css_set is RCU protected, initialized and exited while holding * task_lock(), and can only be modified while holding both cgroup_mutex * and task_lock() while the task is alive. This macro verifies that the * caller is inside proper critical section and returns @task's css_set. * * The caller can also specify additional allowed conditions via @__c, such * as locks used during the cgroup_subsys::attach() methods. */ #ifdef CONFIG_PROVE_RCU extern struct mutex cgroup_mutex; extern spinlock_t css_set_lock; #define task_css_set_check(task, __c) \ rcu_dereference_check((task)->cgroups, \ rcu_read_lock_sched_held() || \ lockdep_is_held(&cgroup_mutex) || \ lockdep_is_held(&css_set_lock) || \ ((task)->flags & PF_EXITING) || (__c)) #else #define task_css_set_check(task, __c) \ rcu_dereference((task)->cgroups) #endif /** * task_css_check - obtain css for (task, subsys) w/ extra access conds * @task: the target task * @subsys_id: the target subsystem ID * @__c: extra condition expression to be passed to rcu_dereference_check() * * Return the cgroup_subsys_state for the (@task, @subsys_id) pair. The * synchronization rules are the same as task_css_set_check(). */ #define task_css_check(task, subsys_id, __c) \ task_css_set_check((task), (__c))->subsys[(subsys_id)] /** * task_css_set - obtain a task's css_set * @task: the task to obtain css_set for * * See task_css_set_check(). */ static inline struct css_set *task_css_set(struct task_struct *task) { return task_css_set_check(task, false); } /** * task_css - obtain css for (task, subsys) * @task: the target task * @subsys_id: the target subsystem ID * * See task_css_check(). */ static inline struct cgroup_subsys_state *task_css(struct task_struct *task, int subsys_id) { return task_css_check(task, subsys_id, false); } /** * task_get_css - find and get the css for (task, subsys) * @task: the target task * @subsys_id: the target subsystem ID * * Find the css for the (@task, @subsys_id) combination, increment a * reference on and return it. This function is guaranteed to return a * valid css. The returned css may already have been offlined. */ static inline struct cgroup_subsys_state * task_get_css(struct task_struct *task, int subsys_id) { struct cgroup_subsys_state *css; rcu_read_lock(); while (true) { css = task_css(task, subsys_id); /* * Can't use css_tryget_online() here. A task which has * PF_EXITING set may stay associated with an offline css. * If such task calls this function, css_tryget_online() * will keep failing. */ if (likely(css_tryget(css))) break; cpu_relax(); } rcu_read_unlock(); return css; } /** * task_css_is_root - test whether a task belongs to the root css * @task: the target task * @subsys_id: the target subsystem ID * * Test whether @task belongs to the root css on the specified subsystem. * May be invoked in any context. */ static inline bool task_css_is_root(struct task_struct *task, int subsys_id) { return task_css_check(task, subsys_id, true) == init_css_set.subsys[subsys_id]; } static inline struct cgroup *task_cgroup(struct task_struct *task, int subsys_id) { return task_css(task, subsys_id)->cgroup; } static inline struct cgroup *task_dfl_cgroup(struct task_struct *task) { return task_css_set(task)->dfl_cgrp; } static inline struct cgroup *cgroup_parent(struct cgroup *cgrp) { struct cgroup_subsys_state *parent_css = cgrp->self.parent; if (parent_css) return container_of(parent_css, struct cgroup, self); return NULL; } /** * cgroup_is_descendant - test ancestry * @cgrp: the cgroup to be tested * @ancestor: possible ancestor of @cgrp * * Test whether @cgrp is a descendant of @ancestor. It also returns %true * if @cgrp == @ancestor. This function is safe to call as long as @cgrp * and @ancestor are accessible. */ static inline bool cgroup_is_descendant(struct cgroup *cgrp, struct cgroup *ancestor) { if (cgrp->root != ancestor->root || cgrp->level < ancestor->level) return false; return cgrp->ancestor_ids[ancestor->level] == cgroup_id(ancestor); } /** * cgroup_ancestor - find ancestor of cgroup * @cgrp: cgroup to find ancestor of * @ancestor_level: level of ancestor to find starting from root * * Find ancestor of cgroup at specified level starting from root if it exists * and return pointer to it. Return NULL if @cgrp doesn't have ancestor at * @ancestor_level. * * This function is safe to call as long as @cgrp is accessible. */ static inline struct cgroup *cgroup_ancestor(struct cgroup *cgrp, int ancestor_level) { if (cgrp->level < ancestor_level) return NULL; while (cgrp && cgrp->level > ancestor_level) cgrp = cgroup_parent(cgrp); return cgrp; } /** * task_under_cgroup_hierarchy - test task's membership of cgroup ancestry * @task: the task to be tested * @ancestor: possible ancestor of @task's cgroup * * Tests whether @task's default cgroup hierarchy is a descendant of @ancestor. * It follows all the same rules as cgroup_is_descendant, and only applies * to the default hierarchy. */ static inline bool task_under_cgroup_hierarchy(struct task_struct *task, struct cgroup *ancestor) { struct css_set *cset = task_css_set(task); return cgroup_is_descendant(cset->dfl_cgrp, ancestor); } /* no synchronization, the result can only be used as a hint */ static inline bool cgroup_is_populated(struct cgroup *cgrp) { return cgrp->nr_populated_csets + cgrp->nr_populated_domain_children + cgrp->nr_populated_threaded_children; } /* returns ino associated with a cgroup */ static inline ino_t cgroup_ino(struct cgroup *cgrp) { return kernfs_ino(cgrp->kn); } /* cft/css accessors for cftype->write() operation */ static inline struct cftype *of_cft(struct kernfs_open_file *of) { return of->kn->priv; } struct cgroup_subsys_state *of_css(struct kernfs_open_file *of); /* cft/css accessors for cftype->seq_*() operations */ static inline struct cftype *seq_cft(struct seq_file *seq) { return of_cft(seq->private); } static inline struct cgroup_subsys_state *seq_css(struct seq_file *seq) { return of_css(seq->private); } /* * Name / path handling functions. All are thin wrappers around the kernfs * counterparts and can be called under any context. */ static inline int cgroup_name(struct cgroup *cgrp, char *buf, size_t buflen) { return kernfs_name(cgrp->kn, buf, buflen); } static inline int cgroup_path(struct cgroup *cgrp, char *buf, size_t buflen) { return kernfs_path(cgrp->kn, buf, buflen); } static inline void pr_cont_cgroup_name(struct cgroup *cgrp) { pr_cont_kernfs_name(cgrp->kn); } static inline void pr_cont_cgroup_path(struct cgroup *cgrp) { pr_cont_kernfs_path(cgrp->kn); } static inline struct psi_group *cgroup_psi(struct cgroup *cgrp) { return &cgrp->psi; } bool cgroup_psi_enabled(void); static inline void cgroup_init_kthreadd(void) { /* * kthreadd is inherited by all kthreads, keep it in the root so * that the new kthreads are guaranteed to stay in the root until * initialization is finished. */ current->no_cgroup_migration = 1; } static inline void cgroup_kthread_ready(void) { /* * This kthread finished initialization. The creator should have * set PF_NO_SETAFFINITY if this kthread should stay in the root. */ current->no_cgroup_migration = 0; } void cgroup_path_from_kernfs_id(u64 id, char *buf, size_t buflen); struct cgroup *cgroup_get_from_id(u64 id); #else /* !CONFIG_CGROUPS */ struct cgroup_subsys_state; struct cgroup; static inline u64 cgroup_id(const struct cgroup *cgrp) { return 1; } static inline void css_get(struct cgroup_subsys_state *css) {} static inline void css_put(struct cgroup_subsys_state *css) {} static inline int cgroup_attach_task_all(struct task_struct *from, struct task_struct *t) { return 0; } static inline int cgroupstats_build(struct cgroupstats *stats, struct dentry *dentry) { return -EINVAL; } static inline void cgroup_fork(struct task_struct *p) {} static inline int cgroup_can_fork(struct task_struct *p, struct kernel_clone_args *kargs) { return 0; } static inline void cgroup_cancel_fork(struct task_struct *p, struct kernel_clone_args *kargs) {} static inline void cgroup_post_fork(struct task_struct *p, struct kernel_clone_args *kargs) {} static inline void cgroup_exit(struct task_struct *p) {} static inline void cgroup_release(struct task_struct *p) {} static inline void cgroup_free(struct task_struct *p) {} static inline int cgroup_init_early(void) { return 0; } static inline int cgroup_init(void) { return 0; } static inline void cgroup_init_kthreadd(void) {} static inline void cgroup_kthread_ready(void) {} static inline struct cgroup *cgroup_parent(struct cgroup *cgrp) { return NULL; } static inline struct psi_group *cgroup_psi(struct cgroup *cgrp) { return NULL; } static inline bool cgroup_psi_enabled(void) { return false; } static inline bool task_under_cgroup_hierarchy(struct task_struct *task, struct cgroup *ancestor) { return true; } static inline void cgroup_path_from_kernfs_id(u64 id, char *buf, size_t buflen) {} #endif /* !CONFIG_CGROUPS */ #ifdef CONFIG_CGROUPS /* * cgroup scalable recursive statistics. */ void cgroup_rstat_updated(struct cgroup *cgrp, int cpu); void cgroup_rstat_flush(struct cgroup *cgrp); void cgroup_rstat_flush_irqsafe(struct cgroup *cgrp); void cgroup_rstat_flush_hold(struct cgroup *cgrp); void cgroup_rstat_flush_release(void); /* * Basic resource stats. */ #ifdef CONFIG_CGROUP_CPUACCT void cpuacct_charge(struct task_struct *tsk, u64 cputime); void cpuacct_account_field(struct task_struct *tsk, int index, u64 val); #else static inline void cpuacct_charge(struct task_struct *tsk, u64 cputime) {} static inline void cpuacct_account_field(struct task_struct *tsk, int index, u64 val) {} #endif void __cgroup_account_cputime(struct cgroup *cgrp, u64 delta_exec); void __cgroup_account_cputime_field(struct cgroup *cgrp, enum cpu_usage_stat index, u64 delta_exec); static inline void cgroup_account_cputime(struct task_struct *task, u64 delta_exec) { struct cgroup *cgrp; cpuacct_charge(task, delta_exec); cgrp = task_dfl_cgroup(task); if (cgroup_parent(cgrp)) __cgroup_account_cputime(cgrp, delta_exec); } static inline void cgroup_account_cputime_field(struct task_struct *task, enum cpu_usage_stat index, u64 delta_exec) { struct cgroup *cgrp; cpuacct_account_field(task, index, delta_exec); rcu_read_lock(); cgrp = task_dfl_cgroup(task); if (cgroup_parent(cgrp)) __cgroup_account_cputime_field(cgrp, index, delta_exec); rcu_read_unlock(); } #else /* CONFIG_CGROUPS */ static inline void cgroup_account_cputime(struct task_struct *task, u64 delta_exec) {} static inline void cgroup_account_cputime_field(struct task_struct *task, enum cpu_usage_stat index, u64 delta_exec) {} #endif /* CONFIG_CGROUPS */ /* * sock->sk_cgrp_data handling. For more info, see sock_cgroup_data * definition in cgroup-defs.h. */ #ifdef CONFIG_SOCK_CGROUP_DATA void cgroup_sk_alloc(struct sock_cgroup_data *skcd); void cgroup_sk_clone(struct sock_cgroup_data *skcd); void cgroup_sk_free(struct sock_cgroup_data *skcd); static inline struct cgroup *sock_cgroup_ptr(struct sock_cgroup_data *skcd) { return skcd->cgroup; } #else /* CONFIG_CGROUP_DATA */ static inline void cgroup_sk_alloc(struct sock_cgroup_data *skcd) {} static inline void cgroup_sk_clone(struct sock_cgroup_data *skcd) {} static inline void cgroup_sk_free(struct sock_cgroup_data *skcd) {} #endif /* CONFIG_CGROUP_DATA */ struct cgroup_namespace { struct ns_common ns; struct user_namespace *user_ns; struct ucounts *ucounts; struct css_set *root_cset; }; extern struct cgroup_namespace init_cgroup_ns; #ifdef CONFIG_CGROUPS void free_cgroup_ns(struct cgroup_namespace *ns); struct cgroup_namespace *copy_cgroup_ns(unsigned long flags, struct user_namespace *user_ns, struct cgroup_namespace *old_ns); int cgroup_path_ns(struct cgroup *cgrp, char *buf, size_t buflen, struct cgroup_namespace *ns); #else /* !CONFIG_CGROUPS */ static inline void free_cgroup_ns(struct cgroup_namespace *ns) { } static inline struct cgroup_namespace * copy_cgroup_ns(unsigned long flags, struct user_namespace *user_ns, struct cgroup_namespace *old_ns) { return old_ns; } #endif /* !CONFIG_CGROUPS */ static inline void get_cgroup_ns(struct cgroup_namespace *ns) { if (ns) refcount_inc(&ns->ns.count); } static inline void put_cgroup_ns(struct cgroup_namespace *ns) { if (ns && refcount_dec_and_test(&ns->ns.count)) free_cgroup_ns(ns); } #ifdef CONFIG_CGROUPS void cgroup_enter_frozen(void); void cgroup_leave_frozen(bool always_leave); void cgroup_update_frozen(struct cgroup *cgrp); void cgroup_freeze(struct cgroup *cgrp, bool freeze); void cgroup_freezer_migrate_task(struct task_struct *task, struct cgroup *src, struct cgroup *dst); static inline bool cgroup_task_frozen(struct task_struct *task) { return task->frozen; } #else /* !CONFIG_CGROUPS */ static inline void cgroup_enter_frozen(void) { } static inline void cgroup_leave_frozen(bool always_leave) { } static inline bool cgroup_task_frozen(struct task_struct *task) { return false; } #endif /* !CONFIG_CGROUPS */ #ifdef CONFIG_CGROUP_BPF static inline void cgroup_bpf_get(struct cgroup *cgrp) { percpu_ref_get(&cgrp->bpf.refcnt); } static inline void cgroup_bpf_put(struct cgroup *cgrp) { percpu_ref_put(&cgrp->bpf.refcnt); } #else /* CONFIG_CGROUP_BPF */ static inline void cgroup_bpf_get(struct cgroup *cgrp) {} static inline void cgroup_bpf_put(struct cgroup *cgrp) {} #endif /* CONFIG_CGROUP_BPF */ #endif /* _LINUX_CGROUP_H */ PK ! �z�4 4 udp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Definitions for the UDP protocol. * * Version: @(#)udp.h 1.0.2 04/28/93 * * Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> */ #ifndef _LINUX_UDP_H #define _LINUX_UDP_H #include <net/inet_sock.h> #include <linux/skbuff.h> #include <net/netns/hash.h> #include <uapi/linux/udp.h> static inline struct udphdr *udp_hdr(const struct sk_buff *skb) { return (struct udphdr *)skb_transport_header(skb); } static inline struct udphdr *inner_udp_hdr(const struct sk_buff *skb) { return (struct udphdr *)skb_inner_transport_header(skb); } #define UDP_HTABLE_SIZE_MIN (CONFIG_BASE_SMALL ? 128 : 256) static inline u32 udp_hashfn(const struct net *net, u32 num, u32 mask) { return (num + net_hash_mix(net)) & mask; } struct udp_sock { /* inet_sock has to be the first member */ struct inet_sock inet; #define udp_port_hash inet.sk.__sk_common.skc_u16hashes[0] #define udp_portaddr_hash inet.sk.__sk_common.skc_u16hashes[1] #define udp_portaddr_node inet.sk.__sk_common.skc_portaddr_node int pending; /* Any pending frames ? */ unsigned int corkflag; /* Cork is required */ __u8 encap_type; /* Is this an Encapsulation socket? */ unsigned char no_check6_tx:1,/* Send zero UDP6 checksums on TX? */ no_check6_rx:1,/* Allow zero UDP6 checksums on RX? */ encap_enabled:1, /* This socket enabled encap * processing; UDP tunnels and * different encapsulation layer set * this */ gro_enabled:1, /* Request GRO aggregation */ accept_udp_l4:1, accept_udp_fraglist:1; /* * Following member retains the information to create a UDP header * when the socket is uncorked. */ __u16 len; /* total length of pending frames */ __u16 gso_size; /* * Fields specific to UDP-Lite. */ __u16 pcslen; __u16 pcrlen; /* indicator bits used by pcflag: */ #define UDPLITE_BIT 0x1 /* set by udplite proto init function */ #define UDPLITE_SEND_CC 0x2 /* set via udplite setsockopt */ #define UDPLITE_RECV_CC 0x4 /* set via udplite setsocktopt */ __u8 pcflag; /* marks socket as UDP-Lite if > 0 */ __u8 unused[3]; /* * For encapsulation sockets. */ int (*encap_rcv)(struct sock *sk, struct sk_buff *skb); void (*encap_err_rcv)(struct sock *sk, struct sk_buff *skb, unsigned int udp_offset); int (*encap_err_lookup)(struct sock *sk, struct sk_buff *skb); void (*encap_destroy)(struct sock *sk); /* GRO functions for UDP socket */ struct sk_buff * (*gro_receive)(struct sock *sk, struct list_head *head, struct sk_buff *skb); int (*gro_complete)(struct sock *sk, struct sk_buff *skb, int nhoff); /* udp_recvmsg try to use this before splicing sk_receive_queue */ struct sk_buff_head reader_queue ____cacheline_aligned_in_smp; /* This field is dirtied by udp_recvmsg() */ int forward_deficit; }; #define UDP_MAX_SEGMENTS (1 << 7UL) static inline struct udp_sock *udp_sk(const struct sock *sk) { return (struct udp_sock *)sk; } static inline void udp_set_no_check6_tx(struct sock *sk, bool val) { udp_sk(sk)->no_check6_tx = val; } static inline void udp_set_no_check6_rx(struct sock *sk, bool val) { udp_sk(sk)->no_check6_rx = val; } static inline bool udp_get_no_check6_tx(struct sock *sk) { return udp_sk(sk)->no_check6_tx; } static inline bool udp_get_no_check6_rx(struct sock *sk) { return udp_sk(sk)->no_check6_rx; } static inline void udp_cmsg_recv(struct msghdr *msg, struct sock *sk, struct sk_buff *skb) { int gso_size; if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) { gso_size = skb_shinfo(skb)->gso_size; put_cmsg(msg, SOL_UDP, UDP_GRO, sizeof(gso_size), &gso_size); } } DECLARE_STATIC_KEY_FALSE(udp_encap_needed_key); #if IS_ENABLED(CONFIG_IPV6) DECLARE_STATIC_KEY_FALSE(udpv6_encap_needed_key); #endif static inline bool udp_encap_needed(void) { if (static_branch_unlikely(&udp_encap_needed_key)) return true; #if IS_ENABLED(CONFIG_IPV6) if (static_branch_unlikely(&udpv6_encap_needed_key)) return true; #endif return false; } static inline bool udp_unexpected_gso(struct sock *sk, struct sk_buff *skb) { if (!skb_is_gso(skb)) return false; if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4 && !udp_sk(sk)->accept_udp_l4) return true; if (skb_shinfo(skb)->gso_type & SKB_GSO_FRAGLIST && !udp_sk(sk)->accept_udp_fraglist) return true; /* GSO packets lacking the SKB_GSO_UDP_TUNNEL/_CSUM bits might still * land in a tunnel as the socket check in udp_gro_receive cannot be * foolproof. */ if (udp_encap_needed() && READ_ONCE(udp_sk(sk)->encap_rcv) && !(skb_shinfo(skb)->gso_type & (SKB_GSO_UDP_TUNNEL | SKB_GSO_UDP_TUNNEL_CSUM))) return true; return false; } static inline void udp_allow_gso(struct sock *sk) { udp_sk(sk)->accept_udp_l4 = 1; udp_sk(sk)->accept_udp_fraglist = 1; } #define udp_portaddr_for_each_entry(__sk, list) \ hlist_for_each_entry(__sk, list, __sk_common.skc_portaddr_node) #define udp_portaddr_for_each_entry_rcu(__sk, list) \ hlist_for_each_entry_rcu(__sk, list, __sk_common.skc_portaddr_node) #define IS_UDPLITE(__sk) (__sk->sk_protocol == IPPROTO_UDPLITE) #endif /* _LINUX_UDP_H */ PK ! QP�Ķ � cgroup_rdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Parav Pandit <pandit.parav@gmail.com> */ #ifndef _CGROUP_RDMA_H #define _CGROUP_RDMA_H #include <linux/cgroup.h> enum rdmacg_resource_type { RDMACG_RESOURCE_HCA_HANDLE, RDMACG_RESOURCE_HCA_OBJECT, RDMACG_RESOURCE_MAX, }; #ifdef CONFIG_CGROUP_RDMA struct rdma_cgroup { struct cgroup_subsys_state css; /* * head to keep track of all resource pools * that belongs to this cgroup. */ struct list_head rpools; }; struct rdmacg_device { struct list_head dev_node; struct list_head rpools; char *name; }; /* * APIs for RDMA/IB stack to publish when a device wants to * participate in resource accounting */ void rdmacg_register_device(struct rdmacg_device *device); void rdmacg_unregister_device(struct rdmacg_device *device); /* APIs for RDMA/IB stack to charge/uncharge pool specific resources */ int rdmacg_try_charge(struct rdma_cgroup **rdmacg, struct rdmacg_device *device, enum rdmacg_resource_type index); void rdmacg_uncharge(struct rdma_cgroup *cg, struct rdmacg_device *device, enum rdmacg_resource_type index); #endif /* CONFIG_CGROUP_RDMA */ #endif /* _CGROUP_RDMA_H */ PK ! n��|� � apple_bl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * apple_bl exported symbols */ #ifndef _LINUX_APPLE_BL_H #define _LINUX_APPLE_BL_H #if defined(CONFIG_BACKLIGHT_APPLE) || defined(CONFIG_BACKLIGHT_APPLE_MODULE) extern int apple_bl_register(void); extern void apple_bl_unregister(void); #else /* !CONFIG_BACKLIGHT_APPLE */ static inline int apple_bl_register(void) { return 0; } static inline void apple_bl_unregister(void) { } #endif /* !CONFIG_BACKLIGHT_APPLE */ #endif /* _LINUX_APPLE_BL_H */ PK ! ��,�� � pm_wakeirq.hnu �[��� /* * pm_wakeirq.h - Device wakeirq helper functions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _LINUX_PM_WAKEIRQ_H #define _LINUX_PM_WAKEIRQ_H #ifdef CONFIG_PM extern int dev_pm_set_wake_irq(struct device *dev, int irq); extern int dev_pm_set_dedicated_wake_irq(struct device *dev, int irq); extern int dev_pm_set_dedicated_wake_irq_reverse(struct device *dev, int irq); extern void dev_pm_clear_wake_irq(struct device *dev); extern void dev_pm_enable_wake_irq(struct device *dev); extern void dev_pm_disable_wake_irq(struct device *dev); #else /* !CONFIG_PM */ static inline int dev_pm_set_wake_irq(struct device *dev, int irq) { return 0; } static inline int dev_pm_set_dedicated_wake_irq(struct device *dev, int irq) { return 0; } static inline int dev_pm_set_dedicated_wake_irq_reverse(struct device *dev, int irq) { return 0; } static inline void dev_pm_clear_wake_irq(struct device *dev) { } static inline void dev_pm_enable_wake_irq(struct device *dev) { } static inline void dev_pm_disable_wake_irq(struct device *dev) { } #endif /* CONFIG_PM */ #endif /* _LINUX_PM_WAKEIRQ_H */ PK ! m�I� � err.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ERR_H #define _LINUX_ERR_H #include <linux/compiler.h> #include <linux/types.h> #include <asm/errno.h> /* * Kernel pointers have redundant information, so we can use a * scheme where we can return either an error code or a normal * pointer with the same return value. * * This should be a per-architecture thing, to allow different * error and pointer decisions. */ #define MAX_ERRNO 4095 #ifndef __ASSEMBLY__ #define IS_ERR_VALUE(x) unlikely((unsigned long)(void *)(x) >= (unsigned long)-MAX_ERRNO) static inline void * __must_check ERR_PTR(long error) { return (void *) error; } static inline long __must_check PTR_ERR(__force const void *ptr) { return (long) ptr; } static inline bool __must_check IS_ERR(__force const void *ptr) { return IS_ERR_VALUE((unsigned long)ptr); } static inline bool __must_check IS_ERR_OR_NULL(__force const void *ptr) { return unlikely(!ptr) || IS_ERR_VALUE((unsigned long)ptr); } /** * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type * @ptr: The pointer to cast. * * Explicitly cast an error-valued pointer to another pointer type in such a * way as to make it clear that's what's going on. */ static inline void * __must_check ERR_CAST(__force const void *ptr) { /* cast away the const */ return (void *) ptr; } static inline int __must_check PTR_ERR_OR_ZERO(__force const void *ptr) { if (IS_ERR(ptr)) return PTR_ERR(ptr); else return 0; } #endif #endif /* _LINUX_ERR_H */ PK ! 6�r�H H dma-fence-chain.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * fence-chain: chain fences together in a timeline * * Copyright (C) 2018 Advanced Micro Devices, Inc. * Authors: * Christian König <christian.koenig@amd.com> */ #ifndef __LINUX_DMA_FENCE_CHAIN_H #define __LINUX_DMA_FENCE_CHAIN_H #include <linux/dma-fence.h> #include <linux/irq_work.h> #include <linux/slab.h> /** * struct dma_fence_chain - fence to represent an node of a fence chain * @base: fence base class * @prev: previous fence of the chain * @prev_seqno: original previous seqno before garbage collection * @fence: encapsulated fence * @lock: spinlock for fence handling */ struct dma_fence_chain { struct dma_fence base; struct dma_fence __rcu *prev; u64 prev_seqno; struct dma_fence *fence; union { /** * @cb: callback for signaling * * This is used to add the callback for signaling the * complection of the fence chain. Never used at the same time * as the irq work. */ struct dma_fence_cb cb; /** * @work: irq work item for signaling * * Irq work structure to allow us to add the callback without * running into lock inversion. Never used at the same time as * the callback. */ struct irq_work work; }; spinlock_t lock; }; extern const struct dma_fence_ops dma_fence_chain_ops; /** * to_dma_fence_chain - cast a fence to a dma_fence_chain * @fence: fence to cast to a dma_fence_array * * Returns NULL if the fence is not a dma_fence_chain, * or the dma_fence_chain otherwise. */ static inline struct dma_fence_chain * to_dma_fence_chain(struct dma_fence *fence) { if (!fence || fence->ops != &dma_fence_chain_ops) return NULL; return container_of(fence, struct dma_fence_chain, base); } /** * dma_fence_chain_alloc * * Returns a new struct dma_fence_chain object or NULL on failure. */ static inline struct dma_fence_chain *dma_fence_chain_alloc(void) { return kmalloc(sizeof(struct dma_fence_chain), GFP_KERNEL); }; /** * dma_fence_chain_free * @chain: chain node to free * * Frees up an allocated but not used struct dma_fence_chain object. This * doesn't need an RCU grace period since the fence was never initialized nor * published. After dma_fence_chain_init() has been called the fence must be * released by calling dma_fence_put(), and not through this function. */ static inline void dma_fence_chain_free(struct dma_fence_chain *chain) { kfree(chain); }; /** * dma_fence_chain_for_each - iterate over all fences in chain * @iter: current fence * @head: starting point * * Iterate over all fences in the chain. We keep a reference to the current * fence while inside the loop which must be dropped when breaking out. */ #define dma_fence_chain_for_each(iter, head) \ for (iter = dma_fence_get(head); iter; \ iter = dma_fence_chain_walk(iter)) struct dma_fence *dma_fence_chain_walk(struct dma_fence *fence); int dma_fence_chain_find_seqno(struct dma_fence **pfence, uint64_t seqno); void dma_fence_chain_init(struct dma_fence_chain *chain, struct dma_fence *prev, struct dma_fence *fence, uint64_t seqno); #endif /* __LINUX_DMA_FENCE_CHAIN_H */ PK ! G) ^ ^ hwmon-vid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* hwmon-vid.h - VID/VRM/VRD voltage conversions Originally part of lm_sensors Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com> With assistance from Trent Piepho <xyzzy@speakeasy.org> */ #ifndef _LINUX_HWMON_VID_H #define _LINUX_HWMON_VID_H int vid_from_reg(int val, u8 vrm); u8 vid_which_vrm(void); /* vrm is the VRM/VRD document version multiplied by 10. val is in mV to avoid floating point in the kernel. Returned value is the 4-, 5- or 6-bit VID code. Note that only VRM 9.x is supported for now. */ static inline int vid_to_reg(int val, u8 vrm) { switch (vrm) { case 91: /* VRM 9.1 */ case 90: /* VRM 9.0 */ return ((val >= 1100) && (val <= 1850) ? ((18499 - val * 10) / 25 + 5) / 10 : -1); default: return -EINVAL; } } #endif /* _LINUX_HWMON_VID_H */ PK ! ~�2�^ �^ slab.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Written by Mark Hemment, 1996 (markhe@nextd.demon.co.uk). * * (C) SGI 2006, Christoph Lameter * Cleaned up and restructured to ease the addition of alternative * implementations of SLAB allocators. * (C) Linux Foundation 2008-2013 * Unified interface for all slab allocators */ #ifndef _LINUX_SLAB_H #define _LINUX_SLAB_H #include <linux/gfp.h> #include <linux/overflow.h> #include <linux/types.h> #include <linux/workqueue.h> #include <linux/percpu-refcount.h> #include <linux/cleanup.h> /* * Flags to pass to kmem_cache_create(). * The ones marked DEBUG are only valid if CONFIG_DEBUG_SLAB is set. */ /* DEBUG: Perform (expensive) checks on alloc/free */ #define SLAB_CONSISTENCY_CHECKS ((slab_flags_t __force)0x00000100U) /* DEBUG: Red zone objs in a cache */ #define SLAB_RED_ZONE ((slab_flags_t __force)0x00000400U) /* DEBUG: Poison objects */ #define SLAB_POISON ((slab_flags_t __force)0x00000800U) /* Align objs on cache lines */ #define SLAB_HWCACHE_ALIGN ((slab_flags_t __force)0x00002000U) /* Use GFP_DMA memory */ #define SLAB_CACHE_DMA ((slab_flags_t __force)0x00004000U) /* Use GFP_DMA32 memory */ #define SLAB_CACHE_DMA32 ((slab_flags_t __force)0x00008000U) /* DEBUG: Store the last owner for bug hunting */ #define SLAB_STORE_USER ((slab_flags_t __force)0x00010000U) /* Panic if kmem_cache_create() fails */ #define SLAB_PANIC ((slab_flags_t __force)0x00040000U) /* * SLAB_TYPESAFE_BY_RCU - **WARNING** READ THIS! * * This delays freeing the SLAB page by a grace period, it does _NOT_ * delay object freeing. This means that if you do kmem_cache_free() * that memory location is free to be reused at any time. Thus it may * be possible to see another object there in the same RCU grace period. * * This feature only ensures the memory location backing the object * stays valid, the trick to using this is relying on an independent * object validation pass. Something like: * * rcu_read_lock() * again: * obj = lockless_lookup(key); * if (obj) { * if (!try_get_ref(obj)) // might fail for free objects * goto again; * * if (obj->key != key) { // not the object we expected * put_ref(obj); * goto again; * } * } * rcu_read_unlock(); * * This is useful if we need to approach a kernel structure obliquely, * from its address obtained without the usual locking. We can lock * the structure to stabilize it and check it's still at the given address, * only if we can be sure that the memory has not been meanwhile reused * for some other kind of object (which our subsystem's lock might corrupt). * * rcu_read_lock before reading the address, then rcu_read_unlock after * taking the spinlock within the structure expected at that address. * * Note that SLAB_TYPESAFE_BY_RCU was originally named SLAB_DESTROY_BY_RCU. */ /* Defer freeing slabs to RCU */ #define SLAB_TYPESAFE_BY_RCU ((slab_flags_t __force)0x00080000U) /* Spread some memory over cpuset */ #define SLAB_MEM_SPREAD ((slab_flags_t __force)0x00100000U) /* Trace allocations and frees */ #define SLAB_TRACE ((slab_flags_t __force)0x00200000U) /* Flag to prevent checks on free */ #ifdef CONFIG_DEBUG_OBJECTS # define SLAB_DEBUG_OBJECTS ((slab_flags_t __force)0x00400000U) #else # define SLAB_DEBUG_OBJECTS 0 #endif /* Avoid kmemleak tracing */ #define SLAB_NOLEAKTRACE ((slab_flags_t __force)0x00800000U) /* Fault injection mark */ #ifdef CONFIG_FAILSLAB # define SLAB_FAILSLAB ((slab_flags_t __force)0x02000000U) #else # define SLAB_FAILSLAB 0 #endif /* Account to memcg */ #ifdef CONFIG_MEMCG_KMEM # define SLAB_ACCOUNT ((slab_flags_t __force)0x04000000U) #else # define SLAB_ACCOUNT 0 #endif #ifdef CONFIG_KASAN #define SLAB_KASAN ((slab_flags_t __force)0x08000000U) #else #define SLAB_KASAN 0 #endif /* The following flags affect the page allocator grouping pages by mobility */ /* Objects are reclaimable */ #define SLAB_RECLAIM_ACCOUNT ((slab_flags_t __force)0x00020000U) #define SLAB_TEMPORARY SLAB_RECLAIM_ACCOUNT /* Objects are short-lived */ /* Slab deactivation flag */ #define SLAB_DEACTIVATED ((slab_flags_t __force)0x10000000U) /* * ZERO_SIZE_PTR will be returned for zero sized kmalloc requests. * * Dereferencing ZERO_SIZE_PTR will lead to a distinct access fault. * * ZERO_SIZE_PTR can be passed to kfree though in the same way that NULL can. * Both make kfree a no-op. */ #define ZERO_SIZE_PTR ((void *)16) #define ZERO_OR_NULL_PTR(x) ((unsigned long)(x) <= \ (unsigned long)ZERO_SIZE_PTR) #include <linux/kasan.h> struct mem_cgroup; /* * struct kmem_cache related prototypes */ void __init kmem_cache_init(void); bool slab_is_available(void); extern bool usercopy_fallback; struct kmem_cache *kmem_cache_create(const char *name, unsigned int size, unsigned int align, slab_flags_t flags, void (*ctor)(void *)); struct kmem_cache *kmem_cache_create_usercopy(const char *name, unsigned int size, unsigned int align, slab_flags_t flags, unsigned int useroffset, unsigned int usersize, void (*ctor)(void *)); void kmem_cache_destroy(struct kmem_cache *s); int kmem_cache_shrink(struct kmem_cache *s); /* * Please use this macro to create slab caches. Simply specify the * name of the structure and maybe some flags that are listed above. * * The alignment of the struct determines object alignment. If you * f.e. add ____cacheline_aligned_in_smp to the struct declaration * then the objects will be properly aligned in SMP configurations. */ #define KMEM_CACHE(__struct, __flags) \ kmem_cache_create(#__struct, sizeof(struct __struct), \ __alignof__(struct __struct), (__flags), NULL) /* * To whitelist a single field for copying to/from usercopy, use this * macro instead for KMEM_CACHE() above. */ #define KMEM_CACHE_USERCOPY(__struct, __flags, __field) \ kmem_cache_create_usercopy(#__struct, \ sizeof(struct __struct), \ __alignof__(struct __struct), (__flags), \ offsetof(struct __struct, __field), \ sizeof_field(struct __struct, __field), NULL) /* * Common kmalloc functions provided by all allocators */ void * __must_check krealloc(const void *objp, size_t new_size, gfp_t flags); void kfree(const void *objp); void kfree_sensitive(const void *objp); size_t __ksize(const void *objp); DEFINE_FREE(kfree, void *, if (!IS_ERR_OR_NULL(_T)) kfree(_T)) /** * ksize - Report actual allocation size of associated object * * @objp: Pointer returned from a prior kmalloc()-family allocation. * * This should not be used for writing beyond the originally requested * allocation size. Either use krealloc() or round up the allocation size * with kmalloc_size_roundup() prior to allocation. If this is used to * access beyond the originally requested allocation size, UBSAN_BOUNDS * and/or FORTIFY_SOURCE may trip, since they only know about the * originally allocated size via the __alloc_size attribute. */ size_t ksize(const void *objp); #ifdef CONFIG_PRINTK bool kmem_valid_obj(void *object); void kmem_dump_obj(void *object); #endif #ifdef CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR void __check_heap_object(const void *ptr, unsigned long n, struct page *page, bool to_user); #else static inline void __check_heap_object(const void *ptr, unsigned long n, struct page *page, bool to_user) { } #endif /* * Some archs want to perform DMA into kmalloc caches and need a guaranteed * alignment larger than the alignment of a 64-bit integer. * Setting ARCH_KMALLOC_MINALIGN in arch headers allows that. */ #if defined(ARCH_DMA_MINALIGN) && ARCH_DMA_MINALIGN > 8 #define ARCH_KMALLOC_MINALIGN ARCH_DMA_MINALIGN #define KMALLOC_MIN_SIZE ARCH_DMA_MINALIGN #define KMALLOC_SHIFT_LOW ilog2(ARCH_DMA_MINALIGN) #else #define ARCH_KMALLOC_MINALIGN __alignof__(unsigned long long) #endif /* * Setting ARCH_SLAB_MINALIGN in arch headers allows a different alignment. * Intended for arches that get misalignment faults even for 64 bit integer * aligned buffers. */ #ifndef ARCH_SLAB_MINALIGN #define ARCH_SLAB_MINALIGN __alignof__(unsigned long long) #endif /* * kmalloc and friends return ARCH_KMALLOC_MINALIGN aligned * pointers. kmem_cache_alloc and friends return ARCH_SLAB_MINALIGN * aligned pointers. */ #define __assume_kmalloc_alignment __assume_aligned(ARCH_KMALLOC_MINALIGN) #define __assume_slab_alignment __assume_aligned(ARCH_SLAB_MINALIGN) #define __assume_page_alignment __assume_aligned(PAGE_SIZE) /* * Kmalloc array related definitions */ #ifdef CONFIG_SLAB /* * The largest kmalloc size supported by the SLAB allocators is * 32 megabyte (2^25) or the maximum allocatable page order if that is * less than 32 MB. * * WARNING: Its not easy to increase this value since the allocators have * to do various tricks to work around compiler limitations in order to * ensure proper constant folding. */ #define KMALLOC_SHIFT_HIGH ((MAX_ORDER + PAGE_SHIFT - 1) <= 25 ? \ (MAX_ORDER + PAGE_SHIFT - 1) : 25) #define KMALLOC_SHIFT_MAX KMALLOC_SHIFT_HIGH #ifndef KMALLOC_SHIFT_LOW #define KMALLOC_SHIFT_LOW 5 #endif #endif #ifdef CONFIG_SLUB /* * SLUB directly allocates requests fitting in to an order-1 page * (PAGE_SIZE*2). Larger requests are passed to the page allocator. */ #define KMALLOC_SHIFT_HIGH (PAGE_SHIFT + 1) #define KMALLOC_SHIFT_MAX (MAX_ORDER + PAGE_SHIFT - 1) #ifndef KMALLOC_SHIFT_LOW #define KMALLOC_SHIFT_LOW 3 #endif #endif #ifdef CONFIG_SLOB /* * SLOB passes all requests larger than one page to the page allocator. * No kmalloc array is necessary since objects of different sizes can * be allocated from the same page. */ #define KMALLOC_SHIFT_HIGH PAGE_SHIFT #define KMALLOC_SHIFT_MAX (MAX_ORDER + PAGE_SHIFT - 1) #ifndef KMALLOC_SHIFT_LOW #define KMALLOC_SHIFT_LOW 3 #endif #endif /* Maximum allocatable size */ #define KMALLOC_MAX_SIZE (1UL << KMALLOC_SHIFT_MAX) /* Maximum size for which we actually use a slab cache */ #define KMALLOC_MAX_CACHE_SIZE (1UL << KMALLOC_SHIFT_HIGH) /* Maximum order allocatable via the slab allocator */ #define KMALLOC_MAX_ORDER (KMALLOC_SHIFT_MAX - PAGE_SHIFT) /* * Kmalloc subsystem. */ #ifndef KMALLOC_MIN_SIZE #define KMALLOC_MIN_SIZE (1 << KMALLOC_SHIFT_LOW) #endif /* * This restriction comes from byte sized index implementation. * Page size is normally 2^12 bytes and, in this case, if we want to use * byte sized index which can represent 2^8 entries, the size of the object * should be equal or greater to 2^12 / 2^8 = 2^4 = 16. * If minimum size of kmalloc is less than 16, we use it as minimum object * size and give up to use byte sized index. */ #define SLAB_OBJ_MIN_SIZE (KMALLOC_MIN_SIZE < 16 ? \ (KMALLOC_MIN_SIZE) : 16) /* * Whenever changing this, take care of that kmalloc_type() and * create_kmalloc_caches() still work as intended. * * KMALLOC_NORMAL can contain only unaccounted objects whereas KMALLOC_CGROUP * is for accounted but unreclaimable and non-dma objects. All the other * kmem caches can have both accounted and unaccounted objects. */ enum kmalloc_cache_type { KMALLOC_NORMAL = 0, #ifndef CONFIG_ZONE_DMA KMALLOC_DMA = KMALLOC_NORMAL, #endif #ifndef CONFIG_MEMCG_KMEM KMALLOC_CGROUP = KMALLOC_NORMAL, #else KMALLOC_CGROUP, #endif KMALLOC_RECLAIM, #ifdef CONFIG_ZONE_DMA KMALLOC_DMA, #endif NR_KMALLOC_TYPES }; #ifndef CONFIG_SLOB extern struct kmem_cache * kmalloc_caches[NR_KMALLOC_TYPES][KMALLOC_SHIFT_HIGH + 1]; /* * Define gfp bits that should not be set for KMALLOC_NORMAL. */ #define KMALLOC_NOT_NORMAL_BITS \ (__GFP_RECLAIMABLE | \ (IS_ENABLED(CONFIG_ZONE_DMA) ? __GFP_DMA : 0) | \ (IS_ENABLED(CONFIG_MEMCG_KMEM) ? __GFP_ACCOUNT : 0)) static __always_inline enum kmalloc_cache_type kmalloc_type(gfp_t flags) { /* * The most common case is KMALLOC_NORMAL, so test for it * with a single branch for all the relevant flags. */ if (likely((flags & KMALLOC_NOT_NORMAL_BITS) == 0)) return KMALLOC_NORMAL; /* * At least one of the flags has to be set. Their priorities in * decreasing order are: * 1) __GFP_DMA * 2) __GFP_RECLAIMABLE * 3) __GFP_ACCOUNT */ if (IS_ENABLED(CONFIG_ZONE_DMA) && (flags & __GFP_DMA)) return KMALLOC_DMA; if (!IS_ENABLED(CONFIG_MEMCG_KMEM) || (flags & __GFP_RECLAIMABLE)) return KMALLOC_RECLAIM; else return KMALLOC_CGROUP; } /* * Figure out which kmalloc slab an allocation of a certain size * belongs to. * 0 = zero alloc * 1 = 65 .. 96 bytes * 2 = 129 .. 192 bytes * n = 2^(n-1)+1 .. 2^n * * Note: __kmalloc_index() is compile-time optimized, and not runtime optimized; * typical usage is via kmalloc_index() and therefore evaluated at compile-time. * Callers where !size_is_constant should only be test modules, where runtime * overheads of __kmalloc_index() can be tolerated. Also see kmalloc_slab(). */ static __always_inline unsigned int __kmalloc_index(size_t size, bool size_is_constant) { if (!size) return 0; if (size <= KMALLOC_MIN_SIZE) return KMALLOC_SHIFT_LOW; if (KMALLOC_MIN_SIZE <= 32 && size > 64 && size <= 96) return 1; if (KMALLOC_MIN_SIZE <= 64 && size > 128 && size <= 192) return 2; if (size <= 8) return 3; if (size <= 16) return 4; if (size <= 32) return 5; if (size <= 64) return 6; if (size <= 128) return 7; if (size <= 256) return 8; if (size <= 512) return 9; if (size <= 1024) return 10; if (size <= 2 * 1024) return 11; if (size <= 4 * 1024) return 12; if (size <= 8 * 1024) return 13; if (size <= 16 * 1024) return 14; if (size <= 32 * 1024) return 15; if (size <= 64 * 1024) return 16; if (size <= 128 * 1024) return 17; if (size <= 256 * 1024) return 18; if (size <= 512 * 1024) return 19; if (size <= 1024 * 1024) return 20; if (size <= 2 * 1024 * 1024) return 21; if (size <= 4 * 1024 * 1024) return 22; if (size <= 8 * 1024 * 1024) return 23; if (size <= 16 * 1024 * 1024) return 24; if (size <= 32 * 1024 * 1024) return 25; if ((IS_ENABLED(CONFIG_CC_IS_GCC) || CONFIG_CLANG_VERSION >= 110000) && !IS_ENABLED(CONFIG_PROFILE_ALL_BRANCHES) && size_is_constant) BUILD_BUG_ON_MSG(1, "unexpected size in kmalloc_index()"); else BUG(); /* Will never be reached. Needed because the compiler may complain */ return -1; } #define kmalloc_index(s) __kmalloc_index(s, true) #endif /* !CONFIG_SLOB */ void *__kmalloc(size_t size, gfp_t flags) __assume_kmalloc_alignment __malloc; void *kmem_cache_alloc(struct kmem_cache *s, gfp_t flags) __assume_slab_alignment __malloc; void kmem_cache_free(struct kmem_cache *s, void *objp); /* * Bulk allocation and freeing operations. These are accelerated in an * allocator specific way to avoid taking locks repeatedly or building * metadata structures unnecessarily. * * Note that interrupts must be enabled when calling these functions. */ void kmem_cache_free_bulk(struct kmem_cache *s, size_t size, void **p); int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, void **p); /* * Caller must not use kfree_bulk() on memory not originally allocated * by kmalloc(), because the SLOB allocator cannot handle this. */ static __always_inline void kfree_bulk(size_t size, void **p) { kmem_cache_free_bulk(NULL, size, p); } #ifdef CONFIG_NUMA void *__kmalloc_node(size_t size, gfp_t flags, int node) __assume_kmalloc_alignment __malloc; void *kmem_cache_alloc_node(struct kmem_cache *s, gfp_t flags, int node) __assume_slab_alignment __malloc; #else static __always_inline void *__kmalloc_node(size_t size, gfp_t flags, int node) { return __kmalloc(size, flags); } static __always_inline void *kmem_cache_alloc_node(struct kmem_cache *s, gfp_t flags, int node) { return kmem_cache_alloc(s, flags); } #endif #ifdef CONFIG_TRACING extern void *kmem_cache_alloc_trace(struct kmem_cache *s, gfp_t flags, size_t size) __assume_slab_alignment __malloc; #ifdef CONFIG_NUMA extern void *kmem_cache_alloc_node_trace(struct kmem_cache *s, gfp_t gfpflags, int node, size_t size) __assume_slab_alignment __malloc; #else static __always_inline void *kmem_cache_alloc_node_trace(struct kmem_cache *s, gfp_t gfpflags, int node, size_t size) { return kmem_cache_alloc_trace(s, gfpflags, size); } #endif /* CONFIG_NUMA */ #else /* CONFIG_TRACING */ static __always_inline void *kmem_cache_alloc_trace(struct kmem_cache *s, gfp_t flags, size_t size) { void *ret = kmem_cache_alloc(s, flags); ret = kasan_kmalloc(s, ret, size, flags); return ret; } static __always_inline void *kmem_cache_alloc_node_trace(struct kmem_cache *s, gfp_t gfpflags, int node, size_t size) { void *ret = kmem_cache_alloc_node(s, gfpflags, node); ret = kasan_kmalloc(s, ret, size, gfpflags); return ret; } #endif /* CONFIG_TRACING */ extern void *kmalloc_order(size_t size, gfp_t flags, unsigned int order) __assume_page_alignment __malloc; #ifdef CONFIG_TRACING extern void *kmalloc_order_trace(size_t size, gfp_t flags, unsigned int order) __assume_page_alignment __malloc; #else static __always_inline void *kmalloc_order_trace(size_t size, gfp_t flags, unsigned int order) { return kmalloc_order(size, flags, order); } #endif static __always_inline void *kmalloc_large(size_t size, gfp_t flags) { unsigned int order = get_order(size); return kmalloc_order_trace(size, flags, order); } /** * kmalloc - allocate memory * @size: how many bytes of memory are required. * @flags: the type of memory to allocate. * * kmalloc is the normal method of allocating memory * for objects smaller than page size in the kernel. * * The allocated object address is aligned to at least ARCH_KMALLOC_MINALIGN * bytes. For @size of power of two bytes, the alignment is also guaranteed * to be at least to the size. * * The @flags argument may be one of the GFP flags defined at * include/linux/gfp.h and described at * :ref:`Documentation/core-api/mm-api.rst <mm-api-gfp-flags>` * * The recommended usage of the @flags is described at * :ref:`Documentation/core-api/memory-allocation.rst <memory_allocation>` * * Below is a brief outline of the most useful GFP flags * * %GFP_KERNEL * Allocate normal kernel ram. May sleep. * * %GFP_NOWAIT * Allocation will not sleep. * * %GFP_ATOMIC * Allocation will not sleep. May use emergency pools. * * %GFP_HIGHUSER * Allocate memory from high memory on behalf of user. * * Also it is possible to set different flags by OR'ing * in one or more of the following additional @flags: * * %__GFP_HIGH * This allocation has high priority and may use emergency pools. * * %__GFP_NOFAIL * Indicate that this allocation is in no way allowed to fail * (think twice before using). * * %__GFP_NORETRY * If memory is not immediately available, * then give up at once. * * %__GFP_NOWARN * If allocation fails, don't issue any warnings. * * %__GFP_RETRY_MAYFAIL * Try really hard to succeed the allocation but fail * eventually. */ static __always_inline void *kmalloc(size_t size, gfp_t flags) { if (__builtin_constant_p(size)) { #ifndef CONFIG_SLOB unsigned int index; #endif if (size > KMALLOC_MAX_CACHE_SIZE) return kmalloc_large(size, flags); #ifndef CONFIG_SLOB index = kmalloc_index(size); if (!index) return ZERO_SIZE_PTR; return kmem_cache_alloc_trace( kmalloc_caches[kmalloc_type(flags)][index], flags, size); #endif } return __kmalloc(size, flags); } static __always_inline void *kmalloc_node(size_t size, gfp_t flags, int node) { #ifndef CONFIG_SLOB if (__builtin_constant_p(size) && size <= KMALLOC_MAX_CACHE_SIZE) { unsigned int i = kmalloc_index(size); if (!i) return ZERO_SIZE_PTR; return kmem_cache_alloc_node_trace( kmalloc_caches[kmalloc_type(flags)][i], flags, node, size); } #endif return __kmalloc_node(size, flags, node); } /** * kmalloc_array - allocate memory for an array. * @n: number of elements. * @size: element size. * @flags: the type of memory to allocate (see kmalloc). */ static inline void *kmalloc_array(size_t n, size_t size, gfp_t flags) { size_t bytes; if (unlikely(check_mul_overflow(n, size, &bytes))) return NULL; if (__builtin_constant_p(n) && __builtin_constant_p(size)) return kmalloc(bytes, flags); return __kmalloc(bytes, flags); } /** * krealloc_array - reallocate memory for an array. * @p: pointer to the memory chunk to reallocate * @new_n: new number of elements to alloc * @new_size: new size of a single member of the array * @flags: the type of memory to allocate (see kmalloc) */ static inline void * __must_check krealloc_array(void *p, size_t new_n, size_t new_size, gfp_t flags) { size_t bytes; if (unlikely(check_mul_overflow(new_n, new_size, &bytes))) return NULL; return krealloc(p, bytes, flags); } /** * kcalloc - allocate memory for an array. The memory is set to zero. * @n: number of elements. * @size: element size. * @flags: the type of memory to allocate (see kmalloc). */ static inline void *kcalloc(size_t n, size_t size, gfp_t flags) { return kmalloc_array(n, size, flags | __GFP_ZERO); } /* * kmalloc_track_caller is a special version of kmalloc that records the * calling function of the routine calling it for slab leak tracking instead * of just the calling function (confusing, eh?). * It's useful when the call to kmalloc comes from a widely-used standard * allocator where we care about the real place the memory allocation * request comes from. */ extern void *__kmalloc_track_caller(size_t size, gfp_t flags, unsigned long caller); #define kmalloc_track_caller(size, flags) \ __kmalloc_track_caller(size, flags, _RET_IP_) static inline void *kmalloc_array_node(size_t n, size_t size, gfp_t flags, int node) { size_t bytes; if (unlikely(check_mul_overflow(n, size, &bytes))) return NULL; if (__builtin_constant_p(n) && __builtin_constant_p(size)) return kmalloc_node(bytes, flags, node); return __kmalloc_node(bytes, flags, node); } static inline void *kcalloc_node(size_t n, size_t size, gfp_t flags, int node) { return kmalloc_array_node(n, size, flags | __GFP_ZERO, node); } #ifdef CONFIG_NUMA extern void *__kmalloc_node_track_caller(size_t size, gfp_t flags, int node, unsigned long caller); #define kmalloc_node_track_caller(size, flags, node) \ __kmalloc_node_track_caller(size, flags, node, \ _RET_IP_) #else /* CONFIG_NUMA */ #define kmalloc_node_track_caller(size, flags, node) \ kmalloc_track_caller(size, flags) #endif /* CONFIG_NUMA */ /* * Shortcuts */ static inline void *kmem_cache_zalloc(struct kmem_cache *k, gfp_t flags) { return kmem_cache_alloc(k, flags | __GFP_ZERO); } /** * kzalloc - allocate memory. The memory is set to zero. * @size: how many bytes of memory are required. * @flags: the type of memory to allocate (see kmalloc). */ static inline void *kzalloc(size_t size, gfp_t flags) { return kmalloc(size, flags | __GFP_ZERO); } /** * kzalloc_node - allocate zeroed memory from a particular memory node. * @size: how many bytes of memory are required. * @flags: the type of memory to allocate (see kmalloc). * @node: memory node from which to allocate */ static inline void *kzalloc_node(size_t size, gfp_t flags, int node) { return kmalloc_node(size, flags | __GFP_ZERO, node); } unsigned int kmem_cache_size(struct kmem_cache *s); /** * kmalloc_size_roundup - Report allocation bucket size for the given size * * @size: Number of bytes to round up from. * * This returns the number of bytes that would be available in a kmalloc() * allocation of @size bytes. For example, a 126 byte request would be * rounded up to the next sized kmalloc bucket, 128 bytes. (This is strictly * for the general-purpose kmalloc()-based allocations, and is not for the * pre-sized kmem_cache_alloc()-based allocations.) * * Use this to kmalloc() the full bucket size ahead of time instead of using * ksize() to query the size after an allocation. */ size_t kmalloc_size_roundup(size_t size); void __init kmem_cache_init_late(void); #if defined(CONFIG_SMP) && defined(CONFIG_SLAB) int slab_prepare_cpu(unsigned int cpu); int slab_dead_cpu(unsigned int cpu); #else #define slab_prepare_cpu NULL #define slab_dead_cpu NULL #endif #endif /* _LINUX_SLAB_H */ PK ! U��\h h pci-acpi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * File pci-acpi.h * * Copyright (C) 2004 Intel * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) */ #ifndef _PCI_ACPI_H_ #define _PCI_ACPI_H_ #include <linux/acpi.h> #ifdef CONFIG_ACPI extern acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev); static inline acpi_status pci_acpi_remove_bus_pm_notifier(struct acpi_device *dev) { return acpi_remove_pm_notifier(dev); } extern acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev, struct pci_dev *pci_dev); static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev) { return acpi_remove_pm_notifier(dev); } extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle); struct pci_ecam_ops; extern int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres, const struct pci_ecam_ops **ecam_ops); static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) { struct pci_bus *pbus = pdev->bus; /* Find a PCI root bus */ while (!pci_is_root_bus(pbus)) pbus = pbus->parent; return ACPI_HANDLE(pbus->bridge); } static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus) { struct device *dev; if (pci_is_root_bus(pbus)) dev = pbus->bridge; else { /* If pbus is a virtual bus, there is no bridge to it */ if (!pbus->self) return NULL; dev = &pbus->self->dev; } return ACPI_HANDLE(dev); } struct acpi_pci_root; struct acpi_pci_root_ops; struct acpi_pci_root_info { struct acpi_pci_root *root; struct acpi_device *bridge; struct acpi_pci_root_ops *ops; struct list_head resources; char name[16]; }; struct acpi_pci_root_ops { struct pci_ops *pci_ops; int (*init_info)(struct acpi_pci_root_info *info); void (*release_info)(struct acpi_pci_root_info *info); int (*prepare_resources)(struct acpi_pci_root_info *info); }; extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info); extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, struct acpi_pci_root_ops *ops, struct acpi_pci_root_info *info, void *sd); void acpi_pci_add_bus(struct pci_bus *bus); void acpi_pci_remove_bus(struct pci_bus *bus); #ifdef CONFIG_ACPI_PCI_SLOT void acpi_pci_slot_init(void); void acpi_pci_slot_enumerate(struct pci_bus *bus); void acpi_pci_slot_remove(struct pci_bus *bus); #else static inline void acpi_pci_slot_init(void) { } static inline void acpi_pci_slot_enumerate(struct pci_bus *bus) { } static inline void acpi_pci_slot_remove(struct pci_bus *bus) { } #endif #ifdef CONFIG_HOTPLUG_PCI_ACPI void acpiphp_init(void); void acpiphp_enumerate_slots(struct pci_bus *bus); void acpiphp_remove_slots(struct pci_bus *bus); void acpiphp_check_host_bridge(struct acpi_device *adev); #else static inline void acpiphp_init(void) { } static inline void acpiphp_enumerate_slots(struct pci_bus *bus) { } static inline void acpiphp_remove_slots(struct pci_bus *bus) { } static inline void acpiphp_check_host_bridge(struct acpi_device *adev) { } #endif extern const guid_t pci_acpi_dsm_guid; /* _DSM Definitions for PCI */ #define DSM_PCI_PRESERVE_BOOT_CONFIG 0x05 #define DSM_PCI_DEVICE_NAME 0x07 #define DSM_PCI_POWER_ON_RESET_DELAY 0x08 #define DSM_PCI_DEVICE_READINESS_DURATIONS 0x09 #ifdef CONFIG_PCIE_EDR void pci_acpi_add_edr_notifier(struct pci_dev *pdev); void pci_acpi_remove_edr_notifier(struct pci_dev *pdev); #else static inline void pci_acpi_add_edr_notifier(struct pci_dev *pdev) { } static inline void pci_acpi_remove_edr_notifier(struct pci_dev *pdev) { } #endif /* CONFIG_PCIE_EDR */ int pci_acpi_set_companion_lookup_hook(struct acpi_device *(*func)(struct pci_dev *)); void pci_acpi_clear_companion_lookup_hook(void); #else /* CONFIG_ACPI */ static inline void acpi_pci_add_bus(struct pci_bus *bus) { } static inline void acpi_pci_remove_bus(struct pci_bus *bus) { } #endif /* CONFIG_ACPI */ #endif /* _PCI_ACPI_H_ */ PK ! y[�n�! �! vmalloc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VMALLOC_H #define _LINUX_VMALLOC_H #include <linux/spinlock.h> #include <linux/init.h> #include <linux/list.h> #include <linux/llist.h> #include <asm/page.h> /* pgprot_t */ #include <linux/rbtree.h> #include <linux/overflow.h> #include <asm/vmalloc.h> struct vm_area_struct; /* vma defining user mapping in mm_types.h */ struct notifier_block; /* in notifier.h */ /* bits in flags of vmalloc's vm_struct below */ #define VM_IOREMAP 0x00000001 /* ioremap() and friends */ #define VM_ALLOC 0x00000002 /* vmalloc() */ #define VM_MAP 0x00000004 /* vmap()ed pages */ #define VM_USERMAP 0x00000008 /* suitable for remap_vmalloc_range */ #define VM_DMA_COHERENT 0x00000010 /* dma_alloc_coherent */ #define VM_UNINITIALIZED 0x00000020 /* vm_struct is not fully initialized */ #define VM_NO_GUARD 0x00000040 /* don't add guard page */ #define VM_KASAN 0x00000080 /* has allocated kasan shadow memory */ #define VM_FLUSH_RESET_PERMS 0x00000100 /* reset direct map and flush TLB on unmap, can't be freed in atomic context */ #define VM_MAP_PUT_PAGES 0x00000200 /* put pages and free array in vfree */ #define VM_NO_HUGE_VMAP 0x00000400 /* force PAGE_SIZE pte mapping */ #if (defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)) && \ !defined(CONFIG_KASAN_VMALLOC) #define VM_DEFER_KMEMLEAK 0x00000800 /* defer kmemleak object creation */ #else #define VM_DEFER_KMEMLEAK 0 #endif /* * VM_KASAN is used slightly differently depending on CONFIG_KASAN_VMALLOC. * * If IS_ENABLED(CONFIG_KASAN_VMALLOC), VM_KASAN is set on a vm_struct after * shadow memory has been mapped. It's used to handle allocation errors so that * we don't try to poison shadow on free if it was never allocated. * * Otherwise, VM_KASAN is set for kasan_module_alloc() allocations and used to * determine which allocations need the module shadow freed. */ /* bits [20..32] reserved for arch specific ioremap internals */ /* * Maximum alignment for ioremap() regions. * Can be overridden by arch-specific value. */ #ifndef IOREMAP_MAX_ORDER #define IOREMAP_MAX_ORDER (7 + PAGE_SHIFT) /* 128 pages */ #endif struct vm_struct { struct vm_struct *next; void *addr; unsigned long size; unsigned long flags; struct page **pages; #ifdef CONFIG_HAVE_ARCH_HUGE_VMALLOC unsigned int page_order; #endif unsigned int nr_pages; phys_addr_t phys_addr; const void *caller; }; struct vmap_area { unsigned long va_start; unsigned long va_end; struct rb_node rb_node; /* address sorted rbtree */ struct list_head list; /* address sorted list */ /* * The following two variables can be packed, because * a vmap_area object can be either: * 1) in "free" tree (root is vmap_area_root) * 2) or "busy" tree (root is free_vmap_area_root) */ union { unsigned long subtree_max_size; /* in "free" tree */ struct vm_struct *vm; /* in "busy" tree */ }; }; /* archs that select HAVE_ARCH_HUGE_VMAP should override one or more of these */ #ifndef arch_vmap_p4d_supported static inline bool arch_vmap_p4d_supported(pgprot_t prot) { return false; } #endif #ifndef arch_vmap_pud_supported static inline bool arch_vmap_pud_supported(pgprot_t prot) { return false; } #endif #ifndef arch_vmap_pmd_supported static inline bool arch_vmap_pmd_supported(pgprot_t prot) { return false; } #endif #ifndef arch_vmap_pte_range_map_size static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr, unsigned long end, u64 pfn, unsigned int max_page_shift) { return PAGE_SIZE; } #endif #ifndef arch_vmap_pte_supported_shift static inline int arch_vmap_pte_supported_shift(unsigned long size) { return PAGE_SHIFT; } #endif /* * Highlevel APIs for driver use */ extern void vm_unmap_ram(const void *mem, unsigned int count); extern void *vm_map_ram(struct page **pages, unsigned int count, int node); extern void vm_unmap_aliases(void); #ifdef CONFIG_MMU extern void __init vmalloc_init(void); extern unsigned long vmalloc_nr_pages(void); #else static inline void vmalloc_init(void) { } static inline unsigned long vmalloc_nr_pages(void) { return 0; } #endif extern void *vmalloc(unsigned long size); extern void *vzalloc(unsigned long size); extern void *vmalloc_user(unsigned long size); extern void *vmalloc_node(unsigned long size, int node); extern void *vzalloc_node(unsigned long size, int node); extern void *vmalloc_32(unsigned long size); extern void *vmalloc_32_user(unsigned long size); extern void *__vmalloc(unsigned long size, gfp_t gfp_mask); extern void *__vmalloc_node_range(unsigned long size, unsigned long align, unsigned long start, unsigned long end, gfp_t gfp_mask, pgprot_t prot, unsigned long vm_flags, int node, const void *caller); void *__vmalloc_node(unsigned long size, unsigned long align, gfp_t gfp_mask, int node, const void *caller); void *vmalloc_no_huge(unsigned long size); extern void *__vmalloc_array(size_t n, size_t size, gfp_t flags) __alloc_size(1, 2); extern void *vmalloc_array(size_t n, size_t size) __alloc_size(1, 2); extern void *__vcalloc(size_t n, size_t size, gfp_t flags) __alloc_size(1, 2); extern void *vcalloc(size_t n, size_t size) __alloc_size(1, 2); extern void vfree(const void *addr); extern void vfree_atomic(const void *addr); extern void *vmap(struct page **pages, unsigned int count, unsigned long flags, pgprot_t prot); void *vmap_pfn(unsigned long *pfns, unsigned int count, pgprot_t prot); extern void vunmap(const void *addr); extern int remap_vmalloc_range_partial(struct vm_area_struct *vma, unsigned long uaddr, void *kaddr, unsigned long pgoff, unsigned long size); extern int remap_vmalloc_range(struct vm_area_struct *vma, void *addr, unsigned long pgoff); /* * Lowlevel-APIs (not for driver use!) */ static inline size_t get_vm_area_size(const struct vm_struct *area) { if (!(area->flags & VM_NO_GUARD)) /* return actual size without guard page */ return area->size - PAGE_SIZE; else return area->size; } extern struct vm_struct *get_vm_area(unsigned long size, unsigned long flags); extern struct vm_struct *get_vm_area_caller(unsigned long size, unsigned long flags, const void *caller); extern struct vm_struct *__get_vm_area_caller(unsigned long size, unsigned long flags, unsigned long start, unsigned long end, const void *caller); void free_vm_area(struct vm_struct *area); extern struct vm_struct *remove_vm_area(const void *addr); extern struct vm_struct *find_vm_area(const void *addr); static inline bool is_vm_area_hugepages(const void *addr) { /* * This may not 100% tell if the area is mapped with > PAGE_SIZE * page table entries, if for some reason the architecture indicates * larger sizes are available but decides not to use them, nothing * prevents that. This only indicates the size of the physical page * allocated in the vmalloc layer. */ #ifdef CONFIG_HAVE_ARCH_HUGE_VMALLOC return find_vm_area(addr)->page_order > 0; #else return false; #endif } #ifdef CONFIG_MMU void vunmap_range(unsigned long addr, unsigned long end); static inline void set_vm_flush_reset_perms(void *addr) { struct vm_struct *vm = find_vm_area(addr); if (vm) vm->flags |= VM_FLUSH_RESET_PERMS; } #else static inline void set_vm_flush_reset_perms(void *addr) { } #endif /* for /proc/kcore */ extern long vread(char *buf, char *addr, unsigned long count); /* * Internals. Don't use.. */ extern struct list_head vmap_area_list; extern __init void vm_area_add_early(struct vm_struct *vm); extern __init void vm_area_register_early(struct vm_struct *vm, size_t align); #ifdef CONFIG_SMP # ifdef CONFIG_MMU struct vm_struct **pcpu_get_vm_areas(const unsigned long *offsets, const size_t *sizes, int nr_vms, size_t align); void pcpu_free_vm_areas(struct vm_struct **vms, int nr_vms); # else static inline struct vm_struct ** pcpu_get_vm_areas(const unsigned long *offsets, const size_t *sizes, int nr_vms, size_t align) { return NULL; } static inline void pcpu_free_vm_areas(struct vm_struct **vms, int nr_vms) { } # endif #endif #ifdef CONFIG_MMU #define VMALLOC_TOTAL (VMALLOC_END - VMALLOC_START) #else #define VMALLOC_TOTAL 0UL #endif int register_vmap_purge_notifier(struct notifier_block *nb); int unregister_vmap_purge_notifier(struct notifier_block *nb); #if defined(CONFIG_MMU) && defined(CONFIG_PRINTK) bool vmalloc_dump_obj(void *object); #else static inline bool vmalloc_dump_obj(void *object) { return false; } #endif #endif /* _LINUX_VMALLOC_H */ PK ! �g��t t vfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VFS_H #define _LINUX_VFS_H #include <linux/statfs.h> #endif PK ! I:<� � resctrl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _RESCTRL_H #define _RESCTRL_H #include <linux/kernel.h> #include <linux/list.h> #include <linux/pid.h> #ifdef CONFIG_PROC_CPU_RESCTRL int proc_resctrl_show(struct seq_file *m, struct pid_namespace *ns, struct pid *pid, struct task_struct *tsk); #endif /** * enum resctrl_conf_type - The type of configuration. * @CDP_NONE: No prioritisation, both code and data are controlled or monitored. * @CDP_CODE: Configuration applies to instruction fetches. * @CDP_DATA: Configuration applies to reads and writes. */ enum resctrl_conf_type { CDP_NONE, CDP_CODE, CDP_DATA, }; #define CDP_NUM_TYPES (CDP_DATA + 1) /** * struct resctrl_staged_config - parsed configuration to be applied * @new_ctrl: new ctrl value to be loaded * @have_new_ctrl: whether the user provided new_ctrl is valid */ struct resctrl_staged_config { u32 new_ctrl; bool have_new_ctrl; }; /** * struct rdt_domain - group of CPUs sharing a resctrl resource * @list: all instances of this resource * @id: unique id for this instance * @cpu_mask: which CPUs share this resource * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold * @mbm_total: saved state for MBM total bandwidth * @mbm_local: saved state for MBM local bandwidth * @mbm_over: worker to periodically read MBM h/w counters * @cqm_limbo: worker to periodically read CQM h/w counters * @mbm_work_cpu: worker CPU for MBM h/w counters * @cqm_work_cpu: worker CPU for CQM h/w counters * @plr: pseudo-locked region (if any) associated with domain * @staged_config: parsed configuration to be applied */ struct rdt_domain { struct list_head list; int id; struct cpumask cpu_mask; unsigned long *rmid_busy_llc; struct mbm_state *mbm_total; struct mbm_state *mbm_local; struct delayed_work mbm_over; struct delayed_work cqm_limbo; int mbm_work_cpu; int cqm_work_cpu; struct pseudo_lock_region *plr; struct resctrl_staged_config staged_config[CDP_NUM_TYPES]; }; /** * struct resctrl_cache - Cache allocation related data * @cbm_len: Length of the cache bit mask * @min_cbm_bits: Minimum number of consecutive bits to be set * @shareable_bits: Bitmask of shareable resource with other * executing entities * @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid. * @arch_has_empty_bitmaps: True if the '0' bitmap is valid. * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache * level has CPU scope. */ struct resctrl_cache { unsigned int cbm_len; unsigned int min_cbm_bits; unsigned int shareable_bits; bool arch_has_sparse_bitmaps; bool arch_has_empty_bitmaps; bool arch_has_per_cpu_cfg; }; /** * enum membw_throttle_mode - System's memory bandwidth throttling mode * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core * always using smallest bandwidth percentage * assigned to threads, aka "max throttling" * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread */ enum membw_throttle_mode { THREAD_THROTTLE_UNDEFINED = 0, THREAD_THROTTLE_MAX, THREAD_THROTTLE_PER_THREAD, }; /** * struct resctrl_membw - Memory bandwidth allocation related data * @min_bw: Minimum memory bandwidth percentage user can request * @bw_gran: Granularity at which the memory bandwidth is allocated * @delay_linear: True if memory B/W delay is in linear scale * @arch_needs_linear: True if we can't configure non-linear resources * @throttle_mode: Bandwidth throttling mode when threads request * different memory bandwidths * @mba_sc: True if MBA software controller(mba_sc) is enabled * @mb_map: Mapping of memory B/W percentage to memory B/W delay */ struct resctrl_membw { u32 min_bw; u32 bw_gran; u32 delay_linear; bool arch_needs_linear; enum membw_throttle_mode throttle_mode; bool mba_sc; u32 *mb_map; }; struct rdt_parse_data; struct resctrl_schema; /** * struct rdt_resource - attributes of a resctrl resource * @rid: The index of the resource * @alloc_enabled: Is allocation enabled on this machine * @mon_enabled: Is monitoring enabled for this feature * @alloc_capable: Is allocation available on this machine * @mon_capable: Is monitor feature available on this machine * @num_rmid: Number of RMIDs available * @cache_level: Which cache level defines scope of this resource * @cache: Cache allocation related data * @membw: If the component has bandwidth controls, their properties. * @domains: All domains for this resource * @name: Name to use in "schemata" file. * @data_width: Character width of data when displaying * @default_ctrl: Specifies default cache cbm or memory B/W percent. * @format_str: Per resource format string to show domain value * @parse_ctrlval: Per resource function pointer to parse control values * @evt_list: List of monitoring events * @fflags: flags to choose base and info files * @cdp_capable: Is the CDP feature available on this resource */ struct rdt_resource { int rid; bool alloc_enabled; bool mon_enabled; bool alloc_capable; bool mon_capable; int num_rmid; int cache_level; struct resctrl_cache cache; struct resctrl_membw membw; struct list_head domains; char *name; int data_width; u32 default_ctrl; const char *format_str; int (*parse_ctrlval)(struct rdt_parse_data *data, struct resctrl_schema *s, struct rdt_domain *d); struct list_head evt_list; unsigned long fflags; bool cdp_capable; }; /** * struct resctrl_schema - configuration abilities of a resource presented to * user-space * @list: Member of resctrl_schema_all. * @name: The name to use in the "schemata" file. * @conf_type: Whether this schema is specific to code/data. * @res: The resource structure exported by the architecture to describe * the hardware that is configured by this schema. * @num_closid: The number of closid that can be used with this schema. When * features like CDP are enabled, this will be lower than the * hardware supports for the resource. */ struct resctrl_schema { struct list_head list; char name[8]; enum resctrl_conf_type conf_type; struct rdt_resource *res; u32 num_closid; }; /* The number of closid supported by this resource regardless of CDP */ u32 resctrl_arch_get_num_closid(struct rdt_resource *r); int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid); u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, u32 closid, enum resctrl_conf_type type); #endif /* _RESCTRL_H */ PK ! ��.�� � mman.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MMAN_H #define _LINUX_MMAN_H #include <linux/fs.h> #include <linux/mm.h> #include <linux/percpu_counter.h> #include <linux/atomic.h> #include <uapi/linux/mman.h> /* * Arrange for legacy / undefined architecture specific flags to be * ignored by mmap handling code. */ #ifndef MAP_32BIT #define MAP_32BIT 0 #endif #ifndef MAP_HUGE_2MB #define MAP_HUGE_2MB 0 #endif #ifndef MAP_HUGE_1GB #define MAP_HUGE_1GB 0 #endif #ifndef MAP_UNINITIALIZED #define MAP_UNINITIALIZED 0 #endif #ifndef MAP_SYNC #define MAP_SYNC 0 #endif /* * The historical set of flags that all mmap implementations implicitly * support when a ->mmap_validate() op is not provided in file_operations. * * MAP_EXECUTABLE and MAP_DENYWRITE are completely ignored throughout the * kernel. */ #define LEGACY_MAP_MASK (MAP_SHARED \ | MAP_PRIVATE \ | MAP_FIXED \ | MAP_ANONYMOUS \ | MAP_DENYWRITE \ | MAP_EXECUTABLE \ | MAP_UNINITIALIZED \ | MAP_GROWSDOWN \ | MAP_LOCKED \ | MAP_NORESERVE \ | MAP_POPULATE \ | MAP_NONBLOCK \ | MAP_STACK \ | MAP_HUGETLB \ | MAP_32BIT \ | MAP_HUGE_2MB \ | MAP_HUGE_1GB) extern int sysctl_overcommit_memory; extern int sysctl_overcommit_ratio; extern unsigned long sysctl_overcommit_kbytes; extern struct percpu_counter vm_committed_as; #ifdef CONFIG_SMP extern s32 vm_committed_as_batch; extern void mm_compute_batch(int overcommit_policy); #else #define vm_committed_as_batch 0 static inline void mm_compute_batch(int overcommit_policy) { } #endif unsigned long vm_memory_committed(void); static inline void vm_acct_memory(long pages) { percpu_counter_add_batch(&vm_committed_as, pages, vm_committed_as_batch); } static inline void vm_unacct_memory(long pages) { vm_acct_memory(-pages); } /* * Allow architectures to handle additional protection and flag bits. The * overriding macros must be defined in the arch-specific asm/mman.h file. */ #ifndef arch_calc_vm_prot_bits #define arch_calc_vm_prot_bits(prot, pkey) 0 #endif #ifndef arch_calc_vm_flag_bits #define arch_calc_vm_flag_bits(file, flags) 0 #endif #ifndef arch_vm_get_page_prot #define arch_vm_get_page_prot(vm_flags) __pgprot(0) #endif #ifndef arch_validate_prot /* * This is called from mprotect(). PROT_GROWSDOWN and PROT_GROWSUP have * already been masked out. * * Returns true if the prot flags are valid */ static inline bool arch_validate_prot(unsigned long prot, unsigned long addr) { return (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM)) == 0; } #define arch_validate_prot arch_validate_prot #endif #ifndef arch_validate_flags /* * This is called from mmap() and mprotect() with the updated vma->vm_flags. * * Returns true if the VM_* flags are valid. */ static inline bool arch_validate_flags(unsigned long flags) { return true; } #define arch_validate_flags arch_validate_flags #endif /* * Optimisation macro. It is equivalent to: * (x & bit1) ? bit2 : 0 * but this version is faster. * ("bit1" and "bit2" must be single bits) */ #define _calc_vm_trans(x, bit1, bit2) \ ((!(bit1) || !(bit2)) ? 0 : \ ((bit1) <= (bit2) ? ((x) & (bit1)) * ((bit2) / (bit1)) \ : ((x) & (bit1)) / ((bit1) / (bit2)))) /* * Combine the mmap "prot" argument into "vm_flags" used internally. */ static inline unsigned long calc_vm_prot_bits(unsigned long prot, unsigned long pkey) { return _calc_vm_trans(prot, PROT_READ, VM_READ ) | _calc_vm_trans(prot, PROT_WRITE, VM_WRITE) | _calc_vm_trans(prot, PROT_EXEC, VM_EXEC) | arch_calc_vm_prot_bits(prot, pkey); } /* * Combine the mmap "flags" argument into "vm_flags" used internally. */ static inline unsigned long calc_vm_flag_bits(struct file *file, unsigned long flags) { return _calc_vm_trans(flags, MAP_GROWSDOWN, VM_GROWSDOWN ) | _calc_vm_trans(flags, MAP_LOCKED, VM_LOCKED ) | _calc_vm_trans(flags, MAP_SYNC, VM_SYNC ) | arch_calc_vm_flag_bits(file, flags); } unsigned long vm_commit_limit(void); #endif /* _LINUX_MMAN_H */ PK ! ��4 4 perf_regs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PERF_REGS_H #define _LINUX_PERF_REGS_H #include <linux/sched/task_stack.h> struct perf_regs { __u64 abi; struct pt_regs *regs; }; #ifdef CONFIG_HAVE_PERF_REGS #include <asm/perf_regs.h> #ifndef PERF_REG_EXTENDED_MASK #define PERF_REG_EXTENDED_MASK 0 #endif u64 perf_reg_value(struct pt_regs *regs, int idx); int perf_reg_validate(u64 mask); u64 perf_reg_abi(struct task_struct *task); void perf_get_regs_user(struct perf_regs *regs_user, struct pt_regs *regs); #else #define PERF_REG_EXTENDED_MASK 0 static inline u64 perf_reg_value(struct pt_regs *regs, int idx) { return 0; } static inline int perf_reg_validate(u64 mask) { return mask ? -ENOSYS : 0; } static inline u64 perf_reg_abi(struct task_struct *task) { return PERF_SAMPLE_REGS_ABI_NONE; } static inline void perf_get_regs_user(struct perf_regs *regs_user, struct pt_regs *regs) { regs_user->regs = task_pt_regs(current); regs_user->abi = perf_reg_abi(current); } #endif /* CONFIG_HAVE_PERF_REGS */ #endif /* _LINUX_PERF_REGS_H */ PK ! ���=� � maple.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MAPLE_H #define __LINUX_MAPLE_H #include <mach/maple.h> struct device; extern struct bus_type maple_bus_type; /* Maple Bus command and response codes */ enum maple_code { MAPLE_RESPONSE_FILEERR = -5, MAPLE_RESPONSE_AGAIN, /* retransmit */ MAPLE_RESPONSE_BADCMD, MAPLE_RESPONSE_BADFUNC, MAPLE_RESPONSE_NONE, /* unit didn't respond*/ MAPLE_COMMAND_DEVINFO = 1, MAPLE_COMMAND_ALLINFO, MAPLE_COMMAND_RESET, MAPLE_COMMAND_KILL, MAPLE_RESPONSE_DEVINFO, MAPLE_RESPONSE_ALLINFO, MAPLE_RESPONSE_OK, MAPLE_RESPONSE_DATATRF, MAPLE_COMMAND_GETCOND, MAPLE_COMMAND_GETMINFO, MAPLE_COMMAND_BREAD, MAPLE_COMMAND_BWRITE, MAPLE_COMMAND_BSYNC, MAPLE_COMMAND_SETCOND, MAPLE_COMMAND_MICCONTROL }; enum maple_file_errors { MAPLE_FILEERR_INVALID_PARTITION = 0x01000000, MAPLE_FILEERR_PHASE_ERROR = 0x02000000, MAPLE_FILEERR_INVALID_BLOCK = 0x04000000, MAPLE_FILEERR_WRITE_ERROR = 0x08000000, MAPLE_FILEERR_INVALID_WRITE_LENGTH = 0x10000000, MAPLE_FILEERR_BAD_CRC = 0x20000000 }; struct maple_buffer { char bufx[0x400]; void *buf; }; struct mapleq { struct list_head list; struct maple_device *dev; struct maple_buffer *recvbuf; void *sendbuf, *recvbuf_p2; unsigned char length; enum maple_code command; }; struct maple_devinfo { unsigned long function; unsigned long function_data[3]; unsigned char area_code; unsigned char connector_direction; char product_name[31]; char product_licence[61]; unsigned short standby_power; unsigned short max_power; }; struct maple_device { struct maple_driver *driver; struct mapleq *mq; void (*callback) (struct mapleq * mq); void (*fileerr_handler)(struct maple_device *mdev, void *recvbuf); int (*can_unload)(struct maple_device *mdev); unsigned long when, interval, function; struct maple_devinfo devinfo; unsigned char port, unit; char product_name[32]; char product_licence[64]; atomic_t busy; wait_queue_head_t maple_wait; struct device dev; }; struct maple_driver { unsigned long function; struct device_driver drv; }; void maple_getcond_callback(struct maple_device *dev, void (*callback) (struct mapleq * mq), unsigned long interval, unsigned long function); int maple_driver_register(struct maple_driver *); void maple_driver_unregister(struct maple_driver *); int maple_add_packet(struct maple_device *mdev, u32 function, u32 command, u32 length, void *data); void maple_clear_dev(struct maple_device *mdev); #define to_maple_dev(n) container_of(n, struct maple_device, dev) #define to_maple_driver(n) container_of(n, struct maple_driver, drv) #define maple_get_drvdata(d) dev_get_drvdata(&(d)->dev) #define maple_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p)) #endif /* __LINUX_MAPLE_H */ PK ! %��� � timerfd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/timerfd.h * * Copyright (C) 2007 Davide Libenzi <davidel@xmailserver.org> * */ #ifndef _LINUX_TIMERFD_H #define _LINUX_TIMERFD_H #include <uapi/linux/timerfd.h> #define TFD_SHARED_FCNTL_FLAGS (TFD_CLOEXEC | TFD_NONBLOCK) /* Flags for timerfd_create. */ #define TFD_CREATE_FLAGS TFD_SHARED_FCNTL_FLAGS /* Flags for timerfd_settime. */ #define TFD_SETTIME_FLAGS (TFD_TIMER_ABSTIME | TFD_TIMER_CANCEL_ON_SET) #endif /* _LINUX_TIMERFD_H */ PK ! n� �. . frontswap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FRONTSWAP_H #define _LINUX_FRONTSWAP_H #include <linux/swap.h> #include <linux/mm.h> #include <linux/bitops.h> #include <linux/jump_label.h> /* * Return code to denote that requested number of * frontswap pages are unused(moved to page cache). * Used in shmem_unuse and try_to_unuse. */ #define FRONTSWAP_PAGES_UNUSED 2 struct frontswap_ops { void (*init)(unsigned); /* this swap type was just swapon'ed */ int (*store)(unsigned, pgoff_t, struct page *); /* store a page */ int (*load)(unsigned, pgoff_t, struct page *); /* load a page */ void (*invalidate_page)(unsigned, pgoff_t); /* page no longer needed */ void (*invalidate_area)(unsigned); /* swap type just swapoff'ed */ struct frontswap_ops *next; /* private pointer to next ops */ }; extern void frontswap_register_ops(struct frontswap_ops *ops); extern void frontswap_shrink(unsigned long); extern unsigned long frontswap_curr_pages(void); extern void frontswap_writethrough(bool); #define FRONTSWAP_HAS_EXCLUSIVE_GETS extern void frontswap_tmem_exclusive_gets(bool); extern bool __frontswap_test(struct swap_info_struct *, pgoff_t); extern void __frontswap_init(unsigned type, unsigned long *map); extern int __frontswap_store(struct page *page); extern int __frontswap_load(struct page *page); extern void __frontswap_invalidate_page(unsigned, pgoff_t); extern void __frontswap_invalidate_area(unsigned); #ifdef CONFIG_FRONTSWAP extern struct static_key_false frontswap_enabled_key; static inline bool frontswap_enabled(void) { return static_branch_unlikely(&frontswap_enabled_key); } static inline bool frontswap_test(struct swap_info_struct *sis, pgoff_t offset) { return __frontswap_test(sis, offset); } static inline void frontswap_map_set(struct swap_info_struct *p, unsigned long *map) { p->frontswap_map = map; } static inline unsigned long *frontswap_map_get(struct swap_info_struct *p) { return p->frontswap_map; } #else /* all inline routines become no-ops and all externs are ignored */ static inline bool frontswap_enabled(void) { return false; } static inline bool frontswap_test(struct swap_info_struct *sis, pgoff_t offset) { return false; } static inline void frontswap_map_set(struct swap_info_struct *p, unsigned long *map) { } static inline unsigned long *frontswap_map_get(struct swap_info_struct *p) { return NULL; } #endif static inline int frontswap_store(struct page *page) { if (frontswap_enabled()) return __frontswap_store(page); return -1; } static inline int frontswap_load(struct page *page) { if (frontswap_enabled()) return __frontswap_load(page); return -1; } static inline void frontswap_invalidate_page(unsigned type, pgoff_t offset) { if (frontswap_enabled()) __frontswap_invalidate_page(type, offset); } static inline void frontswap_invalidate_area(unsigned type) { if (frontswap_enabled()) __frontswap_invalidate_area(type); } static inline void frontswap_init(unsigned type, unsigned long *map) { #ifdef CONFIG_FRONTSWAP __frontswap_init(type, map); #endif } #endif /* _LINUX_FRONTSWAP_H */ PK ! �s��Z* Z* wm97xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Register bits and API for Wolfson WM97xx series of codecs */ #ifndef _LINUX_WM97XX_H #define _LINUX_WM97XX_H #include <sound/core.h> #include <sound/pcm.h> #include <sound/ac97_codec.h> #include <sound/initval.h> #include <linux/types.h> #include <linux/list.h> #include <linux/input.h> /* Input device layer */ #include <linux/platform_device.h> /* * WM97xx variants */ #define WM97xx_GENERIC 0x0000 #define WM97xx_WM1613 0x1613 /* * WM97xx AC97 Touchscreen registers */ #define AC97_WM97XX_DIGITISER1 0x76 #define AC97_WM97XX_DIGITISER2 0x78 #define AC97_WM97XX_DIGITISER_RD 0x7a #define AC97_WM9713_DIG1 0x74 #define AC97_WM9713_DIG2 AC97_WM97XX_DIGITISER1 #define AC97_WM9713_DIG3 AC97_WM97XX_DIGITISER2 /* * WM97xx register bits */ #define WM97XX_POLL 0x8000 /* initiate a polling measurement */ #define WM97XX_ADCSEL_X 0x1000 /* x coord measurement */ #define WM97XX_ADCSEL_Y 0x2000 /* y coord measurement */ #define WM97XX_ADCSEL_PRES 0x3000 /* pressure measurement */ #define WM97XX_AUX_ID1 0x4000 #define WM97XX_AUX_ID2 0x5000 #define WM97XX_AUX_ID3 0x6000 #define WM97XX_AUX_ID4 0x7000 #define WM97XX_ADCSEL_MASK 0x7000 /* ADC selection mask */ #define WM97XX_COO 0x0800 /* enable coordinate mode */ #define WM97XX_CTC 0x0400 /* enable continuous mode */ #define WM97XX_CM_RATE_93 0x0000 /* 93.75Hz continuous rate */ #define WM97XX_CM_RATE_187 0x0100 /* 187.5Hz continuous rate */ #define WM97XX_CM_RATE_375 0x0200 /* 375Hz continuous rate */ #define WM97XX_CM_RATE_750 0x0300 /* 750Hz continuous rate */ #define WM97XX_CM_RATE_8K 0x00f0 /* 8kHz continuous rate */ #define WM97XX_CM_RATE_12K 0x01f0 /* 12kHz continuous rate */ #define WM97XX_CM_RATE_24K 0x02f0 /* 24kHz continuous rate */ #define WM97XX_CM_RATE_48K 0x03f0 /* 48kHz continuous rate */ #define WM97XX_CM_RATE_MASK 0x03f0 #define WM97XX_RATE(i) (((i & 3) << 8) | ((i & 4) ? 0xf0 : 0)) #define WM97XX_DELAY(i) ((i << 4) & 0x00f0) /* sample delay times */ #define WM97XX_DELAY_MASK 0x00f0 #define WM97XX_SLEN 0x0008 /* slot read back enable */ #define WM97XX_SLT(i) ((i - 5) & 0x7) /* panel slot (5-11) */ #define WM97XX_SLT_MASK 0x0007 #define WM97XX_PRP_DETW 0x4000 /* detect on, digitise off, wake */ #define WM97XX_PRP_DET 0x8000 /* detect on, digitise off, no wake */ #define WM97XX_PRP_DET_DIG 0xc000 /* setect on, digitise on */ #define WM97XX_RPR 0x2000 /* wake up on pen down */ #define WM97XX_PEN_DOWN 0x8000 /* pen is down */ /* WM9712 Bits */ #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */ #define WM9712_PDEN 0x0800 /* measure only when pen down */ #define WM9712_WAIT 0x0200 /* wait until adc is read before next sample */ #define WM9712_PIL 0x0100 /* current used for pressure measurement. set 400uA else 200uA */ #define WM9712_MASK_HI 0x0040 /* hi on mask pin (47) stops conversions */ #define WM9712_MASK_EDGE 0x0080 /* rising/falling edge on pin delays sample */ #define WM9712_MASK_SYNC 0x00c0 /* rising/falling edge on mask initiates sample */ #define WM9712_RPU(i) (i&0x3f) /* internal pull up on pen detect (64k / rpu) */ #define WM9712_PD(i) (0x1 << i) /* power management */ /* WM9712 Registers */ #define AC97_WM9712_POWER 0x24 #define AC97_WM9712_REV 0x58 /* WM9705 Bits */ #define WM9705_PDEN 0x1000 /* measure only when pen is down */ #define WM9705_PINV 0x0800 /* inverts sense of pen down output */ #define WM9705_BSEN 0x0400 /* BUSY flag enable, pin47 is 1 when busy */ #define WM9705_BINV 0x0200 /* invert BUSY (pin47) output */ #define WM9705_WAIT 0x0100 /* wait until adc is read before next sample */ #define WM9705_PIL 0x0080 /* current used for pressure measurement. set 400uA else 200uA */ #define WM9705_PHIZ 0x0040 /* set PHONE and PCBEEP inputs to high impedance */ #define WM9705_MASK_HI 0x0010 /* hi on mask stops conversions */ #define WM9705_MASK_EDGE 0x0020 /* rising/falling edge on pin delays sample */ #define WM9705_MASK_SYNC 0x0030 /* rising/falling edge on mask initiates sample */ #define WM9705_PDD(i) (i & 0x000f) /* pen detect comparator threshold */ /* WM9713 Bits */ #define WM9713_PDPOL 0x0400 /* Pen down polarity */ #define WM9713_POLL 0x0200 /* initiate a polling measurement */ #define WM9713_CTC 0x0100 /* enable continuous mode */ #define WM9713_ADCSEL_X 0x0002 /* X measurement */ #define WM9713_ADCSEL_Y 0x0004 /* Y measurement */ #define WM9713_ADCSEL_PRES 0x0008 /* Pressure measurement */ #define WM9713_COO 0x0001 /* enable coordinate mode */ #define WM9713_45W 0x1000 /* set for 5 wire panel */ #define WM9713_PDEN 0x0800 /* measure only when pen down */ #define WM9713_ADCSEL_MASK 0x00fe /* ADC selection mask */ #define WM9713_WAIT 0x0200 /* coordinate wait */ /* AUX ADC ID's */ #define TS_COMP1 0x0 #define TS_COMP2 0x1 #define TS_BMON 0x2 #define TS_WIPER 0x3 /* ID numbers */ #define WM97XX_ID1 0x574d #define WM9712_ID2 0x4c12 #define WM9705_ID2 0x4c05 #define WM9713_ID2 0x4c13 /* Codec GPIO's */ #define WM97XX_MAX_GPIO 16 #define WM97XX_GPIO_1 (1 << 1) #define WM97XX_GPIO_2 (1 << 2) #define WM97XX_GPIO_3 (1 << 3) #define WM97XX_GPIO_4 (1 << 4) #define WM97XX_GPIO_5 (1 << 5) #define WM97XX_GPIO_6 (1 << 6) #define WM97XX_GPIO_7 (1 << 7) #define WM97XX_GPIO_8 (1 << 8) #define WM97XX_GPIO_9 (1 << 9) #define WM97XX_GPIO_10 (1 << 10) #define WM97XX_GPIO_11 (1 << 11) #define WM97XX_GPIO_12 (1 << 12) #define WM97XX_GPIO_13 (1 << 13) #define WM97XX_GPIO_14 (1 << 14) #define WM97XX_GPIO_15 (1 << 15) #define AC97_LINK_FRAME 21 /* time in uS for AC97 link frame */ /*---------------- Return codes from sample reading functions ---------------*/ /* More data is available; call the sample gathering function again */ #define RC_AGAIN 0x00000001 /* The returned sample is valid */ #define RC_VALID 0x00000002 /* The pen is up (the first RC_VALID without RC_PENUP means pen is down) */ #define RC_PENUP 0x00000004 /* The pen is down (RC_VALID implies RC_PENDOWN, but sometimes it is helpful to tell the handler that the pen is down but we don't know yet his coords, so the handler should not sleep or wait for pendown irq) */ #define RC_PENDOWN 0x00000008 /* * The wm97xx driver provides a private API for writing platform-specific * drivers. */ /* The structure used to return arch specific sampled data into */ struct wm97xx_data { int x; int y; int p; }; /* * Codec GPIO status */ enum wm97xx_gpio_status { WM97XX_GPIO_HIGH, WM97XX_GPIO_LOW }; /* * Codec GPIO direction */ enum wm97xx_gpio_dir { WM97XX_GPIO_IN, WM97XX_GPIO_OUT }; /* * Codec GPIO polarity */ enum wm97xx_gpio_pol { WM97XX_GPIO_POL_HIGH, WM97XX_GPIO_POL_LOW }; /* * Codec GPIO sticky */ enum wm97xx_gpio_sticky { WM97XX_GPIO_STICKY, WM97XX_GPIO_NOTSTICKY }; /* * Codec GPIO wake */ enum wm97xx_gpio_wake { WM97XX_GPIO_WAKE, WM97XX_GPIO_NOWAKE }; /* * Digitiser ioctl commands */ #define WM97XX_DIG_START 0x1 #define WM97XX_DIG_STOP 0x2 #define WM97XX_PHY_INIT 0x3 #define WM97XX_AUX_PREPARE 0x4 #define WM97XX_DIG_RESTORE 0x5 struct wm97xx; extern struct wm97xx_codec_drv wm9705_codec; extern struct wm97xx_codec_drv wm9712_codec; extern struct wm97xx_codec_drv wm9713_codec; /* * Codec driver interface - allows mapping to WM9705/12/13 and newer codecs */ struct wm97xx_codec_drv { u16 id; char *name; /* read 1 sample */ int (*poll_sample) (struct wm97xx *, int adcsel, int *sample); /* read X,Y,[P] in poll */ int (*poll_touch) (struct wm97xx *, struct wm97xx_data *); int (*acc_enable) (struct wm97xx *, int enable); void (*phy_init) (struct wm97xx *); void (*dig_enable) (struct wm97xx *, int enable); void (*dig_restore) (struct wm97xx *); void (*aux_prepare) (struct wm97xx *); }; /* Machine specific and accelerated touch operations */ struct wm97xx_mach_ops { /* accelerated touch readback - coords are transmited on AC97 link */ int acc_enabled; void (*acc_pen_up) (struct wm97xx *); int (*acc_pen_down) (struct wm97xx *); int (*acc_startup) (struct wm97xx *); void (*acc_shutdown) (struct wm97xx *); /* interrupt mask control - required for accelerated operation */ void (*irq_enable) (struct wm97xx *, int enable); /* GPIO pin used for accelerated operation */ int irq_gpio; /* pre and post sample - can be used to minimise any analog noise */ void (*pre_sample) (int); /* function to run before sampling */ void (*post_sample) (int); /* function to run after sampling */ }; struct wm97xx { u16 dig[3], id, gpio[6], misc; /* Cached codec registers */ u16 dig_save[3]; /* saved during aux reading */ struct wm97xx_codec_drv *codec; /* attached codec driver*/ struct input_dev *input_dev; /* touchscreen input device */ struct snd_ac97 *ac97; /* ALSA codec access */ struct device *dev; /* ALSA device */ struct platform_device *battery_dev; struct platform_device *touch_dev; struct wm97xx_mach_ops *mach_ops; struct mutex codec_mutex; struct delayed_work ts_reader; /* Used to poll touchscreen */ unsigned long ts_reader_interval; /* Current interval for timer */ unsigned long ts_reader_min_interval; /* Minimum interval */ unsigned int pen_irq; /* Pen IRQ number in use */ struct workqueue_struct *ts_workq; struct work_struct pen_event_work; u16 acc_slot; /* AC97 slot used for acc touch data */ u16 acc_rate; /* acc touch data rate */ unsigned pen_is_down:1; /* Pen is down */ unsigned aux_waiting:1; /* aux measurement waiting */ unsigned pen_probably_down:1; /* used in polling mode */ u16 variant; /* WM97xx chip variant */ u16 suspend_mode; /* PRP in suspend mode */ }; struct wm97xx_batt_pdata { int batt_aux; int temp_aux; int min_voltage; int max_voltage; int batt_div; int batt_mult; int temp_div; int temp_mult; int batt_tech; char *batt_name; }; struct wm97xx_pdata { struct wm97xx_batt_pdata *batt_pdata; /* battery data */ }; /* * Codec GPIO access (not supported on WM9705) * This can be used to set/get codec GPIO and Virtual GPIO status. */ enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio); void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio, enum wm97xx_gpio_status status); void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio, enum wm97xx_gpio_dir dir, enum wm97xx_gpio_pol pol, enum wm97xx_gpio_sticky sticky, enum wm97xx_gpio_wake wake); void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode); /* codec AC97 IO access */ int wm97xx_reg_read(struct wm97xx *wm, u16 reg); void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val); /* aux adc readback */ int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel); /* machine ops */ int wm97xx_register_mach_ops(struct wm97xx *, struct wm97xx_mach_ops *); void wm97xx_unregister_mach_ops(struct wm97xx *); #endif PK ! }�,�� � ks0108.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Filename: ks0108.h * Version: 0.1.0 * Description: ks0108 LCD Controller driver header * * Author: Copyright (C) Miguel Ojeda <ojeda@kernel.org> * Date: 2006-10-31 */ #ifndef _KS0108_H_ #define _KS0108_H_ /* Write a byte to the data port */ extern void ks0108_writedata(unsigned char byte); /* Write a byte to the control port */ extern void ks0108_writecontrol(unsigned char byte); /* Set the controller's current display state (0..1) */ extern void ks0108_displaystate(unsigned char state); /* Set the controller's current startline (0..63) */ extern void ks0108_startline(unsigned char startline); /* Set the controller's current address (0..63) */ extern void ks0108_address(unsigned char address); /* Set the controller's current page (0..7) */ extern void ks0108_page(unsigned char page); /* Is the module inited? */ extern unsigned char ks0108_isinited(void); #endif /* _KS0108_H_ */ PK ! )T(%. . rculist_bl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RCULIST_BL_H #define _LINUX_RCULIST_BL_H /* * RCU-protected bl list version. See include/linux/list_bl.h. */ #include <linux/list_bl.h> #include <linux/rcupdate.h> static inline void hlist_bl_set_first_rcu(struct hlist_bl_head *h, struct hlist_bl_node *n) { LIST_BL_BUG_ON((unsigned long)n & LIST_BL_LOCKMASK); LIST_BL_BUG_ON(((unsigned long)h->first & LIST_BL_LOCKMASK) != LIST_BL_LOCKMASK); rcu_assign_pointer(h->first, (struct hlist_bl_node *)((unsigned long)n | LIST_BL_LOCKMASK)); } static inline struct hlist_bl_node *hlist_bl_first_rcu(struct hlist_bl_head *h) { return (struct hlist_bl_node *) ((unsigned long)rcu_dereference_check(h->first, hlist_bl_is_locked(h)) & ~LIST_BL_LOCKMASK); } /** * hlist_bl_del_rcu - deletes entry from hash list without re-initialization * @n: the element to delete from the hash list. * * Note: hlist_bl_unhashed() on entry does not return true after this, * the entry is in an undefined state. It is useful for RCU based * lockfree traversal. * * In particular, it means that we can not poison the forward * pointers that may still be used for walking the hash list. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_bl_add_head_rcu() * or hlist_bl_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_bl_for_each_entry(). */ static inline void hlist_bl_del_rcu(struct hlist_bl_node *n) { __hlist_bl_del(n); n->pprev = LIST_POISON2; } /** * hlist_bl_add_head_rcu * @n: the element to add to the hash list. * @h: the list to add to. * * Description: * Adds the specified element to the specified hlist_bl, * while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_bl_add_head_rcu() * or hlist_bl_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_bl_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. Regardless of the type of CPU, the * list-traversal primitive must be guarded by rcu_read_lock(). */ static inline void hlist_bl_add_head_rcu(struct hlist_bl_node *n, struct hlist_bl_head *h) { struct hlist_bl_node *first; /* don't need hlist_bl_first_rcu because we're under lock */ first = hlist_bl_first(h); n->next = first; if (first) first->pprev = &n->next; n->pprev = &h->first; /* need _rcu because we can have concurrent lock free readers */ hlist_bl_set_first_rcu(h, n); } /** * hlist_bl_for_each_entry_rcu - iterate over rcu list of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_bl_node to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_bl_node within the struct. * */ #define hlist_bl_for_each_entry_rcu(tpos, pos, head, member) \ for (pos = hlist_bl_first_rcu(head); \ pos && \ ({ tpos = hlist_bl_entry(pos, typeof(*tpos), member); 1; }); \ pos = rcu_dereference_raw(pos->next)) #endif PK ! �)OÕ � of_fdt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for working with the Flattened Device Tree data format * * Copyright 2009 Benjamin Herrenschmidt, IBM Corp * benh@kernel.crashing.org */ #ifndef _LINUX_OF_FDT_H #define _LINUX_OF_FDT_H #include <linux/types.h> #include <linux/init.h> #include <linux/errno.h> /* Definitions used by the flattened device tree */ #define OF_DT_HEADER 0xd00dfeed /* marker */ #ifndef __ASSEMBLY__ #if defined(CONFIG_OF_FLATTREE) struct device_node; /* For scanning an arbitrary device-tree at any time */ extern void *of_fdt_unflatten_tree(const unsigned long *blob, struct device_node *dad, struct device_node **mynodes); /* TBD: Temporary export of fdt globals - remove when code fully merged */ extern int __initdata dt_root_addr_cells; extern int __initdata dt_root_size_cells; extern void *initial_boot_params; extern char __dtb_start[]; extern char __dtb_end[]; /* Other Prototypes */ extern u64 of_flat_dt_translate_address(unsigned long node); extern void of_fdt_limit_memory(int limit); #endif /* CONFIG_OF_FLATTREE */ #ifdef CONFIG_OF_EARLY_FLATTREE /* For scanning the flat device-tree at boot time */ extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname, int depth, void *data), void *data); extern int of_scan_flat_dt_subnodes(unsigned long node, int (*it)(unsigned long node, const char *uname, void *data), void *data); extern int of_get_flat_dt_subnode_by_name(unsigned long node, const char *uname); extern const void *of_get_flat_dt_prop(unsigned long node, const char *name, int *size); extern int of_flat_dt_is_compatible(unsigned long node, const char *name); extern unsigned long of_get_flat_dt_root(void); extern uint32_t of_get_flat_dt_phandle(unsigned long node); extern int early_init_dt_scan_chosen(unsigned long node, const char *uname, int depth, void *data); extern int early_init_dt_scan_memory(unsigned long node, const char *uname, int depth, void *data); extern void early_init_dt_check_for_usable_mem_range(void); extern int early_init_dt_scan_chosen_stdout(void); extern void early_init_fdt_scan_reserved_mem(void); extern void early_init_fdt_reserve_self(void); extern void __init early_init_dt_scan_chosen_arch(unsigned long node); extern void early_init_dt_add_memory_arch(u64 base, u64 size); extern u64 dt_mem_next_cell(int s, const __be32 **cellp); /* Early flat tree scan hooks */ extern int early_init_dt_scan_root(unsigned long node, const char *uname, int depth, void *data); extern bool early_init_dt_scan(void *params); extern bool early_init_dt_verify(void *params); extern void early_init_dt_scan_nodes(void); extern const char *of_flat_dt_get_machine_name(void); extern const void *of_flat_dt_match_machine(const void *default_match, const void * (*get_next_compat)(const char * const**)); /* Other Prototypes */ extern void unflatten_device_tree(void); extern void unflatten_and_copy_device_tree(void); extern void early_init_devtree(void *); extern void early_get_first_memblock_info(void *, phys_addr_t *); #else /* CONFIG_OF_EARLY_FLATTREE */ static inline void early_init_dt_check_for_usable_mem_range(void) {} static inline int early_init_dt_scan_chosen_stdout(void) { return -ENODEV; } static inline void early_init_fdt_scan_reserved_mem(void) {} static inline void early_init_fdt_reserve_self(void) {} static inline const char *of_flat_dt_get_machine_name(void) { return NULL; } static inline void unflatten_device_tree(void) {} static inline void unflatten_and_copy_device_tree(void) {} #endif /* CONFIG_OF_EARLY_FLATTREE */ #endif /* __ASSEMBLY__ */ #endif /* _LINUX_OF_FDT_H */ PK ! $�( � � fault-inject-usercopy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_FAULT_INJECT_USERCOPY_H__ #define __LINUX_FAULT_INJECT_USERCOPY_H__ /* * This header provides a wrapper for injecting failures to user space memory * access functions. */ #include <linux/types.h> #ifdef CONFIG_FAULT_INJECTION_USERCOPY bool should_fail_usercopy(void); #else static inline bool should_fail_usercopy(void) { return false; } #endif /* CONFIG_FAULT_INJECTION_USERCOPY */ #endif /* __LINUX_FAULT_INJECT_USERCOPY_H__ */ PK ! �ժ� � nfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * NFS protocol definitions * * This file contains constants mostly for Version 2 of the protocol, * but also has a couple of NFSv3 bits in (notably the error codes). */ #ifndef _LINUX_NFS_H #define _LINUX_NFS_H #include <linux/sunrpc/msg_prot.h> #include <linux/string.h> #include <linux/crc32.h> #include <uapi/linux/nfs.h> /* * This is the kernel NFS client file handle representation */ #define NFS_MAXFHSIZE 128 struct nfs_fh { unsigned short size; unsigned char data[NFS_MAXFHSIZE]; }; /* * Returns a zero iff the size and data fields match. * Checks only "size" bytes in the data field. */ static inline int nfs_compare_fh(const struct nfs_fh *a, const struct nfs_fh *b) { return a->size != b->size || memcmp(a->data, b->data, a->size) != 0; } static inline void nfs_copy_fh(struct nfs_fh *target, const struct nfs_fh *source) { target->size = source->size; memcpy(target->data, source->data, source->size); } enum nfs3_stable_how { NFS_UNSTABLE = 0, NFS_DATA_SYNC = 1, NFS_FILE_SYNC = 2, /* used by direct.c to mark verf as invalid */ NFS_INVALID_STABLE_HOW = -1 }; /** * nfs_fhandle_hash - calculate the crc32 hash for the filehandle * @fh - pointer to filehandle * * returns a crc32 hash for the filehandle that is compatible with * the one displayed by "wireshark". */ static inline u32 nfs_fhandle_hash(const struct nfs_fh *fh) { return ~crc32_le(0xFFFFFFFF, &fh->data[0], fh->size); } #endif /* _LINUX_NFS_H */ PK ! ���e e ptp_classify.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * PTP 1588 support * * This file implements a BPF that recognizes PTP event messages. * * Copyright (C) 2010 OMICRON electronics GmbH */ #ifndef _PTP_CLASSIFY_H_ #define _PTP_CLASSIFY_H_ #include <linux/ip.h> #include <linux/skbuff.h> #define PTP_CLASS_NONE 0x00 /* not a PTP event message */ #define PTP_CLASS_V1 0x01 /* protocol version 1 */ #define PTP_CLASS_V2 0x02 /* protocol version 2 */ #define PTP_CLASS_VMASK 0x0f /* max protocol version is 15 */ #define PTP_CLASS_IPV4 0x10 /* event in an IPV4 UDP packet */ #define PTP_CLASS_IPV6 0x20 /* event in an IPV6 UDP packet */ #define PTP_CLASS_L2 0x40 /* event in a L2 packet */ #define PTP_CLASS_PMASK 0x70 /* mask for the packet type field */ #define PTP_CLASS_VLAN 0x80 /* event in a VLAN tagged packet */ #define PTP_CLASS_V1_IPV4 (PTP_CLASS_V1 | PTP_CLASS_IPV4) #define PTP_CLASS_V1_IPV6 (PTP_CLASS_V1 | PTP_CLASS_IPV6) /* probably DNE */ #define PTP_CLASS_V2_IPV4 (PTP_CLASS_V2 | PTP_CLASS_IPV4) #define PTP_CLASS_V2_IPV6 (PTP_CLASS_V2 | PTP_CLASS_IPV6) #define PTP_CLASS_V2_L2 (PTP_CLASS_V2 | PTP_CLASS_L2) #define PTP_CLASS_V2_VLAN (PTP_CLASS_V2 | PTP_CLASS_VLAN) #define PTP_CLASS_L4 (PTP_CLASS_IPV4 | PTP_CLASS_IPV6) #define PTP_MSGTYPE_SYNC 0x0 #define PTP_MSGTYPE_DELAY_REQ 0x1 #define PTP_MSGTYPE_PDELAY_REQ 0x2 #define PTP_MSGTYPE_PDELAY_RESP 0x3 #define PTP_EV_PORT 319 #define PTP_GEN_BIT 0x08 /* indicates general message, if set in message type */ #define OFF_PTP_SOURCE_UUID 22 /* PTPv1 only */ #define OFF_PTP_SEQUENCE_ID 30 /* PTP header flag fields */ #define PTP_FLAG_TWOSTEP BIT(1) /* Below defines should actually be removed at some point in time. */ #define IP6_HLEN 40 #define UDP_HLEN 8 #define OFF_IHL 14 #define IPV4_HLEN(data) (((struct iphdr *)(data + OFF_IHL))->ihl << 2) struct clock_identity { u8 id[8]; } __packed; struct port_identity { struct clock_identity clock_identity; __be16 port_number; } __packed; struct ptp_header { u8 tsmt; /* transportSpecific | messageType */ u8 ver; /* reserved | versionPTP */ __be16 message_length; u8 domain_number; u8 reserved1; u8 flag_field[2]; __be64 correction; __be32 reserved2; struct port_identity source_port_identity; __be16 sequence_id; u8 control; u8 log_message_interval; } __packed; #if defined(CONFIG_NET_PTP_CLASSIFY) /** * ptp_classify_raw - classify a PTP packet * @skb: buffer * * Runs a minimal BPF dissector to classify a network packet to * determine the PTP class. In case the skb does not contain any * PTP protocol data, PTP_CLASS_NONE will be returned, otherwise * PTP_CLASS_V1_IPV{4,6}, PTP_CLASS_V2_IPV{4,6} or * PTP_CLASS_V2_{L2,VLAN}, depending on the packet content. */ unsigned int ptp_classify_raw(const struct sk_buff *skb); /** * ptp_parse_header - Get pointer to the PTP v2 header * @skb: packet buffer * @type: type of the packet (see ptp_classify_raw()) * * This function takes care of the VLAN, UDP, IPv4 and IPv6 headers. The length * is checked. * * Note, internally skb_mac_header() is used. Make sure that the @skb is * initialized accordingly. * * Return: Pointer to the ptp v2 header or NULL if not found */ struct ptp_header *ptp_parse_header(struct sk_buff *skb, unsigned int type); /** * ptp_get_msgtype - Extract ptp message type from given header * @hdr: ptp header * @type: type of the packet (see ptp_classify_raw()) * * This function returns the message type for a given ptp header. It takes care * of the different ptp header versions (v1 or v2). * * Return: The message type */ static inline u8 ptp_get_msgtype(const struct ptp_header *hdr, unsigned int type) { u8 msgtype; if (unlikely(type & PTP_CLASS_V1)) { /* msg type is located at the control field for ptp v1 */ msgtype = hdr->control; } else { msgtype = hdr->tsmt & 0x0f; } return msgtype; } /** * ptp_msg_is_sync - Evaluates whether the given skb is a PTP Sync message * @skb: packet buffer * @type: type of the packet (see ptp_classify_raw()) * * This function evaluates whether the given skb is a PTP Sync message. * * Return: true if sync message, false otherwise */ bool ptp_msg_is_sync(struct sk_buff *skb, unsigned int type); void __init ptp_classifier_init(void); #else static inline void ptp_classifier_init(void) { } static inline unsigned int ptp_classify_raw(struct sk_buff *skb) { return PTP_CLASS_NONE; } static inline struct ptp_header *ptp_parse_header(struct sk_buff *skb, unsigned int type) { return NULL; } static inline u8 ptp_get_msgtype(const struct ptp_header *hdr, unsigned int type) { /* The return is meaningless. The stub function would not be * executed since no available header from ptp_parse_header. */ return PTP_MSGTYPE_SYNC; } static inline bool ptp_msg_is_sync(struct sk_buff *skb, unsigned int type) { return false; } #endif #endif /* _PTP_CLASSIFY_H_ */ PK ! mr��) ) static_call.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_STATIC_CALL_H #define _LINUX_STATIC_CALL_H /* * Static call support * * Static calls use code patching to hard-code function pointers into direct * branch instructions. They give the flexibility of function pointers, but * with improved performance. This is especially important for cases where * retpolines would otherwise be used, as retpolines can significantly impact * performance. * * * API overview: * * DECLARE_STATIC_CALL(name, func); * DEFINE_STATIC_CALL(name, func); * DEFINE_STATIC_CALL_NULL(name, typename); * DEFINE_STATIC_CALL_RET0(name, typename); * * __static_call_return0; * * static_call(name)(args...); * static_call_cond(name)(args...); * static_call_update(name, func); * static_call_query(name); * * EXPORT_STATIC_CALL{,_TRAMP}{,_GPL}() * * Usage example: * * # Start with the following functions (with identical prototypes): * int func_a(int arg1, int arg2); * int func_b(int arg1, int arg2); * * # Define a 'my_name' reference, associated with func_a() by default * DEFINE_STATIC_CALL(my_name, func_a); * * # Call func_a() * static_call(my_name)(arg1, arg2); * * # Update 'my_name' to point to func_b() * static_call_update(my_name, &func_b); * * # Call func_b() * static_call(my_name)(arg1, arg2); * * * Implementation details: * * This requires some arch-specific code (CONFIG_HAVE_STATIC_CALL). * Otherwise basic indirect calls are used (with function pointers). * * Each static_call() site calls into a trampoline associated with the name. * The trampoline has a direct branch to the default function. Updates to a * name will modify the trampoline's branch destination. * * If the arch has CONFIG_HAVE_STATIC_CALL_INLINE, then the call sites * themselves will be patched at runtime to call the functions directly, * rather than calling through the trampoline. This requires objtool or a * compiler plugin to detect all the static_call() sites and annotate them * in the .static_call_sites section. * * * Notes on NULL function pointers: * * Static_call()s support NULL functions, with many of the caveats that * regular function pointers have. * * Clearly calling a NULL function pointer is 'BAD', so too for * static_call()s (although when HAVE_STATIC_CALL it might not be immediately * fatal). A NULL static_call can be the result of: * * DECLARE_STATIC_CALL_NULL(my_static_call, void (*)(int)); * * which is equivalent to declaring a NULL function pointer with just a * typename: * * void (*my_func_ptr)(int arg1) = NULL; * * or using static_call_update() with a NULL function. In both cases the * HAVE_STATIC_CALL implementation will patch the trampoline with a RET * instruction, instead of an immediate tail-call JMP. HAVE_STATIC_CALL_INLINE * architectures can patch the trampoline call to a NOP. * * In all cases, any argument evaluation is unconditional. Unlike a regular * conditional function pointer call: * * if (my_func_ptr) * my_func_ptr(arg1) * * where the argument evaludation also depends on the pointer value. * * When calling a static_call that can be NULL, use: * * static_call_cond(name)(arg1); * * which will include the required value tests to avoid NULL-pointer * dereferences. * * To query which function is currently set to be called, use: * * func = static_call_query(name); * * * DEFINE_STATIC_CALL_RET0 / __static_call_return0: * * Just like how DEFINE_STATIC_CALL_NULL() / static_call_cond() optimize the * conditional void function call, DEFINE_STATIC_CALL_RET0 / * __static_call_return0 optimize the do nothing return 0 function. * * This feature is strictly UB per the C standard (since it casts a function * pointer to a different signature) and relies on the architecture ABI to * make things work. In particular it relies on Caller Stack-cleanup and the * whole return register being clobbered for short return values. All normal * CDECL style ABIs conform. * * In particular the x86_64 implementation replaces the 5 byte CALL * instruction at the callsite with a 5 byte clear of the RAX register, * completely eliding any function call overhead. * * Notably argument setup is unconditional. * * * EXPORT_STATIC_CALL() vs EXPORT_STATIC_CALL_TRAMP(): * * The difference is that the _TRAMP variant tries to only export the * trampoline with the result that a module can use static_call{,_cond}() but * not static_call_update(). * */ #include <linux/types.h> #include <linux/cpu.h> #include <linux/static_call_types.h> #ifdef CONFIG_HAVE_STATIC_CALL #include <asm/static_call.h> /* * Either @site or @tramp can be NULL. */ extern void arch_static_call_transform(void *site, void *tramp, void *func, bool tail); #define STATIC_CALL_TRAMP_ADDR(name) &STATIC_CALL_TRAMP(name) #else #define STATIC_CALL_TRAMP_ADDR(name) NULL #endif #define static_call_update(name, func) \ ({ \ typeof(&STATIC_CALL_TRAMP(name)) __F = (func); \ __static_call_update(&STATIC_CALL_KEY(name), \ STATIC_CALL_TRAMP_ADDR(name), __F); \ }) #define static_call_query(name) (READ_ONCE(STATIC_CALL_KEY(name).func)) #ifdef CONFIG_HAVE_STATIC_CALL_INLINE extern bool static_call_initialized; extern int __init static_call_init(void); struct static_call_mod { struct static_call_mod *next; struct module *mod; /* for vmlinux, mod == NULL */ struct static_call_site *sites; }; /* For finding the key associated with a trampoline */ struct static_call_tramp_key { s32 tramp; s32 key; }; extern void __static_call_update(struct static_call_key *key, void *tramp, void *func); extern int static_call_mod_init(struct module *mod); extern int static_call_text_reserved(void *start, void *end); extern long __static_call_return0(void); #define __DEFINE_STATIC_CALL(name, _func, _func_init) \ DECLARE_STATIC_CALL(name, _func); \ struct static_call_key STATIC_CALL_KEY(name) = { \ .func = _func_init, \ .type = 1, \ }; \ ARCH_DEFINE_STATIC_CALL_TRAMP(name, _func_init) #define DEFINE_STATIC_CALL_NULL(name, _func) \ DECLARE_STATIC_CALL(name, _func); \ struct static_call_key STATIC_CALL_KEY(name) = { \ .func = NULL, \ .type = 1, \ }; \ ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) #define static_call_cond(name) (void)__static_call(name) #define EXPORT_STATIC_CALL(name) \ EXPORT_SYMBOL(STATIC_CALL_KEY(name)); \ EXPORT_SYMBOL(STATIC_CALL_TRAMP(name)) #define EXPORT_STATIC_CALL_GPL(name) \ EXPORT_SYMBOL_GPL(STATIC_CALL_KEY(name)); \ EXPORT_SYMBOL_GPL(STATIC_CALL_TRAMP(name)) /* Leave the key unexported, so modules can't change static call targets: */ #define EXPORT_STATIC_CALL_TRAMP(name) \ EXPORT_SYMBOL(STATIC_CALL_TRAMP(name)); \ ARCH_ADD_TRAMP_KEY(name) #define EXPORT_STATIC_CALL_TRAMP_GPL(name) \ EXPORT_SYMBOL_GPL(STATIC_CALL_TRAMP(name)); \ ARCH_ADD_TRAMP_KEY(name) #elif defined(CONFIG_HAVE_STATIC_CALL) #define static_call_initialized 0 static inline int static_call_init(void) { return 0; } #define __DEFINE_STATIC_CALL(name, _func, _func_init) \ DECLARE_STATIC_CALL(name, _func); \ struct static_call_key STATIC_CALL_KEY(name) = { \ .func = _func_init, \ }; \ ARCH_DEFINE_STATIC_CALL_TRAMP(name, _func_init) #define DEFINE_STATIC_CALL_NULL(name, _func) \ DECLARE_STATIC_CALL(name, _func); \ struct static_call_key STATIC_CALL_KEY(name) = { \ .func = NULL, \ }; \ ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) #define static_call_cond(name) (void)__static_call(name) static inline void __static_call_update(struct static_call_key *key, void *tramp, void *func) { cpus_read_lock(); WRITE_ONCE(key->func, func); arch_static_call_transform(NULL, tramp, func, false); cpus_read_unlock(); } static inline int static_call_text_reserved(void *start, void *end) { return 0; } extern long __static_call_return0(void); #define EXPORT_STATIC_CALL(name) \ EXPORT_SYMBOL(STATIC_CALL_KEY(name)); \ EXPORT_SYMBOL(STATIC_CALL_TRAMP(name)) #define EXPORT_STATIC_CALL_GPL(name) \ EXPORT_SYMBOL_GPL(STATIC_CALL_KEY(name)); \ EXPORT_SYMBOL_GPL(STATIC_CALL_TRAMP(name)) /* Leave the key unexported, so modules can't change static call targets: */ #define EXPORT_STATIC_CALL_TRAMP(name) \ EXPORT_SYMBOL(STATIC_CALL_TRAMP(name)) #define EXPORT_STATIC_CALL_TRAMP_GPL(name) \ EXPORT_SYMBOL_GPL(STATIC_CALL_TRAMP(name)) #else /* Generic implementation */ #define static_call_initialized 0 static inline int static_call_init(void) { return 0; } static inline long __static_call_return0(void) { return 0; } #define __DEFINE_STATIC_CALL(name, _func, _func_init) \ DECLARE_STATIC_CALL(name, _func); \ struct static_call_key STATIC_CALL_KEY(name) = { \ .func = _func_init, \ } #define DEFINE_STATIC_CALL_NULL(name, _func) \ DECLARE_STATIC_CALL(name, _func); \ struct static_call_key STATIC_CALL_KEY(name) = { \ .func = NULL, \ } static inline void __static_call_nop(void) { } /* * This horrific hack takes care of two things: * * - it ensures the compiler will only load the function pointer ONCE, * which avoids a reload race. * * - it ensures the argument evaluation is unconditional, similar * to the HAVE_STATIC_CALL variant. * * Sadly current GCC/Clang (10 for both) do not optimize this properly * and will emit an indirect call for the NULL case :-( */ #define __static_call_cond(name) \ ({ \ void *func = READ_ONCE(STATIC_CALL_KEY(name).func); \ if (!func) \ func = &__static_call_nop; \ (typeof(STATIC_CALL_TRAMP(name))*)func; \ }) #define static_call_cond(name) (void)__static_call_cond(name) static inline void __static_call_update(struct static_call_key *key, void *tramp, void *func) { WRITE_ONCE(key->func, func); } static inline int static_call_text_reserved(void *start, void *end) { return 0; } #define EXPORT_STATIC_CALL(name) EXPORT_SYMBOL(STATIC_CALL_KEY(name)) #define EXPORT_STATIC_CALL_GPL(name) EXPORT_SYMBOL_GPL(STATIC_CALL_KEY(name)) #endif /* CONFIG_HAVE_STATIC_CALL */ #define DEFINE_STATIC_CALL(name, _func) \ __DEFINE_STATIC_CALL(name, _func, _func) #define DEFINE_STATIC_CALL_RET0(name, _func) \ __DEFINE_STATIC_CALL(name, _func, __static_call_return0) #endif /* _LINUX_STATIC_CALL_H */ PK ! �:Ky pruss_driver.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * PRU-ICSS sub-system specific definitions * * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/ * Suman Anna <s-anna@ti.com> */ #ifndef _PRUSS_DRIVER_H_ #define _PRUSS_DRIVER_H_ #include <linux/types.h> /* * enum pruss_mem - PRUSS memory range identifiers */ enum pruss_mem { PRUSS_MEM_DRAM0 = 0, PRUSS_MEM_DRAM1, PRUSS_MEM_SHRD_RAM2, PRUSS_MEM_MAX, }; /** * struct pruss_mem_region - PRUSS memory region structure * @va: kernel virtual address of the PRUSS memory region * @pa: physical (bus) address of the PRUSS memory region * @size: size of the PRUSS memory region */ struct pruss_mem_region { void __iomem *va; phys_addr_t pa; size_t size; }; /** * struct pruss - PRUSS parent structure * @dev: pruss device pointer * @cfg_base: base iomap for CFG region * @cfg_regmap: regmap for config region * @mem_regions: data for each of the PRUSS memory regions * @core_clk_mux: clk handle for PRUSS CORE_CLK_MUX * @iep_clk_mux: clk handle for PRUSS IEP_CLK_MUX */ struct pruss { struct device *dev; void __iomem *cfg_base; struct regmap *cfg_regmap; struct pruss_mem_region mem_regions[PRUSS_MEM_MAX]; struct clk *core_clk_mux; struct clk *iep_clk_mux; }; #endif /* _PRUSS_DRIVER_H_ */ PK ! ��-� � mpage.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/mpage.h * * Contains declarations related to preparing and submitting BIOS which contain * multiple pagecache pages. */ /* * (And no, it doesn't do the #ifdef __MPAGE_H thing, and it doesn't do * nested includes. Get it right in the .c file). */ #ifdef CONFIG_BLOCK struct writeback_control; struct readahead_control; void mpage_readahead(struct readahead_control *, get_block_t get_block); int mpage_readpage(struct page *page, get_block_t get_block); int mpage_writepages(struct address_space *mapping, struct writeback_control *wbc, get_block_t get_block); int mpage_writepage(struct page *page, get_block_t *get_block, struct writeback_control *wbc); #endif PK ! _A� lcm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LCM_H #define _LCM_H #include <linux/compiler.h> unsigned long lcm(unsigned long a, unsigned long b) __attribute_const__; unsigned long lcm_not_zero(unsigned long a, unsigned long b) __attribute_const__; #endif /* _LCM_H */ PK ! >?�IXL XL parport.hnu �[��� /* * Any part of this program may be used in documents licensed under * the GNU Free Documentation License, Version 1.1 or any later version * published by the Free Software Foundation. */ #ifndef _PARPORT_H_ #define _PARPORT_H_ #include <linux/jiffies.h> #include <linux/proc_fs.h> #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/irqreturn.h> #include <linux/semaphore.h> #include <linux/device.h> #include <asm/ptrace.h> #include <uapi/linux/parport.h> /* Define this later. */ struct parport; struct pardevice; struct pc_parport_state { unsigned int ctr; unsigned int ecr; }; struct ax_parport_state { unsigned int ctr; unsigned int ecr; unsigned int dcsr; }; /* used by both parport_amiga and parport_mfc3 */ struct amiga_parport_state { unsigned char data; /* ciaa.prb */ unsigned char datadir; /* ciaa.ddrb */ unsigned char status; /* ciab.pra & 7 */ unsigned char statusdir;/* ciab.ddrb & 7 */ }; struct ax88796_parport_state { unsigned char cpr; }; struct ip32_parport_state { unsigned int dcr; unsigned int ecr; }; struct parport_state { union { struct pc_parport_state pc; /* ARC has no state. */ struct ax_parport_state ax; struct amiga_parport_state amiga; struct ax88796_parport_state ax88796; /* Atari has not state. */ struct ip32_parport_state ip32; void *misc; } u; }; struct parport_operations { /* IBM PC-style virtual registers. */ void (*write_data)(struct parport *, unsigned char); unsigned char (*read_data)(struct parport *); void (*write_control)(struct parport *, unsigned char); unsigned char (*read_control)(struct parport *); unsigned char (*frob_control)(struct parport *, unsigned char mask, unsigned char val); unsigned char (*read_status)(struct parport *); /* IRQs. */ void (*enable_irq)(struct parport *); void (*disable_irq)(struct parport *); /* Data direction. */ void (*data_forward) (struct parport *); void (*data_reverse) (struct parport *); /* For core parport code. */ void (*init_state)(struct pardevice *, struct parport_state *); void (*save_state)(struct parport *, struct parport_state *); void (*restore_state)(struct parport *, struct parport_state *); /* Block read/write */ size_t (*epp_write_data) (struct parport *port, const void *buf, size_t len, int flags); size_t (*epp_read_data) (struct parport *port, void *buf, size_t len, int flags); size_t (*epp_write_addr) (struct parport *port, const void *buf, size_t len, int flags); size_t (*epp_read_addr) (struct parport *port, void *buf, size_t len, int flags); size_t (*ecp_write_data) (struct parport *port, const void *buf, size_t len, int flags); size_t (*ecp_read_data) (struct parport *port, void *buf, size_t len, int flags); size_t (*ecp_write_addr) (struct parport *port, const void *buf, size_t len, int flags); size_t (*compat_write_data) (struct parport *port, const void *buf, size_t len, int flags); size_t (*nibble_read_data) (struct parport *port, void *buf, size_t len, int flags); size_t (*byte_read_data) (struct parport *port, void *buf, size_t len, int flags); struct module *owner; }; struct parport_device_info { parport_device_class class; const char *class_name; const char *mfr; const char *model; const char *cmdset; const char *description; }; /* Each device can have two callback functions: * 1) a preemption function, called by the resource manager to request * that the driver relinquish control of the port. The driver should * return zero if it agrees to release the port, and nonzero if it * refuses. Do not call parport_release() - the kernel will do this * implicitly. * * 2) a wake-up function, called by the resource manager to tell drivers * that the port is available to be claimed. If a driver wants to use * the port, it should call parport_claim() here. */ /* A parallel port device */ struct pardevice { const char *name; struct parport *port; int daisy; int (*preempt)(void *); void (*wakeup)(void *); void *private; void (*irq_func)(void *); unsigned int flags; struct pardevice *next; struct pardevice *prev; struct device dev; bool devmodel; struct parport_state *state; /* saved status over preemption */ wait_queue_head_t wait_q; unsigned long int time; unsigned long int timeslice; volatile long int timeout; unsigned long waiting; /* long req'd for set_bit --RR */ struct pardevice *waitprev; struct pardevice *waitnext; void * sysctl_table; }; #define to_pardevice(n) container_of(n, struct pardevice, dev) /* IEEE1284 information */ /* IEEE1284 phases. These are exposed to userland through ppdev IOCTL * PP[GS]ETPHASE, so do not change existing values. */ enum ieee1284_phase { IEEE1284_PH_FWD_DATA, IEEE1284_PH_FWD_IDLE, IEEE1284_PH_TERMINATE, IEEE1284_PH_NEGOTIATION, IEEE1284_PH_HBUSY_DNA, IEEE1284_PH_REV_IDLE, IEEE1284_PH_HBUSY_DAVAIL, IEEE1284_PH_REV_DATA, IEEE1284_PH_ECP_SETUP, IEEE1284_PH_ECP_FWD_TO_REV, IEEE1284_PH_ECP_REV_TO_FWD, IEEE1284_PH_ECP_DIR_UNKNOWN, }; struct ieee1284_info { int mode; volatile enum ieee1284_phase phase; struct semaphore irq; }; /* A parallel port */ struct parport { unsigned long base; /* base address */ unsigned long base_hi; /* base address (hi - ECR) */ unsigned int size; /* IO extent */ const char *name; unsigned int modes; int irq; /* interrupt (or -1 for none) */ int dma; int muxport; /* which muxport (if any) this is */ int portnum; /* which physical parallel port (not mux) */ struct device *dev; /* Physical device associated with IO/DMA. * This may unfortulately be null if the * port has a legacy driver. */ struct device bus_dev; /* to link with the bus */ struct parport *physport; /* If this is a non-default mux parport, i.e. we're a clone of a real physical port, this is a pointer to that port. The locking is only done in the real port. For a clone port, the following structure members are meaningless: devices, cad, muxsel, waithead, waittail, flags, pdir, dev, ieee1284, *_lock. It this is a default mux parport, or there is no mux involved, this points to ourself. */ struct pardevice *devices; struct pardevice *cad; /* port owner */ int daisy; /* currently selected daisy addr */ int muxsel; /* currently selected mux port */ struct pardevice *waithead; struct pardevice *waittail; struct list_head list; struct timer_list timer; unsigned int flags; void *sysctl_table; struct parport_device_info probe_info[5]; /* 0-3 + non-IEEE1284.3 */ struct ieee1284_info ieee1284; struct parport_operations *ops; void *private_data; /* for lowlevel driver */ int number; /* port index - the `n' in `parportn' */ spinlock_t pardevice_lock; spinlock_t waitlist_lock; rwlock_t cad_lock; int spintime; atomic_t ref_count; unsigned long devflags; #define PARPORT_DEVPROC_REGISTERED 0 struct pardevice *proc_device; /* Currently register proc device */ struct list_head full_list; struct parport *slaves[3]; }; #define to_parport_dev(n) container_of(n, struct parport, bus_dev) #define DEFAULT_SPIN_TIME 500 /* us */ struct parport_driver { const char *name; void (*attach) (struct parport *); void (*detach) (struct parport *); void (*match_port)(struct parport *); int (*probe)(struct pardevice *); struct device_driver driver; bool devmodel; struct list_head list; }; #define to_parport_driver(n) container_of(n, struct parport_driver, driver) int parport_bus_init(void); void parport_bus_exit(void); /* parport_register_port registers a new parallel port at the given address (if one does not already exist) and returns a pointer to it. This entails claiming the I/O region, IRQ and DMA. NULL is returned if initialisation fails. */ struct parport *parport_register_port(unsigned long base, int irq, int dma, struct parport_operations *ops); /* Once a registered port is ready for high-level drivers to use, the low-level driver that registered it should announce it. This will call the high-level drivers' attach() functions (after things like determining the IEEE 1284.3 topology of the port and collecting DeviceIDs). */ void parport_announce_port (struct parport *port); /* Unregister a port. */ extern void parport_remove_port(struct parport *port); /* Register a new high-level driver. */ int __must_check __parport_register_driver(struct parport_driver *, struct module *, const char *mod_name); /* * parport_register_driver must be a macro so that KBUILD_MODNAME can * be expanded */ /** * parport_register_driver - register a parallel port device driver * @driver: structure describing the driver * * This can be called by a parallel port device driver in order * to receive notifications about ports being found in the * system, as well as ports no longer available. * * If devmodel is true then the new device model is used * for registration. * * The @driver structure is allocated by the caller and must not be * deallocated until after calling parport_unregister_driver(). * * If using the non device model: * The driver's attach() function may block. The port that * attach() is given will be valid for the duration of the * callback, but if the driver wants to take a copy of the * pointer it must call parport_get_port() to do so. Calling * parport_register_device() on that port will do this for you. * * The driver's detach() function may block. The port that * detach() is given will be valid for the duration of the * callback, but if the driver wants to take a copy of the * pointer it must call parport_get_port() to do so. * * * Returns 0 on success. The non device model will always succeeds. * but the new device model can fail and will return the error code. **/ #define parport_register_driver(driver) \ __parport_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) /* Unregister a high-level driver. */ void parport_unregister_driver(struct parport_driver *); /** * module_parport_driver() - Helper macro for registering a modular parport driver * @__parport_driver: struct parport_driver to be used * * Helper macro for parport drivers which do not do anything special in module * init and exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit(). */ #define module_parport_driver(__parport_driver) \ module_driver(__parport_driver, parport_register_driver, parport_unregister_driver) /* If parport_register_driver doesn't fit your needs, perhaps * parport_find_xxx does. */ extern struct parport *parport_find_number (int); extern struct parport *parport_find_base (unsigned long); /* generic irq handler, if it suits your needs */ extern irqreturn_t parport_irq_handler(int irq, void *dev_id); /* Reference counting for ports. */ extern struct parport *parport_get_port (struct parport *); extern void parport_put_port (struct parport *); void parport_del_port(struct parport *); struct pardev_cb { int (*preempt)(void *); void (*wakeup)(void *); void *private; void (*irq_func)(void *); unsigned int flags; }; /* * parport_register_dev_model declares that a device is connected to a * port, and tells the kernel all it needs to know. */ struct pardevice * parport_register_dev_model(struct parport *port, const char *name, const struct pardev_cb *par_dev_cb, int cnt); /* parport_unregister unlinks a device from the chain. */ extern void parport_unregister_device(struct pardevice *dev); /* parport_claim tries to gain ownership of the port for a particular driver. This may fail (return non-zero) if another driver is busy. If this driver has registered an interrupt handler, it will be enabled. */ extern int parport_claim(struct pardevice *dev); /* parport_claim_or_block is the same, but sleeps if the port cannot be claimed. Return value is 1 if it slept, 0 normally and -errno on error. */ extern int parport_claim_or_block(struct pardevice *dev); /* parport_release reverses a previous parport_claim. This can never fail, though the effects are undefined (except that they are bad) if you didn't previously own the port. Once you have released the port you should make sure that neither your code nor the hardware on the port tries to initiate any communication without first re-claiming the port. If you mess with the port state (enabling ECP for example) you should clean up before releasing the port. */ extern void parport_release(struct pardevice *dev); /** * parport_yield - relinquish a parallel port temporarily * @dev: a device on the parallel port * * This function relinquishes the port if it would be helpful to other * drivers to do so. Afterwards it tries to reclaim the port using * parport_claim(), and the return value is the same as for * parport_claim(). If it fails, the port is left unclaimed and it is * the driver's responsibility to reclaim the port. * * The parport_yield() and parport_yield_blocking() functions are for * marking points in the driver at which other drivers may claim the * port and use their devices. Yielding the port is similar to * releasing it and reclaiming it, but is more efficient because no * action is taken if there are no other devices needing the port. In * fact, nothing is done even if there are other devices waiting but * the current device is still within its "timeslice". The default * timeslice is half a second, but it can be adjusted via the /proc * interface. **/ static __inline__ int parport_yield(struct pardevice *dev) { unsigned long int timeslip = (jiffies - dev->time); if ((dev->port->waithead == NULL) || (timeslip < dev->timeslice)) return 0; parport_release(dev); return parport_claim(dev); } /** * parport_yield_blocking - relinquish a parallel port temporarily * @dev: a device on the parallel port * * This function relinquishes the port if it would be helpful to other * drivers to do so. Afterwards it tries to reclaim the port using * parport_claim_or_block(), and the return value is the same as for * parport_claim_or_block(). **/ static __inline__ int parport_yield_blocking(struct pardevice *dev) { unsigned long int timeslip = (jiffies - dev->time); if ((dev->port->waithead == NULL) || (timeslip < dev->timeslice)) return 0; parport_release(dev); return parport_claim_or_block(dev); } /* Flags used to identify what a device does. */ #define PARPORT_DEV_TRAN 0 /* WARNING !! DEPRECATED !! */ #define PARPORT_DEV_LURK (1<<0) /* WARNING !! DEPRECATED !! */ #define PARPORT_DEV_EXCL (1<<1) /* Need exclusive access. */ #define PARPORT_FLAG_EXCL (1<<1) /* EXCL driver registered. */ /* IEEE1284 functions */ extern void parport_ieee1284_interrupt (void *); extern int parport_negotiate (struct parport *, int mode); extern ssize_t parport_write (struct parport *, const void *buf, size_t len); extern ssize_t parport_read (struct parport *, void *buf, size_t len); #define PARPORT_INACTIVITY_O_NONBLOCK 1 extern long parport_set_timeout (struct pardevice *, long inactivity); extern int parport_wait_event (struct parport *, long timeout); extern int parport_wait_peripheral (struct parport *port, unsigned char mask, unsigned char val); extern int parport_poll_peripheral (struct parport *port, unsigned char mask, unsigned char val, int usec); /* For architectural drivers */ extern size_t parport_ieee1284_write_compat (struct parport *, const void *, size_t, int); extern size_t parport_ieee1284_read_nibble (struct parport *, void *, size_t, int); extern size_t parport_ieee1284_read_byte (struct parport *, void *, size_t, int); extern size_t parport_ieee1284_ecp_read_data (struct parport *, void *, size_t, int); extern size_t parport_ieee1284_ecp_write_data (struct parport *, const void *, size_t, int); extern size_t parport_ieee1284_ecp_write_addr (struct parport *, const void *, size_t, int); extern size_t parport_ieee1284_epp_write_data (struct parport *, const void *, size_t, int); extern size_t parport_ieee1284_epp_read_data (struct parport *, void *, size_t, int); extern size_t parport_ieee1284_epp_write_addr (struct parport *, const void *, size_t, int); extern size_t parport_ieee1284_epp_read_addr (struct parport *, void *, size_t, int); /* IEEE1284.3 functions */ #define daisy_dev_name "Device ID probe" extern int parport_daisy_init (struct parport *port); extern void parport_daisy_fini (struct parport *port); extern struct pardevice *parport_open (int devnum, const char *name); extern void parport_close (struct pardevice *dev); extern ssize_t parport_device_id (int devnum, char *buffer, size_t len); extern void parport_daisy_deselect_all (struct parport *port); extern int parport_daisy_select (struct parport *port, int daisy, int mode); /* Lowlevel drivers _can_ call this support function to handle irqs. */ static inline void parport_generic_irq(struct parport *port) { parport_ieee1284_interrupt (port); read_lock(&port->cad_lock); if (port->cad && port->cad->irq_func) port->cad->irq_func(port->cad->private); read_unlock(&port->cad_lock); } /* Prototypes from parport_procfs */ extern int parport_proc_register(struct parport *pp); extern int parport_proc_unregister(struct parport *pp); extern int parport_device_proc_register(struct pardevice *device); extern int parport_device_proc_unregister(struct pardevice *device); /* If PC hardware is the only type supported, we can optimise a bit. */ #if !defined(CONFIG_PARPORT_NOT_PC) #include <linux/parport_pc.h> #define parport_write_data(p,x) parport_pc_write_data(p,x) #define parport_read_data(p) parport_pc_read_data(p) #define parport_write_control(p,x) parport_pc_write_control(p,x) #define parport_read_control(p) parport_pc_read_control(p) #define parport_frob_control(p,m,v) parport_pc_frob_control(p,m,v) #define parport_read_status(p) parport_pc_read_status(p) #define parport_enable_irq(p) parport_pc_enable_irq(p) #define parport_disable_irq(p) parport_pc_disable_irq(p) #define parport_data_forward(p) parport_pc_data_forward(p) #define parport_data_reverse(p) parport_pc_data_reverse(p) #else /* !CONFIG_PARPORT_NOT_PC */ /* Generic operations vector through the dispatch table. */ #define parport_write_data(p,x) (p)->ops->write_data(p,x) #define parport_read_data(p) (p)->ops->read_data(p) #define parport_write_control(p,x) (p)->ops->write_control(p,x) #define parport_read_control(p) (p)->ops->read_control(p) #define parport_frob_control(p,m,v) (p)->ops->frob_control(p,m,v) #define parport_read_status(p) (p)->ops->read_status(p) #define parport_enable_irq(p) (p)->ops->enable_irq(p) #define parport_disable_irq(p) (p)->ops->disable_irq(p) #define parport_data_forward(p) (p)->ops->data_forward(p) #define parport_data_reverse(p) (p)->ops->data_reverse(p) #endif /* !CONFIG_PARPORT_NOT_PC */ extern unsigned long parport_default_timeslice; extern int parport_default_spintime; #endif /* _PARPORT_H_ */ PK ! �#o � � of_platform.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ #ifndef _LINUX_OF_PLATFORM_H #define _LINUX_OF_PLATFORM_H /* * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. * <benh@kernel.crashing.org> */ #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/pm.h> #include <linux/of_device.h> #include <linux/platform_device.h> /** * struct of_dev_auxdata - lookup table entry for device names & platform_data * @compatible: compatible value of node to match against node * @phys_addr: Start address of registers to match against node * @name: Name to assign for matching nodes * @platform_data: platform_data to assign for matching nodes * * This lookup table allows the caller of of_platform_populate() to override * the names of devices when creating devices from the device tree. The table * should be terminated with an empty entry. It also allows the platform_data * pointer to be set. * * The reason for this functionality is that some Linux infrastructure uses * the device name to look up a specific device, but the Linux-specific names * are not encoded into the device tree, so the kernel needs to provide specific * values. * * Note: Using an auxdata lookup table should be considered a last resort when * converting a platform to use the DT. Normally the automatically generated * device name will not matter, and drivers should obtain data from the device * node instead of from an anonymous platform_data pointer. */ struct of_dev_auxdata { char *compatible; resource_size_t phys_addr; char *name; void *platform_data; }; /* Macro to simplify populating a lookup table */ #define OF_DEV_AUXDATA(_compat,_phys,_name,_pdata) \ { .compatible = _compat, .phys_addr = _phys, .name = _name, \ .platform_data = _pdata } extern const struct of_device_id of_default_bus_match_table[]; /* Platform drivers register/unregister */ extern struct platform_device *of_device_alloc(struct device_node *np, const char *bus_id, struct device *parent); #ifdef CONFIG_OF extern struct platform_device *of_find_device_by_node(struct device_node *np); #else static inline struct platform_device *of_find_device_by_node(struct device_node *np) { return NULL; } #endif /* Platform devices and busses creation */ extern struct platform_device *of_platform_device_create(struct device_node *np, const char *bus_id, struct device *parent); extern int of_platform_device_destroy(struct device *dev, void *data); extern int of_platform_bus_probe(struct device_node *root, const struct of_device_id *matches, struct device *parent); #ifdef CONFIG_OF_ADDRESS extern int of_platform_populate(struct device_node *root, const struct of_device_id *matches, const struct of_dev_auxdata *lookup, struct device *parent); extern int of_platform_default_populate(struct device_node *root, const struct of_dev_auxdata *lookup, struct device *parent); extern void of_platform_depopulate(struct device *parent); extern int devm_of_platform_populate(struct device *dev); extern void devm_of_platform_depopulate(struct device *dev); #else static inline int of_platform_populate(struct device_node *root, const struct of_device_id *matches, const struct of_dev_auxdata *lookup, struct device *parent) { return -ENODEV; } static inline int of_platform_default_populate(struct device_node *root, const struct of_dev_auxdata *lookup, struct device *parent) { return -ENODEV; } static inline void of_platform_depopulate(struct device *parent) { } static inline int devm_of_platform_populate(struct device *dev) { return -ENODEV; } static inline void devm_of_platform_depopulate(struct device *dev) { } #endif #if defined(CONFIG_OF_DYNAMIC) && defined(CONFIG_OF_ADDRESS) extern void of_platform_register_reconfig_notifier(void); #else static inline void of_platform_register_reconfig_notifier(void) { } #endif #endif /* _LINUX_OF_PLATFORM_H */ PK ! � ϝ � gpio/machine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_GPIO_MACHINE_H #define __LINUX_GPIO_MACHINE_H #include <linux/types.h> #include <linux/list.h> enum gpio_lookup_flags { GPIO_ACTIVE_HIGH = (0 << 0), GPIO_ACTIVE_LOW = (1 << 0), GPIO_OPEN_DRAIN = (1 << 1), GPIO_OPEN_SOURCE = (1 << 2), GPIO_PERSISTENT = (0 << 3), GPIO_TRANSITORY = (1 << 3), GPIO_PULL_UP = (1 << 4), GPIO_PULL_DOWN = (1 << 5), GPIO_LOOKUP_FLAGS_DEFAULT = GPIO_ACTIVE_HIGH | GPIO_PERSISTENT, }; /** * struct gpiod_lookup - lookup table * @key: either the name of the chip the GPIO belongs to, or the GPIO line name * Note that GPIO line names are not guaranteed to be globally unique, * so this will use the first match found! * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO, or * U16_MAX to indicate that @key is a GPIO line name * @con_id: name of the GPIO from the device's point of view * @idx: index of the GPIO in case several GPIOs share the same name * @flags: bitmask of gpio_lookup_flags GPIO_* values * * gpiod_lookup is a lookup table for associating GPIOs to specific devices and * functions using platform data. */ struct gpiod_lookup { const char *key; u16 chip_hwnum; const char *con_id; unsigned int idx; unsigned long flags; }; struct gpiod_lookup_table { struct list_head list; const char *dev_id; struct gpiod_lookup table[]; }; /** * struct gpiod_hog - GPIO line hog table * @chip_label: name of the chip the GPIO belongs to * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO * @line_name: consumer name for the hogged line * @lflags: bitmask of gpio_lookup_flags GPIO_* values * @dflags: GPIO flags used to specify the direction and value */ struct gpiod_hog { struct list_head list; const char *chip_label; u16 chip_hwnum; const char *line_name; unsigned long lflags; int dflags; }; /* * Simple definition of a single GPIO under a con_id */ #define GPIO_LOOKUP(_key, _chip_hwnum, _con_id, _flags) \ GPIO_LOOKUP_IDX(_key, _chip_hwnum, _con_id, 0, _flags) /* * Use this macro if you need to have several GPIOs under the same con_id. * Each GPIO needs to use a different index and can be accessed using * gpiod_get_index() */ #define GPIO_LOOKUP_IDX(_key, _chip_hwnum, _con_id, _idx, _flags) \ (struct gpiod_lookup) { \ .key = _key, \ .chip_hwnum = _chip_hwnum, \ .con_id = _con_id, \ .idx = _idx, \ .flags = _flags, \ } /* * Simple definition of a single GPIO hog in an array. */ #define GPIO_HOG(_chip_label, _chip_hwnum, _line_name, _lflags, _dflags) \ (struct gpiod_hog) { \ .chip_label = _chip_label, \ .chip_hwnum = _chip_hwnum, \ .line_name = _line_name, \ .lflags = _lflags, \ .dflags = _dflags, \ } #ifdef CONFIG_GPIOLIB void gpiod_add_lookup_table(struct gpiod_lookup_table *table); void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n); void gpiod_remove_lookup_table(struct gpiod_lookup_table *table); void gpiod_add_hogs(struct gpiod_hog *hogs); #else /* ! CONFIG_GPIOLIB */ static inline void gpiod_add_lookup_table(struct gpiod_lookup_table *table) {} static inline void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) {} static inline void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) {} static inline void gpiod_add_hogs(struct gpiod_hog *hogs) {} #endif /* CONFIG_GPIOLIB */ #endif /* __LINUX_GPIO_MACHINE_H */ PK ! 0���_ �_ gpio/driver.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_GPIO_DRIVER_H #define __LINUX_GPIO_DRIVER_H #include <linux/device.h> #include <linux/types.h> #include <linux/irq.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> #include <linux/lockdep.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinconf-generic.h> struct gpio_desc; struct of_phandle_args; struct device_node; struct seq_file; struct gpio_device; struct module; enum gpiod_flags; enum gpio_lookup_flags; struct gpio_chip; #define GPIO_LINE_DIRECTION_IN 1 #define GPIO_LINE_DIRECTION_OUT 0 /** * struct gpio_irq_chip - GPIO interrupt controller */ struct gpio_irq_chip { /** * @chip: * * GPIO IRQ chip implementation, provided by GPIO driver. */ struct irq_chip *chip; /** * @domain: * * Interrupt translation domain; responsible for mapping between GPIO * hwirq number and Linux IRQ number. */ struct irq_domain *domain; /** * @domain_ops: * * Table of interrupt domain operations for this IRQ chip. */ const struct irq_domain_ops *domain_ops; #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY /** * @fwnode: * * Firmware node corresponding to this gpiochip/irqchip, necessary * for hierarchical irqdomain support. */ struct fwnode_handle *fwnode; /** * @parent_domain: * * If non-NULL, will be set as the parent of this GPIO interrupt * controller's IRQ domain to establish a hierarchical interrupt * domain. The presence of this will activate the hierarchical * interrupt support. */ struct irq_domain *parent_domain; /** * @child_to_parent_hwirq: * * This callback translates a child hardware IRQ offset to a parent * hardware IRQ offset on a hierarchical interrupt chip. The child * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the * ngpio field of struct gpio_chip) and the corresponding parent * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by * the driver. The driver can calculate this from an offset or using * a lookup table or whatever method is best for this chip. Return * 0 on successful translation in the driver. * * If some ranges of hardware IRQs do not have a corresponding parent * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and * @need_valid_mask to make these GPIO lines unavailable for * translation. */ int (*child_to_parent_hwirq)(struct gpio_chip *gc, unsigned int child_hwirq, unsigned int child_type, unsigned int *parent_hwirq, unsigned int *parent_type); /** * @populate_parent_alloc_arg : * * This optional callback allocates and populates the specific struct * for the parent's IRQ domain. If this is not specified, then * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell * variant named &gpiochip_populate_parent_fwspec_fourcell is also * available. */ void *(*populate_parent_alloc_arg)(struct gpio_chip *gc, unsigned int parent_hwirq, unsigned int parent_type); /** * @child_offset_to_irq: * * This optional callback is used to translate the child's GPIO line * offset on the GPIO chip to an IRQ number for the GPIO to_irq() * callback. If this is not specified, then a default callback will be * provided that returns the line offset. */ unsigned int (*child_offset_to_irq)(struct gpio_chip *gc, unsigned int pin); /** * @child_irq_domain_ops: * * The IRQ domain operations that will be used for this GPIO IRQ * chip. If no operations are provided, then default callbacks will * be populated to setup the IRQ hierarchy. Some drivers need to * supply their own translate function. */ struct irq_domain_ops child_irq_domain_ops; #endif /** * @handler: * * The IRQ handler to use (often a predefined IRQ core function) for * GPIO IRQs, provided by GPIO driver. */ irq_flow_handler_t handler; /** * @default_type: * * Default IRQ triggering type applied during GPIO driver * initialization, provided by GPIO driver. */ unsigned int default_type; /** * @lock_key: * * Per GPIO IRQ chip lockdep class for IRQ lock. */ struct lock_class_key *lock_key; /** * @request_key: * * Per GPIO IRQ chip lockdep class for IRQ request. */ struct lock_class_key *request_key; /** * @parent_handler: * * The interrupt handler for the GPIO chip's parent interrupts, may be * NULL if the parent interrupts are nested rather than cascaded. */ irq_flow_handler_t parent_handler; /** * @parent_handler_data: * @parent_handler_data_array: * * Data associated, and passed to, the handler for the parent * interrupt. Can either be a single pointer if @per_parent_data * is false, or an array of @num_parents pointers otherwise. If * @per_parent_data is true, @parent_handler_data_array cannot be * NULL. */ union { void *parent_handler_data; void **parent_handler_data_array; }; /** * @num_parents: * * The number of interrupt parents of a GPIO chip. */ unsigned int num_parents; /** * @parents: * * A list of interrupt parents of a GPIO chip. This is owned by the * driver, so the core will only reference this list, not modify it. */ unsigned int *parents; /** * @map: * * A list of interrupt parents for each line of a GPIO chip. */ unsigned int *map; /** * @threaded: * * True if set the interrupt handling uses nested threads. */ bool threaded; /** * @per_parent_data: * * True if parent_handler_data_array describes a @num_parents * sized array to be used as parent data. */ bool per_parent_data; /** * @init_hw: optional routine to initialize hardware before * an IRQ chip will be added. This is quite useful when * a particular driver wants to clear IRQ related registers * in order to avoid undesired events. */ int (*init_hw)(struct gpio_chip *gc); /** * @init_valid_mask: optional routine to initialize @valid_mask, to be * used if not all GPIO lines are valid interrupts. Sometimes some * lines just cannot fire interrupts, and this routine, when defined, * is passed a bitmap in "valid_mask" and it will have ngpios * bits from 0..(ngpios-1) set to "1" as in valid. The callback can * then directly set some bits to "0" if they cannot be used for * interrupts. */ void (*init_valid_mask)(struct gpio_chip *gc, unsigned long *valid_mask, unsigned int ngpios); /** * @initialized: * * Flag to track GPIO chip irq member's initialization. * This flag will make sure GPIO chip irq members are not used * before they are initialized. */ bool initialized; /** * @valid_mask: * * If not %NULL, holds bitmask of GPIOs which are valid to be included * in IRQ domain of the chip. */ unsigned long *valid_mask; /** * @first: * * Required for static IRQ allocation. If set, irq_domain_add_simple() * will allocate and map all IRQs during initialization. */ unsigned int first; /** * @irq_enable: * * Store old irq_chip irq_enable callback */ void (*irq_enable)(struct irq_data *data); /** * @irq_disable: * * Store old irq_chip irq_disable callback */ void (*irq_disable)(struct irq_data *data); /** * @irq_unmask: * * Store old irq_chip irq_unmask callback */ void (*irq_unmask)(struct irq_data *data); /** * @irq_mask: * * Store old irq_chip irq_mask callback */ void (*irq_mask)(struct irq_data *data); }; /** * struct gpio_chip - abstract a GPIO controller * @label: a functional name for the GPIO device, such as a part * number or the name of the SoC IP-block implementing it. * @gpiodev: the internal state holder, opaque struct * @parent: optional parent device providing the GPIOs * @owner: helps prevent removal of modules exporting active GPIOs * @request: optional hook for chip-specific activation, such as * enabling module power and clock; may sleep * @free: optional hook for chip-specific deactivation, such as * disabling module power and clock; may sleep * @get_direction: returns direction for signal "offset", 0=out, 1=in, * (same as GPIO_LINE_DIRECTION_OUT / GPIO_LINE_DIRECTION_IN), * or negative error. It is recommended to always implement this * function, even on input-only or output-only gpio chips. * @direction_input: configures signal "offset" as input, or returns error * This can be omitted on input-only or output-only gpio chips. * @direction_output: configures signal "offset" as output, or returns error * This can be omitted on input-only or output-only gpio chips. * @get: returns value for signal "offset", 0=low, 1=high, or negative error * @get_multiple: reads values for multiple signals defined by "mask" and * stores them in "bits", returns 0 on success or negative error * @set: assigns output value for signal "offset" * @set_multiple: assigns output values for multiple signals defined by "mask" * @set_config: optional hook for all kinds of settings. Uses the same * packed config format as generic pinconf. * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; * implementation may not sleep * @dbg_show: optional routine to show contents in debugfs; default code * will be used when this is omitted, but custom code can show extra * state (such as pullup/pulldown configuration). * @init_valid_mask: optional routine to initialize @valid_mask, to be used if * not all GPIOs are valid. * @add_pin_ranges: optional routine to initialize pin ranges, to be used when * requires special mapping of the pins that provides GPIO functionality. * It is called after adding GPIO chip and before adding IRQ chip. * @base: identifies the first GPIO number handled by this chip; * or, if negative during registration, requests dynamic ID allocation. * DEPRECATION: providing anything non-negative and nailing the base * offset of GPIO chips is deprecated. Please pass -1 as base to * let gpiolib select the chip base in all possible cases. We want to * get rid of the static GPIO number space in the long run. * @ngpio: the number of GPIOs handled by this controller; the last GPIO * handled is (base + ngpio - 1). * @offset: when multiple gpio chips belong to the same device this * can be used as offset within the device so friendly names can * be properly assigned. * @names: if set, must be an array of strings to use as alternative * names for the GPIOs in this chip. Any entry in the array * may be NULL if there is no alias for the GPIO, however the * array must be @ngpio entries long. A name can include a single printk * format specifier for an unsigned int. It is substituted by the actual * number of the gpio. * @can_sleep: flag must be set iff get()/set() methods sleep, as they * must while accessing GPIO expander chips over I2C or SPI. This * implies that if the chip supports IRQs, these IRQs need to be threaded * as the chip access may sleep when e.g. reading out the IRQ status * registers. * @read_reg: reader function for generic GPIO * @write_reg: writer function for generic GPIO * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing * line 0, bit 30 is line 1 ... bit 0 is line 31) this is set to true by the * generic GPIO core. It is for internal housekeeping only. * @reg_dat: data (in) register for generic GPIO * @reg_set: output set register (out=high) for generic GPIO * @reg_clr: output clear register (out=low) for generic GPIO * @reg_dir_out: direction out setting register for generic GPIO * @reg_dir_in: direction in setting register for generic GPIO * @bgpio_dir_unreadable: indicates that the direction register(s) cannot * be read and we need to rely on out internal state tracking. * @bgpio_bits: number of register bits used for a generic GPIO i.e. * <register width> * 8 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep * shadowed and real data registers writes together. * @bgpio_data: shadowed data register for generic GPIO to clear/set bits * safely. * @bgpio_dir: shadowed direction register for generic GPIO to clear/set * direction safely. A "1" in this word means the line is set as * output. * * A gpio_chip can help platforms abstract various sources of GPIOs so * they can all be accessed through a common programming interface. * Example sources would be SOC controllers, FPGAs, multifunction * chips, dedicated GPIO expanders, and so on. * * Each chip controls a number of signals, identified in method calls * by "offset" values in the range 0..(@ngpio - 1). When those signals * are referenced through calls like gpio_get_value(gpio), the offset * is calculated by subtracting @base from the gpio number. */ struct gpio_chip { const char *label; struct gpio_device *gpiodev; struct device *parent; struct module *owner; int (*request)(struct gpio_chip *gc, unsigned int offset); void (*free)(struct gpio_chip *gc, unsigned int offset); int (*get_direction)(struct gpio_chip *gc, unsigned int offset); int (*direction_input)(struct gpio_chip *gc, unsigned int offset); int (*direction_output)(struct gpio_chip *gc, unsigned int offset, int value); int (*get)(struct gpio_chip *gc, unsigned int offset); int (*get_multiple)(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits); void (*set)(struct gpio_chip *gc, unsigned int offset, int value); void (*set_multiple)(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits); int (*set_config)(struct gpio_chip *gc, unsigned int offset, unsigned long config); int (*to_irq)(struct gpio_chip *gc, unsigned int offset); void (*dbg_show)(struct seq_file *s, struct gpio_chip *gc); int (*init_valid_mask)(struct gpio_chip *gc, unsigned long *valid_mask, unsigned int ngpios); int (*add_pin_ranges)(struct gpio_chip *gc); int base; u16 ngpio; u16 offset; const char *const *names; bool can_sleep; #if IS_ENABLED(CONFIG_GPIO_GENERIC) unsigned long (*read_reg)(void __iomem *reg); void (*write_reg)(void __iomem *reg, unsigned long data); bool be_bits; void __iomem *reg_dat; void __iomem *reg_set; void __iomem *reg_clr; void __iomem *reg_dir_out; void __iomem *reg_dir_in; bool bgpio_dir_unreadable; int bgpio_bits; raw_spinlock_t bgpio_lock; unsigned long bgpio_data; unsigned long bgpio_dir; #endif /* CONFIG_GPIO_GENERIC */ #ifdef CONFIG_GPIOLIB_IRQCHIP /* * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib * to handle IRQs for most practical cases. */ /** * @irq: * * Integrates interrupt chip functionality with the GPIO chip. Can be * used to handle IRQs for most practical cases. */ struct gpio_irq_chip irq; #endif /* CONFIG_GPIOLIB_IRQCHIP */ /** * @valid_mask: * * If not %NULL, holds bitmask of GPIOs which are valid to be used * from the chip. */ unsigned long *valid_mask; #if defined(CONFIG_OF_GPIO) /* * If CONFIG_OF_GPIO is enabled, then all GPIO controllers described in * the device tree automatically may have an OF translation */ /** * @of_node: * * Pointer to a device tree node representing this GPIO controller. */ struct device_node *of_node; /** * @of_gpio_n_cells: * * Number of cells used to form the GPIO specifier. */ unsigned int of_gpio_n_cells; /** * @of_xlate: * * Callback to translate a device tree GPIO specifier into a chip- * relative GPIO number and flags. */ int (*of_xlate)(struct gpio_chip *gc, const struct of_phandle_args *gpiospec, u32 *flags); /** * @of_gpio_ranges_fallback: * * Optional hook for the case that no gpio-ranges property is defined * within the device tree node "np" (usually DT before introduction * of gpio-ranges). So this callback is helpful to provide the * necessary backward compatibility for the pin ranges. */ int (*of_gpio_ranges_fallback)(struct gpio_chip *gc, struct device_node *np); #endif /* CONFIG_OF_GPIO */ }; extern const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset); /** * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range * @chip: the chip to query * @i: loop variable * @base: first GPIO in the range * @size: amount of GPIOs to check starting from @base * @label: label of current GPIO */ #define for_each_requested_gpio_in_range(chip, i, base, size, label) \ for (i = 0; i < size; i++) \ if ((label = gpiochip_is_requested(chip, base + i)) == NULL) {} else /* Iterates over all requested GPIO of the given @chip */ #define for_each_requested_gpio(chip, i, label) \ for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label) /* add/remove chips */ extern int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, struct lock_class_key *lock_key, struct lock_class_key *request_key); /** * gpiochip_add_data() - register a gpio_chip * @gc: the chip to register, with gc->base initialized * @data: driver-private data associated with this chip * * Context: potentially before irqs will work * * When gpiochip_add_data() is called very early during boot, so that GPIOs * can be freely used, the gc->parent device must be registered before * the gpio framework's arch_initcall(). Otherwise sysfs initialization * for GPIOs will fail rudely. * * gpiochip_add_data() must only be called after gpiolib initialization, * i.e. after core_initcall(). * * If gc->base is negative, this requests dynamic assignment of * a range of valid GPIOs. * * Returns: * A negative errno if the chip can't be registered, such as because the * gc->base is invalid or already associated with a different chip. * Otherwise it returns zero as a success code. */ #ifdef CONFIG_LOCKDEP #define gpiochip_add_data(gc, data) ({ \ static struct lock_class_key lock_key; \ static struct lock_class_key request_key; \ gpiochip_add_data_with_key(gc, data, &lock_key, \ &request_key); \ }) #define devm_gpiochip_add_data(dev, gc, data) ({ \ static struct lock_class_key lock_key; \ static struct lock_class_key request_key; \ devm_gpiochip_add_data_with_key(dev, gc, data, &lock_key, \ &request_key); \ }) #else #define gpiochip_add_data(gc, data) gpiochip_add_data_with_key(gc, data, NULL, NULL) #define devm_gpiochip_add_data(dev, gc, data) \ devm_gpiochip_add_data_with_key(dev, gc, data, NULL, NULL) #endif /* CONFIG_LOCKDEP */ static inline int gpiochip_add(struct gpio_chip *gc) { return gpiochip_add_data(gc, NULL); } extern void gpiochip_remove(struct gpio_chip *gc); extern int devm_gpiochip_add_data_with_key(struct device *dev, struct gpio_chip *gc, void *data, struct lock_class_key *lock_key, struct lock_class_key *request_key); extern struct gpio_chip *gpiochip_find(void *data, int (*match)(struct gpio_chip *gc, void *data)); bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset); int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset); void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset); void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset); void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset); /* Line status inquiry for drivers */ bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset); bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset); /* Sleep persistence inquiry for drivers */ bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset); bool gpiochip_line_is_valid(const struct gpio_chip *gc, unsigned int offset); /* get driver data */ void *gpiochip_get_data(struct gpio_chip *gc); struct bgpio_pdata { const char *label; int base; int ngpio; }; #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, unsigned int parent_hwirq, unsigned int parent_type); void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, unsigned int parent_hwirq, unsigned int parent_type); #else static inline void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, unsigned int parent_hwirq, unsigned int parent_type) { return NULL; } static inline void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, unsigned int parent_hwirq, unsigned int parent_type) { return NULL; } #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ int bgpio_init(struct gpio_chip *gc, struct device *dev, unsigned long sz, void __iomem *dat, void __iomem *set, void __iomem *clr, void __iomem *dirout, void __iomem *dirin, unsigned long flags); #define BGPIOF_BIG_ENDIAN BIT(0) #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ #define BGPIOF_NO_SET_ON_INPUT BIT(6) int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq); void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq); int gpiochip_irq_domain_activate(struct irq_domain *domain, struct irq_data *data, bool reserve); void gpiochip_irq_domain_deactivate(struct irq_domain *domain, struct irq_data *data); bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, unsigned int offset); #ifdef CONFIG_GPIOLIB_IRQCHIP int gpiochip_irqchip_add_domain(struct gpio_chip *gc, struct irq_domain *domain); #else static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc, struct irq_domain *domain) { WARN_ON(1); return -EINVAL; } #endif int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset); void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset); int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, unsigned long config); /** * struct gpio_pin_range - pin range controlled by a gpio chip * @node: list for maintaining set of pin ranges, used internally * @pctldev: pinctrl device which handles corresponding pins * @range: actual range of pins controlled by a gpio controller */ struct gpio_pin_range { struct list_head node; struct pinctrl_dev *pctldev; struct pinctrl_gpio_range range; }; #ifdef CONFIG_PINCTRL int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, unsigned int gpio_offset, unsigned int pin_offset, unsigned int npins); int gpiochip_add_pingroup_range(struct gpio_chip *gc, struct pinctrl_dev *pctldev, unsigned int gpio_offset, const char *pin_group); void gpiochip_remove_pin_ranges(struct gpio_chip *gc); #else /* ! CONFIG_PINCTRL */ static inline int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, unsigned int gpio_offset, unsigned int pin_offset, unsigned int npins) { return 0; } static inline int gpiochip_add_pingroup_range(struct gpio_chip *gc, struct pinctrl_dev *pctldev, unsigned int gpio_offset, const char *pin_group) { return 0; } static inline void gpiochip_remove_pin_ranges(struct gpio_chip *gc) { } #endif /* CONFIG_PINCTRL */ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, unsigned int hwnum, const char *label, enum gpio_lookup_flags lflags, enum gpiod_flags dflags); void gpiochip_free_own_desc(struct gpio_desc *desc); #ifdef CONFIG_GPIOLIB /* lock/unlock as IRQ */ int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset); void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset); struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); #else /* CONFIG_GPIOLIB */ static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(1); return ERR_PTR(-ENODEV); } static inline int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) { WARN_ON(1); return -EINVAL; } static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) { WARN_ON(1); } #endif /* CONFIG_GPIOLIB */ #endif /* __LINUX_GPIO_DRIVER_H */ PK ! "��7 gpio/regmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LINUX_GPIO_REGMAP_H #define _LINUX_GPIO_REGMAP_H struct device; struct fwnode_handle; struct gpio_regmap; struct irq_domain; struct regmap; #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1)) #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) /** * struct gpio_regmap_config - Description of a generic regmap gpio_chip. * @parent: The parent device * @regmap: The regmap used to access the registers * given, the name of the device is used * @fwnode: (Optional) The firmware node. * If not given, the fwnode of the parent is used. * @label: (Optional) Descriptive name for GPIO controller. * If not given, the name of the device is used. * @ngpio: Number of GPIOs * @names: (Optional) Array of names for gpios * @reg_dat_base: (Optional) (in) register base address * @reg_set_base: (Optional) set register base address * @reg_clr_base: (Optional) clear register base address * @reg_dir_in_base: (Optional) in setting register base address * @reg_dir_out_base: (Optional) out setting register base address * @reg_stride: (Optional) May be set if the registers (of the * same type, dat, set, etc) are not consecutive. * @ngpio_per_reg: Number of GPIOs per register * @irq_domain: (Optional) IRQ domain if the controller is * interrupt-capable * @reg_mask_xlate: (Optional) Translates base address and GPIO * offset to a register/bitmask pair. If not * given the default gpio_regmap_simple_xlate() * is used. * @drvdata: (Optional) Pointer to driver specific data which is * not used by gpio-remap but is provided "as is" to the * driver callback(s). * * The ->reg_mask_xlate translates a given base address and GPIO offset to * register and mask pair. The base address is one of the given register * base addresses in this structure. * * Although all register base addresses are marked as optional, there are * several rules: * 1. if you only have @reg_dat_base set, then it is input-only * 2. if you only have @reg_set_base set, then it is output-only * 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then * you have to set both @reg_dat_base and @reg_set_base * 4. if you have @reg_set_base set, you may also set @reg_clr_base to have * two different registers for setting and clearing the output. This is * also valid for the output-only case. * 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really * hardware which has redundant registers? * * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO * which forces the address to the value 0. */ struct gpio_regmap_config { struct device *parent; struct regmap *regmap; struct fwnode_handle *fwnode; const char *label; int ngpio; const char *const *names; unsigned int reg_dat_base; unsigned int reg_set_base; unsigned int reg_clr_base; unsigned int reg_dir_in_base; unsigned int reg_dir_out_base; int reg_stride; int ngpio_per_reg; struct irq_domain *irq_domain; int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base, unsigned int offset, unsigned int *reg, unsigned int *mask); void *drvdata; }; struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config); void gpio_regmap_unregister(struct gpio_regmap *gpio); struct gpio_regmap *devm_gpio_regmap_register(struct device *dev, const struct gpio_regmap_config *config); void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio); #endif /* _LINUX_GPIO_REGMAP_H */ PK ! �dsU� � gpio/gpio-reg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef GPIO_REG_H #define GPIO_REG_H struct device; struct irq_domain; struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg, int base, int num, const char *label, u32 direction, u32 def_out, const char *const *names, struct irq_domain *irqdom, const int *irqs); int gpio_reg_resume(struct gpio_chip *gc); #endif /* GPIO_REG_H */ PK ! ~��� � gpio/aspeed.hnu �[��� #ifndef __GPIO_ASPEED_H #define __GPIO_ASPEED_H struct aspeed_gpio_copro_ops { int (*request_access)(void *data); int (*release_access)(void *data); }; int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc, u16 *vreg_offset, u16 *dreg_offset, u8 *bit); int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc); int aspeed_gpio_copro_set_ops(const struct aspeed_gpio_copro_ops *ops, void *data); #endif /* __GPIO_ASPEED_H */ PK ! ��c��Q �Q gpio/consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_GPIO_CONSUMER_H #define __LINUX_GPIO_CONSUMER_H #include <linux/bits.h> #include <linux/bug.h> #include <linux/compiler_types.h> #include <linux/err.h> struct device; struct gpio_desc; struct gpio_array; /** * struct gpio_descs - Struct containing an array of descriptors that can be * obtained using gpiod_get_array() * * @info: Pointer to the opaque gpio_array structure * @ndescs: Number of held descriptors * @desc: Array of pointers to GPIO descriptors */ struct gpio_descs { struct gpio_array *info; unsigned int ndescs; struct gpio_desc *desc[]; }; #define GPIOD_FLAGS_BIT_DIR_SET BIT(0) #define GPIOD_FLAGS_BIT_DIR_OUT BIT(1) #define GPIOD_FLAGS_BIT_DIR_VAL BIT(2) #define GPIOD_FLAGS_BIT_OPEN_DRAIN BIT(3) #define GPIOD_FLAGS_BIT_NONEXCLUSIVE BIT(4) /** * enum gpiod_flags - Optional flags that can be passed to one of gpiod_* to * configure direction and output value. These values * cannot be OR'd. * * @GPIOD_ASIS: Don't change anything * @GPIOD_IN: Set lines to input mode * @GPIOD_OUT_LOW: Set lines to output and drive them low * @GPIOD_OUT_HIGH: Set lines to output and drive them high * @GPIOD_OUT_LOW_OPEN_DRAIN: Set lines to open-drain output and drive them low * @GPIOD_OUT_HIGH_OPEN_DRAIN: Set lines to open-drain output and drive them high */ enum gpiod_flags { GPIOD_ASIS = 0, GPIOD_IN = GPIOD_FLAGS_BIT_DIR_SET, GPIOD_OUT_LOW = GPIOD_FLAGS_BIT_DIR_SET | GPIOD_FLAGS_BIT_DIR_OUT, GPIOD_OUT_HIGH = GPIOD_FLAGS_BIT_DIR_SET | GPIOD_FLAGS_BIT_DIR_OUT | GPIOD_FLAGS_BIT_DIR_VAL, GPIOD_OUT_LOW_OPEN_DRAIN = GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_OPEN_DRAIN, GPIOD_OUT_HIGH_OPEN_DRAIN = GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_OPEN_DRAIN, }; #ifdef CONFIG_GPIOLIB /* Return the number of GPIOs associated with a device / function */ int gpiod_count(struct device *dev, const char *con_id); /* Acquire and dispose GPIOs */ struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, enum gpiod_flags flags); struct gpio_desc *__must_check gpiod_get_index(struct device *dev, const char *con_id, unsigned int idx, enum gpiod_flags flags); struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, const char *con_id, enum gpiod_flags flags); struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, const char *con_id, unsigned int index, enum gpiod_flags flags); struct gpio_descs *__must_check gpiod_get_array(struct device *dev, const char *con_id, enum gpiod_flags flags); struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, const char *con_id, enum gpiod_flags flags); void gpiod_put(struct gpio_desc *desc); void gpiod_put_array(struct gpio_descs *descs); struct gpio_desc *__must_check devm_gpiod_get(struct device *dev, const char *con_id, enum gpiod_flags flags); struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, const char *con_id, unsigned int idx, enum gpiod_flags flags); struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev, const char *con_id, enum gpiod_flags flags); struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev, const char *con_id, unsigned int index, enum gpiod_flags flags); struct gpio_descs *__must_check devm_gpiod_get_array(struct device *dev, const char *con_id, enum gpiod_flags flags); struct gpio_descs *__must_check devm_gpiod_get_array_optional(struct device *dev, const char *con_id, enum gpiod_flags flags); void devm_gpiod_put(struct device *dev, struct gpio_desc *desc); void devm_gpiod_unhinge(struct device *dev, struct gpio_desc *desc); void devm_gpiod_put_array(struct device *dev, struct gpio_descs *descs); int gpiod_get_direction(struct gpio_desc *desc); int gpiod_direction_input(struct gpio_desc *desc); int gpiod_direction_output(struct gpio_desc *desc, int value); int gpiod_direction_output_raw(struct gpio_desc *desc, int value); /* Value get/set from non-sleeping context */ int gpiod_get_value(const struct gpio_desc *desc); int gpiod_get_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); void gpiod_set_value(struct gpio_desc *desc, int value); int gpiod_set_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); int gpiod_get_raw_value(const struct gpio_desc *desc); int gpiod_get_raw_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); void gpiod_set_raw_value(struct gpio_desc *desc, int value); int gpiod_set_raw_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); /* Value get/set from sleeping context */ int gpiod_get_value_cansleep(const struct gpio_desc *desc); int gpiod_get_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); void gpiod_set_value_cansleep(struct gpio_desc *desc, int value); int gpiod_set_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc); int gpiod_get_raw_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value); int gpiod_set_raw_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap); int gpiod_set_config(struct gpio_desc *desc, unsigned long config); int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce); int gpiod_set_transitory(struct gpio_desc *desc, bool transitory); void gpiod_toggle_active_low(struct gpio_desc *desc); int gpiod_is_active_low(const struct gpio_desc *desc); int gpiod_cansleep(const struct gpio_desc *desc); int gpiod_to_irq(const struct gpio_desc *desc); int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name); /* Convert between the old gpio_ and new gpiod_ interfaces */ struct gpio_desc *gpio_to_desc(unsigned gpio); int desc_to_gpio(const struct gpio_desc *desc); /* Child properties interface */ struct fwnode_handle; struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, const char *propname, int index, enum gpiod_flags dflags, const char *label); struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, const char *con_id, int index, enum gpiod_flags flags, const char *label); struct gpio_desc *devm_fwnode_gpiod_get_index(struct device *dev, struct fwnode_handle *child, const char *con_id, int index, enum gpiod_flags flags, const char *label); #else /* CONFIG_GPIOLIB */ #include <linux/kernel.h> static inline int gpiod_count(struct device *dev, const char *con_id) { return 0; } static inline struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, enum gpiod_flags flags) { return ERR_PTR(-ENOSYS); } static inline struct gpio_desc *__must_check gpiod_get_index(struct device *dev, const char *con_id, unsigned int idx, enum gpiod_flags flags) { return ERR_PTR(-ENOSYS); } static inline struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, const char *con_id, enum gpiod_flags flags) { return NULL; } static inline struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, const char *con_id, unsigned int index, enum gpiod_flags flags) { return NULL; } static inline struct gpio_descs *__must_check gpiod_get_array(struct device *dev, const char *con_id, enum gpiod_flags flags) { return ERR_PTR(-ENOSYS); } static inline struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, const char *con_id, enum gpiod_flags flags) { return NULL; } static inline void gpiod_put(struct gpio_desc *desc) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(desc); } static inline void devm_gpiod_unhinge(struct device *dev, struct gpio_desc *desc) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(desc); } static inline void gpiod_put_array(struct gpio_descs *descs) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(descs); } static inline struct gpio_desc *__must_check devm_gpiod_get(struct device *dev, const char *con_id, enum gpiod_flags flags) { return ERR_PTR(-ENOSYS); } static inline struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev, const char *con_id, unsigned int idx, enum gpiod_flags flags) { return ERR_PTR(-ENOSYS); } static inline struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev, const char *con_id, enum gpiod_flags flags) { return NULL; } static inline struct gpio_desc *__must_check devm_gpiod_get_index_optional(struct device *dev, const char *con_id, unsigned int index, enum gpiod_flags flags) { return NULL; } static inline struct gpio_descs *__must_check devm_gpiod_get_array(struct device *dev, const char *con_id, enum gpiod_flags flags) { return ERR_PTR(-ENOSYS); } static inline struct gpio_descs *__must_check devm_gpiod_get_array_optional(struct device *dev, const char *con_id, enum gpiod_flags flags) { return NULL; } static inline void devm_gpiod_put(struct device *dev, struct gpio_desc *desc) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(desc); } static inline void devm_gpiod_put_array(struct device *dev, struct gpio_descs *descs) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(descs); } static inline int gpiod_get_direction(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline int gpiod_direction_input(struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline int gpiod_direction_output(struct gpio_desc *desc, int value) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline int gpiod_direction_output_raw(struct gpio_desc *desc, int value) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline int gpiod_get_value(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return 0; } static inline int gpiod_get_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline void gpiod_set_value(struct gpio_desc *desc, int value) { /* GPIO can never have been requested */ WARN_ON(desc); } static inline int gpiod_set_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline int gpiod_get_raw_value(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return 0; } static inline int gpiod_get_raw_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline void gpiod_set_raw_value(struct gpio_desc *desc, int value) { /* GPIO can never have been requested */ WARN_ON(desc); } static inline int gpiod_set_raw_array_value(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline int gpiod_get_value_cansleep(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return 0; } static inline int gpiod_get_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) { /* GPIO can never have been requested */ WARN_ON(desc); } static inline int gpiod_set_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return 0; } static inline int gpiod_get_raw_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) { /* GPIO can never have been requested */ WARN_ON(desc); } static inline int gpiod_set_raw_array_value_cansleep(unsigned int array_size, struct gpio_desc **desc_array, struct gpio_array *array_info, unsigned long *value_bitmap) { /* GPIO can never have been requested */ WARN_ON(desc_array); return 0; } static inline int gpiod_set_config(struct gpio_desc *desc, unsigned long config) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) { /* GPIO can never have been requested */ WARN_ON(desc); return -ENOSYS; } static inline void gpiod_toggle_active_low(struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); } static inline int gpiod_is_active_low(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return 0; } static inline int gpiod_cansleep(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return 0; } static inline int gpiod_to_irq(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return -EINVAL; } static inline int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) { /* GPIO can never have been requested */ WARN_ON(desc); return -EINVAL; } static inline struct gpio_desc *gpio_to_desc(unsigned gpio) { return NULL; } static inline int desc_to_gpio(const struct gpio_desc *desc) { /* GPIO can never have been requested */ WARN_ON(desc); return -EINVAL; } /* Child properties interface */ struct fwnode_handle; static inline struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, const char *propname, int index, enum gpiod_flags dflags, const char *label) { return ERR_PTR(-ENOSYS); } static inline struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, const char *con_id, int index, enum gpiod_flags flags, const char *label) { return ERR_PTR(-ENOSYS); } static inline struct gpio_desc *devm_fwnode_gpiod_get_index(struct device *dev, struct fwnode_handle *fwnode, const char *con_id, int index, enum gpiod_flags flags, const char *label) { return ERR_PTR(-ENOSYS); } #endif /* CONFIG_GPIOLIB */ static inline struct gpio_desc *devm_fwnode_gpiod_get(struct device *dev, struct fwnode_handle *fwnode, const char *con_id, enum gpiod_flags flags, const char *label) { return devm_fwnode_gpiod_get_index(dev, fwnode, con_id, 0, flags, label); } static inline struct gpio_desc *devm_fwnode_get_index_gpiod_from_child(struct device *dev, const char *con_id, int index, struct fwnode_handle *child, enum gpiod_flags flags, const char *label) { return devm_fwnode_gpiod_get_index(dev, child, con_id, index, flags, label); } static inline struct gpio_desc *devm_fwnode_get_gpiod_from_child(struct device *dev, const char *con_id, struct fwnode_handle *child, enum gpiod_flags flags, const char *label) { return devm_fwnode_gpiod_get_index(dev, child, con_id, 0, flags, label); } #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_OF_GPIO) struct device_node; struct gpio_desc *gpiod_get_from_of_node(const struct device_node *node, const char *propname, int index, enum gpiod_flags dflags, const char *label); #else /* CONFIG_GPIOLIB && CONFIG_OF_GPIO */ struct device_node; static inline struct gpio_desc *gpiod_get_from_of_node(const struct device_node *node, const char *propname, int index, enum gpiod_flags dflags, const char *label) { return ERR_PTR(-ENOSYS); } #endif /* CONFIG_GPIOLIB && CONFIG_OF_GPIO */ #ifdef CONFIG_GPIOLIB struct device_node; struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev, const struct device_node *node, const char *propname, int index, enum gpiod_flags dflags, const char *label); #else /* CONFIG_GPIOLIB */ struct device_node; static inline struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev, const struct device_node *node, const char *propname, int index, enum gpiod_flags dflags, const char *label) { return ERR_PTR(-ENOSYS); } #endif /* CONFIG_GPIOLIB */ struct acpi_gpio_params { unsigned int crs_entry_index; unsigned int line_index; bool active_low; }; struct acpi_gpio_mapping { const char *name; const struct acpi_gpio_params *data; unsigned int size; /* Ignore IoRestriction field */ #define ACPI_GPIO_QUIRK_NO_IO_RESTRICTION BIT(0) /* * When ACPI GPIO mapping table is in use the index parameter inside it * refers to the GPIO resource in _CRS method. That index has no * distinction of actual type of the resource. When consumer wants to * get GpioIo type explicitly, this quirk may be used. */ #define ACPI_GPIO_QUIRK_ONLY_GPIOIO BIT(1) /* Use given pin as an absolute GPIO number in the system */ #define ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER BIT(2) unsigned int quirks; }; struct acpi_device; #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI) int acpi_dev_add_driver_gpios(struct acpi_device *adev, const struct acpi_gpio_mapping *gpios); void acpi_dev_remove_driver_gpios(struct acpi_device *adev); int devm_acpi_dev_add_driver_gpios(struct device *dev, const struct acpi_gpio_mapping *gpios); void devm_acpi_dev_remove_driver_gpios(struct device *dev); struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label); #else /* CONFIG_GPIOLIB && CONFIG_ACPI */ static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev, const struct acpi_gpio_mapping *gpios) { return -ENXIO; } static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev) {} static inline int devm_acpi_dev_add_driver_gpios(struct device *dev, const struct acpi_gpio_mapping *gpios) { return -ENXIO; } static inline void devm_acpi_dev_remove_driver_gpios(struct device *dev) {} #endif /* CONFIG_GPIOLIB && CONFIG_ACPI */ #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) int gpiod_export(struct gpio_desc *desc, bool direction_may_change); int gpiod_export_link(struct device *dev, const char *name, struct gpio_desc *desc); void gpiod_unexport(struct gpio_desc *desc); #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ static inline int gpiod_export(struct gpio_desc *desc, bool direction_may_change) { return -ENOSYS; } static inline int gpiod_export_link(struct device *dev, const char *name, struct gpio_desc *desc) { return -ENOSYS; } static inline void gpiod_unexport(struct gpio_desc *desc) { } #endif /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ #endif PK ! �n� � nfsacl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * File: linux/nfsacl.h * * (C) 2003 Andreas Gruenbacher <agruen@suse.de> */ #ifndef __LINUX_NFSACL_H #define __LINUX_NFSACL_H #include <linux/posix_acl.h> #include <linux/sunrpc/xdr.h> #include <uapi/linux/nfsacl.h> /* Maximum number of ACL entries over NFS */ #define NFS_ACL_MAX_ENTRIES 1024 #define NFSACL_MAXWORDS (2*(2+3*NFS_ACL_MAX_ENTRIES)) #define NFSACL_MAXPAGES ((2*(8+12*NFS_ACL_MAX_ENTRIES) + PAGE_SIZE-1) \ >> PAGE_SHIFT) #define NFS_ACL_MAX_ENTRIES_INLINE (5) #define NFS_ACL_INLINE_BUFSIZE ((2*(2+3*NFS_ACL_MAX_ENTRIES_INLINE)) << 2) static inline unsigned int nfsacl_size(struct posix_acl *acl_access, struct posix_acl *acl_default) { unsigned int w = 16; w += max(acl_access ? (int)acl_access->a_count : 3, 4) * 12; if (acl_default) w += max((int)acl_default->a_count, 4) * 12; return w; } extern int nfsacl_encode(struct xdr_buf *buf, unsigned int base, struct inode *inode, struct posix_acl *acl, int encode_entries, int typeflag); extern int nfsacl_decode(struct xdr_buf *buf, unsigned int base, unsigned int *aclcnt, struct posix_acl **pacl); extern bool nfs_stream_decode_acl(struct xdr_stream *xdr, unsigned int *aclcnt, struct posix_acl **pacl); extern bool nfs_stream_encode_acl(struct xdr_stream *xdr, struct inode *inode, struct posix_acl *acl, int encode_entries, int typeflag); #endif /* __LINUX_NFSACL_H */ PK ! w��! ! kobj_map.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * kobj_map.h */ #ifndef _KOBJ_MAP_H_ #define _KOBJ_MAP_H_ #include <linux/mutex.h> typedef struct kobject *kobj_probe_t(dev_t, int *, void *); struct kobj_map; int kobj_map(struct kobj_map *, dev_t, unsigned long, struct module *, kobj_probe_t *, int (*)(dev_t, void *), void *); void kobj_unmap(struct kobj_map *, dev_t, unsigned long); struct kobject *kobj_lookup(struct kobj_map *, dev_t, int *); struct kobj_map *kobj_map_init(kobj_probe_t *, struct mutex *); #endif /* _KOBJ_MAP_H_ */ PK ! �٘�� � sungem_phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SUNGEM_PHY_H__ #define __SUNGEM_PHY_H__ struct mii_phy; /* Operations supported by any kind of PHY */ struct mii_phy_ops { int (*init)(struct mii_phy *phy); int (*suspend)(struct mii_phy *phy); int (*setup_aneg)(struct mii_phy *phy, u32 advertise); int (*setup_forced)(struct mii_phy *phy, int speed, int fd); int (*poll_link)(struct mii_phy *phy); int (*read_link)(struct mii_phy *phy); int (*enable_fiber)(struct mii_phy *phy, int autoneg); }; /* Structure used to statically define an mii/gii based PHY */ struct mii_phy_def { u32 phy_id; /* Concatenated ID1 << 16 | ID2 */ u32 phy_id_mask; /* Significant bits */ u32 features; /* Ethtool SUPPORTED_* defines */ int magic_aneg; /* Autoneg does all speed test for us */ const char* name; const struct mii_phy_ops* ops; }; enum { BCM54XX_COPPER, BCM54XX_FIBER, BCM54XX_GBIC, BCM54XX_SGMII, BCM54XX_UNKNOWN, }; /* An instance of a PHY, partially borrowed from mii_if_info */ struct mii_phy { struct mii_phy_def* def; u32 advertising; int mii_id; /* 1: autoneg enabled, 0: disabled */ int autoneg; /* forced speed & duplex (no autoneg) * partner speed & duplex & pause (autoneg) */ int speed; int duplex; int pause; /* Provided by host chip */ struct net_device *dev; int (*mdio_read) (struct net_device *dev, int mii_id, int reg); void (*mdio_write) (struct net_device *dev, int mii_id, int reg, int val); void *platform_data; }; /* Pass in a struct mii_phy with dev, mdio_read and mdio_write * filled, the remaining fields will be filled on return */ extern int sungem_phy_probe(struct mii_phy *phy, int mii_id); /* MII definitions missing from mii.h */ #define BMCR_SPD2 0x0040 /* Gigabit enable (bcm54xx) */ #define LPA_PAUSE 0x0400 /* More PHY registers (model specific) */ /* MII BCM5201 MULTIPHY interrupt register */ #define MII_BCM5201_INTERRUPT 0x1A #define MII_BCM5201_INTERRUPT_INTENABLE 0x4000 #define MII_BCM5201_AUXMODE2 0x1B #define MII_BCM5201_AUXMODE2_LOWPOWER 0x0008 #define MII_BCM5201_MULTIPHY 0x1E /* MII BCM5201 MULTIPHY register bits */ #define MII_BCM5201_MULTIPHY_SERIALMODE 0x0002 #define MII_BCM5201_MULTIPHY_SUPERISOLATE 0x0008 /* MII BCM5221 Additional registers */ #define MII_BCM5221_TEST 0x1f #define MII_BCM5221_TEST_ENABLE_SHADOWS 0x0080 #define MII_BCM5221_SHDOW_AUX_STAT2 0x1b #define MII_BCM5221_SHDOW_AUX_STAT2_APD 0x0020 #define MII_BCM5221_SHDOW_AUX_MODE4 0x1a #define MII_BCM5221_SHDOW_AUX_MODE4_IDDQMODE 0x0001 #define MII_BCM5221_SHDOW_AUX_MODE4_CLKLOPWR 0x0004 /* MII BCM5241 Additional registers */ #define MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR 0x0008 /* MII BCM5400 1000-BASET Control register */ #define MII_BCM5400_GB_CONTROL 0x09 #define MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP 0x0200 /* MII BCM5400 AUXCONTROL register */ #define MII_BCM5400_AUXCONTROL 0x18 #define MII_BCM5400_AUXCONTROL_PWR10BASET 0x0004 /* MII BCM5400 AUXSTATUS register */ #define MII_BCM5400_AUXSTATUS 0x19 #define MII_BCM5400_AUXSTATUS_LINKMODE_MASK 0x0700 #define MII_BCM5400_AUXSTATUS_LINKMODE_SHIFT 8 /* 1000BT control (Marvell & BCM54xx at least) */ #define MII_1000BASETCONTROL 0x09 #define MII_1000BASETCONTROL_FULLDUPLEXCAP 0x0200 #define MII_1000BASETCONTROL_HALFDUPLEXCAP 0x0100 /* Marvell 88E1011 PHY control */ #define MII_M1011_PHY_SPEC_CONTROL 0x10 #define MII_M1011_PHY_SPEC_CONTROL_MANUAL_MDIX 0x20 #define MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX 0x40 /* Marvell 88E1011 PHY status */ #define MII_M1011_PHY_SPEC_STATUS 0x11 #define MII_M1011_PHY_SPEC_STATUS_1000 0x8000 #define MII_M1011_PHY_SPEC_STATUS_100 0x4000 #define MII_M1011_PHY_SPEC_STATUS_SPD_MASK 0xc000 #define MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX 0x2000 #define MII_M1011_PHY_SPEC_STATUS_RESOLVED 0x0800 #define MII_M1011_PHY_SPEC_STATUS_TX_PAUSE 0x0008 #define MII_M1011_PHY_SPEC_STATUS_RX_PAUSE 0x0004 #endif /* __SUNGEM_PHY_H__ */ PK ! �GA- - umh.hnu �[��� #ifndef __LINUX_UMH_H__ #define __LINUX_UMH_H__ #include <linux/gfp.h> #include <linux/stddef.h> #include <linux/errno.h> #include <linux/compiler.h> #include <linux/workqueue.h> #include <linux/sysctl.h> struct cred; struct file; #define UMH_NO_WAIT 0 /* don't wait at all */ #define UMH_WAIT_EXEC 1 /* wait for the exec, but not the process */ #define UMH_WAIT_PROC 2 /* wait for the process to complete */ #define UMH_KILLABLE 4 /* wait for EXEC/PROC killable */ struct subprocess_info { struct work_struct work; struct completion *complete; const char *path; char **argv; char **envp; int wait; int retval; int (*init)(struct subprocess_info *info, struct cred *new); void (*cleanup)(struct subprocess_info *info); void *data; } __randomize_layout; extern int call_usermodehelper(const char *path, char **argv, char **envp, int wait); extern struct subprocess_info * call_usermodehelper_setup(const char *path, char **argv, char **envp, gfp_t gfp_mask, int (*init)(struct subprocess_info *info, struct cred *new), void (*cleanup)(struct subprocess_info *), void *data); extern int call_usermodehelper_exec(struct subprocess_info *info, int wait); extern struct ctl_table usermodehelper_table[]; enum umh_disable_depth { UMH_ENABLED = 0, UMH_FREEZING, UMH_DISABLED, }; extern int __usermodehelper_disable(enum umh_disable_depth depth); extern void __usermodehelper_set_disable_depth(enum umh_disable_depth depth); static inline int usermodehelper_disable(void) { return __usermodehelper_disable(UMH_DISABLED); } static inline void usermodehelper_enable(void) { __usermodehelper_set_disable_depth(UMH_ENABLED); } extern int usermodehelper_read_trylock(void); extern long usermodehelper_read_lock_wait(long timeout); extern void usermodehelper_read_unlock(void); #endif /* __LINUX_UMH_H__ */ PK ! ~A��2 2 cred.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Credentials management - see Documentation/security/credentials.rst * * Copyright (C) 2008 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_CRED_H #define _LINUX_CRED_H #include <linux/capability.h> #include <linux/init.h> #include <linux/key.h> #include <linux/atomic.h> #include <linux/uidgid.h> #include <linux/sched.h> #include <linux/sched/user.h> struct cred; struct inode; struct lsmblob; /* * COW Supplementary groups list */ struct group_info { atomic_t usage; int ngroups; kgid_t gid[]; } __randomize_layout; /** * get_group_info - Get a reference to a group info structure * @group_info: The group info to reference * * This gets a reference to a set of supplementary groups. * * If the caller is accessing a task's credentials, they must hold the RCU read * lock when reading. */ static inline struct group_info *get_group_info(struct group_info *gi) { atomic_inc(&gi->usage); return gi; } /** * put_group_info - Release a reference to a group info structure * @group_info: The group info to release */ #define put_group_info(group_info) \ do { \ if (atomic_dec_and_test(&(group_info)->usage)) \ groups_free(group_info); \ } while (0) #ifdef CONFIG_MULTIUSER extern struct group_info *groups_alloc(int); extern void groups_free(struct group_info *); extern int in_group_p(kgid_t); extern int in_egroup_p(kgid_t); extern int groups_search(const struct group_info *, kgid_t); extern int set_current_groups(struct group_info *); extern void set_groups(struct cred *, struct group_info *); extern bool may_setgroups(void); extern void groups_sort(struct group_info *); #else static inline void groups_free(struct group_info *group_info) { } static inline int in_group_p(kgid_t grp) { return 1; } static inline int in_egroup_p(kgid_t grp) { return 1; } static inline int groups_search(const struct group_info *group_info, kgid_t grp) { return 1; } #endif /* * The security context of a task * * The parts of the context break down into two categories: * * (1) The objective context of a task. These parts are used when some other * task is attempting to affect this one. * * (2) The subjective context. These details are used when the task is acting * upon another object, be that a file, a task, a key or whatever. * * Note that some members of this structure belong to both categories - the * LSM security pointer for instance. * * A task has two security pointers. task->real_cred points to the objective * context that defines that task's actual details. The objective part of this * context is used whenever that task is acted upon. * * task->cred points to the subjective context that defines the details of how * that task is going to act upon another object. This may be overridden * temporarily to point to another security context, but normally points to the * same context as task->real_cred. */ struct cred { atomic_long_t usage; #ifdef CONFIG_DEBUG_CREDENTIALS atomic_t subscribers; /* number of processes subscribed */ void *put_addr; unsigned magic; #define CRED_MAGIC 0x43736564 #define CRED_MAGIC_DEAD 0x44656144 #endif kuid_t uid; /* real UID of the task */ kgid_t gid; /* real GID of the task */ kuid_t suid; /* saved UID of the task */ kgid_t sgid; /* saved GID of the task */ kuid_t euid; /* effective UID of the task */ kgid_t egid; /* effective GID of the task */ kuid_t fsuid; /* UID for VFS ops */ kgid_t fsgid; /* GID for VFS ops */ unsigned securebits; /* SUID-less security management */ kernel_cap_t cap_inheritable; /* caps our children can inherit */ kernel_cap_t cap_permitted; /* caps we're permitted */ kernel_cap_t cap_effective; /* caps we can actually use */ kernel_cap_t cap_bset; /* capability bounding set */ kernel_cap_t cap_ambient; /* Ambient capability set */ #ifdef CONFIG_KEYS unsigned char jit_keyring; /* default keyring to attach requested * keys to */ struct key *session_keyring; /* keyring inherited over fork */ struct key *process_keyring; /* keyring private to this process */ struct key *thread_keyring; /* keyring private to this thread */ struct key *request_key_auth; /* assumed request_key authority */ #endif #ifdef CONFIG_SECURITY void *security; /* LSM security */ #endif struct user_struct *user; /* real user ID subscription */ struct user_namespace *user_ns; /* user_ns the caps and keyrings are relative to. */ struct ucounts *ucounts; struct group_info *group_info; /* supplementary groups for euid/fsgid */ /* RCU deletion */ union { int non_rcu; /* Can we skip RCU deletion? */ struct rcu_head rcu; /* RCU deletion hook */ }; } __randomize_layout; extern void __put_cred(struct cred *); extern void exit_creds(struct task_struct *); extern int copy_creds(struct task_struct *, unsigned long); extern const struct cred *get_task_cred(struct task_struct *); extern struct cred *cred_alloc_blank(void); extern struct cred *prepare_creds(void); extern struct cred *prepare_exec_creds(void); extern int commit_creds(struct cred *); extern void abort_creds(struct cred *); extern const struct cred *override_creds(const struct cred *); extern void revert_creds(const struct cred *); extern struct cred *prepare_kernel_cred(struct task_struct *); extern int change_create_files_as(struct cred *, struct inode *); extern int set_security_override(struct cred *, struct lsmblob *); extern int set_security_override_from_ctx(struct cred *, const char *); extern int set_create_files_as(struct cred *, struct inode *); extern int cred_fscmp(const struct cred *, const struct cred *); extern void __init cred_init(void); extern int set_cred_ucounts(struct cred *); /* * check for validity of credentials */ #ifdef CONFIG_DEBUG_CREDENTIALS extern void __invalid_creds(const struct cred *, const char *, unsigned); extern void __validate_process_creds(struct task_struct *, const char *, unsigned); extern bool creds_are_invalid(const struct cred *cred); static inline void __validate_creds(const struct cred *cred, const char *file, unsigned line) { if (unlikely(creds_are_invalid(cred))) __invalid_creds(cred, file, line); } #define validate_creds(cred) \ do { \ __validate_creds((cred), __FILE__, __LINE__); \ } while(0) #define validate_process_creds() \ do { \ __validate_process_creds(current, __FILE__, __LINE__); \ } while(0) extern void validate_creds_for_do_exit(struct task_struct *); #else static inline void validate_creds(const struct cred *cred) { } static inline void validate_creds_for_do_exit(struct task_struct *tsk) { } static inline void validate_process_creds(void) { } #endif static inline bool cap_ambient_invariant_ok(const struct cred *cred) { return cap_issubset(cred->cap_ambient, cap_intersect(cred->cap_permitted, cred->cap_inheritable)); } /** * get_new_cred - Get a reference on a new set of credentials * @cred: The new credentials to reference * * Get a reference on the specified set of new credentials. The caller must * release the reference. */ static inline struct cred *get_new_cred(struct cred *cred) { atomic_long_inc(&cred->usage); return cred; } /** * get_cred - Get a reference on a set of credentials * @cred: The credentials to reference * * Get a reference on the specified set of credentials. The caller must * release the reference. If %NULL is passed, it is returned with no action. * * This is used to deal with a committed set of credentials. Although the * pointer is const, this will temporarily discard the const and increment the * usage count. The purpose of this is to attempt to catch at compile time the * accidental alteration of a set of credentials that should be considered * immutable. */ static inline const struct cred *get_cred(const struct cred *cred) { struct cred *nonconst_cred = (struct cred *) cred; if (!cred) return cred; validate_creds(cred); nonconst_cred->non_rcu = 0; return get_new_cred(nonconst_cred); } static inline const struct cred *get_cred_rcu(const struct cred *cred) { struct cred *nonconst_cred = (struct cred *) cred; if (!cred) return NULL; if (!atomic_long_inc_not_zero(&nonconst_cred->usage)) return NULL; validate_creds(cred); nonconst_cred->non_rcu = 0; return cred; } /** * put_cred - Release a reference to a set of credentials * @cred: The credentials to release * * Release a reference to a set of credentials, deleting them when the last ref * is released. If %NULL is passed, nothing is done. * * This takes a const pointer to a set of credentials because the credentials * on task_struct are attached by const pointers to prevent accidental * alteration of otherwise immutable credential sets. */ static inline void put_cred(const struct cred *_cred) { struct cred *cred = (struct cred *) _cred; if (cred) { validate_creds(cred); if (atomic_long_dec_and_test(&(cred)->usage)) __put_cred(cred); } } /** * current_cred - Access the current task's subjective credentials * * Access the subjective credentials of the current task. RCU-safe, * since nobody else can modify it. */ #define current_cred() \ rcu_dereference_protected(current->cred, 1) /** * current_real_cred - Access the current task's objective credentials * * Access the objective credentials of the current task. RCU-safe, * since nobody else can modify it. */ #define current_real_cred() \ rcu_dereference_protected(current->real_cred, 1) /** * __task_cred - Access a task's objective credentials * @task: The task to query * * Access the objective credentials of a task. The caller must hold the RCU * readlock. * * The result of this function should not be passed directly to get_cred(); * rather get_task_cred() should be used instead. */ #define __task_cred(task) \ rcu_dereference((task)->real_cred) /** * get_current_cred - Get the current task's subjective credentials * * Get the subjective credentials of the current task, pinning them so that * they can't go away. Accessing the current task's credentials directly is * not permitted. */ #define get_current_cred() \ (get_cred(current_cred())) /** * get_current_user - Get the current task's user_struct * * Get the user record of the current task, pinning it so that it can't go * away. */ #define get_current_user() \ ({ \ struct user_struct *__u; \ const struct cred *__cred; \ __cred = current_cred(); \ __u = get_uid(__cred->user); \ __u; \ }) /** * get_current_groups - Get the current task's supplementary group list * * Get the supplementary group list of the current task, pinning it so that it * can't go away. */ #define get_current_groups() \ ({ \ struct group_info *__groups; \ const struct cred *__cred; \ __cred = current_cred(); \ __groups = get_group_info(__cred->group_info); \ __groups; \ }) #define task_cred_xxx(task, xxx) \ ({ \ __typeof__(((struct cred *)NULL)->xxx) ___val; \ rcu_read_lock(); \ ___val = __task_cred((task))->xxx; \ rcu_read_unlock(); \ ___val; \ }) #define task_uid(task) (task_cred_xxx((task), uid)) #define task_euid(task) (task_cred_xxx((task), euid)) #define task_ucounts(task) (task_cred_xxx((task), ucounts)) #define current_cred_xxx(xxx) \ ({ \ current_cred()->xxx; \ }) #define current_uid() (current_cred_xxx(uid)) #define current_gid() (current_cred_xxx(gid)) #define current_euid() (current_cred_xxx(euid)) #define current_egid() (current_cred_xxx(egid)) #define current_suid() (current_cred_xxx(suid)) #define current_sgid() (current_cred_xxx(sgid)) #define current_fsuid() (current_cred_xxx(fsuid)) #define current_fsgid() (current_cred_xxx(fsgid)) #define current_cap() (current_cred_xxx(cap_effective)) #define current_user() (current_cred_xxx(user)) #define current_ucounts() (current_cred_xxx(ucounts)) extern struct user_namespace init_user_ns; #ifdef CONFIG_USER_NS #define current_user_ns() (current_cred_xxx(user_ns)) #else static inline struct user_namespace *current_user_ns(void) { return &init_user_ns; } #endif #define current_uid_gid(_uid, _gid) \ do { \ const struct cred *__cred; \ __cred = current_cred(); \ *(_uid) = __cred->uid; \ *(_gid) = __cred->gid; \ } while(0) #define current_euid_egid(_euid, _egid) \ do { \ const struct cred *__cred; \ __cred = current_cred(); \ *(_euid) = __cred->euid; \ *(_egid) = __cred->egid; \ } while(0) #define current_fsuid_fsgid(_fsuid, _fsgid) \ do { \ const struct cred *__cred; \ __cred = current_cred(); \ *(_fsuid) = __cred->fsuid; \ *(_fsgid) = __cred->fsgid; \ } while(0) #endif /* _LINUX_CRED_H */ PK ! = �* * elfnote.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ELFNOTE_H #define _LINUX_ELFNOTE_H /* * Helper macros to generate ELF Note structures, which are put into a * PT_NOTE segment of the final vmlinux image. These are useful for * including name-value pairs of metadata into the kernel binary (or * modules?) for use by external programs. * * Each note has three parts: a name, a type and a desc. The name is * intended to distinguish the note's originator, so it would be a * company, project, subsystem, etc; it must be in a suitable form for * use in a section name. The type is an integer which is used to tag * the data, and is considered to be within the "name" namespace (so * "FooCo"'s type 42 is distinct from "BarProj"'s type 42). The * "desc" field is the actual data. There are no constraints on the * desc field's contents, though typically they're fairly small. * * All notes from a given NAME are put into a section named * .note.NAME. When the kernel image is finally linked, all the notes * are packed into a single .notes section, which is mapped into the * PT_NOTE segment. Because notes for a given name are grouped into * the same section, they'll all be adjacent the output file. * * This file defines macros for both C and assembler use. Their * syntax is slightly different, but they're semantically similar. * * See the ELF specification for more detail about ELF notes. */ #ifdef __ASSEMBLER__ /* * Generate a structure with the same shape as Elf{32,64}_Nhdr (which * turn out to be the same size and shape), followed by the name and * desc data with appropriate padding. The 'desctype' argument is the * assembler pseudo op defining the type of the data e.g. .asciz while * 'descdata' is the data itself e.g. "hello, world". * * e.g. ELFNOTE(XYZCo, 42, .asciz, "forty-two") * ELFNOTE(XYZCo, 12, .long, 0xdeadbeef) */ #define ELFNOTE_START(name, type, flags) \ .pushsection .note.name, flags,@note ; \ .balign 4 ; \ .long 2f - 1f /* namesz */ ; \ .long 4484f - 3f /* descsz */ ; \ .long type ; \ 1:.asciz #name ; \ 2:.balign 4 ; \ 3: #define ELFNOTE_END \ 4484:.balign 4 ; \ .popsection ; #define ELFNOTE(name, type, desc) \ ELFNOTE_START(name, type, "a") \ desc ; \ ELFNOTE_END #else /* !__ASSEMBLER__ */ #include <uapi/linux/elf.h> /* * Use an anonymous structure which matches the shape of * Elf{32,64}_Nhdr, but includes the name and desc data. The size and * type of name and desc depend on the macro arguments. "name" must * be a literal string, and "desc" must be passed by value. You may * only define one note per line, since __LINE__ is used to generate * unique symbols. */ #define _ELFNOTE_PASTE(a,b) a##b #define _ELFNOTE(size, name, unique, type, desc) \ static const struct { \ struct elf##size##_note _nhdr; \ unsigned char _name[sizeof(name)] \ __attribute__((aligned(sizeof(Elf##size##_Word)))); \ typeof(desc) _desc \ __attribute__((aligned(sizeof(Elf##size##_Word)))); \ } _ELFNOTE_PASTE(_note_, unique) \ __used \ __attribute__((section(".note." name), \ aligned(sizeof(Elf##size##_Word)), \ unused)) = { \ { \ sizeof(name), \ sizeof(desc), \ type, \ }, \ name, \ desc \ } #define ELFNOTE(size, name, type, desc) \ _ELFNOTE(size, name, __LINE__, type, desc) #define ELFNOTE32(name, type, desc) ELFNOTE(32, name, type, desc) #define ELFNOTE64(name, type, desc) ELFNOTE(64, name, type, desc) #endif /* __ASSEMBLER__ */ #endif /* _LINUX_ELFNOTE_H */ PK ! �dw� � task_work.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TASK_WORK_H #define _LINUX_TASK_WORK_H #include <linux/list.h> #include <linux/sched.h> typedef void (*task_work_func_t)(struct callback_head *); static inline void init_task_work(struct callback_head *twork, task_work_func_t func) { twork->func = func; } enum task_work_notify_mode { TWA_NONE, TWA_RESUME, TWA_SIGNAL, }; int task_work_add(struct task_struct *task, struct callback_head *twork, enum task_work_notify_mode mode); struct callback_head *task_work_cancel_match(struct task_struct *task, bool (*match)(struct callback_head *, void *data), void *data); struct callback_head *task_work_cancel_func(struct task_struct *, task_work_func_t); bool task_work_cancel(struct task_struct *task, struct callback_head *cb); void task_work_run(void); static inline void exit_task_work(struct task_struct *task) { task_work_run(); } #endif /* _LINUX_TASK_WORK_H */ PK ! �(\� \� rhashtable.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Resizable, Scalable, Concurrent Hash Table * * Copyright (c) 2015-2016 Herbert Xu <herbert@gondor.apana.org.au> * Copyright (c) 2014-2015 Thomas Graf <tgraf@suug.ch> * Copyright (c) 2008-2014 Patrick McHardy <kaber@trash.net> * * Code partially derived from nft_hash * Rewritten with rehash code from br_multicast plus single list * pointer as suggested by Josh Triplett * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef _LINUX_RHASHTABLE_H #define _LINUX_RHASHTABLE_H #include <linux/err.h> #include <linux/errno.h> #include <linux/jhash.h> #include <linux/list_nulls.h> #include <linux/workqueue.h> #include <linux/rculist.h> #include <linux/bit_spinlock.h> #include <linux/rhashtable-types.h> /* * Objects in an rhashtable have an embedded struct rhash_head * which is linked into as hash chain from the hash table - or one * of two or more hash tables when the rhashtable is being resized. * The end of the chain is marked with a special nulls marks which has * the least significant bit set but otherwise stores the address of * the hash bucket. This allows us to be sure we've found the end * of the right list. * The value stored in the hash bucket has BIT(0) used as a lock bit. * This bit must be atomically set before any changes are made to * the chain. To avoid dereferencing this pointer without clearing * the bit first, we use an opaque 'struct rhash_lock_head *' for the * pointer stored in the bucket. This struct needs to be defined so * that rcu_dereference() works on it, but it has no content so a * cast is needed for it to be useful. This ensures it isn't * used by mistake with clearing the lock bit first. */ struct rhash_lock_head {}; /* Maximum chain length before rehash * * The maximum (not average) chain length grows with the size of the hash * table, at a rate of (log N)/(log log N). * * The value of 16 is selected so that even if the hash table grew to * 2^32 you would not expect the maximum chain length to exceed it * unless we are under attack (or extremely unlucky). * * As this limit is only to detect attacks, we don't need to set it to a * lower value as you'd need the chain length to vastly exceed 16 to have * any real effect on the system. */ #define RHT_ELASTICITY 16u /** * struct bucket_table - Table of hash buckets * @size: Number of hash buckets * @nest: Number of bits of first-level nested table. * @rehash: Current bucket being rehashed * @hash_rnd: Random seed to fold into hash * @walkers: List of active walkers * @rcu: RCU structure for freeing the table * @future_tbl: Table under construction during rehashing * @ntbl: Nested table used when out of memory. * @buckets: size * hash buckets */ struct bucket_table { unsigned int size; unsigned int nest; u32 hash_rnd; struct list_head walkers; struct rcu_head rcu; struct bucket_table __rcu *future_tbl; struct lockdep_map dep_map; struct rhash_lock_head __rcu *buckets[] ____cacheline_aligned_in_smp; }; /* * NULLS_MARKER() expects a hash value with the low * bits mostly likely to be significant, and it discards * the msb. * We give it an address, in which the bottom bit is * always 0, and the msb might be significant. * So we shift the address down one bit to align with * expectations and avoid losing a significant bit. * * We never store the NULLS_MARKER in the hash table * itself as we need the lsb for locking. * Instead we store a NULL */ #define RHT_NULLS_MARKER(ptr) \ ((void *)NULLS_MARKER(((unsigned long) (ptr)) >> 1)) #define INIT_RHT_NULLS_HEAD(ptr) \ ((ptr) = NULL) static inline bool rht_is_a_nulls(const struct rhash_head *ptr) { return ((unsigned long) ptr & 1); } static inline void *rht_obj(const struct rhashtable *ht, const struct rhash_head *he) { return (char *)he - ht->p.head_offset; } static inline unsigned int rht_bucket_index(const struct bucket_table *tbl, unsigned int hash) { return hash & (tbl->size - 1); } static inline unsigned int rht_key_get_hash(struct rhashtable *ht, const void *key, const struct rhashtable_params params, unsigned int hash_rnd) { unsigned int hash; /* params must be equal to ht->p if it isn't constant. */ if (!__builtin_constant_p(params.key_len)) hash = ht->p.hashfn(key, ht->key_len, hash_rnd); else if (params.key_len) { unsigned int key_len = params.key_len; if (params.hashfn) hash = params.hashfn(key, key_len, hash_rnd); else if (key_len & (sizeof(u32) - 1)) hash = jhash(key, key_len, hash_rnd); else hash = jhash2(key, key_len / sizeof(u32), hash_rnd); } else { unsigned int key_len = ht->p.key_len; if (params.hashfn) hash = params.hashfn(key, key_len, hash_rnd); else hash = jhash(key, key_len, hash_rnd); } return hash; } static inline unsigned int rht_key_hashfn( struct rhashtable *ht, const struct bucket_table *tbl, const void *key, const struct rhashtable_params params) { unsigned int hash = rht_key_get_hash(ht, key, params, tbl->hash_rnd); return rht_bucket_index(tbl, hash); } static inline unsigned int rht_head_hashfn( struct rhashtable *ht, const struct bucket_table *tbl, const struct rhash_head *he, const struct rhashtable_params params) { const char *ptr = rht_obj(ht, he); return likely(params.obj_hashfn) ? rht_bucket_index(tbl, params.obj_hashfn(ptr, params.key_len ?: ht->p.key_len, tbl->hash_rnd)) : rht_key_hashfn(ht, tbl, ptr + params.key_offset, params); } /** * rht_grow_above_75 - returns true if nelems > 0.75 * table-size * @ht: hash table * @tbl: current table */ static inline bool rht_grow_above_75(const struct rhashtable *ht, const struct bucket_table *tbl) { /* Expand table when exceeding 75% load */ return atomic_read(&ht->nelems) > (tbl->size / 4 * 3) && (!ht->p.max_size || tbl->size < ht->p.max_size); } /** * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size * @ht: hash table * @tbl: current table */ static inline bool rht_shrink_below_30(const struct rhashtable *ht, const struct bucket_table *tbl) { /* Shrink table beneath 30% load */ return atomic_read(&ht->nelems) < (tbl->size * 3 / 10) && tbl->size > ht->p.min_size; } /** * rht_grow_above_100 - returns true if nelems > table-size * @ht: hash table * @tbl: current table */ static inline bool rht_grow_above_100(const struct rhashtable *ht, const struct bucket_table *tbl) { return atomic_read(&ht->nelems) > tbl->size && (!ht->p.max_size || tbl->size < ht->p.max_size); } /** * rht_grow_above_max - returns true if table is above maximum * @ht: hash table * @tbl: current table */ static inline bool rht_grow_above_max(const struct rhashtable *ht, const struct bucket_table *tbl) { return atomic_read(&ht->nelems) >= ht->max_elems; } #ifdef CONFIG_PROVE_LOCKING int lockdep_rht_mutex_is_held(struct rhashtable *ht); int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash); #else static inline int lockdep_rht_mutex_is_held(struct rhashtable *ht) { return 1; } static inline int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash) { return 1; } #endif /* CONFIG_PROVE_LOCKING */ void *rhashtable_insert_slow(struct rhashtable *ht, const void *key, struct rhash_head *obj); void rhashtable_walk_enter(struct rhashtable *ht, struct rhashtable_iter *iter); void rhashtable_walk_exit(struct rhashtable_iter *iter); int rhashtable_walk_start_check(struct rhashtable_iter *iter) __acquires(RCU); static inline void rhashtable_walk_start(struct rhashtable_iter *iter) { (void)rhashtable_walk_start_check(iter); } void *rhashtable_walk_next(struct rhashtable_iter *iter); void *rhashtable_walk_peek(struct rhashtable_iter *iter); void rhashtable_walk_stop(struct rhashtable_iter *iter) __releases(RCU); void rhashtable_free_and_destroy(struct rhashtable *ht, void (*free_fn)(void *ptr, void *arg), void *arg); void rhashtable_destroy(struct rhashtable *ht); struct rhash_lock_head __rcu **rht_bucket_nested( const struct bucket_table *tbl, unsigned int hash); struct rhash_lock_head __rcu **__rht_bucket_nested( const struct bucket_table *tbl, unsigned int hash); struct rhash_lock_head __rcu **rht_bucket_nested_insert( struct rhashtable *ht, struct bucket_table *tbl, unsigned int hash); #define rht_dereference(p, ht) \ rcu_dereference_protected(p, lockdep_rht_mutex_is_held(ht)) #define rht_dereference_rcu(p, ht) \ rcu_dereference_check(p, lockdep_rht_mutex_is_held(ht)) #define rht_dereference_bucket(p, tbl, hash) \ rcu_dereference_protected(p, lockdep_rht_bucket_is_held(tbl, hash)) #define rht_dereference_bucket_rcu(p, tbl, hash) \ rcu_dereference_check(p, lockdep_rht_bucket_is_held(tbl, hash)) #define rht_entry(tpos, pos, member) \ ({ tpos = container_of(pos, typeof(*tpos), member); 1; }) static inline struct rhash_lock_head __rcu *const *rht_bucket( const struct bucket_table *tbl, unsigned int hash) { return unlikely(tbl->nest) ? rht_bucket_nested(tbl, hash) : &tbl->buckets[hash]; } static inline struct rhash_lock_head __rcu **rht_bucket_var( struct bucket_table *tbl, unsigned int hash) { return unlikely(tbl->nest) ? __rht_bucket_nested(tbl, hash) : &tbl->buckets[hash]; } static inline struct rhash_lock_head __rcu **rht_bucket_insert( struct rhashtable *ht, struct bucket_table *tbl, unsigned int hash) { return unlikely(tbl->nest) ? rht_bucket_nested_insert(ht, tbl, hash) : &tbl->buckets[hash]; } /* * We lock a bucket by setting BIT(0) in the pointer - this is always * zero in real pointers. The NULLS mark is never stored in the bucket, * rather we store NULL if the bucket is empty. * bit_spin_locks do not handle contention well, but the whole point * of the hashtable design is to achieve minimum per-bucket contention. * A nested hash table might not have a bucket pointer. In that case * we cannot get a lock. For remove and replace the bucket cannot be * interesting and doesn't need locking. * For insert we allocate the bucket if this is the last bucket_table, * and then take the lock. * Sometimes we unlock a bucket by writing a new pointer there. In that * case we don't need to unlock, but we do need to reset state such as * local_bh. For that we have rht_assign_unlock(). As rcu_assign_pointer() * provides the same release semantics that bit_spin_unlock() provides, * this is safe. * When we write to a bucket without unlocking, we use rht_assign_locked(). */ static inline void rht_lock(struct bucket_table *tbl, struct rhash_lock_head __rcu **bkt) { local_bh_disable(); bit_spin_lock(0, (unsigned long *)bkt); lock_map_acquire(&tbl->dep_map); } static inline void rht_lock_nested(struct bucket_table *tbl, struct rhash_lock_head __rcu **bucket, unsigned int subclass) { local_bh_disable(); bit_spin_lock(0, (unsigned long *)bucket); lock_acquire_exclusive(&tbl->dep_map, subclass, 0, NULL, _THIS_IP_); } static inline void rht_unlock(struct bucket_table *tbl, struct rhash_lock_head __rcu **bkt) { lock_map_release(&tbl->dep_map); bit_spin_unlock(0, (unsigned long *)bkt); local_bh_enable(); } static inline struct rhash_head *__rht_ptr( struct rhash_lock_head *p, struct rhash_lock_head __rcu *const *bkt) { return (struct rhash_head *) ((unsigned long)p & ~BIT(0) ?: (unsigned long)RHT_NULLS_MARKER(bkt)); } /* * Where 'bkt' is a bucket and might be locked: * rht_ptr_rcu() dereferences that pointer and clears the lock bit. * rht_ptr() dereferences in a context where the bucket is locked. * rht_ptr_exclusive() dereferences in a context where exclusive * access is guaranteed, such as when destroying the table. */ static inline struct rhash_head *rht_ptr_rcu( struct rhash_lock_head __rcu *const *bkt) { return __rht_ptr(rcu_dereference(*bkt), bkt); } static inline struct rhash_head *rht_ptr( struct rhash_lock_head __rcu *const *bkt, struct bucket_table *tbl, unsigned int hash) { return __rht_ptr(rht_dereference_bucket(*bkt, tbl, hash), bkt); } static inline struct rhash_head *rht_ptr_exclusive( struct rhash_lock_head __rcu *const *bkt) { return __rht_ptr(rcu_dereference_protected(*bkt, 1), bkt); } static inline void rht_assign_locked(struct rhash_lock_head __rcu **bkt, struct rhash_head *obj) { if (rht_is_a_nulls(obj)) obj = NULL; rcu_assign_pointer(*bkt, (void *)((unsigned long)obj | BIT(0))); } static inline void rht_assign_unlock(struct bucket_table *tbl, struct rhash_lock_head __rcu **bkt, struct rhash_head *obj) { if (rht_is_a_nulls(obj)) obj = NULL; lock_map_release(&tbl->dep_map); rcu_assign_pointer(*bkt, (void *)obj); preempt_enable(); __release(bitlock); local_bh_enable(); } /** * rht_for_each_from - iterate over hash chain from given head * @pos: the &struct rhash_head to use as a loop cursor. * @head: the &struct rhash_head to start from * @tbl: the &struct bucket_table * @hash: the hash value / bucket index */ #define rht_for_each_from(pos, head, tbl, hash) \ for (pos = head; \ !rht_is_a_nulls(pos); \ pos = rht_dereference_bucket((pos)->next, tbl, hash)) /** * rht_for_each - iterate over hash chain * @pos: the &struct rhash_head to use as a loop cursor. * @tbl: the &struct bucket_table * @hash: the hash value / bucket index */ #define rht_for_each(pos, tbl, hash) \ rht_for_each_from(pos, rht_ptr(rht_bucket(tbl, hash), tbl, hash), \ tbl, hash) /** * rht_for_each_entry_from - iterate over hash chain from given head * @tpos: the type * to use as a loop cursor. * @pos: the &struct rhash_head to use as a loop cursor. * @head: the &struct rhash_head to start from * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * @member: name of the &struct rhash_head within the hashable struct. */ #define rht_for_each_entry_from(tpos, pos, head, tbl, hash, member) \ for (pos = head; \ (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ pos = rht_dereference_bucket((pos)->next, tbl, hash)) /** * rht_for_each_entry - iterate over hash chain of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct rhash_head to use as a loop cursor. * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * @member: name of the &struct rhash_head within the hashable struct. */ #define rht_for_each_entry(tpos, pos, tbl, hash, member) \ rht_for_each_entry_from(tpos, pos, \ rht_ptr(rht_bucket(tbl, hash), tbl, hash), \ tbl, hash, member) /** * rht_for_each_entry_safe - safely iterate over hash chain of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct rhash_head to use as a loop cursor. * @next: the &struct rhash_head to use as next in loop cursor. * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * @member: name of the &struct rhash_head within the hashable struct. * * This hash chain list-traversal primitive allows for the looped code to * remove the loop cursor from the list. */ #define rht_for_each_entry_safe(tpos, pos, next, tbl, hash, member) \ for (pos = rht_ptr(rht_bucket(tbl, hash), tbl, hash), \ next = !rht_is_a_nulls(pos) ? \ rht_dereference_bucket(pos->next, tbl, hash) : NULL; \ (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ pos = next, \ next = !rht_is_a_nulls(pos) ? \ rht_dereference_bucket(pos->next, tbl, hash) : NULL) /** * rht_for_each_rcu_from - iterate over rcu hash chain from given head * @pos: the &struct rhash_head to use as a loop cursor. * @head: the &struct rhash_head to start from * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * * This hash chain list-traversal primitive may safely run concurrently with * the _rcu mutation primitives such as rhashtable_insert() as long as the * traversal is guarded by rcu_read_lock(). */ #define rht_for_each_rcu_from(pos, head, tbl, hash) \ for (({barrier(); }), \ pos = head; \ !rht_is_a_nulls(pos); \ pos = rcu_dereference_raw(pos->next)) /** * rht_for_each_rcu - iterate over rcu hash chain * @pos: the &struct rhash_head to use as a loop cursor. * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * * This hash chain list-traversal primitive may safely run concurrently with * the _rcu mutation primitives such as rhashtable_insert() as long as the * traversal is guarded by rcu_read_lock(). */ #define rht_for_each_rcu(pos, tbl, hash) \ for (({barrier(); }), \ pos = rht_ptr_rcu(rht_bucket(tbl, hash)); \ !rht_is_a_nulls(pos); \ pos = rcu_dereference_raw(pos->next)) /** * rht_for_each_entry_rcu_from - iterated over rcu hash chain from given head * @tpos: the type * to use as a loop cursor. * @pos: the &struct rhash_head to use as a loop cursor. * @head: the &struct rhash_head to start from * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * @member: name of the &struct rhash_head within the hashable struct. * * This hash chain list-traversal primitive may safely run concurrently with * the _rcu mutation primitives such as rhashtable_insert() as long as the * traversal is guarded by rcu_read_lock(). */ #define rht_for_each_entry_rcu_from(tpos, pos, head, tbl, hash, member) \ for (({barrier(); }), \ pos = head; \ (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ pos = rht_dereference_bucket_rcu(pos->next, tbl, hash)) /** * rht_for_each_entry_rcu - iterate over rcu hash chain of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct rhash_head to use as a loop cursor. * @tbl: the &struct bucket_table * @hash: the hash value / bucket index * @member: name of the &struct rhash_head within the hashable struct. * * This hash chain list-traversal primitive may safely run concurrently with * the _rcu mutation primitives such as rhashtable_insert() as long as the * traversal is guarded by rcu_read_lock(). */ #define rht_for_each_entry_rcu(tpos, pos, tbl, hash, member) \ rht_for_each_entry_rcu_from(tpos, pos, \ rht_ptr_rcu(rht_bucket(tbl, hash)), \ tbl, hash, member) /** * rhl_for_each_rcu - iterate over rcu hash table list * @pos: the &struct rlist_head to use as a loop cursor. * @list: the head of the list * * This hash chain list-traversal primitive should be used on the * list returned by rhltable_lookup. */ #define rhl_for_each_rcu(pos, list) \ for (pos = list; pos; pos = rcu_dereference_raw(pos->next)) /** * rhl_for_each_entry_rcu - iterate over rcu hash table list of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct rlist_head to use as a loop cursor. * @list: the head of the list * @member: name of the &struct rlist_head within the hashable struct. * * This hash chain list-traversal primitive should be used on the * list returned by rhltable_lookup. */ #define rhl_for_each_entry_rcu(tpos, pos, list, member) \ for (pos = list; pos && rht_entry(tpos, pos, member); \ pos = rcu_dereference_raw(pos->next)) static inline int rhashtable_compare(struct rhashtable_compare_arg *arg, const void *obj) { struct rhashtable *ht = arg->ht; const char *ptr = obj; return memcmp(ptr + ht->p.key_offset, arg->key, ht->p.key_len); } /* Internal function, do not use. */ static inline struct rhash_head *__rhashtable_lookup( struct rhashtable *ht, const void *key, const struct rhashtable_params params) { struct rhashtable_compare_arg arg = { .ht = ht, .key = key, }; struct rhash_lock_head __rcu *const *bkt; struct bucket_table *tbl; struct rhash_head *he; unsigned int hash; tbl = rht_dereference_rcu(ht->tbl, ht); restart: hash = rht_key_hashfn(ht, tbl, key, params); bkt = rht_bucket(tbl, hash); do { rht_for_each_rcu_from(he, rht_ptr_rcu(bkt), tbl, hash) { if (params.obj_cmpfn ? params.obj_cmpfn(&arg, rht_obj(ht, he)) : rhashtable_compare(&arg, rht_obj(ht, he))) continue; return he; } /* An object might have been moved to a different hash chain, * while we walk along it - better check and retry. */ } while (he != RHT_NULLS_MARKER(bkt)); /* Ensure we see any new tables. */ smp_rmb(); tbl = rht_dereference_rcu(tbl->future_tbl, ht); if (unlikely(tbl)) goto restart; return NULL; } /** * rhashtable_lookup - search hash table * @ht: hash table * @key: the pointer to the key * @params: hash table parameters * * Computes the hash value for the key and traverses the bucket chain looking * for a entry with an identical key. The first matching entry is returned. * * This must only be called under the RCU read lock. * * Returns the first entry on which the compare function returned true. */ static inline void *rhashtable_lookup( struct rhashtable *ht, const void *key, const struct rhashtable_params params) { struct rhash_head *he = __rhashtable_lookup(ht, key, params); return he ? rht_obj(ht, he) : NULL; } /** * rhashtable_lookup_fast - search hash table, without RCU read lock * @ht: hash table * @key: the pointer to the key * @params: hash table parameters * * Computes the hash value for the key and traverses the bucket chain looking * for a entry with an identical key. The first matching entry is returned. * * Only use this function when you have other mechanisms guaranteeing * that the object won't go away after the RCU read lock is released. * * Returns the first entry on which the compare function returned true. */ static inline void *rhashtable_lookup_fast( struct rhashtable *ht, const void *key, const struct rhashtable_params params) { void *obj; rcu_read_lock(); obj = rhashtable_lookup(ht, key, params); rcu_read_unlock(); return obj; } /** * rhltable_lookup - search hash list table * @hlt: hash table * @key: the pointer to the key * @params: hash table parameters * * Computes the hash value for the key and traverses the bucket chain looking * for a entry with an identical key. All matching entries are returned * in a list. * * This must only be called under the RCU read lock. * * Returns the list of entries that match the given key. */ static inline struct rhlist_head *rhltable_lookup( struct rhltable *hlt, const void *key, const struct rhashtable_params params) { struct rhash_head *he = __rhashtable_lookup(&hlt->ht, key, params); return he ? container_of(he, struct rhlist_head, rhead) : NULL; } /* Internal function, please use rhashtable_insert_fast() instead. This * function returns the existing element already in hashes in there is a clash, * otherwise it returns an error via ERR_PTR(). */ static inline void *__rhashtable_insert_fast( struct rhashtable *ht, const void *key, struct rhash_head *obj, const struct rhashtable_params params, bool rhlist) { struct rhashtable_compare_arg arg = { .ht = ht, .key = key, }; struct rhash_lock_head __rcu **bkt; struct rhash_head __rcu **pprev; struct bucket_table *tbl; struct rhash_head *head; unsigned int hash; int elasticity; void *data; rcu_read_lock(); tbl = rht_dereference_rcu(ht->tbl, ht); hash = rht_head_hashfn(ht, tbl, obj, params); elasticity = RHT_ELASTICITY; bkt = rht_bucket_insert(ht, tbl, hash); data = ERR_PTR(-ENOMEM); if (!bkt) goto out; pprev = NULL; rht_lock(tbl, bkt); if (unlikely(rcu_access_pointer(tbl->future_tbl))) { slow_path: rht_unlock(tbl, bkt); rcu_read_unlock(); return rhashtable_insert_slow(ht, key, obj); } rht_for_each_from(head, rht_ptr(bkt, tbl, hash), tbl, hash) { struct rhlist_head *plist; struct rhlist_head *list; elasticity--; if (!key || (params.obj_cmpfn ? params.obj_cmpfn(&arg, rht_obj(ht, head)) : rhashtable_compare(&arg, rht_obj(ht, head)))) { pprev = &head->next; continue; } data = rht_obj(ht, head); if (!rhlist) goto out_unlock; list = container_of(obj, struct rhlist_head, rhead); plist = container_of(head, struct rhlist_head, rhead); RCU_INIT_POINTER(list->next, plist); head = rht_dereference_bucket(head->next, tbl, hash); RCU_INIT_POINTER(list->rhead.next, head); if (pprev) { rcu_assign_pointer(*pprev, obj); rht_unlock(tbl, bkt); } else rht_assign_unlock(tbl, bkt, obj); data = NULL; goto out; } if (elasticity <= 0) goto slow_path; data = ERR_PTR(-E2BIG); if (unlikely(rht_grow_above_max(ht, tbl))) goto out_unlock; if (unlikely(rht_grow_above_100(ht, tbl))) goto slow_path; /* Inserting at head of list makes unlocking free. */ head = rht_ptr(bkt, tbl, hash); RCU_INIT_POINTER(obj->next, head); if (rhlist) { struct rhlist_head *list; list = container_of(obj, struct rhlist_head, rhead); RCU_INIT_POINTER(list->next, NULL); } atomic_inc(&ht->nelems); rht_assign_unlock(tbl, bkt, obj); if (rht_grow_above_75(ht, tbl)) schedule_work(&ht->run_work); data = NULL; out: rcu_read_unlock(); return data; out_unlock: rht_unlock(tbl, bkt); goto out; } /** * rhashtable_insert_fast - insert object into hash table * @ht: hash table * @obj: pointer to hash head inside object * @params: hash table parameters * * Will take the per bucket bitlock to protect against mutual mutations * on the same bucket. Multiple insertions may occur in parallel unless * they map to the same bucket. * * It is safe to call this function from atomic context. * * Will trigger an automatic deferred table resizing if residency in the * table grows beyond 70%. */ static inline int rhashtable_insert_fast( struct rhashtable *ht, struct rhash_head *obj, const struct rhashtable_params params) { void *ret; ret = __rhashtable_insert_fast(ht, NULL, obj, params, false); if (IS_ERR(ret)) return PTR_ERR(ret); return ret == NULL ? 0 : -EEXIST; } /** * rhltable_insert_key - insert object into hash list table * @hlt: hash list table * @key: the pointer to the key * @list: pointer to hash list head inside object * @params: hash table parameters * * Will take the per bucket bitlock to protect against mutual mutations * on the same bucket. Multiple insertions may occur in parallel unless * they map to the same bucket. * * It is safe to call this function from atomic context. * * Will trigger an automatic deferred table resizing if residency in the * table grows beyond 70%. */ static inline int rhltable_insert_key( struct rhltable *hlt, const void *key, struct rhlist_head *list, const struct rhashtable_params params) { return PTR_ERR(__rhashtable_insert_fast(&hlt->ht, key, &list->rhead, params, true)); } /** * rhltable_insert - insert object into hash list table * @hlt: hash list table * @list: pointer to hash list head inside object * @params: hash table parameters * * Will take the per bucket bitlock to protect against mutual mutations * on the same bucket. Multiple insertions may occur in parallel unless * they map to the same bucket. * * It is safe to call this function from atomic context. * * Will trigger an automatic deferred table resizing if residency in the * table grows beyond 70%. */ static inline int rhltable_insert( struct rhltable *hlt, struct rhlist_head *list, const struct rhashtable_params params) { const char *key = rht_obj(&hlt->ht, &list->rhead); key += params.key_offset; return rhltable_insert_key(hlt, key, list, params); } /** * rhashtable_lookup_insert_fast - lookup and insert object into hash table * @ht: hash table * @obj: pointer to hash head inside object * @params: hash table parameters * * This lookup function may only be used for fixed key hash table (key_len * parameter set). It will BUG() if used inappropriately. * * It is safe to call this function from atomic context. * * Will trigger an automatic deferred table resizing if residency in the * table grows beyond 70%. */ static inline int rhashtable_lookup_insert_fast( struct rhashtable *ht, struct rhash_head *obj, const struct rhashtable_params params) { const char *key = rht_obj(ht, obj); void *ret; BUG_ON(ht->p.obj_hashfn); ret = __rhashtable_insert_fast(ht, key + ht->p.key_offset, obj, params, false); if (IS_ERR(ret)) return PTR_ERR(ret); return ret == NULL ? 0 : -EEXIST; } /** * rhashtable_lookup_get_insert_fast - lookup and insert object into hash table * @ht: hash table * @obj: pointer to hash head inside object * @params: hash table parameters * * Just like rhashtable_lookup_insert_fast(), but this function returns the * object if it exists, NULL if it did not and the insertion was successful, * and an ERR_PTR otherwise. */ static inline void *rhashtable_lookup_get_insert_fast( struct rhashtable *ht, struct rhash_head *obj, const struct rhashtable_params params) { const char *key = rht_obj(ht, obj); BUG_ON(ht->p.obj_hashfn); return __rhashtable_insert_fast(ht, key + ht->p.key_offset, obj, params, false); } /** * rhashtable_lookup_insert_key - search and insert object to hash table * with explicit key * @ht: hash table * @key: key * @obj: pointer to hash head inside object * @params: hash table parameters * * Lookups may occur in parallel with hashtable mutations and resizing. * * Will trigger an automatic deferred table resizing if residency in the * table grows beyond 70%. * * Returns zero on success. */ static inline int rhashtable_lookup_insert_key( struct rhashtable *ht, const void *key, struct rhash_head *obj, const struct rhashtable_params params) { void *ret; BUG_ON(!ht->p.obj_hashfn || !key); ret = __rhashtable_insert_fast(ht, key, obj, params, false); if (IS_ERR(ret)) return PTR_ERR(ret); return ret == NULL ? 0 : -EEXIST; } /** * rhashtable_lookup_get_insert_key - lookup and insert object into hash table * @ht: hash table * @key: key * @obj: pointer to hash head inside object * @params: hash table parameters * * Just like rhashtable_lookup_insert_key(), but this function returns the * object if it exists, NULL if it does not and the insertion was successful, * and an ERR_PTR otherwise. */ static inline void *rhashtable_lookup_get_insert_key( struct rhashtable *ht, const void *key, struct rhash_head *obj, const struct rhashtable_params params) { BUG_ON(!ht->p.obj_hashfn || !key); return __rhashtable_insert_fast(ht, key, obj, params, false); } /* Internal function, please use rhashtable_remove_fast() instead */ static inline int __rhashtable_remove_fast_one( struct rhashtable *ht, struct bucket_table *tbl, struct rhash_head *obj, const struct rhashtable_params params, bool rhlist) { struct rhash_lock_head __rcu **bkt; struct rhash_head __rcu **pprev; struct rhash_head *he; unsigned int hash; int err = -ENOENT; hash = rht_head_hashfn(ht, tbl, obj, params); bkt = rht_bucket_var(tbl, hash); if (!bkt) return -ENOENT; pprev = NULL; rht_lock(tbl, bkt); rht_for_each_from(he, rht_ptr(bkt, tbl, hash), tbl, hash) { struct rhlist_head *list; list = container_of(he, struct rhlist_head, rhead); if (he != obj) { struct rhlist_head __rcu **lpprev; pprev = &he->next; if (!rhlist) continue; do { lpprev = &list->next; list = rht_dereference_bucket(list->next, tbl, hash); } while (list && obj != &list->rhead); if (!list) continue; list = rht_dereference_bucket(list->next, tbl, hash); RCU_INIT_POINTER(*lpprev, list); err = 0; break; } obj = rht_dereference_bucket(obj->next, tbl, hash); err = 1; if (rhlist) { list = rht_dereference_bucket(list->next, tbl, hash); if (list) { RCU_INIT_POINTER(list->rhead.next, obj); obj = &list->rhead; err = 0; } } if (pprev) { rcu_assign_pointer(*pprev, obj); rht_unlock(tbl, bkt); } else { rht_assign_unlock(tbl, bkt, obj); } goto unlocked; } rht_unlock(tbl, bkt); unlocked: if (err > 0) { atomic_dec(&ht->nelems); if (unlikely(ht->p.automatic_shrinking && rht_shrink_below_30(ht, tbl))) schedule_work(&ht->run_work); err = 0; } return err; } /* Internal function, please use rhashtable_remove_fast() instead */ static inline int __rhashtable_remove_fast( struct rhashtable *ht, struct rhash_head *obj, const struct rhashtable_params params, bool rhlist) { struct bucket_table *tbl; int err; rcu_read_lock(); tbl = rht_dereference_rcu(ht->tbl, ht); /* Because we have already taken (and released) the bucket * lock in old_tbl, if we find that future_tbl is not yet * visible then that guarantees the entry to still be in * the old tbl if it exists. */ while ((err = __rhashtable_remove_fast_one(ht, tbl, obj, params, rhlist)) && (tbl = rht_dereference_rcu(tbl->future_tbl, ht))) ; rcu_read_unlock(); return err; } /** * rhashtable_remove_fast - remove object from hash table * @ht: hash table * @obj: pointer to hash head inside object * @params: hash table parameters * * Since the hash chain is single linked, the removal operation needs to * walk the bucket chain upon removal. The removal operation is thus * considerable slow if the hash table is not correctly sized. * * Will automatically shrink the table if permitted when residency drops * below 30%. * * Returns zero on success, -ENOENT if the entry could not be found. */ static inline int rhashtable_remove_fast( struct rhashtable *ht, struct rhash_head *obj, const struct rhashtable_params params) { return __rhashtable_remove_fast(ht, obj, params, false); } /** * rhltable_remove - remove object from hash list table * @hlt: hash list table * @list: pointer to hash list head inside object * @params: hash table parameters * * Since the hash chain is single linked, the removal operation needs to * walk the bucket chain upon removal. The removal operation is thus * considerable slow if the hash table is not correctly sized. * * Will automatically shrink the table if permitted when residency drops * below 30% * * Returns zero on success, -ENOENT if the entry could not be found. */ static inline int rhltable_remove( struct rhltable *hlt, struct rhlist_head *list, const struct rhashtable_params params) { return __rhashtable_remove_fast(&hlt->ht, &list->rhead, params, true); } /* Internal function, please use rhashtable_replace_fast() instead */ static inline int __rhashtable_replace_fast( struct rhashtable *ht, struct bucket_table *tbl, struct rhash_head *obj_old, struct rhash_head *obj_new, const struct rhashtable_params params) { struct rhash_lock_head __rcu **bkt; struct rhash_head __rcu **pprev; struct rhash_head *he; unsigned int hash; int err = -ENOENT; /* Minimally, the old and new objects must have same hash * (which should mean identifiers are the same). */ hash = rht_head_hashfn(ht, tbl, obj_old, params); if (hash != rht_head_hashfn(ht, tbl, obj_new, params)) return -EINVAL; bkt = rht_bucket_var(tbl, hash); if (!bkt) return -ENOENT; pprev = NULL; rht_lock(tbl, bkt); rht_for_each_from(he, rht_ptr(bkt, tbl, hash), tbl, hash) { if (he != obj_old) { pprev = &he->next; continue; } rcu_assign_pointer(obj_new->next, obj_old->next); if (pprev) { rcu_assign_pointer(*pprev, obj_new); rht_unlock(tbl, bkt); } else { rht_assign_unlock(tbl, bkt, obj_new); } err = 0; goto unlocked; } rht_unlock(tbl, bkt); unlocked: return err; } /** * rhashtable_replace_fast - replace an object in hash table * @ht: hash table * @obj_old: pointer to hash head inside object being replaced * @obj_new: pointer to hash head inside object which is new * @params: hash table parameters * * Replacing an object doesn't affect the number of elements in the hash table * or bucket, so we don't need to worry about shrinking or expanding the * table here. * * Returns zero on success, -ENOENT if the entry could not be found, * -EINVAL if hash is not the same for the old and new objects. */ static inline int rhashtable_replace_fast( struct rhashtable *ht, struct rhash_head *obj_old, struct rhash_head *obj_new, const struct rhashtable_params params) { struct bucket_table *tbl; int err; rcu_read_lock(); tbl = rht_dereference_rcu(ht->tbl, ht); /* Because we have already taken (and released) the bucket * lock in old_tbl, if we find that future_tbl is not yet * visible then that guarantees the entry to still be in * the old tbl if it exists. */ while ((err = __rhashtable_replace_fast(ht, tbl, obj_old, obj_new, params)) && (tbl = rht_dereference_rcu(tbl->future_tbl, ht))) ; rcu_read_unlock(); return err; } /** * rhltable_walk_enter - Initialise an iterator * @hlt: Table to walk over * @iter: Hash table Iterator * * This function prepares a hash table walk. * * Note that if you restart a walk after rhashtable_walk_stop you * may see the same object twice. Also, you may miss objects if * there are removals in between rhashtable_walk_stop and the next * call to rhashtable_walk_start. * * For a completely stable walk you should construct your own data * structure outside the hash table. * * This function may be called from any process context, including * non-preemptable context, but cannot be called from softirq or * hardirq context. * * You must call rhashtable_walk_exit after this function returns. */ static inline void rhltable_walk_enter(struct rhltable *hlt, struct rhashtable_iter *iter) { return rhashtable_walk_enter(&hlt->ht, iter); } /** * rhltable_free_and_destroy - free elements and destroy hash list table * @hlt: the hash list table to destroy * @free_fn: callback to release resources of element * @arg: pointer passed to free_fn * * See documentation for rhashtable_free_and_destroy. */ static inline void rhltable_free_and_destroy(struct rhltable *hlt, void (*free_fn)(void *ptr, void *arg), void *arg) { return rhashtable_free_and_destroy(&hlt->ht, free_fn, arg); } static inline void rhltable_destroy(struct rhltable *hlt) { return rhltable_free_and_destroy(hlt, NULL, NULL); } #endif /* _LINUX_RHASHTABLE_H */ PK ! Q�� � mroute.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MROUTE_H #define __LINUX_MROUTE_H #include <linux/in.h> #include <linux/pim.h> #include <net/fib_rules.h> #include <net/fib_notifier.h> #include <uapi/linux/mroute.h> #include <linux/mroute_base.h> #include <linux/sockptr.h> #ifdef CONFIG_IP_MROUTE static inline int ip_mroute_opt(int opt) { return opt >= MRT_BASE && opt <= MRT_MAX; } int ip_mroute_setsockopt(struct sock *, int, sockptr_t, unsigned int); int ip_mroute_getsockopt(struct sock *, int, sockptr_t, sockptr_t); int ipmr_ioctl(struct sock *sk, int cmd, void __user *arg); int ipmr_compat_ioctl(struct sock *sk, unsigned int cmd, void __user *arg); int ip_mr_init(void); bool ipmr_rule_default(const struct fib_rule *rule); #else static inline int ip_mroute_setsockopt(struct sock *sock, int optname, sockptr_t optval, unsigned int optlen) { return -ENOPROTOOPT; } static inline int ip_mroute_getsockopt(struct sock *sk, int optname, sockptr_t optval, sockptr_t optlen) { return -ENOPROTOOPT; } static inline int ipmr_ioctl(struct sock *sk, int cmd, void __user *arg) { return -ENOIOCTLCMD; } static inline int ip_mr_init(void) { return 0; } static inline int ip_mroute_opt(int opt) { return 0; } static inline bool ipmr_rule_default(const struct fib_rule *rule) { return true; } #endif #define VIFF_STATIC 0x8000 struct mfc_cache_cmp_arg { __be32 mfc_mcastgrp; __be32 mfc_origin; }; /** * struct mfc_cache - multicast routing entries * @_c: Common multicast routing information; has to be first [for casting] * @mfc_mcastgrp: destination multicast group address * @mfc_origin: source address * @cmparg: used for rhashtable comparisons */ struct mfc_cache { struct mr_mfc _c; union { struct { __be32 mfc_mcastgrp; __be32 mfc_origin; }; struct mfc_cache_cmp_arg cmparg; }; }; struct rtmsg; int ipmr_get_route(struct net *net, struct sk_buff *skb, __be32 saddr, __be32 daddr, struct rtmsg *rtm, u32 portid); #endif PK ! `㱾 � seq_buf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SEQ_BUF_H #define _LINUX_SEQ_BUF_H #include <linux/fs.h> /* * Trace sequences are used to allow a function to call several other functions * to create a string of data to use. */ /** * seq_buf - seq buffer structure * @buffer: pointer to the buffer * @size: size of the buffer * @len: the amount of data inside the buffer * @readpos: The next position to read in the buffer. */ struct seq_buf { char *buffer; size_t size; size_t len; loff_t readpos; }; static inline void seq_buf_clear(struct seq_buf *s) { s->len = 0; s->readpos = 0; } static inline void seq_buf_init(struct seq_buf *s, char *buf, unsigned int size) { s->buffer = buf; s->size = size; seq_buf_clear(s); } /* * seq_buf have a buffer that might overflow. When this happens * the len and size are set to be equal. */ static inline bool seq_buf_has_overflowed(struct seq_buf *s) { return s->len > s->size; } static inline void seq_buf_set_overflow(struct seq_buf *s) { s->len = s->size + 1; } /* * How much buffer is left on the seq_buf? */ static inline unsigned int seq_buf_buffer_left(struct seq_buf *s) { if (seq_buf_has_overflowed(s)) return 0; return s->size - s->len; } /* How much buffer was written? */ static inline unsigned int seq_buf_used(struct seq_buf *s) { return min(s->len, s->size); } /** * seq_buf_terminate - Make sure buffer is nul terminated * @s: the seq_buf descriptor to terminate. * * This makes sure that the buffer in @s is nul terminated and * safe to read as a string. * * Note, if this is called when the buffer has overflowed, then * the last byte of the buffer is zeroed, and the len will still * point passed it. * * After this function is called, s->buffer is safe to use * in string operations. */ static inline void seq_buf_terminate(struct seq_buf *s) { if (WARN_ON(s->size == 0)) return; if (seq_buf_buffer_left(s)) s->buffer[s->len] = 0; else s->buffer[s->size - 1] = 0; } /** * seq_buf_get_buf - get buffer to write arbitrary data to * @s: the seq_buf handle * @bufp: the beginning of the buffer is stored here * * Return the number of bytes available in the buffer, or zero if * there's no space. */ static inline size_t seq_buf_get_buf(struct seq_buf *s, char **bufp) { WARN_ON(s->len > s->size + 1); if (s->len < s->size) { *bufp = s->buffer + s->len; return s->size - s->len; } *bufp = NULL; return 0; } /** * seq_buf_commit - commit data to the buffer * @s: the seq_buf handle * @num: the number of bytes to commit * * Commit @num bytes of data written to a buffer previously acquired * by seq_buf_get. To signal an error condition, or that the data * didn't fit in the available space, pass a negative @num value. */ static inline void seq_buf_commit(struct seq_buf *s, int num) { if (num < 0) { seq_buf_set_overflow(s); } else { /* num must be negative on overflow */ BUG_ON(s->len + num > s->size); s->len += num; } } extern __printf(2, 3) int seq_buf_printf(struct seq_buf *s, const char *fmt, ...); extern __printf(2, 0) int seq_buf_vprintf(struct seq_buf *s, const char *fmt, va_list args); extern int seq_buf_print_seq(struct seq_file *m, struct seq_buf *s); extern int seq_buf_to_user(struct seq_buf *s, char __user *ubuf, int cnt); extern int seq_buf_puts(struct seq_buf *s, const char *str); extern int seq_buf_putc(struct seq_buf *s, unsigned char c); extern int seq_buf_putmem(struct seq_buf *s, const void *mem, unsigned int len); extern int seq_buf_putmem_hex(struct seq_buf *s, const void *mem, unsigned int len); extern int seq_buf_path(struct seq_buf *s, const struct path *path, const char *esc); extern int seq_buf_hex_dump(struct seq_buf *s, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii); #ifdef CONFIG_BINARY_PRINTF extern int seq_buf_bprintf(struct seq_buf *s, const char *fmt, const u32 *binary); #endif #endif /* _LINUX_SEQ_BUF_H */ PK ! } � D D kernel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KERNEL_H #define _LINUX_KERNEL_H #include <linux/stdarg.h> #include <linux/align.h> #include <linux/array_size.h> #include <linux/limits.h> #include <linux/linkage.h> #include <linux/stddef.h> #include <linux/types.h> #include <linux/compiler.h> #include <linux/bitops.h> #include <linux/kstrtox.h> #include <linux/log2.h> #include <linux/math.h> #include <linux/minmax.h> #include <linux/typecheck.h> #include <linux/panic.h> #include <linux/printk.h> #include <linux/build_bug.h> #include <linux/static_call_types.h> #include <asm/byteorder.h> #include <uapi/linux/kernel.h> #define STACK_MAGIC 0xdeadbeef /** * REPEAT_BYTE - repeat the value @x multiple times as an unsigned long value * @x: value to repeat * * NOTE: @x is not checked for > 0xff; larger values produce odd results. */ #define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) /* generic data direction definitions */ #define READ 0 #define WRITE 1 #define PTR_IF(cond, ptr) ((cond) ? (ptr) : NULL) #define u64_to_user_ptr(x) ( \ { \ typecheck(u64, (x)); \ (void __user *)(uintptr_t)(x); \ } \ ) #define typeof_member(T, m) typeof(((T*)0)->m) #define _RET_IP_ (unsigned long)__builtin_return_address(0) #define _THIS_IP_ ({ __label__ __here; __here: (unsigned long)&&__here; }) /** * upper_32_bits - return bits 32-63 of a number * @n: the number we're accessing * * A basic shift-right of a 64- or 32-bit quantity. Use this to suppress * the "right shift count >= width of type" warning when that quantity is * 32-bits. */ #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) /** * lower_32_bits - return bits 0-31 of a number * @n: the number we're accessing */ #define lower_32_bits(n) ((u32)((n) & 0xffffffff)) /** * upper_16_bits - return bits 16-31 of a number * @n: the number we're accessing */ #define upper_16_bits(n) ((u16)((n) >> 16)) /** * lower_16_bits - return bits 0-15 of a number * @n: the number we're accessing */ #define lower_16_bits(n) ((u16)((n) & 0xffff)) struct completion; struct user; #ifdef CONFIG_PREEMPT_VOLUNTARY extern int __cond_resched(void); # define might_resched() __cond_resched() #elif defined(CONFIG_PREEMPT_DYNAMIC) extern int __cond_resched(void); DECLARE_STATIC_CALL(might_resched, __cond_resched); static __always_inline void might_resched(void) { static_call_mod(might_resched)(); } #else # define might_resched() do { } while (0) #endif /* CONFIG_PREEMPT_* */ #ifdef CONFIG_DEBUG_ATOMIC_SLEEP extern void ___might_sleep(const char *file, int line, int preempt_offset); extern void __might_sleep(const char *file, int line, int preempt_offset); extern void __cant_sleep(const char *file, int line, int preempt_offset); extern void __cant_migrate(const char *file, int line); /** * might_sleep - annotation for functions that can sleep * * this macro will print a stack trace if it is executed in an atomic * context (spinlock, irq-handler, ...). Additional sections where blocking is * not allowed can be annotated with non_block_start() and non_block_end() * pairs. * * This is a useful debugging help to be able to catch problems early and not * be bitten later when the calling function happens to sleep when it is not * supposed to. */ # define might_sleep() \ do { __might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) /** * cant_sleep - annotation for functions that cannot sleep * * this macro will print a stack trace if it is executed with preemption enabled */ # define cant_sleep() \ do { __cant_sleep(__FILE__, __LINE__, 0); } while (0) # define sched_annotate_sleep() (current->task_state_change = 0) /** * cant_migrate - annotation for functions that cannot migrate * * Will print a stack trace if executed in code which is migratable */ # define cant_migrate() \ do { \ if (IS_ENABLED(CONFIG_SMP)) \ __cant_migrate(__FILE__, __LINE__); \ } while (0) /** * non_block_start - annotate the start of section where sleeping is prohibited * * This is on behalf of the oom reaper, specifically when it is calling the mmu * notifiers. The problem is that if the notifier were to block on, for example, * mutex_lock() and if the process which holds that mutex were to perform a * sleeping memory allocation, the oom reaper is now blocked on completion of * that memory allocation. Other blocking calls like wait_event() pose similar * issues. */ # define non_block_start() (current->non_block_count++) /** * non_block_end - annotate the end of section where sleeping is prohibited * * Closes a section opened by non_block_start(). */ # define non_block_end() WARN_ON(current->non_block_count-- == 0) #else static inline void ___might_sleep(const char *file, int line, int preempt_offset) { } static inline void __might_sleep(const char *file, int line, int preempt_offset) { } # define might_sleep() do { might_resched(); } while (0) # define cant_sleep() do { } while (0) # define cant_migrate() do { } while (0) # define sched_annotate_sleep() do { } while (0) # define non_block_start() do { } while (0) # define non_block_end() do { } while (0) #endif #define might_sleep_if(cond) do { if (cond) might_sleep(); } while (0) #if defined(CONFIG_MMU) && \ (defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP)) #define might_fault() __might_fault(__FILE__, __LINE__) void __might_fault(const char *file, int line); #else static inline void might_fault(void) { } #endif void do_exit(long error_code) __noreturn; void complete_and_exit(struct completion *, long) __noreturn; extern int num_to_str(char *buf, int size, unsigned long long num, unsigned int width); /* lib/printf utilities */ extern __printf(2, 3) int sprintf(char *buf, const char * fmt, ...); extern __printf(2, 0) int vsprintf(char *buf, const char *, va_list); extern __printf(3, 4) int snprintf(char *buf, size_t size, const char *fmt, ...); extern __printf(3, 0) int vsnprintf(char *buf, size_t size, const char *fmt, va_list args); extern __printf(3, 4) int scnprintf(char *buf, size_t size, const char *fmt, ...); extern __printf(3, 0) int vscnprintf(char *buf, size_t size, const char *fmt, va_list args); extern __printf(2, 3) __malloc char *kasprintf(gfp_t gfp, const char *fmt, ...); extern __printf(2, 0) __malloc char *kvasprintf(gfp_t gfp, const char *fmt, va_list args); extern __printf(2, 0) const char *kvasprintf_const(gfp_t gfp, const char *fmt, va_list args); extern __scanf(2, 3) int sscanf(const char *, const char *, ...); extern __scanf(2, 0) int vsscanf(const char *, const char *, va_list); extern int no_hash_pointers_enable(char *str); extern int get_option(char **str, int *pint); extern char *get_options(const char *str, int nints, int *ints); extern unsigned long long memparse(const char *ptr, char **retptr); extern bool parse_option_str(const char *str, const char *option); extern char *next_arg(char *args, char **param, char **val); extern int core_kernel_text(unsigned long addr); extern int init_kernel_text(unsigned long addr); extern int core_kernel_data(unsigned long addr); extern int __kernel_text_address(unsigned long addr); extern int kernel_text_address(unsigned long addr); extern int func_ptr_is_kernel_text(void *ptr); extern void bust_spinlocks(int yes); extern int root_mountflags; extern bool early_boot_irqs_disabled; /* * Values used for system_state. Ordering of the states must not be changed * as code checks for <, <=, >, >= STATE. */ extern enum system_states { SYSTEM_BOOTING, SYSTEM_SCHEDULING, SYSTEM_RUNNING, SYSTEM_HALT, SYSTEM_POWER_OFF, SYSTEM_RESTART, SYSTEM_SUSPEND, } system_state; extern const char hex_asc[]; #define hex_asc_lo(x) hex_asc[((x) & 0x0f)] #define hex_asc_hi(x) hex_asc[((x) & 0xf0) >> 4] static inline char *hex_byte_pack(char *buf, u8 byte) { *buf++ = hex_asc_hi(byte); *buf++ = hex_asc_lo(byte); return buf; } extern const char hex_asc_upper[]; #define hex_asc_upper_lo(x) hex_asc_upper[((x) & 0x0f)] #define hex_asc_upper_hi(x) hex_asc_upper[((x) & 0xf0) >> 4] static inline char *hex_byte_pack_upper(char *buf, u8 byte) { *buf++ = hex_asc_upper_hi(byte); *buf++ = hex_asc_upper_lo(byte); return buf; } extern int hex_to_bin(unsigned char ch); extern int __must_check hex2bin(u8 *dst, const char *src, size_t count); extern char *bin2hex(char *dst, const void *src, size_t count); bool mac_pton(const char *s, u8 *mac); /* * General tracing related utility functions - trace_printk(), * tracing_on/tracing_off and tracing_start()/tracing_stop * * Use tracing_on/tracing_off when you want to quickly turn on or off * tracing. It simply enables or disables the recording of the trace events. * This also corresponds to the user space /sys/kernel/debug/tracing/tracing_on * file, which gives a means for the kernel and userspace to interact. * Place a tracing_off() in the kernel where you want tracing to end. * From user space, examine the trace, and then echo 1 > tracing_on * to continue tracing. * * tracing_stop/tracing_start has slightly more overhead. It is used * by things like suspend to ram where disabling the recording of the * trace is not enough, but tracing must actually stop because things * like calling smp_processor_id() may crash the system. * * Most likely, you want to use tracing_on/tracing_off. */ enum ftrace_dump_mode { DUMP_NONE, DUMP_ALL, DUMP_ORIG, }; #ifdef CONFIG_TRACING void tracing_on(void); void tracing_off(void); int tracing_is_on(void); void tracing_snapshot(void); void tracing_snapshot_alloc(void); extern void tracing_start(void); extern void tracing_stop(void); static inline __printf(1, 2) void ____trace_printk_check_format(const char *fmt, ...) { } #define __trace_printk_check_format(fmt, args...) \ do { \ if (0) \ ____trace_printk_check_format(fmt, ##args); \ } while (0) /** * trace_printk - printf formatting in the ftrace buffer * @fmt: the printf format for printing * * Note: __trace_printk is an internal function for trace_printk() and * the @ip is passed in via the trace_printk() macro. * * This function allows a kernel developer to debug fast path sections * that printk is not appropriate for. By scattering in various * printk like tracing in the code, a developer can quickly see * where problems are occurring. * * This is intended as a debugging tool for the developer only. * Please refrain from leaving trace_printks scattered around in * your code. (Extra memory is used for special buffers that are * allocated when trace_printk() is used.) * * A little optimization trick is done here. If there's only one * argument, there's no need to scan the string for printf formats. * The trace_puts() will suffice. But how can we take advantage of * using trace_puts() when trace_printk() has only one argument? * By stringifying the args and checking the size we can tell * whether or not there are args. __stringify((__VA_ARGS__)) will * turn into "()\0" with a size of 3 when there are no args, anything * else will be bigger. All we need to do is define a string to this, * and then take its size and compare to 3. If it's bigger, use * do_trace_printk() otherwise, optimize it to trace_puts(). Then just * let gcc optimize the rest. */ #define trace_printk(fmt, ...) \ do { \ char _______STR[] = __stringify((__VA_ARGS__)); \ if (sizeof(_______STR) > 3) \ do_trace_printk(fmt, ##__VA_ARGS__); \ else \ trace_puts(fmt); \ } while (0) #define do_trace_printk(fmt, args...) \ do { \ static const char *trace_printk_fmt __used \ __section("__trace_printk_fmt") = \ __builtin_constant_p(fmt) ? fmt : NULL; \ \ __trace_printk_check_format(fmt, ##args); \ \ if (__builtin_constant_p(fmt)) \ __trace_bprintk(_THIS_IP_, trace_printk_fmt, ##args); \ else \ __trace_printk(_THIS_IP_, fmt, ##args); \ } while (0) extern __printf(2, 3) int __trace_bprintk(unsigned long ip, const char *fmt, ...); extern __printf(2, 3) int __trace_printk(unsigned long ip, const char *fmt, ...); /** * trace_puts - write a string into the ftrace buffer * @str: the string to record * * Note: __trace_bputs is an internal function for trace_puts and * the @ip is passed in via the trace_puts macro. * * This is similar to trace_printk() but is made for those really fast * paths that a developer wants the least amount of "Heisenbug" effects, * where the processing of the print format is still too much. * * This function allows a kernel developer to debug fast path sections * that printk is not appropriate for. By scattering in various * printk like tracing in the code, a developer can quickly see * where problems are occurring. * * This is intended as a debugging tool for the developer only. * Please refrain from leaving trace_puts scattered around in * your code. (Extra memory is used for special buffers that are * allocated when trace_puts() is used.) * * Returns: 0 if nothing was written, positive # if string was. * (1 when __trace_bputs is used, strlen(str) when __trace_puts is used) */ #define trace_puts(str) ({ \ static const char *trace_printk_fmt __used \ __section("__trace_printk_fmt") = \ __builtin_constant_p(str) ? str : NULL; \ \ if (__builtin_constant_p(str)) \ __trace_bputs(_THIS_IP_, trace_printk_fmt); \ else \ __trace_puts(_THIS_IP_, str, strlen(str)); \ }) extern int __trace_bputs(unsigned long ip, const char *str); extern int __trace_puts(unsigned long ip, const char *str, int size); extern void trace_dump_stack(int skip); /* * The double __builtin_constant_p is because gcc will give us an error * if we try to allocate the static variable to fmt if it is not a * constant. Even with the outer if statement. */ #define ftrace_vprintk(fmt, vargs) \ do { \ if (__builtin_constant_p(fmt)) { \ static const char *trace_printk_fmt __used \ __section("__trace_printk_fmt") = \ __builtin_constant_p(fmt) ? fmt : NULL; \ \ __ftrace_vbprintk(_THIS_IP_, trace_printk_fmt, vargs); \ } else \ __ftrace_vprintk(_THIS_IP_, fmt, vargs); \ } while (0) extern __printf(2, 0) int __ftrace_vbprintk(unsigned long ip, const char *fmt, va_list ap); extern __printf(2, 0) int __ftrace_vprintk(unsigned long ip, const char *fmt, va_list ap); extern void ftrace_dump(enum ftrace_dump_mode oops_dump_mode); #else static inline void tracing_start(void) { } static inline void tracing_stop(void) { } static inline void trace_dump_stack(int skip) { } static inline void tracing_on(void) { } static inline void tracing_off(void) { } static inline int tracing_is_on(void) { return 0; } static inline void tracing_snapshot(void) { } static inline void tracing_snapshot_alloc(void) { } static inline __printf(1, 2) int trace_printk(const char *fmt, ...) { return 0; } static __printf(1, 0) inline int ftrace_vprintk(const char *fmt, va_list ap) { return 0; } static inline void ftrace_dump(enum ftrace_dump_mode oops_dump_mode) { } #endif /* CONFIG_TRACING */ /* This counts to 12. Any more, it will return 13th argument. */ #define __COUNT_ARGS(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _n, X...) _n #define COUNT_ARGS(X...) __COUNT_ARGS(, ##X, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) #define __CONCAT(a, b) a ## b #define CONCATENATE(a, b) __CONCAT(a, b) /** * container_of - cast a member of a structure out to the containing structure * @ptr: the pointer to the member. * @type: the type of the container struct this is embedded in. * @member: the name of the member within the struct. * */ #define container_of(ptr, type, member) ({ \ void *__mptr = (void *)(ptr); \ BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \ !__same_type(*(ptr), void), \ "pointer type mismatch in container_of()"); \ ((type *)(__mptr - offsetof(type, member))); }) /** * container_of_safe - cast a member of a structure out to the containing structure * @ptr: the pointer to the member. * @type: the type of the container struct this is embedded in. * @member: the name of the member within the struct. * * If IS_ERR_OR_NULL(ptr), ptr is returned unchanged. */ #define container_of_safe(ptr, type, member) ({ \ void *__mptr = (void *)(ptr); \ BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \ !__same_type(*(ptr), void), \ "pointer type mismatch in container_of()"); \ IS_ERR_OR_NULL(__mptr) ? ERR_CAST(__mptr) : \ ((type *)(__mptr - offsetof(type, member))); }) /* Rebuild everything on CONFIG_FTRACE_MCOUNT_RECORD */ #ifdef CONFIG_FTRACE_MCOUNT_RECORD # define REBUILD_DUE_TO_FTRACE_MCOUNT_RECORD #endif /* Permissions on a sysfs file: you didn't miss the 0 prefix did you? */ #define VERIFY_OCTAL_PERMISSIONS(perms) \ (BUILD_BUG_ON_ZERO((perms) < 0) + \ BUILD_BUG_ON_ZERO((perms) > 0777) + \ /* USER_READABLE >= GROUP_READABLE >= OTHER_READABLE */ \ BUILD_BUG_ON_ZERO((((perms) >> 6) & 4) < (((perms) >> 3) & 4)) + \ BUILD_BUG_ON_ZERO((((perms) >> 3) & 4) < ((perms) & 4)) + \ /* USER_WRITABLE >= GROUP_WRITABLE */ \ BUILD_BUG_ON_ZERO((((perms) >> 6) & 2) < (((perms) >> 3) & 2)) + \ /* OTHER_WRITABLE? Generally considered a bad idea. */ \ BUILD_BUG_ON_ZERO((perms) & 2) + \ (perms)) #endif PK ! ���� � indirect_call_wrapper.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_INDIRECT_CALL_WRAPPER_H #define _LINUX_INDIRECT_CALL_WRAPPER_H #ifdef CONFIG_RETPOLINE /* * INDIRECT_CALL_$NR - wrapper for indirect calls with $NR known builtin * @f: function pointer * @f$NR: builtin functions names, up to $NR of them * @__VA_ARGS__: arguments for @f * * Avoid retpoline overhead for known builtin, checking @f vs each of them and * eventually invoking directly the builtin function. The functions are check * in the given order. Fallback to the indirect call. */ #define INDIRECT_CALL_1(f, f1, ...) \ ({ \ likely(f == f1) ? f1(__VA_ARGS__) : f(__VA_ARGS__); \ }) #define INDIRECT_CALL_2(f, f2, f1, ...) \ ({ \ likely(f == f2) ? f2(__VA_ARGS__) : \ INDIRECT_CALL_1(f, f1, __VA_ARGS__); \ }) #define INDIRECT_CALL_3(f, f3, f2, f1, ...) \ ({ \ likely(f == f3) ? f3(__VA_ARGS__) : \ INDIRECT_CALL_2(f, f2, f1, __VA_ARGS__); \ }) #define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) \ ({ \ likely(f == f4) ? f4(__VA_ARGS__) : \ INDIRECT_CALL_3(f, f3, f2, f1, __VA_ARGS__); \ }) #define INDIRECT_CALLABLE_DECLARE(f) f #define INDIRECT_CALLABLE_SCOPE #define EXPORT_INDIRECT_CALLABLE(f) EXPORT_SYMBOL(f) #else #define INDIRECT_CALL_1(f, f1, ...) f(__VA_ARGS__) #define INDIRECT_CALL_2(f, f2, f1, ...) f(__VA_ARGS__) #define INDIRECT_CALL_3(f, f3, f2, f1, ...) f(__VA_ARGS__) #define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) f(__VA_ARGS__) #define INDIRECT_CALLABLE_DECLARE(f) #define INDIRECT_CALLABLE_SCOPE static #define EXPORT_INDIRECT_CALLABLE(f) #endif /* * We can use INDIRECT_CALL_$NR for ipv6 related functions only if ipv6 is * builtin, this macro simplify dealing with indirect calls with only ipv4/ipv6 * alternatives */ #if IS_BUILTIN(CONFIG_IPV6) #define INDIRECT_CALL_INET(f, f2, f1, ...) \ INDIRECT_CALL_2(f, f2, f1, __VA_ARGS__) #elif IS_ENABLED(CONFIG_INET) #define INDIRECT_CALL_INET(f, f2, f1, ...) INDIRECT_CALL_1(f, f1, __VA_ARGS__) #else #define INDIRECT_CALL_INET(f, f2, f1, ...) f(__VA_ARGS__) #endif #if IS_ENABLED(CONFIG_INET) #define INDIRECT_CALL_INET_1(f, f1, ...) INDIRECT_CALL_1(f, f1, __VA_ARGS__) #else #define INDIRECT_CALL_INET_1(f, f1, ...) f(__VA_ARGS__) #endif #endif PK ! ��� atm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* atm.h - general ATM declarations */ #ifndef _LINUX_ATM_H #define _LINUX_ATM_H #include <uapi/linux/atm.h> #ifdef CONFIG_COMPAT #include <linux/compat.h> struct compat_atmif_sioc { int number; int length; compat_uptr_t arg; }; #endif #endif PK ! a��{t t ftrace_irq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FTRACE_IRQ_H #define _LINUX_FTRACE_IRQ_H #ifdef CONFIG_HWLAT_TRACER extern bool trace_hwlat_callback_enabled; extern void trace_hwlat_callback(bool enter); #endif #ifdef CONFIG_OSNOISE_TRACER extern bool trace_osnoise_callback_enabled; extern void trace_osnoise_callback(bool enter); #endif static inline void ftrace_nmi_enter(void) { #ifdef CONFIG_HWLAT_TRACER if (trace_hwlat_callback_enabled) trace_hwlat_callback(true); #endif #ifdef CONFIG_OSNOISE_TRACER if (trace_osnoise_callback_enabled) trace_osnoise_callback(true); #endif } static inline void ftrace_nmi_exit(void) { #ifdef CONFIG_HWLAT_TRACER if (trace_hwlat_callback_enabled) trace_hwlat_callback(false); #endif #ifdef CONFIG_OSNOISE_TRACER if (trace_osnoise_callback_enabled) trace_osnoise_callback(false); #endif } #endif /* _LINUX_FTRACE_IRQ_H */ PK ! ��� decompress/unlz4.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DECOMPRESS_UNLZ4_H #define DECOMPRESS_UNLZ4_H int unlz4(unsigned char *inbuf, long len, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *output, long *pos, void(*error)(char *x)); #endif PK ! j���1 1 decompress/bunzip2.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DECOMPRESS_BUNZIP2_H #define DECOMPRESS_BUNZIP2_H int bunzip2(unsigned char *inbuf, long len, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *output, long *pos, void(*error)(char *x)); #endif PK ! �j|�$ $ decompress/unlzma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DECOMPRESS_UNLZMA_H #define DECOMPRESS_UNLZMA_H int unlzma(unsigned char *, long, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *output, long *posp, void(*error)(char *x) ); #endif PK ! ���: : decompress/inflate.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_DECOMPRESS_INFLATE_H #define LINUX_DECOMPRESS_INFLATE_H int gunzip(unsigned char *inbuf, long len, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *output, long *pos, void(*error_fn)(char *x)); #endif PK ! �kq� decompress/unlzo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DECOMPRESS_UNLZO_H #define DECOMPRESS_UNLZO_H int unlzo(unsigned char *inbuf, long len, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *output, long *pos, void(*error)(char *x)); #endif PK ! b��Yn n decompress/mm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/compr_mm.h * * Memory management for pre-boot and ramdisk uncompressors * * Authors: Alain Knaff <alain@knaff.lu> * */ #ifndef DECOMPR_MM_H #define DECOMPR_MM_H #ifdef STATIC /* Code active when included from pre-boot environment: */ /* * Some architectures want to ensure there is no local data in their * pre-boot environment, so that data can arbitrarily relocated (via * GOT references). This is achieved by defining STATIC_RW_DATA to * be null. */ #ifndef STATIC_RW_DATA #define STATIC_RW_DATA static #endif /* A trivial malloc implementation, adapted from * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 */ STATIC_RW_DATA unsigned long malloc_ptr; STATIC_RW_DATA int malloc_count; static void *malloc(int size) { void *p; if (size < 0) return NULL; if (!malloc_ptr) malloc_ptr = free_mem_ptr; malloc_ptr = (malloc_ptr + 3) & ~3; /* Align */ p = (void *)malloc_ptr; malloc_ptr += size; if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr) return NULL; malloc_count++; return p; } static void free(void *where) { malloc_count--; if (!malloc_count) malloc_ptr = free_mem_ptr; } #define large_malloc(a) malloc(a) #define large_free(a) free(a) #define INIT #else /* STATIC */ /* Code active when compiled standalone for use when loading ramdisk: */ #include <linux/kernel.h> #include <linux/fs.h> #include <linux/string.h> #include <linux/slab.h> #include <linux/vmalloc.h> /* Use defines rather than static inline in order to avoid spurious * warnings when not needed (indeed large_malloc / large_free are not * needed by inflate */ #define malloc(a) kmalloc(a, GFP_KERNEL) #define free(a) kfree(a) #define large_malloc(a) vmalloc(a) #define large_free(a) vfree(a) #define INIT __init #define STATIC #include <linux/init.h> #endif /* STATIC */ #endif /* DECOMPR_MM_H */ PK ! : D�� � decompress/generic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DECOMPRESS_GENERIC_H #define DECOMPRESS_GENERIC_H typedef int (*decompress_fn) (unsigned char *inbuf, long len, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *outbuf, long *posp, void(*error)(char *x)); /* inbuf - input buffer *len - len of pre-read data in inbuf *fill - function to fill inbuf when empty *flush - function to write out outbuf *outbuf - output buffer *posp - if non-null, input position (number of bytes read) will be * returned here * *If len != 0, inbuf should contain all the necessary input data, and fill *should be NULL *If len = 0, inbuf can be NULL, in which case the decompressor will allocate *the input buffer. If inbuf != NULL it must be at least XXX_IOBUF_SIZE bytes. *fill will be called (repeatedly...) to read data, at most XXX_IOBUF_SIZE *bytes should be read per call. Replace XXX with the appropriate decompressor *name, i.e. LZMA_IOBUF_SIZE. * *If flush = NULL, outbuf must be large enough to buffer all the expected *output. If flush != NULL, the output buffer will be allocated by the *decompressor (outbuf = NULL), and the flush function will be called to *flush the output buffer at the appropriate time (decompressor and stream *dependent). */ /* Utility routine to detect the decompression method */ decompress_fn decompress_method(const unsigned char *inbuf, long len, const char **name); #endif PK ! � 9 9 decompress/unzstd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_DECOMPRESS_UNZSTD_H #define LINUX_DECOMPRESS_UNZSTD_H int unzstd(unsigned char *inbuf, long len, long (*fill)(void*, unsigned long), long (*flush)(void*, unsigned long), unsigned char *output, long *pos, void (*error_fn)(char *x)); #endif PK ! 2���� � decompress/unxz.hnu �[��� /* * Wrapper for decompressing XZ-compressed kernel, initramfs, and initrd * * Author: Lasse Collin <lasse.collin@tukaani.org> * * This file has been put into the public domain. * You can do whatever you want with this file. */ #ifndef DECOMPRESS_UNXZ_H #define DECOMPRESS_UNXZ_H int unxz(unsigned char *in, long in_size, long (*fill)(void *dest, unsigned long size), long (*flush)(void *src, unsigned long size), unsigned char *out, long *in_used, void (*error)(char *x)); #endif PK ! ��u� � dsa/brcm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only * Copyright (C) 2014 Broadcom Corporation */ /* Included by drivers/net/ethernet/broadcom/bcmsysport.c and * net/dsa/tag_brcm.c */ #ifndef _NET_DSA_BRCM_H #define _NET_DSA_BRCM_H /* Broadcom tag specific helpers to insert and extract queue/port number */ #define BRCM_TAG_SET_PORT_QUEUE(p, q) ((p) << 8 | q) #define BRCM_TAG_GET_PORT(v) ((v) >> 8) #define BRCM_TAG_GET_QUEUE(v) ((v) & 0xff) #endif PK ! 1��4� � dsa/8021q.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> */ #ifndef _NET_DSA_8021Q_H #define _NET_DSA_8021Q_H #include <linux/refcount.h> #include <linux/types.h> struct dsa_switch; struct sk_buff; struct net_device; struct dsa_tag_8021q_vlan { struct list_head list; int port; u16 vid; refcount_t refcount; }; struct dsa_8021q_context { struct dsa_switch *ds; struct list_head vlans; /* EtherType of RX VID, used for filtering on master interface */ __be16 proto; }; int dsa_tag_8021q_register(struct dsa_switch *ds, __be16 proto); void dsa_tag_8021q_unregister(struct dsa_switch *ds); struct sk_buff *dsa_8021q_xmit(struct sk_buff *skb, struct net_device *netdev, u16 tpid, u16 tci); void dsa_8021q_rcv(struct sk_buff *skb, int *source_port, int *switch_id); int dsa_tag_8021q_bridge_tx_fwd_offload(struct dsa_switch *ds, int port, struct net_device *br, int bridge_num); void dsa_tag_8021q_bridge_tx_fwd_unoffload(struct dsa_switch *ds, int port, struct net_device *br, int bridge_num); u16 dsa_8021q_bridge_tx_fwd_offload_vid(int bridge_num); u16 dsa_8021q_tx_vid(struct dsa_switch *ds, int port); u16 dsa_8021q_rx_vid(struct dsa_switch *ds, int port); int dsa_8021q_rx_switch_id(u16 vid); int dsa_8021q_rx_source_port(u16 vid); bool vid_is_dsa_8021q_rxvlan(u16 vid); bool vid_is_dsa_8021q_txvlan(u16 vid); bool vid_is_dsa_8021q(u16 vid); #endif /* _NET_DSA_8021Q_H */ PK ! ��ZZ+ Z+ dsa/ocelot.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * Copyright 2019-2021 NXP */ #ifndef _NET_DSA_TAG_OCELOT_H #define _NET_DSA_TAG_OCELOT_H #include <linux/kthread.h> #include <linux/packing.h> #include <linux/skbuff.h> struct ocelot_skb_cb { struct sk_buff *clone; unsigned int ptp_class; /* valid only for clones */ u32 tstamp_lo; u8 ptp_cmd; u8 ts_id; }; #define OCELOT_SKB_CB(skb) \ ((struct ocelot_skb_cb *)((skb)->cb)) #define IFH_TAG_TYPE_C 0 #define IFH_TAG_TYPE_S 1 #define IFH_REW_OP_NOOP 0x0 #define IFH_REW_OP_DSCP 0x1 #define IFH_REW_OP_ONE_STEP_PTP 0x2 #define IFH_REW_OP_TWO_STEP_PTP 0x3 #define IFH_REW_OP_ORIGIN_PTP 0x5 #define OCELOT_TAG_LEN 16 #define OCELOT_SHORT_PREFIX_LEN 4 #define OCELOT_LONG_PREFIX_LEN 16 #define OCELOT_TOTAL_TAG_LEN (OCELOT_SHORT_PREFIX_LEN + OCELOT_TAG_LEN) /* The CPU injection header and the CPU extraction header can have 3 types of * prefixes: long, short and no prefix. The format of the header itself is the * same in all 3 cases. * * Extraction with long prefix: * * +-------------------+-------------------+------+------+------------+-------+ * | ff:ff:ff:ff:ff:ff | fe:ff:ff:ff:ff:ff | 8880 | 000a | extraction | frame | * | | | | | header | | * +-------------------+-------------------+------+------+------------+-------+ * 48 bits 48 bits 16 bits 16 bits 128 bits * * Extraction with short prefix: * * +------+------+------------+-------+ * | 8880 | 000a | extraction | frame | * | | | header | | * +------+------+------------+-------+ * 16 bits 16 bits 128 bits * * Extraction with no prefix: * * +------------+-------+ * | extraction | frame | * | header | | * +------------+-------+ * 128 bits * * * Injection with long prefix: * * +-------------------+-------------------+------+------+------------+-------+ * | any dmac | any smac | 8880 | 000a | injection | frame | * | | | | | header | | * +-------------------+-------------------+------+------+------------+-------+ * 48 bits 48 bits 16 bits 16 bits 128 bits * * Injection with short prefix: * * +------+------+------------+-------+ * | 8880 | 000a | injection | frame | * | | | header | | * +------+------+------------+-------+ * 16 bits 16 bits 128 bits * * Injection with no prefix: * * +------------+-------+ * | injection | frame | * | header | | * +------------+-------+ * 128 bits * * The injection header looks like this (network byte order, bit 127 * is part of lowest address byte in memory, bit 0 is part of highest * address byte): * * +------+------+------+------+------+------+------+------+ * 127:120 |BYPASS| MASQ | MASQ_PORT |REW_OP|REW_OP| * +------+------+------+------+------+------+------+------+ * 119:112 | REW_OP | * +------+------+------+------+------+------+------+------+ * 111:104 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 103: 96 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 95: 88 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 87: 80 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 79: 72 | RSV | * +------+------+------+------+------+------+------+------+ * 71: 64 | RSV | DEST | * +------+------+------+------+------+------+------+------+ * 63: 56 | DEST | * +------+------+------+------+------+------+------+------+ * 55: 48 | RSV | * +------+------+------+------+------+------+------+------+ * 47: 40 | RSV | SRC_PORT | RSV |TFRM_TIMER| * +------+------+------+------+------+------+------+------+ * 39: 32 | TFRM_TIMER | RSV | * +------+------+------+------+------+------+------+------+ * 31: 24 | RSV | DP | POP_CNT | CPUQ | * +------+------+------+------+------+------+------+------+ * 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE| * +------+------+------+------+------+------+------+------+ * 15: 8 | PCP | DEI | VID | * +------+------+------+------+------+------+------+------+ * 7: 0 | VID | * +------+------+------+------+------+------+------+------+ * * And the extraction header looks like this: * * +------+------+------+------+------+------+------+------+ * 127:120 | RSV | REW_OP | * +------+------+------+------+------+------+------+------+ * 119:112 | REW_OP | REW_VAL | * +------+------+------+------+------+------+------+------+ * 111:104 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 103: 96 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 95: 88 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 87: 80 | REW_VAL | LLEN | * +------+------+------+------+------+------+------+------+ * 79: 72 | LLEN | WLEN | * +------+------+------+------+------+------+------+------+ * 71: 64 | WLEN | RSV | * +------+------+------+------+------+------+------+------+ * 63: 56 | RSV | * +------+------+------+------+------+------+------+------+ * 55: 48 | RSV | * +------+------+------+------+------+------+------+------+ * 47: 40 | RSV | SRC_PORT | ACL_ID | * +------+------+------+------+------+------+------+------+ * 39: 32 | ACL_ID | RSV | SFLOW_ID | * +------+------+------+------+------+------+------+------+ * 31: 24 |ACL_HIT| DP | LRN_FLAGS | CPUQ | * +------+------+------+------+------+------+------+------+ * 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE| * +------+------+------+------+------+------+------+------+ * 15: 8 | PCP | DEI | VID | * +------+------+------+------+------+------+------+------+ * 7: 0 | VID | * +------+------+------+------+------+------+------+------+ */ struct felix_deferred_xmit_work { struct dsa_port *dp; struct sk_buff *skb; struct kthread_work work; }; struct felix_port { void (*xmit_work_fn)(struct kthread_work *work); struct kthread_worker *xmit_worker; }; static inline void ocelot_xfh_get_rew_val(void *extraction, u64 *rew_val) { packing(extraction, rew_val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0); } static inline void ocelot_xfh_get_len(void *extraction, u64 *len) { u64 llen, wlen; packing(extraction, &llen, 84, 79, OCELOT_TAG_LEN, UNPACK, 0); packing(extraction, &wlen, 78, 71, OCELOT_TAG_LEN, UNPACK, 0); *len = 60 * wlen + llen - 80; } static inline void ocelot_xfh_get_src_port(void *extraction, u64 *src_port) { packing(extraction, src_port, 46, 43, OCELOT_TAG_LEN, UNPACK, 0); } static inline void ocelot_xfh_get_qos_class(void *extraction, u64 *qos_class) { packing(extraction, qos_class, 19, 17, OCELOT_TAG_LEN, UNPACK, 0); } static inline void ocelot_xfh_get_tag_type(void *extraction, u64 *tag_type) { packing(extraction, tag_type, 16, 16, OCELOT_TAG_LEN, UNPACK, 0); } static inline void ocelot_xfh_get_vlan_tci(void *extraction, u64 *vlan_tci) { packing(extraction, vlan_tci, 15, 0, OCELOT_TAG_LEN, UNPACK, 0); } static inline void ocelot_ifh_set_bypass(void *injection, u64 bypass) { packing(injection, &bypass, 127, 127, OCELOT_TAG_LEN, PACK, 0); } static inline void ocelot_ifh_set_rew_op(void *injection, u64 rew_op) { packing(injection, &rew_op, 125, 117, OCELOT_TAG_LEN, PACK, 0); } static inline void ocelot_ifh_set_dest(void *injection, u64 dest) { packing(injection, &dest, 67, 56, OCELOT_TAG_LEN, PACK, 0); } static inline void ocelot_ifh_set_qos_class(void *injection, u64 qos_class) { packing(injection, &qos_class, 19, 17, OCELOT_TAG_LEN, PACK, 0); } static inline void seville_ifh_set_dest(void *injection, u64 dest) { packing(injection, &dest, 67, 57, OCELOT_TAG_LEN, PACK, 0); } static inline void ocelot_ifh_set_src(void *injection, u64 src) { packing(injection, &src, 46, 43, OCELOT_TAG_LEN, PACK, 0); } static inline void ocelot_ifh_set_tag_type(void *injection, u64 tag_type) { packing(injection, &tag_type, 16, 16, OCELOT_TAG_LEN, PACK, 0); } static inline void ocelot_ifh_set_vid(void *injection, u64 vid) { packing(injection, &vid, 11, 0, OCELOT_TAG_LEN, PACK, 0); } /* Determine the PTP REW_OP to use for injecting the given skb */ static inline u32 ocelot_ptp_rew_op(struct sk_buff *skb) { struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone; u8 ptp_cmd = OCELOT_SKB_CB(skb)->ptp_cmd; u32 rew_op = 0; if (ptp_cmd == IFH_REW_OP_TWO_STEP_PTP && clone) { rew_op = ptp_cmd; rew_op |= OCELOT_SKB_CB(clone)->ts_id << 3; } else if (ptp_cmd == IFH_REW_OP_ORIGIN_PTP) { rew_op = ptp_cmd; } return rew_op; } #endif PK ! ���)� � dsa/sja1105.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> */ /* Included by drivers/net/dsa/sja1105/sja1105.h and net/dsa/tag_sja1105.c */ #ifndef _NET_DSA_SJA1105_H #define _NET_DSA_SJA1105_H #include <linux/skbuff.h> #include <linux/etherdevice.h> #include <linux/dsa/8021q.h> #include <net/dsa.h> #define ETH_P_SJA1105 ETH_P_DSA_8021Q #define ETH_P_SJA1105_META 0x0008 #define ETH_P_SJA1110 0xdadc #define SJA1105_DEFAULT_VLAN (VLAN_N_VID - 1) /* IEEE 802.3 Annex 57A: Slow Protocols PDUs (01:80:C2:xx:xx:xx) */ #define SJA1105_LINKLOCAL_FILTER_A 0x0180C2000000ull #define SJA1105_LINKLOCAL_FILTER_A_MASK 0xFFFFFF000000ull /* IEEE 1588 Annex F: Transport of PTP over Ethernet (01:1B:19:xx:xx:xx) */ #define SJA1105_LINKLOCAL_FILTER_B 0x011B19000000ull #define SJA1105_LINKLOCAL_FILTER_B_MASK 0xFFFFFF000000ull /* Source and Destination MAC of follow-up meta frames. * Whereas the choice of SMAC only affects the unique identification of the * switch as sender of meta frames, the DMAC must be an address that is present * in the DSA master port's multicast MAC filter. * 01-80-C2-00-00-0E is a good choice for this, as all profiles of IEEE 1588 * over L2 use this address for some purpose already. */ #define SJA1105_META_SMAC 0x222222222222ull #define SJA1105_META_DMAC 0x0180C200000Eull #define SJA1105_HWTS_RX_EN 0 /* Global tagger data: each struct sja1105_port has a reference to * the structure defined in struct sja1105_private. */ struct sja1105_tagger_data { struct sk_buff *stampable_skb; /* Protects concurrent access to the meta state machine * from taggers running on multiple ports on SMP systems */ spinlock_t meta_lock; unsigned long state; u8 ts_id; /* Used on SJA1110 where meta frames are generated only for * 2-step TX timestamps */ struct sk_buff_head skb_txtstamp_queue; }; struct sja1105_skb_cb { struct sk_buff *clone; u64 tstamp; /* Only valid for packets cloned for 2-step TX timestamping */ u8 ts_id; }; #define SJA1105_SKB_CB(skb) \ ((struct sja1105_skb_cb *)((skb)->cb)) struct sja1105_port { struct kthread_worker *xmit_worker; struct kthread_work xmit_work; struct sk_buff_head xmit_queue; struct sja1105_tagger_data *data; struct dsa_port *dp; bool hwts_tx_en; }; /* Timestamps are in units of 8 ns clock ticks (equivalent to * a fixed 125 MHz clock). */ #define SJA1105_TICK_NS 8 static inline s64 ns_to_sja1105_ticks(s64 ns) { return ns / SJA1105_TICK_NS; } static inline s64 sja1105_ticks_to_ns(s64 ticks) { return ticks * SJA1105_TICK_NS; } static inline bool dsa_port_is_sja1105(struct dsa_port *dp) { return true; } #endif /* _NET_DSA_SJA1105_H */ PK ! ��O� � dsa/mv88e6xxx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * Copyright 2021 NXP */ #ifndef _NET_DSA_TAG_MV88E6XXX_H #define _NET_DSA_TAG_MV88E6XXX_H #include <linux/if_vlan.h> #define MV88E6XXX_VID_STANDALONE 0 #define MV88E6XXX_VID_BRIDGED (VLAN_N_VID - 1) #endif PK ! �>�7� � dsa/lan9303.hnu �[��� /* Included by drivers/net/dsa/lan9303.h and net/dsa/tag_lan9303.c */ #include <linux/if_ether.h> struct lan9303; struct lan9303_phy_ops { /* PHY 1 and 2 access*/ int (*phy_read)(struct lan9303 *chip, int port, int regnum); int (*phy_write)(struct lan9303 *chip, int port, int regnum, u16 val); }; #define LAN9303_NUM_ALR_RECORDS 512 struct lan9303_alr_cache_entry { u8 mac_addr[ETH_ALEN]; u8 port_map; /* Bitmap of ports. Zero if unused entry */ u8 stp_override; /* non zero if set LAN9303_ALR_DAT1_AGE_OVERRID */ }; struct lan9303 { struct device *dev; struct regmap *regmap; struct regmap_irq_chip_data *irq_data; struct gpio_desc *reset_gpio; u32 reset_duration; /* in [ms] */ int phy_addr_base; struct dsa_switch *ds; struct mutex indirect_mutex; /* protect indexed register access */ struct mutex alr_mutex; /* protect ALR access */ const struct lan9303_phy_ops *ops; bool is_bridged; /* true if port 1 and 2 are bridged */ /* remember LAN9303_SWE_PORT_STATE while not bridged */ u32 swe_port_state; /* LAN9303 do not offer reading specific ALR entry. Cache all * static entries in a flat table **/ struct lan9303_alr_cache_entry alr_cache[LAN9303_NUM_ALR_RECORDS]; }; PK ! �A��� � dsa/loop.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DSA_LOOP_H #define DSA_LOOP_H #include <linux/types.h> #include <linux/ethtool.h> #include <net/dsa.h> struct dsa_loop_vlan { u16 members; u16 untagged; }; struct dsa_loop_mib_entry { char name[ETH_GSTRING_LEN]; unsigned long val; }; enum dsa_loop_mib_counters { DSA_LOOP_PHY_READ_OK, DSA_LOOP_PHY_READ_ERR, DSA_LOOP_PHY_WRITE_OK, DSA_LOOP_PHY_WRITE_ERR, __DSA_LOOP_CNT_MAX, }; struct dsa_loop_port { struct dsa_loop_mib_entry mib[__DSA_LOOP_CNT_MAX]; u16 pvid; int mtu; }; struct dsa_loop_priv { struct mii_bus *bus; unsigned int port_base; struct dsa_loop_vlan vlans[VLAN_N_VID]; struct net_device *netdev; struct dsa_loop_port ports[DSA_MAX_PORTS]; }; #endif /* DSA_LOOP_H */ PK ! ����0 0 refcount.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Variant of atomic_t specialized for reference counts. * * The interface matches the atomic_t interface (to aid in porting) but only * provides the few functions one should use for reference counting. * * Saturation semantics * ==================== * * refcount_t differs from atomic_t in that the counter saturates at * REFCOUNT_SATURATED and will not move once there. This avoids wrapping the * counter and causing 'spurious' use-after-free issues. In order to avoid the * cost associated with introducing cmpxchg() loops into all of the saturating * operations, we temporarily allow the counter to take on an unchecked value * and then explicitly set it to REFCOUNT_SATURATED on detecting that underflow * or overflow has occurred. Although this is racy when multiple threads * access the refcount concurrently, by placing REFCOUNT_SATURATED roughly * equidistant from 0 and INT_MAX we minimise the scope for error: * * INT_MAX REFCOUNT_SATURATED UINT_MAX * 0 (0x7fff_ffff) (0xc000_0000) (0xffff_ffff) * +--------------------------------+----------------+----------------+ * <---------- bad value! ----------> * * (in a signed view of the world, the "bad value" range corresponds to * a negative counter value). * * As an example, consider a refcount_inc() operation that causes the counter * to overflow: * * int old = atomic_fetch_add_relaxed(r); * // old is INT_MAX, refcount now INT_MIN (0x8000_0000) * if (old < 0) * atomic_set(r, REFCOUNT_SATURATED); * * If another thread also performs a refcount_inc() operation between the two * atomic operations, then the count will continue to edge closer to 0. If it * reaches a value of 1 before /any/ of the threads reset it to the saturated * value, then a concurrent refcount_dec_and_test() may erroneously free the * underlying object. * Linux limits the maximum number of tasks to PID_MAX_LIMIT, which is currently * 0x400000 (and can't easily be raised in the future beyond FUTEX_TID_MASK). * With the current PID limit, if no batched refcounting operations are used and * the attacker can't repeatedly trigger kernel oopses in the middle of refcount * operations, this makes it impossible for a saturated refcount to leave the * saturation range, even if it is possible for multiple uses of the same * refcount to nest in the context of a single task: * * (UINT_MAX+1-REFCOUNT_SATURATED) / PID_MAX_LIMIT = * 0x40000000 / 0x400000 = 0x100 = 256 * * If hundreds of references are added/removed with a single refcounting * operation, it may potentially be possible to leave the saturation range; but * given the precise timing details involved with the round-robin scheduling of * each thread manipulating the refcount and the need to hit the race multiple * times in succession, there doesn't appear to be a practical avenue of attack * even if using refcount_add() operations with larger increments. * * Memory ordering * =============== * * Memory ordering rules are slightly relaxed wrt regular atomic_t functions * and provide only what is strictly required for refcounts. * * The increments are fully relaxed; these will not provide ordering. The * rationale is that whatever is used to obtain the object we're increasing the * reference count on will provide the ordering. For locked data structures, * its the lock acquire, for RCU/lockless data structures its the dependent * load. * * Do note that inc_not_zero() provides a control dependency which will order * future stores against the inc, this ensures we'll never modify the object * if we did not in fact acquire a reference. * * The decrements will provide release order, such that all the prior loads and * stores will be issued before, it also provides a control dependency, which * will order us against the subsequent free(). * * The control dependency is against the load of the cmpxchg (ll/sc) that * succeeded. This means the stores aren't fully ordered, but this is fine * because the 1->0 transition indicates no concurrency. * * Note that the allocator is responsible for ordering things between free() * and alloc(). * * The decrements dec_and_test() and sub_and_test() also provide acquire * ordering on success. * */ #ifndef _LINUX_REFCOUNT_H #define _LINUX_REFCOUNT_H #include <linux/atomic.h> #include <linux/bug.h> #include <linux/compiler.h> #include <linux/limits.h> #include <linux/spinlock_types.h> struct mutex; /** * typedef refcount_t - variant of atomic_t specialized for reference counts * @refs: atomic_t counter field * * The counter saturates at REFCOUNT_SATURATED and will not move once * there. This avoids wrapping the counter and causing 'spurious' * use-after-free bugs. */ typedef struct refcount_struct { atomic_t refs; } refcount_t; #define REFCOUNT_INIT(n) { .refs = ATOMIC_INIT(n), } #define REFCOUNT_MAX INT_MAX #define REFCOUNT_SATURATED (INT_MIN / 2) enum refcount_saturation_type { REFCOUNT_ADD_NOT_ZERO_OVF, REFCOUNT_ADD_OVF, REFCOUNT_ADD_UAF, REFCOUNT_SUB_UAF, REFCOUNT_DEC_LEAK, }; void refcount_warn_saturate(refcount_t *r, enum refcount_saturation_type t); /** * refcount_set - set a refcount's value * @r: the refcount * @n: value to which the refcount will be set */ static inline void refcount_set(refcount_t *r, int n) { atomic_set(&r->refs, n); } /** * refcount_read - get a refcount's value * @r: the refcount * * Return: the refcount's value */ static inline unsigned int refcount_read(const refcount_t *r) { return atomic_read(&r->refs); } static inline __must_check bool __refcount_add_not_zero(int i, refcount_t *r, int *oldp) { int old = refcount_read(r); do { if (!old) break; } while (!atomic_try_cmpxchg_relaxed(&r->refs, &old, old + i)); if (oldp) *oldp = old; if (unlikely(old < 0 || old + i < 0)) refcount_warn_saturate(r, REFCOUNT_ADD_NOT_ZERO_OVF); return old; } /** * refcount_add_not_zero - add a value to a refcount unless it is 0 * @i: the value to add to the refcount * @r: the refcount * * Will saturate at REFCOUNT_SATURATED and WARN. * * Provides no memory ordering, it is assumed the caller has guaranteed the * object memory to be stable (RCU, etc.). It does provide a control dependency * and thereby orders future stores. See the comment on top. * * Use of this function is not recommended for the normal reference counting * use case in which references are taken and released one at a time. In these * cases, refcount_inc(), or one of its variants, should instead be used to * increment a reference count. * * Return: false if the passed refcount is 0, true otherwise */ static inline __must_check bool refcount_add_not_zero(int i, refcount_t *r) { return __refcount_add_not_zero(i, r, NULL); } static inline void __refcount_add(int i, refcount_t *r, int *oldp) { int old = atomic_fetch_add_relaxed(i, &r->refs); if (oldp) *oldp = old; if (unlikely(!old)) refcount_warn_saturate(r, REFCOUNT_ADD_UAF); else if (unlikely(old < 0 || old + i < 0)) refcount_warn_saturate(r, REFCOUNT_ADD_OVF); } /** * refcount_add - add a value to a refcount * @i: the value to add to the refcount * @r: the refcount * * Similar to atomic_add(), but will saturate at REFCOUNT_SATURATED and WARN. * * Provides no memory ordering, it is assumed the caller has guaranteed the * object memory to be stable (RCU, etc.). It does provide a control dependency * and thereby orders future stores. See the comment on top. * * Use of this function is not recommended for the normal reference counting * use case in which references are taken and released one at a time. In these * cases, refcount_inc(), or one of its variants, should instead be used to * increment a reference count. */ static inline void refcount_add(int i, refcount_t *r) { __refcount_add(i, r, NULL); } static inline __must_check bool __refcount_inc_not_zero(refcount_t *r, int *oldp) { return __refcount_add_not_zero(1, r, oldp); } /** * refcount_inc_not_zero - increment a refcount unless it is 0 * @r: the refcount to increment * * Similar to atomic_inc_not_zero(), but will saturate at REFCOUNT_SATURATED * and WARN. * * Provides no memory ordering, it is assumed the caller has guaranteed the * object memory to be stable (RCU, etc.). It does provide a control dependency * and thereby orders future stores. See the comment on top. * * Return: true if the increment was successful, false otherwise */ static inline __must_check bool refcount_inc_not_zero(refcount_t *r) { return __refcount_inc_not_zero(r, NULL); } static inline void __refcount_inc(refcount_t *r, int *oldp) { __refcount_add(1, r, oldp); } /** * refcount_inc - increment a refcount * @r: the refcount to increment * * Similar to atomic_inc(), but will saturate at REFCOUNT_SATURATED and WARN. * * Provides no memory ordering, it is assumed the caller already has a * reference on the object. * * Will WARN if the refcount is 0, as this represents a possible use-after-free * condition. */ static inline void refcount_inc(refcount_t *r) { __refcount_inc(r, NULL); } static inline __must_check bool __refcount_sub_and_test(int i, refcount_t *r, int *oldp) { int old = atomic_fetch_sub_release(i, &r->refs); if (oldp) *oldp = old; if (old == i) { smp_acquire__after_ctrl_dep(); return true; } if (unlikely(old < 0 || old - i < 0)) refcount_warn_saturate(r, REFCOUNT_SUB_UAF); return false; } /** * refcount_sub_and_test - subtract from a refcount and test if it is 0 * @i: amount to subtract from the refcount * @r: the refcount * * Similar to atomic_dec_and_test(), but it will WARN, return false and * ultimately leak on underflow and will fail to decrement when saturated * at REFCOUNT_SATURATED. * * Provides release memory ordering, such that prior loads and stores are done * before, and provides an acquire ordering on success such that free() * must come after. * * Use of this function is not recommended for the normal reference counting * use case in which references are taken and released one at a time. In these * cases, refcount_dec(), or one of its variants, should instead be used to * decrement a reference count. * * Return: true if the resulting refcount is 0, false otherwise */ static inline __must_check bool refcount_sub_and_test(int i, refcount_t *r) { return __refcount_sub_and_test(i, r, NULL); } static inline __must_check bool __refcount_dec_and_test(refcount_t *r, int *oldp) { return __refcount_sub_and_test(1, r, oldp); } /** * refcount_dec_and_test - decrement a refcount and test if it is 0 * @r: the refcount * * Similar to atomic_dec_and_test(), it will WARN on underflow and fail to * decrement when saturated at REFCOUNT_SATURATED. * * Provides release memory ordering, such that prior loads and stores are done * before, and provides an acquire ordering on success such that free() * must come after. * * Return: true if the resulting refcount is 0, false otherwise */ static inline __must_check bool refcount_dec_and_test(refcount_t *r) { return __refcount_dec_and_test(r, NULL); } static inline void __refcount_dec(refcount_t *r, int *oldp) { int old = atomic_fetch_sub_release(1, &r->refs); if (oldp) *oldp = old; if (unlikely(old <= 1)) refcount_warn_saturate(r, REFCOUNT_DEC_LEAK); } /** * refcount_dec - decrement a refcount * @r: the refcount * * Similar to atomic_dec(), it will WARN on underflow and fail to decrement * when saturated at REFCOUNT_SATURATED. * * Provides release memory ordering, such that prior loads and stores are done * before. */ static inline void refcount_dec(refcount_t *r) { __refcount_dec(r, NULL); } extern __must_check bool refcount_dec_if_one(refcount_t *r); extern __must_check bool refcount_dec_not_one(refcount_t *r); extern __must_check bool refcount_dec_and_mutex_lock(refcount_t *r, struct mutex *lock); extern __must_check bool refcount_dec_and_lock(refcount_t *r, spinlock_t *lock); extern __must_check bool refcount_dec_and_lock_irqsave(refcount_t *r, spinlock_t *lock, unsigned long *flags); #endif /* _LINUX_REFCOUNT_H */ PK ! ��:�� � seg6_genl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SEG6_GENL_H #define _LINUX_SEG6_GENL_H #include <uapi/linux/seg6_genl.h> #endif PK ! ��� � i2c-smbus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * i2c-smbus.h - SMBus extensions to the I2C protocol * * Copyright (C) 2010-2019 Jean Delvare <jdelvare@suse.de> */ #ifndef _LINUX_I2C_SMBUS_H #define _LINUX_I2C_SMBUS_H #include <linux/i2c.h> #include <linux/spinlock.h> #include <linux/workqueue.h> /** * i2c_smbus_alert_setup - platform data for the smbus_alert i2c client * @irq: IRQ number, if the smbus_alert driver should take care of interrupt * handling * * If irq is not specified, the smbus_alert driver doesn't take care of * interrupt handling. In that case it is up to the I2C bus driver to either * handle the interrupts or to poll for alerts. */ struct i2c_smbus_alert_setup { int irq; }; struct i2c_client *i2c_new_smbus_alert_device(struct i2c_adapter *adapter, struct i2c_smbus_alert_setup *setup); int i2c_handle_smbus_alert(struct i2c_client *ara); #if IS_ENABLED(CONFIG_I2C_SMBUS) int i2c_setup_smbus_alert(struct i2c_adapter *adap); #else static inline int i2c_setup_smbus_alert(struct i2c_adapter *adap) { return 0; } #endif #if IS_ENABLED(CONFIG_I2C_SMBUS) && IS_ENABLED(CONFIG_I2C_SLAVE) struct i2c_client *i2c_new_slave_host_notify_device(struct i2c_adapter *adapter); void i2c_free_slave_host_notify_device(struct i2c_client *client); #else static inline struct i2c_client *i2c_new_slave_host_notify_device(struct i2c_adapter *adapter) { return ERR_PTR(-ENOSYS); } static inline void i2c_free_slave_host_notify_device(struct i2c_client *client) { } #endif #if IS_ENABLED(CONFIG_I2C_SMBUS) && IS_ENABLED(CONFIG_DMI) void i2c_register_spd(struct i2c_adapter *adap); #else static inline void i2c_register_spd(struct i2c_adapter *adap) { } #endif #endif /* _LINUX_I2C_SMBUS_H */ PK ! Θ�� � pda_power.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Common power driver for PDAs and phones with one or two external * power supplies (AC/USB) connected to main and backup batteries, * and optional builtin charger. * * Copyright © 2007 Anton Vorontsov <cbou@mail.ru> */ #ifndef __PDA_POWER_H__ #define __PDA_POWER_H__ #define PDA_POWER_CHARGE_AC (1 << 0) #define PDA_POWER_CHARGE_USB (1 << 1) struct device; struct pda_power_pdata { int (*init)(struct device *dev); int (*is_ac_online)(void); int (*is_usb_online)(void); void (*set_charge)(int flags); void (*exit)(struct device *dev); int (*suspend)(pm_message_t state); int (*resume)(void); char **supplied_to; size_t num_supplicants; unsigned int wait_for_status; /* msecs, default is 500 */ unsigned int wait_for_charger; /* msecs, default is 500 */ unsigned int polling_interval; /* msecs, default is 2000 */ unsigned long ac_max_uA; /* current to draw when on AC */ bool use_otg_notifier; }; #endif /* __PDA_POWER_H__ */ PK ! i��G( G( drbd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* drbd.h Kernel module for 2.6.x Kernels This file is part of DRBD by Philipp Reisner and Lars Ellenberg. Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. Copyright (C) 2001-2008, Philipp Reisner <philipp.reisner@linbit.com>. Copyright (C) 2001-2008, Lars Ellenberg <lars.ellenberg@linbit.com>. */ #ifndef DRBD_H #define DRBD_H #include <asm/types.h> #ifdef __KERNEL__ #include <linux/types.h> #include <asm/byteorder.h> #else #include <sys/types.h> #include <sys/wait.h> #include <limits.h> /* Although the Linux source code makes a difference between generic endianness and the bitfields' endianness, there is no architecture as of Linux-2.6.24-rc4 where the bitfields' endianness does not match the generic endianness. */ #if __BYTE_ORDER == __LITTLE_ENDIAN #define __LITTLE_ENDIAN_BITFIELD #elif __BYTE_ORDER == __BIG_ENDIAN #define __BIG_ENDIAN_BITFIELD #else # error "sorry, weird endianness on this box" #endif #endif extern const char *drbd_buildtag(void); #define REL_VERSION "8.4.11" #define API_VERSION 1 #define PRO_VERSION_MIN 86 #define PRO_VERSION_MAX 101 enum drbd_io_error_p { EP_PASS_ON, /* FIXME should the better be named "Ignore"? */ EP_CALL_HELPER, EP_DETACH }; enum drbd_fencing_p { FP_NOT_AVAIL = -1, /* Not a policy */ FP_DONT_CARE = 0, FP_RESOURCE, FP_STONITH }; enum drbd_disconnect_p { DP_RECONNECT, DP_DROP_NET_CONF, DP_FREEZE_IO }; enum drbd_after_sb_p { ASB_DISCONNECT, ASB_DISCARD_YOUNGER_PRI, ASB_DISCARD_OLDER_PRI, ASB_DISCARD_ZERO_CHG, ASB_DISCARD_LEAST_CHG, ASB_DISCARD_LOCAL, ASB_DISCARD_REMOTE, ASB_CONSENSUS, ASB_DISCARD_SECONDARY, ASB_CALL_HELPER, ASB_VIOLENTLY }; enum drbd_on_no_data { OND_IO_ERROR, OND_SUSPEND_IO }; enum drbd_on_congestion { OC_BLOCK, OC_PULL_AHEAD, OC_DISCONNECT, }; enum drbd_read_balancing { RB_PREFER_LOCAL, RB_PREFER_REMOTE, RB_ROUND_ROBIN, RB_LEAST_PENDING, RB_CONGESTED_REMOTE, RB_32K_STRIPING, RB_64K_STRIPING, RB_128K_STRIPING, RB_256K_STRIPING, RB_512K_STRIPING, RB_1M_STRIPING, }; /* KEEP the order, do not delete or insert. Only append. */ enum drbd_ret_code { ERR_CODE_BASE = 100, NO_ERROR = 101, ERR_LOCAL_ADDR = 102, ERR_PEER_ADDR = 103, ERR_OPEN_DISK = 104, ERR_OPEN_MD_DISK = 105, ERR_DISK_NOT_BDEV = 107, ERR_MD_NOT_BDEV = 108, ERR_DISK_TOO_SMALL = 111, ERR_MD_DISK_TOO_SMALL = 112, ERR_BDCLAIM_DISK = 114, ERR_BDCLAIM_MD_DISK = 115, ERR_MD_IDX_INVALID = 116, ERR_IO_MD_DISK = 118, ERR_MD_INVALID = 119, ERR_AUTH_ALG = 120, ERR_AUTH_ALG_ND = 121, ERR_NOMEM = 122, ERR_DISCARD_IMPOSSIBLE = 123, ERR_DISK_CONFIGURED = 124, ERR_NET_CONFIGURED = 125, ERR_MANDATORY_TAG = 126, ERR_MINOR_INVALID = 127, ERR_INTR = 129, /* EINTR */ ERR_RESIZE_RESYNC = 130, ERR_NO_PRIMARY = 131, ERR_RESYNC_AFTER = 132, ERR_RESYNC_AFTER_CYCLE = 133, ERR_PAUSE_IS_SET = 134, ERR_PAUSE_IS_CLEAR = 135, ERR_PACKET_NR = 137, ERR_NO_DISK = 138, ERR_NOT_PROTO_C = 139, ERR_NOMEM_BITMAP = 140, ERR_INTEGRITY_ALG = 141, /* DRBD 8.2 only */ ERR_INTEGRITY_ALG_ND = 142, /* DRBD 8.2 only */ ERR_CPU_MASK_PARSE = 143, /* DRBD 8.2 only */ ERR_CSUMS_ALG = 144, /* DRBD 8.2 only */ ERR_CSUMS_ALG_ND = 145, /* DRBD 8.2 only */ ERR_VERIFY_ALG = 146, /* DRBD 8.2 only */ ERR_VERIFY_ALG_ND = 147, /* DRBD 8.2 only */ ERR_CSUMS_RESYNC_RUNNING= 148, /* DRBD 8.2 only */ ERR_VERIFY_RUNNING = 149, /* DRBD 8.2 only */ ERR_DATA_NOT_CURRENT = 150, ERR_CONNECTED = 151, /* DRBD 8.3 only */ ERR_PERM = 152, ERR_NEED_APV_93 = 153, ERR_STONITH_AND_PROT_A = 154, ERR_CONG_NOT_PROTO_A = 155, ERR_PIC_AFTER_DEP = 156, ERR_PIC_PEER_DEP = 157, ERR_RES_NOT_KNOWN = 158, ERR_RES_IN_USE = 159, ERR_MINOR_CONFIGURED = 160, ERR_MINOR_OR_VOLUME_EXISTS = 161, ERR_INVALID_REQUEST = 162, ERR_NEED_APV_100 = 163, ERR_NEED_ALLOW_TWO_PRI = 164, ERR_MD_UNCLEAN = 165, ERR_MD_LAYOUT_CONNECTED = 166, ERR_MD_LAYOUT_TOO_BIG = 167, ERR_MD_LAYOUT_TOO_SMALL = 168, ERR_MD_LAYOUT_NO_FIT = 169, ERR_IMPLICIT_SHRINK = 170, /* insert new ones above this line */ AFTER_LAST_ERR_CODE }; #define DRBD_PROT_A 1 #define DRBD_PROT_B 2 #define DRBD_PROT_C 3 enum drbd_role { R_UNKNOWN = 0, R_PRIMARY = 1, /* role */ R_SECONDARY = 2, /* role */ R_MASK = 3, }; /* The order of these constants is important. * The lower ones (<C_WF_REPORT_PARAMS) indicate * that there is no socket! * >=C_WF_REPORT_PARAMS ==> There is a socket */ enum drbd_conns { C_STANDALONE, C_DISCONNECTING, /* Temporal state on the way to StandAlone. */ C_UNCONNECTED, /* >= C_UNCONNECTED -> inc_net() succeeds */ /* These temporal states are all used on the way * from >= C_CONNECTED to Unconnected. * The 'disconnect reason' states * I do not allow to change between them. */ C_TIMEOUT, C_BROKEN_PIPE, C_NETWORK_FAILURE, C_PROTOCOL_ERROR, C_TEAR_DOWN, C_WF_CONNECTION, C_WF_REPORT_PARAMS, /* we have a socket */ C_CONNECTED, /* we have introduced each other */ C_STARTING_SYNC_S, /* starting full sync by admin request. */ C_STARTING_SYNC_T, /* starting full sync by admin request. */ C_WF_BITMAP_S, C_WF_BITMAP_T, C_WF_SYNC_UUID, /* All SyncStates are tested with this comparison * xx >= C_SYNC_SOURCE && xx <= C_PAUSED_SYNC_T */ C_SYNC_SOURCE, C_SYNC_TARGET, C_VERIFY_S, C_VERIFY_T, C_PAUSED_SYNC_S, C_PAUSED_SYNC_T, C_AHEAD, C_BEHIND, C_MASK = 31 }; enum drbd_disk_state { D_DISKLESS, D_ATTACHING, /* In the process of reading the meta-data */ D_FAILED, /* Becomes D_DISKLESS as soon as we told it the peer */ /* when >= D_FAILED it is legal to access mdev->ldev */ D_NEGOTIATING, /* Late attaching state, we need to talk to the peer */ D_INCONSISTENT, D_OUTDATED, D_UNKNOWN, /* Only used for the peer, never for myself */ D_CONSISTENT, /* Might be D_OUTDATED, might be D_UP_TO_DATE ... */ D_UP_TO_DATE, /* Only this disk state allows applications' IO ! */ D_MASK = 15 }; union drbd_state { /* According to gcc's docs is the ... * The order of allocation of bit-fields within a unit (C90 6.5.2.1, C99 6.7.2.1). * Determined by ABI. * pointed out by Maxim Uvarov q<muvarov@ru.mvista.com> * even though we transmit as "cpu_to_be32(state)", * the offsets of the bitfields still need to be swapped * on different endianness. */ struct { #if defined(__LITTLE_ENDIAN_BITFIELD) unsigned role:2 ; /* 3/4 primary/secondary/unknown */ unsigned peer:2 ; /* 3/4 primary/secondary/unknown */ unsigned conn:5 ; /* 17/32 cstates */ unsigned disk:4 ; /* 8/16 from D_DISKLESS to D_UP_TO_DATE */ unsigned pdsk:4 ; /* 8/16 from D_DISKLESS to D_UP_TO_DATE */ unsigned susp:1 ; /* 2/2 IO suspended no/yes (by user) */ unsigned aftr_isp:1 ; /* isp .. imposed sync pause */ unsigned peer_isp:1 ; unsigned user_isp:1 ; unsigned susp_nod:1 ; /* IO suspended because no data */ unsigned susp_fen:1 ; /* IO suspended because fence peer handler runs*/ unsigned _pad:9; /* 0 unused */ #elif defined(__BIG_ENDIAN_BITFIELD) unsigned _pad:9; unsigned susp_fen:1 ; unsigned susp_nod:1 ; unsigned user_isp:1 ; unsigned peer_isp:1 ; unsigned aftr_isp:1 ; /* isp .. imposed sync pause */ unsigned susp:1 ; /* 2/2 IO suspended no/yes */ unsigned pdsk:4 ; /* 8/16 from D_DISKLESS to D_UP_TO_DATE */ unsigned disk:4 ; /* 8/16 from D_DISKLESS to D_UP_TO_DATE */ unsigned conn:5 ; /* 17/32 cstates */ unsigned peer:2 ; /* 3/4 primary/secondary/unknown */ unsigned role:2 ; /* 3/4 primary/secondary/unknown */ #else # error "this endianness is not supported" #endif }; unsigned int i; }; enum drbd_state_rv { SS_CW_NO_NEED = 4, SS_CW_SUCCESS = 3, SS_NOTHING_TO_DO = 2, SS_SUCCESS = 1, SS_UNKNOWN_ERROR = 0, /* Used to sleep longer in _drbd_request_state */ SS_TWO_PRIMARIES = -1, SS_NO_UP_TO_DATE_DISK = -2, SS_NO_LOCAL_DISK = -4, SS_NO_REMOTE_DISK = -5, SS_CONNECTED_OUTDATES = -6, SS_PRIMARY_NOP = -7, SS_RESYNC_RUNNING = -8, SS_ALREADY_STANDALONE = -9, SS_CW_FAILED_BY_PEER = -10, SS_IS_DISKLESS = -11, SS_DEVICE_IN_USE = -12, SS_NO_NET_CONFIG = -13, SS_NO_VERIFY_ALG = -14, /* drbd-8.2 only */ SS_NEED_CONNECTION = -15, /* drbd-8.2 only */ SS_LOWER_THAN_OUTDATED = -16, SS_NOT_SUPPORTED = -17, /* drbd-8.2 only */ SS_IN_TRANSIENT_STATE = -18, /* Retry after the next state change */ SS_CONCURRENT_ST_CHG = -19, /* Concurrent cluster side state change! */ SS_O_VOL_PEER_PRI = -20, SS_OUTDATE_WO_CONN = -21, SS_AFTER_LAST_ERROR = -22, /* Keep this at bottom */ }; #define SHARED_SECRET_MAX 64 #define MDF_CONSISTENT (1 << 0) #define MDF_PRIMARY_IND (1 << 1) #define MDF_CONNECTED_IND (1 << 2) #define MDF_FULL_SYNC (1 << 3) #define MDF_WAS_UP_TO_DATE (1 << 4) #define MDF_PEER_OUT_DATED (1 << 5) #define MDF_CRASHED_PRIMARY (1 << 6) #define MDF_AL_CLEAN (1 << 7) #define MDF_AL_DISABLED (1 << 8) #define MAX_PEERS 32 enum drbd_uuid_index { UI_CURRENT, UI_BITMAP, UI_HISTORY_START, UI_HISTORY_END, UI_SIZE, /* nl-packet: number of dirty bits */ UI_FLAGS, /* nl-packet: flags */ UI_EXTENDED_SIZE /* Everything. */ }; #define HISTORY_UUIDS MAX_PEERS enum drbd_timeout_flag { UT_DEFAULT = 0, UT_DEGRADED = 1, UT_PEER_OUTDATED = 2, }; enum drbd_notification_type { NOTIFY_EXISTS, NOTIFY_CREATE, NOTIFY_CHANGE, NOTIFY_DESTROY, NOTIFY_CALL, NOTIFY_RESPONSE, NOTIFY_CONTINUES = 0x8000, NOTIFY_FLAGS = NOTIFY_CONTINUES, }; enum drbd_peer_state { P_INCONSISTENT = 3, P_OUTDATED = 4, P_DOWN = 5, P_PRIMARY = 6, P_FENCING = 7, }; #define UUID_JUST_CREATED ((__u64)4) enum write_ordering_e { WO_NONE, WO_DRAIN_IO, WO_BDEV_FLUSH, WO_BIO_BARRIER }; /* magic numbers used in meta data and network packets */ #define DRBD_MAGIC 0x83740267 #define DRBD_MAGIC_BIG 0x835a #define DRBD_MAGIC_100 0x8620ec20 #define DRBD_MD_MAGIC_07 (DRBD_MAGIC+3) #define DRBD_MD_MAGIC_08 (DRBD_MAGIC+4) #define DRBD_MD_MAGIC_84_UNCLEAN (DRBD_MAGIC+5) /* how I came up with this magic? * base64 decode "actlog==" ;) */ #define DRBD_AL_MAGIC 0x69cb65a2 /* these are of type "int" */ #define DRBD_MD_INDEX_INTERNAL -1 #define DRBD_MD_INDEX_FLEX_EXT -2 #define DRBD_MD_INDEX_FLEX_INT -3 #define DRBD_CPU_MASK_SIZE 32 #endif PK ! �}�;� � hid-roccat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __HID_ROCCAT_H #define __HID_ROCCAT_H /* * Copyright (c) 2010 Stefan Achatz <erazor_de@users.sourceforge.net> */ /* */ #include <linux/hid.h> #include <linux/types.h> #define ROCCATIOCGREPSIZE _IOR('H', 0xf1, int) #ifdef __KERNEL__ int roccat_connect(struct class *klass, struct hid_device *hid, int report_size); void roccat_disconnect(int minor); int roccat_report_event(int minor, u8 const *data); #endif #endif PK ! f:}[� � list_nulls.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LIST_NULLS_H #define _LINUX_LIST_NULLS_H #include <linux/poison.h> #include <linux/const.h> /* * Special version of lists, where end of list is not a NULL pointer, * but a 'nulls' marker, which can have many different values. * (up to 2^31 different values guaranteed on all platforms) * * In the standard hlist, termination of a list is the NULL pointer. * In this special 'nulls' variant, we use the fact that objects stored in * a list are aligned on a word (4 or 8 bytes alignment). * We therefore use the last significant bit of 'ptr' : * Set to 1 : This is a 'nulls' end-of-list marker (ptr >> 1) * Set to 0 : This is a pointer to some object (ptr) */ struct hlist_nulls_head { struct hlist_nulls_node *first; }; struct hlist_nulls_node { struct hlist_nulls_node *next, **pprev; }; #define NULLS_MARKER(value) (1UL | (((long)value) << 1)) #define INIT_HLIST_NULLS_HEAD(ptr, nulls) \ ((ptr)->first = (struct hlist_nulls_node *) NULLS_MARKER(nulls)) #define hlist_nulls_entry(ptr, type, member) container_of(ptr,type,member) #define hlist_nulls_entry_safe(ptr, type, member) \ ({ typeof(ptr) ____ptr = (ptr); \ !is_a_nulls(____ptr) ? hlist_nulls_entry(____ptr, type, member) : NULL; \ }) /** * ptr_is_a_nulls - Test if a ptr is a nulls * @ptr: ptr to be tested * */ static inline int is_a_nulls(const struct hlist_nulls_node *ptr) { return ((unsigned long)ptr & 1); } /** * get_nulls_value - Get the 'nulls' value of the end of chain * @ptr: end of chain * * Should be called only if is_a_nulls(ptr); */ static inline unsigned long get_nulls_value(const struct hlist_nulls_node *ptr) { return ((unsigned long)ptr) >> 1; } /** * hlist_nulls_unhashed - Has node been removed and reinitialized? * @h: Node to be checked * * Not that not all removal functions will leave a node in unhashed state. * For example, hlist_del_init_rcu() leaves the node in unhashed state, * but hlist_nulls_del() does not. */ static inline int hlist_nulls_unhashed(const struct hlist_nulls_node *h) { return !h->pprev; } /** * hlist_nulls_unhashed_lockless - Has node been removed and reinitialized? * @h: Node to be checked * * Not that not all removal functions will leave a node in unhashed state. * For example, hlist_del_init_rcu() leaves the node in unhashed state, * but hlist_nulls_del() does not. Unlike hlist_nulls_unhashed(), this * function may be used locklessly. */ static inline int hlist_nulls_unhashed_lockless(const struct hlist_nulls_node *h) { return !READ_ONCE(h->pprev); } static inline int hlist_nulls_empty(const struct hlist_nulls_head *h) { return is_a_nulls(READ_ONCE(h->first)); } static inline void hlist_nulls_add_head(struct hlist_nulls_node *n, struct hlist_nulls_head *h) { struct hlist_nulls_node *first = h->first; n->next = first; WRITE_ONCE(n->pprev, &h->first); h->first = n; if (!is_a_nulls(first)) WRITE_ONCE(first->pprev, &n->next); } static inline void __hlist_nulls_del(struct hlist_nulls_node *n) { struct hlist_nulls_node *next = n->next; struct hlist_nulls_node **pprev = n->pprev; WRITE_ONCE(*pprev, next); if (!is_a_nulls(next)) WRITE_ONCE(next->pprev, pprev); } static inline void hlist_nulls_del(struct hlist_nulls_node *n) { __hlist_nulls_del(n); WRITE_ONCE(n->pprev, LIST_POISON2); } /** * hlist_nulls_for_each_entry - iterate over list of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_node to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. * */ #define hlist_nulls_for_each_entry(tpos, pos, head, member) \ for (pos = (head)->first; \ (!is_a_nulls(pos)) && \ ({ tpos = hlist_nulls_entry(pos, typeof(*tpos), member); 1;}); \ pos = pos->next) /** * hlist_nulls_for_each_entry_from - iterate over a hlist continuing from current point * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_node to use as a loop cursor. * @member: the name of the hlist_node within the struct. * */ #define hlist_nulls_for_each_entry_from(tpos, pos, member) \ for (; (!is_a_nulls(pos)) && \ ({ tpos = hlist_nulls_entry(pos, typeof(*tpos), member); 1;}); \ pos = pos->next) #endif PK ! '� Jp p bsearch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BSEARCH_H #define _LINUX_BSEARCH_H #include <linux/types.h> static __always_inline void *__inline_bsearch(const void *key, const void *base, size_t num, size_t size, cmp_func_t cmp) { const char *pivot; int result; while (num > 0) { pivot = base + (num >> 1) * size; result = cmp(key, pivot); if (result == 0) return (void *)pivot; if (result > 0) { base = pivot + size; num--; } num >>= 1; } return NULL; } extern void *bsearch(const void *key, const void *base, size_t num, size_t size, cmp_func_t cmp); #endif /* _LINUX_BSEARCH_H */ PK ! �*�pP P context_tracking_state.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CONTEXT_TRACKING_STATE_H #define _LINUX_CONTEXT_TRACKING_STATE_H #include <linux/percpu.h> #include <linux/static_key.h> struct context_tracking { /* * When active is false, probes are unset in order * to minimize overhead: TIF flags are cleared * and calls to user_enter/exit are ignored. This * may be further optimized using static keys. */ bool active; int recursion; enum ctx_state { CONTEXT_DISABLED = -1, /* returned by ct_state() if unknown */ CONTEXT_KERNEL = 0, CONTEXT_USER, CONTEXT_GUEST, } state; }; #ifdef CONFIG_CONTEXT_TRACKING extern struct static_key_false context_tracking_key; DECLARE_PER_CPU(struct context_tracking, context_tracking); static __always_inline bool context_tracking_enabled(void) { return static_branch_unlikely(&context_tracking_key); } static __always_inline bool context_tracking_enabled_cpu(int cpu) { return context_tracking_enabled() && per_cpu(context_tracking.active, cpu); } static inline bool context_tracking_enabled_this_cpu(void) { return context_tracking_enabled() && __this_cpu_read(context_tracking.active); } static __always_inline bool context_tracking_in_user(void) { return __this_cpu_read(context_tracking.state) == CONTEXT_USER; } #else static inline bool context_tracking_in_user(void) { return false; } static inline bool context_tracking_enabled(void) { return false; } static inline bool context_tracking_enabled_cpu(int cpu) { return false; } static inline bool context_tracking_enabled_this_cpu(void) { return false; } #endif /* CONFIG_CONTEXT_TRACKING */ #endif PK ! g��� � smp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SMP_H #define __LINUX_SMP_H /* * Generic SMP support * Alan Cox. <alan@redhat.com> */ #include <linux/errno.h> #include <linux/types.h> #include <linux/list.h> #include <linux/cpumask.h> #include <linux/init.h> #include <linux/smp_types.h> typedef void (*smp_call_func_t)(void *info); typedef bool (*smp_cond_func_t)(int cpu, void *info); /* * structure shares (partial) layout with struct irq_work */ struct __call_single_data { struct __call_single_node node; smp_call_func_t func; void *info; }; #define CSD_INIT(_func, _info) \ (struct __call_single_data){ .func = (_func), .info = (_info), } /* Use __aligned() to avoid to use 2 cache lines for 1 csd */ typedef struct __call_single_data call_single_data_t __aligned(sizeof(struct __call_single_data)); #define INIT_CSD(_csd, _func, _info) \ do { \ *(_csd) = CSD_INIT((_func), (_info)); \ } while (0) /* * Enqueue a llist_node on the call_single_queue; be very careful, read * flush_smp_call_function_queue() in detail. */ extern void __smp_call_single_queue(int cpu, struct llist_node *node); /* total number of cpus in this system (may exceed NR_CPUS) */ extern unsigned int total_cpus; int smp_call_function_single(int cpuid, smp_call_func_t func, void *info, int wait); void on_each_cpu_cond_mask(smp_cond_func_t cond_func, smp_call_func_t func, void *info, bool wait, const struct cpumask *mask); int smp_call_function_single_async(int cpu, struct __call_single_data *csd); /* * Cpus stopping functions in panic. All have default weak definitions. * Architecture-dependent code may override them. */ void panic_smp_self_stop(void); void nmi_panic_self_stop(struct pt_regs *regs); void crash_smp_send_stop(void); /* * Call a function on all processors */ static inline void on_each_cpu(smp_call_func_t func, void *info, int wait) { on_each_cpu_cond_mask(NULL, func, info, wait, cpu_online_mask); } /** * on_each_cpu_mask(): Run a function on processors specified by * cpumask, which may include the local processor. * @mask: The set of cpus to run on (only runs on online subset). * @func: The function to run. This must be fast and non-blocking. * @info: An arbitrary pointer to pass to the function. * @wait: If true, wait (atomically) until function has completed * on other CPUs. * * If @wait is true, then returns once @func has returned. * * You must not call this function with disabled interrupts or from a * hardware interrupt handler or from a bottom half handler. The * exception is that it may be used during early boot while * early_boot_irqs_disabled is set. */ static inline void on_each_cpu_mask(const struct cpumask *mask, smp_call_func_t func, void *info, bool wait) { on_each_cpu_cond_mask(NULL, func, info, wait, mask); } /* * Call a function on each processor for which the supplied function * cond_func returns a positive value. This may include the local * processor. May be used during early boot while early_boot_irqs_disabled is * set. Use local_irq_save/restore() instead of local_irq_disable/enable(). */ static inline void on_each_cpu_cond(smp_cond_func_t cond_func, smp_call_func_t func, void *info, bool wait) { on_each_cpu_cond_mask(cond_func, func, info, wait, cpu_online_mask); } #ifdef CONFIG_SMP #include <linux/preempt.h> #include <linux/kernel.h> #include <linux/compiler.h> #include <linux/thread_info.h> #include <asm/smp.h> /* * main cross-CPU interfaces, handles INIT, TLB flush, STOP, etc. * (defined in asm header): */ /* * stops all CPUs but the current one: */ extern void smp_send_stop(void); /* * sends a 'reschedule' event to another CPU: */ extern void smp_send_reschedule(int cpu); /* * Prepare machine for booting other CPUs. */ extern void smp_prepare_cpus(unsigned int max_cpus); /* * Bring a CPU up */ extern int __cpu_up(unsigned int cpunum, struct task_struct *tidle); /* * Final polishing of CPUs */ extern void smp_cpus_done(unsigned int max_cpus); /* * Call a function on all other processors */ void smp_call_function(smp_call_func_t func, void *info, int wait); void smp_call_function_many(const struct cpumask *mask, smp_call_func_t func, void *info, bool wait); int smp_call_function_any(const struct cpumask *mask, smp_call_func_t func, void *info, int wait); void kick_all_cpus_sync(void); void wake_up_all_idle_cpus(void); /* * Generic and arch helpers */ void __init call_function_init(void); void generic_smp_call_function_single_interrupt(void); #define generic_smp_call_function_interrupt \ generic_smp_call_function_single_interrupt /* * Mark the boot cpu "online" so that it can call console drivers in * printk() and can access its per-cpu storage. */ void smp_prepare_boot_cpu(void); extern unsigned int setup_max_cpus; extern void __init setup_nr_cpu_ids(void); extern void __init smp_init(void); extern int __boot_cpu_id; static inline int get_boot_cpu_id(void) { return __boot_cpu_id; } #else /* !SMP */ static inline void smp_send_stop(void) { } /* * These macros fold the SMP functionality into a single CPU system */ #define raw_smp_processor_id() 0 static inline void up_smp_call_function(smp_call_func_t func, void *info) { } #define smp_call_function(func, info, wait) \ (up_smp_call_function(func, info)) static inline void smp_send_reschedule(int cpu) { } #define smp_prepare_boot_cpu() do {} while (0) #define smp_call_function_many(mask, func, info, wait) \ (up_smp_call_function(func, info)) static inline void call_function_init(void) { } static inline int smp_call_function_any(const struct cpumask *mask, smp_call_func_t func, void *info, int wait) { return smp_call_function_single(0, func, info, wait); } static inline void kick_all_cpus_sync(void) { } static inline void wake_up_all_idle_cpus(void) { } #ifdef CONFIG_UP_LATE_INIT extern void __init up_late_init(void); static inline void smp_init(void) { up_late_init(); } #else static inline void smp_init(void) { } #endif static inline int get_boot_cpu_id(void) { return 0; } #endif /* !SMP */ /** * raw_processor_id() - get the current (unstable) CPU id * * For then you know what you are doing and need an unstable * CPU id. */ /** * smp_processor_id() - get the current (stable) CPU id * * This is the normal accessor to the CPU id and should be used * whenever possible. * * The CPU id is stable when: * * - IRQs are disabled; * - preemption is disabled; * - the task is CPU affine. * * When CONFIG_DEBUG_PREEMPT; we verify these assumption and WARN * when smp_processor_id() is used when the CPU id is not stable. */ /* * Allow the architecture to differentiate between a stable and unstable read. * For example, x86 uses an IRQ-safe asm-volatile read for the unstable but a * regular asm read for the stable. */ #ifndef __smp_processor_id #define __smp_processor_id(x) raw_smp_processor_id(x) #endif #ifdef CONFIG_DEBUG_PREEMPT extern unsigned int debug_smp_processor_id(void); # define smp_processor_id() debug_smp_processor_id() #else # define smp_processor_id() __smp_processor_id() #endif #define get_cpu() ({ preempt_disable(); __smp_processor_id(); }) #define put_cpu() preempt_enable() /* * Callback to arch code if there's nosmp or maxcpus=0 on the * boot command line: */ extern void arch_disable_smp_support(void); extern void arch_thaw_secondary_cpus_begin(void); extern void arch_thaw_secondary_cpus_end(void); void smp_setup_processor_id(void); int smp_call_on_cpu(unsigned int cpu, int (*func)(void *), void *par, bool phys); /* SMP core functions */ int smpcfd_prepare_cpu(unsigned int cpu); int smpcfd_dead_cpu(unsigned int cpu); int smpcfd_dying_cpu(unsigned int cpu); #endif /* __LINUX_SMP_H */ PK ! ��U�+ + z2_battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_Z2_BATTERY_H #define _LINUX_Z2_BATTERY_H struct z2_battery_info { int batt_I2C_bus; int batt_I2C_addr; int batt_I2C_reg; int min_voltage; int max_voltage; int batt_div; int batt_mult; int batt_tech; char *batt_name; }; #endif PK ! �@��z z hidraw.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2007 Jiri Kosina */ #ifndef _HIDRAW_H #define _HIDRAW_H #include <uapi/linux/hidraw.h> struct hidraw { unsigned int minor; int exist; int open; wait_queue_head_t wait; struct hid_device *hid; struct device *dev; spinlock_t list_lock; struct list_head list; }; struct hidraw_report { __u8 *value; int len; }; struct hidraw_list { struct hidraw_report buffer[HIDRAW_BUFFER_SIZE]; int head; int tail; struct fasync_struct *fasync; struct hidraw *hidraw; struct list_head node; struct mutex read_mutex; }; #ifdef CONFIG_HIDRAW int hidraw_init(void); void hidraw_exit(void); int hidraw_report_event(struct hid_device *, u8 *, int); int hidraw_connect(struct hid_device *); void hidraw_disconnect(struct hid_device *); #else static inline int hidraw_init(void) { return 0; } static inline void hidraw_exit(void) { } static inline int hidraw_report_event(struct hid_device *hid, u8 *data, int len) { return 0; } static inline int hidraw_connect(struct hid_device *hid) { return -1; } static inline void hidraw_disconnect(struct hid_device *hid) { } #endif #endif PK ! u(��; ; hwmon.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* hwmon.h - part of lm_sensors, Linux kernel modules for hardware monitoring This file declares helper functions for the sysfs class "hwmon", for use by sensors drivers. Copyright (C) 2005 Mark M. Hoffman <mhoffman@lightlink.com> */ #ifndef _HWMON_H_ #define _HWMON_H_ #include <linux/bitops.h> struct device; struct attribute_group; enum hwmon_sensor_types { hwmon_chip, hwmon_temp, hwmon_in, hwmon_curr, hwmon_power, hwmon_energy, hwmon_humidity, hwmon_fan, hwmon_pwm, hwmon_intrusion, hwmon_max, }; enum hwmon_chip_attributes { hwmon_chip_temp_reset_history, hwmon_chip_in_reset_history, hwmon_chip_curr_reset_history, hwmon_chip_power_reset_history, hwmon_chip_register_tz, hwmon_chip_update_interval, hwmon_chip_alarms, hwmon_chip_samples, hwmon_chip_curr_samples, hwmon_chip_in_samples, hwmon_chip_power_samples, hwmon_chip_temp_samples, }; #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history) #define HWMON_C_IN_RESET_HISTORY BIT(hwmon_chip_in_reset_history) #define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history) #define HWMON_C_POWER_RESET_HISTORY BIT(hwmon_chip_power_reset_history) #define HWMON_C_REGISTER_TZ BIT(hwmon_chip_register_tz) #define HWMON_C_UPDATE_INTERVAL BIT(hwmon_chip_update_interval) #define HWMON_C_ALARMS BIT(hwmon_chip_alarms) #define HWMON_C_SAMPLES BIT(hwmon_chip_samples) #define HWMON_C_CURR_SAMPLES BIT(hwmon_chip_curr_samples) #define HWMON_C_IN_SAMPLES BIT(hwmon_chip_in_samples) #define HWMON_C_POWER_SAMPLES BIT(hwmon_chip_power_samples) #define HWMON_C_TEMP_SAMPLES BIT(hwmon_chip_temp_samples) enum hwmon_temp_attributes { hwmon_temp_enable, hwmon_temp_input, hwmon_temp_type, hwmon_temp_lcrit, hwmon_temp_lcrit_hyst, hwmon_temp_min, hwmon_temp_min_hyst, hwmon_temp_max, hwmon_temp_max_hyst, hwmon_temp_crit, hwmon_temp_crit_hyst, hwmon_temp_emergency, hwmon_temp_emergency_hyst, hwmon_temp_alarm, hwmon_temp_lcrit_alarm, hwmon_temp_min_alarm, hwmon_temp_max_alarm, hwmon_temp_crit_alarm, hwmon_temp_emergency_alarm, hwmon_temp_fault, hwmon_temp_offset, hwmon_temp_label, hwmon_temp_lowest, hwmon_temp_highest, hwmon_temp_reset_history, hwmon_temp_rated_min, hwmon_temp_rated_max, }; #define HWMON_T_ENABLE BIT(hwmon_temp_enable) #define HWMON_T_INPUT BIT(hwmon_temp_input) #define HWMON_T_TYPE BIT(hwmon_temp_type) #define HWMON_T_LCRIT BIT(hwmon_temp_lcrit) #define HWMON_T_LCRIT_HYST BIT(hwmon_temp_lcrit_hyst) #define HWMON_T_MIN BIT(hwmon_temp_min) #define HWMON_T_MIN_HYST BIT(hwmon_temp_min_hyst) #define HWMON_T_MAX BIT(hwmon_temp_max) #define HWMON_T_MAX_HYST BIT(hwmon_temp_max_hyst) #define HWMON_T_CRIT BIT(hwmon_temp_crit) #define HWMON_T_CRIT_HYST BIT(hwmon_temp_crit_hyst) #define HWMON_T_EMERGENCY BIT(hwmon_temp_emergency) #define HWMON_T_EMERGENCY_HYST BIT(hwmon_temp_emergency_hyst) #define HWMON_T_ALARM BIT(hwmon_temp_alarm) #define HWMON_T_MIN_ALARM BIT(hwmon_temp_min_alarm) #define HWMON_T_MAX_ALARM BIT(hwmon_temp_max_alarm) #define HWMON_T_CRIT_ALARM BIT(hwmon_temp_crit_alarm) #define HWMON_T_LCRIT_ALARM BIT(hwmon_temp_lcrit_alarm) #define HWMON_T_EMERGENCY_ALARM BIT(hwmon_temp_emergency_alarm) #define HWMON_T_FAULT BIT(hwmon_temp_fault) #define HWMON_T_OFFSET BIT(hwmon_temp_offset) #define HWMON_T_LABEL BIT(hwmon_temp_label) #define HWMON_T_LOWEST BIT(hwmon_temp_lowest) #define HWMON_T_HIGHEST BIT(hwmon_temp_highest) #define HWMON_T_RESET_HISTORY BIT(hwmon_temp_reset_history) #define HWMON_T_RATED_MIN BIT(hwmon_temp_rated_min) #define HWMON_T_RATED_MAX BIT(hwmon_temp_rated_max) enum hwmon_in_attributes { hwmon_in_enable, hwmon_in_input, hwmon_in_min, hwmon_in_max, hwmon_in_lcrit, hwmon_in_crit, hwmon_in_average, hwmon_in_lowest, hwmon_in_highest, hwmon_in_reset_history, hwmon_in_label, hwmon_in_alarm, hwmon_in_min_alarm, hwmon_in_max_alarm, hwmon_in_lcrit_alarm, hwmon_in_crit_alarm, hwmon_in_rated_min, hwmon_in_rated_max, }; #define HWMON_I_ENABLE BIT(hwmon_in_enable) #define HWMON_I_INPUT BIT(hwmon_in_input) #define HWMON_I_MIN BIT(hwmon_in_min) #define HWMON_I_MAX BIT(hwmon_in_max) #define HWMON_I_LCRIT BIT(hwmon_in_lcrit) #define HWMON_I_CRIT BIT(hwmon_in_crit) #define HWMON_I_AVERAGE BIT(hwmon_in_average) #define HWMON_I_LOWEST BIT(hwmon_in_lowest) #define HWMON_I_HIGHEST BIT(hwmon_in_highest) #define HWMON_I_RESET_HISTORY BIT(hwmon_in_reset_history) #define HWMON_I_LABEL BIT(hwmon_in_label) #define HWMON_I_ALARM BIT(hwmon_in_alarm) #define HWMON_I_MIN_ALARM BIT(hwmon_in_min_alarm) #define HWMON_I_MAX_ALARM BIT(hwmon_in_max_alarm) #define HWMON_I_LCRIT_ALARM BIT(hwmon_in_lcrit_alarm) #define HWMON_I_CRIT_ALARM BIT(hwmon_in_crit_alarm) #define HWMON_I_RATED_MIN BIT(hwmon_in_rated_min) #define HWMON_I_RATED_MAX BIT(hwmon_in_rated_max) enum hwmon_curr_attributes { hwmon_curr_enable, hwmon_curr_input, hwmon_curr_min, hwmon_curr_max, hwmon_curr_lcrit, hwmon_curr_crit, hwmon_curr_average, hwmon_curr_lowest, hwmon_curr_highest, hwmon_curr_reset_history, hwmon_curr_label, hwmon_curr_alarm, hwmon_curr_min_alarm, hwmon_curr_max_alarm, hwmon_curr_lcrit_alarm, hwmon_curr_crit_alarm, hwmon_curr_rated_min, hwmon_curr_rated_max, }; #define HWMON_C_ENABLE BIT(hwmon_curr_enable) #define HWMON_C_INPUT BIT(hwmon_curr_input) #define HWMON_C_MIN BIT(hwmon_curr_min) #define HWMON_C_MAX BIT(hwmon_curr_max) #define HWMON_C_LCRIT BIT(hwmon_curr_lcrit) #define HWMON_C_CRIT BIT(hwmon_curr_crit) #define HWMON_C_AVERAGE BIT(hwmon_curr_average) #define HWMON_C_LOWEST BIT(hwmon_curr_lowest) #define HWMON_C_HIGHEST BIT(hwmon_curr_highest) #define HWMON_C_RESET_HISTORY BIT(hwmon_curr_reset_history) #define HWMON_C_LABEL BIT(hwmon_curr_label) #define HWMON_C_ALARM BIT(hwmon_curr_alarm) #define HWMON_C_MIN_ALARM BIT(hwmon_curr_min_alarm) #define HWMON_C_MAX_ALARM BIT(hwmon_curr_max_alarm) #define HWMON_C_LCRIT_ALARM BIT(hwmon_curr_lcrit_alarm) #define HWMON_C_CRIT_ALARM BIT(hwmon_curr_crit_alarm) #define HWMON_C_RATED_MIN BIT(hwmon_curr_rated_min) #define HWMON_C_RATED_MAX BIT(hwmon_curr_rated_max) enum hwmon_power_attributes { hwmon_power_enable, hwmon_power_average, hwmon_power_average_interval, hwmon_power_average_interval_max, hwmon_power_average_interval_min, hwmon_power_average_highest, hwmon_power_average_lowest, hwmon_power_average_max, hwmon_power_average_min, hwmon_power_input, hwmon_power_input_highest, hwmon_power_input_lowest, hwmon_power_reset_history, hwmon_power_accuracy, hwmon_power_cap, hwmon_power_cap_hyst, hwmon_power_cap_max, hwmon_power_cap_min, hwmon_power_min, hwmon_power_max, hwmon_power_crit, hwmon_power_lcrit, hwmon_power_label, hwmon_power_alarm, hwmon_power_cap_alarm, hwmon_power_min_alarm, hwmon_power_max_alarm, hwmon_power_lcrit_alarm, hwmon_power_crit_alarm, hwmon_power_rated_min, hwmon_power_rated_max, }; #define HWMON_P_ENABLE BIT(hwmon_power_enable) #define HWMON_P_AVERAGE BIT(hwmon_power_average) #define HWMON_P_AVERAGE_INTERVAL BIT(hwmon_power_average_interval) #define HWMON_P_AVERAGE_INTERVAL_MAX BIT(hwmon_power_average_interval_max) #define HWMON_P_AVERAGE_INTERVAL_MIN BIT(hwmon_power_average_interval_min) #define HWMON_P_AVERAGE_HIGHEST BIT(hwmon_power_average_highest) #define HWMON_P_AVERAGE_LOWEST BIT(hwmon_power_average_lowest) #define HWMON_P_AVERAGE_MAX BIT(hwmon_power_average_max) #define HWMON_P_AVERAGE_MIN BIT(hwmon_power_average_min) #define HWMON_P_INPUT BIT(hwmon_power_input) #define HWMON_P_INPUT_HIGHEST BIT(hwmon_power_input_highest) #define HWMON_P_INPUT_LOWEST BIT(hwmon_power_input_lowest) #define HWMON_P_RESET_HISTORY BIT(hwmon_power_reset_history) #define HWMON_P_ACCURACY BIT(hwmon_power_accuracy) #define HWMON_P_CAP BIT(hwmon_power_cap) #define HWMON_P_CAP_HYST BIT(hwmon_power_cap_hyst) #define HWMON_P_CAP_MAX BIT(hwmon_power_cap_max) #define HWMON_P_CAP_MIN BIT(hwmon_power_cap_min) #define HWMON_P_MIN BIT(hwmon_power_min) #define HWMON_P_MAX BIT(hwmon_power_max) #define HWMON_P_LCRIT BIT(hwmon_power_lcrit) #define HWMON_P_CRIT BIT(hwmon_power_crit) #define HWMON_P_LABEL BIT(hwmon_power_label) #define HWMON_P_ALARM BIT(hwmon_power_alarm) #define HWMON_P_CAP_ALARM BIT(hwmon_power_cap_alarm) #define HWMON_P_MIN_ALARM BIT(hwmon_power_min_alarm) #define HWMON_P_MAX_ALARM BIT(hwmon_power_max_alarm) #define HWMON_P_LCRIT_ALARM BIT(hwmon_power_lcrit_alarm) #define HWMON_P_CRIT_ALARM BIT(hwmon_power_crit_alarm) #define HWMON_P_RATED_MIN BIT(hwmon_power_rated_min) #define HWMON_P_RATED_MAX BIT(hwmon_power_rated_max) enum hwmon_energy_attributes { hwmon_energy_enable, hwmon_energy_input, hwmon_energy_label, }; #define HWMON_E_ENABLE BIT(hwmon_energy_enable) #define HWMON_E_INPUT BIT(hwmon_energy_input) #define HWMON_E_LABEL BIT(hwmon_energy_label) enum hwmon_humidity_attributes { hwmon_humidity_enable, hwmon_humidity_input, hwmon_humidity_label, hwmon_humidity_min, hwmon_humidity_min_hyst, hwmon_humidity_max, hwmon_humidity_max_hyst, hwmon_humidity_alarm, hwmon_humidity_fault, hwmon_humidity_rated_min, hwmon_humidity_rated_max, }; #define HWMON_H_ENABLE BIT(hwmon_humidity_enable) #define HWMON_H_INPUT BIT(hwmon_humidity_input) #define HWMON_H_LABEL BIT(hwmon_humidity_label) #define HWMON_H_MIN BIT(hwmon_humidity_min) #define HWMON_H_MIN_HYST BIT(hwmon_humidity_min_hyst) #define HWMON_H_MAX BIT(hwmon_humidity_max) #define HWMON_H_MAX_HYST BIT(hwmon_humidity_max_hyst) #define HWMON_H_ALARM BIT(hwmon_humidity_alarm) #define HWMON_H_FAULT BIT(hwmon_humidity_fault) #define HWMON_H_RATED_MIN BIT(hwmon_humidity_rated_min) #define HWMON_H_RATED_MAX BIT(hwmon_humidity_rated_max) enum hwmon_fan_attributes { hwmon_fan_enable, hwmon_fan_input, hwmon_fan_label, hwmon_fan_min, hwmon_fan_max, hwmon_fan_div, hwmon_fan_pulses, hwmon_fan_target, hwmon_fan_alarm, hwmon_fan_min_alarm, hwmon_fan_max_alarm, hwmon_fan_fault, }; #define HWMON_F_ENABLE BIT(hwmon_fan_enable) #define HWMON_F_INPUT BIT(hwmon_fan_input) #define HWMON_F_LABEL BIT(hwmon_fan_label) #define HWMON_F_MIN BIT(hwmon_fan_min) #define HWMON_F_MAX BIT(hwmon_fan_max) #define HWMON_F_DIV BIT(hwmon_fan_div) #define HWMON_F_PULSES BIT(hwmon_fan_pulses) #define HWMON_F_TARGET BIT(hwmon_fan_target) #define HWMON_F_ALARM BIT(hwmon_fan_alarm) #define HWMON_F_MIN_ALARM BIT(hwmon_fan_min_alarm) #define HWMON_F_MAX_ALARM BIT(hwmon_fan_max_alarm) #define HWMON_F_FAULT BIT(hwmon_fan_fault) enum hwmon_pwm_attributes { hwmon_pwm_input, hwmon_pwm_enable, hwmon_pwm_mode, hwmon_pwm_freq, }; #define HWMON_PWM_INPUT BIT(hwmon_pwm_input) #define HWMON_PWM_ENABLE BIT(hwmon_pwm_enable) #define HWMON_PWM_MODE BIT(hwmon_pwm_mode) #define HWMON_PWM_FREQ BIT(hwmon_pwm_freq) enum hwmon_intrusion_attributes { hwmon_intrusion_alarm, hwmon_intrusion_beep, }; #define HWMON_INTRUSION_ALARM BIT(hwmon_intrusion_alarm) #define HWMON_INTRUSION_BEEP BIT(hwmon_intrusion_beep) /** * struct hwmon_ops - hwmon device operations * @is_visible: Callback to return attribute visibility. Mandatory. * Parameters are: * @const void *drvdata: * Pointer to driver-private data structure passed * as argument to hwmon_device_register_with_info(). * @type: Sensor type * @attr: Sensor attribute * @channel: * Channel number * The function returns the file permissions. * If the return value is 0, no attribute will be created. * @read: Read callback for data attributes. Mandatory if readable * data attributes are present. * Parameters are: * @dev: Pointer to hardware monitoring device * @type: Sensor type * @attr: Sensor attribute * @channel: * Channel number * @val: Pointer to returned value * The function returns 0 on success or a negative error number. * @read_string: * Read callback for string attributes. Mandatory if string * attributes are present. * Parameters are: * @dev: Pointer to hardware monitoring device * @type: Sensor type * @attr: Sensor attribute * @channel: * Channel number * @str: Pointer to returned string * The function returns 0 on success or a negative error number. * @write: Write callback for data attributes. Mandatory if writeable * data attributes are present. * Parameters are: * @dev: Pointer to hardware monitoring device * @type: Sensor type * @attr: Sensor attribute * @channel: * Channel number * @val: Value to write * The function returns 0 on success or a negative error number. */ struct hwmon_ops { umode_t (*is_visible)(const void *drvdata, enum hwmon_sensor_types type, u32 attr, int channel); int (*read)(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val); int (*read_string)(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str); int (*write)(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val); }; /** * Channel information * @type: Channel type. * @config: Pointer to NULL-terminated list of channel parameters. * Use for per-channel attributes. */ struct hwmon_channel_info { enum hwmon_sensor_types type; const u32 *config; }; #define HWMON_CHANNEL_INFO(stype, ...) \ (&(struct hwmon_channel_info) { \ .type = hwmon_##stype, \ .config = (u32 []) { \ __VA_ARGS__, 0 \ } \ }) /** * Chip configuration * @ops: Pointer to hwmon operations. * @info: Null-terminated list of channel information. */ struct hwmon_chip_info { const struct hwmon_ops *ops; const struct hwmon_channel_info **info; }; /* hwmon_device_register() is deprecated */ struct device *hwmon_device_register(struct device *dev); struct device * hwmon_device_register_with_groups(struct device *dev, const char *name, void *drvdata, const struct attribute_group **groups); struct device * devm_hwmon_device_register_with_groups(struct device *dev, const char *name, void *drvdata, const struct attribute_group **groups); struct device * hwmon_device_register_with_info(struct device *dev, const char *name, void *drvdata, const struct hwmon_chip_info *info, const struct attribute_group **extra_groups); struct device * devm_hwmon_device_register_with_info(struct device *dev, const char *name, void *drvdata, const struct hwmon_chip_info *info, const struct attribute_group **extra_groups); void hwmon_device_unregister(struct device *dev); void devm_hwmon_device_unregister(struct device *dev); int hwmon_notify_event(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel); /** * hwmon_is_bad_char - Is the char invalid in a hwmon name * @ch: the char to be considered * * hwmon_is_bad_char() can be used to determine if the given character * may not be used in a hwmon name. * * Returns true if the char is invalid, false otherwise. */ static inline bool hwmon_is_bad_char(const char ch) { switch (ch) { case '-': case '*': case ' ': case '\t': case '\n': return true; default: return false; } } #endif PK ! XXt� build_bug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BUILD_BUG_H #define _LINUX_BUILD_BUG_H #include <linux/compiler.h> #ifdef __CHECKER__ #define BUILD_BUG_ON_ZERO(e) (0) #else /* __CHECKER__ */ /* * Force a compilation error if condition is true, but also produce a * result (of value 0 and type int), so the expression can be used * e.g. in a structure initializer (or where-ever else comma expressions * aren't permitted). */ #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); }))) #endif /* __CHECKER__ */ /* Force a compilation error if a constant expression is not a power of 2 */ #define __BUILD_BUG_ON_NOT_POWER_OF_2(n) \ BUILD_BUG_ON(((n) & ((n) - 1)) != 0) #define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) /* * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the * expression but avoids the generation of any code, even if that expression * has side-effects. */ #define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e)))) /** * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied * error message. * @condition: the condition which the compiler should know is false. * * See BUILD_BUG_ON for description. */ #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) /** * BUILD_BUG_ON - break compile if a condition is true. * @condition: the condition which the compiler should know is false. * * If you have some code which relies on certain constants being equal, or * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to * detect if someone changes it. */ #define BUILD_BUG_ON(condition) \ BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition) /** * BUILD_BUG - break compile if used. * * If you have some code that you expect the compiler to eliminate at * build time, you should use BUILD_BUG to detect if it is * unexpectedly used. */ #define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed") /** * static_assert - check integer constant expression at build time * * static_assert() is a wrapper for the C11 _Static_assert, with a * little macro magic to make the message optional (defaulting to the * stringification of the tested expression). * * Contrary to BUILD_BUG_ON(), static_assert() can be used at global * scope, but requires the expression to be an integer constant * expression (i.e., it is not enough that __builtin_constant_p() is * true for expr). * * Also note that BUILD_BUG_ON() fails the build if the condition is * true, while static_assert() fails the build if the expression is * false. */ #define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr) #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) #endif /* _LINUX_BUILD_BUG_H */ PK ! ��LQ# # rpmsg.hnu �[��� /* SPDX-License-Identifier: BSD-3-Clause */ /* * Remote processor messaging * * Copyright (C) 2011 Texas Instruments, Inc. * Copyright (C) 2011 Google, Inc. * All rights reserved. */ #ifndef _LINUX_RPMSG_H #define _LINUX_RPMSG_H #include <linux/types.h> #include <linux/device.h> #include <linux/err.h> #include <linux/mod_devicetable.h> #include <linux/kref.h> #include <linux/mutex.h> #include <linux/poll.h> #include <linux/rpmsg/byteorder.h> #include <uapi/linux/rpmsg.h> struct rpmsg_device; struct rpmsg_endpoint; struct rpmsg_device_ops; struct rpmsg_endpoint_ops; /** * struct rpmsg_channel_info - channel info representation * @name: name of service * @src: local address * @dst: destination address */ struct rpmsg_channel_info { char name[RPMSG_NAME_SIZE]; u32 src; u32 dst; }; /** * rpmsg_device - device that belong to the rpmsg bus * @dev: the device struct * @id: device id (used to match between rpmsg drivers and devices) * @driver_override: driver name to force a match; do not set directly, * because core frees it; use driver_set_override() to * set or clear it. * @src: local address * @dst: destination address * @ept: the rpmsg endpoint of this channel * @announce: if set, rpmsg will announce the creation/removal of this channel * @little_endian: True if transport is using little endian byte representation */ struct rpmsg_device { struct device dev; struct rpmsg_device_id id; const char *driver_override; u32 src; u32 dst; struct rpmsg_endpoint *ept; bool announce; bool little_endian; const struct rpmsg_device_ops *ops; }; typedef int (*rpmsg_rx_cb_t)(struct rpmsg_device *, void *, int, void *, u32); /** * struct rpmsg_endpoint - binds a local rpmsg address to its user * @rpdev: rpmsg channel device * @refcount: when this drops to zero, the ept is deallocated * @cb: rx callback handler * @cb_lock: must be taken before accessing/changing @cb * @addr: local rpmsg address * @priv: private data for the driver's use * * In essence, an rpmsg endpoint represents a listener on the rpmsg bus, as * it binds an rpmsg address with an rx callback handler. * * Simple rpmsg drivers shouldn't use this struct directly, because * things just work: every rpmsg driver provides an rx callback upon * registering to the bus, and that callback is then bound to its rpmsg * address when the driver is probed. When relevant inbound messages arrive * (i.e. messages which their dst address equals to the src address of * the rpmsg channel), the driver's handler is invoked to process it. * * More complicated drivers though, that do need to allocate additional rpmsg * addresses, and bind them to different rx callbacks, must explicitly * create additional endpoints by themselves (see rpmsg_create_ept()). */ struct rpmsg_endpoint { struct rpmsg_device *rpdev; struct kref refcount; rpmsg_rx_cb_t cb; struct mutex cb_lock; u32 addr; void *priv; const struct rpmsg_endpoint_ops *ops; }; /** * struct rpmsg_driver - rpmsg driver struct * @drv: underlying device driver * @id_table: rpmsg ids serviced by this driver * @probe: invoked when a matching rpmsg channel (i.e. device) is found * @remove: invoked when the rpmsg channel is removed * @callback: invoked when an inbound message is received on the channel */ struct rpmsg_driver { struct device_driver drv; const struct rpmsg_device_id *id_table; int (*probe)(struct rpmsg_device *dev); void (*remove)(struct rpmsg_device *dev); int (*callback)(struct rpmsg_device *, void *, int, void *, u32); }; static inline u16 rpmsg16_to_cpu(struct rpmsg_device *rpdev, __rpmsg16 val) { if (!rpdev) return __rpmsg16_to_cpu(rpmsg_is_little_endian(), val); else return __rpmsg16_to_cpu(rpdev->little_endian, val); } static inline __rpmsg16 cpu_to_rpmsg16(struct rpmsg_device *rpdev, u16 val) { if (!rpdev) return __cpu_to_rpmsg16(rpmsg_is_little_endian(), val); else return __cpu_to_rpmsg16(rpdev->little_endian, val); } static inline u32 rpmsg32_to_cpu(struct rpmsg_device *rpdev, __rpmsg32 val) { if (!rpdev) return __rpmsg32_to_cpu(rpmsg_is_little_endian(), val); else return __rpmsg32_to_cpu(rpdev->little_endian, val); } static inline __rpmsg32 cpu_to_rpmsg32(struct rpmsg_device *rpdev, u32 val) { if (!rpdev) return __cpu_to_rpmsg32(rpmsg_is_little_endian(), val); else return __cpu_to_rpmsg32(rpdev->little_endian, val); } static inline u64 rpmsg64_to_cpu(struct rpmsg_device *rpdev, __rpmsg64 val) { if (!rpdev) return __rpmsg64_to_cpu(rpmsg_is_little_endian(), val); else return __rpmsg64_to_cpu(rpdev->little_endian, val); } static inline __rpmsg64 cpu_to_rpmsg64(struct rpmsg_device *rpdev, u64 val) { if (!rpdev) return __cpu_to_rpmsg64(rpmsg_is_little_endian(), val); else return __cpu_to_rpmsg64(rpdev->little_endian, val); } #if IS_ENABLED(CONFIG_RPMSG) int rpmsg_register_device_override(struct rpmsg_device *rpdev, const char *driver_override); int rpmsg_register_device(struct rpmsg_device *rpdev); int rpmsg_unregister_device(struct device *parent, struct rpmsg_channel_info *chinfo); int __register_rpmsg_driver(struct rpmsg_driver *drv, struct module *owner); void unregister_rpmsg_driver(struct rpmsg_driver *drv); void rpmsg_destroy_ept(struct rpmsg_endpoint *); struct rpmsg_endpoint *rpmsg_create_ept(struct rpmsg_device *, rpmsg_rx_cb_t cb, void *priv, struct rpmsg_channel_info chinfo); int rpmsg_send(struct rpmsg_endpoint *ept, void *data, int len); int rpmsg_sendto(struct rpmsg_endpoint *ept, void *data, int len, u32 dst); int rpmsg_send_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst, void *data, int len); int rpmsg_trysend(struct rpmsg_endpoint *ept, void *data, int len); int rpmsg_trysendto(struct rpmsg_endpoint *ept, void *data, int len, u32 dst); int rpmsg_trysend_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst, void *data, int len); __poll_t rpmsg_poll(struct rpmsg_endpoint *ept, struct file *filp, poll_table *wait); #else static inline int rpmsg_register_device_override(struct rpmsg_device *rpdev, const char *driver_override) { return -ENXIO; } static inline int rpmsg_register_device(struct rpmsg_device *rpdev) { return -ENXIO; } static inline int rpmsg_unregister_device(struct device *parent, struct rpmsg_channel_info *chinfo) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline int __register_rpmsg_driver(struct rpmsg_driver *drv, struct module *owner) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline void unregister_rpmsg_driver(struct rpmsg_driver *drv) { /* This shouldn't be possible */ WARN_ON(1); } static inline void rpmsg_destroy_ept(struct rpmsg_endpoint *ept) { /* This shouldn't be possible */ WARN_ON(1); } static inline struct rpmsg_endpoint *rpmsg_create_ept(struct rpmsg_device *rpdev, rpmsg_rx_cb_t cb, void *priv, struct rpmsg_channel_info chinfo) { /* This shouldn't be possible */ WARN_ON(1); return NULL; } static inline int rpmsg_send(struct rpmsg_endpoint *ept, void *data, int len) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline int rpmsg_sendto(struct rpmsg_endpoint *ept, void *data, int len, u32 dst) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline int rpmsg_send_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst, void *data, int len) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline int rpmsg_trysend(struct rpmsg_endpoint *ept, void *data, int len) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline int rpmsg_trysendto(struct rpmsg_endpoint *ept, void *data, int len, u32 dst) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline int rpmsg_trysend_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst, void *data, int len) { /* This shouldn't be possible */ WARN_ON(1); return -ENXIO; } static inline __poll_t rpmsg_poll(struct rpmsg_endpoint *ept, struct file *filp, poll_table *wait) { /* This shouldn't be possible */ WARN_ON(1); return 0; } #endif /* IS_ENABLED(CONFIG_RPMSG) */ /* use a macro to avoid include chaining to get THIS_MODULE */ #define register_rpmsg_driver(drv) \ __register_rpmsg_driver(drv, THIS_MODULE) /** * module_rpmsg_driver() - Helper macro for registering an rpmsg driver * @__rpmsg_driver: rpmsg_driver struct * * Helper macro for rpmsg drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_rpmsg_driver(__rpmsg_driver) \ module_driver(__rpmsg_driver, register_rpmsg_driver, \ unregister_rpmsg_driver) #endif /* _LINUX_RPMSG_H */ PK ! ���3 3 platform_device.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * platform_device.h - generic, centralized driver model * * Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org> * * See Documentation/driver-api/driver-model/ for more information. */ #ifndef _PLATFORM_DEVICE_H_ #define _PLATFORM_DEVICE_H_ #include <linux/device.h> #define PLATFORM_DEVID_NONE (-1) #define PLATFORM_DEVID_AUTO (-2) struct irq_affinity; struct mfd_cell; struct property_entry; struct platform_device_id; struct platform_device { const char *name; int id; bool id_auto; struct device dev; u64 platform_dma_mask; struct device_dma_parameters dma_parms; u32 num_resources; struct resource *resource; const struct platform_device_id *id_entry; /* * Driver name to force a match. Do not set directly, because core * frees it. Use driver_set_override() to set or clear it. */ const char *driver_override; /* MFD cell pointer */ struct mfd_cell *mfd_cell; /* arch specific additions */ struct pdev_archdata archdata; }; #define platform_get_device_id(pdev) ((pdev)->id_entry) #define dev_is_platform(dev) ((dev)->bus == &platform_bus_type) #define to_platform_device(x) container_of((x), struct platform_device, dev) extern int platform_device_register(struct platform_device *); extern void platform_device_unregister(struct platform_device *); extern struct bus_type platform_bus_type; extern struct device platform_bus; extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int); extern struct resource *platform_get_mem_or_io(struct platform_device *, unsigned int); extern struct device * platform_find_device_by_driver(struct device *start, const struct device_driver *drv); extern void __iomem * devm_platform_get_and_ioremap_resource(struct platform_device *pdev, unsigned int index, struct resource **res); extern void __iomem * devm_platform_ioremap_resource(struct platform_device *pdev, unsigned int index); extern void __iomem * devm_platform_ioremap_resource_byname(struct platform_device *pdev, const char *name); extern int platform_get_irq(struct platform_device *, unsigned int); extern int platform_get_irq_optional(struct platform_device *, unsigned int); extern int platform_irq_count(struct platform_device *); extern int devm_platform_get_irqs_affinity(struct platform_device *dev, struct irq_affinity *affd, unsigned int minvec, unsigned int maxvec, int **irqs); extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, const char *); extern int platform_get_irq_byname(struct platform_device *, const char *); extern int platform_get_irq_byname_optional(struct platform_device *dev, const char *name); extern int platform_add_devices(struct platform_device **, int); struct platform_device_info { struct device *parent; struct fwnode_handle *fwnode; bool of_node_reused; const char *name; int id; const struct resource *res; unsigned int num_res; const void *data; size_t size_data; u64 dma_mask; const struct property_entry *properties; }; extern struct platform_device *platform_device_register_full( const struct platform_device_info *pdevinfo); /** * platform_device_register_resndata - add a platform-level device with * resources and platform-specific data * * @parent: parent device for the device we're adding * @name: base name of the device we're adding * @id: instance id * @res: set of resources that needs to be allocated for the device * @num: number of resources * @data: platform specific data for this platform device * @size: size of platform specific data * * Returns &struct platform_device pointer on success, or ERR_PTR() on error. */ static inline struct platform_device *platform_device_register_resndata( struct device *parent, const char *name, int id, const struct resource *res, unsigned int num, const void *data, size_t size) { struct platform_device_info pdevinfo = { .parent = parent, .name = name, .id = id, .res = res, .num_res = num, .data = data, .size_data = size, .dma_mask = 0, }; return platform_device_register_full(&pdevinfo); } /** * platform_device_register_simple - add a platform-level device and its resources * @name: base name of the device we're adding * @id: instance id * @res: set of resources that needs to be allocated for the device * @num: number of resources * * This function creates a simple platform device that requires minimal * resource and memory management. Canned release function freeing memory * allocated for the device allows drivers using such devices to be * unloaded without waiting for the last reference to the device to be * dropped. * * This interface is primarily intended for use with legacy drivers which * probe hardware directly. Because such drivers create sysfs device nodes * themselves, rather than letting system infrastructure handle such device * enumeration tasks, they don't fully conform to the Linux driver model. * In particular, when such drivers are built as modules, they can't be * "hotplugged". * * Returns &struct platform_device pointer on success, or ERR_PTR() on error. */ static inline struct platform_device *platform_device_register_simple( const char *name, int id, const struct resource *res, unsigned int num) { return platform_device_register_resndata(NULL, name, id, res, num, NULL, 0); } /** * platform_device_register_data - add a platform-level device with platform-specific data * @parent: parent device for the device we're adding * @name: base name of the device we're adding * @id: instance id * @data: platform specific data for this platform device * @size: size of platform specific data * * This function creates a simple platform device that requires minimal * resource and memory management. Canned release function freeing memory * allocated for the device allows drivers using such devices to be * unloaded without waiting for the last reference to the device to be * dropped. * * Returns &struct platform_device pointer on success, or ERR_PTR() on error. */ static inline struct platform_device *platform_device_register_data( struct device *parent, const char *name, int id, const void *data, size_t size) { return platform_device_register_resndata(parent, name, id, NULL, 0, data, size); } extern struct platform_device *platform_device_alloc(const char *name, int id); extern int platform_device_add_resources(struct platform_device *pdev, const struct resource *res, unsigned int num); extern int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size); extern int platform_device_add(struct platform_device *pdev); extern void platform_device_del(struct platform_device *pdev); extern void platform_device_put(struct platform_device *pdev); struct platform_driver { int (*probe)(struct platform_device *); /* * Traditionally the remove callback returned an int which however is * ignored by the driver core. This led to wrong expectations by driver * authors who thought returning an error code was a valid error * handling strategy. To convert to a callback returning void, new * drivers should implement .remove_new() until the conversion it done * that eventually makes .remove() return void. */ int (*remove)(struct platform_device *); void (*remove_new)(struct platform_device *); void (*shutdown)(struct platform_device *); int (*suspend)(struct platform_device *, pm_message_t state); int (*resume)(struct platform_device *); struct device_driver driver; const struct platform_device_id *id_table; bool prevent_deferred_probe; }; #define to_platform_driver(drv) (container_of((drv), struct platform_driver, \ driver)) /* * use a macro to avoid include chaining to get THIS_MODULE */ #define platform_driver_register(drv) \ __platform_driver_register(drv, THIS_MODULE) extern int __platform_driver_register(struct platform_driver *, struct module *); extern void platform_driver_unregister(struct platform_driver *); /* non-hotpluggable platform devices may use this so that probe() and * its support may live in __init sections, conserving runtime memory. */ #define platform_driver_probe(drv, probe) \ __platform_driver_probe(drv, probe, THIS_MODULE) extern int __platform_driver_probe(struct platform_driver *driver, int (*probe)(struct platform_device *), struct module *module); static inline void *platform_get_drvdata(const struct platform_device *pdev) { return dev_get_drvdata(&pdev->dev); } static inline void platform_set_drvdata(struct platform_device *pdev, void *data) { dev_set_drvdata(&pdev->dev, data); } /* module_platform_driver() - Helper macro for drivers that don't do * anything special in module init/exit. This eliminates a lot of * boilerplate. Each module may only use this macro once, and * calling it replaces module_init() and module_exit() */ #define module_platform_driver(__platform_driver) \ module_driver(__platform_driver, platform_driver_register, \ platform_driver_unregister) /* builtin_platform_driver() - Helper macro for builtin drivers that * don't do anything special in driver init. This eliminates some * boilerplate. Each driver may only use this macro once, and * calling it replaces device_initcall(). Note this is meant to be * a parallel of module_platform_driver() above, but w/o _exit stuff. */ #define builtin_platform_driver(__platform_driver) \ builtin_driver(__platform_driver, platform_driver_register) /* module_platform_driver_probe() - Helper macro for drivers that don't do * anything special in module init/exit. This eliminates a lot of * boilerplate. Each module may only use this macro once, and * calling it replaces module_init() and module_exit() */ #define module_platform_driver_probe(__platform_driver, __platform_probe) \ static int __init __platform_driver##_init(void) \ { \ return platform_driver_probe(&(__platform_driver), \ __platform_probe); \ } \ module_init(__platform_driver##_init); \ static void __exit __platform_driver##_exit(void) \ { \ platform_driver_unregister(&(__platform_driver)); \ } \ module_exit(__platform_driver##_exit); /* builtin_platform_driver_probe() - Helper macro for drivers that don't do * anything special in device init. This eliminates some boilerplate. Each * driver may only use this macro once, and using it replaces device_initcall. * This is meant to be a parallel of module_platform_driver_probe above, but * without the __exit parts. */ #define builtin_platform_driver_probe(__platform_driver, __platform_probe) \ static int __init __platform_driver##_init(void) \ { \ return platform_driver_probe(&(__platform_driver), \ __platform_probe); \ } \ device_initcall(__platform_driver##_init); \ #define platform_create_bundle(driver, probe, res, n_res, data, size) \ __platform_create_bundle(driver, probe, res, n_res, data, size, THIS_MODULE) extern struct platform_device *__platform_create_bundle( struct platform_driver *driver, int (*probe)(struct platform_device *), struct resource *res, unsigned int n_res, const void *data, size_t size, struct module *module); int __platform_register_drivers(struct platform_driver * const *drivers, unsigned int count, struct module *owner); void platform_unregister_drivers(struct platform_driver * const *drivers, unsigned int count); #define platform_register_drivers(drivers, count) \ __platform_register_drivers(drivers, count, THIS_MODULE) #ifdef CONFIG_SUSPEND extern int platform_pm_suspend(struct device *dev); extern int platform_pm_resume(struct device *dev); #else #define platform_pm_suspend NULL #define platform_pm_resume NULL #endif #ifdef CONFIG_HIBERNATE_CALLBACKS extern int platform_pm_freeze(struct device *dev); extern int platform_pm_thaw(struct device *dev); extern int platform_pm_poweroff(struct device *dev); extern int platform_pm_restore(struct device *dev); #else #define platform_pm_freeze NULL #define platform_pm_thaw NULL #define platform_pm_poweroff NULL #define platform_pm_restore NULL #endif extern int platform_dma_configure(struct device *dev); #ifdef CONFIG_PM_SLEEP #define USE_PLATFORM_PM_SLEEP_OPS \ .suspend = platform_pm_suspend, \ .resume = platform_pm_resume, \ .freeze = platform_pm_freeze, \ .thaw = platform_pm_thaw, \ .poweroff = platform_pm_poweroff, \ .restore = platform_pm_restore, #else #define USE_PLATFORM_PM_SLEEP_OPS #endif #ifndef CONFIG_SUPERH /* * REVISIT: This stub is needed for all non-SuperH users of early platform * drivers. It should go away once we introduce the new platform_device-based * early driver framework. */ static inline int is_sh_early_platform_device(struct platform_device *pdev) { return 0; } #endif /* CONFIG_SUPERH */ /* For now only SuperH uses it */ void early_platform_cleanup(void); #endif /* _PLATFORM_DEVICE_H_ */ PK ! &g�ȃ= �= rtsx_usb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Driver for Realtek RTS5139 USB card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * * Author: * Roger Tseng <rogerable@realtek.com> */ #ifndef __RTSX_USB_H #define __RTSX_USB_H #include <linux/usb.h> /* related module names */ #define RTSX_USB_SD_CARD 0 #define RTSX_USB_MS_CARD 1 /* endpoint numbers */ #define EP_BULK_OUT 1 #define EP_BULK_IN 2 #define EP_INTR_IN 3 /* USB vendor requests */ #define RTSX_USB_REQ_REG_OP 0x00 #define RTSX_USB_REQ_POLL 0x02 /* miscellaneous parameters */ #define MIN_DIV_N 60 #define MAX_DIV_N 120 #define MAX_PHASE 15 #define RX_TUNING_CNT 3 #define QFN24 0 #define LQFP48 1 #define CHECK_PKG(ucr, pkg) ((ucr)->package == (pkg)) /* data structures */ struct rtsx_ucr { u16 vendor_id; u16 product_id; int package; u8 ic_version; bool is_rts5179; unsigned int cur_clk; u8 *cmd_buf; unsigned int cmd_idx; u8 *rsp_buf; struct usb_device *pusb_dev; struct usb_interface *pusb_intf; struct usb_sg_request current_sg; struct timer_list sg_timer; struct mutex dev_mutex; }; /* buffer size */ #define IOBUF_SIZE 1024 /* prototypes of exported functions */ extern int rtsx_usb_get_card_status(struct rtsx_ucr *ucr, u16 *status); extern int rtsx_usb_read_register(struct rtsx_ucr *ucr, u16 addr, u8 *data); extern int rtsx_usb_write_register(struct rtsx_ucr *ucr, u16 addr, u8 mask, u8 data); extern int rtsx_usb_ep0_write_register(struct rtsx_ucr *ucr, u16 addr, u8 mask, u8 data); extern int rtsx_usb_ep0_read_register(struct rtsx_ucr *ucr, u16 addr, u8 *data); extern void rtsx_usb_add_cmd(struct rtsx_ucr *ucr, u8 cmd_type, u16 reg_addr, u8 mask, u8 data); extern int rtsx_usb_send_cmd(struct rtsx_ucr *ucr, u8 flag, int timeout); extern int rtsx_usb_get_rsp(struct rtsx_ucr *ucr, int rsp_len, int timeout); extern int rtsx_usb_transfer_data(struct rtsx_ucr *ucr, unsigned int pipe, void *buf, unsigned int len, int use_sg, unsigned int *act_len, int timeout); extern int rtsx_usb_read_ppbuf(struct rtsx_ucr *ucr, u8 *buf, int buf_len); extern int rtsx_usb_write_ppbuf(struct rtsx_ucr *ucr, u8 *buf, int buf_len); extern int rtsx_usb_switch_clock(struct rtsx_ucr *ucr, unsigned int card_clock, u8 ssc_depth, bool initial_mode, bool double_clk, bool vpclk); extern int rtsx_usb_card_exclusive_check(struct rtsx_ucr *ucr, int card); /* card status */ #define SD_CD 0x01 #define MS_CD 0x02 #define XD_CD 0x04 #define CD_MASK (SD_CD | MS_CD | XD_CD) #define SD_WP 0x08 /* reader command field offset & parameters */ #define READ_REG_CMD 0 #define WRITE_REG_CMD 1 #define CHECK_REG_CMD 2 #define PACKET_TYPE 4 #define CNT_H 5 #define CNT_L 6 #define STAGE_FLAG 7 #define CMD_OFFSET 8 #define SEQ_WRITE_DATA_OFFSET 12 #define BATCH_CMD 0 #define SEQ_READ 1 #define SEQ_WRITE 2 #define STAGE_R 0x01 #define STAGE_DI 0x02 #define STAGE_DO 0x04 #define STAGE_MS_STATUS 0x08 #define STAGE_XD_STATUS 0x10 #define MODE_C 0x00 #define MODE_CR (STAGE_R) #define MODE_CDIR (STAGE_R | STAGE_DI) #define MODE_CDOR (STAGE_R | STAGE_DO) #define EP0_OP_SHIFT 14 #define EP0_READ_REG_CMD 2 #define EP0_WRITE_REG_CMD 3 #define rtsx_usb_cmd_hdr_tag(ucr) \ do { \ ucr->cmd_buf[0] = 'R'; \ ucr->cmd_buf[1] = 'T'; \ ucr->cmd_buf[2] = 'C'; \ ucr->cmd_buf[3] = 'R'; \ } while (0) static inline void rtsx_usb_init_cmd(struct rtsx_ucr *ucr) { rtsx_usb_cmd_hdr_tag(ucr); ucr->cmd_idx = 0; ucr->cmd_buf[PACKET_TYPE] = BATCH_CMD; } /* internal register address */ #define FPDCTL 0xFC00 #define SSC_DIV_N_0 0xFC07 #define SSC_CTL1 0xFC09 #define SSC_CTL2 0xFC0A #define CFG_MODE 0xFC0E #define CFG_MODE_1 0xFC0F #define RCCTL 0xFC14 #define SOF_WDOG 0xFC28 #define SYS_DUMMY0 0xFC30 #define MS_BLKEND 0xFD30 #define MS_READ_START 0xFD31 #define MS_READ_COUNT 0xFD32 #define MS_WRITE_START 0xFD33 #define MS_WRITE_COUNT 0xFD34 #define MS_COMMAND 0xFD35 #define MS_OLD_BLOCK_0 0xFD36 #define MS_OLD_BLOCK_1 0xFD37 #define MS_NEW_BLOCK_0 0xFD38 #define MS_NEW_BLOCK_1 0xFD39 #define MS_LOG_BLOCK_0 0xFD3A #define MS_LOG_BLOCK_1 0xFD3B #define MS_BUS_WIDTH 0xFD3C #define MS_PAGE_START 0xFD3D #define MS_PAGE_LENGTH 0xFD3E #define MS_CFG 0xFD40 #define MS_TPC 0xFD41 #define MS_TRANS_CFG 0xFD42 #define MS_TRANSFER 0xFD43 #define MS_INT_REG 0xFD44 #define MS_BYTE_CNT 0xFD45 #define MS_SECTOR_CNT_L 0xFD46 #define MS_SECTOR_CNT_H 0xFD47 #define MS_DBUS_H 0xFD48 #define CARD_DMA1_CTL 0xFD5C #define CARD_PULL_CTL1 0xFD60 #define CARD_PULL_CTL2 0xFD61 #define CARD_PULL_CTL3 0xFD62 #define CARD_PULL_CTL4 0xFD63 #define CARD_PULL_CTL5 0xFD64 #define CARD_PULL_CTL6 0xFD65 #define CARD_EXIST 0xFD6F #define CARD_INT_PEND 0xFD71 #define LDO_POWER_CFG 0xFD7B #define SD_CFG1 0xFDA0 #define SD_CFG2 0xFDA1 #define SD_CFG3 0xFDA2 #define SD_STAT1 0xFDA3 #define SD_STAT2 0xFDA4 #define SD_BUS_STAT 0xFDA5 #define SD_PAD_CTL 0xFDA6 #define SD_SAMPLE_POINT_CTL 0xFDA7 #define SD_PUSH_POINT_CTL 0xFDA8 #define SD_CMD0 0xFDA9 #define SD_CMD1 0xFDAA #define SD_CMD2 0xFDAB #define SD_CMD3 0xFDAC #define SD_CMD4 0xFDAD #define SD_CMD5 0xFDAE #define SD_BYTE_CNT_L 0xFDAF #define SD_BYTE_CNT_H 0xFDB0 #define SD_BLOCK_CNT_L 0xFDB1 #define SD_BLOCK_CNT_H 0xFDB2 #define SD_TRANSFER 0xFDB3 #define SD_CMD_STATE 0xFDB5 #define SD_DATA_STATE 0xFDB6 #define SD_VPCLK0_CTL 0xFC2A #define SD_VPCLK1_CTL 0xFC2B #define SD_DCMPS0_CTL 0xFC2C #define SD_DCMPS1_CTL 0xFC2D #define CARD_DMA1_CTL 0xFD5C #define HW_VERSION 0xFC01 #define SSC_CLK_FPGA_SEL 0xFC02 #define CLK_DIV 0xFC03 #define SFSM_ED 0xFC04 #define CD_DEGLITCH_WIDTH 0xFC20 #define CD_DEGLITCH_EN 0xFC21 #define AUTO_DELINK_EN 0xFC23 #define FPGA_PULL_CTL 0xFC1D #define CARD_CLK_SOURCE 0xFC2E #define CARD_SHARE_MODE 0xFD51 #define CARD_DRIVE_SEL 0xFD52 #define CARD_STOP 0xFD53 #define CARD_OE 0xFD54 #define CARD_AUTO_BLINK 0xFD55 #define CARD_GPIO 0xFD56 #define SD30_DRIVE_SEL 0xFD57 #define CARD_DATA_SOURCE 0xFD5D #define CARD_SELECT 0xFD5E #define CARD_CLK_EN 0xFD79 #define CARD_PWR_CTL 0xFD7A #define OCPCTL 0xFD80 #define OCPPARA1 0xFD81 #define OCPPARA2 0xFD82 #define OCPSTAT 0xFD83 #define HS_USB_STAT 0xFE01 #define HS_VCONTROL 0xFE26 #define HS_VSTAIN 0xFE27 #define HS_VLOADM 0xFE28 #define HS_VSTAOUT 0xFE29 #define MC_IRQ 0xFF00 #define MC_IRQEN 0xFF01 #define MC_FIFO_CTL 0xFF02 #define MC_FIFO_BC0 0xFF03 #define MC_FIFO_BC1 0xFF04 #define MC_FIFO_STAT 0xFF05 #define MC_FIFO_MODE 0xFF06 #define MC_FIFO_RD_PTR0 0xFF07 #define MC_FIFO_RD_PTR1 0xFF08 #define MC_DMA_CTL 0xFF10 #define MC_DMA_TC0 0xFF11 #define MC_DMA_TC1 0xFF12 #define MC_DMA_TC2 0xFF13 #define MC_DMA_TC3 0xFF14 #define MC_DMA_RST 0xFF15 #define RBUF_SIZE_MASK 0xFBFF #define RBUF_BASE 0xF000 #define PPBUF_BASE1 0xF800 #define PPBUF_BASE2 0xFA00 /* internal register value macros */ #define POWER_OFF 0x03 #define PARTIAL_POWER_ON 0x02 #define POWER_ON 0x00 #define POWER_MASK 0x03 #define LDO3318_PWR_MASK 0x0C #define LDO_ON 0x00 #define LDO_SUSPEND 0x08 #define LDO_OFF 0x0C #define DV3318_AUTO_PWR_OFF 0x10 #define FORCE_LDO_POWERB 0x60 /* LDO_POWER_CFG */ #define TUNE_SD18_MASK 0x1C #define TUNE_SD18_1V7 0x00 #define TUNE_SD18_1V8 (0x01 << 2) #define TUNE_SD18_1V9 (0x02 << 2) #define TUNE_SD18_2V0 (0x03 << 2) #define TUNE_SD18_2V7 (0x04 << 2) #define TUNE_SD18_2V8 (0x05 << 2) #define TUNE_SD18_2V9 (0x06 << 2) #define TUNE_SD18_3V3 (0x07 << 2) /* CLK_DIV */ #define CLK_CHANGE 0x80 #define CLK_DIV_1 0x00 #define CLK_DIV_2 0x01 #define CLK_DIV_4 0x02 #define CLK_DIV_8 0x03 #define SSC_POWER_MASK 0x01 #define SSC_POWER_DOWN 0x01 #define SSC_POWER_ON 0x00 #define FPGA_VER 0x80 #define HW_VER_MASK 0x0F #define EXTEND_DMA1_ASYNC_SIGNAL 0x02 /* CFG_MODE*/ #define XTAL_FREE 0x80 #define CLK_MODE_MASK 0x03 #define CLK_MODE_12M_XTAL 0x00 #define CLK_MODE_NON_XTAL 0x01 #define CLK_MODE_24M_OSC 0x02 #define CLK_MODE_48M_OSC 0x03 /* CFG_MODE_1*/ #define RTS5179 0x02 #define NYET_EN 0x01 #define NYET_MSAK 0x01 #define SD30_DRIVE_MASK 0x07 #define SD20_DRIVE_MASK 0x03 #define DISABLE_SD_CD 0x08 #define DISABLE_MS_CD 0x10 #define DISABLE_XD_CD 0x20 #define SD_CD_DEGLITCH_EN 0x01 #define MS_CD_DEGLITCH_EN 0x02 #define XD_CD_DEGLITCH_EN 0x04 #define CARD_SHARE_LQFP48 0x04 #define CARD_SHARE_QFN24 0x00 #define CARD_SHARE_LQFP_SEL 0x04 #define CARD_SHARE_XD 0x00 #define CARD_SHARE_SD 0x01 #define CARD_SHARE_MS 0x02 #define CARD_SHARE_MASK 0x03 /* SD30_DRIVE_SEL */ #define DRIVER_TYPE_A 0x05 #define DRIVER_TYPE_B 0x03 #define DRIVER_TYPE_C 0x02 #define DRIVER_TYPE_D 0x01 /* SD_BUS_STAT */ #define SD_CLK_TOGGLE_EN 0x80 #define SD_CLK_FORCE_STOP 0x40 #define SD_DAT3_STATUS 0x10 #define SD_DAT2_STATUS 0x08 #define SD_DAT1_STATUS 0x04 #define SD_DAT0_STATUS 0x02 #define SD_CMD_STATUS 0x01 /* SD_PAD_CTL */ #define SD_IO_USING_1V8 0x80 #define SD_IO_USING_3V3 0x7F #define TYPE_A_DRIVING 0x00 #define TYPE_B_DRIVING 0x01 #define TYPE_C_DRIVING 0x02 #define TYPE_D_DRIVING 0x03 /* CARD_CLK_EN */ #define SD_CLK_EN 0x04 #define MS_CLK_EN 0x08 /* CARD_SELECT */ #define SD_MOD_SEL 2 #define MS_MOD_SEL 3 /* CARD_SHARE_MODE */ #define CARD_SHARE_LQFP48 0x04 #define CARD_SHARE_QFN24 0x00 #define CARD_SHARE_LQFP_SEL 0x04 #define CARD_SHARE_XD 0x00 #define CARD_SHARE_SD 0x01 #define CARD_SHARE_MS 0x02 #define CARD_SHARE_MASK 0x03 /* SSC_CTL1 */ #define SSC_RSTB 0x80 #define SSC_8X_EN 0x40 #define SSC_FIX_FRAC 0x20 #define SSC_SEL_1M 0x00 #define SSC_SEL_2M 0x08 #define SSC_SEL_4M 0x10 #define SSC_SEL_8M 0x18 /* SSC_CTL2 */ #define SSC_DEPTH_MASK 0x03 #define SSC_DEPTH_DISALBE 0x00 #define SSC_DEPTH_2M 0x01 #define SSC_DEPTH_1M 0x02 #define SSC_DEPTH_512K 0x03 /* SD_VPCLK0_CTL */ #define PHASE_CHANGE 0x80 #define PHASE_NOT_RESET 0x40 /* SD_TRANSFER */ #define SD_TRANSFER_START 0x80 #define SD_TRANSFER_END 0x40 #define SD_STAT_IDLE 0x20 #define SD_TRANSFER_ERR 0x10 #define SD_TM_NORMAL_WRITE 0x00 #define SD_TM_AUTO_WRITE_3 0x01 #define SD_TM_AUTO_WRITE_4 0x02 #define SD_TM_AUTO_READ_3 0x05 #define SD_TM_AUTO_READ_4 0x06 #define SD_TM_CMD_RSP 0x08 #define SD_TM_AUTO_WRITE_1 0x09 #define SD_TM_AUTO_WRITE_2 0x0A #define SD_TM_NORMAL_READ 0x0C #define SD_TM_AUTO_READ_1 0x0D #define SD_TM_AUTO_READ_2 0x0E #define SD_TM_AUTO_TUNING 0x0F /* SD_CFG1 */ #define SD_CLK_DIVIDE_0 0x00 #define SD_CLK_DIVIDE_256 0xC0 #define SD_CLK_DIVIDE_128 0x80 #define SD_CLK_DIVIDE_MASK 0xC0 #define SD_BUS_WIDTH_1BIT 0x00 #define SD_BUS_WIDTH_4BIT 0x01 #define SD_BUS_WIDTH_8BIT 0x02 #define SD_ASYNC_FIFO_RST 0x10 #define SD_20_MODE 0x00 #define SD_DDR_MODE 0x04 #define SD_30_MODE 0x08 /* SD_CFG2 */ #define SD_CALCULATE_CRC7 0x00 #define SD_NO_CALCULATE_CRC7 0x80 #define SD_CHECK_CRC16 0x00 #define SD_NO_CHECK_CRC16 0x40 #define SD_WAIT_CRC_TO_EN 0x20 #define SD_WAIT_BUSY_END 0x08 #define SD_NO_WAIT_BUSY_END 0x00 #define SD_CHECK_CRC7 0x00 #define SD_NO_CHECK_CRC7 0x04 #define SD_RSP_LEN_0 0x00 #define SD_RSP_LEN_6 0x01 #define SD_RSP_LEN_17 0x02 #define SD_RSP_TYPE_R0 0x04 #define SD_RSP_TYPE_R1 0x01 #define SD_RSP_TYPE_R1b 0x09 #define SD_RSP_TYPE_R2 0x02 #define SD_RSP_TYPE_R3 0x05 #define SD_RSP_TYPE_R4 0x05 #define SD_RSP_TYPE_R5 0x01 #define SD_RSP_TYPE_R6 0x01 #define SD_RSP_TYPE_R7 0x01 /* SD_STAT1 */ #define SD_CRC7_ERR 0x80 #define SD_CRC16_ERR 0x40 #define SD_CRC_WRITE_ERR 0x20 #define SD_CRC_WRITE_ERR_MASK 0x1C #define GET_CRC_TIME_OUT 0x02 #define SD_TUNING_COMPARE_ERR 0x01 /* SD_DATA_STATE */ #define SD_DATA_IDLE 0x80 /* CARD_DATA_SOURCE */ #define PINGPONG_BUFFER 0x01 #define RING_BUFFER 0x00 /* CARD_OE */ #define SD_OUTPUT_EN 0x04 #define MS_OUTPUT_EN 0x08 /* CARD_STOP */ #define SD_STOP 0x04 #define MS_STOP 0x08 #define SD_CLR_ERR 0x40 #define MS_CLR_ERR 0x80 /* CARD_CLK_SOURCE */ #define CRC_FIX_CLK (0x00 << 0) #define CRC_VAR_CLK0 (0x01 << 0) #define CRC_VAR_CLK1 (0x02 << 0) #define SD30_FIX_CLK (0x00 << 2) #define SD30_VAR_CLK0 (0x01 << 2) #define SD30_VAR_CLK1 (0x02 << 2) #define SAMPLE_FIX_CLK (0x00 << 4) #define SAMPLE_VAR_CLK0 (0x01 << 4) #define SAMPLE_VAR_CLK1 (0x02 << 4) /* SD_SAMPLE_POINT_CTL */ #define DDR_FIX_RX_DAT 0x00 #define DDR_VAR_RX_DAT 0x80 #define DDR_FIX_RX_DAT_EDGE 0x00 #define DDR_FIX_RX_DAT_14_DELAY 0x40 #define DDR_FIX_RX_CMD 0x00 #define DDR_VAR_RX_CMD 0x20 #define DDR_FIX_RX_CMD_POS_EDGE 0x00 #define DDR_FIX_RX_CMD_14_DELAY 0x10 #define SD20_RX_POS_EDGE 0x00 #define SD20_RX_14_DELAY 0x08 #define SD20_RX_SEL_MASK 0x08 /* SD_PUSH_POINT_CTL */ #define DDR_FIX_TX_CMD_DAT 0x00 #define DDR_VAR_TX_CMD_DAT 0x80 #define DDR_FIX_TX_DAT_14_TSU 0x00 #define DDR_FIX_TX_DAT_12_TSU 0x40 #define DDR_FIX_TX_CMD_NEG_EDGE 0x00 #define DDR_FIX_TX_CMD_14_AHEAD 0x20 #define SD20_TX_NEG_EDGE 0x00 #define SD20_TX_14_AHEAD 0x10 #define SD20_TX_SEL_MASK 0x10 #define DDR_VAR_SDCLK_POL_SWAP 0x01 /* MS_CFG */ #define SAMPLE_TIME_RISING 0x00 #define SAMPLE_TIME_FALLING 0x80 #define PUSH_TIME_DEFAULT 0x00 #define PUSH_TIME_ODD 0x40 #define NO_EXTEND_TOGGLE 0x00 #define EXTEND_TOGGLE_CHK 0x20 #define MS_BUS_WIDTH_1 0x00 #define MS_BUS_WIDTH_4 0x10 #define MS_BUS_WIDTH_8 0x18 #define MS_2K_SECTOR_MODE 0x04 #define MS_512_SECTOR_MODE 0x00 #define MS_TOGGLE_TIMEOUT_EN 0x00 #define MS_TOGGLE_TIMEOUT_DISEN 0x01 #define MS_NO_CHECK_INT 0x02 /* MS_TRANS_CFG */ #define WAIT_INT 0x80 #define NO_WAIT_INT 0x00 #define NO_AUTO_READ_INT_REG 0x00 #define AUTO_READ_INT_REG 0x40 #define MS_CRC16_ERR 0x20 #define MS_RDY_TIMEOUT 0x10 #define MS_INT_CMDNK 0x08 #define MS_INT_BREQ 0x04 #define MS_INT_ERR 0x02 #define MS_INT_CED 0x01 /* MS_TRANSFER */ #define MS_TRANSFER_START 0x80 #define MS_TRANSFER_END 0x40 #define MS_TRANSFER_ERR 0x20 #define MS_BS_STATE 0x10 #define MS_TM_READ_BYTES 0x00 #define MS_TM_NORMAL_READ 0x01 #define MS_TM_WRITE_BYTES 0x04 #define MS_TM_NORMAL_WRITE 0x05 #define MS_TM_AUTO_READ 0x08 #define MS_TM_AUTO_WRITE 0x0C #define MS_TM_SET_CMD 0x06 #define MS_TM_COPY_PAGE 0x07 #define MS_TM_MULTI_READ 0x02 #define MS_TM_MULTI_WRITE 0x03 /* MC_FIFO_CTL */ #define FIFO_FLUSH 0x01 /* MC_DMA_RST */ #define DMA_RESET 0x01 /* MC_DMA_CTL */ #define DMA_TC_EQ_0 0x80 #define DMA_DIR_TO_CARD 0x00 #define DMA_DIR_FROM_CARD 0x02 #define DMA_EN 0x01 #define DMA_128 (0 << 2) #define DMA_256 (1 << 2) #define DMA_512 (2 << 2) #define DMA_1024 (3 << 2) #define DMA_PACK_SIZE_MASK 0x0C /* CARD_INT_PEND */ #define XD_INT 0x10 #define MS_INT 0x08 #define SD_INT 0x04 /* LED operations*/ static inline int rtsx_usb_turn_on_led(struct rtsx_ucr *ucr) { return rtsx_usb_ep0_write_register(ucr, CARD_GPIO, 0x03, 0x02); } static inline int rtsx_usb_turn_off_led(struct rtsx_ucr *ucr) { return rtsx_usb_ep0_write_register(ucr, CARD_GPIO, 0x03, 0x03); } /* HW error clearing */ static inline void rtsx_usb_clear_fsm_err(struct rtsx_ucr *ucr) { rtsx_usb_ep0_write_register(ucr, SFSM_ED, 0xf8, 0xf8); } static inline void rtsx_usb_clear_dma_err(struct rtsx_ucr *ucr) { rtsx_usb_ep0_write_register(ucr, MC_FIFO_CTL, FIFO_FLUSH, FIFO_FLUSH); rtsx_usb_ep0_write_register(ucr, MC_DMA_RST, DMA_RESET, DMA_RESET); } #endif /* __RTS51139_H */ PK ! �2�/ / bcd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _BCD_H #define _BCD_H #include <linux/compiler.h> #define bcd2bin(x) \ (__builtin_constant_p((u8 )(x)) ? \ const_bcd2bin(x) : \ _bcd2bin(x)) #define bin2bcd(x) \ (__builtin_constant_p((u8 )(x)) ? \ const_bin2bcd(x) : \ _bin2bcd(x)) #define const_bcd2bin(x) (((x) & 0x0f) + ((x) >> 4) * 10) #define const_bin2bcd(x) ((((x) / 10) << 4) + (x) % 10) unsigned _bcd2bin(unsigned char val) __attribute_const__; unsigned char _bin2bcd(unsigned val) __attribute_const__; #endif /* _BCD_H */ PK ! G�_�{ { kcore.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * /proc/kcore definitions */ #ifndef _LINUX_KCORE_H #define _LINUX_KCORE_H enum kcore_type { KCORE_TEXT, KCORE_VMALLOC, KCORE_RAM, KCORE_VMEMMAP, KCORE_USER, }; struct kcore_list { struct list_head list; unsigned long addr; size_t size; int type; }; struct vmcore { struct list_head list; unsigned long long paddr; unsigned long long size; loff_t offset; }; struct vmcoredd_node { struct list_head list; /* List of dumps */ void *buf; /* Buffer containing device's dump */ unsigned int size; /* Size of the buffer */ }; #ifdef CONFIG_PROC_KCORE void __init kclist_add(struct kcore_list *, void *, size_t, int type); extern int __init register_mem_pfn_is_ram(int (*fn)(unsigned long pfn)); #else static inline void kclist_add(struct kcore_list *new, void *addr, size_t size, int type) { } #endif #endif /* _LINUX_KCORE_H */ PK ! � static_key.hnu �[��� #include <linux/jump_label.h> PK ! �A� fsl_hypervisor.hnu �[��� /* * Freescale hypervisor ioctl and kernel interface * * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. * Author: Timur Tabi <timur@freescale.com> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * This software is provided by Freescale Semiconductor "as is" and any * express or implied warranties, including, but not limited to, the implied * warranties of merchantability and fitness for a particular purpose are * disclaimed. In no event shall Freescale Semiconductor be liable for any * direct, indirect, incidental, special, exemplary, or consequential damages * (including, but not limited to, procurement of substitute goods or services; * loss of use, data, or profits; or business interruption) however caused and * on any theory of liability, whether in contract, strict liability, or tort * (including negligence or otherwise) arising in any way out of the use of this * software, even if advised of the possibility of such damage. * * This file is used by the Freescale hypervisor management driver. It can * also be included by applications that need to communicate with the driver * via the ioctl interface. */ #ifndef FSL_HYPERVISOR_H #define FSL_HYPERVISOR_H #include <uapi/linux/fsl_hypervisor.h> /** * fsl_hv_event_register() - register a callback for failover events * @nb: pointer to caller-supplied notifier_block structure * * This function is called by device drivers to register their callback * functions for fail-over events. * * The caller should allocate a notifier_block object and initialize the * 'priority' and 'notifier_call' fields. */ int fsl_hv_failover_register(struct notifier_block *nb); /** * fsl_hv_event_unregister() - unregister a callback for failover events * @nb: the same 'nb' used in previous fsl_hv_failover_register call */ int fsl_hv_failover_unregister(struct notifier_block *nb); #endif PK ! \���� �� blkdev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BLKDEV_H #define _LINUX_BLKDEV_H #include <linux/sched.h> #include <linux/sched/clock.h> #include <linux/major.h> #include <linux/genhd.h> #include <linux/list.h> #include <linux/llist.h> #include <linux/minmax.h> #include <linux/timer.h> #include <linux/workqueue.h> #include <linux/wait.h> #include <linux/mempool.h> #include <linux/pfn.h> #include <linux/bio.h> #include <linux/stringify.h> #include <linux/gfp.h> #include <linux/smp.h> #include <linux/rcupdate.h> #include <linux/percpu-refcount.h> #include <linux/scatterlist.h> #include <linux/blkzoned.h> #include <linux/pm.h> #include <linux/sbitmap.h> struct module; struct request_queue; struct elevator_queue; struct blk_trace; struct request; struct sg_io_hdr; struct blkcg_gq; struct blk_flush_queue; struct pr_ops; struct rq_qos; struct blk_queue_stats; struct blk_stat_callback; struct blk_keyslot_manager; #define BLKDEV_MIN_RQ 4 #define BLKDEV_MAX_RQ 128 /* Default maximum */ /* Must be consistent with blk_mq_poll_stats_bkt() */ #define BLK_MQ_POLL_STATS_BKTS 16 /* Doing classic polling */ #define BLK_MQ_POLL_CLASSIC -1 /* * Maximum number of blkcg policies allowed to be registered concurrently. * Defined here to simplify include dependency. */ #define BLKCG_MAX_POLS 6 typedef void (rq_end_io_fn)(struct request *, blk_status_t); /* * request flags */ typedef __u32 __bitwise req_flags_t; /* drive already may have started this one */ #define RQF_STARTED ((__force req_flags_t)(1 << 1)) /* may not be passed by ioscheduler */ #define RQF_SOFTBARRIER ((__force req_flags_t)(1 << 3)) /* request for flush sequence */ #define RQF_FLUSH_SEQ ((__force req_flags_t)(1 << 4)) /* merge of different types, fail separately */ #define RQF_MIXED_MERGE ((__force req_flags_t)(1 << 5)) /* track inflight for MQ */ #define RQF_MQ_INFLIGHT ((__force req_flags_t)(1 << 6)) /* don't call prep for this one */ #define RQF_DONTPREP ((__force req_flags_t)(1 << 7)) /* vaguely specified driver internal error. Ignored by the block layer */ #define RQF_FAILED ((__force req_flags_t)(1 << 10)) /* don't warn about errors */ #define RQF_QUIET ((__force req_flags_t)(1 << 11)) /* elevator private data attached */ #define RQF_ELVPRIV ((__force req_flags_t)(1 << 12)) /* account into disk and partition IO statistics */ #define RQF_IO_STAT ((__force req_flags_t)(1 << 13)) /* runtime pm request */ #define RQF_PM ((__force req_flags_t)(1 << 15)) /* on IO scheduler merge hash */ #define RQF_HASHED ((__force req_flags_t)(1 << 16)) /* track IO completion time */ #define RQF_STATS ((__force req_flags_t)(1 << 17)) /* Look at ->special_vec for the actual data payload instead of the bio chain. */ #define RQF_SPECIAL_PAYLOAD ((__force req_flags_t)(1 << 18)) /* The per-zone write lock is held for this request */ #define RQF_ZONE_WRITE_LOCKED ((__force req_flags_t)(1 << 19)) /* already slept for hybrid poll */ #define RQF_MQ_POLL_SLEPT ((__force req_flags_t)(1 << 20)) /* ->timeout has been called, don't expire again */ #define RQF_TIMED_OUT ((__force req_flags_t)(1 << 21)) /* flags that prevent us from merging requests: */ #define RQF_NOMERGE_FLAGS \ (RQF_STARTED | RQF_SOFTBARRIER | RQF_FLUSH_SEQ | RQF_SPECIAL_PAYLOAD) /* * Request state for blk-mq. */ enum mq_rq_state { MQ_RQ_IDLE = 0, MQ_RQ_IN_FLIGHT = 1, MQ_RQ_COMPLETE = 2, }; /* * Try to put the fields that are referenced together in the same cacheline. * * If you modify this structure, make sure to update blk_rq_init() and * especially blk_mq_rq_ctx_init() to take care of the added fields. */ struct request { struct request_queue *q; struct blk_mq_ctx *mq_ctx; struct blk_mq_hw_ctx *mq_hctx; unsigned int cmd_flags; /* op and common flags */ req_flags_t rq_flags; int tag; int internal_tag; /* the following two fields are internal, NEVER access directly */ unsigned int __data_len; /* total data len */ sector_t __sector; /* sector cursor */ struct bio *bio; struct bio *biotail; struct list_head queuelist; /* * The hash is used inside the scheduler, and killed once the * request reaches the dispatch list. The ipi_list is only used * to queue the request for softirq completion, which is long * after the request has been unhashed (and even removed from * the dispatch list). */ union { struct hlist_node hash; /* merge hash */ struct llist_node ipi_list; }; /* * The rb_node is only used inside the io scheduler, requests * are pruned when moved to the dispatch queue. So let the * completion_data share space with the rb_node. */ union { struct rb_node rb_node; /* sort/lookup */ struct bio_vec special_vec; void *completion_data; int error_count; /* for legacy drivers, don't use */ }; /* * Three pointers are available for the IO schedulers, if they need * more they have to dynamically allocate it. Flush requests are * never put on the IO scheduler. So let the flush fields share * space with the elevator data. */ union { struct { struct io_cq *icq; void *priv[2]; } elv; struct { unsigned int seq; struct list_head list; rq_end_io_fn *saved_end_io; } flush; }; struct gendisk *rq_disk; struct block_device *part; #ifdef CONFIG_BLK_RQ_ALLOC_TIME /* Time that the first bio started allocating this request. */ u64 alloc_time_ns; #endif /* Time that this request was allocated for this IO. */ u64 start_time_ns; /* Time that I/O was submitted to the device. */ u64 io_start_time_ns; #ifdef CONFIG_BLK_WBT unsigned short wbt_flags; #endif /* * rq sectors used for blk stats. It has the same value * with blk_rq_sectors(rq), except that it never be zeroed * by completion. */ unsigned short stats_sectors; /* * Number of scatter-gather DMA addr+len pairs after * physical address coalescing is performed. */ unsigned short nr_phys_segments; #if defined(CONFIG_BLK_DEV_INTEGRITY) unsigned short nr_integrity_segments; #endif #ifdef CONFIG_BLK_INLINE_ENCRYPTION struct bio_crypt_ctx *crypt_ctx; struct blk_ksm_keyslot *crypt_keyslot; #endif unsigned short write_hint; unsigned short ioprio; enum mq_rq_state state; refcount_t ref; unsigned int timeout; unsigned long deadline; union { struct __call_single_data csd; u64 fifo_time; }; /* * completion callback. */ rq_end_io_fn *end_io; void *end_io_data; }; static inline int blk_validate_block_size(unsigned long bsize) { if (bsize < 512 || bsize > PAGE_SIZE || !is_power_of_2(bsize)) return -EINVAL; return 0; } static inline bool blk_op_is_passthrough(unsigned int op) { op &= REQ_OP_MASK; return op == REQ_OP_DRV_IN || op == REQ_OP_DRV_OUT; } static inline bool blk_rq_is_passthrough(struct request *rq) { return blk_op_is_passthrough(req_op(rq)); } static inline unsigned short req_get_ioprio(struct request *req) { return req->ioprio; } #include <linux/elevator.h> struct bio_vec; enum blk_eh_timer_return { BLK_EH_DONE, /* drivers has completed the command */ BLK_EH_RESET_TIMER, /* reset timer and try again */ }; enum blk_queue_state { Queue_down, Queue_up, }; #define BLK_TAG_ALLOC_FIFO 0 /* allocate starting from 0 */ #define BLK_TAG_ALLOC_RR 1 /* allocate starting from last allocated tag */ /* * Zoned block device models (zoned limit). * * Note: This needs to be ordered from the least to the most severe * restrictions for the inheritance in blk_stack_limits() to work. */ enum blk_zoned_model { BLK_ZONED_NONE = 0, /* Regular block device */ BLK_ZONED_HA, /* Host-aware zoned block device */ BLK_ZONED_HM, /* Host-managed zoned block device */ }; /* * BLK_BOUNCE_NONE: never bounce (default) * BLK_BOUNCE_HIGH: bounce all highmem pages */ enum blk_bounce { BLK_BOUNCE_NONE, BLK_BOUNCE_HIGH, }; struct queue_limits { enum blk_bounce bounce; unsigned long seg_boundary_mask; unsigned long virt_boundary_mask; unsigned int max_hw_sectors; unsigned int max_dev_sectors; unsigned int chunk_sectors; unsigned int max_sectors; unsigned int max_segment_size; unsigned int physical_block_size; unsigned int logical_block_size; unsigned int alignment_offset; unsigned int io_min; unsigned int io_opt; unsigned int max_discard_sectors; unsigned int max_hw_discard_sectors; unsigned int max_write_same_sectors; unsigned int max_write_zeroes_sectors; unsigned int max_zone_append_sectors; unsigned int discard_granularity; unsigned int discard_alignment; unsigned int zone_write_granularity; unsigned short max_segments; unsigned short max_integrity_segments; unsigned short max_discard_segments; unsigned char misaligned; unsigned char discard_misaligned; unsigned char raid_partial_stripes_expensive; enum blk_zoned_model zoned; }; typedef int (*report_zones_cb)(struct blk_zone *zone, unsigned int idx, void *data); void blk_queue_set_zoned(struct gendisk *disk, enum blk_zoned_model model); #ifdef CONFIG_BLK_DEV_ZONED #define BLK_ALL_ZONES ((unsigned int)-1) int blkdev_report_zones(struct block_device *bdev, sector_t sector, unsigned int nr_zones, report_zones_cb cb, void *data); unsigned int blkdev_nr_zones(struct gendisk *disk); extern int blkdev_zone_mgmt(struct block_device *bdev, enum req_opf op, sector_t sectors, sector_t nr_sectors, gfp_t gfp_mask); int blk_revalidate_disk_zones(struct gendisk *disk, void (*update_driver_data)(struct gendisk *disk)); extern int blkdev_report_zones_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg); extern int blkdev_zone_mgmt_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg); #else /* CONFIG_BLK_DEV_ZONED */ static inline unsigned int blkdev_nr_zones(struct gendisk *disk) { return 0; } static inline int blkdev_report_zones_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg) { return -ENOTTY; } static inline int blkdev_zone_mgmt_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg) { return -ENOTTY; } #endif /* CONFIG_BLK_DEV_ZONED */ struct request_queue { struct request *last_merge; struct elevator_queue *elevator; struct percpu_ref q_usage_counter; struct blk_queue_stats *stats; struct rq_qos *rq_qos; const struct blk_mq_ops *mq_ops; /* sw queues */ struct blk_mq_ctx __percpu *queue_ctx; unsigned int queue_depth; /* hw dispatch queues */ struct blk_mq_hw_ctx **queue_hw_ctx; unsigned int nr_hw_queues; /* * The queue owner gets to use this for whatever they like. * ll_rw_blk doesn't touch it. */ void *queuedata; /* * various queue flags, see QUEUE_* below */ unsigned long queue_flags; /* * Number of contexts that have called blk_set_pm_only(). If this * counter is above zero then only RQF_PM requests are processed. */ atomic_t pm_only; /* * ida allocated id for this queue. Used to index queues from * ioctx. */ int id; spinlock_t queue_lock; struct gendisk *disk; /* * queue kobject */ struct kobject kobj; /* * mq queue kobject */ struct kobject *mq_kobj; #ifdef CONFIG_BLK_DEV_INTEGRITY struct blk_integrity integrity; #endif /* CONFIG_BLK_DEV_INTEGRITY */ #ifdef CONFIG_PM struct device *dev; enum rpm_status rpm_status; #endif /* * queue settings */ unsigned long nr_requests; /* Max # of requests */ unsigned int dma_pad_mask; unsigned int dma_alignment; #ifdef CONFIG_BLK_INLINE_ENCRYPTION /* Inline crypto capabilities */ struct blk_keyslot_manager *ksm; #endif unsigned int rq_timeout; int poll_nsec; struct blk_stat_callback *poll_cb; struct blk_rq_stat poll_stat[BLK_MQ_POLL_STATS_BKTS]; struct timer_list timeout; struct work_struct timeout_work; atomic_t nr_active_requests_shared_sbitmap; struct sbitmap_queue sched_bitmap_tags; struct sbitmap_queue sched_breserved_tags; struct list_head icq_list; #ifdef CONFIG_BLK_CGROUP DECLARE_BITMAP (blkcg_pols, BLKCG_MAX_POLS); struct blkcg_gq *root_blkg; struct list_head blkg_list; #endif struct queue_limits limits; unsigned int required_elevator_features; #ifdef CONFIG_BLK_DEV_ZONED /* * Zoned block device information for request dispatch control. * nr_zones is the total number of zones of the device. This is always * 0 for regular block devices. conv_zones_bitmap is a bitmap of nr_zones * bits which indicates if a zone is conventional (bit set) or * sequential (bit clear). seq_zones_wlock is a bitmap of nr_zones * bits which indicates if a zone is write locked, that is, if a write * request targeting the zone was dispatched. All three fields are * initialized by the low level device driver (e.g. scsi/sd.c). * Stacking drivers (device mappers) may or may not initialize * these fields. * * Reads of this information must be protected with blk_queue_enter() / * blk_queue_exit(). Modifying this information is only allowed while * no requests are being processed. See also blk_mq_freeze_queue() and * blk_mq_unfreeze_queue(). */ unsigned int nr_zones; unsigned long *conv_zones_bitmap; unsigned long *seq_zones_wlock; unsigned int max_open_zones; unsigned int max_active_zones; #endif /* CONFIG_BLK_DEV_ZONED */ int node; struct mutex debugfs_mutex; #ifdef CONFIG_BLK_DEV_IO_TRACE struct blk_trace __rcu *blk_trace; #endif /* * for flush operations */ struct blk_flush_queue *fq; struct list_head requeue_list; spinlock_t requeue_lock; struct delayed_work requeue_work; struct mutex sysfs_lock; struct mutex sysfs_dir_lock; /* * for reusing dead hctx instance in case of updating * nr_hw_queues */ struct list_head unused_hctx_list; spinlock_t unused_hctx_lock; int mq_freeze_depth; #ifdef CONFIG_BLK_DEV_THROTTLING /* Throttle data */ struct throtl_data *td; #endif struct rcu_head rcu_head; wait_queue_head_t mq_freeze_wq; /* * Protect concurrent access to q_usage_counter by * percpu_ref_kill() and percpu_ref_reinit(). */ struct mutex mq_freeze_lock; struct blk_mq_tag_set *tag_set; struct list_head tag_set_list; struct bio_set bio_split; struct dentry *debugfs_dir; #ifdef CONFIG_BLK_DEBUG_FS struct dentry *sched_debugfs_dir; struct dentry *rqos_debugfs_dir; #endif bool mq_sysfs_init_done; size_t cmd_size; #define BLK_MAX_WRITE_HINTS 5 u64 write_hints[BLK_MAX_WRITE_HINTS]; }; /* Keep blk_queue_flag_name[] in sync with the definitions below */ #define QUEUE_FLAG_STOPPED 0 /* queue is stopped */ #define QUEUE_FLAG_DYING 1 /* queue being torn down */ #define QUEUE_FLAG_NOMERGES 3 /* disable merge attempts */ #define QUEUE_FLAG_SAME_COMP 4 /* complete on same CPU-group */ #define QUEUE_FLAG_FAIL_IO 5 /* fake timeout */ #define QUEUE_FLAG_NONROT 6 /* non-rotational device (SSD) */ #define QUEUE_FLAG_VIRT QUEUE_FLAG_NONROT /* paravirt device */ #define QUEUE_FLAG_IO_STAT 7 /* do disk/partitions IO accounting */ #define QUEUE_FLAG_DISCARD 8 /* supports DISCARD */ #define QUEUE_FLAG_NOXMERGES 9 /* No extended merges */ #define QUEUE_FLAG_ADD_RANDOM 10 /* Contributes to random pool */ #define QUEUE_FLAG_SECERASE 11 /* supports secure erase */ #define QUEUE_FLAG_SAME_FORCE 12 /* force complete on same CPU */ #define QUEUE_FLAG_DEAD 13 /* queue tear-down finished */ #define QUEUE_FLAG_INIT_DONE 14 /* queue is initialized */ #define QUEUE_FLAG_STABLE_WRITES 15 /* don't modify blks until WB is done */ #define QUEUE_FLAG_POLL 16 /* IO polling enabled if set */ #define QUEUE_FLAG_WC 17 /* Write back caching */ #define QUEUE_FLAG_FUA 18 /* device supports FUA writes */ #define QUEUE_FLAG_DAX 19 /* device supports DAX */ #define QUEUE_FLAG_STATS 20 /* track IO start and completion times */ #define QUEUE_FLAG_POLL_STATS 21 /* collecting stats for hybrid polling */ #define QUEUE_FLAG_REGISTERED 22 /* queue has been registered to a disk */ #define QUEUE_FLAG_SCSI_PASSTHROUGH 23 /* queue supports SCSI commands */ #define QUEUE_FLAG_QUIESCED 24 /* queue has been quiesced */ #define QUEUE_FLAG_PCI_P2PDMA 25 /* device supports PCI p2p requests */ #define QUEUE_FLAG_ZONE_RESETALL 26 /* supports Zone Reset All */ #define QUEUE_FLAG_RQ_ALLOC_TIME 27 /* record rq->alloc_time_ns */ #define QUEUE_FLAG_HCTX_ACTIVE 28 /* at least one blk-mq hctx is active */ #define QUEUE_FLAG_NOWAIT 29 /* device supports NOWAIT */ #define QUEUE_FLAG_MQ_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \ (1 << QUEUE_FLAG_SAME_COMP) | \ (1 << QUEUE_FLAG_NOWAIT)) void blk_queue_flag_set(unsigned int flag, struct request_queue *q); void blk_queue_flag_clear(unsigned int flag, struct request_queue *q); bool blk_queue_flag_test_and_set(unsigned int flag, struct request_queue *q); #define blk_queue_stopped(q) test_bit(QUEUE_FLAG_STOPPED, &(q)->queue_flags) #define blk_queue_dying(q) test_bit(QUEUE_FLAG_DYING, &(q)->queue_flags) #define blk_queue_dead(q) test_bit(QUEUE_FLAG_DEAD, &(q)->queue_flags) #define blk_queue_init_done(q) test_bit(QUEUE_FLAG_INIT_DONE, &(q)->queue_flags) #define blk_queue_nomerges(q) test_bit(QUEUE_FLAG_NOMERGES, &(q)->queue_flags) #define blk_queue_noxmerges(q) \ test_bit(QUEUE_FLAG_NOXMERGES, &(q)->queue_flags) #define blk_queue_nonrot(q) test_bit(QUEUE_FLAG_NONROT, &(q)->queue_flags) #define blk_queue_stable_writes(q) \ test_bit(QUEUE_FLAG_STABLE_WRITES, &(q)->queue_flags) #define blk_queue_io_stat(q) test_bit(QUEUE_FLAG_IO_STAT, &(q)->queue_flags) #define blk_queue_add_random(q) test_bit(QUEUE_FLAG_ADD_RANDOM, &(q)->queue_flags) #define blk_queue_discard(q) test_bit(QUEUE_FLAG_DISCARD, &(q)->queue_flags) #define blk_queue_zone_resetall(q) \ test_bit(QUEUE_FLAG_ZONE_RESETALL, &(q)->queue_flags) #define blk_queue_secure_erase(q) \ (test_bit(QUEUE_FLAG_SECERASE, &(q)->queue_flags)) #define blk_queue_dax(q) test_bit(QUEUE_FLAG_DAX, &(q)->queue_flags) #define blk_queue_scsi_passthrough(q) \ test_bit(QUEUE_FLAG_SCSI_PASSTHROUGH, &(q)->queue_flags) #define blk_queue_pci_p2pdma(q) \ test_bit(QUEUE_FLAG_PCI_P2PDMA, &(q)->queue_flags) #ifdef CONFIG_BLK_RQ_ALLOC_TIME #define blk_queue_rq_alloc_time(q) \ test_bit(QUEUE_FLAG_RQ_ALLOC_TIME, &(q)->queue_flags) #else #define blk_queue_rq_alloc_time(q) false #endif #define blk_noretry_request(rq) \ ((rq)->cmd_flags & (REQ_FAILFAST_DEV|REQ_FAILFAST_TRANSPORT| \ REQ_FAILFAST_DRIVER)) #define blk_queue_quiesced(q) test_bit(QUEUE_FLAG_QUIESCED, &(q)->queue_flags) #define blk_queue_pm_only(q) atomic_read(&(q)->pm_only) #define blk_queue_fua(q) test_bit(QUEUE_FLAG_FUA, &(q)->queue_flags) #define blk_queue_registered(q) test_bit(QUEUE_FLAG_REGISTERED, &(q)->queue_flags) #define blk_queue_nowait(q) test_bit(QUEUE_FLAG_NOWAIT, &(q)->queue_flags) extern void blk_set_pm_only(struct request_queue *q); extern void blk_clear_pm_only(struct request_queue *q); #define list_entry_rq(ptr) list_entry((ptr), struct request, queuelist) #define rq_data_dir(rq) (op_is_write(req_op(rq)) ? WRITE : READ) #define rq_dma_dir(rq) \ (op_is_write(req_op(rq)) ? DMA_TO_DEVICE : DMA_FROM_DEVICE) #define dma_map_bvec(dev, bv, dir, attrs) \ dma_map_page_attrs(dev, (bv)->bv_page, (bv)->bv_offset, (bv)->bv_len, \ (dir), (attrs)) static inline bool queue_is_mq(struct request_queue *q) { return q->mq_ops; } #ifdef CONFIG_PM static inline enum rpm_status queue_rpm_status(struct request_queue *q) { return q->rpm_status; } #else static inline enum rpm_status queue_rpm_status(struct request_queue *q) { return RPM_ACTIVE; } #endif static inline enum blk_zoned_model blk_queue_zoned_model(struct request_queue *q) { if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) return q->limits.zoned; return BLK_ZONED_NONE; } static inline bool blk_queue_is_zoned(struct request_queue *q) { switch (blk_queue_zoned_model(q)) { case BLK_ZONED_HA: case BLK_ZONED_HM: return true; default: return false; } } static inline sector_t blk_queue_zone_sectors(struct request_queue *q) { return blk_queue_is_zoned(q) ? q->limits.chunk_sectors : 0; } #ifdef CONFIG_BLK_DEV_ZONED static inline unsigned int blk_queue_nr_zones(struct request_queue *q) { return blk_queue_is_zoned(q) ? q->nr_zones : 0; } static inline unsigned int blk_queue_zone_no(struct request_queue *q, sector_t sector) { if (!blk_queue_is_zoned(q)) return 0; return sector >> ilog2(q->limits.chunk_sectors); } static inline bool blk_queue_zone_is_seq(struct request_queue *q, sector_t sector) { if (!blk_queue_is_zoned(q)) return false; if (!q->conv_zones_bitmap) return true; return !test_bit(blk_queue_zone_no(q, sector), q->conv_zones_bitmap); } static inline void blk_queue_max_open_zones(struct request_queue *q, unsigned int max_open_zones) { q->max_open_zones = max_open_zones; } static inline unsigned int queue_max_open_zones(const struct request_queue *q) { return q->max_open_zones; } static inline void blk_queue_max_active_zones(struct request_queue *q, unsigned int max_active_zones) { q->max_active_zones = max_active_zones; } static inline unsigned int queue_max_active_zones(const struct request_queue *q) { return q->max_active_zones; } #else /* CONFIG_BLK_DEV_ZONED */ static inline unsigned int blk_queue_nr_zones(struct request_queue *q) { return 0; } static inline bool blk_queue_zone_is_seq(struct request_queue *q, sector_t sector) { return false; } static inline unsigned int blk_queue_zone_no(struct request_queue *q, sector_t sector) { return 0; } static inline unsigned int queue_max_open_zones(const struct request_queue *q) { return 0; } static inline unsigned int queue_max_active_zones(const struct request_queue *q) { return 0; } #endif /* CONFIG_BLK_DEV_ZONED */ static inline bool rq_is_sync(struct request *rq) { return op_is_sync(rq->cmd_flags); } static inline bool rq_mergeable(struct request *rq) { if (blk_rq_is_passthrough(rq)) return false; if (req_op(rq) == REQ_OP_FLUSH) return false; if (req_op(rq) == REQ_OP_WRITE_ZEROES) return false; if (req_op(rq) == REQ_OP_ZONE_APPEND) return false; if (rq->cmd_flags & REQ_NOMERGE_FLAGS) return false; if (rq->rq_flags & RQF_NOMERGE_FLAGS) return false; return true; } static inline bool blk_write_same_mergeable(struct bio *a, struct bio *b) { if (bio_page(a) == bio_page(b) && bio_offset(a) == bio_offset(b)) return true; return false; } static inline unsigned int blk_queue_depth(struct request_queue *q) { if (q->queue_depth) return q->queue_depth; return q->nr_requests; } /* * default timeout for SG_IO if none specified */ #define BLK_DEFAULT_SG_TIMEOUT (60 * HZ) #define BLK_MIN_SG_TIMEOUT (7 * HZ) struct rq_map_data { struct page **pages; int page_order; int nr_entries; unsigned long offset; int null_mapped; int from_user; }; struct req_iterator { struct bvec_iter iter; struct bio *bio; }; /* This should not be used directly - use rq_for_each_segment */ #define for_each_bio(_bio) \ for (; _bio; _bio = _bio->bi_next) #define __rq_for_each_bio(_bio, rq) \ if ((rq->bio)) \ for (_bio = (rq)->bio; _bio; _bio = _bio->bi_next) #define rq_for_each_segment(bvl, _rq, _iter) \ __rq_for_each_bio(_iter.bio, _rq) \ bio_for_each_segment(bvl, _iter.bio, _iter.iter) #define rq_for_each_bvec(bvl, _rq, _iter) \ __rq_for_each_bio(_iter.bio, _rq) \ bio_for_each_bvec(bvl, _iter.bio, _iter.iter) #define rq_iter_last(bvec, _iter) \ (_iter.bio->bi_next == NULL && \ bio_iter_last(bvec, _iter.iter)) #ifndef ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE # error "You should define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE for your platform" #endif #if ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE extern void rq_flush_dcache_pages(struct request *rq); #else static inline void rq_flush_dcache_pages(struct request *rq) { } #endif extern int blk_register_queue(struct gendisk *disk); extern void blk_unregister_queue(struct gendisk *disk); blk_qc_t submit_bio_noacct(struct bio *bio); extern void blk_rq_init(struct request_queue *q, struct request *rq); extern void blk_put_request(struct request *); extern struct request *blk_get_request(struct request_queue *, unsigned int op, blk_mq_req_flags_t flags); extern int blk_lld_busy(struct request_queue *q); extern int blk_rq_prep_clone(struct request *rq, struct request *rq_src, struct bio_set *bs, gfp_t gfp_mask, int (*bio_ctr)(struct bio *, struct bio *, void *), void *data); extern void blk_rq_unprep_clone(struct request *rq); extern blk_status_t blk_insert_cloned_request(struct request_queue *q, struct request *rq); int blk_rq_append_bio(struct request *rq, struct bio *bio); extern void blk_queue_split(struct bio **); extern int blk_queue_enter(struct request_queue *q, blk_mq_req_flags_t flags); extern void blk_queue_exit(struct request_queue *q); extern void blk_sync_queue(struct request_queue *q); extern int blk_rq_map_user(struct request_queue *, struct request *, struct rq_map_data *, void __user *, unsigned long, gfp_t); extern int blk_rq_unmap_user(struct bio *); extern int blk_rq_map_kern(struct request_queue *, struct request *, void *, unsigned int, gfp_t); extern int blk_rq_map_user_iov(struct request_queue *, struct request *, struct rq_map_data *, const struct iov_iter *, gfp_t); extern void blk_execute_rq_nowait(struct gendisk *, struct request *, int, rq_end_io_fn *); blk_status_t blk_execute_rq(struct gendisk *bd_disk, struct request *rq, int at_head); /* Helper to convert REQ_OP_XXX to its string format XXX */ extern const char *blk_op_str(unsigned int op); int blk_status_to_errno(blk_status_t status); blk_status_t errno_to_blk_status(int errno); int blk_poll(struct request_queue *q, blk_qc_t cookie, bool spin); static inline struct request_queue *bdev_get_queue(struct block_device *bdev) { return bdev->bd_disk->queue; /* this is never NULL */ } /* * The basic unit of block I/O is a sector. It is used in a number of contexts * in Linux (blk, bio, genhd). The size of one sector is 512 = 2**9 * bytes. Variables of type sector_t represent an offset or size that is a * multiple of 512 bytes. Hence these two constants. */ #ifndef SECTOR_SHIFT #define SECTOR_SHIFT 9 #endif #ifndef SECTOR_SIZE #define SECTOR_SIZE (1 << SECTOR_SHIFT) #endif #define PAGE_SECTORS_SHIFT (PAGE_SHIFT - SECTOR_SHIFT) #define PAGE_SECTORS (1 << PAGE_SECTORS_SHIFT) #define SECTOR_MASK (PAGE_SECTORS - 1) /* * blk_rq_pos() : the current sector * blk_rq_bytes() : bytes left in the entire request * blk_rq_cur_bytes() : bytes left in the current segment * blk_rq_err_bytes() : bytes left till the next error boundary * blk_rq_sectors() : sectors left in the entire request * blk_rq_cur_sectors() : sectors left in the current segment * blk_rq_stats_sectors() : sectors of the entire request used for stats */ static inline sector_t blk_rq_pos(const struct request *rq) { return rq->__sector; } static inline unsigned int blk_rq_bytes(const struct request *rq) { return rq->__data_len; } static inline int blk_rq_cur_bytes(const struct request *rq) { return rq->bio ? bio_cur_bytes(rq->bio) : 0; } extern unsigned int blk_rq_err_bytes(const struct request *rq); static inline unsigned int blk_rq_sectors(const struct request *rq) { return blk_rq_bytes(rq) >> SECTOR_SHIFT; } static inline unsigned int blk_rq_cur_sectors(const struct request *rq) { return blk_rq_cur_bytes(rq) >> SECTOR_SHIFT; } static inline unsigned int blk_rq_stats_sectors(const struct request *rq) { return rq->stats_sectors; } #ifdef CONFIG_BLK_DEV_ZONED /* Helper to convert BLK_ZONE_ZONE_XXX to its string format XXX */ const char *blk_zone_cond_str(enum blk_zone_cond zone_cond); static inline unsigned int bio_zone_no(struct bio *bio) { return blk_queue_zone_no(bdev_get_queue(bio->bi_bdev), bio->bi_iter.bi_sector); } static inline unsigned int bio_zone_is_seq(struct bio *bio) { return blk_queue_zone_is_seq(bdev_get_queue(bio->bi_bdev), bio->bi_iter.bi_sector); } static inline unsigned int blk_rq_zone_no(struct request *rq) { return blk_queue_zone_no(rq->q, blk_rq_pos(rq)); } static inline unsigned int blk_rq_zone_is_seq(struct request *rq) { return blk_queue_zone_is_seq(rq->q, blk_rq_pos(rq)); } #endif /* CONFIG_BLK_DEV_ZONED */ /* * Some commands like WRITE SAME have a payload or data transfer size which * is different from the size of the request. Any driver that supports such * commands using the RQF_SPECIAL_PAYLOAD flag needs to use this helper to * calculate the data transfer size. */ static inline unsigned int blk_rq_payload_bytes(struct request *rq) { if (rq->rq_flags & RQF_SPECIAL_PAYLOAD) return rq->special_vec.bv_len; return blk_rq_bytes(rq); } /* * Return the first full biovec in the request. The caller needs to check that * there are any bvecs before calling this helper. */ static inline struct bio_vec req_bvec(struct request *rq) { if (rq->rq_flags & RQF_SPECIAL_PAYLOAD) return rq->special_vec; return mp_bvec_iter_bvec(rq->bio->bi_io_vec, rq->bio->bi_iter); } static inline unsigned int blk_queue_get_max_sectors(struct request_queue *q, int op) { if (unlikely(op == REQ_OP_DISCARD || op == REQ_OP_SECURE_ERASE)) return min(q->limits.max_discard_sectors, UINT_MAX >> SECTOR_SHIFT); if (unlikely(op == REQ_OP_WRITE_SAME)) return q->limits.max_write_same_sectors; if (unlikely(op == REQ_OP_WRITE_ZEROES)) return q->limits.max_write_zeroes_sectors; return q->limits.max_sectors; } /* * Return maximum size of a request at given offset. Only valid for * file system requests. */ static inline unsigned int blk_max_size_offset(struct request_queue *q, sector_t offset, unsigned int chunk_sectors) { if (!chunk_sectors) { if (q->limits.chunk_sectors) chunk_sectors = q->limits.chunk_sectors; else return q->limits.max_sectors; } if (likely(is_power_of_2(chunk_sectors))) chunk_sectors -= offset & (chunk_sectors - 1); else chunk_sectors -= sector_div(offset, chunk_sectors); return min(q->limits.max_sectors, chunk_sectors); } static inline unsigned int blk_rq_get_max_sectors(struct request *rq, sector_t offset) { struct request_queue *q = rq->q; if (blk_rq_is_passthrough(rq)) return q->limits.max_hw_sectors; if (!q->limits.chunk_sectors || req_op(rq) == REQ_OP_DISCARD || req_op(rq) == REQ_OP_SECURE_ERASE) return blk_queue_get_max_sectors(q, req_op(rq)); return min(blk_max_size_offset(q, offset, 0), blk_queue_get_max_sectors(q, req_op(rq))); } static inline unsigned int blk_rq_count_bios(struct request *rq) { unsigned int nr_bios = 0; struct bio *bio; __rq_for_each_bio(bio, rq) nr_bios++; return nr_bios; } void blk_steal_bios(struct bio_list *list, struct request *rq); /* * Request completion related functions. * * blk_update_request() completes given number of bytes and updates * the request without completing it. */ extern bool blk_update_request(struct request *rq, blk_status_t error, unsigned int nr_bytes); extern void blk_abort_request(struct request *); /* * Access functions for manipulating queue properties */ extern void blk_cleanup_queue(struct request_queue *); void blk_queue_bounce_limit(struct request_queue *q, enum blk_bounce limit); extern void blk_queue_max_hw_sectors(struct request_queue *, unsigned int); extern void blk_queue_chunk_sectors(struct request_queue *, unsigned int); extern void blk_queue_max_segments(struct request_queue *, unsigned short); extern void blk_queue_max_discard_segments(struct request_queue *, unsigned short); extern void blk_queue_max_segment_size(struct request_queue *, unsigned int); extern void blk_queue_max_discard_sectors(struct request_queue *q, unsigned int max_discard_sectors); extern void blk_queue_max_write_same_sectors(struct request_queue *q, unsigned int max_write_same_sectors); extern void blk_queue_max_write_zeroes_sectors(struct request_queue *q, unsigned int max_write_same_sectors); extern void blk_queue_logical_block_size(struct request_queue *, unsigned int); extern void blk_queue_max_zone_append_sectors(struct request_queue *q, unsigned int max_zone_append_sectors); extern void blk_queue_physical_block_size(struct request_queue *, unsigned int); void blk_queue_zone_write_granularity(struct request_queue *q, unsigned int size); extern void blk_queue_alignment_offset(struct request_queue *q, unsigned int alignment); void disk_update_readahead(struct gendisk *disk); extern void blk_limits_io_min(struct queue_limits *limits, unsigned int min); extern void blk_queue_io_min(struct request_queue *q, unsigned int min); extern void blk_limits_io_opt(struct queue_limits *limits, unsigned int opt); extern void blk_queue_io_opt(struct request_queue *q, unsigned int opt); extern void blk_set_queue_depth(struct request_queue *q, unsigned int depth); extern void blk_set_default_limits(struct queue_limits *lim); extern void blk_set_stacking_limits(struct queue_limits *lim); extern int blk_stack_limits(struct queue_limits *t, struct queue_limits *b, sector_t offset); extern void disk_stack_limits(struct gendisk *disk, struct block_device *bdev, sector_t offset); extern void blk_queue_update_dma_pad(struct request_queue *, unsigned int); extern void blk_queue_segment_boundary(struct request_queue *, unsigned long); extern void blk_queue_virt_boundary(struct request_queue *, unsigned long); extern void blk_queue_dma_alignment(struct request_queue *, int); extern void blk_queue_update_dma_alignment(struct request_queue *, int); extern void blk_queue_rq_timeout(struct request_queue *, unsigned int); extern void blk_queue_write_cache(struct request_queue *q, bool enabled, bool fua); extern void blk_queue_required_elevator_features(struct request_queue *q, unsigned int features); extern bool blk_queue_can_use_dma_map_merging(struct request_queue *q, struct device *dev); /* * Number of physical segments as sent to the device. * * Normally this is the number of discontiguous data segments sent by the * submitter. But for data-less command like discard we might have no * actual data segments submitted, but the driver might have to add it's * own special payload. In that case we still return 1 here so that this * special payload will be mapped. */ static inline unsigned short blk_rq_nr_phys_segments(struct request *rq) { if (rq->rq_flags & RQF_SPECIAL_PAYLOAD) return 1; return rq->nr_phys_segments; } /* * Number of discard segments (or ranges) the driver needs to fill in. * Each discard bio merged into a request is counted as one segment. */ static inline unsigned short blk_rq_nr_discard_segments(struct request *rq) { return max_t(unsigned short, rq->nr_phys_segments, 1); } int __blk_rq_map_sg(struct request_queue *q, struct request *rq, struct scatterlist *sglist, struct scatterlist **last_sg); static inline int blk_rq_map_sg(struct request_queue *q, struct request *rq, struct scatterlist *sglist) { struct scatterlist *last_sg = NULL; return __blk_rq_map_sg(q, rq, sglist, &last_sg); } extern void blk_dump_rq_flags(struct request *, char *); bool __must_check blk_get_queue(struct request_queue *); extern void blk_put_queue(struct request_queue *); void blk_mark_disk_dead(struct gendisk *disk); #ifdef CONFIG_BLOCK /* * blk_plug permits building a queue of related requests by holding the I/O * fragments for a short period. This allows merging of sequential requests * into single larger request. As the requests are moved from a per-task list to * the device's request_queue in a batch, this results in improved scalability * as the lock contention for request_queue lock is reduced. * * It is ok not to disable preemption when adding the request to the plug list * or when attempting a merge, because blk_schedule_flush_list() will only flush * the plug list when the task sleeps by itself. For details, please see * schedule() where blk_schedule_flush_plug() is called. */ struct blk_plug { struct list_head mq_list; /* blk-mq requests */ struct list_head cb_list; /* md requires an unplug callback */ unsigned short rq_count; bool multiple_queues; bool nowait; }; struct blk_plug_cb; typedef void (*blk_plug_cb_fn)(struct blk_plug_cb *, bool); struct blk_plug_cb { struct list_head list; blk_plug_cb_fn callback; void *data; }; extern struct blk_plug_cb *blk_check_plugged(blk_plug_cb_fn unplug, void *data, int size); extern void blk_start_plug(struct blk_plug *); extern void blk_finish_plug(struct blk_plug *); extern void blk_flush_plug_list(struct blk_plug *, bool); static inline void blk_flush_plug(struct task_struct *tsk) { struct blk_plug *plug = tsk->plug; if (plug) blk_flush_plug_list(plug, false); } static inline void blk_schedule_flush_plug(struct task_struct *tsk) { struct blk_plug *plug = tsk->plug; if (plug) blk_flush_plug_list(plug, true); } static inline bool blk_needs_flush_plug(struct task_struct *tsk) { struct blk_plug *plug = tsk->plug; return plug && (!list_empty(&plug->mq_list) || !list_empty(&plug->cb_list)); } int blkdev_issue_flush(struct block_device *bdev); long nr_blockdev_pages(void); #else /* CONFIG_BLOCK */ struct blk_plug { }; static inline void blk_start_plug(struct blk_plug *plug) { } static inline void blk_finish_plug(struct blk_plug *plug) { } static inline void blk_flush_plug(struct task_struct *task) { } static inline void blk_schedule_flush_plug(struct task_struct *task) { } static inline bool blk_needs_flush_plug(struct task_struct *tsk) { return false; } static inline int blkdev_issue_flush(struct block_device *bdev) { return 0; } static inline long nr_blockdev_pages(void) { return 0; } #endif /* CONFIG_BLOCK */ extern void blk_io_schedule(void); extern int blkdev_issue_write_same(struct block_device *bdev, sector_t sector, sector_t nr_sects, gfp_t gfp_mask, struct page *page); #define BLKDEV_DISCARD_SECURE (1 << 0) /* issue a secure erase */ extern int blkdev_issue_discard(struct block_device *bdev, sector_t sector, sector_t nr_sects, gfp_t gfp_mask, unsigned long flags); extern int __blkdev_issue_discard(struct block_device *bdev, sector_t sector, sector_t nr_sects, gfp_t gfp_mask, int flags, struct bio **biop); #define BLKDEV_ZERO_NOUNMAP (1 << 0) /* do not free blocks */ #define BLKDEV_ZERO_NOFALLBACK (1 << 1) /* don't write explicit zeroes */ extern int __blkdev_issue_zeroout(struct block_device *bdev, sector_t sector, sector_t nr_sects, gfp_t gfp_mask, struct bio **biop, unsigned flags); extern int blkdev_issue_zeroout(struct block_device *bdev, sector_t sector, sector_t nr_sects, gfp_t gfp_mask, unsigned flags); static inline int sb_issue_discard(struct super_block *sb, sector_t block, sector_t nr_blocks, gfp_t gfp_mask, unsigned long flags) { return blkdev_issue_discard(sb->s_bdev, block << (sb->s_blocksize_bits - SECTOR_SHIFT), nr_blocks << (sb->s_blocksize_bits - SECTOR_SHIFT), gfp_mask, flags); } static inline int sb_issue_zeroout(struct super_block *sb, sector_t block, sector_t nr_blocks, gfp_t gfp_mask) { return blkdev_issue_zeroout(sb->s_bdev, block << (sb->s_blocksize_bits - SECTOR_SHIFT), nr_blocks << (sb->s_blocksize_bits - SECTOR_SHIFT), gfp_mask, 0); } static inline bool bdev_is_partition(struct block_device *bdev) { return bdev->bd_partno; } enum blk_default_limits { BLK_MAX_SEGMENTS = 128, BLK_SAFE_MAX_SECTORS = 255, BLK_MAX_SEGMENT_SIZE = 65536, BLK_SEG_BOUNDARY_MASK = 0xFFFFFFFFUL, }; #define BLK_DEF_MAX_SECTORS 2560u static inline unsigned long queue_segment_boundary(const struct request_queue *q) { return q->limits.seg_boundary_mask; } static inline unsigned long queue_virt_boundary(const struct request_queue *q) { return q->limits.virt_boundary_mask; } static inline unsigned int queue_max_sectors(const struct request_queue *q) { return q->limits.max_sectors; } static inline unsigned int queue_max_bytes(struct request_queue *q) { return min_t(unsigned int, queue_max_sectors(q), INT_MAX >> 9) << 9; } static inline unsigned int queue_max_hw_sectors(const struct request_queue *q) { return q->limits.max_hw_sectors; } static inline unsigned short queue_max_segments(const struct request_queue *q) { return q->limits.max_segments; } static inline unsigned short queue_max_discard_segments(const struct request_queue *q) { return q->limits.max_discard_segments; } static inline unsigned int queue_max_segment_size(const struct request_queue *q) { return q->limits.max_segment_size; } static inline unsigned int queue_max_zone_append_sectors(const struct request_queue *q) { const struct queue_limits *l = &q->limits; return min(l->max_zone_append_sectors, l->max_sectors); } static inline unsigned int bdev_max_zone_append_sectors(struct block_device *bdev) { return queue_max_zone_append_sectors(bdev_get_queue(bdev)); } static inline unsigned int bdev_max_segments(struct block_device *bdev) { return queue_max_segments(bdev_get_queue(bdev)); } static inline unsigned queue_logical_block_size(const struct request_queue *q) { int retval = 512; if (q && q->limits.logical_block_size) retval = q->limits.logical_block_size; return retval; } static inline unsigned int bdev_logical_block_size(struct block_device *bdev) { return queue_logical_block_size(bdev_get_queue(bdev)); } static inline unsigned int queue_physical_block_size(const struct request_queue *q) { return q->limits.physical_block_size; } static inline unsigned int bdev_physical_block_size(struct block_device *bdev) { return queue_physical_block_size(bdev_get_queue(bdev)); } static inline unsigned int queue_io_min(const struct request_queue *q) { return q->limits.io_min; } static inline unsigned int bdev_io_min(struct block_device *bdev) { return queue_io_min(bdev_get_queue(bdev)); } static inline unsigned int queue_io_opt(const struct request_queue *q) { return q->limits.io_opt; } static inline int bdev_io_opt(struct block_device *bdev) { return queue_io_opt(bdev_get_queue(bdev)); } static inline unsigned int queue_zone_write_granularity(const struct request_queue *q) { return q->limits.zone_write_granularity; } static inline unsigned int bdev_zone_write_granularity(struct block_device *bdev) { return queue_zone_write_granularity(bdev_get_queue(bdev)); } static inline int queue_alignment_offset(const struct request_queue *q) { if (q->limits.misaligned) return -1; return q->limits.alignment_offset; } static inline int queue_limit_alignment_offset(struct queue_limits *lim, sector_t sector) { unsigned int granularity = max(lim->physical_block_size, lim->io_min); unsigned int alignment = sector_div(sector, granularity >> SECTOR_SHIFT) << SECTOR_SHIFT; return (granularity + lim->alignment_offset - alignment) % granularity; } static inline int bdev_alignment_offset(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q->limits.misaligned) return -1; if (bdev_is_partition(bdev)) return queue_limit_alignment_offset(&q->limits, bdev->bd_start_sect); return q->limits.alignment_offset; } static inline int queue_discard_alignment(const struct request_queue *q) { if (q->limits.discard_misaligned) return -1; return q->limits.discard_alignment; } static inline int queue_limit_discard_alignment(struct queue_limits *lim, sector_t sector) { unsigned int alignment, granularity, offset; if (!lim->max_discard_sectors) return 0; /* Why are these in bytes, not sectors? */ alignment = lim->discard_alignment >> SECTOR_SHIFT; granularity = lim->discard_granularity >> SECTOR_SHIFT; if (!granularity) return 0; /* Offset of the partition start in 'granularity' sectors */ offset = sector_div(sector, granularity); /* And why do we do this modulus *again* in blkdev_issue_discard()? */ offset = (granularity + alignment - offset) % granularity; /* Turn it back into bytes, gaah */ return offset << SECTOR_SHIFT; } /* * Two cases of handling DISCARD merge: * If max_discard_segments > 1, the driver takes every bio * as a range and send them to controller together. The ranges * needn't to be contiguous. * Otherwise, the bios/requests will be handled as same as * others which should be contiguous. */ static inline bool blk_discard_mergable(struct request *req) { if (req_op(req) == REQ_OP_DISCARD && queue_max_discard_segments(req->q) > 1) return true; return false; } static inline int bdev_discard_alignment(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (bdev_is_partition(bdev)) return queue_limit_discard_alignment(&q->limits, bdev->bd_start_sect); return q->limits.discard_alignment; } static inline unsigned int bdev_write_same(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return q->limits.max_write_same_sectors; return 0; } static inline unsigned int bdev_write_zeroes_sectors(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return q->limits.max_write_zeroes_sectors; return 0; } static inline enum blk_zoned_model bdev_zoned_model(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return blk_queue_zoned_model(q); return BLK_ZONED_NONE; } static inline bool bdev_is_zoned(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return blk_queue_is_zoned(q); return false; } static inline sector_t bdev_zone_sectors(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return blk_queue_zone_sectors(q); return 0; } static inline unsigned int bdev_max_open_zones(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return queue_max_open_zones(q); return 0; } static inline unsigned int bdev_max_active_zones(struct block_device *bdev) { struct request_queue *q = bdev_get_queue(bdev); if (q) return queue_max_active_zones(q); return 0; } static inline int queue_dma_alignment(const struct request_queue *q) { return q ? q->dma_alignment : 511; } static inline int blk_rq_aligned(struct request_queue *q, unsigned long addr, unsigned int len) { unsigned int alignment = queue_dma_alignment(q) | q->dma_pad_mask; return !(addr & alignment) && !(len & alignment); } /* assumes size > 256 */ static inline unsigned int blksize_bits(unsigned int size) { unsigned int bits = 8; do { bits++; size >>= 1; } while (size > 256); return bits; } static inline unsigned int block_size(struct block_device *bdev) { return 1 << bdev->bd_inode->i_blkbits; } int kblockd_schedule_work(struct work_struct *work); int kblockd_mod_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay); #define MODULE_ALIAS_BLOCKDEV(major,minor) \ MODULE_ALIAS("block-major-" __stringify(major) "-" __stringify(minor)) #define MODULE_ALIAS_BLOCKDEV_MAJOR(major) \ MODULE_ALIAS("block-major-" __stringify(major) "-*") #if defined(CONFIG_BLK_DEV_INTEGRITY) enum blk_integrity_flags { BLK_INTEGRITY_VERIFY = 1 << 0, BLK_INTEGRITY_GENERATE = 1 << 1, BLK_INTEGRITY_DEVICE_CAPABLE = 1 << 2, BLK_INTEGRITY_IP_CHECKSUM = 1 << 3, }; struct blk_integrity_iter { void *prot_buf; void *data_buf; sector_t seed; unsigned int data_size; unsigned short interval; const char *disk_name; }; typedef blk_status_t (integrity_processing_fn) (struct blk_integrity_iter *); typedef void (integrity_prepare_fn) (struct request *); typedef void (integrity_complete_fn) (struct request *, unsigned int); struct blk_integrity_profile { integrity_processing_fn *generate_fn; integrity_processing_fn *verify_fn; integrity_prepare_fn *prepare_fn; integrity_complete_fn *complete_fn; const char *name; }; extern void blk_integrity_register(struct gendisk *, struct blk_integrity *); extern void blk_integrity_unregister(struct gendisk *); extern int blk_integrity_compare(struct gendisk *, struct gendisk *); extern int blk_rq_map_integrity_sg(struct request_queue *, struct bio *, struct scatterlist *); extern int blk_rq_count_integrity_sg(struct request_queue *, struct bio *); static inline struct blk_integrity *blk_get_integrity(struct gendisk *disk) { struct blk_integrity *bi = &disk->queue->integrity; if (!bi->profile) return NULL; return bi; } static inline struct blk_integrity *bdev_get_integrity(struct block_device *bdev) { return blk_get_integrity(bdev->bd_disk); } static inline bool blk_integrity_queue_supports_integrity(struct request_queue *q) { return q->integrity.profile; } static inline bool blk_integrity_rq(struct request *rq) { return rq->cmd_flags & REQ_INTEGRITY; } static inline void blk_queue_max_integrity_segments(struct request_queue *q, unsigned int segs) { q->limits.max_integrity_segments = segs; } static inline unsigned short queue_max_integrity_segments(const struct request_queue *q) { return q->limits.max_integrity_segments; } /** * bio_integrity_intervals - Return number of integrity intervals for a bio * @bi: blk_integrity profile for device * @sectors: Size of the bio in 512-byte sectors * * Description: The block layer calculates everything in 512 byte * sectors but integrity metadata is done in terms of the data integrity * interval size of the storage device. Convert the block layer sectors * to the appropriate number of integrity intervals. */ static inline unsigned int bio_integrity_intervals(struct blk_integrity *bi, unsigned int sectors) { return sectors >> (bi->interval_exp - 9); } static inline unsigned int bio_integrity_bytes(struct blk_integrity *bi, unsigned int sectors) { return bio_integrity_intervals(bi, sectors) * bi->tuple_size; } /* * Return the first bvec that contains integrity data. Only drivers that are * limited to a single integrity segment should use this helper. */ static inline struct bio_vec *rq_integrity_vec(struct request *rq) { if (WARN_ON_ONCE(queue_max_integrity_segments(rq->q) > 1)) return NULL; return rq->bio->bi_integrity->bip_vec; } #else /* CONFIG_BLK_DEV_INTEGRITY */ struct bio; struct block_device; struct gendisk; struct blk_integrity; static inline int blk_integrity_rq(struct request *rq) { return 0; } static inline int blk_rq_count_integrity_sg(struct request_queue *q, struct bio *b) { return 0; } static inline int blk_rq_map_integrity_sg(struct request_queue *q, struct bio *b, struct scatterlist *s) { return 0; } static inline struct blk_integrity *bdev_get_integrity(struct block_device *b) { return NULL; } static inline struct blk_integrity *blk_get_integrity(struct gendisk *disk) { return NULL; } static inline bool blk_integrity_queue_supports_integrity(struct request_queue *q) { return false; } static inline int blk_integrity_compare(struct gendisk *a, struct gendisk *b) { return 0; } static inline void blk_integrity_register(struct gendisk *d, struct blk_integrity *b) { } static inline void blk_integrity_unregister(struct gendisk *d) { } static inline void blk_queue_max_integrity_segments(struct request_queue *q, unsigned int segs) { } static inline unsigned short queue_max_integrity_segments(const struct request_queue *q) { return 0; } static inline unsigned int bio_integrity_intervals(struct blk_integrity *bi, unsigned int sectors) { return 0; } static inline unsigned int bio_integrity_bytes(struct blk_integrity *bi, unsigned int sectors) { return 0; } static inline struct bio_vec *rq_integrity_vec(struct request *rq) { return NULL; } #endif /* CONFIG_BLK_DEV_INTEGRITY */ #ifdef CONFIG_BLK_INLINE_ENCRYPTION bool blk_ksm_register(struct blk_keyslot_manager *ksm, struct request_queue *q); void blk_ksm_unregister(struct request_queue *q); #else /* CONFIG_BLK_INLINE_ENCRYPTION */ static inline bool blk_ksm_register(struct blk_keyslot_manager *ksm, struct request_queue *q) { return true; } static inline void blk_ksm_unregister(struct request_queue *q) { } #endif /* CONFIG_BLK_INLINE_ENCRYPTION */ struct block_device_operations { blk_qc_t (*submit_bio) (struct bio *bio); int (*open) (struct block_device *, fmode_t); void (*release) (struct gendisk *, fmode_t); int (*rw_page)(struct block_device *, sector_t, struct page *, unsigned int); int (*ioctl) (struct block_device *, fmode_t, unsigned, unsigned long); int (*compat_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long); unsigned int (*check_events) (struct gendisk *disk, unsigned int clearing); void (*unlock_native_capacity) (struct gendisk *); int (*getgeo)(struct block_device *, struct hd_geometry *); int (*set_read_only)(struct block_device *bdev, bool ro); /* this callback is with swap_lock and sometimes page table lock held */ void (*swap_slot_free_notify) (struct block_device *, unsigned long); int (*report_zones)(struct gendisk *, sector_t sector, unsigned int nr_zones, report_zones_cb cb, void *data); char *(*devnode)(struct gendisk *disk, umode_t *mode); struct module *owner; const struct pr_ops *pr_ops; /* * Special callback for probing GPT entry at a given sector. * Needed by Android devices, used by GPT scanner and MMC blk * driver. */ int (*alternative_gpt_sector)(struct gendisk *disk, sector_t *sector); }; #ifdef CONFIG_COMPAT extern int blkdev_compat_ptr_ioctl(struct block_device *, fmode_t, unsigned int, unsigned long); #else #define blkdev_compat_ptr_ioctl NULL #endif extern int bdev_read_page(struct block_device *, sector_t, struct page *); extern int bdev_write_page(struct block_device *, sector_t, struct page *, struct writeback_control *); #ifdef CONFIG_BLK_DEV_ZONED bool blk_req_needs_zone_write_lock(struct request *rq); bool blk_req_zone_write_trylock(struct request *rq); void __blk_req_zone_write_lock(struct request *rq); void __blk_req_zone_write_unlock(struct request *rq); static inline void blk_req_zone_write_lock(struct request *rq) { if (blk_req_needs_zone_write_lock(rq)) __blk_req_zone_write_lock(rq); } static inline void blk_req_zone_write_unlock(struct request *rq) { if (rq->rq_flags & RQF_ZONE_WRITE_LOCKED) __blk_req_zone_write_unlock(rq); } static inline bool blk_req_zone_is_write_locked(struct request *rq) { return rq->q->seq_zones_wlock && test_bit(blk_rq_zone_no(rq), rq->q->seq_zones_wlock); } static inline bool blk_req_can_dispatch_to_zone(struct request *rq) { if (!blk_req_needs_zone_write_lock(rq)) return true; return !blk_req_zone_is_write_locked(rq); } #else static inline bool blk_req_needs_zone_write_lock(struct request *rq) { return false; } static inline void blk_req_zone_write_lock(struct request *rq) { } static inline void blk_req_zone_write_unlock(struct request *rq) { } static inline bool blk_req_zone_is_write_locked(struct request *rq) { return false; } static inline bool blk_req_can_dispatch_to_zone(struct request *rq) { return true; } #endif /* CONFIG_BLK_DEV_ZONED */ static inline void blk_wake_io_task(struct task_struct *waiter) { /* * If we're polling, the task itself is doing the completions. For * that case, we don't need to signal a wakeup, it's enough to just * mark us as RUNNING. */ if (waiter == current) __set_current_state(TASK_RUNNING); else wake_up_process(waiter); } unsigned long disk_start_io_acct(struct gendisk *disk, unsigned int sectors, unsigned int op); void disk_end_io_acct(struct gendisk *disk, unsigned int op, unsigned long start_time); void bio_start_io_acct_time(struct bio *bio, unsigned long start_time); unsigned long bio_start_io_acct(struct bio *bio); void bio_end_io_acct_remapped(struct bio *bio, unsigned long start_time, struct block_device *orig_bdev); /** * bio_end_io_acct - end I/O accounting for bio based drivers * @bio: bio to end account for * @start: start time returned by bio_start_io_acct() */ static inline void bio_end_io_acct(struct bio *bio, unsigned long start_time) { return bio_end_io_acct_remapped(bio, start_time, bio->bi_bdev); } int bdev_read_only(struct block_device *bdev); int set_blocksize(struct block_device *bdev, int size); const char *bdevname(struct block_device *bdev, char *buffer); int lookup_bdev(const char *pathname, dev_t *dev); void blkdev_show(struct seq_file *seqf, off_t offset); #define BDEVNAME_SIZE 32 /* Largest string for a blockdev identifier */ #define BDEVT_SIZE 10 /* Largest string for MAJ:MIN for blkdev */ #ifdef CONFIG_BLOCK #define BLKDEV_MAJOR_MAX 512 #else #define BLKDEV_MAJOR_MAX 0 #endif struct block_device *blkdev_get_by_path(const char *path, fmode_t mode, void *holder); struct block_device *blkdev_get_by_dev(dev_t dev, fmode_t mode, void *holder); int bd_prepare_to_claim(struct block_device *bdev, void *holder); void bd_abort_claiming(struct block_device *bdev, void *holder); void blkdev_put(struct block_device *bdev, fmode_t mode); /* just for blk-cgroup, don't use elsewhere */ struct block_device *blkdev_get_no_open(dev_t dev); void blkdev_put_no_open(struct block_device *bdev); struct block_device *bdev_alloc(struct gendisk *disk, u8 partno); void bdev_add(struct block_device *bdev, dev_t dev); struct block_device *I_BDEV(struct inode *inode); int truncate_bdev_range(struct block_device *bdev, fmode_t mode, loff_t lstart, loff_t lend); #ifdef CONFIG_BLOCK void invalidate_bdev(struct block_device *bdev); int sync_blockdev(struct block_device *bdev); void sync_bdevs(bool wait); #else static inline void invalidate_bdev(struct block_device *bdev) { } static inline int sync_blockdev(struct block_device *bdev) { return 0; } static inline void sync_bdevs(bool wait) { } #endif int fsync_bdev(struct block_device *bdev); int freeze_bdev(struct block_device *bdev); int thaw_bdev(struct block_device *bdev); #endif /* _LINUX_BLKDEV_H */ PK ! T]��u u fsi-sbefifo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * SBEFIFO FSI Client device driver * * Copyright (C) IBM Corporation 2017 */ #ifndef LINUX_FSI_SBEFIFO_H #define LINUX_FSI_SBEFIFO_H #define SBEFIFO_CMD_PUT_OCC_SRAM 0xa404 #define SBEFIFO_CMD_GET_OCC_SRAM 0xa403 #define SBEFIFO_CMD_GET_SBE_FFDC 0xa801 #define SBEFIFO_MAX_FFDC_SIZE 0x2000 struct device; int sbefifo_submit(struct device *dev, const __be32 *command, size_t cmd_len, __be32 *response, size_t *resp_len); int sbefifo_parse_status(struct device *dev, u16 cmd, __be32 *response, size_t resp_len, size_t *data_len); #endif /* LINUX_FSI_SBEFIFO_H */ PK ! :�j�� � hiddev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 1999-2000 Vojtech Pavlik * * Sponsored by SuSE */ /* * * Should you need to contact me, the author, you can do so either by * e-mail - mail your message to <vojtech@suse.cz>, or by paper mail: * Vojtech Pavlik, Ucitelska 1576, Prague 8, 182 00 Czech Republic */ #ifndef _HIDDEV_H #define _HIDDEV_H #include <uapi/linux/hiddev.h> /* * In-kernel definitions. */ struct hiddev { int minor; int exist; int open; struct mutex existancelock; wait_queue_head_t wait; struct hid_device *hid; struct list_head list; spinlock_t list_lock; bool initialized; }; struct hid_device; struct hid_usage; struct hid_field; struct hid_report; #ifdef CONFIG_USB_HIDDEV int hiddev_connect(struct hid_device *hid, unsigned int force); void hiddev_disconnect(struct hid_device *); void hiddev_hid_event(struct hid_device *hid, struct hid_field *field, struct hid_usage *usage, __s32 value); void hiddev_report_event(struct hid_device *hid, struct hid_report *report); #else static inline int hiddev_connect(struct hid_device *hid, unsigned int force) { return -1; } static inline void hiddev_disconnect(struct hid_device *hid) { } static inline void hiddev_hid_event(struct hid_device *hid, struct hid_field *field, struct hid_usage *usage, __s32 value) { } static inline void hiddev_report_event(struct hid_device *hid, struct hid_report *report) { } #endif #endif PK ! qS+�T T lsm_hook_defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Linux Security Module Hook declarations. * * Copyright (C) 2001 WireX Communications, Inc <chris@wirex.com> * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com> * Copyright (C) 2001 Networks Associates Technology, Inc <ssmalley@nai.com> * Copyright (C) 2001 James Morris <jmorris@intercode.com.au> * Copyright (C) 2001 Silicon Graphics, Inc. (Trust Technology Group) * Copyright (C) 2015 Intel Corporation. * Copyright (C) 2015 Casey Schaufler <casey@schaufler-ca.com> * Copyright (C) 2016 Mellanox Techonologies * Copyright (C) 2020 Google LLC. */ /* * The macro LSM_HOOK is used to define the data structures required by * the LSM framework using the pattern: * * LSM_HOOK(<return_type>, <default_value>, <hook_name>, args...) * * struct security_hook_heads { * #define LSM_HOOK(RET, DEFAULT, NAME, ...) struct hlist_head NAME; * #include <linux/lsm_hook_defs.h> * #undef LSM_HOOK * }; */ LSM_HOOK(int, 0, binder_set_context_mgr, const struct cred *mgr) LSM_HOOK(int, 0, binder_transaction, const struct cred *from, const struct cred *to) LSM_HOOK(int, 0, binder_transfer_binder, const struct cred *from, const struct cred *to) LSM_HOOK(int, 0, binder_transfer_file, const struct cred *from, const struct cred *to, struct file *file) LSM_HOOK(int, 0, ptrace_access_check, struct task_struct *child, unsigned int mode) LSM_HOOK(int, 0, ptrace_traceme, struct task_struct *parent) LSM_HOOK(int, 0, capget, struct task_struct *target, kernel_cap_t *effective, kernel_cap_t *inheritable, kernel_cap_t *permitted) LSM_HOOK(int, 0, capset, struct cred *new, const struct cred *old, const kernel_cap_t *effective, const kernel_cap_t *inheritable, const kernel_cap_t *permitted) LSM_HOOK(int, 0, capable, const struct cred *cred, struct user_namespace *ns, int cap, unsigned int opts) LSM_HOOK(int, 0, quotactl, int cmds, int type, int id, struct super_block *sb) LSM_HOOK(int, 0, quota_on, struct dentry *dentry) LSM_HOOK(int, 0, syslog, int type) LSM_HOOK(int, 0, settime, const struct timespec64 *ts, const struct timezone *tz) LSM_HOOK(int, 1, vm_enough_memory, struct mm_struct *mm, long pages) LSM_HOOK(int, 0, bprm_creds_for_exec, struct linux_binprm *bprm) LSM_HOOK(int, 0, bprm_creds_from_file, struct linux_binprm *bprm, struct file *file) LSM_HOOK(int, 0, bprm_check_security, struct linux_binprm *bprm) LSM_HOOK(void, LSM_RET_VOID, bprm_committing_creds, struct linux_binprm *bprm) LSM_HOOK(void, LSM_RET_VOID, bprm_committed_creds, struct linux_binprm *bprm) LSM_HOOK(int, 0, fs_context_dup, struct fs_context *fc, struct fs_context *src_sc) LSM_HOOK(int, -ENOPARAM, fs_context_parse_param, struct fs_context *fc, struct fs_parameter *param) LSM_HOOK(int, 0, sb_alloc_security, struct super_block *sb) LSM_HOOK(void, LSM_RET_VOID, sb_delete, struct super_block *sb) LSM_HOOK(void, LSM_RET_VOID, sb_free_security, struct super_block *sb) LSM_HOOK(void, LSM_RET_VOID, sb_free_mnt_opts, void *mnt_opts) LSM_HOOK(int, 0, sb_eat_lsm_opts, char *orig, void **mnt_opts) LSM_HOOK(int, 0, sb_mnt_opts_compat, struct super_block *sb, void *mnt_opts) LSM_HOOK(int, 0, sb_remount, struct super_block *sb, void *mnt_opts) LSM_HOOK(int, 0, sb_kern_mount, struct super_block *sb) LSM_HOOK(int, 0, sb_show_options, struct seq_file *m, struct super_block *sb) LSM_HOOK(int, 0, sb_statfs, struct dentry *dentry) LSM_HOOK(int, 0, sb_mount, const char *dev_name, const struct path *path, const char *type, unsigned long flags, void *data) LSM_HOOK(int, 0, sb_umount, struct vfsmount *mnt, int flags) LSM_HOOK(int, 0, sb_pivotroot, const struct path *old_path, const struct path *new_path) LSM_HOOK(int, 0, sb_set_mnt_opts, struct super_block *sb, void *mnt_opts, unsigned long kern_flags, unsigned long *set_kern_flags) LSM_HOOK(int, 0, sb_clone_mnt_opts, const struct super_block *oldsb, struct super_block *newsb, unsigned long kern_flags, unsigned long *set_kern_flags) LSM_HOOK(int, 0, sb_add_mnt_opt, const char *option, const char *val, int len, void **mnt_opts) LSM_HOOK(int, 0, move_mount, const struct path *from_path, const struct path *to_path) LSM_HOOK(int, 0, dentry_init_security, struct dentry *dentry, int mode, const struct qstr *name, void **ctx, u32 *ctxlen) LSM_HOOK(int, 0, dentry_create_files_as, struct dentry *dentry, int mode, struct qstr *name, const struct cred *old, struct cred *new) #ifdef CONFIG_SECURITY_PATH LSM_HOOK(int, 0, path_unlink, const struct path *dir, struct dentry *dentry) LSM_HOOK(int, 0, path_mkdir, const struct path *dir, struct dentry *dentry, umode_t mode) LSM_HOOK(int, 0, path_rmdir, const struct path *dir, struct dentry *dentry) LSM_HOOK(int, 0, path_mknod, const struct path *dir, struct dentry *dentry, umode_t mode, unsigned int dev) LSM_HOOK(int, 0, path_truncate, const struct path *path) LSM_HOOK(int, 0, path_symlink, const struct path *dir, struct dentry *dentry, const char *old_name) LSM_HOOK(int, 0, path_link, struct dentry *old_dentry, const struct path *new_dir, struct dentry *new_dentry) LSM_HOOK(int, 0, path_rename, const struct path *old_dir, struct dentry *old_dentry, const struct path *new_dir, struct dentry *new_dentry) LSM_HOOK(int, 0, path_chmod, const struct path *path, umode_t mode) LSM_HOOK(int, 0, path_chown, const struct path *path, kuid_t uid, kgid_t gid) LSM_HOOK(int, 0, path_chroot, const struct path *path) #endif /* CONFIG_SECURITY_PATH */ /* Needed for inode based security check */ LSM_HOOK(int, 0, path_notify, const struct path *path, u64 mask, unsigned int obj_type) LSM_HOOK(int, 0, inode_alloc_security, struct inode *inode) LSM_HOOK(void, LSM_RET_VOID, inode_free_security, struct inode *inode) LSM_HOOK(int, 0, inode_init_security, struct inode *inode, struct inode *dir, const struct qstr *qstr, const char **name, void **value, size_t *len) LSM_HOOK(int, 0, inode_init_security_anon, struct inode *inode, const struct qstr *name, const struct inode *context_inode) LSM_HOOK(int, 0, inode_create, struct inode *dir, struct dentry *dentry, umode_t mode) LSM_HOOK(int, 0, inode_link, struct dentry *old_dentry, struct inode *dir, struct dentry *new_dentry) LSM_HOOK(int, 0, inode_unlink, struct inode *dir, struct dentry *dentry) LSM_HOOK(int, 0, inode_symlink, struct inode *dir, struct dentry *dentry, const char *old_name) LSM_HOOK(int, 0, inode_mkdir, struct inode *dir, struct dentry *dentry, umode_t mode) LSM_HOOK(int, 0, inode_rmdir, struct inode *dir, struct dentry *dentry) LSM_HOOK(int, 0, inode_mknod, struct inode *dir, struct dentry *dentry, umode_t mode, dev_t dev) LSM_HOOK(int, 0, inode_rename, struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry) LSM_HOOK(int, 0, inode_readlink, struct dentry *dentry) LSM_HOOK(int, 0, inode_follow_link, struct dentry *dentry, struct inode *inode, bool rcu) LSM_HOOK(int, 0, inode_permission, struct inode *inode, int mask) LSM_HOOK(int, 0, inode_setattr, struct dentry *dentry, struct iattr *attr) LSM_HOOK(int, 0, inode_getattr, const struct path *path) LSM_HOOK(int, 0, inode_setxattr, struct user_namespace *mnt_userns, struct dentry *dentry, const char *name, const void *value, size_t size, int flags) LSM_HOOK(void, LSM_RET_VOID, inode_post_setxattr, struct dentry *dentry, const char *name, const void *value, size_t size, int flags) LSM_HOOK(int, 0, inode_getxattr, struct dentry *dentry, const char *name) LSM_HOOK(int, 0, inode_listxattr, struct dentry *dentry) LSM_HOOK(int, 0, inode_removexattr, struct user_namespace *mnt_userns, struct dentry *dentry, const char *name) LSM_HOOK(int, 0, inode_need_killpriv, struct dentry *dentry) LSM_HOOK(int, 0, inode_killpriv, struct user_namespace *mnt_userns, struct dentry *dentry) LSM_HOOK(int, -EOPNOTSUPP, inode_getsecurity, struct user_namespace *mnt_userns, struct inode *inode, const char *name, void **buffer, bool alloc) LSM_HOOK(int, -EOPNOTSUPP, inode_setsecurity, struct inode *inode, const char *name, const void *value, size_t size, int flags) LSM_HOOK(int, 0, inode_listsecurity, struct inode *inode, char *buffer, size_t buffer_size) LSM_HOOK(void, LSM_RET_VOID, inode_getsecid, struct inode *inode, u32 *secid) LSM_HOOK(int, 0, inode_copy_up, struct dentry *src, struct cred **new) LSM_HOOK(int, -EOPNOTSUPP, inode_copy_up_xattr, const char *name) LSM_HOOK(int, 0, kernfs_init_security, struct kernfs_node *kn_dir, struct kernfs_node *kn) LSM_HOOK(int, 0, file_permission, struct file *file, int mask) LSM_HOOK(int, 0, file_alloc_security, struct file *file) LSM_HOOK(void, LSM_RET_VOID, file_free_security, struct file *file) LSM_HOOK(int, 0, file_ioctl, struct file *file, unsigned int cmd, unsigned long arg) LSM_HOOK(int, 0, file_ioctl_compat, struct file *file, unsigned int cmd, unsigned long arg) LSM_HOOK(int, 0, mmap_addr, unsigned long addr) LSM_HOOK(int, 0, mmap_file, struct file *file, unsigned long reqprot, unsigned long prot, unsigned long flags) LSM_HOOK(int, 0, file_mprotect, struct vm_area_struct *vma, unsigned long reqprot, unsigned long prot) LSM_HOOK(int, 0, file_lock, struct file *file, unsigned int cmd) LSM_HOOK(int, 0, file_fcntl, struct file *file, unsigned int cmd, unsigned long arg) LSM_HOOK(void, LSM_RET_VOID, file_set_fowner, struct file *file) LSM_HOOK(int, 0, file_send_sigiotask, struct task_struct *tsk, struct fown_struct *fown, int sig) LSM_HOOK(int, 0, file_receive, struct file *file) LSM_HOOK(int, 0, file_open, struct file *file) LSM_HOOK(int, 0, task_alloc, struct task_struct *task, unsigned long clone_flags) LSM_HOOK(void, LSM_RET_VOID, task_free, struct task_struct *task) LSM_HOOK(int, 0, cred_alloc_blank, struct cred *cred, gfp_t gfp) LSM_HOOK(void, LSM_RET_VOID, cred_free, struct cred *cred) LSM_HOOK(int, 0, cred_prepare, struct cred *new, const struct cred *old, gfp_t gfp) LSM_HOOK(void, LSM_RET_VOID, cred_transfer, struct cred *new, const struct cred *old) LSM_HOOK(void, LSM_RET_VOID, cred_getsecid, const struct cred *c, u32 *secid) LSM_HOOK(int, 0, kernel_act_as, struct cred *new, u32 secid) LSM_HOOK(int, 0, kernel_create_files_as, struct cred *new, struct inode *inode) LSM_HOOK(int, 0, kernel_module_request, char *kmod_name) LSM_HOOK(int, 0, kernel_load_data, enum kernel_load_data_id id, bool contents) LSM_HOOK(int, 0, kernel_post_load_data, char *buf, loff_t size, enum kernel_load_data_id id, char *description) LSM_HOOK(int, 0, kernel_read_file, struct file *file, enum kernel_read_file_id id, bool contents) LSM_HOOK(int, 0, kernel_post_read_file, struct file *file, char *buf, loff_t size, enum kernel_read_file_id id) LSM_HOOK(int, 0, task_fix_setuid, struct cred *new, const struct cred *old, int flags) LSM_HOOK(int, 0, task_fix_setgid, struct cred *new, const struct cred * old, int flags) LSM_HOOK(int, 0, task_setpgid, struct task_struct *p, pid_t pgid) LSM_HOOK(int, 0, task_getpgid, struct task_struct *p) LSM_HOOK(int, 0, task_getsid, struct task_struct *p) LSM_HOOK(void, LSM_RET_VOID, task_getsecid_subj, struct task_struct *p, u32 *secid) LSM_HOOK(void, LSM_RET_VOID, task_getsecid_obj, struct task_struct *p, u32 *secid) LSM_HOOK(int, 0, task_setnice, struct task_struct *p, int nice) LSM_HOOK(int, 0, task_setioprio, struct task_struct *p, int ioprio) LSM_HOOK(int, 0, task_getioprio, struct task_struct *p) LSM_HOOK(int, 0, task_prlimit, const struct cred *cred, const struct cred *tcred, unsigned int flags) LSM_HOOK(int, 0, task_setrlimit, struct task_struct *p, unsigned int resource, struct rlimit *new_rlim) LSM_HOOK(int, 0, task_setscheduler, struct task_struct *p) LSM_HOOK(int, 0, task_getscheduler, struct task_struct *p) LSM_HOOK(int, 0, task_movememory, struct task_struct *p) LSM_HOOK(int, 0, task_kill, struct task_struct *p, struct kernel_siginfo *info, int sig, const struct cred *cred) LSM_HOOK(int, -ENOSYS, task_prctl, int option, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5) LSM_HOOK(void, LSM_RET_VOID, task_to_inode, struct task_struct *p, struct inode *inode) LSM_HOOK(int, 0, ipc_permission, struct kern_ipc_perm *ipcp, short flag) LSM_HOOK(void, LSM_RET_VOID, ipc_getsecid, struct kern_ipc_perm *ipcp, u32 *secid) LSM_HOOK(int, 0, msg_msg_alloc_security, struct msg_msg *msg) LSM_HOOK(void, LSM_RET_VOID, msg_msg_free_security, struct msg_msg *msg) LSM_HOOK(int, 0, msg_queue_alloc_security, struct kern_ipc_perm *perm) LSM_HOOK(void, LSM_RET_VOID, msg_queue_free_security, struct kern_ipc_perm *perm) LSM_HOOK(int, 0, msg_queue_associate, struct kern_ipc_perm *perm, int msqflg) LSM_HOOK(int, 0, msg_queue_msgctl, struct kern_ipc_perm *perm, int cmd) LSM_HOOK(int, 0, msg_queue_msgsnd, struct kern_ipc_perm *perm, struct msg_msg *msg, int msqflg) LSM_HOOK(int, 0, msg_queue_msgrcv, struct kern_ipc_perm *perm, struct msg_msg *msg, struct task_struct *target, long type, int mode) LSM_HOOK(int, 0, shm_alloc_security, struct kern_ipc_perm *perm) LSM_HOOK(void, LSM_RET_VOID, shm_free_security, struct kern_ipc_perm *perm) LSM_HOOK(int, 0, shm_associate, struct kern_ipc_perm *perm, int shmflg) LSM_HOOK(int, 0, shm_shmctl, struct kern_ipc_perm *perm, int cmd) LSM_HOOK(int, 0, shm_shmat, struct kern_ipc_perm *perm, char __user *shmaddr, int shmflg) LSM_HOOK(int, 0, sem_alloc_security, struct kern_ipc_perm *perm) LSM_HOOK(void, LSM_RET_VOID, sem_free_security, struct kern_ipc_perm *perm) LSM_HOOK(int, 0, sem_associate, struct kern_ipc_perm *perm, int semflg) LSM_HOOK(int, 0, sem_semctl, struct kern_ipc_perm *perm, int cmd) LSM_HOOK(int, 0, sem_semop, struct kern_ipc_perm *perm, struct sembuf *sops, unsigned nsops, int alter) LSM_HOOK(int, 0, netlink_send, struct sock *sk, struct sk_buff *skb) LSM_HOOK(void, LSM_RET_VOID, d_instantiate, struct dentry *dentry, struct inode *inode) LSM_HOOK(int, -EINVAL, getprocattr, struct task_struct *p, char *name, char **value) LSM_HOOK(int, -EINVAL, setprocattr, const char *name, void *value, size_t size) LSM_HOOK(int, 0, ismaclabel, const char *name) LSM_HOOK(int, -EOPNOTSUPP, secid_to_secctx, u32 secid, char **secdata, u32 *seclen) LSM_HOOK(int, 0, secctx_to_secid, const char *secdata, u32 seclen, u32 *secid) LSM_HOOK(void, LSM_RET_VOID, release_secctx, char *secdata, u32 seclen) LSM_HOOK(void, LSM_RET_VOID, inode_invalidate_secctx, struct inode *inode) LSM_HOOK(int, 0, inode_notifysecctx, struct inode *inode, void *ctx, u32 ctxlen) LSM_HOOK(int, 0, inode_setsecctx, struct dentry *dentry, void *ctx, u32 ctxlen) LSM_HOOK(int, -EOPNOTSUPP, inode_getsecctx, struct inode *inode, void **ctx, u32 *ctxlen) #if defined(CONFIG_SECURITY) && defined(CONFIG_WATCH_QUEUE) LSM_HOOK(int, 0, post_notification, const struct cred *w_cred, const struct cred *cred, struct watch_notification *n) #endif /* CONFIG_SECURITY && CONFIG_WATCH_QUEUE */ #if defined(CONFIG_SECURITY) && defined(CONFIG_KEY_NOTIFICATIONS) LSM_HOOK(int, 0, watch_key, struct key *key) #endif /* CONFIG_SECURITY && CONFIG_KEY_NOTIFICATIONS */ #ifdef CONFIG_SECURITY_NETWORK LSM_HOOK(int, 0, unix_stream_connect, struct sock *sock, struct sock *other, struct sock *newsk) LSM_HOOK(int, 0, unix_may_send, struct socket *sock, struct socket *other) LSM_HOOK(int, 0, socket_create, int family, int type, int protocol, int kern) LSM_HOOK(int, 0, socket_post_create, struct socket *sock, int family, int type, int protocol, int kern) LSM_HOOK(int, 0, socket_socketpair, struct socket *socka, struct socket *sockb) LSM_HOOK(int, 0, socket_bind, struct socket *sock, struct sockaddr *address, int addrlen) LSM_HOOK(int, 0, socket_connect, struct socket *sock, struct sockaddr *address, int addrlen) LSM_HOOK(int, 0, socket_listen, struct socket *sock, int backlog) LSM_HOOK(int, 0, socket_accept, struct socket *sock, struct socket *newsock) LSM_HOOK(int, 0, socket_sendmsg, struct socket *sock, struct msghdr *msg, int size) LSM_HOOK(int, 0, socket_recvmsg, struct socket *sock, struct msghdr *msg, int size, int flags) LSM_HOOK(int, 0, socket_getsockname, struct socket *sock) LSM_HOOK(int, 0, socket_getpeername, struct socket *sock) LSM_HOOK(int, 0, socket_getsockopt, struct socket *sock, int level, int optname) LSM_HOOK(int, 0, socket_setsockopt, struct socket *sock, int level, int optname) LSM_HOOK(int, 0, socket_shutdown, struct socket *sock, int how) LSM_HOOK(int, 0, socket_sock_rcv_skb, struct sock *sk, struct sk_buff *skb) LSM_HOOK(int, 0, socket_getpeersec_stream, struct socket *sock, char __user *optval, int __user *optlen, unsigned len) LSM_HOOK(int, 0, socket_getpeersec_dgram, struct socket *sock, struct sk_buff *skb, u32 *secid) LSM_HOOK(int, 0, sk_alloc_security, struct sock *sk, int family, gfp_t priority) LSM_HOOK(void, LSM_RET_VOID, sk_free_security, struct sock *sk) LSM_HOOK(void, LSM_RET_VOID, sk_clone_security, const struct sock *sk, struct sock *newsk) LSM_HOOK(void, LSM_RET_VOID, sk_getsecid, struct sock *sk, u32 *secid) LSM_HOOK(void, LSM_RET_VOID, sock_graft, struct sock *sk, struct socket *parent) LSM_HOOK(int, 0, inet_conn_request, const struct sock *sk, struct sk_buff *skb, struct request_sock *req) LSM_HOOK(void, LSM_RET_VOID, inet_csk_clone, struct sock *newsk, const struct request_sock *req) LSM_HOOK(void, LSM_RET_VOID, inet_conn_established, struct sock *sk, struct sk_buff *skb) LSM_HOOK(int, 0, secmark_relabel_packet, u32 secid) LSM_HOOK(void, LSM_RET_VOID, secmark_refcount_inc, void) LSM_HOOK(void, LSM_RET_VOID, secmark_refcount_dec, void) LSM_HOOK(void, LSM_RET_VOID, req_classify_flow, const struct request_sock *req, struct flowi_common *flic) LSM_HOOK(int, 0, tun_dev_alloc_security, void **security) LSM_HOOK(void, LSM_RET_VOID, tun_dev_free_security, void *security) LSM_HOOK(int, 0, tun_dev_create, void) LSM_HOOK(int, 0, tun_dev_attach_queue, void *security) LSM_HOOK(int, 0, tun_dev_attach, struct sock *sk, void *security) LSM_HOOK(int, 0, tun_dev_open, void *security) LSM_HOOK(int, 0, sctp_assoc_request, struct sctp_endpoint *ep, struct sk_buff *skb) LSM_HOOK(int, 0, sctp_bind_connect, struct sock *sk, int optname, struct sockaddr *address, int addrlen) LSM_HOOK(void, LSM_RET_VOID, sctp_sk_clone, struct sctp_endpoint *ep, struct sock *sk, struct sock *newsk) #endif /* CONFIG_SECURITY_NETWORK */ #ifdef CONFIG_SECURITY_INFINIBAND LSM_HOOK(int, 0, ib_pkey_access, void *sec, u64 subnet_prefix, u16 pkey) LSM_HOOK(int, 0, ib_endport_manage_subnet, void *sec, const char *dev_name, u8 port_num) LSM_HOOK(int, 0, ib_alloc_security, void **sec) LSM_HOOK(void, LSM_RET_VOID, ib_free_security, void *sec) #endif /* CONFIG_SECURITY_INFINIBAND */ #ifdef CONFIG_SECURITY_NETWORK_XFRM LSM_HOOK(int, 0, xfrm_policy_alloc_security, struct xfrm_sec_ctx **ctxp, struct xfrm_user_sec_ctx *sec_ctx, gfp_t gfp) LSM_HOOK(int, 0, xfrm_policy_clone_security, struct xfrm_sec_ctx *old_ctx, struct xfrm_sec_ctx **new_ctx) LSM_HOOK(void, LSM_RET_VOID, xfrm_policy_free_security, struct xfrm_sec_ctx *ctx) LSM_HOOK(int, 0, xfrm_policy_delete_security, struct xfrm_sec_ctx *ctx) LSM_HOOK(int, 0, xfrm_state_alloc, struct xfrm_state *x, struct xfrm_user_sec_ctx *sec_ctx) LSM_HOOK(int, 0, xfrm_state_alloc_acquire, struct xfrm_state *x, struct xfrm_sec_ctx *polsec, u32 secid) LSM_HOOK(void, LSM_RET_VOID, xfrm_state_free_security, struct xfrm_state *x) LSM_HOOK(int, 0, xfrm_state_delete_security, struct xfrm_state *x) LSM_HOOK(int, 0, xfrm_policy_lookup, struct xfrm_sec_ctx *ctx, u32 fl_secid) LSM_HOOK(int, 1, xfrm_state_pol_flow_match, struct xfrm_state *x, struct xfrm_policy *xp, const struct flowi_common *flic) LSM_HOOK(int, 0, xfrm_decode_session, struct sk_buff *skb, u32 *secid, int ckall) #endif /* CONFIG_SECURITY_NETWORK_XFRM */ /* key management security hooks */ #ifdef CONFIG_KEYS LSM_HOOK(int, 0, key_alloc, struct key *key, const struct cred *cred, unsigned long flags) LSM_HOOK(void, LSM_RET_VOID, key_free, struct key *key) LSM_HOOK(int, 0, key_permission, key_ref_t key_ref, const struct cred *cred, enum key_need_perm need_perm) LSM_HOOK(int, 0, key_getsecurity, struct key *key, char **_buffer) #endif /* CONFIG_KEYS */ #ifdef CONFIG_AUDIT LSM_HOOK(int, 0, audit_rule_init, u32 field, u32 op, char *rulestr, void **lsmrule, gfp_t gfp) LSM_HOOK(int, 0, audit_rule_known, struct audit_krule *krule) LSM_HOOK(int, 0, audit_rule_match, u32 secid, u32 field, u32 op, void *lsmrule) LSM_HOOK(void, LSM_RET_VOID, audit_rule_free, void *lsmrule) #endif /* CONFIG_AUDIT */ #ifdef CONFIG_BPF_SYSCALL LSM_HOOK(int, 0, bpf, int cmd, union bpf_attr *attr, unsigned int size) LSM_HOOK(int, 0, bpf_map, struct bpf_map *map, fmode_t fmode) LSM_HOOK(int, 0, bpf_prog, struct bpf_prog *prog) LSM_HOOK(int, 0, bpf_map_alloc_security, struct bpf_map *map) LSM_HOOK(void, LSM_RET_VOID, bpf_map_free_security, struct bpf_map *map) LSM_HOOK(int, 0, bpf_prog_alloc_security, struct bpf_prog_aux *aux) LSM_HOOK(void, LSM_RET_VOID, bpf_prog_free_security, struct bpf_prog_aux *aux) #endif /* CONFIG_BPF_SYSCALL */ LSM_HOOK(int, 0, locked_down, enum lockdown_reason what) LSM_HOOK(int, 0, lock_kernel_down, const char *where, enum lockdown_reason level) #ifdef CONFIG_PERF_EVENTS LSM_HOOK(int, 0, perf_event_open, struct perf_event_attr *attr, int type) LSM_HOOK(int, 0, perf_event_alloc, struct perf_event *event) LSM_HOOK(void, LSM_RET_VOID, perf_event_free, struct perf_event *event) LSM_HOOK(int, 0, perf_event_read, struct perf_event *event) LSM_HOOK(int, 0, perf_event_write, struct perf_event *event) #endif /* CONFIG_PERF_EVENTS */ PK ! kn��Y Y scc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* $Id: scc.h,v 1.29 1997/04/02 14:56:45 jreuter Exp jreuter $ */ #ifndef _SCC_H #define _SCC_H #include <uapi/linux/scc.h> enum {TX_OFF, TX_ON}; /* command for scc_key_trx() */ /* Vector masks in RR2B */ #define VECTOR_MASK 0x06 #define TXINT 0x00 #define EXINT 0x02 #define RXINT 0x04 #define SPINT 0x06 #ifdef CONFIG_SCC_DELAY #define Inb(port) inb_p(port) #define Outb(port, val) outb_p(val, port) #else #define Inb(port) inb(port) #define Outb(port, val) outb(val, port) #endif /* SCC channel control structure for KISS */ struct scc_kiss { unsigned char txdelay; /* Transmit Delay 10 ms/cnt */ unsigned char persist; /* Persistence (0-255) as a % */ unsigned char slottime; /* Delay to wait on persistence hit */ unsigned char tailtime; /* Delay after last byte written */ unsigned char fulldup; /* Full Duplex mode 0=CSMA 1=DUP 2=ALWAYS KEYED */ unsigned char waittime; /* Waittime before any transmit attempt */ unsigned int maxkeyup; /* Maximum time to transmit (seconds) */ unsigned int mintime; /* Minimal offtime after MAXKEYUP timeout (seconds) */ unsigned int idletime; /* Maximum idle time in ALWAYS KEYED mode (seconds) */ unsigned int maxdefer; /* Timer for CSMA channel busy limit */ unsigned char tx_inhibit; /* Transmit is not allowed when set */ unsigned char group; /* Group ID for AX.25 TX interlocking */ unsigned char mode; /* 'normal' or 'hwctrl' mode (unused) */ unsigned char softdcd; /* Use DPLL instead of DCD pin for carrier detect */ }; /* SCC channel structure */ struct scc_channel { int init; /* channel exists? */ struct net_device *dev; /* link to device control structure */ struct net_device_stats dev_stat;/* device statistics */ char brand; /* manufacturer of the board */ long clock; /* used clock */ io_port ctrl; /* I/O address of CONTROL register */ io_port data; /* I/O address of DATA register */ io_port special; /* I/O address of special function port */ int irq; /* Number of Interrupt */ char option; char enhanced; /* Enhanced SCC support */ unsigned char wreg[16]; /* Copy of last written value in WRx */ unsigned char status; /* Copy of R0 at last external interrupt */ unsigned char dcd; /* DCD status */ struct scc_kiss kiss; /* control structure for KISS params */ struct scc_stat stat; /* statistical information */ struct scc_modem modem; /* modem information */ struct sk_buff_head tx_queue; /* next tx buffer */ struct sk_buff *rx_buff; /* pointer to frame currently received */ struct sk_buff *tx_buff; /* pointer to frame currently transmitted */ /* Timer */ struct timer_list tx_t; /* tx timer for this channel */ struct timer_list tx_wdog; /* tx watchdogs */ /* Channel lock */ spinlock_t lock; /* Channel guard lock */ }; #endif /* defined(_SCC_H) */ PK ! ��w�s s i2c-dev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* i2c-dev.h - i2c-bus driver, char device interface Copyright (C) 1995-97 Simon G. Vogl Copyright (C) 1998-99 Frodo Looijaard <frodol@dds.nl> */ #ifndef _LINUX_I2C_DEV_H #define _LINUX_I2C_DEV_H #include <uapi/linux/i2c-dev.h> #define I2C_MAJOR 89 /* Device major number */ #endif /* _LINUX_I2C_DEV_H */ PK ! ?\� pm_wakeup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * pm_wakeup.h - Power management wakeup interface * * Copyright (C) 2008 Alan Stern * Copyright (C) 2010 Rafael J. Wysocki, Novell Inc. */ #ifndef _LINUX_PM_WAKEUP_H #define _LINUX_PM_WAKEUP_H #ifndef _DEVICE_H_ # error "please don't include this file directly" #endif #include <linux/types.h> struct wake_irq; /** * struct wakeup_source - Representation of wakeup sources * * @name: Name of the wakeup source * @id: Wakeup source id * @entry: Wakeup source list entry * @lock: Wakeup source lock * @wakeirq: Optional device specific wakeirq * @timer: Wakeup timer list * @timer_expires: Wakeup timer expiration * @total_time: Total time this wakeup source has been active. * @max_time: Maximum time this wakeup source has been continuously active. * @last_time: Monotonic clock when the wakeup source's was touched last time. * @prevent_sleep_time: Total time this source has been preventing autosleep. * @event_count: Number of signaled wakeup events. * @active_count: Number of times the wakeup source was activated. * @relax_count: Number of times the wakeup source was deactivated. * @expire_count: Number of times the wakeup source's timeout has expired. * @wakeup_count: Number of times the wakeup source might abort suspend. * @dev: Struct device for sysfs statistics about the wakeup source. * @active: Status of the wakeup source. * @autosleep_enabled: Autosleep is active, so update @prevent_sleep_time. */ struct wakeup_source { const char *name; int id; struct list_head entry; spinlock_t lock; struct wake_irq *wakeirq; struct timer_list timer; unsigned long timer_expires; ktime_t total_time; ktime_t max_time; ktime_t last_time; ktime_t start_prevent_time; ktime_t prevent_sleep_time; unsigned long event_count; unsigned long active_count; unsigned long relax_count; unsigned long expire_count; unsigned long wakeup_count; struct device *dev; bool active:1; bool autosleep_enabled:1; }; #define for_each_wakeup_source(ws) \ for ((ws) = wakeup_sources_walk_start(); \ (ws); \ (ws) = wakeup_sources_walk_next((ws))) #ifdef CONFIG_PM_SLEEP /* * Changes to device_may_wakeup take effect on the next pm state change. */ static inline bool device_can_wakeup(struct device *dev) { return dev->power.can_wakeup; } static inline bool device_may_wakeup(struct device *dev) { return dev->power.can_wakeup && !!dev->power.wakeup; } static inline bool device_wakeup_path(struct device *dev) { return dev->power.wakeup_path; } static inline void device_set_wakeup_path(struct device *dev) { dev->power.wakeup_path = true; } /* drivers/base/power/wakeup.c */ extern struct wakeup_source *wakeup_source_create(const char *name); extern void wakeup_source_destroy(struct wakeup_source *ws); extern void wakeup_source_add(struct wakeup_source *ws); extern void wakeup_source_remove(struct wakeup_source *ws); extern struct wakeup_source *wakeup_source_register(struct device *dev, const char *name); extern void wakeup_source_unregister(struct wakeup_source *ws); extern int wakeup_sources_read_lock(void); extern void wakeup_sources_read_unlock(int idx); extern struct wakeup_source *wakeup_sources_walk_start(void); extern struct wakeup_source *wakeup_sources_walk_next(struct wakeup_source *ws); extern int device_wakeup_enable(struct device *dev); extern int device_wakeup_disable(struct device *dev); extern void device_set_wakeup_capable(struct device *dev, bool capable); extern int device_init_wakeup(struct device *dev, bool val); extern int device_set_wakeup_enable(struct device *dev, bool enable); extern void __pm_stay_awake(struct wakeup_source *ws); extern void pm_stay_awake(struct device *dev); extern void __pm_relax(struct wakeup_source *ws); extern void pm_relax(struct device *dev); extern void pm_wakeup_ws_event(struct wakeup_source *ws, unsigned int msec, bool hard); extern void pm_wakeup_dev_event(struct device *dev, unsigned int msec, bool hard); #else /* !CONFIG_PM_SLEEP */ static inline void device_set_wakeup_capable(struct device *dev, bool capable) { dev->power.can_wakeup = capable; } static inline bool device_can_wakeup(struct device *dev) { return dev->power.can_wakeup; } static inline struct wakeup_source *wakeup_source_create(const char *name) { return NULL; } static inline void wakeup_source_destroy(struct wakeup_source *ws) {} static inline void wakeup_source_add(struct wakeup_source *ws) {} static inline void wakeup_source_remove(struct wakeup_source *ws) {} static inline struct wakeup_source *wakeup_source_register(struct device *dev, const char *name) { return NULL; } static inline void wakeup_source_unregister(struct wakeup_source *ws) {} static inline int device_wakeup_enable(struct device *dev) { dev->power.should_wakeup = true; return 0; } static inline int device_wakeup_disable(struct device *dev) { dev->power.should_wakeup = false; return 0; } static inline int device_set_wakeup_enable(struct device *dev, bool enable) { dev->power.should_wakeup = enable; return 0; } static inline int device_init_wakeup(struct device *dev, bool val) { device_set_wakeup_capable(dev, val); device_set_wakeup_enable(dev, val); return 0; } static inline bool device_may_wakeup(struct device *dev) { return dev->power.can_wakeup && dev->power.should_wakeup; } static inline bool device_wakeup_path(struct device *dev) { return false; } static inline void device_set_wakeup_path(struct device *dev) {} static inline void __pm_stay_awake(struct wakeup_source *ws) {} static inline void pm_stay_awake(struct device *dev) {} static inline void __pm_relax(struct wakeup_source *ws) {} static inline void pm_relax(struct device *dev) {} static inline void pm_wakeup_ws_event(struct wakeup_source *ws, unsigned int msec, bool hard) {} static inline void pm_wakeup_dev_event(struct device *dev, unsigned int msec, bool hard) {} #endif /* !CONFIG_PM_SLEEP */ static inline void __pm_wakeup_event(struct wakeup_source *ws, unsigned int msec) { return pm_wakeup_ws_event(ws, msec, false); } static inline void pm_wakeup_event(struct device *dev, unsigned int msec) { return pm_wakeup_dev_event(dev, msec, false); } static inline void pm_wakeup_hard_event(struct device *dev) { return pm_wakeup_dev_event(dev, 0, true); } #endif /* _LINUX_PM_WAKEUP_H */ PK ! G�n˵ � compiler-intel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_COMPILER_TYPES_H #error "Please don't include <linux/compiler-intel.h> directly, include <linux/compiler.h> instead." #endif #ifdef __ECC /* Compiler specific definitions for Intel ECC compiler */ #include <asm/intrinsics.h> /* Intel ECC compiler doesn't support gcc specific asm stmts. * It uses intrinsics to do the equivalent things. */ #define barrier() __memory_barrier() #define barrier_data(ptr) barrier() #define RELOC_HIDE(ptr, off) \ ({ unsigned long __ptr; \ __ptr = (unsigned long) (ptr); \ (typeof(ptr)) (__ptr + (off)); }) /* This should act as an optimization barrier on var. * Given that this compiler does not have inline assembly, a compiler barrier * is the best we can do. */ #define OPTIMIZER_HIDE_VAR(var) barrier() #endif /* icc has this, but it's called _bswap16 */ #define __HAVE_BUILTIN_BSWAP16__ #define __builtin_bswap16 _bswap16 PK ! |2�-� -� wait.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_WAIT_H #define _LINUX_WAIT_H /* * Linux wait queue related types and methods */ #include <linux/list.h> #include <linux/stddef.h> #include <linux/spinlock.h> #include <asm/current.h> #include <uapi/linux/wait.h> typedef struct wait_queue_entry wait_queue_entry_t; typedef int (*wait_queue_func_t)(struct wait_queue_entry *wq_entry, unsigned mode, int flags, void *key); int default_wake_function(struct wait_queue_entry *wq_entry, unsigned mode, int flags, void *key); /* wait_queue_entry::flags */ #define WQ_FLAG_EXCLUSIVE 0x01 #define WQ_FLAG_WOKEN 0x02 #define WQ_FLAG_BOOKMARK 0x04 #define WQ_FLAG_CUSTOM 0x08 #define WQ_FLAG_DONE 0x10 #define WQ_FLAG_PRIORITY 0x20 /* * A single wait-queue entry structure: */ struct wait_queue_entry { unsigned int flags; void *private; wait_queue_func_t func; struct list_head entry; }; struct wait_queue_head { spinlock_t lock; struct list_head head; }; typedef struct wait_queue_head wait_queue_head_t; struct task_struct; /* * Macros for declaration and initialisaton of the datatypes */ #define __WAITQUEUE_INITIALIZER(name, tsk) { \ .private = tsk, \ .func = default_wake_function, \ .entry = { NULL, NULL } } #define DECLARE_WAITQUEUE(name, tsk) \ struct wait_queue_entry name = __WAITQUEUE_INITIALIZER(name, tsk) #define __WAIT_QUEUE_HEAD_INITIALIZER(name) { \ .lock = __SPIN_LOCK_UNLOCKED(name.lock), \ .head = LIST_HEAD_INIT(name.head) } #define DECLARE_WAIT_QUEUE_HEAD(name) \ struct wait_queue_head name = __WAIT_QUEUE_HEAD_INITIALIZER(name) extern void __init_waitqueue_head(struct wait_queue_head *wq_head, const char *name, struct lock_class_key *); #define init_waitqueue_head(wq_head) \ do { \ static struct lock_class_key __key; \ \ __init_waitqueue_head((wq_head), #wq_head, &__key); \ } while (0) #ifdef CONFIG_LOCKDEP # define __WAIT_QUEUE_HEAD_INIT_ONSTACK(name) \ ({ init_waitqueue_head(&name); name; }) # define DECLARE_WAIT_QUEUE_HEAD_ONSTACK(name) \ struct wait_queue_head name = __WAIT_QUEUE_HEAD_INIT_ONSTACK(name) #else # define DECLARE_WAIT_QUEUE_HEAD_ONSTACK(name) DECLARE_WAIT_QUEUE_HEAD(name) #endif static inline void init_waitqueue_entry(struct wait_queue_entry *wq_entry, struct task_struct *p) { wq_entry->flags = 0; wq_entry->private = p; wq_entry->func = default_wake_function; } static inline void init_waitqueue_func_entry(struct wait_queue_entry *wq_entry, wait_queue_func_t func) { wq_entry->flags = 0; wq_entry->private = NULL; wq_entry->func = func; } /** * waitqueue_active -- locklessly test for waiters on the queue * @wq_head: the waitqueue to test for waiters * * returns true if the wait list is not empty * * NOTE: this function is lockless and requires care, incorrect usage _will_ * lead to sporadic and non-obvious failure. * * Use either while holding wait_queue_head::lock or when used for wakeups * with an extra smp_mb() like:: * * CPU0 - waker CPU1 - waiter * * for (;;) { * @cond = true; prepare_to_wait(&wq_head, &wait, state); * smp_mb(); // smp_mb() from set_current_state() * if (waitqueue_active(wq_head)) if (@cond) * wake_up(wq_head); break; * schedule(); * } * finish_wait(&wq_head, &wait); * * Because without the explicit smp_mb() it's possible for the * waitqueue_active() load to get hoisted over the @cond store such that we'll * observe an empty wait list while the waiter might not observe @cond. * * Also note that this 'optimization' trades a spin_lock() for an smp_mb(), * which (when the lock is uncontended) are of roughly equal cost. */ static inline int waitqueue_active(struct wait_queue_head *wq_head) { return !list_empty(&wq_head->head); } /** * wq_has_single_sleeper - check if there is only one sleeper * @wq_head: wait queue head * * Returns true of wq_head has only one sleeper on the list. * * Please refer to the comment for waitqueue_active. */ static inline bool wq_has_single_sleeper(struct wait_queue_head *wq_head) { return list_is_singular(&wq_head->head); } /** * wq_has_sleeper - check if there are any waiting processes * @wq_head: wait queue head * * Returns true if wq_head has waiting processes * * Please refer to the comment for waitqueue_active. */ static inline bool wq_has_sleeper(struct wait_queue_head *wq_head) { /* * We need to be sure we are in sync with the * add_wait_queue modifications to the wait queue. * * This memory barrier should be paired with one on the * waiting side. */ smp_mb(); return waitqueue_active(wq_head); } extern void add_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry); extern void add_wait_queue_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry); extern void add_wait_queue_priority(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry); extern void remove_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry); static inline void __add_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry) { struct list_head *head = &wq_head->head; struct wait_queue_entry *wq; list_for_each_entry(wq, &wq_head->head, entry) { if (!(wq->flags & WQ_FLAG_PRIORITY)) break; head = &wq->entry; } list_add(&wq_entry->entry, head); } /* * Used for wake-one threads: */ static inline void __add_wait_queue_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry) { wq_entry->flags |= WQ_FLAG_EXCLUSIVE; __add_wait_queue(wq_head, wq_entry); } static inline void __add_wait_queue_entry_tail(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry) { list_add_tail(&wq_entry->entry, &wq_head->head); } static inline void __add_wait_queue_entry_tail_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry) { wq_entry->flags |= WQ_FLAG_EXCLUSIVE; __add_wait_queue_entry_tail(wq_head, wq_entry); } static inline void __remove_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry) { list_del(&wq_entry->entry); } void __wake_up(struct wait_queue_head *wq_head, unsigned int mode, int nr, void *key); void __wake_up_locked_key(struct wait_queue_head *wq_head, unsigned int mode, void *key); void __wake_up_locked_key_bookmark(struct wait_queue_head *wq_head, unsigned int mode, void *key, wait_queue_entry_t *bookmark); void __wake_up_sync_key(struct wait_queue_head *wq_head, unsigned int mode, void *key); void __wake_up_locked_sync_key(struct wait_queue_head *wq_head, unsigned int mode, void *key); void __wake_up_locked(struct wait_queue_head *wq_head, unsigned int mode, int nr); void __wake_up_sync(struct wait_queue_head *wq_head, unsigned int mode); void __wake_up_pollfree(struct wait_queue_head *wq_head); #define wake_up(x) __wake_up(x, TASK_NORMAL, 1, NULL) #define wake_up_nr(x, nr) __wake_up(x, TASK_NORMAL, nr, NULL) #define wake_up_all(x) __wake_up(x, TASK_NORMAL, 0, NULL) #define wake_up_locked(x) __wake_up_locked((x), TASK_NORMAL, 1) #define wake_up_all_locked(x) __wake_up_locked((x), TASK_NORMAL, 0) #define wake_up_sync(x) __wake_up_sync(x, TASK_NORMAL) #define wake_up_interruptible(x) __wake_up(x, TASK_INTERRUPTIBLE, 1, NULL) #define wake_up_interruptible_nr(x, nr) __wake_up(x, TASK_INTERRUPTIBLE, nr, NULL) #define wake_up_interruptible_all(x) __wake_up(x, TASK_INTERRUPTIBLE, 0, NULL) #define wake_up_interruptible_sync(x) __wake_up_sync((x), TASK_INTERRUPTIBLE) /* * Wakeup macros to be used to report events to the targets. */ #define poll_to_key(m) ((void *)(__force uintptr_t)(__poll_t)(m)) #define key_to_poll(m) ((__force __poll_t)(uintptr_t)(void *)(m)) #define wake_up_poll(x, m) \ __wake_up(x, TASK_NORMAL, 1, poll_to_key(m)) #define wake_up_locked_poll(x, m) \ __wake_up_locked_key((x), TASK_NORMAL, poll_to_key(m)) #define wake_up_interruptible_poll(x, m) \ __wake_up(x, TASK_INTERRUPTIBLE, 1, poll_to_key(m)) #define wake_up_interruptible_sync_poll(x, m) \ __wake_up_sync_key((x), TASK_INTERRUPTIBLE, poll_to_key(m)) #define wake_up_interruptible_sync_poll_locked(x, m) \ __wake_up_locked_sync_key((x), TASK_INTERRUPTIBLE, poll_to_key(m)) /** * wake_up_pollfree - signal that a polled waitqueue is going away * @wq_head: the wait queue head * * In the very rare cases where a ->poll() implementation uses a waitqueue whose * lifetime is tied to a task rather than to the 'struct file' being polled, * this function must be called before the waitqueue is freed so that * non-blocking polls (e.g. epoll) are notified that the queue is going away. * * The caller must also RCU-delay the freeing of the wait_queue_head, e.g. via * an explicit synchronize_rcu() or call_rcu(), or via SLAB_TYPESAFE_BY_RCU. */ static inline void wake_up_pollfree(struct wait_queue_head *wq_head) { /* * For performance reasons, we don't always take the queue lock here. * Therefore, we might race with someone removing the last entry from * the queue, and proceed while they still hold the queue lock. * However, rcu_read_lock() is required to be held in such cases, so we * can safely proceed with an RCU-delayed free. */ if (waitqueue_active(wq_head)) __wake_up_pollfree(wq_head); } #define ___wait_cond_timeout(condition) \ ({ \ bool __cond = (condition); \ if (__cond && !__ret) \ __ret = 1; \ __cond || !__ret; \ }) #define ___wait_is_interruptible(state) \ (!__builtin_constant_p(state) || \ state == TASK_INTERRUPTIBLE || state == TASK_KILLABLE) \ extern void init_wait_entry(struct wait_queue_entry *wq_entry, int flags); /* * The below macro ___wait_event() has an explicit shadow of the __ret * variable when used from the wait_event_*() macros. * * This is so that both can use the ___wait_cond_timeout() construct * to wrap the condition. * * The type inconsistency of the wait_event_*() __ret variable is also * on purpose; we use long where we can return timeout values and int * otherwise. */ #define ___wait_event(wq_head, condition, state, exclusive, ret, cmd) \ ({ \ __label__ __out; \ struct wait_queue_entry __wq_entry; \ long __ret = ret; /* explicit shadow */ \ \ init_wait_entry(&__wq_entry, exclusive ? WQ_FLAG_EXCLUSIVE : 0); \ for (;;) { \ long __int = prepare_to_wait_event(&wq_head, &__wq_entry, state);\ \ if (condition) \ break; \ \ if (___wait_is_interruptible(state) && __int) { \ __ret = __int; \ goto __out; \ } \ \ cmd; \ } \ finish_wait(&wq_head, &__wq_entry); \ __out: __ret; \ }) #define __wait_event(wq_head, condition) \ (void)___wait_event(wq_head, condition, TASK_UNINTERRUPTIBLE, 0, 0, \ schedule()) /** * wait_event - sleep until a condition gets true * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. */ #define wait_event(wq_head, condition) \ do { \ might_sleep(); \ if (condition) \ break; \ __wait_event(wq_head, condition); \ } while (0) #define __io_wait_event(wq_head, condition) \ (void)___wait_event(wq_head, condition, TASK_UNINTERRUPTIBLE, 0, 0, \ io_schedule()) /* * io_wait_event() -- like wait_event() but with io_schedule() */ #define io_wait_event(wq_head, condition) \ do { \ might_sleep(); \ if (condition) \ break; \ __io_wait_event(wq_head, condition); \ } while (0) #define __wait_event_freezable(wq_head, condition) \ ___wait_event(wq_head, condition, TASK_INTERRUPTIBLE, 0, 0, \ freezable_schedule()) /** * wait_event_freezable - sleep (or freeze) until a condition gets true * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_INTERRUPTIBLE -- so as not to contribute * to system load) until the @condition evaluates to true. The * @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. */ #define wait_event_freezable(wq_head, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_freezable(wq_head, condition); \ __ret; \ }) #define __wait_event_timeout(wq_head, condition, timeout) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ TASK_UNINTERRUPTIBLE, 0, timeout, \ __ret = schedule_timeout(__ret)) /** * wait_event_timeout - sleep until a condition gets true or a timeout elapses * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, in jiffies * * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * Returns: * 0 if the @condition evaluated to %false after the @timeout elapsed, * 1 if the @condition evaluated to %true after the @timeout elapsed, * or the remaining jiffies (at least 1) if the @condition evaluated * to %true before the @timeout elapsed. */ #define wait_event_timeout(wq_head, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_timeout(wq_head, condition, timeout); \ __ret; \ }) #define __wait_event_freezable_timeout(wq_head, condition, timeout) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ TASK_INTERRUPTIBLE, 0, timeout, \ __ret = freezable_schedule_timeout(__ret)) /* * like wait_event_timeout() -- except it uses TASK_INTERRUPTIBLE to avoid * increasing load and is freezable. */ #define wait_event_freezable_timeout(wq_head, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_freezable_timeout(wq_head, condition, timeout); \ __ret; \ }) #define __wait_event_exclusive_cmd(wq_head, condition, cmd1, cmd2) \ (void)___wait_event(wq_head, condition, TASK_UNINTERRUPTIBLE, 1, 0, \ cmd1; schedule(); cmd2) /* * Just like wait_event_cmd(), except it sets exclusive flag */ #define wait_event_exclusive_cmd(wq_head, condition, cmd1, cmd2) \ do { \ if (condition) \ break; \ __wait_event_exclusive_cmd(wq_head, condition, cmd1, cmd2); \ } while (0) #define __wait_event_cmd(wq_head, condition, cmd1, cmd2) \ (void)___wait_event(wq_head, condition, TASK_UNINTERRUPTIBLE, 0, 0, \ cmd1; schedule(); cmd2) /** * wait_event_cmd - sleep until a condition gets true * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @cmd1: the command will be executed before sleep * @cmd2: the command will be executed after sleep * * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. */ #define wait_event_cmd(wq_head, condition, cmd1, cmd2) \ do { \ if (condition) \ break; \ __wait_event_cmd(wq_head, condition, cmd1, cmd2); \ } while (0) #define __wait_event_interruptible(wq_head, condition) \ ___wait_event(wq_head, condition, TASK_INTERRUPTIBLE, 0, 0, \ schedule()) /** * wait_event_interruptible - sleep until a condition gets true * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * The function will return -ERESTARTSYS if it was interrupted by a * signal and 0 if @condition evaluated to true. */ #define wait_event_interruptible(wq_head, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_interruptible(wq_head, condition); \ __ret; \ }) #define __wait_event_interruptible_timeout(wq_head, condition, timeout) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ TASK_INTERRUPTIBLE, 0, timeout, \ __ret = schedule_timeout(__ret)) /** * wait_event_interruptible_timeout - sleep until a condition gets true or a timeout elapses * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, in jiffies * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * Returns: * 0 if the @condition evaluated to %false after the @timeout elapsed, * 1 if the @condition evaluated to %true after the @timeout elapsed, * the remaining jiffies (at least 1) if the @condition evaluated * to %true before the @timeout elapsed, or -%ERESTARTSYS if it was * interrupted by a signal. */ #define wait_event_interruptible_timeout(wq_head, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_interruptible_timeout(wq_head, \ condition, timeout); \ __ret; \ }) #define __wait_event_hrtimeout(wq_head, condition, timeout, state) \ ({ \ int __ret = 0; \ struct hrtimer_sleeper __t; \ \ hrtimer_init_sleeper_on_stack(&__t, CLOCK_MONOTONIC, \ HRTIMER_MODE_REL); \ if ((timeout) != KTIME_MAX) { \ hrtimer_set_expires_range_ns(&__t.timer, timeout, \ current->timer_slack_ns); \ hrtimer_sleeper_start_expires(&__t, HRTIMER_MODE_REL); \ } \ \ __ret = ___wait_event(wq_head, condition, state, 0, 0, \ if (!__t.task) { \ __ret = -ETIME; \ break; \ } \ schedule()); \ \ hrtimer_cancel(&__t.timer); \ destroy_hrtimer_on_stack(&__t.timer); \ __ret; \ }) /** * wait_event_hrtimeout - sleep until a condition gets true or a timeout elapses * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, as a ktime_t * * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * The function returns 0 if @condition became true, or -ETIME if the timeout * elapsed. */ #define wait_event_hrtimeout(wq_head, condition, timeout) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_hrtimeout(wq_head, condition, timeout, \ TASK_UNINTERRUPTIBLE); \ __ret; \ }) /** * wait_event_interruptible_hrtimeout - sleep until a condition gets true or a timeout elapses * @wq: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, as a ktime_t * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * The function returns 0 if @condition became true, -ERESTARTSYS if it was * interrupted by a signal, or -ETIME if the timeout elapsed. */ #define wait_event_interruptible_hrtimeout(wq, condition, timeout) \ ({ \ long __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_hrtimeout(wq, condition, timeout, \ TASK_INTERRUPTIBLE); \ __ret; \ }) #define __wait_event_interruptible_exclusive(wq, condition) \ ___wait_event(wq, condition, TASK_INTERRUPTIBLE, 1, 0, \ schedule()) #define wait_event_interruptible_exclusive(wq, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_interruptible_exclusive(wq, condition); \ __ret; \ }) #define __wait_event_killable_exclusive(wq, condition) \ ___wait_event(wq, condition, TASK_KILLABLE, 1, 0, \ schedule()) #define wait_event_killable_exclusive(wq, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_killable_exclusive(wq, condition); \ __ret; \ }) #define __wait_event_freezable_exclusive(wq, condition) \ ___wait_event(wq, condition, TASK_INTERRUPTIBLE, 1, 0, \ freezable_schedule()) #define wait_event_freezable_exclusive(wq, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_freezable_exclusive(wq, condition); \ __ret; \ }) /** * wait_event_idle - wait for a condition without contributing to system load * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_IDLE) until the * @condition evaluates to true. * The @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * */ #define wait_event_idle(wq_head, condition) \ do { \ might_sleep(); \ if (!(condition)) \ ___wait_event(wq_head, condition, TASK_IDLE, 0, 0, schedule()); \ } while (0) /** * wait_event_idle_exclusive - wait for a condition with contributing to system load * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_IDLE) until the * @condition evaluates to true. * The @condition is checked each time the waitqueue @wq_head is woken up. * * The process is put on the wait queue with an WQ_FLAG_EXCLUSIVE flag * set thus if other processes wait on the same list, when this * process is woken further processes are not considered. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * */ #define wait_event_idle_exclusive(wq_head, condition) \ do { \ might_sleep(); \ if (!(condition)) \ ___wait_event(wq_head, condition, TASK_IDLE, 1, 0, schedule()); \ } while (0) #define __wait_event_idle_timeout(wq_head, condition, timeout) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ TASK_IDLE, 0, timeout, \ __ret = schedule_timeout(__ret)) /** * wait_event_idle_timeout - sleep without load until a condition becomes true or a timeout elapses * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, in jiffies * * The process is put to sleep (TASK_IDLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * Returns: * 0 if the @condition evaluated to %false after the @timeout elapsed, * 1 if the @condition evaluated to %true after the @timeout elapsed, * or the remaining jiffies (at least 1) if the @condition evaluated * to %true before the @timeout elapsed. */ #define wait_event_idle_timeout(wq_head, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_idle_timeout(wq_head, condition, timeout); \ __ret; \ }) #define __wait_event_idle_exclusive_timeout(wq_head, condition, timeout) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ TASK_IDLE, 1, timeout, \ __ret = schedule_timeout(__ret)) /** * wait_event_idle_exclusive_timeout - sleep without load until a condition becomes true or a timeout elapses * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, in jiffies * * The process is put to sleep (TASK_IDLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * The process is put on the wait queue with an WQ_FLAG_EXCLUSIVE flag * set thus if other processes wait on the same list, when this * process is woken further processes are not considered. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * Returns: * 0 if the @condition evaluated to %false after the @timeout elapsed, * 1 if the @condition evaluated to %true after the @timeout elapsed, * or the remaining jiffies (at least 1) if the @condition evaluated * to %true before the @timeout elapsed. */ #define wait_event_idle_exclusive_timeout(wq_head, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_idle_exclusive_timeout(wq_head, condition, timeout);\ __ret; \ }) extern int do_wait_intr(wait_queue_head_t *, wait_queue_entry_t *); extern int do_wait_intr_irq(wait_queue_head_t *, wait_queue_entry_t *); #define __wait_event_interruptible_locked(wq, condition, exclusive, fn) \ ({ \ int __ret; \ DEFINE_WAIT(__wait); \ if (exclusive) \ __wait.flags |= WQ_FLAG_EXCLUSIVE; \ do { \ __ret = fn(&(wq), &__wait); \ if (__ret) \ break; \ } while (!(condition)); \ __remove_wait_queue(&(wq), &__wait); \ __set_current_state(TASK_RUNNING); \ __ret; \ }) /** * wait_event_interruptible_locked - sleep until a condition gets true * @wq: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq is woken up. * * It must be called with wq.lock being held. This spinlock is * unlocked while sleeping but @condition testing is done while lock * is held and when this macro exits the lock is held. * * The lock is locked/unlocked using spin_lock()/spin_unlock() * functions which must match the way they are locked/unlocked outside * of this macro. * * wake_up_locked() has to be called after changing any variable that could * change the result of the wait condition. * * The function will return -ERESTARTSYS if it was interrupted by a * signal and 0 if @condition evaluated to true. */ #define wait_event_interruptible_locked(wq, condition) \ ((condition) \ ? 0 : __wait_event_interruptible_locked(wq, condition, 0, do_wait_intr)) /** * wait_event_interruptible_locked_irq - sleep until a condition gets true * @wq: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq is woken up. * * It must be called with wq.lock being held. This spinlock is * unlocked while sleeping but @condition testing is done while lock * is held and when this macro exits the lock is held. * * The lock is locked/unlocked using spin_lock_irq()/spin_unlock_irq() * functions which must match the way they are locked/unlocked outside * of this macro. * * wake_up_locked() has to be called after changing any variable that could * change the result of the wait condition. * * The function will return -ERESTARTSYS if it was interrupted by a * signal and 0 if @condition evaluated to true. */ #define wait_event_interruptible_locked_irq(wq, condition) \ ((condition) \ ? 0 : __wait_event_interruptible_locked(wq, condition, 0, do_wait_intr_irq)) /** * wait_event_interruptible_exclusive_locked - sleep exclusively until a condition gets true * @wq: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq is woken up. * * It must be called with wq.lock being held. This spinlock is * unlocked while sleeping but @condition testing is done while lock * is held and when this macro exits the lock is held. * * The lock is locked/unlocked using spin_lock()/spin_unlock() * functions which must match the way they are locked/unlocked outside * of this macro. * * The process is put on the wait queue with an WQ_FLAG_EXCLUSIVE flag * set thus when other process waits process on the list if this * process is awaken further processes are not considered. * * wake_up_locked() has to be called after changing any variable that could * change the result of the wait condition. * * The function will return -ERESTARTSYS if it was interrupted by a * signal and 0 if @condition evaluated to true. */ #define wait_event_interruptible_exclusive_locked(wq, condition) \ ((condition) \ ? 0 : __wait_event_interruptible_locked(wq, condition, 1, do_wait_intr)) /** * wait_event_interruptible_exclusive_locked_irq - sleep until a condition gets true * @wq: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq is woken up. * * It must be called with wq.lock being held. This spinlock is * unlocked while sleeping but @condition testing is done while lock * is held and when this macro exits the lock is held. * * The lock is locked/unlocked using spin_lock_irq()/spin_unlock_irq() * functions which must match the way they are locked/unlocked outside * of this macro. * * The process is put on the wait queue with an WQ_FLAG_EXCLUSIVE flag * set thus when other process waits process on the list if this * process is awaken further processes are not considered. * * wake_up_locked() has to be called after changing any variable that could * change the result of the wait condition. * * The function will return -ERESTARTSYS if it was interrupted by a * signal and 0 if @condition evaluated to true. */ #define wait_event_interruptible_exclusive_locked_irq(wq, condition) \ ((condition) \ ? 0 : __wait_event_interruptible_locked(wq, condition, 1, do_wait_intr_irq)) #define __wait_event_killable(wq, condition) \ ___wait_event(wq, condition, TASK_KILLABLE, 0, 0, schedule()) /** * wait_event_killable - sleep until a condition gets true * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * * The process is put to sleep (TASK_KILLABLE) until the * @condition evaluates to true or a signal is received. * The @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * The function will return -ERESTARTSYS if it was interrupted by a * signal and 0 if @condition evaluated to true. */ #define wait_event_killable(wq_head, condition) \ ({ \ int __ret = 0; \ might_sleep(); \ if (!(condition)) \ __ret = __wait_event_killable(wq_head, condition); \ __ret; \ }) #define __wait_event_killable_timeout(wq_head, condition, timeout) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ TASK_KILLABLE, 0, timeout, \ __ret = schedule_timeout(__ret)) /** * wait_event_killable_timeout - sleep until a condition gets true or a timeout elapses * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @timeout: timeout, in jiffies * * The process is put to sleep (TASK_KILLABLE) until the * @condition evaluates to true or a kill signal is received. * The @condition is checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * Returns: * 0 if the @condition evaluated to %false after the @timeout elapsed, * 1 if the @condition evaluated to %true after the @timeout elapsed, * the remaining jiffies (at least 1) if the @condition evaluated * to %true before the @timeout elapsed, or -%ERESTARTSYS if it was * interrupted by a kill signal. * * Only kill signals interrupt this process. */ #define wait_event_killable_timeout(wq_head, condition, timeout) \ ({ \ long __ret = timeout; \ might_sleep(); \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_killable_timeout(wq_head, \ condition, timeout); \ __ret; \ }) #define __wait_event_lock_irq(wq_head, condition, lock, cmd) \ (void)___wait_event(wq_head, condition, TASK_UNINTERRUPTIBLE, 0, 0, \ spin_unlock_irq(&lock); \ cmd; \ schedule(); \ spin_lock_irq(&lock)) /** * wait_event_lock_irq_cmd - sleep until a condition gets true. The * condition is checked under the lock. This * is expected to be called with the lock * taken. * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @lock: a locked spinlock_t, which will be released before cmd * and schedule() and reacquired afterwards. * @cmd: a command which is invoked outside the critical section before * sleep * * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * This is supposed to be called while holding the lock. The lock is * dropped before invoking the cmd and going to sleep and is reacquired * afterwards. */ #define wait_event_lock_irq_cmd(wq_head, condition, lock, cmd) \ do { \ if (condition) \ break; \ __wait_event_lock_irq(wq_head, condition, lock, cmd); \ } while (0) /** * wait_event_lock_irq - sleep until a condition gets true. The * condition is checked under the lock. This * is expected to be called with the lock * taken. * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @lock: a locked spinlock_t, which will be released before schedule() * and reacquired afterwards. * * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the * @condition evaluates to true. The @condition is checked each time * the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * This is supposed to be called while holding the lock. The lock is * dropped before going to sleep and is reacquired afterwards. */ #define wait_event_lock_irq(wq_head, condition, lock) \ do { \ if (condition) \ break; \ __wait_event_lock_irq(wq_head, condition, lock, ); \ } while (0) #define __wait_event_interruptible_lock_irq(wq_head, condition, lock, cmd) \ ___wait_event(wq_head, condition, TASK_INTERRUPTIBLE, 0, 0, \ spin_unlock_irq(&lock); \ cmd; \ schedule(); \ spin_lock_irq(&lock)) /** * wait_event_interruptible_lock_irq_cmd - sleep until a condition gets true. * The condition is checked under the lock. This is expected to * be called with the lock taken. * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @lock: a locked spinlock_t, which will be released before cmd and * schedule() and reacquired afterwards. * @cmd: a command which is invoked outside the critical section before * sleep * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or a signal is received. The @condition is * checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * This is supposed to be called while holding the lock. The lock is * dropped before invoking the cmd and going to sleep and is reacquired * afterwards. * * The macro will return -ERESTARTSYS if it was interrupted by a signal * and 0 if @condition evaluated to true. */ #define wait_event_interruptible_lock_irq_cmd(wq_head, condition, lock, cmd) \ ({ \ int __ret = 0; \ if (!(condition)) \ __ret = __wait_event_interruptible_lock_irq(wq_head, \ condition, lock, cmd); \ __ret; \ }) /** * wait_event_interruptible_lock_irq - sleep until a condition gets true. * The condition is checked under the lock. This is expected * to be called with the lock taken. * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @lock: a locked spinlock_t, which will be released before schedule() * and reacquired afterwards. * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or signal is received. The @condition is * checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * This is supposed to be called while holding the lock. The lock is * dropped before going to sleep and is reacquired afterwards. * * The macro will return -ERESTARTSYS if it was interrupted by a signal * and 0 if @condition evaluated to true. */ #define wait_event_interruptible_lock_irq(wq_head, condition, lock) \ ({ \ int __ret = 0; \ if (!(condition)) \ __ret = __wait_event_interruptible_lock_irq(wq_head, \ condition, lock,); \ __ret; \ }) #define __wait_event_lock_irq_timeout(wq_head, condition, lock, timeout, state) \ ___wait_event(wq_head, ___wait_cond_timeout(condition), \ state, 0, timeout, \ spin_unlock_irq(&lock); \ __ret = schedule_timeout(__ret); \ spin_lock_irq(&lock)); /** * wait_event_interruptible_lock_irq_timeout - sleep until a condition gets * true or a timeout elapses. The condition is checked under * the lock. This is expected to be called with the lock taken. * @wq_head: the waitqueue to wait on * @condition: a C expression for the event to wait for * @lock: a locked spinlock_t, which will be released before schedule() * and reacquired afterwards. * @timeout: timeout, in jiffies * * The process is put to sleep (TASK_INTERRUPTIBLE) until the * @condition evaluates to true or signal is received. The @condition is * checked each time the waitqueue @wq_head is woken up. * * wake_up() has to be called after changing any variable that could * change the result of the wait condition. * * This is supposed to be called while holding the lock. The lock is * dropped before going to sleep and is reacquired afterwards. * * The function returns 0 if the @timeout elapsed, -ERESTARTSYS if it * was interrupted by a signal, and the remaining jiffies otherwise * if the condition evaluated to true before the timeout elapsed. */ #define wait_event_interruptible_lock_irq_timeout(wq_head, condition, lock, \ timeout) \ ({ \ long __ret = timeout; \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_lock_irq_timeout( \ wq_head, condition, lock, timeout, \ TASK_INTERRUPTIBLE); \ __ret; \ }) #define wait_event_lock_irq_timeout(wq_head, condition, lock, timeout) \ ({ \ long __ret = timeout; \ if (!___wait_cond_timeout(condition)) \ __ret = __wait_event_lock_irq_timeout( \ wq_head, condition, lock, timeout, \ TASK_UNINTERRUPTIBLE); \ __ret; \ }) /* * Waitqueues which are removed from the waitqueue_head at wakeup time */ void prepare_to_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); bool prepare_to_wait_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); long prepare_to_wait_event(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state); void finish_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry); long wait_woken(struct wait_queue_entry *wq_entry, unsigned mode, long timeout); int woken_wake_function(struct wait_queue_entry *wq_entry, unsigned mode, int sync, void *key); int autoremove_wake_function(struct wait_queue_entry *wq_entry, unsigned mode, int sync, void *key); #define DEFINE_WAIT_FUNC(name, function) \ struct wait_queue_entry name = { \ .private = current, \ .func = function, \ .entry = LIST_HEAD_INIT((name).entry), \ } #define DEFINE_WAIT(name) DEFINE_WAIT_FUNC(name, autoremove_wake_function) #define init_wait(wait) \ do { \ (wait)->private = current; \ (wait)->func = autoremove_wake_function; \ INIT_LIST_HEAD(&(wait)->entry); \ (wait)->flags = 0; \ } while (0) typedef int (*task_call_f)(struct task_struct *p, void *arg); extern int task_call_func(struct task_struct *p, task_call_f func, void *arg); #endif /* _LINUX_WAIT_H */ PK ! d� netfilter_ipv6/ip6_tables.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * 25-Jul-1998 Major changes to allow for ip chain table * * 3-Jan-2000 Named tables to allow packet selection for different uses. */ /* * Format of an IP6 firewall descriptor * * src, dst, src_mask, dst_mask are always stored in network byte order. * flags are stored in host byte order (of course). * Port numbers are stored in HOST byte order. */ #ifndef _IP6_TABLES_H #define _IP6_TABLES_H #include <linux/if.h> #include <linux/in6.h> #include <linux/init.h> #include <linux/ipv6.h> #include <linux/skbuff.h> #include <uapi/linux/netfilter_ipv6/ip6_tables.h> extern void *ip6t_alloc_initial_table(const struct xt_table *); int ip6t_register_table(struct net *net, const struct xt_table *table, const struct ip6t_replace *repl, const struct nf_hook_ops *ops); void ip6t_unregister_table_pre_exit(struct net *net, const char *name); void ip6t_unregister_table_exit(struct net *net, const char *name); extern unsigned int ip6t_do_table(struct sk_buff *skb, const struct nf_hook_state *state, struct xt_table *table); #ifdef CONFIG_NETFILTER_XTABLES_COMPAT #include <net/compat.h> struct compat_ip6t_entry { struct ip6t_ip6 ipv6; compat_uint_t nfcache; __u16 target_offset; __u16 next_offset; compat_uint_t comefrom; struct compat_xt_counters counters; unsigned char elems[]; }; static inline struct xt_entry_target * compat_ip6t_get_target(struct compat_ip6t_entry *e) { return (void *)e + e->target_offset; } #endif /* CONFIG_COMPAT */ #endif /* _IP6_TABLES_H */ PK ! A�&O O extcon-provider.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * External Connector (extcon) framework * - linux/include/linux/extcon-provider.h for extcon provider device driver. * * Copyright (C) 2017 Samsung Electronics * Author: Chanwoo Choi <cw00.choi@samsung.com> */ #ifndef __LINUX_EXTCON_PROVIDER_H__ #define __LINUX_EXTCON_PROVIDER_H__ #include <linux/extcon.h> struct extcon_dev; #if IS_ENABLED(CONFIG_EXTCON) /* Following APIs register/unregister the extcon device. */ int extcon_dev_register(struct extcon_dev *edev); void extcon_dev_unregister(struct extcon_dev *edev); int devm_extcon_dev_register(struct device *dev, struct extcon_dev *edev); void devm_extcon_dev_unregister(struct device *dev, struct extcon_dev *edev); /* Following APIs allocate/free the memory of the extcon device. */ struct extcon_dev *extcon_dev_allocate(const unsigned int *cable); void extcon_dev_free(struct extcon_dev *edev); struct extcon_dev *devm_extcon_dev_allocate(struct device *dev, const unsigned int *cable); void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev); /* Synchronize the state and property value for each external connector. */ int extcon_sync(struct extcon_dev *edev, unsigned int id); /* * Following APIs set the connected state of each external connector. * The 'id' argument indicates the defined external connector. */ int extcon_set_state(struct extcon_dev *edev, unsigned int id, bool state); int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id, bool state); /* * Following APIs set the property of each external connector. * The 'id' argument indicates the defined external connector * and the 'prop' indicates the extcon property. * * And extcon_set_property_capability() set the capability of the property * for each external connector. They are used to set the capability of the * property of each external connector based on the id and property. */ int extcon_set_property(struct extcon_dev *edev, unsigned int id, unsigned int prop, union extcon_property_value prop_val); int extcon_set_property_sync(struct extcon_dev *edev, unsigned int id, unsigned int prop, union extcon_property_value prop_val); int extcon_set_property_capability(struct extcon_dev *edev, unsigned int id, unsigned int prop); #else /* CONFIG_EXTCON */ static inline int extcon_dev_register(struct extcon_dev *edev) { return 0; } static inline void extcon_dev_unregister(struct extcon_dev *edev) { } static inline int devm_extcon_dev_register(struct device *dev, struct extcon_dev *edev) { return -EINVAL; } static inline void devm_extcon_dev_unregister(struct device *dev, struct extcon_dev *edev) { } static inline struct extcon_dev *extcon_dev_allocate(const unsigned int *cable) { return ERR_PTR(-ENOSYS); } static inline void extcon_dev_free(struct extcon_dev *edev) { } static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev, const unsigned int *cable) { return ERR_PTR(-ENOSYS); } static inline void devm_extcon_dev_free(struct extcon_dev *edev) { } static inline int extcon_set_state(struct extcon_dev *edev, unsigned int id, bool state) { return 0; } static inline int extcon_set_state_sync(struct extcon_dev *edev, unsigned int id, bool state) { return 0; } static inline int extcon_sync(struct extcon_dev *edev, unsigned int id) { return 0; } static inline int extcon_set_property(struct extcon_dev *edev, unsigned int id, unsigned int prop, union extcon_property_value prop_val) { return 0; } static inline int extcon_set_property_sync(struct extcon_dev *edev, unsigned int id, unsigned int prop, union extcon_property_value prop_val) { return 0; } static inline int extcon_set_property_capability(struct extcon_dev *edev, unsigned int id, unsigned int prop) { return 0; } #endif /* CONFIG_EXTCON */ #endif /* __LINUX_EXTCON_PROVIDER_H__ */ PK ! lC,7 7 ptdump.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PTDUMP_H #define _LINUX_PTDUMP_H #include <linux/mm_types.h> struct ptdump_range { unsigned long start; unsigned long end; }; struct ptdump_state { /* level is 0:PGD to 4:PTE, or -1 if unknown */ void (*note_page)(struct ptdump_state *st, unsigned long addr, int level, u64 val); void (*effective_prot)(struct ptdump_state *st, int level, u64 val); const struct ptdump_range *range; }; void ptdump_walk_pgd(struct ptdump_state *st, struct mm_struct *mm, pgd_t *pgd); #endif /* _LINUX_PTDUMP_H */ PK ! {0�� � netfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Network filesystem support services. * * Copyright (C) 2021 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) * * See: * * Documentation/filesystems/netfs_library.rst * * for a description of the network filesystem interface declared here. */ #ifndef _LINUX_NETFS_H #define _LINUX_NETFS_H #include <linux/workqueue.h> #include <linux/fs.h> #include <linux/pagemap.h> /* * Overload PG_private_2 to give us PG_fscache - this is used to indicate that * a page is currently backed by a local disk cache */ #define PageFsCache(page) PagePrivate2((page)) #define SetPageFsCache(page) SetPagePrivate2((page)) #define ClearPageFsCache(page) ClearPagePrivate2((page)) #define TestSetPageFsCache(page) TestSetPagePrivate2((page)) #define TestClearPageFsCache(page) TestClearPagePrivate2((page)) /** * set_page_fscache - Set PG_fscache on a page and take a ref * @page: The page. * * Set the PG_fscache (PG_private_2) flag on a page and take the reference * needed for the VM to handle its lifetime correctly. This sets the flag and * takes the reference unconditionally, so care must be taken not to set the * flag again if it's already set. */ static inline void set_page_fscache(struct page *page) { set_page_private_2(page); } /** * end_page_fscache - Clear PG_fscache and release any waiters * @page: The page * * Clear the PG_fscache (PG_private_2) bit on a page and wake up any sleepers * waiting for this. The page ref held for PG_private_2 being set is released. * * This is, for example, used when a netfs page is being written to a local * disk cache, thereby allowing writes to the cache for the same page to be * serialised. */ static inline void end_page_fscache(struct page *page) { end_page_private_2(page); } /** * wait_on_page_fscache - Wait for PG_fscache to be cleared on a page * @page: The page to wait on * * Wait for PG_fscache (aka PG_private_2) to be cleared on a page. */ static inline void wait_on_page_fscache(struct page *page) { wait_on_page_private_2(page); } /** * wait_on_page_fscache_killable - Wait for PG_fscache to be cleared on a page * @page: The page to wait on * * Wait for PG_fscache (aka PG_private_2) to be cleared on a page or until a * fatal signal is received by the calling task. * * Return: * - 0 if successful. * - -EINTR if a fatal signal was encountered. */ static inline int wait_on_page_fscache_killable(struct page *page) { return wait_on_page_private_2_killable(page); } enum netfs_read_source { NETFS_FILL_WITH_ZEROES, NETFS_DOWNLOAD_FROM_SERVER, NETFS_READ_FROM_CACHE, NETFS_INVALID_READ, } __mode(byte); typedef void (*netfs_io_terminated_t)(void *priv, ssize_t transferred_or_error, bool was_async); /* * Resources required to do operations on a cache. */ struct netfs_cache_resources { const struct netfs_cache_ops *ops; void *cache_priv; void *cache_priv2; unsigned int debug_id; /* Cookie debug ID */ }; /* * Descriptor for a single component subrequest. */ struct netfs_read_subrequest { struct netfs_read_request *rreq; /* Supervising read request */ struct list_head rreq_link; /* Link in rreq->subrequests */ loff_t start; /* Where to start the I/O */ size_t len; /* Size of the I/O */ size_t transferred; /* Amount of data transferred */ refcount_t usage; short error; /* 0 or error that occurred */ unsigned short debug_index; /* Index in list (for debugging output) */ enum netfs_read_source source; /* Where to read from */ unsigned long flags; #define NETFS_SREQ_WRITE_TO_CACHE 0 /* Set if should write to cache */ #define NETFS_SREQ_CLEAR_TAIL 1 /* Set if the rest of the read should be cleared */ #define NETFS_SREQ_SHORT_READ 2 /* Set if there was a short read from the cache */ #define NETFS_SREQ_SEEK_DATA_READ 3 /* Set if ->read() should SEEK_DATA first */ #define NETFS_SREQ_NO_PROGRESS 4 /* Set if we didn't manage to read any data */ }; /* * Descriptor for a read helper request. This is used to make multiple I/O * requests on a variety of sources and then stitch the result together. */ struct netfs_read_request { struct work_struct work; struct inode *inode; /* The file being accessed */ struct address_space *mapping; /* The mapping being accessed */ struct netfs_cache_resources cache_resources; struct list_head subrequests; /* Requests to fetch I/O from disk or net */ void *netfs_priv; /* Private data for the netfs */ unsigned int debug_id; atomic_t nr_rd_ops; /* Number of read ops in progress */ atomic_t nr_wr_ops; /* Number of write ops in progress */ size_t submitted; /* Amount submitted for I/O so far */ size_t len; /* Length of the request */ short error; /* 0 or error that occurred */ loff_t i_size; /* Size of the file */ loff_t start; /* Start position */ pgoff_t no_unlock_page; /* Don't unlock this page after read */ refcount_t usage; unsigned long flags; #define NETFS_RREQ_INCOMPLETE_IO 0 /* Some ioreqs terminated short or with error */ #define NETFS_RREQ_WRITE_TO_CACHE 1 /* Need to write to the cache */ #define NETFS_RREQ_NO_UNLOCK_PAGE 2 /* Don't unlock no_unlock_page on completion */ #define NETFS_RREQ_DONT_UNLOCK_PAGES 3 /* Don't unlock the pages on completion */ #define NETFS_RREQ_FAILED 4 /* The request failed */ #define NETFS_RREQ_IN_PROGRESS 5 /* Unlocked when the request completes */ const struct netfs_read_request_ops *netfs_ops; }; /* * Operations the network filesystem can/must provide to the helpers. */ struct netfs_read_request_ops { bool (*is_cache_enabled)(struct inode *inode); void (*init_rreq)(struct netfs_read_request *rreq, struct file *file); int (*begin_cache_operation)(struct netfs_read_request *rreq); void (*expand_readahead)(struct netfs_read_request *rreq); bool (*clamp_length)(struct netfs_read_subrequest *subreq); void (*issue_op)(struct netfs_read_subrequest *subreq); bool (*is_still_valid)(struct netfs_read_request *rreq); int (*check_write_begin)(struct file *file, loff_t pos, unsigned len, struct page *page, void **_fsdata); void (*done)(struct netfs_read_request *rreq); void (*cleanup)(struct address_space *mapping, void *netfs_priv); }; /* * Table of operations for access to a cache. This is obtained by * rreq->ops->begin_cache_operation(). */ struct netfs_cache_ops { /* End an operation */ void (*end_operation)(struct netfs_cache_resources *cres); /* Read data from the cache */ int (*read)(struct netfs_cache_resources *cres, loff_t start_pos, struct iov_iter *iter, bool seek_data, netfs_io_terminated_t term_func, void *term_func_priv); /* Write data to the cache */ int (*write)(struct netfs_cache_resources *cres, loff_t start_pos, struct iov_iter *iter, netfs_io_terminated_t term_func, void *term_func_priv); /* Expand readahead request */ void (*expand_readahead)(struct netfs_cache_resources *cres, loff_t *_start, size_t *_len, loff_t i_size); /* Prepare a read operation, shortening it to a cached/uncached * boundary as appropriate. */ enum netfs_read_source (*prepare_read)(struct netfs_read_subrequest *subreq, loff_t i_size); /* Prepare a write operation, working out what part of the write we can * actually do. */ int (*prepare_write)(struct netfs_cache_resources *cres, loff_t *_start, size_t *_len, loff_t i_size); }; struct readahead_control; extern void netfs_readahead(struct readahead_control *, const struct netfs_read_request_ops *, void *); extern int netfs_readpage(struct file *, struct page *, const struct netfs_read_request_ops *, void *); extern int netfs_write_begin(struct file *, struct address_space *, loff_t, unsigned int, unsigned int, struct page **, void **, const struct netfs_read_request_ops *, void *); extern void netfs_subreq_terminated(struct netfs_read_subrequest *, ssize_t, bool); extern void netfs_stats_show(struct seq_file *); #endif /* _LINUX_NETFS_H */ PK ! �p;� � kvm_irqfd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * * irqfd: Allows an fd to be used to inject an interrupt to the guest * Credit goes to Avi Kivity for the original idea. */ #ifndef __LINUX_KVM_IRQFD_H #define __LINUX_KVM_IRQFD_H #include <linux/kvm_host.h> #include <linux/poll.h> /* * Resampling irqfds are a special variety of irqfds used to emulate * level triggered interrupts. The interrupt is asserted on eventfd * trigger. On acknowledgment through the irq ack notifier, the * interrupt is de-asserted and userspace is notified through the * resamplefd. All resamplers on the same gsi are de-asserted * together, so we don't need to track the state of each individual * user. We can also therefore share the same irq source ID. */ struct kvm_kernel_irqfd_resampler { struct kvm *kvm; /* * List of resampling struct _irqfd objects sharing this gsi. * RCU list modified under kvm->irqfds.resampler_lock */ struct list_head list; struct kvm_irq_ack_notifier notifier; /* * Entry in list of kvm->irqfd.resampler_list. Use for sharing * resamplers among irqfds on the same gsi. * Accessed and modified under kvm->irqfds.resampler_lock */ struct list_head link; }; struct kvm_kernel_irqfd { /* Used for MSI fast-path */ struct kvm *kvm; wait_queue_entry_t wait; /* Update side is protected by irqfds.lock */ struct kvm_kernel_irq_routing_entry irq_entry; seqcount_spinlock_t irq_entry_sc; /* Used for level IRQ fast-path */ int gsi; struct work_struct inject; /* The resampler used by this irqfd (resampler-only) */ struct kvm_kernel_irqfd_resampler *resampler; /* Eventfd notified on resample (resampler-only) */ struct eventfd_ctx *resamplefd; /* Entry in list of irqfds for a resampler (resampler-only) */ struct list_head resampler_link; /* Used for setup/shutdown */ struct eventfd_ctx *eventfd; struct list_head list; poll_table pt; struct work_struct shutdown; struct irq_bypass_consumer consumer; struct irq_bypass_producer *producer; }; #endif /* __LINUX_KVM_IRQFD_H */ PK ! B�d� i i gfp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_GFP_H #define __LINUX_GFP_H #include <linux/mmdebug.h> #include <linux/mmzone.h> #include <linux/stddef.h> #include <linux/linkage.h> #include <linux/topology.h> /* The typedef is in types.h but we want the documentation here */ #if 0 /** * typedef gfp_t - Memory allocation flags. * * GFP flags are commonly used throughout Linux to indicate how memory * should be allocated. The GFP acronym stands for get_free_pages(), * the underlying memory allocation function. Not every GFP flag is * supported by every function which may allocate memory. Most users * will want to use a plain ``GFP_KERNEL``. */ typedef unsigned int __bitwise gfp_t; #endif struct vm_area_struct; /* * In case of changes, please don't forget to update * include/trace/events/mmflags.h and tools/perf/builtin-kmem.c */ /* Plain integer GFP bitmasks. Do not use this directly. */ #define ___GFP_DMA 0x01u #define ___GFP_HIGHMEM 0x02u #define ___GFP_DMA32 0x04u #define ___GFP_MOVABLE 0x08u #define ___GFP_RECLAIMABLE 0x10u #define ___GFP_HIGH 0x20u #define ___GFP_IO 0x40u #define ___GFP_FS 0x80u #define ___GFP_ZERO 0x100u #define ___GFP_ATOMIC 0x200u #define ___GFP_DIRECT_RECLAIM 0x400u #define ___GFP_KSWAPD_RECLAIM 0x800u #define ___GFP_WRITE 0x1000u #define ___GFP_NOWARN 0x2000u #define ___GFP_RETRY_MAYFAIL 0x4000u #define ___GFP_NOFAIL 0x8000u #define ___GFP_NORETRY 0x10000u #define ___GFP_MEMALLOC 0x20000u #define ___GFP_COMP 0x40000u #define ___GFP_NOMEMALLOC 0x80000u #define ___GFP_HARDWALL 0x100000u #define ___GFP_THISNODE 0x200000u #define ___GFP_ACCOUNT 0x400000u #define ___GFP_ZEROTAGS 0x800000u #define ___GFP_SKIP_KASAN_POISON 0x1000000u #ifdef CONFIG_LOCKDEP #define ___GFP_NOLOCKDEP 0x2000000u #else #define ___GFP_NOLOCKDEP 0 #endif /* If the above are modified, __GFP_BITS_SHIFT may need updating */ /* * Physical address zone modifiers (see linux/mmzone.h - low four bits) * * Do not put any conditional on these. If necessary modify the definitions * without the underscores and use them consistently. The definitions here may * be used in bit comparisons. */ #define __GFP_DMA ((__force gfp_t)___GFP_DMA) #define __GFP_HIGHMEM ((__force gfp_t)___GFP_HIGHMEM) #define __GFP_DMA32 ((__force gfp_t)___GFP_DMA32) #define __GFP_MOVABLE ((__force gfp_t)___GFP_MOVABLE) /* ZONE_MOVABLE allowed */ #define GFP_ZONEMASK (__GFP_DMA|__GFP_HIGHMEM|__GFP_DMA32|__GFP_MOVABLE) /** * DOC: Page mobility and placement hints * * Page mobility and placement hints * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * These flags provide hints about how mobile the page is. Pages with similar * mobility are placed within the same pageblocks to minimise problems due * to external fragmentation. * * %__GFP_MOVABLE (also a zone modifier) indicates that the page can be * moved by page migration during memory compaction or can be reclaimed. * * %__GFP_RECLAIMABLE is used for slab allocations that specify * SLAB_RECLAIM_ACCOUNT and whose pages can be freed via shrinkers. * * %__GFP_WRITE indicates the caller intends to dirty the page. Where possible, * these pages will be spread between local zones to avoid all the dirty * pages being in one zone (fair zone allocation policy). * * %__GFP_HARDWALL enforces the cpuset memory allocation policy. * * %__GFP_THISNODE forces the allocation to be satisfied from the requested * node with no fallbacks or placement policy enforcements. * * %__GFP_ACCOUNT causes the allocation to be accounted to kmemcg. */ #define __GFP_RECLAIMABLE ((__force gfp_t)___GFP_RECLAIMABLE) #define __GFP_WRITE ((__force gfp_t)___GFP_WRITE) #define __GFP_HARDWALL ((__force gfp_t)___GFP_HARDWALL) #define __GFP_THISNODE ((__force gfp_t)___GFP_THISNODE) #define __GFP_ACCOUNT ((__force gfp_t)___GFP_ACCOUNT) /** * DOC: Watermark modifiers * * Watermark modifiers -- controls access to emergency reserves * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * %__GFP_HIGH indicates that the caller is high-priority and that granting * the request is necessary before the system can make forward progress. * For example, creating an IO context to clean pages. * * %__GFP_ATOMIC indicates that the caller cannot reclaim or sleep and is * high priority. Users are typically interrupt handlers. This may be * used in conjunction with %__GFP_HIGH * * %__GFP_MEMALLOC allows access to all memory. This should only be used when * the caller guarantees the allocation will allow more memory to be freed * very shortly e.g. process exiting or swapping. Users either should * be the MM or co-ordinating closely with the VM (e.g. swap over NFS). * Users of this flag have to be extremely careful to not deplete the reserve * completely and implement a throttling mechanism which controls the * consumption of the reserve based on the amount of freed memory. * Usage of a pre-allocated pool (e.g. mempool) should be always considered * before using this flag. * * %__GFP_NOMEMALLOC is used to explicitly forbid access to emergency reserves. * This takes precedence over the %__GFP_MEMALLOC flag if both are set. */ #define __GFP_ATOMIC ((__force gfp_t)___GFP_ATOMIC) #define __GFP_HIGH ((__force gfp_t)___GFP_HIGH) #define __GFP_MEMALLOC ((__force gfp_t)___GFP_MEMALLOC) #define __GFP_NOMEMALLOC ((__force gfp_t)___GFP_NOMEMALLOC) /** * DOC: Reclaim modifiers * * Reclaim modifiers * ~~~~~~~~~~~~~~~~~ * Please note that all the following flags are only applicable to sleepable * allocations (e.g. %GFP_NOWAIT and %GFP_ATOMIC will ignore them). * * %__GFP_IO can start physical IO. * * %__GFP_FS can call down to the low-level FS. Clearing the flag avoids the * allocator recursing into the filesystem which might already be holding * locks. * * %__GFP_DIRECT_RECLAIM indicates that the caller may enter direct reclaim. * This flag can be cleared to avoid unnecessary delays when a fallback * option is available. * * %__GFP_KSWAPD_RECLAIM indicates that the caller wants to wake kswapd when * the low watermark is reached and have it reclaim pages until the high * watermark is reached. A caller may wish to clear this flag when fallback * options are available and the reclaim is likely to disrupt the system. The * canonical example is THP allocation where a fallback is cheap but * reclaim/compaction may cause indirect stalls. * * %__GFP_RECLAIM is shorthand to allow/forbid both direct and kswapd reclaim. * * The default allocator behavior depends on the request size. We have a concept * of so called costly allocations (with order > %PAGE_ALLOC_COSTLY_ORDER). * !costly allocations are too essential to fail so they are implicitly * non-failing by default (with some exceptions like OOM victims might fail so * the caller still has to check for failures) while costly requests try to be * not disruptive and back off even without invoking the OOM killer. * The following three modifiers might be used to override some of these * implicit rules * * %__GFP_NORETRY: The VM implementation will try only very lightweight * memory direct reclaim to get some memory under memory pressure (thus * it can sleep). It will avoid disruptive actions like OOM killer. The * caller must handle the failure which is quite likely to happen under * heavy memory pressure. The flag is suitable when failure can easily be * handled at small cost, such as reduced throughput * * %__GFP_RETRY_MAYFAIL: The VM implementation will retry memory reclaim * procedures that have previously failed if there is some indication * that progress has been made else where. It can wait for other * tasks to attempt high level approaches to freeing memory such as * compaction (which removes fragmentation) and page-out. * There is still a definite limit to the number of retries, but it is * a larger limit than with %__GFP_NORETRY. * Allocations with this flag may fail, but only when there is * genuinely little unused memory. While these allocations do not * directly trigger the OOM killer, their failure indicates that * the system is likely to need to use the OOM killer soon. The * caller must handle failure, but can reasonably do so by failing * a higher-level request, or completing it only in a much less * efficient manner. * If the allocation does fail, and the caller is in a position to * free some non-essential memory, doing so could benefit the system * as a whole. * * %__GFP_NOFAIL: The VM implementation _must_ retry infinitely: the caller * cannot handle allocation failures. The allocation could block * indefinitely but will never return with failure. Testing for * failure is pointless. * New users should be evaluated carefully (and the flag should be * used only when there is no reasonable failure policy) but it is * definitely preferable to use the flag rather than opencode endless * loop around allocator. * Using this flag for costly allocations is _highly_ discouraged. */ #define __GFP_IO ((__force gfp_t)___GFP_IO) #define __GFP_FS ((__force gfp_t)___GFP_FS) #define __GFP_DIRECT_RECLAIM ((__force gfp_t)___GFP_DIRECT_RECLAIM) /* Caller can reclaim */ #define __GFP_KSWAPD_RECLAIM ((__force gfp_t)___GFP_KSWAPD_RECLAIM) /* kswapd can wake */ #define __GFP_RECLAIM ((__force gfp_t)(___GFP_DIRECT_RECLAIM|___GFP_KSWAPD_RECLAIM)) #define __GFP_RETRY_MAYFAIL ((__force gfp_t)___GFP_RETRY_MAYFAIL) #define __GFP_NOFAIL ((__force gfp_t)___GFP_NOFAIL) #define __GFP_NORETRY ((__force gfp_t)___GFP_NORETRY) /** * DOC: Action modifiers * * Action modifiers * ~~~~~~~~~~~~~~~~ * * %__GFP_NOWARN suppresses allocation failure reports. * * %__GFP_COMP address compound page metadata. * * %__GFP_ZERO returns a zeroed page on success. * * %__GFP_ZEROTAGS returns a page with zeroed memory tags on success, if * __GFP_ZERO is set. * * %__GFP_SKIP_KASAN_POISON returns a page which does not need to be poisoned * on deallocation. Typically used for userspace pages. Currently only has an * effect in HW tags mode. */ #define __GFP_NOWARN ((__force gfp_t)___GFP_NOWARN) #define __GFP_COMP ((__force gfp_t)___GFP_COMP) #define __GFP_ZERO ((__force gfp_t)___GFP_ZERO) #define __GFP_ZEROTAGS ((__force gfp_t)___GFP_ZEROTAGS) #define __GFP_SKIP_KASAN_POISON ((__force gfp_t)___GFP_SKIP_KASAN_POISON) /* Disable lockdep for GFP context tracking */ #define __GFP_NOLOCKDEP ((__force gfp_t)___GFP_NOLOCKDEP) /* Room for N __GFP_FOO bits */ #define __GFP_BITS_SHIFT (25 + IS_ENABLED(CONFIG_LOCKDEP)) #define __GFP_BITS_MASK ((__force gfp_t)((1 << __GFP_BITS_SHIFT) - 1)) /** * DOC: Useful GFP flag combinations * * Useful GFP flag combinations * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * Useful GFP flag combinations that are commonly used. It is recommended * that subsystems start with one of these combinations and then set/clear * %__GFP_FOO flags as necessary. * * %GFP_ATOMIC users can not sleep and need the allocation to succeed. A lower * watermark is applied to allow access to "atomic reserves". * The current implementation doesn't support NMI and few other strict * non-preemptive contexts (e.g. raw_spin_lock). The same applies to %GFP_NOWAIT. * * %GFP_KERNEL is typical for kernel-internal allocations. The caller requires * %ZONE_NORMAL or a lower zone for direct access but can direct reclaim. * * %GFP_KERNEL_ACCOUNT is the same as GFP_KERNEL, except the allocation is * accounted to kmemcg. * * %GFP_NOWAIT is for kernel allocations that should not stall for direct * reclaim, start physical IO or use any filesystem callback. * * %GFP_NOIO will use direct reclaim to discard clean pages or slab pages * that do not require the starting of any physical IO. * Please try to avoid using this flag directly and instead use * memalloc_noio_{save,restore} to mark the whole scope which cannot * perform any IO with a short explanation why. All allocation requests * will inherit GFP_NOIO implicitly. * * %GFP_NOFS will use direct reclaim but will not use any filesystem interfaces. * Please try to avoid using this flag directly and instead use * memalloc_nofs_{save,restore} to mark the whole scope which cannot/shouldn't * recurse into the FS layer with a short explanation why. All allocation * requests will inherit GFP_NOFS implicitly. * * %GFP_USER is for userspace allocations that also need to be directly * accessibly by the kernel or hardware. It is typically used by hardware * for buffers that are mapped to userspace (e.g. graphics) that hardware * still must DMA to. cpuset limits are enforced for these allocations. * * %GFP_DMA exists for historical reasons and should be avoided where possible. * The flags indicates that the caller requires that the lowest zone be * used (%ZONE_DMA or 16M on x86-64). Ideally, this would be removed but * it would require careful auditing as some users really require it and * others use the flag to avoid lowmem reserves in %ZONE_DMA and treat the * lowest zone as a type of emergency reserve. * * %GFP_DMA32 is similar to %GFP_DMA except that the caller requires a 32-bit * address. * * %GFP_HIGHUSER is for userspace allocations that may be mapped to userspace, * do not need to be directly accessible by the kernel but that cannot * move once in use. An example may be a hardware allocation that maps * data directly into userspace but has no addressing limitations. * * %GFP_HIGHUSER_MOVABLE is for userspace allocations that the kernel does not * need direct access to but can use kmap() when access is required. They * are expected to be movable via page reclaim or page migration. Typically, * pages on the LRU would also be allocated with %GFP_HIGHUSER_MOVABLE. * * %GFP_TRANSHUGE and %GFP_TRANSHUGE_LIGHT are used for THP allocations. They * are compound allocations that will generally fail quickly if memory is not * available and will not wake kswapd/kcompactd on failure. The _LIGHT * version does not attempt reclaim/compaction at all and is by default used * in page fault path, while the non-light is used by khugepaged. */ #define GFP_ATOMIC (__GFP_HIGH|__GFP_ATOMIC|__GFP_KSWAPD_RECLAIM) #define GFP_KERNEL (__GFP_RECLAIM | __GFP_IO | __GFP_FS) #define GFP_KERNEL_ACCOUNT (GFP_KERNEL | __GFP_ACCOUNT) #define GFP_NOWAIT (__GFP_KSWAPD_RECLAIM) #define GFP_NOIO (__GFP_RECLAIM) #define GFP_NOFS (__GFP_RECLAIM | __GFP_IO) #define GFP_USER (__GFP_RECLAIM | __GFP_IO | __GFP_FS | __GFP_HARDWALL) #define GFP_DMA __GFP_DMA #define GFP_DMA32 __GFP_DMA32 #define GFP_HIGHUSER (GFP_USER | __GFP_HIGHMEM) #define GFP_HIGHUSER_MOVABLE (GFP_HIGHUSER | __GFP_MOVABLE | \ __GFP_SKIP_KASAN_POISON) #define GFP_TRANSHUGE_LIGHT ((GFP_HIGHUSER_MOVABLE | __GFP_COMP | \ __GFP_NOMEMALLOC | __GFP_NOWARN) & ~__GFP_RECLAIM) #define GFP_TRANSHUGE (GFP_TRANSHUGE_LIGHT | __GFP_DIRECT_RECLAIM) /* Convert GFP flags to their corresponding migrate type */ #define GFP_MOVABLE_MASK (__GFP_RECLAIMABLE|__GFP_MOVABLE) #define GFP_MOVABLE_SHIFT 3 static inline int gfp_migratetype(const gfp_t gfp_flags) { VM_WARN_ON((gfp_flags & GFP_MOVABLE_MASK) == GFP_MOVABLE_MASK); BUILD_BUG_ON((1UL << GFP_MOVABLE_SHIFT) != ___GFP_MOVABLE); BUILD_BUG_ON((___GFP_MOVABLE >> GFP_MOVABLE_SHIFT) != MIGRATE_MOVABLE); if (unlikely(page_group_by_mobility_disabled)) return MIGRATE_UNMOVABLE; /* Group based on mobility */ return (gfp_flags & GFP_MOVABLE_MASK) >> GFP_MOVABLE_SHIFT; } #undef GFP_MOVABLE_MASK #undef GFP_MOVABLE_SHIFT static inline bool gfpflags_allow_blocking(const gfp_t gfp_flags) { return !!(gfp_flags & __GFP_DIRECT_RECLAIM); } /** * gfpflags_normal_context - is gfp_flags a normal sleepable context? * @gfp_flags: gfp_flags to test * * Test whether @gfp_flags indicates that the allocation is from the * %current context and allowed to sleep. * * An allocation being allowed to block doesn't mean it owns the %current * context. When direct reclaim path tries to allocate memory, the * allocation context is nested inside whatever %current was doing at the * time of the original allocation. The nested allocation may be allowed * to block but modifying anything %current owns can corrupt the outer * context's expectations. * * %true result from this function indicates that the allocation context * can sleep and use anything that's associated with %current. */ static inline bool gfpflags_normal_context(const gfp_t gfp_flags) { return (gfp_flags & (__GFP_DIRECT_RECLAIM | __GFP_MEMALLOC)) == __GFP_DIRECT_RECLAIM; } #ifdef CONFIG_HIGHMEM #define OPT_ZONE_HIGHMEM ZONE_HIGHMEM #else #define OPT_ZONE_HIGHMEM ZONE_NORMAL #endif #ifdef CONFIG_ZONE_DMA #define OPT_ZONE_DMA ZONE_DMA #else #define OPT_ZONE_DMA ZONE_NORMAL #endif #ifdef CONFIG_ZONE_DMA32 #define OPT_ZONE_DMA32 ZONE_DMA32 #else #define OPT_ZONE_DMA32 ZONE_NORMAL #endif /* * GFP_ZONE_TABLE is a word size bitstring that is used for looking up the * zone to use given the lowest 4 bits of gfp_t. Entries are GFP_ZONES_SHIFT * bits long and there are 16 of them to cover all possible combinations of * __GFP_DMA, __GFP_DMA32, __GFP_MOVABLE and __GFP_HIGHMEM. * * The zone fallback order is MOVABLE=>HIGHMEM=>NORMAL=>DMA32=>DMA. * But GFP_MOVABLE is not only a zone specifier but also an allocation * policy. Therefore __GFP_MOVABLE plus another zone selector is valid. * Only 1 bit of the lowest 3 bits (DMA,DMA32,HIGHMEM) can be set to "1". * * bit result * ================= * 0x0 => NORMAL * 0x1 => DMA or NORMAL * 0x2 => HIGHMEM or NORMAL * 0x3 => BAD (DMA+HIGHMEM) * 0x4 => DMA32 or NORMAL * 0x5 => BAD (DMA+DMA32) * 0x6 => BAD (HIGHMEM+DMA32) * 0x7 => BAD (HIGHMEM+DMA32+DMA) * 0x8 => NORMAL (MOVABLE+0) * 0x9 => DMA or NORMAL (MOVABLE+DMA) * 0xa => MOVABLE (Movable is valid only if HIGHMEM is set too) * 0xb => BAD (MOVABLE+HIGHMEM+DMA) * 0xc => DMA32 or NORMAL (MOVABLE+DMA32) * 0xd => BAD (MOVABLE+DMA32+DMA) * 0xe => BAD (MOVABLE+DMA32+HIGHMEM) * 0xf => BAD (MOVABLE+DMA32+HIGHMEM+DMA) * * GFP_ZONES_SHIFT must be <= 2 on 32 bit platforms. */ #if defined(CONFIG_ZONE_DEVICE) && (MAX_NR_ZONES-1) <= 4 /* ZONE_DEVICE is not a valid GFP zone specifier */ #define GFP_ZONES_SHIFT 2 #else #define GFP_ZONES_SHIFT ZONES_SHIFT #endif #if 16 * GFP_ZONES_SHIFT > BITS_PER_LONG #error GFP_ZONES_SHIFT too large to create GFP_ZONE_TABLE integer #endif #define GFP_ZONE_TABLE ( \ (ZONE_NORMAL << 0 * GFP_ZONES_SHIFT) \ | (OPT_ZONE_DMA << ___GFP_DMA * GFP_ZONES_SHIFT) \ | (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * GFP_ZONES_SHIFT) \ | (OPT_ZONE_DMA32 << ___GFP_DMA32 * GFP_ZONES_SHIFT) \ | (ZONE_NORMAL << ___GFP_MOVABLE * GFP_ZONES_SHIFT) \ | (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * GFP_ZONES_SHIFT) \ | (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * GFP_ZONES_SHIFT)\ | (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * GFP_ZONES_SHIFT)\ ) /* * GFP_ZONE_BAD is a bitmap for all combinations of __GFP_DMA, __GFP_DMA32 * __GFP_HIGHMEM and __GFP_MOVABLE that are not permitted. One flag per * entry starting with bit 0. Bit is set if the combination is not * allowed. */ #define GFP_ZONE_BAD ( \ 1 << (___GFP_DMA | ___GFP_HIGHMEM) \ | 1 << (___GFP_DMA | ___GFP_DMA32) \ | 1 << (___GFP_DMA32 | ___GFP_HIGHMEM) \ | 1 << (___GFP_DMA | ___GFP_DMA32 | ___GFP_HIGHMEM) \ | 1 << (___GFP_MOVABLE | ___GFP_HIGHMEM | ___GFP_DMA) \ | 1 << (___GFP_MOVABLE | ___GFP_DMA32 | ___GFP_DMA) \ | 1 << (___GFP_MOVABLE | ___GFP_DMA32 | ___GFP_HIGHMEM) \ | 1 << (___GFP_MOVABLE | ___GFP_DMA32 | ___GFP_DMA | ___GFP_HIGHMEM) \ ) static inline enum zone_type gfp_zone(gfp_t flags) { enum zone_type z; int bit = (__force int) (flags & GFP_ZONEMASK); z = (GFP_ZONE_TABLE >> (bit * GFP_ZONES_SHIFT)) & ((1 << GFP_ZONES_SHIFT) - 1); VM_BUG_ON((GFP_ZONE_BAD >> bit) & 1); return z; } /* * There is only one page-allocator function, and two main namespaces to * it. The alloc_page*() variants return 'struct page *' and as such * can allocate highmem pages, the *get*page*() variants return * virtual kernel addresses to the allocated page(s). */ static inline int gfp_zonelist(gfp_t flags) { #ifdef CONFIG_NUMA if (unlikely(flags & __GFP_THISNODE)) return ZONELIST_NOFALLBACK; #endif return ZONELIST_FALLBACK; } /* * We get the zone list from the current node and the gfp_mask. * This zone list contains a maximum of MAX_NUMNODES*MAX_NR_ZONES zones. * There are two zonelists per node, one for all zones with memory and * one containing just zones from the node the zonelist belongs to. * * For the case of non-NUMA systems the NODE_DATA() gets optimized to * &contig_page_data at compile-time. */ static inline struct zonelist *node_zonelist(int nid, gfp_t flags) { return NODE_DATA(nid)->node_zonelists + gfp_zonelist(flags); } #ifndef HAVE_ARCH_FREE_PAGE static inline void arch_free_page(struct page *page, int order) { } #endif #ifndef HAVE_ARCH_ALLOC_PAGE static inline void arch_alloc_page(struct page *page, int order) { } #endif #ifndef HAVE_ARCH_MAKE_PAGE_ACCESSIBLE static inline int arch_make_page_accessible(struct page *page) { return 0; } #endif struct page *__alloc_pages(gfp_t gfp, unsigned int order, int preferred_nid, nodemask_t *nodemask); unsigned long __alloc_pages_bulk(gfp_t gfp, int preferred_nid, nodemask_t *nodemask, int nr_pages, struct list_head *page_list, struct page **page_array); /* Bulk allocate order-0 pages */ static inline unsigned long alloc_pages_bulk_list(gfp_t gfp, unsigned long nr_pages, struct list_head *list) { return __alloc_pages_bulk(gfp, numa_mem_id(), NULL, nr_pages, list, NULL); } static inline unsigned long alloc_pages_bulk_array(gfp_t gfp, unsigned long nr_pages, struct page **page_array) { return __alloc_pages_bulk(gfp, numa_mem_id(), NULL, nr_pages, NULL, page_array); } static inline unsigned long alloc_pages_bulk_array_node(gfp_t gfp, int nid, unsigned long nr_pages, struct page **page_array) { if (nid == NUMA_NO_NODE) nid = numa_mem_id(); return __alloc_pages_bulk(gfp, nid, NULL, nr_pages, NULL, page_array); } /* * Allocate pages, preferring the node given as nid. The node must be valid and * online. For more general interface, see alloc_pages_node(). */ static inline struct page * __alloc_pages_node(int nid, gfp_t gfp_mask, unsigned int order) { VM_BUG_ON(nid < 0 || nid >= MAX_NUMNODES); VM_WARN_ON((gfp_mask & __GFP_THISNODE) && !node_online(nid)); return __alloc_pages(gfp_mask, order, nid, NULL); } /* * Allocate pages, preferring the node given as nid. When nid == NUMA_NO_NODE, * prefer the current CPU's closest node. Otherwise node must be valid and * online. */ static inline struct page *alloc_pages_node(int nid, gfp_t gfp_mask, unsigned int order) { if (nid == NUMA_NO_NODE) nid = numa_mem_id(); return __alloc_pages_node(nid, gfp_mask, order); } #ifdef CONFIG_NUMA struct page *alloc_pages(gfp_t gfp, unsigned int order); extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order, struct vm_area_struct *vma, unsigned long addr, int node, bool hugepage); #define alloc_hugepage_vma(gfp_mask, vma, addr, order) \ alloc_pages_vma(gfp_mask, order, vma, addr, numa_node_id(), true) #else static inline struct page *alloc_pages(gfp_t gfp_mask, unsigned int order) { return alloc_pages_node(numa_node_id(), gfp_mask, order); } #define alloc_pages_vma(gfp_mask, order, vma, addr, node, false)\ alloc_pages(gfp_mask, order) #define alloc_hugepage_vma(gfp_mask, vma, addr, order) \ alloc_pages(gfp_mask, order) #endif #define alloc_page(gfp_mask) alloc_pages(gfp_mask, 0) #define alloc_page_vma(gfp_mask, vma, addr) \ alloc_pages_vma(gfp_mask, 0, vma, addr, numa_node_id(), false) extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order); extern unsigned long get_zeroed_page(gfp_t gfp_mask); void *alloc_pages_exact(size_t size, gfp_t gfp_mask); void free_pages_exact(void *virt, size_t size); void * __meminit alloc_pages_exact_nid(int nid, size_t size, gfp_t gfp_mask); #define __get_free_page(gfp_mask) \ __get_free_pages((gfp_mask), 0) #define __get_dma_pages(gfp_mask, order) \ __get_free_pages((gfp_mask) | GFP_DMA, (order)) extern void __free_pages(struct page *page, unsigned int order); extern void free_pages(unsigned long addr, unsigned int order); struct page_frag_cache; extern void __page_frag_cache_drain(struct page *page, unsigned int count); extern void *page_frag_alloc_align(struct page_frag_cache *nc, unsigned int fragsz, gfp_t gfp_mask, unsigned int align_mask); static inline void *page_frag_alloc(struct page_frag_cache *nc, unsigned int fragsz, gfp_t gfp_mask) { return page_frag_alloc_align(nc, fragsz, gfp_mask, ~0u); } extern void page_frag_free(void *addr); #define __free_page(page) __free_pages((page), 0) #define free_page(addr) free_pages((addr), 0) void page_alloc_init(void); void drain_zone_pages(struct zone *zone, struct per_cpu_pages *pcp); void drain_all_pages(struct zone *zone); void drain_local_pages(struct zone *zone); void page_alloc_init_late(void); /* * gfp_allowed_mask is set to GFP_BOOT_MASK during early boot to restrict what * GFP flags are used before interrupts are enabled. Once interrupts are * enabled, it is set to __GFP_BITS_MASK while the system is running. During * hibernation, it is used by PM to avoid I/O during memory allocation while * devices are suspended. */ extern gfp_t gfp_allowed_mask; /* Returns true if the gfp_mask allows use of ALLOC_NO_WATERMARK */ bool gfp_pfmemalloc_allowed(gfp_t gfp_mask); extern void pm_restrict_gfp_mask(void); extern void pm_restore_gfp_mask(void); /* * Check if the gfp flags allow compaction - GFP_NOIO is a really * tricky context because the migration might require IO. */ static inline bool gfp_compaction_allowed(gfp_t gfp_mask) { return IS_ENABLED(CONFIG_COMPACTION) && (gfp_mask & __GFP_IO); } extern gfp_t vma_thp_gfp_mask(struct vm_area_struct *vma); #ifdef CONFIG_PM_SLEEP extern bool pm_suspended_storage(void); #else static inline bool pm_suspended_storage(void) { return false; } #endif /* CONFIG_PM_SLEEP */ #ifdef CONFIG_CONTIG_ALLOC /* The below functions must be run on a range from a single zone. */ extern int alloc_contig_range(unsigned long start, unsigned long end, unsigned migratetype, gfp_t gfp_mask); extern struct page *alloc_contig_pages(unsigned long nr_pages, gfp_t gfp_mask, int nid, nodemask_t *nodemask); #endif void free_contig_range(unsigned long pfn, unsigned long nr_pages); #ifdef CONFIG_CMA /* CMA stuff */ extern void init_cma_reserved_pageblock(struct page *page); #endif #endif /* __LINUX_GFP_H */ PK ! ��\�V �V mmc/host.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/mmc/host.h * * Host driver specific definitions. */ #ifndef LINUX_MMC_HOST_H #define LINUX_MMC_HOST_H #include <linux/sched.h> #include <linux/device.h> #include <linux/fault-inject.h> #include <linux/mmc/core.h> #include <linux/mmc/card.h> #include <linux/mmc/pm.h> #include <linux/dma-direction.h> #include <linux/keyslot-manager.h> struct mmc_ios { unsigned int clock; /* clock rate */ unsigned short vdd; unsigned int power_delay_ms; /* waiting for stable power */ /* vdd stores the bit number of the selected voltage range from below. */ unsigned char bus_mode; /* command output mode */ #define MMC_BUSMODE_OPENDRAIN 1 #define MMC_BUSMODE_PUSHPULL 2 unsigned char chip_select; /* SPI chip select */ #define MMC_CS_DONTCARE 0 #define MMC_CS_HIGH 1 #define MMC_CS_LOW 2 unsigned char power_mode; /* power supply mode */ #define MMC_POWER_OFF 0 #define MMC_POWER_UP 1 #define MMC_POWER_ON 2 #define MMC_POWER_UNDEFINED 3 unsigned char bus_width; /* data bus width */ #define MMC_BUS_WIDTH_1 0 #define MMC_BUS_WIDTH_4 2 #define MMC_BUS_WIDTH_8 3 unsigned char timing; /* timing specification used */ #define MMC_TIMING_LEGACY 0 #define MMC_TIMING_MMC_HS 1 #define MMC_TIMING_SD_HS 2 #define MMC_TIMING_UHS_SDR12 3 #define MMC_TIMING_UHS_SDR25 4 #define MMC_TIMING_UHS_SDR50 5 #define MMC_TIMING_UHS_SDR104 6 #define MMC_TIMING_UHS_DDR50 7 #define MMC_TIMING_MMC_DDR52 8 #define MMC_TIMING_MMC_HS200 9 #define MMC_TIMING_MMC_HS400 10 #define MMC_TIMING_SD_EXP 11 #define MMC_TIMING_SD_EXP_1_2V 12 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ #define MMC_SIGNAL_VOLTAGE_330 0 #define MMC_SIGNAL_VOLTAGE_180 1 #define MMC_SIGNAL_VOLTAGE_120 2 unsigned char drv_type; /* driver type (A, B, C, D) */ #define MMC_SET_DRIVER_TYPE_B 0 #define MMC_SET_DRIVER_TYPE_A 1 #define MMC_SET_DRIVER_TYPE_C 2 #define MMC_SET_DRIVER_TYPE_D 3 bool enhanced_strobe; /* hs400es selection */ }; struct mmc_clk_phase { bool valid; u16 in_deg; u16 out_deg; }; #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1) struct mmc_clk_phase_map { struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES]; }; struct mmc_host; struct mmc_host_ops { /* * It is optional for the host to implement pre_req and post_req in * order to support double buffering of requests (prepare one * request while another request is active). * pre_req() must always be followed by a post_req(). * To undo a call made to pre_req(), call post_req() with * a nonzero err condition. */ void (*post_req)(struct mmc_host *host, struct mmc_request *req, int err); void (*pre_req)(struct mmc_host *host, struct mmc_request *req); void (*request)(struct mmc_host *host, struct mmc_request *req); /* Submit one request to host in atomic context. */ int (*request_atomic)(struct mmc_host *host, struct mmc_request *req); /* * Avoid calling the next three functions too often or in a "fast * path", since underlaying controller might implement them in an * expensive and/or slow way. Also note that these functions might * sleep, so don't call them in the atomic contexts! */ /* * Notes to the set_ios callback: * ios->clock might be 0. For some controllers, setting 0Hz * as any other frequency works. However, some controllers * explicitly need to disable the clock. Otherwise e.g. voltage * switching might fail because the SDCLK is not really quiet. */ void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); /* * Return values for the get_ro callback should be: * 0 for a read/write card * 1 for a read-only card * -ENOSYS when not supported (equal to NULL callback) * or a negative errno value when something bad happened */ int (*get_ro)(struct mmc_host *host); /* * Return values for the get_cd callback should be: * 0 for a absent card * 1 for a present card * -ENOSYS when not supported (equal to NULL callback) * or a negative errno value when something bad happened */ int (*get_cd)(struct mmc_host *host); void (*enable_sdio_irq)(struct mmc_host *host, int enable); /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */ void (*ack_sdio_irq)(struct mmc_host *host); /* optional callback for HC quirks */ void (*init_card)(struct mmc_host *host, struct mmc_card *card); int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); /* Check if the card is pulling dat[0] low */ int (*card_busy)(struct mmc_host *host); /* The tuning command opcode value is different for SD and eMMC cards */ int (*execute_tuning)(struct mmc_host *host, u32 opcode); /* Prepare HS400 target operating frequency depending host driver */ int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios); /* Prepare switch to DDR during the HS400 init sequence */ int (*hs400_prepare_ddr)(struct mmc_host *host); /* Prepare for switching from HS400 to HS200 */ void (*hs400_downgrade)(struct mmc_host *host); /* Complete selection of HS400 */ void (*hs400_complete)(struct mmc_host *host); /* Prepare enhanced strobe depending host driver */ void (*hs400_enhanced_strobe)(struct mmc_host *host, struct mmc_ios *ios); int (*select_drive_strength)(struct mmc_card *card, unsigned int max_dtr, int host_drv, int card_drv, int *drv_type); /* Reset the eMMC card via RST_n */ void (*hw_reset)(struct mmc_host *host); void (*card_event)(struct mmc_host *host); /* * Optional callback to support controllers with HW issues for multiple * I/O. Returns the number of supported blocks for the request. */ int (*multi_io_quirk)(struct mmc_card *card, unsigned int direction, int blk_size); /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */ int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios); }; struct mmc_cqe_ops { /* Allocate resources, and make the CQE operational */ int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card); /* Free resources, and make the CQE non-operational */ void (*cqe_disable)(struct mmc_host *host); /* * Issue a read, write or DCMD request to the CQE. Also deal with the * effect of ->cqe_off(). */ int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq); /* Free resources (e.g. DMA mapping) associated with the request */ void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq); /* * Prepare the CQE and host controller to accept non-CQ commands. There * is no corresponding ->cqe_on(), instead ->cqe_request() is required * to deal with that. */ void (*cqe_off)(struct mmc_host *host); /* * Wait for all CQE tasks to complete. Return an error if recovery * becomes necessary. */ int (*cqe_wait_for_idle)(struct mmc_host *host); /* * Notify CQE that a request has timed out. Return false if the request * completed or true if a timeout happened in which case indicate if * recovery is needed. */ bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq, bool *recovery_needed); /* * Stop all CQE activity and prepare the CQE and host controller to * accept recovery commands. */ void (*cqe_recovery_start)(struct mmc_host *host); /* * Clear the queue and call mmc_cqe_request_done() on all requests. * Requests that errored will have the error set on the mmc_request * (data->error or cmd->error for DCMD). Requests that did not error * will have zero data bytes transferred. */ void (*cqe_recovery_finish)(struct mmc_host *host); }; struct mmc_async_req { /* active mmc request */ struct mmc_request *mrq; /* * Check error status of completed mmc request. * Returns 0 if success otherwise non zero. */ enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *); }; /** * struct mmc_slot - MMC slot functions * * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL * @handler_priv: MMC/SD-card slot context * * Some MMC/SD host controllers implement slot-functions like card and * write-protect detection natively. However, a large number of controllers * leave these functions to the CPU. This struct provides a hook to attach * such slot-function drivers. */ struct mmc_slot { int cd_irq; bool cd_wake_enabled; void *handler_priv; }; /** * mmc_context_info - synchronization details for mmc context * @is_done_rcv wake up reason was done request * @is_new_req wake up reason was new request * @is_waiting_last_req mmc context waiting for single running request * @wait wait queue */ struct mmc_context_info { bool is_done_rcv; bool is_new_req; bool is_waiting_last_req; wait_queue_head_t wait; }; struct regulator; struct mmc_pwrseq; struct mmc_supply { struct regulator *vmmc; /* Card power supply */ struct regulator *vqmmc; /* Optional Vccq supply */ }; struct mmc_ctx { struct task_struct *task; }; struct mmc_host { struct device *parent; struct device class_dev; int index; const struct mmc_host_ops *ops; struct mmc_pwrseq *pwrseq; unsigned int f_min; unsigned int f_max; unsigned int f_init; u32 ocr_avail; u32 ocr_avail_sdio; /* SDIO-specific OCR */ u32 ocr_avail_sd; /* SD-specific OCR */ u32 ocr_avail_mmc; /* MMC-specific OCR */ struct wakeup_source *ws; /* Enable consume of uevents */ u32 max_current_330; u32 max_current_300; u32 max_current_180; #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ u32 caps; /* Host capabilities */ #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */ #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */ #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */ #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */ #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */ #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */ #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \ MMC_CAP_1_2V_DDR) #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */ #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */ #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */ #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */ #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ MMC_CAP_UHS_DDR50) #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */ #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */ #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */ #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */ #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */ #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */ u32 caps2; /* More host capabilities */ #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */ #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */ #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */ #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */ #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ MMC_CAP2_HS200_1_2V_SDR) #define MMC_CAP2_SD_EXP (1 << 7) /* SD express via PCIe */ #define MMC_CAP2_SD_EXP_1_2V (1 << 8) /* SD express 1.2V */ #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */ #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ MMC_CAP2_HS400_1_2V) #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V) #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */ #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */ #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */ #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */ #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */ #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */ #ifdef CONFIG_MMC_CRYPTO #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */ #else #define MMC_CAP2_CRYPTO 0 #endif #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ int fixed_drv_type; /* fixed driver type for non-removable media */ mmc_pm_flag_t pm_caps; /* supported pm features */ /* host specific block data */ unsigned int max_seg_size; /* see blk_queue_max_segment_size */ unsigned short max_segs; /* see blk_queue_max_segments */ unsigned short unused; unsigned int max_req_size; /* maximum number of bytes in one req */ unsigned int max_blk_size; /* maximum size of one mmc block */ unsigned int max_blk_count; /* maximum number of blocks in one req */ unsigned int max_busy_timeout; /* max busy timeout in ms */ /* private data */ spinlock_t lock; /* lock for claim and bus ops */ struct mmc_ios ios; /* current io bus settings */ /* group bitfields together to minimize padding */ unsigned int use_spi_crc:1; unsigned int claimed:1; /* host exclusively claimed */ unsigned int doing_init_tune:1; /* initial tuning in progress */ unsigned int can_retune:1; /* re-tuning can be used */ unsigned int doing_retune:1; /* re-tuning in progress */ unsigned int retune_now:1; /* do re-tuning at next req */ unsigned int retune_paused:1; /* re-tuning is temporarily disabled */ unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */ unsigned int can_dma_map_merge:1; /* merging can be used */ unsigned int vqmmc_enabled:1; /* vqmmc regulator is enabled */ int rescan_disable; /* disable card detection */ int rescan_entered; /* used with nonremovable devices */ int need_retune; /* re-tuning is needed */ int hold_retune; /* hold off re-tuning */ unsigned int retune_period; /* re-tuning period in secs */ struct timer_list retune_timer; /* for periodic re-tuning */ bool trigger_card_event; /* card_event necessary */ struct mmc_card *card; /* device attached to this host */ wait_queue_head_t wq; struct mmc_ctx *claimer; /* context that has host claimed */ int claim_cnt; /* "claim" nesting count */ struct mmc_ctx default_ctx; /* default context */ struct delayed_work detect; int detect_change; /* card detect flag */ struct mmc_slot slot; const struct mmc_bus_ops *bus_ops; /* current bus driver */ unsigned int sdio_irqs; struct task_struct *sdio_irq_thread; struct delayed_work sdio_irq_work; bool sdio_irq_pending; atomic_t sdio_irq_thread_abort; mmc_pm_flag_t pm_flags; /* requested pm features */ struct led_trigger *led; /* activity led */ #ifdef CONFIG_REGULATOR bool regulator_enabled; /* regulator state */ #endif struct mmc_supply supply; struct dentry *debugfs_root; /* Ongoing data transfer that allows commands during transfer */ struct mmc_request *ongoing_mrq; #ifdef CONFIG_FAIL_MMC_REQUEST struct fault_attr fail_mmc_request; #endif unsigned int actual_clock; /* Actual HC clock rate */ unsigned int slotno; /* used for sdio acpi binding */ int dsr_req; /* DSR value is valid */ u32 dsr; /* optional driver stage (DSR) value */ /* Command Queue Engine (CQE) support */ const struct mmc_cqe_ops *cqe_ops; void *cqe_private; int cqe_qdepth; bool cqe_enabled; bool cqe_on; /* Inline encryption support */ #ifdef CONFIG_MMC_CRYPTO struct blk_keyslot_manager ksm; #endif /* Host Software Queue support */ bool hsq_enabled; unsigned long private[] ____cacheline_aligned; }; struct device_node; struct mmc_host *mmc_alloc_host(int extra, struct device *); int mmc_add_host(struct mmc_host *); void mmc_remove_host(struct mmc_host *); void mmc_free_host(struct mmc_host *); void mmc_of_parse_clk_phase(struct mmc_host *host, struct mmc_clk_phase_map *map); int mmc_of_parse(struct mmc_host *host); int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask); static inline void *mmc_priv(struct mmc_host *host) { return (void *)host->private; } static inline struct mmc_host *mmc_from_priv(void *priv) { return container_of(priv, struct mmc_host, private); } #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI) #define mmc_dev(x) ((x)->parent) #define mmc_classdev(x) (&(x)->class_dev) #define mmc_hostname(x) (dev_name(&(x)->class_dev)) void mmc_detect_change(struct mmc_host *, unsigned long delay); void mmc_request_done(struct mmc_host *, struct mmc_request *); void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq); void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq); /* * May be called from host driver's system/runtime suspend/resume callbacks, * to know if SDIO IRQs has been claimed. */ static inline bool sdio_irq_claimed(struct mmc_host *host) { return host->sdio_irqs > 0; } static inline void mmc_signal_sdio_irq(struct mmc_host *host) { host->ops->enable_sdio_irq(host, 0); host->sdio_irq_pending = true; if (host->sdio_irq_thread) wake_up_process(host->sdio_irq_thread); } void sdio_signal_irq(struct mmc_host *host); #ifdef CONFIG_REGULATOR int mmc_regulator_set_ocr(struct mmc_host *mmc, struct regulator *supply, unsigned short vdd_bit); int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios); #else static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, struct regulator *supply, unsigned short vdd_bit) { return 0; } static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios) { return -EINVAL; } #endif int mmc_regulator_get_supply(struct mmc_host *mmc); int mmc_regulator_enable_vqmmc(struct mmc_host *mmc); void mmc_regulator_disable_vqmmc(struct mmc_host *mmc); static inline int mmc_card_is_removable(struct mmc_host *host) { return !(host->caps & MMC_CAP_NONREMOVABLE); } static inline int mmc_card_keep_power(struct mmc_host *host) { return host->pm_flags & MMC_PM_KEEP_POWER; } static inline int mmc_card_wake_sdio_irq(struct mmc_host *host) { return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ; } /* TODO: Move to private header */ static inline int mmc_card_hs(struct mmc_card *card) { return card->host->ios.timing == MMC_TIMING_SD_HS || card->host->ios.timing == MMC_TIMING_MMC_HS; } /* TODO: Move to private header */ static inline int mmc_card_uhs(struct mmc_card *card) { return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && card->host->ios.timing <= MMC_TIMING_UHS_DDR50; } void mmc_retune_timer_stop(struct mmc_host *host); static inline void mmc_retune_needed(struct mmc_host *host) { if (host->can_retune) host->need_retune = 1; } static inline bool mmc_can_retune(struct mmc_host *host) { return host->can_retune == 1; } static inline bool mmc_doing_retune(struct mmc_host *host) { return host->doing_retune == 1; } static inline bool mmc_doing_tune(struct mmc_host *host) { return host->doing_retune == 1 || host->doing_init_tune == 1; } static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) { return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; } int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode); #endif /* LINUX_MMC_HOST_H */ PK ! (�&~ D D mmc/mmc.hnu �[��� /* * Header for MultiMediaCard (MMC) * * Copyright 2002 Hewlett-Packard Company * * Use consistent with the GNU GPL is permitted, * provided that this copyright notice is * preserved in its entirety in all copies and derived works. * * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS * FITNESS FOR ANY PARTICULAR PURPOSE. * * Many thanks to Alessandro Rubini and Jonathan Corbet! * * Based strongly on code by: * * Author: Yong-iL Joh <tolkien@mizi.com> * * Author: Andrew Christian * 15 May 2002 */ #ifndef LINUX_MMC_MMC_H #define LINUX_MMC_MMC_H #include <linux/types.h> /* Standard MMC commands (4.1) type argument response */ /* class 1 */ #define MMC_GO_IDLE_STATE 0 /* bc */ #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ #define MMC_ALL_SEND_CID 2 /* bcr R2 */ #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ #define MMC_SET_DSR 4 /* bc [31:16] RCA */ #define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */ #define MMC_SWITCH 6 /* ac [31:0] See below R1b */ #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ #define MMC_SEND_EXT_CSD 8 /* adtc R1 */ #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ #define MMC_STOP_TRANSMISSION 12 /* ac R1b */ #define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ #define MMC_BUS_TEST_R 14 /* adtc R1 */ #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ #define MMC_BUS_TEST_W 19 /* adtc R1 */ #define MMC_SPI_READ_OCR 58 /* spi spi_R3 */ #define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */ /* class 2 */ #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */ #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */ /* class 3 */ #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ /* class 4 */ #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ #define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ #define MMC_PROGRAM_CID 26 /* adtc R1 */ #define MMC_PROGRAM_CSD 27 /* adtc R1 */ /* class 6 */ #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ /* class 5 */ #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ #define MMC_ERASE 38 /* ac R1b */ /* class 9 */ #define MMC_FAST_IO 39 /* ac <Complex> R4 */ #define MMC_GO_IRQ_STATE 40 /* bcr R5 */ /* class 7 */ #define MMC_LOCK_UNLOCK 42 /* adtc R1b */ /* class 8 */ #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ /* class 11 */ #define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */ #define MMC_QUE_TASK_ADDR 45 /* ac [31:0] data addr R1 */ #define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */ #define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */ #define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */ static inline bool mmc_op_multi(u32 opcode) { return opcode == MMC_WRITE_MULTIPLE_BLOCK || opcode == MMC_READ_MULTIPLE_BLOCK; } /* * MMC_SWITCH argument format: * * [31:26] Always 0 * [25:24] Access Mode * [23:16] Location of target Byte in EXT_CSD * [15:08] Value Byte * [07:03] Always 0 * [02:00] Command Set */ /* MMC status in R1, for native mode (SPI bits are different) Type e : error bit s : status bit r : detected and set for the actual command response x : detected and set during command execution. the host must poll the card by sending status command in order to read these bits. Clear condition a : according to the card state b : always related to the previous command. Reception of a valid command will clear it (with a delay of one command) c : clear by read */ #define R1_OUT_OF_RANGE (1 << 31) /* er, c */ #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ #define R1_ERASE_PARAM (1 << 27) /* ex, c */ #define R1_WP_VIOLATION (1 << 26) /* erx, c */ #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ #define R1_COM_CRC_ERROR (1 << 23) /* er, b */ #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ #define R1_CC_ERROR (1 << 20) /* erx, c */ #define R1_ERROR (1 << 19) /* erx, c */ #define R1_UNDERRUN (1 << 18) /* ex, c */ #define R1_OVERRUN (1 << 17) /* ex, c */ #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ #define R1_ERASE_RESET (1 << 13) /* sr, c */ #define R1_STATUS(x) (x & 0xFFF9A000) #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ #define R1_READY_FOR_DATA (1 << 8) /* sx, a */ #define R1_SWITCH_ERROR (1 << 7) /* sx, c */ #define R1_EXCEPTION_EVENT (1 << 6) /* sr, a */ #define R1_APP_CMD (1 << 5) /* sr, c */ #define R1_STATE_IDLE 0 #define R1_STATE_READY 1 #define R1_STATE_IDENT 2 #define R1_STATE_STBY 3 #define R1_STATE_TRAN 4 #define R1_STATE_DATA 5 #define R1_STATE_RCV 6 #define R1_STATE_PRG 7 #define R1_STATE_DIS 8 static inline bool mmc_ready_for_data(u32 status) { /* * Some cards mishandle the status bits, so make sure to check both the * busy indication and the card state. */ return status & R1_READY_FOR_DATA && R1_CURRENT_STATE(status) == R1_STATE_TRAN; } /* * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS * R1 is the low order byte; R2 is the next highest byte, when present. */ #define R1_SPI_IDLE (1 << 0) #define R1_SPI_ERASE_RESET (1 << 1) #define R1_SPI_ILLEGAL_COMMAND (1 << 2) #define R1_SPI_COM_CRC (1 << 3) #define R1_SPI_ERASE_SEQ (1 << 4) #define R1_SPI_ADDRESS (1 << 5) #define R1_SPI_PARAMETER (1 << 6) /* R1 bit 7 is always zero */ #define R2_SPI_CARD_LOCKED (1 << 8) #define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */ #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP #define R2_SPI_ERROR (1 << 10) #define R2_SPI_CC_ERROR (1 << 11) #define R2_SPI_CARD_ECC_ERROR (1 << 12) #define R2_SPI_WP_VIOLATION (1 << 13) #define R2_SPI_ERASE_PARAM (1 << 14) #define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */ #define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE /* * OCR bits are mostly in host.h */ #define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ /* * Card Command Classes (CCC) */ #define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ /* (and for SPI, CMD58,59) */ #define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ /* (CMD11) */ #define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ /* (CMD16,17,18) */ #define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ /* (CMD20) */ #define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ /* (CMD16,24,25,26,27) */ #define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ /* (CMD32,33,34,35,36,37,38,39) */ #define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ /* (CMD28,29,30) */ #define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ /* (CMD16,CMD42) */ #define CCC_APP_SPEC (1<<8) /* (8) Application specific */ /* (CMD55,56,57,ACMD*) */ #define CCC_IO_MODE (1<<9) /* (9) I/O mode */ /* (CMD5,39,40,52,53) */ #define CCC_SWITCH (1<<10) /* (10) High speed switch */ /* (CMD6,34,35,36,37,50) */ /* (11) Reserved */ /* (CMD?) */ /* * CSD field definitions */ #define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ #define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ #define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ #define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ #define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ #define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ #define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ #define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ #define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ /* * EXT_CSD fields */ #define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */ #define EXT_CSD_FLUSH_CACHE 32 /* W */ #define EXT_CSD_CACHE_CTRL 33 /* R/W */ #define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */ #define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */ #define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */ #define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */ #define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */ #define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */ #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ #define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */ #define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ #define EXT_CSD_PARTITION_SUPPORT 160 /* RO */ #define EXT_CSD_HPI_MGMT 161 /* R/W */ #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ #define EXT_CSD_BKOPS_EN 163 /* R/W */ #define EXT_CSD_BKOPS_START 164 /* W */ #define EXT_CSD_SANITIZE_START 165 /* W */ #define EXT_CSD_WR_REL_PARAM 166 /* RO */ #define EXT_CSD_RPMB_MULT 168 /* RO */ #define EXT_CSD_FW_CONFIG 169 /* R/W */ #define EXT_CSD_BOOT_WP 173 /* R/W */ #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ #define EXT_CSD_PART_CONFIG 179 /* R/W */ #define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_STROBE_SUPPORT 184 /* RO */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_POWER_CLASS 187 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_STRUCTURE 194 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_DRIVER_STRENGTH 197 /* RO */ #define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */ #define EXT_CSD_PART_SWITCH_TIME 199 /* RO */ #define EXT_CSD_PWR_CL_52_195 200 /* RO */ #define EXT_CSD_PWR_CL_26_195 201 /* RO */ #define EXT_CSD_PWR_CL_52_360 202 /* RO */ #define EXT_CSD_PWR_CL_26_360 203 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ #define EXT_CSD_S_A_TIMEOUT 217 /* RO */ #define EXT_CSD_REL_WR_SEC_C 222 /* RO */ #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ #define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ #define EXT_CSD_BOOT_MULT 226 /* RO */ #define EXT_CSD_SEC_TRIM_MULT 229 /* RO */ #define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ #define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ #define EXT_CSD_TRIM_MULT 232 /* RO */ #define EXT_CSD_PWR_CL_200_195 236 /* RO */ #define EXT_CSD_PWR_CL_200_360 237 /* RO */ #define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */ #define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */ #define EXT_CSD_BKOPS_STATUS 246 /* RO */ #define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ #define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ #define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */ #define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */ #define EXT_CSD_FIRMWARE_VERSION 254 /* RO, 8 bytes */ #define EXT_CSD_PRE_EOL_INFO 267 /* RO */ #define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A 268 /* RO */ #define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B 269 /* RO */ #define EXT_CSD_CMDQ_DEPTH 307 /* RO */ #define EXT_CSD_CMDQ_SUPPORT 308 /* RO */ #define EXT_CSD_SUPPORTED_MODE 493 /* RO */ #define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */ #define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */ #define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */ #define EXT_CSD_MAX_PACKED_READS 501 /* RO */ #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */ #define EXT_CSD_HPI_FEATURES 503 /* RO */ /* * EXT_CSD field definitions */ #define EXT_CSD_WR_REL_PARAM_EN (1<<2) #define EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR (1<<4) #define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40) #define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10) #define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04) #define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01) #define EXT_CSD_PART_CONFIG_ACC_MASK (0x7) #define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1) #define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3) #define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4) #define EXT_CSD_PART_SETTING_COMPLETED (0x1) #define EXT_CSD_PART_SUPPORT_PART_EN (0x1) #define EXT_CSD_CMD_SET_NORMAL (1<<0) #define EXT_CSD_CMD_SET_SECURE (1<<1) #define EXT_CSD_CMD_SET_CPSECURE (1<<2) #define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */ #define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \ EXT_CSD_CARD_TYPE_HS_52) #define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */ /* DDR mode @1.8V or 3V I/O */ #define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */ /* DDR mode @1.2V I/O */ #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ | EXT_CSD_CARD_TYPE_DDR_1_2V) #define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */ #define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */ /* SDR mode @1.2V I/O */ #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ EXT_CSD_CARD_TYPE_HS200_1_2V) #define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */ #define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */ #define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \ EXT_CSD_CARD_TYPE_HS400_1_2V) #define EXT_CSD_CARD_TYPE_HS400ES (1<<8) /* Card can run at HS400ES */ #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BUS_WIDTH_STROBE BIT(7) /* Enhanced strobe mode */ #define EXT_CSD_TIMING_BC 0 /* Backwards compatility */ #define EXT_CSD_TIMING_HS 1 /* High speed */ #define EXT_CSD_TIMING_HS200 2 /* HS200 */ #define EXT_CSD_TIMING_HS400 3 /* HS400 */ #define EXT_CSD_DRV_STR_SHIFT 4 /* Driver Strength shift */ #define EXT_CSD_SEC_ER_EN BIT(0) #define EXT_CSD_SEC_BD_BLK_EN BIT(2) #define EXT_CSD_SEC_GB_CL_EN BIT(4) #define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */ #define EXT_CSD_RST_N_EN_MASK 0x3 #define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */ #define EXT_CSD_NO_POWER_NOTIFICATION 0 #define EXT_CSD_POWER_ON 1 #define EXT_CSD_POWER_OFF_SHORT 2 #define EXT_CSD_POWER_OFF_LONG 3 #define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */ #define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */ #define EXT_CSD_PWR_CL_8BIT_SHIFT 4 #define EXT_CSD_PWR_CL_4BIT_SHIFT 0 #define EXT_CSD_PACKED_EVENT_EN BIT(3) /* * EXCEPTION_EVENT_STATUS field */ #define EXT_CSD_URGENT_BKOPS BIT(0) #define EXT_CSD_DYNCAP_NEEDED BIT(1) #define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2) #define EXT_CSD_PACKED_FAILURE BIT(3) #define EXT_CSD_PACKED_GENERIC_ERROR BIT(0) #define EXT_CSD_PACKED_INDEXED_ERROR BIT(1) /* * BKOPS status level */ #define EXT_CSD_BKOPS_LEVEL_2 0x2 /* * BKOPS modes */ #define EXT_CSD_MANUAL_BKOPS_MASK 0x01 #define EXT_CSD_AUTO_BKOPS_MASK 0x02 /* * Command Queue */ #define EXT_CSD_CMDQ_MODE_ENABLED BIT(0) #define EXT_CSD_CMDQ_DEPTH_MASK GENMASK(4, 0) #define EXT_CSD_CMDQ_SUPPORTED BIT(0) /* * MMC_SWITCH access modes */ #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ /* * Erase/trim/discard */ #define MMC_ERASE_ARG 0x00000000 #define MMC_SECURE_ERASE_ARG 0x80000000 #define MMC_TRIM_ARG 0x00000001 #define MMC_DISCARD_ARG 0x00000003 #define MMC_SECURE_TRIM1_ARG 0x80000001 #define MMC_SECURE_TRIM2_ARG 0x80008000 #define MMC_SECURE_ARGS 0x80000000 #define MMC_TRIM_OR_DISCARD_ARGS 0x00008003 #define mmc_driver_type_mask(n) (1 << (n)) #endif /* LINUX_MMC_MMC_H */ PK ! .��/ / mmc/card.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/mmc/card.h * * Card driver specific definitions. */ #ifndef LINUX_MMC_CARD_H #define LINUX_MMC_CARD_H #include <linux/device.h> #include <linux/mod_devicetable.h> struct mmc_cid { unsigned int manfid; char prod_name[8]; unsigned char prv; unsigned int serial; unsigned short oemid; unsigned short year; unsigned char hwrev; unsigned char fwrev; unsigned char month; }; struct mmc_csd { unsigned char structure; unsigned char mmca_vsn; unsigned short cmdclass; unsigned short taac_clks; unsigned int taac_ns; unsigned int c_size; unsigned int r2w_factor; unsigned int max_dtr; unsigned int erase_size; /* In sectors */ unsigned int read_blkbits; unsigned int write_blkbits; unsigned int capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, write_misalign:1, dsr_imp:1; }; struct mmc_ext_csd { u8 rev; u8 erase_group_def; u8 sec_feature_support; u8 rel_sectors; u8 rel_param; bool enhanced_rpmb_supported; u8 part_config; u8 cache_ctrl; u8 rst_n_function; u8 max_packed_writes; u8 max_packed_reads; u8 packed_event_en; unsigned int part_time; /* Units: ms */ unsigned int sa_timeout; /* Units: 100ns */ unsigned int generic_cmd6_time; /* Units: 10ms */ unsigned int power_off_longtime; /* Units: ms */ u8 power_off_notification; /* state */ unsigned int hs_max_dtr; unsigned int hs200_max_dtr; #define MMC_HIGH_26_MAX_DTR 26000000 #define MMC_HIGH_52_MAX_DTR 52000000 #define MMC_HIGH_DDR_MAX_DTR 52000000 #define MMC_HS200_MAX_DTR 200000000 unsigned int sectors; unsigned int hc_erase_size; /* In sectors */ unsigned int hc_erase_timeout; /* In milliseconds */ unsigned int sec_trim_mult; /* Secure trim multiplier */ unsigned int sec_erase_mult; /* Secure erase multiplier */ unsigned int trim_timeout; /* In milliseconds */ bool partition_setting_completed; /* enable bit */ unsigned long long enhanced_area_offset; /* Units: Byte */ unsigned int enhanced_area_size; /* Units: KB */ unsigned int cache_size; /* Units: KB */ bool hpi_en; /* HPI enablebit */ bool hpi; /* HPI support bit */ unsigned int hpi_cmd; /* cmd used as HPI */ bool bkops; /* background support bit */ bool man_bkops_en; /* manual bkops enable bit */ bool auto_bkops_en; /* auto bkops enable bit */ unsigned int data_sector_size; /* 512 bytes or 4KB */ unsigned int data_tag_unit_size; /* DATA TAG UNIT size */ unsigned int boot_ro_lock; /* ro lock support */ bool boot_ro_lockable; bool ffu_capable; /* Firmware upgrade support */ bool cmdq_en; /* Command Queue enabled */ bool cmdq_support; /* Command Queue supported */ unsigned int cmdq_depth; /* Command Queue depth */ #define MMC_FIRMWARE_LEN 8 u8 fwrev[MMC_FIRMWARE_LEN]; /* FW version */ u8 raw_exception_status; /* 54 */ u8 raw_partition_support; /* 160 */ u8 raw_rpmb_size_mult; /* 168 */ u8 raw_erased_mem_count; /* 181 */ u8 strobe_support; /* 184 */ u8 raw_ext_csd_structure; /* 194 */ u8 raw_card_type; /* 196 */ u8 raw_driver_strength; /* 197 */ u8 out_of_int_time; /* 198 */ u8 raw_pwr_cl_52_195; /* 200 */ u8 raw_pwr_cl_26_195; /* 201 */ u8 raw_pwr_cl_52_360; /* 202 */ u8 raw_pwr_cl_26_360; /* 203 */ u8 raw_s_a_timeout; /* 217 */ u8 raw_hc_erase_gap_size; /* 221 */ u8 raw_erase_timeout_mult; /* 223 */ u8 raw_hc_erase_grp_size; /* 224 */ u8 raw_boot_mult; /* 226 */ u8 raw_sec_trim_mult; /* 229 */ u8 raw_sec_erase_mult; /* 230 */ u8 raw_sec_feature_support;/* 231 */ u8 raw_trim_mult; /* 232 */ u8 raw_pwr_cl_200_195; /* 236 */ u8 raw_pwr_cl_200_360; /* 237 */ u8 raw_pwr_cl_ddr_52_195; /* 238 */ u8 raw_pwr_cl_ddr_52_360; /* 239 */ u8 raw_pwr_cl_ddr_200_360; /* 253 */ u8 raw_bkops_status; /* 246 */ u8 raw_sectors[4]; /* 212 - 4 bytes */ u8 pre_eol_info; /* 267 */ u8 device_life_time_est_typ_a; /* 268 */ u8 device_life_time_est_typ_b; /* 269 */ unsigned int feature_support; #define MMC_DISCARD_FEATURE BIT(0) /* CMD38 feature */ }; struct sd_scr { unsigned char sda_vsn; unsigned char sda_spec3; unsigned char sda_spec4; unsigned char sda_specx; unsigned char bus_widths; #define SD_SCR_BUS_WIDTH_1 (1<<0) #define SD_SCR_BUS_WIDTH_4 (1<<2) unsigned char cmds; #define SD_SCR_CMD20_SUPPORT (1<<0) #define SD_SCR_CMD23_SUPPORT (1<<1) #define SD_SCR_CMD48_SUPPORT (1<<2) #define SD_SCR_CMD58_SUPPORT (1<<3) }; struct sd_ssr { unsigned int au; /* In sectors */ unsigned int erase_timeout; /* In milliseconds */ unsigned int erase_offset; /* In milliseconds */ }; struct sd_switch_caps { unsigned int hs_max_dtr; unsigned int uhs_max_dtr; #define HIGH_SPEED_MAX_DTR 50000000 #define UHS_SDR104_MAX_DTR 208000000 #define UHS_SDR50_MAX_DTR 100000000 #define UHS_DDR50_MAX_DTR 50000000 #define UHS_SDR25_MAX_DTR UHS_DDR50_MAX_DTR #define UHS_SDR12_MAX_DTR 25000000 #define DEFAULT_SPEED_MAX_DTR UHS_SDR12_MAX_DTR unsigned int sd3_bus_mode; #define UHS_SDR12_BUS_SPEED 0 #define HIGH_SPEED_BUS_SPEED 1 #define UHS_SDR25_BUS_SPEED 1 #define UHS_SDR50_BUS_SPEED 2 #define UHS_SDR104_BUS_SPEED 3 #define UHS_DDR50_BUS_SPEED 4 #define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED) #define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED) #define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED) #define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED) #define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED) #define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED) unsigned int sd3_drv_type; #define SD_DRIVER_TYPE_B 0x01 #define SD_DRIVER_TYPE_A 0x02 #define SD_DRIVER_TYPE_C 0x04 #define SD_DRIVER_TYPE_D 0x08 unsigned int sd3_curr_limit; #define SD_SET_CURRENT_LIMIT_200 0 #define SD_SET_CURRENT_LIMIT_400 1 #define SD_SET_CURRENT_LIMIT_600 2 #define SD_SET_CURRENT_LIMIT_800 3 #define SD_SET_CURRENT_NO_CHANGE (-1) #define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200) #define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400) #define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600) #define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800) }; struct sd_ext_reg { u8 fno; u8 page; u16 offset; u8 rev; u8 feature_enabled; u8 feature_support; /* Power Management Function. */ #define SD_EXT_POWER_OFF_NOTIFY (1<<0) #define SD_EXT_POWER_SUSTENANCE (1<<1) #define SD_EXT_POWER_DOWN_MODE (1<<2) /* Performance Enhancement Function. */ #define SD_EXT_PERF_FX_EVENT (1<<0) #define SD_EXT_PERF_CARD_MAINT (1<<1) #define SD_EXT_PERF_HOST_MAINT (1<<2) #define SD_EXT_PERF_CACHE (1<<3) #define SD_EXT_PERF_CMD_QUEUE (1<<4) }; struct sdio_cccr { unsigned int sdio_vsn; unsigned int sd_vsn; unsigned int multi_block:1, low_speed:1, wide_bus:1, high_power:1, high_speed:1, disable_cd:1; }; struct sdio_cis { unsigned short vendor; unsigned short device; unsigned short blksize; unsigned int max_dtr; }; struct mmc_host; struct sdio_func; struct sdio_func_tuple; struct mmc_queue_req; #define SDIO_MAX_FUNCS 7 /* The number of MMC physical partitions. These consist of: * boot partitions (2), general purpose partitions (4) and * RPMB partition (1) in MMC v4.4. */ #define MMC_NUM_BOOT_PARTITION 2 #define MMC_NUM_GP_PARTITION 4 #define MMC_NUM_PHY_PARTITION 7 #define MAX_MMC_PART_NAME_LEN 20 /* * MMC Physical partitions */ struct mmc_part { u64 size; /* partition size (in bytes) */ unsigned int part_cfg; /* partition type */ char name[MAX_MMC_PART_NAME_LEN]; bool force_ro; /* to make boot parts RO by default */ unsigned int area_type; #define MMC_BLK_DATA_AREA_MAIN (1<<0) #define MMC_BLK_DATA_AREA_BOOT (1<<1) #define MMC_BLK_DATA_AREA_GP (1<<2) #define MMC_BLK_DATA_AREA_RPMB (1<<3) }; /* * MMC device */ struct mmc_card { struct mmc_host *host; /* the host this device belongs to */ struct device dev; /* the device */ u32 ocr; /* the current OCR setting */ unsigned int rca; /* relative card address of device */ unsigned int type; /* card type */ #define MMC_TYPE_MMC 0 /* MMC card */ #define MMC_TYPE_SD 1 /* SD card */ #define MMC_TYPE_SDIO 2 /* SDIO card */ #define MMC_TYPE_SD_COMBO 3 /* SD combo (IO+mem) card */ unsigned int state; /* (our) card state */ unsigned int quirks; /* card quirks */ unsigned int quirk_max_rate; /* max rate set by quirks */ #define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */ #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */ /* for byte mode */ #define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */ /* (missing CIA registers) */ #define MMC_QUIRK_NONSTD_FUNC_IF (1<<4) /* SDIO card has nonstd function interfaces */ #define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */ #define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */ #define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */ #define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */ /* byte mode */ #define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */ #define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */ #define MMC_QUIRK_BROKEN_IRQ_POLLING (1<<11) /* Polling SDIO_CCCR_INTx could create a fake interrupt */ #define MMC_QUIRK_TRIM_BROKEN (1<<12) /* Skip trim */ #define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */ #define MMC_QUIRK_BROKEN_SD_DISCARD (1<<14) /* Disable broken SD discard support */ bool reenable_cmdq; /* Re-enable Command Queue */ unsigned int erase_size; /* erase size in sectors */ unsigned int erase_shift; /* if erase unit is power 2 */ unsigned int pref_erase; /* in sectors */ unsigned int eg_boundary; /* don't cross erase-group boundaries */ unsigned int erase_arg; /* erase / trim / discard */ u8 erased_byte; /* value of erased bytes */ u32 raw_cid[4]; /* raw card CID */ u32 raw_csd[4]; /* raw card CSD */ u32 raw_scr[2]; /* raw card SCR */ u32 raw_ssr[16]; /* raw card SSR */ struct mmc_cid cid; /* card identification */ struct mmc_csd csd; /* card specific */ struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */ struct sd_scr scr; /* extra SD information */ struct sd_ssr ssr; /* yet more SD information */ struct sd_switch_caps sw_caps; /* switch (CMD6) caps */ struct sd_ext_reg ext_power; /* SD extension reg for PM */ struct sd_ext_reg ext_perf; /* SD extension reg for PERF */ unsigned int sdio_funcs; /* number of SDIO functions */ atomic_t sdio_funcs_probed; /* number of probed SDIO funcs */ struct sdio_cccr cccr; /* common card info */ struct sdio_cis cis; /* common tuple info */ struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */ struct sdio_func *sdio_single_irq; /* SDIO function when only one IRQ active */ u8 major_rev; /* major revision number */ u8 minor_rev; /* minor revision number */ unsigned num_info; /* number of info strings */ const char **info; /* info strings */ struct sdio_func_tuple *tuples; /* unknown common tuples */ unsigned int sd_bus_speed; /* Bus Speed Mode set for the card */ unsigned int mmc_avail_type; /* supported device type by both host and card */ unsigned int drive_strength; /* for UHS-I, HS200 or HS400 */ struct dentry *debugfs_root; struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */ unsigned int nr_parts; struct workqueue_struct *complete_wq; /* Private workqueue */ }; static inline bool mmc_large_sector(struct mmc_card *card) { return card->ext_csd.data_sector_size == 4096; } bool mmc_card_is_blockaddr(struct mmc_card *card); #define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC) #define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD) #define mmc_card_sdio(c) ((c)->type == MMC_TYPE_SDIO) #endif /* LINUX_MMC_CARD_H */ PK ! <��. . mmc/sdio_ids.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * SDIO Classes, Interface Types, Manufacturer IDs, etc. */ #ifndef LINUX_MMC_SDIO_IDS_H #define LINUX_MMC_SDIO_IDS_H /* * Standard SDIO Function Interfaces */ #define SDIO_CLASS_NONE 0x00 /* Not a SDIO standard interface */ #define SDIO_CLASS_UART 0x01 /* standard UART interface */ #define SDIO_CLASS_BT_A 0x02 /* Type-A BlueTooth std interface */ #define SDIO_CLASS_BT_B 0x03 /* Type-B BlueTooth std interface */ #define SDIO_CLASS_GPS 0x04 /* GPS standard interface */ #define SDIO_CLASS_CAMERA 0x05 /* Camera standard interface */ #define SDIO_CLASS_PHS 0x06 /* PHS standard interface */ #define SDIO_CLASS_WLAN 0x07 /* WLAN interface */ #define SDIO_CLASS_ATA 0x08 /* Embedded SDIO-ATA std interface */ #define SDIO_CLASS_BT_AMP 0x09 /* Type-A Bluetooth AMP interface */ /* * Vendors and devices. Sort key: vendor first, device next. */ #define SDIO_VENDOR_ID_STE 0x0020 #define SDIO_DEVICE_ID_STE_CW1200 0x2280 #define SDIO_VENDOR_ID_INTEL 0x0089 #define SDIO_DEVICE_ID_INTEL_IWMC3200WIMAX 0x1402 #define SDIO_DEVICE_ID_INTEL_IWMC3200WIFI 0x1403 #define SDIO_DEVICE_ID_INTEL_IWMC3200TOP 0x1404 #define SDIO_DEVICE_ID_INTEL_IWMC3200GPS 0x1405 #define SDIO_DEVICE_ID_INTEL_IWMC3200BT 0x1406 #define SDIO_DEVICE_ID_INTEL_IWMC3200WIMAX_2G5 0x1407 #define SDIO_VENDOR_ID_CGUYS 0x0092 #define SDIO_DEVICE_ID_CGUYS_EW_CG1102GC 0x0004 #define SDIO_VENDOR_ID_TI 0x0097 #define SDIO_DEVICE_ID_TI_WL1271 0x4076 #define SDIO_VENDOR_ID_ATHEROS 0x0271 #define SDIO_DEVICE_ID_ATHEROS_AR6003_00 0x0300 #define SDIO_DEVICE_ID_ATHEROS_AR6003_01 0x0301 #define SDIO_DEVICE_ID_ATHEROS_AR6004_00 0x0400 #define SDIO_DEVICE_ID_ATHEROS_AR6004_01 0x0401 #define SDIO_DEVICE_ID_ATHEROS_AR6004_02 0x0402 #define SDIO_DEVICE_ID_ATHEROS_AR6004_18 0x0418 #define SDIO_DEVICE_ID_ATHEROS_AR6004_19 0x0419 #define SDIO_DEVICE_ID_ATHEROS_AR6005 0x050A #define SDIO_DEVICE_ID_ATHEROS_QCA9377 0x0701 #define SDIO_VENDOR_ID_BROADCOM 0x02d0 #define SDIO_DEVICE_ID_BROADCOM_NINTENDO_WII 0x044b #define SDIO_DEVICE_ID_BROADCOM_43241 0x4324 #define SDIO_DEVICE_ID_BROADCOM_4329 0x4329 #define SDIO_DEVICE_ID_BROADCOM_4330 0x4330 #define SDIO_DEVICE_ID_BROADCOM_4334 0x4334 #define SDIO_DEVICE_ID_BROADCOM_4335_4339 0x4335 #define SDIO_DEVICE_ID_BROADCOM_4339 0x4339 #define SDIO_DEVICE_ID_BROADCOM_4345 0x4345 #define SDIO_DEVICE_ID_BROADCOM_4354 0x4354 #define SDIO_DEVICE_ID_BROADCOM_CYPRESS_89359 0x4355 #define SDIO_DEVICE_ID_BROADCOM_4356 0x4356 #define SDIO_DEVICE_ID_BROADCOM_4359 0x4359 #define SDIO_DEVICE_ID_BROADCOM_CYPRESS_4373 0x4373 #define SDIO_DEVICE_ID_BROADCOM_CYPRESS_43012 0xa804 #define SDIO_DEVICE_ID_BROADCOM_43143 0xa887 #define SDIO_DEVICE_ID_BROADCOM_43340 0xa94c #define SDIO_DEVICE_ID_BROADCOM_43341 0xa94d #define SDIO_DEVICE_ID_BROADCOM_43362 0xa962 #define SDIO_DEVICE_ID_BROADCOM_43364 0xa9a4 #define SDIO_DEVICE_ID_BROADCOM_43430 0xa9a6 #define SDIO_DEVICE_ID_BROADCOM_43455 0xa9bf #define SDIO_DEVICE_ID_BROADCOM_CYPRESS_43752 0xaae8 #define SDIO_VENDOR_ID_MARVELL 0x02df #define SDIO_DEVICE_ID_MARVELL_LIBERTAS 0x9103 #define SDIO_DEVICE_ID_MARVELL_8688_WLAN 0x9104 #define SDIO_DEVICE_ID_MARVELL_8688_BT 0x9105 #define SDIO_DEVICE_ID_MARVELL_8786_WLAN 0x9116 #define SDIO_DEVICE_ID_MARVELL_8787_WLAN 0x9119 #define SDIO_DEVICE_ID_MARVELL_8787_BT 0x911a #define SDIO_DEVICE_ID_MARVELL_8787_BT_AMP 0x911b #define SDIO_DEVICE_ID_MARVELL_8797_F0 0x9128 #define SDIO_DEVICE_ID_MARVELL_8797_WLAN 0x9129 #define SDIO_DEVICE_ID_MARVELL_8797_BT 0x912a #define SDIO_DEVICE_ID_MARVELL_8897_WLAN 0x912d #define SDIO_DEVICE_ID_MARVELL_8897_BT 0x912e #define SDIO_DEVICE_ID_MARVELL_8887_F0 0x9134 #define SDIO_DEVICE_ID_MARVELL_8887_WLAN 0x9135 #define SDIO_DEVICE_ID_MARVELL_8887_BT 0x9136 #define SDIO_DEVICE_ID_MARVELL_8801_WLAN 0x9139 #define SDIO_DEVICE_ID_MARVELL_8997_F0 0x9140 #define SDIO_DEVICE_ID_MARVELL_8997_WLAN 0x9141 #define SDIO_DEVICE_ID_MARVELL_8997_BT 0x9142 #define SDIO_DEVICE_ID_MARVELL_8977_WLAN 0x9145 #define SDIO_DEVICE_ID_MARVELL_8977_BT 0x9146 #define SDIO_DEVICE_ID_MARVELL_8987_WLAN 0x9149 #define SDIO_DEVICE_ID_MARVELL_8987_BT 0x914a #define SDIO_VENDOR_ID_MEDIATEK 0x037a #define SDIO_DEVICE_ID_MEDIATEK_MT7663 0x7663 #define SDIO_DEVICE_ID_MEDIATEK_MT7668 0x7668 #define SDIO_VENDOR_ID_MICROCHIP_WILC 0x0296 #define SDIO_DEVICE_ID_MICROCHIP_WILC1000 0x5347 #define SDIO_VENDOR_ID_SIANO 0x039a #define SDIO_DEVICE_ID_SIANO_NOVA_B0 0x0201 #define SDIO_DEVICE_ID_SIANO_NICE 0x0202 #define SDIO_DEVICE_ID_SIANO_VEGA_A0 0x0300 #define SDIO_DEVICE_ID_SIANO_VENICE 0x0301 #define SDIO_DEVICE_ID_SIANO_MING 0x0302 #define SDIO_DEVICE_ID_SIANO_PELE 0x0500 #define SDIO_DEVICE_ID_SIANO_RIO 0x0600 #define SDIO_DEVICE_ID_SIANO_DENVER_2160 0x0700 #define SDIO_DEVICE_ID_SIANO_DENVER_1530 0x0800 #define SDIO_DEVICE_ID_SIANO_NOVA_A0 0x1100 #define SDIO_DEVICE_ID_SIANO_STELLAR 0x5347 #define SDIO_VENDOR_ID_RSI 0x041b #define SDIO_DEVICE_ID_RSI_9113 0x9330 #define SDIO_DEVICE_ID_RSI_9116 0x9116 #define SDIO_VENDOR_ID_TI_WL1251 0x104c #define SDIO_DEVICE_ID_TI_WL1251 0x9066 #endif /* LINUX_MMC_SDIO_IDS_H */ PK ! �0!�� � mmc/sh_mmcif.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/mmc/sh_mmcif.h * * platform data for eMMC driver * * Copyright (C) 2010 Renesas Solutions Corp. */ #ifndef LINUX_MMC_SH_MMCIF_H #define LINUX_MMC_SH_MMCIF_H #include <linux/io.h> #include <linux/platform_device.h> /* * MMCIF : CE_CLK_CTRL [19:16] * 1000 : Peripheral clock / 512 * 0111 : Peripheral clock / 256 * 0110 : Peripheral clock / 128 * 0101 : Peripheral clock / 64 * 0100 : Peripheral clock / 32 * 0011 : Peripheral clock / 16 * 0010 : Peripheral clock / 8 * 0001 : Peripheral clock / 4 * 0000 : Peripheral clock / 2 * 1111 : Peripheral clock (sup_pclk set '1') */ struct sh_mmcif_plat_data { unsigned int slave_id_tx; /* embedded slave_id_[tr]x */ unsigned int slave_id_rx; u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */ unsigned long caps; u32 ocr; }; #define MMCIF_CE_CMD_SET 0x00000000 #define MMCIF_CE_ARG 0x00000008 #define MMCIF_CE_ARG_CMD12 0x0000000C #define MMCIF_CE_CMD_CTRL 0x00000010 #define MMCIF_CE_BLOCK_SET 0x00000014 #define MMCIF_CE_CLK_CTRL 0x00000018 #define MMCIF_CE_BUF_ACC 0x0000001C #define MMCIF_CE_RESP3 0x00000020 #define MMCIF_CE_RESP2 0x00000024 #define MMCIF_CE_RESP1 0x00000028 #define MMCIF_CE_RESP0 0x0000002C #define MMCIF_CE_RESP_CMD12 0x00000030 #define MMCIF_CE_DATA 0x00000034 #define MMCIF_CE_INT 0x00000040 #define MMCIF_CE_INT_MASK 0x00000044 #define MMCIF_CE_HOST_STS1 0x00000048 #define MMCIF_CE_HOST_STS2 0x0000004C #define MMCIF_CE_CLK_CTRL2 0x00000070 #define MMCIF_CE_VERSION 0x0000007C /* CE_BUF_ACC */ #define BUF_ACC_DMAWEN (1 << 25) #define BUF_ACC_DMAREN (1 << 24) #define BUF_ACC_BUSW_32 (0 << 17) #define BUF_ACC_BUSW_16 (1 << 17) #define BUF_ACC_ATYP (1 << 16) /* CE_CLK_CTRL */ #define CLK_ENABLE (1 << 24) /* 1: output mmc clock */ #define CLK_CLEAR (0xf << 16) #define CLK_SUP_PCLK (0xf << 16) #define CLKDIV_4 (1 << 16) /* mmc clock frequency. * n: bus clock/(2^(n+1)) */ #define CLKDIV_256 (7 << 16) /* mmc clock frequency. (see above) */ #define SRSPTO_256 (2 << 12) /* resp timeout */ #define SRBSYTO_29 (0xf << 8) /* resp busy timeout */ #define SRWDTO_29 (0xf << 4) /* read/write timeout */ #define SCCSTO_29 (0xf << 0) /* ccs timeout */ /* CE_VERSION */ #define SOFT_RST_ON (1 << 31) #define SOFT_RST_OFF 0 static inline u32 sh_mmcif_readl(void __iomem *addr, int reg) { return __raw_readl(addr + reg); } static inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val) { __raw_writel(val, addr + reg); } #define SH_MMCIF_BBS 512 /* boot block size */ static inline void sh_mmcif_boot_cmd_send(void __iomem *base, unsigned long cmd, unsigned long arg) { sh_mmcif_writel(base, MMCIF_CE_INT, 0); sh_mmcif_writel(base, MMCIF_CE_ARG, arg); sh_mmcif_writel(base, MMCIF_CE_CMD_SET, cmd); } static inline int sh_mmcif_boot_cmd_poll(void __iomem *base, unsigned long mask) { unsigned long tmp; int cnt; for (cnt = 0; cnt < 1000000; cnt++) { tmp = sh_mmcif_readl(base, MMCIF_CE_INT); if (tmp & mask) { sh_mmcif_writel(base, MMCIF_CE_INT, tmp & ~mask); return 0; } } return -1; } static inline int sh_mmcif_boot_cmd(void __iomem *base, unsigned long cmd, unsigned long arg) { sh_mmcif_boot_cmd_send(base, cmd, arg); return sh_mmcif_boot_cmd_poll(base, 0x00010000); } static inline int sh_mmcif_boot_do_read_single(void __iomem *base, unsigned int block_nr, unsigned long *buf) { int k; /* CMD13 - Status */ sh_mmcif_boot_cmd(base, 0x0d400000, 0x00010000); if (sh_mmcif_readl(base, MMCIF_CE_RESP0) != 0x0900) return -1; /* CMD17 - Read */ sh_mmcif_boot_cmd(base, 0x11480000, block_nr * SH_MMCIF_BBS); if (sh_mmcif_boot_cmd_poll(base, 0x00100000) < 0) return -1; for (k = 0; k < (SH_MMCIF_BBS / 4); k++) buf[k] = sh_mmcif_readl(base, MMCIF_CE_DATA); return 0; } static inline int sh_mmcif_boot_do_read(void __iomem *base, unsigned long first_block, unsigned long nr_blocks, void *buf) { unsigned long k; int ret = 0; /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */ sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL, CLK_ENABLE | CLKDIV_4 | SRSPTO_256 | SRBSYTO_29 | SRWDTO_29 | SCCSTO_29); /* CMD9 - Get CSD */ sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000); /* CMD7 - Select the card */ sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000); /* CMD16 - Set the block size */ sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS); for (k = 0; !ret && k < nr_blocks; k++) ret = sh_mmcif_boot_do_read_single(base, first_block + k, buf + (k * SH_MMCIF_BBS)); return ret; } static inline void sh_mmcif_boot_init(void __iomem *base) { /* reset */ sh_mmcif_writel(base, MMCIF_CE_VERSION, SOFT_RST_ON); sh_mmcif_writel(base, MMCIF_CE_VERSION, SOFT_RST_OFF); /* byte swap */ sh_mmcif_writel(base, MMCIF_CE_BUF_ACC, BUF_ACC_ATYP); /* Set block size in MMCIF hardware */ sh_mmcif_writel(base, MMCIF_CE_BLOCK_SET, SH_MMCIF_BBS); /* Enable the clock, set it to Bus clock/256 (about 325Khz). */ sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL, CLK_ENABLE | CLKDIV_256 | SRSPTO_256 | SRBSYTO_29 | SRWDTO_29 | SCCSTO_29); /* CMD0 */ sh_mmcif_boot_cmd(base, 0x00000040, 0); /* CMD1 - Get OCR */ do { sh_mmcif_boot_cmd(base, 0x01405040, 0x40300000); /* CMD1 */ } while ((sh_mmcif_readl(base, MMCIF_CE_RESP0) & 0x80000000) != 0x80000000); /* CMD2 - Get CID */ sh_mmcif_boot_cmd(base, 0x02806040, 0); /* CMD3 - Set card relative address */ sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000); } #endif /* LINUX_MMC_SH_MMCIF_H */ PK ! ��� � mmc/pm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/mmc/pm.h * * Author: Nicolas Pitre * Copyright: (C) 2009 Marvell Technology Group Ltd. */ #ifndef LINUX_MMC_PM_H #define LINUX_MMC_PM_H /* * These flags are used to describe power management features that * some cards (typically SDIO cards) might wish to benefit from when * the host system is being suspended. There are several layers of * abstractions involved, from the host controller driver, to the MMC core * code, to the SDIO core code, to finally get to the actual SDIO function * driver. This file is therefore used for common definitions shared across * all those layers. */ typedef unsigned int mmc_pm_flag_t; #define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */ #define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */ #endif /* LINUX_MMC_PM_H */ PK ! .9h�� � mmc/sdio_func.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/mmc/sdio_func.h * * Copyright 2007-2008 Pierre Ossman */ #ifndef LINUX_MMC_SDIO_FUNC_H #define LINUX_MMC_SDIO_FUNC_H #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/mmc/pm.h> struct mmc_card; struct sdio_func; typedef void (sdio_irq_handler_t)(struct sdio_func *); /* * SDIO function CIS tuple (unknown to the core) */ struct sdio_func_tuple { struct sdio_func_tuple *next; unsigned char code; unsigned char size; unsigned char data[]; }; /* * SDIO function devices */ struct sdio_func { struct mmc_card *card; /* the card this device belongs to */ struct device dev; /* the device */ sdio_irq_handler_t *irq_handler; /* IRQ callback */ unsigned int num; /* function number */ unsigned char class; /* standard interface class */ unsigned short vendor; /* vendor id */ unsigned short device; /* device id */ unsigned max_blksize; /* maximum block size */ unsigned cur_blksize; /* current block size */ unsigned enable_timeout; /* max enable timeout in msec */ unsigned int state; /* function state */ #define SDIO_STATE_PRESENT (1<<0) /* present in sysfs */ u8 *tmpbuf; /* DMA:able scratch buffer */ u8 major_rev; /* major revision number */ u8 minor_rev; /* minor revision number */ unsigned num_info; /* number of info strings */ const char **info; /* info strings */ struct sdio_func_tuple *tuples; }; #define sdio_func_present(f) ((f)->state & SDIO_STATE_PRESENT) #define sdio_func_set_present(f) ((f)->state |= SDIO_STATE_PRESENT) #define sdio_func_id(f) (dev_name(&(f)->dev)) #define sdio_get_drvdata(f) dev_get_drvdata(&(f)->dev) #define sdio_set_drvdata(f,d) dev_set_drvdata(&(f)->dev, d) #define dev_to_sdio_func(d) container_of(d, struct sdio_func, dev) /* * SDIO function device driver */ struct sdio_driver { char *name; const struct sdio_device_id *id_table; int (*probe)(struct sdio_func *, const struct sdio_device_id *); void (*remove)(struct sdio_func *); struct device_driver drv; }; /** * SDIO_DEVICE - macro used to describe a specific SDIO device * @vend: the 16 bit manufacturer code * @dev: the 16 bit function id * * This macro is used to create a struct sdio_device_id that matches a * specific device. The class field will be set to SDIO_ANY_ID. */ #define SDIO_DEVICE(vend,dev) \ .class = SDIO_ANY_ID, \ .vendor = (vend), .device = (dev) /** * SDIO_DEVICE_CLASS - macro used to describe a specific SDIO device class * @dev_class: the 8 bit standard interface code * * This macro is used to create a struct sdio_device_id that matches a * specific standard SDIO function type. The vendor and device fields will * be set to SDIO_ANY_ID. */ #define SDIO_DEVICE_CLASS(dev_class) \ .class = (dev_class), \ .vendor = SDIO_ANY_ID, .device = SDIO_ANY_ID extern int sdio_register_driver(struct sdio_driver *); extern void sdio_unregister_driver(struct sdio_driver *); /** * module_sdio_driver() - Helper macro for registering a SDIO driver * @__sdio_driver: sdio_driver struct * * Helper macro for SDIO drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_sdio_driver(__sdio_driver) \ module_driver(__sdio_driver, sdio_register_driver, \ sdio_unregister_driver) /* * SDIO I/O operations */ extern void sdio_claim_host(struct sdio_func *func); extern void sdio_release_host(struct sdio_func *func); extern int sdio_enable_func(struct sdio_func *func); extern int sdio_disable_func(struct sdio_func *func); extern int sdio_set_block_size(struct sdio_func *func, unsigned blksz); extern int sdio_claim_irq(struct sdio_func *func, sdio_irq_handler_t *handler); extern int sdio_release_irq(struct sdio_func *func); extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz); extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret); extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret); extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret); extern int sdio_memcpy_fromio(struct sdio_func *func, void *dst, unsigned int addr, int count); extern int sdio_readsb(struct sdio_func *func, void *dst, unsigned int addr, int count); extern void sdio_writeb(struct sdio_func *func, u8 b, unsigned int addr, int *err_ret); extern void sdio_writew(struct sdio_func *func, u16 b, unsigned int addr, int *err_ret); extern void sdio_writel(struct sdio_func *func, u32 b, unsigned int addr, int *err_ret); extern u8 sdio_writeb_readb(struct sdio_func *func, u8 write_byte, unsigned int addr, int *err_ret); extern int sdio_memcpy_toio(struct sdio_func *func, unsigned int addr, void *src, int count); extern int sdio_writesb(struct sdio_func *func, unsigned int addr, void *src, int count); extern unsigned char sdio_f0_readb(struct sdio_func *func, unsigned int addr, int *err_ret); extern void sdio_f0_writeb(struct sdio_func *func, unsigned char b, unsigned int addr, int *err_ret); extern mmc_pm_flag_t sdio_get_host_pm_caps(struct sdio_func *func); extern int sdio_set_host_pm_flags(struct sdio_func *func, mmc_pm_flag_t flags); extern void sdio_retune_crc_disable(struct sdio_func *func); extern void sdio_retune_crc_enable(struct sdio_func *func); extern void sdio_retune_hold_now(struct sdio_func *func); extern void sdio_retune_release(struct sdio_func *func); #endif /* LINUX_MMC_SDIO_FUNC_H */ PK ! ��� � mmc/sdhci-pci-data.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_MMC_SDHCI_PCI_DATA_H #define LINUX_MMC_SDHCI_PCI_DATA_H struct pci_dev; struct sdhci_pci_data { struct pci_dev *pdev; int slotno; int rst_n_gpio; /* Set to -EINVAL if unused */ int cd_gpio; /* Set to -EINVAL if unused */ int (*setup)(struct sdhci_pci_data *data); void (*cleanup)(struct sdhci_pci_data *data); }; extern struct sdhci_pci_data *(*sdhci_pci_get_data)(struct pci_dev *pdev, int slotno); #endif PK ! ��*�� � mmc/sd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/mmc/sd.h * * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. */ #ifndef LINUX_MMC_SD_H #define LINUX_MMC_SD_H /* SD commands type argument response */ /* class 0 */ /* This is basically the same command as for MMC with some quirks. */ #define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ /* class 5 */ #define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */ #define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */ /* Application commands */ #define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ #define SD_APP_SD_STATUS 13 /* adtc R1 */ #define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */ #define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ #define SD_APP_SEND_SCR 51 /* adtc R1 */ /* class 11 */ #define SD_READ_EXTR_SINGLE 48 /* adtc [31:0] R1 */ #define SD_WRITE_EXTR_SINGLE 49 /* adtc [31:0] R1 */ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ /* * SD_SWITCH argument format: * * [31] Check (0) or switch (1) * [30:24] Reserved (0) * [23:20] Function group 6 * [19:16] Function group 5 * [15:12] Function group 4 * [11:8] Function group 3 * [7:4] Function group 2 * [3:0] Function group 1 */ /* * SD_SEND_IF_COND argument format: * * [31:12] Reserved (0) * [11:8] Host Voltage Supply Flags * [7:0] Check Pattern (0xAA) */ /* * SCR field definitions */ #define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */ #define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */ #define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */ /* * SD bus widths */ #define SD_BUS_WIDTH_1 0 #define SD_BUS_WIDTH_4 2 /* * SD_SWITCH mode */ #define SD_SWITCH_CHECK 0 #define SD_SWITCH_SET 1 /* * SD_SWITCH function groups */ #define SD_SWITCH_GRP_ACCESS 0 /* * SD_SWITCH access modes */ #define SD_SWITCH_ACCESS_DEF 0 #define SD_SWITCH_ACCESS_HS 1 /* * Erase/discard */ #define SD_ERASE_ARG 0x00000000 #define SD_DISCARD_ARG 0x00000001 #endif /* LINUX_MMC_SD_H */ PK ! �t�7� � mmc/sdio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/mmc/sdio.h * * Copyright 2006-2007 Pierre Ossman */ #ifndef LINUX_MMC_SDIO_H #define LINUX_MMC_SDIO_H /* SDIO commands type argument response */ #define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */ #define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */ #define SD_IO_RW_EXTENDED 53 /* adtc [31:0] See below R5 */ /* * SD_IO_RW_DIRECT argument format: * * [31] R/W flag * [30:28] Function number * [27] RAW flag * [25:9] Register address * [7:0] Data */ /* * SD_IO_RW_EXTENDED argument format: * * [31] R/W flag * [30:28] Function number * [27] Block mode * [26] Increment address * [25:9] Register address * [8:0] Byte/block count */ #define R4_18V_PRESENT (1<<24) #define R4_MEMORY_PRESENT (1 << 27) /* SDIO status in R5 Type e : error bit s : status bit r : detected and set for the actual command response x : detected and set during command execution. the host must poll the card by sending status command in order to read these bits. Clear condition a : according to the card state b : always related to the previous command. Reception of a valid command will clear it (with a delay of one command) c : clear by read */ #define R5_COM_CRC_ERROR (1 << 15) /* er, b */ #define R5_ILLEGAL_COMMAND (1 << 14) /* er, b */ #define R5_ERROR (1 << 11) /* erx, c */ #define R5_FUNCTION_NUMBER (1 << 9) /* er, c */ #define R5_OUT_OF_RANGE (1 << 8) /* er, c */ #define R5_STATUS(x) (x & 0xCB00) #define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) /* s, b */ /* * Card Common Control Registers (CCCR) */ #define SDIO_CCCR_CCCR 0x00 #define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */ #define SDIO_CCCR_REV_1_10 1 /* CCCR/FBR Version 1.10 */ #define SDIO_CCCR_REV_1_20 2 /* CCCR/FBR Version 1.20 */ #define SDIO_CCCR_REV_3_00 3 /* CCCR/FBR Version 3.00 */ #define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */ #define SDIO_SDIO_REV_1_10 1 /* SDIO Spec Version 1.10 */ #define SDIO_SDIO_REV_1_20 2 /* SDIO Spec Version 1.20 */ #define SDIO_SDIO_REV_2_00 3 /* SDIO Spec Version 2.00 */ #define SDIO_SDIO_REV_3_00 4 /* SDIO Spec Version 3.00 */ #define SDIO_CCCR_SD 0x01 #define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */ #define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */ #define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */ #define SDIO_SD_REV_3_00 3 /* SD Physical Spec Version 3.00 */ #define SDIO_CCCR_IOEx 0x02 #define SDIO_CCCR_IORx 0x03 #define SDIO_CCCR_IENx 0x04 /* Function/Master Interrupt Enable */ #define SDIO_CCCR_INTx 0x05 /* Function Interrupt Pending */ #define SDIO_CCCR_ABORT 0x06 /* function abort/card reset */ #define SDIO_CCCR_IF 0x07 /* bus interface controls */ #define SDIO_BUS_WIDTH_MASK 0x03 /* data bus width setting */ #define SDIO_BUS_WIDTH_1BIT 0x00 #define SDIO_BUS_WIDTH_RESERVED 0x01 #define SDIO_BUS_WIDTH_4BIT 0x02 #define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */ #define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */ #define SDIO_BUS_ASYNC_INT 0x20 #define SDIO_BUS_CD_DISABLE 0x80 /* disable pull-up on DAT3 (pin 1) */ #define SDIO_CCCR_CAPS 0x08 #define SDIO_CCCR_CAP_SDC 0x01 /* can do CMD52 while data transfer */ #define SDIO_CCCR_CAP_SMB 0x02 /* can do multi-block xfers (CMD53) */ #define SDIO_CCCR_CAP_SRW 0x04 /* supports read-wait protocol */ #define SDIO_CCCR_CAP_SBS 0x08 /* supports suspend/resume */ #define SDIO_CCCR_CAP_S4MI 0x10 /* interrupt during 4-bit CMD53 */ #define SDIO_CCCR_CAP_E4MI 0x20 /* enable ints during 4-bit CMD53 */ #define SDIO_CCCR_CAP_LSC 0x40 /* low speed card */ #define SDIO_CCCR_CAP_4BLS 0x80 /* 4 bit low speed card */ #define SDIO_CCCR_CIS 0x09 /* common CIS pointer (3 bytes) */ /* Following 4 regs are valid only if SBS is set */ #define SDIO_CCCR_SUSPEND 0x0c #define SDIO_CCCR_SELx 0x0d #define SDIO_CCCR_EXECx 0x0e #define SDIO_CCCR_READYx 0x0f #define SDIO_CCCR_BLKSIZE 0x10 #define SDIO_CCCR_POWER 0x12 #define SDIO_POWER_SMPC 0x01 /* Supports Master Power Control */ #define SDIO_POWER_EMPC 0x02 /* Enable Master Power Control */ #define SDIO_CCCR_SPEED 0x13 #define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */ #define SDIO_SPEED_BSS_SHIFT 1 #define SDIO_SPEED_BSS_MASK (7<<SDIO_SPEED_BSS_SHIFT) #define SDIO_SPEED_SDR12 (0<<SDIO_SPEED_BSS_SHIFT) #define SDIO_SPEED_SDR25 (1<<SDIO_SPEED_BSS_SHIFT) #define SDIO_SPEED_SDR50 (2<<SDIO_SPEED_BSS_SHIFT) #define SDIO_SPEED_SDR104 (3<<SDIO_SPEED_BSS_SHIFT) #define SDIO_SPEED_DDR50 (4<<SDIO_SPEED_BSS_SHIFT) #define SDIO_SPEED_EHS SDIO_SPEED_SDR25 /* Enable High-Speed */ #define SDIO_CCCR_UHS 0x14 #define SDIO_UHS_SDR50 0x01 #define SDIO_UHS_SDR104 0x02 #define SDIO_UHS_DDR50 0x04 #define SDIO_CCCR_DRIVE_STRENGTH 0x15 #define SDIO_SDTx_MASK 0x07 #define SDIO_DRIVE_SDTA (1<<0) #define SDIO_DRIVE_SDTC (1<<1) #define SDIO_DRIVE_SDTD (1<<2) #define SDIO_DRIVE_DTSx_MASK 0x03 #define SDIO_DRIVE_DTSx_SHIFT 4 #define SDIO_DTSx_SET_TYPE_B (0 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_A (1 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_C (2 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_D (3 << SDIO_DRIVE_DTSx_SHIFT) /* * Function Basic Registers (FBR) */ #define SDIO_FBR_BASE(f) ((f) * 0x100) /* base of function f's FBRs */ #define SDIO_FBR_STD_IF 0x00 #define SDIO_FBR_SUPPORTS_CSA 0x40 /* supports Code Storage Area */ #define SDIO_FBR_ENABLE_CSA 0x80 /* enable Code Storage Area */ #define SDIO_FBR_STD_IF_EXT 0x01 #define SDIO_FBR_POWER 0x02 #define SDIO_FBR_POWER_SPS 0x01 /* Supports Power Selection */ #define SDIO_FBR_POWER_EPS 0x02 /* Enable (low) Power Selection */ #define SDIO_FBR_CIS 0x09 /* CIS pointer (3 bytes) */ #define SDIO_FBR_CSA 0x0C /* CSA pointer (3 bytes) */ #define SDIO_FBR_CSA_DATA 0x0F #define SDIO_FBR_BLKSIZE 0x10 /* block size (2 bytes) */ #endif /* LINUX_MMC_SDIO_H */ PK ! Mܔ�� � mmc/core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/mmc/core.h */ #ifndef LINUX_MMC_CORE_H #define LINUX_MMC_CORE_H #include <linux/completion.h> #include <linux/types.h> struct mmc_data; struct mmc_request; enum mmc_blk_status { MMC_BLK_SUCCESS = 0, MMC_BLK_PARTIAL, MMC_BLK_CMD_ERR, MMC_BLK_RETRY, MMC_BLK_ABORT, MMC_BLK_DATA_ERR, MMC_BLK_ECC_ERR, MMC_BLK_NOMEDIUM, MMC_BLK_NEW_REQUEST, }; struct mmc_command { u32 opcode; u32 arg; #define MMC_CMD23_ARG_REL_WR (1 << 31) #define MMC_CMD23_ARG_PACKED ((0 << 31) | (1 << 30)) #define MMC_CMD23_ARG_TAG_REQ (1 << 29) u32 resp[4]; unsigned int flags; /* expected response type */ #define MMC_RSP_PRESENT (1 << 0) #define MMC_RSP_136 (1 << 1) /* 136 bit response */ #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ #define MMC_CMD_MASK (3 << 5) /* non-SPI command type */ #define MMC_CMD_AC (0 << 5) #define MMC_CMD_ADTC (1 << 5) #define MMC_CMD_BC (2 << 5) #define MMC_CMD_BCR (3 << 5) #define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */ #define MMC_RSP_SPI_S2 (1 << 8) /* second byte */ #define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */ #define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */ /* * These are the native response types, and correspond to valid bit * patterns of the above flags. One additional valid pattern * is all zeros, which means we don't expect a response. */ #define MMC_RSP_NONE (0) #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY) #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) #define MMC_RSP_R4 (MMC_RSP_PRESENT) #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) /* Can be used by core to poll after switch to MMC HS mode */ #define MMC_RSP_R1_NO_CRC (MMC_RSP_PRESENT|MMC_RSP_OPCODE) #define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE)) /* * These are the SPI response types for MMC, SD, and SDIO cards. * Commands return R1, with maybe more info. Zero is an error type; * callers must always provide the appropriate MMC_RSP_SPI_Rx flags. */ #define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1) #define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY) #define MMC_RSP_SPI_R2 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2) #define MMC_RSP_SPI_R3 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4) #define MMC_RSP_SPI_R4 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4) #define MMC_RSP_SPI_R5 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2) #define MMC_RSP_SPI_R7 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4) #define mmc_spi_resp_type(cmd) ((cmd)->flags & \ (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY|MMC_RSP_SPI_S2|MMC_RSP_SPI_B4)) /* * These are the command types. */ #define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK) unsigned int retries; /* max number of retries */ int error; /* command error */ /* * Standard errno values are used for errors, but some have specific * meaning in the MMC layer: * * ETIMEDOUT Card took too long to respond * EILSEQ Basic format problem with the received or sent data * (e.g. CRC check failed, incorrect opcode in response * or bad end bit) * EINVAL Request cannot be performed because of restrictions * in hardware and/or the driver * ENOMEDIUM Host can determine that the slot is empty and is * actively failing requests */ unsigned int busy_timeout; /* busy detect timeout in ms */ struct mmc_data *data; /* data segment associated with cmd */ struct mmc_request *mrq; /* associated request */ }; struct mmc_data { unsigned int timeout_ns; /* data timeout (in ns, max 80ms) */ unsigned int timeout_clks; /* data timeout (in clocks) */ unsigned int blksz; /* data block size */ unsigned int blocks; /* number of blocks */ unsigned int blk_addr; /* block address */ int error; /* data error */ unsigned int flags; #define MMC_DATA_WRITE BIT(8) #define MMC_DATA_READ BIT(9) /* Extra flags used by CQE */ #define MMC_DATA_QBR BIT(10) /* CQE queue barrier*/ #define MMC_DATA_PRIO BIT(11) /* CQE high priority */ #define MMC_DATA_REL_WR BIT(12) /* Reliable write */ #define MMC_DATA_DAT_TAG BIT(13) /* Tag request */ #define MMC_DATA_FORCED_PRG BIT(14) /* Forced programming */ unsigned int bytes_xfered; struct mmc_command *stop; /* stop command */ struct mmc_request *mrq; /* associated request */ unsigned int sg_len; /* size of scatter list */ int sg_count; /* mapped sg entries */ struct scatterlist *sg; /* I/O scatter list */ s32 host_cookie; /* host private data */ }; struct mmc_host; struct mmc_request { struct mmc_command *sbc; /* SET_BLOCK_COUNT for multiblock */ struct mmc_command *cmd; struct mmc_data *data; struct mmc_command *stop; struct completion completion; struct completion cmd_completion; void (*done)(struct mmc_request *);/* completion function */ /* * Notify uppers layers (e.g. mmc block driver) that recovery is needed * due to an error associated with the mmc_request. Currently used only * by CQE. */ void (*recovery_notifier)(struct mmc_request *); struct mmc_host *host; /* Allow other commands during this ongoing data transfer or busy wait */ bool cap_cmd_during_tfr; int tag; #ifdef CONFIG_MMC_CRYPTO const struct bio_crypt_ctx *crypto_ctx; int crypto_key_slot; #endif }; struct mmc_card; void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq); int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries); int mmc_hw_reset(struct mmc_host *host); int mmc_sw_reset(struct mmc_host *host); void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card); #endif /* LINUX_MMC_CORE_H */ PK ! ���� � mmc/slot-gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Generic GPIO card-detect helper header * * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> */ #ifndef MMC_SLOT_GPIO_H #define MMC_SLOT_GPIO_H #include <linux/types.h> #include <linux/irqreturn.h> struct mmc_host; int mmc_gpio_get_ro(struct mmc_host *host); int mmc_gpio_get_cd(struct mmc_host *host); int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id, unsigned int idx, bool override_active_level, unsigned int debounce); int mmc_gpiod_request_ro(struct mmc_host *host, const char *con_id, unsigned int idx, unsigned int debounce); int mmc_gpiod_set_cd_config(struct mmc_host *host, unsigned long config); void mmc_gpio_set_cd_isr(struct mmc_host *host, irqreturn_t (*isr)(int irq, void *dev_id)); int mmc_gpio_set_cd_wake(struct mmc_host *host, bool on); void mmc_gpiod_request_cd_irq(struct mmc_host *host); bool mmc_can_gpio_cd(struct mmc_host *host); bool mmc_can_gpio_ro(struct mmc_host *host); #endif PK ! �P~W W btf_ids.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BTF_IDS_H #define _LINUX_BTF_IDS_H struct btf_id_set { u32 cnt; u32 ids[]; }; #ifdef CONFIG_DEBUG_INFO_BTF #include <linux/compiler.h> /* for __PASTE */ /* * Following macros help to define lists of BTF IDs placed * in .BTF_ids section. They are initially filled with zeros * (during compilation) and resolved later during the * linking phase by resolve_btfids tool. * * Any change in list layout must be reflected in resolve_btfids * tool logic. */ #define BTF_IDS_SECTION ".BTF_ids" #define ____BTF_ID(symbol) \ asm( \ ".pushsection " BTF_IDS_SECTION ",\"a\"; \n" \ ".local " #symbol " ; \n" \ ".type " #symbol ", STT_OBJECT; \n" \ ".size " #symbol ", 4; \n" \ #symbol ": \n" \ ".zero 4 \n" \ ".popsection; \n"); #define __BTF_ID(symbol) \ ____BTF_ID(symbol) #define __ID(prefix) \ __PASTE(__PASTE(prefix, __COUNTER__), __LINE__) /* * The BTF_ID defines unique symbol for each ID pointing * to 4 zero bytes. */ #define BTF_ID(prefix, name) \ __BTF_ID(__ID(__BTF_ID__##prefix##__##name##__)) /* * The BTF_ID_LIST macro defines pure (unsorted) list * of BTF IDs, with following layout: * * BTF_ID_LIST(list1) * BTF_ID(type1, name1) * BTF_ID(type2, name2) * * list1: * __BTF_ID__type1__name1__1: * .zero 4 * __BTF_ID__type2__name2__2: * .zero 4 * */ #define __BTF_ID_LIST(name, scope) \ asm( \ ".pushsection " BTF_IDS_SECTION ",\"a\"; \n" \ "." #scope " " #name "; \n" \ #name ":; \n" \ ".popsection; \n"); #define BTF_ID_LIST(name) \ __BTF_ID_LIST(name, local) \ extern u32 name[]; #define BTF_ID_LIST_GLOBAL(name) \ __BTF_ID_LIST(name, globl) /* The BTF_ID_LIST_SINGLE macro defines a BTF_ID_LIST with * a single entry. */ #define BTF_ID_LIST_SINGLE(name, prefix, typename) \ BTF_ID_LIST(name) \ BTF_ID(prefix, typename) #define BTF_ID_LIST_GLOBAL_SINGLE(name, prefix, typename) \ BTF_ID_LIST_GLOBAL(name) \ BTF_ID(prefix, typename) /* * The BTF_ID_UNUSED macro defines 4 zero bytes. * It's used when we want to define 'unused' entry * in BTF_ID_LIST, like: * * BTF_ID_LIST(bpf_skb_output_btf_ids) * BTF_ID(struct, sk_buff) * BTF_ID_UNUSED * BTF_ID(struct, task_struct) */ #define BTF_ID_UNUSED \ asm( \ ".pushsection " BTF_IDS_SECTION ",\"a\"; \n" \ ".zero 4 \n" \ ".popsection; \n"); /* * The BTF_SET_START/END macros pair defines sorted list of * BTF IDs plus its members count, with following layout: * * BTF_SET_START(list) * BTF_ID(type1, name1) * BTF_ID(type2, name2) * BTF_SET_END(list) * * __BTF_ID__set__list: * .zero 4 * list: * __BTF_ID__type1__name1__3: * .zero 4 * __BTF_ID__type2__name2__4: * .zero 4 * */ #define __BTF_SET_START(name, scope) \ asm( \ ".pushsection " BTF_IDS_SECTION ",\"a\"; \n" \ "." #scope " __BTF_ID__set__" #name "; \n" \ "__BTF_ID__set__" #name ":; \n" \ ".zero 4 \n" \ ".popsection; \n"); #define BTF_SET_START(name) \ __BTF_ID_LIST(name, local) \ __BTF_SET_START(name, local) #define BTF_SET_START_GLOBAL(name) \ __BTF_ID_LIST(name, globl) \ __BTF_SET_START(name, globl) #define BTF_SET_END(name) \ asm( \ ".pushsection " BTF_IDS_SECTION ",\"a\"; \n" \ ".size __BTF_ID__set__" #name ", .-" #name " \n" \ ".popsection; \n"); \ extern struct btf_id_set name; #else #define BTF_ID_LIST(name) static u32 name[5]; #define BTF_ID(prefix, name) #define BTF_ID_UNUSED #define BTF_ID_LIST_GLOBAL(name) u32 name[1]; #define BTF_ID_LIST_SINGLE(name, prefix, typename) static u32 name[1]; #define BTF_ID_LIST_GLOBAL_SINGLE(name, prefix, typename) u32 name[1]; #define BTF_SET_START(name) static struct btf_id_set name = { 0 }; #define BTF_SET_START_GLOBAL(name) static struct btf_id_set name = { 0 }; #define BTF_SET_END(name) #endif /* CONFIG_DEBUG_INFO_BTF */ #ifdef CONFIG_NET /* Define a list of socket types which can be the argument for * skc_to_*_sock() helpers. All these sockets should have * sock_common as the first argument in its memory layout. */ #define BTF_SOCK_TYPE_xxx \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_INET, inet_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_INET_CONN, inet_connection_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_INET_REQ, inet_request_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_INET_TW, inet_timewait_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_REQ, request_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_SOCK, sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_SOCK_COMMON, sock_common) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_TCP, tcp_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_TCP_REQ, tcp_request_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_TCP_TW, tcp_timewait_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_TCP6, tcp6_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_UDP, udp_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_UDP6, udp6_sock) \ BTF_SOCK_TYPE(BTF_SOCK_TYPE_UNIX, unix_sock) enum { #define BTF_SOCK_TYPE(name, str) name, BTF_SOCK_TYPE_xxx #undef BTF_SOCK_TYPE MAX_BTF_SOCK_TYPE, }; extern u32 btf_sock_ids[]; #endif extern u32 btf_task_struct_ids[]; #endif PK ! %��� � node.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/node.h - generic node definition * * This is mainly for topological representation. We define the * basic 'struct node' here, which can be embedded in per-arch * definitions of processors. * * Basic handling of the devices is done in drivers/base/node.c * and system devices are handled in drivers/base/sys.c. * * Nodes are exported via driverfs in the class/node/devices/ * directory. */ #ifndef _LINUX_NODE_H_ #define _LINUX_NODE_H_ #include <linux/device.h> #include <linux/cpumask.h> #include <linux/list.h> #include <linux/workqueue.h> /** * struct node_hmem_attrs - heterogeneous memory performance attributes * * @read_bandwidth: Read bandwidth in MB/s * @write_bandwidth: Write bandwidth in MB/s * @read_latency: Read latency in nanoseconds * @write_latency: Write latency in nanoseconds */ struct node_hmem_attrs { unsigned int read_bandwidth; unsigned int write_bandwidth; unsigned int read_latency; unsigned int write_latency; }; enum cache_indexing { NODE_CACHE_DIRECT_MAP, NODE_CACHE_INDEXED, NODE_CACHE_OTHER, }; enum cache_write_policy { NODE_CACHE_WRITE_BACK, NODE_CACHE_WRITE_THROUGH, NODE_CACHE_WRITE_OTHER, }; /** * struct node_cache_attrs - system memory caching attributes * * @indexing: The ways memory blocks may be placed in cache * @write_policy: Write back or write through policy * @size: Total size of cache in bytes * @line_size: Number of bytes fetched on a cache miss * @level: The cache hierarchy level */ struct node_cache_attrs { enum cache_indexing indexing; enum cache_write_policy write_policy; u64 size; u16 line_size; u8 level; }; #ifdef CONFIG_HMEM_REPORTING void node_add_cache(unsigned int nid, struct node_cache_attrs *cache_attrs); void node_set_perf_attrs(unsigned int nid, struct node_hmem_attrs *hmem_attrs, unsigned access); #else static inline void node_add_cache(unsigned int nid, struct node_cache_attrs *cache_attrs) { } static inline void node_set_perf_attrs(unsigned int nid, struct node_hmem_attrs *hmem_attrs, unsigned access) { } #endif struct node { struct device dev; struct list_head access_list; #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HUGETLBFS) struct work_struct node_work; #endif #ifdef CONFIG_HMEM_REPORTING struct list_head cache_attrs; struct device *cache_dev; #endif }; struct memory_block; extern struct node *node_devices[]; typedef void (*node_registration_func_t)(struct node *); #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_NUMA) void link_mem_sections(int nid, unsigned long start_pfn, unsigned long end_pfn, enum meminit_context context); #else static inline void link_mem_sections(int nid, unsigned long start_pfn, unsigned long end_pfn, enum meminit_context context) { } #endif extern void unregister_node(struct node *node); #ifdef CONFIG_NUMA /* Core of the node registration - only memory hotplug should use this */ extern int __register_one_node(int nid); /* Registers an online node */ static inline int register_one_node(int nid) { int error = 0; if (node_online(nid)) { struct pglist_data *pgdat = NODE_DATA(nid); unsigned long start_pfn = pgdat->node_start_pfn; unsigned long end_pfn = start_pfn + pgdat->node_spanned_pages; error = __register_one_node(nid); if (error) return error; /* link memory sections under this node */ link_mem_sections(nid, start_pfn, end_pfn, MEMINIT_EARLY); } return error; } extern void unregister_one_node(int nid); extern int register_cpu_under_node(unsigned int cpu, unsigned int nid); extern int unregister_cpu_under_node(unsigned int cpu, unsigned int nid); extern void unregister_memory_block_under_nodes(struct memory_block *mem_blk); extern int register_memory_node_under_compute_node(unsigned int mem_nid, unsigned int cpu_nid, unsigned access); #ifdef CONFIG_HUGETLBFS extern void register_hugetlbfs_with_node(node_registration_func_t doregister, node_registration_func_t unregister); #endif #else static inline int __register_one_node(int nid) { return 0; } static inline int register_one_node(int nid) { return 0; } static inline int unregister_one_node(int nid) { return 0; } static inline int register_cpu_under_node(unsigned int cpu, unsigned int nid) { return 0; } static inline int unregister_cpu_under_node(unsigned int cpu, unsigned int nid) { return 0; } static inline void unregister_memory_block_under_nodes(struct memory_block *mem_blk) { } static inline void register_hugetlbfs_with_node(node_registration_func_t reg, node_registration_func_t unreg) { } #endif #define to_node(device) container_of(device, struct node, dev) #endif /* _LINUX_NODE_H_ */ PK ! ��iM M scs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Shadow Call Stack support. * * Copyright (C) 2019 Google LLC */ #ifndef _LINUX_SCS_H #define _LINUX_SCS_H #include <linux/gfp.h> #include <linux/poison.h> #include <linux/sched.h> #include <linux/sizes.h> #ifdef CONFIG_SHADOW_CALL_STACK #define SCS_ORDER 0 #define SCS_SIZE (PAGE_SIZE << SCS_ORDER) #define GFP_SCS (GFP_KERNEL | __GFP_ZERO) /* An illegal pointer value to mark the end of the shadow stack. */ #define SCS_END_MAGIC (0x5f6UL + POISON_POINTER_DELTA) #define task_scs(tsk) (task_thread_info(tsk)->scs_base) #define task_scs_sp(tsk) (task_thread_info(tsk)->scs_sp) void *scs_alloc(int node); void scs_free(void *s); void scs_init(void); int scs_prepare(struct task_struct *tsk, int node); void scs_release(struct task_struct *tsk); static inline void scs_task_reset(struct task_struct *tsk) { /* * Reset the shadow stack to the base address in case the task * is reused. */ task_scs_sp(tsk) = task_scs(tsk); } static inline unsigned long *__scs_magic(void *s) { return (unsigned long *)(s + SCS_SIZE) - 1; } static inline bool task_scs_end_corrupted(struct task_struct *tsk) { unsigned long *magic = __scs_magic(task_scs(tsk)); unsigned long sz = task_scs_sp(tsk) - task_scs(tsk); return sz >= SCS_SIZE - 1 || READ_ONCE_NOCHECK(*magic) != SCS_END_MAGIC; } #else /* CONFIG_SHADOW_CALL_STACK */ static inline void *scs_alloc(int node) { return NULL; } static inline void scs_free(void *s) {} static inline void scs_init(void) {} static inline void scs_task_reset(struct task_struct *tsk) {} static inline int scs_prepare(struct task_struct *tsk, int node) { return 0; } static inline void scs_release(struct task_struct *tsk) {} static inline bool task_scs_end_corrupted(struct task_struct *tsk) { return false; } #endif /* CONFIG_SHADOW_CALL_STACK */ #endif /* _LINUX_SCS_H */ PK ! ��%�] ] siphash.hnu �[��� /* Copyright (C) 2016 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved. * * This file is provided under a dual BSD/GPLv2 license. * * SipHash: a fast short-input PRF * https://131002.net/siphash/ * * This implementation is specifically for SipHash2-4 for a secure PRF * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for * hashtables. */ #ifndef _LINUX_SIPHASH_H #define _LINUX_SIPHASH_H #include <linux/types.h> #include <linux/kernel.h> #define SIPHASH_ALIGNMENT __alignof__(u64) typedef struct { u64 key[2]; } siphash_key_t; static inline bool siphash_key_is_zero(const siphash_key_t *key) { return !(key->key[0] | key->key[1]); } u64 __siphash_aligned(const void *data, size_t len, const siphash_key_t *key); u64 __siphash_unaligned(const void *data, size_t len, const siphash_key_t *key); u64 siphash_1u64(const u64 a, const siphash_key_t *key); u64 siphash_2u64(const u64 a, const u64 b, const siphash_key_t *key); u64 siphash_3u64(const u64 a, const u64 b, const u64 c, const siphash_key_t *key); u64 siphash_4u64(const u64 a, const u64 b, const u64 c, const u64 d, const siphash_key_t *key); u64 siphash_1u32(const u32 a, const siphash_key_t *key); u64 siphash_3u32(const u32 a, const u32 b, const u32 c, const siphash_key_t *key); static inline u64 siphash_2u32(const u32 a, const u32 b, const siphash_key_t *key) { return siphash_1u64((u64)b << 32 | a, key); } static inline u64 siphash_4u32(const u32 a, const u32 b, const u32 c, const u32 d, const siphash_key_t *key) { return siphash_2u64((u64)b << 32 | a, (u64)d << 32 | c, key); } static inline u64 ___siphash_aligned(const __le64 *data, size_t len, const siphash_key_t *key) { if (__builtin_constant_p(len) && len == 4) return siphash_1u32(le32_to_cpup((const __le32 *)data), key); if (__builtin_constant_p(len) && len == 8) return siphash_1u64(le64_to_cpu(data[0]), key); if (__builtin_constant_p(len) && len == 16) return siphash_2u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), key); if (__builtin_constant_p(len) && len == 24) return siphash_3u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), le64_to_cpu(data[2]), key); if (__builtin_constant_p(len) && len == 32) return siphash_4u64(le64_to_cpu(data[0]), le64_to_cpu(data[1]), le64_to_cpu(data[2]), le64_to_cpu(data[3]), key); return __siphash_aligned(data, len, key); } /** * siphash - compute 64-bit siphash PRF value * @data: buffer to hash * @size: size of @data * @key: the siphash key */ static inline u64 siphash(const void *data, size_t len, const siphash_key_t *key) { if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || !IS_ALIGNED((unsigned long)data, SIPHASH_ALIGNMENT)) return __siphash_unaligned(data, len, key); return ___siphash_aligned(data, len, key); } #define HSIPHASH_ALIGNMENT __alignof__(unsigned long) typedef struct { unsigned long key[2]; } hsiphash_key_t; u32 __hsiphash_aligned(const void *data, size_t len, const hsiphash_key_t *key); u32 __hsiphash_unaligned(const void *data, size_t len, const hsiphash_key_t *key); u32 hsiphash_1u32(const u32 a, const hsiphash_key_t *key); u32 hsiphash_2u32(const u32 a, const u32 b, const hsiphash_key_t *key); u32 hsiphash_3u32(const u32 a, const u32 b, const u32 c, const hsiphash_key_t *key); u32 hsiphash_4u32(const u32 a, const u32 b, const u32 c, const u32 d, const hsiphash_key_t *key); static inline u32 ___hsiphash_aligned(const __le32 *data, size_t len, const hsiphash_key_t *key) { if (__builtin_constant_p(len) && len == 4) return hsiphash_1u32(le32_to_cpu(data[0]), key); if (__builtin_constant_p(len) && len == 8) return hsiphash_2u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), key); if (__builtin_constant_p(len) && len == 12) return hsiphash_3u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), le32_to_cpu(data[2]), key); if (__builtin_constant_p(len) && len == 16) return hsiphash_4u32(le32_to_cpu(data[0]), le32_to_cpu(data[1]), le32_to_cpu(data[2]), le32_to_cpu(data[3]), key); return __hsiphash_aligned(data, len, key); } /** * hsiphash - compute 32-bit hsiphash PRF value * @data: buffer to hash * @size: size of @data * @key: the hsiphash key */ static inline u32 hsiphash(const void *data, size_t len, const hsiphash_key_t *key) { if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || !IS_ALIGNED((unsigned long)data, HSIPHASH_ALIGNMENT)) return __hsiphash_unaligned(data, len, key); return ___hsiphash_aligned(data, len, key); } /* * These macros expose the raw SipHash and HalfSipHash permutations. * Do not use them directly! If you think you have a use for them, * be sure to CC the maintainer of this file explaining why. */ #define SIPHASH_PERMUTATION(a, b, c, d) ( \ (a) += (b), (b) = rol64((b), 13), (b) ^= (a), (a) = rol64((a), 32), \ (c) += (d), (d) = rol64((d), 16), (d) ^= (c), \ (a) += (d), (d) = rol64((d), 21), (d) ^= (a), \ (c) += (b), (b) = rol64((b), 17), (b) ^= (c), (c) = rol64((c), 32)) #define SIPHASH_CONST_0 0x736f6d6570736575ULL #define SIPHASH_CONST_1 0x646f72616e646f6dULL #define SIPHASH_CONST_2 0x6c7967656e657261ULL #define SIPHASH_CONST_3 0x7465646279746573ULL #define HSIPHASH_PERMUTATION(a, b, c, d) ( \ (a) += (b), (b) = rol32((b), 5), (b) ^= (a), (a) = rol32((a), 16), \ (c) += (d), (d) = rol32((d), 8), (d) ^= (c), \ (a) += (d), (d) = rol32((d), 7), (d) ^= (a), \ (c) += (b), (b) = rol32((b), 13), (b) ^= (c), (c) = rol32((c), 16)) #define HSIPHASH_CONST_0 0U #define HSIPHASH_CONST_1 0U #define HSIPHASH_CONST_2 0x6c796765U #define HSIPHASH_CONST_3 0x74656462U #endif /* _LINUX_SIPHASH_H */ PK ! ���G* * fs_struct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FS_STRUCT_H #define _LINUX_FS_STRUCT_H #include <linux/path.h> #include <linux/spinlock.h> #include <linux/seqlock.h> struct fs_struct { int users; spinlock_t lock; seqcount_spinlock_t seq; int umask; int in_exec; struct path root, pwd; } __randomize_layout; extern struct kmem_cache *fs_cachep; extern void exit_fs(struct task_struct *); extern void set_fs_root(struct fs_struct *, const struct path *); extern void set_fs_pwd(struct fs_struct *, const struct path *); extern struct fs_struct *copy_fs_struct(struct fs_struct *); extern void free_fs_struct(struct fs_struct *); extern int unshare_fs_struct(void); static inline void get_fs_root(struct fs_struct *fs, struct path *root) { spin_lock(&fs->lock); *root = fs->root; path_get(root); spin_unlock(&fs->lock); } static inline void get_fs_pwd(struct fs_struct *fs, struct path *pwd) { spin_lock(&fs->lock); *pwd = fs->pwd; path_get(pwd); spin_unlock(&fs->lock); } extern bool current_chrooted(void); #endif /* _LINUX_FS_STRUCT_H */ PK ! )���W W async.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * async.h: Asynchronous function calls for boot performance * * (C) Copyright 2009 Intel Corporation * Author: Arjan van de Ven <arjan@linux.intel.com> */ #ifndef __ASYNC_H__ #define __ASYNC_H__ #include <linux/types.h> #include <linux/list.h> #include <linux/numa.h> #include <linux/device.h> typedef u64 async_cookie_t; typedef void (*async_func_t) (void *data, async_cookie_t cookie); struct async_domain { struct list_head pending; unsigned registered:1; }; /* * domain participates in global async_synchronize_full */ #define ASYNC_DOMAIN(_name) \ struct async_domain _name = { .pending = LIST_HEAD_INIT(_name.pending), \ .registered = 1 } /* * domain is free to go out of scope as soon as all pending work is * complete, this domain does not participate in async_synchronize_full */ #define ASYNC_DOMAIN_EXCLUSIVE(_name) \ struct async_domain _name = { .pending = LIST_HEAD_INIT(_name.pending), \ .registered = 0 } async_cookie_t async_schedule_node(async_func_t func, void *data, int node); async_cookie_t async_schedule_node_domain(async_func_t func, void *data, int node, struct async_domain *domain); /** * async_schedule - schedule a function for asynchronous execution * @func: function to execute asynchronously * @data: data pointer to pass to the function * * Returns an async_cookie_t that may be used for checkpointing later. * Note: This function may be called from atomic or non-atomic contexts. */ static inline async_cookie_t async_schedule(async_func_t func, void *data) { return async_schedule_node(func, data, NUMA_NO_NODE); } /** * async_schedule_domain - schedule a function for asynchronous execution within a certain domain * @func: function to execute asynchronously * @data: data pointer to pass to the function * @domain: the domain * * Returns an async_cookie_t that may be used for checkpointing later. * @domain may be used in the async_synchronize_*_domain() functions to * wait within a certain synchronization domain rather than globally. * Note: This function may be called from atomic or non-atomic contexts. */ static inline async_cookie_t async_schedule_domain(async_func_t func, void *data, struct async_domain *domain) { return async_schedule_node_domain(func, data, NUMA_NO_NODE, domain); } /** * async_schedule_dev - A device specific version of async_schedule * @func: function to execute asynchronously * @dev: device argument to be passed to function * * Returns an async_cookie_t that may be used for checkpointing later. * @dev is used as both the argument for the function and to provide NUMA * context for where to run the function. By doing this we can try to * provide for the best possible outcome by operating on the device on the * CPUs closest to the device. * Note: This function may be called from atomic or non-atomic contexts. */ static inline async_cookie_t async_schedule_dev(async_func_t func, struct device *dev) { return async_schedule_node(func, dev, dev_to_node(dev)); } bool async_schedule_dev_nocall(async_func_t func, struct device *dev); /** * async_schedule_dev_domain - A device specific version of async_schedule_domain * @func: function to execute asynchronously * @dev: device argument to be passed to function * @domain: the domain * * Returns an async_cookie_t that may be used for checkpointing later. * @dev is used as both the argument for the function and to provide NUMA * context for where to run the function. By doing this we can try to * provide for the best possible outcome by operating on the device on the * CPUs closest to the device. * @domain may be used in the async_synchronize_*_domain() functions to * wait within a certain synchronization domain rather than globally. * Note: This function may be called from atomic or non-atomic contexts. */ static inline async_cookie_t async_schedule_dev_domain(async_func_t func, struct device *dev, struct async_domain *domain) { return async_schedule_node_domain(func, dev, dev_to_node(dev), domain); } extern void async_synchronize_full(void); extern void async_synchronize_full_domain(struct async_domain *domain); extern void async_synchronize_cookie(async_cookie_t cookie); extern void async_synchronize_cookie_domain(async_cookie_t cookie, struct async_domain *domain); extern bool current_is_async(void); #endif PK ! �"�^�% �% serial_s3c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Internal header file for Samsung S3C2410 serial ports (UART0-2) * * Copyright (C) 2002 Shane Nay (shane@minirl.com) * * Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk) * * Adapted from: * * Internal header file for MX1ADS serial ports (UART1 & 2) * * Copyright (C) 2002 Shane Nay (shane@minirl.com) */ #ifndef __ASM_ARM_REGS_SERIAL_H #define __ASM_ARM_REGS_SERIAL_H #define S3C2410_URXH (0x24) #define S3C2410_UTXH (0x20) #define S3C2410_ULCON (0x00) #define S3C2410_UCON (0x04) #define S3C2410_UFCON (0x08) #define S3C2410_UMCON (0x0C) #define S3C2410_UBRDIV (0x28) #define S3C2410_UTRSTAT (0x10) #define S3C2410_UERSTAT (0x14) #define S3C2410_UFSTAT (0x18) #define S3C2410_UMSTAT (0x1C) #define USI_CON (0xC4) #define USI_OPTION (0xC8) #define USI_CON_RESET (1<<0) #define USI_CON_RESET_MASK (1<<0) #define USI_OPTION_HWACG_CLKREQ_ON (1<<1) #define USI_OPTION_HWACG_CLKSTOP_ON (1<<2) #define USI_OPTION_HWACG_MASK (3<<1) #define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3)) #define S3C2410_LCON_CS5 (0x0) #define S3C2410_LCON_CS6 (0x1) #define S3C2410_LCON_CS7 (0x2) #define S3C2410_LCON_CS8 (0x3) #define S3C2410_LCON_CSMASK (0x3) #define S3C2410_LCON_PNONE (0x0) #define S3C2410_LCON_PEVEN (0x5 << 3) #define S3C2410_LCON_PODD (0x4 << 3) #define S3C2410_LCON_PMASK (0x7 << 3) #define S3C2410_LCON_STOPB (1<<2) #define S3C2410_LCON_IRM (1<<6) #define S3C2440_UCON_CLKMASK (3<<10) #define S3C2440_UCON_CLKSHIFT (10) #define S3C2440_UCON_PCLK (0<<10) #define S3C2440_UCON_UCLK (1<<10) #define S3C2440_UCON_PCLK2 (2<<10) #define S3C2440_UCON_FCLK (3<<10) #define S3C2443_UCON_EPLL (3<<10) #define S3C6400_UCON_CLKMASK (3<<10) #define S3C6400_UCON_CLKSHIFT (10) #define S3C6400_UCON_PCLK (0<<10) #define S3C6400_UCON_PCLK2 (2<<10) #define S3C6400_UCON_UCLK0 (1<<10) #define S3C6400_UCON_UCLK1 (3<<10) #define S3C2440_UCON2_FCLK_EN (1<<15) #define S3C2440_UCON0_DIVMASK (15 << 12) #define S3C2440_UCON1_DIVMASK (15 << 12) #define S3C2440_UCON2_DIVMASK (7 << 12) #define S3C2440_UCON_DIVSHIFT (12) #define S3C2412_UCON_CLKMASK (3<<10) #define S3C2412_UCON_CLKSHIFT (10) #define S3C2412_UCON_UCLK (1<<10) #define S3C2412_UCON_USYSCLK (3<<10) #define S3C2412_UCON_PCLK (0<<10) #define S3C2412_UCON_PCLK2 (2<<10) #define S3C2410_UCON_CLKMASK (1 << 10) #define S3C2410_UCON_CLKSHIFT (10) #define S3C2410_UCON_UCLK (1<<10) #define S3C2410_UCON_SBREAK (1<<4) #define S3C2410_UCON_TXILEVEL (1<<9) #define S3C2410_UCON_RXILEVEL (1<<8) #define S3C2410_UCON_TXIRQMODE (1<<2) #define S3C2410_UCON_RXIRQMODE (1<<0) #define S3C2410_UCON_RXFIFO_TOI (1<<7) #define S3C2443_UCON_RXERR_IRQEN (1<<6) #define S3C2443_UCON_LOOPBACK (1<<5) #define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ S3C2410_UCON_TXIRQMODE | \ S3C2410_UCON_RXIRQMODE | \ S3C2410_UCON_RXFIFO_TOI) #define S3C64XX_UCON_TXBURST_1 (0<<20) #define S3C64XX_UCON_TXBURST_4 (1<<20) #define S3C64XX_UCON_TXBURST_8 (2<<20) #define S3C64XX_UCON_TXBURST_16 (3<<20) #define S3C64XX_UCON_TXBURST_MASK (0xf<<20) #define S3C64XX_UCON_RXBURST_1 (0<<16) #define S3C64XX_UCON_RXBURST_4 (1<<16) #define S3C64XX_UCON_RXBURST_8 (2<<16) #define S3C64XX_UCON_RXBURST_16 (3<<16) #define S3C64XX_UCON_RXBURST_MASK (0xf<<16) #define S3C64XX_UCON_TIMEOUT_SHIFT (12) #define S3C64XX_UCON_TIMEOUT_MASK (0xf<<12) #define S3C64XX_UCON_EMPTYINT_EN (1<<11) #define S3C64XX_UCON_DMASUS_EN (1<<10) #define S3C64XX_UCON_TXINT_LEVEL (1<<9) #define S3C64XX_UCON_RXINT_LEVEL (1<<8) #define S3C64XX_UCON_TIMEOUT_EN (1<<7) #define S3C64XX_UCON_ERRINT_EN (1<<6) #define S3C64XX_UCON_TXMODE_DMA (2<<2) #define S3C64XX_UCON_TXMODE_CPU (1<<2) #define S3C64XX_UCON_TXMODE_MASK (3<<2) #define S3C64XX_UCON_RXMODE_DMA (2<<0) #define S3C64XX_UCON_RXMODE_CPU (1<<0) #define S3C64XX_UCON_RXMODE_MASK (3<<0) #define S3C2410_UFCON_FIFOMODE (1<<0) #define S3C2410_UFCON_TXTRIG0 (0<<6) #define S3C2410_UFCON_RXTRIG8 (1<<4) #define S3C2410_UFCON_RXTRIG12 (2<<4) /* S3C2440 FIFO trigger levels */ #define S3C2440_UFCON_RXTRIG1 (0<<4) #define S3C2440_UFCON_RXTRIG8 (1<<4) #define S3C2440_UFCON_RXTRIG16 (2<<4) #define S3C2440_UFCON_RXTRIG32 (3<<4) #define S3C2440_UFCON_TXTRIG0 (0<<6) #define S3C2440_UFCON_TXTRIG16 (1<<6) #define S3C2440_UFCON_TXTRIG32 (2<<6) #define S3C2440_UFCON_TXTRIG48 (3<<6) #define S3C2410_UFCON_RESETBOTH (3<<1) #define S3C2410_UFCON_RESETTX (1<<2) #define S3C2410_UFCON_RESETRX (1<<1) #define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ S3C2410_UFCON_TXTRIG0 | \ S3C2410_UFCON_RXTRIG8 ) #define S3C2410_UMCOM_AFC (1<<4) #define S3C2410_UMCOM_RTS_LOW (1<<0) #define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */ #define S3C2412_UMCON_AFC_56 (1<<5) #define S3C2412_UMCON_AFC_48 (2<<5) #define S3C2412_UMCON_AFC_40 (3<<5) #define S3C2412_UMCON_AFC_32 (4<<5) #define S3C2412_UMCON_AFC_24 (5<<5) #define S3C2412_UMCON_AFC_16 (6<<5) #define S3C2412_UMCON_AFC_8 (7<<5) #define S3C2410_UFSTAT_TXFULL (1<<9) #define S3C2410_UFSTAT_RXFULL (1<<8) #define S3C2410_UFSTAT_TXMASK (15<<4) #define S3C2410_UFSTAT_TXSHIFT (4) #define S3C2410_UFSTAT_RXMASK (15<<0) #define S3C2410_UFSTAT_RXSHIFT (0) /* UFSTAT S3C2443 same as S3C2440 */ #define S3C2440_UFSTAT_TXFULL (1<<14) #define S3C2440_UFSTAT_RXFULL (1<<6) #define S3C2440_UFSTAT_TXSHIFT (8) #define S3C2440_UFSTAT_RXSHIFT (0) #define S3C2440_UFSTAT_TXMASK (63<<8) #define S3C2440_UFSTAT_RXMASK (63) #define S3C2410_UTRSTAT_TIMEOUT (1<<3) #define S3C2410_UTRSTAT_TXE (1<<2) #define S3C2410_UTRSTAT_TXFE (1<<1) #define S3C2410_UTRSTAT_RXDR (1<<0) #define S3C2410_UERSTAT_OVERRUN (1<<0) #define S3C2410_UERSTAT_FRAME (1<<2) #define S3C2410_UERSTAT_BREAK (1<<3) #define S3C2443_UERSTAT_PARITY (1<<1) #define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \ S3C2410_UERSTAT_FRAME | \ S3C2410_UERSTAT_BREAK) #define S3C2410_UMSTAT_CTS (1<<0) #define S3C2410_UMSTAT_DeltaCTS (1<<2) #define S3C2443_DIVSLOT (0x2C) /* S3C64XX interrupt registers. */ #define S3C64XX_UINTP 0x30 #define S3C64XX_UINTSP 0x34 #define S3C64XX_UINTM 0x38 #define S3C64XX_UINTM_RXD (0) #define S3C64XX_UINTM_ERROR (1) #define S3C64XX_UINTM_TXD (2) #define S3C64XX_UINTM_RXD_MSK (1 << S3C64XX_UINTM_RXD) #define S3C64XX_UINTM_ERR_MSK (1 << S3C64XX_UINTM_ERROR) #define S3C64XX_UINTM_TXD_MSK (1 << S3C64XX_UINTM_TXD) /* Following are specific to S5PV210 */ #define S5PV210_UCON_CLKMASK (1<<10) #define S5PV210_UCON_CLKSHIFT (10) #define S5PV210_UCON_PCLK (0<<10) #define S5PV210_UCON_UCLK (1<<10) #define S5PV210_UFCON_TXTRIG0 (0<<8) #define S5PV210_UFCON_TXTRIG4 (1<<8) #define S5PV210_UFCON_TXTRIG8 (2<<8) #define S5PV210_UFCON_TXTRIG16 (3<<8) #define S5PV210_UFCON_TXTRIG32 (4<<8) #define S5PV210_UFCON_TXTRIG64 (5<<8) #define S5PV210_UFCON_TXTRIG128 (6<<8) #define S5PV210_UFCON_TXTRIG256 (7<<8) #define S5PV210_UFCON_RXTRIG1 (0<<4) #define S5PV210_UFCON_RXTRIG4 (1<<4) #define S5PV210_UFCON_RXTRIG8 (2<<4) #define S5PV210_UFCON_RXTRIG16 (3<<4) #define S5PV210_UFCON_RXTRIG32 (4<<4) #define S5PV210_UFCON_RXTRIG64 (5<<4) #define S5PV210_UFCON_RXTRIG128 (6<<4) #define S5PV210_UFCON_RXTRIG256 (7<<4) #define S5PV210_UFSTAT_TXFULL (1<<24) #define S5PV210_UFSTAT_RXFULL (1<<8) #define S5PV210_UFSTAT_TXMASK (255<<16) #define S5PV210_UFSTAT_TXSHIFT (16) #define S5PV210_UFSTAT_RXMASK (255<<0) #define S5PV210_UFSTAT_RXSHIFT (0) #define S3C2410_UCON_CLKSEL0 (1 << 0) #define S3C2410_UCON_CLKSEL1 (1 << 1) #define S3C2410_UCON_CLKSEL2 (1 << 2) #define S3C2410_UCON_CLKSEL3 (1 << 3) /* Default values for s5pv210 UCON and UFCON uart registers */ #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ S3C2410_UCON_TXIRQMODE | \ S3C2410_UCON_RXIRQMODE | \ S3C2410_UCON_RXFIFO_TOI | \ S3C2443_UCON_RXERR_IRQEN) #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ S5PV210_UFCON_TXTRIG4 | \ S5PV210_UFCON_RXTRIG4) #define APPLE_S5L_UCON_RXTO_ENA 9 #define APPLE_S5L_UCON_RXTHRESH_ENA 12 #define APPLE_S5L_UCON_TXTHRESH_ENA 13 #define APPLE_S5L_UCON_RXTO_ENA_MSK (1 << APPLE_S5L_UCON_RXTO_ENA) #define APPLE_S5L_UCON_RXTHRESH_ENA_MSK (1 << APPLE_S5L_UCON_RXTHRESH_ENA) #define APPLE_S5L_UCON_TXTHRESH_ENA_MSK (1 << APPLE_S5L_UCON_TXTHRESH_ENA) #define APPLE_S5L_UCON_DEFAULT (S3C2410_UCON_TXIRQMODE | \ S3C2410_UCON_RXIRQMODE | \ S3C2410_UCON_RXFIFO_TOI) #define APPLE_S5L_UTRSTAT_RXTHRESH (1<<4) #define APPLE_S5L_UTRSTAT_TXTHRESH (1<<5) #define APPLE_S5L_UTRSTAT_RXTO (1<<9) #define APPLE_S5L_UTRSTAT_ALL_FLAGS (0x3f0) #ifndef __ASSEMBLY__ #include <linux/serial_core.h> /* configuration structure for per-machine configurations for the * serial port * * the pointer is setup by the machine specific initialisation from the * arch/arm/mach-s3c/ directory. */ struct s3c2410_uartcfg { unsigned char hwport; /* hardware port number */ unsigned char unused; unsigned short flags; upf_t uart_flags; /* default uart flags */ unsigned int clk_sel; unsigned int has_fracval; unsigned long ucon; /* value of ucon for port */ unsigned long ulcon; /* value of ulcon for port */ unsigned long ufcon; /* value of ufcon for port */ }; #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARM_REGS_SERIAL_H */ PK ! �X�Rh h bch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Generic binary BCH encoding/decoding library * * Copyright © 2011 Parrot S.A. * * Author: Ivan Djelic <ivan.djelic@parrot.com> * * Description: * * This library provides runtime configurable encoding/decoding of binary * Bose-Chaudhuri-Hocquenghem (BCH) codes. */ #ifndef _BCH_H #define _BCH_H #include <linux/types.h> /** * struct bch_control - BCH control structure * @m: Galois field order * @n: maximum codeword size in bits (= 2^m-1) * @t: error correction capability in bits * @ecc_bits: ecc exact size in bits, i.e. generator polynomial degree (<=m*t) * @ecc_bytes: ecc max size (m*t bits) in bytes * @a_pow_tab: Galois field GF(2^m) exponentiation lookup table * @a_log_tab: Galois field GF(2^m) log lookup table * @mod8_tab: remainder generator polynomial lookup tables * @ecc_buf: ecc parity words buffer * @ecc_buf2: ecc parity words buffer * @xi_tab: GF(2^m) base for solving degree 2 polynomial roots * @syn: syndrome buffer * @cache: log-based polynomial representation buffer * @elp: error locator polynomial * @poly_2t: temporary polynomials of degree 2t * @swap_bits: swap bits within data and syndrome bytes */ struct bch_control { unsigned int m; unsigned int n; unsigned int t; unsigned int ecc_bits; unsigned int ecc_bytes; /* private: */ uint16_t *a_pow_tab; uint16_t *a_log_tab; uint32_t *mod8_tab; uint32_t *ecc_buf; uint32_t *ecc_buf2; unsigned int *xi_tab; unsigned int *syn; int *cache; struct gf_poly *elp; struct gf_poly *poly_2t[4]; bool swap_bits; }; struct bch_control *bch_init(int m, int t, unsigned int prim_poly, bool swap_bits); void bch_free(struct bch_control *bch); void bch_encode(struct bch_control *bch, const uint8_t *data, unsigned int len, uint8_t *ecc); int bch_decode(struct bch_control *bch, const uint8_t *data, unsigned int len, const uint8_t *recv_ecc, const uint8_t *calc_ecc, const unsigned int *syn, unsigned int *errloc); #endif /* _BCH_H */ PK ! �\X� � serial_max3100.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * * Copyright (C) 2007 Christian Pellegrin */ #ifndef _LINUX_SERIAL_MAX3100_H #define _LINUX_SERIAL_MAX3100_H 1 /** * struct plat_max3100 - MAX3100 SPI UART platform data * @loopback: force MAX3100 in loopback * @crystal: 1 for 3.6864 Mhz, 0 for 1.8432 * @max3100_hw_suspend: MAX3100 has a shutdown pin. This is a hook * called on suspend and resume to activate it. * @poll_time: poll time for CTS signal in ms, 0 disables (so no hw * flow ctrl is possible but you have less CPU usage) * * You should use this structure in your machine description to specify * how the MAX3100 is connected. Example: * * static struct plat_max3100 max3100_plat_data = { * .loopback = 0, * .crystal = 0, * .poll_time = 100, * }; * * static struct spi_board_info spi_board_info[] = { * { * .modalias = "max3100", * .platform_data = &max3100_plat_data, * .irq = IRQ_EINT12, * .max_speed_hz = 5*1000*1000, * .chip_select = 0, * }, * }; * **/ struct plat_max3100 { int loopback; int crystal; void (*max3100_hw_suspend) (int suspend); int poll_time; }; #endif PK ! �¢!� � of_pci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __OF_PCI_H #define __OF_PCI_H #include <linux/types.h> #include <linux/errno.h> struct pci_dev; struct device_node; #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_PCI) struct device_node *of_pci_find_child_device(struct device_node *parent, unsigned int devfn); int of_pci_get_devfn(struct device_node *np); void of_pci_check_probe_only(void); #else static inline struct device_node *of_pci_find_child_device(struct device_node *parent, unsigned int devfn) { return NULL; } static inline int of_pci_get_devfn(struct device_node *np) { return -EINVAL; } static inline void of_pci_check_probe_only(void) { } #endif #if IS_ENABLED(CONFIG_OF_IRQ) int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin); #else static inline int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin) { return 0; } #endif #endif PK ! jI|Z� � posix-timers.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _linux_POSIX_TIMERS_H #define _linux_POSIX_TIMERS_H #include <linux/spinlock.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/alarmtimer.h> #include <linux/timerqueue.h> #include <linux/task_work.h> struct kernel_siginfo; struct task_struct; /* * Bit fields within a clockid: * * The most significant 29 bits hold either a pid or a file descriptor. * * Bit 2 indicates whether a cpu clock refers to a thread or a process. * * Bits 1 and 0 give the type: PROF=0, VIRT=1, SCHED=2, or FD=3. * * A clockid is invalid if bits 2, 1, and 0 are all set. */ #define CPUCLOCK_PID(clock) ((pid_t) ~((clock) >> 3)) #define CPUCLOCK_PERTHREAD(clock) \ (((clock) & (clockid_t) CPUCLOCK_PERTHREAD_MASK) != 0) #define CPUCLOCK_PERTHREAD_MASK 4 #define CPUCLOCK_WHICH(clock) ((clock) & (clockid_t) CPUCLOCK_CLOCK_MASK) #define CPUCLOCK_CLOCK_MASK 3 #define CPUCLOCK_PROF 0 #define CPUCLOCK_VIRT 1 #define CPUCLOCK_SCHED 2 #define CPUCLOCK_MAX 3 #define CLOCKFD CPUCLOCK_MAX #define CLOCKFD_MASK (CPUCLOCK_PERTHREAD_MASK|CPUCLOCK_CLOCK_MASK) static inline clockid_t make_process_cpuclock(const unsigned int pid, const clockid_t clock) { return ((~pid) << 3) | clock; } static inline clockid_t make_thread_cpuclock(const unsigned int tid, const clockid_t clock) { return make_process_cpuclock(tid, clock | CPUCLOCK_PERTHREAD_MASK); } static inline clockid_t fd_to_clockid(const int fd) { return make_process_cpuclock((unsigned int) fd, CLOCKFD); } static inline int clockid_to_fd(const clockid_t clk) { return ~(clk >> 3); } #ifdef CONFIG_POSIX_TIMERS /** * cpu_timer - Posix CPU timer representation for k_itimer * @node: timerqueue node to queue in the task/sig * @head: timerqueue head on which this timer is queued * @pid: Pointer to target task PID * @elist: List head for the expiry list * @firing: Timer is currently firing * @handling: Pointer to the task which handles expiry */ struct cpu_timer { struct timerqueue_node node; struct timerqueue_head *head; struct pid *pid; struct list_head elist; int firing; struct task_struct __rcu *handling; }; static inline bool cpu_timer_enqueue(struct timerqueue_head *head, struct cpu_timer *ctmr) { ctmr->head = head; return timerqueue_add(head, &ctmr->node); } static inline bool cpu_timer_queued(struct cpu_timer *ctmr) { return !!ctmr->head; } static inline bool cpu_timer_dequeue(struct cpu_timer *ctmr) { if (cpu_timer_queued(ctmr)) { timerqueue_del(ctmr->head, &ctmr->node); ctmr->head = NULL; return true; } return false; } static inline u64 cpu_timer_getexpires(struct cpu_timer *ctmr) { return ctmr->node.expires; } static inline void cpu_timer_setexpires(struct cpu_timer *ctmr, u64 exp) { ctmr->node.expires = exp; } /** * posix_cputimer_base - Container per posix CPU clock * @nextevt: Earliest-expiration cache * @tqhead: timerqueue head for cpu_timers */ struct posix_cputimer_base { u64 nextevt; struct timerqueue_head tqhead; }; /** * posix_cputimers - Container for posix CPU timer related data * @bases: Base container for posix CPU clocks * @timers_active: Timers are queued. * @expiry_active: Timer expiry is active. Used for * process wide timers to avoid multiple * task trying to handle expiry concurrently * * Used in task_struct and signal_struct */ struct posix_cputimers { struct posix_cputimer_base bases[CPUCLOCK_MAX]; unsigned int timers_active; unsigned int expiry_active; }; /** * posix_cputimers_work - Container for task work based posix CPU timer expiry * @work: The task work to be scheduled * @mutex: Mutex held around expiry in context of this task work * @scheduled: @work has been scheduled already, no further processing */ struct posix_cputimers_work { struct callback_head work; struct mutex mutex; unsigned int scheduled; }; static inline void posix_cputimers_init(struct posix_cputimers *pct) { memset(pct, 0, sizeof(*pct)); pct->bases[0].nextevt = U64_MAX; pct->bases[1].nextevt = U64_MAX; pct->bases[2].nextevt = U64_MAX; } void posix_cputimers_group_init(struct posix_cputimers *pct, u64 cpu_limit); static inline void posix_cputimers_rt_watchdog(struct posix_cputimers *pct, u64 runtime) { pct->bases[CPUCLOCK_SCHED].nextevt = runtime; } /* Init task static initializer */ #define INIT_CPU_TIMERBASE(b) { \ .nextevt = U64_MAX, \ } #define INIT_CPU_TIMERBASES(b) { \ INIT_CPU_TIMERBASE(b[0]), \ INIT_CPU_TIMERBASE(b[1]), \ INIT_CPU_TIMERBASE(b[2]), \ } #define INIT_CPU_TIMERS(s) \ .posix_cputimers = { \ .bases = INIT_CPU_TIMERBASES(s.posix_cputimers.bases), \ }, #else struct posix_cputimers { }; struct cpu_timer { }; #define INIT_CPU_TIMERS(s) static inline void posix_cputimers_init(struct posix_cputimers *pct) { } static inline void posix_cputimers_group_init(struct posix_cputimers *pct, u64 cpu_limit) { } #endif #ifdef CONFIG_POSIX_CPU_TIMERS_TASK_WORK void clear_posix_cputimers_work(struct task_struct *p); void posix_cputimers_init_work(void); #else static inline void clear_posix_cputimers_work(struct task_struct *p) { } static inline void posix_cputimers_init_work(void) { } #endif #define REQUEUE_PENDING 1 /** * struct k_itimer - POSIX.1b interval timer structure. * @list: List head for binding the timer to signals->posix_timers * @t_hash: Entry in the posix timer hash table * @it_lock: Lock protecting the timer * @kclock: Pointer to the k_clock struct handling this timer * @it_clock: The posix timer clock id * @it_id: The posix timer id for identifying the timer * @it_active: Marker that timer is active * @it_overrun: The overrun counter for pending signals * @it_overrun_last: The overrun at the time of the last delivered signal * @it_requeue_pending: Indicator that timer waits for being requeued on * signal delivery * @it_sigev_notify: The notify word of sigevent struct for signal delivery * @it_interval: The interval for periodic timers * @it_signal: Pointer to the creators signal struct * @it_pid: The pid of the process/task targeted by the signal * @it_process: The task to wakeup on clock_nanosleep (CPU timers) * @sigq: Pointer to preallocated sigqueue * @it: Union representing the various posix timer type * internals. * @rcu: RCU head for freeing the timer. */ struct k_itimer { struct list_head list; struct hlist_node t_hash; spinlock_t it_lock; const struct k_clock *kclock; clockid_t it_clock; timer_t it_id; int it_active; s64 it_overrun; s64 it_overrun_last; int it_requeue_pending; int it_sigev_notify; ktime_t it_interval; struct signal_struct *it_signal; union { struct pid *it_pid; struct task_struct *it_process; }; struct sigqueue *sigq; union { struct { struct hrtimer timer; } real; struct cpu_timer cpu; struct { struct alarm alarmtimer; } alarm; } it; struct rcu_head rcu; }; void run_posix_cpu_timers(void); void posix_cpu_timers_exit(struct task_struct *task); void posix_cpu_timers_exit_group(struct task_struct *task); void set_process_cpu_timer(struct task_struct *task, unsigned int clock_idx, u64 *newval, u64 *oldval); void update_rlimit_cpu(struct task_struct *task, unsigned long rlim_new); void posixtimer_rearm(struct kernel_siginfo *info); #endif PK ! �E��� � jz4780-nemc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * JZ4780 NAND/external memory controller (NEMC) * * Copyright (c) 2015 Imagination Technologies * Author: Alex Smith <alex@alex-smith.me.uk> */ #ifndef __LINUX_JZ4780_NEMC_H__ #define __LINUX_JZ4780_NEMC_H__ #include <linux/types.h> struct device; /* * Number of NEMC banks. Note that there are actually 6, but they are numbered * from 1. */ #define JZ4780_NEMC_NUM_BANKS 7 /** * enum jz4780_nemc_bank_type - device types which can be connected to a bank * @JZ4780_NEMC_BANK_SRAM: SRAM * @JZ4780_NEMC_BANK_NAND: NAND */ enum jz4780_nemc_bank_type { JZ4780_NEMC_BANK_SRAM, JZ4780_NEMC_BANK_NAND, }; extern unsigned int jz4780_nemc_num_banks(struct device *dev); extern void jz4780_nemc_set_type(struct device *dev, unsigned int bank, enum jz4780_nemc_bank_type type); extern void jz4780_nemc_assert(struct device *dev, unsigned int bank, bool assert); #endif /* __LINUX_JZ4780_NEMC_H__ */ PK ! `�r�H �H kernfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * kernfs.h - pseudo filesystem decoupled from vfs locking */ #ifndef __LINUX_KERNFS_H #define __LINUX_KERNFS_H #include <linux/kernel.h> #include <linux/err.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/idr.h> #include <linux/lockdep.h> #include <linux/rbtree.h> #include <linux/atomic.h> #include <linux/uidgid.h> #include <linux/wait.h> #include <linux/rwsem.h> struct file; struct dentry; struct iattr; struct seq_file; struct vm_area_struct; struct super_block; struct file_system_type; struct poll_table_struct; struct fs_context; struct kernfs_fs_context; struct kernfs_open_node; struct kernfs_iattrs; enum kernfs_node_type { KERNFS_DIR = 0x0001, KERNFS_FILE = 0x0002, KERNFS_LINK = 0x0004, }; #define KERNFS_TYPE_MASK 0x000f #define KERNFS_FLAG_MASK ~KERNFS_TYPE_MASK #define KERNFS_MAX_USER_XATTRS 128 #define KERNFS_USER_XATTR_SIZE_LIMIT (128 << 10) enum kernfs_node_flag { KERNFS_ACTIVATED = 0x0010, KERNFS_NS = 0x0020, KERNFS_HAS_SEQ_SHOW = 0x0040, KERNFS_HAS_MMAP = 0x0080, KERNFS_LOCKDEP = 0x0100, KERNFS_SUICIDAL = 0x0400, KERNFS_SUICIDED = 0x0800, KERNFS_EMPTY_DIR = 0x1000, KERNFS_HAS_RELEASE = 0x2000, }; /* @flags for kernfs_create_root() */ enum kernfs_root_flag { /* * kernfs_nodes are created in the deactivated state and invisible. * They require explicit kernfs_activate() to become visible. This * can be used to make related nodes become visible atomically * after all nodes are created successfully. */ KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001, /* * For regular files, if the opener has CAP_DAC_OVERRIDE, open(2) * succeeds regardless of the RW permissions. sysfs had an extra * layer of enforcement where open(2) fails with -EACCES regardless * of CAP_DAC_OVERRIDE if the permission doesn't have the * respective read or write access at all (none of S_IRUGO or * S_IWUGO) or the respective operation isn't implemented. The * following flag enables that behavior. */ KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK = 0x0002, /* * The filesystem supports exportfs operation, so userspace can use * fhandle to access nodes of the fs. */ KERNFS_ROOT_SUPPORT_EXPORTOP = 0x0004, /* * Support user xattrs to be written to nodes rooted at this root. */ KERNFS_ROOT_SUPPORT_USER_XATTR = 0x0008, }; /* type-specific structures for kernfs_node union members */ struct kernfs_elem_dir { unsigned long subdirs; /* children rbtree starts here and goes through kn->rb */ struct rb_root children; /* * The kernfs hierarchy this directory belongs to. This fits * better directly in kernfs_node but is here to save space. */ struct kernfs_root *root; /* * Monotonic revision counter, used to identify if a directory * node has changed during negative dentry revalidation. */ unsigned long rev; }; struct kernfs_elem_symlink { struct kernfs_node *target_kn; }; struct kernfs_elem_attr { const struct kernfs_ops *ops; struct kernfs_open_node *open; loff_t size; struct kernfs_node *notify_next; /* for kernfs_notify() */ }; /* * kernfs_node - the building block of kernfs hierarchy. Each and every * kernfs node is represented by single kernfs_node. Most fields are * private to kernfs and shouldn't be accessed directly by kernfs users. * * As long as count reference is held, the kernfs_node itself is * accessible. Dereferencing elem or any other outer entity requires * active reference. */ struct kernfs_node { atomic_t count; atomic_t active; #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif /* * Use kernfs_get_parent() and kernfs_name/path() instead of * accessing the following two fields directly. If the node is * never moved to a different parent, it is safe to access the * parent directly. */ struct kernfs_node *parent; const char *name; struct rb_node rb; const void *ns; /* namespace tag */ unsigned int hash; /* ns + name hash */ union { struct kernfs_elem_dir dir; struct kernfs_elem_symlink symlink; struct kernfs_elem_attr attr; }; void *priv; /* * 64bit unique ID. On 64bit ino setups, id is the ino. On 32bit, * the low 32bits are ino and upper generation. */ u64 id; unsigned short flags; umode_t mode; struct kernfs_iattrs *iattr; }; /* * kernfs_syscall_ops may be specified on kernfs_create_root() to support * syscalls. These optional callbacks are invoked on the matching syscalls * and can perform any kernfs operations which don't necessarily have to be * the exact operation requested. An active reference is held for each * kernfs_node parameter. */ struct kernfs_syscall_ops { int (*show_options)(struct seq_file *sf, struct kernfs_root *root); int (*mkdir)(struct kernfs_node *parent, const char *name, umode_t mode); int (*rmdir)(struct kernfs_node *kn); int (*rename)(struct kernfs_node *kn, struct kernfs_node *new_parent, const char *new_name); int (*show_path)(struct seq_file *sf, struct kernfs_node *kn, struct kernfs_root *root); }; #if 0 struct kernfs_root { /* published fields */ struct kernfs_node *kn; unsigned int flags; /* KERNFS_ROOT_* flags */ /* private fields, do not use outside kernfs proper */ struct idr ino_idr; u32 last_id_lowbits; u32 id_highbits; struct kernfs_syscall_ops *syscall_ops; /* list of kernfs_super_info of this root, protected by kernfs_rwsem */ struct list_head supers; wait_queue_head_t deactivate_waitq; struct rw_semaphore kernfs_rwsem; }; #endif struct kernfs_node *kernfs_root_to_node(struct kernfs_root *root); struct kernfs_open_file { /* published fields */ struct kernfs_node *kn; struct file *file; struct seq_file *seq_file; void *priv; /* private fields, do not use outside kernfs proper */ struct mutex mutex; struct mutex prealloc_mutex; int event; struct list_head list; char *prealloc_buf; size_t atomic_write_len; bool mmapped:1; bool released:1; const struct vm_operations_struct *vm_ops; }; struct kernfs_ops { /* * Optional open/release methods. Both are called with * @of->seq_file populated. */ int (*open)(struct kernfs_open_file *of); void (*release)(struct kernfs_open_file *of); /* * Read is handled by either seq_file or raw_read(). * * If seq_show() is present, seq_file path is active. Other seq * operations are optional and if not implemented, the behavior is * equivalent to single_open(). @sf->private points to the * associated kernfs_open_file. * * read() is bounced through kernel buffer and a read larger than * PAGE_SIZE results in partial operation of PAGE_SIZE. */ int (*seq_show)(struct seq_file *sf, void *v); void *(*seq_start)(struct seq_file *sf, loff_t *ppos); void *(*seq_next)(struct seq_file *sf, void *v, loff_t *ppos); void (*seq_stop)(struct seq_file *sf, void *v); ssize_t (*read)(struct kernfs_open_file *of, char *buf, size_t bytes, loff_t off); /* * write() is bounced through kernel buffer. If atomic_write_len * is not set, a write larger than PAGE_SIZE results in partial * operations of PAGE_SIZE chunks. If atomic_write_len is set, * writes upto the specified size are executed atomically but * larger ones are rejected with -E2BIG. */ size_t atomic_write_len; /* * "prealloc" causes a buffer to be allocated at open for * all read/write requests. As ->seq_show uses seq_read() * which does its own allocation, it is incompatible with * ->prealloc. Provide ->read and ->write with ->prealloc. */ bool prealloc; ssize_t (*write)(struct kernfs_open_file *of, char *buf, size_t bytes, loff_t off); __poll_t (*poll)(struct kernfs_open_file *of, struct poll_table_struct *pt); int (*mmap)(struct kernfs_open_file *of, struct vm_area_struct *vma); #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lock_class_key lockdep_key; #endif }; /* * The kernfs superblock creation/mount parameter context. */ struct kernfs_fs_context { struct kernfs_root *root; /* Root of the hierarchy being mounted */ void *ns_tag; /* Namespace tag of the mount (or NULL) */ unsigned long magic; /* File system specific magic number */ /* The following are set/used by kernfs_mount() */ bool new_sb_created; /* Set to T if we allocated a new sb */ }; #ifdef CONFIG_KERNFS static inline enum kernfs_node_type kernfs_type(struct kernfs_node *kn) { return kn->flags & KERNFS_TYPE_MASK; } static inline ino_t kernfs_id_ino(u64 id) { /* id is ino if ino_t is 64bit; otherwise, low 32bits */ if (sizeof(ino_t) >= sizeof(u64)) return id; else return (u32)id; } static inline u32 kernfs_id_gen(u64 id) { /* gen is fixed at 1 if ino_t is 64bit; otherwise, high 32bits */ if (sizeof(ino_t) >= sizeof(u64)) return 1; else return id >> 32; } static inline ino_t kernfs_ino(struct kernfs_node *kn) { return kernfs_id_ino(kn->id); } static inline ino_t kernfs_gen(struct kernfs_node *kn) { return kernfs_id_gen(kn->id); } /** * kernfs_enable_ns - enable namespace under a directory * @kn: directory of interest, should be empty * * This is to be called right after @kn is created to enable namespace * under it. All children of @kn must have non-NULL namespace tags and * only the ones which match the super_block's tag will be visible. */ static inline void kernfs_enable_ns(struct kernfs_node *kn) { WARN_ON_ONCE(kernfs_type(kn) != KERNFS_DIR); WARN_ON_ONCE(!RB_EMPTY_ROOT(&kn->dir.children)); kn->flags |= KERNFS_NS; } /** * kernfs_ns_enabled - test whether namespace is enabled * @kn: the node to test * * Test whether namespace filtering is enabled for the children of @ns. */ static inline bool kernfs_ns_enabled(struct kernfs_node *kn) { return kn->flags & KERNFS_NS; } int kernfs_name(struct kernfs_node *kn, char *buf, size_t buflen); int kernfs_path_from_node(struct kernfs_node *root_kn, struct kernfs_node *kn, char *buf, size_t buflen); void pr_cont_kernfs_name(struct kernfs_node *kn); void pr_cont_kernfs_path(struct kernfs_node *kn); struct kernfs_node *kernfs_get_parent(struct kernfs_node *kn); struct kernfs_node *kernfs_find_and_get_ns(struct kernfs_node *parent, const char *name, const void *ns); struct kernfs_node *kernfs_walk_and_get_ns(struct kernfs_node *parent, const char *path, const void *ns); void kernfs_get(struct kernfs_node *kn); void kernfs_put(struct kernfs_node *kn); struct kernfs_node *kernfs_node_from_dentry(struct dentry *dentry); struct kernfs_root *kernfs_root_from_sb(struct super_block *sb); struct inode *kernfs_get_inode(struct super_block *sb, struct kernfs_node *kn); struct dentry *kernfs_node_dentry(struct kernfs_node *kn, struct super_block *sb); struct kernfs_root *kernfs_create_root(struct kernfs_syscall_ops *scops, unsigned int flags, void *priv); void kernfs_destroy_root(struct kernfs_root *root); struct kernfs_node *kernfs_create_dir_ns(struct kernfs_node *parent, const char *name, umode_t mode, kuid_t uid, kgid_t gid, void *priv, const void *ns); struct kernfs_node *kernfs_create_empty_dir(struct kernfs_node *parent, const char *name); struct kernfs_node *__kernfs_create_file(struct kernfs_node *parent, const char *name, umode_t mode, kuid_t uid, kgid_t gid, loff_t size, const struct kernfs_ops *ops, void *priv, const void *ns, struct lock_class_key *key); struct kernfs_node *kernfs_create_link(struct kernfs_node *parent, const char *name, struct kernfs_node *target); void kernfs_activate(struct kernfs_node *kn); void kernfs_remove(struct kernfs_node *kn); void kernfs_break_active_protection(struct kernfs_node *kn); void kernfs_unbreak_active_protection(struct kernfs_node *kn); bool kernfs_remove_self(struct kernfs_node *kn); int kernfs_remove_by_name_ns(struct kernfs_node *parent, const char *name, const void *ns); int kernfs_rename_ns(struct kernfs_node *kn, struct kernfs_node *new_parent, const char *new_name, const void *new_ns); int kernfs_setattr(struct kernfs_node *kn, const struct iattr *iattr); __poll_t kernfs_generic_poll(struct kernfs_open_file *of, struct poll_table_struct *pt); void kernfs_notify(struct kernfs_node *kn); int kernfs_xattr_get(struct kernfs_node *kn, const char *name, void *value, size_t size); int kernfs_xattr_set(struct kernfs_node *kn, const char *name, const void *value, size_t size, int flags); const void *kernfs_super_ns(struct super_block *sb); int kernfs_get_tree(struct fs_context *fc); void kernfs_free_fs_context(struct fs_context *fc); void kernfs_kill_sb(struct super_block *sb); void kernfs_init(void); struct kernfs_node *kernfs_find_and_get_node_by_id(struct kernfs_root *root, u64 id); #else /* CONFIG_KERNFS */ static inline enum kernfs_node_type kernfs_type(struct kernfs_node *kn) { return 0; } /* whatever */ static inline void kernfs_enable_ns(struct kernfs_node *kn) { } static inline bool kernfs_ns_enabled(struct kernfs_node *kn) { return false; } static inline int kernfs_name(struct kernfs_node *kn, char *buf, size_t buflen) { return -ENOSYS; } static inline int kernfs_path_from_node(struct kernfs_node *root_kn, struct kernfs_node *kn, char *buf, size_t buflen) { return -ENOSYS; } static inline void pr_cont_kernfs_name(struct kernfs_node *kn) { } static inline void pr_cont_kernfs_path(struct kernfs_node *kn) { } static inline struct kernfs_node *kernfs_get_parent(struct kernfs_node *kn) { return NULL; } static inline struct kernfs_node * kernfs_find_and_get_ns(struct kernfs_node *parent, const char *name, const void *ns) { return NULL; } static inline struct kernfs_node * kernfs_walk_and_get_ns(struct kernfs_node *parent, const char *path, const void *ns) { return NULL; } static inline void kernfs_get(struct kernfs_node *kn) { } static inline void kernfs_put(struct kernfs_node *kn) { } static inline struct kernfs_node *kernfs_node_from_dentry(struct dentry *dentry) { return NULL; } static inline struct kernfs_root *kernfs_root_from_sb(struct super_block *sb) { return NULL; } static inline struct inode * kernfs_get_inode(struct super_block *sb, struct kernfs_node *kn) { return NULL; } static inline struct kernfs_root * kernfs_create_root(struct kernfs_syscall_ops *scops, unsigned int flags, void *priv) { return ERR_PTR(-ENOSYS); } static inline void kernfs_destroy_root(struct kernfs_root *root) { } static inline struct kernfs_node * kernfs_create_dir_ns(struct kernfs_node *parent, const char *name, umode_t mode, kuid_t uid, kgid_t gid, void *priv, const void *ns) { return ERR_PTR(-ENOSYS); } static inline struct kernfs_node * __kernfs_create_file(struct kernfs_node *parent, const char *name, umode_t mode, kuid_t uid, kgid_t gid, loff_t size, const struct kernfs_ops *ops, void *priv, const void *ns, struct lock_class_key *key) { return ERR_PTR(-ENOSYS); } static inline struct kernfs_node * kernfs_create_link(struct kernfs_node *parent, const char *name, struct kernfs_node *target) { return ERR_PTR(-ENOSYS); } static inline void kernfs_activate(struct kernfs_node *kn) { } static inline void kernfs_remove(struct kernfs_node *kn) { } static inline bool kernfs_remove_self(struct kernfs_node *kn) { return false; } static inline int kernfs_remove_by_name_ns(struct kernfs_node *kn, const char *name, const void *ns) { return -ENOSYS; } static inline int kernfs_rename_ns(struct kernfs_node *kn, struct kernfs_node *new_parent, const char *new_name, const void *new_ns) { return -ENOSYS; } static inline int kernfs_setattr(struct kernfs_node *kn, const struct iattr *iattr) { return -ENOSYS; } static inline void kernfs_notify(struct kernfs_node *kn) { } static inline int kernfs_xattr_get(struct kernfs_node *kn, const char *name, void *value, size_t size) { return -ENOSYS; } static inline int kernfs_xattr_set(struct kernfs_node *kn, const char *name, const void *value, size_t size, int flags) { return -ENOSYS; } static inline const void *kernfs_super_ns(struct super_block *sb) { return NULL; } static inline int kernfs_get_tree(struct fs_context *fc) { return -ENOSYS; } static inline void kernfs_free_fs_context(struct fs_context *fc) { } static inline void kernfs_kill_sb(struct super_block *sb) { } static inline void kernfs_init(void) { } #endif /* CONFIG_KERNFS */ /** * kernfs_path - build full path of a given node * @kn: kernfs_node of interest * @buf: buffer to copy @kn's name into * @buflen: size of @buf * * If @kn is NULL result will be "(null)". * * Returns the length of the full path. If the full length is equal to or * greater than @buflen, @buf contains the truncated path with the trailing * '\0'. On error, -errno is returned. */ static inline int kernfs_path(struct kernfs_node *kn, char *buf, size_t buflen) { return kernfs_path_from_node(kn, NULL, buf, buflen); } static inline struct kernfs_node * kernfs_find_and_get(struct kernfs_node *kn, const char *name) { return kernfs_find_and_get_ns(kn, name, NULL); } static inline struct kernfs_node * kernfs_walk_and_get(struct kernfs_node *kn, const char *path) { return kernfs_walk_and_get_ns(kn, path, NULL); } static inline struct kernfs_node * kernfs_create_dir(struct kernfs_node *parent, const char *name, umode_t mode, void *priv) { return kernfs_create_dir_ns(parent, name, mode, GLOBAL_ROOT_UID, GLOBAL_ROOT_GID, priv, NULL); } static inline struct kernfs_node * kernfs_create_file_ns(struct kernfs_node *parent, const char *name, umode_t mode, kuid_t uid, kgid_t gid, loff_t size, const struct kernfs_ops *ops, void *priv, const void *ns) { struct lock_class_key *key = NULL; #ifdef CONFIG_DEBUG_LOCK_ALLOC key = (struct lock_class_key *)&ops->lockdep_key; #endif return __kernfs_create_file(parent, name, mode, uid, gid, size, ops, priv, ns, key); } static inline struct kernfs_node * kernfs_create_file(struct kernfs_node *parent, const char *name, umode_t mode, loff_t size, const struct kernfs_ops *ops, void *priv) { return kernfs_create_file_ns(parent, name, mode, GLOBAL_ROOT_UID, GLOBAL_ROOT_GID, size, ops, priv, NULL); } static inline int kernfs_remove_by_name(struct kernfs_node *parent, const char *name) { return kernfs_remove_by_name_ns(parent, name, NULL); } static inline int kernfs_rename(struct kernfs_node *kn, struct kernfs_node *new_parent, const char *new_name) { return kernfs_rename_ns(kn, new_parent, new_name, NULL); } #endif /* __LINUX_KERNFS_H */ PK ! *�D�V V sched/jobctl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_JOBCTL_H #define _LINUX_SCHED_JOBCTL_H #include <linux/types.h> struct task_struct; /* * task->jobctl flags */ #define JOBCTL_STOP_SIGMASK 0xffff /* signr of the last group stop */ #define JOBCTL_STOP_DEQUEUED_BIT 16 /* stop signal dequeued */ #define JOBCTL_STOP_PENDING_BIT 17 /* task should stop for group stop */ #define JOBCTL_STOP_CONSUME_BIT 18 /* consume group stop count */ #define JOBCTL_TRAP_STOP_BIT 19 /* trap for STOP */ #define JOBCTL_TRAP_NOTIFY_BIT 20 /* trap for NOTIFY */ #define JOBCTL_TRAPPING_BIT 21 /* switching to TRACED */ #define JOBCTL_LISTENING_BIT 22 /* ptracer is listening for events */ #define JOBCTL_TRAP_FREEZE_BIT 23 /* trap for cgroup freezer */ #define JOBCTL_STOP_DEQUEUED (1UL << JOBCTL_STOP_DEQUEUED_BIT) #define JOBCTL_STOP_PENDING (1UL << JOBCTL_STOP_PENDING_BIT) #define JOBCTL_STOP_CONSUME (1UL << JOBCTL_STOP_CONSUME_BIT) #define JOBCTL_TRAP_STOP (1UL << JOBCTL_TRAP_STOP_BIT) #define JOBCTL_TRAP_NOTIFY (1UL << JOBCTL_TRAP_NOTIFY_BIT) #define JOBCTL_TRAPPING (1UL << JOBCTL_TRAPPING_BIT) #define JOBCTL_LISTENING (1UL << JOBCTL_LISTENING_BIT) #define JOBCTL_TRAP_FREEZE (1UL << JOBCTL_TRAP_FREEZE_BIT) #define JOBCTL_TRAP_MASK (JOBCTL_TRAP_STOP | JOBCTL_TRAP_NOTIFY) #define JOBCTL_PENDING_MASK (JOBCTL_STOP_PENDING | JOBCTL_TRAP_MASK) extern bool task_set_jobctl_pending(struct task_struct *task, unsigned long mask); extern void task_clear_jobctl_trapping(struct task_struct *task); extern void task_clear_jobctl_pending(struct task_struct *task, unsigned long mask); #endif /* _LINUX_SCHED_JOBCTL_H */ PK ! � � � sched/wake_q.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_WAKE_Q_H #define _LINUX_SCHED_WAKE_Q_H /* * Wake-queues are lists of tasks with a pending wakeup, whose * callers have already marked the task as woken internally, * and can thus carry on. A common use case is being able to * do the wakeups once the corresponding user lock as been * released. * * We hold reference to each task in the list across the wakeup, * thus guaranteeing that the memory is still valid by the time * the actual wakeups are performed in wake_up_q(). * * One per task suffices, because there's never a need for a task to be * in two wake queues simultaneously; it is forbidden to abandon a task * in a wake queue (a call to wake_up_q() _must_ follow), so if a task is * already in a wake queue, the wakeup will happen soon and the second * waker can just skip it. * * The DEFINE_WAKE_Q macro declares and initializes the list head. * wake_up_q() does NOT reinitialize the list; it's expected to be * called near the end of a function. Otherwise, the list can be * re-initialized for later re-use by wake_q_init(). * * NOTE that this can cause spurious wakeups. schedule() callers * must ensure the call is done inside a loop, confirming that the * wakeup condition has in fact occurred. * * NOTE that there is no guarantee the wakeup will happen any later than the * wake_q_add() location. Therefore task must be ready to be woken at the * location of the wake_q_add(). */ #include <linux/sched.h> struct wake_q_head { struct wake_q_node *first; struct wake_q_node **lastp; }; #define WAKE_Q_TAIL ((struct wake_q_node *) 0x01) #define WAKE_Q_HEAD_INITIALIZER(name) \ { WAKE_Q_TAIL, &name.first } #define DEFINE_WAKE_Q(name) \ struct wake_q_head name = WAKE_Q_HEAD_INITIALIZER(name) static inline void wake_q_init(struct wake_q_head *head) { head->first = WAKE_Q_TAIL; head->lastp = &head->first; } static inline bool wake_q_empty(struct wake_q_head *head) { return head->first == WAKE_Q_TAIL; } extern void wake_q_add(struct wake_q_head *head, struct task_struct *task); extern void wake_q_add_safe(struct wake_q_head *head, struct task_struct *task); extern void wake_up_q(struct wake_q_head *head); #endif /* _LINUX_SCHED_WAKE_Q_H */ PK ! �}�� � sched/smt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_SMT_H #define _LINUX_SCHED_SMT_H #include <linux/static_key.h> #ifdef CONFIG_SCHED_SMT extern struct static_key_false sched_smt_present; static __always_inline bool sched_smt_active(void) { return static_branch_likely(&sched_smt_present); } #else static __always_inline bool sched_smt_active(void) { return false; } #endif void arch_smt_update(void); #endif PK ! {�4 4 sched/loadavg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_LOADAVG_H #define _LINUX_SCHED_LOADAVG_H /* * These are the constant used to fake the fixed-point load-average * counting. Some notes: * - 11 bit fractions expand to 22 bits by the multiplies: this gives * a load-average precision of 10 bits integer + 11 bits fractional * - if you want to count load-averages more often, you need more * precision, or rounding will get you. With 2-second counting freq, * the EXP_n values would be 1981, 2034 and 2043 if still using only * 11 bit fractions. */ extern unsigned long avenrun[]; /* Load averages */ extern void get_avenrun(unsigned long *loads, unsigned long offset, int shift); #define FSHIFT 11 /* nr of bits of precision */ #define FIXED_1 (1<<FSHIFT) /* 1.0 as fixed-point */ #define LOAD_FREQ (5*HZ+1) /* 5 sec intervals */ #define EXP_1 1884 /* 1/exp(5sec/1min) as fixed-point */ #define EXP_5 2014 /* 1/exp(5sec/5min) */ #define EXP_15 2037 /* 1/exp(5sec/15min) */ /* * a1 = a0 * e + a * (1 - e) */ static inline unsigned long calc_load(unsigned long load, unsigned long exp, unsigned long active) { unsigned long newload; newload = load * exp + active * (FIXED_1 - exp); if (active >= load) newload += FIXED_1-1; return newload / FIXED_1; } extern unsigned long calc_load_n(unsigned long load, unsigned long exp, unsigned long active, unsigned int n); #define LOAD_INT(x) ((x) >> FSHIFT) #define LOAD_FRAC(x) LOAD_INT(((x) & (FIXED_1-1)) * 100) extern void calc_global_load(void); #endif /* _LINUX_SCHED_LOADAVG_H */ PK ! ��Ob b sched/task.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_TASK_H #define _LINUX_SCHED_TASK_H /* * Interface between the scheduler and various task lifetime (fork()/exit()) * functionality: */ #include <linux/sched.h> #include <linux/uaccess.h> struct task_struct; struct rusage; union thread_union; struct css_set; /* All the bits taken by the old clone syscall. */ #define CLONE_LEGACY_FLAGS 0xffffffffULL struct kernel_clone_args { u64 flags; int __user *pidfd; int __user *child_tid; int __user *parent_tid; int exit_signal; unsigned long stack; unsigned long stack_size; unsigned long tls; pid_t *set_tid; /* Number of elements in *set_tid */ size_t set_tid_size; int cgroup; int io_thread; struct cgroup *cgrp; struct css_set *cset; unsigned int kill_seq; }; /* * This serializes "schedule()" and also protects * the run-queue from deletions/modifications (but * _adding_ to the beginning of the run-queue has * a separate lock). */ extern rwlock_t tasklist_lock; extern spinlock_t mmlist_lock; extern union thread_union init_thread_union; extern struct task_struct init_task; extern int lockdep_tasklist_lock_is_held(void); extern asmlinkage void schedule_tail(struct task_struct *prev); extern void init_idle(struct task_struct *idle, int cpu); extern int sched_fork(unsigned long clone_flags, struct task_struct *p); extern void sched_cgroup_fork(struct task_struct *p, struct kernel_clone_args *kargs); extern void sched_post_fork(struct task_struct *p); extern void sched_dead(struct task_struct *p); void __noreturn do_task_dead(void); void __noreturn make_task_dead(int signr); extern void mm_cache_init(void); extern void proc_caches_init(void); extern void fork_init(void); extern void release_task(struct task_struct * p); extern int copy_thread(unsigned long, unsigned long, unsigned long, struct task_struct *, unsigned long); extern void flush_thread(void); #ifdef CONFIG_HAVE_EXIT_THREAD extern void exit_thread(struct task_struct *tsk); #else static inline void exit_thread(struct task_struct *tsk) { } #endif extern void do_group_exit(int); extern void exit_files(struct task_struct *); extern void exit_itimers(struct task_struct *); extern pid_t kernel_clone(struct kernel_clone_args *kargs); struct task_struct *create_io_thread(int (*fn)(void *), void *arg, int node); struct task_struct *fork_idle(int); extern pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); extern long kernel_wait4(pid_t, int __user *, int, struct rusage *); int kernel_wait(pid_t pid, int *stat); extern void free_task(struct task_struct *tsk); /* sched_exec is called by processes performing an exec */ #ifdef CONFIG_SMP extern void sched_exec(void); #else #define sched_exec() {} #endif static inline struct task_struct *get_task_struct(struct task_struct *t) { refcount_inc(&t->usage); return t; } extern void __put_task_struct(struct task_struct *t); extern void __put_task_struct_rcu_cb(struct rcu_head *rhp); static inline void put_task_struct(struct task_struct *t) { if (!refcount_dec_and_test(&t->usage)) return; /* * under PREEMPT_RT, we can't call put_task_struct * in atomic context because it will indirectly * acquire sleeping locks. * * call_rcu() will schedule delayed_put_task_struct_rcu() * to be called in process context. * * __put_task_struct() is called when * refcount_dec_and_test(&t->usage) succeeds. * * This means that it can't "conflict" with * put_task_struct_rcu_user() which abuses ->rcu the same * way; rcu_users has a reference so task->usage can't be * zero after rcu_users 1 -> 0 transition. * * delayed_free_task() also uses ->rcu, but it is only called * when it fails to fork a process. Therefore, there is no * way it can conflict with put_task_struct(). */ if (IS_ENABLED(CONFIG_PREEMPT_RT) && !preemptible()) call_rcu(&t->rcu, __put_task_struct_rcu_cb); else __put_task_struct(t); } DEFINE_FREE(put_task, struct task_struct *, if (_T) put_task_struct(_T)) static inline void put_task_struct_many(struct task_struct *t, int nr) { if (refcount_sub_and_test(nr, &t->usage)) __put_task_struct(t); } void put_task_struct_rcu_user(struct task_struct *task); #ifdef CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT extern int arch_task_struct_size __read_mostly; #else # define arch_task_struct_size (sizeof(struct task_struct)) #endif #ifndef CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST /* * If an architecture has not declared a thread_struct whitelist we * must assume something there may need to be copied to userspace. */ static inline void arch_thread_struct_whitelist(unsigned long *offset, unsigned long *size) { *offset = 0; /* Handle dynamically sized thread_struct. */ *size = arch_task_struct_size - offsetof(struct task_struct, thread); } #endif #ifdef CONFIG_VMAP_STACK static inline struct vm_struct *task_stack_vm_area(const struct task_struct *t) { return t->stack_vm_area; } #else static inline struct vm_struct *task_stack_vm_area(const struct task_struct *t) { return NULL; } #endif /* * Protects ->fs, ->files, ->mm, ->group_info, ->comm, keyring * subscriptions and synchronises with wait4(). Also used in procfs. Also * pins the final release of task.io_context. Also protects ->cpuset and * ->cgroup.subsys[]. And ->vfork_done. And ->sysvshm.shm_clist. * * Nests both inside and outside of read_lock(&tasklist_lock). * It must not be nested with write_lock_irq(&tasklist_lock), * neither inside nor outside. */ static inline void task_lock(struct task_struct *p) { spin_lock(&p->alloc_lock); } static inline void task_unlock(struct task_struct *p) { spin_unlock(&p->alloc_lock); } #endif /* _LINUX_SCHED_TASK_H */ PK ! ����� � sched/cpufreq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_CPUFREQ_H #define _LINUX_SCHED_CPUFREQ_H #include <linux/types.h> /* * Interface between cpufreq drivers and the scheduler: */ #define SCHED_CPUFREQ_IOWAIT (1U << 0) #ifdef CONFIG_CPU_FREQ struct cpufreq_policy; struct update_util_data { void (*func)(struct update_util_data *data, u64 time, unsigned int flags); }; void cpufreq_add_update_util_hook(int cpu, struct update_util_data *data, void (*func)(struct update_util_data *data, u64 time, unsigned int flags)); void cpufreq_remove_update_util_hook(int cpu); bool cpufreq_this_cpu_can_update(struct cpufreq_policy *policy); static inline unsigned long map_util_freq(unsigned long util, unsigned long freq, unsigned long cap) { return freq * util / cap; } static inline unsigned long map_util_perf(unsigned long util) { return util + (util >> 2); } #endif /* CONFIG_CPU_FREQ */ #endif /* _LINUX_SCHED_CPUFREQ_H */ PK ! ��=� � sched/sd_flags.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * sched-domains (multiprocessor balancing) flag declarations. */ #ifndef SD_FLAG # error "Incorrect import of SD flags definitions" #endif /* * Hierarchical metaflags * * SHARED_CHILD: These flags are meant to be set from the base domain upwards. * If a domain has this flag set, all of its children should have it set. This * is usually because the flag describes some shared resource (all CPUs in that * domain share the same resource), or because they are tied to a scheduling * behaviour that we want to disable at some point in the hierarchy for * scalability reasons. * * In those cases it doesn't make sense to have the flag set for a domain but * not have it in (some of) its children: sched domains ALWAYS span their child * domains, so operations done with parent domains will cover CPUs in the lower * child domains. * * * SHARED_PARENT: These flags are meant to be set from the highest domain * downwards. If a domain has this flag set, all of its parents should have it * set. This is usually for topology properties that start to appear above a * certain level (e.g. domain starts spanning CPUs outside of the base CPU's * socket). */ #define SDF_SHARED_CHILD 0x1 #define SDF_SHARED_PARENT 0x2 /* * Behavioural metaflags * * NEEDS_GROUPS: These flags are only relevant if the domain they are set on has * more than one group. This is usually for balancing flags (load balancing * involves equalizing a metric between groups), or for flags describing some * shared resource (which would be shared between groups). */ #define SDF_NEEDS_GROUPS 0x4 /* * Balance when about to become idle * * SHARED_CHILD: Set from the base domain up to cpuset.sched_relax_domain_level. * NEEDS_GROUPS: Load balancing flag. */ SD_FLAG(SD_BALANCE_NEWIDLE, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Balance on exec * * SHARED_CHILD: Set from the base domain up to the NUMA reclaim level. * NEEDS_GROUPS: Load balancing flag. */ SD_FLAG(SD_BALANCE_EXEC, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Balance on fork, clone * * SHARED_CHILD: Set from the base domain up to the NUMA reclaim level. * NEEDS_GROUPS: Load balancing flag. */ SD_FLAG(SD_BALANCE_FORK, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Balance on wakeup * * SHARED_CHILD: Set from the base domain up to cpuset.sched_relax_domain_level. * NEEDS_GROUPS: Load balancing flag. */ SD_FLAG(SD_BALANCE_WAKE, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Consider waking task on waking CPU. * * SHARED_CHILD: Set from the base domain up to the NUMA reclaim level. */ SD_FLAG(SD_WAKE_AFFINE, SDF_SHARED_CHILD) /* * Domain members have different CPU capacities * * SHARED_PARENT: Set from the topmost domain down to the first domain where * asymmetry is detected. * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups. */ SD_FLAG(SD_ASYM_CPUCAPACITY, SDF_SHARED_PARENT | SDF_NEEDS_GROUPS) /* * Domain members have different CPU capacities spanning all unique CPU * capacity values. * * SHARED_PARENT: Set from the topmost domain down to the first domain where * all available CPU capacities are visible * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups. */ SD_FLAG(SD_ASYM_CPUCAPACITY_FULL, SDF_SHARED_PARENT | SDF_NEEDS_GROUPS) /* * Domain members share CPU capacity (i.e. SMT) * * SHARED_CHILD: Set from the base domain up until spanned CPUs no longer share * CPU capacity. * NEEDS_GROUPS: Capacity is shared between groups. */ SD_FLAG(SD_SHARE_CPUCAPACITY, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Domain members share CPU package resources (i.e. caches) * * SHARED_CHILD: Set from the base domain up until spanned CPUs no longer share * the same cache(s). * NEEDS_GROUPS: Caches are shared between groups. */ SD_FLAG(SD_SHARE_PKG_RESOURCES, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Only a single load balancing instance * * SHARED_PARENT: Set for all NUMA levels above NODE. Could be set from a * different level upwards, but it doesn't change that if a * domain has this flag set, then all of its parents need to have * it too (otherwise the serialization doesn't make sense). * NEEDS_GROUPS: No point in preserving domain if it has a single group. */ SD_FLAG(SD_SERIALIZE, SDF_SHARED_PARENT | SDF_NEEDS_GROUPS) /* * Place busy tasks earlier in the domain * * SHARED_CHILD: Usually set on the SMT level. Technically could be set further * up, but currently assumed to be set from the base domain * upwards (see update_top_cache_domain()). * NEEDS_GROUPS: Load balancing flag. */ SD_FLAG(SD_ASYM_PACKING, SDF_SHARED_CHILD | SDF_NEEDS_GROUPS) /* * Prefer to place tasks in a sibling domain * * Set up until domains start spanning NUMA nodes. Close to being a SHARED_CHILD * flag, but cleared below domains with SD_ASYM_CPUCAPACITY. * * NEEDS_GROUPS: Load balancing flag. */ SD_FLAG(SD_PREFER_SIBLING, SDF_NEEDS_GROUPS) /* * sched_groups of this level overlap * * SHARED_PARENT: Set for all NUMA levels above NODE. * NEEDS_GROUPS: Overlaps can only exist with more than one group. */ SD_FLAG(SD_OVERLAP, SDF_SHARED_PARENT | SDF_NEEDS_GROUPS) /* * Cross-node balancing * * SHARED_PARENT: Set for all NUMA levels above NODE. * NEEDS_GROUPS: No point in preserving domain if it has a single group. */ SD_FLAG(SD_NUMA, SDF_SHARED_PARENT | SDF_NEEDS_GROUPS) PK ! ��4�_ _ sched/prio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_PRIO_H #define _LINUX_SCHED_PRIO_H #define MAX_NICE 19 #define MIN_NICE -20 #define NICE_WIDTH (MAX_NICE - MIN_NICE + 1) /* * Priority of a process goes from 0..MAX_PRIO-1, valid RT * priority is 0..MAX_RT_PRIO-1, and SCHED_NORMAL/SCHED_BATCH * tasks are in the range MAX_RT_PRIO..MAX_PRIO-1. Priority * values are inverted: lower p->prio value means higher priority. */ #define MAX_RT_PRIO 100 #define MAX_PRIO (MAX_RT_PRIO + NICE_WIDTH) #define DEFAULT_PRIO (MAX_RT_PRIO + NICE_WIDTH / 2) /* * Convert user-nice values [ -20 ... 0 ... 19 ] * to static priority [ MAX_RT_PRIO..MAX_PRIO-1 ], * and back. */ #define NICE_TO_PRIO(nice) ((nice) + DEFAULT_PRIO) #define PRIO_TO_NICE(prio) ((prio) - DEFAULT_PRIO) /* * Convert nice value [19,-20] to rlimit style value [1,40]. */ static inline long nice_to_rlimit(long nice) { return (MAX_NICE - nice + 1); } /* * Convert rlimit style value [1,40] to nice value [-20, 19]. */ static inline long rlimit_to_nice(long prio) { return (MAX_NICE - prio + 1); } #endif /* _LINUX_SCHED_PRIO_H */ PK ! 2 �� � sched/clock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_CLOCK_H #define _LINUX_SCHED_CLOCK_H #include <linux/smp.h> /* * Do not use outside of architecture code which knows its limitations. * * sched_clock() has no promise of monotonicity or bounded drift between * CPUs, use (which you should not) requires disabling IRQs. * * Please use one of the three interfaces below. */ extern unsigned long long notrace sched_clock(void); /* * See the comment in kernel/sched/clock.c */ extern u64 running_clock(void); extern u64 sched_clock_cpu(int cpu); extern void sched_clock_init(void); #ifndef CONFIG_HAVE_UNSTABLE_SCHED_CLOCK static inline void sched_clock_tick(void) { } static inline void clear_sched_clock_stable(void) { } static inline void sched_clock_idle_sleep_event(void) { } static inline void sched_clock_idle_wakeup_event(void) { } static inline u64 cpu_clock(int cpu) { return sched_clock(); } static inline u64 local_clock(void) { return sched_clock(); } #else extern int sched_clock_stable(void); extern void clear_sched_clock_stable(void); /* * When sched_clock_stable(), __sched_clock_offset provides the offset * between local_clock() and sched_clock(). */ extern u64 __sched_clock_offset; extern void sched_clock_tick(void); extern void sched_clock_tick_stable(void); extern void sched_clock_idle_sleep_event(void); extern void sched_clock_idle_wakeup_event(void); /* * As outlined in clock.c, provides a fast, high resolution, nanosecond * time source that is monotonic per cpu argument and has bounded drift * between cpus. * * ######################### BIG FAT WARNING ########################## * # when comparing cpu_clock(i) to cpu_clock(j) for i != j, time can # * # go backwards !! # * #################################################################### */ static inline u64 cpu_clock(int cpu) { return sched_clock_cpu(cpu); } static inline u64 local_clock(void) { return sched_clock_cpu(raw_smp_processor_id()); } #endif #ifdef CONFIG_IRQ_TIME_ACCOUNTING /* * An i/f to runtime opt-in for irq time accounting based off of sched_clock. * The reason for this explicit opt-in is not to have perf penalty with * slow sched_clocks. */ extern void enable_sched_clock_irqtime(void); extern void disable_sched_clock_irqtime(void); #else static inline void enable_sched_clock_irqtime(void) {} static inline void disable_sched_clock_irqtime(void) {} #endif #endif /* _LINUX_SCHED_CLOCK_H */ PK ! �Ȋ sched/numa_balancing.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_NUMA_BALANCING_H #define _LINUX_SCHED_NUMA_BALANCING_H /* * This is the interface between the scheduler and the MM that * implements memory access pattern based NUMA-balancing: */ #include <linux/sched.h> #define TNF_MIGRATED 0x01 #define TNF_NO_GROUP 0x02 #define TNF_SHARED 0x04 #define TNF_FAULT_LOCAL 0x08 #define TNF_MIGRATE_FAIL 0x10 #ifdef CONFIG_NUMA_BALANCING extern void task_numa_fault(int last_node, int node, int pages, int flags); extern pid_t task_numa_group_id(struct task_struct *p); extern void set_numabalancing_state(bool enabled); extern void task_numa_free(struct task_struct *p, bool final); extern bool should_numa_migrate_memory(struct task_struct *p, struct page *page, int src_nid, int dst_cpu); #else static inline void task_numa_fault(int last_node, int node, int pages, int flags) { } static inline pid_t task_numa_group_id(struct task_struct *p) { return 0; } static inline void set_numabalancing_state(bool enabled) { } static inline void task_numa_free(struct task_struct *p, bool final) { } static inline bool should_numa_migrate_memory(struct task_struct *p, struct page *page, int src_nid, int dst_cpu) { return true; } #endif #endif /* _LINUX_SCHED_NUMA_BALANCING_H */ PK ! �5�I I sched/sysctl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_SYSCTL_H #define _LINUX_SCHED_SYSCTL_H #include <linux/types.h> struct ctl_table; #ifdef CONFIG_DETECT_HUNG_TASK /* used for hung_task and block/ */ extern unsigned long sysctl_hung_task_timeout_secs; #else /* Avoid need for ifdefs elsewhere in the code */ enum { sysctl_hung_task_timeout_secs = 0 }; #endif extern unsigned int sysctl_sched_child_runs_first; enum sched_tunable_scaling { SCHED_TUNABLESCALING_NONE, SCHED_TUNABLESCALING_LOG, SCHED_TUNABLESCALING_LINEAR, SCHED_TUNABLESCALING_END, }; /* * control realtime throttling: * * /proc/sys/kernel/sched_rt_period_us * /proc/sys/kernel/sched_rt_runtime_us */ extern unsigned int sysctl_sched_rt_period; extern int sysctl_sched_rt_runtime; extern unsigned int sysctl_sched_dl_period_max; extern unsigned int sysctl_sched_dl_period_min; #ifdef CONFIG_UCLAMP_TASK extern unsigned int sysctl_sched_uclamp_util_min; extern unsigned int sysctl_sched_uclamp_util_max; extern unsigned int sysctl_sched_uclamp_util_min_rt_default; #endif #ifdef CONFIG_CFS_BANDWIDTH extern unsigned int sysctl_sched_cfs_bandwidth_slice; #endif #ifdef CONFIG_SCHED_AUTOGROUP extern unsigned int sysctl_sched_autogroup_enabled; #endif extern int sysctl_sched_rr_timeslice; extern int sched_rr_timeslice; int sched_rr_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int sched_rt_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int sysctl_sched_uclamp_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int sysctl_numa_balancing(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int sysctl_schedstats(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); #if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) extern unsigned int sysctl_sched_energy_aware; int sched_energy_aware_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); #endif #endif /* _LINUX_SCHED_SYSCTL_H */ PK ! ܉�� � sched/types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_TYPES_H #define _LINUX_SCHED_TYPES_H #include <linux/types.h> /** * struct task_cputime - collected CPU time counts * @stime: time spent in kernel mode, in nanoseconds * @utime: time spent in user mode, in nanoseconds * @sum_exec_runtime: total time spent on the CPU, in nanoseconds * * This structure groups together three kinds of CPU time that are tracked for * threads and thread groups. Most things considering CPU time want to group * these counts together and treat all three of them in parallel. */ struct task_cputime { u64 stime; u64 utime; unsigned long long sum_exec_runtime; }; #endif PK ! �!4� � sched/user.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_USER_H #define _LINUX_SCHED_USER_H #include <linux/uidgid.h> #include <linux/atomic.h> #include <linux/percpu_counter.h> #include <linux/refcount.h> #include <linux/ratelimit.h> /* * Some day this will be a full-fledged user tracking system.. */ struct user_struct { refcount_t __count; /* reference count */ #ifdef CONFIG_EPOLL struct percpu_counter epoll_watches; /* The number of file descriptors currently watched */ #endif unsigned long unix_inflight; /* How many files in flight in unix sockets */ atomic_long_t pipe_bufs; /* how many pages are allocated in pipe buffers */ /* Hash table maintenance information */ struct hlist_node uidhash_node; kuid_t uid; #if defined(CONFIG_PERF_EVENTS) || defined(CONFIG_BPF_SYSCALL) || \ defined(CONFIG_NET) || defined(CONFIG_IO_URING) || \ defined(CONFIG_VFIO_PCI_ZDEV_KVM) atomic_long_t locked_vm; #endif #ifdef CONFIG_WATCH_QUEUE atomic_t nr_watches; /* The number of watches this user currently has */ #endif /* Miscellaneous per-user rate limit */ struct ratelimit_state ratelimit; }; extern int uids_sysfs_init(void); extern struct user_struct *find_user(kuid_t); extern struct user_struct root_user; #define INIT_USER (&root_user) /* per-UID process charging. */ extern struct user_struct * alloc_uid(kuid_t); static inline struct user_struct *get_uid(struct user_struct *u) { refcount_inc(&u->__count); return u; } extern void free_uid(struct user_struct *); #endif /* _LINUX_SCHED_USER_H */ PK ! .�ET ET sched/signal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_SIGNAL_H #define _LINUX_SCHED_SIGNAL_H #include <linux/rculist.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/sched/jobctl.h> #include <linux/sched/task.h> #include <linux/cred.h> #include <linux/refcount.h> #include <linux/posix-timers.h> #include <linux/mm_types.h> #include <asm/ptrace.h> /* * Types defining task->signal and task->sighand and APIs using them: */ struct sighand_struct { spinlock_t siglock; refcount_t count; wait_queue_head_t signalfd_wqh; struct k_sigaction action[_NSIG]; }; /* * Per-process accounting stats: */ struct pacct_struct { int ac_flag; long ac_exitcode; unsigned long ac_mem; u64 ac_utime, ac_stime; unsigned long ac_minflt, ac_majflt; }; struct cpu_itimer { u64 expires; u64 incr; }; /* * This is the atomic variant of task_cputime, which can be used for * storing and updating task_cputime statistics without locking. */ struct task_cputime_atomic { atomic64_t utime; atomic64_t stime; atomic64_t sum_exec_runtime; }; #define INIT_CPUTIME_ATOMIC \ (struct task_cputime_atomic) { \ .utime = ATOMIC64_INIT(0), \ .stime = ATOMIC64_INIT(0), \ .sum_exec_runtime = ATOMIC64_INIT(0), \ } /** * struct thread_group_cputimer - thread group interval timer counts * @cputime_atomic: atomic thread group interval timers. * * This structure contains the version of task_cputime, above, that is * used for thread group CPU timer calculations. */ struct thread_group_cputimer { struct task_cputime_atomic cputime_atomic; }; struct multiprocess_signals { sigset_t signal; struct hlist_node node; }; /* * NOTE! "signal_struct" does not have its own * locking, because a shared signal_struct always * implies a shared sighand_struct, so locking * sighand_struct is always a proper superset of * the locking of signal_struct. */ struct signal_struct { refcount_t sigcnt; atomic_t live; int nr_threads; struct list_head thread_head; wait_queue_head_t wait_chldexit; /* for wait4() */ /* current thread group signal load-balancing target: */ struct task_struct *curr_target; /* shared signal handling: */ struct sigpending shared_pending; /* For collecting multiprocess signals during fork */ struct hlist_head multiprocess; /* thread group exit support */ int group_exit_code; /* overloaded: * - notify group_exit_task when ->count is equal to notify_count * - everyone except group_exit_task is stopped during signal delivery * of fatal signals, group_exit_task processes the signal. */ int notify_count; struct task_struct *group_exit_task; /* thread group stop support, overloads group_exit_code too */ int group_stop_count; unsigned int flags; /* see SIGNAL_* flags below */ /* * PR_SET_CHILD_SUBREAPER marks a process, like a service * manager, to re-parent orphan (double-forking) child processes * to this process instead of 'init'. The service manager is * able to receive SIGCHLD signals and is able to investigate * the process until it calls wait(). All children of this * process will inherit a flag if they should look for a * child_subreaper process at exit. */ unsigned int is_child_subreaper:1; unsigned int has_child_subreaper:1; #ifdef CONFIG_POSIX_TIMERS /* POSIX.1b Interval Timers */ unsigned int next_posix_timer_id; struct list_head posix_timers; /* ITIMER_REAL timer for the process */ struct hrtimer real_timer; ktime_t it_real_incr; /* * ITIMER_PROF and ITIMER_VIRTUAL timers for the process, we use * CPUCLOCK_PROF and CPUCLOCK_VIRT for indexing array as these * values are defined to 0 and 1 respectively */ struct cpu_itimer it[2]; /* * Thread group totals for process CPU timers. * See thread_group_cputimer(), et al, for details. */ struct thread_group_cputimer cputimer; #endif /* Empty if CONFIG_POSIX_TIMERS=n */ struct posix_cputimers posix_cputimers; /* PID/PID hash table linkage. */ struct pid *pids[PIDTYPE_MAX]; #ifdef CONFIG_NO_HZ_FULL atomic_t tick_dep_mask; #endif struct pid *tty_old_pgrp; /* boolean value for session group leader */ int leader; struct tty_struct *tty; /* NULL if no tty */ #ifdef CONFIG_SCHED_AUTOGROUP struct autogroup *autogroup; #endif /* * Cumulative resource counters for dead threads in the group, * and for reaped dead child processes forked by this group. * Live threads maintain their own counters and add to these * in __exit_signal, except for the group leader. */ seqlock_t stats_lock; u64 utime, stime, cutime, cstime; u64 gtime; u64 cgtime; struct prev_cputime prev_cputime; unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt; unsigned long inblock, oublock, cinblock, coublock; unsigned long maxrss, cmaxrss; struct task_io_accounting ioac; /* * Cumulative ns of schedule CPU time fo dead threads in the * group, not including a zombie group leader, (This only differs * from jiffies_to_ns(utime + stime) if sched_clock uses something * other than jiffies.) */ unsigned long long sum_sched_runtime; /* * We don't bother to synchronize most readers of this at all, * because there is no reader checking a limit that actually needs * to get both rlim_cur and rlim_max atomically, and either one * alone is a single word that can safely be read normally. * getrlimit/setrlimit use task_lock(current->group_leader) to * protect this instead of the siglock, because they really * have no need to disable irqs. */ struct rlimit rlim[RLIM_NLIMITS]; #ifdef CONFIG_BSD_PROCESS_ACCT struct pacct_struct pacct; /* per-process accounting information */ #endif #ifdef CONFIG_TASKSTATS struct taskstats *stats; #endif #ifdef CONFIG_AUDIT unsigned audit_tty; struct tty_audit_buf *tty_audit_buf; #endif /* * Thread is the potential origin of an oom condition; kill first on * oom */ bool oom_flag_origin; short oom_score_adj; /* OOM kill score adjustment */ short oom_score_adj_min; /* OOM kill score adjustment min value. * Only settable by CAP_SYS_RESOURCE. */ struct mm_struct *oom_mm; /* recorded mm when the thread group got * killed by the oom killer */ struct mutex cred_guard_mutex; /* guard against foreign influences on * credential calculations * (notably. ptrace) * Deprecated do not use in new code. * Use exec_update_lock instead. */ struct rw_semaphore exec_update_lock; /* Held while task_struct is * being updated during exec, * and may have inconsistent * permissions. */ } __randomize_layout; /* * Bits in flags field of signal_struct. */ #define SIGNAL_STOP_STOPPED 0x00000001 /* job control stop in effect */ #define SIGNAL_STOP_CONTINUED 0x00000002 /* SIGCONT since WCONTINUED reap */ #define SIGNAL_GROUP_EXIT 0x00000004 /* group exit in progress */ #define SIGNAL_GROUP_COREDUMP 0x00000008 /* coredump in progress */ /* * Pending notifications to parent. */ #define SIGNAL_CLD_STOPPED 0x00000010 #define SIGNAL_CLD_CONTINUED 0x00000020 #define SIGNAL_CLD_MASK (SIGNAL_CLD_STOPPED|SIGNAL_CLD_CONTINUED) #define SIGNAL_UNKILLABLE 0x00000040 /* for init: ignore fatal signals */ #define SIGNAL_STOP_MASK (SIGNAL_CLD_MASK | SIGNAL_STOP_STOPPED | \ SIGNAL_STOP_CONTINUED) static inline void signal_set_stop_flags(struct signal_struct *sig, unsigned int flags) { WARN_ON(sig->flags & (SIGNAL_GROUP_EXIT|SIGNAL_GROUP_COREDUMP)); sig->flags = (sig->flags & ~SIGNAL_STOP_MASK) | flags; } /* If true, all threads except ->group_exit_task have pending SIGKILL */ static inline int signal_group_exit(const struct signal_struct *sig) { return (sig->flags & SIGNAL_GROUP_EXIT) || (sig->group_exit_task != NULL); } extern void flush_signals(struct task_struct *); extern void ignore_signals(struct task_struct *); extern void flush_signal_handlers(struct task_struct *, int force_default); extern int dequeue_signal(struct task_struct *task, sigset_t *mask, kernel_siginfo_t *info); static inline int kernel_dequeue_signal(void) { struct task_struct *task = current; kernel_siginfo_t __info; int ret; spin_lock_irq(&task->sighand->siglock); ret = dequeue_signal(task, &task->blocked, &__info); spin_unlock_irq(&task->sighand->siglock); return ret; } static inline void kernel_signal_stop(void) { spin_lock_irq(¤t->sighand->siglock); if (current->jobctl & JOBCTL_STOP_DEQUEUED) set_special_state(TASK_STOPPED); spin_unlock_irq(¤t->sighand->siglock); schedule(); } #ifdef __ia64__ # define ___ARCH_SI_IA64(_a1, _a2, _a3) , _a1, _a2, _a3 #else # define ___ARCH_SI_IA64(_a1, _a2, _a3) #endif int force_sig_fault_to_task(int sig, int code, void __user *addr ___ARCH_SI_IA64(int imm, unsigned int flags, unsigned long isr) , struct task_struct *t); int force_sig_fault(int sig, int code, void __user *addr ___ARCH_SI_IA64(int imm, unsigned int flags, unsigned long isr)); int send_sig_fault(int sig, int code, void __user *addr ___ARCH_SI_IA64(int imm, unsigned int flags, unsigned long isr) , struct task_struct *t); int force_sig_mceerr(int code, void __user *, short); int send_sig_mceerr(int code, void __user *, short, struct task_struct *); int force_sig_bnderr(void __user *addr, void __user *lower, void __user *upper); int force_sig_pkuerr(void __user *addr, u32 pkey); int send_sig_perf(void __user *addr, u32 type, u64 sig_data); int force_sig_ptrace_errno_trap(int errno, void __user *addr); int force_sig_fault_trapno(int sig, int code, void __user *addr, int trapno); int send_sig_fault_trapno(int sig, int code, void __user *addr, int trapno, struct task_struct *t); int force_sig_seccomp(int syscall, int reason, bool force_coredump); extern int send_sig_info(int, struct kernel_siginfo *, struct task_struct *); extern void force_sigsegv(int sig); extern int force_sig_info(struct kernel_siginfo *); extern int __kill_pgrp_info(int sig, struct kernel_siginfo *info, struct pid *pgrp); extern int kill_pid_info(int sig, struct kernel_siginfo *info, struct pid *pid); extern int kill_pid_usb_asyncio(int sig, int errno, sigval_t addr, struct pid *, const struct cred *); extern int kill_pgrp(struct pid *pid, int sig, int priv); extern int kill_pid(struct pid *pid, int sig, int priv); extern __must_check bool do_notify_parent(struct task_struct *, int); extern void __wake_up_parent(struct task_struct *p, struct task_struct *parent); extern void force_sig(int); extern void force_fatal_sig(int); extern void force_exit_sig(int); extern int send_sig(int, struct task_struct *, int); extern int zap_other_threads(struct task_struct *p); extern struct sigqueue *sigqueue_alloc(void); extern void sigqueue_free(struct sigqueue *); extern int send_sigqueue(struct sigqueue *, struct pid *, enum pid_type); extern int do_sigaction(int, struct k_sigaction *, struct k_sigaction *); static inline void clear_notify_signal(void) { clear_thread_flag(TIF_NOTIFY_SIGNAL); smp_mb__after_atomic(); } static inline int restart_syscall(void) { set_tsk_thread_flag(current, TIF_SIGPENDING); return -ERESTARTNOINTR; } static inline int task_sigpending(struct task_struct *p) { return unlikely(test_tsk_thread_flag(p,TIF_SIGPENDING)); } static inline int signal_pending(struct task_struct *p) { /* * TIF_NOTIFY_SIGNAL isn't really a signal, but it requires the same * behavior in terms of ensuring that we break out of wait loops * so that notify signal callbacks can be processed. */ if (unlikely(test_tsk_thread_flag(p, TIF_NOTIFY_SIGNAL))) return 1; return task_sigpending(p); } static inline int __fatal_signal_pending(struct task_struct *p) { return unlikely(sigismember(&p->pending.signal, SIGKILL)); } static inline int fatal_signal_pending(struct task_struct *p) { return task_sigpending(p) && __fatal_signal_pending(p); } static inline int signal_pending_state(unsigned int state, struct task_struct *p) { if (!(state & (TASK_INTERRUPTIBLE | TASK_WAKEKILL))) return 0; if (!signal_pending(p)) return 0; return (state & TASK_INTERRUPTIBLE) || __fatal_signal_pending(p); } /* * This should only be used in fault handlers to decide whether we * should stop the current fault routine to handle the signals * instead, especially with the case where we've got interrupted with * a VM_FAULT_RETRY. */ static inline bool fault_signal_pending(vm_fault_t fault_flags, struct pt_regs *regs) { return unlikely((fault_flags & VM_FAULT_RETRY) && (fatal_signal_pending(current) || (user_mode(regs) && signal_pending(current)))); } /* * Reevaluate whether the task has signals pending delivery. * Wake the task if so. * This is required every time the blocked sigset_t changes. * callers must hold sighand->siglock. */ extern void recalc_sigpending_and_wake(struct task_struct *t); extern void recalc_sigpending(void); extern void calculate_sigpending(void); extern void signal_wake_up_state(struct task_struct *t, unsigned int state); static inline void signal_wake_up(struct task_struct *t, bool resume) { signal_wake_up_state(t, resume ? TASK_WAKEKILL : 0); } static inline void ptrace_signal_wake_up(struct task_struct *t, bool resume) { signal_wake_up_state(t, resume ? __TASK_TRACED : 0); } void task_join_group_stop(struct task_struct *task); #ifdef TIF_RESTORE_SIGMASK /* * Legacy restore_sigmask accessors. These are inefficient on * SMP architectures because they require atomic operations. */ /** * set_restore_sigmask() - make sure saved_sigmask processing gets done * * This sets TIF_RESTORE_SIGMASK and ensures that the arch signal code * will run before returning to user mode, to process the flag. For * all callers, TIF_SIGPENDING is already set or it's no harm to set * it. TIF_RESTORE_SIGMASK need not be in the set of bits that the * arch code will notice on return to user mode, in case those bits * are scarce. We set TIF_SIGPENDING here to ensure that the arch * signal code always gets run when TIF_RESTORE_SIGMASK is set. */ static inline void set_restore_sigmask(void) { set_thread_flag(TIF_RESTORE_SIGMASK); } static inline void clear_tsk_restore_sigmask(struct task_struct *task) { clear_tsk_thread_flag(task, TIF_RESTORE_SIGMASK); } static inline void clear_restore_sigmask(void) { clear_thread_flag(TIF_RESTORE_SIGMASK); } static inline bool test_tsk_restore_sigmask(struct task_struct *task) { return test_tsk_thread_flag(task, TIF_RESTORE_SIGMASK); } static inline bool test_restore_sigmask(void) { return test_thread_flag(TIF_RESTORE_SIGMASK); } static inline bool test_and_clear_restore_sigmask(void) { return test_and_clear_thread_flag(TIF_RESTORE_SIGMASK); } #else /* TIF_RESTORE_SIGMASK */ /* Higher-quality implementation, used if TIF_RESTORE_SIGMASK doesn't exist. */ static inline void set_restore_sigmask(void) { current->restore_sigmask = true; } static inline void clear_tsk_restore_sigmask(struct task_struct *task) { task->restore_sigmask = false; } static inline void clear_restore_sigmask(void) { current->restore_sigmask = false; } static inline bool test_restore_sigmask(void) { return current->restore_sigmask; } static inline bool test_tsk_restore_sigmask(struct task_struct *task) { return task->restore_sigmask; } static inline bool test_and_clear_restore_sigmask(void) { if (!current->restore_sigmask) return false; current->restore_sigmask = false; return true; } #endif static inline void restore_saved_sigmask(void) { if (test_and_clear_restore_sigmask()) __set_current_blocked(¤t->saved_sigmask); } extern int set_user_sigmask(const sigset_t __user *umask, size_t sigsetsize); static inline void restore_saved_sigmask_unless(bool interrupted) { if (interrupted) WARN_ON(!signal_pending(current)); else restore_saved_sigmask(); } static inline sigset_t *sigmask_to_save(void) { sigset_t *res = ¤t->blocked; if (unlikely(test_restore_sigmask())) res = ¤t->saved_sigmask; return res; } static inline int kill_cad_pid(int sig, int priv) { return kill_pid(cad_pid, sig, priv); } /* These can be the second arg to send_sig_info/send_group_sig_info. */ #define SEND_SIG_NOINFO ((struct kernel_siginfo *) 0) #define SEND_SIG_PRIV ((struct kernel_siginfo *) 1) static inline int __on_sig_stack(unsigned long sp) { #ifdef CONFIG_STACK_GROWSUP return sp >= current->sas_ss_sp && sp - current->sas_ss_sp < current->sas_ss_size; #else return sp > current->sas_ss_sp && sp - current->sas_ss_sp <= current->sas_ss_size; #endif } /* * True if we are on the alternate signal stack. */ static inline int on_sig_stack(unsigned long sp) { /* * If the signal stack is SS_AUTODISARM then, by construction, we * can't be on the signal stack unless user code deliberately set * SS_AUTODISARM when we were already on it. * * This improves reliability: if user state gets corrupted such that * the stack pointer points very close to the end of the signal stack, * then this check will enable the signal to be handled anyway. */ if (current->sas_ss_flags & SS_AUTODISARM) return 0; return __on_sig_stack(sp); } static inline int sas_ss_flags(unsigned long sp) { if (!current->sas_ss_size) return SS_DISABLE; return on_sig_stack(sp) ? SS_ONSTACK : 0; } static inline void sas_ss_reset(struct task_struct *p) { p->sas_ss_sp = 0; p->sas_ss_size = 0; p->sas_ss_flags = SS_DISABLE; } static inline unsigned long sigsp(unsigned long sp, struct ksignal *ksig) { if (unlikely((ksig->ka.sa.sa_flags & SA_ONSTACK)) && ! sas_ss_flags(sp)) #ifdef CONFIG_STACK_GROWSUP return current->sas_ss_sp; #else return current->sas_ss_sp + current->sas_ss_size; #endif return sp; } extern void __cleanup_sighand(struct sighand_struct *); extern void flush_itimer_signals(void); #define tasklist_empty() \ list_empty(&init_task.tasks) #define next_task(p) \ list_entry_rcu((p)->tasks.next, struct task_struct, tasks) #define for_each_process(p) \ for (p = &init_task ; (p = next_task(p)) != &init_task ; ) extern bool current_is_single_threaded(void); /* * Careful: do_each_thread/while_each_thread is a double loop so * 'break' will not work as expected - use goto instead. */ #define do_each_thread(g, t) \ for (g = t = &init_task ; (g = t = next_task(g)) != &init_task ; ) do #define while_each_thread(g, t) \ while ((t = next_thread(t)) != g) #define __for_each_thread(signal, t) \ list_for_each_entry_rcu(t, &(signal)->thread_head, thread_node) #define for_each_thread(p, t) \ __for_each_thread((p)->signal, t) /* Careful: this is a double loop, 'break' won't work as expected. */ #define for_each_process_thread(p, t) \ for_each_process(p) for_each_thread(p, t) typedef int (*proc_visitor)(struct task_struct *p, void *data); void walk_process_tree(struct task_struct *top, proc_visitor, void *); static inline struct pid *task_pid_type(struct task_struct *task, enum pid_type type) { struct pid *pid; if (type == PIDTYPE_PID) pid = task_pid(task); else pid = task->signal->pids[type]; return pid; } static inline struct pid *task_tgid(struct task_struct *task) { return task->signal->pids[PIDTYPE_TGID]; } /* * Without tasklist or RCU lock it is not safe to dereference * the result of task_pgrp/task_session even if task == current, * we can race with another thread doing sys_setsid/sys_setpgid. */ static inline struct pid *task_pgrp(struct task_struct *task) { return task->signal->pids[PIDTYPE_PGID]; } static inline struct pid *task_session(struct task_struct *task) { return task->signal->pids[PIDTYPE_SID]; } static inline int get_nr_threads(struct task_struct *task) { return task->signal->nr_threads; } static inline bool thread_group_leader(struct task_struct *p) { return p->exit_signal >= 0; } static inline bool same_thread_group(struct task_struct *p1, struct task_struct *p2) { return p1->signal == p2->signal; } static inline struct task_struct *next_thread(const struct task_struct *p) { return list_entry_rcu(p->thread_group.next, struct task_struct, thread_group); } static inline int thread_group_empty(struct task_struct *p) { return list_empty(&p->thread_group); } #define delay_group_leader(p) \ (thread_group_leader(p) && !thread_group_empty(p)) extern bool thread_group_exited(struct pid *pid); extern struct sighand_struct *__lock_task_sighand(struct task_struct *task, unsigned long *flags); static inline struct sighand_struct *lock_task_sighand(struct task_struct *task, unsigned long *flags) { struct sighand_struct *ret; ret = __lock_task_sighand(task, flags); (void)__cond_lock(&task->sighand->siglock, ret); return ret; } static inline void unlock_task_sighand(struct task_struct *task, unsigned long *flags) { spin_unlock_irqrestore(&task->sighand->siglock, *flags); } #ifdef CONFIG_LOCKDEP extern void lockdep_assert_task_sighand_held(struct task_struct *task); #else static inline void lockdep_assert_task_sighand_held(struct task_struct *task) { } #endif static inline unsigned long task_rlimit(const struct task_struct *task, unsigned int limit) { return READ_ONCE(task->signal->rlim[limit].rlim_cur); } static inline unsigned long task_rlimit_max(const struct task_struct *task, unsigned int limit) { return READ_ONCE(task->signal->rlim[limit].rlim_max); } static inline unsigned long rlimit(unsigned int limit) { return task_rlimit(current, limit); } static inline unsigned long rlimit_max(unsigned int limit) { return task_rlimit_max(current, limit); } #endif /* _LINUX_SCHED_SIGNAL_H */ PK ! o̠n� � sched/cputime.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_CPUTIME_H #define _LINUX_SCHED_CPUTIME_H #include <linux/sched/signal.h> /* * cputime accounting APIs: */ #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE #include <asm/cputime.h> #ifndef cputime_to_nsecs # define cputime_to_nsecs(__ct) \ (cputime_to_usecs(__ct) * NSEC_PER_USEC) #endif #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN extern void task_cputime(struct task_struct *t, u64 *utime, u64 *stime); extern u64 task_gtime(struct task_struct *t); #else static inline void task_cputime(struct task_struct *t, u64 *utime, u64 *stime) { *utime = t->utime; *stime = t->stime; } static inline u64 task_gtime(struct task_struct *t) { return t->gtime; } #endif #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME static inline void task_cputime_scaled(struct task_struct *t, u64 *utimescaled, u64 *stimescaled) { *utimescaled = t->utimescaled; *stimescaled = t->stimescaled; } #else static inline void task_cputime_scaled(struct task_struct *t, u64 *utimescaled, u64 *stimescaled) { task_cputime(t, utimescaled, stimescaled); } #endif extern void task_cputime_adjusted(struct task_struct *p, u64 *ut, u64 *st); extern void thread_group_cputime_adjusted(struct task_struct *p, u64 *ut, u64 *st); extern void cputime_adjust(struct task_cputime *curr, struct prev_cputime *prev, u64 *ut, u64 *st); /* * Thread group CPU time accounting. */ void thread_group_cputime(struct task_struct *tsk, struct task_cputime *times); void thread_group_sample_cputime(struct task_struct *tsk, u64 *samples); /* * The following are functions that support scheduler-internal time accounting. * These functions are generally called at the timer tick. None of this depends * on CONFIG_SCHEDSTATS. */ /** * get_running_cputimer - return &tsk->signal->cputimer if cputimers are active * * @tsk: Pointer to target task. */ #ifdef CONFIG_POSIX_TIMERS static inline struct thread_group_cputimer *get_running_cputimer(struct task_struct *tsk) { struct thread_group_cputimer *cputimer = &tsk->signal->cputimer; /* * Check whether posix CPU timers are active. If not the thread * group accounting is not active either. Lockless check. */ if (!READ_ONCE(tsk->signal->posix_cputimers.timers_active)) return NULL; /* * After we flush the task's sum_exec_runtime to sig->sum_sched_runtime * in __exit_signal(), we won't account to the signal struct further * cputime consumed by that task, even though the task can still be * ticking after __exit_signal(). * * In order to keep a consistent behaviour between thread group cputime * and thread group cputimer accounting, lets also ignore the cputime * elapsing after __exit_signal() in any thread group timer running. * * This makes sure that POSIX CPU clocks and timers are synchronized, so * that a POSIX CPU timer won't expire while the corresponding POSIX CPU * clock delta is behind the expiring timer value. */ if (unlikely(!tsk->sighand)) return NULL; return cputimer; } #else static inline struct thread_group_cputimer *get_running_cputimer(struct task_struct *tsk) { return NULL; } #endif /** * account_group_user_time - Maintain utime for a thread group. * * @tsk: Pointer to task structure. * @cputime: Time value by which to increment the utime field of the * thread_group_cputime structure. * * If thread group time is being maintained, get the structure for the * running CPU and update the utime field there. */ static inline void account_group_user_time(struct task_struct *tsk, u64 cputime) { struct thread_group_cputimer *cputimer = get_running_cputimer(tsk); if (!cputimer) return; atomic64_add(cputime, &cputimer->cputime_atomic.utime); } /** * account_group_system_time - Maintain stime for a thread group. * * @tsk: Pointer to task structure. * @cputime: Time value by which to increment the stime field of the * thread_group_cputime structure. * * If thread group time is being maintained, get the structure for the * running CPU and update the stime field there. */ static inline void account_group_system_time(struct task_struct *tsk, u64 cputime) { struct thread_group_cputimer *cputimer = get_running_cputimer(tsk); if (!cputimer) return; atomic64_add(cputime, &cputimer->cputime_atomic.stime); } /** * account_group_exec_runtime - Maintain exec runtime for a thread group. * * @tsk: Pointer to task structure. * @ns: Time value by which to increment the sum_exec_runtime field * of the thread_group_cputime structure. * * If thread group time is being maintained, get the structure for the * running CPU and update the sum_exec_runtime field there. */ static inline void account_group_exec_runtime(struct task_struct *tsk, unsigned long long ns) { struct thread_group_cputimer *cputimer = get_running_cputimer(tsk); if (!cputimer) return; atomic64_add(ns, &cputimer->cputime_atomic.sum_exec_runtime); } static inline void prev_cputime_init(struct prev_cputime *prev) { #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE prev->utime = prev->stime = 0; raw_spin_lock_init(&prev->lock); #endif } extern unsigned long long task_sched_runtime(struct task_struct *task); #endif /* _LINUX_SCHED_CPUTIME_H */ PK ! 2<�� � sched/deadline.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * SCHED_DEADLINE tasks has negative priorities, reflecting * the fact that any of them has higher prio than RT and * NORMAL/BATCH tasks. */ #define MAX_DL_PRIO 0 static inline int dl_prio(int prio) { if (unlikely(prio < MAX_DL_PRIO)) return 1; return 0; } static inline int dl_task(struct task_struct *p) { return dl_prio(p->prio); } static inline bool dl_time_before(u64 a, u64 b) { return (s64)(a - b) < 0; } #ifdef CONFIG_SMP struct root_domain; extern void dl_add_task_root_domain(struct task_struct *p); extern void dl_clear_root_domain(struct root_domain *rd); #endif /* CONFIG_SMP */ PK ! 3��U� � sched/autogroup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_AUTOGROUP_H #define _LINUX_SCHED_AUTOGROUP_H struct signal_struct; struct task_struct; struct task_group; struct seq_file; #ifdef CONFIG_SCHED_AUTOGROUP extern void sched_autogroup_create_attach(struct task_struct *p); extern void sched_autogroup_detach(struct task_struct *p); extern void sched_autogroup_fork(struct signal_struct *sig); extern void sched_autogroup_exit(struct signal_struct *sig); extern void sched_autogroup_exit_task(struct task_struct *p); #ifdef CONFIG_PROC_FS extern void proc_sched_autogroup_show_task(struct task_struct *p, struct seq_file *m); extern int proc_sched_autogroup_set_nice(struct task_struct *p, int nice); #endif #else static inline void sched_autogroup_create_attach(struct task_struct *p) { } static inline void sched_autogroup_detach(struct task_struct *p) { } static inline void sched_autogroup_fork(struct signal_struct *sig) { } static inline void sched_autogroup_exit(struct signal_struct *sig) { } static inline void sched_autogroup_exit_task(struct task_struct *p) { } #endif #ifdef CONFIG_CGROUP_SCHED extern struct task_group root_task_group; #endif /* CONFIG_CGROUP_SCHED */ #endif /* _LINUX_SCHED_AUTOGROUP_H */ PK ! �*�:� � sched/rt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_RT_H #define _LINUX_SCHED_RT_H #include <linux/sched.h> struct task_struct; static inline int rt_prio(int prio) { if (unlikely(prio < MAX_RT_PRIO)) return 1; return 0; } static inline int rt_task(struct task_struct *p) { return rt_prio(p->prio); } static inline bool task_is_realtime(struct task_struct *tsk) { int policy = tsk->policy; if (policy == SCHED_FIFO || policy == SCHED_RR) return true; if (policy == SCHED_DEADLINE) return true; return false; } #ifdef CONFIG_RT_MUTEXES /* * Must hold either p->pi_lock or task_rq(p)->lock. */ static inline struct task_struct *rt_mutex_get_top_task(struct task_struct *p) { return p->pi_top_task; } extern void rt_mutex_setprio(struct task_struct *p, struct task_struct *pi_task); extern void rt_mutex_adjust_pi(struct task_struct *p); #else static inline struct task_struct *rt_mutex_get_top_task(struct task_struct *task) { return NULL; } # define rt_mutex_adjust_pi(p) do { } while (0) #endif extern void normalize_rt_tasks(void); /* * default timeslice is 100 msecs (used only for SCHED_RR tasks). * Timeslices get refilled after they expire. */ #define RR_TIMESLICE (100 * HZ / 1000) #endif /* _LINUX_SCHED_RT_H */ PK ! ���o o sched/task_stack.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_TASK_STACK_H #define _LINUX_SCHED_TASK_STACK_H /* * task->stack (kernel stack) handling interfaces: */ #include <linux/sched.h> #include <linux/magic.h> #include <linux/kasan.h> #ifdef CONFIG_THREAD_INFO_IN_TASK /* * When accessing the stack of a non-current task that might exit, use * try_get_task_stack() instead. task_stack_page will return a pointer * that could get freed out from under you. */ static __always_inline void *task_stack_page(const struct task_struct *task) { return task->stack; } #define setup_thread_stack(new,old) do { } while(0) static __always_inline unsigned long *end_of_stack(const struct task_struct *task) { #ifdef CONFIG_STACK_GROWSUP return (unsigned long *)((unsigned long)task->stack + THREAD_SIZE) - 1; #else return task->stack; #endif } #elif !defined(__HAVE_THREAD_FUNCTIONS) #define task_stack_page(task) ((void *)(task)->stack) static inline void setup_thread_stack(struct task_struct *p, struct task_struct *org) { *task_thread_info(p) = *task_thread_info(org); task_thread_info(p)->task = p; } /* * Return the address of the last usable long on the stack. * * When the stack grows down, this is just above the thread * info struct. Going any lower will corrupt the threadinfo. * * When the stack grows up, this is the highest address. * Beyond that position, we corrupt data on the next page. */ static inline unsigned long *end_of_stack(struct task_struct *p) { #ifdef CONFIG_STACK_GROWSUP return (unsigned long *)((unsigned long)task_thread_info(p) + THREAD_SIZE) - 1; #else return (unsigned long *)(task_thread_info(p) + 1); #endif } #endif #ifdef CONFIG_THREAD_INFO_IN_TASK static inline void *try_get_task_stack(struct task_struct *tsk) { return refcount_inc_not_zero(&tsk->stack_refcount) ? task_stack_page(tsk) : NULL; } extern void put_task_stack(struct task_struct *tsk); #else static inline void *try_get_task_stack(struct task_struct *tsk) { return task_stack_page(tsk); } static inline void put_task_stack(struct task_struct *tsk) {} #endif #define task_stack_end_corrupted(task) \ (*(end_of_stack(task)) != STACK_END_MAGIC) static inline int object_is_on_stack(const void *obj) { void *stack = task_stack_page(current); obj = kasan_reset_tag(obj); return (obj >= stack) && (obj < (stack + THREAD_SIZE)); } extern void thread_stack_cache_init(void); #ifdef CONFIG_DEBUG_STACK_USAGE static inline unsigned long stack_not_used(struct task_struct *p) { unsigned long *n = end_of_stack(p); do { /* Skip over canary */ # ifdef CONFIG_STACK_GROWSUP n--; # else n++; # endif } while (!*n); # ifdef CONFIG_STACK_GROWSUP return (unsigned long)end_of_stack(p) - (unsigned long)n; # else return (unsigned long)n - (unsigned long)end_of_stack(p); # endif } #endif extern void set_task_stack_end_magic(struct task_struct *tsk); #ifndef __HAVE_ARCH_KSTACK_END static inline int kstack_end(void *addr) { /* Reliable end of stack detection: * Some APM bios versions misalign the stack */ return !(((unsigned long)addr+sizeof(void*)-1) & (THREAD_SIZE-sizeof(void*))); } #endif #endif /* _LINUX_SCHED_TASK_STACK_H */ PK ! rK�Q� � sched/debug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_DEBUG_H #define _LINUX_SCHED_DEBUG_H /* * Various scheduler/task debugging interfaces: */ struct task_struct; struct pid_namespace; extern void dump_cpu_task(int cpu); /* * Only dump TASK_* tasks. (0 for all tasks) */ extern void show_state_filter(unsigned int state_filter); static inline void show_state(void) { show_state_filter(0); } struct pt_regs; extern void show_regs(struct pt_regs *); /* * TASK is a pointer to the task whose backtrace we want to see (or NULL for current * task), SP is the stack pointer of the first frame that should be shown in the back * trace (or NULL if the entire call-chain of the task should be shown). */ extern void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl); extern void sched_show_task(struct task_struct *p); #ifdef CONFIG_SCHED_DEBUG struct seq_file; extern void proc_sched_show_task(struct task_struct *p, struct pid_namespace *ns, struct seq_file *m); extern void proc_sched_set_task(struct task_struct *p); #endif /* Attach to any functions which should be ignored in wchan output. */ #define __sched __section(".sched.text") /* Linker adds these: start and end of __sched functions */ extern char __sched_text_start[], __sched_text_end[]; /* Is this address in the __sched functions? */ extern int in_sched_functions(unsigned long addr); #endif /* _LINUX_SCHED_DEBUG_H */ PK ! � o�V V sched/xacct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_XACCT_H #define _LINUX_SCHED_XACCT_H /* * Extended task accounting methods: */ #include <linux/sched.h> #ifdef CONFIG_TASK_XACCT static inline void add_rchar(struct task_struct *tsk, ssize_t amt) { tsk->ioac.rchar += amt; } static inline void add_wchar(struct task_struct *tsk, ssize_t amt) { tsk->ioac.wchar += amt; } static inline void inc_syscr(struct task_struct *tsk) { tsk->ioac.syscr++; } static inline void inc_syscw(struct task_struct *tsk) { tsk->ioac.syscw++; } #else static inline void add_rchar(struct task_struct *tsk, ssize_t amt) { } static inline void add_wchar(struct task_struct *tsk, ssize_t amt) { } static inline void inc_syscr(struct task_struct *tsk) { } static inline void inc_syscw(struct task_struct *tsk) { } #endif #endif /* _LINUX_SCHED_XACCT_H */ PK ! �w� b b sched/idle.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_IDLE_H #define _LINUX_SCHED_IDLE_H #include <linux/sched.h> enum cpu_idle_type { CPU_IDLE, CPU_NOT_IDLE, CPU_NEWLY_IDLE, CPU_MAX_IDLE_TYPES }; #ifdef CONFIG_SMP extern void wake_up_if_idle(int cpu); #else static inline void wake_up_if_idle(int cpu) { } #endif /* * Idle thread specific functions to determine the need_resched * polling state. */ #ifdef TIF_POLLING_NRFLAG static inline void __current_set_polling(void) { set_thread_flag(TIF_POLLING_NRFLAG); } static inline bool __must_check current_set_polling_and_test(void) { __current_set_polling(); /* * Polling state must be visible before we test NEED_RESCHED, * paired by resched_curr() */ smp_mb__after_atomic(); return unlikely(tif_need_resched()); } static inline void __current_clr_polling(void) { clear_thread_flag(TIF_POLLING_NRFLAG); } static inline bool __must_check current_clr_polling_and_test(void) { __current_clr_polling(); /* * Polling state must be visible before we test NEED_RESCHED, * paired by resched_curr() */ smp_mb__after_atomic(); return unlikely(tif_need_resched()); } #else static inline void __current_set_polling(void) { } static inline void __current_clr_polling(void) { } static inline bool __must_check current_set_polling_and_test(void) { return unlikely(tif_need_resched()); } static inline bool __must_check current_clr_polling_and_test(void) { return unlikely(tif_need_resched()); } #endif static inline void current_clr_polling(void) { __current_clr_polling(); /* * Ensure we check TIF_NEED_RESCHED after we clear the polling bit. * Once the bit is cleared, we'll get IPIs with every new * TIF_NEED_RESCHED and the IPI handler, scheduler_ipi(), will also * fold. */ smp_mb(); /* paired with resched_curr() */ preempt_fold_need_resched(); } #endif /* _LINUX_SCHED_IDLE_H */ PK ! K��w w sched/stat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_STAT_H #define _LINUX_SCHED_STAT_H #include <linux/percpu.h> #include <linux/kconfig.h> /* * Various counters maintained by the scheduler and fork(), * exposed via /proc, sys.c or used by drivers via these APIs. * * ( Note that all these values are acquired without locking, * so they can only be relied on in narrow circumstances. ) */ extern unsigned long total_forks; extern int nr_threads; DECLARE_PER_CPU(unsigned long, process_counts); extern int nr_processes(void); extern unsigned int nr_running(void); extern bool single_task_running(void); extern unsigned int nr_iowait(void); extern unsigned int nr_iowait_cpu(int cpu); static inline int sched_info_on(void) { return IS_ENABLED(CONFIG_SCHED_INFO); } #ifdef CONFIG_SCHEDSTATS void force_schedstat_enabled(void); #endif #endif /* _LINUX_SCHED_STAT_H */ PK ! �~ � sched/nohz.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_NOHZ_H #define _LINUX_SCHED_NOHZ_H /* * This is the interface between the scheduler and nohz/dynticks: */ #if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ_COMMON) extern void nohz_balance_enter_idle(int cpu); extern int get_nohz_timer_target(void); #else static inline void nohz_balance_enter_idle(int cpu) { } #endif #ifdef CONFIG_NO_HZ_COMMON void calc_load_nohz_start(void); void calc_load_nohz_remote(struct rq *rq); void calc_load_nohz_stop(void); #else static inline void calc_load_nohz_start(void) { } static inline void calc_load_nohz_remote(struct rq *rq) { } static inline void calc_load_nohz_stop(void) { } #endif /* CONFIG_NO_HZ_COMMON */ #if defined(CONFIG_NO_HZ_COMMON) && defined(CONFIG_SMP) extern void wake_up_nohz_cpu(int cpu); #else static inline void wake_up_nohz_cpu(int cpu) { } #endif #endif /* _LINUX_SCHED_NOHZ_H */ PK ! ��]h� � sched/init.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_INIT_H #define _LINUX_SCHED_INIT_H /* * Scheduler init related prototypes: */ extern void sched_init(void); extern void sched_init_smp(void); #endif /* _LINUX_SCHED_INIT_H */ PK ! Ф�0 0 sched/isolation.hnu �[��� #ifndef _LINUX_SCHED_ISOLATION_H #define _LINUX_SCHED_ISOLATION_H #include <linux/cpumask.h> #include <linux/init.h> #include <linux/tick.h> enum hk_flags { HK_FLAG_TIMER = 1, HK_FLAG_RCU = (1 << 1), HK_FLAG_MISC = (1 << 2), HK_FLAG_SCHED = (1 << 3), HK_FLAG_TICK = (1 << 4), HK_FLAG_DOMAIN = (1 << 5), HK_FLAG_WQ = (1 << 6), HK_FLAG_MANAGED_IRQ = (1 << 7), HK_FLAG_KTHREAD = (1 << 8), }; #ifdef CONFIG_CPU_ISOLATION DECLARE_STATIC_KEY_FALSE(housekeeping_overridden); extern int housekeeping_any_cpu(enum hk_flags flags); extern const struct cpumask *housekeeping_cpumask(enum hk_flags flags); extern bool housekeeping_enabled(enum hk_flags flags); extern void housekeeping_affine(struct task_struct *t, enum hk_flags flags); extern bool housekeeping_test_cpu(int cpu, enum hk_flags flags); extern void __init housekeeping_init(void); #else static inline int housekeeping_any_cpu(enum hk_flags flags) { return smp_processor_id(); } static inline const struct cpumask *housekeeping_cpumask(enum hk_flags flags) { return cpu_possible_mask; } static inline bool housekeeping_enabled(enum hk_flags flags) { return false; } static inline void housekeeping_affine(struct task_struct *t, enum hk_flags flags) { } static inline void housekeeping_init(void) { } #endif /* CONFIG_CPU_ISOLATION */ static inline bool housekeeping_cpu(int cpu, enum hk_flags flags) { #ifdef CONFIG_CPU_ISOLATION if (static_branch_unlikely(&housekeeping_overridden)) return housekeeping_test_cpu(cpu, flags); #endif return true; } #endif /* _LINUX_SCHED_ISOLATION_H */ PK ! ^��� � sched/coredump.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_COREDUMP_H #define _LINUX_SCHED_COREDUMP_H #include <linux/mm_types.h> #define SUID_DUMP_DISABLE 0 /* No setuid dumping */ #define SUID_DUMP_USER 1 /* Dump as user of process */ #define SUID_DUMP_ROOT 2 /* Dump as root */ /* mm flags */ /* for SUID_DUMP_* above */ #define MMF_DUMPABLE_BITS 2 #define MMF_DUMPABLE_MASK ((1 << MMF_DUMPABLE_BITS) - 1) extern void set_dumpable(struct mm_struct *mm, int value); /* * This returns the actual value of the suid_dumpable flag. For things * that are using this for checking for privilege transitions, it must * test against SUID_DUMP_USER rather than treating it as a boolean * value. */ static inline int __get_dumpable(unsigned long mm_flags) { return mm_flags & MMF_DUMPABLE_MASK; } static inline int get_dumpable(struct mm_struct *mm) { return __get_dumpable(mm->flags); } /* coredump filter bits */ #define MMF_DUMP_ANON_PRIVATE 2 #define MMF_DUMP_ANON_SHARED 3 #define MMF_DUMP_MAPPED_PRIVATE 4 #define MMF_DUMP_MAPPED_SHARED 5 #define MMF_DUMP_ELF_HEADERS 6 #define MMF_DUMP_HUGETLB_PRIVATE 7 #define MMF_DUMP_HUGETLB_SHARED 8 #define MMF_DUMP_DAX_PRIVATE 9 #define MMF_DUMP_DAX_SHARED 10 #define MMF_DUMP_FILTER_SHIFT MMF_DUMPABLE_BITS #define MMF_DUMP_FILTER_BITS 9 #define MMF_DUMP_FILTER_MASK \ (((1 << MMF_DUMP_FILTER_BITS) - 1) << MMF_DUMP_FILTER_SHIFT) #define MMF_DUMP_FILTER_DEFAULT \ ((1 << MMF_DUMP_ANON_PRIVATE) | (1 << MMF_DUMP_ANON_SHARED) |\ (1 << MMF_DUMP_HUGETLB_PRIVATE) | MMF_DUMP_MASK_DEFAULT_ELF) #ifdef CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS # define MMF_DUMP_MASK_DEFAULT_ELF (1 << MMF_DUMP_ELF_HEADERS) #else # define MMF_DUMP_MASK_DEFAULT_ELF 0 #endif /* leave room for more dump flags */ #define MMF_VM_MERGEABLE 16 /* KSM may merge identical pages */ #define MMF_VM_HUGEPAGE 17 /* set when VM_HUGEPAGE is set on vma */ /* * This one-shot flag is dropped due to necessity of changing exe once again * on NFS restore */ //#define MMF_EXE_FILE_CHANGED 18 /* see prctl_set_mm_exe_file() */ #define MMF_HAS_UPROBES 19 /* has uprobes */ #define MMF_RECALC_UPROBES 20 /* MMF_HAS_UPROBES can be wrong */ #define MMF_OOM_SKIP 21 /* mm is of no interest for the OOM killer */ #define MMF_UNSTABLE 22 /* mm is unstable for copy_from_user */ #define MMF_HUGE_ZERO_PAGE 23 /* mm has ever used the global huge zero page */ #define MMF_DISABLE_THP 24 /* disable THP for all VMAs */ #define MMF_OOM_VICTIM 25 /* mm is the oom victim */ #define MMF_OOM_REAP_QUEUED 26 /* mm was queued for oom_reaper */ #define MMF_MULTIPROCESS 27 /* mm is shared between processes */ /* * MMF_HAS_PINNED: Whether this mm has pinned any pages. This can be either * replaced in the future by mm.pinned_vm when it becomes stable, or grow into * a counter on its own. We're aggresive on this bit for now: even if the * pinned pages were unpinned later on, we'll still keep this bit set for the * lifecycle of this mm, just for simplicity. */ #define MMF_HAS_PINNED 28 /* FOLL_PIN has run, never cleared */ #define MMF_DISABLE_THP_MASK (1 << MMF_DISABLE_THP) #define MMF_INIT_MASK (MMF_DUMPABLE_MASK | MMF_DUMP_FILTER_MASK |\ MMF_DISABLE_THP_MASK) #endif /* _LINUX_SCHED_COREDUMP_H */ PK ! �jFI sched/topology.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_TOPOLOGY_H #define _LINUX_SCHED_TOPOLOGY_H #include <linux/topology.h> #include <linux/sched/idle.h> /* * sched-domains (multiprocessor balancing) declarations: */ #ifdef CONFIG_SMP /* Generate SD flag indexes */ #define SD_FLAG(name, mflags) __##name, enum { #include <linux/sched/sd_flags.h> __SD_FLAG_CNT, }; #undef SD_FLAG /* Generate SD flag bits */ #define SD_FLAG(name, mflags) name = 1 << __##name, enum { #include <linux/sched/sd_flags.h> }; #undef SD_FLAG #ifdef CONFIG_SCHED_DEBUG struct sd_flag_debug { unsigned int meta_flags; char *name; }; extern const struct sd_flag_debug sd_flag_debug[]; #endif #ifdef CONFIG_SCHED_SMT static inline int cpu_smt_flags(void) { return SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES; } #endif #ifdef CONFIG_SCHED_MC static inline int cpu_core_flags(void) { return SD_SHARE_PKG_RESOURCES; } #endif #ifdef CONFIG_NUMA static inline int cpu_numa_flags(void) { return SD_NUMA; } #endif extern int arch_asym_cpu_priority(int cpu); struct sched_domain_attr { int relax_domain_level; }; #define SD_ATTR_INIT (struct sched_domain_attr) { \ .relax_domain_level = -1, \ } extern int sched_domain_level_max; struct sched_group; struct sched_domain_shared { atomic_t ref; atomic_t nr_busy_cpus; int has_idle_cores; int nr_idle_scan; }; struct sched_domain { /* These fields must be setup */ struct sched_domain __rcu *parent; /* top domain must be null terminated */ struct sched_domain __rcu *child; /* bottom domain must be null terminated */ struct sched_group *groups; /* the balancing groups of the domain */ unsigned long min_interval; /* Minimum balance interval ms */ unsigned long max_interval; /* Maximum balance interval ms */ unsigned int busy_factor; /* less balancing by factor if busy */ unsigned int imbalance_pct; /* No balance until over watermark */ unsigned int cache_nice_tries; /* Leave cache hot tasks for # tries */ int nohz_idle; /* NOHZ IDLE status */ int flags; /* See SD_* */ int level; /* Runtime fields. */ unsigned long last_balance; /* init to jiffies. units in jiffies */ unsigned int balance_interval; /* initialise to 1. units in ms. */ unsigned int nr_balance_failed; /* initialise to 0 */ /* idle_balance() stats */ u64 max_newidle_lb_cost; unsigned long next_decay_max_lb_cost; u64 avg_scan_cost; /* select_idle_sibling */ #ifdef CONFIG_SCHEDSTATS /* load_balance() stats */ unsigned int lb_count[CPU_MAX_IDLE_TYPES]; unsigned int lb_failed[CPU_MAX_IDLE_TYPES]; unsigned int lb_balanced[CPU_MAX_IDLE_TYPES]; unsigned int lb_imbalance[CPU_MAX_IDLE_TYPES]; unsigned int lb_gained[CPU_MAX_IDLE_TYPES]; unsigned int lb_hot_gained[CPU_MAX_IDLE_TYPES]; unsigned int lb_nobusyg[CPU_MAX_IDLE_TYPES]; unsigned int lb_nobusyq[CPU_MAX_IDLE_TYPES]; /* Active load balancing */ unsigned int alb_count; unsigned int alb_failed; unsigned int alb_pushed; /* SD_BALANCE_EXEC stats */ unsigned int sbe_count; unsigned int sbe_balanced; unsigned int sbe_pushed; /* SD_BALANCE_FORK stats */ unsigned int sbf_count; unsigned int sbf_balanced; unsigned int sbf_pushed; /* try_to_wake_up() stats */ unsigned int ttwu_wake_remote; unsigned int ttwu_move_affine; unsigned int ttwu_move_balance; #endif #ifdef CONFIG_SCHED_DEBUG char *name; #endif union { void *private; /* used during construction */ struct rcu_head rcu; /* used during destruction */ }; struct sched_domain_shared *shared; unsigned int span_weight; /* * Span of all CPUs in this domain. * * NOTE: this field is variable length. (Allocated dynamically * by attaching extra space to the end of the structure, * depending on how many CPUs the kernel has booted up with) */ unsigned long span[]; }; static inline struct cpumask *sched_domain_span(struct sched_domain *sd) { return to_cpumask(sd->span); } extern void partition_sched_domains_locked(int ndoms_new, cpumask_var_t doms_new[], struct sched_domain_attr *dattr_new); extern void partition_sched_domains(int ndoms_new, cpumask_var_t doms_new[], struct sched_domain_attr *dattr_new); /* Allocate an array of sched domains, for partition_sched_domains(). */ cpumask_var_t *alloc_sched_domains(unsigned int ndoms); void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms); bool cpus_share_cache(int this_cpu, int that_cpu); typedef const struct cpumask *(*sched_domain_mask_f)(int cpu); typedef int (*sched_domain_flags_f)(void); #define SDTL_OVERLAP 0x01 struct sd_data { struct sched_domain *__percpu *sd; struct sched_domain_shared *__percpu *sds; struct sched_group *__percpu *sg; struct sched_group_capacity *__percpu *sgc; }; struct sched_domain_topology_level { sched_domain_mask_f mask; sched_domain_flags_f sd_flags; int flags; int numa_level; struct sd_data data; #ifdef CONFIG_SCHED_DEBUG char *name; #endif }; extern void set_sched_topology(struct sched_domain_topology_level *tl); #ifdef CONFIG_SCHED_DEBUG # define SD_INIT_NAME(type) .name = #type #else # define SD_INIT_NAME(type) #endif #else /* CONFIG_SMP */ struct sched_domain_attr; static inline void partition_sched_domains_locked(int ndoms_new, cpumask_var_t doms_new[], struct sched_domain_attr *dattr_new) { } static inline void partition_sched_domains(int ndoms_new, cpumask_var_t doms_new[], struct sched_domain_attr *dattr_new) { } static inline bool cpus_share_cache(int this_cpu, int that_cpu) { return true; } #endif /* !CONFIG_SMP */ #if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) extern void rebuild_sched_domains_energy(void); #else static inline void rebuild_sched_domains_energy(void) { } #endif #ifndef arch_scale_cpu_capacity /** * arch_scale_cpu_capacity - get the capacity scale factor of a given CPU. * @cpu: the CPU in question. * * Return: the CPU scale factor normalized against SCHED_CAPACITY_SCALE, i.e. * * max_perf(cpu) * ----------------------------- * SCHED_CAPACITY_SCALE * max(max_perf(c) : c \in CPUs) */ static __always_inline unsigned long arch_scale_cpu_capacity(int cpu) { return SCHED_CAPACITY_SCALE; } #endif #ifndef arch_scale_thermal_pressure static __always_inline unsigned long arch_scale_thermal_pressure(int cpu) { return 0; } #endif #ifndef arch_set_thermal_pressure static __always_inline void arch_set_thermal_pressure(const struct cpumask *cpus, unsigned long th_pressure) { } #endif static inline int task_node(const struct task_struct *p) { return cpu_to_node(task_cpu(p)); } #endif /* _LINUX_SCHED_TOPOLOGY_H */ PK ! )"���, �, sched/mm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_MM_H #define _LINUX_SCHED_MM_H #include <linux/kernel.h> #include <linux/atomic.h> #include <linux/sched.h> #include <linux/mm_types.h> #include <linux/gfp.h> #include <linux/sync_core.h> /* * Routines for handling mm_structs */ extern struct mm_struct *mm_alloc(void); /** * mmgrab() - Pin a &struct mm_struct. * @mm: The &struct mm_struct to pin. * * Make sure that @mm will not get freed even after the owning task * exits. This doesn't guarantee that the associated address space * will still exist later on and mmget_not_zero() has to be used before * accessing it. * * This is a preferred way to pin @mm for a longer/unbounded amount * of time. * * Use mmdrop() to release the reference acquired by mmgrab(). * * See also <Documentation/vm/active_mm.rst> for an in-depth explanation * of &mm_struct.mm_count vs &mm_struct.mm_users. */ static inline void mmgrab(struct mm_struct *mm) { atomic_inc(&mm->mm_count); } extern void __mmdrop(struct mm_struct *mm); static inline void mmdrop(struct mm_struct *mm) { /* * The implicit full barrier implied by atomic_dec_and_test() is * required by the membarrier system call before returning to * user-space, after storing to rq->curr. */ if (unlikely(atomic_dec_and_test(&mm->mm_count))) __mmdrop(mm); } /** * mmget() - Pin the address space associated with a &struct mm_struct. * @mm: The address space to pin. * * Make sure that the address space of the given &struct mm_struct doesn't * go away. This does not protect against parts of the address space being * modified or freed, however. * * Never use this function to pin this address space for an * unbounded/indefinite amount of time. * * Use mmput() to release the reference acquired by mmget(). * * See also <Documentation/vm/active_mm.rst> for an in-depth explanation * of &mm_struct.mm_count vs &mm_struct.mm_users. */ static inline void mmget(struct mm_struct *mm) { atomic_inc(&mm->mm_users); } static inline bool mmget_not_zero(struct mm_struct *mm) { return atomic_inc_not_zero(&mm->mm_users); } /* mmput gets rid of the mappings and all user-space */ extern void mmput(struct mm_struct *); #ifdef CONFIG_MMU /* same as above but performs the slow path from the async context. Can * be called from the atomic context as well */ void mmput_async(struct mm_struct *); #endif /* Grab a reference to a task's mm, if it is not already going away */ extern struct mm_struct *get_task_mm(struct task_struct *task); /* * Grab a reference to a task's mm, if it is not already going away * and ptrace_may_access with the mode parameter passed to it * succeeds. */ extern struct mm_struct *mm_access(struct task_struct *task, unsigned int mode); /* Remove the current tasks stale references to the old mm_struct on exit() */ extern void exit_mm_release(struct task_struct *, struct mm_struct *); /* Remove the current tasks stale references to the old mm_struct on exec() */ extern void exec_mm_release(struct task_struct *, struct mm_struct *); #ifdef CONFIG_MEMCG extern void mm_update_next_owner(struct mm_struct *mm); #else static inline void mm_update_next_owner(struct mm_struct *mm) { } #endif /* CONFIG_MEMCG */ #ifdef CONFIG_MMU #ifndef arch_get_mmap_end #define arch_get_mmap_end(addr) (TASK_SIZE) #endif #ifndef arch_get_mmap_base #define arch_get_mmap_base(addr, base) (base) #endif extern void arch_pick_mmap_layout(struct mm_struct *mm, struct rlimit *rlim_stack); extern unsigned long arch_get_unmapped_area(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); extern unsigned long arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags); #else static inline void arch_pick_mmap_layout(struct mm_struct *mm, struct rlimit *rlim_stack) {} #endif static inline bool in_vfork(struct task_struct *tsk) { bool ret; /* * need RCU to access ->real_parent if CLONE_VM was used along with * CLONE_PARENT. * * We check real_parent->mm == tsk->mm because CLONE_VFORK does not * imply CLONE_VM * * CLONE_VFORK can be used with CLONE_PARENT/CLONE_THREAD and thus * ->real_parent is not necessarily the task doing vfork(), so in * theory we can't rely on task_lock() if we want to dereference it. * * And in this case we can't trust the real_parent->mm == tsk->mm * check, it can be false negative. But we do not care, if init or * another oom-unkillable task does this it should blame itself. */ rcu_read_lock(); ret = tsk->vfork_done && rcu_dereference(tsk->real_parent)->mm == tsk->mm; rcu_read_unlock(); return ret; } /* * Applies per-task gfp context to the given allocation flags. * PF_MEMALLOC_NOIO implies GFP_NOIO * PF_MEMALLOC_NOFS implies GFP_NOFS * PF_MEMALLOC_PIN implies !GFP_MOVABLE */ static inline gfp_t current_gfp_context(gfp_t flags) { unsigned int pflags = READ_ONCE(current->flags); if (unlikely(pflags & (PF_MEMALLOC_NOIO | PF_MEMALLOC_NOFS | PF_MEMALLOC_PIN))) { /* * NOIO implies both NOIO and NOFS and it is a weaker context * so always make sure it makes precedence */ if (pflags & PF_MEMALLOC_NOIO) flags &= ~(__GFP_IO | __GFP_FS); else if (pflags & PF_MEMALLOC_NOFS) flags &= ~__GFP_FS; if (pflags & PF_MEMALLOC_PIN) flags &= ~__GFP_MOVABLE; } return flags; } #ifdef CONFIG_LOCKDEP extern void __fs_reclaim_acquire(unsigned long ip); extern void __fs_reclaim_release(unsigned long ip); extern void fs_reclaim_acquire(gfp_t gfp_mask); extern void fs_reclaim_release(gfp_t gfp_mask); #else static inline void __fs_reclaim_acquire(unsigned long ip) { } static inline void __fs_reclaim_release(unsigned long ip) { } static inline void fs_reclaim_acquire(gfp_t gfp_mask) { } static inline void fs_reclaim_release(gfp_t gfp_mask) { } #endif /** * might_alloc - Mark possible allocation sites * @gfp_mask: gfp_t flags that would be used to allocate * * Similar to might_sleep() and other annotations, this can be used in functions * that might allocate, but often don't. Compiles to nothing without * CONFIG_LOCKDEP. Includes a conditional might_sleep() if @gfp allows blocking. */ static inline void might_alloc(gfp_t gfp_mask) { fs_reclaim_acquire(gfp_mask); fs_reclaim_release(gfp_mask); might_sleep_if(gfpflags_allow_blocking(gfp_mask)); } /** * memalloc_noio_save - Marks implicit GFP_NOIO allocation scope. * * This functions marks the beginning of the GFP_NOIO allocation scope. * All further allocations will implicitly drop __GFP_IO flag and so * they are safe for the IO critical section from the allocation recursion * point of view. Use memalloc_noio_restore to end the scope with flags * returned by this function. * * This function is safe to be used from any context. */ static inline unsigned int memalloc_noio_save(void) { unsigned int flags = current->flags & PF_MEMALLOC_NOIO; current->flags |= PF_MEMALLOC_NOIO; return flags; } /** * memalloc_noio_restore - Ends the implicit GFP_NOIO scope. * @flags: Flags to restore. * * Ends the implicit GFP_NOIO scope started by memalloc_noio_save function. * Always make sure that the given flags is the return value from the * pairing memalloc_noio_save call. */ static inline void memalloc_noio_restore(unsigned int flags) { current->flags = (current->flags & ~PF_MEMALLOC_NOIO) | flags; } /** * memalloc_nofs_save - Marks implicit GFP_NOFS allocation scope. * * This functions marks the beginning of the GFP_NOFS allocation scope. * All further allocations will implicitly drop __GFP_FS flag and so * they are safe for the FS critical section from the allocation recursion * point of view. Use memalloc_nofs_restore to end the scope with flags * returned by this function. * * This function is safe to be used from any context. */ static inline unsigned int memalloc_nofs_save(void) { unsigned int flags = current->flags & PF_MEMALLOC_NOFS; current->flags |= PF_MEMALLOC_NOFS; return flags; } /** * memalloc_nofs_restore - Ends the implicit GFP_NOFS scope. * @flags: Flags to restore. * * Ends the implicit GFP_NOFS scope started by memalloc_nofs_save function. * Always make sure that the given flags is the return value from the * pairing memalloc_nofs_save call. */ static inline void memalloc_nofs_restore(unsigned int flags) { current->flags = (current->flags & ~PF_MEMALLOC_NOFS) | flags; } static inline unsigned int memalloc_noreclaim_save(void) { unsigned int flags = current->flags & PF_MEMALLOC; current->flags |= PF_MEMALLOC; return flags; } static inline void memalloc_noreclaim_restore(unsigned int flags) { current->flags = (current->flags & ~PF_MEMALLOC) | flags; } static inline unsigned int memalloc_pin_save(void) { unsigned int flags = current->flags & PF_MEMALLOC_PIN; current->flags |= PF_MEMALLOC_PIN; return flags; } static inline void memalloc_pin_restore(unsigned int flags) { current->flags = (current->flags & ~PF_MEMALLOC_PIN) | flags; } #ifdef CONFIG_MEMCG DECLARE_PER_CPU(struct mem_cgroup *, int_active_memcg); /** * set_active_memcg - Starts the remote memcg charging scope. * @memcg: memcg to charge. * * This function marks the beginning of the remote memcg charging scope. All the * __GFP_ACCOUNT allocations till the end of the scope will be charged to the * given memcg. * * NOTE: This function can nest. Users must save the return value and * reset the previous value after their own charging scope is over. */ static inline struct mem_cgroup * set_active_memcg(struct mem_cgroup *memcg) { struct mem_cgroup *old; if (!in_task()) { old = this_cpu_read(int_active_memcg); this_cpu_write(int_active_memcg, memcg); } else { old = current->active_memcg; current->active_memcg = memcg; } return old; } #else static inline struct mem_cgroup * set_active_memcg(struct mem_cgroup *memcg) { return NULL; } #endif #ifdef CONFIG_MEMBARRIER enum { MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY = (1U << 0), MEMBARRIER_STATE_PRIVATE_EXPEDITED = (1U << 1), MEMBARRIER_STATE_GLOBAL_EXPEDITED_READY = (1U << 2), MEMBARRIER_STATE_GLOBAL_EXPEDITED = (1U << 3), MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE_READY = (1U << 4), MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE = (1U << 5), MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ_READY = (1U << 6), MEMBARRIER_STATE_PRIVATE_EXPEDITED_RSEQ = (1U << 7), }; enum { MEMBARRIER_FLAG_SYNC_CORE = (1U << 0), MEMBARRIER_FLAG_RSEQ = (1U << 1), }; #ifdef CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS #include <asm/membarrier.h> #endif static inline void membarrier_mm_sync_core_before_usermode(struct mm_struct *mm) { if (current->mm != mm) return; if (likely(!(atomic_read(&mm->membarrier_state) & MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE))) return; sync_core_before_usermode(); } extern void membarrier_exec_mmap(struct mm_struct *mm); extern void membarrier_update_current_mm(struct mm_struct *next_mm); #else #ifdef CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS static inline void membarrier_arch_switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { } #endif static inline void membarrier_exec_mmap(struct mm_struct *mm) { } static inline void membarrier_mm_sync_core_before_usermode(struct mm_struct *mm) { } static inline void membarrier_update_current_mm(struct mm_struct *next_mm) { } #endif #endif /* _LINUX_SCHED_MM_H */ PK ! �,b� � sched/hotplug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_HOTPLUG_H #define _LINUX_SCHED_HOTPLUG_H /* * Scheduler interfaces for hotplug CPU support: */ extern int sched_cpu_starting(unsigned int cpu); extern int sched_cpu_activate(unsigned int cpu); extern int sched_cpu_deactivate(unsigned int cpu); #ifdef CONFIG_HOTPLUG_CPU extern int sched_cpu_wait_empty(unsigned int cpu); extern int sched_cpu_dying(unsigned int cpu); #else # define sched_cpu_wait_empty NULL # define sched_cpu_dying NULL #endif #ifdef CONFIG_HOTPLUG_CPU extern void idle_task_exit(void); #else static inline void idle_task_exit(void) {} #endif #endif /* _LINUX_SCHED_HOTPLUG_H */ PK ! ���Ti i htcpld.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_HTCPLD_H #define __LINUX_HTCPLD_H struct htcpld_chip_platform_data { unsigned int addr; unsigned int reset; unsigned int num_gpios; unsigned int gpio_out_base; unsigned int gpio_in_base; unsigned int irq_base; unsigned int num_irqs; }; struct htcpld_core_platform_data { unsigned int int_reset_gpio_hi; unsigned int int_reset_gpio_lo; unsigned int i2c_adapter_id; struct htcpld_chip_platform_data *chip; unsigned int num_chip; }; #endif /* __LINUX_HTCPLD_H */ PK ! �[n&! &! capability.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This is <linux/capability.h> * * Andrew G. Morgan <morgan@kernel.org> * Alexander Kjeldaas <astor@guardian.no> * with help from Aleph1, Roland Buresund and Andrew Main. * * See here for the libcap library ("POSIX draft" compliance): * * ftp://www.kernel.org/pub/linux/libs/security/linux-privs/kernel-2.6/ */ #ifndef _LINUX_CAPABILITY_H #define _LINUX_CAPABILITY_H #include <uapi/linux/capability.h> #include <linux/uidgid.h> #define _KERNEL_CAPABILITY_VERSION _LINUX_CAPABILITY_VERSION_3 #define _KERNEL_CAPABILITY_U32S _LINUX_CAPABILITY_U32S_3 extern int file_caps_enabled; typedef struct kernel_cap_struct { __u32 cap[_KERNEL_CAPABILITY_U32S]; } kernel_cap_t; /* same as vfs_ns_cap_data but in cpu endian and always filled completely */ struct cpu_vfs_cap_data { __u32 magic_etc; kernel_cap_t permitted; kernel_cap_t inheritable; kuid_t rootid; }; #define _USER_CAP_HEADER_SIZE (sizeof(struct __user_cap_header_struct)) #define _KERNEL_CAP_T_SIZE (sizeof(kernel_cap_t)) struct file; struct inode; struct dentry; struct task_struct; struct user_namespace; extern const kernel_cap_t __cap_empty_set; extern const kernel_cap_t __cap_init_eff_set; /* * Internal kernel functions only */ #define CAP_FOR_EACH_U32(__capi) \ for (__capi = 0; __capi < _KERNEL_CAPABILITY_U32S; ++__capi) /* * CAP_FS_MASK and CAP_NFSD_MASKS: * * The fs mask is all the privileges that fsuid==0 historically meant. * At one time in the past, that included CAP_MKNOD and CAP_LINUX_IMMUTABLE. * * It has never meant setting security.* and trusted.* xattrs. * * We could also define fsmask as follows: * 1. CAP_FS_MASK is the privilege to bypass all fs-related DAC permissions * 2. The security.* and trusted.* xattrs are fs-related MAC permissions */ # define CAP_FS_MASK_B0 (CAP_TO_MASK(CAP_CHOWN) \ | CAP_TO_MASK(CAP_MKNOD) \ | CAP_TO_MASK(CAP_DAC_OVERRIDE) \ | CAP_TO_MASK(CAP_DAC_READ_SEARCH) \ | CAP_TO_MASK(CAP_FOWNER) \ | CAP_TO_MASK(CAP_FSETID)) # define CAP_FS_MASK_B1 (CAP_TO_MASK(CAP_MAC_OVERRIDE)) #if _KERNEL_CAPABILITY_U32S != 2 # error Fix up hand-coded capability macro initializers #else /* HAND-CODED capability initializers */ #define CAP_LAST_U32 ((_KERNEL_CAPABILITY_U32S) - 1) #define CAP_LAST_U32_VALID_MASK (CAP_TO_MASK(CAP_LAST_CAP + 1) -1) # define CAP_EMPTY_SET ((kernel_cap_t){{ 0, 0 }}) # define CAP_FULL_SET ((kernel_cap_t){{ ~0, CAP_LAST_U32_VALID_MASK }}) # define CAP_FS_SET ((kernel_cap_t){{ CAP_FS_MASK_B0 \ | CAP_TO_MASK(CAP_LINUX_IMMUTABLE), \ CAP_FS_MASK_B1 } }) # define CAP_NFSD_SET ((kernel_cap_t){{ CAP_FS_MASK_B0 \ | CAP_TO_MASK(CAP_SYS_RESOURCE), \ CAP_FS_MASK_B1 } }) #endif /* _KERNEL_CAPABILITY_U32S != 2 */ # define cap_clear(c) do { (c) = __cap_empty_set; } while (0) #define cap_raise(c, flag) ((c).cap[CAP_TO_INDEX(flag)] |= CAP_TO_MASK(flag)) #define cap_lower(c, flag) ((c).cap[CAP_TO_INDEX(flag)] &= ~CAP_TO_MASK(flag)) #define cap_raised(c, flag) ((c).cap[CAP_TO_INDEX(flag)] & CAP_TO_MASK(flag)) #define CAP_BOP_ALL(c, a, b, OP) \ do { \ unsigned __capi; \ CAP_FOR_EACH_U32(__capi) { \ c.cap[__capi] = a.cap[__capi] OP b.cap[__capi]; \ } \ } while (0) #define CAP_UOP_ALL(c, a, OP) \ do { \ unsigned __capi; \ CAP_FOR_EACH_U32(__capi) { \ c.cap[__capi] = OP a.cap[__capi]; \ } \ } while (0) static inline kernel_cap_t cap_combine(const kernel_cap_t a, const kernel_cap_t b) { kernel_cap_t dest; CAP_BOP_ALL(dest, a, b, |); return dest; } static inline kernel_cap_t cap_intersect(const kernel_cap_t a, const kernel_cap_t b) { kernel_cap_t dest; CAP_BOP_ALL(dest, a, b, &); return dest; } static inline kernel_cap_t cap_drop(const kernel_cap_t a, const kernel_cap_t drop) { kernel_cap_t dest; CAP_BOP_ALL(dest, a, drop, &~); return dest; } static inline kernel_cap_t cap_invert(const kernel_cap_t c) { kernel_cap_t dest; CAP_UOP_ALL(dest, c, ~); return dest; } static inline bool cap_isclear(const kernel_cap_t a) { unsigned __capi; CAP_FOR_EACH_U32(__capi) { if (a.cap[__capi] != 0) return false; } return true; } /* * Check if "a" is a subset of "set". * return true if ALL of the capabilities in "a" are also in "set" * cap_issubset(0101, 1111) will return true * return false if ANY of the capabilities in "a" are not in "set" * cap_issubset(1111, 0101) will return false */ static inline bool cap_issubset(const kernel_cap_t a, const kernel_cap_t set) { kernel_cap_t dest; dest = cap_drop(a, set); return cap_isclear(dest); } /* Used to decide between falling back on the old suser() or fsuser(). */ static inline kernel_cap_t cap_drop_fs_set(const kernel_cap_t a) { const kernel_cap_t __cap_fs_set = CAP_FS_SET; return cap_drop(a, __cap_fs_set); } static inline kernel_cap_t cap_raise_fs_set(const kernel_cap_t a, const kernel_cap_t permitted) { const kernel_cap_t __cap_fs_set = CAP_FS_SET; return cap_combine(a, cap_intersect(permitted, __cap_fs_set)); } static inline kernel_cap_t cap_drop_nfsd_set(const kernel_cap_t a) { const kernel_cap_t __cap_fs_set = CAP_NFSD_SET; return cap_drop(a, __cap_fs_set); } static inline kernel_cap_t cap_raise_nfsd_set(const kernel_cap_t a, const kernel_cap_t permitted) { const kernel_cap_t __cap_nfsd_set = CAP_NFSD_SET; return cap_combine(a, cap_intersect(permitted, __cap_nfsd_set)); } #ifdef CONFIG_MULTIUSER extern bool has_capability(struct task_struct *t, int cap); extern bool has_ns_capability(struct task_struct *t, struct user_namespace *ns, int cap); extern bool has_capability_noaudit(struct task_struct *t, int cap); extern bool has_ns_capability_noaudit(struct task_struct *t, struct user_namespace *ns, int cap); extern bool capable(int cap); extern bool ns_capable(struct user_namespace *ns, int cap); extern bool ns_capable_noaudit(struct user_namespace *ns, int cap); extern bool ns_capable_setid(struct user_namespace *ns, int cap); #else static inline bool has_capability(struct task_struct *t, int cap) { return true; } static inline bool has_ns_capability(struct task_struct *t, struct user_namespace *ns, int cap) { return true; } static inline bool has_capability_noaudit(struct task_struct *t, int cap) { return true; } static inline bool has_ns_capability_noaudit(struct task_struct *t, struct user_namespace *ns, int cap) { return true; } static inline bool capable(int cap) { return true; } static inline bool ns_capable(struct user_namespace *ns, int cap) { return true; } static inline bool ns_capable_noaudit(struct user_namespace *ns, int cap) { return true; } static inline bool ns_capable_setid(struct user_namespace *ns, int cap) { return true; } #endif /* CONFIG_MULTIUSER */ bool privileged_wrt_inode_uidgid(struct user_namespace *ns, struct user_namespace *mnt_userns, const struct inode *inode); bool capable_wrt_inode_uidgid(struct user_namespace *mnt_userns, const struct inode *inode, int cap); extern bool file_ns_capable(const struct file *file, struct user_namespace *ns, int cap); extern bool ptracer_capable(struct task_struct *tsk, struct user_namespace *ns); static inline bool perfmon_capable(void) { return capable(CAP_PERFMON) || capable(CAP_SYS_ADMIN); } static inline bool bpf_capable(void) { return capable(CAP_BPF) || capable(CAP_SYS_ADMIN); } static inline bool checkpoint_restore_ns_capable(struct user_namespace *ns) { return ns_capable(ns, CAP_CHECKPOINT_RESTORE) || ns_capable(ns, CAP_SYS_ADMIN); } /* audit system wants to get cap info from files as well */ int get_vfs_caps_from_disk(struct user_namespace *mnt_userns, const struct dentry *dentry, struct cpu_vfs_cap_data *cpu_caps); int cap_convert_nscap(struct user_namespace *mnt_userns, struct dentry *dentry, const void **ivalue, size_t size); #endif /* !_LINUX_CAPABILITY_H */ PK ! c�bΛ � integrity.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2009 IBM Corporation * Author: Mimi Zohar <zohar@us.ibm.com> */ #ifndef _LINUX_INTEGRITY_H #define _LINUX_INTEGRITY_H #include <linux/fs.h> enum integrity_status { INTEGRITY_PASS = 0, INTEGRITY_PASS_IMMUTABLE, INTEGRITY_FAIL, INTEGRITY_FAIL_IMMUTABLE, INTEGRITY_NOLABEL, INTEGRITY_NOXATTRS, INTEGRITY_UNKNOWN, }; /* List of EVM protected security xattrs */ #ifdef CONFIG_INTEGRITY extern struct integrity_iint_cache *integrity_inode_get(struct inode *inode); extern void integrity_inode_free(struct inode *inode); extern void __init integrity_load_keys(void); #else static inline struct integrity_iint_cache * integrity_inode_get(struct inode *inode) { return NULL; } static inline void integrity_inode_free(struct inode *inode) { return; } static inline void integrity_load_keys(void) { } #endif /* CONFIG_INTEGRITY */ #ifdef CONFIG_INTEGRITY_ASYMMETRIC_KEYS extern int integrity_kernel_module_request(char *kmod_name); #else static inline int integrity_kernel_module_request(char *kmod_name) { return 0; } #endif /* CONFIG_INTEGRITY_ASYMMETRIC_KEYS */ #endif /* _LINUX_INTEGRITY_H */ PK ! l�1�� � misc_cgroup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Miscellaneous cgroup controller. * * Copyright 2020 Google LLC * Author: Vipin Sharma <vipinsh@google.com> */ #ifndef _MISC_CGROUP_H_ #define _MISC_CGROUP_H_ /** * Types of misc cgroup entries supported by the host. */ enum misc_res_type { #ifdef CONFIG_KVM_AMD_SEV /* AMD SEV ASIDs resource */ MISC_CG_RES_SEV, /* AMD SEV-ES ASIDs resource */ MISC_CG_RES_SEV_ES, #endif MISC_CG_RES_TYPES }; struct misc_cg; #ifdef CONFIG_CGROUP_MISC #include <linux/cgroup.h> /** * struct misc_res: Per cgroup per misc type resource * @max: Maximum limit on the resource. * @usage: Current usage of the resource. * @failed: True if charged failed for the resource in a cgroup. */ struct misc_res { unsigned long max; atomic_long_t usage; bool failed; }; /** * struct misc_cg - Miscellaneous controller's cgroup structure. * @css: cgroup subsys state object. * @res: Array of misc resources usage in the cgroup. */ struct misc_cg { struct cgroup_subsys_state css; struct misc_res res[MISC_CG_RES_TYPES]; }; unsigned long misc_cg_res_total_usage(enum misc_res_type type); int misc_cg_set_capacity(enum misc_res_type type, unsigned long capacity); int misc_cg_try_charge(enum misc_res_type type, struct misc_cg *cg, unsigned long amount); void misc_cg_uncharge(enum misc_res_type type, struct misc_cg *cg, unsigned long amount); /** * css_misc() - Get misc cgroup from the css. * @css: cgroup subsys state object. * * Context: Any context. * Return: * * %NULL - If @css is null. * * struct misc_cg* - misc cgroup pointer of the passed css. */ static inline struct misc_cg *css_misc(struct cgroup_subsys_state *css) { return css ? container_of(css, struct misc_cg, css) : NULL; } /* * get_current_misc_cg() - Find and get the misc cgroup of the current task. * * Returned cgroup has its ref count increased by 1. Caller must call * put_misc_cg() to return the reference. * * Return: Misc cgroup to which the current task belongs to. */ static inline struct misc_cg *get_current_misc_cg(void) { return css_misc(task_get_css(current, misc_cgrp_id)); } /* * put_misc_cg() - Put the misc cgroup and reduce its ref count. * @cg - cgroup to put. */ static inline void put_misc_cg(struct misc_cg *cg) { if (cg) css_put(&cg->css); } #else /* !CONFIG_CGROUP_MISC */ static inline unsigned long misc_cg_res_total_usage(enum misc_res_type type) { return 0; } static inline int misc_cg_set_capacity(enum misc_res_type type, unsigned long capacity) { return 0; } static inline int misc_cg_try_charge(enum misc_res_type type, struct misc_cg *cg, unsigned long amount) { return 0; } static inline void misc_cg_uncharge(enum misc_res_type type, struct misc_cg *cg, unsigned long amount) { } static inline struct misc_cg *get_current_misc_cg(void) { return NULL; } static inline void put_misc_cg(struct misc_cg *cg) { } #endif /* CONFIG_CGROUP_MISC */ #endif /* _MISC_CGROUP_H_ */ PK ! a6ł keyslot-manager.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright 2019 Google LLC */ #ifndef __LINUX_KEYSLOT_MANAGER_H #define __LINUX_KEYSLOT_MANAGER_H #include <linux/bio.h> #include <linux/blk-crypto.h> struct blk_keyslot_manager; /** * struct blk_ksm_ll_ops - functions to manage keyslots in hardware * @keyslot_program: Program the specified key into the specified slot in the * inline encryption hardware. * @keyslot_evict: Evict key from the specified keyslot in the hardware. * The key is provided so that e.g. dm layers can evict * keys from the devices that they map over. * Returns 0 on success, -errno otherwise. * * This structure should be provided by storage device drivers when they set up * a keyslot manager - this structure holds the function ptrs that the keyslot * manager will use to manipulate keyslots in the hardware. */ struct blk_ksm_ll_ops { int (*keyslot_program)(struct blk_keyslot_manager *ksm, const struct blk_crypto_key *key, unsigned int slot); int (*keyslot_evict)(struct blk_keyslot_manager *ksm, const struct blk_crypto_key *key, unsigned int slot); }; struct blk_keyslot_manager { /* * The struct blk_ksm_ll_ops that this keyslot manager will use * to perform operations like programming and evicting keys on the * device */ struct blk_ksm_ll_ops ksm_ll_ops; /* * The maximum number of bytes supported for specifying the data unit * number. */ unsigned int max_dun_bytes_supported; /* * Array of size BLK_ENCRYPTION_MODE_MAX of bitmasks that represents * whether a crypto mode and data unit size are supported. The i'th * bit of crypto_mode_supported[crypto_mode] is set iff a data unit * size of (1 << i) is supported. We only support data unit sizes * that are powers of 2. */ unsigned int crypto_modes_supported[BLK_ENCRYPTION_MODE_MAX]; /* Device for runtime power management (NULL if none) */ struct device *dev; /* Here onwards are *private* fields for internal keyslot manager use */ unsigned int num_slots; /* Protects programming and evicting keys from the device */ struct rw_semaphore lock; /* List of idle slots, with least recently used slot at front */ wait_queue_head_t idle_slots_wait_queue; struct list_head idle_slots; spinlock_t idle_slots_lock; /* * Hash table which maps struct *blk_crypto_key to keyslots, so that we * can find a key's keyslot in O(1) time rather than O(num_slots). * Protected by 'lock'. */ struct hlist_head *slot_hashtable; unsigned int log_slot_ht_size; /* Per-keyslot data */ struct blk_ksm_keyslot *slots; }; int blk_ksm_init(struct blk_keyslot_manager *ksm, unsigned int num_slots); int devm_blk_ksm_init(struct device *dev, struct blk_keyslot_manager *ksm, unsigned int num_slots); blk_status_t blk_ksm_get_slot_for_key(struct blk_keyslot_manager *ksm, const struct blk_crypto_key *key, struct blk_ksm_keyslot **slot_ptr); unsigned int blk_ksm_get_slot_idx(struct blk_ksm_keyslot *slot); void blk_ksm_put_slot(struct blk_ksm_keyslot *slot); bool blk_ksm_crypto_cfg_supported(struct blk_keyslot_manager *ksm, const struct blk_crypto_config *cfg); int blk_ksm_evict_key(struct blk_keyslot_manager *ksm, const struct blk_crypto_key *key); void blk_ksm_reprogram_all_keys(struct blk_keyslot_manager *ksm); void blk_ksm_destroy(struct blk_keyslot_manager *ksm); void blk_ksm_intersect_modes(struct blk_keyslot_manager *parent, const struct blk_keyslot_manager *child); void blk_ksm_init_passthrough(struct blk_keyslot_manager *ksm); bool blk_ksm_is_superset(struct blk_keyslot_manager *ksm_superset, struct blk_keyslot_manager *ksm_subset); void blk_ksm_update_capabilities(struct blk_keyslot_manager *target_ksm, struct blk_keyslot_manager *reference_ksm); #endif /* __LINUX_KEYSLOT_MANAGER_H */ PK ! T��� � ppp_channel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _PPP_CHANNEL_H_ #define _PPP_CHANNEL_H_ /* * Definitions for the interface between the generic PPP code * and a PPP channel. * * A PPP channel provides a way for the generic PPP code to send * and receive packets over some sort of communications medium. * Packets are stored in sk_buffs and have the 2-byte PPP protocol * number at the start, but not the address and control bytes. * * Copyright 1999 Paul Mackerras. * * ==FILEVERSION 20000322== */ #include <linux/list.h> #include <linux/skbuff.h> #include <linux/poll.h> #include <net/net_namespace.h> struct ppp_channel; struct ppp_channel_ops { /* Send a packet (or multilink fragment) on this channel. Returns 1 if it was accepted, 0 if not. */ int (*start_xmit)(struct ppp_channel *, struct sk_buff *); /* Handle an ioctl call that has come in via /dev/ppp. */ int (*ioctl)(struct ppp_channel *, unsigned int, unsigned long); int (*fill_forward_path)(struct net_device_path_ctx *, struct net_device_path *, const struct ppp_channel *); }; struct ppp_channel { void *private; /* channel private data */ const struct ppp_channel_ops *ops; /* operations for this channel */ int mtu; /* max transmit packet size */ int hdrlen; /* amount of headroom channel needs */ void *ppp; /* opaque to channel */ int speed; /* transfer rate (bytes/second) */ /* the following is not used at present */ int latency; /* overhead time in milliseconds */ }; #ifdef __KERNEL__ /* Called by the channel when it can send some more data. */ extern void ppp_output_wakeup(struct ppp_channel *); /* Called by the channel to process a received PPP packet. The packet should have just the 2-byte PPP protocol header. */ extern void ppp_input(struct ppp_channel *, struct sk_buff *); /* Called by the channel when an input error occurs, indicating that we may have missed a packet. */ extern void ppp_input_error(struct ppp_channel *, int code); /* Attach a channel to a given PPP unit in specified net. */ extern int ppp_register_net_channel(struct net *, struct ppp_channel *); /* Attach a channel to a given PPP unit. */ extern int ppp_register_channel(struct ppp_channel *); /* Detach a channel from its PPP unit (e.g. on hangup). */ extern void ppp_unregister_channel(struct ppp_channel *); /* Get the channel number for a channel */ extern int ppp_channel_index(struct ppp_channel *); /* Get the unit number associated with a channel, or -1 if none */ extern int ppp_unit_number(struct ppp_channel *); /* Get the device name associated with a channel, or NULL if none */ extern char *ppp_dev_name(struct ppp_channel *); /* * SMP locking notes: * The channel code must ensure that when it calls ppp_unregister_channel, * nothing is executing in any of the procedures above, for that * channel. The generic layer will ensure that nothing is executing * in the start_xmit and ioctl routines for the channel by the time * that ppp_unregister_channel returns. */ #endif /* __KERNEL__ */ #endif PK ! ���+� � kernel_read_file.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KERNEL_READ_FILE_H #define _LINUX_KERNEL_READ_FILE_H #include <linux/file.h> #include <linux/types.h> /* This is a list of *what* is being read, not *how* nor *where*. */ #define __kernel_read_file_id(id) \ id(UNKNOWN, unknown) \ id(FIRMWARE, firmware) \ id(MODULE, kernel-module) \ id(KEXEC_IMAGE, kexec-image) \ id(KEXEC_INITRAMFS, kexec-initramfs) \ id(POLICY, security-policy) \ id(X509_CERTIFICATE, x509-certificate) \ id(MAX_ID, ) #define __fid_enumify(ENUM, dummy) READING_ ## ENUM, #define __fid_stringify(dummy, str) #str, enum kernel_read_file_id { __kernel_read_file_id(__fid_enumify) }; static const char * const kernel_read_file_str[] = { __kernel_read_file_id(__fid_stringify) }; static inline const char *kernel_read_file_id_str(enum kernel_read_file_id id) { if ((unsigned int)id >= READING_MAX_ID) return kernel_read_file_str[READING_UNKNOWN]; return kernel_read_file_str[id]; } int kernel_read_file(struct file *file, loff_t offset, void **buf, size_t buf_size, size_t *file_size, enum kernel_read_file_id id); int kernel_read_file_from_path(const char *path, loff_t offset, void **buf, size_t buf_size, size_t *file_size, enum kernel_read_file_id id); int kernel_read_file_from_path_initns(const char *path, loff_t offset, void **buf, size_t buf_size, size_t *file_size, enum kernel_read_file_id id); int kernel_read_file_from_fd(int fd, loff_t offset, void **buf, size_t buf_size, size_t *file_size, enum kernel_read_file_id id); #endif /* _LINUX_KERNEL_READ_FILE_H */ PK ! ��9p cciss_ioctl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef CCISS_IOCTLH #define CCISS_IOCTLH #include <uapi/linux/cciss_ioctl.h> #ifdef CONFIG_COMPAT /* 32 bit compatible ioctl structs */ typedef struct _IOCTL32_Command_struct { LUNAddr_struct LUN_info; RequestBlock_struct Request; ErrorInfo_struct error_info; WORD buf_size; /* size in bytes of the buf */ __u32 buf; /* 32 bit pointer to data buffer */ } IOCTL32_Command_struct; typedef struct _BIG_IOCTL32_Command_struct { LUNAddr_struct LUN_info; RequestBlock_struct Request; ErrorInfo_struct error_info; DWORD malloc_size; /* < MAX_KMALLOC_SIZE in cciss.c */ DWORD buf_size; /* size in bytes of the buf */ /* < malloc_size * MAXSGENTRIES */ __u32 buf; /* 32 bit pointer to data buffer */ } BIG_IOCTL32_Command_struct; #define CCISS_PASSTHRU32 _IOWR(CCISS_IOC_MAGIC, 11, IOCTL32_Command_struct) #define CCISS_BIG_PASSTHRU32 _IOWR(CCISS_IOC_MAGIC, 18, BIG_IOCTL32_Command_struct) #endif /* CONFIG_COMPAT */ #endif PK ! �]�e� � zpool.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * zpool memory storage api * * Copyright (C) 2014 Dan Streetman * * This is a common frontend for the zbud and zsmalloc memory * storage pool implementations. Typically, this is used to * store compressed memory. */ #ifndef _ZPOOL_H_ #define _ZPOOL_H_ struct zpool; struct zpool_ops { int (*evict)(struct zpool *pool, unsigned long handle); }; /* * Control how a handle is mapped. It will be ignored if the * implementation does not support it. Its use is optional. * Note that this does not refer to memory protection, it * refers to how the memory will be copied in/out if copying * is necessary during mapping; read-write is the safest as * it copies the existing memory in on map, and copies the * changed memory back out on unmap. Write-only does not copy * in the memory and should only be used for initialization. * If in doubt, use ZPOOL_MM_DEFAULT which is read-write. */ enum zpool_mapmode { ZPOOL_MM_RW, /* normal read-write mapping */ ZPOOL_MM_RO, /* read-only (no copy-out at unmap time) */ ZPOOL_MM_WO, /* write-only (no copy-in at map time) */ ZPOOL_MM_DEFAULT = ZPOOL_MM_RW }; bool zpool_has_pool(char *type); struct zpool *zpool_create_pool(const char *type, const char *name, gfp_t gfp, const struct zpool_ops *ops); const char *zpool_get_type(struct zpool *pool); void zpool_destroy_pool(struct zpool *pool); bool zpool_malloc_support_movable(struct zpool *pool); int zpool_malloc(struct zpool *pool, size_t size, gfp_t gfp, unsigned long *handle); void zpool_free(struct zpool *pool, unsigned long handle); int zpool_shrink(struct zpool *pool, unsigned int pages, unsigned int *reclaimed); void *zpool_map_handle(struct zpool *pool, unsigned long handle, enum zpool_mapmode mm); void zpool_unmap_handle(struct zpool *pool, unsigned long handle); u64 zpool_get_total_size(struct zpool *pool); /** * struct zpool_driver - driver implementation for zpool * @type: name of the driver. * @list: entry in the list of zpool drivers. * @create: create a new pool. * @destroy: destroy a pool. * @malloc: allocate mem from a pool. * @free: free mem from a pool. * @shrink: shrink the pool. * @sleep_mapped: whether zpool driver can sleep during map. * @map: map a handle. * @unmap: unmap a handle. * @total_size: get total size of a pool. * * This is created by a zpool implementation and registered * with zpool. */ struct zpool_driver { char *type; struct module *owner; atomic_t refcount; struct list_head list; void *(*create)(const char *name, gfp_t gfp, const struct zpool_ops *ops, struct zpool *zpool); void (*destroy)(void *pool); bool malloc_support_movable; int (*malloc)(void *pool, size_t size, gfp_t gfp, unsigned long *handle); void (*free)(void *pool, unsigned long handle); int (*shrink)(void *pool, unsigned int pages, unsigned int *reclaimed); bool sleep_mapped; void *(*map)(void *pool, unsigned long handle, enum zpool_mapmode mm); void (*unmap)(void *pool, unsigned long handle); u64 (*total_size)(void *pool); }; void zpool_register_driver(struct zpool_driver *driver); int zpool_unregister_driver(struct zpool_driver *driver); bool zpool_evictable(struct zpool *pool); bool zpool_can_sleep_mapped(struct zpool *pool); #endif PK ! &���z z rtsx_common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Driver for Realtek driver-based card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * * Author: * Wei WANG <wei_wang@realsil.com.cn> */ #ifndef __RTSX_COMMON_H #define __RTSX_COMMON_H #define DRV_NAME_RTSX_PCI "rtsx_pci" #define DRV_NAME_RTSX_PCI_SDMMC "rtsx_pci_sdmmc" #define DRV_NAME_RTSX_PCI_MS "rtsx_pci_ms" #define RTSX_REG_PAIR(addr, val) (((u32)(addr) << 16) | (u8)(val)) #define RTSX_SSC_DEPTH_4M 0x01 #define RTSX_SSC_DEPTH_2M 0x02 #define RTSX_SSC_DEPTH_1M 0x03 #define RTSX_SSC_DEPTH_500K 0x04 #define RTSX_SSC_DEPTH_250K 0x05 #define RTSX_SD_CARD 0 #define RTSX_MS_CARD 1 #define CLK_TO_DIV_N 0 #define DIV_N_TO_CLK 1 struct platform_device; struct rtsx_slot { struct platform_device *p_dev; void (*card_event)(struct platform_device *p_dev); }; #endif PK ! ��h@q q sh_eth.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_SH_ETH_H__ #define __ASM_SH_ETH_H__ #include <linux/phy.h> #include <linux/if_ether.h> struct sh_eth_plat_data { int phy; int phy_irq; phy_interface_t phy_interface; void (*set_mdio_gate)(void *addr); unsigned char mac_addr[ETH_ALEN]; unsigned no_ether_link:1; unsigned ether_link_active_low:1; }; #endif PK ! �c&�� � dasd_mod.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef DASD_MOD_H #define DASD_MOD_H #include <asm/dasd.h> struct gendisk; extern int dasd_biodasdinfo(struct gendisk *disk, dasd_information2_t *info); #endif PK ! ҕ��� � smpboot.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SMPBOOT_H #define _LINUX_SMPBOOT_H #include <linux/types.h> struct task_struct; /* Cookie handed to the thread_fn*/ struct smpboot_thread_data; /** * struct smp_hotplug_thread - CPU hotplug related thread descriptor * @store: Pointer to per cpu storage for the task pointers * @list: List head for core management * @thread_should_run: Check whether the thread should run or not. Called with * preemption disabled. * @thread_fn: The associated thread function * @create: Optional setup function, called when the thread gets * created (Not called from the thread context) * @setup: Optional setup function, called when the thread gets * operational the first time * @cleanup: Optional cleanup function, called when the thread * should stop (module exit) * @park: Optional park function, called when the thread is * parked (cpu offline) * @unpark: Optional unpark function, called when the thread is * unparked (cpu online) * @selfparking: Thread is not parked by the park function. * @thread_comm: The base name of the thread */ struct smp_hotplug_thread { struct task_struct * __percpu *store; struct list_head list; int (*thread_should_run)(unsigned int cpu); void (*thread_fn)(unsigned int cpu); void (*create)(unsigned int cpu); void (*setup)(unsigned int cpu); void (*cleanup)(unsigned int cpu, bool online); void (*park)(unsigned int cpu); void (*unpark)(unsigned int cpu); bool selfparking; const char *thread_comm; }; int smpboot_register_percpu_thread(struct smp_hotplug_thread *plug_thread); void smpboot_unregister_percpu_thread(struct smp_hotplug_thread *plug_thread); #endif PK ! ? 5= 5= blk_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Block data types and constants. Directly include this file only to * break include dependency loop. */ #ifndef __LINUX_BLK_TYPES_H #define __LINUX_BLK_TYPES_H #include <linux/types.h> #include <linux/bvec.h> #include <linux/device.h> #include <linux/ktime.h> struct bio_set; struct bio; struct bio_integrity_payload; struct page; struct io_context; struct cgroup_subsys_state; typedef void (bio_end_io_t) (struct bio *); struct bio_crypt_ctx; struct block_device { sector_t bd_start_sect; struct disk_stats __percpu *bd_stats; unsigned long bd_stamp; bool bd_read_only; /* read-only policy */ dev_t bd_dev; int bd_openers; struct inode * bd_inode; /* will die */ struct super_block * bd_super; void * bd_claiming; struct device bd_device; void * bd_holder; int bd_holders; bool bd_write_holder; struct kobject *bd_holder_dir; u8 bd_partno; spinlock_t bd_size_lock; /* for bd_inode->i_size updates */ struct gendisk * bd_disk; /* The counter of freeze processes */ int bd_fsfreeze_count; /* Mutex for freeze */ struct mutex bd_fsfreeze_mutex; struct super_block *bd_fsfreeze_sb; struct partition_meta_info *bd_meta_info; #ifdef CONFIG_FAIL_MAKE_REQUEST bool bd_make_it_fail; #endif } __randomize_layout; #define bdev_whole(_bdev) \ ((_bdev)->bd_disk->part0) #define dev_to_bdev(device) \ container_of((device), struct block_device, bd_device) #define bdev_kobj(_bdev) \ (&((_bdev)->bd_device.kobj)) /* * Block error status values. See block/blk-core:blk_errors for the details. * Alpha cannot write a byte atomically, so we need to use 32-bit value. */ #if defined(CONFIG_ALPHA) && !defined(__alpha_bwx__) typedef u32 __bitwise blk_status_t; #else typedef u8 __bitwise blk_status_t; #endif #define BLK_STS_OK 0 #define BLK_STS_NOTSUPP ((__force blk_status_t)1) #define BLK_STS_TIMEOUT ((__force blk_status_t)2) #define BLK_STS_NOSPC ((__force blk_status_t)3) #define BLK_STS_TRANSPORT ((__force blk_status_t)4) #define BLK_STS_TARGET ((__force blk_status_t)5) #define BLK_STS_NEXUS ((__force blk_status_t)6) #define BLK_STS_MEDIUM ((__force blk_status_t)7) #define BLK_STS_PROTECTION ((__force blk_status_t)8) #define BLK_STS_RESOURCE ((__force blk_status_t)9) #define BLK_STS_IOERR ((__force blk_status_t)10) /* hack for device mapper, don't use elsewhere: */ #define BLK_STS_DM_REQUEUE ((__force blk_status_t)11) #define BLK_STS_AGAIN ((__force blk_status_t)12) /* * BLK_STS_DEV_RESOURCE is returned from the driver to the block layer if * device related resources are unavailable, but the driver can guarantee * that the queue will be rerun in the future once resources become * available again. This is typically the case for device specific * resources that are consumed for IO. If the driver fails allocating these * resources, we know that inflight (or pending) IO will free these * resource upon completion. * * This is different from BLK_STS_RESOURCE in that it explicitly references * a device specific resource. For resources of wider scope, allocation * failure can happen without having pending IO. This means that we can't * rely on request completions freeing these resources, as IO may not be in * flight. Examples of that are kernel memory allocations, DMA mappings, or * any other system wide resources. */ #define BLK_STS_DEV_RESOURCE ((__force blk_status_t)13) /* * BLK_STS_ZONE_RESOURCE is returned from the driver to the block layer if zone * related resources are unavailable, but the driver can guarantee the queue * will be rerun in the future once the resources become available again. * * This is different from BLK_STS_DEV_RESOURCE in that it explicitly references * a zone specific resource and IO to a different zone on the same device could * still be served. Examples of that are zones that are write-locked, but a read * to the same zone could be served. */ #define BLK_STS_ZONE_RESOURCE ((__force blk_status_t)14) /* * BLK_STS_ZONE_OPEN_RESOURCE is returned from the driver in the completion * path if the device returns a status indicating that too many zone resources * are currently open. The same command should be successful if resubmitted * after the number of open zones decreases below the device's limits, which is * reported in the request_queue's max_open_zones. */ #define BLK_STS_ZONE_OPEN_RESOURCE ((__force blk_status_t)15) /* * BLK_STS_ZONE_ACTIVE_RESOURCE is returned from the driver in the completion * path if the device returns a status indicating that too many zone resources * are currently active. The same command should be successful if resubmitted * after the number of active zones decreases below the device's limits, which * is reported in the request_queue's max_active_zones. */ #define BLK_STS_ZONE_ACTIVE_RESOURCE ((__force blk_status_t)16) /** * blk_path_error - returns true if error may be path related * @error: status the request was completed with * * Description: * This classifies block error status into non-retryable errors and ones * that may be successful if retried on a failover path. * * Return: * %false - retrying failover path will not help * %true - may succeed if retried */ static inline bool blk_path_error(blk_status_t error) { switch (error) { case BLK_STS_NOTSUPP: case BLK_STS_NOSPC: case BLK_STS_TARGET: case BLK_STS_NEXUS: case BLK_STS_MEDIUM: case BLK_STS_PROTECTION: return false; } /* Anything else could be a path failure, so should be retried */ return true; } /* * From most significant bit: * 1 bit: reserved for other usage, see below * 12 bits: original size of bio * 51 bits: issue time of bio */ #define BIO_ISSUE_RES_BITS 1 #define BIO_ISSUE_SIZE_BITS 12 #define BIO_ISSUE_RES_SHIFT (64 - BIO_ISSUE_RES_BITS) #define BIO_ISSUE_SIZE_SHIFT (BIO_ISSUE_RES_SHIFT - BIO_ISSUE_SIZE_BITS) #define BIO_ISSUE_TIME_MASK ((1ULL << BIO_ISSUE_SIZE_SHIFT) - 1) #define BIO_ISSUE_SIZE_MASK \ (((1ULL << BIO_ISSUE_SIZE_BITS) - 1) << BIO_ISSUE_SIZE_SHIFT) #define BIO_ISSUE_RES_MASK (~((1ULL << BIO_ISSUE_RES_SHIFT) - 1)) /* Reserved bit for blk-throtl */ #define BIO_ISSUE_THROTL_SKIP_LATENCY (1ULL << 63) struct bio_issue { u64 value; }; static inline u64 __bio_issue_time(u64 time) { return time & BIO_ISSUE_TIME_MASK; } static inline u64 bio_issue_time(struct bio_issue *issue) { return __bio_issue_time(issue->value); } static inline sector_t bio_issue_size(struct bio_issue *issue) { return ((issue->value & BIO_ISSUE_SIZE_MASK) >> BIO_ISSUE_SIZE_SHIFT); } static inline void bio_issue_init(struct bio_issue *issue, sector_t size) { size &= (1ULL << BIO_ISSUE_SIZE_BITS) - 1; issue->value = ((issue->value & BIO_ISSUE_RES_MASK) | (ktime_get_ns() & BIO_ISSUE_TIME_MASK) | ((u64)size << BIO_ISSUE_SIZE_SHIFT)); } /* * main unit of I/O for the block layer and lower layers (ie drivers and * stacking drivers) */ struct bio { struct bio *bi_next; /* request queue link */ struct block_device *bi_bdev; unsigned int bi_opf; /* bottom bits REQ_OP, top bits * req_flags. */ unsigned short bi_flags; /* BIO_* below */ unsigned short bi_ioprio; unsigned short bi_write_hint; blk_status_t bi_status; atomic_t __bi_remaining; struct bvec_iter bi_iter; bio_end_io_t *bi_end_io; void *bi_private; #ifdef CONFIG_BLK_CGROUP /* * Represents the association of the css and request_queue for the bio. * If a bio goes direct to device, it will not have a blkg as it will * not have a request_queue associated with it. The reference is put * on release of the bio. */ struct blkcg_gq *bi_blkg; struct bio_issue bi_issue; #ifdef CONFIG_BLK_CGROUP_IOCOST u64 bi_iocost_cost; #endif #endif #ifdef CONFIG_BLK_INLINE_ENCRYPTION struct bio_crypt_ctx *bi_crypt_context; #endif union { #if defined(CONFIG_BLK_DEV_INTEGRITY) struct bio_integrity_payload *bi_integrity; /* data integrity */ #endif }; unsigned short bi_vcnt; /* how many bio_vec's */ /* * Everything starting with bi_max_vecs will be preserved by bio_reset() */ unsigned short bi_max_vecs; /* max bvl_vecs we can hold */ atomic_t __bi_cnt; /* pin count */ struct bio_vec *bi_io_vec; /* the actual vec list */ struct bio_set *bi_pool; /* * We can inline a number of vecs at the end of the bio, to avoid * double allocations for a small number of bio_vecs. This member * MUST obviously be kept at the very end of the bio. */ struct bio_vec bi_inline_vecs[]; }; #define BIO_RESET_BYTES offsetof(struct bio, bi_max_vecs) #define BIO_MAX_SECTORS (UINT_MAX >> SECTOR_SHIFT) /* * bio flags */ enum { BIO_NO_PAGE_REF, /* don't put release vec pages */ BIO_CLONED, /* doesn't own data */ BIO_BOUNCED, /* bio is a bounce bio */ BIO_WORKINGSET, /* contains userspace workingset pages */ BIO_QUIET, /* Make BIO Quiet */ BIO_CHAIN, /* chained bio, ->bi_remaining in effect */ BIO_REFFED, /* bio has elevated ->bi_cnt */ BIO_THROTTLED, /* This bio has already been subjected to * throttling rules. Don't do it again. */ BIO_TRACE_COMPLETION, /* bio_endio() should trace the final completion * of this bio. */ BIO_CGROUP_ACCT, /* has been accounted to a cgroup */ BIO_QOS_THROTTLED, /* bio went through rq_qos throttle path */ BIO_QOS_MERGED, /* but went through rq_qos merge path */ BIO_REMAPPED, BIO_ZONE_WRITE_LOCKED, /* Owns a zoned device zone write lock */ BIO_PERCPU_CACHE, /* can participate in per-cpu alloc cache */ BIO_FLAG_LAST }; typedef __u32 __bitwise blk_mq_req_flags_t; /* * Operations and flags common to the bio and request structures. * We use 8 bits for encoding the operation, and the remaining 24 for flags. * * The least significant bit of the operation number indicates the data * transfer direction: * * - if the least significant bit is set transfers are TO the device * - if the least significant bit is not set transfers are FROM the device * * If a operation does not transfer data the least significant bit has no * meaning. */ #define REQ_OP_BITS 8 #define REQ_OP_MASK ((1 << REQ_OP_BITS) - 1) #define REQ_FLAG_BITS 24 enum req_opf { /* read sectors from the device */ REQ_OP_READ = 0, /* write sectors to the device */ REQ_OP_WRITE = 1, /* flush the volatile write cache */ REQ_OP_FLUSH = 2, /* discard sectors */ REQ_OP_DISCARD = 3, /* securely erase sectors */ REQ_OP_SECURE_ERASE = 5, /* write the same sector many times */ REQ_OP_WRITE_SAME = 7, /* write the zero filled sector many times */ REQ_OP_WRITE_ZEROES = 9, /* Open a zone */ REQ_OP_ZONE_OPEN = 11, /* Close a zone */ REQ_OP_ZONE_CLOSE = 13, /* Transition a zone to full */ REQ_OP_ZONE_FINISH = 15, /* reset a zone write pointer */ REQ_OP_ZONE_RESET = 17, /* reset all the zone present on the device */ REQ_OP_ZONE_RESET_ALL = 19, /* write data at the current zone write pointer */ REQ_OP_ZONE_APPEND = 21, /* Driver private requests */ REQ_OP_DRV_IN = 34, REQ_OP_DRV_OUT = 35, REQ_OP_LAST, }; enum req_flag_bits { __REQ_FAILFAST_DEV = /* no driver retries of device errors */ REQ_OP_BITS, __REQ_FAILFAST_TRANSPORT, /* no driver retries of transport errors */ __REQ_FAILFAST_DRIVER, /* no driver retries of driver errors */ __REQ_SYNC, /* request is sync (sync write or read) */ __REQ_META, /* metadata io request */ __REQ_PRIO, /* boost priority in cfq */ __REQ_NOMERGE, /* don't touch this for merging */ __REQ_IDLE, /* anticipate more IO after this one */ __REQ_INTEGRITY, /* I/O includes block integrity payload */ __REQ_FUA, /* forced unit access */ __REQ_PREFLUSH, /* request for cache flush */ __REQ_RAHEAD, /* read ahead, can fail anytime */ __REQ_BACKGROUND, /* background IO */ __REQ_NOWAIT, /* Don't wait if request will block */ /* * When a shared kthread needs to issue a bio for a cgroup, doing * so synchronously can lead to priority inversions as the kthread * can be trapped waiting for that cgroup. CGROUP_PUNT flag makes * submit_bio() punt the actual issuing to a dedicated per-blkcg * work item to avoid such priority inversions. */ __REQ_CGROUP_PUNT, /* command specific flags for REQ_OP_WRITE_ZEROES: */ __REQ_NOUNMAP, /* do not free blocks when zeroing */ __REQ_HIPRI, /* for driver use */ __REQ_DRV, __REQ_SWAP, /* swapping request. */ __REQ_NR_BITS, /* stops here */ }; #define REQ_FAILFAST_DEV (1ULL << __REQ_FAILFAST_DEV) #define REQ_FAILFAST_TRANSPORT (1ULL << __REQ_FAILFAST_TRANSPORT) #define REQ_FAILFAST_DRIVER (1ULL << __REQ_FAILFAST_DRIVER) #define REQ_SYNC (1ULL << __REQ_SYNC) #define REQ_META (1ULL << __REQ_META) #define REQ_PRIO (1ULL << __REQ_PRIO) #define REQ_NOMERGE (1ULL << __REQ_NOMERGE) #define REQ_IDLE (1ULL << __REQ_IDLE) #define REQ_INTEGRITY (1ULL << __REQ_INTEGRITY) #define REQ_FUA (1ULL << __REQ_FUA) #define REQ_PREFLUSH (1ULL << __REQ_PREFLUSH) #define REQ_RAHEAD (1ULL << __REQ_RAHEAD) #define REQ_BACKGROUND (1ULL << __REQ_BACKGROUND) #define REQ_NOWAIT (1ULL << __REQ_NOWAIT) #define REQ_CGROUP_PUNT (1ULL << __REQ_CGROUP_PUNT) #define REQ_NOUNMAP (1ULL << __REQ_NOUNMAP) #define REQ_HIPRI (1ULL << __REQ_HIPRI) #define REQ_DRV (1ULL << __REQ_DRV) #define REQ_SWAP (1ULL << __REQ_SWAP) #define REQ_FAILFAST_MASK \ (REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | REQ_FAILFAST_DRIVER) #define REQ_NOMERGE_FLAGS \ (REQ_NOMERGE | REQ_PREFLUSH | REQ_FUA) enum stat_group { STAT_READ, STAT_WRITE, STAT_DISCARD, STAT_FLUSH, NR_STAT_GROUPS }; #define bio_op(bio) \ ((bio)->bi_opf & REQ_OP_MASK) #define req_op(req) \ ((req)->cmd_flags & REQ_OP_MASK) /* obsolete, don't use in new code */ static inline void bio_set_op_attrs(struct bio *bio, unsigned op, unsigned op_flags) { bio->bi_opf = op | op_flags; } static inline bool op_is_write(unsigned int op) { return (op & 1); } /* * Check if the bio or request is one that needs special treatment in the * flush state machine. */ static inline bool op_is_flush(unsigned int op) { return op & (REQ_FUA | REQ_PREFLUSH); } /* * Reads are always treated as synchronous, as are requests with the FUA or * PREFLUSH flag. Other operations may be marked as synchronous using the * REQ_SYNC flag. */ static inline bool op_is_sync(unsigned int op) { return (op & REQ_OP_MASK) == REQ_OP_READ || (op & (REQ_SYNC | REQ_FUA | REQ_PREFLUSH)); } static inline bool op_is_discard(unsigned int op) { return (op & REQ_OP_MASK) == REQ_OP_DISCARD; } /* * Check if a bio or request operation is a zone management operation. */ static inline bool op_is_zone_mgmt(enum req_opf op) { switch (op & REQ_OP_MASK) { case REQ_OP_ZONE_RESET: case REQ_OP_ZONE_RESET_ALL: case REQ_OP_ZONE_OPEN: case REQ_OP_ZONE_CLOSE: case REQ_OP_ZONE_FINISH: return true; default: return false; } } static inline int op_stat_group(unsigned int op) { if (op_is_discard(op)) return STAT_DISCARD; return op_is_write(op); } typedef unsigned int blk_qc_t; #define BLK_QC_T_NONE -1U #define BLK_QC_T_SHIFT 16 #define BLK_QC_T_INTERNAL (1U << 31) static inline bool blk_qc_t_valid(blk_qc_t cookie) { return cookie != BLK_QC_T_NONE; } static inline unsigned int blk_qc_t_to_queue_num(blk_qc_t cookie) { return (cookie & ~BLK_QC_T_INTERNAL) >> BLK_QC_T_SHIFT; } static inline unsigned int blk_qc_t_to_tag(blk_qc_t cookie) { return cookie & ((1u << BLK_QC_T_SHIFT) - 1); } static inline bool blk_qc_t_is_internal(blk_qc_t cookie) { return (cookie & BLK_QC_T_INTERNAL) != 0; } struct blk_rq_stat { u64 mean; u64 min; u64 max; u32 nr_samples; u64 batch; }; #endif /* __LINUX_BLK_TYPES_H */ PK ! J�>�B B sock_diag.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SOCK_DIAG_H__ #define __SOCK_DIAG_H__ #include <linux/netlink.h> #include <linux/user_namespace.h> #include <net/net_namespace.h> #include <net/sock.h> #include <uapi/linux/sock_diag.h> struct sk_buff; struct nlmsghdr; struct sock; struct sock_diag_handler { __u8 family; int (*dump)(struct sk_buff *skb, struct nlmsghdr *nlh); int (*get_info)(struct sk_buff *skb, struct sock *sk); int (*destroy)(struct sk_buff *skb, struct nlmsghdr *nlh); }; int sock_diag_register(const struct sock_diag_handler *h); void sock_diag_unregister(const struct sock_diag_handler *h); void sock_diag_register_inet_compat(int (*fn)(struct sk_buff *skb, struct nlmsghdr *nlh)); void sock_diag_unregister_inet_compat(int (*fn)(struct sk_buff *skb, struct nlmsghdr *nlh)); u64 __sock_gen_cookie(struct sock *sk); static inline u64 sock_gen_cookie(struct sock *sk) { u64 cookie; preempt_disable(); cookie = __sock_gen_cookie(sk); preempt_enable(); return cookie; } int sock_diag_check_cookie(struct sock *sk, const __u32 *cookie); void sock_diag_save_cookie(struct sock *sk, __u32 *cookie); int sock_diag_put_meminfo(struct sock *sk, struct sk_buff *skb, int attr); int sock_diag_put_filterinfo(bool may_report_filterinfo, struct sock *sk, struct sk_buff *skb, int attrtype); static inline enum sknetlink_groups sock_diag_destroy_group(const struct sock *sk) { switch (sk->sk_family) { case AF_INET: if (sk->sk_type == SOCK_RAW) return SKNLGRP_NONE; switch (sk->sk_protocol) { case IPPROTO_TCP: return SKNLGRP_INET_TCP_DESTROY; case IPPROTO_UDP: return SKNLGRP_INET_UDP_DESTROY; default: return SKNLGRP_NONE; } case AF_INET6: if (sk->sk_type == SOCK_RAW) return SKNLGRP_NONE; switch (sk->sk_protocol) { case IPPROTO_TCP: return SKNLGRP_INET6_TCP_DESTROY; case IPPROTO_UDP: return SKNLGRP_INET6_UDP_DESTROY; default: return SKNLGRP_NONE; } default: return SKNLGRP_NONE; } } static inline bool sock_diag_has_destroy_listeners(const struct sock *sk) { const struct net *n = sock_net(sk); const enum sknetlink_groups group = sock_diag_destroy_group(sk); return group != SKNLGRP_NONE && n->diag_nlsk && netlink_has_listeners(n->diag_nlsk, group); } void sock_diag_broadcast_destroy(struct sock *sk); int sock_diag_destroy(struct sock *sk, int err); #endif PK ! 9fW W resource_ext.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2015, Intel Corporation * Author: Jiang Liu <jiang.liu@linux.intel.com> */ #ifndef _LINUX_RESOURCE_EXT_H #define _LINUX_RESOURCE_EXT_H #include <linux/types.h> #include <linux/list.h> #include <linux/ioport.h> #include <linux/slab.h> /* Represent resource window for bridge devices */ struct resource_win { struct resource res; /* In master (CPU) address space */ resource_size_t offset; /* Translation offset for bridge */ }; /* * Common resource list management data structure and interfaces to support * ACPI, PNP and PCI host bridge etc. */ struct resource_entry { struct list_head node; struct resource *res; /* In master (CPU) address space */ resource_size_t offset; /* Translation offset for bridge */ struct resource __res; /* Default storage for res */ }; extern struct resource_entry * resource_list_create_entry(struct resource *res, size_t extra_size); extern void resource_list_free(struct list_head *head); static inline void resource_list_add(struct resource_entry *entry, struct list_head *head) { list_add(&entry->node, head); } static inline void resource_list_add_tail(struct resource_entry *entry, struct list_head *head) { list_add_tail(&entry->node, head); } static inline void resource_list_del(struct resource_entry *entry) { list_del(&entry->node); } static inline void resource_list_free_entry(struct resource_entry *entry) { kfree(entry); } static inline void resource_list_destroy_entry(struct resource_entry *entry) { resource_list_del(entry); resource_list_free_entry(entry); } #define resource_list_for_each_entry(entry, list) \ list_for_each_entry((entry), (list), node) #define resource_list_for_each_entry_safe(entry, tmp, list) \ list_for_each_entry_safe((entry), (tmp), (list), node) static inline struct resource_entry * resource_list_first_type(struct list_head *list, unsigned long type) { struct resource_entry *entry; resource_list_for_each_entry(entry, list) { if (resource_type(entry->res) == type) return entry; } return NULL; } #endif /* _LINUX_RESOURCE_EXT_H */ PK ! &Q O�( �( atmdev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* atmdev.h - ATM device driver declarations and various related items */ #ifndef LINUX_ATMDEV_H #define LINUX_ATMDEV_H #include <linux/wait.h> /* wait_queue_head_t */ #include <linux/time.h> /* struct timeval */ #include <linux/net.h> #include <linux/bug.h> #include <linux/skbuff.h> /* struct sk_buff */ #include <linux/uio.h> #include <net/sock.h> #include <linux/atomic.h> #include <linux/refcount.h> #include <uapi/linux/atmdev.h> #ifdef CONFIG_PROC_FS #include <linux/proc_fs.h> extern struct proc_dir_entry *atm_proc_root; #endif #ifdef CONFIG_COMPAT #include <linux/compat.h> struct compat_atm_iobuf { int length; compat_uptr_t buffer; }; #endif struct k_atm_aal_stats { #define __HANDLE_ITEM(i) atomic_t i __AAL_STAT_ITEMS #undef __HANDLE_ITEM }; struct k_atm_dev_stats { struct k_atm_aal_stats aal0; struct k_atm_aal_stats aal34; struct k_atm_aal_stats aal5; }; struct device; enum { ATM_VF_ADDR, /* Address is in use. Set by anybody, cleared by device driver. */ ATM_VF_READY, /* VC is ready to transfer data. Set by device driver, cleared by anybody. */ ATM_VF_PARTIAL, /* resources are bound to PVC (partial PVC setup), controlled by socket layer */ ATM_VF_REGIS, /* registered with demon, controlled by SVC socket layer */ ATM_VF_BOUND, /* local SAP is set, controlled by SVC socket layer */ ATM_VF_RELEASED, /* demon has indicated/requested release, controlled by SVC socket layer */ ATM_VF_HASQOS, /* QOS parameters have been set */ ATM_VF_LISTEN, /* socket is used for listening */ ATM_VF_META, /* SVC socket isn't used for normal data traffic and doesn't depend on signaling to be available */ ATM_VF_SESSION, /* VCC is p2mp session control descriptor */ ATM_VF_HASSAP, /* SAP has been set */ ATM_VF_CLOSE, /* asynchronous close - treat like VF_RELEASED*/ ATM_VF_WAITING, /* waiting for reply from sigd */ ATM_VF_IS_CLIP, /* in use by CLIP protocol */ }; #define ATM_VF2VS(flags) \ (test_bit(ATM_VF_READY,&(flags)) ? ATM_VS_CONNECTED : \ test_bit(ATM_VF_RELEASED,&(flags)) ? ATM_VS_CLOSING : \ test_bit(ATM_VF_LISTEN,&(flags)) ? ATM_VS_LISTEN : \ test_bit(ATM_VF_REGIS,&(flags)) ? ATM_VS_INUSE : \ test_bit(ATM_VF_BOUND,&(flags)) ? ATM_VS_BOUND : ATM_VS_IDLE) enum { ATM_DF_REMOVED, /* device was removed from atm_devs list */ }; #define ATM_PHY_SIG_LOST 0 /* no carrier/light */ #define ATM_PHY_SIG_UNKNOWN 1 /* carrier/light status is unknown */ #define ATM_PHY_SIG_FOUND 2 /* carrier/light okay */ #define ATM_ATMOPT_CLP 1 /* set CLP bit */ struct atm_vcc { /* struct sock has to be the first member of atm_vcc */ struct sock sk; unsigned long flags; /* VCC flags (ATM_VF_*) */ short vpi; /* VPI and VCI (types must be equal */ /* with sockaddr) */ int vci; unsigned long aal_options; /* AAL layer options */ unsigned long atm_options; /* ATM layer options */ struct atm_dev *dev; /* device back pointer */ struct atm_qos qos; /* QOS */ struct atm_sap sap; /* SAP */ void (*release_cb)(struct atm_vcc *vcc); /* release_sock callback */ void (*push)(struct atm_vcc *vcc,struct sk_buff *skb); void (*pop)(struct atm_vcc *vcc,struct sk_buff *skb); /* optional */ int (*push_oam)(struct atm_vcc *vcc,void *cell); int (*send)(struct atm_vcc *vcc,struct sk_buff *skb); void *dev_data; /* per-device data */ void *proto_data; /* per-protocol data */ struct k_atm_aal_stats *stats; /* pointer to AAL stats group */ struct module *owner; /* owner of ->push function */ /* SVC part --- may move later ------------------------------------- */ short itf; /* interface number */ struct sockaddr_atmsvc local; struct sockaddr_atmsvc remote; /* Multipoint part ------------------------------------------------- */ struct atm_vcc *session; /* session VCC descriptor */ /* Other stuff ----------------------------------------------------- */ void *user_back; /* user backlink - not touched by */ /* native ATM stack. Currently used */ /* by CLIP and sch_atm. */ }; static inline struct atm_vcc *atm_sk(struct sock *sk) { return (struct atm_vcc *)sk; } static inline struct atm_vcc *ATM_SD(struct socket *sock) { return atm_sk(sock->sk); } static inline struct sock *sk_atm(struct atm_vcc *vcc) { return (struct sock *)vcc; } struct atm_dev_addr { struct sockaddr_atmsvc addr; /* ATM address */ struct list_head entry; /* next address */ }; enum atm_addr_type_t { ATM_ADDR_LOCAL, ATM_ADDR_LECS }; struct atm_dev { const struct atmdev_ops *ops; /* device operations; NULL if unused */ const struct atmphy_ops *phy; /* PHY operations, may be undefined */ /* (NULL) */ const char *type; /* device type name */ int number; /* device index */ void *dev_data; /* per-device data */ void *phy_data; /* private PHY data */ unsigned long flags; /* device flags (ATM_DF_*) */ struct list_head local; /* local ATM addresses */ struct list_head lecs; /* LECS ATM addresses learned via ILMI */ unsigned char esi[ESI_LEN]; /* ESI ("MAC" addr) */ struct atm_cirange ci_range; /* VPI/VCI range */ struct k_atm_dev_stats stats; /* statistics */ char signal; /* signal status (ATM_PHY_SIG_*) */ int link_rate; /* link rate (default: OC3) */ refcount_t refcnt; /* reference count */ spinlock_t lock; /* protect internal members */ #ifdef CONFIG_PROC_FS struct proc_dir_entry *proc_entry; /* proc entry */ char *proc_name; /* proc entry name */ #endif struct device class_dev; /* sysfs device */ struct list_head dev_list; /* linkage */ }; /* OF: send_Oam Flags */ #define ATM_OF_IMMED 1 /* Attempt immediate delivery */ #define ATM_OF_INRATE 2 /* Attempt in-rate delivery */ struct atmdev_ops { /* only send is required */ void (*dev_close)(struct atm_dev *dev); int (*open)(struct atm_vcc *vcc); void (*close)(struct atm_vcc *vcc); int (*ioctl)(struct atm_dev *dev,unsigned int cmd,void __user *arg); #ifdef CONFIG_COMPAT int (*compat_ioctl)(struct atm_dev *dev,unsigned int cmd, void __user *arg); #endif int (*pre_send)(struct atm_vcc *vcc, struct sk_buff *skb); int (*send)(struct atm_vcc *vcc,struct sk_buff *skb); int (*send_bh)(struct atm_vcc *vcc, struct sk_buff *skb); int (*send_oam)(struct atm_vcc *vcc,void *cell,int flags); void (*phy_put)(struct atm_dev *dev,unsigned char value, unsigned long addr); unsigned char (*phy_get)(struct atm_dev *dev,unsigned long addr); int (*change_qos)(struct atm_vcc *vcc,struct atm_qos *qos,int flags); int (*proc_read)(struct atm_dev *dev,loff_t *pos,char *page); struct module *owner; }; struct atmphy_ops { int (*start)(struct atm_dev *dev); int (*ioctl)(struct atm_dev *dev,unsigned int cmd,void __user *arg); void (*interrupt)(struct atm_dev *dev); int (*stop)(struct atm_dev *dev); }; struct atm_skb_data { struct atm_vcc *vcc; /* ATM VCC */ unsigned long atm_options; /* ATM layer options */ unsigned int acct_truesize; /* truesize accounted to vcc */ } __packed; #define VCC_HTABLE_SIZE 32 extern struct hlist_head vcc_hash[VCC_HTABLE_SIZE]; extern rwlock_t vcc_sklist_lock; #define ATM_SKB(skb) (((struct atm_skb_data *) (skb)->cb)) struct atm_dev *atm_dev_register(const char *type, struct device *parent, const struct atmdev_ops *ops, int number, /* -1 == pick first available */ unsigned long *flags); struct atm_dev *atm_dev_lookup(int number); void atm_dev_deregister(struct atm_dev *dev); /* atm_dev_signal_change * * Propagate lower layer signal change in atm_dev->signal to netdevice. * The event will be sent via a notifier call chain. */ void atm_dev_signal_change(struct atm_dev *dev, char signal); void vcc_insert_socket(struct sock *sk); void atm_dev_release_vccs(struct atm_dev *dev); static inline void atm_account_tx(struct atm_vcc *vcc, struct sk_buff *skb) { /* * Because ATM skbs may not belong to a sock (and we don't * necessarily want to), skb->truesize may be adjusted, * escaping the hack in pskb_expand_head() which avoids * doing so for some cases. So stash the value of truesize * at the time we accounted it, and atm_pop_raw() can use * that value later, in case it changes. */ refcount_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc); ATM_SKB(skb)->acct_truesize = skb->truesize; ATM_SKB(skb)->atm_options = vcc->atm_options; } static inline void atm_return_tx(struct atm_vcc *vcc, struct sk_buff *skb) { WARN_ON_ONCE(refcount_sub_and_test(ATM_SKB(skb)->acct_truesize, &sk_atm(vcc)->sk_wmem_alloc)); } static inline void atm_force_charge(struct atm_vcc *vcc,int truesize) { atomic_add(truesize, &sk_atm(vcc)->sk_rmem_alloc); } static inline void atm_return(struct atm_vcc *vcc,int truesize) { atomic_sub(truesize, &sk_atm(vcc)->sk_rmem_alloc); } static inline int atm_may_send(struct atm_vcc *vcc,unsigned int size) { return (size + refcount_read(&sk_atm(vcc)->sk_wmem_alloc)) < sk_atm(vcc)->sk_sndbuf; } static inline void atm_dev_hold(struct atm_dev *dev) { refcount_inc(&dev->refcnt); } static inline void atm_dev_put(struct atm_dev *dev) { if (refcount_dec_and_test(&dev->refcnt)) { BUG_ON(!test_bit(ATM_DF_REMOVED, &dev->flags)); if (dev->ops->dev_close) dev->ops->dev_close(dev); put_device(&dev->class_dev); } } int atm_charge(struct atm_vcc *vcc,int truesize); struct sk_buff *atm_alloc_charge(struct atm_vcc *vcc,int pdu_size, gfp_t gfp_flags); int atm_pcr_goal(const struct atm_trafprm *tp); void vcc_release_async(struct atm_vcc *vcc, int reply); struct atm_ioctl { struct module *owner; /* A module reference is kept if appropriate over this call. * Return -ENOIOCTLCMD if you don't handle it. */ int (*ioctl)(struct socket *, unsigned int cmd, unsigned long arg); struct list_head list; }; /** * register_atm_ioctl - register handler for ioctl operations * * Special (non-device) handlers of ioctl's should * register here. If you're a normal device, you should * set .ioctl in your atmdev_ops instead. */ void register_atm_ioctl(struct atm_ioctl *); /** * deregister_atm_ioctl - remove the ioctl handler */ void deregister_atm_ioctl(struct atm_ioctl *); /* register_atmdevice_notifier - register atm_dev notify events * * Clients like br2684 will register notify events * Currently we notify of signal found/lost */ int register_atmdevice_notifier(struct notifier_block *nb); void unregister_atmdevice_notifier(struct notifier_block *nb); #endif PK ! �ȿG G scx200.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* linux/include/linux/scx200.h Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> Defines for the National Semiconductor SCx200 Processors */ /* Interesting stuff for the National Semiconductor SCx200 CPU */ extern unsigned scx200_cb_base; #define scx200_cb_present() (scx200_cb_base!=0) /* F0 PCI Header/Bridge Configuration Registers */ #define SCx200_DOCCS_BASE 0x78 /* DOCCS Base Address Register */ #define SCx200_DOCCS_CTRL 0x7c /* DOCCS Control Register */ /* GPIO Register Block */ #define SCx200_GPIO_SIZE 0x2c /* Size of GPIO register block */ /* General Configuration Block */ #define SCx200_CB_BASE_FIXED 0x9000 /* Base fixed at 0x9000 according to errata? */ /* Watchdog Timer */ #define SCx200_WDT_OFFSET 0x00 /* offset within configuration block */ #define SCx200_WDT_SIZE 0x05 /* size */ #define SCx200_WDT_WDTO 0x00 /* Time-Out Register */ #define SCx200_WDT_WDCNFG 0x02 /* Configuration Register */ #define SCx200_WDT_WDSTS 0x04 /* Status Register */ #define SCx200_WDT_WDSTS_WDOVF (1<<0) /* Overflow bit */ /* High Resolution Timer */ #define SCx200_TIMER_OFFSET 0x08 #define SCx200_TIMER_SIZE 0x06 /* Clock Generators */ #define SCx200_CLOCKGEN_OFFSET 0x10 #define SCx200_CLOCKGEN_SIZE 0x10 /* Pin Multiplexing and Miscellaneous Configuration Registers */ #define SCx200_MISC_OFFSET 0x30 #define SCx200_MISC_SIZE 0x10 #define SCx200_PMR 0x30 /* Pin Multiplexing Register */ #define SCx200_MCR 0x34 /* Miscellaneous Configuration Register */ #define SCx200_INTSEL 0x38 /* Interrupt Selection Register */ #define SCx200_IID 0x3c /* IA On a Chip Identification Number Reg */ #define SCx200_REV 0x3d /* Revision Register */ #define SCx200_CBA 0x3e /* Configuration Base Address Register */ #define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */ PK ! ��7G G reset-controller.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RESET_CONTROLLER_H_ #define _LINUX_RESET_CONTROLLER_H_ #include <linux/list.h> struct reset_controller_dev; /** * struct reset_control_ops - reset controller driver callbacks * * @reset: for self-deasserting resets, does all necessary * things to reset the device * @assert: manually assert the reset line, if supported * @deassert: manually deassert the reset line, if supported * @status: return the status of the reset line, if supported */ struct reset_control_ops { int (*reset)(struct reset_controller_dev *rcdev, unsigned long id); int (*assert)(struct reset_controller_dev *rcdev, unsigned long id); int (*deassert)(struct reset_controller_dev *rcdev, unsigned long id); int (*status)(struct reset_controller_dev *rcdev, unsigned long id); }; struct module; struct device_node; struct of_phandle_args; /** * struct reset_control_lookup - represents a single lookup entry * * @list: internal list of all reset lookup entries * @provider: name of the reset controller device controlling this reset line * @index: ID of the reset controller in the reset controller device * @dev_id: name of the device associated with this reset line * @con_id: name of the reset line (can be NULL) */ struct reset_control_lookup { struct list_head list; const char *provider; unsigned int index; const char *dev_id; const char *con_id; }; #define RESET_LOOKUP(_provider, _index, _dev_id, _con_id) \ { \ .provider = _provider, \ .index = _index, \ .dev_id = _dev_id, \ .con_id = _con_id, \ } /** * struct reset_controller_dev - reset controller entity that might * provide multiple reset controls * @ops: a pointer to device specific struct reset_control_ops * @owner: kernel module of the reset controller driver * @list: internal list of reset controller devices * @reset_control_head: head of internal list of requested reset controls * @dev: corresponding driver model device struct * @of_node: corresponding device tree node as phandle target * @of_reset_n_cells: number of cells in reset line specifiers * @of_xlate: translation function to translate from specifier as found in the * device tree to id as given to the reset control ops, defaults * to :c:func:`of_reset_simple_xlate`. * @nr_resets: number of reset controls in this reset controller device */ struct reset_controller_dev { const struct reset_control_ops *ops; struct module *owner; struct list_head list; struct list_head reset_control_head; struct device *dev; struct device_node *of_node; int of_reset_n_cells; int (*of_xlate)(struct reset_controller_dev *rcdev, const struct of_phandle_args *reset_spec); unsigned int nr_resets; }; #if IS_ENABLED(CONFIG_RESET_CONTROLLER) int reset_controller_register(struct reset_controller_dev *rcdev); void reset_controller_unregister(struct reset_controller_dev *rcdev); struct device; int devm_reset_controller_register(struct device *dev, struct reset_controller_dev *rcdev); void reset_controller_add_lookup(struct reset_control_lookup *lookup, unsigned int num_entries); #else static inline int reset_controller_register(struct reset_controller_dev *rcdev) { return 0; } static inline void reset_controller_unregister(struct reset_controller_dev *rcdev) { } static inline int devm_reset_controller_register(struct device *dev, struct reset_controller_dev *rcdev) { return 0; } static inline void reset_controller_add_lookup(struct reset_control_lookup *lookup, unsigned int num_entries) { } #endif #endif PK ! �qt� � pinctrl/machine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Machine interface for the pinctrl subsystem. * * Copyright (C) 2011 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * Based on bits of regulator core, gpio core and clk core * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef __LINUX_PINCTRL_MACHINE_H #define __LINUX_PINCTRL_MACHINE_H #include <linux/bug.h> #include <linux/pinctrl/pinctrl-state.h> enum pinctrl_map_type { PIN_MAP_TYPE_INVALID, PIN_MAP_TYPE_DUMMY_STATE, PIN_MAP_TYPE_MUX_GROUP, PIN_MAP_TYPE_CONFIGS_PIN, PIN_MAP_TYPE_CONFIGS_GROUP, }; /** * struct pinctrl_map_mux - mapping table content for MAP_TYPE_MUX_GROUP * @group: the name of the group whose mux function is to be configured. This * field may be left NULL, and the first applicable group for the function * will be used. * @function: the mux function to select for the group */ struct pinctrl_map_mux { const char *group; const char *function; }; /** * struct pinctrl_map_configs - mapping table content for MAP_TYPE_CONFIGS_* * @group_or_pin: the name of the pin or group whose configuration parameters * are to be configured. * @configs: a pointer to an array of config parameters/values to program into * hardware. Each individual pin controller defines the format and meaning * of config parameters. * @num_configs: the number of entries in array @configs */ struct pinctrl_map_configs { const char *group_or_pin; unsigned long *configs; unsigned num_configs; }; /** * struct pinctrl_map - boards/machines shall provide this map for devices * @dev_name: the name of the device using this specific mapping, the name * must be the same as in your struct device*. If this name is set to the * same name as the pin controllers own dev_name(), the map entry will be * hogged by the driver itself upon registration * @name: the name of this specific map entry for the particular machine. * This is the parameter passed to pinmux_lookup_state() * @type: the type of mapping table entry * @ctrl_dev_name: the name of the device controlling this specific mapping, * the name must be the same as in your struct device*. This field is not * used for PIN_MAP_TYPE_DUMMY_STATE * @data: Data specific to the mapping type */ struct pinctrl_map { const char *dev_name; const char *name; enum pinctrl_map_type type; const char *ctrl_dev_name; union { struct pinctrl_map_mux mux; struct pinctrl_map_configs configs; } data; }; /* Convenience macros to create mapping table entries */ #define PIN_MAP_DUMMY_STATE(dev, state) \ { \ .dev_name = dev, \ .name = state, \ .type = PIN_MAP_TYPE_DUMMY_STATE, \ } #define PIN_MAP_MUX_GROUP(dev, state, pinctrl, grp, func) \ { \ .dev_name = dev, \ .name = state, \ .type = PIN_MAP_TYPE_MUX_GROUP, \ .ctrl_dev_name = pinctrl, \ .data.mux = { \ .group = grp, \ .function = func, \ }, \ } #define PIN_MAP_MUX_GROUP_DEFAULT(dev, pinctrl, grp, func) \ PIN_MAP_MUX_GROUP(dev, PINCTRL_STATE_DEFAULT, pinctrl, grp, func) #define PIN_MAP_MUX_GROUP_HOG(dev, state, grp, func) \ PIN_MAP_MUX_GROUP(dev, state, dev, grp, func) #define PIN_MAP_MUX_GROUP_HOG_DEFAULT(dev, grp, func) \ PIN_MAP_MUX_GROUP(dev, PINCTRL_STATE_DEFAULT, dev, grp, func) #define PIN_MAP_CONFIGS_PIN(dev, state, pinctrl, pin, cfgs) \ { \ .dev_name = dev, \ .name = state, \ .type = PIN_MAP_TYPE_CONFIGS_PIN, \ .ctrl_dev_name = pinctrl, \ .data.configs = { \ .group_or_pin = pin, \ .configs = cfgs, \ .num_configs = ARRAY_SIZE(cfgs), \ }, \ } #define PIN_MAP_CONFIGS_PIN_DEFAULT(dev, pinctrl, pin, cfgs) \ PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, pinctrl, pin, cfgs) #define PIN_MAP_CONFIGS_PIN_HOG(dev, state, pin, cfgs) \ PIN_MAP_CONFIGS_PIN(dev, state, dev, pin, cfgs) #define PIN_MAP_CONFIGS_PIN_HOG_DEFAULT(dev, pin, cfgs) \ PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, dev, pin, cfgs) #define PIN_MAP_CONFIGS_GROUP(dev, state, pinctrl, grp, cfgs) \ { \ .dev_name = dev, \ .name = state, \ .type = PIN_MAP_TYPE_CONFIGS_GROUP, \ .ctrl_dev_name = pinctrl, \ .data.configs = { \ .group_or_pin = grp, \ .configs = cfgs, \ .num_configs = ARRAY_SIZE(cfgs), \ }, \ } #define PIN_MAP_CONFIGS_GROUP_DEFAULT(dev, pinctrl, grp, cfgs) \ PIN_MAP_CONFIGS_GROUP(dev, PINCTRL_STATE_DEFAULT, pinctrl, grp, cfgs) #define PIN_MAP_CONFIGS_GROUP_HOG(dev, state, grp, cfgs) \ PIN_MAP_CONFIGS_GROUP(dev, state, dev, grp, cfgs) #define PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(dev, grp, cfgs) \ PIN_MAP_CONFIGS_GROUP(dev, PINCTRL_STATE_DEFAULT, dev, grp, cfgs) #ifdef CONFIG_PINCTRL extern int pinctrl_register_mappings(const struct pinctrl_map *map, unsigned num_maps); extern void pinctrl_unregister_mappings(const struct pinctrl_map *map); extern void pinctrl_provide_dummies(void); #else static inline int pinctrl_register_mappings(const struct pinctrl_map *map, unsigned num_maps) { return 0; } static inline void pinctrl_unregister_mappings(const struct pinctrl_map *map) { } static inline void pinctrl_provide_dummies(void) { } #endif /* !CONFIG_PINCTRL */ #endif PK ! �Ⱥ3�% �% pinctrl/pinconf-generic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Interface the generic pinconfig portions of the pinctrl subsystem * * Copyright (C) 2011 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * This interface is used in the core to keep track of pins. * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H #define __LINUX_PINCTRL_PINCONF_GENERIC_H #include <linux/device.h> #include <linux/pinctrl/machine.h> struct pinctrl_dev; struct pinctrl_map; /** * enum pin_config_param - possible pin configuration parameters * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it * weakly drives the last value on a tristate bus, also known as a "bus * holder", "bus keeper" or "repeater". This allows another device on the * bus to change the value by driving the bus high or low and switching to * tristate. The argument is ignored. * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a * transition from say pull-up to pull-down implies that you disable * pull-up in the process, this setting disables all biasing. * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance * mode, also know as "third-state" (tristate) or "high-Z" or "floating". * On output pins this effectively disconnects the pin, which is useful * if for example some other pin is going to drive the signal connected * to it for a while. Pins used for input are usually always high * impedance. * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high * impedance to GROUND). If the argument is != 0 pull-down is enabled, * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based * on embedded knowledge of the controller hardware, like current mux * function. The pull direction and possibly strength too will normally * be decided completely inside the hardware block and not be readable * from the kernel side. * If the argument is != 0 pull up/down is enabled, if it is 0, the * configuration is ignored. The proper way to disable it is to use * @PIN_CONFIG_BIAS_DISABLE. * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high * impedance to VDD). If the argument is != 0 pull-up is enabled, * if it is 0, pull-up is total, i.e. the pin is connected to VDD. * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open * collector) which means it is usually wired with other output ports * which are then pulled up with an external resistor. Setting this * config will enable open drain mode, the argument is ignored. * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source * (open emitter). Setting this config will enable open source mode, the * argument is ignored. * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and * low, this is the most typical case and is typically achieved with two * active transistors on the output. Setting this config will enable * push-pull mode, the argument is ignored. * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current * passed as argument. The argument is in mA. * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current * passed as argument. The argument is in uA. * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, * which means it will wait for signals to settle when reading inputs. The * argument gives the debounce time in usecs. Setting the * argument to zero turns debouncing off. * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not * affect the pin's ability to drive output. 1 enables input, 0 disables * input. * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, * the threshold value is given on a custom format as argument when * setting pins to this mode. * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, * schmitt-trigger mode is disabled. * @PIN_CONFIG_MODE_LOW_POWER: this will configure the pin for low power * operation, if several modes of operation are supported these can be * passed in the argument on a custom form, else just use argument 1 * to indicate low power mode, argument 0 turns low power mode off. * @PIN_CONFIG_MODE_PWM: this will configure the pin for PWM * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a * value on the line. Use argument 1 to indicate high level, argument 0 to * indicate low level. (Please see Documentation/driver-api/pin-control.rst, * section "GPIO mode pitfalls" for a discussion around this parameter.) * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode * without driving a value there. For most platforms this reduces to * enable the output buffers and then let the pin controller current * configuration (eg. the currently selected mux function) drive values on * the line. Use argument 1 to enable output mode, argument 0 to disable * it. * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power * supplies, the argument to this parameter (on a custom format) tells * the driver which alternative power source to use. * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs) * or latch delay (on outputs) this parameter (in a custom format) * specifies the clock skew or latch delay. It typically controls how * many double inverters are put in front of the line. * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state. * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to * this parameter (on a custom format) tells the driver which alternative * slew rate to use. * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if * you need to pass in custom configurations to the pin controller, use * PIN_CONFIG_END+1 as the base offset. * @PIN_CONFIG_MAX: this is the maximum configuration value that can be * presented using the packed format. */ enum pin_config_param { PIN_CONFIG_BIAS_BUS_HOLD, PIN_CONFIG_BIAS_DISABLE, PIN_CONFIG_BIAS_HIGH_IMPEDANCE, PIN_CONFIG_BIAS_PULL_DOWN, PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, PIN_CONFIG_BIAS_PULL_UP, PIN_CONFIG_DRIVE_OPEN_DRAIN, PIN_CONFIG_DRIVE_OPEN_SOURCE, PIN_CONFIG_DRIVE_PUSH_PULL, PIN_CONFIG_DRIVE_STRENGTH, PIN_CONFIG_DRIVE_STRENGTH_UA, PIN_CONFIG_INPUT_DEBOUNCE, PIN_CONFIG_INPUT_ENABLE, PIN_CONFIG_INPUT_SCHMITT, PIN_CONFIG_INPUT_SCHMITT_ENABLE, PIN_CONFIG_MODE_LOW_POWER, PIN_CONFIG_MODE_PWM, PIN_CONFIG_OUTPUT, PIN_CONFIG_OUTPUT_ENABLE, PIN_CONFIG_PERSIST_STATE, PIN_CONFIG_POWER_SOURCE, PIN_CONFIG_SKEW_DELAY, PIN_CONFIG_SLEEP_HARDWARE_STATE, PIN_CONFIG_SLEW_RATE, PIN_CONFIG_END = 0x7F, PIN_CONFIG_MAX = 0xFF, }; /* * Helpful configuration macro to be used in tables etc. */ #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL)) /* * The following inlines stuffs a configuration parameter and data value * into and out of an unsigned long argument, as used by the generic pin config * system. We put the parameter in the lower 8 bits and the argument in the * upper 24 bits. */ static inline enum pin_config_param pinconf_to_config_param(unsigned long config) { return (enum pin_config_param) (config & 0xffUL); } static inline u32 pinconf_to_config_argument(unsigned long config) { return (u32) ((config >> 8) & 0xffffffUL); } static inline unsigned long pinconf_to_config_packed(enum pin_config_param param, u32 argument) { return PIN_CONF_PACKED(param, argument); } #define PCONFDUMP(a, b, c, d) { \ .param = a, .display = b, .format = c, .has_arg = d \ } struct pin_config_item { const enum pin_config_param param; const char * const display; const char * const format; bool has_arg; }; struct pinconf_generic_params { const char * const property; enum pin_config_param param; u32 default_value; }; int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, unsigned *reserved_maps, unsigned *num_maps, enum pinctrl_map_type type); int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps, enum pinctrl_map_type type); void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map, unsigned num_maps); static inline int pinconf_generic_dt_node_to_map_group( struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps) { return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, PIN_MAP_TYPE_CONFIGS_GROUP); } static inline int pinconf_generic_dt_node_to_map_pin( struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps) { return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, PIN_MAP_TYPE_CONFIGS_PIN); } static inline int pinconf_generic_dt_node_to_map_all( struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps) { /* * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser * to infer the map type from the DT properties used. */ return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, PIN_MAP_TYPE_INVALID); } #endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */ PK ! ��b pinctrl/pinmux.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Interface the pinmux subsystem * * Copyright (C) 2011 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * Based on bits of regulator core, gpio core and clk core * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef __LINUX_PINCTRL_PINMUX_H #define __LINUX_PINCTRL_PINMUX_H #include <linux/list.h> #include <linux/seq_file.h> #include <linux/pinctrl/pinctrl.h> struct pinctrl_dev; /** * struct pinmux_ops - pinmux operations, to be implemented by pin controller * drivers that support pinmuxing * @request: called by the core to see if a certain pin can be made * available for muxing. This is called by the core to acquire the pins * before selecting any actual mux setting across a function. The driver * is allowed to answer "no" by returning a negative error code * @free: the reverse function of the request() callback, frees a pin after * being requested * @get_functions_count: returns number of selectable named functions available * in this pinmux driver * @get_function_name: return the function name of the muxing selector, * called by the core to figure out which mux setting it shall map a * certain device to * @get_function_groups: return an array of groups names (in turn * referencing pins) connected to a certain function selector. The group * name can be used with the generic @pinctrl_ops to retrieve the * actual pins affected. The applicable groups will be returned in * @groups and the number of groups in @num_groups * @set_mux: enable a certain muxing function with a certain pin group. The * driver does not need to figure out whether enabling this function * conflicts some other use of the pins in that group, such collisions * are handled by the pinmux subsystem. The @func_selector selects a * certain function whereas @group_selector selects a certain set of pins * to be used. On simple controllers the latter argument may be ignored * @gpio_request_enable: requests and enables GPIO on a certain pin. * Implement this only if you can mux every pin individually as GPIO. The * affected GPIO range is passed along with an offset(pin number) into that * specific GPIO range - function selectors and pin groups are orthogonal * to this, the core will however make sure the pins do not collide. * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of * @gpio_request_enable * @gpio_set_direction: Since controllers may need different configurations * depending on whether the GPIO is configured as input or output, * a direction selector function may be implemented as a backing * to the GPIO controllers that need pin muxing. * @strict: do not allow simultaneous use of the same pin for GPIO and another * function. Check both gpio_owner and mux_owner strictly before approving * the pin request. */ struct pinmux_ops { int (*request) (struct pinctrl_dev *pctldev, unsigned offset); int (*free) (struct pinctrl_dev *pctldev, unsigned offset); int (*get_functions_count) (struct pinctrl_dev *pctldev); const char *(*get_function_name) (struct pinctrl_dev *pctldev, unsigned selector); int (*get_function_groups) (struct pinctrl_dev *pctldev, unsigned selector, const char * const **groups, unsigned *num_groups); int (*set_mux) (struct pinctrl_dev *pctldev, unsigned func_selector, unsigned group_selector); int (*gpio_request_enable) (struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset); void (*gpio_disable_free) (struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset); int (*gpio_set_direction) (struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset, bool input); bool strict; }; #endif /* __LINUX_PINCTRL_PINMUX_H */ PK ! �՚� � pinctrl/pinconf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Interface the pinconfig portions of the pinctrl subsystem * * Copyright (C) 2011 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * This interface is used in the core to keep track of pins. * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef __LINUX_PINCTRL_PINCONF_H #define __LINUX_PINCTRL_PINCONF_H #include <linux/types.h> struct pinctrl_dev; struct seq_file; /** * struct pinconf_ops - pin config operations, to be implemented by * pin configuration capable drivers. * @is_generic: for pin controllers that want to use the generic interface, * this flag tells the framework that it's generic. * @pin_config_get: get the config of a certain pin, if the requested config * is not available on this controller this should return -ENOTSUPP * and if it is available but disabled it should return -EINVAL * @pin_config_set: configure an individual pin * @pin_config_group_get: get configurations for an entire pin group; should * return -ENOTSUPP and -EINVAL using the same rules as pin_config_get. * @pin_config_group_set: configure all pins in a group * @pin_config_dbg_show: optional debugfs display hook that will provide * per-device info for a certain pin in debugfs * @pin_config_group_dbg_show: optional debugfs display hook that will provide * per-device info for a certain group in debugfs * @pin_config_config_dbg_show: optional debugfs display hook that will decode * and display a driver's pin configuration parameter */ struct pinconf_ops { #ifdef CONFIG_GENERIC_PINCONF bool is_generic; #endif int (*pin_config_get) (struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config); int (*pin_config_set) (struct pinctrl_dev *pctldev, unsigned pin, unsigned long *configs, unsigned num_configs); int (*pin_config_group_get) (struct pinctrl_dev *pctldev, unsigned selector, unsigned long *config); int (*pin_config_group_set) (struct pinctrl_dev *pctldev, unsigned selector, unsigned long *configs, unsigned num_configs); void (*pin_config_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned offset); void (*pin_config_group_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned selector); void (*pin_config_config_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned long config); }; #endif /* __LINUX_PINCTRL_PINCONF_H */ PK ! o� ¤ � pinctrl/pinctrl-state.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Standard pin control state definitions */ #ifndef __LINUX_PINCTRL_PINCTRL_STATE_H #define __LINUX_PINCTRL_PINCTRL_STATE_H /** * @PINCTRL_STATE_DEFAULT: the state the pinctrl handle shall be put * into as default, usually this means the pins are up and ready to * be used by the device driver. This state is commonly used by * hogs to configure muxing and pins at boot, and also as a state * to go into when returning from sleep and idle in * .pm_runtime_resume() or ordinary .resume() for example. * @PINCTRL_STATE_INIT: normally the pinctrl will be set to "default" * before the driver's probe() function is called. There are some * drivers where that is not appropriate becausing doing so would * glitch the pins. In those cases you can add an "init" pinctrl * which is the state of the pins before drive probe. After probe * if the pins are still in "init" state they'll be moved to * "default". * @PINCTRL_STATE_IDLE: the state the pinctrl handle shall be put into * when the pins are idle. This is a state where the system is relaxed * but not fully sleeping - some power may be on but clocks gated for * example. Could typically be set from a pm_runtime_suspend() or * pm_runtime_idle() operation. * @PINCTRL_STATE_SLEEP: the state the pinctrl handle shall be put into * when the pins are sleeping. This is a state where the system is in * its lowest sleep state. Could typically be set from an * ordinary .suspend() function. */ #define PINCTRL_STATE_DEFAULT "default" #define PINCTRL_STATE_INIT "init" #define PINCTRL_STATE_IDLE "idle" #define PINCTRL_STATE_SLEEP "sleep" #endif /* __LINUX_PINCTRL_PINCTRL_STATE_H */ PK ! ���K� � pinctrl/pinctrl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Interface the pinctrl subsystem * * Copyright (C) 2011 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * This interface is used in the core to keep track of pins. * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef __LINUX_PINCTRL_PINCTRL_H #define __LINUX_PINCTRL_PINCTRL_H #include <linux/radix-tree.h> #include <linux/list.h> #include <linux/seq_file.h> #include <linux/pinctrl/pinctrl-state.h> #include <linux/pinctrl/devinfo.h> struct device; struct pinctrl_dev; struct pinctrl_map; struct pinmux_ops; struct pinconf_ops; struct pin_config_item; struct gpio_chip; struct device_node; /** * struct pinctrl_pin_desc - boards/machines provide information on their * pins, pads or other muxable units in this struct * @number: unique pin number from the global pin number space * @name: a name for this pin * @drv_data: driver-defined per-pin data. pinctrl core does not touch this */ struct pinctrl_pin_desc { unsigned number; const char *name; void *drv_data; }; /* Convenience macro to define a single named or anonymous pin descriptor */ #define PINCTRL_PIN(a, b) { .number = a, .name = b } #define PINCTRL_PIN_ANON(a) { .number = a } /** * struct pinctrl_gpio_range - each pin controller can provide subranges of * the GPIO number space to be handled by the controller * @node: list node for internal use * @name: a name for the chip in this range * @id: an ID number for the chip in this range * @base: base offset of the GPIO range * @pin_base: base pin number of the GPIO range if pins == NULL * @npins: number of pins in the GPIO range, including the base number * @pins: enumeration of pins in GPIO range or NULL * @gc: an optional pointer to a gpio_chip */ struct pinctrl_gpio_range { struct list_head node; const char *name; unsigned int id; unsigned int base; unsigned int pin_base; unsigned int npins; unsigned const *pins; struct gpio_chip *gc; }; /** * struct pinctrl_ops - global pin control operations, to be implemented by * pin controller drivers. * @get_groups_count: Returns the count of total number of groups registered. * @get_group_name: return the group name of the pin group * @get_group_pins: return an array of pins corresponding to a certain * group selector @pins, and the size of the array in @num_pins * @pin_dbg_show: optional debugfs display hook that will provide per-device * info for a certain pin in debugfs * @dt_node_to_map: parse a device tree "pin configuration node", and create * mapping table entries for it. These are returned through the @map and * @num_maps output parameters. This function is optional, and may be * omitted for pinctrl drivers that do not support device tree. * @dt_free_map: free mapping table entries created via @dt_node_to_map. The * top-level @map pointer must be freed, along with any dynamically * allocated members of the mapping table entries themselves. This * function is optional, and may be omitted for pinctrl drivers that do * not support device tree. */ struct pinctrl_ops { int (*get_groups_count) (struct pinctrl_dev *pctldev); const char *(*get_group_name) (struct pinctrl_dev *pctldev, unsigned selector); int (*get_group_pins) (struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins); void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned offset); int (*dt_node_to_map) (struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps); void (*dt_free_map) (struct pinctrl_dev *pctldev, struct pinctrl_map *map, unsigned num_maps); }; /** * struct pinctrl_desc - pin controller descriptor, register this to pin * control subsystem * @name: name for the pin controller * @pins: an array of pin descriptors describing all the pins handled by * this pin controller * @npins: number of descriptors in the array, usually just ARRAY_SIZE() * of the pins field above * @pctlops: pin control operation vtable, to support global concepts like * grouping of pins, this is optional. * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver * @confops: pin config operations vtable, if you support pin configuration in * your driver * @owner: module providing the pin controller, used for refcounting * @num_custom_params: Number of driver-specific custom parameters to be parsed * from the hardware description * @custom_params: List of driver_specific custom parameters to be parsed from * the hardware description * @custom_conf_items: Information how to print @params in debugfs, must be * the same size as the @custom_params, i.e. @num_custom_params * @link_consumers: If true create a device link between pinctrl and its * consumers (i.e. the devices requesting pin control states). This is * sometimes necessary to ascertain the right suspend/resume order for * example. */ struct pinctrl_desc { const char *name; const struct pinctrl_pin_desc *pins; unsigned int npins; const struct pinctrl_ops *pctlops; const struct pinmux_ops *pmxops; const struct pinconf_ops *confops; struct module *owner; #ifdef CONFIG_GENERIC_PINCONF unsigned int num_custom_params; const struct pinconf_generic_params *custom_params; const struct pin_config_item *custom_conf_items; #endif bool link_consumers; }; /* External interface to pin controller */ extern int pinctrl_register_and_init(struct pinctrl_desc *pctldesc, struct device *dev, void *driver_data, struct pinctrl_dev **pctldev); extern int pinctrl_enable(struct pinctrl_dev *pctldev); /* Please use pinctrl_register_and_init() and pinctrl_enable() instead */ extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, struct device *dev, void *driver_data); extern void pinctrl_unregister(struct pinctrl_dev *pctldev); extern int devm_pinctrl_register_and_init(struct device *dev, struct pinctrl_desc *pctldesc, void *driver_data, struct pinctrl_dev **pctldev); /* Please use devm_pinctrl_register_and_init() instead */ extern struct pinctrl_dev *devm_pinctrl_register(struct device *dev, struct pinctrl_desc *pctldesc, void *driver_data); extern void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev); extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range); extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *ranges, unsigned nranges); extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range); extern struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, struct pinctrl_gpio_range *range); extern struct pinctrl_gpio_range * pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, unsigned int pin); extern int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, const unsigned **pins, unsigned *num_pins); #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_PINCTRL) extern struct pinctrl_dev *of_pinctrl_get(struct device_node *np); #else static inline struct pinctrl_dev *of_pinctrl_get(struct device_node *np) { return NULL; } #endif /* CONFIG_OF */ extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); extern const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev); extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); #endif /* __LINUX_PINCTRL_PINCTRL_H */ PK ! L� pinctrl/consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Consumer interface the pin control subsystem * * Copyright (C) 2012 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * Based on bits of regulator core, gpio core and clk core * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef __LINUX_PINCTRL_CONSUMER_H #define __LINUX_PINCTRL_CONSUMER_H #include <linux/err.h> #include <linux/list.h> #include <linux/seq_file.h> #include <linux/pinctrl/pinctrl-state.h> /* This struct is private to the core and should be regarded as a cookie */ struct pinctrl; struct pinctrl_state; struct device; #ifdef CONFIG_PINCTRL /* External interface to pin control */ extern bool pinctrl_gpio_can_use_line(unsigned gpio); extern int pinctrl_gpio_request(unsigned gpio); extern void pinctrl_gpio_free(unsigned gpio); extern int pinctrl_gpio_direction_input(unsigned gpio); extern int pinctrl_gpio_direction_output(unsigned gpio); extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config); extern struct pinctrl * __must_check pinctrl_get(struct device *dev); extern void pinctrl_put(struct pinctrl *p); extern struct pinctrl_state * __must_check pinctrl_lookup_state( struct pinctrl *p, const char *name); extern int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s); extern struct pinctrl * __must_check devm_pinctrl_get(struct device *dev); extern void devm_pinctrl_put(struct pinctrl *p); extern int pinctrl_select_default_state(struct device *dev); #ifdef CONFIG_PM extern int pinctrl_pm_select_default_state(struct device *dev); extern int pinctrl_pm_select_sleep_state(struct device *dev); extern int pinctrl_pm_select_idle_state(struct device *dev); #else static inline int pinctrl_pm_select_default_state(struct device *dev) { return 0; } static inline int pinctrl_pm_select_sleep_state(struct device *dev) { return 0; } static inline int pinctrl_pm_select_idle_state(struct device *dev) { return 0; } #endif #else /* !CONFIG_PINCTRL */ static inline bool pinctrl_gpio_can_use_line(unsigned gpio) { return true; } static inline int pinctrl_gpio_request(unsigned gpio) { return 0; } static inline void pinctrl_gpio_free(unsigned gpio) { } static inline int pinctrl_gpio_direction_input(unsigned gpio) { return 0; } static inline int pinctrl_gpio_direction_output(unsigned gpio) { return 0; } static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) { return 0; } static inline struct pinctrl * __must_check pinctrl_get(struct device *dev) { return NULL; } static inline void pinctrl_put(struct pinctrl *p) { } static inline struct pinctrl_state * __must_check pinctrl_lookup_state( struct pinctrl *p, const char *name) { return NULL; } static inline int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s) { return 0; } static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev) { return NULL; } static inline void devm_pinctrl_put(struct pinctrl *p) { } static inline int pinctrl_select_default_state(struct device *dev) { return 0; } static inline int pinctrl_pm_select_default_state(struct device *dev) { return 0; } static inline int pinctrl_pm_select_sleep_state(struct device *dev) { return 0; } static inline int pinctrl_pm_select_idle_state(struct device *dev) { return 0; } #endif /* CONFIG_PINCTRL */ static inline struct pinctrl * __must_check pinctrl_get_select( struct device *dev, const char *name) { struct pinctrl *p; struct pinctrl_state *s; int ret; p = pinctrl_get(dev); if (IS_ERR(p)) return p; s = pinctrl_lookup_state(p, name); if (IS_ERR(s)) { pinctrl_put(p); return ERR_CAST(s); } ret = pinctrl_select_state(p, s); if (ret < 0) { pinctrl_put(p); return ERR_PTR(ret); } return p; } static inline struct pinctrl * __must_check pinctrl_get_select_default( struct device *dev) { return pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT); } static inline struct pinctrl * __must_check devm_pinctrl_get_select( struct device *dev, const char *name) { struct pinctrl *p; struct pinctrl_state *s; int ret; p = devm_pinctrl_get(dev); if (IS_ERR(p)) return p; s = pinctrl_lookup_state(p, name); if (IS_ERR(s)) { devm_pinctrl_put(p); return ERR_CAST(s); } ret = pinctrl_select_state(p, s); if (ret < 0) { devm_pinctrl_put(p); return ERR_PTR(ret); } return p; } static inline struct pinctrl * __must_check devm_pinctrl_get_select_default( struct device *dev) { return devm_pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT); } #endif /* __LINUX_PINCTRL_CONSUMER_H */ PK ! ��� � pinctrl/devinfo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Per-device information from the pin control system. * This is the stuff that get included into the device * core. * * Copyright (C) 2012 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * This interface is used in the core to keep track of pins. * * Author: Linus Walleij <linus.walleij@linaro.org> */ #ifndef PINCTRL_DEVINFO_H #define PINCTRL_DEVINFO_H #ifdef CONFIG_PINCTRL /* The device core acts as a consumer toward pinctrl */ #include <linux/pinctrl/consumer.h> /** * struct dev_pin_info - pin state container for devices * @p: pinctrl handle for the containing device * @default_state: the default state for the handle, if found * @init_state: the state at probe time, if found * @sleep_state: the state at suspend time, if found * @idle_state: the state at idle (runtime suspend) time, if found */ struct dev_pin_info { struct pinctrl *p; struct pinctrl_state *default_state; struct pinctrl_state *init_state; #ifdef CONFIG_PM struct pinctrl_state *sleep_state; struct pinctrl_state *idle_state; #endif }; extern int pinctrl_bind_pins(struct device *dev); extern int pinctrl_init_done(struct device *dev); #else struct device; /* Stubs if we're not using pinctrl */ static inline int pinctrl_bind_pins(struct device *dev) { return 0; } static inline int pinctrl_init_done(struct device *dev) { return 0; } #endif /* CONFIG_PINCTRL */ #endif /* PINCTRL_DEVINFO_H */ PK ! �t\ sys_soc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2011 * Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson. */ #ifndef __SOC_BUS_H #define __SOC_BUS_H #include <linux/device.h> struct soc_device_attribute { const char *machine; const char *family; const char *revision; const char *serial_number; const char *soc_id; const void *data; const struct attribute_group *custom_attr_group; }; /** * soc_device_register - register SoC as a device * @soc_plat_dev_attr: Attributes passed from platform to be attributed to a SoC */ struct soc_device *soc_device_register( struct soc_device_attribute *soc_plat_dev_attr); /** * soc_device_unregister - unregister SoC device * @dev: SoC device to be unregistered */ void soc_device_unregister(struct soc_device *soc_dev); /** * soc_device_to_device - helper function to fetch struct device * @soc: Previously registered SoC device container */ struct device *soc_device_to_device(struct soc_device *soc); #ifdef CONFIG_SOC_BUS const struct soc_device_attribute *soc_device_match( const struct soc_device_attribute *matches); #else static inline const struct soc_device_attribute *soc_device_match( const struct soc_device_attribute *matches) { return NULL; } #endif #endif /* __SOC_BUS_H */ PK ! Z (�X X falloc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FALLOC_H_ #define _FALLOC_H_ #include <uapi/linux/falloc.h> /* * Space reservation ioctls and argument structure * are designed to be compatible with the legacy XFS ioctls. */ struct space_resv { __s16 l_type; __s16 l_whence; __s64 l_start; __s64 l_len; /* len == 0 means until end of file */ __s32 l_sysid; __u32 l_pid; __s32 l_pad[4]; /* reserved area */ }; #define FS_IOC_RESVSP _IOW('X', 40, struct space_resv) #define FS_IOC_UNRESVSP _IOW('X', 41, struct space_resv) #define FS_IOC_RESVSP64 _IOW('X', 42, struct space_resv) #define FS_IOC_UNRESVSP64 _IOW('X', 43, struct space_resv) #define FS_IOC_ZERO_RANGE _IOW('X', 57, struct space_resv) #define FALLOC_FL_SUPPORTED_MASK (FALLOC_FL_KEEP_SIZE | \ FALLOC_FL_PUNCH_HOLE | \ FALLOC_FL_COLLAPSE_RANGE | \ FALLOC_FL_ZERO_RANGE | \ FALLOC_FL_INSERT_RANGE | \ FALLOC_FL_UNSHARE_RANGE) /* on ia32 l_start is on a 32-bit boundary */ #if defined(CONFIG_X86_64) struct space_resv_32 { __s16 l_type; __s16 l_whence; __s64 l_start __attribute__((packed)); /* len == 0 means until end of file */ __s64 l_len __attribute__((packed)); __s32 l_sysid; __u32 l_pid; __s32 l_pad[4]; /* reserve area */ }; #define FS_IOC_RESVSP_32 _IOW ('X', 40, struct space_resv_32) #define FS_IOC_UNRESVSP_32 _IOW ('X', 41, struct space_resv_32) #define FS_IOC_RESVSP64_32 _IOW ('X', 42, struct space_resv_32) #define FS_IOC_UNRESVSP64_32 _IOW ('X', 43, struct space_resv_32) #define FS_IOC_ZERO_RANGE_32 _IOW ('X', 57, struct space_resv_32) #endif #endif /* _FALLOC_H_ */ PK ! �� � � pti.hnu �[��� // SPDX-License-Identifier: GPL-2.0 #ifndef _INCLUDE_PTI_H #define _INCLUDE_PTI_H #ifdef CONFIG_PAGE_TABLE_ISOLATION #include <asm/pti.h> #else static inline void pti_init(void) { } static inline void pti_finalize(void) { } #endif #endif PK ! �� � average.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_AVERAGE_H #define _LINUX_AVERAGE_H #include <linux/bug.h> #include <linux/compiler.h> #include <linux/log2.h> /* * Exponentially weighted moving average (EWMA) * * This implements a fixed-precision EWMA algorithm, with both the * precision and fall-off coefficient determined at compile-time * and built into the generated helper funtions. * * The first argument to the macro is the name that will be used * for the struct and helper functions. * * The second argument, the precision, expresses how many bits are * used for the fractional part of the fixed-precision values. * * The third argument, the weight reciprocal, determines how the * new values will be weighed vs. the old state, new values will * get weight 1/weight_rcp and old values 1-1/weight_rcp. Note * that this parameter must be a power of two for efficiency. */ #define DECLARE_EWMA(name, _precision, _weight_rcp) \ struct ewma_##name { \ unsigned long internal; \ }; \ static inline void ewma_##name##_init(struct ewma_##name *e) \ { \ BUILD_BUG_ON(!__builtin_constant_p(_precision)); \ BUILD_BUG_ON(!__builtin_constant_p(_weight_rcp)); \ /* \ * Even if you want to feed it just 0/1 you should have \ * some bits for the non-fractional part... \ */ \ BUILD_BUG_ON((_precision) > 30); \ BUILD_BUG_ON_NOT_POWER_OF_2(_weight_rcp); \ e->internal = 0; \ } \ static inline unsigned long \ ewma_##name##_read(struct ewma_##name *e) \ { \ BUILD_BUG_ON(!__builtin_constant_p(_precision)); \ BUILD_BUG_ON(!__builtin_constant_p(_weight_rcp)); \ BUILD_BUG_ON((_precision) > 30); \ BUILD_BUG_ON_NOT_POWER_OF_2(_weight_rcp); \ return e->internal >> (_precision); \ } \ static inline void ewma_##name##_add(struct ewma_##name *e, \ unsigned long val) \ { \ unsigned long internal = READ_ONCE(e->internal); \ unsigned long weight_rcp = ilog2(_weight_rcp); \ unsigned long precision = _precision; \ \ BUILD_BUG_ON(!__builtin_constant_p(_precision)); \ BUILD_BUG_ON(!__builtin_constant_p(_weight_rcp)); \ BUILD_BUG_ON((_precision) > 30); \ BUILD_BUG_ON_NOT_POWER_OF_2(_weight_rcp); \ \ WRITE_ONCE(e->internal, internal ? \ (((internal << weight_rcp) - internal) + \ (val << precision)) >> weight_rcp : \ (val << precision)); \ } #endif /* _LINUX_AVERAGE_H */ PK ! /q {U U stringify.hnu �[��� #ifndef __LINUX_STRINGIFY_H #define __LINUX_STRINGIFY_H /* Indirect stringification. Doing two levels allows the parameter to be a * macro itself. For example, compile with -DFOO=bar, __stringify(FOO) * converts to "bar". */ #define __stringify_1(x...) #x #define __stringify(x...) __stringify_1(x) #endif /* !__LINUX_STRINGIFY_H */ PK ! F�d'� � led-class-flash.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * LED Flash class interface * * Copyright (C) 2015 Samsung Electronics Co., Ltd. * Author: Jacek Anaszewski <j.anaszewski@samsung.com> */ #ifndef __LINUX_FLASH_LEDS_H_INCLUDED #define __LINUX_FLASH_LEDS_H_INCLUDED #include <linux/leds.h> struct device_node; struct led_classdev_flash; /* * Supported led fault bits - must be kept in synch * with V4L2_FLASH_FAULT bits. */ #define LED_FAULT_OVER_VOLTAGE (1 << 0) #define LED_FAULT_TIMEOUT (1 << 1) #define LED_FAULT_OVER_TEMPERATURE (1 << 2) #define LED_FAULT_SHORT_CIRCUIT (1 << 3) #define LED_FAULT_OVER_CURRENT (1 << 4) #define LED_FAULT_INDICATOR (1 << 5) #define LED_FAULT_UNDER_VOLTAGE (1 << 6) #define LED_FAULT_INPUT_VOLTAGE (1 << 7) #define LED_FAULT_LED_OVER_TEMPERATURE (1 << 8) #define LED_NUM_FLASH_FAULTS 9 #define LED_FLASH_SYSFS_GROUPS_SIZE 5 struct led_flash_ops { /* set flash brightness */ int (*flash_brightness_set)(struct led_classdev_flash *fled_cdev, u32 brightness); /* get flash brightness */ int (*flash_brightness_get)(struct led_classdev_flash *fled_cdev, u32 *brightness); /* set flash strobe state */ int (*strobe_set)(struct led_classdev_flash *fled_cdev, bool state); /* get flash strobe state */ int (*strobe_get)(struct led_classdev_flash *fled_cdev, bool *state); /* set flash timeout */ int (*timeout_set)(struct led_classdev_flash *fled_cdev, u32 timeout); /* get the flash LED fault */ int (*fault_get)(struct led_classdev_flash *fled_cdev, u32 *fault); }; /* * Current value of a flash setting along * with its constraints. */ struct led_flash_setting { /* maximum allowed value */ u32 min; /* maximum allowed value */ u32 max; /* step value */ u32 step; /* current value */ u32 val; }; struct led_classdev_flash { /* led class device */ struct led_classdev led_cdev; /* flash led specific ops */ const struct led_flash_ops *ops; /* flash brightness value in microamperes along with its constraints */ struct led_flash_setting brightness; /* flash timeout value in microseconds along with its constraints */ struct led_flash_setting timeout; /* LED Flash class sysfs groups */ const struct attribute_group *sysfs_groups[LED_FLASH_SYSFS_GROUPS_SIZE]; }; static inline struct led_classdev_flash *lcdev_to_flcdev( struct led_classdev *lcdev) { return container_of(lcdev, struct led_classdev_flash, led_cdev); } #if IS_ENABLED(CONFIG_LEDS_CLASS_FLASH) /** * led_classdev_flash_register_ext - register a new object of LED class with * init data and with support for flash LEDs * @parent: LED flash controller device this flash LED is driven by * @fled_cdev: the led_classdev_flash structure for this device * @init_data: the LED class flash device initialization data * * Returns: 0 on success or negative error value on failure */ int led_classdev_flash_register_ext(struct device *parent, struct led_classdev_flash *fled_cdev, struct led_init_data *init_data); /** * led_classdev_flash_unregister - unregisters an object of led_classdev class * with support for flash LEDs * @fled_cdev: the flash LED to unregister * * Unregister a previously registered via led_classdev_flash_register object */ void led_classdev_flash_unregister(struct led_classdev_flash *fled_cdev); int devm_led_classdev_flash_register_ext(struct device *parent, struct led_classdev_flash *fled_cdev, struct led_init_data *init_data); void devm_led_classdev_flash_unregister(struct device *parent, struct led_classdev_flash *fled_cdev); #else static inline int led_classdev_flash_register_ext(struct device *parent, struct led_classdev_flash *fled_cdev, struct led_init_data *init_data) { return 0; } static inline void led_classdev_flash_unregister(struct led_classdev_flash *fled_cdev) {}; static inline int devm_led_classdev_flash_register_ext(struct device *parent, struct led_classdev_flash *fled_cdev, struct led_init_data *init_data) { return 0; } static inline void devm_led_classdev_flash_unregister(struct device *parent, struct led_classdev_flash *fled_cdev) {}; #endif /* IS_ENABLED(CONFIG_LEDS_CLASS_FLASH) */ static inline int led_classdev_flash_register(struct device *parent, struct led_classdev_flash *fled_cdev) { return led_classdev_flash_register_ext(parent, fled_cdev, NULL); } static inline int devm_led_classdev_flash_register(struct device *parent, struct led_classdev_flash *fled_cdev) { return devm_led_classdev_flash_register_ext(parent, fled_cdev, NULL); } /** * led_set_flash_strobe - setup flash strobe * @fled_cdev: the flash LED to set strobe on * @state: 1 - strobe flash, 0 - stop flash strobe * * Strobe the flash LED. * * Returns: 0 on success or negative error value on failure */ static inline int led_set_flash_strobe(struct led_classdev_flash *fled_cdev, bool state) { if (!fled_cdev) return -EINVAL; return fled_cdev->ops->strobe_set(fled_cdev, state); } /** * led_get_flash_strobe - get flash strobe status * @fled_cdev: the flash LED to query * @state: 1 - flash is strobing, 0 - flash is off * * Check whether the flash is strobing at the moment. * * Returns: 0 on success or negative error value on failure */ static inline int led_get_flash_strobe(struct led_classdev_flash *fled_cdev, bool *state) { if (!fled_cdev) return -EINVAL; if (fled_cdev->ops->strobe_get) return fled_cdev->ops->strobe_get(fled_cdev, state); return -EINVAL; } /** * led_set_flash_brightness - set flash LED brightness * @fled_cdev: the flash LED to set * @brightness: the brightness to set it to * * Set a flash LED's brightness. * * Returns: 0 on success or negative error value on failure */ int led_set_flash_brightness(struct led_classdev_flash *fled_cdev, u32 brightness); /** * led_update_flash_brightness - update flash LED brightness * @fled_cdev: the flash LED to query * * Get a flash LED's current brightness and update led_flash->brightness * member with the obtained value. * * Returns: 0 on success or negative error value on failure */ int led_update_flash_brightness(struct led_classdev_flash *fled_cdev); /** * led_set_flash_timeout - set flash LED timeout * @fled_cdev: the flash LED to set * @timeout: the flash timeout to set it to * * Set the flash strobe duration. * * Returns: 0 on success or negative error value on failure */ int led_set_flash_timeout(struct led_classdev_flash *fled_cdev, u32 timeout); /** * led_get_flash_fault - get the flash LED fault * @fled_cdev: the flash LED to query * @fault: bitmask containing flash faults * * Get the flash LED fault. * * Returns: 0 on success or negative error value on failure */ int led_get_flash_fault(struct led_classdev_flash *fled_cdev, u32 *fault); #endif /* __LINUX_FLASH_LEDS_H_INCLUDED */ PK ! [��� � virtio_console.hnu �[��� /* * This header, excluding the #ifdef __KERNEL__ part, is BSD licensed so * anyone can use the definitions to implement compatible drivers/servers: * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of IBM nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * Copyright (C) Red Hat, Inc., 2009, 2010, 2011 * Copyright (C) Amit Shah <amit.shah@redhat.com>, 2009, 2010, 2011 */ #ifndef _LINUX_VIRTIO_CONSOLE_H #define _LINUX_VIRTIO_CONSOLE_H #include <uapi/linux/virtio_console.h> int __init virtio_cons_early_init(int (*put_chars)(u32, const char *, int)); #endif /* _LINUX_VIRTIO_CONSOLE_H */ PK ! 뗐�J J if_hsr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IF_HSR_H_ #define _LINUX_IF_HSR_H_ /* used to differentiate various protocols */ enum hsr_version { HSR_V0 = 0, HSR_V1, PRP_V1, }; #if IS_ENABLED(CONFIG_HSR) extern bool is_hsr_master(struct net_device *dev); extern int hsr_get_version(struct net_device *dev, enum hsr_version *ver); #else static inline bool is_hsr_master(struct net_device *dev) { return false; } static inline int hsr_get_version(struct net_device *dev, enum hsr_version *ver) { return -EINVAL; } #endif /* CONFIG_HSR */ #endif /*_LINUX_IF_HSR_H_*/ PK ! W�֠] ] spmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. */ #ifndef _LINUX_SPMI_H #define _LINUX_SPMI_H #include <linux/types.h> #include <linux/device.h> #include <linux/mod_devicetable.h> /* Maximum slave identifier */ #define SPMI_MAX_SLAVE_ID 16 /* SPMI Commands */ #define SPMI_CMD_EXT_WRITE 0x00 #define SPMI_CMD_RESET 0x10 #define SPMI_CMD_SLEEP 0x11 #define SPMI_CMD_SHUTDOWN 0x12 #define SPMI_CMD_WAKEUP 0x13 #define SPMI_CMD_AUTHENTICATE 0x14 #define SPMI_CMD_MSTR_READ 0x15 #define SPMI_CMD_MSTR_WRITE 0x16 #define SPMI_CMD_TRANSFER_BUS_OWNERSHIP 0x1A #define SPMI_CMD_DDB_MASTER_READ 0x1B #define SPMI_CMD_DDB_SLAVE_READ 0x1C #define SPMI_CMD_EXT_READ 0x20 #define SPMI_CMD_EXT_WRITEL 0x30 #define SPMI_CMD_EXT_READL 0x38 #define SPMI_CMD_WRITE 0x40 #define SPMI_CMD_READ 0x60 #define SPMI_CMD_ZERO_WRITE 0x80 /** * struct spmi_device - Basic representation of an SPMI device * @dev: Driver model representation of the device. * @ctrl: SPMI controller managing the bus hosting this device. * @usid: This devices' Unique Slave IDentifier. */ struct spmi_device { struct device dev; struct spmi_controller *ctrl; u8 usid; }; static inline struct spmi_device *to_spmi_device(struct device *d) { return container_of(d, struct spmi_device, dev); } static inline void *spmi_device_get_drvdata(const struct spmi_device *sdev) { return dev_get_drvdata(&sdev->dev); } static inline void spmi_device_set_drvdata(struct spmi_device *sdev, void *data) { dev_set_drvdata(&sdev->dev, data); } struct spmi_device *spmi_device_alloc(struct spmi_controller *ctrl); static inline void spmi_device_put(struct spmi_device *sdev) { if (sdev) put_device(&sdev->dev); } int spmi_device_add(struct spmi_device *sdev); void spmi_device_remove(struct spmi_device *sdev); /** * struct spmi_controller - interface to the SPMI master controller * @dev: Driver model representation of the device. * @nr: board-specific number identifier for this controller/bus * @cmd: sends a non-data command sequence on the SPMI bus. * @read_cmd: sends a register read command sequence on the SPMI bus. * @write_cmd: sends a register write command sequence on the SPMI bus. */ struct spmi_controller { struct device dev; unsigned int nr; int (*cmd)(struct spmi_controller *ctrl, u8 opcode, u8 sid); int (*read_cmd)(struct spmi_controller *ctrl, u8 opcode, u8 sid, u16 addr, u8 *buf, size_t len); int (*write_cmd)(struct spmi_controller *ctrl, u8 opcode, u8 sid, u16 addr, const u8 *buf, size_t len); }; static inline struct spmi_controller *to_spmi_controller(struct device *d) { return container_of(d, struct spmi_controller, dev); } static inline void *spmi_controller_get_drvdata(const struct spmi_controller *ctrl) { return dev_get_drvdata(&ctrl->dev); } static inline void spmi_controller_set_drvdata(struct spmi_controller *ctrl, void *data) { dev_set_drvdata(&ctrl->dev, data); } struct spmi_controller *spmi_controller_alloc(struct device *parent, size_t size); /** * spmi_controller_put() - decrement controller refcount * @ctrl SPMI controller. */ static inline void spmi_controller_put(struct spmi_controller *ctrl) { if (ctrl) put_device(&ctrl->dev); } int spmi_controller_add(struct spmi_controller *ctrl); void spmi_controller_remove(struct spmi_controller *ctrl); /** * struct spmi_driver - SPMI slave device driver * @driver: SPMI device drivers should initialize name and owner field of * this structure. * @probe: binds this driver to a SPMI device. * @remove: unbinds this driver from the SPMI device. * * If PM runtime support is desired for a slave, a device driver can call * pm_runtime_put() from their probe() routine (and a balancing * pm_runtime_get() in remove()). PM runtime support for a slave is * implemented by issuing a SLEEP command to the slave on runtime_suspend(), * transitioning the slave into the SLEEP state. On runtime_resume(), a WAKEUP * command is sent to the slave to bring it back to ACTIVE. */ struct spmi_driver { struct device_driver driver; int (*probe)(struct spmi_device *sdev); void (*remove)(struct spmi_device *sdev); void (*shutdown)(struct spmi_device *sdev); }; static inline struct spmi_driver *to_spmi_driver(struct device_driver *d) { return container_of(d, struct spmi_driver, driver); } #define spmi_driver_register(sdrv) \ __spmi_driver_register(sdrv, THIS_MODULE) int __spmi_driver_register(struct spmi_driver *sdrv, struct module *owner); /** * spmi_driver_unregister() - unregister an SPMI client driver * @sdrv: the driver to unregister */ static inline void spmi_driver_unregister(struct spmi_driver *sdrv) { if (sdrv) driver_unregister(&sdrv->driver); } #define module_spmi_driver(__spmi_driver) \ module_driver(__spmi_driver, spmi_driver_register, \ spmi_driver_unregister) int spmi_register_read(struct spmi_device *sdev, u8 addr, u8 *buf); int spmi_ext_register_read(struct spmi_device *sdev, u8 addr, u8 *buf, size_t len); int spmi_ext_register_readl(struct spmi_device *sdev, u16 addr, u8 *buf, size_t len); int spmi_register_write(struct spmi_device *sdev, u8 addr, u8 data); int spmi_register_zero_write(struct spmi_device *sdev, u8 data); int spmi_ext_register_write(struct spmi_device *sdev, u8 addr, const u8 *buf, size_t len); int spmi_ext_register_writel(struct spmi_device *sdev, u16 addr, const u8 *buf, size_t len); int spmi_command_reset(struct spmi_device *sdev); int spmi_command_sleep(struct spmi_device *sdev); int spmi_command_wakeup(struct spmi_device *sdev); int spmi_command_shutdown(struct spmi_device *sdev); #endif PK ! ��)�" �" io-pgtable.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IO_PGTABLE_H #define __IO_PGTABLE_H #include <linux/bitops.h> #include <linux/iommu.h> /* * Public API for use by IOMMU drivers */ enum io_pgtable_fmt { ARM_32_LPAE_S1, ARM_32_LPAE_S2, ARM_64_LPAE_S1, ARM_64_LPAE_S2, ARM_V7S, ARM_MALI_LPAE, AMD_IOMMU_V1, APPLE_DART, IO_PGTABLE_NUM_FMTS, }; /** * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management. * * @tlb_flush_all: Synchronously invalidate the entire TLB context. * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state * (sometimes referred to as the "walk cache") for a virtual * address range. * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a * single page. IOMMUs that cannot batch TLB invalidation * operations efficiently will typically issue them here, but * others may decide to update the iommu_iotlb_gather structure * and defer the invalidation until iommu_iotlb_sync() instead. * * Note that these can all be called in atomic context and must therefore * not block. */ struct iommu_flush_ops { void (*tlb_flush_all)(void *cookie); void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule, void *cookie); void (*tlb_add_page)(struct iommu_iotlb_gather *gather, unsigned long iova, size_t granule, void *cookie); }; /** * struct io_pgtable_cfg - Configuration data for a set of page tables. * * @quirks: A bitmap of hardware quirks that require some special * action by the low-level page table allocator. * @pgsize_bitmap: A bitmap of page sizes supported by this set of page * tables. * @ias: Input address (iova) size, in bits. * @oas: Output address (paddr) size, in bits. * @coherent_walk A flag to indicate whether or not page table walks made * by the IOMMU are coherent with the CPU caches. * @tlb: TLB management callbacks for this set of tables. * @iommu_dev: The device representing the DMA configuration for the * page table walker. */ struct io_pgtable_cfg { /* * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in * stage 1 PTEs, for hardware which insists on validating them * even in non-secure state where they should normally be ignored. * * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and * IOMMU_NOEXEC flags and map everything with full access, for * hardware which does not implement the permissions of a given * format, and/or requires some format-specific default value. * * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend * to support up to 35 bits PA where the bit32, bit33 and bit34 are * encoded in the bit9, bit4 and bit5 of the PTE respectively. * * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek IOMMUs * extend the translation table base support up to 35 bits PA, the * encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT. * * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table * for use in the upper half of a split address space. * * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability * attributes set in the TCR for a non-coherent page-table walker. */ #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) #define IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT BIT(4) #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) #define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6) unsigned long quirks; unsigned long pgsize_bitmap; unsigned int ias; unsigned int oas; bool coherent_walk; const struct iommu_flush_ops *tlb; struct device *iommu_dev; /* Low-level data specific to the table format */ union { struct { u64 ttbr; struct { u32 ips:3; u32 tg:2; u32 sh:2; u32 orgn:2; u32 irgn:2; u32 tsz:6; } tcr; u64 mair; } arm_lpae_s1_cfg; struct { u64 vttbr; struct { u32 ps:3; u32 tg:2; u32 sh:2; u32 orgn:2; u32 irgn:2; u32 sl:2; u32 tsz:6; } vtcr; } arm_lpae_s2_cfg; struct { u32 ttbr; u32 tcr; u32 nmrr; u32 prrr; } arm_v7s_cfg; struct { u64 transtab; u64 memattr; } arm_mali_lpae_cfg; struct { u64 ttbr[4]; u32 n_ttbrs; } apple_dart_cfg; }; }; /** * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. * * @map: Map a physically contiguous memory region. * @map_pages: Map a physically contiguous range of pages of the same size. * @unmap: Unmap a physically contiguous memory region. * @unmap_pages: Unmap a range of virtually contiguous pages of the same size. * @iova_to_phys: Translate iova to physical address. * * These functions map directly onto the iommu_ops member functions with * the same names. */ struct io_pgtable_ops { int (*map)(struct io_pgtable_ops *ops, unsigned long iova, phys_addr_t paddr, size_t size, int prot, gfp_t gfp); int (*map_pages)(struct io_pgtable_ops *ops, unsigned long iova, phys_addr_t paddr, size_t pgsize, size_t pgcount, int prot, gfp_t gfp, size_t *mapped); size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova, size_t size, struct iommu_iotlb_gather *gather); size_t (*unmap_pages)(struct io_pgtable_ops *ops, unsigned long iova, size_t pgsize, size_t pgcount, struct iommu_iotlb_gather *gather); phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, unsigned long iova); }; /** * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU. * * @fmt: The page table format. * @cfg: The page table configuration. This will be modified to represent * the configuration actually provided by the allocator (e.g. the * pgsize_bitmap may be restricted). * @cookie: An opaque token provided by the IOMMU driver and passed back to * the callback routines in cfg->tlb. */ struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, struct io_pgtable_cfg *cfg, void *cookie); /** * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller * *must* ensure that the page table is no longer * live, but the TLB can be dirty. * * @ops: The ops returned from alloc_io_pgtable_ops. */ void free_io_pgtable_ops(struct io_pgtable_ops *ops); /* * Internal structures for page table allocator implementations. */ /** * struct io_pgtable - Internal structure describing a set of page tables. * * @fmt: The page table format. * @cookie: An opaque token provided by the IOMMU driver and passed back to * any callback routines. * @cfg: A copy of the page table configuration. * @ops: The page table operations in use for this set of page tables. */ struct io_pgtable { enum io_pgtable_fmt fmt; void *cookie; struct io_pgtable_cfg cfg; struct io_pgtable_ops ops; }; #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop) { if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all) iop->cfg.tlb->tlb_flush_all(iop->cookie); } static inline void io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova, size_t size, size_t granule) { if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk) iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie); } static inline void io_pgtable_tlb_add_page(struct io_pgtable *iop, struct iommu_iotlb_gather * gather, unsigned long iova, size_t granule) { if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page) iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie); } /** * struct io_pgtable_init_fns - Alloc/free a set of page tables for a * particular format. * * @alloc: Allocate a set of page tables described by cfg. * @free: Free the page tables associated with iop. */ struct io_pgtable_init_fns { struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie); void (*free)(struct io_pgtable *iop); }; extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns; extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns; extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns; extern struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns; #endif /* __IO_PGTABLE_H */ PK ! �_ͼ � hsi/ssi_protocol.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ssip_slave.h * * SSIP slave support header file * * Copyright (C) 2010 Nokia Corporation. All rights reserved. * * Contact: Carlos Chinea <carlos.chinea@nokia.com> */ #ifndef __LINUX_SSIP_SLAVE_H__ #define __LINUX_SSIP_SLAVE_H__ #include <linux/hsi/hsi.h> static inline void ssip_slave_put_master(struct hsi_client *master) { } struct hsi_client *ssip_slave_get_master(struct hsi_client *slave); int ssip_slave_start_tx(struct hsi_client *master); int ssip_slave_stop_tx(struct hsi_client *master); void ssip_reset_event(struct hsi_client *master); int ssip_slave_running(struct hsi_client *master); #endif /* __LINUX_SSIP_SLAVE_H__ */ PK ! i�2�- �- hsi/hsi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * HSI core header file. * * Copyright (C) 2010 Nokia Corporation. All rights reserved. * * Contact: Carlos Chinea <carlos.chinea@nokia.com> */ #ifndef __LINUX_HSI_H__ #define __LINUX_HSI_H__ #include <linux/device.h> #include <linux/mutex.h> #include <linux/scatterlist.h> #include <linux/list.h> #include <linux/module.h> #include <linux/notifier.h> /* HSI message ttype */ #define HSI_MSG_READ 0 #define HSI_MSG_WRITE 1 /* HSI configuration values */ enum { HSI_MODE_STREAM = 1, HSI_MODE_FRAME, }; enum { HSI_FLOW_SYNC, /* Synchronized flow */ HSI_FLOW_PIPE, /* Pipelined flow */ }; enum { HSI_ARB_RR, /* Round-robin arbitration */ HSI_ARB_PRIO, /* Channel priority arbitration */ }; #define HSI_MAX_CHANNELS 16 /* HSI message status codes */ enum { HSI_STATUS_COMPLETED, /* Message transfer is completed */ HSI_STATUS_PENDING, /* Message pending to be read/write (POLL) */ HSI_STATUS_PROCEEDING, /* Message transfer is ongoing */ HSI_STATUS_QUEUED, /* Message waiting to be served */ HSI_STATUS_ERROR, /* Error when message transfer was ongoing */ }; /* HSI port event codes */ enum { HSI_EVENT_START_RX, HSI_EVENT_STOP_RX, }; /** * struct hsi_channel - channel resource used by the hsi clients * @id: Channel number * @name: Channel name */ struct hsi_channel { unsigned int id; const char *name; }; /** * struct hsi_config - Configuration for RX/TX HSI modules * @mode: Bit transmission mode (STREAM or FRAME) * @channels: Channel resources used by the client * @num_channels: Number of channel resources * @num_hw_channels: Number of channels the transceiver is configured for [1..16] * @speed: Max bit transmission speed (Kbit/s) * @flow: RX flow type (SYNCHRONIZED or PIPELINE) * @arb_mode: Arbitration mode for TX frame (Round robin, priority) */ struct hsi_config { unsigned int mode; struct hsi_channel *channels; unsigned int num_channels; unsigned int num_hw_channels; unsigned int speed; union { unsigned int flow; /* RX only */ unsigned int arb_mode; /* TX only */ }; }; /** * struct hsi_board_info - HSI client board info * @name: Name for the HSI device * @hsi_id: HSI controller id where the client sits * @port: Port number in the controller where the client sits * @tx_cfg: HSI TX configuration * @rx_cfg: HSI RX configuration * @platform_data: Platform related data * @archdata: Architecture-dependent device data */ struct hsi_board_info { const char *name; unsigned int hsi_id; unsigned int port; struct hsi_config tx_cfg; struct hsi_config rx_cfg; void *platform_data; struct dev_archdata *archdata; }; #ifdef CONFIG_HSI_BOARDINFO extern int hsi_register_board_info(struct hsi_board_info const *info, unsigned int len); #else static inline int hsi_register_board_info(struct hsi_board_info const *info, unsigned int len) { return 0; } #endif /* CONFIG_HSI_BOARDINFO */ /** * struct hsi_client - HSI client attached to an HSI port * @device: Driver model representation of the device * @tx_cfg: HSI TX configuration * @rx_cfg: HSI RX configuration */ struct hsi_client { struct device device; struct hsi_config tx_cfg; struct hsi_config rx_cfg; /* private: */ void (*ehandler)(struct hsi_client *, unsigned long); unsigned int pclaimed:1; struct notifier_block nb; }; #define to_hsi_client(dev) container_of(dev, struct hsi_client, device) static inline void hsi_client_set_drvdata(struct hsi_client *cl, void *data) { dev_set_drvdata(&cl->device, data); } static inline void *hsi_client_drvdata(struct hsi_client *cl) { return dev_get_drvdata(&cl->device); } int hsi_register_port_event(struct hsi_client *cl, void (*handler)(struct hsi_client *, unsigned long)); int hsi_unregister_port_event(struct hsi_client *cl); /** * struct hsi_client_driver - Driver associated to an HSI client * @driver: Driver model representation of the driver */ struct hsi_client_driver { struct device_driver driver; }; #define to_hsi_client_driver(drv) container_of(drv, struct hsi_client_driver,\ driver) int hsi_register_client_driver(struct hsi_client_driver *drv); static inline void hsi_unregister_client_driver(struct hsi_client_driver *drv) { driver_unregister(&drv->driver); } /** * struct hsi_msg - HSI message descriptor * @link: Free to use by the current descriptor owner * @cl: HSI device client that issues the transfer * @sgt: Head of the scatterlist array * @context: Client context data associated to the transfer * @complete: Transfer completion callback * @destructor: Destructor to free resources when flushing * @status: Status of the transfer when completed * @actual_len: Actual length of data transferred on completion * @channel: Channel were to TX/RX the message * @ttype: Transfer type (TX if set, RX otherwise) * @break_frame: if true HSI will send/receive a break frame. Data buffers are * ignored in the request. */ struct hsi_msg { struct list_head link; struct hsi_client *cl; struct sg_table sgt; void *context; void (*complete)(struct hsi_msg *msg); void (*destructor)(struct hsi_msg *msg); int status; unsigned int actual_len; unsigned int channel; unsigned int ttype:1; unsigned int break_frame:1; }; struct hsi_msg *hsi_alloc_msg(unsigned int n_frag, gfp_t flags); void hsi_free_msg(struct hsi_msg *msg); /** * struct hsi_port - HSI port device * @device: Driver model representation of the device * @tx_cfg: Current TX path configuration * @rx_cfg: Current RX path configuration * @num: Port number * @shared: Set when port can be shared by different clients * @claimed: Reference count of clients which claimed the port * @lock: Serialize port claim * @async: Asynchronous transfer callback * @setup: Callback to set the HSI client configuration * @flush: Callback to clean the HW state and destroy all pending transfers * @start_tx: Callback to inform that a client wants to TX data * @stop_tx: Callback to inform that a client no longer wishes to TX data * @release: Callback to inform that a client no longer uses the port * @n_head: Notifier chain for signaling port events to the clients. */ struct hsi_port { struct device device; struct hsi_config tx_cfg; struct hsi_config rx_cfg; unsigned int num; unsigned int shared:1; int claimed; struct mutex lock; int (*async)(struct hsi_msg *msg); int (*setup)(struct hsi_client *cl); int (*flush)(struct hsi_client *cl); int (*start_tx)(struct hsi_client *cl); int (*stop_tx)(struct hsi_client *cl); int (*release)(struct hsi_client *cl); /* private */ struct blocking_notifier_head n_head; }; #define to_hsi_port(dev) container_of(dev, struct hsi_port, device) #define hsi_get_port(cl) to_hsi_port((cl)->device.parent) int hsi_event(struct hsi_port *port, unsigned long event); int hsi_claim_port(struct hsi_client *cl, unsigned int share); void hsi_release_port(struct hsi_client *cl); static inline int hsi_port_claimed(struct hsi_client *cl) { return cl->pclaimed; } static inline void hsi_port_set_drvdata(struct hsi_port *port, void *data) { dev_set_drvdata(&port->device, data); } static inline void *hsi_port_drvdata(struct hsi_port *port) { return dev_get_drvdata(&port->device); } /** * struct hsi_controller - HSI controller device * @device: Driver model representation of the device * @owner: Pointer to the module owning the controller * @id: HSI controller ID * @num_ports: Number of ports in the HSI controller * @port: Array of HSI ports */ struct hsi_controller { struct device device; struct module *owner; unsigned int id; unsigned int num_ports; struct hsi_port **port; }; #define to_hsi_controller(dev) container_of(dev, struct hsi_controller, device) struct hsi_controller *hsi_alloc_controller(unsigned int n_ports, gfp_t flags); void hsi_put_controller(struct hsi_controller *hsi); int hsi_register_controller(struct hsi_controller *hsi); void hsi_unregister_controller(struct hsi_controller *hsi); struct hsi_client *hsi_new_client(struct hsi_port *port, struct hsi_board_info *info); int hsi_remove_client(struct device *dev, void *data); void hsi_port_unregister_clients(struct hsi_port *port); #ifdef CONFIG_OF void hsi_add_clients_from_dt(struct hsi_port *port, struct device_node *clients); #else static inline void hsi_add_clients_from_dt(struct hsi_port *port, struct device_node *clients) { return; } #endif static inline void hsi_controller_set_drvdata(struct hsi_controller *hsi, void *data) { dev_set_drvdata(&hsi->device, data); } static inline void *hsi_controller_drvdata(struct hsi_controller *hsi) { return dev_get_drvdata(&hsi->device); } static inline struct hsi_port *hsi_find_port_num(struct hsi_controller *hsi, unsigned int num) { return (num < hsi->num_ports) ? hsi->port[num] : NULL; } /* * API for HSI clients */ int hsi_async(struct hsi_client *cl, struct hsi_msg *msg); int hsi_get_channel_id_by_name(struct hsi_client *cl, char *name); /** * hsi_id - Get HSI controller ID associated to a client * @cl: Pointer to a HSI client * * Return the controller id where the client is attached to */ static inline unsigned int hsi_id(struct hsi_client *cl) { return to_hsi_controller(cl->device.parent->parent)->id; } /** * hsi_port_id - Gets the port number a client is attached to * @cl: Pointer to HSI client * * Return the port number associated to the client */ static inline unsigned int hsi_port_id(struct hsi_client *cl) { return to_hsi_port(cl->device.parent)->num; } /** * hsi_setup - Configure the client's port * @cl: Pointer to the HSI client * * When sharing ports, clients should either relay on a single * client setup or have the same setup for all of them. * * Return -errno on failure, 0 on success */ static inline int hsi_setup(struct hsi_client *cl) { if (!hsi_port_claimed(cl)) return -EACCES; return hsi_get_port(cl)->setup(cl); } /** * hsi_flush - Flush all pending transactions on the client's port * @cl: Pointer to the HSI client * * This function will destroy all pending hsi_msg in the port and reset * the HW port so it is ready to receive and transmit from a clean state. * * Return -errno on failure, 0 on success */ static inline int hsi_flush(struct hsi_client *cl) { if (!hsi_port_claimed(cl)) return -EACCES; return hsi_get_port(cl)->flush(cl); } /** * hsi_async_read - Submit a read transfer * @cl: Pointer to the HSI client * @msg: HSI message descriptor of the transfer * * Return -errno on failure, 0 on success */ static inline int hsi_async_read(struct hsi_client *cl, struct hsi_msg *msg) { msg->ttype = HSI_MSG_READ; return hsi_async(cl, msg); } /** * hsi_async_write - Submit a write transfer * @cl: Pointer to the HSI client * @msg: HSI message descriptor of the transfer * * Return -errno on failure, 0 on success */ static inline int hsi_async_write(struct hsi_client *cl, struct hsi_msg *msg) { msg->ttype = HSI_MSG_WRITE; return hsi_async(cl, msg); } /** * hsi_start_tx - Signal the port that the client wants to start a TX * @cl: Pointer to the HSI client * * Return -errno on failure, 0 on success */ static inline int hsi_start_tx(struct hsi_client *cl) { if (!hsi_port_claimed(cl)) return -EACCES; return hsi_get_port(cl)->start_tx(cl); } /** * hsi_stop_tx - Signal the port that the client no longer wants to transmit * @cl: Pointer to the HSI client * * Return -errno on failure, 0 on success */ static inline int hsi_stop_tx(struct hsi_client *cl) { if (!hsi_port_claimed(cl)) return -EACCES; return hsi_get_port(cl)->stop_tx(cl); } #endif /* __LINUX_HSI_H__ */ PK ! i[�5m m cpu_cooling.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/cpu_cooling.h * * Copyright (C) 2012 Samsung Electronics Co., Ltd(http://www.samsung.com) * Copyright (C) 2012 Amit Daniel <amit.kachhap@linaro.org> * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ #ifndef __CPU_COOLING_H__ #define __CPU_COOLING_H__ #include <linux/of.h> #include <linux/thermal.h> #include <linux/cpumask.h> struct cpufreq_policy; #ifdef CONFIG_CPU_FREQ_THERMAL /** * cpufreq_cooling_register - function to create cpufreq cooling device. * @policy: cpufreq policy. */ struct thermal_cooling_device * cpufreq_cooling_register(struct cpufreq_policy *policy); /** * cpufreq_cooling_unregister - function to remove cpufreq cooling device. * @cdev: thermal cooling device pointer. */ void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev); /** * of_cpufreq_cooling_register - create cpufreq cooling device based on DT. * @policy: cpufreq policy. */ struct thermal_cooling_device * of_cpufreq_cooling_register(struct cpufreq_policy *policy); #else /* !CONFIG_CPU_FREQ_THERMAL */ static inline struct thermal_cooling_device * cpufreq_cooling_register(struct cpufreq_policy *policy) { return ERR_PTR(-ENOSYS); } static inline void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev) { return; } static inline struct thermal_cooling_device * of_cpufreq_cooling_register(struct cpufreq_policy *policy) { return NULL; } #endif /* CONFIG_CPU_FREQ_THERMAL */ struct cpuidle_driver; #ifdef CONFIG_CPU_IDLE_THERMAL void cpuidle_cooling_register(struct cpuidle_driver *drv); #else /* CONFIG_CPU_IDLE_THERMAL */ static inline void cpuidle_cooling_register(struct cpuidle_driver *drv) { } #endif /* CONFIG_CPU_IDLE_THERMAL */ #endif /* __CPU_COOLING_H__ */ PK ! �V0� � i8042.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LINUX_I8042_H #define _LINUX_I8042_H #include <linux/types.h> /* * Standard commands. */ #define I8042_CMD_CTL_RCTR 0x0120 #define I8042_CMD_CTL_WCTR 0x1060 #define I8042_CMD_CTL_TEST 0x01aa #define I8042_CMD_KBD_DISABLE 0x00ad #define I8042_CMD_KBD_ENABLE 0x00ae #define I8042_CMD_KBD_TEST 0x01ab #define I8042_CMD_KBD_LOOP 0x11d2 #define I8042_CMD_AUX_DISABLE 0x00a7 #define I8042_CMD_AUX_ENABLE 0x00a8 #define I8042_CMD_AUX_TEST 0x01a9 #define I8042_CMD_AUX_SEND 0x10d4 #define I8042_CMD_AUX_LOOP 0x11d3 #define I8042_CMD_MUX_PFX 0x0090 #define I8042_CMD_MUX_SEND 0x1090 /* * Status register bits. */ #define I8042_STR_PARITY 0x80 #define I8042_STR_TIMEOUT 0x40 #define I8042_STR_AUXDATA 0x20 #define I8042_STR_KEYLOCK 0x10 #define I8042_STR_CMDDAT 0x08 #define I8042_STR_MUXERR 0x04 #define I8042_STR_IBF 0x02 #define I8042_STR_OBF 0x01 /* * Control register bits. */ #define I8042_CTR_KBDINT 0x01 #define I8042_CTR_AUXINT 0x02 #define I8042_CTR_IGNKEYLOCK 0x08 #define I8042_CTR_KBDDIS 0x10 #define I8042_CTR_AUXDIS 0x20 #define I8042_CTR_XLATE 0x40 struct serio; #if defined(CONFIG_SERIO_I8042) || defined(CONFIG_SERIO_I8042_MODULE) void i8042_lock_chip(void); void i8042_unlock_chip(void); int i8042_command(unsigned char *param, int command); int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, struct serio *serio)); int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, struct serio *serio)); #else static inline void i8042_lock_chip(void) { } static inline void i8042_unlock_chip(void) { } static inline int i8042_command(unsigned char *param, int command) { return -ENODEV; } static inline int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, struct serio *serio)) { return -ENODEV; } static inline int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, struct serio *serio)) { return -ENODEV; } #endif #endif PK ! �z� � torture.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Common functions for in-kernel torture tests. * * Copyright IBM Corporation, 2014 * * Author: Paul E. McKenney <paulmck@linux.ibm.com> */ #ifndef __LINUX_TORTURE_H #define __LINUX_TORTURE_H #include <linux/types.h> #include <linux/cache.h> #include <linux/spinlock.h> #include <linux/threads.h> #include <linux/cpumask.h> #include <linux/seqlock.h> #include <linux/lockdep.h> #include <linux/completion.h> #include <linux/debugobjects.h> #include <linux/bug.h> #include <linux/compiler.h> /* Definitions for a non-string torture-test module parameter. */ #define torture_param(type, name, init, msg) \ static type name = init; \ module_param(name, type, 0444); \ MODULE_PARM_DESC(name, msg); #define TORTURE_FLAG "-torture:" #define TOROUT_STRING(s) \ pr_alert("%s" TORTURE_FLAG " %s\n", torture_type, s) #define VERBOSE_TOROUT_STRING(s) \ do { \ if (verbose) { \ verbose_torout_sleep(); \ pr_alert("%s" TORTURE_FLAG " %s\n", torture_type, s); \ } \ } while (0) #define VERBOSE_TOROUT_ERRSTRING(s) \ do { \ if (verbose) { \ verbose_torout_sleep(); \ pr_alert("%s" TORTURE_FLAG "!!! %s\n", torture_type, s); \ } \ } while (0) void verbose_torout_sleep(void); #define torture_init_error(firsterr) \ ({ \ int ___firsterr = (firsterr); \ \ WARN_ONCE(!IS_MODULE(CONFIG_RCU_TORTURE_TEST) && ___firsterr < 0, "Torture-test initialization failed with error code %d\n", ___firsterr); \ ___firsterr < 0; \ }) /* Definitions for online/offline exerciser. */ #ifdef CONFIG_HOTPLUG_CPU int torture_num_online_cpus(void); #else /* #ifdef CONFIG_HOTPLUG_CPU */ static inline int torture_num_online_cpus(void) { return 1; } #endif /* #else #ifdef CONFIG_HOTPLUG_CPU */ typedef void torture_ofl_func(void); bool torture_offline(int cpu, long *n_onl_attempts, long *n_onl_successes, unsigned long *sum_offl, int *min_onl, int *max_onl); bool torture_online(int cpu, long *n_onl_attempts, long *n_onl_successes, unsigned long *sum_onl, int *min_onl, int *max_onl); int torture_onoff_init(long ooholdoff, long oointerval, torture_ofl_func *f); void torture_onoff_stats(void); bool torture_onoff_failures(void); /* Low-rider random number generator. */ struct torture_random_state { unsigned long trs_state; long trs_count; }; #define DEFINE_TORTURE_RANDOM(name) struct torture_random_state name = { 0, 0 } #define DEFINE_TORTURE_RANDOM_PERCPU(name) \ DEFINE_PER_CPU(struct torture_random_state, name) unsigned long torture_random(struct torture_random_state *trsp); static inline void torture_random_init(struct torture_random_state *trsp) { trsp->trs_state = 0; trsp->trs_count = 0; } /* Definitions for high-resolution-timer sleeps. */ int torture_hrtimeout_ns(ktime_t baset_ns, u32 fuzzt_ns, struct torture_random_state *trsp); int torture_hrtimeout_us(u32 baset_us, u32 fuzzt_ns, struct torture_random_state *trsp); int torture_hrtimeout_ms(u32 baset_ms, u32 fuzzt_us, struct torture_random_state *trsp); int torture_hrtimeout_jiffies(u32 baset_j, struct torture_random_state *trsp); int torture_hrtimeout_s(u32 baset_s, u32 fuzzt_ms, struct torture_random_state *trsp); /* Task shuffler, which causes CPUs to occasionally go idle. */ void torture_shuffle_task_register(struct task_struct *tp); int torture_shuffle_init(long shuffint); /* Test auto-shutdown handling. */ void torture_shutdown_absorb(const char *title); int torture_shutdown_init(int ssecs, void (*cleanup)(void)); /* Task stuttering, which forces load/no-load transitions. */ bool stutter_wait(const char *title); int torture_stutter_init(int s, int sgap); /* Initialization and cleanup. */ bool torture_init_begin(char *ttype, int v); void torture_init_end(void); bool torture_cleanup_begin(void); void torture_cleanup_end(void); bool torture_must_stop(void); bool torture_must_stop_irq(void); void torture_kthread_stopping(char *title); int _torture_create_kthread(int (*fn)(void *arg), void *arg, char *s, char *m, char *f, struct task_struct **tp); void _torture_stop_kthread(char *m, struct task_struct **tp); #define torture_create_kthread(n, arg, tp) \ _torture_create_kthread(n, (arg), #n, "Creating " #n " task", \ "Failed to create " #n, &(tp)) #define torture_stop_kthread(n, tp) \ _torture_stop_kthread("Stopping " #n " task", &(tp)) #ifdef CONFIG_PREEMPTION #define torture_preempt_schedule() preempt_schedule() #else #define torture_preempt_schedule() do { } while (0) #endif #endif /* __LINUX_TORTURE_H */ PK ! :�'$ $ seq_file.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SEQ_FILE_H #define _LINUX_SEQ_FILE_H #include <linux/types.h> #include <linux/string.h> #include <linux/bug.h> #include <linux/mutex.h> #include <linux/cpumask.h> #include <linux/nodemask.h> #include <linux/fs.h> #include <linux/cred.h> struct seq_operations; struct seq_file { char *buf; size_t size; size_t from; size_t count; size_t pad_until; loff_t index; loff_t read_pos; struct mutex lock; const struct seq_operations *op; int poll_event; const struct file *file; void *private; }; struct seq_operations { void * (*start) (struct seq_file *m, loff_t *pos); void (*stop) (struct seq_file *m, void *v); void * (*next) (struct seq_file *m, void *v, loff_t *pos); int (*show) (struct seq_file *m, void *v); }; #define SEQ_SKIP 1 /** * seq_has_overflowed - check if the buffer has overflowed * @m: the seq_file handle * * seq_files have a buffer which may overflow. When this happens a larger * buffer is reallocated and all the data will be printed again. * The overflow state is true when m->count == m->size. * * Returns true if the buffer received more than it can hold. */ static inline bool seq_has_overflowed(struct seq_file *m) { return m->count == m->size; } /** * seq_get_buf - get buffer to write arbitrary data to * @m: the seq_file handle * @bufp: the beginning of the buffer is stored here * * Return the number of bytes available in the buffer, or zero if * there's no space. */ static inline size_t seq_get_buf(struct seq_file *m, char **bufp) { BUG_ON(m->count > m->size); if (m->count < m->size) *bufp = m->buf + m->count; else *bufp = NULL; return m->size - m->count; } /** * seq_commit - commit data to the buffer * @m: the seq_file handle * @num: the number of bytes to commit * * Commit @num bytes of data written to a buffer previously acquired * by seq_buf_get. To signal an error condition, or that the data * didn't fit in the available space, pass a negative @num value. */ static inline void seq_commit(struct seq_file *m, int num) { if (num < 0) { m->count = m->size; } else { BUG_ON(m->count + num > m->size); m->count += num; } } /** * seq_setwidth - set padding width * @m: the seq_file handle * @size: the max number of bytes to pad. * * Call seq_setwidth() for setting max width, then call seq_printf() etc. and * finally call seq_pad() to pad the remaining bytes. */ static inline void seq_setwidth(struct seq_file *m, size_t size) { m->pad_until = m->count + size; } void seq_pad(struct seq_file *m, char c); char *mangle_path(char *s, const char *p, const char *esc); int seq_open(struct file *, const struct seq_operations *); ssize_t seq_read(struct file *, char __user *, size_t, loff_t *); ssize_t seq_read_iter(struct kiocb *iocb, struct iov_iter *iter); loff_t seq_lseek(struct file *, loff_t, int); int seq_release(struct inode *, struct file *); int seq_write(struct seq_file *seq, const void *data, size_t len); __printf(2, 0) void seq_vprintf(struct seq_file *m, const char *fmt, va_list args); __printf(2, 3) void seq_printf(struct seq_file *m, const char *fmt, ...); void seq_putc(struct seq_file *m, char c); void seq_puts(struct seq_file *m, const char *s); void seq_put_decimal_ull_width(struct seq_file *m, const char *delimiter, unsigned long long num, unsigned int width); void seq_put_decimal_ull(struct seq_file *m, const char *delimiter, unsigned long long num); void seq_put_decimal_ll(struct seq_file *m, const char *delimiter, long long num); void seq_put_hex_ll(struct seq_file *m, const char *delimiter, unsigned long long v, unsigned int width); void seq_escape_mem(struct seq_file *m, const char *src, size_t len, unsigned int flags, const char *esc); static inline void seq_escape_str(struct seq_file *m, const char *src, unsigned int flags, const char *esc) { seq_escape_mem(m, src, strlen(src), flags, esc); } void seq_escape(struct seq_file *m, const char *s, const char *esc); void seq_hex_dump(struct seq_file *m, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii); int seq_path(struct seq_file *, const struct path *, const char *); int seq_file_path(struct seq_file *, struct file *, const char *); int seq_dentry(struct seq_file *, struct dentry *, const char *); int seq_path_root(struct seq_file *m, const struct path *path, const struct path *root, const char *esc); int single_open(struct file *, int (*)(struct seq_file *, void *), void *); int single_open_size(struct file *, int (*)(struct seq_file *, void *), void *, size_t); int single_release(struct inode *, struct file *); void *__seq_open_private(struct file *, const struct seq_operations *, int); int seq_open_private(struct file *, const struct seq_operations *, int); int seq_release_private(struct inode *, struct file *); #ifdef CONFIG_BINARY_PRINTF void seq_bprintf(struct seq_file *m, const char *f, const u32 *binary); #endif #define DEFINE_SEQ_ATTRIBUTE(__name) \ static int __name ## _open(struct inode *inode, struct file *file) \ { \ int ret = seq_open(file, &__name ## _sops); \ if (!ret && inode->i_private) { \ struct seq_file *seq_f = file->private_data; \ seq_f->private = inode->i_private; \ } \ return ret; \ } \ \ static const struct file_operations __name ## _fops = { \ .owner = THIS_MODULE, \ .open = __name ## _open, \ .read = seq_read, \ .llseek = seq_lseek, \ .release = seq_release, \ } #define DEFINE_SHOW_ATTRIBUTE(__name) \ static int __name ## _open(struct inode *inode, struct file *file) \ { \ return single_open(file, __name ## _show, inode->i_private); \ } \ \ static const struct file_operations __name ## _fops = { \ .owner = THIS_MODULE, \ .open = __name ## _open, \ .read = seq_read, \ .llseek = seq_lseek, \ .release = single_release, \ } #define DEFINE_PROC_SHOW_ATTRIBUTE(__name) \ static int __name ## _open(struct inode *inode, struct file *file) \ { \ return single_open(file, __name ## _show, PDE_DATA(inode)); \ } \ \ static const struct proc_ops __name ## _proc_ops = { \ .proc_open = __name ## _open, \ .proc_read = seq_read, \ .proc_lseek = seq_lseek, \ .proc_release = single_release, \ } static inline struct user_namespace *seq_user_ns(struct seq_file *seq) { #ifdef CONFIG_USER_NS return seq->file->f_cred->user_ns; #else extern struct user_namespace init_user_ns; return &init_user_ns; #endif } /** * seq_show_options - display mount options with appropriate escapes. * @m: the seq_file handle * @name: the mount option name * @value: the mount option name's value, can be NULL */ static inline void seq_show_option(struct seq_file *m, const char *name, const char *value) { seq_putc(m, ','); seq_escape(m, name, ",= \t\n\\"); if (value) { seq_putc(m, '='); seq_escape(m, value, ", \t\n\\"); } } /** * seq_show_option_n - display mount options with appropriate escapes * where @value must be a specific length. * @m: the seq_file handle * @name: the mount option name * @value: the mount option name's value, cannot be NULL * @length: the length of @value to display * * This is a macro since this uses "length" to define the size of the * stack buffer. */ #define seq_show_option_n(m, name, value, length) { \ char val_buf[length + 1]; \ strncpy(val_buf, value, length); \ val_buf[length] = '\0'; \ seq_show_option(m, name, val_buf); \ } #define SEQ_START_TOKEN ((void *)1) /* * Helpers for iteration over list_head-s in seq_files */ extern struct list_head *seq_list_start(struct list_head *head, loff_t pos); extern struct list_head *seq_list_start_head(struct list_head *head, loff_t pos); extern struct list_head *seq_list_next(void *v, struct list_head *head, loff_t *ppos); extern struct list_head *seq_list_start_rcu(struct list_head *head, loff_t pos); extern struct list_head *seq_list_start_head_rcu(struct list_head *head, loff_t pos); extern struct list_head *seq_list_next_rcu(void *v, struct list_head *head, loff_t *ppos); /* * Helpers for iteration over hlist_head-s in seq_files */ extern struct hlist_node *seq_hlist_start(struct hlist_head *head, loff_t pos); extern struct hlist_node *seq_hlist_start_head(struct hlist_head *head, loff_t pos); extern struct hlist_node *seq_hlist_next(void *v, struct hlist_head *head, loff_t *ppos); extern struct hlist_node *seq_hlist_start_rcu(struct hlist_head *head, loff_t pos); extern struct hlist_node *seq_hlist_start_head_rcu(struct hlist_head *head, loff_t pos); extern struct hlist_node *seq_hlist_next_rcu(void *v, struct hlist_head *head, loff_t *ppos); /* Helpers for iterating over per-cpu hlist_head-s in seq_files */ extern struct hlist_node *seq_hlist_start_percpu(struct hlist_head __percpu *head, int *cpu, loff_t pos); extern struct hlist_node *seq_hlist_next_percpu(void *v, struct hlist_head __percpu *head, int *cpu, loff_t *pos); void seq_file_init(void); #endif PK ! �jx�� � objagg.hnu �[��� /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ /* Copyright (c) 2018 Mellanox Technologies. All rights reserved */ #ifndef _OBJAGG_H #define _OBJAGG_H struct objagg_ops { size_t obj_size; bool (*delta_check)(void *priv, const void *parent_obj, const void *obj); void * (*delta_create)(void *priv, void *parent_obj, void *obj); void (*delta_destroy)(void *priv, void *delta_priv); void * (*root_create)(void *priv, void *obj, unsigned int root_id); #define OBJAGG_OBJ_ROOT_ID_INVALID UINT_MAX void (*root_destroy)(void *priv, void *root_priv); }; struct objagg; struct objagg_obj; struct objagg_hints; const void *objagg_obj_root_priv(const struct objagg_obj *objagg_obj); const void *objagg_obj_delta_priv(const struct objagg_obj *objagg_obj); const void *objagg_obj_raw(const struct objagg_obj *objagg_obj); struct objagg_obj *objagg_obj_get(struct objagg *objagg, void *obj); void objagg_obj_put(struct objagg *objagg, struct objagg_obj *objagg_obj); struct objagg *objagg_create(const struct objagg_ops *ops, struct objagg_hints *hints, void *priv); void objagg_destroy(struct objagg *objagg); struct objagg_obj_stats { unsigned int user_count; unsigned int delta_user_count; /* includes delta object users */ }; struct objagg_obj_stats_info { struct objagg_obj_stats stats; struct objagg_obj *objagg_obj; /* associated object */ bool is_root; }; struct objagg_stats { unsigned int root_count; unsigned int stats_info_count; struct objagg_obj_stats_info stats_info[]; }; const struct objagg_stats *objagg_stats_get(struct objagg *objagg); void objagg_stats_put(const struct objagg_stats *objagg_stats); enum objagg_opt_algo_type { OBJAGG_OPT_ALGO_SIMPLE_GREEDY, }; struct objagg_hints *objagg_hints_get(struct objagg *objagg, enum objagg_opt_algo_type opt_algo_type); void objagg_hints_put(struct objagg_hints *objagg_hints); const struct objagg_stats * objagg_hints_stats_get(struct objagg_hints *objagg_hints); #endif PK ! ����� � fileattr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FILEATTR_H #define _LINUX_FILEATTR_H /* Flags shared betwen flags/xflags */ #define FS_COMMON_FL \ (FS_SYNC_FL | FS_IMMUTABLE_FL | FS_APPEND_FL | \ FS_NODUMP_FL | FS_NOATIME_FL | FS_DAX_FL | \ FS_PROJINHERIT_FL) #define FS_XFLAG_COMMON \ (FS_XFLAG_SYNC | FS_XFLAG_IMMUTABLE | FS_XFLAG_APPEND | \ FS_XFLAG_NODUMP | FS_XFLAG_NOATIME | FS_XFLAG_DAX | \ FS_XFLAG_PROJINHERIT) /* * Merged interface for miscellaneous file attributes. 'flags' originates from * ext* and 'fsx_flags' from xfs. There's some overlap between the two, which * is handled by the VFS helpers, so filesystems are free to implement just one * or both of these sub-interfaces. */ struct fileattr { u32 flags; /* flags (FS_IOC_GETFLAGS/FS_IOC_SETFLAGS) */ /* struct fsxattr: */ u32 fsx_xflags; /* xflags field value (get/set) */ u32 fsx_extsize; /* extsize field value (get/set)*/ u32 fsx_nextents; /* nextents field value (get) */ u32 fsx_projid; /* project identifier (get/set) */ u32 fsx_cowextsize; /* CoW extsize field value (get/set)*/ /* selectors: */ bool flags_valid:1; bool fsx_valid:1; }; int copy_fsxattr_to_user(const struct fileattr *fa, struct fsxattr __user *ufa); void fileattr_fill_xflags(struct fileattr *fa, u32 xflags); void fileattr_fill_flags(struct fileattr *fa, u32 flags); /** * fileattr_has_fsx - check for extended flags/attributes * @fa: fileattr pointer * * Return: true if any attributes are present that are not represented in * ->flags. */ static inline bool fileattr_has_fsx(const struct fileattr *fa) { return fa->fsx_valid && ((fa->fsx_xflags & ~FS_XFLAG_COMMON) || fa->fsx_extsize != 0 || fa->fsx_projid != 0 || fa->fsx_cowextsize != 0); } int vfs_fileattr_get(struct dentry *dentry, struct fileattr *fa); int vfs_fileattr_set(struct user_namespace *mnt_userns, struct dentry *dentry, struct fileattr *fa); #endif /* _LINUX_FILEATTR_H */ PK ! �=�c mvebu-pmsu.hnu �[��� /* * Copyright (C) 2012 Marvell * * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __MVEBU_PMSU_H__ #define __MVEBU_PMSU_H__ #ifdef CONFIG_MACH_MVEBU_V7 int mvebu_pmsu_dfs_request(int cpu); #else static inline int mvebu_pmsu_dfs_request(int cpu) { return -ENODEV; } #endif #endif /* __MVEBU_PMSU_H__ */ PK ! 1+��� � bpf_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* internal file - do not include directly */ #ifdef CONFIG_NET BPF_PROG_TYPE(BPF_PROG_TYPE_SOCKET_FILTER, sk_filter, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_SCHED_CLS, tc_cls_act, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_SCHED_ACT, tc_cls_act, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_XDP, xdp, struct xdp_md, struct xdp_buff) #ifdef CONFIG_CGROUP_BPF BPF_PROG_TYPE(BPF_PROG_TYPE_CGROUP_SKB, cg_skb, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_CGROUP_SOCK, cg_sock, struct bpf_sock, struct sock) BPF_PROG_TYPE(BPF_PROG_TYPE_CGROUP_SOCK_ADDR, cg_sock_addr, struct bpf_sock_addr, struct bpf_sock_addr_kern) #endif BPF_PROG_TYPE(BPF_PROG_TYPE_LWT_IN, lwt_in, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_LWT_OUT, lwt_out, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_LWT_XMIT, lwt_xmit, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_LWT_SEG6LOCAL, lwt_seg6local, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_SOCK_OPS, sock_ops, struct bpf_sock_ops, struct bpf_sock_ops_kern) BPF_PROG_TYPE(BPF_PROG_TYPE_SK_SKB, sk_skb, struct __sk_buff, struct sk_buff) BPF_PROG_TYPE(BPF_PROG_TYPE_SK_MSG, sk_msg, struct sk_msg_md, struct sk_msg) BPF_PROG_TYPE(BPF_PROG_TYPE_FLOW_DISSECTOR, flow_dissector, struct __sk_buff, struct bpf_flow_dissector) #endif #ifdef CONFIG_BPF_EVENTS BPF_PROG_TYPE(BPF_PROG_TYPE_KPROBE, kprobe, bpf_user_pt_regs_t, struct pt_regs) BPF_PROG_TYPE(BPF_PROG_TYPE_TRACEPOINT, tracepoint, __u64, u64) BPF_PROG_TYPE(BPF_PROG_TYPE_PERF_EVENT, perf_event, struct bpf_perf_event_data, struct bpf_perf_event_data_kern) BPF_PROG_TYPE(BPF_PROG_TYPE_RAW_TRACEPOINT, raw_tracepoint, struct bpf_raw_tracepoint_args, u64) BPF_PROG_TYPE(BPF_PROG_TYPE_RAW_TRACEPOINT_WRITABLE, raw_tracepoint_writable, struct bpf_raw_tracepoint_args, u64) BPF_PROG_TYPE(BPF_PROG_TYPE_TRACING, tracing, void *, void *) #endif #ifdef CONFIG_CGROUP_BPF BPF_PROG_TYPE(BPF_PROG_TYPE_CGROUP_DEVICE, cg_dev, struct bpf_cgroup_dev_ctx, struct bpf_cgroup_dev_ctx) BPF_PROG_TYPE(BPF_PROG_TYPE_CGROUP_SYSCTL, cg_sysctl, struct bpf_sysctl, struct bpf_sysctl_kern) BPF_PROG_TYPE(BPF_PROG_TYPE_CGROUP_SOCKOPT, cg_sockopt, struct bpf_sockopt, struct bpf_sockopt_kern) #endif #ifdef CONFIG_BPF_LIRC_MODE2 BPF_PROG_TYPE(BPF_PROG_TYPE_LIRC_MODE2, lirc_mode2, __u32, u32) #endif #ifdef CONFIG_INET BPF_PROG_TYPE(BPF_PROG_TYPE_SK_REUSEPORT, sk_reuseport, struct sk_reuseport_md, struct sk_reuseport_kern) BPF_PROG_TYPE(BPF_PROG_TYPE_SK_LOOKUP, sk_lookup, struct bpf_sk_lookup, struct bpf_sk_lookup_kern) #endif #if defined(CONFIG_BPF_JIT) BPF_PROG_TYPE(BPF_PROG_TYPE_STRUCT_OPS, bpf_struct_ops, void *, void *) BPF_PROG_TYPE(BPF_PROG_TYPE_EXT, bpf_extension, void *, void *) #ifdef CONFIG_BPF_LSM BPF_PROG_TYPE(BPF_PROG_TYPE_LSM, lsm, void *, void *) #endif /* CONFIG_BPF_LSM */ #endif BPF_PROG_TYPE(BPF_PROG_TYPE_SYSCALL, bpf_syscall, void *, void *) BPF_MAP_TYPE(BPF_MAP_TYPE_ARRAY, array_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_PERCPU_ARRAY, percpu_array_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_PROG_ARRAY, prog_array_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_PERF_EVENT_ARRAY, perf_event_array_map_ops) #ifdef CONFIG_CGROUPS BPF_MAP_TYPE(BPF_MAP_TYPE_CGROUP_ARRAY, cgroup_array_map_ops) #endif #ifdef CONFIG_CGROUP_BPF BPF_MAP_TYPE(BPF_MAP_TYPE_CGROUP_STORAGE, cgroup_storage_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_PERCPU_CGROUP_STORAGE, cgroup_storage_map_ops) #endif BPF_MAP_TYPE(BPF_MAP_TYPE_HASH, htab_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_PERCPU_HASH, htab_percpu_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_LRU_HASH, htab_lru_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_LRU_PERCPU_HASH, htab_lru_percpu_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_LPM_TRIE, trie_map_ops) #ifdef CONFIG_PERF_EVENTS BPF_MAP_TYPE(BPF_MAP_TYPE_STACK_TRACE, stack_trace_map_ops) #endif BPF_MAP_TYPE(BPF_MAP_TYPE_ARRAY_OF_MAPS, array_of_maps_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_HASH_OF_MAPS, htab_of_maps_map_ops) #ifdef CONFIG_BPF_LSM BPF_MAP_TYPE(BPF_MAP_TYPE_INODE_STORAGE, inode_storage_map_ops) #endif BPF_MAP_TYPE(BPF_MAP_TYPE_TASK_STORAGE, task_storage_map_ops) #ifdef CONFIG_NET BPF_MAP_TYPE(BPF_MAP_TYPE_DEVMAP, dev_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_DEVMAP_HASH, dev_map_hash_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_SK_STORAGE, sk_storage_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_CPUMAP, cpu_map_ops) #if defined(CONFIG_XDP_SOCKETS) BPF_MAP_TYPE(BPF_MAP_TYPE_XSKMAP, xsk_map_ops) #endif #ifdef CONFIG_INET BPF_MAP_TYPE(BPF_MAP_TYPE_SOCKMAP, sock_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_SOCKHASH, sock_hash_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_REUSEPORT_SOCKARRAY, reuseport_array_ops) #endif #endif BPF_MAP_TYPE(BPF_MAP_TYPE_QUEUE, queue_map_ops) BPF_MAP_TYPE(BPF_MAP_TYPE_STACK, stack_map_ops) #if defined(CONFIG_BPF_JIT) BPF_MAP_TYPE(BPF_MAP_TYPE_STRUCT_OPS, bpf_struct_ops_map_ops) #endif BPF_MAP_TYPE(BPF_MAP_TYPE_RINGBUF, ringbuf_map_ops) BPF_LINK_TYPE(BPF_LINK_TYPE_RAW_TRACEPOINT, raw_tracepoint) BPF_LINK_TYPE(BPF_LINK_TYPE_TRACING, tracing) #ifdef CONFIG_CGROUP_BPF BPF_LINK_TYPE(BPF_LINK_TYPE_CGROUP, cgroup) #endif BPF_LINK_TYPE(BPF_LINK_TYPE_ITER, iter) #ifdef CONFIG_NET BPF_LINK_TYPE(BPF_LINK_TYPE_NETNS, netns) BPF_LINK_TYPE(BPF_LINK_TYPE_XDP, xdp) #endif #ifdef CONFIG_PERF_EVENTS BPF_LINK_TYPE(BPF_LINK_TYPE_PERF_EVENT, perf) #endif PK ! ��;�` ` uuid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * UUID/GUID definition * * Copyright (C) 2010, 2016 Intel Corp. * Huang Ying <ying.huang@intel.com> */ #ifndef _LINUX_UUID_H_ #define _LINUX_UUID_H_ #include <uapi/linux/uuid.h> #include <linux/string.h> #define UUID_SIZE 16 typedef struct { __u8 b[UUID_SIZE]; } uuid_t; #define UUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ ((uuid_t) \ {{ ((a) >> 24) & 0xff, ((a) >> 16) & 0xff, ((a) >> 8) & 0xff, (a) & 0xff, \ ((b) >> 8) & 0xff, (b) & 0xff, \ ((c) >> 8) & 0xff, (c) & 0xff, \ (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }}) /* * The length of a UUID string ("aaaaaaaa-bbbb-cccc-dddd-eeeeeeeeeeee") * not including trailing NUL. */ #define UUID_STRING_LEN 36 extern const guid_t guid_null; extern const uuid_t uuid_null; static inline bool guid_equal(const guid_t *u1, const guid_t *u2) { return memcmp(u1, u2, sizeof(guid_t)) == 0; } static inline void guid_copy(guid_t *dst, const guid_t *src) { memcpy(dst, src, sizeof(guid_t)); } static inline void import_guid(guid_t *dst, const __u8 *src) { memcpy(dst, src, sizeof(guid_t)); } static inline void export_guid(__u8 *dst, const guid_t *src) { memcpy(dst, src, sizeof(guid_t)); } static inline bool guid_is_null(const guid_t *guid) { return guid_equal(guid, &guid_null); } static inline bool uuid_equal(const uuid_t *u1, const uuid_t *u2) { return memcmp(u1, u2, sizeof(uuid_t)) == 0; } static inline void uuid_copy(uuid_t *dst, const uuid_t *src) { memcpy(dst, src, sizeof(uuid_t)); } static inline void import_uuid(uuid_t *dst, const __u8 *src) { memcpy(dst, src, sizeof(uuid_t)); } static inline void export_uuid(__u8 *dst, const uuid_t *src) { memcpy(dst, src, sizeof(uuid_t)); } static inline bool uuid_is_null(const uuid_t *uuid) { return uuid_equal(uuid, &uuid_null); } void generate_random_uuid(unsigned char uuid[16]); void generate_random_guid(unsigned char guid[16]); extern void guid_gen(guid_t *u); extern void uuid_gen(uuid_t *u); bool __must_check uuid_is_valid(const char *uuid); extern const u8 guid_index[16]; extern const u8 uuid_index[16]; int guid_parse(const char *uuid, guid_t *u); int uuid_parse(const char *uuid, uuid_t *u); /* backwards compatibility, don't use in new code */ static inline int uuid_le_cmp(const guid_t u1, const guid_t u2) { return memcmp(&u1, &u2, sizeof(guid_t)); } #endif PK ! �z` ` panic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PANIC_H #define _LINUX_PANIC_H #include <linux/compiler_attributes.h> #include <linux/types.h> struct pt_regs; extern long (*panic_blink)(int state); __printf(1, 2) void panic(const char *fmt, ...) __noreturn __cold; void nmi_panic(struct pt_regs *regs, const char *msg); void check_panic_on_warn(const char *origin); extern void oops_enter(void); extern void oops_exit(void); extern bool oops_may_print(void); extern int panic_timeout; extern unsigned long panic_print; extern int panic_on_oops; extern int panic_on_unrecovered_nmi; extern int panic_on_io_nmi; extern int panic_on_warn; extern unsigned long panic_on_taint; extern bool panic_on_taint_nousertaint; extern int sysctl_panic_on_rcu_stall; extern int sysctl_max_rcu_stall_to_panic; extern int sysctl_panic_on_stackoverflow; extern bool crash_kexec_post_notifiers; /* * panic_cpu is used for synchronizing panic() and crash_kexec() execution. It * holds a CPU number which is executing panic() currently. A value of * PANIC_CPU_INVALID means no CPU has entered panic() or crash_kexec(). */ extern atomic_t panic_cpu; #define PANIC_CPU_INVALID -1 /* * Only to be used by arch init code. If the user over-wrote the default * CONFIG_PANIC_TIMEOUT, honor it. */ static inline void set_arch_panic_timeout(int timeout, int arch_default_timeout) { if (panic_timeout == arch_default_timeout) panic_timeout = timeout; } /* This cannot be an enum because some may be used in assembly source. */ #define TAINT_PROPRIETARY_MODULE 0 #define TAINT_FORCED_MODULE 1 #define TAINT_CPU_OUT_OF_SPEC 2 #define TAINT_FORCED_RMMOD 3 #define TAINT_MACHINE_CHECK 4 #define TAINT_BAD_PAGE 5 #define TAINT_USER 6 #define TAINT_DIE 7 #define TAINT_OVERRIDDEN_ACPI_TABLE 8 #define TAINT_WARN 9 #define TAINT_CRAP 10 #define TAINT_FIRMWARE_WORKAROUND 11 #define TAINT_OOT_MODULE 12 #define TAINT_UNSIGNED_MODULE 13 #define TAINT_SOFTLOCKUP 14 #define TAINT_LIVEPATCH 15 #define TAINT_AUX 16 #define TAINT_RANDSTRUCT 17 #define TAINT_FLAGS_COUNT 18 #define TAINT_FLAGS_MAX ((1UL << TAINT_FLAGS_COUNT) - 1) struct taint_flag { char c_true; /* character printed when tainted */ char c_false; /* character printed when not tainted */ bool module; /* also show as a per-module taint flag */ }; extern const struct taint_flag taint_flags[TAINT_FLAGS_COUNT]; enum lockdep_ok { LOCKDEP_STILL_OK, LOCKDEP_NOW_UNRELIABLE, }; extern const char *print_tainted(void); extern void add_taint(unsigned flag, enum lockdep_ok); extern int test_taint(unsigned flag); extern unsigned long get_taint(void); #endif /* _LINUX_PANIC_H */ PK ! D�z � � timb_gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * timb_gpio.h timberdale FPGA GPIO driver, platform data definition * Copyright (c) 2009 Intel Corporation */ #ifndef _LINUX_TIMB_GPIO_H #define _LINUX_TIMB_GPIO_H /** * struct timbgpio_platform_data - Platform data of the Timberdale GPIO driver * @gpio_base The number of the first GPIO pin, set to -1 for * dynamic number allocation. * @nr_pins Number of pins that is supported by the hardware (1-32) * @irq_base If IRQ is supported by the hardware, this is the base * number of IRQ:s. One IRQ per pin will be used. Set to * -1 if IRQ:s is not supported. */ struct timbgpio_platform_data { int gpio_base; int nr_pins; int irq_base; }; #endif PK ! ��A� � taskstats_kern.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* taskstats_kern.h - kernel header for per-task statistics interface * * Copyright (C) Shailabh Nagar, IBM Corp. 2006 * (C) Balbir Singh, IBM Corp. 2006 */ #ifndef _LINUX_TASKSTATS_KERN_H #define _LINUX_TASKSTATS_KERN_H #include <linux/taskstats.h> #include <linux/sched/signal.h> #include <linux/slab.h> #ifdef CONFIG_TASKSTATS extern struct kmem_cache *taskstats_cache; extern struct mutex taskstats_exit_mutex; static inline void taskstats_tgid_free(struct signal_struct *sig) { if (sig->stats) kmem_cache_free(taskstats_cache, sig->stats); } extern void taskstats_exit(struct task_struct *, int group_dead); extern void taskstats_init_early(void); #else static inline void taskstats_exit(struct task_struct *tsk, int group_dead) {} static inline void taskstats_tgid_free(struct signal_struct *sig) {} static inline void taskstats_init_early(void) {} #endif /* CONFIG_TASKSTATS */ #endif PK ! ��wY�; �; counter.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Counter interface * Copyright (C) 2018 William Breathitt Gray */ #ifndef _COUNTER_H_ #define _COUNTER_H_ #include <linux/device.h> #include <linux/kernel.h> #include <linux/types.h> struct counter_device; struct counter_count; struct counter_synapse; struct counter_signal; enum counter_comp_type { COUNTER_COMP_U8, COUNTER_COMP_U64, COUNTER_COMP_BOOL, COUNTER_COMP_SIGNAL_LEVEL, COUNTER_COMP_FUNCTION, COUNTER_COMP_SYNAPSE_ACTION, COUNTER_COMP_ENUM, COUNTER_COMP_COUNT_DIRECTION, COUNTER_COMP_COUNT_MODE, }; enum counter_scope { COUNTER_SCOPE_DEVICE, COUNTER_SCOPE_SIGNAL, COUNTER_SCOPE_COUNT, }; enum counter_count_direction { COUNTER_COUNT_DIRECTION_FORWARD, COUNTER_COUNT_DIRECTION_BACKWARD, }; enum counter_count_mode { COUNTER_COUNT_MODE_NORMAL, COUNTER_COUNT_MODE_RANGE_LIMIT, COUNTER_COUNT_MODE_NON_RECYCLE, COUNTER_COUNT_MODE_MODULO_N, }; enum counter_function { COUNTER_FUNCTION_INCREASE, COUNTER_FUNCTION_DECREASE, COUNTER_FUNCTION_PULSE_DIRECTION, COUNTER_FUNCTION_QUADRATURE_X1_A, COUNTER_FUNCTION_QUADRATURE_X1_B, COUNTER_FUNCTION_QUADRATURE_X2_A, COUNTER_FUNCTION_QUADRATURE_X2_B, COUNTER_FUNCTION_QUADRATURE_X4, }; enum counter_signal_level { COUNTER_SIGNAL_LEVEL_LOW, COUNTER_SIGNAL_LEVEL_HIGH, }; enum counter_synapse_action { COUNTER_SYNAPSE_ACTION_NONE, COUNTER_SYNAPSE_ACTION_RISING_EDGE, COUNTER_SYNAPSE_ACTION_FALLING_EDGE, COUNTER_SYNAPSE_ACTION_BOTH_EDGES, }; /** * struct counter_comp - Counter component node * @type: Counter component data type * @name: device-specific component name * @priv: component-relevant data * @action_read: Synapse action mode read callback. The read value of the * respective Synapse action mode should be passed back via * the action parameter. * @device_u8_read: Device u8 component read callback. The read value of the * respective Device u8 component should be passed back via * the val parameter. * @count_u8_read: Count u8 component read callback. The read value of the * respective Count u8 component should be passed back via * the val parameter. * @signal_u8_read: Signal u8 component read callback. The read value of the * respective Signal u8 component should be passed back via * the val parameter. * @device_u32_read: Device u32 component read callback. The read value of * the respective Device u32 component should be passed * back via the val parameter. * @count_u32_read: Count u32 component read callback. The read value of the * respective Count u32 component should be passed back via * the val parameter. * @signal_u32_read: Signal u32 component read callback. The read value of * the respective Signal u32 component should be passed * back via the val parameter. * @device_u64_read: Device u64 component read callback. The read value of * the respective Device u64 component should be passed * back via the val parameter. * @count_u64_read: Count u64 component read callback. The read value of the * respective Count u64 component should be passed back via * the val parameter. * @signal_u64_read: Signal u64 component read callback. The read value of * the respective Signal u64 component should be passed * back via the val parameter. * @action_write: Synapse action mode write callback. The write value of * the respective Synapse action mode is passed via the * action parameter. * @device_u8_write: Device u8 component write callback. The write value of * the respective Device u8 component is passed via the val * parameter. * @count_u8_write: Count u8 component write callback. The write value of * the respective Count u8 component is passed via the val * parameter. * @signal_u8_write: Signal u8 component write callback. The write value of * the respective Signal u8 component is passed via the val * parameter. * @device_u32_write: Device u32 component write callback. The write value of * the respective Device u32 component is passed via the * val parameter. * @count_u32_write: Count u32 component write callback. The write value of * the respective Count u32 component is passed via the val * parameter. * @signal_u32_write: Signal u32 component write callback. The write value of * the respective Signal u32 component is passed via the * val parameter. * @device_u64_write: Device u64 component write callback. The write value of * the respective Device u64 component is passed via the * val parameter. * @count_u64_write: Count u64 component write callback. The write value of * the respective Count u64 component is passed via the val * parameter. * @signal_u64_write: Signal u64 component write callback. The write value of * the respective Signal u64 component is passed via the * val parameter. */ struct counter_comp { enum counter_comp_type type; const char *name; void *priv; union { int (*action_read)(struct counter_device *counter, struct counter_count *count, struct counter_synapse *synapse, enum counter_synapse_action *action); int (*device_u8_read)(struct counter_device *counter, u8 *val); int (*count_u8_read)(struct counter_device *counter, struct counter_count *count, u8 *val); int (*signal_u8_read)(struct counter_device *counter, struct counter_signal *signal, u8 *val); int (*device_u32_read)(struct counter_device *counter, u32 *val); int (*count_u32_read)(struct counter_device *counter, struct counter_count *count, u32 *val); int (*signal_u32_read)(struct counter_device *counter, struct counter_signal *signal, u32 *val); int (*device_u64_read)(struct counter_device *counter, u64 *val); int (*count_u64_read)(struct counter_device *counter, struct counter_count *count, u64 *val); int (*signal_u64_read)(struct counter_device *counter, struct counter_signal *signal, u64 *val); }; union { int (*action_write)(struct counter_device *counter, struct counter_count *count, struct counter_synapse *synapse, enum counter_synapse_action action); int (*device_u8_write)(struct counter_device *counter, u8 val); int (*count_u8_write)(struct counter_device *counter, struct counter_count *count, u8 val); int (*signal_u8_write)(struct counter_device *counter, struct counter_signal *signal, u8 val); int (*device_u32_write)(struct counter_device *counter, u32 val); int (*count_u32_write)(struct counter_device *counter, struct counter_count *count, u32 val); int (*signal_u32_write)(struct counter_device *counter, struct counter_signal *signal, u32 val); int (*device_u64_write)(struct counter_device *counter, u64 val); int (*count_u64_write)(struct counter_device *counter, struct counter_count *count, u64 val); int (*signal_u64_write)(struct counter_device *counter, struct counter_signal *signal, u64 val); }; }; /** * struct counter_signal - Counter Signal node * @id: unique ID used to identify signal * @name: device-specific Signal name; ideally, this should match the name * as it appears in the datasheet documentation * @ext: optional array of Counter Signal extensions * @num_ext: number of Counter Signal extensions specified in @ext */ struct counter_signal { int id; const char *name; struct counter_comp *ext; size_t num_ext; }; /** * struct counter_synapse - Counter Synapse node * @actions_list: array of available action modes * @num_actions: number of action modes specified in @actions_list * @signal: pointer to associated signal */ struct counter_synapse { const enum counter_synapse_action *actions_list; size_t num_actions; struct counter_signal *signal; }; /** * struct counter_count - Counter Count node * @id: unique ID used to identify Count * @name: device-specific Count name; ideally, this should match * the name as it appears in the datasheet documentation * @functions_list: array available function modes * @num_functions: number of function modes specified in @functions_list * @synapses: array of synapses for initialization * @num_synapses: number of synapses specified in @synapses * @ext: optional array of Counter Count extensions * @num_ext: number of Counter Count extensions specified in @ext */ struct counter_count { int id; const char *name; const enum counter_function *functions_list; size_t num_functions; struct counter_synapse *synapses; size_t num_synapses; struct counter_comp *ext; size_t num_ext; }; /** * struct counter_ops - Callbacks from driver * @signal_read: optional read callback for Signal attribute. The read * level of the respective Signal should be passed back via * the level parameter. * @count_read: optional read callback for Count attribute. The read * value of the respective Count should be passed back via * the val parameter. * @count_write: optional write callback for Count attribute. The write * value for the respective Count is passed in via the val * parameter. * @function_read: read callback the Count function modes. The read * function mode of the respective Count should be passed * back via the function parameter. * @function_write: write callback for Count function modes. The function * mode to write for the respective Count is passed in via * the function parameter. * @action_read: read callback the Synapse action modes. The read action * mode of the respective Synapse should be passed back via * the action parameter. * @action_write: write callback for Synapse action modes. The action mode * to write for the respective Synapse is passed in via the * action parameter. */ struct counter_ops { int (*signal_read)(struct counter_device *counter, struct counter_signal *signal, enum counter_signal_level *level); int (*count_read)(struct counter_device *counter, struct counter_count *count, u64 *value); int (*count_write)(struct counter_device *counter, struct counter_count *count, u64 value); int (*function_read)(struct counter_device *counter, struct counter_count *count, enum counter_function *function); int (*function_write)(struct counter_device *counter, struct counter_count *count, enum counter_function function); int (*action_read)(struct counter_device *counter, struct counter_count *count, struct counter_synapse *synapse, enum counter_synapse_action *action); int (*action_write)(struct counter_device *counter, struct counter_count *count, struct counter_synapse *synapse, enum counter_synapse_action action); }; /** * struct counter_device - Counter data structure * @name: name of the device as it appears in the datasheet * @parent: optional parent device providing the counters * @ops: callbacks from driver * @signals: array of Signals * @num_signals: number of Signals specified in @signals * @counts: array of Counts * @num_counts: number of Counts specified in @counts * @ext: optional array of Counter device extensions * @num_ext: number of Counter device extensions specified in @ext * @priv: optional private data supplied by driver * @dev: internal device structure */ struct counter_device { const char *name; struct device *parent; const struct counter_ops *ops; struct counter_signal *signals; size_t num_signals; struct counter_count *counts; size_t num_counts; struct counter_comp *ext; size_t num_ext; void *priv; struct device dev; }; int counter_register(struct counter_device *const counter); void counter_unregister(struct counter_device *const counter); int devm_counter_register(struct device *dev, struct counter_device *const counter); #define COUNTER_COMP_DEVICE_U8(_name, _read, _write) \ { \ .type = COUNTER_COMP_U8, \ .name = (_name), \ .device_u8_read = (_read), \ .device_u8_write = (_write), \ } #define COUNTER_COMP_COUNT_U8(_name, _read, _write) \ { \ .type = COUNTER_COMP_U8, \ .name = (_name), \ .count_u8_read = (_read), \ .count_u8_write = (_write), \ } #define COUNTER_COMP_SIGNAL_U8(_name, _read, _write) \ { \ .type = COUNTER_COMP_U8, \ .name = (_name), \ .signal_u8_read = (_read), \ .signal_u8_write = (_write), \ } #define COUNTER_COMP_DEVICE_U64(_name, _read, _write) \ { \ .type = COUNTER_COMP_U64, \ .name = (_name), \ .device_u64_read = (_read), \ .device_u64_write = (_write), \ } #define COUNTER_COMP_COUNT_U64(_name, _read, _write) \ { \ .type = COUNTER_COMP_U64, \ .name = (_name), \ .count_u64_read = (_read), \ .count_u64_write = (_write), \ } #define COUNTER_COMP_SIGNAL_U64(_name, _read, _write) \ { \ .type = COUNTER_COMP_U64, \ .name = (_name), \ .signal_u64_read = (_read), \ .signal_u64_write = (_write), \ } #define COUNTER_COMP_DEVICE_BOOL(_name, _read, _write) \ { \ .type = COUNTER_COMP_BOOL, \ .name = (_name), \ .device_u8_read = (_read), \ .device_u8_write = (_write), \ } #define COUNTER_COMP_COUNT_BOOL(_name, _read, _write) \ { \ .type = COUNTER_COMP_BOOL, \ .name = (_name), \ .count_u8_read = (_read), \ .count_u8_write = (_write), \ } #define COUNTER_COMP_SIGNAL_BOOL(_name, _read, _write) \ { \ .type = COUNTER_COMP_BOOL, \ .name = (_name), \ .signal_u8_read = (_read), \ .signal_u8_write = (_write), \ } struct counter_available { union { const u32 *enums; const char *const *strs; }; size_t num_items; }; #define DEFINE_COUNTER_AVAILABLE(_name, _enums) \ struct counter_available _name = { \ .enums = (_enums), \ .num_items = ARRAY_SIZE(_enums), \ } #define DEFINE_COUNTER_ENUM(_name, _strs) \ struct counter_available _name = { \ .strs = (_strs), \ .num_items = ARRAY_SIZE(_strs), \ } #define COUNTER_COMP_DEVICE_ENUM(_name, _get, _set, _available) \ { \ .type = COUNTER_COMP_ENUM, \ .name = (_name), \ .device_u32_read = (_get), \ .device_u32_write = (_set), \ .priv = &(_available), \ } #define COUNTER_COMP_COUNT_ENUM(_name, _get, _set, _available) \ { \ .type = COUNTER_COMP_ENUM, \ .name = (_name), \ .count_u32_read = (_get), \ .count_u32_write = (_set), \ .priv = &(_available), \ } #define COUNTER_COMP_SIGNAL_ENUM(_name, _get, _set, _available) \ { \ .type = COUNTER_COMP_ENUM, \ .name = (_name), \ .signal_u32_read = (_get), \ .signal_u32_write = (_set), \ .priv = &(_available), \ } #define COUNTER_COMP_CEILING(_read, _write) \ COUNTER_COMP_COUNT_U64("ceiling", _read, _write) #define COUNTER_COMP_COUNT_MODE(_read, _write, _available) \ { \ .type = COUNTER_COMP_COUNT_MODE, \ .name = "count_mode", \ .count_u32_read = (_read), \ .count_u32_write = (_write), \ .priv = &(_available), \ } #define COUNTER_COMP_DIRECTION(_read) \ { \ .type = COUNTER_COMP_COUNT_DIRECTION, \ .name = "direction", \ .count_u32_read = (_read), \ } #define COUNTER_COMP_ENABLE(_read, _write) \ COUNTER_COMP_COUNT_BOOL("enable", _read, _write) #define COUNTER_COMP_FLOOR(_read, _write) \ COUNTER_COMP_COUNT_U64("floor", _read, _write) #define COUNTER_COMP_PRESET(_read, _write) \ COUNTER_COMP_COUNT_U64("preset", _read, _write) #define COUNTER_COMP_PRESET_ENABLE(_read, _write) \ COUNTER_COMP_COUNT_BOOL("preset_enable", _read, _write) #endif /* _COUNTER_H_ */ PK ! ���C� � pci-p2pdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * PCI Peer 2 Peer DMA support. * * Copyright (c) 2016-2018, Logan Gunthorpe * Copyright (c) 2016-2017, Microsemi Corporation * Copyright (c) 2017, Christoph Hellwig * Copyright (c) 2018, Eideticom Inc. */ #ifndef _LINUX_PCI_P2PDMA_H #define _LINUX_PCI_P2PDMA_H #include <linux/pci.h> struct block_device; struct scatterlist; #ifdef CONFIG_PCI_P2PDMA int pci_p2pdma_add_resource(struct pci_dev *pdev, int bar, size_t size, u64 offset); int pci_p2pdma_distance_many(struct pci_dev *provider, struct device **clients, int num_clients, bool verbose); bool pci_has_p2pmem(struct pci_dev *pdev); struct pci_dev *pci_p2pmem_find_many(struct device **clients, int num_clients); void *pci_alloc_p2pmem(struct pci_dev *pdev, size_t size); void pci_free_p2pmem(struct pci_dev *pdev, void *addr, size_t size); pci_bus_addr_t pci_p2pmem_virt_to_bus(struct pci_dev *pdev, void *addr); struct scatterlist *pci_p2pmem_alloc_sgl(struct pci_dev *pdev, unsigned int *nents, u32 length); void pci_p2pmem_free_sgl(struct pci_dev *pdev, struct scatterlist *sgl); void pci_p2pmem_publish(struct pci_dev *pdev, bool publish); int pci_p2pdma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs); void pci_p2pdma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs); int pci_p2pdma_enable_store(const char *page, struct pci_dev **p2p_dev, bool *use_p2pdma); ssize_t pci_p2pdma_enable_show(char *page, struct pci_dev *p2p_dev, bool use_p2pdma); #else /* CONFIG_PCI_P2PDMA */ static inline int pci_p2pdma_add_resource(struct pci_dev *pdev, int bar, size_t size, u64 offset) { return -EOPNOTSUPP; } static inline int pci_p2pdma_distance_many(struct pci_dev *provider, struct device **clients, int num_clients, bool verbose) { return -1; } static inline bool pci_has_p2pmem(struct pci_dev *pdev) { return false; } static inline struct pci_dev *pci_p2pmem_find_many(struct device **clients, int num_clients) { return NULL; } static inline void *pci_alloc_p2pmem(struct pci_dev *pdev, size_t size) { return NULL; } static inline void pci_free_p2pmem(struct pci_dev *pdev, void *addr, size_t size) { } static inline pci_bus_addr_t pci_p2pmem_virt_to_bus(struct pci_dev *pdev, void *addr) { return 0; } static inline struct scatterlist *pci_p2pmem_alloc_sgl(struct pci_dev *pdev, unsigned int *nents, u32 length) { return NULL; } static inline void pci_p2pmem_free_sgl(struct pci_dev *pdev, struct scatterlist *sgl) { } static inline void pci_p2pmem_publish(struct pci_dev *pdev, bool publish) { } static inline int pci_p2pdma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs) { return 0; } static inline void pci_p2pdma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs) { } static inline int pci_p2pdma_enable_store(const char *page, struct pci_dev **p2p_dev, bool *use_p2pdma) { *use_p2pdma = false; return 0; } static inline ssize_t pci_p2pdma_enable_show(char *page, struct pci_dev *p2p_dev, bool use_p2pdma) { return sprintf(page, "none\n"); } #endif /* CONFIG_PCI_P2PDMA */ static inline int pci_p2pdma_distance(struct pci_dev *provider, struct device *client, bool verbose) { return pci_p2pdma_distance_many(provider, &client, 1, verbose); } static inline struct pci_dev *pci_p2pmem_find(struct device *client) { return pci_p2pmem_find_many(&client, 1); } static inline int pci_p2pdma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir) { return pci_p2pdma_map_sg_attrs(dev, sg, nents, dir, 0); } static inline void pci_p2pdma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir) { pci_p2pdma_unmap_sg_attrs(dev, sg, nents, dir, 0); } #endif /* _LINUX_PCI_P2P_H */ PK ! vrn�� � fsl_devices.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/fsl_devices.h * * Definitions for any platform device related flags or structures for * Freescale processor devices * * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004,2012 Freescale Semiconductor, Inc */ #ifndef _FSL_DEVICE_H_ #define _FSL_DEVICE_H_ #define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI PHY CLK to become stable - 10ms*/ #define FSL_USB_PHY_CLK_TIMEOUT 10000 /* uSec */ #include <linux/types.h> /* * Some conventions on how we handle peripherals on Freescale chips * * unique device: a platform_device entry in fsl_plat_devs[] plus * associated device information in its platform_data structure. * * A chip is described by a set of unique devices. * * Each sub-arch has its own master list of unique devices and * enumerates them by enum fsl_devices in a sub-arch specific header * * The platform data structure is broken into two parts. The * first is device specific information that help identify any * unique features of a peripheral. The second is any * information that may be defined by the board or how the device * is connected externally of the chip. * * naming conventions: * - platform data structures: <driver>_platform_data * - platform data device flags: FSL_<driver>_DEV_<FLAG> * - platform data board flags: FSL_<driver>_BRD_<FLAG> * */ enum fsl_usb2_controller_ver { FSL_USB_VER_NONE = -1, FSL_USB_VER_OLD = 0, FSL_USB_VER_1_6 = 1, FSL_USB_VER_2_2 = 2, FSL_USB_VER_2_4 = 3, FSL_USB_VER_2_5 = 4, }; enum fsl_usb2_operating_modes { FSL_USB2_MPH_HOST, FSL_USB2_DR_HOST, FSL_USB2_DR_DEVICE, FSL_USB2_DR_OTG, }; enum fsl_usb2_phy_modes { FSL_USB2_PHY_NONE, FSL_USB2_PHY_ULPI, FSL_USB2_PHY_UTMI, FSL_USB2_PHY_UTMI_WIDE, FSL_USB2_PHY_SERIAL, FSL_USB2_PHY_UTMI_DUAL, }; struct clk; struct platform_device; struct fsl_usb2_platform_data { /* board specific information */ enum fsl_usb2_controller_ver controller_ver; enum fsl_usb2_operating_modes operating_mode; enum fsl_usb2_phy_modes phy_mode; unsigned int port_enables; unsigned int workaround; int (*init)(struct platform_device *); void (*exit)(struct platform_device *); void __iomem *regs; /* ioremap'd register base */ struct clk *clk; unsigned power_budget; /* hcd->power_budget */ unsigned big_endian_mmio:1; unsigned big_endian_desc:1; unsigned es:1; /* need USBMODE:ES */ unsigned le_setup_buf:1; unsigned have_sysif_regs:1; unsigned invert_drvvbus:1; unsigned invert_pwr_fault:1; unsigned suspended:1; unsigned already_suspended:1; unsigned has_fsl_erratum_a007792:1; unsigned has_fsl_erratum_14:1; unsigned has_fsl_erratum_a005275:1; unsigned has_fsl_erratum_a005697:1; unsigned has_fsl_erratum_a006918:1; unsigned check_phy_clk_valid:1; /* register save area for suspend/resume */ u32 pm_command; u32 pm_status; u32 pm_intr_enable; u32 pm_frame_index; u32 pm_segment; u32 pm_frame_list; u32 pm_async_next; u32 pm_configured_flag; u32 pm_portsc; u32 pm_usbgenctrl; }; /* Flags in fsl_usb2_mph_platform_data */ #define FSL_USB2_PORT0_ENABLED 0x00000001 #define FSL_USB2_PORT1_ENABLED 0x00000002 #define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0) struct spi_device; struct fsl_spi_platform_data { u32 initial_spmode; /* initial SPMODE value */ s16 bus_num; unsigned int flags; #define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */ #define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */ #define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */ #define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */ #define SPI_QE (1 << 4) /* SPI unit is in QE block */ /* board specific information */ u16 max_chipselect; void (*cs_control)(struct spi_device *spi, bool on); u32 sysclk; }; struct mpc8xx_pcmcia_ops { void(*hw_ctrl)(int slot, int enable); int(*voltage_set)(int slot, int vcc, int vpp); }; /* Returns non-zero if the current suspend operation would * lead to a deep sleep (i.e. power removed from the core, * instead of just the clock). */ #if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND) int fsl_deep_sleep(void); #else static inline int fsl_deep_sleep(void) { return 0; } #endif #endif /* _FSL_DEVICE_H_ */ PK ! Mȿ:r :r rculist.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RCULIST_H #define _LINUX_RCULIST_H #ifdef __KERNEL__ /* * RCU-protected list version */ #include <linux/list.h> #include <linux/rcupdate.h> /* * INIT_LIST_HEAD_RCU - Initialize a list_head visible to RCU readers * @list: list to be initialized * * You should instead use INIT_LIST_HEAD() for normal initialization and * cleanup tasks, when readers have no access to the list being initialized. * However, if the list being initialized is visible to readers, you * need to keep the compiler from being too mischievous. */ static inline void INIT_LIST_HEAD_RCU(struct list_head *list) { WRITE_ONCE(list->next, list); WRITE_ONCE(list->prev, list); } /* * return the ->next pointer of a list_head in an rcu safe * way, we must not access it directly */ #define list_next_rcu(list) (*((struct list_head __rcu **)(&(list)->next))) /** * list_tail_rcu - returns the prev pointer of the head of the list * @head: the head of the list * * Note: This should only be used with the list header, and even then * only if list_del() and similar primitives are not also used on the * list header. */ #define list_tail_rcu(head) (*((struct list_head __rcu **)(&(head)->prev))) /* * Check during list traversal that we are within an RCU reader */ #define check_arg_count_one(dummy) #ifdef CONFIG_PROVE_RCU_LIST #define __list_check_rcu(dummy, cond, extra...) \ ({ \ check_arg_count_one(extra); \ RCU_LOCKDEP_WARN(!(cond) && !rcu_read_lock_any_held(), \ "RCU-list traversed in non-reader section!"); \ }) #define __list_check_srcu(cond) \ ({ \ RCU_LOCKDEP_WARN(!(cond), \ "RCU-list traversed without holding the required lock!");\ }) #else #define __list_check_rcu(dummy, cond, extra...) \ ({ check_arg_count_one(extra); }) #define __list_check_srcu(cond) ({ }) #endif /* * Insert a new entry between two known consecutive entries. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static inline void __list_add_rcu(struct list_head *new, struct list_head *prev, struct list_head *next) { if (!__list_add_valid(new, prev, next)) return; new->next = next; new->prev = prev; rcu_assign_pointer(list_next_rcu(prev), new); next->prev = new; } /** * list_add_rcu - add a new entry to rcu-protected list * @new: new entry to be added * @head: list head to add it after * * Insert a new entry after the specified head. * This is good for implementing stacks. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as list_add_rcu() * or list_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * list_for_each_entry_rcu(). */ static inline void list_add_rcu(struct list_head *new, struct list_head *head) { __list_add_rcu(new, head, head->next); } /** * list_add_tail_rcu - add a new entry to rcu-protected list * @new: new entry to be added * @head: list head to add it before * * Insert a new entry before the specified head. * This is useful for implementing queues. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as list_add_tail_rcu() * or list_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * list_for_each_entry_rcu(). */ static inline void list_add_tail_rcu(struct list_head *new, struct list_head *head) { __list_add_rcu(new, head->prev, head); } /** * list_del_rcu - deletes entry from list without re-initialization * @entry: the element to delete from the list. * * Note: list_empty() on entry does not return true after this, * the entry is in an undefined state. It is useful for RCU based * lockfree traversal. * * In particular, it means that we can not poison the forward * pointers that may still be used for walking the list. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as list_del_rcu() * or list_add_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * list_for_each_entry_rcu(). * * Note that the caller is not permitted to immediately free * the newly deleted entry. Instead, either synchronize_rcu() * or call_rcu() must be used to defer freeing until an RCU * grace period has elapsed. */ static inline void list_del_rcu(struct list_head *entry) { __list_del_entry(entry); entry->prev = LIST_POISON2; } /** * hlist_del_init_rcu - deletes entry from hash list with re-initialization * @n: the element to delete from the hash list. * * Note: list_unhashed() on the node return true after this. It is * useful for RCU based read lockfree traversal if the writer side * must know if the list entry is still hashed or already unhashed. * * In particular, it means that we can not poison the forward pointers * that may still be used for walking the hash list and we can only * zero the pprev pointer so list_unhashed() will return true after * this. * * The caller must take whatever precautions are necessary (such as * holding appropriate locks) to avoid racing with another * list-mutation primitive, such as hlist_add_head_rcu() or * hlist_del_rcu(), running on this same list. However, it is * perfectly legal to run concurrently with the _rcu list-traversal * primitives, such as hlist_for_each_entry_rcu(). */ static inline void hlist_del_init_rcu(struct hlist_node *n) { if (!hlist_unhashed(n)) { __hlist_del(n); WRITE_ONCE(n->pprev, NULL); } } /** * list_replace_rcu - replace old entry by new one * @old : the element to be replaced * @new : the new element to insert * * The @old entry will be replaced with the @new entry atomically. * Note: @old should not be empty. */ static inline void list_replace_rcu(struct list_head *old, struct list_head *new) { new->next = old->next; new->prev = old->prev; rcu_assign_pointer(list_next_rcu(new->prev), new); new->next->prev = new; old->prev = LIST_POISON2; } /** * __list_splice_init_rcu - join an RCU-protected list into an existing list. * @list: the RCU-protected list to splice * @prev: points to the last element of the existing list * @next: points to the first element of the existing list * @sync: synchronize_rcu, synchronize_rcu_expedited, ... * * The list pointed to by @prev and @next can be RCU-read traversed * concurrently with this function. * * Note that this function blocks. * * Important note: the caller must take whatever action is necessary to prevent * any other updates to the existing list. In principle, it is possible to * modify the list as soon as sync() begins execution. If this sort of thing * becomes necessary, an alternative version based on call_rcu() could be * created. But only if -really- needed -- there is no shortage of RCU API * members. */ static inline void __list_splice_init_rcu(struct list_head *list, struct list_head *prev, struct list_head *next, void (*sync)(void)) { struct list_head *first = list->next; struct list_head *last = list->prev; /* * "first" and "last" tracking list, so initialize it. RCU readers * have access to this list, so we must use INIT_LIST_HEAD_RCU() * instead of INIT_LIST_HEAD(). */ INIT_LIST_HEAD_RCU(list); /* * At this point, the list body still points to the source list. * Wait for any readers to finish using the list before splicing * the list body into the new list. Any new readers will see * an empty list. */ sync(); ASSERT_EXCLUSIVE_ACCESS(*first); ASSERT_EXCLUSIVE_ACCESS(*last); /* * Readers are finished with the source list, so perform splice. * The order is important if the new list is global and accessible * to concurrent RCU readers. Note that RCU readers are not * permitted to traverse the prev pointers without excluding * this function. */ last->next = next; rcu_assign_pointer(list_next_rcu(prev), first); first->prev = prev; next->prev = last; } /** * list_splice_init_rcu - splice an RCU-protected list into an existing list, * designed for stacks. * @list: the RCU-protected list to splice * @head: the place in the existing list to splice the first list into * @sync: synchronize_rcu, synchronize_rcu_expedited, ... */ static inline void list_splice_init_rcu(struct list_head *list, struct list_head *head, void (*sync)(void)) { if (!list_empty(list)) __list_splice_init_rcu(list, head, head->next, sync); } /** * list_splice_tail_init_rcu - splice an RCU-protected list into an existing * list, designed for queues. * @list: the RCU-protected list to splice * @head: the place in the existing list to splice the first list into * @sync: synchronize_rcu, synchronize_rcu_expedited, ... */ static inline void list_splice_tail_init_rcu(struct list_head *list, struct list_head *head, void (*sync)(void)) { if (!list_empty(list)) __list_splice_init_rcu(list, head->prev, head, sync); } /** * list_entry_rcu - get the struct for this entry * @ptr: the &struct list_head pointer. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * This primitive may safely run concurrently with the _rcu list-mutation * primitives such as list_add_rcu() as long as it's guarded by rcu_read_lock(). */ #define list_entry_rcu(ptr, type, member) \ container_of(READ_ONCE(ptr), type, member) /* * Where are list_empty_rcu() and list_first_entry_rcu()? * * They do not exist because they would lead to subtle race conditions: * * if (!list_empty_rcu(mylist)) { * struct foo *bar = list_first_entry_rcu(mylist, struct foo, list_member); * do_something(bar); * } * * The list might be non-empty when list_empty_rcu() checks it, but it * might have become empty by the time that list_first_entry_rcu() rereads * the ->next pointer, which would result in a SEGV. * * When not using RCU, it is OK for list_first_entry() to re-read that * pointer because both functions should be protected by some lock that * blocks writers. * * When using RCU, list_empty() uses READ_ONCE() to fetch the * RCU-protected ->next pointer and then compares it to the address of the * list head. However, it neither dereferences this pointer nor provides * this pointer to its caller. Thus, READ_ONCE() suffices (that is, * rcu_dereference() is not needed), which means that list_empty() can be * used anywhere you would want to use list_empty_rcu(). Just don't * expect anything useful to happen if you do a subsequent lockless * call to list_first_entry_rcu()!!! * * See list_first_or_null_rcu for an alternative. */ /** * list_first_or_null_rcu - get the first element from a list * @ptr: the list head to take the element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * Note that if the list is empty, it returns NULL. * * This primitive may safely run concurrently with the _rcu list-mutation * primitives such as list_add_rcu() as long as it's guarded by rcu_read_lock(). */ #define list_first_or_null_rcu(ptr, type, member) \ ({ \ struct list_head *__ptr = (ptr); \ struct list_head *__next = READ_ONCE(__ptr->next); \ likely(__ptr != __next) ? list_entry_rcu(__next, type, member) : NULL; \ }) /** * list_next_or_null_rcu - get the first element from a list * @head: the head for the list. * @ptr: the list head to take the next element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * Note that if the ptr is at the end of the list, NULL is returned. * * This primitive may safely run concurrently with the _rcu list-mutation * primitives such as list_add_rcu() as long as it's guarded by rcu_read_lock(). */ #define list_next_or_null_rcu(head, ptr, type, member) \ ({ \ struct list_head *__head = (head); \ struct list_head *__ptr = (ptr); \ struct list_head *__next = READ_ONCE(__ptr->next); \ likely(__next != __head) ? list_entry_rcu(__next, type, \ member) : NULL; \ }) /** * list_for_each_entry_rcu - iterate over rcu list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * @cond: optional lockdep expression if called from non-RCU protection. * * This list-traversal primitive may safely run concurrently with * the _rcu list-mutation primitives such as list_add_rcu() * as long as the traversal is guarded by rcu_read_lock(). */ #define list_for_each_entry_rcu(pos, head, member, cond...) \ for (__list_check_rcu(dummy, ## cond, 0), \ pos = list_entry_rcu((head)->next, typeof(*pos), member); \ &pos->member != (head); \ pos = list_entry_rcu(pos->member.next, typeof(*pos), member)) /** * list_for_each_entry_srcu - iterate over rcu list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * @cond: lockdep expression for the lock required to traverse the list. * * This list-traversal primitive may safely run concurrently with * the _rcu list-mutation primitives such as list_add_rcu() * as long as the traversal is guarded by srcu_read_lock(). * The lockdep expression srcu_read_lock_held() can be passed as the * cond argument from read side. */ #define list_for_each_entry_srcu(pos, head, member, cond) \ for (__list_check_srcu(cond), \ pos = list_entry_rcu((head)->next, typeof(*pos), member); \ &pos->member != (head); \ pos = list_entry_rcu(pos->member.next, typeof(*pos), member)) /** * list_entry_lockless - get the struct for this entry * @ptr: the &struct list_head pointer. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * This primitive may safely run concurrently with the _rcu * list-mutation primitives such as list_add_rcu(), but requires some * implicit RCU read-side guarding. One example is running within a special * exception-time environment where preemption is disabled and where lockdep * cannot be invoked. Another example is when items are added to the list, * but never deleted. */ #define list_entry_lockless(ptr, type, member) \ container_of((typeof(ptr))READ_ONCE(ptr), type, member) /** * list_for_each_entry_lockless - iterate over rcu list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_struct within the struct. * * This primitive may safely run concurrently with the _rcu * list-mutation primitives such as list_add_rcu(), but requires some * implicit RCU read-side guarding. One example is running within a special * exception-time environment where preemption is disabled and where lockdep * cannot be invoked. Another example is when items are added to the list, * but never deleted. */ #define list_for_each_entry_lockless(pos, head, member) \ for (pos = list_entry_lockless((head)->next, typeof(*pos), member); \ &pos->member != (head); \ pos = list_entry_lockless(pos->member.next, typeof(*pos), member)) /** * list_for_each_entry_continue_rcu - continue iteration over list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * * Continue to iterate over list of given type, continuing after * the current position which must have been in the list when the RCU read * lock was taken. * This would typically require either that you obtained the node from a * previous walk of the list in the same RCU read-side critical section, or * that you held some sort of non-RCU reference (such as a reference count) * to keep the node alive *and* in the list. * * This iterator is similar to list_for_each_entry_from_rcu() except * this starts after the given position and that one starts at the given * position. */ #define list_for_each_entry_continue_rcu(pos, head, member) \ for (pos = list_entry_rcu(pos->member.next, typeof(*pos), member); \ &pos->member != (head); \ pos = list_entry_rcu(pos->member.next, typeof(*pos), member)) /** * list_for_each_entry_from_rcu - iterate over a list from current point * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_node within the struct. * * Iterate over the tail of a list starting from a given position, * which must have been in the list when the RCU read lock was taken. * This would typically require either that you obtained the node from a * previous walk of the list in the same RCU read-side critical section, or * that you held some sort of non-RCU reference (such as a reference count) * to keep the node alive *and* in the list. * * This iterator is similar to list_for_each_entry_continue_rcu() except * this starts from the given position and that one starts from the position * after the given position. */ #define list_for_each_entry_from_rcu(pos, head, member) \ for (; &(pos)->member != (head); \ pos = list_entry_rcu(pos->member.next, typeof(*(pos)), member)) /** * hlist_del_rcu - deletes entry from hash list without re-initialization * @n: the element to delete from the hash list. * * Note: list_unhashed() on entry does not return true after this, * the entry is in an undefined state. It is useful for RCU based * lockfree traversal. * * In particular, it means that we can not poison the forward * pointers that may still be used for walking the hash list. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_add_head_rcu() * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_for_each_entry(). */ static inline void hlist_del_rcu(struct hlist_node *n) { __hlist_del(n); WRITE_ONCE(n->pprev, LIST_POISON2); } /** * hlist_replace_rcu - replace old entry by new one * @old : the element to be replaced * @new : the new element to insert * * The @old entry will be replaced with the @new entry atomically. */ static inline void hlist_replace_rcu(struct hlist_node *old, struct hlist_node *new) { struct hlist_node *next = old->next; new->next = next; WRITE_ONCE(new->pprev, old->pprev); rcu_assign_pointer(*(struct hlist_node __rcu **)new->pprev, new); if (next) WRITE_ONCE(new->next->pprev, &new->next); WRITE_ONCE(old->pprev, LIST_POISON2); } /** * hlists_swap_heads_rcu - swap the lists the hlist heads point to * @left: The hlist head on the left * @right: The hlist head on the right * * The lists start out as [@left ][node1 ... ] and * [@right ][node2 ... ] * The lists end up as [@left ][node2 ... ] * [@right ][node1 ... ] */ static inline void hlists_swap_heads_rcu(struct hlist_head *left, struct hlist_head *right) { struct hlist_node *node1 = left->first; struct hlist_node *node2 = right->first; rcu_assign_pointer(left->first, node2); rcu_assign_pointer(right->first, node1); WRITE_ONCE(node2->pprev, &left->first); WRITE_ONCE(node1->pprev, &right->first); } /* * return the first or the next element in an RCU protected hlist */ #define hlist_first_rcu(head) (*((struct hlist_node __rcu **)(&(head)->first))) #define hlist_next_rcu(node) (*((struct hlist_node __rcu **)(&(node)->next))) #define hlist_pprev_rcu(node) (*((struct hlist_node __rcu **)((node)->pprev))) /** * hlist_add_head_rcu * @n: the element to add to the hash list. * @h: the list to add to. * * Description: * Adds the specified element to the specified hlist, * while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_add_head_rcu() * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. Regardless of the type of CPU, the * list-traversal primitive must be guarded by rcu_read_lock(). */ static inline void hlist_add_head_rcu(struct hlist_node *n, struct hlist_head *h) { struct hlist_node *first = h->first; n->next = first; WRITE_ONCE(n->pprev, &h->first); rcu_assign_pointer(hlist_first_rcu(h), n); if (first) WRITE_ONCE(first->pprev, &n->next); } /** * hlist_add_tail_rcu * @n: the element to add to the hash list. * @h: the list to add to. * * Description: * Adds the specified element to the specified hlist, * while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_add_head_rcu() * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. Regardless of the type of CPU, the * list-traversal primitive must be guarded by rcu_read_lock(). */ static inline void hlist_add_tail_rcu(struct hlist_node *n, struct hlist_head *h) { struct hlist_node *i, *last = NULL; /* Note: write side code, so rcu accessors are not needed. */ for (i = h->first; i; i = i->next) last = i; if (last) { n->next = last->next; WRITE_ONCE(n->pprev, &last->next); rcu_assign_pointer(hlist_next_rcu(last), n); } else { hlist_add_head_rcu(n, h); } } /** * hlist_add_before_rcu * @n: the new element to add to the hash list. * @next: the existing element to add the new element before. * * Description: * Adds the specified element to the specified hlist * before the specified node while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_add_head_rcu() * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. */ static inline void hlist_add_before_rcu(struct hlist_node *n, struct hlist_node *next) { WRITE_ONCE(n->pprev, next->pprev); n->next = next; rcu_assign_pointer(hlist_pprev_rcu(n), n); WRITE_ONCE(next->pprev, &n->next); } /** * hlist_add_behind_rcu * @n: the new element to add to the hash list. * @prev: the existing element to add the new element after. * * Description: * Adds the specified element to the specified hlist * after the specified node while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_add_head_rcu() * or hlist_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. */ static inline void hlist_add_behind_rcu(struct hlist_node *n, struct hlist_node *prev) { n->next = prev->next; WRITE_ONCE(n->pprev, &prev->next); rcu_assign_pointer(hlist_next_rcu(prev), n); if (n->next) WRITE_ONCE(n->next->pprev, &n->next); } #define __hlist_for_each_rcu(pos, head) \ for (pos = rcu_dereference(hlist_first_rcu(head)); \ pos; \ pos = rcu_dereference(hlist_next_rcu(pos))) /** * hlist_for_each_entry_rcu - iterate over rcu list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. * @cond: optional lockdep expression if called from non-RCU protection. * * This list-traversal primitive may safely run concurrently with * the _rcu list-mutation primitives such as hlist_add_head_rcu() * as long as the traversal is guarded by rcu_read_lock(). */ #define hlist_for_each_entry_rcu(pos, head, member, cond...) \ for (__list_check_rcu(dummy, ## cond, 0), \ pos = hlist_entry_safe(rcu_dereference_raw(hlist_first_rcu(head)),\ typeof(*(pos)), member); \ pos; \ pos = hlist_entry_safe(rcu_dereference_raw(hlist_next_rcu(\ &(pos)->member)), typeof(*(pos)), member)) /** * hlist_for_each_entry_srcu - iterate over rcu list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. * @cond: lockdep expression for the lock required to traverse the list. * * This list-traversal primitive may safely run concurrently with * the _rcu list-mutation primitives such as hlist_add_head_rcu() * as long as the traversal is guarded by srcu_read_lock(). * The lockdep expression srcu_read_lock_held() can be passed as the * cond argument from read side. */ #define hlist_for_each_entry_srcu(pos, head, member, cond) \ for (__list_check_srcu(cond), \ pos = hlist_entry_safe(rcu_dereference_raw(hlist_first_rcu(head)),\ typeof(*(pos)), member); \ pos; \ pos = hlist_entry_safe(rcu_dereference_raw(hlist_next_rcu(\ &(pos)->member)), typeof(*(pos)), member)) /** * hlist_for_each_entry_rcu_notrace - iterate over rcu list of given type (for tracing) * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. * * This list-traversal primitive may safely run concurrently with * the _rcu list-mutation primitives such as hlist_add_head_rcu() * as long as the traversal is guarded by rcu_read_lock(). * * This is the same as hlist_for_each_entry_rcu() except that it does * not do any RCU debugging or tracing. */ #define hlist_for_each_entry_rcu_notrace(pos, head, member) \ for (pos = hlist_entry_safe(rcu_dereference_raw_check(hlist_first_rcu(head)),\ typeof(*(pos)), member); \ pos; \ pos = hlist_entry_safe(rcu_dereference_raw_check(hlist_next_rcu(\ &(pos)->member)), typeof(*(pos)), member)) /** * hlist_for_each_entry_rcu_bh - iterate over rcu list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. * * This list-traversal primitive may safely run concurrently with * the _rcu list-mutation primitives such as hlist_add_head_rcu() * as long as the traversal is guarded by rcu_read_lock(). */ #define hlist_for_each_entry_rcu_bh(pos, head, member) \ for (pos = hlist_entry_safe(rcu_dereference_bh(hlist_first_rcu(head)),\ typeof(*(pos)), member); \ pos; \ pos = hlist_entry_safe(rcu_dereference_bh(hlist_next_rcu(\ &(pos)->member)), typeof(*(pos)), member)) /** * hlist_for_each_entry_continue_rcu - iterate over a hlist continuing after current point * @pos: the type * to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry_continue_rcu(pos, member) \ for (pos = hlist_entry_safe(rcu_dereference_raw(hlist_next_rcu( \ &(pos)->member)), typeof(*(pos)), member); \ pos; \ pos = hlist_entry_safe(rcu_dereference_raw(hlist_next_rcu( \ &(pos)->member)), typeof(*(pos)), member)) /** * hlist_for_each_entry_continue_rcu_bh - iterate over a hlist continuing after current point * @pos: the type * to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry_continue_rcu_bh(pos, member) \ for (pos = hlist_entry_safe(rcu_dereference_bh(hlist_next_rcu( \ &(pos)->member)), typeof(*(pos)), member); \ pos; \ pos = hlist_entry_safe(rcu_dereference_bh(hlist_next_rcu( \ &(pos)->member)), typeof(*(pos)), member)) /** * hlist_for_each_entry_from_rcu - iterate over a hlist continuing from current point * @pos: the type * to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry_from_rcu(pos, member) \ for (; pos; \ pos = hlist_entry_safe(rcu_dereference_raw(hlist_next_rcu( \ &(pos)->member)), typeof(*(pos)), member)) #endif /* __KERNEL__ */ #endif PK ! ]�o�� � tty_flip.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TTY_FLIP_H #define _LINUX_TTY_FLIP_H #include <linux/tty_buffer.h> #include <linux/tty_port.h> struct tty_ldisc; extern int tty_buffer_set_limit(struct tty_port *port, int limit); extern unsigned int tty_buffer_space_avail(struct tty_port *port); extern int tty_buffer_request_room(struct tty_port *port, size_t size); extern int tty_insert_flip_string_flags(struct tty_port *port, const unsigned char *chars, const char *flags, size_t size); extern int tty_insert_flip_string_fixed_flag(struct tty_port *port, const unsigned char *chars, char flag, size_t size); extern int tty_prepare_flip_string(struct tty_port *port, unsigned char **chars, size_t size); extern void tty_flip_buffer_push(struct tty_port *port); int __tty_insert_flip_char(struct tty_port *port, unsigned char ch, char flag); static inline int tty_insert_flip_char(struct tty_port *port, unsigned char ch, char flag) { struct tty_buffer *tb = port->buf.tail; int change; change = (tb->flags & TTYB_NORMAL) && (flag != TTY_NORMAL); if (!change && tb->used < tb->size) { if (~tb->flags & TTYB_NORMAL) *flag_buf_ptr(tb, tb->used) = flag; *char_buf_ptr(tb, tb->used++) = ch; return 1; } return __tty_insert_flip_char(port, ch, flag); } static inline int tty_insert_flip_string(struct tty_port *port, const unsigned char *chars, size_t size) { return tty_insert_flip_string_fixed_flag(port, chars, TTY_NORMAL, size); } int tty_ldisc_receive_buf(struct tty_ldisc *ld, const unsigned char *p, const char *f, int count); extern void tty_buffer_lock_exclusive(struct tty_port *port); extern void tty_buffer_unlock_exclusive(struct tty_port *port); #endif /* _LINUX_TTY_FLIP_H */ PK ! �?�z} z} compat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_COMPAT_H #define _LINUX_COMPAT_H /* * These are the type definitions for the architecture specific * syscall compatibility layer. */ #include <linux/types.h> #include <linux/time.h> #include <linux/stat.h> #include <linux/param.h> /* for HZ */ #include <linux/sem.h> #include <linux/socket.h> #include <linux/if.h> #include <linux/fs.h> #include <linux/aio_abi.h> /* for aio_context_t */ #include <linux/uaccess.h> #include <linux/unistd.h> #include <asm/compat.h> #include <asm/siginfo.h> #include <asm/signal.h> #ifdef CONFIG_ARCH_HAS_SYSCALL_WRAPPER /* * It may be useful for an architecture to override the definitions of the * COMPAT_SYSCALL_DEFINE0 and COMPAT_SYSCALL_DEFINEx() macros, in particular * to use a different calling convention for syscalls. To allow for that, + the prototypes for the compat_sys_*() functions below will *not* be included * if CONFIG_ARCH_HAS_SYSCALL_WRAPPER is enabled. */ #include <asm/syscall_wrapper.h> #endif /* CONFIG_ARCH_HAS_SYSCALL_WRAPPER */ #ifndef COMPAT_USE_64BIT_TIME #define COMPAT_USE_64BIT_TIME 0 #endif #ifndef __SC_DELOUSE #define __SC_DELOUSE(t,v) ((__force t)(unsigned long)(v)) #endif #ifndef COMPAT_SYSCALL_DEFINE0 #define COMPAT_SYSCALL_DEFINE0(name) \ asmlinkage long compat_sys_##name(void); \ ALLOW_ERROR_INJECTION(compat_sys_##name, ERRNO); \ asmlinkage long compat_sys_##name(void) #endif /* COMPAT_SYSCALL_DEFINE0 */ #define COMPAT_SYSCALL_DEFINE1(name, ...) \ COMPAT_SYSCALL_DEFINEx(1, _##name, __VA_ARGS__) #define COMPAT_SYSCALL_DEFINE2(name, ...) \ COMPAT_SYSCALL_DEFINEx(2, _##name, __VA_ARGS__) #define COMPAT_SYSCALL_DEFINE3(name, ...) \ COMPAT_SYSCALL_DEFINEx(3, _##name, __VA_ARGS__) #define COMPAT_SYSCALL_DEFINE4(name, ...) \ COMPAT_SYSCALL_DEFINEx(4, _##name, __VA_ARGS__) #define COMPAT_SYSCALL_DEFINE5(name, ...) \ COMPAT_SYSCALL_DEFINEx(5, _##name, __VA_ARGS__) #define COMPAT_SYSCALL_DEFINE6(name, ...) \ COMPAT_SYSCALL_DEFINEx(6, _##name, __VA_ARGS__) /* * The asmlinkage stub is aliased to a function named __se_compat_sys_*() which * sign-extends 32-bit ints to longs whenever needed. The actual work is * done within __do_compat_sys_*(). */ #ifndef COMPAT_SYSCALL_DEFINEx #define COMPAT_SYSCALL_DEFINEx(x, name, ...) \ __diag_push(); \ __diag_ignore(GCC, 8, "-Wattribute-alias", \ "Type aliasing is used to sanitize syscall arguments");\ asmlinkage long compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \ __attribute__((alias(__stringify(__se_compat_sys##name)))); \ ALLOW_ERROR_INJECTION(compat_sys##name, ERRNO); \ static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__));\ asmlinkage long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ asmlinkage long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ { \ long ret = __do_compat_sys##name(__MAP(x,__SC_DELOUSE,__VA_ARGS__));\ __MAP(x,__SC_TEST,__VA_ARGS__); \ return ret; \ } \ __diag_pop(); \ static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) #endif /* COMPAT_SYSCALL_DEFINEx */ struct compat_iovec { compat_uptr_t iov_base; compat_size_t iov_len; }; #ifndef compat_user_stack_pointer #define compat_user_stack_pointer() current_user_stack_pointer() #endif #ifndef compat_sigaltstack /* we'll need that for MIPS */ typedef struct compat_sigaltstack { compat_uptr_t ss_sp; int ss_flags; compat_size_t ss_size; } compat_stack_t; #endif #ifndef COMPAT_MINSIGSTKSZ #define COMPAT_MINSIGSTKSZ MINSIGSTKSZ #endif #define compat_jiffies_to_clock_t(x) \ (((unsigned long)(x) * COMPAT_USER_HZ) / HZ) typedef __compat_uid32_t compat_uid_t; typedef __compat_gid32_t compat_gid_t; struct compat_sel_arg_struct; struct rusage; struct old_itimerval32; struct compat_tms { compat_clock_t tms_utime; compat_clock_t tms_stime; compat_clock_t tms_cutime; compat_clock_t tms_cstime; }; #define _COMPAT_NSIG_WORDS (_COMPAT_NSIG / _COMPAT_NSIG_BPW) #ifndef compat_sigset_t typedef struct { compat_sigset_word sig[_COMPAT_NSIG_WORDS]; } compat_sigset_t; #endif int set_compat_user_sigmask(const compat_sigset_t __user *umask, size_t sigsetsize); struct compat_sigaction { #ifndef __ARCH_HAS_IRIX_SIGACTION compat_uptr_t sa_handler; compat_ulong_t sa_flags; #else compat_uint_t sa_flags; compat_uptr_t sa_handler; #endif #ifdef __ARCH_HAS_SA_RESTORER compat_uptr_t sa_restorer; #endif compat_sigset_t sa_mask __packed; }; typedef union compat_sigval { compat_int_t sival_int; compat_uptr_t sival_ptr; } compat_sigval_t; typedef struct compat_siginfo { int si_signo; #ifndef __ARCH_HAS_SWAPPED_SIGINFO int si_errno; int si_code; #else int si_code; int si_errno; #endif union { int _pad[128/sizeof(int) - 3]; /* kill() */ struct { compat_pid_t _pid; /* sender's pid */ __compat_uid32_t _uid; /* sender's uid */ } _kill; /* POSIX.1b timers */ struct { compat_timer_t _tid; /* timer id */ int _overrun; /* overrun count */ compat_sigval_t _sigval; /* same as below */ } _timer; /* POSIX.1b signals */ struct { compat_pid_t _pid; /* sender's pid */ __compat_uid32_t _uid; /* sender's uid */ compat_sigval_t _sigval; } _rt; /* SIGCHLD */ struct { compat_pid_t _pid; /* which child */ __compat_uid32_t _uid; /* sender's uid */ int _status; /* exit code */ compat_clock_t _utime; compat_clock_t _stime; } _sigchld; #ifdef CONFIG_X86_X32_ABI /* SIGCHLD (x32 version) */ struct { compat_pid_t _pid; /* which child */ __compat_uid32_t _uid; /* sender's uid */ int _status; /* exit code */ compat_s64 _utime; compat_s64 _stime; } _sigchld_x32; #endif /* SIGILL, SIGFPE, SIGSEGV, SIGBUS, SIGTRAP, SIGEMT */ struct { compat_uptr_t _addr; /* faulting insn/memory ref. */ #define __COMPAT_ADDR_BND_PKEY_PAD (__alignof__(compat_uptr_t) < sizeof(short) ? \ sizeof(short) : __alignof__(compat_uptr_t)) union { /* used on alpha and sparc */ int _trapno; /* TRAP # which caused the signal */ /* * used when si_code=BUS_MCEERR_AR or * used when si_code=BUS_MCEERR_AO */ short int _addr_lsb; /* Valid LSB of the reported address. */ /* used when si_code=SEGV_BNDERR */ struct { char _dummy_bnd[__COMPAT_ADDR_BND_PKEY_PAD]; compat_uptr_t _lower; compat_uptr_t _upper; } _addr_bnd; /* used when si_code=SEGV_PKUERR */ struct { char _dummy_pkey[__COMPAT_ADDR_BND_PKEY_PAD]; u32 _pkey; } _addr_pkey; /* used when si_code=TRAP_PERF */ struct { compat_ulong_t _data; u32 _type; u32 _flags; } _perf; }; } _sigfault; /* SIGPOLL */ struct { compat_long_t _band; /* POLL_IN, POLL_OUT, POLL_MSG */ int _fd; } _sigpoll; struct { compat_uptr_t _call_addr; /* calling user insn */ int _syscall; /* triggering system call number */ unsigned int _arch; /* AUDIT_ARCH_* of syscall */ } _sigsys; } _sifields; } compat_siginfo_t; struct compat_rlimit { compat_ulong_t rlim_cur; compat_ulong_t rlim_max; }; struct compat_rusage { struct old_timeval32 ru_utime; struct old_timeval32 ru_stime; compat_long_t ru_maxrss; compat_long_t ru_ixrss; compat_long_t ru_idrss; compat_long_t ru_isrss; compat_long_t ru_minflt; compat_long_t ru_majflt; compat_long_t ru_nswap; compat_long_t ru_inblock; compat_long_t ru_oublock; compat_long_t ru_msgsnd; compat_long_t ru_msgrcv; compat_long_t ru_nsignals; compat_long_t ru_nvcsw; compat_long_t ru_nivcsw; }; extern int put_compat_rusage(const struct rusage *, struct compat_rusage __user *); struct compat_siginfo; struct __compat_aio_sigset; struct compat_dirent { u32 d_ino; compat_off_t d_off; u16 d_reclen; char d_name[256]; }; struct compat_ustat { compat_daddr_t f_tfree; compat_ino_t f_tinode; char f_fname[6]; char f_fpack[6]; }; #define COMPAT_SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3) typedef struct compat_sigevent { compat_sigval_t sigev_value; compat_int_t sigev_signo; compat_int_t sigev_notify; union { compat_int_t _pad[COMPAT_SIGEV_PAD_SIZE]; compat_int_t _tid; struct { compat_uptr_t _function; compat_uptr_t _attribute; } _sigev_thread; } _sigev_un; } compat_sigevent_t; struct compat_ifmap { compat_ulong_t mem_start; compat_ulong_t mem_end; unsigned short base_addr; unsigned char irq; unsigned char dma; unsigned char port; }; struct compat_if_settings { unsigned int type; /* Type of physical device or protocol */ unsigned int size; /* Size of the data allocated by the caller */ compat_uptr_t ifs_ifsu; /* union of pointers */ }; struct compat_ifreq { union { char ifrn_name[IFNAMSIZ]; /* if name, e.g. "en0" */ } ifr_ifrn; union { struct sockaddr ifru_addr; struct sockaddr ifru_dstaddr; struct sockaddr ifru_broadaddr; struct sockaddr ifru_netmask; struct sockaddr ifru_hwaddr; short ifru_flags; compat_int_t ifru_ivalue; compat_int_t ifru_mtu; struct compat_ifmap ifru_map; char ifru_slave[IFNAMSIZ]; /* Just fits the size */ char ifru_newname[IFNAMSIZ]; compat_caddr_t ifru_data; struct compat_if_settings ifru_settings; } ifr_ifru; }; struct compat_ifconf { compat_int_t ifc_len; /* size of buffer */ compat_caddr_t ifcbuf; }; struct compat_robust_list { compat_uptr_t next; }; struct compat_robust_list_head { struct compat_robust_list list; compat_long_t futex_offset; compat_uptr_t list_op_pending; }; #ifdef CONFIG_COMPAT_OLD_SIGACTION struct compat_old_sigaction { compat_uptr_t sa_handler; compat_old_sigset_t sa_mask; compat_ulong_t sa_flags; compat_uptr_t sa_restorer; }; #endif struct compat_keyctl_kdf_params { compat_uptr_t hashname; compat_uptr_t otherinfo; __u32 otherinfolen; __u32 __spare[8]; }; struct compat_stat; struct compat_statfs; struct compat_statfs64; struct compat_old_linux_dirent; struct compat_linux_dirent; struct linux_dirent64; struct compat_msghdr; struct compat_mmsghdr; struct compat_sysinfo; struct compat_sysctl_args; struct compat_kexec_segment; struct compat_mq_attr; struct compat_msgbuf; void copy_siginfo_to_external32(struct compat_siginfo *to, const struct kernel_siginfo *from); int copy_siginfo_from_user32(kernel_siginfo_t *to, const struct compat_siginfo __user *from); int __copy_siginfo_to_user32(struct compat_siginfo __user *to, const kernel_siginfo_t *from); #ifndef copy_siginfo_to_user32 #define copy_siginfo_to_user32 __copy_siginfo_to_user32 #endif int get_compat_sigevent(struct sigevent *event, const struct compat_sigevent __user *u_event); extern int get_compat_sigset(sigset_t *set, const compat_sigset_t __user *compat); /* * Defined inline such that size can be compile time constant, which avoids * CONFIG_HARDENED_USERCOPY complaining about copies from task_struct */ static inline int put_compat_sigset(compat_sigset_t __user *compat, const sigset_t *set, unsigned int size) { /* size <= sizeof(compat_sigset_t) <= sizeof(sigset_t) */ #if defined(__BIG_ENDIAN) && defined(CONFIG_64BIT) compat_sigset_t v; switch (_NSIG_WORDS) { case 4: v.sig[7] = (set->sig[3] >> 32); v.sig[6] = set->sig[3]; fallthrough; case 3: v.sig[5] = (set->sig[2] >> 32); v.sig[4] = set->sig[2]; fallthrough; case 2: v.sig[3] = (set->sig[1] >> 32); v.sig[2] = set->sig[1]; fallthrough; case 1: v.sig[1] = (set->sig[0] >> 32); v.sig[0] = set->sig[0]; } return copy_to_user(compat, &v, size) ? -EFAULT : 0; #else return copy_to_user(compat, set, size) ? -EFAULT : 0; #endif } #ifdef CONFIG_CPU_BIG_ENDIAN #define unsafe_put_compat_sigset(compat, set, label) do { \ compat_sigset_t __user *__c = compat; \ const sigset_t *__s = set; \ \ switch (_NSIG_WORDS) { \ case 4: \ unsafe_put_user(__s->sig[3] >> 32, &__c->sig[7], label); \ unsafe_put_user(__s->sig[3], &__c->sig[6], label); \ fallthrough; \ case 3: \ unsafe_put_user(__s->sig[2] >> 32, &__c->sig[5], label); \ unsafe_put_user(__s->sig[2], &__c->sig[4], label); \ fallthrough; \ case 2: \ unsafe_put_user(__s->sig[1] >> 32, &__c->sig[3], label); \ unsafe_put_user(__s->sig[1], &__c->sig[2], label); \ fallthrough; \ case 1: \ unsafe_put_user(__s->sig[0] >> 32, &__c->sig[1], label); \ unsafe_put_user(__s->sig[0], &__c->sig[0], label); \ } \ } while (0) #define unsafe_get_compat_sigset(set, compat, label) do { \ const compat_sigset_t __user *__c = compat; \ compat_sigset_word hi, lo; \ sigset_t *__s = set; \ \ switch (_NSIG_WORDS) { \ case 4: \ unsafe_get_user(lo, &__c->sig[7], label); \ unsafe_get_user(hi, &__c->sig[6], label); \ __s->sig[3] = hi | (((long)lo) << 32); \ fallthrough; \ case 3: \ unsafe_get_user(lo, &__c->sig[5], label); \ unsafe_get_user(hi, &__c->sig[4], label); \ __s->sig[2] = hi | (((long)lo) << 32); \ fallthrough; \ case 2: \ unsafe_get_user(lo, &__c->sig[3], label); \ unsafe_get_user(hi, &__c->sig[2], label); \ __s->sig[1] = hi | (((long)lo) << 32); \ fallthrough; \ case 1: \ unsafe_get_user(lo, &__c->sig[1], label); \ unsafe_get_user(hi, &__c->sig[0], label); \ __s->sig[0] = hi | (((long)lo) << 32); \ } \ } while (0) #else #define unsafe_put_compat_sigset(compat, set, label) do { \ compat_sigset_t __user *__c = compat; \ const sigset_t *__s = set; \ \ unsafe_copy_to_user(__c, __s, sizeof(*__c), label); \ } while (0) #define unsafe_get_compat_sigset(set, compat, label) do { \ const compat_sigset_t __user *__c = compat; \ sigset_t *__s = set; \ \ unsafe_copy_from_user(__s, __c, sizeof(*__c), label); \ } while (0) #endif extern int compat_ptrace_request(struct task_struct *child, compat_long_t request, compat_ulong_t addr, compat_ulong_t data); extern long compat_arch_ptrace(struct task_struct *child, compat_long_t request, compat_ulong_t addr, compat_ulong_t data); struct epoll_event; /* fortunately, this one is fixed-layout */ int compat_restore_altstack(const compat_stack_t __user *uss); int __compat_save_altstack(compat_stack_t __user *, unsigned long); #define unsafe_compat_save_altstack(uss, sp, label) do { \ compat_stack_t __user *__uss = uss; \ struct task_struct *t = current; \ unsafe_put_user(ptr_to_compat((void __user *)t->sas_ss_sp), \ &__uss->ss_sp, label); \ unsafe_put_user(t->sas_ss_flags, &__uss->ss_flags, label); \ unsafe_put_user(t->sas_ss_size, &__uss->ss_size, label); \ } while (0); /* * These syscall function prototypes are kept in the same order as * include/uapi/asm-generic/unistd.h. Deprecated or obsolete system calls * go below. * * Please note that these prototypes here are only provided for information * purposes, for static analysis, and for linking from the syscall table. * These functions should not be called elsewhere from kernel code. * * As the syscall calling convention may be different from the default * for architectures overriding the syscall calling convention, do not * include the prototypes if CONFIG_ARCH_HAS_SYSCALL_WRAPPER is enabled. */ #ifndef CONFIG_ARCH_HAS_SYSCALL_WRAPPER asmlinkage long compat_sys_io_setup(unsigned nr_reqs, u32 __user *ctx32p); asmlinkage long compat_sys_io_submit(compat_aio_context_t ctx_id, int nr, u32 __user *iocb); asmlinkage long compat_sys_io_pgetevents(compat_aio_context_t ctx_id, compat_long_t min_nr, compat_long_t nr, struct io_event __user *events, struct old_timespec32 __user *timeout, const struct __compat_aio_sigset __user *usig); asmlinkage long compat_sys_io_pgetevents_time64(compat_aio_context_t ctx_id, compat_long_t min_nr, compat_long_t nr, struct io_event __user *events, struct __kernel_timespec __user *timeout, const struct __compat_aio_sigset __user *usig); /* fs/cookies.c */ asmlinkage long compat_sys_lookup_dcookie(u32, u32, char __user *, compat_size_t); /* fs/eventpoll.c */ asmlinkage long compat_sys_epoll_pwait(int epfd, struct epoll_event __user *events, int maxevents, int timeout, const compat_sigset_t __user *sigmask, compat_size_t sigsetsize); asmlinkage long compat_sys_epoll_pwait2(int epfd, struct epoll_event __user *events, int maxevents, const struct __kernel_timespec __user *timeout, const compat_sigset_t __user *sigmask, compat_size_t sigsetsize); /* fs/fcntl.c */ asmlinkage long compat_sys_fcntl(unsigned int fd, unsigned int cmd, compat_ulong_t arg); asmlinkage long compat_sys_fcntl64(unsigned int fd, unsigned int cmd, compat_ulong_t arg); /* fs/ioctl.c */ asmlinkage long compat_sys_ioctl(unsigned int fd, unsigned int cmd, compat_ulong_t arg); /* fs/open.c */ asmlinkage long compat_sys_statfs(const char __user *pathname, struct compat_statfs __user *buf); asmlinkage long compat_sys_statfs64(const char __user *pathname, compat_size_t sz, struct compat_statfs64 __user *buf); asmlinkage long compat_sys_fstatfs(unsigned int fd, struct compat_statfs __user *buf); asmlinkage long compat_sys_fstatfs64(unsigned int fd, compat_size_t sz, struct compat_statfs64 __user *buf); asmlinkage long compat_sys_truncate(const char __user *, compat_off_t); asmlinkage long compat_sys_ftruncate(unsigned int, compat_off_t); /* No generic prototype for truncate64, ftruncate64, fallocate */ asmlinkage long compat_sys_openat(int dfd, const char __user *filename, int flags, umode_t mode); /* fs/readdir.c */ asmlinkage long compat_sys_getdents(unsigned int fd, struct compat_linux_dirent __user *dirent, unsigned int count); /* fs/read_write.c */ asmlinkage long compat_sys_lseek(unsigned int, compat_off_t, unsigned int); /* No generic prototype for pread64 and pwrite64 */ asmlinkage ssize_t compat_sys_preadv(compat_ulong_t fd, const struct iovec __user *vec, compat_ulong_t vlen, u32 pos_low, u32 pos_high); asmlinkage ssize_t compat_sys_pwritev(compat_ulong_t fd, const struct iovec __user *vec, compat_ulong_t vlen, u32 pos_low, u32 pos_high); #ifdef __ARCH_WANT_COMPAT_SYS_PREADV64 asmlinkage long compat_sys_preadv64(unsigned long fd, const struct iovec __user *vec, unsigned long vlen, loff_t pos); #endif #ifdef __ARCH_WANT_COMPAT_SYS_PWRITEV64 asmlinkage long compat_sys_pwritev64(unsigned long fd, const struct iovec __user *vec, unsigned long vlen, loff_t pos); #endif /* fs/sendfile.c */ asmlinkage long compat_sys_sendfile(int out_fd, int in_fd, compat_off_t __user *offset, compat_size_t count); asmlinkage long compat_sys_sendfile64(int out_fd, int in_fd, compat_loff_t __user *offset, compat_size_t count); /* fs/select.c */ asmlinkage long compat_sys_pselect6_time32(int n, compat_ulong_t __user *inp, compat_ulong_t __user *outp, compat_ulong_t __user *exp, struct old_timespec32 __user *tsp, void __user *sig); asmlinkage long compat_sys_pselect6_time64(int n, compat_ulong_t __user *inp, compat_ulong_t __user *outp, compat_ulong_t __user *exp, struct __kernel_timespec __user *tsp, void __user *sig); asmlinkage long compat_sys_ppoll_time32(struct pollfd __user *ufds, unsigned int nfds, struct old_timespec32 __user *tsp, const compat_sigset_t __user *sigmask, compat_size_t sigsetsize); asmlinkage long compat_sys_ppoll_time64(struct pollfd __user *ufds, unsigned int nfds, struct __kernel_timespec __user *tsp, const compat_sigset_t __user *sigmask, compat_size_t sigsetsize); /* fs/signalfd.c */ asmlinkage long compat_sys_signalfd4(int ufd, const compat_sigset_t __user *sigmask, compat_size_t sigsetsize, int flags); /* fs/stat.c */ asmlinkage long compat_sys_newfstatat(unsigned int dfd, const char __user *filename, struct compat_stat __user *statbuf, int flag); asmlinkage long compat_sys_newfstat(unsigned int fd, struct compat_stat __user *statbuf); /* fs/sync.c: No generic prototype for sync_file_range and sync_file_range2 */ /* kernel/exit.c */ asmlinkage long compat_sys_waitid(int, compat_pid_t, struct compat_siginfo __user *, int, struct compat_rusage __user *); /* kernel/futex.c */ asmlinkage long compat_sys_set_robust_list(struct compat_robust_list_head __user *head, compat_size_t len); asmlinkage long compat_sys_get_robust_list(int pid, compat_uptr_t __user *head_ptr, compat_size_t __user *len_ptr); /* kernel/itimer.c */ asmlinkage long compat_sys_getitimer(int which, struct old_itimerval32 __user *it); asmlinkage long compat_sys_setitimer(int which, struct old_itimerval32 __user *in, struct old_itimerval32 __user *out); /* kernel/kexec.c */ asmlinkage long compat_sys_kexec_load(compat_ulong_t entry, compat_ulong_t nr_segments, struct compat_kexec_segment __user *, compat_ulong_t flags); /* kernel/posix-timers.c */ asmlinkage long compat_sys_timer_create(clockid_t which_clock, struct compat_sigevent __user *timer_event_spec, timer_t __user *created_timer_id); /* kernel/ptrace.c */ asmlinkage long compat_sys_ptrace(compat_long_t request, compat_long_t pid, compat_long_t addr, compat_long_t data); /* kernel/sched/core.c */ asmlinkage long compat_sys_sched_setaffinity(compat_pid_t pid, unsigned int len, compat_ulong_t __user *user_mask_ptr); asmlinkage long compat_sys_sched_getaffinity(compat_pid_t pid, unsigned int len, compat_ulong_t __user *user_mask_ptr); /* kernel/signal.c */ asmlinkage long compat_sys_sigaltstack(const compat_stack_t __user *uss_ptr, compat_stack_t __user *uoss_ptr); asmlinkage long compat_sys_rt_sigsuspend(compat_sigset_t __user *unewset, compat_size_t sigsetsize); #ifndef CONFIG_ODD_RT_SIGACTION asmlinkage long compat_sys_rt_sigaction(int, const struct compat_sigaction __user *, struct compat_sigaction __user *, compat_size_t); #endif asmlinkage long compat_sys_rt_sigprocmask(int how, compat_sigset_t __user *set, compat_sigset_t __user *oset, compat_size_t sigsetsize); asmlinkage long compat_sys_rt_sigpending(compat_sigset_t __user *uset, compat_size_t sigsetsize); asmlinkage long compat_sys_rt_sigtimedwait_time32(compat_sigset_t __user *uthese, struct compat_siginfo __user *uinfo, struct old_timespec32 __user *uts, compat_size_t sigsetsize); asmlinkage long compat_sys_rt_sigtimedwait_time64(compat_sigset_t __user *uthese, struct compat_siginfo __user *uinfo, struct __kernel_timespec __user *uts, compat_size_t sigsetsize); asmlinkage long compat_sys_rt_sigqueueinfo(compat_pid_t pid, int sig, struct compat_siginfo __user *uinfo); /* No generic prototype for rt_sigreturn */ /* kernel/sys.c */ asmlinkage long compat_sys_times(struct compat_tms __user *tbuf); asmlinkage long compat_sys_getrlimit(unsigned int resource, struct compat_rlimit __user *rlim); asmlinkage long compat_sys_setrlimit(unsigned int resource, struct compat_rlimit __user *rlim); asmlinkage long compat_sys_getrusage(int who, struct compat_rusage __user *ru); /* kernel/time.c */ asmlinkage long compat_sys_gettimeofday(struct old_timeval32 __user *tv, struct timezone __user *tz); asmlinkage long compat_sys_settimeofday(struct old_timeval32 __user *tv, struct timezone __user *tz); /* kernel/timer.c */ asmlinkage long compat_sys_sysinfo(struct compat_sysinfo __user *info); /* ipc/mqueue.c */ asmlinkage long compat_sys_mq_open(const char __user *u_name, int oflag, compat_mode_t mode, struct compat_mq_attr __user *u_attr); asmlinkage long compat_sys_mq_notify(mqd_t mqdes, const struct compat_sigevent __user *u_notification); asmlinkage long compat_sys_mq_getsetattr(mqd_t mqdes, const struct compat_mq_attr __user *u_mqstat, struct compat_mq_attr __user *u_omqstat); /* ipc/msg.c */ asmlinkage long compat_sys_msgctl(int first, int second, void __user *uptr); asmlinkage long compat_sys_msgrcv(int msqid, compat_uptr_t msgp, compat_ssize_t msgsz, compat_long_t msgtyp, int msgflg); asmlinkage long compat_sys_msgsnd(int msqid, compat_uptr_t msgp, compat_ssize_t msgsz, int msgflg); /* ipc/sem.c */ asmlinkage long compat_sys_semctl(int semid, int semnum, int cmd, int arg); /* ipc/shm.c */ asmlinkage long compat_sys_shmctl(int first, int second, void __user *uptr); asmlinkage long compat_sys_shmat(int shmid, compat_uptr_t shmaddr, int shmflg); /* net/socket.c */ asmlinkage long compat_sys_recvfrom(int fd, void __user *buf, compat_size_t len, unsigned flags, struct sockaddr __user *addr, int __user *addrlen); asmlinkage long compat_sys_sendmsg(int fd, struct compat_msghdr __user *msg, unsigned flags); asmlinkage long compat_sys_recvmsg(int fd, struct compat_msghdr __user *msg, unsigned int flags); /* mm/filemap.c: No generic prototype for readahead */ /* security/keys/keyctl.c */ asmlinkage long compat_sys_keyctl(u32 option, u32 arg2, u32 arg3, u32 arg4, u32 arg5); /* arch/example/kernel/sys_example.c */ asmlinkage long compat_sys_execve(const char __user *filename, const compat_uptr_t __user *argv, const compat_uptr_t __user *envp); /* mm/fadvise.c: No generic prototype for fadvise64_64 */ /* mm/, CONFIG_MMU only */ asmlinkage long compat_sys_rt_tgsigqueueinfo(compat_pid_t tgid, compat_pid_t pid, int sig, struct compat_siginfo __user *uinfo); asmlinkage long compat_sys_recvmmsg_time64(int fd, struct compat_mmsghdr __user *mmsg, unsigned vlen, unsigned int flags, struct __kernel_timespec __user *timeout); asmlinkage long compat_sys_recvmmsg_time32(int fd, struct compat_mmsghdr __user *mmsg, unsigned vlen, unsigned int flags, struct old_timespec32 __user *timeout); asmlinkage long compat_sys_wait4(compat_pid_t pid, compat_uint_t __user *stat_addr, int options, struct compat_rusage __user *ru); asmlinkage long compat_sys_fanotify_mark(int, unsigned int, __u32, __u32, int, const char __user *); asmlinkage long compat_sys_open_by_handle_at(int mountdirfd, struct file_handle __user *handle, int flags); asmlinkage long compat_sys_sendmmsg(int fd, struct compat_mmsghdr __user *mmsg, unsigned vlen, unsigned int flags); asmlinkage long compat_sys_execveat(int dfd, const char __user *filename, const compat_uptr_t __user *argv, const compat_uptr_t __user *envp, int flags); asmlinkage ssize_t compat_sys_preadv2(compat_ulong_t fd, const struct iovec __user *vec, compat_ulong_t vlen, u32 pos_low, u32 pos_high, rwf_t flags); asmlinkage ssize_t compat_sys_pwritev2(compat_ulong_t fd, const struct iovec __user *vec, compat_ulong_t vlen, u32 pos_low, u32 pos_high, rwf_t flags); #ifdef __ARCH_WANT_COMPAT_SYS_PREADV64V2 asmlinkage long compat_sys_preadv64v2(unsigned long fd, const struct iovec __user *vec, unsigned long vlen, loff_t pos, rwf_t flags); #endif #ifdef __ARCH_WANT_COMPAT_SYS_PWRITEV64V2 asmlinkage long compat_sys_pwritev64v2(unsigned long fd, const struct iovec __user *vec, unsigned long vlen, loff_t pos, rwf_t flags); #endif /* * Deprecated system calls which are still defined in * include/uapi/asm-generic/unistd.h and wanted by >= 1 arch */ /* __ARCH_WANT_SYSCALL_NO_AT */ asmlinkage long compat_sys_open(const char __user *filename, int flags, umode_t mode); /* __ARCH_WANT_SYSCALL_NO_FLAGS */ asmlinkage long compat_sys_signalfd(int ufd, const compat_sigset_t __user *sigmask, compat_size_t sigsetsize); /* __ARCH_WANT_SYSCALL_OFF_T */ asmlinkage long compat_sys_newstat(const char __user *filename, struct compat_stat __user *statbuf); asmlinkage long compat_sys_newlstat(const char __user *filename, struct compat_stat __user *statbuf); /* __ARCH_WANT_SYSCALL_DEPRECATED */ asmlinkage long compat_sys_select(int n, compat_ulong_t __user *inp, compat_ulong_t __user *outp, compat_ulong_t __user *exp, struct old_timeval32 __user *tvp); asmlinkage long compat_sys_ustat(unsigned dev, struct compat_ustat __user *u32); asmlinkage long compat_sys_recv(int fd, void __user *buf, compat_size_t len, unsigned flags); /* obsolete: fs/readdir.c */ asmlinkage long compat_sys_old_readdir(unsigned int fd, struct compat_old_linux_dirent __user *, unsigned int count); /* obsolete: fs/select.c */ asmlinkage long compat_sys_old_select(struct compat_sel_arg_struct __user *arg); /* obsolete: ipc */ asmlinkage long compat_sys_ipc(u32, int, int, u32, compat_uptr_t, u32); /* obsolete: kernel/signal.c */ #ifdef __ARCH_WANT_SYS_SIGPENDING asmlinkage long compat_sys_sigpending(compat_old_sigset_t __user *set); #endif #ifdef __ARCH_WANT_SYS_SIGPROCMASK asmlinkage long compat_sys_sigprocmask(int how, compat_old_sigset_t __user *nset, compat_old_sigset_t __user *oset); #endif #ifdef CONFIG_COMPAT_OLD_SIGACTION asmlinkage long compat_sys_sigaction(int sig, const struct compat_old_sigaction __user *act, struct compat_old_sigaction __user *oact); #endif /* obsolete: net/socket.c */ asmlinkage long compat_sys_socketcall(int call, u32 __user *args); #endif /* CONFIG_ARCH_HAS_SYSCALL_WRAPPER */ /** * ns_to_old_timeval32 - Compat version of ns_to_timeval * @nsec: the nanoseconds value to be converted * * Returns the old_timeval32 representation of the nsec parameter. */ static inline struct old_timeval32 ns_to_old_timeval32(s64 nsec) { struct __kernel_old_timeval tv; struct old_timeval32 ctv; tv = ns_to_kernel_old_timeval(nsec); ctv.tv_sec = tv.tv_sec; ctv.tv_usec = tv.tv_usec; return ctv; } /* * Kernel code should not call compat syscalls (i.e., compat_sys_xyzyyz()) * directly. Instead, use one of the functions which work equivalently, such * as the kcompat_sys_xyzyyz() functions prototyped below. */ int kcompat_sys_statfs64(const char __user * pathname, compat_size_t sz, struct compat_statfs64 __user * buf); int kcompat_sys_fstatfs64(unsigned int fd, compat_size_t sz, struct compat_statfs64 __user * buf); #ifdef CONFIG_COMPAT /* * For most but not all architectures, "am I in a compat syscall?" and * "am I a compat task?" are the same question. For architectures on which * they aren't the same question, arch code can override in_compat_syscall. */ #ifndef in_compat_syscall static inline bool in_compat_syscall(void) { return is_compat_task(); } #endif #else /* !CONFIG_COMPAT */ #define is_compat_task() (0) /* Ensure no one redefines in_compat_syscall() under !CONFIG_COMPAT */ #define in_compat_syscall in_compat_syscall static inline bool in_compat_syscall(void) { return false; } #endif /* CONFIG_COMPAT */ #define BITS_PER_COMPAT_LONG (8*sizeof(compat_long_t)) #define BITS_TO_COMPAT_LONGS(bits) DIV_ROUND_UP(bits, BITS_PER_COMPAT_LONG) long compat_get_bitmap(unsigned long *mask, const compat_ulong_t __user *umask, unsigned long bitmap_size); long compat_put_bitmap(compat_ulong_t __user *umask, unsigned long *mask, unsigned long bitmap_size); /* * Some legacy ABIs like the i386 one use less than natural alignment for 64-bit * types, and will need special compat treatment for that. Most architectures * don't need that special handling even for compat syscalls. */ #ifndef compat_need_64bit_alignment_fixup #define compat_need_64bit_alignment_fixup() false #endif /* * A pointer passed in from user mode. This should not * be used for syscall parameters, just declare them * as pointers because the syscall entry code will have * appropriately converted them already. */ #ifndef compat_ptr static inline void __user *compat_ptr(compat_uptr_t uptr) { return (void __user *)(unsigned long)uptr; } #endif static inline compat_uptr_t ptr_to_compat(void __user *uptr) { return (u32)(unsigned long)uptr; } #endif /* _LINUX_COMPAT_H */ PK ! ىI�M M ratelimit_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RATELIMIT_TYPES_H #define _LINUX_RATELIMIT_TYPES_H #include <linux/bits.h> #include <linux/param.h> #include <linux/spinlock_types.h> #define DEFAULT_RATELIMIT_INTERVAL (5 * HZ) #define DEFAULT_RATELIMIT_BURST 10 /* issue num suppressed message on exit */ #define RATELIMIT_MSG_ON_RELEASE BIT(0) struct ratelimit_state { raw_spinlock_t lock; /* protect the state */ int interval; int burst; int printed; int missed; unsigned long begin; unsigned long flags; }; #define RATELIMIT_STATE_INIT_FLAGS(name, interval_init, burst_init, flags_init) { \ .lock = __RAW_SPIN_LOCK_UNLOCKED(name.lock), \ .interval = interval_init, \ .burst = burst_init, \ .flags = flags_init, \ } #define RATELIMIT_STATE_INIT(name, interval_init, burst_init) \ RATELIMIT_STATE_INIT_FLAGS(name, interval_init, burst_init, 0) #define RATELIMIT_STATE_INIT_DISABLED \ RATELIMIT_STATE_INIT(ratelimit_state, 0, DEFAULT_RATELIMIT_BURST) #define DEFINE_RATELIMIT_STATE(name, interval_init, burst_init) \ \ struct ratelimit_state name = \ RATELIMIT_STATE_INIT(name, interval_init, burst_init) \ extern int ___ratelimit(struct ratelimit_state *rs, const char *func); #define __ratelimit(state) ___ratelimit(state, __func__) #endif /* _LINUX_RATELIMIT_TYPES_H */ PK ! �'��i i stackprotector.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_STACKPROTECTOR_H #define _LINUX_STACKPROTECTOR_H 1 #include <linux/compiler.h> #include <linux/sched.h> #include <linux/random.h> #if defined(CONFIG_STACKPROTECTOR) || defined(CONFIG_ARM64_PTR_AUTH) # include <asm/stackprotector.h> #else static inline void boot_init_stack_canary(void) { } #endif #endif PK ! ��EG G wireless.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This file define a set of standard wireless extensions * * Version : 22 16.3.07 * * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com> * Copyright (c) 1997-2007 Jean Tourrilhes, All Rights Reserved. */ #ifndef _LINUX_WIRELESS_H #define _LINUX_WIRELESS_H #include <uapi/linux/wireless.h> #ifdef CONFIG_COMPAT #include <linux/compat.h> struct compat_iw_point { compat_caddr_t pointer; __u16 length; __u16 flags; }; #endif #ifdef CONFIG_COMPAT struct __compat_iw_event { __u16 len; /* Real length of this stuff */ __u16 cmd; /* Wireless IOCTL */ union { compat_caddr_t pointer; /* we need ptr_bytes to make memcpy() run-time destination * buffer bounds checking happy, nothing special */ DECLARE_FLEX_ARRAY(__u8, ptr_bytes); }; }; #define IW_EV_COMPAT_LCP_LEN offsetof(struct __compat_iw_event, pointer) #define IW_EV_COMPAT_POINT_OFF offsetof(struct compat_iw_point, length) /* Size of the various events for compat */ #define IW_EV_COMPAT_CHAR_LEN (IW_EV_COMPAT_LCP_LEN + IFNAMSIZ) #define IW_EV_COMPAT_UINT_LEN (IW_EV_COMPAT_LCP_LEN + sizeof(__u32)) #define IW_EV_COMPAT_FREQ_LEN (IW_EV_COMPAT_LCP_LEN + sizeof(struct iw_freq)) #define IW_EV_COMPAT_PARAM_LEN (IW_EV_COMPAT_LCP_LEN + sizeof(struct iw_param)) #define IW_EV_COMPAT_ADDR_LEN (IW_EV_COMPAT_LCP_LEN + sizeof(struct sockaddr)) #define IW_EV_COMPAT_QUAL_LEN (IW_EV_COMPAT_LCP_LEN + sizeof(struct iw_quality)) #define IW_EV_COMPAT_POINT_LEN \ (IW_EV_COMPAT_LCP_LEN + sizeof(struct compat_iw_point) - \ IW_EV_COMPAT_POINT_OFF) #endif #endif /* _LINUX_WIRELESS_H */ PK ! Y0_�_ _ kstrtox.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KSTRTOX_H #define _LINUX_KSTRTOX_H #include <linux/compiler.h> #include <linux/types.h> /* Internal, do not use. */ int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res); int __must_check _kstrtol(const char *s, unsigned int base, long *res); int __must_check kstrtoull(const char *s, unsigned int base, unsigned long long *res); int __must_check kstrtoll(const char *s, unsigned int base, long long *res); /** * kstrtoul - convert a string to an unsigned long * @s: The start of the string. The string must be null-terminated, and may also * include a single newline before its terminating null. The first character * may also be a plus sign, but not a minus sign. * @base: The number base to use. The maximum supported base is 16. If base is * given as 0, then the base of the string is automatically detected with the * conventional semantics - If it begins with 0x the number will be parsed as a * hexadecimal (case insensitive), if it otherwise begins with 0, it will be * parsed as an octal number. Otherwise it will be parsed as a decimal. * @res: Where to write the result of the conversion on success. * * Returns 0 on success, -ERANGE on overflow and -EINVAL on parsing error. * Preferred over simple_strtoul(). Return code must be checked. */ static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res) { /* * We want to shortcut function call, but * __builtin_types_compatible_p(unsigned long, unsigned long long) = 0. */ if (sizeof(unsigned long) == sizeof(unsigned long long) && __alignof__(unsigned long) == __alignof__(unsigned long long)) return kstrtoull(s, base, (unsigned long long *)res); else return _kstrtoul(s, base, res); } /** * kstrtol - convert a string to a long * @s: The start of the string. The string must be null-terminated, and may also * include a single newline before its terminating null. The first character * may also be a plus sign or a minus sign. * @base: The number base to use. The maximum supported base is 16. If base is * given as 0, then the base of the string is automatically detected with the * conventional semantics - If it begins with 0x the number will be parsed as a * hexadecimal (case insensitive), if it otherwise begins with 0, it will be * parsed as an octal number. Otherwise it will be parsed as a decimal. * @res: Where to write the result of the conversion on success. * * Returns 0 on success, -ERANGE on overflow and -EINVAL on parsing error. * Preferred over simple_strtol(). Return code must be checked. */ static inline int __must_check kstrtol(const char *s, unsigned int base, long *res) { /* * We want to shortcut function call, but * __builtin_types_compatible_p(long, long long) = 0. */ if (sizeof(long) == sizeof(long long) && __alignof__(long) == __alignof__(long long)) return kstrtoll(s, base, (long long *)res); else return _kstrtol(s, base, res); } int __must_check kstrtouint(const char *s, unsigned int base, unsigned int *res); int __must_check kstrtoint(const char *s, unsigned int base, int *res); static inline int __must_check kstrtou64(const char *s, unsigned int base, u64 *res) { return kstrtoull(s, base, res); } static inline int __must_check kstrtos64(const char *s, unsigned int base, s64 *res) { return kstrtoll(s, base, res); } static inline int __must_check kstrtou32(const char *s, unsigned int base, u32 *res) { return kstrtouint(s, base, res); } static inline int __must_check kstrtos32(const char *s, unsigned int base, s32 *res) { return kstrtoint(s, base, res); } int __must_check kstrtou16(const char *s, unsigned int base, u16 *res); int __must_check kstrtos16(const char *s, unsigned int base, s16 *res); int __must_check kstrtou8(const char *s, unsigned int base, u8 *res); int __must_check kstrtos8(const char *s, unsigned int base, s8 *res); int __must_check kstrtobool(const char *s, bool *res); int __must_check kstrtoull_from_user(const char __user *s, size_t count, unsigned int base, unsigned long long *res); int __must_check kstrtoll_from_user(const char __user *s, size_t count, unsigned int base, long long *res); int __must_check kstrtoul_from_user(const char __user *s, size_t count, unsigned int base, unsigned long *res); int __must_check kstrtol_from_user(const char __user *s, size_t count, unsigned int base, long *res); int __must_check kstrtouint_from_user(const char __user *s, size_t count, unsigned int base, unsigned int *res); int __must_check kstrtoint_from_user(const char __user *s, size_t count, unsigned int base, int *res); int __must_check kstrtou16_from_user(const char __user *s, size_t count, unsigned int base, u16 *res); int __must_check kstrtos16_from_user(const char __user *s, size_t count, unsigned int base, s16 *res); int __must_check kstrtou8_from_user(const char __user *s, size_t count, unsigned int base, u8 *res); int __must_check kstrtos8_from_user(const char __user *s, size_t count, unsigned int base, s8 *res); int __must_check kstrtobool_from_user(const char __user *s, size_t count, bool *res); static inline int __must_check kstrtou64_from_user(const char __user *s, size_t count, unsigned int base, u64 *res) { return kstrtoull_from_user(s, count, base, res); } static inline int __must_check kstrtos64_from_user(const char __user *s, size_t count, unsigned int base, s64 *res) { return kstrtoll_from_user(s, count, base, res); } static inline int __must_check kstrtou32_from_user(const char __user *s, size_t count, unsigned int base, u32 *res) { return kstrtouint_from_user(s, count, base, res); } static inline int __must_check kstrtos32_from_user(const char __user *s, size_t count, unsigned int base, s32 *res) { return kstrtoint_from_user(s, count, base, res); } /* * Use kstrto<foo> instead. * * NOTE: simple_strto<foo> does not check for the range overflow and, * depending on the input, may give interesting results. * * Use these functions if and only if you cannot use kstrto<foo>, because * the conversion ends on the first non-digit character, which may be far * beyond the supported range. It might be useful to parse the strings like * 10x50 or 12:21 without altering original string or temporary buffer in use. * Keep in mind above caveat. */ extern unsigned long simple_strtoul(const char *,char **,unsigned int); extern long simple_strtol(const char *,char **,unsigned int); extern unsigned long long simple_strtoull(const char *,char **,unsigned int); extern long long simple_strtoll(const char *,char **,unsigned int); static inline int strtobool(const char *s, bool *res) { return kstrtobool(s, res); } #endif /* _LINUX_KSTRTOX_H */ PK ! =2�a� � serial_bcm63xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SERIAL_BCM63XX_H #define _LINUX_SERIAL_BCM63XX_H /* UART Control Register */ #define UART_CTL_REG 0x0 #define UART_CTL_RXTMOUTCNT_SHIFT 0 #define UART_CTL_RXTMOUTCNT_MASK (0x1f << UART_CTL_RXTMOUTCNT_SHIFT) #define UART_CTL_RSTTXDN_SHIFT 5 #define UART_CTL_RSTTXDN_MASK (1 << UART_CTL_RSTTXDN_SHIFT) #define UART_CTL_RSTRXFIFO_SHIFT 6 #define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT) #define UART_CTL_RSTTXFIFO_SHIFT 7 #define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT) #define UART_CTL_STOPBITS_SHIFT 8 #define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT) #define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT) #define UART_CTL_STOPBITS_2 (0xf << UART_CTL_STOPBITS_SHIFT) #define UART_CTL_BITSPERSYM_SHIFT 12 #define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT) #define UART_CTL_XMITBRK_SHIFT 14 #define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT) #define UART_CTL_RSVD_SHIFT 15 #define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT) #define UART_CTL_RXPAREVEN_SHIFT 16 #define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT) #define UART_CTL_RXPAREN_SHIFT 17 #define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT) #define UART_CTL_TXPAREVEN_SHIFT 18 #define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT) #define UART_CTL_TXPAREN_SHIFT 18 #define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT) #define UART_CTL_LOOPBACK_SHIFT 20 #define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT) #define UART_CTL_RXEN_SHIFT 21 #define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT) #define UART_CTL_TXEN_SHIFT 22 #define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT) #define UART_CTL_BRGEN_SHIFT 23 #define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT) /* UART Baudword register */ #define UART_BAUD_REG 0x4 /* UART Misc Control register */ #define UART_MCTL_REG 0x8 #define UART_MCTL_DTR_SHIFT 0 #define UART_MCTL_DTR_MASK (1 << UART_MCTL_DTR_SHIFT) #define UART_MCTL_RTS_SHIFT 1 #define UART_MCTL_RTS_MASK (1 << UART_MCTL_RTS_SHIFT) #define UART_MCTL_RXFIFOTHRESH_SHIFT 8 #define UART_MCTL_RXFIFOTHRESH_MASK (0xf << UART_MCTL_RXFIFOTHRESH_SHIFT) #define UART_MCTL_TXFIFOTHRESH_SHIFT 12 #define UART_MCTL_TXFIFOTHRESH_MASK (0xf << UART_MCTL_TXFIFOTHRESH_SHIFT) #define UART_MCTL_RXFIFOFILL_SHIFT 16 #define UART_MCTL_RXFIFOFILL_MASK (0x1f << UART_MCTL_RXFIFOFILL_SHIFT) #define UART_MCTL_TXFIFOFILL_SHIFT 24 #define UART_MCTL_TXFIFOFILL_MASK (0x1f << UART_MCTL_TXFIFOFILL_SHIFT) /* UART External Input Configuration register */ #define UART_EXTINP_REG 0xc #define UART_EXTINP_RI_SHIFT 0 #define UART_EXTINP_RI_MASK (1 << UART_EXTINP_RI_SHIFT) #define UART_EXTINP_CTS_SHIFT 1 #define UART_EXTINP_CTS_MASK (1 << UART_EXTINP_CTS_SHIFT) #define UART_EXTINP_DCD_SHIFT 2 #define UART_EXTINP_DCD_MASK (1 << UART_EXTINP_DCD_SHIFT) #define UART_EXTINP_DSR_SHIFT 3 #define UART_EXTINP_DSR_MASK (1 << UART_EXTINP_DSR_SHIFT) #define UART_EXTINP_IRSTAT(x) (1 << (x + 4)) #define UART_EXTINP_IRMASK(x) (1 << (x + 8)) #define UART_EXTINP_IR_RI 0 #define UART_EXTINP_IR_CTS 1 #define UART_EXTINP_IR_DCD 2 #define UART_EXTINP_IR_DSR 3 #define UART_EXTINP_RI_NOSENSE_SHIFT 16 #define UART_EXTINP_RI_NOSENSE_MASK (1 << UART_EXTINP_RI_NOSENSE_SHIFT) #define UART_EXTINP_CTS_NOSENSE_SHIFT 17 #define UART_EXTINP_CTS_NOSENSE_MASK (1 << UART_EXTINP_CTS_NOSENSE_SHIFT) #define UART_EXTINP_DCD_NOSENSE_SHIFT 18 #define UART_EXTINP_DCD_NOSENSE_MASK (1 << UART_EXTINP_DCD_NOSENSE_SHIFT) #define UART_EXTINP_DSR_NOSENSE_SHIFT 19 #define UART_EXTINP_DSR_NOSENSE_MASK (1 << UART_EXTINP_DSR_NOSENSE_SHIFT) /* UART Interrupt register */ #define UART_IR_REG 0x10 #define UART_IR_MASK(x) (1 << (x + 16)) #define UART_IR_STAT(x) (1 << (x)) #define UART_IR_EXTIP 0 #define UART_IR_TXUNDER 1 #define UART_IR_TXOVER 2 #define UART_IR_TXTRESH 3 #define UART_IR_TXRDLATCH 4 #define UART_IR_TXEMPTY 5 #define UART_IR_RXUNDER 6 #define UART_IR_RXOVER 7 #define UART_IR_RXTIMEOUT 8 #define UART_IR_RXFULL 9 #define UART_IR_RXTHRESH 10 #define UART_IR_RXNOTEMPTY 11 #define UART_IR_RXFRAMEERR 12 #define UART_IR_RXPARERR 13 #define UART_IR_RXBRK 14 #define UART_IR_TXDONE 15 /* UART Fifo register */ #define UART_FIFO_REG 0x14 #define UART_FIFO_VALID_SHIFT 0 #define UART_FIFO_VALID_MASK 0xff #define UART_FIFO_FRAMEERR_SHIFT 8 #define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT) #define UART_FIFO_PARERR_SHIFT 9 #define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT) #define UART_FIFO_BRKDET_SHIFT 10 #define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT) #define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \ UART_FIFO_PARERR_MASK | \ UART_FIFO_BRKDET_MASK) #endif /* _LINUX_SERIAL_BCM63XX_H */ PK ! � Җ� � math64.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MATH64_H #define _LINUX_MATH64_H #include <linux/types.h> #include <linux/math.h> #include <vdso/math64.h> #include <asm/div64.h> #if BITS_PER_LONG == 64 #define div64_long(x, y) div64_s64((x), (y)) #define div64_ul(x, y) div64_u64((x), (y)) /** * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder * @dividend: unsigned 64bit dividend * @divisor: unsigned 32bit divisor * @remainder: pointer to unsigned 32bit remainder * * Return: sets ``*remainder``, then returns dividend / divisor * * This is commonly provided by 32bit archs to provide an optimized 64bit * divide. */ static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder) { *remainder = dividend % divisor; return dividend / divisor; } /* * div_s64_rem - signed 64bit divide with 32bit divisor with remainder * @dividend: signed 64bit dividend * @divisor: signed 32bit divisor * @remainder: pointer to signed 32bit remainder * * Return: sets ``*remainder``, then returns dividend / divisor */ static inline s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder) { *remainder = dividend % divisor; return dividend / divisor; } /* * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder * @dividend: unsigned 64bit dividend * @divisor: unsigned 64bit divisor * @remainder: pointer to unsigned 64bit remainder * * Return: sets ``*remainder``, then returns dividend / divisor */ static inline u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder) { *remainder = dividend % divisor; return dividend / divisor; } /* * div64_u64 - unsigned 64bit divide with 64bit divisor * @dividend: unsigned 64bit dividend * @divisor: unsigned 64bit divisor * * Return: dividend / divisor */ static inline u64 div64_u64(u64 dividend, u64 divisor) { return dividend / divisor; } /* * div64_s64 - signed 64bit divide with 64bit divisor * @dividend: signed 64bit dividend * @divisor: signed 64bit divisor * * Return: dividend / divisor */ static inline s64 div64_s64(s64 dividend, s64 divisor) { return dividend / divisor; } #elif BITS_PER_LONG == 32 #define div64_long(x, y) div_s64((x), (y)) #define div64_ul(x, y) div_u64((x), (y)) #ifndef div_u64_rem static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder) { *remainder = do_div(dividend, divisor); return dividend; } #endif #ifndef div_s64_rem extern s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder); #endif #ifndef div64_u64_rem extern u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder); #endif #ifndef div64_u64 extern u64 div64_u64(u64 dividend, u64 divisor); #endif #ifndef div64_s64 extern s64 div64_s64(s64 dividend, s64 divisor); #endif #endif /* BITS_PER_LONG */ /** * div_u64 - unsigned 64bit divide with 32bit divisor * @dividend: unsigned 64bit dividend * @divisor: unsigned 32bit divisor * * This is the most common 64bit divide and should be used if possible, * as many 32bit archs can optimize this variant better than a full 64bit * divide. */ #ifndef div_u64 static inline u64 div_u64(u64 dividend, u32 divisor) { u32 remainder; return div_u64_rem(dividend, divisor, &remainder); } #endif /** * div_s64 - signed 64bit divide with 32bit divisor * @dividend: signed 64bit dividend * @divisor: signed 32bit divisor */ #ifndef div_s64 static inline s64 div_s64(s64 dividend, s32 divisor) { s32 remainder; return div_s64_rem(dividend, divisor, &remainder); } #endif u32 iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remainder); #ifndef mul_u32_u32 /* * Many a GCC version messes this up and generates a 64x64 mult :-( */ static inline u64 mul_u32_u32(u32 a, u32 b) { return (u64)a * b; } #endif #if defined(CONFIG_ARCH_SUPPORTS_INT128) && defined(__SIZEOF_INT128__) #ifndef mul_u64_u32_shr static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) { return (u64)(((unsigned __int128)a * mul) >> shift); } #endif /* mul_u64_u32_shr */ #ifndef mul_u64_u64_shr static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) { return (u64)(((unsigned __int128)a * mul) >> shift); } #endif /* mul_u64_u64_shr */ #else #ifndef mul_u64_u32_shr static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) { u32 ah, al; u64 ret; al = a; ah = a >> 32; ret = mul_u32_u32(al, mul) >> shift; if (ah) ret += mul_u32_u32(ah, mul) << (32 - shift); return ret; } #endif /* mul_u64_u32_shr */ #ifndef mul_u64_u64_shr static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift) { union { u64 ll; struct { #ifdef __BIG_ENDIAN u32 high, low; #else u32 low, high; #endif } l; } rl, rm, rn, rh, a0, b0; u64 c; a0.ll = a; b0.ll = b; rl.ll = mul_u32_u32(a0.l.low, b0.l.low); rm.ll = mul_u32_u32(a0.l.low, b0.l.high); rn.ll = mul_u32_u32(a0.l.high, b0.l.low); rh.ll = mul_u32_u32(a0.l.high, b0.l.high); /* * Each of these lines computes a 64-bit intermediate result into "c", * starting at bits 32-95. The low 32-bits go into the result of the * multiplication, the high 32-bits are carried into the next step. */ rl.l.high = c = (u64)rl.l.high + rm.l.low + rn.l.low; rh.l.low = c = (c >> 32) + rm.l.high + rn.l.high + rh.l.low; rh.l.high = (c >> 32) + rh.l.high; /* * The 128-bit result of the multiplication is in rl.ll and rh.ll, * shift it right and throw away the high part of the result. */ if (shift == 0) return rl.ll; if (shift < 64) return (rl.ll >> shift) | (rh.ll << (64 - shift)); return rh.ll >> (shift & 63); } #endif /* mul_u64_u64_shr */ #endif #ifndef mul_s64_u64_shr static inline u64 mul_s64_u64_shr(s64 a, u64 b, unsigned int shift) { u64 ret; /* * Extract the sign before the multiplication and put it back * afterwards if needed. */ ret = mul_u64_u64_shr(abs(a), b, shift); if (a < 0) ret = -((s64) ret); return ret; } #endif /* mul_s64_u64_shr */ #ifndef mul_u64_u32_div static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) { union { u64 ll; struct { #ifdef __BIG_ENDIAN u32 high, low; #else u32 low, high; #endif } l; } u, rl, rh; u.ll = a; rl.ll = mul_u32_u32(u.l.low, mul); rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; /* Bits 32-63 of the result will be in rh.l.low. */ rl.l.high = do_div(rh.ll, divisor); /* Bits 0-31 of the result will be in rl.l.low. */ do_div(rl.ll, divisor); rl.l.high = rh.l.low; return rl.ll; } #endif /* mul_u64_u32_div */ u64 mul_u64_u64_div_u64(u64 a, u64 mul, u64 div); #define DIV64_U64_ROUND_UP(ll, d) \ ({ u64 _tmp = (d); div64_u64((ll) + _tmp - 1, _tmp); }) /** * DIV64_U64_ROUND_CLOSEST - unsigned 64bit divide with 64bit divisor rounded to nearest integer * @dividend: unsigned 64bit dividend * @divisor: unsigned 64bit divisor * * Divide unsigned 64bit dividend by unsigned 64bit divisor * and round to closest integer. * * Return: dividend / divisor rounded to nearest integer */ #define DIV64_U64_ROUND_CLOSEST(dividend, divisor) \ ({ u64 _tmp = (divisor); div64_u64((dividend) + _tmp / 2, _tmp); }) /* * DIV_S64_ROUND_CLOSEST - signed 64bit divide with 32bit divisor rounded to nearest integer * @dividend: signed 64bit dividend * @divisor: signed 32bit divisor * * Divide signed 64bit dividend by signed 32bit divisor * and round to closest integer. * * Return: dividend / divisor rounded to nearest integer */ #define DIV_S64_ROUND_CLOSEST(dividend, divisor)( \ { \ s64 __x = (dividend); \ s32 __d = (divisor); \ ((__x > 0) == (__d > 0)) ? \ div_s64((__x + (__d / 2)), __d) : \ div_s64((__x - (__d / 2)), __d); \ } \ ) #endif /* _LINUX_MATH64_H */ PK ! �к3G G dqblk_v1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * File with in-memory structures of old quota format */ #ifndef _LINUX_DQBLK_V1_H #define _LINUX_DQBLK_V1_H /* Numbers of blocks needed for updates */ #define V1_INIT_ALLOC 1 #define V1_INIT_REWRITE 1 #define V1_DEL_ALLOC 0 #define V1_DEL_REWRITE 2 #endif /* _LINUX_DQBLK_V1_H */ PK ! h��h�+ �+ ipmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * ipmi.h * * MontaVista IPMI interface * * Author: MontaVista Software, Inc. * Corey Minyard <minyard@mvista.com> * source@mvista.com * * Copyright 2002 MontaVista Software Inc. * */ #ifndef __LINUX_IPMI_H #define __LINUX_IPMI_H #include <uapi/linux/ipmi.h> #include <linux/list.h> #include <linux/proc_fs.h> #include <linux/acpi.h> /* For acpi_handle */ struct module; struct device; /* * Opaque type for a IPMI message user. One of these is needed to * send and receive messages. */ struct ipmi_user; /* * Stuff coming from the receive interface comes as one of these. * They are allocated, the receiver must free them with * ipmi_free_recv_msg() when done with the message. The link is not * used after the message is delivered, so the upper layer may use the * link to build a linked list, if it likes. */ struct ipmi_recv_msg { struct list_head link; /* * The type of message as defined in the "Receive Types" * defines above. */ int recv_type; struct ipmi_user *user; struct ipmi_addr addr; long msgid; struct kernel_ipmi_msg msg; /* * The user_msg_data is the data supplied when a message was * sent, if this is a response to a sent message. If this is * not a response to a sent message, then user_msg_data will * be NULL. If the user above is NULL, then this will be the * intf. */ void *user_msg_data; /* * Call this when done with the message. It will presumably free * the message and do any other necessary cleanup. */ void (*done)(struct ipmi_recv_msg *msg); /* * Place-holder for the data, don't make any assumptions about * the size or existence of this, since it may change. */ unsigned char msg_data[IPMI_MAX_MSG_LENGTH]; }; /* Allocate and free the receive message. */ void ipmi_free_recv_msg(struct ipmi_recv_msg *msg); struct ipmi_user_hndl { /* * Routine type to call when a message needs to be routed to * the upper layer. This will be called with some locks held, * the only IPMI routines that can be called are ipmi_request * and the alloc/free operations. The handler_data is the * variable supplied when the receive handler was registered. */ void (*ipmi_recv_hndl)(struct ipmi_recv_msg *msg, void *user_msg_data); /* * Called when the interface detects a watchdog pre-timeout. If * this is NULL, it will be ignored for the user. */ void (*ipmi_watchdog_pretimeout)(void *handler_data); /* * If not NULL, called at panic time after the interface has * been set up to handle run to completion. */ void (*ipmi_panic_handler)(void *handler_data); /* * Called when the interface has been removed. After this returns * the user handle will be invalid. The interface may or may * not be usable when this is called, but it will return errors * if it is not usable. */ void (*shutdown)(void *handler_data); }; /* Create a new user of the IPMI layer on the given interface number. */ int ipmi_create_user(unsigned int if_num, const struct ipmi_user_hndl *handler, void *handler_data, struct ipmi_user **user); /* * Destroy the given user of the IPMI layer. Note that after this * function returns, the system is guaranteed to not call any * callbacks for the user. Thus as long as you destroy all the users * before you unload a module, you will be safe. And if you destroy * the users before you destroy the callback structures, it should be * safe, too. */ int ipmi_destroy_user(struct ipmi_user *user); /* Get the IPMI version of the BMC we are talking to. */ int ipmi_get_version(struct ipmi_user *user, unsigned char *major, unsigned char *minor); /* * Set and get the slave address and LUN that we will use for our * source messages. Note that this affects the interface, not just * this user, so it will affect all users of this interface. This is * so some initialization code can come in and do the OEM-specific * things it takes to determine your address (if not the BMC) and set * it for everyone else. Note that each channel can have its own * address. */ int ipmi_set_my_address(struct ipmi_user *user, unsigned int channel, unsigned char address); int ipmi_get_my_address(struct ipmi_user *user, unsigned int channel, unsigned char *address); int ipmi_set_my_LUN(struct ipmi_user *user, unsigned int channel, unsigned char LUN); int ipmi_get_my_LUN(struct ipmi_user *user, unsigned int channel, unsigned char *LUN); /* * Like ipmi_request, but lets you specify the number of retries and * the retry time. The retries is the number of times the message * will be resent if no reply is received. If set to -1, the default * value will be used. The retry time is the time in milliseconds * between retries. If set to zero, the default value will be * used. * * Don't use this unless you *really* have to. It's primarily for the * IPMI over LAN converter; since the LAN stuff does its own retries, * it makes no sense to do it here. However, this can be used if you * have unusual requirements. */ int ipmi_request_settime(struct ipmi_user *user, struct ipmi_addr *addr, long msgid, struct kernel_ipmi_msg *msg, void *user_msg_data, int priority, int max_retries, unsigned int retry_time_ms); /* * Like ipmi_request, but with messages supplied. This will not * allocate any memory, and the messages may be statically allocated * (just make sure to do the "done" handling on them). Note that this * is primarily for the watchdog timer, since it should be able to * send messages even if no memory is available. This is subject to * change as the system changes, so don't use it unless you REALLY * have to. */ int ipmi_request_supply_msgs(struct ipmi_user *user, struct ipmi_addr *addr, long msgid, struct kernel_ipmi_msg *msg, void *user_msg_data, void *supplied_smi, struct ipmi_recv_msg *supplied_recv, int priority); /* * Poll the IPMI interface for the user. This causes the IPMI code to * do an immediate check for information from the driver and handle * anything that is immediately pending. This will not block in any * way. This is useful if you need to spin waiting for something to * happen in the IPMI driver. */ void ipmi_poll_interface(struct ipmi_user *user); /* * When commands come in to the SMS, the user can register to receive * them. Only one user can be listening on a specific netfn/cmd/chan tuple * at a time, you will get an EBUSY error if the command is already * registered. If a command is received that does not have a user * registered, the driver will automatically return the proper * error. Channels are specified as a bitfield, use IPMI_CHAN_ALL to * mean all channels. */ int ipmi_register_for_cmd(struct ipmi_user *user, unsigned char netfn, unsigned char cmd, unsigned int chans); int ipmi_unregister_for_cmd(struct ipmi_user *user, unsigned char netfn, unsigned char cmd, unsigned int chans); /* * Go into a mode where the driver will not autonomously attempt to do * things with the interface. It will still respond to attentions and * interrupts, and it will expect that commands will complete. It * will not automatcially check for flags, events, or things of that * nature. * * This is primarily used for firmware upgrades. The idea is that * when you go into firmware upgrade mode, you do this operation * and the driver will not attempt to do anything but what you tell * it or what the BMC asks for. * * Note that if you send a command that resets the BMC, the driver * will still expect a response from that command. So the BMC should * reset itself *after* the response is sent. Resetting before the * response is just silly. * * If in auto maintenance mode, the driver will automatically go into * maintenance mode for 30 seconds if it sees a cold reset, a warm * reset, or a firmware NetFN. This means that code that uses only * firmware NetFN commands to do upgrades will work automatically * without change, assuming it sends a message every 30 seconds or * less. * * See the IPMI_MAINTENANCE_MODE_xxx defines for what the mode means. */ int ipmi_get_maintenance_mode(struct ipmi_user *user); int ipmi_set_maintenance_mode(struct ipmi_user *user, int mode); /* * When the user is created, it will not receive IPMI events by * default. The user must set this to TRUE to get incoming events. * The first user that sets this to TRUE will receive all events that * have been queued while no one was waiting for events. */ int ipmi_set_gets_events(struct ipmi_user *user, bool val); /* * Called when a new SMI is registered. This will also be called on * every existing interface when a new watcher is registered with * ipmi_smi_watcher_register(). */ struct ipmi_smi_watcher { struct list_head link; /* * You must set the owner to the current module, if you are in * a module (generally just set it to "THIS_MODULE"). */ struct module *owner; /* * These two are called with read locks held for the interface * the watcher list. So you can add and remove users from the * IPMI interface, send messages, etc., but you cannot add * or remove SMI watchers or SMI interfaces. */ void (*new_smi)(int if_num, struct device *dev); void (*smi_gone)(int if_num); }; int ipmi_smi_watcher_register(struct ipmi_smi_watcher *watcher); int ipmi_smi_watcher_unregister(struct ipmi_smi_watcher *watcher); /* * The following are various helper functions for dealing with IPMI * addresses. */ /* Return the maximum length of an IPMI address given it's type. */ unsigned int ipmi_addr_length(int addr_type); /* Validate that the given IPMI address is valid. */ int ipmi_validate_addr(struct ipmi_addr *addr, int len); /* * How did the IPMI driver find out about the device? */ enum ipmi_addr_src { SI_INVALID = 0, SI_HOTMOD, SI_HARDCODED, SI_SPMI, SI_ACPI, SI_SMBIOS, SI_PCI, SI_DEVICETREE, SI_PLATFORM, SI_LAST }; const char *ipmi_addr_src_to_str(enum ipmi_addr_src src); union ipmi_smi_info_union { #ifdef CONFIG_ACPI /* * the acpi_info element is defined for the SI_ACPI * address type */ struct { acpi_handle acpi_handle; } acpi_info; #endif }; struct ipmi_smi_info { enum ipmi_addr_src addr_src; /* * Base device for the interface. Don't forget to put this when * you are done. */ struct device *dev; /* * The addr_info provides more detailed info for some IPMI * devices, depending on the addr_src. Currently only SI_ACPI * info is provided. */ union ipmi_smi_info_union addr_info; }; /* This is to get the private info of struct ipmi_smi */ extern int ipmi_get_smi_info(int if_num, struct ipmi_smi_info *data); #define GET_DEVICE_ID_MAX_RETRY 5 #endif /* __LINUX_IPMI_H */ PK ! ��̱�Q �Q nfs_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/nfs_fs.h * * Copyright (C) 1992 Rick Sladkey * * OS-specific nfs filesystem definitions and declarations */ #ifndef _LINUX_NFS_FS_H #define _LINUX_NFS_FS_H #include <uapi/linux/nfs_fs.h> /* * Enable dprintk() debugging support for nfs client. */ #ifdef CONFIG_NFS_DEBUG # define NFS_DEBUG #endif #include <linux/in.h> #include <linux/mm.h> #include <linux/pagemap.h> #include <linux/rbtree.h> #include <linux/refcount.h> #include <linux/rwsem.h> #include <linux/wait.h> #include <linux/sunrpc/debug.h> #include <linux/sunrpc/auth.h> #include <linux/sunrpc/clnt.h> #include <linux/nfs.h> #include <linux/nfs2.h> #include <linux/nfs3.h> #include <linux/nfs4.h> #include <linux/nfs_xdr.h> #include <linux/nfs_fs_sb.h> #include <linux/mempool.h> /* * These are the default for number of transports to different server IPs */ #define NFS_MAX_TRANSPORTS 16 /* * These are the default flags for swap requests */ #define NFS_RPC_SWAPFLAGS (RPC_TASK_SWAPPER|RPC_TASK_ROOTCREDS) /* * Size of the NFS directory verifier */ #define NFS_DIR_VERIFIER_SIZE 2 /* * NFSv3/v4 Access mode cache entry */ struct nfs_access_entry { struct rb_node rb_node; struct list_head lru; const struct cred * cred; u64 timestamp; __u32 mask; struct rcu_head rcu_head; }; struct nfs_lock_context { refcount_t count; struct list_head list; struct nfs_open_context *open_context; fl_owner_t lockowner; atomic_t io_count; struct rcu_head rcu_head; }; struct nfs4_state; struct nfs_open_context { struct nfs_lock_context lock_context; fl_owner_t flock_owner; struct dentry *dentry; const struct cred *cred; struct rpc_cred __rcu *ll_cred; /* low-level cred - use to check for expiry */ struct nfs4_state *state; fmode_t mode; unsigned long flags; #define NFS_CONTEXT_RESEND_WRITES (1) #define NFS_CONTEXT_BAD (2) #define NFS_CONTEXT_UNLOCK (3) #define NFS_CONTEXT_FILE_OPEN (4) int error; struct list_head list; struct nfs4_threshold *mdsthreshold; struct rcu_head rcu_head; }; struct nfs_open_dir_context { struct list_head list; unsigned long attr_gencount; __be32 verf[NFS_DIR_VERIFIER_SIZE]; __u64 dir_cookie; __u64 dup_cookie; pgoff_t page_index; signed char duped; }; /* * NFSv4 delegation */ struct nfs_delegation; struct posix_acl; struct nfs4_xattr_cache; /* * nfs fs inode data in memory */ struct nfs_inode { /* * The 64bit 'inode number' */ __u64 fileid; /* * NFS file handle */ struct nfs_fh fh; /* * Various flags */ unsigned long flags; /* atomic bit ops */ unsigned long cache_validity; /* bit mask */ /* * read_cache_jiffies is when we started read-caching this inode. * attrtimeo is for how long the cached information is assumed * to be valid. A successful attribute revalidation doubles * attrtimeo (up to acregmax/acdirmax), a failure resets it to * acregmin/acdirmin. * * We need to revalidate the cached attrs for this inode if * * jiffies - read_cache_jiffies >= attrtimeo * * Please note the comparison is greater than or equal * so that zero timeout values can be specified. */ unsigned long read_cache_jiffies; unsigned long attrtimeo; unsigned long attrtimeo_timestamp; unsigned long attr_gencount; struct rb_root access_cache; struct list_head access_cache_entry_lru; struct list_head access_cache_inode_lru; union { /* Directory */ struct { /* "Generation counter" for the attribute cache. * This is bumped whenever we update the metadata * on the server. */ unsigned long cache_change_attribute; /* * This is the cookie verifier used for NFSv3 readdir * operations */ __be32 cookieverf[NFS_DIR_VERIFIER_SIZE]; /* Readers: in-flight sillydelete RPC calls */ /* Writers: rmdir */ struct rw_semaphore rmdir_sem; }; /* Regular file */ struct { atomic_long_t nrequests; atomic_long_t redirtied_pages; struct nfs_mds_commit_info commit_info; struct mutex commit_mutex; }; }; /* Open contexts for shared mmap writes */ struct list_head open_files; /* Keep track of out-of-order replies. * The ooo array contains start/end pairs of * numbers from the changeid sequence when * the inode's iversion has been updated. * It also contains end/start pair (i.e. reverse order) * of sections of the changeid sequence that have * been seen in replies from the server. * Normally these should match and when both * A:B and B:A are found in ooo, they are both removed. * And if a reply with A:B causes an iversion update * of A:B, then neither are added. * When a reply has pre_change that doesn't match * iversion, then the changeid pair and any consequent * change in iversion ARE added. Later replies * might fill in the gaps, or possibly a gap is caused * by a change from another client. * When a file or directory is opened, if the ooo table * is not empty, then we assume the gaps were due to * another client and we invalidate the cached data. * * We can only track a limited number of concurrent gaps. * Currently that limit is 16. * We allocate the table on demand. If there is insufficient * memory, then we probably cannot cache the file anyway * so there is no loss. */ struct { int cnt; struct { u64 start, end; } gap[16]; } *ooo; #if IS_ENABLED(CONFIG_NFS_V4) struct nfs4_cached_acl *nfs4_acl; /* NFSv4 state */ struct list_head open_states; struct nfs_delegation __rcu *delegation; struct rw_semaphore rwsem; /* pNFS layout information */ struct pnfs_layout_hdr *layout; #endif /* CONFIG_NFS_V4*/ /* how many bytes have been written/read and how many bytes queued up */ __u64 write_io; __u64 read_io; #ifdef CONFIG_NFS_FSCACHE struct fscache_cookie *fscache; #endif struct inode vfs_inode; #ifdef CONFIG_NFS_V4_2 struct nfs4_xattr_cache *xattr_cache; #endif }; struct nfs4_copy_state { struct list_head copies; struct list_head src_copies; nfs4_stateid stateid; struct completion completion; uint64_t count; struct nfs_writeverf verf; int error; int flags; struct nfs4_state *parent_src_state; struct nfs4_state *parent_dst_state; }; /* * Access bit flags */ #define NFS_ACCESS_READ 0x0001 #define NFS_ACCESS_LOOKUP 0x0002 #define NFS_ACCESS_MODIFY 0x0004 #define NFS_ACCESS_EXTEND 0x0008 #define NFS_ACCESS_DELETE 0x0010 #define NFS_ACCESS_EXECUTE 0x0020 #define NFS_ACCESS_XAREAD 0x0040 #define NFS_ACCESS_XAWRITE 0x0080 #define NFS_ACCESS_XALIST 0x0100 /* * Cache validity bit flags */ #define NFS_INO_INVALID_DATA BIT(1) /* cached data is invalid */ #define NFS_INO_INVALID_ATIME BIT(2) /* cached atime is invalid */ #define NFS_INO_INVALID_ACCESS BIT(3) /* cached access cred invalid */ #define NFS_INO_INVALID_ACL BIT(4) /* cached acls are invalid */ #define NFS_INO_REVAL_PAGECACHE BIT(5) /* must revalidate pagecache */ #define NFS_INO_REVAL_FORCED BIT(6) /* force revalidation ignoring a delegation */ #define NFS_INO_INVALID_LABEL BIT(7) /* cached label is invalid */ #define NFS_INO_INVALID_CHANGE BIT(8) /* cached change is invalid */ #define NFS_INO_INVALID_CTIME BIT(9) /* cached ctime is invalid */ #define NFS_INO_INVALID_MTIME BIT(10) /* cached mtime is invalid */ #define NFS_INO_INVALID_SIZE BIT(11) /* cached size is invalid */ #define NFS_INO_INVALID_OTHER BIT(12) /* other attrs are invalid */ #define NFS_INO_DATA_INVAL_DEFER \ BIT(13) /* Deferred cache invalidation */ #define NFS_INO_INVALID_BLOCKS BIT(14) /* cached blocks are invalid */ #define NFS_INO_INVALID_XATTR BIT(15) /* xattrs are invalid */ #define NFS_INO_INVALID_NLINK BIT(16) /* cached nlinks is invalid */ #define NFS_INO_INVALID_MODE BIT(17) /* cached mode is invalid */ #define NFS_INO_INVALID_ATTR (NFS_INO_INVALID_CHANGE \ | NFS_INO_INVALID_CTIME \ | NFS_INO_INVALID_MTIME \ | NFS_INO_INVALID_SIZE \ | NFS_INO_INVALID_NLINK \ | NFS_INO_INVALID_MODE \ | NFS_INO_INVALID_OTHER) /* inode metadata is invalid */ /* * Bit offsets in flags field */ #define NFS_INO_ADVISE_RDPLUS (0) /* advise readdirplus */ #define NFS_INO_STALE (1) /* possible stale inode */ #define NFS_INO_ACL_LRU_SET (2) /* Inode is on the LRU list */ #define NFS_INO_INVALIDATING (3) /* inode is being invalidated */ #define NFS_INO_FSCACHE (5) /* inode can be cached by FS-Cache */ #define NFS_INO_FSCACHE_LOCK (6) /* FS-Cache cookie management lock */ #define NFS_INO_FORCE_READDIR (7) /* force readdirplus */ #define NFS_INO_LAYOUTCOMMIT (9) /* layoutcommit required */ #define NFS_INO_LAYOUTCOMMITTING (10) /* layoutcommit inflight */ #define NFS_INO_LAYOUTSTATS (11) /* layoutstats inflight */ #define NFS_INO_ODIRECT (12) /* I/O setting is O_DIRECT */ static inline struct nfs_inode *NFS_I(const struct inode *inode) { return container_of(inode, struct nfs_inode, vfs_inode); } static inline struct nfs_server *NFS_SB(const struct super_block *s) { return (struct nfs_server *)(s->s_fs_info); } static inline struct nfs_fh *NFS_FH(const struct inode *inode) { return &NFS_I(inode)->fh; } static inline struct nfs_server *NFS_SERVER(const struct inode *inode) { return NFS_SB(inode->i_sb); } static inline struct rpc_clnt *NFS_CLIENT(const struct inode *inode) { return NFS_SERVER(inode)->client; } static inline const struct nfs_rpc_ops *NFS_PROTO(const struct inode *inode) { return NFS_SERVER(inode)->nfs_client->rpc_ops; } static inline unsigned NFS_MINATTRTIMEO(const struct inode *inode) { struct nfs_server *nfss = NFS_SERVER(inode); return S_ISDIR(inode->i_mode) ? nfss->acdirmin : nfss->acregmin; } static inline unsigned NFS_MAXATTRTIMEO(const struct inode *inode) { struct nfs_server *nfss = NFS_SERVER(inode); return S_ISDIR(inode->i_mode) ? nfss->acdirmax : nfss->acregmax; } static inline int NFS_STALE(const struct inode *inode) { return test_bit(NFS_INO_STALE, &NFS_I(inode)->flags); } static inline struct fscache_cookie *nfs_i_fscache(struct inode *inode) { #ifdef CONFIG_NFS_FSCACHE return NFS_I(inode)->fscache; #else return NULL; #endif } static inline __u64 NFS_FILEID(const struct inode *inode) { return NFS_I(inode)->fileid; } static inline void set_nfs_fileid(struct inode *inode, __u64 fileid) { NFS_I(inode)->fileid = fileid; } static inline void nfs_mark_for_revalidate(struct inode *inode) { struct nfs_inode *nfsi = NFS_I(inode); spin_lock(&inode->i_lock); nfsi->cache_validity |= NFS_INO_REVAL_PAGECACHE | NFS_INO_INVALID_ACCESS | NFS_INO_INVALID_ACL | NFS_INO_INVALID_CHANGE | NFS_INO_INVALID_CTIME; if (S_ISDIR(inode->i_mode)) nfsi->cache_validity |= NFS_INO_INVALID_DATA; spin_unlock(&inode->i_lock); } static inline int nfs_server_capable(struct inode *inode, int cap) { return NFS_SERVER(inode)->caps & cap; } /** * nfs_save_change_attribute - Returns the inode attribute change cookie * @dir - pointer to parent directory inode * The "cache change attribute" is updated when we need to revalidate * our dentry cache after a directory was seen to change on the server. */ static inline unsigned long nfs_save_change_attribute(struct inode *dir) { return NFS_I(dir)->cache_change_attribute; } /* * linux/fs/nfs/inode.c */ extern int nfs_sync_mapping(struct address_space *mapping); extern void nfs_zap_mapping(struct inode *inode, struct address_space *mapping); extern void nfs_zap_caches(struct inode *); extern void nfs_set_inode_stale(struct inode *inode); extern void nfs_invalidate_atime(struct inode *); extern struct inode *nfs_fhget(struct super_block *, struct nfs_fh *, struct nfs_fattr *, struct nfs4_label *); struct inode *nfs_ilookup(struct super_block *sb, struct nfs_fattr *, struct nfs_fh *); extern int nfs_refresh_inode(struct inode *, struct nfs_fattr *); extern int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr); extern int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fattr); extern int nfs_post_op_update_inode_force_wcc_locked(struct inode *inode, struct nfs_fattr *fattr); extern int nfs_getattr(struct user_namespace *, const struct path *, struct kstat *, u32, unsigned int); extern void nfs_access_add_cache(struct inode *, struct nfs_access_entry *); extern void nfs_access_set_mask(struct nfs_access_entry *, u32); extern int nfs_permission(struct user_namespace *, struct inode *, int); extern int nfs_open(struct inode *, struct file *); extern int nfs_attribute_cache_expired(struct inode *inode); extern int nfs_revalidate_inode(struct inode *inode, unsigned long flags); extern int __nfs_revalidate_inode(struct nfs_server *, struct inode *); extern int nfs_clear_invalid_mapping(struct address_space *mapping); extern bool nfs_mapping_need_revalidate_inode(struct inode *inode); extern int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping); extern int nfs_revalidate_mapping_rcu(struct inode *inode); extern int nfs_setattr(struct user_namespace *, struct dentry *, struct iattr *); extern void nfs_setattr_update_inode(struct inode *inode, struct iattr *attr, struct nfs_fattr *); extern void nfs_setsecurity(struct inode *inode, struct nfs_fattr *fattr, struct nfs4_label *label); extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx); extern void put_nfs_open_context(struct nfs_open_context *ctx); extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, const struct cred *cred, fmode_t mode); extern struct nfs_open_context *alloc_nfs_open_context(struct dentry *dentry, fmode_t f_mode, struct file *filp); extern void nfs_inode_attach_open_context(struct nfs_open_context *ctx); extern void nfs_file_set_open_context(struct file *filp, struct nfs_open_context *ctx); extern void nfs_file_clear_open_context(struct file *flip); extern struct nfs_lock_context *nfs_get_lock_context(struct nfs_open_context *ctx); extern void nfs_put_lock_context(struct nfs_lock_context *l_ctx); extern u64 nfs_compat_user_ino64(u64 fileid); extern void nfs_fattr_init(struct nfs_fattr *fattr); extern void nfs_fattr_set_barrier(struct nfs_fattr *fattr); extern unsigned long nfs_inc_attr_generation_counter(void); extern struct nfs_fattr *nfs_alloc_fattr(void); extern struct nfs_fattr *nfs_alloc_fattr_with_label(struct nfs_server *server); static inline void nfs4_label_free(struct nfs4_label *label) { #ifdef CONFIG_NFS_V4_SECURITY_LABEL if (label) { kfree(label->label); kfree(label); } #endif } static inline void nfs_free_fattr(const struct nfs_fattr *fattr) { if (fattr) nfs4_label_free(fattr->label); kfree(fattr); } extern struct nfs_fh *nfs_alloc_fhandle(void); static inline void nfs_free_fhandle(const struct nfs_fh *fh) { kfree(fh); } #ifdef NFS_DEBUG extern u32 _nfs_display_fhandle_hash(const struct nfs_fh *fh); static inline u32 nfs_display_fhandle_hash(const struct nfs_fh *fh) { return _nfs_display_fhandle_hash(fh); } extern void _nfs_display_fhandle(const struct nfs_fh *fh, const char *caption); #define nfs_display_fhandle(fh, caption) \ do { \ if (unlikely(nfs_debug & NFSDBG_FACILITY)) \ _nfs_display_fhandle(fh, caption); \ } while (0) #else static inline u32 nfs_display_fhandle_hash(const struct nfs_fh *fh) { return 0; } static inline void nfs_display_fhandle(const struct nfs_fh *fh, const char *caption) { } #endif /* * linux/fs/nfs/nfsroot.c */ extern int nfs_root_data(char **root_device, char **root_data); /*__init*/ /* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ extern __be32 root_nfs_parse_addr(char *name); /*__init*/ /* * linux/fs/nfs/file.c */ extern const struct file_operations nfs_file_operations; #if IS_ENABLED(CONFIG_NFS_V4) extern const struct file_operations nfs4_file_operations; #endif /* CONFIG_NFS_V4 */ extern const struct address_space_operations nfs_file_aops; extern const struct address_space_operations nfs_dir_aops; static inline struct nfs_open_context *nfs_file_open_context(struct file *filp) { return filp->private_data; } static inline const struct cred *nfs_file_cred(struct file *file) { if (file != NULL) { struct nfs_open_context *ctx = nfs_file_open_context(file); if (ctx) return ctx->cred; } return NULL; } /* * linux/fs/nfs/direct.c */ extern ssize_t nfs_direct_IO(struct kiocb *, struct iov_iter *); ssize_t nfs_file_direct_read(struct kiocb *iocb, struct iov_iter *iter, bool swap); ssize_t nfs_file_direct_write(struct kiocb *iocb, struct iov_iter *iter, bool swap); /* * linux/fs/nfs/dir.c */ extern const struct file_operations nfs_dir_operations; extern const struct dentry_operations nfs_dentry_operations; extern void nfs_force_lookup_revalidate(struct inode *dir); extern void nfs_set_verifier(struct dentry * dentry, unsigned long verf); #if IS_ENABLED(CONFIG_NFS_V4) extern void nfs_clear_verifier_delegated(struct inode *inode); #endif /* IS_ENABLED(CONFIG_NFS_V4) */ extern struct dentry *nfs_add_or_obtain(struct dentry *dentry, struct nfs_fh *fh, struct nfs_fattr *fattr, struct nfs4_label *label); extern int nfs_instantiate(struct dentry *dentry, struct nfs_fh *fh, struct nfs_fattr *fattr, struct nfs4_label *label); extern int nfs_may_open(struct inode *inode, const struct cred *cred, int openflags); extern void nfs_access_zap_cache(struct inode *inode); extern int nfs_access_get_cached(struct inode *inode, const struct cred *cred, u32 *mask, bool may_block); /* * linux/fs/nfs/symlink.c */ extern const struct inode_operations nfs_symlink_inode_operations; /* * linux/fs/nfs/sysctl.c */ #ifdef CONFIG_SYSCTL extern int nfs_register_sysctl(void); extern void nfs_unregister_sysctl(void); #else #define nfs_register_sysctl() 0 #define nfs_unregister_sysctl() do { } while(0) #endif /* * linux/fs/nfs/namespace.c */ extern const struct inode_operations nfs_mountpoint_inode_operations; extern const struct inode_operations nfs_referral_inode_operations; extern int nfs_mountpoint_expiry_timeout; extern void nfs_release_automount_timer(void); /* * linux/fs/nfs/unlink.c */ extern void nfs_complete_unlink(struct dentry *dentry, struct inode *); /* * linux/fs/nfs/write.c */ extern int nfs_congestion_kb; extern int nfs_writepage(struct page *page, struct writeback_control *wbc); extern int nfs_writepages(struct address_space *, struct writeback_control *); extern int nfs_flush_incompatible(struct file *file, struct page *page); extern int nfs_updatepage(struct file *, struct page *, unsigned int, unsigned int); /* * Try to write back everything synchronously (but check the * return value!) */ extern int nfs_sync_inode(struct inode *inode); extern int nfs_wb_all(struct inode *inode); extern int nfs_wb_page(struct inode *inode, struct page *page); extern int nfs_wb_page_cancel(struct inode *inode, struct page* page); extern int nfs_commit_inode(struct inode *, int); extern struct nfs_commit_data *nfs_commitdata_alloc(void); extern void nfs_commit_free(struct nfs_commit_data *data); void nfs_commit_begin(struct nfs_mds_commit_info *cinfo); bool nfs_commit_end(struct nfs_mds_commit_info *cinfo); static inline int nfs_have_writebacks(struct inode *inode) { if (S_ISREG(inode->i_mode)) return atomic_long_read(&NFS_I(inode)->nrequests) != 0; return 0; } /* * linux/fs/nfs/read.c */ extern int nfs_readpage(struct file *, struct page *); extern int nfs_readpages(struct file *, struct address_space *, struct list_head *, unsigned); /* * inline functions */ static inline loff_t nfs_size_to_loff_t(__u64 size) { return min_t(u64, size, OFFSET_MAX); } static inline ino_t nfs_fileid_to_ino_t(u64 fileid) { ino_t ino = (ino_t) fileid; if (sizeof(ino_t) < sizeof(u64)) ino ^= fileid >> (sizeof(u64)-sizeof(ino_t)) * 8; return ino; } static inline void nfs_ooo_clear(struct nfs_inode *nfsi) { nfsi->cache_validity &= ~NFS_INO_DATA_INVAL_DEFER; kfree(nfsi->ooo); nfsi->ooo = NULL; } static inline bool nfs_ooo_test(struct nfs_inode *nfsi) { return (nfsi->cache_validity & NFS_INO_DATA_INVAL_DEFER) || (nfsi->ooo && nfsi->ooo->cnt > 0); } #define NFS_JUKEBOX_RETRY_TIME (5 * HZ) /* We need to block new opens while a file is being unlinked. * If it is opened *before* we decide to unlink, we will silly-rename * instead. If it is opened *after*, then we need to create or will fail. * If we allow the two to race, we could end up with a file that is open * but deleted on the server resulting in ESTALE. * So use ->d_fsdata to record when the unlink is happening * and block dentry revalidation while it is set. */ #define NFS_FSDATA_BLOCKED ((void*)1) # undef ifdebug # ifdef NFS_DEBUG # define ifdebug(fac) if (unlikely(nfs_debug & NFSDBG_##fac)) # define NFS_IFDEBUG(x) x # else # define ifdebug(fac) if (0) # define NFS_IFDEBUG(x) # endif #endif PK ! L�e� � bcm963xx_nvram.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_BCM963XX_NVRAM_H__ #define __LINUX_BCM963XX_NVRAM_H__ #include <linux/crc32.h> #include <linux/if_ether.h> #include <linux/sizes.h> #include <linux/types.h> /* * Broadcom BCM963xx SoC board nvram data structure. * * The nvram structure varies in size depending on the SoC board version. Use * the appropriate minimum BCM963XX_NVRAM_*_SIZE define for the information * you need instead of sizeof(struct bcm963xx_nvram) as this may change. */ #define BCM963XX_NVRAM_V4_SIZE 300 #define BCM963XX_NVRAM_V5_SIZE (1 * SZ_1K) #define BCM963XX_DEFAULT_PSI_SIZE 64 enum bcm963xx_nvram_nand_part { BCM963XX_NVRAM_NAND_PART_BOOT = 0, BCM963XX_NVRAM_NAND_PART_ROOTFS_1, BCM963XX_NVRAM_NAND_PART_ROOTFS_2, BCM963XX_NVRAM_NAND_PART_DATA, BCM963XX_NVRAM_NAND_PART_BBT, __BCM963XX_NVRAM_NAND_NR_PARTS }; struct bcm963xx_nvram { u32 version; char bootline[256]; char name[16]; u32 main_tp_number; u32 psi_size; u32 mac_addr_count; u8 mac_addr_base[ETH_ALEN]; u8 __reserved1[2]; u32 checksum_v4; u8 __reserved2[292]; u32 nand_part_offset[__BCM963XX_NVRAM_NAND_NR_PARTS]; u32 nand_part_size[__BCM963XX_NVRAM_NAND_NR_PARTS]; u8 __reserved3[388]; u32 checksum_v5; }; #define BCM963XX_NVRAM_NAND_PART_OFFSET(nvram, part) \ bcm963xx_nvram_nand_part_offset(nvram, BCM963XX_NVRAM_NAND_PART_ ##part) static inline u64 __pure bcm963xx_nvram_nand_part_offset( const struct bcm963xx_nvram *nvram, enum bcm963xx_nvram_nand_part part) { return nvram->nand_part_offset[part] * SZ_1K; } #define BCM963XX_NVRAM_NAND_PART_SIZE(nvram, part) \ bcm963xx_nvram_nand_part_size(nvram, BCM963XX_NVRAM_NAND_PART_ ##part) static inline u64 __pure bcm963xx_nvram_nand_part_size( const struct bcm963xx_nvram *nvram, enum bcm963xx_nvram_nand_part part) { return nvram->nand_part_size[part] * SZ_1K; } /* * bcm963xx_nvram_checksum - Verify nvram checksum * * @nvram: pointer to full size nvram data structure * @expected_out: optional pointer to store expected checksum value * @actual_out: optional pointer to store actual checksum value * * Return: 0 if the checksum is valid, otherwise -EINVAL */ static int __maybe_unused bcm963xx_nvram_checksum( const struct bcm963xx_nvram *nvram, u32 *expected_out, u32 *actual_out) { u32 expected, actual; size_t len; if (nvram->version <= 4) { expected = nvram->checksum_v4; len = BCM963XX_NVRAM_V4_SIZE - sizeof(u32); } else { expected = nvram->checksum_v5; len = BCM963XX_NVRAM_V5_SIZE - sizeof(u32); } /* * Calculate the CRC32 value for the nvram with a checksum value * of 0 without modifying or copying the nvram by combining: * - The CRC32 of the nvram without the checksum value * - The CRC32 of a zero checksum value (which is also 0) */ actual = crc32_le_combine( crc32_le(~0, (u8 *)nvram, len), 0, sizeof(u32)); if (expected_out) *expected_out = expected; if (actual_out) *actual_out = actual; return expected == actual ? 0 : -EINVAL; }; #endif /* __LINUX_BCM963XX_NVRAM_H__ */ PK ! :��� � dfl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Header file for DFL driver and device API * * Copyright (C) 2020 Intel Corporation, Inc. */ #ifndef __LINUX_DFL_H #define __LINUX_DFL_H #include <linux/device.h> #include <linux/mod_devicetable.h> /** * enum dfl_id_type - define the DFL FIU types */ enum dfl_id_type { FME_ID = 0, PORT_ID = 1, DFL_ID_MAX, }; /** * struct dfl_device - represent an dfl device on dfl bus * * @dev: generic device interface. * @id: id of the dfl device. * @type: type of DFL FIU of the device. See enum dfl_id_type. * @feature_id: feature identifier local to its DFL FIU type. * @mmio_res: mmio resource of this dfl device. * @irqs: list of Linux IRQ numbers of this dfl device. * @num_irqs: number of IRQs supported by this dfl device. * @cdev: pointer to DFL FPGA container device this dfl device belongs to. * @id_entry: matched id entry in dfl driver's id table. */ struct dfl_device { struct device dev; int id; u16 type; u16 feature_id; u8 revision; struct resource mmio_res; int *irqs; unsigned int num_irqs; struct dfl_fpga_cdev *cdev; const struct dfl_device_id *id_entry; }; /** * struct dfl_driver - represent an dfl device driver * * @drv: driver model structure. * @id_table: pointer to table of device IDs the driver is interested in. * { } member terminated. * @probe: mandatory callback for device binding. * @remove: callback for device unbinding. */ struct dfl_driver { struct device_driver drv; const struct dfl_device_id *id_table; int (*probe)(struct dfl_device *dfl_dev); void (*remove)(struct dfl_device *dfl_dev); }; #define to_dfl_dev(d) container_of(d, struct dfl_device, dev) #define to_dfl_drv(d) container_of(d, struct dfl_driver, drv) /* * use a macro to avoid include chaining to get THIS_MODULE. */ #define dfl_driver_register(drv) \ __dfl_driver_register(drv, THIS_MODULE) int __dfl_driver_register(struct dfl_driver *dfl_drv, struct module *owner); void dfl_driver_unregister(struct dfl_driver *dfl_drv); /* * module_dfl_driver() - Helper macro for drivers that don't do * anything special in module init/exit. This eliminates a lot of * boilerplate. Each module may only use this macro once, and * calling it replaces module_init() and module_exit(). */ #define module_dfl_driver(__dfl_driver) \ module_driver(__dfl_driver, dfl_driver_register, \ dfl_driver_unregister) #endif /* __LINUX_DFL_H */ PK ! �[��# �# w1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net> */ #ifndef __LINUX_W1_H #define __LINUX_W1_H #include <linux/device.h> /** * struct w1_reg_num - broken out slave device id * * @family: identifies the type of device * @id: along with family is the unique device id * @crc: checksum of the other bytes */ struct w1_reg_num { #if defined(__LITTLE_ENDIAN_BITFIELD) __u64 family:8, id:48, crc:8; #elif defined(__BIG_ENDIAN_BITFIELD) __u64 crc:8, id:48, family:8; #else #error "Please fix <asm/byteorder.h>" #endif }; #ifdef __KERNEL__ #define W1_MAXNAMELEN 32 #define W1_SEARCH 0xF0 #define W1_ALARM_SEARCH 0xEC #define W1_CONVERT_TEMP 0x44 #define W1_SKIP_ROM 0xCC #define W1_COPY_SCRATCHPAD 0x48 #define W1_WRITE_SCRATCHPAD 0x4E #define W1_READ_SCRATCHPAD 0xBE #define W1_READ_ROM 0x33 #define W1_READ_PSUPPLY 0xB4 #define W1_MATCH_ROM 0x55 #define W1_RESUME_CMD 0xA5 /** * struct w1_slave - holds a single slave device on the bus * * @owner: Points to the one wire "wire" kernel module. * @name: Device id is ascii. * @w1_slave_entry: data for the linked list * @reg_num: the slave id in binary * @refcnt: reference count, delete when 0 * @flags: bit flags for W1_SLAVE_ACTIVE W1_SLAVE_DETACH * @ttl: decrement per search this slave isn't found, deatch at 0 * @master: bus which this slave is on * @family: module for device family type * @family_data: pointer for use by the family module * @dev: kernel device identifier * @hwmon: pointer to hwmon device * */ struct w1_slave { struct module *owner; unsigned char name[W1_MAXNAMELEN]; struct list_head w1_slave_entry; struct w1_reg_num reg_num; atomic_t refcnt; int ttl; unsigned long flags; struct w1_master *master; struct w1_family *family; void *family_data; struct device dev; struct device *hwmon; }; typedef void (*w1_slave_found_callback)(struct w1_master *, u64); /** * struct w1_bus_master - operations available on a bus master * * @data: the first parameter in all the functions below * * @read_bit: Sample the line level @return the level read (0 or 1) * * @write_bit: Sets the line level * * @touch_bit: the lowest-level function for devices that really support the * 1-wire protocol. * touch_bit(0) = write-0 cycle * touch_bit(1) = write-1 / read cycle * @return the bit read (0 or 1) * * @read_byte: Reads a bytes. Same as 8 touch_bit(1) calls. * @return the byte read * * @write_byte: Writes a byte. Same as 8 touch_bit(x) calls. * * @read_block: Same as a series of read_byte() calls * @return the number of bytes read * * @write_block: Same as a series of write_byte() calls * * @triplet: Combines two reads and a smart write for ROM searches * @return bit0=Id bit1=comp_id bit2=dir_taken * * @reset_bus: long write-0 with a read for the presence pulse detection * @return -1=Error, 0=Device present, 1=No device present * * @set_pullup: Put out a strong pull-up pulse of the specified duration. * @return -1=Error, 0=completed * * @search: Really nice hardware can handles the different types of ROM search * w1_master* is passed to the slave found callback. * u8 is search_type, W1_SEARCH or W1_ALARM_SEARCH * * @dev_id: Optional device id string, which w1 slaves could use for * creating names, which then give a connection to the w1 master * * Note: read_bit and write_bit are very low level functions and should only * be used with hardware that doesn't really support 1-wire operations, * like a parallel/serial port. * Either define read_bit and write_bit OR define, at minimum, touch_bit and * reset_bus. * */ struct w1_bus_master { void *data; u8 (*read_bit)(void *); void (*write_bit)(void *, u8); u8 (*touch_bit)(void *, u8); u8 (*read_byte)(void *); void (*write_byte)(void *, u8); u8 (*read_block)(void *, u8 *, int); void (*write_block)(void *, const u8 *, int); u8 (*triplet)(void *, u8); u8 (*reset_bus)(void *); u8 (*set_pullup)(void *, int); void (*search)(void *, struct w1_master *, u8, w1_slave_found_callback); char *dev_id; }; /** * enum w1_master_flags - bitfields used in w1_master.flags * @W1_ABORT_SEARCH: abort searching early on shutdown * @W1_WARN_MAX_COUNT: limit warning when the maximum count is reached */ enum w1_master_flags { W1_ABORT_SEARCH = 0, W1_WARN_MAX_COUNT = 1, }; /** * struct w1_master - one per bus master * @w1_master_entry: master linked list * @owner: module owner * @name: dynamically allocate bus name * @list_mutex: protect slist and async_list * @slist: linked list of slaves * @async_list: linked list of netlink commands to execute * @max_slave_count: maximum number of slaves to search for at a time * @slave_count: current number of slaves known * @attempts: number of searches ran * @slave_ttl: number of searches before a slave is timed out * @initialized: prevent init/removal race conditions * @id: w1 bus number * @search_count: number of automatic searches to run, -1 unlimited * @search_id: allows continuing a search * @refcnt: reference count * @priv: private data storage * @enable_pullup: allows a strong pullup * @pullup_duration: time for the next strong pullup * @flags: one of w1_master_flags * @thread: thread for bus search and netlink commands * @mutex: protect most of w1_master * @bus_mutex: pretect concurrent bus access * @driver: sysfs driver * @dev: sysfs device * @bus_master: io operations available * @seq: sequence number used for netlink broadcasts */ struct w1_master { struct list_head w1_master_entry; struct module *owner; unsigned char name[W1_MAXNAMELEN]; /* list_mutex protects just slist and async_list so slaves can be * searched for and async commands added while the master has * w1_master.mutex locked and is operating on the bus. * lock order w1_mlock, w1_master.mutex, w1_master.list_mutex */ struct mutex list_mutex; struct list_head slist; struct list_head async_list; int max_slave_count, slave_count; unsigned long attempts; int slave_ttl; int initialized; u32 id; int search_count; /* id to start searching on, to continue a search or 0 to restart */ u64 search_id; atomic_t refcnt; void *priv; /** 5V strong pullup enabled flag, 1 enabled, zero disabled. */ int enable_pullup; /** 5V strong pullup duration in milliseconds, zero disabled. */ int pullup_duration; long flags; struct task_struct *thread; struct mutex mutex; struct mutex bus_mutex; struct device_driver *driver; struct device dev; struct w1_bus_master *bus_master; u32 seq; }; int w1_add_master_device(struct w1_bus_master *master); void w1_remove_master_device(struct w1_bus_master *master); /** * struct w1_family_ops - operations for a family type * @add_slave: add_slave * @remove_slave: remove_slave * @groups: sysfs group * @chip_info: pointer to struct hwmon_chip_info */ struct w1_family_ops { int (*add_slave)(struct w1_slave *sl); void (*remove_slave)(struct w1_slave *sl); const struct attribute_group **groups; const struct hwmon_chip_info *chip_info; }; /** * struct w1_family - reference counted family structure. * @family_entry: family linked list * @fid: 8 bit family identifier * @fops: operations for this family * @of_match_table: open firmware match table * @refcnt: reference counter */ struct w1_family { struct list_head family_entry; u8 fid; const struct w1_family_ops *fops; const struct of_device_id *of_match_table; atomic_t refcnt; }; int w1_register_family(struct w1_family *family); void w1_unregister_family(struct w1_family *family); /** * module_w1_family() - Helper macro for registering a 1-Wire families * @__w1_family: w1_family struct * * Helper macro for 1-Wire families which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_w1_family(__w1_family) \ module_driver(__w1_family, w1_register_family, \ w1_unregister_family) u8 w1_triplet(struct w1_master *dev, int bdir); u8 w1_touch_bit(struct w1_master *dev, int bit); void w1_write_8(struct w1_master *, u8); u8 w1_read_8(struct w1_master *); int w1_reset_bus(struct w1_master *); u8 w1_calc_crc8(u8 *, int); void w1_write_block(struct w1_master *, const u8 *, int); void w1_touch_block(struct w1_master *, u8 *, int); u8 w1_read_block(struct w1_master *, u8 *, int); int w1_reset_select_slave(struct w1_slave *sl); int w1_reset_resume_command(struct w1_master *); void w1_next_pullup(struct w1_master *, int); static inline struct w1_slave* dev_to_w1_slave(struct device *dev) { return container_of(dev, struct w1_slave, dev); } static inline struct w1_slave* kobj_to_w1_slave(struct kobject *kobj) { return dev_to_w1_slave(container_of(kobj, struct device, kobj)); } static inline struct w1_master* dev_to_w1_master(struct device *dev) { return container_of(dev, struct w1_master, dev); } #endif /* __KERNEL__ */ #endif /* __LINUX_W1_H */ PK ! �p� & & rbtree_augmented.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Red Black Trees (C) 1999 Andrea Arcangeli <andrea@suse.de> (C) 2002 David Woodhouse <dwmw2@infradead.org> (C) 2012 Michel Lespinasse <walken@google.com> linux/include/linux/rbtree_augmented.h */ #ifndef _LINUX_RBTREE_AUGMENTED_H #define _LINUX_RBTREE_AUGMENTED_H #include <linux/compiler.h> #include <linux/rbtree.h> #include <linux/rcupdate.h> /* * Please note - only struct rb_augment_callbacks and the prototypes for * rb_insert_augmented() and rb_erase_augmented() are intended to be public. * The rest are implementation details you are not expected to depend on. * * See Documentation/core-api/rbtree.rst for documentation and samples. */ struct rb_augment_callbacks { void (*propagate)(struct rb_node *node, struct rb_node *stop); void (*copy)(struct rb_node *old, struct rb_node *new); void (*rotate)(struct rb_node *old, struct rb_node *new); }; extern void __rb_insert_augmented(struct rb_node *node, struct rb_root *root, void (*augment_rotate)(struct rb_node *old, struct rb_node *new)); /* * Fixup the rbtree and update the augmented information when rebalancing. * * On insertion, the user must update the augmented information on the path * leading to the inserted node, then call rb_link_node() as usual and * rb_insert_augmented() instead of the usual rb_insert_color() call. * If rb_insert_augmented() rebalances the rbtree, it will callback into * a user provided function to update the augmented information on the * affected subtrees. */ static inline void rb_insert_augmented(struct rb_node *node, struct rb_root *root, const struct rb_augment_callbacks *augment) { __rb_insert_augmented(node, root, augment->rotate); } static inline void rb_insert_augmented_cached(struct rb_node *node, struct rb_root_cached *root, bool newleft, const struct rb_augment_callbacks *augment) { if (newleft) root->rb_leftmost = node; rb_insert_augmented(node, &root->rb_root, augment); } /* * Template for declaring augmented rbtree callbacks (generic case) * * RBSTATIC: 'static' or empty * RBNAME: name of the rb_augment_callbacks structure * RBSTRUCT: struct type of the tree nodes * RBFIELD: name of struct rb_node field within RBSTRUCT * RBAUGMENTED: name of field within RBSTRUCT holding data for subtree * RBCOMPUTE: name of function that recomputes the RBAUGMENTED data */ #define RB_DECLARE_CALLBACKS(RBSTATIC, RBNAME, \ RBSTRUCT, RBFIELD, RBAUGMENTED, RBCOMPUTE) \ static inline void \ RBNAME ## _propagate(struct rb_node *rb, struct rb_node *stop) \ { \ while (rb != stop) { \ RBSTRUCT *node = rb_entry(rb, RBSTRUCT, RBFIELD); \ if (RBCOMPUTE(node, true)) \ break; \ rb = rb_parent(&node->RBFIELD); \ } \ } \ static inline void \ RBNAME ## _copy(struct rb_node *rb_old, struct rb_node *rb_new) \ { \ RBSTRUCT *old = rb_entry(rb_old, RBSTRUCT, RBFIELD); \ RBSTRUCT *new = rb_entry(rb_new, RBSTRUCT, RBFIELD); \ new->RBAUGMENTED = old->RBAUGMENTED; \ } \ static void \ RBNAME ## _rotate(struct rb_node *rb_old, struct rb_node *rb_new) \ { \ RBSTRUCT *old = rb_entry(rb_old, RBSTRUCT, RBFIELD); \ RBSTRUCT *new = rb_entry(rb_new, RBSTRUCT, RBFIELD); \ new->RBAUGMENTED = old->RBAUGMENTED; \ RBCOMPUTE(old, false); \ } \ RBSTATIC const struct rb_augment_callbacks RBNAME = { \ .propagate = RBNAME ## _propagate, \ .copy = RBNAME ## _copy, \ .rotate = RBNAME ## _rotate \ }; /* * Template for declaring augmented rbtree callbacks, * computing RBAUGMENTED scalar as max(RBCOMPUTE(node)) for all subtree nodes. * * RBSTATIC: 'static' or empty * RBNAME: name of the rb_augment_callbacks structure * RBSTRUCT: struct type of the tree nodes * RBFIELD: name of struct rb_node field within RBSTRUCT * RBTYPE: type of the RBAUGMENTED field * RBAUGMENTED: name of RBTYPE field within RBSTRUCT holding data for subtree * RBCOMPUTE: name of function that returns the per-node RBTYPE scalar */ #define RB_DECLARE_CALLBACKS_MAX(RBSTATIC, RBNAME, RBSTRUCT, RBFIELD, \ RBTYPE, RBAUGMENTED, RBCOMPUTE) \ static inline bool RBNAME ## _compute_max(RBSTRUCT *node, bool exit) \ { \ RBSTRUCT *child; \ RBTYPE max = RBCOMPUTE(node); \ if (node->RBFIELD.rb_left) { \ child = rb_entry(node->RBFIELD.rb_left, RBSTRUCT, RBFIELD); \ if (child->RBAUGMENTED > max) \ max = child->RBAUGMENTED; \ } \ if (node->RBFIELD.rb_right) { \ child = rb_entry(node->RBFIELD.rb_right, RBSTRUCT, RBFIELD); \ if (child->RBAUGMENTED > max) \ max = child->RBAUGMENTED; \ } \ if (exit && node->RBAUGMENTED == max) \ return true; \ node->RBAUGMENTED = max; \ return false; \ } \ RB_DECLARE_CALLBACKS(RBSTATIC, RBNAME, \ RBSTRUCT, RBFIELD, RBAUGMENTED, RBNAME ## _compute_max) #define RB_RED 0 #define RB_BLACK 1 #define __rb_parent(pc) ((struct rb_node *)(pc & ~3)) #define __rb_color(pc) ((pc) & 1) #define __rb_is_black(pc) __rb_color(pc) #define __rb_is_red(pc) (!__rb_color(pc)) #define rb_color(rb) __rb_color((rb)->__rb_parent_color) #define rb_is_red(rb) __rb_is_red((rb)->__rb_parent_color) #define rb_is_black(rb) __rb_is_black((rb)->__rb_parent_color) static inline void rb_set_parent(struct rb_node *rb, struct rb_node *p) { rb->__rb_parent_color = rb_color(rb) | (unsigned long)p; } static inline void rb_set_parent_color(struct rb_node *rb, struct rb_node *p, int color) { rb->__rb_parent_color = (unsigned long)p | color; } static inline void __rb_change_child(struct rb_node *old, struct rb_node *new, struct rb_node *parent, struct rb_root *root) { if (parent) { if (parent->rb_left == old) WRITE_ONCE(parent->rb_left, new); else WRITE_ONCE(parent->rb_right, new); } else WRITE_ONCE(root->rb_node, new); } static inline void __rb_change_child_rcu(struct rb_node *old, struct rb_node *new, struct rb_node *parent, struct rb_root *root) { if (parent) { if (parent->rb_left == old) rcu_assign_pointer(parent->rb_left, new); else rcu_assign_pointer(parent->rb_right, new); } else rcu_assign_pointer(root->rb_node, new); } extern void __rb_erase_color(struct rb_node *parent, struct rb_root *root, void (*augment_rotate)(struct rb_node *old, struct rb_node *new)); static __always_inline struct rb_node * __rb_erase_augmented(struct rb_node *node, struct rb_root *root, const struct rb_augment_callbacks *augment) { struct rb_node *child = node->rb_right; struct rb_node *tmp = node->rb_left; struct rb_node *parent, *rebalance; unsigned long pc; if (!tmp) { /* * Case 1: node to erase has no more than 1 child (easy!) * * Note that if there is one child it must be red due to 5) * and node must be black due to 4). We adjust colors locally * so as to bypass __rb_erase_color() later on. */ pc = node->__rb_parent_color; parent = __rb_parent(pc); __rb_change_child(node, child, parent, root); if (child) { child->__rb_parent_color = pc; rebalance = NULL; } else rebalance = __rb_is_black(pc) ? parent : NULL; tmp = parent; } else if (!child) { /* Still case 1, but this time the child is node->rb_left */ tmp->__rb_parent_color = pc = node->__rb_parent_color; parent = __rb_parent(pc); __rb_change_child(node, tmp, parent, root); rebalance = NULL; tmp = parent; } else { struct rb_node *successor = child, *child2; tmp = child->rb_left; if (!tmp) { /* * Case 2: node's successor is its right child * * (n) (s) * / \ / \ * (x) (s) -> (x) (c) * \ * (c) */ parent = successor; child2 = successor->rb_right; augment->copy(node, successor); } else { /* * Case 3: node's successor is leftmost under * node's right child subtree * * (n) (s) * / \ / \ * (x) (y) -> (x) (y) * / / * (p) (p) * / / * (s) (c) * \ * (c) */ do { parent = successor; successor = tmp; tmp = tmp->rb_left; } while (tmp); child2 = successor->rb_right; WRITE_ONCE(parent->rb_left, child2); WRITE_ONCE(successor->rb_right, child); rb_set_parent(child, successor); augment->copy(node, successor); augment->propagate(parent, successor); } tmp = node->rb_left; WRITE_ONCE(successor->rb_left, tmp); rb_set_parent(tmp, successor); pc = node->__rb_parent_color; tmp = __rb_parent(pc); __rb_change_child(node, successor, tmp, root); if (child2) { rb_set_parent_color(child2, parent, RB_BLACK); rebalance = NULL; } else { rebalance = rb_is_black(successor) ? parent : NULL; } successor->__rb_parent_color = pc; tmp = successor; } augment->propagate(tmp, NULL); return rebalance; } static __always_inline void rb_erase_augmented(struct rb_node *node, struct rb_root *root, const struct rb_augment_callbacks *augment) { struct rb_node *rebalance = __rb_erase_augmented(node, root, augment); if (rebalance) __rb_erase_color(rebalance, root, augment->rotate); } static __always_inline void rb_erase_augmented_cached(struct rb_node *node, struct rb_root_cached *root, const struct rb_augment_callbacks *augment) { if (root->rb_leftmost == node) root->rb_leftmost = rb_next(node); rb_erase_augmented(node, &root->rb_root, augment); } #endif /* _LINUX_RBTREE_AUGMENTED_H */ PK ! ��2�~1 ~1 iversion.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IVERSION_H #define _LINUX_IVERSION_H #include <linux/fs.h> /* * The inode->i_version field: * --------------------------- * The change attribute (i_version) is mandated by NFSv4 and is mostly for * knfsd, but is also used for other purposes (e.g. IMA). The i_version must * appear different to observers if there was a change to the inode's data or * metadata since it was last queried. * * Observers see the i_version as a 64-bit number that never decreases. If it * remains the same since it was last checked, then nothing has changed in the * inode. If it's different then something has changed. Observers cannot infer * anything about the nature or magnitude of the changes from the value, only * that the inode has changed in some fashion. * * Not all filesystems properly implement the i_version counter. Subsystems that * want to use i_version field on an inode should first check whether the * filesystem sets the SB_I_VERSION flag (usually via the IS_I_VERSION macro). * * Those that set SB_I_VERSION will automatically have their i_version counter * incremented on writes to normal files. If the SB_I_VERSION is not set, then * the VFS will not touch it on writes, and the filesystem can use it how it * wishes. Note that the filesystem is always responsible for updating the * i_version on namespace changes in directories (mkdir, rmdir, unlink, etc.). * We consider these sorts of filesystems to have a kernel-managed i_version. * * It may be impractical for filesystems to keep i_version updates atomic with * respect to the changes that cause them. They should, however, guarantee * that i_version updates are never visible before the changes that caused * them. Also, i_version updates should never be delayed longer than it takes * the original change to reach disk. * * This implementation uses the low bit in the i_version field as a flag to * track when the value has been queried. If it has not been queried since it * was last incremented, we can skip the increment in most cases. * * In the event that we're updating the ctime, we will usually go ahead and * bump the i_version anyway. Since that has to go to stable storage in some * fashion, we might as well increment it as well. * * With this implementation, the value should always appear to observers to * increase over time if the file has changed. It's recommended to use * inode_eq_iversion() helper to compare values. * * Note that some filesystems (e.g. NFS and AFS) just use the field to store * a server-provided value (for the most part). For that reason, those * filesystems do not set SB_I_VERSION. These filesystems are considered to * have a self-managed i_version. * * Persistently storing the i_version * ---------------------------------- * Queries of the i_version field are not gated on them hitting the backing * store. It's always possible that the host could crash after allowing * a query of the value but before it has made it to disk. * * To mitigate this problem, filesystems should always use * inode_set_iversion_queried when loading an existing inode from disk. This * ensures that the next attempted inode increment will result in the value * changing. * * Storing the value to disk therefore does not count as a query, so those * filesystems should use inode_peek_iversion to grab the value to be stored. * There is no need to flag the value as having been queried in that case. */ /* * We borrow the lowest bit in the i_version to use as a flag to tell whether * it has been queried since we last incremented it. If it has, then we must * increment it on the next change. After that, we can clear the flag and * avoid incrementing it again until it has again been queried. */ #define I_VERSION_QUERIED_SHIFT (1) #define I_VERSION_QUERIED (1ULL << (I_VERSION_QUERIED_SHIFT - 1)) #define I_VERSION_INCREMENT (1ULL << I_VERSION_QUERIED_SHIFT) /** * inode_set_iversion_raw - set i_version to the specified raw value * @inode: inode to set * @val: new i_version value to set * * Set @inode's i_version field to @val. This function is for use by * filesystems that self-manage the i_version. * * For example, the NFS client stores its NFSv4 change attribute in this way, * and the AFS client stores the data_version from the server here. */ static inline void inode_set_iversion_raw(struct inode *inode, u64 val) { atomic64_set(&inode->i_version, val); } /** * inode_peek_iversion_raw - grab a "raw" iversion value * @inode: inode from which i_version should be read * * Grab a "raw" inode->i_version value and return it. The i_version is not * flagged or converted in any way. This is mostly used to access a self-managed * i_version. * * With those filesystems, we want to treat the i_version as an entirely * opaque value. */ static inline u64 inode_peek_iversion_raw(const struct inode *inode) { return atomic64_read(&inode->i_version); } /** * inode_set_max_iversion_raw - update i_version new value is larger * @inode: inode to set * @val: new i_version to set * * Some self-managed filesystems (e.g Ceph) will only update the i_version * value if the new value is larger than the one we already have. */ static inline void inode_set_max_iversion_raw(struct inode *inode, u64 val) { u64 cur, old; cur = inode_peek_iversion_raw(inode); for (;;) { if (cur > val) break; old = atomic64_cmpxchg(&inode->i_version, cur, val); if (likely(old == cur)) break; cur = old; } } /** * inode_set_iversion - set i_version to a particular value * @inode: inode to set * @val: new i_version value to set * * Set @inode's i_version field to @val. This function is for filesystems with * a kernel-managed i_version, for initializing a newly-created inode from * scratch. * * In this case, we do not set the QUERIED flag since we know that this value * has never been queried. */ static inline void inode_set_iversion(struct inode *inode, u64 val) { inode_set_iversion_raw(inode, val << I_VERSION_QUERIED_SHIFT); } /** * inode_set_iversion_queried - set i_version to a particular value as quereied * @inode: inode to set * @val: new i_version value to set * * Set @inode's i_version field to @val, and flag it for increment on the next * change. * * Filesystems that persistently store the i_version on disk should use this * when loading an existing inode from disk. * * When loading in an i_version value from a backing store, we can't be certain * that it wasn't previously viewed before being stored. Thus, we must assume * that it was, to ensure that we don't end up handing out the same value for * different versions of the same inode. */ static inline void inode_set_iversion_queried(struct inode *inode, u64 val) { inode_set_iversion_raw(inode, (val << I_VERSION_QUERIED_SHIFT) | I_VERSION_QUERIED); } /** * inode_maybe_inc_iversion - increments i_version * @inode: inode with the i_version that should be updated * @force: increment the counter even if it's not necessary? * * Every time the inode is modified, the i_version field must be seen to have * changed by any observer. * * If "force" is set or the QUERIED flag is set, then ensure that we increment * the value, and clear the queried flag. * * In the common case where neither is set, then we can return "false" without * updating i_version. * * If this function returns false, and no other metadata has changed, then we * can avoid logging the metadata. */ static inline bool inode_maybe_inc_iversion(struct inode *inode, bool force) { u64 cur, old, new; /* * The i_version field is not strictly ordered with any other inode * information, but the legacy inode_inc_iversion code used a spinlock * to serialize increments. * * Here, we add full memory barriers to ensure that any de-facto * ordering with other info is preserved. * * This barrier pairs with the barrier in inode_query_iversion() */ smp_mb(); cur = inode_peek_iversion_raw(inode); for (;;) { /* If flag is clear then we needn't do anything */ if (!force && !(cur & I_VERSION_QUERIED)) return false; /* Since lowest bit is flag, add 2 to avoid it */ new = (cur & ~I_VERSION_QUERIED) + I_VERSION_INCREMENT; old = atomic64_cmpxchg(&inode->i_version, cur, new); if (likely(old == cur)) break; cur = old; } return true; } /** * inode_inc_iversion - forcibly increment i_version * @inode: inode that needs to be updated * * Forcbily increment the i_version field. This always results in a change to * the observable value. */ static inline void inode_inc_iversion(struct inode *inode) { inode_maybe_inc_iversion(inode, true); } /** * inode_iversion_need_inc - is the i_version in need of being incremented? * @inode: inode to check * * Returns whether the inode->i_version counter needs incrementing on the next * change. Just fetch the value and check the QUERIED flag. */ static inline bool inode_iversion_need_inc(struct inode *inode) { return inode_peek_iversion_raw(inode) & I_VERSION_QUERIED; } /** * inode_inc_iversion_raw - forcibly increment raw i_version * @inode: inode that needs to be updated * * Forcbily increment the raw i_version field. This always results in a change * to the raw value. * * NFS will use the i_version field to store the value from the server. It * mostly treats it as opaque, but in the case where it holds a write * delegation, it must increment the value itself. This function does that. */ static inline void inode_inc_iversion_raw(struct inode *inode) { atomic64_inc(&inode->i_version); } /** * inode_peek_iversion - read i_version without flagging it to be incremented * @inode: inode from which i_version should be read * * Read the inode i_version counter for an inode without registering it as a * query. * * This is typically used by local filesystems that need to store an i_version * on disk. In that situation, it's not necessary to flag it as having been * viewed, as the result won't be used to gauge changes from that point. */ static inline u64 inode_peek_iversion(const struct inode *inode) { return inode_peek_iversion_raw(inode) >> I_VERSION_QUERIED_SHIFT; } /** * inode_query_iversion - read i_version for later use * @inode: inode from which i_version should be read * * Read the inode i_version counter. This should be used by callers that wish * to store the returned i_version for later comparison. This will guarantee * that a later query of the i_version will result in a different value if * anything has changed. * * In this implementation, we fetch the current value, set the QUERIED flag and * then try to swap it into place with a cmpxchg, if it wasn't already set. If * that fails, we try again with the newly fetched value from the cmpxchg. */ static inline u64 inode_query_iversion(struct inode *inode) { u64 cur, old, new; cur = inode_peek_iversion_raw(inode); for (;;) { /* If flag is already set, then no need to swap */ if (cur & I_VERSION_QUERIED) { /* * This barrier (and the implicit barrier in the * cmpxchg below) pairs with the barrier in * inode_maybe_inc_iversion(). */ smp_mb(); break; } new = cur | I_VERSION_QUERIED; old = atomic64_cmpxchg(&inode->i_version, cur, new); if (likely(old == cur)) break; cur = old; } return cur >> I_VERSION_QUERIED_SHIFT; } /* * For filesystems without any sort of change attribute, the best we can * do is fake one up from the ctime: */ static inline u64 time_to_chattr(struct timespec64 *t) { u64 chattr = t->tv_sec; chattr <<= 32; chattr += t->tv_nsec; return chattr; } /** * inode_eq_iversion_raw - check whether the raw i_version counter has changed * @inode: inode to check * @old: old value to check against its i_version * * Compare the current raw i_version counter with a previous one. Returns true * if they are the same or false if they are different. */ static inline bool inode_eq_iversion_raw(const struct inode *inode, u64 old) { return inode_peek_iversion_raw(inode) == old; } /** * inode_eq_iversion - check whether the i_version counter has changed * @inode: inode to check * @old: old value to check against its i_version * * Compare an i_version counter with a previous one. Returns true if they are * the same, and false if they are different. * * Note that we don't need to set the QUERIED flag in this case, as the value * in the inode is not being recorded for later use. */ static inline bool inode_eq_iversion(const struct inode *inode, u64 old) { return inode_peek_iversion(inode) == old; } #endif PK ! F��� � mc146818rtc.hnu �[��� /* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993 * derived from Data Sheet, Copyright Motorola 1984 (!). * It was written to be part of the Linux operating system. */ /* permission is hereby granted to copy, modify and redistribute this code * in terms of the GNU Library General Public License, Version 2 or later, * at your option. */ #ifndef _MC146818RTC_H #define _MC146818RTC_H #include <asm/io.h> #include <linux/rtc.h> /* get the user-level API */ #include <asm/mc146818rtc.h> /* register access macros */ #include <linux/bcd.h> #include <linux/delay.h> #include <linux/pm-trace.h> #ifdef __KERNEL__ #include <linux/spinlock.h> /* spinlock_t */ extern spinlock_t rtc_lock; /* serialize CMOS RAM access */ /* Some RTCs extend the mc146818 register set to support alarms of more * than 24 hours in the future; or dates that include a century code. * This platform_data structure can pass this information to the driver. * * Also, some platforms need suspend()/resume() hooks to kick in special * handling of wake alarms, e.g. activating ACPI BIOS hooks or setting up * a separate wakeup alarm used by some almost-clone chips. */ struct cmos_rtc_board_info { void (*wake_on)(struct device *dev); void (*wake_off)(struct device *dev); u32 flags; #define CMOS_RTC_FLAGS_NOFREQ (1 << 0) int address_space; u8 rtc_day_alarm; /* zero, or register index */ u8 rtc_mon_alarm; /* zero, or register index */ u8 rtc_century; /* zero, or register index */ }; #endif /********************************************************************** * register summary **********************************************************************/ #define RTC_SECONDS 0 #define RTC_SECONDS_ALARM 1 #define RTC_MINUTES 2 #define RTC_MINUTES_ALARM 3 #define RTC_HOURS 4 #define RTC_HOURS_ALARM 5 /* RTC_*_alarm is always true if 2 MSBs are set */ # define RTC_ALARM_DONT_CARE 0xC0 #define RTC_DAY_OF_WEEK 6 #define RTC_DAY_OF_MONTH 7 #define RTC_MONTH 8 #define RTC_YEAR 9 /* control registers - Moto names */ #define RTC_REG_A 10 #define RTC_REG_B 11 #define RTC_REG_C 12 #define RTC_REG_D 13 /********************************************************************** * register details **********************************************************************/ #define RTC_FREQ_SELECT RTC_REG_A /* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, * totalling to a max high interval of 2.228 ms. */ # define RTC_UIP 0x80 # define RTC_DIV_CTL 0x70 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */ # define RTC_REF_CLCK_4MHZ 0x00 # define RTC_REF_CLCK_1MHZ 0x10 # define RTC_REF_CLCK_32KHZ 0x20 /* 2 values for divider stage reset, others for "testing purposes only" */ # define RTC_DIV_RESET1 0x60 # define RTC_DIV_RESET2 0x70 /* In AMD BKDG bit 5 and 6 are reserved, bit 4 is for select dv0 bank */ # define RTC_AMD_BANK_SELECT 0x10 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */ # define RTC_RATE_SELECT 0x0F /**********************************************************************/ #define RTC_CONTROL RTC_REG_B # define RTC_SET 0x80 /* disable updates for clock setting */ # define RTC_PIE 0x40 /* periodic interrupt enable */ # define RTC_AIE 0x20 /* alarm interrupt enable */ # define RTC_UIE 0x10 /* update-finished interrupt enable */ # define RTC_SQWE 0x08 /* enable square-wave output */ # define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ # define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ # define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ /**********************************************************************/ #define RTC_INTR_FLAGS RTC_REG_C /* caution - cleared by read */ # define RTC_IRQF 0x80 /* any of the following 3 is active */ # define RTC_PF 0x40 # define RTC_AF 0x20 # define RTC_UF 0x10 /**********************************************************************/ #define RTC_VALID RTC_REG_D # define RTC_VRT 0x80 /* valid RAM and time */ /**********************************************************************/ #ifndef ARCH_RTC_LOCATION /* Override by <asm/mc146818rtc.h>? */ #define RTC_IO_EXTENT 0x8 #define RTC_IO_EXTENT_USED 0x2 #define RTC_IOMAPPED 1 /* Default to I/O mapping. */ #else #define RTC_IO_EXTENT_USED RTC_IO_EXTENT #endif /* ARCH_RTC_LOCATION */ bool mc146818_does_rtc_work(void); int mc146818_get_time(struct rtc_time *time); int mc146818_set_time(struct rtc_time *time); bool mc146818_avoid_UIP(void (*callback)(unsigned char seconds, void *param), void *param); #endif /* _MC146818RTC_H */ PK ! NJs�! ! xxhash.hnu �[��� /* * xxHash - Extremely Fast Hash algorithm * Copyright (C) 2012-2016, Yann Collet. * * BSD 2-Clause License (http://www.opensource.org/licenses/bsd-license.php) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following disclaimer * in the documentation and/or other materials provided with the * distribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * This program is free software; you can redistribute it and/or modify it under * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. This program is dual-licensed; you may select * either version 2 of the GNU General Public License ("GPL") or BSD license * ("BSD"). * * You can contact the author at: * - xxHash homepage: https://cyan4973.github.io/xxHash/ * - xxHash source repository: https://github.com/Cyan4973/xxHash */ /* * Notice extracted from xxHash homepage: * * xxHash is an extremely fast Hash algorithm, running at RAM speed limits. * It also successfully passes all tests from the SMHasher suite. * * Comparison (single thread, Windows Seven 32 bits, using SMHasher on a Core 2 * Duo @3GHz) * * Name Speed Q.Score Author * xxHash 5.4 GB/s 10 * CrapWow 3.2 GB/s 2 Andrew * MumurHash 3a 2.7 GB/s 10 Austin Appleby * SpookyHash 2.0 GB/s 10 Bob Jenkins * SBox 1.4 GB/s 9 Bret Mulvey * Lookup3 1.2 GB/s 9 Bob Jenkins * SuperFastHash 1.2 GB/s 1 Paul Hsieh * CityHash64 1.05 GB/s 10 Pike & Alakuijala * FNV 0.55 GB/s 5 Fowler, Noll, Vo * CRC32 0.43 GB/s 9 * MD5-32 0.33 GB/s 10 Ronald L. Rivest * SHA1-32 0.28 GB/s 10 * * Q.Score is a measure of quality of the hash function. * It depends on successfully passing SMHasher test set. * 10 is a perfect score. * * A 64-bits version, named xxh64 offers much better speed, * but for 64-bits applications only. * Name Speed on 64 bits Speed on 32 bits * xxh64 13.8 GB/s 1.9 GB/s * xxh32 6.8 GB/s 6.0 GB/s */ #ifndef XXHASH_H #define XXHASH_H #include <linux/types.h> /*-**************************** * Simple Hash Functions *****************************/ /** * xxh32() - calculate the 32-bit hash of the input with a given seed. * * @input: The data to hash. * @length: The length of the data to hash. * @seed: The seed can be used to alter the result predictably. * * Speed on Core 2 Duo @ 3 GHz (single thread, SMHasher benchmark) : 5.4 GB/s * * Return: The 32-bit hash of the data. */ uint32_t xxh32(const void *input, size_t length, uint32_t seed); /** * xxh64() - calculate the 64-bit hash of the input with a given seed. * * @input: The data to hash. * @length: The length of the data to hash. * @seed: The seed can be used to alter the result predictably. * * This function runs 2x faster on 64-bit systems, but slower on 32-bit systems. * * Return: The 64-bit hash of the data. */ uint64_t xxh64(const void *input, size_t length, uint64_t seed); /** * xxhash() - calculate wordsize hash of the input with a given seed * @input: The data to hash. * @length: The length of the data to hash. * @seed: The seed can be used to alter the result predictably. * * If the hash does not need to be comparable between machines with * different word sizes, this function will call whichever of xxh32() * or xxh64() is faster. * * Return: wordsize hash of the data. */ static inline unsigned long xxhash(const void *input, size_t length, uint64_t seed) { #if BITS_PER_LONG == 64 return xxh64(input, length, seed); #else return xxh32(input, length, seed); #endif } /*-**************************** * Streaming Hash Functions *****************************/ /* * These definitions are only meant to allow allocation of XXH state * statically, on stack, or in a struct for example. * Do not use members directly. */ /** * struct xxh32_state - private xxh32 state, do not use members directly */ struct xxh32_state { uint32_t total_len_32; uint32_t large_len; uint32_t v1; uint32_t v2; uint32_t v3; uint32_t v4; uint32_t mem32[4]; uint32_t memsize; }; /** * struct xxh32_state - private xxh64 state, do not use members directly */ struct xxh64_state { uint64_t total_len; uint64_t v1; uint64_t v2; uint64_t v3; uint64_t v4; uint64_t mem64[4]; uint32_t memsize; }; /** * xxh32_reset() - reset the xxh32 state to start a new hashing operation * * @state: The xxh32 state to reset. * @seed: Initialize the hash state with this seed. * * Call this function on any xxh32_state to prepare for a new hashing operation. */ void xxh32_reset(struct xxh32_state *state, uint32_t seed); /** * xxh32_update() - hash the data given and update the xxh32 state * * @state: The xxh32 state to update. * @input: The data to hash. * @length: The length of the data to hash. * * After calling xxh32_reset() call xxh32_update() as many times as necessary. * * Return: Zero on success, otherwise an error code. */ int xxh32_update(struct xxh32_state *state, const void *input, size_t length); /** * xxh32_digest() - produce the current xxh32 hash * * @state: Produce the current xxh32 hash of this state. * * A hash value can be produced at any time. It is still possible to continue * inserting input into the hash state after a call to xxh32_digest(), and * generate new hashes later on, by calling xxh32_digest() again. * * Return: The xxh32 hash stored in the state. */ uint32_t xxh32_digest(const struct xxh32_state *state); /** * xxh64_reset() - reset the xxh64 state to start a new hashing operation * * @state: The xxh64 state to reset. * @seed: Initialize the hash state with this seed. */ void xxh64_reset(struct xxh64_state *state, uint64_t seed); /** * xxh64_update() - hash the data given and update the xxh64 state * @state: The xxh64 state to update. * @input: The data to hash. * @length: The length of the data to hash. * * After calling xxh64_reset() call xxh64_update() as many times as necessary. * * Return: Zero on success, otherwise an error code. */ int xxh64_update(struct xxh64_state *state, const void *input, size_t length); /** * xxh64_digest() - produce the current xxh64 hash * * @state: Produce the current xxh64 hash of this state. * * A hash value can be produced at any time. It is still possible to continue * inserting input into the hash state after a call to xxh64_digest(), and * generate new hashes later on, by calling xxh64_digest() again. * * Return: The xxh64 hash stored in the state. */ uint64_t xxh64_digest(const struct xxh64_state *state); /*-************************** * Utils ***************************/ /** * xxh32_copy_state() - copy the source state into the destination state * * @src: The source xxh32 state. * @dst: The destination xxh32 state. */ void xxh32_copy_state(struct xxh32_state *dst, const struct xxh32_state *src); /** * xxh64_copy_state() - copy the source state into the destination state * * @src: The source xxh64 state. * @dst: The destination xxh64 state. */ void xxh64_copy_state(struct xxh64_state *dst, const struct xxh64_state *src); #endif /* XXHASH_H */ PK ! ��љ mmdebug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_MM_DEBUG_H #define LINUX_MM_DEBUG_H 1 #include <linux/bug.h> #include <linux/stringify.h> struct page; struct vm_area_struct; struct mm_struct; void dump_page(struct page *page, const char *reason); void dump_vma(const struct vm_area_struct *vma); void dump_mm(const struct mm_struct *mm); #ifdef CONFIG_DEBUG_VM #define VM_BUG_ON(cond) BUG_ON(cond) #define VM_BUG_ON_PAGE(cond, page) \ do { \ if (unlikely(cond)) { \ dump_page(page, "VM_BUG_ON_PAGE(" __stringify(cond)")");\ BUG(); \ } \ } while (0) #define VM_BUG_ON_VMA(cond, vma) \ do { \ if (unlikely(cond)) { \ dump_vma(vma); \ BUG(); \ } \ } while (0) #define VM_BUG_ON_MM(cond, mm) \ do { \ if (unlikely(cond)) { \ dump_mm(mm); \ BUG(); \ } \ } while (0) #define VM_WARN_ON_ONCE_PAGE(cond, page) ({ \ static bool __section(".data.once") __warned; \ int __ret_warn_once = !!(cond); \ \ if (unlikely(__ret_warn_once && !__warned)) { \ dump_page(page, "VM_WARN_ON_ONCE_PAGE(" __stringify(cond)")");\ __warned = true; \ WARN_ON(1); \ } \ unlikely(__ret_warn_once); \ }) #define VM_WARN_ON(cond) (void)WARN_ON(cond) #define VM_WARN_ON_ONCE(cond) (void)WARN_ON_ONCE(cond) #define VM_WARN_ONCE(cond, format...) (void)WARN_ONCE(cond, format) #define VM_WARN(cond, format...) (void)WARN(cond, format) #else #define VM_BUG_ON(cond) BUILD_BUG_ON_INVALID(cond) #define VM_BUG_ON_PAGE(cond, page) VM_BUG_ON(cond) #define VM_BUG_ON_VMA(cond, vma) VM_BUG_ON(cond) #define VM_BUG_ON_MM(cond, mm) VM_BUG_ON(cond) #define VM_WARN_ON(cond) BUILD_BUG_ON_INVALID(cond) #define VM_WARN_ON_ONCE(cond) BUILD_BUG_ON_INVALID(cond) #define VM_WARN_ON_ONCE_PAGE(cond, page) BUILD_BUG_ON_INVALID(cond) #define VM_WARN_ONCE(cond, format...) BUILD_BUG_ON_INVALID(cond) #define VM_WARN(cond, format...) BUILD_BUG_ON_INVALID(cond) #endif #ifdef CONFIG_DEBUG_VIRTUAL #define VIRTUAL_BUG_ON(cond) BUG_ON(cond) #else #define VIRTUAL_BUG_ON(cond) do { } while (0) #endif #ifdef CONFIG_DEBUG_VM_PGFLAGS #define VM_BUG_ON_PGFLAGS(cond, page) VM_BUG_ON_PAGE(cond, page) #else #define VM_BUG_ON_PGFLAGS(cond, page) BUILD_BUG_ON_INVALID(cond) #endif #endif PK ! ��&A� � iscsi_boot_sysfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Export the iSCSI boot info to userland via sysfs. * * Copyright (C) 2010 Red Hat, Inc. All rights reserved. * Copyright (C) 2010 Mike Christie */ #ifndef _ISCSI_BOOT_SYSFS_ #define _ISCSI_BOOT_SYSFS_ /* * The text attributes names for each of the kobjects. */ enum iscsi_boot_eth_properties_enum { ISCSI_BOOT_ETH_INDEX, ISCSI_BOOT_ETH_FLAGS, ISCSI_BOOT_ETH_IP_ADDR, ISCSI_BOOT_ETH_PREFIX_LEN, ISCSI_BOOT_ETH_SUBNET_MASK, ISCSI_BOOT_ETH_ORIGIN, ISCSI_BOOT_ETH_GATEWAY, ISCSI_BOOT_ETH_PRIMARY_DNS, ISCSI_BOOT_ETH_SECONDARY_DNS, ISCSI_BOOT_ETH_DHCP, ISCSI_BOOT_ETH_VLAN, ISCSI_BOOT_ETH_MAC, /* eth_pci_bdf - this is replaced by link to the device itself. */ ISCSI_BOOT_ETH_HOSTNAME, ISCSI_BOOT_ETH_END_MARKER, }; enum iscsi_boot_tgt_properties_enum { ISCSI_BOOT_TGT_INDEX, ISCSI_BOOT_TGT_FLAGS, ISCSI_BOOT_TGT_IP_ADDR, ISCSI_BOOT_TGT_PORT, ISCSI_BOOT_TGT_LUN, ISCSI_BOOT_TGT_CHAP_TYPE, ISCSI_BOOT_TGT_NIC_ASSOC, ISCSI_BOOT_TGT_NAME, ISCSI_BOOT_TGT_CHAP_NAME, ISCSI_BOOT_TGT_CHAP_SECRET, ISCSI_BOOT_TGT_REV_CHAP_NAME, ISCSI_BOOT_TGT_REV_CHAP_SECRET, ISCSI_BOOT_TGT_END_MARKER, }; enum iscsi_boot_initiator_properties_enum { ISCSI_BOOT_INI_INDEX, ISCSI_BOOT_INI_FLAGS, ISCSI_BOOT_INI_ISNS_SERVER, ISCSI_BOOT_INI_SLP_SERVER, ISCSI_BOOT_INI_PRI_RADIUS_SERVER, ISCSI_BOOT_INI_SEC_RADIUS_SERVER, ISCSI_BOOT_INI_INITIATOR_NAME, ISCSI_BOOT_INI_END_MARKER, }; enum iscsi_boot_acpitbl_properties_enum { ISCSI_BOOT_ACPITBL_SIGNATURE, ISCSI_BOOT_ACPITBL_OEM_ID, ISCSI_BOOT_ACPITBL_OEM_TABLE_ID, }; struct attribute_group; struct iscsi_boot_kobj { struct kobject kobj; struct attribute_group *attr_group; struct list_head list; /* * Pointer to store driver specific info. If set this will * be freed for the LLD when the kobj release function is called. */ void *data; /* * Driver specific show function. * * The enum of the type. This can be any value of the above * properties. */ ssize_t (*show) (void *data, int type, char *buf); /* * Drivers specific visibility function. * The function should return if they the attr should be readable * writable or should not be shown. * * The enum of the type. This can be any value of the above * properties. */ umode_t (*is_visible) (void *data, int type); /* * Driver specific release function. * * The function should free the data passed in. */ void (*release) (void *data); }; struct iscsi_boot_kset { struct list_head kobj_list; struct kset *kset; }; struct iscsi_boot_kobj * iscsi_boot_create_initiator(struct iscsi_boot_kset *boot_kset, int index, void *data, ssize_t (*show) (void *data, int type, char *buf), umode_t (*is_visible) (void *data, int type), void (*release) (void *data)); struct iscsi_boot_kobj * iscsi_boot_create_ethernet(struct iscsi_boot_kset *boot_kset, int index, void *data, ssize_t (*show) (void *data, int type, char *buf), umode_t (*is_visible) (void *data, int type), void (*release) (void *data)); struct iscsi_boot_kobj * iscsi_boot_create_target(struct iscsi_boot_kset *boot_kset, int index, void *data, ssize_t (*show) (void *data, int type, char *buf), umode_t (*is_visible) (void *data, int type), void (*release) (void *data)); struct iscsi_boot_kobj * iscsi_boot_create_acpitbl(struct iscsi_boot_kset *boot_kset, int index, void *data, ssize_t (*show)(void *data, int type, char *buf), umode_t (*is_visible)(void *data, int type), void (*release)(void *data)); struct iscsi_boot_kset *iscsi_boot_create_kset(const char *set_name); struct iscsi_boot_kset *iscsi_boot_create_host_kset(unsigned int hostno); void iscsi_boot_destroy_kset(struct iscsi_boot_kset *boot_kset); #endif PK ! )��� init_syscalls.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ int __init init_mount(const char *dev_name, const char *dir_name, const char *type_page, unsigned long flags, void *data_page); int __init init_umount(const char *name, int flags); int __init init_chdir(const char *filename); int __init init_chroot(const char *filename); int __init init_chown(const char *filename, uid_t user, gid_t group, int flags); int __init init_chmod(const char *filename, umode_t mode); int __init init_eaccess(const char *filename); int __init init_stat(const char *filename, struct kstat *stat, int flags); int __init init_mknod(const char *filename, umode_t mode, unsigned int dev); int __init init_link(const char *oldname, const char *newname); int __init init_symlink(const char *oldname, const char *newname); int __init init_unlink(const char *pathname); int __init init_mkdir(const char *pathname, umode_t mode); int __init init_rmdir(const char *pathname); int __init init_utimes(char *filename, struct timespec64 *ts); int __init init_dup(struct file *file); PK ! Ķ�T4 4 nfs_fs_i.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NFS_FS_I #define _NFS_FS_I struct nlm_lockowner; /* * NFS lock info */ struct nfs_lock_info { u32 state; struct nlm_lockowner *owner; struct list_head list; }; struct nfs4_lock_state; struct nfs4_lock_info { struct nfs4_lock_state *owner; }; #endif PK ! }R�� � fanotify.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FANOTIFY_H #define _LINUX_FANOTIFY_H #include <linux/sysctl.h> #include <uapi/linux/fanotify.h> extern struct ctl_table fanotify_table[]; /* for sysctl */ #define FAN_GROUP_FLAG(group, flag) \ ((group)->fanotify_data.flags & (flag)) /* * Flags allowed to be passed from/to userspace. * * We intentionally do not add new bits to the old FAN_ALL_* constants, because * they are uapi exposed constants. If there are programs out there using * these constant, the programs may break if re-compiled with new uapi headers * and then run on an old kernel. */ /* Group classes where permission events are allowed */ #define FANOTIFY_PERM_CLASSES (FAN_CLASS_CONTENT | \ FAN_CLASS_PRE_CONTENT) #define FANOTIFY_CLASS_BITS (FAN_CLASS_NOTIF | FANOTIFY_PERM_CLASSES) #define FANOTIFY_FID_BITS (FAN_REPORT_DFID_NAME_TARGET) #define FANOTIFY_INFO_MODES (FANOTIFY_FID_BITS | FAN_REPORT_PIDFD) /* * fanotify_init() flags that require CAP_SYS_ADMIN. * We do not allow unprivileged groups to request permission events. * We do not allow unprivileged groups to get other process pid in events. * We do not allow unprivileged groups to use unlimited resources. */ #define FANOTIFY_ADMIN_INIT_FLAGS (FANOTIFY_PERM_CLASSES | \ FAN_REPORT_TID | \ FAN_REPORT_PIDFD | \ FAN_UNLIMITED_QUEUE | \ FAN_UNLIMITED_MARKS) /* * fanotify_init() flags that are allowed for user without CAP_SYS_ADMIN. * FAN_CLASS_NOTIF is the only class we allow for unprivileged group. * We do not allow unprivileged groups to get file descriptors in events, * so one of the flags for reporting file handles is required. */ #define FANOTIFY_USER_INIT_FLAGS (FAN_CLASS_NOTIF | \ FANOTIFY_FID_BITS | \ FAN_CLOEXEC | FAN_NONBLOCK) #define FANOTIFY_INIT_FLAGS (FANOTIFY_ADMIN_INIT_FLAGS | \ FANOTIFY_USER_INIT_FLAGS) /* Internal group flags */ #define FANOTIFY_UNPRIV 0x80000000 #define FANOTIFY_INTERNAL_GROUP_FLAGS (FANOTIFY_UNPRIV) #define FANOTIFY_MARK_TYPE_BITS (FAN_MARK_INODE | FAN_MARK_MOUNT | \ FAN_MARK_FILESYSTEM) #define FANOTIFY_MARK_CMD_BITS (FAN_MARK_ADD | FAN_MARK_REMOVE | \ FAN_MARK_FLUSH) #define FANOTIFY_MARK_IGNORE_BITS (FAN_MARK_IGNORED_MASK | \ FAN_MARK_IGNORE) #define FANOTIFY_MARK_FLAGS (FANOTIFY_MARK_TYPE_BITS | \ FANOTIFY_MARK_CMD_BITS | \ FANOTIFY_MARK_IGNORE_BITS | \ FAN_MARK_DONT_FOLLOW | \ FAN_MARK_ONLYDIR | \ FAN_MARK_IGNORED_SURV_MODIFY | \ FAN_MARK_EVICTABLE) /* * Events that can be reported with data type FSNOTIFY_EVENT_PATH. * Note that FAN_MODIFY can also be reported with data type * FSNOTIFY_EVENT_INODE. */ #define FANOTIFY_PATH_EVENTS (FAN_ACCESS | FAN_MODIFY | \ FAN_CLOSE | FAN_OPEN | FAN_OPEN_EXEC) /* * Directory entry modification events - reported only to directory * where entry is modified and not to a watching parent. */ #define FANOTIFY_DIRENT_EVENTS (FAN_MOVE | FAN_CREATE | FAN_DELETE | \ FAN_RENAME) /* Events that can be reported with event->fd */ #define FANOTIFY_FD_EVENTS (FANOTIFY_PATH_EVENTS | FANOTIFY_PERM_EVENTS) /* Events that can only be reported with data type FSNOTIFY_EVENT_INODE */ #define FANOTIFY_INODE_EVENTS (FANOTIFY_DIRENT_EVENTS | \ FAN_ATTRIB | FAN_MOVE_SELF | FAN_DELETE_SELF) /* Events that can only be reported with data type FSNOTIFY_EVENT_ERROR */ #define FANOTIFY_ERROR_EVENTS (FAN_FS_ERROR) /* Events that user can request to be notified on */ #define FANOTIFY_EVENTS (FANOTIFY_PATH_EVENTS | \ FANOTIFY_INODE_EVENTS | \ FANOTIFY_ERROR_EVENTS) /* Events that require a permission response from user */ #define FANOTIFY_PERM_EVENTS (FAN_OPEN_PERM | FAN_ACCESS_PERM | \ FAN_OPEN_EXEC_PERM) /* Extra flags that may be reported with event or control handling of events */ #define FANOTIFY_EVENT_FLAGS (FAN_EVENT_ON_CHILD | FAN_ONDIR) /* Events that may be reported to user */ #define FANOTIFY_OUTGOING_EVENTS (FANOTIFY_EVENTS | \ FANOTIFY_PERM_EVENTS | \ FAN_Q_OVERFLOW | FAN_ONDIR) /* Events and flags relevant only for directories */ #define FANOTIFY_DIRONLY_EVENT_BITS (FANOTIFY_DIRENT_EVENTS | \ FAN_EVENT_ON_CHILD | FAN_ONDIR) #define ALL_FANOTIFY_EVENT_BITS (FANOTIFY_OUTGOING_EVENTS | \ FANOTIFY_EVENT_FLAGS) /* Do not use these old uapi constants internally */ #undef FAN_ALL_CLASS_BITS #undef FAN_ALL_INIT_FLAGS #undef FAN_ALL_MARK_FLAGS #undef FAN_ALL_EVENTS #undef FAN_ALL_PERM_EVENTS #undef FAN_ALL_OUTGOING_EVENTS #endif /* _LINUX_FANOTIFY_H */ PK ! ���% % pnfs_osd_xdr.hnu �[��� /* * pNFS-osd on-the-wire data structures * * Copyright (C) 2007 Panasas Inc. [year of first publication] * All rights reserved. * * Benny Halevy <bhalevy@panasas.com> * Boaz Harrosh <ooo@electrozaur.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 * See the file COPYING included with this distribution for more details. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the Panasas company nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef __PNFS_OSD_XDR_H__ #define __PNFS_OSD_XDR_H__ #include <linux/nfs_fs.h> /* * draft-ietf-nfsv4-minorversion-22 * draft-ietf-nfsv4-pnfs-obj-12 */ /* Layout Structure */ enum pnfs_osd_raid_algorithm4 { PNFS_OSD_RAID_0 = 1, PNFS_OSD_RAID_4 = 2, PNFS_OSD_RAID_5 = 3, PNFS_OSD_RAID_PQ = 4 /* Reed-Solomon P+Q */ }; /* struct pnfs_osd_data_map4 { * uint32_t odm_num_comps; * length4 odm_stripe_unit; * uint32_t odm_group_width; * uint32_t odm_group_depth; * uint32_t odm_mirror_cnt; * pnfs_osd_raid_algorithm4 odm_raid_algorithm; * }; */ struct pnfs_osd_data_map { u32 odm_num_comps; u64 odm_stripe_unit; u32 odm_group_width; u32 odm_group_depth; u32 odm_mirror_cnt; u32 odm_raid_algorithm; }; /* struct pnfs_osd_objid4 { * deviceid4 oid_device_id; * uint64_t oid_partition_id; * uint64_t oid_object_id; * }; */ struct pnfs_osd_objid { struct nfs4_deviceid oid_device_id; u64 oid_partition_id; u64 oid_object_id; }; /* For printout. I use: * kprint("dev(%llx:%llx)", _DEVID_LO(pointer), _DEVID_HI(pointer)); * BE style */ #define _DEVID_LO(oid_device_id) \ (unsigned long long)be64_to_cpup((__be64 *)(oid_device_id)->data) #define _DEVID_HI(oid_device_id) \ (unsigned long long)be64_to_cpup(((__be64 *)(oid_device_id)->data) + 1) enum pnfs_osd_version { PNFS_OSD_MISSING = 0, PNFS_OSD_VERSION_1 = 1, PNFS_OSD_VERSION_2 = 2 }; struct pnfs_osd_opaque_cred { u32 cred_len; void *cred; }; enum pnfs_osd_cap_key_sec { PNFS_OSD_CAP_KEY_SEC_NONE = 0, PNFS_OSD_CAP_KEY_SEC_SSV = 1, }; /* struct pnfs_osd_object_cred4 { * pnfs_osd_objid4 oc_object_id; * pnfs_osd_version4 oc_osd_version; * pnfs_osd_cap_key_sec4 oc_cap_key_sec; * opaque oc_capability_key<>; * opaque oc_capability<>; * }; */ struct pnfs_osd_object_cred { struct pnfs_osd_objid oc_object_id; u32 oc_osd_version; u32 oc_cap_key_sec; struct pnfs_osd_opaque_cred oc_cap_key; struct pnfs_osd_opaque_cred oc_cap; }; /* struct pnfs_osd_layout4 { * pnfs_osd_data_map4 olo_map; * uint32_t olo_comps_index; * pnfs_osd_object_cred4 olo_components<>; * }; */ struct pnfs_osd_layout { struct pnfs_osd_data_map olo_map; u32 olo_comps_index; u32 olo_num_comps; struct pnfs_osd_object_cred *olo_comps; }; /* Device Address */ enum pnfs_osd_targetid_type { OBJ_TARGET_ANON = 1, OBJ_TARGET_SCSI_NAME = 2, OBJ_TARGET_SCSI_DEVICE_ID = 3, }; /* union pnfs_osd_targetid4 switch (pnfs_osd_targetid_type4 oti_type) { * case OBJ_TARGET_SCSI_NAME: * string oti_scsi_name<>; * * case OBJ_TARGET_SCSI_DEVICE_ID: * opaque oti_scsi_device_id<>; * * default: * void; * }; * * union pnfs_osd_targetaddr4 switch (bool ota_available) { * case TRUE: * netaddr4 ota_netaddr; * case FALSE: * void; * }; * * struct pnfs_osd_deviceaddr4 { * pnfs_osd_targetid4 oda_targetid; * pnfs_osd_targetaddr4 oda_targetaddr; * uint64_t oda_lun; * opaque oda_systemid<>; * pnfs_osd_object_cred4 oda_root_obj_cred; * opaque oda_osdname<>; * }; */ struct pnfs_osd_targetid { u32 oti_type; struct nfs4_string oti_scsi_device_id; }; /* struct netaddr4 { * // see struct rpcb in RFC1833 * string r_netid<>; // network id * string r_addr<>; // universal address * }; */ struct pnfs_osd_net_addr { struct nfs4_string r_netid; struct nfs4_string r_addr; }; struct pnfs_osd_targetaddr { u32 ota_available; struct pnfs_osd_net_addr ota_netaddr; }; struct pnfs_osd_deviceaddr { struct pnfs_osd_targetid oda_targetid; struct pnfs_osd_targetaddr oda_targetaddr; u8 oda_lun[8]; struct nfs4_string oda_systemid; struct pnfs_osd_object_cred oda_root_obj_cred; struct nfs4_string oda_osdname; }; /* LAYOUTCOMMIT: layoutupdate */ /* union pnfs_osd_deltaspaceused4 switch (bool dsu_valid) { * case TRUE: * int64_t dsu_delta; * case FALSE: * void; * }; * * struct pnfs_osd_layoutupdate4 { * pnfs_osd_deltaspaceused4 olu_delta_space_used; * bool olu_ioerr_flag; * }; */ struct pnfs_osd_layoutupdate { u32 dsu_valid; s64 dsu_delta; u32 olu_ioerr_flag; }; /* LAYOUTRETURN: I/O Rrror Report */ enum pnfs_osd_errno { PNFS_OSD_ERR_EIO = 1, PNFS_OSD_ERR_NOT_FOUND = 2, PNFS_OSD_ERR_NO_SPACE = 3, PNFS_OSD_ERR_BAD_CRED = 4, PNFS_OSD_ERR_NO_ACCESS = 5, PNFS_OSD_ERR_UNREACHABLE = 6, PNFS_OSD_ERR_RESOURCE = 7 }; /* struct pnfs_osd_ioerr4 { * pnfs_osd_objid4 oer_component; * length4 oer_comp_offset; * length4 oer_comp_length; * bool oer_iswrite; * pnfs_osd_errno4 oer_errno; * }; */ struct pnfs_osd_ioerr { struct pnfs_osd_objid oer_component; u64 oer_comp_offset; u64 oer_comp_length; u32 oer_iswrite; u32 oer_errno; }; /* OSD XDR Client API */ /* Layout helpers */ /* Layout decoding is done in two parts: * 1. First Call pnfs_osd_xdr_decode_layout_map to read in only the header part * of the layout. @iter members need not be initialized. * Returned: * @layout members are set. (@layout->olo_comps set to NULL). * * Zero on success, or negative error if passed xdr is broken. * * 2. 2nd Call pnfs_osd_xdr_decode_layout_comp() in a loop until it returns * false, to decode the next component. * Returned: * true if there is more to decode or false if we are done or error. * * Example: * struct pnfs_osd_xdr_decode_layout_iter iter; * struct pnfs_osd_layout layout; * struct pnfs_osd_object_cred comp; * int status; * * status = pnfs_osd_xdr_decode_layout_map(&layout, &iter, xdr); * if (unlikely(status)) * goto err; * while(pnfs_osd_xdr_decode_layout_comp(&comp, &iter, xdr, &status)) { * // All of @comp strings point to inside the xdr_buffer * // or scrach buffer. Copy them out to user memory eg. * copy_single_comp(dest_comp++, &comp); * } * if (unlikely(status)) * goto err; */ struct pnfs_osd_xdr_decode_layout_iter { unsigned total_comps; unsigned decoded_comps; }; extern int pnfs_osd_xdr_decode_layout_map(struct pnfs_osd_layout *layout, struct pnfs_osd_xdr_decode_layout_iter *iter, struct xdr_stream *xdr); extern bool pnfs_osd_xdr_decode_layout_comp(struct pnfs_osd_object_cred *comp, struct pnfs_osd_xdr_decode_layout_iter *iter, struct xdr_stream *xdr, int *err); /* Device Info helpers */ /* Note: All strings inside @deviceaddr point to space inside @p. * @p should stay valid while @deviceaddr is in use. */ extern void pnfs_osd_xdr_decode_deviceaddr( struct pnfs_osd_deviceaddr *deviceaddr, __be32 *p); /* layoutupdate (layout_commit) xdr helpers */ extern int pnfs_osd_xdr_encode_layoutupdate(struct xdr_stream *xdr, struct pnfs_osd_layoutupdate *lou); /* osd_ioerror encoding (layout_return) */ extern __be32 *pnfs_osd_xdr_ioerr_reserve_space(struct xdr_stream *xdr); extern void pnfs_osd_xdr_encode_ioerr(__be32 *p, struct pnfs_osd_ioerr *ioerr); #endif /* __PNFS_OSD_XDR_H__ */ PK ! ��; ; ring_buffer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RING_BUFFER_H #define _LINUX_RING_BUFFER_H #include <linux/mm.h> #include <linux/seq_file.h> #include <linux/poll.h> struct trace_buffer; struct ring_buffer_iter; /* * Don't refer to this struct directly, use functions below. */ struct ring_buffer_event { u32 type_len:5, time_delta:27; u32 array[]; }; /** * enum ring_buffer_type - internal ring buffer types * * @RINGBUF_TYPE_PADDING: Left over page padding or discarded event * If time_delta is 0: * array is ignored * size is variable depending on how much * padding is needed * If time_delta is non zero: * array[0] holds the actual length * size = 4 + length (bytes) * * @RINGBUF_TYPE_TIME_EXTEND: Extend the time delta * array[0] = time delta (28 .. 59) * size = 8 bytes * * @RINGBUF_TYPE_TIME_STAMP: Absolute timestamp * Same format as TIME_EXTEND except that the * value is an absolute timestamp, not a delta * event.time_delta contains bottom 27 bits * array[0] = top (28 .. 59) bits * size = 8 bytes * * <= @RINGBUF_TYPE_DATA_TYPE_LEN_MAX: * Data record * If type_len is zero: * array[0] holds the actual length * array[1..(length+3)/4] holds data * size = 4 + length (bytes) * else * length = type_len << 2 * array[0..(length+3)/4-1] holds data * size = 4 + length (bytes) */ enum ring_buffer_type { RINGBUF_TYPE_DATA_TYPE_LEN_MAX = 28, RINGBUF_TYPE_PADDING, RINGBUF_TYPE_TIME_EXTEND, RINGBUF_TYPE_TIME_STAMP, }; unsigned ring_buffer_event_length(struct ring_buffer_event *event); void *ring_buffer_event_data(struct ring_buffer_event *event); u64 ring_buffer_event_time_stamp(struct trace_buffer *buffer, struct ring_buffer_event *event); /* * ring_buffer_discard_commit will remove an event that has not * been committed yet. If this is used, then ring_buffer_unlock_commit * must not be called on the discarded event. This function * will try to remove the event from the ring buffer completely * if another event has not been written after it. * * Example use: * * if (some_condition) * ring_buffer_discard_commit(buffer, event); * else * ring_buffer_unlock_commit(buffer, event); */ void ring_buffer_discard_commit(struct trace_buffer *buffer, struct ring_buffer_event *event); /* * size is in bytes for each per CPU buffer. */ struct trace_buffer * __ring_buffer_alloc(unsigned long size, unsigned flags, struct lock_class_key *key); /* * Because the ring buffer is generic, if other users of the ring buffer get * traced by ftrace, it can produce lockdep warnings. We need to keep each * ring buffer's lock class separate. */ #define ring_buffer_alloc(size, flags) \ ({ \ static struct lock_class_key __key; \ __ring_buffer_alloc((size), (flags), &__key); \ }) typedef bool (*ring_buffer_cond_fn)(void *data); int ring_buffer_wait(struct trace_buffer *buffer, int cpu, int full); __poll_t ring_buffer_poll_wait(struct trace_buffer *buffer, int cpu, struct file *filp, poll_table *poll_table, int full); void ring_buffer_wake_waiters(struct trace_buffer *buffer, int cpu); #define RING_BUFFER_ALL_CPUS -1 void ring_buffer_free(struct trace_buffer *buffer); int ring_buffer_resize(struct trace_buffer *buffer, unsigned long size, int cpu); void ring_buffer_change_overwrite(struct trace_buffer *buffer, int val); struct ring_buffer_event *ring_buffer_lock_reserve(struct trace_buffer *buffer, unsigned long length); int ring_buffer_unlock_commit(struct trace_buffer *buffer, struct ring_buffer_event *event); int ring_buffer_write(struct trace_buffer *buffer, unsigned long length, void *data); void ring_buffer_nest_start(struct trace_buffer *buffer); void ring_buffer_nest_end(struct trace_buffer *buffer); struct ring_buffer_event * ring_buffer_peek(struct trace_buffer *buffer, int cpu, u64 *ts, unsigned long *lost_events); struct ring_buffer_event * ring_buffer_consume(struct trace_buffer *buffer, int cpu, u64 *ts, unsigned long *lost_events); struct ring_buffer_iter * ring_buffer_read_prepare(struct trace_buffer *buffer, int cpu, gfp_t flags); void ring_buffer_read_prepare_sync(void); void ring_buffer_read_start(struct ring_buffer_iter *iter); void ring_buffer_read_finish(struct ring_buffer_iter *iter); struct ring_buffer_event * ring_buffer_iter_peek(struct ring_buffer_iter *iter, u64 *ts); void ring_buffer_iter_advance(struct ring_buffer_iter *iter); void ring_buffer_iter_reset(struct ring_buffer_iter *iter); int ring_buffer_iter_empty(struct ring_buffer_iter *iter); bool ring_buffer_iter_dropped(struct ring_buffer_iter *iter); unsigned long ring_buffer_size(struct trace_buffer *buffer, int cpu); void ring_buffer_reset_cpu(struct trace_buffer *buffer, int cpu); void ring_buffer_reset_online_cpus(struct trace_buffer *buffer); void ring_buffer_reset(struct trace_buffer *buffer); #ifdef CONFIG_RING_BUFFER_ALLOW_SWAP int ring_buffer_swap_cpu(struct trace_buffer *buffer_a, struct trace_buffer *buffer_b, int cpu); #else static inline int ring_buffer_swap_cpu(struct trace_buffer *buffer_a, struct trace_buffer *buffer_b, int cpu) { return -ENODEV; } #endif bool ring_buffer_empty(struct trace_buffer *buffer); bool ring_buffer_empty_cpu(struct trace_buffer *buffer, int cpu); void ring_buffer_record_disable(struct trace_buffer *buffer); void ring_buffer_record_enable(struct trace_buffer *buffer); void ring_buffer_record_off(struct trace_buffer *buffer); void ring_buffer_record_on(struct trace_buffer *buffer); bool ring_buffer_record_is_on(struct trace_buffer *buffer); bool ring_buffer_record_is_set_on(struct trace_buffer *buffer); void ring_buffer_record_disable_cpu(struct trace_buffer *buffer, int cpu); void ring_buffer_record_enable_cpu(struct trace_buffer *buffer, int cpu); u64 ring_buffer_oldest_event_ts(struct trace_buffer *buffer, int cpu); unsigned long ring_buffer_bytes_cpu(struct trace_buffer *buffer, int cpu); unsigned long ring_buffer_entries(struct trace_buffer *buffer); unsigned long ring_buffer_overruns(struct trace_buffer *buffer); unsigned long ring_buffer_entries_cpu(struct trace_buffer *buffer, int cpu); unsigned long ring_buffer_overrun_cpu(struct trace_buffer *buffer, int cpu); unsigned long ring_buffer_commit_overrun_cpu(struct trace_buffer *buffer, int cpu); unsigned long ring_buffer_dropped_events_cpu(struct trace_buffer *buffer, int cpu); unsigned long ring_buffer_read_events_cpu(struct trace_buffer *buffer, int cpu); u64 ring_buffer_time_stamp(struct trace_buffer *buffer); void ring_buffer_normalize_time_stamp(struct trace_buffer *buffer, int cpu, u64 *ts); void ring_buffer_set_clock(struct trace_buffer *buffer, u64 (*clock)(void)); void ring_buffer_set_time_stamp_abs(struct trace_buffer *buffer, bool abs); bool ring_buffer_time_stamp_abs(struct trace_buffer *buffer); size_t ring_buffer_nr_pages(struct trace_buffer *buffer, int cpu); size_t ring_buffer_nr_dirty_pages(struct trace_buffer *buffer, int cpu); void *ring_buffer_alloc_read_page(struct trace_buffer *buffer, int cpu); void ring_buffer_free_read_page(struct trace_buffer *buffer, int cpu, void *data); int ring_buffer_read_page(struct trace_buffer *buffer, void **data_page, size_t len, int cpu, int full); struct trace_seq; int ring_buffer_print_entry_header(struct trace_seq *s); int ring_buffer_print_page_header(struct trace_seq *s); enum ring_buffer_flags { RB_FL_OVERWRITE = 1 << 0, }; #ifdef CONFIG_RING_BUFFER int trace_rb_cpu_prepare(unsigned int cpu, struct hlist_node *node); #else #define trace_rb_cpu_prepare NULL #endif #endif /* _LINUX_RING_BUFFER_H */ PK ! ��8�� � spinlock_up.hnu �[��� #ifndef __LINUX_SPINLOCK_UP_H #define __LINUX_SPINLOCK_UP_H #ifndef __LINUX_SPINLOCK_H # error "please don't include this file directly" #endif #include <asm/processor.h> /* for cpu_relax() */ #include <asm/barrier.h> /* * include/linux/spinlock_up.h - UP-debug version of spinlocks. * * portions Copyright 2005, Red Hat, Inc., Ingo Molnar * Released under the General Public License (GPL). * * In the debug case, 1 means unlocked, 0 means locked. (the values * are inverted, to catch initialization bugs) * * No atomicity anywhere, we are on UP. However, we still need * the compiler barriers, because we do not want the compiler to * move potentially faulting instructions (notably user accesses) * into the locked sequence, resulting in non-atomic execution. */ #ifdef CONFIG_DEBUG_SPINLOCK #define arch_spin_is_locked(x) ((x)->slock == 0) static inline void arch_spin_lock(arch_spinlock_t *lock) { lock->slock = 0; barrier(); } static inline int arch_spin_trylock(arch_spinlock_t *lock) { char oldval = lock->slock; lock->slock = 0; barrier(); return oldval > 0; } static inline void arch_spin_unlock(arch_spinlock_t *lock) { barrier(); lock->slock = 1; } /* * Read-write spinlocks. No debug version. */ #define arch_read_lock(lock) do { barrier(); (void)(lock); } while (0) #define arch_write_lock(lock) do { barrier(); (void)(lock); } while (0) #define arch_read_trylock(lock) ({ barrier(); (void)(lock); 1; }) #define arch_write_trylock(lock) ({ barrier(); (void)(lock); 1; }) #define arch_read_unlock(lock) do { barrier(); (void)(lock); } while (0) #define arch_write_unlock(lock) do { barrier(); (void)(lock); } while (0) #else /* DEBUG_SPINLOCK */ #define arch_spin_is_locked(lock) ((void)(lock), 0) /* for sched/core.c and kernel_lock.c: */ # define arch_spin_lock(lock) do { barrier(); (void)(lock); } while (0) # define arch_spin_lock_flags(lock, flags) do { barrier(); (void)(lock); } while (0) # define arch_spin_unlock(lock) do { barrier(); (void)(lock); } while (0) # define arch_spin_trylock(lock) ({ barrier(); (void)(lock); 1; }) #endif /* DEBUG_SPINLOCK */ #define arch_spin_is_contended(lock) (((void)(lock), 0)) #endif /* __LINUX_SPINLOCK_UP_H */ PK ! De6�F �F property.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * property.h - Unified device property interface. * * Copyright (C) 2014, Intel Corporation * Authors: Rafael J. Wysocki <rafael.j.wysocki@intel.com> * Mika Westerberg <mika.westerberg@linux.intel.com> */ #ifndef _LINUX_PROPERTY_H_ #define _LINUX_PROPERTY_H_ #include <linux/bits.h> #include <linux/fwnode.h> #include <linux/types.h> struct device; enum dev_prop_type { DEV_PROP_U8, DEV_PROP_U16, DEV_PROP_U32, DEV_PROP_U64, DEV_PROP_STRING, DEV_PROP_REF, }; enum dev_dma_attr { DEV_DMA_NOT_SUPPORTED, DEV_DMA_NON_COHERENT, DEV_DMA_COHERENT, }; const struct fwnode_handle *__dev_fwnode_const(const struct device *dev); struct fwnode_handle *__dev_fwnode(struct device *dev); #define dev_fwnode(dev) \ _Generic((dev), \ const struct device *: __dev_fwnode_const, \ struct device *: __dev_fwnode)(dev) bool device_property_present(struct device *dev, const char *propname); int device_property_read_u8_array(struct device *dev, const char *propname, u8 *val, size_t nval); int device_property_read_u16_array(struct device *dev, const char *propname, u16 *val, size_t nval); int device_property_read_u32_array(struct device *dev, const char *propname, u32 *val, size_t nval); int device_property_read_u64_array(struct device *dev, const char *propname, u64 *val, size_t nval); int device_property_read_string_array(struct device *dev, const char *propname, const char **val, size_t nval); int device_property_read_string(struct device *dev, const char *propname, const char **val); int device_property_match_string(struct device *dev, const char *propname, const char *string); bool fwnode_device_is_available(const struct fwnode_handle *fwnode); bool fwnode_property_present(const struct fwnode_handle *fwnode, const char *propname); int fwnode_property_read_u8_array(const struct fwnode_handle *fwnode, const char *propname, u8 *val, size_t nval); int fwnode_property_read_u16_array(const struct fwnode_handle *fwnode, const char *propname, u16 *val, size_t nval); int fwnode_property_read_u32_array(const struct fwnode_handle *fwnode, const char *propname, u32 *val, size_t nval); int fwnode_property_read_u64_array(const struct fwnode_handle *fwnode, const char *propname, u64 *val, size_t nval); int fwnode_property_read_string_array(const struct fwnode_handle *fwnode, const char *propname, const char **val, size_t nval); int fwnode_property_read_string(const struct fwnode_handle *fwnode, const char *propname, const char **val); int fwnode_property_match_string(const struct fwnode_handle *fwnode, const char *propname, const char *string); int fwnode_property_get_reference_args(const struct fwnode_handle *fwnode, const char *prop, const char *nargs_prop, unsigned int nargs, unsigned int index, struct fwnode_reference_args *args); struct fwnode_handle *fwnode_find_reference(const struct fwnode_handle *fwnode, const char *name, unsigned int index); const char *fwnode_get_name(const struct fwnode_handle *fwnode); const char *fwnode_get_name_prefix(const struct fwnode_handle *fwnode); struct fwnode_handle *fwnode_get_parent(const struct fwnode_handle *fwnode); struct fwnode_handle *fwnode_get_next_parent( struct fwnode_handle *fwnode); struct device *fwnode_get_next_parent_dev(struct fwnode_handle *fwnode); unsigned int fwnode_count_parents(const struct fwnode_handle *fwn); struct fwnode_handle *fwnode_get_nth_parent(struct fwnode_handle *fwn, unsigned int depth); bool fwnode_is_ancestor_of(struct fwnode_handle *test_ancestor, struct fwnode_handle *test_child); struct fwnode_handle *fwnode_get_next_child_node( const struct fwnode_handle *fwnode, struct fwnode_handle *child); struct fwnode_handle *fwnode_get_next_available_child_node( const struct fwnode_handle *fwnode, struct fwnode_handle *child); #define fwnode_for_each_child_node(fwnode, child) \ for (child = fwnode_get_next_child_node(fwnode, NULL); child; \ child = fwnode_get_next_child_node(fwnode, child)) #define fwnode_for_each_available_child_node(fwnode, child) \ for (child = fwnode_get_next_available_child_node(fwnode, NULL); child;\ child = fwnode_get_next_available_child_node(fwnode, child)) struct fwnode_handle *device_get_next_child_node( struct device *dev, struct fwnode_handle *child); #define device_for_each_child_node(dev, child) \ for (child = device_get_next_child_node(dev, NULL); child; \ child = device_get_next_child_node(dev, child)) struct fwnode_handle *fwnode_get_named_child_node( const struct fwnode_handle *fwnode, const char *childname); struct fwnode_handle *device_get_named_child_node(struct device *dev, const char *childname); struct fwnode_handle *fwnode_handle_get(struct fwnode_handle *fwnode); void fwnode_handle_put(struct fwnode_handle *fwnode); int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index); int fwnode_irq_get_byname(const struct fwnode_handle *fwnode, const char *name); void __iomem *fwnode_iomap(struct fwnode_handle *fwnode, int index); unsigned int device_get_child_node_count(struct device *dev); static inline bool device_property_read_bool(struct device *dev, const char *propname) { return device_property_present(dev, propname); } static inline int device_property_read_u8(struct device *dev, const char *propname, u8 *val) { return device_property_read_u8_array(dev, propname, val, 1); } static inline int device_property_read_u16(struct device *dev, const char *propname, u16 *val) { return device_property_read_u16_array(dev, propname, val, 1); } static inline int device_property_read_u32(struct device *dev, const char *propname, u32 *val) { return device_property_read_u32_array(dev, propname, val, 1); } static inline int device_property_read_u64(struct device *dev, const char *propname, u64 *val) { return device_property_read_u64_array(dev, propname, val, 1); } static inline int device_property_count_u8(struct device *dev, const char *propname) { return device_property_read_u8_array(dev, propname, NULL, 0); } static inline int device_property_count_u16(struct device *dev, const char *propname) { return device_property_read_u16_array(dev, propname, NULL, 0); } static inline int device_property_count_u32(struct device *dev, const char *propname) { return device_property_read_u32_array(dev, propname, NULL, 0); } static inline int device_property_count_u64(struct device *dev, const char *propname) { return device_property_read_u64_array(dev, propname, NULL, 0); } static inline int device_property_string_array_count(struct device *dev, const char *propname) { return device_property_read_string_array(dev, propname, NULL, 0); } static inline bool fwnode_property_read_bool(const struct fwnode_handle *fwnode, const char *propname) { return fwnode_property_present(fwnode, propname); } static inline int fwnode_property_read_u8(const struct fwnode_handle *fwnode, const char *propname, u8 *val) { return fwnode_property_read_u8_array(fwnode, propname, val, 1); } static inline int fwnode_property_read_u16(const struct fwnode_handle *fwnode, const char *propname, u16 *val) { return fwnode_property_read_u16_array(fwnode, propname, val, 1); } static inline int fwnode_property_read_u32(const struct fwnode_handle *fwnode, const char *propname, u32 *val) { return fwnode_property_read_u32_array(fwnode, propname, val, 1); } static inline int fwnode_property_read_u64(const struct fwnode_handle *fwnode, const char *propname, u64 *val) { return fwnode_property_read_u64_array(fwnode, propname, val, 1); } static inline int fwnode_property_count_u8(const struct fwnode_handle *fwnode, const char *propname) { return fwnode_property_read_u8_array(fwnode, propname, NULL, 0); } static inline int fwnode_property_count_u16(const struct fwnode_handle *fwnode, const char *propname) { return fwnode_property_read_u16_array(fwnode, propname, NULL, 0); } static inline int fwnode_property_count_u32(const struct fwnode_handle *fwnode, const char *propname) { return fwnode_property_read_u32_array(fwnode, propname, NULL, 0); } static inline int fwnode_property_count_u64(const struct fwnode_handle *fwnode, const char *propname) { return fwnode_property_read_u64_array(fwnode, propname, NULL, 0); } static inline int fwnode_property_string_array_count(const struct fwnode_handle *fwnode, const char *propname) { return fwnode_property_read_string_array(fwnode, propname, NULL, 0); } struct software_node; /** * struct software_node_ref_args - Reference property with additional arguments * @node: Reference to a software node * @nargs: Number of elements in @args array * @args: Integer arguments */ struct software_node_ref_args { const struct software_node *node; unsigned int nargs; u64 args[NR_FWNODE_REFERENCE_ARGS]; }; #define SOFTWARE_NODE_REFERENCE(_ref_, ...) \ (const struct software_node_ref_args) { \ .node = _ref_, \ .nargs = ARRAY_SIZE(((u64[]){ 0, ##__VA_ARGS__ })) - 1, \ .args = { __VA_ARGS__ }, \ } /** * struct property_entry - "Built-in" device property representation. * @name: Name of the property. * @length: Length of data making up the value. * @is_inline: True when the property value is stored inline. * @type: Type of the data in unions. * @pointer: Pointer to the property when it is not stored inline. * @value: Value of the property when it is stored inline. */ struct property_entry { const char *name; size_t length; bool is_inline; enum dev_prop_type type; union { const void *pointer; union { u8 u8_data[sizeof(u64) / sizeof(u8)]; u16 u16_data[sizeof(u64) / sizeof(u16)]; u32 u32_data[sizeof(u64) / sizeof(u32)]; u64 u64_data[sizeof(u64) / sizeof(u64)]; const char *str[sizeof(u64) / sizeof(char *)]; } value; }; }; /* * Note: the below initializers for the anonymous union are carefully * crafted to avoid gcc-4.4.4's problems with initialization of anon unions * and structs. */ #define __PROPERTY_ENTRY_ELEMENT_SIZE(_elem_) \ sizeof(((struct property_entry *)NULL)->value._elem_[0]) #define __PROPERTY_ENTRY_ARRAY_ELSIZE_LEN(_name_, _elsize_, _Type_, \ _val_, _len_) \ (struct property_entry) { \ .name = _name_, \ .length = (_len_) * (_elsize_), \ .type = DEV_PROP_##_Type_, \ { .pointer = _val_ }, \ } #define __PROPERTY_ENTRY_ARRAY_LEN(_name_, _elem_, _Type_, _val_, _len_)\ __PROPERTY_ENTRY_ARRAY_ELSIZE_LEN(_name_, \ __PROPERTY_ENTRY_ELEMENT_SIZE(_elem_), \ _Type_, _val_, _len_) #define PROPERTY_ENTRY_U8_ARRAY_LEN(_name_, _val_, _len_) \ __PROPERTY_ENTRY_ARRAY_LEN(_name_, u8_data, U8, _val_, _len_) #define PROPERTY_ENTRY_U16_ARRAY_LEN(_name_, _val_, _len_) \ __PROPERTY_ENTRY_ARRAY_LEN(_name_, u16_data, U16, _val_, _len_) #define PROPERTY_ENTRY_U32_ARRAY_LEN(_name_, _val_, _len_) \ __PROPERTY_ENTRY_ARRAY_LEN(_name_, u32_data, U32, _val_, _len_) #define PROPERTY_ENTRY_U64_ARRAY_LEN(_name_, _val_, _len_) \ __PROPERTY_ENTRY_ARRAY_LEN(_name_, u64_data, U64, _val_, _len_) #define PROPERTY_ENTRY_STRING_ARRAY_LEN(_name_, _val_, _len_) \ __PROPERTY_ENTRY_ARRAY_LEN(_name_, str, STRING, _val_, _len_) #define PROPERTY_ENTRY_REF_ARRAY_LEN(_name_, _val_, _len_) \ __PROPERTY_ENTRY_ARRAY_ELSIZE_LEN(_name_, \ sizeof(struct software_node_ref_args), \ REF, _val_, _len_) #define PROPERTY_ENTRY_U8_ARRAY(_name_, _val_) \ PROPERTY_ENTRY_U8_ARRAY_LEN(_name_, _val_, ARRAY_SIZE(_val_)) #define PROPERTY_ENTRY_U16_ARRAY(_name_, _val_) \ PROPERTY_ENTRY_U16_ARRAY_LEN(_name_, _val_, ARRAY_SIZE(_val_)) #define PROPERTY_ENTRY_U32_ARRAY(_name_, _val_) \ PROPERTY_ENTRY_U32_ARRAY_LEN(_name_, _val_, ARRAY_SIZE(_val_)) #define PROPERTY_ENTRY_U64_ARRAY(_name_, _val_) \ PROPERTY_ENTRY_U64_ARRAY_LEN(_name_, _val_, ARRAY_SIZE(_val_)) #define PROPERTY_ENTRY_STRING_ARRAY(_name_, _val_) \ PROPERTY_ENTRY_STRING_ARRAY_LEN(_name_, _val_, ARRAY_SIZE(_val_)) #define PROPERTY_ENTRY_REF_ARRAY(_name_, _val_) \ PROPERTY_ENTRY_REF_ARRAY_LEN(_name_, _val_, ARRAY_SIZE(_val_)) #define __PROPERTY_ENTRY_ELEMENT(_name_, _elem_, _Type_, _val_) \ (struct property_entry) { \ .name = _name_, \ .length = __PROPERTY_ENTRY_ELEMENT_SIZE(_elem_), \ .is_inline = true, \ .type = DEV_PROP_##_Type_, \ { .value = { ._elem_[0] = _val_ } }, \ } #define PROPERTY_ENTRY_U8(_name_, _val_) \ __PROPERTY_ENTRY_ELEMENT(_name_, u8_data, U8, _val_) #define PROPERTY_ENTRY_U16(_name_, _val_) \ __PROPERTY_ENTRY_ELEMENT(_name_, u16_data, U16, _val_) #define PROPERTY_ENTRY_U32(_name_, _val_) \ __PROPERTY_ENTRY_ELEMENT(_name_, u32_data, U32, _val_) #define PROPERTY_ENTRY_U64(_name_, _val_) \ __PROPERTY_ENTRY_ELEMENT(_name_, u64_data, U64, _val_) #define PROPERTY_ENTRY_STRING(_name_, _val_) \ __PROPERTY_ENTRY_ELEMENT(_name_, str, STRING, _val_) #define PROPERTY_ENTRY_BOOL(_name_) \ (struct property_entry) { \ .name = _name_, \ .is_inline = true, \ } #define PROPERTY_ENTRY_REF(_name_, _ref_, ...) \ (struct property_entry) { \ .name = _name_, \ .length = sizeof(struct software_node_ref_args), \ .type = DEV_PROP_REF, \ { .pointer = &SOFTWARE_NODE_REFERENCE(_ref_, ##__VA_ARGS__), }, \ } struct property_entry * property_entries_dup(const struct property_entry *properties); void property_entries_free(const struct property_entry *properties); int device_add_properties(struct device *dev, const struct property_entry *properties); void device_remove_properties(struct device *dev); bool device_dma_supported(struct device *dev); enum dev_dma_attr device_get_dma_attr(struct device *dev); const void *device_get_match_data(const struct device *dev); int device_get_phy_mode(struct device *dev); void *device_get_mac_address(struct device *dev, char *addr, int alen); int fwnode_get_phy_mode(struct fwnode_handle *fwnode); void *fwnode_get_mac_address(struct fwnode_handle *fwnode, char *addr, int alen); struct fwnode_handle *fwnode_graph_get_next_endpoint( const struct fwnode_handle *fwnode, struct fwnode_handle *prev); struct fwnode_handle * fwnode_graph_get_port_parent(const struct fwnode_handle *fwnode); struct fwnode_handle *fwnode_graph_get_remote_port_parent( const struct fwnode_handle *fwnode); struct fwnode_handle *fwnode_graph_get_remote_port( const struct fwnode_handle *fwnode); struct fwnode_handle *fwnode_graph_get_remote_endpoint( const struct fwnode_handle *fwnode); struct fwnode_handle * fwnode_graph_get_remote_node(const struct fwnode_handle *fwnode, u32 port, u32 endpoint); static inline bool fwnode_graph_is_endpoint(struct fwnode_handle *fwnode) { return fwnode_property_present(fwnode, "remote-endpoint"); } /* * Fwnode lookup flags * * @FWNODE_GRAPH_ENDPOINT_NEXT: In the case of no exact match, look for the * closest endpoint ID greater than the specified * one. * @FWNODE_GRAPH_DEVICE_DISABLED: That the device to which the remote * endpoint of the given endpoint belongs to, * may be disabled. */ #define FWNODE_GRAPH_ENDPOINT_NEXT BIT(0) #define FWNODE_GRAPH_DEVICE_DISABLED BIT(1) struct fwnode_handle * fwnode_graph_get_endpoint_by_id(const struct fwnode_handle *fwnode, u32 port, u32 endpoint, unsigned long flags); #define fwnode_graph_for_each_endpoint(fwnode, child) \ for (child = NULL; \ (child = fwnode_graph_get_next_endpoint(fwnode, child)); ) int fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode, struct fwnode_endpoint *endpoint); typedef void *(*devcon_match_fn_t)(struct fwnode_handle *fwnode, const char *id, void *data); void *fwnode_connection_find_match(struct fwnode_handle *fwnode, const char *con_id, void *data, devcon_match_fn_t match); static inline void *device_connection_find_match(struct device *dev, const char *con_id, void *data, devcon_match_fn_t match) { return fwnode_connection_find_match(dev_fwnode(dev), con_id, data, match); } /* -------------------------------------------------------------------------- */ /* Software fwnode support - when HW description is incomplete or missing */ /** * struct software_node - Software node description * @name: Name of the software node * @parent: Parent of the software node * @properties: Array of device properties */ struct software_node { const char *name; const struct software_node *parent; const struct property_entry *properties; }; bool is_software_node(const struct fwnode_handle *fwnode); const struct software_node * to_software_node(const struct fwnode_handle *fwnode); struct fwnode_handle *software_node_fwnode(const struct software_node *node); const struct software_node * software_node_find_by_name(const struct software_node *parent, const char *name); int software_node_register_nodes(const struct software_node *nodes); void software_node_unregister_nodes(const struct software_node *nodes); int software_node_register_node_group(const struct software_node **node_group); void software_node_unregister_node_group(const struct software_node **node_group); int software_node_register(const struct software_node *node); void software_node_unregister(const struct software_node *node); struct fwnode_handle * fwnode_create_software_node(const struct property_entry *properties, const struct fwnode_handle *parent); void fwnode_remove_software_node(struct fwnode_handle *fwnode); int device_add_software_node(struct device *dev, const struct software_node *node); void device_remove_software_node(struct device *dev); int device_create_managed_software_node(struct device *dev, const struct property_entry *properties, const struct software_node *parent); #endif /* _LINUX_PROPERTY_H_ */ PK ! �8O#� � trace_recursion.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TRACE_RECURSION_H #define _LINUX_TRACE_RECURSION_H #include <linux/interrupt.h> #include <linux/sched.h> #ifdef CONFIG_TRACING /* Only current can touch trace_recursion */ /* * For function tracing recursion: * The order of these bits are important. * * When function tracing occurs, the following steps are made: * If arch does not support a ftrace feature: * call internal function (uses INTERNAL bits) which calls... * The function callback, which can use the FTRACE bits to * check for recursion. */ enum { /* Function recursion bits */ TRACE_FTRACE_BIT, TRACE_FTRACE_NMI_BIT, TRACE_FTRACE_IRQ_BIT, TRACE_FTRACE_SIRQ_BIT, TRACE_FTRACE_TRANSITION_BIT, /* Internal use recursion bits */ TRACE_INTERNAL_BIT, TRACE_INTERNAL_NMI_BIT, TRACE_INTERNAL_IRQ_BIT, TRACE_INTERNAL_SIRQ_BIT, TRACE_INTERNAL_TRANSITION_BIT, TRACE_BRANCH_BIT, /* * Abuse of the trace_recursion. * As we need a way to maintain state if we are tracing the function * graph in irq because we want to trace a particular function that * was called in irq context but we have irq tracing off. Since this * can only be modified by current, we can reuse trace_recursion. */ TRACE_IRQ_BIT, /* Set if the function is in the set_graph_function file */ TRACE_GRAPH_BIT, /* * In the very unlikely case that an interrupt came in * at a start of graph tracing, and we want to trace * the function in that interrupt, the depth can be greater * than zero, because of the preempted start of a previous * trace. In an even more unlikely case, depth could be 2 * if a softirq interrupted the start of graph tracing, * followed by an interrupt preempting a start of graph * tracing in the softirq, and depth can even be 3 * if an NMI came in at the start of an interrupt function * that preempted a softirq start of a function that * preempted normal context!!!! Luckily, it can't be * greater than 3, so the next two bits are a mask * of what the depth is when we set TRACE_GRAPH_BIT */ TRACE_GRAPH_DEPTH_START_BIT, TRACE_GRAPH_DEPTH_END_BIT, /* * To implement set_graph_notrace, if this bit is set, we ignore * function graph tracing of called functions, until the return * function is called to clear it. */ TRACE_GRAPH_NOTRACE_BIT, /* Used to prevent recursion recording from recursing. */ TRACE_RECORD_RECURSION_BIT, }; #define trace_recursion_set(bit) do { (current)->trace_recursion |= (1<<(bit)); } while (0) #define trace_recursion_clear(bit) do { (current)->trace_recursion &= ~(1<<(bit)); } while (0) #define trace_recursion_test(bit) ((current)->trace_recursion & (1<<(bit))) #define trace_recursion_depth() \ (((current)->trace_recursion >> TRACE_GRAPH_DEPTH_START_BIT) & 3) #define trace_recursion_set_depth(depth) \ do { \ current->trace_recursion &= \ ~(3 << TRACE_GRAPH_DEPTH_START_BIT); \ current->trace_recursion |= \ ((depth) & 3) << TRACE_GRAPH_DEPTH_START_BIT; \ } while (0) #define TRACE_CONTEXT_BITS 4 #define TRACE_FTRACE_START TRACE_FTRACE_BIT #define TRACE_LIST_START TRACE_INTERNAL_BIT #define TRACE_CONTEXT_MASK ((1 << (TRACE_LIST_START + TRACE_CONTEXT_BITS)) - 1) /* * Used for setting context * NMI = 0 * IRQ = 1 * SOFTIRQ = 2 * NORMAL = 3 */ enum { TRACE_CTX_NMI, TRACE_CTX_IRQ, TRACE_CTX_SOFTIRQ, TRACE_CTX_NORMAL, TRACE_CTX_TRANSITION, }; static __always_inline int trace_get_context_bit(void) { unsigned char bit = interrupt_context_level(); return TRACE_CTX_NORMAL - bit; } #ifdef CONFIG_FTRACE_RECORD_RECURSION extern void ftrace_record_recursion(unsigned long ip, unsigned long parent_ip); # define do_ftrace_record_recursion(ip, pip) \ do { \ if (!trace_recursion_test(TRACE_RECORD_RECURSION_BIT)) { \ trace_recursion_set(TRACE_RECORD_RECURSION_BIT); \ ftrace_record_recursion(ip, pip); \ trace_recursion_clear(TRACE_RECORD_RECURSION_BIT); \ } \ } while (0) #else # define do_ftrace_record_recursion(ip, pip) do { } while (0) #endif static __always_inline int trace_test_and_set_recursion(unsigned long ip, unsigned long pip, int start) { unsigned int val = READ_ONCE(current->trace_recursion); int bit; bit = trace_get_context_bit() + start; if (unlikely(val & (1 << bit))) { /* * It could be that preempt_count has not been updated during * a switch between contexts. Allow for a single recursion. */ bit = TRACE_CTX_TRANSITION + start; if (val & (1 << bit)) { do_ftrace_record_recursion(ip, pip); return -1; } } val |= 1 << bit; current->trace_recursion = val; barrier(); return bit; } static __always_inline void trace_clear_recursion(int bit) { barrier(); trace_recursion_clear(bit); } /** * ftrace_test_recursion_trylock - tests for recursion in same context * * Use this for ftrace callbacks. This will detect if the function * tracing recursed in the same context (normal vs interrupt), * * Returns: -1 if a recursion happened. * >= 0 if no recursion */ static __always_inline int ftrace_test_recursion_trylock(unsigned long ip, unsigned long parent_ip) { return trace_test_and_set_recursion(ip, parent_ip, TRACE_FTRACE_START); } /** * ftrace_test_recursion_unlock - called when function callback is complete * @bit: The return of a successful ftrace_test_recursion_trylock() * * This is used at the end of a ftrace callback. */ static __always_inline void ftrace_test_recursion_unlock(int bit) { trace_clear_recursion(bit); } #endif /* CONFIG_TRACING */ #endif /* _LINUX_TRACE_RECURSION_H */ PK ! 7�� � personality.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PERSONALITY_H #define _LINUX_PERSONALITY_H #include <uapi/linux/personality.h> /* * Return the base personality without flags. */ #define personality(pers) (pers & PER_MASK) /* * Change personality of the currently running process. */ #define set_personality(pers) (current->personality = (pers)) #endif /* _LINUX_PERSONALITY_H */ PK ! �ݧwY Y vhost_iotlb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VHOST_IOTLB_H #define _LINUX_VHOST_IOTLB_H #include <linux/interval_tree_generic.h> struct vhost_iotlb_map { struct rb_node rb; struct list_head link; u64 start; u64 last; u64 size; u64 addr; #define VHOST_MAP_RO 0x1 #define VHOST_MAP_WO 0x2 #define VHOST_MAP_RW 0x3 u32 perm; u32 flags_padding; u64 __subtree_last; void *opaque; }; #define VHOST_IOTLB_FLAG_RETIRE 0x1 struct vhost_iotlb { struct rb_root_cached root; struct list_head list; unsigned int limit; unsigned int nmaps; unsigned int flags; }; int vhost_iotlb_add_range_ctx(struct vhost_iotlb *iotlb, u64 start, u64 last, u64 addr, unsigned int perm, void *opaque); int vhost_iotlb_add_range(struct vhost_iotlb *iotlb, u64 start, u64 last, u64 addr, unsigned int perm); void vhost_iotlb_del_range(struct vhost_iotlb *iotlb, u64 start, u64 last); struct vhost_iotlb *vhost_iotlb_alloc(unsigned int limit, unsigned int flags); void vhost_iotlb_free(struct vhost_iotlb *iotlb); void vhost_iotlb_reset(struct vhost_iotlb *iotlb); struct vhost_iotlb_map * vhost_iotlb_itree_first(struct vhost_iotlb *iotlb, u64 start, u64 last); struct vhost_iotlb_map * vhost_iotlb_itree_next(struct vhost_iotlb_map *map, u64 start, u64 last); void vhost_iotlb_map_free(struct vhost_iotlb *iotlb, struct vhost_iotlb_map *map); #endif PK ! 2�`�; ; mutex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Mutexes: blocking mutual exclusion locks * * started by Ingo Molnar: * * Copyright (C) 2004, 2005, 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> * * This file contains the main data structure and API definitions. */ #ifndef __LINUX_MUTEX_H #define __LINUX_MUTEX_H #include <asm/current.h> #include <linux/list.h> #include <linux/spinlock_types.h> #include <linux/lockdep.h> #include <linux/atomic.h> #include <asm/processor.h> #include <linux/osq_lock.h> #include <linux/debug_locks.h> #include <linux/cleanup.h> struct device; #ifdef CONFIG_DEBUG_LOCK_ALLOC # define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ , .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_SLEEP, \ } #else # define __DEP_MAP_MUTEX_INITIALIZER(lockname) #endif #ifndef CONFIG_PREEMPT_RT /* * Simple, straightforward mutexes with strict semantics: * * - only one task can hold the mutex at a time * - only the owner can unlock the mutex * - multiple unlocks are not permitted * - recursive locking is not permitted * - a mutex object must be initialized via the API * - a mutex object must not be initialized via memset or copying * - task may not exit with mutex held * - memory areas where held locks reside must not be freed * - held mutexes must not be reinitialized * - mutexes may not be used in hardware or software interrupt * contexts such as tasklets and timers * * These semantics are fully enforced when DEBUG_MUTEXES is * enabled. Furthermore, besides enforcing the above rules, the mutex * debugging code also implements a number of additional features * that make lock debugging easier and faster: * * - uses symbolic names of mutexes, whenever they are printed in debug output * - point-of-acquire tracking, symbolic lookup of function names * - list of all locks held in the system, printout of them * - owner tracking * - detects self-recursing locks and prints out all relevant info * - detects multi-task circular deadlocks and prints out all affected * locks and tasks (and only those tasks) */ struct mutex { atomic_long_t owner; raw_spinlock_t wait_lock; #ifdef CONFIG_MUTEX_SPIN_ON_OWNER struct optimistic_spin_queue osq; /* Spinner MCS lock */ #endif struct list_head wait_list; #ifdef CONFIG_DEBUG_MUTEXES void *magic; #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif }; #ifdef CONFIG_DEBUG_MUTEXES #define __DEBUG_MUTEX_INITIALIZER(lockname) \ , .magic = &lockname extern void mutex_destroy(struct mutex *lock); #else # define __DEBUG_MUTEX_INITIALIZER(lockname) static inline void mutex_destroy(struct mutex *lock) {} #endif /** * mutex_init - initialize the mutex * @mutex: the mutex to be initialized * * Initialize the mutex to unlocked state. * * It is not allowed to initialize an already locked mutex. */ #define mutex_init(mutex) \ do { \ static struct lock_class_key __key; \ \ __mutex_init((mutex), #mutex, &__key); \ } while (0) #define __MUTEX_INITIALIZER(lockname) \ { .owner = ATOMIC_LONG_INIT(0) \ , .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(lockname.wait_lock) \ , .wait_list = LIST_HEAD_INIT(lockname.wait_list) \ __DEBUG_MUTEX_INITIALIZER(lockname) \ __DEP_MAP_MUTEX_INITIALIZER(lockname) } #define DEFINE_MUTEX(mutexname) \ struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) extern void __mutex_init(struct mutex *lock, const char *name, struct lock_class_key *key); /** * mutex_is_locked - is the mutex locked * @lock: the mutex to be queried * * Returns true if the mutex is locked, false if unlocked. */ extern bool mutex_is_locked(struct mutex *lock); #else /* !CONFIG_PREEMPT_RT */ /* * Preempt-RT variant based on rtmutexes. */ #include <linux/rtmutex.h> struct mutex { struct rt_mutex_base rtmutex; #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif }; #define __MUTEX_INITIALIZER(mutexname) \ { \ .rtmutex = __RT_MUTEX_BASE_INITIALIZER(mutexname.rtmutex) \ __DEP_MAP_MUTEX_INITIALIZER(mutexname) \ } #define DEFINE_MUTEX(mutexname) \ struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) extern void __mutex_rt_init(struct mutex *lock, const char *name, struct lock_class_key *key); extern int mutex_trylock(struct mutex *lock); static inline void mutex_destroy(struct mutex *lock) { } #define mutex_is_locked(l) rt_mutex_base_is_locked(&(l)->rtmutex) #define __mutex_init(mutex, name, key) \ do { \ rt_mutex_base_init(&(mutex)->rtmutex); \ __mutex_rt_init((mutex), name, key); \ } while (0) #define mutex_init(mutex) \ do { \ static struct lock_class_key __key; \ \ __mutex_init((mutex), #mutex, &__key); \ } while (0) #endif /* CONFIG_PREEMPT_RT */ #ifdef CONFIG_DEBUG_MUTEXES int __devm_mutex_init(struct device *dev, struct mutex *lock); #else static inline int __devm_mutex_init(struct device *dev, struct mutex *lock) { /* * When CONFIG_DEBUG_MUTEXES is off mutex_destroy() is just a nop so * no really need to register it in the devm subsystem. */ return 0; } #endif #define devm_mutex_init(dev, mutex) \ ({ \ typeof(mutex) mutex_ = (mutex); \ \ mutex_init(mutex_); \ __devm_mutex_init(dev, mutex_); \ }) /* * See kernel/locking/mutex.c for detailed documentation of these APIs. * Also see Documentation/locking/mutex-design.rst. */ #ifdef CONFIG_DEBUG_LOCK_ALLOC extern void mutex_lock_nested(struct mutex *lock, unsigned int subclass); extern void _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest_lock); extern int __must_check mutex_lock_interruptible_nested(struct mutex *lock, unsigned int subclass); extern int __must_check mutex_lock_killable_nested(struct mutex *lock, unsigned int subclass); extern void mutex_lock_io_nested(struct mutex *lock, unsigned int subclass); #define mutex_lock(lock) mutex_lock_nested(lock, 0) #define mutex_lock_interruptible(lock) mutex_lock_interruptible_nested(lock, 0) #define mutex_lock_killable(lock) mutex_lock_killable_nested(lock, 0) #define mutex_lock_io(lock) mutex_lock_io_nested(lock, 0) #define mutex_lock_nest_lock(lock, nest_lock) \ do { \ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ _mutex_lock_nest_lock(lock, &(nest_lock)->dep_map); \ } while (0) #else extern void mutex_lock(struct mutex *lock); extern int __must_check mutex_lock_interruptible(struct mutex *lock); extern int __must_check mutex_lock_killable(struct mutex *lock); extern void mutex_lock_io(struct mutex *lock); # define mutex_lock_nested(lock, subclass) mutex_lock(lock) # define mutex_lock_interruptible_nested(lock, subclass) mutex_lock_interruptible(lock) # define mutex_lock_killable_nested(lock, subclass) mutex_lock_killable(lock) # define mutex_lock_nest_lock(lock, nest_lock) mutex_lock(lock) # define mutex_lock_io_nested(lock, subclass) mutex_lock_io(lock) #endif /* * NOTE: mutex_trylock() follows the spin_trylock() convention, * not the down_trylock() convention! * * Returns 1 if the mutex has been acquired successfully, and 0 on contention. */ extern int mutex_trylock(struct mutex *lock); extern void mutex_unlock(struct mutex *lock); extern int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock); DEFINE_GUARD(mutex, struct mutex *, mutex_lock(_T), mutex_unlock(_T)) DEFINE_FREE(mutex, struct mutex *, if (_T) mutex_unlock(_T)) #endif /* __LINUX_MUTEX_H */ PK ! ��g� � kcsan.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * The Kernel Concurrency Sanitizer (KCSAN) infrastructure. Public interface and * data structures to set up runtime. See kcsan-checks.h for explicit checks and * modifiers. For more info please see Documentation/dev-tools/kcsan.rst. * * Copyright (C) 2019, Google LLC. */ #ifndef _LINUX_KCSAN_H #define _LINUX_KCSAN_H #include <linux/kcsan-checks.h> #include <linux/types.h> #ifdef CONFIG_KCSAN /* * Context for each thread of execution: for tasks, this is stored in * task_struct, and interrupts access internal per-CPU storage. */ struct kcsan_ctx { int disable_count; /* disable counter */ int atomic_next; /* number of following atomic ops */ /* * We distinguish between: (a) nestable atomic regions that may contain * other nestable regions; and (b) flat atomic regions that do not keep * track of nesting. Both (a) and (b) are entirely independent of each * other, and a flat region may be started in a nestable region or * vice-versa. * * This is required because, for example, in the annotations for * seqlocks, we declare seqlock writer critical sections as (a) nestable * atomic regions, but reader critical sections as (b) flat atomic * regions, but have encountered cases where seqlock reader critical * sections are contained within writer critical sections (the opposite * may be possible, too). * * To support these cases, we independently track the depth of nesting * for (a), and whether the leaf level is flat for (b). */ int atomic_nest_count; bool in_flat_atomic; /* * Access mask for all accesses if non-zero. */ unsigned long access_mask; /* List of scoped accesses. */ struct list_head scoped_accesses; }; /** * kcsan_init - initialize KCSAN runtime */ void kcsan_init(void); #else /* CONFIG_KCSAN */ static inline void kcsan_init(void) { } #endif /* CONFIG_KCSAN */ #endif /* _LINUX_KCSAN_H */ PK ! Q>� + + dio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* header file for DIO boards for the HP300 architecture. * Maybe this should handle DIO-II later? * The general structure of this is vaguely based on how * the Amiga port handles Zorro boards. * Copyright (C) Peter Maydell 05/1998 <pmaydell@chiark.greenend.org.uk> * Converted to driver model Jochen Friedrich <jochen@scram.de> * * The board IDs are from the NetBSD kernel, which for once provided * helpful comments... * * This goes with drivers/dio/dio.c */ #ifndef _LINUX_DIO_H #define _LINUX_DIO_H /* The DIO boards in a system are distinguished by 'select codes' which * range from 0-63 (DIO) and 132-255 (DIO-II). * The DIO board with select code sc is located at physical address * 0x600000 + sc * 0x10000 * So DIO cards cover [0x600000-0x800000); the areas [0x200000-0x400000) and * [0x800000-0x1000000) are for additional space required by things * like framebuffers. [0x400000-0x600000) is for miscellaneous internal I/O. * On Linux, this is currently all mapped into the virtual address space * at 0xf0000000 on bootup. * DIO-II boards are at 0x1000000 + (sc - 132) * 0x400000 * which is address range [0x1000000-0x20000000) -- too big to map completely, * so currently we just don't handle DIO-II boards. It wouldn't be hard to * do with ioremap() though. */ #include <linux/device.h> #ifdef __KERNEL__ #include <asm/hp300hw.h> typedef __u16 dio_id; /* * DIO devices */ struct dio_dev { struct dio_bus *bus; dio_id id; int scode; struct dio_driver *driver; /* which driver has allocated this device */ struct device dev; /* Generic device interface */ u8 ipl; char name[64]; struct resource resource; }; #define to_dio_dev(n) container_of(n, struct dio_dev, dev) /* * DIO bus */ struct dio_bus { struct list_head devices; /* list of devices on this bus */ unsigned int num_resources; /* number of resources */ struct resource resources[2]; /* address space routed to this bus */ struct device dev; char name[10]; }; extern struct dio_bus dio_bus; /* Single DIO bus */ extern struct bus_type dio_bus_type; /* * DIO device IDs */ struct dio_device_id { dio_id id; /* Device ID or DIO_WILDCARD */ unsigned long driver_data; /* Data private to the driver */ }; /* * DIO device drivers */ struct dio_driver { struct list_head node; char *name; const struct dio_device_id *id_table; /* NULL if wants all devices */ int (*probe)(struct dio_dev *z, const struct dio_device_id *id); /* New device inserted */ void (*remove)(struct dio_dev *z); /* Device removed (NULL if not a hot-plug capable driver) */ struct device_driver driver; }; #define to_dio_driver(drv) container_of(drv, struct dio_driver, driver) /* DIO/DIO-II boards all have the following 8bit registers. * These are offsets from the base of the device. */ #define DIO_IDOFF 0x01 /* primary device ID */ #define DIO_IPLOFF 0x03 /* interrupt priority level */ #define DIO_SECIDOFF 0x15 /* secondary device ID */ #define DIOII_SIZEOFF 0x101 /* device size, DIO-II only */ #define DIO_VIRADDRBASE 0xf0000000UL /* vir addr where IOspace is mapped */ #define DIO_BASE 0x600000 /* start of DIO space */ #define DIO_END 0x1000000 /* end of DIO space */ #define DIO_DEVSIZE 0x10000 /* size of a DIO device */ #define DIOII_BASE 0x01000000 /* start of DIO-II space */ #define DIOII_END 0x20000000 /* end of DIO-II space */ #define DIOII_DEVSIZE 0x00400000 /* size of a DIO-II device */ /* Highest valid select code. If we add DIO-II support this should become * 256 for everything except HP320, which only has DIO. */ #define DIO_SCMAX (hp300_model == HP_320 ? 32 : 256) #define DIOII_SCBASE 132 /* lowest DIO-II select code */ #define DIO_SCINHOLE(scode) (((scode) >= 32) && ((scode) < DIOII_SCBASE)) #define DIO_ISDIOII(scode) ((scode) >= 132 && (scode) < 256) /* macros to read device IDs, given base address */ #define DIO_ID(baseaddr) in_8((baseaddr) + DIO_IDOFF) #define DIO_SECID(baseaddr) in_8((baseaddr) + DIO_SECIDOFF) /* extract the interrupt level */ #define DIO_IPL(baseaddr) (((in_8((baseaddr) + DIO_IPLOFF) >> 4) & 0x03) + 3) /* find the size of a DIO-II board's address space. * DIO boards are all fixed length. */ #define DIOII_SIZE(baseaddr) ((in_8((baseaddr) + DIOII_SIZEOFF) + 1) * 0x100000) /* general purpose macro for both DIO and DIO-II */ #define DIO_SIZE(scode, base) (DIO_ISDIOII((scode)) ? DIOII_SIZE((base)) : DIO_DEVSIZE) /* The hardware has primary and secondary IDs; we encode these in a single * int as PRIMARY ID & (SECONDARY ID << 8). * In practice this is only important for framebuffers, * and everybody else just sets ID fields equal to the DIO_ID_FOO value. */ #define DIO_ENCODE_ID(pr,sec) ((((int)sec & 0xff) << 8) | ((int)pr & 0xff)) /* macro to determine whether a given primary ID requires a secondary ID byte */ #define DIO_NEEDSSECID(id) ((id) == DIO_ID_FBUFFER) #define DIO_WILDCARD 0xff /* Now a whole slew of macros giving device IDs and descriptive strings: */ #define DIO_ID_DCA0 0x02 /* 98644A serial */ #define DIO_DESC_DCA0 "98644A DCA0 serial" #define DIO_ID_DCA0REM 0x82 /* 98644A serial */ #define DIO_DESC_DCA0REM "98644A DCA0REM serial" #define DIO_ID_DCA1 0x42 /* 98644A serial */ #define DIO_DESC_DCA1 "98644A DCA1 serial" #define DIO_ID_DCA1REM 0xc2 /* 98644A serial */ #define DIO_DESC_DCA1REM "98644A DCA1REM serial" #define DIO_ID_DCM 0x05 /* 98642A serial MUX */ #define DIO_DESC_DCM "98642A DCM serial MUX" #define DIO_ID_DCMREM 0x85 /* 98642A serial MUX */ #define DIO_DESC_DCMREM "98642A DCMREM serial MUX" #define DIO_ID_LAN 0x15 /* 98643A LAN */ #define DIO_DESC_LAN "98643A LANCE ethernet" #define DIO_ID_FHPIB 0x08 /* 98625A/98625B fast HP-IB */ #define DIO_DESC_FHPIB "98625A/98625B fast HPIB" #define DIO_ID_NHPIB 0x01 /* 98624A HP-IB (normal ie slow) */ #define DIO_DESC_NHPIB "98624A HPIB" #define DIO_ID_SCSI0 0x07 /* 98265A SCSI */ #define DIO_DESC_SCSI0 "98265A SCSI0" #define DIO_ID_SCSI1 0x27 /* ditto */ #define DIO_DESC_SCSI1 "98265A SCSI1" #define DIO_ID_SCSI2 0x47 /* ditto */ #define DIO_DESC_SCSI2 "98265A SCSI2" #define DIO_ID_SCSI3 0x67 /* ditto */ #define DIO_DESC_SCSI3 "98265A SCSI3" #define DIO_ID_FBUFFER 0x39 /* framebuffer: flavour is distinguished by secondary ID */ #define DIO_DESC_FBUFFER "bitmapped display" /* the NetBSD kernel source is a bit unsure as to what these next IDs actually do :-> */ #define DIO_ID_MISC0 0x03 /* 98622A */ #define DIO_DESC_MISC0 "98622A" #define DIO_ID_MISC1 0x04 /* 98623A */ #define DIO_DESC_MISC1 "98623A" #define DIO_ID_PARALLEL 0x06 /* internal parallel */ #define DIO_DESC_PARALLEL "internal parallel" #define DIO_ID_MISC2 0x09 /* 98287A keyboard */ #define DIO_DESC_MISC2 "98287A keyboard" #define DIO_ID_MISC3 0x0a /* HP98635A FP accelerator */ #define DIO_DESC_MISC3 "HP98635A FP accelerator" #define DIO_ID_MISC4 0x0b /* timer */ #define DIO_DESC_MISC4 "timer" #define DIO_ID_MISC5 0x12 /* 98640A */ #define DIO_DESC_MISC5 "98640A" #define DIO_ID_MISC6 0x16 /* 98659A */ #define DIO_DESC_MISC6 "98659A" #define DIO_ID_MISC7 0x19 /* 237 display */ #define DIO_DESC_MISC7 "237 display" #define DIO_ID_MISC8 0x1a /* quad-wide card */ #define DIO_DESC_MISC8 "quad-wide card" #define DIO_ID_MISC9 0x1b /* 98253A */ #define DIO_DESC_MISC9 "98253A" #define DIO_ID_MISC10 0x1c /* 98627A */ #define DIO_DESC_MISC10 "98253A" #define DIO_ID_MISC11 0x1d /* 98633A */ #define DIO_DESC_MISC11 "98633A" #define DIO_ID_MISC12 0x1e /* 98259A */ #define DIO_DESC_MISC12 "98259A" #define DIO_ID_MISC13 0x1f /* 8741 */ #define DIO_DESC_MISC13 "8741" #define DIO_ID_VME 0x31 /* 98577A VME adapter */ #define DIO_DESC_VME "98577A VME adapter" #define DIO_ID_DCL 0x34 /* 98628A serial */ #define DIO_DESC_DCL "98628A DCL serial" #define DIO_ID_DCLREM 0xb4 /* 98628A serial */ #define DIO_DESC_DCLREM "98628A DCLREM serial" /* These are the secondary IDs for the framebuffers */ #define DIO_ID2_GATORBOX 0x01 /* 98700/98710 "gatorbox" */ #define DIO_DESC2_GATORBOX "98700/98710 \"gatorbox\" display" #define DIO_ID2_TOPCAT 0x02 /* 98544/98545/98547 "topcat" */ #define DIO_DESC2_TOPCAT "98544/98545/98547 \"topcat\" display" #define DIO_ID2_RENAISSANCE 0x04 /* 98720/98721 "renaissance" */ #define DIO_DESC2_RENAISSANCE "98720/98721 \"renaissance\" display" #define DIO_ID2_LRCATSEYE 0x05 /* lowres "catseye" */ #define DIO_DESC2_LRCATSEYE "low-res catseye display" #define DIO_ID2_HRCCATSEYE 0x06 /* highres colour "catseye" */ #define DIO_DESC2_HRCCATSEYE "high-res color catseye display" #define DIO_ID2_HRMCATSEYE 0x07 /* highres mono "catseye" */ #define DIO_DESC2_HRMCATSEYE "high-res mono catseye display" #define DIO_ID2_DAVINCI 0x08 /* 98730/98731 "davinci" */ #define DIO_DESC2_DAVINCI "98730/98731 \"davinci\" display" #define DIO_ID2_XXXCATSEYE 0x09 /* "catseye" */ #define DIO_DESC2_XXXCATSEYE "catseye display" #define DIO_ID2_HYPERION 0x0e /* A1096A "hyperion" */ #define DIO_DESC2_HYPERION "A1096A \"hyperion\" display" #define DIO_ID2_XGENESIS 0x0b /* "x-genesis"; no NetBSD support */ #define DIO_DESC2_XGENESIS "\"x-genesis\" display" #define DIO_ID2_TIGER 0x0c /* "tiger"; no NetBSD support */ #define DIO_DESC2_TIGER "\"tiger\" display" #define DIO_ID2_YGENESIS 0x0d /* "y-genesis"; no NetBSD support */ #define DIO_DESC2_YGENESIS "\"y-genesis\" display" /* if you add new IDs then you should tell dio.c about them so it can * identify them... */ extern int dio_find(int deviceid); extern unsigned long dio_scodetophysaddr(int scode); extern int dio_create_sysfs_dev_files(struct dio_dev *); /* New-style probing */ extern int dio_register_driver(struct dio_driver *); extern void dio_unregister_driver(struct dio_driver *); #define dio_resource_start(d) ((d)->resource.start) #define dio_resource_end(d) ((d)->resource.end) #define dio_resource_len(d) (resource_size(&(d)->resource)) #define dio_resource_flags(d) ((d)->resource.flags) #define dio_request_device(d, name) \ request_mem_region(dio_resource_start(d), dio_resource_len(d), name) #define dio_release_device(d) \ release_mem_region(dio_resource_start(d), dio_resource_len(d)) /* Similar to the helpers above, these manipulate per-dio_dev * driver-specific data. They are really just a wrapper around * the generic device structure functions of these calls. */ static inline void *dio_get_drvdata (struct dio_dev *d) { return dev_get_drvdata(&d->dev); } static inline void dio_set_drvdata (struct dio_dev *d, void *data) { dev_set_drvdata(&d->dev, data); } #endif /* __KERNEL__ */ #endif /* ndef _LINUX_DIO_H */ PK ! �?�3�) �) pm_qos.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions related to Power Management Quality of Service (PM QoS). * * Copyright (C) 2020 Intel Corporation * * Authors: * Mark Gross <mgross@linux.intel.com> * Rafael J. Wysocki <rafael.j.wysocki@intel.com> */ #ifndef _LINUX_PM_QOS_H #define _LINUX_PM_QOS_H #include <linux/plist.h> #include <linux/notifier.h> #include <linux/device.h> enum pm_qos_flags_status { PM_QOS_FLAGS_UNDEFINED = -1, PM_QOS_FLAGS_NONE, PM_QOS_FLAGS_SOME, PM_QOS_FLAGS_ALL, }; #define PM_QOS_DEFAULT_VALUE (-1) #define PM_QOS_LATENCY_ANY S32_MAX #define PM_QOS_LATENCY_ANY_NS ((s64)PM_QOS_LATENCY_ANY * NSEC_PER_USEC) #define PM_QOS_CPU_LATENCY_DEFAULT_VALUE (2000 * USEC_PER_SEC) #define PM_QOS_RESUME_LATENCY_DEFAULT_VALUE PM_QOS_LATENCY_ANY #define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT PM_QOS_LATENCY_ANY #define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS PM_QOS_LATENCY_ANY_NS #define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE 0 #define PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE 0 #define PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE FREQ_QOS_MAX_DEFAULT_VALUE #define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT (-1) #define PM_QOS_FLAG_NO_POWER_OFF (1 << 0) enum pm_qos_type { PM_QOS_UNITIALIZED, PM_QOS_MAX, /* return the largest value */ PM_QOS_MIN, /* return the smallest value */ }; /* * Note: The lockless read path depends on the CPU accessing target_value * or effective_flags atomically. Atomic access is only guaranteed on all CPU * types linux supports for 32 bit quantites */ struct pm_qos_constraints { struct plist_head list; s32 target_value; /* Do not change to 64 bit */ s32 default_value; s32 no_constraint_value; enum pm_qos_type type; struct blocking_notifier_head *notifiers; }; struct pm_qos_request { struct plist_node node; struct pm_qos_constraints *qos; }; struct pm_qos_flags_request { struct list_head node; s32 flags; /* Do not change to 64 bit */ }; struct pm_qos_flags { struct list_head list; s32 effective_flags; /* Do not change to 64 bit */ }; #define FREQ_QOS_MIN_DEFAULT_VALUE 0 #define FREQ_QOS_MAX_DEFAULT_VALUE S32_MAX enum freq_qos_req_type { FREQ_QOS_MIN = 1, FREQ_QOS_MAX, }; struct freq_constraints { struct pm_qos_constraints min_freq; struct blocking_notifier_head min_freq_notifiers; struct pm_qos_constraints max_freq; struct blocking_notifier_head max_freq_notifiers; }; struct freq_qos_request { enum freq_qos_req_type type; struct plist_node pnode; struct freq_constraints *qos; }; enum dev_pm_qos_req_type { DEV_PM_QOS_RESUME_LATENCY = 1, DEV_PM_QOS_LATENCY_TOLERANCE, DEV_PM_QOS_MIN_FREQUENCY, DEV_PM_QOS_MAX_FREQUENCY, DEV_PM_QOS_FLAGS, }; struct dev_pm_qos_request { enum dev_pm_qos_req_type type; union { struct plist_node pnode; struct pm_qos_flags_request flr; struct freq_qos_request freq; } data; struct device *dev; }; struct dev_pm_qos { struct pm_qos_constraints resume_latency; struct pm_qos_constraints latency_tolerance; struct freq_constraints freq; struct pm_qos_flags flags; struct dev_pm_qos_request *resume_latency_req; struct dev_pm_qos_request *latency_tolerance_req; struct dev_pm_qos_request *flags_req; }; /* Action requested to pm_qos_update_target */ enum pm_qos_req_action { PM_QOS_ADD_REQ, /* Add a new request */ PM_QOS_UPDATE_REQ, /* Update an existing request */ PM_QOS_REMOVE_REQ /* Remove an existing request */ }; static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req) { return req->dev != NULL; } s32 pm_qos_read_value(struct pm_qos_constraints *c); int pm_qos_update_target(struct pm_qos_constraints *c, struct plist_node *node, enum pm_qos_req_action action, int value); bool pm_qos_update_flags(struct pm_qos_flags *pqf, struct pm_qos_flags_request *req, enum pm_qos_req_action action, s32 val); #ifdef CONFIG_CPU_IDLE s32 cpu_latency_qos_limit(void); bool cpu_latency_qos_request_active(struct pm_qos_request *req); void cpu_latency_qos_add_request(struct pm_qos_request *req, s32 value); void cpu_latency_qos_update_request(struct pm_qos_request *req, s32 new_value); void cpu_latency_qos_remove_request(struct pm_qos_request *req); #else static inline s32 cpu_latency_qos_limit(void) { return INT_MAX; } static inline bool cpu_latency_qos_request_active(struct pm_qos_request *req) { return false; } static inline void cpu_latency_qos_add_request(struct pm_qos_request *req, s32 value) {} static inline void cpu_latency_qos_update_request(struct pm_qos_request *req, s32 new_value) {} static inline void cpu_latency_qos_remove_request(struct pm_qos_request *req) {} #endif #ifdef CONFIG_PM enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask); enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask); s32 __dev_pm_qos_resume_latency(struct device *dev); s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type); int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req, enum dev_pm_qos_req_type type, s32 value); int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value); int dev_pm_qos_remove_request(struct dev_pm_qos_request *req); int dev_pm_qos_add_notifier(struct device *dev, struct notifier_block *notifier, enum dev_pm_qos_req_type type); int dev_pm_qos_remove_notifier(struct device *dev, struct notifier_block *notifier, enum dev_pm_qos_req_type type); void dev_pm_qos_constraints_init(struct device *dev); void dev_pm_qos_constraints_destroy(struct device *dev); int dev_pm_qos_add_ancestor_request(struct device *dev, struct dev_pm_qos_request *req, enum dev_pm_qos_req_type type, s32 value); int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value); void dev_pm_qos_hide_latency_limit(struct device *dev); int dev_pm_qos_expose_flags(struct device *dev, s32 value); void dev_pm_qos_hide_flags(struct device *dev); int dev_pm_qos_update_flags(struct device *dev, s32 mask, bool set); s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev); int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val); int dev_pm_qos_expose_latency_tolerance(struct device *dev); void dev_pm_qos_hide_latency_tolerance(struct device *dev); static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev) { return dev->power.qos->resume_latency_req->data.pnode.prio; } static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return dev->power.qos->flags_req->data.flr.flags; } static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev) { return IS_ERR_OR_NULL(dev->power.qos) ? PM_QOS_RESUME_LATENCY_NO_CONSTRAINT : pm_qos_read_value(&dev->power.qos->resume_latency); } #else static inline enum pm_qos_flags_status __dev_pm_qos_flags(struct device *dev, s32 mask) { return PM_QOS_FLAGS_UNDEFINED; } static inline enum pm_qos_flags_status dev_pm_qos_flags(struct device *dev, s32 mask) { return PM_QOS_FLAGS_UNDEFINED; } static inline s32 __dev_pm_qos_resume_latency(struct device *dev) { return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; } static inline s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type) { switch (type) { case DEV_PM_QOS_RESUME_LATENCY: return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; case DEV_PM_QOS_MIN_FREQUENCY: return PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE; case DEV_PM_QOS_MAX_FREQUENCY: return PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE; default: WARN_ON(1); return 0; } } static inline int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req, enum dev_pm_qos_req_type type, s32 value) { return 0; } static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value) { return 0; } static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req) { return 0; } static inline int dev_pm_qos_add_notifier(struct device *dev, struct notifier_block *notifier, enum dev_pm_qos_req_type type) { return 0; } static inline int dev_pm_qos_remove_notifier(struct device *dev, struct notifier_block *notifier, enum dev_pm_qos_req_type type) { return 0; } static inline void dev_pm_qos_constraints_init(struct device *dev) { dev->power.power_state = PMSG_ON; } static inline void dev_pm_qos_constraints_destroy(struct device *dev) { dev->power.power_state = PMSG_INVALID; } static inline int dev_pm_qos_add_ancestor_request(struct device *dev, struct dev_pm_qos_request *req, enum dev_pm_qos_req_type type, s32 value) { return 0; } static inline int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value) { return 0; } static inline void dev_pm_qos_hide_latency_limit(struct device *dev) {} static inline int dev_pm_qos_expose_flags(struct device *dev, s32 value) { return 0; } static inline void dev_pm_qos_hide_flags(struct device *dev) {} static inline int dev_pm_qos_update_flags(struct device *dev, s32 m, bool set) { return 0; } static inline s32 dev_pm_qos_get_user_latency_tolerance(struct device *dev) { return PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT; } static inline int dev_pm_qos_update_user_latency_tolerance(struct device *dev, s32 val) { return 0; } static inline int dev_pm_qos_expose_latency_tolerance(struct device *dev) { return 0; } static inline void dev_pm_qos_hide_latency_tolerance(struct device *dev) {} static inline s32 dev_pm_qos_requested_resume_latency(struct device *dev) { return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; } static inline s32 dev_pm_qos_requested_flags(struct device *dev) { return 0; } static inline s32 dev_pm_qos_raw_resume_latency(struct device *dev) { return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT; } #endif static inline int freq_qos_request_active(struct freq_qos_request *req) { return !IS_ERR_OR_NULL(req->qos); } void freq_constraints_init(struct freq_constraints *qos); s32 freq_qos_read_value(struct freq_constraints *qos, enum freq_qos_req_type type); int freq_qos_add_request(struct freq_constraints *qos, struct freq_qos_request *req, enum freq_qos_req_type type, s32 value); int freq_qos_update_request(struct freq_qos_request *req, s32 new_value); int freq_qos_remove_request(struct freq_qos_request *req); int freq_qos_apply(struct freq_qos_request *req, enum pm_qos_req_action action, s32 value); int freq_qos_add_notifier(struct freq_constraints *qos, enum freq_qos_req_type type, struct notifier_block *notifier); int freq_qos_remove_notifier(struct freq_constraints *qos, enum freq_qos_req_type type, struct notifier_block *notifier); #endif PK ! �� �� � pps_kernel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * PPS API kernel header * * Copyright (C) 2009 Rodolfo Giometti <giometti@linux.it> */ #ifndef LINUX_PPS_KERNEL_H #define LINUX_PPS_KERNEL_H #include <linux/pps.h> #include <linux/cdev.h> #include <linux/device.h> #include <linux/time.h> /* * Global defines */ struct pps_device; /* The specific PPS source info */ struct pps_source_info { char name[PPS_MAX_NAME_LEN]; /* symbolic name */ char path[PPS_MAX_NAME_LEN]; /* path of connected device */ int mode; /* PPS allowed mode */ void (*echo)(struct pps_device *pps, int event, void *data); /* PPS echo function */ struct module *owner; struct device *dev; /* Parent device for device_create */ }; struct pps_event_time { #ifdef CONFIG_NTP_PPS struct timespec64 ts_raw; #endif /* CONFIG_NTP_PPS */ struct timespec64 ts_real; }; /* The main struct */ struct pps_device { struct pps_source_info info; /* PSS source info */ struct pps_kparams params; /* PPS current params */ __u32 assert_sequence; /* PPS assert event seq # */ __u32 clear_sequence; /* PPS clear event seq # */ struct pps_ktime assert_tu; struct pps_ktime clear_tu; int current_mode; /* PPS mode at event time */ unsigned int last_ev; /* last PPS event id */ unsigned int last_fetched_ev; /* last fetched PPS event id */ wait_queue_head_t queue; /* PPS event queue */ unsigned int id; /* PPS source unique ID */ void const *lookup_cookie; /* For pps_lookup_dev() only */ struct device dev; struct fasync_struct *async_queue; /* fasync method */ spinlock_t lock; }; /* * Global variables */ extern const struct attribute_group *pps_groups[]; /* * Internal functions. * * These are not actually part of the exported API, but this is a * convenient header file to put them in. */ extern int pps_register_cdev(struct pps_device *pps); extern void pps_unregister_cdev(struct pps_device *pps); /* * Exported functions */ extern struct pps_device *pps_register_source( struct pps_source_info *info, int default_params); extern void pps_unregister_source(struct pps_device *pps); extern void pps_event(struct pps_device *pps, struct pps_event_time *ts, int event, void *data); /* Look up a pps_device by magic cookie */ struct pps_device *pps_lookup_dev(void const *cookie); static inline void timespec_to_pps_ktime(struct pps_ktime *kt, struct timespec64 ts) { kt->sec = ts.tv_sec; kt->nsec = ts.tv_nsec; } static inline void pps_get_ts(struct pps_event_time *ts) { struct system_time_snapshot snap; ktime_get_snapshot(&snap); ts->ts_real = ktime_to_timespec64(snap.real); #ifdef CONFIG_NTP_PPS ts->ts_raw = ktime_to_timespec64(snap.raw); #endif } /* Subtract known time delay from PPS event time(s) */ static inline void pps_sub_ts(struct pps_event_time *ts, struct timespec64 delta) { ts->ts_real = timespec64_sub(ts->ts_real, delta); #ifdef CONFIG_NTP_PPS ts->ts_raw = timespec64_sub(ts->ts_raw, delta); #endif } #endif /* LINUX_PPS_KERNEL_H */ PK ! ���� � zutil.hnu �[��� /* zutil.h -- internal interface and configuration of the compression library * Copyright (C) 1995-1998 Jean-loup Gailly. * For conditions of distribution and use, see copyright notice in zlib.h */ /* WARNING: this file should *not* be used by applications. It is part of the implementation of the compression library and is subject to change. Applications should only use zlib.h. */ /* @(#) $Id: zutil.h,v 1.1 2000/01/01 03:32:23 davem Exp $ */ #ifndef _Z_UTIL_H #define _Z_UTIL_H #include <linux/zlib.h> #include <linux/string.h> #include <linux/kernel.h> typedef unsigned char uch; typedef unsigned short ush; typedef unsigned long ulg; /* common constants */ #define STORED_BLOCK 0 #define STATIC_TREES 1 #define DYN_TREES 2 /* The three kinds of block type */ #define MIN_MATCH 3 #define MAX_MATCH 258 /* The minimum and maximum match lengths */ #define PRESET_DICT 0x20 /* preset dictionary flag in zlib header */ /* target dependencies */ /* Common defaults */ #ifndef OS_CODE # define OS_CODE 0x03 /* assume Unix */ #endif /* functions */ typedef uLong (*check_func) (uLong check, const Byte *buf, uInt len); /* checksum functions */ #define BASE 65521L /* largest prime smaller than 65536 */ #define NMAX 5552 /* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */ #define DO1(buf,i) {s1 += buf[i]; s2 += s1;} #define DO2(buf,i) DO1(buf,i); DO1(buf,i+1); #define DO4(buf,i) DO2(buf,i); DO2(buf,i+2); #define DO8(buf,i) DO4(buf,i); DO4(buf,i+4); #define DO16(buf) DO8(buf,0); DO8(buf,8); /* ========================================================================= */ /* Update a running Adler-32 checksum with the bytes buf[0..len-1] and return the updated checksum. If buf is NULL, this function returns the required initial value for the checksum. An Adler-32 checksum is almost as reliable as a CRC32 but can be computed much faster. Usage example: uLong adler = zlib_adler32(0L, NULL, 0); while (read_buffer(buffer, length) != EOF) { adler = zlib_adler32(adler, buffer, length); } if (adler != original_adler) error(); */ static inline uLong zlib_adler32(uLong adler, const Byte *buf, uInt len) { unsigned long s1 = adler & 0xffff; unsigned long s2 = (adler >> 16) & 0xffff; int k; if (buf == NULL) return 1L; while (len > 0) { k = len < NMAX ? len : NMAX; len -= k; while (k >= 16) { DO16(buf); buf += 16; k -= 16; } if (k != 0) do { s1 += *buf++; s2 += s1; } while (--k); s1 %= BASE; s2 %= BASE; } return (s2 << 16) | s1; } #endif /* _Z_UTIL_H */ PK ! �8�^ dmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __DMI_H__ #define __DMI_H__ #include <linux/list.h> #include <linux/kobject.h> #include <linux/mod_devicetable.h> /* enum dmi_field is in mod_devicetable.h */ enum dmi_device_type { DMI_DEV_TYPE_ANY = 0, DMI_DEV_TYPE_OTHER, DMI_DEV_TYPE_UNKNOWN, DMI_DEV_TYPE_VIDEO, DMI_DEV_TYPE_SCSI, DMI_DEV_TYPE_ETHERNET, DMI_DEV_TYPE_TOKENRING, DMI_DEV_TYPE_SOUND, DMI_DEV_TYPE_PATA, DMI_DEV_TYPE_SATA, DMI_DEV_TYPE_SAS, DMI_DEV_TYPE_IPMI = -1, DMI_DEV_TYPE_OEM_STRING = -2, DMI_DEV_TYPE_DEV_ONBOARD = -3, DMI_DEV_TYPE_DEV_SLOT = -4, }; enum dmi_entry_type { DMI_ENTRY_BIOS = 0, DMI_ENTRY_SYSTEM, DMI_ENTRY_BASEBOARD, DMI_ENTRY_CHASSIS, DMI_ENTRY_PROCESSOR, DMI_ENTRY_MEM_CONTROLLER, DMI_ENTRY_MEM_MODULE, DMI_ENTRY_CACHE, DMI_ENTRY_PORT_CONNECTOR, DMI_ENTRY_SYSTEM_SLOT, DMI_ENTRY_ONBOARD_DEVICE, DMI_ENTRY_OEMSTRINGS, DMI_ENTRY_SYSCONF, DMI_ENTRY_BIOS_LANG, DMI_ENTRY_GROUP_ASSOC, DMI_ENTRY_SYSTEM_EVENT_LOG, DMI_ENTRY_PHYS_MEM_ARRAY, DMI_ENTRY_MEM_DEVICE, DMI_ENTRY_32_MEM_ERROR, DMI_ENTRY_MEM_ARRAY_MAPPED_ADDR, DMI_ENTRY_MEM_DEV_MAPPED_ADDR, DMI_ENTRY_BUILTIN_POINTING_DEV, DMI_ENTRY_PORTABLE_BATTERY, DMI_ENTRY_SYSTEM_RESET, DMI_ENTRY_HW_SECURITY, DMI_ENTRY_SYSTEM_POWER_CONTROLS, DMI_ENTRY_VOLTAGE_PROBE, DMI_ENTRY_COOLING_DEV, DMI_ENTRY_TEMP_PROBE, DMI_ENTRY_ELECTRICAL_CURRENT_PROBE, DMI_ENTRY_OOB_REMOTE_ACCESS, DMI_ENTRY_BIS_ENTRY, DMI_ENTRY_SYSTEM_BOOT, DMI_ENTRY_MGMT_DEV, DMI_ENTRY_MGMT_DEV_COMPONENT, DMI_ENTRY_MGMT_DEV_THRES, DMI_ENTRY_MEM_CHANNEL, DMI_ENTRY_IPMI_DEV, DMI_ENTRY_SYS_POWER_SUPPLY, DMI_ENTRY_ADDITIONAL, DMI_ENTRY_ONBOARD_DEV_EXT, DMI_ENTRY_MGMT_CONTROLLER_HOST, DMI_ENTRY_INACTIVE = 126, DMI_ENTRY_END_OF_TABLE = 127, }; struct dmi_header { u8 type; u8 length; u16 handle; } __packed; struct dmi_device { struct list_head list; int type; const char *name; void *device_data; /* Type specific data */ }; #ifdef CONFIG_DMI struct dmi_dev_onboard { struct dmi_device dev; int instance; int segment; int bus; int devfn; }; extern struct kobject *dmi_kobj; extern int dmi_check_system(const struct dmi_system_id *list); const struct dmi_system_id *dmi_first_match(const struct dmi_system_id *list); extern const char * dmi_get_system_info(int field); extern const struct dmi_device * dmi_find_device(int type, const char *name, const struct dmi_device *from); extern void dmi_setup(void); extern bool dmi_get_date(int field, int *yearp, int *monthp, int *dayp); extern int dmi_get_bios_year(void); extern int dmi_name_in_vendors(const char *str); extern int dmi_name_in_serial(const char *str); extern int dmi_available; extern int dmi_walk(void (*decode)(const struct dmi_header *, void *), void *private_data); extern bool dmi_match(enum dmi_field f, const char *str); extern void dmi_memdev_name(u16 handle, const char **bank, const char **device); extern u64 dmi_memdev_size(u16 handle); extern u8 dmi_memdev_type(u16 handle); extern u16 dmi_memdev_handle(int slot); #else static inline int dmi_check_system(const struct dmi_system_id *list) { return 0; } static inline const char * dmi_get_system_info(int field) { return NULL; } static inline const struct dmi_device * dmi_find_device(int type, const char *name, const struct dmi_device *from) { return NULL; } static inline void dmi_setup(void) { } static inline bool dmi_get_date(int field, int *yearp, int *monthp, int *dayp) { if (yearp) *yearp = 0; if (monthp) *monthp = 0; if (dayp) *dayp = 0; return false; } static inline int dmi_get_bios_year(void) { return -ENXIO; } static inline int dmi_name_in_vendors(const char *s) { return 0; } static inline int dmi_name_in_serial(const char *s) { return 0; } #define dmi_available 0 static inline int dmi_walk(void (*decode)(const struct dmi_header *, void *), void *private_data) { return -ENXIO; } static inline bool dmi_match(enum dmi_field f, const char *str) { return false; } static inline void dmi_memdev_name(u16 handle, const char **bank, const char **device) { } static inline u64 dmi_memdev_size(u16 handle) { return ~0ul; } static inline u8 dmi_memdev_type(u16 handle) { return 0x0; } static inline u16 dmi_memdev_handle(int slot) { return 0xffff; } static inline const struct dmi_system_id * dmi_first_match(const struct dmi_system_id *list) { return NULL; } #endif #endif /* __DMI_H__ */ PK ! /�A / / gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * <linux/gpio.h> * * This is the LEGACY GPIO bulk include file, including legacy APIs. It is * used for GPIO drivers still referencing the global GPIO numberspace, * and should not be included in new code. * * If you're implementing a GPIO driver, only include <linux/gpio/driver.h> * If you're implementing a GPIO consumer, only include <linux/gpio/consumer.h> */ #ifndef __LINUX_GPIO_H #define __LINUX_GPIO_H #include <linux/errno.h> /* see Documentation/driver-api/gpio/legacy.rst */ /* make these flag values available regardless of GPIO kconfig options */ #define GPIOF_DIR_OUT (0 << 0) #define GPIOF_DIR_IN (1 << 0) #define GPIOF_INIT_LOW (0 << 1) #define GPIOF_INIT_HIGH (1 << 1) #define GPIOF_IN (GPIOF_DIR_IN) #define GPIOF_OUT_INIT_LOW (GPIOF_DIR_OUT | GPIOF_INIT_LOW) #define GPIOF_OUT_INIT_HIGH (GPIOF_DIR_OUT | GPIOF_INIT_HIGH) /* Gpio pin is active-low */ #define GPIOF_ACTIVE_LOW (1 << 2) /* Gpio pin is open drain */ #define GPIOF_OPEN_DRAIN (1 << 3) /* Gpio pin is open source */ #define GPIOF_OPEN_SOURCE (1 << 4) #define GPIOF_EXPORT (1 << 5) #define GPIOF_EXPORT_CHANGEABLE (1 << 6) #define GPIOF_EXPORT_DIR_FIXED (GPIOF_EXPORT) #define GPIOF_EXPORT_DIR_CHANGEABLE (GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE) /** * struct gpio - a structure describing a GPIO with configuration * @gpio: the GPIO number * @flags: GPIO configuration as specified by GPIOF_* * @label: a literal description string of this GPIO */ struct gpio { unsigned gpio; unsigned long flags; const char *label; }; #ifdef CONFIG_GPIOLIB #ifdef CONFIG_ARCH_HAVE_CUSTOM_GPIO_H #include <asm/gpio.h> #else #include <asm-generic/gpio.h> static inline int gpio_get_value(unsigned int gpio) { return __gpio_get_value(gpio); } static inline void gpio_set_value(unsigned int gpio, int value) { __gpio_set_value(gpio, value); } static inline int gpio_cansleep(unsigned int gpio) { return __gpio_cansleep(gpio); } static inline int gpio_to_irq(unsigned int gpio) { return __gpio_to_irq(gpio); } static inline int irq_to_gpio(unsigned int irq) { return -EINVAL; } #endif /* ! CONFIG_ARCH_HAVE_CUSTOM_GPIO_H */ /* CONFIG_GPIOLIB: bindings for managed devices that want to request gpios */ struct device; int devm_gpio_request(struct device *dev, unsigned gpio, const char *label); int devm_gpio_request_one(struct device *dev, unsigned gpio, unsigned long flags, const char *label); void devm_gpio_free(struct device *dev, unsigned int gpio); #else /* ! CONFIG_GPIOLIB */ #include <linux/kernel.h> #include <linux/types.h> #include <linux/bug.h> struct device; struct gpio_chip; static inline bool gpio_is_valid(int number) { return false; } static inline int gpio_request(unsigned gpio, const char *label) { return -ENOSYS; } static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label) { return -ENOSYS; } static inline int gpio_request_array(const struct gpio *array, size_t num) { return -ENOSYS; } static inline void gpio_free(unsigned gpio) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(1); } static inline void gpio_free_array(const struct gpio *array, size_t num) { might_sleep(); /* GPIO can never have been requested */ WARN_ON(1); } static inline int gpio_direction_input(unsigned gpio) { return -ENOSYS; } static inline int gpio_direction_output(unsigned gpio, int value) { return -ENOSYS; } static inline int gpio_set_debounce(unsigned gpio, unsigned debounce) { return -ENOSYS; } static inline int gpio_get_value(unsigned gpio) { /* GPIO can never have been requested or set as {in,out}put */ WARN_ON(1); return 0; } static inline void gpio_set_value(unsigned gpio, int value) { /* GPIO can never have been requested or set as output */ WARN_ON(1); } static inline int gpio_cansleep(unsigned gpio) { /* GPIO can never have been requested or set as {in,out}put */ WARN_ON(1); return 0; } static inline int gpio_get_value_cansleep(unsigned gpio) { /* GPIO can never have been requested or set as {in,out}put */ WARN_ON(1); return 0; } static inline void gpio_set_value_cansleep(unsigned gpio, int value) { /* GPIO can never have been requested or set as output */ WARN_ON(1); } static inline int gpio_export(unsigned gpio, bool direction_may_change) { /* GPIO can never have been requested or set as {in,out}put */ WARN_ON(1); return -EINVAL; } static inline int gpio_export_link(struct device *dev, const char *name, unsigned gpio) { /* GPIO can never have been exported */ WARN_ON(1); return -EINVAL; } static inline void gpio_unexport(unsigned gpio) { /* GPIO can never have been exported */ WARN_ON(1); } static inline int gpio_to_irq(unsigned gpio) { /* GPIO can never have been requested or set as input */ WARN_ON(1); return -EINVAL; } static inline int irq_to_gpio(unsigned irq) { /* irq can never have been returned from gpio_to_irq() */ WARN_ON(1); return -EINVAL; } static inline int devm_gpio_request(struct device *dev, unsigned gpio, const char *label) { WARN_ON(1); return -EINVAL; } static inline int devm_gpio_request_one(struct device *dev, unsigned gpio, unsigned long flags, const char *label) { WARN_ON(1); return -EINVAL; } static inline void devm_gpio_free(struct device *dev, unsigned int gpio) { WARN_ON(1); } #endif /* ! CONFIG_GPIOLIB */ #endif /* __LINUX_GPIO_H */ PK ! 2F`� � pwm_backlight.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Generic PWM backlight driver data - see drivers/video/backlight/pwm_bl.c */ #ifndef __LINUX_PWM_BACKLIGHT_H #define __LINUX_PWM_BACKLIGHT_H #include <linux/backlight.h> struct platform_pwm_backlight_data { int pwm_id; unsigned int max_brightness; unsigned int dft_brightness; unsigned int lth_brightness; unsigned int pwm_period_ns; unsigned int *levels; unsigned int post_pwm_on_delay; unsigned int pwm_off_delay; int (*init)(struct device *dev); int (*notify)(struct device *dev, int brightness); void (*notify_after)(struct device *dev, int brightness); void (*exit)(struct device *dev); int (*check_fb)(struct device *dev, struct fb_info *info); }; #endif PK ! ��P�; �; mISDNif.hnu �[��� /* * * Author Karsten Keil <kkeil@novell.com> * * Copyright 2008 by Karsten Keil <kkeil@novell.com> * * This code is free software; you can redistribute it and/or modify * it under the terms of the GNU LESSER GENERAL PUBLIC LICENSE * version 2.1 as published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU LESSER GENERAL PUBLIC LICENSE for more details. * */ #ifndef mISDNIF_H #define mISDNIF_H #include <linux/types.h> #include <linux/errno.h> #include <linux/socket.h> /* * ABI Version 32 bit * * <8 bit> Major version * - changed if any interface become backwards incompatible * * <8 bit> Minor version * - changed if any interface is extended but backwards compatible * * <16 bit> Release number * - should be incremented on every checkin */ #define MISDN_MAJOR_VERSION 1 #define MISDN_MINOR_VERSION 1 #define MISDN_RELEASE 29 /* primitives for information exchange * generell format * <16 bit 0 > * <8 bit command> * BIT 8 = 1 LAYER private * BIT 7 = 1 answer * BIT 6 = 1 DATA * <8 bit target layer mask> * * Layer = 00 is reserved for general commands Layer = 01 L2 -> HW Layer = 02 HW -> L2 Layer = 04 L3 -> L2 Layer = 08 L2 -> L3 * Layer = FF is reserved for broadcast commands */ #define MISDN_CMDMASK 0xff00 #define MISDN_LAYERMASK 0x00ff /* generell commands */ #define OPEN_CHANNEL 0x0100 #define CLOSE_CHANNEL 0x0200 #define CONTROL_CHANNEL 0x0300 #define CHECK_DATA 0x0400 /* layer 2 -> layer 1 */ #define PH_ACTIVATE_REQ 0x0101 #define PH_DEACTIVATE_REQ 0x0201 #define PH_DATA_REQ 0x2001 #define MPH_ACTIVATE_REQ 0x0501 #define MPH_DEACTIVATE_REQ 0x0601 #define MPH_INFORMATION_REQ 0x0701 #define PH_CONTROL_REQ 0x0801 /* layer 1 -> layer 2 */ #define PH_ACTIVATE_IND 0x0102 #define PH_ACTIVATE_CNF 0x4102 #define PH_DEACTIVATE_IND 0x0202 #define PH_DEACTIVATE_CNF 0x4202 #define PH_DATA_IND 0x2002 #define PH_DATA_E_IND 0x3002 #define MPH_ACTIVATE_IND 0x0502 #define MPH_DEACTIVATE_IND 0x0602 #define MPH_INFORMATION_IND 0x0702 #define PH_DATA_CNF 0x6002 #define PH_CONTROL_IND 0x0802 #define PH_CONTROL_CNF 0x4802 /* layer 3 -> layer 2 */ #define DL_ESTABLISH_REQ 0x1004 #define DL_RELEASE_REQ 0x1104 #define DL_DATA_REQ 0x3004 #define DL_UNITDATA_REQ 0x3104 #define DL_INFORMATION_REQ 0x0004 /* layer 2 -> layer 3 */ #define DL_ESTABLISH_IND 0x1008 #define DL_ESTABLISH_CNF 0x5008 #define DL_RELEASE_IND 0x1108 #define DL_RELEASE_CNF 0x5108 #define DL_DATA_IND 0x3008 #define DL_UNITDATA_IND 0x3108 #define DL_INFORMATION_IND 0x0008 /* intern layer 2 management */ #define MDL_ASSIGN_REQ 0x1804 #define MDL_ASSIGN_IND 0x1904 #define MDL_REMOVE_REQ 0x1A04 #define MDL_REMOVE_IND 0x1B04 #define MDL_STATUS_UP_IND 0x1C04 #define MDL_STATUS_DOWN_IND 0x1D04 #define MDL_STATUS_UI_IND 0x1E04 #define MDL_ERROR_IND 0x1F04 #define MDL_ERROR_RSP 0x5F04 /* intern layer 2 */ #define DL_TIMER200_IND 0x7004 #define DL_TIMER203_IND 0x7304 #define DL_INTERN_MSG 0x7804 /* DL_INFORMATION_IND types */ #define DL_INFO_L2_CONNECT 0x0001 #define DL_INFO_L2_REMOVED 0x0002 /* PH_CONTROL types */ /* TOUCH TONE IS 0x20XX XX "0"..."9", "A","B","C","D","*","#" */ #define DTMF_TONE_VAL 0x2000 #define DTMF_TONE_MASK 0x007F #define DTMF_TONE_START 0x2100 #define DTMF_TONE_STOP 0x2200 #define DTMF_HFC_COEF 0x4000 #define DSP_CONF_JOIN 0x2403 #define DSP_CONF_SPLIT 0x2404 #define DSP_RECEIVE_OFF 0x2405 #define DSP_RECEIVE_ON 0x2406 #define DSP_ECHO_ON 0x2407 #define DSP_ECHO_OFF 0x2408 #define DSP_MIX_ON 0x2409 #define DSP_MIX_OFF 0x240a #define DSP_DELAY 0x240b #define DSP_JITTER 0x240c #define DSP_TXDATA_ON 0x240d #define DSP_TXDATA_OFF 0x240e #define DSP_TX_DEJITTER 0x240f #define DSP_TX_DEJ_OFF 0x2410 #define DSP_TONE_PATT_ON 0x2411 #define DSP_TONE_PATT_OFF 0x2412 #define DSP_VOL_CHANGE_TX 0x2413 #define DSP_VOL_CHANGE_RX 0x2414 #define DSP_BF_ENABLE_KEY 0x2415 #define DSP_BF_DISABLE 0x2416 #define DSP_BF_ACCEPT 0x2416 #define DSP_BF_REJECT 0x2417 #define DSP_PIPELINE_CFG 0x2418 #define HFC_VOL_CHANGE_TX 0x2601 #define HFC_VOL_CHANGE_RX 0x2602 #define HFC_SPL_LOOP_ON 0x2603 #define HFC_SPL_LOOP_OFF 0x2604 /* for T30 FAX and analog modem */ #define HW_MOD_FRM 0x4000 #define HW_MOD_FRH 0x4001 #define HW_MOD_FTM 0x4002 #define HW_MOD_FTH 0x4003 #define HW_MOD_FTS 0x4004 #define HW_MOD_CONNECT 0x4010 #define HW_MOD_OK 0x4011 #define HW_MOD_NOCARR 0x4012 #define HW_MOD_FCERROR 0x4013 #define HW_MOD_READY 0x4014 #define HW_MOD_LASTDATA 0x4015 /* DSP_TONE_PATT_ON parameter */ #define TONE_OFF 0x0000 #define TONE_GERMAN_DIALTONE 0x0001 #define TONE_GERMAN_OLDDIALTONE 0x0002 #define TONE_AMERICAN_DIALTONE 0x0003 #define TONE_GERMAN_DIALPBX 0x0004 #define TONE_GERMAN_OLDDIALPBX 0x0005 #define TONE_AMERICAN_DIALPBX 0x0006 #define TONE_GERMAN_RINGING 0x0007 #define TONE_GERMAN_OLDRINGING 0x0008 #define TONE_AMERICAN_RINGPBX 0x000b #define TONE_GERMAN_RINGPBX 0x000c #define TONE_GERMAN_OLDRINGPBX 0x000d #define TONE_AMERICAN_RINGING 0x000e #define TONE_GERMAN_BUSY 0x000f #define TONE_GERMAN_OLDBUSY 0x0010 #define TONE_AMERICAN_BUSY 0x0011 #define TONE_GERMAN_HANGUP 0x0012 #define TONE_GERMAN_OLDHANGUP 0x0013 #define TONE_AMERICAN_HANGUP 0x0014 #define TONE_SPECIAL_INFO 0x0015 #define TONE_GERMAN_GASSENBESETZT 0x0016 #define TONE_GERMAN_AUFSCHALTTON 0x0016 /* MPH_INFORMATION_IND */ #define L1_SIGNAL_LOS_OFF 0x0010 #define L1_SIGNAL_LOS_ON 0x0011 #define L1_SIGNAL_AIS_OFF 0x0012 #define L1_SIGNAL_AIS_ON 0x0013 #define L1_SIGNAL_RDI_OFF 0x0014 #define L1_SIGNAL_RDI_ON 0x0015 #define L1_SIGNAL_SLIP_RX 0x0020 #define L1_SIGNAL_SLIP_TX 0x0021 /* * protocol ids * D channel 1-31 * B channel 33 - 63 */ #define ISDN_P_NONE 0 #define ISDN_P_BASE 0 #define ISDN_P_TE_S0 0x01 #define ISDN_P_NT_S0 0x02 #define ISDN_P_TE_E1 0x03 #define ISDN_P_NT_E1 0x04 #define ISDN_P_TE_UP0 0x05 #define ISDN_P_NT_UP0 0x06 #define IS_ISDN_P_TE(p) ((p == ISDN_P_TE_S0) || (p == ISDN_P_TE_E1) || \ (p == ISDN_P_TE_UP0) || (p == ISDN_P_LAPD_TE)) #define IS_ISDN_P_NT(p) ((p == ISDN_P_NT_S0) || (p == ISDN_P_NT_E1) || \ (p == ISDN_P_NT_UP0) || (p == ISDN_P_LAPD_NT)) #define IS_ISDN_P_S0(p) ((p == ISDN_P_TE_S0) || (p == ISDN_P_NT_S0)) #define IS_ISDN_P_E1(p) ((p == ISDN_P_TE_E1) || (p == ISDN_P_NT_E1)) #define IS_ISDN_P_UP0(p) ((p == ISDN_P_TE_UP0) || (p == ISDN_P_NT_UP0)) #define ISDN_P_LAPD_TE 0x10 #define ISDN_P_LAPD_NT 0x11 #define ISDN_P_B_MASK 0x1f #define ISDN_P_B_START 0x20 #define ISDN_P_B_RAW 0x21 #define ISDN_P_B_HDLC 0x22 #define ISDN_P_B_X75SLP 0x23 #define ISDN_P_B_L2DTMF 0x24 #define ISDN_P_B_L2DSP 0x25 #define ISDN_P_B_L2DSPHDLC 0x26 #define ISDN_P_B_T30_FAX 0x27 #define ISDN_P_B_MODEM_ASYNC 0x28 #define OPTION_L2_PMX 1 #define OPTION_L2_PTP 2 #define OPTION_L2_FIXEDTEI 3 #define OPTION_L2_CLEANUP 4 #define OPTION_L1_HOLD 5 /* should be in sync with linux/kobject.h:KOBJ_NAME_LEN */ #define MISDN_MAX_IDLEN 20 struct mISDNhead { unsigned int prim; unsigned int id; } __packed; #define MISDN_HEADER_LEN sizeof(struct mISDNhead) #define MAX_DATA_SIZE 2048 #define MAX_DATA_MEM (MAX_DATA_SIZE + MISDN_HEADER_LEN) #define MAX_DFRAME_LEN 260 #define MISDN_ID_ADDR_MASK 0xFFFF #define MISDN_ID_TEI_MASK 0xFF00 #define MISDN_ID_SAPI_MASK 0x00FF #define MISDN_ID_TEI_ANY 0x7F00 #define MISDN_ID_ANY 0xFFFF #define MISDN_ID_NONE 0xFFFE #define GROUP_TEI 127 #define TEI_SAPI 63 #define CTRL_SAPI 0 #define MISDN_MAX_CHANNEL 127 #define MISDN_CHMAP_SIZE ((MISDN_MAX_CHANNEL + 1) >> 3) #define SOL_MISDN 0 struct sockaddr_mISDN { sa_family_t family; unsigned char dev; unsigned char channel; unsigned char sapi; unsigned char tei; }; struct mISDNversion { unsigned char major; unsigned char minor; unsigned short release; }; struct mISDN_devinfo { u_int id; u_int Dprotocols; u_int Bprotocols; u_int protocol; u_char channelmap[MISDN_CHMAP_SIZE]; u_int nrbchan; char name[MISDN_MAX_IDLEN]; }; struct mISDN_devrename { u_int id; char name[MISDN_MAX_IDLEN]; /* new name */ }; /* MPH_INFORMATION_REQ payload */ struct ph_info_ch { __u32 protocol; __u64 Flags; }; struct ph_info_dch { struct ph_info_ch ch; __u16 state; __u16 num_bch; }; struct ph_info { struct ph_info_dch dch; struct ph_info_ch bch[]; }; /* timer device ioctl */ #define IMADDTIMER _IOR('I', 64, int) #define IMDELTIMER _IOR('I', 65, int) /* socket ioctls */ #define IMGETVERSION _IOR('I', 66, int) #define IMGETCOUNT _IOR('I', 67, int) #define IMGETDEVINFO _IOR('I', 68, int) #define IMCTRLREQ _IOR('I', 69, int) #define IMCLEAR_L2 _IOR('I', 70, int) #define IMSETDEVNAME _IOR('I', 71, struct mISDN_devrename) #define IMHOLD_L1 _IOR('I', 72, int) static inline int test_channelmap(u_int nr, u_char *map) { if (nr <= MISDN_MAX_CHANNEL) return map[nr >> 3] & (1 << (nr & 7)); else return 0; } static inline void set_channelmap(u_int nr, u_char *map) { map[nr >> 3] |= (1 << (nr & 7)); } static inline void clear_channelmap(u_int nr, u_char *map) { map[nr >> 3] &= ~(1 << (nr & 7)); } /* CONTROL_CHANNEL parameters */ #define MISDN_CTRL_GETOP 0x0000 #define MISDN_CTRL_LOOP 0x0001 #define MISDN_CTRL_CONNECT 0x0002 #define MISDN_CTRL_DISCONNECT 0x0004 #define MISDN_CTRL_RX_BUFFER 0x0008 #define MISDN_CTRL_PCMCONNECT 0x0010 #define MISDN_CTRL_PCMDISCONNECT 0x0020 #define MISDN_CTRL_SETPEER 0x0040 #define MISDN_CTRL_UNSETPEER 0x0080 #define MISDN_CTRL_RX_OFF 0x0100 #define MISDN_CTRL_FILL_EMPTY 0x0200 #define MISDN_CTRL_GETPEER 0x0400 #define MISDN_CTRL_L1_TIMER3 0x0800 #define MISDN_CTRL_HW_FEATURES_OP 0x2000 #define MISDN_CTRL_HW_FEATURES 0x2001 #define MISDN_CTRL_HFC_OP 0x4000 #define MISDN_CTRL_HFC_PCM_CONN 0x4001 #define MISDN_CTRL_HFC_PCM_DISC 0x4002 #define MISDN_CTRL_HFC_CONF_JOIN 0x4003 #define MISDN_CTRL_HFC_CONF_SPLIT 0x4004 #define MISDN_CTRL_HFC_RECEIVE_OFF 0x4005 #define MISDN_CTRL_HFC_RECEIVE_ON 0x4006 #define MISDN_CTRL_HFC_ECHOCAN_ON 0x4007 #define MISDN_CTRL_HFC_ECHOCAN_OFF 0x4008 #define MISDN_CTRL_HFC_WD_INIT 0x4009 #define MISDN_CTRL_HFC_WD_RESET 0x400A /* special RX buffer value for MISDN_CTRL_RX_BUFFER request.p1 is the minimum * buffer size request.p2 the maximum. Using MISDN_CTRL_RX_SIZE_IGNORE will * not change the value, but still read back the actual stetting. */ #define MISDN_CTRL_RX_SIZE_IGNORE -1 /* socket options */ #define MISDN_TIME_STAMP 0x0001 struct mISDN_ctrl_req { int op; int channel; int p1; int p2; }; /* muxer options */ #define MISDN_OPT_ALL 1 #define MISDN_OPT_TEIMGR 2 #ifdef __KERNEL__ #include <linux/list.h> #include <linux/skbuff.h> #include <linux/net.h> #include <net/sock.h> #include <linux/completion.h> #define DEBUG_CORE 0x000000ff #define DEBUG_CORE_FUNC 0x00000002 #define DEBUG_SOCKET 0x00000004 #define DEBUG_MANAGER 0x00000008 #define DEBUG_SEND_ERR 0x00000010 #define DEBUG_MSG_THREAD 0x00000020 #define DEBUG_QUEUE_FUNC 0x00000040 #define DEBUG_L1 0x0000ff00 #define DEBUG_L1_FSM 0x00000200 #define DEBUG_L2 0x00ff0000 #define DEBUG_L2_FSM 0x00020000 #define DEBUG_L2_CTRL 0x00040000 #define DEBUG_L2_RECV 0x00080000 #define DEBUG_L2_TEI 0x00100000 #define DEBUG_L2_TEIFSM 0x00200000 #define DEBUG_TIMER 0x01000000 #define DEBUG_CLOCK 0x02000000 #define mISDN_HEAD_P(s) ((struct mISDNhead *)&s->cb[0]) #define mISDN_HEAD_PRIM(s) (((struct mISDNhead *)&s->cb[0])->prim) #define mISDN_HEAD_ID(s) (((struct mISDNhead *)&s->cb[0])->id) /* socket states */ #define MISDN_OPEN 1 #define MISDN_BOUND 2 #define MISDN_CLOSED 3 struct mISDNchannel; struct mISDNdevice; struct mISDNstack; struct mISDNclock; struct channel_req { u_int protocol; struct sockaddr_mISDN adr; struct mISDNchannel *ch; }; typedef int (ctrl_func_t)(struct mISDNchannel *, u_int, void *); typedef int (send_func_t)(struct mISDNchannel *, struct sk_buff *); typedef int (create_func_t)(struct channel_req *); struct Bprotocol { struct list_head list; char *name; u_int Bprotocols; create_func_t *create; }; struct mISDNchannel { struct list_head list; u_int protocol; u_int nr; u_long opt; u_int addr; struct mISDNstack *st; struct mISDNchannel *peer; send_func_t *send; send_func_t *recv; ctrl_func_t *ctrl; }; struct mISDN_sock_list { struct hlist_head head; rwlock_t lock; }; struct mISDN_sock { struct sock sk; struct mISDNchannel ch; u_int cmask; struct mISDNdevice *dev; }; struct mISDNdevice { struct mISDNchannel D; u_int id; u_int Dprotocols; u_int Bprotocols; u_int nrbchan; u_char channelmap[MISDN_CHMAP_SIZE]; struct list_head bchannels; struct mISDNchannel *teimgr; struct device dev; }; struct mISDNstack { u_long status; struct mISDNdevice *dev; struct task_struct *thread; struct completion *notify; wait_queue_head_t workq; struct sk_buff_head msgq; struct list_head layer2; struct mISDNchannel *layer1; struct mISDNchannel own; struct mutex lmutex; /* protect lists */ struct mISDN_sock_list l1sock; #ifdef MISDN_MSG_STATS u_int msg_cnt; u_int sleep_cnt; u_int stopped_cnt; #endif }; typedef int (clockctl_func_t)(void *, int); struct mISDNclock { struct list_head list; char name[64]; int pri; clockctl_func_t *ctl; void *priv; }; /* global alloc/queue functions */ static inline struct sk_buff * mI_alloc_skb(unsigned int len, gfp_t gfp_mask) { struct sk_buff *skb; skb = alloc_skb(len + MISDN_HEADER_LEN, gfp_mask); if (likely(skb)) skb_reserve(skb, MISDN_HEADER_LEN); return skb; } static inline struct sk_buff * _alloc_mISDN_skb(u_int prim, u_int id, u_int len, void *dp, gfp_t gfp_mask) { struct sk_buff *skb = mI_alloc_skb(len, gfp_mask); struct mISDNhead *hh; if (!skb) return NULL; if (len) skb_put_data(skb, dp, len); hh = mISDN_HEAD_P(skb); hh->prim = prim; hh->id = id; return skb; } static inline void _queue_data(struct mISDNchannel *ch, u_int prim, u_int id, u_int len, void *dp, gfp_t gfp_mask) { struct sk_buff *skb; if (!ch->peer) return; skb = _alloc_mISDN_skb(prim, id, len, dp, gfp_mask); if (!skb) return; if (ch->recv(ch->peer, skb)) dev_kfree_skb(skb); } /* global register/unregister functions */ extern int mISDN_register_device(struct mISDNdevice *, struct device *parent, char *name); extern void mISDN_unregister_device(struct mISDNdevice *); extern int mISDN_register_Bprotocol(struct Bprotocol *); extern void mISDN_unregister_Bprotocol(struct Bprotocol *); extern struct mISDNclock *mISDN_register_clock(char *, int, clockctl_func_t *, void *); extern void mISDN_unregister_clock(struct mISDNclock *); static inline struct mISDNdevice *dev_to_mISDN(struct device *dev) { if (dev) return dev_get_drvdata(dev); else return NULL; } extern void set_channel_address(struct mISDNchannel *, u_int, u_int); extern void mISDN_clock_update(struct mISDNclock *, int, ktime_t *); extern unsigned short mISDN_clock_get(void); extern const char *mISDNDevName4ch(struct mISDNchannel *); #endif /* __KERNEL__ */ #endif /* mISDNIF_H */ PK ! N n� enclosure.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Enclosure Services * * Copyright (C) 2008 James Bottomley <James.Bottomley@HansenPartnership.com> * **----------------------------------------------------------------------------- ** ** **----------------------------------------------------------------------------- */ #ifndef _LINUX_ENCLOSURE_H_ #define _LINUX_ENCLOSURE_H_ #include <linux/device.h> #include <linux/list.h> /* A few generic types ... taken from ses-2 */ enum enclosure_component_type { ENCLOSURE_COMPONENT_DEVICE = 0x01, ENCLOSURE_COMPONENT_CONTROLLER_ELECTRONICS = 0x07, ENCLOSURE_COMPONENT_SCSI_TARGET_PORT = 0x14, ENCLOSURE_COMPONENT_SCSI_INITIATOR_PORT = 0x15, ENCLOSURE_COMPONENT_ARRAY_DEVICE = 0x17, ENCLOSURE_COMPONENT_SAS_EXPANDER = 0x18, }; /* ses-2 common element status */ enum enclosure_status { ENCLOSURE_STATUS_UNSUPPORTED = 0, ENCLOSURE_STATUS_OK, ENCLOSURE_STATUS_CRITICAL, ENCLOSURE_STATUS_NON_CRITICAL, ENCLOSURE_STATUS_UNRECOVERABLE, ENCLOSURE_STATUS_NOT_INSTALLED, ENCLOSURE_STATUS_UNKNOWN, ENCLOSURE_STATUS_UNAVAILABLE, /* last element for counting purposes */ ENCLOSURE_STATUS_MAX }; /* SFF-8485 activity light settings */ enum enclosure_component_setting { ENCLOSURE_SETTING_DISABLED = 0, ENCLOSURE_SETTING_ENABLED = 1, ENCLOSURE_SETTING_BLINK_A_ON_OFF = 2, ENCLOSURE_SETTING_BLINK_A_OFF_ON = 3, ENCLOSURE_SETTING_BLINK_B_ON_OFF = 6, ENCLOSURE_SETTING_BLINK_B_OFF_ON = 7, }; struct enclosure_device; struct enclosure_component; struct enclosure_component_callbacks { void (*get_status)(struct enclosure_device *, struct enclosure_component *); int (*set_status)(struct enclosure_device *, struct enclosure_component *, enum enclosure_status); void (*get_fault)(struct enclosure_device *, struct enclosure_component *); int (*set_fault)(struct enclosure_device *, struct enclosure_component *, enum enclosure_component_setting); void (*get_active)(struct enclosure_device *, struct enclosure_component *); int (*set_active)(struct enclosure_device *, struct enclosure_component *, enum enclosure_component_setting); void (*get_locate)(struct enclosure_device *, struct enclosure_component *); int (*set_locate)(struct enclosure_device *, struct enclosure_component *, enum enclosure_component_setting); void (*get_power_status)(struct enclosure_device *, struct enclosure_component *); int (*set_power_status)(struct enclosure_device *, struct enclosure_component *, int); int (*show_id)(struct enclosure_device *, char *buf); }; struct enclosure_component { void *scratch; struct device cdev; struct device *dev; enum enclosure_component_type type; int number; int fault; int active; int locate; int slot; enum enclosure_status status; int power_status; }; struct enclosure_device { void *scratch; struct list_head node; struct device edev; struct enclosure_component_callbacks *cb; int components; struct enclosure_component component[]; }; static inline struct enclosure_device * to_enclosure_device(struct device *dev) { return container_of(dev, struct enclosure_device, edev); } static inline struct enclosure_component * to_enclosure_component(struct device *dev) { return container_of(dev, struct enclosure_component, cdev); } struct enclosure_device * enclosure_register(struct device *, const char *, int, struct enclosure_component_callbacks *); void enclosure_unregister(struct enclosure_device *); struct enclosure_component * enclosure_component_alloc(struct enclosure_device *, unsigned int, enum enclosure_component_type, const char *); int enclosure_component_register(struct enclosure_component *); int enclosure_add_device(struct enclosure_device *enclosure, int component, struct device *dev); int enclosure_remove_device(struct enclosure_device *, struct device *); struct enclosure_device *enclosure_find(struct device *dev, struct enclosure_device *start); int enclosure_for_each_device(int (*fn)(struct enclosure_device *, void *), void *data); #endif /* _LINUX_ENCLOSURE_H_ */ PK ! 2�s5 5 huge_mm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_HUGE_MM_H #define _LINUX_HUGE_MM_H #include <linux/sched/coredump.h> #include <linux/mm_types.h> #include <linux/fs.h> /* only for vma_is_dax() */ vm_fault_t do_huge_pmd_anonymous_page(struct vm_fault *vmf); int copy_huge_pmd(struct mm_struct *dst_mm, struct mm_struct *src_mm, pmd_t *dst_pmd, pmd_t *src_pmd, unsigned long addr, struct vm_area_struct *dst_vma, struct vm_area_struct *src_vma); void huge_pmd_set_accessed(struct vm_fault *vmf); int copy_huge_pud(struct mm_struct *dst_mm, struct mm_struct *src_mm, pud_t *dst_pud, pud_t *src_pud, unsigned long addr, struct vm_area_struct *vma); #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD void huge_pud_set_accessed(struct vm_fault *vmf, pud_t orig_pud); #else static inline void huge_pud_set_accessed(struct vm_fault *vmf, pud_t orig_pud) { } #endif vm_fault_t do_huge_pmd_wp_page(struct vm_fault *vmf); struct page *follow_trans_huge_pmd(struct vm_area_struct *vma, unsigned long addr, pmd_t *pmd, unsigned int flags); bool madvise_free_huge_pmd(struct mmu_gather *tlb, struct vm_area_struct *vma, pmd_t *pmd, unsigned long addr, unsigned long next); int zap_huge_pmd(struct mmu_gather *tlb, struct vm_area_struct *vma, pmd_t *pmd, unsigned long addr); int zap_huge_pud(struct mmu_gather *tlb, struct vm_area_struct *vma, pud_t *pud, unsigned long addr); bool move_huge_pmd(struct vm_area_struct *vma, unsigned long old_addr, unsigned long new_addr, pmd_t *old_pmd, pmd_t *new_pmd); int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd, unsigned long addr, pgprot_t newprot, unsigned long cp_flags); vm_fault_t vmf_insert_pfn_pmd_prot(struct vm_fault *vmf, pfn_t pfn, pgprot_t pgprot, bool write); /** * vmf_insert_pfn_pmd - insert a pmd size pfn * @vmf: Structure describing the fault * @pfn: pfn to insert * @pgprot: page protection to use * @write: whether it's a write fault * * Insert a pmd size pfn. See vmf_insert_pfn() for additional info. * * Return: vm_fault_t value. */ static inline vm_fault_t vmf_insert_pfn_pmd(struct vm_fault *vmf, pfn_t pfn, bool write) { return vmf_insert_pfn_pmd_prot(vmf, pfn, vmf->vma->vm_page_prot, write); } vm_fault_t vmf_insert_pfn_pud_prot(struct vm_fault *vmf, pfn_t pfn, pgprot_t pgprot, bool write); /** * vmf_insert_pfn_pud - insert a pud size pfn * @vmf: Structure describing the fault * @pfn: pfn to insert * @pgprot: page protection to use * @write: whether it's a write fault * * Insert a pud size pfn. See vmf_insert_pfn() for additional info. * * Return: vm_fault_t value. */ static inline vm_fault_t vmf_insert_pfn_pud(struct vm_fault *vmf, pfn_t pfn, bool write) { return vmf_insert_pfn_pud_prot(vmf, pfn, vmf->vma->vm_page_prot, write); } enum transparent_hugepage_flag { TRANSPARENT_HUGEPAGE_NEVER_DAX, TRANSPARENT_HUGEPAGE_FLAG, TRANSPARENT_HUGEPAGE_REQ_MADV_FLAG, TRANSPARENT_HUGEPAGE_DEFRAG_DIRECT_FLAG, TRANSPARENT_HUGEPAGE_DEFRAG_KSWAPD_FLAG, TRANSPARENT_HUGEPAGE_DEFRAG_KSWAPD_OR_MADV_FLAG, TRANSPARENT_HUGEPAGE_DEFRAG_REQ_MADV_FLAG, TRANSPARENT_HUGEPAGE_DEFRAG_KHUGEPAGED_FLAG, TRANSPARENT_HUGEPAGE_USE_ZERO_PAGE_FLAG, }; struct kobject; struct kobj_attribute; ssize_t single_hugepage_flag_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count, enum transparent_hugepage_flag flag); ssize_t single_hugepage_flag_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf, enum transparent_hugepage_flag flag); extern struct kobj_attribute shmem_enabled_attr; #define HPAGE_PMD_ORDER (HPAGE_PMD_SHIFT-PAGE_SHIFT) #define HPAGE_PMD_NR (1<<HPAGE_PMD_ORDER) #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define HPAGE_PMD_SHIFT PMD_SHIFT #define HPAGE_PMD_SIZE ((1UL) << HPAGE_PMD_SHIFT) #define HPAGE_PMD_MASK (~(HPAGE_PMD_SIZE - 1)) #define HPAGE_PUD_SHIFT PUD_SHIFT #define HPAGE_PUD_SIZE ((1UL) << HPAGE_PUD_SHIFT) #define HPAGE_PUD_MASK (~(HPAGE_PUD_SIZE - 1)) extern unsigned long transparent_hugepage_flags; static inline bool transhuge_vma_suitable(struct vm_area_struct *vma, unsigned long haddr) { /* Don't have to check pgoff for anonymous vma */ if (!vma_is_anonymous(vma)) { if (!IS_ALIGNED((vma->vm_start >> PAGE_SHIFT) - vma->vm_pgoff, HPAGE_PMD_NR)) return false; } if (haddr < vma->vm_start || haddr + HPAGE_PMD_SIZE > vma->vm_end) return false; return true; } static inline bool transhuge_vma_enabled(struct vm_area_struct *vma, unsigned long vm_flags) { /* Explicitly disabled through madvise. */ if ((vm_flags & VM_NOHUGEPAGE) || test_bit(MMF_DISABLE_THP, &vma->vm_mm->flags)) return false; return true; } /* * to be used on vmas which are known to support THP. * Use transparent_hugepage_active otherwise */ static inline bool __transparent_hugepage_enabled(struct vm_area_struct *vma) { /* * If the hardware/firmware marked hugepage support disabled. */ if (transparent_hugepage_flags & (1 << TRANSPARENT_HUGEPAGE_NEVER_DAX)) return false; if (!transhuge_vma_enabled(vma, vma->vm_flags)) return false; if (vma_is_temporary_stack(vma)) return false; if (transparent_hugepage_flags & (1 << TRANSPARENT_HUGEPAGE_FLAG)) return true; if (vma_is_dax(vma)) return true; if (transparent_hugepage_flags & (1 << TRANSPARENT_HUGEPAGE_REQ_MADV_FLAG)) return !!(vma->vm_flags & VM_HUGEPAGE); return false; } bool transparent_hugepage_active(struct vm_area_struct *vma); #define transparent_hugepage_use_zero_page() \ (transparent_hugepage_flags & \ (1<<TRANSPARENT_HUGEPAGE_USE_ZERO_PAGE_FLAG)) unsigned long thp_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags); void prep_transhuge_page(struct page *page); void free_transhuge_page(struct page *page); bool is_transparent_hugepage(struct page *page); bool can_split_huge_page(struct page *page, int *pextra_pins); int split_huge_page_to_list(struct page *page, struct list_head *list); static inline int split_huge_page(struct page *page) { return split_huge_page_to_list(page, NULL); } void deferred_split_huge_page(struct page *page); void __split_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd, unsigned long address, bool freeze, struct page *page); #define split_huge_pmd(__vma, __pmd, __address) \ do { \ pmd_t *____pmd = (__pmd); \ if (is_swap_pmd(*____pmd) || pmd_trans_huge(*____pmd) \ || pmd_devmap(*____pmd)) \ __split_huge_pmd(__vma, __pmd, __address, \ false, NULL); \ } while (0) void split_huge_pmd_address(struct vm_area_struct *vma, unsigned long address, bool freeze, struct page *page); void __split_huge_pud(struct vm_area_struct *vma, pud_t *pud, unsigned long address); #define split_huge_pud(__vma, __pud, __address) \ do { \ pud_t *____pud = (__pud); \ if (pud_trans_huge(*____pud) \ || pud_devmap(*____pud)) \ __split_huge_pud(__vma, __pud, __address); \ } while (0) int hugepage_madvise(struct vm_area_struct *vma, unsigned long *vm_flags, int advice); void vma_adjust_trans_huge(struct vm_area_struct *vma, unsigned long start, unsigned long end, long adjust_next); spinlock_t *__pmd_trans_huge_lock(pmd_t *pmd, struct vm_area_struct *vma); spinlock_t *__pud_trans_huge_lock(pud_t *pud, struct vm_area_struct *vma); static inline int is_swap_pmd(pmd_t pmd) { return !pmd_none(pmd) && !pmd_present(pmd); } /* mmap_lock must be held on entry */ static inline spinlock_t *pmd_trans_huge_lock(pmd_t *pmd, struct vm_area_struct *vma) { if (is_swap_pmd(*pmd) || pmd_trans_huge(*pmd) || pmd_devmap(*pmd)) return __pmd_trans_huge_lock(pmd, vma); else return NULL; } static inline spinlock_t *pud_trans_huge_lock(pud_t *pud, struct vm_area_struct *vma) { if (pud_trans_huge(*pud) || pud_devmap(*pud)) return __pud_trans_huge_lock(pud, vma); else return NULL; } /** * thp_head - Head page of a transparent huge page. * @page: Any page (tail, head or regular) found in the page cache. */ static inline struct page *thp_head(struct page *page) { return compound_head(page); } /** * thp_order - Order of a transparent huge page. * @page: Head page of a transparent huge page. */ static inline unsigned int thp_order(struct page *page) { VM_BUG_ON_PGFLAGS(PageTail(page), page); if (PageHead(page)) return HPAGE_PMD_ORDER; return 0; } /** * thp_nr_pages - The number of regular pages in this huge page. * @page: The head page of a huge page. */ static inline int thp_nr_pages(struct page *page) { VM_BUG_ON_PGFLAGS(PageTail(page), page); if (PageHead(page)) return HPAGE_PMD_NR; return 1; } struct page *follow_devmap_pmd(struct vm_area_struct *vma, unsigned long addr, pmd_t *pmd, int flags, struct dev_pagemap **pgmap); struct page *follow_devmap_pud(struct vm_area_struct *vma, unsigned long addr, pud_t *pud, int flags, struct dev_pagemap **pgmap); vm_fault_t do_huge_pmd_numa_page(struct vm_fault *vmf); extern struct page *huge_zero_page; extern unsigned long huge_zero_pfn; static inline bool is_huge_zero_page(struct page *page) { return READ_ONCE(huge_zero_page) == page; } static inline bool is_huge_zero_pmd(pmd_t pmd) { return READ_ONCE(huge_zero_pfn) == pmd_pfn(pmd) && pmd_present(pmd); } static inline bool is_huge_zero_pud(pud_t pud) { return false; } struct page *mm_get_huge_zero_page(struct mm_struct *mm); void mm_put_huge_zero_page(struct mm_struct *mm); #define mk_huge_pmd(page, prot) pmd_mkhuge(mk_pmd(page, prot)) static inline bool thp_migration_supported(void) { return IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION); } static inline struct list_head *page_deferred_list(struct page *page) { /* * Global or memcg deferred list in the second tail pages is * occupied by compound_head. */ return &page[2].deferred_list; } #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define HPAGE_PMD_SHIFT ({ BUILD_BUG(); 0; }) #define HPAGE_PMD_MASK ({ BUILD_BUG(); 0; }) #define HPAGE_PMD_SIZE ({ BUILD_BUG(); 0; }) #define HPAGE_PUD_SHIFT ({ BUILD_BUG(); 0; }) #define HPAGE_PUD_MASK ({ BUILD_BUG(); 0; }) #define HPAGE_PUD_SIZE ({ BUILD_BUG(); 0; }) static inline struct page *thp_head(struct page *page) { VM_BUG_ON_PGFLAGS(PageTail(page), page); return page; } static inline unsigned int thp_order(struct page *page) { VM_BUG_ON_PGFLAGS(PageTail(page), page); return 0; } static inline int thp_nr_pages(struct page *page) { VM_BUG_ON_PGFLAGS(PageTail(page), page); return 1; } static inline bool __transparent_hugepage_enabled(struct vm_area_struct *vma) { return false; } static inline bool transparent_hugepage_active(struct vm_area_struct *vma) { return false; } static inline bool transhuge_vma_suitable(struct vm_area_struct *vma, unsigned long haddr) { return false; } static inline bool transhuge_vma_enabled(struct vm_area_struct *vma, unsigned long vm_flags) { return false; } static inline void prep_transhuge_page(struct page *page) {} static inline bool is_transparent_hugepage(struct page *page) { return false; } #define transparent_hugepage_flags 0UL #define thp_get_unmapped_area NULL static inline bool can_split_huge_page(struct page *page, int *pextra_pins) { BUILD_BUG(); return false; } static inline int split_huge_page_to_list(struct page *page, struct list_head *list) { return 0; } static inline int split_huge_page(struct page *page) { return 0; } static inline void deferred_split_huge_page(struct page *page) {} #define split_huge_pmd(__vma, __pmd, __address) \ do { } while (0) static inline void __split_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd, unsigned long address, bool freeze, struct page *page) {} static inline void split_huge_pmd_address(struct vm_area_struct *vma, unsigned long address, bool freeze, struct page *page) {} #define split_huge_pud(__vma, __pmd, __address) \ do { } while (0) static inline int hugepage_madvise(struct vm_area_struct *vma, unsigned long *vm_flags, int advice) { BUG(); return 0; } static inline void vma_adjust_trans_huge(struct vm_area_struct *vma, unsigned long start, unsigned long end, long adjust_next) { } static inline int is_swap_pmd(pmd_t pmd) { return 0; } static inline spinlock_t *pmd_trans_huge_lock(pmd_t *pmd, struct vm_area_struct *vma) { return NULL; } static inline spinlock_t *pud_trans_huge_lock(pud_t *pud, struct vm_area_struct *vma) { return NULL; } static inline vm_fault_t do_huge_pmd_numa_page(struct vm_fault *vmf) { return 0; } static inline bool is_huge_zero_page(struct page *page) { return false; } static inline bool is_huge_zero_pmd(pmd_t pmd) { return false; } static inline bool is_huge_zero_pud(pud_t pud) { return false; } static inline void mm_put_huge_zero_page(struct mm_struct *mm) { return; } static inline struct page *follow_devmap_pmd(struct vm_area_struct *vma, unsigned long addr, pmd_t *pmd, int flags, struct dev_pagemap **pgmap) { return NULL; } static inline struct page *follow_devmap_pud(struct vm_area_struct *vma, unsigned long addr, pud_t *pud, int flags, struct dev_pagemap **pgmap) { return NULL; } static inline bool thp_migration_supported(void) { return false; } #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ /** * thp_size - Size of a transparent huge page. * @page: Head page of a transparent huge page. * * Return: Number of bytes in this page. */ static inline unsigned long thp_size(struct page *page) { return PAGE_SIZE << thp_order(page); } #endif /* _LINUX_HUGE_MM_H */ PK ! >�T�� � sched_clock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * sched_clock.h: support for extending counters to full 64-bit ns counter */ #ifndef LINUX_SCHED_CLOCK #define LINUX_SCHED_CLOCK #ifdef CONFIG_GENERIC_SCHED_CLOCK /** * struct clock_read_data - data required to read from sched_clock() * * @epoch_ns: sched_clock() value at last update * @epoch_cyc: Clock cycle value at last update. * @sched_clock_mask: Bitmask for two's complement subtraction of non 64bit * clocks. * @read_sched_clock: Current clock source (or dummy source when suspended). * @mult: Multiplier for scaled math conversion. * @shift: Shift value for scaled math conversion. * * Care must be taken when updating this structure; it is read by * some very hot code paths. It occupies <=40 bytes and, when combined * with the seqcount used to synchronize access, comfortably fits into * a 64 byte cache line. */ struct clock_read_data { u64 epoch_ns; u64 epoch_cyc; u64 sched_clock_mask; u64 (*read_sched_clock)(void); u32 mult; u32 shift; }; extern struct clock_read_data *sched_clock_read_begin(unsigned int *seq); extern int sched_clock_read_retry(unsigned int seq); extern void generic_sched_clock_init(void); extern void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate); #else static inline void generic_sched_clock_init(void) { } static inline void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) { } #endif #endif PK ! -��m m lantiq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_LANTIQ_H #define __LINUX_LANTIQ_H #ifdef CONFIG_LANTIQ #include <lantiq_soc.h> #else #ifndef LTQ_EARLY_ASC #define LTQ_EARLY_ASC 0 #endif #ifndef CPHYSADDR #define CPHYSADDR(a) 0 #endif static inline struct clk *clk_get_fpi(void) { return NULL; } #endif /* CONFIG_LANTIQ */ #endif /* __LINUX_LANTIQ_H */ PK ! *:�� 8250_pci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for PCI support. */ #define FL_BASE_MASK 0x0007 #define FL_BASE0 0x0000 #define FL_BASE1 0x0001 #define FL_BASE2 0x0002 #define FL_BASE3 0x0003 #define FL_BASE4 0x0004 #define FL_GET_BASE(x) (x & FL_BASE_MASK) /* Use successive BARs (PCI base address registers), else use offset into some specified BAR */ #define FL_BASE_BARS 0x0008 /* do not assign an irq */ #define FL_NOIRQ 0x0080 /* Use the Base address register size to cap number of ports */ #define FL_REGION_SZ_CAP 0x0100 struct pciserial_board { unsigned int flags; unsigned int num_ports; unsigned int base_baud; unsigned int uart_offset; unsigned int reg_shift; unsigned int first_offset; }; struct serial_private; struct serial_private * pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board); void pciserial_remove_ports(struct serial_private *priv); void pciserial_suspend_ports(struct serial_private *priv); void pciserial_resume_ports(struct serial_private *priv); PK ! }� �� � cpufreq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/cpufreq.h * * Copyright (C) 2001 Russell King * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> */ #ifndef _LINUX_CPUFREQ_H #define _LINUX_CPUFREQ_H #include <linux/clk.h> #include <linux/cpu.h> #include <linux/cpumask.h> #include <linux/completion.h> #include <linux/kobject.h> #include <linux/notifier.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/pm_opp.h> #include <linux/pm_qos.h> #include <linux/spinlock.h> #include <linux/sysfs.h> /********************************************************************* * CPUFREQ INTERFACE * *********************************************************************/ /* * Frequency values here are CPU kHz * * Maximum transition latency is in nanoseconds - if it's unknown, * CPUFREQ_ETERNAL shall be used. */ #define CPUFREQ_ETERNAL (-1) #define CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS NSEC_PER_MSEC #define CPUFREQ_NAME_LEN 16 /* Print length for names. Extra 1 space for accommodating '\n' in prints */ #define CPUFREQ_NAME_PLEN (CPUFREQ_NAME_LEN + 1) struct cpufreq_governor; enum cpufreq_table_sorting { CPUFREQ_TABLE_UNSORTED, CPUFREQ_TABLE_SORTED_ASCENDING, CPUFREQ_TABLE_SORTED_DESCENDING }; struct cpufreq_cpuinfo { unsigned int max_freq; unsigned int min_freq; /* in 10^(-9) s = nanoseconds */ unsigned int transition_latency; }; struct cpufreq_policy { /* CPUs sharing clock, require sw coordination */ cpumask_var_t cpus; /* Online CPUs only */ cpumask_var_t related_cpus; /* Online + Offline CPUs */ cpumask_var_t real_cpus; /* Related and present */ unsigned int shared_type; /* ACPI: ANY or ALL affected CPUs should set cpufreq */ unsigned int cpu; /* cpu managing this policy, must be online */ struct clk *clk; struct cpufreq_cpuinfo cpuinfo;/* see above */ unsigned int min; /* in kHz */ unsigned int max; /* in kHz */ unsigned int cur; /* in kHz, only needed if cpufreq * governors are used */ unsigned int suspend_freq; /* freq to set during suspend */ unsigned int policy; /* see above */ unsigned int last_policy; /* policy before unplug */ struct cpufreq_governor *governor; /* see below */ void *governor_data; char last_governor[CPUFREQ_NAME_LEN]; /* last governor used */ struct work_struct update; /* if update_policy() needs to be * called, but you're in IRQ context */ struct freq_constraints constraints; struct freq_qos_request *min_freq_req; struct freq_qos_request *max_freq_req; struct cpufreq_frequency_table *freq_table; enum cpufreq_table_sorting freq_table_sorted; struct list_head policy_list; struct kobject kobj; struct completion kobj_unregister; /* * The rules for this semaphore: * - Any routine that wants to read from the policy structure will * do a down_read on this semaphore. * - Any routine that will write to the policy structure and/or may take away * the policy altogether (eg. CPU hotplug), will hold this lock in write * mode before doing so. */ struct rw_semaphore rwsem; /* * Fast switch flags: * - fast_switch_possible should be set by the driver if it can * guarantee that frequency can be changed on any CPU sharing the * policy and that the change will affect all of the policy CPUs then. * - fast_switch_enabled is to be set by governors that support fast * frequency switching with the help of cpufreq_enable_fast_switch(). */ bool fast_switch_possible; bool fast_switch_enabled; /* * Set if the CPUFREQ_GOV_STRICT_TARGET flag is set for the current * governor. */ bool strict_target; /* * Preferred average time interval between consecutive invocations of * the driver to set the frequency for this policy. To be set by the * scaling driver (0, which is the default, means no preference). */ unsigned int transition_delay_us; /* * Remote DVFS flag (Not added to the driver structure as we don't want * to access another structure from scheduler hotpath). * * Should be set if CPUs can do DVFS on behalf of other CPUs from * different cpufreq policies. */ bool dvfs_possible_from_any_cpu; /* Cached frequency lookup from cpufreq_driver_resolve_freq. */ unsigned int cached_target_freq; unsigned int cached_resolved_idx; /* Synchronization for frequency transitions */ bool transition_ongoing; /* Tracks transition status */ spinlock_t transition_lock; wait_queue_head_t transition_wait; struct task_struct *transition_task; /* Task which is doing the transition */ /* cpufreq-stats */ struct cpufreq_stats *stats; /* For cpufreq driver's internal use */ void *driver_data; /* Pointer to the cooling device if used for thermal mitigation */ struct thermal_cooling_device *cdev; struct notifier_block nb_min; struct notifier_block nb_max; }; /* * Used for passing new cpufreq policy data to the cpufreq driver's ->verify() * callback for sanitization. That callback is only expected to modify the min * and max values, if necessary, and specifically it must not update the * frequency table. */ struct cpufreq_policy_data { struct cpufreq_cpuinfo cpuinfo; struct cpufreq_frequency_table *freq_table; unsigned int cpu; unsigned int min; /* in kHz */ unsigned int max; /* in kHz */ }; struct cpufreq_freqs { struct cpufreq_policy *policy; unsigned int old; unsigned int new; u8 flags; /* flags of cpufreq_driver, see below. */ }; /* Only for ACPI */ #define CPUFREQ_SHARED_TYPE_NONE (0) /* None */ #define CPUFREQ_SHARED_TYPE_HW (1) /* HW does needed coordination */ #define CPUFREQ_SHARED_TYPE_ALL (2) /* All dependent CPUs should set freq */ #define CPUFREQ_SHARED_TYPE_ANY (3) /* Freq can be set from any dependent CPU*/ #ifdef CONFIG_CPU_FREQ struct cpufreq_policy *cpufreq_cpu_get_raw(unsigned int cpu); struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu); void cpufreq_cpu_put(struct cpufreq_policy *policy); #else static inline struct cpufreq_policy *cpufreq_cpu_get_raw(unsigned int cpu) { return NULL; } static inline struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu) { return NULL; } static inline void cpufreq_cpu_put(struct cpufreq_policy *policy) { } #endif static inline bool policy_is_inactive(struct cpufreq_policy *policy) { return cpumask_empty(policy->cpus); } static inline bool policy_is_shared(struct cpufreq_policy *policy) { return cpumask_weight(policy->cpus) > 1; } #ifdef CONFIG_CPU_FREQ unsigned int cpufreq_get(unsigned int cpu); unsigned int cpufreq_quick_get(unsigned int cpu); unsigned int cpufreq_quick_get_max(unsigned int cpu); unsigned int cpufreq_get_hw_max_freq(unsigned int cpu); void disable_cpufreq(void); u64 get_cpu_idle_time(unsigned int cpu, u64 *wall, int io_busy); struct cpufreq_policy *cpufreq_cpu_acquire(unsigned int cpu); void cpufreq_cpu_release(struct cpufreq_policy *policy); int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu); void refresh_frequency_limits(struct cpufreq_policy *policy); void cpufreq_update_policy(unsigned int cpu); void cpufreq_update_limits(unsigned int cpu); bool have_governor_per_policy(void); bool cpufreq_supports_freq_invariance(void); struct kobject *get_governor_parent_kobj(struct cpufreq_policy *policy); void cpufreq_enable_fast_switch(struct cpufreq_policy *policy); void cpufreq_disable_fast_switch(struct cpufreq_policy *policy); #else static inline unsigned int cpufreq_get(unsigned int cpu) { return 0; } static inline unsigned int cpufreq_quick_get(unsigned int cpu) { return 0; } static inline unsigned int cpufreq_quick_get_max(unsigned int cpu) { return 0; } static inline unsigned int cpufreq_get_hw_max_freq(unsigned int cpu) { return 0; } static inline bool cpufreq_supports_freq_invariance(void) { return false; } static inline void disable_cpufreq(void) { } #endif #ifdef CONFIG_CPU_FREQ_STAT void cpufreq_stats_create_table(struct cpufreq_policy *policy); void cpufreq_stats_free_table(struct cpufreq_policy *policy); void cpufreq_stats_record_transition(struct cpufreq_policy *policy, unsigned int new_freq); #else static inline void cpufreq_stats_create_table(struct cpufreq_policy *policy) { } static inline void cpufreq_stats_free_table(struct cpufreq_policy *policy) { } static inline void cpufreq_stats_record_transition(struct cpufreq_policy *policy, unsigned int new_freq) { } #endif /* CONFIG_CPU_FREQ_STAT */ /********************************************************************* * CPUFREQ DRIVER INTERFACE * *********************************************************************/ #define CPUFREQ_RELATION_L 0 /* lowest frequency at or above target */ #define CPUFREQ_RELATION_H 1 /* highest frequency below or at target */ #define CPUFREQ_RELATION_C 2 /* closest frequency to target */ struct freq_attr { struct attribute attr; ssize_t (*show)(struct cpufreq_policy *, char *); ssize_t (*store)(struct cpufreq_policy *, const char *, size_t count); }; #define cpufreq_freq_attr_ro(_name) \ static struct freq_attr _name = \ __ATTR(_name, 0444, show_##_name, NULL) #define cpufreq_freq_attr_ro_perm(_name, _perm) \ static struct freq_attr _name = \ __ATTR(_name, _perm, show_##_name, NULL) #define cpufreq_freq_attr_rw(_name) \ static struct freq_attr _name = \ __ATTR(_name, 0644, show_##_name, store_##_name) #define cpufreq_freq_attr_wo(_name) \ static struct freq_attr _name = \ __ATTR(_name, 0200, NULL, store_##_name) #define define_one_global_ro(_name) \ static struct kobj_attribute _name = \ __ATTR(_name, 0444, show_##_name, NULL) #define define_one_global_rw(_name) \ static struct kobj_attribute _name = \ __ATTR(_name, 0644, show_##_name, store_##_name) struct cpufreq_driver { char name[CPUFREQ_NAME_LEN]; u16 flags; void *driver_data; /* needed by all drivers */ int (*init)(struct cpufreq_policy *policy); int (*verify)(struct cpufreq_policy_data *policy); /* define one out of two */ int (*setpolicy)(struct cpufreq_policy *policy); int (*target)(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation); /* Deprecated */ int (*target_index)(struct cpufreq_policy *policy, unsigned int index); unsigned int (*fast_switch)(struct cpufreq_policy *policy, unsigned int target_freq); /* * ->fast_switch() replacement for drivers that use an internal * representation of performance levels and can pass hints other than * the target performance level to the hardware. */ void (*adjust_perf)(unsigned int cpu, unsigned long min_perf, unsigned long target_perf, unsigned long capacity); /* * Only for drivers with target_index() and CPUFREQ_ASYNC_NOTIFICATION * unset. * * get_intermediate should return a stable intermediate frequency * platform wants to switch to and target_intermediate() should set CPU * to that frequency, before jumping to the frequency corresponding * to 'index'. Core will take care of sending notifications and driver * doesn't have to handle them in target_intermediate() or * target_index(). * * Drivers can return '0' from get_intermediate() in case they don't * wish to switch to intermediate frequency for some target frequency. * In that case core will directly call ->target_index(). */ unsigned int (*get_intermediate)(struct cpufreq_policy *policy, unsigned int index); int (*target_intermediate)(struct cpufreq_policy *policy, unsigned int index); /* should be defined, if possible */ unsigned int (*get)(unsigned int cpu); /* Called to update policy limits on firmware notifications. */ void (*update_limits)(unsigned int cpu); /* optional */ int (*bios_limit)(int cpu, unsigned int *limit); int (*online)(struct cpufreq_policy *policy); int (*offline)(struct cpufreq_policy *policy); int (*exit)(struct cpufreq_policy *policy); int (*suspend)(struct cpufreq_policy *policy); int (*resume)(struct cpufreq_policy *policy); struct freq_attr **attr; /* platform specific boost support code */ bool boost_enabled; int (*set_boost)(struct cpufreq_policy *policy, int state); /* * Set by drivers that want to register with the energy model after the * policy is properly initialized, but before the governor is started. */ void (*register_em)(struct cpufreq_policy *policy); }; /* flags */ /* * Set by drivers that need to update internale upper and lower boundaries along * with the target frequency and so the core and governors should also invoke * the diver if the target frequency does not change, but the policy min or max * may have changed. */ #define CPUFREQ_NEED_UPDATE_LIMITS BIT(0) /* loops_per_jiffy or other kernel "constants" aren't affected by frequency transitions */ #define CPUFREQ_CONST_LOOPS BIT(1) /* * Set by drivers that want the core to automatically register the cpufreq * driver as a thermal cooling device. */ #define CPUFREQ_IS_COOLING_DEV BIT(2) /* * This should be set by platforms having multiple clock-domains, i.e. * supporting multiple policies. With this sysfs directories of governor would * be created in cpu/cpu<num>/cpufreq/ directory and so they can use the same * governor with different tunables for different clusters. */ #define CPUFREQ_HAVE_GOVERNOR_PER_POLICY BIT(3) /* * Driver will do POSTCHANGE notifications from outside of their ->target() * routine and so must set cpufreq_driver->flags with this flag, so that core * can handle them specially. */ #define CPUFREQ_ASYNC_NOTIFICATION BIT(4) /* * Set by drivers which want cpufreq core to check if CPU is running at a * frequency present in freq-table exposed by the driver. For these drivers if * CPU is found running at an out of table freq, we will try to set it to a freq * from the table. And if that fails, we will stop further boot process by * issuing a BUG_ON(). */ #define CPUFREQ_NEED_INITIAL_FREQ_CHECK BIT(5) /* * Set by drivers to disallow use of governors with "dynamic_switching" flag * set. */ #define CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING BIT(6) int cpufreq_register_driver(struct cpufreq_driver *driver_data); int cpufreq_unregister_driver(struct cpufreq_driver *driver_data); bool cpufreq_driver_test_flags(u16 flags); const char *cpufreq_get_current_driver(void); void *cpufreq_get_driver_data(void); static inline int cpufreq_thermal_control_enabled(struct cpufreq_driver *drv) { return IS_ENABLED(CONFIG_CPU_THERMAL) && (drv->flags & CPUFREQ_IS_COOLING_DEV); } static inline void cpufreq_verify_within_limits(struct cpufreq_policy_data *policy, unsigned int min, unsigned int max) { if (policy->min < min) policy->min = min; if (policy->max < min) policy->max = min; if (policy->min > max) policy->min = max; if (policy->max > max) policy->max = max; if (policy->min > policy->max) policy->min = policy->max; return; } static inline void cpufreq_verify_within_cpu_limits(struct cpufreq_policy_data *policy) { cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); } #ifdef CONFIG_CPU_FREQ void cpufreq_suspend(void); void cpufreq_resume(void); int cpufreq_generic_suspend(struct cpufreq_policy *policy); #else static inline void cpufreq_suspend(void) {} static inline void cpufreq_resume(void) {} #endif /********************************************************************* * CPUFREQ NOTIFIER INTERFACE * *********************************************************************/ #define CPUFREQ_TRANSITION_NOTIFIER (0) #define CPUFREQ_POLICY_NOTIFIER (1) /* Transition notifiers */ #define CPUFREQ_PRECHANGE (0) #define CPUFREQ_POSTCHANGE (1) /* Policy Notifiers */ #define CPUFREQ_CREATE_POLICY (0) #define CPUFREQ_REMOVE_POLICY (1) #ifdef CONFIG_CPU_FREQ int cpufreq_register_notifier(struct notifier_block *nb, unsigned int list); int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list); void cpufreq_freq_transition_begin(struct cpufreq_policy *policy, struct cpufreq_freqs *freqs); void cpufreq_freq_transition_end(struct cpufreq_policy *policy, struct cpufreq_freqs *freqs, int transition_failed); #else /* CONFIG_CPU_FREQ */ static inline int cpufreq_register_notifier(struct notifier_block *nb, unsigned int list) { return 0; } static inline int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list) { return 0; } #endif /* !CONFIG_CPU_FREQ */ /** * cpufreq_scale - "old * mult / div" calculation for large values (32-bit-arch * safe) * @old: old value * @div: divisor * @mult: multiplier * * * new = old * mult / div */ static inline unsigned long cpufreq_scale(unsigned long old, u_int div, u_int mult) { #if BITS_PER_LONG == 32 u64 result = ((u64) old) * ((u64) mult); do_div(result, div); return (unsigned long) result; #elif BITS_PER_LONG == 64 unsigned long result = old * ((u64) mult); result /= div; return result; #endif } /********************************************************************* * CPUFREQ GOVERNORS * *********************************************************************/ #define CPUFREQ_POLICY_UNKNOWN (0) /* * If (cpufreq_driver->target) exists, the ->governor decides what frequency * within the limits is used. If (cpufreq_driver->setpolicy> exists, these * two generic policies are available: */ #define CPUFREQ_POLICY_POWERSAVE (1) #define CPUFREQ_POLICY_PERFORMANCE (2) /* * The polling frequency depends on the capability of the processor. Default * polling frequency is 1000 times the transition latency of the processor. The * ondemand governor will work on any processor with transition latency <= 10ms, * using appropriate sampling rate. */ #define LATENCY_MULTIPLIER (1000) struct cpufreq_governor { char name[CPUFREQ_NAME_LEN]; int (*init)(struct cpufreq_policy *policy); void (*exit)(struct cpufreq_policy *policy); int (*start)(struct cpufreq_policy *policy); void (*stop)(struct cpufreq_policy *policy); void (*limits)(struct cpufreq_policy *policy); ssize_t (*show_setspeed) (struct cpufreq_policy *policy, char *buf); int (*store_setspeed) (struct cpufreq_policy *policy, unsigned int freq); struct list_head governor_list; struct module *owner; u8 flags; }; /* Governor flags */ /* For governors which change frequency dynamically by themselves */ #define CPUFREQ_GOV_DYNAMIC_SWITCHING BIT(0) /* For governors wanting the target frequency to be set exactly */ #define CPUFREQ_GOV_STRICT_TARGET BIT(1) /* Pass a target to the cpufreq driver */ unsigned int cpufreq_driver_fast_switch(struct cpufreq_policy *policy, unsigned int target_freq); void cpufreq_driver_adjust_perf(unsigned int cpu, unsigned long min_perf, unsigned long target_perf, unsigned long capacity); bool cpufreq_driver_has_adjust_perf(void); int cpufreq_driver_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation); int __cpufreq_driver_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation); unsigned int cpufreq_driver_resolve_freq(struct cpufreq_policy *policy, unsigned int target_freq); unsigned int cpufreq_policy_transition_delay_us(struct cpufreq_policy *policy); int cpufreq_register_governor(struct cpufreq_governor *governor); void cpufreq_unregister_governor(struct cpufreq_governor *governor); int cpufreq_start_governor(struct cpufreq_policy *policy); void cpufreq_stop_governor(struct cpufreq_policy *policy); #define cpufreq_governor_init(__governor) \ static int __init __governor##_init(void) \ { \ return cpufreq_register_governor(&__governor); \ } \ core_initcall(__governor##_init) #define cpufreq_governor_exit(__governor) \ static void __exit __governor##_exit(void) \ { \ return cpufreq_unregister_governor(&__governor); \ } \ module_exit(__governor##_exit) struct cpufreq_governor *cpufreq_default_governor(void); struct cpufreq_governor *cpufreq_fallback_governor(void); static inline void cpufreq_policy_apply_limits(struct cpufreq_policy *policy) { if (policy->max < policy->cur) __cpufreq_driver_target(policy, policy->max, CPUFREQ_RELATION_H); else if (policy->min > policy->cur) __cpufreq_driver_target(policy, policy->min, CPUFREQ_RELATION_L); } /* Governor attribute set */ struct gov_attr_set { struct kobject kobj; struct list_head policy_list; struct mutex update_lock; int usage_count; }; /* sysfs ops for cpufreq governors */ extern const struct sysfs_ops governor_sysfs_ops; static inline struct gov_attr_set *to_gov_attr_set(struct kobject *kobj) { return container_of(kobj, struct gov_attr_set, kobj); } void gov_attr_set_init(struct gov_attr_set *attr_set, struct list_head *list_node); void gov_attr_set_get(struct gov_attr_set *attr_set, struct list_head *list_node); unsigned int gov_attr_set_put(struct gov_attr_set *attr_set, struct list_head *list_node); /* Governor sysfs attribute */ struct governor_attr { struct attribute attr; ssize_t (*show)(struct gov_attr_set *attr_set, char *buf); ssize_t (*store)(struct gov_attr_set *attr_set, const char *buf, size_t count); }; /********************************************************************* * FREQUENCY TABLE HELPERS * *********************************************************************/ /* Special Values of .frequency field */ #define CPUFREQ_ENTRY_INVALID ~0u #define CPUFREQ_TABLE_END ~1u /* Special Values of .flags field */ #define CPUFREQ_BOOST_FREQ (1 << 0) struct cpufreq_frequency_table { unsigned int flags; unsigned int driver_data; /* driver specific data, not used by core */ unsigned int frequency; /* kHz - doesn't need to be in ascending * order */ }; #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP) int dev_pm_opp_init_cpufreq_table(struct device *dev, struct cpufreq_frequency_table **table); void dev_pm_opp_free_cpufreq_table(struct device *dev, struct cpufreq_frequency_table **table); #else static inline int dev_pm_opp_init_cpufreq_table(struct device *dev, struct cpufreq_frequency_table **table) { return -EINVAL; } static inline void dev_pm_opp_free_cpufreq_table(struct device *dev, struct cpufreq_frequency_table **table) { } #endif /* * cpufreq_for_each_entry - iterate over a cpufreq_frequency_table * @pos: the cpufreq_frequency_table * to use as a loop cursor. * @table: the cpufreq_frequency_table * to iterate over. */ #define cpufreq_for_each_entry(pos, table) \ for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++) /* * cpufreq_for_each_entry_idx - iterate over a cpufreq_frequency_table * with index * @pos: the cpufreq_frequency_table * to use as a loop cursor. * @table: the cpufreq_frequency_table * to iterate over. * @idx: the table entry currently being processed */ #define cpufreq_for_each_entry_idx(pos, table, idx) \ for (pos = table, idx = 0; pos->frequency != CPUFREQ_TABLE_END; \ pos++, idx++) /* * cpufreq_for_each_valid_entry - iterate over a cpufreq_frequency_table * excluding CPUFREQ_ENTRY_INVALID frequencies. * @pos: the cpufreq_frequency_table * to use as a loop cursor. * @table: the cpufreq_frequency_table * to iterate over. */ #define cpufreq_for_each_valid_entry(pos, table) \ for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++) \ if (pos->frequency == CPUFREQ_ENTRY_INVALID) \ continue; \ else /* * cpufreq_for_each_valid_entry_idx - iterate with index over a cpufreq * frequency_table excluding CPUFREQ_ENTRY_INVALID frequencies. * @pos: the cpufreq_frequency_table * to use as a loop cursor. * @table: the cpufreq_frequency_table * to iterate over. * @idx: the table entry currently being processed */ #define cpufreq_for_each_valid_entry_idx(pos, table, idx) \ cpufreq_for_each_entry_idx(pos, table, idx) \ if (pos->frequency == CPUFREQ_ENTRY_INVALID) \ continue; \ else int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table); int cpufreq_frequency_table_verify(struct cpufreq_policy_data *policy, struct cpufreq_frequency_table *table); int cpufreq_generic_frequency_table_verify(struct cpufreq_policy_data *policy); int cpufreq_table_index_unsorted(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation); int cpufreq_frequency_table_get_index(struct cpufreq_policy *policy, unsigned int freq); ssize_t cpufreq_show_cpus(const struct cpumask *mask, char *buf); #ifdef CONFIG_CPU_FREQ int cpufreq_boost_trigger_state(int state); int cpufreq_boost_enabled(void); int cpufreq_enable_boost_support(void); bool policy_has_boost_freq(struct cpufreq_policy *policy); /* Find lowest freq at or above target in a table in ascending order */ static inline int cpufreq_table_find_index_al(struct cpufreq_policy *policy, unsigned int target_freq) { struct cpufreq_frequency_table *table = policy->freq_table; struct cpufreq_frequency_table *pos; unsigned int freq; int idx, best = -1; cpufreq_for_each_valid_entry_idx(pos, table, idx) { freq = pos->frequency; if (freq >= target_freq) return idx; best = idx; } return best; } /* Find lowest freq at or above target in a table in descending order */ static inline int cpufreq_table_find_index_dl(struct cpufreq_policy *policy, unsigned int target_freq) { struct cpufreq_frequency_table *table = policy->freq_table; struct cpufreq_frequency_table *pos; unsigned int freq; int idx, best = -1; cpufreq_for_each_valid_entry_idx(pos, table, idx) { freq = pos->frequency; if (freq == target_freq) return idx; if (freq > target_freq) { best = idx; continue; } /* No freq found above target_freq */ if (best == -1) return idx; return best; } return best; } /* Works only on sorted freq-tables */ static inline int cpufreq_table_find_index_l(struct cpufreq_policy *policy, unsigned int target_freq) { target_freq = clamp_val(target_freq, policy->min, policy->max); if (policy->freq_table_sorted == CPUFREQ_TABLE_SORTED_ASCENDING) return cpufreq_table_find_index_al(policy, target_freq); else return cpufreq_table_find_index_dl(policy, target_freq); } /* Find highest freq at or below target in a table in ascending order */ static inline int cpufreq_table_find_index_ah(struct cpufreq_policy *policy, unsigned int target_freq) { struct cpufreq_frequency_table *table = policy->freq_table; struct cpufreq_frequency_table *pos; unsigned int freq; int idx, best = -1; cpufreq_for_each_valid_entry_idx(pos, table, idx) { freq = pos->frequency; if (freq == target_freq) return idx; if (freq < target_freq) { best = idx; continue; } /* No freq found below target_freq */ if (best == -1) return idx; return best; } return best; } /* Find highest freq at or below target in a table in descending order */ static inline int cpufreq_table_find_index_dh(struct cpufreq_policy *policy, unsigned int target_freq) { struct cpufreq_frequency_table *table = policy->freq_table; struct cpufreq_frequency_table *pos; unsigned int freq; int idx, best = -1; cpufreq_for_each_valid_entry_idx(pos, table, idx) { freq = pos->frequency; if (freq <= target_freq) return idx; best = idx; } return best; } /* Works only on sorted freq-tables */ static inline int cpufreq_table_find_index_h(struct cpufreq_policy *policy, unsigned int target_freq) { target_freq = clamp_val(target_freq, policy->min, policy->max); if (policy->freq_table_sorted == CPUFREQ_TABLE_SORTED_ASCENDING) return cpufreq_table_find_index_ah(policy, target_freq); else return cpufreq_table_find_index_dh(policy, target_freq); } /* Find closest freq to target in a table in ascending order */ static inline int cpufreq_table_find_index_ac(struct cpufreq_policy *policy, unsigned int target_freq) { struct cpufreq_frequency_table *table = policy->freq_table; struct cpufreq_frequency_table *pos; unsigned int freq; int idx, best = -1; cpufreq_for_each_valid_entry_idx(pos, table, idx) { freq = pos->frequency; if (freq == target_freq) return idx; if (freq < target_freq) { best = idx; continue; } /* No freq found below target_freq */ if (best == -1) return idx; /* Choose the closest freq */ if (target_freq - table[best].frequency > freq - target_freq) return idx; return best; } return best; } /* Find closest freq to target in a table in descending order */ static inline int cpufreq_table_find_index_dc(struct cpufreq_policy *policy, unsigned int target_freq) { struct cpufreq_frequency_table *table = policy->freq_table; struct cpufreq_frequency_table *pos; unsigned int freq; int idx, best = -1; cpufreq_for_each_valid_entry_idx(pos, table, idx) { freq = pos->frequency; if (freq == target_freq) return idx; if (freq > target_freq) { best = idx; continue; } /* No freq found above target_freq */ if (best == -1) return idx; /* Choose the closest freq */ if (table[best].frequency - target_freq > target_freq - freq) return idx; return best; } return best; } /* Works only on sorted freq-tables */ static inline int cpufreq_table_find_index_c(struct cpufreq_policy *policy, unsigned int target_freq) { target_freq = clamp_val(target_freq, policy->min, policy->max); if (policy->freq_table_sorted == CPUFREQ_TABLE_SORTED_ASCENDING) return cpufreq_table_find_index_ac(policy, target_freq); else return cpufreq_table_find_index_dc(policy, target_freq); } static inline int cpufreq_frequency_table_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { if (unlikely(policy->freq_table_sorted == CPUFREQ_TABLE_UNSORTED)) return cpufreq_table_index_unsorted(policy, target_freq, relation); switch (relation) { case CPUFREQ_RELATION_L: return cpufreq_table_find_index_l(policy, target_freq); case CPUFREQ_RELATION_H: return cpufreq_table_find_index_h(policy, target_freq); case CPUFREQ_RELATION_C: return cpufreq_table_find_index_c(policy, target_freq); default: WARN_ON_ONCE(1); return 0; } } static inline int cpufreq_table_count_valid_entries(const struct cpufreq_policy *policy) { struct cpufreq_frequency_table *pos; int count = 0; if (unlikely(!policy->freq_table)) return 0; cpufreq_for_each_valid_entry(pos, policy->freq_table) count++; return count; } static inline int parse_perf_domain(int cpu, const char *list_name, const char *cell_name) { struct device_node *cpu_np; struct of_phandle_args args; int ret; cpu_np = of_cpu_device_node_get(cpu); if (!cpu_np) return -ENODEV; ret = of_parse_phandle_with_args(cpu_np, list_name, cell_name, 0, &args); if (ret < 0) return ret; of_node_put(cpu_np); return args.args[0]; } static inline int of_perf_domain_get_sharing_cpumask(int pcpu, const char *list_name, const char *cell_name, struct cpumask *cpumask) { int target_idx; int cpu, ret; ret = parse_perf_domain(pcpu, list_name, cell_name); if (ret < 0) return ret; target_idx = ret; cpumask_set_cpu(pcpu, cpumask); for_each_possible_cpu(cpu) { if (cpu == pcpu) continue; ret = parse_perf_domain(cpu, list_name, cell_name); if (ret < 0) continue; if (target_idx == ret) cpumask_set_cpu(cpu, cpumask); } return target_idx; } #else static inline int cpufreq_boost_trigger_state(int state) { return 0; } static inline int cpufreq_boost_enabled(void) { return 0; } static inline int cpufreq_enable_boost_support(void) { return -EINVAL; } static inline bool policy_has_boost_freq(struct cpufreq_policy *policy) { return false; } static inline int of_perf_domain_get_sharing_cpumask(int pcpu, const char *list_name, const char *cell_name, struct cpumask *cpumask) { return -EOPNOTSUPP; } #endif #if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) void sched_cpufreq_governor_change(struct cpufreq_policy *policy, struct cpufreq_governor *old_gov); #else static inline void sched_cpufreq_governor_change(struct cpufreq_policy *policy, struct cpufreq_governor *old_gov) { } #endif extern void arch_freq_prepare_all(void); extern unsigned int arch_freq_get_on_cpu(int cpu); #ifndef arch_set_freq_scale static __always_inline void arch_set_freq_scale(const struct cpumask *cpus, unsigned long cur_freq, unsigned long max_freq) { } #endif /* the following are really really optional */ extern struct freq_attr cpufreq_freq_attr_scaling_available_freqs; extern struct freq_attr cpufreq_freq_attr_scaling_boost_freqs; extern struct freq_attr *cpufreq_generic_attr[]; int cpufreq_table_validate_and_sort(struct cpufreq_policy *policy); unsigned int cpufreq_generic_get(unsigned int cpu); void cpufreq_generic_init(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table, unsigned int transition_latency); static inline void cpufreq_register_em_with_opp(struct cpufreq_policy *policy) { dev_pm_opp_of_register_em(get_cpu_device(policy->cpu), policy->related_cpus); } #endif /* _LINUX_CPUFREQ_H */ PK ! ��5�F F irq_work.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IRQ_WORK_H #define _LINUX_IRQ_WORK_H #include <linux/smp_types.h> /* * An entry can be in one of four states: * * free NULL, 0 -> {claimed} : free to be used * claimed NULL, 3 -> {pending} : claimed to be enqueued * pending next, 3 -> {busy} : queued, pending callback * busy NULL, 2 -> {free, claimed} : callback in progress, can be claimed */ struct irq_work { struct __call_single_node node; void (*func)(struct irq_work *); }; #define __IRQ_WORK_INIT(_func, _flags) (struct irq_work){ \ .node = { .u_flags = (_flags), }, \ .func = (_func), \ } #define IRQ_WORK_INIT(_func) __IRQ_WORK_INIT(_func, 0) #define IRQ_WORK_INIT_LAZY(_func) __IRQ_WORK_INIT(_func, IRQ_WORK_LAZY) #define IRQ_WORK_INIT_HARD(_func) __IRQ_WORK_INIT(_func, IRQ_WORK_HARD_IRQ) #define DEFINE_IRQ_WORK(name, _f) \ struct irq_work name = IRQ_WORK_INIT(_f) static inline void init_irq_work(struct irq_work *work, void (*func)(struct irq_work *)) { *work = IRQ_WORK_INIT(func); } static inline bool irq_work_is_pending(struct irq_work *work) { return atomic_read(&work->node.a_flags) & IRQ_WORK_PENDING; } static inline bool irq_work_is_busy(struct irq_work *work) { return atomic_read(&work->node.a_flags) & IRQ_WORK_BUSY; } bool irq_work_queue(struct irq_work *work); bool irq_work_queue_on(struct irq_work *work, int cpu); void irq_work_tick(void); void irq_work_sync(struct irq_work *work); #ifdef CONFIG_IRQ_WORK #include <asm/irq_work.h> void irq_work_run(void); bool irq_work_needs_cpu(void); void irq_work_single(void *arg); void arch_irq_work_raise(void); #else static inline bool irq_work_needs_cpu(void) { return false; } static inline void irq_work_run(void) { } static inline void irq_work_single(void *arg) { } #endif #endif /* _LINUX_IRQ_WORK_H */ PK ! ��0 0 fpga/fpga-bridge.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FPGA_BRIDGE_H #define _LINUX_FPGA_BRIDGE_H #include <linux/device.h> #include <linux/fpga/fpga-mgr.h> struct fpga_bridge; /** * struct fpga_bridge_ops - ops for low level FPGA bridge drivers * @enable_show: returns the FPGA bridge's status * @enable_set: set an FPGA bridge as enabled or disabled * @fpga_bridge_remove: set FPGA into a specific state during driver remove * @groups: optional attribute groups. */ struct fpga_bridge_ops { int (*enable_show)(struct fpga_bridge *bridge); int (*enable_set)(struct fpga_bridge *bridge, bool enable); void (*fpga_bridge_remove)(struct fpga_bridge *bridge); const struct attribute_group **groups; }; /** * struct fpga_bridge - FPGA bridge structure * @name: name of low level FPGA bridge * @dev: FPGA bridge device * @mutex: enforces exclusive reference to bridge * @br_ops: pointer to struct of FPGA bridge ops * @info: fpga image specific information * @node: FPGA bridge list node * @priv: low level driver private date */ struct fpga_bridge { const char *name; struct device dev; struct mutex mutex; /* for exclusive reference to bridge */ const struct fpga_bridge_ops *br_ops; struct fpga_image_info *info; struct list_head node; void *priv; }; #define to_fpga_bridge(d) container_of(d, struct fpga_bridge, dev) struct fpga_bridge *of_fpga_bridge_get(struct device_node *node, struct fpga_image_info *info); struct fpga_bridge *fpga_bridge_get(struct device *dev, struct fpga_image_info *info); void fpga_bridge_put(struct fpga_bridge *bridge); int fpga_bridge_enable(struct fpga_bridge *bridge); int fpga_bridge_disable(struct fpga_bridge *bridge); int fpga_bridges_enable(struct list_head *bridge_list); int fpga_bridges_disable(struct list_head *bridge_list); void fpga_bridges_put(struct list_head *bridge_list); int fpga_bridge_get_to_list(struct device *dev, struct fpga_image_info *info, struct list_head *bridge_list); int of_fpga_bridge_get_to_list(struct device_node *np, struct fpga_image_info *info, struct list_head *bridge_list); struct fpga_bridge *fpga_bridge_create(struct device *dev, const char *name, const struct fpga_bridge_ops *br_ops, void *priv); void fpga_bridge_free(struct fpga_bridge *br); int fpga_bridge_register(struct fpga_bridge *br); void fpga_bridge_unregister(struct fpga_bridge *br); struct fpga_bridge *devm_fpga_bridge_create(struct device *dev, const char *name, const struct fpga_bridge_ops *br_ops, void *priv); #endif /* _LINUX_FPGA_BRIDGE_H */ PK ! ���� � fpga/altera-pr-ip-core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Driver for Altera Partial Reconfiguration IP Core * * Copyright (C) 2016 Intel Corporation * * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation * by Alan Tull <atull@opensource.altera.com> */ #ifndef _ALT_PR_IP_CORE_H #define _ALT_PR_IP_CORE_H #include <linux/io.h> int alt_pr_register(struct device *dev, void __iomem *reg_base); #endif /* _ALT_PR_IP_CORE_H */ PK ! ���|� � fpga/fpga-mgr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * FPGA Framework * * Copyright (C) 2013-2016 Altera Corporation * Copyright (C) 2017 Intel Corporation */ #ifndef _LINUX_FPGA_MGR_H #define _LINUX_FPGA_MGR_H #include <linux/mutex.h> #include <linux/platform_device.h> struct fpga_manager; struct sg_table; /** * enum fpga_mgr_states - fpga framework states * @FPGA_MGR_STATE_UNKNOWN: can't determine state * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up * @FPGA_MGR_STATE_RESET: FPGA in reset state * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage * @FPGA_MGR_STATE_WRITE: writing image to FPGA * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating */ enum fpga_mgr_states { /* default FPGA states */ FPGA_MGR_STATE_UNKNOWN, FPGA_MGR_STATE_POWER_OFF, FPGA_MGR_STATE_POWER_UP, FPGA_MGR_STATE_RESET, /* getting an image for loading */ FPGA_MGR_STATE_FIRMWARE_REQ, FPGA_MGR_STATE_FIRMWARE_REQ_ERR, /* write sequence: init, write, complete */ FPGA_MGR_STATE_WRITE_INIT, FPGA_MGR_STATE_WRITE_INIT_ERR, FPGA_MGR_STATE_WRITE, FPGA_MGR_STATE_WRITE_ERR, FPGA_MGR_STATE_WRITE_COMPLETE, FPGA_MGR_STATE_WRITE_COMPLETE_ERR, /* fpga is programmed and operating */ FPGA_MGR_STATE_OPERATING, }; /** * DOC: FPGA Manager flags * * Flags used in the &fpga_image_info->flags field * * %FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported * * %FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting * * %FPGA_MGR_ENCRYPTED_BITSTREAM: indicates bitstream is encrypted * * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first * * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) /** * struct fpga_image_info - information specific to an FPGA image * @flags: boolean flags as defined above * @enable_timeout_us: maximum time to enable traffic through bridge (uSec) * @disable_timeout_us: maximum time to disable traffic through bridge (uSec) * @config_complete_timeout_us: maximum time for FPGA to switch to operating * status in the write_complete op. * @firmware_name: name of FPGA image firmware file * @sgt: scatter/gather table containing FPGA image * @buf: contiguous buffer containing FPGA image * @count: size of buf * @region_id: id of target region * @dev: device that owns this * @overlay: Device Tree overlay */ struct fpga_image_info { u32 flags; u32 enable_timeout_us; u32 disable_timeout_us; u32 config_complete_timeout_us; char *firmware_name; struct sg_table *sgt; const char *buf; size_t count; int region_id; struct device *dev; #ifdef CONFIG_OF struct device_node *overlay; #endif }; /** * struct fpga_manager_ops - ops for low level fpga manager drivers * @initial_header_size: Maximum number of bytes that should be passed into write_init * @state: returns an enum value of the FPGA's state * @status: returns status of the FPGA, including reconfiguration error code * @write_init: prepare the FPGA to receive configuration data * @write: write count bytes of configuration data to the FPGA * @write_sg: write the scatter list of configuration data to the FPGA * @write_complete: set FPGA to operating state after writing is done * @fpga_remove: optional: Set FPGA into a specific state during driver remove * @groups: optional attribute groups. * * fpga_manager_ops are the low level functions implemented by a specific * fpga manager driver. The optional ones are tested for NULL before being * called, so leaving them out is fine. */ struct fpga_manager_ops { size_t initial_header_size; enum fpga_mgr_states (*state)(struct fpga_manager *mgr); u64 (*status)(struct fpga_manager *mgr); int (*write_init)(struct fpga_manager *mgr, struct fpga_image_info *info, const char *buf, size_t count); int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); int (*write_complete)(struct fpga_manager *mgr, struct fpga_image_info *info); void (*fpga_remove)(struct fpga_manager *mgr); const struct attribute_group **groups; }; /* FPGA manager status: Partial/Full Reconfiguration errors */ #define FPGA_MGR_STATUS_OPERATION_ERR BIT(0) #define FPGA_MGR_STATUS_CRC_ERR BIT(1) #define FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR BIT(2) #define FPGA_MGR_STATUS_IP_PROTOCOL_ERR BIT(3) #define FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR BIT(4) /** * struct fpga_compat_id - id for compatibility check * * @id_h: high 64bit of the compat_id * @id_l: low 64bit of the compat_id */ struct fpga_compat_id { u64 id_h; u64 id_l; }; /** * struct fpga_manager - fpga manager structure * @name: name of low level fpga manager * @dev: fpga manager device * @ref_mutex: only allows one reference to fpga manager * @state: state of fpga manager * @compat_id: FPGA manager id for compatibility check. * @mops: pointer to struct of fpga manager ops * @priv: low level driver private date */ struct fpga_manager { const char *name; struct device dev; struct mutex ref_mutex; enum fpga_mgr_states state; struct fpga_compat_id *compat_id; const struct fpga_manager_ops *mops; void *priv; }; #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev) struct fpga_image_info *fpga_image_info_alloc(struct device *dev); void fpga_image_info_free(struct fpga_image_info *info); int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info); int fpga_mgr_lock(struct fpga_manager *mgr); void fpga_mgr_unlock(struct fpga_manager *mgr); struct fpga_manager *of_fpga_mgr_get(struct device_node *node); struct fpga_manager *fpga_mgr_get(struct device *dev); void fpga_mgr_put(struct fpga_manager *mgr); struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name, const struct fpga_manager_ops *mops, void *priv); void fpga_mgr_free(struct fpga_manager *mgr); int fpga_mgr_register(struct fpga_manager *mgr); void fpga_mgr_unregister(struct fpga_manager *mgr); int devm_fpga_mgr_register(struct device *dev, struct fpga_manager *mgr); struct fpga_manager *devm_fpga_mgr_create(struct device *dev, const char *name, const struct fpga_manager_ops *mops, void *priv); #endif /*_LINUX_FPGA_MGR_H */ PK ! :/�N� � fpga/fpga-region.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _FPGA_REGION_H #define _FPGA_REGION_H #include <linux/device.h> #include <linux/fpga/fpga-mgr.h> #include <linux/fpga/fpga-bridge.h> struct fpga_region; /** * struct fpga_region_info - collection of parameters an FPGA Region * @mgr: fpga region manager * @compat_id: FPGA region id for compatibility check. * @priv: fpga region private data * @get_bridges: optional function to get bridges to a list * * fpga_region_info contains parameters for the register_full function. * These are separated into an info structure because they some are optional * others could be added to in the future. The info structure facilitates * maintaining a stable API. */ struct fpga_region_info { struct fpga_manager *mgr; struct fpga_compat_id *compat_id; void *priv; int (*get_bridges)(struct fpga_region *region); }; /** * struct fpga_region - FPGA Region structure * @dev: FPGA Region device * @mutex: enforces exclusive reference to region * @bridge_list: list of FPGA bridges specified in region * @mgr: FPGA manager * @info: FPGA image info * @compat_id: FPGA region id for compatibility check. * @ops_owner: module containing the get_bridges function * @priv: private data * @get_bridges: optional function to get bridges to a list */ struct fpga_region { struct device dev; struct mutex mutex; /* for exclusive reference to region */ struct list_head bridge_list; struct fpga_manager *mgr; struct fpga_image_info *info; struct fpga_compat_id *compat_id; struct module *ops_owner; void *priv; int (*get_bridges)(struct fpga_region *region); }; #define to_fpga_region(d) container_of(d, struct fpga_region, dev) struct fpga_region *fpga_region_class_find( struct device *start, const void *data, int (*match)(struct device *, const void *)); int fpga_region_program_fpga(struct fpga_region *region); #define fpga_region_register_full(parent, info) \ __fpga_region_register_full(parent, info, THIS_MODULE) struct fpga_region * __fpga_region_register_full(struct device *parent, const struct fpga_region_info *info, struct module *owner); #define fpga_region_register(parent, mgr, get_bridges) \ __fpga_region_register(parent, mgr, get_bridges, THIS_MODULE) struct fpga_region * __fpga_region_register(struct device *parent, struct fpga_manager *mgr, int (*get_bridges)(struct fpga_region *), struct module *owner); void fpga_region_unregister(struct fpga_region *region); #endif /* _FPGA_REGION_H */ PK ! f�I'� � fpga/adi-axi-common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Analog Devices AXI common registers & definitions * * Copyright 2019 Analog Devices Inc. * * https://wiki.analog.com/resources/fpga/docs/axi_ip * https://wiki.analog.com/resources/fpga/docs/hdl/regmap */ #ifndef ADI_AXI_COMMON_H_ #define ADI_AXI_COMMON_H_ #define ADI_AXI_REG_VERSION 0x0000 #define ADI_AXI_PCORE_VER(major, minor, patch) \ (((major) << 16) | ((minor) << 8) | (patch)) #define ADI_AXI_PCORE_VER_MAJOR(version) (((version) >> 16) & 0xff) #define ADI_AXI_PCORE_VER_MINOR(version) (((version) >> 8) & 0xff) #define ADI_AXI_PCORE_VER_PATCH(version) ((version) & 0xff) #endif /* ADI_AXI_COMMON_H_ */ PK ! �g��� � pci-ep-cfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * PCI Endpoint ConfigFS header file * * Copyright (C) 2017 Texas Instruments * Author: Kishon Vijay Abraham I <kishon@ti.com> */ #ifndef __LINUX_PCI_EP_CFS_H #define __LINUX_PCI_EP_CFS_H #include <linux/configfs.h> #ifdef CONFIG_PCI_ENDPOINT_CONFIGFS struct config_group *pci_ep_cfs_add_epc_group(const char *name); void pci_ep_cfs_remove_epc_group(struct config_group *group); struct config_group *pci_ep_cfs_add_epf_group(const char *name); void pci_ep_cfs_remove_epf_group(struct config_group *group); #else static inline struct config_group *pci_ep_cfs_add_epc_group(const char *name) { return NULL; } static inline void pci_ep_cfs_remove_epc_group(struct config_group *group) { } static inline struct config_group *pci_ep_cfs_add_epf_group(const char *name) { return NULL; } static inline void pci_ep_cfs_remove_epf_group(struct config_group *group) { } #endif #endif /* __LINUX_PCI_EP_CFS_H */ PK ! V���T T bitfield.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name> * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> */ #ifndef _LINUX_BITFIELD_H #define _LINUX_BITFIELD_H #include <linux/build_bug.h> #include <asm/byteorder.h> /* * Bitfield access macros * * FIELD_{GET,PREP} macros take as first parameter shifted mask * from which they extract the base mask and shift amount. * Mask must be a compilation time constant. * * Example: * * #define REG_FIELD_A GENMASK(6, 0) * #define REG_FIELD_B BIT(7) * #define REG_FIELD_C GENMASK(15, 8) * #define REG_FIELD_D GENMASK(31, 16) * * Get: * a = FIELD_GET(REG_FIELD_A, reg); * b = FIELD_GET(REG_FIELD_B, reg); * * Set: * reg = FIELD_PREP(REG_FIELD_A, 1) | * FIELD_PREP(REG_FIELD_B, 0) | * FIELD_PREP(REG_FIELD_C, c) | * FIELD_PREP(REG_FIELD_D, 0x40); * * Modify: * reg &= ~REG_FIELD_C; * reg |= FIELD_PREP(REG_FIELD_C, c); */ #define __bf_shf(x) (__builtin_ffsll(x) - 1) #define __scalar_type_to_unsigned_cases(type) \ unsigned type: (unsigned type)0, \ signed type: (unsigned type)0 #define __unsigned_scalar_typeof(x) typeof( \ _Generic((x), \ char: (unsigned char)0, \ __scalar_type_to_unsigned_cases(char), \ __scalar_type_to_unsigned_cases(short), \ __scalar_type_to_unsigned_cases(int), \ __scalar_type_to_unsigned_cases(long), \ __scalar_type_to_unsigned_cases(long long), \ default: (x))) #define __bf_cast_unsigned(type, x) ((__unsigned_scalar_typeof(type))(x)) #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ ({ \ BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ _pfx "mask is not constant"); \ BUILD_BUG_ON_MSG((_mask) == 0, _pfx "mask is zero"); \ BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ _pfx "value too large for the field"); \ BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ __bf_cast_unsigned(_reg, ~0ull), \ _pfx "type of reg too small for mask"); \ __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ (1ULL << __bf_shf(_mask))); \ }) /** * FIELD_MAX() - produce the maximum value representable by a field * @_mask: shifted mask defining the field's length and position * * FIELD_MAX() returns the maximum value that can be held in the field * specified by @_mask. */ #define FIELD_MAX(_mask) \ ({ \ __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ (typeof(_mask))((_mask) >> __bf_shf(_mask)); \ }) /** * FIELD_FIT() - check if value fits in the field * @_mask: shifted mask defining the field's length and position * @_val: value to test against the field * * Return: true if @_val can fit inside @_mask, false if @_val is too big. */ #define FIELD_FIT(_mask, _val) \ ({ \ __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \ !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ }) /** * FIELD_PREP() - prepare a bitfield element * @_mask: shifted mask defining the field's length and position * @_val: value to put in the field * * FIELD_PREP() masks and shifts up the value. The result should * be combined with other fields of the bitfield using logical OR. */ #define FIELD_PREP(_mask, _val) \ ({ \ __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ }) /** * FIELD_GET() - extract a bitfield element * @_mask: shifted mask defining the field's length and position * @_reg: value of entire bitfield * * FIELD_GET() extracts the field specified by @_mask from the * bitfield passed in as @_reg by masking and shifting it down. */ #define FIELD_GET(_mask, _reg) \ ({ \ __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ }) extern void __compiletime_error("value doesn't fit into mask") __field_overflow(void); extern void __compiletime_error("bad bitfield mask") __bad_mask(void); static __always_inline u64 field_multiplier(u64 field) { if ((field | (field - 1)) & ((field | (field - 1)) + 1)) __bad_mask(); return field & -field; } static __always_inline u64 field_mask(u64 field) { return field / field_multiplier(field); } #define field_max(field) ((typeof(field))field_mask(field)) #define ____MAKE_OP(type,base,to,from) \ static __always_inline __##type type##_encode_bits(base v, base field) \ { \ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ __field_overflow(); \ return to((v & field_mask(field)) * field_multiplier(field)); \ } \ static __always_inline __##type type##_replace_bits(__##type old, \ base val, base field) \ { \ return (old & ~to(field)) | type##_encode_bits(val, field); \ } \ static __always_inline void type##p_replace_bits(__##type *p, \ base val, base field) \ { \ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ } \ static __always_inline base type##_get_bits(__##type v, base field) \ { \ return (from(v) & field)/field_multiplier(field); \ } #define __MAKE_OP(size) \ ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \ ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \ ____MAKE_OP(u##size,u##size,,) ____MAKE_OP(u8,u8,,) __MAKE_OP(16) __MAKE_OP(32) __MAKE_OP(64) #undef __MAKE_OP #undef ____MAKE_OP #endif PK ! ��` ` netfilter/nf_conntrack_tftp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_TFTP_H #define _NF_CONNTRACK_TFTP_H #define TFTP_PORT 69 #include <linux/netfilter.h> #include <linux/skbuff.h> #include <linux/types.h> #include <net/netfilter/nf_conntrack_expect.h> struct tftphdr { __be16 opcode; }; #define TFTP_OPCODE_READ 1 #define TFTP_OPCODE_WRITE 2 #define TFTP_OPCODE_DATA 3 #define TFTP_OPCODE_ACK 4 #define TFTP_OPCODE_ERROR 5 extern unsigned int (*nf_nat_tftp_hook)(struct sk_buff *skb, enum ip_conntrack_info ctinfo, struct nf_conntrack_expect *exp); #endif /* _NF_CONNTRACK_TFTP_H */ PK ! ��a7� � netfilter/nf_conntrack_pptp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* PPTP constants and structs */ #ifndef _NF_CONNTRACK_PPTP_H #define _NF_CONNTRACK_PPTP_H #include <linux/netfilter.h> #include <linux/skbuff.h> #include <linux/types.h> #include <linux/netfilter/nf_conntrack_common.h> #include <net/netfilter/nf_conntrack_expect.h> #include <uapi/linux/netfilter/nf_conntrack_tuple_common.h> const char *pptp_msg_name(u_int16_t msg); /* state of the control session */ enum pptp_ctrlsess_state { PPTP_SESSION_NONE, /* no session present */ PPTP_SESSION_ERROR, /* some session error */ PPTP_SESSION_STOPREQ, /* stop_sess request seen */ PPTP_SESSION_REQUESTED, /* start_sess request seen */ PPTP_SESSION_CONFIRMED, /* session established */ }; /* state of the call inside the control session */ enum pptp_ctrlcall_state { PPTP_CALL_NONE, PPTP_CALL_ERROR, PPTP_CALL_OUT_REQ, PPTP_CALL_OUT_CONF, PPTP_CALL_IN_REQ, PPTP_CALL_IN_REP, PPTP_CALL_IN_CONF, PPTP_CALL_CLEAR_REQ, }; /* conntrack private data */ struct nf_ct_pptp_master { enum pptp_ctrlsess_state sstate; /* session state */ enum pptp_ctrlcall_state cstate; /* call state */ __be16 pac_call_id; /* call id of PAC */ __be16 pns_call_id; /* call id of PNS */ /* in pre-2.6.11 this used to be per-expect. Now it is per-conntrack * and therefore imposes a fixed limit on the number of maps */ struct nf_ct_gre_keymap *keymap[IP_CT_DIR_MAX]; }; struct nf_nat_pptp { __be16 pns_call_id; /* NAT'ed PNS call id */ __be16 pac_call_id; /* NAT'ed PAC call id */ }; #define PPTP_CONTROL_PORT 1723 #define PPTP_PACKET_CONTROL 1 #define PPTP_PACKET_MGMT 2 #define PPTP_MAGIC_COOKIE 0x1a2b3c4d struct pptp_pkt_hdr { __u16 packetLength; __be16 packetType; __be32 magicCookie; }; /* PptpControlMessageType values */ #define PPTP_START_SESSION_REQUEST 1 #define PPTP_START_SESSION_REPLY 2 #define PPTP_STOP_SESSION_REQUEST 3 #define PPTP_STOP_SESSION_REPLY 4 #define PPTP_ECHO_REQUEST 5 #define PPTP_ECHO_REPLY 6 #define PPTP_OUT_CALL_REQUEST 7 #define PPTP_OUT_CALL_REPLY 8 #define PPTP_IN_CALL_REQUEST 9 #define PPTP_IN_CALL_REPLY 10 #define PPTP_IN_CALL_CONNECT 11 #define PPTP_CALL_CLEAR_REQUEST 12 #define PPTP_CALL_DISCONNECT_NOTIFY 13 #define PPTP_WAN_ERROR_NOTIFY 14 #define PPTP_SET_LINK_INFO 15 #define PPTP_MSG_MAX 15 /* PptpGeneralError values */ #define PPTP_ERROR_CODE_NONE 0 #define PPTP_NOT_CONNECTED 1 #define PPTP_BAD_FORMAT 2 #define PPTP_BAD_VALUE 3 #define PPTP_NO_RESOURCE 4 #define PPTP_BAD_CALLID 5 #define PPTP_REMOVE_DEVICE_ERROR 6 struct PptpControlHeader { __be16 messageType; __u16 reserved; }; /* FramingCapability Bitmap Values */ #define PPTP_FRAME_CAP_ASYNC 0x1 #define PPTP_FRAME_CAP_SYNC 0x2 /* BearerCapability Bitmap Values */ #define PPTP_BEARER_CAP_ANALOG 0x1 #define PPTP_BEARER_CAP_DIGITAL 0x2 struct PptpStartSessionRequest { __be16 protocolVersion; __u16 reserved1; __be32 framingCapability; __be32 bearerCapability; __be16 maxChannels; __be16 firmwareRevision; __u8 hostName[64]; __u8 vendorString[64]; }; /* PptpStartSessionResultCode Values */ #define PPTP_START_OK 1 #define PPTP_START_GENERAL_ERROR 2 #define PPTP_START_ALREADY_CONNECTED 3 #define PPTP_START_NOT_AUTHORIZED 4 #define PPTP_START_UNKNOWN_PROTOCOL 5 struct PptpStartSessionReply { __be16 protocolVersion; __u8 resultCode; __u8 generalErrorCode; __be32 framingCapability; __be32 bearerCapability; __be16 maxChannels; __be16 firmwareRevision; __u8 hostName[64]; __u8 vendorString[64]; }; /* PptpStopReasons */ #define PPTP_STOP_NONE 1 #define PPTP_STOP_PROTOCOL 2 #define PPTP_STOP_LOCAL_SHUTDOWN 3 struct PptpStopSessionRequest { __u8 reason; __u8 reserved1; __u16 reserved2; }; /* PptpStopSessionResultCode */ #define PPTP_STOP_OK 1 #define PPTP_STOP_GENERAL_ERROR 2 struct PptpStopSessionReply { __u8 resultCode; __u8 generalErrorCode; __u16 reserved1; }; struct PptpEchoRequest { __be32 identNumber; }; /* PptpEchoReplyResultCode */ #define PPTP_ECHO_OK 1 #define PPTP_ECHO_GENERAL_ERROR 2 struct PptpEchoReply { __be32 identNumber; __u8 resultCode; __u8 generalErrorCode; __u16 reserved; }; /* PptpFramingType */ #define PPTP_ASYNC_FRAMING 1 #define PPTP_SYNC_FRAMING 2 #define PPTP_DONT_CARE_FRAMING 3 /* PptpCallBearerType */ #define PPTP_ANALOG_TYPE 1 #define PPTP_DIGITAL_TYPE 2 #define PPTP_DONT_CARE_BEARER_TYPE 3 struct PptpOutCallRequest { __be16 callID; __be16 callSerialNumber; __be32 minBPS; __be32 maxBPS; __be32 bearerType; __be32 framingType; __be16 packetWindow; __be16 packetProcDelay; __be16 phoneNumberLength; __u16 reserved1; __u8 phoneNumber[64]; __u8 subAddress[64]; }; /* PptpCallResultCode */ #define PPTP_OUTCALL_CONNECT 1 #define PPTP_OUTCALL_GENERAL_ERROR 2 #define PPTP_OUTCALL_NO_CARRIER 3 #define PPTP_OUTCALL_BUSY 4 #define PPTP_OUTCALL_NO_DIAL_TONE 5 #define PPTP_OUTCALL_TIMEOUT 6 #define PPTP_OUTCALL_DONT_ACCEPT 7 struct PptpOutCallReply { __be16 callID; __be16 peersCallID; __u8 resultCode; __u8 generalErrorCode; __be16 causeCode; __be32 connectSpeed; __be16 packetWindow; __be16 packetProcDelay; __be32 physChannelID; }; struct PptpInCallRequest { __be16 callID; __be16 callSerialNumber; __be32 callBearerType; __be32 physChannelID; __be16 dialedNumberLength; __be16 dialingNumberLength; __u8 dialedNumber[64]; __u8 dialingNumber[64]; __u8 subAddress[64]; }; /* PptpInCallResultCode */ #define PPTP_INCALL_ACCEPT 1 #define PPTP_INCALL_GENERAL_ERROR 2 #define PPTP_INCALL_DONT_ACCEPT 3 struct PptpInCallReply { __be16 callID; __be16 peersCallID; __u8 resultCode; __u8 generalErrorCode; __be16 packetWindow; __be16 packetProcDelay; __u16 reserved; }; struct PptpInCallConnected { __be16 peersCallID; __u16 reserved; __be32 connectSpeed; __be16 packetWindow; __be16 packetProcDelay; __be32 callFramingType; }; struct PptpClearCallRequest { __be16 callID; __u16 reserved; }; struct PptpCallDisconnectNotify { __be16 callID; __u8 resultCode; __u8 generalErrorCode; __be16 causeCode; __u16 reserved; __u8 callStatistics[128]; }; struct PptpWanErrorNotify { __be16 peersCallID; __u16 reserved; __be32 crcErrors; __be32 framingErrors; __be32 hardwareOverRuns; __be32 bufferOverRuns; __be32 timeoutErrors; __be32 alignmentErrors; }; struct PptpSetLinkInfo { __be16 peersCallID; __u16 reserved; __be32 sendAccm; __be32 recvAccm; }; union pptp_ctrl_union { struct PptpStartSessionRequest sreq; struct PptpStartSessionReply srep; struct PptpStopSessionRequest streq; struct PptpStopSessionReply strep; struct PptpOutCallRequest ocreq; struct PptpOutCallReply ocack; struct PptpInCallRequest icreq; struct PptpInCallReply icack; struct PptpInCallConnected iccon; struct PptpClearCallRequest clrreq; struct PptpCallDisconnectNotify disc; struct PptpWanErrorNotify wanerr; struct PptpSetLinkInfo setlink; }; extern int (*nf_nat_pptp_hook_outbound)(struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, struct PptpControlHeader *ctlh, union pptp_ctrl_union *pptpReq); extern int (*nf_nat_pptp_hook_inbound)(struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, struct PptpControlHeader *ctlh, union pptp_ctrl_union *pptpReq); extern void (*nf_nat_pptp_hook_exp_gre)(struct nf_conntrack_expect *exp_orig, struct nf_conntrack_expect *exp_reply); extern void (*nf_nat_pptp_hook_expectfn)(struct nf_conn *ct, struct nf_conntrack_expect *exp); #endif /* _NF_CONNTRACK_PPTP_H */ PK ! ���}� � netfilter/nf_conntrack_h323.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_H323_H #define _NF_CONNTRACK_H323_H #include <linux/netfilter.h> #include <linux/skbuff.h> #include <linux/types.h> #include <linux/netfilter/nf_conntrack_h323_asn1.h> #include <net/netfilter/nf_conntrack_expect.h> #include <uapi/linux/netfilter/nf_conntrack_tuple_common.h> #define RAS_PORT 1719 #define Q931_PORT 1720 #define H323_RTP_CHANNEL_MAX 4 /* Audio, video, FAX and other */ /* This structure exists only once per master */ struct nf_ct_h323_master { /* Original and NATed Q.931 or H.245 signal ports */ __be16 sig_port[IP_CT_DIR_MAX]; /* Original and NATed RTP ports */ __be16 rtp_port[H323_RTP_CHANNEL_MAX][IP_CT_DIR_MAX]; union { /* RAS connection timeout */ u_int32_t timeout; /* Next TPKT length (for separate TPKT header and data) */ u_int16_t tpkt_len[IP_CT_DIR_MAX]; }; }; int get_h225_addr(struct nf_conn *ct, unsigned char *data, TransportAddress *taddr, union nf_inet_addr *addr, __be16 *port); void nf_conntrack_h245_expect(struct nf_conn *new, struct nf_conntrack_expect *this); void nf_conntrack_q931_expect(struct nf_conn *new, struct nf_conntrack_expect *this); extern int (*set_h245_addr_hook) (struct sk_buff *skb, unsigned int protoff, unsigned char **data, int dataoff, H245_TransportAddress *taddr, union nf_inet_addr *addr, __be16 port); extern int (*set_h225_addr_hook) (struct sk_buff *skb, unsigned int protoff, unsigned char **data, int dataoff, TransportAddress *taddr, union nf_inet_addr *addr, __be16 port); extern int (*set_sig_addr_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, TransportAddress *taddr, int count); extern int (*set_ras_addr_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, TransportAddress *taddr, int count); extern int (*nat_rtp_rtcp_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, int dataoff, H245_TransportAddress *taddr, __be16 port, __be16 rtp_port, struct nf_conntrack_expect *rtp_exp, struct nf_conntrack_expect *rtcp_exp); extern int (*nat_t120_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, int dataoff, H245_TransportAddress *taddr, __be16 port, struct nf_conntrack_expect *exp); extern int (*nat_h245_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, int dataoff, TransportAddress *taddr, __be16 port, struct nf_conntrack_expect *exp); extern int (*nat_callforwarding_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, int dataoff, TransportAddress *taddr, __be16 port, struct nf_conntrack_expect *exp); extern int (*nat_q931_hook) (struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, TransportAddress *taddr, int idx, __be16 port, struct nf_conntrack_expect *exp); #endif PK ! I�� � netfilter/nf_conntrack_ftp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_FTP_H #define _NF_CONNTRACK_FTP_H #include <linux/netfilter.h> #include <linux/skbuff.h> #include <linux/types.h> #include <net/netfilter/nf_conntrack_expect.h> #include <uapi/linux/netfilter/nf_conntrack_ftp.h> #include <uapi/linux/netfilter/nf_conntrack_tuple_common.h> #define FTP_PORT 21 #define NF_CT_FTP_SEQ_PICKUP (1 << 0) #define NUM_SEQ_TO_REMEMBER 2 /* This structure exists only once per master */ struct nf_ct_ftp_master { /* Valid seq positions for cmd matching after newline */ u_int32_t seq_aft_nl[IP_CT_DIR_MAX][NUM_SEQ_TO_REMEMBER]; /* 0 means seq_match_aft_nl not set */ u_int16_t seq_aft_nl_num[IP_CT_DIR_MAX]; /* pickup sequence tracking, useful for conntrackd */ u_int16_t flags[IP_CT_DIR_MAX]; }; /* For NAT to hook in when we find a packet which describes what other * connection we should expect. */ extern unsigned int (*nf_nat_ftp_hook)(struct sk_buff *skb, enum ip_conntrack_info ctinfo, enum nf_ct_ftp_type type, unsigned int protoff, unsigned int matchoff, unsigned int matchlen, struct nf_conntrack_expect *exp); #endif /* _NF_CONNTRACK_FTP_H */ PK ! ��G G netfilter/nf_conntrack_snmp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_SNMP_H #define _NF_CONNTRACK_SNMP_H #include <linux/netfilter.h> #include <linux/skbuff.h> extern int (*nf_nat_snmp_hook)(struct sk_buff *skb, unsigned int protoff, struct nf_conn *ct, enum ip_conntrack_info ctinfo); #endif /* _NF_CONNTRACK_SNMP_H */ PK ! v�.� netfilter/nfnetlink_acct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NFNL_ACCT_H_ #define _NFNL_ACCT_H_ #include <uapi/linux/netfilter/nfnetlink_acct.h> #include <net/net_namespace.h> enum { NFACCT_NO_QUOTA = -1, NFACCT_UNDERQUOTA, NFACCT_OVERQUOTA, }; struct nf_acct; struct nf_acct *nfnl_acct_find_get(struct net *net, const char *filter_name); void nfnl_acct_put(struct nf_acct *acct); void nfnl_acct_update(const struct sk_buff *skb, struct nf_acct *nfacct); int nfnl_acct_overquota(struct net *net, struct nf_acct *nfacct); #endif /* _NFNL_ACCT_H */ PK ! ~C� � netfilter/nf_conntrack_irc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_IRC_H #define _NF_CONNTRACK_IRC_H #include <linux/netfilter.h> #include <linux/skbuff.h> #include <net/netfilter/nf_conntrack_expect.h> #define IRC_PORT 6667 extern unsigned int (*nf_nat_irc_hook)(struct sk_buff *skb, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned int matchoff, unsigned int matchlen, struct nf_conntrack_expect *exp); #endif /* _NF_CONNTRACK_IRC_H */ PK ! P� � netfilter/nf_conntrack_dccp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_DCCP_H #define _NF_CONNTRACK_DCCP_H /* Exposed to userspace over nfnetlink */ enum ct_dccp_states { CT_DCCP_NONE, CT_DCCP_REQUEST, CT_DCCP_RESPOND, CT_DCCP_PARTOPEN, CT_DCCP_OPEN, CT_DCCP_CLOSEREQ, CT_DCCP_CLOSING, CT_DCCP_TIMEWAIT, CT_DCCP_IGNORE, CT_DCCP_INVALID, __CT_DCCP_MAX }; #define CT_DCCP_MAX (__CT_DCCP_MAX - 1) enum ct_dccp_roles { CT_DCCP_ROLE_CLIENT, CT_DCCP_ROLE_SERVER, __CT_DCCP_ROLE_MAX }; #define CT_DCCP_ROLE_MAX (__CT_DCCP_ROLE_MAX - 1) #include <linux/netfilter/nf_conntrack_tuple_common.h> struct nf_ct_dccp { u_int8_t role[IP_CT_DIR_MAX]; u_int8_t state; u_int8_t last_pkt; u_int8_t last_dir; u_int64_t handshake_seq; }; #endif /* _NF_CONNTRACK_DCCP_H */ PK ! kV�� " netfilter/nf_conntrack_h323_asn1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /**************************************************************************** * BER and PER decoding library for H.323 conntrack/NAT module. * * Copyright (c) 2006 by Jing Min Zhao <zhaojingmin@users.sourceforge.net> * * This library is based on H.225 version 4, H.235 version 2 and H.245 * version 7. It is extremely optimized to decode only the absolutely * necessary objects in a signal for Linux kernel NAT module use, so don't * expect it to be a full ASN.1 library. * * Features: * * 1. Small. The total size of code plus data is less than 20 KB (IA32). * 2. Fast. Decoding Netmeeting's Setup signal 1 million times on a PIII 866 * takes only 3.9 seconds. * 3. No memory allocation. It uses a static object. No need to initialize or * cleanup. * 4. Thread safe. * 5. Support embedded architectures that has no misaligned memory access * support. * * Limitations: * * 1. At most 30 faststart entries. Actually this is limited by ethernet's MTU. * If a Setup signal contains more than 30 faststart, the packet size will * very likely exceed the MTU size, then the TPKT will be fragmented. I * don't know how to handle this in a Netfilter module. Anybody can help? * Although I think 30 is enough for most of the cases. * 2. IPv4 addresses only. * ****************************************************************************/ #ifndef _NF_CONNTRACK_HELPER_H323_ASN1_H_ #define _NF_CONNTRACK_HELPER_H323_ASN1_H_ /***************************************************************************** * H.323 Types ****************************************************************************/ #include <linux/types.h> #include <linux/netfilter/nf_conntrack_h323_types.h> typedef struct { enum { Q931_NationalEscape = 0x00, Q931_Alerting = 0x01, Q931_CallProceeding = 0x02, Q931_Connect = 0x07, Q931_ConnectAck = 0x0F, Q931_Progress = 0x03, Q931_Setup = 0x05, Q931_SetupAck = 0x0D, Q931_Resume = 0x26, Q931_ResumeAck = 0x2E, Q931_ResumeReject = 0x22, Q931_Suspend = 0x25, Q931_SuspendAck = 0x2D, Q931_SuspendReject = 0x21, Q931_UserInformation = 0x20, Q931_Disconnect = 0x45, Q931_Release = 0x4D, Q931_ReleaseComplete = 0x5A, Q931_Restart = 0x46, Q931_RestartAck = 0x4E, Q931_Segment = 0x60, Q931_CongestionCtrl = 0x79, Q931_Information = 0x7B, Q931_Notify = 0x6E, Q931_Status = 0x7D, Q931_StatusEnquiry = 0x75, Q931_Facility = 0x62 } MessageType; H323_UserInformation UUIE; } Q931; /***************************************************************************** * Decode Functions Return Codes ****************************************************************************/ #define H323_ERROR_NONE 0 /* Decoded successfully */ #define H323_ERROR_STOP 1 /* Decoding stopped, not really an error */ #define H323_ERROR_BOUND -1 #define H323_ERROR_RANGE -2 /***************************************************************************** * Decode Functions ****************************************************************************/ int DecodeRasMessage(unsigned char *buf, size_t sz, RasMessage * ras); int DecodeQ931(unsigned char *buf, size_t sz, Q931 * q931); int DecodeMultimediaSystemControlMessage(unsigned char *buf, size_t sz, MultimediaSystemControlMessage * mscm); #endif PK ! � [ [ netfilter/ipset/ip_set_hash.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IP_SET_HASH_H #define __IP_SET_HASH_H #include <uapi/linux/netfilter/ipset/ip_set_hash.h> #define IPSET_DEFAULT_HASHSIZE 1024 #define IPSET_MIMINAL_HASHSIZE 64 #define IPSET_DEFAULT_MAXELEM 65536 #define IPSET_DEFAULT_PROBES 4 #define IPSET_DEFAULT_RESIZE 100 #endif /* __IP_SET_HASH_H */ PK ! �[� � netfilter/ipset/pfxlen.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _PFXLEN_H #define _PFXLEN_H #include <asm/byteorder.h> #include <linux/netfilter.h> #include <net/tcp.h> /* Prefixlen maps, by Jan Engelhardt */ extern const union nf_inet_addr ip_set_netmask_map[]; extern const union nf_inet_addr ip_set_hostmask_map[]; static inline __be32 ip_set_netmask(u8 pfxlen) { return ip_set_netmask_map[pfxlen].ip; } static inline const __be32 * ip_set_netmask6(u8 pfxlen) { return &ip_set_netmask_map[pfxlen].ip6[0]; } static inline u32 ip_set_hostmask(u8 pfxlen) { return (__force u32) ip_set_hostmask_map[pfxlen].ip; } static inline const __be32 * ip_set_hostmask6(u8 pfxlen) { return &ip_set_hostmask_map[pfxlen].ip6[0]; } extern u32 ip_set_range_to_cidr(u32 from, u32 to, u8 *cidr); #define ip_set_mask_from_to(from, to, cidr) \ do { \ from &= ip_set_hostmask(cidr); \ to = from | ~ip_set_hostmask(cidr); \ } while (0) static inline void ip6_netmask(union nf_inet_addr *ip, u8 prefix) { ip->ip6[0] &= ip_set_netmask6(prefix)[0]; ip->ip6[1] &= ip_set_netmask6(prefix)[1]; ip->ip6[2] &= ip_set_netmask6(prefix)[2]; ip->ip6[3] &= ip_set_netmask6(prefix)[3]; } #endif /*_PFXLEN_H */ PK ! �j�E E netfilter/ipset/ip_set_bitmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IP_SET_BITMAP_H #define __IP_SET_BITMAP_H #include <uapi/linux/netfilter/ipset/ip_set_bitmap.h> #define IPSET_BITMAP_MAX_RANGE 0x0000FFFF enum { IPSET_ADD_STORE_PLAIN_TIMEOUT = -1, IPSET_ADD_FAILED = 1, IPSET_ADD_START_STORED_TIMEOUT, }; #endif /* __IP_SET_BITMAP_H */ PK ! S�J��; �; netfilter/ipset/ip_set.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu> * Patrick Schaaf <bof@bof.de> * Martin Josefsson <gandalf@wlug.westbo.se> * Copyright (C) 2003-2013 Jozsef Kadlecsik <kadlec@netfilter.org> */ #ifndef _IP_SET_H #define _IP_SET_H #include <linux/ip.h> #include <linux/ipv6.h> #include <linux/netlink.h> #include <linux/netfilter.h> #include <linux/netfilter/x_tables.h> #include <linux/stringify.h> #include <linux/vmalloc.h> #include <net/netlink.h> #include <uapi/linux/netfilter/ipset/ip_set.h> #define _IP_SET_MODULE_DESC(a, b, c) \ MODULE_DESCRIPTION(a " type of IP sets, revisions " b "-" c) #define IP_SET_MODULE_DESC(a, b, c) \ _IP_SET_MODULE_DESC(a, __stringify(b), __stringify(c)) /* Set features */ enum ip_set_feature { IPSET_TYPE_IP_FLAG = 0, IPSET_TYPE_IP = (1 << IPSET_TYPE_IP_FLAG), IPSET_TYPE_PORT_FLAG = 1, IPSET_TYPE_PORT = (1 << IPSET_TYPE_PORT_FLAG), IPSET_TYPE_MAC_FLAG = 2, IPSET_TYPE_MAC = (1 << IPSET_TYPE_MAC_FLAG), IPSET_TYPE_IP2_FLAG = 3, IPSET_TYPE_IP2 = (1 << IPSET_TYPE_IP2_FLAG), IPSET_TYPE_NAME_FLAG = 4, IPSET_TYPE_NAME = (1 << IPSET_TYPE_NAME_FLAG), IPSET_TYPE_IFACE_FLAG = 5, IPSET_TYPE_IFACE = (1 << IPSET_TYPE_IFACE_FLAG), IPSET_TYPE_MARK_FLAG = 6, IPSET_TYPE_MARK = (1 << IPSET_TYPE_MARK_FLAG), IPSET_TYPE_NOMATCH_FLAG = 7, IPSET_TYPE_NOMATCH = (1 << IPSET_TYPE_NOMATCH_FLAG), /* Strictly speaking not a feature, but a flag for dumping: * this settype must be dumped last */ IPSET_DUMP_LAST_FLAG = 8, IPSET_DUMP_LAST = (1 << IPSET_DUMP_LAST_FLAG), }; /* Set extensions */ enum ip_set_extension { IPSET_EXT_BIT_TIMEOUT = 0, IPSET_EXT_TIMEOUT = (1 << IPSET_EXT_BIT_TIMEOUT), IPSET_EXT_BIT_COUNTER = 1, IPSET_EXT_COUNTER = (1 << IPSET_EXT_BIT_COUNTER), IPSET_EXT_BIT_COMMENT = 2, IPSET_EXT_COMMENT = (1 << IPSET_EXT_BIT_COMMENT), IPSET_EXT_BIT_SKBINFO = 3, IPSET_EXT_SKBINFO = (1 << IPSET_EXT_BIT_SKBINFO), /* Mark set with an extension which needs to call destroy */ IPSET_EXT_BIT_DESTROY = 7, IPSET_EXT_DESTROY = (1 << IPSET_EXT_BIT_DESTROY), }; #define SET_WITH_TIMEOUT(s) ((s)->extensions & IPSET_EXT_TIMEOUT) #define SET_WITH_COUNTER(s) ((s)->extensions & IPSET_EXT_COUNTER) #define SET_WITH_COMMENT(s) ((s)->extensions & IPSET_EXT_COMMENT) #define SET_WITH_SKBINFO(s) ((s)->extensions & IPSET_EXT_SKBINFO) #define SET_WITH_FORCEADD(s) ((s)->flags & IPSET_CREATE_FLAG_FORCEADD) /* Extension id, in size order */ enum ip_set_ext_id { IPSET_EXT_ID_COUNTER = 0, IPSET_EXT_ID_TIMEOUT, IPSET_EXT_ID_SKBINFO, IPSET_EXT_ID_COMMENT, IPSET_EXT_ID_MAX, }; struct ip_set; /* Extension type */ struct ip_set_ext_type { /* Destroy extension private data (can be NULL) */ void (*destroy)(struct ip_set *set, void *ext); enum ip_set_extension type; enum ipset_cadt_flags flag; /* Size and minimal alignment */ u8 len; u8 align; }; extern const struct ip_set_ext_type ip_set_extensions[]; struct ip_set_counter { atomic64_t bytes; atomic64_t packets; }; struct ip_set_comment_rcu { struct rcu_head rcu; char str[]; }; struct ip_set_comment { struct ip_set_comment_rcu __rcu *c; }; struct ip_set_skbinfo { u32 skbmark; u32 skbmarkmask; u32 skbprio; u16 skbqueue; u16 __pad; }; struct ip_set_ext { struct ip_set_skbinfo skbinfo; u64 packets; u64 bytes; char *comment; u32 timeout; u8 packets_op; u8 bytes_op; bool target; }; #define ext_timeout(e, s) \ ((unsigned long *)(((void *)(e)) + (s)->offset[IPSET_EXT_ID_TIMEOUT])) #define ext_counter(e, s) \ ((struct ip_set_counter *)(((void *)(e)) + (s)->offset[IPSET_EXT_ID_COUNTER])) #define ext_comment(e, s) \ ((struct ip_set_comment *)(((void *)(e)) + (s)->offset[IPSET_EXT_ID_COMMENT])) #define ext_skbinfo(e, s) \ ((struct ip_set_skbinfo *)(((void *)(e)) + (s)->offset[IPSET_EXT_ID_SKBINFO])) typedef int (*ipset_adtfn)(struct ip_set *set, void *value, const struct ip_set_ext *ext, struct ip_set_ext *mext, u32 cmdflags); /* Kernel API function options */ struct ip_set_adt_opt { u8 family; /* Actual protocol family */ u8 dim; /* Dimension of match/target */ u8 flags; /* Direction and negation flags */ u32 cmdflags; /* Command-like flags */ struct ip_set_ext ext; /* Extensions */ }; /* Set type, variant-specific part */ struct ip_set_type_variant { /* Kernelspace: test/add/del entries * returns negative error code, * zero for no match/success to add/delete * positive for matching element */ int (*kadt)(struct ip_set *set, const struct sk_buff *skb, const struct xt_action_param *par, enum ipset_adt adt, struct ip_set_adt_opt *opt); /* Userspace: test/add/del entries * returns negative error code, * zero for no match/success to add/delete * positive for matching element */ int (*uadt)(struct ip_set *set, struct nlattr *tb[], enum ipset_adt adt, u32 *lineno, u32 flags, bool retried); /* Low level add/del/test functions */ ipset_adtfn adt[IPSET_ADT_MAX]; /* When adding entries and set is full, try to resize the set */ int (*resize)(struct ip_set *set, bool retried); /* Destroy the set */ void (*destroy)(struct ip_set *set); /* Flush the elements */ void (*flush)(struct ip_set *set); /* Expire entries before listing */ void (*expire)(struct ip_set *set); /* List set header data */ int (*head)(struct ip_set *set, struct sk_buff *skb); /* List elements */ int (*list)(const struct ip_set *set, struct sk_buff *skb, struct netlink_callback *cb); /* Keep listing private when resizing runs parallel */ void (*uref)(struct ip_set *set, struct netlink_callback *cb, bool start); /* Return true if "b" set is the same as "a" * according to the create set parameters */ bool (*same_set)(const struct ip_set *a, const struct ip_set *b); /* Cancel ongoing garbage collectors before destroying the set*/ void (*cancel_gc)(struct ip_set *set); /* Region-locking is used */ bool region_lock; }; struct ip_set_region { spinlock_t lock; /* Region lock */ size_t ext_size; /* Size of the dynamic extensions */ u32 elements; /* Number of elements vs timeout */ }; /* Max range where every element is added/deleted in one step */ #define IPSET_MAX_RANGE (1<<14) /* The max revision number supported by any set type + 1 */ #define IPSET_REVISION_MAX 9 /* The core set type structure */ struct ip_set_type { struct list_head list; /* Typename */ char name[IPSET_MAXNAMELEN]; /* Protocol version */ u8 protocol; /* Set type dimension */ u8 dimension; /* * Supported family: may be NFPROTO_UNSPEC for both * NFPROTO_IPV4/NFPROTO_IPV6. */ u8 family; /* Type revisions */ u8 revision_min, revision_max; /* Revision-specific supported (create) flags */ u8 create_flags[IPSET_REVISION_MAX+1]; /* Set features to control swapping */ u16 features; /* Create set */ int (*create)(struct net *net, struct ip_set *set, struct nlattr *tb[], u32 flags); /* Attribute policies */ const struct nla_policy create_policy[IPSET_ATTR_CREATE_MAX + 1]; const struct nla_policy adt_policy[IPSET_ATTR_ADT_MAX + 1]; /* Set this to THIS_MODULE if you are a module, otherwise NULL */ struct module *me; }; /* register and unregister set type */ extern int ip_set_type_register(struct ip_set_type *set_type); extern void ip_set_type_unregister(struct ip_set_type *set_type); /* A generic IP set */ struct ip_set { /* For call_cru in destroy */ struct rcu_head rcu; /* The name of the set */ char name[IPSET_MAXNAMELEN]; /* Lock protecting the set data */ spinlock_t lock; /* References to the set */ u32 ref; /* References to the set for netlink events like dump, * ref can be swapped out by ip_set_swap */ u32 ref_netlink; /* The core set type */ struct ip_set_type *type; /* The type variant doing the real job */ const struct ip_set_type_variant *variant; /* The actual INET family of the set */ u8 family; /* The type revision */ u8 revision; /* Extensions */ u8 extensions; /* Create flags */ u8 flags; /* Default timeout value, if enabled */ u32 timeout; /* Number of elements (vs timeout) */ u32 elements; /* Size of the dynamic extensions (vs timeout) */ size_t ext_size; /* Element data size */ size_t dsize; /* Offsets to extensions in elements */ size_t offset[IPSET_EXT_ID_MAX]; /* The type specific data */ void *data; }; static inline void ip_set_ext_destroy(struct ip_set *set, void *data) { /* Check that the extension is enabled for the set and * call it's destroy function for its extension part in data. */ if (SET_WITH_COMMENT(set)) { struct ip_set_comment *c = ext_comment(data, set); ip_set_extensions[IPSET_EXT_ID_COMMENT].destroy(set, c); } } int ip_set_put_flags(struct sk_buff *skb, struct ip_set *set); /* Netlink CB args */ enum { IPSET_CB_NET = 0, /* net namespace */ IPSET_CB_PROTO, /* ipset protocol */ IPSET_CB_DUMP, /* dump single set/all sets */ IPSET_CB_INDEX, /* set index */ IPSET_CB_PRIVATE, /* set private data */ IPSET_CB_ARG0, /* type specific */ }; /* register and unregister set references */ extern ip_set_id_t ip_set_get_byname(struct net *net, const char *name, struct ip_set **set); extern void ip_set_put_byindex(struct net *net, ip_set_id_t index); extern void ip_set_name_byindex(struct net *net, ip_set_id_t index, char *name); extern ip_set_id_t ip_set_nfnl_get_byindex(struct net *net, ip_set_id_t index); extern void ip_set_nfnl_put(struct net *net, ip_set_id_t index); /* API for iptables set match, and SET target */ extern int ip_set_add(ip_set_id_t id, const struct sk_buff *skb, const struct xt_action_param *par, struct ip_set_adt_opt *opt); extern int ip_set_del(ip_set_id_t id, const struct sk_buff *skb, const struct xt_action_param *par, struct ip_set_adt_opt *opt); extern int ip_set_test(ip_set_id_t id, const struct sk_buff *skb, const struct xt_action_param *par, struct ip_set_adt_opt *opt); /* Utility functions */ extern void *ip_set_alloc(size_t size); extern void ip_set_free(void *members); extern int ip_set_get_ipaddr4(struct nlattr *nla, __be32 *ipaddr); extern int ip_set_get_ipaddr6(struct nlattr *nla, union nf_inet_addr *ipaddr); extern size_t ip_set_elem_len(struct ip_set *set, struct nlattr *tb[], size_t len, size_t align); extern int ip_set_get_extensions(struct ip_set *set, struct nlattr *tb[], struct ip_set_ext *ext); extern int ip_set_put_extensions(struct sk_buff *skb, const struct ip_set *set, const void *e, bool active); extern bool ip_set_match_extensions(struct ip_set *set, const struct ip_set_ext *ext, struct ip_set_ext *mext, u32 flags, void *data); static inline int ip_set_get_hostipaddr4(struct nlattr *nla, u32 *ipaddr) { __be32 ip; int ret = ip_set_get_ipaddr4(nla, &ip); if (ret) return ret; *ipaddr = ntohl(ip); return 0; } /* Ignore IPSET_ERR_EXIST errors if asked to do so? */ static inline bool ip_set_eexist(int ret, u32 flags) { return ret == -IPSET_ERR_EXIST && (flags & IPSET_FLAG_EXIST); } /* Match elements marked with nomatch */ static inline bool ip_set_enomatch(int ret, u32 flags, enum ipset_adt adt, struct ip_set *set) { return adt == IPSET_TEST && (set->type->features & IPSET_TYPE_NOMATCH) && ((flags >> 16) & IPSET_FLAG_NOMATCH) && (ret > 0 || ret == -ENOTEMPTY); } /* Check the NLA_F_NET_BYTEORDER flag */ static inline bool ip_set_attr_netorder(struct nlattr *tb[], int type) { return tb[type] && (tb[type]->nla_type & NLA_F_NET_BYTEORDER); } static inline bool ip_set_optattr_netorder(struct nlattr *tb[], int type) { return !tb[type] || (tb[type]->nla_type & NLA_F_NET_BYTEORDER); } /* Useful converters */ static inline u32 ip_set_get_h32(const struct nlattr *attr) { return ntohl(nla_get_be32(attr)); } static inline u16 ip_set_get_h16(const struct nlattr *attr) { return ntohs(nla_get_be16(attr)); } static inline int nla_put_ipaddr4(struct sk_buff *skb, int type, __be32 ipaddr) { struct nlattr *__nested = nla_nest_start(skb, type); int ret; if (!__nested) return -EMSGSIZE; ret = nla_put_in_addr(skb, IPSET_ATTR_IPADDR_IPV4, ipaddr); if (!ret) nla_nest_end(skb, __nested); return ret; } static inline int nla_put_ipaddr6(struct sk_buff *skb, int type, const struct in6_addr *ipaddrptr) { struct nlattr *__nested = nla_nest_start(skb, type); int ret; if (!__nested) return -EMSGSIZE; ret = nla_put_in6_addr(skb, IPSET_ATTR_IPADDR_IPV6, ipaddrptr); if (!ret) nla_nest_end(skb, __nested); return ret; } /* Get address from skbuff */ static inline __be32 ip4addr(const struct sk_buff *skb, bool src) { return src ? ip_hdr(skb)->saddr : ip_hdr(skb)->daddr; } static inline void ip4addrptr(const struct sk_buff *skb, bool src, __be32 *addr) { *addr = src ? ip_hdr(skb)->saddr : ip_hdr(skb)->daddr; } static inline void ip6addrptr(const struct sk_buff *skb, bool src, struct in6_addr *addr) { memcpy(addr, src ? &ipv6_hdr(skb)->saddr : &ipv6_hdr(skb)->daddr, sizeof(*addr)); } /* How often should the gc be run by default */ #define IPSET_GC_TIME (3 * 60) /* Timeout period depending on the timeout value of the given set */ #define IPSET_GC_PERIOD(timeout) \ ((timeout/3) ? min_t(u32, (timeout)/3, IPSET_GC_TIME) : 1) /* Entry is set with no timeout value */ #define IPSET_ELEM_PERMANENT 0 /* Set is defined with timeout support: timeout value may be 0 */ #define IPSET_NO_TIMEOUT UINT_MAX /* Max timeout value, see msecs_to_jiffies() in jiffies.h */ #define IPSET_MAX_TIMEOUT (UINT_MAX >> 1)/MSEC_PER_SEC #define ip_set_adt_opt_timeout(opt, set) \ ((opt)->ext.timeout != IPSET_NO_TIMEOUT ? (opt)->ext.timeout : (set)->timeout) static inline unsigned int ip_set_timeout_uget(struct nlattr *tb) { unsigned int timeout = ip_set_get_h32(tb); /* Normalize to fit into jiffies */ if (timeout > IPSET_MAX_TIMEOUT) timeout = IPSET_MAX_TIMEOUT; return timeout; } static inline bool ip_set_timeout_expired(const unsigned long *t) { return *t != IPSET_ELEM_PERMANENT && time_is_before_jiffies(*t); } static inline void ip_set_timeout_set(unsigned long *timeout, u32 value) { unsigned long t; if (!value) { *timeout = IPSET_ELEM_PERMANENT; return; } t = msecs_to_jiffies(value * MSEC_PER_SEC) + jiffies; if (t == IPSET_ELEM_PERMANENT) /* Bingo! :-) */ t--; *timeout = t; } void ip_set_init_comment(struct ip_set *set, struct ip_set_comment *comment, const struct ip_set_ext *ext); static inline void ip_set_init_counter(struct ip_set_counter *counter, const struct ip_set_ext *ext) { if (ext->bytes != ULLONG_MAX) atomic64_set(&(counter)->bytes, (long long)(ext->bytes)); if (ext->packets != ULLONG_MAX) atomic64_set(&(counter)->packets, (long long)(ext->packets)); } static inline void ip_set_init_skbinfo(struct ip_set_skbinfo *skbinfo, const struct ip_set_ext *ext) { *skbinfo = ext->skbinfo; } #define IP_SET_INIT_KEXT(skb, opt, set) \ { .bytes = (skb)->len, .packets = 1, .target = true,\ .timeout = ip_set_adt_opt_timeout(opt, set) } #define IP_SET_INIT_UEXT(set) \ { .bytes = ULLONG_MAX, .packets = ULLONG_MAX, \ .timeout = (set)->timeout } #define IPSET_CONCAT(a, b) a##b #define IPSET_TOKEN(a, b) IPSET_CONCAT(a, b) #endif /*_IP_SET_H */ PK ! � { netfilter/ipset/ip_set_list.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IP_SET_LIST_H #define __IP_SET_LIST_H #include <uapi/linux/netfilter/ipset/ip_set_list.h> #define IP_SET_LIST_DEFAULT_SIZE 8 #define IP_SET_LIST_MIN_SIZE 4 #define IP_SET_LIST_MAX_SIZE 65536 #endif /* __IP_SET_LIST_H */ PK ! �>( netfilter/ipset/ip_set_getport.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _IP_SET_GETPORT_H #define _IP_SET_GETPORT_H #include <linux/skbuff.h> #include <linux/types.h> #include <uapi/linux/in.h> extern bool ip_set_get_ip4_port(const struct sk_buff *skb, bool src, __be16 *port, u8 *proto); #if IS_ENABLED(CONFIG_IP6_NF_IPTABLES) extern bool ip_set_get_ip6_port(const struct sk_buff *skb, bool src, __be16 *port, u8 *proto); #else static inline bool ip_set_get_ip6_port(const struct sk_buff *skb, bool src, __be16 *port, u8 *proto) { return false; } #endif static inline bool ip_set_proto_with_ports(u8 proto) { switch (proto) { case IPPROTO_TCP: case IPPROTO_SCTP: case IPPROTO_UDP: case IPPROTO_UDPLITE: return true; } return false; } #endif /*_IP_SET_GETPORT_H*/ PK ! ���@ @ % netfilter/nf_conntrack_zones_common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_ZONES_COMMON_H #define _NF_CONNTRACK_ZONES_COMMON_H #include <uapi/linux/netfilter/nf_conntrack_tuple_common.h> #define NF_CT_DEFAULT_ZONE_ID 0 #define NF_CT_ZONE_DIR_ORIG (1 << IP_CT_DIR_ORIGINAL) #define NF_CT_ZONE_DIR_REPL (1 << IP_CT_DIR_REPLY) #define NF_CT_DEFAULT_ZONE_DIR (NF_CT_ZONE_DIR_ORIG | NF_CT_ZONE_DIR_REPL) #define NF_CT_FLAG_MARK 1 struct nf_conntrack_zone { u16 id; u8 flags; u8 dir; }; extern const struct nf_conntrack_zone nf_ct_zone_dflt; #endif /* _NF_CONNTRACK_ZONES_COMMON_H */ PK ! �`y#� � netfilter/nf_conntrack_amanda.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_AMANDA_H #define _NF_CONNTRACK_AMANDA_H /* AMANDA tracking. */ #include <linux/netfilter.h> #include <linux/skbuff.h> #include <net/netfilter/nf_conntrack_expect.h> extern unsigned int (*nf_nat_amanda_hook)(struct sk_buff *skb, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned int matchoff, unsigned int matchlen, struct nf_conntrack_expect *exp); #endif /* _NF_CONNTRACK_AMANDA_H */ PK ! ��V� � netfilter/nfnetlink_osf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NFOSF_H #define _NFOSF_H #include <uapi/linux/netfilter/nfnetlink_osf.h> enum osf_fmatch_states { /* Packet does not match the fingerprint */ FMATCH_WRONG = 0, /* Packet matches the fingerprint */ FMATCH_OK, /* Options do not match the fingerprint, but header does */ FMATCH_OPT_WRONG, }; extern struct list_head nf_osf_fingers[2]; struct nf_osf_finger { struct rcu_head rcu_head; struct list_head finger_entry; struct nf_osf_user_finger finger; }; struct nf_osf_data { const char *genre; const char *version; }; bool nf_osf_match(const struct sk_buff *skb, u_int8_t family, int hooknum, struct net_device *in, struct net_device *out, const struct nf_osf_info *info, struct net *net, const struct list_head *nf_osf_fingers); bool nf_osf_find(const struct sk_buff *skb, const struct list_head *nf_osf_fingers, const int ttl_check, struct nf_osf_data *data); #endif /* _NFOSF_H */ PK ! n�� ` ` netfilter/nf_conntrack_sane.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_SANE_H #define _NF_CONNTRACK_SANE_H /* SANE tracking. */ #define SANE_PORT 6566 enum sane_state { SANE_STATE_NORMAL, SANE_STATE_START_REQUESTED, }; /* This structure exists only once per master */ struct nf_ct_sane_master { enum sane_state state; }; #endif /* _NF_CONNTRACK_SANE_H */ PK ! �{b&� � " netfilter/nf_conntrack_proto_gre.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _CONNTRACK_PROTO_GRE_H #define _CONNTRACK_PROTO_GRE_H #include <asm/byteorder.h> #include <net/gre.h> #include <net/pptp.h> struct nf_ct_gre { unsigned int stream_timeout; unsigned int timeout; }; #include <net/netfilter/nf_conntrack_tuple.h> struct nf_conn; /* structure for original <-> reply keymap */ struct nf_ct_gre_keymap { struct list_head list; struct nf_conntrack_tuple tuple; struct rcu_head rcu; }; /* add new tuple->key_reply pair to keymap */ int nf_ct_gre_keymap_add(struct nf_conn *ct, enum ip_conntrack_dir dir, struct nf_conntrack_tuple *t); void nf_ct_gre_keymap_flush(struct net *net); /* delete keymap entries */ void nf_ct_gre_keymap_destroy(struct nf_conn *ct); bool gre_pkt_to_tuple(const struct sk_buff *skb, unsigned int dataoff, struct net *net, struct nf_conntrack_tuple *tuple); #endif /* _CONNTRACK_PROTO_GRE_H */ PK ! ?@J� � netfilter/nf_conntrack_sip.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __NF_CONNTRACK_SIP_H__ #define __NF_CONNTRACK_SIP_H__ #include <linux/skbuff.h> #include <linux/types.h> #include <net/netfilter/nf_conntrack_expect.h> #define SIP_PORT 5060 #define SIP_TIMEOUT 3600 struct nf_ct_sip_master { unsigned int register_cseq; unsigned int invite_cseq; __be16 forced_dport; }; enum sip_expectation_classes { SIP_EXPECT_SIGNALLING, SIP_EXPECT_AUDIO, SIP_EXPECT_VIDEO, SIP_EXPECT_IMAGE, __SIP_EXPECT_MAX }; #define SIP_EXPECT_MAX (__SIP_EXPECT_MAX - 1) struct sdp_media_type { const char *name; unsigned int len; enum sip_expectation_classes class; }; #define SDP_MEDIA_TYPE(__name, __class) \ { \ .name = (__name), \ .len = sizeof(__name) - 1, \ .class = (__class), \ } struct sip_handler { const char *method; unsigned int len; int (*request)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, unsigned int cseq); int (*response)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, unsigned int cseq, unsigned int code); }; #define SIP_HANDLER(__method, __request, __response) \ { \ .method = (__method), \ .len = sizeof(__method) - 1, \ .request = (__request), \ .response = (__response), \ } struct sip_header { const char *name; const char *cname; const char *search; unsigned int len; unsigned int clen; unsigned int slen; int (*match_len)(const struct nf_conn *ct, const char *dptr, const char *limit, int *shift); }; #define __SIP_HDR(__name, __cname, __search, __match) \ { \ .name = (__name), \ .len = sizeof(__name) - 1, \ .cname = (__cname), \ .clen = (__cname) ? sizeof(__cname) - 1 : 0, \ .search = (__search), \ .slen = (__search) ? sizeof(__search) - 1 : 0, \ .match_len = (__match), \ } #define SIP_HDR(__name, __cname, __search, __match) \ __SIP_HDR(__name, __cname, __search, __match) #define SDP_HDR(__name, __search, __match) \ __SIP_HDR(__name, NULL, __search, __match) enum sip_header_types { SIP_HDR_CSEQ, SIP_HDR_FROM, SIP_HDR_TO, SIP_HDR_CONTACT, SIP_HDR_VIA_UDP, SIP_HDR_VIA_TCP, SIP_HDR_EXPIRES, SIP_HDR_CONTENT_LENGTH, SIP_HDR_CALL_ID, }; enum sdp_header_types { SDP_HDR_UNSPEC, SDP_HDR_VERSION, SDP_HDR_OWNER, SDP_HDR_CONNECTION, SDP_HDR_MEDIA, }; struct nf_nat_sip_hooks { unsigned int (*msg)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen); void (*seq_adjust)(struct sk_buff *skb, unsigned int protoff, s16 off); unsigned int (*expect)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, struct nf_conntrack_expect *exp, unsigned int matchoff, unsigned int matchlen); unsigned int (*sdp_addr)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, unsigned int sdpoff, enum sdp_header_types type, enum sdp_header_types term, const union nf_inet_addr *addr); unsigned int (*sdp_port)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, unsigned int matchoff, unsigned int matchlen, u_int16_t port); unsigned int (*sdp_session)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, unsigned int sdpoff, const union nf_inet_addr *addr); unsigned int (*sdp_media)(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, struct nf_conntrack_expect *rtp_exp, struct nf_conntrack_expect *rtcp_exp, unsigned int mediaoff, unsigned int medialen, union nf_inet_addr *rtp_addr); }; extern const struct nf_nat_sip_hooks *nf_nat_sip_hooks; int ct_sip_parse_request(const struct nf_conn *ct, const char *dptr, unsigned int datalen, unsigned int *matchoff, unsigned int *matchlen, union nf_inet_addr *addr, __be16 *port); int ct_sip_get_header(const struct nf_conn *ct, const char *dptr, unsigned int dataoff, unsigned int datalen, enum sip_header_types type, unsigned int *matchoff, unsigned int *matchlen); int ct_sip_parse_header_uri(const struct nf_conn *ct, const char *dptr, unsigned int *dataoff, unsigned int datalen, enum sip_header_types type, int *in_header, unsigned int *matchoff, unsigned int *matchlen, union nf_inet_addr *addr, __be16 *port); int ct_sip_parse_address_param(const struct nf_conn *ct, const char *dptr, unsigned int dataoff, unsigned int datalen, const char *name, unsigned int *matchoff, unsigned int *matchlen, union nf_inet_addr *addr, bool delim); int ct_sip_parse_numerical_param(const struct nf_conn *ct, const char *dptr, unsigned int off, unsigned int datalen, const char *name, unsigned int *matchoff, unsigned int *matchen, unsigned int *val); int ct_sip_get_sdp_header(const struct nf_conn *ct, const char *dptr, unsigned int dataoff, unsigned int datalen, enum sdp_header_types type, enum sdp_header_types term, unsigned int *matchoff, unsigned int *matchlen); #endif /* __NF_CONNTRACK_SIP_H__ */ PK ! � ��, , netfilter/nf_conntrack_common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_COMMON_H #define _NF_CONNTRACK_COMMON_H #include <linux/refcount.h> #include <uapi/linux/netfilter/nf_conntrack_common.h> struct ip_conntrack_stat { unsigned int found; unsigned int invalid; unsigned int insert; unsigned int insert_failed; unsigned int clash_resolve; unsigned int drop; unsigned int early_drop; unsigned int error; unsigned int expect_new; unsigned int expect_create; unsigned int expect_delete; unsigned int search_restart; unsigned int chaintoolong; }; #define NFCT_INFOMASK 7UL #define NFCT_PTRMASK ~(NFCT_INFOMASK) struct nf_conntrack { refcount_t use; }; void nf_conntrack_destroy(struct nf_conntrack *nfct); /* like nf_ct_put, but without module dependency on nf_conntrack */ static inline void nf_conntrack_put(struct nf_conntrack *nfct) { if (nfct && refcount_dec_and_test(&nfct->use)) nf_conntrack_destroy(nfct); } static inline void nf_conntrack_get(struct nf_conntrack *nfct) { if (nfct) refcount_inc(&nfct->use); } #endif /* _NF_CONNTRACK_COMMON_H */ PK ! W��R R netfilter/nf_conntrack_sctp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_SCTP_H #define _NF_CONNTRACK_SCTP_H /* SCTP tracking. */ #include <uapi/linux/netfilter/nf_conntrack_sctp.h> struct ip_ct_sctp { enum sctp_conntrack state; __be32 vtag[IP_CT_DIR_MAX]; u8 init[IP_CT_DIR_MAX]; u8 last_dir; u8 flags; }; #endif /* _NF_CONNTRACK_SCTP_H */ PK ! �Ssŭ� �� # netfilter/nf_conntrack_h323_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Generated by Jing Min Zhao's ASN.1 parser, May 16 2007 * * Copyright (c) 2006 Jing Min Zhao <zhaojingmin@users.sourceforge.net> */ #ifndef _NF_CONNTRACK_H323_TYPES_H #define _NF_CONNTRACK_H323_TYPES_H typedef struct TransportAddress_ipAddress { /* SEQUENCE */ int options; /* No use */ unsigned int ip; } TransportAddress_ipAddress; typedef struct TransportAddress_ip6Address { /* SEQUENCE */ int options; /* No use */ unsigned int ip; } TransportAddress_ip6Address; typedef struct TransportAddress { /* CHOICE */ enum { eTransportAddress_ipAddress, eTransportAddress_ipSourceRoute, eTransportAddress_ipxAddress, eTransportAddress_ip6Address, eTransportAddress_netBios, eTransportAddress_nsap, eTransportAddress_nonStandardAddress, } choice; union { TransportAddress_ipAddress ipAddress; TransportAddress_ip6Address ip6Address; }; } TransportAddress; typedef struct DataProtocolCapability { /* CHOICE */ enum { eDataProtocolCapability_nonStandard, eDataProtocolCapability_v14buffered, eDataProtocolCapability_v42lapm, eDataProtocolCapability_hdlcFrameTunnelling, eDataProtocolCapability_h310SeparateVCStack, eDataProtocolCapability_h310SingleVCStack, eDataProtocolCapability_transparent, eDataProtocolCapability_segmentationAndReassembly, eDataProtocolCapability_hdlcFrameTunnelingwSAR, eDataProtocolCapability_v120, eDataProtocolCapability_separateLANStack, eDataProtocolCapability_v76wCompression, eDataProtocolCapability_tcp, eDataProtocolCapability_udp, } choice; } DataProtocolCapability; typedef struct DataApplicationCapability_application { /* CHOICE */ enum { eDataApplicationCapability_application_nonStandard, eDataApplicationCapability_application_t120, eDataApplicationCapability_application_dsm_cc, eDataApplicationCapability_application_userData, eDataApplicationCapability_application_t84, eDataApplicationCapability_application_t434, eDataApplicationCapability_application_h224, eDataApplicationCapability_application_nlpid, eDataApplicationCapability_application_dsvdControl, eDataApplicationCapability_application_h222DataPartitioning, eDataApplicationCapability_application_t30fax, eDataApplicationCapability_application_t140, eDataApplicationCapability_application_t38fax, eDataApplicationCapability_application_genericDataCapability, } choice; union { DataProtocolCapability t120; }; } DataApplicationCapability_application; typedef struct DataApplicationCapability { /* SEQUENCE */ int options; /* No use */ DataApplicationCapability_application application; } DataApplicationCapability; typedef struct DataType { /* CHOICE */ enum { eDataType_nonStandard, eDataType_nullData, eDataType_videoData, eDataType_audioData, eDataType_data, eDataType_encryptionData, eDataType_h235Control, eDataType_h235Media, eDataType_multiplexedStream, } choice; union { DataApplicationCapability data; }; } DataType; typedef struct UnicastAddress_iPAddress { /* SEQUENCE */ int options; /* No use */ unsigned int network; } UnicastAddress_iPAddress; typedef struct UnicastAddress_iP6Address { /* SEQUENCE */ int options; /* No use */ unsigned int network; } UnicastAddress_iP6Address; typedef struct UnicastAddress { /* CHOICE */ enum { eUnicastAddress_iPAddress, eUnicastAddress_iPXAddress, eUnicastAddress_iP6Address, eUnicastAddress_netBios, eUnicastAddress_iPSourceRouteAddress, eUnicastAddress_nsap, eUnicastAddress_nonStandardAddress, } choice; union { UnicastAddress_iPAddress iPAddress; UnicastAddress_iP6Address iP6Address; }; } UnicastAddress; typedef struct H245_TransportAddress { /* CHOICE */ enum { eH245_TransportAddress_unicastAddress, eH245_TransportAddress_multicastAddress, } choice; union { UnicastAddress unicastAddress; }; } H245_TransportAddress; typedef struct H2250LogicalChannelParameters { /* SEQUENCE */ enum { eH2250LogicalChannelParameters_nonStandard = (1 << 31), eH2250LogicalChannelParameters_associatedSessionID = (1 << 30), eH2250LogicalChannelParameters_mediaChannel = (1 << 29), eH2250LogicalChannelParameters_mediaGuaranteedDelivery = (1 << 28), eH2250LogicalChannelParameters_mediaControlChannel = (1 << 27), eH2250LogicalChannelParameters_mediaControlGuaranteedDelivery = (1 << 26), eH2250LogicalChannelParameters_silenceSuppression = (1 << 25), eH2250LogicalChannelParameters_destination = (1 << 24), eH2250LogicalChannelParameters_dynamicRTPPayloadType = (1 << 23), eH2250LogicalChannelParameters_mediaPacketization = (1 << 22), eH2250LogicalChannelParameters_transportCapability = (1 << 21), eH2250LogicalChannelParameters_redundancyEncoding = (1 << 20), eH2250LogicalChannelParameters_source = (1 << 19), } options; H245_TransportAddress mediaChannel; H245_TransportAddress mediaControlChannel; } H2250LogicalChannelParameters; typedef struct OpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters { /* CHOICE */ enum { eOpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters_h222LogicalChannelParameters, eOpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters_h223LogicalChannelParameters, eOpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters_v76LogicalChannelParameters, eOpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters_h2250LogicalChannelParameters, eOpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters_none, } choice; union { H2250LogicalChannelParameters h2250LogicalChannelParameters; }; } OpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters; typedef struct OpenLogicalChannel_forwardLogicalChannelParameters { /* SEQUENCE */ enum { eOpenLogicalChannel_forwardLogicalChannelParameters_portNumber = (1 << 31), eOpenLogicalChannel_forwardLogicalChannelParameters_forwardLogicalChannelDependency = (1 << 30), eOpenLogicalChannel_forwardLogicalChannelParameters_replacementFor = (1 << 29), } options; DataType dataType; OpenLogicalChannel_forwardLogicalChannelParameters_multiplexParameters multiplexParameters; } OpenLogicalChannel_forwardLogicalChannelParameters; typedef struct OpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters { /* CHOICE */ enum { eOpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters_h223LogicalChannelParameters, eOpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters_v76LogicalChannelParameters, eOpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters_h2250LogicalChannelParameters, } choice; union { H2250LogicalChannelParameters h2250LogicalChannelParameters; }; } OpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters; typedef struct OpenLogicalChannel_reverseLogicalChannelParameters { /* SEQUENCE */ enum { eOpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters = (1 << 31), eOpenLogicalChannel_reverseLogicalChannelParameters_reverseLogicalChannelDependency = (1 << 30), eOpenLogicalChannel_reverseLogicalChannelParameters_replacementFor = (1 << 29), } options; OpenLogicalChannel_reverseLogicalChannelParameters_multiplexParameters multiplexParameters; } OpenLogicalChannel_reverseLogicalChannelParameters; typedef struct NetworkAccessParameters_networkAddress { /* CHOICE */ enum { eNetworkAccessParameters_networkAddress_q2931Address, eNetworkAccessParameters_networkAddress_e164Address, eNetworkAccessParameters_networkAddress_localAreaAddress, } choice; union { H245_TransportAddress localAreaAddress; }; } NetworkAccessParameters_networkAddress; typedef struct NetworkAccessParameters { /* SEQUENCE */ enum { eNetworkAccessParameters_distribution = (1 << 31), eNetworkAccessParameters_externalReference = (1 << 30), eNetworkAccessParameters_t120SetupProcedure = (1 << 29), } options; NetworkAccessParameters_networkAddress networkAddress; } NetworkAccessParameters; typedef struct OpenLogicalChannel { /* SEQUENCE */ enum { eOpenLogicalChannel_reverseLogicalChannelParameters = (1 << 31), eOpenLogicalChannel_separateStack = (1 << 30), eOpenLogicalChannel_encryptionSync = (1 << 29), } options; OpenLogicalChannel_forwardLogicalChannelParameters forwardLogicalChannelParameters; OpenLogicalChannel_reverseLogicalChannelParameters reverseLogicalChannelParameters; NetworkAccessParameters separateStack; } OpenLogicalChannel; typedef struct Setup_UUIE_fastStart { /* SEQUENCE OF */ int count; OpenLogicalChannel item[30]; } Setup_UUIE_fastStart; typedef struct Setup_UUIE { /* SEQUENCE */ enum { eSetup_UUIE_h245Address = (1 << 31), eSetup_UUIE_sourceAddress = (1 << 30), eSetup_UUIE_destinationAddress = (1 << 29), eSetup_UUIE_destCallSignalAddress = (1 << 28), eSetup_UUIE_destExtraCallInfo = (1 << 27), eSetup_UUIE_destExtraCRV = (1 << 26), eSetup_UUIE_callServices = (1 << 25), eSetup_UUIE_sourceCallSignalAddress = (1 << 24), eSetup_UUIE_remoteExtensionAddress = (1 << 23), eSetup_UUIE_callIdentifier = (1 << 22), eSetup_UUIE_h245SecurityCapability = (1 << 21), eSetup_UUIE_tokens = (1 << 20), eSetup_UUIE_cryptoTokens = (1 << 19), eSetup_UUIE_fastStart = (1 << 18), eSetup_UUIE_mediaWaitForConnect = (1 << 17), eSetup_UUIE_canOverlapSend = (1 << 16), eSetup_UUIE_endpointIdentifier = (1 << 15), eSetup_UUIE_multipleCalls = (1 << 14), eSetup_UUIE_maintainConnection = (1 << 13), eSetup_UUIE_connectionParameters = (1 << 12), eSetup_UUIE_language = (1 << 11), eSetup_UUIE_presentationIndicator = (1 << 10), eSetup_UUIE_screeningIndicator = (1 << 9), eSetup_UUIE_serviceControl = (1 << 8), eSetup_UUIE_symmetricOperationRequired = (1 << 7), eSetup_UUIE_capacity = (1 << 6), eSetup_UUIE_circuitInfo = (1 << 5), eSetup_UUIE_desiredProtocols = (1 << 4), eSetup_UUIE_neededFeatures = (1 << 3), eSetup_UUIE_desiredFeatures = (1 << 2), eSetup_UUIE_supportedFeatures = (1 << 1), eSetup_UUIE_parallelH245Control = (1 << 0), } options; TransportAddress h245Address; TransportAddress destCallSignalAddress; TransportAddress sourceCallSignalAddress; Setup_UUIE_fastStart fastStart; } Setup_UUIE; typedef struct CallProceeding_UUIE_fastStart { /* SEQUENCE OF */ int count; OpenLogicalChannel item[30]; } CallProceeding_UUIE_fastStart; typedef struct CallProceeding_UUIE { /* SEQUENCE */ enum { eCallProceeding_UUIE_h245Address = (1 << 31), eCallProceeding_UUIE_callIdentifier = (1 << 30), eCallProceeding_UUIE_h245SecurityMode = (1 << 29), eCallProceeding_UUIE_tokens = (1 << 28), eCallProceeding_UUIE_cryptoTokens = (1 << 27), eCallProceeding_UUIE_fastStart = (1 << 26), eCallProceeding_UUIE_multipleCalls = (1 << 25), eCallProceeding_UUIE_maintainConnection = (1 << 24), eCallProceeding_UUIE_fastConnectRefused = (1 << 23), eCallProceeding_UUIE_featureSet = (1 << 22), } options; TransportAddress h245Address; CallProceeding_UUIE_fastStart fastStart; } CallProceeding_UUIE; typedef struct Connect_UUIE_fastStart { /* SEQUENCE OF */ int count; OpenLogicalChannel item[30]; } Connect_UUIE_fastStart; typedef struct Connect_UUIE { /* SEQUENCE */ enum { eConnect_UUIE_h245Address = (1 << 31), eConnect_UUIE_callIdentifier = (1 << 30), eConnect_UUIE_h245SecurityMode = (1 << 29), eConnect_UUIE_tokens = (1 << 28), eConnect_UUIE_cryptoTokens = (1 << 27), eConnect_UUIE_fastStart = (1 << 26), eConnect_UUIE_multipleCalls = (1 << 25), eConnect_UUIE_maintainConnection = (1 << 24), eConnect_UUIE_language = (1 << 23), eConnect_UUIE_connectedAddress = (1 << 22), eConnect_UUIE_presentationIndicator = (1 << 21), eConnect_UUIE_screeningIndicator = (1 << 20), eConnect_UUIE_fastConnectRefused = (1 << 19), eConnect_UUIE_serviceControl = (1 << 18), eConnect_UUIE_capacity = (1 << 17), eConnect_UUIE_featureSet = (1 << 16), } options; TransportAddress h245Address; Connect_UUIE_fastStart fastStart; } Connect_UUIE; typedef struct Alerting_UUIE_fastStart { /* SEQUENCE OF */ int count; OpenLogicalChannel item[30]; } Alerting_UUIE_fastStart; typedef struct Alerting_UUIE { /* SEQUENCE */ enum { eAlerting_UUIE_h245Address = (1 << 31), eAlerting_UUIE_callIdentifier = (1 << 30), eAlerting_UUIE_h245SecurityMode = (1 << 29), eAlerting_UUIE_tokens = (1 << 28), eAlerting_UUIE_cryptoTokens = (1 << 27), eAlerting_UUIE_fastStart = (1 << 26), eAlerting_UUIE_multipleCalls = (1 << 25), eAlerting_UUIE_maintainConnection = (1 << 24), eAlerting_UUIE_alertingAddress = (1 << 23), eAlerting_UUIE_presentationIndicator = (1 << 22), eAlerting_UUIE_screeningIndicator = (1 << 21), eAlerting_UUIE_fastConnectRefused = (1 << 20), eAlerting_UUIE_serviceControl = (1 << 19), eAlerting_UUIE_capacity = (1 << 18), eAlerting_UUIE_featureSet = (1 << 17), } options; TransportAddress h245Address; Alerting_UUIE_fastStart fastStart; } Alerting_UUIE; typedef struct FacilityReason { /* CHOICE */ enum { eFacilityReason_routeCallToGatekeeper, eFacilityReason_callForwarded, eFacilityReason_routeCallToMC, eFacilityReason_undefinedReason, eFacilityReason_conferenceListChoice, eFacilityReason_startH245, eFacilityReason_noH245, eFacilityReason_newTokens, eFacilityReason_featureSetUpdate, eFacilityReason_forwardedElements, eFacilityReason_transportedInformation, } choice; } FacilityReason; typedef struct Facility_UUIE_fastStart { /* SEQUENCE OF */ int count; OpenLogicalChannel item[30]; } Facility_UUIE_fastStart; typedef struct Facility_UUIE { /* SEQUENCE */ enum { eFacility_UUIE_alternativeAddress = (1 << 31), eFacility_UUIE_alternativeAliasAddress = (1 << 30), eFacility_UUIE_conferenceID = (1 << 29), eFacility_UUIE_callIdentifier = (1 << 28), eFacility_UUIE_destExtraCallInfo = (1 << 27), eFacility_UUIE_remoteExtensionAddress = (1 << 26), eFacility_UUIE_tokens = (1 << 25), eFacility_UUIE_cryptoTokens = (1 << 24), eFacility_UUIE_conferences = (1 << 23), eFacility_UUIE_h245Address = (1 << 22), eFacility_UUIE_fastStart = (1 << 21), eFacility_UUIE_multipleCalls = (1 << 20), eFacility_UUIE_maintainConnection = (1 << 19), eFacility_UUIE_fastConnectRefused = (1 << 18), eFacility_UUIE_serviceControl = (1 << 17), eFacility_UUIE_circuitInfo = (1 << 16), eFacility_UUIE_featureSet = (1 << 15), eFacility_UUIE_destinationInfo = (1 << 14), eFacility_UUIE_h245SecurityMode = (1 << 13), } options; TransportAddress alternativeAddress; FacilityReason reason; TransportAddress h245Address; Facility_UUIE_fastStart fastStart; } Facility_UUIE; typedef struct Progress_UUIE_fastStart { /* SEQUENCE OF */ int count; OpenLogicalChannel item[30]; } Progress_UUIE_fastStart; typedef struct Progress_UUIE { /* SEQUENCE */ enum { eProgress_UUIE_h245Address = (1 << 31), eProgress_UUIE_h245SecurityMode = (1 << 30), eProgress_UUIE_tokens = (1 << 29), eProgress_UUIE_cryptoTokens = (1 << 28), eProgress_UUIE_fastStart = (1 << 27), eProgress_UUIE_multipleCalls = (1 << 26), eProgress_UUIE_maintainConnection = (1 << 25), eProgress_UUIE_fastConnectRefused = (1 << 24), } options; TransportAddress h245Address; Progress_UUIE_fastStart fastStart; } Progress_UUIE; typedef struct H323_UU_PDU_h323_message_body { /* CHOICE */ enum { eH323_UU_PDU_h323_message_body_setup, eH323_UU_PDU_h323_message_body_callProceeding, eH323_UU_PDU_h323_message_body_connect, eH323_UU_PDU_h323_message_body_alerting, eH323_UU_PDU_h323_message_body_information, eH323_UU_PDU_h323_message_body_releaseComplete, eH323_UU_PDU_h323_message_body_facility, eH323_UU_PDU_h323_message_body_progress, eH323_UU_PDU_h323_message_body_empty, eH323_UU_PDU_h323_message_body_status, eH323_UU_PDU_h323_message_body_statusInquiry, eH323_UU_PDU_h323_message_body_setupAcknowledge, eH323_UU_PDU_h323_message_body_notify, } choice; union { Setup_UUIE setup; CallProceeding_UUIE callProceeding; Connect_UUIE connect; Alerting_UUIE alerting; Facility_UUIE facility; Progress_UUIE progress; }; } H323_UU_PDU_h323_message_body; typedef struct RequestMessage { /* CHOICE */ enum { eRequestMessage_nonStandard, eRequestMessage_masterSlaveDetermination, eRequestMessage_terminalCapabilitySet, eRequestMessage_openLogicalChannel, eRequestMessage_closeLogicalChannel, eRequestMessage_requestChannelClose, eRequestMessage_multiplexEntrySend, eRequestMessage_requestMultiplexEntry, eRequestMessage_requestMode, eRequestMessage_roundTripDelayRequest, eRequestMessage_maintenanceLoopRequest, eRequestMessage_communicationModeRequest, eRequestMessage_conferenceRequest, eRequestMessage_multilinkRequest, eRequestMessage_logicalChannelRateRequest, } choice; union { OpenLogicalChannel openLogicalChannel; }; } RequestMessage; typedef struct OpenLogicalChannelAck_reverseLogicalChannelParameters_multiplexParameters { /* CHOICE */ enum { eOpenLogicalChannelAck_reverseLogicalChannelParameters_multiplexParameters_h222LogicalChannelParameters, eOpenLogicalChannelAck_reverseLogicalChannelParameters_multiplexParameters_h2250LogicalChannelParameters, } choice; union { H2250LogicalChannelParameters h2250LogicalChannelParameters; }; } OpenLogicalChannelAck_reverseLogicalChannelParameters_multiplexParameters; typedef struct OpenLogicalChannelAck_reverseLogicalChannelParameters { /* SEQUENCE */ enum { eOpenLogicalChannelAck_reverseLogicalChannelParameters_portNumber = (1 << 31), eOpenLogicalChannelAck_reverseLogicalChannelParameters_multiplexParameters = (1 << 30), eOpenLogicalChannelAck_reverseLogicalChannelParameters_replacementFor = (1 << 29), } options; OpenLogicalChannelAck_reverseLogicalChannelParameters_multiplexParameters multiplexParameters; } OpenLogicalChannelAck_reverseLogicalChannelParameters; typedef struct H2250LogicalChannelAckParameters { /* SEQUENCE */ enum { eH2250LogicalChannelAckParameters_nonStandard = (1 << 31), eH2250LogicalChannelAckParameters_sessionID = (1 << 30), eH2250LogicalChannelAckParameters_mediaChannel = (1 << 29), eH2250LogicalChannelAckParameters_mediaControlChannel = (1 << 28), eH2250LogicalChannelAckParameters_dynamicRTPPayloadType = (1 << 27), eH2250LogicalChannelAckParameters_flowControlToZero = (1 << 26), eH2250LogicalChannelAckParameters_portNumber = (1 << 25), } options; H245_TransportAddress mediaChannel; H245_TransportAddress mediaControlChannel; } H2250LogicalChannelAckParameters; typedef struct OpenLogicalChannelAck_forwardMultiplexAckParameters { /* CHOICE */ enum { eOpenLogicalChannelAck_forwardMultiplexAckParameters_h2250LogicalChannelAckParameters, } choice; union { H2250LogicalChannelAckParameters h2250LogicalChannelAckParameters; }; } OpenLogicalChannelAck_forwardMultiplexAckParameters; typedef struct OpenLogicalChannelAck { /* SEQUENCE */ enum { eOpenLogicalChannelAck_reverseLogicalChannelParameters = (1 << 31), eOpenLogicalChannelAck_separateStack = (1 << 30), eOpenLogicalChannelAck_forwardMultiplexAckParameters = (1 << 29), eOpenLogicalChannelAck_encryptionSync = (1 << 28), } options; OpenLogicalChannelAck_reverseLogicalChannelParameters reverseLogicalChannelParameters; NetworkAccessParameters separateStack; OpenLogicalChannelAck_forwardMultiplexAckParameters forwardMultiplexAckParameters; } OpenLogicalChannelAck; typedef struct ResponseMessage { /* CHOICE */ enum { eResponseMessage_nonStandard, eResponseMessage_masterSlaveDeterminationAck, eResponseMessage_masterSlaveDeterminationReject, eResponseMessage_terminalCapabilitySetAck, eResponseMessage_terminalCapabilitySetReject, eResponseMessage_openLogicalChannelAck, eResponseMessage_openLogicalChannelReject, eResponseMessage_closeLogicalChannelAck, eResponseMessage_requestChannelCloseAck, eResponseMessage_requestChannelCloseReject, eResponseMessage_multiplexEntrySendAck, eResponseMessage_multiplexEntrySendReject, eResponseMessage_requestMultiplexEntryAck, eResponseMessage_requestMultiplexEntryReject, eResponseMessage_requestModeAck, eResponseMessage_requestModeReject, eResponseMessage_roundTripDelayResponse, eResponseMessage_maintenanceLoopAck, eResponseMessage_maintenanceLoopReject, eResponseMessage_communicationModeResponse, eResponseMessage_conferenceResponse, eResponseMessage_multilinkResponse, eResponseMessage_logicalChannelRateAcknowledge, eResponseMessage_logicalChannelRateReject, } choice; union { OpenLogicalChannelAck openLogicalChannelAck; }; } ResponseMessage; typedef struct MultimediaSystemControlMessage { /* CHOICE */ enum { eMultimediaSystemControlMessage_request, eMultimediaSystemControlMessage_response, eMultimediaSystemControlMessage_command, eMultimediaSystemControlMessage_indication, } choice; union { RequestMessage request; ResponseMessage response; }; } MultimediaSystemControlMessage; typedef struct H323_UU_PDU_h245Control { /* SEQUENCE OF */ int count; MultimediaSystemControlMessage item[4]; } H323_UU_PDU_h245Control; typedef struct H323_UU_PDU { /* SEQUENCE */ enum { eH323_UU_PDU_nonStandardData = (1 << 31), eH323_UU_PDU_h4501SupplementaryService = (1 << 30), eH323_UU_PDU_h245Tunneling = (1 << 29), eH323_UU_PDU_h245Control = (1 << 28), eH323_UU_PDU_nonStandardControl = (1 << 27), eH323_UU_PDU_callLinkage = (1 << 26), eH323_UU_PDU_tunnelledSignallingMessage = (1 << 25), eH323_UU_PDU_provisionalRespToH245Tunneling = (1 << 24), eH323_UU_PDU_stimulusControl = (1 << 23), eH323_UU_PDU_genericData = (1 << 22), } options; H323_UU_PDU_h323_message_body h323_message_body; H323_UU_PDU_h245Control h245Control; } H323_UU_PDU; typedef struct H323_UserInformation { /* SEQUENCE */ enum { eH323_UserInformation_user_data = (1 << 31), } options; H323_UU_PDU h323_uu_pdu; } H323_UserInformation; typedef struct GatekeeperRequest { /* SEQUENCE */ enum { eGatekeeperRequest_nonStandardData = (1 << 31), eGatekeeperRequest_gatekeeperIdentifier = (1 << 30), eGatekeeperRequest_callServices = (1 << 29), eGatekeeperRequest_endpointAlias = (1 << 28), eGatekeeperRequest_alternateEndpoints = (1 << 27), eGatekeeperRequest_tokens = (1 << 26), eGatekeeperRequest_cryptoTokens = (1 << 25), eGatekeeperRequest_authenticationCapability = (1 << 24), eGatekeeperRequest_algorithmOIDs = (1 << 23), eGatekeeperRequest_integrity = (1 << 22), eGatekeeperRequest_integrityCheckValue = (1 << 21), eGatekeeperRequest_supportsAltGK = (1 << 20), eGatekeeperRequest_featureSet = (1 << 19), eGatekeeperRequest_genericData = (1 << 18), } options; TransportAddress rasAddress; } GatekeeperRequest; typedef struct GatekeeperConfirm { /* SEQUENCE */ enum { eGatekeeperConfirm_nonStandardData = (1 << 31), eGatekeeperConfirm_gatekeeperIdentifier = (1 << 30), eGatekeeperConfirm_alternateGatekeeper = (1 << 29), eGatekeeperConfirm_authenticationMode = (1 << 28), eGatekeeperConfirm_tokens = (1 << 27), eGatekeeperConfirm_cryptoTokens = (1 << 26), eGatekeeperConfirm_algorithmOID = (1 << 25), eGatekeeperConfirm_integrity = (1 << 24), eGatekeeperConfirm_integrityCheckValue = (1 << 23), eGatekeeperConfirm_featureSet = (1 << 22), eGatekeeperConfirm_genericData = (1 << 21), } options; TransportAddress rasAddress; } GatekeeperConfirm; typedef struct RegistrationRequest_callSignalAddress { /* SEQUENCE OF */ int count; TransportAddress item[10]; } RegistrationRequest_callSignalAddress; typedef struct RegistrationRequest_rasAddress { /* SEQUENCE OF */ int count; TransportAddress item[10]; } RegistrationRequest_rasAddress; typedef struct RegistrationRequest { /* SEQUENCE */ enum { eRegistrationRequest_nonStandardData = (1 << 31), eRegistrationRequest_terminalAlias = (1 << 30), eRegistrationRequest_gatekeeperIdentifier = (1 << 29), eRegistrationRequest_alternateEndpoints = (1 << 28), eRegistrationRequest_timeToLive = (1 << 27), eRegistrationRequest_tokens = (1 << 26), eRegistrationRequest_cryptoTokens = (1 << 25), eRegistrationRequest_integrityCheckValue = (1 << 24), eRegistrationRequest_keepAlive = (1 << 23), eRegistrationRequest_endpointIdentifier = (1 << 22), eRegistrationRequest_willSupplyUUIEs = (1 << 21), eRegistrationRequest_maintainConnection = (1 << 20), eRegistrationRequest_alternateTransportAddresses = (1 << 19), eRegistrationRequest_additiveRegistration = (1 << 18), eRegistrationRequest_terminalAliasPattern = (1 << 17), eRegistrationRequest_supportsAltGK = (1 << 16), eRegistrationRequest_usageReportingCapability = (1 << 15), eRegistrationRequest_multipleCalls = (1 << 14), eRegistrationRequest_supportedH248Packages = (1 << 13), eRegistrationRequest_callCreditCapability = (1 << 12), eRegistrationRequest_capacityReportingCapability = (1 << 11), eRegistrationRequest_capacity = (1 << 10), eRegistrationRequest_featureSet = (1 << 9), eRegistrationRequest_genericData = (1 << 8), } options; RegistrationRequest_callSignalAddress callSignalAddress; RegistrationRequest_rasAddress rasAddress; unsigned int timeToLive; } RegistrationRequest; typedef struct RegistrationConfirm_callSignalAddress { /* SEQUENCE OF */ int count; TransportAddress item[10]; } RegistrationConfirm_callSignalAddress; typedef struct RegistrationConfirm { /* SEQUENCE */ enum { eRegistrationConfirm_nonStandardData = (1 << 31), eRegistrationConfirm_terminalAlias = (1 << 30), eRegistrationConfirm_gatekeeperIdentifier = (1 << 29), eRegistrationConfirm_alternateGatekeeper = (1 << 28), eRegistrationConfirm_timeToLive = (1 << 27), eRegistrationConfirm_tokens = (1 << 26), eRegistrationConfirm_cryptoTokens = (1 << 25), eRegistrationConfirm_integrityCheckValue = (1 << 24), eRegistrationConfirm_willRespondToIRR = (1 << 23), eRegistrationConfirm_preGrantedARQ = (1 << 22), eRegistrationConfirm_maintainConnection = (1 << 21), eRegistrationConfirm_serviceControl = (1 << 20), eRegistrationConfirm_supportsAdditiveRegistration = (1 << 19), eRegistrationConfirm_terminalAliasPattern = (1 << 18), eRegistrationConfirm_supportedPrefixes = (1 << 17), eRegistrationConfirm_usageSpec = (1 << 16), eRegistrationConfirm_featureServerAlias = (1 << 15), eRegistrationConfirm_capacityReportingSpec = (1 << 14), eRegistrationConfirm_featureSet = (1 << 13), eRegistrationConfirm_genericData = (1 << 12), } options; RegistrationConfirm_callSignalAddress callSignalAddress; unsigned int timeToLive; } RegistrationConfirm; typedef struct UnregistrationRequest_callSignalAddress { /* SEQUENCE OF */ int count; TransportAddress item[10]; } UnregistrationRequest_callSignalAddress; typedef struct UnregistrationRequest { /* SEQUENCE */ enum { eUnregistrationRequest_endpointAlias = (1 << 31), eUnregistrationRequest_nonStandardData = (1 << 30), eUnregistrationRequest_endpointIdentifier = (1 << 29), eUnregistrationRequest_alternateEndpoints = (1 << 28), eUnregistrationRequest_gatekeeperIdentifier = (1 << 27), eUnregistrationRequest_tokens = (1 << 26), eUnregistrationRequest_cryptoTokens = (1 << 25), eUnregistrationRequest_integrityCheckValue = (1 << 24), eUnregistrationRequest_reason = (1 << 23), eUnregistrationRequest_endpointAliasPattern = (1 << 22), eUnregistrationRequest_supportedPrefixes = (1 << 21), eUnregistrationRequest_alternateGatekeeper = (1 << 20), eUnregistrationRequest_genericData = (1 << 19), } options; UnregistrationRequest_callSignalAddress callSignalAddress; } UnregistrationRequest; typedef struct AdmissionRequest { /* SEQUENCE */ enum { eAdmissionRequest_callModel = (1 << 31), eAdmissionRequest_destinationInfo = (1 << 30), eAdmissionRequest_destCallSignalAddress = (1 << 29), eAdmissionRequest_destExtraCallInfo = (1 << 28), eAdmissionRequest_srcCallSignalAddress = (1 << 27), eAdmissionRequest_nonStandardData = (1 << 26), eAdmissionRequest_callServices = (1 << 25), eAdmissionRequest_canMapAlias = (1 << 24), eAdmissionRequest_callIdentifier = (1 << 23), eAdmissionRequest_srcAlternatives = (1 << 22), eAdmissionRequest_destAlternatives = (1 << 21), eAdmissionRequest_gatekeeperIdentifier = (1 << 20), eAdmissionRequest_tokens = (1 << 19), eAdmissionRequest_cryptoTokens = (1 << 18), eAdmissionRequest_integrityCheckValue = (1 << 17), eAdmissionRequest_transportQOS = (1 << 16), eAdmissionRequest_willSupplyUUIEs = (1 << 15), eAdmissionRequest_callLinkage = (1 << 14), eAdmissionRequest_gatewayDataRate = (1 << 13), eAdmissionRequest_capacity = (1 << 12), eAdmissionRequest_circuitInfo = (1 << 11), eAdmissionRequest_desiredProtocols = (1 << 10), eAdmissionRequest_desiredTunnelledProtocol = (1 << 9), eAdmissionRequest_featureSet = (1 << 8), eAdmissionRequest_genericData = (1 << 7), } options; TransportAddress destCallSignalAddress; TransportAddress srcCallSignalAddress; } AdmissionRequest; typedef struct AdmissionConfirm { /* SEQUENCE */ enum { eAdmissionConfirm_irrFrequency = (1 << 31), eAdmissionConfirm_nonStandardData = (1 << 30), eAdmissionConfirm_destinationInfo = (1 << 29), eAdmissionConfirm_destExtraCallInfo = (1 << 28), eAdmissionConfirm_destinationType = (1 << 27), eAdmissionConfirm_remoteExtensionAddress = (1 << 26), eAdmissionConfirm_alternateEndpoints = (1 << 25), eAdmissionConfirm_tokens = (1 << 24), eAdmissionConfirm_cryptoTokens = (1 << 23), eAdmissionConfirm_integrityCheckValue = (1 << 22), eAdmissionConfirm_transportQOS = (1 << 21), eAdmissionConfirm_willRespondToIRR = (1 << 20), eAdmissionConfirm_uuiesRequested = (1 << 19), eAdmissionConfirm_language = (1 << 18), eAdmissionConfirm_alternateTransportAddresses = (1 << 17), eAdmissionConfirm_useSpecifiedTransport = (1 << 16), eAdmissionConfirm_circuitInfo = (1 << 15), eAdmissionConfirm_usageSpec = (1 << 14), eAdmissionConfirm_supportedProtocols = (1 << 13), eAdmissionConfirm_serviceControl = (1 << 12), eAdmissionConfirm_multipleCalls = (1 << 11), eAdmissionConfirm_featureSet = (1 << 10), eAdmissionConfirm_genericData = (1 << 9), } options; TransportAddress destCallSignalAddress; } AdmissionConfirm; typedef struct LocationRequest { /* SEQUENCE */ enum { eLocationRequest_endpointIdentifier = (1 << 31), eLocationRequest_nonStandardData = (1 << 30), eLocationRequest_sourceInfo = (1 << 29), eLocationRequest_canMapAlias = (1 << 28), eLocationRequest_gatekeeperIdentifier = (1 << 27), eLocationRequest_tokens = (1 << 26), eLocationRequest_cryptoTokens = (1 << 25), eLocationRequest_integrityCheckValue = (1 << 24), eLocationRequest_desiredProtocols = (1 << 23), eLocationRequest_desiredTunnelledProtocol = (1 << 22), eLocationRequest_featureSet = (1 << 21), eLocationRequest_genericData = (1 << 20), eLocationRequest_hopCount = (1 << 19), eLocationRequest_circuitInfo = (1 << 18), } options; TransportAddress replyAddress; } LocationRequest; typedef struct LocationConfirm { /* SEQUENCE */ enum { eLocationConfirm_nonStandardData = (1 << 31), eLocationConfirm_destinationInfo = (1 << 30), eLocationConfirm_destExtraCallInfo = (1 << 29), eLocationConfirm_destinationType = (1 << 28), eLocationConfirm_remoteExtensionAddress = (1 << 27), eLocationConfirm_alternateEndpoints = (1 << 26), eLocationConfirm_tokens = (1 << 25), eLocationConfirm_cryptoTokens = (1 << 24), eLocationConfirm_integrityCheckValue = (1 << 23), eLocationConfirm_alternateTransportAddresses = (1 << 22), eLocationConfirm_supportedProtocols = (1 << 21), eLocationConfirm_multipleCalls = (1 << 20), eLocationConfirm_featureSet = (1 << 19), eLocationConfirm_genericData = (1 << 18), eLocationConfirm_circuitInfo = (1 << 17), eLocationConfirm_serviceControl = (1 << 16), } options; TransportAddress callSignalAddress; TransportAddress rasAddress; } LocationConfirm; typedef struct InfoRequestResponse_callSignalAddress { /* SEQUENCE OF */ int count; TransportAddress item[10]; } InfoRequestResponse_callSignalAddress; typedef struct InfoRequestResponse { /* SEQUENCE */ enum { eInfoRequestResponse_nonStandardData = (1 << 31), eInfoRequestResponse_endpointAlias = (1 << 30), eInfoRequestResponse_perCallInfo = (1 << 29), eInfoRequestResponse_tokens = (1 << 28), eInfoRequestResponse_cryptoTokens = (1 << 27), eInfoRequestResponse_integrityCheckValue = (1 << 26), eInfoRequestResponse_needResponse = (1 << 25), eInfoRequestResponse_capacity = (1 << 24), eInfoRequestResponse_irrStatus = (1 << 23), eInfoRequestResponse_unsolicited = (1 << 22), eInfoRequestResponse_genericData = (1 << 21), } options; TransportAddress rasAddress; InfoRequestResponse_callSignalAddress callSignalAddress; } InfoRequestResponse; typedef struct RasMessage { /* CHOICE */ enum { eRasMessage_gatekeeperRequest, eRasMessage_gatekeeperConfirm, eRasMessage_gatekeeperReject, eRasMessage_registrationRequest, eRasMessage_registrationConfirm, eRasMessage_registrationReject, eRasMessage_unregistrationRequest, eRasMessage_unregistrationConfirm, eRasMessage_unregistrationReject, eRasMessage_admissionRequest, eRasMessage_admissionConfirm, eRasMessage_admissionReject, eRasMessage_bandwidthRequest, eRasMessage_bandwidthConfirm, eRasMessage_bandwidthReject, eRasMessage_disengageRequest, eRasMessage_disengageConfirm, eRasMessage_disengageReject, eRasMessage_locationRequest, eRasMessage_locationConfirm, eRasMessage_locationReject, eRasMessage_infoRequest, eRasMessage_infoRequestResponse, eRasMessage_nonStandardMessage, eRasMessage_unknownMessageResponse, eRasMessage_requestInProgress, eRasMessage_resourcesAvailableIndicate, eRasMessage_resourcesAvailableConfirm, eRasMessage_infoRequestAck, eRasMessage_infoRequestNak, eRasMessage_serviceControlIndication, eRasMessage_serviceControlResponse, } choice; union { GatekeeperRequest gatekeeperRequest; GatekeeperConfirm gatekeeperConfirm; RegistrationRequest registrationRequest; RegistrationConfirm registrationConfirm; UnregistrationRequest unregistrationRequest; AdmissionRequest admissionRequest; AdmissionConfirm admissionConfirm; LocationRequest locationRequest; LocationConfirm locationConfirm; InfoRequestResponse infoRequestResponse; }; } RasMessage; #endif /* _NF_CONNTRACK_H323_TYPES_H */ PK ! � �`, , netfilter/nfnetlink.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NFNETLINK_H #define _NFNETLINK_H #include <linux/netlink.h> #include <linux/capability.h> #include <net/netlink.h> #include <uapi/linux/netfilter/nfnetlink.h> struct nfnl_info { struct net *net; struct sock *sk; const struct nlmsghdr *nlh; const struct nfgenmsg *nfmsg; struct netlink_ext_ack *extack; }; enum nfnl_callback_type { NFNL_CB_UNSPEC = 0, NFNL_CB_MUTEX, NFNL_CB_RCU, NFNL_CB_BATCH, }; struct nfnl_callback { int (*call)(struct sk_buff *skb, const struct nfnl_info *info, const struct nlattr * const cda[]); const struct nla_policy *policy; enum nfnl_callback_type type; __u16 attr_count; }; enum nfnl_abort_action { NFNL_ABORT_NONE = 0, NFNL_ABORT_AUTOLOAD, NFNL_ABORT_VALIDATE, }; struct nfnetlink_subsystem { const char *name; __u8 subsys_id; /* nfnetlink subsystem ID */ __u8 cb_count; /* number of callbacks */ const struct nfnl_callback *cb; /* callback for individual types */ struct module *owner; int (*commit)(struct net *net, struct sk_buff *skb); int (*abort)(struct net *net, struct sk_buff *skb, enum nfnl_abort_action action); bool (*valid_genid)(struct net *net, u32 genid); }; int nfnetlink_subsys_register(const struct nfnetlink_subsystem *n); int nfnetlink_subsys_unregister(const struct nfnetlink_subsystem *n); int nfnetlink_has_listeners(struct net *net, unsigned int group); int nfnetlink_send(struct sk_buff *skb, struct net *net, u32 portid, unsigned int group, int echo, gfp_t flags); int nfnetlink_set_err(struct net *net, u32 portid, u32 group, int error); int nfnetlink_unicast(struct sk_buff *skb, struct net *net, u32 portid); void nfnetlink_broadcast(struct net *net, struct sk_buff *skb, __u32 portid, __u32 group, gfp_t allocation); static inline u16 nfnl_msg_type(u8 subsys, u8 msg_type) { return subsys << 8 | msg_type; } static inline void nfnl_fill_hdr(struct nlmsghdr *nlh, u8 family, u8 version, __be16 res_id) { struct nfgenmsg *nfmsg; nfmsg = nlmsg_data(nlh); nfmsg->nfgen_family = family; nfmsg->version = version; nfmsg->res_id = res_id; } static inline struct nlmsghdr *nfnl_msg_put(struct sk_buff *skb, u32 portid, u32 seq, int type, int flags, u8 family, u8 version, __be16 res_id) { struct nlmsghdr *nlh; nlh = nlmsg_put(skb, portid, seq, type, sizeof(struct nfgenmsg), flags); if (!nlh) return NULL; nfnl_fill_hdr(nlh, family, version, res_id); return nlh; } void nfnl_lock(__u8 subsys_id); void nfnl_unlock(__u8 subsys_id); #ifdef CONFIG_PROVE_LOCKING bool lockdep_nfnl_is_held(__u8 subsys_id); #else static inline bool lockdep_nfnl_is_held(__u8 subsys_id) { return true; } #endif /* CONFIG_PROVE_LOCKING */ #define MODULE_ALIAS_NFNL_SUBSYS(subsys) \ MODULE_ALIAS("nfnetlink-subsys-" __stringify(subsys)) #endif /* _NFNETLINK_H */ PK ! h�+� � netfilter/nf_conntrack_tcp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NF_CONNTRACK_TCP_H #define _NF_CONNTRACK_TCP_H #include <uapi/linux/netfilter/nf_conntrack_tcp.h> struct ip_ct_tcp_state { u_int32_t td_end; /* max of seq + len */ u_int32_t td_maxend; /* max of ack + max(win, 1) */ u_int32_t td_maxwin; /* max(win) */ u_int32_t td_maxack; /* max of ack */ u_int8_t td_scale; /* window scale factor */ u_int8_t flags; /* per direction options */ }; struct ip_ct_tcp { struct ip_ct_tcp_state seen[2]; /* connection parameters per direction */ u_int8_t state; /* state of the connection (enum tcp_conntrack) */ /* For detecting stale connections */ u_int8_t last_dir; /* Direction of the last packet (enum ip_conntrack_dir) */ u_int8_t retrans; /* Number of retransmitted packets */ u_int8_t last_index; /* Index of the last packet */ u_int32_t last_seq; /* Last sequence number seen in dir */ u_int32_t last_ack; /* Last sequence number seen in opposite dir */ u_int32_t last_end; /* Last seq + len */ u_int16_t last_win; /* Last window advertisement seen in dir */ /* For SYN packets while we may be out-of-sync */ u_int8_t last_wscale; /* Last window scaling factor seen */ u_int8_t last_flags; /* Last flags set */ }; #endif /* _NF_CONNTRACK_TCP_H */ PK ! 1�a��; �; netfilter/x_tables.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _X_TABLES_H #define _X_TABLES_H #include <linux/netdevice.h> #include <linux/static_key.h> #include <linux/netfilter.h> #include <uapi/linux/netfilter/x_tables.h> /* Test a struct->invflags and a boolean for inequality */ #define NF_INVF(ptr, flag, boolean) \ ((boolean) ^ !!((ptr)->invflags & (flag))) /** * struct xt_action_param - parameters for matches/targets * * @match: the match extension * @target: the target extension * @matchinfo: per-match data * @targetinfo: per-target data * @state: pointer to hook state this packet came from * @fragoff: packet is a fragment, this is the data offset * @thoff: position of transport header relative to skb->data * * Fields written to by extensions: * * @hotdrop: drop packet if we had inspection problems */ struct xt_action_param { union { const struct xt_match *match; const struct xt_target *target; }; union { const void *matchinfo, *targinfo; }; const struct nf_hook_state *state; unsigned int thoff; u16 fragoff; bool hotdrop; }; static inline struct net *xt_net(const struct xt_action_param *par) { return par->state->net; } static inline struct net_device *xt_in(const struct xt_action_param *par) { return par->state->in; } static inline const char *xt_inname(const struct xt_action_param *par) { return par->state->in->name; } static inline struct net_device *xt_out(const struct xt_action_param *par) { return par->state->out; } static inline const char *xt_outname(const struct xt_action_param *par) { return par->state->out->name; } static inline unsigned int xt_hooknum(const struct xt_action_param *par) { return par->state->hook; } static inline u_int8_t xt_family(const struct xt_action_param *par) { return par->state->pf; } /** * struct xt_mtchk_param - parameters for match extensions' * checkentry functions * * @net: network namespace through which the check was invoked * @table: table the rule is tried to be inserted into * @entryinfo: the family-specific rule data * (struct ipt_ip, ip6t_ip, arpt_arp or (note) ebt_entry) * @match: struct xt_match through which this function was invoked * @matchinfo: per-match data * @hook_mask: via which hooks the new rule is reachable * Other fields as above. */ struct xt_mtchk_param { struct net *net; const char *table; const void *entryinfo; const struct xt_match *match; void *matchinfo; unsigned int hook_mask; u_int8_t family; bool nft_compat; }; /** * struct xt_mdtor_param - match destructor parameters * Fields as above. */ struct xt_mtdtor_param { struct net *net; const struct xt_match *match; void *matchinfo; u_int8_t family; }; /** * struct xt_tgchk_param - parameters for target extensions' * checkentry functions * * @entryinfo: the family-specific rule data * (struct ipt_entry, ip6t_entry, arpt_entry, ebt_entry) * * Other fields see above. */ struct xt_tgchk_param { struct net *net; const char *table; const void *entryinfo; const struct xt_target *target; void *targinfo; unsigned int hook_mask; u_int8_t family; bool nft_compat; }; /* Target destructor parameters */ struct xt_tgdtor_param { struct net *net; const struct xt_target *target; void *targinfo; u_int8_t family; }; struct xt_match { struct list_head list; const char name[XT_EXTENSION_MAXNAMELEN]; u_int8_t revision; /* Return true or false: return FALSE and set *hotdrop = 1 to force immediate packet drop. */ /* Arguments changed since 2.6.9, as this must now handle non-linear skb, using skb_header_pointer and skb_ip_make_writable. */ bool (*match)(const struct sk_buff *skb, struct xt_action_param *); /* Called when user tries to insert an entry of this type. */ int (*checkentry)(const struct xt_mtchk_param *); /* Called when entry of this type deleted. */ void (*destroy)(const struct xt_mtdtor_param *); #ifdef CONFIG_NETFILTER_XTABLES_COMPAT /* Called when userspace align differs from kernel space one */ void (*compat_from_user)(void *dst, const void *src); int (*compat_to_user)(void __user *dst, const void *src); #endif /* Set this to THIS_MODULE if you are a module, otherwise NULL */ struct module *me; const char *table; unsigned int matchsize; unsigned int usersize; #ifdef CONFIG_NETFILTER_XTABLES_COMPAT unsigned int compatsize; #endif unsigned int hooks; unsigned short proto; unsigned short family; }; /* Registration hooks for targets. */ struct xt_target { struct list_head list; const char name[XT_EXTENSION_MAXNAMELEN]; u_int8_t revision; /* Returns verdict. Argument order changed since 2.6.9, as this must now handle non-linear skbs, using skb_copy_bits and skb_ip_make_writable. */ unsigned int (*target)(struct sk_buff *skb, const struct xt_action_param *); /* Called when user tries to insert an entry of this type: hook_mask is a bitmask of hooks from which it can be called. */ /* Should return 0 on success or an error code otherwise (-Exxxx). */ int (*checkentry)(const struct xt_tgchk_param *); /* Called when entry of this type deleted. */ void (*destroy)(const struct xt_tgdtor_param *); #ifdef CONFIG_NETFILTER_XTABLES_COMPAT /* Called when userspace align differs from kernel space one */ void (*compat_from_user)(void *dst, const void *src); int (*compat_to_user)(void __user *dst, const void *src); #endif /* Set this to THIS_MODULE if you are a module, otherwise NULL */ struct module *me; const char *table; unsigned int targetsize; unsigned int usersize; #ifdef CONFIG_NETFILTER_XTABLES_COMPAT unsigned int compatsize; #endif unsigned int hooks; unsigned short proto; unsigned short family; }; /* Furniture shopping... */ struct xt_table { struct list_head list; /* What hooks you will enter on */ unsigned int valid_hooks; /* Man behind the curtain... */ struct xt_table_info *private; /* hook ops that register the table with the netfilter core */ struct nf_hook_ops *ops; /* Set this to THIS_MODULE if you are a module, otherwise NULL */ struct module *me; u_int8_t af; /* address/protocol family */ int priority; /* hook order */ /* A unique name... */ const char name[XT_TABLE_MAXNAMELEN]; }; #include <linux/netfilter_ipv4.h> /* The table itself */ struct xt_table_info { /* Size per table */ unsigned int size; /* Number of entries: FIXME. --RR */ unsigned int number; /* Initial number of entries. Needed for module usage count */ unsigned int initial_entries; /* Entry points and underflows */ unsigned int hook_entry[NF_INET_NUMHOOKS]; unsigned int underflow[NF_INET_NUMHOOKS]; /* * Number of user chains. Since tables cannot have loops, at most * @stacksize jumps (number of user chains) can possibly be made. */ unsigned int stacksize; void ***jumpstack; unsigned char entries[] __aligned(8); }; int xt_register_target(struct xt_target *target); void xt_unregister_target(struct xt_target *target); int xt_register_targets(struct xt_target *target, unsigned int n); void xt_unregister_targets(struct xt_target *target, unsigned int n); int xt_register_match(struct xt_match *target); void xt_unregister_match(struct xt_match *target); int xt_register_matches(struct xt_match *match, unsigned int n); void xt_unregister_matches(struct xt_match *match, unsigned int n); int xt_check_entry_offsets(const void *base, const char *elems, unsigned int target_offset, unsigned int next_offset); int xt_check_table_hooks(const struct xt_table_info *info, unsigned int valid_hooks); unsigned int *xt_alloc_entry_offsets(unsigned int size); bool xt_find_jump_offset(const unsigned int *offsets, unsigned int target, unsigned int size); int xt_check_proc_name(const char *name, unsigned int size); int xt_check_match(struct xt_mtchk_param *, unsigned int size, u16 proto, bool inv_proto); int xt_check_target(struct xt_tgchk_param *, unsigned int size, u16 proto, bool inv_proto); int xt_match_to_user(const struct xt_entry_match *m, struct xt_entry_match __user *u); int xt_target_to_user(const struct xt_entry_target *t, struct xt_entry_target __user *u); int xt_data_to_user(void __user *dst, const void *src, int usersize, int size, int aligned_size); void *xt_copy_counters(sockptr_t arg, unsigned int len, struct xt_counters_info *info); struct xt_counters *xt_counters_alloc(unsigned int counters); struct xt_table *xt_register_table(struct net *net, const struct xt_table *table, struct xt_table_info *bootstrap, struct xt_table_info *newinfo); void *xt_unregister_table(struct xt_table *table); struct xt_table_info *xt_replace_table(struct xt_table *table, unsigned int num_counters, struct xt_table_info *newinfo, int *error); struct xt_match *xt_find_match(u8 af, const char *name, u8 revision); struct xt_match *xt_request_find_match(u8 af, const char *name, u8 revision); struct xt_target *xt_request_find_target(u8 af, const char *name, u8 revision); int xt_find_revision(u8 af, const char *name, u8 revision, int target, int *err); struct xt_table *xt_find_table(struct net *net, u8 af, const char *name); struct xt_table *xt_find_table_lock(struct net *net, u_int8_t af, const char *name); struct xt_table *xt_request_find_table_lock(struct net *net, u_int8_t af, const char *name); void xt_table_unlock(struct xt_table *t); int xt_proto_init(struct net *net, u_int8_t af); void xt_proto_fini(struct net *net, u_int8_t af); struct xt_table_info *xt_alloc_table_info(unsigned int size); void xt_free_table_info(struct xt_table_info *info); /** * xt_recseq - recursive seqcount for netfilter use * * Packet processing changes the seqcount only if no recursion happened * get_counters() can use read_seqcount_begin()/read_seqcount_retry(), * because we use the normal seqcount convention : * Low order bit set to 1 if a writer is active. */ DECLARE_PER_CPU(seqcount_t, xt_recseq); /* xt_tee_enabled - true if x_tables needs to handle reentrancy * * Enabled if current ip(6)tables ruleset has at least one -j TEE rule. */ extern struct static_key xt_tee_enabled; /** * xt_write_recseq_begin - start of a write section * * Begin packet processing : all readers must wait the end * 1) Must be called with preemption disabled * 2) softirqs must be disabled too (or we should use this_cpu_add()) * Returns : * 1 if no recursion on this cpu * 0 if recursion detected */ static inline unsigned int xt_write_recseq_begin(void) { unsigned int addend; /* * Low order bit of sequence is set if we already * called xt_write_recseq_begin(). */ addend = (__this_cpu_read(xt_recseq.sequence) + 1) & 1; /* * This is kind of a write_seqcount_begin(), but addend is 0 or 1 * We dont check addend value to avoid a test and conditional jump, * since addend is most likely 1 */ __this_cpu_add(xt_recseq.sequence, addend); smp_mb(); return addend; } /** * xt_write_recseq_end - end of a write section * @addend: return value from previous xt_write_recseq_begin() * * End packet processing : all readers can proceed * 1) Must be called with preemption disabled * 2) softirqs must be disabled too (or we should use this_cpu_add()) */ static inline void xt_write_recseq_end(unsigned int addend) { /* this is kind of a write_seqcount_end(), but addend is 0 or 1 */ smp_wmb(); __this_cpu_add(xt_recseq.sequence, addend); } /* * This helper is performance critical and must be inlined */ static inline unsigned long ifname_compare_aligned(const char *_a, const char *_b, const char *_mask) { const unsigned long *a = (const unsigned long *)_a; const unsigned long *b = (const unsigned long *)_b; const unsigned long *mask = (const unsigned long *)_mask; unsigned long ret; ret = (a[0] ^ b[0]) & mask[0]; if (IFNAMSIZ > sizeof(unsigned long)) ret |= (a[1] ^ b[1]) & mask[1]; if (IFNAMSIZ > 2 * sizeof(unsigned long)) ret |= (a[2] ^ b[2]) & mask[2]; if (IFNAMSIZ > 3 * sizeof(unsigned long)) ret |= (a[3] ^ b[3]) & mask[3]; BUILD_BUG_ON(IFNAMSIZ > 4 * sizeof(unsigned long)); return ret; } struct xt_percpu_counter_alloc_state { unsigned int off; const char __percpu *mem; }; bool xt_percpu_counter_alloc(struct xt_percpu_counter_alloc_state *state, struct xt_counters *counter); void xt_percpu_counter_free(struct xt_counters *cnt); static inline struct xt_counters * xt_get_this_cpu_counter(struct xt_counters *cnt) { if (nr_cpu_ids > 1) return this_cpu_ptr((void __percpu *) (unsigned long) cnt->pcnt); return cnt; } static inline struct xt_counters * xt_get_per_cpu_counter(struct xt_counters *cnt, unsigned int cpu) { if (nr_cpu_ids > 1) return per_cpu_ptr((void __percpu *) (unsigned long) cnt->pcnt, cpu); return cnt; } struct nf_hook_ops *xt_hook_ops_alloc(const struct xt_table *, nf_hookfn *); int xt_register_template(const struct xt_table *t, int(*table_init)(struct net *net)); void xt_unregister_template(const struct xt_table *t); #ifdef CONFIG_NETFILTER_XTABLES_COMPAT #include <net/compat.h> struct compat_xt_entry_match { union { struct { u_int16_t match_size; char name[XT_FUNCTION_MAXNAMELEN - 1]; u_int8_t revision; } user; struct { u_int16_t match_size; compat_uptr_t match; } kernel; u_int16_t match_size; } u; unsigned char data[]; }; struct compat_xt_entry_target { union { struct { u_int16_t target_size; char name[XT_FUNCTION_MAXNAMELEN - 1]; u_int8_t revision; } user; struct { u_int16_t target_size; compat_uptr_t target; } kernel; u_int16_t target_size; } u; unsigned char data[]; }; /* FIXME: this works only on 32 bit tasks * need to change whole approach in order to calculate align as function of * current task alignment */ struct compat_xt_counters { compat_u64 pcnt, bcnt; /* Packet and byte counters */ }; struct compat_xt_counters_info { char name[XT_TABLE_MAXNAMELEN]; compat_uint_t num_counters; struct compat_xt_counters counters[]; }; struct _compat_xt_align { __u8 u8; __u16 u16; __u32 u32; compat_u64 u64; }; #define COMPAT_XT_ALIGN(s) __ALIGN_KERNEL((s), __alignof__(struct _compat_xt_align)) void xt_compat_lock(u_int8_t af); void xt_compat_unlock(u_int8_t af); int xt_compat_add_offset(u_int8_t af, unsigned int offset, int delta); void xt_compat_flush_offsets(u_int8_t af); int xt_compat_init_offsets(u8 af, unsigned int number); int xt_compat_calc_jump(u_int8_t af, unsigned int offset); int xt_compat_match_offset(const struct xt_match *match); void xt_compat_match_from_user(struct xt_entry_match *m, void **dstptr, unsigned int *size); int xt_compat_match_to_user(const struct xt_entry_match *m, void __user **dstptr, unsigned int *size); int xt_compat_target_offset(const struct xt_target *target); void xt_compat_target_from_user(struct xt_entry_target *t, void **dstptr, unsigned int *size); int xt_compat_target_to_user(const struct xt_entry_target *t, void __user **dstptr, unsigned int *size); int xt_compat_check_entry_offsets(const void *base, const char *elems, unsigned int target_offset, unsigned int next_offset); #endif /* CONFIG_NETFILTER_XTABLES_COMPAT */ #endif /* _X_TABLES_H */ PK ! dꎲ� � posix-clock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * posix-clock.h - support for dynamic clock devices * * Copyright (C) 2010 OMICRON electronics GmbH */ #ifndef _LINUX_POSIX_CLOCK_H_ #define _LINUX_POSIX_CLOCK_H_ #include <linux/cdev.h> #include <linux/fs.h> #include <linux/poll.h> #include <linux/posix-timers.h> #include <linux/rwsem.h> struct posix_clock; struct posix_clock_context; /** * struct posix_clock_operations - functional interface to the clock * * Every posix clock is represented by a character device. Drivers may * optionally offer extended capabilities by implementing the * character device methods. The character device file operations are * first handled by the clock device layer, then passed on to the * driver by calling these functions. * * @owner: The clock driver should set to THIS_MODULE * @clock_adjtime: Adjust the clock * @clock_gettime: Read the current time * @clock_getres: Get the clock resolution * @clock_settime: Set the current time value * @open: Optional character device open method * @release: Optional character device release method * @ioctl: Optional character device ioctl method * @read: Optional character device read method * @poll: Optional character device poll method */ struct posix_clock_operations { struct module *owner; int (*clock_adjtime)(struct posix_clock *pc, struct __kernel_timex *tx); int (*clock_gettime)(struct posix_clock *pc, struct timespec64 *ts); int (*clock_getres) (struct posix_clock *pc, struct timespec64 *ts); int (*clock_settime)(struct posix_clock *pc, const struct timespec64 *ts); /* * Optional character device methods: */ long (*ioctl)(struct posix_clock_context *pccontext, unsigned int cmd, unsigned long arg); int (*open)(struct posix_clock_context *pccontext, fmode_t f_mode); __poll_t (*poll)(struct posix_clock_context *pccontext, struct file *file, poll_table *wait); int (*release)(struct posix_clock_context *pccontext); ssize_t (*read)(struct posix_clock_context *pccontext, uint flags, char __user *buf, size_t cnt); }; /** * struct posix_clock - represents a dynamic posix clock * * @ops: Functional interface to the clock * @cdev: Character device instance for this clock * @dev: Pointer to the clock's device. * @rwsem: Protects the 'zombie' field from concurrent access. * @zombie: If 'zombie' is true, then the hardware has disappeared. * * Drivers should embed their struct posix_clock within a private * structure, obtaining a reference to it during callbacks using * container_of(). * * Drivers should supply an initialized but not exposed struct device * to posix_clock_register(). It is used to manage lifetime of the * driver's private structure. It's 'release' field should be set to * a release function for this private structure. */ struct posix_clock { struct posix_clock_operations ops; struct cdev cdev; struct device *dev; struct rw_semaphore rwsem; bool zombie; }; /** * struct posix_clock_context - represents clock file operations context * * @clk: Pointer to the clock * @fp: Pointer to the file used to open the clock * @private_clkdata: Pointer to user data * * Drivers should use struct posix_clock_context during specific character * device file operation methods to access the posix clock. In particular, * the file pointer can be used to verify correct access mode for ioctl() * calls. * * Drivers can store a private data structure during the open operation * if they have specific information that is required in other file * operations. */ struct posix_clock_context { struct posix_clock *clk; struct file *fp; void *private_clkdata; }; /** * posix_clock_register() - register a new clock * @clk: Pointer to the clock. Caller must provide 'ops' field * @dev: Pointer to the initialized device. Caller must provide * 'release' field * * A clock driver calls this function to register itself with the * clock device subsystem. If 'clk' points to dynamically allocated * memory, then the caller must provide a 'release' function to free * that memory. * * Returns zero on success, non-zero otherwise. */ int posix_clock_register(struct posix_clock *clk, struct device *dev); /** * posix_clock_unregister() - unregister a clock * @clk: Clock instance previously registered via posix_clock_register() * * A clock driver calls this function to remove itself from the clock * device subsystem. The posix_clock itself will remain (in an * inactive state) until its reference count drops to zero, at which * point it will be deallocated with its 'release' method. */ void posix_clock_unregister(struct posix_clock *clk); #endif PK ! ��e1 1 ppp_defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ppp_defs.h - PPP definitions. * * Copyright 1994-2000 Paul Mackerras. */ #ifndef _PPP_DEFS_H_ #define _PPP_DEFS_H_ #include <linux/crc-ccitt.h> #include <uapi/linux/ppp_defs.h> #define PPP_FCS(fcs, c) crc_ccitt_byte(fcs, c) #endif /* _PPP_DEFS_H_ */ PK ! n/3� � poison.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_POISON_H #define _LINUX_POISON_H /********** include/linux/list.h **********/ /* * Architectures might want to move the poison pointer offset * into some well-recognized area such as 0xdead000000000000, * that is also not mappable by user-space exploits: */ #ifdef CONFIG_ILLEGAL_POINTER_VALUE # define POISON_POINTER_DELTA _AC(CONFIG_ILLEGAL_POINTER_VALUE, UL) #else # define POISON_POINTER_DELTA 0 #endif /* * These are non-NULL pointers that will result in page faults * under normal circumstances, used to verify that nobody uses * non-initialized list entries. */ #define LIST_POISON1 ((void *) 0x100 + POISON_POINTER_DELTA) #define LIST_POISON2 ((void *) 0x122 + POISON_POINTER_DELTA) /********** include/linux/timer.h **********/ #define TIMER_ENTRY_STATIC ((void *) 0x300 + POISON_POINTER_DELTA) /********** mm/page_poison.c **********/ #define PAGE_POISON 0xaa /********** mm/page_alloc.c ************/ #define TAIL_MAPPING ((void *) 0x400 + POISON_POINTER_DELTA) /********** mm/slab.c **********/ /* * Magic nums for obj red zoning. * Placed in the first word before and the first word after an obj. */ #define RED_INACTIVE 0x09F911029D74E35BULL /* when obj is inactive */ #define RED_ACTIVE 0xD84156C5635688C0ULL /* when obj is active */ #define SLUB_RED_INACTIVE 0xbb #define SLUB_RED_ACTIVE 0xcc /* ...and for poisoning */ #define POISON_INUSE 0x5a /* for use-uninitialised poisoning */ #define POISON_FREE 0x6b /* for use-after-free poisoning */ #define POISON_END 0xa5 /* end-byte of poisoning */ /********** arch/$ARCH/mm/init.c **********/ #define POISON_FREE_INITMEM 0xcc /********** arch/ia64/hp/common/sba_iommu.c **********/ /* * arch/ia64/hp/common/sba_iommu.c uses a 16-byte poison string with a * value of "SBAIOMMU POISON\0" for spill-over poisoning. */ /********** fs/jbd/journal.c **********/ #define JBD_POISON_FREE 0x5b #define JBD2_POISON_FREE 0x5c /********** drivers/base/dmapool.c **********/ #define POOL_POISON_FREED 0xa7 /* !inuse */ #define POOL_POISON_ALLOCATED 0xa9 /* !initted */ /********** drivers/atm/ **********/ #define ATM_POISON_FREE 0x12 #define ATM_POISON 0xdeadbeef /********** kernel/mutexes **********/ #define MUTEX_DEBUG_INIT 0x11 #define MUTEX_DEBUG_FREE 0x22 #define MUTEX_POISON_WW_CTX ((void *) 0x500 + POISON_POINTER_DELTA) /********** security/ **********/ #define KEY_DESTROY 0xbd /********** net/core/page_pool.c **********/ #define PP_SIGNATURE (0x40 + POISON_POINTER_DELTA) #endif PK ! S����/ �/ debugfs.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * debugfs.h - a tiny little debug file system * * Copyright (C) 2004 Greg Kroah-Hartman <greg@kroah.com> * Copyright (C) 2004 IBM Inc. * * debugfs is for people to use instead of /proc or /sys. * See Documentation/filesystems/ for more details. */ #ifndef _DEBUGFS_H_ #define _DEBUGFS_H_ #include <linux/fs.h> #include <linux/seq_file.h> #include <linux/types.h> #include <linux/compiler.h> struct device; struct file_operations; struct debugfs_blob_wrapper { void *data; unsigned long size; }; struct debugfs_reg32 { char *name; unsigned long offset; }; struct debugfs_regset32 { const struct debugfs_reg32 *regs; int nregs; void __iomem *base; struct device *dev; /* Optional device for Runtime PM */ }; struct debugfs_u32_array { u32 *array; u32 n_elements; }; extern struct dentry *arch_debugfs_dir; #define DEFINE_DEBUGFS_ATTRIBUTE_XSIGNED(__fops, __get, __set, __fmt, __is_signed) \ static int __fops ## _open(struct inode *inode, struct file *file) \ { \ __simple_attr_check_format(__fmt, 0ull); \ return simple_attr_open(inode, file, __get, __set, __fmt); \ } \ static const struct file_operations __fops = { \ .owner = THIS_MODULE, \ .open = __fops ## _open, \ .release = simple_attr_release, \ .read = debugfs_attr_read, \ .write = (__is_signed) ? debugfs_attr_write_signed : debugfs_attr_write, \ .llseek = no_llseek, \ } #define DEFINE_DEBUGFS_ATTRIBUTE(__fops, __get, __set, __fmt) \ DEFINE_DEBUGFS_ATTRIBUTE_XSIGNED(__fops, __get, __set, __fmt, false) #define DEFINE_DEBUGFS_ATTRIBUTE_SIGNED(__fops, __get, __set, __fmt) \ DEFINE_DEBUGFS_ATTRIBUTE_XSIGNED(__fops, __get, __set, __fmt, true) typedef struct vfsmount *(*debugfs_automount_t)(struct dentry *, void *); #if defined(CONFIG_DEBUG_FS) struct dentry *debugfs_lookup(const char *name, struct dentry *parent); struct dentry *debugfs_create_file(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops); struct dentry *debugfs_create_file_unsafe(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops); void debugfs_create_file_size(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops, loff_t file_size); struct dentry *debugfs_create_dir(const char *name, struct dentry *parent); struct dentry *debugfs_create_symlink(const char *name, struct dentry *parent, const char *dest); struct dentry *debugfs_create_automount(const char *name, struct dentry *parent, debugfs_automount_t f, void *data); void debugfs_remove(struct dentry *dentry); #define debugfs_remove_recursive debugfs_remove void debugfs_lookup_and_remove(const char *name, struct dentry *parent); const struct file_operations *debugfs_real_fops(const struct file *filp); int debugfs_file_get(struct dentry *dentry); void debugfs_file_put(struct dentry *dentry); ssize_t debugfs_attr_read(struct file *file, char __user *buf, size_t len, loff_t *ppos); ssize_t debugfs_attr_write(struct file *file, const char __user *buf, size_t len, loff_t *ppos); ssize_t debugfs_attr_write_signed(struct file *file, const char __user *buf, size_t len, loff_t *ppos); struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry, struct dentry *new_dir, const char *new_name); void debugfs_create_u8(const char *name, umode_t mode, struct dentry *parent, u8 *value); void debugfs_create_u16(const char *name, umode_t mode, struct dentry *parent, u16 *value); void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent, u32 *value); void debugfs_create_u64(const char *name, umode_t mode, struct dentry *parent, u64 *value); void debugfs_create_ulong(const char *name, umode_t mode, struct dentry *parent, unsigned long *value); void debugfs_create_x8(const char *name, umode_t mode, struct dentry *parent, u8 *value); void debugfs_create_x16(const char *name, umode_t mode, struct dentry *parent, u16 *value); void debugfs_create_x32(const char *name, umode_t mode, struct dentry *parent, u32 *value); void debugfs_create_x64(const char *name, umode_t mode, struct dentry *parent, u64 *value); void debugfs_create_size_t(const char *name, umode_t mode, struct dentry *parent, size_t *value); void debugfs_create_atomic_t(const char *name, umode_t mode, struct dentry *parent, atomic_t *value); void debugfs_create_bool(const char *name, umode_t mode, struct dentry *parent, bool *value); void debugfs_create_str(const char *name, umode_t mode, struct dentry *parent, char **value); struct dentry *debugfs_create_blob(const char *name, umode_t mode, struct dentry *parent, struct debugfs_blob_wrapper *blob); void debugfs_create_regset32(const char *name, umode_t mode, struct dentry *parent, struct debugfs_regset32 *regset); void debugfs_print_regs32(struct seq_file *s, const struct debugfs_reg32 *regs, int nregs, void __iomem *base, char *prefix); void debugfs_create_u32_array(const char *name, umode_t mode, struct dentry *parent, struct debugfs_u32_array *array); void debugfs_create_devm_seqfile(struct device *dev, const char *name, struct dentry *parent, int (*read_fn)(struct seq_file *s, void *data)); bool debugfs_initialized(void); ssize_t debugfs_read_file_bool(struct file *file, char __user *user_buf, size_t count, loff_t *ppos); ssize_t debugfs_write_file_bool(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos); ssize_t debugfs_read_file_str(struct file *file, char __user *user_buf, size_t count, loff_t *ppos); #else #include <linux/err.h> /* * We do not return NULL from these functions if CONFIG_DEBUG_FS is not enabled * so users have a chance to detect if there was a real error or not. We don't * want to duplicate the design decision mistakes of procfs and devfs again. */ static inline struct dentry *debugfs_lookup(const char *name, struct dentry *parent) { return ERR_PTR(-ENODEV); } static inline struct dentry *debugfs_create_file(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops) { return ERR_PTR(-ENODEV); } static inline struct dentry *debugfs_create_file_unsafe(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops) { return ERR_PTR(-ENODEV); } static inline void debugfs_create_file_size(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops, loff_t file_size) { } static inline struct dentry *debugfs_create_dir(const char *name, struct dentry *parent) { return ERR_PTR(-ENODEV); } static inline struct dentry *debugfs_create_symlink(const char *name, struct dentry *parent, const char *dest) { return ERR_PTR(-ENODEV); } static inline struct dentry *debugfs_create_automount(const char *name, struct dentry *parent, debugfs_automount_t f, void *data) { return ERR_PTR(-ENODEV); } static inline void debugfs_remove(struct dentry *dentry) { } static inline void debugfs_remove_recursive(struct dentry *dentry) { } static inline void debugfs_lookup_and_remove(const char *name, struct dentry *parent) { } const struct file_operations *debugfs_real_fops(const struct file *filp); static inline int debugfs_file_get(struct dentry *dentry) { return 0; } static inline void debugfs_file_put(struct dentry *dentry) { } static inline ssize_t debugfs_attr_read(struct file *file, char __user *buf, size_t len, loff_t *ppos) { return -ENODEV; } static inline ssize_t debugfs_attr_write(struct file *file, const char __user *buf, size_t len, loff_t *ppos) { return -ENODEV; } static inline ssize_t debugfs_attr_write_signed(struct file *file, const char __user *buf, size_t len, loff_t *ppos) { return -ENODEV; } static inline struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry, struct dentry *new_dir, char *new_name) { return ERR_PTR(-ENODEV); } static inline void debugfs_create_u8(const char *name, umode_t mode, struct dentry *parent, u8 *value) { } static inline void debugfs_create_u16(const char *name, umode_t mode, struct dentry *parent, u16 *value) { } static inline void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent, u32 *value) { } static inline void debugfs_create_u64(const char *name, umode_t mode, struct dentry *parent, u64 *value) { } static inline void debugfs_create_ulong(const char *name, umode_t mode, struct dentry *parent, unsigned long *value) { } static inline void debugfs_create_x8(const char *name, umode_t mode, struct dentry *parent, u8 *value) { } static inline void debugfs_create_x16(const char *name, umode_t mode, struct dentry *parent, u16 *value) { } static inline void debugfs_create_x32(const char *name, umode_t mode, struct dentry *parent, u32 *value) { } static inline void debugfs_create_x64(const char *name, umode_t mode, struct dentry *parent, u64 *value) { } static inline void debugfs_create_size_t(const char *name, umode_t mode, struct dentry *parent, size_t *value) { } static inline void debugfs_create_atomic_t(const char *name, umode_t mode, struct dentry *parent, atomic_t *value) { } static inline void debugfs_create_bool(const char *name, umode_t mode, struct dentry *parent, bool *value) { } static inline void debugfs_create_str(const char *name, umode_t mode, struct dentry *parent, char **value) { } static inline struct dentry *debugfs_create_blob(const char *name, umode_t mode, struct dentry *parent, struct debugfs_blob_wrapper *blob) { return ERR_PTR(-ENODEV); } static inline void debugfs_create_regset32(const char *name, umode_t mode, struct dentry *parent, struct debugfs_regset32 *regset) { } static inline void debugfs_print_regs32(struct seq_file *s, const struct debugfs_reg32 *regs, int nregs, void __iomem *base, char *prefix) { } static inline bool debugfs_initialized(void) { return false; } static inline void debugfs_create_u32_array(const char *name, umode_t mode, struct dentry *parent, struct debugfs_u32_array *array) { } static inline void debugfs_create_devm_seqfile(struct device *dev, const char *name, struct dentry *parent, int (*read_fn)(struct seq_file *s, void *data)) { } static inline ssize_t debugfs_read_file_bool(struct file *file, char __user *user_buf, size_t count, loff_t *ppos) { return -ENODEV; } static inline ssize_t debugfs_write_file_bool(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos) { return -ENODEV; } static inline ssize_t debugfs_read_file_str(struct file *file, char __user *user_buf, size_t count, loff_t *ppos) { return -ENODEV; } #endif /** * debugfs_create_xul - create a debugfs file that is used to read and write an * unsigned long value, formatted in hexadecimal * @name: a pointer to a string containing the name of the file to create. * @mode: the permission that the file should have * @parent: a pointer to the parent dentry for this file. This should be a * directory dentry if set. If this parameter is %NULL, then the * file will be created in the root of the debugfs filesystem. * @value: a pointer to the variable that the file should read to and write * from. */ static inline void debugfs_create_xul(const char *name, umode_t mode, struct dentry *parent, unsigned long *value) { if (sizeof(*value) == sizeof(u32)) debugfs_create_x32(name, mode, parent, (u32 *)value); else debugfs_create_x64(name, mode, parent, (u64 *)value); } #endif PK ! �i�| | profile.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PROFILE_H #define _LINUX_PROFILE_H #include <linux/kernel.h> #include <linux/init.h> #include <linux/cpumask.h> #include <linux/cache.h> #include <asm/errno.h> #define CPU_PROFILING 1 #define SCHED_PROFILING 2 #define KVM_PROFILING 4 struct proc_dir_entry; struct notifier_block; #if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS) void create_prof_cpu_mask(void); int create_proc_profile(void); #else static inline void create_prof_cpu_mask(void) { } static inline int create_proc_profile(void) { return 0; } #endif enum profile_type { PROFILE_TASK_EXIT, PROFILE_MUNMAP }; #ifdef CONFIG_PROFILING extern int prof_on __read_mostly; /* init basic kernel profiler */ int profile_init(void); int profile_setup(char *str); void profile_tick(int type); int setup_profiling_timer(unsigned int multiplier); /* * Add multiple profiler hits to a given address: */ void profile_hits(int type, void *ip, unsigned int nr_hits); /* * Single profiler hit: */ static inline void profile_hit(int type, void *ip) { /* * Speedup for the common (no profiling enabled) case: */ if (unlikely(prof_on == type)) profile_hits(type, ip, 1); } struct task_struct; struct mm_struct; /* task is in do_exit() */ void profile_task_exit(struct task_struct * task); /* task is dead, free task struct ? Returns 1 if * the task was taken, 0 if the task should be freed. */ int profile_handoff_task(struct task_struct * task); /* sys_munmap */ void profile_munmap(unsigned long addr); int task_handoff_register(struct notifier_block * n); int task_handoff_unregister(struct notifier_block * n); int profile_event_register(enum profile_type, struct notifier_block * n); int profile_event_unregister(enum profile_type, struct notifier_block * n); #else #define prof_on 0 static inline int profile_init(void) { return 0; } static inline void profile_tick(int type) { return; } static inline void profile_hits(int type, void *ip, unsigned int nr_hits) { return; } static inline void profile_hit(int type, void *ip) { return; } static inline int task_handoff_register(struct notifier_block * n) { return -ENOSYS; } static inline int task_handoff_unregister(struct notifier_block * n) { return -ENOSYS; } static inline int profile_event_register(enum profile_type t, struct notifier_block * n) { return -ENOSYS; } static inline int profile_event_unregister(enum profile_type t, struct notifier_block * n) { return -ENOSYS; } #define profile_task_exit(a) do { } while (0) #define profile_handoff_task(a) (0) #define profile_munmap(a) do { } while (0) #endif /* CONFIG_PROFILING */ #endif /* _LINUX_PROFILE_H */ PK ! 7 �� � pmu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for talking to the PMU. The PMU is a microcontroller * which controls battery charging and system power on PowerBook 3400 * and 2400 models as well as the RTC and various other things. * * Copyright (C) 1998 Paul Mackerras. */ #ifndef _LINUX_PMU_H #define _LINUX_PMU_H #include <linux/rtc.h> #include <uapi/linux/pmu.h> extern int find_via_pmu(void); extern int pmu_request(struct adb_request *req, void (*done)(struct adb_request *), int nbytes, ...); extern int pmu_queue_request(struct adb_request *req); extern void pmu_poll(void); extern void pmu_poll_adb(void); /* For use by xmon */ extern void pmu_wait_complete(struct adb_request *req); /* For use before switching interrupts off for a long time; * warning: not stackable */ #if defined(CONFIG_ADB_PMU) extern void pmu_suspend(void); extern void pmu_resume(void); #else static inline void pmu_suspend(void) {} static inline void pmu_resume(void) {} #endif extern void pmu_enable_irled(int on); extern time64_t pmu_get_time(void); extern int pmu_set_rtc_time(struct rtc_time *tm); extern void pmu_restart(void); extern void pmu_shutdown(void); extern void pmu_unlock(void); extern int pmu_present(void); extern int pmu_get_model(void); extern void pmu_backlight_set_sleep(int sleep); #define PMU_MAX_BATTERIES 2 /* values for pmu_power_flags */ #define PMU_PWR_AC_PRESENT 0x00000001 /* values for pmu_battery_info.flags */ #define PMU_BATT_PRESENT 0x00000001 #define PMU_BATT_CHARGING 0x00000002 #define PMU_BATT_TYPE_MASK 0x000000f0 #define PMU_BATT_TYPE_SMART 0x00000010 /* Smart battery */ #define PMU_BATT_TYPE_HOOPER 0x00000020 /* 3400/3500 */ #define PMU_BATT_TYPE_COMET 0x00000030 /* 2400 */ struct pmu_battery_info { unsigned int flags; unsigned int charge; /* current charge */ unsigned int max_charge; /* maximum charge */ signed int amperage; /* current, positive if charging */ unsigned int voltage; /* voltage */ unsigned int time_remaining; /* remaining time */ }; extern int pmu_battery_count; extern struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; extern unsigned int pmu_power_flags; /* Backlight */ extern void pmu_backlight_init(void); /* some code needs to know if the PMU was suspended for hibernation */ #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) extern int pmu_sys_suspended; #else /* if power management is not configured it can't be suspended */ #define pmu_sys_suspended 0 #endif #endif /* _LINUX_PMU_H */ PK ! �(� � thread_info.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* thread_info.h: common low-level thread information accessors * * Copyright (C) 2002 David Howells (dhowells@redhat.com) * - Incorporating suggestions made by Linus Torvalds */ #ifndef _LINUX_THREAD_INFO_H #define _LINUX_THREAD_INFO_H #include <linux/types.h> #include <linux/limits.h> #include <linux/bug.h> #include <linux/restart_block.h> #include <linux/errno.h> #ifdef CONFIG_THREAD_INFO_IN_TASK /* * For CONFIG_THREAD_INFO_IN_TASK kernels we need <asm/current.h> for the * definition of current, but for !CONFIG_THREAD_INFO_IN_TASK kernels, * including <asm/current.h> can cause a circular dependency on some platforms. */ #include <asm/current.h> #define current_thread_info() ((struct thread_info *)current) #endif #include <linux/bitops.h> /* * For per-arch arch_within_stack_frames() implementations, defined in * asm/thread_info.h. */ enum { BAD_STACK = -1, NOT_STACK = 0, GOOD_FRAME, GOOD_STACK, }; #ifdef CONFIG_GENERIC_ENTRY enum syscall_work_bit { SYSCALL_WORK_BIT_SECCOMP, SYSCALL_WORK_BIT_SYSCALL_TRACEPOINT, SYSCALL_WORK_BIT_SYSCALL_TRACE, SYSCALL_WORK_BIT_SYSCALL_EMU, SYSCALL_WORK_BIT_SYSCALL_AUDIT, SYSCALL_WORK_BIT_SYSCALL_USER_DISPATCH, SYSCALL_WORK_BIT_SYSCALL_EXIT_TRAP, }; #define SYSCALL_WORK_SECCOMP BIT(SYSCALL_WORK_BIT_SECCOMP) #define SYSCALL_WORK_SYSCALL_TRACEPOINT BIT(SYSCALL_WORK_BIT_SYSCALL_TRACEPOINT) #define SYSCALL_WORK_SYSCALL_TRACE BIT(SYSCALL_WORK_BIT_SYSCALL_TRACE) #define SYSCALL_WORK_SYSCALL_EMU BIT(SYSCALL_WORK_BIT_SYSCALL_EMU) #define SYSCALL_WORK_SYSCALL_AUDIT BIT(SYSCALL_WORK_BIT_SYSCALL_AUDIT) #define SYSCALL_WORK_SYSCALL_USER_DISPATCH BIT(SYSCALL_WORK_BIT_SYSCALL_USER_DISPATCH) #define SYSCALL_WORK_SYSCALL_EXIT_TRAP BIT(SYSCALL_WORK_BIT_SYSCALL_EXIT_TRAP) #endif #include <asm/thread_info.h> #ifdef __KERNEL__ #ifndef arch_set_restart_data #define arch_set_restart_data(restart) do { } while (0) #endif static inline long set_restart_fn(struct restart_block *restart, long (*fn)(struct restart_block *)) { restart->fn = fn; arch_set_restart_data(restart); return -ERESTART_RESTARTBLOCK; } #ifndef THREAD_ALIGN #define THREAD_ALIGN THREAD_SIZE #endif #define THREADINFO_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO) /* * flag set/clear/test wrappers * - pass TIF_xxxx constants to these functions */ static inline void set_ti_thread_flag(struct thread_info *ti, int flag) { set_bit(flag, (unsigned long *)&ti->flags); } static inline void clear_ti_thread_flag(struct thread_info *ti, int flag) { clear_bit(flag, (unsigned long *)&ti->flags); } static inline void update_ti_thread_flag(struct thread_info *ti, int flag, bool value) { if (value) set_ti_thread_flag(ti, flag); else clear_ti_thread_flag(ti, flag); } static inline int test_and_set_ti_thread_flag(struct thread_info *ti, int flag) { return test_and_set_bit(flag, (unsigned long *)&ti->flags); } static inline int test_and_clear_ti_thread_flag(struct thread_info *ti, int flag) { return test_and_clear_bit(flag, (unsigned long *)&ti->flags); } static inline int test_ti_thread_flag(struct thread_info *ti, int flag) { return test_bit(flag, (unsigned long *)&ti->flags); } /* * This may be used in noinstr code, and needs to be __always_inline to prevent * inadvertent instrumentation. */ static __always_inline unsigned long read_ti_thread_flags(struct thread_info *ti) { return READ_ONCE(ti->flags); } #define set_thread_flag(flag) \ set_ti_thread_flag(current_thread_info(), flag) #define clear_thread_flag(flag) \ clear_ti_thread_flag(current_thread_info(), flag) #define update_thread_flag(flag, value) \ update_ti_thread_flag(current_thread_info(), flag, value) #define test_and_set_thread_flag(flag) \ test_and_set_ti_thread_flag(current_thread_info(), flag) #define test_and_clear_thread_flag(flag) \ test_and_clear_ti_thread_flag(current_thread_info(), flag) #define test_thread_flag(flag) \ test_ti_thread_flag(current_thread_info(), flag) #define read_thread_flags() \ read_ti_thread_flags(current_thread_info()) #define read_task_thread_flags(t) \ read_ti_thread_flags(task_thread_info(t)) #ifdef CONFIG_GENERIC_ENTRY #define set_syscall_work(fl) \ set_bit(SYSCALL_WORK_BIT_##fl, ¤t_thread_info()->syscall_work) #define test_syscall_work(fl) \ test_bit(SYSCALL_WORK_BIT_##fl, ¤t_thread_info()->syscall_work) #define clear_syscall_work(fl) \ clear_bit(SYSCALL_WORK_BIT_##fl, ¤t_thread_info()->syscall_work) #define set_task_syscall_work(t, fl) \ set_bit(SYSCALL_WORK_BIT_##fl, &task_thread_info(t)->syscall_work) #define test_task_syscall_work(t, fl) \ test_bit(SYSCALL_WORK_BIT_##fl, &task_thread_info(t)->syscall_work) #define clear_task_syscall_work(t, fl) \ clear_bit(SYSCALL_WORK_BIT_##fl, &task_thread_info(t)->syscall_work) #else /* CONFIG_GENERIC_ENTRY */ #define set_syscall_work(fl) \ set_ti_thread_flag(current_thread_info(), TIF_##fl) #define test_syscall_work(fl) \ test_ti_thread_flag(current_thread_info(), TIF_##fl) #define clear_syscall_work(fl) \ clear_ti_thread_flag(current_thread_info(), TIF_##fl) #define set_task_syscall_work(t, fl) \ set_ti_thread_flag(task_thread_info(t), TIF_##fl) #define test_task_syscall_work(t, fl) \ test_ti_thread_flag(task_thread_info(t), TIF_##fl) #define clear_task_syscall_work(t, fl) \ clear_ti_thread_flag(task_thread_info(t), TIF_##fl) #endif /* !CONFIG_GENERIC_ENTRY */ #define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) #ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES static inline int arch_within_stack_frames(const void * const stack, const void * const stackend, const void *obj, unsigned long len) { return 0; } #endif #ifdef CONFIG_HARDENED_USERCOPY extern void __check_object_size(const void *ptr, unsigned long n, bool to_user); static __always_inline void check_object_size(const void *ptr, unsigned long n, bool to_user) { if (!__builtin_constant_p(n)) __check_object_size(ptr, n, to_user); } #else static inline void check_object_size(const void *ptr, unsigned long n, bool to_user) { } #endif /* CONFIG_HARDENED_USERCOPY */ extern void __compiletime_error("copy source size is too small") __bad_copy_from(void); extern void __compiletime_error("copy destination size is too small") __bad_copy_to(void); static inline void copy_overflow(int size, unsigned long count) { WARN(1, "Buffer overflow detected (%d < %lu)!\n", size, count); } static __always_inline __must_check bool check_copy_size(const void *addr, size_t bytes, bool is_source) { int sz = __compiletime_object_size(addr); if (unlikely(sz >= 0 && sz < bytes)) { if (!__builtin_constant_p(bytes)) copy_overflow(sz, bytes); else if (is_source) __bad_copy_from(); else __bad_copy_to(); return false; } if (WARN_ON_ONCE(bytes > INT_MAX)) return false; check_object_size(addr, bytes, is_source); return true; } #ifndef arch_setup_new_exec static inline void arch_setup_new_exec(void) { } #endif #endif /* __KERNEL__ */ #endif /* _LINUX_THREAD_INFO_H */ PK ! ��L�J J of_gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * OF helpers for the GPIO API * * Copyright (c) 2007-2008 MontaVista Software, Inc. * * Author: Anton Vorontsov <avorontsov@ru.mvista.com> */ #ifndef __LINUX_OF_GPIO_H #define __LINUX_OF_GPIO_H #include <linux/compiler.h> #include <linux/gpio/driver.h> #include <linux/gpio.h> /* FIXME: Shouldn't be here */ #include <linux/of.h> struct device_node; /* * This is Linux-specific flags. By default controllers' and Linux' mapping * match, but GPIO controllers are free to translate their own flags to * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended. */ enum of_gpio_flags { OF_GPIO_ACTIVE_LOW = 0x1, OF_GPIO_SINGLE_ENDED = 0x2, OF_GPIO_OPEN_DRAIN = 0x4, OF_GPIO_TRANSITORY = 0x8, OF_GPIO_PULL_UP = 0x10, OF_GPIO_PULL_DOWN = 0x20, }; #ifdef CONFIG_OF_GPIO #include <linux/kernel.h> /* * OF GPIO chip for memory mapped banks */ struct of_mm_gpio_chip { struct gpio_chip gc; void (*save_regs)(struct of_mm_gpio_chip *mm_gc); void __iomem *regs; }; static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc) { return container_of(gc, struct of_mm_gpio_chip, gc); } extern int of_get_named_gpio_flags(const struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags); extern int of_mm_gpiochip_add_data(struct device_node *np, struct of_mm_gpio_chip *mm_gc, void *data); static inline int of_mm_gpiochip_add(struct device_node *np, struct of_mm_gpio_chip *mm_gc) { return of_mm_gpiochip_add_data(np, mm_gc, NULL); } extern void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc); #else /* CONFIG_OF_GPIO */ #include <linux/errno.h> /* Drivers may not strictly depend on the GPIO support, so let them link. */ static inline int of_get_named_gpio_flags(const struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags) { if (flags) *flags = 0; return -ENOSYS; } #endif /* CONFIG_OF_GPIO */ /** * of_gpio_named_count() - Count GPIOs for a device * @np: device node to count GPIOs for * @propname: property name containing gpio specifier(s) * * The function returns the count of GPIOs specified for a node. * Note that the empty GPIO specifiers count too. Returns either * Number of gpios defined in property, * -EINVAL for an incorrectly formed gpios property, or * -ENOENT for a missing gpios property * * Example: * gpios = <0 * &gpio1 1 2 * 0 * &gpio2 3 4>; * * The above example defines four GPIOs, two of which are not specified. * This function will return '4' */ static inline int of_gpio_named_count(const struct device_node *np, const char *propname) { return of_count_phandle_with_args(np, propname, "#gpio-cells"); } /** * of_gpio_count() - Count GPIOs for a device * @np: device node to count GPIOs for * * Same as of_gpio_named_count, but hard coded to use the 'gpios' property */ static inline int of_gpio_count(const struct device_node *np) { return of_gpio_named_count(np, "gpios"); } static inline int of_get_gpio_flags(const struct device_node *np, int index, enum of_gpio_flags *flags) { return of_get_named_gpio_flags(np, "gpios", index, flags); } /** * of_get_named_gpio() - Get a GPIO number to use with GPIO API * @np: device node to get GPIO from * @propname: Name of property containing gpio specifier(s) * @index: index of the GPIO * * Returns GPIO number to use with Linux generic GPIO API, or one of the errno * value on the error condition. */ static inline int of_get_named_gpio(const struct device_node *np, const char *propname, int index) { return of_get_named_gpio_flags(np, propname, index, NULL); } /** * of_get_gpio() - Get a GPIO number to use with GPIO API * @np: device node to get GPIO from * @index: index of the GPIO * * Returns GPIO number to use with Linux generic GPIO API, or one of the errno * value on the error condition. */ static inline int of_get_gpio(const struct device_node *np, int index) { return of_get_gpio_flags(np, index, NULL); } #endif /* __LINUX_OF_GPIO_H */ PK ! �,G�! �! configfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * configfs.h - definitions for the device driver filesystem * * Based on sysfs: * sysfs is Copyright (C) 2001, 2002, 2003 Patrick Mochel * * Based on kobject.h: * Copyright (c) 2002-2003 Patrick Mochel * Copyright (c) 2002-2003 Open Source Development Labs * * configfs Copyright (C) 2005 Oracle. All rights reserved. * * Please read Documentation/filesystems/configfs.rst before using * the configfs interface, ESPECIALLY the parts about reference counts and * item destructors. */ #ifndef _CONFIGFS_H_ #define _CONFIGFS_H_ #include <linux/stat.h> /* S_IRUGO */ #include <linux/types.h> /* ssize_t */ #include <linux/list.h> /* struct list_head */ #include <linux/kref.h> /* struct kref */ #include <linux/mutex.h> /* struct mutex */ #define CONFIGFS_ITEM_NAME_LEN 20 struct module; struct configfs_item_operations; struct configfs_group_operations; struct configfs_attribute; struct configfs_bin_attribute; struct configfs_subsystem; struct config_item { char *ci_name; char ci_namebuf[CONFIGFS_ITEM_NAME_LEN]; struct kref ci_kref; struct list_head ci_entry; struct config_item *ci_parent; struct config_group *ci_group; const struct config_item_type *ci_type; struct dentry *ci_dentry; }; extern __printf(2, 3) int config_item_set_name(struct config_item *, const char *, ...); static inline char *config_item_name(struct config_item * item) { return item->ci_name; } extern void config_item_init_type_name(struct config_item *item, const char *name, const struct config_item_type *type); extern struct config_item *config_item_get(struct config_item *); extern struct config_item *config_item_get_unless_zero(struct config_item *); extern void config_item_put(struct config_item *); struct config_item_type { struct module *ct_owner; struct configfs_item_operations *ct_item_ops; struct configfs_group_operations *ct_group_ops; struct configfs_attribute **ct_attrs; struct configfs_bin_attribute **ct_bin_attrs; }; /** * group - a group of config_items of a specific type, belonging * to a specific subsystem. */ struct config_group { struct config_item cg_item; struct list_head cg_children; struct configfs_subsystem *cg_subsys; struct list_head default_groups; struct list_head group_entry; }; extern void config_group_init(struct config_group *group); extern void config_group_init_type_name(struct config_group *group, const char *name, const struct config_item_type *type); static inline struct config_group *to_config_group(struct config_item *item) { return item ? container_of(item,struct config_group,cg_item) : NULL; } static inline struct config_group *config_group_get(struct config_group *group) { return group ? to_config_group(config_item_get(&group->cg_item)) : NULL; } static inline void config_group_put(struct config_group *group) { config_item_put(&group->cg_item); } extern struct config_item *config_group_find_item(struct config_group *, const char *); static inline void configfs_add_default_group(struct config_group *new_group, struct config_group *group) { list_add_tail(&new_group->group_entry, &group->default_groups); } struct configfs_attribute { const char *ca_name; struct module *ca_owner; umode_t ca_mode; ssize_t (*show)(struct config_item *, char *); ssize_t (*store)(struct config_item *, const char *, size_t); }; #define CONFIGFS_ATTR(_pfx, _name) \ static struct configfs_attribute _pfx##attr_##_name = { \ .ca_name = __stringify(_name), \ .ca_mode = S_IRUGO | S_IWUSR, \ .ca_owner = THIS_MODULE, \ .show = _pfx##_name##_show, \ .store = _pfx##_name##_store, \ } #define CONFIGFS_ATTR_RO(_pfx, _name) \ static struct configfs_attribute _pfx##attr_##_name = { \ .ca_name = __stringify(_name), \ .ca_mode = S_IRUGO, \ .ca_owner = THIS_MODULE, \ .show = _pfx##_name##_show, \ } #define CONFIGFS_ATTR_WO(_pfx, _name) \ static struct configfs_attribute _pfx##attr_##_name = { \ .ca_name = __stringify(_name), \ .ca_mode = S_IWUSR, \ .ca_owner = THIS_MODULE, \ .store = _pfx##_name##_store, \ } struct file; struct vm_area_struct; struct configfs_bin_attribute { struct configfs_attribute cb_attr; /* std. attribute */ void *cb_private; /* for user */ size_t cb_max_size; /* max core size */ ssize_t (*read)(struct config_item *, void *, size_t); ssize_t (*write)(struct config_item *, const void *, size_t); }; #define CONFIGFS_BIN_ATTR(_pfx, _name, _priv, _maxsz) \ static struct configfs_bin_attribute _pfx##attr_##_name = { \ .cb_attr = { \ .ca_name = __stringify(_name), \ .ca_mode = S_IRUGO | S_IWUSR, \ .ca_owner = THIS_MODULE, \ }, \ .cb_private = _priv, \ .cb_max_size = _maxsz, \ .read = _pfx##_name##_read, \ .write = _pfx##_name##_write, \ } #define CONFIGFS_BIN_ATTR_RO(_pfx, _name, _priv, _maxsz) \ static struct configfs_bin_attribute _pfx##attr_##_name = { \ .cb_attr = { \ .ca_name = __stringify(_name), \ .ca_mode = S_IRUGO, \ .ca_owner = THIS_MODULE, \ }, \ .cb_private = _priv, \ .cb_max_size = _maxsz, \ .read = _pfx##_name##_read, \ } #define CONFIGFS_BIN_ATTR_WO(_pfx, _name, _priv, _maxsz) \ static struct configfs_bin_attribute _pfx##attr_##_name = { \ .cb_attr = { \ .ca_name = __stringify(_name), \ .ca_mode = S_IWUSR, \ .ca_owner = THIS_MODULE, \ }, \ .cb_private = _priv, \ .cb_max_size = _maxsz, \ .write = _pfx##_name##_write, \ } /* * If allow_link() exists, the item can symlink(2) out to other * items. If the item is a group, it may support mkdir(2). * Groups supply one of make_group() and make_item(). If the * group supports make_group(), one can create group children. If it * supports make_item(), one can create config_item children. make_group() * and make_item() return ERR_PTR() on errors. If it has * default_groups on group->default_groups, it has automatically created * group children. default_groups may coexist alongsize make_group() or * make_item(), but if the group wishes to have only default_groups * children (disallowing mkdir(2)), it need not provide either function. * If the group has commit(), it supports pending and committed (active) * items. */ struct configfs_item_operations { void (*release)(struct config_item *); int (*allow_link)(struct config_item *src, struct config_item *target); void (*drop_link)(struct config_item *src, struct config_item *target); }; struct configfs_group_operations { struct config_item *(*make_item)(struct config_group *group, const char *name); struct config_group *(*make_group)(struct config_group *group, const char *name); int (*commit_item)(struct config_item *item); void (*disconnect_notify)(struct config_group *group, struct config_item *item); void (*drop_item)(struct config_group *group, struct config_item *item); }; struct configfs_subsystem { struct config_group su_group; struct mutex su_mutex; }; static inline struct configfs_subsystem *to_configfs_subsystem(struct config_group *group) { return group ? container_of(group, struct configfs_subsystem, su_group) : NULL; } int configfs_register_subsystem(struct configfs_subsystem *subsys); void configfs_unregister_subsystem(struct configfs_subsystem *subsys); int configfs_register_group(struct config_group *parent_group, struct config_group *group); void configfs_unregister_group(struct config_group *group); void configfs_remove_default_groups(struct config_group *group); struct config_group * configfs_register_default_group(struct config_group *parent_group, const char *name, const struct config_item_type *item_type); void configfs_unregister_default_group(struct config_group *group); /* These functions can sleep and can alloc with GFP_KERNEL */ /* WARNING: These cannot be called underneath configfs callbacks!! */ int configfs_depend_item(struct configfs_subsystem *subsys, struct config_item *target); void configfs_undepend_item(struct config_item *target); /* * These functions can sleep and can alloc with GFP_KERNEL * NOTE: These should be called only underneath configfs callbacks. * NOTE: First parameter is a caller's subsystem, not target's. * WARNING: These cannot be called on newly created item * (in make_group()/make_item() callback) */ int configfs_depend_item_unlocked(struct configfs_subsystem *caller_subsys, struct config_item *target); static inline void configfs_undepend_item_unlocked(struct config_item *target) { configfs_undepend_item(target); } #endif /* _CONFIGFS_H_ */ PK ! +��� � sonet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* sonet.h - SONET/SHD physical layer control */ #ifndef LINUX_SONET_H #define LINUX_SONET_H #include <linux/atomic.h> #include <uapi/linux/sonet.h> struct k_sonet_stats { #define __HANDLE_ITEM(i) atomic_t i __SONET_ITEMS #undef __HANDLE_ITEM }; extern void sonet_copy_stats(struct k_sonet_stats *from,struct sonet_stats *to); extern void sonet_subtract_stats(struct k_sonet_stats *from, struct sonet_stats *to); #endif PK ! �ۜ9� � eisa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_EISA_H #define _LINUX_EISA_H #include <linux/ioport.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #define EISA_MAX_SLOTS 8 #define EISA_MAX_RESOURCES 4 /* A few EISA constants/offsets... */ #define EISA_DMA1_STATUS 8 #define EISA_INT1_CTRL 0x20 #define EISA_INT1_MASK 0x21 #define EISA_INT2_CTRL 0xA0 #define EISA_INT2_MASK 0xA1 #define EISA_DMA2_STATUS 0xD0 #define EISA_DMA2_WRITE_SINGLE 0xD4 #define EISA_EXT_NMI_RESET_CTRL 0x461 #define EISA_INT1_EDGE_LEVEL 0x4D0 #define EISA_INT2_EDGE_LEVEL 0x4D1 #define EISA_VENDOR_ID_OFFSET 0xC80 #define EISA_CONFIG_OFFSET 0xC84 #define EISA_CONFIG_ENABLED 1 #define EISA_CONFIG_FORCED 2 /* There is not much we can say about an EISA device, apart from * signature, slot number, and base address. dma_mask is set by * default to parent device mask..*/ struct eisa_device { struct eisa_device_id id; int slot; int state; unsigned long base_addr; struct resource res[EISA_MAX_RESOURCES]; u64 dma_mask; struct device dev; /* generic device */ #ifdef CONFIG_EISA_NAMES char pretty_name[50]; #endif }; #define to_eisa_device(n) container_of(n, struct eisa_device, dev) static inline int eisa_get_region_index (void *addr) { unsigned long x = (unsigned long) addr; x &= 0xc00; return (x >> 12); } struct eisa_driver { const struct eisa_device_id *id_table; struct device_driver driver; }; #define to_eisa_driver(drv) container_of(drv,struct eisa_driver, driver) /* These external functions are only available when EISA support is enabled. */ #ifdef CONFIG_EISA extern struct bus_type eisa_bus_type; int eisa_driver_register (struct eisa_driver *edrv); void eisa_driver_unregister (struct eisa_driver *edrv); #else /* !CONFIG_EISA */ static inline int eisa_driver_register (struct eisa_driver *edrv) { return 0; } static inline void eisa_driver_unregister (struct eisa_driver *edrv) { } #endif /* !CONFIG_EISA */ /* Mimics pci.h... */ static inline void *eisa_get_drvdata (struct eisa_device *edev) { return dev_get_drvdata(&edev->dev); } static inline void eisa_set_drvdata (struct eisa_device *edev, void *data) { dev_set_drvdata(&edev->dev, data); } /* The EISA root device. There's rumours about machines with multiple * busses (PA-RISC ?), so we try to handle that. */ struct eisa_root_device { struct device *dev; /* Pointer to bridge device */ struct resource *res; unsigned long bus_base_addr; int slots; /* Max slot number */ int force_probe; /* Probe even when no slot 0 */ u64 dma_mask; /* from bridge device */ int bus_nr; /* Set by eisa_root_register */ struct resource eisa_root_res; /* ditto */ }; int eisa_root_register (struct eisa_root_device *root); #ifdef CONFIG_EISA extern int EISA_bus; #else # define EISA_bus 0 #endif #endif PK ! ����% % mtio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MTIO_COMPAT_H #define _LINUX_MTIO_COMPAT_H #include <linux/compat.h> #include <uapi/linux/mtio.h> #include <linux/uaccess.h> /* * helper functions for implementing compat ioctls on the four tape * drivers: we define the 32-bit layout of each incompatible structure, * plus a wrapper function to copy it to user space in either format. */ struct mtget32 { s32 mt_type; s32 mt_resid; s32 mt_dsreg; s32 mt_gstat; s32 mt_erreg; s32 mt_fileno; s32 mt_blkno; }; #define MTIOCGET32 _IOR('m', 2, struct mtget32) struct mtpos32 { s32 mt_blkno; }; #define MTIOCPOS32 _IOR('m', 3, struct mtpos32) static inline int put_user_mtget(void __user *u, struct mtget *k) { struct mtget32 k32 = { .mt_type = k->mt_type, .mt_resid = k->mt_resid, .mt_dsreg = k->mt_dsreg, .mt_gstat = k->mt_gstat, .mt_erreg = k->mt_erreg, .mt_fileno = k->mt_fileno, .mt_blkno = k->mt_blkno, }; int ret; if (in_compat_syscall()) ret = copy_to_user(u, &k32, sizeof(k32)); else ret = copy_to_user(u, k, sizeof(*k)); return ret ? -EFAULT : 0; } static inline int put_user_mtpos(void __user *u, struct mtpos *k) { if (in_compat_syscall()) return put_user(k->mt_blkno, (u32 __user *)u); else return put_user(k->mt_blkno, (long __user *)u); } #endif PK ! �K�S S irqchip.hnu �[��� /* * Copyright (C) 2012 Thomas Petazzoni * * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef _LINUX_IRQCHIP_H #define _LINUX_IRQCHIP_H #include <linux/acpi.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> /* * This macro must be used by the different irqchip drivers to declare * the association between their DT compatible string and their * initialization function. * * @name: name that must be unique across all IRQCHIP_DECLARE of the * same file. * @compstr: compatible string of the irqchip driver * @fn: initialization function */ #define IRQCHIP_DECLARE(name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn) extern int platform_irqchip_probe(struct platform_device *pdev); #define IRQCHIP_PLATFORM_DRIVER_BEGIN(drv_name) \ static const struct of_device_id drv_name##_irqchip_match_table[] = { #define IRQCHIP_MATCH(compat, fn) { .compatible = compat, .data = fn }, #define IRQCHIP_PLATFORM_DRIVER_END(drv_name) \ {}, \ }; \ MODULE_DEVICE_TABLE(of, drv_name##_irqchip_match_table); \ static struct platform_driver drv_name##_driver = { \ .probe = platform_irqchip_probe, \ .driver = { \ .name = #drv_name, \ .owner = THIS_MODULE, \ .of_match_table = drv_name##_irqchip_match_table, \ .suppress_bind_attrs = true, \ }, \ }; \ builtin_platform_driver(drv_name##_driver) /* * This macro must be used by the different irqchip drivers to declare * the association between their version and their initialization function. * * @name: name that must be unique across all IRQCHIP_ACPI_DECLARE of the * same file. * @subtable: Subtable to be identified in MADT * @validate: Function to be called on that subtable to check its validity. * Can be NULL. * @data: data to be checked by the validate function. * @fn: initialization function */ #define IRQCHIP_ACPI_DECLARE(name, subtable, validate, data, fn) \ ACPI_DECLARE_SUBTABLE_PROBE_ENTRY(irqchip, name, \ ACPI_SIG_MADT, subtable, \ validate, data, fn) #ifdef CONFIG_IRQCHIP void irqchip_init(void); #else static inline void irqchip_init(void) {} #endif #endif PK ! ^�� � hdlc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Generic HDLC support routines for Linux * * Copyright (C) 1999-2005 Krzysztof Halasa <khc@pm.waw.pl> */ #ifndef __HDLC_H #define __HDLC_H #include <linux/skbuff.h> #include <linux/netdevice.h> #include <linux/hdlc/ioctl.h> #include <uapi/linux/hdlc.h> /* This structure is a private property of HDLC protocols. Hardware drivers have no interest here */ struct hdlc_proto { int (*open)(struct net_device *dev); void (*close)(struct net_device *dev); void (*start)(struct net_device *dev); /* if open & DCD */ void (*stop)(struct net_device *dev); /* if open & !DCD */ void (*detach)(struct net_device *dev); int (*ioctl)(struct net_device *dev, struct if_settings *ifs); __be16 (*type_trans)(struct sk_buff *skb, struct net_device *dev); int (*netif_rx)(struct sk_buff *skb); netdev_tx_t (*xmit)(struct sk_buff *skb, struct net_device *dev); struct module *module; struct hdlc_proto *next; /* next protocol in the list */ }; /* Pointed to by netdev_priv(dev) */ typedef struct hdlc_device { /* used by HDLC layer to take control over HDLC device from hw driver*/ int (*attach)(struct net_device *dev, unsigned short encoding, unsigned short parity); /* hardware driver must handle this instead of dev->hard_start_xmit */ netdev_tx_t (*xmit)(struct sk_buff *skb, struct net_device *dev); /* Things below are for HDLC layer internal use only */ const struct hdlc_proto *proto; int carrier; int open; spinlock_t state_lock; void *state; void *priv; } hdlc_device; /* Exported from hdlc module */ /* Called by hardware driver when a user requests HDLC service */ int hdlc_ioctl(struct net_device *dev, struct if_settings *ifs); /* Must be used by hardware driver on module startup/exit */ #define register_hdlc_device(dev) register_netdev(dev) void unregister_hdlc_device(struct net_device *dev); void register_hdlc_protocol(struct hdlc_proto *proto); void unregister_hdlc_protocol(struct hdlc_proto *proto); struct net_device *alloc_hdlcdev(void *priv); static inline struct hdlc_device* dev_to_hdlc(struct net_device *dev) { return netdev_priv(dev); } static __inline__ void debug_frame(const struct sk_buff *skb) { int i; for (i=0; i < skb->len; i++) { if (i == 100) { printk("...\n"); return; } printk(" %02X", skb->data[i]); } printk("\n"); } /* Must be called by hardware driver when HDLC device is being opened */ int hdlc_open(struct net_device *dev); /* Must be called by hardware driver when HDLC device is being closed */ void hdlc_close(struct net_device *dev); /* Must be pointed to by hw driver's dev->netdev_ops->ndo_start_xmit */ netdev_tx_t hdlc_start_xmit(struct sk_buff *skb, struct net_device *dev); int attach_hdlc_protocol(struct net_device *dev, struct hdlc_proto *proto, size_t size); /* May be used by hardware driver to gain control over HDLC device */ int detach_hdlc_protocol(struct net_device *dev); static __inline__ __be16 hdlc_type_trans(struct sk_buff *skb, struct net_device *dev) { hdlc_device *hdlc = dev_to_hdlc(dev); skb->dev = dev; skb_reset_mac_header(skb); if (hdlc->proto->type_trans) return hdlc->proto->type_trans(skb, dev); else return htons(ETH_P_HDLC); } #endif /* __HDLC_H */ PK ! -gѾ+ + nubus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* nubus.h: various definitions and prototypes for NuBus drivers to use. Originally written by Alan Cox. Hacked to death by C. Scott Ananian and David Huggins-Daines. */ #ifndef LINUX_NUBUS_H #define LINUX_NUBUS_H #include <linux/device.h> #include <asm/nubus.h> #include <uapi/linux/nubus.h> struct proc_dir_entry; struct seq_file; struct nubus_dir { unsigned char *base; unsigned char *ptr; int done; int mask; struct proc_dir_entry *procdir; }; struct nubus_dirent { unsigned char *base; unsigned char type; __u32 data; /* Actually 24 bits used */ int mask; }; struct nubus_board { struct device dev; /* Only 9-E actually exist, though 0-8 are also theoretically possible, and 0 is a special case which represents the motherboard and onboard peripherals (Ethernet, video) */ int slot; /* For slot 0, this is bogus. */ char name[64]; /* Format block */ unsigned char *fblock; /* Root directory (does *not* always equal fblock + doffset!) */ unsigned char *directory; unsigned long slot_addr; /* Offset to root directory (sometimes) */ unsigned long doffset; /* Length over which to compute the crc */ unsigned long rom_length; /* Completely useless most of the time */ unsigned long crc; unsigned char rev; unsigned char format; unsigned char lanes; /* Directory entry in /proc/bus/nubus */ struct proc_dir_entry *procdir; }; struct nubus_rsrc { struct list_head list; /* The functional resource ID */ unsigned char resid; /* These are mostly here for convenience; we could always read them from the ROMs if we wanted to */ unsigned short category; unsigned short type; unsigned short dr_sw; unsigned short dr_hw; /* Functional directory */ unsigned char *directory; /* Much of our info comes from here */ struct nubus_board *board; }; /* This is all NuBus functional resources (used to find devices later on) */ extern struct list_head nubus_func_rsrcs; struct nubus_driver { struct device_driver driver; int (*probe)(struct nubus_board *board); void (*remove)(struct nubus_board *board); }; extern struct bus_type nubus_bus_type; /* Generic NuBus interface functions, modelled after the PCI interface */ #ifdef CONFIG_PROC_FS void nubus_proc_init(void); struct proc_dir_entry *nubus_proc_add_board(struct nubus_board *board); struct proc_dir_entry *nubus_proc_add_rsrc_dir(struct proc_dir_entry *procdir, const struct nubus_dirent *ent, struct nubus_board *board); void nubus_proc_add_rsrc_mem(struct proc_dir_entry *procdir, const struct nubus_dirent *ent, unsigned int size); void nubus_proc_add_rsrc(struct proc_dir_entry *procdir, const struct nubus_dirent *ent); #else static inline void nubus_proc_init(void) {} static inline struct proc_dir_entry *nubus_proc_add_board(struct nubus_board *board) { return NULL; } static inline struct proc_dir_entry *nubus_proc_add_rsrc_dir(struct proc_dir_entry *procdir, const struct nubus_dirent *ent, struct nubus_board *board) { return NULL; } static inline void nubus_proc_add_rsrc_mem(struct proc_dir_entry *procdir, const struct nubus_dirent *ent, unsigned int size) {} static inline void nubus_proc_add_rsrc(struct proc_dir_entry *procdir, const struct nubus_dirent *ent) {} #endif struct nubus_rsrc *nubus_first_rsrc_or_null(void); struct nubus_rsrc *nubus_next_rsrc_or_null(struct nubus_rsrc *from); #define for_each_func_rsrc(f) \ for (f = nubus_first_rsrc_or_null(); f; f = nubus_next_rsrc_or_null(f)) #define for_each_board_func_rsrc(b, f) \ for_each_func_rsrc(f) if (f->board != b) {} else /* These are somewhat more NuBus-specific. They all return 0 for success and -1 for failure, as you'd expect. */ /* The root directory which contains the board and functional directories */ int nubus_get_root_dir(const struct nubus_board *board, struct nubus_dir *dir); /* The board directory */ int nubus_get_board_dir(const struct nubus_board *board, struct nubus_dir *dir); /* The functional directory */ int nubus_get_func_dir(const struct nubus_rsrc *fres, struct nubus_dir *dir); /* These work on any directory gotten via the above */ int nubus_readdir(struct nubus_dir *dir, struct nubus_dirent *ent); int nubus_find_rsrc(struct nubus_dir *dir, unsigned char rsrc_type, struct nubus_dirent *ent); int nubus_rewinddir(struct nubus_dir *dir); /* Things to do with directory entries */ int nubus_get_subdir(const struct nubus_dirent *ent, struct nubus_dir *dir); void nubus_get_rsrc_mem(void *dest, const struct nubus_dirent *dirent, unsigned int len); unsigned int nubus_get_rsrc_str(char *dest, const struct nubus_dirent *dirent, unsigned int len); void nubus_seq_write_rsrc_mem(struct seq_file *m, const struct nubus_dirent *dirent, unsigned int len); unsigned char *nubus_dirptr(const struct nubus_dirent *nd); /* Declarations relating to driver model objects */ int nubus_parent_device_register(void); int nubus_device_register(struct nubus_board *board); int nubus_driver_register(struct nubus_driver *ndrv); void nubus_driver_unregister(struct nubus_driver *ndrv); int nubus_proc_show(struct seq_file *m, void *data); static inline void nubus_set_drvdata(struct nubus_board *board, void *data) { dev_set_drvdata(&board->dev, data); } static inline void *nubus_get_drvdata(struct nubus_board *board) { return dev_get_drvdata(&board->dev); } /* Returns a pointer to the "standard" slot space. */ static inline void *nubus_slot_addr(int slot) { return (void *)(0xF0000000 | (slot << 24)); } #endif /* LINUX_NUBUS_H */ PK ! �P��� � io-mapping.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2008 Keith Packard <keithp@keithp.com> */ #ifndef _LINUX_IO_MAPPING_H #define _LINUX_IO_MAPPING_H #include <linux/types.h> #include <linux/slab.h> #include <linux/bug.h> #include <linux/io.h> #include <linux/pgtable.h> #include <asm/page.h> /* * The io_mapping mechanism provides an abstraction for mapping * individual pages from an io device to the CPU in an efficient fashion. * * See Documentation/driver-api/io-mapping.rst */ struct io_mapping { resource_size_t base; unsigned long size; pgprot_t prot; void __iomem *iomem; }; #ifdef CONFIG_HAVE_ATOMIC_IOMAP #include <linux/pfn.h> #include <asm/iomap.h> /* * For small address space machines, mapping large objects * into the kernel virtual space isn't practical. Where * available, use fixmap support to dynamically map pages * of the object at run time. */ static inline struct io_mapping * io_mapping_init_wc(struct io_mapping *iomap, resource_size_t base, unsigned long size) { pgprot_t prot; if (iomap_create_wc(base, size, &prot)) return NULL; iomap->base = base; iomap->size = size; iomap->prot = prot; return iomap; } static inline void io_mapping_fini(struct io_mapping *mapping) { iomap_free(mapping->base, mapping->size); } /* Atomic map/unmap */ static inline void __iomem * io_mapping_map_atomic_wc(struct io_mapping *mapping, unsigned long offset) { resource_size_t phys_addr; BUG_ON(offset >= mapping->size); phys_addr = mapping->base + offset; preempt_disable(); pagefault_disable(); return __iomap_local_pfn_prot(PHYS_PFN(phys_addr), mapping->prot); } static inline void io_mapping_unmap_atomic(void __iomem *vaddr) { kunmap_local_indexed((void __force *)vaddr); pagefault_enable(); preempt_enable(); } static inline void __iomem * io_mapping_map_local_wc(struct io_mapping *mapping, unsigned long offset) { resource_size_t phys_addr; BUG_ON(offset >= mapping->size); phys_addr = mapping->base + offset; return __iomap_local_pfn_prot(PHYS_PFN(phys_addr), mapping->prot); } static inline void io_mapping_unmap_local(void __iomem *vaddr) { kunmap_local_indexed((void __force *)vaddr); } static inline void __iomem * io_mapping_map_wc(struct io_mapping *mapping, unsigned long offset, unsigned long size) { resource_size_t phys_addr; BUG_ON(offset >= mapping->size); phys_addr = mapping->base + offset; return ioremap_wc(phys_addr, size); } static inline void io_mapping_unmap(void __iomem *vaddr) { iounmap(vaddr); } #else /* HAVE_ATOMIC_IOMAP */ #include <linux/uaccess.h> /* Create the io_mapping object*/ static inline struct io_mapping * io_mapping_init_wc(struct io_mapping *iomap, resource_size_t base, unsigned long size) { iomap->iomem = ioremap_wc(base, size); if (!iomap->iomem) return NULL; iomap->base = base; iomap->size = size; #if defined(pgprot_noncached_wc) /* archs can't agree on a name ... */ iomap->prot = pgprot_noncached_wc(PAGE_KERNEL); #elif defined(pgprot_writecombine) iomap->prot = pgprot_writecombine(PAGE_KERNEL); #else iomap->prot = pgprot_noncached(PAGE_KERNEL); #endif return iomap; } static inline void io_mapping_fini(struct io_mapping *mapping) { iounmap(mapping->iomem); } /* Non-atomic map/unmap */ static inline void __iomem * io_mapping_map_wc(struct io_mapping *mapping, unsigned long offset, unsigned long size) { return mapping->iomem + offset; } static inline void io_mapping_unmap(void __iomem *vaddr) { } /* Atomic map/unmap */ static inline void __iomem * io_mapping_map_atomic_wc(struct io_mapping *mapping, unsigned long offset) { preempt_disable(); pagefault_disable(); return io_mapping_map_wc(mapping, offset, PAGE_SIZE); } static inline void io_mapping_unmap_atomic(void __iomem *vaddr) { io_mapping_unmap(vaddr); pagefault_enable(); preempt_enable(); } static inline void __iomem * io_mapping_map_local_wc(struct io_mapping *mapping, unsigned long offset) { return io_mapping_map_wc(mapping, offset, PAGE_SIZE); } static inline void io_mapping_unmap_local(void __iomem *vaddr) { io_mapping_unmap(vaddr); } #endif /* !HAVE_ATOMIC_IOMAP */ static inline struct io_mapping * io_mapping_create_wc(resource_size_t base, unsigned long size) { struct io_mapping *iomap; iomap = kmalloc(sizeof(*iomap), GFP_KERNEL); if (!iomap) return NULL; if (!io_mapping_init_wc(iomap, base, size)) { kfree(iomap); return NULL; } return iomap; } static inline void io_mapping_free(struct io_mapping *iomap) { io_mapping_fini(iomap); kfree(iomap); } #endif /* _LINUX_IO_MAPPING_H */ int io_mapping_map_user(struct io_mapping *iomap, struct vm_area_struct *vma, unsigned long addr, unsigned long pfn, unsigned long size); PK ! � `� � fsldma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* */ #ifndef FSL_DMA_H #define FSL_DMA_H /* fsl dma API for enxternal start */ int fsl_dma_external_start(struct dma_chan *dchan, int enable); #endif PK ! e�1H sizes.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/sizes.h */ #ifndef __LINUX_SIZES_H__ #define __LINUX_SIZES_H__ #include <linux/const.h> #define SZ_1 0x00000001 #define SZ_2 0x00000002 #define SZ_4 0x00000004 #define SZ_8 0x00000008 #define SZ_16 0x00000010 #define SZ_32 0x00000020 #define SZ_64 0x00000040 #define SZ_128 0x00000080 #define SZ_256 0x00000100 #define SZ_512 0x00000200 #define SZ_1K 0x00000400 #define SZ_2K 0x00000800 #define SZ_4K 0x00001000 #define SZ_8K 0x00002000 #define SZ_16K 0x00004000 #define SZ_32K 0x00008000 #define SZ_64K 0x00010000 #define SZ_128K 0x00020000 #define SZ_256K 0x00040000 #define SZ_512K 0x00080000 #define SZ_1M 0x00100000 #define SZ_2M 0x00200000 #define SZ_4M 0x00400000 #define SZ_8M 0x00800000 #define SZ_16M 0x01000000 #define SZ_32M 0x02000000 #define SZ_64M 0x04000000 #define SZ_128M 0x08000000 #define SZ_256M 0x10000000 #define SZ_512M 0x20000000 #define SZ_1G 0x40000000 #define SZ_2G 0x80000000 #define SZ_4G _AC(0x100000000, ULL) #define SZ_8G _AC(0x200000000, ULL) #define SZ_16G _AC(0x400000000, ULL) #define SZ_32G _AC(0x800000000, ULL) #define SZ_64T _AC(0x400000000000, ULL) #endif /* __LINUX_SIZES_H__ */ PK ! ��~$ $ pvclock_gtod.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _PVCLOCK_GTOD_H #define _PVCLOCK_GTOD_H #include <linux/notifier.h> /* * The pvclock gtod notifier is called when the system time is updated * and is used to keep guest time synchronized with host time. * * The 'action' parameter in the notifier function is false (0), or * true (non-zero) if system time was stepped. */ extern int pvclock_gtod_register_notifier(struct notifier_block *nb); extern int pvclock_gtod_unregister_notifier(struct notifier_block *nb); #endif /* _PVCLOCK_GTOD_H */ PK ! �B2`W W sem.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SEM_H #define _LINUX_SEM_H #include <uapi/linux/sem.h> struct task_struct; struct sem_undo_list; #ifdef CONFIG_SYSVIPC struct sysv_sem { struct sem_undo_list *undo_list; }; extern int copy_semundo(unsigned long clone_flags, struct task_struct *tsk); extern void exit_sem(struct task_struct *tsk); #else struct sysv_sem { /* empty */ }; static inline int copy_semundo(unsigned long clone_flags, struct task_struct *tsk) { return 0; } static inline void exit_sem(struct task_struct *tsk) { return; } #endif #endif /* _LINUX_SEM_H */ PK ! C ?�" �" ipv6.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _IPV6_H #define _IPV6_H #include <uapi/linux/ipv6.h> #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) /* * This structure contains configuration options per IPv6 link. */ struct ipv6_devconf { __s32 forwarding; __s32 hop_limit; __s32 mtu6; __s32 accept_ra; __s32 accept_redirects; __s32 autoconf; __s32 dad_transmits; __s32 rtr_solicits; __s32 rtr_solicit_interval; __s32 rtr_solicit_max_interval; __s32 rtr_solicit_delay; __s32 force_mld_version; __s32 mldv1_unsolicited_report_interval; __s32 mldv2_unsolicited_report_interval; __s32 use_tempaddr; __s32 temp_valid_lft; __s32 temp_prefered_lft; __s32 regen_max_retry; __s32 max_desync_factor; __s32 max_addresses; __s32 accept_ra_defrtr; __u32 ra_defrtr_metric; __s32 accept_ra_min_hop_limit; __s32 accept_ra_min_lft; __s32 accept_ra_pinfo; __s32 ignore_routes_with_linkdown; #ifdef CONFIG_IPV6_ROUTER_PREF __s32 accept_ra_rtr_pref; __s32 rtr_probe_interval; #ifdef CONFIG_IPV6_ROUTE_INFO __s32 accept_ra_rt_info_min_plen; __s32 accept_ra_rt_info_max_plen; #endif #endif __s32 proxy_ndp; __s32 accept_source_route; __s32 accept_ra_from_local; #ifdef CONFIG_IPV6_OPTIMISTIC_DAD __s32 optimistic_dad; __s32 use_optimistic; #endif #ifdef CONFIG_IPV6_MROUTE atomic_t mc_forwarding; #endif __s32 disable_ipv6; __s32 drop_unicast_in_l2_multicast; __s32 accept_dad; __s32 force_tllao; __s32 ndisc_notify; __s32 suppress_frag_ndisc; __s32 accept_ra_mtu; __s32 drop_unsolicited_na; struct ipv6_stable_secret { bool initialized; struct in6_addr secret; } stable_secret; __s32 use_oif_addrs_only; __s32 keep_addr_on_down; __s32 seg6_enabled; #ifdef CONFIG_IPV6_SEG6_HMAC __s32 seg6_require_hmac; #endif __u32 enhanced_dad; __u32 addr_gen_mode; __s32 disable_policy; __s32 ndisc_tclass; __s32 rpl_seg_enabled; __u32 ioam6_id; __u32 ioam6_id_wide; __u8 ioam6_enabled; struct ctl_table_header *sysctl_header; }; struct ipv6_params { __s32 disable_ipv6; __s32 autoconf; }; extern struct ipv6_params ipv6_defaults; #include <linux/tcp.h> #include <linux/udp.h> #include <net/inet_sock.h> static inline struct ipv6hdr *ipv6_hdr(const struct sk_buff *skb) { return (struct ipv6hdr *)skb_network_header(skb); } static inline struct ipv6hdr *inner_ipv6_hdr(const struct sk_buff *skb) { return (struct ipv6hdr *)skb_inner_network_header(skb); } static inline struct ipv6hdr *ipipv6_hdr(const struct sk_buff *skb) { return (struct ipv6hdr *)skb_transport_header(skb); } static inline unsigned int ipv6_transport_len(const struct sk_buff *skb) { return ntohs(ipv6_hdr(skb)->payload_len) + sizeof(struct ipv6hdr) - skb_network_header_len(skb); } /* This structure contains results of exthdrs parsing as offsets from skb->nh. */ struct inet6_skb_parm { int iif; __be16 ra; __u16 dst0; __u16 srcrt; __u16 dst1; __u16 lastopt; __u16 nhoff; __u16 flags; #if defined(CONFIG_IPV6_MIP6) || defined(CONFIG_IPV6_MIP6_MODULE) __u16 dsthao; #endif __u16 frag_max_size; __u16 srhoff; #define IP6SKB_XFRM_TRANSFORMED 1 #define IP6SKB_FORWARDED 2 #define IP6SKB_REROUTED 4 #define IP6SKB_ROUTERALERT 8 #define IP6SKB_FRAGMENTED 16 #define IP6SKB_HOPBYHOP 32 #define IP6SKB_L3SLAVE 64 #define IP6SKB_JUMBOGRAM 128 #define IP6SKB_SEG6 256 }; #if defined(CONFIG_NET_L3_MASTER_DEV) static inline bool ipv6_l3mdev_skb(__u16 flags) { return flags & IP6SKB_L3SLAVE; } #else static inline bool ipv6_l3mdev_skb(__u16 flags) { return false; } #endif #define IP6CB(skb) ((struct inet6_skb_parm*)((skb)->cb)) #define IP6CBMTU(skb) ((struct ip6_mtuinfo *)((skb)->cb)) static inline int inet6_iif(const struct sk_buff *skb) { bool l3_slave = ipv6_l3mdev_skb(IP6CB(skb)->flags); return l3_slave ? skb->skb_iif : IP6CB(skb)->iif; } static inline bool inet6_is_jumbogram(const struct sk_buff *skb) { return !!(IP6CB(skb)->flags & IP6SKB_JUMBOGRAM); } /* can not be used in TCP layer after tcp_v6_fill_cb */ static inline int inet6_sdif(const struct sk_buff *skb) { #if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV) if (skb && ipv6_l3mdev_skb(IP6CB(skb)->flags)) return IP6CB(skb)->iif; #endif return 0; } struct tcp6_request_sock { struct tcp_request_sock tcp6rsk_tcp; }; struct ipv6_mc_socklist; struct ipv6_ac_socklist; struct ipv6_fl_socklist; struct inet6_cork { struct ipv6_txoptions *opt; u8 hop_limit; u8 tclass; }; /** * struct ipv6_pinfo - ipv6 private area * * In the struct sock hierarchy (tcp6_sock, upd6_sock, etc) * this _must_ be the last member, so that inet6_sk_generic * is able to calculate its offset from the base struct sock * by using the struct proto->slab_obj_size member. -acme */ struct ipv6_pinfo { struct in6_addr saddr; struct in6_pktinfo sticky_pktinfo; const struct in6_addr *daddr_cache; #ifdef CONFIG_IPV6_SUBTREES const struct in6_addr *saddr_cache; #endif __be32 flow_label; __u32 frag_size; /* * Packed in 16bits. * Omit one shift by putting the signed field at MSB. */ #if defined(__BIG_ENDIAN_BITFIELD) __s16 hop_limit:9; __u16 __unused_1:7; #else __u16 __unused_1:7; __s16 hop_limit:9; #endif #if defined(__BIG_ENDIAN_BITFIELD) /* Packed in 16bits. */ __s16 mcast_hops:9; __u16 __unused_2:6, mc_loop:1; #else __u16 mc_loop:1, __unused_2:6; __s16 mcast_hops:9; #endif int ucast_oif; int mcast_oif; /* pktoption flags */ union { struct { __u16 srcrt:1, osrcrt:1, rxinfo:1, rxoinfo:1, rxhlim:1, rxohlim:1, hopopts:1, ohopopts:1, dstopts:1, odstopts:1, rxflow:1, rxtclass:1, rxpmtu:1, rxorigdstaddr:1, recvfragsize:1; /* 1 bits hole */ } bits; __u16 all; } rxopt; /* sockopt flags */ __u16 recverr:1, sndflow:1, repflow:1, pmtudisc:3, padding:1, /* 1 bit hole */ srcprefs:3, /* 001: prefer temporary address * 010: prefer public address * 100: prefer care-of address */ dontfrag:1, autoflowlabel:1, autoflowlabel_set:1, mc_all:1, recverr_rfc4884:1, rtalert_isolate:1; __u8 min_hopcount; __u8 tclass; __be32 rcv_flowinfo; __u32 dst_cookie; struct ipv6_mc_socklist __rcu *ipv6_mc_list; struct ipv6_ac_socklist *ipv6_ac_list; struct ipv6_fl_socklist __rcu *ipv6_fl_list; struct ipv6_txoptions __rcu *opt; struct sk_buff *pktoptions; struct sk_buff *rxpmtu; struct inet6_cork cork; }; /* WARNING: don't change the layout of the members in {raw,udp,tcp}6_sock! */ struct raw6_sock { /* inet_sock has to be the first member of raw6_sock */ struct inet_sock inet; __u32 checksum; /* perform checksum */ __u32 offset; /* checksum offset */ struct icmp6_filter filter; __u32 ip6mr_table; /* ipv6_pinfo has to be the last member of raw6_sock, see inet6_sk_generic */ struct ipv6_pinfo inet6; }; struct udp6_sock { struct udp_sock udp; /* ipv6_pinfo has to be the last member of udp6_sock, see inet6_sk_generic */ struct ipv6_pinfo inet6; }; struct tcp6_sock { struct tcp_sock tcp; /* ipv6_pinfo has to be the last member of tcp6_sock, see inet6_sk_generic */ struct ipv6_pinfo inet6; }; extern int inet6_sk_rebuild_header(struct sock *sk); struct tcp6_timewait_sock { struct tcp_timewait_sock tcp6tw_tcp; }; #if IS_ENABLED(CONFIG_IPV6) bool ipv6_mod_enabled(void); static inline struct ipv6_pinfo *inet6_sk(const struct sock *__sk) { return sk_fullsock(__sk) ? inet_sk(__sk)->pinet6 : NULL; } static inline struct raw6_sock *raw6_sk(const struct sock *sk) { return (struct raw6_sock *)sk; } #define __ipv6_only_sock(sk) (sk->sk_ipv6only) #define ipv6_only_sock(sk) (__ipv6_only_sock(sk)) #define ipv6_sk_rxinfo(sk) ((sk)->sk_family == PF_INET6 && \ inet6_sk(sk)->rxopt.bits.rxinfo) static inline const struct in6_addr *inet6_rcv_saddr(const struct sock *sk) { if (sk->sk_family == AF_INET6) return &sk->sk_v6_rcv_saddr; return NULL; } static inline int inet_v6_ipv6only(const struct sock *sk) { /* ipv6only field is at same position for timewait and other sockets */ return ipv6_only_sock(sk); } #else #define __ipv6_only_sock(sk) 0 #define ipv6_only_sock(sk) 0 #define ipv6_sk_rxinfo(sk) 0 static inline bool ipv6_mod_enabled(void) { return false; } static inline struct ipv6_pinfo * inet6_sk(const struct sock *__sk) { return NULL; } static inline struct inet6_request_sock * inet6_rsk(const struct request_sock *rsk) { return NULL; } static inline struct raw6_sock *raw6_sk(const struct sock *sk) { return NULL; } #define inet6_rcv_saddr(__sk) NULL #define tcp_twsk_ipv6only(__sk) 0 #define inet_v6_ipv6only(__sk) 0 #endif /* IS_ENABLED(CONFIG_IPV6) */ #endif /* _IPV6_H */ PK ! �)/ nfs3.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * NFSv3 protocol definitions */ #ifndef _LINUX_NFS3_H #define _LINUX_NFS3_H #include <uapi/linux/nfs3.h> /* Number of 32bit words in post_op_attr */ #define NFS3_POST_OP_ATTR_WORDS 22 #endif /* _LINUX_NFS3_H */ PK ! <hd� � crc4.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CRC4_H #define _LINUX_CRC4_H #include <linux/types.h> extern uint8_t crc4(uint8_t c, uint64_t x, int bits); #endif /* _LINUX_CRC4_H */ PK ! ��s�+ + ascii85.hnu �[��� /* * SPDX-License-Identifier: GPL-2.0 * * Copyright (c) 2008 Intel Corporation * Copyright (c) 2018 The Linux Foundation. All rights reserved. */ #ifndef _ASCII85_H_ #define _ASCII85_H_ #include <linux/math.h> #include <linux/types.h> #define ASCII85_BUFSZ 6 static inline long ascii85_encode_len(long len) { return DIV_ROUND_UP(len, 4); } static inline const char * ascii85_encode(u32 in, char *out) { int i; if (in == 0) return "z"; out[5] = '\0'; for (i = 5; i--; ) { out[i] = '!' + in % 85; in /= 85; } return out; } #endif PK ! ��g�"8 "8 devfreq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * devfreq: Generic Dynamic Voltage and Frequency Scaling (DVFS) Framework * for Non-CPU Devices. * * Copyright (C) 2011 Samsung Electronics * MyungJoo Ham <myungjoo.ham@samsung.com> */ #ifndef __LINUX_DEVFREQ_H__ #define __LINUX_DEVFREQ_H__ #include <linux/device.h> #include <linux/notifier.h> #include <linux/pm_opp.h> #include <linux/pm_qos.h> /* DEVFREQ governor name */ #define DEVFREQ_GOV_SIMPLE_ONDEMAND "simple_ondemand" #define DEVFREQ_GOV_PERFORMANCE "performance" #define DEVFREQ_GOV_POWERSAVE "powersave" #define DEVFREQ_GOV_USERSPACE "userspace" #define DEVFREQ_GOV_PASSIVE "passive" /* DEVFREQ notifier interface */ #define DEVFREQ_TRANSITION_NOTIFIER (0) /* Transition notifiers of DEVFREQ_TRANSITION_NOTIFIER */ #define DEVFREQ_PRECHANGE (0) #define DEVFREQ_POSTCHANGE (1) /* DEVFREQ work timers */ enum devfreq_timer { DEVFREQ_TIMER_DEFERRABLE = 0, DEVFREQ_TIMER_DELAYED, DEVFREQ_TIMER_NUM, }; struct devfreq; struct devfreq_governor; struct thermal_cooling_device; /** * struct devfreq_dev_status - Data given from devfreq user device to * governors. Represents the performance * statistics. * @total_time: The total time represented by this instance of * devfreq_dev_status * @busy_time: The time that the device was working among the * total_time. * @current_frequency: The operating frequency. * @private_data: An entry not specified by the devfreq framework. * A device and a specific governor may have their * own protocol with private_data. However, because * this is governor-specific, a governor using this * will be only compatible with devices aware of it. */ struct devfreq_dev_status { /* both since the last measure */ unsigned long total_time; unsigned long busy_time; unsigned long current_frequency; void *private_data; }; /* * The resulting frequency should be at most this. (this bound is the * least upper bound; thus, the resulting freq should be lower or same) * If the flag is not set, the resulting frequency should be at most the * bound (greatest lower bound) */ #define DEVFREQ_FLAG_LEAST_UPPER_BOUND 0x1 /** * struct devfreq_dev_profile - Devfreq's user device profile * @initial_freq: The operating frequency when devfreq_add_device() is * called. * @polling_ms: The polling interval in ms. 0 disables polling. * @timer: Timer type is either deferrable or delayed timer. * @target: The device should set its operating frequency at * freq or lowest-upper-than-freq value. If freq is * higher than any operable frequency, set maximum. * Before returning, target function should set * freq at the current frequency. * The "flags" parameter's possible values are * explained above with "DEVFREQ_FLAG_*" macros. * @get_dev_status: The device should provide the current performance * status to devfreq. Governors are recommended not to * use this directly. Instead, governors are recommended * to use devfreq_update_stats() along with * devfreq.last_status. * @get_cur_freq: The device should provide the current frequency * at which it is operating. * @exit: An optional callback that is called when devfreq * is removing the devfreq object due to error or * from devfreq_remove_device() call. If the user * has registered devfreq->nb at a notifier-head, * this is the time to unregister it. * @freq_table: Optional list of frequencies to support statistics * and freq_table must be generated in ascending order. * @max_state: The size of freq_table. * * @is_cooling_device: A self-explanatory boolean giving the device a * cooling effect property. */ struct devfreq_dev_profile { unsigned long initial_freq; unsigned int polling_ms; enum devfreq_timer timer; bool is_cooling_device; int (*target)(struct device *dev, unsigned long *freq, u32 flags); int (*get_dev_status)(struct device *dev, struct devfreq_dev_status *stat); int (*get_cur_freq)(struct device *dev, unsigned long *freq); void (*exit)(struct device *dev); unsigned long *freq_table; unsigned int max_state; }; /** * struct devfreq_stats - Statistics of devfreq device behavior * @total_trans: Number of devfreq transitions. * @trans_table: Statistics of devfreq transitions. * @time_in_state: Statistics of devfreq states. * @last_update: The last time stats were updated. */ struct devfreq_stats { unsigned int total_trans; unsigned int *trans_table; u64 *time_in_state; u64 last_update; }; /** * struct devfreq - Device devfreq structure * @node: list node - contains the devices with devfreq that have been * registered. * @lock: a mutex to protect accessing devfreq. * @dev: device registered by devfreq class. dev.parent is the device * using devfreq. * @profile: device-specific devfreq profile * @governor: method how to choose frequency based on the usage. * @opp_table: Reference to OPP table of dev.parent, if one exists. * @nb: notifier block used to notify devfreq object that it should * reevaluate operable frequencies. Devfreq users may use * devfreq.nb to the corresponding register notifier call chain. * @work: delayed work for load monitoring. * @previous_freq: previously configured frequency value. * @last_status: devfreq user device info, performance statistics * @data: devfreq driver pass to governors, governor should not change it. * @governor_data: private data for governors, devfreq core doesn't touch it. * @user_min_freq_req: PM QoS minimum frequency request from user (via sysfs) * @user_max_freq_req: PM QoS maximum frequency request from user (via sysfs) * @scaling_min_freq: Limit minimum frequency requested by OPP interface * @scaling_max_freq: Limit maximum frequency requested by OPP interface * @stop_polling: devfreq polling status of a device. * @suspend_freq: frequency of a device set during suspend phase. * @resume_freq: frequency of a device set in resume phase. * @suspend_count: suspend requests counter for a device. * @stats: Statistics of devfreq device behavior * @transition_notifier_list: list head of DEVFREQ_TRANSITION_NOTIFIER notifier * @cdev: Cooling device pointer if the devfreq has cooling property * @nb_min: Notifier block for DEV_PM_QOS_MIN_FREQUENCY * @nb_max: Notifier block for DEV_PM_QOS_MAX_FREQUENCY * * This structure stores the devfreq information for a given device. * * Note that when a governor accesses entries in struct devfreq in its * functions except for the context of callbacks defined in struct * devfreq_governor, the governor should protect its access with the * struct mutex lock in struct devfreq. A governor may use this mutex * to protect its own private data in ``void *data`` as well. */ struct devfreq { struct list_head node; struct mutex lock; struct device dev; struct devfreq_dev_profile *profile; const struct devfreq_governor *governor; struct opp_table *opp_table; struct notifier_block nb; struct delayed_work work; unsigned long previous_freq; struct devfreq_dev_status last_status; void *data; void *governor_data; struct dev_pm_qos_request user_min_freq_req; struct dev_pm_qos_request user_max_freq_req; unsigned long scaling_min_freq; unsigned long scaling_max_freq; bool stop_polling; unsigned long suspend_freq; unsigned long resume_freq; atomic_t suspend_count; /* information for device frequency transitions */ struct devfreq_stats stats; struct srcu_notifier_head transition_notifier_list; /* Pointer to the cooling device if used for thermal mitigation */ struct thermal_cooling_device *cdev; struct notifier_block nb_min; struct notifier_block nb_max; }; struct devfreq_freqs { unsigned long old; unsigned long new; }; #if defined(CONFIG_PM_DEVFREQ) struct devfreq *devfreq_add_device(struct device *dev, struct devfreq_dev_profile *profile, const char *governor_name, void *data); int devfreq_remove_device(struct devfreq *devfreq); struct devfreq *devm_devfreq_add_device(struct device *dev, struct devfreq_dev_profile *profile, const char *governor_name, void *data); void devm_devfreq_remove_device(struct device *dev, struct devfreq *devfreq); /* Supposed to be called by PM callbacks */ int devfreq_suspend_device(struct devfreq *devfreq); int devfreq_resume_device(struct devfreq *devfreq); void devfreq_suspend(void); void devfreq_resume(void); /* update_devfreq() - Reevaluate the device and configure frequency */ int update_devfreq(struct devfreq *devfreq); /* Helper functions for devfreq user device driver with OPP. */ struct dev_pm_opp *devfreq_recommended_opp(struct device *dev, unsigned long *freq, u32 flags); int devfreq_register_opp_notifier(struct device *dev, struct devfreq *devfreq); int devfreq_unregister_opp_notifier(struct device *dev, struct devfreq *devfreq); int devm_devfreq_register_opp_notifier(struct device *dev, struct devfreq *devfreq); void devm_devfreq_unregister_opp_notifier(struct device *dev, struct devfreq *devfreq); int devfreq_register_notifier(struct devfreq *devfreq, struct notifier_block *nb, unsigned int list); int devfreq_unregister_notifier(struct devfreq *devfreq, struct notifier_block *nb, unsigned int list); int devm_devfreq_register_notifier(struct device *dev, struct devfreq *devfreq, struct notifier_block *nb, unsigned int list); void devm_devfreq_unregister_notifier(struct device *dev, struct devfreq *devfreq, struct notifier_block *nb, unsigned int list); struct devfreq *devfreq_get_devfreq_by_node(struct device_node *node); struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, const char *phandle_name, int index); #if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND) /** * struct devfreq_simple_ondemand_data - ``void *data`` fed to struct devfreq * and devfreq_add_device * @upthreshold: If the load is over this value, the frequency jumps. * Specify 0 to use the default. Valid value = 0 to 100. * @downdifferential: If the load is under upthreshold - downdifferential, * the governor may consider slowing the frequency down. * Specify 0 to use the default. Valid value = 0 to 100. * downdifferential < upthreshold must hold. * * If the fed devfreq_simple_ondemand_data pointer is NULL to the governor, * the governor uses the default values. */ struct devfreq_simple_ondemand_data { unsigned int upthreshold; unsigned int downdifferential; }; #endif #if IS_ENABLED(CONFIG_DEVFREQ_GOV_PASSIVE) /** * struct devfreq_passive_data - ``void *data`` fed to struct devfreq * and devfreq_add_device * @parent: the devfreq instance of parent device. * @get_target_freq: Optional callback, Returns desired operating frequency * for the device using passive governor. That is called * when passive governor should decide the next frequency * by using the new frequency of parent devfreq device * using governors except for passive governor. * If the devfreq device has the specific method to decide * the next frequency, should use this callback. * @this: the devfreq instance of own device. * @nb: the notifier block for DEVFREQ_TRANSITION_NOTIFIER list * * The devfreq_passive_data have to set the devfreq instance of parent * device with governors except for the passive governor. But, don't need to * initialize the 'this' and 'nb' field because the devfreq core will handle * them. */ struct devfreq_passive_data { /* Should set the devfreq instance of parent device */ struct devfreq *parent; /* Optional callback to decide the next frequency of passvice device */ int (*get_target_freq)(struct devfreq *this, unsigned long *freq); /* For passive governor's internal use. Don't need to set them */ struct devfreq *this; struct notifier_block nb; }; #endif #else /* !CONFIG_PM_DEVFREQ */ static inline struct devfreq *devfreq_add_device(struct device *dev, struct devfreq_dev_profile *profile, const char *governor_name, void *data) { return ERR_PTR(-ENOSYS); } static inline int devfreq_remove_device(struct devfreq *devfreq) { return 0; } static inline struct devfreq *devm_devfreq_add_device(struct device *dev, struct devfreq_dev_profile *profile, const char *governor_name, void *data) { return ERR_PTR(-ENOSYS); } static inline void devm_devfreq_remove_device(struct device *dev, struct devfreq *devfreq) { } static inline int devfreq_suspend_device(struct devfreq *devfreq) { return 0; } static inline int devfreq_resume_device(struct devfreq *devfreq) { return 0; } static inline void devfreq_suspend(void) {} static inline void devfreq_resume(void) {} static inline struct dev_pm_opp *devfreq_recommended_opp(struct device *dev, unsigned long *freq, u32 flags) { return ERR_PTR(-EINVAL); } static inline int devfreq_register_opp_notifier(struct device *dev, struct devfreq *devfreq) { return -EINVAL; } static inline int devfreq_unregister_opp_notifier(struct device *dev, struct devfreq *devfreq) { return -EINVAL; } static inline int devm_devfreq_register_opp_notifier(struct device *dev, struct devfreq *devfreq) { return -EINVAL; } static inline void devm_devfreq_unregister_opp_notifier(struct device *dev, struct devfreq *devfreq) { } static inline int devfreq_register_notifier(struct devfreq *devfreq, struct notifier_block *nb, unsigned int list) { return 0; } static inline int devfreq_unregister_notifier(struct devfreq *devfreq, struct notifier_block *nb, unsigned int list) { return 0; } static inline int devm_devfreq_register_notifier(struct device *dev, struct devfreq *devfreq, struct notifier_block *nb, unsigned int list) { return 0; } static inline void devm_devfreq_unregister_notifier(struct device *dev, struct devfreq *devfreq, struct notifier_block *nb, unsigned int list) { } static inline struct devfreq *devfreq_get_devfreq_by_node(struct device_node *node) { return ERR_PTR(-ENODEV); } static inline struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, const char *phandle_name, int index) { return ERR_PTR(-ENODEV); } static inline int devfreq_update_stats(struct devfreq *df) { return -EINVAL; } #endif /* CONFIG_PM_DEVFREQ */ #endif /* __LINUX_DEVFREQ_H__ */ PK ! HU��� � dm-kcopyd.hnu �[��� /* * Copyright (C) 2001 - 2003 Sistina Software * Copyright (C) 2004 - 2008 Red Hat, Inc. All rights reserved. * * kcopyd provides a simple interface for copying an area of one * block-device to one or more other block-devices, either synchronous * or with an asynchronous completion notification. * * This file is released under the GPL. */ #ifndef _LINUX_DM_KCOPYD_H #define _LINUX_DM_KCOPYD_H #ifdef __KERNEL__ #include <linux/dm-io.h> /* FIXME: make this configurable */ #define DM_KCOPYD_MAX_REGIONS 8 #define DM_KCOPYD_IGNORE_ERROR 1 #define DM_KCOPYD_WRITE_SEQ 2 struct dm_kcopyd_throttle { unsigned throttle; unsigned num_io_jobs; unsigned io_period; unsigned total_period; unsigned last_jiffies; }; /* * kcopyd clients that want to support throttling must pass an initialised * dm_kcopyd_throttle struct into dm_kcopyd_client_create(). * Two or more clients may share the same instance of this struct between * them if they wish to be throttled as a group. * * This macro also creates a corresponding module parameter to configure * the amount of throttling. */ #define DECLARE_DM_KCOPYD_THROTTLE_WITH_MODULE_PARM(name, description) \ static struct dm_kcopyd_throttle dm_kcopyd_throttle = { 100, 0, 0, 0, 0 }; \ module_param_named(name, dm_kcopyd_throttle.throttle, uint, 0644); \ MODULE_PARM_DESC(name, description) /* * To use kcopyd you must first create a dm_kcopyd_client object. * throttle can be NULL if you don't want any throttling. */ struct dm_kcopyd_client; struct dm_kcopyd_client *dm_kcopyd_client_create(struct dm_kcopyd_throttle *throttle); void dm_kcopyd_client_destroy(struct dm_kcopyd_client *kc); void dm_kcopyd_client_flush(struct dm_kcopyd_client *kc); /* * Submit a copy job to kcopyd. This is built on top of the * previous three fns. * * read_err is a boolean, * write_err is a bitset, with 1 bit for each destination region */ typedef void (*dm_kcopyd_notify_fn)(int read_err, unsigned long write_err, void *context); void dm_kcopyd_copy(struct dm_kcopyd_client *kc, struct dm_io_region *from, unsigned num_dests, struct dm_io_region *dests, unsigned flags, dm_kcopyd_notify_fn fn, void *context); /* * Prepare a callback and submit it via the kcopyd thread. * * dm_kcopyd_prepare_callback allocates a callback structure and returns it. * It must not be called from interrupt context. * The returned value should be passed into dm_kcopyd_do_callback. * * dm_kcopyd_do_callback submits the callback. * It may be called from interrupt context. * The callback is issued from the kcopyd thread. */ void *dm_kcopyd_prepare_callback(struct dm_kcopyd_client *kc, dm_kcopyd_notify_fn fn, void *context); void dm_kcopyd_do_callback(void *job, int read_err, unsigned long write_err); void dm_kcopyd_zero(struct dm_kcopyd_client *kc, unsigned num_dests, struct dm_io_region *dests, unsigned flags, dm_kcopyd_notify_fn fn, void *context); #endif /* __KERNEL__ */ #endif /* _LINUX_DM_KCOPYD_H */ PK ! �q��7 7 page_counter.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PAGE_COUNTER_H #define _LINUX_PAGE_COUNTER_H #include <linux/atomic.h> #include <linux/kernel.h> #include <asm/page.h> struct page_counter { atomic_long_t usage; unsigned long min; unsigned long low; unsigned long high; unsigned long max; /* effective memory.min and memory.min usage tracking */ unsigned long emin; atomic_long_t min_usage; atomic_long_t children_min_usage; /* effective memory.low and memory.low usage tracking */ unsigned long elow; atomic_long_t low_usage; atomic_long_t children_low_usage; /* legacy */ unsigned long watermark; unsigned long failcnt; /* * 'parent' is placed here to be far from 'usage' to reduce * cache false sharing, as 'usage' is written mostly while * parent is frequently read for cgroup's hierarchical * counting nature. */ struct page_counter *parent; }; #if BITS_PER_LONG == 32 #define PAGE_COUNTER_MAX LONG_MAX #else #define PAGE_COUNTER_MAX (LONG_MAX / PAGE_SIZE) #endif static inline void page_counter_init(struct page_counter *counter, struct page_counter *parent) { atomic_long_set(&counter->usage, 0); counter->max = PAGE_COUNTER_MAX; counter->parent = parent; } static inline unsigned long page_counter_read(struct page_counter *counter) { return atomic_long_read(&counter->usage); } void page_counter_cancel(struct page_counter *counter, unsigned long nr_pages); void page_counter_charge(struct page_counter *counter, unsigned long nr_pages); bool page_counter_try_charge(struct page_counter *counter, unsigned long nr_pages, struct page_counter **fail); void page_counter_uncharge(struct page_counter *counter, unsigned long nr_pages); void page_counter_set_min(struct page_counter *counter, unsigned long nr_pages); void page_counter_set_low(struct page_counter *counter, unsigned long nr_pages); static inline void page_counter_set_high(struct page_counter *counter, unsigned long nr_pages) { WRITE_ONCE(counter->high, nr_pages); } int page_counter_set_max(struct page_counter *counter, unsigned long nr_pages); int page_counter_memparse(const char *buf, const char *max, unsigned long *nr_pages); static inline void page_counter_reset_watermark(struct page_counter *counter) { counter->watermark = page_counter_read(counter); } #endif /* _LINUX_PAGE_COUNTER_H */ PK ! ñ��A A virtio_config.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VIRTIO_CONFIG_H #define _LINUX_VIRTIO_CONFIG_H #include <linux/err.h> #include <linux/bug.h> #include <linux/virtio.h> #include <linux/virtio_byteorder.h> #include <linux/compiler_types.h> #include <uapi/linux/virtio_config.h> struct irq_affinity; struct virtio_shm_region { u64 addr; u64 len; }; /** * virtio_config_ops - operations for configuring a virtio device * Note: Do not assume that a transport implements all of the operations * getting/setting a value as a simple read/write! Generally speaking, * any of @get/@set, @get_status/@set_status, or @get_features/ * @finalize_features are NOT safe to be called from an atomic * context. * @get: read the value of a configuration field * vdev: the virtio_device * offset: the offset of the configuration field * buf: the buffer to write the field value into. * len: the length of the buffer * @set: write the value of a configuration field * vdev: the virtio_device * offset: the offset of the configuration field * buf: the buffer to read the field value from. * len: the length of the buffer * @generation: config generation counter (optional) * vdev: the virtio_device * Returns the config generation counter * @get_status: read the status byte * vdev: the virtio_device * Returns the status byte * @set_status: write the status byte * vdev: the virtio_device * status: the new status byte * @reset: reset the device * vdev: the virtio device * After this, status and feature negotiation must be done again * Device must not be reset from its vq/config callbacks, or in * parallel with being added/removed. * @find_vqs: find virtqueues and instantiate them. * vdev: the virtio_device * nvqs: the number of virtqueues to find * vqs: on success, includes new virtqueues * callbacks: array of callbacks, for each virtqueue * include a NULL entry for vqs that do not need a callback * names: array of virtqueue names (mainly for debugging) * include a NULL entry for vqs unused by driver * Returns 0 on success or error status * @del_vqs: free virtqueues found by find_vqs(). * @get_features: get the array of feature bits for this device. * vdev: the virtio_device * Returns the first 64 feature bits (all we currently need). * @finalize_features: confirm what device features we'll be using. * vdev: the virtio_device * This sends the driver feature bits to the device: it can change * the dev->feature bits if it wants. * Note: despite the name this can be called any number of times. * Returns 0 on success or error status * @bus_name: return the bus name associated with the device (optional) * vdev: the virtio_device * This returns a pointer to the bus name a la pci_name from which * the caller can then copy. * @set_vq_affinity: set the affinity for a virtqueue (optional). * @get_vq_affinity: get the affinity for a virtqueue (optional). * @get_shm_region: get a shared memory region based on the index. */ typedef void vq_callback_t(struct virtqueue *); struct virtio_config_ops { void (*get)(struct virtio_device *vdev, unsigned offset, void *buf, unsigned len); void (*set)(struct virtio_device *vdev, unsigned offset, const void *buf, unsigned len); u32 (*generation)(struct virtio_device *vdev); u8 (*get_status)(struct virtio_device *vdev); void (*set_status)(struct virtio_device *vdev, u8 status); void (*reset)(struct virtio_device *vdev); int (*find_vqs)(struct virtio_device *, unsigned nvqs, struct virtqueue *vqs[], vq_callback_t *callbacks[], const char * const names[], const bool *ctx, struct irq_affinity *desc); void (*del_vqs)(struct virtio_device *); u64 (*get_features)(struct virtio_device *vdev); int (*finalize_features)(struct virtio_device *vdev); const char *(*bus_name)(struct virtio_device *vdev); int (*set_vq_affinity)(struct virtqueue *vq, const struct cpumask *cpu_mask); const struct cpumask *(*get_vq_affinity)(struct virtio_device *vdev, int index); bool (*get_shm_region)(struct virtio_device *vdev, struct virtio_shm_region *region, u8 id); }; /* If driver didn't advertise the feature, it will never appear. */ void virtio_check_driver_offered_feature(const struct virtio_device *vdev, unsigned int fbit); /** * __virtio_test_bit - helper to test feature bits. For use by transports. * Devices should normally use virtio_has_feature, * which includes more checks. * @vdev: the device * @fbit: the feature bit */ static inline bool __virtio_test_bit(const struct virtio_device *vdev, unsigned int fbit) { /* Did you forget to fix assumptions on max features? */ if (__builtin_constant_p(fbit)) BUILD_BUG_ON(fbit >= 64); else BUG_ON(fbit >= 64); return vdev->features & BIT_ULL(fbit); } /** * __virtio_set_bit - helper to set feature bits. For use by transports. * @vdev: the device * @fbit: the feature bit */ static inline void __virtio_set_bit(struct virtio_device *vdev, unsigned int fbit) { /* Did you forget to fix assumptions on max features? */ if (__builtin_constant_p(fbit)) BUILD_BUG_ON(fbit >= 64); else BUG_ON(fbit >= 64); vdev->features |= BIT_ULL(fbit); } /** * __virtio_clear_bit - helper to clear feature bits. For use by transports. * @vdev: the device * @fbit: the feature bit */ static inline void __virtio_clear_bit(struct virtio_device *vdev, unsigned int fbit) { /* Did you forget to fix assumptions on max features? */ if (__builtin_constant_p(fbit)) BUILD_BUG_ON(fbit >= 64); else BUG_ON(fbit >= 64); vdev->features &= ~BIT_ULL(fbit); } /** * virtio_has_feature - helper to determine if this device has this feature. * @vdev: the device * @fbit: the feature bit */ static inline bool virtio_has_feature(const struct virtio_device *vdev, unsigned int fbit) { if (fbit < VIRTIO_TRANSPORT_F_START) virtio_check_driver_offered_feature(vdev, fbit); return __virtio_test_bit(vdev, fbit); } /** * virtio_has_dma_quirk - determine whether this device has the DMA quirk * @vdev: the device */ static inline bool virtio_has_dma_quirk(const struct virtio_device *vdev) { /* * Note the reverse polarity of the quirk feature (compared to most * other features), this is for compatibility with legacy systems. */ return !virtio_has_feature(vdev, VIRTIO_F_ACCESS_PLATFORM); } static inline struct virtqueue *virtio_find_single_vq(struct virtio_device *vdev, vq_callback_t *c, const char *n) { vq_callback_t *callbacks[] = { c }; const char *names[] = { n }; struct virtqueue *vq; int err = vdev->config->find_vqs(vdev, 1, &vq, callbacks, names, NULL, NULL); if (err < 0) return ERR_PTR(err); return vq; } static inline int virtio_find_vqs(struct virtio_device *vdev, unsigned nvqs, struct virtqueue *vqs[], vq_callback_t *callbacks[], const char * const names[], struct irq_affinity *desc) { return vdev->config->find_vqs(vdev, nvqs, vqs, callbacks, names, NULL, desc); } static inline int virtio_find_vqs_ctx(struct virtio_device *vdev, unsigned nvqs, struct virtqueue *vqs[], vq_callback_t *callbacks[], const char * const names[], const bool *ctx, struct irq_affinity *desc) { return vdev->config->find_vqs(vdev, nvqs, vqs, callbacks, names, ctx, desc); } /** * virtio_device_ready - enable vq use in probe function * @vdev: the device * * Driver must call this to use vqs in the probe function. * * Note: vqs are enabled automatically after probe returns. */ static inline void virtio_device_ready(struct virtio_device *dev) { unsigned status = dev->config->get_status(dev); BUG_ON(status & VIRTIO_CONFIG_S_DRIVER_OK); dev->config->set_status(dev, status | VIRTIO_CONFIG_S_DRIVER_OK); } static inline const char *virtio_bus_name(struct virtio_device *vdev) { if (!vdev->config->bus_name) return "virtio"; return vdev->config->bus_name(vdev); } /** * virtqueue_set_affinity - setting affinity for a virtqueue * @vq: the virtqueue * @cpu: the cpu no. * * Note that this function is best-effort: the affinity hint may not be set * due to config support, irq type and sharing. * */ static inline int virtqueue_set_affinity(struct virtqueue *vq, const struct cpumask *cpu_mask) { struct virtio_device *vdev = vq->vdev; if (vdev->config->set_vq_affinity) return vdev->config->set_vq_affinity(vq, cpu_mask); return 0; } static inline bool virtio_get_shm_region(struct virtio_device *vdev, struct virtio_shm_region *region, u8 id) { if (!vdev->config->get_shm_region) return false; return vdev->config->get_shm_region(vdev, region, id); } static inline bool virtio_is_little_endian(struct virtio_device *vdev) { return virtio_has_feature(vdev, VIRTIO_F_VERSION_1) || virtio_legacy_is_little_endian(); } /* Memory accessors */ static inline u16 virtio16_to_cpu(struct virtio_device *vdev, __virtio16 val) { return __virtio16_to_cpu(virtio_is_little_endian(vdev), val); } static inline __virtio16 cpu_to_virtio16(struct virtio_device *vdev, u16 val) { return __cpu_to_virtio16(virtio_is_little_endian(vdev), val); } static inline u32 virtio32_to_cpu(struct virtio_device *vdev, __virtio32 val) { return __virtio32_to_cpu(virtio_is_little_endian(vdev), val); } static inline __virtio32 cpu_to_virtio32(struct virtio_device *vdev, u32 val) { return __cpu_to_virtio32(virtio_is_little_endian(vdev), val); } static inline u64 virtio64_to_cpu(struct virtio_device *vdev, __virtio64 val) { return __virtio64_to_cpu(virtio_is_little_endian(vdev), val); } static inline __virtio64 cpu_to_virtio64(struct virtio_device *vdev, u64 val) { return __cpu_to_virtio64(virtio_is_little_endian(vdev), val); } #define virtio_to_cpu(vdev, x) \ _Generic((x), \ __u8: (x), \ __virtio16: virtio16_to_cpu((vdev), (x)), \ __virtio32: virtio32_to_cpu((vdev), (x)), \ __virtio64: virtio64_to_cpu((vdev), (x)) \ ) #define cpu_to_virtio(vdev, x, m) \ _Generic((m), \ __u8: (x), \ __virtio16: cpu_to_virtio16((vdev), (x)), \ __virtio32: cpu_to_virtio32((vdev), (x)), \ __virtio64: cpu_to_virtio64((vdev), (x)) \ ) #define __virtio_native_type(structname, member) \ typeof(virtio_to_cpu(NULL, ((structname*)0)->member)) /* Config space accessors. */ #define virtio_cread(vdev, structname, member, ptr) \ do { \ typeof(((structname*)0)->member) virtio_cread_v; \ \ might_sleep(); \ /* Sanity check: must match the member's type */ \ typecheck(typeof(virtio_to_cpu((vdev), virtio_cread_v)), *(ptr)); \ \ switch (sizeof(virtio_cread_v)) { \ case 1: \ case 2: \ case 4: \ vdev->config->get((vdev), \ offsetof(structname, member), \ &virtio_cread_v, \ sizeof(virtio_cread_v)); \ break; \ default: \ __virtio_cread_many((vdev), \ offsetof(structname, member), \ &virtio_cread_v, \ 1, \ sizeof(virtio_cread_v)); \ break; \ } \ *(ptr) = virtio_to_cpu(vdev, virtio_cread_v); \ } while(0) /* Config space accessors. */ #define virtio_cwrite(vdev, structname, member, ptr) \ do { \ typeof(((structname*)0)->member) virtio_cwrite_v = \ cpu_to_virtio(vdev, *(ptr), ((structname*)0)->member); \ \ might_sleep(); \ /* Sanity check: must match the member's type */ \ typecheck(typeof(virtio_to_cpu((vdev), virtio_cwrite_v)), *(ptr)); \ \ vdev->config->set((vdev), offsetof(structname, member), \ &virtio_cwrite_v, \ sizeof(virtio_cwrite_v)); \ } while(0) /* * Nothing virtio-specific about these, but let's worry about generalizing * these later. */ #define virtio_le_to_cpu(x) \ _Generic((x), \ __u8: (u8)(x), \ __le16: (u16)le16_to_cpu(x), \ __le32: (u32)le32_to_cpu(x), \ __le64: (u64)le64_to_cpu(x) \ ) #define virtio_cpu_to_le(x, m) \ _Generic((m), \ __u8: (x), \ __le16: cpu_to_le16(x), \ __le32: cpu_to_le32(x), \ __le64: cpu_to_le64(x) \ ) /* LE (e.g. modern) Config space accessors. */ #define virtio_cread_le(vdev, structname, member, ptr) \ do { \ typeof(((structname*)0)->member) virtio_cread_v; \ \ might_sleep(); \ /* Sanity check: must match the member's type */ \ typecheck(typeof(virtio_le_to_cpu(virtio_cread_v)), *(ptr)); \ \ switch (sizeof(virtio_cread_v)) { \ case 1: \ case 2: \ case 4: \ vdev->config->get((vdev), \ offsetof(structname, member), \ &virtio_cread_v, \ sizeof(virtio_cread_v)); \ break; \ default: \ __virtio_cread_many((vdev), \ offsetof(structname, member), \ &virtio_cread_v, \ 1, \ sizeof(virtio_cread_v)); \ break; \ } \ *(ptr) = virtio_le_to_cpu(virtio_cread_v); \ } while(0) #define virtio_cwrite_le(vdev, structname, member, ptr) \ do { \ typeof(((structname*)0)->member) virtio_cwrite_v = \ virtio_cpu_to_le(*(ptr), ((structname*)0)->member); \ \ might_sleep(); \ /* Sanity check: must match the member's type */ \ typecheck(typeof(virtio_le_to_cpu(virtio_cwrite_v)), *(ptr)); \ \ vdev->config->set((vdev), offsetof(structname, member), \ &virtio_cwrite_v, \ sizeof(virtio_cwrite_v)); \ } while(0) /* Read @count fields, @bytes each. */ static inline void __virtio_cread_many(struct virtio_device *vdev, unsigned int offset, void *buf, size_t count, size_t bytes) { u32 old, gen = vdev->config->generation ? vdev->config->generation(vdev) : 0; int i; might_sleep(); do { old = gen; for (i = 0; i < count; i++) vdev->config->get(vdev, offset + bytes * i, buf + i * bytes, bytes); gen = vdev->config->generation ? vdev->config->generation(vdev) : 0; } while (gen != old); } static inline void virtio_cread_bytes(struct virtio_device *vdev, unsigned int offset, void *buf, size_t len) { __virtio_cread_many(vdev, offset, buf, len, 1); } static inline u8 virtio_cread8(struct virtio_device *vdev, unsigned int offset) { u8 ret; might_sleep(); vdev->config->get(vdev, offset, &ret, sizeof(ret)); return ret; } static inline void virtio_cwrite8(struct virtio_device *vdev, unsigned int offset, u8 val) { might_sleep(); vdev->config->set(vdev, offset, &val, sizeof(val)); } static inline u16 virtio_cread16(struct virtio_device *vdev, unsigned int offset) { __virtio16 ret; might_sleep(); vdev->config->get(vdev, offset, &ret, sizeof(ret)); return virtio16_to_cpu(vdev, ret); } static inline void virtio_cwrite16(struct virtio_device *vdev, unsigned int offset, u16 val) { __virtio16 v; might_sleep(); v = cpu_to_virtio16(vdev, val); vdev->config->set(vdev, offset, &v, sizeof(v)); } static inline u32 virtio_cread32(struct virtio_device *vdev, unsigned int offset) { __virtio32 ret; might_sleep(); vdev->config->get(vdev, offset, &ret, sizeof(ret)); return virtio32_to_cpu(vdev, ret); } static inline void virtio_cwrite32(struct virtio_device *vdev, unsigned int offset, u32 val) { __virtio32 v; might_sleep(); v = cpu_to_virtio32(vdev, val); vdev->config->set(vdev, offset, &v, sizeof(v)); } static inline u64 virtio_cread64(struct virtio_device *vdev, unsigned int offset) { __virtio64 ret; __virtio_cread_many(vdev, offset, &ret, 1, sizeof(ret)); return virtio64_to_cpu(vdev, ret); } static inline void virtio_cwrite64(struct virtio_device *vdev, unsigned int offset, u64 val) { __virtio64 v; might_sleep(); v = cpu_to_virtio64(vdev, val); vdev->config->set(vdev, offset, &v, sizeof(v)); } /* Conditional config space accessors. */ #define virtio_cread_feature(vdev, fbit, structname, member, ptr) \ ({ \ int _r = 0; \ if (!virtio_has_feature(vdev, fbit)) \ _r = -ENOENT; \ else \ virtio_cread((vdev), structname, member, ptr); \ _r; \ }) /* Conditional config space accessors. */ #define virtio_cread_le_feature(vdev, fbit, structname, member, ptr) \ ({ \ int _r = 0; \ if (!virtio_has_feature(vdev, fbit)) \ _r = -ENOENT; \ else \ virtio_cread_le((vdev), structname, member, ptr); \ _r; \ }) #ifdef CONFIG_ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS int arch_has_restricted_virtio_memory_access(void); #else static inline int arch_has_restricted_virtio_memory_access(void) { return 0; } #endif /* CONFIG_ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS */ #endif /* _LINUX_VIRTIO_CONFIG_H */ PK ! �M�� � rhashtable-types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Resizable, Scalable, Concurrent Hash Table * * Simple structures that might be needed in include * files. */ #ifndef _LINUX_RHASHTABLE_TYPES_H #define _LINUX_RHASHTABLE_TYPES_H #include <linux/atomic.h> #include <linux/compiler.h> #include <linux/mutex.h> #include <linux/workqueue.h> struct rhash_head { struct rhash_head __rcu *next; }; struct rhlist_head { struct rhash_head rhead; struct rhlist_head __rcu *next; }; struct bucket_table; /** * struct rhashtable_compare_arg - Key for the function rhashtable_compare * @ht: Hash table * @key: Key to compare against */ struct rhashtable_compare_arg { struct rhashtable *ht; const void *key; }; typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed); typedef u32 (*rht_obj_hashfn_t)(const void *data, u32 len, u32 seed); typedef int (*rht_obj_cmpfn_t)(struct rhashtable_compare_arg *arg, const void *obj); /** * struct rhashtable_params - Hash table construction parameters * @nelem_hint: Hint on number of elements, should be 75% of desired size * @key_len: Length of key * @key_offset: Offset of key in struct to be hashed * @head_offset: Offset of rhash_head in struct to be hashed * @max_size: Maximum size while expanding * @min_size: Minimum size while shrinking * @automatic_shrinking: Enable automatic shrinking of tables * @hashfn: Hash function (default: jhash2 if !(key_len % 4), or jhash) * @obj_hashfn: Function to hash object * @obj_cmpfn: Function to compare key with object */ struct rhashtable_params { u16 nelem_hint; u16 key_len; u16 key_offset; u16 head_offset; unsigned int max_size; u16 min_size; bool automatic_shrinking; rht_hashfn_t hashfn; rht_obj_hashfn_t obj_hashfn; rht_obj_cmpfn_t obj_cmpfn; }; /** * struct rhashtable - Hash table handle * @tbl: Bucket table * @key_len: Key length for hashfn * @max_elems: Maximum number of elements in table * @p: Configuration parameters * @rhlist: True if this is an rhltable * @run_work: Deferred worker to expand/shrink asynchronously * @mutex: Mutex to protect current/future table swapping * @lock: Spin lock to protect walker list * @nelems: Number of elements in table */ struct rhashtable { struct bucket_table __rcu *tbl; unsigned int key_len; unsigned int max_elems; struct rhashtable_params p; bool rhlist; struct work_struct run_work; struct mutex mutex; spinlock_t lock; atomic_t nelems; }; /** * struct rhltable - Hash table with duplicate objects in a list * @ht: Underlying rhtable */ struct rhltable { struct rhashtable ht; }; /** * struct rhashtable_walker - Hash table walker * @list: List entry on list of walkers * @tbl: The table that we were walking over */ struct rhashtable_walker { struct list_head list; struct bucket_table *tbl; }; /** * struct rhashtable_iter - Hash table iterator * @ht: Table to iterate through * @p: Current pointer * @list: Current hash list pointer * @walker: Associated rhashtable walker * @slot: Current slot * @skip: Number of entries to skip in slot */ struct rhashtable_iter { struct rhashtable *ht; struct rhash_head *p; struct rhlist_head *list; struct rhashtable_walker walker; unsigned int slot; unsigned int skip; bool end_of_table; }; int rhashtable_init(struct rhashtable *ht, const struct rhashtable_params *params); int rhltable_init(struct rhltable *hlt, const struct rhashtable_params *params); #endif /* _LINUX_RHASHTABLE_TYPES_H */ PK ! ��%< < psi.hnu �[��� #ifndef _LINUX_PSI_H #define _LINUX_PSI_H #include <linux/jump_label.h> #include <linux/psi_types.h> #include <linux/sched.h> #include <linux/poll.h> struct seq_file; struct css_set; #ifdef CONFIG_PSI extern struct static_key_false psi_disabled; extern struct psi_group psi_system; void psi_init(void); void psi_task_change(struct task_struct *task, int clear, int set); void psi_task_switch(struct task_struct *prev, struct task_struct *next, bool sleep); void psi_memstall_enter(unsigned long *flags); void psi_memstall_leave(unsigned long *flags); int psi_show(struct seq_file *s, struct psi_group *group, enum psi_res res); struct psi_trigger *psi_trigger_create(struct psi_group *group, char *buf, size_t nbytes, enum psi_res res); void psi_trigger_destroy(struct psi_trigger *t); __poll_t psi_trigger_poll(void **trigger_ptr, struct file *file, poll_table *wait); #ifdef CONFIG_CGROUPS int psi_cgroup_alloc(struct cgroup *cgrp); void psi_cgroup_free(struct cgroup *cgrp); void cgroup_move_task(struct task_struct *p, struct css_set *to); #endif #else /* CONFIG_PSI */ static inline void psi_init(void) {} static inline void psi_memstall_enter(unsigned long *flags) {} static inline void psi_memstall_leave(unsigned long *flags) {} #ifdef CONFIG_CGROUPS static inline int psi_cgroup_alloc(struct cgroup *cgrp) { return 0; } static inline void psi_cgroup_free(struct cgroup *cgrp) { } static inline void cgroup_move_task(struct task_struct *p, struct css_set *to) { rcu_assign_pointer(p->cgroups, to); } #endif #endif /* CONFIG_PSI */ #endif /* _LINUX_PSI_H */ PK ! a��j�i �i lz4.hnu �[��� /* LZ4 Kernel Interface * * Copyright (C) 2013, LG Electronics, Kyungsik Lee <kyungsik.lee@lge.com> * Copyright (C) 2016, Sven Schmidt <4sschmid@informatik.uni-hamburg.de> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This file is based on the original header file * for LZ4 - Fast LZ compression algorithm. * * LZ4 - Fast LZ compression algorithm * Copyright (C) 2011-2016, Yann Collet. * BSD 2-Clause License (http://www.opensource.org/licenses/bsd-license.php) * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following disclaimer * in the documentation and/or other materials provided with the * distribution. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * You can contact the author at : * - LZ4 homepage : http://www.lz4.org * - LZ4 source repository : https://github.com/lz4/lz4 */ #ifndef __LZ4_H__ #define __LZ4_H__ #include <linux/types.h> #include <linux/string.h> /* memset, memcpy */ /*-************************************************************************ * CONSTANTS **************************************************************************/ /* * LZ4_MEMORY_USAGE : * Memory usage formula : N->2^N Bytes * (examples : 10 -> 1KB; 12 -> 4KB ; 16 -> 64KB; 20 -> 1MB; etc.) * Increasing memory usage improves compression ratio * Reduced memory usage can improve speed, due to cache effect * Default value is 14, for 16KB, which nicely fits into Intel x86 L1 cache */ #define LZ4_MEMORY_USAGE 14 #define LZ4_MAX_INPUT_SIZE 0x7E000000 /* 2 113 929 216 bytes */ #define LZ4_COMPRESSBOUND(isize) (\ (unsigned int)(isize) > (unsigned int)LZ4_MAX_INPUT_SIZE \ ? 0 \ : (isize) + ((isize)/255) + 16) #define LZ4_ACCELERATION_DEFAULT 1 #define LZ4_HASHLOG (LZ4_MEMORY_USAGE-2) #define LZ4_HASHTABLESIZE (1 << LZ4_MEMORY_USAGE) #define LZ4_HASH_SIZE_U32 (1 << LZ4_HASHLOG) #define LZ4HC_MIN_CLEVEL 3 #define LZ4HC_DEFAULT_CLEVEL 9 #define LZ4HC_MAX_CLEVEL 16 #define LZ4HC_DICTIONARY_LOGSIZE 16 #define LZ4HC_MAXD (1<<LZ4HC_DICTIONARY_LOGSIZE) #define LZ4HC_MAXD_MASK (LZ4HC_MAXD - 1) #define LZ4HC_HASH_LOG (LZ4HC_DICTIONARY_LOGSIZE - 1) #define LZ4HC_HASHTABLESIZE (1 << LZ4HC_HASH_LOG) #define LZ4HC_HASH_MASK (LZ4HC_HASHTABLESIZE - 1) /*-************************************************************************ * STREAMING CONSTANTS AND STRUCTURES **************************************************************************/ #define LZ4_STREAMSIZE_U64 ((1 << (LZ4_MEMORY_USAGE - 3)) + 4) #define LZ4_STREAMSIZE (LZ4_STREAMSIZE_U64 * sizeof(unsigned long long)) #define LZ4_STREAMHCSIZE 262192 #define LZ4_STREAMHCSIZE_SIZET (262192 / sizeof(size_t)) #define LZ4_STREAMDECODESIZE_U64 4 #define LZ4_STREAMDECODESIZE (LZ4_STREAMDECODESIZE_U64 * \ sizeof(unsigned long long)) /* * LZ4_stream_t - information structure to track an LZ4 stream. */ typedef struct { uint32_t hashTable[LZ4_HASH_SIZE_U32]; uint32_t currentOffset; uint32_t initCheck; const uint8_t *dictionary; uint8_t *bufferStart; uint32_t dictSize; } LZ4_stream_t_internal; typedef union { unsigned long long table[LZ4_STREAMSIZE_U64]; LZ4_stream_t_internal internal_donotuse; } LZ4_stream_t; /* * LZ4_streamHC_t - information structure to track an LZ4HC stream. */ typedef struct { unsigned int hashTable[LZ4HC_HASHTABLESIZE]; unsigned short chainTable[LZ4HC_MAXD]; /* next block to continue on current prefix */ const unsigned char *end; /* All index relative to this position */ const unsigned char *base; /* alternate base for extDict */ const unsigned char *dictBase; /* below that point, need extDict */ unsigned int dictLimit; /* below that point, no more dict */ unsigned int lowLimit; /* index from which to continue dict update */ unsigned int nextToUpdate; unsigned int compressionLevel; } LZ4HC_CCtx_internal; typedef union { size_t table[LZ4_STREAMHCSIZE_SIZET]; LZ4HC_CCtx_internal internal_donotuse; } LZ4_streamHC_t; /* * LZ4_streamDecode_t - information structure to track an * LZ4 stream during decompression. * * init this structure using LZ4_setStreamDecode (or memset()) before first use */ typedef struct { const uint8_t *externalDict; size_t extDictSize; const uint8_t *prefixEnd; size_t prefixSize; } LZ4_streamDecode_t_internal; typedef union { unsigned long long table[LZ4_STREAMDECODESIZE_U64]; LZ4_streamDecode_t_internal internal_donotuse; } LZ4_streamDecode_t; /*-************************************************************************ * SIZE OF STATE **************************************************************************/ #define LZ4_MEM_COMPRESS LZ4_STREAMSIZE #define LZ4HC_MEM_COMPRESS LZ4_STREAMHCSIZE /*-************************************************************************ * Compression Functions **************************************************************************/ /** * LZ4_compressBound() - Max. output size in worst case szenarios * @isize: Size of the input data * * Return: Max. size LZ4 may output in a "worst case" szenario * (data not compressible) */ static inline int LZ4_compressBound(size_t isize) { return LZ4_COMPRESSBOUND(isize); } /** * LZ4_compress_default() - Compress data from source to dest * @source: source address of the original data * @dest: output buffer address of the compressed data * @inputSize: size of the input data. Max supported value is LZ4_MAX_INPUT_SIZE * @maxOutputSize: full or partial size of buffer 'dest' * which must be already allocated * @wrkmem: address of the working memory. * This requires 'workmem' of LZ4_MEM_COMPRESS. * * Compresses 'sourceSize' bytes from buffer 'source' * into already allocated 'dest' buffer of size 'maxOutputSize'. * Compression is guaranteed to succeed if * 'maxOutputSize' >= LZ4_compressBound(inputSize). * It also runs faster, so it's a recommended setting. * If the function cannot compress 'source' into a more limited 'dest' budget, * compression stops *immediately*, and the function result is zero. * As a consequence, 'dest' content is not valid. * * Return: Number of bytes written into buffer 'dest' * (necessarily <= maxOutputSize) or 0 if compression fails */ int LZ4_compress_default(const char *source, char *dest, int inputSize, int maxOutputSize, void *wrkmem); /** * LZ4_compress_fast() - As LZ4_compress_default providing an acceleration param * @source: source address of the original data * @dest: output buffer address of the compressed data * @inputSize: size of the input data. Max supported value is LZ4_MAX_INPUT_SIZE * @maxOutputSize: full or partial size of buffer 'dest' * which must be already allocated * @acceleration: acceleration factor * @wrkmem: address of the working memory. * This requires 'workmem' of LZ4_MEM_COMPRESS. * * Same as LZ4_compress_default(), but allows to select an "acceleration" * factor. The larger the acceleration value, the faster the algorithm, * but also the lesser the compression. It's a trade-off. It can be fine tuned, * with each successive value providing roughly +~3% to speed. * An acceleration value of "1" is the same as regular LZ4_compress_default() * Values <= 0 will be replaced by LZ4_ACCELERATION_DEFAULT, which is 1. * * Return: Number of bytes written into buffer 'dest' * (necessarily <= maxOutputSize) or 0 if compression fails */ int LZ4_compress_fast(const char *source, char *dest, int inputSize, int maxOutputSize, int acceleration, void *wrkmem); /** * LZ4_compress_destSize() - Compress as much data as possible * from source to dest * @source: source address of the original data * @dest: output buffer address of the compressed data * @sourceSizePtr: will be modified to indicate how many bytes where read * from 'source' to fill 'dest'. New value is necessarily <= old value. * @targetDestSize: Size of buffer 'dest' which must be already allocated * @wrkmem: address of the working memory. * This requires 'workmem' of LZ4_MEM_COMPRESS. * * Reverse the logic, by compressing as much data as possible * from 'source' buffer into already allocated buffer 'dest' * of size 'targetDestSize'. * This function either compresses the entire 'source' content into 'dest' * if it's large enough, or fill 'dest' buffer completely with as much data as * possible from 'source'. * * Return: Number of bytes written into 'dest' (necessarily <= targetDestSize) * or 0 if compression fails */ int LZ4_compress_destSize(const char *source, char *dest, int *sourceSizePtr, int targetDestSize, void *wrkmem); /*-************************************************************************ * Decompression Functions **************************************************************************/ /** * LZ4_decompress_fast() - Decompresses data from 'source' into 'dest' * @source: source address of the compressed data * @dest: output buffer address of the uncompressed data * which must be already allocated with 'originalSize' bytes * @originalSize: is the original and therefore uncompressed size * * Decompresses data from 'source' into 'dest'. * This function fully respect memory boundaries for properly formed * compressed data. * It is a bit faster than LZ4_decompress_safe(). * However, it does not provide any protection against intentionally * modified data stream (malicious input). * Use this function in trusted environment only * (data to decode comes from a trusted source). * * Return: number of bytes read from the source buffer * or a negative result if decompression fails. */ int LZ4_decompress_fast(const char *source, char *dest, int originalSize); /** * LZ4_decompress_safe() - Decompression protected against buffer overflow * @source: source address of the compressed data * @dest: output buffer address of the uncompressed data * which must be already allocated * @compressedSize: is the precise full size of the compressed block * @maxDecompressedSize: is the size of 'dest' buffer * * Decompresses data from 'source' into 'dest'. * If the source stream is detected malformed, the function will * stop decoding and return a negative result. * This function is protected against buffer overflow exploits, * including malicious data packets. It never writes outside output buffer, * nor reads outside input buffer. * * Return: number of bytes decompressed into destination buffer * (necessarily <= maxDecompressedSize) * or a negative result in case of error */ int LZ4_decompress_safe(const char *source, char *dest, int compressedSize, int maxDecompressedSize); /** * LZ4_decompress_safe_partial() - Decompress a block of size 'compressedSize' * at position 'source' into buffer 'dest' * @source: source address of the compressed data * @dest: output buffer address of the decompressed data which must be * already allocated * @compressedSize: is the precise full size of the compressed block. * @targetOutputSize: the decompression operation will try * to stop as soon as 'targetOutputSize' has been reached * @maxDecompressedSize: is the size of destination buffer * * This function decompresses a compressed block of size 'compressedSize' * at position 'source' into destination buffer 'dest' * of size 'maxDecompressedSize'. * The function tries to stop decompressing operation as soon as * 'targetOutputSize' has been reached, reducing decompression time. * This function never writes outside of output buffer, * and never reads outside of input buffer. * It is therefore protected against malicious data packets. * * Return: the number of bytes decoded in the destination buffer * (necessarily <= maxDecompressedSize) * or a negative result in case of error * */ int LZ4_decompress_safe_partial(const char *source, char *dest, int compressedSize, int targetOutputSize, int maxDecompressedSize); /*-************************************************************************ * LZ4 HC Compression **************************************************************************/ /** * LZ4_compress_HC() - Compress data from `src` into `dst`, using HC algorithm * @src: source address of the original data * @dst: output buffer address of the compressed data * @srcSize: size of the input data. Max supported value is LZ4_MAX_INPUT_SIZE * @dstCapacity: full or partial size of buffer 'dst', * which must be already allocated * @compressionLevel: Recommended values are between 4 and 9, although any * value between 1 and LZ4HC_MAX_CLEVEL will work. * Values >LZ4HC_MAX_CLEVEL behave the same as 16. * @wrkmem: address of the working memory. * This requires 'wrkmem' of size LZ4HC_MEM_COMPRESS. * * Compress data from 'src' into 'dst', using the more powerful * but slower "HC" algorithm. Compression is guaranteed to succeed if * `dstCapacity >= LZ4_compressBound(srcSize) * * Return : the number of bytes written into 'dst' or 0 if compression fails. */ int LZ4_compress_HC(const char *src, char *dst, int srcSize, int dstCapacity, int compressionLevel, void *wrkmem); /** * LZ4_resetStreamHC() - Init an allocated 'LZ4_streamHC_t' structure * @streamHCPtr: pointer to the 'LZ4_streamHC_t' structure * @compressionLevel: Recommended values are between 4 and 9, although any * value between 1 and LZ4HC_MAX_CLEVEL will work. * Values >LZ4HC_MAX_CLEVEL behave the same as 16. * * An LZ4_streamHC_t structure can be allocated once * and re-used multiple times. * Use this function to init an allocated `LZ4_streamHC_t` structure * and start a new compression. */ void LZ4_resetStreamHC(LZ4_streamHC_t *streamHCPtr, int compressionLevel); /** * LZ4_loadDictHC() - Load a static dictionary into LZ4_streamHC * @streamHCPtr: pointer to the LZ4HC_stream_t * @dictionary: dictionary to load * @dictSize: size of dictionary * * Use this function to load a static dictionary into LZ4HC_stream. * Any previous data will be forgotten, only 'dictionary' * will remain in memory. * Loading a size of 0 is allowed. * * Return : dictionary size, in bytes (necessarily <= 64 KB) */ int LZ4_loadDictHC(LZ4_streamHC_t *streamHCPtr, const char *dictionary, int dictSize); /** * LZ4_compress_HC_continue() - Compress 'src' using data from previously * compressed blocks as a dictionary using the HC algorithm * @streamHCPtr: Pointer to the previous 'LZ4_streamHC_t' structure * @src: source address of the original data * @dst: output buffer address of the compressed data, * which must be already allocated * @srcSize: size of the input data. Max supported value is LZ4_MAX_INPUT_SIZE * @maxDstSize: full or partial size of buffer 'dest' * which must be already allocated * * These functions compress data in successive blocks of any size, using * previous blocks as dictionary. One key assumption is that previous * blocks (up to 64 KB) remain read-accessible while * compressing next blocks. There is an exception for ring buffers, * which can be smaller than 64 KB. * Ring buffers scenario is automatically detected and handled by * LZ4_compress_HC_continue(). * Before starting compression, state must be properly initialized, * using LZ4_resetStreamHC(). * A first "fictional block" can then be designated as * initial dictionary, using LZ4_loadDictHC() (Optional). * Then, use LZ4_compress_HC_continue() * to compress each successive block. Previous memory blocks * (including initial dictionary when present) must remain accessible * and unmodified during compression. * 'dst' buffer should be sized to handle worst case scenarios, using * LZ4_compressBound(), to ensure operation success. * If, for any reason, previous data blocks can't be preserved unmodified * in memory during next compression block, * you must save it to a safer memory space, using LZ4_saveDictHC(). * Return value of LZ4_saveDictHC() is the size of dictionary * effectively saved into 'safeBuffer'. * * Return: Number of bytes written into buffer 'dst' or 0 if compression fails */ int LZ4_compress_HC_continue(LZ4_streamHC_t *streamHCPtr, const char *src, char *dst, int srcSize, int maxDstSize); /** * LZ4_saveDictHC() - Save static dictionary from LZ4HC_stream * @streamHCPtr: pointer to the 'LZ4HC_stream_t' structure * @safeBuffer: buffer to save dictionary to, must be already allocated * @maxDictSize: size of 'safeBuffer' * * If previously compressed data block is not guaranteed * to remain available at its memory location, * save it into a safer place (char *safeBuffer). * Note : you don't need to call LZ4_loadDictHC() afterwards, * dictionary is immediately usable, you can therefore call * LZ4_compress_HC_continue(). * * Return : saved dictionary size in bytes (necessarily <= maxDictSize), * or 0 if error. */ int LZ4_saveDictHC(LZ4_streamHC_t *streamHCPtr, char *safeBuffer, int maxDictSize); /*-********************************************* * Streaming Compression Functions ***********************************************/ /** * LZ4_resetStream() - Init an allocated 'LZ4_stream_t' structure * @LZ4_stream: pointer to the 'LZ4_stream_t' structure * * An LZ4_stream_t structure can be allocated once * and re-used multiple times. * Use this function to init an allocated `LZ4_stream_t` structure * and start a new compression. */ void LZ4_resetStream(LZ4_stream_t *LZ4_stream); /** * LZ4_loadDict() - Load a static dictionary into LZ4_stream * @streamPtr: pointer to the LZ4_stream_t * @dictionary: dictionary to load * @dictSize: size of dictionary * * Use this function to load a static dictionary into LZ4_stream. * Any previous data will be forgotten, only 'dictionary' * will remain in memory. * Loading a size of 0 is allowed. * * Return : dictionary size, in bytes (necessarily <= 64 KB) */ int LZ4_loadDict(LZ4_stream_t *streamPtr, const char *dictionary, int dictSize); /** * LZ4_saveDict() - Save static dictionary from LZ4_stream * @streamPtr: pointer to the 'LZ4_stream_t' structure * @safeBuffer: buffer to save dictionary to, must be already allocated * @dictSize: size of 'safeBuffer' * * If previously compressed data block is not guaranteed * to remain available at its memory location, * save it into a safer place (char *safeBuffer). * Note : you don't need to call LZ4_loadDict() afterwards, * dictionary is immediately usable, you can therefore call * LZ4_compress_fast_continue(). * * Return : saved dictionary size in bytes (necessarily <= dictSize), * or 0 if error. */ int LZ4_saveDict(LZ4_stream_t *streamPtr, char *safeBuffer, int dictSize); /** * LZ4_compress_fast_continue() - Compress 'src' using data from previously * compressed blocks as a dictionary * @streamPtr: Pointer to the previous 'LZ4_stream_t' structure * @src: source address of the original data * @dst: output buffer address of the compressed data, * which must be already allocated * @srcSize: size of the input data. Max supported value is LZ4_MAX_INPUT_SIZE * @maxDstSize: full or partial size of buffer 'dest' * which must be already allocated * @acceleration: acceleration factor * * Compress buffer content 'src', using data from previously compressed blocks * as dictionary to improve compression ratio. * Important : Previous data blocks are assumed to still * be present and unmodified ! * If maxDstSize >= LZ4_compressBound(srcSize), * compression is guaranteed to succeed, and runs faster. * * Return: Number of bytes written into buffer 'dst' or 0 if compression fails */ int LZ4_compress_fast_continue(LZ4_stream_t *streamPtr, const char *src, char *dst, int srcSize, int maxDstSize, int acceleration); /** * LZ4_setStreamDecode() - Instruct where to find dictionary * @LZ4_streamDecode: the 'LZ4_streamDecode_t' structure * @dictionary: dictionary to use * @dictSize: size of dictionary * * Use this function to instruct where to find the dictionary. * Setting a size of 0 is allowed (same effect as reset). * * Return: 1 if OK, 0 if error */ int LZ4_setStreamDecode(LZ4_streamDecode_t *LZ4_streamDecode, const char *dictionary, int dictSize); /** * LZ4_decompress_safe_continue() - Decompress blocks in streaming mode * @LZ4_streamDecode: the 'LZ4_streamDecode_t' structure * @source: source address of the compressed data * @dest: output buffer address of the uncompressed data * which must be already allocated * @compressedSize: is the precise full size of the compressed block * @maxDecompressedSize: is the size of 'dest' buffer * * This decoding function allows decompression of multiple blocks * in "streaming" mode. * Previously decoded blocks *must* remain available at the memory position * where they were decoded (up to 64 KB) * In the case of a ring buffers, decoding buffer must be either : * - Exactly same size as encoding buffer, with same update rule * (block boundaries at same positions) In which case, * the decoding & encoding ring buffer can have any size, * including very small ones ( < 64 KB). * - Larger than encoding buffer, by a minimum of maxBlockSize more bytes. * maxBlockSize is implementation dependent. * It's the maximum size you intend to compress into a single block. * In which case, encoding and decoding buffers do not need * to be synchronized, and encoding ring buffer can have any size, * including small ones ( < 64 KB). * - _At least_ 64 KB + 8 bytes + maxBlockSize. * In which case, encoding and decoding buffers do not need to be * synchronized, and encoding ring buffer can have any size, * including larger than decoding buffer. W * Whenever these conditions are not possible, save the last 64KB of decoded * data into a safe buffer, and indicate where it is saved * using LZ4_setStreamDecode() * * Return: number of bytes decompressed into destination buffer * (necessarily <= maxDecompressedSize) * or a negative result in case of error */ int LZ4_decompress_safe_continue(LZ4_streamDecode_t *LZ4_streamDecode, const char *source, char *dest, int compressedSize, int maxDecompressedSize); /** * LZ4_decompress_fast_continue() - Decompress blocks in streaming mode * @LZ4_streamDecode: the 'LZ4_streamDecode_t' structure * @source: source address of the compressed data * @dest: output buffer address of the uncompressed data * which must be already allocated with 'originalSize' bytes * @originalSize: is the original and therefore uncompressed size * * This decoding function allows decompression of multiple blocks * in "streaming" mode. * Previously decoded blocks *must* remain available at the memory position * where they were decoded (up to 64 KB) * In the case of a ring buffers, decoding buffer must be either : * - Exactly same size as encoding buffer, with same update rule * (block boundaries at same positions) In which case, * the decoding & encoding ring buffer can have any size, * including very small ones ( < 64 KB). * - Larger than encoding buffer, by a minimum of maxBlockSize more bytes. * maxBlockSize is implementation dependent. * It's the maximum size you intend to compress into a single block. * In which case, encoding and decoding buffers do not need * to be synchronized, and encoding ring buffer can have any size, * including small ones ( < 64 KB). * - _At least_ 64 KB + 8 bytes + maxBlockSize. * In which case, encoding and decoding buffers do not need to be * synchronized, and encoding ring buffer can have any size, * including larger than decoding buffer. W * Whenever these conditions are not possible, save the last 64KB of decoded * data into a safe buffer, and indicate where it is saved * using LZ4_setStreamDecode() * * Return: number of bytes decompressed into destination buffer * (necessarily <= maxDecompressedSize) * or a negative result in case of error */ int LZ4_decompress_fast_continue(LZ4_streamDecode_t *LZ4_streamDecode, const char *source, char *dest, int originalSize); /** * LZ4_decompress_safe_usingDict() - Same as LZ4_setStreamDecode() * followed by LZ4_decompress_safe_continue() * @source: source address of the compressed data * @dest: output buffer address of the uncompressed data * which must be already allocated * @compressedSize: is the precise full size of the compressed block * @maxDecompressedSize: is the size of 'dest' buffer * @dictStart: pointer to the start of the dictionary in memory * @dictSize: size of dictionary * * This decoding function works the same as * a combination of LZ4_setStreamDecode() followed by * LZ4_decompress_safe_continue() * It is stand-alone, and doesn't need an LZ4_streamDecode_t structure. * * Return: number of bytes decompressed into destination buffer * (necessarily <= maxDecompressedSize) * or a negative result in case of error */ int LZ4_decompress_safe_usingDict(const char *source, char *dest, int compressedSize, int maxDecompressedSize, const char *dictStart, int dictSize); /** * LZ4_decompress_fast_usingDict() - Same as LZ4_setStreamDecode() * followed by LZ4_decompress_fast_continue() * @source: source address of the compressed data * @dest: output buffer address of the uncompressed data * which must be already allocated with 'originalSize' bytes * @originalSize: is the original and therefore uncompressed size * @dictStart: pointer to the start of the dictionary in memory * @dictSize: size of dictionary * * This decoding function works the same as * a combination of LZ4_setStreamDecode() followed by * LZ4_decompress_fast_continue() * It is stand-alone, and doesn't need an LZ4_streamDecode_t structure. * * Return: number of bytes decompressed into destination buffer * (necessarily <= maxDecompressedSize) * or a negative result in case of error */ int LZ4_decompress_fast_usingDict(const char *source, char *dest, int originalSize, const char *dictStart, int dictSize); #endif PK ! 4�0#� � cacheinfo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CACHEINFO_H #define _LINUX_CACHEINFO_H #include <linux/bitops.h> #include <linux/cpu.h> #include <linux/cpumask.h> #include <linux/smp.h> struct device_node; struct attribute; enum cache_type { CACHE_TYPE_NOCACHE = 0, CACHE_TYPE_INST = BIT(0), CACHE_TYPE_DATA = BIT(1), CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA, CACHE_TYPE_UNIFIED = BIT(2), }; extern unsigned int coherency_max_size; /** * struct cacheinfo - represent a cache leaf node * @id: This cache's id. It is unique among caches with the same (type, level). * @type: type of the cache - data, inst or unified * @level: represents the hierarchy in the multi-level cache * @coherency_line_size: size of each cache line usually representing * the minimum amount of data that gets transferred from memory * @number_of_sets: total number of sets, a set is a collection of cache * lines sharing the same index * @ways_of_associativity: number of ways in which a particular memory * block can be placed in the cache * @physical_line_partition: number of physical cache lines sharing the * same cachetag * @size: Total size of the cache * @shared_cpu_map: logical cpumask representing all the cpus sharing * this cache node * @attributes: bitfield representing various cache attributes * @fw_token: Unique value used to determine if different cacheinfo * structures represent a single hardware cache instance. * @disable_sysfs: indicates whether this node is visible to the user via * sysfs or not * @priv: pointer to any private data structure specific to particular * cache design * * While @of_node, @disable_sysfs and @priv are used for internal book * keeping, the remaining members form the core properties of the cache */ struct cacheinfo { unsigned int id; enum cache_type type; unsigned int level; unsigned int coherency_line_size; unsigned int number_of_sets; unsigned int ways_of_associativity; unsigned int physical_line_partition; unsigned int size; cpumask_t shared_cpu_map; unsigned int attributes; #define CACHE_WRITE_THROUGH BIT(0) #define CACHE_WRITE_BACK BIT(1) #define CACHE_WRITE_POLICY_MASK \ (CACHE_WRITE_THROUGH | CACHE_WRITE_BACK) #define CACHE_READ_ALLOCATE BIT(2) #define CACHE_WRITE_ALLOCATE BIT(3) #define CACHE_ALLOCATE_POLICY_MASK \ (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE) #define CACHE_ID BIT(4) void *fw_token; bool disable_sysfs; void *priv; }; struct cpu_cacheinfo { struct cacheinfo *info_list; unsigned int num_levels; unsigned int num_leaves; bool cpu_map_populated; }; struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); int init_cache_level(unsigned int cpu); int populate_cache_leaves(unsigned int cpu); int cache_setup_acpi(unsigned int cpu); #ifndef CONFIG_ACPI_PPTT /* * acpi_find_last_cache_level is only called on ACPI enabled * platforms using the PPTT for topology. This means that if * the platform supports other firmware configuration methods * we need to stub out the call when ACPI is disabled. * ACPI enabled platforms not using PPTT won't be making calls * to this function so we need not worry about them. */ static inline int acpi_find_last_cache_level(unsigned int cpu) { return 0; } #else int acpi_find_last_cache_level(unsigned int cpu); #endif const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf); /* * Get the id of the cache associated with @cpu at level @level. * cpuhp lock must be held. */ static inline int get_cpu_cacheinfo_id(int cpu, int level) { struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu); int i; for (i = 0; i < ci->num_leaves; i++) { if (ci->info_list[i].level == level) { if (ci->info_list[i].attributes & CACHE_ID) return ci->info_list[i].id; return -1; } } return -1; } #endif /* _LINUX_CACHEINFO_H */ PK ! �f{$� � errno.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ERRNO_H #define _LINUX_ERRNO_H #include <uapi/linux/errno.h> /* * These should never be seen by user programs. To return one of ERESTART* * codes, signal_pending() MUST be set. Note that ptrace can observe these * at syscall exit tracing, but they will never be left for the debugged user * process to see. */ #define ERESTARTSYS 512 #define ERESTARTNOINTR 513 #define ERESTARTNOHAND 514 /* restart if no handler.. */ #define ENOIOCTLCMD 515 /* No ioctl command */ #define ERESTART_RESTARTBLOCK 516 /* restart by calling sys_restart_syscall */ #define EPROBE_DEFER 517 /* Driver requests probe retry */ #define EOPENSTALE 518 /* open found a stale dentry */ #define ENOPARAM 519 /* Parameter not supported */ /* Defined for the NFSv3 protocol */ #define EBADHANDLE 521 /* Illegal NFS file handle */ #define ENOTSYNC 522 /* Update synchronization mismatch */ #define EBADCOOKIE 523 /* Cookie is stale */ #define ENOTSUPP 524 /* Operation is not supported */ #define ETOOSMALL 525 /* Buffer or request is too small */ #define ESERVERFAULT 526 /* An untranslatable error occurred */ #define EBADTYPE 527 /* Type not supported by server */ #define EJUKEBOX 528 /* Request initiated, but will not complete before timeout */ #define EIOCBQUEUED 529 /* iocb queued, will get completion event */ #define ERECALLCONFLICT 530 /* conflict with recalled state */ #define ENOGRACE 531 /* NFS file lock reclaim refused */ #endif PK ! AH)� � spinlock_types_up.hnu �[��� #ifndef __LINUX_SPINLOCK_TYPES_UP_H #define __LINUX_SPINLOCK_TYPES_UP_H #ifndef __LINUX_SPINLOCK_TYPES_H # error "please don't include this file directly" #endif /* * include/linux/spinlock_types_up.h - spinlock type definitions for UP * * portions Copyright 2005, Red Hat, Inc., Ingo Molnar * Released under the General Public License (GPL). */ #ifdef CONFIG_DEBUG_SPINLOCK typedef struct { volatile unsigned int slock; } arch_spinlock_t; #define __ARCH_SPIN_LOCK_UNLOCKED { 1 } #else typedef struct { } arch_spinlock_t; #define __ARCH_SPIN_LOCK_UNLOCKED { } #endif typedef struct { /* no debug version on UP */ } arch_rwlock_t; #define __ARCH_RW_LOCK_UNLOCKED { } #endif /* __LINUX_SPINLOCK_TYPES_UP_H */ PK ! ���X� � sched.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SCHED_H #define _LINUX_SCHED_H /* * Define 'struct task_struct' and provide the main scheduler * APIs (schedule(), wakeup variants, etc.) */ #include <uapi/linux/sched.h> #include <asm/current.h> #include <linux/pid.h> #include <linux/sem.h> #include <linux/shm.h> #include <linux/mutex.h> #include <linux/plist.h> #include <linux/hrtimer.h> #include <linux/irqflags.h> #include <linux/seccomp.h> #include <linux/nodemask.h> #include <linux/rcupdate.h> #include <linux/refcount.h> #include <linux/resource.h> #include <linux/latencytop.h> #include <linux/sched/prio.h> #include <linux/sched/types.h> #include <linux/signal_types.h> #include <linux/syscall_user_dispatch.h> #include <linux/mm_types_task.h> #include <linux/task_io_accounting.h> #include <linux/posix-timers.h> #include <linux/rseq.h> #include <linux/seqlock.h> #include <linux/kcsan.h> #include <asm/kmap_size.h> /* task_struct member predeclarations (sorted alphabetically): */ struct audit_context; struct backing_dev_info; struct bio_list; struct blk_plug; struct bpf_local_storage; struct bpf_run_ctx; struct capture_control; struct cfs_rq; struct fs_struct; struct futex_pi_state; struct io_context; struct io_uring_task; struct mempolicy; struct nameidata; struct nsproxy; struct perf_event_context; struct pid_namespace; struct pipe_inode_info; struct rcu_node; struct reclaim_state; struct robust_list_head; struct root_domain; struct rq; struct sched_attr; struct sched_param; struct seq_file; struct sighand_struct; struct signal_struct; struct task_delay_info; struct task_group; /* * Task state bitmask. NOTE! These bits are also * encoded in fs/proc/array.c: get_task_state(). * * We have two separate sets of flags: task->state * is about runnability, while task->exit_state are * about the task exiting. Confusing, but this way * modifying one set can't modify the other one by * mistake. */ /* Used in tsk->state: */ #define TASK_RUNNING 0x0000 #define TASK_INTERRUPTIBLE 0x0001 #define TASK_UNINTERRUPTIBLE 0x0002 #define __TASK_STOPPED 0x0004 #define __TASK_TRACED 0x0008 /* Used in tsk->exit_state: */ #define EXIT_DEAD 0x0010 #define EXIT_ZOMBIE 0x0020 #define EXIT_TRACE (EXIT_ZOMBIE | EXIT_DEAD) /* Used in tsk->state again: */ #define TASK_PARKED 0x0040 #define TASK_DEAD 0x0080 #define TASK_WAKEKILL 0x0100 #define TASK_WAKING 0x0200 #define TASK_NOLOAD 0x0400 #define TASK_NEW 0x0800 /* RT specific auxilliary flag to mark RT lock waiters */ #define TASK_RTLOCK_WAIT 0x1000 #define TASK_STATE_MAX 0x2000 /* Convenience macros for the sake of set_current_state: */ #define TASK_KILLABLE (TASK_WAKEKILL | TASK_UNINTERRUPTIBLE) #define TASK_STOPPED (TASK_WAKEKILL | __TASK_STOPPED) #define TASK_TRACED (TASK_WAKEKILL | __TASK_TRACED) #define TASK_IDLE (TASK_UNINTERRUPTIBLE | TASK_NOLOAD) /* Convenience macros for the sake of wake_up(): */ #define TASK_NORMAL (TASK_INTERRUPTIBLE | TASK_UNINTERRUPTIBLE) /* get_task_state(): */ #define TASK_REPORT (TASK_RUNNING | TASK_INTERRUPTIBLE | \ TASK_UNINTERRUPTIBLE | __TASK_STOPPED | \ __TASK_TRACED | EXIT_DEAD | EXIT_ZOMBIE | \ TASK_PARKED) #define task_is_running(task) (READ_ONCE((task)->__state) == TASK_RUNNING) #define task_is_traced(task) ((READ_ONCE(task->__state) & __TASK_TRACED) != 0) #define task_is_stopped(task) ((READ_ONCE(task->__state) & __TASK_STOPPED) != 0) #define task_is_stopped_or_traced(task) ((READ_ONCE(task->__state) & (__TASK_STOPPED | __TASK_TRACED)) != 0) /* * Special states are those that do not use the normal wait-loop pattern. See * the comment with set_special_state(). */ #define is_special_task_state(state) \ ((state) & (__TASK_STOPPED | __TASK_TRACED | TASK_PARKED | TASK_DEAD)) #ifdef CONFIG_DEBUG_ATOMIC_SLEEP # define debug_normal_state_change(state_value) \ do { \ WARN_ON_ONCE(is_special_task_state(state_value)); \ current->task_state_change = _THIS_IP_; \ } while (0) # define debug_special_state_change(state_value) \ do { \ WARN_ON_ONCE(!is_special_task_state(state_value)); \ current->task_state_change = _THIS_IP_; \ } while (0) # define debug_rtlock_wait_set_state() \ do { \ current->saved_state_change = current->task_state_change;\ current->task_state_change = _THIS_IP_; \ } while (0) # define debug_rtlock_wait_restore_state() \ do { \ current->task_state_change = current->saved_state_change;\ } while (0) #else # define debug_normal_state_change(cond) do { } while (0) # define debug_special_state_change(cond) do { } while (0) # define debug_rtlock_wait_set_state() do { } while (0) # define debug_rtlock_wait_restore_state() do { } while (0) #endif /* * set_current_state() includes a barrier so that the write of current->state * is correctly serialised wrt the caller's subsequent test of whether to * actually sleep: * * for (;;) { * set_current_state(TASK_UNINTERRUPTIBLE); * if (CONDITION) * break; * * schedule(); * } * __set_current_state(TASK_RUNNING); * * If the caller does not need such serialisation (because, for instance, the * CONDITION test and condition change and wakeup are under the same lock) then * use __set_current_state(). * * The above is typically ordered against the wakeup, which does: * * CONDITION = 1; * wake_up_state(p, TASK_UNINTERRUPTIBLE); * * where wake_up_state()/try_to_wake_up() executes a full memory barrier before * accessing p->state. * * Wakeup will do: if (@state & p->state) p->state = TASK_RUNNING, that is, * once it observes the TASK_UNINTERRUPTIBLE store the waking CPU can issue a * TASK_RUNNING store which can collide with __set_current_state(TASK_RUNNING). * * However, with slightly different timing the wakeup TASK_RUNNING store can * also collide with the TASK_UNINTERRUPTIBLE store. Losing that store is not * a problem either because that will result in one extra go around the loop * and our @cond test will save the day. * * Also see the comments of try_to_wake_up(). */ #define __set_current_state(state_value) \ do { \ debug_normal_state_change((state_value)); \ WRITE_ONCE(current->__state, (state_value)); \ } while (0) #define set_current_state(state_value) \ do { \ debug_normal_state_change((state_value)); \ smp_store_mb(current->__state, (state_value)); \ } while (0) /* * set_special_state() should be used for those states when the blocking task * can not use the regular condition based wait-loop. In that case we must * serialize against wakeups such that any possible in-flight TASK_RUNNING * stores will not collide with our state change. */ #define set_special_state(state_value) \ do { \ unsigned long flags; /* may shadow */ \ \ raw_spin_lock_irqsave(¤t->pi_lock, flags); \ debug_special_state_change((state_value)); \ WRITE_ONCE(current->__state, (state_value)); \ raw_spin_unlock_irqrestore(¤t->pi_lock, flags); \ } while (0) /* * PREEMPT_RT specific variants for "sleeping" spin/rwlocks * * RT's spin/rwlock substitutions are state preserving. The state of the * task when blocking on the lock is saved in task_struct::saved_state and * restored after the lock has been acquired. These operations are * serialized by task_struct::pi_lock against try_to_wake_up(). Any non RT * lock related wakeups while the task is blocked on the lock are * redirected to operate on task_struct::saved_state to ensure that these * are not dropped. On restore task_struct::saved_state is set to * TASK_RUNNING so any wakeup attempt redirected to saved_state will fail. * * The lock operation looks like this: * * current_save_and_set_rtlock_wait_state(); * for (;;) { * if (try_lock()) * break; * raw_spin_unlock_irq(&lock->wait_lock); * schedule_rtlock(); * raw_spin_lock_irq(&lock->wait_lock); * set_current_state(TASK_RTLOCK_WAIT); * } * current_restore_rtlock_saved_state(); */ #define current_save_and_set_rtlock_wait_state() \ do { \ lockdep_assert_irqs_disabled(); \ raw_spin_lock(¤t->pi_lock); \ current->saved_state = current->__state; \ debug_rtlock_wait_set_state(); \ WRITE_ONCE(current->__state, TASK_RTLOCK_WAIT); \ raw_spin_unlock(¤t->pi_lock); \ } while (0); #define current_restore_rtlock_saved_state() \ do { \ lockdep_assert_irqs_disabled(); \ raw_spin_lock(¤t->pi_lock); \ debug_rtlock_wait_restore_state(); \ WRITE_ONCE(current->__state, current->saved_state); \ current->saved_state = TASK_RUNNING; \ raw_spin_unlock(¤t->pi_lock); \ } while (0); #define get_current_state() READ_ONCE(current->__state) /* Task command name length: */ #define TASK_COMM_LEN 16 extern void scheduler_tick(void); #define MAX_SCHEDULE_TIMEOUT LONG_MAX extern long schedule_timeout(long timeout); extern long schedule_timeout_interruptible(long timeout); extern long schedule_timeout_killable(long timeout); extern long schedule_timeout_uninterruptible(long timeout); extern long schedule_timeout_idle(long timeout); asmlinkage void schedule(void); extern void schedule_preempt_disabled(void); asmlinkage void preempt_schedule_irq(void); #ifdef CONFIG_PREEMPT_RT extern void schedule_rtlock(void); #endif extern int __must_check io_schedule_prepare(void); extern void io_schedule_finish(int token); extern long io_schedule_timeout(long timeout); extern void io_schedule(void); /** * struct prev_cputime - snapshot of system and user cputime * @utime: time spent in user mode * @stime: time spent in system mode * @lock: protects the above two fields * * Stores previous user/system time values such that we can guarantee * monotonicity. */ struct prev_cputime { #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE u64 utime; u64 stime; raw_spinlock_t lock; #endif }; enum vtime_state { /* Task is sleeping or running in a CPU with VTIME inactive: */ VTIME_INACTIVE = 0, /* Task is idle */ VTIME_IDLE, /* Task runs in kernelspace in a CPU with VTIME active: */ VTIME_SYS, /* Task runs in userspace in a CPU with VTIME active: */ VTIME_USER, /* Task runs as guests in a CPU with VTIME active: */ VTIME_GUEST, }; struct vtime { seqcount_t seqcount; unsigned long long starttime; enum vtime_state state; unsigned int cpu; u64 utime; u64 stime; u64 gtime; }; /* * Utilization clamp constraints. * @UCLAMP_MIN: Minimum utilization * @UCLAMP_MAX: Maximum utilization * @UCLAMP_CNT: Utilization clamp constraints count */ enum uclamp_id { UCLAMP_MIN = 0, UCLAMP_MAX, UCLAMP_CNT }; #ifdef CONFIG_SMP extern struct root_domain def_root_domain; extern struct mutex sched_domains_mutex; #endif struct sched_info { #ifdef CONFIG_SCHED_INFO /* Cumulative counters: */ /* # of times we have run on this CPU: */ unsigned long pcount; /* Time spent waiting on a runqueue: */ unsigned long long run_delay; /* Timestamps: */ /* When did we last run on a CPU? */ unsigned long long last_arrival; /* When were we last queued to run? */ unsigned long long last_queued; #endif /* CONFIG_SCHED_INFO */ }; /* * Integer metrics need fixed point arithmetic, e.g., sched/fair * has a few: load, load_avg, util_avg, freq, and capacity. * * We define a basic fixed point arithmetic range, and then formalize * all these metrics based on that basic range. */ # define SCHED_FIXEDPOINT_SHIFT 10 # define SCHED_FIXEDPOINT_SCALE (1L << SCHED_FIXEDPOINT_SHIFT) /* Increase resolution of cpu_capacity calculations */ # define SCHED_CAPACITY_SHIFT SCHED_FIXEDPOINT_SHIFT # define SCHED_CAPACITY_SCALE (1L << SCHED_CAPACITY_SHIFT) struct load_weight { unsigned long weight; u32 inv_weight; }; /** * struct util_est - Estimation utilization of FAIR tasks * @enqueued: instantaneous estimated utilization of a task/cpu * @ewma: the Exponential Weighted Moving Average (EWMA) * utilization of a task * * Support data structure to track an Exponential Weighted Moving Average * (EWMA) of a FAIR task's utilization. New samples are added to the moving * average each time a task completes an activation. Sample's weight is chosen * so that the EWMA will be relatively insensitive to transient changes to the * task's workload. * * The enqueued attribute has a slightly different meaning for tasks and cpus: * - task: the task's util_avg at last task dequeue time * - cfs_rq: the sum of util_est.enqueued for each RUNNABLE task on that CPU * Thus, the util_est.enqueued of a task represents the contribution on the * estimated utilization of the CPU where that task is currently enqueued. * * Only for tasks we track a moving average of the past instantaneous * estimated utilization. This allows to absorb sporadic drops in utilization * of an otherwise almost periodic task. * * The UTIL_AVG_UNCHANGED flag is used to synchronize util_est with util_avg * updates. When a task is dequeued, its util_est should not be updated if its * util_avg has not been updated in the meantime. * This information is mapped into the MSB bit of util_est.enqueued at dequeue * time. Since max value of util_est.enqueued for a task is 1024 (PELT util_avg * for a task) it is safe to use MSB. */ struct util_est { unsigned int enqueued; unsigned int ewma; #define UTIL_EST_WEIGHT_SHIFT 2 #define UTIL_AVG_UNCHANGED 0x80000000 } __attribute__((__aligned__(sizeof(u64)))); /* * The load/runnable/util_avg accumulates an infinite geometric series * (see __update_load_avg_cfs_rq() in kernel/sched/pelt.c). * * [load_avg definition] * * load_avg = runnable% * scale_load_down(load) * * [runnable_avg definition] * * runnable_avg = runnable% * SCHED_CAPACITY_SCALE * * [util_avg definition] * * util_avg = running% * SCHED_CAPACITY_SCALE * * where runnable% is the time ratio that a sched_entity is runnable and * running% the time ratio that a sched_entity is running. * * For cfs_rq, they are the aggregated values of all runnable and blocked * sched_entities. * * The load/runnable/util_avg doesn't directly factor frequency scaling and CPU * capacity scaling. The scaling is done through the rq_clock_pelt that is used * for computing those signals (see update_rq_clock_pelt()) * * N.B., the above ratios (runnable% and running%) themselves are in the * range of [0, 1]. To do fixed point arithmetics, we therefore scale them * to as large a range as necessary. This is for example reflected by * util_avg's SCHED_CAPACITY_SCALE. * * [Overflow issue] * * The 64-bit load_sum can have 4353082796 (=2^64/47742/88761) entities * with the highest load (=88761), always runnable on a single cfs_rq, * and should not overflow as the number already hits PID_MAX_LIMIT. * * For all other cases (including 32-bit kernels), struct load_weight's * weight will overflow first before we do, because: * * Max(load_avg) <= Max(load.weight) * * Then it is the load_weight's responsibility to consider overflow * issues. */ struct sched_avg { u64 last_update_time; u64 load_sum; u64 runnable_sum; u32 util_sum; u32 period_contrib; unsigned long load_avg; unsigned long runnable_avg; unsigned long util_avg; struct util_est util_est; } ____cacheline_aligned; struct sched_statistics { #ifdef CONFIG_SCHEDSTATS u64 wait_start; u64 wait_max; u64 wait_count; u64 wait_sum; u64 iowait_count; u64 iowait_sum; u64 sleep_start; u64 sleep_max; s64 sum_sleep_runtime; u64 block_start; u64 block_max; u64 exec_max; u64 slice_max; u64 nr_migrations_cold; u64 nr_failed_migrations_affine; u64 nr_failed_migrations_running; u64 nr_failed_migrations_hot; u64 nr_forced_migrations; u64 nr_wakeups; u64 nr_wakeups_sync; u64 nr_wakeups_migrate; u64 nr_wakeups_local; u64 nr_wakeups_remote; u64 nr_wakeups_affine; u64 nr_wakeups_affine_attempts; u64 nr_wakeups_passive; u64 nr_wakeups_idle; #endif } ____cacheline_aligned; struct sched_entity { /* For load-balancing: */ struct load_weight load; struct rb_node run_node; struct list_head group_node; unsigned int on_rq; u64 exec_start; u64 sum_exec_runtime; u64 vruntime; u64 prev_sum_exec_runtime; u64 nr_migrations; #ifdef CONFIG_FAIR_GROUP_SCHED int depth; struct sched_entity *parent; /* rq on which this entity is (to be) queued: */ struct cfs_rq *cfs_rq; /* rq "owned" by this entity/group: */ struct cfs_rq *my_q; /* cached value of my_q->h_nr_running */ unsigned long runnable_weight; #endif #ifdef CONFIG_SMP /* * Per entity load average tracking. * * Put into separate cache line so it does not * collide with read-mostly values above. */ struct sched_avg avg; #endif }; struct sched_rt_entity { struct list_head run_list; unsigned long timeout; unsigned long watchdog_stamp; unsigned int time_slice; unsigned short on_rq; unsigned short on_list; struct sched_rt_entity *back; #ifdef CONFIG_RT_GROUP_SCHED struct sched_rt_entity *parent; /* rq on which this entity is (to be) queued: */ struct rt_rq *rt_rq; /* rq "owned" by this entity/group: */ struct rt_rq *my_q; #endif } __randomize_layout; struct sched_dl_entity { struct rb_node rb_node; /* * Original scheduling parameters. Copied here from sched_attr * during sched_setattr(), they will remain the same until * the next sched_setattr(). */ u64 dl_runtime; /* Maximum runtime for each instance */ u64 dl_deadline; /* Relative deadline of each instance */ u64 dl_period; /* Separation of two instances (period) */ u64 dl_bw; /* dl_runtime / dl_period */ u64 dl_density; /* dl_runtime / dl_deadline */ /* * Actual scheduling parameters. Initialized with the values above, * they are continuously updated during task execution. Note that * the remaining runtime could be < 0 in case we are in overrun. */ s64 runtime; /* Remaining runtime for this instance */ u64 deadline; /* Absolute deadline for this instance */ unsigned int flags; /* Specifying the scheduler behaviour */ /* * Some bool flags: * * @dl_throttled tells if we exhausted the runtime. If so, the * task has to wait for a replenishment to be performed at the * next firing of dl_timer. * * @dl_yielded tells if task gave up the CPU before consuming * all its available runtime during the last job. * * @dl_non_contending tells if the task is inactive while still * contributing to the active utilization. In other words, it * indicates if the inactive timer has been armed and its handler * has not been executed yet. This flag is useful to avoid race * conditions between the inactive timer handler and the wakeup * code. * * @dl_overrun tells if the task asked to be informed about runtime * overruns. */ unsigned int dl_throttled : 1; unsigned int dl_yielded : 1; unsigned int dl_non_contending : 1; unsigned int dl_overrun : 1; /* * Bandwidth enforcement timer. Each -deadline task has its * own bandwidth to be enforced, thus we need one timer per task. */ struct hrtimer dl_timer; /* * Inactive timer, responsible for decreasing the active utilization * at the "0-lag time". When a -deadline task blocks, it contributes * to GRUB's active utilization until the "0-lag time", hence a * timer is needed to decrease the active utilization at the correct * time. */ struct hrtimer inactive_timer; #ifdef CONFIG_RT_MUTEXES /* * Priority Inheritance. When a DEADLINE scheduling entity is boosted * pi_se points to the donor, otherwise points to the dl_se it belongs * to (the original one/itself). */ struct sched_dl_entity *pi_se; #endif }; #ifdef CONFIG_UCLAMP_TASK /* Number of utilization clamp buckets (shorter alias) */ #define UCLAMP_BUCKETS CONFIG_UCLAMP_BUCKETS_COUNT /* * Utilization clamp for a scheduling entity * @value: clamp value "assigned" to a se * @bucket_id: bucket index corresponding to the "assigned" value * @active: the se is currently refcounted in a rq's bucket * @user_defined: the requested clamp value comes from user-space * * The bucket_id is the index of the clamp bucket matching the clamp value * which is pre-computed and stored to avoid expensive integer divisions from * the fast path. * * The active bit is set whenever a task has got an "effective" value assigned, * which can be different from the clamp value "requested" from user-space. * This allows to know a task is refcounted in the rq's bucket corresponding * to the "effective" bucket_id. * * The user_defined bit is set whenever a task has got a task-specific clamp * value requested from userspace, i.e. the system defaults apply to this task * just as a restriction. This allows to relax default clamps when a less * restrictive task-specific value has been requested, thus allowing to * implement a "nice" semantic. For example, a task running with a 20% * default boost can still drop its own boosting to 0%. */ struct uclamp_se { unsigned int value : bits_per(SCHED_CAPACITY_SCALE); unsigned int bucket_id : bits_per(UCLAMP_BUCKETS); unsigned int active : 1; unsigned int user_defined : 1; }; #endif /* CONFIG_UCLAMP_TASK */ union rcu_special { struct { u8 blocked; u8 need_qs; u8 exp_hint; /* Hint for performance. */ u8 need_mb; /* Readers need smp_mb(). */ } b; /* Bits. */ u32 s; /* Set of bits. */ }; enum perf_event_task_context { perf_invalid_context = -1, perf_hw_context = 0, perf_sw_context, perf_nr_task_contexts, }; struct wake_q_node { struct wake_q_node *next; }; struct kmap_ctrl { #ifdef CONFIG_KMAP_LOCAL int idx; pte_t pteval[KM_MAX_IDX]; #endif }; struct task_struct { #ifdef CONFIG_THREAD_INFO_IN_TASK /* * For reasons of header soup (see current_thread_info()), this * must be the first element of task_struct. */ struct thread_info thread_info; #endif unsigned int __state; #ifdef CONFIG_PREEMPT_RT /* saved state for "spinlock sleepers" */ unsigned int saved_state; #endif /* * This begins the randomizable portion of task_struct. Only * scheduling-critical items should be added above here. */ randomized_struct_fields_start void *stack; refcount_t usage; /* Per task flags (PF_*), defined further below: */ unsigned int flags; unsigned int ptrace; #ifdef CONFIG_SMP int on_cpu; struct __call_single_node wake_entry; #ifdef CONFIG_THREAD_INFO_IN_TASK /* Current CPU: */ unsigned int cpu; #endif unsigned int wakee_flips; unsigned long wakee_flip_decay_ts; struct task_struct *last_wakee; /* * recent_used_cpu is initially set as the last CPU used by a task * that wakes affine another task. Waker/wakee relationships can * push tasks around a CPU where each wakeup moves to the next one. * Tracking a recently used CPU allows a quick search for a recently * used CPU that may be idle. */ int recent_used_cpu; int wake_cpu; #endif int on_rq; int prio; int static_prio; int normal_prio; unsigned int rt_priority; const struct sched_class *sched_class; struct sched_entity se; struct sched_rt_entity rt; struct sched_dl_entity dl; #ifdef CONFIG_SCHED_CORE struct rb_node core_node; unsigned long core_cookie; unsigned int core_occupation; #endif #ifdef CONFIG_CGROUP_SCHED struct task_group *sched_task_group; #endif #ifdef CONFIG_UCLAMP_TASK /* * Clamp values requested for a scheduling entity. * Must be updated with task_rq_lock() held. */ struct uclamp_se uclamp_req[UCLAMP_CNT]; /* * Effective clamp values used for a scheduling entity. * Must be updated with task_rq_lock() held. */ struct uclamp_se uclamp[UCLAMP_CNT]; #endif struct sched_statistics stats; #ifdef CONFIG_PREEMPT_NOTIFIERS /* List of struct preempt_notifier: */ struct hlist_head preempt_notifiers; #endif #ifdef CONFIG_BLK_DEV_IO_TRACE unsigned int btrace_seq; #endif unsigned int policy; int nr_cpus_allowed; const cpumask_t *cpus_ptr; cpumask_t *user_cpus_ptr; cpumask_t cpus_mask; void *migration_pending; #ifdef CONFIG_SMP unsigned short migration_disabled; #endif unsigned short migration_flags; #ifdef CONFIG_PREEMPT_RCU int rcu_read_lock_nesting; union rcu_special rcu_read_unlock_special; struct list_head rcu_node_entry; struct rcu_node *rcu_blocked_node; #endif /* #ifdef CONFIG_PREEMPT_RCU */ #ifdef CONFIG_TASKS_RCU unsigned long rcu_tasks_nvcsw; u8 rcu_tasks_holdout; u8 rcu_tasks_idx; int rcu_tasks_idle_cpu; struct list_head rcu_tasks_holdout_list; #endif /* #ifdef CONFIG_TASKS_RCU */ #ifdef CONFIG_TASKS_TRACE_RCU int trc_reader_nesting; int trc_ipi_to_cpu; union rcu_special trc_reader_special; bool trc_reader_checked; struct list_head trc_holdout_list; #endif /* #ifdef CONFIG_TASKS_TRACE_RCU */ struct sched_info sched_info; struct list_head tasks; #ifdef CONFIG_SMP struct plist_node pushable_tasks; struct rb_node pushable_dl_tasks; #endif struct mm_struct *mm; struct mm_struct *active_mm; /* Per-thread vma caching: */ struct vmacache vmacache; #ifdef SPLIT_RSS_COUNTING struct task_rss_stat rss_stat; #endif int exit_state; int exit_code; int exit_signal; /* The signal sent when the parent dies: */ int pdeath_signal; /* JOBCTL_*, siglock protected: */ unsigned long jobctl; /* Used for emulating ABI behavior of previous Linux versions: */ unsigned int personality; /* Scheduler bits, serialized by scheduler locks: */ unsigned sched_reset_on_fork:1; unsigned sched_contributes_to_load:1; unsigned sched_migrated:1; unsigned sched_task_hot:1; /* Force alignment to the next boundary: */ unsigned :0; /* Unserialized, strictly 'current' */ /* * This field must not be in the scheduler word above due to wakelist * queueing no longer being serialized by p->on_cpu. However: * * p->XXX = X; ttwu() * schedule() if (p->on_rq && ..) // false * smp_mb__after_spinlock(); if (smp_load_acquire(&p->on_cpu) && //true * deactivate_task() ttwu_queue_wakelist()) * p->on_rq = 0; p->sched_remote_wakeup = Y; * * guarantees all stores of 'current' are visible before * ->sched_remote_wakeup gets used, so it can be in this word. */ unsigned sched_remote_wakeup:1; /* Save user-dumpable when mm goes away */ unsigned user_dumpable:1; /* Bit to tell LSMs we're in execve(): */ unsigned in_execve:1; unsigned in_iowait:1; #ifndef TIF_RESTORE_SIGMASK unsigned restore_sigmask:1; #endif #ifdef CONFIG_MEMCG unsigned in_user_fault:1; #endif #ifdef CONFIG_COMPAT_BRK unsigned brk_randomized:1; #endif #ifdef CONFIG_CGROUPS /* disallow userland-initiated cgroup migration */ unsigned no_cgroup_migration:1; /* task is frozen/stopped (used by the cgroup freezer) */ unsigned frozen:1; #endif #ifdef CONFIG_BLK_CGROUP unsigned use_memdelay:1; #endif #ifdef CONFIG_PSI /* Stalled due to lack of memory */ unsigned in_memstall:1; #endif #ifdef CONFIG_PAGE_OWNER /* Used by page_owner=on to detect recursion in page tracking. */ unsigned in_page_owner:1; #endif #ifdef CONFIG_EVENTFD /* Recursion prevention for eventfd_signal() */ unsigned in_eventfd:1; #endif unsigned long atomic_flags; /* Flags requiring atomic access. */ struct restart_block restart_block; pid_t pid; pid_t tgid; #ifdef CONFIG_STACKPROTECTOR /* Canary value for the -fstack-protector GCC feature: */ unsigned long stack_canary; #endif /* * Pointers to the (original) parent process, youngest child, younger sibling, * older sibling, respectively. (p->father can be replaced with * p->real_parent->pid) */ /* Real parent process: */ struct task_struct __rcu *real_parent; /* Recipient of SIGCHLD, wait4() reports: */ struct task_struct __rcu *parent; /* * Children/sibling form the list of natural children: */ struct list_head children; struct list_head sibling; struct task_struct *group_leader; /* * 'ptraced' is the list of tasks this task is using ptrace() on. * * This includes both natural children and PTRACE_ATTACH targets. * 'ptrace_entry' is this task's link on the p->parent->ptraced list. */ struct list_head ptraced; struct list_head ptrace_entry; /* PID/PID hash table linkage. */ struct pid *thread_pid; struct hlist_node pid_links[PIDTYPE_MAX]; struct list_head thread_group; struct list_head thread_node; struct completion *vfork_done; /* CLONE_CHILD_SETTID: */ int __user *set_child_tid; /* CLONE_CHILD_CLEARTID: */ int __user *clear_child_tid; /* PF_IO_WORKER */ void *pf_io_worker; u64 utime; u64 stime; #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME u64 utimescaled; u64 stimescaled; #endif u64 gtime; struct prev_cputime prev_cputime; #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN struct vtime vtime; #endif #ifdef CONFIG_NO_HZ_FULL atomic_t tick_dep_mask; #endif /* Context switch counts: */ unsigned long nvcsw; unsigned long nivcsw; /* Monotonic time in nsecs: */ u64 start_time; /* Boot based time in nsecs: */ u64 start_boottime; /* MM fault and swap info: this can arguably be seen as either mm-specific or thread-specific: */ unsigned long min_flt; unsigned long maj_flt; /* Empty if CONFIG_POSIX_CPUTIMERS=n */ struct posix_cputimers posix_cputimers; #ifdef CONFIG_POSIX_CPU_TIMERS_TASK_WORK struct posix_cputimers_work posix_cputimers_work; #endif /* Process credentials: */ /* Tracer's credentials at attach: */ const struct cred __rcu *ptracer_cred; /* Objective and real subjective task credentials (COW): */ const struct cred __rcu *real_cred; /* Effective (overridable) subjective task credentials (COW): */ const struct cred __rcu *cred; #ifdef CONFIG_KEYS /* Cached requested key. */ struct key *cached_requested_key; #endif /* * executable name, excluding path. * * - normally initialized setup_new_exec() * - access it with [gs]et_task_comm() * - lock it with task_lock() */ char comm[TASK_COMM_LEN]; struct nameidata *nameidata; #ifdef CONFIG_SYSVIPC struct sysv_sem sysvsem; struct sysv_shm sysvshm; #endif #ifdef CONFIG_DETECT_HUNG_TASK unsigned long last_switch_count; unsigned long last_switch_time; #endif /* Filesystem information: */ struct fs_struct *fs; /* Open file information: */ struct files_struct *files; #ifdef CONFIG_IO_URING struct io_uring_task *io_uring; #endif /* Namespaces: */ struct nsproxy *nsproxy; /* Signal handlers: */ struct signal_struct *signal; struct sighand_struct __rcu *sighand; sigset_t blocked; sigset_t real_blocked; /* Restored if set_restore_sigmask() was used: */ sigset_t saved_sigmask; struct sigpending pending; unsigned long sas_ss_sp; size_t sas_ss_size; unsigned int sas_ss_flags; struct callback_head *task_works; #ifdef CONFIG_AUDIT #ifdef CONFIG_AUDITSYSCALL struct audit_context *audit_context; #endif kuid_t loginuid; unsigned int sessionid; #endif struct seccomp seccomp; struct syscall_user_dispatch syscall_dispatch; /* Thread group tracking: */ u64 parent_exec_id; u64 self_exec_id; /* Protection against (de-)allocation: mm, files, fs, tty, keyrings, mems_allowed, mempolicy: */ spinlock_t alloc_lock; /* Protection of the PI data structures: */ raw_spinlock_t pi_lock; struct wake_q_node wake_q; #ifdef CONFIG_RT_MUTEXES /* PI waiters blocked on a rt_mutex held by this task: */ struct rb_root_cached pi_waiters; /* Updated under owner's pi_lock and rq lock */ struct task_struct *pi_top_task; /* Deadlock detection and priority inheritance handling: */ struct rt_mutex_waiter *pi_blocked_on; #endif #ifdef CONFIG_DEBUG_MUTEXES /* Mutex deadlock detection: */ struct mutex_waiter *blocked_on; #endif #ifdef CONFIG_DEBUG_ATOMIC_SLEEP int non_block_count; #endif #ifdef CONFIG_TRACE_IRQFLAGS struct irqtrace_events irqtrace; unsigned int hardirq_threaded; u64 hardirq_chain_key; int softirqs_enabled; int softirq_context; int irq_config; #endif #ifdef CONFIG_PREEMPT_RT int softirq_disable_cnt; #endif #ifdef CONFIG_LOCKDEP # define MAX_LOCK_DEPTH 48UL u64 curr_chain_key; int lockdep_depth; unsigned int lockdep_recursion; struct held_lock held_locks[MAX_LOCK_DEPTH]; #endif #if defined(CONFIG_UBSAN) && !defined(CONFIG_UBSAN_TRAP) unsigned int in_ubsan; #endif /* Journalling filesystem info: */ void *journal_info; /* Stacked block device info: */ struct bio_list *bio_list; #ifdef CONFIG_BLOCK /* Stack plugging: */ struct blk_plug *plug; #endif /* VM state: */ struct reclaim_state *reclaim_state; struct backing_dev_info *backing_dev_info; struct io_context *io_context; #ifdef CONFIG_COMPACTION struct capture_control *capture_control; #endif /* Ptrace state: */ unsigned long ptrace_message; kernel_siginfo_t *last_siginfo; struct task_io_accounting ioac; #ifdef CONFIG_PSI /* Pressure stall state */ unsigned int psi_flags; #endif #ifdef CONFIG_TASK_XACCT /* Accumulated RSS usage: */ u64 acct_rss_mem1; /* Accumulated virtual memory usage: */ u64 acct_vm_mem1; /* stime + utime since last update: */ u64 acct_timexpd; #endif #ifdef CONFIG_CPUSETS /* Protected by ->alloc_lock: */ nodemask_t mems_allowed; /* Sequence number to catch updates: */ seqcount_spinlock_t mems_allowed_seq; int cpuset_mem_spread_rotor; int cpuset_slab_spread_rotor; #endif #ifdef CONFIG_CGROUPS /* Control Group info protected by css_set_lock: */ struct css_set __rcu *cgroups; /* cg_list protected by css_set_lock and tsk->alloc_lock: */ struct list_head cg_list; #endif #ifdef CONFIG_X86_CPU_RESCTRL u32 closid; u32 rmid; #endif #ifdef CONFIG_FUTEX struct robust_list_head __user *robust_list; #ifdef CONFIG_COMPAT struct compat_robust_list_head __user *compat_robust_list; #endif struct list_head pi_state_list; struct futex_pi_state *pi_state_cache; struct mutex futex_exit_mutex; unsigned int futex_state; #endif #ifdef CONFIG_PERF_EVENTS struct perf_event_context *perf_event_ctxp[perf_nr_task_contexts]; struct mutex perf_event_mutex; struct list_head perf_event_list; #endif #ifdef CONFIG_DEBUG_PREEMPT unsigned long preempt_disable_ip; #endif #ifdef CONFIG_NUMA /* Protected by alloc_lock: */ struct mempolicy *mempolicy; short il_prev; short pref_node_fork; #endif #ifdef CONFIG_NUMA_BALANCING int numa_scan_seq; unsigned int numa_scan_period; unsigned int numa_scan_period_max; int numa_preferred_nid; unsigned long numa_migrate_retry; /* Migration stamp: */ u64 node_stamp; u64 last_task_numa_placement; u64 last_sum_exec_runtime; struct callback_head numa_work; /* * This pointer is only modified for current in syscall and * pagefault context (and for tasks being destroyed), so it can be read * from any of the following contexts: * - RCU read-side critical section * - current->numa_group from everywhere * - task's runqueue locked, task not running */ struct numa_group __rcu *numa_group; /* * numa_faults is an array split into four regions: * faults_memory, faults_cpu, faults_memory_buffer, faults_cpu_buffer * in this precise order. * * faults_memory: Exponential decaying average of faults on a per-node * basis. Scheduling placement decisions are made based on these * counts. The values remain static for the duration of a PTE scan. * faults_cpu: Track the nodes the process was running on when a NUMA * hinting fault was incurred. * faults_memory_buffer and faults_cpu_buffer: Record faults per node * during the current scan window. When the scan completes, the counts * in faults_memory and faults_cpu decay and these values are copied. */ unsigned long *numa_faults; unsigned long total_numa_faults; /* * numa_faults_locality tracks if faults recorded during the last * scan window were remote/local or failed to migrate. The task scan * period is adapted based on the locality of the faults with different * weights depending on whether they were shared or private faults */ unsigned long numa_faults_locality[3]; unsigned long numa_pages_migrated; #endif /* CONFIG_NUMA_BALANCING */ #ifdef CONFIG_RSEQ struct rseq __user *rseq; u32 rseq_sig; /* * RmW on rseq_event_mask must be performed atomically * with respect to preemption. */ unsigned long rseq_event_mask; #endif struct tlbflush_unmap_batch tlb_ubc; union { refcount_t rcu_users; struct rcu_head rcu; }; /* Cache last used pipe for splice(): */ struct pipe_inode_info *splice_pipe; struct page_frag task_frag; #ifdef CONFIG_TASK_DELAY_ACCT struct task_delay_info *delays; #endif #ifdef CONFIG_FAULT_INJECTION int make_it_fail; unsigned int fail_nth; #endif /* * When (nr_dirtied >= nr_dirtied_pause), it's time to call * balance_dirty_pages() for a dirty throttling pause: */ int nr_dirtied; int nr_dirtied_pause; /* Start of a write-and-pause period: */ unsigned long dirty_paused_when; #ifdef CONFIG_LATENCYTOP int latency_record_count; struct latency_record latency_record[LT_SAVECOUNT]; #endif /* * Time slack values; these are used to round up poll() and * select() etc timeout values. These are in nanoseconds. */ u64 timer_slack_ns; u64 default_timer_slack_ns; #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS) unsigned int kasan_depth; #endif #ifdef CONFIG_KCSAN struct kcsan_ctx kcsan_ctx; #ifdef CONFIG_TRACE_IRQFLAGS struct irqtrace_events kcsan_save_irqtrace; #endif #endif #if IS_ENABLED(CONFIG_KUNIT) struct kunit *kunit_test; #endif #ifdef CONFIG_FUNCTION_GRAPH_TRACER /* Index of current stored address in ret_stack: */ int curr_ret_stack; int curr_ret_depth; /* Stack of return addresses for return function tracing: */ struct ftrace_ret_stack *ret_stack; /* Timestamp for last schedule: */ unsigned long long ftrace_timestamp; /* * Number of functions that haven't been traced * because of depth overrun: */ atomic_t trace_overrun; /* Pause tracing: */ atomic_t tracing_graph_pause; #endif #ifdef CONFIG_TRACING /* State flags for use by tracers: */ unsigned long trace; /* Bitmask and counter of trace recursion: */ unsigned long trace_recursion; #endif /* CONFIG_TRACING */ #ifdef CONFIG_KCOV /* See kernel/kcov.c for more details. */ /* Coverage collection mode enabled for this task (0 if disabled): */ unsigned int kcov_mode; /* Size of the kcov_area: */ unsigned int kcov_size; /* Buffer for coverage collection: */ void *kcov_area; /* KCOV descriptor wired with this task or NULL: */ struct kcov *kcov; /* KCOV common handle for remote coverage collection: */ u64 kcov_handle; /* KCOV sequence number: */ int kcov_sequence; /* Collect coverage from softirq context: */ unsigned int kcov_softirq; #endif #ifdef CONFIG_MEMCG struct mem_cgroup *memcg_in_oom; gfp_t memcg_oom_gfp_mask; int memcg_oom_order; /* Number of pages to reclaim on returning to userland: */ unsigned int memcg_nr_pages_over_high; /* Used by memcontrol for targeted memcg charge: */ struct mem_cgroup *active_memcg; #endif #ifdef CONFIG_BLK_CGROUP struct request_queue *throttle_queue; #endif #ifdef CONFIG_UPROBES struct uprobe_task *utask; #endif #if defined(CONFIG_BCACHE) || defined(CONFIG_BCACHE_MODULE) unsigned int sequential_io; unsigned int sequential_io_avg; #endif struct kmap_ctrl kmap_ctrl; #ifdef CONFIG_DEBUG_ATOMIC_SLEEP unsigned long task_state_change; # ifdef CONFIG_PREEMPT_RT unsigned long saved_state_change; # endif #endif int pagefault_disabled; #ifdef CONFIG_MMU struct task_struct *oom_reaper_list; struct timer_list oom_reaper_timer; #endif #ifdef CONFIG_VMAP_STACK struct vm_struct *stack_vm_area; #endif #ifdef CONFIG_THREAD_INFO_IN_TASK /* A live task holds one reference: */ refcount_t stack_refcount; #endif #ifdef CONFIG_LIVEPATCH int patch_state; #endif #ifdef CONFIG_SECURITY /* Used by LSM modules for access restriction: */ void *security; #endif #ifdef CONFIG_BPF_SYSCALL /* Used by BPF task local storage */ struct bpf_local_storage __rcu *bpf_storage; /* Used for BPF run context */ struct bpf_run_ctx *bpf_ctx; #endif #ifdef CONFIG_GCC_PLUGIN_STACKLEAK unsigned long lowest_stack; unsigned long prev_lowest_stack; #endif #ifdef CONFIG_X86_MCE void __user *mce_vaddr; __u64 mce_kflags; u64 mce_addr; __u64 mce_ripv : 1, mce_whole_page : 1, __mce_reserved : 62; struct callback_head mce_kill_me; int mce_count; #endif #ifdef CONFIG_KRETPROBES struct llist_head kretprobe_instances; #endif #ifdef CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH /* * If L1D flush is supported on mm context switch * then we use this callback head to queue kill work * to kill tasks that are not running on SMT disabled * cores */ struct callback_head l1d_flush_kill; #endif /* * New fields for task_struct should be added above here, so that * they are included in the randomized portion of task_struct. */ randomized_struct_fields_end /* CPU-specific state of this task: */ struct thread_struct thread; /* * WARNING: on x86, 'thread_struct' contains a variable-sized * structure. It *MUST* be at the end of 'task_struct'. * * Do not put anything below here! */ }; static inline struct pid *task_pid(struct task_struct *task) { return task->thread_pid; } /* * the helpers to get the task's different pids as they are seen * from various namespaces * * task_xid_nr() : global id, i.e. the id seen from the init namespace; * task_xid_vnr() : virtual id, i.e. the id seen from the pid namespace of * current. * task_xid_nr_ns() : id seen from the ns specified; * * see also pid_nr() etc in include/linux/pid.h */ pid_t __task_pid_nr_ns(struct task_struct *task, enum pid_type type, struct pid_namespace *ns); static inline pid_t task_pid_nr(struct task_struct *tsk) { return tsk->pid; } static inline pid_t task_pid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns) { return __task_pid_nr_ns(tsk, PIDTYPE_PID, ns); } static inline pid_t task_pid_vnr(struct task_struct *tsk) { return __task_pid_nr_ns(tsk, PIDTYPE_PID, NULL); } static inline pid_t task_tgid_nr(struct task_struct *tsk) { return tsk->tgid; } /** * pid_alive - check that a task structure is not stale * @p: Task structure to be checked. * * Test if a process is not yet dead (at most zombie state) * If pid_alive fails, then pointers within the task structure * can be stale and must not be dereferenced. * * Return: 1 if the process is alive. 0 otherwise. */ static inline int pid_alive(const struct task_struct *p) { return p->thread_pid != NULL; } static inline pid_t task_pgrp_nr_ns(struct task_struct *tsk, struct pid_namespace *ns) { return __task_pid_nr_ns(tsk, PIDTYPE_PGID, ns); } static inline pid_t task_pgrp_vnr(struct task_struct *tsk) { return __task_pid_nr_ns(tsk, PIDTYPE_PGID, NULL); } static inline pid_t task_session_nr_ns(struct task_struct *tsk, struct pid_namespace *ns) { return __task_pid_nr_ns(tsk, PIDTYPE_SID, ns); } static inline pid_t task_session_vnr(struct task_struct *tsk) { return __task_pid_nr_ns(tsk, PIDTYPE_SID, NULL); } static inline pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns) { return __task_pid_nr_ns(tsk, PIDTYPE_TGID, ns); } static inline pid_t task_tgid_vnr(struct task_struct *tsk) { return __task_pid_nr_ns(tsk, PIDTYPE_TGID, NULL); } static inline pid_t task_ppid_nr_ns(const struct task_struct *tsk, struct pid_namespace *ns) { pid_t pid = 0; rcu_read_lock(); if (pid_alive(tsk)) pid = task_tgid_nr_ns(rcu_dereference(tsk->real_parent), ns); rcu_read_unlock(); return pid; } static inline pid_t task_ppid_nr(const struct task_struct *tsk) { return task_ppid_nr_ns(tsk, &init_pid_ns); } /* Obsolete, do not use: */ static inline pid_t task_pgrp_nr(struct task_struct *tsk) { return task_pgrp_nr_ns(tsk, &init_pid_ns); } #define TASK_REPORT_IDLE (TASK_REPORT + 1) #define TASK_REPORT_MAX (TASK_REPORT_IDLE << 1) static inline unsigned int task_state_index(struct task_struct *tsk) { unsigned int tsk_state = READ_ONCE(tsk->__state); unsigned int state = (tsk_state | tsk->exit_state) & TASK_REPORT; BUILD_BUG_ON_NOT_POWER_OF_2(TASK_REPORT_MAX); if (tsk_state == TASK_IDLE) state = TASK_REPORT_IDLE; /* * We're lying here, but rather than expose a completely new task state * to userspace, we can make this appear as if the task has gone through * a regular rt_mutex_lock() call. */ if (tsk_state == TASK_RTLOCK_WAIT) state = TASK_UNINTERRUPTIBLE; return fls(state); } static inline char task_index_to_char(unsigned int state) { static const char state_char[] = "RSDTtXZPI"; BUILD_BUG_ON(1 + ilog2(TASK_REPORT_MAX) != sizeof(state_char) - 1); return state_char[state]; } static inline char task_state_to_char(struct task_struct *tsk) { return task_index_to_char(task_state_index(tsk)); } /** * is_global_init - check if a task structure is init. Since init * is free to have sub-threads we need to check tgid. * @tsk: Task structure to be checked. * * Check if a task structure is the first user space task the kernel created. * * Return: 1 if the task structure is init. 0 otherwise. */ static inline int is_global_init(struct task_struct *tsk) { return task_tgid_nr(tsk) == 1; } extern struct pid *cad_pid; /* * Per process flags */ #define PF_VCPU 0x00000001 /* I'm a virtual CPU */ #define PF_IDLE 0x00000002 /* I am an IDLE thread */ #define PF_EXITING 0x00000004 /* Getting shut down */ #define PF_IO_WORKER 0x00000010 /* Task is an IO worker */ #define PF_WQ_WORKER 0x00000020 /* I'm a workqueue worker */ #define PF_FORKNOEXEC 0x00000040 /* Forked but didn't exec */ #define PF_MCE_PROCESS 0x00000080 /* Process policy on mce errors */ #define PF_SUPERPRIV 0x00000100 /* Used super-user privileges */ #define PF_DUMPCORE 0x00000200 /* Dumped core */ #define PF_SIGNALED 0x00000400 /* Killed by a signal */ #define PF_MEMALLOC 0x00000800 /* Allocating memory */ #define PF_NPROC_EXCEEDED 0x00001000 /* set_user() noticed that RLIMIT_NPROC was exceeded */ #define PF_USED_MATH 0x00002000 /* If unset the fpu must be initialized before use */ #define PF_NOFREEZE 0x00008000 /* This thread should not be frozen */ #define PF_FROZEN 0x00010000 /* Frozen for system suspend */ #define PF_KSWAPD 0x00020000 /* I am kswapd */ #define PF_MEMALLOC_NOFS 0x00040000 /* All allocation requests will inherit GFP_NOFS */ #define PF_MEMALLOC_NOIO 0x00080000 /* All allocation requests will inherit GFP_NOIO */ #define PF_LOCAL_THROTTLE 0x00100000 /* Throttle writes only against the bdi I write to, * I am cleaning dirty pages from some other bdi. */ #define PF_KTHREAD 0x00200000 /* I am a kernel thread */ #define PF_RANDOMIZE 0x00400000 /* Randomize virtual address space */ #define PF_SWAPWRITE 0x00800000 /* Allowed to write to swap */ #define PF_NO_SETAFFINITY 0x04000000 /* Userland is not allowed to meddle with cpus_mask */ #define PF_MCE_EARLY 0x08000000 /* Early kill for mce process policy */ #define PF_MEMALLOC_PIN 0x10000000 /* Allocation context constrained to zones which allow long term pinning. */ #define PF_FREEZER_SKIP 0x40000000 /* Freezer should not count it as freezable */ #define PF_SUSPEND_TASK 0x80000000 /* This thread called freeze_processes() and should not be frozen */ /* * Only the _current_ task can read/write to tsk->flags, but other * tasks can access tsk->flags in readonly mode for example * with tsk_used_math (like during threaded core dumping). * There is however an exception to this rule during ptrace * or during fork: the ptracer task is allowed to write to the * child->flags of its traced child (same goes for fork, the parent * can write to the child->flags), because we're guaranteed the * child is not running and in turn not changing child->flags * at the same time the parent does it. */ #define clear_stopped_child_used_math(child) do { (child)->flags &= ~PF_USED_MATH; } while (0) #define set_stopped_child_used_math(child) do { (child)->flags |= PF_USED_MATH; } while (0) #define clear_used_math() clear_stopped_child_used_math(current) #define set_used_math() set_stopped_child_used_math(current) #define conditional_stopped_child_used_math(condition, child) \ do { (child)->flags &= ~PF_USED_MATH, (child)->flags |= (condition) ? PF_USED_MATH : 0; } while (0) #define conditional_used_math(condition) conditional_stopped_child_used_math(condition, current) #define copy_to_stopped_child_used_math(child) \ do { (child)->flags &= ~PF_USED_MATH, (child)->flags |= current->flags & PF_USED_MATH; } while (0) /* NOTE: this will return 0 or PF_USED_MATH, it will never return 1 */ #define tsk_used_math(p) ((p)->flags & PF_USED_MATH) #define used_math() tsk_used_math(current) static __always_inline bool is_percpu_thread(void) { #ifdef CONFIG_SMP return (current->flags & PF_NO_SETAFFINITY) && (current->nr_cpus_allowed == 1); #else return true; #endif } /* Per-process atomic flags. */ #define PFA_NO_NEW_PRIVS 0 /* May not gain new privileges. */ #define PFA_SPREAD_PAGE 1 /* Spread page cache over cpuset */ #define PFA_SPREAD_SLAB 2 /* Spread some slab caches over cpuset */ #define PFA_SPEC_SSB_DISABLE 3 /* Speculative Store Bypass disabled */ #define PFA_SPEC_SSB_FORCE_DISABLE 4 /* Speculative Store Bypass force disabled*/ #define PFA_SPEC_IB_DISABLE 5 /* Indirect branch speculation restricted */ #define PFA_SPEC_IB_FORCE_DISABLE 6 /* Indirect branch speculation permanently restricted */ #define PFA_SPEC_SSB_NOEXEC 7 /* Speculative Store Bypass clear on execve() */ #define TASK_PFA_TEST(name, func) \ static inline bool task_##func(struct task_struct *p) \ { return test_bit(PFA_##name, &p->atomic_flags); } #define TASK_PFA_SET(name, func) \ static inline void task_set_##func(struct task_struct *p) \ { set_bit(PFA_##name, &p->atomic_flags); } #define TASK_PFA_CLEAR(name, func) \ static inline void task_clear_##func(struct task_struct *p) \ { clear_bit(PFA_##name, &p->atomic_flags); } TASK_PFA_TEST(NO_NEW_PRIVS, no_new_privs) TASK_PFA_SET(NO_NEW_PRIVS, no_new_privs) TASK_PFA_TEST(SPREAD_PAGE, spread_page) TASK_PFA_SET(SPREAD_PAGE, spread_page) TASK_PFA_CLEAR(SPREAD_PAGE, spread_page) TASK_PFA_TEST(SPREAD_SLAB, spread_slab) TASK_PFA_SET(SPREAD_SLAB, spread_slab) TASK_PFA_CLEAR(SPREAD_SLAB, spread_slab) TASK_PFA_TEST(SPEC_SSB_DISABLE, spec_ssb_disable) TASK_PFA_SET(SPEC_SSB_DISABLE, spec_ssb_disable) TASK_PFA_CLEAR(SPEC_SSB_DISABLE, spec_ssb_disable) TASK_PFA_TEST(SPEC_SSB_NOEXEC, spec_ssb_noexec) TASK_PFA_SET(SPEC_SSB_NOEXEC, spec_ssb_noexec) TASK_PFA_CLEAR(SPEC_SSB_NOEXEC, spec_ssb_noexec) TASK_PFA_TEST(SPEC_SSB_FORCE_DISABLE, spec_ssb_force_disable) TASK_PFA_SET(SPEC_SSB_FORCE_DISABLE, spec_ssb_force_disable) TASK_PFA_TEST(SPEC_IB_DISABLE, spec_ib_disable) TASK_PFA_SET(SPEC_IB_DISABLE, spec_ib_disable) TASK_PFA_CLEAR(SPEC_IB_DISABLE, spec_ib_disable) TASK_PFA_TEST(SPEC_IB_FORCE_DISABLE, spec_ib_force_disable) TASK_PFA_SET(SPEC_IB_FORCE_DISABLE, spec_ib_force_disable) static inline void current_restore_flags(unsigned long orig_flags, unsigned long flags) { current->flags &= ~flags; current->flags |= orig_flags & flags; } extern int cpuset_cpumask_can_shrink(const struct cpumask *cur, const struct cpumask *trial); extern int task_can_attach(struct task_struct *p); extern int dl_bw_alloc(int cpu, u64 dl_bw); extern void dl_bw_free(int cpu, u64 dl_bw); #ifdef CONFIG_SMP extern void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask); extern int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask); extern int dup_user_cpus_ptr(struct task_struct *dst, struct task_struct *src, int node); extern void release_user_cpus_ptr(struct task_struct *p); extern int dl_task_check_affinity(struct task_struct *p, const struct cpumask *mask); extern void force_compatible_cpus_allowed_ptr(struct task_struct *p); extern void relax_compatible_cpus_allowed_ptr(struct task_struct *p); #else static inline void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) { } static inline int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask) { if (!cpumask_test_cpu(0, new_mask)) return -EINVAL; return 0; } static inline int dup_user_cpus_ptr(struct task_struct *dst, struct task_struct *src, int node) { if (src->user_cpus_ptr) return -EINVAL; return 0; } static inline void release_user_cpus_ptr(struct task_struct *p) { WARN_ON(p->user_cpus_ptr); } static inline int dl_task_check_affinity(struct task_struct *p, const struct cpumask *mask) { return 0; } #endif extern int yield_to(struct task_struct *p, bool preempt); extern void set_user_nice(struct task_struct *p, long nice); extern int task_prio(const struct task_struct *p); /** * task_nice - return the nice value of a given task. * @p: the task in question. * * Return: The nice value [ -20 ... 0 ... 19 ]. */ static inline int task_nice(const struct task_struct *p) { return PRIO_TO_NICE((p)->static_prio); } extern int can_nice(const struct task_struct *p, const int nice); extern int task_curr(const struct task_struct *p); extern int idle_cpu(int cpu); extern int available_idle_cpu(int cpu); extern int sched_setscheduler(struct task_struct *, int, const struct sched_param *); extern int sched_setscheduler_nocheck(struct task_struct *, int, const struct sched_param *); extern void sched_set_fifo(struct task_struct *p); extern void sched_set_fifo_low(struct task_struct *p); extern void sched_set_normal(struct task_struct *p, int nice); extern int sched_setattr(struct task_struct *, const struct sched_attr *); extern int sched_setattr_nocheck(struct task_struct *, const struct sched_attr *); extern struct task_struct *idle_task(int cpu); /** * is_idle_task - is the specified task an idle task? * @p: the task in question. * * Return: 1 if @p is an idle task. 0 otherwise. */ static __always_inline bool is_idle_task(const struct task_struct *p) { return !!(p->flags & PF_IDLE); } extern struct task_struct *curr_task(int cpu); extern void ia64_set_curr_task(int cpu, struct task_struct *p); void yield(void); union thread_union { #ifndef CONFIG_ARCH_TASK_STRUCT_ON_STACK struct task_struct task; #endif #ifndef CONFIG_THREAD_INFO_IN_TASK struct thread_info thread_info; #endif unsigned long stack[THREAD_SIZE/sizeof(long)]; }; #ifndef CONFIG_THREAD_INFO_IN_TASK extern struct thread_info init_thread_info; #endif extern unsigned long init_stack[THREAD_SIZE / sizeof(unsigned long)]; #ifdef CONFIG_THREAD_INFO_IN_TASK static inline struct thread_info *task_thread_info(struct task_struct *task) { return &task->thread_info; } #elif !defined(__HAVE_THREAD_FUNCTIONS) # define task_thread_info(task) ((struct thread_info *)(task)->stack) #endif /* * find a task by one of its numerical ids * * find_task_by_pid_ns(): * finds a task by its pid in the specified namespace * find_task_by_vpid(): * finds a task by its virtual pid * * see also find_vpid() etc in include/linux/pid.h */ extern struct task_struct *find_task_by_vpid(pid_t nr); extern struct task_struct *find_task_by_pid_ns(pid_t nr, struct pid_namespace *ns); /* * find a task by its virtual pid and get the task struct */ extern struct task_struct *find_get_task_by_vpid(pid_t nr); extern int wake_up_state(struct task_struct *tsk, unsigned int state); extern int wake_up_process(struct task_struct *tsk); extern void wake_up_new_task(struct task_struct *tsk); #ifdef CONFIG_SMP extern void kick_process(struct task_struct *tsk); #else static inline void kick_process(struct task_struct *tsk) { } #endif extern void __set_task_comm(struct task_struct *tsk, const char *from, bool exec); static inline void set_task_comm(struct task_struct *tsk, const char *from) { __set_task_comm(tsk, from, false); } extern char *__get_task_comm(char *to, size_t len, struct task_struct *tsk); #define get_task_comm(buf, tsk) ({ \ BUILD_BUG_ON(sizeof(buf) != TASK_COMM_LEN); \ __get_task_comm(buf, sizeof(buf), tsk); \ }) #ifdef CONFIG_SMP static __always_inline void scheduler_ipi(void) { /* * Fold TIF_NEED_RESCHED into the preempt_count; anybody setting * TIF_NEED_RESCHED remotely (for the first time) will also send * this IPI. */ preempt_fold_need_resched(); } extern unsigned long wait_task_inactive(struct task_struct *, unsigned int match_state); #else static inline void scheduler_ipi(void) { } static inline unsigned long wait_task_inactive(struct task_struct *p, unsigned int match_state) { return 1; } #endif /* * Set thread flags in other task's structures. * See asm/thread_info.h for TIF_xxxx flags available: */ static inline void set_tsk_thread_flag(struct task_struct *tsk, int flag) { set_ti_thread_flag(task_thread_info(tsk), flag); } static inline void clear_tsk_thread_flag(struct task_struct *tsk, int flag) { clear_ti_thread_flag(task_thread_info(tsk), flag); } static inline void update_tsk_thread_flag(struct task_struct *tsk, int flag, bool value) { update_ti_thread_flag(task_thread_info(tsk), flag, value); } static inline int test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag) { return test_and_set_ti_thread_flag(task_thread_info(tsk), flag); } static inline int test_and_clear_tsk_thread_flag(struct task_struct *tsk, int flag) { return test_and_clear_ti_thread_flag(task_thread_info(tsk), flag); } static inline int test_tsk_thread_flag(struct task_struct *tsk, int flag) { return test_ti_thread_flag(task_thread_info(tsk), flag); } static inline void set_tsk_need_resched(struct task_struct *tsk) { set_tsk_thread_flag(tsk,TIF_NEED_RESCHED); } static inline void clear_tsk_need_resched(struct task_struct *tsk) { clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED); } static inline int test_tsk_need_resched(struct task_struct *tsk) { return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED)); } /* * cond_resched() and cond_resched_lock(): latency reduction via * explicit rescheduling in places that are safe. The return * value indicates whether a reschedule was done in fact. * cond_resched_lock() will drop the spinlock before scheduling, */ #if !defined(CONFIG_PREEMPTION) || defined(CONFIG_PREEMPT_DYNAMIC) extern int __cond_resched(void); #ifdef CONFIG_PREEMPT_DYNAMIC DECLARE_STATIC_CALL(cond_resched, __cond_resched); static __always_inline int _cond_resched(void) { return static_call_mod(cond_resched)(); } #else static inline int _cond_resched(void) { return __cond_resched(); } #endif /* CONFIG_PREEMPT_DYNAMIC */ #else static inline int _cond_resched(void) { return 0; } #endif /* !defined(CONFIG_PREEMPTION) || defined(CONFIG_PREEMPT_DYNAMIC) */ #define cond_resched() ({ \ ___might_sleep(__FILE__, __LINE__, 0); \ _cond_resched(); \ }) extern int __cond_resched_lock(spinlock_t *lock); extern int __cond_resched_rwlock_read(rwlock_t *lock); extern int __cond_resched_rwlock_write(rwlock_t *lock); #define cond_resched_lock(lock) ({ \ ___might_sleep(__FILE__, __LINE__, PREEMPT_LOCK_OFFSET);\ __cond_resched_lock(lock); \ }) #define cond_resched_rwlock_read(lock) ({ \ __might_sleep(__FILE__, __LINE__, PREEMPT_LOCK_OFFSET); \ __cond_resched_rwlock_read(lock); \ }) #define cond_resched_rwlock_write(lock) ({ \ __might_sleep(__FILE__, __LINE__, PREEMPT_LOCK_OFFSET); \ __cond_resched_rwlock_write(lock); \ }) static inline void cond_resched_rcu(void) { #if defined(CONFIG_DEBUG_ATOMIC_SLEEP) || !defined(CONFIG_PREEMPT_RCU) rcu_read_unlock(); cond_resched(); rcu_read_lock(); #endif } /* * Does a critical section need to be broken due to another * task waiting?: (technically does not depend on CONFIG_PREEMPTION, * but a general need for low latency) */ static inline int spin_needbreak(spinlock_t *lock) { #ifdef CONFIG_PREEMPTION return spin_is_contended(lock); #else return 0; #endif } /* * Check if a rwlock is contended. * Returns non-zero if there is another task waiting on the rwlock. * Returns zero if the lock is not contended or the system / underlying * rwlock implementation does not support contention detection. * Technically does not depend on CONFIG_PREEMPTION, but a general need * for low latency. */ static inline int rwlock_needbreak(rwlock_t *lock) { #ifdef CONFIG_PREEMPTION return rwlock_is_contended(lock); #else return 0; #endif } static __always_inline bool need_resched(void) { return unlikely(tif_need_resched()); } /* * Wrappers for p->thread_info->cpu access. No-op on UP. */ #ifdef CONFIG_SMP static inline unsigned int task_cpu(const struct task_struct *p) { #ifdef CONFIG_THREAD_INFO_IN_TASK return READ_ONCE(p->cpu); #else return READ_ONCE(task_thread_info(p)->cpu); #endif } extern void set_task_cpu(struct task_struct *p, unsigned int cpu); #else static inline unsigned int task_cpu(const struct task_struct *p) { return 0; } static inline void set_task_cpu(struct task_struct *p, unsigned int cpu) { } #endif /* CONFIG_SMP */ extern bool sched_task_on_rq(struct task_struct *p); extern unsigned long get_wchan(struct task_struct *p); /* * In order to reduce various lock holder preemption latencies provide an * interface to see if a vCPU is currently running or not. * * This allows us to terminate optimistic spin loops and block, analogous to * the native optimistic spin heuristic of testing if the lock owner task is * running or not. */ #ifndef vcpu_is_preempted static inline bool vcpu_is_preempted(int cpu) { return false; } #endif extern long sched_setaffinity(pid_t pid, const struct cpumask *new_mask); extern long sched_getaffinity(pid_t pid, struct cpumask *mask); #ifndef TASK_SIZE_OF #define TASK_SIZE_OF(tsk) TASK_SIZE #endif #ifdef CONFIG_SMP /* Returns effective CPU energy utilization, as seen by the scheduler */ unsigned long sched_cpu_util(int cpu, unsigned long max); #endif /* CONFIG_SMP */ #ifdef CONFIG_RSEQ /* * Map the event mask on the user-space ABI enum rseq_cs_flags * for direct mask checks. */ enum rseq_event_mask_bits { RSEQ_EVENT_PREEMPT_BIT = RSEQ_CS_FLAG_NO_RESTART_ON_PREEMPT_BIT, RSEQ_EVENT_SIGNAL_BIT = RSEQ_CS_FLAG_NO_RESTART_ON_SIGNAL_BIT, RSEQ_EVENT_MIGRATE_BIT = RSEQ_CS_FLAG_NO_RESTART_ON_MIGRATE_BIT, }; enum rseq_event_mask { RSEQ_EVENT_PREEMPT = (1U << RSEQ_EVENT_PREEMPT_BIT), RSEQ_EVENT_SIGNAL = (1U << RSEQ_EVENT_SIGNAL_BIT), RSEQ_EVENT_MIGRATE = (1U << RSEQ_EVENT_MIGRATE_BIT), }; static inline void rseq_set_notify_resume(struct task_struct *t) { if (t->rseq) set_tsk_thread_flag(t, TIF_NOTIFY_RESUME); } void __rseq_handle_notify_resume(struct ksignal *sig, struct pt_regs *regs); static inline void rseq_handle_notify_resume(struct ksignal *ksig, struct pt_regs *regs) { if (current->rseq) __rseq_handle_notify_resume(ksig, regs); } static inline void rseq_signal_deliver(struct ksignal *ksig, struct pt_regs *regs) { preempt_disable(); __set_bit(RSEQ_EVENT_SIGNAL_BIT, ¤t->rseq_event_mask); preempt_enable(); rseq_handle_notify_resume(ksig, regs); } /* rseq_preempt() requires preemption to be disabled. */ static inline void rseq_preempt(struct task_struct *t) { __set_bit(RSEQ_EVENT_PREEMPT_BIT, &t->rseq_event_mask); rseq_set_notify_resume(t); } /* rseq_migrate() requires preemption to be disabled. */ static inline void rseq_migrate(struct task_struct *t) { __set_bit(RSEQ_EVENT_MIGRATE_BIT, &t->rseq_event_mask); rseq_set_notify_resume(t); } /* * If parent process has a registered restartable sequences area, the * child inherits. Unregister rseq for a clone with CLONE_VM set. */ static inline void rseq_fork(struct task_struct *t, unsigned long clone_flags) { if (clone_flags & CLONE_VM) { t->rseq = NULL; t->rseq_sig = 0; t->rseq_event_mask = 0; } else { t->rseq = current->rseq; t->rseq_sig = current->rseq_sig; t->rseq_event_mask = current->rseq_event_mask; } } static inline void rseq_execve(struct task_struct *t) { t->rseq = NULL; t->rseq_sig = 0; t->rseq_event_mask = 0; } #else static inline void rseq_set_notify_resume(struct task_struct *t) { } static inline void rseq_handle_notify_resume(struct ksignal *ksig, struct pt_regs *regs) { } static inline void rseq_signal_deliver(struct ksignal *ksig, struct pt_regs *regs) { } static inline void rseq_preempt(struct task_struct *t) { } static inline void rseq_migrate(struct task_struct *t) { } static inline void rseq_fork(struct task_struct *t, unsigned long clone_flags) { } static inline void rseq_execve(struct task_struct *t) { } #endif #ifdef CONFIG_DEBUG_RSEQ void rseq_syscall(struct pt_regs *regs); #else static inline void rseq_syscall(struct pt_regs *regs) { } #endif const struct sched_avg *sched_trace_cfs_rq_avg(struct cfs_rq *cfs_rq); char *sched_trace_cfs_rq_path(struct cfs_rq *cfs_rq, char *str, int len); int sched_trace_cfs_rq_cpu(struct cfs_rq *cfs_rq); const struct sched_avg *sched_trace_rq_avg_rt(struct rq *rq); const struct sched_avg *sched_trace_rq_avg_dl(struct rq *rq); const struct sched_avg *sched_trace_rq_avg_irq(struct rq *rq); int sched_trace_rq_cpu(struct rq *rq); int sched_trace_rq_cpu_capacity(struct rq *rq); int sched_trace_rq_nr_running(struct rq *rq); const struct cpumask *sched_trace_rd_span(struct root_domain *rd); #ifdef CONFIG_SCHED_CORE extern void sched_core_free(struct task_struct *tsk); extern void sched_core_fork(struct task_struct *p); extern int sched_core_share_pid(unsigned int cmd, pid_t pid, enum pid_type type, unsigned long uaddr); #else static inline void sched_core_free(struct task_struct *tsk) { } static inline void sched_core_fork(struct task_struct *p) { } #endif #endif PK ! W Z4� � mtd/cfi_endian.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 2001-2010 David Woodhouse <dwmw2@infradead.org> */ #include <asm/byteorder.h> #define CFI_HOST_ENDIAN 1 #define CFI_LITTLE_ENDIAN 2 #define CFI_BIG_ENDIAN 3 #if !defined(CONFIG_MTD_CFI_ADV_OPTIONS) || defined(CONFIG_MTD_CFI_NOSWAP) #define CFI_DEFAULT_ENDIAN CFI_HOST_ENDIAN #elif defined(CONFIG_MTD_CFI_LE_BYTE_SWAP) #define CFI_DEFAULT_ENDIAN CFI_LITTLE_ENDIAN #elif defined(CONFIG_MTD_CFI_BE_BYTE_SWAP) #define CFI_DEFAULT_ENDIAN CFI_BIG_ENDIAN #else #error No CFI endianness defined #endif #define cfi_default(s) ((s)?:CFI_DEFAULT_ENDIAN) #define cfi_be(s) (cfi_default(s) == CFI_BIG_ENDIAN) #define cfi_le(s) (cfi_default(s) == CFI_LITTLE_ENDIAN) #define cfi_host(s) (cfi_default(s) == CFI_HOST_ENDIAN) #define cpu_to_cfi8(map, x) (x) #define cfi8_to_cpu(map, x) (x) #define cpu_to_cfi16(map, x) _cpu_to_cfi(16, (map)->swap, (x)) #define cpu_to_cfi32(map, x) _cpu_to_cfi(32, (map)->swap, (x)) #define cpu_to_cfi64(map, x) _cpu_to_cfi(64, (map)->swap, (x)) #define cfi16_to_cpu(map, x) _cfi_to_cpu(16, (map)->swap, (x)) #define cfi32_to_cpu(map, x) _cfi_to_cpu(32, (map)->swap, (x)) #define cfi64_to_cpu(map, x) _cfi_to_cpu(64, (map)->swap, (x)) #define _cpu_to_cfi(w, s, x) (cfi_host(s)?(x):_swap_to_cfi(w, s, x)) #define _cfi_to_cpu(w, s, x) (cfi_host(s)?(x):_swap_to_cpu(w, s, x)) #define _swap_to_cfi(w, s, x) (cfi_be(s)?cpu_to_be##w(x):cpu_to_le##w(x)) #define _swap_to_cpu(w, s, x) (cfi_be(s)?be##w##_to_cpu(x):le##w##_to_cpu(x)) PK ! [��2 �2 mtd/map.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> et al. */ /* Overhauled routines for dealing with different mmap regions of flash */ #ifndef __LINUX_MTD_MAP_H__ #define __LINUX_MTD_MAP_H__ #include <linux/types.h> #include <linux/list.h> #include <linux/string.h> #include <linux/bug.h> #include <linux/kernel.h> #include <linux/io.h> #include <asm/unaligned.h> #include <asm/barrier.h> #ifdef CONFIG_MTD_MAP_BANK_WIDTH_1 #define map_bankwidth(map) 1 #define map_bankwidth_is_1(map) (map_bankwidth(map) == 1) #define map_bankwidth_is_large(map) (0) #define map_words(map) (1) #define MAX_MAP_BANKWIDTH 1 #else #define map_bankwidth_is_1(map) (0) #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_2 # ifdef map_bankwidth # undef map_bankwidth # define map_bankwidth(map) ((map)->bankwidth) # else # define map_bankwidth(map) 2 # define map_bankwidth_is_large(map) (0) # define map_words(map) (1) # endif #define map_bankwidth_is_2(map) (map_bankwidth(map) == 2) #undef MAX_MAP_BANKWIDTH #define MAX_MAP_BANKWIDTH 2 #else #define map_bankwidth_is_2(map) (0) #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_4 # ifdef map_bankwidth # undef map_bankwidth # define map_bankwidth(map) ((map)->bankwidth) # else # define map_bankwidth(map) 4 # define map_bankwidth_is_large(map) (0) # define map_words(map) (1) # endif #define map_bankwidth_is_4(map) (map_bankwidth(map) == 4) #undef MAX_MAP_BANKWIDTH #define MAX_MAP_BANKWIDTH 4 #else #define map_bankwidth_is_4(map) (0) #endif /* ensure we never evaluate anything shorted than an unsigned long * to zero, and ensure we'll never miss the end of an comparison (bjd) */ #define map_calc_words(map) ((map_bankwidth(map) + (sizeof(unsigned long)-1)) / sizeof(unsigned long)) #ifdef CONFIG_MTD_MAP_BANK_WIDTH_8 # ifdef map_bankwidth # undef map_bankwidth # define map_bankwidth(map) ((map)->bankwidth) # if BITS_PER_LONG < 64 # undef map_bankwidth_is_large # define map_bankwidth_is_large(map) (map_bankwidth(map) > BITS_PER_LONG/8) # undef map_words # define map_words(map) map_calc_words(map) # endif # else # define map_bankwidth(map) 8 # define map_bankwidth_is_large(map) (BITS_PER_LONG < 64) # define map_words(map) map_calc_words(map) # endif #define map_bankwidth_is_8(map) (map_bankwidth(map) == 8) #undef MAX_MAP_BANKWIDTH #define MAX_MAP_BANKWIDTH 8 #else #define map_bankwidth_is_8(map) (0) #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_16 # ifdef map_bankwidth # undef map_bankwidth # define map_bankwidth(map) ((map)->bankwidth) # undef map_bankwidth_is_large # define map_bankwidth_is_large(map) (map_bankwidth(map) > BITS_PER_LONG/8) # undef map_words # define map_words(map) map_calc_words(map) # else # define map_bankwidth(map) 16 # define map_bankwidth_is_large(map) (1) # define map_words(map) map_calc_words(map) # endif #define map_bankwidth_is_16(map) (map_bankwidth(map) == 16) #undef MAX_MAP_BANKWIDTH #define MAX_MAP_BANKWIDTH 16 #else #define map_bankwidth_is_16(map) (0) #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_32 /* always use indirect access for 256-bit to preserve kernel stack */ # undef map_bankwidth # define map_bankwidth(map) ((map)->bankwidth) # undef map_bankwidth_is_large # define map_bankwidth_is_large(map) (map_bankwidth(map) > BITS_PER_LONG/8) # undef map_words # define map_words(map) map_calc_words(map) #define map_bankwidth_is_32(map) (map_bankwidth(map) == 32) #undef MAX_MAP_BANKWIDTH #define MAX_MAP_BANKWIDTH 32 #else #define map_bankwidth_is_32(map) (0) #endif #ifndef map_bankwidth #ifdef CONFIG_MTD #warning "No CONFIG_MTD_MAP_BANK_WIDTH_xx selected. No NOR chip support can work" #endif static inline int map_bankwidth(void *map) { BUG(); return 0; } #define map_bankwidth_is_large(map) (0) #define map_words(map) (0) #define MAX_MAP_BANKWIDTH 1 #endif static inline int map_bankwidth_supported(int w) { switch (w) { #ifdef CONFIG_MTD_MAP_BANK_WIDTH_1 case 1: #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_2 case 2: #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_4 case 4: #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_8 case 8: #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_16 case 16: #endif #ifdef CONFIG_MTD_MAP_BANK_WIDTH_32 case 32: #endif return 1; default: return 0; } } #define MAX_MAP_LONGS (((MAX_MAP_BANKWIDTH * 8) + BITS_PER_LONG - 1) / BITS_PER_LONG) typedef union { unsigned long x[MAX_MAP_LONGS]; } map_word; /* The map stuff is very simple. You fill in your struct map_info with a handful of routines for accessing the device, making sure they handle paging etc. correctly if your device needs it. Then you pass it off to a chip probe routine -- either JEDEC or CFI probe or both -- via do_map_probe(). If a chip is recognised, the probe code will invoke the appropriate chip driver (if present) and return a struct mtd_info. At which point, you fill in the mtd->module with your own module address, and register it with the MTD core code. Or you could partition it and register the partitions instead, or keep it for your own private use; whatever. The mtd->priv field will point to the struct map_info, and any further private data required by the chip driver is linked from the mtd->priv->fldrv_priv field. This allows the map driver to get at the destructor function map->fldrv_destroy() when it's tired of living. */ struct map_info { const char *name; unsigned long size; resource_size_t phys; #define NO_XIP (-1UL) void __iomem *virt; void *cached; int swap; /* this mapping's byte-swapping requirement */ int bankwidth; /* in octets. This isn't necessarily the width of actual bus cycles -- it's the repeat interval in bytes, before you are talking to the first chip again. */ #ifdef CONFIG_MTD_COMPLEX_MAPPINGS map_word (*read)(struct map_info *, unsigned long); void (*copy_from)(struct map_info *, void *, unsigned long, ssize_t); void (*write)(struct map_info *, const map_word, unsigned long); void (*copy_to)(struct map_info *, unsigned long, const void *, ssize_t); /* We can perhaps put in 'point' and 'unpoint' methods, if we really want to enable XIP for non-linear mappings. Not yet though. */ #endif /* It's possible for the map driver to use cached memory in its copy_from implementation (and _only_ with copy_from). However, when the chip driver knows some flash area has changed contents, it will signal it to the map driver through this routine to let the map driver invalidate the corresponding cache as needed. If there is no cache to care about this can be set to NULL. */ void (*inval_cache)(struct map_info *, unsigned long, ssize_t); /* This will be called with 1 as parameter when the first map user * needs VPP, and called with 0 when the last user exits. The map * core maintains a reference counter, and assumes that VPP is a * global resource applying to all mapped flash chips on the system. */ void (*set_vpp)(struct map_info *, int); unsigned long pfow_base; unsigned long map_priv_1; unsigned long map_priv_2; struct device_node *device_node; void *fldrv_priv; struct mtd_chip_driver *fldrv; }; struct mtd_chip_driver { struct mtd_info *(*probe)(struct map_info *map); void (*destroy)(struct mtd_info *); struct module *module; char *name; struct list_head list; }; void register_mtd_chip_driver(struct mtd_chip_driver *); void unregister_mtd_chip_driver(struct mtd_chip_driver *); struct mtd_info *do_map_probe(const char *name, struct map_info *map); void map_destroy(struct mtd_info *mtd); #define ENABLE_VPP(map) do { if (map->set_vpp) map->set_vpp(map, 1); } while (0) #define DISABLE_VPP(map) do { if (map->set_vpp) map->set_vpp(map, 0); } while (0) #define INVALIDATE_CACHED_RANGE(map, from, size) \ do { if (map->inval_cache) map->inval_cache(map, from, size); } while (0) #define map_word_equal(map, val1, val2) \ ({ \ int i, ret = 1; \ for (i = 0; i < map_words(map); i++) \ if ((val1).x[i] != (val2).x[i]) { \ ret = 0; \ break; \ } \ ret; \ }) #define map_word_and(map, val1, val2) \ ({ \ map_word r; \ int i; \ for (i = 0; i < map_words(map); i++) \ r.x[i] = (val1).x[i] & (val2).x[i]; \ r; \ }) #define map_word_clr(map, val1, val2) \ ({ \ map_word r; \ int i; \ for (i = 0; i < map_words(map); i++) \ r.x[i] = (val1).x[i] & ~(val2).x[i]; \ r; \ }) #define map_word_or(map, val1, val2) \ ({ \ map_word r; \ int i; \ for (i = 0; i < map_words(map); i++) \ r.x[i] = (val1).x[i] | (val2).x[i]; \ r; \ }) #define map_word_andequal(map, val1, val2, val3) \ ({ \ int i, ret = 1; \ for (i = 0; i < map_words(map); i++) { \ if (((val1).x[i] & (val2).x[i]) != (val3).x[i]) { \ ret = 0; \ break; \ } \ } \ ret; \ }) #define map_word_bitsset(map, val1, val2) \ ({ \ int i, ret = 0; \ for (i = 0; i < map_words(map); i++) { \ if ((val1).x[i] & (val2).x[i]) { \ ret = 1; \ break; \ } \ } \ ret; \ }) static inline map_word map_word_load(struct map_info *map, const void *ptr) { map_word r; if (map_bankwidth_is_1(map)) r.x[0] = *(unsigned char *)ptr; else if (map_bankwidth_is_2(map)) r.x[0] = get_unaligned((uint16_t *)ptr); else if (map_bankwidth_is_4(map)) r.x[0] = get_unaligned((uint32_t *)ptr); #if BITS_PER_LONG >= 64 else if (map_bankwidth_is_8(map)) r.x[0] = get_unaligned((uint64_t *)ptr); #endif else if (map_bankwidth_is_large(map)) memcpy(r.x, ptr, map->bankwidth); else BUG(); return r; } static inline map_word map_word_load_partial(struct map_info *map, map_word orig, const unsigned char *buf, int start, int len) { int i; if (map_bankwidth_is_large(map)) { char *dest = (char *)&orig; memcpy(dest+start, buf, len); } else { for (i = start; i < start+len; i++) { int bitpos; #ifdef __LITTLE_ENDIAN bitpos = i * 8; #else /* __BIG_ENDIAN */ bitpos = (map_bankwidth(map) - 1 - i) * 8; #endif orig.x[0] &= ~(0xff << bitpos); orig.x[0] |= (unsigned long)buf[i-start] << bitpos; } } return orig; } #if BITS_PER_LONG < 64 #define MAP_FF_LIMIT 4 #else #define MAP_FF_LIMIT 8 #endif static inline map_word map_word_ff(struct map_info *map) { map_word r; int i; if (map_bankwidth(map) < MAP_FF_LIMIT) { int bw = 8 * map_bankwidth(map); r.x[0] = (1UL << bw) - 1; } else { for (i = 0; i < map_words(map); i++) r.x[i] = ~0UL; } return r; } static inline map_word inline_map_read(struct map_info *map, unsigned long ofs) { map_word r; if (map_bankwidth_is_1(map)) r.x[0] = __raw_readb(map->virt + ofs); else if (map_bankwidth_is_2(map)) r.x[0] = __raw_readw(map->virt + ofs); else if (map_bankwidth_is_4(map)) r.x[0] = __raw_readl(map->virt + ofs); #if BITS_PER_LONG >= 64 else if (map_bankwidth_is_8(map)) r.x[0] = __raw_readq(map->virt + ofs); #endif else if (map_bankwidth_is_large(map)) memcpy_fromio(r.x, map->virt + ofs, map->bankwidth); else BUG(); return r; } static inline void inline_map_write(struct map_info *map, const map_word datum, unsigned long ofs) { if (map_bankwidth_is_1(map)) __raw_writeb(datum.x[0], map->virt + ofs); else if (map_bankwidth_is_2(map)) __raw_writew(datum.x[0], map->virt + ofs); else if (map_bankwidth_is_4(map)) __raw_writel(datum.x[0], map->virt + ofs); #if BITS_PER_LONG >= 64 else if (map_bankwidth_is_8(map)) __raw_writeq(datum.x[0], map->virt + ofs); #endif else if (map_bankwidth_is_large(map)) memcpy_toio(map->virt+ofs, datum.x, map->bankwidth); else BUG(); mb(); } static inline void inline_map_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len) { if (map->cached) memcpy(to, (char *)map->cached + from, len); else memcpy_fromio(to, map->virt + from, len); } static inline void inline_map_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len) { memcpy_toio(map->virt + to, from, len); } #ifdef CONFIG_MTD_COMPLEX_MAPPINGS #define map_read(map, ofs) (map)->read(map, ofs) #define map_copy_from(map, to, from, len) (map)->copy_from(map, to, from, len) #define map_write(map, datum, ofs) (map)->write(map, datum, ofs) #define map_copy_to(map, to, from, len) (map)->copy_to(map, to, from, len) extern void simple_map_init(struct map_info *); #define map_is_linear(map) (map->phys != NO_XIP) #else #define map_read(map, ofs) inline_map_read(map, ofs) #define map_copy_from(map, to, from, len) inline_map_copy_from(map, to, from, len) #define map_write(map, datum, ofs) inline_map_write(map, datum, ofs) #define map_copy_to(map, to, from, len) inline_map_copy_to(map, to, from, len) #define simple_map_init(map) BUG_ON(!map_bankwidth_supported((map)->bankwidth)) #define map_is_linear(map) ({ (void)(map); 1; }) #endif /* !CONFIG_MTD_COMPLEX_MAPPINGS */ #endif /* __LINUX_MTD_MAP_H__ */ PK ! �)vj� � mtd/nftl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> */ #ifndef __MTD_NFTL_H__ #define __MTD_NFTL_H__ #include <linux/mtd/mtd.h> #include <linux/mtd/blktrans.h> #include <mtd/nftl-user.h> /* these info are used in ReplUnitTable */ #define BLOCK_NIL 0xffff /* last block of a chain */ #define BLOCK_FREE 0xfffe /* free block */ #define BLOCK_NOTEXPLORED 0xfffd /* non explored block, only used during mounting */ #define BLOCK_RESERVED 0xfffc /* bios block or bad block */ struct NFTLrecord { struct mtd_blktrans_dev mbd; __u16 MediaUnit, SpareMediaUnit; __u32 EraseSize; struct NFTLMediaHeader MediaHdr; int usecount; unsigned char heads; unsigned char sectors; unsigned short cylinders; __u16 numvunits; __u16 lastEUN; /* should be suppressed */ __u16 numfreeEUNs; __u16 LastFreeEUN; /* To speed up finding a free EUN */ int head,sect,cyl; __u16 *EUNtable; /* [numvunits]: First EUN for each virtual unit */ __u16 *ReplUnitTable; /* [numEUNs]: ReplUnitNumber for each */ unsigned int nb_blocks; /* number of physical blocks */ unsigned int nb_boot_blocks; /* number of blocks used by the bios */ struct erase_info instr; }; int NFTL_mount(struct NFTLrecord *s); int NFTL_formatblock(struct NFTLrecord *s, int block); int nftl_read_oob(struct mtd_info *mtd, loff_t offs, size_t len, size_t *retlen, uint8_t *buf); int nftl_write_oob(struct mtd_info *mtd, loff_t offs, size_t len, size_t *retlen, uint8_t *buf); #ifndef NFTL_MAJOR #define NFTL_MAJOR 93 #endif #define MAX_NFTLS 16 #define MAX_SECTORS_PER_UNIT 64 #define NFTL_PARTN_BITS 4 #endif /* __MTD_NFTL_H__ */ PK ! �?&E E mtd/nand-ecc-sw-bch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2011 Ivan Djelic <ivan.djelic@parrot.com> * * This file is the header for the NAND BCH ECC implementation. */ #ifndef __MTD_NAND_ECC_SW_BCH_H__ #define __MTD_NAND_ECC_SW_BCH_H__ #include <linux/mtd/nand.h> #include <linux/bch.h> /** * struct nand_ecc_sw_bch_conf - private software BCH ECC engine structure * @req_ctx: Save request context and tweak the original request to fit the * engine needs * @code_size: Number of bytes needed to store a code (one code per step) * @calc_buf: Buffer to use when calculating ECC bytes * @code_buf: Buffer to use when reading (raw) ECC bytes from the chip * @bch: BCH control structure * @errloc: error location array * @eccmask: XOR ecc mask, allows erased pages to be decoded as valid */ struct nand_ecc_sw_bch_conf { struct nand_ecc_req_tweak_ctx req_ctx; unsigned int code_size; u8 *calc_buf; u8 *code_buf; struct bch_control *bch; unsigned int *errloc; unsigned char *eccmask; }; #if IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_BCH) int nand_ecc_sw_bch_calculate(struct nand_device *nand, const unsigned char *buf, unsigned char *code); int nand_ecc_sw_bch_correct(struct nand_device *nand, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc); int nand_ecc_sw_bch_init_ctx(struct nand_device *nand); void nand_ecc_sw_bch_cleanup_ctx(struct nand_device *nand); struct nand_ecc_engine *nand_ecc_sw_bch_get_engine(void); #else /* !CONFIG_MTD_NAND_ECC_SW_BCH */ static inline int nand_ecc_sw_bch_calculate(struct nand_device *nand, const unsigned char *buf, unsigned char *code) { return -ENOTSUPP; } static inline int nand_ecc_sw_bch_correct(struct nand_device *nand, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc) { return -ENOTSUPP; } static inline int nand_ecc_sw_bch_init_ctx(struct nand_device *nand) { return -ENOTSUPP; } static inline void nand_ecc_sw_bch_cleanup_ctx(struct nand_device *nand) {} #endif /* CONFIG_MTD_NAND_ECC_SW_BCH */ #endif /* __MTD_NAND_ECC_SW_BCH_H__ */ PK ! R�Mg g mtd/gen_probe.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 2001 Red Hat UK Limited * Copyright © 2001-2010 David Woodhouse <dwmw2@infradead.org> */ #ifndef __LINUX_MTD_GEN_PROBE_H__ #define __LINUX_MTD_GEN_PROBE_H__ #include <linux/mtd/flashchip.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi.h> #include <linux/bitops.h> struct chip_probe { char *name; int (*probe_chip)(struct map_info *map, __u32 base, unsigned long *chip_map, struct cfi_private *cfi); }; struct mtd_info *mtd_do_chip_probe(struct map_info *map, struct chip_probe *cp); #endif /* __LINUX_MTD_GEN_PROBE_H__ */ PK ! n���� � mtd/platnand.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> * Steven J. Hill <sjhill@realitydiluted.com> * Thomas Gleixner <tglx@linutronix.de> * * Contains all platform NAND related definitions. */ #ifndef __LINUX_MTD_PLATNAND_H #define __LINUX_MTD_PLATNAND_H #include <linux/mtd/partitions.h> #include <linux/mtd/rawnand.h> #include <linux/platform_device.h> /** * struct platform_nand_chip - chip level device structure * @nr_chips: max. number of chips to scan for * @chip_offset: chip number offset * @nr_partitions: number of partitions pointed to by partitions (or zero) * @partitions: mtd partition list * @chip_delay: R/B delay value in us * @options: Option flags, e.g. 16bit buswidth * @bbt_options: BBT option flags, e.g. NAND_BBT_USE_FLASH * @part_probe_types: NULL-terminated array of probe types */ struct platform_nand_chip { int nr_chips; int chip_offset; int nr_partitions; struct mtd_partition *partitions; int chip_delay; unsigned int options; unsigned int bbt_options; const char **part_probe_types; }; /** * struct platform_nand_ctrl - controller level device structure * @probe: platform specific function to probe/setup hardware * @remove: platform specific function to remove/teardown hardware * @dev_ready: platform specific function to read ready/busy pin * @select_chip: platform specific chip select function * @cmd_ctrl: platform specific function for controlling * ALE/CLE/nCE. Also used to write command and address * @write_buf: platform specific function for write buffer * @read_buf: platform specific function for read buffer * @priv: private data to transport driver specific settings * * All fields are optional and depend on the hardware driver requirements */ struct platform_nand_ctrl { int (*probe)(struct platform_device *pdev); void (*remove)(struct platform_device *pdev); int (*dev_ready)(struct nand_chip *chip); void (*select_chip)(struct nand_chip *chip, int cs); void (*cmd_ctrl)(struct nand_chip *chip, int dat, unsigned int ctrl); void (*write_buf)(struct nand_chip *chip, const uint8_t *buf, int len); void (*read_buf)(struct nand_chip *chip, uint8_t *buf, int len); void *priv; }; /** * struct platform_nand_data - container structure for platform-specific data * @chip: chip level chip structure * @ctrl: controller level device structure */ struct platform_nand_data { struct platform_nand_chip chip; struct platform_nand_ctrl ctrl; }; #endif /* __LINUX_MTD_PLATNAND_H */ PK ! d~χ� � mtd/latch-addr-flash.hnu �[��� /* * Interface for NOR flash driver whose high address lines are latched * * Copyright © 2008 MontaVista Software, Inc. <source@mvista.com> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef __LATCH_ADDR_FLASH__ #define __LATCH_ADDR_FLASH__ struct map_info; struct mtd_partition; struct latch_addr_flash_data { unsigned int width; unsigned int size; int (*init)(void *data, int cs); void (*done)(void *data); void (*set_window)(unsigned long offset, void *data); void *data; unsigned int nr_parts; struct mtd_partition *parts; }; #endif PK ! c���� � mtd/xip.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MTD primitives for XIP support * * Author: Nicolas Pitre * Created: Nov 2, 2004 * Copyright: (C) 2004 MontaVista Software, Inc. * * This XIP support for MTD has been loosely inspired * by an earlier patch authored by David Woodhouse. */ #ifndef __LINUX_MTD_XIP_H__ #define __LINUX_MTD_XIP_H__ #ifdef CONFIG_MTD_XIP /* * We really don't want gcc to guess anything. * We absolutely _need_ proper inlining. */ #include <linux/compiler.h> /* * Function that are modifying the flash state away from array mode must * obviously not be running from flash. The __xipram is therefore marking * those functions so they get relocated to ram. */ #ifdef CONFIG_XIP_KERNEL #define __xipram noinline __section(".xiptext") #endif /* * Each architecture has to provide the following macros. They must access * the hardware directly and not rely on any other (XIP) functions since they * won't be available when used (flash not in array mode). * * xip_irqpending() * * return non zero when any hardware interrupt is pending. * * xip_currtime() * * return a platform specific time reference to be used with * xip_elapsed_since(). * * xip_elapsed_since(x) * * return in usecs the elapsed timebetween now and the reference x as * returned by xip_currtime(). * * note 1: conversion to usec can be approximated, as long as the * returned value is <= the real elapsed time. * note 2: this should be able to cope with a few seconds without * overflowing. * * xip_iprefetch() * * Macro to fill instruction prefetch * e.g. a series of nops: asm volatile (".rep 8; nop; .endr"); */ #include <asm/mtd-xip.h> #ifndef xip_irqpending #warning "missing IRQ and timer primitives for XIP MTD support" #warning "some of the XIP MTD support code will be disabled" #warning "your system will therefore be unresponsive when writing or erasing flash" #define xip_irqpending() (0) #define xip_currtime() (0) #define xip_elapsed_since(x) (0) #endif #ifndef xip_iprefetch #define xip_iprefetch() do { } while (0) #endif /* * xip_cpu_idle() is used when waiting for a delay equal or larger than * the system timer tick period. This should put the CPU into idle mode * to save power and to be woken up only when some interrupts are pending. * This should not rely upon standard kernel code. */ #ifndef xip_cpu_idle #define xip_cpu_idle() do { } while (0) #endif #endif /* CONFIG_MTD_XIP */ #ifndef __xipram #define __xipram #endif #endif /* __LINUX_MTD_XIP_H__ */ PK ! �oU�j j mtd/partitions.hnu �[��� /* * MTD partitioning layer definitions * * (C) 2000 Nicolas Pitre <nico@fluxnic.net> * * This code is GPL */ #ifndef MTD_PARTITIONS_H #define MTD_PARTITIONS_H #include <linux/types.h> /* * Partition definition structure: * * An array of struct partition is passed along with a MTD object to * mtd_device_register() to create them. * * For each partition, these fields are available: * name: string that will be used to label the partition's MTD device. * types: some partitions can be containers using specific format to describe * embedded subpartitions / volumes. E.g. many home routers use "firmware" * partition that contains at least kernel and rootfs. In such case an * extra parser is needed that will detect these dynamic partitions and * report them to the MTD subsystem. If set this property stores an array * of parser names to use when looking for subpartitions. * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition * will extend to the end of the master MTD device. * offset: absolute starting position within the master MTD device; if * defined as MTDPART_OFS_APPEND, the partition will start where the * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block; * if MTDPART_OFS_RETAIN, consume as much as possible, leaving size * after the end of partition. * mask_flags: contains flags that have to be masked (removed) from the * master MTD flag set for the corresponding MTD partition. * For example, to force a read-only partition, simply adding * MTD_WRITEABLE to the mask_flags will do the trick. * add_flags: contains flags to add to the parent flags * * Note: writeable partitions require their size and offset be * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK). */ struct mtd_partition { const char *name; /* identifier string */ const char *const *types; /* names of parsers to use if any */ uint64_t size; /* partition size */ uint64_t offset; /* offset within the master MTD space */ uint32_t mask_flags; /* master MTD flags to mask out for this partition */ uint32_t add_flags; /* flags to add to the partition */ struct device_node *of_node; }; #define MTDPART_OFS_RETAIN (-3) #define MTDPART_OFS_NXTBLK (-2) #define MTDPART_OFS_APPEND (-1) #define MTDPART_SIZ_FULL (0) struct mtd_info; struct device_node; /** * struct mtd_part_parser_data - used to pass data to MTD partition parsers. * @origin: for RedBoot, start address of MTD device */ struct mtd_part_parser_data { unsigned long origin; }; /* * Functions dealing with the various ways of partitioning the space */ struct mtd_part_parser { struct list_head list; struct module *owner; const char *name; const struct of_device_id *of_match_table; int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, struct mtd_part_parser_data *); void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); }; /* Container for passing around a set of parsed partitions */ struct mtd_partitions { const struct mtd_partition *parts; int nr_parts; const struct mtd_part_parser *parser; }; extern int __register_mtd_parser(struct mtd_part_parser *parser, struct module *owner); #define register_mtd_parser(parser) __register_mtd_parser(parser, THIS_MODULE) extern void deregister_mtd_parser(struct mtd_part_parser *parser); /* * module_mtd_part_parser() - Helper macro for MTD partition parsers that don't * do anything special in module init/exit. Each driver may only use this macro * once, and calling it replaces module_init() and module_exit(). */ #define module_mtd_part_parser(__mtd_part_parser) \ module_driver(__mtd_part_parser, register_mtd_parser, \ deregister_mtd_parser) int mtd_add_partition(struct mtd_info *master, const char *name, long long offset, long long length); int mtd_del_partition(struct mtd_info *master, int partno); uint64_t mtd_get_device_size(const struct mtd_info *mtd); #endif PK ! +R=� � mtd/spear_smi.hnu �[��� /* * Copyright © 2010 ST Microelectronics * Shiraz Hashim <shiraz.linux.kernel@gmail.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __MTD_SPEAR_SMI_H #define __MTD_SPEAR_SMI_H #include <linux/types.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/platform_device.h> #include <linux/of.h> /* max possible slots for serial-nor flash chip in the SMI controller */ #define MAX_NUM_FLASH_CHIP 4 /* macro to define partitions for flash devices */ #define DEFINE_PARTS(n, of, s) \ { \ .name = n, \ .offset = of, \ .size = s, \ } /** * struct spear_smi_flash_info - platform structure for passing flash * information * * name: name of the serial nor flash for identification * mem_base: the memory base on which the flash is mapped * size: size of the flash in bytes * partitions: parition details * nr_partitions: number of partitions * fast_mode: whether flash supports fast mode */ struct spear_smi_flash_info { char *name; unsigned long mem_base; unsigned long size; struct mtd_partition *partitions; int nr_partitions; u8 fast_mode; }; /** * struct spear_smi_plat_data - platform structure for configuring smi * * clk_rate: clk rate at which SMI must operate * num_flashes: number of flashes present on board * board_flash_info: specific details of each flash present on board */ struct spear_smi_plat_data { unsigned long clk_rate; int num_flashes; struct spear_smi_flash_info *board_flash_info; struct device_node *np[MAX_NUM_FLASH_CHIP]; }; #endif /* __MTD_SPEAR_SMI_H */ PK ! \��� mtd/pismo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * PISMO memory driver - http://www.pismoworld.org/ */ #ifndef __LINUX_MTD_PISMO_H #define __LINUX_MTD_PISMO_H struct pismo_pdata { void (*set_vpp)(void *, int); void *vpp_data; phys_addr_t cs_addrs[5]; }; #endif PK ! ��[J J mtd/nand-gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MTD_NAND_GPIO_H #define __LINUX_MTD_NAND_GPIO_H #include <linux/mtd/rawnand.h> struct gpio_nand_platdata { void (*adjust_parts)(struct gpio_nand_platdata *, size_t); struct mtd_partition *parts; unsigned int num_parts; unsigned int options; int chip_delay; }; #endif PK ! m�pmB B mtd/super.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* MTD-based superblock handling * * Copyright © 2006 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef __MTD_SUPER_H__ #define __MTD_SUPER_H__ #ifdef __KERNEL__ #include <linux/mtd/mtd.h> #include <linux/fs.h> #include <linux/mount.h> extern int get_tree_mtd(struct fs_context *fc, int (*fill_super)(struct super_block *sb, struct fs_context *fc)); extern void kill_mtd_super(struct super_block *sb); #endif /* __KERNEL__ */ #endif /* __MTD_SUPER_H__ */ PK ! �Wa\? \? mtd/spinand.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2016-2017 Micron Technology, Inc. * * Authors: * Peter Pan <peterpandong@micron.com> */ #ifndef __LINUX_MTD_SPINAND_H #define __LINUX_MTD_SPINAND_H #include <linux/mutex.h> #include <linux/bitops.h> #include <linux/device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/spi/spi.h> #include <linux/spi/spi-mem.h> /** * Standard SPI NAND flash operations */ #define SPINAND_RESET_OP \ SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) #define SPINAND_WR_EN_DIS_OP(enable) \ SPI_MEM_OP(SPI_MEM_OP_CMD((enable) ? 0x06 : 0x04, 1), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) #define SPINAND_READID_OP(naddr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1), \ SPI_MEM_OP_ADDR(naddr, 0, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 1)) #define SPINAND_SET_FEATURE_OP(reg, valptr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1), \ SPI_MEM_OP_ADDR(1, reg, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(1, valptr, 1)) #define SPINAND_GET_FEATURE_OP(reg, valptr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1), \ SPI_MEM_OP_ADDR(1, reg, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_IN(1, valptr, 1)) #define SPINAND_BLK_ERASE_OP(addr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0xd8, 1), \ SPI_MEM_OP_ADDR(3, addr, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) #define SPINAND_PAGE_READ_OP(addr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x13, 1), \ SPI_MEM_OP_ADDR(3, addr, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) #define SPINAND_PAGE_READ_FROM_CACHE_OP(fast, addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1), \ SPI_MEM_OP_ADDR(2, addr, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 1)) #define SPINAND_PAGE_READ_FROM_CACHE_OP_3A(fast, addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1), \ SPI_MEM_OP_ADDR(3, addr, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 1)) #define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1), \ SPI_MEM_OP_ADDR(2, addr, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 2)) #define SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1), \ SPI_MEM_OP_ADDR(3, addr, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 2)) #define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1), \ SPI_MEM_OP_ADDR(2, addr, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 4)) #define SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1), \ SPI_MEM_OP_ADDR(3, addr, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ SPI_MEM_OP_DATA_IN(len, buf, 4)) #define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1), \ SPI_MEM_OP_ADDR(2, addr, 2), \ SPI_MEM_OP_DUMMY(ndummy, 2), \ SPI_MEM_OP_DATA_IN(len, buf, 2)) #define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP_3A(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1), \ SPI_MEM_OP_ADDR(3, addr, 2), \ SPI_MEM_OP_DUMMY(ndummy, 2), \ SPI_MEM_OP_DATA_IN(len, buf, 2)) #define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1), \ SPI_MEM_OP_ADDR(2, addr, 4), \ SPI_MEM_OP_DUMMY(ndummy, 4), \ SPI_MEM_OP_DATA_IN(len, buf, 4)) #define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP_3A(addr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1), \ SPI_MEM_OP_ADDR(3, addr, 4), \ SPI_MEM_OP_DUMMY(ndummy, 4), \ SPI_MEM_OP_DATA_IN(len, buf, 4)) #define SPINAND_PROG_EXEC_OP(addr) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1), \ SPI_MEM_OP_ADDR(3, addr, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) #define SPINAND_PROG_LOAD(reset, addr, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x02 : 0x84, 1), \ SPI_MEM_OP_ADDR(2, addr, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(len, buf, 1)) #define SPINAND_PROG_LOAD_X4(reset, addr, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x32 : 0x34, 1), \ SPI_MEM_OP_ADDR(2, addr, 1), \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(len, buf, 4)) /** * Standard SPI NAND flash commands */ #define SPINAND_CMD_PROG_LOAD_X4 0x32 #define SPINAND_CMD_PROG_LOAD_RDM_DATA_X4 0x34 /* feature register */ #define REG_BLOCK_LOCK 0xa0 #define BL_ALL_UNLOCKED 0x00 /* configuration register */ #define REG_CFG 0xb0 #define CFG_OTP_ENABLE BIT(6) #define CFG_ECC_ENABLE BIT(4) #define CFG_QUAD_ENABLE BIT(0) /* status register */ #define REG_STATUS 0xc0 #define STATUS_BUSY BIT(0) #define STATUS_ERASE_FAILED BIT(2) #define STATUS_PROG_FAILED BIT(3) #define STATUS_ECC_MASK GENMASK(5, 4) #define STATUS_ECC_NO_BITFLIPS (0 << 4) #define STATUS_ECC_HAS_BITFLIPS (1 << 4) #define STATUS_ECC_UNCOR_ERROR (2 << 4) struct spinand_op; struct spinand_device; #define SPINAND_MAX_ID_LEN 4 /* * For erase, write and read operation, we got the following timings : * tBERS (erase) 1ms to 4ms * tPROG 300us to 400us * tREAD 25us to 100us * In order to minimize latency, the min value is divided by 4 for the * initial delay, and dividing by 20 for the poll delay. * For reset, 5us/10us/500us if the device is respectively * reading/programming/erasing when the RESET occurs. Since we always * issue a RESET when the device is IDLE, 5us is selected for both initial * and poll delay. */ #define SPINAND_READ_INITIAL_DELAY_US 6 #define SPINAND_READ_POLL_DELAY_US 5 #define SPINAND_RESET_INITIAL_DELAY_US 5 #define SPINAND_RESET_POLL_DELAY_US 5 #define SPINAND_WRITE_INITIAL_DELAY_US 75 #define SPINAND_WRITE_POLL_DELAY_US 15 #define SPINAND_ERASE_INITIAL_DELAY_US 250 #define SPINAND_ERASE_POLL_DELAY_US 50 #define SPINAND_WAITRDY_TIMEOUT_MS 400 /** * struct spinand_id - SPI NAND id structure * @data: buffer containing the id bytes. Currently 4 bytes large, but can * be extended if required * @len: ID length */ struct spinand_id { u8 data[SPINAND_MAX_ID_LEN]; int len; }; enum spinand_readid_method { SPINAND_READID_METHOD_OPCODE, SPINAND_READID_METHOD_OPCODE_ADDR, SPINAND_READID_METHOD_OPCODE_DUMMY, }; /** * struct spinand_devid - SPI NAND device id structure * @id: device id of current chip * @len: number of bytes in device id * @method: method to read chip id * There are 3 possible variants: * SPINAND_READID_METHOD_OPCODE: chip id is returned immediately * after read_id opcode. * SPINAND_READID_METHOD_OPCODE_ADDR: chip id is returned after * read_id opcode + 1-byte address. * SPINAND_READID_METHOD_OPCODE_DUMMY: chip id is returned after * read_id opcode + 1 dummy byte. */ struct spinand_devid { const u8 *id; const u8 len; const enum spinand_readid_method method; }; /** * struct manufacurer_ops - SPI NAND manufacturer specific operations * @init: initialize a SPI NAND device * @cleanup: cleanup a SPI NAND device * * Each SPI NAND manufacturer driver should implement this interface so that * NAND chips coming from this vendor can be initialized properly. */ struct spinand_manufacturer_ops { int (*init)(struct spinand_device *spinand); void (*cleanup)(struct spinand_device *spinand); }; /** * struct spinand_manufacturer - SPI NAND manufacturer instance * @id: manufacturer ID * @name: manufacturer name * @devid_len: number of bytes in device ID * @chips: supported SPI NANDs under current manufacturer * @nchips: number of SPI NANDs available in chips array * @ops: manufacturer operations */ struct spinand_manufacturer { u8 id; char *name; const struct spinand_info *chips; const size_t nchips; const struct spinand_manufacturer_ops *ops; }; /* SPI NAND manufacturers */ extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; extern const struct spinand_manufacturer macronix_spinand_manufacturer; extern const struct spinand_manufacturer micron_spinand_manufacturer; extern const struct spinand_manufacturer paragon_spinand_manufacturer; extern const struct spinand_manufacturer toshiba_spinand_manufacturer; extern const struct spinand_manufacturer winbond_spinand_manufacturer; /** * struct spinand_op_variants - SPI NAND operation variants * @ops: the list of variants for a given operation * @nops: the number of variants * * Some operations like read-from-cache/write-to-cache have several variants * depending on the number of IO lines you use to transfer data or address * cycles. This structure is a way to describe the different variants supported * by a chip and let the core pick the best one based on the SPI mem controller * capabilities. */ struct spinand_op_variants { const struct spi_mem_op *ops; unsigned int nops; }; #define SPINAND_OP_VARIANTS(name, ...) \ const struct spinand_op_variants name = { \ .ops = (struct spi_mem_op[]) { __VA_ARGS__ }, \ .nops = sizeof((struct spi_mem_op[]){ __VA_ARGS__ }) / \ sizeof(struct spi_mem_op), \ } /** * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND * chip * @get_status: get the ECC status. Should return a positive number encoding * the number of corrected bitflips if correction was possible or * -EBADMSG if there are uncorrectable errors. I can also return * other negative error codes if the error is not caused by * uncorrectable bitflips * @ooblayout: the OOB layout used by the on-die ECC implementation */ struct spinand_ecc_info { int (*get_status)(struct spinand_device *spinand, u8 status); const struct mtd_ooblayout_ops *ooblayout; }; #define SPINAND_HAS_QE_BIT BIT(0) #define SPINAND_HAS_CR_FEAT_BIT BIT(1) /** * struct spinand_ondie_ecc_conf - private SPI-NAND on-die ECC engine structure * @status: status of the last wait operation that will be used in case * ->get_status() is not populated by the spinand device. */ struct spinand_ondie_ecc_conf { u8 status; }; /** * struct spinand_info - Structure used to describe SPI NAND chips * @model: model name * @devid: device ID * @flags: OR-ing of the SPINAND_XXX flags * @memorg: memory organization * @eccreq: ECC requirements * @eccinfo: on-die ECC info * @op_variants: operations variants * @op_variants.read_cache: variants of the read-cache operation * @op_variants.write_cache: variants of the write-cache operation * @op_variants.update_cache: variants of the update-cache operation * @select_target: function used to select a target/die. Required only for * multi-die chips * * Each SPI NAND manufacturer driver should have a spinand_info table * describing all the chips supported by the driver. */ struct spinand_info { const char *model; struct spinand_devid devid; u32 flags; struct nand_memory_organization memorg; struct nand_ecc_props eccreq; struct spinand_ecc_info eccinfo; struct { const struct spinand_op_variants *read_cache; const struct spinand_op_variants *write_cache; const struct spinand_op_variants *update_cache; } op_variants; int (*select_target)(struct spinand_device *spinand, unsigned int target); }; #define SPINAND_ID(__method, ...) \ { \ .id = (const u8[]){ __VA_ARGS__ }, \ .len = sizeof((u8[]){ __VA_ARGS__ }), \ .method = __method, \ } #define SPINAND_INFO_OP_VARIANTS(__read, __write, __update) \ { \ .read_cache = __read, \ .write_cache = __write, \ .update_cache = __update, \ } #define SPINAND_ECCINFO(__ooblayout, __get_status) \ .eccinfo = { \ .ooblayout = __ooblayout, \ .get_status = __get_status, \ } #define SPINAND_SELECT_TARGET(__func) \ .select_target = __func, #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants, \ __flags, ...) \ { \ .model = __model, \ .devid = __id, \ .memorg = __memorg, \ .eccreq = __eccreq, \ .op_variants = __op_variants, \ .flags = __flags, \ __VA_ARGS__ \ } struct spinand_dirmap { struct spi_mem_dirmap_desc *wdesc; struct spi_mem_dirmap_desc *rdesc; }; /** * struct spinand_device - SPI NAND device instance * @base: NAND device instance * @spimem: pointer to the SPI mem object * @lock: lock used to serialize accesses to the NAND * @id: NAND ID as returned by READ_ID * @flags: NAND flags * @op_templates: various SPI mem op templates * @op_templates.read_cache: read cache op template * @op_templates.write_cache: write cache op template * @op_templates.update_cache: update cache op template * @select_target: select a specific target/die. Usually called before sending * a command addressing a page or an eraseblock embedded in * this die. Only required if your chip exposes several dies * @cur_target: currently selected target/die * @eccinfo: on-die ECC information * @cfg_cache: config register cache. One entry per die * @databuf: bounce buffer for data * @oobbuf: bounce buffer for OOB data * @scratchbuf: buffer used for everything but page accesses. This is needed * because the spi-mem interface explicitly requests that buffers * passed in spi_mem_op be DMA-able, so we can't based the bufs on * the stack * @manufacturer: SPI NAND manufacturer information * @priv: manufacturer private data */ struct spinand_device { struct nand_device base; struct spi_mem *spimem; struct mutex lock; struct spinand_id id; u32 flags; struct { const struct spi_mem_op *read_cache; const struct spi_mem_op *write_cache; const struct spi_mem_op *update_cache; } op_templates; struct spinand_dirmap *dirmaps; int (*select_target)(struct spinand_device *spinand, unsigned int target); unsigned int cur_target; struct spinand_ecc_info eccinfo; u8 *cfg_cache; u8 *databuf; u8 *oobbuf; u8 *scratchbuf; const struct spinand_manufacturer *manufacturer; void *priv; }; /** * mtd_to_spinand() - Get the SPI NAND device attached to an MTD instance * @mtd: MTD instance * * Return: the SPI NAND device attached to @mtd. */ static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd) { return container_of(mtd_to_nanddev(mtd), struct spinand_device, base); } /** * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device * @spinand: SPI NAND device * * Return: the MTD device embedded in @spinand. */ static inline struct mtd_info *spinand_to_mtd(struct spinand_device *spinand) { return nanddev_to_mtd(&spinand->base); } /** * nand_to_spinand() - Get the SPI NAND device embedding an NAND object * @nand: NAND object * * Return: the SPI NAND device embedding @nand. */ static inline struct spinand_device *nand_to_spinand(struct nand_device *nand) { return container_of(nand, struct spinand_device, base); } /** * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object * @spinand: SPI NAND device * * Return: the NAND device embedded in @spinand. */ static inline struct nand_device * spinand_to_nand(struct spinand_device *spinand) { return &spinand->base; } /** * spinand_set_of_node - Attach a DT node to a SPI NAND device * @spinand: SPI NAND device * @np: DT node * * Attach a DT node to a SPI NAND device. */ static inline void spinand_set_of_node(struct spinand_device *spinand, struct device_node *np) { nanddev_set_of_node(&spinand->base, np); } int spinand_match_and_init(struct spinand_device *spinand, const struct spinand_info *table, unsigned int table_size, enum spinand_readid_method rdid_method); int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val); int spinand_select_target(struct spinand_device *spinand, unsigned int target); #endif /* __LINUX_MTD_SPINAND_H */ PK ! ���z z mtd/blktrans.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 2003-2010 David Woodhouse <dwmw2@infradead.org> */ #ifndef __MTD_TRANS_H__ #define __MTD_TRANS_H__ #include <linux/mutex.h> #include <linux/kref.h> #include <linux/sysfs.h> struct hd_geometry; struct mtd_info; struct mtd_blktrans_ops; struct file; struct inode; struct mtd_blktrans_dev { struct mtd_blktrans_ops *tr; struct list_head list; struct mtd_info *mtd; struct mutex lock; int devnum; bool bg_stop; unsigned long size; int readonly; int open; struct kref ref; struct gendisk *disk; struct attribute_group *disk_attributes; struct request_queue *rq; struct list_head rq_list; struct blk_mq_tag_set *tag_set; spinlock_t queue_lock; void *priv; fmode_t file_mode; }; struct mtd_blktrans_ops { char *name; int major; int part_bits; int blksize; int blkshift; /* Access functions */ int (*readsect)(struct mtd_blktrans_dev *dev, unsigned long block, char *buffer); int (*writesect)(struct mtd_blktrans_dev *dev, unsigned long block, char *buffer); int (*discard)(struct mtd_blktrans_dev *dev, unsigned long block, unsigned nr_blocks); void (*background)(struct mtd_blktrans_dev *dev); /* Block layer ioctls */ int (*getgeo)(struct mtd_blktrans_dev *dev, struct hd_geometry *geo); int (*flush)(struct mtd_blktrans_dev *dev); /* Called with mtd_table_mutex held; no race with add/remove */ int (*open)(struct mtd_blktrans_dev *dev); void (*release)(struct mtd_blktrans_dev *dev); /* Called on {de,}registration and on subsequent addition/removal of devices, with mtd_table_mutex held. */ void (*add_mtd)(struct mtd_blktrans_ops *tr, struct mtd_info *mtd); void (*remove_dev)(struct mtd_blktrans_dev *dev); struct list_head devs; struct list_head list; struct module *owner; }; extern int register_mtd_blktrans(struct mtd_blktrans_ops *tr); extern int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr); extern int add_mtd_blktrans_dev(struct mtd_blktrans_dev *dev); extern int del_mtd_blktrans_dev(struct mtd_blktrans_dev *dev); extern int mtd_blktrans_cease_background(struct mtd_blktrans_dev *dev); /** * module_mtd_blktrans() - Helper macro for registering a mtd blktrans driver * @__mtd_blktrans: mtd_blktrans_ops struct * * Helper macro for mtd blktrans drivers which do not do anything special in * module init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_mtd_blktrans(__mtd_blktrans) \ module_driver(__mtd_blktrans, register_mtd_blktrans, \ deregister_mtd_blktrans) #endif /* __MTD_TRANS_H__ */ PK ! E+�{� � mtd/plat-ram.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* linux/include/linux/mtd/plat-ram.h * * (c) 2004 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ * Ben Dooks <ben@simtec.co.uk> * * Generic platform device based RAM map */ #ifndef __LINUX_MTD_PLATRAM_H #define __LINUX_MTD_PLATRAM_H __FILE__ #define PLATRAM_RO (0) #define PLATRAM_RW (1) struct platdata_mtd_ram { const char *mapname; const char * const *map_probes; const char * const *probes; struct mtd_partition *partitions; int nr_partitions; int bankwidth; /* control callbacks */ void (*set_rw)(struct device *dev, int to); }; #endif /* __LINUX_MTD_PLATRAM_H */ PK ! ��:_C _C mtd/spi-nor.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2014 Freescale Semiconductor, Inc. */ #ifndef __LINUX_MTD_SPI_NOR_H #define __LINUX_MTD_SPI_NOR_H #include <linux/bitops.h> #include <linux/mtd/cfi.h> #include <linux/mtd/mtd.h> #include <linux/spi/spi-mem.h> /* * Note on opcode nomenclature: some opcodes have a format like * SPINOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number * of I/O lines used for the opcode, address, and data (respectively). The * FUNCTION has an optional suffix of '4', to represent an opcode which * requires a 4-byte (32-bit) address. */ /* Flash opcodes. */ #define SPINOR_OP_WRDI 0x04 /* Write disable */ #define SPINOR_OP_WREN 0x06 /* Write enable */ #define SPINOR_OP_RDSR 0x05 /* Read status register */ #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ #define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */ #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */ #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ #define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */ #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */ #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */ #define SPINOR_OP_READ_1_1_8 0x8b /* Read data bytes (Octal Output SPI) */ #define SPINOR_OP_READ_1_8_8 0xcb /* Read data bytes (Octal I/O SPI) */ #define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ #define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */ #define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */ #define SPINOR_OP_PP_1_1_8 0x82 /* Octal page program */ #define SPINOR_OP_PP_1_8_8 0xc2 /* Octal page program */ #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ #define SPINOR_OP_CHIP_ERASE 0xc7 /* Erase whole flash chip */ #define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */ #define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */ #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */ #define SPINOR_OP_RDCR 0x35 /* Read configuration register */ #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ #define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */ #define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */ #define SPINOR_OP_SRSTEN 0x66 /* Software Reset Enable */ #define SPINOR_OP_SRST 0x99 /* Software Reset */ #define SPINOR_OP_GBULK 0x98 /* Global Block Unlock */ /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ #define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */ #define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */ #define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */ #define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */ #define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */ #define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */ #define SPINOR_OP_READ_1_1_8_4B 0x7c /* Read data bytes (Octal Output SPI) */ #define SPINOR_OP_READ_1_8_8_4B 0xcc /* Read data bytes (Octal I/O SPI) */ #define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */ #define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */ #define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */ #define SPINOR_OP_PP_1_1_8_4B 0x84 /* Octal page program */ #define SPINOR_OP_PP_1_8_8_4B 0x8e /* Octal page program */ #define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */ #define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */ #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */ /* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */ #define SPINOR_OP_READ_1_1_1_DTR 0x0d #define SPINOR_OP_READ_1_2_2_DTR 0xbd #define SPINOR_OP_READ_1_4_4_DTR 0xed #define SPINOR_OP_READ_1_1_1_DTR_4B 0x0e #define SPINOR_OP_READ_1_2_2_DTR_4B 0xbe #define SPINOR_OP_READ_1_4_4_DTR_4B 0xee /* Used for SST flashes only. */ #define SPINOR_OP_BP 0x02 /* Byte program */ #define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */ /* Used for S3AN flashes only */ #define SPINOR_OP_XSE 0x50 /* Sector erase */ #define SPINOR_OP_XPP 0x82 /* Page program */ #define SPINOR_OP_XRDSR 0xd7 /* Read status register */ #define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ #define XSR_RDY BIT(7) /* Ready */ /* Used for Macronix and Winbond flashes. */ #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ /* Used for Spansion flashes only. */ #define SPINOR_OP_BRWR 0x17 /* Bank register write */ #define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ /* Used for Micron flashes only. */ #define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */ #define SPINOR_OP_WD_EVCR 0x61 /* Write EVCR register */ /* Used for GigaDevices and Winbond flashes. */ #define SPINOR_OP_ESECR 0x44 /* Erase Security registers */ #define SPINOR_OP_PSECR 0x42 /* Program Security registers */ #define SPINOR_OP_RSECR 0x48 /* Read Security registers */ /* Status Register bits. */ #define SR_WIP BIT(0) /* Write in progress */ #define SR_WEL BIT(1) /* Write enable latch */ /* meaning of other SR_* bits may differ between vendors */ #define SR_BP0 BIT(2) /* Block protect 0 */ #define SR_BP1 BIT(3) /* Block protect 1 */ #define SR_BP2 BIT(4) /* Block protect 2 */ #define SR_BP3 BIT(5) /* Block protect 3 */ #define SR_TB_BIT5 BIT(5) /* Top/Bottom protect */ #define SR_BP3_BIT6 BIT(6) /* Block protect 3 */ #define SR_TB_BIT6 BIT(6) /* Top/Bottom protect */ #define SR_SRWD BIT(7) /* SR write protect */ /* Spansion/Cypress specific status bits */ #define SR_E_ERR BIT(5) #define SR_P_ERR BIT(6) #define SR1_QUAD_EN_BIT6 BIT(6) #define SR_BP_SHIFT 2 /* Enhanced Volatile Configuration Register bits */ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ /* Flag Status Register bits */ #define FSR_READY BIT(7) /* Device status, 0 = Busy, 1 = Ready */ #define FSR_E_ERR BIT(5) /* Erase operation status */ #define FSR_P_ERR BIT(4) /* Program operation status */ #define FSR_PT_ERR BIT(1) /* Protection error bit */ /* Status Register 2 bits. */ #define SR2_QUAD_EN_BIT1 BIT(1) #define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */ #define SR2_LB2 BIT(4) /* Security Register Lock Bit 2 */ #define SR2_LB3 BIT(5) /* Security Register Lock Bit 3 */ #define SR2_QUAD_EN_BIT7 BIT(7) /* Supported SPI protocols */ #define SNOR_PROTO_INST_MASK GENMASK(23, 16) #define SNOR_PROTO_INST_SHIFT 16 #define SNOR_PROTO_INST(_nbits) \ ((((unsigned long)(_nbits)) << SNOR_PROTO_INST_SHIFT) & \ SNOR_PROTO_INST_MASK) #define SNOR_PROTO_ADDR_MASK GENMASK(15, 8) #define SNOR_PROTO_ADDR_SHIFT 8 #define SNOR_PROTO_ADDR(_nbits) \ ((((unsigned long)(_nbits)) << SNOR_PROTO_ADDR_SHIFT) & \ SNOR_PROTO_ADDR_MASK) #define SNOR_PROTO_DATA_MASK GENMASK(7, 0) #define SNOR_PROTO_DATA_SHIFT 0 #define SNOR_PROTO_DATA(_nbits) \ ((((unsigned long)(_nbits)) << SNOR_PROTO_DATA_SHIFT) & \ SNOR_PROTO_DATA_MASK) #define SNOR_PROTO_IS_DTR BIT(24) /* Double Transfer Rate */ #define SNOR_PROTO_STR(_inst_nbits, _addr_nbits, _data_nbits) \ (SNOR_PROTO_INST(_inst_nbits) | \ SNOR_PROTO_ADDR(_addr_nbits) | \ SNOR_PROTO_DATA(_data_nbits)) #define SNOR_PROTO_DTR(_inst_nbits, _addr_nbits, _data_nbits) \ (SNOR_PROTO_IS_DTR | \ SNOR_PROTO_STR(_inst_nbits, _addr_nbits, _data_nbits)) enum spi_nor_protocol { SNOR_PROTO_1_1_1 = SNOR_PROTO_STR(1, 1, 1), SNOR_PROTO_1_1_2 = SNOR_PROTO_STR(1, 1, 2), SNOR_PROTO_1_1_4 = SNOR_PROTO_STR(1, 1, 4), SNOR_PROTO_1_1_8 = SNOR_PROTO_STR(1, 1, 8), SNOR_PROTO_1_2_2 = SNOR_PROTO_STR(1, 2, 2), SNOR_PROTO_1_4_4 = SNOR_PROTO_STR(1, 4, 4), SNOR_PROTO_1_8_8 = SNOR_PROTO_STR(1, 8, 8), SNOR_PROTO_2_2_2 = SNOR_PROTO_STR(2, 2, 2), SNOR_PROTO_4_4_4 = SNOR_PROTO_STR(4, 4, 4), SNOR_PROTO_8_8_8 = SNOR_PROTO_STR(8, 8, 8), SNOR_PROTO_1_1_1_DTR = SNOR_PROTO_DTR(1, 1, 1), SNOR_PROTO_1_2_2_DTR = SNOR_PROTO_DTR(1, 2, 2), SNOR_PROTO_1_4_4_DTR = SNOR_PROTO_DTR(1, 4, 4), SNOR_PROTO_1_8_8_DTR = SNOR_PROTO_DTR(1, 8, 8), SNOR_PROTO_8_8_8_DTR = SNOR_PROTO_DTR(8, 8, 8), }; static inline bool spi_nor_protocol_is_dtr(enum spi_nor_protocol proto) { return !!(proto & SNOR_PROTO_IS_DTR); } static inline u8 spi_nor_get_protocol_inst_nbits(enum spi_nor_protocol proto) { return ((unsigned long)(proto & SNOR_PROTO_INST_MASK)) >> SNOR_PROTO_INST_SHIFT; } static inline u8 spi_nor_get_protocol_addr_nbits(enum spi_nor_protocol proto) { return ((unsigned long)(proto & SNOR_PROTO_ADDR_MASK)) >> SNOR_PROTO_ADDR_SHIFT; } static inline u8 spi_nor_get_protocol_data_nbits(enum spi_nor_protocol proto) { return ((unsigned long)(proto & SNOR_PROTO_DATA_MASK)) >> SNOR_PROTO_DATA_SHIFT; } static inline u8 spi_nor_get_protocol_width(enum spi_nor_protocol proto) { return spi_nor_get_protocol_data_nbits(proto); } /** * struct spi_nor_hwcaps - Structure for describing the hardware capabilies * supported by the SPI controller (bus master). * @mask: the bitmask listing all the supported hw capabilies */ struct spi_nor_hwcaps { u32 mask; }; /* *(Fast) Read capabilities. * MUST be ordered by priority: the higher bit position, the higher priority. * As a matter of performances, it is relevant to use Octal SPI protocols first, * then Quad SPI protocols before Dual SPI protocols, Fast Read and lastly * (Slow) Read. */ #define SNOR_HWCAPS_READ_MASK GENMASK(15, 0) #define SNOR_HWCAPS_READ BIT(0) #define SNOR_HWCAPS_READ_FAST BIT(1) #define SNOR_HWCAPS_READ_1_1_1_DTR BIT(2) #define SNOR_HWCAPS_READ_DUAL GENMASK(6, 3) #define SNOR_HWCAPS_READ_1_1_2 BIT(3) #define SNOR_HWCAPS_READ_1_2_2 BIT(4) #define SNOR_HWCAPS_READ_2_2_2 BIT(5) #define SNOR_HWCAPS_READ_1_2_2_DTR BIT(6) #define SNOR_HWCAPS_READ_QUAD GENMASK(10, 7) #define SNOR_HWCAPS_READ_1_1_4 BIT(7) #define SNOR_HWCAPS_READ_1_4_4 BIT(8) #define SNOR_HWCAPS_READ_4_4_4 BIT(9) #define SNOR_HWCAPS_READ_1_4_4_DTR BIT(10) #define SNOR_HWCAPS_READ_OCTAL GENMASK(15, 11) #define SNOR_HWCAPS_READ_1_1_8 BIT(11) #define SNOR_HWCAPS_READ_1_8_8 BIT(12) #define SNOR_HWCAPS_READ_8_8_8 BIT(13) #define SNOR_HWCAPS_READ_1_8_8_DTR BIT(14) #define SNOR_HWCAPS_READ_8_8_8_DTR BIT(15) /* * Page Program capabilities. * MUST be ordered by priority: the higher bit position, the higher priority. * Like (Fast) Read capabilities, Octal/Quad SPI protocols are preferred to the * legacy SPI 1-1-1 protocol. * Note that Dual Page Programs are not supported because there is no existing * JEDEC/SFDP standard to define them. Also at this moment no SPI flash memory * implements such commands. */ #define SNOR_HWCAPS_PP_MASK GENMASK(23, 16) #define SNOR_HWCAPS_PP BIT(16) #define SNOR_HWCAPS_PP_QUAD GENMASK(19, 17) #define SNOR_HWCAPS_PP_1_1_4 BIT(17) #define SNOR_HWCAPS_PP_1_4_4 BIT(18) #define SNOR_HWCAPS_PP_4_4_4 BIT(19) #define SNOR_HWCAPS_PP_OCTAL GENMASK(23, 20) #define SNOR_HWCAPS_PP_1_1_8 BIT(20) #define SNOR_HWCAPS_PP_1_8_8 BIT(21) #define SNOR_HWCAPS_PP_8_8_8 BIT(22) #define SNOR_HWCAPS_PP_8_8_8_DTR BIT(23) #define SNOR_HWCAPS_X_X_X (SNOR_HWCAPS_READ_2_2_2 | \ SNOR_HWCAPS_READ_4_4_4 | \ SNOR_HWCAPS_READ_8_8_8 | \ SNOR_HWCAPS_PP_4_4_4 | \ SNOR_HWCAPS_PP_8_8_8) #define SNOR_HWCAPS_X_X_X_DTR (SNOR_HWCAPS_READ_8_8_8_DTR | \ SNOR_HWCAPS_PP_8_8_8_DTR) #define SNOR_HWCAPS_DTR (SNOR_HWCAPS_READ_1_1_1_DTR | \ SNOR_HWCAPS_READ_1_2_2_DTR | \ SNOR_HWCAPS_READ_1_4_4_DTR | \ SNOR_HWCAPS_READ_1_8_8_DTR | \ SNOR_HWCAPS_READ_8_8_8_DTR) #define SNOR_HWCAPS_ALL (SNOR_HWCAPS_READ_MASK | \ SNOR_HWCAPS_PP_MASK) /* Forward declaration that is used in 'struct spi_nor_controller_ops' */ struct spi_nor; /** * struct spi_nor_controller_ops - SPI NOR controller driver specific * operations. * @prepare: [OPTIONAL] do some preparations for the * read/write/erase/lock/unlock operations. * @unprepare: [OPTIONAL] do some post work after the * read/write/erase/lock/unlock operations. * @read_reg: read out the register. * @write_reg: write data to the register. * @read: read data from the SPI NOR. * @write: write data to the SPI NOR. * @erase: erase a sector of the SPI NOR at the offset @offs; if * not provided by the driver, SPI NOR will send the erase * opcode via write_reg(). */ struct spi_nor_controller_ops { int (*prepare)(struct spi_nor *nor); void (*unprepare)(struct spi_nor *nor); int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, size_t len); int (*write_reg)(struct spi_nor *nor, u8 opcode, const u8 *buf, size_t len); ssize_t (*read)(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); ssize_t (*write)(struct spi_nor *nor, loff_t to, size_t len, const u8 *buf); int (*erase)(struct spi_nor *nor, loff_t offs); }; /** * enum spi_nor_cmd_ext - describes the command opcode extension in DTR mode * @SPI_NOR_EXT_NONE: no extension. This is the default, and is used in Legacy * SPI mode * @SPI_NOR_EXT_REPEAT: the extension is same as the opcode * @SPI_NOR_EXT_INVERT: the extension is the bitwise inverse of the opcode * @SPI_NOR_EXT_HEX: the extension is any hex value. The command and opcode * combine to form a 16-bit opcode. */ enum spi_nor_cmd_ext { SPI_NOR_EXT_NONE = 0, SPI_NOR_EXT_REPEAT, SPI_NOR_EXT_INVERT, SPI_NOR_EXT_HEX, }; /* * Forward declarations that are used internally by the core and manufacturer * drivers. */ struct flash_info; struct spi_nor_manufacturer; struct spi_nor_flash_parameter; /** * struct spi_nor - Structure for defining the SPI NOR layer * @mtd: an mtd_info structure * @lock: the lock for the read/write/erase/lock/unlock operations * @dev: pointer to an SPI device or an SPI NOR controller device * @spimem: pointer to the SPI memory device * @bouncebuf: bounce buffer used when the buffer passed by the MTD * layer is not DMA-able * @bouncebuf_size: size of the bounce buffer * @info: SPI NOR part JEDEC MFR ID and other info * @manufacturer: SPI NOR manufacturer * @page_size: the page size of the SPI NOR * @addr_width: number of address bytes * @erase_opcode: the opcode for erasing a sector * @read_opcode: the read opcode * @read_dummy: the dummy needed by the read operation * @program_opcode: the program opcode * @sst_write_second: used by the SST write operation * @flags: flag options for the current SPI NOR (SNOR_F_*) * @cmd_ext_type: the command opcode extension type for DTR mode. * @read_proto: the SPI protocol for read operations * @write_proto: the SPI protocol for write operations * @reg_proto: the SPI protocol for read_reg/write_reg/erase operations * @sfdp: the SFDP data of the flash * @controller_ops: SPI NOR controller driver specific operations. * @params: [FLASH-SPECIFIC] SPI NOR flash parameters and settings. * The structure includes legacy flash parameters and * settings that can be overwritten by the spi_nor_fixups * hooks, or dynamically when parsing the SFDP tables. * @dirmap: pointers to struct spi_mem_dirmap_desc for reads/writes. * @priv: pointer to the private data */ struct spi_nor { struct mtd_info mtd; struct mutex lock; struct device *dev; struct spi_mem *spimem; u8 *bouncebuf; size_t bouncebuf_size; const struct flash_info *info; const struct spi_nor_manufacturer *manufacturer; u32 page_size; u8 addr_width; u8 erase_opcode; u8 read_opcode; u8 read_dummy; u8 program_opcode; enum spi_nor_protocol read_proto; enum spi_nor_protocol write_proto; enum spi_nor_protocol reg_proto; bool sst_write_second; u32 flags; enum spi_nor_cmd_ext cmd_ext_type; struct sfdp *sfdp; const struct spi_nor_controller_ops *controller_ops; struct spi_nor_flash_parameter *params; struct { struct spi_mem_dirmap_desc *rdesc; struct spi_mem_dirmap_desc *wdesc; } dirmap; void *priv; }; static inline void spi_nor_set_flash_node(struct spi_nor *nor, struct device_node *np) { mtd_set_of_node(&nor->mtd, np); } static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor) { return mtd_get_of_node(&nor->mtd); } /** * spi_nor_scan() - scan the SPI NOR * @nor: the spi_nor structure * @name: the chip type name * @hwcaps: the hardware capabilities supported by the controller driver * * The drivers can use this function to scan the SPI NOR. * In the scanning, it will try to get all the necessary information to * fill the mtd_info{} and the spi_nor{}. * * The chip type name can be provided through the @name parameter. * * Return: 0 for success, others for failure. */ int spi_nor_scan(struct spi_nor *nor, const char *name, const struct spi_nor_hwcaps *hwcaps); /** * spi_nor_restore_addr_mode() - restore the status of SPI NOR * @nor: the spi_nor structure */ void spi_nor_restore(struct spi_nor *nor); #endif PK ! �� � mtd/mtdram.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __MTD_MTDRAM_H__ #define __MTD_MTDRAM_H__ #include <linux/mtd/mtd.h> int mtdram_init_device(struct mtd_info *mtd, void *mapped_address, unsigned long size, const char *name); #endif /* __MTD_MTDRAM_H__ */ PK ! m� ' �' mtd/cfi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> et al. */ #ifndef __MTD_CFI_H__ #define __MTD_CFI_H__ #include <linux/delay.h> #include <linux/types.h> #include <linux/bug.h> #include <linux/interrupt.h> #include <linux/mtd/flashchip.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi_endian.h> #include <linux/mtd/xip.h> #ifdef CONFIG_MTD_CFI_I1 #define cfi_interleave(cfi) 1 #define cfi_interleave_is_1(cfi) (cfi_interleave(cfi) == 1) #else #define cfi_interleave_is_1(cfi) (0) #endif #ifdef CONFIG_MTD_CFI_I2 # ifdef cfi_interleave # undef cfi_interleave # define cfi_interleave(cfi) ((cfi)->interleave) # else # define cfi_interleave(cfi) 2 # endif #define cfi_interleave_is_2(cfi) (cfi_interleave(cfi) == 2) #else #define cfi_interleave_is_2(cfi) (0) #endif #ifdef CONFIG_MTD_CFI_I4 # ifdef cfi_interleave # undef cfi_interleave # define cfi_interleave(cfi) ((cfi)->interleave) # else # define cfi_interleave(cfi) 4 # endif #define cfi_interleave_is_4(cfi) (cfi_interleave(cfi) == 4) #else #define cfi_interleave_is_4(cfi) (0) #endif #ifdef CONFIG_MTD_CFI_I8 # ifdef cfi_interleave # undef cfi_interleave # define cfi_interleave(cfi) ((cfi)->interleave) # else # define cfi_interleave(cfi) 8 # endif #define cfi_interleave_is_8(cfi) (cfi_interleave(cfi) == 8) #else #define cfi_interleave_is_8(cfi) (0) #endif #ifndef cfi_interleave #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. static inline int cfi_interleave(void *cfi) { BUG(); return 0; } #endif static inline int cfi_interleave_supported(int i) { switch (i) { #ifdef CONFIG_MTD_CFI_I1 case 1: #endif #ifdef CONFIG_MTD_CFI_I2 case 2: #endif #ifdef CONFIG_MTD_CFI_I4 case 4: #endif #ifdef CONFIG_MTD_CFI_I8 case 8: #endif return 1; default: return 0; } } /* NB: these values must represents the number of bytes needed to meet the * device type (x8, x16, x32). Eg. a 32 bit device is 4 x 8 bytes. * These numbers are used in calculations. */ #define CFI_DEVICETYPE_X8 (8 / 8) #define CFI_DEVICETYPE_X16 (16 / 8) #define CFI_DEVICETYPE_X32 (32 / 8) #define CFI_DEVICETYPE_X64 (64 / 8) /* Device Interface Code Assignments from the "Common Flash Memory Interface * Publication 100" dated December 1, 2001. */ #define CFI_INTERFACE_X8_ASYNC 0x0000 #define CFI_INTERFACE_X16_ASYNC 0x0001 #define CFI_INTERFACE_X8_BY_X16_ASYNC 0x0002 #define CFI_INTERFACE_X32_ASYNC 0x0003 #define CFI_INTERFACE_X16_BY_X32_ASYNC 0x0005 #define CFI_INTERFACE_NOT_ALLOWED 0xffff /* NB: We keep these structures in memory in HOST byteorder, except * where individually noted. */ /* Basic Query Structure */ struct cfi_ident { uint8_t qry[3]; uint16_t P_ID; uint16_t P_ADR; uint16_t A_ID; uint16_t A_ADR; uint8_t VccMin; uint8_t VccMax; uint8_t VppMin; uint8_t VppMax; uint8_t WordWriteTimeoutTyp; uint8_t BufWriteTimeoutTyp; uint8_t BlockEraseTimeoutTyp; uint8_t ChipEraseTimeoutTyp; uint8_t WordWriteTimeoutMax; uint8_t BufWriteTimeoutMax; uint8_t BlockEraseTimeoutMax; uint8_t ChipEraseTimeoutMax; uint8_t DevSize; uint16_t InterfaceDesc; uint16_t MaxBufWriteSize; uint8_t NumEraseRegions; uint32_t EraseRegionInfo[]; /* Not host ordered */ } __packed; /* Extended Query Structure for both PRI and ALT */ struct cfi_extquery { uint8_t pri[3]; uint8_t MajorVersion; uint8_t MinorVersion; } __packed; /* Vendor-Specific PRI for Intel/Sharp Extended Command Set (0x0001) */ struct cfi_pri_intelext { uint8_t pri[3]; uint8_t MajorVersion; uint8_t MinorVersion; uint32_t FeatureSupport; /* if bit 31 is set then an additional uint32_t feature block follows - FIXME - not currently supported */ uint8_t SuspendCmdSupport; uint16_t BlkStatusRegMask; uint8_t VccOptimal; uint8_t VppOptimal; uint8_t NumProtectionFields; uint16_t ProtRegAddr; uint8_t FactProtRegSize; uint8_t UserProtRegSize; uint8_t extra[]; } __packed; struct cfi_intelext_otpinfo { uint32_t ProtRegAddr; uint16_t FactGroups; uint8_t FactProtRegSize; uint16_t UserGroups; uint8_t UserProtRegSize; } __packed; struct cfi_intelext_blockinfo { uint16_t NumIdentBlocks; uint16_t BlockSize; uint16_t MinBlockEraseCycles; uint8_t BitsPerCell; uint8_t BlockCap; } __packed; struct cfi_intelext_regioninfo { uint16_t NumIdentPartitions; uint8_t NumOpAllowed; uint8_t NumOpAllowedSimProgMode; uint8_t NumOpAllowedSimEraMode; uint8_t NumBlockTypes; struct cfi_intelext_blockinfo BlockTypes[1]; } __packed; struct cfi_intelext_programming_regioninfo { uint8_t ProgRegShift; uint8_t Reserved1; uint8_t ControlValid; uint8_t Reserved2; uint8_t ControlInvalid; uint8_t Reserved3; } __packed; /* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */ struct cfi_pri_amdstd { uint8_t pri[3]; uint8_t MajorVersion; uint8_t MinorVersion; uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */ uint8_t EraseSuspend; uint8_t BlkProt; uint8_t TmpBlkUnprotect; uint8_t BlkProtUnprot; uint8_t SimultaneousOps; uint8_t BurstMode; uint8_t PageMode; uint8_t VppMin; uint8_t VppMax; uint8_t TopBottom; /* Below field are added from version 1.5 */ uint8_t ProgramSuspend; uint8_t UnlockBypass; uint8_t SecureSiliconSector; uint8_t SoftwareFeatures; #define CFI_POLL_STATUS_REG BIT(0) #define CFI_POLL_DQ BIT(1) } __packed; /* Vendor-Specific PRI for Atmel chips (command set 0x0002) */ struct cfi_pri_atmel { uint8_t pri[3]; uint8_t MajorVersion; uint8_t MinorVersion; uint8_t Features; uint8_t BottomBoot; uint8_t BurstMode; uint8_t PageMode; } __packed; struct cfi_pri_query { uint8_t NumFields; uint32_t ProtField[1]; /* Not host ordered */ } __packed; struct cfi_bri_query { uint8_t PageModeReadCap; uint8_t NumFields; uint32_t ConfField[1]; /* Not host ordered */ } __packed; #define P_ID_NONE 0x0000 #define P_ID_INTEL_EXT 0x0001 #define P_ID_AMD_STD 0x0002 #define P_ID_INTEL_STD 0x0003 #define P_ID_AMD_EXT 0x0004 #define P_ID_WINBOND 0x0006 #define P_ID_ST_ADV 0x0020 #define P_ID_MITSUBISHI_STD 0x0100 #define P_ID_MITSUBISHI_EXT 0x0101 #define P_ID_SST_PAGE 0x0102 #define P_ID_SST_OLD 0x0701 #define P_ID_INTEL_PERFORMANCE 0x0200 #define P_ID_INTEL_DATA 0x0210 #define P_ID_RESERVED 0xffff #define CFI_MODE_CFI 1 #define CFI_MODE_JEDEC 0 struct cfi_private { uint16_t cmdset; void *cmdset_priv; int interleave; int device_type; int cfi_mode; /* Are we a JEDEC device pretending to be CFI? */ int addr_unlock1; int addr_unlock2; struct mtd_info *(*cmdset_setup)(struct map_info *); struct cfi_ident *cfiq; /* For now only one. We insist that all devs must be of the same type. */ int mfr, id; int numchips; map_word sector_erase_cmd; unsigned long chipshift; /* Because they're of the same type */ const char *im_name; /* inter_module name for cmdset_setup */ unsigned long quirks; struct flchip chips[]; /* per-chip data structure for each chip */ }; uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs, struct map_info *map, struct cfi_private *cfi); map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cfi_private *cfi); #define CMD(x) cfi_build_cmd((x), map, cfi) unsigned long cfi_merge_status(map_word val, struct map_info *map, struct cfi_private *cfi); #define MERGESTATUS(x) cfi_merge_status((x), map, cfi) uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t base, struct map_info *map, struct cfi_private *cfi, int type, map_word *prev_val); static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr) { map_word val = map_read(map, addr); if (map_bankwidth_is_1(map)) { return val.x[0]; } else if (map_bankwidth_is_2(map)) { return cfi16_to_cpu(map, val.x[0]); } else { /* No point in a 64-bit byteswap since that would just be swapping the responses from different chips, and we are only interested in one chip (a representative sample) */ return cfi32_to_cpu(map, val.x[0]); } } static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr) { map_word val = map_read(map, addr); if (map_bankwidth_is_1(map)) { return val.x[0] & 0xff; } else if (map_bankwidth_is_2(map)) { return cfi16_to_cpu(map, val.x[0]); } else { /* No point in a 64-bit byteswap since that would just be swapping the responses from different chips, and we are only interested in one chip (a representative sample) */ return cfi32_to_cpu(map, val.x[0]); } } void cfi_udelay(int us); int __xipram cfi_qry_present(struct map_info *map, __u32 base, struct cfi_private *cfi); int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map, struct cfi_private *cfi); void __xipram cfi_qry_mode_off(uint32_t base, struct map_info *map, struct cfi_private *cfi); struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size, const char* name); struct cfi_fixup { uint16_t mfr; uint16_t id; void (*fixup)(struct mtd_info *mtd); }; #define CFI_MFR_ANY 0xFFFF #define CFI_ID_ANY 0xFFFF #define CFI_MFR_CONTINUATION 0x007F #define CFI_MFR_AMD 0x0001 #define CFI_MFR_AMIC 0x0037 #define CFI_MFR_ATMEL 0x001F #define CFI_MFR_EON 0x001C #define CFI_MFR_FUJITSU 0x0004 #define CFI_MFR_HYUNDAI 0x00AD #define CFI_MFR_INTEL 0x0089 #define CFI_MFR_MACRONIX 0x00C2 #define CFI_MFR_NEC 0x0010 #define CFI_MFR_PMC 0x009D #define CFI_MFR_SAMSUNG 0x00EC #define CFI_MFR_SHARP 0x00B0 #define CFI_MFR_SST 0x00BF #define CFI_MFR_ST 0x0020 /* STMicroelectronics */ #define CFI_MFR_MICRON 0x002C /* Micron */ #define CFI_MFR_TOSHIBA 0x0098 #define CFI_MFR_WINBOND 0x00DA void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups); typedef int (*varsize_frob_t)(struct map_info *map, struct flchip *chip, unsigned long adr, int len, void *thunk); int cfi_varsize_frob(struct mtd_info *mtd, varsize_frob_t frob, loff_t ofs, size_t len, void *thunk); #endif /* __MTD_CFI_H__ */ PK ! �{c��� �� mtd/rawnand.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> * Steven J. Hill <sjhill@realitydiluted.com> * Thomas Gleixner <tglx@linutronix.de> * * Info: * Contains standard defines and IDs for NAND flash devices * * Changelog: * See git changelog. */ #ifndef __LINUX_MTD_RAWNAND_H #define __LINUX_MTD_RAWNAND_H #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/flashchip.h> #include <linux/mtd/bbm.h> #include <linux/mtd/jedec.h> #include <linux/mtd/onfi.h> #include <linux/mutex.h> #include <linux/of.h> #include <linux/types.h> struct nand_chip; struct gpio_desc; /* The maximum number of NAND chips in an array */ #define NAND_MAX_CHIPS 8 /* * Constants for hardware specific CLE/ALE/NCE function * * These are bits which can be or'ed to set/clear multiple * bits in one go. */ /* Select the chip by setting nCE to low */ #define NAND_NCE 0x01 /* Select the command latch by setting CLE to high */ #define NAND_CLE 0x02 /* Select the address latch by setting ALE to high */ #define NAND_ALE 0x04 #define NAND_CTRL_CLE (NAND_NCE | NAND_CLE) #define NAND_CTRL_ALE (NAND_NCE | NAND_ALE) #define NAND_CTRL_CHANGE 0x80 /* * Standard NAND flash commands */ #define NAND_CMD_READ0 0 #define NAND_CMD_READ1 1 #define NAND_CMD_RNDOUT 5 #define NAND_CMD_PAGEPROG 0x10 #define NAND_CMD_READOOB 0x50 #define NAND_CMD_ERASE1 0x60 #define NAND_CMD_STATUS 0x70 #define NAND_CMD_SEQIN 0x80 #define NAND_CMD_RNDIN 0x85 #define NAND_CMD_READID 0x90 #define NAND_CMD_ERASE2 0xd0 #define NAND_CMD_PARAM 0xec #define NAND_CMD_GET_FEATURES 0xee #define NAND_CMD_SET_FEATURES 0xef #define NAND_CMD_RESET 0xff /* Extended commands for large page devices */ #define NAND_CMD_READSTART 0x30 #define NAND_CMD_RNDOUTSTART 0xE0 #define NAND_CMD_CACHEDPROG 0x15 #define NAND_CMD_NONE -1 /* Status bits */ #define NAND_STATUS_FAIL 0x01 #define NAND_STATUS_FAIL_N1 0x02 #define NAND_STATUS_TRUE_READY 0x20 #define NAND_STATUS_READY 0x40 #define NAND_STATUS_WP 0x80 #define NAND_DATA_IFACE_CHECK_ONLY -1 /* * Constants for Hardware ECC */ /* Reset Hardware ECC for read */ #define NAND_ECC_READ 0 /* Reset Hardware ECC for write */ #define NAND_ECC_WRITE 1 /* Enable Hardware ECC before syndrome is read back from flash */ #define NAND_ECC_READSYN 2 /* * Enable generic NAND 'page erased' check. This check is only done when * ecc.correct() returns -EBADMSG. * Set this flag if your implementation does not fix bitflips in erased * pages and you want to rely on the default implementation. */ #define NAND_ECC_GENERIC_ERASED_CHECK BIT(0) /* * Option constants for bizarre disfunctionality and real * features. */ /* Buswidth is 16 bit */ #define NAND_BUSWIDTH_16 BIT(1) /* * When using software implementation of Hamming, we can specify which byte * ordering should be used. */ #define NAND_ECC_SOFT_HAMMING_SM_ORDER BIT(2) /* Chip has cache program function */ #define NAND_CACHEPRG BIT(3) /* Options valid for Samsung large page devices */ #define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG /* * Chip requires ready check on read (for auto-incremented sequential read). * True only for small page devices; large page devices do not support * autoincrement. */ #define NAND_NEED_READRDY BIT(8) /* Chip does not allow subpage writes */ #define NAND_NO_SUBPAGE_WRITE BIT(9) /* Device is one of 'new' xD cards that expose fake nand command set */ #define NAND_BROKEN_XD BIT(10) /* Device behaves just like nand, but is readonly */ #define NAND_ROM BIT(11) /* Device supports subpage reads */ #define NAND_SUBPAGE_READ BIT(12) /* Macros to identify the above */ #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) /* * Some MLC NANDs need data scrambling to limit bitflips caused by repeated * patterns. */ #define NAND_NEED_SCRAMBLING BIT(13) /* Device needs 3rd row address cycle */ #define NAND_ROW_ADDR_3 BIT(14) /* Non chip related options */ /* This option skips the bbt scan during initialization. */ #define NAND_SKIP_BBTSCAN BIT(16) /* Chip may not exist, so silence any errors in scan */ #define NAND_SCAN_SILENT_NODEV BIT(18) /* * Autodetect nand buswidth with readid/onfi. * This suppose the driver will configure the hardware in 8 bits mode * when calling nand_scan_ident, and update its configuration * before calling nand_scan_tail. */ #define NAND_BUSWIDTH_AUTO BIT(19) /* * This option could be defined by controller drivers to protect against * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers */ #define NAND_USES_DMA BIT(20) /* * In case your controller is implementing ->legacy.cmd_ctrl() and is relying * on the default ->cmdfunc() implementation, you may want to let the core * handle the tCCS delay which is required when a column change (RNDIN or * RNDOUT) is requested. * If your controller already takes care of this delay, you don't need to set * this flag. */ #define NAND_WAIT_TCCS BIT(21) /* * Whether the NAND chip is a boot medium. Drivers might use this information * to select ECC algorithms supported by the boot ROM or similar restrictions. */ #define NAND_IS_BOOT_MEDIUM BIT(22) /* * Do not try to tweak the timings at runtime. This is needed when the * controller initializes the timings on itself or when it relies on * configuration done by the bootloader. */ #define NAND_KEEP_TIMINGS BIT(23) /* * There are different places where the manufacturer stores the factory bad * block markers. * * Position within the block: Each of these pages needs to be checked for a * bad block marking pattern. */ #define NAND_BBM_FIRSTPAGE BIT(24) #define NAND_BBM_SECONDPAGE BIT(25) #define NAND_BBM_LASTPAGE BIT(26) /* * Some controllers with pipelined ECC engines override the BBM marker with * data or ECC bytes, thus making bad block detection through bad block marker * impossible. Let's flag those chips so the core knows it shouldn't check the * BBM and consider all blocks good. */ #define NAND_NO_BBM_QUIRK BIT(27) /* Cell info constants */ #define NAND_CI_CHIPNR_MSK 0x03 #define NAND_CI_CELLTYPE_MSK 0x0C #define NAND_CI_CELLTYPE_SHIFT 2 /* Position within the OOB data of the page */ #define NAND_BBM_POS_SMALL 5 #define NAND_BBM_POS_LARGE 0 /** * struct nand_parameters - NAND generic parameters from the parameter page * @model: Model name * @supports_set_get_features: The NAND chip supports setting/getting features * @set_feature_list: Bitmap of features that can be set * @get_feature_list: Bitmap of features that can be get * @onfi: ONFI specific parameters */ struct nand_parameters { /* Generic parameters */ const char *model; bool supports_set_get_features; DECLARE_BITMAP(set_feature_list, ONFI_FEATURE_NUMBER); DECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER); /* ONFI parameters */ struct onfi_params *onfi; }; /* The maximum expected count of bytes in the NAND ID sequence */ #define NAND_MAX_ID_LEN 8 /** * struct nand_id - NAND id structure * @data: buffer containing the id bytes. * @len: ID length. */ struct nand_id { u8 data[NAND_MAX_ID_LEN]; int len; }; /** * struct nand_ecc_step_info - ECC step information of ECC engine * @stepsize: data bytes per ECC step * @strengths: array of supported strengths * @nstrengths: number of supported strengths */ struct nand_ecc_step_info { int stepsize; const int *strengths; int nstrengths; }; /** * struct nand_ecc_caps - capability of ECC engine * @stepinfos: array of ECC step information * @nstepinfos: number of ECC step information * @calc_ecc_bytes: driver's hook to calculate ECC bytes per step */ struct nand_ecc_caps { const struct nand_ecc_step_info *stepinfos; int nstepinfos; int (*calc_ecc_bytes)(int step_size, int strength); }; /* a shorthand to generate struct nand_ecc_caps with only one ECC stepsize */ #define NAND_ECC_CAPS_SINGLE(__name, __calc, __step, ...) \ static const int __name##_strengths[] = { __VA_ARGS__ }; \ static const struct nand_ecc_step_info __name##_stepinfo = { \ .stepsize = __step, \ .strengths = __name##_strengths, \ .nstrengths = ARRAY_SIZE(__name##_strengths), \ }; \ static const struct nand_ecc_caps __name = { \ .stepinfos = &__name##_stepinfo, \ .nstepinfos = 1, \ .calc_ecc_bytes = __calc, \ } /** * struct nand_ecc_ctrl - Control structure for ECC * @engine_type: ECC engine type * @placement: OOB bytes placement * @algo: ECC algorithm * @steps: number of ECC steps per page * @size: data bytes per ECC step * @bytes: ECC bytes per step * @strength: max number of correctible bits per ECC step * @total: total number of ECC bytes per page * @prepad: padding information for syndrome based ECC generators * @postpad: padding information for syndrome based ECC generators * @options: ECC specific options (see NAND_ECC_XXX flags defined above) * @calc_buf: buffer for calculated ECC, size is oobsize. * @code_buf: buffer for ECC read from flash, size is oobsize. * @hwctl: function to control hardware ECC generator. Must only * be provided if an hardware ECC is available * @calculate: function for ECC calculation or readback from ECC hardware * @correct: function for ECC correction, matching to ECC generator (sw/hw). * Should return a positive number representing the number of * corrected bitflips, -EBADMSG if the number of bitflips exceed * ECC strength, or any other error code if the error is not * directly related to correction. * If -EBADMSG is returned the input buffers should be left * untouched. * @read_page_raw: function to read a raw page without ECC. This function * should hide the specific layout used by the ECC * controller and always return contiguous in-band and * out-of-band data even if they're not stored * contiguously on the NAND chip (e.g. * NAND_ECC_PLACEMENT_INTERLEAVED interleaves in-band and * out-of-band data). * @write_page_raw: function to write a raw page without ECC. This function * should hide the specific layout used by the ECC * controller and consider the passed data as contiguous * in-band and out-of-band data. ECC controller is * responsible for doing the appropriate transformations * to adapt to its specific layout (e.g. * NAND_ECC_PLACEMENT_INTERLEAVED interleaves in-band and * out-of-band data). * @read_page: function to read a page according to the ECC generator * requirements; returns maximum number of bitflips corrected in * any single ECC step, -EIO hw error * @read_subpage: function to read parts of the page covered by ECC; * returns same as read_page() * @write_subpage: function to write parts of the page covered by ECC. * @write_page: function to write a page according to the ECC generator * requirements. * @write_oob_raw: function to write chip OOB data without ECC * @read_oob_raw: function to read chip OOB data without ECC * @read_oob: function to read chip OOB data * @write_oob: function to write chip OOB data */ struct nand_ecc_ctrl { enum nand_ecc_engine_type engine_type; enum nand_ecc_placement placement; enum nand_ecc_algo algo; int steps; int size; int bytes; int total; int strength; int prepad; int postpad; unsigned int options; u8 *calc_buf; u8 *code_buf; void (*hwctl)(struct nand_chip *chip, int mode); int (*calculate)(struct nand_chip *chip, const uint8_t *dat, uint8_t *ecc_code); int (*correct)(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc); int (*read_page_raw)(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); int (*write_page_raw)(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page); int (*read_page)(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); int (*read_subpage)(struct nand_chip *chip, uint32_t offs, uint32_t len, uint8_t *buf, int page); int (*write_subpage)(struct nand_chip *chip, uint32_t offset, uint32_t data_len, const uint8_t *data_buf, int oob_required, int page); int (*write_page)(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page); int (*write_oob_raw)(struct nand_chip *chip, int page); int (*read_oob_raw)(struct nand_chip *chip, int page); int (*read_oob)(struct nand_chip *chip, int page); int (*write_oob)(struct nand_chip *chip, int page); }; /** * struct nand_sdr_timings - SDR NAND chip timings * * This struct defines the timing requirements of a SDR NAND chip. * These information can be found in every NAND datasheets and the timings * meaning are described in the ONFI specifications: * https://media-www.micron.com/-/media/client/onfi/specs/onfi_3_1_spec.pdf * (chapter 4.15 Timing Parameters) * * All these timings are expressed in picoseconds. * * @tBERS_max: Block erase time * @tCCS_min: Change column setup time * @tPROG_max: Page program time * @tR_max: Page read time * @tALH_min: ALE hold time * @tADL_min: ALE to data loading time * @tALS_min: ALE setup time * @tAR_min: ALE to RE# delay * @tCEA_max: CE# access time * @tCEH_min: CE# high hold time * @tCH_min: CE# hold time * @tCHZ_max: CE# high to output hi-Z * @tCLH_min: CLE hold time * @tCLR_min: CLE to RE# delay * @tCLS_min: CLE setup time * @tCOH_min: CE# high to output hold * @tCS_min: CE# setup time * @tDH_min: Data hold time * @tDS_min: Data setup time * @tFEAT_max: Busy time for Set Features and Get Features * @tIR_min: Output hi-Z to RE# low * @tITC_max: Interface and Timing Mode Change time * @tRC_min: RE# cycle time * @tREA_max: RE# access time * @tREH_min: RE# high hold time * @tRHOH_min: RE# high to output hold * @tRHW_min: RE# high to WE# low * @tRHZ_max: RE# high to output hi-Z * @tRLOH_min: RE# low to output hold * @tRP_min: RE# pulse width * @tRR_min: Ready to RE# low (data only) * @tRST_max: Device reset time, measured from the falling edge of R/B# to the * rising edge of R/B#. * @tWB_max: WE# high to SR[6] low * @tWC_min: WE# cycle time * @tWH_min: WE# high hold time * @tWHR_min: WE# high to RE# low * @tWP_min: WE# pulse width * @tWW_min: WP# transition to WE# low */ struct nand_sdr_timings { u64 tBERS_max; u32 tCCS_min; u64 tPROG_max; u64 tR_max; u32 tALH_min; u32 tADL_min; u32 tALS_min; u32 tAR_min; u32 tCEA_max; u32 tCEH_min; u32 tCH_min; u32 tCHZ_max; u32 tCLH_min; u32 tCLR_min; u32 tCLS_min; u32 tCOH_min; u32 tCS_min; u32 tDH_min; u32 tDS_min; u32 tFEAT_max; u32 tIR_min; u32 tITC_max; u32 tRC_min; u32 tREA_max; u32 tREH_min; u32 tRHOH_min; u32 tRHW_min; u32 tRHZ_max; u32 tRLOH_min; u32 tRP_min; u32 tRR_min; u64 tRST_max; u32 tWB_max; u32 tWC_min; u32 tWH_min; u32 tWHR_min; u32 tWP_min; u32 tWW_min; }; /** * struct nand_nvddr_timings - NV-DDR NAND chip timings * * This struct defines the timing requirements of a NV-DDR NAND data interface. * These information can be found in every NAND datasheets and the timings * meaning are described in the ONFI specifications: * https://media-www.micron.com/-/media/client/onfi/specs/onfi_4_1_gold.pdf * (chapter 4.18.2 NV-DDR) * * All these timings are expressed in picoseconds. * * @tBERS_max: Block erase time * @tCCS_min: Change column setup time * @tPROG_max: Page program time * @tR_max: Page read time * @tAC_min: Access window of DQ[7:0] from CLK * @tAC_max: Access window of DQ[7:0] from CLK * @tADL_min: ALE to data loading time * @tCAD_min: Command, Address, Data delay * @tCAH_min: Command/Address DQ hold time * @tCALH_min: W/R_n, CLE and ALE hold time * @tCALS_min: W/R_n, CLE and ALE setup time * @tCAS_min: Command/address DQ setup time * @tCEH_min: CE# high hold time * @tCH_min: CE# hold time * @tCK_min: Average clock cycle time * @tCS_min: CE# setup time * @tDH_min: Data hold time * @tDQSCK_min: Start of the access window of DQS from CLK * @tDQSCK_max: End of the access window of DQS from CLK * @tDQSD_min: Min W/R_n low to DQS/DQ driven by device * @tDQSD_max: Max W/R_n low to DQS/DQ driven by device * @tDQSHZ_max: W/R_n high to DQS/DQ tri-state by device * @tDQSQ_max: DQS-DQ skew, DQS to last DQ valid, per access * @tDS_min: Data setup time * @tDSC_min: DQS cycle time * @tFEAT_max: Busy time for Set Features and Get Features * @tITC_max: Interface and Timing Mode Change time * @tQHS_max: Data hold skew factor * @tRHW_min: Data output cycle to command, address, or data input cycle * @tRR_min: Ready to RE# low (data only) * @tRST_max: Device reset time, measured from the falling edge of R/B# to the * rising edge of R/B#. * @tWB_max: WE# high to SR[6] low * @tWHR_min: WE# high to RE# low * @tWRCK_min: W/R_n low to data output cycle * @tWW_min: WP# transition to WE# low */ struct nand_nvddr_timings { u64 tBERS_max; u32 tCCS_min; u64 tPROG_max; u64 tR_max; u32 tAC_min; u32 tAC_max; u32 tADL_min; u32 tCAD_min; u32 tCAH_min; u32 tCALH_min; u32 tCALS_min; u32 tCAS_min; u32 tCEH_min; u32 tCH_min; u32 tCK_min; u32 tCS_min; u32 tDH_min; u32 tDQSCK_min; u32 tDQSCK_max; u32 tDQSD_min; u32 tDQSD_max; u32 tDQSHZ_max; u32 tDQSQ_max; u32 tDS_min; u32 tDSC_min; u32 tFEAT_max; u32 tITC_max; u32 tQHS_max; u32 tRHW_min; u32 tRR_min; u32 tRST_max; u32 tWB_max; u32 tWHR_min; u32 tWRCK_min; u32 tWW_min; }; /* * While timings related to the data interface itself are mostly different * between SDR and NV-DDR, timings related to the internal chip behavior are * common. IOW, the following entries which describe the internal delays have * the same definition and are shared in both SDR and NV-DDR timing structures: * - tADL_min * - tBERS_max * - tCCS_min * - tFEAT_max * - tPROG_max * - tR_max * - tRR_min * - tRST_max * - tWB_max * * The below macros return the value of a given timing, no matter the interface. */ #define NAND_COMMON_TIMING_PS(conf, timing_name) \ nand_interface_is_sdr(conf) ? \ nand_get_sdr_timings(conf)->timing_name : \ nand_get_nvddr_timings(conf)->timing_name #define NAND_COMMON_TIMING_MS(conf, timing_name) \ PSEC_TO_MSEC(NAND_COMMON_TIMING_PS((conf), timing_name)) #define NAND_COMMON_TIMING_NS(conf, timing_name) \ PSEC_TO_NSEC(NAND_COMMON_TIMING_PS((conf), timing_name)) /** * enum nand_interface_type - NAND interface type * @NAND_SDR_IFACE: Single Data Rate interface * @NAND_NVDDR_IFACE: Double Data Rate interface */ enum nand_interface_type { NAND_SDR_IFACE, NAND_NVDDR_IFACE, }; /** * struct nand_interface_config - NAND interface timing * @type: type of the timing * @timings: The timing information * @timings.mode: Timing mode as defined in the specification * @timings.sdr: Use it when @type is %NAND_SDR_IFACE. * @timings.nvddr: Use it when @type is %NAND_NVDDR_IFACE. */ struct nand_interface_config { enum nand_interface_type type; struct nand_timings { unsigned int mode; union { struct nand_sdr_timings sdr; struct nand_nvddr_timings nvddr; }; } timings; }; /** * nand_interface_is_sdr - get the interface type * @conf: The data interface */ static bool nand_interface_is_sdr(const struct nand_interface_config *conf) { return conf->type == NAND_SDR_IFACE; } /** * nand_interface_is_nvddr - get the interface type * @conf: The data interface */ static bool nand_interface_is_nvddr(const struct nand_interface_config *conf) { return conf->type == NAND_NVDDR_IFACE; } /** * nand_get_sdr_timings - get SDR timing from data interface * @conf: The data interface */ static inline const struct nand_sdr_timings * nand_get_sdr_timings(const struct nand_interface_config *conf) { if (!nand_interface_is_sdr(conf)) return ERR_PTR(-EINVAL); return &conf->timings.sdr; } /** * nand_get_nvddr_timings - get NV-DDR timing from data interface * @conf: The data interface */ static inline const struct nand_nvddr_timings * nand_get_nvddr_timings(const struct nand_interface_config *conf) { if (!nand_interface_is_nvddr(conf)) return ERR_PTR(-EINVAL); return &conf->timings.nvddr; } /** * struct nand_op_cmd_instr - Definition of a command instruction * @opcode: the command to issue in one cycle */ struct nand_op_cmd_instr { u8 opcode; }; /** * struct nand_op_addr_instr - Definition of an address instruction * @naddrs: length of the @addrs array * @addrs: array containing the address cycles to issue */ struct nand_op_addr_instr { unsigned int naddrs; const u8 *addrs; }; /** * struct nand_op_data_instr - Definition of a data instruction * @len: number of data bytes to move * @buf: buffer to fill * @buf.in: buffer to fill when reading from the NAND chip * @buf.out: buffer to read from when writing to the NAND chip * @force_8bit: force 8-bit access * * Please note that "in" and "out" are inverted from the ONFI specification * and are from the controller perspective, so a "in" is a read from the NAND * chip while a "out" is a write to the NAND chip. */ struct nand_op_data_instr { unsigned int len; union { void *in; const void *out; } buf; bool force_8bit; }; /** * struct nand_op_waitrdy_instr - Definition of a wait ready instruction * @timeout_ms: maximum delay while waiting for the ready/busy pin in ms */ struct nand_op_waitrdy_instr { unsigned int timeout_ms; }; /** * enum nand_op_instr_type - Definition of all instruction types * @NAND_OP_CMD_INSTR: command instruction * @NAND_OP_ADDR_INSTR: address instruction * @NAND_OP_DATA_IN_INSTR: data in instruction * @NAND_OP_DATA_OUT_INSTR: data out instruction * @NAND_OP_WAITRDY_INSTR: wait ready instruction */ enum nand_op_instr_type { NAND_OP_CMD_INSTR, NAND_OP_ADDR_INSTR, NAND_OP_DATA_IN_INSTR, NAND_OP_DATA_OUT_INSTR, NAND_OP_WAITRDY_INSTR, }; /** * struct nand_op_instr - Instruction object * @type: the instruction type * @ctx: extra data associated to the instruction. You'll have to use the * appropriate element depending on @type * @ctx.cmd: use it if @type is %NAND_OP_CMD_INSTR * @ctx.addr: use it if @type is %NAND_OP_ADDR_INSTR * @ctx.data: use it if @type is %NAND_OP_DATA_IN_INSTR * or %NAND_OP_DATA_OUT_INSTR * @ctx.waitrdy: use it if @type is %NAND_OP_WAITRDY_INSTR * @delay_ns: delay the controller should apply after the instruction has been * issued on the bus. Most modern controllers have internal timings * control logic, and in this case, the controller driver can ignore * this field. */ struct nand_op_instr { enum nand_op_instr_type type; union { struct nand_op_cmd_instr cmd; struct nand_op_addr_instr addr; struct nand_op_data_instr data; struct nand_op_waitrdy_instr waitrdy; } ctx; unsigned int delay_ns; }; /* * Special handling must be done for the WAITRDY timeout parameter as it usually * is either tPROG (after a prog), tR (before a read), tRST (during a reset) or * tBERS (during an erase) which all of them are u64 values that cannot be * divided by usual kernel macros and must be handled with the special * DIV_ROUND_UP_ULL() macro. * * Cast to type of dividend is needed here to guarantee that the result won't * be an unsigned long long when the dividend is an unsigned long (or smaller), * which is what the compiler does when it sees ternary operator with 2 * different return types (picks the largest type to make sure there's no * loss). */ #define __DIVIDE(dividend, divisor) ({ \ (__typeof__(dividend))(sizeof(dividend) <= sizeof(unsigned long) ? \ DIV_ROUND_UP(dividend, divisor) : \ DIV_ROUND_UP_ULL(dividend, divisor)); \ }) #define PSEC_TO_NSEC(x) __DIVIDE(x, 1000) #define PSEC_TO_MSEC(x) __DIVIDE(x, 1000000000) #define NAND_OP_CMD(id, ns) \ { \ .type = NAND_OP_CMD_INSTR, \ .ctx.cmd.opcode = id, \ .delay_ns = ns, \ } #define NAND_OP_ADDR(ncycles, cycles, ns) \ { \ .type = NAND_OP_ADDR_INSTR, \ .ctx.addr = { \ .naddrs = ncycles, \ .addrs = cycles, \ }, \ .delay_ns = ns, \ } #define NAND_OP_DATA_IN(l, b, ns) \ { \ .type = NAND_OP_DATA_IN_INSTR, \ .ctx.data = { \ .len = l, \ .buf.in = b, \ .force_8bit = false, \ }, \ .delay_ns = ns, \ } #define NAND_OP_DATA_OUT(l, b, ns) \ { \ .type = NAND_OP_DATA_OUT_INSTR, \ .ctx.data = { \ .len = l, \ .buf.out = b, \ .force_8bit = false, \ }, \ .delay_ns = ns, \ } #define NAND_OP_8BIT_DATA_IN(l, b, ns) \ { \ .type = NAND_OP_DATA_IN_INSTR, \ .ctx.data = { \ .len = l, \ .buf.in = b, \ .force_8bit = true, \ }, \ .delay_ns = ns, \ } #define NAND_OP_8BIT_DATA_OUT(l, b, ns) \ { \ .type = NAND_OP_DATA_OUT_INSTR, \ .ctx.data = { \ .len = l, \ .buf.out = b, \ .force_8bit = true, \ }, \ .delay_ns = ns, \ } #define NAND_OP_WAIT_RDY(tout_ms, ns) \ { \ .type = NAND_OP_WAITRDY_INSTR, \ .ctx.waitrdy.timeout_ms = tout_ms, \ .delay_ns = ns, \ } /** * struct nand_subop - a sub operation * @cs: the CS line to select for this NAND sub-operation * @instrs: array of instructions * @ninstrs: length of the @instrs array * @first_instr_start_off: offset to start from for the first instruction * of the sub-operation * @last_instr_end_off: offset to end at (excluded) for the last instruction * of the sub-operation * * Both @first_instr_start_off and @last_instr_end_off only apply to data or * address instructions. * * When an operation cannot be handled as is by the NAND controller, it will * be split by the parser into sub-operations which will be passed to the * controller driver. */ struct nand_subop { unsigned int cs; const struct nand_op_instr *instrs; unsigned int ninstrs; unsigned int first_instr_start_off; unsigned int last_instr_end_off; }; unsigned int nand_subop_get_addr_start_off(const struct nand_subop *subop, unsigned int op_id); unsigned int nand_subop_get_num_addr_cyc(const struct nand_subop *subop, unsigned int op_id); unsigned int nand_subop_get_data_start_off(const struct nand_subop *subop, unsigned int op_id); unsigned int nand_subop_get_data_len(const struct nand_subop *subop, unsigned int op_id); /** * struct nand_op_parser_addr_constraints - Constraints for address instructions * @maxcycles: maximum number of address cycles the controller can issue in a * single step */ struct nand_op_parser_addr_constraints { unsigned int maxcycles; }; /** * struct nand_op_parser_data_constraints - Constraints for data instructions * @maxlen: maximum data length that the controller can handle in a single step */ struct nand_op_parser_data_constraints { unsigned int maxlen; }; /** * struct nand_op_parser_pattern_elem - One element of a pattern * @type: the instructuction type * @optional: whether this element of the pattern is optional or mandatory * @ctx: address or data constraint * @ctx.addr: address constraint (number of cycles) * @ctx.data: data constraint (data length) */ struct nand_op_parser_pattern_elem { enum nand_op_instr_type type; bool optional; union { struct nand_op_parser_addr_constraints addr; struct nand_op_parser_data_constraints data; } ctx; }; #define NAND_OP_PARSER_PAT_CMD_ELEM(_opt) \ { \ .type = NAND_OP_CMD_INSTR, \ .optional = _opt, \ } #define NAND_OP_PARSER_PAT_ADDR_ELEM(_opt, _maxcycles) \ { \ .type = NAND_OP_ADDR_INSTR, \ .optional = _opt, \ .ctx.addr.maxcycles = _maxcycles, \ } #define NAND_OP_PARSER_PAT_DATA_IN_ELEM(_opt, _maxlen) \ { \ .type = NAND_OP_DATA_IN_INSTR, \ .optional = _opt, \ .ctx.data.maxlen = _maxlen, \ } #define NAND_OP_PARSER_PAT_DATA_OUT_ELEM(_opt, _maxlen) \ { \ .type = NAND_OP_DATA_OUT_INSTR, \ .optional = _opt, \ .ctx.data.maxlen = _maxlen, \ } #define NAND_OP_PARSER_PAT_WAITRDY_ELEM(_opt) \ { \ .type = NAND_OP_WAITRDY_INSTR, \ .optional = _opt, \ } /** * struct nand_op_parser_pattern - NAND sub-operation pattern descriptor * @elems: array of pattern elements * @nelems: number of pattern elements in @elems array * @exec: the function that will issue a sub-operation * * A pattern is a list of elements, each element reprensenting one instruction * with its constraints. The pattern itself is used by the core to match NAND * chip operation with NAND controller operations. * Once a match between a NAND controller operation pattern and a NAND chip * operation (or a sub-set of a NAND operation) is found, the pattern ->exec() * hook is called so that the controller driver can issue the operation on the * bus. * * Controller drivers should declare as many patterns as they support and pass * this list of patterns (created with the help of the following macro) to * the nand_op_parser_exec_op() helper. */ struct nand_op_parser_pattern { const struct nand_op_parser_pattern_elem *elems; unsigned int nelems; int (*exec)(struct nand_chip *chip, const struct nand_subop *subop); }; #define NAND_OP_PARSER_PATTERN(_exec, ...) \ { \ .exec = _exec, \ .elems = (const struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }, \ .nelems = sizeof((struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }) / \ sizeof(struct nand_op_parser_pattern_elem), \ } /** * struct nand_op_parser - NAND controller operation parser descriptor * @patterns: array of supported patterns * @npatterns: length of the @patterns array * * The parser descriptor is just an array of supported patterns which will be * iterated by nand_op_parser_exec_op() everytime it tries to execute an * NAND operation (or tries to determine if a specific operation is supported). * * It is worth mentioning that patterns will be tested in their declaration * order, and the first match will be taken, so it's important to order patterns * appropriately so that simple/inefficient patterns are placed at the end of * the list. Usually, this is where you put single instruction patterns. */ struct nand_op_parser { const struct nand_op_parser_pattern *patterns; unsigned int npatterns; }; #define NAND_OP_PARSER(...) \ { \ .patterns = (const struct nand_op_parser_pattern[]) { __VA_ARGS__ }, \ .npatterns = sizeof((struct nand_op_parser_pattern[]) { __VA_ARGS__ }) / \ sizeof(struct nand_op_parser_pattern), \ } /** * struct nand_operation - NAND operation descriptor * @cs: the CS line to select for this NAND operation * @instrs: array of instructions to execute * @ninstrs: length of the @instrs array * * The actual operation structure that will be passed to chip->exec_op(). */ struct nand_operation { unsigned int cs; const struct nand_op_instr *instrs; unsigned int ninstrs; }; #define NAND_OPERATION(_cs, _instrs) \ { \ .cs = _cs, \ .instrs = _instrs, \ .ninstrs = ARRAY_SIZE(_instrs), \ } int nand_op_parser_exec_op(struct nand_chip *chip, const struct nand_op_parser *parser, const struct nand_operation *op, bool check_only); static inline void nand_op_trace(const char *prefix, const struct nand_op_instr *instr) { #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) || defined(DEBUG) switch (instr->type) { case NAND_OP_CMD_INSTR: pr_debug("%sCMD [0x%02x]\n", prefix, instr->ctx.cmd.opcode); break; case NAND_OP_ADDR_INSTR: pr_debug("%sADDR [%d cyc: %*ph]\n", prefix, instr->ctx.addr.naddrs, instr->ctx.addr.naddrs < 64 ? instr->ctx.addr.naddrs : 64, instr->ctx.addr.addrs); break; case NAND_OP_DATA_IN_INSTR: pr_debug("%sDATA_IN [%d B%s]\n", prefix, instr->ctx.data.len, instr->ctx.data.force_8bit ? ", force 8-bit" : ""); break; case NAND_OP_DATA_OUT_INSTR: pr_debug("%sDATA_OUT [%d B%s]\n", prefix, instr->ctx.data.len, instr->ctx.data.force_8bit ? ", force 8-bit" : ""); break; case NAND_OP_WAITRDY_INSTR: pr_debug("%sWAITRDY [max %d ms]\n", prefix, instr->ctx.waitrdy.timeout_ms); break; } #endif } /** * struct nand_controller_ops - Controller operations * * @attach_chip: this method is called after the NAND detection phase after * flash ID and MTD fields such as erase size, page size and OOB * size have been set up. ECC requirements are available if * provided by the NAND chip or device tree. Typically used to * choose the appropriate ECC configuration and allocate * associated resources. * This hook is optional. * @detach_chip: free all resources allocated/claimed in * nand_controller_ops->attach_chip(). * This hook is optional. * @exec_op: controller specific method to execute NAND operations. * This method replaces chip->legacy.cmdfunc(), * chip->legacy.{read,write}_{buf,byte,word}(), * chip->legacy.dev_ready() and chip->legacy.waifunc(). * @setup_interface: setup the data interface and timing. If chipnr is set to * %NAND_DATA_IFACE_CHECK_ONLY this means the configuration * should not be applied but only checked. * This hook is optional. */ struct nand_controller_ops { int (*attach_chip)(struct nand_chip *chip); void (*detach_chip)(struct nand_chip *chip); int (*exec_op)(struct nand_chip *chip, const struct nand_operation *op, bool check_only); int (*setup_interface)(struct nand_chip *chip, int chipnr, const struct nand_interface_config *conf); }; /** * struct nand_controller - Structure used to describe a NAND controller * * @lock: lock used to serialize accesses to the NAND controller * @ops: NAND controller operations. */ struct nand_controller { struct mutex lock; const struct nand_controller_ops *ops; }; static inline void nand_controller_init(struct nand_controller *nfc) { mutex_init(&nfc->lock); } /** * struct nand_legacy - NAND chip legacy fields/hooks * @IO_ADDR_R: address to read the 8 I/O lines of the flash device * @IO_ADDR_W: address to write the 8 I/O lines of the flash device * @select_chip: select/deselect a specific target/die * @read_byte: read one byte from the chip * @write_byte: write a single byte to the chip on the low 8 I/O lines * @write_buf: write data from the buffer to the chip * @read_buf: read data from the chip into the buffer * @cmd_ctrl: hardware specific function for controlling ALE/CLE/nCE. Also used * to write command and address * @cmdfunc: hardware specific function for writing commands to the chip. * @dev_ready: hardware specific function for accessing device ready/busy line. * If set to NULL no access to ready/busy is available and the * ready/busy information is read from the chip status register. * @waitfunc: hardware specific function for wait on ready. * @block_bad: check if a block is bad, using OOB markers * @block_markbad: mark a block bad * @set_features: set the NAND chip features * @get_features: get the NAND chip features * @chip_delay: chip dependent delay for transferring data from array to read * regs (tR). * @dummy_controller: dummy controller implementation for drivers that can * only control a single chip * * If you look at this structure you're already wrong. These fields/hooks are * all deprecated. */ struct nand_legacy { void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; void (*select_chip)(struct nand_chip *chip, int cs); u8 (*read_byte)(struct nand_chip *chip); void (*write_byte)(struct nand_chip *chip, u8 byte); void (*write_buf)(struct nand_chip *chip, const u8 *buf, int len); void (*read_buf)(struct nand_chip *chip, u8 *buf, int len); void (*cmd_ctrl)(struct nand_chip *chip, int dat, unsigned int ctrl); void (*cmdfunc)(struct nand_chip *chip, unsigned command, int column, int page_addr); int (*dev_ready)(struct nand_chip *chip); int (*waitfunc)(struct nand_chip *chip); int (*block_bad)(struct nand_chip *chip, loff_t ofs); int (*block_markbad)(struct nand_chip *chip, loff_t ofs); int (*set_features)(struct nand_chip *chip, int feature_addr, u8 *subfeature_para); int (*get_features)(struct nand_chip *chip, int feature_addr, u8 *subfeature_para); int chip_delay; struct nand_controller dummy_controller; }; /** * struct nand_chip_ops - NAND chip operations * @suspend: Suspend operation * @resume: Resume operation * @lock_area: Lock operation * @unlock_area: Unlock operation * @setup_read_retry: Set the read-retry mode (mostly needed for MLC NANDs) * @choose_interface_config: Choose the best interface configuration */ struct nand_chip_ops { int (*suspend)(struct nand_chip *chip); void (*resume)(struct nand_chip *chip); int (*lock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len); int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len); int (*setup_read_retry)(struct nand_chip *chip, int retry_mode); int (*choose_interface_config)(struct nand_chip *chip, struct nand_interface_config *iface); }; /** * struct nand_manufacturer - NAND manufacturer structure * @desc: The manufacturer description * @priv: Private information for the manufacturer driver */ struct nand_manufacturer { const struct nand_manufacturer_desc *desc; void *priv; }; /** * struct nand_secure_region - NAND secure region structure * @offset: Offset of the start of the secure region * @size: Size of the secure region */ struct nand_secure_region { u64 offset; u64 size; }; /** * struct nand_chip - NAND Private Flash Chip Data * @base: Inherit from the generic NAND device * @id: Holds NAND ID * @parameters: Holds generic parameters under an easily readable form * @manufacturer: Manufacturer information * @ops: NAND chip operations * @legacy: All legacy fields/hooks. If you develop a new driver, don't even try * to use any of these fields/hooks, and if you're modifying an * existing driver that is using those fields/hooks, you should * consider reworking the driver and avoid using them. * @options: Various chip options. They can partly be set to inform nand_scan * about special functionality. See the defines for further * explanation. * @current_interface_config: The currently used NAND interface configuration * @best_interface_config: The best NAND interface configuration which fits both * the NAND chip and NAND controller constraints. If * unset, the default reset interface configuration must * be used. * @bbt_erase_shift: Number of address bits in a bbt entry * @bbt_options: Bad block table specific options. All options used here must * come from bbm.h. By default, these options will be copied to * the appropriate nand_bbt_descr's. * @badblockpos: Bad block marker position in the oob area * @badblockbits: Minimum number of set bits in a good block's bad block marker * position; i.e., BBM = 11110111b is good when badblockbits = 7 * @bbt_td: Bad block table descriptor for flash lookup * @bbt_md: Bad block table mirror descriptor * @badblock_pattern: Bad block scan pattern used for initial bad block scan * @bbt: Bad block table pointer * @page_shift: Number of address bits in a page (column address bits) * @phys_erase_shift: Number of address bits in a physical eraseblock * @chip_shift: Number of address bits in one chip * @pagemask: Page number mask = number of (pages / chip) - 1 * @subpagesize: Holds the subpagesize * @data_buf: Buffer for data, size is (page size + oobsize) * @oob_poi: pointer on the OOB area covered by data_buf * @pagecache: Structure containing page cache related fields * @pagecache.bitflips: Number of bitflips of the cached page * @pagecache.page: Page number currently in the cache. -1 means no page is * currently cached * @buf_align: Minimum buffer alignment required by a platform * @lock: Lock protecting the suspended field. Also used to serialize accesses * to the NAND device * @suspended: Set to 1 when the device is suspended, 0 when it's not * @resume_wq: wait queue to sleep if rawnand is in suspended state. * @cur_cs: Currently selected target. -1 means no target selected, otherwise we * should always have cur_cs >= 0 && cur_cs < nanddev_ntargets(). * NAND Controller drivers should not modify this value, but they're * allowed to read it. * @read_retries: The number of read retry modes supported * @secure_regions: Structure containing the secure regions info * @nr_secure_regions: Number of secure regions * @controller: The hardware controller structure which is shared among multiple * independent devices * @ecc: The ECC controller structure * @priv: Chip private data */ struct nand_chip { struct nand_device base; struct nand_id id; struct nand_parameters parameters; struct nand_manufacturer manufacturer; struct nand_chip_ops ops; struct nand_legacy legacy; unsigned int options; /* Data interface */ const struct nand_interface_config *current_interface_config; struct nand_interface_config *best_interface_config; /* Bad block information */ unsigned int bbt_erase_shift; unsigned int bbt_options; unsigned int badblockpos; unsigned int badblockbits; struct nand_bbt_descr *bbt_td; struct nand_bbt_descr *bbt_md; struct nand_bbt_descr *badblock_pattern; u8 *bbt; /* Device internal layout */ unsigned int page_shift; unsigned int phys_erase_shift; unsigned int chip_shift; unsigned int pagemask; unsigned int subpagesize; /* Buffers */ u8 *data_buf; u8 *oob_poi; struct { unsigned int bitflips; int page; } pagecache; unsigned long buf_align; /* Internals */ struct mutex lock; unsigned int suspended : 1; wait_queue_head_t resume_wq; int cur_cs; int read_retries; struct nand_secure_region *secure_regions; u8 nr_secure_regions; /* Externals */ struct nand_controller *controller; struct nand_ecc_ctrl ecc; void *priv; }; static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd) { return container_of(mtd, struct nand_chip, base.mtd); } static inline struct mtd_info *nand_to_mtd(struct nand_chip *chip) { return &chip->base.mtd; } static inline void *nand_get_controller_data(struct nand_chip *chip) { return chip->priv; } static inline void nand_set_controller_data(struct nand_chip *chip, void *priv) { chip->priv = priv; } static inline void nand_set_manufacturer_data(struct nand_chip *chip, void *priv) { chip->manufacturer.priv = priv; } static inline void *nand_get_manufacturer_data(struct nand_chip *chip) { return chip->manufacturer.priv; } static inline void nand_set_flash_node(struct nand_chip *chip, struct device_node *np) { mtd_set_of_node(nand_to_mtd(chip), np); } static inline struct device_node *nand_get_flash_node(struct nand_chip *chip) { return mtd_get_of_node(nand_to_mtd(chip)); } /** * nand_get_interface_config - Retrieve the current interface configuration * of a NAND chip * @chip: The NAND chip */ static inline const struct nand_interface_config * nand_get_interface_config(struct nand_chip *chip) { return chip->current_interface_config; } /* * A helper for defining older NAND chips where the second ID byte fully * defined the chip, including the geometry (chip size, eraseblock size, page * size). All these chips have 512 bytes NAND page size. */ #define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \ { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \ .chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) } /* * A helper for defining newer chips which report their page size and * eraseblock size via the extended ID bytes. * * The real difference between LEGACY_ID_NAND and EXTENDED_ID_NAND is that with * EXTENDED_ID_NAND, manufacturers overloaded the same device ID so that the * device ID now only represented a particular total chip size (and voltage, * buswidth), and the page size, eraseblock size, and OOB size could vary while * using the same device ID. */ #define EXTENDED_ID_NAND(nm, devid, chipsz, opts) \ { .name = (nm), {{ .dev_id = (devid) }}, .chipsize = (chipsz), \ .options = (opts) } #define NAND_ECC_INFO(_strength, _step) \ { .strength_ds = (_strength), .step_ds = (_step) } #define NAND_ECC_STRENGTH(type) ((type)->ecc.strength_ds) #define NAND_ECC_STEP(type) ((type)->ecc.step_ds) /** * struct nand_flash_dev - NAND Flash Device ID Structure * @name: a human-readable name of the NAND chip * @dev_id: the device ID (the second byte of the full chip ID array) * @mfr_id: manufacturer ID part of the full chip ID array (refers the same * memory address as ``id[0]``) * @dev_id: device ID part of the full chip ID array (refers the same memory * address as ``id[1]``) * @id: full device ID array * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as * well as the eraseblock size) is determined from the extended NAND * chip ID array) * @chipsize: total chip size in MiB * @erasesize: eraseblock size in bytes (determined from the extended ID if 0) * @options: stores various chip bit options * @id_len: The valid length of the @id. * @oobsize: OOB size * @ecc: ECC correctability and step information from the datasheet. * @ecc.strength_ds: The ECC correctability from the datasheet, same as the * @ecc_strength_ds in nand_chip{}. * @ecc.step_ds: The ECC step required by the @ecc.strength_ds, same as the * @ecc_step_ds in nand_chip{}, also from the datasheet. * For example, the "4bit ECC for each 512Byte" can be set with * NAND_ECC_INFO(4, 512). */ struct nand_flash_dev { char *name; union { struct { uint8_t mfr_id; uint8_t dev_id; }; uint8_t id[NAND_MAX_ID_LEN]; }; unsigned int pagesize; unsigned int chipsize; unsigned int erasesize; unsigned int options; uint16_t id_len; uint16_t oobsize; struct { uint16_t strength_ds; uint16_t step_ds; } ecc; }; int nand_create_bbt(struct nand_chip *chip); /* * Check if it is a SLC nand. * The !nand_is_slc() can be used to check the MLC/TLC nand chips. * We do not distinguish the MLC and TLC now. */ static inline bool nand_is_slc(struct nand_chip *chip) { WARN(nanddev_bits_per_cell(&chip->base) == 0, "chip->bits_per_cell is used uninitialized\n"); return nanddev_bits_per_cell(&chip->base) == 1; } /** * nand_opcode_8bits - Check if the opcode's address should be sent only on the * lower 8 bits * @command: opcode to check */ static inline int nand_opcode_8bits(unsigned int command) { switch (command) { case NAND_CMD_READID: case NAND_CMD_PARAM: case NAND_CMD_GET_FEATURES: case NAND_CMD_SET_FEATURES: return 1; default: break; } return 0; } int rawnand_sw_hamming_init(struct nand_chip *chip); int rawnand_sw_hamming_calculate(struct nand_chip *chip, const unsigned char *buf, unsigned char *code); int rawnand_sw_hamming_correct(struct nand_chip *chip, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc); void rawnand_sw_hamming_cleanup(struct nand_chip *chip); int rawnand_sw_bch_init(struct nand_chip *chip); int rawnand_sw_bch_correct(struct nand_chip *chip, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc); void rawnand_sw_bch_cleanup(struct nand_chip *chip); int nand_check_erased_ecc_chunk(void *data, int datalen, void *ecc, int ecclen, void *extraoob, int extraooblen, int threshold); int nand_ecc_choose_conf(struct nand_chip *chip, const struct nand_ecc_caps *caps, int oobavail); /* Default write_oob implementation */ int nand_write_oob_std(struct nand_chip *chip, int page); /* Default read_oob implementation */ int nand_read_oob_std(struct nand_chip *chip, int page); /* Stub used by drivers that do not support GET/SET FEATURES operations */ int nand_get_set_features_notsupp(struct nand_chip *chip, int addr, u8 *subfeature_param); /* read_page_raw implementations */ int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); int nand_monolithic_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); /* write_page_raw implementations */ int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page); int nand_monolithic_write_page_raw(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page); /* Reset and initialize a NAND device */ int nand_reset(struct nand_chip *chip, int chipnr); /* NAND operation helpers */ int nand_reset_op(struct nand_chip *chip); int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf, unsigned int len); int nand_status_op(struct nand_chip *chip, u8 *status); int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock); int nand_read_page_op(struct nand_chip *chip, unsigned int page, unsigned int offset_in_page, void *buf, unsigned int len); int nand_change_read_column_op(struct nand_chip *chip, unsigned int offset_in_page, void *buf, unsigned int len, bool force_8bit); int nand_read_oob_op(struct nand_chip *chip, unsigned int page, unsigned int offset_in_page, void *buf, unsigned int len); int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page, unsigned int offset_in_page, const void *buf, unsigned int len); int nand_prog_page_end_op(struct nand_chip *chip); int nand_prog_page_op(struct nand_chip *chip, unsigned int page, unsigned int offset_in_page, const void *buf, unsigned int len); int nand_change_write_column_op(struct nand_chip *chip, unsigned int offset_in_page, const void *buf, unsigned int len, bool force_8bit); int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len, bool force_8bit, bool check_only); int nand_write_data_op(struct nand_chip *chip, const void *buf, unsigned int len, bool force_8bit); int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); /* Scan and identify a NAND device */ int nand_scan_with_ids(struct nand_chip *chip, unsigned int max_chips, struct nand_flash_dev *ids); static inline int nand_scan(struct nand_chip *chip, unsigned int max_chips) { return nand_scan_with_ids(chip, max_chips, NULL); } /* Internal helper for board drivers which need to override command function */ void nand_wait_ready(struct nand_chip *chip); /* * Free resources held by the NAND device, must be called on error after a * sucessful nand_scan(). */ void nand_cleanup(struct nand_chip *chip); /* * External helper for controller drivers that have to implement the WAITRDY * instruction and have no physical pin to check it. */ int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms); int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod, unsigned long timeout_ms); /* Select/deselect a NAND target. */ void nand_select_target(struct nand_chip *chip, unsigned int cs); void nand_deselect_target(struct nand_chip *chip); /* Bitops */ void nand_extract_bits(u8 *dst, unsigned int dst_off, const u8 *src, unsigned int src_off, unsigned int nbits); /** * nand_get_data_buf() - Get the internal page buffer * @chip: NAND chip object * * Returns the pre-allocated page buffer after invalidating the cache. This * function should be used by drivers that do not want to allocate their own * bounce buffer and still need such a buffer for specific operations (most * commonly when reading OOB data only). * * Be careful to never call this function in the write/write_oob path, because * the core may have placed the data to be written out in this buffer. * * Return: pointer to the page cache buffer */ static inline void *nand_get_data_buf(struct nand_chip *chip) { chip->pagecache.page = -1; return chip->data_buf; } /* Parse the gpio-cs property */ int rawnand_dt_parse_gpio_cs(struct device *dev, struct gpio_desc ***cs_array, unsigned int *ncs_array); #endif /* __LINUX_MTD_RAWNAND_H */ PK ! KV�:� � mtd/flashchip.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 2000 Red Hat UK Limited * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> */ #ifndef __MTD_FLASHCHIP_H__ #define __MTD_FLASHCHIP_H__ /* For spinlocks. sched.h includes spinlock.h from whichever directory it * happens to be in - so we don't have to care whether we're on 2.2, which * has asm/spinlock.h, or 2.4, which has linux/spinlock.h */ #include <linux/sched.h> #include <linux/mutex.h> typedef enum { FL_READY, FL_STATUS, FL_CFI_QUERY, FL_JEDEC_QUERY, FL_ERASING, FL_ERASE_SUSPENDING, FL_ERASE_SUSPENDED, FL_WRITING, FL_WRITING_TO_BUFFER, FL_OTP_WRITE, FL_WRITE_SUSPENDING, FL_WRITE_SUSPENDED, FL_PM_SUSPENDED, FL_SYNCING, FL_UNLOADING, FL_LOCKING, FL_UNLOCKING, FL_POINT, FL_XIP_WHILE_ERASING, FL_XIP_WHILE_WRITING, FL_SHUTDOWN, /* These 2 come from nand_state_t, which has been unified here */ FL_READING, FL_CACHEDPRG, /* These 4 come from onenand_state_t, which has been unified here */ FL_RESETTING, FL_OTPING, FL_PREPARING_ERASE, FL_VERIFYING_ERASE, FL_UNKNOWN } flstate_t; /* NOTE: confusingly, this can be used to refer to more than one chip at a time, if they're interleaved. This can even refer to individual partitions on the same physical chip when present. */ struct flchip { unsigned long start; /* Offset within the map */ // unsigned long len; /* We omit len for now, because when we group them together we insist that they're all of the same size, and the chip size is held in the next level up. If we get more versatile later, it'll make it a damn sight harder to find which chip we want from a given offset, and we'll want to add the per-chip length field back in. */ int ref_point_counter; flstate_t state; flstate_t oldstate; unsigned int write_suspended:1; unsigned int erase_suspended:1; unsigned long in_progress_block_addr; unsigned long in_progress_block_mask; struct mutex mutex; wait_queue_head_t wq; /* Wait on here when we're waiting for the chip to be ready */ int word_write_time; int buffer_write_time; int erase_time; int word_write_time_max; int buffer_write_time_max; int erase_time_max; void *priv; }; /* This is used to handle contention on write/erase operations between partitions of the same physical chip. */ struct flchip_shared { struct mutex lock; struct flchip *writing; struct flchip *erasing; }; #endif /* __MTD_FLASHCHIP_H__ */ PK ! C��� � mtd/lpc32xx_slc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for LPC32xx SoC SLC NAND controller * * Copyright © 2012 Roland Stigge */ #ifndef __LINUX_MTD_LPC32XX_SLC_H #define __LINUX_MTD_LPC32XX_SLC_H #include <linux/dmaengine.h> struct lpc32xx_slc_platform_data { bool (*dma_filter)(struct dma_chan *chan, void *filter_param); }; #endif /* __LINUX_MTD_LPC32XX_SLC_H */ PK ! -���� � mtd/sharpsl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * SharpSL NAND support * * Copyright (C) 2008 Dmitry Baryshkov */ #ifndef _MTD_SHARPSL_H #define _MTD_SHARPSL_H #include <linux/mtd/rawnand.h> #include <linux/mtd/partitions.h> struct sharpsl_nand_platform_data { struct nand_bbt_descr *badblock_pattern; const struct mtd_ooblayout_ops *ecc_layout; struct mtd_partition *partitions; unsigned int nr_partitions; const char *const *part_parsers; }; #endif /* _MTD_SHARPSL_H */ PK ! �AP> mtd/ndfc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2006 Thomas Gleixner <tglx@linutronix.de> * * Info: * Contains defines, datastructures for ndfc nand controller */ #ifndef __LINUX_MTD_NDFC_H #define __LINUX_MTD_NDFC_H /* NDFC Register definitions */ #define NDFC_CMD 0x00 #define NDFC_ALE 0x04 #define NDFC_DATA 0x08 #define NDFC_ECC 0x10 #define NDFC_BCFG0 0x30 #define NDFC_BCFG1 0x34 #define NDFC_BCFG2 0x38 #define NDFC_BCFG3 0x3c #define NDFC_CCR 0x40 #define NDFC_STAT 0x44 #define NDFC_HWCTL 0x48 #define NDFC_REVID 0x50 #define NDFC_STAT_IS_READY 0x01000000 #define NDFC_CCR_RESET_CE 0x80000000 /* CE Reset */ #define NDFC_CCR_RESET_ECC 0x40000000 /* ECC Reset */ #define NDFC_CCR_RIE 0x20000000 /* Interrupt Enable on Device Rdy */ #define NDFC_CCR_REN 0x10000000 /* Enable wait for Rdy in LinearR */ #define NDFC_CCR_ROMEN 0x08000000 /* Enable ROM In LinearR */ #define NDFC_CCR_ARE 0x04000000 /* Auto-Read Enable */ #define NDFC_CCR_BS(x) (((x) & 0x3) << 24) /* Select Bank on CE[x] */ #define NDFC_CCR_BS_MASK 0x03000000 /* Select Bank */ #define NDFC_CCR_ARAC0 0x00000000 /* 3 Addr, 1 Col 2 Row 512b page */ #define NDFC_CCR_ARAC1 0x00001000 /* 4 Addr, 1 Col 3 Row 512b page */ #define NDFC_CCR_ARAC2 0x00002000 /* 4 Addr, 2 Col 2 Row 2K page */ #define NDFC_CCR_ARAC3 0x00003000 /* 5 Addr, 2 Col 3 Row 2K page */ #define NDFC_CCR_ARAC_MASK 0x00003000 /* Auto-Read mode Addr Cycles */ #define NDFC_CCR_RPG 0x0000C000 /* Auto-Read Page */ #define NDFC_CCR_EBCC 0x00000004 /* EBC Configuration Completed */ #define NDFC_CCR_DHC 0x00000002 /* Direct Hardware Control Enable */ #define NDFC_BxCFG_EN 0x80000000 /* Bank Enable */ #define NDFC_BxCFG_CED 0x40000000 /* nCE Style */ #define NDFC_BxCFG_SZ_MASK 0x08000000 /* Bank Size */ #define NDFC_BxCFG_SZ_8BIT 0x00000000 /* 8bit */ #define NDFC_BxCFG_SZ_16BIT 0x08000000 /* 16bit */ #define NDFC_MAX_BANKS 4 struct ndfc_controller_settings { uint32_t ccr_settings; uint64_t ndfc_erpn; }; struct ndfc_chip_settings { uint32_t bank_settings; }; #endif PK ! :�:l1 1 mtd/onenand_regs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/mtd/onenand_regs.h * * OneNAND Register header file * * Copyright (C) 2005-2007 Samsung Electronics * Kyungmin Park <kyungmin.park@samsung.com> */ #ifndef __ONENAND_REG_H #define __ONENAND_REG_H /* Memory Address Map Translation (Word order) */ #define ONENAND_MEMORY_MAP(x) ((x) << 1) /* * External BufferRAM area */ #define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) #define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) #define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) /* * OneNAND Registers */ #define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) #define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) #define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) #define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) #define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) #define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) #define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) #define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) #define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) #define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) #define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) #define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) #define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) #define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) #define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) #define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) #define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) #define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) #define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) #define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) #define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) #define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) #define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) #define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) #define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) #define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) #define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) #define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) #define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) #define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) #define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) #define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) #define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) /* * Device ID Register F001h (R) */ #define DEVICE_IS_FLEXONENAND (1 << 9) #define FLEXONENAND_PI_MASK (0x3ff) #define FLEXONENAND_PI_UNLOCK_SHIFT (14) #define ONENAND_DEVICE_DENSITY_MASK (0xf) #define ONENAND_DEVICE_DENSITY_SHIFT (4) #define ONENAND_DEVICE_IS_DDP (1 << 3) #define ONENAND_DEVICE_IS_DEMUX (1 << 2) #define ONENAND_DEVICE_VCC_MASK (0x3) #define ONENAND_DEVICE_DENSITY_512Mb (0x002) #define ONENAND_DEVICE_DENSITY_1Gb (0x003) #define ONENAND_DEVICE_DENSITY_2Gb (0x004) #define ONENAND_DEVICE_DENSITY_4Gb (0x005) #define ONENAND_DEVICE_DENSITY_8Gb (0x006) /* * Version ID Register F002h (R) */ #define ONENAND_VERSION_PROCESS_SHIFT (8) /* * Technology Register F006h (R) */ #define ONENAND_TECHNOLOGY_IS_MLC (1 << 0) /* * Start Address 1 F100h (R/W) & Start Address 2 F101h (R/W) */ #define ONENAND_DDP_SHIFT (15) #define ONENAND_DDP_CHIP0 (0) #define ONENAND_DDP_CHIP1 (1 << ONENAND_DDP_SHIFT) /* * Start Address 8 F107h (R/W) */ /* Note: It's actually 0x3f in case of SLC */ #define ONENAND_FPA_MASK (0x7f) #define ONENAND_FPA_SHIFT (2) #define ONENAND_FSA_MASK (0x03) /* * Start Buffer Register F200h (R/W) */ #define ONENAND_BSA_MASK (0x03) #define ONENAND_BSA_SHIFT (8) #define ONENAND_BSA_BOOTRAM (0 << 2) #define ONENAND_BSA_DATARAM0 (2 << 2) #define ONENAND_BSA_DATARAM1 (3 << 2) /* Note: It's actually 0x03 in case of SLC */ #define ONENAND_BSC_MASK (0x07) /* * Command Register F220h (R/W) */ #define ONENAND_CMD_READ (0x00) #define ONENAND_CMD_READOOB (0x13) #define ONENAND_CMD_PROG (0x80) #define ONENAND_CMD_PROGOOB (0x1A) #define ONENAND_CMD_2X_PROG (0x7D) #define ONENAND_CMD_2X_CACHE_PROG (0x7F) #define ONENAND_CMD_UNLOCK (0x23) #define ONENAND_CMD_LOCK (0x2A) #define ONENAND_CMD_LOCK_TIGHT (0x2C) #define ONENAND_CMD_UNLOCK_ALL (0x27) #define ONENAND_CMD_ERASE (0x94) #define ONENAND_CMD_MULTIBLOCK_ERASE (0x95) #define ONENAND_CMD_ERASE_VERIFY (0x71) #define ONENAND_CMD_RESET (0xF0) #define ONENAND_CMD_OTP_ACCESS (0x65) #define ONENAND_CMD_READID (0x90) #define FLEXONENAND_CMD_PI_UPDATE (0x05) #define FLEXONENAND_CMD_PI_ACCESS (0x66) #define FLEXONENAND_CMD_RECOVER_LSB (0x05) /* NOTE: Those are not *REAL* commands */ #define ONENAND_CMD_BUFFERRAM (0x1978) #define FLEXONENAND_CMD_READ_PI (0x1985) /* * System Configuration 1 Register F221h (R, R/W) */ #define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) #define ONENAND_SYS_CFG1_BRL_7 (7 << 12) #define ONENAND_SYS_CFG1_BRL_6 (6 << 12) #define ONENAND_SYS_CFG1_BRL_5 (5 << 12) #define ONENAND_SYS_CFG1_BRL_4 (4 << 12) #define ONENAND_SYS_CFG1_BRL_3 (3 << 12) #define ONENAND_SYS_CFG1_BRL_10 (2 << 12) #define ONENAND_SYS_CFG1_BRL_9 (1 << 12) #define ONENAND_SYS_CFG1_BRL_8 (0 << 12) #define ONENAND_SYS_CFG1_BRL_SHIFT (12) #define ONENAND_SYS_CFG1_BL_32 (4 << 9) #define ONENAND_SYS_CFG1_BL_16 (3 << 9) #define ONENAND_SYS_CFG1_BL_8 (2 << 9) #define ONENAND_SYS_CFG1_BL_4 (1 << 9) #define ONENAND_SYS_CFG1_BL_CONT (0 << 9) #define ONENAND_SYS_CFG1_BL_SHIFT (9) #define ONENAND_SYS_CFG1_NO_ECC (1 << 8) #define ONENAND_SYS_CFG1_RDY (1 << 7) #define ONENAND_SYS_CFG1_INT (1 << 6) #define ONENAND_SYS_CFG1_IOBE (1 << 5) #define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) #define ONENAND_SYS_CFG1_VHF (1 << 3) #define ONENAND_SYS_CFG1_HF (1 << 2) #define ONENAND_SYS_CFG1_SYNC_WRITE (1 << 1) /* * Controller Status Register F240h (R) */ #define ONENAND_CTRL_ONGO (1 << 15) #define ONENAND_CTRL_LOCK (1 << 14) #define ONENAND_CTRL_LOAD (1 << 13) #define ONENAND_CTRL_PROGRAM (1 << 12) #define ONENAND_CTRL_ERASE (1 << 11) #define ONENAND_CTRL_ERROR (1 << 10) #define ONENAND_CTRL_RSTB (1 << 7) #define ONENAND_CTRL_OTP_L (1 << 6) #define ONENAND_CTRL_OTP_BL (1 << 5) /* * Interrupt Status Register F241h (R) */ #define ONENAND_INT_MASTER (1 << 15) #define ONENAND_INT_READ (1 << 7) #define ONENAND_INT_WRITE (1 << 6) #define ONENAND_INT_ERASE (1 << 5) #define ONENAND_INT_RESET (1 << 4) #define ONENAND_INT_CLEAR (0 << 0) /* * NAND Flash Write Protection Status Register F24Eh (R) */ #define ONENAND_WP_US (1 << 2) #define ONENAND_WP_LS (1 << 1) #define ONENAND_WP_LTS (1 << 0) /* * ECC Status Reigser FF00h (R) */ #define ONENAND_ECC_1BIT (1 << 0) #define ONENAND_ECC_1BIT_ALL (0x5555) #define ONENAND_ECC_2BIT (1 << 1) #define ONENAND_ECC_2BIT_ALL (0xAAAA) #define FLEXONENAND_UNCORRECTABLE_ERROR (0x1010) #define ONENAND_ECC_3BIT (1 << 2) #define ONENAND_ECC_4BIT (1 << 3) #define ONENAND_ECC_4BIT_UNCORRECTABLE (0x1010) /* * One-Time Programmable (OTP) */ #define FLEXONENAND_OTP_LOCK_OFFSET (2048) #define ONENAND_OTP_LOCK_OFFSET (14) #endif /* __ONENAND_REG_H */ PK ! ir��)X )X mtd/mtd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al. */ #ifndef __MTD_MTD_H__ #define __MTD_MTD_H__ #include <linux/types.h> #include <linux/uio.h> #include <linux/list.h> #include <linux/notifier.h> #include <linux/device.h> #include <linux/of.h> #include <linux/nvmem-provider.h> #include <mtd/mtd-abi.h> #include <asm/div64.h> #define MTD_FAIL_ADDR_UNKNOWN -1LL struct mtd_info; /* * If the erase fails, fail_addr might indicate exactly which block failed. If * fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level * or was not specific to any particular block. */ struct erase_info { uint64_t addr; uint64_t len; uint64_t fail_addr; }; struct mtd_erase_region_info { uint64_t offset; /* At which this region starts, from the beginning of the MTD */ uint32_t erasesize; /* For this region */ uint32_t numblocks; /* Number of blocks of erasesize in this region */ unsigned long *lockmap; /* If keeping bitmap of locks */ }; /** * struct mtd_oob_ops - oob operation operands * @mode: operation mode * * @len: number of data bytes to write/read * * @retlen: number of data bytes written/read * * @ooblen: number of oob bytes to write/read * @oobretlen: number of oob bytes written/read * @ooboffs: offset of oob data in the oob area (only relevant when * mode = MTD_OPS_PLACE_OOB or MTD_OPS_RAW) * @datbuf: data buffer - if NULL only oob data are read/written * @oobbuf: oob data buffer * * Note, some MTD drivers do not allow you to write more than one OOB area at * one go. If you try to do that on such an MTD device, -EINVAL will be * returned. If you want to make your implementation portable on all kind of MTD * devices you should split the write request into several sub-requests when the * request crosses a page boundary. */ struct mtd_oob_ops { unsigned int mode; size_t len; size_t retlen; size_t ooblen; size_t oobretlen; uint32_t ooboffs; uint8_t *datbuf; uint8_t *oobbuf; }; #define MTD_MAX_OOBFREE_ENTRIES_LARGE 32 #define MTD_MAX_ECCPOS_ENTRIES_LARGE 640 /** * struct mtd_oob_region - oob region definition * @offset: region offset * @length: region length * * This structure describes a region of the OOB area, and is used * to retrieve ECC or free bytes sections. * Each section is defined by an offset within the OOB area and a * length. */ struct mtd_oob_region { u32 offset; u32 length; }; /* * struct mtd_ooblayout_ops - NAND OOB layout operations * @ecc: function returning an ECC region in the OOB area. * Should return -ERANGE if %section exceeds the total number of * ECC sections. * @free: function returning a free region in the OOB area. * Should return -ERANGE if %section exceeds the total number of * free sections. */ struct mtd_ooblayout_ops { int (*ecc)(struct mtd_info *mtd, int section, struct mtd_oob_region *oobecc); int (*free)(struct mtd_info *mtd, int section, struct mtd_oob_region *oobfree); }; /** * struct mtd_pairing_info - page pairing information * * @pair: pair id * @group: group id * * The term "pair" is used here, even though TLC NANDs might group pages by 3 * (3 bits in a single cell). A pair should regroup all pages that are sharing * the same cell. Pairs are then indexed in ascending order. * * @group is defining the position of a page in a given pair. It can also be * seen as the bit position in the cell: page attached to bit 0 belongs to * group 0, page attached to bit 1 belongs to group 1, etc. * * Example: * The H27UCG8T2BTR-BC datasheet describes the following pairing scheme: * * group-0 group-1 * * pair-0 page-0 page-4 * pair-1 page-1 page-5 * pair-2 page-2 page-8 * ... * pair-127 page-251 page-255 * * * Note that the "group" and "pair" terms were extracted from Samsung and * Hynix datasheets, and might be referenced under other names in other * datasheets (Micron is describing this concept as "shared pages"). */ struct mtd_pairing_info { int pair; int group; }; /** * struct mtd_pairing_scheme - page pairing scheme description * * @ngroups: number of groups. Should be related to the number of bits * per cell. * @get_info: converts a write-unit (page number within an erase block) into * mtd_pairing information (pair + group). This function should * fill the info parameter based on the wunit index or return * -EINVAL if the wunit parameter is invalid. * @get_wunit: converts pairing information into a write-unit (page) number. * This function should return the wunit index pointed by the * pairing information described in the info argument. It should * return -EINVAL, if there's no wunit corresponding to the * passed pairing information. * * See mtd_pairing_info documentation for a detailed explanation of the * pair and group concepts. * * The mtd_pairing_scheme structure provides a generic solution to represent * NAND page pairing scheme. Instead of exposing two big tables to do the * write-unit <-> (pair + group) conversions, we ask the MTD drivers to * implement the ->get_info() and ->get_wunit() functions. * * MTD users will then be able to query these information by using the * mtd_pairing_info_to_wunit() and mtd_wunit_to_pairing_info() helpers. * * @ngroups is here to help MTD users iterating over all the pages in a * given pair. This value can be retrieved by MTD users using the * mtd_pairing_groups() helper. * * Examples are given in the mtd_pairing_info_to_wunit() and * mtd_wunit_to_pairing_info() documentation. */ struct mtd_pairing_scheme { int ngroups; int (*get_info)(struct mtd_info *mtd, int wunit, struct mtd_pairing_info *info); int (*get_wunit)(struct mtd_info *mtd, const struct mtd_pairing_info *info); }; struct module; /* only needed for owner field in mtd_info */ /** * struct mtd_debug_info - debugging information for an MTD device. * * @dfs_dir: direntry object of the MTD device debugfs directory */ struct mtd_debug_info { struct dentry *dfs_dir; const char *partname; const char *partid; }; /** * struct mtd_part - MTD partition specific fields * * @node: list node used to add an MTD partition to the parent partition list * @offset: offset of the partition relatively to the parent offset * @size: partition size. Should be equal to mtd->size unless * MTD_SLC_ON_MLC_EMULATION is set * @flags: original flags (before the mtdpart logic decided to tweak them based * on flash constraints, like eraseblock/pagesize alignment) * * This struct is embedded in mtd_info and contains partition-specific * properties/fields. */ struct mtd_part { struct list_head node; u64 offset; u64 size; u32 flags; }; /** * struct mtd_master - MTD master specific fields * * @partitions_lock: lock protecting accesses to the partition list. Protects * not only the master partition list, but also all * sub-partitions. * @suspended: et to 1 when the device is suspended, 0 otherwise * * This struct is embedded in mtd_info and contains master-specific * properties/fields. The master is the root MTD device from the MTD partition * point of view. */ struct mtd_master { struct mutex partitions_lock; struct mutex chrdev_lock; unsigned int suspended : 1; }; struct mtd_info { u_char type; uint32_t flags; uint64_t size; // Total size of the MTD /* "Major" erase size for the device. Naïve users may take this * to be the only erase size available, or may use the more detailed * information below if they desire */ uint32_t erasesize; /* Minimal writable flash unit size. In case of NOR flash it is 1 (even * though individual bits can be cleared), in case of NAND flash it is * one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR * it is of ECC block size, etc. It is illegal to have writesize = 0. * Any driver registering a struct mtd_info must ensure a writesize of * 1 or larger. */ uint32_t writesize; /* * Size of the write buffer used by the MTD. MTD devices having a write * buffer can write multiple writesize chunks at a time. E.g. while * writing 4 * writesize bytes to a device with 2 * writesize bytes * buffer the MTD driver can (but doesn't have to) do 2 writesize * operations, but not 4. Currently, all NANDs have writebufsize * equivalent to writesize (NAND page size). Some NOR flashes do have * writebufsize greater than writesize. */ uint32_t writebufsize; uint32_t oobsize; // Amount of OOB data per block (e.g. 16) uint32_t oobavail; // Available OOB bytes per block /* * If erasesize is a power of 2 then the shift is stored in * erasesize_shift otherwise erasesize_shift is zero. Ditto writesize. */ unsigned int erasesize_shift; unsigned int writesize_shift; /* Masks based on erasesize_shift and writesize_shift */ unsigned int erasesize_mask; unsigned int writesize_mask; /* * read ops return -EUCLEAN if max number of bitflips corrected on any * one region comprising an ecc step equals or exceeds this value. * Settable by driver, else defaults to ecc_strength. User can override * in sysfs. N.B. The meaning of the -EUCLEAN return code has changed; * see Documentation/ABI/testing/sysfs-class-mtd for more detail. */ unsigned int bitflip_threshold; /* Kernel-only stuff starts here. */ const char *name; int index; /* OOB layout description */ const struct mtd_ooblayout_ops *ooblayout; /* NAND pairing scheme, only provided for MLC/TLC NANDs */ const struct mtd_pairing_scheme *pairing; /* the ecc step size. */ unsigned int ecc_step_size; /* max number of correctible bit errors per ecc step */ unsigned int ecc_strength; /* Data for variable erase regions. If numeraseregions is zero, * it means that the whole device has erasesize as given above. */ int numeraseregions; struct mtd_erase_region_info *eraseregions; /* * Do not call via these pointers, use corresponding mtd_*() * wrappers instead. */ int (*_erase) (struct mtd_info *mtd, struct erase_info *instr); int (*_point) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, void **virt, resource_size_t *phys); int (*_unpoint) (struct mtd_info *mtd, loff_t from, size_t len); int (*_read) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int (*_write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int (*_panic_write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int (*_read_oob) (struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); int (*_write_oob) (struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops); int (*_get_fact_prot_info) (struct mtd_info *mtd, size_t len, size_t *retlen, struct otp_info *buf); int (*_read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int (*_get_user_prot_info) (struct mtd_info *mtd, size_t len, size_t *retlen, struct otp_info *buf); int (*_read_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int (*_write_user_prot_reg) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int (*_lock_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len); int (*_erase_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len); int (*_writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen); void (*_sync) (struct mtd_info *mtd); int (*_lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); int (*_unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); int (*_is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len); int (*_block_isreserved) (struct mtd_info *mtd, loff_t ofs); int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs); int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs); int (*_max_bad_blocks) (struct mtd_info *mtd, loff_t ofs, size_t len); int (*_suspend) (struct mtd_info *mtd); void (*_resume) (struct mtd_info *mtd); void (*_reboot) (struct mtd_info *mtd); /* * If the driver is something smart, like UBI, it may need to maintain * its own reference counting. The below functions are only for driver. */ int (*_get_device) (struct mtd_info *mtd); void (*_put_device) (struct mtd_info *mtd); /* * flag indicates a panic write, low level drivers can take appropriate * action if required to ensure writes go through */ bool oops_panic_write; struct notifier_block reboot_notifier; /* default mode before reboot */ /* ECC status information */ struct mtd_ecc_stats ecc_stats; /* Subpage shift (NAND) */ int subpage_sft; void *priv; struct module *owner; struct device dev; int usecount; struct mtd_debug_info dbg; struct nvmem_device *nvmem; struct nvmem_device *otp_user_nvmem; struct nvmem_device *otp_factory_nvmem; /* * Parent device from the MTD partition point of view. * * MTD masters do not have any parent, MTD partitions do. The parent * MTD device can itself be a partition. */ struct mtd_info *parent; /* List of partitions attached to this MTD device */ struct list_head partitions; struct mtd_part part; struct mtd_master master; }; static inline struct mtd_info *mtd_get_master(struct mtd_info *mtd) { while (mtd->parent) mtd = mtd->parent; return mtd; } static inline u64 mtd_get_master_ofs(struct mtd_info *mtd, u64 ofs) { while (mtd->parent) { ofs += mtd->part.offset; mtd = mtd->parent; } return ofs; } static inline bool mtd_is_partition(const struct mtd_info *mtd) { return mtd->parent; } static inline bool mtd_has_partitions(const struct mtd_info *mtd) { return !list_empty(&mtd->partitions); } int mtd_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *oobecc); int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte, int *section, struct mtd_oob_region *oobregion); int mtd_ooblayout_get_eccbytes(struct mtd_info *mtd, u8 *eccbuf, const u8 *oobbuf, int start, int nbytes); int mtd_ooblayout_set_eccbytes(struct mtd_info *mtd, const u8 *eccbuf, u8 *oobbuf, int start, int nbytes); int mtd_ooblayout_free(struct mtd_info *mtd, int section, struct mtd_oob_region *oobfree); int mtd_ooblayout_get_databytes(struct mtd_info *mtd, u8 *databuf, const u8 *oobbuf, int start, int nbytes); int mtd_ooblayout_set_databytes(struct mtd_info *mtd, const u8 *databuf, u8 *oobbuf, int start, int nbytes); int mtd_ooblayout_count_freebytes(struct mtd_info *mtd); int mtd_ooblayout_count_eccbytes(struct mtd_info *mtd); static inline void mtd_set_ooblayout(struct mtd_info *mtd, const struct mtd_ooblayout_ops *ooblayout) { mtd->ooblayout = ooblayout; } static inline void mtd_set_pairing_scheme(struct mtd_info *mtd, const struct mtd_pairing_scheme *pairing) { mtd->pairing = pairing; } static inline void mtd_set_of_node(struct mtd_info *mtd, struct device_node *np) { mtd->dev.of_node = np; if (!mtd->name) of_property_read_string(np, "label", &mtd->name); } static inline struct device_node *mtd_get_of_node(struct mtd_info *mtd) { return dev_of_node(&mtd->dev); } static inline u32 mtd_oobavail(struct mtd_info *mtd, struct mtd_oob_ops *ops) { return ops->mode == MTD_OPS_AUTO_OOB ? mtd->oobavail : mtd->oobsize; } static inline int mtd_max_bad_blocks(struct mtd_info *mtd, loff_t ofs, size_t len) { struct mtd_info *master = mtd_get_master(mtd); if (!master->_max_bad_blocks) return -ENOTSUPP; if (mtd->size < (len + ofs) || ofs < 0) return -EINVAL; return master->_max_bad_blocks(master, mtd_get_master_ofs(mtd, ofs), len); } int mtd_wunit_to_pairing_info(struct mtd_info *mtd, int wunit, struct mtd_pairing_info *info); int mtd_pairing_info_to_wunit(struct mtd_info *mtd, const struct mtd_pairing_info *info); int mtd_pairing_groups(struct mtd_info *mtd); int mtd_erase(struct mtd_info *mtd, struct erase_info *instr); int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, void **virt, resource_size_t *phys); int mtd_unpoint(struct mtd_info *mtd, loff_t from, size_t len); unsigned long mtd_get_unmapped_area(struct mtd_info *mtd, unsigned long len, unsigned long offset, unsigned long flags); int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops); int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen, struct otp_info *buf); int mtd_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int mtd_get_user_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen, struct otp_info *buf); int mtd_read_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); int mtd_write_user_prot_reg(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); int mtd_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len); int mtd_erase_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len); int mtd_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen); static inline void mtd_sync(struct mtd_info *mtd) { struct mtd_info *master = mtd_get_master(mtd); if (master->_sync) master->_sync(master); } int mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len); int mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len); int mtd_block_isreserved(struct mtd_info *mtd, loff_t ofs); int mtd_block_isbad(struct mtd_info *mtd, loff_t ofs); int mtd_block_markbad(struct mtd_info *mtd, loff_t ofs); static inline int mtd_suspend(struct mtd_info *mtd) { struct mtd_info *master = mtd_get_master(mtd); int ret; if (master->master.suspended) return 0; ret = master->_suspend ? master->_suspend(master) : 0; if (ret) return ret; master->master.suspended = 1; return 0; } static inline void mtd_resume(struct mtd_info *mtd) { struct mtd_info *master = mtd_get_master(mtd); if (!master->master.suspended) return; if (master->_resume) master->_resume(master); master->master.suspended = 0; } static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd) { if (mtd->erasesize_shift) return sz >> mtd->erasesize_shift; do_div(sz, mtd->erasesize); return sz; } static inline uint32_t mtd_mod_by_eb(uint64_t sz, struct mtd_info *mtd) { if (mtd->erasesize_shift) return sz & mtd->erasesize_mask; return do_div(sz, mtd->erasesize); } /** * mtd_align_erase_req - Adjust an erase request to align things on eraseblock * boundaries. * @mtd: the MTD device this erase request applies on * @req: the erase request to adjust * * This function will adjust @req->addr and @req->len to align them on * @mtd->erasesize. Of course we expect @mtd->erasesize to be != 0. */ static inline void mtd_align_erase_req(struct mtd_info *mtd, struct erase_info *req) { u32 mod; if (WARN_ON(!mtd->erasesize)) return; mod = mtd_mod_by_eb(req->addr, mtd); if (mod) { req->addr -= mod; req->len += mod; } mod = mtd_mod_by_eb(req->addr + req->len, mtd); if (mod) req->len += mtd->erasesize - mod; } static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd) { if (mtd->writesize_shift) return sz >> mtd->writesize_shift; do_div(sz, mtd->writesize); return sz; } static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd) { if (mtd->writesize_shift) return sz & mtd->writesize_mask; return do_div(sz, mtd->writesize); } static inline int mtd_wunit_per_eb(struct mtd_info *mtd) { struct mtd_info *master = mtd_get_master(mtd); return master->erasesize / mtd->writesize; } static inline int mtd_offset_to_wunit(struct mtd_info *mtd, loff_t offs) { return mtd_div_by_ws(mtd_mod_by_eb(offs, mtd), mtd); } static inline loff_t mtd_wunit_to_offset(struct mtd_info *mtd, loff_t base, int wunit) { return base + (wunit * mtd->writesize); } static inline int mtd_has_oob(const struct mtd_info *mtd) { struct mtd_info *master = mtd_get_master((struct mtd_info *)mtd); return master->_read_oob && master->_write_oob; } static inline int mtd_type_is_nand(const struct mtd_info *mtd) { return mtd->type == MTD_NANDFLASH || mtd->type == MTD_MLCNANDFLASH; } static inline int mtd_can_have_bb(const struct mtd_info *mtd) { struct mtd_info *master = mtd_get_master((struct mtd_info *)mtd); return !!master->_block_isbad; } /* Kernel-side ioctl definitions */ struct mtd_partition; struct mtd_part_parser_data; extern int mtd_device_parse_register(struct mtd_info *mtd, const char * const *part_probe_types, struct mtd_part_parser_data *parser_data, const struct mtd_partition *defparts, int defnr_parts); #define mtd_device_register(master, parts, nr_parts) \ mtd_device_parse_register(master, NULL, NULL, parts, nr_parts) extern int mtd_device_unregister(struct mtd_info *master); extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); extern int __get_mtd_device(struct mtd_info *mtd); extern void __put_mtd_device(struct mtd_info *mtd); extern struct mtd_info *get_mtd_device_nm(const char *name); extern void put_mtd_device(struct mtd_info *mtd); struct mtd_notifier { void (*add)(struct mtd_info *mtd); void (*remove)(struct mtd_info *mtd); struct list_head list; }; extern void register_mtd_user (struct mtd_notifier *new); extern int unregister_mtd_user (struct mtd_notifier *old); void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size); static inline int mtd_is_bitflip(int err) { return err == -EUCLEAN; } static inline int mtd_is_eccerr(int err) { return err == -EBADMSG; } static inline int mtd_is_bitflip_or_eccerr(int err) { return mtd_is_bitflip(err) || mtd_is_eccerr(err); } unsigned mtd_mmap_capabilities(struct mtd_info *mtd); #endif /* __MTD_MTD_H__ */ PK ! �|ف � mtd/lpc32xx_mlc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for LPC32xx SoC MLC NAND controller * * Copyright © 2012 Roland Stigge */ #ifndef __LINUX_MTD_LPC32XX_MLC_H #define __LINUX_MTD_LPC32XX_MLC_H #include <linux/dmaengine.h> struct lpc32xx_mlc_platform_data { bool (*dma_filter)(struct dma_chan *chan, void *filter_param); }; #endif /* __LINUX_MTD_LPC32XX_MLC_H */ PK ! o�n�� � mtd/bbm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * NAND family Bad Block Management (BBM) header file * - Bad Block Table (BBT) implementation * * Copyright © 2005 Samsung Electronics * Kyungmin Park <kyungmin.park@samsung.com> * * Copyright © 2000-2005 * Thomas Gleixner <tglx@linuxtronix.de> */ #ifndef __LINUX_MTD_BBM_H #define __LINUX_MTD_BBM_H /* The maximum number of NAND chips in an array */ #define NAND_MAX_CHIPS 8 /** * struct nand_bbt_descr - bad block table descriptor * @options: options for this descriptor * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE * when bbt is searched, then we store the found bbts pages here. * Its an array and supports up to 8 chips now * @offs: offset of the pattern in the oob area of the page * @veroffs: offset of the bbt version counter in the oob are of the page * @version: version read from the bbt page during scan * @len: length of the pattern, if 0 no pattern check is performed * @maxblocks: maximum number of blocks to search for a bbt. This number of * blocks is reserved at the end of the device where the tables are * written. * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than * bad) block in the stored bbt * @pattern: pattern to identify bad block table or factory marked good / * bad blocks, can be NULL, if len = 0 * * Descriptor for the bad block table marker and the descriptor for the * pattern which identifies good and bad blocks. The assumption is made * that the pattern and the version count are always located in the oob area * of the first block. */ struct nand_bbt_descr { int options; int pages[NAND_MAX_CHIPS]; int offs; int veroffs; uint8_t version[NAND_MAX_CHIPS]; int len; int maxblocks; int reserved_block_code; uint8_t *pattern; }; /* Options for the bad block table descriptors */ /* The number of bits used per block in the bbt on the device */ #define NAND_BBT_NRBITS_MSK 0x0000000F #define NAND_BBT_1BIT 0x00000001 #define NAND_BBT_2BIT 0x00000002 #define NAND_BBT_4BIT 0x00000004 #define NAND_BBT_8BIT 0x00000008 /* The bad block table is in the last good block of the device */ #define NAND_BBT_LASTBLOCK 0x00000010 /* The bbt is at the given page, else we must scan for the bbt */ #define NAND_BBT_ABSPAGE 0x00000020 /* bbt is stored per chip on multichip devices */ #define NAND_BBT_PERCHIP 0x00000080 /* bbt has a version counter at offset veroffs */ #define NAND_BBT_VERSION 0x00000100 /* Create a bbt if none exists */ #define NAND_BBT_CREATE 0x00000200 /* * Create an empty BBT with no vendor information. Vendor's information may be * unavailable, for example, if the NAND controller has a different data and OOB * layout or if this information is already purged. Must be used in conjunction * with NAND_BBT_CREATE. */ #define NAND_BBT_CREATE_EMPTY 0x00000400 /* Write bbt if neccecary */ #define NAND_BBT_WRITE 0x00002000 /* Read and write back block contents when writing bbt */ #define NAND_BBT_SAVECONTENT 0x00004000 /* * Use a flash based bad block table. By default, OOB identifier is saved in * OOB area. This option is passed to the default bad block table function. */ #define NAND_BBT_USE_FLASH 0x00020000 /* * Do not store flash based bad block table marker in the OOB area; store it * in-band. */ #define NAND_BBT_NO_OOB 0x00040000 /* * Do not write new bad block markers to OOB; useful, e.g., when ECC covers * entire spare area. Must be used with NAND_BBT_USE_FLASH. */ #define NAND_BBT_NO_OOB_BBM 0x00080000 /* * Flag set by nand_create_default_bbt_descr(), marking that the nand_bbt_descr * was allocated dynamicaly and must be freed in nand_cleanup(). Has no meaning * in nand_chip.bbt_options. */ #define NAND_BBT_DYNAMICSTRUCT 0x80000000 /* The maximum number of blocks to scan for a bbt */ #define NAND_BBT_SCAN_MAXBLOCKS 4 /* * Bad block scanning errors */ #define ONENAND_BBT_READ_ERROR 1 #define ONENAND_BBT_READ_ECC_ERROR 2 #define ONENAND_BBT_READ_FATAL_ERROR 4 /** * struct bbm_info - [GENERIC] Bad Block Table data structure * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry * @options: options for this descriptor * @bbt: [INTERN] bad block table pointer * @isbad_bbt: function to determine if a block is bad * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for * initial bad block scan * @priv: [OPTIONAL] pointer to private bbm date */ struct bbm_info { int bbt_erase_shift; int options; uint8_t *bbt; int (*isbad_bbt)(struct mtd_info *mtd, loff_t ofs, int allowbbt); /* TODO Add more NAND specific fileds */ struct nand_bbt_descr *badblock_pattern; void *priv; }; /* OneNAND BBT interface */ extern int onenand_default_bbt(struct mtd_info *mtd); #endif /* __LINUX_MTD_BBM_H */ PK ! �q�o�& �& mtd/ubi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) International Business Machines Corp., 2006 * * Author: Artem Bityutskiy (Битюцкий Артём) */ #ifndef __LINUX_UBI_H__ #define __LINUX_UBI_H__ #include <linux/ioctl.h> #include <linux/types.h> #include <linux/scatterlist.h> #include <mtd/ubi-user.h> /* All voumes/LEBs */ #define UBI_ALL -1 /* * Maximum number of scatter gather list entries, * we use only 64 to have a lower memory foot print. */ #define UBI_MAX_SG_COUNT 64 /* * enum ubi_open_mode - UBI volume open mode constants. * * UBI_READONLY: read-only mode * UBI_READWRITE: read-write mode * UBI_EXCLUSIVE: exclusive mode * UBI_METAONLY: modify only the volume meta-data, * i.e. the data stored in the volume table, but not in any of volume LEBs. */ enum { UBI_READONLY = 1, UBI_READWRITE, UBI_EXCLUSIVE, UBI_METAONLY }; /** * struct ubi_volume_info - UBI volume description data structure. * @vol_id: volume ID * @ubi_num: UBI device number this volume belongs to * @size: how many physical eraseblocks are reserved for this volume * @used_bytes: how many bytes of data this volume contains * @used_ebs: how many physical eraseblocks of this volume actually contain any * data * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) * @corrupted: non-zero if the volume is corrupted (static volumes only) * @upd_marker: non-zero if the volume has update marker set * @alignment: volume alignment * @usable_leb_size: how many bytes are available in logical eraseblocks of * this volume * @name_len: volume name length * @name: volume name * @cdev: UBI volume character device major and minor numbers * * The @corrupted flag is only relevant to static volumes and is always zero * for dynamic ones. This is because UBI does not care about dynamic volume * data protection and only cares about protecting static volume data. * * The @upd_marker flag is set if the volume update operation was interrupted. * Before touching the volume data during the update operation, UBI first sets * the update marker flag for this volume. If the volume update operation was * further interrupted, the update marker indicates this. If the update marker * is set, the contents of the volume is certainly damaged and a new volume * update operation has to be started. * * To put it differently, @corrupted and @upd_marker fields have different * semantics: * o the @corrupted flag means that this static volume is corrupted for some * reasons, but not because an interrupted volume update * o the @upd_marker field means that the volume is damaged because of an * interrupted update operation. * * I.e., the @corrupted flag is never set if the @upd_marker flag is set. * * The @used_bytes and @used_ebs fields are only really needed for static * volumes and contain the number of bytes stored in this static volume and how * many eraseblock this data occupies. In case of dynamic volumes, the * @used_bytes field is equivalent to @size*@usable_leb_size, and the @used_ebs * field is equivalent to @size. * * In general, logical eraseblock size is a property of the UBI device, not * of the UBI volume. Indeed, the logical eraseblock size depends on the * physical eraseblock size and on how much bytes UBI headers consume. But * because of the volume alignment (@alignment), the usable size of logical * eraseblocks if a volume may be less. The following equation is true: * @usable_leb_size = LEB size - (LEB size mod @alignment), * where LEB size is the logical eraseblock size defined by the UBI device. * * The alignment is multiple to the minimal flash input/output unit size or %1 * if all the available space is used. * * To put this differently, alignment may be considered is a way to change * volume logical eraseblock sizes. */ struct ubi_volume_info { int ubi_num; int vol_id; int size; long long used_bytes; int used_ebs; int vol_type; int corrupted; int upd_marker; int alignment; int usable_leb_size; int name_len; const char *name; dev_t cdev; }; /** * struct ubi_sgl - UBI scatter gather list data structure. * @list_pos: current position in @sg[] * @page_pos: current position in @sg[@list_pos] * @sg: the scatter gather list itself * * ubi_sgl is a wrapper around a scatter list which keeps track of the * current position in the list and the current list item such that * it can be used across multiple ubi_leb_read_sg() calls. */ struct ubi_sgl { int list_pos; int page_pos; struct scatterlist sg[UBI_MAX_SG_COUNT]; }; /** * ubi_sgl_init - initialize an UBI scatter gather list data structure. * @usgl: the UBI scatter gather struct itself * * Please note that you still have to use sg_init_table() or any adequate * function to initialize the unterlaying struct scatterlist. */ static inline void ubi_sgl_init(struct ubi_sgl *usgl) { usgl->list_pos = 0; usgl->page_pos = 0; } /** * struct ubi_device_info - UBI device description data structure. * @ubi_num: ubi device number * @leb_size: logical eraseblock size on this UBI device * @leb_start: starting offset of logical eraseblocks within physical * eraseblocks * @min_io_size: minimal I/O unit size * @max_write_size: maximum amount of bytes the underlying flash can write at a * time (MTD write buffer size) * @ro_mode: if this device is in read-only mode * @cdev: UBI character device major and minor numbers * * Note, @leb_size is the logical eraseblock size offered by the UBI device. * Volumes of this UBI device may have smaller logical eraseblock size if their * alignment is not equivalent to %1. * * The @max_write_size field describes flash write maximum write unit. For * example, NOR flash allows for changing individual bytes, so @min_io_size is * %1. However, it does not mean than NOR flash has to write data byte-by-byte. * Instead, CFI NOR flashes have a write-buffer of, e.g., 64 bytes, and when * writing large chunks of data, they write 64-bytes at a time. Obviously, this * improves write throughput. * * Also, the MTD device may have N interleaved (striped) flash chips * underneath, in which case @min_io_size can be physical min. I/O size of * single flash chip, while @max_write_size can be N * @min_io_size. * * The @max_write_size field is always greater or equivalent to @min_io_size. * E.g., some NOR flashes may have (@min_io_size = 1, @max_write_size = 64). In * contrast, NAND flashes usually have @min_io_size = @max_write_size = NAND * page size. */ struct ubi_device_info { int ubi_num; int leb_size; int leb_start; int min_io_size; int max_write_size; int ro_mode; dev_t cdev; }; /* * Volume notification types. * @UBI_VOLUME_ADDED: a volume has been added (an UBI device was attached or a * volume was created) * @UBI_VOLUME_REMOVED: a volume has been removed (an UBI device was detached * or a volume was removed) * @UBI_VOLUME_RESIZED: a volume has been re-sized * @UBI_VOLUME_RENAMED: a volume has been re-named * @UBI_VOLUME_UPDATED: data has been written to a volume * * These constants define which type of event has happened when a volume * notification function is invoked. */ enum { UBI_VOLUME_ADDED, UBI_VOLUME_REMOVED, UBI_VOLUME_RESIZED, UBI_VOLUME_RENAMED, UBI_VOLUME_UPDATED, }; /* * struct ubi_notification - UBI notification description structure. * @di: UBI device description object * @vi: UBI volume description object * * UBI notifiers are called with a pointer to an object of this type. The * object describes the notification. Namely, it provides a description of the * UBI device and UBI volume the notification informs about. */ struct ubi_notification { struct ubi_device_info di; struct ubi_volume_info vi; }; /* UBI descriptor given to users when they open UBI volumes */ struct ubi_volume_desc; int ubi_get_device_info(int ubi_num, struct ubi_device_info *di); void ubi_get_volume_info(struct ubi_volume_desc *desc, struct ubi_volume_info *vi); struct ubi_volume_desc *ubi_open_volume(int ubi_num, int vol_id, int mode); struct ubi_volume_desc *ubi_open_volume_nm(int ubi_num, const char *name, int mode); struct ubi_volume_desc *ubi_open_volume_path(const char *pathname, int mode); int ubi_register_volume_notifier(struct notifier_block *nb, int ignore_existing); int ubi_unregister_volume_notifier(struct notifier_block *nb); void ubi_close_volume(struct ubi_volume_desc *desc); int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset, int len, int check); int ubi_leb_read_sg(struct ubi_volume_desc *desc, int lnum, struct ubi_sgl *sgl, int offset, int len, int check); int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf, int offset, int len); int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf, int len); int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum); int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum); int ubi_leb_map(struct ubi_volume_desc *desc, int lnum); int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum); int ubi_sync(int ubi_num); int ubi_flush(int ubi_num, int vol_id, int lnum); /* * This function is the same as the 'ubi_leb_read()' function, but it does not * provide the checking capability. */ static inline int ubi_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset, int len) { return ubi_leb_read(desc, lnum, buf, offset, len, 0); } /* * This function is the same as the 'ubi_leb_read_sg()' function, but it does * not provide the checking capability. */ static inline int ubi_read_sg(struct ubi_volume_desc *desc, int lnum, struct ubi_sgl *sgl, int offset, int len) { return ubi_leb_read_sg(desc, lnum, sgl, offset, len, 0); } #endif /* !__LINUX_UBI_H__ */ PK ! �>\& & mtd/onenand.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/mtd/onenand.h * * Copyright © 2005-2009 Samsung Electronics * Kyungmin Park <kyungmin.park@samsung.com> */ #ifndef __LINUX_MTD_ONENAND_H #define __LINUX_MTD_ONENAND_H #include <linux/spinlock.h> #include <linux/completion.h> #include <linux/mtd/flashchip.h> #include <linux/mtd/onenand_regs.h> #include <linux/mtd/bbm.h> #define MAX_DIES 2 #define MAX_BUFFERRAM 2 /* Scan and identify a OneNAND device */ extern int onenand_scan(struct mtd_info *mtd, int max_chips); /* Free resources held by the OneNAND device */ extern void onenand_release(struct mtd_info *mtd); /** * struct onenand_bufferram - OneNAND BufferRAM Data * @blockpage: block & page address in BufferRAM */ struct onenand_bufferram { int blockpage; }; /** * struct onenand_chip - OneNAND Private Flash Chip Data * @base: [BOARDSPECIFIC] address to access OneNAND * @dies: [INTERN][FLEX-ONENAND] number of dies on chip * @boundary: [INTERN][FLEX-ONENAND] Boundary of the dies * @diesize: [INTERN][FLEX-ONENAND] Size of the dies * @chipsize: [INTERN] the size of one chip for multichip arrays * FIXME For Flex-OneNAND, chipsize holds maximum possible * device size ie when all blocks are considered MLC * @device_id: [INTERN] device ID * @density_mask: chip density, used for DDP devices * @verstion_id: [INTERN] version ID * @options: [BOARDSPECIFIC] various chip options. They can * partly be set to inform onenand_scan about * @erase_shift: [INTERN] number of address bits in a block * @page_shift: [INTERN] number of address bits in a page * @page_mask: [INTERN] a page per block mask * @writesize: [INTERN] a real page size * @bufferram_index: [INTERN] BufferRAM index * @bufferram: [INTERN] BufferRAM info * @readw: [REPLACEABLE] hardware specific function for read short * @writew: [REPLACEABLE] hardware specific function for write short * @command: [REPLACEABLE] hardware specific function for writing * commands to the chip * @wait: [REPLACEABLE] hardware specific function for wait on ready * @bbt_wait: [REPLACEABLE] hardware specific function for bbt wait on ready * @unlock_all: [REPLACEABLE] hardware specific function for unlock all * @read_bufferram: [REPLACEABLE] hardware specific function for BufferRAM Area * @write_bufferram: [REPLACEABLE] hardware specific function for BufferRAM Area * @read_word: [REPLACEABLE] hardware specific function for read * register of OneNAND * @write_word: [REPLACEABLE] hardware specific function for write * register of OneNAND * @mmcontrol: sync burst read function * @chip_probe: [REPLACEABLE] hardware specific function for chip probe * @block_markbad: function to mark a block as bad * @scan_bbt: [REPLACEALBE] hardware specific function for scanning * Bad block Table * @chip_lock: [INTERN] spinlock used to protect access to this * structure and the chip * @wq: [INTERN] wait queue to sleep on if a OneNAND * operation is in progress * @state: [INTERN] the current state of the OneNAND device * @page_buf: [INTERN] page main data buffer * @oob_buf: [INTERN] page oob data buffer * @subpagesize: [INTERN] holds the subpagesize * @bbm: [REPLACEABLE] pointer to Bad Block Management * @priv: [OPTIONAL] pointer to private chip date */ struct onenand_chip { void __iomem *base; unsigned dies; unsigned boundary[MAX_DIES]; loff_t diesize[MAX_DIES]; unsigned int chipsize; unsigned int device_id; unsigned int version_id; unsigned int technology; unsigned int density_mask; unsigned int options; unsigned int badblockpos; unsigned int erase_shift; unsigned int page_shift; unsigned int page_mask; unsigned int writesize; unsigned int bufferram_index; struct onenand_bufferram bufferram[MAX_BUFFERRAM]; int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len); int (*wait)(struct mtd_info *mtd, int state); int (*bbt_wait)(struct mtd_info *mtd, int state); void (*unlock_all)(struct mtd_info *mtd); int (*read_bufferram)(struct mtd_info *mtd, int area, unsigned char *buffer, int offset, size_t count); int (*write_bufferram)(struct mtd_info *mtd, int area, const unsigned char *buffer, int offset, size_t count); unsigned short (*read_word)(void __iomem *addr); void (*write_word)(unsigned short value, void __iomem *addr); void (*mmcontrol)(struct mtd_info *mtd, int sync_read); int (*chip_probe)(struct mtd_info *mtd); int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); int (*scan_bbt)(struct mtd_info *mtd); int (*enable)(struct mtd_info *mtd); int (*disable)(struct mtd_info *mtd); struct completion complete; int irq; spinlock_t chip_lock; wait_queue_head_t wq; flstate_t state; unsigned char *page_buf; unsigned char *oob_buf; #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE unsigned char *verify_buf; #endif int subpagesize; void *bbm; void *priv; /* * Shows that the current operation is composed * of sequence of commands. For example, cache program. * Such command status OnGo bit is checked at the end of * sequence. */ unsigned int ongoing; }; /* * Helper macros */ #define ONENAND_PAGES_PER_BLOCK (1<<6) #define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) #define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) #define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) #define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1) #define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0) #define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1) #define FLEXONENAND(this) \ (this->device_id & DEVICE_IS_FLEXONENAND) #define ONENAND_GET_SYS_CFG1(this) \ (this->read_word(this->base + ONENAND_REG_SYS_CFG1)) #define ONENAND_SET_SYS_CFG1(v, this) \ (this->write_word(v, this->base + ONENAND_REG_SYS_CFG1)) #define ONENAND_IS_DDP(this) \ (this->device_id & ONENAND_DEVICE_IS_DDP) #define ONENAND_IS_MLC(this) \ (this->technology & ONENAND_TECHNOLOGY_IS_MLC) #ifdef CONFIG_MTD_ONENAND_2X_PROGRAM #define ONENAND_IS_2PLANE(this) \ (this->options & ONENAND_HAS_2PLANE) #else #define ONENAND_IS_2PLANE(this) (0) #endif #define ONENAND_IS_CACHE_PROGRAM(this) \ (this->options & ONENAND_HAS_CACHE_PROGRAM) #define ONENAND_IS_NOP_1(this) \ (this->options & ONENAND_HAS_NOP_1) /* Check byte access in OneNAND */ #define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) #define ONENAND_BADBLOCK_POS 0 /* * Options bits */ #define ONENAND_HAS_CONT_LOCK (0x0001) #define ONENAND_HAS_UNLOCK_ALL (0x0002) #define ONENAND_HAS_2PLANE (0x0004) #define ONENAND_HAS_4KB_PAGE (0x0008) #define ONENAND_HAS_CACHE_PROGRAM (0x0010) #define ONENAND_HAS_NOP_1 (0x0020) #define ONENAND_SKIP_UNLOCK_CHECK (0x0100) #define ONENAND_PAGEBUF_ALLOC (0x1000) #define ONENAND_OOBBUF_ALLOC (0x2000) #define ONENAND_SKIP_INITIAL_UNLOCKING (0x4000) #define ONENAND_IS_4KB_PAGE(this) \ (this->options & ONENAND_HAS_4KB_PAGE) /* * OneNAND Flash Manufacturer ID Codes */ #define ONENAND_MFR_SAMSUNG 0xec #define ONENAND_MFR_NUMONYX 0x20 /** * struct onenand_manufacturers - NAND Flash Manufacturer ID Structure * @name: Manufacturer name * @id: manufacturer ID code of device. */ struct onenand_manufacturers { int id; char *name; }; int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); unsigned onenand_block(struct onenand_chip *this, loff_t addr); loff_t onenand_addr(struct onenand_chip *this, int block); int flexonenand_region(struct mtd_info *mtd, loff_t addr); struct mtd_partition; struct onenand_platform_data { void (*mmcontrol)(struct mtd_info *mtd, int sync_read); int (*read_bufferram)(struct mtd_info *mtd, int area, unsigned char *buffer, int offset, size_t count); struct mtd_partition *parts; unsigned int nr_parts; }; #endif /* __LINUX_MTD_ONENAND_H */ PK ! �9�� � mtd/qinfo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MTD_QINFO_H #define __LINUX_MTD_QINFO_H #include <linux/mtd/map.h> #include <linux/wait.h> #include <linux/spinlock.h> #include <linux/delay.h> #include <linux/mtd/mtd.h> #include <linux/mtd/flashchip.h> #include <linux/mtd/partitions.h> /* lpddr_private describes lpddr flash chip in memory map * @ManufactId - Chip Manufacture ID * @DevId - Chip Device ID * @qinfo - pointer to qinfo records describing the chip * @numchips - number of chips including virual RWW partitions * @chipshift - Chip/partition size 2^chipshift * @chips - per-chip data structure */ struct lpddr_private { uint16_t ManufactId; uint16_t DevId; struct qinfo_chip *qinfo; int numchips; unsigned long chipshift; struct flchip chips[]; }; /* qinfo_query_info structure contains request information for * each qinfo record * @major - major number of qinfo record * @major - minor number of qinfo record * @id_str - descriptive string to access the record * @desc - detailed description for the qinfo record */ struct qinfo_query_info { uint8_t major; uint8_t minor; char *id_str; char *desc; }; /* * qinfo_chip structure contains necessary qinfo records data * @DevSizeShift - Device size 2^n bytes * @BufSizeShift - Program buffer size 2^n bytes * @TotalBlocksNum - Total number of blocks * @UniformBlockSizeShift - Uniform block size 2^UniformBlockSizeShift bytes * @HWPartsNum - Number of hardware partitions * @SuspEraseSupp - Suspend erase supported * @SingleWordProgTime - Single word program 2^SingleWordProgTime u-sec * @ProgBufferTime - Program buffer write 2^ProgBufferTime u-sec * @BlockEraseTime - Block erase 2^BlockEraseTime m-sec */ struct qinfo_chip { /* General device info */ uint16_t DevSizeShift; uint16_t BufSizeShift; /* Erase block information */ uint16_t TotalBlocksNum; uint16_t UniformBlockSizeShift; /* Partition information */ uint16_t HWPartsNum; /* Optional features */ uint16_t SuspEraseSupp; /* Operation typical time */ uint16_t SingleWordProgTime; uint16_t ProgBufferTime; uint16_t BlockEraseTime; }; /* defines for fixup usage */ #define LPDDR_MFR_ANY 0xffff #define LPDDR_ID_ANY 0xffff #define NUMONYX_MFGR_ID 0x0089 #define R18_DEVICE_ID_1G 0x893c static inline map_word lpddr_build_cmd(u_long cmd, struct map_info *map) { map_word val = { {0} }; val.x[0] = cmd; return val; } #define CMD(x) lpddr_build_cmd(x, map) #define CMDVAL(cmd) cmd.x[0] struct mtd_info *lpddr_cmdset(struct map_info *); #endif PK ! �"�� � mtd/pfow.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Primary function overlay window definitions * and service functions used by LPDDR chips */ #ifndef __LINUX_MTD_PFOW_H #define __LINUX_MTD_PFOW_H #include <linux/mtd/qinfo.h> /* PFOW registers addressing */ /* Address of symbol "P" */ #define PFOW_QUERY_STRING_P 0x0000 /* Address of symbol "F" */ #define PFOW_QUERY_STRING_F 0x0002 /* Address of symbol "O" */ #define PFOW_QUERY_STRING_O 0x0004 /* Address of symbol "W" */ #define PFOW_QUERY_STRING_W 0x0006 /* Identification info for LPDDR chip */ #define PFOW_MANUFACTURER_ID 0x0020 #define PFOW_DEVICE_ID 0x0022 /* Address in PFOW where prog buffer can be found */ #define PFOW_PROGRAM_BUFFER_OFFSET 0x0040 /* Size of program buffer in words */ #define PFOW_PROGRAM_BUFFER_SIZE 0x0042 /* Address command code register */ #define PFOW_COMMAND_CODE 0x0080 /* command data register */ #define PFOW_COMMAND_DATA 0x0084 /* command address register lower address bits */ #define PFOW_COMMAND_ADDRESS_L 0x0088 /* command address register upper address bits */ #define PFOW_COMMAND_ADDRESS_H 0x008a /* number of bytes to be proggrammed lower address bits */ #define PFOW_DATA_COUNT_L 0x0090 /* number of bytes to be proggrammed higher address bits */ #define PFOW_DATA_COUNT_H 0x0092 /* command execution register, the only possible value is 0x01 */ #define PFOW_COMMAND_EXECUTE 0x00c0 /* 0x01 should be written at this address to clear buffer */ #define PFOW_CLEAR_PROGRAM_BUFFER 0x00c4 /* device program/erase suspend register */ #define PFOW_PROGRAM_ERASE_SUSPEND 0x00c8 /* device status register */ #define PFOW_DSR 0x00cc /* LPDDR memory device command codes */ /* They are possible values of PFOW command code register */ #define LPDDR_WORD_PROGRAM 0x0041 #define LPDDR_BUFF_PROGRAM 0x00E9 #define LPDDR_BLOCK_ERASE 0x0020 #define LPDDR_LOCK_BLOCK 0x0061 #define LPDDR_UNLOCK_BLOCK 0x0062 #define LPDDR_READ_BLOCK_LOCK_STATUS 0x0065 #define LPDDR_INFO_QUERY 0x0098 #define LPDDR_READ_OTP 0x0097 #define LPDDR_PROG_OTP 0x00C0 #define LPDDR_RESUME 0x00D0 /* Defines possible value of PFOW command execution register */ #define LPDDR_START_EXECUTION 0x0001 /* Defines possible value of PFOW program/erase suspend register */ #define LPDDR_SUSPEND 0x0001 /* Possible values of PFOW device status register */ /* access R - read; RC read & clearable */ #define DSR_DPS (1<<1) /* RC; device protect status * 0 - not protected 1 - locked */ #define DSR_PSS (1<<2) /* R; program suspend status; * 0-prog in progress/completed, * 1- prog suspended */ #define DSR_VPPS (1<<3) /* RC; 0-Vpp OK, * 1-Vpp low */ #define DSR_PROGRAM_STATUS (1<<4) /* RC; 0-successful, 1-error */ #define DSR_ERASE_STATUS (1<<5) /* RC; erase or blank check status; * 0-success erase/blank check, * 1 blank check error */ #define DSR_ESS (1<<6) /* R; erase suspend status; * 0-erase in progress/complete, * 1 erase suspended */ #define DSR_READY_STATUS (1<<7) /* R; Device status * 0-busy, * 1-ready */ #define DSR_RPS (0x3<<8) /* RC; region program status * 00 - Success, * 01-re-program attempt in region with * object mode data, * 10-object mode program w attempt in * region with control mode data * 11-attempt to program invalid half * with 0x41 command */ #define DSR_AOS (1<<12) /* RC; 1- AO related failure */ #define DSR_AVAILABLE (1<<15) /* R; Device availbility * 1 - Device available * 0 - not available */ /* The superset of all possible error bits in DSR */ #define DSR_ERR 0x133A static inline void send_pfow_command(struct map_info *map, unsigned long cmd_code, unsigned long adr, unsigned long len, map_word *datum) { int bits_per_chip = map_bankwidth(map) * 8; map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE); map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)), map->pfow_base + PFOW_COMMAND_ADDRESS_L); map_write(map, CMD(adr>>bits_per_chip), map->pfow_base + PFOW_COMMAND_ADDRESS_H); if (len) { map_write(map, CMD(len & ((1<<bits_per_chip) - 1)), map->pfow_base + PFOW_DATA_COUNT_L); map_write(map, CMD(len>>bits_per_chip), map->pfow_base + PFOW_DATA_COUNT_H); } if (datum) map_write(map, *datum, map->pfow_base + PFOW_COMMAND_DATA); /* Command execution start */ map_write(map, CMD(LPDDR_START_EXECUTION), map->pfow_base + PFOW_COMMAND_EXECUTE); } #endif /* __LINUX_MTD_PFOW_H */ PK ! �s� ( ( mtd/physmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * For boards with physically mapped flash and using * drivers/mtd/maps/physmap.c mapping driver. * * Copyright (C) 2003 MontaVista Software Inc. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net */ #ifndef __LINUX_MTD_PHYSMAP__ #define __LINUX_MTD_PHYSMAP__ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> struct map_info; struct platform_device; struct physmap_flash_data { unsigned int width; int (*init)(struct platform_device *); void (*exit)(struct platform_device *); void (*set_vpp)(struct platform_device *, int); unsigned int nr_parts; unsigned int pfow_base; char *probe_type; struct mtd_partition *parts; const char * const *part_probe_types; }; #endif /* __LINUX_MTD_PHYSMAP__ */ PK ! �Q_M M mtd/hyperbus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef __LINUX_MTD_HYPERBUS_H__ #define __LINUX_MTD_HYPERBUS_H__ #include <linux/mtd/map.h> /* HyperBus command bits */ #define HYPERBUS_RW 0x80 /* R/W# */ #define HYPERBUS_RW_WRITE 0 #define HYPERBUS_RW_READ 0x80 #define HYPERBUS_AS 0x40 /* Address Space */ #define HYPERBUS_AS_MEM 0 #define HYPERBUS_AS_REG 0x40 #define HYPERBUS_BT 0x20 /* Burst Type */ #define HYPERBUS_BT_WRAPPED 0 #define HYPERBUS_BT_LINEAR 0x20 enum hyperbus_memtype { HYPERFLASH, HYPERRAM, }; /** * struct hyperbus_device - struct representing HyperBus slave device * @map: map_info struct for accessing MMIO HyperBus flash memory * @np: pointer to HyperBus slave device node * @mtd: pointer to MTD struct * @ctlr: pointer to HyperBus controller struct * @memtype: type of memory device: HyperFlash or HyperRAM * @priv: pointer to controller specific per device private data */ struct hyperbus_device { struct map_info map; struct device_node *np; struct mtd_info *mtd; struct hyperbus_ctlr *ctlr; enum hyperbus_memtype memtype; void *priv; }; /** * struct hyperbus_ops - struct representing custom HyperBus operations * @read16: read 16 bit of data from flash in a single burst. Used to read * from non default address space, such as ID/CFI space * @write16: write 16 bit of data to flash in a single burst. Used to * send cmd to flash or write single 16 bit word at a time. * @copy_from: copy data from flash memory * @copy_to: copy data to flash memory * @calibrate: calibrate HyperBus controller */ struct hyperbus_ops { u16 (*read16)(struct hyperbus_device *hbdev, unsigned long addr); void (*write16)(struct hyperbus_device *hbdev, unsigned long addr, u16 val); void (*copy_from)(struct hyperbus_device *hbdev, void *to, unsigned long from, ssize_t len); void (*copy_to)(struct hyperbus_device *dev, unsigned long to, const void *from, ssize_t len); int (*calibrate)(struct hyperbus_device *dev); }; /** * struct hyperbus_ctlr - struct representing HyperBus controller * @dev: pointer to HyperBus controller device * @calibrated: flag to indicate ctlr calibration sequence is complete * @ops: HyperBus controller ops */ struct hyperbus_ctlr { struct device *dev; bool calibrated; const struct hyperbus_ops *ops; }; /** * hyperbus_register_device - probe and register a HyperBus slave memory device * @hbdev: hyperbus_device struct with dev, np and ctlr field populated * * Return: 0 for success, others for failure. */ int hyperbus_register_device(struct hyperbus_device *hbdev); /** * hyperbus_unregister_device - deregister HyperBus slave memory device * @hbdev: hyperbus_device to be unregistered */ void hyperbus_unregister_device(struct hyperbus_device *hbdev); #endif /* __LINUX_MTD_HYPERBUS_H__ */ PK ! h.�~q q mtd/jedec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> * Steven J. Hill <sjhill@realitydiluted.com> * Thomas Gleixner <tglx@linutronix.de> * * Contains all JEDEC related definitions */ #ifndef __LINUX_MTD_JEDEC_H #define __LINUX_MTD_JEDEC_H struct jedec_ecc_info { u8 ecc_bits; u8 codeword_size; __le16 bb_per_lun; __le16 block_endurance; u8 reserved[2]; } __packed; /* JEDEC features */ #define JEDEC_FEATURE_16_BIT_BUS (1 << 0) struct nand_jedec_params { /* rev info and features block */ /* 'J' 'E' 'S' 'D' */ u8 sig[4]; __le16 revision; __le16 features; u8 opt_cmd[3]; __le16 sec_cmd; u8 num_of_param_pages; u8 reserved0[18]; /* manufacturer information block */ char manufacturer[12]; char model[20]; u8 jedec_id[6]; u8 reserved1[10]; /* memory organization block */ __le32 byte_per_page; __le16 spare_bytes_per_page; u8 reserved2[6]; __le32 pages_per_block; __le32 blocks_per_lun; u8 lun_count; u8 addr_cycles; u8 bits_per_cell; u8 programs_per_page; u8 multi_plane_addr; u8 multi_plane_op_attr; u8 reserved3[38]; /* electrical parameter block */ __le16 async_sdr_speed_grade; __le16 toggle_ddr_speed_grade; __le16 sync_ddr_speed_grade; u8 async_sdr_features; u8 toggle_ddr_features; u8 sync_ddr_features; __le16 t_prog; __le16 t_bers; __le16 t_r; __le16 t_r_multi_plane; __le16 t_ccs; __le16 io_pin_capacitance_typ; __le16 input_pin_capacitance_typ; __le16 clk_pin_capacitance_typ; u8 driver_strength_support; __le16 t_adl; u8 reserved4[36]; /* ECC and endurance block */ u8 guaranteed_good_blocks; __le16 guaranteed_block_endurance; struct jedec_ecc_info ecc_info[4]; u8 reserved5[29]; /* reserved */ u8 reserved6[148]; /* vendor */ __le16 vendor_rev_num; u8 reserved7[88]; /* CRC for Parameter Page */ __le16 crc; } __packed; #endif /* __LINUX_MTD_JEDEC_H */ PK ! z��b b mtd/onfi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> * Steven J. Hill <sjhill@realitydiluted.com> * Thomas Gleixner <tglx@linutronix.de> * * Contains all ONFI related definitions */ #ifndef __LINUX_MTD_ONFI_H #define __LINUX_MTD_ONFI_H #include <linux/types.h> #include <linux/bitfield.h> /* ONFI version bits */ #define ONFI_VERSION_1_0 BIT(1) #define ONFI_VERSION_2_0 BIT(2) #define ONFI_VERSION_2_1 BIT(3) #define ONFI_VERSION_2_2 BIT(4) #define ONFI_VERSION_2_3 BIT(5) #define ONFI_VERSION_3_0 BIT(6) #define ONFI_VERSION_3_1 BIT(7) #define ONFI_VERSION_3_2 BIT(8) #define ONFI_VERSION_4_0 BIT(9) /* ONFI features */ #define ONFI_FEATURE_16_BIT_BUS BIT(0) #define ONFI_FEATURE_NV_DDR BIT(5) #define ONFI_FEATURE_EXT_PARAM_PAGE BIT(7) /* ONFI timing mode, used in both asynchronous and synchronous mode */ #define ONFI_DATA_INTERFACE_SDR 0 #define ONFI_DATA_INTERFACE_NVDDR BIT(4) #define ONFI_DATA_INTERFACE_NVDDR2 BIT(5) #define ONFI_TIMING_MODE_0 BIT(0) #define ONFI_TIMING_MODE_1 BIT(1) #define ONFI_TIMING_MODE_2 BIT(2) #define ONFI_TIMING_MODE_3 BIT(3) #define ONFI_TIMING_MODE_4 BIT(4) #define ONFI_TIMING_MODE_5 BIT(5) #define ONFI_TIMING_MODE_UNKNOWN BIT(6) #define ONFI_TIMING_MODE_PARAM(x) FIELD_GET(GENMASK(3, 0), (x)) /* ONFI feature number/address */ #define ONFI_FEATURE_NUMBER 256 #define ONFI_FEATURE_ADDR_TIMING_MODE 0x1 /* Vendor-specific feature address (Micron) */ #define ONFI_FEATURE_ADDR_READ_RETRY 0x89 #define ONFI_FEATURE_ON_DIE_ECC 0x90 #define ONFI_FEATURE_ON_DIE_ECC_EN BIT(3) /* ONFI subfeature parameters length */ #define ONFI_SUBFEATURE_PARAM_LEN 4 /* ONFI optional commands SET/GET FEATURES supported? */ #define ONFI_OPT_CMD_SET_GET_FEATURES BIT(2) struct nand_onfi_params { /* rev info and features block */ /* 'O' 'N' 'F' 'I' */ u8 sig[4]; __le16 revision; __le16 features; __le16 opt_cmd; u8 reserved0[2]; __le16 ext_param_page_length; /* since ONFI 2.1 */ u8 num_of_param_pages; /* since ONFI 2.1 */ u8 reserved1[17]; /* manufacturer information block */ char manufacturer[12]; char model[20]; u8 jedec_id; __le16 date_code; u8 reserved2[13]; /* memory organization block */ __le32 byte_per_page; __le16 spare_bytes_per_page; __le32 data_bytes_per_ppage; __le16 spare_bytes_per_ppage; __le32 pages_per_block; __le32 blocks_per_lun; u8 lun_count; u8 addr_cycles; u8 bits_per_cell; __le16 bb_per_lun; __le16 block_endurance; u8 guaranteed_good_blocks; __le16 guaranteed_block_endurance; u8 programs_per_page; u8 ppage_attr; u8 ecc_bits; u8 interleaved_bits; u8 interleaved_ops; u8 reserved3[13]; /* electrical parameter block */ u8 io_pin_capacitance_max; __le16 sdr_timing_modes; __le16 program_cache_timing_mode; __le16 t_prog; __le16 t_bers; __le16 t_r; __le16 t_ccs; u8 nvddr_timing_modes; u8 nvddr2_timing_modes; u8 nvddr_nvddr2_features; __le16 clk_pin_capacitance_typ; __le16 io_pin_capacitance_typ; __le16 input_pin_capacitance_typ; u8 input_pin_capacitance_max; u8 driver_strength_support; __le16 t_int_r; __le16 t_adl; u8 reserved4[8]; /* vendor */ __le16 vendor_revision; u8 vendor[88]; __le16 crc; } __packed; #define ONFI_CRC_BASE 0x4F4E /* Extended ECC information Block Definition (since ONFI 2.1) */ struct onfi_ext_ecc_info { u8 ecc_bits; u8 codeword_size; __le16 bb_per_lun; __le16 block_endurance; u8 reserved[2]; } __packed; #define ONFI_SECTION_TYPE_0 0 /* Unused section. */ #define ONFI_SECTION_TYPE_1 1 /* for additional sections. */ #define ONFI_SECTION_TYPE_2 2 /* for ECC information. */ struct onfi_ext_section { u8 type; u8 length; } __packed; #define ONFI_EXT_SECTION_MAX 8 /* Extended Parameter Page Definition (since ONFI 2.1) */ struct onfi_ext_param_page { __le16 crc; u8 sig[4]; /* 'E' 'P' 'P' 'S' */ u8 reserved0[10]; struct onfi_ext_section sections[ONFI_EXT_SECTION_MAX]; /* * The actual size of the Extended Parameter Page is in * @ext_param_page_length of nand_onfi_params{}. * The following are the variable length sections. * So we do not add any fields below. Please see the ONFI spec. */ } __packed; /** * struct onfi_params - ONFI specific parameters that will be reused * @version: ONFI version (BCD encoded), 0 if ONFI is not supported * @tPROG: Page program time * @tBERS: Block erase time * @tR: Page read time * @tCCS: Change column setup time * @fast_tCAD: Command/Address/Data slow or fast delay (NV-DDR only) * @sdr_timing_modes: Supported asynchronous/SDR timing modes * @nvddr_timing_modes: Supported source synchronous/NV-DDR timing modes * @vendor_revision: Vendor specific revision number * @vendor: Vendor specific data */ struct onfi_params { int version; u16 tPROG; u16 tBERS; u16 tR; u16 tCCS; bool fast_tCAD; u16 sdr_timing_modes; u16 nvddr_timing_modes; u16 vendor_revision; u8 vendor[88]; }; #endif /* __LINUX_MTD_ONFI_H */ PK ! b���Lv Lv mtd/nand.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright 2017 - Free Electrons * * Authors: * Boris Brezillon <boris.brezillon@free-electrons.com> * Peter Pan <peterpandong@micron.com> */ #ifndef __LINUX_MTD_NAND_H #define __LINUX_MTD_NAND_H #include <linux/mtd/mtd.h> struct nand_device; /** * struct nand_memory_organization - Memory organization structure * @bits_per_cell: number of bits per NAND cell * @pagesize: page size * @oobsize: OOB area size * @pages_per_eraseblock: number of pages per eraseblock * @eraseblocks_per_lun: number of eraseblocks per LUN (Logical Unit Number) * @max_bad_eraseblocks_per_lun: maximum number of eraseblocks per LUN * @planes_per_lun: number of planes per LUN * @luns_per_target: number of LUN per target (target is a synonym for die) * @ntargets: total number of targets exposed by the NAND device */ struct nand_memory_organization { unsigned int bits_per_cell; unsigned int pagesize; unsigned int oobsize; unsigned int pages_per_eraseblock; unsigned int eraseblocks_per_lun; unsigned int max_bad_eraseblocks_per_lun; unsigned int planes_per_lun; unsigned int luns_per_target; unsigned int ntargets; }; #define NAND_MEMORG(bpc, ps, os, ppe, epl, mbb, ppl, lpt, nt) \ { \ .bits_per_cell = (bpc), \ .pagesize = (ps), \ .oobsize = (os), \ .pages_per_eraseblock = (ppe), \ .eraseblocks_per_lun = (epl), \ .max_bad_eraseblocks_per_lun = (mbb), \ .planes_per_lun = (ppl), \ .luns_per_target = (lpt), \ .ntargets = (nt), \ } /** * struct nand_row_converter - Information needed to convert an absolute offset * into a row address * @lun_addr_shift: position of the LUN identifier in the row address * @eraseblock_addr_shift: position of the eraseblock identifier in the row * address */ struct nand_row_converter { unsigned int lun_addr_shift; unsigned int eraseblock_addr_shift; }; /** * struct nand_pos - NAND position object * @target: the NAND target/die * @lun: the LUN identifier * @plane: the plane within the LUN * @eraseblock: the eraseblock within the LUN * @page: the page within the LUN * * These information are usually used by specific sub-layers to select the * appropriate target/die and generate a row address to pass to the device. */ struct nand_pos { unsigned int target; unsigned int lun; unsigned int plane; unsigned int eraseblock; unsigned int page; }; /** * enum nand_page_io_req_type - Direction of an I/O request * @NAND_PAGE_READ: from the chip, to the controller * @NAND_PAGE_WRITE: from the controller, to the chip */ enum nand_page_io_req_type { NAND_PAGE_READ = 0, NAND_PAGE_WRITE, }; /** * struct nand_page_io_req - NAND I/O request object * @type: the type of page I/O: read or write * @pos: the position this I/O request is targeting * @dataoffs: the offset within the page * @datalen: number of data bytes to read from/write to this page * @databuf: buffer to store data in or get data from * @ooboffs: the OOB offset within the page * @ooblen: the number of OOB bytes to read from/write to this page * @oobbuf: buffer to store OOB data in or get OOB data from * @mode: one of the %MTD_OPS_XXX mode * * This object is used to pass per-page I/O requests to NAND sub-layers. This * way all useful information are already formatted in a useful way and * specific NAND layers can focus on translating these information into * specific commands/operations. */ struct nand_page_io_req { enum nand_page_io_req_type type; struct nand_pos pos; unsigned int dataoffs; unsigned int datalen; union { const void *out; void *in; } databuf; unsigned int ooboffs; unsigned int ooblen; union { const void *out; void *in; } oobbuf; int mode; }; const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void); const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void); const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void); /** * enum nand_ecc_engine_type - NAND ECC engine type * @NAND_ECC_ENGINE_TYPE_INVALID: Invalid value * @NAND_ECC_ENGINE_TYPE_NONE: No ECC correction * @NAND_ECC_ENGINE_TYPE_SOFT: Software ECC correction * @NAND_ECC_ENGINE_TYPE_ON_HOST: On host hardware ECC correction * @NAND_ECC_ENGINE_TYPE_ON_DIE: On chip hardware ECC correction */ enum nand_ecc_engine_type { NAND_ECC_ENGINE_TYPE_INVALID, NAND_ECC_ENGINE_TYPE_NONE, NAND_ECC_ENGINE_TYPE_SOFT, NAND_ECC_ENGINE_TYPE_ON_HOST, NAND_ECC_ENGINE_TYPE_ON_DIE, }; /** * enum nand_ecc_placement - NAND ECC bytes placement * @NAND_ECC_PLACEMENT_UNKNOWN: The actual position of the ECC bytes is unknown * @NAND_ECC_PLACEMENT_OOB: The ECC bytes are located in the OOB area * @NAND_ECC_PLACEMENT_INTERLEAVED: Syndrome layout, there are ECC bytes * interleaved with regular data in the main * area */ enum nand_ecc_placement { NAND_ECC_PLACEMENT_UNKNOWN, NAND_ECC_PLACEMENT_OOB, NAND_ECC_PLACEMENT_INTERLEAVED, }; /** * enum nand_ecc_algo - NAND ECC algorithm * @NAND_ECC_ALGO_UNKNOWN: Unknown algorithm * @NAND_ECC_ALGO_HAMMING: Hamming algorithm * @NAND_ECC_ALGO_BCH: Bose-Chaudhuri-Hocquenghem algorithm * @NAND_ECC_ALGO_RS: Reed-Solomon algorithm */ enum nand_ecc_algo { NAND_ECC_ALGO_UNKNOWN, NAND_ECC_ALGO_HAMMING, NAND_ECC_ALGO_BCH, NAND_ECC_ALGO_RS, }; /** * struct nand_ecc_props - NAND ECC properties * @engine_type: ECC engine type * @placement: OOB placement (if relevant) * @algo: ECC algorithm (if relevant) * @strength: ECC strength * @step_size: Number of bytes per step * @flags: Misc properties */ struct nand_ecc_props { enum nand_ecc_engine_type engine_type; enum nand_ecc_placement placement; enum nand_ecc_algo algo; unsigned int strength; unsigned int step_size; unsigned int flags; }; #define NAND_ECCREQ(str, stp) { .strength = (str), .step_size = (stp) } /* NAND ECC misc flags */ #define NAND_ECC_MAXIMIZE_STRENGTH BIT(0) /** * struct nand_bbt - bad block table object * @cache: in memory BBT cache */ struct nand_bbt { unsigned long *cache; }; /** * struct nand_ops - NAND operations * @erase: erase a specific block. No need to check if the block is bad before * erasing, this has been taken care of by the generic NAND layer * @markbad: mark a specific block bad. No need to check if the block is * already marked bad, this has been taken care of by the generic * NAND layer. This method should just write the BBM (Bad Block * Marker) so that future call to struct_nand_ops->isbad() return * true * @isbad: check whether a block is bad or not. This method should just read * the BBM and return whether the block is bad or not based on what it * reads * * These are all low level operations that should be implemented by specialized * NAND layers (SPI NAND, raw NAND, ...). */ struct nand_ops { int (*erase)(struct nand_device *nand, const struct nand_pos *pos); int (*markbad)(struct nand_device *nand, const struct nand_pos *pos); bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos); }; /** * struct nand_ecc_context - Context for the ECC engine * @conf: basic ECC engine parameters * @nsteps: number of ECC steps * @total: total number of bytes used for storing ECC codes, this is used by * generic OOB layouts * @priv: ECC engine driver private data */ struct nand_ecc_context { struct nand_ecc_props conf; unsigned int nsteps; unsigned int total; void *priv; }; /** * struct nand_ecc_engine_ops - ECC engine operations * @init_ctx: given a desired user configuration for the pointed NAND device, * requests the ECC engine driver to setup a configuration with * values it supports. * @cleanup_ctx: clean the context initialized by @init_ctx. * @prepare_io_req: is called before reading/writing a page to prepare the I/O * request to be performed with ECC correction. * @finish_io_req: is called after reading/writing a page to terminate the I/O * request and ensure proper ECC correction. */ struct nand_ecc_engine_ops { int (*init_ctx)(struct nand_device *nand); void (*cleanup_ctx)(struct nand_device *nand); int (*prepare_io_req)(struct nand_device *nand, struct nand_page_io_req *req); int (*finish_io_req)(struct nand_device *nand, struct nand_page_io_req *req); }; /** * struct nand_ecc_engine - ECC engine abstraction for NAND devices * @ops: ECC engine operations */ struct nand_ecc_engine { struct nand_ecc_engine_ops *ops; }; void of_get_nand_ecc_user_config(struct nand_device *nand); int nand_ecc_init_ctx(struct nand_device *nand); void nand_ecc_cleanup_ctx(struct nand_device *nand); int nand_ecc_prepare_io_req(struct nand_device *nand, struct nand_page_io_req *req); int nand_ecc_finish_io_req(struct nand_device *nand, struct nand_page_io_req *req); bool nand_ecc_is_strong_enough(struct nand_device *nand); struct nand_ecc_engine *nand_ecc_get_sw_engine(struct nand_device *nand); struct nand_ecc_engine *nand_ecc_get_on_die_hw_engine(struct nand_device *nand); #if IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING) struct nand_ecc_engine *nand_ecc_sw_hamming_get_engine(void); #else static inline struct nand_ecc_engine *nand_ecc_sw_hamming_get_engine(void) { return NULL; } #endif /* CONFIG_MTD_NAND_ECC_SW_HAMMING */ #if IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_BCH) struct nand_ecc_engine *nand_ecc_sw_bch_get_engine(void); #else static inline struct nand_ecc_engine *nand_ecc_sw_bch_get_engine(void) { return NULL; } #endif /* CONFIG_MTD_NAND_ECC_SW_BCH */ /** * struct nand_ecc_req_tweak_ctx - Help for automatically tweaking requests * @orig_req: Pointer to the original IO request * @nand: Related NAND device, to have access to its memory organization * @page_buffer_size: Real size of the page buffer to use (can be set by the * user before the tweaking mechanism initialization) * @oob_buffer_size: Real size of the OOB buffer to use (can be set by the * user before the tweaking mechanism initialization) * @spare_databuf: Data bounce buffer * @spare_oobbuf: OOB bounce buffer * @bounce_data: Flag indicating a data bounce buffer is used * @bounce_oob: Flag indicating an OOB bounce buffer is used */ struct nand_ecc_req_tweak_ctx { struct nand_page_io_req orig_req; struct nand_device *nand; unsigned int page_buffer_size; unsigned int oob_buffer_size; void *spare_databuf; void *spare_oobbuf; bool bounce_data; bool bounce_oob; }; int nand_ecc_init_req_tweaking(struct nand_ecc_req_tweak_ctx *ctx, struct nand_device *nand); void nand_ecc_cleanup_req_tweaking(struct nand_ecc_req_tweak_ctx *ctx); void nand_ecc_tweak_req(struct nand_ecc_req_tweak_ctx *ctx, struct nand_page_io_req *req); void nand_ecc_restore_req(struct nand_ecc_req_tweak_ctx *ctx, struct nand_page_io_req *req); /** * struct nand_ecc - Information relative to the ECC * @defaults: Default values, depend on the underlying subsystem * @requirements: ECC requirements from the NAND chip perspective * @user_conf: User desires in terms of ECC parameters * @ctx: ECC context for the ECC engine, derived from the device @requirements * the @user_conf and the @defaults * @ondie_engine: On-die ECC engine reference, if any * @engine: ECC engine actually bound */ struct nand_ecc { struct nand_ecc_props defaults; struct nand_ecc_props requirements; struct nand_ecc_props user_conf; struct nand_ecc_context ctx; struct nand_ecc_engine *ondie_engine; struct nand_ecc_engine *engine; }; /** * struct nand_device - NAND device * @mtd: MTD instance attached to the NAND device * @memorg: memory layout * @ecc: NAND ECC object attached to the NAND device * @rowconv: position to row address converter * @bbt: bad block table info * @ops: NAND operations attached to the NAND device * * Generic NAND object. Specialized NAND layers (raw NAND, SPI NAND, OneNAND) * should declare their own NAND object embedding a nand_device struct (that's * how inheritance is done). * struct_nand_device->memorg and struct_nand_device->ecc.requirements should * be filled at device detection time to reflect the NAND device * capabilities/requirements. Once this is done nanddev_init() can be called. * It will take care of converting NAND information into MTD ones, which means * the specialized NAND layers should never manually tweak * struct_nand_device->mtd except for the ->_read/write() hooks. */ struct nand_device { struct mtd_info mtd; struct nand_memory_organization memorg; struct nand_ecc ecc; struct nand_row_converter rowconv; struct nand_bbt bbt; const struct nand_ops *ops; }; /** * struct nand_io_iter - NAND I/O iterator * @req: current I/O request * @oobbytes_per_page: maximum number of OOB bytes per page * @dataleft: remaining number of data bytes to read/write * @oobleft: remaining number of OOB bytes to read/write * * Can be used by specialized NAND layers to iterate over all pages covered * by an MTD I/O request, which should greatly simplifies the boiler-plate * code needed to read/write data from/to a NAND device. */ struct nand_io_iter { struct nand_page_io_req req; unsigned int oobbytes_per_page; unsigned int dataleft; unsigned int oobleft; }; /** * mtd_to_nanddev() - Get the NAND device attached to the MTD instance * @mtd: MTD instance * * Return: the NAND device embedding @mtd. */ static inline struct nand_device *mtd_to_nanddev(struct mtd_info *mtd) { return container_of(mtd, struct nand_device, mtd); } /** * nanddev_to_mtd() - Get the MTD device attached to a NAND device * @nand: NAND device * * Return: the MTD device embedded in @nand. */ static inline struct mtd_info *nanddev_to_mtd(struct nand_device *nand) { return &nand->mtd; } /* * nanddev_bits_per_cell() - Get the number of bits per cell * @nand: NAND device * * Return: the number of bits per cell. */ static inline unsigned int nanddev_bits_per_cell(const struct nand_device *nand) { return nand->memorg.bits_per_cell; } /** * nanddev_page_size() - Get NAND page size * @nand: NAND device * * Return: the page size. */ static inline size_t nanddev_page_size(const struct nand_device *nand) { return nand->memorg.pagesize; } /** * nanddev_per_page_oobsize() - Get NAND OOB size * @nand: NAND device * * Return: the OOB size. */ static inline unsigned int nanddev_per_page_oobsize(const struct nand_device *nand) { return nand->memorg.oobsize; } /** * nanddev_pages_per_eraseblock() - Get the number of pages per eraseblock * @nand: NAND device * * Return: the number of pages per eraseblock. */ static inline unsigned int nanddev_pages_per_eraseblock(const struct nand_device *nand) { return nand->memorg.pages_per_eraseblock; } /** * nanddev_pages_per_target() - Get the number of pages per target * @nand: NAND device * * Return: the number of pages per target. */ static inline unsigned int nanddev_pages_per_target(const struct nand_device *nand) { return nand->memorg.pages_per_eraseblock * nand->memorg.eraseblocks_per_lun * nand->memorg.luns_per_target; } /** * nanddev_per_page_oobsize() - Get NAND erase block size * @nand: NAND device * * Return: the eraseblock size. */ static inline size_t nanddev_eraseblock_size(const struct nand_device *nand) { return nand->memorg.pagesize * nand->memorg.pages_per_eraseblock; } /** * nanddev_eraseblocks_per_lun() - Get the number of eraseblocks per LUN * @nand: NAND device * * Return: the number of eraseblocks per LUN. */ static inline unsigned int nanddev_eraseblocks_per_lun(const struct nand_device *nand) { return nand->memorg.eraseblocks_per_lun; } /** * nanddev_eraseblocks_per_target() - Get the number of eraseblocks per target * @nand: NAND device * * Return: the number of eraseblocks per target. */ static inline unsigned int nanddev_eraseblocks_per_target(const struct nand_device *nand) { return nand->memorg.eraseblocks_per_lun * nand->memorg.luns_per_target; } /** * nanddev_target_size() - Get the total size provided by a single target/die * @nand: NAND device * * Return: the total size exposed by a single target/die in bytes. */ static inline u64 nanddev_target_size(const struct nand_device *nand) { return (u64)nand->memorg.luns_per_target * nand->memorg.eraseblocks_per_lun * nand->memorg.pages_per_eraseblock * nand->memorg.pagesize; } /** * nanddev_ntarget() - Get the total of targets * @nand: NAND device * * Return: the number of targets/dies exposed by @nand. */ static inline unsigned int nanddev_ntargets(const struct nand_device *nand) { return nand->memorg.ntargets; } /** * nanddev_neraseblocks() - Get the total number of eraseblocks * @nand: NAND device * * Return: the total number of eraseblocks exposed by @nand. */ static inline unsigned int nanddev_neraseblocks(const struct nand_device *nand) { return nand->memorg.ntargets * nand->memorg.luns_per_target * nand->memorg.eraseblocks_per_lun; } /** * nanddev_size() - Get NAND size * @nand: NAND device * * Return: the total size (in bytes) exposed by @nand. */ static inline u64 nanddev_size(const struct nand_device *nand) { return nanddev_target_size(nand) * nanddev_ntargets(nand); } /** * nanddev_get_memorg() - Extract memory organization info from a NAND device * @nand: NAND device * * This can be used by the upper layer to fill the memorg info before calling * nanddev_init(). * * Return: the memorg object embedded in the NAND device. */ static inline struct nand_memory_organization * nanddev_get_memorg(struct nand_device *nand) { return &nand->memorg; } /** * nanddev_get_ecc_conf() - Extract the ECC configuration from a NAND device * @nand: NAND device */ static inline const struct nand_ecc_props * nanddev_get_ecc_conf(struct nand_device *nand) { return &nand->ecc.ctx.conf; } /** * nanddev_get_ecc_nsteps() - Extract the number of ECC steps * @nand: NAND device */ static inline unsigned int nanddev_get_ecc_nsteps(struct nand_device *nand) { return nand->ecc.ctx.nsteps; } /** * nanddev_get_ecc_bytes_per_step() - Extract the number of ECC bytes per step * @nand: NAND device */ static inline unsigned int nanddev_get_ecc_bytes_per_step(struct nand_device *nand) { return nand->ecc.ctx.total / nand->ecc.ctx.nsteps; } /** * nanddev_get_ecc_requirements() - Extract the ECC requirements from a NAND * device * @nand: NAND device */ static inline const struct nand_ecc_props * nanddev_get_ecc_requirements(struct nand_device *nand) { return &nand->ecc.requirements; } /** * nanddev_set_ecc_requirements() - Assign the ECC requirements of a NAND * device * @nand: NAND device * @reqs: Requirements */ static inline void nanddev_set_ecc_requirements(struct nand_device *nand, const struct nand_ecc_props *reqs) { nand->ecc.requirements = *reqs; } int nanddev_init(struct nand_device *nand, const struct nand_ops *ops, struct module *owner); void nanddev_cleanup(struct nand_device *nand); /** * nanddev_register() - Register a NAND device * @nand: NAND device * * Register a NAND device. * This function is just a wrapper around mtd_device_register() * registering the MTD device embedded in @nand. * * Return: 0 in case of success, a negative error code otherwise. */ static inline int nanddev_register(struct nand_device *nand) { return mtd_device_register(&nand->mtd, NULL, 0); } /** * nanddev_unregister() - Unregister a NAND device * @nand: NAND device * * Unregister a NAND device. * This function is just a wrapper around mtd_device_unregister() * unregistering the MTD device embedded in @nand. * * Return: 0 in case of success, a negative error code otherwise. */ static inline int nanddev_unregister(struct nand_device *nand) { return mtd_device_unregister(&nand->mtd); } /** * nanddev_set_of_node() - Attach a DT node to a NAND device * @nand: NAND device * @np: DT node * * Attach a DT node to a NAND device. */ static inline void nanddev_set_of_node(struct nand_device *nand, struct device_node *np) { mtd_set_of_node(&nand->mtd, np); } /** * nanddev_get_of_node() - Retrieve the DT node attached to a NAND device * @nand: NAND device * * Return: the DT node attached to @nand. */ static inline struct device_node *nanddev_get_of_node(struct nand_device *nand) { return mtd_get_of_node(&nand->mtd); } /** * nanddev_offs_to_pos() - Convert an absolute NAND offset into a NAND position * @nand: NAND device * @offs: absolute NAND offset (usually passed by the MTD layer) * @pos: a NAND position object to fill in * * Converts @offs into a nand_pos representation. * * Return: the offset within the NAND page pointed by @pos. */ static inline unsigned int nanddev_offs_to_pos(struct nand_device *nand, loff_t offs, struct nand_pos *pos) { unsigned int pageoffs; u64 tmp = offs; pageoffs = do_div(tmp, nand->memorg.pagesize); pos->page = do_div(tmp, nand->memorg.pages_per_eraseblock); pos->eraseblock = do_div(tmp, nand->memorg.eraseblocks_per_lun); pos->plane = pos->eraseblock % nand->memorg.planes_per_lun; pos->lun = do_div(tmp, nand->memorg.luns_per_target); pos->target = tmp; return pageoffs; } /** * nanddev_pos_cmp() - Compare two NAND positions * @a: First NAND position * @b: Second NAND position * * Compares two NAND positions. * * Return: -1 if @a < @b, 0 if @a == @b and 1 if @a > @b. */ static inline int nanddev_pos_cmp(const struct nand_pos *a, const struct nand_pos *b) { if (a->target != b->target) return a->target < b->target ? -1 : 1; if (a->lun != b->lun) return a->lun < b->lun ? -1 : 1; if (a->eraseblock != b->eraseblock) return a->eraseblock < b->eraseblock ? -1 : 1; if (a->page != b->page) return a->page < b->page ? -1 : 1; return 0; } /** * nanddev_pos_to_offs() - Convert a NAND position into an absolute offset * @nand: NAND device * @pos: the NAND position to convert * * Converts @pos NAND position into an absolute offset. * * Return: the absolute offset. Note that @pos points to the beginning of a * page, if one wants to point to a specific offset within this page * the returned offset has to be adjusted manually. */ static inline loff_t nanddev_pos_to_offs(struct nand_device *nand, const struct nand_pos *pos) { unsigned int npages; npages = pos->page + ((pos->eraseblock + (pos->lun + (pos->target * nand->memorg.luns_per_target)) * nand->memorg.eraseblocks_per_lun) * nand->memorg.pages_per_eraseblock); return (loff_t)npages * nand->memorg.pagesize; } /** * nanddev_pos_to_row() - Extract a row address from a NAND position * @nand: NAND device * @pos: the position to convert * * Converts a NAND position into a row address that can then be passed to the * device. * * Return: the row address extracted from @pos. */ static inline unsigned int nanddev_pos_to_row(struct nand_device *nand, const struct nand_pos *pos) { return (pos->lun << nand->rowconv.lun_addr_shift) | (pos->eraseblock << nand->rowconv.eraseblock_addr_shift) | pos->page; } /** * nanddev_pos_next_target() - Move a position to the next target/die * @nand: NAND device * @pos: the position to update * * Updates @pos to point to the start of the next target/die. Useful when you * want to iterate over all targets/dies of a NAND device. */ static inline void nanddev_pos_next_target(struct nand_device *nand, struct nand_pos *pos) { pos->page = 0; pos->plane = 0; pos->eraseblock = 0; pos->lun = 0; pos->target++; } /** * nanddev_pos_next_lun() - Move a position to the next LUN * @nand: NAND device * @pos: the position to update * * Updates @pos to point to the start of the next LUN. Useful when you want to * iterate over all LUNs of a NAND device. */ static inline void nanddev_pos_next_lun(struct nand_device *nand, struct nand_pos *pos) { if (pos->lun >= nand->memorg.luns_per_target - 1) return nanddev_pos_next_target(nand, pos); pos->lun++; pos->page = 0; pos->plane = 0; pos->eraseblock = 0; } /** * nanddev_pos_next_eraseblock() - Move a position to the next eraseblock * @nand: NAND device * @pos: the position to update * * Updates @pos to point to the start of the next eraseblock. Useful when you * want to iterate over all eraseblocks of a NAND device. */ static inline void nanddev_pos_next_eraseblock(struct nand_device *nand, struct nand_pos *pos) { if (pos->eraseblock >= nand->memorg.eraseblocks_per_lun - 1) return nanddev_pos_next_lun(nand, pos); pos->eraseblock++; pos->page = 0; pos->plane = pos->eraseblock % nand->memorg.planes_per_lun; } /** * nanddev_pos_next_page() - Move a position to the next page * @nand: NAND device * @pos: the position to update * * Updates @pos to point to the start of the next page. Useful when you want to * iterate over all pages of a NAND device. */ static inline void nanddev_pos_next_page(struct nand_device *nand, struct nand_pos *pos) { if (pos->page >= nand->memorg.pages_per_eraseblock - 1) return nanddev_pos_next_eraseblock(nand, pos); pos->page++; } /** * nand_io_iter_init - Initialize a NAND I/O iterator * @nand: NAND device * @offs: absolute offset * @req: MTD request * @iter: NAND I/O iterator * * Initializes a NAND iterator based on the information passed by the MTD * layer. */ static inline void nanddev_io_iter_init(struct nand_device *nand, enum nand_page_io_req_type reqtype, loff_t offs, struct mtd_oob_ops *req, struct nand_io_iter *iter) { struct mtd_info *mtd = nanddev_to_mtd(nand); iter->req.type = reqtype; iter->req.mode = req->mode; iter->req.dataoffs = nanddev_offs_to_pos(nand, offs, &iter->req.pos); iter->req.ooboffs = req->ooboffs; iter->oobbytes_per_page = mtd_oobavail(mtd, req); iter->dataleft = req->len; iter->oobleft = req->ooblen; iter->req.databuf.in = req->datbuf; iter->req.datalen = min_t(unsigned int, nand->memorg.pagesize - iter->req.dataoffs, iter->dataleft); iter->req.oobbuf.in = req->oobbuf; iter->req.ooblen = min_t(unsigned int, iter->oobbytes_per_page - iter->req.ooboffs, iter->oobleft); } /** * nand_io_iter_next_page - Move to the next page * @nand: NAND device * @iter: NAND I/O iterator * * Updates the @iter to point to the next page. */ static inline void nanddev_io_iter_next_page(struct nand_device *nand, struct nand_io_iter *iter) { nanddev_pos_next_page(nand, &iter->req.pos); iter->dataleft -= iter->req.datalen; iter->req.databuf.in += iter->req.datalen; iter->oobleft -= iter->req.ooblen; iter->req.oobbuf.in += iter->req.ooblen; iter->req.dataoffs = 0; iter->req.ooboffs = 0; iter->req.datalen = min_t(unsigned int, nand->memorg.pagesize, iter->dataleft); iter->req.ooblen = min_t(unsigned int, iter->oobbytes_per_page, iter->oobleft); } /** * nand_io_iter_end - Should end iteration or not * @nand: NAND device * @iter: NAND I/O iterator * * Check whether @iter has reached the end of the NAND portion it was asked to * iterate on or not. * * Return: true if @iter has reached the end of the iteration request, false * otherwise. */ static inline bool nanddev_io_iter_end(struct nand_device *nand, const struct nand_io_iter *iter) { if (iter->dataleft || iter->oobleft) return false; return true; } /** * nand_io_for_each_page - Iterate over all NAND pages contained in an MTD I/O * request * @nand: NAND device * @start: start address to read/write from * @req: MTD I/O request * @iter: NAND I/O iterator * * Should be used for iterate over pages that are contained in an MTD request. */ #define nanddev_io_for_each_page(nand, type, start, req, iter) \ for (nanddev_io_iter_init(nand, type, start, req, iter); \ !nanddev_io_iter_end(nand, iter); \ nanddev_io_iter_next_page(nand, iter)) bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos); bool nanddev_isreserved(struct nand_device *nand, const struct nand_pos *pos); int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos); int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos); /* ECC related functions */ int nanddev_ecc_engine_init(struct nand_device *nand); void nanddev_ecc_engine_cleanup(struct nand_device *nand); /* BBT related functions */ enum nand_bbt_block_status { NAND_BBT_BLOCK_STATUS_UNKNOWN, NAND_BBT_BLOCK_GOOD, NAND_BBT_BLOCK_WORN, NAND_BBT_BLOCK_RESERVED, NAND_BBT_BLOCK_FACTORY_BAD, NAND_BBT_BLOCK_NUM_STATUS, }; int nanddev_bbt_init(struct nand_device *nand); void nanddev_bbt_cleanup(struct nand_device *nand); int nanddev_bbt_update(struct nand_device *nand); int nanddev_bbt_get_block_status(const struct nand_device *nand, unsigned int entry); int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry, enum nand_bbt_block_status status); int nanddev_bbt_markbad(struct nand_device *nand, unsigned int block); /** * nanddev_bbt_pos_to_entry() - Convert a NAND position into a BBT entry * @nand: NAND device * @pos: the NAND position we want to get BBT entry for * * Return the BBT entry used to store information about the eraseblock pointed * by @pos. * * Return: the BBT entry storing information about eraseblock pointed by @pos. */ static inline unsigned int nanddev_bbt_pos_to_entry(struct nand_device *nand, const struct nand_pos *pos) { return pos->eraseblock + ((pos->lun + (pos->target * nand->memorg.luns_per_target)) * nand->memorg.eraseblocks_per_lun); } /** * nanddev_bbt_is_initialized() - Check if the BBT has been initialized * @nand: NAND device * * Return: true if the BBT has been initialized, false otherwise. */ static inline bool nanddev_bbt_is_initialized(struct nand_device *nand) { return !!nand->bbt.cache; } /* MTD -> NAND helper functions. */ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo); int nanddev_mtd_max_bad_blocks(struct mtd_info *mtd, loff_t offs, size_t len); #endif /* __LINUX_MTD_NAND_H */ PK ! �\�� � mtd/ftl.hnu �[��� /* * Derived from (and probably identical to): * ftl.h 1.7 1999/10/25 20:23:17 * * The contents of this file are subject to the Mozilla Public License * Version 1.1 (the "License"); you may not use this file except in * compliance with the License. You may obtain a copy of the License * at http://www.mozilla.org/MPL/ * * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and * limitations under the License. * * The initial developer of the original code is David A. Hinds * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the * terms of the GNU General Public License version 2 (the "GPL"), in * which case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use * your version of this file under the MPL, indicate your decision by * deleting the provisions above and replace them with the notice and * other provisions required by the GPL. If you do not delete the * provisions above, a recipient may use your version of this file * under either the MPL or the GPL. */ #ifndef _LINUX_FTL_H #define _LINUX_FTL_H typedef struct erase_unit_header_t { uint8_t LinkTargetTuple[5]; uint8_t DataOrgTuple[10]; uint8_t NumTransferUnits; uint32_t EraseCount; uint16_t LogicalEUN; uint8_t BlockSize; uint8_t EraseUnitSize; uint16_t FirstPhysicalEUN; uint16_t NumEraseUnits; uint32_t FormattedSize; uint32_t FirstVMAddress; uint16_t NumVMPages; uint8_t Flags; uint8_t Code; uint32_t SerialNumber; uint32_t AltEUHOffset; uint32_t BAMOffset; uint8_t Reserved[12]; uint8_t EndTuple[2]; } erase_unit_header_t; /* Flags in erase_unit_header_t */ #define HIDDEN_AREA 0x01 #define REVERSE_POLARITY 0x02 #define DOUBLE_BAI 0x04 /* Definitions for block allocation information */ #define BLOCK_FREE(b) ((b) == 0xffffffff) #define BLOCK_DELETED(b) (((b) == 0) || ((b) == 0xfffffffe)) #define BLOCK_TYPE(b) ((b) & 0x7f) #define BLOCK_ADDRESS(b) ((b) & ~0x7f) #define BLOCK_NUMBER(b) ((b) >> 9) #define BLOCK_CONTROL 0x30 #define BLOCK_DATA 0x40 #define BLOCK_REPLACEMENT 0x60 #define BLOCK_BAD 0x70 #endif /* _LINUX_FTL_H */ PK ! �`�|' ' mtd/sh_flctl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 * * SuperH FLCTL nand controller * * Copyright © 2008 Renesas Solutions Corp. */ #ifndef __SH_FLCTL_H__ #define __SH_FLCTL_H__ #include <linux/completion.h> #include <linux/mtd/mtd.h> #include <linux/mtd/rawnand.h> #include <linux/mtd/partitions.h> #include <linux/pm_qos.h> /* FLCTL registers */ #define FLCMNCR(f) (f->reg + 0x0) #define FLCMDCR(f) (f->reg + 0x4) #define FLCMCDR(f) (f->reg + 0x8) #define FLADR(f) (f->reg + 0xC) #define FLADR2(f) (f->reg + 0x3C) #define FLDATAR(f) (f->reg + 0x10) #define FLDTCNTR(f) (f->reg + 0x14) #define FLINTDMACR(f) (f->reg + 0x18) #define FLBSYTMR(f) (f->reg + 0x1C) #define FLBSYCNT(f) (f->reg + 0x20) #define FLDTFIFO(f) (f->reg + 0x24) #define FLECFIFO(f) (f->reg + 0x28) #define FLTRCR(f) (f->reg + 0x2C) #define FLHOLDCR(f) (f->reg + 0x38) #define FL4ECCRESULT0(f) (f->reg + 0x80) #define FL4ECCRESULT1(f) (f->reg + 0x84) #define FL4ECCRESULT2(f) (f->reg + 0x88) #define FL4ECCRESULT3(f) (f->reg + 0x8C) #define FL4ECCCR(f) (f->reg + 0x90) #define FL4ECCCNT(f) (f->reg + 0x94) #define FLERRADR(f) (f->reg + 0x98) /* FLCMNCR control bits */ #define _4ECCCNTEN (0x1 << 24) #define _4ECCEN (0x1 << 23) #define _4ECCCORRECT (0x1 << 22) #define SHBUSSEL (0x1 << 20) #define SEL_16BIT (0x1 << 19) #define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/ #define QTSEL_E (0x1 << 17) #define ENDIAN (0x1 << 16) /* 1 = little endian */ #define FCKSEL_E (0x1 << 15) #define ACM_SACCES_MODE (0x01 << 10) #define NANWF_E (0x1 << 9) #define SE_D (0x1 << 8) /* Spare area disable */ #define CE1_ENABLE (0x1 << 4) /* Chip Enable 1 */ #define CE0_ENABLE (0x1 << 3) /* Chip Enable 0 */ #define TYPESEL_SET (0x1 << 0) /* * Clock settings using the PULSEx registers from FLCMNCR * * Some hardware uses bits called PULSEx instead of FCKSEL_E and QTSEL_E * to control the clock divider used between the High-Speed Peripheral Clock * and the FLCTL internal clock. If so, use CLK_8_BIT_xxx for connecting 8 bit * and CLK_16_BIT_xxx for connecting 16 bit bus bandwith NAND chips. For the 16 * bit version the divider is seperate for the pulse width of high and low * signals. */ #define PULSE3 (0x1 << 27) #define PULSE2 (0x1 << 17) #define PULSE1 (0x1 << 15) #define PULSE0 (0x1 << 9) #define CLK_8B_0_5 PULSE1 #define CLK_8B_1 0x0 #define CLK_8B_1_5 (PULSE1 | PULSE2) #define CLK_8B_2 PULSE0 #define CLK_8B_3 (PULSE0 | PULSE1 | PULSE2) #define CLK_8B_4 (PULSE0 | PULSE2) #define CLK_16B_6L_2H PULSE0 #define CLK_16B_9L_3H (PULSE0 | PULSE1 | PULSE2) #define CLK_16B_12L_4H (PULSE0 | PULSE2) /* FLCMDCR control bits */ #define ADRCNT2_E (0x1 << 31) /* 5byte address enable */ #define ADRMD_E (0x1 << 26) /* Sector address access */ #define CDSRC_E (0x1 << 25) /* Data buffer selection */ #define DOSR_E (0x1 << 24) /* Status read check */ #define SELRW (0x1 << 21) /* 0:read 1:write */ #define DOADR_E (0x1 << 20) /* Address stage execute */ #define ADRCNT_1 (0x00 << 18) /* Address data bytes: 1byte */ #define ADRCNT_2 (0x01 << 18) /* Address data bytes: 2byte */ #define ADRCNT_3 (0x02 << 18) /* Address data bytes: 3byte */ #define ADRCNT_4 (0x03 << 18) /* Address data bytes: 4byte */ #define DOCMD2_E (0x1 << 17) /* 2nd cmd stage execute */ #define DOCMD1_E (0x1 << 16) /* 1st cmd stage execute */ /* FLINTDMACR control bits */ #define ESTERINTE (0x1 << 24) /* ECC error interrupt enable */ #define AC1CLR (0x1 << 19) /* ECC FIFO clear */ #define AC0CLR (0x1 << 18) /* Data FIFO clear */ #define DREQ0EN (0x1 << 16) /* FLDTFIFODMA Request Enable */ #define ECERB (0x1 << 9) /* ECC error */ #define STERB (0x1 << 8) /* Status error */ #define STERINTE (0x1 << 4) /* Status error enable */ /* FLTRCR control bits */ #define TRSTRT (0x1 << 0) /* translation start */ #define TREND (0x1 << 1) /* translation end */ /* * FLHOLDCR control bits * * HOLDEN: Bus Occupancy Enable (inverted) * Enable this bit when the external bus might be used in between transfers. * If not set and the bus gets used by other modules, a deadlock occurs. */ #define HOLDEN (0x1 << 0) /* FL4ECCCR control bits */ #define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */ #define _4ECCEND (0x1 << 1) /* 4 symbols end */ #define _4ECCEXST (0x1 << 0) /* 4 symbols exist */ #define LOOP_TIMEOUT_MAX 0x00010000 enum flctl_ecc_res_t { FL_SUCCESS, FL_REPAIRABLE, FL_ERROR, FL_TIMEOUT }; struct dma_chan; struct sh_flctl { struct nand_chip chip; struct platform_device *pdev; struct dev_pm_qos_request pm_qos; void __iomem *reg; resource_size_t fifo; uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */ int read_bytes; unsigned int index; int seqin_column; /* column in SEQIN cmd */ int seqin_page_addr; /* page_addr in SEQIN cmd */ uint32_t seqin_read_cmd; /* read cmd in SEQIN cmd */ int erase1_page_addr; /* page_addr in ERASE1 cmd */ uint32_t erase_ADRCNT; /* bits of FLCMDCR in ERASE1 cmd */ uint32_t rw_ADRCNT; /* bits of FLCMDCR in READ WRITE cmd */ uint32_t flcmncr_base; /* base value of FLCMNCR */ uint32_t flintdmacr_base; /* irq enable bits */ unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */ unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */ unsigned holden:1; /* Hardware has FLHOLDCR and HOLDEN is set */ unsigned qos_request:1; /* QoS request to prevent deep power shutdown */ /* DMA related objects */ struct dma_chan *chan_fifo0_rx; struct dma_chan *chan_fifo0_tx; struct completion dma_complete; }; struct sh_flctl_platform_data { struct mtd_partition *parts; int nr_parts; unsigned long flcmncr_val; unsigned has_hwecc:1; unsigned use_holden:1; unsigned int slave_id_fifo0_tx; unsigned int slave_id_fifo0_rx; }; static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo) { return container_of(mtd_to_nand(mtdinfo), struct sh_flctl, chip); } #endif /* __SH_FLCTL_H__ */ PK ! b��? ? mtd/inftl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * inftl.h -- defines to support the Inverse NAND Flash Translation Layer * * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) */ #ifndef __MTD_INFTL_H__ #define __MTD_INFTL_H__ #ifndef __KERNEL__ #error This is a kernel header. Perhaps include nftl-user.h instead? #endif #include <linux/mtd/blktrans.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nftl.h> #include <mtd/inftl-user.h> #ifndef INFTL_MAJOR #define INFTL_MAJOR 96 #endif #define INFTL_PARTN_BITS 4 #ifdef __KERNEL__ struct INFTLrecord { struct mtd_blktrans_dev mbd; __u16 MediaUnit; __u32 EraseSize; struct INFTLMediaHeader MediaHdr; int usecount; unsigned char heads; unsigned char sectors; unsigned short cylinders; __u16 numvunits; __u16 firstEUN; __u16 lastEUN; __u16 numfreeEUNs; __u16 LastFreeEUN; /* To speed up finding a free EUN */ int head,sect,cyl; __u16 *PUtable; /* Physical Unit Table */ __u16 *VUtable; /* Virtual Unit Table */ unsigned int nb_blocks; /* number of physical blocks */ unsigned int nb_boot_blocks; /* number of blocks used by the bios */ struct erase_info instr; }; int INFTL_mount(struct INFTLrecord *s); int INFTL_formatblock(struct INFTLrecord *s, int block); void INFTL_dumptables(struct INFTLrecord *s); void INFTL_dumpVUchains(struct INFTLrecord *s); int inftl_read_oob(struct mtd_info *mtd, loff_t offs, size_t len, size_t *retlen, uint8_t *buf); int inftl_write_oob(struct mtd_info *mtd, loff_t offs, size_t len, size_t *retlen, uint8_t *buf); #endif /* __KERNEL__ */ #endif /* __MTD_INFTL_H__ */ PK ! ��8� � mtd/doc2000.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Linux driver for Disk-On-Chip devices * * Copyright © 1999 Machine Vision Holdings, Inc. * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> * Copyright © 2002-2003 Greg Ungerer <gerg@snapgear.com> * Copyright © 2002-2003 SnapGear Inc */ #ifndef __MTD_DOC2000_H__ #define __MTD_DOC2000_H__ #include <linux/mtd/mtd.h> #include <linux/mutex.h> #define DoC_Sig1 0 #define DoC_Sig2 1 #define DoC_ChipID 0x1000 #define DoC_DOCStatus 0x1001 #define DoC_DOCControl 0x1002 #define DoC_FloorSelect 0x1003 #define DoC_CDSNControl 0x1004 #define DoC_CDSNDeviceSelect 0x1005 #define DoC_ECCConf 0x1006 #define DoC_2k_ECCStatus 0x1007 #define DoC_CDSNSlowIO 0x100d #define DoC_ECCSyndrome0 0x1010 #define DoC_ECCSyndrome1 0x1011 #define DoC_ECCSyndrome2 0x1012 #define DoC_ECCSyndrome3 0x1013 #define DoC_ECCSyndrome4 0x1014 #define DoC_ECCSyndrome5 0x1015 #define DoC_AliasResolution 0x101b #define DoC_ConfigInput 0x101c #define DoC_ReadPipeInit 0x101d #define DoC_WritePipeTerm 0x101e #define DoC_LastDataRead 0x101f #define DoC_NOP 0x1020 #define DoC_Mil_CDSN_IO 0x0800 #define DoC_2k_CDSN_IO 0x1800 #define DoC_Mplus_NOP 0x1002 #define DoC_Mplus_AliasResolution 0x1004 #define DoC_Mplus_DOCControl 0x1006 #define DoC_Mplus_AccessStatus 0x1008 #define DoC_Mplus_DeviceSelect 0x1008 #define DoC_Mplus_Configuration 0x100a #define DoC_Mplus_OutputControl 0x100c #define DoC_Mplus_FlashControl 0x1020 #define DoC_Mplus_FlashSelect 0x1022 #define DoC_Mplus_FlashCmd 0x1024 #define DoC_Mplus_FlashAddress 0x1026 #define DoC_Mplus_FlashData0 0x1028 #define DoC_Mplus_FlashData1 0x1029 #define DoC_Mplus_ReadPipeInit 0x102a #define DoC_Mplus_LastDataRead 0x102c #define DoC_Mplus_LastDataRead1 0x102d #define DoC_Mplus_WritePipeTerm 0x102e #define DoC_Mplus_ECCSyndrome0 0x1040 #define DoC_Mplus_ECCSyndrome1 0x1041 #define DoC_Mplus_ECCSyndrome2 0x1042 #define DoC_Mplus_ECCSyndrome3 0x1043 #define DoC_Mplus_ECCSyndrome4 0x1044 #define DoC_Mplus_ECCSyndrome5 0x1045 #define DoC_Mplus_ECCConf 0x1046 #define DoC_Mplus_Toggle 0x1046 #define DoC_Mplus_DownloadStatus 0x1074 #define DoC_Mplus_CtrlConfirm 0x1076 #define DoC_Mplus_Power 0x1fff /* How to access the device? * On ARM, it'll be mmap'd directly with 32-bit wide accesses. * On PPC, it's mmap'd and 16-bit wide. * Others use readb/writeb */ #if defined(__arm__) static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg) { return __raw_readl(addr + reg); } static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg) { __raw_writel(data, addr + reg); wmb(); } #define DOC_IOREMAP_LEN 0x8000 #elif defined(__ppc__) static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg) { return __raw_readw(addr + reg); } static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg) { __raw_writew(data, addr + reg); wmb(); } #define DOC_IOREMAP_LEN 0x4000 #else #define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) #define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) #define DOC_IOREMAP_LEN 0x2000 #endif #if defined(__i386__) || defined(__x86_64__) #define USE_MEMCPY #endif /* These are provided to directly use the DoC_xxx defines */ #define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) #define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) #define DOC_MODE_RESET 0 #define DOC_MODE_NORMAL 1 #define DOC_MODE_RESERVED1 2 #define DOC_MODE_RESERVED2 3 #define DOC_MODE_CLR_ERR 0x80 #define DOC_MODE_RST_LAT 0x10 #define DOC_MODE_BDECT 0x08 #define DOC_MODE_MDWREN 0x04 #define DOC_ChipID_Doc2k 0x20 #define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */ #define DOC_ChipID_DocMil 0x30 #define DOC_ChipID_DocMilPlus32 0x40 #define DOC_ChipID_DocMilPlus16 0x41 #define CDSN_CTRL_FR_B 0x80 #define CDSN_CTRL_FR_B0 0x40 #define CDSN_CTRL_FR_B1 0x80 #define CDSN_CTRL_ECC_IO 0x20 #define CDSN_CTRL_FLASH_IO 0x10 #define CDSN_CTRL_WP 0x08 #define CDSN_CTRL_ALE 0x04 #define CDSN_CTRL_CLE 0x02 #define CDSN_CTRL_CE 0x01 #define DOC_ECC_RESET 0 #define DOC_ECC_ERROR 0x80 #define DOC_ECC_RW 0x20 #define DOC_ECC__EN 0x08 #define DOC_TOGGLE_BIT 0x04 #define DOC_ECC_RESV 0x02 #define DOC_ECC_IGNORE 0x01 #define DOC_FLASH_CE 0x80 #define DOC_FLASH_WP 0x40 #define DOC_FLASH_BANK 0x02 /* We have to also set the reserved bit 1 for enable */ #define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV) #define DOC_ECC_DIS (DOC_ECC_RESV) struct Nand { char floor, chip; unsigned long curadr; unsigned char curmode; /* Also some erase/write/pipeline info when we get that far */ }; #define MAX_FLOORS 4 #define MAX_CHIPS 4 #define MAX_FLOORS_MIL 1 #define MAX_CHIPS_MIL 1 #define MAX_FLOORS_MPLUS 2 #define MAX_CHIPS_MPLUS 1 #define ADDR_COLUMN 1 #define ADDR_PAGE 2 #define ADDR_COLUMN_PAGE 3 struct DiskOnChip { unsigned long physadr; void __iomem *virtadr; unsigned long totlen; unsigned char ChipID; /* Type of DiskOnChip */ int ioreg; unsigned long mfr; /* Flash IDs - only one type of flash per device */ unsigned long id; int chipshift; char page256; char pageadrlen; char interleave; /* Internal interleaving - Millennium Plus style */ unsigned long erasesize; int curfloor; int curchip; int numchips; struct Nand *chips; struct mtd_info *nextdoc; struct mutex lock; }; int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]); #endif /* __MTD_DOC2000_H__ */ PK ! Pe�o� � mtd/nand-ecc-sw-hamming.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2000-2010 Steven J. Hill <sjhill@realitydiluted.com> * David Woodhouse <dwmw2@infradead.org> * Thomas Gleixner <tglx@linutronix.de> * * This file is the header for the NAND Hamming ECC implementation. */ #ifndef __MTD_NAND_ECC_SW_HAMMING_H__ #define __MTD_NAND_ECC_SW_HAMMING_H__ #include <linux/mtd/nand.h> /** * struct nand_ecc_sw_hamming_conf - private software Hamming ECC engine structure * @req_ctx: Save request context and tweak the original request to fit the * engine needs * @code_size: Number of bytes needed to store a code (one code per step) * @calc_buf: Buffer to use when calculating ECC bytes * @code_buf: Buffer to use when reading (raw) ECC bytes from the chip * @sm_order: Smart Media special ordering */ struct nand_ecc_sw_hamming_conf { struct nand_ecc_req_tweak_ctx req_ctx; unsigned int code_size; u8 *calc_buf; u8 *code_buf; unsigned int sm_order; }; #if IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING) int nand_ecc_sw_hamming_init_ctx(struct nand_device *nand); void nand_ecc_sw_hamming_cleanup_ctx(struct nand_device *nand); int ecc_sw_hamming_calculate(const unsigned char *buf, unsigned int step_size, unsigned char *code, bool sm_order); int nand_ecc_sw_hamming_calculate(struct nand_device *nand, const unsigned char *buf, unsigned char *code); int ecc_sw_hamming_correct(unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc, unsigned int step_size, bool sm_order); int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc); #else /* !CONFIG_MTD_NAND_ECC_SW_HAMMING */ static inline int nand_ecc_sw_hamming_init_ctx(struct nand_device *nand) { return -ENOTSUPP; } static inline void nand_ecc_sw_hamming_cleanup_ctx(struct nand_device *nand) {} static inline int ecc_sw_hamming_calculate(const unsigned char *buf, unsigned int step_size, unsigned char *code, bool sm_order) { return -ENOTSUPP; } static inline int nand_ecc_sw_hamming_calculate(struct nand_device *nand, const unsigned char *buf, unsigned char *code) { return -ENOTSUPP; } static inline int ecc_sw_hamming_correct(unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc, unsigned int step_size, bool sm_order) { return -ENOTSUPP; } static inline int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc) { return -ENOTSUPP; } #endif /* CONFIG_MTD_NAND_ECC_SW_HAMMING */ #endif /* __MTD_NAND_ECC_SW_HAMMING_H__ */ PK ! ��� � mtd/concat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * MTD device concatenation layer definitions * * Copyright © 2002 Robert Kaiser <rkaiser@sysgo.de> */ #ifndef MTD_CONCAT_H #define MTD_CONCAT_H struct mtd_info *mtd_concat_create( struct mtd_info *subdev[], /* subdevices to concatenate */ int num_devs, /* number of subdevices */ const char *name); /* name for the new device */ void mtd_concat_destroy(struct mtd_info *mtd); #endif PK ! +�aA blktrace_api.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef BLKTRACE_H #define BLKTRACE_H #include <linux/blkdev.h> #include <linux/relay.h> #include <linux/compat.h> #include <uapi/linux/blktrace_api.h> #include <linux/list.h> #if defined(CONFIG_BLK_DEV_IO_TRACE) #include <linux/sysfs.h> struct blk_trace { int trace_state; struct rchan *rchan; unsigned long __percpu *sequence; unsigned char __percpu *msg_data; u16 act_mask; u64 start_lba; u64 end_lba; u32 pid; u32 dev; struct dentry *dir; struct list_head running_list; atomic_t dropped; }; struct blkcg; extern int blk_trace_ioctl(struct block_device *, unsigned, char __user *); extern void blk_trace_shutdown(struct request_queue *); extern __printf(3, 4) void __trace_note_message(struct blk_trace *, struct blkcg *blkcg, const char *fmt, ...); /** * blk_add_trace_msg - Add a (simple) message to the blktrace stream * @q: queue the io is for * @fmt: format to print message in * args... Variable argument list for format * * Description: * Records a (simple) message onto the blktrace stream. * * NOTE: BLK_TN_MAX_MSG characters are output at most. * NOTE: Can not use 'static inline' due to presence of var args... * **/ #define blk_add_cgroup_trace_msg(q, cg, fmt, ...) \ do { \ struct blk_trace *bt; \ \ rcu_read_lock(); \ bt = rcu_dereference((q)->blk_trace); \ if (unlikely(bt)) \ __trace_note_message(bt, cg, fmt, ##__VA_ARGS__);\ rcu_read_unlock(); \ } while (0) #define blk_add_trace_msg(q, fmt, ...) \ blk_add_cgroup_trace_msg(q, NULL, fmt, ##__VA_ARGS__) #define BLK_TN_MAX_MSG 128 static inline bool blk_trace_note_message_enabled(struct request_queue *q) { struct blk_trace *bt; bool ret; rcu_read_lock(); bt = rcu_dereference(q->blk_trace); ret = bt && (bt->act_mask & BLK_TC_NOTIFY); rcu_read_unlock(); return ret; } extern void blk_add_driver_data(struct request *rq, void *data, size_t len); extern int blk_trace_setup(struct request_queue *q, char *name, dev_t dev, struct block_device *bdev, char __user *arg); extern int blk_trace_startstop(struct request_queue *q, int start); extern int blk_trace_remove(struct request_queue *q); extern void blk_trace_remove_sysfs(struct device *dev); extern int blk_trace_init_sysfs(struct device *dev); extern struct attribute_group blk_trace_attr_group; #else /* !CONFIG_BLK_DEV_IO_TRACE */ # define blk_trace_ioctl(bdev, cmd, arg) (-ENOTTY) # define blk_trace_shutdown(q) do { } while (0) # define blk_add_driver_data(rq, data, len) do {} while (0) # define blk_trace_setup(q, name, dev, bdev, arg) (-ENOTTY) # define blk_trace_startstop(q, start) (-ENOTTY) # define blk_trace_remove(q) (-ENOTTY) # define blk_add_trace_msg(q, fmt, ...) do { } while (0) # define blk_add_cgroup_trace_msg(q, cg, fmt, ...) do { } while (0) # define blk_trace_remove_sysfs(dev) do { } while (0) # define blk_trace_note_message_enabled(q) (false) static inline int blk_trace_init_sysfs(struct device *dev) { return 0; } #endif /* CONFIG_BLK_DEV_IO_TRACE */ #ifdef CONFIG_COMPAT struct compat_blk_user_trace_setup { char name[BLKTRACE_BDEV_SIZE]; u16 act_mask; u32 buf_size; u32 buf_nr; compat_u64 start_lba; compat_u64 end_lba; u32 pid; }; #define BLKTRACESETUP32 _IOWR(0x12, 115, struct compat_blk_user_trace_setup) #endif void blk_fill_rwbs(char *rwbs, unsigned int op); static inline sector_t blk_rq_trace_sector(struct request *rq) { /* * Tracing should ignore starting sector for passthrough requests and * requests where starting sector didn't get set. */ if (blk_rq_is_passthrough(rq) || blk_rq_pos(rq) == (sector_t)-1) return 0; return blk_rq_pos(rq); } static inline unsigned int blk_rq_trace_nr_sectors(struct request *rq) { return blk_rq_is_passthrough(rq) ? 0 : blk_rq_sectors(rq); } #endif PK ! K�q�� � moduleloader.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MODULELOADER_H #define _LINUX_MODULELOADER_H /* The stuff needed for archs to support modules. */ #include <linux/module.h> #include <linux/elf.h> /* These may be implemented by architectures that need to hook into the * module loader code. Architectures that don't need to do anything special * can just rely on the 'weak' default hooks defined in kernel/module.c. * Note, however, that at least one of apply_relocate or apply_relocate_add * must be implemented by each architecture. */ /* Adjust arch-specific sections. Return 0 on success. */ int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, char *secstrings, struct module *mod); /* Additional bytes needed by arch in front of individual sections */ unsigned int arch_mod_section_prepend(struct module *mod, unsigned int section); /* Allocator used for allocating struct module, core sections and init sections. Returns NULL on failure. */ void *module_alloc(unsigned long size); /* Free memory returned from module_alloc. */ void module_memfree(void *module_region); /* Determines if the section name is an init section (that is only used during * module loading). */ bool module_init_section(const char *name); /* Determines if the section name is an exit section (that is only used during * module unloading) */ bool module_exit_section(const char *name); /* Describes whether within_module_init() will consider this an init section * or not. This behaviour changes with CONFIG_MODULE_UNLOAD. */ bool module_init_layout_section(const char *sname); /* * Apply the given relocation to the (simplified) ELF. Return -error * or 0. */ #ifdef CONFIG_MODULES_USE_ELF_REL int apply_relocate(Elf_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned int relsec, struct module *mod); #else static inline int apply_relocate(Elf_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned int relsec, struct module *me) { printk(KERN_ERR "module %s: REL relocation unsupported\n", module_name(me)); return -ENOEXEC; } #endif /* * Apply the given add relocation to the (simplified) ELF. Return * -error or 0 */ #ifdef CONFIG_MODULES_USE_ELF_RELA int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned int relsec, struct module *mod); #else static inline int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned int relsec, struct module *me) { printk(KERN_ERR "module %s: REL relocation unsupported\n", module_name(me)); return -ENOEXEC; } #endif /* Any final processing of module before access. Return -error or 0. */ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *mod); #ifdef CONFIG_MODULES void flush_module_init_free_work(void); #else static inline void flush_module_init_free_work(void) { } #endif /* Any cleanup needed when module leaves. */ void module_arch_cleanup(struct module *mod); /* Any cleanup before freeing mod->module_init */ void module_arch_freeing_init(struct module *mod); #if (defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)) && \ !defined(CONFIG_KASAN_VMALLOC) #include <linux/kasan.h> #define MODULE_ALIGN (PAGE_SIZE << KASAN_SHADOW_SCALE_SHIFT) #else #define MODULE_ALIGN PAGE_SIZE #endif #endif PK ! �9�F� � khugepaged.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KHUGEPAGED_H #define _LINUX_KHUGEPAGED_H #include <linux/sched/coredump.h> /* MMF_VM_HUGEPAGE */ #include <linux/shmem_fs.h> #ifdef CONFIG_TRANSPARENT_HUGEPAGE extern struct attribute_group khugepaged_attr_group; extern int khugepaged_init(void); extern void khugepaged_destroy(void); extern int start_stop_khugepaged(void); extern int __khugepaged_enter(struct mm_struct *mm); extern void __khugepaged_exit(struct mm_struct *mm); extern int khugepaged_enter_vma_merge(struct vm_area_struct *vma, unsigned long vm_flags); extern void khugepaged_min_free_kbytes_update(void); #ifdef CONFIG_SHMEM extern void collapse_pte_mapped_thp(struct mm_struct *mm, unsigned long addr); #else static inline void collapse_pte_mapped_thp(struct mm_struct *mm, unsigned long addr) { } #endif #define khugepaged_enabled() \ (transparent_hugepage_flags & \ ((1<<TRANSPARENT_HUGEPAGE_FLAG) | \ (1<<TRANSPARENT_HUGEPAGE_REQ_MADV_FLAG))) #define khugepaged_always() \ (transparent_hugepage_flags & \ (1<<TRANSPARENT_HUGEPAGE_FLAG)) #define khugepaged_req_madv() \ (transparent_hugepage_flags & \ (1<<TRANSPARENT_HUGEPAGE_REQ_MADV_FLAG)) #define khugepaged_defrag() \ (transparent_hugepage_flags & \ (1<<TRANSPARENT_HUGEPAGE_DEFRAG_KHUGEPAGED_FLAG)) static inline int khugepaged_fork(struct mm_struct *mm, struct mm_struct *oldmm) { if (test_bit(MMF_VM_HUGEPAGE, &oldmm->flags)) return __khugepaged_enter(mm); return 0; } static inline void khugepaged_exit(struct mm_struct *mm) { if (test_bit(MMF_VM_HUGEPAGE, &mm->flags)) __khugepaged_exit(mm); } static inline int khugepaged_enter(struct vm_area_struct *vma, unsigned long vm_flags) { if (!test_bit(MMF_VM_HUGEPAGE, &vma->vm_mm->flags)) if ((khugepaged_always() || (shmem_file(vma->vm_file) && shmem_huge_enabled(vma)) || (khugepaged_req_madv() && (vm_flags & VM_HUGEPAGE))) && !(vm_flags & VM_NOHUGEPAGE) && !test_bit(MMF_DISABLE_THP, &vma->vm_mm->flags)) if (__khugepaged_enter(vma->vm_mm)) return -ENOMEM; return 0; } #else /* CONFIG_TRANSPARENT_HUGEPAGE */ static inline int khugepaged_fork(struct mm_struct *mm, struct mm_struct *oldmm) { return 0; } static inline void khugepaged_exit(struct mm_struct *mm) { } static inline int khugepaged_enter(struct vm_area_struct *vma, unsigned long vm_flags) { return 0; } static inline int khugepaged_enter_vma_merge(struct vm_area_struct *vma, unsigned long vm_flags) { return 0; } static inline void collapse_pte_mapped_thp(struct mm_struct *mm, unsigned long addr) { } static inline void khugepaged_min_free_kbytes_update(void) { } #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif /* _LINUX_KHUGEPAGED_H */ PK ! =�� � ssbi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (C) 2010 Google, Inc. * Copyright (c) 2011, Code Aurora Forum. All rights reserved. * Author: Dima Zavin <dima@android.com> */ #ifndef _LINUX_SSBI_H #define _LINUX_SSBI_H #include <linux/types.h> int ssbi_write(struct device *dev, u16 addr, const u8 *buf, int len); int ssbi_read(struct device *dev, u16 addr, u8 *buf, int len); static inline int ssbi_reg_read(void *context, unsigned int reg, unsigned int *val) { int ret; u8 v; ret = ssbi_read(context, reg, &v, 1); if (!ret) *val = v; return ret; } static inline int ssbi_reg_write(void *context, unsigned int reg, unsigned int val) { u8 v = val; return ssbi_write(context, reg, &v, 1); } #endif PK ! �� G G psp-sev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AMD Secure Encrypted Virtualization (SEV) driver interface * * Copyright (C) 2016-2017 Advanced Micro Devices, Inc. * * Author: Brijesh Singh <brijesh.singh@amd.com> * * SEV API spec is available at https://developer.amd.com/sev */ #ifndef __PSP_SEV_H__ #define __PSP_SEV_H__ #include <uapi/linux/psp-sev.h> #ifdef CONFIG_X86 #include <linux/mem_encrypt.h> #define __psp_pa(x) __sme_pa(x) #else #define __psp_pa(x) __pa(x) #endif #define SEV_FW_BLOB_MAX_SIZE 0x4000 /* 16KB */ /** * SEV platform state */ enum sev_state { SEV_STATE_UNINIT = 0x0, SEV_STATE_INIT = 0x1, SEV_STATE_WORKING = 0x2, SEV_STATE_MAX }; /** * SEV platform and guest management commands */ enum sev_cmd { /* platform commands */ SEV_CMD_INIT = 0x001, SEV_CMD_SHUTDOWN = 0x002, SEV_CMD_FACTORY_RESET = 0x003, SEV_CMD_PLATFORM_STATUS = 0x004, SEV_CMD_PEK_GEN = 0x005, SEV_CMD_PEK_CSR = 0x006, SEV_CMD_PEK_CERT_IMPORT = 0x007, SEV_CMD_PDH_CERT_EXPORT = 0x008, SEV_CMD_PDH_GEN = 0x009, SEV_CMD_DF_FLUSH = 0x00A, SEV_CMD_DOWNLOAD_FIRMWARE = 0x00B, SEV_CMD_GET_ID = 0x00C, /* Guest commands */ SEV_CMD_DECOMMISSION = 0x020, SEV_CMD_ACTIVATE = 0x021, SEV_CMD_DEACTIVATE = 0x022, SEV_CMD_GUEST_STATUS = 0x023, /* Guest launch commands */ SEV_CMD_LAUNCH_START = 0x030, SEV_CMD_LAUNCH_UPDATE_DATA = 0x031, SEV_CMD_LAUNCH_UPDATE_VMSA = 0x032, SEV_CMD_LAUNCH_MEASURE = 0x033, SEV_CMD_LAUNCH_UPDATE_SECRET = 0x034, SEV_CMD_LAUNCH_FINISH = 0x035, SEV_CMD_ATTESTATION_REPORT = 0x036, /* Guest migration commands (outgoing) */ SEV_CMD_SEND_START = 0x040, SEV_CMD_SEND_UPDATE_DATA = 0x041, SEV_CMD_SEND_UPDATE_VMSA = 0x042, SEV_CMD_SEND_FINISH = 0x043, SEV_CMD_SEND_CANCEL = 0x044, /* Guest migration commands (incoming) */ SEV_CMD_RECEIVE_START = 0x050, SEV_CMD_RECEIVE_UPDATE_DATA = 0x051, SEV_CMD_RECEIVE_UPDATE_VMSA = 0x052, SEV_CMD_RECEIVE_FINISH = 0x053, /* Guest debug commands */ SEV_CMD_DBG_DECRYPT = 0x060, SEV_CMD_DBG_ENCRYPT = 0x061, SEV_CMD_MAX, }; /** * struct sev_data_init - INIT command parameters * * @flags: processing flags * @tmr_address: system physical address used for SEV-ES * @tmr_len: len of tmr_address */ struct sev_data_init { u32 flags; /* In */ u32 reserved; /* In */ u64 tmr_address; /* In */ u32 tmr_len; /* In */ } __packed; #define SEV_INIT_FLAGS_SEV_ES 0x01 /** * struct sev_data_pek_csr - PEK_CSR command parameters * * @address: PEK certificate chain * @len: len of certificate */ struct sev_data_pek_csr { u64 address; /* In */ u32 len; /* In/Out */ } __packed; /** * struct sev_data_cert_import - PEK_CERT_IMPORT command parameters * * @pek_address: PEK certificate chain * @pek_len: len of PEK certificate * @oca_address: OCA certificate chain * @oca_len: len of OCA certificate */ struct sev_data_pek_cert_import { u64 pek_cert_address; /* In */ u32 pek_cert_len; /* In */ u32 reserved; /* In */ u64 oca_cert_address; /* In */ u32 oca_cert_len; /* In */ } __packed; /** * struct sev_data_download_firmware - DOWNLOAD_FIRMWARE command parameters * * @address: physical address of firmware image * @len: len of the firmware image */ struct sev_data_download_firmware { u64 address; /* In */ u32 len; /* In */ } __packed; /** * struct sev_data_get_id - GET_ID command parameters * * @address: physical address of region to place unique CPU ID(s) * @len: len of the region */ struct sev_data_get_id { u64 address; /* In */ u32 len; /* In/Out */ } __packed; /** * struct sev_data_pdh_cert_export - PDH_CERT_EXPORT command parameters * * @pdh_address: PDH certificate address * @pdh_len: len of PDH certificate * @cert_chain_address: PDH certificate chain * @cert_chain_len: len of PDH certificate chain */ struct sev_data_pdh_cert_export { u64 pdh_cert_address; /* In */ u32 pdh_cert_len; /* In/Out */ u32 reserved; /* In */ u64 cert_chain_address; /* In */ u32 cert_chain_len; /* In/Out */ } __packed; /** * struct sev_data_decommission - DECOMMISSION command parameters * * @handle: handle of the VM to decommission */ struct sev_data_decommission { u32 handle; /* In */ } __packed; /** * struct sev_data_activate - ACTIVATE command parameters * * @handle: handle of the VM to activate * @asid: asid assigned to the VM */ struct sev_data_activate { u32 handle; /* In */ u32 asid; /* In */ } __packed; /** * struct sev_data_deactivate - DEACTIVATE command parameters * * @handle: handle of the VM to deactivate */ struct sev_data_deactivate { u32 handle; /* In */ } __packed; /** * struct sev_data_guest_status - SEV GUEST_STATUS command parameters * * @handle: handle of the VM to retrieve status * @policy: policy information for the VM * @asid: current ASID of the VM * @state: current state of the VM */ struct sev_data_guest_status { u32 handle; /* In */ u32 policy; /* Out */ u32 asid; /* Out */ u8 state; /* Out */ } __packed; /** * struct sev_data_launch_start - LAUNCH_START command parameters * * @handle: handle assigned to the VM * @policy: guest launch policy * @dh_cert_address: physical address of DH certificate blob * @dh_cert_len: len of DH certificate blob * @session_address: physical address of session parameters * @session_len: len of session parameters */ struct sev_data_launch_start { u32 handle; /* In/Out */ u32 policy; /* In */ u64 dh_cert_address; /* In */ u32 dh_cert_len; /* In */ u32 reserved; /* In */ u64 session_address; /* In */ u32 session_len; /* In */ } __packed; /** * struct sev_data_launch_update_data - LAUNCH_UPDATE_DATA command parameter * * @handle: handle of the VM to update * @len: len of memory to be encrypted * @address: physical address of memory region to encrypt */ struct sev_data_launch_update_data { u32 handle; /* In */ u32 reserved; u64 address; /* In */ u32 len; /* In */ } __packed; /** * struct sev_data_launch_update_vmsa - LAUNCH_UPDATE_VMSA command * * @handle: handle of the VM * @address: physical address of memory region to encrypt * @len: len of memory region to encrypt */ struct sev_data_launch_update_vmsa { u32 handle; /* In */ u32 reserved; u64 address; /* In */ u32 len; /* In */ } __packed; /** * struct sev_data_launch_measure - LAUNCH_MEASURE command parameters * * @handle: handle of the VM to process * @address: physical address containing the measurement blob * @len: len of measurement blob */ struct sev_data_launch_measure { u32 handle; /* In */ u32 reserved; u64 address; /* In */ u32 len; /* In/Out */ } __packed; /** * struct sev_data_launch_secret - LAUNCH_SECRET command parameters * * @handle: handle of the VM to process * @hdr_address: physical address containing the packet header * @hdr_len: len of packet header * @guest_address: system physical address of guest memory region * @guest_len: len of guest_paddr * @trans_address: physical address of transport memory buffer * @trans_len: len of transport memory buffer */ struct sev_data_launch_secret { u32 handle; /* In */ u32 reserved1; u64 hdr_address; /* In */ u32 hdr_len; /* In */ u32 reserved2; u64 guest_address; /* In */ u32 guest_len; /* In */ u32 reserved3; u64 trans_address; /* In */ u32 trans_len; /* In */ } __packed; /** * struct sev_data_launch_finish - LAUNCH_FINISH command parameters * * @handle: handle of the VM to process */ struct sev_data_launch_finish { u32 handle; /* In */ } __packed; /** * struct sev_data_send_start - SEND_START command parameters * * @handle: handle of the VM to process * @policy: policy information for the VM * @pdh_cert_address: physical address containing PDH certificate * @pdh_cert_len: len of PDH certificate * @plat_certs_address: physical address containing platform certificate * @plat_certs_len: len of platform certificate * @amd_certs_address: physical address containing AMD certificate * @amd_certs_len: len of AMD certificate * @session_address: physical address containing Session data * @session_len: len of session data */ struct sev_data_send_start { u32 handle; /* In */ u32 policy; /* Out */ u64 pdh_cert_address; /* In */ u32 pdh_cert_len; /* In */ u32 reserved1; u64 plat_certs_address; /* In */ u32 plat_certs_len; /* In */ u32 reserved2; u64 amd_certs_address; /* In */ u32 amd_certs_len; /* In */ u32 reserved3; u64 session_address; /* In */ u32 session_len; /* In/Out */ } __packed; /** * struct sev_data_send_update - SEND_UPDATE_DATA command * * @handle: handle of the VM to process * @hdr_address: physical address containing packet header * @hdr_len: len of packet header * @guest_address: physical address of guest memory region to send * @guest_len: len of guest memory region to send * @trans_address: physical address of host memory region * @trans_len: len of host memory region */ struct sev_data_send_update_data { u32 handle; /* In */ u32 reserved1; u64 hdr_address; /* In */ u32 hdr_len; /* In/Out */ u32 reserved2; u64 guest_address; /* In */ u32 guest_len; /* In */ u32 reserved3; u64 trans_address; /* In */ u32 trans_len; /* In */ } __packed; /** * struct sev_data_send_update - SEND_UPDATE_VMSA command * * @handle: handle of the VM to process * @hdr_address: physical address containing packet header * @hdr_len: len of packet header * @guest_address: physical address of guest memory region to send * @guest_len: len of guest memory region to send * @trans_address: physical address of host memory region * @trans_len: len of host memory region */ struct sev_data_send_update_vmsa { u32 handle; /* In */ u64 hdr_address; /* In */ u32 hdr_len; /* In/Out */ u32 reserved2; u64 guest_address; /* In */ u32 guest_len; /* In */ u32 reserved3; u64 trans_address; /* In */ u32 trans_len; /* In */ } __packed; /** * struct sev_data_send_finish - SEND_FINISH command parameters * * @handle: handle of the VM to process */ struct sev_data_send_finish { u32 handle; /* In */ } __packed; /** * struct sev_data_send_cancel - SEND_CANCEL command parameters * * @handle: handle of the VM to process */ struct sev_data_send_cancel { u32 handle; /* In */ } __packed; /** * struct sev_data_receive_start - RECEIVE_START command parameters * * @handle: handle of the VM to perform receive operation * @pdh_cert_address: system physical address containing PDH certificate blob * @pdh_cert_len: len of PDH certificate blob * @session_address: system physical address containing session blob * @session_len: len of session blob */ struct sev_data_receive_start { u32 handle; /* In/Out */ u32 policy; /* In */ u64 pdh_cert_address; /* In */ u32 pdh_cert_len; /* In */ u32 reserved1; u64 session_address; /* In */ u32 session_len; /* In */ } __packed; /** * struct sev_data_receive_update_data - RECEIVE_UPDATE_DATA command parameters * * @handle: handle of the VM to update * @hdr_address: physical address containing packet header blob * @hdr_len: len of packet header * @guest_address: system physical address of guest memory region * @guest_len: len of guest memory region * @trans_address: system physical address of transport buffer * @trans_len: len of transport buffer */ struct sev_data_receive_update_data { u32 handle; /* In */ u32 reserved1; u64 hdr_address; /* In */ u32 hdr_len; /* In */ u32 reserved2; u64 guest_address; /* In */ u32 guest_len; /* In */ u32 reserved3; u64 trans_address; /* In */ u32 trans_len; /* In */ } __packed; /** * struct sev_data_receive_update_vmsa - RECEIVE_UPDATE_VMSA command parameters * * @handle: handle of the VM to update * @hdr_address: physical address containing packet header blob * @hdr_len: len of packet header * @guest_address: system physical address of guest memory region * @guest_len: len of guest memory region * @trans_address: system physical address of transport buffer * @trans_len: len of transport buffer */ struct sev_data_receive_update_vmsa { u32 handle; /* In */ u32 reserved1; u64 hdr_address; /* In */ u32 hdr_len; /* In */ u32 reserved2; u64 guest_address; /* In */ u32 guest_len; /* In */ u32 reserved3; u64 trans_address; /* In */ u32 trans_len; /* In */ } __packed; /** * struct sev_data_receive_finish - RECEIVE_FINISH command parameters * * @handle: handle of the VM to finish */ struct sev_data_receive_finish { u32 handle; /* In */ } __packed; /** * struct sev_data_dbg - DBG_ENCRYPT/DBG_DECRYPT command parameters * * @handle: handle of the VM to perform debug operation * @src_addr: source address of data to operate on * @dst_addr: destination address of data to operate on * @len: len of data to operate on */ struct sev_data_dbg { u32 handle; /* In */ u32 reserved; u64 src_addr; /* In */ u64 dst_addr; /* In */ u32 len; /* In */ } __packed; /** * struct sev_data_attestation_report - SEV_ATTESTATION_REPORT command parameters * * @handle: handle of the VM * @mnonce: a random nonce that will be included in the report. * @address: physical address where the report will be copied. * @len: length of the physical buffer. */ struct sev_data_attestation_report { u32 handle; /* In */ u32 reserved; u64 address; /* In */ u8 mnonce[16]; /* In */ u32 len; /* In/Out */ } __packed; #ifdef CONFIG_CRYPTO_DEV_SP_PSP /** * sev_platform_init - perform SEV INIT command * * @error: SEV command return code * * Returns: * 0 if the SEV successfully processed the command * -%ENODEV if the SEV device is not available * -%ENOTSUPP if the SEV does not support SEV * -%ETIMEDOUT if the SEV command timed out * -%EIO if the SEV returned a non-zero return code */ int sev_platform_init(int *error); /** * sev_platform_status - perform SEV PLATFORM_STATUS command * * @status: sev_user_data_status structure to be processed * @error: SEV command return code * * Returns: * 0 if the SEV successfully processed the command * -%ENODEV if the SEV device is not available * -%ENOTSUPP if the SEV does not support SEV * -%ETIMEDOUT if the SEV command timed out * -%EIO if the SEV returned a non-zero return code */ int sev_platform_status(struct sev_user_data_status *status, int *error); /** * sev_issue_cmd_external_user - issue SEV command by other driver with a file * handle. * * This function can be used by other drivers to issue a SEV command on * behalf of userspace. The caller must pass a valid SEV file descriptor * so that we know that it has access to SEV device. * * @filep - SEV device file pointer * @cmd - command to issue * @data - command buffer * @error: SEV command return code * * Returns: * 0 if the SEV successfully processed the command * -%ENODEV if the SEV device is not available * -%ENOTSUPP if the SEV does not support SEV * -%ETIMEDOUT if the SEV command timed out * -%EIO if the SEV returned a non-zero return code * -%EINVAL if the SEV file descriptor is not valid */ int sev_issue_cmd_external_user(struct file *filep, unsigned int id, void *data, int *error); /** * sev_guest_deactivate - perform SEV DEACTIVATE command * * @deactivate: sev_data_deactivate structure to be processed * @sev_ret: sev command return code * * Returns: * 0 if the sev successfully processed the command * -%ENODEV if the sev device is not available * -%ENOTSUPP if the sev does not support SEV * -%ETIMEDOUT if the sev command timed out * -%EIO if the sev returned a non-zero return code */ int sev_guest_deactivate(struct sev_data_deactivate *data, int *error); /** * sev_guest_activate - perform SEV ACTIVATE command * * @activate: sev_data_activate structure to be processed * @sev_ret: sev command return code * * Returns: * 0 if the sev successfully processed the command * -%ENODEV if the sev device is not available * -%ENOTSUPP if the sev does not support SEV * -%ETIMEDOUT if the sev command timed out * -%EIO if the sev returned a non-zero return code */ int sev_guest_activate(struct sev_data_activate *data, int *error); /** * sev_guest_df_flush - perform SEV DF_FLUSH command * * @sev_ret: sev command return code * * Returns: * 0 if the sev successfully processed the command * -%ENODEV if the sev device is not available * -%ENOTSUPP if the sev does not support SEV * -%ETIMEDOUT if the sev command timed out * -%EIO if the sev returned a non-zero return code */ int sev_guest_df_flush(int *error); /** * sev_guest_decommission - perform SEV DECOMMISSION command * * @decommission: sev_data_decommission structure to be processed * @sev_ret: sev command return code * * Returns: * 0 if the sev successfully processed the command * -%ENODEV if the sev device is not available * -%ENOTSUPP if the sev does not support SEV * -%ETIMEDOUT if the sev command timed out * -%EIO if the sev returned a non-zero return code */ int sev_guest_decommission(struct sev_data_decommission *data, int *error); void *psp_copy_user_blob(u64 uaddr, u32 len); #else /* !CONFIG_CRYPTO_DEV_SP_PSP */ static inline int sev_platform_status(struct sev_user_data_status *status, int *error) { return -ENODEV; } static inline int sev_platform_init(int *error) { return -ENODEV; } static inline int sev_guest_deactivate(struct sev_data_deactivate *data, int *error) { return -ENODEV; } static inline int sev_guest_decommission(struct sev_data_decommission *data, int *error) { return -ENODEV; } static inline int sev_guest_activate(struct sev_data_activate *data, int *error) { return -ENODEV; } static inline int sev_guest_df_flush(int *error) { return -ENODEV; } static inline int sev_issue_cmd_external_user(struct file *filep, unsigned int id, void *data, int *error) { return -ENODEV; } static inline void *psp_copy_user_blob(u64 __user uaddr, u32 len) { return ERR_PTR(-EINVAL); } #endif /* CONFIG_CRYPTO_DEV_SP_PSP */ #endif /* __PSP_SEV_H__ */ PK ! �^Wa� � intel-ish-client-if.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Intel ISH client Interface definitions * * Copyright (c) 2019, Intel Corporation. */ #ifndef _INTEL_ISH_CLIENT_IF_H_ #define _INTEL_ISH_CLIENT_IF_H_ #include <linux/device.h> #include <linux/uuid.h> struct ishtp_cl_device; struct ishtp_device; struct ishtp_cl; struct ishtp_fw_client; typedef __printf(2, 3) void (*ishtp_print_log)(struct ishtp_device *dev, const char *format, ...); /* Client state */ enum cl_state { ISHTP_CL_INITIALIZING = 0, ISHTP_CL_CONNECTING, ISHTP_CL_CONNECTED, ISHTP_CL_DISCONNECTING, ISHTP_CL_DISCONNECTED }; /** * struct ishtp_cl_device - ISHTP device handle * @driver: driver instance on a bus * @name: Name of the device for probe * @probe: driver callback for device probe * @remove: driver callback on device removal * * Client drivers defines to get probed/removed for ISHTP client device. */ struct ishtp_cl_driver { struct device_driver driver; const char *name; const guid_t *guid; int (*probe)(struct ishtp_cl_device *dev); void (*remove)(struct ishtp_cl_device *dev); int (*reset)(struct ishtp_cl_device *dev); const struct dev_pm_ops *pm; }; /** * struct ishtp_msg_data - ISHTP message data struct * @size: Size of data in the *data * @data: Pointer to data */ struct ishtp_msg_data { uint32_t size; unsigned char *data; }; /* * struct ishtp_cl_rb - request block structure * @list: Link to list members * @cl: ISHTP client instance * @buffer: message header * @buf_idx: Index into buffer * @read_time: unused at this time */ struct ishtp_cl_rb { struct list_head list; struct ishtp_cl *cl; struct ishtp_msg_data buffer; unsigned long buf_idx; unsigned long read_time; }; int ishtp_cl_driver_register(struct ishtp_cl_driver *driver, struct module *owner); void ishtp_cl_driver_unregister(struct ishtp_cl_driver *driver); int ishtp_register_event_cb(struct ishtp_cl_device *device, void (*read_cb)(struct ishtp_cl_device *)); /* Get the device * from ishtp device instance */ struct device *ishtp_device(struct ishtp_cl_device *cl_device); /* wait for IPC resume */ bool ishtp_wait_resume(struct ishtp_device *dev); /* Trace interface for clients */ ishtp_print_log ishtp_trace_callback(struct ishtp_cl_device *cl_device); /* Get device pointer of PCI device for DMA acces */ struct device *ishtp_get_pci_device(struct ishtp_cl_device *cl_device); struct ishtp_cl *ishtp_cl_allocate(struct ishtp_cl_device *cl_device); void ishtp_cl_free(struct ishtp_cl *cl); int ishtp_cl_link(struct ishtp_cl *cl); void ishtp_cl_unlink(struct ishtp_cl *cl); int ishtp_cl_disconnect(struct ishtp_cl *cl); int ishtp_cl_connect(struct ishtp_cl *cl); int ishtp_cl_send(struct ishtp_cl *cl, uint8_t *buf, size_t length); int ishtp_cl_flush_queues(struct ishtp_cl *cl); int ishtp_cl_io_rb_recycle(struct ishtp_cl_rb *rb); bool ishtp_cl_tx_empty(struct ishtp_cl *cl); struct ishtp_cl_rb *ishtp_cl_rx_get_rb(struct ishtp_cl *cl); void *ishtp_get_client_data(struct ishtp_cl *cl); void ishtp_set_client_data(struct ishtp_cl *cl, void *data); struct ishtp_device *ishtp_get_ishtp_device(struct ishtp_cl *cl); void ishtp_set_tx_ring_size(struct ishtp_cl *cl, int size); void ishtp_set_rx_ring_size(struct ishtp_cl *cl, int size); void ishtp_set_connection_state(struct ishtp_cl *cl, int state); void ishtp_cl_set_fw_client_id(struct ishtp_cl *cl, int fw_client_id); void ishtp_put_device(struct ishtp_cl_device *cl_dev); void ishtp_get_device(struct ishtp_cl_device *cl_dev); void ishtp_set_drvdata(struct ishtp_cl_device *cl_device, void *data); void *ishtp_get_drvdata(struct ishtp_cl_device *cl_device); struct ishtp_cl_device *ishtp_dev_to_cl_device(struct device *dev); int ishtp_register_event_cb(struct ishtp_cl_device *device, void (*read_cb)(struct ishtp_cl_device *)); struct ishtp_fw_client *ishtp_fw_cl_get_client(struct ishtp_device *dev, const guid_t *uuid); int ishtp_get_fw_client_id(struct ishtp_fw_client *fw_client); int ish_hw_reset(struct ishtp_device *dev); #endif /* _INTEL_ISH_CLIENT_IF_H_ */ PK ! Ñ��) ) vexpress.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * * Copyright (C) 2012 ARM Limited */ #ifndef _LINUX_VEXPRESS_H #define _LINUX_VEXPRESS_H #include <linux/device.h> #include <linux/regmap.h> /* Config regmap API */ struct regmap *devm_regmap_init_vexpress_config(struct device *dev); #endif PK ! �3P( packing.hnu �[��� /* SPDX-License-Identifier: BSD-3-Clause * Copyright 2016-2018 NXP * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> */ #ifndef _LINUX_PACKING_H #define _LINUX_PACKING_H #include <linux/types.h> #include <linux/bitops.h> #define QUIRK_MSB_ON_THE_RIGHT BIT(0) #define QUIRK_LITTLE_ENDIAN BIT(1) #define QUIRK_LSW32_IS_FIRST BIT(2) enum packing_op { PACK, UNPACK, }; /** * packing - Convert numbers (currently u64) between a packed and an unpacked * format. Unpacked means laid out in memory in the CPU's native * understanding of integers, while packed means anything else that * requires translation. * * @pbuf: Pointer to a buffer holding the packed value. * @uval: Pointer to an u64 holding the unpacked value. * @startbit: The index (in logical notation, compensated for quirks) where * the packed value starts within pbuf. Must be larger than, or * equal to, endbit. * @endbit: The index (in logical notation, compensated for quirks) where * the packed value ends within pbuf. Must be smaller than, or equal * to, startbit. * @op: If PACK, then uval will be treated as const pointer and copied (packed) * into pbuf, between startbit and endbit. * If UNPACK, then pbuf will be treated as const pointer and the logical * value between startbit and endbit will be copied (unpacked) to uval. * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and * QUIRK_MSB_ON_THE_RIGHT. * * Return: 0 on success, EINVAL or ERANGE if called incorrectly. Assuming * correct usage, return code may be discarded. * If op is PACK, pbuf is modified. * If op is UNPACK, uval is modified. */ int packing(void *pbuf, u64 *uval, int startbit, int endbit, size_t pbuflen, enum packing_op op, u8 quirks); #endif PK ! ��T� T� memcontrol.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* memcontrol.h - Memory Controller * * Copyright IBM Corporation, 2007 * Author Balbir Singh <balbir@linux.vnet.ibm.com> * * Copyright 2007 OpenVZ SWsoft Inc * Author: Pavel Emelianov <xemul@openvz.org> */ #ifndef _LINUX_MEMCONTROL_H #define _LINUX_MEMCONTROL_H #include <linux/cgroup.h> #include <linux/vm_event_item.h> #include <linux/hardirq.h> #include <linux/jump_label.h> #include <linux/page_counter.h> #include <linux/vmpressure.h> #include <linux/eventfd.h> #include <linux/mm.h> #include <linux/vmstat.h> #include <linux/writeback.h> #include <linux/page-flags.h> struct mem_cgroup; struct obj_cgroup; struct page; struct mm_struct; struct kmem_cache; /* Cgroup-specific page state, on top of universal node page state */ enum memcg_stat_item { MEMCG_SWAP = NR_VM_NODE_STAT_ITEMS, MEMCG_SOCK, MEMCG_PERCPU_B, MEMCG_NR_STAT, }; enum memcg_memory_event { MEMCG_LOW, MEMCG_HIGH, MEMCG_MAX, MEMCG_OOM, MEMCG_OOM_KILL, MEMCG_SWAP_HIGH, MEMCG_SWAP_MAX, MEMCG_SWAP_FAIL, MEMCG_NR_MEMORY_EVENTS, }; struct mem_cgroup_reclaim_cookie { pg_data_t *pgdat; unsigned int generation; }; #ifdef CONFIG_MEMCG #define MEM_CGROUP_ID_SHIFT 16 #define MEM_CGROUP_ID_MAX USHRT_MAX struct mem_cgroup_id { int id; refcount_t ref; }; /* * Per memcg event counter is incremented at every pagein/pageout. With THP, * it will be incremented by the number of pages. This counter is used * to trigger some periodic events. This is straightforward and better * than using jiffies etc. to handle periodic memcg event. */ enum mem_cgroup_events_target { MEM_CGROUP_TARGET_THRESH, MEM_CGROUP_TARGET_SOFTLIMIT, MEM_CGROUP_NTARGETS, }; struct memcg_vmstats_percpu { /* Local (CPU and cgroup) page state & events */ long state[MEMCG_NR_STAT]; unsigned long events[NR_VM_EVENT_ITEMS]; /* Delta calculation for lockless upward propagation */ long state_prev[MEMCG_NR_STAT]; unsigned long events_prev[NR_VM_EVENT_ITEMS]; /* Cgroup1: threshold notifications & softlimit tree updates */ unsigned long nr_page_events; unsigned long targets[MEM_CGROUP_NTARGETS]; }; struct memcg_vmstats { /* Aggregated (CPU and subtree) page state & events */ long state[MEMCG_NR_STAT]; unsigned long events[NR_VM_EVENT_ITEMS]; /* Pending child counts during tree propagation */ long state_pending[MEMCG_NR_STAT]; unsigned long events_pending[NR_VM_EVENT_ITEMS]; }; struct mem_cgroup_reclaim_iter { struct mem_cgroup *position; /* scan generation, increased every round-trip */ unsigned int generation; }; /* * Bitmap and deferred work of shrinker::id corresponding to memcg-aware * shrinkers, which have elements charged to this memcg. */ struct shrinker_info { struct rcu_head rcu; atomic_long_t *nr_deferred; unsigned long *map; }; struct lruvec_stats_percpu { /* Local (CPU and cgroup) state */ long state[NR_VM_NODE_STAT_ITEMS]; /* Delta calculation for lockless upward propagation */ long state_prev[NR_VM_NODE_STAT_ITEMS]; }; struct lruvec_stats { /* Aggregated (CPU and subtree) state */ long state[NR_VM_NODE_STAT_ITEMS]; /* Pending child counts during tree propagation */ long state_pending[NR_VM_NODE_STAT_ITEMS]; }; /* * per-node information in memory controller. */ struct mem_cgroup_per_node { struct lruvec lruvec; struct lruvec_stats_percpu __percpu *lruvec_stats_percpu; struct lruvec_stats lruvec_stats; unsigned long lru_zone_size[MAX_NR_ZONES][NR_LRU_LISTS]; struct mem_cgroup_reclaim_iter iter; struct shrinker_info __rcu *shrinker_info; struct rb_node tree_node; /* RB tree node */ unsigned long usage_in_excess;/* Set to the value by which */ /* the soft limit is exceeded*/ bool on_tree; struct mem_cgroup *memcg; /* Back pointer, we cannot */ /* use container_of */ }; struct mem_cgroup_threshold { struct eventfd_ctx *eventfd; unsigned long threshold; }; /* For threshold */ struct mem_cgroup_threshold_ary { /* An array index points to threshold just below or equal to usage. */ int current_threshold; /* Size of entries[] */ unsigned int size; /* Array of thresholds */ struct mem_cgroup_threshold entries[]; }; struct mem_cgroup_thresholds { /* Primary thresholds array */ struct mem_cgroup_threshold_ary *primary; /* * Spare threshold array. * This is needed to make mem_cgroup_unregister_event() "never fail". * It must be able to store at least primary->size - 1 entries. */ struct mem_cgroup_threshold_ary *spare; }; enum memcg_kmem_state { KMEM_NONE, KMEM_ALLOCATED, KMEM_ONLINE, }; #if defined(CONFIG_SMP) struct memcg_padding { char x[0]; } ____cacheline_internodealigned_in_smp; #define MEMCG_PADDING(name) struct memcg_padding name #else #define MEMCG_PADDING(name) #endif /* * Remember four most recent foreign writebacks with dirty pages in this * cgroup. Inode sharing is expected to be uncommon and, even if we miss * one in a given round, we're likely to catch it later if it keeps * foreign-dirtying, so a fairly low count should be enough. * * See mem_cgroup_track_foreign_dirty_slowpath() for details. */ #define MEMCG_CGWB_FRN_CNT 4 struct memcg_cgwb_frn { u64 bdi_id; /* bdi->id of the foreign inode */ int memcg_id; /* memcg->css.id of foreign inode */ u64 at; /* jiffies_64 at the time of dirtying */ struct wb_completion done; /* tracks in-flight foreign writebacks */ }; /* * Bucket for arbitrarily byte-sized objects charged to a memory * cgroup. The bucket can be reparented in one piece when the cgroup * is destroyed, without having to round up the individual references * of all live memory objects in the wild. */ struct obj_cgroup { struct percpu_ref refcnt; struct mem_cgroup *memcg; atomic_t nr_charged_bytes; union { struct list_head list; /* protected by objcg_lock */ struct rcu_head rcu; }; }; /* * The memory controller data structure. The memory controller controls both * page cache and RSS per cgroup. We would eventually like to provide * statistics based on the statistics developed by Rik Van Riel for clock-pro, * to help the administrator determine what knobs to tune. */ struct mem_cgroup { struct cgroup_subsys_state css; /* Private memcg ID. Used to ID objects that outlive the cgroup */ struct mem_cgroup_id id; /* Accounted resources */ struct page_counter memory; /* Both v1 & v2 */ union { struct page_counter swap; /* v2 only */ struct page_counter memsw; /* v1 only */ }; /* Legacy consumer-oriented counters */ struct page_counter kmem; /* v1 only */ struct page_counter tcpmem; /* v1 only */ /* Range enforcement for interrupt charges */ struct work_struct high_work; unsigned long soft_limit; /* vmpressure notifications */ struct vmpressure vmpressure; /* * Should the OOM killer kill all belonging tasks, had it kill one? */ bool oom_group; /* protected by memcg_oom_lock */ bool oom_lock; int under_oom; int swappiness; /* OOM-Killer disable */ int oom_kill_disable; /* memory.events and memory.events.local */ struct cgroup_file events_file; struct cgroup_file events_local_file; /* handle for "memory.swap.events" */ struct cgroup_file swap_events_file; /* protect arrays of thresholds */ struct mutex thresholds_lock; /* thresholds for memory usage. RCU-protected */ struct mem_cgroup_thresholds thresholds; /* thresholds for mem+swap usage. RCU-protected */ struct mem_cgroup_thresholds memsw_thresholds; /* For oom notifier event fd */ struct list_head oom_notify; /* * Should we move charges of a task when a task is moved into this * mem_cgroup ? And what type of charges should we move ? */ unsigned long move_charge_at_immigrate; /* taken only while moving_account > 0 */ spinlock_t move_lock; unsigned long move_lock_flags; MEMCG_PADDING(_pad1_); /* memory.stat */ struct memcg_vmstats vmstats; /* memory.events */ atomic_long_t memory_events[MEMCG_NR_MEMORY_EVENTS]; atomic_long_t memory_events_local[MEMCG_NR_MEMORY_EVENTS]; /* * Hint of reclaim pressure for socket memroy management. Note * that this indicator should NOT be used in legacy cgroup mode * where socket memory is accounted/charged separately. */ unsigned long socket_pressure; /* Legacy tcp memory accounting */ bool tcpmem_active; int tcpmem_pressure; #ifdef CONFIG_MEMCG_KMEM int kmemcg_id; enum memcg_kmem_state kmem_state; struct obj_cgroup __rcu *objcg; /* list of inherited objcgs, protected by objcg_lock */ struct list_head objcg_list; #endif MEMCG_PADDING(_pad2_); /* * set > 0 if pages under this cgroup are moving to other cgroup. */ atomic_t moving_account; struct task_struct *move_lock_task; struct memcg_vmstats_percpu __percpu *vmstats_percpu; #ifdef CONFIG_CGROUP_WRITEBACK struct list_head cgwb_list; struct wb_domain cgwb_domain; struct memcg_cgwb_frn cgwb_frn[MEMCG_CGWB_FRN_CNT]; #endif /* List of events which userspace want to receive */ struct list_head event_list; spinlock_t event_list_lock; #ifdef CONFIG_TRANSPARENT_HUGEPAGE struct deferred_split deferred_split_queue; #endif struct mem_cgroup_per_node *nodeinfo[]; }; /* * size of first charge trial. "32" comes from vmscan.c's magic value. * TODO: maybe necessary to use big numbers in big irons. */ #define MEMCG_CHARGE_BATCH 32U extern struct mem_cgroup *root_mem_cgroup; enum page_memcg_data_flags { /* page->memcg_data is a pointer to an objcgs vector */ MEMCG_DATA_OBJCGS = (1UL << 0), /* page has been accounted as a non-slab kernel page */ MEMCG_DATA_KMEM = (1UL << 1), /* the next bit after the last actual flag */ __NR_MEMCG_DATA_FLAGS = (1UL << 2), }; #define MEMCG_DATA_FLAGS_MASK (__NR_MEMCG_DATA_FLAGS - 1) static inline bool PageMemcgKmem(struct page *page); /* * After the initialization objcg->memcg is always pointing at * a valid memcg, but can be atomically swapped to the parent memcg. * * The caller must ensure that the returned memcg won't be released: * e.g. acquire the rcu_read_lock or css_set_lock. */ static inline struct mem_cgroup *obj_cgroup_memcg(struct obj_cgroup *objcg) { return READ_ONCE(objcg->memcg); } /* * __page_memcg - get the memory cgroup associated with a non-kmem page * @page: a pointer to the page struct * * Returns a pointer to the memory cgroup associated with the page, * or NULL. This function assumes that the page is known to have a * proper memory cgroup pointer. It's not safe to call this function * against some type of pages, e.g. slab pages or ex-slab pages or * kmem pages. */ static inline struct mem_cgroup *__page_memcg(struct page *page) { unsigned long memcg_data = page->memcg_data; VM_BUG_ON_PAGE(PageSlab(page), page); VM_BUG_ON_PAGE(memcg_data & MEMCG_DATA_OBJCGS, page); VM_BUG_ON_PAGE(memcg_data & MEMCG_DATA_KMEM, page); return (struct mem_cgroup *)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); } /* * __page_objcg - get the object cgroup associated with a kmem page * @page: a pointer to the page struct * * Returns a pointer to the object cgroup associated with the page, * or NULL. This function assumes that the page is known to have a * proper object cgroup pointer. It's not safe to call this function * against some type of pages, e.g. slab pages or ex-slab pages or * LRU pages. */ static inline struct obj_cgroup *__page_objcg(struct page *page) { unsigned long memcg_data = page->memcg_data; VM_BUG_ON_PAGE(PageSlab(page), page); VM_BUG_ON_PAGE(memcg_data & MEMCG_DATA_OBJCGS, page); VM_BUG_ON_PAGE(!(memcg_data & MEMCG_DATA_KMEM), page); return (struct obj_cgroup *)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); } /* * page_memcg - get the memory cgroup associated with a page * @page: a pointer to the page struct * * Returns a pointer to the memory cgroup associated with the page, * or NULL. This function assumes that the page is known to have a * proper memory cgroup pointer. It's not safe to call this function * against some type of pages, e.g. slab pages or ex-slab pages. * * For a non-kmem page any of the following ensures page and memcg binding * stability: * * - the page lock * - LRU isolation * - lock_page_memcg() * - exclusive reference * * For a kmem page a caller should hold an rcu read lock to protect memcg * associated with a kmem page from being released. */ static inline struct mem_cgroup *page_memcg(struct page *page) { if (PageMemcgKmem(page)) return obj_cgroup_memcg(__page_objcg(page)); else return __page_memcg(page); } /* * page_memcg_rcu - locklessly get the memory cgroup associated with a page * @page: a pointer to the page struct * * Returns a pointer to the memory cgroup associated with the page, * or NULL. This function assumes that the page is known to have a * proper memory cgroup pointer. It's not safe to call this function * against some type of pages, e.g. slab pages or ex-slab pages. */ static inline struct mem_cgroup *page_memcg_rcu(struct page *page) { unsigned long memcg_data = READ_ONCE(page->memcg_data); VM_BUG_ON_PAGE(PageSlab(page), page); WARN_ON_ONCE(!rcu_read_lock_held()); if (memcg_data & MEMCG_DATA_KMEM) { struct obj_cgroup *objcg; objcg = (void *)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); return obj_cgroup_memcg(objcg); } return (struct mem_cgroup *)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); } /* * page_memcg_check - get the memory cgroup associated with a page * @page: a pointer to the page struct * * Returns a pointer to the memory cgroup associated with the page, * or NULL. This function unlike page_memcg() can take any page * as an argument. It has to be used in cases when it's not known if a page * has an associated memory cgroup pointer or an object cgroups vector or * an object cgroup. * * For a non-kmem page any of the following ensures page and memcg binding * stability: * * - the page lock * - LRU isolation * - lock_page_memcg() * - exclusive reference * * For a kmem page a caller should hold an rcu read lock to protect memcg * associated with a kmem page from being released. */ static inline struct mem_cgroup *page_memcg_check(struct page *page) { /* * Because page->memcg_data might be changed asynchronously * for slab pages, READ_ONCE() should be used here. */ unsigned long memcg_data = READ_ONCE(page->memcg_data); if (memcg_data & MEMCG_DATA_OBJCGS) return NULL; if (memcg_data & MEMCG_DATA_KMEM) { struct obj_cgroup *objcg; objcg = (void *)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); return obj_cgroup_memcg(objcg); } return (struct mem_cgroup *)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); } #ifdef CONFIG_MEMCG_KMEM /* * PageMemcgKmem - check if the page has MemcgKmem flag set * @page: a pointer to the page struct * * Checks if the page has MemcgKmem flag set. The caller must ensure that * the page has an associated memory cgroup. It's not safe to call this function * against some types of pages, e.g. slab pages. */ static inline bool PageMemcgKmem(struct page *page) { VM_BUG_ON_PAGE(page->memcg_data & MEMCG_DATA_OBJCGS, page); return page->memcg_data & MEMCG_DATA_KMEM; } /* * page_objcgs - get the object cgroups vector associated with a page * @page: a pointer to the page struct * * Returns a pointer to the object cgroups vector associated with the page, * or NULL. This function assumes that the page is known to have an * associated object cgroups vector. It's not safe to call this function * against pages, which might have an associated memory cgroup: e.g. * kernel stack pages. */ static inline struct obj_cgroup **page_objcgs(struct page *page) { unsigned long memcg_data = READ_ONCE(page->memcg_data); VM_BUG_ON_PAGE(memcg_data && !(memcg_data & MEMCG_DATA_OBJCGS), page); VM_BUG_ON_PAGE(memcg_data & MEMCG_DATA_KMEM, page); return (struct obj_cgroup **)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); } /* * page_objcgs_check - get the object cgroups vector associated with a page * @page: a pointer to the page struct * * Returns a pointer to the object cgroups vector associated with the page, * or NULL. This function is safe to use if the page can be directly associated * with a memory cgroup. */ static inline struct obj_cgroup **page_objcgs_check(struct page *page) { unsigned long memcg_data = READ_ONCE(page->memcg_data); if (!memcg_data || !(memcg_data & MEMCG_DATA_OBJCGS)) return NULL; VM_BUG_ON_PAGE(memcg_data & MEMCG_DATA_KMEM, page); return (struct obj_cgroup **)(memcg_data & ~MEMCG_DATA_FLAGS_MASK); } #else static inline bool PageMemcgKmem(struct page *page) { return false; } static inline struct obj_cgroup **page_objcgs(struct page *page) { return NULL; } static inline struct obj_cgroup **page_objcgs_check(struct page *page) { return NULL; } #endif static inline bool mem_cgroup_is_root(struct mem_cgroup *memcg) { return (memcg == root_mem_cgroup); } static inline bool mem_cgroup_disabled(void) { return !cgroup_subsys_enabled(memory_cgrp_subsys); } static inline void mem_cgroup_protection(struct mem_cgroup *root, struct mem_cgroup *memcg, unsigned long *min, unsigned long *low) { *min = *low = 0; if (mem_cgroup_disabled()) return; /* * There is no reclaim protection applied to a targeted reclaim. * We are special casing this specific case here because * mem_cgroup_protected calculation is not robust enough to keep * the protection invariant for calculated effective values for * parallel reclaimers with different reclaim target. This is * especially a problem for tail memcgs (as they have pages on LRU) * which would want to have effective values 0 for targeted reclaim * but a different value for external reclaim. * * Example * Let's have global and A's reclaim in parallel: * | * A (low=2G, usage = 3G, max = 3G, children_low_usage = 1.5G) * |\ * | C (low = 1G, usage = 2.5G) * B (low = 1G, usage = 0.5G) * * For the global reclaim * A.elow = A.low * B.elow = min(B.usage, B.low) because children_low_usage <= A.elow * C.elow = min(C.usage, C.low) * * With the effective values resetting we have A reclaim * A.elow = 0 * B.elow = B.low * C.elow = C.low * * If the global reclaim races with A's reclaim then * B.elow = C.elow = 0 because children_low_usage > A.elow) * is possible and reclaiming B would be violating the protection. * */ if (root == memcg) return; *min = READ_ONCE(memcg->memory.emin); *low = READ_ONCE(memcg->memory.elow); } void mem_cgroup_calculate_protection(struct mem_cgroup *root, struct mem_cgroup *memcg); static inline bool mem_cgroup_supports_protection(struct mem_cgroup *memcg) { /* * The root memcg doesn't account charges, and doesn't support * protection. */ return !mem_cgroup_disabled() && !mem_cgroup_is_root(memcg); } static inline bool mem_cgroup_below_low(struct mem_cgroup *memcg) { if (!mem_cgroup_supports_protection(memcg)) return false; return READ_ONCE(memcg->memory.elow) >= page_counter_read(&memcg->memory); } static inline bool mem_cgroup_below_min(struct mem_cgroup *memcg) { if (!mem_cgroup_supports_protection(memcg)) return false; return READ_ONCE(memcg->memory.emin) >= page_counter_read(&memcg->memory); } int __mem_cgroup_charge(struct page *page, struct mm_struct *mm, gfp_t gfp_mask); static inline int mem_cgroup_charge(struct page *page, struct mm_struct *mm, gfp_t gfp_mask) { if (mem_cgroup_disabled()) return 0; return __mem_cgroup_charge(page, mm, gfp_mask); } int mem_cgroup_swapin_charge_page(struct page *page, struct mm_struct *mm, gfp_t gfp, swp_entry_t entry); void mem_cgroup_swapin_uncharge_swap(swp_entry_t entry); void __mem_cgroup_uncharge(struct page *page); static inline void mem_cgroup_uncharge(struct page *page) { if (mem_cgroup_disabled()) return; __mem_cgroup_uncharge(page); } void __mem_cgroup_uncharge_list(struct list_head *page_list); static inline void mem_cgroup_uncharge_list(struct list_head *page_list) { if (mem_cgroup_disabled()) return; __mem_cgroup_uncharge_list(page_list); } void mem_cgroup_migrate(struct page *oldpage, struct page *newpage); /** * mem_cgroup_lruvec - get the lru list vector for a memcg & node * @memcg: memcg of the wanted lruvec * @pgdat: pglist_data * * Returns the lru list vector holding pages for a given @memcg & * @pgdat combination. This can be the node lruvec, if the memory * controller is disabled. */ static inline struct lruvec *mem_cgroup_lruvec(struct mem_cgroup *memcg, struct pglist_data *pgdat) { struct mem_cgroup_per_node *mz; struct lruvec *lruvec; if (mem_cgroup_disabled()) { lruvec = &pgdat->__lruvec; goto out; } if (!memcg) memcg = root_mem_cgroup; mz = memcg->nodeinfo[pgdat->node_id]; lruvec = &mz->lruvec; out: /* * Since a node can be onlined after the mem_cgroup was created, * we have to be prepared to initialize lruvec->pgdat here; * and if offlined then reonlined, we need to reinitialize it. */ if (unlikely(lruvec->pgdat != pgdat)) lruvec->pgdat = pgdat; return lruvec; } /** * mem_cgroup_page_lruvec - return lruvec for isolating/putting an LRU page * @page: the page * * This function relies on page->mem_cgroup being stable. */ static inline struct lruvec *mem_cgroup_page_lruvec(struct page *page) { pg_data_t *pgdat = page_pgdat(page); struct mem_cgroup *memcg = page_memcg(page); VM_WARN_ON_ONCE_PAGE(!memcg && !mem_cgroup_disabled(), page); return mem_cgroup_lruvec(memcg, pgdat); } struct mem_cgroup *mem_cgroup_from_task(struct task_struct *p); struct mem_cgroup *get_mem_cgroup_from_mm(struct mm_struct *mm); struct lruvec *lock_page_lruvec(struct page *page); struct lruvec *lock_page_lruvec_irq(struct page *page); struct lruvec *lock_page_lruvec_irqsave(struct page *page, unsigned long *flags); #ifdef CONFIG_DEBUG_VM void lruvec_memcg_debug(struct lruvec *lruvec, struct page *page); #else static inline void lruvec_memcg_debug(struct lruvec *lruvec, struct page *page) { } #endif static inline struct mem_cgroup *mem_cgroup_from_css(struct cgroup_subsys_state *css){ return css ? container_of(css, struct mem_cgroup, css) : NULL; } static inline bool obj_cgroup_tryget(struct obj_cgroup *objcg) { return percpu_ref_tryget(&objcg->refcnt); } static inline void obj_cgroup_get(struct obj_cgroup *objcg) { percpu_ref_get(&objcg->refcnt); } static inline void obj_cgroup_get_many(struct obj_cgroup *objcg, unsigned long nr) { percpu_ref_get_many(&objcg->refcnt, nr); } static inline void obj_cgroup_put(struct obj_cgroup *objcg) { percpu_ref_put(&objcg->refcnt); } static inline void mem_cgroup_put(struct mem_cgroup *memcg) { if (memcg) css_put(&memcg->css); } #define mem_cgroup_from_counter(counter, member) \ container_of(counter, struct mem_cgroup, member) struct mem_cgroup *mem_cgroup_iter(struct mem_cgroup *, struct mem_cgroup *, struct mem_cgroup_reclaim_cookie *); void mem_cgroup_iter_break(struct mem_cgroup *, struct mem_cgroup *); int mem_cgroup_scan_tasks(struct mem_cgroup *, int (*)(struct task_struct *, void *), void *); static inline unsigned short mem_cgroup_id(struct mem_cgroup *memcg) { if (mem_cgroup_disabled()) return 0; return memcg->id.id; } struct mem_cgroup *mem_cgroup_from_id(unsigned short id); static inline struct mem_cgroup *mem_cgroup_from_seq(struct seq_file *m) { return mem_cgroup_from_css(seq_css(m)); } static inline struct mem_cgroup *lruvec_memcg(struct lruvec *lruvec) { struct mem_cgroup_per_node *mz; if (mem_cgroup_disabled()) return NULL; mz = container_of(lruvec, struct mem_cgroup_per_node, lruvec); return mz->memcg; } /** * parent_mem_cgroup - find the accounting parent of a memcg * @memcg: memcg whose parent to find * * Returns the parent memcg, or NULL if this is the root or the memory * controller is in legacy no-hierarchy mode. */ static inline struct mem_cgroup *parent_mem_cgroup(struct mem_cgroup *memcg) { if (!memcg->memory.parent) return NULL; return mem_cgroup_from_counter(memcg->memory.parent, memory); } static inline bool mem_cgroup_is_descendant(struct mem_cgroup *memcg, struct mem_cgroup *root) { if (root == memcg) return true; return cgroup_is_descendant(memcg->css.cgroup, root->css.cgroup); } static inline bool mm_match_cgroup(struct mm_struct *mm, struct mem_cgroup *memcg) { struct mem_cgroup *task_memcg; bool match = false; rcu_read_lock(); task_memcg = mem_cgroup_from_task(rcu_dereference(mm->owner)); if (task_memcg) match = mem_cgroup_is_descendant(task_memcg, memcg); rcu_read_unlock(); return match; } struct cgroup_subsys_state *mem_cgroup_css_from_page(struct page *page); ino_t page_cgroup_ino(struct page *page); static inline bool mem_cgroup_online(struct mem_cgroup *memcg) { if (mem_cgroup_disabled()) return true; return !!(memcg->css.flags & CSS_ONLINE); } void mem_cgroup_update_lru_size(struct lruvec *lruvec, enum lru_list lru, int zid, int nr_pages); static inline unsigned long mem_cgroup_get_zone_lru_size(struct lruvec *lruvec, enum lru_list lru, int zone_idx) { struct mem_cgroup_per_node *mz; mz = container_of(lruvec, struct mem_cgroup_per_node, lruvec); return READ_ONCE(mz->lru_zone_size[zone_idx][lru]); } void mem_cgroup_handle_over_high(void); unsigned long mem_cgroup_get_max(struct mem_cgroup *memcg); unsigned long mem_cgroup_size(struct mem_cgroup *memcg); void mem_cgroup_print_oom_context(struct mem_cgroup *memcg, struct task_struct *p); void mem_cgroup_print_oom_meminfo(struct mem_cgroup *memcg); static inline void mem_cgroup_enter_user_fault(void) { WARN_ON(current->in_user_fault); current->in_user_fault = 1; } static inline void mem_cgroup_exit_user_fault(void) { WARN_ON(!current->in_user_fault); current->in_user_fault = 0; } static inline bool task_in_memcg_oom(struct task_struct *p) { return p->memcg_in_oom; } bool mem_cgroup_oom_synchronize(bool wait); struct mem_cgroup *mem_cgroup_get_oom_group(struct task_struct *victim, struct mem_cgroup *oom_domain); void mem_cgroup_print_oom_group(struct mem_cgroup *memcg); #ifdef CONFIG_MEMCG_SWAP extern bool cgroup_memory_noswap; #endif void lock_page_memcg(struct page *page); void unlock_page_memcg(struct page *page); void __mod_memcg_state(struct mem_cgroup *memcg, int idx, int val); /* idx can be of type enum memcg_stat_item or node_stat_item */ static inline void mod_memcg_state(struct mem_cgroup *memcg, int idx, int val) { unsigned long flags; local_irq_save(flags); __mod_memcg_state(memcg, idx, val); local_irq_restore(flags); } static inline unsigned long memcg_page_state(struct mem_cgroup *memcg, int idx) { long x = READ_ONCE(memcg->vmstats.state[idx]); #ifdef CONFIG_SMP if (x < 0) x = 0; #endif return x; } static inline unsigned long lruvec_page_state(struct lruvec *lruvec, enum node_stat_item idx) { struct mem_cgroup_per_node *pn; long x; if (mem_cgroup_disabled()) return node_page_state(lruvec_pgdat(lruvec), idx); pn = container_of(lruvec, struct mem_cgroup_per_node, lruvec); x = READ_ONCE(pn->lruvec_stats.state[idx]); #ifdef CONFIG_SMP if (x < 0) x = 0; #endif return x; } static inline unsigned long lruvec_page_state_local(struct lruvec *lruvec, enum node_stat_item idx) { struct mem_cgroup_per_node *pn; long x = 0; int cpu; if (mem_cgroup_disabled()) return node_page_state(lruvec_pgdat(lruvec), idx); pn = container_of(lruvec, struct mem_cgroup_per_node, lruvec); for_each_possible_cpu(cpu) x += per_cpu(pn->lruvec_stats_percpu->state[idx], cpu); #ifdef CONFIG_SMP if (x < 0) x = 0; #endif return x; } void mem_cgroup_flush_stats(void); void mem_cgroup_flush_stats_delayed(void); void __mod_memcg_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val); void __mod_lruvec_kmem_state(void *p, enum node_stat_item idx, int val); static inline void mod_lruvec_kmem_state(void *p, enum node_stat_item idx, int val) { unsigned long flags; local_irq_save(flags); __mod_lruvec_kmem_state(p, idx, val); local_irq_restore(flags); } static inline void mod_memcg_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val) { unsigned long flags; local_irq_save(flags); __mod_memcg_lruvec_state(lruvec, idx, val); local_irq_restore(flags); } void __count_memcg_events(struct mem_cgroup *memcg, enum vm_event_item idx, unsigned long count); static inline void count_memcg_events(struct mem_cgroup *memcg, enum vm_event_item idx, unsigned long count) { unsigned long flags; local_irq_save(flags); __count_memcg_events(memcg, idx, count); local_irq_restore(flags); } static inline void count_memcg_page_event(struct page *page, enum vm_event_item idx) { struct mem_cgroup *memcg = page_memcg(page); if (memcg) count_memcg_events(memcg, idx, 1); } static inline void count_memcg_event_mm(struct mm_struct *mm, enum vm_event_item idx) { struct mem_cgroup *memcg; if (mem_cgroup_disabled()) return; rcu_read_lock(); memcg = mem_cgroup_from_task(rcu_dereference(mm->owner)); if (likely(memcg)) count_memcg_events(memcg, idx, 1); rcu_read_unlock(); } static inline void memcg_memory_event(struct mem_cgroup *memcg, enum memcg_memory_event event) { bool swap_event = event == MEMCG_SWAP_HIGH || event == MEMCG_SWAP_MAX || event == MEMCG_SWAP_FAIL; atomic_long_inc(&memcg->memory_events_local[event]); if (!swap_event) cgroup_file_notify(&memcg->events_local_file); do { atomic_long_inc(&memcg->memory_events[event]); if (swap_event) cgroup_file_notify(&memcg->swap_events_file); else cgroup_file_notify(&memcg->events_file); if (!cgroup_subsys_on_dfl(memory_cgrp_subsys)) break; if (cgrp_dfl_root.flags & CGRP_ROOT_MEMORY_LOCAL_EVENTS) break; } while ((memcg = parent_mem_cgroup(memcg)) && !mem_cgroup_is_root(memcg)); } static inline void memcg_memory_event_mm(struct mm_struct *mm, enum memcg_memory_event event) { struct mem_cgroup *memcg; if (mem_cgroup_disabled()) return; rcu_read_lock(); memcg = mem_cgroup_from_task(rcu_dereference(mm->owner)); if (likely(memcg)) memcg_memory_event(memcg, event); rcu_read_unlock(); } void split_page_memcg(struct page *head, unsigned int nr); unsigned long mem_cgroup_soft_limit_reclaim(pg_data_t *pgdat, int order, gfp_t gfp_mask, unsigned long *total_scanned); #else /* CONFIG_MEMCG */ #define MEM_CGROUP_ID_SHIFT 0 #define MEM_CGROUP_ID_MAX 0 static inline struct mem_cgroup *page_memcg(struct page *page) { return NULL; } static inline struct mem_cgroup *page_memcg_rcu(struct page *page) { WARN_ON_ONCE(!rcu_read_lock_held()); return NULL; } static inline struct mem_cgroup *page_memcg_check(struct page *page) { return NULL; } static inline bool PageMemcgKmem(struct page *page) { return false; } static inline bool mem_cgroup_is_root(struct mem_cgroup *memcg) { return true; } static inline bool mem_cgroup_disabled(void) { return true; } static inline void memcg_memory_event(struct mem_cgroup *memcg, enum memcg_memory_event event) { } static inline void memcg_memory_event_mm(struct mm_struct *mm, enum memcg_memory_event event) { } static inline void mem_cgroup_protection(struct mem_cgroup *root, struct mem_cgroup *memcg, unsigned long *min, unsigned long *low) { *min = *low = 0; } static inline void mem_cgroup_calculate_protection(struct mem_cgroup *root, struct mem_cgroup *memcg) { } static inline bool mem_cgroup_below_low(struct mem_cgroup *memcg) { return false; } static inline bool mem_cgroup_below_min(struct mem_cgroup *memcg) { return false; } static inline int mem_cgroup_charge(struct page *page, struct mm_struct *mm, gfp_t gfp_mask) { return 0; } static inline int mem_cgroup_swapin_charge_page(struct page *page, struct mm_struct *mm, gfp_t gfp, swp_entry_t entry) { return 0; } static inline void mem_cgroup_swapin_uncharge_swap(swp_entry_t entry) { } static inline void mem_cgroup_uncharge(struct page *page) { } static inline void mem_cgroup_uncharge_list(struct list_head *page_list) { } static inline void mem_cgroup_migrate(struct page *old, struct page *new) { } static inline struct lruvec *mem_cgroup_lruvec(struct mem_cgroup *memcg, struct pglist_data *pgdat) { return &pgdat->__lruvec; } static inline struct lruvec *mem_cgroup_page_lruvec(struct page *page) { pg_data_t *pgdat = page_pgdat(page); return &pgdat->__lruvec; } static inline void lruvec_memcg_debug(struct lruvec *lruvec, struct page *page) { } static inline struct mem_cgroup *parent_mem_cgroup(struct mem_cgroup *memcg) { return NULL; } static inline bool mm_match_cgroup(struct mm_struct *mm, struct mem_cgroup *memcg) { return true; } static inline struct mem_cgroup *get_mem_cgroup_from_mm(struct mm_struct *mm) { return NULL; } static inline struct mem_cgroup *mem_cgroup_from_css(struct cgroup_subsys_state *css) { return NULL; } static inline void mem_cgroup_put(struct mem_cgroup *memcg) { } static inline struct lruvec *lock_page_lruvec(struct page *page) { struct pglist_data *pgdat = page_pgdat(page); spin_lock(&pgdat->__lruvec.lru_lock); return &pgdat->__lruvec; } static inline struct lruvec *lock_page_lruvec_irq(struct page *page) { struct pglist_data *pgdat = page_pgdat(page); spin_lock_irq(&pgdat->__lruvec.lru_lock); return &pgdat->__lruvec; } static inline struct lruvec *lock_page_lruvec_irqsave(struct page *page, unsigned long *flagsp) { struct pglist_data *pgdat = page_pgdat(page); spin_lock_irqsave(&pgdat->__lruvec.lru_lock, *flagsp); return &pgdat->__lruvec; } static inline struct mem_cgroup * mem_cgroup_iter(struct mem_cgroup *root, struct mem_cgroup *prev, struct mem_cgroup_reclaim_cookie *reclaim) { return NULL; } static inline void mem_cgroup_iter_break(struct mem_cgroup *root, struct mem_cgroup *prev) { } static inline int mem_cgroup_scan_tasks(struct mem_cgroup *memcg, int (*fn)(struct task_struct *, void *), void *arg) { return 0; } static inline unsigned short mem_cgroup_id(struct mem_cgroup *memcg) { return 0; } static inline struct mem_cgroup *mem_cgroup_from_id(unsigned short id) { WARN_ON_ONCE(id); /* XXX: This should always return root_mem_cgroup */ return NULL; } static inline struct mem_cgroup *mem_cgroup_from_seq(struct seq_file *m) { return NULL; } static inline struct mem_cgroup *lruvec_memcg(struct lruvec *lruvec) { return NULL; } static inline bool mem_cgroup_online(struct mem_cgroup *memcg) { return true; } static inline unsigned long mem_cgroup_get_zone_lru_size(struct lruvec *lruvec, enum lru_list lru, int zone_idx) { return 0; } static inline unsigned long mem_cgroup_get_max(struct mem_cgroup *memcg) { return 0; } static inline unsigned long mem_cgroup_size(struct mem_cgroup *memcg) { return 0; } static inline void mem_cgroup_print_oom_context(struct mem_cgroup *memcg, struct task_struct *p) { } static inline void mem_cgroup_print_oom_meminfo(struct mem_cgroup *memcg) { } static inline void lock_page_memcg(struct page *page) { } static inline void unlock_page_memcg(struct page *page) { } static inline void mem_cgroup_handle_over_high(void) { } static inline void mem_cgroup_enter_user_fault(void) { } static inline void mem_cgroup_exit_user_fault(void) { } static inline bool task_in_memcg_oom(struct task_struct *p) { return false; } static inline bool mem_cgroup_oom_synchronize(bool wait) { return false; } static inline struct mem_cgroup *mem_cgroup_get_oom_group( struct task_struct *victim, struct mem_cgroup *oom_domain) { return NULL; } static inline void mem_cgroup_print_oom_group(struct mem_cgroup *memcg) { } static inline void __mod_memcg_state(struct mem_cgroup *memcg, int idx, int nr) { } static inline void mod_memcg_state(struct mem_cgroup *memcg, int idx, int nr) { } static inline unsigned long memcg_page_state(struct mem_cgroup *memcg, int idx) { return 0; } static inline unsigned long lruvec_page_state(struct lruvec *lruvec, enum node_stat_item idx) { return node_page_state(lruvec_pgdat(lruvec), idx); } static inline unsigned long lruvec_page_state_local(struct lruvec *lruvec, enum node_stat_item idx) { return node_page_state(lruvec_pgdat(lruvec), idx); } static inline void mem_cgroup_flush_stats(void) { } static inline void mem_cgroup_flush_stats_delayed(void) { } static inline void __mod_memcg_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, int val) { } static inline void __mod_lruvec_kmem_state(void *p, enum node_stat_item idx, int val) { struct page *page = virt_to_head_page(p); __mod_node_page_state(page_pgdat(page), idx, val); } static inline void mod_lruvec_kmem_state(void *p, enum node_stat_item idx, int val) { struct page *page = virt_to_head_page(p); mod_node_page_state(page_pgdat(page), idx, val); } static inline void count_memcg_events(struct mem_cgroup *memcg, enum vm_event_item idx, unsigned long count) { } static inline void __count_memcg_events(struct mem_cgroup *memcg, enum vm_event_item idx, unsigned long count) { } static inline void count_memcg_page_event(struct page *page, int idx) { } static inline void count_memcg_event_mm(struct mm_struct *mm, enum vm_event_item idx) { } static inline void split_page_memcg(struct page *head, unsigned int nr) { } static inline unsigned long mem_cgroup_soft_limit_reclaim(pg_data_t *pgdat, int order, gfp_t gfp_mask, unsigned long *total_scanned) { return 0; } #endif /* CONFIG_MEMCG */ static inline void __inc_lruvec_kmem_state(void *p, enum node_stat_item idx) { __mod_lruvec_kmem_state(p, idx, 1); } static inline void __dec_lruvec_kmem_state(void *p, enum node_stat_item idx) { __mod_lruvec_kmem_state(p, idx, -1); } static inline struct lruvec *parent_lruvec(struct lruvec *lruvec) { struct mem_cgroup *memcg; memcg = lruvec_memcg(lruvec); if (!memcg) return NULL; memcg = parent_mem_cgroup(memcg); if (!memcg) return NULL; return mem_cgroup_lruvec(memcg, lruvec_pgdat(lruvec)); } static inline void unlock_page_lruvec(struct lruvec *lruvec) { spin_unlock(&lruvec->lru_lock); } static inline void unlock_page_lruvec_irq(struct lruvec *lruvec) { spin_unlock_irq(&lruvec->lru_lock); } static inline void unlock_page_lruvec_irqrestore(struct lruvec *lruvec, unsigned long flags) { spin_unlock_irqrestore(&lruvec->lru_lock, flags); } /* Test requires a stable page->memcg binding, see page_memcg() */ static inline bool page_matches_lruvec(struct page *page, struct lruvec *lruvec) { return lruvec_pgdat(lruvec) == page_pgdat(page) && lruvec_memcg(lruvec) == page_memcg(page); } /* Don't lock again iff page's lruvec locked */ static inline struct lruvec *relock_page_lruvec_irq(struct page *page, struct lruvec *locked_lruvec) { if (locked_lruvec) { if (page_matches_lruvec(page, locked_lruvec)) return locked_lruvec; unlock_page_lruvec_irq(locked_lruvec); } return lock_page_lruvec_irq(page); } /* Don't lock again iff page's lruvec locked */ static inline struct lruvec *relock_page_lruvec_irqsave(struct page *page, struct lruvec *locked_lruvec, unsigned long *flags) { if (locked_lruvec) { if (page_matches_lruvec(page, locked_lruvec)) return locked_lruvec; unlock_page_lruvec_irqrestore(locked_lruvec, *flags); } return lock_page_lruvec_irqsave(page, flags); } #ifdef CONFIG_CGROUP_WRITEBACK struct wb_domain *mem_cgroup_wb_domain(struct bdi_writeback *wb); void mem_cgroup_wb_stats(struct bdi_writeback *wb, unsigned long *pfilepages, unsigned long *pheadroom, unsigned long *pdirty, unsigned long *pwriteback); void mem_cgroup_track_foreign_dirty_slowpath(struct page *page, struct bdi_writeback *wb); static inline void mem_cgroup_track_foreign_dirty(struct page *page, struct bdi_writeback *wb) { if (mem_cgroup_disabled()) return; if (unlikely(&page_memcg(page)->css != wb->memcg_css)) mem_cgroup_track_foreign_dirty_slowpath(page, wb); } void mem_cgroup_flush_foreign(struct bdi_writeback *wb); #else /* CONFIG_CGROUP_WRITEBACK */ static inline struct wb_domain *mem_cgroup_wb_domain(struct bdi_writeback *wb) { return NULL; } static inline void mem_cgroup_wb_stats(struct bdi_writeback *wb, unsigned long *pfilepages, unsigned long *pheadroom, unsigned long *pdirty, unsigned long *pwriteback) { } static inline void mem_cgroup_track_foreign_dirty(struct page *page, struct bdi_writeback *wb) { } static inline void mem_cgroup_flush_foreign(struct bdi_writeback *wb) { } #endif /* CONFIG_CGROUP_WRITEBACK */ struct sock; bool mem_cgroup_charge_skmem(struct mem_cgroup *memcg, unsigned int nr_pages, gfp_t gfp_mask); void mem_cgroup_uncharge_skmem(struct mem_cgroup *memcg, unsigned int nr_pages); #ifdef CONFIG_MEMCG extern struct static_key_false memcg_sockets_enabled_key; #define mem_cgroup_sockets_enabled static_branch_unlikely(&memcg_sockets_enabled_key) void mem_cgroup_sk_alloc(struct sock *sk); void mem_cgroup_sk_free(struct sock *sk); static inline bool mem_cgroup_under_socket_pressure(struct mem_cgroup *memcg) { if (!cgroup_subsys_on_dfl(memory_cgrp_subsys)) return !!memcg->tcpmem_pressure; do { if (time_before(jiffies, memcg->socket_pressure)) return true; } while ((memcg = parent_mem_cgroup(memcg))); return false; } int alloc_shrinker_info(struct mem_cgroup *memcg); void free_shrinker_info(struct mem_cgroup *memcg); void set_shrinker_bit(struct mem_cgroup *memcg, int nid, int shrinker_id); void reparent_shrinker_deferred(struct mem_cgroup *memcg); #else #define mem_cgroup_sockets_enabled 0 static inline void mem_cgroup_sk_alloc(struct sock *sk) { }; static inline void mem_cgroup_sk_free(struct sock *sk) { }; static inline bool mem_cgroup_under_socket_pressure(struct mem_cgroup *memcg) { return false; } static inline void set_shrinker_bit(struct mem_cgroup *memcg, int nid, int shrinker_id) { } #endif #ifdef CONFIG_MEMCG_KMEM bool mem_cgroup_kmem_disabled(void); int __memcg_kmem_charge_page(struct page *page, gfp_t gfp, int order); void __memcg_kmem_uncharge_page(struct page *page, int order); struct obj_cgroup *get_obj_cgroup_from_current(void); int obj_cgroup_charge(struct obj_cgroup *objcg, gfp_t gfp, size_t size); void obj_cgroup_uncharge(struct obj_cgroup *objcg, size_t size); extern struct static_key_false memcg_kmem_enabled_key; extern int memcg_nr_cache_ids; void memcg_get_cache_ids(void); void memcg_put_cache_ids(void); /* * Helper macro to loop through all memcg-specific caches. Callers must still * check if the cache is valid (it is either valid or NULL). * the slab_mutex must be held when looping through those caches */ #define for_each_memcg_cache_index(_idx) \ for ((_idx) = 0; (_idx) < memcg_nr_cache_ids; (_idx)++) static inline bool memcg_kmem_enabled(void) { return static_branch_likely(&memcg_kmem_enabled_key); } static inline int memcg_kmem_charge_page(struct page *page, gfp_t gfp, int order) { if (memcg_kmem_enabled()) return __memcg_kmem_charge_page(page, gfp, order); return 0; } static inline void memcg_kmem_uncharge_page(struct page *page, int order) { if (memcg_kmem_enabled()) __memcg_kmem_uncharge_page(page, order); } /* * A helper for accessing memcg's kmem_id, used for getting * corresponding LRU lists. */ static inline int memcg_cache_id(struct mem_cgroup *memcg) { return memcg ? memcg->kmemcg_id : -1; } struct mem_cgroup *mem_cgroup_from_obj(void *p); #else static inline bool mem_cgroup_kmem_disabled(void) { return true; } static inline int memcg_kmem_charge_page(struct page *page, gfp_t gfp, int order) { return 0; } static inline void memcg_kmem_uncharge_page(struct page *page, int order) { } static inline int __memcg_kmem_charge_page(struct page *page, gfp_t gfp, int order) { return 0; } static inline void __memcg_kmem_uncharge_page(struct page *page, int order) { } #define for_each_memcg_cache_index(_idx) \ for (; NULL; ) static inline bool memcg_kmem_enabled(void) { return false; } static inline int memcg_cache_id(struct mem_cgroup *memcg) { return -1; } static inline void memcg_get_cache_ids(void) { } static inline void memcg_put_cache_ids(void) { } static inline struct mem_cgroup *mem_cgroup_from_obj(void *p) { return NULL; } #endif /* CONFIG_MEMCG_KMEM */ #endif /* _LINUX_MEMCONTROL_H */ PK ! �i�� � raid/pq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* -*- linux-c -*- ------------------------------------------------------- * * * Copyright 2003 H. Peter Anvin - All Rights Reserved * * ----------------------------------------------------------------------- */ #ifndef LINUX_RAID_RAID6_H #define LINUX_RAID_RAID6_H #ifdef __KERNEL__ /* Set to 1 to use kernel-wide empty_zero_page */ #define RAID6_USE_EMPTY_ZERO_PAGE 0 #include <linux/blkdev.h> /* We need a pre-zeroed page... if we don't want to use the kernel-provided one define it here */ #if RAID6_USE_EMPTY_ZERO_PAGE # define raid6_empty_zero_page empty_zero_page #else extern const char raid6_empty_zero_page[PAGE_SIZE]; #endif #else /* ! __KERNEL__ */ /* Used for testing in user space */ #include <errno.h> #include <inttypes.h> #include <stddef.h> #include <string.h> #include <sys/mman.h> #include <sys/time.h> #include <sys/types.h> /* Not standard, but glibc defines it */ #define BITS_PER_LONG __WORDSIZE typedef uint8_t u8; typedef uint16_t u16; typedef uint32_t u32; typedef uint64_t u64; #ifndef PAGE_SIZE # define PAGE_SIZE 4096 #endif #ifndef PAGE_SHIFT # define PAGE_SHIFT 12 #endif extern const char raid6_empty_zero_page[PAGE_SIZE]; #define __init #define __exit #ifndef __attribute_const__ # define __attribute_const__ __attribute__((const)) #endif #define noinline __attribute__((noinline)) #define preempt_enable() #define preempt_disable() #define cpu_has_feature(x) 1 #define enable_kernel_altivec() #define disable_kernel_altivec() #undef EXPORT_SYMBOL #define EXPORT_SYMBOL(sym) #undef EXPORT_SYMBOL_GPL #define EXPORT_SYMBOL_GPL(sym) #define MODULE_LICENSE(licence) #define MODULE_DESCRIPTION(desc) #define subsys_initcall(x) #define module_exit(x) #define IS_ENABLED(x) (x) #define CONFIG_RAID6_PQ_BENCHMARK 1 #endif /* __KERNEL__ */ /* Routine choices */ struct raid6_calls { void (*gen_syndrome)(int, size_t, void **); void (*xor_syndrome)(int, int, int, size_t, void **); int (*valid)(void); /* Returns 1 if this routine set is usable */ const char *name; /* Name of this routine set */ int prefer; /* Has special performance attribute */ }; /* Selected algorithm */ extern struct raid6_calls raid6_call; /* Various routine sets */ extern const struct raid6_calls raid6_intx1; extern const struct raid6_calls raid6_intx2; extern const struct raid6_calls raid6_intx4; extern const struct raid6_calls raid6_intx8; extern const struct raid6_calls raid6_intx16; extern const struct raid6_calls raid6_intx32; extern const struct raid6_calls raid6_mmxx1; extern const struct raid6_calls raid6_mmxx2; extern const struct raid6_calls raid6_sse1x1; extern const struct raid6_calls raid6_sse1x2; extern const struct raid6_calls raid6_sse2x1; extern const struct raid6_calls raid6_sse2x2; extern const struct raid6_calls raid6_sse2x4; extern const struct raid6_calls raid6_altivec1; extern const struct raid6_calls raid6_altivec2; extern const struct raid6_calls raid6_altivec4; extern const struct raid6_calls raid6_altivec8; extern const struct raid6_calls raid6_avx2x1; extern const struct raid6_calls raid6_avx2x2; extern const struct raid6_calls raid6_avx2x4; extern const struct raid6_calls raid6_avx512x1; extern const struct raid6_calls raid6_avx512x2; extern const struct raid6_calls raid6_avx512x4; extern const struct raid6_calls raid6_s390vx8; extern const struct raid6_calls raid6_vpermxor1; extern const struct raid6_calls raid6_vpermxor2; extern const struct raid6_calls raid6_vpermxor4; extern const struct raid6_calls raid6_vpermxor8; struct raid6_recov_calls { void (*data2)(int, size_t, int, int, void **); void (*datap)(int, size_t, int, void **); int (*valid)(void); const char *name; int priority; }; extern const struct raid6_recov_calls raid6_recov_intx1; extern const struct raid6_recov_calls raid6_recov_ssse3; extern const struct raid6_recov_calls raid6_recov_avx2; extern const struct raid6_recov_calls raid6_recov_avx512; extern const struct raid6_recov_calls raid6_recov_s390xc; extern const struct raid6_recov_calls raid6_recov_neon; extern const struct raid6_calls raid6_neonx1; extern const struct raid6_calls raid6_neonx2; extern const struct raid6_calls raid6_neonx4; extern const struct raid6_calls raid6_neonx8; /* Algorithm list */ extern const struct raid6_calls * const raid6_algos[]; extern const struct raid6_recov_calls *const raid6_recov_algos[]; int raid6_select_algo(void); /* Return values from chk_syndrome */ #define RAID6_OK 0 #define RAID6_P_BAD 1 #define RAID6_Q_BAD 2 #define RAID6_PQ_BAD 3 /* Galois field tables */ extern const u8 raid6_gfmul[256][256] __attribute__((aligned(256))); extern const u8 raid6_vgfmul[256][32] __attribute__((aligned(256))); extern const u8 raid6_gfexp[256] __attribute__((aligned(256))); extern const u8 raid6_gflog[256] __attribute__((aligned(256))); extern const u8 raid6_gfinv[256] __attribute__((aligned(256))); extern const u8 raid6_gfexi[256] __attribute__((aligned(256))); /* Recovery routines */ extern void (*raid6_2data_recov)(int disks, size_t bytes, int faila, int failb, void **ptrs); extern void (*raid6_datap_recov)(int disks, size_t bytes, int faila, void **ptrs); void raid6_dual_recov(int disks, size_t bytes, int faila, int failb, void **ptrs); /* Some definitions to allow code to be compiled for testing in userspace */ #ifndef __KERNEL__ # define jiffies raid6_jiffies() # define printk printf # define pr_err(format, ...) fprintf(stderr, format, ## __VA_ARGS__) # define pr_info(format, ...) fprintf(stdout, format, ## __VA_ARGS__) # define GFP_KERNEL 0 # define __get_free_pages(x, y) ((unsigned long)mmap(NULL, PAGE_SIZE << (y), \ PROT_READ|PROT_WRITE, \ MAP_PRIVATE|MAP_ANONYMOUS,\ 0, 0)) # define free_pages(x, y) munmap((void *)(x), PAGE_SIZE << (y)) static inline void cpu_relax(void) { /* Nothing */ } #undef HZ #define HZ 1000 static inline uint32_t raid6_jiffies(void) { struct timeval tv; gettimeofday(&tv, NULL); return tv.tv_sec*1000 + tv.tv_usec/1000; } #endif /* ! __KERNEL__ */ #endif /* LINUX_RAID_RAID6_H */ PK ! J�� � raid/xor.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _XOR_H #define _XOR_H #define MAX_XOR_BLOCKS 4 extern void xor_blocks(unsigned int count, unsigned int bytes, void *dest, void **srcs); struct xor_block_template { struct xor_block_template *next; const char *name; int speed; void (*do_2)(unsigned long, unsigned long *, unsigned long *); void (*do_3)(unsigned long, unsigned long *, unsigned long *, unsigned long *); void (*do_4)(unsigned long, unsigned long *, unsigned long *, unsigned long *, unsigned long *); void (*do_5)(unsigned long, unsigned long *, unsigned long *, unsigned long *, unsigned long *, unsigned long *); }; #endif PK ! }�>�� � raid/detect.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ void md_autodetect_dev(dev_t dev); #ifdef CONFIG_BLK_DEV_MD void md_run_setup(void); #else static inline void md_run_setup(void) { } #endif PK ! �1��5 �5 skmsg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2017 - 2018 Covalent IO, Inc. http://covalent.io */ #ifndef _LINUX_SKMSG_H #define _LINUX_SKMSG_H #include <linux/bpf.h> #include <linux/filter.h> #include <linux/scatterlist.h> #include <linux/skbuff.h> #include <net/sock.h> #include <net/tcp.h> #include <net/strparser.h> #define MAX_MSG_FRAGS MAX_SKB_FRAGS #define NR_MSG_FRAG_IDS (MAX_MSG_FRAGS + 1) enum __sk_action { __SK_DROP = 0, __SK_PASS, __SK_REDIRECT, __SK_NONE, }; struct sk_msg_sg { u32 start; u32 curr; u32 end; u32 size; u32 copybreak; unsigned long copy; /* The extra two elements: * 1) used for chaining the front and sections when the list becomes * partitioned (e.g. end < start). The crypto APIs require the * chaining; * 2) to chain tailer SG entries after the message. */ struct scatterlist data[MAX_MSG_FRAGS + 2]; }; static_assert(BITS_PER_LONG >= NR_MSG_FRAG_IDS); /* UAPI in filter.c depends on struct sk_msg_sg being first element. */ struct sk_msg { struct sk_msg_sg sg; void *data; void *data_end; u32 apply_bytes; u32 cork_bytes; u32 flags; struct sk_buff *skb; struct sock *sk_redir; struct sock *sk; struct list_head list; }; struct sk_psock_progs { struct bpf_prog *msg_parser; struct bpf_prog *stream_parser; struct bpf_prog *stream_verdict; struct bpf_prog *skb_verdict; }; enum sk_psock_state_bits { SK_PSOCK_TX_ENABLED, SK_PSOCK_RX_STRP_ENABLED, }; struct sk_psock_link { struct list_head list; struct bpf_map *map; void *link_raw; }; struct sk_psock_work_state { u32 len; u32 off; }; struct sk_psock { struct sock *sk; struct sock *sk_redir; u32 apply_bytes; u32 cork_bytes; u32 eval; bool redir_ingress; /* undefined if sk_redir is null */ struct sk_msg *cork; struct sk_psock_progs progs; #if IS_ENABLED(CONFIG_BPF_STREAM_PARSER) struct strparser strp; #endif struct sk_buff_head ingress_skb; struct list_head ingress_msg; spinlock_t ingress_lock; unsigned long state; struct list_head link; spinlock_t link_lock; refcount_t refcnt; void (*saved_unhash)(struct sock *sk); void (*saved_destroy)(struct sock *sk); void (*saved_close)(struct sock *sk, long timeout); void (*saved_write_space)(struct sock *sk); void (*saved_data_ready)(struct sock *sk); int (*psock_update_sk_prot)(struct sock *sk, struct sk_psock *psock, bool restore); struct proto *sk_proto; struct mutex work_mutex; struct sk_psock_work_state work_state; struct delayed_work work; struct rcu_work rwork; }; int sk_msg_alloc(struct sock *sk, struct sk_msg *msg, int len, int elem_first_coalesce); int sk_msg_clone(struct sock *sk, struct sk_msg *dst, struct sk_msg *src, u32 off, u32 len); void sk_msg_trim(struct sock *sk, struct sk_msg *msg, int len); int sk_msg_free(struct sock *sk, struct sk_msg *msg); int sk_msg_free_nocharge(struct sock *sk, struct sk_msg *msg); void sk_msg_free_partial(struct sock *sk, struct sk_msg *msg, u32 bytes); void sk_msg_free_partial_nocharge(struct sock *sk, struct sk_msg *msg, u32 bytes); void sk_msg_return(struct sock *sk, struct sk_msg *msg, int bytes); void sk_msg_return_zero(struct sock *sk, struct sk_msg *msg, int bytes); int sk_msg_zerocopy_from_iter(struct sock *sk, struct iov_iter *from, struct sk_msg *msg, u32 bytes); int sk_msg_memcopy_from_iter(struct sock *sk, struct iov_iter *from, struct sk_msg *msg, u32 bytes); int sk_msg_recvmsg(struct sock *sk, struct sk_psock *psock, struct msghdr *msg, int len, int flags); bool sk_msg_is_readable(struct sock *sk); static inline void sk_msg_check_to_free(struct sk_msg *msg, u32 i, u32 bytes) { WARN_ON(i == msg->sg.end && bytes); } static inline void sk_msg_apply_bytes(struct sk_psock *psock, u32 bytes) { if (psock->apply_bytes) { if (psock->apply_bytes < bytes) psock->apply_bytes = 0; else psock->apply_bytes -= bytes; } } static inline u32 sk_msg_iter_dist(u32 start, u32 end) { return end >= start ? end - start : end + (NR_MSG_FRAG_IDS - start); } #define sk_msg_iter_var_prev(var) \ do { \ if (var == 0) \ var = NR_MSG_FRAG_IDS - 1; \ else \ var--; \ } while (0) #define sk_msg_iter_var_next(var) \ do { \ var++; \ if (var == NR_MSG_FRAG_IDS) \ var = 0; \ } while (0) #define sk_msg_iter_prev(msg, which) \ sk_msg_iter_var_prev(msg->sg.which) #define sk_msg_iter_next(msg, which) \ sk_msg_iter_var_next(msg->sg.which) static inline void sk_msg_clear_meta(struct sk_msg *msg) { memset(&msg->sg, 0, offsetofend(struct sk_msg_sg, copy)); } static inline void sk_msg_init(struct sk_msg *msg) { BUILD_BUG_ON(ARRAY_SIZE(msg->sg.data) - 1 != NR_MSG_FRAG_IDS); memset(msg, 0, sizeof(*msg)); sg_init_marker(msg->sg.data, NR_MSG_FRAG_IDS); } static inline void sk_msg_xfer(struct sk_msg *dst, struct sk_msg *src, int which, u32 size) { dst->sg.data[which] = src->sg.data[which]; dst->sg.data[which].length = size; dst->sg.size += size; src->sg.size -= size; src->sg.data[which].length -= size; src->sg.data[which].offset += size; } static inline void sk_msg_xfer_full(struct sk_msg *dst, struct sk_msg *src) { memcpy(dst, src, sizeof(*src)); sk_msg_init(src); } static inline bool sk_msg_full(const struct sk_msg *msg) { return sk_msg_iter_dist(msg->sg.start, msg->sg.end) == MAX_MSG_FRAGS; } static inline u32 sk_msg_elem_used(const struct sk_msg *msg) { return sk_msg_iter_dist(msg->sg.start, msg->sg.end); } static inline struct scatterlist *sk_msg_elem(struct sk_msg *msg, int which) { return &msg->sg.data[which]; } static inline struct scatterlist sk_msg_elem_cpy(struct sk_msg *msg, int which) { return msg->sg.data[which]; } static inline struct page *sk_msg_page(struct sk_msg *msg, int which) { return sg_page(sk_msg_elem(msg, which)); } static inline bool sk_msg_to_ingress(const struct sk_msg *msg) { return msg->flags & BPF_F_INGRESS; } static inline void sk_msg_compute_data_pointers(struct sk_msg *msg) { struct scatterlist *sge = sk_msg_elem(msg, msg->sg.start); if (test_bit(msg->sg.start, &msg->sg.copy)) { msg->data = NULL; msg->data_end = NULL; } else { msg->data = sg_virt(sge); msg->data_end = msg->data + sge->length; } } static inline void sk_msg_page_add(struct sk_msg *msg, struct page *page, u32 len, u32 offset) { struct scatterlist *sge; get_page(page); sge = sk_msg_elem(msg, msg->sg.end); sg_set_page(sge, page, len, offset); sg_unmark_end(sge); __set_bit(msg->sg.end, &msg->sg.copy); msg->sg.size += len; sk_msg_iter_next(msg, end); } static inline void sk_msg_sg_copy(struct sk_msg *msg, u32 i, bool copy_state) { do { if (copy_state) __set_bit(i, &msg->sg.copy); else __clear_bit(i, &msg->sg.copy); sk_msg_iter_var_next(i); if (i == msg->sg.end) break; } while (1); } static inline void sk_msg_sg_copy_set(struct sk_msg *msg, u32 start) { sk_msg_sg_copy(msg, start, true); } static inline void sk_msg_sg_copy_clear(struct sk_msg *msg, u32 start) { sk_msg_sg_copy(msg, start, false); } static inline struct sk_psock *sk_psock(const struct sock *sk) { return __rcu_dereference_sk_user_data_with_flags(sk, SK_USER_DATA_PSOCK); } static inline void sk_psock_set_state(struct sk_psock *psock, enum sk_psock_state_bits bit) { set_bit(bit, &psock->state); } static inline void sk_psock_clear_state(struct sk_psock *psock, enum sk_psock_state_bits bit) { clear_bit(bit, &psock->state); } static inline bool sk_psock_test_state(const struct sk_psock *psock, enum sk_psock_state_bits bit) { return test_bit(bit, &psock->state); } static inline void sock_drop(struct sock *sk, struct sk_buff *skb) { sk_drops_add(sk, skb); kfree_skb(skb); } static inline bool sk_psock_queue_msg(struct sk_psock *psock, struct sk_msg *msg) { bool ret; spin_lock_bh(&psock->ingress_lock); if (sk_psock_test_state(psock, SK_PSOCK_TX_ENABLED)) { list_add_tail(&msg->list, &psock->ingress_msg); ret = true; } else { sk_msg_free(psock->sk, msg); kfree(msg); ret = false; } spin_unlock_bh(&psock->ingress_lock); return ret; } static inline struct sk_msg *sk_psock_dequeue_msg(struct sk_psock *psock) { struct sk_msg *msg; spin_lock_bh(&psock->ingress_lock); msg = list_first_entry_or_null(&psock->ingress_msg, struct sk_msg, list); if (msg) list_del(&msg->list); spin_unlock_bh(&psock->ingress_lock); return msg; } static inline struct sk_msg *sk_psock_peek_msg(struct sk_psock *psock) { struct sk_msg *msg; spin_lock_bh(&psock->ingress_lock); msg = list_first_entry_or_null(&psock->ingress_msg, struct sk_msg, list); spin_unlock_bh(&psock->ingress_lock); return msg; } static inline struct sk_msg *sk_psock_next_msg(struct sk_psock *psock, struct sk_msg *msg) { struct sk_msg *ret; spin_lock_bh(&psock->ingress_lock); if (list_is_last(&msg->list, &psock->ingress_msg)) ret = NULL; else ret = list_next_entry(msg, list); spin_unlock_bh(&psock->ingress_lock); return ret; } static inline bool sk_psock_queue_empty(const struct sk_psock *psock) { return psock ? list_empty(&psock->ingress_msg) : true; } static inline void kfree_sk_msg(struct sk_msg *msg) { if (msg->skb) consume_skb(msg->skb); kfree(msg); } static inline void sk_psock_report_error(struct sk_psock *psock, int err) { struct sock *sk = psock->sk; sk->sk_err = err; sk_error_report(sk); } struct sk_psock *sk_psock_init(struct sock *sk, int node); void sk_psock_stop(struct sk_psock *psock); #if IS_ENABLED(CONFIG_BPF_STREAM_PARSER) int sk_psock_init_strp(struct sock *sk, struct sk_psock *psock); void sk_psock_start_strp(struct sock *sk, struct sk_psock *psock); void sk_psock_stop_strp(struct sock *sk, struct sk_psock *psock); #else static inline int sk_psock_init_strp(struct sock *sk, struct sk_psock *psock) { return -EOPNOTSUPP; } static inline void sk_psock_start_strp(struct sock *sk, struct sk_psock *psock) { } static inline void sk_psock_stop_strp(struct sock *sk, struct sk_psock *psock) { } #endif void sk_psock_start_verdict(struct sock *sk, struct sk_psock *psock); void sk_psock_stop_verdict(struct sock *sk, struct sk_psock *psock); int sk_psock_msg_verdict(struct sock *sk, struct sk_psock *psock, struct sk_msg *msg); static inline struct sk_psock_link *sk_psock_init_link(void) { return kzalloc(sizeof(struct sk_psock_link), GFP_ATOMIC | __GFP_NOWARN); } static inline void sk_psock_free_link(struct sk_psock_link *link) { kfree(link); } struct sk_psock_link *sk_psock_link_pop(struct sk_psock *psock); static inline void sk_psock_cork_free(struct sk_psock *psock) { if (psock->cork) { sk_msg_free(psock->sk, psock->cork); kfree(psock->cork); psock->cork = NULL; } } static inline void sk_psock_restore_proto(struct sock *sk, struct sk_psock *psock) { if (psock->psock_update_sk_prot) psock->psock_update_sk_prot(sk, psock, true); } static inline struct sk_psock *sk_psock_get(struct sock *sk) { struct sk_psock *psock; rcu_read_lock(); psock = sk_psock(sk); if (psock && !refcount_inc_not_zero(&psock->refcnt)) psock = NULL; rcu_read_unlock(); return psock; } void sk_psock_drop(struct sock *sk, struct sk_psock *psock); static inline void sk_psock_put(struct sock *sk, struct sk_psock *psock) { if (refcount_dec_and_test(&psock->refcnt)) sk_psock_drop(sk, psock); } static inline void sk_psock_data_ready(struct sock *sk, struct sk_psock *psock) { read_lock_bh(&sk->sk_callback_lock); if (psock->saved_data_ready) psock->saved_data_ready(sk); else sk->sk_data_ready(sk); read_unlock_bh(&sk->sk_callback_lock); } static inline void psock_set_prog(struct bpf_prog **pprog, struct bpf_prog *prog) { prog = xchg(pprog, prog); if (prog) bpf_prog_put(prog); } static inline int psock_replace_prog(struct bpf_prog **pprog, struct bpf_prog *prog, struct bpf_prog *old) { if (cmpxchg(pprog, old, prog) != old) return -ENOENT; if (old) bpf_prog_put(old); return 0; } static inline void psock_progs_drop(struct sk_psock_progs *progs) { psock_set_prog(&progs->msg_parser, NULL); psock_set_prog(&progs->stream_parser, NULL); psock_set_prog(&progs->stream_verdict, NULL); psock_set_prog(&progs->skb_verdict, NULL); } int sk_psock_tls_strp_read(struct sk_psock *psock, struct sk_buff *skb); static inline bool sk_psock_strp_enabled(struct sk_psock *psock) { if (!psock) return false; return !!psock->saved_data_ready; } #if IS_ENABLED(CONFIG_NET_SOCK_MSG) #define BPF_F_STRPARSER (1UL << 1) /* We only have two bits so far. */ #define BPF_F_PTR_MASK ~(BPF_F_INGRESS | BPF_F_STRPARSER) static inline bool skb_bpf_strparser(const struct sk_buff *skb) { unsigned long sk_redir = skb->_sk_redir; return sk_redir & BPF_F_STRPARSER; } static inline void skb_bpf_set_strparser(struct sk_buff *skb) { skb->_sk_redir |= BPF_F_STRPARSER; } static inline bool skb_bpf_ingress(const struct sk_buff *skb) { unsigned long sk_redir = skb->_sk_redir; return sk_redir & BPF_F_INGRESS; } static inline void skb_bpf_set_ingress(struct sk_buff *skb) { skb->_sk_redir |= BPF_F_INGRESS; } static inline void skb_bpf_set_redir(struct sk_buff *skb, struct sock *sk_redir, bool ingress) { skb->_sk_redir = (unsigned long)sk_redir; if (ingress) skb->_sk_redir |= BPF_F_INGRESS; } static inline struct sock *skb_bpf_redirect_fetch(const struct sk_buff *skb) { unsigned long sk_redir = skb->_sk_redir; return (struct sock *)(sk_redir & BPF_F_PTR_MASK); } static inline void skb_bpf_redirect_clear(struct sk_buff *skb) { skb->_sk_redir = 0; } #endif /* CONFIG_NET_SOCK_MSG */ #endif /* _LINUX_SKMSG_H */ PK ! �& S S thunderbolt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Thunderbolt service API * * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com> * Copyright (C) 2017, Intel Corporation * Authors: Michael Jamet <michael.jamet@intel.com> * Mika Westerberg <mika.westerberg@linux.intel.com> */ #ifndef THUNDERBOLT_H_ #define THUNDERBOLT_H_ #include <linux/device.h> #include <linux/idr.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/mod_devicetable.h> #include <linux/pci.h> #include <linux/uuid.h> #include <linux/workqueue.h> enum tb_cfg_pkg_type { TB_CFG_PKG_READ = 1, TB_CFG_PKG_WRITE = 2, TB_CFG_PKG_ERROR = 3, TB_CFG_PKG_NOTIFY_ACK = 4, TB_CFG_PKG_EVENT = 5, TB_CFG_PKG_XDOMAIN_REQ = 6, TB_CFG_PKG_XDOMAIN_RESP = 7, TB_CFG_PKG_OVERRIDE = 8, TB_CFG_PKG_RESET = 9, TB_CFG_PKG_ICM_EVENT = 10, TB_CFG_PKG_ICM_CMD = 11, TB_CFG_PKG_ICM_RESP = 12, TB_CFG_PKG_PREPARE_TO_SLEEP = 13, }; /** * enum tb_security_level - Thunderbolt security level * @TB_SECURITY_NONE: No security, legacy mode * @TB_SECURITY_USER: User approval required at minimum * @TB_SECURITY_SECURE: One time saved key required at minimum * @TB_SECURITY_DPONLY: Only tunnel Display port (and USB) * @TB_SECURITY_USBONLY: Only tunnel USB controller of the connected * Thunderbolt dock (and Display Port). All PCIe * links downstream of the dock are removed. * @TB_SECURITY_NOPCIE: For USB4 systems this level is used when the * PCIe tunneling is disabled from the BIOS. */ enum tb_security_level { TB_SECURITY_NONE, TB_SECURITY_USER, TB_SECURITY_SECURE, TB_SECURITY_DPONLY, TB_SECURITY_USBONLY, TB_SECURITY_NOPCIE, }; /** * struct tb - main thunderbolt bus structure * @dev: Domain device * @lock: Big lock. Must be held when accessing any struct * tb_switch / struct tb_port. * @nhi: Pointer to the NHI structure * @ctl: Control channel for this domain * @wq: Ordered workqueue for all domain specific work * @root_switch: Root switch of this domain * @cm_ops: Connection manager specific operations vector * @index: Linux assigned domain number * @security_level: Current security level * @nboot_acl: Number of boot ACLs the domain supports * @privdata: Private connection manager specific data */ struct tb { struct device dev; struct mutex lock; struct tb_nhi *nhi; struct tb_ctl *ctl; struct workqueue_struct *wq; struct tb_switch *root_switch; const struct tb_cm_ops *cm_ops; int index; enum tb_security_level security_level; size_t nboot_acl; unsigned long privdata[]; }; extern struct bus_type tb_bus_type; extern struct device_type tb_service_type; extern struct device_type tb_xdomain_type; #define TB_LINKS_PER_PHY_PORT 2 static inline unsigned int tb_phy_port_from_link(unsigned int link) { return (link - 1) / TB_LINKS_PER_PHY_PORT; } /** * struct tb_property_dir - XDomain property directory * @uuid: Directory UUID or %NULL if root directory * @properties: List of properties in this directory * * User needs to provide serialization if needed. */ struct tb_property_dir { const uuid_t *uuid; struct list_head properties; }; enum tb_property_type { TB_PROPERTY_TYPE_UNKNOWN = 0x00, TB_PROPERTY_TYPE_DIRECTORY = 0x44, TB_PROPERTY_TYPE_DATA = 0x64, TB_PROPERTY_TYPE_TEXT = 0x74, TB_PROPERTY_TYPE_VALUE = 0x76, }; #define TB_PROPERTY_KEY_SIZE 8 /** * struct tb_property - XDomain property * @list: Used to link properties together in a directory * @key: Key for the property (always terminated). * @type: Type of the property * @length: Length of the property data in dwords * @value: Property value * * Users use @type to determine which field in @value is filled. */ struct tb_property { struct list_head list; char key[TB_PROPERTY_KEY_SIZE + 1]; enum tb_property_type type; size_t length; union { struct tb_property_dir *dir; u8 *data; char *text; u32 immediate; } value; }; struct tb_property_dir *tb_property_parse_dir(const u32 *block, size_t block_len); ssize_t tb_property_format_dir(const struct tb_property_dir *dir, u32 *block, size_t block_len); struct tb_property_dir *tb_property_copy_dir(const struct tb_property_dir *dir); struct tb_property_dir *tb_property_create_dir(const uuid_t *uuid); void tb_property_free_dir(struct tb_property_dir *dir); int tb_property_add_immediate(struct tb_property_dir *parent, const char *key, u32 value); int tb_property_add_data(struct tb_property_dir *parent, const char *key, const void *buf, size_t buflen); int tb_property_add_text(struct tb_property_dir *parent, const char *key, const char *text); int tb_property_add_dir(struct tb_property_dir *parent, const char *key, struct tb_property_dir *dir); void tb_property_remove(struct tb_property *tb_property); struct tb_property *tb_property_find(struct tb_property_dir *dir, const char *key, enum tb_property_type type); struct tb_property *tb_property_get_next(struct tb_property_dir *dir, struct tb_property *prev); #define tb_property_for_each(dir, property) \ for (property = tb_property_get_next(dir, NULL); \ property; \ property = tb_property_get_next(dir, property)) int tb_register_property_dir(const char *key, struct tb_property_dir *dir); void tb_unregister_property_dir(const char *key, struct tb_property_dir *dir); /** * struct tb_xdomain - Cross-domain (XDomain) connection * @dev: XDomain device * @tb: Pointer to the domain * @remote_uuid: UUID of the remote domain (host) * @local_uuid: Cached local UUID * @route: Route string the other domain can be reached * @vendor: Vendor ID of the remote domain * @device: Device ID of the demote domain * @local_max_hopid: Maximum input HopID of this host * @remote_max_hopid: Maximum input HopID of the remote host * @lock: Lock to serialize access to the following fields of this structure * @vendor_name: Name of the vendor (or %NULL if not known) * @device_name: Name of the device (or %NULL if not known) * @link_speed: Speed of the link in Gb/s * @link_width: Width of the link (1 or 2) * @is_unplugged: The XDomain is unplugged * @needs_uuid: If the XDomain does not have @remote_uuid it will be * queried first * @service_ids: Used to generate IDs for the services * @in_hopids: Input HopIDs for DMA tunneling * @out_hopids; Output HopIDs for DMA tunneling * @local_property_block: Local block of properties * @local_property_block_gen: Generation of @local_property_block * @local_property_block_len: Length of the @local_property_block in dwords * @remote_properties: Properties exported by the remote domain * @remote_property_block_gen: Generation of @remote_properties * @get_uuid_work: Work used to retrieve @remote_uuid * @uuid_retries: Number of times left @remote_uuid is requested before * giving up * @get_properties_work: Work used to get remote domain properties * @properties_retries: Number of times left to read properties * @properties_changed_work: Work used to notify the remote domain that * our properties have changed * @properties_changed_retries: Number of times left to send properties * changed notification * @link: Root switch link the remote domain is connected (ICM only) * @depth: Depth in the chain the remote domain is connected (ICM only) * * This structure represents connection across two domains (hosts). * Each XDomain contains zero or more services which are exposed as * &struct tb_service objects. * * Service drivers may access this structure if they need to enumerate * non-standard properties but they need hold @lock when doing so * because properties can be changed asynchronously in response to * changes in the remote domain. */ struct tb_xdomain { struct device dev; struct tb *tb; uuid_t *remote_uuid; const uuid_t *local_uuid; u64 route; u16 vendor; u16 device; unsigned int local_max_hopid; unsigned int remote_max_hopid; struct mutex lock; const char *vendor_name; const char *device_name; unsigned int link_speed; unsigned int link_width; bool is_unplugged; bool needs_uuid; struct ida service_ids; struct ida in_hopids; struct ida out_hopids; u32 *local_property_block; u32 local_property_block_gen; u32 local_property_block_len; struct tb_property_dir *remote_properties; u32 remote_property_block_gen; struct delayed_work get_uuid_work; int uuid_retries; struct delayed_work get_properties_work; int properties_retries; struct delayed_work properties_changed_work; int properties_changed_retries; u8 link; u8 depth; }; int tb_xdomain_lane_bonding_enable(struct tb_xdomain *xd); void tb_xdomain_lane_bonding_disable(struct tb_xdomain *xd); int tb_xdomain_alloc_in_hopid(struct tb_xdomain *xd, int hopid); void tb_xdomain_release_in_hopid(struct tb_xdomain *xd, int hopid); int tb_xdomain_alloc_out_hopid(struct tb_xdomain *xd, int hopid); void tb_xdomain_release_out_hopid(struct tb_xdomain *xd, int hopid); int tb_xdomain_enable_paths(struct tb_xdomain *xd, int transmit_path, int transmit_ring, int receive_path, int receive_ring); int tb_xdomain_disable_paths(struct tb_xdomain *xd, int transmit_path, int transmit_ring, int receive_path, int receive_ring); static inline int tb_xdomain_disable_all_paths(struct tb_xdomain *xd) { return tb_xdomain_disable_paths(xd, -1, -1, -1, -1); } struct tb_xdomain *tb_xdomain_find_by_uuid(struct tb *tb, const uuid_t *uuid); struct tb_xdomain *tb_xdomain_find_by_route(struct tb *tb, u64 route); static inline struct tb_xdomain * tb_xdomain_find_by_uuid_locked(struct tb *tb, const uuid_t *uuid) { struct tb_xdomain *xd; mutex_lock(&tb->lock); xd = tb_xdomain_find_by_uuid(tb, uuid); mutex_unlock(&tb->lock); return xd; } static inline struct tb_xdomain * tb_xdomain_find_by_route_locked(struct tb *tb, u64 route) { struct tb_xdomain *xd; mutex_lock(&tb->lock); xd = tb_xdomain_find_by_route(tb, route); mutex_unlock(&tb->lock); return xd; } static inline struct tb_xdomain *tb_xdomain_get(struct tb_xdomain *xd) { if (xd) get_device(&xd->dev); return xd; } static inline void tb_xdomain_put(struct tb_xdomain *xd) { if (xd) put_device(&xd->dev); } static inline bool tb_is_xdomain(const struct device *dev) { return dev->type == &tb_xdomain_type; } static inline struct tb_xdomain *tb_to_xdomain(struct device *dev) { if (tb_is_xdomain(dev)) return container_of(dev, struct tb_xdomain, dev); return NULL; } int tb_xdomain_response(struct tb_xdomain *xd, const void *response, size_t size, enum tb_cfg_pkg_type type); int tb_xdomain_request(struct tb_xdomain *xd, const void *request, size_t request_size, enum tb_cfg_pkg_type request_type, void *response, size_t response_size, enum tb_cfg_pkg_type response_type, unsigned int timeout_msec); /** * tb_protocol_handler - Protocol specific handler * @uuid: XDomain messages with this UUID are dispatched to this handler * @callback: Callback called with the XDomain message. Returning %1 * here tells the XDomain core that the message was handled * by this handler and should not be forwared to other * handlers. * @data: Data passed with the callback * @list: Handlers are linked using this * * Thunderbolt services can hook into incoming XDomain requests by * registering protocol handler. Only limitation is that the XDomain * discovery protocol UUID cannot be registered since it is handled by * the core XDomain code. * * The @callback must check that the message is really directed to the * service the driver implements. */ struct tb_protocol_handler { const uuid_t *uuid; int (*callback)(const void *buf, size_t size, void *data); void *data; struct list_head list; }; int tb_register_protocol_handler(struct tb_protocol_handler *handler); void tb_unregister_protocol_handler(struct tb_protocol_handler *handler); /** * struct tb_service - Thunderbolt service * @dev: XDomain device * @id: ID of the service (shown in sysfs) * @key: Protocol key from the properties directory * @prtcid: Protocol ID from the properties directory * @prtcvers: Protocol version from the properties directory * @prtcrevs: Protocol software revision from the properties directory * @prtcstns: Protocol settings mask from the properties directory * @debugfs_dir: Pointer to the service debugfs directory. Always created * when debugfs is enabled. Can be used by service drivers to * add their own entries under the service. * * Each domain exposes set of services it supports as collection of * properties. For each service there will be one corresponding * &struct tb_service. Service drivers are bound to these. */ struct tb_service { struct device dev; int id; const char *key; u32 prtcid; u32 prtcvers; u32 prtcrevs; u32 prtcstns; struct dentry *debugfs_dir; }; static inline struct tb_service *tb_service_get(struct tb_service *svc) { if (svc) get_device(&svc->dev); return svc; } static inline void tb_service_put(struct tb_service *svc) { if (svc) put_device(&svc->dev); } static inline bool tb_is_service(const struct device *dev) { return dev->type == &tb_service_type; } static inline struct tb_service *tb_to_service(struct device *dev) { if (tb_is_service(dev)) return container_of(dev, struct tb_service, dev); return NULL; } /** * tb_service_driver - Thunderbolt service driver * @driver: Driver structure * @probe: Called when the driver is probed * @remove: Called when the driver is removed (optional) * @shutdown: Called at shutdown time to stop the service (optional) * @id_table: Table of service identifiers the driver supports */ struct tb_service_driver { struct device_driver driver; int (*probe)(struct tb_service *svc, const struct tb_service_id *id); void (*remove)(struct tb_service *svc); void (*shutdown)(struct tb_service *svc); const struct tb_service_id *id_table; }; #define TB_SERVICE(key, id) \ .match_flags = TBSVC_MATCH_PROTOCOL_KEY | \ TBSVC_MATCH_PROTOCOL_ID, \ .protocol_key = (key), \ .protocol_id = (id) int tb_register_service_driver(struct tb_service_driver *drv); void tb_unregister_service_driver(struct tb_service_driver *drv); static inline void *tb_service_get_drvdata(const struct tb_service *svc) { return dev_get_drvdata(&svc->dev); } static inline void tb_service_set_drvdata(struct tb_service *svc, void *data) { dev_set_drvdata(&svc->dev, data); } static inline struct tb_xdomain *tb_service_parent(struct tb_service *svc) { return tb_to_xdomain(svc->dev.parent); } /** * struct tb_nhi - thunderbolt native host interface * @lock: Must be held during ring creation/destruction. Is acquired by * interrupt_work when dispatching interrupts to individual rings. * @pdev: Pointer to the PCI device * @ops: NHI specific optional ops * @iobase: MMIO space of the NHI * @tx_rings: All Tx rings available on this host controller * @rx_rings: All Rx rings available on this host controller * @msix_ida: Used to allocate MSI-X vectors for rings * @going_away: The host controller device is about to disappear so when * this flag is set, avoid touching the hardware anymore. * @interrupt_work: Work scheduled to handle ring interrupt when no * MSI-X is used. * @hop_count: Number of rings (end point hops) supported by NHI. * @quirks: NHI specific quirks if any */ struct tb_nhi { spinlock_t lock; struct pci_dev *pdev; const struct tb_nhi_ops *ops; void __iomem *iobase; struct tb_ring **tx_rings; struct tb_ring **rx_rings; struct ida msix_ida; bool going_away; struct work_struct interrupt_work; u32 hop_count; unsigned long quirks; }; /** * struct tb_ring - thunderbolt TX or RX ring associated with a NHI * @lock: Lock serializing actions to this ring. Must be acquired after * nhi->lock. * @nhi: Pointer to the native host controller interface * @size: Size of the ring * @hop: Hop (DMA channel) associated with this ring * @head: Head of the ring (write next descriptor here) * @tail: Tail of the ring (complete next descriptor here) * @descriptors: Allocated descriptors for this ring * @queue: Queue holding frames to be transferred over this ring * @in_flight: Queue holding frames that are currently in flight * @work: Interrupt work structure * @is_tx: Is the ring Tx or Rx * @running: Is the ring running * @irq: MSI-X irq number if the ring uses MSI-X. %0 otherwise. * @vector: MSI-X vector number the ring uses (only set if @irq is > 0) * @flags: Ring specific flags * @e2e_tx_hop: Transmit HopID when E2E is enabled. Only applicable to * RX ring. For TX ring this should be set to %0. * @sof_mask: Bit mask used to detect start of frame PDF * @eof_mask: Bit mask used to detect end of frame PDF * @start_poll: Called when ring interrupt is triggered to start * polling. Passing %NULL keeps the ring in interrupt mode. * @poll_data: Data passed to @start_poll */ struct tb_ring { spinlock_t lock; struct tb_nhi *nhi; int size; int hop; int head; int tail; struct ring_desc *descriptors; dma_addr_t descriptors_dma; struct list_head queue; struct list_head in_flight; struct work_struct work; bool is_tx:1; bool running:1; int irq; u8 vector; unsigned int flags; int e2e_tx_hop; u16 sof_mask; u16 eof_mask; void (*start_poll)(void *data); void *poll_data; }; /* Leave ring interrupt enabled on suspend */ #define RING_FLAG_NO_SUSPEND BIT(0) /* Configure the ring to be in frame mode */ #define RING_FLAG_FRAME BIT(1) /* Enable end-to-end flow control */ #define RING_FLAG_E2E BIT(2) struct ring_frame; typedef void (*ring_cb)(struct tb_ring *, struct ring_frame *, bool canceled); /** * enum ring_desc_flags - Flags for DMA ring descriptor * %RING_DESC_ISOCH: Enable isonchronous DMA (Tx only) * %RING_DESC_CRC_ERROR: In frame mode CRC check failed for the frame (Rx only) * %RING_DESC_COMPLETED: Descriptor completed (set by NHI) * %RING_DESC_POSTED: Always set this * %RING_DESC_BUFFER_OVERRUN: RX buffer overrun * %RING_DESC_INTERRUPT: Request an interrupt on completion */ enum ring_desc_flags { RING_DESC_ISOCH = 0x1, RING_DESC_CRC_ERROR = 0x1, RING_DESC_COMPLETED = 0x2, RING_DESC_POSTED = 0x4, RING_DESC_BUFFER_OVERRUN = 0x04, RING_DESC_INTERRUPT = 0x8, }; /** * struct ring_frame - For use with ring_rx/ring_tx * @buffer_phy: DMA mapped address of the frame * @callback: Callback called when the frame is finished (optional) * @list: Frame is linked to a queue using this * @size: Size of the frame in bytes (%0 means %4096) * @flags: Flags for the frame (see &enum ring_desc_flags) * @eof: End of frame protocol defined field * @sof: Start of frame protocol defined field */ struct ring_frame { dma_addr_t buffer_phy; ring_cb callback; struct list_head list; u32 size:12; u32 flags:12; u32 eof:4; u32 sof:4; }; /* Minimum size for ring_rx */ #define TB_FRAME_SIZE 0x100 struct tb_ring *tb_ring_alloc_tx(struct tb_nhi *nhi, int hop, int size, unsigned int flags); struct tb_ring *tb_ring_alloc_rx(struct tb_nhi *nhi, int hop, int size, unsigned int flags, int e2e_tx_hop, u16 sof_mask, u16 eof_mask, void (*start_poll)(void *), void *poll_data); void tb_ring_start(struct tb_ring *ring); void tb_ring_stop(struct tb_ring *ring); void tb_ring_free(struct tb_ring *ring); int __tb_ring_enqueue(struct tb_ring *ring, struct ring_frame *frame); /** * tb_ring_rx() - enqueue a frame on an RX ring * @ring: Ring to enqueue the frame * @frame: Frame to enqueue * * @frame->buffer, @frame->buffer_phy have to be set. The buffer must * contain at least %TB_FRAME_SIZE bytes. * * @frame->callback will be invoked with @frame->size, @frame->flags, * @frame->eof, @frame->sof set once the frame has been received. * * If ring_stop() is called after the packet has been enqueued * @frame->callback will be called with canceled set to true. * * Return: Returns %-ESHUTDOWN if ring_stop has been called. Zero otherwise. */ static inline int tb_ring_rx(struct tb_ring *ring, struct ring_frame *frame) { WARN_ON(ring->is_tx); return __tb_ring_enqueue(ring, frame); } /** * tb_ring_tx() - enqueue a frame on an TX ring * @ring: Ring the enqueue the frame * @frame: Frame to enqueue * * @frame->buffer, @frame->buffer_phy, @frame->size, @frame->eof and * @frame->sof have to be set. * * @frame->callback will be invoked with once the frame has been transmitted. * * If ring_stop() is called after the packet has been enqueued @frame->callback * will be called with canceled set to true. * * Return: Returns %-ESHUTDOWN if ring_stop has been called. Zero otherwise. */ static inline int tb_ring_tx(struct tb_ring *ring, struct ring_frame *frame) { WARN_ON(!ring->is_tx); return __tb_ring_enqueue(ring, frame); } /* Used only when the ring is in polling mode */ struct ring_frame *tb_ring_poll(struct tb_ring *ring); void tb_ring_poll_complete(struct tb_ring *ring); /** * tb_ring_dma_device() - Return device used for DMA mapping * @ring: Ring whose DMA device is retrieved * * Use this function when you are mapping DMA for buffers that are * passed to the ring for sending/receiving. */ static inline struct device *tb_ring_dma_device(struct tb_ring *ring) { return &ring->nhi->pdev->dev; } #endif /* THUNDERBOLT_H_ */ PK ! 5��/u u moxtet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Turris Mox module configuration bus driver * * Copyright (C) 2019 Marek Behún <kabel@kernel.org> */ #ifndef __LINUX_MOXTET_H #define __LINUX_MOXTET_H #include <linux/device.h> #include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/mutex.h> #define TURRIS_MOX_MAX_MODULES 10 enum turris_mox_cpu_module_id { TURRIS_MOX_CPU_ID_EMMC = 0x00, TURRIS_MOX_CPU_ID_SD = 0x10, }; enum turris_mox_module_id { TURRIS_MOX_MODULE_FIRST = 0x01, TURRIS_MOX_MODULE_SFP = 0x01, TURRIS_MOX_MODULE_PCI = 0x02, TURRIS_MOX_MODULE_TOPAZ = 0x03, TURRIS_MOX_MODULE_PERIDOT = 0x04, TURRIS_MOX_MODULE_USB3 = 0x05, TURRIS_MOX_MODULE_PCI_BRIDGE = 0x06, TURRIS_MOX_MODULE_LAST = 0x06, }; #define MOXTET_NIRQS 16 extern struct bus_type moxtet_type; struct moxtet { struct device *dev; struct mutex lock; u8 modules[TURRIS_MOX_MAX_MODULES]; int count; u8 tx[TURRIS_MOX_MAX_MODULES]; int dev_irq; struct { struct irq_domain *domain; struct irq_chip chip; unsigned long masked, exists; struct moxtet_irqpos { u8 idx; u8 bit; } position[MOXTET_NIRQS]; } irq; #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_root; #endif }; struct moxtet_driver { const enum turris_mox_module_id *id_table; struct device_driver driver; }; static inline struct moxtet_driver * to_moxtet_driver(struct device_driver *drv) { if (!drv) return NULL; return container_of(drv, struct moxtet_driver, driver); } extern int __moxtet_register_driver(struct module *owner, struct moxtet_driver *mdrv); static inline void moxtet_unregister_driver(struct moxtet_driver *mdrv) { if (mdrv) driver_unregister(&mdrv->driver); } #define moxtet_register_driver(driver) \ __moxtet_register_driver(THIS_MODULE, driver) #define module_moxtet_driver(__moxtet_driver) \ module_driver(__moxtet_driver, moxtet_register_driver, \ moxtet_unregister_driver) struct moxtet_device { struct device dev; struct moxtet *moxtet; enum turris_mox_module_id id; unsigned int idx; }; extern int moxtet_device_read(struct device *dev); extern int moxtet_device_write(struct device *dev, u8 val); extern int moxtet_device_written(struct device *dev); static inline struct moxtet_device * to_moxtet_device(struct device *dev) { if (!dev) return NULL; return container_of(dev, struct moxtet_device, dev); } #endif /* __LINUX_MOXTET_H */ PK ! ��<F� � efi-bgrt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_EFI_BGRT_H #define _LINUX_EFI_BGRT_H #include <linux/acpi.h> #ifdef CONFIG_ACPI_BGRT void efi_bgrt_init(struct acpi_table_header *table); int __init acpi_parse_bgrt(struct acpi_table_header *table); /* The BGRT data itself; only valid if bgrt_image != NULL. */ extern size_t bgrt_image_size; extern struct acpi_table_bgrt bgrt_tab; #else /* !CONFIG_ACPI_BGRT */ static inline void efi_bgrt_init(struct acpi_table_header *table) {} static inline int __init acpi_parse_bgrt(struct acpi_table_header *table) { return 0; } #endif /* !CONFIG_ACPI_BGRT */ #endif /* _LINUX_EFI_BGRT_H */ PK ! O焼a a processor.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Misc low level processor primitives */ #ifndef _LINUX_PROCESSOR_H #define _LINUX_PROCESSOR_H #include <asm/processor.h> /* * spin_begin is used before beginning a busy-wait loop, and must be paired * with spin_end when the loop is exited. spin_cpu_relax must be called * within the loop. * * The loop body should be as small and fast as possible, on the order of * tens of instructions/cycles as a guide. It should and avoid calling * cpu_relax, or any "spin" or sleep type of primitive including nested uses * of these primitives. It should not lock or take any other resource. * Violations of these guidelies will not cause a bug, but may cause sub * optimal performance. * * These loops are optimized to be used where wait times are expected to be * less than the cost of a context switch (and associated overhead). * * Detection of resource owner and decision to spin or sleep or guest-yield * (e.g., spin lock holder vcpu preempted, or mutex owner not on CPU) can be * tested within the loop body. */ #ifndef spin_begin #define spin_begin() #endif #ifndef spin_cpu_relax #define spin_cpu_relax() cpu_relax() #endif #ifndef spin_end #define spin_end() #endif /* * spin_until_cond can be used to wait for a condition to become true. It * may be expected that the first iteration will true in the common case * (no spinning), so that callers should not require a first "likely" test * for the uncontended case before using this primitive. * * Usage and implementation guidelines are the same as for the spin_begin * primitives, above. */ #ifndef spin_until_cond #define spin_until_cond(cond) \ do { \ if (unlikely(!(cond))) { \ spin_begin(); \ do { \ spin_cpu_relax(); \ } while (!(cond)); \ spin_end(); \ } \ } while (0) #endif #endif /* _LINUX_PROCESSOR_H */ PK ! ���Z vsc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VSC_H_ #define _LINUX_VSC_H_ #include <linux/types.h> /** * @brief VSC camera ownership definition */ enum vsc_camera_owner { VSC_CAMERA_NONE = 0, VSC_CAMERA_CVF, VSC_CAMERA_IPU, }; /** * @brief VSC privacy status definition */ enum vsc_privacy_status { VSC_PRIVACY_ON = 0, VSC_PRIVACY_OFF, }; /** * @brief VSC MIPI configuration definition */ struct vsc_mipi_config { uint32_t freq; uint32_t lane_num; }; /** * @brief VSC camera status definition */ struct vsc_camera_status { enum vsc_camera_owner owner; enum vsc_privacy_status status; uint32_t exposure_level; }; /** * @brief VSC privacy callback type definition * * @param context Privacy callback handle * @param status Current privacy status */ typedef void (*vsc_privacy_callback_t)(void *handle, enum vsc_privacy_status status); /** * @brief Acquire camera sensor ownership to IPU * * @param config[IN] The pointer of MIPI configuration going to set * @param callback[IN] The pointer of privacy callback function * @param handle[IN] Privacy callback function runtime handle from IPU driver * @param status[OUT] The pointer of camera status after the acquire * * @retval 0 If success * @retval -EIO IO error * @retval -EINVAL Invalid argument * @retval -EAGAIN VSC device not ready * @retval negative values for other errors */ int vsc_acquire_camera_sensor(struct vsc_mipi_config *config, vsc_privacy_callback_t callback, void *handle, struct vsc_camera_status *status); /** * @brief Release camera sensor ownership * * @param status[OUT] Camera status after the release * * @retval 0 If success * @retval -EIO IO error * @retval -EINVAL Invalid argument * @retval -EAGAIN VSC device not ready * @retval negative values for other errors */ int vsc_release_camera_sensor(struct vsc_camera_status *status); #endif PK ! >��� reciprocal_div.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RECIPROCAL_DIV_H #define _LINUX_RECIPROCAL_DIV_H #include <linux/types.h> /* * This algorithm is based on the paper "Division by Invariant * Integers Using Multiplication" by Torbjörn Granlund and Peter * L. Montgomery. * * The assembler implementation from Agner Fog, which this code is * based on, can be found here: * http://www.agner.org/optimize/asmlib.zip * * This optimization for A/B is helpful if the divisor B is mostly * runtime invariant. The reciprocal of B is calculated in the * slow-path with reciprocal_value(). The fast-path can then just use * a much faster multiplication operation with a variable dividend A * to calculate the division A/B. */ struct reciprocal_value { u32 m; u8 sh1, sh2; }; /* "reciprocal_value" and "reciprocal_divide" together implement the basic * version of the algorithm described in Figure 4.1 of the paper. */ struct reciprocal_value reciprocal_value(u32 d); static inline u32 reciprocal_divide(u32 a, struct reciprocal_value R) { u32 t = (u32)(((u64)a * R.m) >> 32); return (t + ((a - t) >> R.sh1)) >> R.sh2; } struct reciprocal_value_adv { u32 m; u8 sh, exp; bool is_wide_m; }; /* "reciprocal_value_adv" implements the advanced version of the algorithm * described in Figure 4.2 of the paper except when "divisor > (1U << 31)" whose * ceil(log2(d)) result will be 32 which then requires u128 divide on host. The * exception case could be easily handled before calling "reciprocal_value_adv". * * The advanced version requires more complex calculation to get the reciprocal * multiplier and other control variables, but then could reduce the required * emulation operations. * * It makes no sense to use this advanced version for host divide emulation, * those extra complexities for calculating multiplier etc could completely * waive our saving on emulation operations. * * However, it makes sense to use it for JIT divide code generation for which * we are willing to trade performance of JITed code with that of host. As shown * by the following pseudo code, the required emulation operations could go down * from 6 (the basic version) to 3 or 4. * * To use the result of "reciprocal_value_adv", suppose we want to calculate * n/d, the pseudo C code will be: * * struct reciprocal_value_adv rvalue; * u8 pre_shift, exp; * * // handle exception case. * if (d >= (1U << 31)) { * result = n >= d; * return; * } * * rvalue = reciprocal_value_adv(d, 32) * exp = rvalue.exp; * if (rvalue.is_wide_m && !(d & 1)) { * // floor(log2(d & (2^32 -d))) * pre_shift = fls(d & -d) - 1; * rvalue = reciprocal_value_adv(d >> pre_shift, 32 - pre_shift); * } else { * pre_shift = 0; * } * * // code generation starts. * if (imm == 1U << exp) { * result = n >> exp; * } else if (rvalue.is_wide_m) { * // pre_shift must be zero when reached here. * t = (n * rvalue.m) >> 32; * result = n - t; * result >>= 1; * result += t; * result >>= rvalue.sh - 1; * } else { * if (pre_shift) * result = n >> pre_shift; * result = ((u64)result * rvalue.m) >> 32; * result >>= rvalue.sh; * } */ struct reciprocal_value_adv reciprocal_value_adv(u32 d, u8 prec); #endif /* _LINUX_RECIPROCAL_DIV_H */ PK ! bT䍓 � eeprom_93cx6.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Copyright (C) 2004 - 2006 rt2x00 SourceForge Project <http://rt2x00.serialmonkey.com> */ /* Module: eeprom_93cx6 Abstract: EEPROM reader datastructures for 93cx6 chipsets. Supported chipsets: 93c46, 93c56 and 93c66. */ #include <linux/bits.h> /* * EEPROM operation defines. */ #define PCI_EEPROM_WIDTH_93C46 6 #define PCI_EEPROM_WIDTH_93C56 8 #define PCI_EEPROM_WIDTH_93C66 8 #define PCI_EEPROM_WIDTH_93C86 8 #define PCI_EEPROM_WIDTH_OPCODE 3 #define PCI_EEPROM_WRITE_OPCODE 0x05 #define PCI_EEPROM_ERASE_OPCODE 0x07 #define PCI_EEPROM_READ_OPCODE 0x06 #define PCI_EEPROM_EWDS_OPCODE 0x10 #define PCI_EEPROM_EWEN_OPCODE 0x13 /** * struct eeprom_93cx6 - control structure for setting the commands * for reading the eeprom data. * @data: private pointer for the driver. * @register_read(struct eeprom_93cx6 *eeprom): handler to * read the eeprom register, this function should set all reg_* fields. * @register_write(struct eeprom_93cx6 *eeprom): handler to * write to the eeprom register by using all reg_* fields. * @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines * @quirks: eeprom or controller quirks * @drive_data: Set if we're driving the data line. * @reg_data_in: register field to indicate data input * @reg_data_out: register field to indicate data output * @reg_data_clock: register field to set the data clock * @reg_chip_select: register field to set the chip select * * This structure is used for the communication between the driver * and the eeprom_93cx6 handlers for reading the eeprom. */ struct eeprom_93cx6 { void *data; void (*register_read)(struct eeprom_93cx6 *eeprom); void (*register_write)(struct eeprom_93cx6 *eeprom); int width; unsigned int quirks; /* Some EEPROMs require an extra clock cycle before reading */ #define PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE BIT(0) char drive_data; char reg_data_in; char reg_data_out; char reg_data_clock; char reg_chip_select; }; extern void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom, const u8 word, u16 *data); extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom, const u8 word, __le16 *data, const u16 words); extern void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom, const u8 byte, u8 *data); extern void eeprom_93cx6_multireadb(struct eeprom_93cx6 *eeprom, const u8 byte, u8 *data, const u16 bytes); extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable); extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data); static inline bool has_quirk_extra_read_cycle(struct eeprom_93cx6 *eeprom) { return eeprom->quirks & PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; } PK ! .��Τ � io-64-nonatomic-lo-hi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IO_64_NONATOMIC_LO_HI_H_ #define _LINUX_IO_64_NONATOMIC_LO_HI_H_ #include <linux/io.h> #include <asm-generic/int-ll64.h> static inline __u64 lo_hi_readq(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; u32 low, high; low = readl(p); high = readl(p + 1); return low + ((u64)high << 32); } static inline void lo_hi_writeq(__u64 val, volatile void __iomem *addr) { writel(val, addr); writel(val >> 32, addr + 4); } static inline __u64 lo_hi_readq_relaxed(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; u32 low, high; low = readl_relaxed(p); high = readl_relaxed(p + 1); return low + ((u64)high << 32); } static inline void lo_hi_writeq_relaxed(__u64 val, volatile void __iomem *addr) { writel_relaxed(val, addr); writel_relaxed(val >> 32, addr + 4); } #ifndef readq #define readq lo_hi_readq #endif #ifndef writeq #define writeq lo_hi_writeq #endif #ifndef readq_relaxed #define readq_relaxed lo_hi_readq_relaxed #endif #ifndef writeq_relaxed #define writeq_relaxed lo_hi_writeq_relaxed #endif #ifndef ioread64_lo_hi #define ioread64_lo_hi ioread64_lo_hi static inline u64 ioread64_lo_hi(const void __iomem *addr) { u32 low, high; low = ioread32(addr); high = ioread32(addr + sizeof(u32)); return low + ((u64)high << 32); } #endif #ifndef iowrite64_lo_hi #define iowrite64_lo_hi iowrite64_lo_hi static inline void iowrite64_lo_hi(u64 val, void __iomem *addr) { iowrite32(val, addr); iowrite32(val >> 32, addr + sizeof(u32)); } #endif #ifndef ioread64be_lo_hi #define ioread64be_lo_hi ioread64be_lo_hi static inline u64 ioread64be_lo_hi(const void __iomem *addr) { u32 low, high; low = ioread32be(addr + sizeof(u32)); high = ioread32be(addr); return low + ((u64)high << 32); } #endif #ifndef iowrite64be_lo_hi #define iowrite64be_lo_hi iowrite64be_lo_hi static inline void iowrite64be_lo_hi(u64 val, void __iomem *addr) { iowrite32be(val, addr + sizeof(u32)); iowrite32be(val >> 32, addr); } #endif #ifndef ioread64 #define ioread64_is_nonatomic #define ioread64 ioread64_lo_hi #endif #ifndef iowrite64 #define iowrite64_is_nonatomic #define iowrite64 iowrite64_lo_hi #endif #ifndef ioread64be #define ioread64be_is_nonatomic #define ioread64be ioread64be_lo_hi #endif #ifndef iowrite64be #define iowrite64be_is_nonatomic #define iowrite64be iowrite64be_lo_hi #endif #endif /* _LINUX_IO_64_NONATOMIC_LO_HI_H_ */ PK ! Vѳ�: �: kprobes.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _LINUX_KPROBES_H #define _LINUX_KPROBES_H /* * Kernel Probes (KProbes) * include/linux/kprobes.h * * Copyright (C) IBM Corporation, 2002, 2004 * * 2002-Oct Created by Vamsi Krishna S <vamsi_krishna@in.ibm.com> Kernel * Probes initial implementation ( includes suggestions from * Rusty Russell). * 2004-July Suparna Bhattacharya <suparna@in.ibm.com> added jumper probes * interface to access function arguments. * 2005-May Hien Nguyen <hien@us.ibm.com> and Jim Keniston * <jkenisto@us.ibm.com> and Prasanna S Panchamukhi * <prasanna@in.ibm.com> added function-return probes. */ #include <linux/compiler.h> #include <linux/linkage.h> #include <linux/list.h> #include <linux/notifier.h> #include <linux/smp.h> #include <linux/bug.h> #include <linux/percpu.h> #include <linux/spinlock.h> #include <linux/rcupdate.h> #include <linux/mutex.h> #include <linux/ftrace.h> #include <linux/refcount.h> #include <linux/freelist.h> #include <asm/kprobes.h> #ifdef CONFIG_KPROBES /* kprobe_status settings */ #define KPROBE_HIT_ACTIVE 0x00000001 #define KPROBE_HIT_SS 0x00000002 #define KPROBE_REENTER 0x00000004 #define KPROBE_HIT_SSDONE 0x00000008 #else /* CONFIG_KPROBES */ #include <asm-generic/kprobes.h> typedef int kprobe_opcode_t; struct arch_specific_insn { int dummy; }; #endif /* CONFIG_KPROBES */ struct kprobe; struct pt_regs; struct kretprobe; struct kretprobe_instance; typedef int (*kprobe_pre_handler_t) (struct kprobe *, struct pt_regs *); typedef void (*kprobe_post_handler_t) (struct kprobe *, struct pt_regs *, unsigned long flags); typedef int (*kretprobe_handler_t) (struct kretprobe_instance *, struct pt_regs *); struct kprobe { struct hlist_node hlist; /* list of kprobes for multi-handler support */ struct list_head list; /*count the number of times this probe was temporarily disarmed */ unsigned long nmissed; /* location of the probe point */ kprobe_opcode_t *addr; /* Allow user to indicate symbol name of the probe point */ const char *symbol_name; /* Offset into the symbol */ unsigned int offset; /* Called before addr is executed. */ kprobe_pre_handler_t pre_handler; /* Called after addr is executed, unless... */ kprobe_post_handler_t post_handler; /* Saved opcode (which has been replaced with breakpoint) */ kprobe_opcode_t opcode; /* copy of the original instruction */ struct arch_specific_insn ainsn; /* * Indicates various status flags. * Protected by kprobe_mutex after this kprobe is registered. */ u32 flags; }; /* Kprobe status flags */ #define KPROBE_FLAG_GONE 1 /* breakpoint has already gone */ #define KPROBE_FLAG_DISABLED 2 /* probe is temporarily disabled */ #define KPROBE_FLAG_OPTIMIZED 4 /* * probe is really optimized. * NOTE: * this flag is only for optimized_kprobe. */ #define KPROBE_FLAG_FTRACE 8 /* probe is using ftrace */ /* Has this kprobe gone ? */ static inline int kprobe_gone(struct kprobe *p) { return p->flags & KPROBE_FLAG_GONE; } /* Is this kprobe disabled ? */ static inline int kprobe_disabled(struct kprobe *p) { return p->flags & (KPROBE_FLAG_DISABLED | KPROBE_FLAG_GONE); } /* Is this kprobe really running optimized path ? */ static inline int kprobe_optimized(struct kprobe *p) { return p->flags & KPROBE_FLAG_OPTIMIZED; } /* Is this kprobe uses ftrace ? */ static inline int kprobe_ftrace(struct kprobe *p) { return p->flags & KPROBE_FLAG_FTRACE; } /* * Function-return probe - * Note: * User needs to provide a handler function, and initialize maxactive. * maxactive - The maximum number of instances of the probed function that * can be active concurrently. * nmissed - tracks the number of times the probed function's return was * ignored, due to maxactive being too low. * */ struct kretprobe_holder { struct kretprobe __rcu *rp; refcount_t ref; }; struct kretprobe { struct kprobe kp; kretprobe_handler_t handler; kretprobe_handler_t entry_handler; int maxactive; int nmissed; size_t data_size; struct freelist_head freelist; struct kretprobe_holder *rph; }; #define KRETPROBE_MAX_DATA_SIZE 4096 struct kretprobe_instance { union { struct freelist_node freelist; struct rcu_head rcu; }; struct llist_node llist; struct kretprobe_holder *rph; kprobe_opcode_t *ret_addr; void *fp; char data[]; }; struct kretprobe_blackpoint { const char *name; void *addr; }; struct kprobe_blacklist_entry { struct list_head list; unsigned long start_addr; unsigned long end_addr; }; #ifdef CONFIG_KPROBES DECLARE_PER_CPU(struct kprobe *, current_kprobe); DECLARE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); /* * For #ifdef avoidance: */ static inline int kprobes_built_in(void) { return 1; } extern void kprobe_busy_begin(void); extern void kprobe_busy_end(void); #ifdef CONFIG_KRETPROBES extern void arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs); extern int arch_trampoline_kprobe(struct kprobe *p); void __kretprobe_trampoline(void); /* * Since some architecture uses structured function pointer, * use dereference_function_descriptor() to get real function address. */ static nokprobe_inline void *kretprobe_trampoline_addr(void) { return dereference_kernel_function_descriptor(__kretprobe_trampoline); } /* If the trampoline handler called from a kprobe, use this version */ unsigned long __kretprobe_trampoline_handler(struct pt_regs *regs, void *frame_pointer); static nokprobe_inline unsigned long kretprobe_trampoline_handler(struct pt_regs *regs, void *frame_pointer) { unsigned long ret; /* * Set a dummy kprobe for avoiding kretprobe recursion. * Since kretprobe never runs in kprobe handler, no kprobe must * be running at this point. */ kprobe_busy_begin(); ret = __kretprobe_trampoline_handler(regs, frame_pointer); kprobe_busy_end(); return ret; } static nokprobe_inline struct kretprobe *get_kretprobe(struct kretprobe_instance *ri) { return rcu_dereference_check(ri->rph->rp, rcu_read_lock_any_held()); } #else /* CONFIG_KRETPROBES */ static inline void arch_prepare_kretprobe(struct kretprobe *rp, struct pt_regs *regs) { } static inline int arch_trampoline_kprobe(struct kprobe *p) { return 0; } #endif /* CONFIG_KRETPROBES */ extern struct kretprobe_blackpoint kretprobe_blacklist[]; #ifdef CONFIG_KPROBES_SANITY_TEST extern int init_test_probes(void); #else static inline int init_test_probes(void) { return 0; } #endif /* CONFIG_KPROBES_SANITY_TEST */ extern int arch_prepare_kprobe(struct kprobe *p); extern void arch_arm_kprobe(struct kprobe *p); extern void arch_disarm_kprobe(struct kprobe *p); extern int arch_init_kprobes(void); extern void kprobes_inc_nmissed_count(struct kprobe *p); extern bool arch_within_kprobe_blacklist(unsigned long addr); extern int arch_populate_kprobe_blacklist(void); extern bool arch_kprobe_on_func_entry(unsigned long offset); extern int kprobe_on_func_entry(kprobe_opcode_t *addr, const char *sym, unsigned long offset); extern bool within_kprobe_blacklist(unsigned long addr); extern int kprobe_add_ksym_blacklist(unsigned long entry); extern int kprobe_add_area_blacklist(unsigned long start, unsigned long end); struct kprobe_insn_cache { struct mutex mutex; void *(*alloc)(void); /* allocate insn page */ void (*free)(void *); /* free insn page */ const char *sym; /* symbol for insn pages */ struct list_head pages; /* list of kprobe_insn_page */ size_t insn_size; /* size of instruction slot */ int nr_garbage; }; #ifdef __ARCH_WANT_KPROBES_INSN_SLOT extern kprobe_opcode_t *__get_insn_slot(struct kprobe_insn_cache *c); extern void __free_insn_slot(struct kprobe_insn_cache *c, kprobe_opcode_t *slot, int dirty); /* sleep-less address checking routine */ extern bool __is_insn_slot_addr(struct kprobe_insn_cache *c, unsigned long addr); #define DEFINE_INSN_CACHE_OPS(__name) \ extern struct kprobe_insn_cache kprobe_##__name##_slots; \ \ static inline kprobe_opcode_t *get_##__name##_slot(void) \ { \ return __get_insn_slot(&kprobe_##__name##_slots); \ } \ \ static inline void free_##__name##_slot(kprobe_opcode_t *slot, int dirty)\ { \ __free_insn_slot(&kprobe_##__name##_slots, slot, dirty); \ } \ \ static inline bool is_kprobe_##__name##_slot(unsigned long addr) \ { \ return __is_insn_slot_addr(&kprobe_##__name##_slots, addr); \ } #define KPROBE_INSN_PAGE_SYM "kprobe_insn_page" #define KPROBE_OPTINSN_PAGE_SYM "kprobe_optinsn_page" int kprobe_cache_get_kallsym(struct kprobe_insn_cache *c, unsigned int *symnum, unsigned long *value, char *type, char *sym); #else /* __ARCH_WANT_KPROBES_INSN_SLOT */ #define DEFINE_INSN_CACHE_OPS(__name) \ static inline bool is_kprobe_##__name##_slot(unsigned long addr) \ { \ return 0; \ } #endif DEFINE_INSN_CACHE_OPS(insn); #ifdef CONFIG_OPTPROBES /* * Internal structure for direct jump optimized probe */ struct optimized_kprobe { struct kprobe kp; struct list_head list; /* list for optimizing queue */ struct arch_optimized_insn optinsn; }; /* Architecture dependent functions for direct jump optimization */ extern int arch_prepared_optinsn(struct arch_optimized_insn *optinsn); extern int arch_check_optimized_kprobe(struct optimized_kprobe *op); extern int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *orig); extern void arch_remove_optimized_kprobe(struct optimized_kprobe *op); extern void arch_optimize_kprobes(struct list_head *oplist); extern void arch_unoptimize_kprobes(struct list_head *oplist, struct list_head *done_list); extern void arch_unoptimize_kprobe(struct optimized_kprobe *op); extern int arch_within_optimized_kprobe(struct optimized_kprobe *op, unsigned long addr); extern void opt_pre_handler(struct kprobe *p, struct pt_regs *regs); DEFINE_INSN_CACHE_OPS(optinsn); #ifdef CONFIG_SYSCTL extern int sysctl_kprobes_optimization; extern int proc_kprobes_optimization_handler(struct ctl_table *table, int write, void *buffer, size_t *length, loff_t *ppos); #endif extern void wait_for_kprobe_optimizer(void); bool optprobe_queued_unopt(struct optimized_kprobe *op); bool kprobe_disarmed(struct kprobe *p); #else static inline void wait_for_kprobe_optimizer(void) { } #endif /* CONFIG_OPTPROBES */ #ifdef CONFIG_KPROBES_ON_FTRACE extern void kprobe_ftrace_handler(unsigned long ip, unsigned long parent_ip, struct ftrace_ops *ops, struct ftrace_regs *fregs); extern int arch_prepare_kprobe_ftrace(struct kprobe *p); #endif int arch_check_ftrace_location(struct kprobe *p); /* Get the kprobe at this addr (if any) - called with preemption disabled */ struct kprobe *get_kprobe(void *addr); /* kprobe_running() will just return the current_kprobe on this CPU */ static inline struct kprobe *kprobe_running(void) { return (__this_cpu_read(current_kprobe)); } static inline void reset_current_kprobe(void) { __this_cpu_write(current_kprobe, NULL); } static inline struct kprobe_ctlblk *get_kprobe_ctlblk(void) { return this_cpu_ptr(&kprobe_ctlblk); } kprobe_opcode_t *kprobe_lookup_name(const char *name, unsigned int offset); int register_kprobe(struct kprobe *p); void unregister_kprobe(struct kprobe *p); int register_kprobes(struct kprobe **kps, int num); void unregister_kprobes(struct kprobe **kps, int num); unsigned long arch_deref_entry_point(void *); int register_kretprobe(struct kretprobe *rp); void unregister_kretprobe(struct kretprobe *rp); int register_kretprobes(struct kretprobe **rps, int num); void unregister_kretprobes(struct kretprobe **rps, int num); void kprobe_flush_task(struct task_struct *tk); void kprobe_free_init_mem(void); int disable_kprobe(struct kprobe *kp); int enable_kprobe(struct kprobe *kp); void dump_kprobe(struct kprobe *kp); void *alloc_insn_page(void); void *alloc_optinsn_page(void); void free_optinsn_page(void *page); int kprobe_get_kallsym(unsigned int symnum, unsigned long *value, char *type, char *sym); int arch_kprobe_get_kallsym(unsigned int *symnum, unsigned long *value, char *type, char *sym); #else /* !CONFIG_KPROBES: */ static inline int kprobes_built_in(void) { return 0; } static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr) { return 0; } static inline struct kprobe *get_kprobe(void *addr) { return NULL; } static inline struct kprobe *kprobe_running(void) { return NULL; } static inline int register_kprobe(struct kprobe *p) { return -ENOSYS; } static inline int register_kprobes(struct kprobe **kps, int num) { return -ENOSYS; } static inline void unregister_kprobe(struct kprobe *p) { } static inline void unregister_kprobes(struct kprobe **kps, int num) { } static inline int register_kretprobe(struct kretprobe *rp) { return -ENOSYS; } static inline int register_kretprobes(struct kretprobe **rps, int num) { return -ENOSYS; } static inline void unregister_kretprobe(struct kretprobe *rp) { } static inline void unregister_kretprobes(struct kretprobe **rps, int num) { } static inline void kprobe_flush_task(struct task_struct *tk) { } static inline void kprobe_free_init_mem(void) { } static inline int disable_kprobe(struct kprobe *kp) { return -ENOSYS; } static inline int enable_kprobe(struct kprobe *kp) { return -ENOSYS; } static inline bool within_kprobe_blacklist(unsigned long addr) { return true; } static inline int kprobe_get_kallsym(unsigned int symnum, unsigned long *value, char *type, char *sym) { return -ERANGE; } #endif /* CONFIG_KPROBES */ static inline int disable_kretprobe(struct kretprobe *rp) { return disable_kprobe(&rp->kp); } static inline int enable_kretprobe(struct kretprobe *rp) { return enable_kprobe(&rp->kp); } #ifndef CONFIG_KPROBES static inline bool is_kprobe_insn_slot(unsigned long addr) { return false; } #endif #ifndef CONFIG_OPTPROBES static inline bool is_kprobe_optinsn_slot(unsigned long addr) { return false; } #endif #ifdef CONFIG_KRETPROBES static nokprobe_inline bool is_kretprobe_trampoline(unsigned long addr) { return (void *)addr == kretprobe_trampoline_addr(); } unsigned long kretprobe_find_ret_addr(struct task_struct *tsk, void *fp, struct llist_node **cur); #else static nokprobe_inline bool is_kretprobe_trampoline(unsigned long addr) { return false; } static nokprobe_inline unsigned long kretprobe_find_ret_addr(struct task_struct *tsk, void *fp, struct llist_node **cur) { return 0; } #endif /* Returns true if kprobes handled the fault */ static nokprobe_inline bool kprobe_page_fault(struct pt_regs *regs, unsigned int trap) { if (!kprobes_built_in()) return false; if (user_mode(regs)) return false; /* * To be potentially processing a kprobe fault and to be allowed * to call kprobe_running(), we have to be non-preemptible. */ if (preemptible()) return false; if (!kprobe_running()) return false; return kprobe_fault_handler(regs, trap); } #endif /* _LINUX_KPROBES_H */ PK ! &��X X reboot-mode.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __REBOOT_MODE_H__ #define __REBOOT_MODE_H__ struct reboot_mode_driver { struct device *dev; struct list_head head; int (*write)(struct reboot_mode_driver *reboot, unsigned int magic); struct notifier_block reboot_notifier; }; int reboot_mode_register(struct reboot_mode_driver *reboot); int reboot_mode_unregister(struct reboot_mode_driver *reboot); int devm_reboot_mode_register(struct device *dev, struct reboot_mode_driver *reboot); void devm_reboot_mode_unregister(struct device *dev, struct reboot_mode_driver *reboot); #endif PK ! �n�� oom.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __INCLUDE_LINUX_OOM_H #define __INCLUDE_LINUX_OOM_H #include <linux/sched/signal.h> #include <linux/types.h> #include <linux/nodemask.h> #include <uapi/linux/oom.h> #include <linux/sched/coredump.h> /* MMF_* */ #include <linux/mm.h> /* VM_FAULT* */ struct zonelist; struct notifier_block; struct mem_cgroup; struct task_struct; enum oom_constraint { CONSTRAINT_NONE, CONSTRAINT_CPUSET, CONSTRAINT_MEMORY_POLICY, CONSTRAINT_MEMCG, }; /* * Details of the page allocation that triggered the oom killer that are used to * determine what should be killed. */ struct oom_control { /* Used to determine cpuset */ struct zonelist *zonelist; /* Used to determine mempolicy */ nodemask_t *nodemask; /* Memory cgroup in which oom is invoked, or NULL for global oom */ struct mem_cgroup *memcg; /* Used to determine cpuset and node locality requirement */ const gfp_t gfp_mask; /* * order == -1 means the oom kill is required by sysrq, otherwise only * for display purposes. */ const int order; /* Used by oom implementation, do not set */ unsigned long totalpages; struct task_struct *chosen; long chosen_points; /* Used to print the constraint info. */ enum oom_constraint constraint; }; extern struct mutex oom_lock; extern struct mutex oom_adj_mutex; static inline void set_current_oom_origin(void) { current->signal->oom_flag_origin = true; } static inline void clear_current_oom_origin(void) { current->signal->oom_flag_origin = false; } static inline bool oom_task_origin(const struct task_struct *p) { return p->signal->oom_flag_origin; } static inline bool tsk_is_oom_victim(struct task_struct * tsk) { return tsk->signal->oom_mm; } /* * Use this helper if tsk->mm != mm and the victim mm needs a special * handling. This is guaranteed to stay true after once set. */ static inline bool mm_is_oom_victim(struct mm_struct *mm) { return test_bit(MMF_OOM_VICTIM, &mm->flags); } /* * Checks whether a page fault on the given mm is still reliable. * This is no longer true if the oom reaper started to reap the * address space which is reflected by MMF_UNSTABLE flag set in * the mm. At that moment any !shared mapping would lose the content * and could cause a memory corruption (zero pages instead of the * original content). * * User should call this before establishing a page table entry for * a !shared mapping and under the proper page table lock. * * Return 0 when the PF is safe VM_FAULT_SIGBUS otherwise. */ static inline vm_fault_t check_stable_address_space(struct mm_struct *mm) { if (unlikely(test_bit(MMF_UNSTABLE, &mm->flags))) return VM_FAULT_SIGBUS; return 0; } bool __oom_reap_task_mm(struct mm_struct *mm); long oom_badness(struct task_struct *p, unsigned long totalpages); extern bool out_of_memory(struct oom_control *oc); extern void exit_oom_victim(void); extern int register_oom_notifier(struct notifier_block *nb); extern int unregister_oom_notifier(struct notifier_block *nb); extern bool oom_killer_disable(signed long timeout); extern void oom_killer_enable(void); extern struct task_struct *find_lock_task_mm(struct task_struct *p); /* sysctls */ extern int sysctl_oom_dump_tasks; extern int sysctl_oom_kill_allocating_task; extern int sysctl_panic_on_oom; #endif /* _INCLUDE_LINUX_OOM_H */ PK ! �P�� eventfd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/eventfd.h * * Copyright (C) 2007 Davide Libenzi <davidel@xmailserver.org> * */ #ifndef _LINUX_EVENTFD_H #define _LINUX_EVENTFD_H #include <linux/fcntl.h> #include <linux/wait.h> #include <linux/err.h> #include <linux/percpu-defs.h> #include <linux/percpu.h> #include <linux/sched.h> /* * CAREFUL: Check include/uapi/asm-generic/fcntl.h when defining * new flags, since they might collide with O_* ones. We want * to re-use O_* flags that couldn't possibly have a meaning * from eventfd, in order to leave a free define-space for * shared O_* flags. */ #define EFD_SEMAPHORE (1 << 0) #define EFD_CLOEXEC O_CLOEXEC #define EFD_NONBLOCK O_NONBLOCK #define EFD_SHARED_FCNTL_FLAGS (O_CLOEXEC | O_NONBLOCK) #define EFD_FLAGS_SET (EFD_SHARED_FCNTL_FLAGS | EFD_SEMAPHORE) struct eventfd_ctx; struct file; #ifdef CONFIG_EVENTFD void eventfd_ctx_put(struct eventfd_ctx *ctx); struct file *eventfd_fget(int fd); struct eventfd_ctx *eventfd_ctx_fdget(int fd); struct eventfd_ctx *eventfd_ctx_fileget(struct file *file); __u64 eventfd_signal(struct eventfd_ctx *ctx, __u64 n); __u64 eventfd_signal_mask(struct eventfd_ctx *ctx, __u64 n, unsigned mask); int eventfd_ctx_remove_wait_queue(struct eventfd_ctx *ctx, wait_queue_entry_t *wait, __u64 *cnt); void eventfd_ctx_do_read(struct eventfd_ctx *ctx, __u64 *cnt); static inline bool eventfd_signal_allowed(void) { return !current->in_eventfd; } #else /* CONFIG_EVENTFD */ /* * Ugly ugly ugly error layer to support modules that uses eventfd but * pretend to work in !CONFIG_EVENTFD configurations. Namely, AIO. */ static inline struct eventfd_ctx *eventfd_ctx_fdget(int fd) { return ERR_PTR(-ENOSYS); } static inline int eventfd_signal(struct eventfd_ctx *ctx, __u64 n) { return -ENOSYS; } static inline int eventfd_signal_mask(struct eventfd_ctx *ctx, __u64 n, unsigned mask) { return -ENOSYS; } static inline void eventfd_ctx_put(struct eventfd_ctx *ctx) { } static inline int eventfd_ctx_remove_wait_queue(struct eventfd_ctx *ctx, wait_queue_entry_t *wait, __u64 *cnt) { return -ENOSYS; } static inline bool eventfd_signal_allowed(void) { return true; } static inline void eventfd_ctx_do_read(struct eventfd_ctx *ctx, __u64 *cnt) { } #endif #endif /* _LINUX_EVENTFD_H */ PK ! �韢 � fcntl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FCNTL_H #define _LINUX_FCNTL_H #include <linux/stat.h> #include <uapi/linux/fcntl.h> /* List of all valid flags for the open/openat flags argument: */ #define VALID_OPEN_FLAGS \ (O_RDONLY | O_WRONLY | O_RDWR | O_CREAT | O_EXCL | O_NOCTTY | O_TRUNC | \ O_APPEND | O_NDELAY | O_NONBLOCK | __O_SYNC | O_DSYNC | \ FASYNC | O_DIRECT | O_LARGEFILE | O_DIRECTORY | O_NOFOLLOW | \ O_NOATIME | O_CLOEXEC | O_PATH | __O_TMPFILE) /* List of all valid flags for the how->resolve argument: */ #define VALID_RESOLVE_FLAGS \ (RESOLVE_NO_XDEV | RESOLVE_NO_MAGICLINKS | RESOLVE_NO_SYMLINKS | \ RESOLVE_BENEATH | RESOLVE_IN_ROOT | RESOLVE_CACHED) /* List of all open_how "versions". */ #define OPEN_HOW_SIZE_VER0 24 /* sizeof first published struct */ #define OPEN_HOW_SIZE_LATEST OPEN_HOW_SIZE_VER0 #ifndef force_o_largefile #define force_o_largefile() (!IS_ENABLED(CONFIG_ARCH_32BIT_OFF_T)) #endif #if BITS_PER_LONG == 32 #define IS_GETLK32(cmd) ((cmd) == F_GETLK) #define IS_SETLK32(cmd) ((cmd) == F_SETLK) #define IS_SETLKW32(cmd) ((cmd) == F_SETLKW) #define IS_GETLK64(cmd) ((cmd) == F_GETLK64) #define IS_SETLK64(cmd) ((cmd) == F_SETLK64) #define IS_SETLKW64(cmd) ((cmd) == F_SETLKW64) #else #define IS_GETLK32(cmd) (0) #define IS_SETLK32(cmd) (0) #define IS_SETLKW32(cmd) (0) #define IS_GETLK64(cmd) ((cmd) == F_GETLK) #define IS_SETLK64(cmd) ((cmd) == F_SETLK) #define IS_SETLKW64(cmd) ((cmd) == F_SETLKW) #endif /* BITS_PER_LONG == 32 */ #define IS_GETLK(cmd) (IS_GETLK32(cmd) || IS_GETLK64(cmd)) #define IS_SETLK(cmd) (IS_SETLK32(cmd) || IS_SETLK64(cmd)) #define IS_SETLKW(cmd) (IS_SETLKW32(cmd) || IS_SETLKW64(cmd)) #endif PK ! ꄓ�( ( adb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for ADB (Apple Desktop Bus) support. */ #ifndef __ADB_H #define __ADB_H #include <uapi/linux/adb.h> struct adb_request { unsigned char data[32]; int nbytes; unsigned char reply[32]; int reply_len; unsigned char reply_expected; unsigned char sent; unsigned char complete; void (*done)(struct adb_request *); void *arg; struct adb_request *next; }; struct adb_ids { int nids; unsigned char id[16]; }; /* Structure which encapsulates a low-level ADB driver */ struct adb_driver { char name[16]; int (*probe)(void); int (*init)(void); int (*send_request)(struct adb_request *req, int sync); int (*autopoll)(int devs); void (*poll)(void); int (*reset_bus)(void); }; /* Values for adb_request flags */ #define ADBREQ_REPLY 1 /* expect reply */ #define ADBREQ_SYNC 2 /* poll until done */ #define ADBREQ_NOSEND 4 /* build the request, but don't send it */ /* Messages sent thru the client_list notifier. You should NOT stop the operation, at least not with this version */ enum adb_message { ADB_MSG_POWERDOWN, /* Currently called before sleep only */ ADB_MSG_PRE_RESET, /* Called before resetting the bus */ ADB_MSG_POST_RESET /* Called after resetting the bus (re-do init & register) */ }; extern struct blocking_notifier_head adb_client_list; int adb_request(struct adb_request *req, void (*done)(struct adb_request *), int flags, int nbytes, ...); int adb_register(int default_id,int handler_id,struct adb_ids *ids, void (*handler)(unsigned char *, int, int)); int adb_unregister(int index); void adb_poll(void); void adb_input(unsigned char *, int, int); int adb_reset_bus(void); int adb_try_handler_change(int address, int new_id); int adb_get_infos(int address, int *original_address, int *handler_id); #endif /* __ADB_H */ PK ! �Ac c vt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VT_H #define _LINUX_VT_H #include <uapi/linux/vt.h> /* Virtual Terminal events. */ #define VT_ALLOCATE 0x0001 /* Console got allocated */ #define VT_DEALLOCATE 0x0002 /* Console will be deallocated */ #define VT_WRITE 0x0003 /* A char got output */ #define VT_UPDATE 0x0004 /* A bigger update occurred */ #define VT_PREWRITE 0x0005 /* A char is about to be written to the console */ #ifdef CONFIG_VT_CONSOLE extern int vt_kmsg_redirect(int new); #else static inline int vt_kmsg_redirect(int new) { return 0; } #endif #endif /* _LINUX_VT_H */ PK ! sA #}� }� pm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * pm.h - Power management interface * * Copyright (C) 2000 Andrew Henroid */ #ifndef _LINUX_PM_H #define _LINUX_PM_H #include <linux/export.h> #include <linux/list.h> #include <linux/workqueue.h> #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/timer.h> #include <linux/hrtimer.h> #include <linux/completion.h> /* * Callbacks for platform drivers to implement. */ extern void (*pm_power_off)(void); extern void (*pm_power_off_prepare)(void); struct device; /* we have a circular dep with device.h */ #ifdef CONFIG_VT_CONSOLE_SLEEP extern void pm_vt_switch_required(struct device *dev, bool required); extern void pm_vt_switch_unregister(struct device *dev); #else static inline void pm_vt_switch_required(struct device *dev, bool required) { } static inline void pm_vt_switch_unregister(struct device *dev) { } #endif /* CONFIG_VT_CONSOLE_SLEEP */ /* * Device power management */ #ifdef CONFIG_PM extern const char power_group_name[]; /* = "power" */ #else #define power_group_name NULL #endif typedef struct pm_message { int event; } pm_message_t; /** * struct dev_pm_ops - device PM callbacks. * * @prepare: The principal role of this callback is to prevent new children of * the device from being registered after it has returned (the driver's * subsystem and generally the rest of the kernel is supposed to prevent * new calls to the probe method from being made too once @prepare() has * succeeded). If @prepare() detects a situation it cannot handle (e.g. * registration of a child already in progress), it may return -EAGAIN, so * that the PM core can execute it once again (e.g. after a new child has * been registered) to recover from the race condition. * This method is executed for all kinds of suspend transitions and is * followed by one of the suspend callbacks: @suspend(), @freeze(), or * @poweroff(). If the transition is a suspend to memory or standby (that * is, not related to hibernation), the return value of @prepare() may be * used to indicate to the PM core to leave the device in runtime suspend * if applicable. Namely, if @prepare() returns a positive number, the PM * core will understand that as a declaration that the device appears to be * runtime-suspended and it may be left in that state during the entire * transition and during the subsequent resume if all of its descendants * are left in runtime suspend too. If that happens, @complete() will be * executed directly after @prepare() and it must ensure the proper * functioning of the device after the system resume. * The PM core executes subsystem-level @prepare() for all devices before * starting to invoke suspend callbacks for any of them, so generally * devices may be assumed to be functional or to respond to runtime resume * requests while @prepare() is being executed. However, device drivers * may NOT assume anything about the availability of user space at that * time and it is NOT valid to request firmware from within @prepare() * (it's too late to do that). It also is NOT valid to allocate * substantial amounts of memory from @prepare() in the GFP_KERNEL mode. * [To work around these limitations, drivers may register suspend and * hibernation notifiers to be executed before the freezing of tasks.] * * @complete: Undo the changes made by @prepare(). This method is executed for * all kinds of resume transitions, following one of the resume callbacks: * @resume(), @thaw(), @restore(). Also called if the state transition * fails before the driver's suspend callback: @suspend(), @freeze() or * @poweroff(), can be executed (e.g. if the suspend callback fails for one * of the other devices that the PM core has unsuccessfully attempted to * suspend earlier). * The PM core executes subsystem-level @complete() after it has executed * the appropriate resume callbacks for all devices. If the corresponding * @prepare() at the beginning of the suspend transition returned a * positive number and the device was left in runtime suspend (without * executing any suspend and resume callbacks for it), @complete() will be * the only callback executed for the device during resume. In that case, * @complete() must be prepared to do whatever is necessary to ensure the * proper functioning of the device after the system resume. To this end, * @complete() can check the power.direct_complete flag of the device to * learn whether (unset) or not (set) the previous suspend and resume * callbacks have been executed for it. * * @suspend: Executed before putting the system into a sleep state in which the * contents of main memory are preserved. The exact action to perform * depends on the device's subsystem (PM domain, device type, class or bus * type), but generally the device must be quiescent after subsystem-level * @suspend() has returned, so that it doesn't do any I/O or DMA. * Subsystem-level @suspend() is executed for all devices after invoking * subsystem-level @prepare() for all of them. * * @suspend_late: Continue operations started by @suspend(). For a number of * devices @suspend_late() may point to the same callback routine as the * runtime suspend callback. * * @resume: Executed after waking the system up from a sleep state in which the * contents of main memory were preserved. The exact action to perform * depends on the device's subsystem, but generally the driver is expected * to start working again, responding to hardware events and software * requests (the device itself may be left in a low-power state, waiting * for a runtime resume to occur). The state of the device at the time its * driver's @resume() callback is run depends on the platform and subsystem * the device belongs to. On most platforms, there are no restrictions on * availability of resources like clocks during @resume(). * Subsystem-level @resume() is executed for all devices after invoking * subsystem-level @resume_noirq() for all of them. * * @resume_early: Prepare to execute @resume(). For a number of devices * @resume_early() may point to the same callback routine as the runtime * resume callback. * * @freeze: Hibernation-specific, executed before creating a hibernation image. * Analogous to @suspend(), but it should not enable the device to signal * wakeup events or change its power state. The majority of subsystems * (with the notable exception of the PCI bus type) expect the driver-level * @freeze() to save the device settings in memory to be used by @restore() * during the subsequent resume from hibernation. * Subsystem-level @freeze() is executed for all devices after invoking * subsystem-level @prepare() for all of them. * * @freeze_late: Continue operations started by @freeze(). Analogous to * @suspend_late(), but it should not enable the device to signal wakeup * events or change its power state. * * @thaw: Hibernation-specific, executed after creating a hibernation image OR * if the creation of an image has failed. Also executed after a failing * attempt to restore the contents of main memory from such an image. * Undo the changes made by the preceding @freeze(), so the device can be * operated in the same way as immediately before the call to @freeze(). * Subsystem-level @thaw() is executed for all devices after invoking * subsystem-level @thaw_noirq() for all of them. It also may be executed * directly after @freeze() in case of a transition error. * * @thaw_early: Prepare to execute @thaw(). Undo the changes made by the * preceding @freeze_late(). * * @poweroff: Hibernation-specific, executed after saving a hibernation image. * Analogous to @suspend(), but it need not save the device's settings in * memory. * Subsystem-level @poweroff() is executed for all devices after invoking * subsystem-level @prepare() for all of them. * * @poweroff_late: Continue operations started by @poweroff(). Analogous to * @suspend_late(), but it need not save the device's settings in memory. * * @restore: Hibernation-specific, executed after restoring the contents of main * memory from a hibernation image, analogous to @resume(). * * @restore_early: Prepare to execute @restore(), analogous to @resume_early(). * * @suspend_noirq: Complete the actions started by @suspend(). Carry out any * additional operations required for suspending the device that might be * racing with its driver's interrupt handler, which is guaranteed not to * run while @suspend_noirq() is being executed. * It generally is expected that the device will be in a low-power state * (appropriate for the target system sleep state) after subsystem-level * @suspend_noirq() has returned successfully. If the device can generate * system wakeup signals and is enabled to wake up the system, it should be * configured to do so at that time. However, depending on the platform * and device's subsystem, @suspend() or @suspend_late() may be allowed to * put the device into the low-power state and configure it to generate * wakeup signals, in which case it generally is not necessary to define * @suspend_noirq(). * * @resume_noirq: Prepare for the execution of @resume() by carrying out any * operations required for resuming the device that might be racing with * its driver's interrupt handler, which is guaranteed not to run while * @resume_noirq() is being executed. * * @freeze_noirq: Complete the actions started by @freeze(). Carry out any * additional operations required for freezing the device that might be * racing with its driver's interrupt handler, which is guaranteed not to * run while @freeze_noirq() is being executed. * The power state of the device should not be changed by either @freeze(), * or @freeze_late(), or @freeze_noirq() and it should not be configured to * signal system wakeup by any of these callbacks. * * @thaw_noirq: Prepare for the execution of @thaw() by carrying out any * operations required for thawing the device that might be racing with its * driver's interrupt handler, which is guaranteed not to run while * @thaw_noirq() is being executed. * * @poweroff_noirq: Complete the actions started by @poweroff(). Analogous to * @suspend_noirq(), but it need not save the device's settings in memory. * * @restore_noirq: Prepare for the execution of @restore() by carrying out any * operations required for thawing the device that might be racing with its * driver's interrupt handler, which is guaranteed not to run while * @restore_noirq() is being executed. Analogous to @resume_noirq(). * * @runtime_suspend: Prepare the device for a condition in which it won't be * able to communicate with the CPU(s) and RAM due to power management. * This need not mean that the device should be put into a low-power state. * For example, if the device is behind a link which is about to be turned * off, the device may remain at full power. If the device does go to low * power and is capable of generating runtime wakeup events, remote wakeup * (i.e., a hardware mechanism allowing the device to request a change of * its power state via an interrupt) should be enabled for it. * * @runtime_resume: Put the device into the fully active state in response to a * wakeup event generated by hardware or at the request of software. If * necessary, put the device into the full-power state and restore its * registers, so that it is fully operational. * * @runtime_idle: Device appears to be inactive and it might be put into a * low-power state if all of the necessary conditions are satisfied. * Check these conditions, and return 0 if it's appropriate to let the PM * core queue a suspend request for the device. * * Several device power state transitions are externally visible, affecting * the state of pending I/O queues and (for drivers that touch hardware) * interrupts, wakeups, DMA, and other hardware state. There may also be * internal transitions to various low-power modes which are transparent * to the rest of the driver stack (such as a driver that's ON gating off * clocks which are not in active use). * * The externally visible transitions are handled with the help of callbacks * included in this structure in such a way that, typically, two levels of * callbacks are involved. First, the PM core executes callbacks provided by PM * domains, device types, classes and bus types. They are the subsystem-level * callbacks expected to execute callbacks provided by device drivers, although * they may choose not to do that. If the driver callbacks are executed, they * have to collaborate with the subsystem-level callbacks to achieve the goals * appropriate for the given system transition, given transition phase and the * subsystem the device belongs to. * * All of the above callbacks, except for @complete(), return error codes. * However, the error codes returned by @resume(), @thaw(), @restore(), * @resume_noirq(), @thaw_noirq(), and @restore_noirq(), do not cause the PM * core to abort the resume transition during which they are returned. The * error codes returned in those cases are only printed to the system logs for * debugging purposes. Still, it is recommended that drivers only return error * codes from their resume methods in case of an unrecoverable failure (i.e. * when the device being handled refuses to resume and becomes unusable) to * allow the PM core to be modified in the future, so that it can avoid * attempting to handle devices that failed to resume and their children. * * It is allowed to unregister devices while the above callbacks are being * executed. However, a callback routine MUST NOT try to unregister the device * it was called for, although it may unregister children of that device (for * example, if it detects that a child was unplugged while the system was * asleep). * * There also are callbacks related to runtime power management of devices. * Again, as a rule these callbacks are executed by the PM core for subsystems * (PM domains, device types, classes and bus types) and the subsystem-level * callbacks are expected to invoke the driver callbacks. Moreover, the exact * actions to be performed by a device driver's callbacks generally depend on * the platform and subsystem the device belongs to. * * Refer to Documentation/power/runtime_pm.rst for more information about the * role of the @runtime_suspend(), @runtime_resume() and @runtime_idle() * callbacks in device runtime power management. */ struct dev_pm_ops { int (*prepare)(struct device *dev); void (*complete)(struct device *dev); int (*suspend)(struct device *dev); int (*resume)(struct device *dev); int (*freeze)(struct device *dev); int (*thaw)(struct device *dev); int (*poweroff)(struct device *dev); int (*restore)(struct device *dev); int (*suspend_late)(struct device *dev); int (*resume_early)(struct device *dev); int (*freeze_late)(struct device *dev); int (*thaw_early)(struct device *dev); int (*poweroff_late)(struct device *dev); int (*restore_early)(struct device *dev); int (*suspend_noirq)(struct device *dev); int (*resume_noirq)(struct device *dev); int (*freeze_noirq)(struct device *dev); int (*thaw_noirq)(struct device *dev); int (*poweroff_noirq)(struct device *dev); int (*restore_noirq)(struct device *dev); int (*runtime_suspend)(struct device *dev); int (*runtime_resume)(struct device *dev); int (*runtime_idle)(struct device *dev); }; #define SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ .suspend = pm_sleep_ptr(suspend_fn), \ .resume = pm_sleep_ptr(resume_fn), \ .freeze = pm_sleep_ptr(suspend_fn), \ .thaw = pm_sleep_ptr(resume_fn), \ .poweroff = pm_sleep_ptr(suspend_fn), \ .restore = pm_sleep_ptr(resume_fn), #define LATE_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ .suspend_late = pm_sleep_ptr(suspend_fn), \ .resume_early = pm_sleep_ptr(resume_fn), \ .freeze_late = pm_sleep_ptr(suspend_fn), \ .thaw_early = pm_sleep_ptr(resume_fn), \ .poweroff_late = pm_sleep_ptr(suspend_fn), \ .restore_early = pm_sleep_ptr(resume_fn), #define NOIRQ_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ .suspend_noirq = pm_sleep_ptr(suspend_fn), \ .resume_noirq = pm_sleep_ptr(resume_fn), \ .freeze_noirq = pm_sleep_ptr(suspend_fn), \ .thaw_noirq = pm_sleep_ptr(resume_fn), \ .poweroff_noirq = pm_sleep_ptr(suspend_fn), \ .restore_noirq = pm_sleep_ptr(resume_fn), #define RUNTIME_PM_OPS(suspend_fn, resume_fn, idle_fn) \ .runtime_suspend = suspend_fn, \ .runtime_resume = resume_fn, \ .runtime_idle = idle_fn, #ifdef CONFIG_PM_SLEEP #define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) #else #define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) #endif #ifdef CONFIG_PM_SLEEP #define SET_LATE_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ LATE_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) #else #define SET_LATE_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) #endif #ifdef CONFIG_PM_SLEEP #define SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ NOIRQ_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) #else #define SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) #endif #ifdef CONFIG_PM #define SET_RUNTIME_PM_OPS(suspend_fn, resume_fn, idle_fn) \ RUNTIME_PM_OPS(suspend_fn, resume_fn, idle_fn) #else #define SET_RUNTIME_PM_OPS(suspend_fn, resume_fn, idle_fn) #endif #define _DEFINE_DEV_PM_OPS(name, \ suspend_fn, resume_fn, \ runtime_suspend_fn, runtime_resume_fn, idle_fn) \ const struct dev_pm_ops name = { \ SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ RUNTIME_PM_OPS(runtime_suspend_fn, runtime_resume_fn, idle_fn) \ } #ifdef CONFIG_PM #define _EXPORT_DEV_PM_OPS(name, suspend_fn, resume_fn, runtime_suspend_fn, \ runtime_resume_fn, idle_fn, sec) \ _DEFINE_DEV_PM_OPS(name, suspend_fn, resume_fn, runtime_suspend_fn, \ runtime_resume_fn, idle_fn); \ _EXPORT_SYMBOL(name, sec) #else #define _EXPORT_DEV_PM_OPS(name, suspend_fn, resume_fn, runtime_suspend_fn, \ runtime_resume_fn, idle_fn, sec) \ static __maybe_unused _DEFINE_DEV_PM_OPS(__static_##name, suspend_fn, \ resume_fn, runtime_suspend_fn, \ runtime_resume_fn, idle_fn) #endif /* * Use this if you want to use the same suspend and resume callbacks for suspend * to RAM and hibernation. * * If the underlying dev_pm_ops struct symbol has to be exported, use * EXPORT_SIMPLE_DEV_PM_OPS() or EXPORT_GPL_SIMPLE_DEV_PM_OPS() instead. */ #define DEFINE_SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \ _DEFINE_DEV_PM_OPS(name, suspend_fn, resume_fn, NULL, NULL, NULL) #define EXPORT_SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \ _EXPORT_DEV_PM_OPS(name, suspend_fn, resume_fn, NULL, NULL, NULL, "") #define EXPORT_GPL_SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \ _EXPORT_DEV_PM_OPS(name, suspend_fn, resume_fn, NULL, NULL, NULL, "_gpl") /* Deprecated. Use DEFINE_SIMPLE_DEV_PM_OPS() instead. */ #define SIMPLE_DEV_PM_OPS(name, suspend_fn, resume_fn) \ const struct dev_pm_ops __maybe_unused name = { \ SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ } /* * Use this for defining a set of PM operations to be used in all situations * (system suspend, hibernation or runtime PM). * NOTE: In general, system suspend callbacks, .suspend() and .resume(), should * be different from the corresponding runtime PM callbacks, .runtime_suspend(), * and .runtime_resume(), because .runtime_suspend() always works on an already * quiescent device, while .suspend() should assume that the device may be doing * something when it is called (it should ensure that the device will be * quiescent after it has returned). Therefore it's better to point the "late" * suspend and "early" resume callback pointers, .suspend_late() and * .resume_early(), to the same routines as .runtime_suspend() and * .runtime_resume(), respectively (and analogously for hibernation). * * Deprecated. You most likely don't want this macro. Use * DEFINE_RUNTIME_DEV_PM_OPS() instead. */ #define UNIVERSAL_DEV_PM_OPS(name, suspend_fn, resume_fn, idle_fn) \ const struct dev_pm_ops __maybe_unused name = { \ SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \ SET_RUNTIME_PM_OPS(suspend_fn, resume_fn, idle_fn) \ } #define pm_ptr(_ptr) PTR_IF(IS_ENABLED(CONFIG_PM), (_ptr)) #define pm_sleep_ptr(_ptr) PTR_IF(IS_ENABLED(CONFIG_PM_SLEEP), (_ptr)) /* * PM_EVENT_ messages * * The following PM_EVENT_ messages are defined for the internal use of the PM * core, in order to provide a mechanism allowing the high level suspend and * hibernation code to convey the necessary information to the device PM core * code: * * ON No transition. * * FREEZE System is going to hibernate, call ->prepare() and ->freeze() * for all devices. * * SUSPEND System is going to suspend, call ->prepare() and ->suspend() * for all devices. * * HIBERNATE Hibernation image has been saved, call ->prepare() and * ->poweroff() for all devices. * * QUIESCE Contents of main memory are going to be restored from a (loaded) * hibernation image, call ->prepare() and ->freeze() for all * devices. * * RESUME System is resuming, call ->resume() and ->complete() for all * devices. * * THAW Hibernation image has been created, call ->thaw() and * ->complete() for all devices. * * RESTORE Contents of main memory have been restored from a hibernation * image, call ->restore() and ->complete() for all devices. * * RECOVER Creation of a hibernation image or restoration of the main * memory contents from a hibernation image has failed, call * ->thaw() and ->complete() for all devices. * * The following PM_EVENT_ messages are defined for internal use by * kernel subsystems. They are never issued by the PM core. * * USER_SUSPEND Manual selective suspend was issued by userspace. * * USER_RESUME Manual selective resume was issued by userspace. * * REMOTE_WAKEUP Remote-wakeup request was received from the device. * * AUTO_SUSPEND Automatic (device idle) runtime suspend was * initiated by the subsystem. * * AUTO_RESUME Automatic (device needed) runtime resume was * requested by a driver. */ #define PM_EVENT_INVALID (-1) #define PM_EVENT_ON 0x0000 #define PM_EVENT_FREEZE 0x0001 #define PM_EVENT_SUSPEND 0x0002 #define PM_EVENT_HIBERNATE 0x0004 #define PM_EVENT_QUIESCE 0x0008 #define PM_EVENT_RESUME 0x0010 #define PM_EVENT_THAW 0x0020 #define PM_EVENT_RESTORE 0x0040 #define PM_EVENT_RECOVER 0x0080 #define PM_EVENT_USER 0x0100 #define PM_EVENT_REMOTE 0x0200 #define PM_EVENT_AUTO 0x0400 #define PM_EVENT_SLEEP (PM_EVENT_SUSPEND | PM_EVENT_HIBERNATE) #define PM_EVENT_USER_SUSPEND (PM_EVENT_USER | PM_EVENT_SUSPEND) #define PM_EVENT_USER_RESUME (PM_EVENT_USER | PM_EVENT_RESUME) #define PM_EVENT_REMOTE_RESUME (PM_EVENT_REMOTE | PM_EVENT_RESUME) #define PM_EVENT_AUTO_SUSPEND (PM_EVENT_AUTO | PM_EVENT_SUSPEND) #define PM_EVENT_AUTO_RESUME (PM_EVENT_AUTO | PM_EVENT_RESUME) #define PMSG_INVALID ((struct pm_message){ .event = PM_EVENT_INVALID, }) #define PMSG_ON ((struct pm_message){ .event = PM_EVENT_ON, }) #define PMSG_FREEZE ((struct pm_message){ .event = PM_EVENT_FREEZE, }) #define PMSG_QUIESCE ((struct pm_message){ .event = PM_EVENT_QUIESCE, }) #define PMSG_SUSPEND ((struct pm_message){ .event = PM_EVENT_SUSPEND, }) #define PMSG_HIBERNATE ((struct pm_message){ .event = PM_EVENT_HIBERNATE, }) #define PMSG_RESUME ((struct pm_message){ .event = PM_EVENT_RESUME, }) #define PMSG_THAW ((struct pm_message){ .event = PM_EVENT_THAW, }) #define PMSG_RESTORE ((struct pm_message){ .event = PM_EVENT_RESTORE, }) #define PMSG_RECOVER ((struct pm_message){ .event = PM_EVENT_RECOVER, }) #define PMSG_USER_SUSPEND ((struct pm_message) \ { .event = PM_EVENT_USER_SUSPEND, }) #define PMSG_USER_RESUME ((struct pm_message) \ { .event = PM_EVENT_USER_RESUME, }) #define PMSG_REMOTE_RESUME ((struct pm_message) \ { .event = PM_EVENT_REMOTE_RESUME, }) #define PMSG_AUTO_SUSPEND ((struct pm_message) \ { .event = PM_EVENT_AUTO_SUSPEND, }) #define PMSG_AUTO_RESUME ((struct pm_message) \ { .event = PM_EVENT_AUTO_RESUME, }) #define PMSG_IS_AUTO(msg) (((msg).event & PM_EVENT_AUTO) != 0) /* * Device run-time power management status. * * These status labels are used internally by the PM core to indicate the * current status of a device with respect to the PM core operations. They do * not reflect the actual power state of the device or its status as seen by the * driver. * * RPM_ACTIVE Device is fully operational. Indicates that the device * bus type's ->runtime_resume() callback has completed * successfully. * * RPM_SUSPENDED Device bus type's ->runtime_suspend() callback has * completed successfully. The device is regarded as * suspended. * * RPM_RESUMING Device bus type's ->runtime_resume() callback is being * executed. * * RPM_SUSPENDING Device bus type's ->runtime_suspend() callback is being * executed. */ enum rpm_status { RPM_ACTIVE = 0, RPM_RESUMING, RPM_SUSPENDED, RPM_SUSPENDING, }; /* * Device run-time power management request types. * * RPM_REQ_NONE Do nothing. * * RPM_REQ_IDLE Run the device bus type's ->runtime_idle() callback * * RPM_REQ_SUSPEND Run the device bus type's ->runtime_suspend() callback * * RPM_REQ_AUTOSUSPEND Same as RPM_REQ_SUSPEND, but not until the device has * been inactive for as long as power.autosuspend_delay * * RPM_REQ_RESUME Run the device bus type's ->runtime_resume() callback */ enum rpm_request { RPM_REQ_NONE = 0, RPM_REQ_IDLE, RPM_REQ_SUSPEND, RPM_REQ_AUTOSUSPEND, RPM_REQ_RESUME, }; struct wakeup_source; struct wake_irq; struct pm_domain_data; struct pm_subsys_data { spinlock_t lock; unsigned int refcount; #ifdef CONFIG_PM_CLK unsigned int clock_op_might_sleep; struct mutex clock_mutex; struct list_head clock_list; #endif #ifdef CONFIG_PM_GENERIC_DOMAINS struct pm_domain_data *domain_data; #endif }; /* * Driver flags to control system suspend/resume behavior. * * These flags can be set by device drivers at the probe time. They need not be * cleared by the drivers as the driver core will take care of that. * * NO_DIRECT_COMPLETE: Do not apply direct-complete optimization to the device. * SMART_PREPARE: Take the driver ->prepare callback return value into account. * SMART_SUSPEND: Avoid resuming the device from runtime suspend. * MAY_SKIP_RESUME: Allow driver "noirq" and "early" callbacks to be skipped. * * See Documentation/driver-api/pm/devices.rst for details. */ #define DPM_FLAG_NO_DIRECT_COMPLETE BIT(0) #define DPM_FLAG_SMART_PREPARE BIT(1) #define DPM_FLAG_SMART_SUSPEND BIT(2) #define DPM_FLAG_MAY_SKIP_RESUME BIT(3) struct dev_pm_info { pm_message_t power_state; unsigned int can_wakeup:1; unsigned int async_suspend:1; bool in_dpm_list:1; /* Owned by the PM core */ bool is_prepared:1; /* Owned by the PM core */ bool is_suspended:1; /* Ditto */ bool is_noirq_suspended:1; bool is_late_suspended:1; bool no_pm:1; bool early_init:1; /* Owned by the PM core */ bool direct_complete:1; /* Owned by the PM core */ u32 driver_flags; spinlock_t lock; #ifdef CONFIG_PM_SLEEP struct list_head entry; struct completion completion; struct wakeup_source *wakeup; bool wakeup_path:1; bool syscore:1; bool no_pm_callbacks:1; /* Owned by the PM core */ unsigned int must_resume:1; /* Owned by the PM core */ unsigned int may_skip_resume:1; /* Set by subsystems */ #else unsigned int should_wakeup:1; #endif #ifdef CONFIG_PM struct hrtimer suspend_timer; u64 timer_expires; struct work_struct work; wait_queue_head_t wait_queue; struct wake_irq *wakeirq; atomic_t usage_count; atomic_t child_count; unsigned int disable_depth:3; unsigned int idle_notification:1; unsigned int request_pending:1; unsigned int deferred_resume:1; unsigned int needs_force_resume:1; unsigned int runtime_auto:1; bool ignore_children:1; unsigned int no_callbacks:1; unsigned int irq_safe:1; unsigned int use_autosuspend:1; unsigned int timer_autosuspends:1; unsigned int memalloc_noio:1; unsigned int links_count; enum rpm_request request; enum rpm_status runtime_status; int runtime_error; int autosuspend_delay; u64 last_busy; u64 active_time; u64 suspended_time; u64 accounting_timestamp; #endif struct pm_subsys_data *subsys_data; /* Owned by the subsystem. */ void (*set_latency_tolerance)(struct device *, s32); struct dev_pm_qos *qos; }; extern int dev_pm_get_subsys_data(struct device *dev); extern void dev_pm_put_subsys_data(struct device *dev); /** * struct dev_pm_domain - power management domain representation. * * @ops: Power management operations associated with this domain. * @start: Called when a user needs to start the device via the domain. * @detach: Called when removing a device from the domain. * @activate: Called before executing probe routines for bus types and drivers. * @sync: Called after successful driver probe. * @dismiss: Called after unsuccessful driver probe and after driver removal. * * Power domains provide callbacks that are executed during system suspend, * hibernation, system resume and during runtime PM transitions instead of * subsystem-level and driver-level callbacks. */ struct dev_pm_domain { struct dev_pm_ops ops; int (*start)(struct device *dev); void (*detach)(struct device *dev, bool power_off); int (*activate)(struct device *dev); void (*sync)(struct device *dev); void (*dismiss)(struct device *dev); }; /* * The PM_EVENT_ messages are also used by drivers implementing the legacy * suspend framework, based on the ->suspend() and ->resume() callbacks common * for suspend and hibernation transitions, according to the rules below. */ /* Necessary, because several drivers use PM_EVENT_PRETHAW */ #define PM_EVENT_PRETHAW PM_EVENT_QUIESCE /* * One transition is triggered by resume(), after a suspend() call; the * message is implicit: * * ON Driver starts working again, responding to hardware events * and software requests. The hardware may have gone through * a power-off reset, or it may have maintained state from the * previous suspend() which the driver will rely on while * resuming. On most platforms, there are no restrictions on * availability of resources like clocks during resume(). * * Other transitions are triggered by messages sent using suspend(). All * these transitions quiesce the driver, so that I/O queues are inactive. * That commonly entails turning off IRQs and DMA; there may be rules * about how to quiesce that are specific to the bus or the device's type. * (For example, network drivers mark the link state.) Other details may * differ according to the message: * * SUSPEND Quiesce, enter a low power device state appropriate for * the upcoming system state (such as PCI_D3hot), and enable * wakeup events as appropriate. * * HIBERNATE Enter a low power device state appropriate for the hibernation * state (eg. ACPI S4) and enable wakeup events as appropriate. * * FREEZE Quiesce operations so that a consistent image can be saved; * but do NOT otherwise enter a low power device state, and do * NOT emit system wakeup events. * * PRETHAW Quiesce as if for FREEZE; additionally, prepare for restoring * the system from a snapshot taken after an earlier FREEZE. * Some drivers will need to reset their hardware state instead * of preserving it, to ensure that it's never mistaken for the * state which that earlier snapshot had set up. * * A minimally power-aware driver treats all messages as SUSPEND, fully * reinitializes its device during resume() -- whether or not it was reset * during the suspend/resume cycle -- and can't issue wakeup events. * * More power-aware drivers may also use low power states at runtime as * well as during system sleep states like PM_SUSPEND_STANDBY. They may * be able to use wakeup events to exit from runtime low-power states, * or from system low-power states such as standby or suspend-to-RAM. */ #ifdef CONFIG_PM_SLEEP extern void device_pm_lock(void); extern void dpm_resume_start(pm_message_t state); extern void dpm_resume_end(pm_message_t state); extern void dpm_resume_noirq(pm_message_t state); extern void dpm_resume_early(pm_message_t state); extern void dpm_resume(pm_message_t state); extern void dpm_complete(pm_message_t state); extern void device_pm_unlock(void); extern int dpm_suspend_end(pm_message_t state); extern int dpm_suspend_start(pm_message_t state); extern int dpm_suspend_noirq(pm_message_t state); extern int dpm_suspend_late(pm_message_t state); extern int dpm_suspend(pm_message_t state); extern int dpm_prepare(pm_message_t state); extern void __suspend_report_result(const char *function, void *fn, int ret); #define suspend_report_result(fn, ret) \ do { \ __suspend_report_result(__func__, fn, ret); \ } while (0) extern int device_pm_wait_for_dev(struct device *sub, struct device *dev); extern void dpm_for_each_dev(void *data, void (*fn)(struct device *, void *)); extern int pm_generic_prepare(struct device *dev); extern int pm_generic_suspend_late(struct device *dev); extern int pm_generic_suspend_noirq(struct device *dev); extern int pm_generic_suspend(struct device *dev); extern int pm_generic_resume_early(struct device *dev); extern int pm_generic_resume_noirq(struct device *dev); extern int pm_generic_resume(struct device *dev); extern int pm_generic_freeze_noirq(struct device *dev); extern int pm_generic_freeze_late(struct device *dev); extern int pm_generic_freeze(struct device *dev); extern int pm_generic_thaw_noirq(struct device *dev); extern int pm_generic_thaw_early(struct device *dev); extern int pm_generic_thaw(struct device *dev); extern int pm_generic_restore_noirq(struct device *dev); extern int pm_generic_restore_early(struct device *dev); extern int pm_generic_restore(struct device *dev); extern int pm_generic_poweroff_noirq(struct device *dev); extern int pm_generic_poweroff_late(struct device *dev); extern int pm_generic_poweroff(struct device *dev); extern void pm_generic_complete(struct device *dev); extern bool dev_pm_skip_resume(struct device *dev); extern bool dev_pm_skip_suspend(struct device *dev); #else /* !CONFIG_PM_SLEEP */ #define device_pm_lock() do {} while (0) #define device_pm_unlock() do {} while (0) static inline int dpm_suspend_start(pm_message_t state) { return 0; } #define suspend_report_result(fn, ret) do {} while (0) static inline int device_pm_wait_for_dev(struct device *a, struct device *b) { return 0; } static inline void dpm_for_each_dev(void *data, void (*fn)(struct device *, void *)) { } #define pm_generic_prepare NULL #define pm_generic_suspend_late NULL #define pm_generic_suspend_noirq NULL #define pm_generic_suspend NULL #define pm_generic_resume_early NULL #define pm_generic_resume_noirq NULL #define pm_generic_resume NULL #define pm_generic_freeze_noirq NULL #define pm_generic_freeze_late NULL #define pm_generic_freeze NULL #define pm_generic_thaw_noirq NULL #define pm_generic_thaw_early NULL #define pm_generic_thaw NULL #define pm_generic_restore_noirq NULL #define pm_generic_restore_early NULL #define pm_generic_restore NULL #define pm_generic_poweroff_noirq NULL #define pm_generic_poweroff_late NULL #define pm_generic_poweroff NULL #define pm_generic_complete NULL #endif /* !CONFIG_PM_SLEEP */ /* How to reorder dpm_list after device_move() */ enum dpm_order { DPM_ORDER_NONE, DPM_ORDER_DEV_AFTER_PARENT, DPM_ORDER_PARENT_BEFORE_DEV, DPM_ORDER_DEV_LAST, }; #endif /* _LINUX_PM_H */ PK ! �+�� btf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2018 Facebook */ #ifndef _LINUX_BTF_H #define _LINUX_BTF_H 1 #include <linux/types.h> #include <uapi/linux/btf.h> #include <uapi/linux/bpf.h> #define BTF_TYPE_EMIT(type) ((void)(type *)0) #define BTF_TYPE_EMIT_ENUM(enum_val) ((void)enum_val) struct btf; struct btf_member; struct btf_type; union bpf_attr; struct btf_show; extern const struct file_operations btf_fops; void btf_get(struct btf *btf); void btf_put(struct btf *btf); int btf_new_fd(const union bpf_attr *attr, bpfptr_t uattr); struct btf *btf_get_by_fd(int fd); int btf_get_info_by_fd(const struct btf *btf, const union bpf_attr *attr, union bpf_attr __user *uattr); /* Figure out the size of a type_id. If type_id is a modifier * (e.g. const), it will be resolved to find out the type with size. * * For example: * In describing "const void *", type_id is "const" and "const" * refers to "void *". The return type will be "void *". * * If type_id is a simple "int", then return type will be "int". * * @btf: struct btf object * @type_id: Find out the size of type_id. The type_id of the return * type is set to *type_id. * @ret_size: It can be NULL. If not NULL, the size of the return * type is set to *ret_size. * Return: The btf_type (resolved to another type with size info if needed). * NULL is returned if type_id itself does not have size info * (e.g. void) or it cannot be resolved to another type that * has size info. * *type_id and *ret_size will not be changed in the * NULL return case. */ const struct btf_type *btf_type_id_size(const struct btf *btf, u32 *type_id, u32 *ret_size); /* * Options to control show behaviour. * - BTF_SHOW_COMPACT: no formatting around type information * - BTF_SHOW_NONAME: no struct/union member names/types * - BTF_SHOW_PTR_RAW: show raw (unobfuscated) pointer values; * equivalent to %px. * - BTF_SHOW_ZERO: show zero-valued struct/union members; they * are not displayed by default * - BTF_SHOW_UNSAFE: skip use of bpf_probe_read() to safely read * data before displaying it. */ #define BTF_SHOW_COMPACT BTF_F_COMPACT #define BTF_SHOW_NONAME BTF_F_NONAME #define BTF_SHOW_PTR_RAW BTF_F_PTR_RAW #define BTF_SHOW_ZERO BTF_F_ZERO #define BTF_SHOW_UNSAFE (1ULL << 4) void btf_type_seq_show(const struct btf *btf, u32 type_id, void *obj, struct seq_file *m); int btf_type_seq_show_flags(const struct btf *btf, u32 type_id, void *obj, struct seq_file *m, u64 flags); /* * Copy len bytes of string representation of obj of BTF type_id into buf. * * @btf: struct btf object * @type_id: type id of type obj points to * @obj: pointer to typed data * @buf: buffer to write to * @len: maximum length to write to buf * @flags: show options (see above) * * Return: length that would have been/was copied as per snprintf, or * negative error. */ int btf_type_snprintf_show(const struct btf *btf, u32 type_id, void *obj, char *buf, int len, u64 flags); int btf_get_fd_by_id(u32 id); u32 btf_obj_id(const struct btf *btf); bool btf_is_kernel(const struct btf *btf); bool btf_is_module(const struct btf *btf); struct module *btf_try_get_module(const struct btf *btf); u32 btf_nr_types(const struct btf *btf); bool btf_member_is_reg_int(const struct btf *btf, const struct btf_type *s, const struct btf_member *m, u32 expected_offset, u32 expected_size); int btf_find_spin_lock(const struct btf *btf, const struct btf_type *t); int btf_find_timer(const struct btf *btf, const struct btf_type *t); bool btf_type_is_void(const struct btf_type *t); s32 btf_find_by_name_kind(const struct btf *btf, const char *name, u8 kind); const struct btf_type *btf_type_skip_modifiers(const struct btf *btf, u32 id, u32 *res_id); const struct btf_type *btf_type_resolve_ptr(const struct btf *btf, u32 id, u32 *res_id); const struct btf_type *btf_type_resolve_func_ptr(const struct btf *btf, u32 id, u32 *res_id); const struct btf_type * btf_resolve_size(const struct btf *btf, const struct btf_type *type, u32 *type_size); const char *btf_type_str(const struct btf_type *t); #define for_each_member(i, struct_type, member) \ for (i = 0, member = btf_type_member(struct_type); \ i < btf_type_vlen(struct_type); \ i++, member++) #define for_each_vsi(i, datasec_type, member) \ for (i = 0, member = btf_type_var_secinfo(datasec_type); \ i < btf_type_vlen(datasec_type); \ i++, member++) static inline bool btf_type_is_ptr(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_PTR; } static inline bool btf_type_is_int(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_INT; } static inline bool btf_type_is_small_int(const struct btf_type *t) { return btf_type_is_int(t) && t->size <= sizeof(u64); } static inline bool btf_type_is_enum(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_ENUM; } static inline bool btf_type_is_scalar(const struct btf_type *t) { return btf_type_is_int(t) || btf_type_is_enum(t); } static inline bool btf_type_is_typedef(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_TYPEDEF; } static inline bool btf_type_is_func(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_FUNC; } static inline bool btf_type_is_func_proto(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_FUNC_PROTO; } static inline bool btf_type_is_var(const struct btf_type *t) { return BTF_INFO_KIND(t->info) == BTF_KIND_VAR; } /* union is only a special case of struct: * all its offsetof(member) == 0 */ static inline bool btf_type_is_struct(const struct btf_type *t) { u8 kind = BTF_INFO_KIND(t->info); return kind == BTF_KIND_STRUCT || kind == BTF_KIND_UNION; } static inline u16 btf_type_vlen(const struct btf_type *t) { return BTF_INFO_VLEN(t->info); } static inline u16 btf_func_linkage(const struct btf_type *t) { return BTF_INFO_VLEN(t->info); } static inline bool btf_type_kflag(const struct btf_type *t) { return BTF_INFO_KFLAG(t->info); } static inline u32 btf_member_bit_offset(const struct btf_type *struct_type, const struct btf_member *member) { return btf_type_kflag(struct_type) ? BTF_MEMBER_BIT_OFFSET(member->offset) : member->offset; } static inline u32 btf_member_bitfield_size(const struct btf_type *struct_type, const struct btf_member *member) { return btf_type_kflag(struct_type) ? BTF_MEMBER_BITFIELD_SIZE(member->offset) : 0; } static inline const struct btf_member *btf_type_member(const struct btf_type *t) { return (const struct btf_member *)(t + 1); } static inline const struct btf_var_secinfo *btf_type_var_secinfo( const struct btf_type *t) { return (const struct btf_var_secinfo *)(t + 1); } #ifdef CONFIG_BPF_SYSCALL struct bpf_prog; const struct btf_type *btf_type_by_id(const struct btf *btf, u32 type_id); const char *btf_name_by_offset(const struct btf *btf, u32 offset); struct btf *btf_parse_vmlinux(void); struct btf *bpf_prog_get_target_btf(const struct bpf_prog *prog); #else static inline const struct btf_type *btf_type_by_id(const struct btf *btf, u32 type_id) { return NULL; } static inline const char *btf_name_by_offset(const struct btf *btf, u32 offset) { return NULL; } #endif #endif PK ! WW crc-itu-t.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * crc-itu-t.h - CRC ITU-T V.41 routine * * Implements the standard CRC ITU-T V.41: * Width 16 * Poly 0x1021 (x^16 + x^12 + x^15 + 1) * Init 0 */ #ifndef CRC_ITU_T_H #define CRC_ITU_T_H #include <linux/types.h> extern u16 const crc_itu_t_table[256]; extern u16 crc_itu_t(u16 crc, const u8 *buffer, size_t len); static inline u16 crc_itu_t_byte(u16 crc, const u8 data) { return (crc << 8) ^ crc_itu_t_table[((crc >> 8) ^ data) & 0xff]; } #endif /* CRC_ITU_T_H */ PK ! ��M< M< spinlock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SPINLOCK_H #define __LINUX_SPINLOCK_H /* * include/linux/spinlock.h - generic spinlock/rwlock declarations * * here's the role of the various spinlock/rwlock related include files: * * on SMP builds: * * asm/spinlock_types.h: contains the arch_spinlock_t/arch_rwlock_t and the * initializers * * linux/spinlock_types_raw: * The raw types and initializers * linux/spinlock_types.h: * defines the generic type and initializers * * asm/spinlock.h: contains the arch_spin_*()/etc. lowlevel * implementations, mostly inline assembly code * * (also included on UP-debug builds:) * * linux/spinlock_api_smp.h: * contains the prototypes for the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. * * on UP builds: * * linux/spinlock_type_up.h: * contains the generic, simplified UP spinlock type. * (which is an empty structure on non-debug builds) * * linux/spinlock_types_raw: * The raw RT types and initializers * linux/spinlock_types.h: * defines the generic type and initializers * * linux/spinlock_up.h: * contains the arch_spin_*()/etc. version of UP * builds. (which are NOPs on non-debug, non-preempt * builds) * * (included on UP-non-debug builds:) * * linux/spinlock_api_up.h: * builds the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. */ #include <linux/typecheck.h> #include <linux/preempt.h> #include <linux/linkage.h> #include <linux/compiler.h> #include <linux/irqflags.h> #include <linux/thread_info.h> #include <linux/kernel.h> #include <linux/stringify.h> #include <linux/bottom_half.h> #include <linux/lockdep.h> #include <linux/cleanup.h> #include <asm/barrier.h> #include <asm/mmiowb.h> /* * Must define these before including other files, inline functions need them */ #define LOCK_SECTION_NAME ".text..lock."KBUILD_BASENAME #define LOCK_SECTION_START(extra) \ ".subsection 1\n\t" \ extra \ ".ifndef " LOCK_SECTION_NAME "\n\t" \ LOCK_SECTION_NAME ":\n\t" \ ".endif\n" #define LOCK_SECTION_END \ ".previous\n\t" #define __lockfunc __section(".spinlock.text") /* * Pull the arch_spinlock_t and arch_rwlock_t definitions: */ #include <linux/spinlock_types.h> /* * Pull the arch_spin*() functions/declarations (UP-nondebug doesn't need them): */ #ifdef CONFIG_SMP # include <asm/spinlock.h> #else # include <linux/spinlock_up.h> #endif #ifdef CONFIG_DEBUG_SPINLOCK extern void __raw_spin_lock_init(raw_spinlock_t *lock, const char *name, struct lock_class_key *key, short inner); # define raw_spin_lock_init(lock) \ do { \ static struct lock_class_key __key; \ \ __raw_spin_lock_init((lock), #lock, &__key, LD_WAIT_SPIN); \ } while (0) #else # define raw_spin_lock_init(lock) \ do { *(lock) = __RAW_SPIN_LOCK_UNLOCKED(lock); } while (0) #endif #define raw_spin_is_locked(lock) arch_spin_is_locked(&(lock)->raw_lock) #ifdef arch_spin_is_contended #define raw_spin_is_contended(lock) arch_spin_is_contended(&(lock)->raw_lock) #else #define raw_spin_is_contended(lock) (((void)(lock), 0)) #endif /*arch_spin_is_contended*/ /* * smp_mb__after_spinlock() provides the equivalent of a full memory barrier * between program-order earlier lock acquisitions and program-order later * memory accesses. * * This guarantees that the following two properties hold: * * 1) Given the snippet: * * { X = 0; Y = 0; } * * CPU0 CPU1 * * WRITE_ONCE(X, 1); WRITE_ONCE(Y, 1); * spin_lock(S); smp_mb(); * smp_mb__after_spinlock(); r1 = READ_ONCE(X); * r0 = READ_ONCE(Y); * spin_unlock(S); * * it is forbidden that CPU0 does not observe CPU1's store to Y (r0 = 0) * and CPU1 does not observe CPU0's store to X (r1 = 0); see the comments * preceding the call to smp_mb__after_spinlock() in __schedule() and in * try_to_wake_up(). * * 2) Given the snippet: * * { X = 0; Y = 0; } * * CPU0 CPU1 CPU2 * * spin_lock(S); spin_lock(S); r1 = READ_ONCE(Y); * WRITE_ONCE(X, 1); smp_mb__after_spinlock(); smp_rmb(); * spin_unlock(S); r0 = READ_ONCE(X); r2 = READ_ONCE(X); * WRITE_ONCE(Y, 1); * spin_unlock(S); * * it is forbidden that CPU0's critical section executes before CPU1's * critical section (r0 = 1), CPU2 observes CPU1's store to Y (r1 = 1) * and CPU2 does not observe CPU0's store to X (r2 = 0); see the comments * preceding the calls to smp_rmb() in try_to_wake_up() for similar * snippets but "projected" onto two CPUs. * * Property (2) upgrades the lock to an RCsc lock. * * Since most load-store architectures implement ACQUIRE with an smp_mb() after * the LL/SC loop, they need no further barriers. Similarly all our TSO * architectures imply an smp_mb() for each atomic instruction and equally don't * need more. * * Architectures that can implement ACQUIRE better need to take care. */ #ifndef smp_mb__after_spinlock #define smp_mb__after_spinlock() do { } while (0) #endif #ifdef CONFIG_DEBUG_SPINLOCK extern void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock); #define do_raw_spin_lock_flags(lock, flags) do_raw_spin_lock(lock) extern int do_raw_spin_trylock(raw_spinlock_t *lock); extern void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock); #else static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock) { __acquire(lock); arch_spin_lock(&lock->raw_lock); mmiowb_spin_lock(); } #ifndef arch_spin_lock_flags #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) #endif static inline void do_raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long *flags) __acquires(lock) { __acquire(lock); arch_spin_lock_flags(&lock->raw_lock, *flags); mmiowb_spin_lock(); } static inline int do_raw_spin_trylock(raw_spinlock_t *lock) { int ret = arch_spin_trylock(&(lock)->raw_lock); if (ret) mmiowb_spin_lock(); return ret; } static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) { mmiowb_spin_unlock(); arch_spin_unlock(&lock->raw_lock); __release(lock); } #endif /* * Define the various spin_lock methods. Note we define these * regardless of whether CONFIG_SMP or CONFIG_PREEMPTION are set. The * various methods are defined as nops in the case they are not * required. */ #define raw_spin_trylock(lock) __cond_lock(lock, _raw_spin_trylock(lock)) #define raw_spin_lock(lock) _raw_spin_lock(lock) #ifdef CONFIG_DEBUG_LOCK_ALLOC # define raw_spin_lock_nested(lock, subclass) \ _raw_spin_lock_nested(lock, subclass) # define raw_spin_lock_nest_lock(lock, nest_lock) \ do { \ typecheck(struct lockdep_map *, &(nest_lock)->dep_map);\ _raw_spin_lock_nest_lock(lock, &(nest_lock)->dep_map); \ } while (0) #else /* * Always evaluate the 'subclass' argument to avoid that the compiler * warns about set-but-not-used variables when building with * CONFIG_DEBUG_LOCK_ALLOC=n and with W=1. */ # define raw_spin_lock_nested(lock, subclass) \ _raw_spin_lock(((void)(subclass), (lock))) # define raw_spin_lock_nest_lock(lock, nest_lock) _raw_spin_lock(lock) #endif #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) #define raw_spin_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ flags = _raw_spin_lock_irqsave(lock); \ } while (0) #ifdef CONFIG_DEBUG_LOCK_ALLOC #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ do { \ typecheck(unsigned long, flags); \ flags = _raw_spin_lock_irqsave_nested(lock, subclass); \ } while (0) #else #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ do { \ typecheck(unsigned long, flags); \ flags = _raw_spin_lock_irqsave(lock); \ } while (0) #endif #else #define raw_spin_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ _raw_spin_lock_irqsave(lock, flags); \ } while (0) #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ raw_spin_lock_irqsave(lock, flags) #endif #define raw_spin_lock_irq(lock) _raw_spin_lock_irq(lock) #define raw_spin_lock_bh(lock) _raw_spin_lock_bh(lock) #define raw_spin_unlock(lock) _raw_spin_unlock(lock) #define raw_spin_unlock_irq(lock) _raw_spin_unlock_irq(lock) #define raw_spin_unlock_irqrestore(lock, flags) \ do { \ typecheck(unsigned long, flags); \ _raw_spin_unlock_irqrestore(lock, flags); \ } while (0) #define raw_spin_unlock_bh(lock) _raw_spin_unlock_bh(lock) #define raw_spin_trylock_bh(lock) \ __cond_lock(lock, _raw_spin_trylock_bh(lock)) #define raw_spin_trylock_irq(lock) \ ({ \ local_irq_disable(); \ raw_spin_trylock(lock) ? \ 1 : ({ local_irq_enable(); 0; }); \ }) #define raw_spin_trylock_irqsave(lock, flags) \ ({ \ local_irq_save(flags); \ raw_spin_trylock(lock) ? \ 1 : ({ local_irq_restore(flags); 0; }); \ }) #ifndef CONFIG_PREEMPT_RT /* Include rwlock functions for !RT */ #include <linux/rwlock.h> #endif /* * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: */ #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) # include <linux/spinlock_api_smp.h> #else # include <linux/spinlock_api_up.h> #endif /* Non PREEMPT_RT kernel, map to raw spinlocks: */ #ifndef CONFIG_PREEMPT_RT /* * Map the spin_lock functions to the raw variants for PREEMPT_RT=n */ static __always_inline raw_spinlock_t *spinlock_check(spinlock_t *lock) { return &lock->rlock; } #ifdef CONFIG_DEBUG_SPINLOCK # define spin_lock_init(lock) \ do { \ static struct lock_class_key __key; \ \ __raw_spin_lock_init(spinlock_check(lock), \ #lock, &__key, LD_WAIT_CONFIG); \ } while (0) #else # define spin_lock_init(_lock) \ do { \ spinlock_check(_lock); \ *(_lock) = __SPIN_LOCK_UNLOCKED(_lock); \ } while (0) #endif static __always_inline void spin_lock(spinlock_t *lock) { raw_spin_lock(&lock->rlock); } static __always_inline void spin_lock_bh(spinlock_t *lock) { raw_spin_lock_bh(&lock->rlock); } static __always_inline int spin_trylock(spinlock_t *lock) { return raw_spin_trylock(&lock->rlock); } #define spin_lock_nested(lock, subclass) \ do { \ raw_spin_lock_nested(spinlock_check(lock), subclass); \ } while (0) #define spin_lock_nest_lock(lock, nest_lock) \ do { \ raw_spin_lock_nest_lock(spinlock_check(lock), nest_lock); \ } while (0) static __always_inline void spin_lock_irq(spinlock_t *lock) { raw_spin_lock_irq(&lock->rlock); } #define spin_lock_irqsave(lock, flags) \ do { \ raw_spin_lock_irqsave(spinlock_check(lock), flags); \ } while (0) #define spin_lock_irqsave_nested(lock, flags, subclass) \ do { \ raw_spin_lock_irqsave_nested(spinlock_check(lock), flags, subclass); \ } while (0) static __always_inline void spin_unlock(spinlock_t *lock) { raw_spin_unlock(&lock->rlock); } static __always_inline void spin_unlock_bh(spinlock_t *lock) { raw_spin_unlock_bh(&lock->rlock); } static __always_inline void spin_unlock_irq(spinlock_t *lock) { raw_spin_unlock_irq(&lock->rlock); } static __always_inline void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags) { raw_spin_unlock_irqrestore(&lock->rlock, flags); } static __always_inline int spin_trylock_bh(spinlock_t *lock) { return raw_spin_trylock_bh(&lock->rlock); } static __always_inline int spin_trylock_irq(spinlock_t *lock) { return raw_spin_trylock_irq(&lock->rlock); } #define spin_trylock_irqsave(lock, flags) \ ({ \ raw_spin_trylock_irqsave(spinlock_check(lock), flags); \ }) /** * spin_is_locked() - Check whether a spinlock is locked. * @lock: Pointer to the spinlock. * * This function is NOT required to provide any memory ordering * guarantees; it could be used for debugging purposes or, when * additional synchronization is needed, accompanied with other * constructs (memory barriers) enforcing the synchronization. * * Returns: 1 if @lock is locked, 0 otherwise. * * Note that the function only tells you that the spinlock is * seen to be locked, not that it is locked on your CPU. * * Further, on CONFIG_SMP=n builds with CONFIG_DEBUG_SPINLOCK=n, * the return value is always 0 (see include/linux/spinlock_up.h). * Therefore you should not rely heavily on the return value. */ static __always_inline int spin_is_locked(spinlock_t *lock) { return raw_spin_is_locked(&lock->rlock); } static __always_inline int spin_is_contended(spinlock_t *lock) { return raw_spin_is_contended(&lock->rlock); } #define assert_spin_locked(lock) assert_raw_spin_locked(&(lock)->rlock) #else /* !CONFIG_PREEMPT_RT */ # include <linux/spinlock_rt.h> #endif /* CONFIG_PREEMPT_RT */ /* * Pull the atomic_t declaration: * (asm-mips/atomic.h needs above definitions) */ #include <linux/atomic.h> /** * atomic_dec_and_lock - lock on reaching reference count zero * @atomic: the atomic counter * @lock: the spinlock in question * * Decrements @atomic by 1. If the result is 0, returns true and locks * @lock. Returns false for all other cases. */ extern int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock); #define atomic_dec_and_lock(atomic, lock) \ __cond_lock(lock, _atomic_dec_and_lock(atomic, lock)) extern int _atomic_dec_and_lock_irqsave(atomic_t *atomic, spinlock_t *lock, unsigned long *flags); #define atomic_dec_and_lock_irqsave(atomic, lock, flags) \ __cond_lock(lock, _atomic_dec_and_lock_irqsave(atomic, lock, &(flags))) int __alloc_bucket_spinlocks(spinlock_t **locks, unsigned int *lock_mask, size_t max_size, unsigned int cpu_mult, gfp_t gfp, const char *name, struct lock_class_key *key); #define alloc_bucket_spinlocks(locks, lock_mask, max_size, cpu_mult, gfp) \ ({ \ static struct lock_class_key key; \ int ret; \ \ ret = __alloc_bucket_spinlocks(locks, lock_mask, max_size, \ cpu_mult, gfp, #locks, &key); \ ret; \ }) void free_bucket_spinlocks(spinlock_t *locks); DEFINE_LOCK_GUARD_1(raw_spinlock, raw_spinlock_t, raw_spin_lock(_T->lock), raw_spin_unlock(_T->lock)) DEFINE_LOCK_GUARD_1(raw_spinlock_nested, raw_spinlock_t, raw_spin_lock_nested(_T->lock, SINGLE_DEPTH_NESTING), raw_spin_unlock(_T->lock)) DEFINE_LOCK_GUARD_1(raw_spinlock_irq, raw_spinlock_t, raw_spin_lock_irq(_T->lock), raw_spin_unlock_irq(_T->lock)) DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t, raw_spin_lock_irqsave(_T->lock, _T->flags), raw_spin_unlock_irqrestore(_T->lock, _T->flags), unsigned long flags) DEFINE_LOCK_GUARD_1(spinlock, spinlock_t, spin_lock(_T->lock), spin_unlock(_T->lock)) DEFINE_LOCK_GUARD_1(spinlock_irq, spinlock_t, spin_lock_irq(_T->lock), spin_unlock_irq(_T->lock)) DEFINE_LOCK_GUARD_1(spinlock_irqsave, spinlock_t, spin_lock_irqsave(_T->lock, _T->flags), spin_unlock_irqrestore(_T->lock, _T->flags), unsigned long flags) #undef __LINUX_INSIDE_SPINLOCK_H #endif /* __LINUX_SPINLOCK_H */ PK ! +o�`" `" sysctl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * sysctl.h: General linux system control interface * * Begun 24 March 1995, Stephen Tweedie * **************************************************************** **************************************************************** ** ** WARNING: ** The values in this file are exported to user space via ** the sysctl() binary interface. Do *NOT* change the ** numbering of any existing values here, and do not change ** any numbers within any one set of values. If you have to ** redefine an existing interface, use a new number for it. ** The kernel will then return -ENOTDIR to any application using ** the old binary interface. ** **************************************************************** **************************************************************** */ #ifndef _LINUX_SYSCTL_H #define _LINUX_SYSCTL_H #include <linux/list.h> #include <linux/rcupdate.h> #include <linux/wait.h> #include <linux/rbtree.h> #include <linux/uidgid.h> #include <uapi/linux/sysctl.h> /* For the /proc/sys support */ struct completion; struct ctl_table; struct nsproxy; struct ctl_table_root; struct ctl_table_header; struct ctl_dir; /* Keep the same order as in fs/proc/proc_sysctl.c */ #define SYSCTL_NEG_ONE ((void *)&sysctl_vals[0]) #define SYSCTL_ZERO ((void *)&sysctl_vals[1]) #define SYSCTL_ONE ((void *)&sysctl_vals[2]) #define SYSCTL_TWO ((void *)&sysctl_vals[3]) #define SYSCTL_FOUR ((void *)&sysctl_vals[4]) #define SYSCTL_ONE_HUNDRED ((void *)&sysctl_vals[5]) #define SYSCTL_TWO_HUNDRED ((void *)&sysctl_vals[6]) #define SYSCTL_ONE_THOUSAND ((void *)&sysctl_vals[7]) #define SYSCTL_THREE_THOUSAND ((void *)&sysctl_vals[8]) #define SYSCTL_INT_MAX ((void *)&sysctl_vals[9]) extern const int sysctl_vals[]; #define SYSCTL_LONG_ZERO ((void *)&sysctl_long_vals[0]) #define SYSCTL_LONG_ONE ((void *)&sysctl_long_vals[1]) #define SYSCTL_LONG_MAX ((void *)&sysctl_long_vals[2]) extern const unsigned long sysctl_long_vals[]; typedef int proc_handler(struct ctl_table *ctl, int write, void *buffer, size_t *lenp, loff_t *ppos); int proc_dostring(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_dobool(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int proc_dointvec(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_douintvec(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_dointvec_minmax(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_douintvec_minmax(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int proc_dou8vec_minmax(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int proc_dointvec_jiffies(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_dointvec_userhz_jiffies(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_dointvec_ms_jiffies(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_doulongvec_minmax(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_doulongvec_ms_jiffies_minmax(struct ctl_table *table, int, void *, size_t *, loff_t *); int proc_do_large_bitmap(struct ctl_table *, int, void *, size_t *, loff_t *); int proc_do_static_key(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); /* * Register a set of sysctl names by calling register_sysctl_table * with an initialised array of struct ctl_table's. An entry with * NULL procname terminates the table. table->de will be * set up by the registration and need not be initialised in advance. * * sysctl names can be mirrored automatically under /proc/sys. The * procname supplied controls /proc naming. * * The table's mode will be honoured for proc-fs access. * * Leaf nodes in the sysctl tree will be represented by a single file * under /proc; non-leaf nodes will be represented by directories. A * null procname disables /proc mirroring at this node. * * The data and maxlen fields of the ctl_table * struct enable minimal validation of the values being written to be * performed, and the mode field allows minimal authentication. * * There must be a proc_handler routine for any terminal nodes * mirrored under /proc/sys (non-terminals are handled by a built-in * directory handler). Several default handlers are available to * cover common cases. */ /* Support for userspace poll() to watch for changes */ struct ctl_table_poll { atomic_t event; wait_queue_head_t wait; }; static inline void *proc_sys_poll_event(struct ctl_table_poll *poll) { return (void *)(unsigned long)atomic_read(&poll->event); } #define __CTL_TABLE_POLL_INITIALIZER(name) { \ .event = ATOMIC_INIT(0), \ .wait = __WAIT_QUEUE_HEAD_INITIALIZER(name.wait) } #define DEFINE_CTL_TABLE_POLL(name) \ struct ctl_table_poll name = __CTL_TABLE_POLL_INITIALIZER(name) /* A sysctl table is an array of struct ctl_table: */ struct ctl_table { const char *procname; /* Text ID for /proc/sys, or zero */ void *data; int maxlen; umode_t mode; struct ctl_table *child; /* Deprecated */ proc_handler *proc_handler; /* Callback for text formatting */ struct ctl_table_poll *poll; void *extra1; void *extra2; } __randomize_layout; struct ctl_node { struct rb_node node; struct ctl_table_header *header; }; /* struct ctl_table_header is used to maintain dynamic lists of struct ctl_table trees. */ struct ctl_table_header { union { struct { struct ctl_table *ctl_table; int used; int count; int nreg; }; struct rcu_head rcu; }; struct completion *unregistering; struct ctl_table *ctl_table_arg; struct ctl_table_root *root; struct ctl_table_set *set; struct ctl_dir *parent; struct ctl_node *node; struct hlist_head inodes; /* head for proc_inode->sysctl_inodes */ }; struct ctl_dir { /* Header must be at the start of ctl_dir */ struct ctl_table_header header; struct rb_root root; }; struct ctl_table_set { int (*is_seen)(struct ctl_table_set *); struct ctl_dir dir; }; struct ctl_table_root { struct ctl_table_set default_set; struct ctl_table_set *(*lookup)(struct ctl_table_root *root); void (*set_ownership)(struct ctl_table_header *head, struct ctl_table *table, kuid_t *uid, kgid_t *gid); int (*permissions)(struct ctl_table_header *head, struct ctl_table *table); }; /* struct ctl_path describes where in the hierarchy a table is added */ struct ctl_path { const char *procname; }; #ifdef CONFIG_SYSCTL void proc_sys_poll_notify(struct ctl_table_poll *poll); extern void setup_sysctl_set(struct ctl_table_set *p, struct ctl_table_root *root, int (*is_seen)(struct ctl_table_set *)); extern void retire_sysctl_set(struct ctl_table_set *set); struct ctl_table_header *__register_sysctl_table( struct ctl_table_set *set, const char *path, struct ctl_table *table); struct ctl_table_header *__register_sysctl_paths( struct ctl_table_set *set, const struct ctl_path *path, struct ctl_table *table); struct ctl_table_header *register_sysctl(const char *path, struct ctl_table *table); struct ctl_table_header *register_sysctl_table(struct ctl_table * table); struct ctl_table_header *register_sysctl_paths(const struct ctl_path *path, struct ctl_table *table); void unregister_sysctl_table(struct ctl_table_header * table); extern int sysctl_init(void); extern void __register_sysctl_init(const char *path, struct ctl_table *table, const char *table_name); #define register_sysctl_init(path, table) __register_sysctl_init(path, table, #table) void do_sysctl_args(void); bool sysctl_is_alias(char *param); extern int pwrsw_enabled; extern int unaligned_enabled; extern int unaligned_dump_stack; extern int no_unaligned_warning; extern struct ctl_table sysctl_mount_point[]; extern struct ctl_table random_table[]; extern struct ctl_table firmware_config_table[]; extern struct ctl_table epoll_table[]; #else /* CONFIG_SYSCTL */ static inline struct ctl_table_header *register_sysctl_table(struct ctl_table * table) { return NULL; } static inline struct ctl_table_header *register_sysctl_paths( const struct ctl_path *path, struct ctl_table *table) { return NULL; } static inline struct ctl_table_header *register_sysctl(const char *path, struct ctl_table *table) { return NULL; } static inline void unregister_sysctl_table(struct ctl_table_header * table) { } static inline void setup_sysctl_set(struct ctl_table_set *p, struct ctl_table_root *root, int (*is_seen)(struct ctl_table_set *)) { } static inline void do_sysctl_args(void) { } static inline bool sysctl_is_alias(char *param) { return false; } #endif /* CONFIG_SYSCTL */ int sysctl_max_threads(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); #endif /* _LINUX_SYSCTL_H */ PK ! 4/R�� � nfs_xdr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_NFS_XDR_H #define _LINUX_NFS_XDR_H #include <linux/nfsacl.h> #include <linux/sunrpc/gss_api.h> /* * To change the maximum rsize and wsize supported by the NFS client, adjust * NFS_MAX_FILE_IO_SIZE. 64KB is a typical maximum, but some servers can * support a megabyte or more. The default is left at 4096 bytes, which is * reasonable for NFS over UDP. */ #define NFS_MAX_FILE_IO_SIZE (1048576U) #define NFS_DEF_FILE_IO_SIZE (4096U) #define NFS_MIN_FILE_IO_SIZE (1024U) #define NFS_BITMASK_SZ 3 struct nfs4_string { unsigned int len; char *data; }; struct nfs_fsid { uint64_t major; uint64_t minor; }; /* * Helper for checking equality between 2 fsids. */ static inline int nfs_fsid_equal(const struct nfs_fsid *a, const struct nfs_fsid *b) { return a->major == b->major && a->minor == b->minor; } struct nfs4_threshold { __u32 bm; __u32 l_type; __u64 rd_sz; __u64 wr_sz; __u64 rd_io_sz; __u64 wr_io_sz; }; struct nfs_fattr { unsigned int valid; /* which fields are valid */ umode_t mode; __u32 nlink; kuid_t uid; kgid_t gid; dev_t rdev; __u64 size; union { struct { __u32 blocksize; __u32 blocks; } nfs2; struct { __u64 used; } nfs3; } du; struct nfs_fsid fsid; __u64 fileid; __u64 mounted_on_fileid; struct timespec64 atime; struct timespec64 mtime; struct timespec64 ctime; __u64 change_attr; /* NFSv4 change attribute */ __u64 pre_change_attr;/* pre-op NFSv4 change attribute */ __u64 pre_size; /* pre_op_attr.size */ struct timespec64 pre_mtime; /* pre_op_attr.mtime */ struct timespec64 pre_ctime; /* pre_op_attr.ctime */ unsigned long time_start; unsigned long gencount; struct nfs4_string *owner_name; struct nfs4_string *group_name; struct nfs4_threshold *mdsthreshold; /* pNFS threshold hints */ struct nfs4_label *label; }; #define NFS_ATTR_FATTR_TYPE (1U << 0) #define NFS_ATTR_FATTR_MODE (1U << 1) #define NFS_ATTR_FATTR_NLINK (1U << 2) #define NFS_ATTR_FATTR_OWNER (1U << 3) #define NFS_ATTR_FATTR_GROUP (1U << 4) #define NFS_ATTR_FATTR_RDEV (1U << 5) #define NFS_ATTR_FATTR_SIZE (1U << 6) #define NFS_ATTR_FATTR_PRESIZE (1U << 7) #define NFS_ATTR_FATTR_BLOCKS_USED (1U << 8) #define NFS_ATTR_FATTR_SPACE_USED (1U << 9) #define NFS_ATTR_FATTR_FSID (1U << 10) #define NFS_ATTR_FATTR_FILEID (1U << 11) #define NFS_ATTR_FATTR_ATIME (1U << 12) #define NFS_ATTR_FATTR_MTIME (1U << 13) #define NFS_ATTR_FATTR_CTIME (1U << 14) #define NFS_ATTR_FATTR_PREMTIME (1U << 15) #define NFS_ATTR_FATTR_PRECTIME (1U << 16) #define NFS_ATTR_FATTR_CHANGE (1U << 17) #define NFS_ATTR_FATTR_PRECHANGE (1U << 18) #define NFS_ATTR_FATTR_V4_LOCATIONS (1U << 19) #define NFS_ATTR_FATTR_V4_REFERRAL (1U << 20) #define NFS_ATTR_FATTR_MOUNTPOINT (1U << 21) #define NFS_ATTR_FATTR_MOUNTED_ON_FILEID (1U << 22) #define NFS_ATTR_FATTR_OWNER_NAME (1U << 23) #define NFS_ATTR_FATTR_GROUP_NAME (1U << 24) #define NFS_ATTR_FATTR_V4_SECURITY_LABEL (1U << 25) #define NFS_ATTR_FATTR (NFS_ATTR_FATTR_TYPE \ | NFS_ATTR_FATTR_MODE \ | NFS_ATTR_FATTR_NLINK \ | NFS_ATTR_FATTR_OWNER \ | NFS_ATTR_FATTR_GROUP \ | NFS_ATTR_FATTR_RDEV \ | NFS_ATTR_FATTR_SIZE \ | NFS_ATTR_FATTR_FSID \ | NFS_ATTR_FATTR_FILEID \ | NFS_ATTR_FATTR_ATIME \ | NFS_ATTR_FATTR_MTIME \ | NFS_ATTR_FATTR_CTIME \ | NFS_ATTR_FATTR_CHANGE) #define NFS_ATTR_FATTR_V2 (NFS_ATTR_FATTR \ | NFS_ATTR_FATTR_BLOCKS_USED) #define NFS_ATTR_FATTR_V3 (NFS_ATTR_FATTR \ | NFS_ATTR_FATTR_SPACE_USED) #define NFS_ATTR_FATTR_V4 (NFS_ATTR_FATTR \ | NFS_ATTR_FATTR_SPACE_USED \ | NFS_ATTR_FATTR_V4_SECURITY_LABEL) /* * Maximal number of supported layout drivers. */ #define NFS_MAX_LAYOUT_TYPES 8 /* * Info on the file system */ struct nfs_fsinfo { struct nfs_fattr *fattr; /* Post-op attributes */ __u32 rtmax; /* max. read transfer size */ __u32 rtpref; /* pref. read transfer size */ __u32 rtmult; /* reads should be multiple of this */ __u32 wtmax; /* max. write transfer size */ __u32 wtpref; /* pref. write transfer size */ __u32 wtmult; /* writes should be multiple of this */ __u32 dtpref; /* pref. readdir transfer size */ __u64 maxfilesize; struct timespec64 time_delta; /* server time granularity */ __u32 lease_time; /* in seconds */ __u32 nlayouttypes; /* number of layouttypes */ __u32 layouttype[NFS_MAX_LAYOUT_TYPES]; /* supported pnfs layout driver */ __u32 blksize; /* preferred pnfs io block size */ __u32 clone_blksize; /* granularity of a CLONE operation */ enum nfs4_change_attr_type change_attr_type; /* Info about change attr */ __u32 xattr_support; /* User xattrs supported */ }; struct nfs_fsstat { struct nfs_fattr *fattr; /* Post-op attributes */ __u64 tbytes; /* total size in bytes */ __u64 fbytes; /* # of free bytes */ __u64 abytes; /* # of bytes available to user */ __u64 tfiles; /* # of files */ __u64 ffiles; /* # of free files */ __u64 afiles; /* # of files available to user */ }; struct nfs2_fsstat { __u32 tsize; /* Server transfer size */ __u32 bsize; /* Filesystem block size */ __u32 blocks; /* No. of "bsize" blocks on filesystem */ __u32 bfree; /* No. of free "bsize" blocks */ __u32 bavail; /* No. of available "bsize" blocks */ }; struct nfs_pathconf { struct nfs_fattr *fattr; /* Post-op attributes */ __u32 max_link; /* max # of hard links */ __u32 max_namelen; /* max name length */ }; struct nfs4_change_info { u32 atomic; u64 before; u64 after; }; struct nfs_seqid; /* nfs41 sessions channel attributes */ struct nfs4_channel_attrs { u32 max_rqst_sz; u32 max_resp_sz; u32 max_resp_sz_cached; u32 max_ops; u32 max_reqs; }; struct nfs4_slot; struct nfs4_sequence_args { struct nfs4_slot *sa_slot; u8 sa_cache_this : 1, sa_privileged : 1; }; struct nfs4_sequence_res { struct nfs4_slot *sr_slot; /* slot used to send request */ unsigned long sr_timestamp; int sr_status; /* sequence operation status */ u32 sr_status_flags; u32 sr_highest_slotid; u32 sr_target_highest_slotid; }; struct nfs4_get_lease_time_args { struct nfs4_sequence_args la_seq_args; }; struct nfs4_get_lease_time_res { struct nfs4_sequence_res lr_seq_res; struct nfs_fsinfo *lr_fsinfo; }; struct xdr_stream; struct nfs4_xdr_opaque_data; struct nfs4_xdr_opaque_ops { void (*encode)(struct xdr_stream *, const void *args, const struct nfs4_xdr_opaque_data *); void (*free)(struct nfs4_xdr_opaque_data *); }; struct nfs4_xdr_opaque_data { const struct nfs4_xdr_opaque_ops *ops; void *data; }; #define PNFS_LAYOUT_MAXSIZE 4096 struct nfs4_layoutdriver_data { struct page **pages; __u32 pglen; __u32 len; }; struct pnfs_layout_range { u32 iomode; u64 offset; u64 length; }; struct nfs4_layoutget_args { struct nfs4_sequence_args seq_args; __u32 type; struct pnfs_layout_range range; __u64 minlength; __u32 maxcount; struct inode *inode; struct nfs_open_context *ctx; nfs4_stateid stateid; struct nfs4_layoutdriver_data layout; }; struct nfs4_layoutget_res { struct nfs4_sequence_res seq_res; int status; __u32 return_on_close; struct pnfs_layout_range range; __u32 type; nfs4_stateid stateid; struct nfs4_layoutdriver_data *layoutp; }; struct nfs4_layoutget { struct nfs4_layoutget_args args; struct nfs4_layoutget_res res; const struct cred *cred; struct pnfs_layout_hdr *lo; gfp_t gfp_flags; }; struct nfs4_getdeviceinfo_args { struct nfs4_sequence_args seq_args; struct pnfs_device *pdev; __u32 notify_types; }; struct nfs4_getdeviceinfo_res { struct nfs4_sequence_res seq_res; struct pnfs_device *pdev; __u32 notification; }; struct nfs4_layoutcommit_args { struct nfs4_sequence_args seq_args; nfs4_stateid stateid; __u64 lastbytewritten; struct inode *inode; const u32 *bitmask; size_t layoutupdate_len; struct page *layoutupdate_page; struct page **layoutupdate_pages; __be32 *start_p; }; struct nfs4_layoutcommit_res { struct nfs4_sequence_res seq_res; struct nfs_fattr *fattr; const struct nfs_server *server; int status; }; struct nfs4_layoutcommit_data { struct rpc_task task; struct nfs_fattr fattr; struct list_head lseg_list; const struct cred *cred; struct inode *inode; struct nfs4_layoutcommit_args args; struct nfs4_layoutcommit_res res; }; struct nfs4_layoutreturn_args { struct nfs4_sequence_args seq_args; struct pnfs_layout_hdr *layout; struct inode *inode; struct pnfs_layout_range range; nfs4_stateid stateid; __u32 layout_type; struct nfs4_xdr_opaque_data *ld_private; }; struct nfs4_layoutreturn_res { struct nfs4_sequence_res seq_res; u32 lrs_present; nfs4_stateid stateid; }; struct nfs4_layoutreturn { struct nfs4_layoutreturn_args args; struct nfs4_layoutreturn_res res; const struct cred *cred; struct nfs_client *clp; struct inode *inode; int rpc_status; struct nfs4_xdr_opaque_data ld_private; }; #define PNFS_LAYOUTSTATS_MAXSIZE 256 struct nfs42_layoutstat_args; struct nfs42_layoutstat_devinfo; typedef void (*layoutstats_encode_t)(struct xdr_stream *, struct nfs42_layoutstat_args *, struct nfs42_layoutstat_devinfo *); /* Per file per deviceid layoutstats */ struct nfs42_layoutstat_devinfo { struct nfs4_deviceid dev_id; __u64 offset; __u64 length; __u64 read_count; __u64 read_bytes; __u64 write_count; __u64 write_bytes; __u32 layout_type; struct nfs4_xdr_opaque_data ld_private; }; struct nfs42_layoutstat_args { struct nfs4_sequence_args seq_args; struct nfs_fh *fh; struct inode *inode; nfs4_stateid stateid; int num_dev; struct nfs42_layoutstat_devinfo *devinfo; }; struct nfs42_layoutstat_res { struct nfs4_sequence_res seq_res; int num_dev; int rpc_status; }; struct nfs42_layoutstat_data { struct inode *inode; struct nfs42_layoutstat_args args; struct nfs42_layoutstat_res res; }; struct nfs42_device_error { struct nfs4_deviceid dev_id; int status; enum nfs_opnum4 opnum; }; struct nfs42_layout_error { __u64 offset; __u64 length; nfs4_stateid stateid; struct nfs42_device_error errors[1]; }; #define NFS42_LAYOUTERROR_MAX 5 struct nfs42_layouterror_args { struct nfs4_sequence_args seq_args; struct inode *inode; unsigned int num_errors; struct nfs42_layout_error errors[NFS42_LAYOUTERROR_MAX]; }; struct nfs42_layouterror_res { struct nfs4_sequence_res seq_res; unsigned int num_errors; int rpc_status; }; struct nfs42_layouterror_data { struct nfs42_layouterror_args args; struct nfs42_layouterror_res res; struct inode *inode; struct pnfs_layout_segment *lseg; }; struct nfs42_clone_args { struct nfs4_sequence_args seq_args; struct nfs_fh *src_fh; struct nfs_fh *dst_fh; nfs4_stateid src_stateid; nfs4_stateid dst_stateid; __u64 src_offset; __u64 dst_offset; __u64 count; const u32 *dst_bitmask; }; struct nfs42_clone_res { struct nfs4_sequence_res seq_res; unsigned int rpc_status; struct nfs_fattr *dst_fattr; const struct nfs_server *server; }; struct stateowner_id { __u64 create_time; __u32 uniquifier; }; /* * Arguments to the open call. */ struct nfs_openargs { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; struct nfs_seqid * seqid; int open_flags; fmode_t fmode; u32 share_access; u32 access; __u64 clientid; struct stateowner_id id; union { struct { struct iattr * attrs; /* UNCHECKED, GUARDED, EXCLUSIVE4_1 */ nfs4_verifier verifier; /* EXCLUSIVE */ }; nfs4_stateid delegation; /* CLAIM_DELEGATE_CUR */ fmode_t delegation_type; /* CLAIM_PREVIOUS */ } u; const struct qstr * name; const struct nfs_server *server; /* Needed for ID mapping */ const u32 * bitmask; const u32 * open_bitmap; enum open_claim_type4 claim; enum createmode4 createmode; const struct nfs4_label *label; umode_t umask; struct nfs4_layoutget_args *lg_args; }; struct nfs_openres { struct nfs4_sequence_res seq_res; nfs4_stateid stateid; struct nfs_fh fh; struct nfs4_change_info cinfo; __u32 rflags; struct nfs_fattr * f_attr; struct nfs4_label *f_label; struct nfs_seqid * seqid; const struct nfs_server *server; fmode_t delegation_type; nfs4_stateid delegation; unsigned long pagemod_limit; __u32 do_recall; __u32 attrset[NFS4_BITMAP_SIZE]; struct nfs4_string *owner; struct nfs4_string *group_owner; __u32 access_request; __u32 access_supported; __u32 access_result; struct nfs4_layoutget_res *lg_res; }; /* * Arguments to the open_confirm call. */ struct nfs_open_confirmargs { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; nfs4_stateid * stateid; struct nfs_seqid * seqid; }; struct nfs_open_confirmres { struct nfs4_sequence_res seq_res; nfs4_stateid stateid; struct nfs_seqid * seqid; }; /* * Arguments to the close call. */ struct nfs_closeargs { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; nfs4_stateid stateid; struct nfs_seqid * seqid; fmode_t fmode; u32 share_access; const u32 * bitmask; u32 bitmask_store[NFS_BITMASK_SZ]; struct nfs4_layoutreturn_args *lr_args; }; struct nfs_closeres { struct nfs4_sequence_res seq_res; nfs4_stateid stateid; struct nfs_fattr * fattr; struct nfs_seqid * seqid; const struct nfs_server *server; struct nfs4_layoutreturn_res *lr_res; int lr_ret; }; /* * * Arguments to the lock,lockt, and locku call. * */ struct nfs_lowner { __u64 clientid; __u64 id; dev_t s_dev; }; struct nfs_lock_args { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; struct file_lock * fl; struct nfs_seqid * lock_seqid; nfs4_stateid lock_stateid; struct nfs_seqid * open_seqid; nfs4_stateid open_stateid; struct nfs_lowner lock_owner; unsigned char block : 1; unsigned char reclaim : 1; unsigned char new_lock : 1; unsigned char new_lock_owner : 1; }; struct nfs_lock_res { struct nfs4_sequence_res seq_res; nfs4_stateid stateid; struct nfs_seqid * lock_seqid; struct nfs_seqid * open_seqid; }; struct nfs_locku_args { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; struct file_lock * fl; struct nfs_seqid * seqid; nfs4_stateid stateid; }; struct nfs_locku_res { struct nfs4_sequence_res seq_res; nfs4_stateid stateid; struct nfs_seqid * seqid; }; struct nfs_lockt_args { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; struct file_lock * fl; struct nfs_lowner lock_owner; }; struct nfs_lockt_res { struct nfs4_sequence_res seq_res; struct file_lock * denied; /* LOCK, LOCKT failed */ }; struct nfs_release_lockowner_args { struct nfs4_sequence_args seq_args; struct nfs_lowner lock_owner; }; struct nfs_release_lockowner_res { struct nfs4_sequence_res seq_res; }; struct nfs4_delegreturnargs { struct nfs4_sequence_args seq_args; const struct nfs_fh *fhandle; const nfs4_stateid *stateid; const u32 *bitmask; u32 bitmask_store[NFS_BITMASK_SZ]; struct nfs4_layoutreturn_args *lr_args; }; struct nfs4_delegreturnres { struct nfs4_sequence_res seq_res; struct nfs_fattr * fattr; struct nfs_server *server; struct nfs4_layoutreturn_res *lr_res; int lr_ret; }; /* * Arguments to the write call. */ struct nfs_write_verifier { char data[8]; }; struct nfs_writeverf { struct nfs_write_verifier verifier; enum nfs3_stable_how committed; }; /* * Arguments shared by the read and write call. */ struct nfs_pgio_args { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; struct nfs_open_context *context; struct nfs_lock_context *lock_context; nfs4_stateid stateid; __u64 offset; __u32 count; unsigned int pgbase; struct page ** pages; union { unsigned int replen; /* used by read */ struct { const u32 * bitmask; /* used by write */ u32 bitmask_store[NFS_BITMASK_SZ]; /* used by write */ enum nfs3_stable_how stable; /* used by write */ }; }; }; struct nfs_pgio_res { struct nfs4_sequence_res seq_res; struct nfs_fattr * fattr; __u64 count; __u32 op_status; union { struct { unsigned int replen; /* used by read */ int eof; /* used by read */ }; struct { struct nfs_writeverf * verf; /* used by write */ const struct nfs_server *server; /* used by write */ }; }; }; /* * Arguments to the commit call. */ struct nfs_commitargs { struct nfs4_sequence_args seq_args; struct nfs_fh *fh; __u64 offset; __u32 count; const u32 *bitmask; }; struct nfs_commitres { struct nfs4_sequence_res seq_res; __u32 op_status; struct nfs_fattr *fattr; struct nfs_writeverf *verf; const struct nfs_server *server; }; /* * Common arguments to the unlink call */ struct nfs_removeargs { struct nfs4_sequence_args seq_args; const struct nfs_fh *fh; struct qstr name; }; struct nfs_removeres { struct nfs4_sequence_res seq_res; struct nfs_server *server; struct nfs_fattr *dir_attr; struct nfs4_change_info cinfo; }; /* * Common arguments to the rename call */ struct nfs_renameargs { struct nfs4_sequence_args seq_args; const struct nfs_fh *old_dir; const struct nfs_fh *new_dir; const struct qstr *old_name; const struct qstr *new_name; }; struct nfs_renameres { struct nfs4_sequence_res seq_res; struct nfs_server *server; struct nfs4_change_info old_cinfo; struct nfs_fattr *old_fattr; struct nfs4_change_info new_cinfo; struct nfs_fattr *new_fattr; }; /* parsed sec= options */ #define NFS_AUTH_INFO_MAX_FLAVORS 12 /* see fs/nfs/super.c */ struct nfs_auth_info { unsigned int flavor_len; rpc_authflavor_t flavors[NFS_AUTH_INFO_MAX_FLAVORS]; }; /* * Argument struct for decode_entry function */ struct nfs_entry { __u64 ino; __u64 cookie, prev_cookie; const char * name; unsigned int len; int eof; struct nfs_fh * fh; struct nfs_fattr * fattr; struct nfs4_label *label; unsigned char d_type; struct nfs_server * server; }; struct nfs_readdir_arg { struct dentry *dentry; const struct cred *cred; __be32 *verf; u64 cookie; struct page **pages; unsigned int page_len; bool plus; }; struct nfs_readdir_res { __be32 *verf; }; /* * The following types are for NFSv2 only. */ struct nfs_sattrargs { struct nfs_fh * fh; struct iattr * sattr; }; struct nfs_diropargs { struct nfs_fh * fh; const char * name; unsigned int len; }; struct nfs_createargs { struct nfs_fh * fh; const char * name; unsigned int len; struct iattr * sattr; }; struct nfs_setattrargs { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; nfs4_stateid stateid; struct iattr * iap; const struct nfs_server * server; /* Needed for name mapping */ const u32 * bitmask; const struct nfs4_label *label; }; struct nfs_setaclargs { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; size_t acl_len; struct page ** acl_pages; }; struct nfs_setaclres { struct nfs4_sequence_res seq_res; }; struct nfs_getaclargs { struct nfs4_sequence_args seq_args; struct nfs_fh * fh; size_t acl_len; struct page ** acl_pages; }; /* getxattr ACL interface flags */ #define NFS4_ACL_TRUNC 0x0001 /* ACL was truncated */ struct nfs_getaclres { struct nfs4_sequence_res seq_res; size_t acl_len; size_t acl_data_offset; int acl_flags; struct page * acl_scratch; }; struct nfs_setattrres { struct nfs4_sequence_res seq_res; struct nfs_fattr * fattr; struct nfs4_label *label; const struct nfs_server * server; }; struct nfs_linkargs { struct nfs_fh * fromfh; struct nfs_fh * tofh; const char * toname; unsigned int tolen; }; struct nfs_symlinkargs { struct nfs_fh * fromfh; const char * fromname; unsigned int fromlen; struct page ** pages; unsigned int pathlen; struct iattr * sattr; }; struct nfs_readdirargs { struct nfs_fh * fh; __u32 cookie; unsigned int count; struct page ** pages; }; struct nfs3_getaclargs { struct nfs_fh * fh; int mask; struct page ** pages; }; struct nfs3_setaclargs { struct inode * inode; int mask; struct posix_acl * acl_access; struct posix_acl * acl_default; size_t len; unsigned int npages; struct page ** pages; }; struct nfs_diropok { struct nfs_fh * fh; struct nfs_fattr * fattr; }; struct nfs_readlinkargs { struct nfs_fh * fh; unsigned int pgbase; unsigned int pglen; struct page ** pages; }; struct nfs3_sattrargs { struct nfs_fh * fh; struct iattr * sattr; unsigned int guard; struct timespec64 guardtime; }; struct nfs3_diropargs { struct nfs_fh * fh; const char * name; unsigned int len; }; struct nfs3_accessargs { struct nfs_fh * fh; __u32 access; }; struct nfs3_createargs { struct nfs_fh * fh; const char * name; unsigned int len; struct iattr * sattr; enum nfs3_createmode createmode; __be32 verifier[2]; }; struct nfs3_mkdirargs { struct nfs_fh * fh; const char * name; unsigned int len; struct iattr * sattr; }; struct nfs3_symlinkargs { struct nfs_fh * fromfh; const char * fromname; unsigned int fromlen; struct page ** pages; unsigned int pathlen; struct iattr * sattr; }; struct nfs3_mknodargs { struct nfs_fh * fh; const char * name; unsigned int len; enum nfs3_ftype type; struct iattr * sattr; dev_t rdev; }; struct nfs3_linkargs { struct nfs_fh * fromfh; struct nfs_fh * tofh; const char * toname; unsigned int tolen; }; struct nfs3_readdirargs { struct nfs_fh * fh; __u64 cookie; __be32 verf[2]; bool plus; unsigned int count; struct page ** pages; }; struct nfs3_diropres { struct nfs_fattr * dir_attr; struct nfs_fh * fh; struct nfs_fattr * fattr; }; struct nfs3_accessres { struct nfs_fattr * fattr; __u32 access; }; struct nfs3_readlinkargs { struct nfs_fh * fh; unsigned int pgbase; unsigned int pglen; struct page ** pages; }; struct nfs3_linkres { struct nfs_fattr * dir_attr; struct nfs_fattr * fattr; }; struct nfs3_readdirres { struct nfs_fattr * dir_attr; __be32 * verf; bool plus; }; struct nfs3_getaclres { struct nfs_fattr * fattr; int mask; unsigned int acl_access_count; unsigned int acl_default_count; struct posix_acl * acl_access; struct posix_acl * acl_default; }; #if IS_ENABLED(CONFIG_NFS_V4) typedef u64 clientid4; struct nfs4_accessargs { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; const u32 * bitmask; u32 access; }; struct nfs4_accessres { struct nfs4_sequence_res seq_res; const struct nfs_server * server; struct nfs_fattr * fattr; u32 supported; u32 access; }; struct nfs4_create_arg { struct nfs4_sequence_args seq_args; u32 ftype; union { struct { struct page ** pages; unsigned int len; } symlink; /* NF4LNK */ struct { u32 specdata1; u32 specdata2; } device; /* NF4BLK, NF4CHR */ } u; const struct qstr * name; const struct nfs_server * server; const struct iattr * attrs; const struct nfs_fh * dir_fh; const u32 * bitmask; const struct nfs4_label *label; umode_t umask; }; struct nfs4_create_res { struct nfs4_sequence_res seq_res; const struct nfs_server * server; struct nfs_fh * fh; struct nfs_fattr * fattr; struct nfs4_label *label; struct nfs4_change_info dir_cinfo; }; struct nfs4_fsinfo_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; const u32 * bitmask; }; struct nfs4_fsinfo_res { struct nfs4_sequence_res seq_res; struct nfs_fsinfo *fsinfo; }; struct nfs4_getattr_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; const u32 * bitmask; }; struct nfs4_getattr_res { struct nfs4_sequence_res seq_res; const struct nfs_server * server; struct nfs_fattr * fattr; struct nfs4_label *label; }; struct nfs4_link_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; const struct nfs_fh * dir_fh; const struct qstr * name; const u32 * bitmask; }; struct nfs4_link_res { struct nfs4_sequence_res seq_res; const struct nfs_server * server; struct nfs_fattr * fattr; struct nfs4_label *label; struct nfs4_change_info cinfo; struct nfs_fattr * dir_attr; }; struct nfs4_lookup_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * dir_fh; const struct qstr * name; const u32 * bitmask; }; struct nfs4_lookup_res { struct nfs4_sequence_res seq_res; const struct nfs_server * server; struct nfs_fattr * fattr; struct nfs_fh * fh; struct nfs4_label *label; }; struct nfs4_lookupp_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh *fh; const u32 *bitmask; }; struct nfs4_lookupp_res { struct nfs4_sequence_res seq_res; const struct nfs_server *server; struct nfs_fattr *fattr; struct nfs_fh *fh; struct nfs4_label *label; }; struct nfs4_lookup_root_arg { struct nfs4_sequence_args seq_args; const u32 * bitmask; }; struct nfs4_pathconf_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; const u32 * bitmask; }; struct nfs4_pathconf_res { struct nfs4_sequence_res seq_res; struct nfs_pathconf *pathconf; }; struct nfs4_readdir_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; u64 cookie; nfs4_verifier verifier; u32 count; struct page ** pages; /* zero-copy data */ unsigned int pgbase; /* zero-copy data */ const u32 * bitmask; bool plus; }; struct nfs4_readdir_res { struct nfs4_sequence_res seq_res; nfs4_verifier verifier; unsigned int pgbase; }; struct nfs4_readlink { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; unsigned int pgbase; unsigned int pglen; /* zero-copy data */ struct page ** pages; /* zero-copy data */ }; struct nfs4_readlink_res { struct nfs4_sequence_res seq_res; }; struct nfs4_setclientid { const nfs4_verifier * sc_verifier; u32 sc_prog; unsigned int sc_netid_len; char sc_netid[RPCBIND_MAXNETIDLEN + 1]; unsigned int sc_uaddr_len; char sc_uaddr[RPCBIND_MAXUADDRLEN + 1]; struct nfs_client *sc_clnt; struct rpc_cred *sc_cred; }; struct nfs4_setclientid_res { u64 clientid; nfs4_verifier confirm; }; struct nfs4_statfs_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh * fh; const u32 * bitmask; }; struct nfs4_statfs_res { struct nfs4_sequence_res seq_res; struct nfs_fsstat *fsstat; }; struct nfs4_server_caps_arg { struct nfs4_sequence_args seq_args; struct nfs_fh *fhandle; const u32 * bitmask; }; struct nfs4_server_caps_res { struct nfs4_sequence_res seq_res; u32 attr_bitmask[3]; u32 exclcreat_bitmask[3]; u32 acl_bitmask; u32 has_links; u32 has_symlinks; u32 fh_expire_type; u32 case_insensitive; u32 case_preserving; }; #define NFS4_PATHNAME_MAXCOMPONENTS 512 struct nfs4_pathname { unsigned int ncomponents; struct nfs4_string components[NFS4_PATHNAME_MAXCOMPONENTS]; }; #define NFS4_FS_LOCATION_MAXSERVERS 10 struct nfs4_fs_location { unsigned int nservers; struct nfs4_string servers[NFS4_FS_LOCATION_MAXSERVERS]; struct nfs4_pathname rootpath; }; #define NFS4_FS_LOCATIONS_MAXENTRIES 10 struct nfs4_fs_locations { struct nfs_fattr *fattr; const struct nfs_server *server; struct nfs4_pathname fs_path; int nlocations; struct nfs4_fs_location locations[NFS4_FS_LOCATIONS_MAXENTRIES]; }; struct nfs4_fs_locations_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh *dir_fh; const struct nfs_fh *fh; const struct qstr *name; struct page *page; const u32 *bitmask; clientid4 clientid; unsigned char migration:1, renew:1; }; struct nfs4_fs_locations_res { struct nfs4_sequence_res seq_res; struct nfs4_fs_locations *fs_locations; unsigned char migration:1, renew:1; }; struct nfs4_secinfo4 { u32 flavor; struct rpcsec_gss_info flavor_info; }; struct nfs4_secinfo_flavors { unsigned int num_flavors; struct nfs4_secinfo4 flavors[]; }; struct nfs4_secinfo_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh *dir_fh; const struct qstr *name; }; struct nfs4_secinfo_res { struct nfs4_sequence_res seq_res; struct nfs4_secinfo_flavors *flavors; }; struct nfs4_fsid_present_arg { struct nfs4_sequence_args seq_args; const struct nfs_fh *fh; clientid4 clientid; unsigned char renew:1; }; struct nfs4_fsid_present_res { struct nfs4_sequence_res seq_res; struct nfs_fh *fh; unsigned char renew:1; }; #endif /* CONFIG_NFS_V4 */ struct nfstime4 { u64 seconds; u32 nseconds; }; #ifdef CONFIG_NFS_V4_1 struct pnfs_commit_bucket { struct list_head written; struct list_head committing; struct pnfs_layout_segment *lseg; struct nfs_writeverf direct_verf; }; struct pnfs_commit_array { struct list_head cinfo_list; struct list_head lseg_list; struct pnfs_layout_segment *lseg; struct rcu_head rcu; refcount_t refcount; unsigned int nbuckets; struct pnfs_commit_bucket buckets[]; }; struct pnfs_ds_commit_info { struct list_head commits; unsigned int nwritten; unsigned int ncommitting; const struct pnfs_commit_ops *ops; }; struct nfs41_state_protection { u32 how; struct nfs4_op_map enforce; struct nfs4_op_map allow; }; struct nfs41_exchange_id_args { struct nfs_client *client; nfs4_verifier verifier; u32 flags; struct nfs41_state_protection state_protect; }; struct nfs41_server_owner { uint64_t minor_id; uint32_t major_id_sz; char major_id[NFS4_OPAQUE_LIMIT]; }; struct nfs41_server_scope { uint32_t server_scope_sz; char server_scope[NFS4_OPAQUE_LIMIT]; }; struct nfs41_impl_id { char domain[NFS4_OPAQUE_LIMIT + 1]; char name[NFS4_OPAQUE_LIMIT + 1]; struct nfstime4 date; }; #define MAX_BIND_CONN_TO_SESSION_RETRIES 3 struct nfs41_bind_conn_to_session_args { struct nfs_client *client; struct nfs4_sessionid sessionid; u32 dir; bool use_conn_in_rdma_mode; int retries; }; struct nfs41_bind_conn_to_session_res { struct nfs4_sessionid sessionid; u32 dir; bool use_conn_in_rdma_mode; }; struct nfs41_exchange_id_res { u64 clientid; u32 seqid; u32 flags; struct nfs41_server_owner *server_owner; struct nfs41_server_scope *server_scope; struct nfs41_impl_id *impl_id; struct nfs41_state_protection state_protect; }; struct nfs41_create_session_args { struct nfs_client *client; u64 clientid; uint32_t seqid; uint32_t flags; uint32_t cb_program; struct nfs4_channel_attrs fc_attrs; /* Fore Channel */ struct nfs4_channel_attrs bc_attrs; /* Back Channel */ }; struct nfs41_create_session_res { struct nfs4_sessionid sessionid; uint32_t seqid; uint32_t flags; struct nfs4_channel_attrs fc_attrs; /* Fore Channel */ struct nfs4_channel_attrs bc_attrs; /* Back Channel */ }; struct nfs41_reclaim_complete_args { struct nfs4_sequence_args seq_args; /* In the future extend to include curr_fh for use with migration */ unsigned char one_fs:1; }; struct nfs41_reclaim_complete_res { struct nfs4_sequence_res seq_res; }; #define SECINFO_STYLE_CURRENT_FH 0 #define SECINFO_STYLE_PARENT 1 struct nfs41_secinfo_no_name_args { struct nfs4_sequence_args seq_args; int style; }; struct nfs41_test_stateid_args { struct nfs4_sequence_args seq_args; nfs4_stateid *stateid; }; struct nfs41_test_stateid_res { struct nfs4_sequence_res seq_res; unsigned int status; }; struct nfs41_free_stateid_args { struct nfs4_sequence_args seq_args; nfs4_stateid stateid; }; struct nfs41_free_stateid_res { struct nfs4_sequence_res seq_res; unsigned int status; }; #else struct pnfs_ds_commit_info { }; #endif /* CONFIG_NFS_V4_1 */ #ifdef CONFIG_NFS_V4_2 struct nfs42_falloc_args { struct nfs4_sequence_args seq_args; struct nfs_fh *falloc_fh; nfs4_stateid falloc_stateid; u64 falloc_offset; u64 falloc_length; const u32 *falloc_bitmask; }; struct nfs42_falloc_res { struct nfs4_sequence_res seq_res; unsigned int status; struct nfs_fattr *falloc_fattr; const struct nfs_server *falloc_server; }; struct nfs42_copy_args { struct nfs4_sequence_args seq_args; struct nfs_fh *src_fh; nfs4_stateid src_stateid; u64 src_pos; struct nfs_fh *dst_fh; nfs4_stateid dst_stateid; u64 dst_pos; u64 count; bool sync; struct nl4_server *cp_src; }; struct nfs42_write_res { nfs4_stateid stateid; u64 count; struct nfs_writeverf verifier; }; struct nfs42_copy_res { struct nfs4_sequence_res seq_res; struct nfs42_write_res write_res; bool consecutive; bool synchronous; struct nfs_commitres commit_res; }; struct nfs42_offload_status_args { struct nfs4_sequence_args osa_seq_args; struct nfs_fh *osa_src_fh; nfs4_stateid osa_stateid; }; struct nfs42_offload_status_res { struct nfs4_sequence_res osr_seq_res; uint64_t osr_count; int osr_status; }; struct nfs42_copy_notify_args { struct nfs4_sequence_args cna_seq_args; struct nfs_fh *cna_src_fh; nfs4_stateid cna_src_stateid; struct nl4_server cna_dst; }; struct nfs42_copy_notify_res { struct nfs4_sequence_res cnr_seq_res; struct nfstime4 cnr_lease_time; nfs4_stateid cnr_stateid; struct nl4_server cnr_src; }; struct nfs42_seek_args { struct nfs4_sequence_args seq_args; struct nfs_fh *sa_fh; nfs4_stateid sa_stateid; u64 sa_offset; u32 sa_what; }; struct nfs42_seek_res { struct nfs4_sequence_res seq_res; unsigned int status; u32 sr_eof; u64 sr_offset; }; struct nfs42_setxattrargs { struct nfs4_sequence_args seq_args; struct nfs_fh *fh; const char *xattr_name; u32 xattr_flags; size_t xattr_len; struct page **xattr_pages; }; struct nfs42_setxattrres { struct nfs4_sequence_res seq_res; struct nfs4_change_info cinfo; }; struct nfs42_getxattrargs { struct nfs4_sequence_args seq_args; struct nfs_fh *fh; const char *xattr_name; size_t xattr_len; struct page **xattr_pages; }; struct nfs42_getxattrres { struct nfs4_sequence_res seq_res; size_t xattr_len; }; struct nfs42_listxattrsargs { struct nfs4_sequence_args seq_args; struct nfs_fh *fh; u32 count; u64 cookie; struct page **xattr_pages; }; struct nfs42_listxattrsres { struct nfs4_sequence_res seq_res; struct page *scratch; void *xattr_buf; size_t xattr_len; u64 cookie; bool eof; size_t copied; }; struct nfs42_removexattrargs { struct nfs4_sequence_args seq_args; struct nfs_fh *fh; const char *xattr_name; }; struct nfs42_removexattrres { struct nfs4_sequence_res seq_res; struct nfs4_change_info cinfo; }; #endif /* CONFIG_NFS_V4_2 */ struct nfs_page; #define NFS_PAGEVEC_SIZE (8U) struct nfs_page_array { struct page **pagevec; unsigned int npages; /* Max length of pagevec */ struct page *page_array[NFS_PAGEVEC_SIZE]; }; /* used as flag bits in nfs_pgio_header */ enum { NFS_IOHDR_ERROR = 0, NFS_IOHDR_EOF, NFS_IOHDR_REDO, NFS_IOHDR_STAT, NFS_IOHDR_RESEND_PNFS, NFS_IOHDR_RESEND_MDS, }; struct nfs_io_completion; struct nfs_pgio_header { struct inode *inode; const struct cred *cred; struct list_head pages; struct nfs_page *req; struct nfs_writeverf verf; /* Used for writes */ fmode_t rw_mode; struct pnfs_layout_segment *lseg; loff_t io_start; const struct rpc_call_ops *mds_ops; void (*release) (struct nfs_pgio_header *hdr); const struct nfs_pgio_completion_ops *completion_ops; const struct nfs_rw_ops *rw_ops; struct nfs_io_completion *io_completion; struct nfs_direct_req *dreq; int pnfs_error; int error; /* merge with pnfs_error */ unsigned int good_bytes; /* boundary of good data */ unsigned long flags; /* * rpc data */ struct rpc_task task; struct nfs_fattr fattr; struct nfs_pgio_args args; /* argument struct */ struct nfs_pgio_res res; /* result struct */ unsigned long timestamp; /* For lease renewal */ int (*pgio_done_cb)(struct rpc_task *, struct nfs_pgio_header *); __u64 mds_offset; /* Filelayout dense stripe */ struct nfs_page_array page_array; struct nfs_client *ds_clp; /* pNFS data server */ u32 ds_commit_idx; /* ds index if ds_clp is set */ u32 pgio_mirror_idx;/* mirror index in pgio layer */ }; struct nfs_mds_commit_info { atomic_t rpcs_out; atomic_long_t ncommit; struct list_head list; }; struct nfs_commit_info; struct nfs_commit_data; struct nfs_inode; struct nfs_commit_completion_ops { void (*completion) (struct nfs_commit_data *data); void (*resched_write) (struct nfs_commit_info *, struct nfs_page *); }; struct nfs_commit_info { struct inode *inode; /* Needed for inode->i_lock */ struct nfs_mds_commit_info *mds; struct pnfs_ds_commit_info *ds; struct nfs_direct_req *dreq; /* O_DIRECT request */ const struct nfs_commit_completion_ops *completion_ops; }; struct nfs_commit_data { struct rpc_task task; struct inode *inode; const struct cred *cred; struct nfs_fattr fattr; struct nfs_writeverf verf; struct list_head pages; /* Coalesced requests we wish to flush */ struct list_head list; /* lists of struct nfs_write_data */ struct nfs_direct_req *dreq; /* O_DIRECT request */ struct nfs_commitargs args; /* argument struct */ struct nfs_commitres res; /* result struct */ struct nfs_open_context *context; struct pnfs_layout_segment *lseg; struct nfs_client *ds_clp; /* pNFS data server */ int ds_commit_index; loff_t lwb; const struct rpc_call_ops *mds_ops; const struct nfs_commit_completion_ops *completion_ops; int (*commit_done_cb) (struct rpc_task *task, struct nfs_commit_data *data); unsigned long flags; }; struct nfs_pgio_completion_ops { void (*error_cleanup)(struct list_head *head, int); void (*init_hdr)(struct nfs_pgio_header *hdr); void (*completion)(struct nfs_pgio_header *hdr); void (*reschedule_io)(struct nfs_pgio_header *hdr); }; struct nfs_unlinkdata { struct nfs_removeargs args; struct nfs_removeres res; struct dentry *dentry; wait_queue_head_t wq; const struct cred *cred; struct nfs_fattr dir_attr; long timeout; }; struct nfs_renamedata { struct nfs_renameargs args; struct nfs_renameres res; const struct cred *cred; struct inode *old_dir; struct dentry *old_dentry; struct nfs_fattr old_fattr; struct inode *new_dir; struct dentry *new_dentry; struct nfs_fattr new_fattr; void (*complete)(struct rpc_task *, struct nfs_renamedata *); long timeout; bool cancelled; }; struct nfs_access_entry; struct nfs_client; struct rpc_timeout; struct nfs_subversion; struct nfs_mount_info; struct nfs_client_initdata; struct nfs_pageio_descriptor; struct fs_context; /* * RPC procedure vector for NFSv2/NFSv3 demuxing */ struct nfs_rpc_ops { u32 version; /* Protocol version */ const struct dentry_operations *dentry_ops; const struct inode_operations *dir_inode_ops; const struct inode_operations *file_inode_ops; const struct file_operations *file_ops; const struct nlmclnt_operations *nlmclnt_ops; int (*getroot) (struct nfs_server *, struct nfs_fh *, struct nfs_fsinfo *); int (*submount) (struct fs_context *, struct nfs_server *); int (*try_get_tree) (struct fs_context *); int (*getattr) (struct nfs_server *, struct nfs_fh *, struct nfs_fattr *, struct nfs4_label *, struct inode *); int (*setattr) (struct dentry *, struct nfs_fattr *, struct iattr *); int (*lookup) (struct inode *, struct dentry *, struct nfs_fh *, struct nfs_fattr *, struct nfs4_label *); int (*lookupp) (struct inode *, struct nfs_fh *, struct nfs_fattr *, struct nfs4_label *); int (*access) (struct inode *, struct nfs_access_entry *); int (*readlink)(struct inode *, struct page *, unsigned int, unsigned int); int (*create) (struct inode *, struct dentry *, struct iattr *, int); int (*remove) (struct inode *, struct dentry *); void (*unlink_setup) (struct rpc_message *, struct dentry *, struct inode *); void (*unlink_rpc_prepare) (struct rpc_task *, struct nfs_unlinkdata *); int (*unlink_done) (struct rpc_task *, struct inode *); void (*rename_setup) (struct rpc_message *msg, struct dentry *old_dentry, struct dentry *new_dentry); void (*rename_rpc_prepare)(struct rpc_task *task, struct nfs_renamedata *); int (*rename_done) (struct rpc_task *task, struct inode *old_dir, struct inode *new_dir); int (*link) (struct inode *, struct inode *, const struct qstr *); int (*symlink) (struct inode *, struct dentry *, struct page *, unsigned int, struct iattr *); int (*mkdir) (struct inode *, struct dentry *, struct iattr *); int (*rmdir) (struct inode *, const struct qstr *); int (*readdir) (struct nfs_readdir_arg *, struct nfs_readdir_res *); int (*mknod) (struct inode *, struct dentry *, struct iattr *, dev_t); int (*statfs) (struct nfs_server *, struct nfs_fh *, struct nfs_fsstat *); int (*fsinfo) (struct nfs_server *, struct nfs_fh *, struct nfs_fsinfo *); int (*pathconf) (struct nfs_server *, struct nfs_fh *, struct nfs_pathconf *); int (*set_capabilities)(struct nfs_server *, struct nfs_fh *); int (*decode_dirent)(struct xdr_stream *, struct nfs_entry *, bool); int (*pgio_rpc_prepare)(struct rpc_task *, struct nfs_pgio_header *); void (*read_setup)(struct nfs_pgio_header *, struct rpc_message *); int (*read_done)(struct rpc_task *, struct nfs_pgio_header *); void (*write_setup)(struct nfs_pgio_header *, struct rpc_message *, struct rpc_clnt **); int (*write_done)(struct rpc_task *, struct nfs_pgio_header *); void (*commit_setup) (struct nfs_commit_data *, struct rpc_message *, struct rpc_clnt **); void (*commit_rpc_prepare)(struct rpc_task *, struct nfs_commit_data *); int (*commit_done) (struct rpc_task *, struct nfs_commit_data *); int (*lock)(struct file *, int, struct file_lock *); int (*lock_check_bounds)(const struct file_lock *); void (*clear_acl_cache)(struct inode *); void (*close_context)(struct nfs_open_context *ctx, int); struct inode * (*open_context) (struct inode *dir, struct nfs_open_context *ctx, int open_flags, struct iattr *iattr, int *); int (*have_delegation)(struct inode *, fmode_t); struct nfs_client *(*alloc_client) (const struct nfs_client_initdata *); struct nfs_client *(*init_client) (struct nfs_client *, const struct nfs_client_initdata *); void (*free_client) (struct nfs_client *); struct nfs_server *(*create_server)(struct fs_context *); struct nfs_server *(*clone_server)(struct nfs_server *, struct nfs_fh *, struct nfs_fattr *, rpc_authflavor_t); int (*discover_trunking)(struct nfs_server *, struct nfs_fh *); void (*enable_swap)(struct inode *inode); void (*disable_swap)(struct inode *inode); }; /* * NFS_CALL(getattr, inode, (fattr)); * into * NFS_PROTO(inode)->getattr(fattr); */ #define NFS_CALL(op, inode, args) NFS_PROTO(inode)->op args /* * Function vectors etc. for the NFS client */ extern const struct nfs_rpc_ops nfs_v2_clientops; extern const struct nfs_rpc_ops nfs_v3_clientops; extern const struct nfs_rpc_ops nfs_v4_clientops; extern const struct rpc_version nfs_version2; extern const struct rpc_version nfs_version3; extern const struct rpc_version nfs_version4; extern const struct rpc_version nfsacl_version3; extern const struct rpc_program nfsacl_program; #endif PK ! /�ǩ- �- memory_hotplug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MEMORY_HOTPLUG_H #define __LINUX_MEMORY_HOTPLUG_H #include <linux/mmzone.h> #include <linux/spinlock.h> #include <linux/notifier.h> #include <linux/bug.h> struct page; struct zone; struct pglist_data; struct mem_section; struct memory_block; struct memory_group; struct resource; struct vmem_altmap; #ifdef CONFIG_MEMORY_HOTPLUG struct page *pfn_to_online_page(unsigned long pfn); /* Types for control the zone type of onlined and offlined memory */ enum { /* Offline the memory. */ MMOP_OFFLINE = 0, /* Online the memory. Zone depends, see default_zone_for_pfn(). */ MMOP_ONLINE, /* Online the memory to ZONE_NORMAL. */ MMOP_ONLINE_KERNEL, /* Online the memory to ZONE_MOVABLE. */ MMOP_ONLINE_MOVABLE, }; /* Flags for add_memory() and friends to specify memory hotplug details. */ typedef int __bitwise mhp_t; /* No special request */ #define MHP_NONE ((__force mhp_t)0) /* * Allow merging of the added System RAM resource with adjacent, * mergeable resources. After a successful call to add_memory_resource() * with this flag set, the resource pointer must no longer be used as it * might be stale, or the resource might have changed. */ #define MHP_MERGE_RESOURCE ((__force mhp_t)BIT(0)) /* * We want memmap (struct page array) to be self contained. * To do so, we will use the beginning of the hot-added range to build * the page tables for the memmap array that describes the entire range. * Only selected architectures support it with SPARSE_VMEMMAP. */ #define MHP_MEMMAP_ON_MEMORY ((__force mhp_t)BIT(1)) /* * The nid field specifies a memory group id (mgid) instead. The memory group * implies the node id (nid). */ #define MHP_NID_IS_MGID ((__force mhp_t)BIT(2)) /* * Extended parameters for memory hotplug: * altmap: alternative allocator for memmap array (optional) * pgprot: page protection flags to apply to newly created page tables * (required) */ struct mhp_params { struct vmem_altmap *altmap; pgprot_t pgprot; }; bool mhp_range_allowed(u64 start, u64 size, bool need_mapping); struct range mhp_get_pluggable_range(bool need_mapping); /* * Zone resizing functions * * Note: any attempt to resize a zone should has pgdat_resize_lock() * zone_span_writelock() both held. This ensure the size of a zone * can't be changed while pgdat_resize_lock() held. */ static inline unsigned zone_span_seqbegin(struct zone *zone) { return read_seqbegin(&zone->span_seqlock); } static inline int zone_span_seqretry(struct zone *zone, unsigned iv) { return read_seqretry(&zone->span_seqlock, iv); } static inline void zone_span_writelock(struct zone *zone) { write_seqlock(&zone->span_seqlock); } static inline void zone_span_writeunlock(struct zone *zone) { write_sequnlock(&zone->span_seqlock); } static inline void zone_seqlock_init(struct zone *zone) { seqlock_init(&zone->span_seqlock); } extern int zone_grow_free_lists(struct zone *zone, unsigned long new_nr_pages); extern int zone_grow_waitqueues(struct zone *zone, unsigned long nr_pages); extern int add_one_highpage(struct page *page, int pfn, int bad_ppro); extern void adjust_present_page_count(struct page *page, struct memory_group *group, long nr_pages); /* VM interface that may be used by firmware interface */ extern int mhp_init_memmap_on_memory(unsigned long pfn, unsigned long nr_pages, struct zone *zone); extern void mhp_deinit_memmap_on_memory(unsigned long pfn, unsigned long nr_pages); extern int online_pages(unsigned long pfn, unsigned long nr_pages, struct zone *zone, struct memory_group *group); extern struct zone *test_pages_in_a_zone(unsigned long start_pfn, unsigned long end_pfn); extern void __offline_isolated_pages(unsigned long start_pfn, unsigned long end_pfn); typedef void (*online_page_callback_t)(struct page *page, unsigned int order); extern void generic_online_page(struct page *page, unsigned int order); extern int set_online_page_callback(online_page_callback_t callback); extern int restore_online_page_callback(online_page_callback_t callback); extern int try_online_node(int nid); extern int arch_add_memory(int nid, u64 start, u64 size, struct mhp_params *params); extern u64 max_mem_size; extern int mhp_online_type_from_str(const char *str); /* Default online_type (MMOP_*) when new memory blocks are added. */ extern int mhp_default_online_type; /* If movable_node boot option specified */ extern bool movable_node_enabled; static inline bool movable_node_is_enabled(void) { return movable_node_enabled; } extern void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap); extern void __remove_pages(unsigned long start_pfn, unsigned long nr_pages, struct vmem_altmap *altmap); /* reasonably generic interface to expand the physical pages */ extern int __add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, struct mhp_params *params); #ifndef CONFIG_ARCH_HAS_ADD_PAGES static inline int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, struct mhp_params *params) { return __add_pages(nid, start_pfn, nr_pages, params); } #else /* ARCH_HAS_ADD_PAGES */ int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, struct mhp_params *params); #endif /* ARCH_HAS_ADD_PAGES */ #ifdef CONFIG_HAVE_ARCH_NODEDATA_EXTENSION /* * For supporting node-hotadd, we have to allocate a new pgdat. * * If an arch has generic style NODE_DATA(), * node_data[nid] = kzalloc() works well. But it depends on the architecture. * * In general, generic_alloc_nodedata() is used. * Now, arch_free_nodedata() is just defined for error path of node_hot_add. * */ extern pg_data_t *arch_alloc_nodedata(int nid); extern void arch_free_nodedata(pg_data_t *pgdat); extern void arch_refresh_nodedata(int nid, pg_data_t *pgdat); #else /* CONFIG_HAVE_ARCH_NODEDATA_EXTENSION */ #define arch_alloc_nodedata(nid) generic_alloc_nodedata(nid) #define arch_free_nodedata(pgdat) generic_free_nodedata(pgdat) #ifdef CONFIG_NUMA /* * If ARCH_HAS_NODEDATA_EXTENSION=n, this func is used to allocate pgdat. * XXX: kmalloc_node() can't work well to get new node's memory at this time. * Because, pgdat for the new node is not allocated/initialized yet itself. * To use new node's memory, more consideration will be necessary. */ #define generic_alloc_nodedata(nid) \ ({ \ kzalloc(sizeof(pg_data_t), GFP_KERNEL); \ }) /* * This definition is just for error path in node hotadd. * For node hotremove, we have to replace this. */ #define generic_free_nodedata(pgdat) kfree(pgdat) extern pg_data_t *node_data[]; static inline void arch_refresh_nodedata(int nid, pg_data_t *pgdat) { node_data[nid] = pgdat; } #else /* !CONFIG_NUMA */ /* never called */ static inline pg_data_t *generic_alloc_nodedata(int nid) { BUG(); return NULL; } static inline void generic_free_nodedata(pg_data_t *pgdat) { } static inline void arch_refresh_nodedata(int nid, pg_data_t *pgdat) { } #endif /* CONFIG_NUMA */ #endif /* CONFIG_HAVE_ARCH_NODEDATA_EXTENSION */ void get_online_mems(void); void put_online_mems(void); void mem_hotplug_begin(void); void mem_hotplug_done(void); #else /* ! CONFIG_MEMORY_HOTPLUG */ #define pfn_to_online_page(pfn) \ ({ \ struct page *___page = NULL; \ if (pfn_valid(pfn)) \ ___page = pfn_to_page(pfn); \ ___page; \ }) static inline unsigned zone_span_seqbegin(struct zone *zone) { return 0; } static inline int zone_span_seqretry(struct zone *zone, unsigned iv) { return 0; } static inline void zone_span_writelock(struct zone *zone) {} static inline void zone_span_writeunlock(struct zone *zone) {} static inline void zone_seqlock_init(struct zone *zone) {} static inline int try_online_node(int nid) { return 0; } static inline void get_online_mems(void) {} static inline void put_online_mems(void) {} static inline void mem_hotplug_begin(void) {} static inline void mem_hotplug_done(void) {} static inline bool movable_node_is_enabled(void) { return false; } #endif /* ! CONFIG_MEMORY_HOTPLUG */ /* * Keep this declaration outside CONFIG_MEMORY_HOTPLUG as some * platforms might override and use arch_get_mappable_range() * for internal non memory hotplug purposes. */ struct range arch_get_mappable_range(void); #if defined(CONFIG_MEMORY_HOTPLUG) || defined(CONFIG_DEFERRED_STRUCT_PAGE_INIT) /* * pgdat resizing functions */ static inline void pgdat_resize_lock(struct pglist_data *pgdat, unsigned long *flags) { spin_lock_irqsave(&pgdat->node_size_lock, *flags); } static inline void pgdat_resize_unlock(struct pglist_data *pgdat, unsigned long *flags) { spin_unlock_irqrestore(&pgdat->node_size_lock, *flags); } static inline void pgdat_resize_init(struct pglist_data *pgdat) { spin_lock_init(&pgdat->node_size_lock); } #else /* !(CONFIG_MEMORY_HOTPLUG || CONFIG_DEFERRED_STRUCT_PAGE_INIT) */ /* * Stub functions for when hotplug is off */ static inline void pgdat_resize_lock(struct pglist_data *p, unsigned long *f) {} static inline void pgdat_resize_unlock(struct pglist_data *p, unsigned long *f) {} static inline void pgdat_resize_init(struct pglist_data *pgdat) {} #endif /* !(CONFIG_MEMORY_HOTPLUG || CONFIG_DEFERRED_STRUCT_PAGE_INIT) */ #ifdef CONFIG_MEMORY_HOTREMOVE extern void try_offline_node(int nid); extern int offline_pages(unsigned long start_pfn, unsigned long nr_pages, struct memory_group *group); extern int remove_memory(u64 start, u64 size); extern void __remove_memory(u64 start, u64 size); extern int offline_and_remove_memory(u64 start, u64 size); #else static inline void try_offline_node(int nid) {} static inline int offline_pages(unsigned long start_pfn, unsigned long nr_pages, struct memory_group *group) { return -EINVAL; } static inline int remove_memory(u64 start, u64 size) { return -EBUSY; } static inline void __remove_memory(u64 start, u64 size) {} #endif /* CONFIG_MEMORY_HOTREMOVE */ extern void set_zone_contiguous(struct zone *zone); extern void clear_zone_contiguous(struct zone *zone); #ifdef CONFIG_MEMORY_HOTPLUG extern void __ref free_area_init_core_hotplug(int nid); extern int __add_memory(int nid, u64 start, u64 size, mhp_t mhp_flags); extern int add_memory(int nid, u64 start, u64 size, mhp_t mhp_flags); extern int add_memory_resource(int nid, struct resource *resource, mhp_t mhp_flags); extern int add_memory_driver_managed(int nid, u64 start, u64 size, const char *resource_name, mhp_t mhp_flags); extern void move_pfn_range_to_zone(struct zone *zone, unsigned long start_pfn, unsigned long nr_pages, struct vmem_altmap *altmap, int migratetype); extern void remove_pfn_range_from_zone(struct zone *zone, unsigned long start_pfn, unsigned long nr_pages); extern bool is_memblock_offlined(struct memory_block *mem); extern int sparse_add_section(int nid, unsigned long pfn, unsigned long nr_pages, struct vmem_altmap *altmap); extern void sparse_remove_section(struct mem_section *ms, unsigned long pfn, unsigned long nr_pages, unsigned long map_offset, struct vmem_altmap *altmap); extern struct page *sparse_decode_mem_map(unsigned long coded_mem_map, unsigned long pnum); extern struct zone *zone_for_pfn_range(int online_type, int nid, struct memory_group *group, unsigned long start_pfn, unsigned long nr_pages); extern int arch_create_linear_mapping(int nid, u64 start, u64 size, struct mhp_params *params); void arch_remove_linear_mapping(u64 start, u64 size); extern bool mhp_supports_memmap_on_memory(unsigned long size); #endif /* CONFIG_MEMORY_HOTPLUG */ #endif /* __LINUX_MEMORY_HOTPLUG_H */ PK ! f�ar r swiotlb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SWIOTLB_H #define __LINUX_SWIOTLB_H #include <linux/device.h> #include <linux/dma-direction.h> #include <linux/init.h> #include <linux/types.h> #include <linux/limits.h> #include <linux/spinlock.h> struct device; struct page; struct scatterlist; enum swiotlb_force { SWIOTLB_NORMAL, /* Default - depending on HW DMA mask etc. */ SWIOTLB_FORCE, /* swiotlb=force */ SWIOTLB_NO_FORCE, /* swiotlb=noforce */ }; /* * Maximum allowable number of contiguous slabs to map, * must be a power of 2. What is the appropriate value ? * The complexity of {map,unmap}_single is linearly dependent on this value. */ #define IO_TLB_SEGSIZE 128 /* * log of the size of each IO TLB slab. The number of slabs is command line * controllable. */ #define IO_TLB_SHIFT 11 #define IO_TLB_SIZE (1 << IO_TLB_SHIFT) /* default to 64MB */ #define IO_TLB_DEFAULT_SIZE (64UL<<20) extern void swiotlb_init(int verbose); int swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose); unsigned long swiotlb_size_or_default(void); extern int swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs); extern int swiotlb_late_init_with_default_size(size_t default_size); extern void __init swiotlb_update_mem_attributes(void); phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, phys_addr_t phys, size_t mapping_size, size_t alloc_size, unsigned int alloc_aligned_mask, enum dma_data_direction dir, unsigned long attrs); extern void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, size_t mapping_size, enum dma_data_direction dir, unsigned long attrs); void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr, size_t size, enum dma_data_direction dir); void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr, size_t size, enum dma_data_direction dir); dma_addr_t swiotlb_map(struct device *dev, phys_addr_t phys, size_t size, enum dma_data_direction dir, unsigned long attrs); #ifdef CONFIG_SWIOTLB extern enum swiotlb_force swiotlb_force; /** * struct io_tlb_mem - IO TLB Memory Pool Descriptor * * @start: The start address of the swiotlb memory pool. Used to do a quick * range check to see if the memory was in fact allocated by this * API. * @end: The end address of the swiotlb memory pool. Used to do a quick * range check to see if the memory was in fact allocated by this * API. * @nslabs: The number of IO TLB blocks (in groups of 64) between @start and * @end. For default swiotlb, this is command line adjustable via * setup_io_tlb_npages. * @used: The number of used IO TLB block. * @list: The free list describing the number of free entries available * from each index. * @index: The index to start searching in the next round. * @orig_addr: The original address corresponding to a mapped entry. * @alloc_size: Size of the allocated buffer. * @lock: The lock to protect the above data structures in the map and * unmap calls. * @debugfs: The dentry to debugfs. * @late_alloc: %true if allocated using the page allocator * @force_bounce: %true if swiotlb bouncing is forced * @for_alloc: %true if the pool is used for memory allocation */ struct io_tlb_mem { phys_addr_t start; phys_addr_t end; unsigned long nslabs; unsigned long used; unsigned int index; spinlock_t lock; struct dentry *debugfs; bool late_alloc; bool force_bounce; bool for_alloc; struct io_tlb_slot { phys_addr_t orig_addr; size_t alloc_size; unsigned int list; } *slots; }; extern struct io_tlb_mem io_tlb_default_mem; static inline bool is_swiotlb_buffer(struct device *dev, phys_addr_t paddr) { struct io_tlb_mem *mem = dev->dma_io_tlb_mem; return mem && paddr >= mem->start && paddr < mem->end; } static inline bool is_swiotlb_force_bounce(struct device *dev) { struct io_tlb_mem *mem = dev->dma_io_tlb_mem; return mem && mem->force_bounce; } void __init swiotlb_exit(void); unsigned int swiotlb_max_segment(void); size_t swiotlb_max_mapping_size(struct device *dev); bool is_swiotlb_active(struct device *dev); void __init swiotlb_adjust_size(unsigned long size); #else #define swiotlb_force SWIOTLB_NO_FORCE static inline bool is_swiotlb_buffer(struct device *dev, phys_addr_t paddr) { return false; } static inline bool is_swiotlb_force_bounce(struct device *dev) { return false; } static inline void swiotlb_exit(void) { } static inline unsigned int swiotlb_max_segment(void) { return 0; } static inline size_t swiotlb_max_mapping_size(struct device *dev) { return SIZE_MAX; } static inline bool is_swiotlb_active(struct device *dev) { return false; } static inline void swiotlb_adjust_size(unsigned long size) { } #endif /* CONFIG_SWIOTLB */ extern void swiotlb_print_info(void); extern void swiotlb_set_max_segment(unsigned int); #ifdef CONFIG_DMA_RESTRICTED_POOL struct page *swiotlb_alloc(struct device *dev, size_t size); bool swiotlb_free(struct device *dev, struct page *page, size_t size); static inline bool is_swiotlb_for_alloc(struct device *dev) { return dev->dma_io_tlb_mem->for_alloc; } #else static inline struct page *swiotlb_alloc(struct device *dev, size_t size) { return NULL; } static inline bool swiotlb_free(struct device *dev, struct page *page, size_t size) { return false; } static inline bool is_swiotlb_for_alloc(struct device *dev) { return false; } #endif /* CONFIG_DMA_RESTRICTED_POOL */ #endif /* __LINUX_SWIOTLB_H */ PK ! �"�� � kcov.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KCOV_H #define _LINUX_KCOV_H #include <linux/sched.h> #include <uapi/linux/kcov.h> struct task_struct; #ifdef CONFIG_KCOV enum kcov_mode { /* Coverage collection is not enabled yet. */ KCOV_MODE_DISABLED = 0, /* KCOV was initialized, but tracing mode hasn't been chosen yet. */ KCOV_MODE_INIT = 1, /* * Tracing coverage collection mode. * Covered PCs are collected in a per-task buffer. */ KCOV_MODE_TRACE_PC = 2, /* Collecting comparison operands mode. */ KCOV_MODE_TRACE_CMP = 3, /* The process owns a KCOV remote reference. */ KCOV_MODE_REMOTE = 4, }; #define KCOV_IN_CTXSW (1 << 30) void kcov_task_init(struct task_struct *t); void kcov_task_exit(struct task_struct *t); #define kcov_prepare_switch(t) \ do { \ (t)->kcov_mode |= KCOV_IN_CTXSW; \ } while (0) #define kcov_finish_switch(t) \ do { \ (t)->kcov_mode &= ~KCOV_IN_CTXSW; \ } while (0) /* See Documentation/dev-tools/kcov.rst for usage details. */ void kcov_remote_start(u64 handle); void kcov_remote_stop(void); u64 kcov_common_handle(void); static inline void kcov_remote_start_common(u64 id) { kcov_remote_start(kcov_remote_handle(KCOV_SUBSYSTEM_COMMON, id)); } static inline void kcov_remote_start_usb(u64 id) { kcov_remote_start(kcov_remote_handle(KCOV_SUBSYSTEM_USB, id)); } /* * The softirq flavor of kcov_remote_*() functions is introduced as a temporary * work around for kcov's lack of nested remote coverage sections support in * task context. Adding suport for nested sections is tracked in: * https://bugzilla.kernel.org/show_bug.cgi?id=210337 */ static inline void kcov_remote_start_usb_softirq(u64 id) { if (in_serving_softirq()) kcov_remote_start_usb(id); } static inline void kcov_remote_stop_softirq(void) { if (in_serving_softirq()) kcov_remote_stop(); } #else static inline void kcov_task_init(struct task_struct *t) {} static inline void kcov_task_exit(struct task_struct *t) {} static inline void kcov_prepare_switch(struct task_struct *t) {} static inline void kcov_finish_switch(struct task_struct *t) {} static inline void kcov_remote_start(u64 handle) {} static inline void kcov_remote_stop(void) {} static inline u64 kcov_common_handle(void) { return 0; } static inline void kcov_remote_start_common(u64 id) {} static inline void kcov_remote_start_usb(u64 id) {} static inline void kcov_remote_start_usb_softirq(u64 id) {} static inline void kcov_remote_stop_softirq(void) {} #endif /* CONFIG_KCOV */ #endif /* _LINUX_KCOV_H */ PK ! �V� bma150.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2011 Bosch Sensortec GmbH * Copyright (c) 2011 Unixphere */ #ifndef _BMA150_H_ #define _BMA150_H_ #define BMA150_DRIVER "bma150" #define BMA150_RANGE_2G 0 #define BMA150_RANGE_4G 1 #define BMA150_RANGE_8G 2 #define BMA150_BW_25HZ 0 #define BMA150_BW_50HZ 1 #define BMA150_BW_100HZ 2 #define BMA150_BW_190HZ 3 #define BMA150_BW_375HZ 4 #define BMA150_BW_750HZ 5 #define BMA150_BW_1500HZ 6 struct bma150_cfg { bool any_motion_int; /* Set to enable any-motion interrupt */ bool hg_int; /* Set to enable high-G interrupt */ bool lg_int; /* Set to enable low-G interrupt */ unsigned char any_motion_dur; /* Any-motion duration */ unsigned char any_motion_thres; /* Any-motion threshold */ unsigned char hg_hyst; /* High-G hysterisis */ unsigned char hg_dur; /* High-G duration */ unsigned char hg_thres; /* High-G threshold */ unsigned char lg_hyst; /* Low-G hysterisis */ unsigned char lg_dur; /* Low-G duration */ unsigned char lg_thres; /* Low-G threshold */ unsigned char range; /* one of BMA0150_RANGE_xxx */ unsigned char bandwidth; /* one of BMA0150_BW_xxx */ }; struct bma150_platform_data { struct bma150_cfg cfg; int (*irq_gpio_cfg)(void); }; #endif /* _BMA150_H_ */ PK ! WRM�� � rwsem.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* rwsem.h: R/W semaphores, public interface * * Written by David Howells (dhowells@redhat.com). * Derived from asm-i386/semaphore.h */ #ifndef _LINUX_RWSEM_H #define _LINUX_RWSEM_H #include <linux/linkage.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/spinlock.h> #include <linux/atomic.h> #include <linux/err.h> #include <linux/cleanup.h> #ifdef CONFIG_DEBUG_LOCK_ALLOC # define __RWSEM_DEP_MAP_INIT(lockname) \ .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_SLEEP, \ }, #else # define __RWSEM_DEP_MAP_INIT(lockname) #endif #ifndef CONFIG_PREEMPT_RT #ifdef CONFIG_RWSEM_SPIN_ON_OWNER #include <linux/osq_lock.h> #endif /* * For an uncontended rwsem, count and owner are the only fields a task * needs to touch when acquiring the rwsem. So they are put next to each * other to increase the chance that they will share the same cacheline. * * In a contended rwsem, the owner is likely the most frequently accessed * field in the structure as the optimistic waiter that holds the osq lock * will spin on owner. For an embedded rwsem, other hot fields in the * containing structure should be moved further away from the rwsem to * reduce the chance that they will share the same cacheline causing * cacheline bouncing problem. */ struct rw_semaphore { atomic_long_t count; /* * Write owner or one of the read owners as well flags regarding * the current state of the rwsem. Can be used as a speculative * check to see if the write owner is running on the cpu. */ atomic_long_t owner; #ifdef CONFIG_RWSEM_SPIN_ON_OWNER struct optimistic_spin_queue osq; /* spinner MCS lock */ #endif raw_spinlock_t wait_lock; struct list_head wait_list; #ifdef CONFIG_DEBUG_RWSEMS void *magic; #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif }; /* In all implementations count != 0 means locked */ static inline int rwsem_is_locked(struct rw_semaphore *sem) { return atomic_long_read(&sem->count) != 0; } #define RWSEM_UNLOCKED_VALUE 0L #define __RWSEM_COUNT_INIT(name) .count = ATOMIC_LONG_INIT(RWSEM_UNLOCKED_VALUE) /* Common initializer macros and functions */ #ifdef CONFIG_DEBUG_RWSEMS # define __RWSEM_DEBUG_INIT(lockname) .magic = &lockname, #else # define __RWSEM_DEBUG_INIT(lockname) #endif #ifdef CONFIG_RWSEM_SPIN_ON_OWNER #define __RWSEM_OPT_INIT(lockname) .osq = OSQ_LOCK_UNLOCKED, #else #define __RWSEM_OPT_INIT(lockname) #endif #define __RWSEM_INITIALIZER(name) \ { __RWSEM_COUNT_INIT(name), \ .owner = ATOMIC_LONG_INIT(0), \ __RWSEM_OPT_INIT(name) \ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock),\ .wait_list = LIST_HEAD_INIT((name).wait_list), \ __RWSEM_DEBUG_INIT(name) \ __RWSEM_DEP_MAP_INIT(name) } #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) extern void __init_rwsem(struct rw_semaphore *sem, const char *name, struct lock_class_key *key); #define init_rwsem(sem) \ do { \ static struct lock_class_key __key; \ \ __init_rwsem((sem), #sem, &__key); \ } while (0) /* * This is the same regardless of which rwsem implementation that is being used. * It is just a heuristic meant to be called by somebody already holding the * rwsem to see if somebody from an incompatible type is wanting access to the * lock. */ static inline int rwsem_is_contended(struct rw_semaphore *sem) { return !list_empty(&sem->wait_list); } #else /* !CONFIG_PREEMPT_RT */ #include <linux/rwbase_rt.h> struct rw_semaphore { struct rwbase_rt rwbase; #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif }; #define __RWSEM_INITIALIZER(name) \ { \ .rwbase = __RWBASE_INITIALIZER(name), \ __RWSEM_DEP_MAP_INIT(name) \ } #define DECLARE_RWSEM(lockname) \ struct rw_semaphore lockname = __RWSEM_INITIALIZER(lockname) extern void __init_rwsem(struct rw_semaphore *rwsem, const char *name, struct lock_class_key *key); #define init_rwsem(sem) \ do { \ static struct lock_class_key __key; \ \ __init_rwsem((sem), #sem, &__key); \ } while (0) static __always_inline int rwsem_is_locked(struct rw_semaphore *sem) { return rw_base_is_locked(&sem->rwbase); } static __always_inline int rwsem_is_contended(struct rw_semaphore *sem) { return rw_base_is_contended(&sem->rwbase); } #endif /* CONFIG_PREEMPT_RT */ /* * The functions below are the same for all rwsem implementations including * the RT specific variant. */ /* * lock for reading */ extern void down_read(struct rw_semaphore *sem); extern int __must_check down_read_interruptible(struct rw_semaphore *sem); extern int __must_check down_read_killable(struct rw_semaphore *sem); /* * trylock for reading -- returns 1 if successful, 0 if contention */ extern int down_read_trylock(struct rw_semaphore *sem); /* * lock for writing */ extern void down_write(struct rw_semaphore *sem); extern int __must_check down_write_killable(struct rw_semaphore *sem); /* * trylock for writing -- returns 1 if successful, 0 if contention */ extern int down_write_trylock(struct rw_semaphore *sem); /* * release a read lock */ extern void up_read(struct rw_semaphore *sem); /* * release a write lock */ extern void up_write(struct rw_semaphore *sem); DEFINE_GUARD(rwsem_read, struct rw_semaphore *, down_read(_T), up_read(_T)) DEFINE_GUARD(rwsem_write, struct rw_semaphore *, down_write(_T), up_write(_T)) DEFINE_FREE(up_read, struct rw_semaphore *, if (_T) up_read(_T)) DEFINE_FREE(up_write, struct rw_semaphore *, if (_T) up_write(_T)) /* * downgrade write lock to read lock */ extern void downgrade_write(struct rw_semaphore *sem); #ifdef CONFIG_DEBUG_LOCK_ALLOC /* * nested locking. NOTE: rwsems are not allowed to recurse * (which occurs if the same task tries to acquire the same * lock instance multiple times), but multiple locks of the * same lock class might be taken, if the order of the locks * is always the same. This ordering rule can be expressed * to lockdep via the _nested() APIs, but enumerating the * subclasses that are used. (If the nesting relationship is * static then another method for expressing nested locking is * the explicit definition of lock class keys and the use of * lockdep_set_class() at lock initialization time. * See Documentation/locking/lockdep-design.rst for more details.) */ extern void down_read_nested(struct rw_semaphore *sem, int subclass); extern int __must_check down_read_killable_nested(struct rw_semaphore *sem, int subclass); extern void down_write_nested(struct rw_semaphore *sem, int subclass); extern int down_write_killable_nested(struct rw_semaphore *sem, int subclass); extern void _down_write_nest_lock(struct rw_semaphore *sem, struct lockdep_map *nest_lock); # define down_write_nest_lock(sem, nest_lock) \ do { \ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ _down_write_nest_lock(sem, &(nest_lock)->dep_map); \ } while (0); /* * Take/release a lock when not the owner will release it. * * [ This API should be avoided as much as possible - the * proper abstraction for this case is completions. ] */ extern void down_read_non_owner(struct rw_semaphore *sem); extern void up_read_non_owner(struct rw_semaphore *sem); #else # define down_read_nested(sem, subclass) down_read(sem) # define down_read_killable_nested(sem, subclass) down_read_killable(sem) # define down_write_nest_lock(sem, nest_lock) down_write(sem) # define down_write_nested(sem, subclass) down_write(sem) # define down_write_killable_nested(sem, subclass) down_write_killable(sem) # define down_read_non_owner(sem) down_read(sem) # define up_read_non_owner(sem) up_read(sem) #endif #endif /* _LINUX_RWSEM_H */ PK ! �o_��A �A pwm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PWM_H #define __LINUX_PWM_H #include <linux/err.h> #include <linux/mutex.h> #include <linux/of.h> struct pwm_capture; struct seq_file; struct pwm_chip; /** * enum pwm_polarity - polarity of a PWM signal * @PWM_POLARITY_NORMAL: a high signal for the duration of the duty- * cycle, followed by a low signal for the remainder of the pulse * period * @PWM_POLARITY_INVERSED: a low signal for the duration of the duty- * cycle, followed by a high signal for the remainder of the pulse * period */ enum pwm_polarity { PWM_POLARITY_NORMAL, PWM_POLARITY_INVERSED, }; /** * struct pwm_args - board-dependent PWM arguments * @period: reference period * @polarity: reference polarity * * This structure describes board-dependent arguments attached to a PWM * device. These arguments are usually retrieved from the PWM lookup table or * device tree. * * Do not confuse this with the PWM state: PWM arguments represent the initial * configuration that users want to use on this PWM device rather than the * current PWM hardware state. */ struct pwm_args { u64 period; enum pwm_polarity polarity; }; enum { PWMF_REQUESTED = 0, PWMF_EXPORTED = 1, }; /* * struct pwm_state - state of a PWM channel * @period: PWM period (in nanoseconds) * @duty_cycle: PWM duty cycle (in nanoseconds) * @polarity: PWM polarity * @enabled: PWM enabled status * @usage_power: If set, the PWM driver is only required to maintain the power * output but has more freedom regarding signal form. * If supported, the signal can be optimized, for example to * improve EMI by phase shifting individual channels. */ struct pwm_state { u64 period; u64 duty_cycle; enum pwm_polarity polarity; bool enabled; bool usage_power; }; /** * struct pwm_device - PWM channel object * @label: name of the PWM device * @flags: flags associated with the PWM device * @hwpwm: per-chip relative index of the PWM device * @pwm: global index of the PWM device * @chip: PWM chip providing this PWM device * @chip_data: chip-private data associated with the PWM device * @args: PWM arguments * @state: last applied state * @last: last implemented state (for PWM_DEBUG) */ struct pwm_device { const char *label; unsigned long flags; unsigned int hwpwm; unsigned int pwm; struct pwm_chip *chip; void *chip_data; struct pwm_args args; struct pwm_state state; struct pwm_state last; }; /** * pwm_get_state() - retrieve the current PWM state * @pwm: PWM device * @state: state to fill with the current PWM state * * The returned PWM state represents the state that was applied by a previous call to * pwm_apply_state(). Drivers may have to slightly tweak that state before programming it to * hardware. If pwm_apply_state() was never called, this returns either the current hardware * state (if supported) or the default settings. */ static inline void pwm_get_state(const struct pwm_device *pwm, struct pwm_state *state) { *state = pwm->state; } static inline bool pwm_is_enabled(const struct pwm_device *pwm) { struct pwm_state state; pwm_get_state(pwm, &state); return state.enabled; } static inline void pwm_set_period(struct pwm_device *pwm, u64 period) { if (pwm) pwm->state.period = period; } static inline u64 pwm_get_period(const struct pwm_device *pwm) { struct pwm_state state; pwm_get_state(pwm, &state); return state.period; } static inline void pwm_set_duty_cycle(struct pwm_device *pwm, unsigned int duty) { if (pwm) pwm->state.duty_cycle = duty; } static inline u64 pwm_get_duty_cycle(const struct pwm_device *pwm) { struct pwm_state state; pwm_get_state(pwm, &state); return state.duty_cycle; } static inline enum pwm_polarity pwm_get_polarity(const struct pwm_device *pwm) { struct pwm_state state; pwm_get_state(pwm, &state); return state.polarity; } static inline void pwm_get_args(const struct pwm_device *pwm, struct pwm_args *args) { *args = pwm->args; } /** * pwm_init_state() - prepare a new state to be applied with pwm_apply_state() * @pwm: PWM device * @state: state to fill with the prepared PWM state * * This functions prepares a state that can later be tweaked and applied * to the PWM device with pwm_apply_state(). This is a convenient function * that first retrieves the current PWM state and the replaces the period * and polarity fields with the reference values defined in pwm->args. * Once the function returns, you can adjust the ->enabled and ->duty_cycle * fields according to your needs before calling pwm_apply_state(). * * ->duty_cycle is initially set to zero to avoid cases where the current * ->duty_cycle value exceed the pwm_args->period one, which would trigger * an error if the user calls pwm_apply_state() without adjusting ->duty_cycle * first. */ static inline void pwm_init_state(const struct pwm_device *pwm, struct pwm_state *state) { struct pwm_args args; /* First get the current state. */ pwm_get_state(pwm, state); /* Then fill it with the reference config */ pwm_get_args(pwm, &args); state->period = args.period; state->polarity = args.polarity; state->duty_cycle = 0; state->usage_power = false; } /** * pwm_get_relative_duty_cycle() - Get a relative duty cycle value * @state: PWM state to extract the duty cycle from * @scale: target scale of the relative duty cycle * * This functions converts the absolute duty cycle stored in @state (expressed * in nanosecond) into a value relative to the period. * * For example if you want to get the duty_cycle expressed in percent, call: * * pwm_get_state(pwm, &state); * duty = pwm_get_relative_duty_cycle(&state, 100); */ static inline unsigned int pwm_get_relative_duty_cycle(const struct pwm_state *state, unsigned int scale) { if (!state->period) return 0; return DIV_ROUND_CLOSEST_ULL((u64)state->duty_cycle * scale, state->period); } /** * pwm_set_relative_duty_cycle() - Set a relative duty cycle value * @state: PWM state to fill * @duty_cycle: relative duty cycle value * @scale: scale in which @duty_cycle is expressed * * This functions converts a relative into an absolute duty cycle (expressed * in nanoseconds), and puts the result in state->duty_cycle. * * For example if you want to configure a 50% duty cycle, call: * * pwm_init_state(pwm, &state); * pwm_set_relative_duty_cycle(&state, 50, 100); * pwm_apply_state(pwm, &state); * * This functions returns -EINVAL if @duty_cycle and/or @scale are * inconsistent (@scale == 0 or @duty_cycle > @scale). */ static inline int pwm_set_relative_duty_cycle(struct pwm_state *state, unsigned int duty_cycle, unsigned int scale) { if (!scale || duty_cycle > scale) return -EINVAL; state->duty_cycle = DIV_ROUND_CLOSEST_ULL((u64)duty_cycle * state->period, scale); return 0; } /** * struct pwm_ops - PWM controller operations * @request: optional hook for requesting a PWM * @free: optional hook for freeing a PWM * @capture: capture and report PWM signal * @apply: atomically apply a new PWM config * @get_state: get the current PWM state. This function is only * called once per PWM device when the PWM chip is * registered. * @owner: helps prevent removal of modules exporting active PWMs * @config: configure duty cycles and period length for this PWM * @set_polarity: configure the polarity of this PWM * @enable: enable PWM output toggling * @disable: disable PWM output toggling */ struct pwm_ops { int (*request)(struct pwm_chip *chip, struct pwm_device *pwm); void (*free)(struct pwm_chip *chip, struct pwm_device *pwm); int (*capture)(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_capture *result, unsigned long timeout); int (*apply)(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state); void (*get_state)(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state); struct module *owner; /* Only used by legacy drivers */ int (*config)(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns); int (*set_polarity)(struct pwm_chip *chip, struct pwm_device *pwm, enum pwm_polarity polarity); int (*enable)(struct pwm_chip *chip, struct pwm_device *pwm); void (*disable)(struct pwm_chip *chip, struct pwm_device *pwm); }; /** * struct pwm_chip - abstract a PWM controller * @dev: device providing the PWMs * @ops: callbacks for this PWM controller * @base: number of first PWM controlled by this chip * @npwm: number of PWMs controlled by this chip * @of_xlate: request a PWM device given a device tree PWM specifier * @of_pwm_n_cells: number of cells expected in the device tree PWM specifier * @list: list node for internal use * @pwms: array of PWM devices allocated by the framework */ struct pwm_chip { struct device *dev; const struct pwm_ops *ops; int base; unsigned int npwm; struct pwm_device * (*of_xlate)(struct pwm_chip *pc, const struct of_phandle_args *args); unsigned int of_pwm_n_cells; /* only used internally by the PWM framework */ struct list_head list; struct pwm_device *pwms; }; /** * struct pwm_capture - PWM capture data * @period: period of the PWM signal (in nanoseconds) * @duty_cycle: duty cycle of the PWM signal (in nanoseconds) */ struct pwm_capture { unsigned int period; unsigned int duty_cycle; }; #if IS_ENABLED(CONFIG_PWM) /* PWM user APIs */ struct pwm_device *pwm_request(int pwm_id, const char *label); void pwm_free(struct pwm_device *pwm); int pwm_apply_state(struct pwm_device *pwm, const struct pwm_state *state); int pwm_adjust_config(struct pwm_device *pwm); /** * pwm_config() - change a PWM device configuration * @pwm: PWM device * @duty_ns: "on" time (in nanoseconds) * @period_ns: duration (in nanoseconds) of one cycle * * Returns: 0 on success or a negative error code on failure. */ static inline int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) { struct pwm_state state; if (!pwm) return -EINVAL; if (duty_ns < 0 || period_ns < 0) return -EINVAL; pwm_get_state(pwm, &state); if (state.duty_cycle == duty_ns && state.period == period_ns) return 0; state.duty_cycle = duty_ns; state.period = period_ns; return pwm_apply_state(pwm, &state); } /** * pwm_enable() - start a PWM output toggling * @pwm: PWM device * * Returns: 0 on success or a negative error code on failure. */ static inline int pwm_enable(struct pwm_device *pwm) { struct pwm_state state; if (!pwm) return -EINVAL; pwm_get_state(pwm, &state); if (state.enabled) return 0; state.enabled = true; return pwm_apply_state(pwm, &state); } /** * pwm_disable() - stop a PWM output toggling * @pwm: PWM device */ static inline void pwm_disable(struct pwm_device *pwm) { struct pwm_state state; if (!pwm) return; pwm_get_state(pwm, &state); if (!state.enabled) return; state.enabled = false; pwm_apply_state(pwm, &state); } /* PWM provider APIs */ int pwm_capture(struct pwm_device *pwm, struct pwm_capture *result, unsigned long timeout); int pwm_set_chip_data(struct pwm_device *pwm, void *data); void *pwm_get_chip_data(struct pwm_device *pwm); int pwmchip_add(struct pwm_chip *chip); void pwmchip_remove(struct pwm_chip *chip); int devm_pwmchip_add(struct device *dev, struct pwm_chip *chip); struct pwm_device *pwm_request_from_chip(struct pwm_chip *chip, unsigned int index, const char *label); struct pwm_device *of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct of_phandle_args *args); struct pwm_device *pwm_get(struct device *dev, const char *con_id); struct pwm_device *of_pwm_get(struct device *dev, struct device_node *np, const char *con_id); void pwm_put(struct pwm_device *pwm); struct pwm_device *devm_pwm_get(struct device *dev, const char *con_id); struct pwm_device *devm_of_pwm_get(struct device *dev, struct device_node *np, const char *con_id); struct pwm_device *devm_fwnode_pwm_get(struct device *dev, struct fwnode_handle *fwnode, const char *con_id); #else static inline struct pwm_device *pwm_request(int pwm_id, const char *label) { return ERR_PTR(-ENODEV); } static inline void pwm_free(struct pwm_device *pwm) { } static inline int pwm_apply_state(struct pwm_device *pwm, const struct pwm_state *state) { return -ENOTSUPP; } static inline int pwm_adjust_config(struct pwm_device *pwm) { return -ENOTSUPP; } static inline int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) { return -EINVAL; } static inline int pwm_capture(struct pwm_device *pwm, struct pwm_capture *result, unsigned long timeout) { return -EINVAL; } static inline int pwm_enable(struct pwm_device *pwm) { return -EINVAL; } static inline void pwm_disable(struct pwm_device *pwm) { } static inline int pwm_set_chip_data(struct pwm_device *pwm, void *data) { return -EINVAL; } static inline void *pwm_get_chip_data(struct pwm_device *pwm) { return NULL; } static inline int pwmchip_add(struct pwm_chip *chip) { return -EINVAL; } static inline int pwmchip_remove(struct pwm_chip *chip) { return -EINVAL; } static inline int devm_pwmchip_add(struct device *dev, struct pwm_chip *chip) { return -EINVAL; } static inline struct pwm_device *pwm_request_from_chip(struct pwm_chip *chip, unsigned int index, const char *label) { return ERR_PTR(-ENODEV); } static inline struct pwm_device *pwm_get(struct device *dev, const char *consumer) { return ERR_PTR(-ENODEV); } static inline struct pwm_device *of_pwm_get(struct device *dev, struct device_node *np, const char *con_id) { return ERR_PTR(-ENODEV); } static inline void pwm_put(struct pwm_device *pwm) { } static inline struct pwm_device *devm_pwm_get(struct device *dev, const char *consumer) { return ERR_PTR(-ENODEV); } static inline struct pwm_device *devm_of_pwm_get(struct device *dev, struct device_node *np, const char *con_id) { return ERR_PTR(-ENODEV); } static inline struct pwm_device * devm_fwnode_pwm_get(struct device *dev, struct fwnode_handle *fwnode, const char *con_id) { return ERR_PTR(-ENODEV); } #endif static inline void pwm_apply_args(struct pwm_device *pwm) { struct pwm_state state = { }; /* * PWM users calling pwm_apply_args() expect to have a fresh config * where the polarity and period are set according to pwm_args info. * The problem is, polarity can only be changed when the PWM is * disabled. * * PWM drivers supporting hardware readout may declare the PWM device * as enabled, and prevent polarity setting, which changes from the * existing behavior, where all PWM devices are declared as disabled * at startup (even if they are actually enabled), thus authorizing * polarity setting. * * To fulfill this requirement, we apply a new state which disables * the PWM device and set the reference period and polarity config. * * Note that PWM users requiring a smooth handover between the * bootloader and the kernel (like critical regulators controlled by * PWM devices) will have to switch to the atomic API and avoid calling * pwm_apply_args(). */ state.enabled = false; state.polarity = pwm->args.polarity; state.period = pwm->args.period; state.usage_power = false; pwm_apply_state(pwm, &state); } struct pwm_lookup { struct list_head list; const char *provider; unsigned int index; const char *dev_id; const char *con_id; unsigned int period; enum pwm_polarity polarity; const char *module; /* optional, may be NULL */ }; #define PWM_LOOKUP_WITH_MODULE(_provider, _index, _dev_id, _con_id, \ _period, _polarity, _module) \ { \ .provider = _provider, \ .index = _index, \ .dev_id = _dev_id, \ .con_id = _con_id, \ .period = _period, \ .polarity = _polarity, \ .module = _module, \ } #define PWM_LOOKUP(_provider, _index, _dev_id, _con_id, _period, _polarity) \ PWM_LOOKUP_WITH_MODULE(_provider, _index, _dev_id, _con_id, _period, \ _polarity, NULL) #if IS_ENABLED(CONFIG_PWM) void pwm_add_table(struct pwm_lookup *table, size_t num); void pwm_remove_table(struct pwm_lookup *table, size_t num); #else static inline void pwm_add_table(struct pwm_lookup *table, size_t num) { } static inline void pwm_remove_table(struct pwm_lookup *table, size_t num) { } #endif #ifdef CONFIG_PWM_SYSFS void pwmchip_sysfs_export(struct pwm_chip *chip); void pwmchip_sysfs_unexport(struct pwm_chip *chip); #else static inline void pwmchip_sysfs_export(struct pwm_chip *chip) { } static inline void pwmchip_sysfs_unexport(struct pwm_chip *chip) { } #endif /* CONFIG_PWM_SYSFS */ #endif /* __LINUX_PWM_H */ PK ! |�D��Q �Q bpf_verifier.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com */ #ifndef _LINUX_BPF_VERIFIER_H #define _LINUX_BPF_VERIFIER_H 1 #include <linux/bpf.h> /* for enum bpf_reg_type */ #include <linux/btf.h> /* for struct btf and btf_id() */ #include <linux/filter.h> /* for MAX_BPF_STACK */ #include <linux/tnum.h> /* Maximum variable offset umax_value permitted when resolving memory accesses. * In practice this is far bigger than any realistic pointer offset; this limit * ensures that umax_value + (int)off + (int)size cannot overflow a u64. */ #define BPF_MAX_VAR_OFF (1 << 29) /* Maximum variable size permitted for ARG_CONST_SIZE[_OR_ZERO]. This ensures * that converting umax_value to int cannot overflow. */ #define BPF_MAX_VAR_SIZ (1 << 29) /* size of type_str_buf in bpf_verifier. */ #define TYPE_STR_BUF_LEN 64 /* Liveness marks, used for registers and spilled-regs (in stack slots). * Read marks propagate upwards until they find a write mark; they record that * "one of this state's descendants read this reg" (and therefore the reg is * relevant for states_equal() checks). * Write marks collect downwards and do not propagate; they record that "the * straight-line code that reached this state (from its parent) wrote this reg" * (and therefore that reads propagated from this state or its descendants * should not propagate to its parent). * A state with a write mark can receive read marks; it just won't propagate * them to its parent, since the write mark is a property, not of the state, * but of the link between it and its parent. See mark_reg_read() and * mark_stack_slot_read() in kernel/bpf/verifier.c. */ enum bpf_reg_liveness { REG_LIVE_NONE = 0, /* reg hasn't been read or written this branch */ REG_LIVE_READ32 = 0x1, /* reg was read, so we're sensitive to initial value */ REG_LIVE_READ64 = 0x2, /* likewise, but full 64-bit content matters */ REG_LIVE_READ = REG_LIVE_READ32 | REG_LIVE_READ64, REG_LIVE_WRITTEN = 0x4, /* reg was written first, screening off later reads */ REG_LIVE_DONE = 0x8, /* liveness won't be updating this register anymore */ }; struct bpf_reg_state { /* Ordering of fields matters. See states_equal() */ enum bpf_reg_type type; /* Fixed part of pointer offset, pointer types only */ s32 off; union { /* valid when type == PTR_TO_PACKET */ int range; /* valid when type == CONST_PTR_TO_MAP | PTR_TO_MAP_VALUE | * PTR_TO_MAP_VALUE_OR_NULL */ struct { struct bpf_map *map_ptr; /* To distinguish map lookups from outer map * the map_uid is non-zero for registers * pointing to inner maps. */ u32 map_uid; }; /* for PTR_TO_BTF_ID */ struct { struct btf *btf; u32 btf_id; }; u32 mem_size; /* for PTR_TO_MEM | PTR_TO_MEM_OR_NULL */ /* Max size from any of the above. */ struct { unsigned long raw1; unsigned long raw2; } raw; u32 subprogno; /* for PTR_TO_FUNC */ }; /* For PTR_TO_PACKET, used to find other pointers with the same variable * offset, so they can share range knowledge. * For PTR_TO_MAP_VALUE_OR_NULL this is used to share which map value we * came from, when one is tested for != NULL. * For PTR_TO_MEM_OR_NULL this is used to identify memory allocation * for the purpose of tracking that it's freed. * For PTR_TO_SOCKET this is used to share which pointers retain the * same reference to the socket, to determine proper reference freeing. */ u32 id; /* PTR_TO_SOCKET and PTR_TO_TCP_SOCK could be a ptr returned * from a pointer-cast helper, bpf_sk_fullsock() and * bpf_tcp_sock(). * * Consider the following where "sk" is a reference counted * pointer returned from "sk = bpf_sk_lookup_tcp();": * * 1: sk = bpf_sk_lookup_tcp(); * 2: if (!sk) { return 0; } * 3: fullsock = bpf_sk_fullsock(sk); * 4: if (!fullsock) { bpf_sk_release(sk); return 0; } * 5: tp = bpf_tcp_sock(fullsock); * 6: if (!tp) { bpf_sk_release(sk); return 0; } * 7: bpf_sk_release(sk); * 8: snd_cwnd = tp->snd_cwnd; // verifier will complain * * After bpf_sk_release(sk) at line 7, both "fullsock" ptr and * "tp" ptr should be invalidated also. In order to do that, * the reg holding "fullsock" and "sk" need to remember * the original refcounted ptr id (i.e. sk_reg->id) in ref_obj_id * such that the verifier can reset all regs which have * ref_obj_id matching the sk_reg->id. * * sk_reg->ref_obj_id is set to sk_reg->id at line 1. * sk_reg->id will stay as NULL-marking purpose only. * After NULL-marking is done, sk_reg->id can be reset to 0. * * After "fullsock = bpf_sk_fullsock(sk);" at line 3, * fullsock_reg->ref_obj_id is set to sk_reg->ref_obj_id. * * After "tp = bpf_tcp_sock(fullsock);" at line 5, * tp_reg->ref_obj_id is set to fullsock_reg->ref_obj_id * which is the same as sk_reg->ref_obj_id. * * From the verifier perspective, if sk, fullsock and tp * are not NULL, they are the same ptr with different * reg->type. In particular, bpf_sk_release(tp) is also * allowed and has the same effect as bpf_sk_release(sk). */ u32 ref_obj_id; /* For scalar types (SCALAR_VALUE), this represents our knowledge of * the actual value. * For pointer types, this represents the variable part of the offset * from the pointed-to object, and is shared with all bpf_reg_states * with the same id as us. */ struct tnum var_off; /* Used to determine if any memory access using this register will * result in a bad access. * These refer to the same value as var_off, not necessarily the actual * contents of the register. */ s64 smin_value; /* minimum possible (s64)value */ s64 smax_value; /* maximum possible (s64)value */ u64 umin_value; /* minimum possible (u64)value */ u64 umax_value; /* maximum possible (u64)value */ s32 s32_min_value; /* minimum possible (s32)value */ s32 s32_max_value; /* maximum possible (s32)value */ u32 u32_min_value; /* minimum possible (u32)value */ u32 u32_max_value; /* maximum possible (u32)value */ /* parentage chain for liveness checking */ struct bpf_reg_state *parent; /* Inside the callee two registers can be both PTR_TO_STACK like * R1=fp-8 and R2=fp-8, but one of them points to this function stack * while another to the caller's stack. To differentiate them 'frameno' * is used which is an index in bpf_verifier_state->frame[] array * pointing to bpf_func_state. */ u32 frameno; /* Tracks subreg definition. The stored value is the insn_idx of the * writing insn. This is safe because subreg_def is used before any insn * patching which only happens after main verification finished. */ s32 subreg_def; enum bpf_reg_liveness live; /* if (!precise && SCALAR_VALUE) min/max/tnum don't affect safety */ bool precise; }; enum bpf_stack_slot_type { STACK_INVALID, /* nothing was stored in this stack slot */ STACK_SPILL, /* register spilled into stack */ STACK_MISC, /* BPF program wrote some data into this slot */ STACK_ZERO, /* BPF program wrote constant zero */ }; #define BPF_REG_SIZE 8 /* size of eBPF register in bytes */ struct bpf_stack_state { struct bpf_reg_state spilled_ptr; u8 slot_type[BPF_REG_SIZE]; }; struct bpf_reference_state { /* Track each reference created with a unique id, even if the same * instruction creates the reference multiple times (eg, via CALL). */ int id; /* Instruction where the allocation of this reference occurred. This * is used purely to inform the user of a reference leak. */ int insn_idx; /* There can be a case like: * main (frame 0) * cb (frame 1) * func (frame 3) * cb (frame 4) * Hence for frame 4, if callback_ref just stored boolean, it would be * impossible to distinguish nested callback refs. Hence store the * frameno and compare that to callback_ref in check_reference_leak when * exiting a callback function. */ int callback_ref; }; /* state of the program: * type of all registers and stack info */ struct bpf_func_state { struct bpf_reg_state regs[MAX_BPF_REG]; /* index of call instruction that called into this func */ int callsite; /* stack frame number of this function state from pov of * enclosing bpf_verifier_state. * 0 = main function, 1 = first callee. */ u32 frameno; /* subprog number == index within subprog_info * zero == main subprog */ u32 subprogno; /* Every bpf_timer_start will increment async_entry_cnt. * It's used to distinguish: * void foo(void) { for(;;); } * void foo(void) { bpf_timer_set_callback(,foo); } */ u32 async_entry_cnt; bool in_callback_fn; bool in_async_callback_fn; /* The following fields should be last. See copy_func_state() */ int acquired_refs; struct bpf_reference_state *refs; int allocated_stack; struct bpf_stack_state *stack; }; struct bpf_idx_pair { u32 prev_idx; u32 idx; }; struct bpf_id_pair { u32 old; u32 cur; }; /* Maximum number of register states that can exist at once */ #define BPF_ID_MAP_SIZE (MAX_BPF_REG + MAX_BPF_STACK / BPF_REG_SIZE) #define MAX_CALL_FRAMES 8 struct bpf_verifier_state { /* call stack tracking */ struct bpf_func_state *frame[MAX_CALL_FRAMES]; struct bpf_verifier_state *parent; /* * 'branches' field is the number of branches left to explore: * 0 - all possible paths from this state reached bpf_exit or * were safely pruned * 1 - at least one path is being explored. * This state hasn't reached bpf_exit * 2 - at least two paths are being explored. * This state is an immediate parent of two children. * One is fallthrough branch with branches==1 and another * state is pushed into stack (to be explored later) also with * branches==1. The parent of this state has branches==1. * The verifier state tree connected via 'parent' pointer looks like: * 1 * 1 * 2 -> 1 (first 'if' pushed into stack) * 1 * 2 -> 1 (second 'if' pushed into stack) * 1 * 1 * 1 bpf_exit. * * Once do_check() reaches bpf_exit, it calls update_branch_counts() * and the verifier state tree will look: * 1 * 1 * 2 -> 1 (first 'if' pushed into stack) * 1 * 1 -> 1 (second 'if' pushed into stack) * 0 * 0 * 0 bpf_exit. * After pop_stack() the do_check() will resume at second 'if'. * * If is_state_visited() sees a state with branches > 0 it means * there is a loop. If such state is exactly equal to the current state * it's an infinite loop. Note states_equal() checks for states * equvalency, so two states being 'states_equal' does not mean * infinite loop. The exact comparison is provided by * states_maybe_looping() function. It's a stronger pre-check and * much faster than states_equal(). * * This algorithm may not find all possible infinite loops or * loop iteration count may be too high. * In such cases BPF_COMPLEXITY_LIMIT_INSNS limit kicks in. */ u32 branches; u32 insn_idx; u32 curframe; u32 active_spin_lock; bool speculative; /* first and last insn idx of this verifier state */ u32 first_insn_idx; u32 last_insn_idx; /* jmp history recorded from first to last. * backtracking is using it to go from last to first. * For most states jmp_history_cnt is [0-3]. * For loops can go up to ~40. */ struct bpf_idx_pair *jmp_history; u32 jmp_history_cnt; }; #define bpf_get_spilled_reg(slot, frame) \ (((slot < frame->allocated_stack / BPF_REG_SIZE) && \ (frame->stack[slot].slot_type[0] == STACK_SPILL)) \ ? &frame->stack[slot].spilled_ptr : NULL) /* Iterate over 'frame', setting 'reg' to either NULL or a spilled register. */ #define bpf_for_each_spilled_reg(iter, frame, reg) \ for (iter = 0, reg = bpf_get_spilled_reg(iter, frame); \ iter < frame->allocated_stack / BPF_REG_SIZE; \ iter++, reg = bpf_get_spilled_reg(iter, frame)) /* Invoke __expr over regsiters in __vst, setting __state and __reg */ #define bpf_for_each_reg_in_vstate(__vst, __state, __reg, __expr) \ ({ \ struct bpf_verifier_state *___vstate = __vst; \ int ___i, ___j; \ for (___i = 0; ___i <= ___vstate->curframe; ___i++) { \ struct bpf_reg_state *___regs; \ __state = ___vstate->frame[___i]; \ ___regs = __state->regs; \ for (___j = 0; ___j < MAX_BPF_REG; ___j++) { \ __reg = &___regs[___j]; \ (void)(__expr); \ } \ bpf_for_each_spilled_reg(___j, __state, __reg) { \ if (!__reg) \ continue; \ (void)(__expr); \ } \ } \ }) /* linked list of verifier states used to prune search */ struct bpf_verifier_state_list { struct bpf_verifier_state state; struct bpf_verifier_state_list *next; int miss_cnt, hit_cnt; }; /* Possible states for alu_state member. */ #define BPF_ALU_SANITIZE_SRC (1U << 0) #define BPF_ALU_SANITIZE_DST (1U << 1) #define BPF_ALU_NEG_VALUE (1U << 2) #define BPF_ALU_NON_POINTER (1U << 3) #define BPF_ALU_IMMEDIATE (1U << 4) #define BPF_ALU_SANITIZE (BPF_ALU_SANITIZE_SRC | \ BPF_ALU_SANITIZE_DST) struct bpf_insn_aux_data { union { enum bpf_reg_type ptr_type; /* pointer type for load/store insns */ unsigned long map_ptr_state; /* pointer/poison value for maps */ s32 call_imm; /* saved imm field of call insn */ u32 alu_limit; /* limit for add/sub register with pointer */ struct { u32 map_index; /* index into used_maps[] */ u32 map_off; /* offset from value base address */ }; struct { enum bpf_reg_type reg_type; /* type of pseudo_btf_id */ union { struct { struct btf *btf; u32 btf_id; /* btf_id for struct typed var */ }; u32 mem_size; /* mem_size for non-struct typed var */ }; } btf_var; }; u64 map_key_state; /* constant (32 bit) key tracking for maps */ int ctx_field_size; /* the ctx field size for load insn, maybe 0 */ u32 seen; /* this insn was processed by the verifier at env->pass_cnt */ bool sanitize_stack_spill; /* subject to Spectre v4 sanitation */ bool zext_dst; /* this insn zero extends dst reg */ u8 alu_state; /* used in combination with alu_limit */ /* below fields are initialized once */ unsigned int orig_idx; /* original instruction index */ bool prune_point; }; #define MAX_USED_MAPS 64 /* max number of maps accessed by one eBPF program */ #define MAX_USED_BTFS 64 /* max number of BTFs accessed by one BPF program */ #define BPF_VERIFIER_TMP_LOG_SIZE 1024 struct bpf_verifier_log { u32 level; char kbuf[BPF_VERIFIER_TMP_LOG_SIZE]; char __user *ubuf; u32 len_used; u32 len_total; }; static inline bool bpf_verifier_log_full(const struct bpf_verifier_log *log) { return log->len_used >= log->len_total - 1; } #define BPF_LOG_LEVEL1 1 #define BPF_LOG_LEVEL2 2 #define BPF_LOG_STATS 4 #define BPF_LOG_LEVEL (BPF_LOG_LEVEL1 | BPF_LOG_LEVEL2) #define BPF_LOG_MASK (BPF_LOG_LEVEL | BPF_LOG_STATS) #define BPF_LOG_KERNEL (BPF_LOG_MASK + 1) /* kernel internal flag */ static inline bool bpf_verifier_log_needed(const struct bpf_verifier_log *log) { return log && ((log->level && log->ubuf && !bpf_verifier_log_full(log)) || log->level == BPF_LOG_KERNEL); } static inline bool bpf_verifier_log_attr_valid(const struct bpf_verifier_log *log) { return log->len_total >= 128 && log->len_total <= UINT_MAX >> 2 && log->level && log->ubuf && !(log->level & ~BPF_LOG_MASK); } #define BPF_MAX_SUBPROGS 256 struct bpf_subprog_info { /* 'start' has to be the first field otherwise find_subprog() won't work */ u32 start; /* insn idx of function entry point */ u32 linfo_idx; /* The idx to the main_prog->aux->linfo */ u16 stack_depth; /* max. stack depth used by this function */ bool has_tail_call; bool tail_call_reachable; bool has_ld_abs; bool is_async_cb; }; /* single container for all structs * one verifier_env per bpf_check() call */ struct bpf_verifier_env { u32 insn_idx; u32 prev_insn_idx; struct bpf_prog *prog; /* eBPF program being verified */ const struct bpf_verifier_ops *ops; struct bpf_verifier_stack_elem *head; /* stack of verifier states to be processed */ int stack_size; /* number of states to be processed */ bool strict_alignment; /* perform strict pointer alignment checks */ bool test_state_freq; /* test verifier with different pruning frequency */ struct bpf_verifier_state *cur_state; /* current verifier state */ struct bpf_verifier_state_list **explored_states; /* search pruning optimization */ struct bpf_verifier_state_list *free_list; struct bpf_map *used_maps[MAX_USED_MAPS]; /* array of map's used by eBPF program */ struct btf_mod_pair used_btfs[MAX_USED_BTFS]; /* array of BTF's used by BPF program */ u32 used_map_cnt; /* number of used maps */ u32 used_btf_cnt; /* number of used BTF objects */ u32 id_gen; /* used to generate unique reg IDs */ bool explore_alu_limits; bool allow_ptr_leaks; bool allow_uninit_stack; bool allow_ptr_to_map_access; bool bpf_capable; bool bypass_spec_v1; bool bypass_spec_v4; bool seen_direct_write; struct bpf_insn_aux_data *insn_aux_data; /* array of per-insn state */ const struct bpf_line_info *prev_linfo; struct bpf_verifier_log log; struct bpf_subprog_info subprog_info[BPF_MAX_SUBPROGS + 1]; struct bpf_id_pair idmap_scratch[BPF_ID_MAP_SIZE]; struct { int *insn_state; int *insn_stack; int cur_stack; } cfg; u32 pass_cnt; /* number of times do_check() was called */ u32 subprog_cnt; /* number of instructions analyzed by the verifier */ u32 prev_insn_processed, insn_processed; /* number of jmps, calls, exits analyzed so far */ u32 prev_jmps_processed, jmps_processed; /* total verification time */ u64 verification_time; /* maximum number of verifier states kept in 'branching' instructions */ u32 max_states_per_insn; /* total number of allocated verifier states */ u32 total_states; /* some states are freed during program analysis. * this is peak number of states. this number dominates kernel * memory consumption during verification */ u32 peak_states; /* longest register parentage chain walked for liveness marking */ u32 longest_mark_read_walk; bpfptr_t fd_array; /* buffer used in reg_type_str() to generate reg_type string */ char type_str_buf[TYPE_STR_BUF_LEN]; }; __printf(2, 0) void bpf_verifier_vlog(struct bpf_verifier_log *log, const char *fmt, va_list args); __printf(2, 3) void bpf_verifier_log_write(struct bpf_verifier_env *env, const char *fmt, ...); __printf(2, 3) void bpf_log(struct bpf_verifier_log *log, const char *fmt, ...); static inline struct bpf_func_state *cur_func(struct bpf_verifier_env *env) { struct bpf_verifier_state *cur = env->cur_state; return cur->frame[cur->curframe]; } static inline struct bpf_reg_state *cur_regs(struct bpf_verifier_env *env) { return cur_func(env)->regs; } int bpf_prog_offload_verifier_prep(struct bpf_prog *prog); int bpf_prog_offload_verify_insn(struct bpf_verifier_env *env, int insn_idx, int prev_insn_idx); int bpf_prog_offload_finalize(struct bpf_verifier_env *env); void bpf_prog_offload_replace_insn(struct bpf_verifier_env *env, u32 off, struct bpf_insn *insn); void bpf_prog_offload_remove_insns(struct bpf_verifier_env *env, u32 off, u32 cnt); int check_ptr_off_reg(struct bpf_verifier_env *env, const struct bpf_reg_state *reg, int regno); int check_mem_reg(struct bpf_verifier_env *env, struct bpf_reg_state *reg, u32 regno, u32 mem_size); /* this lives here instead of in bpf.h because it needs to dereference tgt_prog */ static inline u64 bpf_trampoline_compute_key(const struct bpf_prog *tgt_prog, struct btf *btf, u32 btf_id) { if (tgt_prog) return ((u64)tgt_prog->aux->id << 32) | btf_id; else return ((u64)btf_obj_id(btf) << 32) | 0x80000000 | btf_id; } /* unpack the IDs from the key as constructed above */ static inline void bpf_trampoline_unpack_key(u64 key, u32 *obj_id, u32 *btf_id) { if (obj_id) *obj_id = key >> 32; if (btf_id) *btf_id = key & 0x7FFFFFFF; } int bpf_check_attach_target(struct bpf_verifier_log *log, const struct bpf_prog *prog, const struct bpf_prog *tgt_prog, u32 btf_id, struct bpf_attach_target_info *tgt_info); #define BPF_BASE_TYPE_MASK GENMASK(BPF_BASE_TYPE_BITS - 1, 0) /* extract base type from bpf_{arg, return, reg}_type. */ static inline u32 base_type(u32 type) { return type & BPF_BASE_TYPE_MASK; } /* extract flags from an extended type. See bpf_type_flag in bpf.h. */ static inline u32 type_flag(u32 type) { return type & ~BPF_BASE_TYPE_MASK; } #endif /* _LINUX_BPF_VERIFIER_H */ PK ! �, �� � mnt_idmapping.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MNT_IDMAPPING_H #define _LINUX_MNT_IDMAPPING_H #include <linux/types.h> #include <linux/uidgid.h> struct user_namespace; /* * Carries the initial idmapping of 0:0:4294967295 which is an identity * mapping. This means that {g,u}id 0 is mapped to {g,u}id 0, {g,u}id 1 is * mapped to {g,u}id 1, [...], {g,u}id 1000 to {g,u}id 1000, [...]. */ extern struct user_namespace init_user_ns; /** * initial_idmapping - check whether this is the initial mapping * @ns: idmapping to check * * Check whether this is the initial mapping, mapping 0 to 0, 1 to 1, * [...], 1000 to 1000 [...]. * * Return: true if this is the initial mapping, false if not. */ static inline bool initial_idmapping(const struct user_namespace *ns) { return ns == &init_user_ns; } /** * no_idmapping - check whether we can skip remapping a kuid/gid * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * * This function can be used to check whether a remapping between two * idmappings is required. * An idmapped mount is a mount that has an idmapping attached to it that * is different from the filsystem's idmapping and the initial idmapping. * If the initial mapping is used or the idmapping of the mount and the * filesystem are identical no remapping is required. * * Return: true if remapping can be skipped, false if not. */ static inline bool no_idmapping(const struct user_namespace *mnt_userns, const struct user_namespace *fs_userns) { return initial_idmapping(mnt_userns) || mnt_userns == fs_userns; } /** * mapped_kuid_fs - map a filesystem kuid into a mnt_userns * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * @kuid : kuid to be mapped * * Take a @kuid and remap it from @fs_userns into @mnt_userns. Use this * function when preparing a @kuid to be reported to userspace. * * If no_idmapping() determines that this is not an idmapped mount we can * simply return @kuid unchanged. * If initial_idmapping() tells us that the filesystem is not mounted with an * idmapping we know the value of @kuid won't change when calling * from_kuid() so we can simply retrieve the value via __kuid_val() * directly. * * Return: @kuid mapped according to @mnt_userns. * If @kuid has no mapping in either @mnt_userns or @fs_userns INVALID_UID is * returned. */ static inline kuid_t mapped_kuid_fs(struct user_namespace *mnt_userns, struct user_namespace *fs_userns, kuid_t kuid) { uid_t uid; if (no_idmapping(mnt_userns, fs_userns)) return kuid; if (initial_idmapping(fs_userns)) uid = __kuid_val(kuid); else uid = from_kuid(fs_userns, kuid); if (uid == (uid_t)-1) return INVALID_UID; return make_kuid(mnt_userns, uid); } /** * mapped_kgid_fs - map a filesystem kgid into a mnt_userns * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * @kgid : kgid to be mapped * * Take a @kgid and remap it from @fs_userns into @mnt_userns. Use this * function when preparing a @kgid to be reported to userspace. * * If no_idmapping() determines that this is not an idmapped mount we can * simply return @kgid unchanged. * If initial_idmapping() tells us that the filesystem is not mounted with an * idmapping we know the value of @kgid won't change when calling * from_kgid() so we can simply retrieve the value via __kgid_val() * directly. * * Return: @kgid mapped according to @mnt_userns. * If @kgid has no mapping in either @mnt_userns or @fs_userns INVALID_GID is * returned. */ static inline kgid_t mapped_kgid_fs(struct user_namespace *mnt_userns, struct user_namespace *fs_userns, kgid_t kgid) { gid_t gid; if (no_idmapping(mnt_userns, fs_userns)) return kgid; if (initial_idmapping(fs_userns)) gid = __kgid_val(kgid); else gid = from_kgid(fs_userns, kgid); if (gid == (gid_t)-1) return INVALID_GID; return make_kgid(mnt_userns, gid); } /** * mapped_kuid_user - map a user kuid into a mnt_userns * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * @kuid : kuid to be mapped * * Use the idmapping of @mnt_userns to remap a @kuid into @fs_userns. Use this * function when preparing a @kuid to be written to disk or inode. * * If no_idmapping() determines that this is not an idmapped mount we can * simply return @kuid unchanged. * If initial_idmapping() tells us that the filesystem is not mounted with an * idmapping we know the value of @kuid won't change when calling * make_kuid() so we can simply retrieve the value via KUIDT_INIT() * directly. * * Return: @kuid mapped according to @mnt_userns. * If @kuid has no mapping in either @mnt_userns or @fs_userns INVALID_UID is * returned. */ static inline kuid_t mapped_kuid_user(struct user_namespace *mnt_userns, struct user_namespace *fs_userns, kuid_t kuid) { uid_t uid; if (no_idmapping(mnt_userns, fs_userns)) return kuid; uid = from_kuid(mnt_userns, kuid); if (uid == (uid_t)-1) return INVALID_UID; if (initial_idmapping(fs_userns)) return KUIDT_INIT(uid); return make_kuid(fs_userns, uid); } /** * mapped_kgid_user - map a user kgid into a mnt_userns * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * @kgid : kgid to be mapped * * Use the idmapping of @mnt_userns to remap a @kgid into @fs_userns. Use this * function when preparing a @kgid to be written to disk or inode. * * If no_idmapping() determines that this is not an idmapped mount we can * simply return @kgid unchanged. * If initial_idmapping() tells us that the filesystem is not mounted with an * idmapping we know the value of @kgid won't change when calling * make_kgid() so we can simply retrieve the value via KGIDT_INIT() * directly. * * Return: @kgid mapped according to @mnt_userns. * If @kgid has no mapping in either @mnt_userns or @fs_userns INVALID_GID is * returned. */ static inline kgid_t mapped_kgid_user(struct user_namespace *mnt_userns, struct user_namespace *fs_userns, kgid_t kgid) { gid_t gid; if (no_idmapping(mnt_userns, fs_userns)) return kgid; gid = from_kgid(mnt_userns, kgid); if (gid == (gid_t)-1) return INVALID_GID; if (initial_idmapping(fs_userns)) return KGIDT_INIT(gid); return make_kgid(fs_userns, gid); } /** * mapped_fsuid - return caller's fsuid mapped up into a mnt_userns * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * * Use this helper to initialize a new vfs or filesystem object based on * the caller's fsuid. A common example is initializing the i_uid field of * a newly allocated inode triggered by a creation event such as mkdir or * O_CREAT. Other examples include the allocation of quotas for a specific * user. * * Return: the caller's current fsuid mapped up according to @mnt_userns. */ static inline kuid_t mapped_fsuid(struct user_namespace *mnt_userns, struct user_namespace *fs_userns) { return mapped_kuid_user(mnt_userns, fs_userns, current_fsuid()); } /** * mapped_fsgid - return caller's fsgid mapped up into a mnt_userns * @mnt_userns: the mount's idmapping * @fs_userns: the filesystem's idmapping * * Use this helper to initialize a new vfs or filesystem object based on * the caller's fsgid. A common example is initializing the i_gid field of * a newly allocated inode triggered by a creation event such as mkdir or * O_CREAT. Other examples include the allocation of quotas for a specific * user. * * Return: the caller's current fsgid mapped up according to @mnt_userns. */ static inline kgid_t mapped_fsgid(struct user_namespace *mnt_userns, struct user_namespace *fs_userns) { return mapped_kgid_user(mnt_userns, fs_userns, current_fsgid()); } #endif /* _LINUX_MNT_IDMAPPING_H */ PK ! �� sm501.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* include/linux/sm501.h * * Copyright (c) 2006 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * Vincent Sanders <vince@simtec.co.uk> */ extern int sm501_unit_power(struct device *dev, unsigned int unit, unsigned int to); extern unsigned long sm501_set_clock(struct device *dev, int clksrc, unsigned long freq); extern unsigned long sm501_find_clock(struct device *dev, int clksrc, unsigned long req_freq); /* sm501_misc_control * * Modify the SM501's MISC_CONTROL register */ extern int sm501_misc_control(struct device *dev, unsigned long set, unsigned long clear); /* sm501_modify_reg * * Modify a register in the SM501 which may be shared with other * drivers. */ extern unsigned long sm501_modify_reg(struct device *dev, unsigned long reg, unsigned long set, unsigned long clear); /* Platform data definitions */ #define SM501FB_FLAG_USE_INIT_MODE (1<<0) #define SM501FB_FLAG_DISABLE_AT_EXIT (1<<1) #define SM501FB_FLAG_USE_HWCURSOR (1<<2) #define SM501FB_FLAG_USE_HWACCEL (1<<3) #define SM501FB_FLAG_PANEL_NO_FPEN (1<<4) #define SM501FB_FLAG_PANEL_NO_VBIASEN (1<<5) #define SM501FB_FLAG_PANEL_INV_FPEN (1<<6) #define SM501FB_FLAG_PANEL_INV_VBIASEN (1<<7) struct sm501_platdata_fbsub { struct fb_videomode *def_mode; unsigned int def_bpp; unsigned long max_mem; unsigned int flags; }; enum sm501_fb_routing { SM501_FB_OWN = 0, /* CRT=>CRT, Panel=>Panel */ SM501_FB_CRT_PANEL = 1, /* Panel=>CRT, Panel=>Panel */ }; /* sm501_platdata_fb flag field bit definitions */ #define SM501_FBPD_SWAP_FB_ENDIAN (1<<0) /* need to endian swap */ /* sm501_platdata_fb * * configuration data for the framebuffer driver */ struct sm501_platdata_fb { enum sm501_fb_routing fb_route; unsigned int flags; struct sm501_platdata_fbsub *fb_crt; struct sm501_platdata_fbsub *fb_pnl; }; /* gpio i2c * * Note, we have to pass in the bus number, as the number used will be * passed to the i2c-gpio driver's platform_device.id, subsequently used * to register the i2c bus. */ struct sm501_platdata_gpio_i2c { unsigned int bus_num; unsigned int pin_sda; unsigned int pin_scl; int udelay; int timeout; }; /* sm501_initdata * * use for initialising values that may not have been setup * before the driver is loaded. */ struct sm501_reg_init { unsigned long set; unsigned long mask; }; #define SM501_USE_USB_HOST (1<<0) #define SM501_USE_USB_SLAVE (1<<1) #define SM501_USE_SSP0 (1<<2) #define SM501_USE_SSP1 (1<<3) #define SM501_USE_UART0 (1<<4) #define SM501_USE_UART1 (1<<5) #define SM501_USE_FBACCEL (1<<6) #define SM501_USE_AC97 (1<<7) #define SM501_USE_I2S (1<<8) #define SM501_USE_GPIO (1<<9) #define SM501_USE_ALL (0xffffffff) struct sm501_initdata { struct sm501_reg_init gpio_low; struct sm501_reg_init gpio_high; struct sm501_reg_init misc_timing; struct sm501_reg_init misc_control; unsigned long devices; unsigned long mclk; /* non-zero to modify */ unsigned long m1xclk; /* non-zero to modify */ }; /* sm501_init_gpio * * default gpio settings */ struct sm501_init_gpio { struct sm501_reg_init gpio_data_low; struct sm501_reg_init gpio_data_high; struct sm501_reg_init gpio_ddr_low; struct sm501_reg_init gpio_ddr_high; }; #define SM501_FLAG_SUSPEND_OFF (1<<4) /* sm501_platdata * * This is passed with the platform device to allow the board * to control the behaviour of the SM501 driver(s) which attach * to the device. * */ struct sm501_platdata { struct sm501_initdata *init; struct sm501_init_gpio *init_gpiop; struct sm501_platdata_fb *fb; int flags; int gpio_base; int (*get_power)(struct device *dev); int (*set_power)(struct device *dev, unsigned int on); struct sm501_platdata_gpio_i2c *gpio_i2c; unsigned int gpio_i2c_nr; }; #if defined(CONFIG_PPC32) #define smc501_readl(addr) ioread32be((addr)) #define smc501_writel(val, addr) iowrite32be((val), (addr)) #else #define smc501_readl(addr) readl(addr) #define smc501_writel(val, addr) writel(val, addr) #endif PK ! �� � numa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_NUMA_H #define _LINUX_NUMA_H #include <linux/types.h> #ifdef CONFIG_NODES_SHIFT #define NODES_SHIFT CONFIG_NODES_SHIFT #else #define NODES_SHIFT 0 #endif #define MAX_NUMNODES (1 << NODES_SHIFT) #define NUMA_NO_NODE (-1) /* optionally keep NUMA memory info available post init */ #ifdef CONFIG_NUMA_KEEP_MEMINFO #define __initdata_or_meminfo #else #define __initdata_or_meminfo __initdata #endif #ifdef CONFIG_NUMA #include <linux/printk.h> #include <asm/sparsemem.h> /* Generic implementation available */ int numa_map_to_online_node(int node); #ifndef memory_add_physaddr_to_nid static inline int memory_add_physaddr_to_nid(u64 start) { pr_info_once("Unknown online node for memory at 0x%llx, assuming node 0\n", start); return 0; } #endif #ifndef phys_to_target_node static inline int phys_to_target_node(u64 start) { pr_info_once("Unknown target node for memory at 0x%llx, assuming node 0\n", start); return 0; } #endif #else /* !CONFIG_NUMA */ static inline int numa_map_to_online_node(int node) { return NUMA_NO_NODE; } static inline int memory_add_physaddr_to_nid(u64 start) { return 0; } static inline int phys_to_target_node(u64 start) { return 0; } #endif #endif /* _LINUX_NUMA_H */ PK ! ��-� � joystick.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 1996-2000 Vojtech Pavlik * * Sponsored by SuSE */ /* */ #ifndef _LINUX_JOYSTICK_H #define _LINUX_JOYSTICK_H #include <uapi/linux/joystick.h> #if BITS_PER_LONG == 64 #define JS_DATA_SAVE_TYPE JS_DATA_SAVE_TYPE_64 #elif BITS_PER_LONG == 32 #define JS_DATA_SAVE_TYPE JS_DATA_SAVE_TYPE_32 #else #error Unexpected BITS_PER_LONG #endif #endif /* _LINUX_JOYSTICK_H */ PK ! (�˚�b �b mmu_notifier.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MMU_NOTIFIER_H #define _LINUX_MMU_NOTIFIER_H #include <linux/list.h> #include <linux/spinlock.h> #include <linux/mm_types.h> #include <linux/mmap_lock.h> #include <linux/srcu.h> #include <linux/interval_tree.h> struct mmu_notifier_subscriptions; struct mmu_notifier; struct mmu_notifier_range; struct mmu_interval_notifier; /** * enum mmu_notifier_event - reason for the mmu notifier callback * @MMU_NOTIFY_UNMAP: either munmap() that unmap the range or a mremap() that * move the range * * @MMU_NOTIFY_CLEAR: clear page table entry (many reasons for this like * madvise() or replacing a page by another one, ...). * * @MMU_NOTIFY_PROTECTION_VMA: update is due to protection change for the range * ie using the vma access permission (vm_page_prot) to update the whole range * is enough no need to inspect changes to the CPU page table (mprotect() * syscall) * * @MMU_NOTIFY_PROTECTION_PAGE: update is due to change in read/write flag for * pages in the range so to mirror those changes the user must inspect the CPU * page table (from the end callback). * * @MMU_NOTIFY_SOFT_DIRTY: soft dirty accounting (still same page and same * access flags). User should soft dirty the page in the end callback to make * sure that anyone relying on soft dirtiness catch pages that might be written * through non CPU mappings. * * @MMU_NOTIFY_RELEASE: used during mmu_interval_notifier invalidate to signal * that the mm refcount is zero and the range is no longer accessible. * * @MMU_NOTIFY_MIGRATE: used during migrate_vma_collect() invalidate to signal * a device driver to possibly ignore the invalidation if the * owner field matches the driver's device private pgmap owner. * * @MMU_NOTIFY_EXCLUSIVE: to signal a device driver that the device will no * longer have exclusive access to the page. When sent during creation of an * exclusive range the owner will be initialised to the value provided by the * caller of make_device_exclusive_range(), otherwise the owner will be NULL. */ enum mmu_notifier_event { MMU_NOTIFY_UNMAP = 0, MMU_NOTIFY_CLEAR, MMU_NOTIFY_PROTECTION_VMA, MMU_NOTIFY_PROTECTION_PAGE, MMU_NOTIFY_SOFT_DIRTY, MMU_NOTIFY_RELEASE, MMU_NOTIFY_MIGRATE, MMU_NOTIFY_EXCLUSIVE, }; #define MMU_NOTIFIER_RANGE_BLOCKABLE (1 << 0) struct mmu_notifier_ops { /* * Called either by mmu_notifier_unregister or when the mm is * being destroyed by exit_mmap, always before all pages are * freed. This can run concurrently with other mmu notifier * methods (the ones invoked outside the mm context) and it * should tear down all secondary mmu mappings and freeze the * secondary mmu. If this method isn't implemented you've to * be sure that nothing could possibly write to the pages * through the secondary mmu by the time the last thread with * tsk->mm == mm exits. * * As side note: the pages freed after ->release returns could * be immediately reallocated by the gart at an alias physical * address with a different cache model, so if ->release isn't * implemented because all _software_ driven memory accesses * through the secondary mmu are terminated by the time the * last thread of this mm quits, you've also to be sure that * speculative _hardware_ operations can't allocate dirty * cachelines in the cpu that could not be snooped and made * coherent with the other read and write operations happening * through the gart alias address, so leading to memory * corruption. */ void (*release)(struct mmu_notifier *subscription, struct mm_struct *mm); /* * clear_flush_young is called after the VM is * test-and-clearing the young/accessed bitflag in the * pte. This way the VM will provide proper aging to the * accesses to the page through the secondary MMUs and not * only to the ones through the Linux pte. * Start-end is necessary in case the secondary MMU is mapping the page * at a smaller granularity than the primary MMU. */ int (*clear_flush_young)(struct mmu_notifier *subscription, struct mm_struct *mm, unsigned long start, unsigned long end); /* * clear_young is a lightweight version of clear_flush_young. Like the * latter, it is supposed to test-and-clear the young/accessed bitflag * in the secondary pte, but it may omit flushing the secondary tlb. */ int (*clear_young)(struct mmu_notifier *subscription, struct mm_struct *mm, unsigned long start, unsigned long end); /* * test_young is called to check the young/accessed bitflag in * the secondary pte. This is used to know if the page is * frequently used without actually clearing the flag or tearing * down the secondary mapping on the page. */ int (*test_young)(struct mmu_notifier *subscription, struct mm_struct *mm, unsigned long address); /* * change_pte is called in cases that pte mapping to page is changed: * for example, when ksm remaps pte to point to a new shared page. */ void (*change_pte)(struct mmu_notifier *subscription, struct mm_struct *mm, unsigned long address, pte_t pte); /* * invalidate_range_start() and invalidate_range_end() must be * paired and are called only when the mmap_lock and/or the * locks protecting the reverse maps are held. If the subsystem * can't guarantee that no additional references are taken to * the pages in the range, it has to implement the * invalidate_range() notifier to remove any references taken * after invalidate_range_start(). * * Invalidation of multiple concurrent ranges may be * optionally permitted by the driver. Either way the * establishment of sptes is forbidden in the range passed to * invalidate_range_begin/end for the whole duration of the * invalidate_range_begin/end critical section. * * invalidate_range_start() is called when all pages in the * range are still mapped and have at least a refcount of one. * * invalidate_range_end() is called when all pages in the * range have been unmapped and the pages have been freed by * the VM. * * The VM will remove the page table entries and potentially * the page between invalidate_range_start() and * invalidate_range_end(). If the page must not be freed * because of pending I/O or other circumstances then the * invalidate_range_start() callback (or the initial mapping * by the driver) must make sure that the refcount is kept * elevated. * * If the driver increases the refcount when the pages are * initially mapped into an address space then either * invalidate_range_start() or invalidate_range_end() may * decrease the refcount. If the refcount is decreased on * invalidate_range_start() then the VM can free pages as page * table entries are removed. If the refcount is only * dropped on invalidate_range_end() then the driver itself * will drop the last refcount but it must take care to flush * any secondary tlb before doing the final free on the * page. Pages will no longer be referenced by the linux * address space but may still be referenced by sptes until * the last refcount is dropped. * * If blockable argument is set to false then the callback cannot * sleep and has to return with -EAGAIN if sleeping would be required. * 0 should be returned otherwise. Please note that notifiers that can * fail invalidate_range_start are not allowed to implement * invalidate_range_end, as there is no mechanism for informing the * notifier that its start failed. */ int (*invalidate_range_start)(struct mmu_notifier *subscription, const struct mmu_notifier_range *range); void (*invalidate_range_end)(struct mmu_notifier *subscription, const struct mmu_notifier_range *range); /* * invalidate_range() is either called between * invalidate_range_start() and invalidate_range_end() when the * VM has to free pages that where unmapped, but before the * pages are actually freed, or outside of _start()/_end() when * a (remote) TLB is necessary. * * If invalidate_range() is used to manage a non-CPU TLB with * shared page-tables, it not necessary to implement the * invalidate_range_start()/end() notifiers, as * invalidate_range() already catches the points in time when an * external TLB range needs to be flushed. For more in depth * discussion on this see Documentation/vm/mmu_notifier.rst * * Note that this function might be called with just a sub-range * of what was passed to invalidate_range_start()/end(), if * called between those functions. */ void (*invalidate_range)(struct mmu_notifier *subscription, struct mm_struct *mm, unsigned long start, unsigned long end); /* * These callbacks are used with the get/put interface to manage the * lifetime of the mmu_notifier memory. alloc_notifier() returns a new * notifier for use with the mm. * * free_notifier() is only called after the mmu_notifier has been * fully put, calls to any ops callback are prevented and no ops * callbacks are currently running. It is called from a SRCU callback * and cannot sleep. */ struct mmu_notifier *(*alloc_notifier)(struct mm_struct *mm); void (*free_notifier)(struct mmu_notifier *subscription); }; /* * The notifier chains are protected by mmap_lock and/or the reverse map * semaphores. Notifier chains are only changed when all reverse maps and * the mmap_lock locks are taken. * * Therefore notifier chains can only be traversed when either * * 1. mmap_lock is held. * 2. One of the reverse map locks is held (i_mmap_rwsem or anon_vma->rwsem). * 3. No other concurrent thread can access the list (release) */ struct mmu_notifier { struct hlist_node hlist; const struct mmu_notifier_ops *ops; struct mm_struct *mm; struct rcu_head rcu; unsigned int users; }; /** * struct mmu_interval_notifier_ops * @invalidate: Upon return the caller must stop using any SPTEs within this * range. This function can sleep. Return false only if sleeping * was required but mmu_notifier_range_blockable(range) is false. */ struct mmu_interval_notifier_ops { bool (*invalidate)(struct mmu_interval_notifier *interval_sub, const struct mmu_notifier_range *range, unsigned long cur_seq); }; struct mmu_interval_notifier { struct interval_tree_node interval_tree; const struct mmu_interval_notifier_ops *ops; struct mm_struct *mm; struct hlist_node deferred_item; unsigned long invalidate_seq; }; #ifdef CONFIG_MMU_NOTIFIER #ifdef CONFIG_LOCKDEP extern struct lockdep_map __mmu_notifier_invalidate_range_start_map; #endif struct mmu_notifier_range { struct vm_area_struct *vma; struct mm_struct *mm; unsigned long start; unsigned long end; unsigned flags; enum mmu_notifier_event event; void *owner; }; static inline int mm_has_notifiers(struct mm_struct *mm) { return unlikely(mm->notifier_subscriptions); } struct mmu_notifier *mmu_notifier_get_locked(const struct mmu_notifier_ops *ops, struct mm_struct *mm); static inline struct mmu_notifier * mmu_notifier_get(const struct mmu_notifier_ops *ops, struct mm_struct *mm) { struct mmu_notifier *ret; mmap_write_lock(mm); ret = mmu_notifier_get_locked(ops, mm); mmap_write_unlock(mm); return ret; } void mmu_notifier_put(struct mmu_notifier *subscription); void mmu_notifier_synchronize(void); extern int mmu_notifier_register(struct mmu_notifier *subscription, struct mm_struct *mm); extern int __mmu_notifier_register(struct mmu_notifier *subscription, struct mm_struct *mm); extern void mmu_notifier_unregister(struct mmu_notifier *subscription, struct mm_struct *mm); unsigned long mmu_interval_read_begin(struct mmu_interval_notifier *interval_sub); int mmu_interval_notifier_insert(struct mmu_interval_notifier *interval_sub, struct mm_struct *mm, unsigned long start, unsigned long length, const struct mmu_interval_notifier_ops *ops); int mmu_interval_notifier_insert_locked( struct mmu_interval_notifier *interval_sub, struct mm_struct *mm, unsigned long start, unsigned long length, const struct mmu_interval_notifier_ops *ops); void mmu_interval_notifier_remove(struct mmu_interval_notifier *interval_sub); /** * mmu_interval_set_seq - Save the invalidation sequence * @interval_sub - The subscription passed to invalidate * @cur_seq - The cur_seq passed to the invalidate() callback * * This must be called unconditionally from the invalidate callback of a * struct mmu_interval_notifier_ops under the same lock that is used to call * mmu_interval_read_retry(). It updates the sequence number for later use by * mmu_interval_read_retry(). The provided cur_seq will always be odd. * * If the caller does not call mmu_interval_read_begin() or * mmu_interval_read_retry() then this call is not required. */ static inline void mmu_interval_set_seq(struct mmu_interval_notifier *interval_sub, unsigned long cur_seq) { WRITE_ONCE(interval_sub->invalidate_seq, cur_seq); } /** * mmu_interval_read_retry - End a read side critical section against a VA range * interval_sub: The subscription * seq: The return of the paired mmu_interval_read_begin() * * This MUST be called under a user provided lock that is also held * unconditionally by op->invalidate() when it calls mmu_interval_set_seq(). * * Each call should be paired with a single mmu_interval_read_begin() and * should be used to conclude the read side. * * Returns true if an invalidation collided with this critical section, and * the caller should retry. */ static inline bool mmu_interval_read_retry(struct mmu_interval_notifier *interval_sub, unsigned long seq) { return interval_sub->invalidate_seq != seq; } /** * mmu_interval_check_retry - Test if a collision has occurred * interval_sub: The subscription * seq: The return of the matching mmu_interval_read_begin() * * This can be used in the critical section between mmu_interval_read_begin() * and mmu_interval_read_retry(). A return of true indicates an invalidation * has collided with this critical region and a future * mmu_interval_read_retry() will return true. * * False is not reliable and only suggests a collision may not have * occurred. It can be called many times and does not have to hold the user * provided lock. * * This call can be used as part of loops and other expensive operations to * expedite a retry. */ static inline bool mmu_interval_check_retry(struct mmu_interval_notifier *interval_sub, unsigned long seq) { /* Pairs with the WRITE_ONCE in mmu_interval_set_seq() */ return READ_ONCE(interval_sub->invalidate_seq) != seq; } extern void __mmu_notifier_subscriptions_destroy(struct mm_struct *mm); extern void __mmu_notifier_release(struct mm_struct *mm); extern int __mmu_notifier_clear_flush_young(struct mm_struct *mm, unsigned long start, unsigned long end); extern int __mmu_notifier_clear_young(struct mm_struct *mm, unsigned long start, unsigned long end); extern int __mmu_notifier_test_young(struct mm_struct *mm, unsigned long address); extern void __mmu_notifier_change_pte(struct mm_struct *mm, unsigned long address, pte_t pte); extern int __mmu_notifier_invalidate_range_start(struct mmu_notifier_range *r); extern void __mmu_notifier_invalidate_range_end(struct mmu_notifier_range *r, bool only_end); extern void __mmu_notifier_invalidate_range(struct mm_struct *mm, unsigned long start, unsigned long end); extern bool mmu_notifier_range_update_to_read_only(const struct mmu_notifier_range *range); static inline bool mmu_notifier_range_blockable(const struct mmu_notifier_range *range) { return (range->flags & MMU_NOTIFIER_RANGE_BLOCKABLE); } static inline void mmu_notifier_release(struct mm_struct *mm) { if (mm_has_notifiers(mm)) __mmu_notifier_release(mm); } static inline int mmu_notifier_clear_flush_young(struct mm_struct *mm, unsigned long start, unsigned long end) { if (mm_has_notifiers(mm)) return __mmu_notifier_clear_flush_young(mm, start, end); return 0; } static inline int mmu_notifier_clear_young(struct mm_struct *mm, unsigned long start, unsigned long end) { if (mm_has_notifiers(mm)) return __mmu_notifier_clear_young(mm, start, end); return 0; } static inline int mmu_notifier_test_young(struct mm_struct *mm, unsigned long address) { if (mm_has_notifiers(mm)) return __mmu_notifier_test_young(mm, address); return 0; } static inline void mmu_notifier_change_pte(struct mm_struct *mm, unsigned long address, pte_t pte) { if (mm_has_notifiers(mm)) __mmu_notifier_change_pte(mm, address, pte); } static inline void mmu_notifier_invalidate_range_start(struct mmu_notifier_range *range) { might_sleep(); lock_map_acquire(&__mmu_notifier_invalidate_range_start_map); if (mm_has_notifiers(range->mm)) { range->flags |= MMU_NOTIFIER_RANGE_BLOCKABLE; __mmu_notifier_invalidate_range_start(range); } lock_map_release(&__mmu_notifier_invalidate_range_start_map); } static inline int mmu_notifier_invalidate_range_start_nonblock(struct mmu_notifier_range *range) { int ret = 0; lock_map_acquire(&__mmu_notifier_invalidate_range_start_map); if (mm_has_notifiers(range->mm)) { range->flags &= ~MMU_NOTIFIER_RANGE_BLOCKABLE; ret = __mmu_notifier_invalidate_range_start(range); } lock_map_release(&__mmu_notifier_invalidate_range_start_map); return ret; } static inline void mmu_notifier_invalidate_range_end(struct mmu_notifier_range *range) { if (mmu_notifier_range_blockable(range)) might_sleep(); if (mm_has_notifiers(range->mm)) __mmu_notifier_invalidate_range_end(range, false); } static inline void mmu_notifier_invalidate_range_only_end(struct mmu_notifier_range *range) { if (mm_has_notifiers(range->mm)) __mmu_notifier_invalidate_range_end(range, true); } static inline void mmu_notifier_invalidate_range(struct mm_struct *mm, unsigned long start, unsigned long end) { if (mm_has_notifiers(mm)) __mmu_notifier_invalidate_range(mm, start, end); } static inline void mmu_notifier_subscriptions_init(struct mm_struct *mm) { mm->notifier_subscriptions = NULL; } static inline void mmu_notifier_subscriptions_destroy(struct mm_struct *mm) { if (mm_has_notifiers(mm)) __mmu_notifier_subscriptions_destroy(mm); } static inline void mmu_notifier_range_init(struct mmu_notifier_range *range, enum mmu_notifier_event event, unsigned flags, struct vm_area_struct *vma, struct mm_struct *mm, unsigned long start, unsigned long end) { range->vma = vma; range->event = event; range->mm = mm; range->start = start; range->end = end; range->flags = flags; } static inline void mmu_notifier_range_init_owner( struct mmu_notifier_range *range, enum mmu_notifier_event event, unsigned int flags, struct vm_area_struct *vma, struct mm_struct *mm, unsigned long start, unsigned long end, void *owner) { mmu_notifier_range_init(range, event, flags, vma, mm, start, end); range->owner = owner; } #define ptep_clear_flush_young_notify(__vma, __address, __ptep) \ ({ \ int __young; \ struct vm_area_struct *___vma = __vma; \ unsigned long ___address = __address; \ __young = ptep_clear_flush_young(___vma, ___address, __ptep); \ __young |= mmu_notifier_clear_flush_young(___vma->vm_mm, \ ___address, \ ___address + \ PAGE_SIZE); \ __young; \ }) #define pmdp_clear_flush_young_notify(__vma, __address, __pmdp) \ ({ \ int __young; \ struct vm_area_struct *___vma = __vma; \ unsigned long ___address = __address; \ __young = pmdp_clear_flush_young(___vma, ___address, __pmdp); \ __young |= mmu_notifier_clear_flush_young(___vma->vm_mm, \ ___address, \ ___address + \ PMD_SIZE); \ __young; \ }) #define ptep_clear_young_notify(__vma, __address, __ptep) \ ({ \ int __young; \ struct vm_area_struct *___vma = __vma; \ unsigned long ___address = __address; \ __young = ptep_test_and_clear_young(___vma, ___address, __ptep);\ __young |= mmu_notifier_clear_young(___vma->vm_mm, ___address, \ ___address + PAGE_SIZE); \ __young; \ }) #define pmdp_clear_young_notify(__vma, __address, __pmdp) \ ({ \ int __young; \ struct vm_area_struct *___vma = __vma; \ unsigned long ___address = __address; \ __young = pmdp_test_and_clear_young(___vma, ___address, __pmdp);\ __young |= mmu_notifier_clear_young(___vma->vm_mm, ___address, \ ___address + PMD_SIZE); \ __young; \ }) #define ptep_clear_flush_notify(__vma, __address, __ptep) \ ({ \ unsigned long ___addr = __address & PAGE_MASK; \ struct mm_struct *___mm = (__vma)->vm_mm; \ pte_t ___pte; \ \ ___pte = ptep_clear_flush(__vma, __address, __ptep); \ mmu_notifier_invalidate_range(___mm, ___addr, \ ___addr + PAGE_SIZE); \ \ ___pte; \ }) #define pmdp_huge_clear_flush_notify(__vma, __haddr, __pmd) \ ({ \ unsigned long ___haddr = __haddr & HPAGE_PMD_MASK; \ struct mm_struct *___mm = (__vma)->vm_mm; \ pmd_t ___pmd; \ \ ___pmd = pmdp_huge_clear_flush(__vma, __haddr, __pmd); \ mmu_notifier_invalidate_range(___mm, ___haddr, \ ___haddr + HPAGE_PMD_SIZE); \ \ ___pmd; \ }) #define pudp_huge_clear_flush_notify(__vma, __haddr, __pud) \ ({ \ unsigned long ___haddr = __haddr & HPAGE_PUD_MASK; \ struct mm_struct *___mm = (__vma)->vm_mm; \ pud_t ___pud; \ \ ___pud = pudp_huge_clear_flush(__vma, __haddr, __pud); \ mmu_notifier_invalidate_range(___mm, ___haddr, \ ___haddr + HPAGE_PUD_SIZE); \ \ ___pud; \ }) /* * set_pte_at_notify() sets the pte _after_ running the notifier. * This is safe to start by updating the secondary MMUs, because the primary MMU * pte invalidate must have already happened with a ptep_clear_flush() before * set_pte_at_notify() has been invoked. Updating the secondary MMUs first is * required when we change both the protection of the mapping from read-only to * read-write and the pfn (like during copy on write page faults). Otherwise the * old page would remain mapped readonly in the secondary MMUs after the new * page is already writable by some CPU through the primary MMU. */ #define set_pte_at_notify(__mm, __address, __ptep, __pte) \ ({ \ struct mm_struct *___mm = __mm; \ unsigned long ___address = __address; \ pte_t ___pte = __pte; \ \ mmu_notifier_change_pte(___mm, ___address, ___pte); \ set_pte_at(___mm, ___address, __ptep, ___pte); \ }) #else /* CONFIG_MMU_NOTIFIER */ struct mmu_notifier_range { unsigned long start; unsigned long end; }; static inline void _mmu_notifier_range_init(struct mmu_notifier_range *range, unsigned long start, unsigned long end) { range->start = start; range->end = end; } #define mmu_notifier_range_init(range,event,flags,vma,mm,start,end) \ _mmu_notifier_range_init(range, start, end) #define mmu_notifier_range_init_owner(range, event, flags, vma, mm, start, \ end, owner) \ _mmu_notifier_range_init(range, start, end) static inline bool mmu_notifier_range_blockable(const struct mmu_notifier_range *range) { return true; } static inline int mm_has_notifiers(struct mm_struct *mm) { return 0; } static inline void mmu_notifier_release(struct mm_struct *mm) { } static inline int mmu_notifier_clear_flush_young(struct mm_struct *mm, unsigned long start, unsigned long end) { return 0; } static inline int mmu_notifier_test_young(struct mm_struct *mm, unsigned long address) { return 0; } static inline void mmu_notifier_change_pte(struct mm_struct *mm, unsigned long address, pte_t pte) { } static inline void mmu_notifier_invalidate_range_start(struct mmu_notifier_range *range) { } static inline int mmu_notifier_invalidate_range_start_nonblock(struct mmu_notifier_range *range) { return 0; } static inline void mmu_notifier_invalidate_range_end(struct mmu_notifier_range *range) { } static inline void mmu_notifier_invalidate_range_only_end(struct mmu_notifier_range *range) { } static inline void mmu_notifier_invalidate_range(struct mm_struct *mm, unsigned long start, unsigned long end) { } static inline void mmu_notifier_subscriptions_init(struct mm_struct *mm) { } static inline void mmu_notifier_subscriptions_destroy(struct mm_struct *mm) { } #define mmu_notifier_range_update_to_read_only(r) false #define ptep_clear_flush_young_notify ptep_clear_flush_young #define pmdp_clear_flush_young_notify pmdp_clear_flush_young #define ptep_clear_young_notify ptep_test_and_clear_young #define pmdp_clear_young_notify pmdp_test_and_clear_young #define ptep_clear_flush_notify ptep_clear_flush #define pmdp_huge_clear_flush_notify pmdp_huge_clear_flush #define pudp_huge_clear_flush_notify pudp_huge_clear_flush #define set_pte_at_notify set_pte_at static inline void mmu_notifier_synchronize(void) { } #endif /* CONFIG_MMU_NOTIFIER */ #endif /* _LINUX_MMU_NOTIFIER_H */ PK ! �Kg�/ �/ backing-dev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/backing-dev.h * * low-level device information and state which is propagated up through * to high-level code. */ #ifndef _LINUX_BACKING_DEV_H #define _LINUX_BACKING_DEV_H #include <linux/kernel.h> #include <linux/fs.h> #include <linux/sched.h> #include <linux/blkdev.h> #include <linux/device.h> #include <linux/writeback.h> #include <linux/blk-cgroup.h> #include <linux/backing-dev-defs.h> #include <linux/slab.h> static inline struct backing_dev_info *bdi_get(struct backing_dev_info *bdi) { kref_get(&bdi->refcnt); return bdi; } struct backing_dev_info *bdi_get_by_id(u64 id); void bdi_put(struct backing_dev_info *bdi); __printf(2, 3) int bdi_register(struct backing_dev_info *bdi, const char *fmt, ...); __printf(2, 0) int bdi_register_va(struct backing_dev_info *bdi, const char *fmt, va_list args); void bdi_set_owner(struct backing_dev_info *bdi, struct device *owner); void bdi_unregister(struct backing_dev_info *bdi); struct backing_dev_info *bdi_alloc(int node_id); void wb_start_background_writeback(struct bdi_writeback *wb); void wb_workfn(struct work_struct *work); void wb_wakeup_delayed(struct bdi_writeback *wb); void wb_wait_for_completion(struct wb_completion *done); extern spinlock_t bdi_lock; extern struct list_head bdi_list; extern struct workqueue_struct *bdi_wq; extern struct workqueue_struct *bdi_async_bio_wq; static inline bool wb_has_dirty_io(struct bdi_writeback *wb) { return test_bit(WB_has_dirty_io, &wb->state); } static inline bool bdi_has_dirty_io(struct backing_dev_info *bdi) { /* * @bdi->tot_write_bandwidth is guaranteed to be > 0 if there are * any dirty wbs. See wb_update_write_bandwidth(). */ return atomic_long_read(&bdi->tot_write_bandwidth); } static inline void __add_wb_stat(struct bdi_writeback *wb, enum wb_stat_item item, s64 amount) { percpu_counter_add_batch(&wb->stat[item], amount, WB_STAT_BATCH); } static inline void inc_wb_stat(struct bdi_writeback *wb, enum wb_stat_item item) { __add_wb_stat(wb, item, 1); } static inline void dec_wb_stat(struct bdi_writeback *wb, enum wb_stat_item item) { __add_wb_stat(wb, item, -1); } static inline s64 wb_stat(struct bdi_writeback *wb, enum wb_stat_item item) { return percpu_counter_read_positive(&wb->stat[item]); } static inline s64 wb_stat_sum(struct bdi_writeback *wb, enum wb_stat_item item) { return percpu_counter_sum_positive(&wb->stat[item]); } extern void wb_writeout_inc(struct bdi_writeback *wb); /* * maximal error of a stat counter. */ static inline unsigned long wb_stat_error(void) { #ifdef CONFIG_SMP return nr_cpu_ids * WB_STAT_BATCH; #else return 1; #endif } int bdi_set_min_ratio(struct backing_dev_info *bdi, unsigned int min_ratio); int bdi_set_max_ratio(struct backing_dev_info *bdi, unsigned int max_ratio); /* * Flags in backing_dev_info::capability * * BDI_CAP_WRITEBACK: Supports dirty page writeback, and dirty pages * should contribute to accounting * BDI_CAP_WRITEBACK_ACCT: Automatically account writeback pages * BDI_CAP_STRICTLIMIT: Keep number of dirty pages below bdi threshold */ #define BDI_CAP_WRITEBACK (1 << 0) #define BDI_CAP_WRITEBACK_ACCT (1 << 1) #define BDI_CAP_STRICTLIMIT (1 << 2) extern struct backing_dev_info noop_backing_dev_info; int bdi_init(struct backing_dev_info *bdi); /** * writeback_in_progress - determine whether there is writeback in progress * @wb: bdi_writeback of interest * * Determine whether there is writeback waiting to be handled against a * bdi_writeback. */ static inline bool writeback_in_progress(struct bdi_writeback *wb) { return test_bit(WB_writeback_running, &wb->state); } static inline struct backing_dev_info *inode_to_bdi(struct inode *inode) { struct super_block *sb; if (!inode) return &noop_backing_dev_info; sb = inode->i_sb; #ifdef CONFIG_BLOCK if (sb_is_blkdev_sb(sb)) return I_BDEV(inode)->bd_disk->bdi; #endif return sb->s_bdi; } static inline int wb_congested(struct bdi_writeback *wb, int cong_bits) { return wb->congested & cong_bits; } long congestion_wait(int sync, long timeout); long wait_iff_congested(int sync, long timeout); static inline bool mapping_can_writeback(struct address_space *mapping) { return inode_to_bdi(mapping->host)->capabilities & BDI_CAP_WRITEBACK; } static inline int bdi_sched_wait(void *word) { schedule(); return 0; } #ifdef CONFIG_CGROUP_WRITEBACK struct bdi_writeback *wb_get_lookup(struct backing_dev_info *bdi, struct cgroup_subsys_state *memcg_css); struct bdi_writeback *wb_get_create(struct backing_dev_info *bdi, struct cgroup_subsys_state *memcg_css, gfp_t gfp); void wb_memcg_offline(struct mem_cgroup *memcg); void wb_blkcg_offline(struct blkcg *blkcg); int inode_congested(struct inode *inode, int cong_bits); /** * inode_cgwb_enabled - test whether cgroup writeback is enabled on an inode * @inode: inode of interest * * Cgroup writeback requires support from the filesystem. Also, both memcg and * iocg have to be on the default hierarchy. Test whether all conditions are * met. * * Note that the test result may change dynamically on the same inode * depending on how memcg and iocg are configured. */ static inline bool inode_cgwb_enabled(struct inode *inode) { struct backing_dev_info *bdi = inode_to_bdi(inode); return cgroup_subsys_on_dfl(memory_cgrp_subsys) && cgroup_subsys_on_dfl(io_cgrp_subsys) && (bdi->capabilities & BDI_CAP_WRITEBACK) && (inode->i_sb->s_iflags & SB_I_CGROUPWB); } /** * wb_find_current - find wb for %current on a bdi * @bdi: bdi of interest * * Find the wb of @bdi which matches both the memcg and blkcg of %current. * Must be called under rcu_read_lock() which protects the returend wb. * NULL if not found. */ static inline struct bdi_writeback *wb_find_current(struct backing_dev_info *bdi) { struct cgroup_subsys_state *memcg_css; struct bdi_writeback *wb; memcg_css = task_css(current, memory_cgrp_id); if (!memcg_css->parent) return &bdi->wb; wb = radix_tree_lookup(&bdi->cgwb_tree, memcg_css->id); /* * %current's blkcg equals the effective blkcg of its memcg. No * need to use the relatively expensive cgroup_get_e_css(). */ if (likely(wb && wb->blkcg_css == task_css(current, io_cgrp_id))) return wb; return NULL; } /** * wb_get_create_current - get or create wb for %current on a bdi * @bdi: bdi of interest * @gfp: allocation mask * * Equivalent to wb_get_create() on %current's memcg. This function is * called from a relatively hot path and optimizes the common cases using * wb_find_current(). */ static inline struct bdi_writeback * wb_get_create_current(struct backing_dev_info *bdi, gfp_t gfp) { struct bdi_writeback *wb; rcu_read_lock(); wb = wb_find_current(bdi); if (wb && unlikely(!wb_tryget(wb))) wb = NULL; rcu_read_unlock(); if (unlikely(!wb)) { struct cgroup_subsys_state *memcg_css; memcg_css = task_get_css(current, memory_cgrp_id); wb = wb_get_create(bdi, memcg_css, gfp); css_put(memcg_css); } return wb; } /** * inode_to_wb_is_valid - test whether an inode has a wb associated * @inode: inode of interest * * Returns %true if @inode has a wb associated. May be called without any * locking. */ static inline bool inode_to_wb_is_valid(struct inode *inode) { return inode->i_wb; } /** * inode_to_wb - determine the wb of an inode * @inode: inode of interest * * Returns the wb @inode is currently associated with. The caller must be * holding either @inode->i_lock, the i_pages lock, or the * associated wb's list_lock. */ static inline struct bdi_writeback *inode_to_wb(const struct inode *inode) { #ifdef CONFIG_LOCKDEP WARN_ON_ONCE(debug_locks && (inode->i_sb->s_iflags & SB_I_CGROUPWB) && (!lockdep_is_held(&inode->i_lock) && !lockdep_is_held(&inode->i_mapping->i_pages.xa_lock) && !lockdep_is_held(&inode->i_wb->list_lock))); #endif return inode->i_wb; } static inline struct bdi_writeback *inode_to_wb_wbc( struct inode *inode, struct writeback_control *wbc) { /* * If wbc does not have inode attached, it means cgroup writeback was * disabled when wbc started. Just use the default wb in that case. */ return wbc->wb ? wbc->wb : &inode_to_bdi(inode)->wb; } /** * unlocked_inode_to_wb_begin - begin unlocked inode wb access transaction * @inode: target inode * @cookie: output param, to be passed to the end function * * The caller wants to access the wb associated with @inode but isn't * holding inode->i_lock, the i_pages lock or wb->list_lock. This * function determines the wb associated with @inode and ensures that the * association doesn't change until the transaction is finished with * unlocked_inode_to_wb_end(). * * The caller must call unlocked_inode_to_wb_end() with *@cookie afterwards and * can't sleep during the transaction. IRQs may or may not be disabled on * return. */ static inline struct bdi_writeback * unlocked_inode_to_wb_begin(struct inode *inode, struct wb_lock_cookie *cookie) { rcu_read_lock(); /* * Paired with store_release in inode_switch_wbs_work_fn() and * ensures that we see the new wb if we see cleared I_WB_SWITCH. */ cookie->locked = smp_load_acquire(&inode->i_state) & I_WB_SWITCH; if (unlikely(cookie->locked)) xa_lock_irqsave(&inode->i_mapping->i_pages, cookie->flags); /* * Protected by either !I_WB_SWITCH + rcu_read_lock() or the i_pages * lock. inode_to_wb() will bark. Deref directly. */ return inode->i_wb; } /** * unlocked_inode_to_wb_end - end inode wb access transaction * @inode: target inode * @cookie: @cookie from unlocked_inode_to_wb_begin() */ static inline void unlocked_inode_to_wb_end(struct inode *inode, struct wb_lock_cookie *cookie) { if (unlikely(cookie->locked)) xa_unlock_irqrestore(&inode->i_mapping->i_pages, cookie->flags); rcu_read_unlock(); } #else /* CONFIG_CGROUP_WRITEBACK */ static inline bool inode_cgwb_enabled(struct inode *inode) { return false; } static inline struct bdi_writeback *wb_find_current(struct backing_dev_info *bdi) { return &bdi->wb; } static inline struct bdi_writeback * wb_get_create_current(struct backing_dev_info *bdi, gfp_t gfp) { return &bdi->wb; } static inline bool inode_to_wb_is_valid(struct inode *inode) { return true; } static inline struct bdi_writeback *inode_to_wb(struct inode *inode) { return &inode_to_bdi(inode)->wb; } static inline struct bdi_writeback *inode_to_wb_wbc( struct inode *inode, struct writeback_control *wbc) { return inode_to_wb(inode); } static inline struct bdi_writeback * unlocked_inode_to_wb_begin(struct inode *inode, struct wb_lock_cookie *cookie) { return inode_to_wb(inode); } static inline void unlocked_inode_to_wb_end(struct inode *inode, struct wb_lock_cookie *cookie) { } static inline void wb_memcg_offline(struct mem_cgroup *memcg) { } static inline void wb_blkcg_offline(struct blkcg *blkcg) { } static inline int inode_congested(struct inode *inode, int cong_bits) { return wb_congested(&inode_to_bdi(inode)->wb, cong_bits); } #endif /* CONFIG_CGROUP_WRITEBACK */ static inline int inode_read_congested(struct inode *inode) { return inode_congested(inode, 1 << WB_sync_congested); } static inline int inode_write_congested(struct inode *inode) { return inode_congested(inode, 1 << WB_async_congested); } static inline int inode_rw_congested(struct inode *inode) { return inode_congested(inode, (1 << WB_sync_congested) | (1 << WB_async_congested)); } static inline int bdi_congested(struct backing_dev_info *bdi, int cong_bits) { return wb_congested(&bdi->wb, cong_bits); } static inline int bdi_read_congested(struct backing_dev_info *bdi) { return bdi_congested(bdi, 1 << WB_sync_congested); } static inline int bdi_write_congested(struct backing_dev_info *bdi) { return bdi_congested(bdi, 1 << WB_async_congested); } static inline int bdi_rw_congested(struct backing_dev_info *bdi) { return bdi_congested(bdi, (1 << WB_sync_congested) | (1 << WB_async_congested)); } const char *bdi_dev_name(struct backing_dev_info *bdi); #endif /* _LINUX_BACKING_DEV_H */ PK ! �p�ъ � amba/bus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/amba/bus.h * * This device type deals with ARM PrimeCells and anything else that * presents a proper CID (0xB105F00D) at the end of the I/O register * region or that is derived from a PrimeCell. * * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved. */ #ifndef ASMARM_AMBA_H #define ASMARM_AMBA_H #include <linux/clk.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/err.h> #include <linux/resource.h> #include <linux/regulator/consumer.h> #define AMBA_NR_IRQS 9 #define AMBA_CID 0xb105f00d #define CORESIGHT_CID 0xb105900d /* * CoreSight Architecture specification updates the ID specification * for components on the AMBA bus. (ARM IHI 0029E) * * Bits 15:12 of the CID are the device class. * * Class 0xF remains for PrimeCell and legacy components. (AMBA_CID above) * Class 0x9 defines the component as CoreSight (CORESIGHT_CID above) * Class 0x0, 0x1, 0xB, 0xE define components that do not have driver support * at present. * Class 0x2-0x8,0xA and 0xD-0xD are presently reserved. * * Remaining CID bits stay as 0xb105-00d */ /** * Class 0x9 components use additional values to form a Unique Component * Identifier (UCI), where peripheral ID values are identical for different * components. Passed to the amba bus code from the component driver via * the amba_id->data pointer. * @devarch : coresight devarch register value * @devarch_mask: mask bits used for matching. 0 indicates UCI not used. * @devtype : coresight device type value * @data : additional driver data. As we have usurped the original * pointer some devices may still need additional data */ struct amba_cs_uci_id { unsigned int devarch; unsigned int devarch_mask; unsigned int devtype; void *data; }; /* define offsets for registers used by UCI */ #define UCI_REG_DEVTYPE_OFFSET 0xFCC #define UCI_REG_DEVARCH_OFFSET 0xFBC struct clk; struct amba_device { struct device dev; struct resource res; struct clk *pclk; struct device_dma_parameters dma_parms; unsigned int periphid; unsigned int cid; struct amba_cs_uci_id uci; unsigned int irq[AMBA_NR_IRQS]; char *driver_override; }; struct amba_driver { struct device_driver drv; int (*probe)(struct amba_device *, const struct amba_id *); void (*remove)(struct amba_device *); void (*shutdown)(struct amba_device *); const struct amba_id *id_table; }; /* * Constants for the designer field of the Peripheral ID register. When bit 7 * is set to '1', bits [6:0] should be the JEP106 manufacturer identity code. */ enum amba_vendor { AMBA_VENDOR_ARM = 0x41, AMBA_VENDOR_ST = 0x80, AMBA_VENDOR_QCOM = 0x51, AMBA_VENDOR_LSI = 0xb6, AMBA_VENDOR_LINUX = 0xfe, /* This value is not official */ }; /* This is used to generate pseudo-ID for AMBA device */ #define AMBA_LINUX_ID(conf, rev, part) \ (((conf) & 0xff) << 24 | ((rev) & 0xf) << 20 | \ AMBA_VENDOR_LINUX << 12 | ((part) & 0xfff)) extern struct bus_type amba_bustype; #define to_amba_device(d) container_of(d, struct amba_device, dev) #define amba_get_drvdata(d) dev_get_drvdata(&d->dev) #define amba_set_drvdata(d,p) dev_set_drvdata(&d->dev, p) #ifdef CONFIG_ARM_AMBA int amba_driver_register(struct amba_driver *); void amba_driver_unregister(struct amba_driver *); #else static inline int amba_driver_register(struct amba_driver *drv) { return -EINVAL; } static inline void amba_driver_unregister(struct amba_driver *drv) { } #endif struct amba_device *amba_device_alloc(const char *, resource_size_t, size_t); void amba_device_put(struct amba_device *); int amba_device_add(struct amba_device *, struct resource *); int amba_device_register(struct amba_device *, struct resource *); struct amba_device *amba_apb_device_add(struct device *parent, const char *name, resource_size_t base, size_t size, int irq1, int irq2, void *pdata, unsigned int periphid); struct amba_device *amba_ahb_device_add(struct device *parent, const char *name, resource_size_t base, size_t size, int irq1, int irq2, void *pdata, unsigned int periphid); struct amba_device * amba_apb_device_add_res(struct device *parent, const char *name, resource_size_t base, size_t size, int irq1, int irq2, void *pdata, unsigned int periphid, struct resource *resbase); struct amba_device * amba_ahb_device_add_res(struct device *parent, const char *name, resource_size_t base, size_t size, int irq1, int irq2, void *pdata, unsigned int periphid, struct resource *resbase); void amba_device_unregister(struct amba_device *); struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int); int amba_request_regions(struct amba_device *, const char *); void amba_release_regions(struct amba_device *); static inline int amba_pclk_enable(struct amba_device *dev) { return clk_enable(dev->pclk); } static inline void amba_pclk_disable(struct amba_device *dev) { clk_disable(dev->pclk); } static inline int amba_pclk_prepare(struct amba_device *dev) { return clk_prepare(dev->pclk); } static inline void amba_pclk_unprepare(struct amba_device *dev) { clk_unprepare(dev->pclk); } /* Some drivers don't use the struct amba_device */ #define AMBA_CONFIG_BITS(a) (((a) >> 24) & 0xff) #define AMBA_REV_BITS(a) (((a) >> 20) & 0x0f) #define AMBA_MANF_BITS(a) (((a) >> 12) & 0xff) #define AMBA_PART_BITS(a) ((a) & 0xfff) #define amba_config(d) AMBA_CONFIG_BITS((d)->periphid) #define amba_rev(d) AMBA_REV_BITS((d)->periphid) #define amba_manf(d) AMBA_MANF_BITS((d)->periphid) #define amba_part(d) AMBA_PART_BITS((d)->periphid) #define __AMBA_DEV(busid, data, mask) \ { \ .coherent_dma_mask = mask, \ .init_name = busid, \ .platform_data = data, \ } /* * APB devices do not themselves have the ability to address memory, * so DMA masks should be zero (much like USB peripheral devices.) * The DMA controller DMA masks should be used instead (much like * USB host controllers in conventional PCs.) */ #define AMBA_APB_DEVICE(name, busid, id, base, irqs, data) \ struct amba_device name##_device = { \ .dev = __AMBA_DEV(busid, data, 0), \ .res = DEFINE_RES_MEM(base, SZ_4K), \ .irq = irqs, \ .periphid = id, \ } /* * AHB devices are DMA capable, so set their DMA masks */ #define AMBA_AHB_DEVICE(name, busid, id, base, irqs, data) \ struct amba_device name##_device = { \ .dev = __AMBA_DEV(busid, data, ~0ULL), \ .res = DEFINE_RES_MEM(base, SZ_4K), \ .irq = irqs, \ .periphid = id, \ } /* * module_amba_driver() - Helper macro for drivers that don't do anything * special in module init/exit. This eliminates a lot of boilerplate. Each * module may only use this macro once, and calling it replaces module_init() * and module_exit() */ #define module_amba_driver(__amba_drv) \ module_driver(__amba_drv, amba_driver_register, amba_driver_unregister) /* * builtin_amba_driver() - Helper macro for drivers that don't do anything * special in driver initcall. This eliminates a lot of boilerplate. Each * driver may only use this macro once, and calling it replaces the instance * device_initcall(). */ #define builtin_amba_driver(__amba_drv) \ builtin_driver(__amba_drv, amba_driver_register) #endif PK ! �DE�� � amba/pl080.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* include/linux/amba/pl080.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * ARM PrimeCell PL080 DMA controller */ /* Note, there are some Samsung updates to this controller block which * make it not entierly compatible with the PL080 specification from * ARM. When in doubt, check the Samsung documentation first. * * The Samsung defines are PL080S, and add an extra control register, * the ability to move more than 2^11 counts of data and some extra * OneNAND features. */ #ifndef ASM_PL080_H #define ASM_PL080_H #define PL080_INT_STATUS (0x00) #define PL080_TC_STATUS (0x04) #define PL080_TC_CLEAR (0x08) #define PL080_ERR_STATUS (0x0C) #define PL080_ERR_CLEAR (0x10) #define PL080_RAW_TC_STATUS (0x14) #define PL080_RAW_ERR_STATUS (0x18) #define PL080_EN_CHAN (0x1c) #define PL080_SOFT_BREQ (0x20) #define PL080_SOFT_SREQ (0x24) #define PL080_SOFT_LBREQ (0x28) #define PL080_SOFT_LSREQ (0x2C) #define PL080_CONFIG (0x30) #define PL080_CONFIG_M2_BE BIT(2) #define PL080_CONFIG_M1_BE BIT(1) #define PL080_CONFIG_ENABLE BIT(0) #define PL080_SYNC (0x34) /* The Faraday Technology FTDMAC020 variant registers */ #define FTDMAC020_CH_BUSY (0x20) /* Identical to PL080_CONFIG */ #define FTDMAC020_CSR (0x24) /* Identical to PL080_SYNC */ #define FTDMAC020_SYNC (0x2C) #define FTDMAC020_REVISION (0x30) #define FTDMAC020_FEATURE (0x34) /* Per channel configuration registers */ #define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) #define PL080_CH_SRC_ADDR (0x00) #define PL080_CH_DST_ADDR (0x04) #define PL080_CH_LLI (0x08) #define PL080_CH_CONTROL (0x0C) #define PL080_CH_CONFIG (0x10) #define PL080S_CH_CONTROL2 (0x10) #define PL080S_CH_CONFIG (0x14) /* The Faraday FTDMAC020 derivative shuffles the registers around */ #define FTDMAC020_CH_CSR (0x00) #define FTDMAC020_CH_CFG (0x04) #define FTDMAC020_CH_SRC_ADDR (0x08) #define FTDMAC020_CH_DST_ADDR (0x0C) #define FTDMAC020_CH_LLP (0x10) #define FTDMAC020_CH_SIZE (0x14) #define PL080_LLI_ADDR_MASK GENMASK(31, 2) #define PL080_LLI_ADDR_SHIFT (2) #define PL080_LLI_LM_AHB2 BIT(0) #define PL080_CONTROL_TC_IRQ_EN BIT(31) #define PL080_CONTROL_PROT_MASK GENMASK(30, 28) #define PL080_CONTROL_PROT_SHIFT (28) #define PL080_CONTROL_PROT_CACHE BIT(30) #define PL080_CONTROL_PROT_BUFF BIT(29) #define PL080_CONTROL_PROT_SYS BIT(28) #define PL080_CONTROL_DST_INCR BIT(27) #define PL080_CONTROL_SRC_INCR BIT(26) #define PL080_CONTROL_DST_AHB2 BIT(25) #define PL080_CONTROL_SRC_AHB2 BIT(24) #define PL080_CONTROL_DWIDTH_MASK GENMASK(23, 21) #define PL080_CONTROL_DWIDTH_SHIFT (21) #define PL080_CONTROL_SWIDTH_MASK GENMASK(20, 18) #define PL080_CONTROL_SWIDTH_SHIFT (18) #define PL080_CONTROL_DB_SIZE_MASK GENMASK(17, 15) #define PL080_CONTROL_DB_SIZE_SHIFT (15) #define PL080_CONTROL_SB_SIZE_MASK GENMASK(14, 12) #define PL080_CONTROL_SB_SIZE_SHIFT (12) #define PL080_CONTROL_TRANSFER_SIZE_MASK GENMASK(11, 0) #define PL080S_CONTROL_TRANSFER_SIZE_MASK GENMASK(24, 0) #define PL080_CONTROL_TRANSFER_SIZE_SHIFT (0) #define PL080_BSIZE_1 (0x0) #define PL080_BSIZE_4 (0x1) #define PL080_BSIZE_8 (0x2) #define PL080_BSIZE_16 (0x3) #define PL080_BSIZE_32 (0x4) #define PL080_BSIZE_64 (0x5) #define PL080_BSIZE_128 (0x6) #define PL080_BSIZE_256 (0x7) #define PL080_WIDTH_8BIT (0x0) #define PL080_WIDTH_16BIT (0x1) #define PL080_WIDTH_32BIT (0x2) #define PL080N_CONFIG_ITPROT BIT(20) #define PL080N_CONFIG_SECPROT BIT(19) #define PL080_CONFIG_HALT BIT(18) #define PL080_CONFIG_ACTIVE BIT(17) /* RO */ #define PL080_CONFIG_LOCK BIT(16) #define PL080_CONFIG_TC_IRQ_MASK BIT(15) #define PL080_CONFIG_ERR_IRQ_MASK BIT(14) #define PL080_CONFIG_FLOW_CONTROL_MASK GENMASK(13, 11) #define PL080_CONFIG_FLOW_CONTROL_SHIFT (11) #define PL080_CONFIG_DST_SEL_MASK GENMASK(9, 6) #define PL080_CONFIG_DST_SEL_SHIFT (6) #define PL080_CONFIG_SRC_SEL_MASK GENMASK(4, 1) #define PL080_CONFIG_SRC_SEL_SHIFT (1) #define PL080_CONFIG_ENABLE BIT(0) #define PL080_FLOW_MEM2MEM (0x0) #define PL080_FLOW_MEM2PER (0x1) #define PL080_FLOW_PER2MEM (0x2) #define PL080_FLOW_SRC2DST (0x3) #define PL080_FLOW_SRC2DST_DST (0x4) #define PL080_FLOW_MEM2PER_PER (0x5) #define PL080_FLOW_PER2MEM_PER (0x6) #define PL080_FLOW_SRC2DST_SRC (0x7) #define FTDMAC020_CH_CSR_TC_MSK BIT(31) /* Later versions have a threshold in bits 24..26, */ #define FTDMAC020_CH_CSR_FIFOTH_MSK GENMASK(26, 24) #define FTDMAC020_CH_CSR_FIFOTH_SHIFT (24) #define FTDMAC020_CH_CSR_CHPR1_MSK GENMASK(23, 22) #define FTDMAC020_CH_CSR_PROT3 BIT(21) #define FTDMAC020_CH_CSR_PROT2 BIT(20) #define FTDMAC020_CH_CSR_PROT1 BIT(19) #define FTDMAC020_CH_CSR_SRC_SIZE_MSK GENMASK(18, 16) #define FTDMAC020_CH_CSR_SRC_SIZE_SHIFT (16) #define FTDMAC020_CH_CSR_ABT BIT(15) #define FTDMAC020_CH_CSR_SRC_WIDTH_MSK GENMASK(13, 11) #define FTDMAC020_CH_CSR_SRC_WIDTH_SHIFT (11) #define FTDMAC020_CH_CSR_DST_WIDTH_MSK GENMASK(10, 8) #define FTDMAC020_CH_CSR_DST_WIDTH_SHIFT (8) #define FTDMAC020_CH_CSR_MODE BIT(7) /* 00 = increase, 01 = decrease, 10 = fix */ #define FTDMAC020_CH_CSR_SRCAD_CTL_MSK GENMASK(6, 5) #define FTDMAC020_CH_CSR_SRCAD_CTL_SHIFT (5) #define FTDMAC020_CH_CSR_DSTAD_CTL_MSK GENMASK(4, 3) #define FTDMAC020_CH_CSR_DSTAD_CTL_SHIFT (3) #define FTDMAC020_CH_CSR_SRC_SEL BIT(2) #define FTDMAC020_CH_CSR_DST_SEL BIT(1) #define FTDMAC020_CH_CSR_EN BIT(0) /* FIFO threshold setting */ #define FTDMAC020_CH_CSR_FIFOTH_1 (0x0) #define FTDMAC020_CH_CSR_FIFOTH_2 (0x1) #define FTDMAC020_CH_CSR_FIFOTH_4 (0x2) #define FTDMAC020_CH_CSR_FIFOTH_8 (0x3) #define FTDMAC020_CH_CSR_FIFOTH_16 (0x4) /* The FTDMAC020 supports 64bit wide transfers */ #define FTDMAC020_WIDTH_64BIT (0x3) /* Address can be increased, decreased or fixed */ #define FTDMAC020_CH_CSR_SRCAD_CTL_INC (0x0) #define FTDMAC020_CH_CSR_SRCAD_CTL_DEC (0x1) #define FTDMAC020_CH_CSR_SRCAD_CTL_FIXED (0x2) #define FTDMAC020_CH_CFG_LLP_CNT_MASK GENMASK(19, 16) #define FTDMAC020_CH_CFG_LLP_CNT_SHIFT (16) #define FTDMAC020_CH_CFG_BUSY BIT(8) #define FTDMAC020_CH_CFG_INT_ABT_MASK BIT(2) #define FTDMAC020_CH_CFG_INT_ERR_MASK BIT(1) #define FTDMAC020_CH_CFG_INT_TC_MASK BIT(0) /* Inside the LLIs, the applicable CSR fields are mapped differently */ #define FTDMAC020_LLI_TC_MSK BIT(28) #define FTDMAC020_LLI_SRC_WIDTH_MSK GENMASK(27, 25) #define FTDMAC020_LLI_SRC_WIDTH_SHIFT (25) #define FTDMAC020_LLI_DST_WIDTH_MSK GENMASK(24, 22) #define FTDMAC020_LLI_DST_WIDTH_SHIFT (22) #define FTDMAC020_LLI_SRCAD_CTL_MSK GENMASK(21, 20) #define FTDMAC020_LLI_SRCAD_CTL_SHIFT (20) #define FTDMAC020_LLI_DSTAD_CTL_MSK GENMASK(19, 18) #define FTDMAC020_LLI_DSTAD_CTL_SHIFT (18) #define FTDMAC020_LLI_SRC_SEL BIT(17) #define FTDMAC020_LLI_DST_SEL BIT(16) #define FTDMAC020_LLI_TRANSFER_SIZE_MASK GENMASK(11, 0) #define FTDMAC020_LLI_TRANSFER_SIZE_SHIFT (0) #define FTDMAC020_CFG_LLP_CNT_MASK GENMASK(19, 16) #define FTDMAC020_CFG_LLP_CNT_SHIFT (16) #define FTDMAC020_CFG_BUSY BIT(8) #define FTDMAC020_CFG_INT_ABT_MSK BIT(2) #define FTDMAC020_CFG_INT_ERR_MSK BIT(1) #define FTDMAC020_CFG_INT_TC_MSK BIT(0) /* DMA linked list chain structure */ struct pl080_lli { u32 src_addr; u32 dst_addr; u32 next_lli; u32 control0; }; struct pl080s_lli { u32 src_addr; u32 dst_addr; u32 next_lli; u32 control0; u32 control1; }; #endif /* ASM_PL080_H */ PK ! �R�` ` amba/pl08x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver * * Copyright (C) 2005 ARM Ltd * Copyright (C) 2010 ST-Ericsson SA * * pl08x information required by platform code * * Please credit ARM.com * Documentation: ARM DDI 0196D */ #ifndef AMBA_PL08X_H #define AMBA_PL08X_H /* We need sizes of structs from this header */ #include <linux/dmaengine.h> #include <linux/interrupt.h> struct pl08x_driver_data; struct pl08x_phy_chan; struct pl08x_txd; /* Bitmasks for selecting AHB ports for DMA transfers */ enum { PL08X_AHB1 = (1 << 0), PL08X_AHB2 = (1 << 1) }; /** * struct pl08x_channel_data - data structure to pass info between * platform and PL08x driver regarding channel configuration * @bus_id: name of this device channel, not just a device name since * devices may have more than one channel e.g. "foo_tx" * @min_signal: the minimum DMA signal number to be muxed in for this * channel (for platforms supporting muxed signals). If you have * static assignments, make sure this is set to the assigned signal * number, PL08x have 16 possible signals in number 0 thru 15 so * when these are not enough they often get muxed (in hardware) * disabling simultaneous use of the same channel for two devices. * @max_signal: the maximum DMA signal number to be muxed in for * the channel. Set to the same as min_signal for * devices with static assignments * @muxval: a number usually used to poke into some mux regiser to * mux in the signal to this channel * @addr: source/target address in physical memory for this DMA channel, * can be the address of a FIFO register for burst requests for example. * This can be left undefined if the PrimeCell API is used for configuring * this. * @single: the device connected to this channel will request single DMA * transfers, not bursts. (Bursts are default.) * @periph_buses: the device connected to this channel is accessible via * these buses (use PL08X_AHB1 | PL08X_AHB2). */ struct pl08x_channel_data { const char *bus_id; int min_signal; int max_signal; u32 muxval; dma_addr_t addr; bool single; u8 periph_buses; }; enum pl08x_burst_size { PL08X_BURST_SZ_1, PL08X_BURST_SZ_4, PL08X_BURST_SZ_8, PL08X_BURST_SZ_16, PL08X_BURST_SZ_32, PL08X_BURST_SZ_64, PL08X_BURST_SZ_128, PL08X_BURST_SZ_256, }; enum pl08x_bus_width { PL08X_BUS_WIDTH_8_BITS, PL08X_BUS_WIDTH_16_BITS, PL08X_BUS_WIDTH_32_BITS, }; /** * struct pl08x_platform_data - the platform configuration for the PL08x * PrimeCells. * @slave_channels: the channels defined for the different devices on the * platform, all inclusive, including multiplexed channels. The available * physical channels will be multiplexed around these signals as they are * requested, just enumerate all possible channels. * @num_slave_channels: number of elements in the slave channel array * @memcpy_burst_size: the appropriate burst size for memcpy operations * @memcpy_bus_width: memory bus width * @memcpy_prot_buff: whether memcpy DMA is bufferable * @memcpy_prot_cache: whether memcpy DMA is cacheable * @get_xfer_signal: request a physical signal to be used for a DMA transfer * immediately: if there is some multiplexing or similar blocking the use * of the channel the transfer can be denied by returning less than zero, * else it returns the allocated signal number * @put_xfer_signal: indicate to the platform that this physical signal is not * running any DMA transfer and multiplexing can be recycled * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2 * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2 * @slave_map: DMA slave matching table * @slave_map_len: number of elements in @slave_map */ struct pl08x_platform_data { struct pl08x_channel_data *slave_channels; unsigned int num_slave_channels; enum pl08x_burst_size memcpy_burst_size; enum pl08x_bus_width memcpy_bus_width; bool memcpy_prot_buff; bool memcpy_prot_cache; int (*get_xfer_signal)(const struct pl08x_channel_data *); void (*put_xfer_signal)(const struct pl08x_channel_data *, int); u8 lli_buses; u8 mem_buses; const struct dma_slave_map *slave_map; int slave_map_len; }; #ifdef CONFIG_AMBA_PL08X bool pl08x_filter_id(struct dma_chan *chan, void *chan_id); #else static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) { return false; } #endif #endif /* AMBA_PL08X_H */ PK ! �c�ݚ � amba/clcd-regs.hnu �[��� /* * David A Rusling * * Copyright (C) 2001 ARM Limited * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #ifndef AMBA_CLCD_REGS_H #define AMBA_CLCD_REGS_H /* * CLCD Controller Internal Register addresses */ #define CLCD_TIM0 0x00000000 #define CLCD_TIM1 0x00000004 #define CLCD_TIM2 0x00000008 #define CLCD_TIM3 0x0000000c #define CLCD_UBAS 0x00000010 #define CLCD_LBAS 0x00000014 #define CLCD_PL110_IENB 0x00000018 #define CLCD_PL110_CNTL 0x0000001c #define CLCD_PL110_STAT 0x00000020 #define CLCD_PL110_INTR 0x00000024 #define CLCD_PL110_UCUR 0x00000028 #define CLCD_PL110_LCUR 0x0000002C #define CLCD_PL111_CNTL 0x00000018 #define CLCD_PL111_IENB 0x0000001c #define CLCD_PL111_RIS 0x00000020 #define CLCD_PL111_MIS 0x00000024 #define CLCD_PL111_ICR 0x00000028 #define CLCD_PL111_UCUR 0x0000002c #define CLCD_PL111_LCUR 0x00000030 #define CLCD_PALL 0x00000200 #define CLCD_PALETTE 0x00000200 #define TIM2_PCD_LO_MASK GENMASK(4, 0) #define TIM2_PCD_LO_BITS 5 #define TIM2_CLKSEL (1 << 5) #define TIM2_ACB_MASK GENMASK(10, 6) #define TIM2_IVS (1 << 11) #define TIM2_IHS (1 << 12) #define TIM2_IPC (1 << 13) #define TIM2_IOE (1 << 14) #define TIM2_BCD (1 << 26) #define TIM2_PCD_HI_MASK GENMASK(31, 27) #define TIM2_PCD_HI_BITS 5 #define TIM2_PCD_HI_SHIFT 27 #define CNTL_LCDEN (1 << 0) #define CNTL_LCDBPP1 (0 << 1) #define CNTL_LCDBPP2 (1 << 1) #define CNTL_LCDBPP4 (2 << 1) #define CNTL_LCDBPP8 (3 << 1) #define CNTL_LCDBPP16 (4 << 1) #define CNTL_LCDBPP16_565 (6 << 1) #define CNTL_LCDBPP16_444 (7 << 1) #define CNTL_LCDBPP24 (5 << 1) #define CNTL_LCDBW (1 << 4) #define CNTL_LCDTFT (1 << 5) #define CNTL_LCDMONO8 (1 << 6) #define CNTL_LCDDUAL (1 << 7) #define CNTL_BGR (1 << 8) #define CNTL_BEBO (1 << 9) #define CNTL_BEPO (1 << 10) #define CNTL_LCDPWR (1 << 11) #define CNTL_LCDVCOMP(x) ((x) << 12) #define CNTL_LDMAFIFOTIME (1 << 15) #define CNTL_WATERMARK (1 << 16) /* ST Microelectronics variant bits */ #define CNTL_ST_1XBPP_444 0x0 #define CNTL_ST_1XBPP_5551 (1 << 17) #define CNTL_ST_1XBPP_565 (1 << 18) #define CNTL_ST_CDWID_12 0x0 #define CNTL_ST_CDWID_16 (1 << 19) #define CNTL_ST_CDWID_18 (1 << 20) #define CNTL_ST_CDWID_24 ((1 << 19)|(1 << 20)) #define CNTL_ST_CEAEN (1 << 21) #define CNTL_ST_LCDBPP24_PACKED (6 << 1) #endif /* AMBA_CLCD_REGS_H */ PK ! ~�p%$ %$ amba/serial.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * linux/include/asm-arm/hardware/serial_amba.h * * Internal header file for AMBA serial ports * * Copyright (C) ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. */ #ifndef ASM_ARM_HARDWARE_SERIAL_AMBA_H #define ASM_ARM_HARDWARE_SERIAL_AMBA_H #include <linux/types.h> /* ------------------------------------------------------------------------------- * From AMBA UART (PL010) Block Specification * ------------------------------------------------------------------------------- * UART Register Offsets. */ #define UART01x_DR 0x00 /* Data read or written from the interface. */ #define UART01x_RSR 0x04 /* Receive status register (Read). */ #define UART01x_ECR 0x04 /* Error clear register (Write). */ #define UART010_LCRH 0x08 /* Line control register, high byte. */ #define ST_UART011_DMAWM 0x08 /* DMA watermark configure register. */ #define UART010_LCRM 0x0C /* Line control register, middle byte. */ #define ST_UART011_TIMEOUT 0x0C /* Timeout period register. */ #define UART010_LCRL 0x10 /* Line control register, low byte. */ #define UART010_CR 0x14 /* Control register. */ #define UART01x_FR 0x18 /* Flag register (Read only). */ #define UART010_IIR 0x1C /* Interrupt identification register (Read). */ #define UART010_ICR 0x1C /* Interrupt clear register (Write). */ #define ST_UART011_LCRH_RX 0x1C /* Rx line control register. */ #define UART01x_ILPR 0x20 /* IrDA low power counter register. */ #define UART011_IBRD 0x24 /* Integer baud rate divisor register. */ #define UART011_FBRD 0x28 /* Fractional baud rate divisor register. */ #define UART011_LCRH 0x2c /* Line control register. */ #define ST_UART011_LCRH_TX 0x2c /* Tx Line control register. */ #define UART011_CR 0x30 /* Control register. */ #define UART011_IFLS 0x34 /* Interrupt fifo level select. */ #define UART011_IMSC 0x38 /* Interrupt mask. */ #define UART011_RIS 0x3c /* Raw interrupt status. */ #define UART011_MIS 0x40 /* Masked interrupt status. */ #define UART011_ICR 0x44 /* Interrupt clear register. */ #define UART011_DMACR 0x48 /* DMA control register. */ #define ST_UART011_XFCR 0x50 /* XON/XOFF control register. */ #define ST_UART011_XON1 0x54 /* XON1 register. */ #define ST_UART011_XON2 0x58 /* XON2 register. */ #define ST_UART011_XOFF1 0x5C /* XON1 register. */ #define ST_UART011_XOFF2 0x60 /* XON2 register. */ #define ST_UART011_ITCR 0x80 /* Integration test control register. */ #define ST_UART011_ITIP 0x84 /* Integration test input register. */ #define ST_UART011_ABCR 0x100 /* Autobaud control register. */ #define ST_UART011_ABIMSC 0x15C /* Autobaud interrupt mask/clear register. */ /* * ZTE UART register offsets. This UART has a radically different address * allocation from the ARM and ST variants, so we list all registers here. * We assume unlisted registers do not exist. */ #define ZX_UART011_DR 0x04 #define ZX_UART011_FR 0x14 #define ZX_UART011_IBRD 0x24 #define ZX_UART011_FBRD 0x28 #define ZX_UART011_LCRH 0x30 #define ZX_UART011_CR 0x34 #define ZX_UART011_IFLS 0x38 #define ZX_UART011_IMSC 0x40 #define ZX_UART011_RIS 0x44 #define ZX_UART011_MIS 0x48 #define ZX_UART011_ICR 0x4c #define ZX_UART011_DMACR 0x50 #define UART011_DR_OE (1 << 11) #define UART011_DR_BE (1 << 10) #define UART011_DR_PE (1 << 9) #define UART011_DR_FE (1 << 8) #define UART01x_RSR_OE 0x08 #define UART01x_RSR_BE 0x04 #define UART01x_RSR_PE 0x02 #define UART01x_RSR_FE 0x01 #define UART011_FR_RI 0x100 #define UART011_FR_TXFE 0x080 #define UART011_FR_RXFF 0x040 #define UART01x_FR_TXFF 0x020 #define UART01x_FR_RXFE 0x010 #define UART01x_FR_BUSY 0x008 #define UART01x_FR_DCD 0x004 #define UART01x_FR_DSR 0x002 #define UART01x_FR_CTS 0x001 #define UART01x_FR_TMSK (UART01x_FR_TXFF + UART01x_FR_BUSY) /* * Some bits of Flag Register on ZTE device have different position from * standard ones. */ #define ZX_UART01x_FR_BUSY 0x100 #define ZX_UART01x_FR_DSR 0x008 #define ZX_UART01x_FR_CTS 0x002 #define ZX_UART011_FR_RI 0x001 #define UART011_CR_CTSEN 0x8000 /* CTS hardware flow control */ #define UART011_CR_RTSEN 0x4000 /* RTS hardware flow control */ #define UART011_CR_OUT2 0x2000 /* OUT2 */ #define UART011_CR_OUT1 0x1000 /* OUT1 */ #define UART011_CR_RTS 0x0800 /* RTS */ #define UART011_CR_DTR 0x0400 /* DTR */ #define UART011_CR_RXE 0x0200 /* receive enable */ #define UART011_CR_TXE 0x0100 /* transmit enable */ #define UART011_CR_LBE 0x0080 /* loopback enable */ #define UART010_CR_RTIE 0x0040 #define UART010_CR_TIE 0x0020 #define UART010_CR_RIE 0x0010 #define UART010_CR_MSIE 0x0008 #define ST_UART011_CR_OVSFACT 0x0008 /* Oversampling factor */ #define UART01x_CR_IIRLP 0x0004 /* SIR low power mode */ #define UART01x_CR_SIREN 0x0002 /* SIR enable */ #define UART01x_CR_UARTEN 0x0001 /* UART enable */ #define UART011_LCRH_SPS 0x80 #define UART01x_LCRH_WLEN_8 0x60 #define UART01x_LCRH_WLEN_7 0x40 #define UART01x_LCRH_WLEN_6 0x20 #define UART01x_LCRH_WLEN_5 0x00 #define UART01x_LCRH_FEN 0x10 #define UART01x_LCRH_STP2 0x08 #define UART01x_LCRH_EPS 0x04 #define UART01x_LCRH_PEN 0x02 #define UART01x_LCRH_BRK 0x01 #define ST_UART011_DMAWM_RX_1 (0 << 3) #define ST_UART011_DMAWM_RX_2 (1 << 3) #define ST_UART011_DMAWM_RX_4 (2 << 3) #define ST_UART011_DMAWM_RX_8 (3 << 3) #define ST_UART011_DMAWM_RX_16 (4 << 3) #define ST_UART011_DMAWM_RX_32 (5 << 3) #define ST_UART011_DMAWM_RX_48 (6 << 3) #define ST_UART011_DMAWM_TX_1 0 #define ST_UART011_DMAWM_TX_2 1 #define ST_UART011_DMAWM_TX_4 2 #define ST_UART011_DMAWM_TX_8 3 #define ST_UART011_DMAWM_TX_16 4 #define ST_UART011_DMAWM_TX_32 5 #define ST_UART011_DMAWM_TX_48 6 #define UART010_IIR_RTIS 0x08 #define UART010_IIR_TIS 0x04 #define UART010_IIR_RIS 0x02 #define UART010_IIR_MIS 0x01 #define UART011_IFLS_RX1_8 (0 << 3) #define UART011_IFLS_RX2_8 (1 << 3) #define UART011_IFLS_RX4_8 (2 << 3) #define UART011_IFLS_RX6_8 (3 << 3) #define UART011_IFLS_RX7_8 (4 << 3) #define UART011_IFLS_TX1_8 (0 << 0) #define UART011_IFLS_TX2_8 (1 << 0) #define UART011_IFLS_TX4_8 (2 << 0) #define UART011_IFLS_TX6_8 (3 << 0) #define UART011_IFLS_TX7_8 (4 << 0) /* special values for ST vendor with deeper fifo */ #define UART011_IFLS_RX_HALF (5 << 3) #define UART011_IFLS_TX_HALF (5 << 0) #define UART011_OEIM (1 << 10) /* overrun error interrupt mask */ #define UART011_BEIM (1 << 9) /* break error interrupt mask */ #define UART011_PEIM (1 << 8) /* parity error interrupt mask */ #define UART011_FEIM (1 << 7) /* framing error interrupt mask */ #define UART011_RTIM (1 << 6) /* receive timeout interrupt mask */ #define UART011_TXIM (1 << 5) /* transmit interrupt mask */ #define UART011_RXIM (1 << 4) /* receive interrupt mask */ #define UART011_DSRMIM (1 << 3) /* DSR interrupt mask */ #define UART011_DCDMIM (1 << 2) /* DCD interrupt mask */ #define UART011_CTSMIM (1 << 1) /* CTS interrupt mask */ #define UART011_RIMIM (1 << 0) /* RI interrupt mask */ #define UART011_OEIS (1 << 10) /* overrun error interrupt status */ #define UART011_BEIS (1 << 9) /* break error interrupt status */ #define UART011_PEIS (1 << 8) /* parity error interrupt status */ #define UART011_FEIS (1 << 7) /* framing error interrupt status */ #define UART011_RTIS (1 << 6) /* receive timeout interrupt status */ #define UART011_TXIS (1 << 5) /* transmit interrupt status */ #define UART011_RXIS (1 << 4) /* receive interrupt status */ #define UART011_DSRMIS (1 << 3) /* DSR interrupt status */ #define UART011_DCDMIS (1 << 2) /* DCD interrupt status */ #define UART011_CTSMIS (1 << 1) /* CTS interrupt status */ #define UART011_RIMIS (1 << 0) /* RI interrupt status */ #define UART011_OEIC (1 << 10) /* overrun error interrupt clear */ #define UART011_BEIC (1 << 9) /* break error interrupt clear */ #define UART011_PEIC (1 << 8) /* parity error interrupt clear */ #define UART011_FEIC (1 << 7) /* framing error interrupt clear */ #define UART011_RTIC (1 << 6) /* receive timeout interrupt clear */ #define UART011_TXIC (1 << 5) /* transmit interrupt clear */ #define UART011_RXIC (1 << 4) /* receive interrupt clear */ #define UART011_DSRMIC (1 << 3) /* DSR interrupt clear */ #define UART011_DCDMIC (1 << 2) /* DCD interrupt clear */ #define UART011_CTSMIC (1 << 1) /* CTS interrupt clear */ #define UART011_RIMIC (1 << 0) /* RI interrupt clear */ #define UART011_DMAONERR (1 << 2) /* disable dma on error */ #define UART011_TXDMAE (1 << 1) /* enable transmit dma */ #define UART011_RXDMAE (1 << 0) /* enable receive dma */ #define UART01x_RSR_ANY (UART01x_RSR_OE|UART01x_RSR_BE|UART01x_RSR_PE|UART01x_RSR_FE) #define UART01x_FR_MODEM_ANY (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS) #ifndef __ASSEMBLY__ struct amba_device; /* in uncompress this is included but amba/bus.h is not */ struct amba_pl010_data { void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl); }; struct dma_chan; struct amba_pl011_data { bool (*dma_filter)(struct dma_chan *chan, void *filter_param); void *dma_rx_param; void *dma_tx_param; bool dma_rx_poll_enable; unsigned int dma_rx_poll_rate; unsigned int dma_rx_poll_timeout; void (*init) (void); void (*exit) (void); }; #endif #endif PK ! `M�� amba/pl093.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* linux/amba/pl093.h * * Copyright (c) 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * AMBA PL093 SSMC (synchronous static memory controller) * See DDI0236.pdf (r0p4) for more details */ #define SMB_BANK(x) ((x) * 0x20) /* each bank control set is 0x20 apart */ /* Offsets for SMBxxxxRy registers */ #define SMBIDCYR (0x00) #define SMBWSTRDR (0x04) #define SMBWSTWRR (0x08) #define SMBWSTOENR (0x0C) #define SMBWSTWENR (0x10) #define SMBCR (0x14) #define SMBSR (0x18) #define SMBWSTBRDR (0x1C) /* Masks for SMB registers */ #define IDCY_MASK (0xf) #define WSTRD_MASK (0xf) #define WSTWR_MASK (0xf) #define WSTOEN_MASK (0xf) #define WSTWEN_MASK (0xf) /* Notes from datasheet: * WSTOEN <= WSTRD * WSTWEN <= WSTWR * * WSTOEN is not used with nWAIT */ /* SMBCR bit definitions */ #define SMBCR_BIWRITEEN (1 << 21) #define SMBCR_ADDRVALIDWRITEEN (1 << 20) #define SMBCR_SYNCWRITE (1 << 17) #define SMBCR_BMWRITE (1 << 16) #define SMBCR_WRAPREAD (1 << 14) #define SMBCR_BIREADEN (1 << 13) #define SMBCR_ADDRVALIDREADEN (1 << 12) #define SMBCR_SYNCREAD (1 << 9) #define SMBCR_BMREAD (1 << 8) #define SMBCR_SMBLSPOL (1 << 6) #define SMBCR_WP (1 << 3) #define SMBCR_WAITEN (1 << 2) #define SMBCR_WAITPOL (1 << 1) #define SMBCR_RBLE (1 << 0) #define SMBCR_BURSTLENWRITE_MASK (3 << 18) #define SMBCR_BURSTLENWRITE_4 (0 << 18) #define SMBCR_BURSTLENWRITE_8 (1 << 18) #define SMBCR_BURSTLENWRITE_RESERVED (2 << 18) #define SMBCR_BURSTLENWRITE_CONTINUOUS (3 << 18) #define SMBCR_BURSTLENREAD_MASK (3 << 10) #define SMBCR_BURSTLENREAD_4 (0 << 10) #define SMBCR_BURSTLENREAD_8 (1 << 10) #define SMBCR_BURSTLENREAD_16 (2 << 10) #define SMBCR_BURSTLENREAD_CONTINUOUS (3 << 10) #define SMBCR_MW_MASK (3 << 4) #define SMBCR_MW_8BIT (0 << 4) #define SMBCR_MW_16BIT (1 << 4) #define SMBCR_MW_M32BIT (2 << 4) /* SSMC status registers */ #define SSMCCSR (0x200) #define SSMCCR (0x204) #define SSMCITCR (0x208) #define SSMCITIP (0x20C) #define SSMCITIOP (0x210) PK ! (�� � amba/sp810.hnu �[��� /* * ARM PrimeXsys System Controller SP810 header file * * Copyright (C) 2009 ST Microelectronics * Viresh Kumar <vireshk@kernel.org> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __AMBA_SP810_H #define __AMBA_SP810_H #include <linux/io.h> /* sysctl registers offset */ #define SCCTRL 0x000 #define SCSYSSTAT 0x004 #define SCIMCTRL 0x008 #define SCIMSTAT 0x00C #define SCXTALCTRL 0x010 #define SCPLLCTRL 0x014 #define SCPLLFCTRL 0x018 #define SCPERCTRL0 0x01C #define SCPERCTRL1 0x020 #define SCPEREN 0x024 #define SCPERDIS 0x028 #define SCPERCLKEN 0x02C #define SCPERSTAT 0x030 #define SCSYSID0 0xEE0 #define SCSYSID1 0xEE4 #define SCSYSID2 0xEE8 #define SCSYSID3 0xEEC #define SCITCR 0xF00 #define SCITIR0 0xF04 #define SCITIR1 0xF08 #define SCITOR 0xF0C #define SCCNTCTRL 0xF10 #define SCCNTDATA 0xF14 #define SCCNTSTEP 0xF18 #define SCPERIPHID0 0xFE0 #define SCPERIPHID1 0xFE4 #define SCPERIPHID2 0xFE8 #define SCPERIPHID3 0xFEC #define SCPCELLID0 0xFF0 #define SCPCELLID1 0xFF4 #define SCPCELLID2 0xFF8 #define SCPCELLID3 0xFFC #define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2)) static inline void sysctl_soft_reset(void __iomem *base) { /* switch to slow mode */ writel(0x2, base + SCCTRL); /* writing any value to SCSYSSTAT reg will reset system */ writel(0, base + SCSYSSTAT); } #endif /* __AMBA_SP810_H */ PK ! � �� � amba/kmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * linux/include/asm-arm/hardware/amba_kmi.h * * Internal header file for AMBA KMI ports * * Copyright (C) 2000 Deep Blue Solutions Ltd. * * --------------------------------------------------------------------------- * From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical * Reference Manual - ARM DDI 0143B - see http://www.arm.com/ * --------------------------------------------------------------------------- */ #ifndef ASM_ARM_HARDWARE_AMBA_KMI_H #define ASM_ARM_HARDWARE_AMBA_KMI_H /* * KMI control register: * KMICR_TYPE 0 = PS2/AT mode, 1 = No line control bit mode * KMICR_RXINTREN 1 = enable RX interrupts * KMICR_TXINTREN 1 = enable TX interrupts * KMICR_EN 1 = enable KMI * KMICR_FD 1 = force KMI data low * KMICR_FC 1 = force KMI clock low */ #define KMICR (KMI_BASE + 0x00) #define KMICR_TYPE (1 << 5) #define KMICR_RXINTREN (1 << 4) #define KMICR_TXINTREN (1 << 3) #define KMICR_EN (1 << 2) #define KMICR_FD (1 << 1) #define KMICR_FC (1 << 0) /* * KMI status register: * KMISTAT_TXEMPTY 1 = transmitter register empty * KMISTAT_TXBUSY 1 = currently sending data * KMISTAT_RXFULL 1 = receiver register ready to be read * KMISTAT_RXBUSY 1 = currently receiving data * KMISTAT_RXPARITY parity of last databyte received * KMISTAT_IC current level of KMI clock input * KMISTAT_ID current level of KMI data input */ #define KMISTAT (KMI_BASE + 0x04) #define KMISTAT_TXEMPTY (1 << 6) #define KMISTAT_TXBUSY (1 << 5) #define KMISTAT_RXFULL (1 << 4) #define KMISTAT_RXBUSY (1 << 3) #define KMISTAT_RXPARITY (1 << 2) #define KMISTAT_IC (1 << 1) #define KMISTAT_ID (1 << 0) /* * KMI data register */ #define KMIDATA (KMI_BASE + 0x08) /* * KMI clock divisor: to generate 8MHz internal clock * div = (ref / 8MHz) - 1; 0 <= div <= 15 */ #define KMICLKDIV (KMI_BASE + 0x0c) /* * KMI interrupt register: * KMIIR_TXINTR 1 = transmit interrupt asserted * KMIIR_RXINTR 1 = receive interrupt asserted */ #define KMIIR (KMI_BASE + 0x10) #define KMIIR_TXINTR (1 << 1) #define KMIIR_RXINTR (1 << 0) /* * The size of the KMI primecell */ #define KMI_SIZE (0x100) #endif PK ! \�� � amba/pl022.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/amba/pl022.h * * Copyright (C) 2008-2009 ST-Ericsson AB * Copyright (C) 2006 STMicroelectronics Pvt. Ltd. * * Author: Linus Walleij <linus.walleij@stericsson.com> * * Initial version inspired by: * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c * Initial adoption to PL022 by: * Sachin Verma <sachin.verma@st.com> */ #ifndef _SSP_PL022_H #define _SSP_PL022_H #include <linux/types.h> /** * whether SSP is in loopback mode or not */ enum ssp_loopback { LOOPBACK_DISABLED, LOOPBACK_ENABLED }; /** * enum ssp_interface - interfaces allowed for this SSP Controller * @SSP_INTERFACE_MOTOROLA_SPI: Motorola Interface * @SSP_INTERFACE_TI_SYNC_SERIAL: Texas Instrument Synchronous Serial * interface * @SSP_INTERFACE_NATIONAL_MICROWIRE: National Semiconductor Microwire * interface * @SSP_INTERFACE_UNIDIRECTIONAL: Unidirectional interface (STn8810 * &STn8815 only) */ enum ssp_interface { SSP_INTERFACE_MOTOROLA_SPI, SSP_INTERFACE_TI_SYNC_SERIAL, SSP_INTERFACE_NATIONAL_MICROWIRE, SSP_INTERFACE_UNIDIRECTIONAL }; /** * enum ssp_hierarchy - whether SSP is configured as Master or Slave */ enum ssp_hierarchy { SSP_MASTER, SSP_SLAVE }; /** * enum ssp_clock_params - clock parameters, to set SSP clock at a * desired freq */ struct ssp_clock_params { u8 cpsdvsr; /* value from 2 to 254 (even only!) */ u8 scr; /* value from 0 to 255 */ }; /** * enum ssp_rx_endian - endianess of Rx FIFO Data * this feature is only available in ST versionf of PL022 */ enum ssp_rx_endian { SSP_RX_MSB, SSP_RX_LSB }; /** * enum ssp_tx_endian - endianess of Tx FIFO Data */ enum ssp_tx_endian { SSP_TX_MSB, SSP_TX_LSB }; /** * enum ssp_data_size - number of bits in one data element */ enum ssp_data_size { SSP_DATA_BITS_4 = 0x03, SSP_DATA_BITS_5, SSP_DATA_BITS_6, SSP_DATA_BITS_7, SSP_DATA_BITS_8, SSP_DATA_BITS_9, SSP_DATA_BITS_10, SSP_DATA_BITS_11, SSP_DATA_BITS_12, SSP_DATA_BITS_13, SSP_DATA_BITS_14, SSP_DATA_BITS_15, SSP_DATA_BITS_16, SSP_DATA_BITS_17, SSP_DATA_BITS_18, SSP_DATA_BITS_19, SSP_DATA_BITS_20, SSP_DATA_BITS_21, SSP_DATA_BITS_22, SSP_DATA_BITS_23, SSP_DATA_BITS_24, SSP_DATA_BITS_25, SSP_DATA_BITS_26, SSP_DATA_BITS_27, SSP_DATA_BITS_28, SSP_DATA_BITS_29, SSP_DATA_BITS_30, SSP_DATA_BITS_31, SSP_DATA_BITS_32 }; /** * enum ssp_mode - SSP mode of operation (Communication modes) */ enum ssp_mode { INTERRUPT_TRANSFER, POLLING_TRANSFER, DMA_TRANSFER }; /** * enum ssp_rx_level_trig - receive FIFO watermark level which triggers * IT: Interrupt fires when _N_ or more elements in RX FIFO. */ enum ssp_rx_level_trig { SSP_RX_1_OR_MORE_ELEM, SSP_RX_4_OR_MORE_ELEM, SSP_RX_8_OR_MORE_ELEM, SSP_RX_16_OR_MORE_ELEM, SSP_RX_32_OR_MORE_ELEM }; /** * Transmit FIFO watermark level which triggers (IT Interrupt fires * when _N_ or more empty locations in TX FIFO) */ enum ssp_tx_level_trig { SSP_TX_1_OR_MORE_EMPTY_LOC, SSP_TX_4_OR_MORE_EMPTY_LOC, SSP_TX_8_OR_MORE_EMPTY_LOC, SSP_TX_16_OR_MORE_EMPTY_LOC, SSP_TX_32_OR_MORE_EMPTY_LOC }; /** * enum SPI Clock Phase - clock phase (Motorola SPI interface only) * @SSP_CLK_FIRST_EDGE: Receive data on first edge transition (actual direction depends on polarity) * @SSP_CLK_SECOND_EDGE: Receive data on second edge transition (actual direction depends on polarity) */ enum ssp_spi_clk_phase { SSP_CLK_FIRST_EDGE, SSP_CLK_SECOND_EDGE }; /** * enum SPI Clock Polarity - clock polarity (Motorola SPI interface only) * @SSP_CLK_POL_IDLE_LOW: Low inactive level * @SSP_CLK_POL_IDLE_HIGH: High inactive level */ enum ssp_spi_clk_pol { SSP_CLK_POL_IDLE_LOW, SSP_CLK_POL_IDLE_HIGH }; /** * Microwire Conrol Lengths Command size in microwire format */ enum ssp_microwire_ctrl_len { SSP_BITS_4 = 0x03, SSP_BITS_5, SSP_BITS_6, SSP_BITS_7, SSP_BITS_8, SSP_BITS_9, SSP_BITS_10, SSP_BITS_11, SSP_BITS_12, SSP_BITS_13, SSP_BITS_14, SSP_BITS_15, SSP_BITS_16, SSP_BITS_17, SSP_BITS_18, SSP_BITS_19, SSP_BITS_20, SSP_BITS_21, SSP_BITS_22, SSP_BITS_23, SSP_BITS_24, SSP_BITS_25, SSP_BITS_26, SSP_BITS_27, SSP_BITS_28, SSP_BITS_29, SSP_BITS_30, SSP_BITS_31, SSP_BITS_32 }; /** * enum Microwire Wait State * @SSP_MWIRE_WAIT_ZERO: No wait state inserted after last command bit * @SSP_MWIRE_WAIT_ONE: One wait state inserted after last command bit */ enum ssp_microwire_wait_state { SSP_MWIRE_WAIT_ZERO, SSP_MWIRE_WAIT_ONE }; /** * enum ssp_duplex - whether Full/Half Duplex on microwire, only * available in the ST Micro variant. * @SSP_MICROWIRE_CHANNEL_FULL_DUPLEX: SSPTXD becomes bi-directional, * SSPRXD not used * @SSP_MICROWIRE_CHANNEL_HALF_DUPLEX: SSPTXD is an output, SSPRXD is * an input. */ enum ssp_duplex { SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, SSP_MICROWIRE_CHANNEL_HALF_DUPLEX }; /** * enum ssp_clkdelay - an optional clock delay on the feedback clock * only available in the ST Micro PL023 variant. * @SSP_FEEDBACK_CLK_DELAY_NONE: no delay, the data coming in from the * slave is sampled directly * @SSP_FEEDBACK_CLK_DELAY_1T: the incoming slave data is sampled with * a delay of T-dt * @SSP_FEEDBACK_CLK_DELAY_2T: dito with a delay if 2T-dt * @SSP_FEEDBACK_CLK_DELAY_3T: dito with a delay if 3T-dt * @SSP_FEEDBACK_CLK_DELAY_4T: dito with a delay if 4T-dt * @SSP_FEEDBACK_CLK_DELAY_5T: dito with a delay if 5T-dt * @SSP_FEEDBACK_CLK_DELAY_6T: dito with a delay if 6T-dt * @SSP_FEEDBACK_CLK_DELAY_7T: dito with a delay if 7T-dt */ enum ssp_clkdelay { SSP_FEEDBACK_CLK_DELAY_NONE, SSP_FEEDBACK_CLK_DELAY_1T, SSP_FEEDBACK_CLK_DELAY_2T, SSP_FEEDBACK_CLK_DELAY_3T, SSP_FEEDBACK_CLK_DELAY_4T, SSP_FEEDBACK_CLK_DELAY_5T, SSP_FEEDBACK_CLK_DELAY_6T, SSP_FEEDBACK_CLK_DELAY_7T }; /** * CHIP select/deselect commands */ enum ssp_chip_select { SSP_CHIP_SELECT, SSP_CHIP_DESELECT }; struct dma_chan; /** * struct pl022_ssp_master - device.platform_data for SPI controller devices. * @bus_id: identifier for this bus * @enable_dma: if true enables DMA driven transfers. * @dma_rx_param: parameter to locate an RX DMA channel. * @dma_tx_param: parameter to locate a TX DMA channel. * @autosuspend_delay: delay in ms following transfer completion before the * runtime power management system suspends the device. A setting of 0 * indicates no delay and the device will be suspended immediately. * @rt: indicates the controller should run the message pump with realtime * priority to minimise the transfer latency on the bus. */ struct pl022_ssp_controller { u16 bus_id; u8 enable_dma:1; bool (*dma_filter)(struct dma_chan *chan, void *filter_param); void *dma_rx_param; void *dma_tx_param; int autosuspend_delay; bool rt; }; /** * struct ssp_config_chip - spi_board_info.controller_data for SPI * slave devices, copied to spi_device.controller_data. * * @iface: Interface type(Motorola, TI, Microwire, Universal) * @hierarchy: sets whether interface is master or slave * @slave_tx_disable: SSPTXD is disconnected (in slave mode only) * @clk_freq: Tune freq parameters of SSP(when in master mode) * @com_mode: communication mode: polling, Interrupt or DMA * @rx_lev_trig: Rx FIFO watermark level (for IT & DMA mode) * @tx_lev_trig: Tx FIFO watermark level (for IT & DMA mode) * @ctrl_len: Microwire interface: Control length * @wait_state: Microwire interface: Wait state * @duplex: Microwire interface: Full/Half duplex * @clkdelay: on the PL023 variant, the delay in feeback clock cycles * before sampling the incoming line */ struct pl022_config_chip { enum ssp_interface iface; enum ssp_hierarchy hierarchy; bool slave_tx_disable; struct ssp_clock_params clk_freq; enum ssp_mode com_mode; enum ssp_rx_level_trig rx_lev_trig; enum ssp_tx_level_trig tx_lev_trig; enum ssp_microwire_ctrl_len ctrl_len; enum ssp_microwire_wait_state wait_state; enum ssp_duplex duplex; enum ssp_clkdelay clkdelay; }; #endif /* _SSP_PL022_H */ PK ! ϰ�J; ; amba/clcd.hnu �[��� /* * linux/include/asm-arm/hardware/amba_clcd.h -- Integrator LCD panel. * * David A Rusling * * Copyright (C) 2001 ARM Limited * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #include <linux/fb.h> #include <linux/amba/clcd-regs.h> enum { /* individual formats */ CLCD_CAP_RGB444 = (1 << 0), CLCD_CAP_RGB5551 = (1 << 1), CLCD_CAP_RGB565 = (1 << 2), CLCD_CAP_RGB888 = (1 << 3), CLCD_CAP_BGR444 = (1 << 4), CLCD_CAP_BGR5551 = (1 << 5), CLCD_CAP_BGR565 = (1 << 6), CLCD_CAP_BGR888 = (1 << 7), /* connection layouts */ CLCD_CAP_444 = CLCD_CAP_RGB444 | CLCD_CAP_BGR444, CLCD_CAP_5551 = CLCD_CAP_RGB5551 | CLCD_CAP_BGR5551, CLCD_CAP_565 = CLCD_CAP_RGB565 | CLCD_CAP_BGR565, CLCD_CAP_888 = CLCD_CAP_RGB888 | CLCD_CAP_BGR888, /* red/blue ordering */ CLCD_CAP_RGB = CLCD_CAP_RGB444 | CLCD_CAP_RGB5551 | CLCD_CAP_RGB565 | CLCD_CAP_RGB888, CLCD_CAP_BGR = CLCD_CAP_BGR444 | CLCD_CAP_BGR5551 | CLCD_CAP_BGR565 | CLCD_CAP_BGR888, CLCD_CAP_ALL = CLCD_CAP_BGR | CLCD_CAP_RGB, }; struct backlight_device; struct clcd_panel { struct fb_videomode mode; signed short width; /* width in mm */ signed short height; /* height in mm */ u32 tim2; u32 tim3; u32 cntl; u32 caps; unsigned int bpp:8, fixedtimings:1, grayscale:1; unsigned int connector; struct backlight_device *backlight; /* * If the B/R lines are switched between the CLCD * and the panel we need to know this and not try to * compensate with the BGR bit in the control register. */ bool bgr_connection; }; struct clcd_regs { u32 tim0; u32 tim1; u32 tim2; u32 tim3; u32 cntl; unsigned long pixclock; }; struct clcd_fb; /* * the board-type specific routines */ struct clcd_board { const char *name; /* * Optional. Hardware capability flags. */ u32 caps; /* * Optional. Check whether the var structure is acceptable * for this display. */ int (*check)(struct clcd_fb *fb, struct fb_var_screeninfo *var); /* * Compulsory. Decode fb->fb.var into regs->*. In the case of * fixed timing, set regs->* to the register values required. */ void (*decode)(struct clcd_fb *fb, struct clcd_regs *regs); /* * Optional. Disable any extra display hardware. */ void (*disable)(struct clcd_fb *); /* * Optional. Enable any extra display hardware. */ void (*enable)(struct clcd_fb *); /* * Setup platform specific parts of CLCD driver */ int (*setup)(struct clcd_fb *); /* * mmap the framebuffer memory */ int (*mmap)(struct clcd_fb *, struct vm_area_struct *); /* * Remove platform specific parts of CLCD driver */ void (*remove)(struct clcd_fb *); }; struct amba_device; struct clk; /* this data structure describes each frame buffer device we find */ struct clcd_fb { struct fb_info fb; struct amba_device *dev; struct clk *clk; struct clcd_panel *panel; struct clcd_board *board; void *board_data; void __iomem *regs; u16 off_ienb; u16 off_cntl; u32 clcd_cntl; u32 cmap[16]; bool clk_enabled; }; static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs) { struct fb_var_screeninfo *var = &fb->fb.var; u32 val, cpl; /* * Program the CLCD controller registers and start the CLCD */ val = ((var->xres / 16) - 1) << 2; val |= (var->hsync_len - 1) << 8; val |= (var->right_margin - 1) << 16; val |= (var->left_margin - 1) << 24; regs->tim0 = val; val = var->yres; if (fb->panel->cntl & CNTL_LCDDUAL) val /= 2; val -= 1; val |= (var->vsync_len - 1) << 10; val |= var->lower_margin << 16; val |= var->upper_margin << 24; regs->tim1 = val; val = fb->panel->tim2; val |= var->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS; val |= var->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS; cpl = var->xres_virtual; if (fb->panel->cntl & CNTL_LCDTFT) /* TFT */ /* / 1 */; else if (!var->grayscale) /* STN color */ cpl = cpl * 8 / 3; else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */ cpl /= 8; else /* STN monochrome, 4bit */ cpl /= 4; regs->tim2 = val | ((cpl - 1) << 16); regs->tim3 = fb->panel->tim3; val = fb->panel->cntl; if (var->grayscale) val |= CNTL_LCDBW; if (fb->panel->caps && fb->board->caps && var->bits_per_pixel >= 16) { /* * if board and panel supply capabilities, we can support * changing BGR/RGB depending on supplied parameters. Here * we switch to what the framebuffer is providing if need * be, so if the framebuffer is BGR but the display connection * is RGB (first case) we switch it around. Vice versa mutatis * mutandis if the framebuffer is RGB but the display connection * is BGR, we flip it around. */ if (var->red.offset == 0) val &= ~CNTL_BGR; else val |= CNTL_BGR; if (fb->panel->bgr_connection) val ^= CNTL_BGR; } switch (var->bits_per_pixel) { case 1: val |= CNTL_LCDBPP1; break; case 2: val |= CNTL_LCDBPP2; break; case 4: val |= CNTL_LCDBPP4; break; case 8: val |= CNTL_LCDBPP8; break; case 16: /* * PL110 cannot choose between 5551 and 565 modes in its * control register. It is possible to use 565 with * custom external wiring. */ if (amba_part(fb->dev) == 0x110 || var->green.length == 5) val |= CNTL_LCDBPP16; else if (var->green.length == 6) val |= CNTL_LCDBPP16_565; else val |= CNTL_LCDBPP16_444; break; case 32: val |= CNTL_LCDBPP24; break; } regs->cntl = val; regs->pixclock = var->pixclock; } static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) { var->xres_virtual = var->xres = (var->xres + 15) & ~15; var->yres_virtual = var->yres = (var->yres + 1) & ~1; #define CHECK(e,l,h) (var->e < l || var->e > h) if (CHECK(right_margin, (5+1), 256) || /* back porch */ CHECK(left_margin, (5+1), 256) || /* front porch */ CHECK(hsync_len, (5+1), 256) || var->xres > 4096 || var->lower_margin > 255 || /* back porch */ var->upper_margin > 255 || /* front porch */ var->vsync_len > 32 || var->yres > 1024) return -EINVAL; #undef CHECK /* single panel mode: PCD = max(PCD, 1) */ /* dual panel mode: PCD = max(PCD, 5) */ /* * You can't change the grayscale setting, and * we can only do non-interlaced video. */ if (var->grayscale != fb->fb.var.grayscale || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED) return -EINVAL; #define CHECK(e) (var->e != fb->fb.var.e) if (fb->panel->fixedtimings && (CHECK(xres) || CHECK(yres) || CHECK(bits_per_pixel) || CHECK(pixclock) || CHECK(left_margin) || CHECK(right_margin) || CHECK(upper_margin) || CHECK(lower_margin) || CHECK(hsync_len) || CHECK(vsync_len) || CHECK(sync))) return -EINVAL; #undef CHECK var->nonstd = 0; var->accel_flags = 0; return 0; } PK ! >�>� � amba/mmci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/amba/mmci.h */ #ifndef AMBA_MMCI_H #define AMBA_MMCI_H #include <linux/mmc/host.h> /** * struct mmci_platform_data - platform configuration for the MMCI * (also known as PL180) block. * @ocr_mask: available voltages on the 4 pins from the block, this * is ignored if a regulator is used, see the MMC_VDD_* masks in * mmc/host.h * @ios_handler: a callback function to act on specfic ios changes, * used for example to control a levelshifter * mask into a value to be binary (or set some other custom bits * in MMCIPWR) or:ed and written into the MMCIPWR register of the * block. May also control external power based on the power_mode. * @status: if no GPIO line was given to the block in this function will * be called to determine whether a card is present in the MMC slot or not */ struct mmci_platform_data { unsigned int ocr_mask; int (*ios_handler)(struct device *, struct mmc_ios *); unsigned int (*status)(struct device *); }; #endif PK ! ޯ�l�X �X bitmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_BITMAP_H #define __LINUX_BITMAP_H #ifndef __ASSEMBLY__ #include <linux/align.h> #include <linux/bitops.h> #include <linux/limits.h> #include <linux/string.h> #include <linux/types.h> struct device; /* * bitmaps provide bit arrays that consume one or more unsigned * longs. The bitmap interface and available operations are listed * here, in bitmap.h * * Function implementations generic to all architectures are in * lib/bitmap.c. Functions implementations that are architecture * specific are in various include/asm-<arch>/bitops.h headers * and other arch/<arch> specific files. * * See lib/bitmap.c for more details. */ /** * DOC: bitmap overview * * The available bitmap operations and their rough meaning in the * case that the bitmap is a single unsigned long are thus: * * The generated code is more efficient when nbits is known at * compile-time and at most BITS_PER_LONG. * * :: * * bitmap_zero(dst, nbits) *dst = 0UL * bitmap_fill(dst, nbits) *dst = ~0UL * bitmap_copy(dst, src, nbits) *dst = *src * bitmap_and(dst, src1, src2, nbits) *dst = *src1 & *src2 * bitmap_or(dst, src1, src2, nbits) *dst = *src1 | *src2 * bitmap_xor(dst, src1, src2, nbits) *dst = *src1 ^ *src2 * bitmap_andnot(dst, src1, src2, nbits) *dst = *src1 & ~(*src2) * bitmap_complement(dst, src, nbits) *dst = ~(*src) * bitmap_equal(src1, src2, nbits) Are *src1 and *src2 equal? * bitmap_intersects(src1, src2, nbits) Do *src1 and *src2 overlap? * bitmap_subset(src1, src2, nbits) Is *src1 a subset of *src2? * bitmap_empty(src, nbits) Are all bits zero in *src? * bitmap_full(src, nbits) Are all bits set in *src? * bitmap_weight(src, nbits) Hamming Weight: number set bits * bitmap_set(dst, pos, nbits) Set specified bit area * bitmap_clear(dst, pos, nbits) Clear specified bit area * bitmap_find_next_zero_area(buf, len, pos, n, mask) Find bit free area * bitmap_find_next_zero_area_off(buf, len, pos, n, mask, mask_off) as above * bitmap_next_clear_region(map, &start, &end, nbits) Find next clear region * bitmap_next_set_region(map, &start, &end, nbits) Find next set region * bitmap_for_each_clear_region(map, rs, re, start, end) * Iterate over all clear regions * bitmap_for_each_set_region(map, rs, re, start, end) * Iterate over all set regions * bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n * bitmap_shift_left(dst, src, n, nbits) *dst = *src << n * bitmap_cut(dst, src, first, n, nbits) Cut n bits from first, copy rest * bitmap_replace(dst, old, new, mask, nbits) *dst = (*old & ~(*mask)) | (*new & *mask) * bitmap_remap(dst, src, old, new, nbits) *dst = map(old, new)(src) * bitmap_bitremap(oldbit, old, new, nbits) newbit = map(old, new)(oldbit) * bitmap_onto(dst, orig, relmap, nbits) *dst = orig relative to relmap * bitmap_fold(dst, orig, sz, nbits) dst bits = orig bits mod sz * bitmap_parse(buf, buflen, dst, nbits) Parse bitmap dst from kernel buf * bitmap_parse_user(ubuf, ulen, dst, nbits) Parse bitmap dst from user buf * bitmap_parselist(buf, dst, nbits) Parse bitmap dst from kernel buf * bitmap_parselist_user(buf, dst, nbits) Parse bitmap dst from user buf * bitmap_find_free_region(bitmap, bits, order) Find and allocate bit region * bitmap_release_region(bitmap, pos, order) Free specified bit region * bitmap_allocate_region(bitmap, pos, order) Allocate specified bit region * bitmap_from_arr32(dst, buf, nbits) Copy nbits from u32[] buf to dst * bitmap_to_arr32(buf, src, nbits) Copy nbits from buf to u32[] dst * bitmap_get_value8(map, start) Get 8bit value from map at start * bitmap_set_value8(map, value, start) Set 8bit value to map at start * * Note, bitmap_zero() and bitmap_fill() operate over the region of * unsigned longs, that is, bits behind bitmap till the unsigned long * boundary will be zeroed or filled as well. Consider to use * bitmap_clear() or bitmap_set() to make explicit zeroing or filling * respectively. */ /** * DOC: bitmap bitops * * Also the following operations in asm/bitops.h apply to bitmaps.:: * * set_bit(bit, addr) *addr |= bit * clear_bit(bit, addr) *addr &= ~bit * change_bit(bit, addr) *addr ^= bit * test_bit(bit, addr) Is bit set in *addr? * test_and_set_bit(bit, addr) Set bit and return old value * test_and_clear_bit(bit, addr) Clear bit and return old value * test_and_change_bit(bit, addr) Change bit and return old value * find_first_zero_bit(addr, nbits) Position first zero bit in *addr * find_first_bit(addr, nbits) Position first set bit in *addr * find_next_zero_bit(addr, nbits, bit) * Position next zero bit in *addr >= bit * find_next_bit(addr, nbits, bit) Position next set bit in *addr >= bit * find_next_and_bit(addr1, addr2, nbits, bit) * Same as find_next_bit, but in * (*addr1 & *addr2) * */ /** * DOC: declare bitmap * The DECLARE_BITMAP(name,bits) macro, in linux/types.h, can be used * to declare an array named 'name' of just enough unsigned longs to * contain all bit positions from 0 to 'bits' - 1. */ /* * Allocation and deallocation of bitmap. * Provided in lib/bitmap.c to avoid circular dependency. */ unsigned long *bitmap_alloc(unsigned int nbits, gfp_t flags); unsigned long *bitmap_zalloc(unsigned int nbits, gfp_t flags); unsigned long *bitmap_alloc_node(unsigned int nbits, gfp_t flags, int node); unsigned long *bitmap_zalloc_node(unsigned int nbits, gfp_t flags, int node); void bitmap_free(const unsigned long *bitmap); /* Managed variants of the above. */ unsigned long *devm_bitmap_alloc(struct device *dev, unsigned int nbits, gfp_t flags); unsigned long *devm_bitmap_zalloc(struct device *dev, unsigned int nbits, gfp_t flags); /* * lib/bitmap.c provides these functions: */ int __bitmap_equal(const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); bool __pure __bitmap_or_equal(const unsigned long *src1, const unsigned long *src2, const unsigned long *src3, unsigned int nbits); void __bitmap_complement(unsigned long *dst, const unsigned long *src, unsigned int nbits); void __bitmap_shift_right(unsigned long *dst, const unsigned long *src, unsigned int shift, unsigned int nbits); void __bitmap_shift_left(unsigned long *dst, const unsigned long *src, unsigned int shift, unsigned int nbits); void bitmap_cut(unsigned long *dst, const unsigned long *src, unsigned int first, unsigned int cut, unsigned int nbits); int __bitmap_and(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); int __bitmap_andnot(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); void __bitmap_replace(unsigned long *dst, const unsigned long *old, const unsigned long *new, const unsigned long *mask, unsigned int nbits); int __bitmap_intersects(const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); int __bitmap_subset(const unsigned long *bitmap1, const unsigned long *bitmap2, unsigned int nbits); int __bitmap_weight(const unsigned long *bitmap, unsigned int nbits); void __bitmap_set(unsigned long *map, unsigned int start, int len); void __bitmap_clear(unsigned long *map, unsigned int start, int len); unsigned long bitmap_find_next_zero_area_off(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, unsigned long align_mask, unsigned long align_offset); /** * bitmap_find_next_zero_area - find a contiguous aligned zero area * @map: The address to base the search on * @size: The bitmap size in bits * @start: The bitnumber to start searching at * @nr: The number of zeroed bits we're looking for * @align_mask: Alignment mask for zero area * * The @align_mask should be one less than a power of 2; the effect is that * the bit offset of all zero areas this function finds is multiples of that * power of 2. A @align_mask of 0 means no alignment is required. */ static inline unsigned long bitmap_find_next_zero_area(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, unsigned long align_mask) { return bitmap_find_next_zero_area_off(map, size, start, nr, align_mask, 0); } int bitmap_parse(const char *buf, unsigned int buflen, unsigned long *dst, int nbits); int bitmap_parse_user(const char __user *ubuf, unsigned int ulen, unsigned long *dst, int nbits); int bitmap_parselist(const char *buf, unsigned long *maskp, int nmaskbits); int bitmap_parselist_user(const char __user *ubuf, unsigned int ulen, unsigned long *dst, int nbits); void bitmap_remap(unsigned long *dst, const unsigned long *src, const unsigned long *old, const unsigned long *new, unsigned int nbits); int bitmap_bitremap(int oldbit, const unsigned long *old, const unsigned long *new, int bits); void bitmap_onto(unsigned long *dst, const unsigned long *orig, const unsigned long *relmap, unsigned int bits); void bitmap_fold(unsigned long *dst, const unsigned long *orig, unsigned int sz, unsigned int nbits); int bitmap_find_free_region(unsigned long *bitmap, unsigned int bits, int order); void bitmap_release_region(unsigned long *bitmap, unsigned int pos, int order); int bitmap_allocate_region(unsigned long *bitmap, unsigned int pos, int order); #ifdef __BIG_ENDIAN void bitmap_copy_le(unsigned long *dst, const unsigned long *src, unsigned int nbits); #else #define bitmap_copy_le bitmap_copy #endif unsigned int bitmap_ord_to_pos(const unsigned long *bitmap, unsigned int ord, unsigned int nbits); int bitmap_print_to_pagebuf(bool list, char *buf, const unsigned long *maskp, int nmaskbits); extern int bitmap_print_bitmask_to_buf(char *buf, const unsigned long *maskp, int nmaskbits, loff_t off, size_t count); extern int bitmap_print_list_to_buf(char *buf, const unsigned long *maskp, int nmaskbits, loff_t off, size_t count); #define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1))) #define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1))) #define bitmap_size(nbits) (ALIGN(nbits, BITS_PER_LONG) / BITS_PER_BYTE) static inline void bitmap_zero(unsigned long *dst, unsigned int nbits) { unsigned int len = bitmap_size(nbits); memset(dst, 0, len); } static inline void bitmap_fill(unsigned long *dst, unsigned int nbits) { unsigned int len = bitmap_size(nbits); memset(dst, 0xff, len); } static inline void bitmap_copy(unsigned long *dst, const unsigned long *src, unsigned int nbits) { unsigned int len = bitmap_size(nbits); memcpy(dst, src, len); } /* * Copy bitmap and clear tail bits in last word. */ static inline void bitmap_copy_clear_tail(unsigned long *dst, const unsigned long *src, unsigned int nbits) { bitmap_copy(dst, src, nbits); if (nbits % BITS_PER_LONG) dst[nbits / BITS_PER_LONG] &= BITMAP_LAST_WORD_MASK(nbits); } static inline void bitmap_copy_and_extend(unsigned long *to, const unsigned long *from, unsigned int count, unsigned int size) { unsigned int copy = BITS_TO_LONGS(count); memcpy(to, from, copy * sizeof(long)); if (count % BITS_PER_LONG) to[copy - 1] &= BITMAP_LAST_WORD_MASK(count); memset(to + copy, 0, bitmap_size(size) - copy * sizeof(long)); } /* * On 32-bit systems bitmaps are represented as u32 arrays internally, and * therefore conversion is not needed when copying data from/to arrays of u32. */ #if BITS_PER_LONG == 64 void bitmap_from_arr32(unsigned long *bitmap, const u32 *buf, unsigned int nbits); void bitmap_to_arr32(u32 *buf, const unsigned long *bitmap, unsigned int nbits); #else #define bitmap_from_arr32(bitmap, buf, nbits) \ bitmap_copy_clear_tail((unsigned long *) (bitmap), \ (const unsigned long *) (buf), (nbits)) #define bitmap_to_arr32(buf, bitmap, nbits) \ bitmap_copy_clear_tail((unsigned long *) (buf), \ (const unsigned long *) (bitmap), (nbits)) #endif static inline int bitmap_and(unsigned long *dst, const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) return (*dst = *src1 & *src2 & BITMAP_LAST_WORD_MASK(nbits)) != 0; return __bitmap_and(dst, src1, src2, nbits); } static inline void bitmap_or(unsigned long *dst, const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) *dst = *src1 | *src2; else __bitmap_or(dst, src1, src2, nbits); } static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) *dst = *src1 ^ *src2; else __bitmap_xor(dst, src1, src2, nbits); } static inline int bitmap_andnot(unsigned long *dst, const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) return (*dst = *src1 & ~(*src2) & BITMAP_LAST_WORD_MASK(nbits)) != 0; return __bitmap_andnot(dst, src1, src2, nbits); } static inline void bitmap_complement(unsigned long *dst, const unsigned long *src, unsigned int nbits) { if (small_const_nbits(nbits)) *dst = ~(*src); else __bitmap_complement(dst, src, nbits); } #ifdef __LITTLE_ENDIAN #define BITMAP_MEM_ALIGNMENT 8 #else #define BITMAP_MEM_ALIGNMENT (8 * sizeof(unsigned long)) #endif #define BITMAP_MEM_MASK (BITMAP_MEM_ALIGNMENT - 1) static inline int bitmap_equal(const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) return !((*src1 ^ *src2) & BITMAP_LAST_WORD_MASK(nbits)); if (__builtin_constant_p(nbits & BITMAP_MEM_MASK) && IS_ALIGNED(nbits, BITMAP_MEM_ALIGNMENT)) return !memcmp(src1, src2, nbits / 8); return __bitmap_equal(src1, src2, nbits); } /** * bitmap_or_equal - Check whether the or of two bitmaps is equal to a third * @src1: Pointer to bitmap 1 * @src2: Pointer to bitmap 2 will be or'ed with bitmap 1 * @src3: Pointer to bitmap 3. Compare to the result of *@src1 | *@src2 * @nbits: number of bits in each of these bitmaps * * Returns: True if (*@src1 | *@src2) == *@src3, false otherwise */ static inline bool bitmap_or_equal(const unsigned long *src1, const unsigned long *src2, const unsigned long *src3, unsigned int nbits) { if (!small_const_nbits(nbits)) return __bitmap_or_equal(src1, src2, src3, nbits); return !(((*src1 | *src2) ^ *src3) & BITMAP_LAST_WORD_MASK(nbits)); } static inline int bitmap_intersects(const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) return ((*src1 & *src2) & BITMAP_LAST_WORD_MASK(nbits)) != 0; else return __bitmap_intersects(src1, src2, nbits); } static inline int bitmap_subset(const unsigned long *src1, const unsigned long *src2, unsigned int nbits) { if (small_const_nbits(nbits)) return ! ((*src1 & ~(*src2)) & BITMAP_LAST_WORD_MASK(nbits)); else return __bitmap_subset(src1, src2, nbits); } static inline bool bitmap_empty(const unsigned long *src, unsigned nbits) { if (small_const_nbits(nbits)) return ! (*src & BITMAP_LAST_WORD_MASK(nbits)); return find_first_bit(src, nbits) == nbits; } static inline bool bitmap_full(const unsigned long *src, unsigned int nbits) { if (small_const_nbits(nbits)) return ! (~(*src) & BITMAP_LAST_WORD_MASK(nbits)); return find_first_zero_bit(src, nbits) == nbits; } static __always_inline int bitmap_weight(const unsigned long *src, unsigned int nbits) { if (small_const_nbits(nbits)) return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits)); return __bitmap_weight(src, nbits); } static __always_inline void bitmap_set(unsigned long *map, unsigned int start, unsigned int nbits) { if (__builtin_constant_p(nbits) && nbits == 1) __set_bit(start, map); else if (__builtin_constant_p(start & BITMAP_MEM_MASK) && IS_ALIGNED(start, BITMAP_MEM_ALIGNMENT) && __builtin_constant_p(nbits & BITMAP_MEM_MASK) && IS_ALIGNED(nbits, BITMAP_MEM_ALIGNMENT)) memset((char *)map + start / 8, 0xff, nbits / 8); else __bitmap_set(map, start, nbits); } static __always_inline void bitmap_clear(unsigned long *map, unsigned int start, unsigned int nbits) { if (__builtin_constant_p(nbits) && nbits == 1) __clear_bit(start, map); else if (__builtin_constant_p(start & BITMAP_MEM_MASK) && IS_ALIGNED(start, BITMAP_MEM_ALIGNMENT) && __builtin_constant_p(nbits & BITMAP_MEM_MASK) && IS_ALIGNED(nbits, BITMAP_MEM_ALIGNMENT)) memset((char *)map + start / 8, 0, nbits / 8); else __bitmap_clear(map, start, nbits); } static inline void bitmap_shift_right(unsigned long *dst, const unsigned long *src, unsigned int shift, unsigned int nbits) { if (small_const_nbits(nbits)) *dst = (*src & BITMAP_LAST_WORD_MASK(nbits)) >> shift; else __bitmap_shift_right(dst, src, shift, nbits); } static inline void bitmap_shift_left(unsigned long *dst, const unsigned long *src, unsigned int shift, unsigned int nbits) { if (small_const_nbits(nbits)) *dst = (*src << shift) & BITMAP_LAST_WORD_MASK(nbits); else __bitmap_shift_left(dst, src, shift, nbits); } static inline void bitmap_replace(unsigned long *dst, const unsigned long *old, const unsigned long *new, const unsigned long *mask, unsigned int nbits) { if (small_const_nbits(nbits)) *dst = (*old & ~(*mask)) | (*new & *mask); else __bitmap_replace(dst, old, new, mask, nbits); } static inline void bitmap_next_clear_region(unsigned long *bitmap, unsigned int *rs, unsigned int *re, unsigned int end) { *rs = find_next_zero_bit(bitmap, end, *rs); *re = find_next_bit(bitmap, end, *rs + 1); } static inline void bitmap_next_set_region(unsigned long *bitmap, unsigned int *rs, unsigned int *re, unsigned int end) { *rs = find_next_bit(bitmap, end, *rs); *re = find_next_zero_bit(bitmap, end, *rs + 1); } /* * Bitmap region iterators. Iterates over the bitmap between [@start, @end). * @rs and @re should be integer variables and will be set to start and end * index of the current clear or set region. */ #define bitmap_for_each_clear_region(bitmap, rs, re, start, end) \ for ((rs) = (start), \ bitmap_next_clear_region((bitmap), &(rs), &(re), (end)); \ (rs) < (re); \ (rs) = (re) + 1, \ bitmap_next_clear_region((bitmap), &(rs), &(re), (end))) #define bitmap_for_each_set_region(bitmap, rs, re, start, end) \ for ((rs) = (start), \ bitmap_next_set_region((bitmap), &(rs), &(re), (end)); \ (rs) < (re); \ (rs) = (re) + 1, \ bitmap_next_set_region((bitmap), &(rs), &(re), (end))) /** * BITMAP_FROM_U64() - Represent u64 value in the format suitable for bitmap. * @n: u64 value * * Linux bitmaps are internally arrays of unsigned longs, i.e. 32-bit * integers in 32-bit environment, and 64-bit integers in 64-bit one. * * There are four combinations of endianness and length of the word in linux * ABIs: LE64, BE64, LE32 and BE32. * * On 64-bit kernels 64-bit LE and BE numbers are naturally ordered in * bitmaps and therefore don't require any special handling. * * On 32-bit kernels 32-bit LE ABI orders lo word of 64-bit number in memory * prior to hi, and 32-bit BE orders hi word prior to lo. The bitmap on the * other hand is represented as an array of 32-bit words and the position of * bit N may therefore be calculated as: word #(N/32) and bit #(N%32) in that * word. For example, bit #42 is located at 10th position of 2nd word. * It matches 32-bit LE ABI, and we can simply let the compiler store 64-bit * values in memory as it usually does. But for BE we need to swap hi and lo * words manually. * * With all that, the macro BITMAP_FROM_U64() does explicit reordering of hi and * lo parts of u64. For LE32 it does nothing, and for BE environment it swaps * hi and lo words, as is expected by bitmap. */ #if __BITS_PER_LONG == 64 #define BITMAP_FROM_U64(n) (n) #else #define BITMAP_FROM_U64(n) ((unsigned long) ((u64)(n) & ULONG_MAX)), \ ((unsigned long) ((u64)(n) >> 32)) #endif /** * bitmap_from_u64 - Check and swap words within u64. * @mask: source bitmap * @dst: destination bitmap * * In 32-bit Big Endian kernel, when using ``(u32 *)(&val)[*]`` * to read u64 mask, we will get the wrong word. * That is ``(u32 *)(&val)[0]`` gets the upper 32 bits, * but we expect the lower 32-bits of u64. */ static inline void bitmap_from_u64(unsigned long *dst, u64 mask) { dst[0] = mask & ULONG_MAX; if (sizeof(mask) > sizeof(unsigned long)) dst[1] = mask >> 32; } /** * bitmap_get_value8 - get an 8-bit value within a memory region * @map: address to the bitmap memory region * @start: bit offset of the 8-bit value; must be a multiple of 8 * * Returns the 8-bit value located at the @start bit offset within the @src * memory region. */ static inline unsigned long bitmap_get_value8(const unsigned long *map, unsigned long start) { const size_t index = BIT_WORD(start); const unsigned long offset = start % BITS_PER_LONG; return (map[index] >> offset) & 0xFF; } /** * bitmap_set_value8 - set an 8-bit value within a memory region * @map: address to the bitmap memory region * @value: the 8-bit value; values wider than 8 bits may clobber bitmap * @start: bit offset of the 8-bit value; must be a multiple of 8 */ static inline void bitmap_set_value8(unsigned long *map, unsigned long value, unsigned long start) { const size_t index = BIT_WORD(start); const unsigned long offset = start % BITS_PER_LONG; map[index] &= ~(0xFFUL << offset); map[index] |= value << offset; } #endif /* __ASSEMBLY__ */ #endif /* __LINUX_BITMAP_H */ PK ! J�M�r� r� clk.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/include/linux/clk.h * * Copyright (C) 2004 ARM Limited. * Written by Deep Blue Solutions Limited. * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> */ #ifndef __LINUX_CLK_H #define __LINUX_CLK_H #include <linux/err.h> #include <linux/kernel.h> #include <linux/notifier.h> struct device; struct clk; struct device_node; struct of_phandle_args; /** * DOC: clk notifier callback types * * PRE_RATE_CHANGE - called immediately before the clk rate is changed, * to indicate that the rate change will proceed. Drivers must * immediately terminate any operations that will be affected by the * rate change. Callbacks may either return NOTIFY_DONE, NOTIFY_OK, * NOTIFY_STOP or NOTIFY_BAD. * * ABORT_RATE_CHANGE: called if the rate change failed for some reason * after PRE_RATE_CHANGE. In this case, all registered notifiers on * the clk will be called with ABORT_RATE_CHANGE. Callbacks must * always return NOTIFY_DONE or NOTIFY_OK. * * POST_RATE_CHANGE - called after the clk rate change has successfully * completed. Callbacks must always return NOTIFY_DONE or NOTIFY_OK. * */ #define PRE_RATE_CHANGE BIT(0) #define POST_RATE_CHANGE BIT(1) #define ABORT_RATE_CHANGE BIT(2) /** * struct clk_notifier - associate a clk with a notifier * @clk: struct clk * to associate the notifier with * @notifier_head: a blocking_notifier_head for this clk * @node: linked list pointers * * A list of struct clk_notifier is maintained by the notifier code. * An entry is created whenever code registers the first notifier on a * particular @clk. Future notifiers on that @clk are added to the * @notifier_head. */ struct clk_notifier { struct clk *clk; struct srcu_notifier_head notifier_head; struct list_head node; }; /** * struct clk_notifier_data - rate data to pass to the notifier callback * @clk: struct clk * being changed * @old_rate: previous rate of this clk * @new_rate: new rate of this clk * * For a pre-notifier, old_rate is the clk's rate before this rate * change, and new_rate is what the rate will be in the future. For a * post-notifier, old_rate and new_rate are both set to the clk's * current rate (this was done to optimize the implementation). */ struct clk_notifier_data { struct clk *clk; unsigned long old_rate; unsigned long new_rate; }; /** * struct clk_bulk_data - Data used for bulk clk operations. * * @id: clock consumer ID * @clk: struct clk * to store the associated clock * * The CLK APIs provide a series of clk_bulk_() API calls as * a convenience to consumers which require multiple clks. This * structure is used to manage data for these calls. */ struct clk_bulk_data { const char *id; struct clk *clk; }; #ifdef CONFIG_COMMON_CLK /** * clk_notifier_register - register a clock rate-change notifier callback * @clk: clock whose rate we are interested in * @nb: notifier block with callback function pointer * * ProTip: debugging across notifier chains can be frustrating. Make sure that * your notifier callback function prints a nice big warning in case of * failure. */ int clk_notifier_register(struct clk *clk, struct notifier_block *nb); /** * clk_notifier_unregister - unregister a clock rate-change notifier callback * @clk: clock whose rate we are no longer interested in * @nb: notifier block which will be unregistered */ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb); /** * devm_clk_notifier_register - register a managed rate-change notifier callback * @dev: device for clock "consumer" * @clk: clock whose rate we are interested in * @nb: notifier block with callback function pointer * * Returns 0 on success, -EERROR otherwise */ int devm_clk_notifier_register(struct device *dev, struct clk *clk, struct notifier_block *nb); /** * clk_get_accuracy - obtain the clock accuracy in ppb (parts per billion) * for a clock source. * @clk: clock source * * This gets the clock source accuracy expressed in ppb. * A perfect clock returns 0. */ long clk_get_accuracy(struct clk *clk); /** * clk_set_phase - adjust the phase shift of a clock signal * @clk: clock signal source * @degrees: number of degrees the signal is shifted * * Shifts the phase of a clock signal by the specified degrees. Returns 0 on * success, -EERROR otherwise. */ int clk_set_phase(struct clk *clk, int degrees); /** * clk_get_phase - return the phase shift of a clock signal * @clk: clock signal source * * Returns the phase shift of a clock node in degrees, otherwise returns * -EERROR. */ int clk_get_phase(struct clk *clk); /** * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal * @clk: clock signal source * @num: numerator of the duty cycle ratio to be applied * @den: denominator of the duty cycle ratio to be applied * * Adjust the duty cycle of a clock signal by the specified ratio. Returns 0 on * success, -EERROR otherwise. */ int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den); /** * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal * @clk: clock signal source * @scale: scaling factor to be applied to represent the ratio as an integer * * Returns the duty cycle ratio multiplied by the scale provided, otherwise * returns -EERROR. */ int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale); /** * clk_is_match - check if two clk's point to the same hardware clock * @p: clk compared against q * @q: clk compared against p * * Returns true if the two struct clk pointers both point to the same hardware * clock node. Put differently, returns true if @p and @q * share the same &struct clk_core object. * * Returns false otherwise. Note that two NULL clks are treated as matching. */ bool clk_is_match(const struct clk *p, const struct clk *q); /** * clk_rate_exclusive_get - get exclusivity over the rate control of a * producer * @clk: clock source * * This function allows drivers to get exclusive control over the rate of a * provider. It prevents any other consumer to execute, even indirectly, * opereation which could alter the rate of the provider or cause glitches * * If exlusivity is claimed more than once on clock, even by the same driver, * the rate effectively gets locked as exclusivity can't be preempted. * * Must not be called from within atomic context. * * Returns success (0) or negative errno. */ int clk_rate_exclusive_get(struct clk *clk); /** * devm_clk_rate_exclusive_get - devm variant of clk_rate_exclusive_get * @dev: device the exclusivity is bound to * @clk: clock source * * Calls clk_rate_exclusive_get() on @clk and registers a devm cleanup handler * on @dev to call clk_rate_exclusive_put(). * * Must not be called from within atomic context. */ int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk); /** * clk_rate_exclusive_put - release exclusivity over the rate control of a * producer * @clk: clock source * * This function allows drivers to release the exclusivity it previously got * from clk_rate_exclusive_get() * * The caller must balance the number of clk_rate_exclusive_get() and * clk_rate_exclusive_put() calls. * * Must not be called from within atomic context. */ void clk_rate_exclusive_put(struct clk *clk); #else static inline int clk_notifier_register(struct clk *clk, struct notifier_block *nb) { return -ENOTSUPP; } static inline int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) { return -ENOTSUPP; } static inline int devm_clk_notifier_register(struct device *dev, struct clk *clk, struct notifier_block *nb) { return -ENOTSUPP; } static inline long clk_get_accuracy(struct clk *clk) { return -ENOTSUPP; } static inline long clk_set_phase(struct clk *clk, int phase) { return -ENOTSUPP; } static inline long clk_get_phase(struct clk *clk) { return -ENOTSUPP; } static inline int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den) { return -ENOTSUPP; } static inline unsigned int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale) { return 0; } static inline bool clk_is_match(const struct clk *p, const struct clk *q) { return p == q; } static inline int clk_rate_exclusive_get(struct clk *clk) { return 0; } static inline int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk) { return 0; } static inline void clk_rate_exclusive_put(struct clk *clk) {} #endif #ifdef CONFIG_HAVE_CLK_PREPARE /** * clk_prepare - prepare a clock source * @clk: clock source * * This prepares the clock source for use. * * Must not be called from within atomic context. */ int clk_prepare(struct clk *clk); int __must_check clk_bulk_prepare(int num_clks, const struct clk_bulk_data *clks); /** * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it. * @clk: clock source * * Returns true if clk_prepare() implicitly enables the clock, effectively * making clk_enable()/clk_disable() no-ops, false otherwise. * * This is of interest mainly to the power management code where actually * disabling the clock also requires unpreparing it to have any material * effect. * * Regardless of the value returned here, the caller must always invoke * clk_enable() or clk_prepare_enable() and counterparts for usage counts * to be right. */ bool clk_is_enabled_when_prepared(struct clk *clk); #else static inline int clk_prepare(struct clk *clk) { might_sleep(); return 0; } static inline int __must_check clk_bulk_prepare(int num_clks, const struct clk_bulk_data *clks) { might_sleep(); return 0; } static inline bool clk_is_enabled_when_prepared(struct clk *clk) { return false; } #endif /** * clk_unprepare - undo preparation of a clock source * @clk: clock source * * This undoes a previously prepared clock. The caller must balance * the number of prepare and unprepare calls. * * Must not be called from within atomic context. */ #ifdef CONFIG_HAVE_CLK_PREPARE void clk_unprepare(struct clk *clk); void clk_bulk_unprepare(int num_clks, const struct clk_bulk_data *clks); #else static inline void clk_unprepare(struct clk *clk) { might_sleep(); } static inline void clk_bulk_unprepare(int num_clks, const struct clk_bulk_data *clks) { might_sleep(); } #endif #ifdef CONFIG_HAVE_CLK /** * clk_get - lookup and obtain a reference to a clock producer. * @dev: device for clock "consumer" * @id: clock consumer ID * * Returns a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev and @id to determine the clock consumer, and thereby * the clock producer. (IOW, @id may be identical strings, but * clk_get may return different clock producers depending on @dev.) * * Drivers must assume that the clock source is not enabled. * * clk_get should not be called from within interrupt context. */ struct clk *clk_get(struct device *dev, const char *id); /** * clk_bulk_get - lookup and obtain a number of references to clock producer. * @dev: device for clock "consumer" * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * This helper function allows drivers to get several clk consumers in one * operation. If any of the clk cannot be acquired then any clks * that were obtained will be freed before returning to the caller. * * Returns 0 if all clocks specified in clk_bulk_data table are obtained * successfully, or valid IS_ERR() condition containing errno. * The implementation uses @dev and @clk_bulk_data.id to determine the * clock consumer, and thereby the clock producer. * The clock returned is stored in each @clk_bulk_data.clk field. * * Drivers must assume that the clock source is not enabled. * * clk_bulk_get should not be called from within interrupt context. */ int __must_check clk_bulk_get(struct device *dev, int num_clks, struct clk_bulk_data *clks); /** * clk_bulk_get_all - lookup and obtain all available references to clock * producer. * @dev: device for clock "consumer" * @clks: pointer to the clk_bulk_data table of consumer * * This helper function allows drivers to get all clk consumers in one * operation. If any of the clk cannot be acquired then any clks * that were obtained will be freed before returning to the caller. * * Returns a positive value for the number of clocks obtained while the * clock references are stored in the clk_bulk_data table in @clks field. * Returns 0 if there're none and a negative value if something failed. * * Drivers must assume that the clock source is not enabled. * * clk_bulk_get should not be called from within interrupt context. */ int __must_check clk_bulk_get_all(struct device *dev, struct clk_bulk_data **clks); /** * clk_bulk_get_optional - lookup and obtain a number of references to clock producer * @dev: device for clock "consumer" * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * Behaves the same as clk_bulk_get() except where there is no clock producer. * In this case, instead of returning -ENOENT, the function returns 0 and * NULL for a clk for which a clock producer could not be determined. */ int __must_check clk_bulk_get_optional(struct device *dev, int num_clks, struct clk_bulk_data *clks); /** * devm_clk_bulk_get - managed get multiple clk consumers * @dev: device for clock "consumer" * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * Return 0 on success, an errno on failure. * * This helper function allows drivers to get several clk * consumers in one operation with management, the clks will * automatically be freed when the device is unbound. */ int __must_check devm_clk_bulk_get(struct device *dev, int num_clks, struct clk_bulk_data *clks); /** * devm_clk_bulk_get_optional - managed get multiple optional consumer clocks * @dev: device for clock "consumer" * @num_clks: the number of clk_bulk_data * @clks: pointer to the clk_bulk_data table of consumer * * Behaves the same as devm_clk_bulk_get() except where there is no clock * producer. In this case, instead of returning -ENOENT, the function returns * NULL for given clk. It is assumed all clocks in clk_bulk_data are optional. * * Returns 0 if all clocks specified in clk_bulk_data table are obtained * successfully or for any clk there was no clk provider available, otherwise * returns valid IS_ERR() condition containing errno. * The implementation uses @dev and @clk_bulk_data.id to determine the * clock consumer, and thereby the clock producer. * The clock returned is stored in each @clk_bulk_data.clk field. * * Drivers must assume that the clock source is not enabled. * * clk_bulk_get should not be called from within interrupt context. */ int __must_check devm_clk_bulk_get_optional(struct device *dev, int num_clks, struct clk_bulk_data *clks); /** * devm_clk_bulk_get_all - managed get multiple clk consumers * @dev: device for clock "consumer" * @clks: pointer to the clk_bulk_data table of consumer * * Returns a positive value for the number of clocks obtained while the * clock references are stored in the clk_bulk_data table in @clks field. * Returns 0 if there're none and a negative value if something failed. * * This helper function allows drivers to get several clk * consumers in one operation with management, the clks will * automatically be freed when the device is unbound. */ int __must_check devm_clk_bulk_get_all(struct device *dev, struct clk_bulk_data **clks); /** * devm_clk_get - lookup and obtain a managed reference to a clock producer. * @dev: device for clock "consumer" * @id: clock consumer ID * * Returns a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev and @id to determine the clock consumer, and thereby * the clock producer. (IOW, @id may be identical strings, but * clk_get may return different clock producers depending on @dev.) * * Drivers must assume that the clock source is not enabled. * * devm_clk_get should not be called from within interrupt context. * * The clock will automatically be freed when the device is unbound * from the bus. */ struct clk *devm_clk_get(struct device *dev, const char *id); /** * devm_clk_get_prepared - devm_clk_get() + clk_prepare() * @dev: device for clock "consumer" * @id: clock consumer ID * * Context: May sleep. * * Return: a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev and @id to determine the clock consumer, and thereby * the clock producer. (IOW, @id may be identical strings, but * clk_get may return different clock producers depending on @dev.) * * The returned clk (if valid) is prepared. Drivers must however assume * that the clock is not enabled. * * The clock will automatically be unprepared and freed when the device * is unbound from the bus. */ struct clk *devm_clk_get_prepared(struct device *dev, const char *id); /** * devm_clk_get_enabled - devm_clk_get() + clk_prepare_enable() * @dev: device for clock "consumer" * @id: clock consumer ID * * Context: May sleep. * * Return: a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev and @id to determine the clock consumer, and thereby * the clock producer. (IOW, @id may be identical strings, but * clk_get may return different clock producers depending on @dev.) * * The returned clk (if valid) is prepared and enabled. * * The clock will automatically be disabled, unprepared and freed * when the device is unbound from the bus. */ struct clk *devm_clk_get_enabled(struct device *dev, const char *id); /** * devm_clk_get_optional - lookup and obtain a managed reference to an optional * clock producer. * @dev: device for clock "consumer" * @id: clock consumer ID * * Behaves the same as devm_clk_get() except where there is no clock producer. * In this case, instead of returning -ENOENT, the function returns NULL. */ struct clk *devm_clk_get_optional(struct device *dev, const char *id); /** * devm_clk_get_optional_prepared - devm_clk_get_optional() + clk_prepare() * @dev: device for clock "consumer" * @id: clock consumer ID * * Context: May sleep. * * Return: a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev and @id to determine the clock consumer, and thereby * the clock producer. If no such clk is found, it returns NULL * which serves as a dummy clk. That's the only difference compared * to devm_clk_get_prepared(). * * The returned clk (if valid) is prepared. Drivers must however * assume that the clock is not enabled. * * The clock will automatically be unprepared and freed when the * device is unbound from the bus. */ struct clk *devm_clk_get_optional_prepared(struct device *dev, const char *id); /** * devm_clk_get_optional_enabled - devm_clk_get_optional() + * clk_prepare_enable() * @dev: device for clock "consumer" * @id: clock consumer ID * * Context: May sleep. * * Return: a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev and @id to determine the clock consumer, and thereby * the clock producer. If no such clk is found, it returns NULL * which serves as a dummy clk. That's the only difference compared * to devm_clk_get_enabled(). * * The returned clk (if valid) is prepared and enabled. * * The clock will automatically be disabled, unprepared and freed * when the device is unbound from the bus. */ struct clk *devm_clk_get_optional_enabled(struct device *dev, const char *id); /** * devm_get_clk_from_child - lookup and obtain a managed reference to a * clock producer from child node. * @dev: device for clock "consumer" * @np: pointer to clock consumer node * @con_id: clock consumer ID * * This function parses the clocks, and uses them to look up the * struct clk from the registered list of clock providers by using * @np and @con_id * * The clock will automatically be freed when the device is unbound * from the bus. */ struct clk *devm_get_clk_from_child(struct device *dev, struct device_node *np, const char *con_id); /** * clk_enable - inform the system when the clock source should be running. * @clk: clock source * * If the clock can not be enabled/disabled, this should return success. * * May be called from atomic contexts. * * Returns success (0) or negative errno. */ int clk_enable(struct clk *clk); /** * clk_bulk_enable - inform the system when the set of clks should be running. * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * May be called from atomic contexts. * * Returns success (0) or negative errno. */ int __must_check clk_bulk_enable(int num_clks, const struct clk_bulk_data *clks); /** * clk_disable - inform the system when the clock source is no longer required. * @clk: clock source * * Inform the system that a clock source is no longer required by * a driver and may be shut down. * * May be called from atomic contexts. * * Implementation detail: if the clock source is shared between * multiple drivers, clk_enable() calls must be balanced by the * same number of clk_disable() calls for the clock source to be * disabled. */ void clk_disable(struct clk *clk); /** * clk_bulk_disable - inform the system when the set of clks is no * longer required. * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * Inform the system that a set of clks is no longer required by * a driver and may be shut down. * * May be called from atomic contexts. * * Implementation detail: if the set of clks is shared between * multiple drivers, clk_bulk_enable() calls must be balanced by the * same number of clk_bulk_disable() calls for the clock source to be * disabled. */ void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks); /** * clk_get_rate - obtain the current clock rate (in Hz) for a clock source. * This is only valid once the clock source has been enabled. * @clk: clock source */ unsigned long clk_get_rate(struct clk *clk); /** * clk_put - "free" the clock source * @clk: clock source * * Note: drivers must ensure that all clk_enable calls made on this * clock source are balanced by clk_disable calls prior to calling * this function. * * clk_put should not be called from within interrupt context. */ void clk_put(struct clk *clk); /** * clk_bulk_put - "free" the clock source * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * Note: drivers must ensure that all clk_bulk_enable calls made on this * clock source are balanced by clk_bulk_disable calls prior to calling * this function. * * clk_bulk_put should not be called from within interrupt context. */ void clk_bulk_put(int num_clks, struct clk_bulk_data *clks); /** * clk_bulk_put_all - "free" all the clock source * @num_clks: the number of clk_bulk_data * @clks: the clk_bulk_data table of consumer * * Note: drivers must ensure that all clk_bulk_enable calls made on this * clock source are balanced by clk_bulk_disable calls prior to calling * this function. * * clk_bulk_put_all should not be called from within interrupt context. */ void clk_bulk_put_all(int num_clks, struct clk_bulk_data *clks); /** * devm_clk_put - "free" a managed clock source * @dev: device used to acquire the clock * @clk: clock source acquired with devm_clk_get() * * Note: drivers must ensure that all clk_enable calls made on this * clock source are balanced by clk_disable calls prior to calling * this function. * * clk_put should not be called from within interrupt context. */ void devm_clk_put(struct device *dev, struct clk *clk); /* * The remaining APIs are optional for machine class support. */ /** * clk_round_rate - adjust a rate to the exact rate a clock can provide * @clk: clock source * @rate: desired clock rate in Hz * * This answers the question "if I were to pass @rate to clk_set_rate(), * what clock rate would I end up with?" without changing the hardware * in any way. In other words: * * rate = clk_round_rate(clk, r); * * and: * * clk_set_rate(clk, r); * rate = clk_get_rate(clk); * * are equivalent except the former does not modify the clock hardware * in any way. * * Returns rounded clock rate in Hz, or negative errno. */ long clk_round_rate(struct clk *clk, unsigned long rate); /** * clk_set_rate - set the clock rate for a clock source * @clk: clock source * @rate: desired clock rate in Hz * * Updating the rate starts at the top-most affected clock and then * walks the tree down to the bottom-most clock that needs updating. * * Returns success (0) or negative errno. */ int clk_set_rate(struct clk *clk, unsigned long rate); /** * clk_set_rate_exclusive- set the clock rate and claim exclusivity over * clock source * @clk: clock source * @rate: desired clock rate in Hz * * This helper function allows drivers to atomically set the rate of a producer * and claim exclusivity over the rate control of the producer. * * It is essentially a combination of clk_set_rate() and * clk_rate_exclusite_get(). Caller must balance this call with a call to * clk_rate_exclusive_put() * * Returns success (0) or negative errno. */ int clk_set_rate_exclusive(struct clk *clk, unsigned long rate); /** * clk_has_parent - check if a clock is a possible parent for another * @clk: clock source * @parent: parent clock source * * This function can be used in drivers that need to check that a clock can be * the parent of another without actually changing the parent. * * Returns true if @parent is a possible parent for @clk, false otherwise. */ bool clk_has_parent(struct clk *clk, struct clk *parent); /** * clk_set_rate_range - set a rate range for a clock source * @clk: clock source * @min: desired minimum clock rate in Hz, inclusive * @max: desired maximum clock rate in Hz, inclusive * * Returns success (0) or negative errno. */ int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max); /** * clk_set_min_rate - set a minimum clock rate for a clock source * @clk: clock source * @rate: desired minimum clock rate in Hz, inclusive * * Returns success (0) or negative errno. */ int clk_set_min_rate(struct clk *clk, unsigned long rate); /** * clk_set_max_rate - set a maximum clock rate for a clock source * @clk: clock source * @rate: desired maximum clock rate in Hz, inclusive * * Returns success (0) or negative errno. */ int clk_set_max_rate(struct clk *clk, unsigned long rate); /** * clk_set_parent - set the parent clock source for this clock * @clk: clock source * @parent: parent clock source * * Returns success (0) or negative errno. */ int clk_set_parent(struct clk *clk, struct clk *parent); /** * clk_get_parent - get the parent clock source for this clock * @clk: clock source * * Returns struct clk corresponding to parent clock source, or * valid IS_ERR() condition containing errno. */ struct clk *clk_get_parent(struct clk *clk); /** * clk_get_sys - get a clock based upon the device name * @dev_id: device name * @con_id: connection ID * * Returns a struct clk corresponding to the clock producer, or * valid IS_ERR() condition containing errno. The implementation * uses @dev_id and @con_id to determine the clock consumer, and * thereby the clock producer. In contrast to clk_get() this function * takes the device name instead of the device itself for identification. * * Drivers must assume that the clock source is not enabled. * * clk_get_sys should not be called from within interrupt context. */ struct clk *clk_get_sys(const char *dev_id, const char *con_id); /** * clk_save_context - save clock context for poweroff * * Saves the context of the clock register for powerstates in which the * contents of the registers will be lost. Occurs deep within the suspend * code so locking is not necessary. */ int clk_save_context(void); /** * clk_restore_context - restore clock context after poweroff * * This occurs with all clocks enabled. Occurs deep within the resume code * so locking is not necessary. */ void clk_restore_context(void); #else /* !CONFIG_HAVE_CLK */ static inline struct clk *clk_get(struct device *dev, const char *id) { return NULL; } static inline int __must_check clk_bulk_get(struct device *dev, int num_clks, struct clk_bulk_data *clks) { return 0; } static inline int __must_check clk_bulk_get_optional(struct device *dev, int num_clks, struct clk_bulk_data *clks) { return 0; } static inline int __must_check clk_bulk_get_all(struct device *dev, struct clk_bulk_data **clks) { return 0; } static inline struct clk *devm_clk_get(struct device *dev, const char *id) { return NULL; } static inline struct clk *devm_clk_get_prepared(struct device *dev, const char *id) { return NULL; } static inline struct clk *devm_clk_get_enabled(struct device *dev, const char *id) { return NULL; } static inline struct clk *devm_clk_get_optional(struct device *dev, const char *id) { return NULL; } static inline struct clk *devm_clk_get_optional_prepared(struct device *dev, const char *id) { return NULL; } static inline struct clk *devm_clk_get_optional_enabled(struct device *dev, const char *id) { return NULL; } static inline int __must_check devm_clk_bulk_get(struct device *dev, int num_clks, struct clk_bulk_data *clks) { return 0; } static inline int __must_check devm_clk_bulk_get_optional(struct device *dev, int num_clks, struct clk_bulk_data *clks) { return 0; } static inline int __must_check devm_clk_bulk_get_all(struct device *dev, struct clk_bulk_data **clks) { return 0; } static inline struct clk *devm_get_clk_from_child(struct device *dev, struct device_node *np, const char *con_id) { return NULL; } static inline void clk_put(struct clk *clk) {} static inline void clk_bulk_put(int num_clks, struct clk_bulk_data *clks) {} static inline void clk_bulk_put_all(int num_clks, struct clk_bulk_data *clks) {} static inline void devm_clk_put(struct device *dev, struct clk *clk) {} static inline int clk_enable(struct clk *clk) { return 0; } static inline int __must_check clk_bulk_enable(int num_clks, const struct clk_bulk_data *clks) { return 0; } static inline void clk_disable(struct clk *clk) {} static inline void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks) {} static inline unsigned long clk_get_rate(struct clk *clk) { return 0; } static inline int clk_set_rate(struct clk *clk, unsigned long rate) { return 0; } static inline int clk_set_rate_exclusive(struct clk *clk, unsigned long rate) { return 0; } static inline long clk_round_rate(struct clk *clk, unsigned long rate) { return 0; } static inline bool clk_has_parent(struct clk *clk, struct clk *parent) { return true; } static inline int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) { return 0; } static inline int clk_set_min_rate(struct clk *clk, unsigned long rate) { return 0; } static inline int clk_set_max_rate(struct clk *clk, unsigned long rate) { return 0; } static inline int clk_set_parent(struct clk *clk, struct clk *parent) { return 0; } static inline struct clk *clk_get_parent(struct clk *clk) { return NULL; } static inline struct clk *clk_get_sys(const char *dev_id, const char *con_id) { return NULL; } static inline int clk_save_context(void) { return 0; } static inline void clk_restore_context(void) {} #endif /* clk_prepare_enable helps cases using clk_enable in non-atomic context. */ static inline int clk_prepare_enable(struct clk *clk) { int ret; ret = clk_prepare(clk); if (ret) return ret; ret = clk_enable(clk); if (ret) clk_unprepare(clk); return ret; } /* clk_disable_unprepare helps cases using clk_disable in non-atomic context. */ static inline void clk_disable_unprepare(struct clk *clk) { clk_disable(clk); clk_unprepare(clk); } static inline int __must_check clk_bulk_prepare_enable(int num_clks, const struct clk_bulk_data *clks) { int ret; ret = clk_bulk_prepare(num_clks, clks); if (ret) return ret; ret = clk_bulk_enable(num_clks, clks); if (ret) clk_bulk_unprepare(num_clks, clks); return ret; } static inline void clk_bulk_disable_unprepare(int num_clks, const struct clk_bulk_data *clks) { clk_bulk_disable(num_clks, clks); clk_bulk_unprepare(num_clks, clks); } /** * clk_get_optional - lookup and obtain a reference to an optional clock * producer. * @dev: device for clock "consumer" * @id: clock consumer ID * * Behaves the same as clk_get() except where there is no clock producer. In * this case, instead of returning -ENOENT, the function returns NULL. */ static inline struct clk *clk_get_optional(struct device *dev, const char *id) { struct clk *clk = clk_get(dev, id); if (clk == ERR_PTR(-ENOENT)) return NULL; return clk; } #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) struct clk *of_clk_get(struct device_node *np, int index); struct clk *of_clk_get_by_name(struct device_node *np, const char *name); struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec); #else static inline struct clk *of_clk_get(struct device_node *np, int index) { return ERR_PTR(-ENOENT); } static inline struct clk *of_clk_get_by_name(struct device_node *np, const char *name) { return ERR_PTR(-ENOENT); } static inline struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) { return ERR_PTR(-ENOENT); } #endif #endif PK ! � ��G G overflow.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 OR MIT */ #ifndef __LINUX_OVERFLOW_H #define __LINUX_OVERFLOW_H #include <linux/compiler.h> #include <linux/limits.h> /* * We need to compute the minimum and maximum values representable in a given * type. These macros may also be useful elsewhere. It would seem more obvious * to do something like: * * #define type_min(T) (T)(is_signed_type(T) ? (T)1 << (8*sizeof(T)-1) : 0) * #define type_max(T) (T)(is_signed_type(T) ? ((T)1 << (8*sizeof(T)-1)) - 1 : ~(T)0) * * Unfortunately, the middle expressions, strictly speaking, have * undefined behaviour, and at least some versions of gcc warn about * the type_max expression (but not if -fsanitize=undefined is in * effect; in that case, the warning is deferred to runtime...). * * The slightly excessive casting in type_min is to make sure the * macros also produce sensible values for the exotic type _Bool. [The * overflow checkers only almost work for _Bool, but that's * a-feature-not-a-bug, since people shouldn't be doing arithmetic on * _Bools. Besides, the gcc builtins don't allow _Bool* as third * argument.] * * Idea stolen from * https://mail-index.netbsd.org/tech-misc/2007/02/05/0000.html - * credit to Christian Biere. */ #define __type_half_max(type) ((type)1 << (8*sizeof(type) - 1 - is_signed_type(type))) #define type_max(T) ((T)((__type_half_max(T) - 1) + __type_half_max(T))) #define type_min(T) ((T)((T)-type_max(T)-(T)1)) /* * Avoids triggering -Wtype-limits compilation warning, * while using unsigned data types to check a < 0. */ #define is_non_negative(a) ((a) > 0 || (a) == 0) #define is_negative(a) (!(is_non_negative(a))) /* * Allows for effectively applying __must_check to a macro so we can have * both the type-agnostic benefits of the macros while also being able to * enforce that the return value is, in fact, checked. */ static inline bool __must_check __must_check_overflow(bool overflow) { return unlikely(overflow); } /** check_add_overflow() - Calculate addition with overflow checking * * @a: first addend * @b: second addend * @d: pointer to store sum * * Returns 0 on success. * * *@d holds the results of the attempted addition, but is not considered * "safe for use" on a non-zero return value, which indicates that the * sum has overflowed or been truncated. */ #define check_add_overflow(a, b, d) \ __must_check_overflow(__builtin_add_overflow(a, b, d)) /** check_sub_overflow() - Calculate subtraction with overflow checking * * @a: minuend; value to subtract from * @b: subtrahend; value to subtract from @a * @d: pointer to store difference * * Returns 0 on success. * * *@d holds the results of the attempted subtraction, but is not considered * "safe for use" on a non-zero return value, which indicates that the * difference has underflowed or been truncated. */ #define check_sub_overflow(a, b, d) \ __must_check_overflow(__builtin_sub_overflow(a, b, d)) /** check_mul_overflow() - Calculate multiplication with overflow checking * * @a: first factor * @b: second factor * @d: pointer to store product * * Returns 0 on success. * * *@d holds the results of the attempted multiplication, but is not * considered "safe for use" on a non-zero return value, which indicates * that the product has overflowed or been truncated. */ #define check_mul_overflow(a, b, d) \ __must_check_overflow(__builtin_mul_overflow(a, b, d)) /** check_shl_overflow() - Calculate a left-shifted value and check overflow * * @a: Value to be shifted * @s: How many bits left to shift * @d: Pointer to where to store the result * * Computes *@d = (@a << @s) * * Returns true if '*d' cannot hold the result or when 'a << s' doesn't * make sense. Example conditions: * - 'a << s' causes bits to be lost when stored in *d. * - 's' is garbage (e.g. negative) or so large that the result of * 'a << s' is guaranteed to be 0. * - 'a' is negative. * - 'a << s' sets the sign bit, if any, in '*d'. * * '*d' will hold the results of the attempted shift, but is not * considered "safe for use" if true is returned. */ #define check_shl_overflow(a, s, d) __must_check_overflow(({ \ typeof(a) _a = a; \ typeof(s) _s = s; \ typeof(d) _d = d; \ u64 _a_full = _a; \ unsigned int _to_shift = \ is_non_negative(_s) && _s < 8 * sizeof(*d) ? _s : 0; \ *_d = (_a_full << _to_shift); \ (_to_shift != _s || is_negative(*_d) || is_negative(_a) || \ (*_d >> _to_shift) != _a); \ })) /** * size_mul() - Calculate size_t multiplication with saturation at SIZE_MAX * * @factor1: first factor * @factor2: second factor * * Returns: calculate @factor1 * @factor2, both promoted to size_t, * with any overflow causing the return value to be SIZE_MAX. The * lvalue must be size_t to avoid implicit type conversion. */ static inline size_t __must_check size_mul(size_t factor1, size_t factor2) { size_t bytes; if (check_mul_overflow(factor1, factor2, &bytes)) return SIZE_MAX; return bytes; } /** * size_add() - Calculate size_t addition with saturation at SIZE_MAX * * @addend1: first addend * @addend2: second addend * * Returns: calculate @addend1 + @addend2, both promoted to size_t, * with any overflow causing the return value to be SIZE_MAX. The * lvalue must be size_t to avoid implicit type conversion. */ static inline size_t __must_check size_add(size_t addend1, size_t addend2) { size_t bytes; if (check_add_overflow(addend1, addend2, &bytes)) return SIZE_MAX; return bytes; } /** * size_sub() - Calculate size_t subtraction with saturation at SIZE_MAX * * @minuend: value to subtract from * @subtrahend: value to subtract from @minuend * * Returns: calculate @minuend - @subtrahend, both promoted to size_t, * with any overflow causing the return value to be SIZE_MAX. For * composition with the size_add() and size_mul() helpers, neither * argument may be SIZE_MAX (or the result with be forced to SIZE_MAX). * The lvalue must be size_t to avoid implicit type conversion. */ static inline size_t __must_check size_sub(size_t minuend, size_t subtrahend) { size_t bytes; if (minuend == SIZE_MAX || subtrahend == SIZE_MAX || check_sub_overflow(minuend, subtrahend, &bytes)) return SIZE_MAX; return bytes; } /** * array_size() - Calculate size of 2-dimensional array. * * @a: dimension one * @b: dimension two * * Calculates size of 2-dimensional array: @a * @b. * * Returns: number of bytes needed to represent the array or SIZE_MAX on * overflow. */ #define array_size(a, b) size_mul(a, b) /** * array3_size() - Calculate size of 3-dimensional array. * * @a: dimension one * @b: dimension two * @c: dimension three * * Calculates size of 3-dimensional array: @a * @b * @c. * * Returns: number of bytes needed to represent the array or SIZE_MAX on * overflow. */ #define array3_size(a, b, c) size_mul(size_mul(a, b), c) /** * flex_array_size() - Calculate size of a flexible array member * within an enclosing structure. * * @p: Pointer to the structure. * @member: Name of the flexible array member. * @count: Number of elements in the array. * * Calculates size of a flexible array of @count number of @member * elements, at the end of structure @p. * * Return: number of bytes needed or SIZE_MAX on overflow. */ #define flex_array_size(p, member, count) \ size_mul(count, \ sizeof(*(p)->member) + __must_be_array((p)->member)) /** * struct_size() - Calculate size of structure with trailing flexible array. * * @p: Pointer to the structure. * @member: Name of the array member. * @count: Number of elements in the array. * * Calculates size of memory needed for structure @p followed by an * array of @count number of @member elements. * * Return: number of bytes needed or SIZE_MAX on overflow. */ #define struct_size(p, member, count) \ size_add(sizeof(*(p)), flex_array_size(p, member, count)) #endif /* __LINUX_OVERFLOW_H */ PK ! w��_� � u64_stats_sync.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_U64_STATS_SYNC_H #define _LINUX_U64_STATS_SYNC_H /* * Protect against 64-bit values tearing on 32-bit architectures. This is * typically used for statistics read/update in different subsystems. * * Key points : * * - Use a seqcount on 32-bit SMP, only disable preemption for 32-bit UP. * - The whole thing is a no-op on 64-bit architectures. * * Usage constraints: * * 1) Write side must ensure mutual exclusion, or one seqcount update could * be lost, thus blocking readers forever. * * 2) Write side must disable preemption, or a seqcount reader can preempt the * writer and also spin forever. * * 3) Write side must use the _irqsave() variant if other writers, or a reader, * can be invoked from an IRQ context. * * 4) If reader fetches several counters, there is no guarantee the whole values * are consistent w.r.t. each other (remember point #2: seqcounts are not * used for 64bit architectures). * * 5) Readers are allowed to sleep or be preempted/interrupted: they perform * pure reads. * * 6) Readers must use both u64_stats_fetch_{begin,retry}_irq() if the stats * might be updated from a hardirq or softirq context (remember point #1: * seqcounts are not used for UP kernels). 32-bit UP stat readers could read * corrupted 64-bit values otherwise. * * Usage : * * Stats producer (writer) should use following template granted it already got * an exclusive access to counters (a lock is already taken, or per cpu * data is used [in a non preemptable context]) * * spin_lock_bh(...) or other synchronization to get exclusive access * ... * u64_stats_update_begin(&stats->syncp); * u64_stats_add(&stats->bytes64, len); // non atomic operation * u64_stats_inc(&stats->packets64); // non atomic operation * u64_stats_update_end(&stats->syncp); * * While a consumer (reader) should use following template to get consistent * snapshot for each variable (but no guarantee on several ones) * * u64 tbytes, tpackets; * unsigned int start; * * do { * start = u64_stats_fetch_begin(&stats->syncp); * tbytes = u64_stats_read(&stats->bytes64); // non atomic operation * tpackets = u64_stats_read(&stats->packets64); // non atomic operation * } while (u64_stats_fetch_retry(&stats->syncp, start)); * * * Example of use in drivers/net/loopback.c, using per_cpu containers, * in BH disabled context. */ #include <linux/seqlock.h> struct u64_stats_sync { #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) seqcount_t seq; #endif }; #if BITS_PER_LONG == 64 #include <asm/local64.h> typedef struct { local64_t v; } u64_stats_t ; static inline u64 u64_stats_read(const u64_stats_t *p) { return local64_read(&p->v); } static inline void u64_stats_add(u64_stats_t *p, unsigned long val) { local64_add(val, &p->v); } static inline void u64_stats_inc(u64_stats_t *p) { local64_inc(&p->v); } #else typedef struct { u64 v; } u64_stats_t; static inline u64 u64_stats_read(const u64_stats_t *p) { return p->v; } static inline void u64_stats_add(u64_stats_t *p, unsigned long val) { p->v += val; } static inline void u64_stats_inc(u64_stats_t *p) { p->v++; } #endif #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) #define u64_stats_init(syncp) seqcount_init(&(syncp)->seq) #else static inline void u64_stats_init(struct u64_stats_sync *syncp) { } #endif static inline void u64_stats_update_begin(struct u64_stats_sync *syncp) { #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) if (IS_ENABLED(CONFIG_PREEMPT_RT)) preempt_disable(); write_seqcount_begin(&syncp->seq); #endif } static inline void u64_stats_update_end(struct u64_stats_sync *syncp) { #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) write_seqcount_end(&syncp->seq); if (IS_ENABLED(CONFIG_PREEMPT_RT)) preempt_enable(); #endif } static inline unsigned long u64_stats_update_begin_irqsave(struct u64_stats_sync *syncp) { unsigned long flags = 0; #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) if (IS_ENABLED(CONFIG_PREEMPT_RT)) preempt_disable(); else local_irq_save(flags); write_seqcount_begin(&syncp->seq); #endif return flags; } static inline void u64_stats_update_end_irqrestore(struct u64_stats_sync *syncp, unsigned long flags) { #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) write_seqcount_end(&syncp->seq); if (IS_ENABLED(CONFIG_PREEMPT_RT)) preempt_enable(); else local_irq_restore(flags); #endif } static inline unsigned int __u64_stats_fetch_begin(const struct u64_stats_sync *syncp) { #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) return read_seqcount_begin(&syncp->seq); #else return 0; #endif } static inline unsigned int u64_stats_fetch_begin(const struct u64_stats_sync *syncp) { #if BITS_PER_LONG == 32 && (!defined(CONFIG_SMP) && !defined(CONFIG_PREEMPT_RT)) preempt_disable(); #endif return __u64_stats_fetch_begin(syncp); } static inline bool __u64_stats_fetch_retry(const struct u64_stats_sync *syncp, unsigned int start) { #if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) return read_seqcount_retry(&syncp->seq, start); #else return false; #endif } static inline bool u64_stats_fetch_retry(const struct u64_stats_sync *syncp, unsigned int start) { #if BITS_PER_LONG == 32 && (!defined(CONFIG_SMP) && !defined(CONFIG_PREEMPT_RT)) preempt_enable(); #endif return __u64_stats_fetch_retry(syncp, start); } /* * In case irq handlers can update u64 counters, readers can use following helpers * - SMP 32bit arches use seqcount protection, irq safe. * - UP 32bit must disable irqs. * - 64bit have no problem atomically reading u64 values, irq safe. */ static inline unsigned int u64_stats_fetch_begin_irq(const struct u64_stats_sync *syncp) { #if BITS_PER_LONG == 32 && defined(CONFIG_PREEMPT_RT) preempt_disable(); #elif BITS_PER_LONG == 32 && !defined(CONFIG_SMP) local_irq_disable(); #endif return __u64_stats_fetch_begin(syncp); } static inline bool u64_stats_fetch_retry_irq(const struct u64_stats_sync *syncp, unsigned int start) { #if BITS_PER_LONG == 32 && defined(CONFIG_PREEMPT_RT) preempt_enable(); #elif BITS_PER_LONG == 32 && !defined(CONFIG_SMP) local_irq_enable(); #endif return __u64_stats_fetch_retry(syncp, start); } #endif /* _LINUX_U64_STATS_SYNC_H */ PK ! 0X�� � objtool.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_OBJTOOL_H #define _LINUX_OBJTOOL_H #ifndef __ASSEMBLY__ #include <linux/types.h> /* * This struct is used by asm and inline asm code to manually annotate the * location of registers on the stack. */ struct unwind_hint { u32 ip; s16 sp_offset; u8 sp_reg; u8 type; u8 end; }; #endif /* * UNWIND_HINT_TYPE_CALL: Indicates that sp_reg+sp_offset resolves to PREV_SP * (the caller's SP right before it made the call). Used for all callable * functions, i.e. all C code and all callable asm functions. * * UNWIND_HINT_TYPE_REGS: Used in entry code to indicate that sp_reg+sp_offset * points to a fully populated pt_regs from a syscall, interrupt, or exception. * * UNWIND_HINT_TYPE_REGS_PARTIAL: Used in entry code to indicate that * sp_reg+sp_offset points to the iret return frame. * * UNWIND_HINT_FUNC: Generate the unwind metadata of a callable function. * Useful for code which doesn't have an ELF function annotation. * * UNWIND_HINT_ENTRY: machine entry without stack, SYSCALL/SYSENTER etc. */ #define UNWIND_HINT_TYPE_CALL 0 #define UNWIND_HINT_TYPE_REGS 1 #define UNWIND_HINT_TYPE_REGS_PARTIAL 2 #define UNWIND_HINT_TYPE_FUNC 3 #define UNWIND_HINT_TYPE_ENTRY 4 #define UNWIND_HINT_TYPE_SAVE 5 #define UNWIND_HINT_TYPE_RESTORE 6 #ifdef CONFIG_STACK_VALIDATION #ifndef __ASSEMBLY__ #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ "987: \n\t" \ ".pushsection .discard.unwind_hints\n\t" \ /* struct unwind_hint */ \ ".long 987b - .\n\t" \ ".short " __stringify(sp_offset) "\n\t" \ ".byte " __stringify(sp_reg) "\n\t" \ ".byte " __stringify(type) "\n\t" \ ".byte " __stringify(end) "\n\t" \ ".balign 4 \n\t" \ ".popsection\n\t" /* * This macro marks the given function's stack frame as "non-standard", which * tells objtool to ignore the function when doing stack metadata validation. * It should only be used in special cases where you're 100% sure it won't * affect the reliability of frame pointers and kernel stack traces. * * For more information, see tools/objtool/Documentation/stack-validation.txt. */ #define STACK_FRAME_NON_STANDARD(func) \ static void __used __section(".discard.func_stack_frame_non_standard") \ *__func_stack_frame_non_standard_##func = func /* * STACK_FRAME_NON_STANDARD_FP() is a frame-pointer-specific function ignore * for the case where a function is intentionally missing frame pointer setup, * but otherwise needs objtool/ORC coverage when frame pointers are disabled. */ #ifdef CONFIG_FRAME_POINTER #define STACK_FRAME_NON_STANDARD_FP(func) STACK_FRAME_NON_STANDARD(func) #else #define STACK_FRAME_NON_STANDARD_FP(func) #endif #define ANNOTATE_NOENDBR \ "986: \n\t" \ ".pushsection .discard.noendbr\n\t" \ _ASM_PTR " 986b\n\t" \ ".popsection\n\t" #else /* __ASSEMBLY__ */ /* * This macro indicates that the following intra-function call is valid. * Any non-annotated intra-function call will cause objtool to issue a warning. */ #define ANNOTATE_INTRA_FUNCTION_CALL \ 999: \ .pushsection .discard.intra_function_calls; \ .long 999b; \ .popsection; /* * In asm, there are two kinds of code: normal C-type callable functions and * the rest. The normal callable functions can be called by other code, and * don't do anything unusual with the stack. Such normal callable functions * are annotated with the ENTRY/ENDPROC macros. Most asm code falls in this * category. In this case, no special debugging annotations are needed because * objtool can automatically generate the ORC data for the ORC unwinder to read * at runtime. * * Anything which doesn't fall into the above category, such as syscall and * interrupt handlers, tends to not be called directly by other functions, and * often does unusual non-C-function-type things with the stack pointer. Such * code needs to be annotated such that objtool can understand it. The * following CFI hint macros are for this type of code. * * These macros provide hints to objtool about the state of the stack at each * instruction. Objtool starts from the hints and follows the code flow, * making automatic CFI adjustments when it sees pushes and pops, filling out * the debuginfo as necessary. It will also warn if it sees any * inconsistencies. */ .macro UNWIND_HINT type:req sp_reg=0 sp_offset=0 end=0 .Lunwind_hint_ip_\@: .pushsection .discard.unwind_hints /* struct unwind_hint */ .long .Lunwind_hint_ip_\@ - . .short \sp_offset .byte \sp_reg .byte \type .byte \end .balign 4 .popsection .endm .macro STACK_FRAME_NON_STANDARD func:req .pushsection .discard.func_stack_frame_non_standard, "aw" .long \func - . .popsection .endm .macro ANNOTATE_NOENDBR .Lhere_\@: .pushsection .discard.noendbr .quad .Lhere_\@ .popsection .endm #endif /* __ASSEMBLY__ */ #else /* !CONFIG_STACK_VALIDATION */ #ifndef __ASSEMBLY__ #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ "\n\t" #define STACK_FRAME_NON_STANDARD(func) #define STACK_FRAME_NON_STANDARD_FP(func) #define ANNOTATE_NOENDBR #else #define ANNOTATE_INTRA_FUNCTION_CALL .macro UNWIND_HINT type:req sp_reg=0 sp_offset=0 end=0 .endm .macro STACK_FRAME_NON_STANDARD func:req .endm .macro ANNOTATE_NOENDBR .endm #endif #endif /* CONFIG_STACK_VALIDATION */ #endif /* _LINUX_OBJTOOL_H */ PK ! ���Xh h semaphore.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2008 Intel Corporation * Author: Matthew Wilcox <willy@linux.intel.com> * * Please see kernel/locking/semaphore.c for documentation of these functions */ #ifndef __LINUX_SEMAPHORE_H #define __LINUX_SEMAPHORE_H #include <linux/list.h> #include <linux/spinlock.h> /* Please don't access any members of this structure directly */ struct semaphore { raw_spinlock_t lock; unsigned int count; struct list_head wait_list; }; #define __SEMAPHORE_INITIALIZER(name, n) \ { \ .lock = __RAW_SPIN_LOCK_UNLOCKED((name).lock), \ .count = n, \ .wait_list = LIST_HEAD_INIT((name).wait_list), \ } #define DEFINE_SEMAPHORE(name) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name, 1) static inline void sema_init(struct semaphore *sem, int val) { static struct lock_class_key __key; *sem = (struct semaphore) __SEMAPHORE_INITIALIZER(*sem, val); lockdep_init_map(&sem->lock.dep_map, "semaphore->lock", &__key, 0); } extern void down(struct semaphore *sem); extern int __must_check down_interruptible(struct semaphore *sem); extern int __must_check down_killable(struct semaphore *sem); extern int __must_check down_trylock(struct semaphore *sem); extern int __must_check down_timeout(struct semaphore *sem, long jiffies); extern void up(struct semaphore *sem); #endif /* __LINUX_SEMAPHORE_H */ PK ! >6�� � of_iommu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __OF_IOMMU_H #define __OF_IOMMU_H struct device; struct device_node; struct iommu_ops; #ifdef CONFIG_OF_IOMMU extern const struct iommu_ops *of_iommu_configure(struct device *dev, struct device_node *master_np, const u32 *id); #else static inline const struct iommu_ops *of_iommu_configure(struct device *dev, struct device_node *master_np, const u32 *id) { return NULL; } #endif /* CONFIG_OF_IOMMU */ #endif /* __OF_IOMMU_H */ PK ! RDQ�� � seq_file_net.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SEQ_FILE_NET_H__ #define __SEQ_FILE_NET_H__ #include <linux/seq_file.h> struct net; extern struct net init_net; struct seq_net_private { #ifdef CONFIG_NET_NS struct net *net; #endif }; static inline struct net *seq_file_net(struct seq_file *seq) { #ifdef CONFIG_NET_NS return ((struct seq_net_private *)seq->private)->net; #else return &init_net; #endif } /* * This one is needed for proc_create_net_single since net is stored directly * in private not as a struct i.e. seq_file_net can't be used. */ static inline struct net *seq_file_single_net(struct seq_file *seq) { #ifdef CONFIG_NET_NS return (struct net *)seq->private; #else return &init_net; #endif } #endif PK ! 4��T� � digsig.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2011 Nokia Corporation * Copyright (C) 2011 Intel Corporation * * Author: * Dmitry Kasatkin <dmitry.kasatkin@nokia.com> * <dmitry.kasatkin@intel.com> */ #ifndef _DIGSIG_H #define _DIGSIG_H #include <linux/key.h> enum pubkey_algo { PUBKEY_ALGO_RSA, PUBKEY_ALGO_MAX, }; enum digest_algo { DIGEST_ALGO_SHA1, DIGEST_ALGO_SHA256, DIGEST_ALGO_MAX }; struct pubkey_hdr { uint8_t version; /* key format version */ uint32_t timestamp; /* key made, always 0 for now */ uint8_t algo; uint8_t nmpi; char mpi[]; } __packed; struct signature_hdr { uint8_t version; /* signature format version */ uint32_t timestamp; /* signature made */ uint8_t algo; uint8_t hash; uint8_t keyid[8]; uint8_t nmpi; char mpi[]; } __packed; #if defined(CONFIG_SIGNATURE) || defined(CONFIG_SIGNATURE_MODULE) int digsig_verify(struct key *keyring, const char *sig, int siglen, const char *digest, int digestlen); #else static inline int digsig_verify(struct key *keyring, const char *sig, int siglen, const char *digest, int digestlen) { return -EOPNOTSUPP; } #endif /* CONFIG_SIGNATURE */ #endif /* _DIGSIG_H */ PK ! �VY�� � inotify.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Inode based directory notification for Linux * * Copyright (C) 2005 John McCutchan */ #ifndef _LINUX_INOTIFY_H #define _LINUX_INOTIFY_H #include <linux/sysctl.h> #include <uapi/linux/inotify.h> extern struct ctl_table inotify_table[]; /* for sysctl */ #define ALL_INOTIFY_BITS (IN_ACCESS | IN_MODIFY | IN_ATTRIB | IN_CLOSE_WRITE | \ IN_CLOSE_NOWRITE | IN_OPEN | IN_MOVED_FROM | \ IN_MOVED_TO | IN_CREATE | IN_DELETE | \ IN_DELETE_SELF | IN_MOVE_SELF | IN_UNMOUNT | \ IN_Q_OVERFLOW | IN_IGNORED | IN_ONLYDIR | \ IN_DONT_FOLLOW | IN_EXCL_UNLINK | IN_MASK_ADD | \ IN_MASK_CREATE | IN_ISDIR | IN_ONESHOT) #endif /* _LINUX_INOTIFY_H */ PK ! c�+� � asn1_encoder.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LINUX_ASN1_ENCODER_H #define _LINUX_ASN1_ENCODER_H #include <linux/types.h> #include <linux/asn1.h> #include <linux/asn1_ber_bytecode.h> #include <linux/bug.h> #define asn1_oid_len(oid) (sizeof(oid)/sizeof(u32)) unsigned char * asn1_encode_integer(unsigned char *data, const unsigned char *end_data, s64 integer); unsigned char * asn1_encode_oid(unsigned char *data, const unsigned char *end_data, u32 oid[], int oid_len); unsigned char * asn1_encode_tag(unsigned char *data, const unsigned char *end_data, u32 tag, const unsigned char *string, int len); unsigned char * asn1_encode_octet_string(unsigned char *data, const unsigned char *end_data, const unsigned char *string, u32 len); unsigned char * asn1_encode_sequence(unsigned char *data, const unsigned char *end_data, const unsigned char *seq, int len); unsigned char * asn1_encode_boolean(unsigned char *data, const unsigned char *end_data, bool val); #endif PK ! �0� � reset/bcm63xx_pmb.hnu �[��� /* * Broadcom BCM63xx Processor Monitor Bus shared routines (SMP and reset) * * Copyright (C) 2015, Broadcom Corporation * Author: Florian Fainelli <f.fainelli@gmail.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __BCM63XX_PMB_H #define __BCM63XX_PMB_H #include <linux/io.h> #include <linux/types.h> #include <linux/delay.h> #include <linux/err.h> /* PMB Master controller register */ #define PMB_CTRL 0x00 #define PMC_PMBM_START (1 << 31) #define PMC_PMBM_TIMEOUT (1 << 30) #define PMC_PMBM_SLAVE_ERR (1 << 29) #define PMC_PMBM_BUSY (1 << 28) #define PMC_PMBM_READ (0 << 20) #define PMC_PMBM_WRITE (1 << 20) #define PMB_WR_DATA 0x04 #define PMB_TIMEOUT 0x08 #define PMB_RD_DATA 0x0C #define PMB_BUS_ID_SHIFT 8 /* Perform the low-level PMB master operation, shared between reads and * writes. */ static inline int __bpcm_do_op(void __iomem *master, unsigned int addr, u32 off, u32 op) { unsigned int timeout = 1000; u32 cmd; cmd = (PMC_PMBM_START | op | (addr & 0xff) << 12 | off); writel(cmd, master + PMB_CTRL); do { cmd = readl(master + PMB_CTRL); if (!(cmd & PMC_PMBM_START)) return 0; if (cmd & PMC_PMBM_SLAVE_ERR) return -EIO; if (cmd & PMC_PMBM_TIMEOUT) return -ETIMEDOUT; udelay(1); } while (timeout-- > 0); return -ETIMEDOUT; } static inline int bpcm_rd(void __iomem *master, unsigned int addr, u32 off, u32 *val) { int ret = 0; ret = __bpcm_do_op(master, addr, off >> 2, PMC_PMBM_READ); *val = readl(master + PMB_RD_DATA); return ret; } static inline int bpcm_wr(void __iomem *master, unsigned int addr, u32 off, u32 val) { int ret = 0; writel(val, master + PMB_WR_DATA); ret = __bpcm_do_op(master, addr, off >> 2, PMC_PMBM_WRITE); return ret; } #endif /* __BCM63XX_PMB_H */ PK ! x��f� � reset/reset-simple.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Simple Reset Controller ops * * Based on Allwinner SoCs Reset Controller driver * * Copyright 2013 Maxime Ripard * * Maxime Ripard <maxime.ripard@free-electrons.com> */ #ifndef __RESET_SIMPLE_H__ #define __RESET_SIMPLE_H__ #include <linux/io.h> #include <linux/reset-controller.h> #include <linux/spinlock.h> /** * struct reset_simple_data - driver data for simple reset controllers * @lock: spinlock to protect registers during read-modify-write cycles * @membase: memory mapped I/O register range * @rcdev: reset controller device base structure * @active_low: if true, bits are cleared to assert the reset. Otherwise, bits * are set to assert the reset. Note that this says nothing about * the voltage level of the actual reset line. * @status_active_low: if true, bits read back as cleared while the reset is * asserted. Otherwise, bits read back as set while the * reset is asserted. * @reset_us: Minimum delay in microseconds needed that needs to be * waited for between an assert and a deassert to reset the * device. If multiple consumers with different delay * requirements are connected to this controller, it must * be the largest minimum delay. 0 means that such a delay is * unknown and the reset operation is unsupported. */ struct reset_simple_data { spinlock_t lock; void __iomem *membase; struct reset_controller_dev rcdev; bool active_low; bool status_active_low; unsigned int reset_us; }; extern const struct reset_control_ops reset_simple_ops; #endif /* __RESET_SIMPLE_H__ */ PK ! � ;�� � reset/sunxi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_RESET_SUNXI_H__ #define __LINUX_RESET_SUNXI_H__ void __init sun6i_reset_init(void); #endif /* __LINUX_RESET_SUNXI_H__ */ PK ! �^7�� � reset/socfpga.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_RESET_SOCFPGA_H__ #define __LINUX_RESET_SOCFPGA_H__ void __init socfpga_reset_init(void); #endif /* __LINUX_RESET_SOCFPGA_H__ */ PK ! �h�dmS mS dma-fence.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Fence mechanism for dma-buf to allow for asynchronous dma access * * Copyright (C) 2012 Canonical Ltd * Copyright (C) 2012 Texas Instruments * * Authors: * Rob Clark <robdclark@gmail.com> * Maarten Lankhorst <maarten.lankhorst@canonical.com> */ #ifndef __LINUX_DMA_FENCE_H #define __LINUX_DMA_FENCE_H #include <linux/err.h> #include <linux/wait.h> #include <linux/list.h> #include <linux/bitops.h> #include <linux/kref.h> #include <linux/sched.h> #include <linux/printk.h> #include <linux/rcupdate.h> struct dma_fence; struct dma_fence_ops; struct dma_fence_cb; /** * struct dma_fence - software synchronization primitive * @refcount: refcount for this fence * @ops: dma_fence_ops associated with this fence * @rcu: used for releasing fence with kfree_rcu * @cb_list: list of all callbacks to call * @lock: spin_lock_irqsave used for locking * @context: execution context this fence belongs to, returned by * dma_fence_context_alloc() * @seqno: the sequence number of this fence inside the execution context, * can be compared to decide which fence would be signaled later. * @flags: A mask of DMA_FENCE_FLAG_* defined below * @timestamp: Timestamp when the fence was signaled. * @error: Optional, only valid if < 0, must be set before calling * dma_fence_signal, indicates that the fence has completed with an error. * * the flags member must be manipulated and read using the appropriate * atomic ops (bit_*), so taking the spinlock will not be needed most * of the time. * * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the * implementer of the fence for its own purposes. Can be used in different * ways by different fence implementers, so do not rely on this. * * Since atomic bitops are used, this is not guaranteed to be the case. * Particularly, if the bit was set, but dma_fence_signal was called right * before this bit was set, it would have been able to set the * DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called. * Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that * after dma_fence_signal was called, any enable_signaling call will have either * been completed, or never called at all. */ struct dma_fence { spinlock_t *lock; const struct dma_fence_ops *ops; /* * We clear the callback list on kref_put so that by the time we * release the fence it is unused. No one should be adding to the * cb_list that they don't themselves hold a reference for. * * The lifetime of the timestamp is similarly tied to both the * rcu freelist and the cb_list. The timestamp is only set upon * signaling while simultaneously notifying the cb_list. Ergo, we * only use either the cb_list of timestamp. Upon destruction, * neither are accessible, and so we can use the rcu. This means * that the cb_list is *only* valid until the signal bit is set, * and to read either you *must* hold a reference to the fence, * and not just the rcu_read_lock. * * Listed in chronological order. */ union { struct list_head cb_list; /* @cb_list replaced by @timestamp on dma_fence_signal() */ ktime_t timestamp; /* @timestamp replaced by @rcu on dma_fence_release() */ struct rcu_head rcu; }; u64 context; u64 seqno; unsigned long flags; struct kref refcount; int error; }; enum dma_fence_flag_bits { DMA_FENCE_FLAG_SIGNALED_BIT, DMA_FENCE_FLAG_TIMESTAMP_BIT, DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ }; typedef void (*dma_fence_func_t)(struct dma_fence *fence, struct dma_fence_cb *cb); /** * struct dma_fence_cb - callback for dma_fence_add_callback() * @node: used by dma_fence_add_callback() to append this struct to fence::cb_list * @func: dma_fence_func_t to call * * This struct will be initialized by dma_fence_add_callback(), additional * data can be passed along by embedding dma_fence_cb in another struct. */ struct dma_fence_cb { struct list_head node; dma_fence_func_t func; }; /** * struct dma_fence_ops - operations implemented for fence * */ struct dma_fence_ops { /** * @use_64bit_seqno: * * True if this dma_fence implementation uses 64bit seqno, false * otherwise. */ bool use_64bit_seqno; /** * @get_driver_name: * * Returns the driver name. This is a callback to allow drivers to * compute the name at runtime, without having it to store permanently * for each fence, or build a cache of some sort. * * This callback is mandatory. */ const char * (*get_driver_name)(struct dma_fence *fence); /** * @get_timeline_name: * * Return the name of the context this fence belongs to. This is a * callback to allow drivers to compute the name at runtime, without * having it to store permanently for each fence, or build a cache of * some sort. * * This callback is mandatory. */ const char * (*get_timeline_name)(struct dma_fence *fence); /** * @enable_signaling: * * Enable software signaling of fence. * * For fence implementations that have the capability for hw->hw * signaling, they can implement this op to enable the necessary * interrupts, or insert commands into cmdstream, etc, to avoid these * costly operations for the common case where only hw->hw * synchronization is required. This is called in the first * dma_fence_wait() or dma_fence_add_callback() path to let the fence * implementation know that there is another driver waiting on the * signal (ie. hw->sw case). * * This function can be called from atomic context, but not * from irq context, so normal spinlocks can be used. * * A return value of false indicates the fence already passed, * or some failure occurred that made it impossible to enable * signaling. True indicates successful enabling. * * &dma_fence.error may be set in enable_signaling, but only when false * is returned. * * Since many implementations can call dma_fence_signal() even when before * @enable_signaling has been called there's a race window, where the * dma_fence_signal() might result in the final fence reference being * released and its memory freed. To avoid this, implementations of this * callback should grab their own reference using dma_fence_get(), to be * released when the fence is signalled (through e.g. the interrupt * handler). * * This callback is optional. If this callback is not present, then the * driver must always have signaling enabled. */ bool (*enable_signaling)(struct dma_fence *fence); /** * @signaled: * * Peek whether the fence is signaled, as a fastpath optimization for * e.g. dma_fence_wait() or dma_fence_add_callback(). Note that this * callback does not need to make any guarantees beyond that a fence * once indicates as signalled must always return true from this * callback. This callback may return false even if the fence has * completed already, in this case information hasn't propogated throug * the system yet. See also dma_fence_is_signaled(). * * May set &dma_fence.error if returning true. * * This callback is optional. */ bool (*signaled)(struct dma_fence *fence); /** * @wait: * * Custom wait implementation, defaults to dma_fence_default_wait() if * not set. * * The dma_fence_default_wait implementation should work for any fence, as long * as @enable_signaling works correctly. This hook allows drivers to * have an optimized version for the case where a process context is * already available, e.g. if @enable_signaling for the general case * needs to set up a worker thread. * * Must return -ERESTARTSYS if the wait is intr = true and the wait was * interrupted, and remaining jiffies if fence has signaled, or 0 if wait * timed out. Can also return other error values on custom implementations, * which should be treated as if the fence is signaled. For example a hardware * lockup could be reported like that. * * This callback is optional. */ signed long (*wait)(struct dma_fence *fence, bool intr, signed long timeout); /** * @release: * * Called on destruction of fence to release additional resources. * Can be called from irq context. This callback is optional. If it is * NULL, then dma_fence_free() is instead called as the default * implementation. */ void (*release)(struct dma_fence *fence); /** * @fence_value_str: * * Callback to fill in free-form debug info specific to this fence, like * the sequence number. * * This callback is optional. */ void (*fence_value_str)(struct dma_fence *fence, char *str, int size); /** * @timeline_value_str: * * Fills in the current value of the timeline as a string, like the * sequence number. Note that the specific fence passed to this function * should not matter, drivers should only use it to look up the * corresponding timeline structures. */ void (*timeline_value_str)(struct dma_fence *fence, char *str, int size); }; void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno); void dma_fence_release(struct kref *kref); void dma_fence_free(struct dma_fence *fence); /** * dma_fence_put - decreases refcount of the fence * @fence: fence to reduce refcount of */ static inline void dma_fence_put(struct dma_fence *fence) { if (fence) kref_put(&fence->refcount, dma_fence_release); } /** * dma_fence_get - increases refcount of the fence * @fence: fence to increase refcount of * * Returns the same fence, with refcount increased by 1. */ static inline struct dma_fence *dma_fence_get(struct dma_fence *fence) { if (fence) kref_get(&fence->refcount); return fence; } /** * dma_fence_get_rcu - get a fence from a dma_resv_list with * rcu read lock * @fence: fence to increase refcount of * * Function returns NULL if no refcount could be obtained, or the fence. */ static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence) { if (kref_get_unless_zero(&fence->refcount)) return fence; else return NULL; } /** * dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence * @fencep: pointer to fence to increase refcount of * * Function returns NULL if no refcount could be obtained, or the fence. * This function handles acquiring a reference to a fence that may be * reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU), * so long as the caller is using RCU on the pointer to the fence. * * An alternative mechanism is to employ a seqlock to protect a bunch of * fences, such as used by struct dma_resv. When using a seqlock, * the seqlock must be taken before and checked after a reference to the * fence is acquired (as shown here). * * The caller is required to hold the RCU read lock. */ static inline struct dma_fence * dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep) { do { struct dma_fence *fence; fence = rcu_dereference(*fencep); if (!fence) return NULL; if (!dma_fence_get_rcu(fence)) continue; /* The atomic_inc_not_zero() inside dma_fence_get_rcu() * provides a full memory barrier upon success (such as now). * This is paired with the write barrier from assigning * to the __rcu protected fence pointer so that if that * pointer still matches the current fence, we know we * have successfully acquire a reference to it. If it no * longer matches, we are holding a reference to some other * reallocated pointer. This is possible if the allocator * is using a freelist like SLAB_TYPESAFE_BY_RCU where the * fence remains valid for the RCU grace period, but it * may be reallocated. When using such allocators, we are * responsible for ensuring the reference we get is to * the right fence, as below. */ if (fence == rcu_access_pointer(*fencep)) return rcu_pointer_handoff(fence); dma_fence_put(fence); } while (1); } #ifdef CONFIG_LOCKDEP bool dma_fence_begin_signalling(void); void dma_fence_end_signalling(bool cookie); void __dma_fence_might_wait(void); #else static inline bool dma_fence_begin_signalling(void) { return true; } static inline void dma_fence_end_signalling(bool cookie) {} static inline void __dma_fence_might_wait(void) {} #endif int dma_fence_signal(struct dma_fence *fence); int dma_fence_signal_locked(struct dma_fence *fence); int dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp); int dma_fence_signal_timestamp_locked(struct dma_fence *fence, ktime_t timestamp); signed long dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout); int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, dma_fence_func_t func); bool dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb); void dma_fence_enable_sw_signaling(struct dma_fence *fence); /** * dma_fence_is_signaled_locked - Return an indication if the fence * is signaled yet. * @fence: the fence to check * * Returns true if the fence was already signaled, false if not. Since this * function doesn't enable signaling, it is not guaranteed to ever return * true if dma_fence_add_callback(), dma_fence_wait() or * dma_fence_enable_sw_signaling() haven't been called before. * * This function requires &dma_fence.lock to be held. * * See also dma_fence_is_signaled(). */ static inline bool dma_fence_is_signaled_locked(struct dma_fence *fence) { if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) return true; if (fence->ops->signaled && fence->ops->signaled(fence)) { dma_fence_signal_locked(fence); return true; } return false; } /** * dma_fence_is_signaled - Return an indication if the fence is signaled yet. * @fence: the fence to check * * Returns true if the fence was already signaled, false if not. Since this * function doesn't enable signaling, it is not guaranteed to ever return * true if dma_fence_add_callback(), dma_fence_wait() or * dma_fence_enable_sw_signaling() haven't been called before. * * It's recommended for seqno fences to call dma_fence_signal when the * operation is complete, it makes it possible to prevent issues from * wraparound between time of issue and time of use by checking the return * value of this function before calling hardware-specific wait instructions. * * See also dma_fence_is_signaled_locked(). */ static inline bool dma_fence_is_signaled(struct dma_fence *fence) { if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) return true; if (fence->ops->signaled && fence->ops->signaled(fence)) { dma_fence_signal(fence); return true; } return false; } /** * __dma_fence_is_later - return if f1 is chronologically later than f2 * @f1: the first fence's seqno * @f2: the second fence's seqno from the same context * @ops: dma_fence_ops associated with the seqno * * Returns true if f1 is chronologically later than f2. Both fences must be * from the same context, since a seqno is not common across contexts. */ static inline bool __dma_fence_is_later(u64 f1, u64 f2, const struct dma_fence_ops *ops) { /* This is for backward compatibility with drivers which can only handle * 32bit sequence numbers. Use a 64bit compare when the driver says to * do so. */ if (ops->use_64bit_seqno) return f1 > f2; return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; } /** * dma_fence_is_later - return if f1 is chronologically later than f2 * @f1: the first fence from the same context * @f2: the second fence from the same context * * Returns true if f1 is chronologically later than f2. Both fences must be * from the same context, since a seqno is not re-used across contexts. */ static inline bool dma_fence_is_later(struct dma_fence *f1, struct dma_fence *f2) { if (WARN_ON(f1->context != f2->context)) return false; return __dma_fence_is_later(f1->seqno, f2->seqno, f1->ops); } /** * dma_fence_later - return the chronologically later fence * @f1: the first fence from the same context * @f2: the second fence from the same context * * Returns NULL if both fences are signaled, otherwise the fence that would be * signaled last. Both fences must be from the same context, since a seqno is * not re-used across contexts. */ static inline struct dma_fence *dma_fence_later(struct dma_fence *f1, struct dma_fence *f2) { if (WARN_ON(f1->context != f2->context)) return NULL; /* * Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never * have been set if enable_signaling wasn't called, and enabling that * here is overkill. */ if (dma_fence_is_later(f1, f2)) return dma_fence_is_signaled(f1) ? NULL : f1; else return dma_fence_is_signaled(f2) ? NULL : f2; } /** * dma_fence_get_status_locked - returns the status upon completion * @fence: the dma_fence to query * * Drivers can supply an optional error status condition before they signal * the fence (to indicate whether the fence was completed due to an error * rather than success). The value of the status condition is only valid * if the fence has been signaled, dma_fence_get_status_locked() first checks * the signal state before reporting the error status. * * Returns 0 if the fence has not yet been signaled, 1 if the fence has * been signaled without an error condition, or a negative error code * if the fence has been completed in err. */ static inline int dma_fence_get_status_locked(struct dma_fence *fence) { if (dma_fence_is_signaled_locked(fence)) return fence->error ?: 1; else return 0; } int dma_fence_get_status(struct dma_fence *fence); /** * dma_fence_set_error - flag an error condition on the fence * @fence: the dma_fence * @error: the error to store * * Drivers can supply an optional error status condition before they signal * the fence, to indicate that the fence was completed due to an error * rather than success. This must be set before signaling (so that the value * is visible before any waiters on the signal callback are woken). This * helper exists to help catching erroneous setting of #dma_fence.error. */ static inline void dma_fence_set_error(struct dma_fence *fence, int error) { WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)); WARN_ON(error >= 0 || error < -MAX_ERRNO); fence->error = error; } /** * dma_fence_timestamp - helper to get the completion timestamp of a fence * @fence: fence to get the timestamp from. * * After a fence is signaled the timestamp is updated with the signaling time, * but setting the timestamp can race with tasks waiting for the signaling. This * helper busy waits for the correct timestamp to appear. */ static inline ktime_t dma_fence_timestamp(struct dma_fence *fence) { if (WARN_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))) return ktime_get(); while (!test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags)) cpu_relax(); return fence->timestamp; } signed long dma_fence_wait_timeout(struct dma_fence *, bool intr, signed long timeout); signed long dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, bool intr, signed long timeout, uint32_t *idx); /** * dma_fence_wait - sleep until the fence gets signaled * @fence: the fence to wait on * @intr: if true, do an interruptible wait * * This function will return -ERESTARTSYS if interrupted by a signal, * or 0 if the fence was signaled. Other error values may be * returned on custom implementations. * * Performs a synchronous wait on this fence. It is assumed the caller * directly or indirectly holds a reference to the fence, otherwise the * fence might be freed before return, resulting in undefined behavior. * * See also dma_fence_wait_timeout() and dma_fence_wait_any_timeout(). */ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) { signed long ret; /* Since dma_fence_wait_timeout cannot timeout with * MAX_SCHEDULE_TIMEOUT, only valid return values are * -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT. */ ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); return ret < 0 ? ret : 0; } struct dma_fence *dma_fence_get_stub(void); struct dma_fence *dma_fence_allocate_private_stub(void); u64 dma_fence_context_alloc(unsigned num); #define DMA_FENCE_TRACE(f, fmt, args...) \ do { \ struct dma_fence *__ff = (f); \ if (IS_ENABLED(CONFIG_DMA_FENCE_TRACE)) \ pr_info("f %llu#%llu: " fmt, \ __ff->context, __ff->seqno, ##args); \ } while (0) #define DMA_FENCE_WARN(f, fmt, args...) \ do { \ struct dma_fence *__ff = (f); \ pr_warn("f %llu#%llu: " fmt, __ff->context, __ff->seqno,\ ##args); \ } while (0) #define DMA_FENCE_ERR(f, fmt, args...) \ do { \ struct dma_fence *__ff = (f); \ pr_err("f %llu#%llu: " fmt, __ff->context, __ff->seqno, \ ##args); \ } while (0) #endif /* __LINUX_DMA_FENCE_H */ PK ! ~�z� vermagic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VERMAGIC_H #define _LINUX_VERMAGIC_H #ifndef INCLUDE_VERMAGIC #error "This header can be included from kernel/module.c or *.mod.c only" #endif #include <generated/utsrelease.h> #include <asm/vermagic.h> /* Simply sanity version stamp for modules. */ #ifdef CONFIG_SMP #define MODULE_VERMAGIC_SMP "SMP " #else #define MODULE_VERMAGIC_SMP "" #endif #ifdef CONFIG_PREEMPT #define MODULE_VERMAGIC_PREEMPT "preempt " #elif defined(CONFIG_PREEMPT_RT) #define MODULE_VERMAGIC_PREEMPT "preempt_rt " #else #define MODULE_VERMAGIC_PREEMPT "" #endif #ifdef CONFIG_MODULE_UNLOAD #define MODULE_VERMAGIC_MODULE_UNLOAD "mod_unload " #else #define MODULE_VERMAGIC_MODULE_UNLOAD "" #endif #ifdef CONFIG_MODVERSIONS #define MODULE_VERMAGIC_MODVERSIONS "modversions " #else #define MODULE_VERMAGIC_MODVERSIONS "" #endif #ifdef RANDSTRUCT_PLUGIN #include <generated/randomize_layout_hash.h> #define MODULE_RANDSTRUCT_PLUGIN "RANDSTRUCT_PLUGIN_" RANDSTRUCT_HASHED_SEED #else #define MODULE_RANDSTRUCT_PLUGIN #endif #define VERMAGIC_STRING \ UTS_RELEASE " " \ MODULE_VERMAGIC_SMP MODULE_VERMAGIC_PREEMPT \ MODULE_VERMAGIC_MODULE_UNLOAD MODULE_VERMAGIC_MODVERSIONS \ MODULE_ARCH_VERMAGIC \ MODULE_RANDSTRUCT_PLUGIN #endif /* _LINUX_VERMAGIC_H */ PK ! ��0�� � via.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Miscellaneous definitions for VIA chipsets Currently used only by drivers/parport/parport_pc.c */ /* Values for SuperIO function select configuration register */ #define VIA_FUNCTION_PARPORT_SPP 0x00 #define VIA_FUNCTION_PARPORT_ECP 0x01 #define VIA_FUNCTION_PARPORT_EPP 0x02 #define VIA_FUNCTION_PARPORT_DISABLE 0x03 #define VIA_FUNCTION_PROBE 0xFF /* Special magic value to be used in code, not to be written into chip */ /* Bits for parallel port mode configuration register */ #define VIA_PARPORT_ECPEPP 0X20 #define VIA_PARPORT_BIDIR 0x80 /* VIA configuration registers */ #define VIA_CONFIG_INDEX 0x3F0 #define VIA_CONFIG_DATA 0x3F1 /* Mask for parallel port IRQ bits (in ISA PnP IRQ routing register 1) */ #define VIA_IRQCONTROL_PARALLEL 0xF0 /* Mask for parallel port DMA bits (in ISA PnP DMA routing register) */ #define VIA_DMACONTROL_PARALLEL 0x0C PK ! �~��d< d< socket.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SOCKET_H #define _LINUX_SOCKET_H #include <asm/socket.h> /* arch-dependent defines */ #include <linux/sockios.h> /* the SIOCxxx I/O controls */ #include <linux/uio.h> /* iovec support */ #include <linux/types.h> /* pid_t */ #include <linux/compiler.h> /* __user */ #include <uapi/linux/socket.h> struct file; struct pid; struct cred; struct socket; #define __sockaddr_check_size(size) \ BUILD_BUG_ON(((size) > sizeof(struct __kernel_sockaddr_storage))) #ifdef CONFIG_PROC_FS struct seq_file; extern void socket_seq_show(struct seq_file *seq); #endif typedef __kernel_sa_family_t sa_family_t; /* * 1003.1g requires sa_family_t and that sa_data is char. */ struct sockaddr { sa_family_t sa_family; /* address family, AF_xxx */ union { char sa_data_min[14]; /* Minimum 14 bytes of protocol address */ DECLARE_FLEX_ARRAY(char, sa_data); }; }; struct linger { int l_onoff; /* Linger active */ int l_linger; /* How long to linger for */ }; #define sockaddr_storage __kernel_sockaddr_storage /* * As we do 4.4BSD message passing we use a 4.4BSD message passing * system, not 4.3. Thus msg_accrights(len) are now missing. They * belong in an obscure libc emulation or the bin. */ struct msghdr { void *msg_name; /* ptr to socket address structure */ int msg_namelen; /* size of socket address structure */ struct iov_iter msg_iter; /* data */ /* * Ancillary data. msg_control_user is the user buffer used for the * recv* side when msg_control_is_user is set, msg_control is the kernel * buffer used for all other cases. */ union { void *msg_control; void __user *msg_control_user; }; bool msg_control_is_user : 1; __kernel_size_t msg_controllen; /* ancillary data buffer length */ unsigned int msg_flags; /* flags on received message */ struct kiocb *msg_iocb; /* ptr to iocb for async requests */ }; struct user_msghdr { void __user *msg_name; /* ptr to socket address structure */ int msg_namelen; /* size of socket address structure */ struct iovec __user *msg_iov; /* scatter/gather array */ __kernel_size_t msg_iovlen; /* # elements in msg_iov */ void __user *msg_control; /* ancillary data */ __kernel_size_t msg_controllen; /* ancillary data buffer length */ unsigned int msg_flags; /* flags on received message */ }; /* For recvmmsg/sendmmsg */ struct mmsghdr { struct user_msghdr msg_hdr; unsigned int msg_len; }; /* * POSIX 1003.1g - ancillary data object information * Ancillary data consists of a sequence of pairs of * (cmsghdr, cmsg_data[]) */ struct cmsghdr { __kernel_size_t cmsg_len; /* data byte count, including hdr */ int cmsg_level; /* originating protocol */ int cmsg_type; /* protocol-specific type */ }; /* * Ancillary data object information MACROS * Table 5-14 of POSIX 1003.1g */ #define __CMSG_NXTHDR(ctl, len, cmsg) __cmsg_nxthdr((ctl),(len),(cmsg)) #define CMSG_NXTHDR(mhdr, cmsg) cmsg_nxthdr((mhdr), (cmsg)) #define CMSG_ALIGN(len) ( ((len)+sizeof(long)-1) & ~(sizeof(long)-1) ) #define CMSG_DATA(cmsg) \ ((void *)(cmsg) + sizeof(struct cmsghdr)) #define CMSG_USER_DATA(cmsg) \ ((void __user *)(cmsg) + sizeof(struct cmsghdr)) #define CMSG_SPACE(len) (sizeof(struct cmsghdr) + CMSG_ALIGN(len)) #define CMSG_LEN(len) (sizeof(struct cmsghdr) + (len)) #define __CMSG_FIRSTHDR(ctl,len) ((len) >= sizeof(struct cmsghdr) ? \ (struct cmsghdr *)(ctl) : \ (struct cmsghdr *)NULL) #define CMSG_FIRSTHDR(msg) __CMSG_FIRSTHDR((msg)->msg_control, (msg)->msg_controllen) #define CMSG_OK(mhdr, cmsg) ((cmsg)->cmsg_len >= sizeof(struct cmsghdr) && \ (cmsg)->cmsg_len <= (unsigned long) \ ((mhdr)->msg_controllen - \ ((char *)(cmsg) - (char *)(mhdr)->msg_control))) #define for_each_cmsghdr(cmsg, msg) \ for (cmsg = CMSG_FIRSTHDR(msg); \ cmsg; \ cmsg = CMSG_NXTHDR(msg, cmsg)) /* * Get the next cmsg header * * PLEASE, do not touch this function. If you think, that it is * incorrect, grep kernel sources and think about consequences * before trying to improve it. * * Now it always returns valid, not truncated ancillary object * HEADER. But caller still MUST check, that cmsg->cmsg_len is * inside range, given by msg->msg_controllen before using * ancillary object DATA. --ANK (980731) */ static inline struct cmsghdr * __cmsg_nxthdr(void *__ctl, __kernel_size_t __size, struct cmsghdr *__cmsg) { struct cmsghdr * __ptr; __ptr = (struct cmsghdr*)(((unsigned char *) __cmsg) + CMSG_ALIGN(__cmsg->cmsg_len)); if ((unsigned long)((char*)(__ptr+1) - (char *) __ctl) > __size) return (struct cmsghdr *)0; return __ptr; } static inline struct cmsghdr * cmsg_nxthdr (struct msghdr *__msg, struct cmsghdr *__cmsg) { return __cmsg_nxthdr(__msg->msg_control, __msg->msg_controllen, __cmsg); } static inline size_t msg_data_left(struct msghdr *msg) { return iov_iter_count(&msg->msg_iter); } /* "Socket"-level control message types: */ #define SCM_RIGHTS 0x01 /* rw: access rights (array of int) */ #define SCM_CREDENTIALS 0x02 /* rw: struct ucred */ #define SCM_SECURITY 0x03 /* rw: security label */ struct ucred { __u32 pid; __u32 uid; __u32 gid; }; /* Supported address families. */ #define AF_UNSPEC 0 #define AF_UNIX 1 /* Unix domain sockets */ #define AF_LOCAL 1 /* POSIX name for AF_UNIX */ #define AF_INET 2 /* Internet IP Protocol */ #define AF_AX25 3 /* Amateur Radio AX.25 */ #define AF_IPX 4 /* Novell IPX */ #define AF_APPLETALK 5 /* AppleTalk DDP */ #define AF_NETROM 6 /* Amateur Radio NET/ROM */ #define AF_BRIDGE 7 /* Multiprotocol bridge */ #define AF_ATMPVC 8 /* ATM PVCs */ #define AF_X25 9 /* Reserved for X.25 project */ #define AF_INET6 10 /* IP version 6 */ #define AF_ROSE 11 /* Amateur Radio X.25 PLP */ #define AF_DECnet 12 /* Reserved for DECnet project */ #define AF_NETBEUI 13 /* Reserved for 802.2LLC project*/ #define AF_SECURITY 14 /* Security callback pseudo AF */ #define AF_KEY 15 /* PF_KEY key management API */ #define AF_NETLINK 16 #define AF_ROUTE AF_NETLINK /* Alias to emulate 4.4BSD */ #define AF_PACKET 17 /* Packet family */ #define AF_ASH 18 /* Ash */ #define AF_ECONET 19 /* Acorn Econet */ #define AF_ATMSVC 20 /* ATM SVCs */ #define AF_RDS 21 /* RDS sockets */ #define AF_SNA 22 /* Linux SNA Project (nutters!) */ #define AF_IRDA 23 /* IRDA sockets */ #define AF_PPPOX 24 /* PPPoX sockets */ #define AF_WANPIPE 25 /* Wanpipe API Sockets */ #define AF_LLC 26 /* Linux LLC */ #define AF_IB 27 /* Native InfiniBand address */ #define AF_MPLS 28 /* MPLS */ #define AF_CAN 29 /* Controller Area Network */ #define AF_TIPC 30 /* TIPC sockets */ #define AF_BLUETOOTH 31 /* Bluetooth sockets */ #define AF_IUCV 32 /* IUCV sockets */ #define AF_RXRPC 33 /* RxRPC sockets */ #define AF_ISDN 34 /* mISDN sockets */ #define AF_PHONET 35 /* Phonet sockets */ #define AF_IEEE802154 36 /* IEEE802154 sockets */ #define AF_CAIF 37 /* CAIF sockets */ #define AF_ALG 38 /* Algorithm sockets */ #define AF_NFC 39 /* NFC sockets */ #define AF_VSOCK 40 /* vSockets */ #define AF_KCM 41 /* Kernel Connection Multiplexor*/ #define AF_QIPCRTR 42 /* Qualcomm IPC Router */ #define AF_SMC 43 /* smc sockets: reserve number for * PF_SMC protocol family that * reuses AF_INET address family */ #define AF_XDP 44 /* XDP sockets */ #define AF_MCTP 45 /* Management component * transport protocol */ #define AF_MAX 46 /* For now.. */ /* Protocol families, same as address families. */ #define PF_UNSPEC AF_UNSPEC #define PF_UNIX AF_UNIX #define PF_LOCAL AF_LOCAL #define PF_INET AF_INET #define PF_AX25 AF_AX25 #define PF_IPX AF_IPX #define PF_APPLETALK AF_APPLETALK #define PF_NETROM AF_NETROM #define PF_BRIDGE AF_BRIDGE #define PF_ATMPVC AF_ATMPVC #define PF_X25 AF_X25 #define PF_INET6 AF_INET6 #define PF_ROSE AF_ROSE #define PF_DECnet AF_DECnet #define PF_NETBEUI AF_NETBEUI #define PF_SECURITY AF_SECURITY #define PF_KEY AF_KEY #define PF_NETLINK AF_NETLINK #define PF_ROUTE AF_ROUTE #define PF_PACKET AF_PACKET #define PF_ASH AF_ASH #define PF_ECONET AF_ECONET #define PF_ATMSVC AF_ATMSVC #define PF_RDS AF_RDS #define PF_SNA AF_SNA #define PF_IRDA AF_IRDA #define PF_PPPOX AF_PPPOX #define PF_WANPIPE AF_WANPIPE #define PF_LLC AF_LLC #define PF_IB AF_IB #define PF_MPLS AF_MPLS #define PF_CAN AF_CAN #define PF_TIPC AF_TIPC #define PF_BLUETOOTH AF_BLUETOOTH #define PF_IUCV AF_IUCV #define PF_RXRPC AF_RXRPC #define PF_ISDN AF_ISDN #define PF_PHONET AF_PHONET #define PF_IEEE802154 AF_IEEE802154 #define PF_CAIF AF_CAIF #define PF_ALG AF_ALG #define PF_NFC AF_NFC #define PF_VSOCK AF_VSOCK #define PF_KCM AF_KCM #define PF_QIPCRTR AF_QIPCRTR #define PF_SMC AF_SMC #define PF_XDP AF_XDP #define PF_MCTP AF_MCTP #define PF_MAX AF_MAX /* Maximum queue length specifiable by listen. */ #define SOMAXCONN 4096 /* Flags we can use with send/ and recv. Added those for 1003.1g not all are supported yet */ #define MSG_OOB 1 #define MSG_PEEK 2 #define MSG_DONTROUTE 4 #define MSG_TRYHARD 4 /* Synonym for MSG_DONTROUTE for DECnet */ #define MSG_CTRUNC 8 #define MSG_PROBE 0x10 /* Do not send. Only probe path f.e. for MTU */ #define MSG_TRUNC 0x20 #define MSG_DONTWAIT 0x40 /* Nonblocking io */ #define MSG_EOR 0x80 /* End of record */ #define MSG_WAITALL 0x100 /* Wait for a full request */ #define MSG_FIN 0x200 #define MSG_SYN 0x400 #define MSG_CONFIRM 0x800 /* Confirm path validity */ #define MSG_RST 0x1000 #define MSG_ERRQUEUE 0x2000 /* Fetch message from error queue */ #define MSG_NOSIGNAL 0x4000 /* Do not generate SIGPIPE */ #define MSG_MORE 0x8000 /* Sender will send more */ #define MSG_WAITFORONE 0x10000 /* recvmmsg(): block until 1+ packets avail */ #define MSG_SENDPAGE_NOPOLICY 0x10000 /* sendpage() internal : do no apply policy */ #define MSG_SENDPAGE_NOTLAST 0x20000 /* sendpage() internal : not the last page */ #define MSG_BATCH 0x40000 /* sendmmsg(): more messages coming */ #define MSG_EOF MSG_FIN #define MSG_NO_SHARED_FRAGS 0x80000 /* sendpage() internal : page frags are not shared */ #define MSG_SENDPAGE_DECRYPTED 0x100000 /* sendpage() internal : page may carry * plain text and require encryption */ #define MSG_ZEROCOPY 0x4000000 /* Use user data in kernel path */ #define MSG_FASTOPEN 0x20000000 /* Send data in TCP SYN */ #define MSG_CMSG_CLOEXEC 0x40000000 /* Set close_on_exec for file descriptor received through SCM_RIGHTS */ #if defined(CONFIG_COMPAT) #define MSG_CMSG_COMPAT 0x80000000 /* This message needs 32 bit fixups */ #else #define MSG_CMSG_COMPAT 0 /* We never have 32 bit fixups */ #endif /* Setsockoptions(2) level. Thanks to BSD these must match IPPROTO_xxx */ #define SOL_IP 0 /* #define SOL_ICMP 1 No-no-no! Due to Linux :-) we cannot use SOL_ICMP=1 */ #define SOL_TCP 6 #define SOL_UDP 17 #define SOL_IPV6 41 #define SOL_ICMPV6 58 #define SOL_SCTP 132 #define SOL_UDPLITE 136 /* UDP-Lite (RFC 3828) */ #define SOL_RAW 255 #define SOL_IPX 256 #define SOL_AX25 257 #define SOL_ATALK 258 #define SOL_NETROM 259 #define SOL_ROSE 260 #define SOL_DECNET 261 #define SOL_X25 262 #define SOL_PACKET 263 #define SOL_ATM 264 /* ATM layer (cell level) */ #define SOL_AAL 265 /* ATM Adaption Layer (packet level) */ #define SOL_IRDA 266 #define SOL_NETBEUI 267 #define SOL_LLC 268 #define SOL_DCCP 269 #define SOL_NETLINK 270 #define SOL_TIPC 271 #define SOL_RXRPC 272 #define SOL_PPPOL2TP 273 #define SOL_BLUETOOTH 274 #define SOL_PNPIPE 275 #define SOL_RDS 276 #define SOL_IUCV 277 #define SOL_CAIF 278 #define SOL_ALG 279 #define SOL_NFC 280 #define SOL_KCM 281 #define SOL_TLS 282 #define SOL_XDP 283 /* IPX options */ #define IPX_TYPE 1 extern int move_addr_to_kernel(void __user *uaddr, int ulen, struct sockaddr_storage *kaddr); extern int put_cmsg(struct msghdr*, int level, int type, int len, void *data); struct timespec64; struct __kernel_timespec; struct old_timespec32; struct scm_timestamping_internal { struct timespec64 ts[3]; }; extern void put_cmsg_scm_timestamping64(struct msghdr *msg, struct scm_timestamping_internal *tss); extern void put_cmsg_scm_timestamping(struct msghdr *msg, struct scm_timestamping_internal *tss); /* The __sys_...msg variants allow MSG_CMSG_COMPAT iff * forbid_cmsg_compat==false */ extern long __sys_recvmsg(int fd, struct user_msghdr __user *msg, unsigned int flags, bool forbid_cmsg_compat); extern long __sys_sendmsg(int fd, struct user_msghdr __user *msg, unsigned int flags, bool forbid_cmsg_compat); extern int __sys_recvmmsg(int fd, struct mmsghdr __user *mmsg, unsigned int vlen, unsigned int flags, struct __kernel_timespec __user *timeout, struct old_timespec32 __user *timeout32); extern int __sys_sendmmsg(int fd, struct mmsghdr __user *mmsg, unsigned int vlen, unsigned int flags, bool forbid_cmsg_compat); extern long __sys_sendmsg_sock(struct socket *sock, struct msghdr *msg, unsigned int flags); extern long __sys_recvmsg_sock(struct socket *sock, struct msghdr *msg, struct user_msghdr __user *umsg, struct sockaddr __user *uaddr, unsigned int flags); extern int sendmsg_copy_msghdr(struct msghdr *msg, struct user_msghdr __user *umsg, unsigned flags, struct iovec **iov); extern int recvmsg_copy_msghdr(struct msghdr *msg, struct user_msghdr __user *umsg, unsigned flags, struct sockaddr __user **uaddr, struct iovec **iov); extern int __copy_msghdr_from_user(struct msghdr *kmsg, struct user_msghdr __user *umsg, struct sockaddr __user **save_addr, struct iovec __user **uiov, size_t *nsegs); /* helpers which do the actual work for syscalls */ extern int __sys_recvfrom(int fd, void __user *ubuf, size_t size, unsigned int flags, struct sockaddr __user *addr, int __user *addr_len); extern int __sys_sendto(int fd, void __user *buff, size_t len, unsigned int flags, struct sockaddr __user *addr, int addr_len); extern int __sys_accept4_file(struct file *file, unsigned file_flags, struct sockaddr __user *upeer_sockaddr, int __user *upeer_addrlen, int flags, unsigned long nofile); extern struct file *do_accept(struct file *file, unsigned file_flags, struct sockaddr __user *upeer_sockaddr, int __user *upeer_addrlen, int flags); extern int __sys_accept4(int fd, struct sockaddr __user *upeer_sockaddr, int __user *upeer_addrlen, int flags); extern int __sys_socket(int family, int type, int protocol); extern int __sys_bind(int fd, struct sockaddr __user *umyaddr, int addrlen); extern int __sys_connect_file(struct file *file, struct sockaddr_storage *addr, int addrlen, int file_flags); extern int __sys_connect(int fd, struct sockaddr __user *uservaddr, int addrlen); extern int __sys_listen(int fd, int backlog); extern int __sys_getsockname(int fd, struct sockaddr __user *usockaddr, int __user *usockaddr_len); extern int __sys_getpeername(int fd, struct sockaddr __user *usockaddr, int __user *usockaddr_len); extern int __sys_socketpair(int family, int type, int protocol, int __user *usockvec); extern int __sys_shutdown_sock(struct socket *sock, int how); extern int __sys_shutdown(int fd, int how); #endif /* _LINUX_SOCKET_H */ PK ! ;�� � gcd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _GCD_H #define _GCD_H #include <linux/compiler.h> unsigned long gcd(unsigned long a, unsigned long b) __attribute_const__; #endif /* _GCD_H */ PK ! ���& �& atmel-ssc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __INCLUDE_ATMEL_SSC_H #define __INCLUDE_ATMEL_SSC_H #include <linux/platform_device.h> #include <linux/list.h> #include <linux/io.h> struct atmel_ssc_platform_data { int use_dma; int has_fslen_ext; }; struct ssc_device { struct list_head list; dma_addr_t phybase; void __iomem *regs; struct platform_device *pdev; struct atmel_ssc_platform_data *pdata; struct clk *clk; int user; int irq; bool clk_from_rk_pin; bool sound_dai; }; struct ssc_device * __must_check ssc_request(unsigned int ssc_num); void ssc_free(struct ssc_device *ssc); /* SSC register offsets */ /* SSC Control Register */ #define SSC_CR 0x00000000 #define SSC_CR_RXDIS_SIZE 1 #define SSC_CR_RXDIS_OFFSET 1 #define SSC_CR_RXEN_SIZE 1 #define SSC_CR_RXEN_OFFSET 0 #define SSC_CR_SWRST_SIZE 1 #define SSC_CR_SWRST_OFFSET 15 #define SSC_CR_TXDIS_SIZE 1 #define SSC_CR_TXDIS_OFFSET 9 #define SSC_CR_TXEN_SIZE 1 #define SSC_CR_TXEN_OFFSET 8 /* SSC Clock Mode Register */ #define SSC_CMR 0x00000004 #define SSC_CMR_DIV_SIZE 12 #define SSC_CMR_DIV_OFFSET 0 /* SSC Receive Clock Mode Register */ #define SSC_RCMR 0x00000010 #define SSC_RCMR_CKG_SIZE 2 #define SSC_RCMR_CKG_OFFSET 6 #define SSC_RCMR_CKI_SIZE 1 #define SSC_RCMR_CKI_OFFSET 5 #define SSC_RCMR_CKO_SIZE 3 #define SSC_RCMR_CKO_OFFSET 2 #define SSC_RCMR_CKS_SIZE 2 #define SSC_RCMR_CKS_OFFSET 0 #define SSC_RCMR_PERIOD_SIZE 8 #define SSC_RCMR_PERIOD_OFFSET 24 #define SSC_RCMR_START_SIZE 4 #define SSC_RCMR_START_OFFSET 8 #define SSC_RCMR_STOP_SIZE 1 #define SSC_RCMR_STOP_OFFSET 12 #define SSC_RCMR_STTDLY_SIZE 8 #define SSC_RCMR_STTDLY_OFFSET 16 /* SSC Receive Frame Mode Register */ #define SSC_RFMR 0x00000014 #define SSC_RFMR_DATLEN_SIZE 5 #define SSC_RFMR_DATLEN_OFFSET 0 #define SSC_RFMR_DATNB_SIZE 4 #define SSC_RFMR_DATNB_OFFSET 8 #define SSC_RFMR_FSEDGE_SIZE 1 #define SSC_RFMR_FSEDGE_OFFSET 24 /* * The FSLEN_EXT exist on at91sam9rl, at91sam9g10, * at91sam9g20, and at91sam9g45 and newer SoCs */ #define SSC_RFMR_FSLEN_EXT_SIZE 4 #define SSC_RFMR_FSLEN_EXT_OFFSET 28 #define SSC_RFMR_FSLEN_SIZE 4 #define SSC_RFMR_FSLEN_OFFSET 16 #define SSC_RFMR_FSOS_SIZE 4 #define SSC_RFMR_FSOS_OFFSET 20 #define SSC_RFMR_LOOP_SIZE 1 #define SSC_RFMR_LOOP_OFFSET 5 #define SSC_RFMR_MSBF_SIZE 1 #define SSC_RFMR_MSBF_OFFSET 7 /* SSC Transmit Clock Mode Register */ #define SSC_TCMR 0x00000018 #define SSC_TCMR_CKG_SIZE 2 #define SSC_TCMR_CKG_OFFSET 6 #define SSC_TCMR_CKI_SIZE 1 #define SSC_TCMR_CKI_OFFSET 5 #define SSC_TCMR_CKO_SIZE 3 #define SSC_TCMR_CKO_OFFSET 2 #define SSC_TCMR_CKS_SIZE 2 #define SSC_TCMR_CKS_OFFSET 0 #define SSC_TCMR_PERIOD_SIZE 8 #define SSC_TCMR_PERIOD_OFFSET 24 #define SSC_TCMR_START_SIZE 4 #define SSC_TCMR_START_OFFSET 8 #define SSC_TCMR_STTDLY_SIZE 8 #define SSC_TCMR_STTDLY_OFFSET 16 /* SSC Transmit Frame Mode Register */ #define SSC_TFMR 0x0000001c #define SSC_TFMR_DATDEF_SIZE 1 #define SSC_TFMR_DATDEF_OFFSET 5 #define SSC_TFMR_DATLEN_SIZE 5 #define SSC_TFMR_DATLEN_OFFSET 0 #define SSC_TFMR_DATNB_SIZE 4 #define SSC_TFMR_DATNB_OFFSET 8 #define SSC_TFMR_FSDEN_SIZE 1 #define SSC_TFMR_FSDEN_OFFSET 23 #define SSC_TFMR_FSEDGE_SIZE 1 #define SSC_TFMR_FSEDGE_OFFSET 24 /* * The FSLEN_EXT exist on at91sam9rl, at91sam9g10, * at91sam9g20, and at91sam9g45 and newer SoCs */ #define SSC_TFMR_FSLEN_EXT_SIZE 4 #define SSC_TFMR_FSLEN_EXT_OFFSET 28 #define SSC_TFMR_FSLEN_SIZE 4 #define SSC_TFMR_FSLEN_OFFSET 16 #define SSC_TFMR_FSOS_SIZE 3 #define SSC_TFMR_FSOS_OFFSET 20 #define SSC_TFMR_MSBF_SIZE 1 #define SSC_TFMR_MSBF_OFFSET 7 /* SSC Receive Hold Register */ #define SSC_RHR 0x00000020 #define SSC_RHR_RDAT_SIZE 32 #define SSC_RHR_RDAT_OFFSET 0 /* SSC Transmit Hold Register */ #define SSC_THR 0x00000024 #define SSC_THR_TDAT_SIZE 32 #define SSC_THR_TDAT_OFFSET 0 /* SSC Receive Sync. Holding Register */ #define SSC_RSHR 0x00000030 #define SSC_RSHR_RSDAT_SIZE 16 #define SSC_RSHR_RSDAT_OFFSET 0 /* SSC Transmit Sync. Holding Register */ #define SSC_TSHR 0x00000034 #define SSC_TSHR_TSDAT_SIZE 16 #define SSC_TSHR_RSDAT_OFFSET 0 /* SSC Receive Compare 0 Register */ #define SSC_RC0R 0x00000038 #define SSC_RC0R_CP0_SIZE 16 #define SSC_RC0R_CP0_OFFSET 0 /* SSC Receive Compare 1 Register */ #define SSC_RC1R 0x0000003c #define SSC_RC1R_CP1_SIZE 16 #define SSC_RC1R_CP1_OFFSET 0 /* SSC Status Register */ #define SSC_SR 0x00000040 #define SSC_SR_CP0_SIZE 1 #define SSC_SR_CP0_OFFSET 8 #define SSC_SR_CP1_SIZE 1 #define SSC_SR_CP1_OFFSET 9 #define SSC_SR_ENDRX_SIZE 1 #define SSC_SR_ENDRX_OFFSET 6 #define SSC_SR_ENDTX_SIZE 1 #define SSC_SR_ENDTX_OFFSET 2 #define SSC_SR_OVRUN_SIZE 1 #define SSC_SR_OVRUN_OFFSET 5 #define SSC_SR_RXBUFF_SIZE 1 #define SSC_SR_RXBUFF_OFFSET 7 #define SSC_SR_RXEN_SIZE 1 #define SSC_SR_RXEN_OFFSET 17 #define SSC_SR_RXRDY_SIZE 1 #define SSC_SR_RXRDY_OFFSET 4 #define SSC_SR_RXSYN_SIZE 1 #define SSC_SR_RXSYN_OFFSET 11 #define SSC_SR_TXBUFE_SIZE 1 #define SSC_SR_TXBUFE_OFFSET 3 #define SSC_SR_TXEMPTY_SIZE 1 #define SSC_SR_TXEMPTY_OFFSET 1 #define SSC_SR_TXEN_SIZE 1 #define SSC_SR_TXEN_OFFSET 16 #define SSC_SR_TXRDY_SIZE 1 #define SSC_SR_TXRDY_OFFSET 0 #define SSC_SR_TXSYN_SIZE 1 #define SSC_SR_TXSYN_OFFSET 10 /* SSC Interrupt Enable Register */ #define SSC_IER 0x00000044 #define SSC_IER_CP0_SIZE 1 #define SSC_IER_CP0_OFFSET 8 #define SSC_IER_CP1_SIZE 1 #define SSC_IER_CP1_OFFSET 9 #define SSC_IER_ENDRX_SIZE 1 #define SSC_IER_ENDRX_OFFSET 6 #define SSC_IER_ENDTX_SIZE 1 #define SSC_IER_ENDTX_OFFSET 2 #define SSC_IER_OVRUN_SIZE 1 #define SSC_IER_OVRUN_OFFSET 5 #define SSC_IER_RXBUFF_SIZE 1 #define SSC_IER_RXBUFF_OFFSET 7 #define SSC_IER_RXRDY_SIZE 1 #define SSC_IER_RXRDY_OFFSET 4 #define SSC_IER_RXSYN_SIZE 1 #define SSC_IER_RXSYN_OFFSET 11 #define SSC_IER_TXBUFE_SIZE 1 #define SSC_IER_TXBUFE_OFFSET 3 #define SSC_IER_TXEMPTY_SIZE 1 #define SSC_IER_TXEMPTY_OFFSET 1 #define SSC_IER_TXRDY_SIZE 1 #define SSC_IER_TXRDY_OFFSET 0 #define SSC_IER_TXSYN_SIZE 1 #define SSC_IER_TXSYN_OFFSET 10 /* SSC Interrupt Disable Register */ #define SSC_IDR 0x00000048 #define SSC_IDR_CP0_SIZE 1 #define SSC_IDR_CP0_OFFSET 8 #define SSC_IDR_CP1_SIZE 1 #define SSC_IDR_CP1_OFFSET 9 #define SSC_IDR_ENDRX_SIZE 1 #define SSC_IDR_ENDRX_OFFSET 6 #define SSC_IDR_ENDTX_SIZE 1 #define SSC_IDR_ENDTX_OFFSET 2 #define SSC_IDR_OVRUN_SIZE 1 #define SSC_IDR_OVRUN_OFFSET 5 #define SSC_IDR_RXBUFF_SIZE 1 #define SSC_IDR_RXBUFF_OFFSET 7 #define SSC_IDR_RXRDY_SIZE 1 #define SSC_IDR_RXRDY_OFFSET 4 #define SSC_IDR_RXSYN_SIZE 1 #define SSC_IDR_RXSYN_OFFSET 11 #define SSC_IDR_TXBUFE_SIZE 1 #define SSC_IDR_TXBUFE_OFFSET 3 #define SSC_IDR_TXEMPTY_SIZE 1 #define SSC_IDR_TXEMPTY_OFFSET 1 #define SSC_IDR_TXRDY_SIZE 1 #define SSC_IDR_TXRDY_OFFSET 0 #define SSC_IDR_TXSYN_SIZE 1 #define SSC_IDR_TXSYN_OFFSET 10 /* SSC Interrupt Mask Register */ #define SSC_IMR 0x0000004c #define SSC_IMR_CP0_SIZE 1 #define SSC_IMR_CP0_OFFSET 8 #define SSC_IMR_CP1_SIZE 1 #define SSC_IMR_CP1_OFFSET 9 #define SSC_IMR_ENDRX_SIZE 1 #define SSC_IMR_ENDRX_OFFSET 6 #define SSC_IMR_ENDTX_SIZE 1 #define SSC_IMR_ENDTX_OFFSET 2 #define SSC_IMR_OVRUN_SIZE 1 #define SSC_IMR_OVRUN_OFFSET 5 #define SSC_IMR_RXBUFF_SIZE 1 #define SSC_IMR_RXBUFF_OFFSET 7 #define SSC_IMR_RXRDY_SIZE 1 #define SSC_IMR_RXRDY_OFFSET 4 #define SSC_IMR_RXSYN_SIZE 1 #define SSC_IMR_RXSYN_OFFSET 11 #define SSC_IMR_TXBUFE_SIZE 1 #define SSC_IMR_TXBUFE_OFFSET 3 #define SSC_IMR_TXEMPTY_SIZE 1 #define SSC_IMR_TXEMPTY_OFFSET 1 #define SSC_IMR_TXRDY_SIZE 1 #define SSC_IMR_TXRDY_OFFSET 0 #define SSC_IMR_TXSYN_SIZE 1 #define SSC_IMR_TXSYN_OFFSET 10 /* SSC PDC Receive Pointer Register */ #define SSC_PDC_RPR 0x00000100 /* SSC PDC Receive Counter Register */ #define SSC_PDC_RCR 0x00000104 /* SSC PDC Transmit Pointer Register */ #define SSC_PDC_TPR 0x00000108 /* SSC PDC Receive Next Pointer Register */ #define SSC_PDC_RNPR 0x00000110 /* SSC PDC Receive Next Counter Register */ #define SSC_PDC_RNCR 0x00000114 /* SSC PDC Transmit Counter Register */ #define SSC_PDC_TCR 0x0000010c /* SSC PDC Transmit Next Pointer Register */ #define SSC_PDC_TNPR 0x00000118 /* SSC PDC Transmit Next Counter Register */ #define SSC_PDC_TNCR 0x0000011c /* SSC PDC Transfer Control Register */ #define SSC_PDC_PTCR 0x00000120 #define SSC_PDC_PTCR_RXTDIS_SIZE 1 #define SSC_PDC_PTCR_RXTDIS_OFFSET 1 #define SSC_PDC_PTCR_RXTEN_SIZE 1 #define SSC_PDC_PTCR_RXTEN_OFFSET 0 #define SSC_PDC_PTCR_TXTDIS_SIZE 1 #define SSC_PDC_PTCR_TXTDIS_OFFSET 9 #define SSC_PDC_PTCR_TXTEN_SIZE 1 #define SSC_PDC_PTCR_TXTEN_OFFSET 8 /* SSC PDC Transfer Status Register */ #define SSC_PDC_PTSR 0x00000124 #define SSC_PDC_PTSR_RXTEN_SIZE 1 #define SSC_PDC_PTSR_RXTEN_OFFSET 0 #define SSC_PDC_PTSR_TXTEN_SIZE 1 #define SSC_PDC_PTSR_TXTEN_OFFSET 8 /* Bit manipulation macros */ #define SSC_BIT(name) \ (1 << SSC_##name##_OFFSET) #define SSC_BF(name, value) \ (((value) & ((1 << SSC_##name##_SIZE) - 1)) \ << SSC_##name##_OFFSET) #define SSC_BFEXT(name, value) \ (((value) >> SSC_##name##_OFFSET) \ & ((1 << SSC_##name##_SIZE) - 1)) #define SSC_BFINS(name, value, old) \ (((old) & ~(((1 << SSC_##name##_SIZE) - 1) \ << SSC_##name##_OFFSET)) | SSC_BF(name, value)) /* Register access macros */ #define ssc_readl(base, reg) __raw_readl(base + SSC_##reg) #define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) #endif /* __INCLUDE_ATMEL_SSC_H */ PK ! ci>� � bpf_lsm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2020 Google LLC. */ #ifndef _LINUX_BPF_LSM_H #define _LINUX_BPF_LSM_H #include <linux/sched.h> #include <linux/bpf.h> #include <linux/lsm_hooks.h> #ifdef CONFIG_BPF_LSM #define LSM_HOOK(RET, DEFAULT, NAME, ...) \ RET bpf_lsm_##NAME(__VA_ARGS__); #include <linux/lsm_hook_defs.h> #undef LSM_HOOK struct bpf_storage_blob { struct bpf_local_storage __rcu *storage; }; extern struct lsm_blob_sizes bpf_lsm_blob_sizes; int bpf_lsm_verify_prog(struct bpf_verifier_log *vlog, const struct bpf_prog *prog); bool bpf_lsm_is_sleepable_hook(u32 btf_id); static inline struct bpf_storage_blob *bpf_inode( const struct inode *inode) { if (unlikely(!inode->i_security)) return NULL; return inode->i_security + bpf_lsm_blob_sizes.lbs_inode; } extern const struct bpf_func_proto bpf_inode_storage_get_proto; extern const struct bpf_func_proto bpf_inode_storage_delete_proto; void bpf_inode_storage_free(struct inode *inode); #else /* !CONFIG_BPF_LSM */ static inline bool bpf_lsm_is_sleepable_hook(u32 btf_id) { return false; } static inline int bpf_lsm_verify_prog(struct bpf_verifier_log *vlog, const struct bpf_prog *prog) { return -EOPNOTSUPP; } static inline struct bpf_storage_blob *bpf_inode( const struct inode *inode) { return NULL; } static inline void bpf_inode_storage_free(struct inode *inode) { } #endif /* CONFIG_BPF_LSM */ #endif /* _LINUX_BPF_LSM_H */ PK ! vrDX� � atm_tcp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* atm_tcp.h - Driver-specific declarations of the ATMTCP driver (for use by driver-specific utilities) */ /* Written 1997-2000 by Werner Almesberger, EPFL LRC/ICA */ #ifndef LINUX_ATM_TCP_H #define LINUX_ATM_TCP_H #include <uapi/linux/atm_tcp.h> struct atm_tcp_ops { int (*attach)(struct atm_vcc *vcc,int itf); int (*create_persistent)(int itf); int (*remove_persistent)(int itf); struct module *owner; }; extern struct atm_tcp_ops atm_tcp_ops; #endif PK ! ̥X�� � interval_tree_generic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Interval Trees (C) 2012 Michel Lespinasse <walken@google.com> include/linux/interval_tree_generic.h */ #include <linux/rbtree_augmented.h> /* * Template for implementing interval trees * * ITSTRUCT: struct type of the interval tree nodes * ITRB: name of struct rb_node field within ITSTRUCT * ITTYPE: type of the interval endpoints * ITSUBTREE: name of ITTYPE field within ITSTRUCT holding last-in-subtree * ITSTART(n): start endpoint of ITSTRUCT node n * ITLAST(n): last endpoint of ITSTRUCT node n * ITSTATIC: 'static' or empty * ITPREFIX: prefix to use for the inline tree definitions * * Note - before using this, please consider if generic version * (interval_tree.h) would work for you... */ #define INTERVAL_TREE_DEFINE(ITSTRUCT, ITRB, ITTYPE, ITSUBTREE, \ ITSTART, ITLAST, ITSTATIC, ITPREFIX) \ \ /* Callbacks for augmented rbtree insert and remove */ \ \ RB_DECLARE_CALLBACKS_MAX(static, ITPREFIX ## _augment, \ ITSTRUCT, ITRB, ITTYPE, ITSUBTREE, ITLAST) \ \ /* Insert / remove interval nodes from the tree */ \ \ ITSTATIC void ITPREFIX ## _insert(ITSTRUCT *node, \ struct rb_root_cached *root) \ { \ struct rb_node **link = &root->rb_root.rb_node, *rb_parent = NULL; \ ITTYPE start = ITSTART(node), last = ITLAST(node); \ ITSTRUCT *parent; \ bool leftmost = true; \ \ while (*link) { \ rb_parent = *link; \ parent = rb_entry(rb_parent, ITSTRUCT, ITRB); \ if (parent->ITSUBTREE < last) \ parent->ITSUBTREE = last; \ if (start < ITSTART(parent)) \ link = &parent->ITRB.rb_left; \ else { \ link = &parent->ITRB.rb_right; \ leftmost = false; \ } \ } \ \ node->ITSUBTREE = last; \ rb_link_node(&node->ITRB, rb_parent, link); \ rb_insert_augmented_cached(&node->ITRB, root, \ leftmost, &ITPREFIX ## _augment); \ } \ \ ITSTATIC void ITPREFIX ## _remove(ITSTRUCT *node, \ struct rb_root_cached *root) \ { \ rb_erase_augmented_cached(&node->ITRB, root, &ITPREFIX ## _augment); \ } \ \ /* \ * Iterate over intervals intersecting [start;last] \ * \ * Note that a node's interval intersects [start;last] iff: \ * Cond1: ITSTART(node) <= last \ * and \ * Cond2: start <= ITLAST(node) \ */ \ \ static ITSTRUCT * \ ITPREFIX ## _subtree_search(ITSTRUCT *node, ITTYPE start, ITTYPE last) \ { \ while (true) { \ /* \ * Loop invariant: start <= node->ITSUBTREE \ * (Cond2 is satisfied by one of the subtree nodes) \ */ \ if (node->ITRB.rb_left) { \ ITSTRUCT *left = rb_entry(node->ITRB.rb_left, \ ITSTRUCT, ITRB); \ if (start <= left->ITSUBTREE) { \ /* \ * Some nodes in left subtree satisfy Cond2. \ * Iterate to find the leftmost such node N. \ * If it also satisfies Cond1, that's the \ * match we are looking for. Otherwise, there \ * is no matching interval as nodes to the \ * right of N can't satisfy Cond1 either. \ */ \ node = left; \ continue; \ } \ } \ if (ITSTART(node) <= last) { /* Cond1 */ \ if (start <= ITLAST(node)) /* Cond2 */ \ return node; /* node is leftmost match */ \ if (node->ITRB.rb_right) { \ node = rb_entry(node->ITRB.rb_right, \ ITSTRUCT, ITRB); \ if (start <= node->ITSUBTREE) \ continue; \ } \ } \ return NULL; /* No match */ \ } \ } \ \ ITSTATIC ITSTRUCT * \ ITPREFIX ## _iter_first(struct rb_root_cached *root, \ ITTYPE start, ITTYPE last) \ { \ ITSTRUCT *node, *leftmost; \ \ if (!root->rb_root.rb_node) \ return NULL; \ \ /* \ * Fastpath range intersection/overlap between A: [a0, a1] and \ * B: [b0, b1] is given by: \ * \ * a0 <= b1 && b0 <= a1 \ * \ * ... where A holds the lock range and B holds the smallest \ * 'start' and largest 'last' in the tree. For the later, we \ * rely on the root node, which by augmented interval tree \ * property, holds the largest value in its last-in-subtree. \ * This allows mitigating some of the tree walk overhead for \ * for non-intersecting ranges, maintained and consulted in O(1). \ */ \ node = rb_entry(root->rb_root.rb_node, ITSTRUCT, ITRB); \ if (node->ITSUBTREE < start) \ return NULL; \ \ leftmost = rb_entry(root->rb_leftmost, ITSTRUCT, ITRB); \ if (ITSTART(leftmost) > last) \ return NULL; \ \ return ITPREFIX ## _subtree_search(node, start, last); \ } \ \ ITSTATIC ITSTRUCT * \ ITPREFIX ## _iter_next(ITSTRUCT *node, ITTYPE start, ITTYPE last) \ { \ struct rb_node *rb = node->ITRB.rb_right, *prev; \ \ while (true) { \ /* \ * Loop invariants: \ * Cond1: ITSTART(node) <= last \ * rb == node->ITRB.rb_right \ * \ * First, search right subtree if suitable \ */ \ if (rb) { \ ITSTRUCT *right = rb_entry(rb, ITSTRUCT, ITRB); \ if (start <= right->ITSUBTREE) \ return ITPREFIX ## _subtree_search(right, \ start, last); \ } \ \ /* Move up the tree until we come from a node's left child */ \ do { \ rb = rb_parent(&node->ITRB); \ if (!rb) \ return NULL; \ prev = &node->ITRB; \ node = rb_entry(rb, ITSTRUCT, ITRB); \ rb = node->ITRB.rb_right; \ } while (prev == rb); \ \ /* Check if the node intersects [start;last] */ \ if (last < ITSTART(node)) /* !Cond1 */ \ return NULL; \ else if (start <= ITLAST(node)) /* Cond2 */ \ return node; \ } \ } PK ! {��(� � cma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __CMA_H__ #define __CMA_H__ #include <linux/init.h> #include <linux/types.h> #include <linux/numa.h> /* * There is always at least global CMA area and a few optional * areas configured in kernel .config. */ #ifdef CONFIG_CMA_AREAS #define MAX_CMA_AREAS (1 + CONFIG_CMA_AREAS) #else #define MAX_CMA_AREAS (0) #endif #define CMA_MAX_NAME 64 /* * TODO: once the buddy -- especially pageblock merging and alloc_contig_range() * -- can deal with only some pageblocks of a higher-order page being * MIGRATE_CMA, we can use pageblock_nr_pages. */ #define CMA_MIN_ALIGNMENT_PAGES max_t(phys_addr_t, MAX_ORDER_NR_PAGES, \ pageblock_nr_pages) #define CMA_MIN_ALIGNMENT_BYTES (PAGE_SIZE * CMA_MIN_ALIGNMENT_PAGES) struct cma; extern unsigned long totalcma_pages; extern phys_addr_t cma_get_base(const struct cma *cma); extern unsigned long cma_get_size(const struct cma *cma); extern const char *cma_get_name(const struct cma *cma); extern int __init cma_declare_contiguous_nid(phys_addr_t base, phys_addr_t size, phys_addr_t limit, phys_addr_t alignment, unsigned int order_per_bit, bool fixed, const char *name, struct cma **res_cma, int nid); static inline int __init cma_declare_contiguous(phys_addr_t base, phys_addr_t size, phys_addr_t limit, phys_addr_t alignment, unsigned int order_per_bit, bool fixed, const char *name, struct cma **res_cma) { return cma_declare_contiguous_nid(base, size, limit, alignment, order_per_bit, fixed, name, res_cma, NUMA_NO_NODE); } extern int cma_init_reserved_mem(phys_addr_t base, phys_addr_t size, unsigned int order_per_bit, const char *name, struct cma **res_cma); extern struct page *cma_alloc(struct cma *cma, unsigned long count, unsigned int align, bool no_warn); extern bool cma_release(struct cma *cma, const struct page *pages, unsigned long count); extern int cma_for_each_area(int (*it)(struct cma *cma, void *data), void *data); #endif PK ! �8�B� � mcb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * MEN Chameleon Bus. * * Copyright (C) 2014 MEN Mikroelektronik GmbH (www.men.de) * Author: Johannes Thumshirn <johannes.thumshirn@men.de> */ #ifndef _LINUX_MCB_H #define _LINUX_MCB_H #include <linux/mod_devicetable.h> #include <linux/device.h> #include <linux/irqreturn.h> #define CHAMELEON_FILENAME_LEN 12 struct mcb_driver; struct mcb_device; /** * struct mcb_bus - MEN Chameleon Bus * * @dev: bus device * @carrier: pointer to carrier device * @bus_nr: mcb bus number * @get_irq: callback to get IRQ number * @revision: the FPGA's revision number * @model: the FPGA's model number * @filename: the FPGA's name */ struct mcb_bus { struct device dev; struct device *carrier; int bus_nr; u8 revision; char model; u8 minor; char name[CHAMELEON_FILENAME_LEN + 1]; int (*get_irq)(struct mcb_device *dev); }; static inline struct mcb_bus *to_mcb_bus(struct device *dev) { return container_of(dev, struct mcb_bus, dev); } /** * struct mcb_device - MEN Chameleon Bus device * * @dev: device in kernel representation * @bus: mcb bus the device is plugged to * @is_added: flag to check if device is added to bus * @driver: associated mcb_driver * @id: mcb device id * @inst: instance in Chameleon table * @group: group in Chameleon table * @var: variant in Chameleon table * @bar: BAR in Chameleon table * @rev: revision in Chameleon table * @irq: IRQ resource * @memory: memory resource */ struct mcb_device { struct device dev; struct mcb_bus *bus; struct mcb_driver *driver; u16 id; int inst; int group; int var; int bar; int rev; struct resource irq; struct resource mem; struct device *dma_dev; }; static inline struct mcb_device *to_mcb_device(struct device *dev) { return container_of(dev, struct mcb_device, dev); } /** * struct mcb_driver - MEN Chameleon Bus device driver * * @driver: device_driver * @id_table: mcb id table * @probe: probe callback * @remove: remove callback * @shutdown: shutdown callback */ struct mcb_driver { struct device_driver driver; const struct mcb_device_id *id_table; int (*probe)(struct mcb_device *mdev, const struct mcb_device_id *id); void (*remove)(struct mcb_device *mdev); void (*shutdown)(struct mcb_device *mdev); }; static inline struct mcb_driver *to_mcb_driver(struct device_driver *drv) { return container_of(drv, struct mcb_driver, driver); } static inline void *mcb_get_drvdata(struct mcb_device *dev) { return dev_get_drvdata(&dev->dev); } static inline void mcb_set_drvdata(struct mcb_device *dev, void *data) { dev_set_drvdata(&dev->dev, data); } extern int __must_check __mcb_register_driver(struct mcb_driver *drv, struct module *owner, const char *mod_name); #define mcb_register_driver(driver) \ __mcb_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) extern void mcb_unregister_driver(struct mcb_driver *driver); #define module_mcb_driver(__mcb_driver) \ module_driver(__mcb_driver, mcb_register_driver, mcb_unregister_driver) extern void mcb_bus_add_devices(const struct mcb_bus *bus); extern int mcb_device_register(struct mcb_bus *bus, struct mcb_device *dev); extern struct mcb_bus *mcb_alloc_bus(struct device *carrier); extern struct mcb_bus *mcb_bus_get(struct mcb_bus *bus); extern void mcb_bus_put(struct mcb_bus *bus); extern struct mcb_device *mcb_alloc_dev(struct mcb_bus *bus); extern void mcb_free_dev(struct mcb_device *dev); extern void mcb_release_bus(struct mcb_bus *bus); extern struct resource *mcb_request_mem(struct mcb_device *dev, const char *name); extern void mcb_release_mem(struct resource *mem); extern int mcb_get_irq(struct mcb_device *dev); extern struct resource *mcb_get_resource(struct mcb_device *dev, unsigned int type); #endif /* _LINUX_MCB_H */ PK ! �8� � fec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* include/linux/fec.h * * Copyright (c) 2009 Orex Computed Radiography * Baruch Siach <baruch@tkos.co.il> * * Copyright (C) 2010 Freescale Semiconductor, Inc. * * Header file for the FEC platform data */ #ifndef __LINUX_FEC_H__ #define __LINUX_FEC_H__ #include <linux/phy.h> struct fec_platform_data { phy_interface_t phy; unsigned char mac[ETH_ALEN]; void (*sleep_mode_enable)(int enabled); }; #endif PK ! 18 � � bsg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BSG_H #define _LINUX_BSG_H #include <uapi/linux/bsg.h> struct bsg_device; struct device; struct request_queue; typedef int (bsg_sg_io_fn)(struct request_queue *, struct sg_io_v4 *hdr, fmode_t mode, unsigned int timeout); struct bsg_device *bsg_register_queue(struct request_queue *q, struct device *parent, const char *name, bsg_sg_io_fn *sg_io_fn); void bsg_unregister_queue(struct bsg_device *bcd); #endif /* _LINUX_BSG_H */ PK ! ѩ�d d netfilter_ipv6.hnu �[��� /* IPv6-specific defines for netfilter. * (C)1998 Rusty Russell -- This code is GPL. * (C)1999 David Jeffery * this header was blatantly ripped from netfilter_ipv4.h * it's amazing what adding a bunch of 6s can do =8^) */ #ifndef __LINUX_IP6_NETFILTER_H #define __LINUX_IP6_NETFILTER_H #include <uapi/linux/netfilter_ipv6.h> #include <net/tcp.h> /* Check for an extension */ static inline int nf_ip6_ext_hdr(u8 nexthdr) { return (nexthdr == IPPROTO_HOPOPTS) || (nexthdr == IPPROTO_ROUTING) || (nexthdr == IPPROTO_FRAGMENT) || (nexthdr == IPPROTO_ESP) || (nexthdr == IPPROTO_AH) || (nexthdr == IPPROTO_NONE) || (nexthdr == IPPROTO_DSTOPTS); } /* Extra routing may needed on local out, as the QUEUE target never returns * control to the table. */ struct ip6_rt_info { struct in6_addr daddr; struct in6_addr saddr; u_int32_t mark; }; struct nf_queue_entry; struct nf_bridge_frag_data; /* * Hook functions for ipv6 to allow xt_* modules to be built-in even * if IPv6 is a module. */ struct nf_ipv6_ops { #if IS_MODULE(CONFIG_IPV6) int (*chk_addr)(struct net *net, const struct in6_addr *addr, const struct net_device *dev, int strict); int (*route_me_harder)(struct net *net, struct sock *sk, struct sk_buff *skb); int (*dev_get_saddr)(struct net *net, const struct net_device *dev, const struct in6_addr *daddr, unsigned int srcprefs, struct in6_addr *saddr); int (*route)(struct net *net, struct dst_entry **dst, struct flowi *fl, bool strict); u32 (*cookie_init_sequence)(const struct ipv6hdr *iph, const struct tcphdr *th, u16 *mssp); int (*cookie_v6_check)(const struct ipv6hdr *iph, const struct tcphdr *th, __u32 cookie); #endif void (*route_input)(struct sk_buff *skb); int (*fragment)(struct net *net, struct sock *sk, struct sk_buff *skb, int (*output)(struct net *, struct sock *, struct sk_buff *)); int (*reroute)(struct sk_buff *skb, const struct nf_queue_entry *entry); #if IS_MODULE(CONFIG_IPV6) int (*br_fragment)(struct net *net, struct sock *sk, struct sk_buff *skb, struct nf_bridge_frag_data *data, int (*output)(struct net *, struct sock *sk, const struct nf_bridge_frag_data *data, struct sk_buff *)); #endif }; #ifdef CONFIG_NETFILTER #include <net/addrconf.h> extern const struct nf_ipv6_ops __rcu *nf_ipv6_ops; static inline const struct nf_ipv6_ops *nf_get_ipv6_ops(void) { return rcu_dereference(nf_ipv6_ops); } static inline int nf_ipv6_chk_addr(struct net *net, const struct in6_addr *addr, const struct net_device *dev, int strict) { #if IS_MODULE(CONFIG_IPV6) const struct nf_ipv6_ops *v6_ops = nf_get_ipv6_ops(); if (!v6_ops) return 1; return v6_ops->chk_addr(net, addr, dev, strict); #elif IS_BUILTIN(CONFIG_IPV6) return ipv6_chk_addr(net, addr, dev, strict); #else return 1; #endif } int __nf_ip6_route(struct net *net, struct dst_entry **dst, struct flowi *fl, bool strict); static inline int nf_ip6_route(struct net *net, struct dst_entry **dst, struct flowi *fl, bool strict) { #if IS_MODULE(CONFIG_IPV6) const struct nf_ipv6_ops *v6ops = nf_get_ipv6_ops(); if (v6ops) return v6ops->route(net, dst, fl, strict); return -EHOSTUNREACH; #endif #if IS_BUILTIN(CONFIG_IPV6) return __nf_ip6_route(net, dst, fl, strict); #else return -EHOSTUNREACH; #endif } #include <net/netfilter/ipv6/nf_defrag_ipv6.h> int br_ip6_fragment(struct net *net, struct sock *sk, struct sk_buff *skb, struct nf_bridge_frag_data *data, int (*output)(struct net *, struct sock *sk, const struct nf_bridge_frag_data *data, struct sk_buff *)); static inline int nf_br_ip6_fragment(struct net *net, struct sock *sk, struct sk_buff *skb, struct nf_bridge_frag_data *data, int (*output)(struct net *, struct sock *sk, const struct nf_bridge_frag_data *data, struct sk_buff *)) { #if IS_MODULE(CONFIG_IPV6) const struct nf_ipv6_ops *v6_ops = nf_get_ipv6_ops(); if (!v6_ops) return 1; return v6_ops->br_fragment(net, sk, skb, data, output); #elif IS_BUILTIN(CONFIG_IPV6) return br_ip6_fragment(net, sk, skb, data, output); #else return 1; #endif } int ip6_route_me_harder(struct net *net, struct sock *sk, struct sk_buff *skb); static inline int nf_ip6_route_me_harder(struct net *net, struct sock *sk, struct sk_buff *skb) { #if IS_MODULE(CONFIG_IPV6) const struct nf_ipv6_ops *v6_ops = nf_get_ipv6_ops(); if (!v6_ops) return -EHOSTUNREACH; return v6_ops->route_me_harder(net, sk, skb); #elif IS_BUILTIN(CONFIG_IPV6) return ip6_route_me_harder(net, sk, skb); #else return -EHOSTUNREACH; #endif } static inline u32 nf_ipv6_cookie_init_sequence(const struct ipv6hdr *iph, const struct tcphdr *th, u16 *mssp) { #if IS_ENABLED(CONFIG_SYN_COOKIES) #if IS_MODULE(CONFIG_IPV6) const struct nf_ipv6_ops *v6_ops = nf_get_ipv6_ops(); if (v6_ops) return v6_ops->cookie_init_sequence(iph, th, mssp); #elif IS_BUILTIN(CONFIG_IPV6) return __cookie_v6_init_sequence(iph, th, mssp); #endif #endif return 0; } static inline int nf_cookie_v6_check(const struct ipv6hdr *iph, const struct tcphdr *th, __u32 cookie) { #if IS_ENABLED(CONFIG_SYN_COOKIES) #if IS_MODULE(CONFIG_IPV6) const struct nf_ipv6_ops *v6_ops = nf_get_ipv6_ops(); if (v6_ops) return v6_ops->cookie_v6_check(iph, th, cookie); #elif IS_BUILTIN(CONFIG_IPV6) return __cookie_v6_check(iph, th, cookie); #endif #endif return 0; } __sum16 nf_ip6_checksum(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, u_int8_t protocol); int ipv6_netfilter_init(void); void ipv6_netfilter_fini(void); #else /* CONFIG_NETFILTER */ static inline int ipv6_netfilter_init(void) { return 0; } static inline void ipv6_netfilter_fini(void) { return; } static inline const struct nf_ipv6_ops *nf_get_ipv6_ops(void) { return NULL; } #endif /* CONFIG_NETFILTER */ #endif /*__LINUX_IP6_NETFILTER_H*/ PK ! s���� � lapb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * These are the public elements of the Linux LAPB module. */ #ifndef LAPB_KERNEL_H #define LAPB_KERNEL_H #define LAPB_OK 0 #define LAPB_BADTOKEN 1 #define LAPB_INVALUE 2 #define LAPB_CONNECTED 3 #define LAPB_NOTCONNECTED 4 #define LAPB_REFUSED 5 #define LAPB_TIMEDOUT 6 #define LAPB_NOMEM 7 #define LAPB_STANDARD 0x00 #define LAPB_EXTENDED 0x01 #define LAPB_SLP 0x00 #define LAPB_MLP 0x02 #define LAPB_DTE 0x00 #define LAPB_DCE 0x04 struct lapb_register_struct { void (*connect_confirmation)(struct net_device *dev, int reason); void (*connect_indication)(struct net_device *dev, int reason); void (*disconnect_confirmation)(struct net_device *dev, int reason); void (*disconnect_indication)(struct net_device *dev, int reason); int (*data_indication)(struct net_device *dev, struct sk_buff *skb); void (*data_transmit)(struct net_device *dev, struct sk_buff *skb); }; struct lapb_parms_struct { unsigned int t1; unsigned int t1timer; unsigned int t2; unsigned int t2timer; unsigned int n2; unsigned int n2count; unsigned int window; unsigned int state; unsigned int mode; }; extern int lapb_register(struct net_device *dev, const struct lapb_register_struct *callbacks); extern int lapb_unregister(struct net_device *dev); extern int lapb_getparms(struct net_device *dev, struct lapb_parms_struct *parms); extern int lapb_setparms(struct net_device *dev, struct lapb_parms_struct *parms); extern int lapb_connect_request(struct net_device *dev); extern int lapb_disconnect_request(struct net_device *dev); extern int lapb_data_request(struct net_device *dev, struct sk_buff *skb); extern int lapb_data_received(struct net_device *dev, struct sk_buff *skb); #endif PK ! ��{�M �M audit.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* audit.h -- Auditing support * * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina. * All Rights Reserved. * * Written by Rickard E. (Rik) Faith <faith@redhat.com> */ #ifndef _LINUX_AUDIT_H_ #define _LINUX_AUDIT_H_ #include <linux/sched.h> #include <linux/ptrace.h> #include <linux/security.h> #include <uapi/linux/audit.h> #include <uapi/linux/netfilter/nf_tables.h> #define AUDIT_INO_UNSET ((unsigned long)-1) #define AUDIT_DEV_UNSET ((dev_t)-1) struct audit_sig_info { uid_t uid; pid_t pid; char ctx[]; }; struct audit_buffer; struct audit_context; struct inode; struct netlink_skb_parms; struct path; struct linux_binprm; struct mq_attr; struct mqstat; struct audit_watch; struct audit_tree; struct sk_buff; struct audit_krule { u32 pflags; u32 flags; u32 listnr; u32 action; u32 mask[AUDIT_BITMASK_SIZE]; u32 buflen; /* for data alloc on list rules */ u32 field_count; char *filterkey; /* ties events to rules */ struct audit_field *fields; struct audit_field *arch_f; /* quick access to arch field */ struct audit_field *inode_f; /* quick access to an inode field */ struct audit_watch *watch; /* associated watch */ struct audit_tree *tree; /* associated watched tree */ struct audit_fsnotify_mark *exe; struct list_head rlist; /* entry in audit_{watch,tree}.rules list */ struct list_head list; /* for AUDIT_LIST* purposes only */ u64 prio; }; /* Flag to indicate legacy AUDIT_LOGINUID unset usage */ #define AUDIT_LOGINUID_LEGACY 0x1 struct audit_field { u32 type; union { u32 val; kuid_t uid; kgid_t gid; struct { bool lsm_isset; char *lsm_str; void *lsm_rules[LSMBLOB_ENTRIES]; }; }; u32 op; }; enum audit_ntp_type { AUDIT_NTP_OFFSET, AUDIT_NTP_FREQ, AUDIT_NTP_STATUS, AUDIT_NTP_TAI, AUDIT_NTP_TICK, AUDIT_NTP_ADJUST, AUDIT_NTP_NVALS /* count */ }; #ifdef CONFIG_AUDITSYSCALL struct audit_ntp_val { long long oldval, newval; }; struct audit_ntp_data { struct audit_ntp_val vals[AUDIT_NTP_NVALS]; }; #else struct audit_ntp_data {}; #endif enum audit_nfcfgop { AUDIT_XT_OP_REGISTER, AUDIT_XT_OP_REPLACE, AUDIT_XT_OP_UNREGISTER, AUDIT_NFT_OP_TABLE_REGISTER, AUDIT_NFT_OP_TABLE_UNREGISTER, AUDIT_NFT_OP_CHAIN_REGISTER, AUDIT_NFT_OP_CHAIN_UNREGISTER, AUDIT_NFT_OP_RULE_REGISTER, AUDIT_NFT_OP_RULE_UNREGISTER, AUDIT_NFT_OP_SET_REGISTER, AUDIT_NFT_OP_SET_UNREGISTER, AUDIT_NFT_OP_SETELEM_REGISTER, AUDIT_NFT_OP_SETELEM_UNREGISTER, AUDIT_NFT_OP_GEN_REGISTER, AUDIT_NFT_OP_OBJ_REGISTER, AUDIT_NFT_OP_OBJ_UNREGISTER, AUDIT_NFT_OP_OBJ_RESET, AUDIT_NFT_OP_FLOWTABLE_REGISTER, AUDIT_NFT_OP_FLOWTABLE_UNREGISTER, AUDIT_NFT_OP_INVALID, }; extern int is_audit_feature_set(int which); extern int __init audit_register_class(int class, unsigned *list); extern int audit_classify_syscall(int abi, unsigned syscall); extern int audit_classify_arch(int arch); /* only for compat system calls */ extern unsigned compat_write_class[]; extern unsigned compat_read_class[]; extern unsigned compat_dir_class[]; extern unsigned compat_chattr_class[]; extern unsigned compat_signal_class[]; extern int audit_classify_compat_syscall(int abi, unsigned syscall); /* audit_names->type values */ #define AUDIT_TYPE_UNKNOWN 0 /* we don't know yet */ #define AUDIT_TYPE_NORMAL 1 /* a "normal" audit record */ #define AUDIT_TYPE_PARENT 2 /* a parent audit record */ #define AUDIT_TYPE_CHILD_DELETE 3 /* a child being deleted */ #define AUDIT_TYPE_CHILD_CREATE 4 /* a child being created */ /* maximized args number that audit_socketcall can process */ #define AUDITSC_ARGS 6 /* bit values for ->signal->audit_tty */ #define AUDIT_TTY_ENABLE BIT(0) #define AUDIT_TTY_LOG_PASSWD BIT(1) struct filename; #define AUDIT_OFF 0 #define AUDIT_ON 1 #define AUDIT_LOCKED 2 #ifdef CONFIG_AUDIT /* These are defined in audit.c */ /* Public API */ extern __printf(4, 5) void audit_log(struct audit_context *ctx, gfp_t gfp_mask, int type, const char *fmt, ...); extern struct audit_buffer *audit_log_start(struct audit_context *ctx, gfp_t gfp_mask, int type); extern __printf(2, 3) void audit_log_format(struct audit_buffer *ab, const char *fmt, ...); extern void audit_log_end(struct audit_buffer *ab); extern bool audit_string_contains_control(const char *string, size_t len); extern void audit_log_n_hex(struct audit_buffer *ab, const unsigned char *buf, size_t len); extern void audit_log_n_string(struct audit_buffer *ab, const char *buf, size_t n); extern void audit_log_n_untrustedstring(struct audit_buffer *ab, const char *string, size_t n); extern void audit_log_untrustedstring(struct audit_buffer *ab, const char *string); extern void audit_log_d_path(struct audit_buffer *ab, const char *prefix, const struct path *path); extern void audit_log_key(struct audit_buffer *ab, char *key); extern void audit_log_path_denied(int type, const char *operation); extern void audit_log_lost(const char *message); extern void audit_log_lsm(struct lsmblob *blob, bool exiting); extern int audit_log_task_context(struct audit_buffer *ab, struct lsmblob *blob); extern int audit_log_object_context(struct audit_buffer *ab, struct lsmblob *blob); extern void audit_log_task_info(struct audit_buffer *ab); extern int audit_update_lsm_rules(void); /* Private API (for audit.c only) */ extern int audit_rule_change(int type, int seq, void *data, size_t datasz); extern int audit_list_rules_send(struct sk_buff *request_skb, int seq); extern int audit_set_loginuid(kuid_t loginuid); static inline kuid_t audit_get_loginuid(struct task_struct *tsk) { return tsk->loginuid; } static inline unsigned int audit_get_sessionid(struct task_struct *tsk) { return tsk->sessionid; } extern u32 audit_enabled; extern int audit_signal_info(int sig, struct task_struct *t); #else /* CONFIG_AUDIT */ static inline __printf(4, 5) void audit_log(struct audit_context *ctx, gfp_t gfp_mask, int type, const char *fmt, ...) { } static inline struct audit_buffer *audit_log_start(struct audit_context *ctx, gfp_t gfp_mask, int type) { return NULL; } static inline __printf(2, 3) void audit_log_format(struct audit_buffer *ab, const char *fmt, ...) { } static inline void audit_log_end(struct audit_buffer *ab) { } static inline void audit_log_n_hex(struct audit_buffer *ab, const unsigned char *buf, size_t len) { } static inline void audit_log_n_string(struct audit_buffer *ab, const char *buf, size_t n) { } static inline void audit_log_n_untrustedstring(struct audit_buffer *ab, const char *string, size_t n) { } static inline void audit_log_untrustedstring(struct audit_buffer *ab, const char *string) { } static inline void audit_log_d_path(struct audit_buffer *ab, const char *prefix, const struct path *path) { } static inline void audit_log_key(struct audit_buffer *ab, char *key) { } static inline void audit_log_path_denied(int type, const char *operation) { } static inline void audit_log_lsm(struct lsmblob *blob, bool exiting) { } static inline int audit_log_task_context(struct audit_buffer *ab, struct lsmblob *blob) { return 0; } static inline void audit_log_task_info(struct audit_buffer *ab) { } static inline kuid_t audit_get_loginuid(struct task_struct *tsk) { return INVALID_UID; } static inline unsigned int audit_get_sessionid(struct task_struct *tsk) { return AUDIT_SID_UNSET; } #define audit_enabled AUDIT_OFF static inline int audit_signal_info(int sig, struct task_struct *t) { return 0; } #endif /* CONFIG_AUDIT */ #ifdef CONFIG_AUDIT_COMPAT_GENERIC #define audit_is_compat(arch) (!((arch) & __AUDIT_ARCH_64BIT)) #else #define audit_is_compat(arch) false #endif #define AUDIT_INODE_PARENT 1 /* dentry represents the parent */ #define AUDIT_INODE_HIDDEN 2 /* audit record should be hidden */ #define AUDIT_INODE_NOEVAL 4 /* audit record incomplete */ #ifdef CONFIG_AUDITSYSCALL #include <asm/syscall.h> /* for syscall_get_arch() */ /* These are defined in auditsc.c */ /* Public API */ extern int audit_alloc(struct task_struct *task); extern void __audit_free(struct task_struct *task); extern void __audit_syscall_entry(int major, unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3); extern void __audit_syscall_exit(int ret_success, long ret_value); extern struct filename *__audit_reusename(const __user char *uptr); extern void __audit_getname(struct filename *name); extern void __audit_inode(struct filename *name, const struct dentry *dentry, unsigned int flags); extern void __audit_file(const struct file *); extern void __audit_inode_child(struct inode *parent, const struct dentry *dentry, const unsigned char type); extern void audit_seccomp(unsigned long syscall, long signr, int code); extern void audit_seccomp_actions_logged(const char *names, const char *old_names, int res); extern void __audit_ptrace(struct task_struct *t); extern void audit_stamp_context(struct audit_context *ctx); static inline void audit_set_context(struct task_struct *task, struct audit_context *ctx) { task->audit_context = ctx; } static inline struct audit_context *audit_context(void) { return current->audit_context; } static inline bool audit_dummy_context(void) { void *p = audit_context(); return !p || *(int *)p; } static inline void audit_free(struct task_struct *task) { if (unlikely(task->audit_context)) __audit_free(task); } static inline void audit_syscall_entry(int major, unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3) { if (unlikely(audit_context())) __audit_syscall_entry(major, a0, a1, a2, a3); } static inline void audit_syscall_exit(void *pt_regs) { if (unlikely(audit_context())) { int success = is_syscall_success(pt_regs); long return_code = regs_return_value(pt_regs); __audit_syscall_exit(success, return_code); } } static inline struct filename *audit_reusename(const __user char *name) { if (unlikely(!audit_dummy_context())) return __audit_reusename(name); return NULL; } static inline void audit_getname(struct filename *name) { if (unlikely(!audit_dummy_context())) __audit_getname(name); } static inline void audit_inode(struct filename *name, const struct dentry *dentry, unsigned int aflags) { if (unlikely(!audit_dummy_context())) __audit_inode(name, dentry, aflags); } static inline void audit_file(struct file *file) { if (unlikely(!audit_dummy_context())) __audit_file(file); } static inline void audit_inode_parent_hidden(struct filename *name, const struct dentry *dentry) { if (unlikely(!audit_dummy_context())) __audit_inode(name, dentry, AUDIT_INODE_PARENT | AUDIT_INODE_HIDDEN); } static inline void audit_inode_child(struct inode *parent, const struct dentry *dentry, const unsigned char type) { if (unlikely(!audit_dummy_context())) __audit_inode_child(parent, dentry, type); } void audit_core_dumps(long signr); static inline void audit_ptrace(struct task_struct *t) { if (unlikely(!audit_dummy_context())) __audit_ptrace(t); } /* Private API (for audit.c only) */ extern void __audit_ipc_obj(struct kern_ipc_perm *ipcp); extern void __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode); extern void __audit_bprm(struct linux_binprm *bprm); extern int __audit_socketcall(int nargs, unsigned long *args); extern int __audit_sockaddr(int len, void *addr); extern void __audit_fd_pair(int fd1, int fd2); extern void __audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr); extern void __audit_mq_sendrecv(mqd_t mqdes, size_t msg_len, unsigned int msg_prio, const struct timespec64 *abs_timeout); extern void __audit_mq_notify(mqd_t mqdes, const struct sigevent *notification); extern void __audit_mq_getsetattr(mqd_t mqdes, struct mq_attr *mqstat); extern int __audit_log_bprm_fcaps(struct linux_binprm *bprm, const struct cred *new, const struct cred *old); extern void __audit_log_capset(const struct cred *new, const struct cred *old); extern void __audit_mmap_fd(int fd, int flags); extern void __audit_log_kern_module(char *name); extern void __audit_fanotify(unsigned int response); extern void __audit_tk_injoffset(struct timespec64 offset); extern void __audit_ntp_log(const struct audit_ntp_data *ad); extern void __audit_log_nfcfg(const char *name, u8 af, unsigned int nentries, enum audit_nfcfgop op, gfp_t gfp); static inline void audit_ipc_obj(struct kern_ipc_perm *ipcp) { if (unlikely(!audit_dummy_context())) __audit_ipc_obj(ipcp); } static inline void audit_fd_pair(int fd1, int fd2) { if (unlikely(!audit_dummy_context())) __audit_fd_pair(fd1, fd2); } static inline void audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode) { if (unlikely(!audit_dummy_context())) __audit_ipc_set_perm(qbytes, uid, gid, mode); } static inline void audit_bprm(struct linux_binprm *bprm) { if (unlikely(!audit_dummy_context())) __audit_bprm(bprm); } static inline int audit_socketcall(int nargs, unsigned long *args) { if (unlikely(!audit_dummy_context())) return __audit_socketcall(nargs, args); return 0; } static inline int audit_socketcall_compat(int nargs, u32 *args) { unsigned long a[AUDITSC_ARGS]; int i; if (audit_dummy_context()) return 0; for (i = 0; i < nargs; i++) a[i] = (unsigned long)args[i]; return __audit_socketcall(nargs, a); } static inline int audit_sockaddr(int len, void *addr) { if (unlikely(!audit_dummy_context())) return __audit_sockaddr(len, addr); return 0; } static inline void audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr) { if (unlikely(!audit_dummy_context())) __audit_mq_open(oflag, mode, attr); } static inline void audit_mq_sendrecv(mqd_t mqdes, size_t msg_len, unsigned int msg_prio, const struct timespec64 *abs_timeout) { if (unlikely(!audit_dummy_context())) __audit_mq_sendrecv(mqdes, msg_len, msg_prio, abs_timeout); } static inline void audit_mq_notify(mqd_t mqdes, const struct sigevent *notification) { if (unlikely(!audit_dummy_context())) __audit_mq_notify(mqdes, notification); } static inline void audit_mq_getsetattr(mqd_t mqdes, struct mq_attr *mqstat) { if (unlikely(!audit_dummy_context())) __audit_mq_getsetattr(mqdes, mqstat); } static inline int audit_log_bprm_fcaps(struct linux_binprm *bprm, const struct cred *new, const struct cred *old) { if (unlikely(!audit_dummy_context())) return __audit_log_bprm_fcaps(bprm, new, old); return 0; } static inline void audit_log_capset(const struct cred *new, const struct cred *old) { if (unlikely(!audit_dummy_context())) __audit_log_capset(new, old); } static inline void audit_mmap_fd(int fd, int flags) { if (unlikely(!audit_dummy_context())) __audit_mmap_fd(fd, flags); } static inline void audit_log_kern_module(char *name) { if (!audit_dummy_context()) __audit_log_kern_module(name); } static inline void audit_fanotify(unsigned int response) { if (!audit_dummy_context()) __audit_fanotify(response); } static inline void audit_tk_injoffset(struct timespec64 offset) { /* ignore no-op events */ if (offset.tv_sec == 0 && offset.tv_nsec == 0) return; if (!audit_dummy_context()) __audit_tk_injoffset(offset); } static inline void audit_ntp_init(struct audit_ntp_data *ad) { memset(ad, 0, sizeof(*ad)); } static inline void audit_ntp_set_old(struct audit_ntp_data *ad, enum audit_ntp_type type, long long val) { ad->vals[type].oldval = val; } static inline void audit_ntp_set_new(struct audit_ntp_data *ad, enum audit_ntp_type type, long long val) { ad->vals[type].newval = val; } static inline void audit_ntp_log(const struct audit_ntp_data *ad) { if (!audit_dummy_context()) __audit_ntp_log(ad); } static inline void audit_log_nfcfg(const char *name, u8 af, unsigned int nentries, enum audit_nfcfgop op, gfp_t gfp) { if (audit_enabled) __audit_log_nfcfg(name, af, nentries, op, gfp); } extern int audit_n_rules; extern int audit_signals; #else /* CONFIG_AUDITSYSCALL */ static inline int audit_alloc(struct task_struct *task) { return 0; } static inline void audit_free(struct task_struct *task) { } static inline void audit_syscall_entry(int major, unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3) { } static inline void audit_syscall_exit(void *pt_regs) { } static inline bool audit_dummy_context(void) { return true; } static inline void audit_set_context(struct task_struct *task, struct audit_context *ctx) { } static inline struct audit_context *audit_context(void) { return NULL; } static inline struct filename *audit_reusename(const __user char *name) { return NULL; } static inline void audit_getname(struct filename *name) { } static inline void audit_inode(struct filename *name, const struct dentry *dentry, unsigned int aflags) { } static inline void audit_file(struct file *file) { } static inline void audit_inode_parent_hidden(struct filename *name, const struct dentry *dentry) { } static inline void audit_inode_child(struct inode *parent, const struct dentry *dentry, const unsigned char type) { } static inline void audit_core_dumps(long signr) { } static inline void audit_seccomp(unsigned long syscall, long signr, int code) { } static inline void audit_seccomp_actions_logged(const char *names, const char *old_names, int res) { } static inline void audit_ipc_obj(struct kern_ipc_perm *ipcp) { } static inline void audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode) { } static inline void audit_bprm(struct linux_binprm *bprm) { } static inline int audit_socketcall(int nargs, unsigned long *args) { return 0; } static inline int audit_socketcall_compat(int nargs, u32 *args) { return 0; } static inline void audit_fd_pair(int fd1, int fd2) { } static inline int audit_sockaddr(int len, void *addr) { return 0; } static inline void audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr) { } static inline void audit_mq_sendrecv(mqd_t mqdes, size_t msg_len, unsigned int msg_prio, const struct timespec64 *abs_timeout) { } static inline void audit_mq_notify(mqd_t mqdes, const struct sigevent *notification) { } static inline void audit_mq_getsetattr(mqd_t mqdes, struct mq_attr *mqstat) { } static inline int audit_log_bprm_fcaps(struct linux_binprm *bprm, const struct cred *new, const struct cred *old) { return 0; } static inline void audit_log_capset(const struct cred *new, const struct cred *old) { } static inline void audit_mmap_fd(int fd, int flags) { } static inline void audit_log_kern_module(char *name) { } static inline void audit_fanotify(unsigned int response) { } static inline void audit_tk_injoffset(struct timespec64 offset) { } static inline void audit_ntp_init(struct audit_ntp_data *ad) { } static inline void audit_ntp_set_old(struct audit_ntp_data *ad, enum audit_ntp_type type, long long val) { } static inline void audit_ntp_set_new(struct audit_ntp_data *ad, enum audit_ntp_type type, long long val) { } static inline void audit_ntp_log(const struct audit_ntp_data *ad) { } static inline void audit_ptrace(struct task_struct *t) { } static inline void audit_stamp_context(struct audit_context *ctx) { } static inline void audit_log_nfcfg(const char *name, u8 af, unsigned int nentries, enum audit_nfcfgop op, gfp_t gfp) { } #define audit_n_rules 0 #define audit_signals 0 #endif /* CONFIG_AUDITSYSCALL */ static inline bool audit_loginuid_set(struct task_struct *tsk) { return uid_valid(audit_get_loginuid(tsk)); } #endif PK ! ��O � � srcutiny.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Sleepable Read-Copy Update mechanism for mutual exclusion, * tiny variant. * * Copyright (C) IBM Corporation, 2017 * * Author: Paul McKenney <paulmck@linux.ibm.com> */ #ifndef _LINUX_SRCU_TINY_H #define _LINUX_SRCU_TINY_H #include <linux/swait.h> struct srcu_struct { short srcu_lock_nesting[2]; /* srcu_read_lock() nesting depth. */ unsigned short srcu_idx; /* Current reader array element in bit 0x2. */ unsigned short srcu_idx_max; /* Furthest future srcu_idx request. */ u8 srcu_gp_running; /* GP workqueue running? */ u8 srcu_gp_waiting; /* GP waiting for readers? */ struct swait_queue_head srcu_wq; /* Last srcu_read_unlock() wakes GP. */ struct rcu_head *srcu_cb_head; /* Pending callbacks: Head. */ struct rcu_head **srcu_cb_tail; /* Pending callbacks: Tail. */ struct work_struct srcu_work; /* For driving grace periods. */ #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ }; void srcu_drive_gp(struct work_struct *wp); #define __SRCU_STRUCT_INIT(name, __ignored) \ { \ .srcu_wq = __SWAIT_QUEUE_HEAD_INITIALIZER(name.srcu_wq), \ .srcu_cb_tail = &name.srcu_cb_head, \ .srcu_work = __WORK_INITIALIZER(name.srcu_work, srcu_drive_gp), \ __SRCU_DEP_MAP_INIT(name) \ } /* * This odd _STATIC_ arrangement is needed for API compatibility with * Tree SRCU, which needs some per-CPU data. */ #define DEFINE_SRCU(name) \ struct srcu_struct name = __SRCU_STRUCT_INIT(name, name) #define DEFINE_STATIC_SRCU(name) \ static struct srcu_struct name = __SRCU_STRUCT_INIT(name, name) void synchronize_srcu(struct srcu_struct *ssp); /* * Counts the new reader in the appropriate per-CPU element of the * srcu_struct. Can be invoked from irq/bh handlers, but the matching * __srcu_read_unlock() must be in the same handler instance. Returns an * index that must be passed to the matching srcu_read_unlock(). */ static inline int __srcu_read_lock(struct srcu_struct *ssp) { int idx; idx = ((READ_ONCE(ssp->srcu_idx) + 1) & 0x2) >> 1; WRITE_ONCE(ssp->srcu_lock_nesting[idx], READ_ONCE(ssp->srcu_lock_nesting[idx]) + 1); return idx; } static inline void synchronize_srcu_expedited(struct srcu_struct *ssp) { synchronize_srcu(ssp); } static inline void srcu_barrier(struct srcu_struct *ssp) { synchronize_srcu(ssp); } /* Defined here to avoid size increase for non-torture kernels. */ static inline void srcu_torture_stats_print(struct srcu_struct *ssp, char *tt, char *tf) { int idx; idx = ((data_race(READ_ONCE(ssp->srcu_idx)) + 1) & 0x2) >> 1; pr_alert("%s%s Tiny SRCU per-CPU(idx=%d): (%hd,%hd)\n", tt, tf, idx, data_race(READ_ONCE(ssp->srcu_lock_nesting[!idx])), data_race(READ_ONCE(ssp->srcu_lock_nesting[idx]))); } #endif PK ! s gI gI tee_drv.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015-2016, Linaro Limited */ #ifndef __TEE_DRV_H #define __TEE_DRV_H #include <linux/device.h> #include <linux/idr.h> #include <linux/kref.h> #include <linux/list.h> #include <linux/mod_devicetable.h> #include <linux/tee.h> #include <linux/types.h> #include <linux/uuid.h> /* * The file describes the API provided by the generic TEE driver to the * specific TEE driver. */ #define TEE_SHM_MAPPED BIT(0) /* Memory mapped by the kernel */ #define TEE_SHM_DMA_BUF BIT(1) /* Memory with dma-buf handle */ #define TEE_SHM_EXT_DMA_BUF BIT(2) /* Memory with dma-buf handle */ #define TEE_SHM_REGISTER BIT(3) /* Memory registered in secure world */ #define TEE_SHM_USER_MAPPED BIT(4) /* Memory mapped in user space */ #define TEE_SHM_POOL BIT(5) /* Memory allocated from pool */ #define TEE_SHM_KERNEL_MAPPED BIT(6) /* Memory mapped in kernel space */ #define TEE_SHM_PRIV BIT(7) /* Memory private to TEE driver */ struct device; struct tee_device; struct tee_shm; struct tee_shm_pool; /** * struct tee_context - driver specific context on file pointer data * @teedev: pointer to this drivers struct tee_device * @list_shm: List of shared memory object owned by this context * @data: driver specific context data, managed by the driver * @refcount: reference counter for this structure * @releasing: flag that indicates if context is being released right now. * It is needed to break circular dependency on context during * shared memory release. * @supp_nowait: flag that indicates that requests in this context should not * wait for tee-supplicant daemon to be started if not present * and just return with an error code. It is needed for requests * that arises from TEE based kernel drivers that should be * non-blocking in nature. * @cap_memref_null: flag indicating if the TEE Client support shared * memory buffer with a NULL pointer. */ struct tee_context { struct tee_device *teedev; void *data; struct kref refcount; bool releasing; bool supp_nowait; bool cap_memref_null; }; struct tee_param_memref { size_t shm_offs; size_t size; struct tee_shm *shm; }; struct tee_param_value { u64 a; u64 b; u64 c; }; struct tee_param { u64 attr; union { struct tee_param_memref memref; struct tee_param_value value; } u; }; /** * struct tee_driver_ops - driver operations vtable * @get_version: returns version of driver * @open: called when the device file is opened * @release: release this open file * @open_session: open a new session * @close_session: close a session * @invoke_func: invoke a trusted function * @cancel_req: request cancel of an ongoing invoke or open * @supp_recv: called for supplicant to get a command * @supp_send: called for supplicant to send a response * @shm_register: register shared memory buffer in TEE * @shm_unregister: unregister shared memory buffer in TEE */ struct tee_driver_ops { void (*get_version)(struct tee_device *teedev, struct tee_ioctl_version_data *vers); int (*open)(struct tee_context *ctx); void (*release)(struct tee_context *ctx); int (*open_session)(struct tee_context *ctx, struct tee_ioctl_open_session_arg *arg, struct tee_param *param); int (*close_session)(struct tee_context *ctx, u32 session); int (*invoke_func)(struct tee_context *ctx, struct tee_ioctl_invoke_arg *arg, struct tee_param *param); int (*cancel_req)(struct tee_context *ctx, u32 cancel_id, u32 session); int (*supp_recv)(struct tee_context *ctx, u32 *func, u32 *num_params, struct tee_param *param); int (*supp_send)(struct tee_context *ctx, u32 ret, u32 num_params, struct tee_param *param); int (*shm_register)(struct tee_context *ctx, struct tee_shm *shm, struct page **pages, size_t num_pages, unsigned long start); int (*shm_unregister)(struct tee_context *ctx, struct tee_shm *shm); }; /** * struct tee_desc - Describes the TEE driver to the subsystem * @name: name of driver * @ops: driver operations vtable * @owner: module providing the driver * @flags: Extra properties of driver, defined by TEE_DESC_* below */ #define TEE_DESC_PRIVILEGED 0x1 struct tee_desc { const char *name; const struct tee_driver_ops *ops; struct module *owner; u32 flags; }; /** * tee_device_alloc() - Allocate a new struct tee_device instance * @teedesc: Descriptor for this driver * @dev: Parent device for this device * @pool: Shared memory pool, NULL if not used * @driver_data: Private driver data for this device * * Allocates a new struct tee_device instance. The device is * removed by tee_device_unregister(). * * @returns a pointer to a 'struct tee_device' or an ERR_PTR on failure */ struct tee_device *tee_device_alloc(const struct tee_desc *teedesc, struct device *dev, struct tee_shm_pool *pool, void *driver_data); /** * tee_device_register() - Registers a TEE device * @teedev: Device to register * * tee_device_unregister() need to be called to remove the @teedev if * this function fails. * * @returns < 0 on failure */ int tee_device_register(struct tee_device *teedev); /** * tee_device_unregister() - Removes a TEE device * @teedev: Device to unregister * * This function should be called to remove the @teedev even if * tee_device_register() hasn't been called yet. Does nothing if * @teedev is NULL. */ void tee_device_unregister(struct tee_device *teedev); /** * tee_session_calc_client_uuid() - Calculates client UUID for session * @uuid: Resulting UUID * @connection_method: Connection method for session (TEE_IOCTL_LOGIN_*) * @connectuon_data: Connection data for opening session * * Based on connection method calculates UUIDv5 based client UUID. * * For group based logins verifies that calling process has specified * credentials. * * @return < 0 on failure */ int tee_session_calc_client_uuid(uuid_t *uuid, u32 connection_method, const u8 connection_data[TEE_IOCTL_UUID_LEN]); /** * struct tee_shm - shared memory object * @ctx: context using the object * @paddr: physical address of the shared memory * @kaddr: virtual address of the shared memory * @size: size of shared memory * @offset: offset of buffer in user space * @pages: locked pages from userspace * @num_pages: number of locked pages * @refcount: reference counter * @flags: defined by TEE_SHM_* in tee_drv.h * @id: unique id of a shared memory object on this device * * This pool is only supposed to be accessed directly from the TEE * subsystem and from drivers that implements their own shm pool manager. */ struct tee_shm { struct tee_context *ctx; phys_addr_t paddr; void *kaddr; size_t size; unsigned int offset; struct page **pages; size_t num_pages; refcount_t refcount; u32 flags; int id; }; /** * struct tee_shm_pool_mgr - shared memory manager * @ops: operations * @private_data: private data for the shared memory manager */ struct tee_shm_pool_mgr { const struct tee_shm_pool_mgr_ops *ops; void *private_data; }; /** * struct tee_shm_pool_mgr_ops - shared memory pool manager operations * @alloc: called when allocating shared memory * @free: called when freeing shared memory * @destroy_poolmgr: called when destroying the pool manager */ struct tee_shm_pool_mgr_ops { int (*alloc)(struct tee_shm_pool_mgr *poolmgr, struct tee_shm *shm, size_t size); void (*free)(struct tee_shm_pool_mgr *poolmgr, struct tee_shm *shm); void (*destroy_poolmgr)(struct tee_shm_pool_mgr *poolmgr); }; /** * tee_shm_pool_alloc() - Create a shared memory pool from shm managers * @priv_mgr: manager for driver private shared memory allocations * @dmabuf_mgr: manager for dma-buf shared memory allocations * * Allocation with the flag TEE_SHM_DMA_BUF set will use the range supplied * in @dmabuf, others will use the range provided by @priv. * * @returns pointer to a 'struct tee_shm_pool' or an ERR_PTR on failure. */ struct tee_shm_pool *tee_shm_pool_alloc(struct tee_shm_pool_mgr *priv_mgr, struct tee_shm_pool_mgr *dmabuf_mgr); /* * tee_shm_pool_mgr_alloc_res_mem() - Create a shm manager for reserved * memory * @vaddr: Virtual address of start of pool * @paddr: Physical address of start of pool * @size: Size in bytes of the pool * * @returns pointer to a 'struct tee_shm_pool_mgr' or an ERR_PTR on failure. */ struct tee_shm_pool_mgr *tee_shm_pool_mgr_alloc_res_mem(unsigned long vaddr, phys_addr_t paddr, size_t size, int min_alloc_order); /** * tee_shm_pool_mgr_destroy() - Free a shared memory manager */ static inline void tee_shm_pool_mgr_destroy(struct tee_shm_pool_mgr *poolm) { poolm->ops->destroy_poolmgr(poolm); } /** * struct tee_shm_pool_mem_info - holds information needed to create a shared * memory pool * @vaddr: Virtual address of start of pool * @paddr: Physical address of start of pool * @size: Size in bytes of the pool */ struct tee_shm_pool_mem_info { unsigned long vaddr; phys_addr_t paddr; size_t size; }; /** * tee_shm_pool_alloc_res_mem() - Create a shared memory pool from reserved * memory range * @priv_info: Information for driver private shared memory pool * @dmabuf_info: Information for dma-buf shared memory pool * * Start and end of pools will must be page aligned. * * Allocation with the flag TEE_SHM_DMA_BUF set will use the range supplied * in @dmabuf, others will use the range provided by @priv. * * @returns pointer to a 'struct tee_shm_pool' or an ERR_PTR on failure. */ struct tee_shm_pool * tee_shm_pool_alloc_res_mem(struct tee_shm_pool_mem_info *priv_info, struct tee_shm_pool_mem_info *dmabuf_info); /** * tee_shm_pool_free() - Free a shared memory pool * @pool: The shared memory pool to free * * The must be no remaining shared memory allocated from this pool when * this function is called. */ void tee_shm_pool_free(struct tee_shm_pool *pool); /** * tee_get_drvdata() - Return driver_data pointer * @returns the driver_data pointer supplied to tee_register(). */ void *tee_get_drvdata(struct tee_device *teedev); /** * tee_shm_alloc() - Allocate shared memory * @ctx: Context that allocates the shared memory * @size: Requested size of shared memory * @flags: Flags setting properties for the requested shared memory. * * Memory allocated as global shared memory is automatically freed when the * TEE file pointer is closed. The @flags field uses the bits defined by * TEE_SHM_* above. TEE_SHM_MAPPED must currently always be set. If * TEE_SHM_DMA_BUF global shared memory will be allocated and associated * with a dma-buf handle, else driver private memory. * * @returns a pointer to 'struct tee_shm' */ struct tee_shm *tee_shm_alloc(struct tee_context *ctx, size_t size, u32 flags); struct tee_shm *tee_shm_alloc_kernel_buf(struct tee_context *ctx, size_t size); /** * tee_shm_register() - Register shared memory buffer * @ctx: Context that registers the shared memory * @addr: Address is userspace of the shared buffer * @length: Length of the shared buffer * @flags: Flags setting properties for the requested shared memory. * * @returns a pointer to 'struct tee_shm' */ struct tee_shm *tee_shm_register(struct tee_context *ctx, unsigned long addr, size_t length, u32 flags); /** * tee_shm_is_registered() - Check if shared memory object in registered in TEE * @shm: Shared memory handle * @returns true if object is registered in TEE */ static inline bool tee_shm_is_registered(struct tee_shm *shm) { return shm && (shm->flags & TEE_SHM_REGISTER); } /** * tee_shm_free() - Free shared memory * @shm: Handle to shared memory to free */ void tee_shm_free(struct tee_shm *shm); /** * tee_shm_put() - Decrease reference count on a shared memory handle * @shm: Shared memory handle */ void tee_shm_put(struct tee_shm *shm); /** * tee_shm_va2pa() - Get physical address of a virtual address * @shm: Shared memory handle * @va: Virtual address to tranlsate * @pa: Returned physical address * @returns 0 on success and < 0 on failure */ int tee_shm_va2pa(struct tee_shm *shm, void *va, phys_addr_t *pa); /** * tee_shm_pa2va() - Get virtual address of a physical address * @shm: Shared memory handle * @pa: Physical address to tranlsate * @va: Returned virtual address * @returns 0 on success and < 0 on failure */ int tee_shm_pa2va(struct tee_shm *shm, phys_addr_t pa, void **va); /** * tee_shm_get_va() - Get virtual address of a shared memory plus an offset * @shm: Shared memory handle * @offs: Offset from start of this shared memory * @returns virtual address of the shared memory + offs if offs is within * the bounds of this shared memory, else an ERR_PTR */ void *tee_shm_get_va(struct tee_shm *shm, size_t offs); /** * tee_shm_get_pa() - Get physical address of a shared memory plus an offset * @shm: Shared memory handle * @offs: Offset from start of this shared memory * @pa: Physical address to return * @returns 0 if offs is within the bounds of this shared memory, else an * error code. */ int tee_shm_get_pa(struct tee_shm *shm, size_t offs, phys_addr_t *pa); /** * tee_shm_get_size() - Get size of shared memory buffer * @shm: Shared memory handle * @returns size of shared memory */ static inline size_t tee_shm_get_size(struct tee_shm *shm) { return shm->size; } /** * tee_shm_get_pages() - Get list of pages that hold shared buffer * @shm: Shared memory handle * @num_pages: Number of pages will be stored there * @returns pointer to pages array */ static inline struct page **tee_shm_get_pages(struct tee_shm *shm, size_t *num_pages) { *num_pages = shm->num_pages; return shm->pages; } /** * tee_shm_get_page_offset() - Get shared buffer offset from page start * @shm: Shared memory handle * @returns page offset of shared buffer */ static inline size_t tee_shm_get_page_offset(struct tee_shm *shm) { return shm->offset; } /** * tee_shm_get_id() - Get id of a shared memory object * @shm: Shared memory handle * @returns id */ static inline int tee_shm_get_id(struct tee_shm *shm) { return shm->id; } /** * tee_shm_get_from_id() - Find shared memory object and increase reference * count * @ctx: Context owning the shared memory * @id: Id of shared memory object * @returns a pointer to 'struct tee_shm' on success or an ERR_PTR on failure */ struct tee_shm *tee_shm_get_from_id(struct tee_context *ctx, int id); /** * tee_client_open_context() - Open a TEE context * @start: if not NULL, continue search after this context * @match: function to check TEE device * @data: data for match function * @vers: if not NULL, version data of TEE device of the context returned * * This function does an operation similar to open("/dev/teeX") in user space. * A returned context must be released with tee_client_close_context(). * * Returns a TEE context of the first TEE device matched by the match() * callback or an ERR_PTR. */ struct tee_context * tee_client_open_context(struct tee_context *start, int (*match)(struct tee_ioctl_version_data *, const void *), const void *data, struct tee_ioctl_version_data *vers); /** * tee_client_close_context() - Close a TEE context * @ctx: TEE context to close * * Note that all sessions previously opened with this context will be * closed when this function is called. */ void tee_client_close_context(struct tee_context *ctx); /** * tee_client_get_version() - Query version of TEE * @ctx: TEE context to TEE to query * @vers: Pointer to version data */ void tee_client_get_version(struct tee_context *ctx, struct tee_ioctl_version_data *vers); /** * tee_client_open_session() - Open a session to a Trusted Application * @ctx: TEE context * @arg: Open session arguments, see description of * struct tee_ioctl_open_session_arg * @param: Parameters passed to the Trusted Application * * Returns < 0 on error else see @arg->ret for result. If @arg->ret * is TEEC_SUCCESS the session identifier is available in @arg->session. */ int tee_client_open_session(struct tee_context *ctx, struct tee_ioctl_open_session_arg *arg, struct tee_param *param); /** * tee_client_close_session() - Close a session to a Trusted Application * @ctx: TEE Context * @session: Session id * * Return < 0 on error else 0, regardless the session will not be * valid after this function has returned. */ int tee_client_close_session(struct tee_context *ctx, u32 session); /** * tee_client_invoke_func() - Invoke a function in a Trusted Application * @ctx: TEE Context * @arg: Invoke arguments, see description of * struct tee_ioctl_invoke_arg * @param: Parameters passed to the Trusted Application * * Returns < 0 on error else see @arg->ret for result. */ int tee_client_invoke_func(struct tee_context *ctx, struct tee_ioctl_invoke_arg *arg, struct tee_param *param); /** * tee_client_cancel_req() - Request cancellation of the previous open-session * or invoke-command operations in a Trusted Application * @ctx: TEE Context * @arg: Cancellation arguments, see description of * struct tee_ioctl_cancel_arg * * Returns < 0 on error else 0 if the cancellation was successfully requested. */ int tee_client_cancel_req(struct tee_context *ctx, struct tee_ioctl_cancel_arg *arg); static inline bool tee_param_is_memref(struct tee_param *param) { switch (param->attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) { case TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT: case TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT: case TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT: return true; default: return false; } } extern struct bus_type tee_bus_type; /** * struct tee_client_device - tee based device * @id: device identifier * @dev: device structure */ struct tee_client_device { struct tee_client_device_id id; struct device dev; }; #define to_tee_client_device(d) container_of(d, struct tee_client_device, dev) /** * struct tee_client_driver - tee client driver * @id_table: device id table supported by this driver * @driver: driver structure */ struct tee_client_driver { const struct tee_client_device_id *id_table; struct device_driver driver; }; #define to_tee_client_driver(d) \ container_of(d, struct tee_client_driver, driver) /** * teedev_open() - Open a struct tee_device * @teedev: Device to open * * @return a pointer to struct tee_context on success or an ERR_PTR on failure. */ struct tee_context *teedev_open(struct tee_device *teedev); /** * teedev_close_context() - closes a struct tee_context * @ctx: The struct tee_context to close */ void teedev_close_context(struct tee_context *ctx); #endif /*__TEE_DRV_H*/ PK ! 7���� � input/as5011.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _AS5011_H #define _AS5011_H /* * Copyright (c) 2010, 2011 Fabien Marteau <fabien.marteau@armadeus.com> */ struct as5011_platform_data { unsigned int button_gpio; unsigned int axis_irq; /* irq number */ unsigned long axis_irqflags; char xp, xn; /* threshold for x axis */ char yp, yn; /* threshold for y axis */ }; #endif /* _AS5011_H */ PK ! 'l � input/mt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _INPUT_MT_H #define _INPUT_MT_H /* * Input Multitouch Library * * Copyright (c) 2010 Henrik Rydberg */ #include <linux/input.h> #define TRKID_MAX 0xffff #define INPUT_MT_POINTER 0x0001 /* pointer device, e.g. trackpad */ #define INPUT_MT_DIRECT 0x0002 /* direct device, e.g. touchscreen */ #define INPUT_MT_DROP_UNUSED 0x0004 /* drop contacts not seen in frame */ #define INPUT_MT_TRACK 0x0008 /* use in-kernel tracking */ #define INPUT_MT_SEMI_MT 0x0010 /* semi-mt device, finger count handled manually */ /** * struct input_mt_slot - represents the state of an input MT slot * @abs: holds current values of ABS_MT axes for this slot * @frame: last frame at which input_mt_report_slot_state() was called * @key: optional driver designation of this slot */ struct input_mt_slot { int abs[ABS_MT_LAST - ABS_MT_FIRST + 1]; unsigned int frame; unsigned int key; }; /** * struct input_mt - state of tracked contacts * @trkid: stores MT tracking ID for the next contact * @num_slots: number of MT slots the device uses * @slot: MT slot currently being transmitted * @flags: input_mt operation flags * @frame: increases every time input_mt_sync_frame() is called * @red: reduced cost matrix for in-kernel tracking * @slots: array of slots holding current values of tracked contacts */ struct input_mt { int trkid; int num_slots; int slot; unsigned int flags; unsigned int frame; int *red; struct input_mt_slot slots[]; }; static inline void input_mt_set_value(struct input_mt_slot *slot, unsigned code, int value) { slot->abs[code - ABS_MT_FIRST] = value; } static inline int input_mt_get_value(const struct input_mt_slot *slot, unsigned code) { return slot->abs[code - ABS_MT_FIRST]; } static inline bool input_mt_is_active(const struct input_mt_slot *slot) { return input_mt_get_value(slot, ABS_MT_TRACKING_ID) >= 0; } static inline bool input_mt_is_used(const struct input_mt *mt, const struct input_mt_slot *slot) { return slot->frame == mt->frame; } int input_mt_init_slots(struct input_dev *dev, unsigned int num_slots, unsigned int flags); void input_mt_destroy_slots(struct input_dev *dev); static inline int input_mt_new_trkid(struct input_mt *mt) { return mt->trkid++ & TRKID_MAX; } static inline void input_mt_slot(struct input_dev *dev, int slot) { input_event(dev, EV_ABS, ABS_MT_SLOT, slot); } static inline bool input_is_mt_value(int axis) { return axis >= ABS_MT_FIRST && axis <= ABS_MT_LAST; } static inline bool input_is_mt_axis(int axis) { return axis == ABS_MT_SLOT || input_is_mt_value(axis); } bool input_mt_report_slot_state(struct input_dev *dev, unsigned int tool_type, bool active); static inline void input_mt_report_slot_inactive(struct input_dev *dev) { input_mt_report_slot_state(dev, 0, false); } void input_mt_report_finger_count(struct input_dev *dev, int count); void input_mt_report_pointer_emulation(struct input_dev *dev, bool use_count); void input_mt_drop_unused(struct input_dev *dev); void input_mt_sync_frame(struct input_dev *dev); /** * struct input_mt_pos - contact position * @x: horizontal coordinate * @y: vertical coordinate */ struct input_mt_pos { s16 x, y; }; int input_mt_assign_slots(struct input_dev *dev, int *slots, const struct input_mt_pos *pos, int num_pos, int dmax); int input_mt_get_slot_by_key(struct input_dev *dev, int key); #endif PK ! vٸ input/cma3000.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * VTI CMA3000_Dxx Accelerometer driver * * Copyright (C) 2010 Texas Instruments * Author: Hemanth V <hemanthv@ti.com> */ #ifndef _LINUX_CMA3000_H #define _LINUX_CMA3000_H #define CMAMODE_DEFAULT 0 #define CMAMODE_MEAS100 1 #define CMAMODE_MEAS400 2 #define CMAMODE_MEAS40 3 #define CMAMODE_MOTDET 4 #define CMAMODE_FF100 5 #define CMAMODE_FF400 6 #define CMAMODE_POFF 7 #define CMARANGE_2G 2000 #define CMARANGE_8G 8000 /** * struct cma3000_i2c_platform_data - CMA3000 Platform data * @fuzz_x: Noise on X Axis * @fuzz_y: Noise on Y Axis * @fuzz_z: Noise on Z Axis * @g_range: G range in milli g i.e 2000 or 8000 * @mode: Operating mode * @mdthr: Motion detect threshold value * @mdfftmr: Motion detect and free fall time value * @ffthr: Free fall threshold value */ struct cma3000_platform_data { int fuzz_x; int fuzz_y; int fuzz_z; int g_range; uint8_t mode; uint8_t mdthr; uint8_t mdfftmr; uint8_t ffthr; unsigned long irqflags; }; #endif PK ! q� input/tps6507x-ts.hnu �[��� /* linux/i2c/tps6507x-ts.h * * Functions to access TPS65070 touch screen chip. * * Copyright (c) 2009 RidgeRun (todd.fischer@ridgerun.com) * * * For licencing details see kernel-base/COPYING */ #ifndef __LINUX_I2C_TPS6507X_TS_H #define __LINUX_I2C_TPS6507X_TS_H /* Board specific touch screen initial values */ struct touchscreen_init_data { int poll_period; /* ms */ __u16 min_pressure; /* min reading to be treated as a touch */ __u16 vendor; __u16 product; __u16 version; }; #endif /* __LINUX_I2C_TPS6507X_TS_H */ PK ! (�� � input/touchscreen.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2014 Sebastian Reichel <sre@kernel.org> */ #ifndef _TOUCHSCREEN_H #define _TOUCHSCREEN_H struct input_dev; struct input_mt_pos; struct touchscreen_properties { unsigned int max_x; unsigned int max_y; bool invert_x; bool invert_y; bool swap_x_y; }; void touchscreen_parse_properties(struct input_dev *input, bool multitouch, struct touchscreen_properties *prop); void touchscreen_set_mt_pos(struct input_mt_pos *pos, const struct touchscreen_properties *prop, unsigned int x, unsigned int y); void touchscreen_report_pos(struct input_dev *input, const struct touchscreen_properties *prop, unsigned int x, unsigned int y, bool multitouch); #endif PK ! PM�� � input/kxtj9.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2011 Kionix, Inc. * Written by Chris Hudson <chudson@kionix.com> */ #ifndef __KXTJ9_H__ #define __KXTJ9_H__ #define KXTJ9_I2C_ADDR 0x0F struct kxtj9_platform_data { unsigned int min_interval; /* minimum poll interval (in milli-seconds) */ unsigned int init_interval; /* initial poll interval (in milli-seconds) */ /* * By default, x is axis 0, y is axis 1, z is axis 2; these can be * changed to account for sensor orientation within the host device. */ u8 axis_map_x; u8 axis_map_y; u8 axis_map_z; /* * Each axis can be negated to account for sensor orientation within * the host device. */ bool negate_x; bool negate_y; bool negate_z; /* CTRL_REG1: set resolution, g-range, data ready enable */ /* Output resolution: 8-bit valid or 12-bit valid */ #define RES_8BIT 0 #define RES_12BIT (1 << 6) u8 res_12bit; /* Output g-range: +/-2g, 4g, or 8g */ #define KXTJ9_G_2G 0 #define KXTJ9_G_4G (1 << 3) #define KXTJ9_G_8G (1 << 4) u8 g_range; int (*init)(void); void (*exit)(void); int (*power_on)(void); int (*power_off)(void); }; #endif /* __KXTJ9_H__ */ PK ! #��z� � input/navpoint.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012 Paul Parsons <lost.distance@yahoo.com> */ struct navpoint_platform_data { int port; /* PXA SSP port for pxa_ssp_request() */ int gpio; /* GPIO for power on/off */ }; PK ! `A�6� � input/sparse-keymap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _SPARSE_KEYMAP_H #define _SPARSE_KEYMAP_H /* * Copyright (c) 2009 Dmitry Torokhov */ #define KE_END 0 /* Indicates end of keymap */ #define KE_KEY 1 /* Ordinary key/button */ #define KE_SW 2 /* Switch (predetermined value) */ #define KE_VSW 3 /* Switch (value supplied at runtime) */ #define KE_IGNORE 4 /* Known entry that should be ignored */ #define KE_LAST KE_IGNORE /** * struct key_entry - keymap entry for use in sparse keymap * @type: Type of the key entry (KE_KEY, KE_SW, KE_VSW, KE_END); * drivers are allowed to extend the list with their own * private definitions. * @code: Device-specific data identifying the button/switch * @keycode: KEY_* code assigned to a key/button * @sw: struct with code/value used by KE_SW and KE_VSW * @sw.code: SW_* code assigned to a switch * @sw.value: Value that should be sent in an input even when KE_SW * switch is toggled. KE_VSW switches ignore this field and * expect driver to supply value for the event. * * This structure defines an entry in a sparse keymap used by some * input devices for which traditional table-based approach is not * suitable. */ struct key_entry { int type; /* See KE_* above */ u32 code; union { u16 keycode; /* For KE_KEY */ struct { /* For KE_SW, KE_VSW */ u8 code; u8 value; /* For KE_SW, ignored by KE_VSW */ } sw; }; }; struct key_entry *sparse_keymap_entry_from_scancode(struct input_dev *dev, unsigned int code); struct key_entry *sparse_keymap_entry_from_keycode(struct input_dev *dev, unsigned int code); int sparse_keymap_setup(struct input_dev *dev, const struct key_entry *keymap, int (*setup)(struct input_dev *, struct key_entry *)); void sparse_keymap_report_entry(struct input_dev *dev, const struct key_entry *ke, unsigned int value, bool autorelease); bool sparse_keymap_report_event(struct input_dev *dev, unsigned int code, unsigned int value, bool autorelease); #endif /* _SPARSE_KEYMAP_H */ PK ! /�R input/elan-i2c-ids.hnu �[��� /* * Elan I2C/SMBus Touchpad device whitelist * * Copyright (c) 2013 ELAN Microelectronics Corp. * * Author: æ維 (Duson Lin) <dusonlin@emc.com.tw> * Author: KT Liao <kt.liao@emc.com.tw> * Version: 1.6.3 * * Based on cyapa driver: * copyright (c) 2011-2012 Cypress Semiconductor, Inc. * copyright (c) 2011-2012 Google, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. * * Trademarks are the property of their respective owners. */ #ifndef __ELAN_I2C_IDS_H #define __ELAN_I2C_IDS_H #include <linux/mod_devicetable.h> static const struct acpi_device_id elan_acpi_id[] = { { "ELAN0000", 0 }, { "ELAN0100", 0 }, { "ELAN0600", 0 }, { "ELAN0601", 0 }, { "ELAN0602", 0 }, { "ELAN0603", 0 }, { "ELAN0604", 0 }, { "ELAN0605", 0 }, { "ELAN0606", 0 }, { "ELAN0607", 0 }, { "ELAN0608", 0 }, { "ELAN0609", 0 }, { "ELAN060B", 0 }, { "ELAN060C", 0 }, { "ELAN060F", 0 }, { "ELAN0610", 0 }, { "ELAN0611", 0 }, { "ELAN0612", 0 }, { "ELAN0615", 0 }, { "ELAN0616", 0 }, { "ELAN0617", 0 }, { "ELAN0618", 0 }, { "ELAN0619", 0 }, { "ELAN061A", 0 }, /* { "ELAN061B", 0 }, not working on the Lenovo Legion Y7000 */ { "ELAN061C", 0 }, { "ELAN061D", 0 }, { "ELAN061E", 0 }, { "ELAN061F", 0 }, { "ELAN0620", 0 }, { "ELAN0621", 0 }, { "ELAN0622", 0 }, { "ELAN0623", 0 }, { "ELAN0624", 0 }, { "ELAN0625", 0 }, { "ELAN0626", 0 }, { "ELAN0627", 0 }, { "ELAN0628", 0 }, { "ELAN0629", 0 }, { "ELAN062A", 0 }, { "ELAN062B", 0 }, { "ELAN062C", 0 }, { "ELAN062D", 0 }, { "ELAN062E", 0 }, /* Lenovo V340 Whiskey Lake U */ { "ELAN062F", 0 }, /* Lenovo V340 Comet Lake U */ { "ELAN0631", 0 }, { "ELAN0632", 0 }, { "ELAN0633", 0 }, /* Lenovo S145 */ { "ELAN0634", 0 }, /* Lenovo V340 Ice lake */ { "ELAN0635", 0 }, /* Lenovo V1415-IIL */ { "ELAN0636", 0 }, /* Lenovo V1415-Dali */ { "ELAN0637", 0 }, /* Lenovo V1415-IGLR */ { "ELAN1000", 0 }, { } }; #endif /* __ELAN_I2C_IDS_H */ PK ! �}�� � input/matrix_keypad.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _MATRIX_KEYPAD_H #define _MATRIX_KEYPAD_H #include <linux/types.h> #include <linux/input.h> #include <linux/of.h> #define MATRIX_MAX_ROWS 32 #define MATRIX_MAX_COLS 32 #define KEY(row, col, val) ((((row) & (MATRIX_MAX_ROWS - 1)) << 24) |\ (((col) & (MATRIX_MAX_COLS - 1)) << 16) |\ ((val) & 0xffff)) #define KEY_ROW(k) (((k) >> 24) & 0xff) #define KEY_COL(k) (((k) >> 16) & 0xff) #define KEY_VAL(k) ((k) & 0xffff) #define MATRIX_SCAN_CODE(row, col, row_shift) (((row) << (row_shift)) + (col)) /** * struct matrix_keymap_data - keymap for matrix keyboards * @keymap: pointer to array of uint32 values encoded with KEY() macro * representing keymap * @keymap_size: number of entries (initialized) in this keymap * * This structure is supposed to be used by platform code to supply * keymaps to drivers that implement matrix-like keypads/keyboards. */ struct matrix_keymap_data { const uint32_t *keymap; unsigned int keymap_size; }; /** * struct matrix_keypad_platform_data - platform-dependent keypad data * @keymap_data: pointer to &matrix_keymap_data * @row_gpios: pointer to array of gpio numbers representing rows * @col_gpios: pointer to array of gpio numbers reporesenting colums * @num_row_gpios: actual number of row gpios used by device * @num_col_gpios: actual number of col gpios used by device * @col_scan_delay_us: delay, measured in microseconds, that is * needed before we can keypad after activating column gpio * @debounce_ms: debounce interval in milliseconds * @clustered_irq: may be specified if interrupts of all row/column GPIOs * are bundled to one single irq * @clustered_irq_flags: flags that are needed for the clustered irq * @active_low: gpio polarity * @wakeup: controls whether the device should be set up as wakeup * source * @no_autorepeat: disable key autorepeat * @drive_inactive_cols: drive inactive columns during scan, rather than * making them inputs. * * This structure represents platform-specific data that use used by * matrix_keypad driver to perform proper initialization. */ struct matrix_keypad_platform_data { const struct matrix_keymap_data *keymap_data; const unsigned int *row_gpios; const unsigned int *col_gpios; unsigned int num_row_gpios; unsigned int num_col_gpios; unsigned int col_scan_delay_us; /* key debounce interval in milli-second */ unsigned int debounce_ms; unsigned int clustered_irq; unsigned int clustered_irq_flags; bool active_low; bool wakeup; bool no_autorepeat; bool drive_inactive_cols; }; int matrix_keypad_build_keymap(const struct matrix_keymap_data *keymap_data, const char *keymap_name, unsigned int rows, unsigned int cols, unsigned short *keymap, struct input_dev *input_dev); int matrix_keypad_parse_properties(struct device *dev, unsigned int *rows, unsigned int *cols); #define matrix_keypad_parse_of_params matrix_keypad_parse_properties #endif /* _MATRIX_KEYPAD_H */ PK ! ,y$�Z Z input/samsung-keypad.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Samsung Keypad platform data definitions * * Copyright (C) 2010 Samsung Electronics Co.Ltd * Author: Joonyoung Shim <jy0922.shim@samsung.com> */ #ifndef __SAMSUNG_KEYPAD_H #define __SAMSUNG_KEYPAD_H #include <linux/input/matrix_keypad.h> #define SAMSUNG_MAX_ROWS 8 #define SAMSUNG_MAX_COLS 8 /** * struct samsung_keypad_platdata - Platform device data for Samsung Keypad. * @keymap_data: pointer to &matrix_keymap_data. * @rows: number of keypad row supported. * @cols: number of keypad col supported. * @no_autorepeat: disable key autorepeat. * @wakeup: controls whether the device should be set up as wakeup source. * @cfg_gpio: configure the GPIO. * * Initialisation data specific to either the machine or the platform * for the device driver to use or call-back when configuring gpio. */ struct samsung_keypad_platdata { const struct matrix_keymap_data *keymap_data; unsigned int rows; unsigned int cols; bool no_autorepeat; bool wakeup; void (*cfg_gpio)(unsigned int rows, unsigned int cols); }; #endif /* __SAMSUNG_KEYPAD_H */ PK ! �ߡ:� � input/cy8ctmg110_pdata.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CY8CTMG110_PDATA_H #define _LINUX_CY8CTMG110_PDATA_H struct cy8ctmg110_pdata { int reset_pin; /* Reset pin is wired to this GPIO (optional) */ }; #endif PK ! h�$<- <- input/adxl34x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/input/adxl34x.h * * Digital Accelerometer characteristics are highly application specific * and may vary between boards and models. The platform_data for the * device's "struct device" holds this information. * * Copyright 2009 Analog Devices Inc. */ #ifndef __LINUX_INPUT_ADXL34X_H__ #define __LINUX_INPUT_ADXL34X_H__ #include <linux/input.h> struct adxl34x_platform_data { /* * X,Y,Z Axis Offset: * offer user offset adjustments in twoscompliment * form with a scale factor of 15.6 mg/LSB (i.e. 0x7F = +2 g) */ s8 x_axis_offset; s8 y_axis_offset; s8 z_axis_offset; /* * TAP_X/Y/Z Enable: Setting TAP_X, Y, or Z Enable enables X, * Y, or Z participation in Tap detection. A '0' excludes the * selected axis from participation in Tap detection. * Setting the SUPPRESS bit suppresses Double Tap detection if * acceleration greater than tap_threshold is present during the * tap_latency period, i.e. after the first tap but before the * opening of the second tap window. */ #define ADXL_SUPPRESS (1 << 3) #define ADXL_TAP_X_EN (1 << 2) #define ADXL_TAP_Y_EN (1 << 1) #define ADXL_TAP_Z_EN (1 << 0) u8 tap_axis_control; /* * tap_threshold: * holds the threshold value for tap detection/interrupts. * The data format is unsigned. The scale factor is 62.5 mg/LSB * (i.e. 0xFF = +16 g). A zero value may result in undesirable * behavior if Tap/Double Tap is enabled. */ u8 tap_threshold; /* * tap_duration: * is an unsigned time value representing the maximum * time that an event must be above the tap_threshold threshold * to qualify as a tap event. The scale factor is 625 us/LSB. A zero * value will prevent Tap/Double Tap functions from working. */ u8 tap_duration; /* * tap_latency: * is an unsigned time value representing the wait time * from the detection of a tap event to the opening of the time * window tap_window for a possible second tap event. The scale * factor is 1.25 ms/LSB. A zero value will disable the Double Tap * function. */ u8 tap_latency; /* * tap_window: * is an unsigned time value representing the amount * of time after the expiration of tap_latency during which a second * tap can begin. The scale factor is 1.25 ms/LSB. A zero value will * disable the Double Tap function. */ u8 tap_window; /* * act_axis_control: * X/Y/Z Enable: A '1' enables X, Y, or Z participation in activity * or inactivity detection. A '0' excludes the selected axis from * participation. If all of the axes are excluded, the function is * disabled. * AC/DC: A '0' = DC coupled operation and a '1' = AC coupled * operation. In DC coupled operation, the current acceleration is * compared with activity_threshold and inactivity_threshold directly * to determine whether activity or inactivity is detected. In AC * coupled operation for activity detection, the acceleration value * at the start of activity detection is taken as a reference value. * New samples of acceleration are then compared to this * reference value and if the magnitude of the difference exceeds * activity_threshold the device will trigger an activity interrupt. In * AC coupled operation for inactivity detection, a reference value * is used again for comparison and is updated whenever the * device exceeds the inactivity threshold. Once the reference * value is selected, the device compares the magnitude of the * difference between the reference value and the current * acceleration with inactivity_threshold. If the difference is below * inactivity_threshold for a total of inactivity_time, the device is * considered inactive and the inactivity interrupt is triggered. */ #define ADXL_ACT_ACDC (1 << 7) #define ADXL_ACT_X_EN (1 << 6) #define ADXL_ACT_Y_EN (1 << 5) #define ADXL_ACT_Z_EN (1 << 4) #define ADXL_INACT_ACDC (1 << 3) #define ADXL_INACT_X_EN (1 << 2) #define ADXL_INACT_Y_EN (1 << 1) #define ADXL_INACT_Z_EN (1 << 0) u8 act_axis_control; /* * activity_threshold: * holds the threshold value for activity detection. * The data format is unsigned. The scale factor is * 62.5 mg/LSB. A zero value may result in undesirable behavior if * Activity interrupt is enabled. */ u8 activity_threshold; /* * inactivity_threshold: * holds the threshold value for inactivity * detection. The data format is unsigned. The scale * factor is 62.5 mg/LSB. A zero value may result in undesirable * behavior if Inactivity interrupt is enabled. */ u8 inactivity_threshold; /* * inactivity_time: * is an unsigned time value representing the * amount of time that acceleration must be below the value in * inactivity_threshold for inactivity to be declared. The scale factor * is 1 second/LSB. Unlike the other interrupt functions, which * operate on unfiltered data, the inactivity function operates on the * filtered output data. At least one output sample must be * generated for the inactivity interrupt to be triggered. This will * result in the function appearing un-responsive if the * inactivity_time register is set with a value less than the time * constant of the Output Data Rate. A zero value will result in an * interrupt when the output data is below inactivity_threshold. */ u8 inactivity_time; /* * free_fall_threshold: * holds the threshold value for Free-Fall detection. * The data format is unsigned. The root-sum-square(RSS) value * of all axes is calculated and compared to the value in * free_fall_threshold to determine if a free fall event may be * occurring. The scale factor is 62.5 mg/LSB. A zero value may * result in undesirable behavior if Free-Fall interrupt is * enabled. Values between 300 and 600 mg (0x05 to 0x09) are * recommended. */ u8 free_fall_threshold; /* * free_fall_time: * is an unsigned time value representing the minimum * time that the RSS value of all axes must be less than * free_fall_threshold to generate a Free-Fall interrupt. The * scale factor is 5 ms/LSB. A zero value may result in * undesirable behavior if Free-Fall interrupt is enabled. * Values between 100 to 350 ms (0x14 to 0x46) are recommended. */ u8 free_fall_time; /* * data_rate: * Selects device bandwidth and output data rate. * RATE = 3200 Hz / (2^(15 - x)). Default value is 0x0A, or 100 Hz * Output Data Rate. An Output Data Rate should be selected that * is appropriate for the communication protocol and frequency * selected. Selecting too high of an Output Data Rate with a low * communication speed will result in samples being discarded. */ u8 data_rate; /* * data_range: * FULL_RES: When this bit is set with the device is * in Full-Resolution Mode, where the output resolution increases * with RANGE to maintain a 4 mg/LSB scale factor. When this * bit is cleared the device is in 10-bit Mode and RANGE determine the * maximum g-Range and scale factor. */ #define ADXL_FULL_RES (1 << 3) #define ADXL_RANGE_PM_2g 0 #define ADXL_RANGE_PM_4g 1 #define ADXL_RANGE_PM_8g 2 #define ADXL_RANGE_PM_16g 3 u8 data_range; /* * low_power_mode: * A '0' = Normal operation and a '1' = Reduced * power operation with somewhat higher noise. */ u8 low_power_mode; /* * power_mode: * LINK: A '1' with both the activity and inactivity functions * enabled will delay the start of the activity function until * inactivity is detected. Once activity is detected, inactivity * detection will begin and prevent the detection of activity. This * bit serially links the activity and inactivity functions. When '0' * the inactivity and activity functions are concurrent. Additional * information can be found in the ADXL34x datasheet's Application * section under Link Mode. * AUTO_SLEEP: A '1' sets the ADXL34x to switch to Sleep Mode * when inactivity (acceleration has been below inactivity_threshold * for at least inactivity_time) is detected and the LINK bit is set. * A '0' disables automatic switching to Sleep Mode. See the * Sleep Bit section of the ADXL34x datasheet for more information. */ #define ADXL_LINK (1 << 5) #define ADXL_AUTO_SLEEP (1 << 4) u8 power_mode; /* * fifo_mode: * BYPASS The FIFO is bypassed * FIFO FIFO collects up to 32 values then stops collecting data * STREAM FIFO holds the last 32 data values. Once full, the FIFO's * oldest data is lost as it is replaced with newer data * * DEFAULT should be ADXL_FIFO_STREAM */ #define ADXL_FIFO_BYPASS 0 #define ADXL_FIFO_FIFO 1 #define ADXL_FIFO_STREAM 2 u8 fifo_mode; /* * watermark: * The Watermark feature can be used to reduce the interrupt load * of the system. The FIFO fills up to the value stored in watermark * [1..32] and then generates an interrupt. * A '0' disables the watermark feature. */ u8 watermark; /* * When acceleration measurements are received from the ADXL34x * events are sent to the event subsystem. The following settings * select the event type and event code for new x, y and z axis data * respectively. */ u32 ev_type; /* EV_ABS or EV_REL */ u32 ev_code_x; /* ABS_X,Y,Z or REL_X,Y,Z */ u32 ev_code_y; /* ABS_X,Y,Z or REL_X,Y,Z */ u32 ev_code_z; /* ABS_X,Y,Z or REL_X,Y,Z */ /* * A valid BTN or KEY Code; use tap_axis_control to disable * event reporting */ u32 ev_code_tap[3]; /* EV_KEY {X-Axis, Y-Axis, Z-Axis} */ /* * A valid BTN or KEY Code for Free-Fall or Activity enables * input event reporting. A '0' disables the Free-Fall or * Activity reporting. */ u32 ev_code_ff; /* EV_KEY */ u32 ev_code_act_inactivity; /* EV_KEY */ /* * Use ADXL34x INT2 pin instead of INT1 pin for interrupt output */ u8 use_int2; /* * ADXL346 only ORIENTATION SENSING feature * The orientation function of the ADXL346 reports both 2-D and * 3-D orientation concurrently. */ #define ADXL_EN_ORIENTATION_2D 1 #define ADXL_EN_ORIENTATION_3D 2 #define ADXL_EN_ORIENTATION_2D_3D 3 u8 orientation_enable; /* * The width of the deadzone region between two or more * orientation positions is determined by setting the Deadzone * value. The deadzone region size can be specified with a * resolution of 3.6deg. The deadzone angle represents the total * angle where the orientation is considered invalid. */ #define ADXL_DEADZONE_ANGLE_0p0 0 /* !!!0.0 [deg] */ #define ADXL_DEADZONE_ANGLE_3p6 1 /* 3.6 [deg] */ #define ADXL_DEADZONE_ANGLE_7p2 2 /* 7.2 [deg] */ #define ADXL_DEADZONE_ANGLE_10p8 3 /* 10.8 [deg] */ #define ADXL_DEADZONE_ANGLE_14p4 4 /* 14.4 [deg] */ #define ADXL_DEADZONE_ANGLE_18p0 5 /* 18.0 [deg] */ #define ADXL_DEADZONE_ANGLE_21p6 6 /* 21.6 [deg] */ #define ADXL_DEADZONE_ANGLE_25p2 7 /* 25.2 [deg] */ u8 deadzone_angle; /* * To eliminate most human motion such as walking or shaking, * a Divisor value should be selected to effectively limit the * orientation bandwidth. Set the depth of the filter used to * low-pass filter the measured acceleration for stable * orientation sensing */ #define ADXL_LP_FILTER_DIVISOR_2 0 #define ADXL_LP_FILTER_DIVISOR_4 1 #define ADXL_LP_FILTER_DIVISOR_8 2 #define ADXL_LP_FILTER_DIVISOR_16 3 #define ADXL_LP_FILTER_DIVISOR_32 4 #define ADXL_LP_FILTER_DIVISOR_64 5 #define ADXL_LP_FILTER_DIVISOR_128 6 #define ADXL_LP_FILTER_DIVISOR_256 7 u8 divisor_length; u32 ev_codes_orient_2d[4]; /* EV_KEY {+X, -X, +Y, -Y} */ u32 ev_codes_orient_3d[6]; /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */ }; #endif PK ! �epk� � input/adp5589.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Analog Devices ADP5589/ADP5585 I/O Expander and QWERTY Keypad Controller * * Copyright 2010-2011 Analog Devices Inc. */ #ifndef _ADP5589_H #define _ADP5589_H /* * ADP5589 specific GPI and Keymap defines */ #define ADP5589_KEYMAPSIZE 88 #define ADP5589_GPI_PIN_ROW0 97 #define ADP5589_GPI_PIN_ROW1 98 #define ADP5589_GPI_PIN_ROW2 99 #define ADP5589_GPI_PIN_ROW3 100 #define ADP5589_GPI_PIN_ROW4 101 #define ADP5589_GPI_PIN_ROW5 102 #define ADP5589_GPI_PIN_ROW6 103 #define ADP5589_GPI_PIN_ROW7 104 #define ADP5589_GPI_PIN_COL0 105 #define ADP5589_GPI_PIN_COL1 106 #define ADP5589_GPI_PIN_COL2 107 #define ADP5589_GPI_PIN_COL3 108 #define ADP5589_GPI_PIN_COL4 109 #define ADP5589_GPI_PIN_COL5 110 #define ADP5589_GPI_PIN_COL6 111 #define ADP5589_GPI_PIN_COL7 112 #define ADP5589_GPI_PIN_COL8 113 #define ADP5589_GPI_PIN_COL9 114 #define ADP5589_GPI_PIN_COL10 115 #define GPI_LOGIC1 116 #define GPI_LOGIC2 117 #define ADP5589_GPI_PIN_ROW_BASE ADP5589_GPI_PIN_ROW0 #define ADP5589_GPI_PIN_ROW_END ADP5589_GPI_PIN_ROW7 #define ADP5589_GPI_PIN_COL_BASE ADP5589_GPI_PIN_COL0 #define ADP5589_GPI_PIN_COL_END ADP5589_GPI_PIN_COL10 #define ADP5589_GPI_PIN_BASE ADP5589_GPI_PIN_ROW_BASE #define ADP5589_GPI_PIN_END ADP5589_GPI_PIN_COL_END #define ADP5589_GPIMAPSIZE_MAX (ADP5589_GPI_PIN_END - ADP5589_GPI_PIN_BASE + 1) /* * ADP5585 specific GPI and Keymap defines */ #define ADP5585_KEYMAPSIZE 30 #define ADP5585_GPI_PIN_ROW0 37 #define ADP5585_GPI_PIN_ROW1 38 #define ADP5585_GPI_PIN_ROW2 39 #define ADP5585_GPI_PIN_ROW3 40 #define ADP5585_GPI_PIN_ROW4 41 #define ADP5585_GPI_PIN_ROW5 42 #define ADP5585_GPI_PIN_COL0 43 #define ADP5585_GPI_PIN_COL1 44 #define ADP5585_GPI_PIN_COL2 45 #define ADP5585_GPI_PIN_COL3 46 #define ADP5585_GPI_PIN_COL4 47 #define GPI_LOGIC 48 #define ADP5585_GPI_PIN_ROW_BASE ADP5585_GPI_PIN_ROW0 #define ADP5585_GPI_PIN_ROW_END ADP5585_GPI_PIN_ROW5 #define ADP5585_GPI_PIN_COL_BASE ADP5585_GPI_PIN_COL0 #define ADP5585_GPI_PIN_COL_END ADP5585_GPI_PIN_COL4 #define ADP5585_GPI_PIN_BASE ADP5585_GPI_PIN_ROW_BASE #define ADP5585_GPI_PIN_END ADP5585_GPI_PIN_COL_END #define ADP5585_GPIMAPSIZE_MAX (ADP5585_GPI_PIN_END - ADP5585_GPI_PIN_BASE + 1) struct adp5589_gpi_map { unsigned short pin; unsigned short sw_evt; }; /* scan_cycle_time */ #define ADP5589_SCAN_CYCLE_10ms 0 #define ADP5589_SCAN_CYCLE_20ms 1 #define ADP5589_SCAN_CYCLE_30ms 2 #define ADP5589_SCAN_CYCLE_40ms 3 /* RESET_CFG */ #define RESET_PULSE_WIDTH_500us 0 #define RESET_PULSE_WIDTH_1ms 1 #define RESET_PULSE_WIDTH_2ms 2 #define RESET_PULSE_WIDTH_10ms 3 #define RESET_TRIG_TIME_0ms (0 << 2) #define RESET_TRIG_TIME_1000ms (1 << 2) #define RESET_TRIG_TIME_1500ms (2 << 2) #define RESET_TRIG_TIME_2000ms (3 << 2) #define RESET_TRIG_TIME_2500ms (4 << 2) #define RESET_TRIG_TIME_3000ms (5 << 2) #define RESET_TRIG_TIME_3500ms (6 << 2) #define RESET_TRIG_TIME_4000ms (7 << 2) #define RESET_PASSTHRU_EN (1 << 5) #define RESET1_POL_HIGH (1 << 6) #define RESET1_POL_LOW (0 << 6) #define RESET2_POL_HIGH (1 << 7) #define RESET2_POL_LOW (0 << 7) /* ADP5589 Mask Bits: * C C C C C C C C C C C | R R R R R R R R * 1 9 8 7 6 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0 * 0 * ---------------- BIT ------------------ * 1 1 1 1 1 1 1 1 1 0 0 | 0 0 0 0 0 0 0 0 * 8 7 6 5 4 3 2 1 0 9 8 | 7 6 5 4 3 2 1 0 */ #define ADP_ROW(x) (1 << (x)) #define ADP_COL(x) (1 << (x + 8)) #define ADP5589_ROW_MASK 0xFF #define ADP5589_COL_MASK 0xFF #define ADP5589_COL_SHIFT 8 #define ADP5589_MAX_ROW_NUM 7 #define ADP5589_MAX_COL_NUM 10 /* ADP5585 Mask Bits: * C C C C C | R R R R R R * 4 3 2 1 0 | 5 4 3 2 1 0 * * ---- BIT -- ----------- * 1 0 0 0 0 | 0 0 0 0 0 0 * 0 9 8 7 6 | 5 4 3 2 1 0 */ #define ADP5585_ROW_MASK 0x3F #define ADP5585_COL_MASK 0x1F #define ADP5585_ROW_SHIFT 0 #define ADP5585_COL_SHIFT 6 #define ADP5585_MAX_ROW_NUM 5 #define ADP5585_MAX_COL_NUM 4 #define ADP5585_ROW(x) (1 << ((x) & ADP5585_ROW_MASK)) #define ADP5585_COL(x) (1 << (((x) & ADP5585_COL_MASK) + ADP5585_COL_SHIFT)) /* Put one of these structures in i2c_board_info platform_data */ struct adp5589_kpad_platform_data { unsigned keypad_en_mask; /* Keypad (Rows/Columns) enable mask */ const unsigned short *keymap; /* Pointer to keymap */ unsigned short keymapsize; /* Keymap size */ bool repeat; /* Enable key repeat */ bool en_keylock; /* Enable key lock feature (ADP5589 only)*/ unsigned char unlock_key1; /* Unlock Key 1 (ADP5589 only) */ unsigned char unlock_key2; /* Unlock Key 2 (ADP5589 only) */ unsigned char unlock_timer; /* Time in seconds [0..7] between the two unlock keys 0=disable (ADP5589 only) */ unsigned char scan_cycle_time; /* Time between consecutive scan cycles */ unsigned char reset_cfg; /* Reset config */ unsigned short reset1_key_1; /* Reset Key 1 */ unsigned short reset1_key_2; /* Reset Key 2 */ unsigned short reset1_key_3; /* Reset Key 3 */ unsigned short reset2_key_1; /* Reset Key 1 */ unsigned short reset2_key_2; /* Reset Key 2 */ unsigned debounce_dis_mask; /* Disable debounce mask */ unsigned pull_dis_mask; /* Disable all pull resistors mask */ unsigned pullup_en_100k; /* Pull-Up 100k Enable Mask */ unsigned pullup_en_300k; /* Pull-Up 300k Enable Mask */ unsigned pulldown_en_300k; /* Pull-Down 300k Enable Mask */ const struct adp5589_gpi_map *gpimap; unsigned short gpimapsize; const struct adp5589_gpio_platform_data *gpio_data; }; struct i2c_client; /* forward declaration */ struct adp5589_gpio_platform_data { int gpio_start; /* GPIO Chip base # */ }; #endif PK ! 5�F` ` input/ad714x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/input/ad714x.h * * AD714x is very flexible, it can be used as buttons, scrollwheel, * slider, touchpad at the same time. That depends on the boards. * The platform_data for the device's "struct device" holds this * information. * * Copyright 2009-2011 Analog Devices Inc. */ #ifndef __LINUX_INPUT_AD714X_H__ #define __LINUX_INPUT_AD714X_H__ #define STAGE_NUM 12 #define STAGE_CFGREG_NUM 8 #define SYS_CFGREG_NUM 8 /* board information which need be initialized in arch/mach... */ struct ad714x_slider_plat { int start_stage; int end_stage; int max_coord; }; struct ad714x_wheel_plat { int start_stage; int end_stage; int max_coord; }; struct ad714x_touchpad_plat { int x_start_stage; int x_end_stage; int x_max_coord; int y_start_stage; int y_end_stage; int y_max_coord; }; struct ad714x_button_plat { int keycode; unsigned short l_mask; unsigned short h_mask; }; struct ad714x_platform_data { int slider_num; int wheel_num; int touchpad_num; int button_num; struct ad714x_slider_plat *slider; struct ad714x_wheel_plat *wheel; struct ad714x_touchpad_plat *touchpad; struct ad714x_button_plat *button; unsigned short stage_cfg_reg[STAGE_NUM][STAGE_CFGREG_NUM]; unsigned short sys_cfg_reg[SYS_CFGREG_NUM]; unsigned long irqflags; }; #endif PK ! !e'� � input/sh_keysc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SH_KEYSC_H__ #define __SH_KEYSC_H__ #define SH_KEYSC_MAXKEYS 64 struct sh_keysc_info { enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3, SH_KEYSC_MODE_4, SH_KEYSC_MODE_5, SH_KEYSC_MODE_6 } mode; int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */ int delay; int kycr2_delay; int keycodes[SH_KEYSC_MAXKEYS]; /* KEYIN * KEYOUT */ }; #endif /* __SH_KEYSC_H__ */ PK ! ���i� � input/lm8333.hnu �[��� /* * public include for LM8333 keypad driver - same license as driver * Copyright (C) 2012 Wolfram Sang, Pengutronix <kernel@pengutronix.de> */ #ifndef _LM8333_H #define _LM8333_H struct lm8333; struct lm8333_platform_data { /* Keymap data */ const struct matrix_keymap_data *matrix_data; /* Active timeout before enter HALT mode in microseconds */ unsigned active_time; /* Debounce interval in microseconds */ unsigned debounce_time; }; extern int lm8333_read8(struct lm8333 *lm8333, u8 cmd); extern int lm8333_write8(struct lm8333 *lm8333, u8 cmd, u8 val); extern int lm8333_read_block(struct lm8333 *lm8333, u8 cmd, u8 len, u8 *buf); #endif /* _LM8333_H */ PK ! @۩|� � input/auo-pixcir-ts.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Driver for AUO in-cell touchscreens * * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de> * * based on auo_touch.h from Dell Streak kernel * * Copyright (c) 2008 QUALCOMM Incorporated. * Copyright (c) 2008 QUALCOMM USA, INC. */ #ifndef __AUO_PIXCIR_TS_H__ #define __AUO_PIXCIR_TS_H__ /* * Interrupt modes: * periodical: interrupt is asserted periodicaly * compare coordinates: interrupt is asserted when coordinates change * indicate touch: interrupt is asserted during touch */ #define AUO_PIXCIR_INT_PERIODICAL 0x00 #define AUO_PIXCIR_INT_COMP_COORD 0x01 #define AUO_PIXCIR_INT_TOUCH_IND 0x02 /* * @gpio_int interrupt gpio * @int_setting one of AUO_PIXCIR_INT_* * @init_hw hardwarespecific init * @exit_hw hardwarespecific shutdown * @x_max x-resolution * @y_max y-resolution */ struct auo_pixcir_ts_platdata { int gpio_int; int gpio_rst; int int_setting; unsigned int x_max; unsigned int y_max; }; #endif PK ! 57�� � regulator/fixed.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * fixed.h * * Copyright 2008 Wolfson Microelectronics PLC. * * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> * * Copyright (c) 2009 Nokia Corporation * Roger Quadros <ext-roger.quadros@nokia.com> */ #ifndef __REGULATOR_FIXED_H #define __REGULATOR_FIXED_H struct regulator_init_data; /** * struct fixed_voltage_config - fixed_voltage_config structure * @supply_name: Name of the regulator supply * @input_supply: Name of the input regulator supply * @microvolts: Output voltage of regulator * @startup_delay: Start-up time in microseconds * @enabled_at_boot: Whether regulator has been enabled at * boot or not. 1 = Yes, 0 = No * This is used to keep the regulator at * the default state * @init_data: regulator_init_data * * This structure contains fixed voltage regulator configuration * information that must be passed by platform code to the fixed * voltage regulator driver. */ struct fixed_voltage_config { const char *supply_name; const char *input_supply; int microvolts; unsigned startup_delay; unsigned int off_on_delay; unsigned enabled_at_boot:1; struct regulator_init_data *init_data; }; struct regulator_consumer_supply; #if IS_ENABLED(CONFIG_REGULATOR) struct platform_device *regulator_register_always_on(int id, const char *name, struct regulator_consumer_supply *supplies, int num_supplies, int uv); #else static inline struct platform_device *regulator_register_always_on(int id, const char *name, struct regulator_consumer_supply *supplies, int num_supplies, int uv) { return NULL; } #endif #define regulator_register_fixed(id, s, ns) regulator_register_always_on(id, \ "fixed-dummy", s, ns, 0) #endif PK ! l�o� � regulator/fan53555.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * fan53555.h - Fairchild Regulator FAN53555 Driver * * Copyright (C) 2012 Marvell Technology Ltd. * Yunfan Zhang <yfzhang@marvell.com> */ #ifndef __FAN53555_H__ #define __FAN53555_H__ /* VSEL ID */ enum { FAN53555_VSEL_ID_0 = 0, FAN53555_VSEL_ID_1, }; /* Transition slew rate limiting from a low to high voltage. * ----------------------- * Bin |Slew Rate(mV/uS) * ------|---------------- * 000 | 64.00 * ------|---------------- * 001 | 32.00 * ------|---------------- * 010 | 16.00 * ------|---------------- * 011 | 8.00 * ------|---------------- * 100 | 4.00 * ------|---------------- * 101 | 2.00 * ------|---------------- * 110 | 1.00 * ------|---------------- * 111 | 0.50 * ----------------------- */ enum { FAN53555_SLEW_RATE_64MV = 0, FAN53555_SLEW_RATE_32MV, FAN53555_SLEW_RATE_16MV, FAN53555_SLEW_RATE_8MV, FAN53555_SLEW_RATE_4MV, FAN53555_SLEW_RATE_2MV, FAN53555_SLEW_RATE_1MV, FAN53555_SLEW_RATE_0_5MV, }; struct fan53555_platform_data { struct regulator_init_data *regulator; unsigned int slew_rate; /* Sleep VSEL ID */ unsigned int sleep_vsel_id; }; #endif /* __FAN53555_H__ */ PK ! ��;�& �& regulator/machine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * machine.h -- SoC Regulator support, machine/board driver API. * * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC. * * Author: Liam Girdwood <lrg@slimlogic.co.uk> * * Regulator Machine/Board Interface. */ #ifndef __LINUX_REGULATOR_MACHINE_H_ #define __LINUX_REGULATOR_MACHINE_H_ #include <linux/regulator/consumer.h> #include <linux/suspend.h> struct regulator; /* * Regulator operation constraint flags. These flags are used to enable * certain regulator operations and can be OR'ed together. * * VOLTAGE: Regulator output voltage can be changed by software on this * board/machine. * CURRENT: Regulator output current can be changed by software on this * board/machine. * MODE: Regulator operating mode can be changed by software on this * board/machine. * STATUS: Regulator can be enabled and disabled. * DRMS: Dynamic Regulator Mode Switching is enabled for this regulator. * BYPASS: Regulator can be put into bypass mode */ #define REGULATOR_CHANGE_VOLTAGE 0x1 #define REGULATOR_CHANGE_CURRENT 0x2 #define REGULATOR_CHANGE_MODE 0x4 #define REGULATOR_CHANGE_STATUS 0x8 #define REGULATOR_CHANGE_DRMS 0x10 #define REGULATOR_CHANGE_BYPASS 0x20 /* * operations in suspend mode * DO_NOTHING_IN_SUSPEND - the default value * DISABLE_IN_SUSPEND - turn off regulator in suspend states * ENABLE_IN_SUSPEND - keep regulator on in suspend states */ #define DO_NOTHING_IN_SUSPEND 0 #define DISABLE_IN_SUSPEND 1 #define ENABLE_IN_SUSPEND 2 /* Regulator active discharge flags */ enum regulator_active_discharge { REGULATOR_ACTIVE_DISCHARGE_DEFAULT, REGULATOR_ACTIVE_DISCHARGE_DISABLE, REGULATOR_ACTIVE_DISCHARGE_ENABLE, }; /** * struct regulator_state - regulator state during low power system states * * This describes a regulators state during a system wide low power * state. One of enabled or disabled must be set for the * configuration to be applied. * * @uV: Default operating voltage during suspend, it can be adjusted * among <min_uV, max_uV>. * @min_uV: Minimum suspend voltage may be set. * @max_uV: Maximum suspend voltage may be set. * @mode: Operating mode during suspend. * @enabled: operations during suspend. * - DO_NOTHING_IN_SUSPEND * - DISABLE_IN_SUSPEND * - ENABLE_IN_SUSPEND * @changeable: Is this state can be switched between enabled/disabled, */ struct regulator_state { int uV; int min_uV; int max_uV; unsigned int mode; int enabled; bool changeable; }; #define REGULATOR_NOTIF_LIMIT_DISABLE -1 #define REGULATOR_NOTIF_LIMIT_ENABLE -2 struct notification_limit { int prot; int err; int warn; }; /** * struct regulation_constraints - regulator operating constraints. * * This struct describes regulator and board/machine specific constraints. * * @name: Descriptive name for the constraints, used for display purposes. * * @min_uV: Smallest voltage consumers may set. * @max_uV: Largest voltage consumers may set. * @uV_offset: Offset applied to voltages from consumer to compensate for * voltage drops. * * @min_uA: Smallest current consumers may set. * @max_uA: Largest current consumers may set. * @ilim_uA: Maximum input current. * @system_load: Load that isn't captured by any consumer requests. * * @over_curr_limits: Limits for acting on over current. * @over_voltage_limits: Limits for acting on over voltage. * @under_voltage_limits: Limits for acting on under voltage. * @temp_limits: Limits for acting on over temperature. * * @max_spread: Max possible spread between coupled regulators * @max_uV_step: Max possible step change in voltage * @valid_modes_mask: Mask of modes which may be configured by consumers. * @valid_ops_mask: Operations which may be performed by consumers. * * @always_on: Set if the regulator should never be disabled. * @boot_on: Set if the regulator is enabled when the system is initially * started. If the regulator is not enabled by the hardware or * bootloader then it will be enabled when the constraints are * applied. * @apply_uV: Apply the voltage constraint when initialising. * @ramp_disable: Disable ramp delay when initialising or when setting voltage. * @soft_start: Enable soft start so that voltage ramps slowly. * @pull_down: Enable pull down when regulator is disabled. * @over_current_protection: Auto disable on over current event. * * @over_current_detection: Configure over current limits. * @over_voltage_detection: Configure over voltage limits. * @under_voltage_detection: Configure under voltage limits. * @over_temp_detection: Configure over temperature limits. * * @input_uV: Input voltage for regulator when supplied by another regulator. * * @state_disk: State for regulator when system is suspended in disk mode. * @state_mem: State for regulator when system is suspended in mem mode. * @state_standby: State for regulator when system is suspended in standby * mode. * @initial_state: Suspend state to set by default. * @initial_mode: Mode to set at startup. * @ramp_delay: Time to settle down after voltage change (unit: uV/us) * @settling_time: Time to settle down after voltage change when voltage * change is non-linear (unit: microseconds). * @settling_time_up: Time to settle down after voltage increase when voltage * change is non-linear (unit: microseconds). * @settling_time_down : Time to settle down after voltage decrease when * voltage change is non-linear (unit: microseconds). * @active_discharge: Enable/disable active discharge. The enum * regulator_active_discharge values are used for * initialisation. * @enable_time: Turn-on time of the rails (unit: microseconds) */ struct regulation_constraints { const char *name; /* voltage output range (inclusive) - for voltage control */ int min_uV; int max_uV; int uV_offset; /* current output range (inclusive) - for current control */ int min_uA; int max_uA; int ilim_uA; int system_load; /* used for coupled regulators */ u32 *max_spread; /* used for changing voltage in steps */ int max_uV_step; /* valid regulator operating modes for this machine */ unsigned int valid_modes_mask; /* valid operations for regulator on this machine */ unsigned int valid_ops_mask; /* regulator input voltage - only if supply is another regulator */ int input_uV; /* regulator suspend states for global PMIC STANDBY/HIBERNATE */ struct regulator_state state_disk; struct regulator_state state_mem; struct regulator_state state_standby; struct notification_limit over_curr_limits; struct notification_limit over_voltage_limits; struct notification_limit under_voltage_limits; struct notification_limit temp_limits; suspend_state_t initial_state; /* suspend state to set at init */ /* mode to set on startup */ unsigned int initial_mode; unsigned int ramp_delay; unsigned int settling_time; unsigned int settling_time_up; unsigned int settling_time_down; unsigned int enable_time; unsigned int active_discharge; /* constraint flags */ unsigned always_on:1; /* regulator never off when system is on */ unsigned boot_on:1; /* bootloader/firmware enabled regulator */ unsigned apply_uV:1; /* apply uV constraint if min == max */ unsigned ramp_disable:1; /* disable ramp delay */ unsigned soft_start:1; /* ramp voltage slowly */ unsigned pull_down:1; /* pull down resistor when regulator off */ unsigned over_current_protection:1; /* auto disable on over current */ unsigned over_current_detection:1; /* notify on over current */ unsigned over_voltage_detection:1; /* notify on over voltage */ unsigned under_voltage_detection:1; /* notify on under voltage */ unsigned over_temp_detection:1; /* notify on over temperature */ }; /** * struct regulator_consumer_supply - supply -> device mapping * * This maps a supply name to a device. Use of dev_name allows support for * buses which make struct device available late such as I2C. * * @dev_name: Result of dev_name() for the consumer. * @supply: Name for the supply. */ struct regulator_consumer_supply { const char *dev_name; /* dev_name() for consumer */ const char *supply; /* consumer supply - e.g. "vcc" */ }; /* Initialize struct regulator_consumer_supply */ #define REGULATOR_SUPPLY(_name, _dev_name) \ { \ .supply = _name, \ .dev_name = _dev_name, \ } /** * struct regulator_init_data - regulator platform initialisation data. * * Initialisation constraints, our supply and consumers supplies. * * @supply_regulator: Parent regulator. Specified using the regulator name * as it appears in the name field in sysfs, which can * be explicitly set using the constraints field 'name'. * * @constraints: Constraints. These must be specified for the regulator to * be usable. * @num_consumer_supplies: Number of consumer device supplies. * @consumer_supplies: Consumer device supply configuration. * * @regulator_init: Callback invoked when the regulator has been registered. * @driver_data: Data passed to regulator_init. */ struct regulator_init_data { const char *supply_regulator; /* or NULL for system supply */ struct regulation_constraints constraints; int num_consumer_supplies; struct regulator_consumer_supply *consumer_supplies; /* optional regulator machine specific init */ int (*regulator_init)(void *driver_data); void *driver_data; /* core does not touch this */ }; #ifdef CONFIG_REGULATOR void regulator_has_full_constraints(void); #else static inline void regulator_has_full_constraints(void) { } #endif static inline int regulator_suspend_prepare(suspend_state_t state) { return 0; } static inline int regulator_suspend_finish(void) { return 0; } #endif PK ! ����s �s regulator/driver.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * driver.h -- SoC Regulator driver support. * * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC. * * Author: Liam Girdwood <lrg@slimlogic.co.uk> * * Regulator Driver Interface. */ #ifndef __LINUX_REGULATOR_DRIVER_H_ #define __LINUX_REGULATOR_DRIVER_H_ #include <linux/device.h> #include <linux/linear_range.h> #include <linux/notifier.h> #include <linux/regulator/consumer.h> #include <linux/ww_mutex.h> struct gpio_desc; struct regmap; struct regulator_dev; struct regulator_config; struct regulator_init_data; struct regulator_enable_gpio; enum regulator_status { REGULATOR_STATUS_OFF, REGULATOR_STATUS_ON, REGULATOR_STATUS_ERROR, /* fast/normal/idle/standby are flavors of "on" */ REGULATOR_STATUS_FAST, REGULATOR_STATUS_NORMAL, REGULATOR_STATUS_IDLE, REGULATOR_STATUS_STANDBY, /* The regulator is enabled but not regulating */ REGULATOR_STATUS_BYPASS, /* in case that any other status doesn't apply */ REGULATOR_STATUS_UNDEFINED, }; enum regulator_detection_severity { /* Hardware shut down voltage outputs if condition is detected */ REGULATOR_SEVERITY_PROT, /* Hardware is probably damaged/inoperable */ REGULATOR_SEVERITY_ERR, /* Hardware is still recoverable but recovery action must be taken */ REGULATOR_SEVERITY_WARN, }; /* Initialize struct linear_range for regulators */ #define REGULATOR_LINEAR_RANGE(_min_uV, _min_sel, _max_sel, _step_uV) \ { \ .min = _min_uV, \ .min_sel = _min_sel, \ .max_sel = _max_sel, \ .step = _step_uV, \ } /** * struct regulator_ops - regulator operations. * * @enable: Configure the regulator as enabled. * @disable: Configure the regulator as disabled. * @is_enabled: Return 1 if the regulator is enabled, 0 if not. * May also return negative errno. * * @set_voltage: Set the voltage for the regulator within the range specified. * The driver should select the voltage closest to min_uV. * @set_voltage_sel: Set the voltage for the regulator using the specified * selector. * @map_voltage: Convert a voltage into a selector * @get_voltage: Return the currently configured voltage for the regulator; * return -ENOTRECOVERABLE if regulator can't be read at * bootup and hasn't been set yet. * @get_voltage_sel: Return the currently configured voltage selector for the * regulator; return -ENOTRECOVERABLE if regulator can't * be read at bootup and hasn't been set yet. * @list_voltage: Return one of the supported voltages, in microvolts; zero * if the selector indicates a voltage that is unusable on this system; * or negative errno. Selectors range from zero to one less than * regulator_desc.n_voltages. Voltages may be reported in any order. * * @set_current_limit: Configure a limit for a current-limited regulator. * The driver should select the current closest to max_uA. * @get_current_limit: Get the configured limit for a current-limited regulator. * @set_input_current_limit: Configure an input limit. * * @set_over_current_protection: Support enabling of and setting limits for over * current situation detection. Detection can be configured for three * levels of severity. * REGULATOR_SEVERITY_PROT should automatically shut down the regulator(s). * REGULATOR_SEVERITY_ERR should indicate that over-current situation is * caused by an unrecoverable error but HW does not perform * automatic shut down. * REGULATOR_SEVERITY_WARN should indicate situation where hardware is * still believed to not be damaged but that a board sepcific * recovery action is needed. If lim_uA is 0 the limit should not * be changed but the detection should just be enabled/disabled as * is requested. * @set_over_voltage_protection: Support enabling of and setting limits for over * voltage situation detection. Detection can be configured for same * severities as over current protection. * @set_under_voltage_protection: Support enabling of and setting limits for * under situation detection. * @set_thermal_protection: Support enabling of and setting limits for over * temperature situation detection. * * @set_active_discharge: Set active discharge enable/disable of regulators. * * @set_mode: Set the configured operating mode for the regulator. * @get_mode: Get the configured operating mode for the regulator. * @get_error_flags: Get the current error(s) for the regulator. * @get_status: Return actual (not as-configured) status of regulator, as a * REGULATOR_STATUS value (or negative errno) * @get_optimum_mode: Get the most efficient operating mode for the regulator * when running with the specified parameters. * @set_load: Set the load for the regulator. * * @set_bypass: Set the regulator in bypass mode. * @get_bypass: Get the regulator bypass mode state. * * @enable_time: Time taken for the regulator voltage output voltage to * stabilise after being enabled, in microseconds. * @set_ramp_delay: Set the ramp delay for the regulator. The driver should * select ramp delay equal to or less than(closest) ramp_delay. * @set_voltage_time: Time taken for the regulator voltage output voltage * to stabilise after being set to a new value, in microseconds. * The function receives the from and to voltage as input, it * should return the worst case. * @set_voltage_time_sel: Time taken for the regulator voltage output voltage * to stabilise after being set to a new value, in microseconds. * The function receives the from and to voltage selector as * input, it should return the worst case. * @set_soft_start: Enable soft start for the regulator. * * @set_suspend_voltage: Set the voltage for the regulator when the system * is suspended. * @set_suspend_enable: Mark the regulator as enabled when the system is * suspended. * @set_suspend_disable: Mark the regulator as disabled when the system is * suspended. * @set_suspend_mode: Set the operating mode for the regulator when the * system is suspended. * @resume: Resume operation of suspended regulator. * @set_pull_down: Configure the regulator to pull down when the regulator * is disabled. * * This struct describes regulator operations which can be implemented by * regulator chip drivers. */ struct regulator_ops { /* enumerate supported voltages */ int (*list_voltage) (struct regulator_dev *, unsigned selector); /* get/set regulator voltage */ int (*set_voltage) (struct regulator_dev *, int min_uV, int max_uV, unsigned *selector); int (*map_voltage)(struct regulator_dev *, int min_uV, int max_uV); int (*set_voltage_sel) (struct regulator_dev *, unsigned selector); int (*get_voltage) (struct regulator_dev *); int (*get_voltage_sel) (struct regulator_dev *); /* get/set regulator current */ int (*set_current_limit) (struct regulator_dev *, int min_uA, int max_uA); int (*get_current_limit) (struct regulator_dev *); int (*set_input_current_limit) (struct regulator_dev *, int lim_uA); int (*set_over_current_protection)(struct regulator_dev *, int lim_uA, int severity, bool enable); int (*set_over_voltage_protection)(struct regulator_dev *, int lim_uV, int severity, bool enable); int (*set_under_voltage_protection)(struct regulator_dev *, int lim_uV, int severity, bool enable); int (*set_thermal_protection)(struct regulator_dev *, int lim, int severity, bool enable); int (*set_active_discharge)(struct regulator_dev *, bool enable); /* enable/disable regulator */ int (*enable) (struct regulator_dev *); int (*disable) (struct regulator_dev *); int (*is_enabled) (struct regulator_dev *); /* get/set regulator operating mode (defined in consumer.h) */ int (*set_mode) (struct regulator_dev *, unsigned int mode); unsigned int (*get_mode) (struct regulator_dev *); /* retrieve current error flags on the regulator */ int (*get_error_flags)(struct regulator_dev *, unsigned int *flags); /* Time taken to enable or set voltage on the regulator */ int (*enable_time) (struct regulator_dev *); int (*set_ramp_delay) (struct regulator_dev *, int ramp_delay); int (*set_voltage_time) (struct regulator_dev *, int old_uV, int new_uV); int (*set_voltage_time_sel) (struct regulator_dev *, unsigned int old_selector, unsigned int new_selector); int (*set_soft_start) (struct regulator_dev *); /* report regulator status ... most other accessors report * control inputs, this reports results of combining inputs * from Linux (and other sources) with the actual load. * returns REGULATOR_STATUS_* or negative errno. */ int (*get_status)(struct regulator_dev *); /* get most efficient regulator operating mode for load */ unsigned int (*get_optimum_mode) (struct regulator_dev *, int input_uV, int output_uV, int load_uA); /* set the load on the regulator */ int (*set_load)(struct regulator_dev *, int load_uA); /* control and report on bypass mode */ int (*set_bypass)(struct regulator_dev *dev, bool enable); int (*get_bypass)(struct regulator_dev *dev, bool *enable); /* the operations below are for configuration of regulator state when * its parent PMIC enters a global STANDBY/HIBERNATE state */ /* set regulator suspend voltage */ int (*set_suspend_voltage) (struct regulator_dev *, int uV); /* enable/disable regulator in suspend state */ int (*set_suspend_enable) (struct regulator_dev *); int (*set_suspend_disable) (struct regulator_dev *); /* set regulator suspend operating mode (defined in consumer.h) */ int (*set_suspend_mode) (struct regulator_dev *, unsigned int mode); int (*resume)(struct regulator_dev *rdev); int (*set_pull_down) (struct regulator_dev *); }; /* * Regulators can either control voltage or current. */ enum regulator_type { REGULATOR_VOLTAGE, REGULATOR_CURRENT, }; /** * struct regulator_desc - Static regulator descriptor * * Each regulator registered with the core is described with a * structure of this type and a struct regulator_config. This * structure contains the non-varying parts of the regulator * description. * * @name: Identifying name for the regulator. * @supply_name: Identifying the regulator supply * @of_match: Name used to identify regulator in DT. * @of_match_full_name: A flag to indicate that the of_match string, if * present, should be matched against the node full_name. * @regulators_node: Name of node containing regulator definitions in DT. * @of_parse_cb: Optional callback called only if of_match is present. * Will be called for each regulator parsed from DT, during * init_data parsing. * The regulator_config passed as argument to the callback will * be a copy of config passed to regulator_register, valid only * for this particular call. Callback may freely change the * config but it cannot store it for later usage. * Callback should return 0 on success or negative ERRNO * indicating failure. * @id: Numerical identifier for the regulator. * @ops: Regulator operations table. * @irq: Interrupt number for the regulator. * @type: Indicates if the regulator is a voltage or current regulator. * @owner: Module providing the regulator, used for refcounting. * * @continuous_voltage_range: Indicates if the regulator can set any * voltage within constrains range. * @n_voltages: Number of selectors available for ops.list_voltage(). * @n_current_limits: Number of selectors available for current limits * * @min_uV: Voltage given by the lowest selector (if linear mapping) * @uV_step: Voltage increase with each selector (if linear mapping) * @linear_min_sel: Minimal selector for starting linear mapping * @fixed_uV: Fixed voltage of rails. * @ramp_delay: Time to settle down after voltage change (unit: uV/us) * @min_dropout_uV: The minimum dropout voltage this regulator can handle * @linear_ranges: A constant table of possible voltage ranges. * @linear_range_selectors: A constant table of voltage range selectors. * If pickable ranges are used each range must * have corresponding selector here. * @n_linear_ranges: Number of entries in the @linear_ranges (and in * linear_range_selectors if used) table(s). * @volt_table: Voltage mapping table (if table based mapping) * @curr_table: Current limit mapping table (if table based mapping) * * @vsel_range_reg: Register for range selector when using pickable ranges * and ``regulator_map_*_voltage_*_pickable`` functions. * @vsel_range_mask: Mask for register bitfield used for range selector * @vsel_reg: Register for selector when using ``regulator_map_*_voltage_*`` * @vsel_mask: Mask for register bitfield used for selector * @vsel_step: Specify the resolution of selector stepping when setting * voltage. If 0, then no stepping is done (requested selector is * set directly), if >0 then the regulator API will ramp the * voltage up/down gradually each time increasing/decreasing the * selector by the specified step value. * @csel_reg: Register for current limit selector using regmap set_current_limit * @csel_mask: Mask for register bitfield used for current limit selector * @apply_reg: Register for initiate voltage change on the output when * using regulator_set_voltage_sel_regmap * @apply_bit: Register bitfield used for initiate voltage change on the * output when using regulator_set_voltage_sel_regmap * @enable_reg: Register for control when using regmap enable/disable ops * @enable_mask: Mask for control when using regmap enable/disable ops * @enable_val: Enabling value for control when using regmap enable/disable ops * @disable_val: Disabling value for control when using regmap enable/disable ops * @enable_is_inverted: A flag to indicate set enable_mask bits to disable * when using regulator_enable_regmap and friends APIs. * @bypass_reg: Register for control when using regmap set_bypass * @bypass_mask: Mask for control when using regmap set_bypass * @bypass_val_on: Enabling value for control when using regmap set_bypass * @bypass_val_off: Disabling value for control when using regmap set_bypass * @active_discharge_off: Enabling value for control when using regmap * set_active_discharge * @active_discharge_on: Disabling value for control when using regmap * set_active_discharge * @active_discharge_mask: Mask for control when using regmap * set_active_discharge * @active_discharge_reg: Register for control when using regmap * set_active_discharge * @soft_start_reg: Register for control when using regmap set_soft_start * @soft_start_mask: Mask for control when using regmap set_soft_start * @soft_start_val_on: Enabling value for control when using regmap * set_soft_start * @pull_down_reg: Register for control when using regmap set_pull_down * @pull_down_mask: Mask for control when using regmap set_pull_down * @pull_down_val_on: Enabling value for control when using regmap * set_pull_down * * @ramp_reg: Register for controlling the regulator ramp-rate. * @ramp_mask: Bitmask for the ramp-rate control register. * @ramp_delay_table: Table for mapping the regulator ramp-rate values. Values * should be given in units of V/S (uV/uS). See the * regulator_set_ramp_delay_regmap(). * * @enable_time: Time taken for initial enable of regulator (in uS). * @off_on_delay: guard time (in uS), before re-enabling a regulator * * @poll_enabled_time: The polling interval (in uS) to use while checking that * the regulator was actually enabled. Max upto enable_time. * * @of_map_mode: Maps a hardware mode defined in a DeviceTree to a standard mode */ struct regulator_desc { const char *name; const char *supply_name; const char *of_match; bool of_match_full_name; const char *regulators_node; int (*of_parse_cb)(struct device_node *, const struct regulator_desc *, struct regulator_config *); int id; unsigned int continuous_voltage_range:1; unsigned n_voltages; unsigned int n_current_limits; const struct regulator_ops *ops; int irq; enum regulator_type type; struct module *owner; unsigned int min_uV; unsigned int uV_step; unsigned int linear_min_sel; int fixed_uV; unsigned int ramp_delay; int min_dropout_uV; const struct linear_range *linear_ranges; const unsigned int *linear_range_selectors; int n_linear_ranges; const unsigned int *volt_table; const unsigned int *curr_table; unsigned int vsel_range_reg; unsigned int vsel_range_mask; unsigned int vsel_reg; unsigned int vsel_mask; unsigned int vsel_step; unsigned int csel_reg; unsigned int csel_mask; unsigned int apply_reg; unsigned int apply_bit; unsigned int enable_reg; unsigned int enable_mask; unsigned int enable_val; unsigned int disable_val; bool enable_is_inverted; unsigned int bypass_reg; unsigned int bypass_mask; unsigned int bypass_val_on; unsigned int bypass_val_off; unsigned int active_discharge_on; unsigned int active_discharge_off; unsigned int active_discharge_mask; unsigned int active_discharge_reg; unsigned int soft_start_reg; unsigned int soft_start_mask; unsigned int soft_start_val_on; unsigned int pull_down_reg; unsigned int pull_down_mask; unsigned int pull_down_val_on; unsigned int ramp_reg; unsigned int ramp_mask; const unsigned int *ramp_delay_table; unsigned int n_ramp_values; unsigned int enable_time; unsigned int off_on_delay; unsigned int poll_enabled_time; unsigned int (*of_map_mode)(unsigned int mode); }; /** * struct regulator_config - Dynamic regulator descriptor * * Each regulator registered with the core is described with a * structure of this type and a struct regulator_desc. This structure * contains the runtime variable parts of the regulator description. * * @dev: struct device for the regulator * @init_data: platform provided init data, passed through by driver * @driver_data: private regulator data * @of_node: OpenFirmware node to parse for device tree bindings (may be * NULL). * @regmap: regmap to use for core regmap helpers if dev_get_regmap() is * insufficient. * @ena_gpiod: GPIO controlling regulator enable. */ struct regulator_config { struct device *dev; const struct regulator_init_data *init_data; void *driver_data; struct device_node *of_node; struct regmap *regmap; struct gpio_desc *ena_gpiod; }; /** * struct regulator_err_state - regulator error/notification status * * @rdev: Regulator which status the struct indicates. * @notifs: Events which have occurred on the regulator. * @errors: Errors which are active on the regulator. * @possible_errs: Errors which can be signaled (by given IRQ). */ struct regulator_err_state { struct regulator_dev *rdev; unsigned long notifs; unsigned long errors; int possible_errs; }; /** * struct regulator_irq_data - regulator error/notification status data * * @states: Status structs for each of the associated regulators. * @num_states: Amount of associated regulators. * @data: Driver data pointer given at regulator_irq_desc. * @opaque: Value storage for IC driver. Core does not update this. ICs * may want to store status register value here at map_event and * compare contents at 'renable' callback to see if new problems * have been added to status. If that is the case it may be * desirable to return REGULATOR_ERROR_CLEARED and not * REGULATOR_ERROR_ON to allow IRQ fire again and to generate * notifications also for the new issues. * * This structure is passed to 'map_event' and 'renable' callbacks for * reporting regulator status to core. */ struct regulator_irq_data { struct regulator_err_state *states; int num_states; void *data; long opaque; }; /** * struct regulator_irq_desc - notification sender for IRQ based events. * * @name: The visible name for the IRQ * @fatal_cnt: If this IRQ is used to signal HW damaging condition it may be * best to shut-down regulator(s) or reboot the SOC if error * handling is repeatedly failing. If fatal_cnt is given the IRQ * handling is aborted if it fails for fatal_cnt times and die() * callback (if populated) or BUG() is called to try to prevent * further damage. * @reread_ms: The time which is waited before attempting to re-read status * at the worker if IC reading fails. Immediate re-read is done * if time is not specified. * @irq_off_ms: The time which IRQ is kept disabled before re-evaluating the * status for devices which keep IRQ disabled for duration of the * error. If this is not given the IRQ is left enabled and renable * is not called. * @skip_off: If set to true the IRQ handler will attempt to check if any of * the associated regulators are enabled prior to taking other * actions. If no regulators are enabled and this is set to true * a spurious IRQ is assumed and IRQ_NONE is returned. * @high_prio: Boolean to indicate that high priority WQ should be used. * @data: Driver private data pointer which will be passed as such to * the renable, map_event and die callbacks in regulator_irq_data. * @die: Protection callback. If IC status reading or recovery actions * fail fatal_cnt times this callback or BUG() is called. This * callback should implement a final protection attempt like * disabling the regulator. If protection succeeded this may * return 0. If anything else is returned the core assumes final * protection failed and calls BUG() as a last resort. * @map_event: Driver callback to map IRQ status into regulator devices with * events / errors. NOTE: callback MUST initialize both the * errors and notifs for all rdevs which it signals having * active events as core does not clean the map data. * REGULATOR_FAILED_RETRY can be returned to indicate that the * status reading from IC failed. If this is repeated for * fatal_cnt times the core will call die() callback or power-off * the system as a last resort to protect the HW. * @renable: Optional callback to check status (if HW supports that) before * re-enabling IRQ. If implemented this should clear the error * flags so that errors fetched by regulator_get_error_flags() * are updated. If callback is not implemented then errors are * assumed to be cleared and IRQ is re-enabled. * REGULATOR_FAILED_RETRY can be returned to * indicate that the status reading from IC failed. If this is * repeated for 'fatal_cnt' times the core will call die() * callback or if die() is not populated then attempt to power-off * the system as a last resort to protect the HW. * Returning zero indicates that the problem in HW has been solved * and IRQ will be re-enabled. Returning REGULATOR_ERROR_ON * indicates the error condition is still active and keeps IRQ * disabled. Please note that returning REGULATOR_ERROR_ON does * not retrigger evaluating what events are active or resending * notifications. If this is needed you probably want to return * zero and allow IRQ to retrigger causing events to be * re-evaluated and re-sent. * * This structure is used for registering regulator IRQ notification helper. */ struct regulator_irq_desc { const char *name; int irq_flags; int fatal_cnt; int reread_ms; int irq_off_ms; bool skip_off; bool high_prio; void *data; int (*die)(struct regulator_irq_data *rid); int (*map_event)(int irq, struct regulator_irq_data *rid, unsigned long *dev_mask); int (*renable)(struct regulator_irq_data *rid); }; /* * Return values for regulator IRQ helpers. */ enum { REGULATOR_ERROR_CLEARED, REGULATOR_FAILED_RETRY, REGULATOR_ERROR_ON, }; /* * struct coupling_desc * * Describes coupling of regulators. Each regulator should have * at least a pointer to itself in coupled_rdevs array. * When a new coupled regulator is resolved, n_resolved is * incremented. */ struct coupling_desc { struct regulator_dev **coupled_rdevs; struct regulator_coupler *coupler; int n_resolved; int n_coupled; }; /* * struct regulator_dev * * Voltage / Current regulator class device. One for each * regulator. * * This should *not* be used directly by anything except the regulator * core and notification injection (which should take the mutex and do * no other direct access). */ struct regulator_dev { const struct regulator_desc *desc; int exclusive; u32 use_count; u32 open_count; u32 bypass_count; /* lists we belong to */ struct list_head list; /* list of all regulators */ /* lists we own */ struct list_head consumer_list; /* consumers we supply */ struct coupling_desc coupling_desc; struct blocking_notifier_head notifier; struct ww_mutex mutex; /* consumer lock */ struct task_struct *mutex_owner; int ref_cnt; struct module *owner; struct device dev; struct regulation_constraints *constraints; struct regulator *supply; /* for tree */ const char *supply_name; struct regmap *regmap; struct delayed_work disable_work; void *reg_data; /* regulator_dev data */ struct dentry *debugfs; struct regulator_enable_gpio *ena_pin; unsigned int ena_gpio_state:1; unsigned int is_switch:1; /* time when this regulator was disabled last time */ ktime_t last_off; int cached_err; bool use_cached_err; spinlock_t err_lock; }; struct regulator_dev * regulator_register(const struct regulator_desc *regulator_desc, const struct regulator_config *config); struct regulator_dev * devm_regulator_register(struct device *dev, const struct regulator_desc *regulator_desc, const struct regulator_config *config); void regulator_unregister(struct regulator_dev *rdev); int regulator_notifier_call_chain(struct regulator_dev *rdev, unsigned long event, void *data); void *devm_regulator_irq_helper(struct device *dev, const struct regulator_irq_desc *d, int irq, int irq_flags, int common_errs, int *per_rdev_errs, struct regulator_dev **rdev, int rdev_amount); void *regulator_irq_helper(struct device *dev, const struct regulator_irq_desc *d, int irq, int irq_flags, int common_errs, int *per_rdev_errs, struct regulator_dev **rdev, int rdev_amount); void regulator_irq_helper_cancel(void **handle); void *rdev_get_drvdata(struct regulator_dev *rdev); struct device *rdev_get_dev(struct regulator_dev *rdev); struct regmap *rdev_get_regmap(struct regulator_dev *rdev); int rdev_get_id(struct regulator_dev *rdev); int regulator_mode_to_status(unsigned int); int regulator_list_voltage_linear(struct regulator_dev *rdev, unsigned int selector); int regulator_list_voltage_pickable_linear_range(struct regulator_dev *rdev, unsigned int selector); int regulator_list_voltage_linear_range(struct regulator_dev *rdev, unsigned int selector); int regulator_list_voltage_table(struct regulator_dev *rdev, unsigned int selector); int regulator_map_voltage_linear(struct regulator_dev *rdev, int min_uV, int max_uV); int regulator_map_voltage_pickable_linear_range(struct regulator_dev *rdev, int min_uV, int max_uV); int regulator_map_voltage_linear_range(struct regulator_dev *rdev, int min_uV, int max_uV); int regulator_map_voltage_iterate(struct regulator_dev *rdev, int min_uV, int max_uV); int regulator_map_voltage_ascend(struct regulator_dev *rdev, int min_uV, int max_uV); int regulator_get_voltage_sel_pickable_regmap(struct regulator_dev *rdev); int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev, unsigned int sel); int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev); int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel); int regulator_is_enabled_regmap(struct regulator_dev *rdev); int regulator_enable_regmap(struct regulator_dev *rdev); int regulator_disable_regmap(struct regulator_dev *rdev); int regulator_set_voltage_time_sel(struct regulator_dev *rdev, unsigned int old_selector, unsigned int new_selector); int regulator_set_bypass_regmap(struct regulator_dev *rdev, bool enable); int regulator_get_bypass_regmap(struct regulator_dev *rdev, bool *enable); int regulator_set_soft_start_regmap(struct regulator_dev *rdev); int regulator_set_pull_down_regmap(struct regulator_dev *rdev); int regulator_set_active_discharge_regmap(struct regulator_dev *rdev, bool enable); int regulator_set_current_limit_regmap(struct regulator_dev *rdev, int min_uA, int max_uA); int regulator_get_current_limit_regmap(struct regulator_dev *rdev); void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data); int regulator_set_ramp_delay_regmap(struct regulator_dev *rdev, int ramp_delay); int regulator_sync_voltage_rdev(struct regulator_dev *rdev); /* * Helper functions intended to be used by regulator drivers prior registering * their regulators. */ int regulator_desc_list_voltage_linear_range(const struct regulator_desc *desc, unsigned int selector); int regulator_desc_list_voltage_linear(const struct regulator_desc *desc, unsigned int selector); #ifdef CONFIG_REGULATOR const char *rdev_get_name(struct regulator_dev *rdev); #else static inline const char *rdev_get_name(struct regulator_dev *rdev) { return NULL; } #endif #endif PK ! �� � � regulator/da9121.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * DA9121 Single-channel dual-phase 10A buck converter * DA9130 Single-channel dual-phase 10A buck converter (Automotive) * DA9217 Single-channel dual-phase 6A buck converter * DA9122 Dual-channel single-phase 5A buck converter * DA9131 Dual-channel single-phase 5A buck converter (Automotive) * DA9220 Dual-channel single-phase 3A buck converter * DA9132 Dual-channel single-phase 3A buck converter (Automotive) * * Copyright (C) 2020 Dialog Semiconductor * * Authors: Adam Ward, Dialog Semiconductor */ #ifndef __LINUX_REGULATOR_DA9121_H #define __LINUX_REGULATOR_DA9121_H #include <linux/regulator/machine.h> struct gpio_desc; enum { DA9121_IDX_BUCK1, DA9121_IDX_BUCK2, DA9121_IDX_MAX }; struct da9121_pdata { int num_buck; struct gpio_desc *gpiod_ren[DA9121_IDX_MAX]; struct device_node *reg_node[DA9121_IDX_MAX]; struct regulator_init_data *init_data[DA9121_IDX_MAX]; }; #endif PK ! {�� � regulator/da9211.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * da9211.h - Regulator device driver for DA9211/DA9212 * /DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 * Copyright (C) 2015 Dialog Semiconductor Ltd. */ #ifndef __LINUX_REGULATOR_DA9211_H #define __LINUX_REGULATOR_DA9211_H #include <linux/regulator/machine.h> #define DA9211_MAX_REGULATORS 2 struct gpio_desc; enum da9211_chip_id { DA9211, DA9212, DA9213, DA9223, DA9214, DA9224, DA9215, DA9225, }; struct da9211_pdata { /* * Number of buck * 1 : 4 phase 1 buck * 2 : 2 phase 2 buck */ int num_buck; struct gpio_desc *gpiod_ren[DA9211_MAX_REGULATORS]; struct device_node *reg_node[DA9211_MAX_REGULATORS]; struct regulator_init_data *init_data[DA9211_MAX_REGULATORS]; }; #endif PK ! �n�<� � regulator/act8865.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * act8865.h -- Voltage regulation for active-semi act88xx PMUs * * Copyright (C) 2013 Atmel Corporation. */ #ifndef __LINUX_REGULATOR_ACT8865_H #define __LINUX_REGULATOR_ACT8865_H #include <linux/regulator/machine.h> enum { ACT8600_ID_DCDC1, ACT8600_ID_DCDC2, ACT8600_ID_DCDC3, ACT8600_ID_SUDCDC4, ACT8600_ID_LDO5, ACT8600_ID_LDO6, ACT8600_ID_LDO7, ACT8600_ID_LDO8, ACT8600_ID_LDO9, ACT8600_ID_LDO10, }; enum { ACT8865_ID_DCDC1, ACT8865_ID_DCDC2, ACT8865_ID_DCDC3, ACT8865_ID_LDO1, ACT8865_ID_LDO2, ACT8865_ID_LDO3, ACT8865_ID_LDO4, ACT8865_REG_NUM, }; enum { ACT8846_ID_REG1, ACT8846_ID_REG2, ACT8846_ID_REG3, ACT8846_ID_REG4, ACT8846_ID_REG5, ACT8846_ID_REG6, ACT8846_ID_REG7, ACT8846_ID_REG8, ACT8846_ID_REG9, ACT8846_ID_REG10, ACT8846_ID_REG11, ACT8846_ID_REG12, ACT8846_REG_NUM, }; enum { ACT8600, ACT8865, ACT8846, }; /** * act8865_regulator_data - regulator data * @id: regulator id * @name: regulator name * @init_data: regulator init data * @of_node: device tree node (optional) */ struct act8865_regulator_data { int id; const char *name; struct regulator_init_data *init_data; struct device_node *of_node; }; /** * act8865_platform_data - platform data for act8865 * @num_regulators: number of regulators used * @regulators: pointer to regulators used */ struct act8865_platform_data { int num_regulators; struct act8865_regulator_data *regulators; }; #endif PK ! *�FN N regulator/mt6315-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2021 MediaTek Inc. */ #ifndef __LINUX_REGULATOR_MT6315_H #define __LINUX_REGULATOR_MT6315_H #define MT6315_RP 3 #define MT6315_PP 6 #define MT6315_SP 7 enum { MT6315_VBUCK1 = 0, MT6315_VBUCK2, MT6315_VBUCK3, MT6315_VBUCK4, MT6315_VBUCK_MAX, }; /* Register */ #define MT6315_TOP2_ELR7 0x139 #define MT6315_TOP_TMA_KEY 0x39F #define MT6315_TOP_TMA_KEY_H 0x3A0 #define MT6315_BUCK_TOP_CON0 0x1440 #define MT6315_BUCK_TOP_CON1 0x1443 #define MT6315_BUCK_TOP_ELR0 0x1449 #define MT6315_BUCK_TOP_ELR2 0x144B #define MT6315_BUCK_TOP_ELR4 0x144D #define MT6315_BUCK_TOP_ELR6 0x144F #define MT6315_VBUCK1_DBG0 0x1499 #define MT6315_VBUCK1_DBG4 0x149D #define MT6315_VBUCK2_DBG0 0x1519 #define MT6315_VBUCK2_DBG4 0x151D #define MT6315_VBUCK3_DBG0 0x1599 #define MT6315_VBUCK3_DBG4 0x159D #define MT6315_VBUCK4_DBG0 0x1619 #define MT6315_VBUCK4_DBG4 0x161D #define MT6315_BUCK_TOP_4PHASE_ANA_CON42 0x16B1 #define PROTECTION_KEY_H 0x9C #define PROTECTION_KEY 0xEA #endif /* __LINUX_REGULATOR_MT6315_H */ PK ! +���> > regulator/max8649.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Interface of Maxim max8649 * * Copyright (C) 2009-2010 Marvell International Ltd. * Haojian Zhuang <haojian.zhuang@marvell.com> */ #ifndef __LINUX_REGULATOR_MAX8649_H #define __LINUX_REGULATOR_MAX8649_H #include <linux/regulator/machine.h> enum { MAX8649_EXTCLK_26MHZ = 0, MAX8649_EXTCLK_13MHZ, MAX8649_EXTCLK_19MHZ, /* 19.2MHz */ }; enum { MAX8649_RAMP_32MV = 0, MAX8649_RAMP_16MV, MAX8649_RAMP_8MV, MAX8649_RAMP_4MV, MAX8649_RAMP_2MV, MAX8649_RAMP_1MV, MAX8649_RAMP_0_5MV, MAX8649_RAMP_0_25MV, }; struct max8649_platform_data { struct regulator_init_data *regulator; unsigned mode:2; /* bit[1:0] = VID1,VID0 */ unsigned extclk_freq:2; unsigned extclk:1; unsigned ramp_timing:3; unsigned ramp_down:1; }; #endif /* __LINUX_REGULATOR_MAX8649_H */ PK ! ƺ&`� � regulator/lp3971.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * National Semiconductors LP3971 PMIC chip client interface * * Copyright (C) 2009 Samsung Electronics * Author: Marek Szyprowski <m.szyprowski@samsung.com> * * Based on wm8400.h */ #ifndef __LINUX_REGULATOR_LP3971_H #define __LINUX_REGULATOR_LP3971_H #include <linux/regulator/machine.h> #define LP3971_LDO1 0 #define LP3971_LDO2 1 #define LP3971_LDO3 2 #define LP3971_LDO4 3 #define LP3971_LDO5 4 #define LP3971_DCDC1 5 #define LP3971_DCDC2 6 #define LP3971_DCDC3 7 #define LP3971_NUM_REGULATORS 8 struct lp3971_regulator_subdev { int id; struct regulator_init_data *initdata; }; struct lp3971_platform_data { int num_regulators; struct lp3971_regulator_subdev *regulators; }; #endif PK ! � � � regulator/lp872x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2012 Texas Instruments * * Author: Milo(Woogyom) Kim <milo.kim@ti.com> */ #ifndef __LP872X_REGULATOR_H__ #define __LP872X_REGULATOR_H__ #include <linux/regulator/machine.h> #include <linux/platform_device.h> #include <linux/gpio.h> #define LP872X_MAX_REGULATORS 9 #define LP8720_ENABLE_DELAY 200 #define LP8725_ENABLE_DELAY 30000 enum lp872x_regulator_id { LP8720_ID_BASE, LP8720_ID_LDO1 = LP8720_ID_BASE, LP8720_ID_LDO2, LP8720_ID_LDO3, LP8720_ID_LDO4, LP8720_ID_LDO5, LP8720_ID_BUCK, LP8725_ID_BASE, LP8725_ID_LDO1 = LP8725_ID_BASE, LP8725_ID_LDO2, LP8725_ID_LDO3, LP8725_ID_LDO4, LP8725_ID_LDO5, LP8725_ID_LILO1, LP8725_ID_LILO2, LP8725_ID_BUCK1, LP8725_ID_BUCK2, LP872X_ID_MAX, }; enum lp872x_dvs_state { DVS_LOW = GPIOF_OUT_INIT_LOW, DVS_HIGH = GPIOF_OUT_INIT_HIGH, }; enum lp872x_dvs_sel { SEL_V1, SEL_V2, }; /** * lp872x_dvs * @gpio : gpio pin number for dvs control * @vsel : dvs selector for buck v1 or buck v2 register * @init_state : initial dvs pin state */ struct lp872x_dvs { int gpio; enum lp872x_dvs_sel vsel; enum lp872x_dvs_state init_state; }; /** * lp872x_regdata * @id : regulator id * @init_data : init data for each regulator */ struct lp872x_regulator_data { enum lp872x_regulator_id id; struct regulator_init_data *init_data; }; /** * lp872x_platform_data * @general_config : the value of LP872X_GENERAL_CFG register * @update_config : if LP872X_GENERAL_CFG register is updated, set true * @regulator_data : platform regulator id and init data * @dvs : dvs data for buck voltage control * @enable_gpio : gpio pin number for enable control */ struct lp872x_platform_data { u8 general_config; bool update_config; struct lp872x_regulator_data regulator_data[LP872X_MAX_REGULATORS]; struct lp872x_dvs *dvs; int enable_gpio; }; #endif PK ! ��Xz regulator/tps6507x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * tps6507x.h -- Voltage regulation for the Texas Instruments TPS6507X * * Copyright (C) 2010 Texas Instruments, Inc. */ #ifndef REGULATOR_TPS6507X #define REGULATOR_TPS6507X /** * tps6507x_reg_platform_data - platform data for tps6507x * @defdcdc_default: Defines whether DCDC high or the low register controls * output voltage by default. Valid for DCDC2 and DCDC3 outputs only. */ struct tps6507x_reg_platform_data { bool defdcdc_default; }; #endif PK ! ��+> > regulator/mt6323-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2016 MediaTek Inc. * Author: Chen Zhong <chen.zhong@mediatek.com> */ #ifndef __LINUX_REGULATOR_MT6323_H #define __LINUX_REGULATOR_MT6323_H enum { MT6323_ID_VPROC = 0, MT6323_ID_VSYS, MT6323_ID_VPA, MT6323_ID_VTCXO, MT6323_ID_VCN28, MT6323_ID_VCN33_BT, MT6323_ID_VCN33_WIFI, MT6323_ID_VA, MT6323_ID_VCAMA, MT6323_ID_VIO28 = 9, MT6323_ID_VUSB, MT6323_ID_VMC, MT6323_ID_VMCH, MT6323_ID_VEMC3V3, MT6323_ID_VGP1, MT6323_ID_VGP2, MT6323_ID_VGP3, MT6323_ID_VCN18, MT6323_ID_VSIM1, MT6323_ID_VSIM2, MT6323_ID_VRTC, MT6323_ID_VCAMAF, MT6323_ID_VIBR, MT6323_ID_VRF18, MT6323_ID_VM, MT6323_ID_VIO18, MT6323_ID_VCAMD, MT6323_ID_VCAMIO, MT6323_ID_RG_MAX, }; #define MT6323_MAX_REGULATOR MT6323_ID_RG_MAX #endif /* __LINUX_REGULATOR_MT6323_H */ PK ! ?� � regulator/max8973-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * max8973-regulator.h -- MAXIM 8973 regulator * * Interface for regulator driver for MAXIM 8973 DC-DC step-down * switching regulator. * * Copyright (C) 2012 NVIDIA Corporation * Author: Laxman Dewangan <ldewangan@nvidia.com> */ #ifndef __LINUX_REGULATOR_MAX8973_H #define __LINUX_REGULATOR_MAX8973_H /* * Control flags for configuration of the device. * Client need to pass this information with ORed */ #define MAX8973_CONTROL_REMOTE_SENSE_ENABLE 0x00000001 #define MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE 0x00000002 #define MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE 0x00000004 #define MAX8973_CONTROL_BIAS_ENABLE 0x00000008 #define MAX8973_CONTROL_PULL_DOWN_ENABLE 0x00000010 #define MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE 0x00000020 #define MAX8973_CONTROL_CLKADV_TRIP_DISABLED 0x00000000 #define MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US 0x00010000 #define MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US 0x00020000 #define MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US_HIST_DIS 0x00030000 #define MAX8973_CONTROL_INDUCTOR_VALUE_NOMINAL 0x00000000 #define MAX8973_CONTROL_INDUCTOR_VALUE_MINUS_30_PER 0x00100000 #define MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_30_PER 0x00200000 #define MAX8973_CONTROL_INDUCTOR_VALUE_PLUS_60_PER 0x00300000 /* * struct max8973_regulator_platform_data - max8973 regulator platform data. * * @reg_init_data: The regulator init data. * @control_flags: Control flags which are ORed value of above flags to * configure device. * @junction_temp_warning: Junction temp in millicelcius on which warning need * to be set. Thermal functionality is only supported on * MAX77621. The threshold warning supported by MAX77621 * are 120C and 140C. * @enable_ext_control: Enable the voltage enable/disable through external * control signal from EN input pin. If it is false then * voltage output will be enabled/disabled through EN bit of * device register. * @enable_gpio: Enable GPIO. If EN pin is controlled through GPIO from host * then GPIO number can be provided. If no GPIO controlled then * it should be -1. * @dvs_gpio: GPIO for dvs. It should be -1 if this is tied with fixed logic. * @dvs_def_state: Default state of dvs. 1 if it is high else 0. */ struct max8973_regulator_platform_data { struct regulator_init_data *reg_init_data; unsigned long control_flags; unsigned long junction_temp_warning; bool enable_ext_control; int enable_gpio; int dvs_gpio; unsigned dvs_def_state:1; }; #endif /* __LINUX_REGULATOR_MAX8973_H */ PK ! L��� � regulator/tps62360.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * tps62360.h -- TI tps62360 * * Interface for regulator driver for TI TPS62360 Processor core supply * * Copyright (C) 2012 NVIDIA Corporation * Author: Laxman Dewangan <ldewangan@nvidia.com> */ #ifndef __LINUX_REGULATOR_TPS62360_H #define __LINUX_REGULATOR_TPS62360_H /* * struct tps62360_regulator_platform_data - tps62360 regulator platform data. * * @reg_init_data: The regulator init data. * @en_discharge: Enable discharge the output capacitor via internal * register. * @en_internal_pulldn: internal pull down enable or not. * @vsel0_gpio: Gpio number for vsel0. It should be -1 if this is tied with * fixed logic. * @vsel1_gpio: Gpio number for vsel1. It should be -1 if this is tied with * fixed logic. * @vsel0_def_state: Default state of vsel0. 1 if it is high else 0. * @vsel1_def_state: Default state of vsel1. 1 if it is high else 0. */ struct tps62360_regulator_platform_data { struct regulator_init_data *reg_init_data; bool en_discharge; bool en_internal_pulldn; int vsel0_gpio; int vsel1_gpio; int vsel0_def_state; int vsel1_def_state; }; #endif /* __LINUX_REGULATOR_TPS62360_H */ PK ! �ĥ�_ _ regulator/of_regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * OpenFirmware regulator support routines * */ #ifndef __LINUX_OF_REG_H #define __LINUX_OF_REG_H struct regulator_desc; struct of_regulator_match { const char *name; void *driver_data; struct regulator_init_data *init_data; struct device_node *of_node; const struct regulator_desc *desc; }; #if defined(CONFIG_OF) extern struct regulator_init_data *of_get_regulator_init_data(struct device *dev, struct device_node *node, const struct regulator_desc *desc); extern int of_regulator_match(struct device *dev, struct device_node *node, struct of_regulator_match *matches, unsigned int num_matches); #else static inline struct regulator_init_data *of_get_regulator_init_data(struct device *dev, struct device_node *node, const struct regulator_desc *desc) { return NULL; } static inline int of_regulator_match(struct device *dev, struct device_node *node, struct of_regulator_match *matches, unsigned int num_matches) { return 0; } #endif /* CONFIG_OF */ #endif /* __LINUX_OF_REG_H */ PK ! �25t� � regulator/mt6380-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017 MediaTek Inc. * Author: Chenglin Xu <chenglin.xu@mediatek.com> */ #ifndef __LINUX_REGULATOR_mt6380_H #define __LINUX_REGULATOR_mt6380_H enum { MT6380_ID_VCPU = 0, MT6380_ID_VCORE, MT6380_ID_VRF, MT6380_ID_VMLDO, MT6380_ID_VALDO, MT6380_ID_VPHYLDO, MT6380_ID_VDDRLDO, MT6380_ID_VTLDO, MT6380_ID_RG_MAX, }; #define MT6380_MAX_REGULATOR MT6380_ID_RG_MAX #endif /* __LINUX_REGULATOR_mt6380_H */ PK ! {�w� � regulator/coupler.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * coupler.h -- SoC Regulator support, coupler API. * * Regulator Coupler Interface. */ #ifndef __LINUX_REGULATOR_COUPLER_H_ #define __LINUX_REGULATOR_COUPLER_H_ #include <linux/kernel.h> #include <linux/suspend.h> struct regulator_coupler; struct regulator_dev; /** * struct regulator_coupler - customized regulator's coupler * * Regulator's coupler allows to customize coupling algorithm. * * @list: couplers list entry * @attach_regulator: Callback invoked on creation of a coupled regulator, * couples are unresolved at this point. The callee should * check that it could handle the regulator and return 0 on * success, -errno on failure and 1 if given regulator is * not suitable for this coupler (case of having multiple * regulators in a system). Callback shall be implemented. * @detach_regulator: Callback invoked on destruction of a coupled regulator. * This callback is optional and could be NULL. * @balance_voltage: Callback invoked when voltage of a coupled regulator is * changing. Called with all of the coupled rdev's being held * under "consumer lock". The callee should perform voltage * balancing, changing voltage of the coupled regulators as * needed. It's up to the coupler to verify the voltage * before changing it in hardware, i.e. coupler should * check consumer's min/max and etc. This callback is * optional and could be NULL, in which case a generic * voltage balancer will be used. */ struct regulator_coupler { struct list_head list; int (*attach_regulator)(struct regulator_coupler *coupler, struct regulator_dev *rdev); int (*detach_regulator)(struct regulator_coupler *coupler, struct regulator_dev *rdev); int (*balance_voltage)(struct regulator_coupler *coupler, struct regulator_dev *rdev, suspend_state_t state); }; #ifdef CONFIG_REGULATOR int regulator_coupler_register(struct regulator_coupler *coupler); int regulator_check_consumers(struct regulator_dev *rdev, int *min_uV, int *max_uV, suspend_state_t state); int regulator_check_voltage(struct regulator_dev *rdev, int *min_uV, int *max_uV); int regulator_get_voltage_rdev(struct regulator_dev *rdev); int regulator_set_voltage_rdev(struct regulator_dev *rdev, int min_uV, int max_uV, suspend_state_t state); int regulator_do_balance_voltage(struct regulator_dev *rdev, suspend_state_t state, bool skip_coupled); #else static inline int regulator_coupler_register(struct regulator_coupler *coupler) { return 0; } static inline int regulator_check_consumers(struct regulator_dev *rdev, int *min_uV, int *max_uV, suspend_state_t state) { return -EINVAL; } static inline int regulator_check_voltage(struct regulator_dev *rdev, int *min_uV, int *max_uV) { return -EINVAL; } static inline int regulator_get_voltage_rdev(struct regulator_dev *rdev) { return -EINVAL; } static inline int regulator_set_voltage_rdev(struct regulator_dev *rdev, int min_uV, int max_uV, suspend_state_t state) { return -EINVAL; } static inline int regulator_do_balance_voltage(struct regulator_dev *rdev, suspend_state_t state, bool skip_coupled) { return -EINVAL; } #endif #endif PK ! �(�� � regulator/max8952.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * max8952.h - Voltage regulation for the Maxim 8952 * * Copyright (C) 2010 Samsung Electrnoics * MyungJoo Ham <myungjoo.ham@samsung.com> */ #ifndef REGULATOR_MAX8952 #define REGULATOR_MAX8952 #include <linux/regulator/machine.h> enum { MAX8952_DVS_MODE0, MAX8952_DVS_MODE1, MAX8952_DVS_MODE2, MAX8952_DVS_MODE3, }; enum { MAX8952_DVS_770mV = 0, MAX8952_DVS_780mV, MAX8952_DVS_790mV, MAX8952_DVS_800mV, MAX8952_DVS_810mV, MAX8952_DVS_820mV, MAX8952_DVS_830mV, MAX8952_DVS_840mV, MAX8952_DVS_850mV, MAX8952_DVS_860mV, MAX8952_DVS_870mV, MAX8952_DVS_880mV, MAX8952_DVS_890mV, MAX8952_DVS_900mV, MAX8952_DVS_910mV, MAX8952_DVS_920mV, MAX8952_DVS_930mV, MAX8952_DVS_940mV, MAX8952_DVS_950mV, MAX8952_DVS_960mV, MAX8952_DVS_970mV, MAX8952_DVS_980mV, MAX8952_DVS_990mV, MAX8952_DVS_1000mV, MAX8952_DVS_1010mV, MAX8952_DVS_1020mV, MAX8952_DVS_1030mV, MAX8952_DVS_1040mV, MAX8952_DVS_1050mV, MAX8952_DVS_1060mV, MAX8952_DVS_1070mV, MAX8952_DVS_1080mV, MAX8952_DVS_1090mV, MAX8952_DVS_1100mV, MAX8952_DVS_1110mV, MAX8952_DVS_1120mV, MAX8952_DVS_1130mV, MAX8952_DVS_1140mV, MAX8952_DVS_1150mV, MAX8952_DVS_1160mV, MAX8952_DVS_1170mV, MAX8952_DVS_1180mV, MAX8952_DVS_1190mV, MAX8952_DVS_1200mV, MAX8952_DVS_1210mV, MAX8952_DVS_1220mV, MAX8952_DVS_1230mV, MAX8952_DVS_1240mV, MAX8952_DVS_1250mV, MAX8952_DVS_1260mV, MAX8952_DVS_1270mV, MAX8952_DVS_1280mV, MAX8952_DVS_1290mV, MAX8952_DVS_1300mV, MAX8952_DVS_1310mV, MAX8952_DVS_1320mV, MAX8952_DVS_1330mV, MAX8952_DVS_1340mV, MAX8952_DVS_1350mV, MAX8952_DVS_1360mV, MAX8952_DVS_1370mV, MAX8952_DVS_1380mV, MAX8952_DVS_1390mV, MAX8952_DVS_1400mV, }; enum { MAX8952_SYNC_FREQ_26MHZ, /* Default */ MAX8952_SYNC_FREQ_13MHZ, MAX8952_SYNC_FREQ_19_2MHZ, }; enum { MAX8952_RAMP_32mV_us = 0, /* Default */ MAX8952_RAMP_16mV_us, MAX8952_RAMP_8mV_us, MAX8952_RAMP_4mV_us, MAX8952_RAMP_2mV_us, MAX8952_RAMP_1mV_us, MAX8952_RAMP_0_5mV_us, MAX8952_RAMP_0_25mV_us, }; #define MAX8952_NUM_DVS_MODE 4 struct max8952_platform_data { u32 default_mode; u32 dvs_mode[MAX8952_NUM_DVS_MODE]; /* MAX8952_DVS_MODEx_XXXXmV */ u32 sync_freq; u32 ramp_speed; struct regulator_init_data *reg_data; }; #endif /* REGULATOR_MAX8952 */ PK ! QɎ� � regulator/mt6311.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015 MediaTek Inc. * Author: Henry Chen <henryc.chen@mediatek.com> */ #ifndef __LINUX_REGULATOR_MT6311_H #define __LINUX_REGULATOR_MT6311_H #define MT6311_MAX_REGULATORS 2 enum { MT6311_ID_VDVFS = 0, MT6311_ID_VBIASN, }; #define MT6311_E1_CID_CODE 0x10 #define MT6311_E2_CID_CODE 0x20 #define MT6311_E3_CID_CODE 0x30 #endif /* __LINUX_REGULATOR_MT6311_H */ PK ! �t(ϊ � regulator/mt6359-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2021 MediaTek Inc. */ #ifndef __LINUX_REGULATOR_MT6359_H #define __LINUX_REGULATOR_MT6359_H enum { MT6359_ID_VS1 = 0, MT6359_ID_VGPU11, MT6359_ID_VMODEM, MT6359_ID_VPU, MT6359_ID_VCORE, MT6359_ID_VS2, MT6359_ID_VPA, MT6359_ID_VPROC2, MT6359_ID_VPROC1, MT6359_ID_VCORE_SSHUB, MT6359_ID_VGPU11_SSHUB = MT6359_ID_VCORE_SSHUB, MT6359_ID_VAUD18 = 10, MT6359_ID_VSIM1, MT6359_ID_VIBR, MT6359_ID_VRF12, MT6359_ID_VUSB, MT6359_ID_VSRAM_PROC2, MT6359_ID_VIO18, MT6359_ID_VCAMIO, MT6359_ID_VCN18, MT6359_ID_VFE28, MT6359_ID_VCN13, MT6359_ID_VCN33_1_BT, MT6359_ID_VCN33_1_WIFI, MT6359_ID_VAUX18, MT6359_ID_VSRAM_OTHERS, MT6359_ID_VEFUSE, MT6359_ID_VXO22, MT6359_ID_VRFCK, MT6359_ID_VBIF28, MT6359_ID_VIO28, MT6359_ID_VEMC, MT6359_ID_VCN33_2_BT, MT6359_ID_VCN33_2_WIFI, MT6359_ID_VA12, MT6359_ID_VA09, MT6359_ID_VRF18, MT6359_ID_VSRAM_MD, MT6359_ID_VUFS, MT6359_ID_VM18, MT6359_ID_VBBCK, MT6359_ID_VSRAM_PROC1, MT6359_ID_VSIM2, MT6359_ID_VSRAM_OTHERS_SSHUB, MT6359_ID_RG_MAX, }; #define MT6359_MAX_REGULATOR MT6359_ID_RG_MAX #endif /* __LINUX_REGULATOR_MT6359_H */ PK ! inJ�� � regulator/max8660.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * max8660.h -- Voltage regulation for the Maxim 8660/8661 * * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K. */ #ifndef __LINUX_REGULATOR_MAX8660_H #define __LINUX_REGULATOR_MAX8660_H #include <linux/regulator/machine.h> enum { MAX8660_V3, MAX8660_V4, MAX8660_V5, MAX8660_V6, MAX8660_V7, MAX8660_V_END, }; /** * max8660_subdev_data - regulator subdev data * @id: regulator id * @name: regulator name * @platform_data: regulator init data */ struct max8660_subdev_data { int id; const char *name; struct regulator_init_data *platform_data; }; /** * max8660_platform_data - platform data for max8660 * @num_subdevs: number of regulators used * @subdevs: pointer to regulators used * @en34_is_high: if EN34 is driven high, regulators cannot be en-/disabled. */ struct max8660_platform_data { int num_subdevs; struct max8660_subdev_data *subdevs; unsigned en34_is_high:1; }; #endif PK ! d* �[ [ regulator/arizona-micsupp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for Arizona micsupp regulator * * Copyright 2017 Cirrus Logic */ #ifndef ARIZONA_MICSUPP_H #define ARIZONA_MICSUPP_H struct regulator_init_data; struct arizona_micsupp_pdata { /** Regulator configuration for micsupp */ const struct regulator_init_data *init_data; }; #endif PK ! :���z z regulator/pfuze100.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. */ #ifndef __LINUX_REG_PFUZE100_H #define __LINUX_REG_PFUZE100_H #define PFUZE100_SW1AB 0 #define PFUZE100_SW1C 1 #define PFUZE100_SW2 2 #define PFUZE100_SW3A 3 #define PFUZE100_SW3B 4 #define PFUZE100_SW4 5 #define PFUZE100_SWBST 6 #define PFUZE100_VSNVS 7 #define PFUZE100_VREFDDR 8 #define PFUZE100_VGEN1 9 #define PFUZE100_VGEN2 10 #define PFUZE100_VGEN3 11 #define PFUZE100_VGEN4 12 #define PFUZE100_VGEN5 13 #define PFUZE100_VGEN6 14 #define PFUZE100_COIN 15 #define PFUZE100_MAX_REGULATOR 16 #define PFUZE200_SW1AB 0 #define PFUZE200_SW2 1 #define PFUZE200_SW3A 2 #define PFUZE200_SW3B 3 #define PFUZE200_SWBST 4 #define PFUZE200_VSNVS 5 #define PFUZE200_VREFDDR 6 #define PFUZE200_VGEN1 7 #define PFUZE200_VGEN2 8 #define PFUZE200_VGEN3 9 #define PFUZE200_VGEN4 10 #define PFUZE200_VGEN5 11 #define PFUZE200_VGEN6 12 #define PFUZE200_COIN 13 #define PFUZE3000_SW1A 0 #define PFUZE3000_SW1B 1 #define PFUZE3000_SW2 2 #define PFUZE3000_SW3 3 #define PFUZE3000_SWBST 4 #define PFUZE3000_VSNVS 5 #define PFUZE3000_VREFDDR 6 #define PFUZE3000_VLDO1 7 #define PFUZE3000_VLDO2 8 #define PFUZE3000_VCCSD 9 #define PFUZE3000_V33 10 #define PFUZE3000_VLDO3 11 #define PFUZE3000_VLDO4 12 #define PFUZE3001_SW1 0 #define PFUZE3001_SW2 1 #define PFUZE3001_SW3 2 #define PFUZE3001_VSNVS 3 #define PFUZE3001_VLDO1 4 #define PFUZE3001_VLDO2 5 #define PFUZE3001_VCCSD 6 #define PFUZE3001_V33 7 #define PFUZE3001_VLDO3 8 #define PFUZE3001_VLDO4 9 #endif /* __LINUX_REG_PFUZE100_H */ PK ! � �N� � regulator/gpio-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * gpio-regulator.h * * Copyright 2011 Heiko Stuebner <heiko@sntech.de> * * based on fixed.h * * Copyright 2008 Wolfson Microelectronics PLC. * * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> * * Copyright (c) 2009 Nokia Corporation * Roger Quadros <ext-roger.quadros@nokia.com> */ #ifndef __REGULATOR_GPIO_H #define __REGULATOR_GPIO_H #include <linux/gpio/consumer.h> struct regulator_init_data; enum regulator_type; /** * struct gpio_regulator_state - state description * @value: microvolts or microamps * @gpios: bitfield of gpio target-states for the value * * This structure describes a supported setting of the regulator * and the necessary gpio-state to achieve it. * * The n-th bit in the bitfield describes the state of the n-th GPIO * from the gpios-array defined in gpio_regulator_config below. */ struct gpio_regulator_state { int value; int gpios; }; /** * struct gpio_regulator_config - config structure * @supply_name: Name of the regulator supply * @input_supply: Name of the input regulator supply * @enabled_at_boot: Whether regulator has been enabled at * boot or not. 1 = Yes, 0 = No * This is used to keep the regulator at * the default state * @startup_delay: Start-up time in microseconds * @gflags: Array of GPIO configuration flags for initial * states * @ngpios: Number of GPIOs and configurations available * @states: Array of gpio_regulator_state entries describing * the gpio state for specific voltages * @nr_states: Number of states available * @regulator_type: either REGULATOR_CURRENT or REGULATOR_VOLTAGE * @init_data: regulator_init_data * * This structure contains gpio-voltage regulator configuration * information that must be passed by platform code to the * gpio-voltage regulator driver. */ struct gpio_regulator_config { const char *supply_name; const char *input_supply; unsigned enabled_at_boot:1; unsigned startup_delay; enum gpiod_flags *gflags; int ngpios; struct gpio_regulator_state *states; int nr_states; enum regulator_type type; struct regulator_init_data *init_data; }; #endif PK ! ���L L regulator/arizona-ldo1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for Arizona LDO1 regulator * * Copyright 2017 Cirrus Logic */ #ifndef ARIZONA_LDO1_H #define ARIZONA_LDO1_H struct regulator_init_data; struct arizona_ldo1_pdata { /** Regulator configuration for LDO1 */ const struct regulator_init_data *init_data; }; #endif PK ! \_�C( ( regulator/mt6397-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2014 MediaTek Inc. * Author: Flora Fu <flora.fu@mediatek.com> */ #ifndef __LINUX_REGULATOR_MT6397_H #define __LINUX_REGULATOR_MT6397_H enum { MT6397_ID_VPCA15 = 0, MT6397_ID_VPCA7, MT6397_ID_VSRAMCA15, MT6397_ID_VSRAMCA7, MT6397_ID_VCORE, MT6397_ID_VGPU, MT6397_ID_VDRM, MT6397_ID_VIO18 = 7, MT6397_ID_VTCXO, MT6397_ID_VA28, MT6397_ID_VCAMA, MT6397_ID_VIO28, MT6397_ID_VUSB, MT6397_ID_VMC, MT6397_ID_VMCH, MT6397_ID_VEMC3V3, MT6397_ID_VGP1, MT6397_ID_VGP2, MT6397_ID_VGP3, MT6397_ID_VGP4, MT6397_ID_VGP5, MT6397_ID_VGP6, MT6397_ID_VIBR, MT6397_ID_RG_MAX, }; #define MT6397_MAX_REGULATOR MT6397_ID_RG_MAX #define MT6397_REGULATOR_ID97 0x97 #define MT6397_REGULATOR_ID91 0x91 #endif /* __LINUX_REGULATOR_MT6397_H */ PK ! �D�<N N regulator/consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * consumer.h -- SoC Regulator consumer support. * * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC. * * Author: Liam Girdwood <lrg@slimlogic.co.uk> * * Regulator Consumer Interface. * * A Power Management Regulator framework for SoC based devices. * Features:- * o Voltage and current level control. * o Operating mode control. * o Regulator status. * o sysfs entries for showing client devices and status * * EXPERIMENTAL FEATURES: * Dynamic Regulator operating Mode Switching (DRMS) - allows regulators * to use most efficient operating mode depending upon voltage and load and * is transparent to client drivers. * * e.g. Devices x,y,z share regulator r. Device x and y draw 20mA each during * IO and 1mA at idle. Device z draws 100mA when under load and 5mA when * idling. Regulator r has > 90% efficiency in NORMAL mode at loads > 100mA * but this drops rapidly to 60% when below 100mA. Regulator r has > 90% * efficiency in IDLE mode at loads < 10mA. Thus regulator r will operate * in normal mode for loads > 10mA and in IDLE mode for load <= 10mA. */ #ifndef __LINUX_REGULATOR_CONSUMER_H_ #define __LINUX_REGULATOR_CONSUMER_H_ #include <linux/err.h> #include <linux/suspend.h> struct device; struct notifier_block; struct regmap; struct regulator_dev; /* * Regulator operating modes. * * Regulators can run in a variety of different operating modes depending on * output load. This allows further system power savings by selecting the * best (and most efficient) regulator mode for a desired load. * * Most drivers will only care about NORMAL. The modes below are generic and * will probably not match the naming convention of your regulator data sheet * but should match the use cases in the datasheet. * * In order of power efficiency (least efficient at top). * * Mode Description * FAST Regulator can handle fast changes in it's load. * e.g. useful in CPU voltage & frequency scaling where * load can quickly increase with CPU frequency increases. * * NORMAL Normal regulator power supply mode. Most drivers will * use this mode. * * IDLE Regulator runs in a more efficient mode for light * loads. Can be used for devices that have a low power * requirement during periods of inactivity. This mode * may be more noisy than NORMAL and may not be able * to handle fast load switching. * * STANDBY Regulator runs in the most efficient mode for very * light loads. Can be used by devices when they are * in a sleep/standby state. This mode is likely to be * the most noisy and may not be able to handle fast load * switching. * * NOTE: Most regulators will only support a subset of these modes. Some * will only just support NORMAL. * * These modes can be OR'ed together to make up a mask of valid register modes. */ #define REGULATOR_MODE_INVALID 0x0 #define REGULATOR_MODE_FAST 0x1 #define REGULATOR_MODE_NORMAL 0x2 #define REGULATOR_MODE_IDLE 0x4 #define REGULATOR_MODE_STANDBY 0x8 /* * Regulator notifier events. * * UNDER_VOLTAGE Regulator output is under voltage. * OVER_CURRENT Regulator output current is too high. * REGULATION_OUT Regulator output is out of regulation. * FAIL Regulator output has failed. * OVER_TEMP Regulator over temp. * FORCE_DISABLE Regulator forcibly shut down by software. * VOLTAGE_CHANGE Regulator voltage changed. * Data passed is old voltage cast to (void *). * DISABLE Regulator was disabled. * PRE_VOLTAGE_CHANGE Regulator is about to have voltage changed. * Data passed is "struct pre_voltage_change_data" * ABORT_VOLTAGE_CHANGE Regulator voltage change failed for some reason. * Data passed is old voltage cast to (void *). * PRE_DISABLE Regulator is about to be disabled * ABORT_DISABLE Regulator disable failed for some reason * * NOTE: These events can be OR'ed together when passed into handler. */ #define REGULATOR_EVENT_UNDER_VOLTAGE 0x01 #define REGULATOR_EVENT_OVER_CURRENT 0x02 #define REGULATOR_EVENT_REGULATION_OUT 0x04 #define REGULATOR_EVENT_FAIL 0x08 #define REGULATOR_EVENT_OVER_TEMP 0x10 #define REGULATOR_EVENT_FORCE_DISABLE 0x20 #define REGULATOR_EVENT_VOLTAGE_CHANGE 0x40 #define REGULATOR_EVENT_DISABLE 0x80 #define REGULATOR_EVENT_PRE_VOLTAGE_CHANGE 0x100 #define REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE 0x200 #define REGULATOR_EVENT_PRE_DISABLE 0x400 #define REGULATOR_EVENT_ABORT_DISABLE 0x800 #define REGULATOR_EVENT_ENABLE 0x1000 /* * Following notifications should be emitted only if detected condition * is such that the HW is likely to still be working but consumers should * take a recovery action to prevent problems esacalating into errors. */ #define REGULATOR_EVENT_UNDER_VOLTAGE_WARN 0x2000 #define REGULATOR_EVENT_OVER_CURRENT_WARN 0x4000 #define REGULATOR_EVENT_OVER_VOLTAGE_WARN 0x8000 #define REGULATOR_EVENT_OVER_TEMP_WARN 0x10000 #define REGULATOR_EVENT_WARN_MASK 0x1E000 /* * Regulator errors that can be queried using regulator_get_error_flags * * UNDER_VOLTAGE Regulator output is under voltage. * OVER_CURRENT Regulator output current is too high. * REGULATION_OUT Regulator output is out of regulation. * FAIL Regulator output has failed. * OVER_TEMP Regulator over temp. * * NOTE: These errors can be OR'ed together. */ #define REGULATOR_ERROR_UNDER_VOLTAGE BIT(1) #define REGULATOR_ERROR_OVER_CURRENT BIT(2) #define REGULATOR_ERROR_REGULATION_OUT BIT(3) #define REGULATOR_ERROR_FAIL BIT(4) #define REGULATOR_ERROR_OVER_TEMP BIT(5) #define REGULATOR_ERROR_UNDER_VOLTAGE_WARN BIT(6) #define REGULATOR_ERROR_OVER_CURRENT_WARN BIT(7) #define REGULATOR_ERROR_OVER_VOLTAGE_WARN BIT(8) #define REGULATOR_ERROR_OVER_TEMP_WARN BIT(9) /** * struct pre_voltage_change_data - Data sent with PRE_VOLTAGE_CHANGE event * * @old_uV: Current voltage before change. * @min_uV: Min voltage we'll change to. * @max_uV: Max voltage we'll change to. */ struct pre_voltage_change_data { unsigned long old_uV; unsigned long min_uV; unsigned long max_uV; }; struct regulator; /** * struct regulator_bulk_data - Data used for bulk regulator operations. * * @supply: The name of the supply. Initialised by the user before * using the bulk regulator APIs. * @consumer: The regulator consumer for the supply. This will be managed * by the bulk API. * * The regulator APIs provide a series of regulator_bulk_() API calls as * a convenience to consumers which require multiple supplies. This * structure is used to manage data for these calls. */ struct regulator_bulk_data { const char *supply; struct regulator *consumer; /* private: Internal use */ int ret; }; #if defined(CONFIG_REGULATOR) /* regulator get and put */ struct regulator *__must_check regulator_get(struct device *dev, const char *id); struct regulator *__must_check devm_regulator_get(struct device *dev, const char *id); struct regulator *__must_check regulator_get_exclusive(struct device *dev, const char *id); struct regulator *__must_check devm_regulator_get_exclusive(struct device *dev, const char *id); struct regulator *__must_check regulator_get_optional(struct device *dev, const char *id); struct regulator *__must_check devm_regulator_get_optional(struct device *dev, const char *id); void regulator_put(struct regulator *regulator); void devm_regulator_put(struct regulator *regulator); int regulator_register_supply_alias(struct device *dev, const char *id, struct device *alias_dev, const char *alias_id); void regulator_unregister_supply_alias(struct device *dev, const char *id); int regulator_bulk_register_supply_alias(struct device *dev, const char *const *id, struct device *alias_dev, const char *const *alias_id, int num_id); void regulator_bulk_unregister_supply_alias(struct device *dev, const char * const *id, int num_id); int devm_regulator_register_supply_alias(struct device *dev, const char *id, struct device *alias_dev, const char *alias_id); int devm_regulator_bulk_register_supply_alias(struct device *dev, const char *const *id, struct device *alias_dev, const char *const *alias_id, int num_id); /* regulator output control and status */ int __must_check regulator_enable(struct regulator *regulator); int regulator_disable(struct regulator *regulator); int regulator_force_disable(struct regulator *regulator); int regulator_is_enabled(struct regulator *regulator); int regulator_disable_deferred(struct regulator *regulator, int ms); int __must_check regulator_bulk_get(struct device *dev, int num_consumers, struct regulator_bulk_data *consumers); int __must_check devm_regulator_bulk_get(struct device *dev, int num_consumers, struct regulator_bulk_data *consumers); int __must_check regulator_bulk_enable(int num_consumers, struct regulator_bulk_data *consumers); int regulator_bulk_disable(int num_consumers, struct regulator_bulk_data *consumers); int regulator_bulk_force_disable(int num_consumers, struct regulator_bulk_data *consumers); void regulator_bulk_free(int num_consumers, struct regulator_bulk_data *consumers); int regulator_count_voltages(struct regulator *regulator); int regulator_list_voltage(struct regulator *regulator, unsigned selector); int regulator_is_supported_voltage(struct regulator *regulator, int min_uV, int max_uV); unsigned int regulator_get_linear_step(struct regulator *regulator); int regulator_set_voltage(struct regulator *regulator, int min_uV, int max_uV); int regulator_set_voltage_time(struct regulator *regulator, int old_uV, int new_uV); int regulator_get_voltage(struct regulator *regulator); int regulator_sync_voltage(struct regulator *regulator); int regulator_set_current_limit(struct regulator *regulator, int min_uA, int max_uA); int regulator_get_current_limit(struct regulator *regulator); int regulator_set_mode(struct regulator *regulator, unsigned int mode); unsigned int regulator_get_mode(struct regulator *regulator); int regulator_get_error_flags(struct regulator *regulator, unsigned int *flags); int regulator_set_load(struct regulator *regulator, int load_uA); int regulator_allow_bypass(struct regulator *regulator, bool allow); struct regmap *regulator_get_regmap(struct regulator *regulator); int regulator_get_hardware_vsel_register(struct regulator *regulator, unsigned *vsel_reg, unsigned *vsel_mask); int regulator_list_hardware_vsel(struct regulator *regulator, unsigned selector); /* regulator notifier block */ int regulator_register_notifier(struct regulator *regulator, struct notifier_block *nb); int devm_regulator_register_notifier(struct regulator *regulator, struct notifier_block *nb); int regulator_unregister_notifier(struct regulator *regulator, struct notifier_block *nb); void devm_regulator_unregister_notifier(struct regulator *regulator, struct notifier_block *nb); /* regulator suspend */ int regulator_suspend_enable(struct regulator_dev *rdev, suspend_state_t state); int regulator_suspend_disable(struct regulator_dev *rdev, suspend_state_t state); int regulator_set_suspend_voltage(struct regulator *regulator, int min_uV, int max_uV, suspend_state_t state); /* driver data - core doesn't touch */ void *regulator_get_drvdata(struct regulator *regulator); void regulator_set_drvdata(struct regulator *regulator, void *data); /* misc helpers */ void regulator_bulk_set_supply_names(struct regulator_bulk_data *consumers, const char *const *supply_names, unsigned int num_supplies); bool regulator_is_equal(struct regulator *reg1, struct regulator *reg2); #else /* * Make sure client drivers will still build on systems with no software * controllable voltage or current regulators. */ static inline struct regulator *__must_check regulator_get(struct device *dev, const char *id) { /* Nothing except the stubbed out regulator API should be * looking at the value except to check if it is an error * value. Drivers are free to handle NULL specifically by * skipping all regulator API calls, but they don't have to. * Drivers which don't, should make sure they properly handle * corner cases of the API, such as regulator_get_voltage() * returning 0. */ return NULL; } static inline struct regulator *__must_check devm_regulator_get(struct device *dev, const char *id) { return NULL; } static inline struct regulator *__must_check regulator_get_exclusive(struct device *dev, const char *id) { return ERR_PTR(-ENODEV); } static inline struct regulator *__must_check devm_regulator_get_exclusive(struct device *dev, const char *id) { return ERR_PTR(-ENODEV); } static inline struct regulator *__must_check regulator_get_optional(struct device *dev, const char *id) { return ERR_PTR(-ENODEV); } static inline struct regulator *__must_check devm_regulator_get_optional(struct device *dev, const char *id) { return ERR_PTR(-ENODEV); } static inline void regulator_put(struct regulator *regulator) { } static inline void devm_regulator_put(struct regulator *regulator) { } static inline int regulator_register_supply_alias(struct device *dev, const char *id, struct device *alias_dev, const char *alias_id) { return 0; } static inline void regulator_unregister_supply_alias(struct device *dev, const char *id) { } static inline int regulator_bulk_register_supply_alias(struct device *dev, const char *const *id, struct device *alias_dev, const char * const *alias_id, int num_id) { return 0; } static inline void regulator_bulk_unregister_supply_alias(struct device *dev, const char * const *id, int num_id) { } static inline int devm_regulator_register_supply_alias(struct device *dev, const char *id, struct device *alias_dev, const char *alias_id) { return 0; } static inline int devm_regulator_bulk_register_supply_alias(struct device *dev, const char *const *id, struct device *alias_dev, const char *const *alias_id, int num_id) { return 0; } static inline int regulator_enable(struct regulator *regulator) { return 0; } static inline int regulator_disable(struct regulator *regulator) { return 0; } static inline int regulator_force_disable(struct regulator *regulator) { return 0; } static inline int regulator_disable_deferred(struct regulator *regulator, int ms) { return 0; } static inline int regulator_is_enabled(struct regulator *regulator) { return 1; } static inline int regulator_bulk_get(struct device *dev, int num_consumers, struct regulator_bulk_data *consumers) { return 0; } static inline int devm_regulator_bulk_get(struct device *dev, int num_consumers, struct regulator_bulk_data *consumers) { return 0; } static inline int regulator_bulk_enable(int num_consumers, struct regulator_bulk_data *consumers) { return 0; } static inline int regulator_bulk_disable(int num_consumers, struct regulator_bulk_data *consumers) { return 0; } static inline int regulator_bulk_force_disable(int num_consumers, struct regulator_bulk_data *consumers) { return 0; } static inline void regulator_bulk_free(int num_consumers, struct regulator_bulk_data *consumers) { } static inline int regulator_set_voltage(struct regulator *regulator, int min_uV, int max_uV) { return 0; } static inline int regulator_set_voltage_time(struct regulator *regulator, int old_uV, int new_uV) { return 0; } static inline int regulator_get_voltage(struct regulator *regulator) { return -EINVAL; } static inline int regulator_sync_voltage(struct regulator *regulator) { return -EINVAL; } static inline int regulator_is_supported_voltage(struct regulator *regulator, int min_uV, int max_uV) { return 0; } static inline unsigned int regulator_get_linear_step(struct regulator *regulator) { return 0; } static inline int regulator_set_current_limit(struct regulator *regulator, int min_uA, int max_uA) { return 0; } static inline int regulator_get_current_limit(struct regulator *regulator) { return 0; } static inline int regulator_set_mode(struct regulator *regulator, unsigned int mode) { return 0; } static inline unsigned int regulator_get_mode(struct regulator *regulator) { return REGULATOR_MODE_NORMAL; } static inline int regulator_get_error_flags(struct regulator *regulator, unsigned int *flags) { return -EINVAL; } static inline int regulator_set_load(struct regulator *regulator, int load_uA) { return 0; } static inline int regulator_allow_bypass(struct regulator *regulator, bool allow) { return 0; } static inline struct regmap *regulator_get_regmap(struct regulator *regulator) { return ERR_PTR(-EOPNOTSUPP); } static inline int regulator_get_hardware_vsel_register(struct regulator *regulator, unsigned *vsel_reg, unsigned *vsel_mask) { return -EOPNOTSUPP; } static inline int regulator_list_hardware_vsel(struct regulator *regulator, unsigned selector) { return -EOPNOTSUPP; } static inline int regulator_register_notifier(struct regulator *regulator, struct notifier_block *nb) { return 0; } static inline int devm_regulator_register_notifier(struct regulator *regulator, struct notifier_block *nb) { return 0; } static inline int regulator_unregister_notifier(struct regulator *regulator, struct notifier_block *nb) { return 0; } static inline int devm_regulator_unregister_notifier(struct regulator *regulator, struct notifier_block *nb) { return 0; } static inline int regulator_suspend_enable(struct regulator_dev *rdev, suspend_state_t state) { return -EINVAL; } static inline int regulator_suspend_disable(struct regulator_dev *rdev, suspend_state_t state) { return -EINVAL; } static inline int regulator_set_suspend_voltage(struct regulator *regulator, int min_uV, int max_uV, suspend_state_t state) { return -EINVAL; } static inline void *regulator_get_drvdata(struct regulator *regulator) { return NULL; } static inline void regulator_set_drvdata(struct regulator *regulator, void *data) { } static inline int regulator_count_voltages(struct regulator *regulator) { return 0; } static inline int regulator_list_voltage(struct regulator *regulator, unsigned selector) { return -EINVAL; } static inline void regulator_bulk_set_supply_names(struct regulator_bulk_data *consumers, const char *const *supply_names, unsigned int num_supplies) { } static inline bool regulator_is_equal(struct regulator *reg1, struct regulator *reg2) { return false; } #endif static inline int regulator_set_voltage_triplet(struct regulator *regulator, int min_uV, int target_uV, int max_uV) { if (regulator_set_voltage(regulator, target_uV, max_uV) == 0) return 0; return regulator_set_voltage(regulator, min_uV, max_uV); } static inline int regulator_set_voltage_tol(struct regulator *regulator, int new_uV, int tol_uV) { if (regulator_set_voltage(regulator, new_uV, new_uV + tol_uV) == 0) return 0; else return regulator_set_voltage(regulator, new_uV - tol_uV, new_uV + tol_uV); } static inline int regulator_is_supported_voltage_tol(struct regulator *regulator, int target_uV, int tol_uV) { return regulator_is_supported_voltage(regulator, target_uV - tol_uV, target_uV + tol_uV); } #endif PK ! �S>� regulator/mt6358-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2019 MediaTek Inc. */ #ifndef __LINUX_REGULATOR_MT6358_H #define __LINUX_REGULATOR_MT6358_H enum { MT6358_ID_VDRAM1 = 0, MT6358_ID_VCORE, MT6358_ID_VPA, MT6358_ID_VPROC11, MT6358_ID_VPROC12, MT6358_ID_VGPU, MT6358_ID_VS2, MT6358_ID_VMODEM, MT6358_ID_VS1, MT6358_ID_VDRAM2 = 9, MT6358_ID_VSIM1, MT6358_ID_VIBR, MT6358_ID_VRF12, MT6358_ID_VIO18, MT6358_ID_VUSB, MT6358_ID_VCAMIO, MT6358_ID_VCAMD, MT6358_ID_VCN18, MT6358_ID_VFE28, MT6358_ID_VSRAM_PROC11, MT6358_ID_VCN28, MT6358_ID_VSRAM_OTHERS, MT6358_ID_VSRAM_GPU, MT6358_ID_VXO22, MT6358_ID_VEFUSE, MT6358_ID_VAUX18, MT6358_ID_VMCH, MT6358_ID_VBIF28, MT6358_ID_VSRAM_PROC12, MT6358_ID_VCAMA1, MT6358_ID_VEMC, MT6358_ID_VIO28, MT6358_ID_VA12, MT6358_ID_VRF18, MT6358_ID_VCN33_BT, MT6358_ID_VCN33_WIFI, MT6358_ID_VCAMA2, MT6358_ID_VMC, MT6358_ID_VLDO28, MT6358_ID_VAUD28, MT6358_ID_VSIM2, MT6358_ID_RG_MAX, }; #define MT6358_MAX_REGULATOR MT6358_ID_RG_MAX #endif /* __LINUX_REGULATOR_MT6358_H */ PK ! {�ޗ7 7 regulator/pca9450.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Copyright 2020 NXP. */ #ifndef __LINUX_REG_PCA9450_H__ #define __LINUX_REG_PCA9450_H__ #include <linux/regmap.h> enum pca9450_chip_type { PCA9450_TYPE_PCA9450A = 0, PCA9450_TYPE_PCA9450BC, PCA9450_TYPE_AMOUNT, }; enum { PCA9450_BUCK1 = 0, PCA9450_BUCK2, PCA9450_BUCK3, PCA9450_BUCK4, PCA9450_BUCK5, PCA9450_BUCK6, PCA9450_LDO1, PCA9450_LDO2, PCA9450_LDO3, PCA9450_LDO4, PCA9450_LDO5, PCA9450_REGULATOR_CNT, }; enum { PCA9450_DVS_LEVEL_RUN = 0, PCA9450_DVS_LEVEL_STANDBY, PCA9450_DVS_LEVEL_MAX, }; #define PCA9450_BUCK1_VOLTAGE_NUM 0x80 #define PCA9450_BUCK2_VOLTAGE_NUM 0x80 #define PCA9450_BUCK3_VOLTAGE_NUM 0x80 #define PCA9450_BUCK4_VOLTAGE_NUM 0x80 #define PCA9450_BUCK5_VOLTAGE_NUM 0x80 #define PCA9450_BUCK6_VOLTAGE_NUM 0x80 #define PCA9450_LDO1_VOLTAGE_NUM 0x08 #define PCA9450_LDO2_VOLTAGE_NUM 0x08 #define PCA9450_LDO3_VOLTAGE_NUM 0x20 #define PCA9450_LDO4_VOLTAGE_NUM 0x20 #define PCA9450_LDO5_VOLTAGE_NUM 0x10 enum { PCA9450_REG_DEV_ID = 0x00, PCA9450_REG_INT1 = 0x01, PCA9450_REG_INT1_MSK = 0x02, PCA9450_REG_STATUS1 = 0x03, PCA9450_REG_STATUS2 = 0x04, PCA9450_REG_PWRON_STAT = 0x05, PCA9450_REG_SWRST = 0x06, PCA9450_REG_PWRCTRL = 0x07, PCA9450_REG_RESET_CTRL = 0x08, PCA9450_REG_CONFIG1 = 0x09, PCA9450_REG_CONFIG2 = 0x0A, PCA9450_REG_BUCK123_DVS = 0x0C, PCA9450_REG_BUCK1OUT_LIMIT = 0x0D, PCA9450_REG_BUCK2OUT_LIMIT = 0x0E, PCA9450_REG_BUCK3OUT_LIMIT = 0x0F, PCA9450_REG_BUCK1CTRL = 0x10, PCA9450_REG_BUCK1OUT_DVS0 = 0x11, PCA9450_REG_BUCK1OUT_DVS1 = 0x12, PCA9450_REG_BUCK2CTRL = 0x13, PCA9450_REG_BUCK2OUT_DVS0 = 0x14, PCA9450_REG_BUCK2OUT_DVS1 = 0x15, PCA9450_REG_BUCK3CTRL = 0x16, PCA9450_REG_BUCK3OUT_DVS0 = 0x17, PCA9450_REG_BUCK3OUT_DVS1 = 0x18, PCA9450_REG_BUCK4CTRL = 0x19, PCA9450_REG_BUCK4OUT = 0x1A, PCA9450_REG_BUCK5CTRL = 0x1B, PCA9450_REG_BUCK5OUT = 0x1C, PCA9450_REG_BUCK6CTRL = 0x1D, PCA9450_REG_BUCK6OUT = 0x1E, PCA9450_REG_LDO_AD_CTRL = 0x20, PCA9450_REG_LDO1CTRL = 0x21, PCA9450_REG_LDO2CTRL = 0x22, PCA9450_REG_LDO3CTRL = 0x23, PCA9450_REG_LDO4CTRL = 0x24, PCA9450_REG_LDO5CTRL_L = 0x25, PCA9450_REG_LDO5CTRL_H = 0x26, PCA9450_REG_LOADSW_CTRL = 0x2A, PCA9450_REG_VRFLT1_STS = 0x2B, PCA9450_REG_VRFLT2_STS = 0x2C, PCA9450_REG_VRFLT1_MASK = 0x2D, PCA9450_REG_VRFLT2_MASK = 0x2E, PCA9450_MAX_REGISTER = 0x2F, }; /* PCA9450 BUCK ENMODE bits */ #define BUCK_ENMODE_OFF 0x00 #define BUCK_ENMODE_ONREQ 0x01 #define BUCK_ENMODE_ONREQ_STBYREQ 0x02 #define BUCK_ENMODE_ON 0x03 /* PCA9450_REG_BUCK1_CTRL bits */ #define BUCK1_RAMP_MASK 0xC0 #define BUCK1_RAMP_25MV 0x0 #define BUCK1_RAMP_12P5MV 0x1 #define BUCK1_RAMP_6P25MV 0x2 #define BUCK1_RAMP_3P125MV 0x3 #define BUCK1_DVS_CTRL 0x10 #define BUCK1_AD 0x08 #define BUCK1_FPWM 0x04 #define BUCK1_ENMODE_MASK 0x03 /* PCA9450_REG_BUCK2_CTRL bits */ #define BUCK2_RAMP_MASK 0xC0 #define BUCK2_RAMP_25MV 0x0 #define BUCK2_RAMP_12P5MV 0x1 #define BUCK2_RAMP_6P25MV 0x2 #define BUCK2_RAMP_3P125MV 0x3 #define BUCK2_DVS_CTRL 0x10 #define BUCK2_AD 0x08 #define BUCK2_FPWM 0x04 #define BUCK2_ENMODE_MASK 0x03 /* PCA9450_REG_BUCK3_CTRL bits */ #define BUCK3_RAMP_MASK 0xC0 #define BUCK3_RAMP_25MV 0x0 #define BUCK3_RAMP_12P5MV 0x1 #define BUCK3_RAMP_6P25MV 0x2 #define BUCK3_RAMP_3P125MV 0x3 #define BUCK3_DVS_CTRL 0x10 #define BUCK3_AD 0x08 #define BUCK3_FPWM 0x04 #define BUCK3_ENMODE_MASK 0x03 /* PCA9450_REG_BUCK4_CTRL bits */ #define BUCK4_AD 0x08 #define BUCK4_FPWM 0x04 #define BUCK4_ENMODE_MASK 0x03 /* PCA9450_REG_BUCK5_CTRL bits */ #define BUCK5_AD 0x08 #define BUCK5_FPWM 0x04 #define BUCK5_ENMODE_MASK 0x03 /* PCA9450_REG_BUCK6_CTRL bits */ #define BUCK6_AD 0x08 #define BUCK6_FPWM 0x04 #define BUCK6_ENMODE_MASK 0x03 /* PCA9450_REG_BUCK123_PRESET_EN bit */ #define BUCK123_PRESET_EN 0x80 /* PCA9450_BUCK1OUT_DVS0 bits */ #define BUCK1OUT_DVS0_MASK 0x7F #define BUCK1OUT_DVS0_DEFAULT 0x14 /* PCA9450_BUCK1OUT_DVS1 bits */ #define BUCK1OUT_DVS1_MASK 0x7F #define BUCK1OUT_DVS1_DEFAULT 0x14 /* PCA9450_BUCK2OUT_DVS0 bits */ #define BUCK2OUT_DVS0_MASK 0x7F #define BUCK2OUT_DVS0_DEFAULT 0x14 /* PCA9450_BUCK2OUT_DVS1 bits */ #define BUCK2OUT_DVS1_MASK 0x7F #define BUCK2OUT_DVS1_DEFAULT 0x14 /* PCA9450_BUCK3OUT_DVS0 bits */ #define BUCK3OUT_DVS0_MASK 0x7F #define BUCK3OUT_DVS0_DEFAULT 0x14 /* PCA9450_BUCK3OUT_DVS1 bits */ #define BUCK3OUT_DVS1_MASK 0x7F #define BUCK3OUT_DVS1_DEFAULT 0x14 /* PCA9450_REG_BUCK4OUT bits */ #define BUCK4OUT_MASK 0x7F #define BUCK4OUT_DEFAULT 0x6C /* PCA9450_REG_BUCK5OUT bits */ #define BUCK5OUT_MASK 0x7F #define BUCK5OUT_DEFAULT 0x30 /* PCA9450_REG_BUCK6OUT bits */ #define BUCK6OUT_MASK 0x7F #define BUCK6OUT_DEFAULT 0x14 /* PCA9450_REG_LDO1_VOLT bits */ #define LDO1_EN_MASK 0xC0 #define LDO1OUT_MASK 0x07 /* PCA9450_REG_LDO2_VOLT bits */ #define LDO2_EN_MASK 0xC0 #define LDO2OUT_MASK 0x07 /* PCA9450_REG_LDO3_VOLT bits */ #define LDO3_EN_MASK 0xC0 #define LDO3OUT_MASK 0x1F /* PCA9450_REG_LDO4_VOLT bits */ #define LDO4_EN_MASK 0xC0 #define LDO4OUT_MASK 0x1F /* PCA9450_REG_LDO5_VOLT bits */ #define LDO5L_EN_MASK 0xC0 #define LDO5LOUT_MASK 0x0F #define LDO5H_EN_MASK 0xC0 #define LDO5HOUT_MASK 0x0F /* PCA9450_REG_IRQ bits */ #define IRQ_PWRON 0x80 #define IRQ_WDOGB 0x40 #define IRQ_RSVD 0x20 #define IRQ_VR_FLT1 0x10 #define IRQ_VR_FLT2 0x08 #define IRQ_LOWVSYS 0x04 #define IRQ_THERM_105 0x02 #define IRQ_THERM_125 0x01 /* PCA9450_REG_RESET_CTRL bits */ #define WDOG_B_CFG_MASK 0xC0 #define WDOG_B_CFG_NONE 0x00 #define WDOG_B_CFG_WARM 0x40 #define WDOG_B_CFG_COLD_LDO12 0x80 #define WDOG_B_CFG_COLD 0xC0 #endif /* __LINUX_REG_PCA9450_H__ */ PK ! ���#� � regulator/userspace-consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __REGULATOR_PLATFORM_CONSUMER_H_ #define __REGULATOR_PLATFORM_CONSUMER_H_ struct regulator_consumer_supply; /** * struct regulator_userspace_consumer_data - line consumer * initialisation data. * * @name: Name for the consumer line * @num_supplies: Number of supplies feeding the line * @supplies: Supplies configuration. * @init_on: Set if the regulators supplying the line should be * enabled during initialisation */ struct regulator_userspace_consumer_data { const char *name; int num_supplies; struct regulator_bulk_data *supplies; bool init_on; }; #endif /* __REGULATOR_PLATFORM_CONSUMER_H_ */ PK ! �%�� � regulator/tps51632-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * tps51632-regulator.h -- TPS51632 regulator * * Interface for regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down * Driverless Controller with serial VID control and DVFS. * * Copyright (C) 2012 NVIDIA Corporation * Author: Laxman Dewangan <ldewangan@nvidia.com> */ #ifndef __LINUX_REGULATOR_TPS51632_H #define __LINUX_REGULATOR_TPS51632_H /* * struct tps51632_regulator_platform_data - tps51632 regulator platform data. * * @reg_init_data: The regulator init data. * @enable_pwm_dvfs: Enable PWM DVFS or not. * @dvfs_step_20mV: Step for DVFS is 20mV or 10mV. * @max_voltage_uV: Maximum possible voltage in PWM-DVFS mode. * @base_voltage_uV: Base voltage when PWM-DVFS enabled. */ struct tps51632_regulator_platform_data { struct regulator_init_data *reg_init_data; bool enable_pwm_dvfs; bool dvfs_step_20mV; int max_voltage_uV; int base_voltage_uV; }; #endif /* __LINUX_REGULATOR_TPS51632_H */ PK ! �L6 � � regulator/max1586.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * max1586.h -- Voltage regulation for the Maxim 1586 * * Copyright (C) 2008 Robert Jarzmik */ #ifndef REGULATOR_MAX1586 #define REGULATOR_MAX1586 #include <linux/regulator/machine.h> #define MAX1586_V3 0 #define MAX1586_V6 1 /* precalculated values for v3_gain */ #define MAX1586_GAIN_NO_R24 1000000 /* 700000 .. 1475000 mV */ #define MAX1586_GAIN_R24_3k32 1051098 /* 735768 .. 1550369 mV */ #define MAX1586_GAIN_R24_5k11 1078648 /* 755053 .. 1591005 mV */ #define MAX1586_GAIN_R24_7k5 1115432 /* 780802 .. 1645262 mV */ /** * max1586_subdev_data - regulator data * @id: regulator Id (either MAX1586_V3 or MAX1586_V6) * @name: regulator cute name (example for V3: "vcc_core") * @platform_data: regulator init data (constraints, supplies, ...) */ struct max1586_subdev_data { int id; const char *name; struct regulator_init_data *platform_data; }; /** * max1586_platform_data - platform data for max1586 * @num_subdevs: number of regulators used (may be 1 or 2) * @subdevs: regulator used * At most, there will be a regulator for V3 and one for V6 voltages. * @v3_gain: gain on the V3 voltage output multiplied by 1e6. * This can be calculated as ((1 + R24/R25 + R24/185.5kOhm) * 1e6) * for an external resistor configuration as described in the * data sheet (R25=100kOhm). */ struct max1586_platform_data { int num_subdevs; struct max1586_subdev_data *subdevs; int v3_gain; }; #endif PK ! ���<� � regulator/db8500-prcmu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) ST-Ericsson SA 2010 * * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson * * Interface to power domain regulators on DB8500 */ #ifndef __REGULATOR_H__ #define __REGULATOR_H__ /* Number of DB8500 regulators and regulator enumeration */ enum db8500_regulator_id { DB8500_REGULATOR_VAPE, DB8500_REGULATOR_VARM, DB8500_REGULATOR_VMODEM, DB8500_REGULATOR_VPLL, DB8500_REGULATOR_VSMPS1, DB8500_REGULATOR_VSMPS2, DB8500_REGULATOR_VSMPS3, DB8500_REGULATOR_VRF1, DB8500_REGULATOR_SWITCH_SVAMMDSP, DB8500_REGULATOR_SWITCH_SVAMMDSPRET, DB8500_REGULATOR_SWITCH_SVAPIPE, DB8500_REGULATOR_SWITCH_SIAMMDSP, DB8500_REGULATOR_SWITCH_SIAMMDSPRET, DB8500_REGULATOR_SWITCH_SIAPIPE, DB8500_REGULATOR_SWITCH_SGA, DB8500_REGULATOR_SWITCH_B2R2_MCDE, DB8500_REGULATOR_SWITCH_ESRAM12, DB8500_REGULATOR_SWITCH_ESRAM12RET, DB8500_REGULATOR_SWITCH_ESRAM34, DB8500_REGULATOR_SWITCH_ESRAM34RET, DB8500_NUM_REGULATORS }; /* * Exported interface for CPUIdle only. This function is called with all * interrupts turned off. */ int power_state_active_is_enabled(void); #endif PK ! �~ʕ � regulator/lp3972.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * National Semiconductors LP3972 PMIC chip client interface * * Based on lp3971.h */ #ifndef __LINUX_REGULATOR_LP3972_H #define __LINUX_REGULATOR_LP3972_H #include <linux/regulator/machine.h> #define LP3972_LDO1 0 #define LP3972_LDO2 1 #define LP3972_LDO3 2 #define LP3972_LDO4 3 #define LP3972_LDO5 4 #define LP3972_DCDC1 5 #define LP3972_DCDC2 6 #define LP3972_DCDC3 7 #define LP3972_NUM_REGULATORS 8 struct lp3972_regulator_subdev { int id; struct regulator_init_data *initdata; }; struct lp3972_platform_data { int num_regulators; struct lp3972_regulator_subdev *regulators; }; #endif PK ! �E#/T T cordic.hnu �[��� /* * Copyright (c) 2011 Broadcom Corporation * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef __CORDIC_H_ #define __CORDIC_H_ #include <linux/types.h> #define CORDIC_ANGLE_GEN 39797 #define CORDIC_PRECISION_SHIFT 16 #define CORDIC_NUM_ITER (CORDIC_PRECISION_SHIFT + 2) #define CORDIC_FIXED(X) ((s32)((X) << CORDIC_PRECISION_SHIFT)) #define CORDIC_FLOAT(X) (((X) >= 0) \ ? ((((X) >> (CORDIC_PRECISION_SHIFT - 1)) + 1) >> 1) \ : -((((-(X)) >> (CORDIC_PRECISION_SHIFT - 1)) + 1) >> 1)) /** * struct cordic_iq - i/q coordinate. * * @i: real part of coordinate (in phase). * @q: imaginary part of coordinate (quadrature). */ struct cordic_iq { s32 i; s32 q; }; /** * cordic_calc_iq() - calculates the i/q coordinate for given angle. * * @theta: angle in degrees for which i/q coordinate is to be calculated. * @coord: function output parameter holding the i/q coordinate. * * The function calculates the i/q coordinate for a given angle using the * CORDIC algorithm. The coordinate consists of a real (i) and an * imaginary (q) part. The real part is essentially the cosine of the * angle and the imaginary part is the sine of the angle. The returned * values are scaled by 2^16 for precision. The range for theta is * for -180 degrees to +180 degrees. Passed values outside this range are * converted before doing the actual calculation. */ struct cordic_iq cordic_calc_iq(s32 theta); #endif /* __CORDIC_H_ */ PK ! �?��6 �6 brcmphy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BRCMPHY_H #define _LINUX_BRCMPHY_H #include <linux/phy.h> /* All Broadcom Ethernet switches have a pseudo-PHY at address 30 which is used * to configure the switch internal registers via MDIO accesses. */ #define BRCM_PSEUDO_PHY_ADDR 30 #define PHY_ID_BCM50610 0x0143bd60 #define PHY_ID_BCM50610M 0x0143bd70 #define PHY_ID_BCM5241 0x0143bc30 #define PHY_ID_BCMAC131 0x0143bc70 #define PHY_ID_BCM5481 0x0143bca0 #define PHY_ID_BCM5395 0x0143bcf0 #define PHY_ID_BCM53125 0x03625f20 #define PHY_ID_BCM54810 0x03625d00 #define PHY_ID_BCM54811 0x03625cc0 #define PHY_ID_BCM5482 0x0143bcb0 #define PHY_ID_BCM5411 0x00206070 #define PHY_ID_BCM5421 0x002060e0 #define PHY_ID_BCM54210E 0x600d84a0 #define PHY_ID_BCM5464 0x002060b0 #define PHY_ID_BCM5461 0x002060c0 #define PHY_ID_BCM54612E 0x03625e60 #define PHY_ID_BCM54616S 0x03625d10 #define PHY_ID_BCM54140 0xae025009 #define PHY_ID_BCM57780 0x03625d90 #define PHY_ID_BCM89610 0x03625cd0 #define PHY_ID_BCM72113 0x35905310 #define PHY_ID_BCM72116 0x35905350 #define PHY_ID_BCM7250 0xae025280 #define PHY_ID_BCM7255 0xae025120 #define PHY_ID_BCM7260 0xae025190 #define PHY_ID_BCM7268 0xae025090 #define PHY_ID_BCM7271 0xae0253b0 #define PHY_ID_BCM7278 0xae0251a0 #define PHY_ID_BCM7364 0xae025260 #define PHY_ID_BCM7366 0x600d8490 #define PHY_ID_BCM7346 0x600d8650 #define PHY_ID_BCM7362 0x600d84b0 #define PHY_ID_BCM7425 0x600d86b0 #define PHY_ID_BCM7429 0x600d8730 #define PHY_ID_BCM7435 0x600d8750 #define PHY_ID_BCM74371 0xae0252e0 #define PHY_ID_BCM7439 0x600d8480 #define PHY_ID_BCM7439_2 0xae025080 #define PHY_ID_BCM7445 0x600d8510 #define PHY_ID_BCM_CYGNUS 0xae025200 #define PHY_ID_BCM_OMEGA 0xae025100 #define PHY_BCM_OUI_MASK 0xfffffc00 #define PHY_BCM_OUI_1 0x00206000 #define PHY_BCM_OUI_2 0x0143bc00 #define PHY_BCM_OUI_3 0x03625c00 #define PHY_BCM_OUI_4 0x600d8400 #define PHY_BCM_OUI_5 0x03625e00 #define PHY_BCM_OUI_6 0xae025000 #define PHY_BRCM_AUTO_PWRDWN_ENABLE 0x00000001 #define PHY_BRCM_RX_REFCLK_UNUSED 0x00000002 #define PHY_BRCM_CLEAR_RGMII_MODE 0x00000004 #define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00000008 #define PHY_BRCM_EN_MASTER_MODE 0x00000010 /* Broadcom BCM7xxx specific workarounds */ #define PHY_BRCM_7XXX_REV(x) (((x) >> 8) & 0xff) #define PHY_BRCM_7XXX_PATCH(x) ((x) & 0xff) #define PHY_BCM_FLAGS_VALID 0x80000000 /* Broadcom BCM54XX register definitions, common to most Broadcom PHYs */ #define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */ #define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */ #define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */ #define MII_BCM54XX_ECR_FIFOE 0x0001 /* FIFO elasticity */ #define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */ #define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */ #define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */ #define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */ #define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */ #define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */ #define MII_BCM54XX_EXP_SEL_ETC 0x0d00 /* Expansion register spare + 2k mem */ #define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */ #define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */ #define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */ #define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */ #define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */ #define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */ #define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */ #define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */ #define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */ #define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */ #define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */ #define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */ #define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */ #define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */ #define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */ #define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */ #define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */ #define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */ #define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */ #define MII_BCM54XX_SHD_WRITE 0x8000 #define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10) #define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0) #define MII_BCM54XX_RDB_ADDR 0x1e #define MII_BCM54XX_RDB_DATA 0x1f /* legacy access control via rdb/expansion register */ #define BCM54XX_RDB_REG0087 0x0087 #define BCM54XX_EXP_REG7E (MII_BCM54XX_EXP_SEL_ER + 0x7E) #define BCM54XX_ACCESS_MODE_LEGACY_EN BIT(15) /* * AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18) */ #define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x00 #define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400 #define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 #define MII_BCM54XX_AUXCTL_ACTL_EXT_PKT_LEN 0x4000 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x07 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN 0x0010 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_EN 0x0080 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN 0x0100 #define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 #define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 #define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT 12 #define MII_BCM54XX_AUXCTL_SHDWSEL_MASK 0x0007 /* * Broadcom LED source encodings. These are used in BCM5461, BCM5481, * BCM5482, and possibly some others. */ #define BCM_LED_SRC_LINKSPD1 0x0 #define BCM_LED_SRC_LINKSPD2 0x1 #define BCM_LED_SRC_XMITLED 0x2 #define BCM_LED_SRC_ACTIVITYLED 0x3 #define BCM_LED_SRC_FDXLED 0x4 #define BCM_LED_SRC_SLAVE 0x5 #define BCM_LED_SRC_INTR 0x6 #define BCM_LED_SRC_QUALITY 0x7 #define BCM_LED_SRC_RCVLED 0x8 #define BCM_LED_SRC_WIRESPEED 0x9 #define BCM_LED_SRC_MULTICOLOR1 0xa #define BCM_LED_SRC_OPENSHORT 0xb #define BCM_LED_SRC_OFF 0xe /* Tied high */ #define BCM_LED_SRC_ON 0xf /* Tied low */ /* * Broadcom Multicolor LED configurations (expansion register 4) */ #define BCM_EXP_MULTICOLOR (MII_BCM54XX_EXP_SEL_ER + 0x04) #define BCM_LED_MULTICOLOR_IN_PHASE BIT(8) #define BCM_LED_MULTICOLOR_LINK_ACT 0x0 #define BCM_LED_MULTICOLOR_SPEED 0x1 #define BCM_LED_MULTICOLOR_ACT_FLASH 0x2 #define BCM_LED_MULTICOLOR_FDX 0x3 #define BCM_LED_MULTICOLOR_OFF 0x4 #define BCM_LED_MULTICOLOR_ON 0x5 #define BCM_LED_MULTICOLOR_ALT 0x6 #define BCM_LED_MULTICOLOR_FLASH 0x7 #define BCM_LED_MULTICOLOR_LINK 0x8 #define BCM_LED_MULTICOLOR_ACT 0x9 #define BCM_LED_MULTICOLOR_PROGRAM 0xa /* * BCM5482: Shadow registers * Shadow values go into bits [14:10] of register 0x1c to select a shadow * register to access. */ /* 00100: Reserved control register 2 */ #define BCM54XX_SHD_SCR2 0x04 #define BCM54XX_SHD_SCR2_WSPD_RTRY_DIS 0x100 #define BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT 2 #define BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET 2 #define BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK 0x7 /* 00101: Spare Control Register 3 */ #define BCM54XX_SHD_SCR3 0x05 #define BCM54XX_SHD_SCR3_DEF_CLK125 0x0001 #define BCM54XX_SHD_SCR3_DLLAPD_DIS 0x0002 #define BCM54XX_SHD_SCR3_TRDDAPD 0x0004 #define BCM54XX_SHD_SCR3_RXCTXC_DIS 0x0100 /* 01010: Auto Power-Down */ #define BCM54XX_SHD_APD 0x0a #define BCM_APD_CLR_MASK 0xFE9F /* clear bits 5, 6 & 8 */ #define BCM54XX_SHD_APD_EN 0x0020 #define BCM_NO_ANEG_APD_EN 0x0060 /* bits 5 & 6 */ #define BCM_APD_SINGLELP_EN 0x0100 /* Bit 8 */ #define BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */ /* LED3 / ~LINKSPD[2] selector */ #define BCM5482_SHD_LEDS1_LED3(src) ((src & 0xf) << 4) /* LED1 / ~LINKSPD[1] selector */ #define BCM5482_SHD_LEDS1_LED1(src) ((src & 0xf) << 0) #define BCM54XX_SHD_RGMII_MODE 0x0b /* 01011: RGMII Mode Selector */ #define BCM5482_SHD_SSD 0x14 /* 10100: Secondary SerDes control */ #define BCM5482_SHD_SSD_LEDM 0x0008 /* SSD LED Mode enable */ #define BCM5482_SHD_SSD_EN 0x0001 /* SSD enable */ /* 10011: SerDes 100-FX Control Register */ #define BCM54616S_SHD_100FX_CTRL 0x13 #define BCM54616S_100FX_MODE BIT(0) /* 100-FX SerDes Enable */ /* 11111: Mode Control Register */ #define BCM54XX_SHD_MODE 0x1f #define BCM54XX_SHD_INTF_SEL_MASK GENMASK(2, 1) /* INTERF_SEL[1:0] */ #define BCM54XX_SHD_INTF_SEL_RGMII 0x02 #define BCM54XX_SHD_INTF_SEL_SGMII 0x04 #define BCM54XX_SHD_INTF_SEL_GBIC 0x06 #define BCM54XX_SHD_MODE_1000BX BIT(0) /* Enable 1000-X registers */ /* * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17) */ #define MII_BCM54XX_EXP_AADJ1CH0 0x001f #define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 #define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 #define MII_BCM54XX_EXP_AADJ1CH3 0x601f #define MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ 0x0002 #define MII_BCM54XX_EXP_EXP08 0x0F08 #define MII_BCM54XX_EXP_EXP08_RJCT_2MHZ 0x0001 #define MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE 0x0200 #define MII_BCM54XX_EXP_EXP75 0x0f75 #define MII_BCM54XX_EXP_EXP75_VDACCTRL 0x003c #define MII_BCM54XX_EXP_EXP75_CM_OSC 0x0001 #define MII_BCM54XX_EXP_EXP96 0x0f96 #define MII_BCM54XX_EXP_EXP96_MYST 0x0010 #define MII_BCM54XX_EXP_EXP97 0x0f97 #define MII_BCM54XX_EXP_EXP97_MYST 0x0c0c /* * BCM5482: Secondary SerDes registers */ #define BCM5482_SSD_1000BX_CTL 0x00 /* 1000BASE-X Control */ #define BCM5482_SSD_1000BX_CTL_PWRDOWN 0x0800 /* Power-down SSD */ #define BCM5482_SSD_SGMII_SLAVE 0x15 /* SGMII Slave Register */ #define BCM5482_SSD_SGMII_SLAVE_EN 0x0002 /* Slave mode enable */ #define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */ /* BCM54810 Registers */ #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL (MII_BCM54XX_EXP_SEL_ER + 0x90) #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN (1 << 0) #define BCM54810_SHD_CLK_CTL 0x3 #define BCM54810_SHD_CLK_CTL_GTXCLK_EN (1 << 9) /* BCM54612E Registers */ #define BCM54612E_EXP_SPARE0 (MII_BCM54XX_EXP_SEL_ETC + 0x34) #define BCM54612E_LED4_CLK125OUT_EN (1 << 1) /*****************************************************************************/ /* Fast Ethernet Transceiver definitions. */ /*****************************************************************************/ #define MII_BRCM_FET_INTREG 0x1a /* Interrupt register */ #define MII_BRCM_FET_IR_MASK 0x0100 /* Mask all interrupts */ #define MII_BRCM_FET_IR_LINK_EN 0x0200 /* Link status change enable */ #define MII_BRCM_FET_IR_SPEED_EN 0x0400 /* Link speed change enable */ #define MII_BRCM_FET_IR_DUPLEX_EN 0x0800 /* Duplex mode change enable */ #define MII_BRCM_FET_IR_ENABLE 0x4000 /* Interrupt enable */ #define MII_BRCM_FET_BRCMTEST 0x1f /* Brcm test register */ #define MII_BRCM_FET_BT_SRE 0x0080 /* Shadow register enable */ /*** Shadow register definitions ***/ #define MII_BRCM_FET_SHDW_MISCCTRL 0x10 /* Shadow misc ctrl */ #define MII_BRCM_FET_SHDW_MC_FAME 0x4000 /* Force Auto MDIX enable */ #define MII_BRCM_FET_SHDW_AUXMODE4 0x1a /* Auxiliary mode 4 */ #define MII_BRCM_FET_SHDW_AM4_LED_MASK 0x0003 #define MII_BRCM_FET_SHDW_AM4_LED_MODE1 0x0001 #define MII_BRCM_FET_SHDW_AUXSTAT2 0x1b /* Auxiliary status 2 */ #define MII_BRCM_FET_SHDW_AS2_APDE 0x0020 /* Auto power down enable */ #define BRCM_CL45VEN_EEE_CONTROL 0x803d #define LPI_FEATURE_EN 0x8000 #define LPI_FEATURE_EN_DIG1000X 0x4000 /* Core register definitions*/ #define MII_BRCM_CORE_BASE12 0x12 #define MII_BRCM_CORE_BASE13 0x13 #define MII_BRCM_CORE_BASE14 0x14 #define MII_BRCM_CORE_BASE1E 0x1E #define MII_BRCM_CORE_EXPB0 0xB0 #define MII_BRCM_CORE_EXPB1 0xB1 /* Enhanced Cable Diagnostics */ #define BCM54XX_RDB_ECD_CTRL 0x2a0 #define BCM54XX_EXP_ECD_CTRL (MII_BCM54XX_EXP_SEL_ER + 0xc0) #define BCM54XX_ECD_CTRL_CABLE_TYPE_CAT3 1 /* CAT3 or worse */ #define BCM54XX_ECD_CTRL_CABLE_TYPE_CAT5 0 /* CAT5 or better */ #define BCM54XX_ECD_CTRL_CABLE_TYPE_MASK BIT(0) /* cable type */ #define BCM54XX_ECD_CTRL_INVALID BIT(3) /* invalid result */ #define BCM54XX_ECD_CTRL_UNIT_CM 0 /* centimeters */ #define BCM54XX_ECD_CTRL_UNIT_M 1 /* meters */ #define BCM54XX_ECD_CTRL_UNIT_MASK BIT(10) /* cable length unit */ #define BCM54XX_ECD_CTRL_IN_PROGRESS BIT(11) /* test in progress */ #define BCM54XX_ECD_CTRL_BREAK_LINK BIT(12) /* unconnect link * during test */ #define BCM54XX_ECD_CTRL_CROSS_SHORT_DIS BIT(13) /* disable inter-pair * short check */ #define BCM54XX_ECD_CTRL_RUN BIT(15) /* run immediate */ #define BCM54XX_RDB_ECD_FAULT_TYPE 0x2a1 #define BCM54XX_EXP_ECD_FAULT_TYPE (MII_BCM54XX_EXP_SEL_ER + 0xc1) #define BCM54XX_ECD_FAULT_TYPE_INVALID 0x0 #define BCM54XX_ECD_FAULT_TYPE_OK 0x1 #define BCM54XX_ECD_FAULT_TYPE_OPEN 0x2 #define BCM54XX_ECD_FAULT_TYPE_SAME_SHORT 0x3 /* short same pair */ #define BCM54XX_ECD_FAULT_TYPE_CROSS_SHORT 0x4 /* short different pairs */ #define BCM54XX_ECD_FAULT_TYPE_BUSY 0x9 #define BCM54XX_ECD_FAULT_TYPE_PAIR_D_MASK GENMASK(3, 0) #define BCM54XX_ECD_FAULT_TYPE_PAIR_C_MASK GENMASK(7, 4) #define BCM54XX_ECD_FAULT_TYPE_PAIR_B_MASK GENMASK(11, 8) #define BCM54XX_ECD_FAULT_TYPE_PAIR_A_MASK GENMASK(15, 12) #define BCM54XX_ECD_PAIR_A_LENGTH_RESULTS 0x2a2 #define BCM54XX_ECD_PAIR_B_LENGTH_RESULTS 0x2a3 #define BCM54XX_ECD_PAIR_C_LENGTH_RESULTS 0x2a4 #define BCM54XX_ECD_PAIR_D_LENGTH_RESULTS 0x2a5 #define BCM54XX_RDB_ECD_PAIR_A_LENGTH_RESULTS 0x2a2 #define BCM54XX_EXP_ECD_PAIR_A_LENGTH_RESULTS (MII_BCM54XX_EXP_SEL_ER + 0xc2) #define BCM54XX_RDB_ECD_PAIR_B_LENGTH_RESULTS 0x2a3 #define BCM54XX_EXP_ECD_PAIR_B_LENGTH_RESULTS (MII_BCM54XX_EXP_SEL_ER + 0xc3) #define BCM54XX_RDB_ECD_PAIR_C_LENGTH_RESULTS 0x2a4 #define BCM54XX_EXP_ECD_PAIR_C_LENGTH_RESULTS (MII_BCM54XX_EXP_SEL_ER + 0xc4) #define BCM54XX_RDB_ECD_PAIR_D_LENGTH_RESULTS 0x2a5 #define BCM54XX_EXP_ECD_PAIR_D_LENGTH_RESULTS (MII_BCM54XX_EXP_SEL_ER + 0xc5) #define BCM54XX_ECD_LENGTH_RESULTS_INVALID 0xffff #endif /* _LINUX_BRCMPHY_H */ PK ! ��%� � types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TYPES_H #define _LINUX_TYPES_H #define __EXPORTED_HEADERS__ #include <uapi/linux/types.h> #ifndef __ASSEMBLY__ #define DECLARE_BITMAP(name,bits) \ unsigned long name[BITS_TO_LONGS(bits)] typedef u32 __kernel_dev_t; typedef __kernel_fd_set fd_set; typedef __kernel_dev_t dev_t; typedef __kernel_ulong_t ino_t; typedef __kernel_mode_t mode_t; typedef unsigned short umode_t; typedef u32 nlink_t; typedef __kernel_off_t off_t; typedef __kernel_pid_t pid_t; typedef __kernel_daddr_t daddr_t; typedef __kernel_key_t key_t; typedef __kernel_suseconds_t suseconds_t; typedef __kernel_timer_t timer_t; typedef __kernel_clockid_t clockid_t; typedef __kernel_mqd_t mqd_t; typedef _Bool bool; typedef __kernel_uid32_t uid_t; typedef __kernel_gid32_t gid_t; typedef __kernel_uid16_t uid16_t; typedef __kernel_gid16_t gid16_t; typedef unsigned long uintptr_t; #ifdef CONFIG_HAVE_UID16 /* This is defined by include/asm-{arch}/posix_types.h */ typedef __kernel_old_uid_t old_uid_t; typedef __kernel_old_gid_t old_gid_t; #endif /* CONFIG_UID16 */ #if defined(__GNUC__) typedef __kernel_loff_t loff_t; #endif /* * The following typedefs are also protected by individual ifdefs for * historical reasons: */ #ifndef _SIZE_T #define _SIZE_T typedef __kernel_size_t size_t; #endif #ifndef _SSIZE_T #define _SSIZE_T typedef __kernel_ssize_t ssize_t; #endif #ifndef _PTRDIFF_T #define _PTRDIFF_T typedef __kernel_ptrdiff_t ptrdiff_t; #endif #ifndef _CLOCK_T #define _CLOCK_T typedef __kernel_clock_t clock_t; #endif #ifndef _CADDR_T #define _CADDR_T typedef __kernel_caddr_t caddr_t; #endif /* bsd */ typedef unsigned char u_char; typedef unsigned short u_short; typedef unsigned int u_int; typedef unsigned long u_long; /* sysv */ typedef unsigned char unchar; typedef unsigned short ushort; typedef unsigned int uint; typedef unsigned long ulong; #ifndef __BIT_TYPES_DEFINED__ #define __BIT_TYPES_DEFINED__ typedef u8 u_int8_t; typedef s8 int8_t; typedef u16 u_int16_t; typedef s16 int16_t; typedef u32 u_int32_t; typedef s32 int32_t; #endif /* !(__BIT_TYPES_DEFINED__) */ typedef u8 uint8_t; typedef u16 uint16_t; typedef u32 uint32_t; #if defined(__GNUC__) typedef u64 uint64_t; typedef u64 u_int64_t; typedef s64 int64_t; #endif /* These are the special 64-bit data types that are 8-byte aligned */ #define aligned_u64 __aligned_u64 #define aligned_s64 __aligned_s64 #define aligned_be64 __aligned_be64 #define aligned_le64 __aligned_le64 /** * The type used for indexing onto a disc or disc partition. * * Linux always considers sectors to be 512 bytes long independently * of the devices real block size. * * blkcnt_t is the type of the inode's block count. */ typedef u64 sector_t; typedef u64 blkcnt_t; /* * The type of an index into the pagecache. */ #define pgoff_t unsigned long /* * A dma_addr_t can hold any valid DMA address, i.e., any address returned * by the DMA API. * * If the DMA API only uses 32-bit addresses, dma_addr_t need only be 32 * bits wide. Bus addresses, e.g., PCI BARs, may be wider than 32 bits, * but drivers do memory-mapped I/O to ioremapped kernel virtual addresses, * so they don't care about the size of the actual bus addresses. */ #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT typedef u64 dma_addr_t; #else typedef u32 dma_addr_t; #endif typedef unsigned int __bitwise gfp_t; typedef unsigned int __bitwise slab_flags_t; typedef unsigned int __bitwise fmode_t; #ifdef CONFIG_PHYS_ADDR_T_64BIT typedef u64 phys_addr_t; #else typedef u32 phys_addr_t; #endif typedef phys_addr_t resource_size_t; /* * This type is the placeholder for a hardware interrupt number. It has to be * big enough to enclose whatever representation is used by a given platform. */ typedef unsigned long irq_hw_number_t; typedef struct { int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } #ifdef CONFIG_64BIT typedef struct { s64 counter; } atomic64_t; #endif struct list_head { struct list_head *next, *prev; }; struct hlist_head { struct hlist_node *first; }; struct hlist_node { struct hlist_node *next, **pprev; }; struct ustat { __kernel_daddr_t f_tfree; #ifdef CONFIG_ARCH_32BIT_USTAT_F_TINODE unsigned int f_tinode; #else unsigned long f_tinode; #endif char f_fname[6]; char f_fpack[6]; }; /** * struct callback_head - callback structure for use with RCU and task_work * @next: next update requests in a list * @func: actual update function to call after the grace period. * * The struct is aligned to size of pointer. On most architectures it happens * naturally due ABI requirements, but some architectures (like CRIS) have * weird ABI and we need to ask it explicitly. * * The alignment is required to guarantee that bit 0 of @next will be * clear under normal conditions -- as long as we use call_rcu() or * call_srcu() to queue the callback. * * This guarantee is important for few reasons: * - future call_rcu_lazy() will make use of lower bits in the pointer; * - the structure shares storage space in struct page with @compound_head, * which encode PageTail() in bit 0. The guarantee is needed to avoid * false-positive PageTail(). */ struct callback_head { struct callback_head *next; void (*func)(struct callback_head *head); } __attribute__((aligned(sizeof(void *)))); #define rcu_head callback_head typedef void (*rcu_callback_t)(struct rcu_head *head); typedef void (*call_rcu_func_t)(struct rcu_head *head, rcu_callback_t func); typedef void (*swap_func_t)(void *a, void *b, int size); typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv); typedef int (*cmp_func_t)(const void *a, const void *b); #endif /* __ASSEMBLY__ */ #endif /* _LINUX_TYPES_H */ PK ! إ�0( 0( tick.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Tick related global functions */ #ifndef _LINUX_TICK_H #define _LINUX_TICK_H #include <linux/clockchips.h> #include <linux/irqflags.h> #include <linux/percpu.h> #include <linux/context_tracking_state.h> #include <linux/cpumask.h> #include <linux/sched.h> #include <linux/rcupdate.h> #ifdef CONFIG_GENERIC_CLOCKEVENTS extern void __init tick_init(void); /* Should be core only, but ARM BL switcher requires it */ extern void tick_suspend_local(void); /* Should be core only, but XEN resume magic and ARM BL switcher require it */ extern void tick_resume_local(void); extern void tick_handover_do_timer(void); extern void tick_cleanup_dead_cpu(int cpu); #else /* CONFIG_GENERIC_CLOCKEVENTS */ static inline void tick_init(void) { } static inline void tick_suspend_local(void) { } static inline void tick_resume_local(void) { } static inline void tick_handover_do_timer(void) { } static inline void tick_cleanup_dead_cpu(int cpu) { } #endif /* !CONFIG_GENERIC_CLOCKEVENTS */ #if defined(CONFIG_GENERIC_CLOCKEVENTS) && defined(CONFIG_SUSPEND) extern void tick_freeze(void); extern void tick_unfreeze(void); #else static inline void tick_freeze(void) { } static inline void tick_unfreeze(void) { } #endif #ifdef CONFIG_TICK_ONESHOT extern void tick_irq_enter(void); # ifndef arch_needs_cpu # define arch_needs_cpu() (0) # endif # else static inline void tick_irq_enter(void) { } #endif #if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT) extern void hotplug_cpu__broadcast_tick_pull(int dead_cpu); #else static inline void hotplug_cpu__broadcast_tick_pull(int dead_cpu) { } #endif enum tick_broadcast_mode { TICK_BROADCAST_OFF, TICK_BROADCAST_ON, TICK_BROADCAST_FORCE, }; enum tick_broadcast_state { TICK_BROADCAST_EXIT, TICK_BROADCAST_ENTER, }; #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST extern void tick_broadcast_control(enum tick_broadcast_mode mode); #else static inline void tick_broadcast_control(enum tick_broadcast_mode mode) { } #endif /* BROADCAST */ #if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_HOTPLUG_CPU) extern void tick_offline_cpu(unsigned int cpu); #else static inline void tick_offline_cpu(unsigned int cpu) { } #endif #ifdef CONFIG_GENERIC_CLOCKEVENTS extern int tick_broadcast_oneshot_control(enum tick_broadcast_state state); #else static inline int tick_broadcast_oneshot_control(enum tick_broadcast_state state) { return 0; } #endif static inline void tick_broadcast_enable(void) { tick_broadcast_control(TICK_BROADCAST_ON); } static inline void tick_broadcast_disable(void) { tick_broadcast_control(TICK_BROADCAST_OFF); } static inline void tick_broadcast_force(void) { tick_broadcast_control(TICK_BROADCAST_FORCE); } static inline int tick_broadcast_enter(void) { return tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER); } static inline void tick_broadcast_exit(void) { tick_broadcast_oneshot_control(TICK_BROADCAST_EXIT); } enum tick_dep_bits { TICK_DEP_BIT_POSIX_TIMER = 0, TICK_DEP_BIT_PERF_EVENTS = 1, TICK_DEP_BIT_SCHED = 2, TICK_DEP_BIT_CLOCK_UNSTABLE = 3, TICK_DEP_BIT_RCU = 4, TICK_DEP_BIT_RCU_EXP = 5 }; #define TICK_DEP_BIT_MAX TICK_DEP_BIT_RCU_EXP #define TICK_DEP_MASK_NONE 0 #define TICK_DEP_MASK_POSIX_TIMER (1 << TICK_DEP_BIT_POSIX_TIMER) #define TICK_DEP_MASK_PERF_EVENTS (1 << TICK_DEP_BIT_PERF_EVENTS) #define TICK_DEP_MASK_SCHED (1 << TICK_DEP_BIT_SCHED) #define TICK_DEP_MASK_CLOCK_UNSTABLE (1 << TICK_DEP_BIT_CLOCK_UNSTABLE) #define TICK_DEP_MASK_RCU (1 << TICK_DEP_BIT_RCU) #define TICK_DEP_MASK_RCU_EXP (1 << TICK_DEP_BIT_RCU_EXP) #ifdef CONFIG_NO_HZ_COMMON extern bool tick_nohz_enabled; extern bool tick_nohz_tick_stopped(void); extern bool tick_nohz_tick_stopped_cpu(int cpu); extern void tick_nohz_idle_stop_tick(void); extern void tick_nohz_idle_retain_tick(void); extern void tick_nohz_idle_restart_tick(void); extern void tick_nohz_idle_enter(void); extern void tick_nohz_idle_exit(void); extern void tick_nohz_irq_exit(void); extern bool tick_nohz_idle_got_tick(void); extern ktime_t tick_nohz_get_next_hrtimer(void); extern ktime_t tick_nohz_get_sleep_length(ktime_t *delta_next); extern unsigned long tick_nohz_get_idle_calls(void); extern unsigned long tick_nohz_get_idle_calls_cpu(int cpu); extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time); extern u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time); static inline void tick_nohz_idle_stop_tick_protected(void) { local_irq_disable(); tick_nohz_idle_stop_tick(); local_irq_enable(); } #else /* !CONFIG_NO_HZ_COMMON */ #define tick_nohz_enabled (0) static inline int tick_nohz_tick_stopped(void) { return 0; } static inline int tick_nohz_tick_stopped_cpu(int cpu) { return 0; } static inline void tick_nohz_idle_stop_tick(void) { } static inline void tick_nohz_idle_retain_tick(void) { } static inline void tick_nohz_idle_restart_tick(void) { } static inline void tick_nohz_idle_enter(void) { } static inline void tick_nohz_idle_exit(void) { } static inline bool tick_nohz_idle_got_tick(void) { return false; } static inline ktime_t tick_nohz_get_next_hrtimer(void) { /* Next wake up is the tick period, assume it starts now */ return ktime_add(ktime_get(), TICK_NSEC); } static inline ktime_t tick_nohz_get_sleep_length(ktime_t *delta_next) { *delta_next = TICK_NSEC; return *delta_next; } static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; } static inline u64 get_cpu_iowait_time_us(int cpu, u64 *unused) { return -1; } static inline void tick_nohz_idle_stop_tick_protected(void) { } #endif /* !CONFIG_NO_HZ_COMMON */ #ifdef CONFIG_NO_HZ_FULL extern bool tick_nohz_full_running; extern cpumask_var_t tick_nohz_full_mask; static inline bool tick_nohz_full_enabled(void) { if (!context_tracking_enabled()) return false; return tick_nohz_full_running; } /* * Check if a CPU is part of the nohz_full subset. Arrange for evaluating * the cpu expression (typically smp_processor_id()) _after_ the static * key. */ #define tick_nohz_full_cpu(_cpu) ({ \ bool __ret = false; \ if (tick_nohz_full_enabled()) \ __ret = cpumask_test_cpu((_cpu), tick_nohz_full_mask); \ __ret; \ }) static inline void tick_nohz_full_add_cpus_to(struct cpumask *mask) { if (tick_nohz_full_enabled()) cpumask_or(mask, mask, tick_nohz_full_mask); } extern void tick_nohz_dep_set(enum tick_dep_bits bit); extern void tick_nohz_dep_clear(enum tick_dep_bits bit); extern void tick_nohz_dep_set_cpu(int cpu, enum tick_dep_bits bit); extern void tick_nohz_dep_clear_cpu(int cpu, enum tick_dep_bits bit); extern void tick_nohz_dep_set_task(struct task_struct *tsk, enum tick_dep_bits bit); extern void tick_nohz_dep_clear_task(struct task_struct *tsk, enum tick_dep_bits bit); extern void tick_nohz_dep_set_signal(struct task_struct *tsk, enum tick_dep_bits bit); extern void tick_nohz_dep_clear_signal(struct signal_struct *signal, enum tick_dep_bits bit); extern bool tick_nohz_cpu_hotpluggable(unsigned int cpu); /* * The below are tick_nohz_[set,clear]_dep() wrappers that optimize off-cases * on top of static keys. */ static inline void tick_dep_set(enum tick_dep_bits bit) { if (tick_nohz_full_enabled()) tick_nohz_dep_set(bit); } static inline void tick_dep_clear(enum tick_dep_bits bit) { if (tick_nohz_full_enabled()) tick_nohz_dep_clear(bit); } static inline void tick_dep_set_cpu(int cpu, enum tick_dep_bits bit) { if (tick_nohz_full_cpu(cpu)) tick_nohz_dep_set_cpu(cpu, bit); } static inline void tick_dep_clear_cpu(int cpu, enum tick_dep_bits bit) { if (tick_nohz_full_cpu(cpu)) tick_nohz_dep_clear_cpu(cpu, bit); } static inline void tick_dep_set_task(struct task_struct *tsk, enum tick_dep_bits bit) { if (tick_nohz_full_enabled()) tick_nohz_dep_set_task(tsk, bit); } static inline void tick_dep_clear_task(struct task_struct *tsk, enum tick_dep_bits bit) { if (tick_nohz_full_enabled()) tick_nohz_dep_clear_task(tsk, bit); } static inline void tick_dep_init_task(struct task_struct *tsk) { atomic_set(&tsk->tick_dep_mask, 0); } static inline void tick_dep_set_signal(struct task_struct *tsk, enum tick_dep_bits bit) { if (tick_nohz_full_enabled()) tick_nohz_dep_set_signal(tsk, bit); } static inline void tick_dep_clear_signal(struct signal_struct *signal, enum tick_dep_bits bit) { if (tick_nohz_full_enabled()) tick_nohz_dep_clear_signal(signal, bit); } extern void tick_nohz_full_kick_cpu(int cpu); extern void __tick_nohz_task_switch(void); extern void __init tick_nohz_full_setup(cpumask_var_t cpumask); #else static inline bool tick_nohz_full_enabled(void) { return false; } static inline bool tick_nohz_full_cpu(int cpu) { return false; } static inline void tick_nohz_full_add_cpus_to(struct cpumask *mask) { } static inline void tick_nohz_dep_set_cpu(int cpu, enum tick_dep_bits bit) { } static inline void tick_nohz_dep_clear_cpu(int cpu, enum tick_dep_bits bit) { } static inline bool tick_nohz_cpu_hotpluggable(unsigned int cpu) { return true; } static inline void tick_dep_set(enum tick_dep_bits bit) { } static inline void tick_dep_clear(enum tick_dep_bits bit) { } static inline void tick_dep_set_cpu(int cpu, enum tick_dep_bits bit) { } static inline void tick_dep_clear_cpu(int cpu, enum tick_dep_bits bit) { } static inline void tick_dep_set_task(struct task_struct *tsk, enum tick_dep_bits bit) { } static inline void tick_dep_clear_task(struct task_struct *tsk, enum tick_dep_bits bit) { } static inline void tick_dep_init_task(struct task_struct *tsk) { } static inline void tick_dep_set_signal(struct task_struct *tsk, enum tick_dep_bits bit) { } static inline void tick_dep_clear_signal(struct signal_struct *signal, enum tick_dep_bits bit) { } static inline void tick_nohz_full_kick_cpu(int cpu) { } static inline void __tick_nohz_task_switch(void) { } static inline void tick_nohz_full_setup(cpumask_var_t cpumask) { } #endif static inline void tick_nohz_task_switch(void) { if (tick_nohz_full_enabled()) __tick_nohz_task_switch(); } static inline void tick_nohz_user_enter_prepare(void) { if (tick_nohz_full_cpu(smp_processor_id())) rcu_nocb_flush_deferred_wakeup(); } #endif PK ! $�7� � ucs2_string.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_UCS2_STRING_H_ #define _LINUX_UCS2_STRING_H_ #include <linux/types.h> /* for size_t */ #include <linux/stddef.h> /* for NULL */ typedef u16 ucs2_char_t; unsigned long ucs2_strnlen(const ucs2_char_t *s, size_t maxlength); unsigned long ucs2_strlen(const ucs2_char_t *s); unsigned long ucs2_strsize(const ucs2_char_t *data, unsigned long maxlength); int ucs2_strncmp(const ucs2_char_t *a, const ucs2_char_t *b, size_t len); unsigned long ucs2_utf8size(const ucs2_char_t *src); unsigned long ucs2_as_utf8(u8 *dest, const ucs2_char_t *src, unsigned long maxlength); #endif /* _LINUX_UCS2_STRING_H_ */ PK ! ����� � string_helpers.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_STRING_HELPERS_H_ #define _LINUX_STRING_HELPERS_H_ #include <linux/bits.h> #include <linux/ctype.h> #include <linux/types.h> struct file; struct task_struct; /* Descriptions of the types of units to * print in */ enum string_size_units { STRING_UNITS_10, /* use powers of 10^3 (standard SI) */ STRING_UNITS_2, /* use binary powers of 2^10 */ }; void string_get_size(u64 size, u64 blk_size, enum string_size_units units, char *buf, int len); #define UNESCAPE_SPACE BIT(0) #define UNESCAPE_OCTAL BIT(1) #define UNESCAPE_HEX BIT(2) #define UNESCAPE_SPECIAL BIT(3) #define UNESCAPE_ANY \ (UNESCAPE_SPACE | UNESCAPE_OCTAL | UNESCAPE_HEX | UNESCAPE_SPECIAL) #define UNESCAPE_ALL_MASK GENMASK(3, 0) int string_unescape(char *src, char *dst, size_t size, unsigned int flags); static inline int string_unescape_inplace(char *buf, unsigned int flags) { return string_unescape(buf, buf, 0, flags); } static inline int string_unescape_any(char *src, char *dst, size_t size) { return string_unescape(src, dst, size, UNESCAPE_ANY); } static inline int string_unescape_any_inplace(char *buf) { return string_unescape_any(buf, buf, 0); } #define ESCAPE_SPACE BIT(0) #define ESCAPE_SPECIAL BIT(1) #define ESCAPE_NULL BIT(2) #define ESCAPE_OCTAL BIT(3) #define ESCAPE_ANY \ (ESCAPE_SPACE | ESCAPE_OCTAL | ESCAPE_SPECIAL | ESCAPE_NULL) #define ESCAPE_NP BIT(4) #define ESCAPE_ANY_NP (ESCAPE_ANY | ESCAPE_NP) #define ESCAPE_HEX BIT(5) #define ESCAPE_NA BIT(6) #define ESCAPE_NAP BIT(7) #define ESCAPE_APPEND BIT(8) #define ESCAPE_ALL_MASK GENMASK(8, 0) int string_escape_mem(const char *src, size_t isz, char *dst, size_t osz, unsigned int flags, const char *only); static inline int string_escape_mem_any_np(const char *src, size_t isz, char *dst, size_t osz, const char *only) { return string_escape_mem(src, isz, dst, osz, ESCAPE_ANY_NP, only); } static inline int string_escape_str(const char *src, char *dst, size_t sz, unsigned int flags, const char *only) { return string_escape_mem(src, strlen(src), dst, sz, flags, only); } static inline int string_escape_str_any_np(const char *src, char *dst, size_t sz, const char *only) { return string_escape_str(src, dst, sz, ESCAPE_ANY_NP, only); } static inline void string_upper(char *dst, const char *src) { do { *dst++ = toupper(*src); } while (*src++); } static inline void string_lower(char *dst, const char *src) { do { *dst++ = tolower(*src); } while (*src++); } char *kstrdup_quotable(const char *src, gfp_t gfp); char *kstrdup_quotable_cmdline(struct task_struct *task, gfp_t gfp); char *kstrdup_quotable_file(struct file *file, gfp_t gfp); void kfree_strarray(char **array, size_t n); #endif PK ! ,G�O O tpm_command.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_TPM_COMMAND_H__ #define __LINUX_TPM_COMMAND_H__ /* * TPM Command constants from specifications at * http://www.trustedcomputinggroup.org */ /* Command TAGS */ #define TPM_TAG_RQU_COMMAND 193 #define TPM_TAG_RQU_AUTH1_COMMAND 194 #define TPM_TAG_RQU_AUTH2_COMMAND 195 #define TPM_TAG_RSP_COMMAND 196 #define TPM_TAG_RSP_AUTH1_COMMAND 197 #define TPM_TAG_RSP_AUTH2_COMMAND 198 /* Command Ordinals */ #define TPM_ORD_GETRANDOM 70 #define TPM_ORD_OSAP 11 #define TPM_ORD_OIAP 10 #define TPM_ORD_SEAL 23 #define TPM_ORD_UNSEAL 24 /* Other constants */ #define SRKHANDLE 0x40000000 #define TPM_NONCE_SIZE 20 #endif PK ! �C�.� � mxm-wmi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * MXM WMI driver * * Copyright(C) 2010 Red Hat. */ #ifndef MXM_WMI_H #define MXM_WMI_H /* discrete adapters */ #define MXM_MXDS_ADAPTER_0 0x0 #define MXM_MXDS_ADAPTER_1 0x0 /* integrated adapter */ #define MXM_MXDS_ADAPTER_IGD 0x10 int mxm_wmi_call_mxds(int adapter); int mxm_wmi_call_mxmx(int adapter); bool mxm_wmi_supported(void); #endif PK ! ���#v v serial.hnu �[��� /* * include/linux/serial.h * * Copyright (C) 1992 by Theodore Ts'o. * * Redistribution of this file is permitted under the terms of the GNU * Public License (GPL) */ #ifndef _LINUX_SERIAL_H #define _LINUX_SERIAL_H #include <asm/page.h> #include <uapi/linux/serial.h> /* * Counters of the input lines (CTS, DSR, RI, CD) interrupts */ struct async_icount { __u32 cts, dsr, rng, dcd, tx, rx; __u32 frame, parity, overrun, brk; __u32 buf_overrun; }; /* * The size of the serial xmit buffer is 1 page, or 4096 bytes */ #define SERIAL_XMIT_SIZE PAGE_SIZE #include <linux/compiler.h> #endif /* _LINUX_SERIAL_H */ PK ! U�{B�� �� mmzone.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MMZONE_H #define _LINUX_MMZONE_H #ifndef __ASSEMBLY__ #ifndef __GENERATING_BOUNDS_H #include <linux/spinlock.h> #include <linux/list.h> #include <linux/wait.h> #include <linux/bitops.h> #include <linux/cache.h> #include <linux/threads.h> #include <linux/numa.h> #include <linux/init.h> #include <linux/seqlock.h> #include <linux/nodemask.h> #include <linux/pageblock-flags.h> #include <linux/page-flags-layout.h> #include <linux/atomic.h> #include <linux/mm_types.h> #include <linux/page-flags.h> #include <linux/local_lock.h> #include <asm/page.h> /* Free memory management - zoned buddy allocator. */ #ifndef CONFIG_FORCE_MAX_ZONEORDER #define MAX_ORDER 11 #else #define MAX_ORDER CONFIG_FORCE_MAX_ZONEORDER #endif #define MAX_ORDER_NR_PAGES (1 << (MAX_ORDER - 1)) /* * PAGE_ALLOC_COSTLY_ORDER is the order at which allocations are deemed * costly to service. That is between allocation orders which should * coalesce naturally under reasonable reclaim pressure and those which * will not. */ #define PAGE_ALLOC_COSTLY_ORDER 3 enum migratetype { MIGRATE_UNMOVABLE, MIGRATE_MOVABLE, MIGRATE_RECLAIMABLE, MIGRATE_PCPTYPES, /* the number of types on the pcp lists */ MIGRATE_HIGHATOMIC = MIGRATE_PCPTYPES, #ifdef CONFIG_CMA /* * MIGRATE_CMA migration type is designed to mimic the way * ZONE_MOVABLE works. Only movable pages can be allocated * from MIGRATE_CMA pageblocks and page allocator never * implicitly change migration type of MIGRATE_CMA pageblock. * * The way to use it is to change migratetype of a range of * pageblocks to MIGRATE_CMA which can be done by * __free_pageblock_cma() function. What is important though * is that a range of pageblocks must be aligned to * MAX_ORDER_NR_PAGES should biggest page be bigger than * a single pageblock. */ MIGRATE_CMA, #endif #ifdef CONFIG_MEMORY_ISOLATION MIGRATE_ISOLATE, /* can't allocate from here */ #endif MIGRATE_TYPES }; /* In mm/page_alloc.c; keep in sync also with show_migration_types() there */ extern const char * const migratetype_names[MIGRATE_TYPES]; #ifdef CONFIG_CMA # define is_migrate_cma(migratetype) unlikely((migratetype) == MIGRATE_CMA) # define is_migrate_cma_page(_page) (get_pageblock_migratetype(_page) == MIGRATE_CMA) #else # define is_migrate_cma(migratetype) false # define is_migrate_cma_page(_page) false #endif static inline bool is_migrate_movable(int mt) { return is_migrate_cma(mt) || mt == MIGRATE_MOVABLE; } #define for_each_migratetype_order(order, type) \ for (order = 0; order < MAX_ORDER; order++) \ for (type = 0; type < MIGRATE_TYPES; type++) extern int page_group_by_mobility_disabled; #define MIGRATETYPE_MASK ((1UL << PB_migratetype_bits) - 1) #define get_pageblock_migratetype(page) \ get_pfnblock_flags_mask(page, page_to_pfn(page), MIGRATETYPE_MASK) struct free_area { struct list_head free_list[MIGRATE_TYPES]; unsigned long nr_free; }; static inline struct page *get_page_from_free_area(struct free_area *area, int migratetype) { return list_first_entry_or_null(&area->free_list[migratetype], struct page, lru); } static inline bool free_area_empty(struct free_area *area, int migratetype) { return list_empty(&area->free_list[migratetype]); } struct pglist_data; /* * Add a wild amount of padding here to ensure data fall into separate * cachelines. There are very few zone structures in the machine, so space * consumption is not a concern here. */ #if defined(CONFIG_SMP) struct zone_padding { char x[0]; } ____cacheline_internodealigned_in_smp; #define ZONE_PADDING(name) struct zone_padding name; #else #define ZONE_PADDING(name) #endif #ifdef CONFIG_NUMA enum numa_stat_item { NUMA_HIT, /* allocated in intended node */ NUMA_MISS, /* allocated in non intended node */ NUMA_FOREIGN, /* was intended here, hit elsewhere */ NUMA_INTERLEAVE_HIT, /* interleaver preferred this zone */ NUMA_LOCAL, /* allocation from local node */ NUMA_OTHER, /* allocation from other node */ NR_VM_NUMA_EVENT_ITEMS }; #else #define NR_VM_NUMA_EVENT_ITEMS 0 #endif enum zone_stat_item { /* First 128 byte cacheline (assuming 64 bit words) */ NR_FREE_PAGES, NR_ZONE_LRU_BASE, /* Used only for compaction and reclaim retry */ NR_ZONE_INACTIVE_ANON = NR_ZONE_LRU_BASE, NR_ZONE_ACTIVE_ANON, NR_ZONE_INACTIVE_FILE, NR_ZONE_ACTIVE_FILE, NR_ZONE_UNEVICTABLE, NR_ZONE_WRITE_PENDING, /* Count of dirty, writeback and unstable pages */ NR_MLOCK, /* mlock()ed pages found and moved off LRU */ /* Second 128 byte cacheline */ NR_BOUNCE, #if IS_ENABLED(CONFIG_ZSMALLOC) NR_ZSPAGES, /* allocated in zsmalloc */ #endif NR_FREE_CMA_PAGES, NR_VM_ZONE_STAT_ITEMS }; enum node_stat_item { NR_LRU_BASE, NR_INACTIVE_ANON = NR_LRU_BASE, /* must match order of LRU_[IN]ACTIVE */ NR_ACTIVE_ANON, /* " " " " " */ NR_INACTIVE_FILE, /* " " " " " */ NR_ACTIVE_FILE, /* " " " " " */ NR_UNEVICTABLE, /* " " " " " */ NR_SLAB_RECLAIMABLE_B, NR_SLAB_UNRECLAIMABLE_B, NR_ISOLATED_ANON, /* Temporary isolated pages from anon lru */ NR_ISOLATED_FILE, /* Temporary isolated pages from file lru */ WORKINGSET_NODES, WORKINGSET_REFAULT_BASE, WORKINGSET_REFAULT_ANON = WORKINGSET_REFAULT_BASE, WORKINGSET_REFAULT_FILE, WORKINGSET_ACTIVATE_BASE, WORKINGSET_ACTIVATE_ANON = WORKINGSET_ACTIVATE_BASE, WORKINGSET_ACTIVATE_FILE, WORKINGSET_RESTORE_BASE, WORKINGSET_RESTORE_ANON = WORKINGSET_RESTORE_BASE, WORKINGSET_RESTORE_FILE, WORKINGSET_NODERECLAIM, NR_ANON_MAPPED, /* Mapped anonymous pages */ NR_FILE_MAPPED, /* pagecache pages mapped into pagetables. only modified from process context */ NR_FILE_PAGES, NR_FILE_DIRTY, NR_WRITEBACK, NR_WRITEBACK_TEMP, /* Writeback using temporary buffers */ NR_SHMEM, /* shmem pages (included tmpfs/GEM pages) */ NR_SHMEM_THPS, NR_SHMEM_PMDMAPPED, NR_FILE_THPS, NR_FILE_PMDMAPPED, NR_ANON_THPS, NR_VMSCAN_WRITE, NR_VMSCAN_IMMEDIATE, /* Prioritise for reclaim when writeback ends */ NR_DIRTIED, /* page dirtyings since bootup */ NR_WRITTEN, /* page writings since bootup */ NR_KERNEL_MISC_RECLAIMABLE, /* reclaimable non-slab kernel pages */ NR_FOLL_PIN_ACQUIRED, /* via: pin_user_page(), gup flag: FOLL_PIN */ NR_FOLL_PIN_RELEASED, /* pages returned via unpin_user_page() */ NR_KERNEL_STACK_KB, /* measured in KiB */ #if IS_ENABLED(CONFIG_SHADOW_CALL_STACK) NR_KERNEL_SCS_KB, /* measured in KiB */ #endif NR_PAGETABLE, /* used for pagetables */ #ifdef CONFIG_SWAP NR_SWAPCACHE, #endif NR_VM_NODE_STAT_ITEMS }; /* * Returns true if the item should be printed in THPs (/proc/vmstat * currently prints number of anon, file and shmem THPs. But the item * is charged in pages). */ static __always_inline bool vmstat_item_print_in_thp(enum node_stat_item item) { if (!IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) return false; return item == NR_ANON_THPS || item == NR_FILE_THPS || item == NR_SHMEM_THPS || item == NR_SHMEM_PMDMAPPED || item == NR_FILE_PMDMAPPED; } /* * Returns true if the value is measured in bytes (most vmstat values are * measured in pages). This defines the API part, the internal representation * might be different. */ static __always_inline bool vmstat_item_in_bytes(int idx) { /* * Global and per-node slab counters track slab pages. * It's expected that changes are multiples of PAGE_SIZE. * Internally values are stored in pages. * * Per-memcg and per-lruvec counters track memory, consumed * by individual slab objects. These counters are actually * byte-precise. */ return (idx == NR_SLAB_RECLAIMABLE_B || idx == NR_SLAB_UNRECLAIMABLE_B); } /* * We do arithmetic on the LRU lists in various places in the code, * so it is important to keep the active lists LRU_ACTIVE higher in * the array than the corresponding inactive lists, and to keep * the *_FILE lists LRU_FILE higher than the corresponding _ANON lists. * * This has to be kept in sync with the statistics in zone_stat_item * above and the descriptions in vmstat_text in mm/vmstat.c */ #define LRU_BASE 0 #define LRU_ACTIVE 1 #define LRU_FILE 2 enum lru_list { LRU_INACTIVE_ANON = LRU_BASE, LRU_ACTIVE_ANON = LRU_BASE + LRU_ACTIVE, LRU_INACTIVE_FILE = LRU_BASE + LRU_FILE, LRU_ACTIVE_FILE = LRU_BASE + LRU_FILE + LRU_ACTIVE, LRU_UNEVICTABLE, NR_LRU_LISTS }; #define for_each_lru(lru) for (lru = 0; lru < NR_LRU_LISTS; lru++) #define for_each_evictable_lru(lru) for (lru = 0; lru <= LRU_ACTIVE_FILE; lru++) static inline bool is_file_lru(enum lru_list lru) { return (lru == LRU_INACTIVE_FILE || lru == LRU_ACTIVE_FILE); } static inline bool is_active_lru(enum lru_list lru) { return (lru == LRU_ACTIVE_ANON || lru == LRU_ACTIVE_FILE); } #define ANON_AND_FILE 2 enum lruvec_flags { LRUVEC_CONGESTED, /* lruvec has many dirty pages * backed by a congested BDI */ }; struct lruvec { struct list_head lists[NR_LRU_LISTS]; /* per lruvec lru_lock for memcg */ spinlock_t lru_lock; /* * These track the cost of reclaiming one LRU - file or anon - * over the other. As the observed cost of reclaiming one LRU * increases, the reclaim scan balance tips toward the other. */ unsigned long anon_cost; unsigned long file_cost; /* Non-resident age, driven by LRU movement */ atomic_long_t nonresident_age; /* Refaults at the time of last reclaim cycle */ unsigned long refaults[ANON_AND_FILE]; /* Various lruvec state flags (enum lruvec_flags) */ unsigned long flags; #ifdef CONFIG_MEMCG struct pglist_data *pgdat; #endif }; /* Isolate unmapped pages */ #define ISOLATE_UNMAPPED ((__force isolate_mode_t)0x2) /* Isolate for asynchronous migration */ #define ISOLATE_ASYNC_MIGRATE ((__force isolate_mode_t)0x4) /* Isolate unevictable pages */ #define ISOLATE_UNEVICTABLE ((__force isolate_mode_t)0x8) /* LRU Isolation modes. */ typedef unsigned __bitwise isolate_mode_t; enum zone_watermarks { WMARK_MIN, WMARK_LOW, WMARK_HIGH, NR_WMARK }; /* * One per migratetype for each PAGE_ALLOC_COSTLY_ORDER plus one additional * for pageblock size for THP if configured. */ #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define NR_PCP_THP 1 #else #define NR_PCP_THP 0 #endif #define NR_PCP_LISTS (MIGRATE_PCPTYPES * (PAGE_ALLOC_COSTLY_ORDER + 1 + NR_PCP_THP)) /* * Shift to encode migratetype and order in the same integer, with order * in the least significant bits. */ #define NR_PCP_ORDER_WIDTH 8 #define NR_PCP_ORDER_MASK ((1<<NR_PCP_ORDER_WIDTH) - 1) #define min_wmark_pages(z) (z->_watermark[WMARK_MIN] + z->watermark_boost) #define low_wmark_pages(z) (z->_watermark[WMARK_LOW] + z->watermark_boost) #define high_wmark_pages(z) (z->_watermark[WMARK_HIGH] + z->watermark_boost) #define wmark_pages(z, i) (z->_watermark[i] + z->watermark_boost) /* Fields and list protected by pagesets local_lock in page_alloc.c */ struct per_cpu_pages { int count; /* number of pages in the list */ int high; /* high watermark, emptying needed */ int batch; /* chunk size for buddy add/remove */ short free_factor; /* batch scaling factor during free */ #ifdef CONFIG_NUMA short expire; /* When 0, remote pagesets are drained */ #endif /* Lists of pages, one per migrate type stored on the pcp-lists */ struct list_head lists[NR_PCP_LISTS]; }; struct per_cpu_zonestat { #ifdef CONFIG_SMP s8 vm_stat_diff[NR_VM_ZONE_STAT_ITEMS]; s8 stat_threshold; #endif #ifdef CONFIG_NUMA /* * Low priority inaccurate counters that are only folded * on demand. Use a large type to avoid the overhead of * folding during refresh_cpu_vm_stats. */ unsigned long vm_numa_event[NR_VM_NUMA_EVENT_ITEMS]; #endif }; struct per_cpu_nodestat { s8 stat_threshold; s8 vm_node_stat_diff[NR_VM_NODE_STAT_ITEMS]; }; #endif /* !__GENERATING_BOUNDS.H */ enum zone_type { /* * ZONE_DMA and ZONE_DMA32 are used when there are peripherals not able * to DMA to all of the addressable memory (ZONE_NORMAL). * On architectures where this area covers the whole 32 bit address * space ZONE_DMA32 is used. ZONE_DMA is left for the ones with smaller * DMA addressing constraints. This distinction is important as a 32bit * DMA mask is assumed when ZONE_DMA32 is defined. Some 64-bit * platforms may need both zones as they support peripherals with * different DMA addressing limitations. */ #ifdef CONFIG_ZONE_DMA ZONE_DMA, #endif #ifdef CONFIG_ZONE_DMA32 ZONE_DMA32, #endif /* * Normal addressable memory is in ZONE_NORMAL. DMA operations can be * performed on pages in ZONE_NORMAL if the DMA devices support * transfers to all addressable memory. */ ZONE_NORMAL, #ifdef CONFIG_HIGHMEM /* * A memory area that is only addressable by the kernel through * mapping portions into its own address space. This is for example * used by i386 to allow the kernel to address the memory beyond * 900MB. The kernel will set up special mappings (page * table entries on i386) for each page that the kernel needs to * access. */ ZONE_HIGHMEM, #endif /* * ZONE_MOVABLE is similar to ZONE_NORMAL, except that it contains * movable pages with few exceptional cases described below. Main use * cases for ZONE_MOVABLE are to make memory offlining/unplug more * likely to succeed, and to locally limit unmovable allocations - e.g., * to increase the number of THP/huge pages. Notable special cases are: * * 1. Pinned pages: (long-term) pinning of movable pages might * essentially turn such pages unmovable. Therefore, we do not allow * pinning long-term pages in ZONE_MOVABLE. When pages are pinned and * faulted, they come from the right zone right away. However, it is * still possible that address space already has pages in * ZONE_MOVABLE at the time when pages are pinned (i.e. user has * touches that memory before pinning). In such case we migrate them * to a different zone. When migration fails - pinning fails. * 2. memblock allocations: kernelcore/movablecore setups might create * situations where ZONE_MOVABLE contains unmovable allocations * after boot. Memory offlining and allocations fail early. * 3. Memory holes: kernelcore/movablecore setups might create very rare * situations where ZONE_MOVABLE contains memory holes after boot, * for example, if we have sections that are only partially * populated. Memory offlining and allocations fail early. * 4. PG_hwpoison pages: while poisoned pages can be skipped during * memory offlining, such pages cannot be allocated. * 5. Unmovable PG_offline pages: in paravirtualized environments, * hotplugged memory blocks might only partially be managed by the * buddy (e.g., via XEN-balloon, Hyper-V balloon, virtio-mem). The * parts not manged by the buddy are unmovable PG_offline pages. In * some cases (virtio-mem), such pages can be skipped during * memory offlining, however, cannot be moved/allocated. These * techniques might use alloc_contig_range() to hide previously * exposed pages from the buddy again (e.g., to implement some sort * of memory unplug in virtio-mem). * 6. ZERO_PAGE(0), kernelcore/movablecore setups might create * situations where ZERO_PAGE(0) which is allocated differently * on different platforms may end up in a movable zone. ZERO_PAGE(0) * cannot be migrated. * 7. Memory-hotplug: when using memmap_on_memory and onlining the * memory to the MOVABLE zone, the vmemmap pages are also placed in * such zone. Such pages cannot be really moved around as they are * self-stored in the range, but they are treated as movable when * the range they describe is about to be offlined. * * In general, no unmovable allocations that degrade memory offlining * should end up in ZONE_MOVABLE. Allocators (like alloc_contig_range()) * have to expect that migrating pages in ZONE_MOVABLE can fail (even * if has_unmovable_pages() states that there are no unmovable pages, * there can be false negatives). */ ZONE_MOVABLE, #ifdef CONFIG_ZONE_DEVICE ZONE_DEVICE, #endif __MAX_NR_ZONES }; #ifndef __GENERATING_BOUNDS_H #define ASYNC_AND_SYNC 2 struct zone { /* Read-mostly fields */ /* zone watermarks, access with *_wmark_pages(zone) macros */ unsigned long _watermark[NR_WMARK]; unsigned long watermark_boost; unsigned long nr_reserved_highatomic; /* * We don't know if the memory that we're going to allocate will be * freeable or/and it will be released eventually, so to avoid totally * wasting several GB of ram we must reserve some of the lower zone * memory (otherwise we risk to run OOM on the lower zones despite * there being tons of freeable ram on the higher zones). This array is * recalculated at runtime if the sysctl_lowmem_reserve_ratio sysctl * changes. */ long lowmem_reserve[MAX_NR_ZONES]; #ifdef CONFIG_NUMA int node; #endif struct pglist_data *zone_pgdat; struct per_cpu_pages __percpu *per_cpu_pageset; struct per_cpu_zonestat __percpu *per_cpu_zonestats; /* * the high and batch values are copied to individual pagesets for * faster access */ int pageset_high; int pageset_batch; #ifndef CONFIG_SPARSEMEM /* * Flags for a pageblock_nr_pages block. See pageblock-flags.h. * In SPARSEMEM, this map is stored in struct mem_section */ unsigned long *pageblock_flags; #endif /* CONFIG_SPARSEMEM */ /* zone_start_pfn == zone_start_paddr >> PAGE_SHIFT */ unsigned long zone_start_pfn; /* * spanned_pages is the total pages spanned by the zone, including * holes, which is calculated as: * spanned_pages = zone_end_pfn - zone_start_pfn; * * present_pages is physical pages existing within the zone, which * is calculated as: * present_pages = spanned_pages - absent_pages(pages in holes); * * present_early_pages is present pages existing within the zone * located on memory available since early boot, excluding hotplugged * memory. * * managed_pages is present pages managed by the buddy system, which * is calculated as (reserved_pages includes pages allocated by the * bootmem allocator): * managed_pages = present_pages - reserved_pages; * * cma pages is present pages that are assigned for CMA use * (MIGRATE_CMA). * * So present_pages may be used by memory hotplug or memory power * management logic to figure out unmanaged pages by checking * (present_pages - managed_pages). And managed_pages should be used * by page allocator and vm scanner to calculate all kinds of watermarks * and thresholds. * * Locking rules: * * zone_start_pfn and spanned_pages are protected by span_seqlock. * It is a seqlock because it has to be read outside of zone->lock, * and it is done in the main allocator path. But, it is written * quite infrequently. * * The span_seq lock is declared along with zone->lock because it is * frequently read in proximity to zone->lock. It's good to * give them a chance of being in the same cacheline. * * Write access to present_pages at runtime should be protected by * mem_hotplug_begin/end(). Any reader who can't tolerant drift of * present_pages should get_online_mems() to get a stable value. */ atomic_long_t managed_pages; unsigned long spanned_pages; unsigned long present_pages; #if defined(CONFIG_MEMORY_HOTPLUG) unsigned long present_early_pages; #endif #ifdef CONFIG_CMA unsigned long cma_pages; #endif const char *name; #ifdef CONFIG_MEMORY_ISOLATION /* * Number of isolated pageblock. It is used to solve incorrect * freepage counting problem due to racy retrieving migratetype * of pageblock. Protected by zone->lock. */ unsigned long nr_isolate_pageblock; #endif #ifdef CONFIG_MEMORY_HOTPLUG /* see spanned/present_pages for more description */ seqlock_t span_seqlock; #endif int initialized; /* Write-intensive fields used from the page allocator */ ZONE_PADDING(_pad1_) /* free areas of different sizes */ struct free_area free_area[MAX_ORDER]; /* zone flags, see below */ unsigned long flags; /* Primarily protects free_area */ spinlock_t lock; /* Write-intensive fields used by compaction and vmstats. */ ZONE_PADDING(_pad2_) /* * When free pages are below this point, additional steps are taken * when reading the number of free pages to avoid per-cpu counter * drift allowing watermarks to be breached */ unsigned long percpu_drift_mark; #if defined CONFIG_COMPACTION || defined CONFIG_CMA /* pfn where compaction free scanner should start */ unsigned long compact_cached_free_pfn; /* pfn where compaction migration scanner should start */ unsigned long compact_cached_migrate_pfn[ASYNC_AND_SYNC]; unsigned long compact_init_migrate_pfn; unsigned long compact_init_free_pfn; #endif #ifdef CONFIG_COMPACTION /* * On compaction failure, 1<<compact_defer_shift compactions * are skipped before trying again. The number attempted since * last failure is tracked with compact_considered. * compact_order_failed is the minimum compaction failed order. */ unsigned int compact_considered; unsigned int compact_defer_shift; int compact_order_failed; #endif #if defined CONFIG_COMPACTION || defined CONFIG_CMA /* Set to true when the PG_migrate_skip bits should be cleared */ bool compact_blockskip_flush; #endif bool contiguous; ZONE_PADDING(_pad3_) /* Zone statistics */ atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS]; atomic_long_t vm_numa_event[NR_VM_NUMA_EVENT_ITEMS]; } ____cacheline_internodealigned_in_smp; enum pgdat_flags { PGDAT_DIRTY, /* reclaim scanning has recently found * many dirty file pages at the tail * of the LRU. */ PGDAT_WRITEBACK, /* reclaim scanning has recently found * many pages under writeback */ PGDAT_RECLAIM_LOCKED, /* prevents concurrent reclaim */ }; enum zone_flags { ZONE_BOOSTED_WATERMARK, /* zone recently boosted watermarks. * Cleared when kswapd is woken. */ ZONE_RECLAIM_ACTIVE, /* kswapd may be scanning the zone. */ }; static inline unsigned long zone_managed_pages(struct zone *zone) { return (unsigned long)atomic_long_read(&zone->managed_pages); } static inline unsigned long zone_cma_pages(struct zone *zone) { #ifdef CONFIG_CMA return zone->cma_pages; #else return 0; #endif } static inline unsigned long zone_end_pfn(const struct zone *zone) { return zone->zone_start_pfn + zone->spanned_pages; } static inline bool zone_spans_pfn(const struct zone *zone, unsigned long pfn) { return zone->zone_start_pfn <= pfn && pfn < zone_end_pfn(zone); } static inline bool zone_is_initialized(struct zone *zone) { return zone->initialized; } static inline bool zone_is_empty(struct zone *zone) { return zone->spanned_pages == 0; } /* * Return true if [start_pfn, start_pfn + nr_pages) range has a non-empty * intersection with the given zone */ static inline bool zone_intersects(struct zone *zone, unsigned long start_pfn, unsigned long nr_pages) { if (zone_is_empty(zone)) return false; if (start_pfn >= zone_end_pfn(zone) || start_pfn + nr_pages <= zone->zone_start_pfn) return false; return true; } /* * The "priority" of VM scanning is how much of the queues we will scan in one * go. A value of 12 for DEF_PRIORITY implies that we will scan 1/4096th of the * queues ("queue_length >> 12") during an aging round. */ #define DEF_PRIORITY 12 /* Maximum number of zones on a zonelist */ #define MAX_ZONES_PER_ZONELIST (MAX_NUMNODES * MAX_NR_ZONES) enum { ZONELIST_FALLBACK, /* zonelist with fallback */ #ifdef CONFIG_NUMA /* * The NUMA zonelists are doubled because we need zonelists that * restrict the allocations to a single node for __GFP_THISNODE. */ ZONELIST_NOFALLBACK, /* zonelist without fallback (__GFP_THISNODE) */ #endif MAX_ZONELISTS }; /* * This struct contains information about a zone in a zonelist. It is stored * here to avoid dereferences into large structures and lookups of tables */ struct zoneref { struct zone *zone; /* Pointer to actual zone */ int zone_idx; /* zone_idx(zoneref->zone) */ }; /* * One allocation request operates on a zonelist. A zonelist * is a list of zones, the first one is the 'goal' of the * allocation, the other zones are fallback zones, in decreasing * priority. * * To speed the reading of the zonelist, the zonerefs contain the zone index * of the entry being read. Helper functions to access information given * a struct zoneref are * * zonelist_zone() - Return the struct zone * for an entry in _zonerefs * zonelist_zone_idx() - Return the index of the zone for an entry * zonelist_node_idx() - Return the index of the node for an entry */ struct zonelist { struct zoneref _zonerefs[MAX_ZONES_PER_ZONELIST + 1]; }; /* * The array of struct pages for flatmem. * It must be declared for SPARSEMEM as well because there are configurations * that rely on that. */ extern struct page *mem_map; #ifdef CONFIG_TRANSPARENT_HUGEPAGE struct deferred_split { spinlock_t split_queue_lock; struct list_head split_queue; unsigned long split_queue_len; }; #endif /* * On NUMA machines, each NUMA node would have a pg_data_t to describe * it's memory layout. On UMA machines there is a single pglist_data which * describes the whole memory. * * Memory statistics and page replacement data structures are maintained on a * per-zone basis. */ typedef struct pglist_data { /* * node_zones contains just the zones for THIS node. Not all of the * zones may be populated, but it is the full list. It is referenced by * this node's node_zonelists as well as other node's node_zonelists. */ struct zone node_zones[MAX_NR_ZONES]; /* * node_zonelists contains references to all zones in all nodes. * Generally the first zones will be references to this node's * node_zones. */ struct zonelist node_zonelists[MAX_ZONELISTS]; int nr_zones; /* number of populated zones in this node */ #ifdef CONFIG_FLATMEM /* means !SPARSEMEM */ struct page *node_mem_map; #ifdef CONFIG_PAGE_EXTENSION struct page_ext *node_page_ext; #endif #endif #if defined(CONFIG_MEMORY_HOTPLUG) || defined(CONFIG_DEFERRED_STRUCT_PAGE_INIT) /* * Must be held any time you expect node_start_pfn, * node_present_pages, node_spanned_pages or nr_zones to stay constant. * Also synchronizes pgdat->first_deferred_pfn during deferred page * init. * * pgdat_resize_lock() and pgdat_resize_unlock() are provided to * manipulate node_size_lock without checking for CONFIG_MEMORY_HOTPLUG * or CONFIG_DEFERRED_STRUCT_PAGE_INIT. * * Nests above zone->lock and zone->span_seqlock */ spinlock_t node_size_lock; #endif unsigned long node_start_pfn; unsigned long node_present_pages; /* total number of physical pages */ unsigned long node_spanned_pages; /* total size of physical page range, including holes */ int node_id; wait_queue_head_t kswapd_wait; wait_queue_head_t pfmemalloc_wait; struct task_struct *kswapd; /* Protected by mem_hotplug_begin/end() */ int kswapd_order; enum zone_type kswapd_highest_zoneidx; int kswapd_failures; /* Number of 'reclaimed == 0' runs */ #ifdef CONFIG_COMPACTION int kcompactd_max_order; enum zone_type kcompactd_highest_zoneidx; wait_queue_head_t kcompactd_wait; struct task_struct *kcompactd; bool proactive_compact_trigger; #endif /* * This is a per-node reserve of pages that are not available * to userspace allocations. */ unsigned long totalreserve_pages; #ifdef CONFIG_NUMA /* * node reclaim becomes active if more unmapped pages exist. */ unsigned long min_unmapped_pages; unsigned long min_slab_pages; #endif /* CONFIG_NUMA */ /* Write-intensive fields used by page reclaim */ ZONE_PADDING(_pad1_) #ifdef CONFIG_DEFERRED_STRUCT_PAGE_INIT /* * If memory initialisation on large machines is deferred then this * is the first PFN that needs to be initialised. */ unsigned long first_deferred_pfn; #endif /* CONFIG_DEFERRED_STRUCT_PAGE_INIT */ #ifdef CONFIG_TRANSPARENT_HUGEPAGE struct deferred_split deferred_split_queue; #endif /* Fields commonly accessed by the page reclaim scanner */ /* * NOTE: THIS IS UNUSED IF MEMCG IS ENABLED. * * Use mem_cgroup_lruvec() to look up lruvecs. */ struct lruvec __lruvec; unsigned long flags; ZONE_PADDING(_pad2_) /* Per-node vmstats */ struct per_cpu_nodestat __percpu *per_cpu_nodestats; atomic_long_t vm_stat[NR_VM_NODE_STAT_ITEMS]; } pg_data_t; #define node_present_pages(nid) (NODE_DATA(nid)->node_present_pages) #define node_spanned_pages(nid) (NODE_DATA(nid)->node_spanned_pages) #ifdef CONFIG_FLATMEM #define pgdat_page_nr(pgdat, pagenr) ((pgdat)->node_mem_map + (pagenr)) #else #define pgdat_page_nr(pgdat, pagenr) pfn_to_page((pgdat)->node_start_pfn + (pagenr)) #endif #define nid_page_nr(nid, pagenr) pgdat_page_nr(NODE_DATA(nid),(pagenr)) #define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) #define node_end_pfn(nid) pgdat_end_pfn(NODE_DATA(nid)) static inline unsigned long pgdat_end_pfn(pg_data_t *pgdat) { return pgdat->node_start_pfn + pgdat->node_spanned_pages; } static inline bool pgdat_is_empty(pg_data_t *pgdat) { return !pgdat->node_start_pfn && !pgdat->node_spanned_pages; } #include <linux/memory_hotplug.h> void build_all_zonelists(pg_data_t *pgdat); void wakeup_kswapd(struct zone *zone, gfp_t gfp_mask, int order, enum zone_type highest_zoneidx); bool __zone_watermark_ok(struct zone *z, unsigned int order, unsigned long mark, int highest_zoneidx, unsigned int alloc_flags, long free_pages); bool zone_watermark_ok(struct zone *z, unsigned int order, unsigned long mark, int highest_zoneidx, unsigned int alloc_flags); bool zone_watermark_ok_safe(struct zone *z, unsigned int order, unsigned long mark, int highest_zoneidx); /* * Memory initialization context, use to differentiate memory added by * the platform statically or via memory hotplug interface. */ enum meminit_context { MEMINIT_EARLY, MEMINIT_HOTPLUG, }; extern void init_currently_empty_zone(struct zone *zone, unsigned long start_pfn, unsigned long size); extern void lruvec_init(struct lruvec *lruvec); static inline struct pglist_data *lruvec_pgdat(struct lruvec *lruvec) { #ifdef CONFIG_MEMCG return lruvec->pgdat; #else return container_of(lruvec, struct pglist_data, __lruvec); #endif } #ifdef CONFIG_HAVE_MEMORYLESS_NODES int local_memory_node(int node_id); #else static inline int local_memory_node(int node_id) { return node_id; }; #endif /* * zone_idx() returns 0 for the ZONE_DMA zone, 1 for the ZONE_NORMAL zone, etc. */ #define zone_idx(zone) ((zone) - (zone)->zone_pgdat->node_zones) #ifdef CONFIG_ZONE_DEVICE static inline bool zone_is_zone_device(struct zone *zone) { return zone_idx(zone) == ZONE_DEVICE; } #else static inline bool zone_is_zone_device(struct zone *zone) { return false; } #endif /* * Returns true if a zone has pages managed by the buddy allocator. * All the reclaim decisions have to use this function rather than * populated_zone(). If the whole zone is reserved then we can easily * end up with populated_zone() && !managed_zone(). */ static inline bool managed_zone(struct zone *zone) { return zone_managed_pages(zone); } /* Returns true if a zone has memory */ static inline bool populated_zone(struct zone *zone) { return zone->present_pages; } #ifdef CONFIG_NUMA static inline int zone_to_nid(struct zone *zone) { return zone->node; } static inline void zone_set_nid(struct zone *zone, int nid) { zone->node = nid; } #else static inline int zone_to_nid(struct zone *zone) { return 0; } static inline void zone_set_nid(struct zone *zone, int nid) {} #endif extern int movable_zone; static inline int is_highmem_idx(enum zone_type idx) { #ifdef CONFIG_HIGHMEM return (idx == ZONE_HIGHMEM || (idx == ZONE_MOVABLE && movable_zone == ZONE_HIGHMEM)); #else return 0; #endif } #ifdef CONFIG_ZONE_DMA bool has_managed_dma(void); #else static inline bool has_managed_dma(void) { return false; } #endif /** * is_highmem - helper function to quickly check if a struct zone is a * highmem zone or not. This is an attempt to keep references * to ZONE_{DMA/NORMAL/HIGHMEM/etc} in general code to a minimum. * @zone: pointer to struct zone variable * Return: 1 for a highmem zone, 0 otherwise */ static inline int is_highmem(struct zone *zone) { #ifdef CONFIG_HIGHMEM return is_highmem_idx(zone_idx(zone)); #else return 0; #endif } /* These two functions are used to setup the per zone pages min values */ struct ctl_table; int min_free_kbytes_sysctl_handler(struct ctl_table *, int, void *, size_t *, loff_t *); int watermark_scale_factor_sysctl_handler(struct ctl_table *, int, void *, size_t *, loff_t *); extern int sysctl_lowmem_reserve_ratio[MAX_NR_ZONES]; int lowmem_reserve_ratio_sysctl_handler(struct ctl_table *, int, void *, size_t *, loff_t *); int percpu_pagelist_high_fraction_sysctl_handler(struct ctl_table *, int, void *, size_t *, loff_t *); int sysctl_min_unmapped_ratio_sysctl_handler(struct ctl_table *, int, void *, size_t *, loff_t *); int sysctl_min_slab_ratio_sysctl_handler(struct ctl_table *, int, void *, size_t *, loff_t *); int numa_zonelist_order_handler(struct ctl_table *, int, void *, size_t *, loff_t *); extern int percpu_pagelist_high_fraction; extern char numa_zonelist_order[]; #define NUMA_ZONELIST_ORDER_LEN 16 #ifndef CONFIG_NUMA extern struct pglist_data contig_page_data; static inline struct pglist_data *NODE_DATA(int nid) { return &contig_page_data; } #define NODE_MEM_MAP(nid) mem_map #else /* CONFIG_NUMA */ #include <asm/mmzone.h> #endif /* !CONFIG_NUMA */ extern struct pglist_data *first_online_pgdat(void); extern struct pglist_data *next_online_pgdat(struct pglist_data *pgdat); extern struct zone *next_zone(struct zone *zone); /** * for_each_online_pgdat - helper macro to iterate over all online nodes * @pgdat: pointer to a pg_data_t variable */ #define for_each_online_pgdat(pgdat) \ for (pgdat = first_online_pgdat(); \ pgdat; \ pgdat = next_online_pgdat(pgdat)) /** * for_each_zone - helper macro to iterate over all memory zones * @zone: pointer to struct zone variable * * The user only needs to declare the zone variable, for_each_zone * fills it in. */ #define for_each_zone(zone) \ for (zone = (first_online_pgdat())->node_zones; \ zone; \ zone = next_zone(zone)) #define for_each_populated_zone(zone) \ for (zone = (first_online_pgdat())->node_zones; \ zone; \ zone = next_zone(zone)) \ if (!populated_zone(zone)) \ ; /* do nothing */ \ else static inline struct zone *zonelist_zone(struct zoneref *zoneref) { return zoneref->zone; } static inline int zonelist_zone_idx(struct zoneref *zoneref) { return zoneref->zone_idx; } static inline int zonelist_node_idx(struct zoneref *zoneref) { return zone_to_nid(zoneref->zone); } struct zoneref *__next_zones_zonelist(struct zoneref *z, enum zone_type highest_zoneidx, nodemask_t *nodes); /** * next_zones_zonelist - Returns the next zone at or below highest_zoneidx within the allowed nodemask using a cursor within a zonelist as a starting point * @z: The cursor used as a starting point for the search * @highest_zoneidx: The zone index of the highest zone to return * @nodes: An optional nodemask to filter the zonelist with * * This function returns the next zone at or below a given zone index that is * within the allowed nodemask using a cursor as the starting point for the * search. The zoneref returned is a cursor that represents the current zone * being examined. It should be advanced by one before calling * next_zones_zonelist again. * * Return: the next zone at or below highest_zoneidx within the allowed * nodemask using a cursor within a zonelist as a starting point */ static __always_inline struct zoneref *next_zones_zonelist(struct zoneref *z, enum zone_type highest_zoneidx, nodemask_t *nodes) { if (likely(!nodes && zonelist_zone_idx(z) <= highest_zoneidx)) return z; return __next_zones_zonelist(z, highest_zoneidx, nodes); } /** * first_zones_zonelist - Returns the first zone at or below highest_zoneidx within the allowed nodemask in a zonelist * @zonelist: The zonelist to search for a suitable zone * @highest_zoneidx: The zone index of the highest zone to return * @nodes: An optional nodemask to filter the zonelist with * * This function returns the first zone at or below a given zone index that is * within the allowed nodemask. The zoneref returned is a cursor that can be * used to iterate the zonelist with next_zones_zonelist by advancing it by * one before calling. * * When no eligible zone is found, zoneref->zone is NULL (zoneref itself is * never NULL). This may happen either genuinely, or due to concurrent nodemask * update due to cpuset modification. * * Return: Zoneref pointer for the first suitable zone found */ static inline struct zoneref *first_zones_zonelist(struct zonelist *zonelist, enum zone_type highest_zoneidx, nodemask_t *nodes) { return next_zones_zonelist(zonelist->_zonerefs, highest_zoneidx, nodes); } /** * for_each_zone_zonelist_nodemask - helper macro to iterate over valid zones in a zonelist at or below a given zone index and within a nodemask * @zone: The current zone in the iterator * @z: The current pointer within zonelist->_zonerefs being iterated * @zlist: The zonelist being iterated * @highidx: The zone index of the highest zone to return * @nodemask: Nodemask allowed by the allocator * * This iterator iterates though all zones at or below a given zone index and * within a given nodemask */ #define for_each_zone_zonelist_nodemask(zone, z, zlist, highidx, nodemask) \ for (z = first_zones_zonelist(zlist, highidx, nodemask), zone = zonelist_zone(z); \ zone; \ z = next_zones_zonelist(++z, highidx, nodemask), \ zone = zonelist_zone(z)) #define for_next_zone_zonelist_nodemask(zone, z, highidx, nodemask) \ for (zone = z->zone; \ zone; \ z = next_zones_zonelist(++z, highidx, nodemask), \ zone = zonelist_zone(z)) /** * for_each_zone_zonelist - helper macro to iterate over valid zones in a zonelist at or below a given zone index * @zone: The current zone in the iterator * @z: The current pointer within zonelist->zones being iterated * @zlist: The zonelist being iterated * @highidx: The zone index of the highest zone to return * * This iterator iterates though all zones at or below a given zone index. */ #define for_each_zone_zonelist(zone, z, zlist, highidx) \ for_each_zone_zonelist_nodemask(zone, z, zlist, highidx, NULL) /* Whether the 'nodes' are all movable nodes */ static inline bool movable_only_nodes(nodemask_t *nodes) { struct zonelist *zonelist; struct zoneref *z; int nid; if (nodes_empty(*nodes)) return false; /* * We can chose arbitrary node from the nodemask to get a * zonelist as they are interlinked. We just need to find * at least one zone that can satisfy kernel allocations. */ nid = first_node(*nodes); zonelist = &NODE_DATA(nid)->node_zonelists[ZONELIST_FALLBACK]; z = first_zones_zonelist(zonelist, ZONE_NORMAL, nodes); return (!z->zone) ? true : false; } #ifdef CONFIG_SPARSEMEM #include <asm/sparsemem.h> #endif #ifdef CONFIG_FLATMEM #define pfn_to_nid(pfn) (0) #endif #ifdef CONFIG_SPARSEMEM /* * PA_SECTION_SHIFT physical address to/from section number * PFN_SECTION_SHIFT pfn to/from section number */ #define PA_SECTION_SHIFT (SECTION_SIZE_BITS) #define PFN_SECTION_SHIFT (SECTION_SIZE_BITS - PAGE_SHIFT) #define NR_MEM_SECTIONS (1UL << SECTIONS_SHIFT) #define PAGES_PER_SECTION (1UL << PFN_SECTION_SHIFT) #define PAGE_SECTION_MASK (~(PAGES_PER_SECTION-1)) #define SECTION_BLOCKFLAGS_BITS \ ((1UL << (PFN_SECTION_SHIFT - pageblock_order)) * NR_PAGEBLOCK_BITS) #if (MAX_ORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS #error Allocator MAX_ORDER exceeds SECTION_SIZE #endif static inline unsigned long pfn_to_section_nr(unsigned long pfn) { return pfn >> PFN_SECTION_SHIFT; } static inline unsigned long section_nr_to_pfn(unsigned long sec) { return sec << PFN_SECTION_SHIFT; } #define SECTION_ALIGN_UP(pfn) (((pfn) + PAGES_PER_SECTION - 1) & PAGE_SECTION_MASK) #define SECTION_ALIGN_DOWN(pfn) ((pfn) & PAGE_SECTION_MASK) #define SUBSECTION_SHIFT 21 #define SUBSECTION_SIZE (1UL << SUBSECTION_SHIFT) #define PFN_SUBSECTION_SHIFT (SUBSECTION_SHIFT - PAGE_SHIFT) #define PAGES_PER_SUBSECTION (1UL << PFN_SUBSECTION_SHIFT) #define PAGE_SUBSECTION_MASK (~(PAGES_PER_SUBSECTION-1)) #if SUBSECTION_SHIFT > SECTION_SIZE_BITS #error Subsection size exceeds section size #else #define SUBSECTIONS_PER_SECTION (1UL << (SECTION_SIZE_BITS - SUBSECTION_SHIFT)) #endif #define SUBSECTION_ALIGN_UP(pfn) ALIGN((pfn), PAGES_PER_SUBSECTION) #define SUBSECTION_ALIGN_DOWN(pfn) ((pfn) & PAGE_SUBSECTION_MASK) struct mem_section_usage { struct rcu_head rcu; #ifdef CONFIG_SPARSEMEM_VMEMMAP DECLARE_BITMAP(subsection_map, SUBSECTIONS_PER_SECTION); #endif /* See declaration of similar field in struct zone */ unsigned long pageblock_flags[0]; }; void subsection_map_init(unsigned long pfn, unsigned long nr_pages); struct page; struct page_ext; struct mem_section { /* * This is, logically, a pointer to an array of struct * pages. However, it is stored with some other magic. * (see sparse.c::sparse_init_one_section()) * * Additionally during early boot we encode node id of * the location of the section here to guide allocation. * (see sparse.c::memory_present()) * * Making it a UL at least makes someone do a cast * before using it wrong. */ unsigned long section_mem_map; struct mem_section_usage *usage; #ifdef CONFIG_PAGE_EXTENSION /* * If SPARSEMEM, pgdat doesn't have page_ext pointer. We use * section. (see page_ext.h about this.) */ struct page_ext *page_ext; unsigned long pad; #endif /* * WARNING: mem_section must be a power-of-2 in size for the * calculation and use of SECTION_ROOT_MASK to make sense. */ }; #ifdef CONFIG_SPARSEMEM_EXTREME #define SECTIONS_PER_ROOT (PAGE_SIZE / sizeof (struct mem_section)) #else #define SECTIONS_PER_ROOT 1 #endif #define SECTION_NR_TO_ROOT(sec) ((sec) / SECTIONS_PER_ROOT) #define NR_SECTION_ROOTS DIV_ROUND_UP(NR_MEM_SECTIONS, SECTIONS_PER_ROOT) #define SECTION_ROOT_MASK (SECTIONS_PER_ROOT - 1) #ifdef CONFIG_SPARSEMEM_EXTREME extern struct mem_section **mem_section; #else extern struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT]; #endif static inline unsigned long *section_to_usemap(struct mem_section *ms) { return ms->usage->pageblock_flags; } static inline struct mem_section *__nr_to_section(unsigned long nr) { unsigned long root = SECTION_NR_TO_ROOT(nr); if (unlikely(root >= NR_SECTION_ROOTS)) return NULL; #ifdef CONFIG_SPARSEMEM_EXTREME if (!mem_section || !mem_section[root]) return NULL; #endif return &mem_section[root][nr & SECTION_ROOT_MASK]; } extern size_t mem_section_usage_size(void); /* * We use the lower bits of the mem_map pointer to store * a little bit of information. The pointer is calculated * as mem_map - section_nr_to_pfn(pnum). The result is * aligned to the minimum alignment of the two values: * 1. All mem_map arrays are page-aligned. * 2. section_nr_to_pfn() always clears PFN_SECTION_SHIFT * lowest bits. PFN_SECTION_SHIFT is arch-specific * (equal SECTION_SIZE_BITS - PAGE_SHIFT), and the * worst combination is powerpc with 256k pages, * which results in PFN_SECTION_SHIFT equal 6. * To sum it up, at least 6 bits are available. */ #define SECTION_MARKED_PRESENT (1UL<<0) #define SECTION_HAS_MEM_MAP (1UL<<1) #define SECTION_IS_ONLINE (1UL<<2) #define SECTION_IS_EARLY (1UL<<3) #define SECTION_TAINT_ZONE_DEVICE (1UL<<4) #define SECTION_MAP_LAST_BIT (1UL<<5) #define SECTION_MAP_MASK (~(SECTION_MAP_LAST_BIT-1)) #define SECTION_NID_SHIFT 6 static inline struct page *__section_mem_map_addr(struct mem_section *section) { unsigned long map = section->section_mem_map; map &= SECTION_MAP_MASK; return (struct page *)map; } static inline int present_section(struct mem_section *section) { return (section && (section->section_mem_map & SECTION_MARKED_PRESENT)); } static inline int present_section_nr(unsigned long nr) { return present_section(__nr_to_section(nr)); } static inline int valid_section(struct mem_section *section) { return (section && (section->section_mem_map & SECTION_HAS_MEM_MAP)); } static inline int early_section(struct mem_section *section) { return (section && (section->section_mem_map & SECTION_IS_EARLY)); } static inline int valid_section_nr(unsigned long nr) { return valid_section(__nr_to_section(nr)); } static inline int online_section(struct mem_section *section) { return (section && (section->section_mem_map & SECTION_IS_ONLINE)); } static inline int online_device_section(struct mem_section *section) { unsigned long flags = SECTION_IS_ONLINE | SECTION_TAINT_ZONE_DEVICE; return section && ((section->section_mem_map & flags) == flags); } static inline int online_section_nr(unsigned long nr) { return online_section(__nr_to_section(nr)); } #ifdef CONFIG_MEMORY_HOTPLUG void online_mem_sections(unsigned long start_pfn, unsigned long end_pfn); void offline_mem_sections(unsigned long start_pfn, unsigned long end_pfn); #endif static inline struct mem_section *__pfn_to_section(unsigned long pfn) { return __nr_to_section(pfn_to_section_nr(pfn)); } extern unsigned long __highest_present_section_nr; static inline int subsection_map_index(unsigned long pfn) { return (pfn & ~(PAGE_SECTION_MASK)) / PAGES_PER_SUBSECTION; } #ifdef CONFIG_SPARSEMEM_VMEMMAP static inline int pfn_section_valid(struct mem_section *ms, unsigned long pfn) { int idx = subsection_map_index(pfn); struct mem_section_usage *usage = READ_ONCE(ms->usage); return usage ? test_bit(idx, usage->subsection_map) : 0; } #else static inline int pfn_section_valid(struct mem_section *ms, unsigned long pfn) { return 1; } #endif #ifndef CONFIG_HAVE_ARCH_PFN_VALID /** * pfn_valid - check if there is a valid memory map entry for a PFN * @pfn: the page frame number to check * * Check if there is a valid memory map entry aka struct page for the @pfn. * Note, that availability of the memory map entry does not imply that * there is actual usable memory at that @pfn. The struct page may * represent a hole or an unusable page frame. * * Return: 1 for PFNs that have memory map entries and 0 otherwise */ static inline int pfn_valid(unsigned long pfn) { struct mem_section *ms; int ret; /* * Ensure the upper PAGE_SHIFT bits are clear in the * pfn. Else it might lead to false positives when * some of the upper bits are set, but the lower bits * match a valid pfn. */ if (PHYS_PFN(PFN_PHYS(pfn)) != pfn) return 0; if (pfn_to_section_nr(pfn) >= NR_MEM_SECTIONS) return 0; ms = __pfn_to_section(pfn); rcu_read_lock(); if (!valid_section(ms)) { rcu_read_unlock(); return 0; } /* * Traditionally early sections always returned pfn_valid() for * the entire section-sized span. */ ret = early_section(ms) || pfn_section_valid(ms, pfn); rcu_read_unlock(); return ret; } #endif static inline int pfn_in_present_section(unsigned long pfn) { if (pfn_to_section_nr(pfn) >= NR_MEM_SECTIONS) return 0; return present_section(__pfn_to_section(pfn)); } static inline unsigned long next_present_section_nr(unsigned long section_nr) { while (++section_nr <= __highest_present_section_nr) { if (present_section_nr(section_nr)) return section_nr; } return -1; } /* * These are _only_ used during initialisation, therefore they * can use __initdata ... They could have names to indicate * this restriction. */ #ifdef CONFIG_NUMA #define pfn_to_nid(pfn) \ ({ \ unsigned long __pfn_to_nid_pfn = (pfn); \ page_to_nid(pfn_to_page(__pfn_to_nid_pfn)); \ }) #else #define pfn_to_nid(pfn) (0) #endif void sparse_init(void); #else #define sparse_init() do {} while (0) #define sparse_index_init(_sec, _nid) do {} while (0) #define pfn_in_present_section pfn_valid #define subsection_map_init(_pfn, _nr_pages) do {} while (0) #endif /* CONFIG_SPARSEMEM */ #endif /* !__GENERATING_BOUNDS.H */ #endif /* !__ASSEMBLY__ */ #endif /* _LINUX_MMZONE_H */ PK ! ��� ioam6_genl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * IPv6 IOAM Generic Netlink API * * Author: * Justin Iurman <justin.iurman@uliege.be> */ #ifndef _LINUX_IOAM6_GENL_H #define _LINUX_IOAM6_GENL_H #include <uapi/linux/ioam6_genl.h> #endif /* _LINUX_IOAM6_GENL_H */ PK ! Sfҭ� � genalloc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Basic general purpose allocator for managing special purpose * memory, for example, memory that is not managed by the regular * kmalloc/kfree interface. Uses for this includes on-device special * memory, uncached memory etc. * * It is safe to use the allocator in NMI handlers and other special * unblockable contexts that could otherwise deadlock on locks. This * is implemented by using atomic operations and retries on any * conflicts. The disadvantage is that there may be livelocks in * extreme cases. For better scalability, one allocator can be used * for each CPU. * * The lockless operation only works if there is enough memory * available. If new memory is added to the pool a lock has to be * still taken. So any user relying on locklessness has to ensure * that sufficient memory is preallocated. * * The basic atomic operation of this allocator is cmpxchg on long. * On architectures that don't have NMI-safe cmpxchg implementation, * the allocator can NOT be used in NMI handler. So code uses the * allocator in NMI handler should depend on * CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG. */ #ifndef __GENALLOC_H__ #define __GENALLOC_H__ #include <linux/types.h> #include <linux/spinlock_types.h> #include <linux/atomic.h> struct device; struct device_node; struct gen_pool; /** * typedef genpool_algo_t: Allocation callback function type definition * @map: Pointer to bitmap * @size: The bitmap size in bits * @start: The bitnumber to start searching at * @nr: The number of zeroed bits we're looking for * @data: optional additional data used by the callback * @pool: the pool being allocated from * @start_addr: start address of memory chunk */ typedef unsigned long (*genpool_algo_t)(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, void *data, struct gen_pool *pool, unsigned long start_addr); /* * General purpose special memory pool descriptor. */ struct gen_pool { spinlock_t lock; struct list_head chunks; /* list of chunks in this pool */ int min_alloc_order; /* minimum allocation order */ genpool_algo_t algo; /* allocation function */ void *data; const char *name; }; /* * General purpose special memory pool chunk descriptor. */ struct gen_pool_chunk { struct list_head next_chunk; /* next chunk in pool */ atomic_long_t avail; phys_addr_t phys_addr; /* physical starting address of memory chunk */ void *owner; /* private data to retrieve at alloc time */ unsigned long start_addr; /* start address of memory chunk */ unsigned long end_addr; /* end address of memory chunk (inclusive) */ unsigned long bits[]; /* bitmap for allocating memory chunk */ }; /* * gen_pool data descriptor for gen_pool_first_fit_align. */ struct genpool_data_align { int align; /* alignment by bytes for starting address */ }; /* * gen_pool data descriptor for gen_pool_fixed_alloc. */ struct genpool_data_fixed { unsigned long offset; /* The offset of the specific region */ }; extern struct gen_pool *gen_pool_create(int, int); extern phys_addr_t gen_pool_virt_to_phys(struct gen_pool *pool, unsigned long); extern int gen_pool_add_owner(struct gen_pool *, unsigned long, phys_addr_t, size_t, int, void *); static inline int gen_pool_add_virt(struct gen_pool *pool, unsigned long addr, phys_addr_t phys, size_t size, int nid) { return gen_pool_add_owner(pool, addr, phys, size, nid, NULL); } /** * gen_pool_add - add a new chunk of special memory to the pool * @pool: pool to add new memory chunk to * @addr: starting address of memory chunk to add to pool * @size: size in bytes of the memory chunk to add to pool * @nid: node id of the node the chunk structure and bitmap should be * allocated on, or -1 * * Add a new chunk of special memory to the specified pool. * * Returns 0 on success or a -ve errno on failure. */ static inline int gen_pool_add(struct gen_pool *pool, unsigned long addr, size_t size, int nid) { return gen_pool_add_virt(pool, addr, -1, size, nid); } extern void gen_pool_destroy(struct gen_pool *); unsigned long gen_pool_alloc_algo_owner(struct gen_pool *pool, size_t size, genpool_algo_t algo, void *data, void **owner); static inline unsigned long gen_pool_alloc_owner(struct gen_pool *pool, size_t size, void **owner) { return gen_pool_alloc_algo_owner(pool, size, pool->algo, pool->data, owner); } static inline unsigned long gen_pool_alloc_algo(struct gen_pool *pool, size_t size, genpool_algo_t algo, void *data) { return gen_pool_alloc_algo_owner(pool, size, algo, data, NULL); } /** * gen_pool_alloc - allocate special memory from the pool * @pool: pool to allocate from * @size: number of bytes to allocate from the pool * * Allocate the requested number of bytes from the specified pool. * Uses the pool allocation function (with first-fit algorithm by default). * Can not be used in NMI handler on architectures without * NMI-safe cmpxchg implementation. */ static inline unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size) { return gen_pool_alloc_algo(pool, size, pool->algo, pool->data); } extern void *gen_pool_dma_alloc(struct gen_pool *pool, size_t size, dma_addr_t *dma); extern void *gen_pool_dma_alloc_algo(struct gen_pool *pool, size_t size, dma_addr_t *dma, genpool_algo_t algo, void *data); extern void *gen_pool_dma_alloc_align(struct gen_pool *pool, size_t size, dma_addr_t *dma, int align); extern void *gen_pool_dma_zalloc(struct gen_pool *pool, size_t size, dma_addr_t *dma); extern void *gen_pool_dma_zalloc_algo(struct gen_pool *pool, size_t size, dma_addr_t *dma, genpool_algo_t algo, void *data); extern void *gen_pool_dma_zalloc_align(struct gen_pool *pool, size_t size, dma_addr_t *dma, int align); extern void gen_pool_free_owner(struct gen_pool *pool, unsigned long addr, size_t size, void **owner); static inline void gen_pool_free(struct gen_pool *pool, unsigned long addr, size_t size) { gen_pool_free_owner(pool, addr, size, NULL); } extern void gen_pool_for_each_chunk(struct gen_pool *, void (*)(struct gen_pool *, struct gen_pool_chunk *, void *), void *); extern size_t gen_pool_avail(struct gen_pool *); extern size_t gen_pool_size(struct gen_pool *); extern void gen_pool_set_algo(struct gen_pool *pool, genpool_algo_t algo, void *data); extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, void *data, struct gen_pool *pool, unsigned long start_addr); extern unsigned long gen_pool_fixed_alloc(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, void *data, struct gen_pool *pool, unsigned long start_addr); extern unsigned long gen_pool_first_fit_align(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, void *data, struct gen_pool *pool, unsigned long start_addr); extern unsigned long gen_pool_first_fit_order_align(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, void *data, struct gen_pool *pool, unsigned long start_addr); extern unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size, unsigned long start, unsigned int nr, void *data, struct gen_pool *pool, unsigned long start_addr); extern struct gen_pool *devm_gen_pool_create(struct device *dev, int min_alloc_order, int nid, const char *name); extern struct gen_pool *gen_pool_get(struct device *dev, const char *name); extern bool gen_pool_has_addr(struct gen_pool *pool, unsigned long start, size_t size); #ifdef CONFIG_OF extern struct gen_pool *of_gen_pool_get(struct device_node *np, const char *propname, int index); #else static inline struct gen_pool *of_gen_pool_get(struct device_node *np, const char *propname, int index) { return NULL; } #endif #endif /* __GENALLOC_H__ */ PK ! YP�q user.hnu �[��� #include <asm/user.h> PK ! ] )(� � mpls.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MPLS_H #define _LINUX_MPLS_H #include <uapi/linux/mpls.h> #define MPLS_TTL_MASK (MPLS_LS_TTL_MASK >> MPLS_LS_TTL_SHIFT) #define MPLS_BOS_MASK (MPLS_LS_S_MASK >> MPLS_LS_S_SHIFT) #define MPLS_TC_MASK (MPLS_LS_TC_MASK >> MPLS_LS_TC_SHIFT) #define MPLS_LABEL_MASK (MPLS_LS_LABEL_MASK >> MPLS_LS_LABEL_SHIFT) #endif /* _LINUX_MPLS_H */ PK ! I�;_ _ ahci-remap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_AHCI_REMAP_H #define _LINUX_AHCI_REMAP_H #include <linux/sizes.h> #define AHCI_VSCAP 0xa4 #define AHCI_REMAP_CAP 0x800 /* device class code */ #define AHCI_REMAP_N_DCC 0x880 /* remap-device base relative to ahci-bar */ #define AHCI_REMAP_N_OFFSET SZ_16K #define AHCI_REMAP_N_SIZE SZ_16K #define AHCI_MAX_REMAP 3 static inline unsigned int ahci_remap_dcc(int i) { return AHCI_REMAP_N_DCC + i * 0x80; } static inline unsigned int ahci_remap_base(int i) { return AHCI_REMAP_N_OFFSET + i * AHCI_REMAP_N_SIZE; } #endif /* _LINUX_AHCI_REMAP_H */ PK ! �X.U U console_struct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * console_struct.h * * Data structure describing single virtual console except for data * used by vt.c. * * Fields marked with [#] must be set by the low-level driver. * Fields marked with [!] can be changed by the low-level driver * to achieve effects such as fast scrolling by changing the origin. */ #ifndef _LINUX_CONSOLE_STRUCT_H #define _LINUX_CONSOLE_STRUCT_H #include <linux/wait.h> #include <linux/vt.h> #include <linux/workqueue.h> struct uni_pagedict; struct uni_screen; #define NPAR 16 #define VC_TABSTOPS_COUNT 256U enum vc_intensity { VCI_HALF_BRIGHT, VCI_NORMAL, VCI_BOLD, VCI_MASK = 0x3, }; /** * struct vc_state -- state of a VC * @x: cursor's x-position * @y: cursor's y-position * @color: foreground & background colors * @Gx_charset: what's G0/G1 slot set to (like GRAF_MAP, LAT1_MAP) * @charset: what character set to use (0=G0 or 1=G1) * @intensity: see enum vc_intensity for values * @reverse: reversed foreground/background colors * * These members are defined separately from struct vc_data as we save & * restore them at times. */ struct vc_state { unsigned int x, y; unsigned char color; unsigned char Gx_charset[2]; unsigned int charset : 1; /* attribute flags */ enum vc_intensity intensity; bool italic; bool underline; bool blink; bool reverse; }; /* * Example: vc_data of a console that was scrolled 3 lines down. * * Console buffer * vc_screenbuf ---------> +----------------------+-. * | initializing W | \ * | initializing X | | * | initializing Y | > scroll-back area * | initializing Z | | * | | / * vc_visible_origin ---> ^+----------------------+-: * (changes by scroll) || Welcome to linux | \ * || | | * vc_rows --->< | login: root | | visible on console * || password: | > (vc_screenbuf_size is * vc_origin -----------> || | | vc_size_row * vc_rows) * (start when no scroll) || Last login: 12:28 | / * v+----------------------+-: * | Have a lot of fun... | \ * vc_pos -----------------|--------v | > scroll-front area * | ~ # cat_ | / * vc_scr_end -----------> +----------------------+-: * (vc_origin + | | \ EMPTY, to be filled by * vc_screenbuf_size) | | / vc_video_erase_char * +----------------------+-' * <---- 2 * vc_cols -----> * <---- vc_size_row -----> * * Note that every character in the console buffer is accompanied with an * attribute in the buffer right after the character. This is not depicted * in the figure. */ struct vc_data { struct tty_port port; /* Upper level data */ struct vc_state state, saved_state; unsigned short vc_num; /* Console number */ unsigned int vc_cols; /* [#] Console size */ unsigned int vc_rows; unsigned int vc_size_row; /* Bytes per row */ unsigned int vc_scan_lines; /* # of scan lines */ unsigned int vc_cell_height; /* CRTC character cell height */ unsigned long vc_origin; /* [!] Start of real screen */ unsigned long vc_scr_end; /* [!] End of real screen */ unsigned long vc_visible_origin; /* [!] Top of visible window */ unsigned int vc_top, vc_bottom; /* Scrolling region */ const struct consw *vc_sw; unsigned short *vc_screenbuf; /* In-memory character/attribute buffer */ unsigned int vc_screenbuf_size; unsigned char vc_mode; /* KD_TEXT, ... */ /* attributes for all characters on screen */ unsigned char vc_attr; /* Current attributes */ unsigned char vc_def_color; /* Default colors */ unsigned char vc_ulcolor; /* Color for underline mode */ unsigned char vc_itcolor; unsigned char vc_halfcolor; /* Color for half intensity mode */ /* cursor */ unsigned int vc_cursor_type; unsigned short vc_complement_mask; /* [#] Xor mask for mouse pointer */ unsigned short vc_s_complement_mask; /* Saved mouse pointer mask */ unsigned long vc_pos; /* Cursor address */ /* fonts */ unsigned short vc_hi_font_mask; /* [#] Attribute set for upper 256 chars of font or 0 if not supported */ struct console_font vc_font; /* Current VC font set */ unsigned short vc_video_erase_char; /* Background erase character */ /* VT terminal data */ unsigned int vc_state; /* Escape sequence parser state */ unsigned int vc_npar,vc_par[NPAR]; /* Parameters of current escape sequence */ /* data for manual vt switching */ struct vt_mode vt_mode; struct pid *vt_pid; int vt_newvt; wait_queue_head_t paste_wait; /* mode flags */ unsigned int vc_disp_ctrl : 1; /* Display chars < 32? */ unsigned int vc_toggle_meta : 1; /* Toggle high bit? */ unsigned int vc_decscnm : 1; /* Screen Mode */ unsigned int vc_decom : 1; /* Origin Mode */ unsigned int vc_decawm : 1; /* Autowrap Mode */ unsigned int vc_deccm : 1; /* Cursor Visible */ unsigned int vc_decim : 1; /* Insert Mode */ /* misc */ unsigned int vc_priv : 3; unsigned int vc_need_wrap : 1; unsigned int vc_can_do_color : 1; unsigned int vc_report_mouse : 2; unsigned char vc_utf : 1; /* Unicode UTF-8 encoding */ unsigned char vc_utf_count; int vc_utf_char; DECLARE_BITMAP(vc_tab_stop, VC_TABSTOPS_COUNT); /* Tab stops. 256 columns. */ unsigned char vc_palette[16*3]; /* Colour palette for VGA+ */ unsigned short * vc_translate; unsigned int vc_resize_user; /* resize request from user */ unsigned int vc_bell_pitch; /* Console bell pitch */ unsigned int vc_bell_duration; /* Console bell duration */ unsigned short vc_cur_blink_ms; /* Cursor blink duration */ struct vc_data **vc_display_fg; /* [!] Ptr to var holding fg console for this display */ struct uni_pagedict *vc_uni_pagedir; struct uni_pagedict **vc_uni_pagedir_loc; /* [!] Location of uni_pagedict variable for this console */ struct uni_screen *vc_uni_screen; /* unicode screen content */ /* additional information is in vt_kern.h */ }; struct vc { struct vc_data *d; struct work_struct SAK_work; /* might add scrmem, kbd at some time, to have everything in one place */ }; extern struct vc vc_cons [MAX_NR_CONSOLES]; extern void vc_SAK(struct work_struct *work); #define CUR_MAKE(size, change, set) ((size) | ((change) << 8) | \ ((set) << 16)) #define CUR_SIZE(c) ((c) & 0x00000f) # define CUR_DEF 0 # define CUR_NONE 1 # define CUR_UNDERLINE 2 # define CUR_LOWER_THIRD 3 # define CUR_LOWER_HALF 4 # define CUR_TWO_THIRDS 5 # define CUR_BLOCK 6 #define CUR_SW 0x000010 #define CUR_ALWAYS_BG 0x000020 #define CUR_INVERT_FG_BG 0x000040 #define CUR_FG 0x000700 #define CUR_BG 0x007000 #define CUR_CHANGE(c) ((c) & 0x00ff00) #define CUR_SET(c) (((c) & 0xff0000) >> 8) bool con_is_visible(const struct vc_data *vc); #endif /* _LINUX_CONSOLE_STRUCT_H */ PK ! 扁0� � sony-laptop.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _SONYLAPTOP_H_ #define _SONYLAPTOP_H_ #include <linux/types.h> #ifdef __KERNEL__ /* used only for communication between v4l and sony-laptop */ #define SONY_PIC_COMMAND_GETCAMERA 1 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERA 2 #define SONY_PIC_COMMAND_GETCAMERABRIGHTNESS 3 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERABRIGHTNESS 4 #define SONY_PIC_COMMAND_GETCAMERACONTRAST 5 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERACONTRAST 6 #define SONY_PIC_COMMAND_GETCAMERAHUE 7 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERAHUE 8 #define SONY_PIC_COMMAND_GETCAMERACOLOR 9 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERACOLOR 10 #define SONY_PIC_COMMAND_GETCAMERASHARPNESS 11 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERASHARPNESS 12 #define SONY_PIC_COMMAND_GETCAMERAPICTURE 13 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERAPICTURE 14 #define SONY_PIC_COMMAND_GETCAMERAAGC 15 /* obsolete */ #define SONY_PIC_COMMAND_SETCAMERAAGC 16 #define SONY_PIC_COMMAND_GETCAMERADIRECTION 17 /* obsolete */ #define SONY_PIC_COMMAND_GETCAMERAROMVERSION 18 /* obsolete */ #define SONY_PIC_COMMAND_GETCAMERAREVISION 19 /* obsolete */ #if IS_ENABLED(CONFIG_SONY_LAPTOP) int sony_pic_camera_command(int command, u8 value); #else static inline int sony_pic_camera_command(int command, u8 value) { return 0; } #endif #endif /* __KERNEL__ */ #endif /* _SONYLAPTOP_H_ */ PK ! �-�Cqp qp zlib.hnu �[��� /* zlib.h -- interface of the 'zlib' general purpose compression library Copyright (C) 1995-2005 Jean-loup Gailly and Mark Adler This software is provided 'as-is', without any express or implied warranty. In no event will the authors be held liable for any damages arising from the use of this software. Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions: 1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software. If you use this software in a product, an acknowledgment in the product documentation would be appreciated but is not required. 2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software. 3. This notice may not be removed or altered from any source distribution. Jean-loup Gailly Mark Adler jloup@gzip.org madler@alumni.caltech.edu The data format used by the zlib library is described by RFCs (Request for Comments) 1950 to 1952 in the files https://www.ietf.org/rfc/rfc1950.txt (zlib format), rfc1951.txt (deflate format) and rfc1952.txt (gzip format). */ #ifndef _ZLIB_H #define _ZLIB_H #include <linux/zconf.h> /* zlib deflate based on ZLIB_VERSION "1.1.3" */ /* zlib inflate based on ZLIB_VERSION "1.2.3" */ /* This is a modified version of zlib for use inside the Linux kernel. The main changes are to perform all memory allocation in advance. Inflation Changes: * Z_PACKET_FLUSH is added and used by ppp_deflate. Before returning this checks there is no more input data available and the next data is a STORED block. It also resets the mode to be read for the next data, all as per PPP requirements. * Addition of zlib_inflateIncomp which copies incompressible data into the history window and adjusts the accoutning without calling zlib_inflate itself to inflate the data. */ /* The 'zlib' compression library provides in-memory compression and decompression functions, including integrity checks of the uncompressed data. This version of the library supports only one compression method (deflation) but other algorithms will be added later and will have the same stream interface. Compression can be done in a single step if the buffers are large enough (for example if an input file is mmap'ed), or can be done by repeated calls of the compression function. In the latter case, the application must provide more input and/or consume the output (providing more output space) before each call. The compressed data format used by default by the in-memory functions is the zlib format, which is a zlib wrapper documented in RFC 1950, wrapped around a deflate stream, which is itself documented in RFC 1951. The library also supports reading and writing files in gzip (.gz) format with an interface similar to that of stdio. The zlib format was designed to be compact and fast for use in memory and on communications channels. The gzip format was designed for single- file compression on file systems, has a larger header than zlib to maintain directory information, and uses a different, slower check method than zlib. The library does not install any signal handler. The decoder checks the consistency of the compressed data, so the library should never crash even in case of corrupted input. */ struct internal_state; typedef struct z_stream_s { const Byte *next_in; /* next input byte */ uLong avail_in; /* number of bytes available at next_in */ uLong total_in; /* total nb of input bytes read so far */ Byte *next_out; /* next output byte should be put there */ uLong avail_out; /* remaining free space at next_out */ uLong total_out; /* total nb of bytes output so far */ char *msg; /* last error message, NULL if no error */ struct internal_state *state; /* not visible by applications */ void *workspace; /* memory allocated for this stream */ int data_type; /* best guess about the data type: ascii or binary */ uLong adler; /* adler32 value of the uncompressed data */ uLong reserved; /* reserved for future use */ } z_stream; typedef z_stream *z_streamp; /* The application must update next_in and avail_in when avail_in has dropped to zero. It must update next_out and avail_out when avail_out has dropped to zero. The application must initialize zalloc, zfree and opaque before calling the init function. All other fields are set by the compression library and must not be updated by the application. The opaque value provided by the application will be passed as the first parameter for calls of zalloc and zfree. This can be useful for custom memory management. The compression library attaches no meaning to the opaque value. zalloc must return NULL if there is not enough memory for the object. If zlib is used in a multi-threaded application, zalloc and zfree must be thread safe. On 16-bit systems, the functions zalloc and zfree must be able to allocate exactly 65536 bytes, but will not be required to allocate more than this if the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS, pointers returned by zalloc for objects of exactly 65536 bytes *must* have their offset normalized to zero. The default allocation function provided by this library ensures this (see zutil.c). To reduce memory requirements and avoid any allocation of 64K objects, at the expense of compression ratio, compile the library with -DMAX_WBITS=14 (see zconf.h). The fields total_in and total_out can be used for statistics or progress reports. After compression, total_in holds the total size of the uncompressed data and may be saved for use in the decompressor (particularly if the decompressor wants to decompress everything in a single step). */ /* constants */ #define Z_NO_FLUSH 0 #define Z_PARTIAL_FLUSH 1 /* will be removed, use Z_SYNC_FLUSH instead */ #define Z_PACKET_FLUSH 2 #define Z_SYNC_FLUSH 3 #define Z_FULL_FLUSH 4 #define Z_FINISH 5 #define Z_BLOCK 6 /* Only for inflate at present */ /* Allowed flush values; see deflate() and inflate() below for details */ #define Z_OK 0 #define Z_STREAM_END 1 #define Z_NEED_DICT 2 #define Z_ERRNO (-1) #define Z_STREAM_ERROR (-2) #define Z_DATA_ERROR (-3) #define Z_MEM_ERROR (-4) #define Z_BUF_ERROR (-5) #define Z_VERSION_ERROR (-6) /* Return codes for the compression/decompression functions. Negative * values are errors, positive values are used for special but normal events. */ #define Z_NO_COMPRESSION 0 #define Z_BEST_SPEED 1 #define Z_BEST_COMPRESSION 9 #define Z_DEFAULT_COMPRESSION (-1) /* compression levels */ #define Z_FILTERED 1 #define Z_HUFFMAN_ONLY 2 #define Z_DEFAULT_STRATEGY 0 /* compression strategy; see deflateInit2() below for details */ #define Z_BINARY 0 #define Z_ASCII 1 #define Z_UNKNOWN 2 /* Possible values of the data_type field */ #define Z_DEFLATED 8 /* The deflate compression method (the only one supported in this version) */ /* basic functions */ extern int zlib_deflate_workspacesize (int windowBits, int memLevel); /* Returns the number of bytes that needs to be allocated for a per- stream workspace with the specified parameters. A pointer to this number of bytes should be returned in stream->workspace before you call zlib_deflateInit() or zlib_deflateInit2(). If you call zlib_deflateInit(), specify windowBits = MAX_WBITS and memLevel = MAX_MEM_LEVEL here. If you call zlib_deflateInit2(), the windowBits and memLevel parameters passed to zlib_deflateInit2() must not exceed those passed here. */ extern int zlib_deflate_dfltcc_enabled (void); /* Returns 1 if Deflate-Conversion facility is installed and enabled, otherwise 0. */ /* extern int deflateInit (z_streamp strm, int level); Initializes the internal stream state for compression. The fields zalloc, zfree and opaque must be initialized before by the caller. If zalloc and zfree are set to NULL, deflateInit updates them to use default allocation functions. The compression level must be Z_DEFAULT_COMPRESSION, or between 0 and 9: 1 gives best speed, 9 gives best compression, 0 gives no compression at all (the input data is simply copied a block at a time). Z_DEFAULT_COMPRESSION requests a default compromise between speed and compression (currently equivalent to level 6). deflateInit returns Z_OK if success, Z_MEM_ERROR if there was not enough memory, Z_STREAM_ERROR if level is not a valid compression level, Z_VERSION_ERROR if the zlib library version (zlib_version) is incompatible with the version assumed by the caller (ZLIB_VERSION). msg is set to null if there is no error message. deflateInit does not perform any compression: this will be done by deflate(). */ extern int zlib_deflate (z_streamp strm, int flush); /* deflate compresses as much data as possible, and stops when the input buffer becomes empty or the output buffer becomes full. It may introduce some output latency (reading input without producing any output) except when forced to flush. The detailed semantics are as follows. deflate performs one or both of the following actions: - Compress more input starting at next_in and update next_in and avail_in accordingly. If not all input can be processed (because there is not enough room in the output buffer), next_in and avail_in are updated and processing will resume at this point for the next call of deflate(). - Provide more output starting at next_out and update next_out and avail_out accordingly. This action is forced if the parameter flush is non zero. Forcing flush frequently degrades the compression ratio, so this parameter should be set only when necessary (in interactive applications). Some output may be provided even if flush is not set. Before the call of deflate(), the application should ensure that at least one of the actions is possible, by providing more input and/or consuming more output, and updating avail_in or avail_out accordingly; avail_out should never be zero before the call. The application can consume the compressed output when it wants, for example when the output buffer is full (avail_out == 0), or after each call of deflate(). If deflate returns Z_OK and with zero avail_out, it must be called again after making room in the output buffer because there might be more output pending. If the parameter flush is set to Z_SYNC_FLUSH, all pending output is flushed to the output buffer and the output is aligned on a byte boundary, so that the decompressor can get all input data available so far. (In particular avail_in is zero after the call if enough output space has been provided before the call.) Flushing may degrade compression for some compression algorithms and so it should be used only when necessary. If flush is set to Z_FULL_FLUSH, all output is flushed as with Z_SYNC_FLUSH, and the compression state is reset so that decompression can restart from this point if previous compressed data has been damaged or if random access is desired. Using Z_FULL_FLUSH too often can seriously degrade the compression. If deflate returns with avail_out == 0, this function must be called again with the same value of the flush parameter and more output space (updated avail_out), until the flush is complete (deflate returns with non-zero avail_out). If the parameter flush is set to Z_FINISH, pending input is processed, pending output is flushed and deflate returns with Z_STREAM_END if there was enough output space; if deflate returns with Z_OK, this function must be called again with Z_FINISH and more output space (updated avail_out) but no more input data, until it returns with Z_STREAM_END or an error. After deflate has returned Z_STREAM_END, the only possible operations on the stream are deflateReset or deflateEnd. Z_FINISH can be used immediately after deflateInit if all the compression is to be done in a single step. In this case, avail_out must be at least 0.1% larger than avail_in plus 12 bytes. If deflate does not return Z_STREAM_END, then it must be called again as described above. deflate() sets strm->adler to the adler32 checksum of all input read so far (that is, total_in bytes). deflate() may update data_type if it can make a good guess about the input data type (Z_ASCII or Z_BINARY). In doubt, the data is considered binary. This field is only for information purposes and does not affect the compression algorithm in any manner. deflate() returns Z_OK if some progress has been made (more input processed or more output produced), Z_STREAM_END if all input has been consumed and all output has been produced (only when flush is set to Z_FINISH), Z_STREAM_ERROR if the stream state was inconsistent (for example if next_in or next_out was NULL), Z_BUF_ERROR if no progress is possible (for example avail_in or avail_out was zero). */ extern int zlib_deflateEnd (z_streamp strm); /* All dynamically allocated data structures for this stream are freed. This function discards any unprocessed input and does not flush any pending output. deflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state was inconsistent, Z_DATA_ERROR if the stream was freed prematurely (some input or output was discarded). In the error case, msg may be set but then points to a static string (which must not be deallocated). */ extern int zlib_inflate_workspacesize (void); /* Returns the number of bytes that needs to be allocated for a per- stream workspace. A pointer to this number of bytes should be returned in stream->workspace before calling zlib_inflateInit(). */ /* extern int zlib_inflateInit (z_streamp strm); Initializes the internal stream state for decompression. The fields next_in, avail_in, and workspace must be initialized before by the caller. If next_in is not NULL and avail_in is large enough (the exact value depends on the compression method), inflateInit determines the compression method from the zlib header and allocates all data structures accordingly; otherwise the allocation will be deferred to the first call of inflate. If zalloc and zfree are set to NULL, inflateInit updates them to use default allocation functions. inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not enough memory, Z_VERSION_ERROR if the zlib library version is incompatible with the version assumed by the caller. msg is set to null if there is no error message. inflateInit does not perform any decompression apart from reading the zlib header if present: this will be done by inflate(). (So next_in and avail_in may be modified, but next_out and avail_out are unchanged.) */ extern int zlib_inflate (z_streamp strm, int flush); /* inflate decompresses as much data as possible, and stops when the input buffer becomes empty or the output buffer becomes full. It may introduce some output latency (reading input without producing any output) except when forced to flush. The detailed semantics are as follows. inflate performs one or both of the following actions: - Decompress more input starting at next_in and update next_in and avail_in accordingly. If not all input can be processed (because there is not enough room in the output buffer), next_in is updated and processing will resume at this point for the next call of inflate(). - Provide more output starting at next_out and update next_out and avail_out accordingly. inflate() provides as much output as possible, until there is no more input data or no more space in the output buffer (see below about the flush parameter). Before the call of inflate(), the application should ensure that at least one of the actions is possible, by providing more input and/or consuming more output, and updating the next_* and avail_* values accordingly. The application can consume the uncompressed output when it wants, for example when the output buffer is full (avail_out == 0), or after each call of inflate(). If inflate returns Z_OK and with zero avail_out, it must be called again after making room in the output buffer because there might be more output pending. The flush parameter of inflate() can be Z_NO_FLUSH, Z_SYNC_FLUSH, Z_FINISH, or Z_BLOCK. Z_SYNC_FLUSH requests that inflate() flush as much output as possible to the output buffer. Z_BLOCK requests that inflate() stop if and when it gets to the next deflate block boundary. When decoding the zlib or gzip format, this will cause inflate() to return immediately after the header and before the first block. When doing a raw inflate, inflate() will go ahead and process the first block, and will return when it gets to the end of that block, or when it runs out of data. The Z_BLOCK option assists in appending to or combining deflate streams. Also to assist in this, on return inflate() will set strm->data_type to the number of unused bits in the last byte taken from strm->next_in, plus 64 if inflate() is currently decoding the last block in the deflate stream, plus 128 if inflate() returned immediately after decoding an end-of-block code or decoding the complete header up to just before the first byte of the deflate stream. The end-of-block will not be indicated until all of the uncompressed data from that block has been written to strm->next_out. The number of unused bits may in general be greater than seven, except when bit 7 of data_type is set, in which case the number of unused bits will be less than eight. inflate() should normally be called until it returns Z_STREAM_END or an error. However if all decompression is to be performed in a single step (a single call of inflate), the parameter flush should be set to Z_FINISH. In this case all pending input is processed and all pending output is flushed; avail_out must be large enough to hold all the uncompressed data. (The size of the uncompressed data may have been saved by the compressor for this purpose.) The next operation on this stream must be inflateEnd to deallocate the decompression state. The use of Z_FINISH is never required, but can be used to inform inflate that a faster approach may be used for the single inflate() call. In this implementation, inflate() always flushes as much output as possible to the output buffer, and always uses the faster approach on the first call. So the only effect of the flush parameter in this implementation is on the return value of inflate(), as noted below, or when it returns early because Z_BLOCK is used. If a preset dictionary is needed after this call (see inflateSetDictionary below), inflate sets strm->adler to the adler32 checksum of the dictionary chosen by the compressor and returns Z_NEED_DICT; otherwise it sets strm->adler to the adler32 checksum of all output produced so far (that is, total_out bytes) and returns Z_OK, Z_STREAM_END or an error code as described below. At the end of the stream, inflate() checks that its computed adler32 checksum is equal to that saved by the compressor and returns Z_STREAM_END only if the checksum is correct. inflate() will decompress and check either zlib-wrapped or gzip-wrapped deflate data. The header type is detected automatically. Any information contained in the gzip header is not retained, so applications that need that information should instead use raw inflate, see inflateInit2() below, or inflateBack() and perform their own processing of the gzip header and trailer. inflate() returns Z_OK if some progress has been made (more input processed or more output produced), Z_STREAM_END if the end of the compressed data has been reached and all uncompressed output has been produced, Z_NEED_DICT if a preset dictionary is needed at this point, Z_DATA_ERROR if the input data was corrupted (input stream not conforming to the zlib format or incorrect check value), Z_STREAM_ERROR if the stream structure was inconsistent (for example if next_in or next_out was NULL), Z_MEM_ERROR if there was not enough memory, Z_BUF_ERROR if no progress is possible or if there was not enough room in the output buffer when Z_FINISH is used. Note that Z_BUF_ERROR is not fatal, and inflate() can be called again with more input and more output space to continue decompressing. If Z_DATA_ERROR is returned, the application may then call inflateSync() to look for a good compression block if a partial recovery of the data is desired. */ extern int zlib_inflateEnd (z_streamp strm); /* All dynamically allocated data structures for this stream are freed. This function discards any unprocessed input and does not flush any pending output. inflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state was inconsistent. In the error case, msg may be set but then points to a static string (which must not be deallocated). */ /* Advanced functions */ /* The following functions are needed only in some special applications. */ /* extern int deflateInit2 (z_streamp strm, int level, int method, int windowBits, int memLevel, int strategy); This is another version of deflateInit with more compression options. The fields next_in, zalloc, zfree and opaque must be initialized before by the caller. The method parameter is the compression method. It must be Z_DEFLATED in this version of the library. The windowBits parameter is the base two logarithm of the window size (the size of the history buffer). It should be in the range 8..15 for this version of the library. Larger values of this parameter result in better compression at the expense of memory usage. The default value is 15 if deflateInit is used instead. The memLevel parameter specifies how much memory should be allocated for the internal compression state. memLevel=1 uses minimum memory but is slow and reduces compression ratio; memLevel=9 uses maximum memory for optimal speed. The default value is 8. See zconf.h for total memory usage as a function of windowBits and memLevel. The strategy parameter is used to tune the compression algorithm. Use the value Z_DEFAULT_STRATEGY for normal data, Z_FILTERED for data produced by a filter (or predictor), or Z_HUFFMAN_ONLY to force Huffman encoding only (no string match). Filtered data consists mostly of small values with a somewhat random distribution. In this case, the compression algorithm is tuned to compress them better. The effect of Z_FILTERED is to force more Huffman coding and less string matching; it is somewhat intermediate between Z_DEFAULT and Z_HUFFMAN_ONLY. The strategy parameter only affects the compression ratio but not the correctness of the compressed output even if it is not set appropriately. deflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was not enough memory, Z_STREAM_ERROR if a parameter is invalid (such as an invalid method). msg is set to null if there is no error message. deflateInit2 does not perform any compression: this will be done by deflate(). */ extern int zlib_deflateReset (z_streamp strm); /* This function is equivalent to deflateEnd followed by deflateInit, but does not free and reallocate all the internal compression state. The stream will keep the same compression level and any other attributes that may have been set by deflateInit2. deflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source stream state was inconsistent (such as zalloc or state being NULL). */ static inline unsigned long deflateBound(unsigned long s) { return s + ((s + 7) >> 3) + ((s + 63) >> 6) + 11; } /* extern int inflateInit2 (z_streamp strm, int windowBits); This is another version of inflateInit with an extra parameter. The fields next_in, avail_in, zalloc, zfree and opaque must be initialized before by the caller. The windowBits parameter is the base two logarithm of the maximum window size (the size of the history buffer). It should be in the range 8..15 for this version of the library. The default value is 15 if inflateInit is used instead. windowBits must be greater than or equal to the windowBits value provided to deflateInit2() while compressing, or it must be equal to 15 if deflateInit2() was not used. If a compressed stream with a larger window size is given as input, inflate() will return with the error code Z_DATA_ERROR instead of trying to allocate a larger window. windowBits can also be -8..-15 for raw inflate. In this case, -windowBits determines the window size. inflate() will then process raw deflate data, not looking for a zlib or gzip header, not generating a check value, and not looking for any check values for comparison at the end of the stream. This is for use with other formats that use the deflate compressed data format such as zip. Those formats provide their own check values. If a custom format is developed using the raw deflate format for compressed data, it is recommended that a check value such as an adler32 or a crc32 be applied to the uncompressed data as is done in the zlib, gzip, and zip formats. For most applications, the zlib format should be used as is. Note that comments above on the use in deflateInit2() applies to the magnitude of windowBits. windowBits can also be greater than 15 for optional gzip decoding. Add 32 to windowBits to enable zlib and gzip decoding with automatic header detection, or add 16 to decode only the gzip format (the zlib format will return a Z_DATA_ERROR). If a gzip stream is being decoded, strm->adler is a crc32 instead of an adler32. inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was not enough memory, Z_STREAM_ERROR if a parameter is invalid (such as a null strm). msg is set to null if there is no error message. inflateInit2 does not perform any decompression apart from reading the zlib header if present: this will be done by inflate(). (So next_in and avail_in may be modified, but next_out and avail_out are unchanged.) */ extern int zlib_inflateReset (z_streamp strm); /* This function is equivalent to inflateEnd followed by inflateInit, but does not free and reallocate all the internal decompression state. The stream will keep attributes that may have been set by inflateInit2. inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source stream state was inconsistent (such as zalloc or state being NULL). */ extern int zlib_inflateIncomp (z_stream *strm); /* This function adds the data at next_in (avail_in bytes) to the output history without performing any output. There must be no pending output, and the decompressor must be expecting to see the start of a block. Calling this function is equivalent to decompressing a stored block containing the data at next_in (except that the data is not output). */ #define zlib_deflateInit(strm, level) \ zlib_deflateInit2((strm), (level), Z_DEFLATED, MAX_WBITS, \ DEF_MEM_LEVEL, Z_DEFAULT_STRATEGY) #define zlib_inflateInit(strm) \ zlib_inflateInit2((strm), DEF_WBITS) extern int zlib_deflateInit2(z_streamp strm, int level, int method, int windowBits, int memLevel, int strategy); extern int zlib_inflateInit2(z_streamp strm, int windowBits); #if !defined(_Z_UTIL_H) && !defined(NO_DUMMY_DECL) struct internal_state {int dummy;}; /* hack for buggy compilers */ #endif /* Utility function: initialize zlib, unpack binary blob, clean up zlib, * return len or negative error code. */ extern int zlib_inflate_blob(void *dst, unsigned dst_sz, const void *src, unsigned src_sz); #endif /* _ZLIB_H */ PK ! � �| verification.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Signature verification * * Copyright (C) 2014 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_VERIFICATION_H #define _LINUX_VERIFICATION_H #include <linux/types.h> /* * Indicate that both builtin trusted keys and secondary trusted keys * should be used. */ #define VERIFY_USE_SECONDARY_KEYRING ((struct key *)1UL) #define VERIFY_USE_PLATFORM_KEYRING ((struct key *)2UL) /* * The use to which an asymmetric key is being put. */ enum key_being_used_for { VERIFYING_MODULE_SIGNATURE, VERIFYING_FIRMWARE_SIGNATURE, VERIFYING_KEXEC_PE_SIGNATURE, VERIFYING_KEY_SIGNATURE, VERIFYING_KEY_SELF_SIGNATURE, VERIFYING_UNSPECIFIED_SIGNATURE, NR__KEY_BEING_USED_FOR }; extern const char *const key_being_used_for[NR__KEY_BEING_USED_FOR]; #ifdef CONFIG_SYSTEM_DATA_VERIFICATION struct key; struct pkcs7_message; extern int verify_pkcs7_signature(const void *data, size_t len, const void *raw_pkcs7, size_t pkcs7_len, struct key *trusted_keys, enum key_being_used_for usage, int (*view_content)(void *ctx, const void *data, size_t len, size_t asn1hdrlen), void *ctx); extern int verify_pkcs7_message_sig(const void *data, size_t len, struct pkcs7_message *pkcs7, struct key *trusted_keys, enum key_being_used_for usage, int (*view_content)(void *ctx, const void *data, size_t len, size_t asn1hdrlen), void *ctx); #ifdef CONFIG_SIGNED_PE_FILE_VERIFICATION extern int verify_pefile_signature(const void *pebuf, unsigned pelen, struct key *trusted_keys, enum key_being_used_for usage); #endif #endif /* CONFIG_SYSTEM_DATA_VERIFICATION */ #endif /* _LINUX_VERIFY_PEFILE_H */ PK ! �S/�( �( extcon.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * External Connector (extcon) framework * - linux/include/linux/extcon.h for extcon consumer device driver. * * Copyright (C) 2015 Samsung Electronics * Author: Chanwoo Choi <cw00.choi@samsung.com> * * Copyright (C) 2012 Samsung Electronics * Author: Donggeun Kim <dg77.kim@samsung.com> * Author: MyungJoo Ham <myungjoo.ham@samsung.com> * * based on switch class driver * Copyright (C) 2008 Google, Inc. * Author: Mike Lockwood <lockwood@android.com> */ #ifndef __LINUX_EXTCON_H__ #define __LINUX_EXTCON_H__ #include <linux/device.h> /* * Define the type of supported external connectors */ #define EXTCON_TYPE_USB BIT(0) /* USB connector */ #define EXTCON_TYPE_CHG BIT(1) /* Charger connector */ #define EXTCON_TYPE_JACK BIT(2) /* Jack connector */ #define EXTCON_TYPE_DISP BIT(3) /* Display connector */ #define EXTCON_TYPE_MISC BIT(4) /* Miscellaneous connector */ /* * Define the unique id of supported external connectors */ #define EXTCON_NONE 0 /* USB external connector */ #define EXTCON_USB 1 #define EXTCON_USB_HOST 2 /* * Charging external connector * * When one SDP charger connector was reported, we should also report * the USB connector, which means EXTCON_CHG_USB_SDP should always * appear together with EXTCON_USB. The same as ACA charger connector, * EXTCON_CHG_USB_ACA would normally appear with EXTCON_USB_HOST. * * The EXTCON_CHG_USB_SLOW connector can provide at least 500mA of * current at 5V. The EXTCON_CHG_USB_FAST connector can provide at * least 1A of current at 5V. */ #define EXTCON_CHG_USB_SDP 5 /* Standard Downstream Port */ #define EXTCON_CHG_USB_DCP 6 /* Dedicated Charging Port */ #define EXTCON_CHG_USB_CDP 7 /* Charging Downstream Port */ #define EXTCON_CHG_USB_ACA 8 /* Accessory Charger Adapter */ #define EXTCON_CHG_USB_FAST 9 #define EXTCON_CHG_USB_SLOW 10 #define EXTCON_CHG_WPT 11 /* Wireless Power Transfer */ #define EXTCON_CHG_USB_PD 12 /* USB Power Delivery */ /* Jack external connector */ #define EXTCON_JACK_MICROPHONE 20 #define EXTCON_JACK_HEADPHONE 21 #define EXTCON_JACK_LINE_IN 22 #define EXTCON_JACK_LINE_OUT 23 #define EXTCON_JACK_VIDEO_IN 24 #define EXTCON_JACK_VIDEO_OUT 25 #define EXTCON_JACK_SPDIF_IN 26 /* Sony Philips Digital InterFace */ #define EXTCON_JACK_SPDIF_OUT 27 /* Display external connector */ #define EXTCON_DISP_HDMI 40 /* High-Definition Multimedia Interface */ #define EXTCON_DISP_MHL 41 /* Mobile High-Definition Link */ #define EXTCON_DISP_DVI 42 /* Digital Visual Interface */ #define EXTCON_DISP_VGA 43 /* Video Graphics Array */ #define EXTCON_DISP_DP 44 /* Display Port */ #define EXTCON_DISP_HMD 45 /* Head-Mounted Display */ /* Miscellaneous external connector */ #define EXTCON_DOCK 60 #define EXTCON_JIG 61 #define EXTCON_MECHANICAL 62 #define EXTCON_NUM 63 /* * Define the properties of supported external connectors. * * When adding the new extcon property, they *must* have * the type/value/default information. Also, you *have to* * modify the EXTCON_PROP_[type]_START/END definitions * which mean the range of the supported properties * for each extcon type. * * The naming style of property * : EXTCON_PROP_[type]_[property name] * * EXTCON_PROP_USB_[property name] : USB property * EXTCON_PROP_CHG_[property name] : Charger property * EXTCON_PROP_JACK_[property name] : Jack property * EXTCON_PROP_DISP_[property name] : Display property */ /* * Properties of EXTCON_TYPE_USB. * * - EXTCON_PROP_USB_VBUS * @type: integer (intval) * @value: 0 (low) or 1 (high) * @default: 0 (low) * - EXTCON_PROP_USB_TYPEC_POLARITY * @type: integer (intval) * @value: 0 (normal) or 1 (flip) * @default: 0 (normal) * - EXTCON_PROP_USB_SS (SuperSpeed) * @type: integer (intval) * @value: 0 (USB/USB2) or 1 (USB3) * @default: 0 (USB/USB2) * */ #define EXTCON_PROP_USB_VBUS 0 #define EXTCON_PROP_USB_TYPEC_POLARITY 1 #define EXTCON_PROP_USB_SS 2 #define EXTCON_PROP_USB_MIN 0 #define EXTCON_PROP_USB_MAX 2 #define EXTCON_PROP_USB_CNT (EXTCON_PROP_USB_MAX - EXTCON_PROP_USB_MIN + 1) /* Properties of EXTCON_TYPE_CHG. */ #define EXTCON_PROP_CHG_MIN 50 #define EXTCON_PROP_CHG_MAX 50 #define EXTCON_PROP_CHG_CNT (EXTCON_PROP_CHG_MAX - EXTCON_PROP_CHG_MIN + 1) /* Properties of EXTCON_TYPE_JACK. */ #define EXTCON_PROP_JACK_MIN 100 #define EXTCON_PROP_JACK_MAX 100 #define EXTCON_PROP_JACK_CNT (EXTCON_PROP_JACK_MAX - EXTCON_PROP_JACK_MIN + 1) /* * Properties of EXTCON_TYPE_DISP. * * - EXTCON_PROP_DISP_HPD (Hot Plug Detect) * @type: integer (intval) * @value: 0 (no hpd) or 1 (hpd) * @default: 0 (no hpd) * */ #define EXTCON_PROP_DISP_HPD 150 /* Properties of EXTCON_TYPE_DISP. */ #define EXTCON_PROP_DISP_MIN 150 #define EXTCON_PROP_DISP_MAX 151 #define EXTCON_PROP_DISP_CNT (EXTCON_PROP_DISP_MAX - EXTCON_PROP_DISP_MIN + 1) /* * Define the type of property's value. * * Define the property's value as union type. Because each property * would need the different data type to store it. */ union extcon_property_value { int intval; /* type : integer (intval) */ }; struct extcon_dev; #if IS_ENABLED(CONFIG_EXTCON) /* * Following APIs get the connected state of each external connector. * The 'id' argument indicates the defined external connector. */ int extcon_get_state(struct extcon_dev *edev, unsigned int id); /* * Following APIs get the property of each external connector. * The 'id' argument indicates the defined external connector * and the 'prop' indicates the extcon property. * * And extcon_get_property_capability() get the capability of the property * for each external connector. They are used to get the capability of the * property of each external connector based on the id and property. */ int extcon_get_property(struct extcon_dev *edev, unsigned int id, unsigned int prop, union extcon_property_value *prop_val); int extcon_get_property_capability(struct extcon_dev *edev, unsigned int id, unsigned int prop); /* * Following APIs register the notifier block in order to detect * the change of both state and property value for each external connector. * * extcon_register_notifier(*edev, id, *nb) : Register a notifier block * for specific external connector of the extcon. * extcon_register_notifier_all(*edev, *nb) : Register a notifier block * for all supported external connectors of the extcon. */ int extcon_register_notifier(struct extcon_dev *edev, unsigned int id, struct notifier_block *nb); int extcon_unregister_notifier(struct extcon_dev *edev, unsigned int id, struct notifier_block *nb); int devm_extcon_register_notifier(struct device *dev, struct extcon_dev *edev, unsigned int id, struct notifier_block *nb); void devm_extcon_unregister_notifier(struct device *dev, struct extcon_dev *edev, unsigned int id, struct notifier_block *nb); int extcon_register_notifier_all(struct extcon_dev *edev, struct notifier_block *nb); int extcon_unregister_notifier_all(struct extcon_dev *edev, struct notifier_block *nb); int devm_extcon_register_notifier_all(struct device *dev, struct extcon_dev *edev, struct notifier_block *nb); void devm_extcon_unregister_notifier_all(struct device *dev, struct extcon_dev *edev, struct notifier_block *nb); /* * Following APIs get the extcon_dev from devicetree or by through extcon name. */ struct extcon_dev *extcon_get_extcon_dev(const char *extcon_name); struct extcon_dev *extcon_find_edev_by_node(struct device_node *node); struct extcon_dev *extcon_get_edev_by_phandle(struct device *dev, int index); /* Following API get the name of extcon device. */ const char *extcon_get_edev_name(struct extcon_dev *edev); #else /* CONFIG_EXTCON */ static inline int extcon_get_state(struct extcon_dev *edev, unsigned int id) { return 0; } static inline int extcon_get_property(struct extcon_dev *edev, unsigned int id, unsigned int prop, union extcon_property_value *prop_val) { return 0; } static inline int extcon_get_property_capability(struct extcon_dev *edev, unsigned int id, unsigned int prop) { return 0; } static inline int extcon_register_notifier(struct extcon_dev *edev, unsigned int id, struct notifier_block *nb) { return 0; } static inline int extcon_unregister_notifier(struct extcon_dev *edev, unsigned int id, struct notifier_block *nb) { return 0; } static inline int devm_extcon_register_notifier(struct device *dev, struct extcon_dev *edev, unsigned int id, struct notifier_block *nb) { return -ENOSYS; } static inline void devm_extcon_unregister_notifier(struct device *dev, struct extcon_dev *edev, unsigned int id, struct notifier_block *nb) { } static inline int extcon_register_notifier_all(struct extcon_dev *edev, struct notifier_block *nb) { return 0; } static inline int extcon_unregister_notifier_all(struct extcon_dev *edev, struct notifier_block *nb) { return 0; } static inline int devm_extcon_register_notifier_all(struct device *dev, struct extcon_dev *edev, struct notifier_block *nb) { return 0; } static inline void devm_extcon_unregister_notifier_all(struct device *dev, struct extcon_dev *edev, struct notifier_block *nb) { } static inline struct extcon_dev *extcon_get_extcon_dev(const char *extcon_name) { return NULL; } static inline struct extcon_dev *extcon_find_edev_by_node(struct device_node *node) { return ERR_PTR(-ENODEV); } static inline struct extcon_dev *extcon_get_edev_by_phandle(struct device *dev, int index) { return ERR_PTR(-ENODEV); } static inline const char *extcon_get_edev_name(struct extcon_dev *edev) { return NULL; } #endif /* CONFIG_EXTCON */ /* * Following structure and API are deprecated. EXTCON remains the function * definition to prevent the build break. */ struct extcon_specific_cable_nb { struct notifier_block *user_nb; int cable_index; struct extcon_dev *edev; unsigned long previous_value; }; static inline int extcon_register_interest(struct extcon_specific_cable_nb *obj, const char *extcon_name, const char *cable_name, struct notifier_block *nb) { return -EINVAL; } static inline int extcon_unregister_interest(struct extcon_specific_cable_nb *obj) { return -EINVAL; } #endif /* __LINUX_EXTCON_H__ */ PK ! �Yٻ� �� ntb.hnu �[��� /* * This file is provided under a dual BSD/GPLv2 license. When using or * redistributing this file, you may do so under either license. * * GPL LICENSE SUMMARY * * Copyright (C) 2015 EMC Corporation. All Rights Reserved. * Copyright (C) 2016 T-Platforms. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * BSD LICENSE * * Copyright (C) 2015 EMC Corporation. All Rights Reserved. * Copyright (C) 2016 T-Platforms. All Rights Reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copy * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * PCIe NTB Linux driver * * Contact Information: * Allen Hubbe <Allen.Hubbe@emc.com> */ #ifndef _NTB_H_ #define _NTB_H_ #include <linux/completion.h> #include <linux/device.h> #include <linux/interrupt.h> struct ntb_client; struct ntb_dev; struct ntb_msi; struct pci_dev; /** * enum ntb_topo - NTB connection topology * @NTB_TOPO_NONE: Topology is unknown or invalid. * @NTB_TOPO_PRI: On primary side of local ntb. * @NTB_TOPO_SEC: On secondary side of remote ntb. * @NTB_TOPO_B2B_USD: On primary side of local ntb upstream of remote ntb. * @NTB_TOPO_B2B_DSD: On primary side of local ntb downstream of remote ntb. * @NTB_TOPO_SWITCH: Connected via a switch which supports ntb. * @NTB_TOPO_CROSSLINK: Connected via two symmetric switchecs */ enum ntb_topo { NTB_TOPO_NONE = -1, NTB_TOPO_PRI, NTB_TOPO_SEC, NTB_TOPO_B2B_USD, NTB_TOPO_B2B_DSD, NTB_TOPO_SWITCH, NTB_TOPO_CROSSLINK, }; static inline int ntb_topo_is_b2b(enum ntb_topo topo) { switch ((int)topo) { case NTB_TOPO_B2B_USD: case NTB_TOPO_B2B_DSD: return 1; } return 0; } static inline char *ntb_topo_string(enum ntb_topo topo) { switch (topo) { case NTB_TOPO_NONE: return "NTB_TOPO_NONE"; case NTB_TOPO_PRI: return "NTB_TOPO_PRI"; case NTB_TOPO_SEC: return "NTB_TOPO_SEC"; case NTB_TOPO_B2B_USD: return "NTB_TOPO_B2B_USD"; case NTB_TOPO_B2B_DSD: return "NTB_TOPO_B2B_DSD"; case NTB_TOPO_SWITCH: return "NTB_TOPO_SWITCH"; case NTB_TOPO_CROSSLINK: return "NTB_TOPO_CROSSLINK"; } return "NTB_TOPO_INVALID"; } /** * enum ntb_speed - NTB link training speed * @NTB_SPEED_AUTO: Request the max supported speed. * @NTB_SPEED_NONE: Link is not trained to any speed. * @NTB_SPEED_GEN1: Link is trained to gen1 speed. * @NTB_SPEED_GEN2: Link is trained to gen2 speed. * @NTB_SPEED_GEN3: Link is trained to gen3 speed. * @NTB_SPEED_GEN4: Link is trained to gen4 speed. */ enum ntb_speed { NTB_SPEED_AUTO = -1, NTB_SPEED_NONE = 0, NTB_SPEED_GEN1 = 1, NTB_SPEED_GEN2 = 2, NTB_SPEED_GEN3 = 3, NTB_SPEED_GEN4 = 4 }; /** * enum ntb_width - NTB link training width * @NTB_WIDTH_AUTO: Request the max supported width. * @NTB_WIDTH_NONE: Link is not trained to any width. * @NTB_WIDTH_1: Link is trained to 1 lane width. * @NTB_WIDTH_2: Link is trained to 2 lane width. * @NTB_WIDTH_4: Link is trained to 4 lane width. * @NTB_WIDTH_8: Link is trained to 8 lane width. * @NTB_WIDTH_12: Link is trained to 12 lane width. * @NTB_WIDTH_16: Link is trained to 16 lane width. * @NTB_WIDTH_32: Link is trained to 32 lane width. */ enum ntb_width { NTB_WIDTH_AUTO = -1, NTB_WIDTH_NONE = 0, NTB_WIDTH_1 = 1, NTB_WIDTH_2 = 2, NTB_WIDTH_4 = 4, NTB_WIDTH_8 = 8, NTB_WIDTH_12 = 12, NTB_WIDTH_16 = 16, NTB_WIDTH_32 = 32, }; /** * enum ntb_default_port - NTB default port number * @NTB_PORT_PRI_USD: Default port of the NTB_TOPO_PRI/NTB_TOPO_B2B_USD * topologies * @NTB_PORT_SEC_DSD: Default port of the NTB_TOPO_SEC/NTB_TOPO_B2B_DSD * topologies */ enum ntb_default_port { NTB_PORT_PRI_USD, NTB_PORT_SEC_DSD }; #define NTB_DEF_PEER_CNT (1) #define NTB_DEF_PEER_IDX (0) /** * struct ntb_client_ops - ntb client operations * @probe: Notify client of a new device. * @remove: Notify client to remove a device. */ struct ntb_client_ops { int (*probe)(struct ntb_client *client, struct ntb_dev *ntb); void (*remove)(struct ntb_client *client, struct ntb_dev *ntb); }; static inline int ntb_client_ops_is_valid(const struct ntb_client_ops *ops) { /* commented callbacks are not required: */ return ops->probe && ops->remove && 1; } /** * struct ntb_ctx_ops - ntb driver context operations * @link_event: See ntb_link_event(). * @db_event: See ntb_db_event(). * @msg_event: See ntb_msg_event(). */ struct ntb_ctx_ops { void (*link_event)(void *ctx); void (*db_event)(void *ctx, int db_vector); void (*msg_event)(void *ctx); }; static inline int ntb_ctx_ops_is_valid(const struct ntb_ctx_ops *ops) { /* commented callbacks are not required: */ return /* ops->link_event && */ /* ops->db_event && */ /* ops->msg_event && */ 1; } /** * struct ntb_dev_ops - ntb device operations * @port_number: See ntb_port_number(). * @peer_port_count: See ntb_peer_port_count(). * @peer_port_number: See ntb_peer_port_number(). * @peer_port_idx: See ntb_peer_port_idx(). * @link_is_up: See ntb_link_is_up(). * @link_enable: See ntb_link_enable(). * @link_disable: See ntb_link_disable(). * @mw_count: See ntb_mw_count(). * @mw_get_align: See ntb_mw_get_align(). * @mw_set_trans: See ntb_mw_set_trans(). * @mw_clear_trans: See ntb_mw_clear_trans(). * @peer_mw_count: See ntb_peer_mw_count(). * @peer_mw_get_addr: See ntb_peer_mw_get_addr(). * @peer_mw_set_trans: See ntb_peer_mw_set_trans(). * @peer_mw_clear_trans:See ntb_peer_mw_clear_trans(). * @db_is_unsafe: See ntb_db_is_unsafe(). * @db_valid_mask: See ntb_db_valid_mask(). * @db_vector_count: See ntb_db_vector_count(). * @db_vector_mask: See ntb_db_vector_mask(). * @db_read: See ntb_db_read(). * @db_set: See ntb_db_set(). * @db_clear: See ntb_db_clear(). * @db_read_mask: See ntb_db_read_mask(). * @db_set_mask: See ntb_db_set_mask(). * @db_clear_mask: See ntb_db_clear_mask(). * @peer_db_addr: See ntb_peer_db_addr(). * @peer_db_read: See ntb_peer_db_read(). * @peer_db_set: See ntb_peer_db_set(). * @peer_db_clear: See ntb_peer_db_clear(). * @peer_db_read_mask: See ntb_peer_db_read_mask(). * @peer_db_set_mask: See ntb_peer_db_set_mask(). * @peer_db_clear_mask: See ntb_peer_db_clear_mask(). * @spad_is_unsafe: See ntb_spad_is_unsafe(). * @spad_count: See ntb_spad_count(). * @spad_read: See ntb_spad_read(). * @spad_write: See ntb_spad_write(). * @peer_spad_addr: See ntb_peer_spad_addr(). * @peer_spad_read: See ntb_peer_spad_read(). * @peer_spad_write: See ntb_peer_spad_write(). * @msg_count: See ntb_msg_count(). * @msg_inbits: See ntb_msg_inbits(). * @msg_outbits: See ntb_msg_outbits(). * @msg_read_sts: See ntb_msg_read_sts(). * @msg_clear_sts: See ntb_msg_clear_sts(). * @msg_set_mask: See ntb_msg_set_mask(). * @msg_clear_mask: See ntb_msg_clear_mask(). * @msg_read: See ntb_msg_read(). * @peer_msg_write: See ntb_peer_msg_write(). */ struct ntb_dev_ops { int (*port_number)(struct ntb_dev *ntb); int (*peer_port_count)(struct ntb_dev *ntb); int (*peer_port_number)(struct ntb_dev *ntb, int pidx); int (*peer_port_idx)(struct ntb_dev *ntb, int port); u64 (*link_is_up)(struct ntb_dev *ntb, enum ntb_speed *speed, enum ntb_width *width); int (*link_enable)(struct ntb_dev *ntb, enum ntb_speed max_speed, enum ntb_width max_width); int (*link_disable)(struct ntb_dev *ntb); int (*mw_count)(struct ntb_dev *ntb, int pidx); int (*mw_get_align)(struct ntb_dev *ntb, int pidx, int widx, resource_size_t *addr_align, resource_size_t *size_align, resource_size_t *size_max); int (*mw_set_trans)(struct ntb_dev *ntb, int pidx, int widx, dma_addr_t addr, resource_size_t size); int (*mw_clear_trans)(struct ntb_dev *ntb, int pidx, int widx); int (*peer_mw_count)(struct ntb_dev *ntb); int (*peer_mw_get_addr)(struct ntb_dev *ntb, int widx, phys_addr_t *base, resource_size_t *size); int (*peer_mw_set_trans)(struct ntb_dev *ntb, int pidx, int widx, u64 addr, resource_size_t size); int (*peer_mw_clear_trans)(struct ntb_dev *ntb, int pidx, int widx); int (*db_is_unsafe)(struct ntb_dev *ntb); u64 (*db_valid_mask)(struct ntb_dev *ntb); int (*db_vector_count)(struct ntb_dev *ntb); u64 (*db_vector_mask)(struct ntb_dev *ntb, int db_vector); u64 (*db_read)(struct ntb_dev *ntb); int (*db_set)(struct ntb_dev *ntb, u64 db_bits); int (*db_clear)(struct ntb_dev *ntb, u64 db_bits); u64 (*db_read_mask)(struct ntb_dev *ntb); int (*db_set_mask)(struct ntb_dev *ntb, u64 db_bits); int (*db_clear_mask)(struct ntb_dev *ntb, u64 db_bits); int (*peer_db_addr)(struct ntb_dev *ntb, phys_addr_t *db_addr, resource_size_t *db_size, u64 *db_data, int db_bit); u64 (*peer_db_read)(struct ntb_dev *ntb); int (*peer_db_set)(struct ntb_dev *ntb, u64 db_bits); int (*peer_db_clear)(struct ntb_dev *ntb, u64 db_bits); u64 (*peer_db_read_mask)(struct ntb_dev *ntb); int (*peer_db_set_mask)(struct ntb_dev *ntb, u64 db_bits); int (*peer_db_clear_mask)(struct ntb_dev *ntb, u64 db_bits); int (*spad_is_unsafe)(struct ntb_dev *ntb); int (*spad_count)(struct ntb_dev *ntb); u32 (*spad_read)(struct ntb_dev *ntb, int sidx); int (*spad_write)(struct ntb_dev *ntb, int sidx, u32 val); int (*peer_spad_addr)(struct ntb_dev *ntb, int pidx, int sidx, phys_addr_t *spad_addr); u32 (*peer_spad_read)(struct ntb_dev *ntb, int pidx, int sidx); int (*peer_spad_write)(struct ntb_dev *ntb, int pidx, int sidx, u32 val); int (*msg_count)(struct ntb_dev *ntb); u64 (*msg_inbits)(struct ntb_dev *ntb); u64 (*msg_outbits)(struct ntb_dev *ntb); u64 (*msg_read_sts)(struct ntb_dev *ntb); int (*msg_clear_sts)(struct ntb_dev *ntb, u64 sts_bits); int (*msg_set_mask)(struct ntb_dev *ntb, u64 mask_bits); int (*msg_clear_mask)(struct ntb_dev *ntb, u64 mask_bits); u32 (*msg_read)(struct ntb_dev *ntb, int *pidx, int midx); int (*peer_msg_write)(struct ntb_dev *ntb, int pidx, int midx, u32 msg); }; static inline int ntb_dev_ops_is_valid(const struct ntb_dev_ops *ops) { /* commented callbacks are not required: */ return /* Port operations are required for multiport devices */ !ops->peer_port_count == !ops->port_number && !ops->peer_port_number == !ops->port_number && !ops->peer_port_idx == !ops->port_number && /* Link operations are required */ ops->link_is_up && ops->link_enable && ops->link_disable && /* One or both MW interfaces should be developed */ ops->mw_count && ops->mw_get_align && (ops->mw_set_trans || ops->peer_mw_set_trans) && /* ops->mw_clear_trans && */ ops->peer_mw_count && ops->peer_mw_get_addr && /* ops->peer_mw_clear_trans && */ /* Doorbell operations are mostly required */ /* ops->db_is_unsafe && */ ops->db_valid_mask && /* both set, or both unset */ (!ops->db_vector_count == !ops->db_vector_mask) && ops->db_read && /* ops->db_set && */ ops->db_clear && /* ops->db_read_mask && */ ops->db_set_mask && ops->db_clear_mask && /* ops->peer_db_addr && */ /* ops->peer_db_read && */ ops->peer_db_set && /* ops->peer_db_clear && */ /* ops->peer_db_read_mask && */ /* ops->peer_db_set_mask && */ /* ops->peer_db_clear_mask && */ /* Scrachpads interface is optional */ /* !ops->spad_is_unsafe == !ops->spad_count && */ !ops->spad_read == !ops->spad_count && !ops->spad_write == !ops->spad_count && /* !ops->peer_spad_addr == !ops->spad_count && */ /* !ops->peer_spad_read == !ops->spad_count && */ !ops->peer_spad_write == !ops->spad_count && /* Messaging interface is optional */ !ops->msg_inbits == !ops->msg_count && !ops->msg_outbits == !ops->msg_count && !ops->msg_read_sts == !ops->msg_count && !ops->msg_clear_sts == !ops->msg_count && /* !ops->msg_set_mask == !ops->msg_count && */ /* !ops->msg_clear_mask == !ops->msg_count && */ !ops->msg_read == !ops->msg_count && !ops->peer_msg_write == !ops->msg_count && 1; } /** * struct ntb_client - client interested in ntb devices * @drv: Linux driver object. * @ops: See &ntb_client_ops. */ struct ntb_client { struct device_driver drv; const struct ntb_client_ops ops; }; #define drv_ntb_client(__drv) container_of((__drv), struct ntb_client, drv) /** * struct ntb_dev - ntb device * @dev: Linux device object. * @pdev: PCI device entry of the ntb. * @topo: Detected topology of the ntb. * @ops: See &ntb_dev_ops. * @ctx: See &ntb_ctx_ops. * @ctx_ops: See &ntb_ctx_ops. */ struct ntb_dev { struct device dev; struct pci_dev *pdev; enum ntb_topo topo; const struct ntb_dev_ops *ops; void *ctx; const struct ntb_ctx_ops *ctx_ops; /* private: */ /* synchronize setting, clearing, and calling ctx_ops */ spinlock_t ctx_lock; /* block unregister until device is fully released */ struct completion released; #ifdef CONFIG_NTB_MSI struct ntb_msi *msi; #endif }; #define dev_ntb(__dev) container_of((__dev), struct ntb_dev, dev) /** * ntb_register_client() - register a client for interest in ntb devices * @client: Client context. * * The client will be added to the list of clients interested in ntb devices. * The client will be notified of any ntb devices that are not already * associated with a client, or if ntb devices are registered later. * * Return: Zero if the client is registered, otherwise an error number. */ #define ntb_register_client(client) \ __ntb_register_client((client), THIS_MODULE, KBUILD_MODNAME) int __ntb_register_client(struct ntb_client *client, struct module *mod, const char *mod_name); /** * ntb_unregister_client() - unregister a client for interest in ntb devices * @client: Client context. * * The client will be removed from the list of clients interested in ntb * devices. If any ntb devices are associated with the client, the client will * be notified to remove those devices. */ void ntb_unregister_client(struct ntb_client *client); #define module_ntb_client(__ntb_client) \ module_driver(__ntb_client, ntb_register_client, \ ntb_unregister_client) /** * ntb_register_device() - register a ntb device * @ntb: NTB device context. * * The device will be added to the list of ntb devices. If any clients are * interested in ntb devices, each client will be notified of the ntb device, * until at most one client accepts the device. * * Return: Zero if the device is registered, otherwise an error number. */ int ntb_register_device(struct ntb_dev *ntb); /** * ntb_unregister_device() - unregister a ntb device * @ntb: NTB device context. * * The device will be removed from the list of ntb devices. If the ntb device * is associated with a client, the client will be notified to remove the * device. */ void ntb_unregister_device(struct ntb_dev *ntb); /** * ntb_set_ctx() - associate a driver context with an ntb device * @ntb: NTB device context. * @ctx: Driver context. * @ctx_ops: Driver context operations. * * Associate a driver context and operations with a ntb device. The context is * provided by the client driver, and the driver may associate a different * context with each ntb device. * * Return: Zero if the context is associated, otherwise an error number. */ int ntb_set_ctx(struct ntb_dev *ntb, void *ctx, const struct ntb_ctx_ops *ctx_ops); /** * ntb_clear_ctx() - disassociate any driver context from an ntb device * @ntb: NTB device context. * * Clear any association that may exist between a driver context and the ntb * device. */ void ntb_clear_ctx(struct ntb_dev *ntb); /** * ntb_link_event() - notify driver context of a change in link status * @ntb: NTB device context. * * Notify the driver context that the link status may have changed. The driver * should call ntb_link_is_up() to get the current status. */ void ntb_link_event(struct ntb_dev *ntb); /** * ntb_db_event() - notify driver context of a doorbell event * @ntb: NTB device context. * @vector: Interrupt vector number. * * Notify the driver context of a doorbell event. If hardware supports * multiple interrupt vectors for doorbells, the vector number indicates which * vector received the interrupt. The vector number is relative to the first * vector used for doorbells, starting at zero, and must be less than * ntb_db_vector_count(). The driver may call ntb_db_read() to check which * doorbell bits need service, and ntb_db_vector_mask() to determine which of * those bits are associated with the vector number. */ void ntb_db_event(struct ntb_dev *ntb, int vector); /** * ntb_msg_event() - notify driver context of a message event * @ntb: NTB device context. * * Notify the driver context of a message event. If hardware supports * message registers, this event indicates, that a new message arrived in * some incoming message register or last sent message couldn't be delivered. * The events can be masked/unmasked by the methods ntb_msg_set_mask() and * ntb_msg_clear_mask(). */ void ntb_msg_event(struct ntb_dev *ntb); /** * ntb_default_port_number() - get the default local port number * @ntb: NTB device context. * * If hardware driver doesn't specify port_number() callback method, the NTB * is considered with just two ports. So this method returns default local * port number in compliance with topology. * * NOTE Don't call this method directly. The ntb_port_number() function should * be used instead. * * Return: the default local port number */ int ntb_default_port_number(struct ntb_dev *ntb); /** * ntb_default_port_count() - get the default number of peer device ports * @ntb: NTB device context. * * By default hardware driver supports just one peer device. * * NOTE Don't call this method directly. The ntb_peer_port_count() function * should be used instead. * * Return: the default number of peer ports */ int ntb_default_peer_port_count(struct ntb_dev *ntb); /** * ntb_default_peer_port_number() - get the default peer port by given index * @ntb: NTB device context. * @idx: Peer port index (should not differ from zero). * * By default hardware driver supports just one peer device, so this method * shall return the corresponding value from enum ntb_default_port. * * NOTE Don't call this method directly. The ntb_peer_port_number() function * should be used instead. * * Return: the peer device port or negative value indicating an error */ int ntb_default_peer_port_number(struct ntb_dev *ntb, int pidx); /** * ntb_default_peer_port_idx() - get the default peer device port index by * given port number * @ntb: NTB device context. * @port: Peer port number (should be one of enum ntb_default_port). * * By default hardware driver supports just one peer device, so while * specified port-argument indicates peer port from enum ntb_default_port, * the return value shall be zero. * * NOTE Don't call this method directly. The ntb_peer_port_idx() function * should be used instead. * * Return: the peer port index or negative value indicating an error */ int ntb_default_peer_port_idx(struct ntb_dev *ntb, int port); /** * ntb_port_number() - get the local port number * @ntb: NTB device context. * * Hardware must support at least simple two-ports ntb connection * * Return: the local port number */ static inline int ntb_port_number(struct ntb_dev *ntb) { if (!ntb->ops->port_number) return ntb_default_port_number(ntb); return ntb->ops->port_number(ntb); } /** * ntb_peer_port_count() - get the number of peer device ports * @ntb: NTB device context. * * Hardware may support an access to memory of several remote domains * over multi-port NTB devices. This method returns the number of peers, * local device can have shared memory with. * * Return: the number of peer ports */ static inline int ntb_peer_port_count(struct ntb_dev *ntb) { if (!ntb->ops->peer_port_count) return ntb_default_peer_port_count(ntb); return ntb->ops->peer_port_count(ntb); } /** * ntb_peer_port_number() - get the peer port by given index * @ntb: NTB device context. * @pidx: Peer port index. * * Peer ports are continuously enumerated by NTB API logic, so this method * lets to retrieve port real number by its index. * * Return: the peer device port or negative value indicating an error */ static inline int ntb_peer_port_number(struct ntb_dev *ntb, int pidx) { if (!ntb->ops->peer_port_number) return ntb_default_peer_port_number(ntb, pidx); return ntb->ops->peer_port_number(ntb, pidx); } /** * ntb_logical_port_number() - get the logical port number of the local port * @ntb: NTB device context. * * The Logical Port Number is defined to be a unique number for each * port starting from zero through to the number of ports minus one. * This is in contrast to the Port Number where each port can be assigned * any unique physical number by the hardware. * * The logical port number is useful for calculating the resource indexes * used by peers. * * Return: the logical port number or negative value indicating an error */ static inline int ntb_logical_port_number(struct ntb_dev *ntb) { int lport = ntb_port_number(ntb); int pidx; if (lport < 0) return lport; for (pidx = 0; pidx < ntb_peer_port_count(ntb); pidx++) if (lport <= ntb_peer_port_number(ntb, pidx)) return pidx; return pidx; } /** * ntb_peer_logical_port_number() - get the logical peer port by given index * @ntb: NTB device context. * @pidx: Peer port index. * * The Logical Port Number is defined to be a unique number for each * port starting from zero through to the number of ports minus one. * This is in contrast to the Port Number where each port can be assigned * any unique physical number by the hardware. * * The logical port number is useful for calculating the resource indexes * used by peers. * * Return: the peer's logical port number or negative value indicating an error */ static inline int ntb_peer_logical_port_number(struct ntb_dev *ntb, int pidx) { if (ntb_peer_port_number(ntb, pidx) < ntb_port_number(ntb)) return pidx; else return pidx + 1; } /** * ntb_peer_port_idx() - get the peer device port index by given port number * @ntb: NTB device context. * @port: Peer port number. * * Inverse operation of ntb_peer_port_number(), so one can get port index * by specified port number. * * Return: the peer port index or negative value indicating an error */ static inline int ntb_peer_port_idx(struct ntb_dev *ntb, int port) { if (!ntb->ops->peer_port_idx) return ntb_default_peer_port_idx(ntb, port); return ntb->ops->peer_port_idx(ntb, port); } /** * ntb_link_is_up() - get the current ntb link state * @ntb: NTB device context. * @speed: OUT - The link speed expressed as PCIe generation number. * @width: OUT - The link width expressed as the number of PCIe lanes. * * Get the current state of the ntb link. It is recommended to query the link * state once after every link event. It is safe to query the link state in * the context of the link event callback. * * Return: bitfield of indexed ports link state: bit is set/cleared if the * link is up/down respectively. */ static inline u64 ntb_link_is_up(struct ntb_dev *ntb, enum ntb_speed *speed, enum ntb_width *width) { return ntb->ops->link_is_up(ntb, speed, width); } /** * ntb_link_enable() - enable the local port ntb connection * @ntb: NTB device context. * @max_speed: The maximum link speed expressed as PCIe generation number. * @max_width: The maximum link width expressed as the number of PCIe lanes. * * Enable the NTB/PCIe link on the local or remote (for bridge-to-bridge * topology) side of the bridge. If it's supported the ntb device should train * the link to its maximum speed and width, or the requested speed and width, * whichever is smaller. Some hardware doesn't support PCIe link training, so * the last two arguments will be ignored then. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_link_enable(struct ntb_dev *ntb, enum ntb_speed max_speed, enum ntb_width max_width) { return ntb->ops->link_enable(ntb, max_speed, max_width); } /** * ntb_link_disable() - disable the local port ntb connection * @ntb: NTB device context. * * Disable the link on the local or remote (for b2b topology) of the ntb. * The ntb device should disable the link. Returning from this call must * indicate that a barrier has passed, though with no more writes may pass in * either direction across the link, except if this call returns an error * number. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_link_disable(struct ntb_dev *ntb) { return ntb->ops->link_disable(ntb); } /** * ntb_mw_count() - get the number of inbound memory windows, which could * be created for a specified peer device * @ntb: NTB device context. * @pidx: Port index of peer device. * * Hardware and topology may support a different number of memory windows. * Moreover different peer devices can support different number of memory * windows. Simply speaking this method returns the number of possible inbound * memory windows to share with specified peer device. Note: this may return * zero if the link is not up yet. * * Return: the number of memory windows. */ static inline int ntb_mw_count(struct ntb_dev *ntb, int pidx) { return ntb->ops->mw_count(ntb, pidx); } /** * ntb_mw_get_align() - get the restriction parameters of inbound memory window * @ntb: NTB device context. * @pidx: Port index of peer device. * @widx: Memory window index. * @addr_align: OUT - the base alignment for translating the memory window * @size_align: OUT - the size alignment for translating the memory window * @size_max: OUT - the maximum size of the memory window * * Get the alignments of an inbound memory window with specified index. * NULL may be given for any output parameter if the value is not needed. * The alignment and size parameters may be used for allocation of proper * shared memory. Note: this must only be called when the link is up. * * Return: Zero on success, otherwise a negative error number. */ static inline int ntb_mw_get_align(struct ntb_dev *ntb, int pidx, int widx, resource_size_t *addr_align, resource_size_t *size_align, resource_size_t *size_max) { if (!(ntb_link_is_up(ntb, NULL, NULL) & BIT_ULL(pidx))) return -ENOTCONN; return ntb->ops->mw_get_align(ntb, pidx, widx, addr_align, size_align, size_max); } /** * ntb_mw_set_trans() - set the translation of an inbound memory window * @ntb: NTB device context. * @pidx: Port index of peer device. * @widx: Memory window index. * @addr: The dma address of local memory to expose to the peer. * @size: The size of the local memory to expose to the peer. * * Set the translation of a memory window. The peer may access local memory * through the window starting at the address, up to the size. The address * and size must be aligned in compliance with restrictions of * ntb_mw_get_align(). The region size should not exceed the size_max parameter * of that method. * * This method may not be implemented due to the hardware specific memory * windows interface. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx, dma_addr_t addr, resource_size_t size) { if (!ntb->ops->mw_set_trans) return 0; return ntb->ops->mw_set_trans(ntb, pidx, widx, addr, size); } /** * ntb_mw_clear_trans() - clear the translation address of an inbound memory * window * @ntb: NTB device context. * @pidx: Port index of peer device. * @widx: Memory window index. * * Clear the translation of an inbound memory window. The peer may no longer * access local memory through the window. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_mw_clear_trans(struct ntb_dev *ntb, int pidx, int widx) { if (!ntb->ops->mw_clear_trans) return ntb_mw_set_trans(ntb, pidx, widx, 0, 0); return ntb->ops->mw_clear_trans(ntb, pidx, widx); } /** * ntb_peer_mw_count() - get the number of outbound memory windows, which could * be mapped to access a shared memory * @ntb: NTB device context. * * Hardware and topology may support a different number of memory windows. * This method returns the number of outbound memory windows supported by * local device. * * Return: the number of memory windows. */ static inline int ntb_peer_mw_count(struct ntb_dev *ntb) { return ntb->ops->peer_mw_count(ntb); } /** * ntb_peer_mw_get_addr() - get map address of an outbound memory window * @ntb: NTB device context. * @widx: Memory window index (within ntb_peer_mw_count() return value). * @base: OUT - the base address of mapping region. * @size: OUT - the size of mapping region. * * Get base and size of memory region to map. NULL may be given for any output * parameter if the value is not needed. The base and size may be used for * mapping the memory window, to access the peer memory. * * Return: Zero on success, otherwise a negative error number. */ static inline int ntb_peer_mw_get_addr(struct ntb_dev *ntb, int widx, phys_addr_t *base, resource_size_t *size) { return ntb->ops->peer_mw_get_addr(ntb, widx, base, size); } /** * ntb_peer_mw_set_trans() - set a translation address of a memory window * retrieved from a peer device * @ntb: NTB device context. * @pidx: Port index of peer device the translation address received from. * @widx: Memory window index. * @addr: The dma address of the shared memory to access. * @size: The size of the shared memory to access. * * Set the translation of an outbound memory window. The local device may * access shared memory allocated by a peer device sent the address. * * This method may not be implemented due to the hardware specific memory * windows interface, so a translation address can be only set on the side, * where shared memory (inbound memory windows) is allocated. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx, u64 addr, resource_size_t size) { if (!ntb->ops->peer_mw_set_trans) return 0; return ntb->ops->peer_mw_set_trans(ntb, pidx, widx, addr, size); } /** * ntb_peer_mw_clear_trans() - clear the translation address of an outbound * memory window * @ntb: NTB device context. * @pidx: Port index of peer device. * @widx: Memory window index. * * Clear the translation of a outbound memory window. The local device may no * longer access a shared memory through the window. * * This method may not be implemented due to the hardware specific memory * windows interface. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_mw_clear_trans(struct ntb_dev *ntb, int pidx, int widx) { if (!ntb->ops->peer_mw_clear_trans) return ntb_peer_mw_set_trans(ntb, pidx, widx, 0, 0); return ntb->ops->peer_mw_clear_trans(ntb, pidx, widx); } /** * ntb_db_is_unsafe() - check if it is safe to use hardware doorbell * @ntb: NTB device context. * * It is possible for some ntb hardware to be affected by errata. Hardware * drivers can advise clients to avoid using doorbells. Clients may ignore * this advice, though caution is recommended. * * Return: Zero if it is safe to use doorbells, or One if it is not safe. */ static inline int ntb_db_is_unsafe(struct ntb_dev *ntb) { if (!ntb->ops->db_is_unsafe) return 0; return ntb->ops->db_is_unsafe(ntb); } /** * ntb_db_valid_mask() - get a mask of doorbell bits supported by the ntb * @ntb: NTB device context. * * Hardware may support different number or arrangement of doorbell bits. * * Return: A mask of doorbell bits supported by the ntb. */ static inline u64 ntb_db_valid_mask(struct ntb_dev *ntb) { return ntb->ops->db_valid_mask(ntb); } /** * ntb_db_vector_count() - get the number of doorbell interrupt vectors * @ntb: NTB device context. * * Hardware may support different number of interrupt vectors. * * Return: The number of doorbell interrupt vectors. */ static inline int ntb_db_vector_count(struct ntb_dev *ntb) { if (!ntb->ops->db_vector_count) return 1; return ntb->ops->db_vector_count(ntb); } /** * ntb_db_vector_mask() - get a mask of doorbell bits serviced by a vector * @ntb: NTB device context. * @vector: Doorbell vector number. * * Each interrupt vector may have a different number or arrangement of bits. * * Return: A mask of doorbell bits serviced by a vector. */ static inline u64 ntb_db_vector_mask(struct ntb_dev *ntb, int vector) { if (!ntb->ops->db_vector_mask) return ntb_db_valid_mask(ntb); return ntb->ops->db_vector_mask(ntb, vector); } /** * ntb_db_read() - read the local doorbell register * @ntb: NTB device context. * * Read the local doorbell register, and return the bits that are set. * * Return: The bits currently set in the local doorbell register. */ static inline u64 ntb_db_read(struct ntb_dev *ntb) { return ntb->ops->db_read(ntb); } /** * ntb_db_set() - set bits in the local doorbell register * @ntb: NTB device context. * @db_bits: Doorbell bits to set. * * Set bits in the local doorbell register, which may generate a local doorbell * interrupt. Bits that were already set must remain set. * * This is unusual, and hardware may not support it. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_db_set(struct ntb_dev *ntb, u64 db_bits) { if (!ntb->ops->db_set) return -EINVAL; return ntb->ops->db_set(ntb, db_bits); } /** * ntb_db_clear() - clear bits in the local doorbell register * @ntb: NTB device context. * @db_bits: Doorbell bits to clear. * * Clear bits in the local doorbell register, arming the bits for the next * doorbell. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_db_clear(struct ntb_dev *ntb, u64 db_bits) { return ntb->ops->db_clear(ntb, db_bits); } /** * ntb_db_read_mask() - read the local doorbell mask * @ntb: NTB device context. * * Read the local doorbell mask register, and return the bits that are set. * * This is unusual, though hardware is likely to support it. * * Return: The bits currently set in the local doorbell mask register. */ static inline u64 ntb_db_read_mask(struct ntb_dev *ntb) { if (!ntb->ops->db_read_mask) return 0; return ntb->ops->db_read_mask(ntb); } /** * ntb_db_set_mask() - set bits in the local doorbell mask * @ntb: NTB device context. * @db_bits: Doorbell mask bits to set. * * Set bits in the local doorbell mask register, preventing doorbell interrupts * from being generated for those doorbell bits. Bits that were already set * must remain set. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_db_set_mask(struct ntb_dev *ntb, u64 db_bits) { return ntb->ops->db_set_mask(ntb, db_bits); } /** * ntb_db_clear_mask() - clear bits in the local doorbell mask * @ntb: NTB device context. * @db_bits: Doorbell bits to clear. * * Clear bits in the local doorbell mask register, allowing doorbell interrupts * from being generated for those doorbell bits. If a doorbell bit is already * set at the time the mask is cleared, and the corresponding mask bit is * changed from set to clear, then the ntb driver must ensure that * ntb_db_event() is called. If the hardware does not generate the interrupt * on clearing the mask bit, then the driver must call ntb_db_event() anyway. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_db_clear_mask(struct ntb_dev *ntb, u64 db_bits) { return ntb->ops->db_clear_mask(ntb, db_bits); } /** * ntb_peer_db_addr() - address and size of the peer doorbell register * @ntb: NTB device context. * @db_addr: OUT - The address of the peer doorbell register. * @db_size: OUT - The number of bytes to write the peer doorbell register. * @db_data: OUT - The data of peer doorbell register * @db_bit: door bell bit number * * Return the address of the peer doorbell register. This may be used, for * example, by drivers that offload memory copy operations to a dma engine. * The drivers may wish to ring the peer doorbell at the completion of memory * copy operations. For efficiency, and to simplify ordering of operations * between the dma memory copies and the ringing doorbell, the driver may * append one additional dma memory copy with the doorbell register as the * destination, after the memory copy operations. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, resource_size_t *db_size, u64 *db_data, int db_bit) { if (!ntb->ops->peer_db_addr) return -EINVAL; return ntb->ops->peer_db_addr(ntb, db_addr, db_size, db_data, db_bit); } /** * ntb_peer_db_read() - read the peer doorbell register * @ntb: NTB device context. * * Read the peer doorbell register, and return the bits that are set. * * This is unusual, and hardware may not support it. * * Return: The bits currently set in the peer doorbell register. */ static inline u64 ntb_peer_db_read(struct ntb_dev *ntb) { if (!ntb->ops->peer_db_read) return 0; return ntb->ops->peer_db_read(ntb); } /** * ntb_peer_db_set() - set bits in the peer doorbell register * @ntb: NTB device context. * @db_bits: Doorbell bits to set. * * Set bits in the peer doorbell register, which may generate a peer doorbell * interrupt. Bits that were already set must remain set. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_db_set(struct ntb_dev *ntb, u64 db_bits) { return ntb->ops->peer_db_set(ntb, db_bits); } /** * ntb_peer_db_clear() - clear bits in the peer doorbell register * @ntb: NTB device context. * @db_bits: Doorbell bits to clear. * * Clear bits in the peer doorbell register, arming the bits for the next * doorbell. * * This is unusual, and hardware may not support it. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_db_clear(struct ntb_dev *ntb, u64 db_bits) { if (!ntb->ops->db_clear) return -EINVAL; return ntb->ops->peer_db_clear(ntb, db_bits); } /** * ntb_peer_db_read_mask() - read the peer doorbell mask * @ntb: NTB device context. * * Read the peer doorbell mask register, and return the bits that are set. * * This is unusual, and hardware may not support it. * * Return: The bits currently set in the peer doorbell mask register. */ static inline u64 ntb_peer_db_read_mask(struct ntb_dev *ntb) { if (!ntb->ops->db_read_mask) return 0; return ntb->ops->peer_db_read_mask(ntb); } /** * ntb_peer_db_set_mask() - set bits in the peer doorbell mask * @ntb: NTB device context. * @db_bits: Doorbell mask bits to set. * * Set bits in the peer doorbell mask register, preventing doorbell interrupts * from being generated for those doorbell bits. Bits that were already set * must remain set. * * This is unusual, and hardware may not support it. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_db_set_mask(struct ntb_dev *ntb, u64 db_bits) { if (!ntb->ops->db_set_mask) return -EINVAL; return ntb->ops->peer_db_set_mask(ntb, db_bits); } /** * ntb_peer_db_clear_mask() - clear bits in the peer doorbell mask * @ntb: NTB device context. * @db_bits: Doorbell bits to clear. * * Clear bits in the peer doorbell mask register, allowing doorbell interrupts * from being generated for those doorbell bits. If the hardware does not * generate the interrupt on clearing the mask bit, then the driver should not * implement this function! * * This is unusual, and hardware may not support it. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_db_clear_mask(struct ntb_dev *ntb, u64 db_bits) { if (!ntb->ops->db_clear_mask) return -EINVAL; return ntb->ops->peer_db_clear_mask(ntb, db_bits); } /** * ntb_spad_is_unsafe() - check if it is safe to use the hardware scratchpads * @ntb: NTB device context. * * It is possible for some ntb hardware to be affected by errata. Hardware * drivers can advise clients to avoid using scratchpads. Clients may ignore * this advice, though caution is recommended. * * Return: Zero if it is safe to use scratchpads, or One if it is not safe. */ static inline int ntb_spad_is_unsafe(struct ntb_dev *ntb) { if (!ntb->ops->spad_is_unsafe) return 0; return ntb->ops->spad_is_unsafe(ntb); } /** * ntb_spad_count() - get the number of scratchpads * @ntb: NTB device context. * * Hardware and topology may support a different number of scratchpads. * Although it must be the same for all ports per NTB device. * * Return: the number of scratchpads. */ static inline int ntb_spad_count(struct ntb_dev *ntb) { if (!ntb->ops->spad_count) return 0; return ntb->ops->spad_count(ntb); } /** * ntb_spad_read() - read the local scratchpad register * @ntb: NTB device context. * @sidx: Scratchpad index. * * Read the local scratchpad register, and return the value. * * Return: The value of the local scratchpad register. */ static inline u32 ntb_spad_read(struct ntb_dev *ntb, int sidx) { if (!ntb->ops->spad_read) return ~(u32)0; return ntb->ops->spad_read(ntb, sidx); } /** * ntb_spad_write() - write the local scratchpad register * @ntb: NTB device context. * @sidx: Scratchpad index. * @val: Scratchpad value. * * Write the value to the local scratchpad register. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_spad_write(struct ntb_dev *ntb, int sidx, u32 val) { if (!ntb->ops->spad_write) return -EINVAL; return ntb->ops->spad_write(ntb, sidx, val); } /** * ntb_peer_spad_addr() - address of the peer scratchpad register * @ntb: NTB device context. * @pidx: Port index of peer device. * @sidx: Scratchpad index. * @spad_addr: OUT - The address of the peer scratchpad register. * * Return the address of the peer scratchpad register. This may be used, for * example, by drivers that offload memory copy operations to a dma engine. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_spad_addr(struct ntb_dev *ntb, int pidx, int sidx, phys_addr_t *spad_addr) { if (!ntb->ops->peer_spad_addr) return -EINVAL; return ntb->ops->peer_spad_addr(ntb, pidx, sidx, spad_addr); } /** * ntb_peer_spad_read() - read the peer scratchpad register * @ntb: NTB device context. * @pidx: Port index of peer device. * @sidx: Scratchpad index. * * Read the peer scratchpad register, and return the value. * * Return: The value of the peer scratchpad register. */ static inline u32 ntb_peer_spad_read(struct ntb_dev *ntb, int pidx, int sidx) { if (!ntb->ops->peer_spad_read) return ~(u32)0; return ntb->ops->peer_spad_read(ntb, pidx, sidx); } /** * ntb_peer_spad_write() - write the peer scratchpad register * @ntb: NTB device context. * @pidx: Port index of peer device. * @sidx: Scratchpad index. * @val: Scratchpad value. * * Write the value to the peer scratchpad register. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_peer_spad_write(struct ntb_dev *ntb, int pidx, int sidx, u32 val) { if (!ntb->ops->peer_spad_write) return -EINVAL; return ntb->ops->peer_spad_write(ntb, pidx, sidx, val); } /** * ntb_msg_count() - get the number of message registers * @ntb: NTB device context. * * Hardware may support a different number of message registers. * * Return: the number of message registers. */ static inline int ntb_msg_count(struct ntb_dev *ntb) { if (!ntb->ops->msg_count) return 0; return ntb->ops->msg_count(ntb); } /** * ntb_msg_inbits() - get a bitfield of inbound message registers status * @ntb: NTB device context. * * The method returns the bitfield of status and mask registers, which related * to inbound message registers. * * Return: bitfield of inbound message registers. */ static inline u64 ntb_msg_inbits(struct ntb_dev *ntb) { if (!ntb->ops->msg_inbits) return 0; return ntb->ops->msg_inbits(ntb); } /** * ntb_msg_outbits() - get a bitfield of outbound message registers status * @ntb: NTB device context. * * The method returns the bitfield of status and mask registers, which related * to outbound message registers. * * Return: bitfield of outbound message registers. */ static inline u64 ntb_msg_outbits(struct ntb_dev *ntb) { if (!ntb->ops->msg_outbits) return 0; return ntb->ops->msg_outbits(ntb); } /** * ntb_msg_read_sts() - read the message registers status * @ntb: NTB device context. * * Read the status of message register. Inbound and outbound message registers * related bits can be filtered by masks retrieved from ntb_msg_inbits() and * ntb_msg_outbits(). * * Return: status bits of message registers */ static inline u64 ntb_msg_read_sts(struct ntb_dev *ntb) { if (!ntb->ops->msg_read_sts) return 0; return ntb->ops->msg_read_sts(ntb); } /** * ntb_msg_clear_sts() - clear status bits of message registers * @ntb: NTB device context. * @sts_bits: Status bits to clear. * * Clear bits in the status register. * * Return: Zero on success, otherwise a negative error number. */ static inline int ntb_msg_clear_sts(struct ntb_dev *ntb, u64 sts_bits) { if (!ntb->ops->msg_clear_sts) return -EINVAL; return ntb->ops->msg_clear_sts(ntb, sts_bits); } /** * ntb_msg_set_mask() - set mask of message register status bits * @ntb: NTB device context. * @mask_bits: Mask bits. * * Mask the message registers status bits from raising the message event. * * Return: Zero on success, otherwise a negative error number. */ static inline int ntb_msg_set_mask(struct ntb_dev *ntb, u64 mask_bits) { if (!ntb->ops->msg_set_mask) return -EINVAL; return ntb->ops->msg_set_mask(ntb, mask_bits); } /** * ntb_msg_clear_mask() - clear message registers mask * @ntb: NTB device context. * @mask_bits: Mask bits to clear. * * Clear bits in the message events mask register. * * Return: Zero on success, otherwise a negative error number. */ static inline int ntb_msg_clear_mask(struct ntb_dev *ntb, u64 mask_bits) { if (!ntb->ops->msg_clear_mask) return -EINVAL; return ntb->ops->msg_clear_mask(ntb, mask_bits); } /** * ntb_msg_read() - read inbound message register with specified index * @ntb: NTB device context. * @pidx: OUT - Port index of peer device a message retrieved from * @midx: Message register index * * Read data from the specified message register. Source port index of a * message is retrieved as well. * * Return: The value of the inbound message register. */ static inline u32 ntb_msg_read(struct ntb_dev *ntb, int *pidx, int midx) { if (!ntb->ops->msg_read) return ~(u32)0; return ntb->ops->msg_read(ntb, pidx, midx); } /** * ntb_peer_msg_write() - write data to the specified peer message register * @ntb: NTB device context. * @pidx: Port index of peer device a message being sent to * @midx: Message register index * @msg: Data to send * * Send data to a specified peer device using the defined message register. * Message event can be raised if the midx registers isn't empty while * calling this method and the corresponding interrupt isn't masked. * * Return: Zero on success, otherwise a negative error number. */ static inline int ntb_peer_msg_write(struct ntb_dev *ntb, int pidx, int midx, u32 msg) { if (!ntb->ops->peer_msg_write) return -EINVAL; return ntb->ops->peer_msg_write(ntb, pidx, midx, msg); } /** * ntb_peer_resource_idx() - get a resource index for a given peer idx * @ntb: NTB device context. * @pidx: Peer port index. * * When constructing a graph of peers, each remote peer must use a different * resource index (mw, doorbell, etc) to communicate with each other * peer. * * In a two peer system, this function should always return 0 such that * resource 0 points to the remote peer on both ports. * * In a 5 peer system, this function will return the following matrix * * pidx \ port 0 1 2 3 4 * 0 0 0 1 2 3 * 1 0 1 1 2 3 * 2 0 1 2 2 3 * 3 0 1 2 3 3 * * For example, if this function is used to program peer's memory * windows, port 0 will program MW 0 on all it's peers to point to itself. * port 1 will program MW 0 in port 0 to point to itself and MW 1 on all * other ports. etc. * * For the legacy two host case, ntb_port_number() and ntb_peer_port_number() * both return zero and therefore this function will always return zero. * So MW 0 on each host would be programmed to point to the other host. * * Return: the resource index to use for that peer. */ static inline int ntb_peer_resource_idx(struct ntb_dev *ntb, int pidx) { int local_port, peer_port; if (pidx >= ntb_peer_port_count(ntb)) return -EINVAL; local_port = ntb_logical_port_number(ntb); peer_port = ntb_peer_logical_port_number(ntb, pidx); if (peer_port < local_port) return local_port - 1; else return local_port; } /** * ntb_peer_highest_mw_idx() - get a memory window index for a given peer idx * using the highest index memory windows first * * @ntb: NTB device context. * @pidx: Peer port index. * * Like ntb_peer_resource_idx(), except it returns indexes starting with * last memory window index. * * Return: the resource index to use for that peer. */ static inline int ntb_peer_highest_mw_idx(struct ntb_dev *ntb, int pidx) { int ret; ret = ntb_peer_resource_idx(ntb, pidx); if (ret < 0) return ret; return ntb_mw_count(ntb, pidx) - ret - 1; } struct ntb_msi_desc { u32 addr_offset; u32 data; }; #ifdef CONFIG_NTB_MSI int ntb_msi_init(struct ntb_dev *ntb, void (*desc_changed)(void *ctx)); int ntb_msi_setup_mws(struct ntb_dev *ntb); void ntb_msi_clear_mws(struct ntb_dev *ntb); int ntbm_msi_request_threaded_irq(struct ntb_dev *ntb, irq_handler_t handler, irq_handler_t thread_fn, const char *name, void *dev_id, struct ntb_msi_desc *msi_desc); void ntbm_msi_free_irq(struct ntb_dev *ntb, unsigned int irq, void *dev_id); int ntb_msi_peer_trigger(struct ntb_dev *ntb, int peer, struct ntb_msi_desc *desc); int ntb_msi_peer_addr(struct ntb_dev *ntb, int peer, struct ntb_msi_desc *desc, phys_addr_t *msi_addr); #else /* not CONFIG_NTB_MSI */ static inline int ntb_msi_init(struct ntb_dev *ntb, void (*desc_changed)(void *ctx)) { return -EOPNOTSUPP; } static inline int ntb_msi_setup_mws(struct ntb_dev *ntb) { return -EOPNOTSUPP; } static inline void ntb_msi_clear_mws(struct ntb_dev *ntb) {} static inline int ntbm_msi_request_threaded_irq(struct ntb_dev *ntb, irq_handler_t handler, irq_handler_t thread_fn, const char *name, void *dev_id, struct ntb_msi_desc *msi_desc) { return -EOPNOTSUPP; } static inline void ntbm_msi_free_irq(struct ntb_dev *ntb, unsigned int irq, void *dev_id) {} static inline int ntb_msi_peer_trigger(struct ntb_dev *ntb, int peer, struct ntb_msi_desc *desc) { return -EOPNOTSUPP; } static inline int ntb_msi_peer_addr(struct ntb_dev *ntb, int peer, struct ntb_msi_desc *desc, phys_addr_t *msi_addr) { return -EOPNOTSUPP; } #endif /* CONFIG_NTB_MSI */ static inline int ntbm_msi_request_irq(struct ntb_dev *ntb, irq_handler_t handler, const char *name, void *dev_id, struct ntb_msi_desc *msi_desc) { return ntbm_msi_request_threaded_irq(ntb, handler, NULL, name, dev_id, msi_desc); } #endif PK ! ��<�L L array_size.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ARRAY_SIZE_H #define _LINUX_ARRAY_SIZE_H #include <linux/compiler.h> /** * ARRAY_SIZE - get the number of elements in array @arr * @arr: array to be sized */ #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr)) #endif /* _LINUX_ARRAY_SIZE_H */ PK ! 5l�X X micrel_phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/micrel_phy.h * * Micrel PHY IDs */ #ifndef _MICREL_PHY_H #define _MICREL_PHY_H #define MICREL_PHY_ID_MASK 0x00fffff0 #define PHY_ID_KSZ8873MLL 0x000e7237 #define PHY_ID_KSZ9021 0x00221610 #define PHY_ID_KSZ9021RLRN 0x00221611 #define PHY_ID_KS8737 0x00221720 #define PHY_ID_KSZ8021 0x00221555 #define PHY_ID_KSZ8031 0x00221556 #define PHY_ID_KSZ8041 0x00221510 /* undocumented */ #define PHY_ID_KSZ8041RNLI 0x00221537 #define PHY_ID_KSZ8051 0x00221550 /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */ #define PHY_ID_KSZ8001 0x0022161A /* same id: KS8081, KS8091 */ #define PHY_ID_KSZ8081 0x00221560 #define PHY_ID_KSZ8061 0x00221570 #define PHY_ID_KSZ9031 0x00221620 #define PHY_ID_KSZ9131 0x00221640 #define PHY_ID_LAN8814 0x00221660 #define PHY_ID_KSZ886X 0x00221430 #define PHY_ID_KSZ8863 0x00221435 #define PHY_ID_KSZ87XX 0x00221550 #define PHY_ID_KSZ9477 0x00221631 /* struct phy_device dev_flags definitions */ #define MICREL_PHY_50MHZ_CLK BIT(0) #define MICREL_PHY_FXEN BIT(1) #define MICREL_KSZ8_P1_ERRATA BIT(2) #define MICREL_KSZ9021_EXTREG_CTRL 0xB #define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC #define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104 #define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105 /* Device specific MII_BMCR (Reg 0) bits */ /* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */ #define KSZ886X_BMCR_HP_MDIX BIT(5) /* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation * (transmit on TXP/TXM pins) */ #define KSZ886X_BMCR_FORCE_MDI BIT(4) /* 1 = Disable auto MDI-X */ #define KSZ886X_BMCR_DISABLE_AUTO_MDIX BIT(3) #define KSZ886X_BMCR_DISABLE_FAR_END_FAULT BIT(2) #define KSZ886X_BMCR_DISABLE_TRANSMIT BIT(1) #define KSZ886X_BMCR_DISABLE_LED BIT(0) #define KSZ886X_CTRL_MDIX_STAT BIT(4) #endif /* _MICREL_PHY_H */ PK ! T���P �P irqdomain.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * irq_domain - IRQ translation domains * * Translation infrastructure between hw and linux irq numbers. This is * helpful for interrupt controllers to implement mapping between hardware * irq numbers and the Linux irq number space. * * irq_domains also have hooks for translating device tree or other * firmware interrupt representations into a hardware irq number that * can be mapped back to a Linux irq number without any extra platform * support code. * * Interrupt controller "domain" data structure. This could be defined as a * irq domain controller. That is, it handles the mapping between hardware * and virtual interrupt numbers for a given interrupt domain. The domain * structure is generally created by the PIC code for a given PIC instance * (though a domain can cover more than one PIC if they have a flat number * model). It's the domain callbacks that are responsible for setting the * irq_chip on a given irq_desc after it's been mapped. * * The host code and data structures use a fwnode_handle pointer to * identify the domain. In some cases, and in order to preserve source * code compatibility, this fwnode pointer is "upgraded" to a DT * device_node. For those firmware infrastructures that do not provide * a unique identifier for an interrupt controller, the irq_domain * code offers a fwnode allocator. */ #ifndef _LINUX_IRQDOMAIN_H #define _LINUX_IRQDOMAIN_H #include <linux/types.h> #include <linux/irqhandler.h> #include <linux/of.h> #include <linux/mutex.h> #include <linux/radix-tree.h> struct device_node; struct fwnode_handle; struct irq_domain; struct irq_chip; struct irq_data; struct irq_desc; struct cpumask; struct seq_file; struct irq_affinity_desc; #define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16 /** * struct irq_fwspec - generic IRQ specifier structure * * @fwnode: Pointer to a firmware-specific descriptor * @param_count: Number of device-specific parameters * @param: Device-specific parameters * * This structure, directly modeled after of_phandle_args, is used to * pass a device-specific description of an interrupt. */ struct irq_fwspec { struct fwnode_handle *fwnode; int param_count; u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS]; }; /* * Should several domains have the same device node, but serve * different purposes (for example one domain is for PCI/MSI, and the * other for wired IRQs), they can be distinguished using a * bus-specific token. Most domains are expected to only carry * DOMAIN_BUS_ANY. */ enum irq_domain_bus_token { DOMAIN_BUS_ANY = 0, DOMAIN_BUS_WIRED, DOMAIN_BUS_GENERIC_MSI, DOMAIN_BUS_PCI_MSI, DOMAIN_BUS_PLATFORM_MSI, DOMAIN_BUS_NEXUS, DOMAIN_BUS_IPI, DOMAIN_BUS_FSL_MC_MSI, DOMAIN_BUS_TI_SCI_INTA_MSI, DOMAIN_BUS_WAKEUP, DOMAIN_BUS_VMD_MSI, }; /** * struct irq_domain_ops - Methods for irq_domain objects * @match: Match an interrupt controller device node to a host, returns * 1 on a match * @map: Create or update a mapping between a virtual irq number and a hw * irq number. This is called only once for a given mapping. * @unmap: Dispose of such a mapping * @xlate: Given a device tree node and interrupt specifier, decode * the hardware irq number and linux irq type value. * * Functions below are provided by the driver and called whenever a new mapping * is created or an old mapping is disposed. The driver can then proceed to * whatever internal data structures management is required. It also needs * to setup the irq_desc when returning from map(). */ struct irq_domain_ops { int (*match)(struct irq_domain *d, struct device_node *node, enum irq_domain_bus_token bus_token); int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec, enum irq_domain_bus_token bus_token); int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw); void (*unmap)(struct irq_domain *d, unsigned int virq); int (*xlate)(struct irq_domain *d, struct device_node *node, const u32 *intspec, unsigned int intsize, unsigned long *out_hwirq, unsigned int *out_type); #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY /* extended V2 interfaces to support hierarchy irq_domains */ int (*alloc)(struct irq_domain *d, unsigned int virq, unsigned int nr_irqs, void *arg); void (*free)(struct irq_domain *d, unsigned int virq, unsigned int nr_irqs); int (*activate)(struct irq_domain *d, struct irq_data *irqd, bool reserve); void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data); int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *out_hwirq, unsigned int *out_type); #endif #ifdef CONFIG_GENERIC_IRQ_DEBUGFS void (*debug_show)(struct seq_file *m, struct irq_domain *d, struct irq_data *irqd, int ind); #endif }; extern struct irq_domain_ops irq_generic_chip_ops; struct irq_domain_chip_generic; /** * struct irq_domain - Hardware interrupt number translation object * @link: Element in global irq_domain list. * @name: Name of interrupt domain * @ops: pointer to irq_domain methods * @host_data: private data pointer for use by owner. Not touched by irq_domain * core code. * @flags: host per irq_domain flags * @mapcount: The number of mapped interrupts * * Optional elements * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy * to swap it for the of_node via the irq_domain_get_of_node accessor * @gc: Pointer to a list of generic chips. There is a helper function for * setting up one or more generic chips for interrupt controllers * drivers using the generic chip library which uses this pointer. * @dev: Pointer to a device that the domain represent, and that will be * used for power management purposes. * @parent: Pointer to parent irq_domain to support hierarchy irq_domains * * Revmap data, used internally by irq_domain * @revmap_size: Size of the linear map table @revmap[] * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map * @revmap_mutex: Lock for the revmap * @revmap: Linear table of irq_data pointers */ struct irq_domain { struct list_head link; const char *name; const struct irq_domain_ops *ops; void *host_data; unsigned int flags; unsigned int mapcount; /* Optional data */ struct fwnode_handle *fwnode; enum irq_domain_bus_token bus_token; struct irq_domain_chip_generic *gc; struct device *dev; #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY struct irq_domain *parent; #endif /* reverse map data. The linear map gets appended to the irq_domain */ irq_hw_number_t hwirq_max; unsigned int revmap_size; struct radix_tree_root revmap_tree; struct mutex revmap_mutex; struct irq_data __rcu *revmap[]; }; /* Irq domain flags */ enum { /* Irq domain is hierarchical */ IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0), /* Irq domain name was allocated in __irq_domain_add() */ IRQ_DOMAIN_NAME_ALLOCATED = (1 << 1), /* Irq domain is an IPI domain with virq per cpu */ IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2), /* Irq domain is an IPI domain with single virq */ IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3), /* Irq domain implements MSIs */ IRQ_DOMAIN_FLAG_MSI = (1 << 4), /* Irq domain implements MSI remapping */ IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5), /* * Quirk to handle MSI implementations which do not provide * masking. Currently known to affect x86, but partially * handled in core code. */ IRQ_DOMAIN_MSI_NOMASK_QUIRK = (1 << 6), /* Irq domain doesn't translate anything */ IRQ_DOMAIN_FLAG_NO_MAP = (1 << 7), /* * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved * for implementation specific purposes and ignored by the * core code. */ IRQ_DOMAIN_FLAG_NONCORE = (1 << 16), }; static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d) { return to_of_node(d->fwnode); } static inline void irq_domain_set_pm_device(struct irq_domain *d, struct device *dev) { if (d) d->dev = dev; } #ifdef CONFIG_IRQ_DOMAIN struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, const char *name, phys_addr_t *pa); enum { IRQCHIP_FWNODE_REAL, IRQCHIP_FWNODE_NAMED, IRQCHIP_FWNODE_NAMED_ID, }; static inline struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name) { return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL); } static inline struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id) { return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name, NULL); } static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa) { return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa); } void irq_domain_free_fwnode(struct fwnode_handle *fwnode); struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, unsigned int size, irq_hw_number_t hwirq_max, int direct_max, const struct irq_domain_ops *ops, void *host_data); struct irq_domain *irq_domain_create_simple(struct fwnode_handle *fwnode, unsigned int size, unsigned int first_irq, const struct irq_domain_ops *ops, void *host_data); struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, unsigned int size, unsigned int first_irq, irq_hw_number_t first_hwirq, const struct irq_domain_ops *ops, void *host_data); struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode, unsigned int size, unsigned int first_irq, irq_hw_number_t first_hwirq, const struct irq_domain_ops *ops, void *host_data); extern struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, enum irq_domain_bus_token bus_token); extern bool irq_domain_check_msi_remap(void); extern void irq_set_default_host(struct irq_domain *host); extern struct irq_domain *irq_get_default_host(void); extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, irq_hw_number_t hwirq, int node, const struct irq_affinity_desc *affinity); static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node) { return node ? &node->fwnode : NULL; } extern const struct fwnode_operations irqchip_fwnode_ops; static inline bool is_fwnode_irqchip(struct fwnode_handle *fwnode) { return fwnode && fwnode->ops == &irqchip_fwnode_ops; } extern void irq_domain_update_bus_token(struct irq_domain *domain, enum irq_domain_bus_token bus_token); static inline struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token) { struct irq_fwspec fwspec = { .fwnode = fwnode, }; return irq_find_matching_fwspec(&fwspec, bus_token); } static inline struct irq_domain *irq_find_matching_host(struct device_node *node, enum irq_domain_bus_token bus_token) { return irq_find_matching_fwnode(of_node_to_fwnode(node), bus_token); } static inline struct irq_domain *irq_find_host(struct device_node *node) { struct irq_domain *d; d = irq_find_matching_host(node, DOMAIN_BUS_WIRED); if (!d) d = irq_find_matching_host(node, DOMAIN_BUS_ANY); return d; } static inline struct irq_domain *irq_domain_add_simple(struct device_node *of_node, unsigned int size, unsigned int first_irq, const struct irq_domain_ops *ops, void *host_data) { return irq_domain_create_simple(of_node_to_fwnode(of_node), size, first_irq, ops, host_data); } /** * irq_domain_add_linear() - Allocate and register a linear revmap irq_domain. * @of_node: pointer to interrupt controller's device tree node. * @size: Number of interrupts in the domain. * @ops: map/unmap domain callbacks * @host_data: Controller private data pointer */ static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node, unsigned int size, const struct irq_domain_ops *ops, void *host_data) { return __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); } #ifdef CONFIG_IRQ_DOMAIN_NOMAP static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_node, unsigned int max_irq, const struct irq_domain_ops *ops, void *host_data) { return __irq_domain_add(of_node_to_fwnode(of_node), 0, max_irq, max_irq, ops, host_data); } extern unsigned int irq_create_direct_mapping(struct irq_domain *host); #endif static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node, const struct irq_domain_ops *ops, void *host_data) { return __irq_domain_add(of_node_to_fwnode(of_node), 0, ~0, 0, ops, host_data); } static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode, unsigned int size, const struct irq_domain_ops *ops, void *host_data) { return __irq_domain_add(fwnode, size, size, 0, ops, host_data); } static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode, const struct irq_domain_ops *ops, void *host_data) { return __irq_domain_add(fwnode, 0, ~0, 0, ops, host_data); } extern void irq_domain_remove(struct irq_domain *host); extern int irq_domain_associate(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq); extern void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, irq_hw_number_t hwirq_base, int count); extern unsigned int irq_create_mapping_affinity(struct irq_domain *host, irq_hw_number_t hwirq, const struct irq_affinity_desc *affinity); extern unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec); extern void irq_dispose_mapping(unsigned int virq); static inline unsigned int irq_create_mapping(struct irq_domain *host, irq_hw_number_t hwirq) { return irq_create_mapping_affinity(host, hwirq, NULL); } extern struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain, irq_hw_number_t hwirq, unsigned int *irq); static inline struct irq_desc *irq_resolve_mapping(struct irq_domain *domain, irq_hw_number_t hwirq) { return __irq_resolve_mapping(domain, hwirq, NULL); } /** * irq_find_mapping() - Find a linux irq from a hw irq number. * @domain: domain owning this hardware interrupt * @hwirq: hardware irq number in that domain space */ static inline unsigned int irq_find_mapping(struct irq_domain *domain, irq_hw_number_t hwirq) { unsigned int irq; if (__irq_resolve_mapping(domain, hwirq, &irq)) return irq; return 0; } static inline unsigned int irq_linear_revmap(struct irq_domain *domain, irq_hw_number_t hwirq) { return irq_find_mapping(domain, hwirq); } extern const struct irq_domain_ops irq_domain_simple_ops; /* stock xlate functions */ int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, const u32 *intspec, unsigned int intsize, irq_hw_number_t *out_hwirq, unsigned int *out_type); int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, const u32 *intspec, unsigned int intsize, irq_hw_number_t *out_hwirq, unsigned int *out_type); int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr, const u32 *intspec, unsigned int intsize, irq_hw_number_t *out_hwirq, unsigned int *out_type); int irq_domain_translate_twocell(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *out_hwirq, unsigned int *out_type); int irq_domain_translate_onecell(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *out_hwirq, unsigned int *out_type); /* IPI functions */ int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest); int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest); /* V2 interfaces to support hierarchy IRQ domains. */ extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, unsigned int virq); extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq, struct irq_chip *chip, void *chip_data, irq_flow_handler_t handler, void *handler_data, const char *handler_name); extern void irq_domain_reset_irq_data(struct irq_data *irq_data); #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY extern struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, unsigned int flags, unsigned int size, struct fwnode_handle *fwnode, const struct irq_domain_ops *ops, void *host_data); static inline struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent, unsigned int flags, unsigned int size, struct device_node *node, const struct irq_domain_ops *ops, void *host_data) { return irq_domain_create_hierarchy(parent, flags, size, of_node_to_fwnode(node), ops, host_data); } extern int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, unsigned int nr_irqs, int node, void *arg, bool realloc, const struct irq_affinity_desc *affinity); extern void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs); extern int irq_domain_activate_irq(struct irq_data *irq_data, bool early); extern void irq_domain_deactivate_irq(struct irq_data *irq_data); static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, int node, void *arg) { return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false, NULL); } extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs, void *arg); extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq, struct irq_chip *chip, void *chip_data); extern void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs); extern void irq_domain_free_irqs_top(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs); extern int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg); extern int irq_domain_pop_irq(struct irq_domain *domain, int virq); extern int irq_domain_alloc_irqs_parent(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs, void *arg); extern void irq_domain_free_irqs_parent(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs); extern int irq_domain_disconnect_hierarchy(struct irq_domain *domain, unsigned int virq); static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) { return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY; } static inline bool irq_domain_is_ipi(struct irq_domain *domain) { return domain->flags & (IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE); } static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) { return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU; } static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) { return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE; } static inline bool irq_domain_is_msi(struct irq_domain *domain) { return domain->flags & IRQ_DOMAIN_FLAG_MSI; } static inline bool irq_domain_is_msi_remap(struct irq_domain *domain) { return domain->flags & IRQ_DOMAIN_FLAG_MSI_REMAP; } extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain); #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, int node, void *arg) { return -1; } static inline void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs) { } static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) { return false; } static inline bool irq_domain_is_ipi(struct irq_domain *domain) { return false; } static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) { return false; } static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) { return false; } static inline bool irq_domain_is_msi(struct irq_domain *domain) { return false; } static inline bool irq_domain_is_msi_remap(struct irq_domain *domain) { return false; } static inline bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain) { return false; } #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ #else /* CONFIG_IRQ_DOMAIN */ static inline void irq_dispose_mapping(unsigned int virq) { } static inline struct irq_domain *irq_find_matching_fwnode( struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token) { return NULL; } static inline bool irq_domain_check_msi_remap(void) { return false; } #endif /* !CONFIG_IRQ_DOMAIN */ #endif /* _LINUX_IRQDOMAIN_H */ PK ! ��n n dns_resolver.hnu �[��� /* * DNS Resolver upcall management for CIFS DFS and AFS * Handles host name to IP address resolution and DNS query for AFSDB RR. * * Copyright (c) International Business Machines Corp., 2008 * Author(s): Steve French (sfrench@us.ibm.com) * Wang Lei (wang840925@gmail.com) * * This library is free software; you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published * by the Free Software Foundation; either version 2.1 of the License, or * (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See * the GNU Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public License * along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef _LINUX_DNS_RESOLVER_H #define _LINUX_DNS_RESOLVER_H #include <uapi/linux/dns_resolver.h> struct net; extern int dns_query(struct net *net, const char *type, const char *name, size_t namelen, const char *options, char **_result, time64_t *_expiry, bool invalidate); #endif /* _LINUX_DNS_RESOLVER_H */ PK ! �:��� �� pci_ids.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * PCI Class, Vendor and Device IDs * * Please keep sorted. * * Do not add new entries to this file unless the definitions * are shared between multiple drivers. */ #ifndef _LINUX_PCI_IDS_H #define _LINUX_PCI_IDS_H /* Device classes and subclasses */ #define PCI_CLASS_NOT_DEFINED 0x0000 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001 #define PCI_BASE_CLASS_STORAGE 0x01 #define PCI_CLASS_STORAGE_SCSI 0x0100 #define PCI_CLASS_STORAGE_IDE 0x0101 #define PCI_CLASS_STORAGE_FLOPPY 0x0102 #define PCI_CLASS_STORAGE_IPI 0x0103 #define PCI_CLASS_STORAGE_RAID 0x0104 #define PCI_CLASS_STORAGE_SATA 0x0106 #define PCI_CLASS_STORAGE_SATA_AHCI 0x010601 #define PCI_CLASS_STORAGE_SAS 0x0107 #define PCI_CLASS_STORAGE_EXPRESS 0x010802 #define PCI_CLASS_STORAGE_OTHER 0x0180 #define PCI_BASE_CLASS_NETWORK 0x02 #define PCI_CLASS_NETWORK_ETHERNET 0x0200 #define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 #define PCI_CLASS_NETWORK_FDDI 0x0202 #define PCI_CLASS_NETWORK_ATM 0x0203 #define PCI_CLASS_NETWORK_OTHER 0x0280 #define PCI_BASE_CLASS_DISPLAY 0x03 #define PCI_CLASS_DISPLAY_VGA 0x0300 #define PCI_CLASS_DISPLAY_XGA 0x0301 #define PCI_CLASS_DISPLAY_3D 0x0302 #define PCI_CLASS_DISPLAY_OTHER 0x0380 #define PCI_BASE_CLASS_MULTIMEDIA 0x04 #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 #define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 #define PCI_BASE_CLASS_MEMORY 0x05 #define PCI_CLASS_MEMORY_RAM 0x0500 #define PCI_CLASS_MEMORY_FLASH 0x0501 #define PCI_CLASS_MEMORY_CXL 0x0502 #define PCI_CLASS_MEMORY_OTHER 0x0580 #define PCI_BASE_CLASS_BRIDGE 0x06 #define PCI_CLASS_BRIDGE_HOST 0x0600 #define PCI_CLASS_BRIDGE_ISA 0x0601 #define PCI_CLASS_BRIDGE_EISA 0x0602 #define PCI_CLASS_BRIDGE_MC 0x0603 #define PCI_CLASS_BRIDGE_PCI 0x0604 #define PCI_CLASS_BRIDGE_PCI_NORMAL 0x060400 #define PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE 0x060401 #define PCI_CLASS_BRIDGE_PCMCIA 0x0605 #define PCI_CLASS_BRIDGE_NUBUS 0x0606 #define PCI_CLASS_BRIDGE_CARDBUS 0x0607 #define PCI_CLASS_BRIDGE_RACEWAY 0x0608 #define PCI_CLASS_BRIDGE_OTHER 0x0680 #define PCI_BASE_CLASS_COMMUNICATION 0x07 #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 #define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 #define PCI_CLASS_COMMUNICATION_MODEM 0x0703 #define PCI_CLASS_COMMUNICATION_OTHER 0x0780 #define PCI_BASE_CLASS_SYSTEM 0x08 #define PCI_CLASS_SYSTEM_PIC 0x0800 #define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010 #define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020 #define PCI_CLASS_SYSTEM_DMA 0x0801 #define PCI_CLASS_SYSTEM_TIMER 0x0802 #define PCI_CLASS_SYSTEM_RTC 0x0803 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 #define PCI_CLASS_SYSTEM_SDHCI 0x0805 #define PCI_CLASS_SYSTEM_RCEC 0x0807 #define PCI_CLASS_SYSTEM_OTHER 0x0880 #define PCI_BASE_CLASS_INPUT 0x09 #define PCI_CLASS_INPUT_KEYBOARD 0x0900 #define PCI_CLASS_INPUT_PEN 0x0901 #define PCI_CLASS_INPUT_MOUSE 0x0902 #define PCI_CLASS_INPUT_SCANNER 0x0903 #define PCI_CLASS_INPUT_GAMEPORT 0x0904 #define PCI_CLASS_INPUT_OTHER 0x0980 #define PCI_BASE_CLASS_DOCKING 0x0a #define PCI_CLASS_DOCKING_GENERIC 0x0a00 #define PCI_CLASS_DOCKING_OTHER 0x0a80 #define PCI_BASE_CLASS_PROCESSOR 0x0b #define PCI_CLASS_PROCESSOR_386 0x0b00 #define PCI_CLASS_PROCESSOR_486 0x0b01 #define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 #define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 #define PCI_CLASS_PROCESSOR_MIPS 0x0b30 #define PCI_CLASS_PROCESSOR_CO 0x0b40 #define PCI_BASE_CLASS_SERIAL 0x0c #define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 #define PCI_CLASS_SERIAL_FIREWIRE_OHCI 0x0c0010 #define PCI_CLASS_SERIAL_ACCESS 0x0c01 #define PCI_CLASS_SERIAL_SSA 0x0c02 #define PCI_CLASS_SERIAL_USB 0x0c03 #define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 #define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 #define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 #define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330 #define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe #define PCI_CLASS_SERIAL_FIBER 0x0c04 #define PCI_CLASS_SERIAL_SMBUS 0x0c05 #define PCI_CLASS_SERIAL_IPMI 0x0c07 #define PCI_CLASS_SERIAL_IPMI_SMIC 0x0c0700 #define PCI_CLASS_SERIAL_IPMI_KCS 0x0c0701 #define PCI_CLASS_SERIAL_IPMI_BT 0x0c0702 #define PCI_BASE_CLASS_WIRELESS 0x0d #define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10 #define PCI_CLASS_WIRELESS_WHCI 0x0d1010 #define PCI_BASE_CLASS_INTELLIGENT 0x0e #define PCI_CLASS_INTELLIGENT_I2O 0x0e00 #define PCI_BASE_CLASS_SATELLITE 0x0f #define PCI_CLASS_SATELLITE_TV 0x0f00 #define PCI_CLASS_SATELLITE_AUDIO 0x0f01 #define PCI_CLASS_SATELLITE_VOICE 0x0f03 #define PCI_CLASS_SATELLITE_DATA 0x0f04 #define PCI_BASE_CLASS_CRYPT 0x10 #define PCI_CLASS_CRYPT_NETWORK 0x1000 #define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 #define PCI_CLASS_CRYPT_OTHER 0x1080 #define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 #define PCI_CLASS_SP_DPIO 0x1100 #define PCI_CLASS_SP_OTHER 0x1180 #define PCI_CLASS_OTHERS 0xff /* Vendors and devices. Sort key: vendor first, device next. */ #define PCI_VENDOR_ID_LOONGSON 0x0014 #define PCI_VENDOR_ID_TTTECH 0x0357 #define PCI_DEVICE_ID_TTTECH_MC322 0x000a #define PCI_VENDOR_ID_DYNALINK 0x0675 #define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 #define PCI_VENDOR_ID_UBIQUITI 0x0777 #define PCI_VENDOR_ID_BERKOM 0x0871 #define PCI_DEVICE_ID_BERKOM_A1T 0xffa1 #define PCI_DEVICE_ID_BERKOM_T_CONCEPT 0xffa2 #define PCI_DEVICE_ID_BERKOM_A4T 0xffa4 #define PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO 0xffa8 #define PCI_VENDOR_ID_COMPAQ 0x0e11 #define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 #define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc #define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 #define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 #define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE 0xae33 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35 #define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 #define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 #define PCI_DEVICE_ID_COMPAQ_CISS 0xb060 #define PCI_DEVICE_ID_COMPAQ_CISSB 0xb178 #define PCI_DEVICE_ID_COMPAQ_CISSC 0x46 #define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 #define PCI_VENDOR_ID_NCR 0x1000 #define PCI_VENDOR_ID_LSI_LOGIC 0x1000 #define PCI_DEVICE_ID_NCR_53C810 0x0001 #define PCI_DEVICE_ID_NCR_53C820 0x0002 #define PCI_DEVICE_ID_NCR_53C825 0x0003 #define PCI_DEVICE_ID_NCR_53C815 0x0004 #define PCI_DEVICE_ID_LSI_53C810AP 0x0005 #define PCI_DEVICE_ID_NCR_53C860 0x0006 #define PCI_DEVICE_ID_LSI_53C1510 0x000a #define PCI_DEVICE_ID_NCR_53C896 0x000b #define PCI_DEVICE_ID_NCR_53C895 0x000c #define PCI_DEVICE_ID_NCR_53C885 0x000d #define PCI_DEVICE_ID_NCR_53C875 0x000f #define PCI_DEVICE_ID_NCR_53C1510 0x0010 #define PCI_DEVICE_ID_LSI_53C895A 0x0012 #define PCI_DEVICE_ID_LSI_53C875A 0x0013 #define PCI_DEVICE_ID_LSI_53C1010_33 0x0020 #define PCI_DEVICE_ID_LSI_53C1010_66 0x0021 #define PCI_DEVICE_ID_LSI_53C1030 0x0030 #define PCI_DEVICE_ID_LSI_1030_53C1035 0x0032 #define PCI_DEVICE_ID_LSI_53C1035 0x0040 #define PCI_DEVICE_ID_NCR_53C875J 0x008f #define PCI_DEVICE_ID_LSI_FC909 0x0621 #define PCI_DEVICE_ID_LSI_FC929 0x0622 #define PCI_DEVICE_ID_LSI_FC929_LAN 0x0623 #define PCI_DEVICE_ID_LSI_FC919 0x0624 #define PCI_DEVICE_ID_LSI_FC919_LAN 0x0625 #define PCI_DEVICE_ID_LSI_FC929X 0x0626 #define PCI_DEVICE_ID_LSI_FC939X 0x0642 #define PCI_DEVICE_ID_LSI_FC949X 0x0640 #define PCI_DEVICE_ID_LSI_FC949ES 0x0646 #define PCI_DEVICE_ID_LSI_FC919X 0x0628 #define PCI_DEVICE_ID_NCR_YELLOWFIN 0x0701 #define PCI_DEVICE_ID_LSI_61C102 0x0901 #define PCI_DEVICE_ID_LSI_63C815 0x1000 #define PCI_DEVICE_ID_LSI_SAS1064 0x0050 #define PCI_DEVICE_ID_LSI_SAS1064R 0x0411 #define PCI_DEVICE_ID_LSI_SAS1066 0x005E #define PCI_DEVICE_ID_LSI_SAS1068 0x0054 #define PCI_DEVICE_ID_LSI_SAS1064A 0x005C #define PCI_DEVICE_ID_LSI_SAS1064E 0x0056 #define PCI_DEVICE_ID_LSI_SAS1066E 0x005A #define PCI_DEVICE_ID_LSI_SAS1068E 0x0058 #define PCI_DEVICE_ID_LSI_SAS1078 0x0060 #define PCI_VENDOR_ID_ATI 0x1002 /* Mach64 */ #define PCI_DEVICE_ID_ATI_68800 0x4158 #define PCI_DEVICE_ID_ATI_215CT222 0x4354 #define PCI_DEVICE_ID_ATI_210888CX 0x4358 #define PCI_DEVICE_ID_ATI_215ET222 0x4554 /* Mach64 / Rage */ #define PCI_DEVICE_ID_ATI_215GB 0x4742 #define PCI_DEVICE_ID_ATI_215GD 0x4744 #define PCI_DEVICE_ID_ATI_215GI 0x4749 #define PCI_DEVICE_ID_ATI_215GP 0x4750 #define PCI_DEVICE_ID_ATI_215GQ 0x4751 #define PCI_DEVICE_ID_ATI_215XL 0x4752 #define PCI_DEVICE_ID_ATI_215GT 0x4754 #define PCI_DEVICE_ID_ATI_215GTB 0x4755 #define PCI_DEVICE_ID_ATI_215_IV 0x4756 #define PCI_DEVICE_ID_ATI_215_IW 0x4757 #define PCI_DEVICE_ID_ATI_215_IZ 0x475A #define PCI_DEVICE_ID_ATI_210888GX 0x4758 #define PCI_DEVICE_ID_ATI_215_LB 0x4c42 #define PCI_DEVICE_ID_ATI_215_LD 0x4c44 #define PCI_DEVICE_ID_ATI_215_LG 0x4c47 #define PCI_DEVICE_ID_ATI_215_LI 0x4c49 #define PCI_DEVICE_ID_ATI_215_LM 0x4c4D #define PCI_DEVICE_ID_ATI_215_LN 0x4c4E #define PCI_DEVICE_ID_ATI_215_LR 0x4c52 #define PCI_DEVICE_ID_ATI_215_LS 0x4c53 #define PCI_DEVICE_ID_ATI_264_LT 0x4c54 /* Mach64 VT */ #define PCI_DEVICE_ID_ATI_264VT 0x5654 #define PCI_DEVICE_ID_ATI_264VU 0x5655 #define PCI_DEVICE_ID_ATI_264VV 0x5656 /* Rage128 GL */ #define PCI_DEVICE_ID_ATI_RAGE128_RE 0x5245 #define PCI_DEVICE_ID_ATI_RAGE128_RF 0x5246 #define PCI_DEVICE_ID_ATI_RAGE128_RG 0x5247 /* Rage128 VR */ #define PCI_DEVICE_ID_ATI_RAGE128_RK 0x524b #define PCI_DEVICE_ID_ATI_RAGE128_RL 0x524c #define PCI_DEVICE_ID_ATI_RAGE128_SE 0x5345 #define PCI_DEVICE_ID_ATI_RAGE128_SF 0x5346 #define PCI_DEVICE_ID_ATI_RAGE128_SG 0x5347 #define PCI_DEVICE_ID_ATI_RAGE128_SH 0x5348 #define PCI_DEVICE_ID_ATI_RAGE128_SK 0x534b #define PCI_DEVICE_ID_ATI_RAGE128_SL 0x534c #define PCI_DEVICE_ID_ATI_RAGE128_SM 0x534d #define PCI_DEVICE_ID_ATI_RAGE128_SN 0x534e /* Rage128 Ultra */ #define PCI_DEVICE_ID_ATI_RAGE128_TF 0x5446 #define PCI_DEVICE_ID_ATI_RAGE128_TL 0x544c #define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452 #define PCI_DEVICE_ID_ATI_RAGE128_TS 0x5453 #define PCI_DEVICE_ID_ATI_RAGE128_TT 0x5454 #define PCI_DEVICE_ID_ATI_RAGE128_TU 0x5455 /* Rage128 M3 */ #define PCI_DEVICE_ID_ATI_RAGE128_LE 0x4c45 #define PCI_DEVICE_ID_ATI_RAGE128_LF 0x4c46 /* Rage128 M4 */ #define PCI_DEVICE_ID_ATI_RAGE128_MF 0x4d46 #define PCI_DEVICE_ID_ATI_RAGE128_ML 0x4d4c /* Rage128 Pro GL */ #define PCI_DEVICE_ID_ATI_RAGE128_PA 0x5041 #define PCI_DEVICE_ID_ATI_RAGE128_PB 0x5042 #define PCI_DEVICE_ID_ATI_RAGE128_PC 0x5043 #define PCI_DEVICE_ID_ATI_RAGE128_PD 0x5044 #define PCI_DEVICE_ID_ATI_RAGE128_PE 0x5045 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046 /* Rage128 Pro VR */ #define PCI_DEVICE_ID_ATI_RAGE128_PG 0x5047 #define PCI_DEVICE_ID_ATI_RAGE128_PH 0x5048 #define PCI_DEVICE_ID_ATI_RAGE128_PI 0x5049 #define PCI_DEVICE_ID_ATI_RAGE128_PJ 0x504A #define PCI_DEVICE_ID_ATI_RAGE128_PK 0x504B #define PCI_DEVICE_ID_ATI_RAGE128_PL 0x504C #define PCI_DEVICE_ID_ATI_RAGE128_PM 0x504D #define PCI_DEVICE_ID_ATI_RAGE128_PN 0x504E #define PCI_DEVICE_ID_ATI_RAGE128_PO 0x504F #define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 #define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 #define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 #define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 #define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 #define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 #define PCI_DEVICE_ID_ATI_RAGE128_PV 0x5056 #define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 #define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 /* Rage128 M4 */ /* Radeon R100 */ #define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 #define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 #define PCI_DEVICE_ID_ATI_RADEON_QF 0x5146 #define PCI_DEVICE_ID_ATI_RADEON_QG 0x5147 /* Radeon RV100 (VE) */ #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 #define PCI_DEVICE_ID_ATI_RADEON_QZ 0x515a /* Radeon R200 (8500) */ #define PCI_DEVICE_ID_ATI_RADEON_QL 0x514c #define PCI_DEVICE_ID_ATI_RADEON_QN 0x514e #define PCI_DEVICE_ID_ATI_RADEON_QO 0x514f #define PCI_DEVICE_ID_ATI_RADEON_Ql 0x516c #define PCI_DEVICE_ID_ATI_RADEON_BB 0x4242 /* Radeon R200 (9100) */ #define PCI_DEVICE_ID_ATI_RADEON_QM 0x514d /* Radeon RV200 (7500) */ #define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 #define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 /* Radeon NV-100 */ /* Radeon RV250 (9000) */ #define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 #define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 #define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 #define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 /* Radeon RV280 (9200) */ #define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 #define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 /* Radeon R300 (9500) */ /* Radeon R300 (9700) */ #define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 #define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45 #define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46 #define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47 /* Radeon R350 (9800) */ /* Radeon RV350 (9600) */ /* Radeon M6 */ #define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59 #define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a /* Radeon M7 */ #define PCI_DEVICE_ID_ATI_RADEON_LW 0x4c57 #define PCI_DEVICE_ID_ATI_RADEON_LX 0x4c58 /* Radeon M9 */ #define PCI_DEVICE_ID_ATI_RADEON_Ld 0x4c64 #define PCI_DEVICE_ID_ATI_RADEON_Le 0x4c65 #define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66 #define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67 /* Radeon */ /* RadeonIGP */ #define PCI_DEVICE_ID_ATI_RS100 0xcab0 #define PCI_DEVICE_ID_ATI_RS200 0xcab2 #define PCI_DEVICE_ID_ATI_RS200_B 0xcbb2 #define PCI_DEVICE_ID_ATI_RS250 0xcab3 #define PCI_DEVICE_ID_ATI_RS300_100 0x5830 #define PCI_DEVICE_ID_ATI_RS300_133 0x5831 #define PCI_DEVICE_ID_ATI_RS300_166 0x5832 #define PCI_DEVICE_ID_ATI_RS300_200 0x5833 #define PCI_DEVICE_ID_ATI_RS350_100 0x7830 #define PCI_DEVICE_ID_ATI_RS350_133 0x7831 #define PCI_DEVICE_ID_ATI_RS350_166 0x7832 #define PCI_DEVICE_ID_ATI_RS350_200 0x7833 #define PCI_DEVICE_ID_ATI_RS400_100 0x5a30 #define PCI_DEVICE_ID_ATI_RS400_133 0x5a31 #define PCI_DEVICE_ID_ATI_RS400_166 0x5a32 #define PCI_DEVICE_ID_ATI_RS400_200 0x5a33 #define PCI_DEVICE_ID_ATI_RS480 0x5950 /* ATI IXP Chipset */ #define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349 #define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353 #define PCI_DEVICE_ID_ATI_IXP300_SMBUS 0x4363 #define PCI_DEVICE_ID_ATI_IXP300_IDE 0x4369 #define PCI_DEVICE_ID_ATI_IXP300_SATA 0x436e #define PCI_DEVICE_ID_ATI_IXP400_SMBUS 0x4372 #define PCI_DEVICE_ID_ATI_IXP400_IDE 0x4376 #define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379 #define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a #define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 #define PCI_DEVICE_ID_ATI_SBX00_SMBUS 0x4385 #define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c #define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390 #define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c #define PCI_VENDOR_ID_VLSI 0x1004 #define PCI_DEVICE_ID_VLSI_82C592 0x0005 #define PCI_DEVICE_ID_VLSI_82C593 0x0006 #define PCI_DEVICE_ID_VLSI_82C594 0x0007 #define PCI_DEVICE_ID_VLSI_82C597 0x0009 #define PCI_DEVICE_ID_VLSI_82C541 0x000c #define PCI_DEVICE_ID_VLSI_82C543 0x000d #define PCI_DEVICE_ID_VLSI_82C532 0x0101 #define PCI_DEVICE_ID_VLSI_82C534 0x0102 #define PCI_DEVICE_ID_VLSI_82C535 0x0104 #define PCI_DEVICE_ID_VLSI_82C147 0x0105 #define PCI_DEVICE_ID_VLSI_VAS96011 0x0702 /* AMD RD890 Chipset */ #define PCI_DEVICE_ID_RD890_IOMMU 0x5a23 #define PCI_VENDOR_ID_ADL 0x1005 #define PCI_DEVICE_ID_ADL_2301 0x2301 #define PCI_VENDOR_ID_NS 0x100b #define PCI_DEVICE_ID_NS_87415 0x0002 #define PCI_DEVICE_ID_NS_87560_LIO 0x000e #define PCI_DEVICE_ID_NS_87560_USB 0x0012 #define PCI_DEVICE_ID_NS_83815 0x0020 #define PCI_DEVICE_ID_NS_83820 0x0022 #define PCI_DEVICE_ID_NS_CS5535_ISA 0x002b #define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d #define PCI_DEVICE_ID_NS_CS5535_AUDIO 0x002e #define PCI_DEVICE_ID_NS_CS5535_USB 0x002f #define PCI_DEVICE_ID_NS_GX_VIDEO 0x0030 #define PCI_DEVICE_ID_NS_SATURN 0x0035 #define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 #define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 #define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 #define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503 #define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504 #define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505 #define PCI_DEVICE_ID_NS_SC1100_BRIDGE 0x0510 #define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511 #define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515 #define PCI_DEVICE_ID_NS_87410 0xd001 #define PCI_DEVICE_ID_NS_GX_HOST_BRIDGE 0x0028 #define PCI_VENDOR_ID_TSENG 0x100c #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 #define PCI_DEVICE_ID_TSENG_W32P_c 0x3206 #define PCI_DEVICE_ID_TSENG_W32P_d 0x3207 #define PCI_DEVICE_ID_TSENG_ET6000 0x3208 #define PCI_VENDOR_ID_WEITEK 0x100e #define PCI_DEVICE_ID_WEITEK_P9000 0x9001 #define PCI_DEVICE_ID_WEITEK_P9100 0x9100 #define PCI_VENDOR_ID_DEC 0x1011 #define PCI_DEVICE_ID_DEC_BRD 0x0001 #define PCI_DEVICE_ID_DEC_TULIP 0x0002 #define PCI_DEVICE_ID_DEC_TGA 0x0004 #define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009 #define PCI_DEVICE_ID_DEC_TGA2 0x000D #define PCI_DEVICE_ID_DEC_FDDI 0x000F #define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014 #define PCI_DEVICE_ID_DEC_21142 0x0019 #define PCI_DEVICE_ID_DEC_21052 0x0021 #define PCI_DEVICE_ID_DEC_21150 0x0022 #define PCI_DEVICE_ID_DEC_21152 0x0024 #define PCI_DEVICE_ID_DEC_21153 0x0025 #define PCI_DEVICE_ID_DEC_21154 0x0026 #define PCI_DEVICE_ID_DEC_21285 0x1065 #define PCI_DEVICE_ID_COMPAQ_42XX 0x0046 #define PCI_VENDOR_ID_CIRRUS 0x1013 #define PCI_DEVICE_ID_CIRRUS_7548 0x0038 #define PCI_DEVICE_ID_CIRRUS_5430 0x00a0 #define PCI_DEVICE_ID_CIRRUS_5434_4 0x00a4 #define PCI_DEVICE_ID_CIRRUS_5434_8 0x00a8 #define PCI_DEVICE_ID_CIRRUS_5436 0x00ac #define PCI_DEVICE_ID_CIRRUS_5446 0x00b8 #define PCI_DEVICE_ID_CIRRUS_5480 0x00bc #define PCI_DEVICE_ID_CIRRUS_5462 0x00d0 #define PCI_DEVICE_ID_CIRRUS_5464 0x00d4 #define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 #define PCI_DEVICE_ID_CIRRUS_6729 0x1100 #define PCI_DEVICE_ID_CIRRUS_6832 0x1110 #define PCI_DEVICE_ID_CIRRUS_7543 0x1202 #define PCI_DEVICE_ID_CIRRUS_4610 0x6001 #define PCI_DEVICE_ID_CIRRUS_4612 0x6003 #define PCI_DEVICE_ID_CIRRUS_4615 0x6004 #define PCI_VENDOR_ID_IBM 0x1014 #define PCI_DEVICE_ID_IBM_TR 0x0018 #define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e #define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc #define PCI_DEVICE_ID_IBM_SNIPE 0x0180 #define PCI_DEVICE_ID_IBM_CITRINE 0x028C #define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 #define PCI_DEVICE_ID_IBM_OBSIDIAN 0x02BD #define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 #define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 #define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A #define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251 #define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE 0x0361 #define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 #define PCI_SUBVENDOR_ID_IBM 0x1014 #define PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT 0x03d4 #define PCI_VENDOR_ID_UNISYS 0x1018 #define PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR 0x001C #define PCI_VENDOR_ID_COMPEX2 0x101a /* pci.ids says "AT&T GIS (NCR)" */ #define PCI_DEVICE_ID_COMPEX2_100VG 0x0005 #define PCI_VENDOR_ID_WD 0x101c #define PCI_DEVICE_ID_WD_90C 0xc24a #define PCI_VENDOR_ID_AMI 0x101e #define PCI_DEVICE_ID_AMI_MEGARAID3 0x1960 #define PCI_DEVICE_ID_AMI_MEGARAID 0x9010 #define PCI_DEVICE_ID_AMI_MEGARAID2 0x9060 #define PCI_VENDOR_ID_AMD 0x1022 #define PCI_DEVICE_ID_AMD_K8_NB 0x1100 #define PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP 0x1101 #define PCI_DEVICE_ID_AMD_K8_NB_MEMCTL 0x1102 #define PCI_DEVICE_ID_AMD_K8_NB_MISC 0x1103 #define PCI_DEVICE_ID_AMD_10H_NB_HT 0x1200 #define PCI_DEVICE_ID_AMD_10H_NB_MAP 0x1201 #define PCI_DEVICE_ID_AMD_10H_NB_DRAM 0x1202 #define PCI_DEVICE_ID_AMD_10H_NB_MISC 0x1203 #define PCI_DEVICE_ID_AMD_10H_NB_LINK 0x1204 #define PCI_DEVICE_ID_AMD_11H_NB_HT 0x1300 #define PCI_DEVICE_ID_AMD_11H_NB_MAP 0x1301 #define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302 #define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303 #define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304 #define PCI_DEVICE_ID_AMD_15H_M10H_F3 0x1403 #define PCI_DEVICE_ID_AMD_15H_M30H_NB_F3 0x141d #define PCI_DEVICE_ID_AMD_15H_M30H_NB_F4 0x141e #define PCI_DEVICE_ID_AMD_15H_M60H_NB_F3 0x1573 #define PCI_DEVICE_ID_AMD_15H_M60H_NB_F4 0x1574 #define PCI_DEVICE_ID_AMD_15H_NB_F0 0x1600 #define PCI_DEVICE_ID_AMD_15H_NB_F1 0x1601 #define PCI_DEVICE_ID_AMD_15H_NB_F2 0x1602 #define PCI_DEVICE_ID_AMD_15H_NB_F3 0x1603 #define PCI_DEVICE_ID_AMD_15H_NB_F4 0x1604 #define PCI_DEVICE_ID_AMD_15H_NB_F5 0x1605 #define PCI_DEVICE_ID_AMD_16H_NB_F3 0x1533 #define PCI_DEVICE_ID_AMD_16H_NB_F4 0x1534 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584 #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493 #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443 #define PCI_DEVICE_ID_AMD_VANGOGH_USB 0x163a #define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653 #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0 #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 #define PCI_DEVICE_ID_AMD_LANCE 0x2000 #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 #define PCI_DEVICE_ID_AMD_SCSI 0x2020 #define PCI_DEVICE_ID_AMD_SERENADE 0x36c0 #define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 #define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 #define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C #define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E #define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401 #define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409 #define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B #define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410 #define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411 #define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413 #define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440 #define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441 #define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443 #define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443 #define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445 #define PCI_DEVICE_ID_AMD_GOLAM_7450 0x7450 #define PCI_DEVICE_ID_AMD_8111_PCI 0x7460 #define PCI_DEVICE_ID_AMD_8111_LPC 0x7468 #define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 #define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a #define PCI_DEVICE_ID_AMD_8111_SMBUS 0x746b #define PCI_DEVICE_ID_AMD_8111_AUDIO 0x746d #define PCI_DEVICE_ID_AMD_8151_0 0x7454 #define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450 #define PCI_DEVICE_ID_AMD_8131_APIC 0x7451 #define PCI_DEVICE_ID_AMD_8132_BRIDGE 0x7458 #define PCI_DEVICE_ID_AMD_NL_USB 0x7912 #define PCI_DEVICE_ID_AMD_CS5535_IDE 0x208F #define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090 #define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091 #define PCI_DEVICE_ID_AMD_CS5536_AUDIO 0x2093 #define PCI_DEVICE_ID_AMD_CS5536_OHC 0x2094 #define PCI_DEVICE_ID_AMD_CS5536_EHC 0x2095 #define PCI_DEVICE_ID_AMD_CS5536_UDC 0x2096 #define PCI_DEVICE_ID_AMD_CS5536_UOC 0x2097 #define PCI_DEVICE_ID_AMD_CS5536_DEV_IDE 0x2092 #define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A #define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081 #define PCI_DEVICE_ID_AMD_LX_AES 0x2082 #define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE 0x7800 #define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b #define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c #define PCI_DEVICE_ID_AMD_KERNCZ_SMBUS 0x790b #define PCI_VENDOR_ID_TRIDENT 0x1023 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001 #define PCI_DEVICE_ID_TRIDENT_9320 0x9320 #define PCI_DEVICE_ID_TRIDENT_9388 0x9388 #define PCI_DEVICE_ID_TRIDENT_9397 0x9397 #define PCI_DEVICE_ID_TRIDENT_939A 0x939A #define PCI_DEVICE_ID_TRIDENT_9520 0x9520 #define PCI_DEVICE_ID_TRIDENT_9525 0x9525 #define PCI_DEVICE_ID_TRIDENT_9420 0x9420 #define PCI_DEVICE_ID_TRIDENT_9440 0x9440 #define PCI_DEVICE_ID_TRIDENT_9660 0x9660 #define PCI_DEVICE_ID_TRIDENT_9750 0x9750 #define PCI_DEVICE_ID_TRIDENT_9850 0x9850 #define PCI_DEVICE_ID_TRIDENT_9880 0x9880 #define PCI_DEVICE_ID_TRIDENT_8400 0x8400 #define PCI_DEVICE_ID_TRIDENT_8420 0x8420 #define PCI_DEVICE_ID_TRIDENT_8500 0x8500 #define PCI_VENDOR_ID_AI 0x1025 #define PCI_DEVICE_ID_AI_M1435 0x1435 #define PCI_VENDOR_ID_DELL 0x1028 #define PCI_DEVICE_ID_DELL_RACIII 0x0008 #define PCI_DEVICE_ID_DELL_RAC4 0x0012 #define PCI_DEVICE_ID_DELL_PERC5 0x0015 #define PCI_SUBVENDOR_ID_DELL 0x1028 #define PCI_VENDOR_ID_MATROX 0x102B #define PCI_DEVICE_ID_MATROX_MGA_2 0x0518 #define PCI_DEVICE_ID_MATROX_MIL 0x0519 #define PCI_DEVICE_ID_MATROX_MYS 0x051A #define PCI_DEVICE_ID_MATROX_MIL_2 0x051b #define PCI_DEVICE_ID_MATROX_MYS_AGP 0x051e #define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f #define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10 #define PCI_DEVICE_ID_MATROX_G100_MM 0x1000 #define PCI_DEVICE_ID_MATROX_G100_AGP 0x1001 #define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 #define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 #define PCI_DEVICE_ID_MATROX_G400 0x0525 #define PCI_DEVICE_ID_MATROX_G200EV_PCI 0x0530 #define PCI_DEVICE_ID_MATROX_G550 0x2527 #define PCI_DEVICE_ID_MATROX_VIA 0x4536 #define PCI_VENDOR_ID_MOBILITY_ELECTRONICS 0x14f2 #define PCI_VENDOR_ID_CT 0x102c #define PCI_DEVICE_ID_CT_69000 0x00c0 #define PCI_DEVICE_ID_CT_65545 0x00d8 #define PCI_DEVICE_ID_CT_65548 0x00dc #define PCI_DEVICE_ID_CT_65550 0x00e0 #define PCI_DEVICE_ID_CT_65554 0x00e4 #define PCI_DEVICE_ID_CT_65555 0x00e5 #define PCI_VENDOR_ID_MIRO 0x1031 #define PCI_DEVICE_ID_MIRO_36050 0x5601 #define PCI_DEVICE_ID_MIRO_DC10PLUS 0x7efe #define PCI_DEVICE_ID_MIRO_DC30PLUS 0xd801 #define PCI_VENDOR_ID_NEC 0x1033 #define PCI_DEVICE_ID_NEC_CBUS_1 0x0001 /* PCI-Cbus Bridge */ #define PCI_DEVICE_ID_NEC_LOCAL 0x0002 /* Local Bridge */ #define PCI_DEVICE_ID_NEC_ATM 0x0003 /* ATM LAN Controller */ #define PCI_DEVICE_ID_NEC_R4000 0x0004 /* R4000 Bridge */ #define PCI_DEVICE_ID_NEC_486 0x0005 /* 486 Like Peripheral Bus Bridge */ #define PCI_DEVICE_ID_NEC_ACCEL_1 0x0006 /* Graphic Accelerator */ #define PCI_DEVICE_ID_NEC_UXBUS 0x0007 /* UX-Bus Bridge */ #define PCI_DEVICE_ID_NEC_ACCEL_2 0x0008 /* Graphic Accelerator */ #define PCI_DEVICE_ID_NEC_GRAPH 0x0009 /* PCI-CoreGraph Bridge */ #define PCI_DEVICE_ID_NEC_VL 0x0016 /* PCI-VL Bridge */ #define PCI_DEVICE_ID_NEC_STARALPHA2 0x002c /* STAR ALPHA2 */ #define PCI_DEVICE_ID_NEC_CBUS_2 0x002d /* PCI-Cbus Bridge */ #define PCI_DEVICE_ID_NEC_USB 0x0035 /* PCI-USB Host */ #define PCI_DEVICE_ID_NEC_CBUS_3 0x003b #define PCI_DEVICE_ID_NEC_NAPCCARD 0x003e #define PCI_DEVICE_ID_NEC_PCX2 0x0046 /* PowerVR */ #define PCI_DEVICE_ID_NEC_VRC5476 0x009b #define PCI_DEVICE_ID_NEC_VRC4173 0x00a5 #define PCI_DEVICE_ID_NEC_VRC5477_AC97 0x00a6 #define PCI_DEVICE_ID_NEC_PC9821CS01 0x800c /* PC-9821-CS01 */ #define PCI_DEVICE_ID_NEC_PC9821NRB06 0x800d /* PC-9821NR-B06 */ #define PCI_VENDOR_ID_FD 0x1036 #define PCI_DEVICE_ID_FD_36C70 0x0000 #define PCI_VENDOR_ID_SI 0x1039 #define PCI_DEVICE_ID_SI_5591_AGP 0x0001 #define PCI_DEVICE_ID_SI_6202 0x0002 #define PCI_DEVICE_ID_SI_503 0x0008 #define PCI_DEVICE_ID_SI_ACPI 0x0009 #define PCI_DEVICE_ID_SI_SMBUS 0x0016 #define PCI_DEVICE_ID_SI_LPC 0x0018 #define PCI_DEVICE_ID_SI_5597_VGA 0x0200 #define PCI_DEVICE_ID_SI_6205 0x0205 #define PCI_DEVICE_ID_SI_501 0x0406 #define PCI_DEVICE_ID_SI_496 0x0496 #define PCI_DEVICE_ID_SI_300 0x0300 #define PCI_DEVICE_ID_SI_315H 0x0310 #define PCI_DEVICE_ID_SI_315 0x0315 #define PCI_DEVICE_ID_SI_315PRO 0x0325 #define PCI_DEVICE_ID_SI_530 0x0530 #define PCI_DEVICE_ID_SI_540 0x0540 #define PCI_DEVICE_ID_SI_550 0x0550 #define PCI_DEVICE_ID_SI_540_VGA 0x5300 #define PCI_DEVICE_ID_SI_550_VGA 0x5315 #define PCI_DEVICE_ID_SI_620 0x0620 #define PCI_DEVICE_ID_SI_630 0x0630 #define PCI_DEVICE_ID_SI_633 0x0633 #define PCI_DEVICE_ID_SI_635 0x0635 #define PCI_DEVICE_ID_SI_640 0x0640 #define PCI_DEVICE_ID_SI_645 0x0645 #define PCI_DEVICE_ID_SI_646 0x0646 #define PCI_DEVICE_ID_SI_648 0x0648 #define PCI_DEVICE_ID_SI_650 0x0650 #define PCI_DEVICE_ID_SI_651 0x0651 #define PCI_DEVICE_ID_SI_655 0x0655 #define PCI_DEVICE_ID_SI_661 0x0661 #define PCI_DEVICE_ID_SI_730 0x0730 #define PCI_DEVICE_ID_SI_733 0x0733 #define PCI_DEVICE_ID_SI_630_VGA 0x6300 #define PCI_DEVICE_ID_SI_735 0x0735 #define PCI_DEVICE_ID_SI_740 0x0740 #define PCI_DEVICE_ID_SI_741 0x0741 #define PCI_DEVICE_ID_SI_745 0x0745 #define PCI_DEVICE_ID_SI_746 0x0746 #define PCI_DEVICE_ID_SI_755 0x0755 #define PCI_DEVICE_ID_SI_760 0x0760 #define PCI_DEVICE_ID_SI_900 0x0900 #define PCI_DEVICE_ID_SI_961 0x0961 #define PCI_DEVICE_ID_SI_962 0x0962 #define PCI_DEVICE_ID_SI_963 0x0963 #define PCI_DEVICE_ID_SI_965 0x0965 #define PCI_DEVICE_ID_SI_966 0x0966 #define PCI_DEVICE_ID_SI_968 0x0968 #define PCI_DEVICE_ID_SI_1180 0x1180 #define PCI_DEVICE_ID_SI_5511 0x5511 #define PCI_DEVICE_ID_SI_5513 0x5513 #define PCI_DEVICE_ID_SI_5517 0x5517 #define PCI_DEVICE_ID_SI_5518 0x5518 #define PCI_DEVICE_ID_SI_5571 0x5571 #define PCI_DEVICE_ID_SI_5581 0x5581 #define PCI_DEVICE_ID_SI_5582 0x5582 #define PCI_DEVICE_ID_SI_5591 0x5591 #define PCI_DEVICE_ID_SI_5596 0x5596 #define PCI_DEVICE_ID_SI_5597 0x5597 #define PCI_DEVICE_ID_SI_5598 0x5598 #define PCI_DEVICE_ID_SI_5600 0x5600 #define PCI_DEVICE_ID_SI_7012 0x7012 #define PCI_DEVICE_ID_SI_7013 0x7013 #define PCI_DEVICE_ID_SI_7016 0x7016 #define PCI_DEVICE_ID_SI_7018 0x7018 #define PCI_VENDOR_ID_HP 0x103c #define PCI_VENDOR_ID_HP_3PAR 0x1590 #define PCI_DEVICE_ID_HP_VISUALIZE_EG 0x1005 #define PCI_DEVICE_ID_HP_VISUALIZE_FX6 0x1006 #define PCI_DEVICE_ID_HP_VISUALIZE_FX4 0x1008 #define PCI_DEVICE_ID_HP_VISUALIZE_FX2 0x100a #define PCI_DEVICE_ID_HP_TACHYON 0x1028 #define PCI_DEVICE_ID_HP_TACHLITE 0x1029 #define PCI_DEVICE_ID_HP_J2585A 0x1030 #define PCI_DEVICE_ID_HP_J2585B 0x1031 #define PCI_DEVICE_ID_HP_J2973A 0x1040 #define PCI_DEVICE_ID_HP_J2970A 0x1042 #define PCI_DEVICE_ID_HP_DIVA 0x1048 #define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 #define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A #define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B #define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 #define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b #define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 #define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 #define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227 #define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a #define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e #define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c #define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282 #define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 #define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 #define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a #define PCI_DEVICE_ID_HP_CISSA 0x3220 #define PCI_DEVICE_ID_HP_CISSC 0x3230 #define PCI_DEVICE_ID_HP_CISSD 0x3238 #define PCI_DEVICE_ID_HP_CISSE 0x323a #define PCI_DEVICE_ID_HP_CISSF 0x323b #define PCI_DEVICE_ID_HP_CISSH 0x323c #define PCI_DEVICE_ID_HP_CISSI 0x3239 #define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 #define PCI_VENDOR_ID_PCTECH 0x1042 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 #define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 #define PCI_VENDOR_ID_ASUSTEK 0x1043 #define PCI_DEVICE_ID_ASUSTEK_0675 0x0675 #define PCI_VENDOR_ID_DPT 0x1044 #define PCI_DEVICE_ID_DPT 0xa400 #define PCI_VENDOR_ID_OPTI 0x1045 #define PCI_DEVICE_ID_OPTI_82C558 0xc558 #define PCI_DEVICE_ID_OPTI_82C621 0xc621 #define PCI_DEVICE_ID_OPTI_82C700 0xc700 #define PCI_DEVICE_ID_OPTI_82C825 0xd568 #define PCI_VENDOR_ID_ELSA 0x1048 #define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 #define PCI_DEVICE_ID_ELSA_QS3000 0x3000 #define PCI_VENDOR_ID_STMICRO 0x104A #define PCI_DEVICE_ID_STMICRO_USB_HOST 0xCC00 #define PCI_DEVICE_ID_STMICRO_USB_OHCI 0xCC01 #define PCI_DEVICE_ID_STMICRO_USB_OTG 0xCC02 #define PCI_DEVICE_ID_STMICRO_UART_HWFC 0xCC03 #define PCI_DEVICE_ID_STMICRO_UART_NO_HWFC 0xCC04 #define PCI_DEVICE_ID_STMICRO_SOC_DMA 0xCC05 #define PCI_DEVICE_ID_STMICRO_SATA 0xCC06 #define PCI_DEVICE_ID_STMICRO_I2C 0xCC07 #define PCI_DEVICE_ID_STMICRO_SPI_HS 0xCC08 #define PCI_DEVICE_ID_STMICRO_MAC 0xCC09 #define PCI_DEVICE_ID_STMICRO_SDIO_EMMC 0xCC0A #define PCI_DEVICE_ID_STMICRO_SDIO 0xCC0B #define PCI_DEVICE_ID_STMICRO_GPIO 0xCC0C #define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D #define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_DMA 0xCC0E #define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_SRCS 0xCC0F #define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_MSPS 0xCC10 #define PCI_DEVICE_ID_STMICRO_CAN 0xCC11 #define PCI_DEVICE_ID_STMICRO_MLB 0xCC12 #define PCI_DEVICE_ID_STMICRO_DBP 0xCC13 #define PCI_DEVICE_ID_STMICRO_SATA_PHY 0xCC14 #define PCI_DEVICE_ID_STMICRO_ESRAM 0xCC15 #define PCI_DEVICE_ID_STMICRO_VIC 0xCC16 #define PCI_VENDOR_ID_BUSLOGIC 0x104B #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 #define PCI_VENDOR_ID_TI 0x104c #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 #define PCI_DEVICE_ID_TI_4450 0x8011 #define PCI_DEVICE_ID_TI_XX21_XX11 0x8031 #define PCI_DEVICE_ID_TI_XX21_XX11_FM 0x8033 #define PCI_DEVICE_ID_TI_XX21_XX11_SD 0x8034 #define PCI_DEVICE_ID_TI_X515 0x8036 #define PCI_DEVICE_ID_TI_XX12 0x8039 #define PCI_DEVICE_ID_TI_XX12_FM 0x803b #define PCI_DEVICE_ID_TI_XIO2000A 0x8231 #define PCI_DEVICE_ID_TI_1130 0xac12 #define PCI_DEVICE_ID_TI_1031 0xac13 #define PCI_DEVICE_ID_TI_1131 0xac15 #define PCI_DEVICE_ID_TI_1250 0xac16 #define PCI_DEVICE_ID_TI_1220 0xac17 #define PCI_DEVICE_ID_TI_1221 0xac19 #define PCI_DEVICE_ID_TI_1210 0xac1a #define PCI_DEVICE_ID_TI_1450 0xac1b #define PCI_DEVICE_ID_TI_1225 0xac1c #define PCI_DEVICE_ID_TI_1251A 0xac1d #define PCI_DEVICE_ID_TI_1211 0xac1e #define PCI_DEVICE_ID_TI_1251B 0xac1f #define PCI_DEVICE_ID_TI_4410 0xac41 #define PCI_DEVICE_ID_TI_4451 0xac42 #define PCI_DEVICE_ID_TI_4510 0xac44 #define PCI_DEVICE_ID_TI_4520 0xac46 #define PCI_DEVICE_ID_TI_7510 0xac47 #define PCI_DEVICE_ID_TI_7610 0xac48 #define PCI_DEVICE_ID_TI_7410 0xac49 #define PCI_DEVICE_ID_TI_1410 0xac50 #define PCI_DEVICE_ID_TI_1420 0xac51 #define PCI_DEVICE_ID_TI_1451A 0xac52 #define PCI_DEVICE_ID_TI_1620 0xac54 #define PCI_DEVICE_ID_TI_1520 0xac55 #define PCI_DEVICE_ID_TI_1510 0xac56 #define PCI_DEVICE_ID_TI_X620 0xac8d #define PCI_DEVICE_ID_TI_X420 0xac8e #define PCI_DEVICE_ID_TI_XX20_FM 0xac8f #define PCI_DEVICE_ID_TI_J721E 0xb00d #define PCI_DEVICE_ID_TI_DRA74x 0xb500 #define PCI_DEVICE_ID_TI_DRA72x 0xb501 #define PCI_VENDOR_ID_SONY 0x104d /* Winbond have two vendor IDs! See 0x10ad as well */ #define PCI_VENDOR_ID_WINBOND2 0x1050 #define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a #define PCI_DEVICE_ID_WINBOND2_6692 0x6692 #define PCI_VENDOR_ID_ANIGMA 0x1051 #define PCI_DEVICE_ID_ANIGMA_MC145575 0x0100 #define PCI_VENDOR_ID_EFAR 0x1055 #define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130 #define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463 #define PCI_VENDOR_ID_MOTOROLA 0x1057 #define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 #define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 #define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 #define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802 #define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803 #define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b #define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803 #define PCI_DEVICE_ID_MOTOROLA_MPC5200B 0x5809 #define PCI_VENDOR_ID_PROMISE 0x105a #define PCI_DEVICE_ID_PROMISE_20265 0x0d30 #define PCI_DEVICE_ID_PROMISE_20267 0x4d30 #define PCI_DEVICE_ID_PROMISE_20246 0x4d33 #define PCI_DEVICE_ID_PROMISE_20262 0x4d38 #define PCI_DEVICE_ID_PROMISE_20263 0x0D38 #define PCI_DEVICE_ID_PROMISE_20268 0x4d68 #define PCI_DEVICE_ID_PROMISE_20269 0x4d69 #define PCI_DEVICE_ID_PROMISE_20270 0x6268 #define PCI_DEVICE_ID_PROMISE_20271 0x6269 #define PCI_DEVICE_ID_PROMISE_20275 0x1275 #define PCI_DEVICE_ID_PROMISE_20276 0x5275 #define PCI_DEVICE_ID_PROMISE_20277 0x7275 #define PCI_VENDOR_ID_FOXCONN 0x105b #define PCI_VENDOR_ID_UMC 0x1060 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101 #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a #define PCI_DEVICE_ID_UMC_UM8886A 0x886a #define PCI_VENDOR_ID_PICOPOWER 0x1066 #define PCI_DEVICE_ID_PICOPOWER_PT86C523 0x0002 #define PCI_DEVICE_ID_PICOPOWER_PT86C523BBP 0x8002 #define PCI_VENDOR_ID_MYLEX 0x1069 #define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 #define PCI_DEVICE_ID_MYLEX_DAC960_PD 0x0002 #define PCI_DEVICE_ID_MYLEX_DAC960_PG 0x0010 #define PCI_DEVICE_ID_MYLEX_DAC960_LA 0x0020 #define PCI_DEVICE_ID_MYLEX_DAC960_LP 0x0050 #define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 #define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 #define PCI_VENDOR_ID_APPLE 0x106b #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e #define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 #define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 #define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d #define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e #define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032 #define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034 #define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b #define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043 #define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b #define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c #define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050 #define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 #define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 #define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 #define PCI_DEVICE_ID_APPLE_U4_PCIE 0x005b #define PCI_DEVICE_ID_APPLE_IPID2_AGP 0x0066 #define PCI_DEVICE_ID_APPLE_IPID2_ATA 0x0069 #define PCI_DEVICE_ID_APPLE_IPID2_FW 0x006a #define PCI_DEVICE_ID_APPLE_IPID2_GMAC 0x006b #define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 #define PCI_VENDOR_ID_YAMAHA 0x1073 #define PCI_DEVICE_ID_YAMAHA_724 0x0004 #define PCI_DEVICE_ID_YAMAHA_724F 0x000d #define PCI_DEVICE_ID_YAMAHA_740 0x000a #define PCI_DEVICE_ID_YAMAHA_740C 0x000c #define PCI_DEVICE_ID_YAMAHA_744 0x0010 #define PCI_DEVICE_ID_YAMAHA_754 0x0012 #define PCI_VENDOR_ID_QLOGIC 0x1077 #define PCI_DEVICE_ID_QLOGIC_ISP10160 0x1016 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 #define PCI_DEVICE_ID_QLOGIC_ISP1080 0x1080 #define PCI_DEVICE_ID_QLOGIC_ISP12160 0x1216 #define PCI_DEVICE_ID_QLOGIC_ISP1240 0x1240 #define PCI_DEVICE_ID_QLOGIC_ISP1280 0x1280 #define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 #define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 #define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 #define PCI_DEVICE_ID_QLOGIC_ISP2312 0x2312 #define PCI_DEVICE_ID_QLOGIC_ISP2322 0x2322 #define PCI_DEVICE_ID_QLOGIC_ISP6312 0x6312 #define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322 #define PCI_DEVICE_ID_QLOGIC_ISP2422 0x2422 #define PCI_DEVICE_ID_QLOGIC_ISP2432 0x2432 #define PCI_DEVICE_ID_QLOGIC_ISP2512 0x2512 #define PCI_DEVICE_ID_QLOGIC_ISP2522 0x2522 #define PCI_DEVICE_ID_QLOGIC_ISP5422 0x5422 #define PCI_DEVICE_ID_QLOGIC_ISP5432 0x5432 #define PCI_VENDOR_ID_CYRIX 0x1078 #define PCI_DEVICE_ID_CYRIX_5510 0x0000 #define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 #define PCI_DEVICE_ID_CYRIX_5520 0x0002 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 #define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 #define PCI_VENDOR_ID_CONTAQ 0x1080 #define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 #define PCI_VENDOR_ID_OLICOM 0x108d #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 #define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 #define PCI_VENDOR_ID_SUN 0x108e #define PCI_DEVICE_ID_SUN_EBUS 0x1000 #define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001 #define PCI_DEVICE_ID_SUN_RIO_EBUS 0x1100 #define PCI_DEVICE_ID_SUN_RIO_GEM 0x1101 #define PCI_DEVICE_ID_SUN_RIO_1394 0x1102 #define PCI_DEVICE_ID_SUN_RIO_USB 0x1103 #define PCI_DEVICE_ID_SUN_GEM 0x2bad #define PCI_DEVICE_ID_SUN_SIMBA 0x5000 #define PCI_DEVICE_ID_SUN_PBM 0x8000 #define PCI_DEVICE_ID_SUN_SCHIZO 0x8001 #define PCI_DEVICE_ID_SUN_SABRE 0xa000 #define PCI_DEVICE_ID_SUN_HUMMINGBIRD 0xa001 #define PCI_DEVICE_ID_SUN_TOMATILLO 0xa801 #define PCI_DEVICE_ID_SUN_CASSINI 0xabba #define PCI_VENDOR_ID_NI 0x1093 #define PCI_DEVICE_ID_NI_PCI2322 0xd130 #define PCI_DEVICE_ID_NI_PCI2324 0xd140 #define PCI_DEVICE_ID_NI_PCI2328 0xd150 #define PCI_DEVICE_ID_NI_PXI8422_2322 0xd190 #define PCI_DEVICE_ID_NI_PXI8422_2324 0xd1a0 #define PCI_DEVICE_ID_NI_PXI8420_2322 0xd1d0 #define PCI_DEVICE_ID_NI_PXI8420_2324 0xd1e0 #define PCI_DEVICE_ID_NI_PXI8420_2328 0xd1f0 #define PCI_DEVICE_ID_NI_PXI8420_23216 0xd1f1 #define PCI_DEVICE_ID_NI_PCI2322I 0xd250 #define PCI_DEVICE_ID_NI_PCI2324I 0xd270 #define PCI_DEVICE_ID_NI_PCI23216 0xd2b0 #define PCI_DEVICE_ID_NI_PXI8430_2322 0x7080 #define PCI_DEVICE_ID_NI_PCI8430_2322 0x70db #define PCI_DEVICE_ID_NI_PXI8430_2324 0x70dd #define PCI_DEVICE_ID_NI_PCI8430_2324 0x70df #define PCI_DEVICE_ID_NI_PXI8430_2328 0x70e2 #define PCI_DEVICE_ID_NI_PCI8430_2328 0x70e4 #define PCI_DEVICE_ID_NI_PXI8430_23216 0x70e6 #define PCI_DEVICE_ID_NI_PCI8430_23216 0x70e7 #define PCI_DEVICE_ID_NI_PXI8432_2322 0x70e8 #define PCI_DEVICE_ID_NI_PCI8432_2322 0x70ea #define PCI_DEVICE_ID_NI_PXI8432_2324 0x70ec #define PCI_DEVICE_ID_NI_PCI8432_2324 0x70ee #define PCI_VENDOR_ID_CMD 0x1095 #define PCI_DEVICE_ID_CMD_643 0x0643 #define PCI_DEVICE_ID_CMD_646 0x0646 #define PCI_DEVICE_ID_CMD_648 0x0648 #define PCI_DEVICE_ID_CMD_649 0x0649 #define PCI_DEVICE_ID_SII_680 0x0680 #define PCI_DEVICE_ID_SII_3112 0x3112 #define PCI_DEVICE_ID_SII_1210SA 0x0240 #define PCI_VENDOR_ID_BROOKTREE 0x109e #define PCI_DEVICE_ID_BROOKTREE_878 0x0878 #define PCI_DEVICE_ID_BROOKTREE_879 0x0879 #define PCI_VENDOR_ID_SGI 0x10a9 #define PCI_DEVICE_ID_SGI_IOC3 0x0003 #define PCI_DEVICE_ID_SGI_LITHIUM 0x1002 #define PCI_VENDOR_ID_WINBOND 0x10ad #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 #define PCI_VENDOR_ID_PLX 0x10b5 #define PCI_DEVICE_ID_PLX_R685 0x1030 #define PCI_DEVICE_ID_PLX_ROMULUS 0x106a #define PCI_DEVICE_ID_PLX_SPCOM800 0x1076 #define PCI_DEVICE_ID_PLX_1077 0x1077 #define PCI_DEVICE_ID_PLX_SPCOM200 0x1103 #define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 #define PCI_DEVICE_ID_PLX_R753 0x1152 #define PCI_DEVICE_ID_PLX_OLITEC 0x1187 #define PCI_DEVICE_ID_PLX_PCI200SYN 0x3196 #define PCI_DEVICE_ID_PLX_9030 0x9030 #define PCI_DEVICE_ID_PLX_9050 0x9050 #define PCI_DEVICE_ID_PLX_9056 0x9056 #define PCI_DEVICE_ID_PLX_9080 0x9080 #define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001 #define PCI_VENDOR_ID_MADGE 0x10b6 #define PCI_DEVICE_ID_MADGE_MK2 0x0002 #define PCI_VENDOR_ID_3COM 0x10b7 #define PCI_DEVICE_ID_3COM_3C985 0x0001 #define PCI_DEVICE_ID_3COM_3C940 0x1700 #define PCI_DEVICE_ID_3COM_3C339 0x3390 #define PCI_DEVICE_ID_3COM_3C359 0x3590 #define PCI_DEVICE_ID_3COM_3C940B 0x80eb #define PCI_DEVICE_ID_3COM_3CR990 0x9900 #define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902 #define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903 #define PCI_DEVICE_ID_3COM_3CR990B 0x9904 #define PCI_DEVICE_ID_3COM_3CR990_FX 0x9905 #define PCI_DEVICE_ID_3COM_3CR990SVR95 0x9908 #define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 #define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a #define PCI_VENDOR_ID_AL 0x10b9 #define PCI_DEVICE_ID_AL_M1489 0x1489 #define PCI_DEVICE_ID_AL_M1533 0x1533 #define PCI_DEVICE_ID_AL_M1535 0x1535 #define PCI_DEVICE_ID_AL_M1541 0x1541 #define PCI_DEVICE_ID_AL_M1563 0x1563 #define PCI_DEVICE_ID_AL_M1621 0x1621 #define PCI_DEVICE_ID_AL_M1631 0x1631 #define PCI_DEVICE_ID_AL_M1632 0x1632 #define PCI_DEVICE_ID_AL_M1641 0x1641 #define PCI_DEVICE_ID_AL_M1644 0x1644 #define PCI_DEVICE_ID_AL_M1647 0x1647 #define PCI_DEVICE_ID_AL_M1651 0x1651 #define PCI_DEVICE_ID_AL_M1671 0x1671 #define PCI_DEVICE_ID_AL_M1681 0x1681 #define PCI_DEVICE_ID_AL_M1683 0x1683 #define PCI_DEVICE_ID_AL_M1689 0x1689 #define PCI_DEVICE_ID_AL_M5219 0x5219 #define PCI_DEVICE_ID_AL_M5228 0x5228 #define PCI_DEVICE_ID_AL_M5229 0x5229 #define PCI_DEVICE_ID_AL_M5451 0x5451 #define PCI_DEVICE_ID_AL_M7101 0x7101 #define PCI_VENDOR_ID_NEOMAGIC 0x10c8 #define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 #define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 #define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 #define PCI_VENDOR_ID_TCONRAD 0x10da #define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 #define PCI_VENDOR_ID_ROHM 0x10db #define PCI_VENDOR_ID_NVIDIA 0x10de #define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 #define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 #define PCI_DEVICE_ID_NVIDIA_UTNT2 0x0029 #define PCI_DEVICE_ID_NVIDIA_TNT_UNKNOWN 0x002a #define PCI_DEVICE_ID_NVIDIA_VTNT2 0x002C #define PCI_DEVICE_ID_NVIDIA_UVTNT2 0x002D #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS 0x0034 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE 0x0035 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA 0x0036 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2 0x003e #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA 0x0040 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800 0x0041 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_LE 0x0042 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_GT 0x0045 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_4000 0x004E #define PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS 0x0052 #define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE 0x0053 #define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA 0x0054 #define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2 0x0055 #define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO 0x0059 #define PCI_DEVICE_ID_NVIDIA_CK804_PCIE 0x005d #define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS 0x0064 #define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE 0x0065 #define PCI_DEVICE_ID_NVIDIA_MCP2_MODEM 0x0069 #define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO 0x006a #define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS 0x0084 #define PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE 0x0085 #define PCI_DEVICE_ID_NVIDIA_MCP2S_MODEM 0x0089 #define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a #define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e #define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT 0x0090 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX 0x0091 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800 0x0098 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX 0x0099 #define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 #define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1 #define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2 #define PCI_DEVICE_ID_GEFORCE_GO_6800 0x00c8 #define PCI_DEVICE_ID_GEFORCE_GO_6800_ULTRA 0x00c9 #define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc #define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce #define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 #define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 #define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 #define PCI_DEVICE_ID_NVIDIA_MCP3_MODEM 0x00d9 #define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da #define PCI_DEVICE_ID_NVIDIA_NFORCE3S 0x00e1 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA 0x00e3 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS 0x00e4 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE 0x00e5 #define PCI_DEVICE_ID_NVIDIA_CK8S_AUDIO 0x00ea #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2 0x00ee #define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_ALT1 0x00f0 #define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT1 0x00f1 #define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT2 0x00f2 #define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6200_ALT1 0x00f3 #define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_GT 0x00f9 #define PCIE_DEVICE_ID_NVIDIA_QUADRO_NVS280 0x00fd #define PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR 0x0100 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR 0x0101 #define PCI_DEVICE_ID_NVIDIA_QUADRO 0x0103 #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX 0x0110 #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2 0x0111 #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO 0x0112 #define PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR 0x0113 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600_GT 0x0140 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600 0x0141 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6610_XL 0x0145 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_540 0x014E #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200 0x014F #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS 0x0150 #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2 0x0151 #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA 0x0152 #define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO 0x0153 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200_TURBOCACHE 0x0161 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200 0x0164 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250 0x0166 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200_1 0x0167 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250_1 0x0168 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_460 0x0170 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440 0x0171 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420 0x0172 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_SE 0x0173 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO 0x0174 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO 0x0175 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO_M32 0x0176 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460_GO 0x0177 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_500XGL 0x0178 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO_M64 0x0179 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_200 0x017A #define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL 0x017B #define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL 0x017C #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_410_GO_M16 0x017D #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_8X 0x0181 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440SE_8X 0x0182 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420_8X 0x0183 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_4000 0x0185 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_448_GO 0x0186 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_488_GO 0x0187 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_580_XGL 0x0188 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_MAC 0x0189 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_280_NVS 0x018A #define PCI_DEVICE_ID_NVIDIA_QUADRO4_380_XGL 0x018B #define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0 #define PCI_DEVICE_ID_NVIDIA_NFORCE 0x01a4 #define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1 #define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS 0x01b4 #define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE 0x01bc #define PCI_DEVICE_ID_NVIDIA_MCP1_MODEM 0x01c1 #define PCI_DEVICE_ID_NVIDIA_NFORCE2 0x01e0 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3 0x0200 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1 0x0201 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202 #define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC 0x0203 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B 0x0211 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_LE 0x0212 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_GT 0x0215 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4600 0x0250 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4400 0x0251 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4200 0x0253 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS 0x0264 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS 0x0368 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x037E #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282 #define PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200_GO 0x0286 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_980_XGL 0x0288 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_780_XGL 0x0289 #define PCI_DEVICE_ID_NVIDIA_QUADRO4_700_GOGL 0x028C #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800_ULTRA 0x0301 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800 0x0302 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_2000 0x0308 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1000 0x0309 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600_ULTRA 0x0311 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600 0x0312 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600SE 0x0314 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5600 0x031A #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5650 0x031B #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO700 0x031C #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200 0x0320 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_ULTRA 0x0321 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_1 0x0322 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200SE 0x0323 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5200 0x0324 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250 0x0325 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5500 0x0326 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5100 0x0327 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250_32 0x0328 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200 0x0329 #define PCI_DEVICE_ID_NVIDIA_QUADRO_NVS_280_PCI 0x032A #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_500 0x032B #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5300 0x032C #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5100 0x032D #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900_ULTRA 0x0330 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900 0x0331 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900XT 0x0332 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5950_ULTRA 0x0333 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900ZT 0x0334 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_3000 0x0338 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_700 0x033F #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700_ULTRA 0x0341 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700 0x0342 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700LE 0x0343 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700VE 0x0344 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_1 0x0347 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 0x0348 #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 0x034C #define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 0x034E #define PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V0 0x0360 #define PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V4 0x0364 #define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA 0x03E7 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS 0x03EB #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE 0x03EC #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2 0x03F6 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3 0x03F7 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS 0x0446 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE 0x0448 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS 0x0542 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE 0x0560 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE 0x056C #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS 0x0752 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE 0x0759 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS 0x07D8 #define PCI_DEVICE_ID_NVIDIA_GEFORCE_320M 0x08A0 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS 0x0AA2 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA 0x0D85 #define PCI_VENDOR_ID_IMS 0x10e0 #define PCI_DEVICE_ID_IMS_TT128 0x9128 #define PCI_DEVICE_ID_IMS_TT3D 0x9135 #define PCI_VENDOR_ID_AMCC 0x10e8 #define PCI_VENDOR_ID_AMPERE 0x1def #define PCI_VENDOR_ID_INTERG 0x10ea #define PCI_DEVICE_ID_INTERG_1682 0x1682 #define PCI_DEVICE_ID_INTERG_2000 0x2000 #define PCI_DEVICE_ID_INTERG_2010 0x2010 #define PCI_DEVICE_ID_INTERG_5000 0x5000 #define PCI_DEVICE_ID_INTERG_5050 0x5050 #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_DEVICE_ID_REALTEK_8139 0x8139 #define PCI_VENDOR_ID_XILINX 0x10ee #define PCI_DEVICE_ID_RME_DIGI96 0x3fc0 #define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1 #define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2 #define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 #define PCI_VENDOR_ID_INIT 0x1101 #define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */ #define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 #define PCI_DEVICE_ID_CREATIVE_20K1 0x0005 #define PCI_DEVICE_ID_CREATIVE_20K2 0x000b #define PCI_SUBDEVICE_ID_CREATIVE_SB0760 0x0024 #define PCI_SUBDEVICE_ID_CREATIVE_SB08801 0x0041 #define PCI_SUBDEVICE_ID_CREATIVE_SB08802 0x0042 #define PCI_SUBDEVICE_ID_CREATIVE_SB08803 0x0043 #define PCI_SUBDEVICE_ID_CREATIVE_SB1270 0x0062 #define PCI_SUBDEVICE_ID_CREATIVE_HENDRIX 0x6000 #define PCI_VENDOR_ID_ECTIVA 0x1102 /* duplicate: CREATIVE */ #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938 #define PCI_VENDOR_ID_TTI 0x1103 #define PCI_DEVICE_ID_TTI_HPT343 0x0003 #define PCI_DEVICE_ID_TTI_HPT366 0x0004 #define PCI_DEVICE_ID_TTI_HPT372 0x0005 #define PCI_DEVICE_ID_TTI_HPT302 0x0006 #define PCI_DEVICE_ID_TTI_HPT371 0x0007 #define PCI_DEVICE_ID_TTI_HPT374 0x0008 #define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */ #define PCI_VENDOR_ID_SIGMA 0x1105 #define PCI_VENDOR_ID_VIA 0x1106 #define PCI_DEVICE_ID_VIA_8763_0 0x0198 #define PCI_DEVICE_ID_VIA_8380_0 0x0204 #define PCI_DEVICE_ID_VIA_3238_0 0x0238 #define PCI_DEVICE_ID_VIA_PT880 0x0258 #define PCI_DEVICE_ID_VIA_PT880ULTRA 0x0308 #define PCI_DEVICE_ID_VIA_PX8X0_0 0x0259 #define PCI_DEVICE_ID_VIA_3269_0 0x0269 #define PCI_DEVICE_ID_VIA_K8T800PRO_0 0x0282 #define PCI_DEVICE_ID_VIA_3296_0 0x0296 #define PCI_DEVICE_ID_VIA_8363_0 0x0305 #define PCI_DEVICE_ID_VIA_P4M800CE 0x0314 #define PCI_DEVICE_ID_VIA_P4M890 0x0327 #define PCI_DEVICE_ID_VIA_VT3324 0x0324 #define PCI_DEVICE_ID_VIA_VT3336 0x0336 #define PCI_DEVICE_ID_VIA_VT3351 0x0351 #define PCI_DEVICE_ID_VIA_VT3364 0x0364 #define PCI_DEVICE_ID_VIA_8371_0 0x0391 #define PCI_DEVICE_ID_VIA_6415 0x0415 #define PCI_DEVICE_ID_VIA_8501_0 0x0501 #define PCI_DEVICE_ID_VIA_82C561 0x0561 #define PCI_DEVICE_ID_VIA_82C586_1 0x0571 #define PCI_DEVICE_ID_VIA_82C576 0x0576 #define PCI_DEVICE_ID_VIA_82C586_0 0x0586 #define PCI_DEVICE_ID_VIA_82C596 0x0596 #define PCI_DEVICE_ID_VIA_82C597_0 0x0597 #define PCI_DEVICE_ID_VIA_82C598_0 0x0598 #define PCI_DEVICE_ID_VIA_8601_0 0x0601 #define PCI_DEVICE_ID_VIA_8605_0 0x0605 #define PCI_DEVICE_ID_VIA_82C686 0x0686 #define PCI_DEVICE_ID_VIA_82C691_0 0x0691 #define PCI_DEVICE_ID_VIA_82C576_1 0x1571 #define PCI_DEVICE_ID_VIA_82C586_2 0x3038 #define PCI_DEVICE_ID_VIA_82C586_3 0x3040 #define PCI_DEVICE_ID_VIA_82C596_3 0x3050 #define PCI_DEVICE_ID_VIA_82C596B_3 0x3051 #define PCI_DEVICE_ID_VIA_82C686_4 0x3057 #define PCI_DEVICE_ID_VIA_82C686_5 0x3058 #define PCI_DEVICE_ID_VIA_8233_5 0x3059 #define PCI_DEVICE_ID_VIA_8233_0 0x3074 #define PCI_DEVICE_ID_VIA_8633_0 0x3091 #define PCI_DEVICE_ID_VIA_8367_0 0x3099 #define PCI_DEVICE_ID_VIA_8653_0 0x3101 #define PCI_DEVICE_ID_VIA_8622 0x3102 #define PCI_DEVICE_ID_VIA_8235_USB_2 0x3104 #define PCI_DEVICE_ID_VIA_8233C_0 0x3109 #define PCI_DEVICE_ID_VIA_8361 0x3112 #define PCI_DEVICE_ID_VIA_XM266 0x3116 #define PCI_DEVICE_ID_VIA_612X 0x3119 #define PCI_DEVICE_ID_VIA_862X_0 0x3123 #define PCI_DEVICE_ID_VIA_8753_0 0x3128 #define PCI_DEVICE_ID_VIA_8233A 0x3147 #define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 #define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 #define PCI_DEVICE_ID_VIA_XN266 0x3156 #define PCI_DEVICE_ID_VIA_6410 0x3164 #define PCI_DEVICE_ID_VIA_8754C_0 0x3168 #define PCI_DEVICE_ID_VIA_8235 0x3177 #define PCI_DEVICE_ID_VIA_8385_0 0x3188 #define PCI_DEVICE_ID_VIA_8377_0 0x3189 #define PCI_DEVICE_ID_VIA_8378_0 0x3205 #define PCI_DEVICE_ID_VIA_8783_0 0x3208 #define PCI_DEVICE_ID_VIA_8237 0x3227 #define PCI_DEVICE_ID_VIA_8251 0x3287 #define PCI_DEVICE_ID_VIA_8261 0x3402 #define PCI_DEVICE_ID_VIA_8237A 0x3337 #define PCI_DEVICE_ID_VIA_8237S 0x3372 #define PCI_DEVICE_ID_VIA_SATA_EIDE 0x5324 #define PCI_DEVICE_ID_VIA_8231 0x8231 #define PCI_DEVICE_ID_VIA_8231_4 0x8235 #define PCI_DEVICE_ID_VIA_8365_1 0x8305 #define PCI_DEVICE_ID_VIA_CX700 0x8324 #define PCI_DEVICE_ID_VIA_CX700_IDE 0x0581 #define PCI_DEVICE_ID_VIA_VX800 0x8353 #define PCI_DEVICE_ID_VIA_VX855 0x8409 #define PCI_DEVICE_ID_VIA_VX900 0x8410 #define PCI_DEVICE_ID_VIA_8371_1 0x8391 #define PCI_DEVICE_ID_VIA_82C598_1 0x8598 #define PCI_DEVICE_ID_VIA_838X_1 0xB188 #define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 #define PCI_DEVICE_ID_VIA_VX855_IDE 0xC409 #define PCI_DEVICE_ID_VIA_ANON 0xFFFF #define PCI_VENDOR_ID_SIEMENS 0x110A #define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 #define PCI_VENDOR_ID_VORTEX 0x1119 #define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 #define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 #define PCI_DEVICE_ID_VORTEX_GDT6x10 0x0002 #define PCI_DEVICE_ID_VORTEX_GDT6x20 0x0003 #define PCI_DEVICE_ID_VORTEX_GDT6530 0x0004 #define PCI_DEVICE_ID_VORTEX_GDT6550 0x0005 #define PCI_DEVICE_ID_VORTEX_GDT6x17 0x0006 #define PCI_DEVICE_ID_VORTEX_GDT6x27 0x0007 #define PCI_DEVICE_ID_VORTEX_GDT6537 0x0008 #define PCI_DEVICE_ID_VORTEX_GDT6557 0x0009 #define PCI_DEVICE_ID_VORTEX_GDT6x15 0x000a #define PCI_DEVICE_ID_VORTEX_GDT6x25 0x000b #define PCI_DEVICE_ID_VORTEX_GDT6535 0x000c #define PCI_DEVICE_ID_VORTEX_GDT6555 0x000d #define PCI_DEVICE_ID_VORTEX_GDT6x17RP 0x0100 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP 0x0101 #define PCI_DEVICE_ID_VORTEX_GDT6537RP 0x0102 #define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 #define PCI_VENDOR_ID_EF 0x111a #define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 #define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 #define PCI_DEVICE_ID_EF_ATM_LANAI2 0x0003 #define PCI_DEVICE_ID_EF_ATM_LANAIHB 0x0005 #define PCI_VENDOR_ID_IDT 0x111d #define PCI_DEVICE_ID_IDT_IDT77201 0x0001 #define PCI_VENDOR_ID_FORE 0x1127 #define PCI_DEVICE_ID_FORE_PCA200E 0x0300 #define PCI_VENDOR_ID_PHILIPS 0x1131 #define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 #define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 #define PCI_VENDOR_ID_EICON 0x1133 #define PCI_DEVICE_ID_EICON_DIVA20 0xe002 #define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004 #define PCI_DEVICE_ID_EICON_DIVA201 0xe005 #define PCI_DEVICE_ID_EICON_DIVA202 0xe00b #define PCI_DEVICE_ID_EICON_MAESTRA 0xe010 #define PCI_DEVICE_ID_EICON_MAESTRAQ 0xe012 #define PCI_DEVICE_ID_EICON_MAESTRAQ_U 0xe013 #define PCI_DEVICE_ID_EICON_MAESTRAP 0xe014 #define PCI_VENDOR_ID_CISCO 0x1137 #define PCI_VENDOR_ID_ZIATECH 0x1138 #define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 #define PCI_VENDOR_ID_SYSKONNECT 0x1148 #define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 #define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 #define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320 #define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 #define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 #define PCI_VENDOR_ID_DIGI 0x114f #define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 #define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 #define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072 #define PCI_DEVICE_ID_DIGI_DF_M_A 0x0073 #define PCI_DEVICE_ID_DIGI_NEO_8 0x00B1 #define PCI_DEVICE_ID_NEO_2DB9 0x00C8 #define PCI_DEVICE_ID_NEO_2DB9PRI 0x00C9 #define PCI_DEVICE_ID_NEO_2RJ45 0x00CA #define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB #define PCIE_DEVICE_ID_NEO_4_IBM 0x00F4 #define PCI_VENDOR_ID_XIRCOM 0x115d #define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 #define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 #define PCI_VENDOR_ID_SERVERWORKS 0x1166 #define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 #define PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB 0x0036 #define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 #define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132 #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 #define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 #define PCI_DEVICE_ID_SERVERWORKS_HT1000SB 0x0205 #define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211 #define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212 #define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 #define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214 #define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 #define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227 #define PCI_DEVICE_ID_SERVERWORKS_HT1100LD 0x0408 #define PCI_VENDOR_ID_ALTERA 0x1172 #define PCI_VENDOR_ID_SBE 0x1176 #define PCI_DEVICE_ID_SBE_WANXL100 0x0301 #define PCI_DEVICE_ID_SBE_WANXL200 0x0302 #define PCI_DEVICE_ID_SBE_WANXL400 0x0104 #define PCI_SUBDEVICE_ID_SBE_T3E3 0x0009 #define PCI_SUBDEVICE_ID_SBE_2T3E3_P0 0x0901 #define PCI_SUBDEVICE_ID_SBE_2T3E3_P1 0x0902 #define PCI_VENDOR_ID_TOSHIBA 0x1179 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0101 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0102 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_3 0x0103 #define PCI_DEVICE_ID_TOSHIBA_PICCOLO_5 0x0105 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f #define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 #define PCI_VENDOR_ID_TOSHIBA_2 0x102f #define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030 #define PCI_DEVICE_ID_TOSHIBA_TC35815_NWU 0x0031 #define PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939 0x0032 #define PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE 0x0105 #define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108 #define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3 #define PCI_VENDOR_ID_ATTO 0x117c #define PCI_VENDOR_ID_RICOH 0x1180 #define PCI_DEVICE_ID_RICOH_RL5C465 0x0465 #define PCI_DEVICE_ID_RICOH_RL5C466 0x0466 #define PCI_DEVICE_ID_RICOH_RL5C475 0x0475 #define PCI_DEVICE_ID_RICOH_RL5C476 0x0476 #define PCI_DEVICE_ID_RICOH_RL5C478 0x0478 #define PCI_DEVICE_ID_RICOH_R5C822 0x0822 #define PCI_DEVICE_ID_RICOH_R5CE822 0xe822 #define PCI_DEVICE_ID_RICOH_R5CE823 0xe823 #define PCI_DEVICE_ID_RICOH_R5C832 0x0832 #define PCI_DEVICE_ID_RICOH_R5C843 0x0843 #define PCI_VENDOR_ID_DLINK 0x1186 #define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 #define PCI_VENDOR_ID_ARTOP 0x1191 #define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 #define PCI_DEVICE_ID_ARTOP_ATP860 0x0006 #define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007 #define PCI_DEVICE_ID_ARTOP_ATP865 0x0008 #define PCI_DEVICE_ID_ARTOP_ATP865R 0x0009 #define PCI_DEVICE_ID_ARTOP_ATP867A 0x000A #define PCI_DEVICE_ID_ARTOP_ATP867B 0x000B #define PCI_DEVICE_ID_ARTOP_AEC7610 0x8002 #define PCI_DEVICE_ID_ARTOP_AEC7612UW 0x8010 #define PCI_DEVICE_ID_ARTOP_AEC7612U 0x8020 #define PCI_DEVICE_ID_ARTOP_AEC7612S 0x8030 #define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040 #define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050 #define PCI_DEVICE_ID_ARTOP_8060 0x8060 #define PCI_VENDOR_ID_ZEITNET 0x1193 #define PCI_DEVICE_ID_ZEITNET_1221 0x0001 #define PCI_DEVICE_ID_ZEITNET_1225 0x0002 #define PCI_VENDOR_ID_FUJITSU_ME 0x119e #define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 #define PCI_DEVICE_ID_FUJITSU_FS50 0x0003 #define PCI_SUBVENDOR_ID_KEYSPAN 0x11a9 #define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 #define PCI_VENDOR_ID_MARVELL 0x11ab #define PCI_VENDOR_ID_MARVELL_EXT 0x1b4b #define PCI_DEVICE_ID_MARVELL_GT64111 0x4146 #define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 #define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 #define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 #define PCI_DEVICE_ID_MARVELL_88ALP01_NAND 0x4100 #define PCI_DEVICE_ID_MARVELL_88ALP01_SD 0x4101 #define PCI_DEVICE_ID_MARVELL_88ALP01_CCIC 0x4102 #define PCI_VENDOR_ID_V3 0x11b0 #define PCI_DEVICE_ID_V3_V960 0x0001 #define PCI_DEVICE_ID_V3_V351 0x0002 #define PCI_VENDOR_ID_ATT 0x11c1 #define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 #define PCI_VENDOR_ID_SPECIALIX 0x11cb #define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 #define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 #define PCI_DEVICE_ID_AD1889JS 0x1889 #define PCI_DEVICE_ID_SEGA_BBA 0x1234 #define PCI_VENDOR_ID_ZORAN 0x11de #define PCI_DEVICE_ID_ZORAN_36057 0x6057 #define PCI_DEVICE_ID_ZORAN_36120 0x6120 #define PCI_VENDOR_ID_COMPEX 0x11f6 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 #define PCI_VENDOR_ID_PMC_Sierra 0x11f8 #define PCI_VENDOR_ID_MICROSEMI 0x11f8 #define PCI_VENDOR_ID_RP 0x11fe #define PCI_VENDOR_ID_CYCLADES 0x120e #define PCI_DEVICE_ID_PC300_RX_2 0x0300 #define PCI_DEVICE_ID_PC300_RX_1 0x0301 #define PCI_DEVICE_ID_PC300_TE_2 0x0310 #define PCI_DEVICE_ID_PC300_TE_1 0x0311 #define PCI_DEVICE_ID_PC300_TE_M_2 0x0320 #define PCI_DEVICE_ID_PC300_TE_M_1 0x0321 #define PCI_VENDOR_ID_ESSENTIAL 0x120f #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 #define PCI_VENDOR_ID_O2 0x1217 #define PCI_DEVICE_ID_O2_6729 0x6729 #define PCI_DEVICE_ID_O2_6730 0x673a #define PCI_DEVICE_ID_O2_6832 0x6832 #define PCI_DEVICE_ID_O2_6836 0x6836 #define PCI_DEVICE_ID_O2_6812 0x6872 #define PCI_DEVICE_ID_O2_6933 0x6933 #define PCI_DEVICE_ID_O2_8120 0x8120 #define PCI_DEVICE_ID_O2_8220 0x8220 #define PCI_DEVICE_ID_O2_8221 0x8221 #define PCI_DEVICE_ID_O2_8320 0x8320 #define PCI_DEVICE_ID_O2_8321 0x8321 #define PCI_VENDOR_ID_3DFX 0x121a #define PCI_DEVICE_ID_3DFX_VOODOO 0x0001 #define PCI_DEVICE_ID_3DFX_VOODOO2 0x0002 #define PCI_DEVICE_ID_3DFX_BANSHEE 0x0003 #define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 #define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 #define PCI_VENDOR_ID_AVM 0x1244 #define PCI_DEVICE_ID_AVM_B1 0x0700 #define PCI_DEVICE_ID_AVM_C4 0x0800 #define PCI_DEVICE_ID_AVM_A1 0x0a00 #define PCI_DEVICE_ID_AVM_A1_V2 0x0e00 #define PCI_DEVICE_ID_AVM_C2 0x1100 #define PCI_DEVICE_ID_AVM_T1 0x1200 #define PCI_VENDOR_ID_STALLION 0x124d /* Allied Telesyn */ #define PCI_VENDOR_ID_AT 0x1259 #define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 #define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 #define PCI_VENDOR_ID_ASIX 0x125b #define PCI_DEVICE_ID_ASIX_AX99100 0x9100 #define PCI_DEVICE_ID_ASIX_AX99100_LB 0x9110 #define PCI_VENDOR_ID_ESS 0x125d #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 #define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988 #define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989 #define PCI_DEVICE_ID_ESS_CANYON3D_2LE 0x1990 #define PCI_DEVICE_ID_ESS_CANYON3D_2 0x1992 #define PCI_DEVICE_ID_ESS_MAESTRO3 0x1998 #define PCI_DEVICE_ID_ESS_MAESTRO3_1 0x1999 #define PCI_DEVICE_ID_ESS_MAESTRO3_HW 0x199a #define PCI_DEVICE_ID_ESS_MAESTRO3_2 0x199b #define PCI_VENDOR_ID_SATSAGEM 0x1267 #define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 #define PCI_VENDOR_ID_ENSONIQ 0x1274 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371 #define PCI_VENDOR_ID_TRANSMETA 0x1279 #define PCI_DEVICE_ID_EFFICEON 0x0060 #define PCI_VENDOR_ID_ROCKWELL 0x127A #define PCI_VENDOR_ID_ITE 0x1283 #define PCI_DEVICE_ID_ITE_8172 0x8172 #define PCI_DEVICE_ID_ITE_8211 0x8211 #define PCI_DEVICE_ID_ITE_8212 0x8212 #define PCI_DEVICE_ID_ITE_8213 0x8213 #define PCI_DEVICE_ID_ITE_8152 0x8152 #define PCI_DEVICE_ID_ITE_8872 0x8872 #define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 /* formerly Platform Tech */ #define PCI_DEVICE_ID_ESS_ESS0100 0x0100 #define PCI_VENDOR_ID_ALTEON 0x12ae #define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232 0x0002 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232 0x0003 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485 0x0004 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4 0x0005 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485 0x0006 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2 0x0007 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485 0x0008 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6 0x0009 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ 0x000C #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_PTM 0x000D #define PCI_SUBDEVICE_ID_CONNECT_TECH_NT960PCI 0x0100 #define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2 0x0201 #define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4 0x0202 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232 0x0300 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232 0x0301 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232 0x0302 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1 0x0310 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2 0x0311 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4 0x0312 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2 0x0320 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4 0x0321 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8 0x0322 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485 0x0330 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485 0x0331 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485 0x0332 #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 #define PCI_VENDOR_ID_PERICOM 0x12D8 #define PCI_DEVICE_ID_PERICOM_PI7C9X7951 0x7951 #define PCI_DEVICE_ID_PERICOM_PI7C9X7952 0x7952 #define PCI_DEVICE_ID_PERICOM_PI7C9X7954 0x7954 #define PCI_DEVICE_ID_PERICOM_PI7C9X7958 0x7958 #define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0 #define PCI_SUBDEVICE_ID_CHASE_PCIFAST4 0x0031 #define PCI_SUBDEVICE_ID_CHASE_PCIFAST8 0x0021 #define PCI_SUBDEVICE_ID_CHASE_PCIFAST16 0x0011 #define PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC 0x0041 #define PCI_SUBVENDOR_ID_CHASE_PCIRAS 0x124D #define PCI_SUBDEVICE_ID_CHASE_PCIRAS4 0xF001 #define PCI_SUBDEVICE_ID_CHASE_PCIRAS8 0xF010 #define PCI_VENDOR_ID_AUREAL 0x12eb #define PCI_DEVICE_ID_AUREAL_VORTEX_1 0x0001 #define PCI_DEVICE_ID_AUREAL_VORTEX_2 0x0002 #define PCI_DEVICE_ID_AUREAL_ADVANTAGE 0x0003 #define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8 #define PCI_DEVICE_ID_LML_33R10 0x8a02 #define PCI_VENDOR_ID_ESDGMBH 0x12fe #define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111 #define PCI_VENDOR_ID_CB 0x1307 /* Measurement Computing */ #define PCI_VENDOR_ID_SIIG 0x131f #define PCI_SUBVENDOR_ID_SIIG 0x131f #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000 #define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001 #define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002 #define PCI_DEVICE_ID_SIIG_1S1P_10x_550 0x1010 #define PCI_DEVICE_ID_SIIG_1S1P_10x_650 0x1011 #define PCI_DEVICE_ID_SIIG_1S1P_10x_850 0x1012 #define PCI_DEVICE_ID_SIIG_1P_10x 0x1020 #define PCI_DEVICE_ID_SIIG_2P_10x 0x1021 #define PCI_DEVICE_ID_SIIG_2S_10x_550 0x1030 #define PCI_DEVICE_ID_SIIG_2S_10x_650 0x1031 #define PCI_DEVICE_ID_SIIG_2S_10x_850 0x1032 #define PCI_DEVICE_ID_SIIG_2S1P_10x_550 0x1034 #define PCI_DEVICE_ID_SIIG_2S1P_10x_650 0x1035 #define PCI_DEVICE_ID_SIIG_2S1P_10x_850 0x1036 #define PCI_DEVICE_ID_SIIG_4S_10x_550 0x1050 #define PCI_DEVICE_ID_SIIG_4S_10x_650 0x1051 #define PCI_DEVICE_ID_SIIG_4S_10x_850 0x1052 #define PCI_DEVICE_ID_SIIG_1S_20x_550 0x2000 #define PCI_DEVICE_ID_SIIG_1S_20x_650 0x2001 #define PCI_DEVICE_ID_SIIG_1S_20x_850 0x2002 #define PCI_DEVICE_ID_SIIG_1P_20x 0x2020 #define PCI_DEVICE_ID_SIIG_2P_20x 0x2021 #define PCI_DEVICE_ID_SIIG_2S_20x_550 0x2030 #define PCI_DEVICE_ID_SIIG_2S_20x_650 0x2031 #define PCI_DEVICE_ID_SIIG_2S_20x_850 0x2032 #define PCI_DEVICE_ID_SIIG_2P1S_20x_550 0x2040 #define PCI_DEVICE_ID_SIIG_2P1S_20x_650 0x2041 #define PCI_DEVICE_ID_SIIG_2P1S_20x_850 0x2042 #define PCI_DEVICE_ID_SIIG_1S1P_20x_550 0x2010 #define PCI_DEVICE_ID_SIIG_1S1P_20x_650 0x2011 #define PCI_DEVICE_ID_SIIG_1S1P_20x_850 0x2012 #define PCI_DEVICE_ID_SIIG_4S_20x_550 0x2050 #define PCI_DEVICE_ID_SIIG_4S_20x_650 0x2051 #define PCI_DEVICE_ID_SIIG_4S_20x_850 0x2052 #define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060 #define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061 #define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062 #define PCI_DEVICE_ID_SIIG_8S_20x_550 0x2080 #define PCI_DEVICE_ID_SIIG_8S_20x_650 0x2081 #define PCI_DEVICE_ID_SIIG_8S_20x_850 0x2082 #define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050 #define PCI_VENDOR_ID_RADISYS 0x1331 #define PCI_VENDOR_ID_MICRO_MEMORY 0x1332 #define PCI_DEVICE_ID_MICRO_MEMORY_5415CN 0x5415 #define PCI_DEVICE_ID_MICRO_MEMORY_5425CN 0x5425 #define PCI_DEVICE_ID_MICRO_MEMORY_6155 0x6155 #define PCI_VENDOR_ID_DOMEX 0x134a #define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 #define PCI_VENDOR_ID_INTASHIELD 0x135a #define PCI_DEVICE_ID_INTASHIELD_IS200 0x0d80 #define PCI_DEVICE_ID_INTASHIELD_IS400 0x0dc0 #define PCI_VENDOR_ID_QUATECH 0x135C #define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 #define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 #define PCI_DEVICE_ID_QUATECH_DSC200 0x0030 #define PCI_DEVICE_ID_QUATECH_QSC200 0x0040 #define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 #define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 #define PCI_DEVICE_ID_QUATECH_QSCP100 0x0120 #define PCI_DEVICE_ID_QUATECH_DSCP100 0x0130 #define PCI_DEVICE_ID_QUATECH_QSCP200 0x0140 #define PCI_DEVICE_ID_QUATECH_DSCP200 0x0150 #define PCI_DEVICE_ID_QUATECH_QSCLP100 0x0170 #define PCI_DEVICE_ID_QUATECH_DSCLP100 0x0180 #define PCI_DEVICE_ID_QUATECH_DSC100E 0x0181 #define PCI_DEVICE_ID_QUATECH_SSCLP100 0x0190 #define PCI_DEVICE_ID_QUATECH_QSCLP200 0x01A0 #define PCI_DEVICE_ID_QUATECH_DSCLP200 0x01B0 #define PCI_DEVICE_ID_QUATECH_DSC200E 0x01B1 #define PCI_DEVICE_ID_QUATECH_SSCLP200 0x01C0 #define PCI_DEVICE_ID_QUATECH_ESCLP100 0x01E0 #define PCI_DEVICE_ID_QUATECH_SPPXP_100 0x0278 #define PCI_VENDOR_ID_SEALEVEL 0x135e #define PCI_DEVICE_ID_SEALEVEL_U530 0x7101 #define PCI_DEVICE_ID_SEALEVEL_UCOMM2 0x7201 #define PCI_DEVICE_ID_SEALEVEL_UCOMM422 0x7402 #define PCI_DEVICE_ID_SEALEVEL_UCOMM232 0x7202 #define PCI_DEVICE_ID_SEALEVEL_COMM4 0x7401 #define PCI_DEVICE_ID_SEALEVEL_COMM8 0x7801 #define PCI_DEVICE_ID_SEALEVEL_7803 0x7803 #define PCI_DEVICE_ID_SEALEVEL_UCOMM8 0x7804 #define PCI_VENDOR_ID_HYPERCOPE 0x1365 #define PCI_DEVICE_ID_HYPERCOPE_PLX 0x9050 #define PCI_SUBDEVICE_ID_HYPERCOPE_OLD_ERGO 0x0104 #define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106 #define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107 #define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108 #define PCI_VENDOR_ID_DIGIGRAM 0x1369 #define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_SERIAL_SUBSYSTEM 0xc001 #define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_CAE_SERIAL_SUBSYSTEM 0xc002 #define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ESE_SERIAL_SUBSYSTEM 0xc021 #define PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ESE_CAE_SERIAL_SUBSYSTEM 0xc022 #define PCI_VENDOR_ID_KAWASAKI 0x136b #define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01 #define PCI_VENDOR_ID_CNET 0x1371 #define PCI_DEVICE_ID_CNET_GIGACARD 0x434e #define PCI_VENDOR_ID_LMC 0x1376 #define PCI_DEVICE_ID_LMC_HSSI 0x0003 #define PCI_DEVICE_ID_LMC_DS3 0x0004 #define PCI_DEVICE_ID_LMC_SSI 0x0005 #define PCI_DEVICE_ID_LMC_T1 0x0006 #define PCI_VENDOR_ID_NETGEAR 0x1385 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a #define PCI_VENDOR_ID_APPLICOM 0x1389 #define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001 #define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN 0x0002 #define PCI_DEVICE_ID_APPLICOM_PCI2000PFB 0x0003 #define PCI_VENDOR_ID_MOXA 0x1393 #define PCI_DEVICE_ID_MOXA_RC7000 0x0001 #define PCI_DEVICE_ID_MOXA_CP102 0x1020 #define PCI_DEVICE_ID_MOXA_CP102UL 0x1021 #define PCI_DEVICE_ID_MOXA_CP102U 0x1022 #define PCI_DEVICE_ID_MOXA_C104 0x1040 #define PCI_DEVICE_ID_MOXA_CP104U 0x1041 #define PCI_DEVICE_ID_MOXA_CP104JU 0x1042 #define PCI_DEVICE_ID_MOXA_CP104EL 0x1043 #define PCI_DEVICE_ID_MOXA_CT114 0x1140 #define PCI_DEVICE_ID_MOXA_CP114 0x1141 #define PCI_DEVICE_ID_MOXA_CP118U 0x1180 #define PCI_DEVICE_ID_MOXA_CP118EL 0x1181 #define PCI_DEVICE_ID_MOXA_CP132 0x1320 #define PCI_DEVICE_ID_MOXA_CP132U 0x1321 #define PCI_DEVICE_ID_MOXA_CP134U 0x1340 #define PCI_DEVICE_ID_MOXA_C168 0x1680 #define PCI_DEVICE_ID_MOXA_CP168U 0x1681 #define PCI_DEVICE_ID_MOXA_CP168EL 0x1682 #define PCI_DEVICE_ID_MOXA_CP204J 0x2040 #define PCI_DEVICE_ID_MOXA_C218 0x2180 #define PCI_DEVICE_ID_MOXA_C320 0x3200 #define PCI_VENDOR_ID_CCD 0x1397 #define PCI_DEVICE_ID_CCD_HFC4S 0x08B4 #define PCI_SUBDEVICE_ID_CCD_PMX2S 0x1234 #define PCI_DEVICE_ID_CCD_HFC8S 0x16B8 #define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 #define PCI_DEVICE_ID_CCD_HFCE1 0x30B1 #define PCI_SUBDEVICE_ID_CCD_SPD4S 0x3136 #define PCI_SUBDEVICE_ID_CCD_SPDE1 0x3137 #define PCI_DEVICE_ID_CCD_B000 0xb000 #define PCI_DEVICE_ID_CCD_B006 0xb006 #define PCI_DEVICE_ID_CCD_B007 0xb007 #define PCI_DEVICE_ID_CCD_B008 0xb008 #define PCI_DEVICE_ID_CCD_B009 0xb009 #define PCI_DEVICE_ID_CCD_B00A 0xb00a #define PCI_DEVICE_ID_CCD_B00B 0xb00b #define PCI_DEVICE_ID_CCD_B00C 0xb00c #define PCI_DEVICE_ID_CCD_B100 0xb100 #define PCI_SUBDEVICE_ID_CCD_IOB4ST 0xB520 #define PCI_SUBDEVICE_ID_CCD_IOB8STR 0xB521 #define PCI_SUBDEVICE_ID_CCD_IOB8ST 0xB522 #define PCI_SUBDEVICE_ID_CCD_IOB1E1 0xB523 #define PCI_SUBDEVICE_ID_CCD_SWYX4S 0xB540 #define PCI_SUBDEVICE_ID_CCD_JH4S20 0xB550 #define PCI_SUBDEVICE_ID_CCD_IOB8ST_1 0xB552 #define PCI_SUBDEVICE_ID_CCD_JHSE1 0xB553 #define PCI_SUBDEVICE_ID_CCD_JH8S 0xB55B #define PCI_SUBDEVICE_ID_CCD_BN4S 0xB560 #define PCI_SUBDEVICE_ID_CCD_BN8S 0xB562 #define PCI_SUBDEVICE_ID_CCD_BNE1 0xB563 #define PCI_SUBDEVICE_ID_CCD_BNE1D 0xB564 #define PCI_SUBDEVICE_ID_CCD_BNE1DP 0xB565 #define PCI_SUBDEVICE_ID_CCD_BN2S 0xB566 #define PCI_SUBDEVICE_ID_CCD_BN1SM 0xB567 #define PCI_SUBDEVICE_ID_CCD_BN4SM 0xB568 #define PCI_SUBDEVICE_ID_CCD_BN2SM 0xB569 #define PCI_SUBDEVICE_ID_CCD_BNE1M 0xB56A #define PCI_SUBDEVICE_ID_CCD_BN8SP 0xB56B #define PCI_SUBDEVICE_ID_CCD_HFC4S 0xB620 #define PCI_SUBDEVICE_ID_CCD_HFC8S 0xB622 #define PCI_DEVICE_ID_CCD_B700 0xb700 #define PCI_DEVICE_ID_CCD_B701 0xb701 #define PCI_SUBDEVICE_ID_CCD_HFCE1 0xC523 #define PCI_SUBDEVICE_ID_CCD_OV2S 0xE884 #define PCI_SUBDEVICE_ID_CCD_OV4S 0xE888 #define PCI_SUBDEVICE_ID_CCD_OV8S 0xE998 #define PCI_VENDOR_ID_EXAR 0x13a8 #define PCI_DEVICE_ID_EXAR_XR17C152 0x0152 #define PCI_DEVICE_ID_EXAR_XR17C154 0x0154 #define PCI_DEVICE_ID_EXAR_XR17C158 0x0158 #define PCI_DEVICE_ID_EXAR_XR17V352 0x0352 #define PCI_DEVICE_ID_EXAR_XR17V354 0x0354 #define PCI_DEVICE_ID_EXAR_XR17V358 0x0358 #define PCI_VENDOR_ID_MICROGATE 0x13c0 #define PCI_VENDOR_ID_3WARE 0x13C1 #define PCI_DEVICE_ID_3WARE_1000 0x1000 #define PCI_DEVICE_ID_3WARE_7000 0x1001 #define PCI_DEVICE_ID_3WARE_9000 0x1002 #define PCI_VENDOR_ID_IOMEGA 0x13ca #define PCI_DEVICE_ID_IOMEGA_BUZ 0x4231 #define PCI_VENDOR_ID_ABOCOM 0x13D1 #define PCI_DEVICE_ID_ABOCOM_2BD1 0x2BD1 #define PCI_VENDOR_ID_SUNDANCE 0x13f0 #define PCI_VENDOR_ID_CMEDIA 0x13f6 #define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100 #define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101 #define PCI_DEVICE_ID_CMEDIA_CM8738 0x0111 #define PCI_DEVICE_ID_CMEDIA_CM8738B 0x0112 #define PCI_VENDOR_ID_ADVANTECH 0x13fe #define PCI_VENDOR_ID_MEILHAUS 0x1402 #define PCI_VENDOR_ID_LAVA 0x1407 #define PCI_DEVICE_ID_LAVA_DSERIAL 0x0100 /* 2x 16550 */ #define PCI_DEVICE_ID_LAVA_QUATRO_A 0x0101 /* 2x 16550, half of 4 port */ #define PCI_DEVICE_ID_LAVA_QUATRO_B 0x0102 /* 2x 16550, half of 4 port */ #define PCI_DEVICE_ID_LAVA_QUATTRO_A 0x0120 /* 2x 16550A, half of 4 port */ #define PCI_DEVICE_ID_LAVA_QUATTRO_B 0x0121 /* 2x 16550A, half of 4 port */ #define PCI_DEVICE_ID_LAVA_OCTO_A 0x0180 /* 4x 16550A, half of 8 port */ #define PCI_DEVICE_ID_LAVA_OCTO_B 0x0181 /* 4x 16550A, half of 8 port */ #define PCI_DEVICE_ID_LAVA_PORT_PLUS 0x0200 /* 2x 16650 */ #define PCI_DEVICE_ID_LAVA_QUAD_A 0x0201 /* 2x 16650, half of 4 port */ #define PCI_DEVICE_ID_LAVA_QUAD_B 0x0202 /* 2x 16650, half of 4 port */ #define PCI_DEVICE_ID_LAVA_SSERIAL 0x0500 /* 1x 16550 */ #define PCI_DEVICE_ID_LAVA_PORT_650 0x0600 /* 1x 16650 */ #define PCI_DEVICE_ID_LAVA_PARALLEL 0x8000 #define PCI_DEVICE_ID_LAVA_DUAL_PAR_A 0x8002 /* The Lava Dual Parallel is */ #define PCI_DEVICE_ID_LAVA_DUAL_PAR_B 0x8003 /* two PCI devices on a card */ #define PCI_DEVICE_ID_LAVA_BOCA_IOPPAR 0x8800 #define PCI_VENDOR_ID_TIMEDIA 0x1409 #define PCI_DEVICE_ID_TIMEDIA_1889 0x7168 #define PCI_VENDOR_ID_ICE 0x1412 #define PCI_DEVICE_ID_ICE_1712 0x1712 #define PCI_DEVICE_ID_VT1724 0x1724 #define PCI_VENDOR_ID_OXSEMI 0x1415 #define PCI_DEVICE_ID_OXSEMI_12PCI840 0x8403 #define PCI_DEVICE_ID_OXSEMI_PCIe840 0xC000 #define PCI_DEVICE_ID_OXSEMI_PCIe840_G 0xC004 #define PCI_DEVICE_ID_OXSEMI_PCIe952_0 0xC100 #define PCI_DEVICE_ID_OXSEMI_PCIe952_0_G 0xC104 #define PCI_DEVICE_ID_OXSEMI_PCIe952_1 0xC110 #define PCI_DEVICE_ID_OXSEMI_PCIe952_1_G 0xC114 #define PCI_DEVICE_ID_OXSEMI_PCIe952_1_U 0xC118 #define PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU 0xC11C #define PCI_DEVICE_ID_OXSEMI_16PCI954 0x9501 #define PCI_DEVICE_ID_OXSEMI_C950 0x950B #define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511 #define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513 #define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 #define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523 #define PCI_SUBDEVICE_ID_OXSEMI_C950 0x0001 #define PCI_VENDOR_ID_CHELSIO 0x1425 #define PCI_VENDOR_ID_EDIMAX 0x1432 #define PCI_VENDOR_ID_ADLINK 0x144a #define PCI_VENDOR_ID_SAMSUNG 0x144d #define PCI_VENDOR_ID_GIGABYTE 0x1458 #define PCI_VENDOR_ID_AMBIT 0x1468 #define PCI_VENDOR_ID_MYRICOM 0x14c1 #define PCI_VENDOR_ID_MEDIATEK 0x14c3 #define PCI_DEVICE_ID_MEDIATEK_7629 0x7629 #define PCI_VENDOR_ID_TITAN 0x14D2 #define PCI_DEVICE_ID_TITAN_010L 0x8001 #define PCI_DEVICE_ID_TITAN_100L 0x8010 #define PCI_DEVICE_ID_TITAN_110L 0x8011 #define PCI_DEVICE_ID_TITAN_200L 0x8020 #define PCI_DEVICE_ID_TITAN_210L 0x8021 #define PCI_DEVICE_ID_TITAN_400L 0x8040 #define PCI_DEVICE_ID_TITAN_800L 0x8080 #define PCI_DEVICE_ID_TITAN_100 0xA001 #define PCI_DEVICE_ID_TITAN_200 0xA005 #define PCI_DEVICE_ID_TITAN_400 0xA003 #define PCI_DEVICE_ID_TITAN_800B 0xA004 #define PCI_VENDOR_ID_PANACOM 0x14d4 #define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400 #define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402 #define PCI_VENDOR_ID_SIPACKETS 0x14d9 #define PCI_DEVICE_ID_SP1011 0x0010 #define PCI_VENDOR_ID_AFAVLAB 0x14db #define PCI_DEVICE_ID_AFAVLAB_P028 0x2180 #define PCI_DEVICE_ID_AFAVLAB_P030 0x2182 #define PCI_SUBDEVICE_ID_AFAVLAB_P061 0x2150 #define PCI_VENDOR_ID_AMPLICON 0x14dc #define PCI_VENDOR_ID_BCM_GVC 0x14a4 #define PCI_VENDOR_ID_BROADCOM 0x14e4 #define PCI_DEVICE_ID_TIGON3_5752 0x1600 #define PCI_DEVICE_ID_TIGON3_5752M 0x1601 #define PCI_DEVICE_ID_NX2_5709 0x1639 #define PCI_DEVICE_ID_NX2_5709S 0x163a #define PCI_DEVICE_ID_TIGON3_5700 0x1644 #define PCI_DEVICE_ID_TIGON3_5701 0x1645 #define PCI_DEVICE_ID_TIGON3_5702 0x1646 #define PCI_DEVICE_ID_TIGON3_5703 0x1647 #define PCI_DEVICE_ID_TIGON3_5704 0x1648 #define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649 #define PCI_DEVICE_ID_NX2_5706 0x164a #define PCI_DEVICE_ID_NX2_5708 0x164c #define PCI_DEVICE_ID_TIGON3_5702FE 0x164d #define PCI_DEVICE_ID_NX2_57710 0x164e #define PCI_DEVICE_ID_NX2_57711 0x164f #define PCI_DEVICE_ID_NX2_57711E 0x1650 #define PCI_DEVICE_ID_TIGON3_5705 0x1653 #define PCI_DEVICE_ID_TIGON3_5705_2 0x1654 #define PCI_DEVICE_ID_TIGON3_5719 0x1657 #define PCI_DEVICE_ID_TIGON3_5721 0x1659 #define PCI_DEVICE_ID_TIGON3_5722 0x165a #define PCI_DEVICE_ID_TIGON3_5723 0x165b #define PCI_DEVICE_ID_TIGON3_5705M 0x165d #define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e #define PCI_DEVICE_ID_NX2_57712 0x1662 #define PCI_DEVICE_ID_NX2_57712E 0x1663 #define PCI_DEVICE_ID_NX2_57712_MF 0x1663 #define PCI_DEVICE_ID_TIGON3_5714 0x1668 #define PCI_DEVICE_ID_TIGON3_5714S 0x1669 #define PCI_DEVICE_ID_TIGON3_5780 0x166a #define PCI_DEVICE_ID_TIGON3_5780S 0x166b #define PCI_DEVICE_ID_TIGON3_5705F 0x166e #define PCI_DEVICE_ID_NX2_57712_VF 0x166f #define PCI_DEVICE_ID_TIGON3_5754M 0x1672 #define PCI_DEVICE_ID_TIGON3_5755M 0x1673 #define PCI_DEVICE_ID_TIGON3_5756 0x1674 #define PCI_DEVICE_ID_TIGON3_5750 0x1676 #define PCI_DEVICE_ID_TIGON3_5751 0x1677 #define PCI_DEVICE_ID_TIGON3_5715 0x1678 #define PCI_DEVICE_ID_TIGON3_5715S 0x1679 #define PCI_DEVICE_ID_TIGON3_5754 0x167a #define PCI_DEVICE_ID_TIGON3_5755 0x167b #define PCI_DEVICE_ID_TIGON3_5751M 0x167d #define PCI_DEVICE_ID_TIGON3_5751F 0x167e #define PCI_DEVICE_ID_TIGON3_5787F 0x167f #define PCI_DEVICE_ID_TIGON3_5761E 0x1680 #define PCI_DEVICE_ID_TIGON3_5761 0x1681 #define PCI_DEVICE_ID_TIGON3_5764 0x1684 #define PCI_DEVICE_ID_NX2_57800 0x168a #define PCI_DEVICE_ID_NX2_57840 0x168d #define PCI_DEVICE_ID_NX2_57810 0x168e #define PCI_DEVICE_ID_TIGON3_5787M 0x1693 #define PCI_DEVICE_ID_TIGON3_5782 0x1696 #define PCI_DEVICE_ID_TIGON3_5784 0x1698 #define PCI_DEVICE_ID_TIGON3_5786 0x169a #define PCI_DEVICE_ID_TIGON3_5787 0x169b #define PCI_DEVICE_ID_TIGON3_5788 0x169c #define PCI_DEVICE_ID_TIGON3_5789 0x169d #define PCI_DEVICE_ID_NX2_57840_4_10 0x16a1 #define PCI_DEVICE_ID_NX2_57840_2_20 0x16a2 #define PCI_DEVICE_ID_NX2_57840_MF 0x16a4 #define PCI_DEVICE_ID_NX2_57800_MF 0x16a5 #define PCI_DEVICE_ID_TIGON3_5702X 0x16a6 #define PCI_DEVICE_ID_TIGON3_5703X 0x16a7 #define PCI_DEVICE_ID_TIGON3_5704S 0x16a8 #define PCI_DEVICE_ID_NX2_57800_VF 0x16a9 #define PCI_DEVICE_ID_NX2_5706S 0x16aa #define PCI_DEVICE_ID_NX2_5708S 0x16ac #define PCI_DEVICE_ID_NX2_57840_VF 0x16ad #define PCI_DEVICE_ID_NX2_57810_MF 0x16ae #define PCI_DEVICE_ID_NX2_57810_VF 0x16af #define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6 #define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7 #define PCI_DEVICE_ID_TIGON3_5781 0x16dd #define PCI_DEVICE_ID_TIGON3_5753 0x16f7 #define PCI_DEVICE_ID_TIGON3_5753M 0x16fd #define PCI_DEVICE_ID_TIGON3_5753F 0x16fe #define PCI_DEVICE_ID_TIGON3_5901 0x170d #define PCI_DEVICE_ID_BCM4401B1 0x170c #define PCI_DEVICE_ID_TIGON3_5901_2 0x170e #define PCI_DEVICE_ID_TIGON3_5906 0x1712 #define PCI_DEVICE_ID_TIGON3_5906M 0x1713 #define PCI_DEVICE_ID_BCM4401 0x4401 #define PCI_DEVICE_ID_BCM4401B0 0x4402 #define PCI_VENDOR_ID_TOPIC 0x151f #define PCI_DEVICE_ID_TOPIC_TP560 0x0000 #define PCI_VENDOR_ID_MAINPINE 0x1522 #define PCI_DEVICE_ID_MAINPINE_PBRIDGE 0x0100 #define PCI_VENDOR_ID_ENE 0x1524 #define PCI_DEVICE_ID_ENE_CB710_FLASH 0x0510 #define PCI_DEVICE_ID_ENE_CB712_SD 0x0550 #define PCI_DEVICE_ID_ENE_CB712_SD_2 0x0551 #define PCI_DEVICE_ID_ENE_CB714_SD 0x0750 #define PCI_DEVICE_ID_ENE_CB714_SD_2 0x0751 #define PCI_DEVICE_ID_ENE_1211 0x1211 #define PCI_DEVICE_ID_ENE_1225 0x1225 #define PCI_DEVICE_ID_ENE_1410 0x1410 #define PCI_DEVICE_ID_ENE_710 0x1411 #define PCI_DEVICE_ID_ENE_712 0x1412 #define PCI_DEVICE_ID_ENE_1420 0x1420 #define PCI_DEVICE_ID_ENE_720 0x1421 #define PCI_DEVICE_ID_ENE_722 0x1422 #define PCI_SUBVENDOR_ID_PERLE 0x155f #define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001 #define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010 #define PCI_VENDOR_ID_SYBA 0x1592 #define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 #define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 #define PCI_VENDOR_ID_MORETON 0x15aa #define PCI_DEVICE_ID_RASTEL_2PORT 0x2000 #define PCI_VENDOR_ID_VMWARE 0x15ad #define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07b0 #define PCI_VENDOR_ID_ZOLTRIX 0x15b0 #define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0 #define PCI_VENDOR_ID_MELLANOX 0x15b3 #define PCI_DEVICE_ID_MELLANOX_CONNECTX3 0x1003 #define PCI_DEVICE_ID_MELLANOX_CONNECTX3_PRO 0x1007 #define PCI_DEVICE_ID_MELLANOX_CONNECTIB 0x1011 #define PCI_DEVICE_ID_MELLANOX_CONNECTX4 0x1013 #define PCI_DEVICE_ID_MELLANOX_CONNECTX4_LX 0x1015 #define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 #define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 #define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 #define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 #define PCI_DEVICE_ID_MELLANOX_HERMON_SDR 0x6340 #define PCI_DEVICE_ID_MELLANOX_HERMON_DDR 0x634a #define PCI_DEVICE_ID_MELLANOX_HERMON_QDR 0x6354 #define PCI_DEVICE_ID_MELLANOX_HERMON_EN 0x6368 #define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN 0x6372 #define PCI_DEVICE_ID_MELLANOX_HERMON_DDR_GEN2 0x6732 #define PCI_DEVICE_ID_MELLANOX_HERMON_QDR_GEN2 0x673c #define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_5_GEN2 0x6746 #define PCI_DEVICE_ID_MELLANOX_HERMON_EN_GEN2 0x6750 #define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_T_GEN2 0x675a #define PCI_DEVICE_ID_MELLANOX_CONNECTX_EN_GEN2 0x6764 #define PCI_DEVICE_ID_MELLANOX_CONNECTX2 0x676e #define PCI_VENDOR_ID_DFI 0x15bd #define PCI_VENDOR_ID_QUICKNET 0x15e2 #define PCI_DEVICE_ID_QUICKNET_XJ 0x0500 /* * ADDI-DATA GmbH communication cards <info@addi-data.com> */ #define PCI_VENDOR_ID_ADDIDATA 0x15B8 #define PCI_DEVICE_ID_ADDIDATA_APCI7500 0x7000 #define PCI_DEVICE_ID_ADDIDATA_APCI7420 0x7001 #define PCI_DEVICE_ID_ADDIDATA_APCI7300 0x7002 #define PCI_DEVICE_ID_ADDIDATA_APCI7500_2 0x7009 #define PCI_DEVICE_ID_ADDIDATA_APCI7420_2 0x700A #define PCI_DEVICE_ID_ADDIDATA_APCI7300_2 0x700B #define PCI_DEVICE_ID_ADDIDATA_APCI7500_3 0x700C #define PCI_DEVICE_ID_ADDIDATA_APCI7420_3 0x700D #define PCI_DEVICE_ID_ADDIDATA_APCI7300_3 0x700E #define PCI_DEVICE_ID_ADDIDATA_APCI7800_3 0x700F #define PCI_DEVICE_ID_ADDIDATA_APCIe7300 0x7010 #define PCI_DEVICE_ID_ADDIDATA_APCIe7420 0x7011 #define PCI_DEVICE_ID_ADDIDATA_APCIe7500 0x7012 #define PCI_DEVICE_ID_ADDIDATA_APCIe7800 0x7013 #define PCI_VENDOR_ID_PDC 0x15e9 #define PCI_VENDOR_ID_FARSITE 0x1619 #define PCI_DEVICE_ID_FARSITE_T2P 0x0400 #define PCI_DEVICE_ID_FARSITE_T4P 0x0440 #define PCI_DEVICE_ID_FARSITE_T1U 0x0610 #define PCI_DEVICE_ID_FARSITE_T2U 0x0620 #define PCI_DEVICE_ID_FARSITE_T4U 0x0640 #define PCI_DEVICE_ID_FARSITE_TE1 0x1610 #define PCI_DEVICE_ID_FARSITE_TE1C 0x1612 #define PCI_VENDOR_ID_ARIMA 0x161f #define PCI_VENDOR_ID_BROCADE 0x1657 #define PCI_DEVICE_ID_BROCADE_CT 0x0014 #define PCI_DEVICE_ID_BROCADE_FC_8G1P 0x0017 #define PCI_DEVICE_ID_BROCADE_CT_FC 0x0021 #define PCI_VENDOR_ID_SIBYTE 0x166d #define PCI_DEVICE_ID_BCM1250_PCI 0x0001 #define PCI_DEVICE_ID_BCM1250_HT 0x0002 #define PCI_VENDOR_ID_ATHEROS 0x168c #define PCI_VENDOR_ID_NETCELL 0x169c #define PCI_DEVICE_ID_REVOLUTION 0x0044 #define PCI_VENDOR_ID_CENATEK 0x16CA #define PCI_DEVICE_ID_CENATEK_IDE 0x0001 #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf #define PCI_DEVICE_ID_SYNOPSYS_EDDA 0xedda #define PCI_VENDOR_ID_USR 0x16ec #define PCI_VENDOR_ID_VITESSE 0x1725 #define PCI_DEVICE_ID_VITESSE_VSC7174 0x7174 #define PCI_VENDOR_ID_LINKSYS 0x1737 #define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 #define PCI_VENDOR_ID_ALTIMA 0x173b #define PCI_DEVICE_ID_ALTIMA_AC1000 0x03e8 #define PCI_DEVICE_ID_ALTIMA_AC1001 0x03e9 #define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea #define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb #define PCI_VENDOR_ID_CAVIUM 0x177d #define PCI_VENDOR_ID_TECHWELL 0x1797 #define PCI_DEVICE_ID_TECHWELL_6800 0x6800 #define PCI_DEVICE_ID_TECHWELL_6801 0x6801 #define PCI_DEVICE_ID_TECHWELL_6804 0x6804 #define PCI_DEVICE_ID_TECHWELL_6816_1 0x6810 #define PCI_DEVICE_ID_TECHWELL_6816_2 0x6811 #define PCI_DEVICE_ID_TECHWELL_6816_3 0x6812 #define PCI_DEVICE_ID_TECHWELL_6816_4 0x6813 #define PCI_VENDOR_ID_BELKIN 0x1799 #define PCI_DEVICE_ID_BELKIN_F5D7010V7 0x701f #define PCI_VENDOR_ID_RDC 0x17f3 #define PCI_DEVICE_ID_RDC_R6020 0x6020 #define PCI_DEVICE_ID_RDC_R6030 0x6030 #define PCI_DEVICE_ID_RDC_R6040 0x6040 #define PCI_DEVICE_ID_RDC_R6060 0x6060 #define PCI_DEVICE_ID_RDC_R6061 0x6061 #define PCI_DEVICE_ID_RDC_D1010 0x1010 #define PCI_VENDOR_ID_GLI 0x17a0 #define PCI_VENDOR_ID_LENOVO 0x17aa #define PCI_VENDOR_ID_QCOM 0x17cb #define PCI_VENDOR_ID_CDNS 0x17cd #define PCI_VENDOR_ID_ARECA 0x17d3 #define PCI_DEVICE_ID_ARECA_1110 0x1110 #define PCI_DEVICE_ID_ARECA_1120 0x1120 #define PCI_DEVICE_ID_ARECA_1130 0x1130 #define PCI_DEVICE_ID_ARECA_1160 0x1160 #define PCI_DEVICE_ID_ARECA_1170 0x1170 #define PCI_DEVICE_ID_ARECA_1200 0x1200 #define PCI_DEVICE_ID_ARECA_1201 0x1201 #define PCI_DEVICE_ID_ARECA_1202 0x1202 #define PCI_DEVICE_ID_ARECA_1210 0x1210 #define PCI_DEVICE_ID_ARECA_1220 0x1220 #define PCI_DEVICE_ID_ARECA_1230 0x1230 #define PCI_DEVICE_ID_ARECA_1260 0x1260 #define PCI_DEVICE_ID_ARECA_1270 0x1270 #define PCI_DEVICE_ID_ARECA_1280 0x1280 #define PCI_DEVICE_ID_ARECA_1380 0x1380 #define PCI_DEVICE_ID_ARECA_1381 0x1381 #define PCI_DEVICE_ID_ARECA_1680 0x1680 #define PCI_DEVICE_ID_ARECA_1681 0x1681 #define PCI_VENDOR_ID_S2IO 0x17d5 #define PCI_DEVICE_ID_S2IO_WIN 0x5731 #define PCI_DEVICE_ID_S2IO_UNI 0x5831 #define PCI_DEVICE_ID_HERC_WIN 0x5732 #define PCI_DEVICE_ID_HERC_UNI 0x5832 #define PCI_VENDOR_ID_SITECOM 0x182d #define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 #define PCI_VENDOR_ID_TOPSPIN 0x1867 #define PCI_VENDOR_ID_COMMTECH 0x18f7 #define PCI_VENDOR_ID_SILAN 0x1904 #define PCI_VENDOR_ID_RENESAS 0x1912 #define PCI_DEVICE_ID_RENESAS_SH7781 0x0001 #define PCI_DEVICE_ID_RENESAS_SH7780 0x0002 #define PCI_DEVICE_ID_RENESAS_SH7763 0x0004 #define PCI_DEVICE_ID_RENESAS_SH7785 0x0007 #define PCI_DEVICE_ID_RENESAS_SH7786 0x0010 #define PCI_VENDOR_ID_SOLARFLARE 0x1924 #define PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0 0x0703 #define PCI_DEVICE_ID_SOLARFLARE_SFC4000A_1 0x6703 #define PCI_DEVICE_ID_SOLARFLARE_SFC4000B 0x0710 #define PCI_VENDOR_ID_TDI 0x192E #define PCI_DEVICE_ID_TDI_EHCI 0x0101 #define PCI_VENDOR_ID_FREESCALE 0x1957 /* duplicate: NXP */ #define PCI_VENDOR_ID_NXP 0x1957 /* duplicate: FREESCALE */ #define PCI_DEVICE_ID_MPC8308 0xc006 #define PCI_DEVICE_ID_MPC8315E 0x00b4 #define PCI_DEVICE_ID_MPC8315 0x00b5 #define PCI_DEVICE_ID_MPC8314E 0x00b6 #define PCI_DEVICE_ID_MPC8314 0x00b7 #define PCI_DEVICE_ID_MPC8378E 0x00c4 #define PCI_DEVICE_ID_MPC8378 0x00c5 #define PCI_DEVICE_ID_MPC8377E 0x00c6 #define PCI_DEVICE_ID_MPC8377 0x00c7 #define PCI_DEVICE_ID_MPC8548E 0x0012 #define PCI_DEVICE_ID_MPC8548 0x0013 #define PCI_DEVICE_ID_MPC8543E 0x0014 #define PCI_DEVICE_ID_MPC8543 0x0015 #define PCI_DEVICE_ID_MPC8547E 0x0018 #define PCI_DEVICE_ID_MPC8545E 0x0019 #define PCI_DEVICE_ID_MPC8545 0x001a #define PCI_DEVICE_ID_MPC8569E 0x0061 #define PCI_DEVICE_ID_MPC8569 0x0060 #define PCI_DEVICE_ID_MPC8568E 0x0020 #define PCI_DEVICE_ID_MPC8568 0x0021 #define PCI_DEVICE_ID_MPC8567E 0x0022 #define PCI_DEVICE_ID_MPC8567 0x0023 #define PCI_DEVICE_ID_MPC8533E 0x0030 #define PCI_DEVICE_ID_MPC8533 0x0031 #define PCI_DEVICE_ID_MPC8544E 0x0032 #define PCI_DEVICE_ID_MPC8544 0x0033 #define PCI_DEVICE_ID_MPC8572E 0x0040 #define PCI_DEVICE_ID_MPC8572 0x0041 #define PCI_DEVICE_ID_MPC8536E 0x0050 #define PCI_DEVICE_ID_MPC8536 0x0051 #define PCI_DEVICE_ID_P2020E 0x0070 #define PCI_DEVICE_ID_P2020 0x0071 #define PCI_DEVICE_ID_P2010E 0x0078 #define PCI_DEVICE_ID_P2010 0x0079 #define PCI_DEVICE_ID_P1020E 0x0100 #define PCI_DEVICE_ID_P1020 0x0101 #define PCI_DEVICE_ID_P1021E 0x0102 #define PCI_DEVICE_ID_P1021 0x0103 #define PCI_DEVICE_ID_P1011E 0x0108 #define PCI_DEVICE_ID_P1011 0x0109 #define PCI_DEVICE_ID_P1022E 0x0110 #define PCI_DEVICE_ID_P1022 0x0111 #define PCI_DEVICE_ID_P1013E 0x0118 #define PCI_DEVICE_ID_P1013 0x0119 #define PCI_DEVICE_ID_P4080E 0x0400 #define PCI_DEVICE_ID_P4080 0x0401 #define PCI_DEVICE_ID_P4040E 0x0408 #define PCI_DEVICE_ID_P4040 0x0409 #define PCI_DEVICE_ID_P2040E 0x0410 #define PCI_DEVICE_ID_P2040 0x0411 #define PCI_DEVICE_ID_P3041E 0x041E #define PCI_DEVICE_ID_P3041 0x041F #define PCI_DEVICE_ID_P5020E 0x0420 #define PCI_DEVICE_ID_P5020 0x0421 #define PCI_DEVICE_ID_P5010E 0x0428 #define PCI_DEVICE_ID_P5010 0x0429 #define PCI_DEVICE_ID_MPC8641 0x7010 #define PCI_DEVICE_ID_MPC8641D 0x7011 #define PCI_DEVICE_ID_MPC8610 0x7018 #define PCI_VENDOR_ID_PASEMI 0x1959 #define PCI_VENDOR_ID_ATTANSIC 0x1969 #define PCI_DEVICE_ID_ATTANSIC_L1 0x1048 #define PCI_DEVICE_ID_ATTANSIC_L2 0x2048 #define PCI_VENDOR_ID_JMICRON 0x197B #define PCI_DEVICE_ID_JMICRON_JMB360 0x2360 #define PCI_DEVICE_ID_JMICRON_JMB361 0x2361 #define PCI_DEVICE_ID_JMICRON_JMB362 0x2362 #define PCI_DEVICE_ID_JMICRON_JMB363 0x2363 #define PCI_DEVICE_ID_JMICRON_JMB364 0x2364 #define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 #define PCI_DEVICE_ID_JMICRON_JMB368 0x2368 #define PCI_DEVICE_ID_JMICRON_JMB369 0x2369 #define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381 #define PCI_DEVICE_ID_JMICRON_JMB38X_MMC 0x2382 #define PCI_DEVICE_ID_JMICRON_JMB38X_MS 0x2383 #define PCI_DEVICE_ID_JMICRON_JMB385_MS 0x2388 #define PCI_DEVICE_ID_JMICRON_JMB388_SD 0x2391 #define PCI_DEVICE_ID_JMICRON_JMB388_ESD 0x2392 #define PCI_DEVICE_ID_JMICRON_JMB390_MS 0x2393 #define PCI_VENDOR_ID_KORENIX 0x1982 #define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600 #define PCI_DEVICE_ID_KORENIX_JETCARDF1 0x16ff #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700 #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff #define PCI_VENDOR_ID_HUAWEI 0x19e5 #define PCI_VENDOR_ID_NETRONOME 0x19ee #define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000 #define PCI_DEVICE_ID_NETRONOME_NFP5000 0x5000 #define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000 #define PCI_DEVICE_ID_NETRONOME_NFP6000_VF 0x6003 #define PCI_VENDOR_ID_QMI 0x1a32 #define PCI_VENDOR_ID_AZWAVE 0x1a3b #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 #define PCI_SUBDEVICE_ID_QEMU 0x1100 #define PCI_VENDOR_ID_ASMEDIA 0x1b21 #define PCI_VENDOR_ID_REDHAT 0x1b36 #define PCI_VENDOR_ID_SILICOM_DENMARK 0x1c2c #define PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS 0x1c36 #define PCI_VENDOR_ID_CIRCUITCO 0x1cc8 #define PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD 0x0001 #define PCI_VENDOR_ID_AMAZON 0x1d0f #define PCI_VENDOR_ID_ZHAOXIN 0x1d17 #define PCI_VENDOR_ID_HYGON 0x1d94 #define PCI_VENDOR_ID_HXT 0x1dbf #define PCI_VENDOR_ID_TEKRAM 0x1de1 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 #define PCI_VENDOR_ID_TEHUTI 0x1fc9 #define PCI_DEVICE_ID_TEHUTI_3009 0x3009 #define PCI_DEVICE_ID_TEHUTI_3010 0x3010 #define PCI_DEVICE_ID_TEHUTI_3014 0x3014 #define PCI_VENDOR_ID_SUNIX 0x1fd4 #define PCI_DEVICE_ID_SUNIX_1999 0x1999 #define PCI_VENDOR_ID_HINT 0x3388 #define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013 #define PCI_VENDOR_ID_3DLABS 0x3d3d #define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 #define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 #define PCI_VENDOR_ID_NETXEN 0x4040 #define PCI_DEVICE_ID_NX2031_10GXSR 0x0001 #define PCI_DEVICE_ID_NX2031_10GCX4 0x0002 #define PCI_DEVICE_ID_NX2031_4GCU 0x0003 #define PCI_DEVICE_ID_NX2031_IMEZ 0x0004 #define PCI_DEVICE_ID_NX2031_HMEZ 0x0005 #define PCI_DEVICE_ID_NX2031_XG_MGMT 0x0024 #define PCI_DEVICE_ID_NX2031_XG_MGMT2 0x0025 #define PCI_DEVICE_ID_NX3031 0x0100 #define PCI_VENDOR_ID_AKS 0x416c #define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 #define PCI_VENDOR_ID_ACCESSIO 0x494f #define PCI_DEVICE_ID_ACCESSIO_WDG_CSM 0x22c0 #define PCI_VENDOR_ID_S3 0x5333 #define PCI_DEVICE_ID_S3_TRIO 0x8811 #define PCI_DEVICE_ID_S3_868 0x8880 #define PCI_DEVICE_ID_S3_968 0x88f0 #define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 #define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 #define PCI_VENDOR_ID_DUNORD 0x5544 #define PCI_DEVICE_ID_DUNORD_I3000 0x0001 #define PCI_VENDOR_ID_DCI 0x6666 #define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 #define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 #define PCI_DEVICE_ID_DCI_PCCOM2 0x0004 #define PCI_VENDOR_ID_GLENFLY 0x6766 #define PCI_VENDOR_ID_INTEL 0x8086 #define PCI_DEVICE_ID_INTEL_EESSC 0x0008 #define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320 #define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321 #define PCI_DEVICE_ID_INTEL_PXH_0 0x0329 #define PCI_DEVICE_ID_INTEL_PXH_1 0x032A #define PCI_DEVICE_ID_INTEL_PXHV 0x032C #define PCI_DEVICE_ID_INTEL_80332_0 0x0330 #define PCI_DEVICE_ID_INTEL_80332_1 0x0332 #define PCI_DEVICE_ID_INTEL_80333_0 0x0370 #define PCI_DEVICE_ID_INTEL_80333_1 0x0372 #define PCI_DEVICE_ID_INTEL_QAT_DH895XCC 0x0435 #define PCI_DEVICE_ID_INTEL_QAT_DH895XCC_VF 0x0443 #define PCI_DEVICE_ID_INTEL_82375 0x0482 #define PCI_DEVICE_ID_INTEL_82424 0x0483 #define PCI_DEVICE_ID_INTEL_82378 0x0484 #define PCI_DEVICE_ID_INTEL_82425 0x0486 #define PCI_DEVICE_ID_INTEL_MRST_SD0 0x0807 #define PCI_DEVICE_ID_INTEL_MRST_SD1 0x0808 #define PCI_DEVICE_ID_INTEL_MFD_SD 0x0820 #define PCI_DEVICE_ID_INTEL_MFD_SDIO1 0x0821 #define PCI_DEVICE_ID_INTEL_MFD_SDIO2 0x0822 #define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823 #define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824 #define PCI_DEVICE_ID_INTEL_MRST_SD2 0x084F #define PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB 0x095E #define PCI_DEVICE_ID_INTEL_I960 0x0960 #define PCI_DEVICE_ID_INTEL_I960RM 0x0962 #define PCI_DEVICE_ID_INTEL_DSA_SPR0 0x0b25 #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60 #define PCI_DEVICE_ID_INTEL_IAX_SPR0 0x0cfe #define PCI_DEVICE_ID_INTEL_8257X_SOL 0x1062 #define PCI_DEVICE_ID_INTEL_82573E_SOL 0x1085 #define PCI_DEVICE_ID_INTEL_82573L_SOL 0x108F #define PCI_DEVICE_ID_INTEL_82815_MC 0x1130 #define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 #define PCI_DEVICE_ID_INTEL_7505_0 0x2550 #define PCI_DEVICE_ID_INTEL_7205_0 0x255d #define PCI_DEVICE_ID_INTEL_82437 0x122d #define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e #define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 #define PCI_DEVICE_ID_INTEL_82371MX 0x1234 #define PCI_DEVICE_ID_INTEL_82441 0x1237 #define PCI_DEVICE_ID_INTEL_82380FB 0x124b #define PCI_DEVICE_ID_INTEL_82439 0x1250 #define PCI_DEVICE_ID_INTEL_LIGHT_RIDGE 0x1513 /* Tbt 1 Gen 1 */ #define PCI_DEVICE_ID_INTEL_EAGLE_RIDGE 0x151a #define PCI_DEVICE_ID_INTEL_LIGHT_PEAK 0x151b #define PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C 0x1547 /* Tbt 1 Gen 2 */ #define PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C 0x1548 #define PCI_DEVICE_ID_INTEL_PORT_RIDGE 0x1549 #define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_NHI 0x1566 /* Tbt 1 Gen 3 */ #define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE 0x1567 #define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_NHI 0x1568 #define PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE 0x1569 #define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI 0x156a /* Thunderbolt 2 */ #define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE 0x156b #define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI 0x156c #define PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE 0x156d #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI 0x1575 /* Thunderbolt 3 */ #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE 0x1576 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI 0x1577 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE 0x1578 #define PCI_DEVICE_ID_INTEL_80960_RP 0x1960 #define PCI_DEVICE_ID_INTEL_QAT_C3XXX 0x19e2 #define PCI_DEVICE_ID_INTEL_QAT_C3XXX_VF 0x19e3 #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40 #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI 0x1e31 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e40 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f #define PCI_DEVICE_ID_INTEL_VMD_201D 0x201d #define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN 0x2310 #define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX 0x231f #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 #define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 #define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 #define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416 #define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418 #define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420 #define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421 #define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423 #define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425 #define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426 #define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428 #define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440 #define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443 #define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445 #define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448 #define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a #define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b #define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c #define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e #define PCI_DEVICE_ID_INTEL_82801E_0 0x2450 #define PCI_DEVICE_ID_INTEL_82801E_11 0x245b #define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 #define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 #define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485 #define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486 #define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a #define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b #define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c #define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0 #define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1 #define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2 #define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3 #define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5 #define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6 #define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9 #define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca #define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb #define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc #define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 #define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1 #define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 #define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5 #define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6 #define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db #define PCI_DEVICE_ID_INTEL_82801EB_12 0x24dc #define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd #define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 #define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 #define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 #define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 #define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab #define PCI_DEVICE_ID_INTEL_ESB_10 0x25ac #define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 #define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 #define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 #define PCI_DEVICE_ID_INTEL_82860_HB 0x2531 #define PCI_DEVICE_ID_INTEL_E7501_MCH 0x254c #define PCI_DEVICE_ID_INTEL_82845G_HB 0x2560 #define PCI_DEVICE_ID_INTEL_82845G_IG 0x2562 #define PCI_DEVICE_ID_INTEL_82865_HB 0x2570 #define PCI_DEVICE_ID_INTEL_82865_IG 0x2572 #define PCI_DEVICE_ID_INTEL_82875_HB 0x2578 #define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580 #define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582 #define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590 #define PCI_DEVICE_ID_INTEL_82915GM_IG 0x2592 #define PCI_DEVICE_ID_INTEL_5000_ERR 0x25F0 #define PCI_DEVICE_ID_INTEL_5000_FBD0 0x25F5 #define PCI_DEVICE_ID_INTEL_5000_FBD1 0x25F6 #define PCI_DEVICE_ID_INTEL_82945G_HB 0x2770 #define PCI_DEVICE_ID_INTEL_82945G_IG 0x2772 #define PCI_DEVICE_ID_INTEL_3000_HB 0x2778 #define PCI_DEVICE_ID_INTEL_82945GM_HB 0x27A0 #define PCI_DEVICE_ID_INTEL_82945GM_IG 0x27A2 #define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 #define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 #define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642 #define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a #define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d #define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e #define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f #define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670 #define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698 #define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b #define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e #define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8 #define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9 #define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 #define PCI_DEVICE_ID_INTEL_TGP_LPC 0x27bc #define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd #define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da #define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd #define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de #define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df #define PCI_DEVICE_ID_INTEL_ICH8_0 0x2810 #define PCI_DEVICE_ID_INTEL_ICH8_1 0x2811 #define PCI_DEVICE_ID_INTEL_ICH8_2 0x2812 #define PCI_DEVICE_ID_INTEL_ICH8_3 0x2814 #define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815 #define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e #define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850 #define PCI_DEVICE_ID_INTEL_VMD_28C0 0x28c0 #define PCI_DEVICE_ID_INTEL_ICH9_0 0x2910 #define PCI_DEVICE_ID_INTEL_ICH9_1 0x2917 #define PCI_DEVICE_ID_INTEL_ICH9_2 0x2912 #define PCI_DEVICE_ID_INTEL_ICH9_3 0x2913 #define PCI_DEVICE_ID_INTEL_ICH9_4 0x2914 #define PCI_DEVICE_ID_INTEL_ICH9_5 0x2919 #define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930 #define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916 #define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918 #define PCI_DEVICE_ID_INTEL_I7_MCR 0x2c18 #define PCI_DEVICE_ID_INTEL_I7_MC_TAD 0x2c19 #define PCI_DEVICE_ID_INTEL_I7_MC_RAS 0x2c1a #define PCI_DEVICE_ID_INTEL_I7_MC_TEST 0x2c1c #define PCI_DEVICE_ID_INTEL_I7_MC_CH0_CTRL 0x2c20 #define PCI_DEVICE_ID_INTEL_I7_MC_CH0_ADDR 0x2c21 #define PCI_DEVICE_ID_INTEL_I7_MC_CH0_RANK 0x2c22 #define PCI_DEVICE_ID_INTEL_I7_MC_CH0_TC 0x2c23 #define PCI_DEVICE_ID_INTEL_I7_MC_CH1_CTRL 0x2c28 #define PCI_DEVICE_ID_INTEL_I7_MC_CH1_ADDR 0x2c29 #define PCI_DEVICE_ID_INTEL_I7_MC_CH1_RANK 0x2c2a #define PCI_DEVICE_ID_INTEL_I7_MC_CH1_TC 0x2c2b #define PCI_DEVICE_ID_INTEL_I7_MC_CH2_CTRL 0x2c30 #define PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR 0x2c31 #define PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK 0x2c32 #define PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC 0x2c33 #define PCI_DEVICE_ID_INTEL_I7_NONCORE 0x2c41 #define PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT 0x2c40 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE 0x2c50 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT 0x2c51 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2 0x2c70 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_SAD 0x2c81 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0 0x2c90 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_PHY0 0x2c91 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR 0x2c98 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD 0x2c99 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST 0x2c9C #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL 0x2ca0 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR 0x2ca1 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK 0x2ca2 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC 0x2ca3 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL 0x2ca8 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR 0x2ca9 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK 0x2caa #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC 0x2cab #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2 0x2d98 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2 0x2d99 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2 0x2d9a #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2 0x2d9c #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2 0x2da0 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2 0x2da1 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2 0x2da2 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2 0x2da3 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2 0x2da8 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2 0x2da9 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2 0x2daa #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2 0x2dab #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2 0x2db0 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2 0x2db1 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2 0x2db2 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2 0x2db3 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 #define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429 #define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a #define PCI_DEVICE_ID_INTEL_IOAT_TBG6 0x342b #define PCI_DEVICE_ID_INTEL_IOAT_TBG7 0x342c #define PCI_DEVICE_ID_INTEL_X58_HUB_MGMT 0x342e #define PCI_DEVICE_ID_INTEL_IOAT_TBG0 0x3430 #define PCI_DEVICE_ID_INTEL_IOAT_TBG1 0x3431 #define PCI_DEVICE_ID_INTEL_IOAT_TBG2 0x3432 #define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433 #define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 #define PCI_DEVICE_ID_INTEL_82854_HB 0x358c #define PCI_DEVICE_ID_INTEL_82854_IG 0x358e #define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 #define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582 #define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590 #define PCI_DEVICE_ID_INTEL_E7320_MCH 0x3592 #define PCI_DEVICE_ID_INTEL_MCH_PA 0x3595 #define PCI_DEVICE_ID_INTEL_MCH_PA1 0x3596 #define PCI_DEVICE_ID_INTEL_MCH_PB 0x3597 #define PCI_DEVICE_ID_INTEL_MCH_PB1 0x3598 #define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599 #define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a #define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e #define PCI_DEVICE_ID_INTEL_I7300_MCH_ERR 0x360c #define PCI_DEVICE_ID_INTEL_I7300_MCH_FB0 0x360f #define PCI_DEVICE_ID_INTEL_I7300_MCH_FB1 0x3610 #define PCI_DEVICE_ID_INTEL_IOAT_CNB 0x360b #define PCI_DEVICE_ID_INTEL_FBD_CNB 0x360c #define PCI_DEVICE_ID_INTEL_IOAT_JSF0 0x3710 #define PCI_DEVICE_ID_INTEL_IOAT_JSF1 0x3711 #define PCI_DEVICE_ID_INTEL_IOAT_JSF2 0x3712 #define PCI_DEVICE_ID_INTEL_IOAT_JSF3 0x3713 #define PCI_DEVICE_ID_INTEL_IOAT_JSF4 0x3714 #define PCI_DEVICE_ID_INTEL_IOAT_JSF5 0x3715 #define PCI_DEVICE_ID_INTEL_IOAT_JSF6 0x3716 #define PCI_DEVICE_ID_INTEL_IOAT_JSF7 0x3717 #define PCI_DEVICE_ID_INTEL_IOAT_JSF8 0x3718 #define PCI_DEVICE_ID_INTEL_IOAT_JSF9 0x3719 #define PCI_DEVICE_ID_INTEL_QAT_C62X 0x37c8 #define PCI_DEVICE_ID_INTEL_QAT_C62X_VF 0x37c9 #define PCI_DEVICE_ID_INTEL_ICH10_0 0x3a14 #define PCI_DEVICE_ID_INTEL_ICH10_1 0x3a16 #define PCI_DEVICE_ID_INTEL_ICH10_2 0x3a18 #define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a #define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30 #define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN 0x3b00 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX 0x3b1f #define PCI_DEVICE_ID_INTEL_IOAT_SNB0 0x3c20 #define PCI_DEVICE_ID_INTEL_IOAT_SNB1 0x3c21 #define PCI_DEVICE_ID_INTEL_IOAT_SNB2 0x3c22 #define PCI_DEVICE_ID_INTEL_IOAT_SNB3 0x3c23 #define PCI_DEVICE_ID_INTEL_IOAT_SNB4 0x3c24 #define PCI_DEVICE_ID_INTEL_IOAT_SNB5 0x3c25 #define PCI_DEVICE_ID_INTEL_IOAT_SNB6 0x3c26 #define PCI_DEVICE_ID_INTEL_IOAT_SNB7 0x3c27 #define PCI_DEVICE_ID_INTEL_IOAT_SNB8 0x3c2e #define PCI_DEVICE_ID_INTEL_IOAT_SNB9 0x3c2f #define PCI_DEVICE_ID_INTEL_UNC_HA 0x3c46 #define PCI_DEVICE_ID_INTEL_UNC_IMC0 0x3cb0 #define PCI_DEVICE_ID_INTEL_UNC_IMC1 0x3cb1 #define PCI_DEVICE_ID_INTEL_UNC_IMC2 0x3cb4 #define PCI_DEVICE_ID_INTEL_UNC_IMC3 0x3cb5 #define PCI_DEVICE_ID_INTEL_UNC_QPI0 0x3c41 #define PCI_DEVICE_ID_INTEL_UNC_QPI1 0x3c42 #define PCI_DEVICE_ID_INTEL_UNC_R2PCIE 0x3c43 #define PCI_DEVICE_ID_INTEL_UNC_R3QPI0 0x3c44 #define PCI_DEVICE_ID_INTEL_UNC_R3QPI1 0x3c45 #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS 0x3c71 /* 15.1 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0 0x3c72 /* 16.2 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1 0x3c73 /* 16.3 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2 0x3c76 /* 16.6 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77 /* 16.7 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0 0x3ca0 /* 14.0 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA 0x3ca8 /* 15.0 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa /* 15.2 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab /* 15.3 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac /* 15.4 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad /* 15.5 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO 0x3cb8 /* 17.0 */ #define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX 0x3ce0 #define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4 /* 12.6 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_BR 0x3cf5 /* 13.6 */ #define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1 0x3cf6 /* 12.7 */ #define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f #define PCI_DEVICE_ID_INTEL_5100_16 0x65f0 #define PCI_DEVICE_ID_INTEL_5100_19 0x65f3 #define PCI_DEVICE_ID_INTEL_5100_21 0x65f5 #define PCI_DEVICE_ID_INTEL_5100_22 0x65f6 #define PCI_DEVICE_ID_INTEL_5400_ERR 0x4030 #define PCI_DEVICE_ID_INTEL_5400_FBD0 0x4035 #define PCI_DEVICE_ID_INTEL_5400_FBD1 0x4036 #define PCI_DEVICE_ID_INTEL_IOAT_SCNB 0x65ff #define PCI_DEVICE_ID_INTEL_EP80579_0 0x5031 #define PCI_DEVICE_ID_INTEL_EP80579_1 0x5032 #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 #define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 #define PCI_DEVICE_ID_INTEL_82437VX 0x7030 #define PCI_DEVICE_ID_INTEL_82439TX 0x7100 #define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 #define PCI_DEVICE_ID_INTEL_82371AB 0x7111 #define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 #define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 #define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120 #define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121 #define PCI_DEVICE_ID_INTEL_82810_MC3 0x7122 #define PCI_DEVICE_ID_INTEL_82810_IG3 0x7123 #define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124 #define PCI_DEVICE_ID_INTEL_82810E_IG 0x7125 #define PCI_DEVICE_ID_INTEL_82443LX_0 0x7180 #define PCI_DEVICE_ID_INTEL_82443LX_1 0x7181 #define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190 #define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191 #define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192 #define PCI_DEVICE_ID_INTEL_440MX 0x7195 #define PCI_DEVICE_ID_INTEL_440MX_6 0x7196 #define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198 #define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199 #define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b #define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0 #define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2 #define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 #define PCI_DEVICE_ID_INTEL_HDA_ARL 0x7728 #define PCI_DEVICE_ID_INTEL_SCH_LPC 0x8119 #define PCI_DEVICE_ID_INTEL_SCH_IDE 0x811a #define PCI_DEVICE_ID_INTEL_E6XX_CU 0x8183 #define PCI_DEVICE_ID_INTEL_ITC_LPC 0x8186 #define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 #define PCI_DEVICE_ID_INTEL_82451NX 0x84ca #define PCI_DEVICE_ID_INTEL_82454NX 0x84cb #define PCI_DEVICE_ID_INTEL_84460GX 0x84ea #define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 #define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 #define PCI_DEVICE_ID_INTEL_VMD_9A0B 0x9a0b #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 #define PCI_VENDOR_ID_WANGXUN 0x8088 #define PCI_VENDOR_ID_SCALEMP 0x8686 #define PCI_DEVICE_ID_SCALEMP_VSMP_CTL 0x1010 #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 #define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e #define PCI_SUBDEVICE_ID_COMPUTONE_PG4 0x0001 #define PCI_SUBDEVICE_ID_COMPUTONE_PG8 0x0002 #define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003 #define PCI_VENDOR_ID_KTI 0x8e2e #define PCI_VENDOR_ID_ADAPTEC 0x9004 #define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 #define PCI_DEVICE_ID_ADAPTEC_7821 0x2178 #define PCI_DEVICE_ID_ADAPTEC_38602 0x3860 #define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 #define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 #define PCI_DEVICE_ID_ADAPTEC_3860 0x6038 #define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 #define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 #define PCI_DEVICE_ID_ADAPTEC_7861 0x6178 #define PCI_DEVICE_ID_ADAPTEC_7870 0x7078 #define PCI_DEVICE_ID_ADAPTEC_7871 0x7178 #define PCI_DEVICE_ID_ADAPTEC_7872 0x7278 #define PCI_DEVICE_ID_ADAPTEC_7873 0x7378 #define PCI_DEVICE_ID_ADAPTEC_7874 0x7478 #define PCI_DEVICE_ID_ADAPTEC_7895 0x7895 #define PCI_DEVICE_ID_ADAPTEC_7880 0x8078 #define PCI_DEVICE_ID_ADAPTEC_7881 0x8178 #define PCI_DEVICE_ID_ADAPTEC_7882 0x8278 #define PCI_DEVICE_ID_ADAPTEC_7883 0x8378 #define PCI_DEVICE_ID_ADAPTEC_7884 0x8478 #define PCI_DEVICE_ID_ADAPTEC_7885 0x8578 #define PCI_DEVICE_ID_ADAPTEC_7886 0x8678 #define PCI_DEVICE_ID_ADAPTEC_7887 0x8778 #define PCI_DEVICE_ID_ADAPTEC_7888 0x8878 #define PCI_VENDOR_ID_ADAPTEC2 0x9005 #define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 #define PCI_DEVICE_ID_ADAPTEC2_2930U2 0x0011 #define PCI_DEVICE_ID_ADAPTEC2_7890B 0x0013 #define PCI_DEVICE_ID_ADAPTEC2_7890 0x001f #define PCI_DEVICE_ID_ADAPTEC2_3940U2 0x0050 #define PCI_DEVICE_ID_ADAPTEC2_3950U2D 0x0051 #define PCI_DEVICE_ID_ADAPTEC2_7896 0x005f #define PCI_DEVICE_ID_ADAPTEC2_7892A 0x0080 #define PCI_DEVICE_ID_ADAPTEC2_7892B 0x0081 #define PCI_DEVICE_ID_ADAPTEC2_7892D 0x0083 #define PCI_DEVICE_ID_ADAPTEC2_7892P 0x008f #define PCI_DEVICE_ID_ADAPTEC2_7899A 0x00c0 #define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1 #define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3 #define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf #define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500 #define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 #define PCI_VENDOR_ID_HOLTEK 0x9412 #define PCI_DEVICE_ID_HOLTEK_6565 0x6565 #define PCI_VENDOR_ID_NETMOS 0x9710 #define PCI_DEVICE_ID_NETMOS_9705 0x9705 #define PCI_DEVICE_ID_NETMOS_9715 0x9715 #define PCI_DEVICE_ID_NETMOS_9735 0x9735 #define PCI_DEVICE_ID_NETMOS_9745 0x9745 #define PCI_DEVICE_ID_NETMOS_9755 0x9755 #define PCI_DEVICE_ID_NETMOS_9805 0x9805 #define PCI_DEVICE_ID_NETMOS_9815 0x9815 #define PCI_DEVICE_ID_NETMOS_9835 0x9835 #define PCI_DEVICE_ID_NETMOS_9845 0x9845 #define PCI_DEVICE_ID_NETMOS_9855 0x9855 #define PCI_DEVICE_ID_NETMOS_9865 0x9865 #define PCI_DEVICE_ID_NETMOS_9900 0x9900 #define PCI_DEVICE_ID_NETMOS_9901 0x9901 #define PCI_DEVICE_ID_NETMOS_9904 0x9904 #define PCI_DEVICE_ID_NETMOS_9912 0x9912 #define PCI_DEVICE_ID_NETMOS_9922 0x9922 #define PCI_VENDOR_ID_3COM_2 0xa727 #define PCI_VENDOR_ID_SOLIDRUN 0xd063 #define PCI_VENDOR_ID_DIGIUM 0xd161 #define PCI_DEVICE_ID_DIGIUM_HFC4S 0xb410 #define PCI_SUBVENDOR_ID_EXSYS 0xd84d #define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 #define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055 #define PCI_VENDOR_ID_TIGERJET 0xe159 #define PCI_DEVICE_ID_TIGERJET_300 0x0001 #define PCI_DEVICE_ID_TIGERJET_100 0x0002 #define PCI_VENDOR_ID_XILINX_RME 0xea60 #define PCI_DEVICE_ID_RME_DIGI32 0x9896 #define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 #define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 #define PCI_VENDOR_ID_XEN 0x5853 #define PCI_DEVICE_ID_XEN_PLATFORM 0x0001 #define PCI_VENDOR_ID_OCZ 0x1b85 #define PCI_VENDOR_ID_NCUBE 0x10ff #endif /* _LINUX_PCI_IDS_H */ PK ! eX�8 8 rwlock.hnu �[��� #ifndef __LINUX_RWLOCK_H #define __LINUX_RWLOCK_H #ifndef __LINUX_SPINLOCK_H # error "please don't include this file directly" #endif /* * rwlock related methods * * split out from spinlock.h * * portions Copyright 2005, Red Hat, Inc., Ingo Molnar * Released under the General Public License (GPL). */ #ifdef CONFIG_DEBUG_SPINLOCK extern void __rwlock_init(rwlock_t *lock, const char *name, struct lock_class_key *key); # define rwlock_init(lock) \ do { \ static struct lock_class_key __key; \ \ __rwlock_init((lock), #lock, &__key); \ } while (0) #else # define rwlock_init(lock) \ do { *(lock) = __RW_LOCK_UNLOCKED(lock); } while (0) #endif #ifdef CONFIG_DEBUG_SPINLOCK extern void do_raw_read_lock(rwlock_t *lock) __acquires(lock); #define do_raw_read_lock_flags(lock, flags) do_raw_read_lock(lock) extern int do_raw_read_trylock(rwlock_t *lock); extern void do_raw_read_unlock(rwlock_t *lock) __releases(lock); extern void do_raw_write_lock(rwlock_t *lock) __acquires(lock); #define do_raw_write_lock_flags(lock, flags) do_raw_write_lock(lock) extern int do_raw_write_trylock(rwlock_t *lock); extern void do_raw_write_unlock(rwlock_t *lock) __releases(lock); #else #ifndef arch_read_lock_flags # define arch_read_lock_flags(lock, flags) arch_read_lock(lock) #endif #ifndef arch_write_lock_flags # define arch_write_lock_flags(lock, flags) arch_write_lock(lock) #endif # define do_raw_read_lock(rwlock) do {__acquire(lock); arch_read_lock(&(rwlock)->raw_lock); } while (0) # define do_raw_read_lock_flags(lock, flags) \ do {__acquire(lock); arch_read_lock_flags(&(lock)->raw_lock, *(flags)); } while (0) # define do_raw_read_trylock(rwlock) arch_read_trylock(&(rwlock)->raw_lock) # define do_raw_read_unlock(rwlock) do {arch_read_unlock(&(rwlock)->raw_lock); __release(lock); } while (0) # define do_raw_write_lock(rwlock) do {__acquire(lock); arch_write_lock(&(rwlock)->raw_lock); } while (0) # define do_raw_write_lock_flags(lock, flags) \ do {__acquire(lock); arch_write_lock_flags(&(lock)->raw_lock, *(flags)); } while (0) # define do_raw_write_trylock(rwlock) arch_write_trylock(&(rwlock)->raw_lock) # define do_raw_write_unlock(rwlock) do {arch_write_unlock(&(rwlock)->raw_lock); __release(lock); } while (0) #endif /* * Define the various rw_lock methods. Note we define these * regardless of whether CONFIG_SMP or CONFIG_PREEMPT are set. The various * methods are defined as nops in the case they are not required. */ #define read_trylock(lock) __cond_lock(lock, _raw_read_trylock(lock)) #define write_trylock(lock) __cond_lock(lock, _raw_write_trylock(lock)) #define write_lock(lock) _raw_write_lock(lock) #define read_lock(lock) _raw_read_lock(lock) #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) #define read_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ flags = _raw_read_lock_irqsave(lock); \ } while (0) #define write_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ flags = _raw_write_lock_irqsave(lock); \ } while (0) #else #define read_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ _raw_read_lock_irqsave(lock, flags); \ } while (0) #define write_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ _raw_write_lock_irqsave(lock, flags); \ } while (0) #endif #define read_lock_irq(lock) _raw_read_lock_irq(lock) #define read_lock_bh(lock) _raw_read_lock_bh(lock) #define write_lock_irq(lock) _raw_write_lock_irq(lock) #define write_lock_bh(lock) _raw_write_lock_bh(lock) #define read_unlock(lock) _raw_read_unlock(lock) #define write_unlock(lock) _raw_write_unlock(lock) #define read_unlock_irq(lock) _raw_read_unlock_irq(lock) #define write_unlock_irq(lock) _raw_write_unlock_irq(lock) #define read_unlock_irqrestore(lock, flags) \ do { \ typecheck(unsigned long, flags); \ _raw_read_unlock_irqrestore(lock, flags); \ } while (0) #define read_unlock_bh(lock) _raw_read_unlock_bh(lock) #define write_unlock_irqrestore(lock, flags) \ do { \ typecheck(unsigned long, flags); \ _raw_write_unlock_irqrestore(lock, flags); \ } while (0) #define write_unlock_bh(lock) _raw_write_unlock_bh(lock) #define write_trylock_irqsave(lock, flags) \ ({ \ local_irq_save(flags); \ write_trylock(lock) ? \ 1 : ({ local_irq_restore(flags); 0; }); \ }) #ifdef arch_rwlock_is_contended #define rwlock_is_contended(lock) \ arch_rwlock_is_contended(&(lock)->raw_lock) #else #define rwlock_is_contended(lock) ((void)(lock), 0) #endif /* arch_rwlock_is_contended */ #endif /* __LINUX_RWLOCK_H */ PK ! �wJq� � ramfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RAMFS_H #define _LINUX_RAMFS_H #include <linux/fs_parser.h> // bleh... struct inode *ramfs_get_inode(struct super_block *sb, const struct inode *dir, umode_t mode, dev_t dev); extern int ramfs_init_fs_context(struct fs_context *fc); extern void ramfs_kill_sb(struct super_block *sb); #ifdef CONFIG_MMU static inline int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize) { return 0; } #else extern int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize); #endif extern const struct fs_parameter_spec ramfs_fs_parameters[]; extern const struct file_operations ramfs_file_operations; extern const struct vm_operations_struct generic_file_vm_ops; #endif PK ! _t�# lp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * usr/include/linux/lp.h c.1991-1992 James Wiegand * many modifications copyright (C) 1992 Michael K. Johnson * Interrupt support added 1993 Nigel Gamble * Removed 8255 status defines from inside __KERNEL__ Marcelo Tosatti */ #ifndef _LINUX_LP_H #define _LINUX_LP_H #include <linux/wait.h> #include <linux/mutex.h> #include <uapi/linux/lp.h> /* Magic numbers for defining port-device mappings */ #define LP_PARPORT_UNSPEC -4 #define LP_PARPORT_AUTO -3 #define LP_PARPORT_OFF -2 #define LP_PARPORT_NONE -1 #define LP_F(minor) lp_table[(minor)].flags /* flags for busy, etc. */ #define LP_CHAR(minor) lp_table[(minor)].chars /* busy timeout */ #define LP_TIME(minor) lp_table[(minor)].time /* wait time */ #define LP_WAIT(minor) lp_table[(minor)].wait /* strobe wait */ #define LP_IRQ(minor) lp_table[(minor)].dev->port->irq /* interrupt # */ /* PARPORT_IRQ_NONE means polled */ #ifdef LP_STATS #define LP_STAT(minor) lp_table[(minor)].stats /* statistics area */ #endif #define LP_BUFFER_SIZE PAGE_SIZE #define LP_BASE(x) lp_table[(x)].dev->port->base #ifdef LP_STATS struct lp_stats { unsigned long chars; unsigned long sleeps; unsigned int maxrun; unsigned int maxwait; unsigned int meanwait; unsigned int mdev; }; #endif struct lp_struct { struct pardevice *dev; unsigned long flags; unsigned int chars; unsigned int time; unsigned int wait; char *lp_buffer; #ifdef LP_STATS unsigned int lastcall; unsigned int runchars; struct lp_stats stats; #endif wait_queue_head_t waitq; unsigned int last_error; struct mutex port_mutex; wait_queue_head_t dataq; long timeout; unsigned int best_mode; unsigned int current_mode; unsigned long bits; }; /* * The following constants describe the various signals of the printer port * hardware. Note that the hardware inverts some signals and that some * signals are active low. An example is LP_STROBE, which must be programmed * with 1 for being active and 0 for being inactive, because the strobe signal * gets inverted, but it is also active low. */ /* * defines for 8255 control port * base + 2 * accessed with LP_C(minor) */ #define LP_PINTEN 0x10 /* high to read data in or-ed with data out */ #define LP_PSELECP 0x08 /* inverted output, active low */ #define LP_PINITP 0x04 /* unchanged output, active low */ #define LP_PAUTOLF 0x02 /* inverted output, active low */ #define LP_PSTROBE 0x01 /* short high output on raising edge */ /* * the value written to ports to test existence. PC-style ports will * return the value written. AT-style ports will return 0. so why not * make them the same ? */ #define LP_DUMMY 0x00 /* * This is the port delay time, in microseconds. * It is used only in the lp_init() and lp_reset() routine. */ #define LP_DELAY 50 #endif PK ! �� b� � apple-gmux.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * apple-gmux.h - microcontroller built into dual GPU MacBook Pro & Mac Pro * Copyright (C) 2015 Lukas Wunner <lukas@wunner.de> */ #ifndef LINUX_APPLE_GMUX_H #define LINUX_APPLE_GMUX_H #include <linux/acpi.h> #define GMUX_ACPI_HID "APP000B" #if IS_ENABLED(CONFIG_APPLE_GMUX) /** * apple_gmux_present() - detect if gmux is built into the machine * * Drivers may use this to activate quirks specific to dual GPU MacBook Pros * and Mac Pros, e.g. for deferred probing, runtime pm and backlight. * * Return: %true if gmux is present and the kernel was configured * with CONFIG_APPLE_GMUX, %false otherwise. */ static inline bool apple_gmux_present(void) { return acpi_dev_found(GMUX_ACPI_HID); } #else /* !CONFIG_APPLE_GMUX */ static inline bool apple_gmux_present(void) { return false; } #endif /* !CONFIG_APPLE_GMUX */ #endif /* LINUX_APPLE_GMUX_H */ PK ! � � � clocksource_ids.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CLOCKSOURCE_IDS_H #define _LINUX_CLOCKSOURCE_IDS_H /* Enum to give clocksources a unique identifier */ enum clocksource_ids { CSID_GENERIC = 0, CSID_ARM_ARCH_COUNTER, CSID_MAX, }; #endif PK ! �M� C� C� nvme.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for the NVM Express interface * Copyright (c) 2011-2014, Intel Corporation. */ #ifndef _LINUX_NVME_H #define _LINUX_NVME_H #include <linux/bits.h> #include <linux/types.h> #include <linux/uuid.h> /* NQN names in commands fields specified one size */ #define NVMF_NQN_FIELD_LEN 256 /* However the max length of a qualified name is another size */ #define NVMF_NQN_SIZE 223 #define NVMF_TRSVCID_SIZE 32 #define NVMF_TRADDR_SIZE 256 #define NVMF_TSAS_SIZE 256 #define NVME_DISC_SUBSYS_NAME "nqn.2014-08.org.nvmexpress.discovery" #define NVME_RDMA_IP_PORT 4420 #define NVME_NSID_ALL 0xffffffff /* Special NSSR value, 'NVMe' */ #define NVME_SUBSYS_RESET 0x4E564D65 enum nvme_subsys_type { NVME_NQN_DISC = 1, /* Discovery type target subsystem */ NVME_NQN_NVME = 2, /* NVME type target subsystem */ }; enum nvme_ctrl_type { NVME_CTRL_IO = 1, /* I/O controller */ NVME_CTRL_DISC = 2, /* Discovery controller */ NVME_CTRL_ADMIN = 3, /* Administrative controller */ }; enum nvme_dctype { NVME_DCTYPE_NOT_REPORTED = 0, NVME_DCTYPE_DDC = 1, /* Direct Discovery Controller */ NVME_DCTYPE_CDC = 2, /* Central Discovery Controller */ }; /* Address Family codes for Discovery Log Page entry ADRFAM field */ enum { NVMF_ADDR_FAMILY_PCI = 0, /* PCIe */ NVMF_ADDR_FAMILY_IP4 = 1, /* IP4 */ NVMF_ADDR_FAMILY_IP6 = 2, /* IP6 */ NVMF_ADDR_FAMILY_IB = 3, /* InfiniBand */ NVMF_ADDR_FAMILY_FC = 4, /* Fibre Channel */ NVMF_ADDR_FAMILY_LOOP = 254, /* Reserved for host usage */ NVMF_ADDR_FAMILY_MAX, }; /* Transport Type codes for Discovery Log Page entry TRTYPE field */ enum { NVMF_TRTYPE_RDMA = 1, /* RDMA */ NVMF_TRTYPE_FC = 2, /* Fibre Channel */ NVMF_TRTYPE_TCP = 3, /* TCP/IP */ NVMF_TRTYPE_LOOP = 254, /* Reserved for host usage */ NVMF_TRTYPE_MAX, }; /* Transport Requirements codes for Discovery Log Page entry TREQ field */ enum { NVMF_TREQ_NOT_SPECIFIED = 0, /* Not specified */ NVMF_TREQ_REQUIRED = 1, /* Required */ NVMF_TREQ_NOT_REQUIRED = 2, /* Not Required */ #define NVME_TREQ_SECURE_CHANNEL_MASK \ (NVMF_TREQ_REQUIRED | NVMF_TREQ_NOT_REQUIRED) NVMF_TREQ_DISABLE_SQFLOW = (1 << 2), /* Supports SQ flow control disable */ }; /* RDMA QP Service Type codes for Discovery Log Page entry TSAS * RDMA_QPTYPE field */ enum { NVMF_RDMA_QPTYPE_CONNECTED = 1, /* Reliable Connected */ NVMF_RDMA_QPTYPE_DATAGRAM = 2, /* Reliable Datagram */ }; /* RDMA Provider Type codes for Discovery Log Page entry TSAS * RDMA_PRTYPE field */ enum { NVMF_RDMA_PRTYPE_NOT_SPECIFIED = 1, /* No Provider Specified */ NVMF_RDMA_PRTYPE_IB = 2, /* InfiniBand */ NVMF_RDMA_PRTYPE_ROCE = 3, /* InfiniBand RoCE */ NVMF_RDMA_PRTYPE_ROCEV2 = 4, /* InfiniBand RoCEV2 */ NVMF_RDMA_PRTYPE_IWARP = 5, /* IWARP */ }; /* RDMA Connection Management Service Type codes for Discovery Log Page * entry TSAS RDMA_CMS field */ enum { NVMF_RDMA_CMS_RDMA_CM = 1, /* Sockets based endpoint addressing */ }; #define NVME_AQ_DEPTH 32 #define NVME_NR_AEN_COMMANDS 1 #define NVME_AQ_BLK_MQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AEN_COMMANDS) /* * Subtract one to leave an empty queue entry for 'Full Queue' condition. See * NVM-Express 1.2 specification, section 4.1.2. */ #define NVME_AQ_MQ_TAG_DEPTH (NVME_AQ_BLK_MQ_DEPTH - 1) enum { NVME_REG_CAP = 0x0000, /* Controller Capabilities */ NVME_REG_VS = 0x0008, /* Version */ NVME_REG_INTMS = 0x000c, /* Interrupt Mask Set */ NVME_REG_INTMC = 0x0010, /* Interrupt Mask Clear */ NVME_REG_CC = 0x0014, /* Controller Configuration */ NVME_REG_CSTS = 0x001c, /* Controller Status */ NVME_REG_NSSR = 0x0020, /* NVM Subsystem Reset */ NVME_REG_AQA = 0x0024, /* Admin Queue Attributes */ NVME_REG_ASQ = 0x0028, /* Admin SQ Base Address */ NVME_REG_ACQ = 0x0030, /* Admin CQ Base Address */ NVME_REG_CMBLOC = 0x0038, /* Controller Memory Buffer Location */ NVME_REG_CMBSZ = 0x003c, /* Controller Memory Buffer Size */ NVME_REG_BPINFO = 0x0040, /* Boot Partition Information */ NVME_REG_BPRSEL = 0x0044, /* Boot Partition Read Select */ NVME_REG_BPMBL = 0x0048, /* Boot Partition Memory Buffer * Location */ NVME_REG_CMBMSC = 0x0050, /* Controller Memory Buffer Memory * Space Control */ NVME_REG_PMRCAP = 0x0e00, /* Persistent Memory Capabilities */ NVME_REG_PMRCTL = 0x0e04, /* Persistent Memory Region Control */ NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */ NVME_REG_PMREBS = 0x0e0c, /* Persistent Memory Region Elasticity * Buffer Size */ NVME_REG_PMRSWTP = 0x0e10, /* Persistent Memory Region Sustained * Write Throughput */ NVME_REG_DBS = 0x1000, /* SQ 0 Tail Doorbell */ }; #define NVME_CAP_MQES(cap) ((cap) & 0xffff) #define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff) #define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf) #define NVME_CAP_NSSRC(cap) (((cap) >> 36) & 0x1) #define NVME_CAP_CSS(cap) (((cap) >> 37) & 0xff) #define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf) #define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf) #define NVME_CAP_CMBS(cap) (((cap) >> 57) & 0x1) #define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7) #define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff) enum { NVME_CMBSZ_SQS = 1 << 0, NVME_CMBSZ_CQS = 1 << 1, NVME_CMBSZ_LISTS = 1 << 2, NVME_CMBSZ_RDS = 1 << 3, NVME_CMBSZ_WDS = 1 << 4, NVME_CMBSZ_SZ_SHIFT = 12, NVME_CMBSZ_SZ_MASK = 0xfffff, NVME_CMBSZ_SZU_SHIFT = 8, NVME_CMBSZ_SZU_MASK = 0xf, }; /* * Submission and Completion Queue Entry Sizes for the NVM command set. * (In bytes and specified as a power of two (2^n)). */ #define NVME_ADM_SQES 6 #define NVME_NVM_IOSQES 6 #define NVME_NVM_IOCQES 4 enum { NVME_CC_ENABLE = 1 << 0, NVME_CC_EN_SHIFT = 0, NVME_CC_CSS_SHIFT = 4, NVME_CC_MPS_SHIFT = 7, NVME_CC_AMS_SHIFT = 11, NVME_CC_SHN_SHIFT = 14, NVME_CC_IOSQES_SHIFT = 16, NVME_CC_IOCQES_SHIFT = 20, NVME_CC_CSS_NVM = 0 << NVME_CC_CSS_SHIFT, NVME_CC_CSS_CSI = 6 << NVME_CC_CSS_SHIFT, NVME_CC_CSS_MASK = 7 << NVME_CC_CSS_SHIFT, NVME_CC_AMS_RR = 0 << NVME_CC_AMS_SHIFT, NVME_CC_AMS_WRRU = 1 << NVME_CC_AMS_SHIFT, NVME_CC_AMS_VS = 7 << NVME_CC_AMS_SHIFT, NVME_CC_SHN_NONE = 0 << NVME_CC_SHN_SHIFT, NVME_CC_SHN_NORMAL = 1 << NVME_CC_SHN_SHIFT, NVME_CC_SHN_ABRUPT = 2 << NVME_CC_SHN_SHIFT, NVME_CC_SHN_MASK = 3 << NVME_CC_SHN_SHIFT, NVME_CC_IOSQES = NVME_NVM_IOSQES << NVME_CC_IOSQES_SHIFT, NVME_CC_IOCQES = NVME_NVM_IOCQES << NVME_CC_IOCQES_SHIFT, NVME_CAP_CSS_NVM = 1 << 0, NVME_CAP_CSS_CSI = 1 << 6, NVME_CSTS_RDY = 1 << 0, NVME_CSTS_CFS = 1 << 1, NVME_CSTS_NSSRO = 1 << 4, NVME_CSTS_PP = 1 << 5, NVME_CSTS_SHST_NORMAL = 0 << 2, NVME_CSTS_SHST_OCCUR = 1 << 2, NVME_CSTS_SHST_CMPLT = 2 << 2, NVME_CSTS_SHST_MASK = 3 << 2, NVME_CMBMSC_CRE = 1 << 0, NVME_CMBMSC_CMSE = 1 << 1, }; struct nvme_id_power_state { __le16 max_power; /* centiwatts */ __u8 rsvd2; __u8 flags; __le32 entry_lat; /* microseconds */ __le32 exit_lat; /* microseconds */ __u8 read_tput; __u8 read_lat; __u8 write_tput; __u8 write_lat; __le16 idle_power; __u8 idle_scale; __u8 rsvd19; __le16 active_power; __u8 active_work_scale; __u8 rsvd23[9]; }; enum { NVME_PS_FLAGS_MAX_POWER_SCALE = 1 << 0, NVME_PS_FLAGS_NON_OP_STATE = 1 << 1, }; enum nvme_ctrl_attr { NVME_CTRL_ATTR_HID_128_BIT = (1 << 0), NVME_CTRL_ATTR_TBKAS = (1 << 6), }; struct nvme_id_ctrl { __le16 vid; __le16 ssvid; char sn[20]; char mn[40]; char fr[8]; __u8 rab; __u8 ieee[3]; __u8 cmic; __u8 mdts; __le16 cntlid; __le32 ver; __le32 rtd3r; __le32 rtd3e; __le32 oaes; __le32 ctratt; __u8 rsvd100[11]; __u8 cntrltype; __u8 fguid[16]; __le16 crdt1; __le16 crdt2; __le16 crdt3; __u8 rsvd134[122]; __le16 oacs; __u8 acl; __u8 aerl; __u8 frmw; __u8 lpa; __u8 elpe; __u8 npss; __u8 avscc; __u8 apsta; __le16 wctemp; __le16 cctemp; __le16 mtfa; __le32 hmpre; __le32 hmmin; __u8 tnvmcap[16]; __u8 unvmcap[16]; __le32 rpmbs; __le16 edstt; __u8 dsto; __u8 fwug; __le16 kas; __le16 hctma; __le16 mntmt; __le16 mxtmt; __le32 sanicap; __le32 hmminds; __le16 hmmaxd; __u8 rsvd338[4]; __u8 anatt; __u8 anacap; __le32 anagrpmax; __le32 nanagrpid; __u8 rsvd352[160]; __u8 sqes; __u8 cqes; __le16 maxcmd; __le32 nn; __le16 oncs; __le16 fuses; __u8 fna; __u8 vwc; __le16 awun; __le16 awupf; __u8 nvscc; __u8 nwpc; __le16 acwu; __u8 rsvd534[2]; __le32 sgls; __le32 mnan; __u8 rsvd544[224]; char subnqn[256]; __u8 rsvd1024[768]; __le32 ioccsz; __le32 iorcsz; __le16 icdoff; __u8 ctrattr; __u8 msdbd; __u8 rsvd1804[2]; __u8 dctype; __u8 rsvd1807[241]; struct nvme_id_power_state psd[32]; __u8 vs[1024]; }; enum { NVME_CTRL_CMIC_MULTI_CTRL = 1 << 1, NVME_CTRL_CMIC_ANA = 1 << 3, NVME_CTRL_ONCS_COMPARE = 1 << 0, NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1, NVME_CTRL_ONCS_DSM = 1 << 2, NVME_CTRL_ONCS_WRITE_ZEROES = 1 << 3, NVME_CTRL_ONCS_RESERVATIONS = 1 << 5, NVME_CTRL_ONCS_TIMESTAMP = 1 << 6, NVME_CTRL_VWC_PRESENT = 1 << 0, NVME_CTRL_OACS_SEC_SUPP = 1 << 0, NVME_CTRL_OACS_NS_MNGT_SUPP = 1 << 3, NVME_CTRL_OACS_DIRECTIVES = 1 << 5, NVME_CTRL_OACS_DBBUF_SUPP = 1 << 8, NVME_CTRL_LPA_CMD_EFFECTS_LOG = 1 << 1, NVME_CTRL_CTRATT_128_ID = 1 << 0, NVME_CTRL_CTRATT_NON_OP_PSP = 1 << 1, NVME_CTRL_CTRATT_NVM_SETS = 1 << 2, NVME_CTRL_CTRATT_READ_RECV_LVLS = 1 << 3, NVME_CTRL_CTRATT_ENDURANCE_GROUPS = 1 << 4, NVME_CTRL_CTRATT_PREDICTABLE_LAT = 1 << 5, NVME_CTRL_CTRATT_NAMESPACE_GRANULARITY = 1 << 7, NVME_CTRL_CTRATT_UUID_LIST = 1 << 9, }; struct nvme_lbaf { __le16 ms; __u8 ds; __u8 rp; }; struct nvme_id_ns { __le64 nsze; __le64 ncap; __le64 nuse; __u8 nsfeat; __u8 nlbaf; __u8 flbas; __u8 mc; __u8 dpc; __u8 dps; __u8 nmic; __u8 rescap; __u8 fpi; __u8 dlfeat; __le16 nawun; __le16 nawupf; __le16 nacwu; __le16 nabsn; __le16 nabo; __le16 nabspf; __le16 noiob; __u8 nvmcap[16]; __le16 npwg; __le16 npwa; __le16 npdg; __le16 npda; __le16 nows; __u8 rsvd74[18]; __le32 anagrpid; __u8 rsvd96[3]; __u8 nsattr; __le16 nvmsetid; __le16 endgid; __u8 nguid[16]; __u8 eui64[8]; struct nvme_lbaf lbaf[16]; __u8 rsvd192[192]; __u8 vs[3712]; }; struct nvme_zns_lbafe { __le64 zsze; __u8 zdes; __u8 rsvd9[7]; }; struct nvme_id_ns_zns { __le16 zoc; __le16 ozcs; __le32 mar; __le32 mor; __le32 rrl; __le32 frl; __u8 rsvd20[2796]; struct nvme_zns_lbafe lbafe[16]; __u8 rsvd3072[768]; __u8 vs[256]; }; struct nvme_id_ctrl_zns { __u8 zasl; __u8 rsvd1[4095]; }; struct nvme_id_ctrl_nvm { __u8 vsl; __u8 wzsl; __u8 wusl; __u8 dmrl; __le32 dmrsl; __le64 dmsl; __u8 rsvd16[4080]; }; enum { NVME_ID_CNS_NS = 0x00, NVME_ID_CNS_CTRL = 0x01, NVME_ID_CNS_NS_ACTIVE_LIST = 0x02, NVME_ID_CNS_NS_DESC_LIST = 0x03, NVME_ID_CNS_CS_NS = 0x05, NVME_ID_CNS_CS_CTRL = 0x06, NVME_ID_CNS_NS_PRESENT_LIST = 0x10, NVME_ID_CNS_NS_PRESENT = 0x11, NVME_ID_CNS_CTRL_NS_LIST = 0x12, NVME_ID_CNS_CTRL_LIST = 0x13, NVME_ID_CNS_SCNDRY_CTRL_LIST = 0x15, NVME_ID_CNS_NS_GRANULARITY = 0x16, NVME_ID_CNS_UUID_LIST = 0x17, }; enum { NVME_CSI_NVM = 0, NVME_CSI_ZNS = 2, }; enum { NVME_DIR_IDENTIFY = 0x00, NVME_DIR_STREAMS = 0x01, NVME_DIR_SND_ID_OP_ENABLE = 0x01, NVME_DIR_SND_ST_OP_REL_ID = 0x01, NVME_DIR_SND_ST_OP_REL_RSC = 0x02, NVME_DIR_RCV_ID_OP_PARAM = 0x01, NVME_DIR_RCV_ST_OP_PARAM = 0x01, NVME_DIR_RCV_ST_OP_STATUS = 0x02, NVME_DIR_RCV_ST_OP_RESOURCE = 0x03, NVME_DIR_ENDIR = 0x01, }; enum { NVME_NS_FEAT_THIN = 1 << 0, NVME_NS_FEAT_ATOMICS = 1 << 1, NVME_NS_FEAT_IO_OPT = 1 << 4, NVME_NS_ATTR_RO = 1 << 0, NVME_NS_FLBAS_LBA_MASK = 0xf, NVME_NS_FLBAS_META_EXT = 0x10, NVME_NS_NMIC_SHARED = 1 << 0, NVME_LBAF_RP_BEST = 0, NVME_LBAF_RP_BETTER = 1, NVME_LBAF_RP_GOOD = 2, NVME_LBAF_RP_DEGRADED = 3, NVME_NS_DPC_PI_LAST = 1 << 4, NVME_NS_DPC_PI_FIRST = 1 << 3, NVME_NS_DPC_PI_TYPE3 = 1 << 2, NVME_NS_DPC_PI_TYPE2 = 1 << 1, NVME_NS_DPC_PI_TYPE1 = 1 << 0, NVME_NS_DPS_PI_FIRST = 1 << 3, NVME_NS_DPS_PI_MASK = 0x7, NVME_NS_DPS_PI_TYPE1 = 1, NVME_NS_DPS_PI_TYPE2 = 2, NVME_NS_DPS_PI_TYPE3 = 3, }; /* Identify Namespace Metadata Capabilities (MC): */ enum { NVME_MC_EXTENDED_LBA = (1 << 0), NVME_MC_METADATA_PTR = (1 << 1), }; struct nvme_ns_id_desc { __u8 nidt; __u8 nidl; __le16 reserved; }; #define NVME_NIDT_EUI64_LEN 8 #define NVME_NIDT_NGUID_LEN 16 #define NVME_NIDT_UUID_LEN 16 #define NVME_NIDT_CSI_LEN 1 enum { NVME_NIDT_EUI64 = 0x01, NVME_NIDT_NGUID = 0x02, NVME_NIDT_UUID = 0x03, NVME_NIDT_CSI = 0x04, }; struct nvme_smart_log { __u8 critical_warning; __u8 temperature[2]; __u8 avail_spare; __u8 spare_thresh; __u8 percent_used; __u8 endu_grp_crit_warn_sumry; __u8 rsvd7[25]; __u8 data_units_read[16]; __u8 data_units_written[16]; __u8 host_reads[16]; __u8 host_writes[16]; __u8 ctrl_busy_time[16]; __u8 power_cycles[16]; __u8 power_on_hours[16]; __u8 unsafe_shutdowns[16]; __u8 media_errors[16]; __u8 num_err_log_entries[16]; __le32 warning_temp_time; __le32 critical_comp_time; __le16 temp_sensor[8]; __le32 thm_temp1_trans_count; __le32 thm_temp2_trans_count; __le32 thm_temp1_total_time; __le32 thm_temp2_total_time; __u8 rsvd232[280]; }; struct nvme_fw_slot_info_log { __u8 afi; __u8 rsvd1[7]; __le64 frs[7]; __u8 rsvd64[448]; }; enum { NVME_CMD_EFFECTS_CSUPP = 1 << 0, NVME_CMD_EFFECTS_LBCC = 1 << 1, NVME_CMD_EFFECTS_NCC = 1 << 2, NVME_CMD_EFFECTS_NIC = 1 << 3, NVME_CMD_EFFECTS_CCC = 1 << 4, NVME_CMD_EFFECTS_CSE_MASK = GENMASK(18, 16), NVME_CMD_EFFECTS_UUID_SEL = 1 << 19, }; struct nvme_effects_log { __le32 acs[256]; __le32 iocs[256]; __u8 resv[2048]; }; enum nvme_ana_state { NVME_ANA_OPTIMIZED = 0x01, NVME_ANA_NONOPTIMIZED = 0x02, NVME_ANA_INACCESSIBLE = 0x03, NVME_ANA_PERSISTENT_LOSS = 0x04, NVME_ANA_CHANGE = 0x0f, }; struct nvme_ana_group_desc { __le32 grpid; __le32 nnsids; __le64 chgcnt; __u8 state; __u8 rsvd17[15]; __le32 nsids[]; }; /* flag for the log specific field of the ANA log */ #define NVME_ANA_LOG_RGO (1 << 0) struct nvme_ana_rsp_hdr { __le64 chgcnt; __le16 ngrps; __le16 rsvd10[3]; }; struct nvme_zone_descriptor { __u8 zt; __u8 zs; __u8 za; __u8 rsvd3[5]; __le64 zcap; __le64 zslba; __le64 wp; __u8 rsvd32[32]; }; enum { NVME_ZONE_TYPE_SEQWRITE_REQ = 0x2, }; struct nvme_zone_report { __le64 nr_zones; __u8 resv8[56]; struct nvme_zone_descriptor entries[]; }; enum { NVME_SMART_CRIT_SPARE = 1 << 0, NVME_SMART_CRIT_TEMPERATURE = 1 << 1, NVME_SMART_CRIT_RELIABILITY = 1 << 2, NVME_SMART_CRIT_MEDIA = 1 << 3, NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4, }; enum { NVME_AER_ERROR = 0, NVME_AER_SMART = 1, NVME_AER_NOTICE = 2, NVME_AER_CSS = 6, NVME_AER_VS = 7, }; enum { NVME_AER_ERROR_PERSIST_INT_ERR = 0x03, }; enum { NVME_AER_NOTICE_NS_CHANGED = 0x00, NVME_AER_NOTICE_FW_ACT_STARTING = 0x01, NVME_AER_NOTICE_ANA = 0x03, NVME_AER_NOTICE_DISC_CHANGED = 0xf0, }; enum { NVME_AEN_BIT_NS_ATTR = 8, NVME_AEN_BIT_FW_ACT = 9, NVME_AEN_BIT_ANA_CHANGE = 11, NVME_AEN_BIT_DISC_CHANGE = 31, }; enum { NVME_AEN_CFG_NS_ATTR = 1 << NVME_AEN_BIT_NS_ATTR, NVME_AEN_CFG_FW_ACT = 1 << NVME_AEN_BIT_FW_ACT, NVME_AEN_CFG_ANA_CHANGE = 1 << NVME_AEN_BIT_ANA_CHANGE, NVME_AEN_CFG_DISC_CHANGE = 1 << NVME_AEN_BIT_DISC_CHANGE, }; struct nvme_lba_range_type { __u8 type; __u8 attributes; __u8 rsvd2[14]; __le64 slba; __le64 nlb; __u8 guid[16]; __u8 rsvd48[16]; }; enum { NVME_LBART_TYPE_FS = 0x01, NVME_LBART_TYPE_RAID = 0x02, NVME_LBART_TYPE_CACHE = 0x03, NVME_LBART_TYPE_SWAP = 0x04, NVME_LBART_ATTRIB_TEMP = 1 << 0, NVME_LBART_ATTRIB_HIDE = 1 << 1, }; struct nvme_reservation_status { __le32 gen; __u8 rtype; __u8 regctl[2]; __u8 resv5[2]; __u8 ptpls; __u8 resv10[13]; struct { __le16 cntlid; __u8 rcsts; __u8 resv3[5]; __le64 hostid; __le64 rkey; } regctl_ds[]; }; enum nvme_async_event_type { NVME_AER_TYPE_ERROR = 0, NVME_AER_TYPE_SMART = 1, NVME_AER_TYPE_NOTICE = 2, }; /* I/O commands */ enum nvme_opcode { nvme_cmd_flush = 0x00, nvme_cmd_write = 0x01, nvme_cmd_read = 0x02, nvme_cmd_write_uncor = 0x04, nvme_cmd_compare = 0x05, nvme_cmd_write_zeroes = 0x08, nvme_cmd_dsm = 0x09, nvme_cmd_verify = 0x0c, nvme_cmd_resv_register = 0x0d, nvme_cmd_resv_report = 0x0e, nvme_cmd_resv_acquire = 0x11, nvme_cmd_resv_release = 0x15, nvme_cmd_zone_mgmt_send = 0x79, nvme_cmd_zone_mgmt_recv = 0x7a, nvme_cmd_zone_append = 0x7d, }; #define nvme_opcode_name(opcode) { opcode, #opcode } #define show_nvm_opcode_name(val) \ __print_symbolic(val, \ nvme_opcode_name(nvme_cmd_flush), \ nvme_opcode_name(nvme_cmd_write), \ nvme_opcode_name(nvme_cmd_read), \ nvme_opcode_name(nvme_cmd_write_uncor), \ nvme_opcode_name(nvme_cmd_compare), \ nvme_opcode_name(nvme_cmd_write_zeroes), \ nvme_opcode_name(nvme_cmd_dsm), \ nvme_opcode_name(nvme_cmd_resv_register), \ nvme_opcode_name(nvme_cmd_resv_report), \ nvme_opcode_name(nvme_cmd_resv_acquire), \ nvme_opcode_name(nvme_cmd_resv_release), \ nvme_opcode_name(nvme_cmd_zone_mgmt_send), \ nvme_opcode_name(nvme_cmd_zone_mgmt_recv), \ nvme_opcode_name(nvme_cmd_zone_append)) /* * Descriptor subtype - lower 4 bits of nvme_(keyed_)sgl_desc identifier * * @NVME_SGL_FMT_ADDRESS: absolute address of the data block * @NVME_SGL_FMT_OFFSET: relative offset of the in-capsule data block * @NVME_SGL_FMT_TRANSPORT_A: transport defined format, value 0xA * @NVME_SGL_FMT_INVALIDATE: RDMA transport specific remote invalidation * request subtype */ enum { NVME_SGL_FMT_ADDRESS = 0x00, NVME_SGL_FMT_OFFSET = 0x01, NVME_SGL_FMT_TRANSPORT_A = 0x0A, NVME_SGL_FMT_INVALIDATE = 0x0f, }; /* * Descriptor type - upper 4 bits of nvme_(keyed_)sgl_desc identifier * * For struct nvme_sgl_desc: * @NVME_SGL_FMT_DATA_DESC: data block descriptor * @NVME_SGL_FMT_SEG_DESC: sgl segment descriptor * @NVME_SGL_FMT_LAST_SEG_DESC: last sgl segment descriptor * * For struct nvme_keyed_sgl_desc: * @NVME_KEY_SGL_FMT_DATA_DESC: keyed data block descriptor * * Transport-specific SGL types: * @NVME_TRANSPORT_SGL_DATA_DESC: Transport SGL data dlock descriptor */ enum { NVME_SGL_FMT_DATA_DESC = 0x00, NVME_SGL_FMT_SEG_DESC = 0x02, NVME_SGL_FMT_LAST_SEG_DESC = 0x03, NVME_KEY_SGL_FMT_DATA_DESC = 0x04, NVME_TRANSPORT_SGL_DATA_DESC = 0x05, }; struct nvme_sgl_desc { __le64 addr; __le32 length; __u8 rsvd[3]; __u8 type; }; struct nvme_keyed_sgl_desc { __le64 addr; __u8 length[3]; __u8 key[4]; __u8 type; }; union nvme_data_ptr { struct { __le64 prp1; __le64 prp2; }; struct nvme_sgl_desc sgl; struct nvme_keyed_sgl_desc ksgl; }; /* * Lowest two bits of our flags field (FUSE field in the spec): * * @NVME_CMD_FUSE_FIRST: Fused Operation, first command * @NVME_CMD_FUSE_SECOND: Fused Operation, second command * * Highest two bits in our flags field (PSDT field in the spec): * * @NVME_CMD_PSDT_SGL_METABUF: Use SGLS for this transfer, * If used, MPTR contains addr of single physical buffer (byte aligned). * @NVME_CMD_PSDT_SGL_METASEG: Use SGLS for this transfer, * If used, MPTR contains an address of an SGL segment containing * exactly 1 SGL descriptor (qword aligned). */ enum { NVME_CMD_FUSE_FIRST = (1 << 0), NVME_CMD_FUSE_SECOND = (1 << 1), NVME_CMD_SGL_METABUF = (1 << 6), NVME_CMD_SGL_METASEG = (1 << 7), NVME_CMD_SGL_ALL = NVME_CMD_SGL_METABUF | NVME_CMD_SGL_METASEG, }; struct nvme_common_command { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __le32 cdw2[2]; __le64 metadata; union nvme_data_ptr dptr; __le32 cdw10; __le32 cdw11; __le32 cdw12; __le32 cdw13; __le32 cdw14; __le32 cdw15; }; struct nvme_rw_command { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2; __le64 metadata; union nvme_data_ptr dptr; __le64 slba; __le16 length; __le16 control; __le32 dsmgmt; __le32 reftag; __le16 apptag; __le16 appmask; }; enum { NVME_RW_LR = 1 << 15, NVME_RW_FUA = 1 << 14, NVME_RW_APPEND_PIREMAP = 1 << 9, NVME_RW_DSM_FREQ_UNSPEC = 0, NVME_RW_DSM_FREQ_TYPICAL = 1, NVME_RW_DSM_FREQ_RARE = 2, NVME_RW_DSM_FREQ_READS = 3, NVME_RW_DSM_FREQ_WRITES = 4, NVME_RW_DSM_FREQ_RW = 5, NVME_RW_DSM_FREQ_ONCE = 6, NVME_RW_DSM_FREQ_PREFETCH = 7, NVME_RW_DSM_FREQ_TEMP = 8, NVME_RW_DSM_LATENCY_NONE = 0 << 4, NVME_RW_DSM_LATENCY_IDLE = 1 << 4, NVME_RW_DSM_LATENCY_NORM = 2 << 4, NVME_RW_DSM_LATENCY_LOW = 3 << 4, NVME_RW_DSM_SEQ_REQ = 1 << 6, NVME_RW_DSM_COMPRESSED = 1 << 7, NVME_RW_PRINFO_PRCHK_REF = 1 << 10, NVME_RW_PRINFO_PRCHK_APP = 1 << 11, NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12, NVME_RW_PRINFO_PRACT = 1 << 13, NVME_RW_DTYPE_STREAMS = 1 << 4, }; struct nvme_dsm_cmd { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2[2]; union nvme_data_ptr dptr; __le32 nr; __le32 attributes; __u32 rsvd12[4]; }; enum { NVME_DSMGMT_IDR = 1 << 0, NVME_DSMGMT_IDW = 1 << 1, NVME_DSMGMT_AD = 1 << 2, }; #define NVME_DSM_MAX_RANGES 256 struct nvme_dsm_range { __le32 cattr; __le32 nlb; __le64 slba; }; struct nvme_write_zeroes_cmd { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2; __le64 metadata; union nvme_data_ptr dptr; __le64 slba; __le16 length; __le16 control; __le32 dsmgmt; __le32 reftag; __le16 apptag; __le16 appmask; }; enum nvme_zone_mgmt_action { NVME_ZONE_CLOSE = 0x1, NVME_ZONE_FINISH = 0x2, NVME_ZONE_OPEN = 0x3, NVME_ZONE_RESET = 0x4, NVME_ZONE_OFFLINE = 0x5, NVME_ZONE_SET_DESC_EXT = 0x10, }; struct nvme_zone_mgmt_send_cmd { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __le32 cdw2[2]; __le64 metadata; union nvme_data_ptr dptr; __le64 slba; __le32 cdw12; __u8 zsa; __u8 select_all; __u8 rsvd13[2]; __le32 cdw14[2]; }; struct nvme_zone_mgmt_recv_cmd { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __le64 rsvd2[2]; union nvme_data_ptr dptr; __le64 slba; __le32 numd; __u8 zra; __u8 zrasf; __u8 pr; __u8 rsvd13; __le32 cdw14[2]; }; enum { NVME_ZRA_ZONE_REPORT = 0, NVME_ZRASF_ZONE_REPORT_ALL = 0, NVME_ZRASF_ZONE_STATE_EMPTY = 0x01, NVME_ZRASF_ZONE_STATE_IMP_OPEN = 0x02, NVME_ZRASF_ZONE_STATE_EXP_OPEN = 0x03, NVME_ZRASF_ZONE_STATE_CLOSED = 0x04, NVME_ZRASF_ZONE_STATE_READONLY = 0x05, NVME_ZRASF_ZONE_STATE_FULL = 0x06, NVME_ZRASF_ZONE_STATE_OFFLINE = 0x07, NVME_REPORT_ZONE_PARTIAL = 1, }; /* Features */ enum { NVME_TEMP_THRESH_MASK = 0xffff, NVME_TEMP_THRESH_SELECT_SHIFT = 16, NVME_TEMP_THRESH_TYPE_UNDER = 0x100000, }; struct nvme_feat_auto_pst { __le64 entries[32]; }; enum { NVME_HOST_MEM_ENABLE = (1 << 0), NVME_HOST_MEM_RETURN = (1 << 1), }; struct nvme_feat_host_behavior { __u8 acre; __u8 resv1[511]; }; enum { NVME_ENABLE_ACRE = 1, }; /* Admin commands */ enum nvme_admin_opcode { nvme_admin_delete_sq = 0x00, nvme_admin_create_sq = 0x01, nvme_admin_get_log_page = 0x02, nvme_admin_delete_cq = 0x04, nvme_admin_create_cq = 0x05, nvme_admin_identify = 0x06, nvme_admin_abort_cmd = 0x08, nvme_admin_set_features = 0x09, nvme_admin_get_features = 0x0a, nvme_admin_async_event = 0x0c, nvme_admin_ns_mgmt = 0x0d, nvme_admin_activate_fw = 0x10, nvme_admin_download_fw = 0x11, nvme_admin_dev_self_test = 0x14, nvme_admin_ns_attach = 0x15, nvme_admin_keep_alive = 0x18, nvme_admin_directive_send = 0x19, nvme_admin_directive_recv = 0x1a, nvme_admin_virtual_mgmt = 0x1c, nvme_admin_nvme_mi_send = 0x1d, nvme_admin_nvme_mi_recv = 0x1e, nvme_admin_dbbuf = 0x7C, nvme_admin_format_nvm = 0x80, nvme_admin_security_send = 0x81, nvme_admin_security_recv = 0x82, nvme_admin_sanitize_nvm = 0x84, nvme_admin_get_lba_status = 0x86, nvme_admin_vendor_start = 0xC0, }; #define nvme_admin_opcode_name(opcode) { opcode, #opcode } #define show_admin_opcode_name(val) \ __print_symbolic(val, \ nvme_admin_opcode_name(nvme_admin_delete_sq), \ nvme_admin_opcode_name(nvme_admin_create_sq), \ nvme_admin_opcode_name(nvme_admin_get_log_page), \ nvme_admin_opcode_name(nvme_admin_delete_cq), \ nvme_admin_opcode_name(nvme_admin_create_cq), \ nvme_admin_opcode_name(nvme_admin_identify), \ nvme_admin_opcode_name(nvme_admin_abort_cmd), \ nvme_admin_opcode_name(nvme_admin_set_features), \ nvme_admin_opcode_name(nvme_admin_get_features), \ nvme_admin_opcode_name(nvme_admin_async_event), \ nvme_admin_opcode_name(nvme_admin_ns_mgmt), \ nvme_admin_opcode_name(nvme_admin_activate_fw), \ nvme_admin_opcode_name(nvme_admin_download_fw), \ nvme_admin_opcode_name(nvme_admin_ns_attach), \ nvme_admin_opcode_name(nvme_admin_keep_alive), \ nvme_admin_opcode_name(nvme_admin_directive_send), \ nvme_admin_opcode_name(nvme_admin_directive_recv), \ nvme_admin_opcode_name(nvme_admin_dbbuf), \ nvme_admin_opcode_name(nvme_admin_format_nvm), \ nvme_admin_opcode_name(nvme_admin_security_send), \ nvme_admin_opcode_name(nvme_admin_security_recv), \ nvme_admin_opcode_name(nvme_admin_sanitize_nvm), \ nvme_admin_opcode_name(nvme_admin_get_lba_status)) enum { NVME_QUEUE_PHYS_CONTIG = (1 << 0), NVME_CQ_IRQ_ENABLED = (1 << 1), NVME_SQ_PRIO_URGENT = (0 << 1), NVME_SQ_PRIO_HIGH = (1 << 1), NVME_SQ_PRIO_MEDIUM = (2 << 1), NVME_SQ_PRIO_LOW = (3 << 1), NVME_FEAT_ARBITRATION = 0x01, NVME_FEAT_POWER_MGMT = 0x02, NVME_FEAT_LBA_RANGE = 0x03, NVME_FEAT_TEMP_THRESH = 0x04, NVME_FEAT_ERR_RECOVERY = 0x05, NVME_FEAT_VOLATILE_WC = 0x06, NVME_FEAT_NUM_QUEUES = 0x07, NVME_FEAT_IRQ_COALESCE = 0x08, NVME_FEAT_IRQ_CONFIG = 0x09, NVME_FEAT_WRITE_ATOMIC = 0x0a, NVME_FEAT_ASYNC_EVENT = 0x0b, NVME_FEAT_AUTO_PST = 0x0c, NVME_FEAT_HOST_MEM_BUF = 0x0d, NVME_FEAT_TIMESTAMP = 0x0e, NVME_FEAT_KATO = 0x0f, NVME_FEAT_HCTM = 0x10, NVME_FEAT_NOPSC = 0x11, NVME_FEAT_RRL = 0x12, NVME_FEAT_PLM_CONFIG = 0x13, NVME_FEAT_PLM_WINDOW = 0x14, NVME_FEAT_HOST_BEHAVIOR = 0x16, NVME_FEAT_SANITIZE = 0x17, NVME_FEAT_SW_PROGRESS = 0x80, NVME_FEAT_HOST_ID = 0x81, NVME_FEAT_RESV_MASK = 0x82, NVME_FEAT_RESV_PERSIST = 0x83, NVME_FEAT_WRITE_PROTECT = 0x84, NVME_FEAT_VENDOR_START = 0xC0, NVME_FEAT_VENDOR_END = 0xFF, NVME_LOG_ERROR = 0x01, NVME_LOG_SMART = 0x02, NVME_LOG_FW_SLOT = 0x03, NVME_LOG_CHANGED_NS = 0x04, NVME_LOG_CMD_EFFECTS = 0x05, NVME_LOG_DEVICE_SELF_TEST = 0x06, NVME_LOG_TELEMETRY_HOST = 0x07, NVME_LOG_TELEMETRY_CTRL = 0x08, NVME_LOG_ENDURANCE_GROUP = 0x09, NVME_LOG_ANA = 0x0c, NVME_LOG_DISC = 0x70, NVME_LOG_RESERVATION = 0x80, NVME_FWACT_REPL = (0 << 3), NVME_FWACT_REPL_ACTV = (1 << 3), NVME_FWACT_ACTV = (2 << 3), }; /* NVMe Namespace Write Protect State */ enum { NVME_NS_NO_WRITE_PROTECT = 0, NVME_NS_WRITE_PROTECT, NVME_NS_WRITE_PROTECT_POWER_CYCLE, NVME_NS_WRITE_PROTECT_PERMANENT, }; #define NVME_MAX_CHANGED_NAMESPACES 1024 struct nvme_identify { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2[2]; union nvme_data_ptr dptr; __u8 cns; __u8 rsvd3; __le16 ctrlid; __u8 rsvd11[3]; __u8 csi; __u32 rsvd12[4]; }; #define NVME_IDENTIFY_DATA_SIZE 4096 struct nvme_features { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2[2]; union nvme_data_ptr dptr; __le32 fid; __le32 dword11; __le32 dword12; __le32 dword13; __le32 dword14; __le32 dword15; }; struct nvme_host_mem_buf_desc { __le64 addr; __le32 size; __u32 rsvd; }; struct nvme_create_cq { __u8 opcode; __u8 flags; __u16 command_id; __u32 rsvd1[5]; __le64 prp1; __u64 rsvd8; __le16 cqid; __le16 qsize; __le16 cq_flags; __le16 irq_vector; __u32 rsvd12[4]; }; struct nvme_create_sq { __u8 opcode; __u8 flags; __u16 command_id; __u32 rsvd1[5]; __le64 prp1; __u64 rsvd8; __le16 sqid; __le16 qsize; __le16 sq_flags; __le16 cqid; __u32 rsvd12[4]; }; struct nvme_delete_queue { __u8 opcode; __u8 flags; __u16 command_id; __u32 rsvd1[9]; __le16 qid; __u16 rsvd10; __u32 rsvd11[5]; }; struct nvme_abort_cmd { __u8 opcode; __u8 flags; __u16 command_id; __u32 rsvd1[9]; __le16 sqid; __u16 cid; __u32 rsvd11[5]; }; struct nvme_download_firmware { __u8 opcode; __u8 flags; __u16 command_id; __u32 rsvd1[5]; union nvme_data_ptr dptr; __le32 numd; __le32 offset; __u32 rsvd12[4]; }; struct nvme_format_cmd { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2[4]; __le32 cdw10; __u32 rsvd11[5]; }; struct nvme_get_log_page_command { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2[2]; union nvme_data_ptr dptr; __u8 lid; __u8 lsp; /* upper 4 bits reserved */ __le16 numdl; __le16 numdu; __u16 rsvd11; union { struct { __le32 lpol; __le32 lpou; }; __le64 lpo; }; __u8 rsvd14[3]; __u8 csi; __u32 rsvd15; }; struct nvme_directive_cmd { __u8 opcode; __u8 flags; __u16 command_id; __le32 nsid; __u64 rsvd2[2]; union nvme_data_ptr dptr; __le32 numd; __u8 doper; __u8 dtype; __le16 dspec; __u8 endir; __u8 tdtype; __u16 rsvd15; __u32 rsvd16[3]; }; /* * Fabrics subcommands. */ enum nvmf_fabrics_opcode { nvme_fabrics_command = 0x7f, }; enum nvmf_capsule_command { nvme_fabrics_type_property_set = 0x00, nvme_fabrics_type_connect = 0x01, nvme_fabrics_type_property_get = 0x04, }; #define nvme_fabrics_type_name(type) { type, #type } #define show_fabrics_type_name(type) \ __print_symbolic(type, \ nvme_fabrics_type_name(nvme_fabrics_type_property_set), \ nvme_fabrics_type_name(nvme_fabrics_type_connect), \ nvme_fabrics_type_name(nvme_fabrics_type_property_get)) /* * If not fabrics command, fctype will be ignored. */ #define show_opcode_name(qid, opcode, fctype) \ ((opcode) == nvme_fabrics_command ? \ show_fabrics_type_name(fctype) : \ ((qid) ? \ show_nvm_opcode_name(opcode) : \ show_admin_opcode_name(opcode))) struct nvmf_common_command { __u8 opcode; __u8 resv1; __u16 command_id; __u8 fctype; __u8 resv2[35]; __u8 ts[24]; }; /* * The legal cntlid range a NVMe Target will provide. * Note that cntlid of value 0 is considered illegal in the fabrics world. * Devices based on earlier specs did not have the subsystem concept; * therefore, those devices had their cntlid value set to 0 as a result. */ #define NVME_CNTLID_MIN 1 #define NVME_CNTLID_MAX 0xffef #define NVME_CNTLID_DYNAMIC 0xffff #define MAX_DISC_LOGS 255 /* Discovery log page entry */ struct nvmf_disc_rsp_page_entry { __u8 trtype; __u8 adrfam; __u8 subtype; __u8 treq; __le16 portid; __le16 cntlid; __le16 asqsz; __u8 resv8[22]; char trsvcid[NVMF_TRSVCID_SIZE]; __u8 resv64[192]; char subnqn[NVMF_NQN_FIELD_LEN]; char traddr[NVMF_TRADDR_SIZE]; union tsas { char common[NVMF_TSAS_SIZE]; struct rdma { __u8 qptype; __u8 prtype; __u8 cms; __u8 resv3[5]; __u16 pkey; __u8 resv10[246]; } rdma; } tsas; }; /* Discovery log page header */ struct nvmf_disc_rsp_page_hdr { __le64 genctr; __le64 numrec; __le16 recfmt; __u8 resv14[1006]; struct nvmf_disc_rsp_page_entry entries[]; }; enum { NVME_CONNECT_DISABLE_SQFLOW = (1 << 2), }; struct nvmf_connect_command { __u8 opcode; __u8 resv1; __u16 command_id; __u8 fctype; __u8 resv2[19]; union nvme_data_ptr dptr; __le16 recfmt; __le16 qid; __le16 sqsize; __u8 cattr; __u8 resv3; __le32 kato; __u8 resv4[12]; }; struct nvmf_connect_data { uuid_t hostid; __le16 cntlid; char resv4[238]; char subsysnqn[NVMF_NQN_FIELD_LEN]; char hostnqn[NVMF_NQN_FIELD_LEN]; char resv5[256]; }; struct nvmf_property_set_command { __u8 opcode; __u8 resv1; __u16 command_id; __u8 fctype; __u8 resv2[35]; __u8 attrib; __u8 resv3[3]; __le32 offset; __le64 value; __u8 resv4[8]; }; struct nvmf_property_get_command { __u8 opcode; __u8 resv1; __u16 command_id; __u8 fctype; __u8 resv2[35]; __u8 attrib; __u8 resv3[3]; __le32 offset; __u8 resv4[16]; }; struct nvme_dbbuf { __u8 opcode; __u8 flags; __u16 command_id; __u32 rsvd1[5]; __le64 prp1; __le64 prp2; __u32 rsvd12[6]; }; struct streams_directive_params { __le16 msl; __le16 nssa; __le16 nsso; __u8 rsvd[10]; __le32 sws; __le16 sgs; __le16 nsa; __le16 nso; __u8 rsvd2[6]; }; struct nvme_command { union { struct nvme_common_command common; struct nvme_rw_command rw; struct nvme_identify identify; struct nvme_features features; struct nvme_create_cq create_cq; struct nvme_create_sq create_sq; struct nvme_delete_queue delete_queue; struct nvme_download_firmware dlfw; struct nvme_format_cmd format; struct nvme_dsm_cmd dsm; struct nvme_write_zeroes_cmd write_zeroes; struct nvme_zone_mgmt_send_cmd zms; struct nvme_zone_mgmt_recv_cmd zmr; struct nvme_abort_cmd abort; struct nvme_get_log_page_command get_log_page; struct nvmf_common_command fabrics; struct nvmf_connect_command connect; struct nvmf_property_set_command prop_set; struct nvmf_property_get_command prop_get; struct nvme_dbbuf dbbuf; struct nvme_directive_cmd directive; }; }; static inline bool nvme_is_fabrics(struct nvme_command *cmd) { return cmd->common.opcode == nvme_fabrics_command; } struct nvme_error_slot { __le64 error_count; __le16 sqid; __le16 cmdid; __le16 status_field; __le16 param_error_location; __le64 lba; __le32 nsid; __u8 vs; __u8 resv[3]; __le64 cs; __u8 resv2[24]; }; static inline bool nvme_is_write(struct nvme_command *cmd) { /* * What a mess... * * Why can't we simply have a Fabrics In and Fabrics out command? */ if (unlikely(nvme_is_fabrics(cmd))) return cmd->fabrics.fctype & 1; return cmd->common.opcode & 1; } enum { /* * Generic Command Status: */ NVME_SC_SUCCESS = 0x0, NVME_SC_INVALID_OPCODE = 0x1, NVME_SC_INVALID_FIELD = 0x2, NVME_SC_CMDID_CONFLICT = 0x3, NVME_SC_DATA_XFER_ERROR = 0x4, NVME_SC_POWER_LOSS = 0x5, NVME_SC_INTERNAL = 0x6, NVME_SC_ABORT_REQ = 0x7, NVME_SC_ABORT_QUEUE = 0x8, NVME_SC_FUSED_FAIL = 0x9, NVME_SC_FUSED_MISSING = 0xa, NVME_SC_INVALID_NS = 0xb, NVME_SC_CMD_SEQ_ERROR = 0xc, NVME_SC_SGL_INVALID_LAST = 0xd, NVME_SC_SGL_INVALID_COUNT = 0xe, NVME_SC_SGL_INVALID_DATA = 0xf, NVME_SC_SGL_INVALID_METADATA = 0x10, NVME_SC_SGL_INVALID_TYPE = 0x11, NVME_SC_CMB_INVALID_USE = 0x12, NVME_SC_PRP_INVALID_OFFSET = 0x13, NVME_SC_ATOMIC_WU_EXCEEDED = 0x14, NVME_SC_OP_DENIED = 0x15, NVME_SC_SGL_INVALID_OFFSET = 0x16, NVME_SC_RESERVED = 0x17, NVME_SC_HOST_ID_INCONSIST = 0x18, NVME_SC_KA_TIMEOUT_EXPIRED = 0x19, NVME_SC_KA_TIMEOUT_INVALID = 0x1A, NVME_SC_ABORTED_PREEMPT_ABORT = 0x1B, NVME_SC_SANITIZE_FAILED = 0x1C, NVME_SC_SANITIZE_IN_PROGRESS = 0x1D, NVME_SC_SGL_INVALID_GRANULARITY = 0x1E, NVME_SC_CMD_NOT_SUP_CMB_QUEUE = 0x1F, NVME_SC_NS_WRITE_PROTECTED = 0x20, NVME_SC_CMD_INTERRUPTED = 0x21, NVME_SC_TRANSIENT_TR_ERR = 0x22, NVME_SC_INVALID_IO_CMD_SET = 0x2C, NVME_SC_LBA_RANGE = 0x80, NVME_SC_CAP_EXCEEDED = 0x81, NVME_SC_NS_NOT_READY = 0x82, NVME_SC_RESERVATION_CONFLICT = 0x83, NVME_SC_FORMAT_IN_PROGRESS = 0x84, /* * Command Specific Status: */ NVME_SC_CQ_INVALID = 0x100, NVME_SC_QID_INVALID = 0x101, NVME_SC_QUEUE_SIZE = 0x102, NVME_SC_ABORT_LIMIT = 0x103, NVME_SC_ABORT_MISSING = 0x104, NVME_SC_ASYNC_LIMIT = 0x105, NVME_SC_FIRMWARE_SLOT = 0x106, NVME_SC_FIRMWARE_IMAGE = 0x107, NVME_SC_INVALID_VECTOR = 0x108, NVME_SC_INVALID_LOG_PAGE = 0x109, NVME_SC_INVALID_FORMAT = 0x10a, NVME_SC_FW_NEEDS_CONV_RESET = 0x10b, NVME_SC_INVALID_QUEUE = 0x10c, NVME_SC_FEATURE_NOT_SAVEABLE = 0x10d, NVME_SC_FEATURE_NOT_CHANGEABLE = 0x10e, NVME_SC_FEATURE_NOT_PER_NS = 0x10f, NVME_SC_FW_NEEDS_SUBSYS_RESET = 0x110, NVME_SC_FW_NEEDS_RESET = 0x111, NVME_SC_FW_NEEDS_MAX_TIME = 0x112, NVME_SC_FW_ACTIVATE_PROHIBITED = 0x113, NVME_SC_OVERLAPPING_RANGE = 0x114, NVME_SC_NS_INSUFFICIENT_CAP = 0x115, NVME_SC_NS_ID_UNAVAILABLE = 0x116, NVME_SC_NS_ALREADY_ATTACHED = 0x118, NVME_SC_NS_IS_PRIVATE = 0x119, NVME_SC_NS_NOT_ATTACHED = 0x11a, NVME_SC_THIN_PROV_NOT_SUPP = 0x11b, NVME_SC_CTRL_LIST_INVALID = 0x11c, NVME_SC_SELT_TEST_IN_PROGRESS = 0x11d, NVME_SC_BP_WRITE_PROHIBITED = 0x11e, NVME_SC_CTRL_ID_INVALID = 0x11f, NVME_SC_SEC_CTRL_STATE_INVALID = 0x120, NVME_SC_CTRL_RES_NUM_INVALID = 0x121, NVME_SC_RES_ID_INVALID = 0x122, NVME_SC_PMR_SAN_PROHIBITED = 0x123, NVME_SC_ANA_GROUP_ID_INVALID = 0x124, NVME_SC_ANA_ATTACH_FAILED = 0x125, /* * I/O Command Set Specific - NVM commands: */ NVME_SC_BAD_ATTRIBUTES = 0x180, NVME_SC_INVALID_PI = 0x181, NVME_SC_READ_ONLY = 0x182, NVME_SC_ONCS_NOT_SUPPORTED = 0x183, /* * I/O Command Set Specific - Fabrics commands: */ NVME_SC_CONNECT_FORMAT = 0x180, NVME_SC_CONNECT_CTRL_BUSY = 0x181, NVME_SC_CONNECT_INVALID_PARAM = 0x182, NVME_SC_CONNECT_RESTART_DISC = 0x183, NVME_SC_CONNECT_INVALID_HOST = 0x184, NVME_SC_DISCOVERY_RESTART = 0x190, NVME_SC_AUTH_REQUIRED = 0x191, /* * I/O Command Set Specific - Zoned commands: */ NVME_SC_ZONE_BOUNDARY_ERROR = 0x1b8, NVME_SC_ZONE_FULL = 0x1b9, NVME_SC_ZONE_READ_ONLY = 0x1ba, NVME_SC_ZONE_OFFLINE = 0x1bb, NVME_SC_ZONE_INVALID_WRITE = 0x1bc, NVME_SC_ZONE_TOO_MANY_ACTIVE = 0x1bd, NVME_SC_ZONE_TOO_MANY_OPEN = 0x1be, NVME_SC_ZONE_INVALID_TRANSITION = 0x1bf, /* * Media and Data Integrity Errors: */ NVME_SC_WRITE_FAULT = 0x280, NVME_SC_READ_ERROR = 0x281, NVME_SC_GUARD_CHECK = 0x282, NVME_SC_APPTAG_CHECK = 0x283, NVME_SC_REFTAG_CHECK = 0x284, NVME_SC_COMPARE_FAILED = 0x285, NVME_SC_ACCESS_DENIED = 0x286, NVME_SC_UNWRITTEN_BLOCK = 0x287, /* * Path-related Errors: */ NVME_SC_ANA_PERSISTENT_LOSS = 0x301, NVME_SC_ANA_INACCESSIBLE = 0x302, NVME_SC_ANA_TRANSITION = 0x303, NVME_SC_HOST_PATH_ERROR = 0x370, NVME_SC_HOST_ABORTED_CMD = 0x371, NVME_SC_CRD = 0x1800, NVME_SC_DNR = 0x4000, }; struct nvme_completion { /* * Used by Admin and Fabrics commands to return data: */ union nvme_result { __le16 u16; __le32 u32; __le64 u64; } result; __le16 sq_head; /* how much of this queue may be reclaimed */ __le16 sq_id; /* submission queue that generated this entry */ __u16 command_id; /* of the command which completed */ __le16 status; /* did the command fail, and if so, why? */ }; #define NVME_VS(major, minor, tertiary) \ (((major) << 16) | ((minor) << 8) | (tertiary)) #define NVME_MAJOR(ver) ((ver) >> 16) #define NVME_MINOR(ver) (((ver) >> 8) & 0xff) #define NVME_TERTIARY(ver) ((ver) & 0xff) #endif /* _LINUX_NVME_H */ PK ! 4 3� mlx4/driver.hnu �[��� /* * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_DRIVER_H #define MLX4_DRIVER_H #include <net/devlink.h> #include <linux/mlx4/device.h> struct mlx4_dev; #define MLX4_MAC_MASK 0xffffffffffffULL enum mlx4_dev_event { MLX4_DEV_EVENT_CATASTROPHIC_ERROR, MLX4_DEV_EVENT_PORT_UP, MLX4_DEV_EVENT_PORT_DOWN, MLX4_DEV_EVENT_PORT_REINIT, MLX4_DEV_EVENT_PORT_MGMT_CHANGE, MLX4_DEV_EVENT_SLAVE_INIT, MLX4_DEV_EVENT_SLAVE_SHUTDOWN, }; enum { MLX4_INTFF_BONDING = 1 << 0 }; struct mlx4_interface { void * (*add) (struct mlx4_dev *dev); void (*remove)(struct mlx4_dev *dev, void *context); void (*event) (struct mlx4_dev *dev, void *context, enum mlx4_dev_event event, unsigned long param); void * (*get_dev)(struct mlx4_dev *dev, void *context, u8 port); void (*activate)(struct mlx4_dev *dev, void *context); struct list_head list; enum mlx4_protocol protocol; int flags; }; int mlx4_register_interface(struct mlx4_interface *intf); void mlx4_unregister_interface(struct mlx4_interface *intf); int mlx4_bond(struct mlx4_dev *dev); int mlx4_unbond(struct mlx4_dev *dev); static inline int mlx4_is_bonded(struct mlx4_dev *dev) { return !!(dev->flags & MLX4_FLAG_BONDED); } static inline int mlx4_is_mf_bonded(struct mlx4_dev *dev) { return (mlx4_is_bonded(dev) && mlx4_is_mfunc(dev)); } struct mlx4_port_map { u8 port1; u8 port2; }; int mlx4_port_map_set(struct mlx4_dev *dev, struct mlx4_port_map *v2p); void *mlx4_get_protocol_dev(struct mlx4_dev *dev, enum mlx4_protocol proto, int port); struct devlink_port *mlx4_get_devlink_port(struct mlx4_dev *dev, int port); static inline u64 mlx4_mac_to_u64(u8 *addr) { u64 mac = 0; int i; for (i = 0; i < ETH_ALEN; i++) { mac <<= 8; mac |= addr[i]; } return mac; } static inline void mlx4_u64_to_mac(u8 *addr, u64 mac) { int i; for (i = ETH_ALEN; i > 0; i--) { addr[i - 1] = mac & 0xFF; mac >>= 8; } } #endif /* MLX4_DRIVER_H */ PK ! ��TN N mlx4/doorbell.hnu �[��� /* * Copyright (c) 2004 Topspin Communications. All rights reserved. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. * Copyright (c) 2005 Mellanox Technologies. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_DOORBELL_H #define MLX4_DOORBELL_H #include <linux/types.h> #include <linux/io.h> #define MLX4_SEND_DOORBELL 0x14 #define MLX4_CQ_DOORBELL 0x20 #if BITS_PER_LONG == 64 /* * Assume that we can just write a 64-bit doorbell atomically. s390 * actually doesn't have writeq() but S/390 systems don't even have * PCI so we won't worry about it. */ #define MLX4_DECLARE_DOORBELL_LOCK(name) #define MLX4_INIT_DOORBELL_LOCK(ptr) do { } while (0) #define MLX4_GET_DOORBELL_LOCK(ptr) (NULL) static inline void mlx4_write64(__be32 val[2], void __iomem *dest, spinlock_t *doorbell_lock) { __raw_writeq(*(u64 *) val, dest); } #else /* * Just fall back to a spinlock to protect the doorbell if * BITS_PER_LONG is 32 -- there's no portable way to do atomic 64-bit * MMIO writes. */ #define MLX4_DECLARE_DOORBELL_LOCK(name) spinlock_t name; #define MLX4_INIT_DOORBELL_LOCK(ptr) spin_lock_init(ptr) #define MLX4_GET_DOORBELL_LOCK(ptr) (ptr) static inline void mlx4_write64(__be32 val[2], void __iomem *dest, spinlock_t *doorbell_lock) { unsigned long flags; spin_lock_irqsave(doorbell_lock, flags); __raw_writel((__force u32) val[0], dest); __raw_writel((__force u32) val[1], dest + 4); spin_unlock_irqrestore(doorbell_lock, flags); } #endif #endif /* MLX4_DOORBELL_H */ PK ! �(gu0 u0 mlx4/qp.hnu �[��� /* * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_QP_H #define MLX4_QP_H #include <linux/types.h> #include <linux/if_ether.h> #include <linux/mlx4/device.h> #define MLX4_INVALID_LKEY 0x100 enum mlx4_qp_optpar { MLX4_QP_OPTPAR_ALT_ADDR_PATH = 1 << 0, MLX4_QP_OPTPAR_RRE = 1 << 1, MLX4_QP_OPTPAR_RAE = 1 << 2, MLX4_QP_OPTPAR_RWE = 1 << 3, MLX4_QP_OPTPAR_PKEY_INDEX = 1 << 4, MLX4_QP_OPTPAR_Q_KEY = 1 << 5, MLX4_QP_OPTPAR_RNR_TIMEOUT = 1 << 6, MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH = 1 << 7, MLX4_QP_OPTPAR_SRA_MAX = 1 << 8, MLX4_QP_OPTPAR_RRA_MAX = 1 << 9, MLX4_QP_OPTPAR_PM_STATE = 1 << 10, MLX4_QP_OPTPAR_RETRY_COUNT = 1 << 12, MLX4_QP_OPTPAR_RNR_RETRY = 1 << 13, MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 << 14, MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16, MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20, MLX4_QP_OPTPAR_VLAN_STRIPPING = 1 << 21, }; enum mlx4_qp_state { MLX4_QP_STATE_RST = 0, MLX4_QP_STATE_INIT = 1, MLX4_QP_STATE_RTR = 2, MLX4_QP_STATE_RTS = 3, MLX4_QP_STATE_SQER = 4, MLX4_QP_STATE_SQD = 5, MLX4_QP_STATE_ERR = 6, MLX4_QP_STATE_SQ_DRAINING = 7, MLX4_QP_NUM_STATE }; enum { MLX4_QP_ST_RC = 0x0, MLX4_QP_ST_UC = 0x1, MLX4_QP_ST_RD = 0x2, MLX4_QP_ST_UD = 0x3, MLX4_QP_ST_XRC = 0x6, MLX4_QP_ST_MLX = 0x7 }; enum { MLX4_QP_PM_MIGRATED = 0x3, MLX4_QP_PM_ARMED = 0x0, MLX4_QP_PM_REARM = 0x1 }; enum { /* params1 */ MLX4_QP_BIT_SRE = 1 << 15, MLX4_QP_BIT_SWE = 1 << 14, MLX4_QP_BIT_SAE = 1 << 13, /* params2 */ MLX4_QP_BIT_RRE = 1 << 15, MLX4_QP_BIT_RWE = 1 << 14, MLX4_QP_BIT_RAE = 1 << 13, MLX4_QP_BIT_FPP = 1 << 3, MLX4_QP_BIT_RIC = 1 << 4, }; enum { MLX4_RSS_HASH_XOR = 0, MLX4_RSS_HASH_TOP = 1, MLX4_RSS_UDP_IPV6 = 1 << 0, MLX4_RSS_UDP_IPV4 = 1 << 1, MLX4_RSS_TCP_IPV6 = 1 << 2, MLX4_RSS_IPV6 = 1 << 3, MLX4_RSS_TCP_IPV4 = 1 << 4, MLX4_RSS_IPV4 = 1 << 5, MLX4_RSS_BY_OUTER_HEADERS = 0 << 6, MLX4_RSS_BY_INNER_HEADERS = 2 << 6, MLX4_RSS_BY_INNER_HEADERS_IPONLY = 3 << 6, /* offset of mlx4_rss_context within mlx4_qp_context.pri_path */ MLX4_RSS_OFFSET_IN_QPC_PRI_PATH = 0x24, /* offset of being RSS indirection QP within mlx4_qp_context.flags */ MLX4_RSS_QPC_FLAG_OFFSET = 13, }; #define MLX4_EN_RSS_KEY_SIZE 40 struct mlx4_rss_context { __be32 base_qpn; __be32 default_qpn; u16 reserved; u8 hash_fn; u8 flags; __be32 rss_key[MLX4_EN_RSS_KEY_SIZE / sizeof(__be32)]; __be32 base_qpn_udp; }; struct mlx4_qp_path { u8 fl; union { u8 vlan_control; u8 control; }; u8 disable_pkey_check; u8 pkey_index; u8 counter_index; u8 grh_mylmc; __be16 rlid; u8 ackto; u8 mgid_index; u8 static_rate; u8 hop_limit; __be32 tclass_flowlabel; u8 rgid[16]; u8 sched_queue; u8 vlan_index; u8 feup; u8 fvl_rx; u8 reserved4[2]; u8 dmac[ETH_ALEN]; }; enum { /* fl */ MLX4_FL_CV = 1 << 6, MLX4_FL_SV = 1 << 5, MLX4_FL_ETH_HIDE_CQE_VLAN = 1 << 2, MLX4_FL_ETH_SRC_CHECK_MC_LB = 1 << 1, MLX4_FL_ETH_SRC_CHECK_UC_LB = 1 << 0, }; enum { /* control */ MLX4_CTRL_ETH_SRC_CHECK_IF_COUNTER = 1 << 7, }; enum { /* vlan_control */ MLX4_VLAN_CTRL_ETH_TX_BLOCK_TAGGED = 1 << 6, MLX4_VLAN_CTRL_ETH_TX_BLOCK_PRIO_TAGGED = 1 << 5, /* 802.1p priority tag */ MLX4_VLAN_CTRL_ETH_TX_BLOCK_UNTAGGED = 1 << 4, MLX4_VLAN_CTRL_ETH_RX_BLOCK_TAGGED = 1 << 2, MLX4_VLAN_CTRL_ETH_RX_BLOCK_PRIO_TAGGED = 1 << 1, /* 802.1p priority tag */ MLX4_VLAN_CTRL_ETH_RX_BLOCK_UNTAGGED = 1 << 0 }; enum { /* feup */ MLX4_FEUP_FORCE_ETH_UP = 1 << 6, /* force Eth UP */ MLX4_FSM_FORCE_ETH_SRC_MAC = 1 << 5, /* force Source MAC */ MLX4_FVL_FORCE_ETH_VLAN = 1 << 3 /* force Eth vlan */ }; enum { /* fvl_rx */ MLX4_FVL_RX_FORCE_ETH_VLAN = 1 << 0 /* enforce Eth rx vlan */ }; struct mlx4_qp_context { __be32 flags; __be32 pd; u8 mtu_msgmax; u8 rq_size_stride; u8 sq_size_stride; u8 rlkey_roce_mode; __be32 usr_page; __be32 local_qpn; __be32 remote_qpn; struct mlx4_qp_path pri_path; struct mlx4_qp_path alt_path; __be32 params1; u32 reserved1; __be32 next_send_psn; __be32 cqn_send; __be16 roce_entropy; __be16 reserved2[3]; __be32 last_acked_psn; __be32 ssn; __be32 params2; __be32 rnr_nextrecvpsn; __be32 xrcd; __be32 cqn_recv; __be64 db_rec_addr; __be32 qkey; __be32 srqn; __be32 msn; __be16 rq_wqe_counter; __be16 sq_wqe_counter; u32 reserved3; __be16 rate_limit_params; u8 reserved4; u8 qos_vport; __be32 param3; __be32 nummmcpeers_basemkey; u8 log_page_size; u8 reserved5[2]; u8 mtt_base_addr_h; __be32 mtt_base_addr_l; u32 reserved6[10]; }; struct mlx4_update_qp_context { __be64 qp_mask; __be64 primary_addr_path_mask; __be64 secondary_addr_path_mask; u64 reserved1; struct mlx4_qp_context qp_context; u64 reserved2[58]; }; enum { MLX4_UPD_QP_MASK_PM_STATE = 32, MLX4_UPD_QP_MASK_VSD = 33, MLX4_UPD_QP_MASK_QOS_VPP = 34, MLX4_UPD_QP_MASK_RATE_LIMIT = 35, }; enum { MLX4_UPD_QP_PATH_MASK_PKEY_INDEX = 0 + 32, MLX4_UPD_QP_PATH_MASK_FSM = 1 + 32, MLX4_UPD_QP_PATH_MASK_MAC_INDEX = 2 + 32, MLX4_UPD_QP_PATH_MASK_FVL = 3 + 32, MLX4_UPD_QP_PATH_MASK_CV = 4 + 32, MLX4_UPD_QP_PATH_MASK_VLAN_INDEX = 5 + 32, MLX4_UPD_QP_PATH_MASK_ETH_HIDE_CQE_VLAN = 6 + 32, MLX4_UPD_QP_PATH_MASK_ETH_TX_BLOCK_UNTAGGED = 7 + 32, MLX4_UPD_QP_PATH_MASK_ETH_TX_BLOCK_1P = 8 + 32, MLX4_UPD_QP_PATH_MASK_ETH_TX_BLOCK_TAGGED = 9 + 32, MLX4_UPD_QP_PATH_MASK_ETH_RX_BLOCK_UNTAGGED = 10 + 32, MLX4_UPD_QP_PATH_MASK_ETH_RX_BLOCK_1P = 11 + 32, MLX4_UPD_QP_PATH_MASK_ETH_RX_BLOCK_TAGGED = 12 + 32, MLX4_UPD_QP_PATH_MASK_FEUP = 13 + 32, MLX4_UPD_QP_PATH_MASK_SCHED_QUEUE = 14 + 32, MLX4_UPD_QP_PATH_MASK_IF_COUNTER_INDEX = 15 + 32, MLX4_UPD_QP_PATH_MASK_FVL_RX = 16 + 32, MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_UC_LB = 18 + 32, MLX4_UPD_QP_PATH_MASK_ETH_SRC_CHECK_MC_LB = 19 + 32, MLX4_UPD_QP_PATH_MASK_SV = 22 + 32, }; enum { /* param3 */ MLX4_STRIP_VLAN = 1 << 30 }; /* Which firmware version adds support for NEC (NoErrorCompletion) bit */ #define MLX4_FW_VER_WQE_CTRL_NEC mlx4_fw_ver(2, 2, 232) enum { MLX4_WQE_CTRL_NEC = 1 << 29, MLX4_WQE_CTRL_IIP = 1 << 28, MLX4_WQE_CTRL_ILP = 1 << 27, MLX4_WQE_CTRL_FENCE = 1 << 6, MLX4_WQE_CTRL_CQ_UPDATE = 3 << 2, MLX4_WQE_CTRL_SOLICITED = 1 << 1, MLX4_WQE_CTRL_IP_CSUM = 1 << 4, MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, MLX4_WQE_CTRL_INS_CVLAN = 1 << 6, MLX4_WQE_CTRL_INS_SVLAN = 1 << 7, MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7, MLX4_WQE_CTRL_FORCE_LOOPBACK = 1 << 0, }; union mlx4_wqe_qpn_vlan { struct { __be16 vlan_tag; u8 ins_vlan; u8 fence_size; }; __be32 bf_qpn; }; struct mlx4_wqe_ctrl_seg { __be32 owner_opcode; union mlx4_wqe_qpn_vlan qpn_vlan; /* * High 24 bits are SRC remote buffer; low 8 bits are flags: * [7] SO (strong ordering) * [5] TCP/UDP checksum * [4] IP checksum * [3:2] C (generate completion queue entry) * [1] SE (solicited event) * [0] FL (force loopback) */ union { __be32 srcrb_flags; __be16 srcrb_flags16[2]; }; /* * imm is immediate data for send/RDMA write w/ immediate; * also invalidation key for send with invalidate; input * modifier for WQEs on CCQs. */ __be32 imm; }; enum { MLX4_WQE_MLX_VL15 = 1 << 17, MLX4_WQE_MLX_SLR = 1 << 16 }; struct mlx4_wqe_mlx_seg { u8 owner; u8 reserved1[2]; u8 opcode; __be16 sched_prio; u8 reserved2; u8 size; /* * [17] VL15 * [16] SLR * [15:12] static rate * [11:8] SL * [4] ICRC * [3:2] C * [0] FL (force loopback) */ __be32 flags; __be16 rlid; u16 reserved3; }; struct mlx4_wqe_datagram_seg { __be32 av[8]; __be32 dqpn; __be32 qkey; __be16 vlan; u8 mac[ETH_ALEN]; }; struct mlx4_wqe_lso_seg { __be32 mss_hdr_size; __be32 header[]; }; enum mlx4_wqe_bind_seg_flags2 { MLX4_WQE_BIND_ZERO_BASED = (1 << 30), MLX4_WQE_BIND_TYPE_2 = (1 << 31), }; struct mlx4_wqe_bind_seg { __be32 flags1; __be32 flags2; __be32 new_rkey; __be32 lkey; __be64 addr; __be64 length; }; enum { MLX4_WQE_FMR_PERM_LOCAL_READ = 1 << 27, MLX4_WQE_FMR_PERM_LOCAL_WRITE = 1 << 28, MLX4_WQE_FMR_AND_BIND_PERM_REMOTE_READ = 1 << 29, MLX4_WQE_FMR_AND_BIND_PERM_REMOTE_WRITE = 1 << 30, MLX4_WQE_FMR_AND_BIND_PERM_ATOMIC = 1 << 31 }; struct mlx4_wqe_fmr_seg { __be32 flags; __be32 mem_key; __be64 buf_list; __be64 start_addr; __be64 reg_len; __be32 offset; __be32 page_size; u32 reserved[2]; }; struct mlx4_wqe_fmr_ext_seg { u8 flags; u8 reserved; __be16 app_mask; __be16 wire_app_tag; __be16 mem_app_tag; __be32 wire_ref_tag_base; __be32 mem_ref_tag_base; }; struct mlx4_wqe_local_inval_seg { u64 reserved1; __be32 mem_key; u32 reserved2; u64 reserved3[2]; }; struct mlx4_wqe_raddr_seg { __be64 raddr; __be32 rkey; u32 reserved; }; struct mlx4_wqe_atomic_seg { __be64 swap_add; __be64 compare; }; struct mlx4_wqe_masked_atomic_seg { __be64 swap_add; __be64 compare; __be64 swap_add_mask; __be64 compare_mask; }; struct mlx4_wqe_data_seg { __be32 byte_count; __be32 lkey; __be64 addr; }; enum { MLX4_INLINE_ALIGN = 64, MLX4_INLINE_SEG = 1 << 31, }; struct mlx4_wqe_inline_seg { __be32 byte_count; }; enum mlx4_update_qp_attr { MLX4_UPDATE_QP_SMAC = 1 << 0, MLX4_UPDATE_QP_VSD = 1 << 1, MLX4_UPDATE_QP_RATE_LIMIT = 1 << 2, MLX4_UPDATE_QP_QOS_VPORT = 1 << 3, MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB = 1 << 4, MLX4_UPDATE_QP_SUPPORTED_ATTRS = (1 << 5) - 1 }; enum mlx4_update_qp_params_flags { MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB = 1 << 0, MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE = 1 << 1, }; struct mlx4_update_qp_params { u8 smac_index; u8 qos_vport; u32 flags; u16 rate_unit; u16 rate_val; }; struct mlx4_qp *mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn); int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn, enum mlx4_update_qp_attr attr, struct mlx4_update_qp_params *params); int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar, int sqd_event, struct mlx4_qp *qp); int mlx4_qp_query(struct mlx4_dev *dev, struct mlx4_qp *qp, struct mlx4_qp_context *context); int mlx4_qp_to_ready(struct mlx4_dev *dev, struct mlx4_mtt *mtt, struct mlx4_qp_context *context, struct mlx4_qp *qp, enum mlx4_qp_state *qp_state); static inline struct mlx4_qp *__mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn) { return radix_tree_lookup(&dev->qp_table_tree, qpn & (dev->caps.num_qps - 1)); } void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp); static inline u16 folded_qp(u32 q) { u16 res; res = ((q & 0xff) ^ ((q & 0xff0000) >> 16)) | (q & 0xff00); return res; } u16 mlx4_qp_roce_entropy(struct mlx4_dev *dev, u32 qpn); #endif /* MLX4_QP_H */ PK ! ��Oe e mlx4/cq.hnu �[��� /* * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_CQ_H #define MLX4_CQ_H #include <linux/types.h> #include <uapi/linux/if_ether.h> #include <linux/mlx4/device.h> #include <linux/mlx4/doorbell.h> struct mlx4_cqe { __be32 vlan_my_qpn; __be32 immed_rss_invalid; __be32 g_mlpath_rqpn; __be16 sl_vid; union { struct { __be16 rlid; __be16 status; u8 ipv6_ext_mask; u8 badfcs_enc; }; u8 smac[ETH_ALEN]; }; __be32 byte_cnt; __be16 wqe_index; __be16 checksum; u8 reserved[3]; u8 owner_sr_opcode; }; struct mlx4_err_cqe { __be32 my_qpn; u32 reserved1[5]; __be16 wqe_index; u8 vendor_err_syndrome; u8 syndrome; u8 reserved2[3]; u8 owner_sr_opcode; }; struct mlx4_ts_cqe { __be32 vlan_my_qpn; __be32 immed_rss_invalid; __be32 g_mlpath_rqpn; __be32 timestamp_hi; __be16 status; u8 ipv6_ext_mask; u8 badfcs_enc; __be32 byte_cnt; __be16 wqe_index; __be16 checksum; u8 reserved; __be16 timestamp_lo; u8 owner_sr_opcode; } __packed; enum { MLX4_CQE_L2_TUNNEL_IPOK = 1 << 31, MLX4_CQE_CVLAN_PRESENT_MASK = 1 << 29, MLX4_CQE_SVLAN_PRESENT_MASK = 1 << 30, MLX4_CQE_L2_TUNNEL = 1 << 27, MLX4_CQE_L2_TUNNEL_CSUM = 1 << 26, MLX4_CQE_L2_TUNNEL_IPV4 = 1 << 25, MLX4_CQE_QPN_MASK = 0xffffff, MLX4_CQE_VID_MASK = 0xfff, }; enum { MLX4_CQE_OWNER_MASK = 0x80, MLX4_CQE_IS_SEND_MASK = 0x40, MLX4_CQE_OPCODE_MASK = 0x1f }; enum { MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01, MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02, MLX4_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04, MLX4_CQE_SYNDROME_WR_FLUSH_ERR = 0x05, MLX4_CQE_SYNDROME_MW_BIND_ERR = 0x06, MLX4_CQE_SYNDROME_BAD_RESP_ERR = 0x10, MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11, MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12, MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13, MLX4_CQE_SYNDROME_REMOTE_OP_ERR = 0x14, MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15, MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16, MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22, }; enum { MLX4_CQE_STATUS_IPV4 = 1 << 6, MLX4_CQE_STATUS_IPV4F = 1 << 7, MLX4_CQE_STATUS_IPV6 = 1 << 8, MLX4_CQE_STATUS_IPV4OPT = 1 << 9, MLX4_CQE_STATUS_TCP = 1 << 10, MLX4_CQE_STATUS_UDP = 1 << 11, MLX4_CQE_STATUS_IPOK = 1 << 12, }; /* L4_CSUM is logically part of status, but has to checked against badfcs_enc */ enum { MLX4_CQE_STATUS_L4_CSUM = 1 << 2, }; enum { MLX4_CQE_LLC = 1, MLX4_CQE_SNAP = 1 << 1, MLX4_CQE_BAD_FCS = 1 << 4, }; #define MLX4_MAX_CQ_PERIOD (BIT(16) - 1) #define MLX4_MAX_CQ_COUNT (BIT(16) - 1) static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd, void __iomem *uar_page, spinlock_t *doorbell_lock) { __be32 doorbell[2]; u32 sn; u32 ci; sn = cq->arm_sn & 3; ci = cq->cons_index & 0xffffff; *cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci); /* * Make sure that the doorbell record in host memory is * written before ringing the doorbell via PCI MMIO. */ wmb(); doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn); doorbell[1] = cpu_to_be32(ci); mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock); } static inline void mlx4_cq_set_ci(struct mlx4_cq *cq) { *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff); } enum { MLX4_CQ_DB_REQ_NOT_SOL = 1 << 24, MLX4_CQ_DB_REQ_NOT = 2 << 24 }; int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq, u16 count, u16 period); int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq, int entries, struct mlx4_mtt *mtt); #endif /* MLX4_CQ_H */ PK ! B1Q[ [ mlx4/srq.hnu �[��� /* * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_SRQ_H #define MLX4_SRQ_H struct mlx4_wqe_srq_next_seg { u16 reserved1; __be16 next_wqe_index; u32 reserved2[3]; }; struct mlx4_srq *mlx4_srq_lookup(struct mlx4_dev *dev, u32 srqn); #endif /* MLX4_SRQ_H */ PK ! .�ǝs' s' mlx4/cmd.hnu �[��� /* * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_CMD_H #define MLX4_CMD_H #include <linux/dma-mapping.h> #include <linux/if_link.h> #include <linux/mlx4/device.h> #include <linux/netdevice.h> enum { /* initialization and general commands */ MLX4_CMD_SYS_EN = 0x1, MLX4_CMD_SYS_DIS = 0x2, MLX4_CMD_MAP_FA = 0xfff, MLX4_CMD_UNMAP_FA = 0xffe, MLX4_CMD_RUN_FW = 0xff6, MLX4_CMD_MOD_STAT_CFG = 0x34, MLX4_CMD_QUERY_DEV_CAP = 0x3, MLX4_CMD_QUERY_FW = 0x4, MLX4_CMD_ENABLE_LAM = 0xff8, MLX4_CMD_DISABLE_LAM = 0xff7, MLX4_CMD_QUERY_DDR = 0x5, MLX4_CMD_QUERY_ADAPTER = 0x6, MLX4_CMD_INIT_HCA = 0x7, MLX4_CMD_CLOSE_HCA = 0x8, MLX4_CMD_INIT_PORT = 0x9, MLX4_CMD_CLOSE_PORT = 0xa, MLX4_CMD_QUERY_HCA = 0xb, MLX4_CMD_QUERY_PORT = 0x43, MLX4_CMD_SENSE_PORT = 0x4d, MLX4_CMD_HW_HEALTH_CHECK = 0x50, MLX4_CMD_SET_PORT = 0xc, MLX4_CMD_SET_NODE = 0x5a, MLX4_CMD_QUERY_FUNC = 0x56, MLX4_CMD_ACCESS_DDR = 0x2e, MLX4_CMD_MAP_ICM = 0xffa, MLX4_CMD_UNMAP_ICM = 0xff9, MLX4_CMD_MAP_ICM_AUX = 0xffc, MLX4_CMD_UNMAP_ICM_AUX = 0xffb, MLX4_CMD_SET_ICM_SIZE = 0xffd, MLX4_CMD_ACCESS_REG = 0x3b, MLX4_CMD_ALLOCATE_VPP = 0x80, MLX4_CMD_SET_VPORT_QOS = 0x81, /*master notify fw on finish for slave's flr*/ MLX4_CMD_INFORM_FLR_DONE = 0x5b, MLX4_CMD_VIRT_PORT_MAP = 0x5c, MLX4_CMD_GET_OP_REQ = 0x59, /* TPT commands */ MLX4_CMD_SW2HW_MPT = 0xd, MLX4_CMD_QUERY_MPT = 0xe, MLX4_CMD_HW2SW_MPT = 0xf, MLX4_CMD_READ_MTT = 0x10, MLX4_CMD_WRITE_MTT = 0x11, MLX4_CMD_SYNC_TPT = 0x2f, /* EQ commands */ MLX4_CMD_MAP_EQ = 0x12, MLX4_CMD_SW2HW_EQ = 0x13, MLX4_CMD_HW2SW_EQ = 0x14, MLX4_CMD_QUERY_EQ = 0x15, /* CQ commands */ MLX4_CMD_SW2HW_CQ = 0x16, MLX4_CMD_HW2SW_CQ = 0x17, MLX4_CMD_QUERY_CQ = 0x18, MLX4_CMD_MODIFY_CQ = 0x2c, /* SRQ commands */ MLX4_CMD_SW2HW_SRQ = 0x35, MLX4_CMD_HW2SW_SRQ = 0x36, MLX4_CMD_QUERY_SRQ = 0x37, MLX4_CMD_ARM_SRQ = 0x40, /* QP/EE commands */ MLX4_CMD_RST2INIT_QP = 0x19, MLX4_CMD_INIT2RTR_QP = 0x1a, MLX4_CMD_RTR2RTS_QP = 0x1b, MLX4_CMD_RTS2RTS_QP = 0x1c, MLX4_CMD_SQERR2RTS_QP = 0x1d, MLX4_CMD_2ERR_QP = 0x1e, MLX4_CMD_RTS2SQD_QP = 0x1f, MLX4_CMD_SQD2SQD_QP = 0x38, MLX4_CMD_SQD2RTS_QP = 0x20, MLX4_CMD_2RST_QP = 0x21, MLX4_CMD_QUERY_QP = 0x22, MLX4_CMD_INIT2INIT_QP = 0x2d, MLX4_CMD_SUSPEND_QP = 0x32, MLX4_CMD_UNSUSPEND_QP = 0x33, MLX4_CMD_UPDATE_QP = 0x61, /* special QP and management commands */ MLX4_CMD_CONF_SPECIAL_QP = 0x23, MLX4_CMD_MAD_IFC = 0x24, MLX4_CMD_MAD_DEMUX = 0x203, /* multicast commands */ MLX4_CMD_READ_MCG = 0x25, MLX4_CMD_WRITE_MCG = 0x26, MLX4_CMD_MGID_HASH = 0x27, /* miscellaneous commands */ MLX4_CMD_DIAG_RPRT = 0x30, MLX4_CMD_NOP = 0x31, MLX4_CMD_CONFIG_DEV = 0x3a, MLX4_CMD_ACCESS_MEM = 0x2e, MLX4_CMD_SET_VEP = 0x52, /* Ethernet specific commands */ MLX4_CMD_SET_VLAN_FLTR = 0x47, MLX4_CMD_SET_MCAST_FLTR = 0x48, MLX4_CMD_DUMP_ETH_STATS = 0x49, /* Communication channel commands */ MLX4_CMD_ARM_COMM_CHANNEL = 0x57, MLX4_CMD_GEN_EQE = 0x58, /* virtual commands */ MLX4_CMD_ALLOC_RES = 0xf00, MLX4_CMD_FREE_RES = 0xf01, MLX4_CMD_MCAST_ATTACH = 0xf05, MLX4_CMD_UCAST_ATTACH = 0xf06, MLX4_CMD_PROMISC = 0xf08, MLX4_CMD_QUERY_FUNC_CAP = 0xf0a, MLX4_CMD_QP_ATTACH = 0xf0b, /* debug commands */ MLX4_CMD_QUERY_DEBUG_MSG = 0x2a, MLX4_CMD_SET_DEBUG_MSG = 0x2b, /* statistics commands */ MLX4_CMD_QUERY_IF_STAT = 0X54, MLX4_CMD_SET_IF_STAT = 0X55, /* register/delete flow steering network rules */ MLX4_QP_FLOW_STEERING_ATTACH = 0x65, MLX4_QP_FLOW_STEERING_DETACH = 0x66, MLX4_FLOW_STEERING_IB_UC_QP_RANGE = 0x64, /* Update and read QCN parameters */ MLX4_CMD_CONGESTION_CTRL_OPCODE = 0x68, }; enum { MLX4_CMD_TIME_CLASS_A = 60000, MLX4_CMD_TIME_CLASS_B = 60000, MLX4_CMD_TIME_CLASS_C = 60000, }; enum { /* virtual to physical port mapping opcode modifiers */ MLX4_GET_PORT_VIRT2PHY = 0x0, MLX4_SET_PORT_VIRT2PHY = 0x1, }; enum { MLX4_MAILBOX_SIZE = 4096, MLX4_ACCESS_MEM_ALIGN = 256, }; enum { /* Set port opcode modifiers */ MLX4_SET_PORT_IB_OPCODE = 0x0, MLX4_SET_PORT_ETH_OPCODE = 0x1, MLX4_SET_PORT_BEACON_OPCODE = 0x4, }; enum { /* Set port Ethernet input modifiers */ MLX4_SET_PORT_GENERAL = 0x0, MLX4_SET_PORT_RQP_CALC = 0x1, MLX4_SET_PORT_MAC_TABLE = 0x2, MLX4_SET_PORT_VLAN_TABLE = 0x3, MLX4_SET_PORT_PRIO_MAP = 0x4, MLX4_SET_PORT_GID_TABLE = 0x5, MLX4_SET_PORT_PRIO2TC = 0x8, MLX4_SET_PORT_SCHEDULER = 0x9, MLX4_SET_PORT_VXLAN = 0xB, MLX4_SET_PORT_ROCE_ADDR = 0xD }; enum { MLX4_CMD_MAD_DEMUX_CONFIG = 0, MLX4_CMD_MAD_DEMUX_QUERY_STATE = 1, MLX4_CMD_MAD_DEMUX_QUERY_RESTR = 2, /* Query mad demux restrictions */ }; enum { MLX4_CMD_WRAPPED, MLX4_CMD_NATIVE }; /* * MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP - * Receive checksum value is reported in CQE also for non TCP/UDP packets. * * MLX4_RX_CSUM_MODE_L4 - * L4_CSUM bit in CQE, which indicates whether or not L4 checksum * was validated correctly, is supported. * * MLX4_RX_CSUM_MODE_IP_OK_IP_NON_TCP_UDP - * IP_OK CQE's field is supported also for non TCP/UDP IP packets. * * MLX4_RX_CSUM_MODE_MULTI_VLAN - * Receive Checksum offload is supported for packets with more than 2 vlan headers. */ enum mlx4_rx_csum_mode { MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP = 1UL << 0, MLX4_RX_CSUM_MODE_L4 = 1UL << 1, MLX4_RX_CSUM_MODE_IP_OK_IP_NON_TCP_UDP = 1UL << 2, MLX4_RX_CSUM_MODE_MULTI_VLAN = 1UL << 3 }; struct mlx4_config_dev_params { u16 vxlan_udp_dport; u8 rx_csum_flags_port_1; u8 rx_csum_flags_port_2; }; enum mlx4_en_congestion_control_algorithm { MLX4_CTRL_ALGO_802_1_QAU_REACTION_POINT = 0, }; enum mlx4_en_congestion_control_opmod { MLX4_CONGESTION_CONTROL_GET_PARAMS, MLX4_CONGESTION_CONTROL_GET_STATISTICS, MLX4_CONGESTION_CONTROL_SET_PARAMS = 4, }; struct mlx4_dev; struct mlx4_cmd_mailbox { void *buf; dma_addr_t dma; }; int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param, int out_is_imm, u32 in_modifier, u8 op_modifier, u16 op, unsigned long timeout, int native); /* Invoke a command with no output parameter */ static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier, u8 op_modifier, u16 op, unsigned long timeout, int native) { return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier, op_modifier, op, timeout, native); } /* Invoke a command with an output mailbox */ static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param, u32 in_modifier, u8 op_modifier, u16 op, unsigned long timeout, int native) { return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier, op_modifier, op, timeout, native); } /* * Invoke a command with an immediate output parameter (and copy the * output into the caller's out_param pointer after the command * executes). */ static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param, u32 in_modifier, u8 op_modifier, u16 op, unsigned long timeout, int native) { return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier, op_modifier, op, timeout, native); } struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev); void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox); int mlx4_get_counter_stats(struct mlx4_dev *dev, int counter_index, struct mlx4_counter *counter_stats, int reset); int mlx4_get_vf_stats(struct mlx4_dev *dev, int port, int vf_idx, struct ifla_vf_stats *vf_stats); u32 mlx4_comm_get_version(void); int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u8 *mac); int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos, __be16 proto); int mlx4_set_vf_rate(struct mlx4_dev *dev, int port, int vf, int min_tx_rate, int max_tx_rate); int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting); int mlx4_get_vf_config(struct mlx4_dev *dev, int port, int vf, struct ifla_vf_info *ivf); int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state); int mlx4_config_dev_retrieval(struct mlx4_dev *dev, struct mlx4_config_dev_params *params); void mlx4_cmd_wake_completions(struct mlx4_dev *dev); void mlx4_report_internal_err_comm_event(struct mlx4_dev *dev); /* * mlx4_get_slave_default_vlan - * return true if VST ( default vlan) * if VST, will return vlan & qos (if not NULL) */ bool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave, u16 *vlan, u8 *qos); #define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8) #define COMM_CHAN_EVENT_INTERNAL_ERR (1 << 17) #endif /* MLX4_CMD_H */ PK ! j��F� F� mlx4/device.hnu �[��� /* * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_DEVICE_H #define MLX4_DEVICE_H #include <linux/if_ether.h> #include <linux/pci.h> #include <linux/completion.h> #include <linux/radix-tree.h> #include <linux/cpu_rmap.h> #include <linux/crash_dump.h> #include <linux/refcount.h> #include <linux/timecounter.h> #define DEFAULT_UAR_PAGE_SHIFT 12 #define MAX_MSIX 128 #define MIN_MSIX_P_PORT 5 #define MLX4_IS_LEGACY_EQ_MODE(dev_cap) ((dev_cap).num_comp_vectors < \ (dev_cap).num_ports * MIN_MSIX_P_PORT) #define MLX4_MAX_100M_UNITS_VAL 255 /* * work around: can't set values * greater then this value when * using 100 Mbps units. */ #define MLX4_RATELIMIT_100M_UNITS 3 /* 100 Mbps */ #define MLX4_RATELIMIT_1G_UNITS 4 /* 1 Gbps */ #define MLX4_RATELIMIT_DEFAULT 0x00ff #define MLX4_ROCE_MAX_GIDS 128 #define MLX4_ROCE_PF_GIDS 16 enum { MLX4_FLAG_MSI_X = 1 << 0, MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, MLX4_FLAG_MASTER = 1 << 2, MLX4_FLAG_SLAVE = 1 << 3, MLX4_FLAG_SRIOV = 1 << 4, MLX4_FLAG_OLD_REG_MAC = 1 << 6, MLX4_FLAG_BONDED = 1 << 7, MLX4_FLAG_SECURE_HOST = 1 << 8, }; enum { MLX4_PORT_CAP_IS_SM = 1 << 1, MLX4_PORT_CAP_DEV_MGMT_SUP = 1 << 19, }; enum { MLX4_MAX_PORTS = 2, MLX4_MAX_PORT_PKEYS = 128, MLX4_MAX_PORT_GIDS = 128 }; /* base qkey for use in sriov tunnel-qp/proxy-qp communication. * These qkeys must not be allowed for general use. This is a 64k range, * and to test for violation, we use the mask (protect against future chg). */ #define MLX4_RESERVED_QKEY_BASE (0xFFFF0000) #define MLX4_RESERVED_QKEY_MASK (0xFFFF0000) enum { MLX4_BOARD_ID_LEN = 64 }; enum { MLX4_MAX_NUM_PF = 16, MLX4_MAX_NUM_VF = 126, MLX4_MAX_NUM_VF_P_PORT = 64, MLX4_MFUNC_MAX = 128, MLX4_MAX_EQ_NUM = 1024, MLX4_MFUNC_EQ_NUM = 4, MLX4_MFUNC_MAX_EQES = 8, MLX4_MFUNC_EQE_MASK = (MLX4_MFUNC_MAX_EQES - 1) }; /* Driver supports 3 different device methods to manage traffic steering: * -device managed - High level API for ib and eth flow steering. FW is * managing flow steering tables. * - B0 steering mode - Common low level API for ib and (if supported) eth. * - A0 steering mode - Limited low level API for eth. In case of IB, * B0 mode is in use. */ enum { MLX4_STEERING_MODE_A0, MLX4_STEERING_MODE_B0, MLX4_STEERING_MODE_DEVICE_MANAGED }; enum { MLX4_STEERING_DMFS_A0_DEFAULT, MLX4_STEERING_DMFS_A0_DYNAMIC, MLX4_STEERING_DMFS_A0_STATIC, MLX4_STEERING_DMFS_A0_DISABLE, MLX4_STEERING_DMFS_A0_NOT_SUPPORTED }; static inline const char *mlx4_steering_mode_str(int steering_mode) { switch (steering_mode) { case MLX4_STEERING_MODE_A0: return "A0 steering"; case MLX4_STEERING_MODE_B0: return "B0 steering"; case MLX4_STEERING_MODE_DEVICE_MANAGED: return "Device managed flow steering"; default: return "Unrecognize steering mode"; } } enum { MLX4_TUNNEL_OFFLOAD_MODE_NONE, MLX4_TUNNEL_OFFLOAD_MODE_VXLAN }; enum { MLX4_DEV_CAP_FLAG_RC = 1LL << 0, MLX4_DEV_CAP_FLAG_UC = 1LL << 1, MLX4_DEV_CAP_FLAG_UD = 1LL << 2, MLX4_DEV_CAP_FLAG_XRC = 1LL << 3, MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6, MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7, MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8, MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9, MLX4_DEV_CAP_FLAG_DPDP = 1LL << 12, MLX4_DEV_CAP_FLAG_BLH = 1LL << 15, MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1LL << 16, MLX4_DEV_CAP_FLAG_APM = 1LL << 17, MLX4_DEV_CAP_FLAG_ATOMIC = 1LL << 18, MLX4_DEV_CAP_FLAG_RAW_MCAST = 1LL << 19, MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1LL << 20, MLX4_DEV_CAP_FLAG_UD_MCAST = 1LL << 21, MLX4_DEV_CAP_FLAG_IBOE = 1LL << 30, MLX4_DEV_CAP_FLAG_UC_LOOPBACK = 1LL << 32, MLX4_DEV_CAP_FLAG_FCS_KEEP = 1LL << 34, MLX4_DEV_CAP_FLAG_WOL_PORT1 = 1LL << 37, MLX4_DEV_CAP_FLAG_WOL_PORT2 = 1LL << 38, MLX4_DEV_CAP_FLAG_UDP_RSS = 1LL << 40, MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41, MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42, MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48, MLX4_DEV_CAP_FLAG_RSS_IP_FRAG = 1LL << 52, MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53, MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55, MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59, MLX4_DEV_CAP_FLAG_64B_EQE = 1LL << 61, MLX4_DEV_CAP_FLAG_64B_CQE = 1LL << 62 }; enum { MLX4_DEV_CAP_FLAG2_RSS = 1LL << 0, MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2, MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3, MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN = 1LL << 4, MLX4_DEV_CAP_FLAG2_TS = 1LL << 5, MLX4_DEV_CAP_FLAG2_VLAN_CONTROL = 1LL << 6, MLX4_DEV_CAP_FLAG2_FSM = 1LL << 7, MLX4_DEV_CAP_FLAG2_UPDATE_QP = 1LL << 8, MLX4_DEV_CAP_FLAG2_DMFS_IPOIB = 1LL << 9, MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS = 1LL << 10, MLX4_DEV_CAP_FLAG2_MAD_DEMUX = 1LL << 11, MLX4_DEV_CAP_FLAG2_CQE_STRIDE = 1LL << 12, MLX4_DEV_CAP_FLAG2_EQE_STRIDE = 1LL << 13, MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL = 1LL << 14, MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP = 1LL << 15, MLX4_DEV_CAP_FLAG2_CONFIG_DEV = 1LL << 16, MLX4_DEV_CAP_FLAG2_SYS_EQS = 1LL << 17, MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18, MLX4_DEV_CAP_FLAG2_FS_A0 = 1LL << 19, MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT = 1LL << 20, MLX4_DEV_CAP_FLAG2_PORT_REMAP = 1LL << 21, MLX4_DEV_CAP_FLAG2_QCN = 1LL << 22, MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT = 1LL << 23, MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN = 1LL << 24, MLX4_DEV_CAP_FLAG2_QOS_VPP = 1LL << 25, MLX4_DEV_CAP_FLAG2_ETS_CFG = 1LL << 26, MLX4_DEV_CAP_FLAG2_PORT_BEACON = 1LL << 27, MLX4_DEV_CAP_FLAG2_IGNORE_FCS = 1LL << 28, MLX4_DEV_CAP_FLAG2_PHV_EN = 1LL << 29, MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN = 1LL << 30, MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB = 1ULL << 31, MLX4_DEV_CAP_FLAG2_LB_SRC_CHK = 1ULL << 32, MLX4_DEV_CAP_FLAG2_ROCE_V1_V2 = 1ULL << 33, MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER = 1ULL << 34, MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT = 1ULL << 35, MLX4_DEV_CAP_FLAG2_SVLAN_BY_QP = 1ULL << 36, MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT = 1ULL << 37, MLX4_DEV_CAP_FLAG2_USER_MAC_EN = 1ULL << 38, MLX4_DEV_CAP_FLAG2_DRIVER_VERSION_TO_FW = 1ULL << 39, MLX4_DEV_CAP_FLAG2_SW_CQ_INIT = 1ULL << 40, }; enum { MLX4_QUERY_FUNC_FLAGS_BF_RES_QP = 1LL << 0, MLX4_QUERY_FUNC_FLAGS_A0_RES_QP = 1LL << 1 }; enum { MLX4_VF_CAP_FLAG_RESET = 1 << 0 }; /* bit enums for an 8-bit flags field indicating special use * QPs which require special handling in qp_reserve_range. * Currently, this only includes QPs used by the ETH interface, * where we expect to use blueflame. These QPs must not have * bits 6 and 7 set in their qp number. * * This enum may use only bits 0..7. */ enum { MLX4_RESERVE_A0_QP = 1 << 6, MLX4_RESERVE_ETH_BF_QP = 1 << 7, }; enum { MLX4_DEV_CAP_64B_EQE_ENABLED = 1LL << 0, MLX4_DEV_CAP_64B_CQE_ENABLED = 1LL << 1, MLX4_DEV_CAP_CQE_STRIDE_ENABLED = 1LL << 2, MLX4_DEV_CAP_EQE_STRIDE_ENABLED = 1LL << 3 }; enum { MLX4_FUNC_CAP_64B_EQE_CQE = 1L << 0, MLX4_FUNC_CAP_EQE_CQE_STRIDE = 1L << 1, MLX4_FUNC_CAP_DMFS_A0_STATIC = 1L << 2 }; #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) enum { MLX4_BMME_FLAG_WIN_TYPE_2B = 1 << 1, MLX4_BMME_FLAG_LOCAL_INV = 1 << 6, MLX4_BMME_FLAG_REMOTE_INV = 1 << 7, MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9, MLX4_BMME_FLAG_RESERVED_LKEY = 1 << 10, MLX4_BMME_FLAG_FAST_REG_WR = 1 << 11, MLX4_BMME_FLAG_ROCE_V1_V2 = 1 << 19, MLX4_BMME_FLAG_PORT_REMAP = 1 << 24, MLX4_BMME_FLAG_VSD_INIT2RTR = 1 << 28, }; enum { MLX4_FLAG_PORT_REMAP = MLX4_BMME_FLAG_PORT_REMAP, MLX4_FLAG_ROCE_V1_V2 = MLX4_BMME_FLAG_ROCE_V1_V2 }; enum mlx4_event { MLX4_EVENT_TYPE_COMP = 0x00, MLX4_EVENT_TYPE_PATH_MIG = 0x01, MLX4_EVENT_TYPE_COMM_EST = 0x02, MLX4_EVENT_TYPE_SQ_DRAINED = 0x03, MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE = 0x13, MLX4_EVENT_TYPE_SRQ_LIMIT = 0x14, MLX4_EVENT_TYPE_CQ_ERROR = 0x04, MLX4_EVENT_TYPE_WQ_CATAS_ERROR = 0x05, MLX4_EVENT_TYPE_EEC_CATAS_ERROR = 0x06, MLX4_EVENT_TYPE_PATH_MIG_FAILED = 0x07, MLX4_EVENT_TYPE_WQ_INVAL_REQ_ERROR = 0x10, MLX4_EVENT_TYPE_WQ_ACCESS_ERROR = 0x11, MLX4_EVENT_TYPE_SRQ_CATAS_ERROR = 0x12, MLX4_EVENT_TYPE_LOCAL_CATAS_ERROR = 0x08, MLX4_EVENT_TYPE_PORT_CHANGE = 0x09, MLX4_EVENT_TYPE_EQ_OVERFLOW = 0x0f, MLX4_EVENT_TYPE_ECC_DETECT = 0x0e, MLX4_EVENT_TYPE_CMD = 0x0a, MLX4_EVENT_TYPE_VEP_UPDATE = 0x19, MLX4_EVENT_TYPE_COMM_CHANNEL = 0x18, MLX4_EVENT_TYPE_OP_REQUIRED = 0x1a, MLX4_EVENT_TYPE_FATAL_WARNING = 0x1b, MLX4_EVENT_TYPE_FLR_EVENT = 0x1c, MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT = 0x1d, MLX4_EVENT_TYPE_RECOVERABLE_ERROR_EVENT = 0x3e, MLX4_EVENT_TYPE_NONE = 0xff, }; enum { MLX4_PORT_CHANGE_SUBTYPE_DOWN = 1, MLX4_PORT_CHANGE_SUBTYPE_ACTIVE = 4 }; enum { MLX4_RECOVERABLE_ERROR_EVENT_SUBTYPE_BAD_CABLE = 1, MLX4_RECOVERABLE_ERROR_EVENT_SUBTYPE_UNSUPPORTED_CABLE = 2, }; enum { MLX4_FATAL_WARNING_SUBTYPE_WARMING = 0, }; enum slave_port_state { SLAVE_PORT_DOWN = 0, SLAVE_PENDING_UP, SLAVE_PORT_UP, }; enum slave_port_gen_event { SLAVE_PORT_GEN_EVENT_DOWN = 0, SLAVE_PORT_GEN_EVENT_UP, SLAVE_PORT_GEN_EVENT_NONE, }; enum slave_port_state_event { MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN, MLX4_PORT_STATE_DEV_EVENT_PORT_UP, MLX4_PORT_STATE_IB_PORT_STATE_EVENT_GID_VALID, MLX4_PORT_STATE_IB_EVENT_GID_INVALID, }; enum { MLX4_PERM_LOCAL_READ = 1 << 10, MLX4_PERM_LOCAL_WRITE = 1 << 11, MLX4_PERM_REMOTE_READ = 1 << 12, MLX4_PERM_REMOTE_WRITE = 1 << 13, MLX4_PERM_ATOMIC = 1 << 14, MLX4_PERM_BIND_MW = 1 << 15, MLX4_PERM_MASK = 0xFC00 }; enum { MLX4_OPCODE_NOP = 0x00, MLX4_OPCODE_SEND_INVAL = 0x01, MLX4_OPCODE_RDMA_WRITE = 0x08, MLX4_OPCODE_RDMA_WRITE_IMM = 0x09, MLX4_OPCODE_SEND = 0x0a, MLX4_OPCODE_SEND_IMM = 0x0b, MLX4_OPCODE_LSO = 0x0e, MLX4_OPCODE_RDMA_READ = 0x10, MLX4_OPCODE_ATOMIC_CS = 0x11, MLX4_OPCODE_ATOMIC_FA = 0x12, MLX4_OPCODE_MASKED_ATOMIC_CS = 0x14, MLX4_OPCODE_MASKED_ATOMIC_FA = 0x15, MLX4_OPCODE_BIND_MW = 0x18, MLX4_OPCODE_FMR = 0x19, MLX4_OPCODE_LOCAL_INVAL = 0x1b, MLX4_OPCODE_CONFIG_CMD = 0x1f, MLX4_RECV_OPCODE_RDMA_WRITE_IMM = 0x00, MLX4_RECV_OPCODE_SEND = 0x01, MLX4_RECV_OPCODE_SEND_IMM = 0x02, MLX4_RECV_OPCODE_SEND_INVAL = 0x03, MLX4_CQE_OPCODE_ERROR = 0x1e, MLX4_CQE_OPCODE_RESIZE = 0x16, }; enum { MLX4_STAT_RATE_OFFSET = 5 }; enum mlx4_protocol { MLX4_PROT_IB_IPV6 = 0, MLX4_PROT_ETH, MLX4_PROT_IB_IPV4, MLX4_PROT_FCOE }; enum { MLX4_MTT_FLAG_PRESENT = 1 }; enum mlx4_qp_region { MLX4_QP_REGION_FW = 0, MLX4_QP_REGION_RSS_RAW_ETH, MLX4_QP_REGION_BOTTOM = MLX4_QP_REGION_RSS_RAW_ETH, MLX4_QP_REGION_ETH_ADDR, MLX4_QP_REGION_FC_ADDR, MLX4_QP_REGION_FC_EXCH, MLX4_NUM_QP_REGION }; enum mlx4_port_type { MLX4_PORT_TYPE_NONE = 0, MLX4_PORT_TYPE_IB = 1, MLX4_PORT_TYPE_ETH = 2, MLX4_PORT_TYPE_AUTO = 3 }; enum mlx4_special_vlan_idx { MLX4_NO_VLAN_IDX = 0, MLX4_VLAN_MISS_IDX, MLX4_VLAN_REGULAR }; enum mlx4_steer_type { MLX4_MC_STEER = 0, MLX4_UC_STEER, MLX4_NUM_STEERS }; enum mlx4_resource_usage { MLX4_RES_USAGE_NONE, MLX4_RES_USAGE_DRIVER, MLX4_RES_USAGE_USER_VERBS, }; enum { MLX4_NUM_FEXCH = 64 * 1024, }; enum { MLX4_MAX_FAST_REG_PAGES = 511, }; enum { /* * Max wqe size for rdma read is 512 bytes, so this * limits our max_sge_rd as the wqe needs to fit: * - ctrl segment (16 bytes) * - rdma segment (16 bytes) * - scatter elements (16 bytes each) */ MLX4_MAX_SGE_RD = (512 - 16 - 16) / 16 }; enum { MLX4_DEV_PMC_SUBTYPE_GUID_INFO = 0x14, MLX4_DEV_PMC_SUBTYPE_PORT_INFO = 0x15, MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE = 0x16, MLX4_DEV_PMC_SUBTYPE_SL_TO_VL_MAP = 0x17, }; /* Port mgmt change event handling */ enum { MLX4_EQ_PORT_INFO_MSTR_SM_LID_CHANGE_MASK = 1 << 0, MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK = 1 << 1, MLX4_EQ_PORT_INFO_LID_CHANGE_MASK = 1 << 2, MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK = 1 << 3, MLX4_EQ_PORT_INFO_MSTR_SM_SL_CHANGE_MASK = 1 << 4, }; union sl2vl_tbl_to_u64 { u8 sl8[8]; u64 sl64; }; enum { MLX4_DEVICE_STATE_UP = 1 << 0, MLX4_DEVICE_STATE_INTERNAL_ERROR = 1 << 1, }; enum { MLX4_INTERFACE_STATE_UP = 1 << 0, MLX4_INTERFACE_STATE_DELETION = 1 << 1, MLX4_INTERFACE_STATE_NOWAIT = 1 << 2, }; #define MSTR_SM_CHANGE_MASK (MLX4_EQ_PORT_INFO_MSTR_SM_SL_CHANGE_MASK | \ MLX4_EQ_PORT_INFO_MSTR_SM_LID_CHANGE_MASK) enum mlx4_module_id { MLX4_MODULE_ID_SFP = 0x3, MLX4_MODULE_ID_QSFP = 0xC, MLX4_MODULE_ID_QSFP_PLUS = 0xD, MLX4_MODULE_ID_QSFP28 = 0x11, }; enum { /* rl */ MLX4_QP_RATE_LIMIT_NONE = 0, MLX4_QP_RATE_LIMIT_KBS = 1, MLX4_QP_RATE_LIMIT_MBS = 2, MLX4_QP_RATE_LIMIT_GBS = 3 }; struct mlx4_rate_limit_caps { u16 num_rates; /* Number of different rates */ u8 min_unit; u16 min_val; u8 max_unit; u16 max_val; }; static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) { return (major << 32) | (minor << 16) | subminor; } struct mlx4_phys_caps { u32 gid_phys_table_len[MLX4_MAX_PORTS + 1]; u32 pkey_phys_table_len[MLX4_MAX_PORTS + 1]; u32 num_phys_eqs; u32 base_sqpn; u32 base_proxy_sqpn; u32 base_tunnel_sqpn; }; struct mlx4_spec_qps { u32 qp0_qkey; u32 qp0_proxy; u32 qp0_tunnel; u32 qp1_proxy; u32 qp1_tunnel; }; struct mlx4_caps { u64 fw_ver; u32 function; int num_ports; int vl_cap[MLX4_MAX_PORTS + 1]; int ib_mtu_cap[MLX4_MAX_PORTS + 1]; __be32 ib_port_def_cap[MLX4_MAX_PORTS + 1]; u64 def_mac[MLX4_MAX_PORTS + 1]; int eth_mtu_cap[MLX4_MAX_PORTS + 1]; int gid_table_len[MLX4_MAX_PORTS + 1]; int pkey_table_len[MLX4_MAX_PORTS + 1]; int trans_type[MLX4_MAX_PORTS + 1]; int vendor_oui[MLX4_MAX_PORTS + 1]; int wavelength[MLX4_MAX_PORTS + 1]; u64 trans_code[MLX4_MAX_PORTS + 1]; int local_ca_ack_delay; int num_uars; u32 uar_page_size; int bf_reg_size; int bf_regs_per_page; int max_sq_sg; int max_rq_sg; int num_qps; int max_wqes; int max_sq_desc_sz; int max_rq_desc_sz; int max_qp_init_rdma; int max_qp_dest_rdma; int max_tc_eth; struct mlx4_spec_qps *spec_qps; int num_srqs; int max_srq_wqes; int max_srq_sge; int reserved_srqs; int num_cqs; int max_cqes; int reserved_cqs; int num_sys_eqs; int num_eqs; int reserved_eqs; int num_comp_vectors; int num_mpts; int num_mtts; int fmr_reserved_mtts; int reserved_mtts; int reserved_mrws; int reserved_uars; int num_mgms; int num_amgms; int reserved_mcgs; int num_qp_per_mgm; int steering_mode; int dmfs_high_steer_mode; int fs_log_max_ucast_qp_range_size; int num_pds; int reserved_pds; int max_xrcds; int reserved_xrcds; int mtt_entry_sz; u32 max_msg_sz; u32 page_size_cap; u64 flags; u64 flags2; u32 bmme_flags; u32 reserved_lkey; u16 stat_rate_support; u8 port_width_cap[MLX4_MAX_PORTS + 1]; int max_gso_sz; int max_rss_tbl_sz; int reserved_qps_cnt[MLX4_NUM_QP_REGION]; int reserved_qps; int reserved_qps_base[MLX4_NUM_QP_REGION]; int log_num_macs; int log_num_vlans; enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1]; u8 supported_type[MLX4_MAX_PORTS + 1]; u8 suggested_type[MLX4_MAX_PORTS + 1]; u8 default_sense[MLX4_MAX_PORTS + 1]; u32 port_mask[MLX4_MAX_PORTS + 1]; enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1]; u32 max_counters; u8 port_ib_mtu[MLX4_MAX_PORTS + 1]; u16 sqp_demux; u32 eqe_size; u32 cqe_size; u8 eqe_factor; u32 userspace_caps; /* userspace must be aware of these */ u32 function_caps; /* VFs must be aware of these */ u16 hca_core_clock; u64 phys_port_id[MLX4_MAX_PORTS + 1]; int tunnel_offload_mode; u8 rx_checksum_flags_port[MLX4_MAX_PORTS + 1]; u8 phv_bit[MLX4_MAX_PORTS + 1]; u8 alloc_res_qp_mask; u32 dmfs_high_rate_qpn_base; u32 dmfs_high_rate_qpn_range; u32 vf_caps; bool wol_port[MLX4_MAX_PORTS + 1]; struct mlx4_rate_limit_caps rl_caps; u32 health_buffer_addrs; bool map_clock_to_user; }; struct mlx4_buf_list { void *buf; dma_addr_t map; }; struct mlx4_buf { struct mlx4_buf_list direct; struct mlx4_buf_list *page_list; int nbufs; int npages; int page_shift; }; struct mlx4_mtt { u32 offset; int order; int page_shift; }; enum { MLX4_DB_PER_PAGE = PAGE_SIZE / 4 }; struct mlx4_db_pgdir { struct list_head list; DECLARE_BITMAP(order0, MLX4_DB_PER_PAGE); DECLARE_BITMAP(order1, MLX4_DB_PER_PAGE / 2); unsigned long *bits[2]; __be32 *db_page; dma_addr_t db_dma; }; struct mlx4_ib_user_db_page; struct mlx4_db { __be32 *db; union { struct mlx4_db_pgdir *pgdir; struct mlx4_ib_user_db_page *user_page; } u; dma_addr_t dma; int index; int order; }; struct mlx4_hwq_resources { struct mlx4_db db; struct mlx4_mtt mtt; struct mlx4_buf buf; }; struct mlx4_mr { struct mlx4_mtt mtt; u64 iova; u64 size; u32 key; u32 pd; u32 access; int enabled; }; enum mlx4_mw_type { MLX4_MW_TYPE_1 = 1, MLX4_MW_TYPE_2 = 2, }; struct mlx4_mw { u32 key; u32 pd; enum mlx4_mw_type type; int enabled; }; struct mlx4_uar { unsigned long pfn; int index; struct list_head bf_list; unsigned free_bf_bmap; void __iomem *map; void __iomem *bf_map; }; struct mlx4_bf { unsigned int offset; int buf_size; struct mlx4_uar *uar; void __iomem *reg; }; struct mlx4_cq { void (*comp) (struct mlx4_cq *); void (*event) (struct mlx4_cq *, enum mlx4_event); struct mlx4_uar *uar; u32 cons_index; u16 irq; __be32 *set_ci_db; __be32 *arm_db; int arm_sn; int cqn; unsigned vector; refcount_t refcount; struct completion free; struct { struct list_head list; void (*comp)(struct mlx4_cq *); void *priv; } tasklet_ctx; int reset_notify_added; struct list_head reset_notify; u8 usage; }; struct mlx4_qp { void (*event) (struct mlx4_qp *, enum mlx4_event); int qpn; refcount_t refcount; struct completion free; u8 usage; }; struct mlx4_srq { void (*event) (struct mlx4_srq *, enum mlx4_event); int srqn; int max; int max_gs; int wqe_shift; refcount_t refcount; struct completion free; }; struct mlx4_av { __be32 port_pd; u8 reserved1; u8 g_slid; __be16 dlid; u8 reserved2; u8 gid_index; u8 stat_rate; u8 hop_limit; __be32 sl_tclass_flowlabel; u8 dgid[16]; }; struct mlx4_eth_av { __be32 port_pd; u8 reserved1; u8 smac_idx; u16 reserved2; u8 reserved3; u8 gid_index; u8 stat_rate; u8 hop_limit; __be32 sl_tclass_flowlabel; u8 dgid[16]; u8 s_mac[6]; u8 reserved4[2]; __be16 vlan; u8 mac[ETH_ALEN]; }; union mlx4_ext_av { struct mlx4_av ib; struct mlx4_eth_av eth; }; /* Counters should be saturate once they reach their maximum value */ #define ASSIGN_32BIT_COUNTER(counter, value) do { \ if ((value) > U32_MAX) \ counter = cpu_to_be32(U32_MAX); \ else \ counter = cpu_to_be32(value); \ } while (0) struct mlx4_counter { u8 reserved1[3]; u8 counter_mode; __be32 num_ifc; u32 reserved2[2]; __be64 rx_frames; __be64 rx_bytes; __be64 tx_frames; __be64 tx_bytes; }; struct mlx4_quotas { int qp; int cq; int srq; int mpt; int mtt; int counter; int xrcd; }; struct mlx4_vf_dev { u8 min_port; u8 n_ports; }; struct mlx4_fw_crdump { bool snapshot_enable; struct devlink_region *region_crspace; struct devlink_region *region_fw_health; }; enum mlx4_pci_status { MLX4_PCI_STATUS_DISABLED, MLX4_PCI_STATUS_ENABLED, }; struct mlx4_dev_persistent { struct pci_dev *pdev; struct mlx4_dev *dev; int nvfs[MLX4_MAX_PORTS + 1]; int num_vfs; enum mlx4_port_type curr_port_type[MLX4_MAX_PORTS + 1]; enum mlx4_port_type curr_port_poss_type[MLX4_MAX_PORTS + 1]; struct work_struct catas_work; struct workqueue_struct *catas_wq; struct mutex device_state_mutex; /* protect HW state */ u8 state; struct mutex interface_state_mutex; /* protect SW state */ u8 interface_state; struct mutex pci_status_mutex; /* sync pci state */ enum mlx4_pci_status pci_status; struct mlx4_fw_crdump crdump; }; struct mlx4_dev { struct mlx4_dev_persistent *persist; unsigned long flags; unsigned long num_slaves; struct mlx4_caps caps; struct mlx4_phys_caps phys_caps; struct mlx4_quotas quotas; struct radix_tree_root qp_table_tree; u8 rev_id; u8 port_random_macs; char board_id[MLX4_BOARD_ID_LEN]; int numa_node; int oper_log_mgm_entry_size; u64 regid_promisc_array[MLX4_MAX_PORTS + 1]; u64 regid_allmulti_array[MLX4_MAX_PORTS + 1]; struct mlx4_vf_dev *dev_vfs; u8 uar_page_shift; }; struct mlx4_clock_params { u64 offset; u8 bar; u8 size; }; struct mlx4_eqe { u8 reserved1; u8 type; u8 reserved2; u8 subtype; union { u32 raw[6]; struct { __be32 cqn; } __packed comp; struct { u16 reserved1; __be16 token; u32 reserved2; u8 reserved3[3]; u8 status; __be64 out_param; } __packed cmd; struct { __be32 qpn; } __packed qp; struct { __be32 srqn; } __packed srq; struct { __be32 cqn; u32 reserved1; u8 reserved2[3]; u8 syndrome; } __packed cq_err; struct { u32 reserved1[2]; __be32 port; } __packed port_change; struct { #define COMM_CHANNEL_BIT_ARRAY_SIZE 4 u32 reserved; u32 bit_vec[COMM_CHANNEL_BIT_ARRAY_SIZE]; } __packed comm_channel_arm; struct { u8 port; u8 reserved[3]; __be64 mac; } __packed mac_update; struct { __be32 slave_id; } __packed flr_event; struct { __be16 current_temperature; __be16 warning_threshold; } __packed warming; struct { u8 reserved[3]; u8 port; union { struct { __be16 mstr_sm_lid; __be16 port_lid; __be32 changed_attr; u8 reserved[3]; u8 mstr_sm_sl; __be64 gid_prefix; } __packed port_info; struct { __be32 block_ptr; __be32 tbl_entries_mask; } __packed tbl_change_info; struct { u8 sl2vl_table[8]; } __packed sl2vl_tbl_change_info; } params; } __packed port_mgmt_change; struct { u8 reserved[3]; u8 port; u32 reserved1[5]; } __packed bad_cable; } event; u8 slave_id; u8 reserved3[2]; u8 owner; } __packed; struct mlx4_init_port_param { int set_guid0; int set_node_guid; int set_si_guid; u16 mtu; int port_width_cap; u16 vl_cap; u16 max_gid; u16 max_pkey; u64 guid0; u64 node_guid; u64 si_guid; }; #define MAD_IFC_DATA_SZ 192 /* MAD IFC Mailbox */ struct mlx4_mad_ifc { u8 base_version; u8 mgmt_class; u8 class_version; u8 method; __be16 status; __be16 class_specific; __be64 tid; __be16 attr_id; __be16 resv; __be32 attr_mod; __be64 mkey; __be16 dr_slid; __be16 dr_dlid; u8 reserved[28]; u8 data[MAD_IFC_DATA_SZ]; } __packed; #define mlx4_foreach_port(port, dev, type) \ for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ if ((type) == (dev)->caps.port_mask[(port)]) #define mlx4_foreach_ib_transport_port(port, dev) \ for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ if (((dev)->caps.port_mask[port] == MLX4_PORT_TYPE_IB) || \ ((dev)->caps.port_mask[port] == MLX4_PORT_TYPE_ETH)) #define MLX4_INVALID_SLAVE_ID 0xFF #define MLX4_SINK_COUNTER_INDEX(dev) (dev->caps.max_counters - 1) void handle_port_mgmt_change_event(struct work_struct *work); static inline int mlx4_master_func_num(struct mlx4_dev *dev) { return dev->caps.function; } static inline int mlx4_is_master(struct mlx4_dev *dev) { return dev->flags & MLX4_FLAG_MASTER; } static inline int mlx4_num_reserved_sqps(struct mlx4_dev *dev) { return dev->phys_caps.base_sqpn + 8 + 16 * MLX4_MFUNC_MAX * !!mlx4_is_master(dev); } static inline int mlx4_is_qp_reserved(struct mlx4_dev *dev, u32 qpn) { return (qpn < dev->phys_caps.base_sqpn + 8 + 16 * MLX4_MFUNC_MAX * !!mlx4_is_master(dev) && qpn >= dev->phys_caps.base_sqpn) || (qpn < dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]); } static inline int mlx4_is_guest_proxy(struct mlx4_dev *dev, int slave, u32 qpn) { int guest_proxy_base = dev->phys_caps.base_proxy_sqpn + slave * 8; if (qpn >= guest_proxy_base && qpn < guest_proxy_base + 8) return 1; return 0; } static inline int mlx4_is_mfunc(struct mlx4_dev *dev) { return dev->flags & (MLX4_FLAG_SLAVE | MLX4_FLAG_MASTER); } static inline int mlx4_is_slave(struct mlx4_dev *dev) { return dev->flags & MLX4_FLAG_SLAVE; } static inline int mlx4_is_eth(struct mlx4_dev *dev, int port) { return dev->caps.port_type[port] == MLX4_PORT_TYPE_IB ? 0 : 1; } int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, struct mlx4_buf *buf); void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset) { if (buf->nbufs == 1) return buf->direct.buf + offset; else return buf->page_list[offset >> PAGE_SHIFT].buf + (offset & (PAGE_SIZE - 1)); } int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); int mlx4_bf_alloc(struct mlx4_dev *dev, struct mlx4_bf *bf, int node); void mlx4_bf_free(struct mlx4_dev *dev, struct mlx4_bf *bf); int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, struct mlx4_mtt *mtt); void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt); u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt); int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr); int mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr); int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr); int mlx4_mw_alloc(struct mlx4_dev *dev, u32 pd, enum mlx4_mw_type type, struct mlx4_mw *mw); void mlx4_mw_free(struct mlx4_dev *dev, struct mlx4_mw *mw); int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw); int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int start_index, int npages, u64 *page_list); int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, struct mlx4_buf *buf); int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, unsigned int order); void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db); int mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres, int size); void mlx4_free_hwq_res(struct mlx4_dev *mdev, struct mlx4_hwq_resources *wqres, int size); int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, unsigned int vector, int collapsed, int timestamp_en, void *buf_addr, bool user_cq); void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq); int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base, u8 flags, u8 usage); void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp); void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn, struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq); void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq); int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark); int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark); int mlx4_INIT_PORT(struct mlx4_dev *dev, int port); int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); int mlx4_unicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], int block_mcast_loopback, enum mlx4_protocol prot); int mlx4_unicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], enum mlx4_protocol prot); int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], u8 port, int block_mcast_loopback, enum mlx4_protocol protocol, u64 *reg_id); int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], enum mlx4_protocol protocol, u64 reg_id); enum { MLX4_DOMAIN_UVERBS = 0x1000, MLX4_DOMAIN_ETHTOOL = 0x2000, MLX4_DOMAIN_RFS = 0x3000, MLX4_DOMAIN_NIC = 0x5000, }; enum mlx4_net_trans_rule_id { MLX4_NET_TRANS_RULE_ID_ETH = 0, MLX4_NET_TRANS_RULE_ID_IB, MLX4_NET_TRANS_RULE_ID_IPV6, MLX4_NET_TRANS_RULE_ID_IPV4, MLX4_NET_TRANS_RULE_ID_TCP, MLX4_NET_TRANS_RULE_ID_UDP, MLX4_NET_TRANS_RULE_ID_VXLAN, MLX4_NET_TRANS_RULE_NUM, /* should be last */ }; extern const u16 __sw_id_hw[]; static inline int map_hw_to_sw_id(u16 header_id) { int i; for (i = 0; i < MLX4_NET_TRANS_RULE_NUM; i++) { if (header_id == __sw_id_hw[i]) return i; } return -EINVAL; } enum mlx4_net_trans_promisc_mode { MLX4_FS_REGULAR = 1, MLX4_FS_ALL_DEFAULT, MLX4_FS_MC_DEFAULT, MLX4_FS_MIRROR_RX_PORT, MLX4_FS_MIRROR_SX_PORT, MLX4_FS_UC_SNIFFER, MLX4_FS_MC_SNIFFER, MLX4_FS_MODE_NUM, /* should be last */ }; struct mlx4_spec_eth { u8 dst_mac[ETH_ALEN]; u8 dst_mac_msk[ETH_ALEN]; u8 src_mac[ETH_ALEN]; u8 src_mac_msk[ETH_ALEN]; u8 ether_type_enable; __be16 ether_type; __be16 vlan_id_msk; __be16 vlan_id; }; struct mlx4_spec_tcp_udp { __be16 dst_port; __be16 dst_port_msk; __be16 src_port; __be16 src_port_msk; }; struct mlx4_spec_ipv4 { __be32 dst_ip; __be32 dst_ip_msk; __be32 src_ip; __be32 src_ip_msk; }; struct mlx4_spec_ib { __be32 l3_qpn; __be32 qpn_msk; u8 dst_gid[16]; u8 dst_gid_msk[16]; }; struct mlx4_spec_vxlan { __be32 vni; __be32 vni_mask; }; struct mlx4_spec_list { struct list_head list; enum mlx4_net_trans_rule_id id; union { struct mlx4_spec_eth eth; struct mlx4_spec_ib ib; struct mlx4_spec_ipv4 ipv4; struct mlx4_spec_tcp_udp tcp_udp; struct mlx4_spec_vxlan vxlan; }; }; enum mlx4_net_trans_hw_rule_queue { MLX4_NET_TRANS_Q_FIFO, MLX4_NET_TRANS_Q_LIFO, }; struct mlx4_net_trans_rule { struct list_head list; enum mlx4_net_trans_hw_rule_queue queue_mode; bool exclusive; bool allow_loopback; enum mlx4_net_trans_promisc_mode promisc_mode; u8 port; u16 priority; u32 qpn; }; struct mlx4_net_trans_rule_hw_ctrl { __be16 prio; u8 type; u8 flags; u8 rsvd1; u8 funcid; u8 vep; u8 port; __be32 qpn; __be32 rsvd2; }; struct mlx4_net_trans_rule_hw_ib { u8 size; u8 rsvd1; __be16 id; u32 rsvd2; __be32 l3_qpn; __be32 qpn_mask; u8 dst_gid[16]; u8 dst_gid_msk[16]; } __packed; struct mlx4_net_trans_rule_hw_eth { u8 size; u8 rsvd; __be16 id; u8 rsvd1[6]; u8 dst_mac[6]; u16 rsvd2; u8 dst_mac_msk[6]; u16 rsvd3; u8 src_mac[6]; u16 rsvd4; u8 src_mac_msk[6]; u8 rsvd5; u8 ether_type_enable; __be16 ether_type; __be16 vlan_tag_msk; __be16 vlan_tag; } __packed; struct mlx4_net_trans_rule_hw_tcp_udp { u8 size; u8 rsvd; __be16 id; __be16 rsvd1[3]; __be16 dst_port; __be16 rsvd2; __be16 dst_port_msk; __be16 rsvd3; __be16 src_port; __be16 rsvd4; __be16 src_port_msk; } __packed; struct mlx4_net_trans_rule_hw_ipv4 { u8 size; u8 rsvd; __be16 id; __be32 rsvd1; __be32 dst_ip; __be32 dst_ip_msk; __be32 src_ip; __be32 src_ip_msk; } __packed; struct mlx4_net_trans_rule_hw_vxlan { u8 size; u8 rsvd; __be16 id; __be32 rsvd1; __be32 vni; __be32 vni_mask; } __packed; struct _rule_hw { union { struct { u8 size; u8 rsvd; __be16 id; }; struct mlx4_net_trans_rule_hw_eth eth; struct mlx4_net_trans_rule_hw_ib ib; struct mlx4_net_trans_rule_hw_ipv4 ipv4; struct mlx4_net_trans_rule_hw_tcp_udp tcp_udp; struct mlx4_net_trans_rule_hw_vxlan vxlan; }; }; enum { VXLAN_STEER_BY_OUTER_MAC = 1 << 0, VXLAN_STEER_BY_OUTER_VLAN = 1 << 1, VXLAN_STEER_BY_VSID_VNI = 1 << 2, VXLAN_STEER_BY_INNER_MAC = 1 << 3, VXLAN_STEER_BY_INNER_VLAN = 1 << 4, }; enum { MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS = 0x2, }; int mlx4_flow_steer_promisc_add(struct mlx4_dev *dev, u8 port, u32 qpn, enum mlx4_net_trans_promisc_mode mode); int mlx4_flow_steer_promisc_remove(struct mlx4_dev *dev, u8 port, enum mlx4_net_trans_promisc_mode mode); int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port); int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); int mlx4_SET_PORT_user_mac(struct mlx4_dev *dev, u8 port, u8 *user_mac); int mlx4_SET_PORT_user_mtu(struct mlx4_dev *dev, u8 port, u16 user_mtu); int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, u8 promisc); int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time); int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value); int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable); int set_phv_bit(struct mlx4_dev *dev, u8 port, int new_val); int get_phv_bit(struct mlx4_dev *dev, u8 port, int *phv); int mlx4_get_is_vlan_offload_disabled(struct mlx4_dev *dev, u8 port, bool *vlan_offload_disabled); void mlx4_handle_eth_header_mcast_prio(struct mlx4_net_trans_rule_hw_ctrl *ctrl, struct _rule_hw *eth_header); int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx); int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan); int mlx4_SYNC_TPT(struct mlx4_dev *dev); int mlx4_test_interrupt(struct mlx4_dev *dev, int vector); int mlx4_test_async(struct mlx4_dev *dev); int mlx4_query_diag_counters(struct mlx4_dev *dev, u8 op_modifier, const u32 offset[], u32 value[], size_t array_len, u8 port); u32 mlx4_get_eqs_per_port(struct mlx4_dev *dev, u8 port); bool mlx4_is_eq_vector_valid(struct mlx4_dev *dev, u8 port, int vector); struct cpu_rmap *mlx4_get_cpu_rmap(struct mlx4_dev *dev, int port); int mlx4_assign_eq(struct mlx4_dev *dev, u8 port, int *vector); void mlx4_release_eq(struct mlx4_dev *dev, int vec); int mlx4_is_eq_shared(struct mlx4_dev *dev, int vector); int mlx4_eq_get_irq(struct mlx4_dev *dev, int vec); int mlx4_get_phys_port_id(struct mlx4_dev *dev); int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port); int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx, u8 usage); void mlx4_counter_free(struct mlx4_dev *dev, u32 idx); int mlx4_get_default_counter_index(struct mlx4_dev *dev, int port); void mlx4_set_admin_guid(struct mlx4_dev *dev, __be64 guid, int entry, int port); __be64 mlx4_get_admin_guid(struct mlx4_dev *dev, int entry, int port); void mlx4_set_random_admin_guid(struct mlx4_dev *dev, int entry, int port); int mlx4_flow_attach(struct mlx4_dev *dev, struct mlx4_net_trans_rule *rule, u64 *reg_id); int mlx4_flow_detach(struct mlx4_dev *dev, u64 reg_id); int mlx4_map_sw_to_hw_steering_mode(struct mlx4_dev *dev, enum mlx4_net_trans_promisc_mode flow_type); int mlx4_map_sw_to_hw_steering_id(struct mlx4_dev *dev, enum mlx4_net_trans_rule_id id); int mlx4_hw_rule_sz(struct mlx4_dev *dev, enum mlx4_net_trans_rule_id id); int mlx4_tunnel_steer_add(struct mlx4_dev *dev, unsigned char *addr, int port, int qpn, u16 prio, u64 *reg_id); void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val); int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey); int mlx4_is_slave_active(struct mlx4_dev *dev, int slave); int mlx4_gen_pkey_eqe(struct mlx4_dev *dev, int slave, u8 port); int mlx4_gen_guid_change_eqe(struct mlx4_dev *dev, int slave, u8 port); int mlx4_gen_slaves_port_mgt_ev(struct mlx4_dev *dev, u8 port, int attr); int mlx4_gen_port_state_change_eqe(struct mlx4_dev *dev, int slave, u8 port, u8 port_subtype_change); enum slave_port_state mlx4_get_slave_port_state(struct mlx4_dev *dev, int slave, u8 port); int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, int event, enum slave_port_gen_event *gen_event); void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid); __be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave); int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, int *slave_id); int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, u8 *gid); int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn, u32 max_range_qpn); u64 mlx4_read_clock(struct mlx4_dev *dev); struct mlx4_active_ports { DECLARE_BITMAP(ports, MLX4_MAX_PORTS); }; /* Returns a bitmap of the physical ports which are assigned to slave */ struct mlx4_active_ports mlx4_get_active_ports(struct mlx4_dev *dev, int slave); /* Returns the physical port that represents the virtual port of the slave, */ /* or a value < 0 in case of an error. If a slave has 2 ports, the identity */ /* mapping is returned. */ int mlx4_slave_convert_port(struct mlx4_dev *dev, int slave, int port); struct mlx4_slaves_pport { DECLARE_BITMAP(slaves, MLX4_MFUNC_MAX); }; /* Returns a bitmap of all slaves that are assigned to port. */ struct mlx4_slaves_pport mlx4_phys_to_slaves_pport(struct mlx4_dev *dev, int port); /* Returns a bitmap of all slaves that are assigned exactly to all the */ /* the ports that are set in crit_ports. */ struct mlx4_slaves_pport mlx4_phys_to_slaves_pport_actv( struct mlx4_dev *dev, const struct mlx4_active_ports *crit_ports); /* Returns the slave's virtual port that represents the physical port. */ int mlx4_phys_to_slave_port(struct mlx4_dev *dev, int slave, int port); int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port); int mlx4_config_vxlan_port(struct mlx4_dev *dev, __be16 udp_port); int mlx4_disable_rx_port_check(struct mlx4_dev *dev, bool dis); int mlx4_config_roce_v2_port(struct mlx4_dev *dev, u16 udp_port); int mlx4_virt2phy_port_map(struct mlx4_dev *dev, u32 port1, u32 port2); int mlx4_vf_smi_enabled(struct mlx4_dev *dev, int slave, int port); int mlx4_vf_get_enable_smi_admin(struct mlx4_dev *dev, int slave, int port); int mlx4_vf_set_enable_smi_admin(struct mlx4_dev *dev, int slave, int port, int enable); struct mlx4_mpt_entry; int mlx4_mr_hw_get_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr, struct mlx4_mpt_entry ***mpt_entry); int mlx4_mr_hw_write_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr, struct mlx4_mpt_entry **mpt_entry); int mlx4_mr_hw_change_pd(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry, u32 pdn); int mlx4_mr_hw_change_access(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry, u32 access); void mlx4_mr_hw_put_mpt(struct mlx4_dev *dev, struct mlx4_mpt_entry **mpt_entry); void mlx4_mr_rereg_mem_cleanup(struct mlx4_dev *dev, struct mlx4_mr *mr); int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr, u64 iova, u64 size, int npages, int page_shift, struct mlx4_mpt_entry *mpt_entry); int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, u16 offset, u16 size, u8 *data); int mlx4_max_tc(struct mlx4_dev *dev); /* Returns true if running in low memory profile (kdump kernel) */ static inline bool mlx4_low_memory_profile(void) { return is_kdump_kernel(); } /* ACCESS REG commands */ enum mlx4_access_reg_method { MLX4_ACCESS_REG_QUERY = 0x1, MLX4_ACCESS_REG_WRITE = 0x2, }; /* ACCESS PTYS Reg command */ enum mlx4_ptys_proto { MLX4_PTYS_IB = 1<<0, MLX4_PTYS_EN = 1<<2, }; enum mlx4_ptys_flags { MLX4_PTYS_AN_DISABLE_CAP = 1 << 5, MLX4_PTYS_AN_DISABLE_ADMIN = 1 << 6, }; struct mlx4_ptys_reg { u8 flags; u8 local_port; u8 resrvd2; u8 proto_mask; __be32 resrvd3[2]; __be32 eth_proto_cap; __be16 ib_width_cap; __be16 ib_speed_cap; __be32 resrvd4; __be32 eth_proto_admin; __be16 ib_width_admin; __be16 ib_speed_admin; __be32 resrvd5; __be32 eth_proto_oper; __be16 ib_width_oper; __be16 ib_speed_oper; __be32 resrvd6; __be32 eth_proto_lp_adv; } __packed; int mlx4_ACCESS_PTYS_REG(struct mlx4_dev *dev, enum mlx4_access_reg_method method, struct mlx4_ptys_reg *ptys_reg); int mlx4_get_internal_clock_params(struct mlx4_dev *dev, struct mlx4_clock_params *params); static inline int mlx4_to_hw_uar_index(struct mlx4_dev *dev, int index) { return (index << (PAGE_SHIFT - dev->uar_page_shift)); } static inline int mlx4_get_num_reserved_uar(struct mlx4_dev *dev) { /* The first 128 UARs are used for EQ doorbells */ return (128 >> (PAGE_SHIFT - dev->uar_page_shift)); } #endif /* MLX4_DEVICE_H */ PK ! �P� � � efi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_EFI_H #define _LINUX_EFI_H /* * Extensible Firmware Interface * Based on 'Extensible Firmware Interface Specification' version 0.9, April 30, 1999 * * Copyright (C) 1999 VA Linux Systems * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> * Copyright (C) 1999, 2002-2003 Hewlett-Packard Co. * David Mosberger-Tang <davidm@hpl.hp.com> * Stephane Eranian <eranian@hpl.hp.com> */ #include <linux/init.h> #include <linux/string.h> #include <linux/time.h> #include <linux/types.h> #include <linux/proc_fs.h> #include <linux/rtc.h> #include <linux/ioport.h> #include <linux/pfn.h> #include <linux/pstore.h> #include <linux/range.h> #include <linux/reboot.h> #include <linux/uuid.h> #include <linux/screen_info.h> #include <asm/page.h> #define EFI_SUCCESS 0 #define EFI_LOAD_ERROR ( 1 | (1UL << (BITS_PER_LONG-1))) #define EFI_INVALID_PARAMETER ( 2 | (1UL << (BITS_PER_LONG-1))) #define EFI_UNSUPPORTED ( 3 | (1UL << (BITS_PER_LONG-1))) #define EFI_BAD_BUFFER_SIZE ( 4 | (1UL << (BITS_PER_LONG-1))) #define EFI_BUFFER_TOO_SMALL ( 5 | (1UL << (BITS_PER_LONG-1))) #define EFI_NOT_READY ( 6 | (1UL << (BITS_PER_LONG-1))) #define EFI_DEVICE_ERROR ( 7 | (1UL << (BITS_PER_LONG-1))) #define EFI_WRITE_PROTECTED ( 8 | (1UL << (BITS_PER_LONG-1))) #define EFI_OUT_OF_RESOURCES ( 9 | (1UL << (BITS_PER_LONG-1))) #define EFI_NOT_FOUND (14 | (1UL << (BITS_PER_LONG-1))) #define EFI_TIMEOUT (18 | (1UL << (BITS_PER_LONG-1))) #define EFI_ABORTED (21 | (1UL << (BITS_PER_LONG-1))) #define EFI_SECURITY_VIOLATION (26 | (1UL << (BITS_PER_LONG-1))) #define EFI_IS_ERROR(x) ((x) & (1UL << (BITS_PER_LONG-1))) typedef unsigned long efi_status_t; typedef u8 efi_bool_t; typedef u16 efi_char16_t; /* UNICODE character */ typedef u64 efi_physical_addr_t; typedef void *efi_handle_t; #if defined(CONFIG_X86_64) #define __efiapi __attribute__((ms_abi)) #elif defined(CONFIG_X86_32) #define __efiapi __attribute__((regparm(0))) #else #define __efiapi #endif /* * The UEFI spec and EDK2 reference implementation both define EFI_GUID as * struct { u32 a; u16; b; u16 c; u8 d[8]; }; and so the implied alignment * is 32 bits not 8 bits like our guid_t. In some cases (i.e., on 32-bit ARM), * this means that firmware services invoked by the kernel may assume that * efi_guid_t* arguments are 32-bit aligned, and use memory accessors that * do not tolerate misalignment. So let's set the minimum alignment to 32 bits. * * Note that the UEFI spec as well as some comments in the EDK2 code base * suggest that EFI_GUID should be 64-bit aligned, but this appears to be * a mistake, given that no code seems to exist that actually enforces that * or relies on it. */ typedef guid_t efi_guid_t __aligned(__alignof__(u32)); #define EFI_GUID(a, b, c, d...) (efi_guid_t){ { \ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \ (b) & 0xff, ((b) >> 8) & 0xff, \ (c) & 0xff, ((c) >> 8) & 0xff, d } } /* * Generic EFI table header */ typedef struct { u64 signature; u32 revision; u32 headersize; u32 crc32; u32 reserved; } efi_table_hdr_t; /* * Memory map descriptor: */ /* Memory types: */ #define EFI_RESERVED_TYPE 0 #define EFI_LOADER_CODE 1 #define EFI_LOADER_DATA 2 #define EFI_BOOT_SERVICES_CODE 3 #define EFI_BOOT_SERVICES_DATA 4 #define EFI_RUNTIME_SERVICES_CODE 5 #define EFI_RUNTIME_SERVICES_DATA 6 #define EFI_CONVENTIONAL_MEMORY 7 #define EFI_UNUSABLE_MEMORY 8 #define EFI_ACPI_RECLAIM_MEMORY 9 #define EFI_ACPI_MEMORY_NVS 10 #define EFI_MEMORY_MAPPED_IO 11 #define EFI_MEMORY_MAPPED_IO_PORT_SPACE 12 #define EFI_PAL_CODE 13 #define EFI_PERSISTENT_MEMORY 14 #define EFI_MAX_MEMORY_TYPE 15 /* Attribute values: */ #define EFI_MEMORY_UC ((u64)0x0000000000000001ULL) /* uncached */ #define EFI_MEMORY_WC ((u64)0x0000000000000002ULL) /* write-coalescing */ #define EFI_MEMORY_WT ((u64)0x0000000000000004ULL) /* write-through */ #define EFI_MEMORY_WB ((u64)0x0000000000000008ULL) /* write-back */ #define EFI_MEMORY_UCE ((u64)0x0000000000000010ULL) /* uncached, exported */ #define EFI_MEMORY_WP ((u64)0x0000000000001000ULL) /* write-protect */ #define EFI_MEMORY_RP ((u64)0x0000000000002000ULL) /* read-protect */ #define EFI_MEMORY_XP ((u64)0x0000000000004000ULL) /* execute-protect */ #define EFI_MEMORY_NV ((u64)0x0000000000008000ULL) /* non-volatile */ #define EFI_MEMORY_MORE_RELIABLE \ ((u64)0x0000000000010000ULL) /* higher reliability */ #define EFI_MEMORY_RO ((u64)0x0000000000020000ULL) /* read-only */ #define EFI_MEMORY_SP ((u64)0x0000000000040000ULL) /* soft reserved */ #define EFI_MEMORY_CPU_CRYPTO ((u64)0x0000000000080000ULL) /* supports encryption */ #define EFI_MEMORY_HOT_PLUGGABLE BIT_ULL(20) /* supports unplugging at runtime */ #define EFI_MEMORY_RUNTIME ((u64)0x8000000000000000ULL) /* range requires runtime mapping */ #define EFI_MEMORY_DESCRIPTOR_VERSION 1 #define EFI_PAGE_SHIFT 12 #define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) #define EFI_PAGES_MAX (U64_MAX >> EFI_PAGE_SHIFT) typedef struct { u32 type; u32 pad; u64 phys_addr; u64 virt_addr; u64 num_pages; u64 attribute; } efi_memory_desc_t; typedef struct { efi_guid_t guid; u32 headersize; u32 flags; u32 imagesize; } efi_capsule_header_t; /* * EFI capsule flags */ #define EFI_CAPSULE_PERSIST_ACROSS_RESET 0x00010000 #define EFI_CAPSULE_POPULATE_SYSTEM_TABLE 0x00020000 #define EFI_CAPSULE_INITIATE_RESET 0x00040000 struct capsule_info { efi_capsule_header_t header; efi_capsule_header_t *capsule; int reset_type; long index; size_t count; size_t total_size; struct page **pages; phys_addr_t *phys; size_t page_bytes_remain; }; int efi_capsule_setup_info(struct capsule_info *cap_info, void *kbuff, size_t hdr_bytes); int __efi_capsule_setup_info(struct capsule_info *cap_info); /* * Types and defines for Time Services */ #define EFI_TIME_ADJUST_DAYLIGHT 0x1 #define EFI_TIME_IN_DAYLIGHT 0x2 #define EFI_UNSPECIFIED_TIMEZONE 0x07ff typedef struct { u16 year; u8 month; u8 day; u8 hour; u8 minute; u8 second; u8 pad1; u32 nanosecond; s16 timezone; u8 daylight; u8 pad2; } efi_time_t; typedef struct { u32 resolution; u32 accuracy; u8 sets_to_zero; } efi_time_cap_t; typedef union efi_boot_services efi_boot_services_t; /* * Types and defines for EFI ResetSystem */ #define EFI_RESET_COLD 0 #define EFI_RESET_WARM 1 #define EFI_RESET_SHUTDOWN 2 /* * EFI Runtime Services table */ #define EFI_RUNTIME_SERVICES_SIGNATURE ((u64)0x5652453544e5552ULL) #define EFI_RUNTIME_SERVICES_REVISION 0x00010000 typedef struct { efi_table_hdr_t hdr; u32 get_time; u32 set_time; u32 get_wakeup_time; u32 set_wakeup_time; u32 set_virtual_address_map; u32 convert_pointer; u32 get_variable; u32 get_next_variable; u32 set_variable; u32 get_next_high_mono_count; u32 reset_system; u32 update_capsule; u32 query_capsule_caps; u32 query_variable_info; } efi_runtime_services_32_t; typedef efi_status_t efi_get_time_t (efi_time_t *tm, efi_time_cap_t *tc); typedef efi_status_t efi_set_time_t (efi_time_t *tm); typedef efi_status_t efi_get_wakeup_time_t (efi_bool_t *enabled, efi_bool_t *pending, efi_time_t *tm); typedef efi_status_t efi_set_wakeup_time_t (efi_bool_t enabled, efi_time_t *tm); typedef efi_status_t efi_get_variable_t (efi_char16_t *name, efi_guid_t *vendor, u32 *attr, unsigned long *data_size, void *data); typedef efi_status_t efi_get_next_variable_t (unsigned long *name_size, efi_char16_t *name, efi_guid_t *vendor); typedef efi_status_t efi_set_variable_t (efi_char16_t *name, efi_guid_t *vendor, u32 attr, unsigned long data_size, void *data); typedef efi_status_t efi_get_next_high_mono_count_t (u32 *count); typedef void efi_reset_system_t (int reset_type, efi_status_t status, unsigned long data_size, efi_char16_t *data); typedef efi_status_t efi_set_virtual_address_map_t (unsigned long memory_map_size, unsigned long descriptor_size, u32 descriptor_version, efi_memory_desc_t *virtual_map); typedef efi_status_t efi_query_variable_info_t(u32 attr, u64 *storage_space, u64 *remaining_space, u64 *max_variable_size); typedef efi_status_t efi_update_capsule_t(efi_capsule_header_t **capsules, unsigned long count, unsigned long sg_list); typedef efi_status_t efi_query_capsule_caps_t(efi_capsule_header_t **capsules, unsigned long count, u64 *max_size, int *reset_type); typedef efi_status_t efi_query_variable_store_t(u32 attributes, unsigned long size, bool nonblocking); typedef union { struct { efi_table_hdr_t hdr; efi_get_time_t __efiapi *get_time; efi_set_time_t __efiapi *set_time; efi_get_wakeup_time_t __efiapi *get_wakeup_time; efi_set_wakeup_time_t __efiapi *set_wakeup_time; efi_set_virtual_address_map_t __efiapi *set_virtual_address_map; void *convert_pointer; efi_get_variable_t __efiapi *get_variable; efi_get_next_variable_t __efiapi *get_next_variable; efi_set_variable_t __efiapi *set_variable; efi_get_next_high_mono_count_t __efiapi *get_next_high_mono_count; efi_reset_system_t __efiapi *reset_system; efi_update_capsule_t __efiapi *update_capsule; efi_query_capsule_caps_t __efiapi *query_capsule_caps; efi_query_variable_info_t __efiapi *query_variable_info; }; efi_runtime_services_32_t mixed_mode; } efi_runtime_services_t; void efi_native_runtime_setup(void); /* * EFI Configuration Table and GUID definitions * * These are all defined in a single line to make them easier to * grep for and to see them at a glance - while still having a * similar structure to the definitions in the spec. * * Here's how they are structured: * * GUID: 12345678-1234-1234-1234-123456789012 * Spec: * #define EFI_SOME_PROTOCOL_GUID \ * {0x12345678,0x1234,0x1234,\ * {0x12,0x34,0x12,0x34,0x56,0x78,0x90,0x12}} * Here: * #define SOME_PROTOCOL_GUID EFI_GUID(0x12345678, 0x1234, 0x1234, 0x12, 0x34, 0x12, 0x34, 0x56, 0x78, 0x90, 0x12) * ^ tabs ^extra space * * Note that the 'extra space' separates the values at the same place * where the UEFI SPEC breaks the line. */ #define NULL_GUID EFI_GUID(0x00000000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00) #define MPS_TABLE_GUID EFI_GUID(0xeb9d2d2f, 0x2d88, 0x11d3, 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) #define ACPI_TABLE_GUID EFI_GUID(0xeb9d2d30, 0x2d88, 0x11d3, 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) #define ACPI_20_TABLE_GUID EFI_GUID(0x8868e871, 0xe4f1, 0x11d3, 0xbc, 0x22, 0x00, 0x80, 0xc7, 0x3c, 0x88, 0x81) #define SMBIOS_TABLE_GUID EFI_GUID(0xeb9d2d31, 0x2d88, 0x11d3, 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) #define SMBIOS3_TABLE_GUID EFI_GUID(0xf2fd1544, 0x9794, 0x4a2c, 0x99, 0x2e, 0xe5, 0xbb, 0xcf, 0x20, 0xe3, 0x94) #define SAL_SYSTEM_TABLE_GUID EFI_GUID(0xeb9d2d32, 0x2d88, 0x11d3, 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) #define HCDP_TABLE_GUID EFI_GUID(0xf951938d, 0x620b, 0x42ef, 0x82, 0x79, 0xa8, 0x4b, 0x79, 0x61, 0x78, 0x98) #define UGA_IO_PROTOCOL_GUID EFI_GUID(0x61a4d49e, 0x6f68, 0x4f1b, 0xb9, 0x22, 0xa8, 0x6e, 0xed, 0x0b, 0x07, 0xa2) #define EFI_GLOBAL_VARIABLE_GUID EFI_GUID(0x8be4df61, 0x93ca, 0x11d2, 0xaa, 0x0d, 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c) #define UV_SYSTEM_TABLE_GUID EFI_GUID(0x3b13a7d4, 0x633e, 0x11dd, 0x93, 0xec, 0xda, 0x25, 0x56, 0xd8, 0x95, 0x93) #define LINUX_EFI_CRASH_GUID EFI_GUID(0xcfc8fc79, 0xbe2e, 0x4ddc, 0x97, 0xf0, 0x9f, 0x98, 0xbf, 0xe2, 0x98, 0xa0) #define LOADED_IMAGE_PROTOCOL_GUID EFI_GUID(0x5b1b31a1, 0x9562, 0x11d2, 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) #define EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID EFI_GUID(0x9042a9de, 0x23dc, 0x4a38, 0x96, 0xfb, 0x7a, 0xde, 0xd0, 0x80, 0x51, 0x6a) #define EFI_UGA_PROTOCOL_GUID EFI_GUID(0x982c298b, 0xf4fa, 0x41cb, 0xb8, 0x38, 0x77, 0xaa, 0x68, 0x8f, 0xb8, 0x39) #define EFI_PCI_IO_PROTOCOL_GUID EFI_GUID(0x4cf5b200, 0x68b8, 0x4ca5, 0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x02, 0x9a) #define EFI_FILE_INFO_ID EFI_GUID(0x09576e92, 0x6d3f, 0x11d2, 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) #define EFI_SYSTEM_RESOURCE_TABLE_GUID EFI_GUID(0xb122a263, 0x3661, 0x4f68, 0x99, 0x29, 0x78, 0xf8, 0xb0, 0xd6, 0x21, 0x80) #define EFI_FILE_SYSTEM_GUID EFI_GUID(0x964e5b22, 0x6459, 0x11d2, 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) #define DEVICE_TREE_GUID EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0) #define EFI_PROPERTIES_TABLE_GUID EFI_GUID(0x880aaca3, 0x4adc, 0x4a04, 0x90, 0x79, 0xb7, 0x47, 0x34, 0x08, 0x25, 0xe5) #define EFI_RNG_PROTOCOL_GUID EFI_GUID(0x3152bca5, 0xeade, 0x433d, 0x86, 0x2e, 0xc0, 0x1c, 0xdc, 0x29, 0x1f, 0x44) #define EFI_RNG_ALGORITHM_RAW EFI_GUID(0xe43176d7, 0xb6e8, 0x4827, 0xb7, 0x84, 0x7f, 0xfd, 0xc4, 0xb6, 0x85, 0x61) #define EFI_MEMORY_ATTRIBUTES_TABLE_GUID EFI_GUID(0xdcfa911d, 0x26eb, 0x469f, 0xa2, 0x20, 0x38, 0xb7, 0xdc, 0x46, 0x12, 0x20) #define EFI_CONSOLE_OUT_DEVICE_GUID EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) #define APPLE_PROPERTIES_PROTOCOL_GUID EFI_GUID(0x91bd12fe, 0xf6c3, 0x44fb, 0xa5, 0xb7, 0x51, 0x22, 0xab, 0x30, 0x3a, 0xe0) #define EFI_TCG2_PROTOCOL_GUID EFI_GUID(0x607f766c, 0x7455, 0x42be, 0x93, 0x0b, 0xe4, 0xd7, 0x6d, 0xb2, 0x72, 0x0f) #define EFI_LOAD_FILE_PROTOCOL_GUID EFI_GUID(0x56ec3091, 0x954c, 0x11d2, 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) #define EFI_LOAD_FILE2_PROTOCOL_GUID EFI_GUID(0x4006c0c1, 0xfcb3, 0x403e, 0x99, 0x6d, 0x4a, 0x6c, 0x87, 0x24, 0xe0, 0x6d) #define EFI_RT_PROPERTIES_TABLE_GUID EFI_GUID(0xeb66918a, 0x7eef, 0x402a, 0x84, 0x2e, 0x93, 0x1d, 0x21, 0xc3, 0x8a, 0xe9) #define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) #define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) #define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) #define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) #define EFI_CERT_X509_SHA256_GUID EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed) /* * This GUID is used to pass to the kernel proper the struct screen_info * structure that was populated by the stub based on the GOP protocol instance * associated with ConOut */ #define LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID EFI_GUID(0xe03fc20a, 0x85dc, 0x406e, 0xb9, 0x0e, 0x4a, 0xb5, 0x02, 0x37, 0x1d, 0x95) #define LINUX_EFI_ARM_CPU_STATE_TABLE_GUID EFI_GUID(0xef79e4aa, 0x3c3d, 0x4989, 0xb9, 0x02, 0x07, 0xa9, 0x43, 0xe5, 0x50, 0xd2) #define LINUX_EFI_LOADER_ENTRY_GUID EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f) #define LINUX_EFI_RANDOM_SEED_TABLE_GUID EFI_GUID(0x1ce1e5bc, 0x7ceb, 0x42f2, 0x81, 0xe5, 0x8a, 0xad, 0xf1, 0x80, 0xf5, 0x7b) #define LINUX_EFI_TPM_EVENT_LOG_GUID EFI_GUID(0xb7799cb0, 0xeca2, 0x4943, 0x96, 0x67, 0x1f, 0xae, 0x07, 0xb7, 0x47, 0xfa) #define LINUX_EFI_TPM_FINAL_LOG_GUID EFI_GUID(0x1e2ed096, 0x30e2, 0x4254, 0xbd, 0x89, 0x86, 0x3b, 0xbe, 0xf8, 0x23, 0x25) #define LINUX_EFI_MEMRESERVE_TABLE_GUID EFI_GUID(0x888eb0c6, 0x8ede, 0x4ff5, 0xa8, 0xf0, 0x9a, 0xee, 0x5c, 0xb9, 0x77, 0xc2) #define LINUX_EFI_INITRD_MEDIA_GUID EFI_GUID(0x5568e427, 0x68fc, 0x4f3d, 0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68) #define LINUX_EFI_MOK_VARIABLE_TABLE_GUID EFI_GUID(0xc451ed2b, 0x9694, 0x45d3, 0xba, 0xba, 0xed, 0x9f, 0x89, 0x88, 0xa3, 0x89) /* OEM GUIDs */ #define DELLEMC_EFI_RCI2_TABLE_GUID EFI_GUID(0x2d9f28a2, 0xa886, 0x456a, 0x97, 0xa8, 0xf1, 0x1e, 0xf2, 0x4f, 0xf4, 0x55) typedef struct { efi_guid_t guid; u64 table; } efi_config_table_64_t; typedef struct { efi_guid_t guid; u32 table; } efi_config_table_32_t; typedef union { struct { efi_guid_t guid; void *table; }; efi_config_table_32_t mixed_mode; } efi_config_table_t; typedef struct { efi_guid_t guid; unsigned long *ptr; const char name[16]; } efi_config_table_type_t; #define EFI_SYSTEM_TABLE_SIGNATURE ((u64)0x5453595320494249ULL) #define EFI_2_30_SYSTEM_TABLE_REVISION ((2 << 16) | (30)) #define EFI_2_20_SYSTEM_TABLE_REVISION ((2 << 16) | (20)) #define EFI_2_10_SYSTEM_TABLE_REVISION ((2 << 16) | (10)) #define EFI_2_00_SYSTEM_TABLE_REVISION ((2 << 16) | (00)) #define EFI_1_10_SYSTEM_TABLE_REVISION ((1 << 16) | (10)) #define EFI_1_02_SYSTEM_TABLE_REVISION ((1 << 16) | (02)) typedef struct { efi_table_hdr_t hdr; u64 fw_vendor; /* physical addr of CHAR16 vendor string */ u32 fw_revision; u32 __pad1; u64 con_in_handle; u64 con_in; u64 con_out_handle; u64 con_out; u64 stderr_handle; u64 stderr; u64 runtime; u64 boottime; u32 nr_tables; u32 __pad2; u64 tables; } efi_system_table_64_t; typedef struct { efi_table_hdr_t hdr; u32 fw_vendor; /* physical addr of CHAR16 vendor string */ u32 fw_revision; u32 con_in_handle; u32 con_in; u32 con_out_handle; u32 con_out; u32 stderr_handle; u32 stderr; u32 runtime; u32 boottime; u32 nr_tables; u32 tables; } efi_system_table_32_t; typedef union efi_simple_text_input_protocol efi_simple_text_input_protocol_t; typedef union efi_simple_text_output_protocol efi_simple_text_output_protocol_t; typedef union { struct { efi_table_hdr_t hdr; unsigned long fw_vendor; /* physical addr of CHAR16 vendor string */ u32 fw_revision; unsigned long con_in_handle; efi_simple_text_input_protocol_t *con_in; unsigned long con_out_handle; efi_simple_text_output_protocol_t *con_out; unsigned long stderr_handle; unsigned long stderr; efi_runtime_services_t *runtime; efi_boot_services_t *boottime; unsigned long nr_tables; unsigned long tables; }; efi_system_table_32_t mixed_mode; } efi_system_table_t; /* * Architecture independent structure for describing a memory map for the * benefit of efi_memmap_init_early(), and for passing context between * efi_memmap_alloc() and efi_memmap_install(). */ struct efi_memory_map_data { phys_addr_t phys_map; unsigned long size; unsigned long desc_version; unsigned long desc_size; unsigned long flags; }; struct efi_memory_map { phys_addr_t phys_map; void *map; void *map_end; int nr_map; unsigned long desc_version; unsigned long desc_size; #define EFI_MEMMAP_LATE (1UL << 0) #define EFI_MEMMAP_MEMBLOCK (1UL << 1) #define EFI_MEMMAP_SLAB (1UL << 2) unsigned long flags; }; struct efi_mem_range { struct range range; u64 attribute; }; typedef struct { u32 version; u32 length; u64 memory_protection_attribute; } efi_properties_table_t; #define EFI_PROPERTIES_TABLE_VERSION 0x00010000 #define EFI_PROPERTIES_RUNTIME_MEMORY_PROTECTION_NON_EXECUTABLE_PE_DATA 0x1 typedef struct { u16 version; u16 length; u32 runtime_services_supported; } efi_rt_properties_table_t; #define EFI_RT_PROPERTIES_TABLE_VERSION 0x1 #define EFI_INVALID_TABLE_ADDR (~0UL) typedef struct { u32 version; u32 num_entries; u32 desc_size; u32 reserved; efi_memory_desc_t entry[0]; } efi_memory_attributes_table_t; typedef struct { efi_guid_t signature_owner; u8 signature_data[]; } efi_signature_data_t; typedef struct { efi_guid_t signature_type; u32 signature_list_size; u32 signature_header_size; u32 signature_size; u8 signature_header[]; /* efi_signature_data_t signatures[][] */ } efi_signature_list_t; typedef u8 efi_sha256_hash_t[32]; typedef struct { efi_sha256_hash_t to_be_signed_hash; efi_time_t time_of_revocation; } efi_cert_x509_sha256_t; extern unsigned long __ro_after_init efi_rng_seed; /* RNG Seed table */ /* * All runtime access to EFI goes through this structure: */ extern struct efi { const efi_runtime_services_t *runtime; /* EFI runtime services table */ unsigned int runtime_version; /* Runtime services version */ unsigned int runtime_supported_mask; unsigned long acpi; /* ACPI table (IA64 ext 0.71) */ unsigned long acpi20; /* ACPI table (ACPI 2.0) */ unsigned long smbios; /* SMBIOS table (32 bit entry point) */ unsigned long smbios3; /* SMBIOS table (64 bit entry point) */ unsigned long esrt; /* ESRT table */ unsigned long tpm_log; /* TPM2 Event Log table */ unsigned long tpm_final_log; /* TPM2 Final Events Log table */ unsigned long mokvar_table; /* MOK variable config table */ efi_get_time_t *get_time; efi_set_time_t *set_time; efi_get_wakeup_time_t *get_wakeup_time; efi_set_wakeup_time_t *set_wakeup_time; efi_get_variable_t *get_variable; efi_get_next_variable_t *get_next_variable; efi_set_variable_t *set_variable; efi_set_variable_t *set_variable_nonblocking; efi_query_variable_info_t *query_variable_info; efi_query_variable_info_t *query_variable_info_nonblocking; efi_update_capsule_t *update_capsule; efi_query_capsule_caps_t *query_capsule_caps; efi_get_next_high_mono_count_t *get_next_high_mono_count; efi_reset_system_t *reset_system; struct efi_memory_map memmap; unsigned long flags; } efi; #define EFI_RT_SUPPORTED_GET_TIME 0x0001 #define EFI_RT_SUPPORTED_SET_TIME 0x0002 #define EFI_RT_SUPPORTED_GET_WAKEUP_TIME 0x0004 #define EFI_RT_SUPPORTED_SET_WAKEUP_TIME 0x0008 #define EFI_RT_SUPPORTED_GET_VARIABLE 0x0010 #define EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME 0x0020 #define EFI_RT_SUPPORTED_SET_VARIABLE 0x0040 #define EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP 0x0080 #define EFI_RT_SUPPORTED_CONVERT_POINTER 0x0100 #define EFI_RT_SUPPORTED_GET_NEXT_HIGH_MONOTONIC_COUNT 0x0200 #define EFI_RT_SUPPORTED_RESET_SYSTEM 0x0400 #define EFI_RT_SUPPORTED_UPDATE_CAPSULE 0x0800 #define EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES 0x1000 #define EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO 0x2000 #define EFI_RT_SUPPORTED_ALL 0x3fff #define EFI_RT_SUPPORTED_TIME_SERVICES 0x000f #define EFI_RT_SUPPORTED_VARIABLE_SERVICES 0x0070 extern struct mm_struct efi_mm; static inline int efi_guidcmp (efi_guid_t left, efi_guid_t right) { return memcmp(&left, &right, sizeof (efi_guid_t)); } static inline char * efi_guid_to_str(efi_guid_t *guid, char *out) { sprintf(out, "%pUl", guid->b); return out; } extern void efi_init (void); #ifdef CONFIG_EFI extern void efi_enter_virtual_mode (void); /* switch EFI to virtual mode, if possible */ #else static inline void efi_enter_virtual_mode (void) {} #endif #ifdef CONFIG_X86 extern efi_status_t efi_query_variable_store(u32 attributes, unsigned long size, bool nonblocking); #else static inline efi_status_t efi_query_variable_store(u32 attributes, unsigned long size, bool nonblocking) { return EFI_SUCCESS; } #endif extern void __iomem *efi_lookup_mapped_addr(u64 phys_addr); extern int __init __efi_memmap_init(struct efi_memory_map_data *data); extern int __init efi_memmap_init_early(struct efi_memory_map_data *data); extern int __init efi_memmap_init_late(phys_addr_t addr, unsigned long size); extern void __init efi_memmap_unmap(void); #ifdef CONFIG_EFI_ESRT extern void __init efi_esrt_init(void); #else static inline void efi_esrt_init(void) { } #endif extern int efi_config_parse_tables(const efi_config_table_t *config_tables, int count, const efi_config_table_type_t *arch_tables); extern int efi_systab_check_header(const efi_table_hdr_t *systab_hdr, int min_major_version); extern void efi_systab_report_header(const efi_table_hdr_t *systab_hdr, unsigned long fw_vendor); extern u64 efi_get_iobase (void); extern int efi_mem_type(unsigned long phys_addr); extern u64 efi_mem_attributes (unsigned long phys_addr); extern u64 efi_mem_attribute (unsigned long phys_addr, unsigned long size); extern int __init efi_uart_console_only (void); extern u64 efi_mem_desc_end(efi_memory_desc_t *md); extern int efi_mem_desc_lookup(u64 phys_addr, efi_memory_desc_t *out_md); extern void efi_mem_reserve(phys_addr_t addr, u64 size); extern int efi_mem_reserve_persistent(phys_addr_t addr, u64 size); extern void efi_initialize_iomem_resources(struct resource *code_resource, struct resource *data_resource, struct resource *bss_resource); extern u64 efi_get_fdt_params(struct efi_memory_map_data *data); extern struct kobject *efi_kobj; extern int efi_reboot_quirk_mode; extern bool efi_poweroff_required(void); #ifdef CONFIG_EFI_FAKE_MEMMAP extern void __init efi_fake_memmap(void); #else static inline void efi_fake_memmap(void) { } #endif extern unsigned long efi_mem_attr_table; /* * efi_memattr_perm_setter - arch specific callback function passed into * efi_memattr_apply_permissions() that updates the * mapping permissions described by the second * argument in the page tables referred to by the * first argument. */ typedef int (*efi_memattr_perm_setter)(struct mm_struct *, efi_memory_desc_t *); extern int efi_memattr_init(void); extern int efi_memattr_apply_permissions(struct mm_struct *mm, efi_memattr_perm_setter fn); /* * efi_early_memdesc_ptr - get the n-th EFI memmap descriptor * @map: the start of efi memmap * @desc_size: the size of space for each EFI memmap descriptor * @n: the index of efi memmap descriptor * * EFI boot service provides the GetMemoryMap() function to get a copy of the * current memory map which is an array of memory descriptors, each of * which describes a contiguous block of memory. It also gets the size of the * map, and the size of each descriptor, etc. * * Note that per section 6.2 of UEFI Spec 2.6 Errata A, the returned size of * each descriptor might not be equal to sizeof(efi_memory_memdesc_t), * since efi_memory_memdesc_t may be extended in the future. Thus the OS * MUST use the returned size of the descriptor to find the start of each * efi_memory_memdesc_t in the memory map array. This should only be used * during bootup since for_each_efi_memory_desc_xxx() is available after the * kernel initializes the EFI subsystem to set up struct efi_memory_map. */ #define efi_early_memdesc_ptr(map, desc_size, n) \ (efi_memory_desc_t *)((void *)(map) + ((n) * (desc_size))) /* Iterate through an efi_memory_map */ #define for_each_efi_memory_desc_in_map(m, md) \ for ((md) = (m)->map; \ (md) && ((void *)(md) + (m)->desc_size) <= (m)->map_end; \ (md) = (void *)(md) + (m)->desc_size) /** * for_each_efi_memory_desc - iterate over descriptors in efi.memmap * @md: the efi_memory_desc_t * iterator * * Once the loop finishes @md must not be accessed. */ #define for_each_efi_memory_desc(md) \ for_each_efi_memory_desc_in_map(&efi.memmap, md) /* * Format an EFI memory descriptor's type and attributes to a user-provided * character buffer, as per snprintf(), and return the buffer. */ char * __init efi_md_typeattr_format(char *buf, size_t size, const efi_memory_desc_t *md); typedef void (*efi_element_handler_t)(const char *source, const void *element_data, size_t element_size); extern int __init parse_efi_signature_list( const char *source, const void *data, size_t size, efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)); /** * efi_range_is_wc - check the WC bit on an address range * @start: starting kvirt address * @len: length of range * * Consult the EFI memory map and make sure it's ok to set this range WC. * Returns true or false. */ static inline int efi_range_is_wc(unsigned long start, unsigned long len) { unsigned long i; for (i = 0; i < len; i += (1UL << EFI_PAGE_SHIFT)) { unsigned long paddr = __pa(start + i); if (!(efi_mem_attributes(paddr) & EFI_MEMORY_WC)) return 0; } /* The range checked out */ return 1; } #ifdef CONFIG_EFI_PCDP extern int __init efi_setup_pcdp_console(char *); #endif /* * We play games with efi_enabled so that the compiler will, if * possible, remove EFI-related code altogether. */ #define EFI_BOOT 0 /* Were we booted from EFI? */ #define EFI_CONFIG_TABLES 2 /* Can we use EFI config tables? */ #define EFI_RUNTIME_SERVICES 3 /* Can we use runtime services? */ #define EFI_MEMMAP 4 /* Can we use EFI memory map? */ #define EFI_64BIT 5 /* Is the firmware 64-bit? */ #define EFI_PARAVIRT 6 /* Access is via a paravirt interface */ #define EFI_ARCH_1 7 /* First arch-specific bit */ #define EFI_DBG 8 /* Print additional debug info at runtime */ #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ #define EFI_MEM_NO_SOFT_RESERVE 11 /* Is the kernel configured to ignore soft reservations? */ #define EFI_PRESERVE_BS_REGIONS 12 /* Are EFI boot-services memory segments available? */ #define EFI_SECURE_BOOT 13 /* Are we in Secure Boot mode? */ enum efi_secureboot_mode { efi_secureboot_mode_unset, efi_secureboot_mode_unknown, efi_secureboot_mode_disabled, efi_secureboot_mode_enabled, }; #ifdef CONFIG_EFI_PARAMS_FROM_FDT u32 __init efi_get__secure_boot(void); #else static inline u32 efi_get__secure_boot(void) { return efi_secureboot_mode_unset; }; #endif #ifdef CONFIG_EFI /* * Test whether the above EFI_* bits are enabled. */ static inline bool efi_enabled(int feature) { return test_bit(feature, &efi.flags) != 0; } extern void efi_reboot(enum reboot_mode reboot_mode, const char *__unused); extern void __init efi_set_secure_boot(enum efi_secureboot_mode mode); bool __pure __efi_soft_reserve_enabled(void); static inline bool __pure efi_soft_reserve_enabled(void) { return IS_ENABLED(CONFIG_EFI_SOFT_RESERVE) && __efi_soft_reserve_enabled(); } static inline bool efi_rt_services_supported(unsigned int mask) { return (efi.runtime_supported_mask & mask) == mask; } #else static inline bool efi_enabled(int feature) { return false; } static inline void efi_reboot(enum reboot_mode reboot_mode, const char *__unused) {} static inline void efi_set_secure_boot(enum efi_secureboot_mode mode) {} static inline bool efi_soft_reserve_enabled(void) { return false; } static inline bool efi_rt_services_supported(unsigned int mask) { return false; } #endif extern int efi_status_to_err(efi_status_t status); extern const char *efi_status_to_str(efi_status_t status); /* * Variable Attributes */ #define EFI_VARIABLE_NON_VOLATILE 0x0000000000000001 #define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x0000000000000002 #define EFI_VARIABLE_RUNTIME_ACCESS 0x0000000000000004 #define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x0000000000000008 #define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x0000000000000010 #define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x0000000000000020 #define EFI_VARIABLE_APPEND_WRITE 0x0000000000000040 #define EFI_VARIABLE_MASK (EFI_VARIABLE_NON_VOLATILE | \ EFI_VARIABLE_BOOTSERVICE_ACCESS | \ EFI_VARIABLE_RUNTIME_ACCESS | \ EFI_VARIABLE_HARDWARE_ERROR_RECORD | \ EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \ EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | \ EFI_VARIABLE_APPEND_WRITE) /* * Length of a GUID string (strlen("aaaaaaaa-bbbb-cccc-dddd-eeeeeeeeeeee")) * not including trailing NUL */ #define EFI_VARIABLE_GUID_LEN UUID_STRING_LEN /* * EFI Device Path information */ #define EFI_DEV_HW 0x01 #define EFI_DEV_PCI 1 #define EFI_DEV_PCCARD 2 #define EFI_DEV_MEM_MAPPED 3 #define EFI_DEV_VENDOR 4 #define EFI_DEV_CONTROLLER 5 #define EFI_DEV_ACPI 0x02 #define EFI_DEV_BASIC_ACPI 1 #define EFI_DEV_EXPANDED_ACPI 2 #define EFI_DEV_MSG 0x03 #define EFI_DEV_MSG_ATAPI 1 #define EFI_DEV_MSG_SCSI 2 #define EFI_DEV_MSG_FC 3 #define EFI_DEV_MSG_1394 4 #define EFI_DEV_MSG_USB 5 #define EFI_DEV_MSG_USB_CLASS 15 #define EFI_DEV_MSG_I20 6 #define EFI_DEV_MSG_MAC 11 #define EFI_DEV_MSG_IPV4 12 #define EFI_DEV_MSG_IPV6 13 #define EFI_DEV_MSG_INFINIBAND 9 #define EFI_DEV_MSG_UART 14 #define EFI_DEV_MSG_VENDOR 10 #define EFI_DEV_MEDIA 0x04 #define EFI_DEV_MEDIA_HARD_DRIVE 1 #define EFI_DEV_MEDIA_CDROM 2 #define EFI_DEV_MEDIA_VENDOR 3 #define EFI_DEV_MEDIA_FILE 4 #define EFI_DEV_MEDIA_PROTOCOL 5 #define EFI_DEV_BIOS_BOOT 0x05 #define EFI_DEV_END_PATH 0x7F #define EFI_DEV_END_PATH2 0xFF #define EFI_DEV_END_INSTANCE 0x01 #define EFI_DEV_END_ENTIRE 0xFF struct efi_generic_dev_path { u8 type; u8 sub_type; u16 length; } __packed; struct efi_acpi_dev_path { struct efi_generic_dev_path header; u32 hid; u32 uid; } __packed; struct efi_pci_dev_path { struct efi_generic_dev_path header; u8 fn; u8 dev; } __packed; struct efi_vendor_dev_path { struct efi_generic_dev_path header; efi_guid_t vendorguid; u8 vendordata[]; } __packed; struct efi_dev_path { union { struct efi_generic_dev_path header; struct efi_acpi_dev_path acpi; struct efi_pci_dev_path pci; struct efi_vendor_dev_path vendor; }; } __packed; struct device *efi_get_device_by_path(const struct efi_dev_path **node, size_t *len); static inline void memrange_efi_to_native(u64 *addr, u64 *npages) { *npages = PFN_UP(*addr + (*npages<<EFI_PAGE_SHIFT)) - PFN_DOWN(*addr); *addr &= PAGE_MASK; } /* * EFI Variable support. * * Different firmware drivers can expose their EFI-like variables using * the following. */ struct efivar_operations { efi_get_variable_t *get_variable; efi_get_next_variable_t *get_next_variable; efi_set_variable_t *set_variable; efi_set_variable_t *set_variable_nonblocking; efi_query_variable_store_t *query_variable_store; }; struct efivars { struct kset *kset; struct kobject *kobject; const struct efivar_operations *ops; }; /* * The maximum size of VariableName + Data = 1024 * Therefore, it's reasonable to save that much * space in each part of the structure, * and we use a page for reading/writing. */ #define EFI_VAR_NAME_LEN 1024 struct efi_variable { efi_char16_t VariableName[EFI_VAR_NAME_LEN/sizeof(efi_char16_t)]; efi_guid_t VendorGuid; unsigned long DataSize; __u8 Data[1024]; efi_status_t Status; __u32 Attributes; } __attribute__((packed)); struct efivar_entry { struct efi_variable var; struct list_head list; struct kobject kobj; bool scanning; bool deleting; }; static inline void efivar_unregister(struct efivar_entry *var) { kobject_put(&var->kobj); } int efivars_register(struct efivars *efivars, const struct efivar_operations *ops, struct kobject *kobject); int efivars_unregister(struct efivars *efivars); struct kobject *efivars_kobject(void); int efivar_supports_writes(void); int efivar_init(int (*func)(efi_char16_t *, efi_guid_t, unsigned long, void *), void *data, bool duplicates, struct list_head *head); int efivar_entry_add(struct efivar_entry *entry, struct list_head *head); int efivar_entry_remove(struct efivar_entry *entry); int __efivar_entry_delete(struct efivar_entry *entry); int efivar_entry_delete(struct efivar_entry *entry); int efivar_entry_size(struct efivar_entry *entry, unsigned long *size); int __efivar_entry_get(struct efivar_entry *entry, u32 *attributes, unsigned long *size, void *data); int efivar_entry_get(struct efivar_entry *entry, u32 *attributes, unsigned long *size, void *data); int efivar_entry_set(struct efivar_entry *entry, u32 attributes, unsigned long size, void *data, struct list_head *head); int efivar_entry_set_get_size(struct efivar_entry *entry, u32 attributes, unsigned long *size, void *data, bool *set); int efivar_entry_set_safe(efi_char16_t *name, efi_guid_t vendor, u32 attributes, bool block, unsigned long size, void *data); int efivar_entry_iter_begin(void); void efivar_entry_iter_end(void); int __efivar_entry_iter(int (*func)(struct efivar_entry *, void *), struct list_head *head, void *data, struct efivar_entry **prev); int efivar_entry_iter(int (*func)(struct efivar_entry *, void *), struct list_head *head, void *data); struct efivar_entry *efivar_entry_find(efi_char16_t *name, efi_guid_t guid, struct list_head *head, bool remove); bool efivar_validate(efi_guid_t vendor, efi_char16_t *var_name, u8 *data, unsigned long data_size); bool efivar_variable_is_removable(efi_guid_t vendor, const char *name, size_t len); #if IS_ENABLED(CONFIG_EFI_CAPSULE_LOADER) extern bool efi_capsule_pending(int *reset_type); extern int efi_capsule_supported(efi_guid_t guid, u32 flags, size_t size, int *reset); extern int efi_capsule_update(efi_capsule_header_t *capsule, phys_addr_t *pages); #else static inline bool efi_capsule_pending(int *reset_type) { return false; } #endif #ifdef CONFIG_EFI_RUNTIME_MAP int efi_runtime_map_init(struct kobject *); int efi_get_runtime_map_size(void); int efi_get_runtime_map_desc_size(void); int efi_runtime_map_copy(void *buf, size_t bufsz); #else static inline int efi_runtime_map_init(struct kobject *kobj) { return 0; } static inline int efi_get_runtime_map_size(void) { return 0; } static inline int efi_get_runtime_map_desc_size(void) { return 0; } static inline int efi_runtime_map_copy(void *buf, size_t bufsz) { return 0; } #endif #ifdef CONFIG_EFI extern bool efi_runtime_disabled(void); #else static inline bool efi_runtime_disabled(void) { return true; } #endif extern void efi_call_virt_check_flags(unsigned long flags, const char *call); extern unsigned long efi_call_virt_save_flags(void); static inline enum efi_secureboot_mode efi_get_secureboot_mode(efi_get_variable_t *get_var) { u8 secboot, setupmode = 0; efi_status_t status; unsigned long size; size = sizeof(secboot); status = get_var(L"SecureBoot", &EFI_GLOBAL_VARIABLE_GUID, NULL, &size, &secboot); if (status == EFI_NOT_FOUND) return efi_secureboot_mode_disabled; if (status != EFI_SUCCESS) return efi_secureboot_mode_unknown; size = sizeof(setupmode); get_var(L"SetupMode", &EFI_GLOBAL_VARIABLE_GUID, NULL, &size, &setupmode); if (secboot == 0 || setupmode == 1) return efi_secureboot_mode_disabled; return efi_secureboot_mode_enabled; } #ifdef CONFIG_EFI_EMBEDDED_FIRMWARE void efi_check_for_embedded_firmwares(void); #else static inline void efi_check_for_embedded_firmwares(void) { } #endif /* * Arch code can implement the following three template macros, avoiding * reptition for the void/non-void return cases of {__,}efi_call_virt(): * * * arch_efi_call_virt_setup() * * Sets up the environment for the call (e.g. switching page tables, * allowing kernel-mode use of floating point, if required). * * * arch_efi_call_virt() * * Performs the call. The last expression in the macro must be the call * itself, allowing the logic to be shared by the void and non-void * cases. * * * arch_efi_call_virt_teardown() * * Restores the usual kernel environment once the call has returned. */ #define efi_call_virt_pointer(p, f, args...) \ ({ \ efi_status_t __s; \ unsigned long __flags; \ \ arch_efi_call_virt_setup(); \ \ __flags = efi_call_virt_save_flags(); \ __s = arch_efi_call_virt(p, f, args); \ efi_call_virt_check_flags(__flags, __stringify(f)); \ \ arch_efi_call_virt_teardown(); \ \ __s; \ }) #define __efi_call_virt_pointer(p, f, args...) \ ({ \ unsigned long __flags; \ \ arch_efi_call_virt_setup(); \ \ __flags = efi_call_virt_save_flags(); \ arch_efi_call_virt(p, f, args); \ efi_call_virt_check_flags(__flags, __stringify(f)); \ \ arch_efi_call_virt_teardown(); \ }) #define EFI_RANDOM_SEED_SIZE 32U // BLAKE2S_HASH_SIZE struct linux_efi_random_seed { u32 size; u8 bits[]; }; struct linux_efi_tpm_eventlog { u32 size; u32 final_events_preboot_size; u8 version; u8 log[]; }; extern int efi_tpm_eventlog_init(void); struct efi_tcg2_final_events_table { u64 version; u64 nr_events; u8 events[]; }; extern int efi_tpm_final_log_size; extern unsigned long rci2_table_phys; /* * efi_runtime_service() function identifiers. * "NONE" is used by efi_recover_from_page_fault() to check if the page * fault happened while executing an efi runtime service. */ enum efi_rts_ids { EFI_NONE, EFI_GET_TIME, EFI_SET_TIME, EFI_GET_WAKEUP_TIME, EFI_SET_WAKEUP_TIME, EFI_GET_VARIABLE, EFI_GET_NEXT_VARIABLE, EFI_SET_VARIABLE, EFI_QUERY_VARIABLE_INFO, EFI_GET_NEXT_HIGH_MONO_COUNT, EFI_RESET_SYSTEM, EFI_UPDATE_CAPSULE, EFI_QUERY_CAPSULE_CAPS, }; /* * efi_runtime_work: Details of EFI Runtime Service work * @arg<1-5>: EFI Runtime Service function arguments * @status: Status of executing EFI Runtime Service * @efi_rts_id: EFI Runtime Service function identifier * @efi_rts_comp: Struct used for handling completions */ struct efi_runtime_work { void *arg1; void *arg2; void *arg3; void *arg4; void *arg5; efi_status_t status; struct work_struct work; enum efi_rts_ids efi_rts_id; struct completion efi_rts_comp; }; extern struct efi_runtime_work efi_rts_work; /* Workqueue to queue EFI Runtime Services */ extern struct workqueue_struct *efi_rts_wq; struct linux_efi_memreserve { int size; // allocated size of the array atomic_t count; // number of entries used phys_addr_t next; // pa of next struct instance struct { phys_addr_t base; phys_addr_t size; } entry[]; }; #define EFI_MEMRESERVE_COUNT(size) (((size) - sizeof(struct linux_efi_memreserve)) \ / sizeof_field(struct linux_efi_memreserve, entry[0])) void __init efi_arch_mem_reserve(phys_addr_t addr, u64 size); char *efi_systab_show_arch(char *str); /* * The LINUX_EFI_MOK_VARIABLE_TABLE_GUID config table can be provided * to the kernel by an EFI boot loader. The table contains a packed * sequence of these entries, one for each named MOK variable. * The sequence is terminated by an entry with a completely NULL * name and 0 data size. */ struct efi_mokvar_table_entry { char name[256]; u64 data_size; u8 data[]; } __attribute((packed)); #ifdef CONFIG_LOAD_UEFI_KEYS extern void __init efi_mokvar_table_init(void); extern struct efi_mokvar_table_entry *efi_mokvar_entry_next( struct efi_mokvar_table_entry **mokvar_entry); extern struct efi_mokvar_table_entry *efi_mokvar_entry_find(const char *name); #else static inline void efi_mokvar_table_init(void) { } static inline struct efi_mokvar_table_entry *efi_mokvar_entry_next( struct efi_mokvar_table_entry **mokvar_entry) { return NULL; } static inline struct efi_mokvar_table_entry *efi_mokvar_entry_find( const char *name) { return NULL; } #endif #ifdef CONFIG_SYSFB extern void efifb_setup_from_dmi(struct screen_info *si, const char *opt); #else static inline void efifb_setup_from_dmi(struct screen_info *si, const char *opt) { } #endif #endif /* _LINUX_EFI_H */ PK ! ���� � mdev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Mediated device definition * * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * Author: Neo Jia <cjia@nvidia.com> * Kirti Wankhede <kwankhede@nvidia.com> */ #ifndef MDEV_H #define MDEV_H struct mdev_type; struct mdev_device { struct device dev; guid_t uuid; void *driver_data; struct list_head next; struct mdev_type *type; struct device *iommu_device; bool active; }; static inline struct mdev_device *to_mdev_device(struct device *dev) { return container_of(dev, struct mdev_device, dev); } /* * Called by the parent device driver to set the device which represents * this mdev in iommu protection scope. By default, the iommu device is * NULL, that indicates using vendor defined isolation. * * @dev: the mediated device that iommu will isolate. * @iommu_device: a pci device which represents the iommu for @dev. */ static inline void mdev_set_iommu_device(struct mdev_device *mdev, struct device *iommu_device) { mdev->iommu_device = iommu_device; } static inline struct device *mdev_get_iommu_device(struct mdev_device *mdev) { return mdev->iommu_device; } unsigned int mdev_get_type_group_id(struct mdev_device *mdev); unsigned int mtype_get_type_group_id(struct mdev_type *mtype); struct device *mtype_get_parent_dev(struct mdev_type *mtype); /** * struct mdev_parent_ops - Structure to be registered for each parent device to * register the device to mdev module. * * @owner: The module owner. * @device_driver: Which device driver to probe() on newly created devices * @dev_attr_groups: Attributes of the parent device. * @mdev_attr_groups: Attributes of the mediated device. * @supported_type_groups: Attributes to define supported types. It is mandatory * to provide supported types. * @create: Called to allocate basic resources in parent device's * driver for a particular mediated device. It is * mandatory to provide create ops. * @mdev: mdev_device structure on of mediated device * that is being created * Returns integer: success (0) or error (< 0) * @remove: Called to free resources in parent device's driver for * a mediated device. It is mandatory to provide 'remove' * ops. * @mdev: mdev_device device structure which is being * destroyed * Returns integer: success (0) or error (< 0) * @read: Read emulation callback * @mdev: mediated device structure * @buf: read buffer * @count: number of bytes to read * @ppos: address. * Retuns number on bytes read on success or error. * @write: Write emulation callback * @mdev: mediated device structure * @buf: write buffer * @count: number of bytes to be written * @ppos: address. * Retuns number on bytes written on success or error. * @ioctl: IOCTL callback * @mdev: mediated device structure * @cmd: ioctl command * @arg: arguments to ioctl * @mmap: mmap callback * @mdev: mediated device structure * @vma: vma structure * @request: request callback to release device * @mdev: mediated device structure * @count: request sequence number * Parent device that support mediated device should be registered with mdev * module with mdev_parent_ops structure. **/ struct mdev_parent_ops { struct module *owner; struct mdev_driver *device_driver; const struct attribute_group **dev_attr_groups; const struct attribute_group **mdev_attr_groups; struct attribute_group **supported_type_groups; int (*create)(struct mdev_device *mdev); int (*remove)(struct mdev_device *mdev); int (*open_device)(struct mdev_device *mdev); void (*close_device)(struct mdev_device *mdev); ssize_t (*read)(struct mdev_device *mdev, char __user *buf, size_t count, loff_t *ppos); ssize_t (*write)(struct mdev_device *mdev, const char __user *buf, size_t count, loff_t *ppos); long (*ioctl)(struct mdev_device *mdev, unsigned int cmd, unsigned long arg); int (*mmap)(struct mdev_device *mdev, struct vm_area_struct *vma); void (*request)(struct mdev_device *mdev, unsigned int count); }; /* interface for exporting mdev supported type attributes */ struct mdev_type_attribute { struct attribute attr; ssize_t (*show)(struct mdev_type *mtype, struct mdev_type_attribute *attr, char *buf); ssize_t (*store)(struct mdev_type *mtype, struct mdev_type_attribute *attr, const char *buf, size_t count); }; #define MDEV_TYPE_ATTR(_name, _mode, _show, _store) \ struct mdev_type_attribute mdev_type_attr_##_name = \ __ATTR(_name, _mode, _show, _store) #define MDEV_TYPE_ATTR_RW(_name) \ struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_RW(_name) #define MDEV_TYPE_ATTR_RO(_name) \ struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_RO(_name) #define MDEV_TYPE_ATTR_WO(_name) \ struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_WO(_name) /** * struct mdev_driver - Mediated device driver * @probe: called when new device created * @remove: called when device removed * @driver: device driver structure * **/ struct mdev_driver { int (*probe)(struct mdev_device *dev); void (*remove)(struct mdev_device *dev); struct device_driver driver; }; static inline void *mdev_get_drvdata(struct mdev_device *mdev) { return mdev->driver_data; } static inline void mdev_set_drvdata(struct mdev_device *mdev, void *data) { mdev->driver_data = data; } static inline const guid_t *mdev_uuid(struct mdev_device *mdev) { return &mdev->uuid; } extern struct bus_type mdev_bus_type; int mdev_register_device(struct device *dev, const struct mdev_parent_ops *ops); void mdev_unregister_device(struct device *dev); int mdev_register_driver(struct mdev_driver *drv); void mdev_unregister_driver(struct mdev_driver *drv); struct device *mdev_parent_dev(struct mdev_device *mdev); static inline struct device *mdev_dev(struct mdev_device *mdev) { return &mdev->dev; } static inline struct mdev_device *mdev_from_dev(struct device *dev) { return dev->bus == &mdev_bus_type ? to_mdev_device(dev) : NULL; } #endif /* MDEV_H */ PK ! r �7 7 signal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SIGNAL_H #define _LINUX_SIGNAL_H #include <linux/bug.h> #include <linux/signal_types.h> #include <linux/string.h> struct task_struct; /* for sysctl */ extern int print_fatal_signals; static inline void copy_siginfo(kernel_siginfo_t *to, const kernel_siginfo_t *from) { memcpy(to, from, sizeof(*to)); } static inline void clear_siginfo(kernel_siginfo_t *info) { memset(info, 0, sizeof(*info)); } #define SI_EXPANSION_SIZE (sizeof(struct siginfo) - sizeof(struct kernel_siginfo)) static inline void copy_siginfo_to_external(siginfo_t *to, const kernel_siginfo_t *from) { memcpy(to, from, sizeof(*from)); memset(((char *)to) + sizeof(struct kernel_siginfo), 0, SI_EXPANSION_SIZE); } int copy_siginfo_to_user(siginfo_t __user *to, const kernel_siginfo_t *from); int copy_siginfo_from_user(kernel_siginfo_t *to, const siginfo_t __user *from); enum siginfo_layout { SIL_KILL, SIL_TIMER, SIL_POLL, SIL_FAULT, SIL_FAULT_TRAPNO, SIL_FAULT_MCEERR, SIL_FAULT_BNDERR, SIL_FAULT_PKUERR, SIL_FAULT_PERF_EVENT, SIL_CHLD, SIL_RT, SIL_SYS, }; enum siginfo_layout siginfo_layout(unsigned sig, int si_code); /* * Define some primitives to manipulate sigset_t. */ #ifndef __HAVE_ARCH_SIG_BITOPS #include <linux/bitops.h> /* We don't use <linux/bitops.h> for these because there is no need to be atomic. */ static inline void sigaddset(sigset_t *set, int _sig) { unsigned long sig = _sig - 1; if (_NSIG_WORDS == 1) set->sig[0] |= 1UL << sig; else set->sig[sig / _NSIG_BPW] |= 1UL << (sig % _NSIG_BPW); } static inline void sigdelset(sigset_t *set, int _sig) { unsigned long sig = _sig - 1; if (_NSIG_WORDS == 1) set->sig[0] &= ~(1UL << sig); else set->sig[sig / _NSIG_BPW] &= ~(1UL << (sig % _NSIG_BPW)); } static inline int sigismember(sigset_t *set, int _sig) { unsigned long sig = _sig - 1; if (_NSIG_WORDS == 1) return 1 & (set->sig[0] >> sig); else return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW)); } #endif /* __HAVE_ARCH_SIG_BITOPS */ static inline int sigisemptyset(sigset_t *set) { switch (_NSIG_WORDS) { case 4: return (set->sig[3] | set->sig[2] | set->sig[1] | set->sig[0]) == 0; case 2: return (set->sig[1] | set->sig[0]) == 0; case 1: return set->sig[0] == 0; default: BUILD_BUG(); return 0; } } static inline int sigequalsets(const sigset_t *set1, const sigset_t *set2) { switch (_NSIG_WORDS) { case 4: return (set1->sig[3] == set2->sig[3]) && (set1->sig[2] == set2->sig[2]) && (set1->sig[1] == set2->sig[1]) && (set1->sig[0] == set2->sig[0]); case 2: return (set1->sig[1] == set2->sig[1]) && (set1->sig[0] == set2->sig[0]); case 1: return set1->sig[0] == set2->sig[0]; } return 0; } #define sigmask(sig) (1UL << ((sig) - 1)) #ifndef __HAVE_ARCH_SIG_SETOPS #include <linux/string.h> #define _SIG_SET_BINOP(name, op) \ static inline void name(sigset_t *r, const sigset_t *a, const sigset_t *b) \ { \ unsigned long a0, a1, a2, a3, b0, b1, b2, b3; \ \ switch (_NSIG_WORDS) { \ case 4: \ a3 = a->sig[3]; a2 = a->sig[2]; \ b3 = b->sig[3]; b2 = b->sig[2]; \ r->sig[3] = op(a3, b3); \ r->sig[2] = op(a2, b2); \ fallthrough; \ case 2: \ a1 = a->sig[1]; b1 = b->sig[1]; \ r->sig[1] = op(a1, b1); \ fallthrough; \ case 1: \ a0 = a->sig[0]; b0 = b->sig[0]; \ r->sig[0] = op(a0, b0); \ break; \ default: \ BUILD_BUG(); \ } \ } #define _sig_or(x,y) ((x) | (y)) _SIG_SET_BINOP(sigorsets, _sig_or) #define _sig_and(x,y) ((x) & (y)) _SIG_SET_BINOP(sigandsets, _sig_and) #define _sig_andn(x,y) ((x) & ~(y)) _SIG_SET_BINOP(sigandnsets, _sig_andn) #undef _SIG_SET_BINOP #undef _sig_or #undef _sig_and #undef _sig_andn #define _SIG_SET_OP(name, op) \ static inline void name(sigset_t *set) \ { \ switch (_NSIG_WORDS) { \ case 4: set->sig[3] = op(set->sig[3]); \ set->sig[2] = op(set->sig[2]); \ fallthrough; \ case 2: set->sig[1] = op(set->sig[1]); \ fallthrough; \ case 1: set->sig[0] = op(set->sig[0]); \ break; \ default: \ BUILD_BUG(); \ } \ } #define _sig_not(x) (~(x)) _SIG_SET_OP(signotset, _sig_not) #undef _SIG_SET_OP #undef _sig_not static inline void sigemptyset(sigset_t *set) { switch (_NSIG_WORDS) { default: memset(set, 0, sizeof(sigset_t)); break; case 2: set->sig[1] = 0; fallthrough; case 1: set->sig[0] = 0; break; } } static inline void sigfillset(sigset_t *set) { switch (_NSIG_WORDS) { default: memset(set, -1, sizeof(sigset_t)); break; case 2: set->sig[1] = -1; fallthrough; case 1: set->sig[0] = -1; break; } } /* Some extensions for manipulating the low 32 signals in particular. */ static inline void sigaddsetmask(sigset_t *set, unsigned long mask) { set->sig[0] |= mask; } static inline void sigdelsetmask(sigset_t *set, unsigned long mask) { set->sig[0] &= ~mask; } static inline int sigtestsetmask(sigset_t *set, unsigned long mask) { return (set->sig[0] & mask) != 0; } static inline void siginitset(sigset_t *set, unsigned long mask) { set->sig[0] = mask; switch (_NSIG_WORDS) { default: memset(&set->sig[1], 0, sizeof(long)*(_NSIG_WORDS-1)); break; case 2: set->sig[1] = 0; break; case 1: ; } } static inline void siginitsetinv(sigset_t *set, unsigned long mask) { set->sig[0] = ~mask; switch (_NSIG_WORDS) { default: memset(&set->sig[1], -1, sizeof(long)*(_NSIG_WORDS-1)); break; case 2: set->sig[1] = -1; break; case 1: ; } } #endif /* __HAVE_ARCH_SIG_SETOPS */ static inline void init_sigpending(struct sigpending *sig) { sigemptyset(&sig->signal); INIT_LIST_HEAD(&sig->list); } extern void flush_sigqueue(struct sigpending *queue); /* Test if 'sig' is valid signal. Use this instead of testing _NSIG directly */ static inline int valid_signal(unsigned long sig) { return sig <= _NSIG ? 1 : 0; } struct timespec; struct pt_regs; enum pid_type; extern int next_signal(struct sigpending *pending, sigset_t *mask); extern int do_send_sig_info(int sig, struct kernel_siginfo *info, struct task_struct *p, enum pid_type type); extern int group_send_sig_info(int sig, struct kernel_siginfo *info, struct task_struct *p, enum pid_type type); extern int __group_send_sig_info(int, struct kernel_siginfo *, struct task_struct *); extern int sigprocmask(int, sigset_t *, sigset_t *); extern void set_current_blocked(sigset_t *); extern void __set_current_blocked(const sigset_t *); extern int show_unhandled_signals; extern bool get_signal(struct ksignal *ksig); extern void signal_setup_done(int failed, struct ksignal *ksig, int stepping); extern void exit_signals(struct task_struct *tsk); extern void kernel_sigaction(int, __sighandler_t); #define SIG_KTHREAD ((__force __sighandler_t)2) #define SIG_KTHREAD_KERNEL ((__force __sighandler_t)3) static inline void allow_signal(int sig) { /* * Kernel threads handle their own signals. Let the signal code * know it'll be handled, so that they don't get converted to * SIGKILL or just silently dropped. */ kernel_sigaction(sig, SIG_KTHREAD); } static inline void allow_kernel_signal(int sig) { /* * Kernel threads handle their own signals. Let the signal code * know signals sent by the kernel will be handled, so that they * don't get silently dropped. */ kernel_sigaction(sig, SIG_KTHREAD_KERNEL); } static inline void disallow_signal(int sig) { kernel_sigaction(sig, SIG_IGN); } extern struct kmem_cache *sighand_cachep; extern bool unhandled_signal(struct task_struct *tsk, int sig); /* * In POSIX a signal is sent either to a specific thread (Linux task) * or to the process as a whole (Linux thread group). How the signal * is sent determines whether it's to one thread or the whole group, * which determines which signal mask(s) are involved in blocking it * from being delivered until later. When the signal is delivered, * either it's caught or ignored by a user handler or it has a default * effect that applies to the whole thread group (POSIX process). * * The possible effects an unblocked signal set to SIG_DFL can have are: * ignore - Nothing Happens * terminate - kill the process, i.e. all threads in the group, * similar to exit_group. The group leader (only) reports * WIFSIGNALED status to its parent. * coredump - write a core dump file describing all threads using * the same mm and then kill all those threads * stop - stop all the threads in the group, i.e. TASK_STOPPED state * * SIGKILL and SIGSTOP cannot be caught, blocked, or ignored. * Other signals when not blocked and set to SIG_DFL behaves as follows. * The job control signals also have other special effects. * * +--------------------+------------------+ * | POSIX signal | default action | * +--------------------+------------------+ * | SIGHUP | terminate | * | SIGINT | terminate | * | SIGQUIT | coredump | * | SIGILL | coredump | * | SIGTRAP | coredump | * | SIGABRT/SIGIOT | coredump | * | SIGBUS | coredump | * | SIGFPE | coredump | * | SIGKILL | terminate(+) | * | SIGUSR1 | terminate | * | SIGSEGV | coredump | * | SIGUSR2 | terminate | * | SIGPIPE | terminate | * | SIGALRM | terminate | * | SIGTERM | terminate | * | SIGCHLD | ignore | * | SIGCONT | ignore(*) | * | SIGSTOP | stop(*)(+) | * | SIGTSTP | stop(*) | * | SIGTTIN | stop(*) | * | SIGTTOU | stop(*) | * | SIGURG | ignore | * | SIGXCPU | coredump | * | SIGXFSZ | coredump | * | SIGVTALRM | terminate | * | SIGPROF | terminate | * | SIGPOLL/SIGIO | terminate | * | SIGSYS/SIGUNUSED | coredump | * | SIGSTKFLT | terminate | * | SIGWINCH | ignore | * | SIGPWR | terminate | * | SIGRTMIN-SIGRTMAX | terminate | * +--------------------+------------------+ * | non-POSIX signal | default action | * +--------------------+------------------+ * | SIGEMT | coredump | * +--------------------+------------------+ * * (+) For SIGKILL and SIGSTOP the action is "always", not just "default". * (*) Special job control effects: * When SIGCONT is sent, it resumes the process (all threads in the group) * from TASK_STOPPED state and also clears any pending/queued stop signals * (any of those marked with "stop(*)"). This happens regardless of blocking, * catching, or ignoring SIGCONT. When any stop signal is sent, it clears * any pending/queued SIGCONT signals; this happens regardless of blocking, * catching, or ignored the stop signal, though (except for SIGSTOP) the * default action of stopping the process may happen later or never. */ #ifdef SIGEMT #define SIGEMT_MASK rt_sigmask(SIGEMT) #else #define SIGEMT_MASK 0 #endif #if SIGRTMIN > BITS_PER_LONG #define rt_sigmask(sig) (1ULL << ((sig)-1)) #else #define rt_sigmask(sig) sigmask(sig) #endif #define siginmask(sig, mask) \ ((sig) > 0 && (sig) < SIGRTMIN && (rt_sigmask(sig) & (mask))) #define SIG_KERNEL_ONLY_MASK (\ rt_sigmask(SIGKILL) | rt_sigmask(SIGSTOP)) #define SIG_KERNEL_STOP_MASK (\ rt_sigmask(SIGSTOP) | rt_sigmask(SIGTSTP) | \ rt_sigmask(SIGTTIN) | rt_sigmask(SIGTTOU) ) #define SIG_KERNEL_COREDUMP_MASK (\ rt_sigmask(SIGQUIT) | rt_sigmask(SIGILL) | \ rt_sigmask(SIGTRAP) | rt_sigmask(SIGABRT) | \ rt_sigmask(SIGFPE) | rt_sigmask(SIGSEGV) | \ rt_sigmask(SIGBUS) | rt_sigmask(SIGSYS) | \ rt_sigmask(SIGXCPU) | rt_sigmask(SIGXFSZ) | \ SIGEMT_MASK ) #define SIG_KERNEL_IGNORE_MASK (\ rt_sigmask(SIGCONT) | rt_sigmask(SIGCHLD) | \ rt_sigmask(SIGWINCH) | rt_sigmask(SIGURG) ) #define SIG_SPECIFIC_SICODES_MASK (\ rt_sigmask(SIGILL) | rt_sigmask(SIGFPE) | \ rt_sigmask(SIGSEGV) | rt_sigmask(SIGBUS) | \ rt_sigmask(SIGTRAP) | rt_sigmask(SIGCHLD) | \ rt_sigmask(SIGPOLL) | rt_sigmask(SIGSYS) | \ SIGEMT_MASK ) #define sig_kernel_only(sig) siginmask(sig, SIG_KERNEL_ONLY_MASK) #define sig_kernel_coredump(sig) siginmask(sig, SIG_KERNEL_COREDUMP_MASK) #define sig_kernel_ignore(sig) siginmask(sig, SIG_KERNEL_IGNORE_MASK) #define sig_kernel_stop(sig) siginmask(sig, SIG_KERNEL_STOP_MASK) #define sig_specific_sicodes(sig) siginmask(sig, SIG_SPECIFIC_SICODES_MASK) #define sig_fatal(t, signr) \ (!siginmask(signr, SIG_KERNEL_IGNORE_MASK|SIG_KERNEL_STOP_MASK) && \ (t)->sighand->action[(signr)-1].sa.sa_handler == SIG_DFL) void signals_init(void); int restore_altstack(const stack_t __user *); int __save_altstack(stack_t __user *, unsigned long); #define unsafe_save_altstack(uss, sp, label) do { \ stack_t __user *__uss = uss; \ struct task_struct *t = current; \ unsafe_put_user((void __user *)t->sas_ss_sp, &__uss->ss_sp, label); \ unsafe_put_user(t->sas_ss_flags, &__uss->ss_flags, label); \ unsafe_put_user(t->sas_ss_size, &__uss->ss_size, label); \ } while (0); #ifdef CONFIG_DYNAMIC_SIGFRAME bool sigaltstack_size_valid(size_t ss_size); #else static inline bool sigaltstack_size_valid(size_t size) { return true; } #endif /* !CONFIG_DYNAMIC_SIGFRAME */ #ifdef CONFIG_PROC_FS struct seq_file; extern void render_sigset_t(struct seq_file *, const char *, sigset_t *); #endif #ifndef arch_untagged_si_addr /* * Given a fault address and a signal and si_code which correspond to the * _sigfault union member, returns the address that must appear in si_addr if * the signal handler does not have SA_EXPOSE_TAGBITS enabled in sa_flags. */ static inline void __user *arch_untagged_si_addr(void __user *addr, unsigned long sig, unsigned long si_code) { return addr; } #endif #endif /* _LINUX_SIGNAL_H */ PK ! �>�Ų � mpls_iptunnel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MPLS_IPTUNNEL_H #define _LINUX_MPLS_IPTUNNEL_H #include <uapi/linux/mpls_iptunnel.h> #endif /* _LINUX_MPLS_IPTUNNEL_H */ PK ! ���9� � inet_diag.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _INET_DIAG_H_ #define _INET_DIAG_H_ 1 #include <net/netlink.h> #include <uapi/linux/inet_diag.h> struct inet_hashinfo; struct inet_diag_handler { void (*dump)(struct sk_buff *skb, struct netlink_callback *cb, const struct inet_diag_req_v2 *r); int (*dump_one)(struct netlink_callback *cb, const struct inet_diag_req_v2 *req); void (*idiag_get_info)(struct sock *sk, struct inet_diag_msg *r, void *info); int (*idiag_get_aux)(struct sock *sk, bool net_admin, struct sk_buff *skb); size_t (*idiag_get_aux_size)(struct sock *sk, bool net_admin); int (*destroy)(struct sk_buff *in_skb, const struct inet_diag_req_v2 *req); __u16 idiag_type; __u16 idiag_info_size; }; struct bpf_sk_storage_diag; struct inet_diag_dump_data { struct nlattr *req_nlas[__INET_DIAG_REQ_MAX]; #define inet_diag_nla_bc req_nlas[INET_DIAG_REQ_BYTECODE] #define inet_diag_nla_bpf_stgs req_nlas[INET_DIAG_REQ_SK_BPF_STORAGES] struct bpf_sk_storage_diag *bpf_stg_diag; }; struct inet_connection_sock; int inet_sk_diag_fill(struct sock *sk, struct inet_connection_sock *icsk, struct sk_buff *skb, struct netlink_callback *cb, const struct inet_diag_req_v2 *req, u16 nlmsg_flags, bool net_admin); void inet_diag_dump_icsk(struct inet_hashinfo *h, struct sk_buff *skb, struct netlink_callback *cb, const struct inet_diag_req_v2 *r); int inet_diag_dump_one_icsk(struct inet_hashinfo *hashinfo, struct netlink_callback *cb, const struct inet_diag_req_v2 *req); struct sock *inet_diag_find_one_icsk(struct net *net, struct inet_hashinfo *hashinfo, const struct inet_diag_req_v2 *req); int inet_diag_bc_sk(const struct nlattr *_bc, struct sock *sk); void inet_diag_msg_common_fill(struct inet_diag_msg *r, struct sock *sk); static inline size_t inet_diag_msg_attrs_size(void) { return nla_total_size(1) /* INET_DIAG_SHUTDOWN */ + nla_total_size(1) /* INET_DIAG_TOS */ #if IS_ENABLED(CONFIG_IPV6) + nla_total_size(1) /* INET_DIAG_TCLASS */ + nla_total_size(1) /* INET_DIAG_SKV6ONLY */ #endif + nla_total_size(4) /* INET_DIAG_MARK */ + nla_total_size(4) /* INET_DIAG_CLASS_ID */ #ifdef CONFIG_SOCK_CGROUP_DATA + nla_total_size_64bit(sizeof(u64)) /* INET_DIAG_CGROUP_ID */ #endif + nla_total_size(sizeof(struct inet_diag_sockopt)) /* INET_DIAG_SOCKOPT */ ; } int inet_diag_msg_attrs_fill(struct sock *sk, struct sk_buff *skb, struct inet_diag_msg *r, int ext, struct user_namespace *user_ns, bool net_admin); extern int inet_diag_register(const struct inet_diag_handler *handler); extern void inet_diag_unregister(const struct inet_diag_handler *handler); #endif /* _INET_DIAG_H_ */ PK ! dĈ�� � pmbus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Hardware monitoring driver for PMBus devices * * Copyright (c) 2010, 2011 Ericsson AB. */ #ifndef _PMBUS_H_ #define _PMBUS_H_ #include <linux/bits.h> /* flags */ /* * PMBUS_SKIP_STATUS_CHECK * * During register detection, skip checking the status register for * communication or command errors. * * Some PMBus chips respond with valid data when trying to read an unsupported * register. For such chips, checking the status register is mandatory when * trying to determine if a chip register exists or not. * Other PMBus chips don't support the STATUS_CML register, or report * communication errors for no explicable reason. For such chips, checking * the status register must be disabled. */ #define PMBUS_SKIP_STATUS_CHECK BIT(0) /* * PMBUS_WRITE_PROTECTED * Set if the chip is write protected and write protection is not determined * by the standard WRITE_PROTECT command. */ #define PMBUS_WRITE_PROTECTED BIT(1) /* * PMBUS_NO_CAPABILITY * * Some PMBus chips don't respond with valid data when reading the CAPABILITY * register. For such chips, this flag should be set so that the PMBus core * driver doesn't use CAPABILITY to determine it's behavior. */ #define PMBUS_NO_CAPABILITY BIT(2) /* * PMBUS_READ_STATUS_AFTER_FAILED_CHECK * * Some PMBus chips end up in an undefined state when trying to read an * unsupported register. For such chips, it is necessary to reset the * chip pmbus controller to a known state after a failed register check. * This can be done by reading a known register. By setting this flag the * driver will try to read the STATUS register after each failed * register check. This read may fail, but it will put the chip in a * known state. */ #define PMBUS_READ_STATUS_AFTER_FAILED_CHECK BIT(3) /* * PMBUS_NO_WRITE_PROTECT * * Some PMBus chips respond with invalid data when reading the WRITE_PROTECT * register. For such chips, this flag should be set so that the PMBus core * driver doesn't use the WRITE_PROTECT command to determine its behavior. */ #define PMBUS_NO_WRITE_PROTECT BIT(4) /* * PMBUS_USE_COEFFICIENTS_CMD * * When this flag is set the PMBus core driver will use the COEFFICIENTS * register to initialize the coefficients for the direct mode format. */ #define PMBUS_USE_COEFFICIENTS_CMD BIT(5) struct pmbus_platform_data { u32 flags; /* Device specific flags */ /* regulator support */ int num_regulators; struct regulator_init_data *reg_init_data; }; #endif /* _PMBUS_H_ */ PK ! ��GZ|M |M nfs4.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/nfs4.h * * NFSv4 protocol definitions. * * Copyright (c) 2002 The Regents of the University of Michigan. * All rights reserved. * * Kendrick Smith <kmsmith@umich.edu> * Andy Adamson <andros@umich.edu> */ #ifndef _LINUX_NFS4_H #define _LINUX_NFS4_H #include <linux/list.h> #include <linux/uidgid.h> #include <uapi/linux/nfs4.h> #include <linux/sunrpc/msg_prot.h> enum nfs4_acl_whotype { NFS4_ACL_WHO_NAMED = 0, NFS4_ACL_WHO_OWNER, NFS4_ACL_WHO_GROUP, NFS4_ACL_WHO_EVERYONE, }; struct nfs4_ace { uint32_t type; uint32_t flag; uint32_t access_mask; int whotype; union { kuid_t who_uid; kgid_t who_gid; }; }; struct nfs4_acl { uint32_t naces; struct nfs4_ace aces[]; }; #define NFS4_MAXLABELLEN 2048 struct nfs4_label { uint32_t lfs; uint32_t pi; u32 len; char *label; }; typedef struct { char data[NFS4_VERIFIER_SIZE]; } nfs4_verifier; struct nfs4_stateid_struct { union { char data[NFS4_STATEID_SIZE]; struct { __be32 seqid; char other[NFS4_STATEID_OTHER_SIZE]; } __attribute__ ((packed)); }; enum { NFS4_INVALID_STATEID_TYPE = 0, NFS4_SPECIAL_STATEID_TYPE, NFS4_OPEN_STATEID_TYPE, NFS4_LOCK_STATEID_TYPE, NFS4_DELEGATION_STATEID_TYPE, NFS4_LAYOUT_STATEID_TYPE, NFS4_PNFS_DS_STATEID_TYPE, NFS4_REVOKED_STATEID_TYPE, } type; }; typedef struct nfs4_stateid_struct nfs4_stateid; enum nfs_opnum4 { OP_ACCESS = 3, OP_CLOSE = 4, OP_COMMIT = 5, OP_CREATE = 6, OP_DELEGPURGE = 7, OP_DELEGRETURN = 8, OP_GETATTR = 9, OP_GETFH = 10, OP_LINK = 11, OP_LOCK = 12, OP_LOCKT = 13, OP_LOCKU = 14, OP_LOOKUP = 15, OP_LOOKUPP = 16, OP_NVERIFY = 17, OP_OPEN = 18, OP_OPENATTR = 19, OP_OPEN_CONFIRM = 20, OP_OPEN_DOWNGRADE = 21, OP_PUTFH = 22, OP_PUTPUBFH = 23, OP_PUTROOTFH = 24, OP_READ = 25, OP_READDIR = 26, OP_READLINK = 27, OP_REMOVE = 28, OP_RENAME = 29, OP_RENEW = 30, OP_RESTOREFH = 31, OP_SAVEFH = 32, OP_SECINFO = 33, OP_SETATTR = 34, OP_SETCLIENTID = 35, OP_SETCLIENTID_CONFIRM = 36, OP_VERIFY = 37, OP_WRITE = 38, OP_RELEASE_LOCKOWNER = 39, /* nfs41 */ OP_BACKCHANNEL_CTL = 40, OP_BIND_CONN_TO_SESSION = 41, OP_EXCHANGE_ID = 42, OP_CREATE_SESSION = 43, OP_DESTROY_SESSION = 44, OP_FREE_STATEID = 45, OP_GET_DIR_DELEGATION = 46, OP_GETDEVICEINFO = 47, OP_GETDEVICELIST = 48, OP_LAYOUTCOMMIT = 49, OP_LAYOUTGET = 50, OP_LAYOUTRETURN = 51, OP_SECINFO_NO_NAME = 52, OP_SEQUENCE = 53, OP_SET_SSV = 54, OP_TEST_STATEID = 55, OP_WANT_DELEGATION = 56, OP_DESTROY_CLIENTID = 57, OP_RECLAIM_COMPLETE = 58, /* nfs42 */ OP_ALLOCATE = 59, OP_COPY = 60, OP_COPY_NOTIFY = 61, OP_DEALLOCATE = 62, OP_IO_ADVISE = 63, OP_LAYOUTERROR = 64, OP_LAYOUTSTATS = 65, OP_OFFLOAD_CANCEL = 66, OP_OFFLOAD_STATUS = 67, OP_READ_PLUS = 68, OP_SEEK = 69, OP_WRITE_SAME = 70, OP_CLONE = 71, /* xattr support (RFC8726) */ OP_GETXATTR = 72, OP_SETXATTR = 73, OP_LISTXATTRS = 74, OP_REMOVEXATTR = 75, OP_ILLEGAL = 10044, }; /*Defining first and last NFS4 operations implemented. Needs to be updated if more operations are defined in future.*/ #define FIRST_NFS4_OP OP_ACCESS #define LAST_NFS40_OP OP_RELEASE_LOCKOWNER #define LAST_NFS41_OP OP_RECLAIM_COMPLETE #define LAST_NFS42_OP OP_REMOVEXATTR #define LAST_NFS4_OP LAST_NFS42_OP enum nfsstat4 { NFS4_OK = 0, NFS4ERR_PERM = 1, NFS4ERR_NOENT = 2, NFS4ERR_IO = 5, NFS4ERR_NXIO = 6, NFS4ERR_ACCESS = 13, NFS4ERR_EXIST = 17, NFS4ERR_XDEV = 18, /* Unused/reserved 19 */ NFS4ERR_NOTDIR = 20, NFS4ERR_ISDIR = 21, NFS4ERR_INVAL = 22, NFS4ERR_FBIG = 27, NFS4ERR_NOSPC = 28, NFS4ERR_ROFS = 30, NFS4ERR_MLINK = 31, NFS4ERR_NAMETOOLONG = 63, NFS4ERR_NOTEMPTY = 66, NFS4ERR_DQUOT = 69, NFS4ERR_STALE = 70, NFS4ERR_BADHANDLE = 10001, NFS4ERR_BAD_COOKIE = 10003, NFS4ERR_NOTSUPP = 10004, NFS4ERR_TOOSMALL = 10005, NFS4ERR_SERVERFAULT = 10006, NFS4ERR_BADTYPE = 10007, NFS4ERR_DELAY = 10008, NFS4ERR_SAME = 10009, NFS4ERR_DENIED = 10010, NFS4ERR_EXPIRED = 10011, NFS4ERR_LOCKED = 10012, NFS4ERR_GRACE = 10013, NFS4ERR_FHEXPIRED = 10014, NFS4ERR_SHARE_DENIED = 10015, NFS4ERR_WRONGSEC = 10016, NFS4ERR_CLID_INUSE = 10017, NFS4ERR_RESOURCE = 10018, NFS4ERR_MOVED = 10019, NFS4ERR_NOFILEHANDLE = 10020, NFS4ERR_MINOR_VERS_MISMATCH = 10021, NFS4ERR_STALE_CLIENTID = 10022, NFS4ERR_STALE_STATEID = 10023, NFS4ERR_OLD_STATEID = 10024, NFS4ERR_BAD_STATEID = 10025, NFS4ERR_BAD_SEQID = 10026, NFS4ERR_NOT_SAME = 10027, NFS4ERR_LOCK_RANGE = 10028, NFS4ERR_SYMLINK = 10029, NFS4ERR_RESTOREFH = 10030, NFS4ERR_LEASE_MOVED = 10031, NFS4ERR_ATTRNOTSUPP = 10032, NFS4ERR_NO_GRACE = 10033, NFS4ERR_RECLAIM_BAD = 10034, NFS4ERR_RECLAIM_CONFLICT = 10035, NFS4ERR_BADXDR = 10036, NFS4ERR_LOCKS_HELD = 10037, NFS4ERR_OPENMODE = 10038, NFS4ERR_BADOWNER = 10039, NFS4ERR_BADCHAR = 10040, NFS4ERR_BADNAME = 10041, NFS4ERR_BAD_RANGE = 10042, NFS4ERR_LOCK_NOTSUPP = 10043, NFS4ERR_OP_ILLEGAL = 10044, NFS4ERR_DEADLOCK = 10045, NFS4ERR_FILE_OPEN = 10046, NFS4ERR_ADMIN_REVOKED = 10047, NFS4ERR_CB_PATH_DOWN = 10048, /* nfs41 */ NFS4ERR_BADIOMODE = 10049, NFS4ERR_BADLAYOUT = 10050, NFS4ERR_BAD_SESSION_DIGEST = 10051, NFS4ERR_BADSESSION = 10052, NFS4ERR_BADSLOT = 10053, NFS4ERR_COMPLETE_ALREADY = 10054, NFS4ERR_CONN_NOT_BOUND_TO_SESSION = 10055, NFS4ERR_DELEG_ALREADY_WANTED = 10056, NFS4ERR_BACK_CHAN_BUSY = 10057, /* backchan reqs outstanding */ NFS4ERR_LAYOUTTRYLATER = 10058, NFS4ERR_LAYOUTUNAVAILABLE = 10059, NFS4ERR_NOMATCHING_LAYOUT = 10060, NFS4ERR_RECALLCONFLICT = 10061, NFS4ERR_UNKNOWN_LAYOUTTYPE = 10062, NFS4ERR_SEQ_MISORDERED = 10063, /* unexpected seq.id in req */ NFS4ERR_SEQUENCE_POS = 10064, /* [CB_]SEQ. op not 1st op */ NFS4ERR_REQ_TOO_BIG = 10065, /* request too big */ NFS4ERR_REP_TOO_BIG = 10066, /* reply too big */ NFS4ERR_REP_TOO_BIG_TO_CACHE = 10067, /* rep. not all cached */ NFS4ERR_RETRY_UNCACHED_REP = 10068, /* retry & rep. uncached */ NFS4ERR_UNSAFE_COMPOUND = 10069, /* retry/recovery too hard */ NFS4ERR_TOO_MANY_OPS = 10070, /* too many ops in [CB_]COMP */ NFS4ERR_OP_NOT_IN_SESSION = 10071, /* op needs [CB_]SEQ. op */ NFS4ERR_HASH_ALG_UNSUPP = 10072, /* hash alg. not supp. */ /* Error 10073 is unused. */ NFS4ERR_CLIENTID_BUSY = 10074, /* clientid has state */ NFS4ERR_PNFS_IO_HOLE = 10075, /* IO to _SPARSE file hole */ NFS4ERR_SEQ_FALSE_RETRY = 10076, /* retry not original */ NFS4ERR_BAD_HIGH_SLOT = 10077, /* sequence arg bad */ NFS4ERR_DEADSESSION = 10078, /* persistent session dead */ NFS4ERR_ENCR_ALG_UNSUPP = 10079, /* SSV alg mismatch */ NFS4ERR_PNFS_NO_LAYOUT = 10080, /* direct I/O with no layout */ NFS4ERR_NOT_ONLY_OP = 10081, /* bad compound */ NFS4ERR_WRONG_CRED = 10082, /* permissions:state change */ NFS4ERR_WRONG_TYPE = 10083, /* current operation mismatch */ NFS4ERR_DIRDELEG_UNAVAIL = 10084, /* no directory delegation */ NFS4ERR_REJECT_DELEG = 10085, /* on callback */ NFS4ERR_RETURNCONFLICT = 10086, /* outstanding layoutreturn */ NFS4ERR_DELEG_REVOKED = 10087, /* deleg./layout revoked */ /* nfs42 */ NFS4ERR_PARTNER_NOTSUPP = 10088, NFS4ERR_PARTNER_NO_AUTH = 10089, NFS4ERR_UNION_NOTSUPP = 10090, NFS4ERR_OFFLOAD_DENIED = 10091, NFS4ERR_WRONG_LFS = 10092, NFS4ERR_BADLABEL = 10093, NFS4ERR_OFFLOAD_NO_REQS = 10094, /* xattr (RFC8276) */ NFS4ERR_NOXATTR = 10095, NFS4ERR_XATTR2BIG = 10096, }; /* error codes for internal client use */ #define NFS4ERR_RESET_TO_MDS 12001 #define NFS4ERR_RESET_TO_PNFS 12002 static inline bool seqid_mutating_err(u32 err) { /* See RFC 7530, section 9.1.7 */ switch (err) { case NFS4ERR_STALE_CLIENTID: case NFS4ERR_STALE_STATEID: case NFS4ERR_BAD_STATEID: case NFS4ERR_BAD_SEQID: case NFS4ERR_BADXDR: case NFS4ERR_RESOURCE: case NFS4ERR_NOFILEHANDLE: case NFS4ERR_MOVED: return false; } return true; } /* * Note: NF4BAD is not actually part of the protocol; it is just used * internally by nfsd. */ enum nfs_ftype4 { NF4BAD = 0, NF4REG = 1, /* Regular File */ NF4DIR = 2, /* Directory */ NF4BLK = 3, /* Special File - block device */ NF4CHR = 4, /* Special File - character device */ NF4LNK = 5, /* Symbolic Link */ NF4SOCK = 6, /* Special File - socket */ NF4FIFO = 7, /* Special File - fifo */ NF4ATTRDIR = 8, /* Attribute Directory */ NF4NAMEDATTR = 9 /* Named Attribute */ }; enum open_claim_type4 { NFS4_OPEN_CLAIM_NULL = 0, NFS4_OPEN_CLAIM_PREVIOUS = 1, NFS4_OPEN_CLAIM_DELEGATE_CUR = 2, NFS4_OPEN_CLAIM_DELEGATE_PREV = 3, NFS4_OPEN_CLAIM_FH = 4, /* 4.1 */ NFS4_OPEN_CLAIM_DELEG_CUR_FH = 5, /* 4.1 */ NFS4_OPEN_CLAIM_DELEG_PREV_FH = 6, /* 4.1 */ }; enum opentype4 { NFS4_OPEN_NOCREATE = 0, NFS4_OPEN_CREATE = 1 }; enum createmode4 { NFS4_CREATE_UNCHECKED = 0, NFS4_CREATE_GUARDED = 1, NFS4_CREATE_EXCLUSIVE = 2, /* * New to NFSv4.1. If session is persistent, * GUARDED4 MUST be used. Otherwise, use * EXCLUSIVE4_1 instead of EXCLUSIVE4. */ NFS4_CREATE_EXCLUSIVE4_1 = 3 }; enum limit_by4 { NFS4_LIMIT_SIZE = 1, NFS4_LIMIT_BLOCKS = 2 }; enum open_delegation_type4 { NFS4_OPEN_DELEGATE_NONE = 0, NFS4_OPEN_DELEGATE_READ = 1, NFS4_OPEN_DELEGATE_WRITE = 2, NFS4_OPEN_DELEGATE_NONE_EXT = 3, /* 4.1 */ }; enum why_no_delegation4 { /* new to v4.1 */ WND4_NOT_WANTED = 0, WND4_CONTENTION = 1, WND4_RESOURCE = 2, WND4_NOT_SUPP_FTYPE = 3, WND4_WRITE_DELEG_NOT_SUPP_FTYPE = 4, WND4_NOT_SUPP_UPGRADE = 5, WND4_NOT_SUPP_DOWNGRADE = 6, WND4_CANCELLED = 7, WND4_IS_DIR = 8, }; enum lock_type4 { NFS4_UNLOCK_LT = 0, NFS4_READ_LT = 1, NFS4_WRITE_LT = 2, NFS4_READW_LT = 3, NFS4_WRITEW_LT = 4 }; /* Mandatory Attributes */ #define FATTR4_WORD0_SUPPORTED_ATTRS (1UL << 0) #define FATTR4_WORD0_TYPE (1UL << 1) #define FATTR4_WORD0_FH_EXPIRE_TYPE (1UL << 2) #define FATTR4_WORD0_CHANGE (1UL << 3) #define FATTR4_WORD0_SIZE (1UL << 4) #define FATTR4_WORD0_LINK_SUPPORT (1UL << 5) #define FATTR4_WORD0_SYMLINK_SUPPORT (1UL << 6) #define FATTR4_WORD0_NAMED_ATTR (1UL << 7) #define FATTR4_WORD0_FSID (1UL << 8) #define FATTR4_WORD0_UNIQUE_HANDLES (1UL << 9) #define FATTR4_WORD0_LEASE_TIME (1UL << 10) #define FATTR4_WORD0_RDATTR_ERROR (1UL << 11) /* Mandatory in NFSv4.1 */ #define FATTR4_WORD2_SUPPATTR_EXCLCREAT (1UL << 11) /* Recommended Attributes */ #define FATTR4_WORD0_ACL (1UL << 12) #define FATTR4_WORD0_ACLSUPPORT (1UL << 13) #define FATTR4_WORD0_ARCHIVE (1UL << 14) #define FATTR4_WORD0_CANSETTIME (1UL << 15) #define FATTR4_WORD0_CASE_INSENSITIVE (1UL << 16) #define FATTR4_WORD0_CASE_PRESERVING (1UL << 17) #define FATTR4_WORD0_CHOWN_RESTRICTED (1UL << 18) #define FATTR4_WORD0_FILEHANDLE (1UL << 19) #define FATTR4_WORD0_FILEID (1UL << 20) #define FATTR4_WORD0_FILES_AVAIL (1UL << 21) #define FATTR4_WORD0_FILES_FREE (1UL << 22) #define FATTR4_WORD0_FILES_TOTAL (1UL << 23) #define FATTR4_WORD0_FS_LOCATIONS (1UL << 24) #define FATTR4_WORD0_HIDDEN (1UL << 25) #define FATTR4_WORD0_HOMOGENEOUS (1UL << 26) #define FATTR4_WORD0_MAXFILESIZE (1UL << 27) #define FATTR4_WORD0_MAXLINK (1UL << 28) #define FATTR4_WORD0_MAXNAME (1UL << 29) #define FATTR4_WORD0_MAXREAD (1UL << 30) #define FATTR4_WORD0_MAXWRITE (1UL << 31) #define FATTR4_WORD1_MIMETYPE (1UL << 0) #define FATTR4_WORD1_MODE (1UL << 1) #define FATTR4_WORD1_NO_TRUNC (1UL << 2) #define FATTR4_WORD1_NUMLINKS (1UL << 3) #define FATTR4_WORD1_OWNER (1UL << 4) #define FATTR4_WORD1_OWNER_GROUP (1UL << 5) #define FATTR4_WORD1_QUOTA_HARD (1UL << 6) #define FATTR4_WORD1_QUOTA_SOFT (1UL << 7) #define FATTR4_WORD1_QUOTA_USED (1UL << 8) #define FATTR4_WORD1_RAWDEV (1UL << 9) #define FATTR4_WORD1_SPACE_AVAIL (1UL << 10) #define FATTR4_WORD1_SPACE_FREE (1UL << 11) #define FATTR4_WORD1_SPACE_TOTAL (1UL << 12) #define FATTR4_WORD1_SPACE_USED (1UL << 13) #define FATTR4_WORD1_SYSTEM (1UL << 14) #define FATTR4_WORD1_TIME_ACCESS (1UL << 15) #define FATTR4_WORD1_TIME_ACCESS_SET (1UL << 16) #define FATTR4_WORD1_TIME_BACKUP (1UL << 17) #define FATTR4_WORD1_TIME_CREATE (1UL << 18) #define FATTR4_WORD1_TIME_DELTA (1UL << 19) #define FATTR4_WORD1_TIME_METADATA (1UL << 20) #define FATTR4_WORD1_TIME_MODIFY (1UL << 21) #define FATTR4_WORD1_TIME_MODIFY_SET (1UL << 22) #define FATTR4_WORD1_MOUNTED_ON_FILEID (1UL << 23) #define FATTR4_WORD1_FS_LAYOUT_TYPES (1UL << 30) #define FATTR4_WORD2_LAYOUT_TYPES (1UL << 0) #define FATTR4_WORD2_LAYOUT_BLKSIZE (1UL << 1) #define FATTR4_WORD2_MDSTHRESHOLD (1UL << 4) #define FATTR4_WORD2_CLONE_BLKSIZE (1UL << 13) #define FATTR4_WORD2_CHANGE_ATTR_TYPE (1UL << 15) #define FATTR4_WORD2_SECURITY_LABEL (1UL << 16) #define FATTR4_WORD2_MODE_UMASK (1UL << 17) #define FATTR4_WORD2_XATTR_SUPPORT (1UL << 18) /* MDS threshold bitmap bits */ #define THRESHOLD_RD (1UL << 0) #define THRESHOLD_WR (1UL << 1) #define THRESHOLD_RD_IO (1UL << 2) #define THRESHOLD_WR_IO (1UL << 3) #define NFSPROC4_NULL 0 #define NFSPROC4_COMPOUND 1 #define NFS4_VERSION 4 #define NFS4_MINOR_VERSION 0 #define NFS4_DEBUG 1 /* * Index of predefined Linux client operations * * To ensure that /proc/net/rpc/nfs remains correctly ordered, please * append only to this enum when adding new client operations. */ enum { NFSPROC4_CLNT_NULL = 0, /* Unused */ NFSPROC4_CLNT_READ, NFSPROC4_CLNT_WRITE, NFSPROC4_CLNT_COMMIT, NFSPROC4_CLNT_OPEN, NFSPROC4_CLNT_OPEN_CONFIRM, NFSPROC4_CLNT_OPEN_NOATTR, NFSPROC4_CLNT_OPEN_DOWNGRADE, NFSPROC4_CLNT_CLOSE, NFSPROC4_CLNT_SETATTR, NFSPROC4_CLNT_FSINFO, NFSPROC4_CLNT_RENEW, NFSPROC4_CLNT_SETCLIENTID, NFSPROC4_CLNT_SETCLIENTID_CONFIRM, NFSPROC4_CLNT_LOCK, NFSPROC4_CLNT_LOCKT, NFSPROC4_CLNT_LOCKU, NFSPROC4_CLNT_ACCESS, NFSPROC4_CLNT_GETATTR, NFSPROC4_CLNT_LOOKUP, NFSPROC4_CLNT_LOOKUP_ROOT, NFSPROC4_CLNT_REMOVE, NFSPROC4_CLNT_RENAME, NFSPROC4_CLNT_LINK, NFSPROC4_CLNT_SYMLINK, NFSPROC4_CLNT_CREATE, NFSPROC4_CLNT_PATHCONF, NFSPROC4_CLNT_STATFS, NFSPROC4_CLNT_READLINK, NFSPROC4_CLNT_READDIR, NFSPROC4_CLNT_SERVER_CAPS, NFSPROC4_CLNT_DELEGRETURN, NFSPROC4_CLNT_GETACL, NFSPROC4_CLNT_SETACL, NFSPROC4_CLNT_FS_LOCATIONS, NFSPROC4_CLNT_RELEASE_LOCKOWNER, NFSPROC4_CLNT_SECINFO, NFSPROC4_CLNT_FSID_PRESENT, NFSPROC4_CLNT_EXCHANGE_ID, NFSPROC4_CLNT_CREATE_SESSION, NFSPROC4_CLNT_DESTROY_SESSION, NFSPROC4_CLNT_SEQUENCE, NFSPROC4_CLNT_GET_LEASE_TIME, NFSPROC4_CLNT_RECLAIM_COMPLETE, NFSPROC4_CLNT_LAYOUTGET, NFSPROC4_CLNT_GETDEVICEINFO, NFSPROC4_CLNT_LAYOUTCOMMIT, NFSPROC4_CLNT_LAYOUTRETURN, NFSPROC4_CLNT_SECINFO_NO_NAME, NFSPROC4_CLNT_TEST_STATEID, NFSPROC4_CLNT_FREE_STATEID, NFSPROC4_CLNT_GETDEVICELIST, NFSPROC4_CLNT_BIND_CONN_TO_SESSION, NFSPROC4_CLNT_DESTROY_CLIENTID, NFSPROC4_CLNT_SEEK, NFSPROC4_CLNT_ALLOCATE, NFSPROC4_CLNT_DEALLOCATE, NFSPROC4_CLNT_LAYOUTSTATS, NFSPROC4_CLNT_CLONE, NFSPROC4_CLNT_COPY, NFSPROC4_CLNT_OFFLOAD_CANCEL, NFSPROC4_CLNT_LOOKUPP, NFSPROC4_CLNT_LAYOUTERROR, NFSPROC4_CLNT_COPY_NOTIFY, NFSPROC4_CLNT_GETXATTR, NFSPROC4_CLNT_SETXATTR, NFSPROC4_CLNT_LISTXATTRS, NFSPROC4_CLNT_REMOVEXATTR, NFSPROC4_CLNT_READ_PLUS, }; /* nfs41 types */ struct nfs4_sessionid { unsigned char data[NFS4_MAX_SESSIONID_LEN]; }; /* Create Session Flags */ #define SESSION4_PERSIST 0x001 #define SESSION4_BACK_CHAN 0x002 #define SESSION4_RDMA 0x004 #define SESSION4_FLAG_MASK_A 0x007 enum state_protect_how4 { SP4_NONE = 0, SP4_MACH_CRED = 1, SP4_SSV = 2 }; enum pnfs_layouttype { LAYOUT_NFSV4_1_FILES = 1, LAYOUT_OSD2_OBJECTS = 2, LAYOUT_BLOCK_VOLUME = 3, LAYOUT_FLEX_FILES = 4, LAYOUT_SCSI = 5, LAYOUT_TYPE_MAX }; /* used for both layout return and recall */ enum pnfs_layoutreturn_type { RETURN_FILE = 1, RETURN_FSID = 2, RETURN_ALL = 3 }; enum pnfs_iomode { IOMODE_READ = 1, IOMODE_RW = 2, IOMODE_ANY = 3, }; enum pnfs_notify_deviceid_type4 { NOTIFY_DEVICEID4_CHANGE = 1 << 1, NOTIFY_DEVICEID4_DELETE = 1 << 2, }; enum pnfs_block_volume_type { PNFS_BLOCK_VOLUME_SIMPLE = 0, PNFS_BLOCK_VOLUME_SLICE = 1, PNFS_BLOCK_VOLUME_CONCAT = 2, PNFS_BLOCK_VOLUME_STRIPE = 3, PNFS_BLOCK_VOLUME_SCSI = 4, }; enum pnfs_block_extent_state { PNFS_BLOCK_READWRITE_DATA = 0, PNFS_BLOCK_READ_DATA = 1, PNFS_BLOCK_INVALID_DATA = 2, PNFS_BLOCK_NONE_DATA = 3, }; /* on the wire size of a block layout extent */ #define PNFS_BLOCK_EXTENT_SIZE \ (7 * sizeof(__be32) + NFS4_DEVICEID4_SIZE) /* on the wire size of a scsi commit range */ #define PNFS_SCSI_RANGE_SIZE \ (4 * sizeof(__be32)) enum scsi_code_set { PS_CODE_SET_BINARY = 1, PS_CODE_SET_ASCII = 2, PS_CODE_SET_UTF8 = 3 }; enum scsi_designator_type { PS_DESIGNATOR_T10 = 1, PS_DESIGNATOR_EUI64 = 2, PS_DESIGNATOR_NAA = 3, PS_DESIGNATOR_NAME = 8 }; #define NFL4_UFLG_MASK 0x0000003F #define NFL4_UFLG_DENSE 0x00000001 #define NFL4_UFLG_COMMIT_THRU_MDS 0x00000002 #define NFL4_UFLG_STRIPE_UNIT_SIZE_MASK 0xFFFFFFC0 /* Encoded in the loh_body field of type layouthint4 */ enum filelayout_hint_care4 { NFLH4_CARE_DENSE = NFL4_UFLG_DENSE, NFLH4_CARE_COMMIT_THRU_MDS = NFL4_UFLG_COMMIT_THRU_MDS, NFLH4_CARE_STRIPE_UNIT_SIZE = 0x00000040, NFLH4_CARE_STRIPE_COUNT = 0x00000080 }; #define NFS4_DEVICEID4_SIZE 16 struct nfs4_deviceid { char data[NFS4_DEVICEID4_SIZE]; }; enum data_content4 { NFS4_CONTENT_DATA = 0, NFS4_CONTENT_HOLE = 1, }; enum pnfs_update_layout_reason { PNFS_UPDATE_LAYOUT_UNKNOWN = 0, PNFS_UPDATE_LAYOUT_NO_PNFS, PNFS_UPDATE_LAYOUT_RD_ZEROLEN, PNFS_UPDATE_LAYOUT_MDSTHRESH, PNFS_UPDATE_LAYOUT_NOMEM, PNFS_UPDATE_LAYOUT_BULK_RECALL, PNFS_UPDATE_LAYOUT_IO_TEST_FAIL, PNFS_UPDATE_LAYOUT_FOUND_CACHED, PNFS_UPDATE_LAYOUT_RETURN, PNFS_UPDATE_LAYOUT_RETRY, PNFS_UPDATE_LAYOUT_BLOCKED, PNFS_UPDATE_LAYOUT_INVALID_OPEN, PNFS_UPDATE_LAYOUT_SEND_LAYOUTGET, PNFS_UPDATE_LAYOUT_EXIT, }; #define NFS4_OP_MAP_NUM_LONGS \ DIV_ROUND_UP(LAST_NFS4_OP, 8 * sizeof(unsigned long)) #define NFS4_OP_MAP_NUM_WORDS \ (NFS4_OP_MAP_NUM_LONGS * sizeof(unsigned long) / sizeof(u32)) struct nfs4_op_map { union { unsigned long longs[NFS4_OP_MAP_NUM_LONGS]; u32 words[NFS4_OP_MAP_NUM_WORDS]; } u; }; struct nfs42_netaddr { char netid[RPCBIND_MAXNETIDLEN]; char addr[RPCBIND_MAXUADDRLEN + 1]; u32 netid_len; u32 addr_len; }; enum netloc_type4 { NL4_NAME = 1, NL4_URL = 2, NL4_NETADDR = 3, }; struct nl4_server { enum netloc_type4 nl4_type; union { struct { /* NL4_NAME, NL4_URL */ int nl4_str_sz; char nl4_str[NFS4_OPAQUE_LIMIT + 1]; }; struct nfs42_netaddr nl4_addr; /* NL4_NETADDR */ } u; }; enum nfs4_change_attr_type { NFS4_CHANGE_TYPE_IS_MONOTONIC_INCR = 0, NFS4_CHANGE_TYPE_IS_VERSION_COUNTER = 1, NFS4_CHANGE_TYPE_IS_VERSION_COUNTER_NOPNFS = 2, NFS4_CHANGE_TYPE_IS_TIME_METADATA = 3, NFS4_CHANGE_TYPE_IS_UNDEFINED = 4, }; /* * Options for setxattr. These match the flags for setxattr(2). */ enum nfs4_setxattr_options { SETXATTR4_EITHER = 0, SETXATTR4_CREATE = 1, SETXATTR4_REPLACE = 2, }; enum { RCA4_TYPE_MASK_RDATA_DLG = 0, RCA4_TYPE_MASK_WDATA_DLG = 1, RCA4_TYPE_MASK_DIR_DLG = 2, RCA4_TYPE_MASK_FILE_LAYOUT = 3, RCA4_TYPE_MASK_BLK_LAYOUT = 4, RCA4_TYPE_MASK_OBJ_LAYOUT_MIN = 8, RCA4_TYPE_MASK_OBJ_LAYOUT_MAX = 9, RCA4_TYPE_MASK_OTHER_LAYOUT_MIN = 12, RCA4_TYPE_MASK_OTHER_LAYOUT_MAX = 15, }; #endif PK ! ��B,U U pid_namespace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PID_NS_H #define _LINUX_PID_NS_H #include <linux/sched.h> #include <linux/bug.h> #include <linux/mm.h> #include <linux/workqueue.h> #include <linux/threads.h> #include <linux/nsproxy.h> #include <linux/ns_common.h> #include <linux/idr.h> /* MAX_PID_NS_LEVEL is needed for limiting size of 'struct pid' */ #define MAX_PID_NS_LEVEL 32 struct fs_pin; struct pid_namespace { struct idr idr; struct rcu_head rcu; unsigned int pid_allocated; struct task_struct *child_reaper; struct kmem_cache *pid_cachep; unsigned int level; struct pid_namespace *parent; #ifdef CONFIG_BSD_PROCESS_ACCT struct fs_pin *bacct; #endif struct user_namespace *user_ns; struct ucounts *ucounts; int reboot; /* group exit code if this pidns was rebooted */ struct ns_common ns; } __randomize_layout; extern struct pid_namespace init_pid_ns; #define PIDNS_ADDING (1U << 31) #ifdef CONFIG_PID_NS static inline struct pid_namespace *get_pid_ns(struct pid_namespace *ns) { if (ns != &init_pid_ns) refcount_inc(&ns->ns.count); return ns; } extern struct pid_namespace *copy_pid_ns(unsigned long flags, struct user_namespace *user_ns, struct pid_namespace *ns); extern void zap_pid_ns_processes(struct pid_namespace *pid_ns); extern int reboot_pid_ns(struct pid_namespace *pid_ns, int cmd); extern void put_pid_ns(struct pid_namespace *ns); #else /* !CONFIG_PID_NS */ #include <linux/err.h> static inline struct pid_namespace *get_pid_ns(struct pid_namespace *ns) { return ns; } static inline struct pid_namespace *copy_pid_ns(unsigned long flags, struct user_namespace *user_ns, struct pid_namespace *ns) { if (flags & CLONE_NEWPID) ns = ERR_PTR(-EINVAL); return ns; } static inline void put_pid_ns(struct pid_namespace *ns) { } static inline void zap_pid_ns_processes(struct pid_namespace *ns) { BUG(); } static inline int reboot_pid_ns(struct pid_namespace *pid_ns, int cmd) { return 0; } #endif /* CONFIG_PID_NS */ extern struct pid_namespace *task_active_pid_ns(struct task_struct *tsk); void pidhash_init(void); void pid_idr_init(void); #endif /* _LINUX_PID_NS_H */ PK ! �! �! mpi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* mpi.h - Multi Precision Integers * Copyright (C) 1994, 1996, 1998, 1999, * 2000, 2001 Free Software Foundation, Inc. * * This file is part of GNUPG. * * Note: This code is heavily based on the GNU MP Library. * Actually it's the same code with only minor changes in the * way the data is stored; this is to support the abstraction * of an optional secure memory allocation which may be used * to avoid revealing of sensitive data due to paging etc. * The GNU MP Library itself is published under the LGPL; * however I decided to publish this code under the plain GPL. */ #ifndef G10_MPI_H #define G10_MPI_H #include <linux/types.h> #include <linux/scatterlist.h> #define BYTES_PER_MPI_LIMB (BITS_PER_LONG / 8) #define BITS_PER_MPI_LIMB BITS_PER_LONG typedef unsigned long int mpi_limb_t; typedef signed long int mpi_limb_signed_t; struct gcry_mpi { int alloced; /* array size (# of allocated limbs) */ int nlimbs; /* number of valid limbs */ int nbits; /* the real number of valid bits (info only) */ int sign; /* indicates a negative number */ unsigned flags; /* bit 0: array must be allocated in secure memory space */ /* bit 1: not used */ /* bit 2: the limb is a pointer to some m_alloced data */ mpi_limb_t *d; /* array with the limbs */ }; typedef struct gcry_mpi *MPI; #define mpi_get_nlimbs(a) ((a)->nlimbs) #define mpi_has_sign(a) ((a)->sign) /*-- mpiutil.c --*/ MPI mpi_alloc(unsigned nlimbs); void mpi_clear(MPI a); void mpi_free(MPI a); int mpi_resize(MPI a, unsigned nlimbs); static inline MPI mpi_new(unsigned int nbits) { return mpi_alloc((nbits + BITS_PER_MPI_LIMB - 1) / BITS_PER_MPI_LIMB); } MPI mpi_copy(MPI a); MPI mpi_alloc_like(MPI a); void mpi_snatch(MPI w, MPI u); MPI mpi_set(MPI w, MPI u); MPI mpi_set_ui(MPI w, unsigned long u); MPI mpi_alloc_set_ui(unsigned long u); void mpi_swap_cond(MPI a, MPI b, unsigned long swap); /* Constants used to return constant MPIs. See mpi_init if you * want to add more constants. */ #define MPI_NUMBER_OF_CONSTANTS 6 enum gcry_mpi_constants { MPI_C_ZERO, MPI_C_ONE, MPI_C_TWO, MPI_C_THREE, MPI_C_FOUR, MPI_C_EIGHT }; MPI mpi_const(enum gcry_mpi_constants no); /*-- mpicoder.c --*/ /* Different formats of external big integer representation. */ enum gcry_mpi_format { GCRYMPI_FMT_NONE = 0, GCRYMPI_FMT_STD = 1, /* Twos complement stored without length. */ GCRYMPI_FMT_PGP = 2, /* As used by OpenPGP (unsigned only). */ GCRYMPI_FMT_SSH = 3, /* As used by SSH (like STD but with length). */ GCRYMPI_FMT_HEX = 4, /* Hex format. */ GCRYMPI_FMT_USG = 5, /* Like STD but unsigned. */ GCRYMPI_FMT_OPAQUE = 8 /* Opaque format (some functions only). */ }; MPI mpi_read_raw_data(const void *xbuffer, size_t nbytes); MPI mpi_read_from_buffer(const void *buffer, unsigned *ret_nread); int mpi_fromstr(MPI val, const char *str); MPI mpi_scanval(const char *string); MPI mpi_read_raw_from_sgl(struct scatterlist *sgl, unsigned int len); void *mpi_get_buffer(MPI a, unsigned *nbytes, int *sign); int mpi_read_buffer(MPI a, uint8_t *buf, unsigned buf_len, unsigned *nbytes, int *sign); int mpi_write_to_sgl(MPI a, struct scatterlist *sg, unsigned nbytes, int *sign); int mpi_print(enum gcry_mpi_format format, unsigned char *buffer, size_t buflen, size_t *nwritten, MPI a); /*-- mpi-mod.c --*/ void mpi_mod(MPI rem, MPI dividend, MPI divisor); /* Context used with Barrett reduction. */ struct barrett_ctx_s; typedef struct barrett_ctx_s *mpi_barrett_t; mpi_barrett_t mpi_barrett_init(MPI m, int copy); void mpi_barrett_free(mpi_barrett_t ctx); void mpi_mod_barrett(MPI r, MPI x, mpi_barrett_t ctx); void mpi_mul_barrett(MPI w, MPI u, MPI v, mpi_barrett_t ctx); /*-- mpi-pow.c --*/ int mpi_powm(MPI res, MPI base, MPI exp, MPI mod); /*-- mpi-cmp.c --*/ int mpi_cmp_ui(MPI u, ulong v); int mpi_cmp(MPI u, MPI v); int mpi_cmpabs(MPI u, MPI v); /*-- mpi-sub-ui.c --*/ int mpi_sub_ui(MPI w, MPI u, unsigned long vval); /*-- mpi-bit.c --*/ void mpi_normalize(MPI a); unsigned mpi_get_nbits(MPI a); int mpi_test_bit(MPI a, unsigned int n); void mpi_set_bit(MPI a, unsigned int n); void mpi_set_highbit(MPI a, unsigned int n); void mpi_clear_highbit(MPI a, unsigned int n); void mpi_clear_bit(MPI a, unsigned int n); void mpi_rshift_limbs(MPI a, unsigned int count); void mpi_rshift(MPI x, MPI a, unsigned int n); void mpi_lshift_limbs(MPI a, unsigned int count); void mpi_lshift(MPI x, MPI a, unsigned int n); /*-- mpi-add.c --*/ void mpi_add_ui(MPI w, MPI u, unsigned long v); void mpi_add(MPI w, MPI u, MPI v); void mpi_sub(MPI w, MPI u, MPI v); void mpi_addm(MPI w, MPI u, MPI v, MPI m); void mpi_subm(MPI w, MPI u, MPI v, MPI m); /*-- mpi-mul.c --*/ void mpi_mul(MPI w, MPI u, MPI v); void mpi_mulm(MPI w, MPI u, MPI v, MPI m); /*-- mpi-div.c --*/ void mpi_tdiv_r(MPI rem, MPI num, MPI den); void mpi_fdiv_r(MPI rem, MPI dividend, MPI divisor); void mpi_fdiv_q(MPI quot, MPI dividend, MPI divisor); /*-- mpi-inv.c --*/ int mpi_invm(MPI x, MPI a, MPI n); /*-- ec.c --*/ /* Object to represent a point in projective coordinates */ struct gcry_mpi_point { MPI x; MPI y; MPI z; }; typedef struct gcry_mpi_point *MPI_POINT; /* Models describing an elliptic curve */ enum gcry_mpi_ec_models { /* The Short Weierstrass equation is * y^2 = x^3 + ax + b */ MPI_EC_WEIERSTRASS = 0, /* The Montgomery equation is * by^2 = x^3 + ax^2 + x */ MPI_EC_MONTGOMERY, /* The Twisted Edwards equation is * ax^2 + y^2 = 1 + bx^2y^2 * Note that we use 'b' instead of the commonly used 'd'. */ MPI_EC_EDWARDS }; /* Dialects used with elliptic curves */ enum ecc_dialects { ECC_DIALECT_STANDARD = 0, ECC_DIALECT_ED25519, ECC_DIALECT_SAFECURVE }; /* This context is used with all our EC functions. */ struct mpi_ec_ctx { enum gcry_mpi_ec_models model; /* The model describing this curve. */ enum ecc_dialects dialect; /* The ECC dialect used with the curve. */ int flags; /* Public key flags (not always used). */ unsigned int nbits; /* Number of bits. */ /* Domain parameters. Note that they may not all be set and if set * the MPIs may be flagged as constant. */ MPI p; /* Prime specifying the field GF(p). */ MPI a; /* First coefficient of the Weierstrass equation. */ MPI b; /* Second coefficient of the Weierstrass equation. */ MPI_POINT G; /* Base point (generator). */ MPI n; /* Order of G. */ unsigned int h; /* Cofactor. */ /* The actual key. May not be set. */ MPI_POINT Q; /* Public key. */ MPI d; /* Private key. */ const char *name; /* Name of the curve. */ /* This structure is private to mpi/ec.c! */ struct { struct { unsigned int a_is_pminus3:1; unsigned int two_inv_p:1; } valid; /* Flags to help setting the helper vars below. */ int a_is_pminus3; /* True if A = P - 3. */ MPI two_inv_p; mpi_barrett_t p_barrett; /* Scratch variables. */ MPI scratch[11]; /* Helper for fast reduction. */ /* int nist_nbits; /\* If this is a NIST curve, the # of bits. *\/ */ /* MPI s[10]; */ /* MPI c; */ } t; /* Curve specific computation routines for the field. */ void (*addm)(MPI w, MPI u, MPI v, struct mpi_ec_ctx *ctx); void (*subm)(MPI w, MPI u, MPI v, struct mpi_ec_ctx *ec); void (*mulm)(MPI w, MPI u, MPI v, struct mpi_ec_ctx *ctx); void (*pow2)(MPI w, const MPI b, struct mpi_ec_ctx *ctx); void (*mul2)(MPI w, MPI u, struct mpi_ec_ctx *ctx); }; void mpi_ec_init(struct mpi_ec_ctx *ctx, enum gcry_mpi_ec_models model, enum ecc_dialects dialect, int flags, MPI p, MPI a, MPI b); void mpi_ec_deinit(struct mpi_ec_ctx *ctx); MPI_POINT mpi_point_new(unsigned int nbits); void mpi_point_release(MPI_POINT p); void mpi_point_init(MPI_POINT p); void mpi_point_free_parts(MPI_POINT p); int mpi_ec_get_affine(MPI x, MPI y, MPI_POINT point, struct mpi_ec_ctx *ctx); void mpi_ec_add_points(MPI_POINT result, MPI_POINT p1, MPI_POINT p2, struct mpi_ec_ctx *ctx); void mpi_ec_mul_point(MPI_POINT result, MPI scalar, MPI_POINT point, struct mpi_ec_ctx *ctx); int mpi_ec_curve_point(MPI_POINT point, struct mpi_ec_ctx *ctx); /* inline functions */ /** * mpi_get_size() - returns max size required to store the number * * @a: A multi precision integer for which we want to allocate a buffer * * Return: size required to store the number */ static inline unsigned int mpi_get_size(MPI a) { return a->nlimbs * BYTES_PER_MPI_LIMB; } #endif /*G10_MPI_H */ PK ! ��R� � acpi_viot.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __ACPI_VIOT_H__ #define __ACPI_VIOT_H__ #include <linux/acpi.h> #ifdef CONFIG_ACPI_VIOT void __init acpi_viot_early_init(void); void __init acpi_viot_init(void); int viot_iommu_configure(struct device *dev); #else static inline void acpi_viot_early_init(void) {} static inline void acpi_viot_init(void) {} static inline int viot_iommu_configure(struct device *dev) { return -ENODEV; } #endif #endif /* __ACPI_VIOT_H__ */ PK ! r�� � cookie.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_COOKIE_H #define __LINUX_COOKIE_H #include <linux/atomic.h> #include <linux/percpu.h> #include <asm/local.h> struct pcpu_gen_cookie { local_t nesting; u64 last; } __aligned(16); struct gen_cookie { struct pcpu_gen_cookie __percpu *local; atomic64_t forward_last ____cacheline_aligned_in_smp; atomic64_t reverse_last; }; #define COOKIE_LOCAL_BATCH 4096 #define DEFINE_COOKIE(name) \ static DEFINE_PER_CPU(struct pcpu_gen_cookie, __##name); \ static struct gen_cookie name = { \ .local = &__##name, \ .forward_last = ATOMIC64_INIT(0), \ .reverse_last = ATOMIC64_INIT(0), \ } static __always_inline u64 gen_cookie_next(struct gen_cookie *gc) { struct pcpu_gen_cookie *local = this_cpu_ptr(gc->local); u64 val; if (likely(local_inc_return(&local->nesting) == 1)) { val = local->last; if (__is_defined(CONFIG_SMP) && unlikely((val & (COOKIE_LOCAL_BATCH - 1)) == 0)) { s64 next = atomic64_add_return(COOKIE_LOCAL_BATCH, &gc->forward_last); val = next - COOKIE_LOCAL_BATCH; } local->last = ++val; } else { val = atomic64_dec_return(&gc->reverse_last); } local_dec(&local->nesting); return val; } #endif /* __LINUX_COOKIE_H */ PK ! ��~ ~ dma-buf-map.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Pointer to dma-buf-mapped memory, plus helpers. */ #ifndef __DMA_BUF_MAP_H__ #define __DMA_BUF_MAP_H__ #include <linux/io.h> #include <linux/string.h> /** * DOC: overview * * Calling dma-buf's vmap operation returns a pointer to the buffer's memory. * Depending on the location of the buffer, users may have to access it with * I/O operations or memory load/store operations. For example, copying to * system memory could be done with memcpy(), copying to I/O memory would be * done with memcpy_toio(). * * .. code-block:: c * * void *vaddr = ...; // pointer to system memory * memcpy(vaddr, src, len); * * void *vaddr_iomem = ...; // pointer to I/O memory * memcpy_toio(vaddr, _iomem, src, len); * * When using dma-buf's vmap operation, the returned pointer is encoded as * :c:type:`struct dma_buf_map <dma_buf_map>`. * :c:type:`struct dma_buf_map <dma_buf_map>` stores the buffer's address in * system or I/O memory and a flag that signals the required method of * accessing the buffer. Use the returned instance and the helper functions * to access the buffer's memory in the correct way. * * The type :c:type:`struct dma_buf_map <dma_buf_map>` and its helpers are * actually independent from the dma-buf infrastructure. When sharing buffers * among devices, drivers have to know the location of the memory to access * the buffers in a safe way. :c:type:`struct dma_buf_map <dma_buf_map>` * solves this problem for dma-buf and its users. If other drivers or * sub-systems require similar functionality, the type could be generalized * and moved to a more prominent header file. * * Open-coding access to :c:type:`struct dma_buf_map <dma_buf_map>` is * considered bad style. Rather then accessing its fields directly, use one * of the provided helper functions, or implement your own. For example, * instances of :c:type:`struct dma_buf_map <dma_buf_map>` can be initialized * statically with DMA_BUF_MAP_INIT_VADDR(), or at runtime with * dma_buf_map_set_vaddr(). These helpers will set an address in system memory. * * .. code-block:: c * * struct dma_buf_map map = DMA_BUF_MAP_INIT_VADDR(0xdeadbeaf); * * dma_buf_map_set_vaddr(&map. 0xdeadbeaf); * * To set an address in I/O memory, use dma_buf_map_set_vaddr_iomem(). * * .. code-block:: c * * dma_buf_map_set_vaddr_iomem(&map. 0xdeadbeaf); * * Instances of struct dma_buf_map do not have to be cleaned up, but * can be cleared to NULL with dma_buf_map_clear(). Cleared mappings * always refer to system memory. * * .. code-block:: c * * dma_buf_map_clear(&map); * * Test if a mapping is valid with either dma_buf_map_is_set() or * dma_buf_map_is_null(). * * .. code-block:: c * * if (dma_buf_map_is_set(&map) != dma_buf_map_is_null(&map)) * // always true * * Instances of :c:type:`struct dma_buf_map <dma_buf_map>` can be compared * for equality with dma_buf_map_is_equal(). Mappings the point to different * memory spaces, system or I/O, are never equal. That's even true if both * spaces are located in the same address space, both mappings contain the * same address value, or both mappings refer to NULL. * * .. code-block:: c * * struct dma_buf_map sys_map; // refers to system memory * struct dma_buf_map io_map; // refers to I/O memory * * if (dma_buf_map_is_equal(&sys_map, &io_map)) * // always false * * A set up instance of struct dma_buf_map can be used to access or manipulate * the buffer memory. Depending on the location of the memory, the provided * helpers will pick the correct operations. Data can be copied into the memory * with dma_buf_map_memcpy_to(). The address can be manipulated with * dma_buf_map_incr(). * * .. code-block:: c * * const void *src = ...; // source buffer * size_t len = ...; // length of src * * dma_buf_map_memcpy_to(&map, src, len); * dma_buf_map_incr(&map, len); // go to first byte after the memcpy */ /** * struct dma_buf_map - Pointer to vmap'ed dma-buf memory. * @vaddr_iomem: The buffer's address if in I/O memory * @vaddr: The buffer's address if in system memory * @is_iomem: True if the dma-buf memory is located in I/O * memory, or false otherwise. */ struct dma_buf_map { union { void __iomem *vaddr_iomem; void *vaddr; }; bool is_iomem; }; /** * DMA_BUF_MAP_INIT_VADDR - Initializes struct dma_buf_map to an address in system memory * @vaddr_: A system-memory address */ #define DMA_BUF_MAP_INIT_VADDR(vaddr_) \ { \ .vaddr = (vaddr_), \ .is_iomem = false, \ } /** * dma_buf_map_set_vaddr - Sets a dma-buf mapping structure to an address in system memory * @map: The dma-buf mapping structure * @vaddr: A system-memory address * * Sets the address and clears the I/O-memory flag. */ static inline void dma_buf_map_set_vaddr(struct dma_buf_map *map, void *vaddr) { map->vaddr = vaddr; map->is_iomem = false; } /** * dma_buf_map_set_vaddr_iomem - Sets a dma-buf mapping structure to an address in I/O memory * @map: The dma-buf mapping structure * @vaddr_iomem: An I/O-memory address * * Sets the address and the I/O-memory flag. */ static inline void dma_buf_map_set_vaddr_iomem(struct dma_buf_map *map, void __iomem *vaddr_iomem) { map->vaddr_iomem = vaddr_iomem; map->is_iomem = true; } /** * dma_buf_map_is_equal - Compares two dma-buf mapping structures for equality * @lhs: The dma-buf mapping structure * @rhs: A dma-buf mapping structure to compare with * * Two dma-buf mapping structures are equal if they both refer to the same type of memory * and to the same address within that memory. * * Returns: * True is both structures are equal, or false otherwise. */ static inline bool dma_buf_map_is_equal(const struct dma_buf_map *lhs, const struct dma_buf_map *rhs) { if (lhs->is_iomem != rhs->is_iomem) return false; else if (lhs->is_iomem) return lhs->vaddr_iomem == rhs->vaddr_iomem; else return lhs->vaddr == rhs->vaddr; } /** * dma_buf_map_is_null - Tests for a dma-buf mapping to be NULL * @map: The dma-buf mapping structure * * Depending on the state of struct dma_buf_map.is_iomem, tests if the * mapping is NULL. * * Returns: * True if the mapping is NULL, or false otherwise. */ static inline bool dma_buf_map_is_null(const struct dma_buf_map *map) { if (map->is_iomem) return !map->vaddr_iomem; return !map->vaddr; } /** * dma_buf_map_is_set - Tests is the dma-buf mapping has been set * @map: The dma-buf mapping structure * * Depending on the state of struct dma_buf_map.is_iomem, tests if the * mapping has been set. * * Returns: * True if the mapping is been set, or false otherwise. */ static inline bool dma_buf_map_is_set(const struct dma_buf_map *map) { return !dma_buf_map_is_null(map); } /** * dma_buf_map_clear - Clears a dma-buf mapping structure * @map: The dma-buf mapping structure * * Clears all fields to zero; including struct dma_buf_map.is_iomem. So * mapping structures that were set to point to I/O memory are reset for * system memory. Pointers are cleared to NULL. This is the default. */ static inline void dma_buf_map_clear(struct dma_buf_map *map) { if (map->is_iomem) { map->vaddr_iomem = NULL; map->is_iomem = false; } else { map->vaddr = NULL; } } /** * dma_buf_map_memcpy_to - Memcpy into dma-buf mapping * @dst: The dma-buf mapping structure * @src: The source buffer * @len: The number of byte in src * * Copies data into a dma-buf mapping. The source buffer is in system * memory. Depending on the buffer's location, the helper picks the correct * method of accessing the memory. */ static inline void dma_buf_map_memcpy_to(struct dma_buf_map *dst, const void *src, size_t len) { if (dst->is_iomem) memcpy_toio(dst->vaddr_iomem, src, len); else memcpy(dst->vaddr, src, len); } /** * dma_buf_map_incr - Increments the address stored in a dma-buf mapping * @map: The dma-buf mapping structure * @incr: The number of bytes to increment * * Increments the address stored in a dma-buf mapping. Depending on the * buffer's location, the correct value will be updated. */ static inline void dma_buf_map_incr(struct dma_buf_map *map, size_t incr) { if (map->is_iomem) map->vaddr_iomem += incr; else map->vaddr += incr; } #endif /* __DMA_BUF_MAP_H__ */ PK ! �� dnotify.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DNOTIFY_H #define _LINUX_DNOTIFY_H /* * Directory notification for Linux * * Copyright (C) 2000,2002 Stephen Rothwell */ #include <linux/fs.h> struct dnotify_struct { struct dnotify_struct * dn_next; __u32 dn_mask; int dn_fd; struct file * dn_filp; fl_owner_t dn_owner; }; #ifdef __KERNEL__ #ifdef CONFIG_DNOTIFY #define DNOTIFY_ALL_EVENTS (FS_DELETE | FS_DELETE_CHILD |\ FS_MODIFY | FS_MODIFY_CHILD |\ FS_ACCESS | FS_ACCESS_CHILD |\ FS_ATTRIB | FS_ATTRIB_CHILD |\ FS_CREATE | FS_RENAME |\ FS_MOVED_FROM | FS_MOVED_TO) extern int dir_notify_enable; extern void dnotify_flush(struct file *, fl_owner_t); extern int fcntl_dirnotify(int, struct file *, unsigned long); #else static inline void dnotify_flush(struct file *filp, fl_owner_t id) { } static inline int fcntl_dirnotify(int fd, struct file *filp, unsigned long arg) { return -EINVAL; } #endif /* CONFIG_DNOTIFY */ #endif /* __KERNEL __ */ #endif /* _LINUX_DNOTIFY_H */ PK ! N^��� � fdtable.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * descriptor table internals; you almost certainly want file.h instead. */ #ifndef __LINUX_FDTABLE_H #define __LINUX_FDTABLE_H #include <linux/posix_types.h> #include <linux/compiler.h> #include <linux/spinlock.h> #include <linux/rcupdate.h> #include <linux/nospec.h> #include <linux/types.h> #include <linux/init.h> #include <linux/fs.h> #include <linux/atomic.h> /* * The default fd array needs to be at least BITS_PER_LONG, * as this is the granularity returned by copy_fdset(). */ #define NR_OPEN_DEFAULT BITS_PER_LONG struct fdtable { unsigned int max_fds; struct file __rcu **fd; /* current fd array */ unsigned long *close_on_exec; unsigned long *open_fds; unsigned long *full_fds_bits; struct rcu_head rcu; }; static inline bool close_on_exec(unsigned int fd, const struct fdtable *fdt) { return test_bit(fd, fdt->close_on_exec); } static inline bool fd_is_open(unsigned int fd, const struct fdtable *fdt) { return test_bit(fd, fdt->open_fds); } /* * Open file table structure */ struct files_struct { /* * read mostly part */ atomic_t count; bool resize_in_progress; wait_queue_head_t resize_wait; struct fdtable __rcu *fdt; struct fdtable fdtab; /* * written part on a separate cache line in SMP */ spinlock_t file_lock ____cacheline_aligned_in_smp; unsigned int next_fd; unsigned long close_on_exec_init[1]; unsigned long open_fds_init[1]; unsigned long full_fds_bits_init[1]; struct file __rcu * fd_array[NR_OPEN_DEFAULT]; }; struct file_operations; struct vfsmount; struct dentry; #define rcu_dereference_check_fdtable(files, fdtfd) \ rcu_dereference_check((fdtfd), lockdep_is_held(&(files)->file_lock)) #define files_fdtable(files) \ rcu_dereference_check_fdtable((files), (files)->fdt) /* * The caller must ensure that fd table isn't shared or hold rcu or file lock */ static inline struct file *files_lookup_fd_raw(struct files_struct *files, unsigned int fd) { struct fdtable *fdt = rcu_dereference_raw(files->fdt); if (fd < fdt->max_fds) { fd = array_index_nospec(fd, fdt->max_fds); return rcu_dereference_raw(fdt->fd[fd]); } return NULL; } static inline struct file *files_lookup_fd_locked(struct files_struct *files, unsigned int fd) { RCU_LOCKDEP_WARN(!lockdep_is_held(&files->file_lock), "suspicious rcu_dereference_check() usage"); return files_lookup_fd_raw(files, fd); } static inline struct file *files_lookup_fd_rcu(struct files_struct *files, unsigned int fd) { RCU_LOCKDEP_WARN(!rcu_read_lock_held(), "suspicious rcu_dereference_check() usage"); return files_lookup_fd_raw(files, fd); } static inline struct file *lookup_fd_rcu(unsigned int fd) { return files_lookup_fd_rcu(current->files, fd); } struct file *task_lookup_fd_rcu(struct task_struct *task, unsigned int fd); struct file *task_lookup_next_fd_rcu(struct task_struct *task, unsigned int *fd); struct task_struct; void put_files_struct(struct files_struct *fs); int unshare_files(void); struct fd_range { unsigned int from, to; }; struct files_struct *dup_fd(struct files_struct *, struct fd_range *) __latent_entropy; void do_close_on_exec(struct files_struct *); int iterate_fd(struct files_struct *, unsigned, int (*)(const void *, struct file *, unsigned), const void *); extern int close_fd(unsigned int fd); extern int __close_range(unsigned int fd, unsigned int max_fd, unsigned int flags); extern int close_fd_get_file(unsigned int fd, struct file **res); extern struct kmem_cache *files_cachep; #endif /* __LINUX_FDTABLE_H */ PK ! ����K K crc32c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CRC32C_H #define _LINUX_CRC32C_H #include <linux/types.h> extern u32 crc32c(u32 crc, const void *address, unsigned int length); extern const char *crc32c_impl(void); /* This macro exists for backwards-compatibility. */ #define crc32c_le crc32c #endif /* _LINUX_CRC32C_H */ PK ! ��H� � memory.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/memory.h - generic memory definition * * This is mainly for topological representation. We define the * basic "struct memory_block" here, which can be embedded in per-arch * definitions or NUMA information. * * Basic handling of the devices is done in drivers/base/memory.c * and system devices are handled in drivers/base/sys.c. * * Memory block are exported via sysfs in the class/memory/devices/ * directory. * */ #ifndef _LINUX_MEMORY_H_ #define _LINUX_MEMORY_H_ #include <linux/node.h> #include <linux/compiler.h> #include <linux/mutex.h> #include <linux/notifier.h> #define MIN_MEMORY_BLOCK_SIZE (1UL << SECTION_SIZE_BITS) /** * struct memory_group - a logical group of memory blocks * @nid: The node id for all memory blocks inside the memory group. * @blocks: List of all memory blocks belonging to this memory group. * @present_kernel_pages: Present (online) memory outside ZONE_MOVABLE of this * memory group. * @present_movable_pages: Present (online) memory in ZONE_MOVABLE of this * memory group. * @is_dynamic: The memory group type: static vs. dynamic * @s.max_pages: Valid with &memory_group.is_dynamic == false. The maximum * number of pages we'll have in this static memory group. * @d.unit_pages: Valid with &memory_group.is_dynamic == true. Unit in pages * in which memory is added/removed in this dynamic memory group. * This granularity defines the alignment of a unit in physical * address space; it has to be at least as big as a single * memory block. * * A memory group logically groups memory blocks; each memory block * belongs to at most one memory group. A memory group corresponds to * a memory device, such as a DIMM or a NUMA node, which spans multiple * memory blocks and might even span multiple non-contiguous physical memory * ranges. * * Modification of members after registration is serialized by memory * hot(un)plug code. */ struct memory_group { int nid; struct list_head memory_blocks; unsigned long present_kernel_pages; unsigned long present_movable_pages; bool is_dynamic; union { struct { unsigned long max_pages; } s; struct { unsigned long unit_pages; } d; }; }; struct memory_block { unsigned long start_section_nr; unsigned long state; /* serialized by the dev->lock */ int online_type; /* for passing data to online routine */ int nid; /* NID for this memory block */ struct device dev; /* * Number of vmemmap pages. These pages * lay at the beginning of the memory block. */ unsigned long nr_vmemmap_pages; struct memory_group *group; /* group (if any) for this block */ struct list_head group_next; /* next block inside memory group */ }; int arch_get_memory_phys_device(unsigned long start_pfn); unsigned long memory_block_size_bytes(void); int set_memory_block_size_order(unsigned int order); /* These states are exposed to userspace as text strings in sysfs */ #define MEM_ONLINE (1<<0) /* exposed to userspace */ #define MEM_GOING_OFFLINE (1<<1) /* exposed to userspace */ #define MEM_OFFLINE (1<<2) /* exposed to userspace */ #define MEM_GOING_ONLINE (1<<3) #define MEM_CANCEL_ONLINE (1<<4) #define MEM_CANCEL_OFFLINE (1<<5) struct memory_notify { unsigned long start_pfn; unsigned long nr_pages; int status_change_nid_normal; int status_change_nid_high; int status_change_nid; }; struct notifier_block; struct mem_section; /* * Priorities for the hotplug memory callback routines (stored in decreasing * order in the callback chain) */ #define SLAB_CALLBACK_PRI 1 #define IPC_CALLBACK_PRI 10 #ifndef CONFIG_MEMORY_HOTPLUG_SPARSE static inline void memory_dev_init(void) { return; } static inline int register_memory_notifier(struct notifier_block *nb) { return 0; } static inline void unregister_memory_notifier(struct notifier_block *nb) { } static inline int memory_notify(unsigned long val, void *v) { return 0; } #else extern int register_memory_notifier(struct notifier_block *nb); extern void unregister_memory_notifier(struct notifier_block *nb); int create_memory_block_devices(unsigned long start, unsigned long size, unsigned long vmemmap_pages, struct memory_group *group); void remove_memory_block_devices(unsigned long start, unsigned long size); extern void memory_dev_init(void); extern int memory_notify(unsigned long val, void *v); extern struct memory_block *find_memory_block(unsigned long section_nr); typedef int (*walk_memory_blocks_func_t)(struct memory_block *, void *); extern int walk_memory_blocks(unsigned long start, unsigned long size, void *arg, walk_memory_blocks_func_t func); extern int for_each_memory_block(void *arg, walk_memory_blocks_func_t func); #define CONFIG_MEM_BLOCK_SIZE (PAGES_PER_SECTION<<PAGE_SHIFT) extern int memory_group_register_static(int nid, unsigned long max_pages); extern int memory_group_register_dynamic(int nid, unsigned long unit_pages); extern int memory_group_unregister(int mgid); struct memory_group *memory_group_find_by_id(int mgid); typedef int (*walk_memory_groups_func_t)(struct memory_group *, void *); int walk_dynamic_memory_groups(int nid, walk_memory_groups_func_t func, struct memory_group *excluded, void *arg); #endif /* CONFIG_MEMORY_HOTPLUG_SPARSE */ #ifdef CONFIG_MEMORY_HOTPLUG #define hotplug_memory_notifier(fn, pri) ({ \ static __meminitdata struct notifier_block fn##_mem_nb =\ { .notifier_call = fn, .priority = pri };\ register_memory_notifier(&fn##_mem_nb); \ }) #define register_hotmemory_notifier(nb) register_memory_notifier(nb) #define unregister_hotmemory_notifier(nb) unregister_memory_notifier(nb) #else static inline int hotplug_memory_notifier(notifier_fn_t fn, int pri) { return 0; } /* These aren't inline functions due to a GCC bug. */ #define register_hotmemory_notifier(nb) ({ (void)(nb); 0; }) #define unregister_hotmemory_notifier(nb) ({ (void)(nb); }) #endif /* * Kernel text modification mutex, used for code patching. Users of this lock * can sleep. */ extern struct mutex text_mutex; #endif /* _LINUX_MEMORY_H_ */ PK ! ���U( ( asn1.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* ASN.1 BER/DER/CER encoding definitions * * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_ASN1_H #define _LINUX_ASN1_H /* Class */ enum asn1_class { ASN1_UNIV = 0, /* Universal */ ASN1_APPL = 1, /* Application */ ASN1_CONT = 2, /* Context */ ASN1_PRIV = 3 /* Private */ }; #define ASN1_CLASS_BITS 0xc0 enum asn1_method { ASN1_PRIM = 0, /* Primitive */ ASN1_CONS = 1 /* Constructed */ }; #define ASN1_CONS_BIT 0x20 /* Tag */ enum asn1_tag { ASN1_EOC = 0, /* End Of Contents or N/A */ ASN1_BOOL = 1, /* Boolean */ ASN1_INT = 2, /* Integer */ ASN1_BTS = 3, /* Bit String */ ASN1_OTS = 4, /* Octet String */ ASN1_NULL = 5, /* Null */ ASN1_OID = 6, /* Object Identifier */ ASN1_ODE = 7, /* Object Description */ ASN1_EXT = 8, /* External */ ASN1_REAL = 9, /* Real float */ ASN1_ENUM = 10, /* Enumerated */ ASN1_EPDV = 11, /* Embedded PDV */ ASN1_UTF8STR = 12, /* UTF8 String */ ASN1_RELOID = 13, /* Relative OID */ /* 14 - Reserved */ /* 15 - Reserved */ ASN1_SEQ = 16, /* Sequence and Sequence of */ ASN1_SET = 17, /* Set and Set of */ ASN1_NUMSTR = 18, /* Numerical String */ ASN1_PRNSTR = 19, /* Printable String */ ASN1_TEXSTR = 20, /* T61 String / Teletext String */ ASN1_VIDSTR = 21, /* Videotex String */ ASN1_IA5STR = 22, /* IA5 String */ ASN1_UNITIM = 23, /* Universal Time */ ASN1_GENTIM = 24, /* General Time */ ASN1_GRASTR = 25, /* Graphic String */ ASN1_VISSTR = 26, /* Visible String */ ASN1_GENSTR = 27, /* General String */ ASN1_UNISTR = 28, /* Universal String */ ASN1_CHRSTR = 29, /* Character String */ ASN1_BMPSTR = 30, /* BMP String */ ASN1_LONG_TAG = 31 /* Long form tag */ }; #define ASN1_INDEFINITE_LENGTH 0x80 #endif /* _LINUX_ASN1_H */ PK ! �k�Y �Y workqueue.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * workqueue.h --- work queue handling for Linux. */ #ifndef _LINUX_WORKQUEUE_H #define _LINUX_WORKQUEUE_H #include <linux/timer.h> #include <linux/linkage.h> #include <linux/bitops.h> #include <linux/lockdep.h> #include <linux/threads.h> #include <linux/atomic.h> #include <linux/cpumask.h> #include <linux/rcupdate.h> struct workqueue_struct; struct work_struct; typedef void (*work_func_t)(struct work_struct *work); void delayed_work_timer_fn(struct timer_list *t); /* * The first word is the work queue pointer and the flags rolled into * one */ #define work_data_bits(work) ((unsigned long *)(&(work)->data)) enum { WORK_STRUCT_PENDING_BIT = 0, /* work item is pending execution */ WORK_STRUCT_INACTIVE_BIT= 1, /* work item is inactive */ WORK_STRUCT_PWQ_BIT = 2, /* data points to pwq */ WORK_STRUCT_LINKED_BIT = 3, /* next work is linked to this one */ #ifdef CONFIG_DEBUG_OBJECTS_WORK WORK_STRUCT_STATIC_BIT = 4, /* static initializer (debugobjects) */ WORK_STRUCT_COLOR_SHIFT = 5, /* color for workqueue flushing */ #else WORK_STRUCT_COLOR_SHIFT = 4, /* color for workqueue flushing */ #endif WORK_STRUCT_COLOR_BITS = 4, WORK_STRUCT_PENDING = 1 << WORK_STRUCT_PENDING_BIT, WORK_STRUCT_INACTIVE = 1 << WORK_STRUCT_INACTIVE_BIT, WORK_STRUCT_PWQ = 1 << WORK_STRUCT_PWQ_BIT, WORK_STRUCT_LINKED = 1 << WORK_STRUCT_LINKED_BIT, #ifdef CONFIG_DEBUG_OBJECTS_WORK WORK_STRUCT_STATIC = 1 << WORK_STRUCT_STATIC_BIT, #else WORK_STRUCT_STATIC = 0, #endif WORK_NR_COLORS = (1 << WORK_STRUCT_COLOR_BITS), /* not bound to any CPU, prefer the local CPU */ WORK_CPU_UNBOUND = NR_CPUS, /* * Reserve 8 bits off of pwq pointer w/ debugobjects turned off. * This makes pwqs aligned to 256 bytes and allows 16 workqueue * flush colors. */ WORK_STRUCT_FLAG_BITS = WORK_STRUCT_COLOR_SHIFT + WORK_STRUCT_COLOR_BITS, /* data contains off-queue information when !WORK_STRUCT_PWQ */ WORK_OFFQ_FLAG_BASE = WORK_STRUCT_COLOR_SHIFT, __WORK_OFFQ_CANCELING = WORK_OFFQ_FLAG_BASE, /* * When a work item is off queue, its high bits point to the last * pool it was on. Cap at 31 bits and use the highest number to * indicate that no pool is associated. */ WORK_OFFQ_FLAG_BITS = 1, WORK_OFFQ_POOL_SHIFT = WORK_OFFQ_FLAG_BASE + WORK_OFFQ_FLAG_BITS, WORK_OFFQ_LEFT = BITS_PER_LONG - WORK_OFFQ_POOL_SHIFT, WORK_OFFQ_POOL_BITS = WORK_OFFQ_LEFT <= 31 ? WORK_OFFQ_LEFT : 31, /* bit mask for work_busy() return values */ WORK_BUSY_PENDING = 1 << 0, WORK_BUSY_RUNNING = 1 << 1, /* maximum string length for set_worker_desc() */ WORKER_DESC_LEN = 24, }; /* Convenience constants - of type 'unsigned long', not 'enum'! */ #define WORK_OFFQ_CANCELING (1ul << __WORK_OFFQ_CANCELING) #define WORK_OFFQ_POOL_NONE ((1ul << WORK_OFFQ_POOL_BITS) - 1) #define WORK_STRUCT_NO_POOL (WORK_OFFQ_POOL_NONE << WORK_OFFQ_POOL_SHIFT) #define WORK_STRUCT_FLAG_MASK ((1ul << WORK_STRUCT_FLAG_BITS) - 1) #define WORK_STRUCT_WQ_DATA_MASK (~WORK_STRUCT_FLAG_MASK) struct work_struct { atomic_long_t data; struct list_head entry; work_func_t func; #ifdef CONFIG_LOCKDEP struct lockdep_map lockdep_map; #endif }; #define WORK_DATA_INIT() ATOMIC_LONG_INIT((unsigned long)WORK_STRUCT_NO_POOL) #define WORK_DATA_STATIC_INIT() \ ATOMIC_LONG_INIT((unsigned long)(WORK_STRUCT_NO_POOL | WORK_STRUCT_STATIC)) struct delayed_work { struct work_struct work; struct timer_list timer; /* target workqueue and CPU ->timer uses to queue ->work */ struct workqueue_struct *wq; int cpu; }; struct rcu_work { struct work_struct work; struct rcu_head rcu; /* target workqueue ->rcu uses to queue ->work */ struct workqueue_struct *wq; }; /** * struct workqueue_attrs - A struct for workqueue attributes. * * This can be used to change attributes of an unbound workqueue. */ struct workqueue_attrs { /** * @nice: nice level */ int nice; /** * @cpumask: allowed CPUs */ cpumask_var_t cpumask; /** * @no_numa: disable NUMA affinity * * Unlike other fields, ``no_numa`` isn't a property of a worker_pool. It * only modifies how :c:func:`apply_workqueue_attrs` select pools and thus * doesn't participate in pool hash calculations or equality comparisons. */ bool no_numa; }; static inline struct delayed_work *to_delayed_work(struct work_struct *work) { return container_of(work, struct delayed_work, work); } static inline struct rcu_work *to_rcu_work(struct work_struct *work) { return container_of(work, struct rcu_work, work); } struct execute_work { struct work_struct work; }; #ifdef CONFIG_LOCKDEP /* * NB: because we have to copy the lockdep_map, setting _key * here is required, otherwise it could get initialised to the * copy of the lockdep_map! */ #define __WORK_INIT_LOCKDEP_MAP(n, k) \ .lockdep_map = STATIC_LOCKDEP_MAP_INIT(n, k), #else #define __WORK_INIT_LOCKDEP_MAP(n, k) #endif #define __WORK_INITIALIZER(n, f) { \ .data = WORK_DATA_STATIC_INIT(), \ .entry = { &(n).entry, &(n).entry }, \ .func = (f), \ __WORK_INIT_LOCKDEP_MAP(#n, &(n)) \ } #define __DELAYED_WORK_INITIALIZER(n, f, tflags) { \ .work = __WORK_INITIALIZER((n).work, (f)), \ .timer = __TIMER_INITIALIZER(delayed_work_timer_fn,\ (tflags) | TIMER_IRQSAFE), \ } #define DECLARE_WORK(n, f) \ struct work_struct n = __WORK_INITIALIZER(n, f) #define DECLARE_DELAYED_WORK(n, f) \ struct delayed_work n = __DELAYED_WORK_INITIALIZER(n, f, 0) #define DECLARE_DEFERRABLE_WORK(n, f) \ struct delayed_work n = __DELAYED_WORK_INITIALIZER(n, f, TIMER_DEFERRABLE) #ifdef CONFIG_DEBUG_OBJECTS_WORK extern void __init_work(struct work_struct *work, int onstack); extern void destroy_work_on_stack(struct work_struct *work); extern void destroy_delayed_work_on_stack(struct delayed_work *work); static inline unsigned int work_static(struct work_struct *work) { return *work_data_bits(work) & WORK_STRUCT_STATIC; } #else static inline void __init_work(struct work_struct *work, int onstack) { } static inline void destroy_work_on_stack(struct work_struct *work) { } static inline void destroy_delayed_work_on_stack(struct delayed_work *work) { } static inline unsigned int work_static(struct work_struct *work) { return 0; } #endif /* * initialize all of a work item in one go * * NOTE! No point in using "atomic_long_set()": using a direct * assignment of the work data initializer allows the compiler * to generate better code. */ #ifdef CONFIG_LOCKDEP #define __INIT_WORK_KEY(_work, _func, _onstack, _key) \ do { \ __init_work((_work), _onstack); \ (_work)->data = (atomic_long_t) WORK_DATA_INIT(); \ lockdep_init_map(&(_work)->lockdep_map, "(work_completion)"#_work, (_key), 0); \ INIT_LIST_HEAD(&(_work)->entry); \ (_work)->func = (_func); \ } while (0) #else #define __INIT_WORK_KEY(_work, _func, _onstack, _key) \ do { \ __init_work((_work), _onstack); \ (_work)->data = (atomic_long_t) WORK_DATA_INIT(); \ INIT_LIST_HEAD(&(_work)->entry); \ (_work)->func = (_func); \ } while (0) #endif #define __INIT_WORK(_work, _func, _onstack) \ do { \ static __maybe_unused struct lock_class_key __key; \ \ __INIT_WORK_KEY(_work, _func, _onstack, &__key); \ } while (0) #define INIT_WORK(_work, _func) \ __INIT_WORK((_work), (_func), 0) #define INIT_WORK_ONSTACK(_work, _func) \ __INIT_WORK((_work), (_func), 1) #define INIT_WORK_ONSTACK_KEY(_work, _func, _key) \ __INIT_WORK_KEY((_work), (_func), 1, _key) #define __INIT_DELAYED_WORK(_work, _func, _tflags) \ do { \ INIT_WORK(&(_work)->work, (_func)); \ __init_timer(&(_work)->timer, \ delayed_work_timer_fn, \ (_tflags) | TIMER_IRQSAFE); \ } while (0) #define __INIT_DELAYED_WORK_ONSTACK(_work, _func, _tflags) \ do { \ INIT_WORK_ONSTACK(&(_work)->work, (_func)); \ __init_timer_on_stack(&(_work)->timer, \ delayed_work_timer_fn, \ (_tflags) | TIMER_IRQSAFE); \ } while (0) #define INIT_DELAYED_WORK(_work, _func) \ __INIT_DELAYED_WORK(_work, _func, 0) #define INIT_DELAYED_WORK_ONSTACK(_work, _func) \ __INIT_DELAYED_WORK_ONSTACK(_work, _func, 0) #define INIT_DEFERRABLE_WORK(_work, _func) \ __INIT_DELAYED_WORK(_work, _func, TIMER_DEFERRABLE) #define INIT_DEFERRABLE_WORK_ONSTACK(_work, _func) \ __INIT_DELAYED_WORK_ONSTACK(_work, _func, TIMER_DEFERRABLE) #define INIT_RCU_WORK(_work, _func) \ INIT_WORK(&(_work)->work, (_func)) #define INIT_RCU_WORK_ONSTACK(_work, _func) \ INIT_WORK_ONSTACK(&(_work)->work, (_func)) /** * work_pending - Find out whether a work item is currently pending * @work: The work item in question */ #define work_pending(work) \ test_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work)) /** * delayed_work_pending - Find out whether a delayable work item is currently * pending * @w: The work item in question */ #define delayed_work_pending(w) \ work_pending(&(w)->work) /* * Workqueue flags and constants. For details, please refer to * Documentation/core-api/workqueue.rst. */ enum { WQ_UNBOUND = 1 << 1, /* not bound to any cpu */ WQ_FREEZABLE = 1 << 2, /* freeze during suspend */ WQ_MEM_RECLAIM = 1 << 3, /* may be used for memory reclaim */ WQ_HIGHPRI = 1 << 4, /* high priority */ WQ_CPU_INTENSIVE = 1 << 5, /* cpu intensive workqueue */ WQ_SYSFS = 1 << 6, /* visible in sysfs, see workqueue_sysfs_register() */ /* * Per-cpu workqueues are generally preferred because they tend to * show better performance thanks to cache locality. Per-cpu * workqueues exclude the scheduler from choosing the CPU to * execute the worker threads, which has an unfortunate side effect * of increasing power consumption. * * The scheduler considers a CPU idle if it doesn't have any task * to execute and tries to keep idle cores idle to conserve power; * however, for example, a per-cpu work item scheduled from an * interrupt handler on an idle CPU will force the scheduler to * execute the work item on that CPU breaking the idleness, which in * turn may lead to more scheduling choices which are sub-optimal * in terms of power consumption. * * Workqueues marked with WQ_POWER_EFFICIENT are per-cpu by default * but become unbound if workqueue.power_efficient kernel param is * specified. Per-cpu workqueues which are identified to * contribute significantly to power-consumption are identified and * marked with this flag and enabling the power_efficient mode * leads to noticeable power saving at the cost of small * performance disadvantage. * * http://thread.gmane.org/gmane.linux.kernel/1480396 */ WQ_POWER_EFFICIENT = 1 << 7, __WQ_DRAINING = 1 << 16, /* internal: workqueue is draining */ __WQ_ORDERED = 1 << 17, /* internal: workqueue is ordered */ __WQ_LEGACY = 1 << 18, /* internal: create*_workqueue() */ __WQ_ORDERED_EXPLICIT = 1 << 19, /* internal: alloc_ordered_workqueue() */ WQ_MAX_ACTIVE = 512, /* I like 512, better ideas? */ WQ_MAX_UNBOUND_PER_CPU = 4, /* 4 * #cpus for unbound wq */ WQ_DFL_ACTIVE = WQ_MAX_ACTIVE / 2, }; /* unbound wq's aren't per-cpu, scale max_active according to #cpus */ #define WQ_UNBOUND_MAX_ACTIVE \ max_t(int, WQ_MAX_ACTIVE, num_possible_cpus() * WQ_MAX_UNBOUND_PER_CPU) /* * System-wide workqueues which are always present. * * system_wq is the one used by schedule[_delayed]_work[_on](). * Multi-CPU multi-threaded. There are users which expect relatively * short queue flush time. Don't queue works which can run for too * long. * * system_highpri_wq is similar to system_wq but for work items which * require WQ_HIGHPRI. * * system_long_wq is similar to system_wq but may host long running * works. Queue flushing might take relatively long. * * system_unbound_wq is unbound workqueue. Workers are not bound to * any specific CPU, not concurrency managed, and all queued works are * executed immediately as long as max_active limit is not reached and * resources are available. * * system_freezable_wq is equivalent to system_wq except that it's * freezable. * * *_power_efficient_wq are inclined towards saving power and converted * into WQ_UNBOUND variants if 'wq_power_efficient' is enabled; otherwise, * they are same as their non-power-efficient counterparts - e.g. * system_power_efficient_wq is identical to system_wq if * 'wq_power_efficient' is disabled. See WQ_POWER_EFFICIENT for more info. */ extern struct workqueue_struct *system_wq; extern struct workqueue_struct *system_highpri_wq; extern struct workqueue_struct *system_long_wq; extern struct workqueue_struct *system_unbound_wq; extern struct workqueue_struct *system_freezable_wq; extern struct workqueue_struct *system_power_efficient_wq; extern struct workqueue_struct *system_freezable_power_efficient_wq; /** * alloc_workqueue - allocate a workqueue * @fmt: printf format for the name of the workqueue * @flags: WQ_* flags * @max_active: max in-flight work items, 0 for default * remaining args: args for @fmt * * Allocate a workqueue with the specified parameters. For detailed * information on WQ_* flags, please refer to * Documentation/core-api/workqueue.rst. * * RETURNS: * Pointer to the allocated workqueue on success, %NULL on failure. */ __printf(1, 4) struct workqueue_struct * alloc_workqueue(const char *fmt, unsigned int flags, int max_active, ...); /** * alloc_ordered_workqueue - allocate an ordered workqueue * @fmt: printf format for the name of the workqueue * @flags: WQ_* flags (only WQ_FREEZABLE and WQ_MEM_RECLAIM are meaningful) * @args...: args for @fmt * * Allocate an ordered workqueue. An ordered workqueue executes at * most one work item at any given time in the queued order. They are * implemented as unbound workqueues with @max_active of one. * * RETURNS: * Pointer to the allocated workqueue on success, %NULL on failure. */ #define alloc_ordered_workqueue(fmt, flags, args...) \ alloc_workqueue(fmt, WQ_UNBOUND | __WQ_ORDERED | \ __WQ_ORDERED_EXPLICIT | (flags), 1, ##args) #define create_workqueue(name) \ alloc_workqueue("%s", __WQ_LEGACY | WQ_MEM_RECLAIM, 1, (name)) #define create_freezable_workqueue(name) \ alloc_workqueue("%s", __WQ_LEGACY | WQ_FREEZABLE | WQ_UNBOUND | \ WQ_MEM_RECLAIM, 1, (name)) #define create_singlethread_workqueue(name) \ alloc_ordered_workqueue("%s", __WQ_LEGACY | WQ_MEM_RECLAIM, name) extern void destroy_workqueue(struct workqueue_struct *wq); struct workqueue_attrs *alloc_workqueue_attrs(void); void free_workqueue_attrs(struct workqueue_attrs *attrs); int apply_workqueue_attrs(struct workqueue_struct *wq, const struct workqueue_attrs *attrs); int workqueue_set_unbound_cpumask(cpumask_var_t cpumask); extern bool queue_work_on(int cpu, struct workqueue_struct *wq, struct work_struct *work); extern bool queue_work_node(int node, struct workqueue_struct *wq, struct work_struct *work); extern bool queue_delayed_work_on(int cpu, struct workqueue_struct *wq, struct delayed_work *work, unsigned long delay); extern bool mod_delayed_work_on(int cpu, struct workqueue_struct *wq, struct delayed_work *dwork, unsigned long delay); extern bool queue_rcu_work(struct workqueue_struct *wq, struct rcu_work *rwork); extern void flush_workqueue(struct workqueue_struct *wq); extern void drain_workqueue(struct workqueue_struct *wq); extern int schedule_on_each_cpu(work_func_t func); int execute_in_process_context(work_func_t fn, struct execute_work *); extern bool flush_work(struct work_struct *work); extern bool cancel_work(struct work_struct *work); extern bool cancel_work_sync(struct work_struct *work); extern bool flush_delayed_work(struct delayed_work *dwork); extern bool cancel_delayed_work(struct delayed_work *dwork); extern bool cancel_delayed_work_sync(struct delayed_work *dwork); extern bool flush_rcu_work(struct rcu_work *rwork); extern void workqueue_set_max_active(struct workqueue_struct *wq, int max_active); extern struct work_struct *current_work(void); extern bool current_is_workqueue_rescuer(void); extern bool workqueue_congested(int cpu, struct workqueue_struct *wq); extern unsigned int work_busy(struct work_struct *work); extern __printf(1, 2) void set_worker_desc(const char *fmt, ...); extern void print_worker_info(const char *log_lvl, struct task_struct *task); extern void show_all_workqueues(void); extern void show_one_workqueue(struct workqueue_struct *wq); extern void wq_worker_comm(char *buf, size_t size, struct task_struct *task); /** * queue_work - queue work on a workqueue * @wq: workqueue to use * @work: work to queue * * Returns %false if @work was already on a queue, %true otherwise. * * We queue the work to the CPU on which it was submitted, but if the CPU dies * it can be processed by another CPU. * * Memory-ordering properties: If it returns %true, guarantees that all stores * preceding the call to queue_work() in the program order will be visible from * the CPU which will execute @work by the time such work executes, e.g., * * { x is initially 0 } * * CPU0 CPU1 * * WRITE_ONCE(x, 1); [ @work is being executed ] * r0 = queue_work(wq, work); r1 = READ_ONCE(x); * * Forbids: r0 == true && r1 == 0 */ static inline bool queue_work(struct workqueue_struct *wq, struct work_struct *work) { return queue_work_on(WORK_CPU_UNBOUND, wq, work); } /** * queue_delayed_work - queue work on a workqueue after delay * @wq: workqueue to use * @dwork: delayable work to queue * @delay: number of jiffies to wait before queueing * * Equivalent to queue_delayed_work_on() but tries to use the local CPU. */ static inline bool queue_delayed_work(struct workqueue_struct *wq, struct delayed_work *dwork, unsigned long delay) { return queue_delayed_work_on(WORK_CPU_UNBOUND, wq, dwork, delay); } /** * mod_delayed_work - modify delay of or queue a delayed work * @wq: workqueue to use * @dwork: work to queue * @delay: number of jiffies to wait before queueing * * mod_delayed_work_on() on local CPU. */ static inline bool mod_delayed_work(struct workqueue_struct *wq, struct delayed_work *dwork, unsigned long delay) { return mod_delayed_work_on(WORK_CPU_UNBOUND, wq, dwork, delay); } /** * schedule_work_on - put work task on a specific cpu * @cpu: cpu to put the work task on * @work: job to be done * * This puts a job on a specific cpu */ static inline bool schedule_work_on(int cpu, struct work_struct *work) { return queue_work_on(cpu, system_wq, work); } /** * schedule_work - put work task in global workqueue * @work: job to be done * * Returns %false if @work was already on the kernel-global workqueue and * %true otherwise. * * This puts a job in the kernel-global workqueue if it was not already * queued and leaves it in the same position on the kernel-global * workqueue otherwise. * * Shares the same memory-ordering properties of queue_work(), cf. the * DocBook header of queue_work(). */ static inline bool schedule_work(struct work_struct *work) { return queue_work(system_wq, work); } /** * flush_scheduled_work - ensure that any scheduled work has run to completion. * * Forces execution of the kernel-global workqueue and blocks until its * completion. * * Think twice before calling this function! It's very easy to get into * trouble if you don't take great care. Either of the following situations * will lead to deadlock: * * One of the work items currently on the workqueue needs to acquire * a lock held by your code or its caller. * * Your code is running in the context of a work routine. * * They will be detected by lockdep when they occur, but the first might not * occur very often. It depends on what work items are on the workqueue and * what locks they need, which you have no control over. * * In most situations flushing the entire workqueue is overkill; you merely * need to know that a particular work item isn't queued and isn't running. * In such cases you should use cancel_delayed_work_sync() or * cancel_work_sync() instead. */ static inline void flush_scheduled_work(void) { flush_workqueue(system_wq); } /** * schedule_delayed_work_on - queue work in global workqueue on CPU after delay * @cpu: cpu to use * @dwork: job to be done * @delay: number of jiffies to wait * * After waiting for a given time this puts a job in the kernel-global * workqueue on the specified CPU. */ static inline bool schedule_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay) { return queue_delayed_work_on(cpu, system_wq, dwork, delay); } /** * schedule_delayed_work - put work task in global workqueue after delay * @dwork: job to be done * @delay: number of jiffies to wait or 0 for immediate execution * * After waiting for a given time this puts a job in the kernel-global * workqueue. */ static inline bool schedule_delayed_work(struct delayed_work *dwork, unsigned long delay) { return queue_delayed_work(system_wq, dwork, delay); } #ifndef CONFIG_SMP static inline long work_on_cpu(int cpu, long (*fn)(void *), void *arg) { return fn(arg); } static inline long work_on_cpu_safe(int cpu, long (*fn)(void *), void *arg) { return fn(arg); } #else long work_on_cpu_key(int cpu, long (*fn)(void *), void *arg, struct lock_class_key *key); /* * A new key is defined for each caller to make sure the work * associated with the function doesn't share its locking class. */ #define work_on_cpu(_cpu, _fn, _arg) \ ({ \ static struct lock_class_key __key; \ \ work_on_cpu_key(_cpu, _fn, _arg, &__key); \ }) long work_on_cpu_safe_key(int cpu, long (*fn)(void *), void *arg, struct lock_class_key *key); /* * A new key is defined for each caller to make sure the work * associated with the function doesn't share its locking class. */ #define work_on_cpu_safe(_cpu, _fn, _arg) \ ({ \ static struct lock_class_key __key; \ \ work_on_cpu_safe_key(_cpu, _fn, _arg, &__key); \ }) #endif /* CONFIG_SMP */ #ifdef CONFIG_FREEZER extern void freeze_workqueues_begin(void); extern bool freeze_workqueues_busy(void); extern void thaw_workqueues(void); #endif /* CONFIG_FREEZER */ #ifdef CONFIG_SYSFS int workqueue_sysfs_register(struct workqueue_struct *wq); #else /* CONFIG_SYSFS */ static inline int workqueue_sysfs_register(struct workqueue_struct *wq) { return 0; } #endif /* CONFIG_SYSFS */ #ifdef CONFIG_WQ_WATCHDOG void wq_watchdog_touch(int cpu); #else /* CONFIG_WQ_WATCHDOG */ static inline void wq_watchdog_touch(int cpu) { } #endif /* CONFIG_WQ_WATCHDOG */ #ifdef CONFIG_SMP int workqueue_prepare_cpu(unsigned int cpu); int workqueue_online_cpu(unsigned int cpu); int workqueue_offline_cpu(unsigned int cpu); #endif void __init workqueue_init_early(void); void __init workqueue_init(void); #endif PK ! �\��y y pid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PID_H #define _LINUX_PID_H #include <linux/rculist.h> #include <linux/wait.h> #include <linux/refcount.h> enum pid_type { PIDTYPE_PID, PIDTYPE_TGID, PIDTYPE_PGID, PIDTYPE_SID, PIDTYPE_MAX, }; /* * What is struct pid? * * A struct pid is the kernel's internal notion of a process identifier. * It refers to individual tasks, process groups, and sessions. While * there are processes attached to it the struct pid lives in a hash * table, so it and then the processes that it refers to can be found * quickly from the numeric pid value. The attached processes may be * quickly accessed by following pointers from struct pid. * * Storing pid_t values in the kernel and referring to them later has a * problem. The process originally with that pid may have exited and the * pid allocator wrapped, and another process could have come along * and been assigned that pid. * * Referring to user space processes by holding a reference to struct * task_struct has a problem. When the user space process exits * the now useless task_struct is still kept. A task_struct plus a * stack consumes around 10K of low kernel memory. More precisely * this is THREAD_SIZE + sizeof(struct task_struct). By comparison * a struct pid is about 64 bytes. * * Holding a reference to struct pid solves both of these problems. * It is small so holding a reference does not consume a lot of * resources, and since a new struct pid is allocated when the numeric pid * value is reused (when pids wrap around) we don't mistakenly refer to new * processes. */ /* * struct upid is used to get the id of the struct pid, as it is * seen in particular namespace. Later the struct pid is found with * find_pid_ns() using the int nr and struct pid_namespace *ns. */ struct upid { int nr; struct pid_namespace *ns; }; struct pid { refcount_t count; unsigned int level; spinlock_t lock; /* lists of tasks that use this pid */ struct hlist_head tasks[PIDTYPE_MAX]; struct hlist_head inodes; /* wait queue for pidfd notifications */ wait_queue_head_t wait_pidfd; struct rcu_head rcu; struct upid numbers[1]; }; extern struct pid init_struct_pid; extern const struct file_operations pidfd_fops; struct file; extern struct pid *pidfd_pid(const struct file *file); struct pid *pidfd_get_pid(unsigned int fd, unsigned int *flags); int pidfd_create(struct pid *pid, unsigned int flags); int pidfd_prepare(struct pid *pid, unsigned int flags, struct file **ret); static inline struct pid *get_pid(struct pid *pid) { if (pid) refcount_inc(&pid->count); return pid; } extern void put_pid(struct pid *pid); extern struct task_struct *pid_task(struct pid *pid, enum pid_type); static inline bool pid_has_task(struct pid *pid, enum pid_type type) { return !hlist_empty(&pid->tasks[type]); } extern struct task_struct *get_pid_task(struct pid *pid, enum pid_type); extern struct pid *get_task_pid(struct task_struct *task, enum pid_type type); /* * these helpers must be called with the tasklist_lock write-held. */ extern void attach_pid(struct task_struct *task, enum pid_type); extern void detach_pid(struct task_struct *task, enum pid_type); extern void change_pid(struct task_struct *task, enum pid_type, struct pid *pid); extern void exchange_tids(struct task_struct *task, struct task_struct *old); extern void transfer_pid(struct task_struct *old, struct task_struct *new, enum pid_type); struct pid_namespace; extern struct pid_namespace init_pid_ns; extern int pid_max; extern int pid_max_min, pid_max_max; /* * look up a PID in the hash table. Must be called with the tasklist_lock * or rcu_read_lock() held. * * find_pid_ns() finds the pid in the namespace specified * find_vpid() finds the pid by its virtual id, i.e. in the current namespace * * see also find_task_by_vpid() set in include/linux/sched.h */ extern struct pid *find_pid_ns(int nr, struct pid_namespace *ns); extern struct pid *find_vpid(int nr); /* * Lookup a PID in the hash table, and return with it's count elevated. */ extern struct pid *find_get_pid(int nr); extern struct pid *find_ge_pid(int nr, struct pid_namespace *); extern struct pid *alloc_pid(struct pid_namespace *ns, pid_t *set_tid, size_t set_tid_size); extern void free_pid(struct pid *pid); extern void disable_pid_allocation(struct pid_namespace *ns); /* * ns_of_pid() returns the pid namespace in which the specified pid was * allocated. * * NOTE: * ns_of_pid() is expected to be called for a process (task) that has * an attached 'struct pid' (see attach_pid(), detach_pid()) i.e @pid * is expected to be non-NULL. If @pid is NULL, caller should handle * the resulting NULL pid-ns. */ static inline struct pid_namespace *ns_of_pid(struct pid *pid) { struct pid_namespace *ns = NULL; if (pid) ns = pid->numbers[pid->level].ns; return ns; } /* * is_child_reaper returns true if the pid is the init process * of the current namespace. As this one could be checked before * pid_ns->child_reaper is assigned in copy_process, we check * with the pid number. */ static inline bool is_child_reaper(struct pid *pid) { return pid->numbers[pid->level].nr == 1; } /* * the helpers to get the pid's id seen from different namespaces * * pid_nr() : global id, i.e. the id seen from the init namespace; * pid_vnr() : virtual id, i.e. the id seen from the pid namespace of * current. * pid_nr_ns() : id seen from the ns specified. * * see also task_xid_nr() etc in include/linux/sched.h */ static inline pid_t pid_nr(struct pid *pid) { pid_t nr = 0; if (pid) nr = pid->numbers[0].nr; return nr; } pid_t pid_nr_ns(struct pid *pid, struct pid_namespace *ns); pid_t pid_vnr(struct pid *pid); #define do_each_pid_task(pid, type, task) \ do { \ if ((pid) != NULL) \ hlist_for_each_entry_rcu((task), \ &(pid)->tasks[type], pid_links[type]) { /* * Both old and new leaders may be attached to * the same pid in the middle of de_thread(). */ #define while_each_pid_task(pid, type, task) \ if (type == PIDTYPE_PID) \ break; \ } \ } while (0) #define do_each_pid_thread(pid, type, task) \ do_each_pid_task(pid, type, task) { \ struct task_struct *tg___ = task; \ for_each_thread(tg___, task) { #define while_each_pid_thread(pid, type, task) \ } \ task = tg___; \ } while_each_pid_task(pid, type, task) #endif /* _LINUX_PID_H */ PK ! ;���z z pagemap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PAGEMAP_H #define _LINUX_PAGEMAP_H /* * Copyright 1995 Linus Torvalds */ #include <linux/mm.h> #include <linux/fs.h> #include <linux/list.h> #include <linux/highmem.h> #include <linux/compiler.h> #include <linux/uaccess.h> #include <linux/gfp.h> #include <linux/bitops.h> #include <linux/hardirq.h> /* for in_interrupt() */ #include <linux/hugetlb_inline.h> struct pagevec; static inline bool mapping_empty(struct address_space *mapping) { return xa_empty(&mapping->i_pages); } /* * Bits in mapping->flags. */ enum mapping_flags { AS_EIO = 0, /* IO error on async write */ AS_ENOSPC = 1, /* ENOSPC on async write */ AS_MM_ALL_LOCKS = 2, /* under mm_take_all_locks() */ AS_UNEVICTABLE = 3, /* e.g., ramdisk, SHM_LOCK */ AS_EXITING = 4, /* final truncate in progress */ /* writeback related tags are not used */ AS_NO_WRITEBACK_TAGS = 5, AS_THP_SUPPORT = 6, /* THPs supported */ }; /** * mapping_set_error - record a writeback error in the address_space * @mapping: the mapping in which an error should be set * @error: the error to set in the mapping * * When writeback fails in some way, we must record that error so that * userspace can be informed when fsync and the like are called. We endeavor * to report errors on any file that was open at the time of the error. Some * internal callers also need to know when writeback errors have occurred. * * When a writeback error occurs, most filesystems will want to call * mapping_set_error to record the error in the mapping so that it can be * reported when the application calls fsync(2). */ static inline void mapping_set_error(struct address_space *mapping, int error) { if (likely(!error)) return; /* Record in wb_err for checkers using errseq_t based tracking */ __filemap_set_wb_err(mapping, error); /* Record it in superblock */ if (mapping->host) errseq_set(&mapping->host->i_sb->s_wb_err, error); /* Record it in flags for now, for legacy callers */ if (error == -ENOSPC) set_bit(AS_ENOSPC, &mapping->flags); else set_bit(AS_EIO, &mapping->flags); } static inline void mapping_set_unevictable(struct address_space *mapping) { set_bit(AS_UNEVICTABLE, &mapping->flags); } static inline void mapping_clear_unevictable(struct address_space *mapping) { clear_bit(AS_UNEVICTABLE, &mapping->flags); } static inline bool mapping_unevictable(struct address_space *mapping) { return mapping && test_bit(AS_UNEVICTABLE, &mapping->flags); } static inline void mapping_set_exiting(struct address_space *mapping) { set_bit(AS_EXITING, &mapping->flags); } static inline int mapping_exiting(struct address_space *mapping) { return test_bit(AS_EXITING, &mapping->flags); } static inline void mapping_set_no_writeback_tags(struct address_space *mapping) { set_bit(AS_NO_WRITEBACK_TAGS, &mapping->flags); } static inline int mapping_use_writeback_tags(struct address_space *mapping) { return !test_bit(AS_NO_WRITEBACK_TAGS, &mapping->flags); } static inline gfp_t mapping_gfp_mask(struct address_space * mapping) { return mapping->gfp_mask; } /* Restricts the given gfp_mask to what the mapping allows. */ static inline gfp_t mapping_gfp_constraint(struct address_space *mapping, gfp_t gfp_mask) { return mapping_gfp_mask(mapping) & gfp_mask; } /* * This is non-atomic. Only to be used before the mapping is activated. * Probably needs a barrier... */ static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask) { m->gfp_mask = mask; } static inline bool mapping_thp_support(struct address_space *mapping) { return test_bit(AS_THP_SUPPORT, &mapping->flags); } static inline int filemap_nr_thps(struct address_space *mapping) { #ifdef CONFIG_READ_ONLY_THP_FOR_FS return atomic_read(&mapping->nr_thps); #else return 0; #endif } static inline void filemap_nr_thps_inc(struct address_space *mapping) { #ifdef CONFIG_READ_ONLY_THP_FOR_FS if (!mapping_thp_support(mapping)) atomic_inc(&mapping->nr_thps); #else WARN_ON_ONCE(1); #endif } static inline void filemap_nr_thps_dec(struct address_space *mapping) { #ifdef CONFIG_READ_ONLY_THP_FOR_FS if (!mapping_thp_support(mapping)) atomic_dec(&mapping->nr_thps); #else WARN_ON_ONCE(1); #endif } void release_pages(struct page **pages, int nr); /* * For file cache pages, return the address_space, otherwise return NULL */ static inline struct address_space *page_mapping_file(struct page *page) { if (unlikely(PageSwapCache(page))) return NULL; return page_mapping(page); } /* * speculatively take a reference to a page. * If the page is free (_refcount == 0), then _refcount is untouched, and 0 * is returned. Otherwise, _refcount is incremented by 1 and 1 is returned. * * This function must be called inside the same rcu_read_lock() section as has * been used to lookup the page in the pagecache radix-tree (or page table): * this allows allocators to use a synchronize_rcu() to stabilize _refcount. * * Unless an RCU grace period has passed, the count of all pages coming out * of the allocator must be considered unstable. page_count may return higher * than expected, and put_page must be able to do the right thing when the * page has been finished with, no matter what it is subsequently allocated * for (because put_page is what is used here to drop an invalid speculative * reference). * * This is the interesting part of the lockless pagecache (and lockless * get_user_pages) locking protocol, where the lookup-side (eg. find_get_page) * has the following pattern: * 1. find page in radix tree * 2. conditionally increment refcount * 3. check the page is still in pagecache (if no, goto 1) * * Remove-side that cares about stability of _refcount (eg. reclaim) has the * following (with the i_pages lock held): * A. atomically check refcount is correct and set it to 0 (atomic_cmpxchg) * B. remove page from pagecache * C. free the page * * There are 2 critical interleavings that matter: * - 2 runs before A: in this case, A sees elevated refcount and bails out * - A runs before 2: in this case, 2 sees zero refcount and retries; * subsequently, B will complete and 1 will find no page, causing the * lookup to return NULL. * * It is possible that between 1 and 2, the page is removed then the exact same * page is inserted into the same position in pagecache. That's OK: the * old find_get_page using a lock could equally have run before or after * such a re-insertion, depending on order that locks are granted. * * Lookups racing against pagecache insertion isn't a big problem: either 1 * will find the page or it will not. Likewise, the old find_get_page could run * either before the insertion or afterwards, depending on timing. */ static inline int __page_cache_add_speculative(struct page *page, int count) { #ifdef CONFIG_TINY_RCU # ifdef CONFIG_PREEMPT_COUNT VM_BUG_ON(!in_atomic() && !irqs_disabled()); # endif /* * Preempt must be disabled here - we rely on rcu_read_lock doing * this for us. * * Pagecache won't be truncated from interrupt context, so if we have * found a page in the radix tree here, we have pinned its refcount by * disabling preempt, and hence no need for the "speculative get" that * SMP requires. */ VM_BUG_ON_PAGE(page_count(page) == 0, page); page_ref_add(page, count); #else if (unlikely(!page_ref_add_unless(page, count, 0))) { /* * Either the page has been freed, or will be freed. * In either case, retry here and the caller should * do the right thing (see comments above). */ return 0; } #endif VM_BUG_ON_PAGE(PageTail(page), page); return 1; } static inline int page_cache_get_speculative(struct page *page) { return __page_cache_add_speculative(page, 1); } static inline int page_cache_add_speculative(struct page *page, int count) { return __page_cache_add_speculative(page, count); } /** * attach_page_private - Attach private data to a page. * @page: Page to attach data to. * @data: Data to attach to page. * * Attaching private data to a page increments the page's reference count. * The data must be detached before the page will be freed. */ static inline void attach_page_private(struct page *page, void *data) { get_page(page); set_page_private(page, (unsigned long)data); SetPagePrivate(page); } /** * detach_page_private - Detach private data from a page. * @page: Page to detach data from. * * Removes the data that was previously attached to the page and decrements * the refcount on the page. * * Return: Data that was attached to the page. */ static inline void *detach_page_private(struct page *page) { void *data = (void *)page_private(page); if (!PagePrivate(page)) return NULL; ClearPagePrivate(page); set_page_private(page, 0); put_page(page); return data; } #ifdef CONFIG_NUMA extern struct page *__page_cache_alloc(gfp_t gfp); #else static inline struct page *__page_cache_alloc(gfp_t gfp) { return alloc_pages(gfp, 0); } #endif static inline struct page *page_cache_alloc(struct address_space *x) { return __page_cache_alloc(mapping_gfp_mask(x)); } static inline gfp_t readahead_gfp_mask(struct address_space *x) { return mapping_gfp_mask(x) | __GFP_NORETRY | __GFP_NOWARN; } typedef int filler_t(void *, struct page *); pgoff_t page_cache_next_miss(struct address_space *mapping, pgoff_t index, unsigned long max_scan); pgoff_t page_cache_prev_miss(struct address_space *mapping, pgoff_t index, unsigned long max_scan); #define FGP_ACCESSED 0x00000001 #define FGP_LOCK 0x00000002 #define FGP_CREAT 0x00000004 #define FGP_WRITE 0x00000008 #define FGP_NOFS 0x00000010 #define FGP_NOWAIT 0x00000020 #define FGP_FOR_MMAP 0x00000040 #define FGP_HEAD 0x00000080 #define FGP_ENTRY 0x00000100 struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, int fgp_flags, gfp_t cache_gfp_mask); /** * find_get_page - find and get a page reference * @mapping: the address_space to search * @offset: the page index * * Looks up the page cache slot at @mapping & @offset. If there is a * page cache page, it is returned with an increased refcount. * * Otherwise, %NULL is returned. */ static inline struct page *find_get_page(struct address_space *mapping, pgoff_t offset) { return pagecache_get_page(mapping, offset, 0, 0); } static inline struct page *find_get_page_flags(struct address_space *mapping, pgoff_t offset, int fgp_flags) { return pagecache_get_page(mapping, offset, fgp_flags, 0); } /** * find_lock_page - locate, pin and lock a pagecache page * @mapping: the address_space to search * @index: the page index * * Looks up the page cache entry at @mapping & @index. If there is a * page cache page, it is returned locked and with an increased * refcount. * * Context: May sleep. * Return: A struct page or %NULL if there is no page in the cache for this * index. */ static inline struct page *find_lock_page(struct address_space *mapping, pgoff_t index) { return pagecache_get_page(mapping, index, FGP_LOCK, 0); } /** * find_lock_head - Locate, pin and lock a pagecache page. * @mapping: The address_space to search. * @index: The page index. * * Looks up the page cache entry at @mapping & @index. If there is a * page cache page, its head page is returned locked and with an increased * refcount. * * Context: May sleep. * Return: A struct page which is !PageTail, or %NULL if there is no page * in the cache for this index. */ static inline struct page *find_lock_head(struct address_space *mapping, pgoff_t index) { return pagecache_get_page(mapping, index, FGP_LOCK | FGP_HEAD, 0); } /** * find_or_create_page - locate or add a pagecache page * @mapping: the page's address_space * @index: the page's index into the mapping * @gfp_mask: page allocation mode * * Looks up the page cache slot at @mapping & @offset. If there is a * page cache page, it is returned locked and with an increased * refcount. * * If the page is not present, a new page is allocated using @gfp_mask * and added to the page cache and the VM's LRU list. The page is * returned locked and with an increased refcount. * * On memory exhaustion, %NULL is returned. * * find_or_create_page() may sleep, even if @gfp_flags specifies an * atomic allocation! */ static inline struct page *find_or_create_page(struct address_space *mapping, pgoff_t index, gfp_t gfp_mask) { return pagecache_get_page(mapping, index, FGP_LOCK|FGP_ACCESSED|FGP_CREAT, gfp_mask); } /** * grab_cache_page_nowait - returns locked page at given index in given cache * @mapping: target address_space * @index: the page index * * Same as grab_cache_page(), but do not wait if the page is unavailable. * This is intended for speculative data generators, where the data can * be regenerated if the page couldn't be grabbed. This routine should * be safe to call while holding the lock for another page. * * Clear __GFP_FS when allocating the page to avoid recursion into the fs * and deadlock against the caller's locked page. */ static inline struct page *grab_cache_page_nowait(struct address_space *mapping, pgoff_t index) { return pagecache_get_page(mapping, index, FGP_LOCK|FGP_CREAT|FGP_NOFS|FGP_NOWAIT, mapping_gfp_mask(mapping)); } /* Does this page contain this index? */ static inline bool thp_contains(struct page *head, pgoff_t index) { /* HugeTLBfs indexes the page cache in units of hpage_size */ if (PageHuge(head)) return head->index == index; return page_index(head) == (index & ~(thp_nr_pages(head) - 1UL)); } /* * Given the page we found in the page cache, return the page corresponding * to this index in the file */ static inline struct page *find_subpage(struct page *head, pgoff_t index) { /* HugeTLBfs wants the head page regardless */ if (PageHuge(head)) return head; return head + (index & (thp_nr_pages(head) - 1)); } unsigned find_get_entries(struct address_space *mapping, pgoff_t start, pgoff_t end, struct pagevec *pvec, pgoff_t *indices); unsigned find_get_pages_range(struct address_space *mapping, pgoff_t *start, pgoff_t end, unsigned int nr_pages, struct page **pages); static inline unsigned find_get_pages(struct address_space *mapping, pgoff_t *start, unsigned int nr_pages, struct page **pages) { return find_get_pages_range(mapping, start, (pgoff_t)-1, nr_pages, pages); } unsigned find_get_pages_contig(struct address_space *mapping, pgoff_t start, unsigned int nr_pages, struct page **pages); unsigned find_get_pages_range_tag(struct address_space *mapping, pgoff_t *index, pgoff_t end, xa_mark_t tag, unsigned int nr_pages, struct page **pages); static inline unsigned find_get_pages_tag(struct address_space *mapping, pgoff_t *index, xa_mark_t tag, unsigned int nr_pages, struct page **pages) { return find_get_pages_range_tag(mapping, index, (pgoff_t)-1, tag, nr_pages, pages); } struct page *grab_cache_page_write_begin(struct address_space *mapping, pgoff_t index, unsigned flags); /* * Returns locked page at given index in given cache, creating it if needed. */ static inline struct page *grab_cache_page(struct address_space *mapping, pgoff_t index) { return find_or_create_page(mapping, index, mapping_gfp_mask(mapping)); } extern struct page * read_cache_page(struct address_space *mapping, pgoff_t index, filler_t *filler, void *data); extern struct page * read_cache_page_gfp(struct address_space *mapping, pgoff_t index, gfp_t gfp_mask); extern int read_cache_pages(struct address_space *mapping, struct list_head *pages, filler_t *filler, void *data); static inline struct page *read_mapping_page(struct address_space *mapping, pgoff_t index, void *data) { return read_cache_page(mapping, index, NULL, data); } /* * Get index of the page within radix-tree (but not for hugetlb pages). * (TODO: remove once hugetlb pages will have ->index in PAGE_SIZE) */ static inline pgoff_t page_to_index(struct page *page) { struct page *head; if (likely(!PageTransTail(page))) return page->index; head = compound_head(page); /* * We don't initialize ->index for tail pages: calculate based on * head page */ return head->index + page - head; } extern pgoff_t hugetlb_basepage_index(struct page *page); /* * Get the offset in PAGE_SIZE (even for hugetlb pages). * (TODO: hugetlb pages should have ->index in PAGE_SIZE) */ static inline pgoff_t page_to_pgoff(struct page *page) { if (unlikely(PageHuge(page))) return hugetlb_basepage_index(page); return page_to_index(page); } /* * Return byte-offset into filesystem object for page. */ static inline loff_t page_offset(struct page *page) { return ((loff_t)page->index) << PAGE_SHIFT; } static inline loff_t page_file_offset(struct page *page) { return ((loff_t)page_index(page)) << PAGE_SHIFT; } extern pgoff_t linear_hugepage_index(struct vm_area_struct *vma, unsigned long address); static inline pgoff_t linear_page_index(struct vm_area_struct *vma, unsigned long address) { pgoff_t pgoff; if (unlikely(is_vm_hugetlb_page(vma))) return linear_hugepage_index(vma, address); pgoff = (address - vma->vm_start) >> PAGE_SHIFT; pgoff += vma->vm_pgoff; return pgoff; } struct wait_page_key { struct page *page; int bit_nr; int page_match; }; struct wait_page_queue { struct page *page; int bit_nr; wait_queue_entry_t wait; }; static inline bool wake_page_match(struct wait_page_queue *wait_page, struct wait_page_key *key) { if (wait_page->page != key->page) return false; key->page_match = 1; if (wait_page->bit_nr != key->bit_nr) return false; return true; } extern void __lock_page(struct page *page); extern int __lock_page_killable(struct page *page); extern int __lock_page_async(struct page *page, struct wait_page_queue *wait); extern int __lock_page_or_retry(struct page *page, struct mm_struct *mm, unsigned int flags); extern void unlock_page(struct page *page); /* * Return true if the page was successfully locked */ static inline int trylock_page(struct page *page) { page = compound_head(page); return (likely(!test_and_set_bit_lock(PG_locked, &page->flags))); } /* * lock_page may only be called if we have the page's inode pinned. */ static inline void lock_page(struct page *page) { might_sleep(); if (!trylock_page(page)) __lock_page(page); } /* * lock_page_killable is like lock_page but can be interrupted by fatal * signals. It returns 0 if it locked the page and -EINTR if it was * killed while waiting. */ static inline int lock_page_killable(struct page *page) { might_sleep(); if (!trylock_page(page)) return __lock_page_killable(page); return 0; } /* * lock_page_async - Lock the page, unless this would block. If the page * is already locked, then queue a callback when the page becomes unlocked. * This callback can then retry the operation. * * Returns 0 if the page is locked successfully, or -EIOCBQUEUED if the page * was already locked and the callback defined in 'wait' was queued. */ static inline int lock_page_async(struct page *page, struct wait_page_queue *wait) { if (!trylock_page(page)) return __lock_page_async(page, wait); return 0; } /* * lock_page_or_retry - Lock the page, unless this would block and the * caller indicated that it can handle a retry. * * Return value and mmap_lock implications depend on flags; see * __lock_page_or_retry(). */ static inline int lock_page_or_retry(struct page *page, struct mm_struct *mm, unsigned int flags) { might_sleep(); return trylock_page(page) || __lock_page_or_retry(page, mm, flags); } /* * This is exported only for wait_on_page_locked/wait_on_page_writeback, etc., * and should not be used directly. */ extern void wait_on_page_bit(struct page *page, int bit_nr); extern int wait_on_page_bit_killable(struct page *page, int bit_nr); /* * Wait for a page to be unlocked. * * This must be called with the caller "holding" the page, * ie with increased "page->count" so that the page won't * go away during the wait.. */ static inline void wait_on_page_locked(struct page *page) { if (PageLocked(page)) wait_on_page_bit(compound_head(page), PG_locked); } static inline int wait_on_page_locked_killable(struct page *page) { if (!PageLocked(page)) return 0; return wait_on_page_bit_killable(compound_head(page), PG_locked); } int put_and_wait_on_page_locked(struct page *page, int state); void wait_on_page_writeback(struct page *page); int wait_on_page_writeback_killable(struct page *page); extern void end_page_writeback(struct page *page); void wait_for_stable_page(struct page *page); void __set_page_dirty(struct page *, struct address_space *, int warn); int __set_page_dirty_nobuffers(struct page *page); int __set_page_dirty_no_writeback(struct page *page); void page_endio(struct page *page, bool is_write, int err); /** * set_page_private_2 - Set PG_private_2 on a page and take a ref * @page: The page. * * Set the PG_private_2 flag on a page and take the reference needed for the VM * to handle its lifetime correctly. This sets the flag and takes the * reference unconditionally, so care must be taken not to set the flag again * if it's already set. */ static inline void set_page_private_2(struct page *page) { page = compound_head(page); get_page(page); SetPagePrivate2(page); } void end_page_private_2(struct page *page); void wait_on_page_private_2(struct page *page); int wait_on_page_private_2_killable(struct page *page); /* * Add an arbitrary waiter to a page's wait queue */ extern void add_page_wait_queue(struct page *page, wait_queue_entry_t *waiter); /* * Fault in userspace address range. */ size_t fault_in_writeable(char __user *uaddr, size_t size); size_t fault_in_safe_writeable(const char __user *uaddr, size_t size); size_t fault_in_readable(const char __user *uaddr, size_t size); int add_to_page_cache_locked(struct page *page, struct address_space *mapping, pgoff_t index, gfp_t gfp_mask); int add_to_page_cache_lru(struct page *page, struct address_space *mapping, pgoff_t index, gfp_t gfp_mask); extern void delete_from_page_cache(struct page *page); extern void __delete_from_page_cache(struct page *page, void *shadow); void replace_page_cache_page(struct page *old, struct page *new); void delete_from_page_cache_batch(struct address_space *mapping, struct pagevec *pvec); loff_t mapping_seek_hole_data(struct address_space *, loff_t start, loff_t end, int whence); /* * Like add_to_page_cache_locked, but used to add newly allocated pages: * the page is new, so we can just run __SetPageLocked() against it. */ static inline int add_to_page_cache(struct page *page, struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask) { int error; __SetPageLocked(page); error = add_to_page_cache_locked(page, mapping, offset, gfp_mask); if (unlikely(error)) __ClearPageLocked(page); return error; } /** * struct readahead_control - Describes a readahead request. * * A readahead request is for consecutive pages. Filesystems which * implement the ->readahead method should call readahead_page() or * readahead_page_batch() in a loop and attempt to start I/O against * each page in the request. * * Most of the fields in this struct are private and should be accessed * by the functions below. * * @file: The file, used primarily by network filesystems for authentication. * May be NULL if invoked internally by the filesystem. * @mapping: Readahead this filesystem object. * @ra: File readahead state. May be NULL. */ struct readahead_control { struct file *file; struct address_space *mapping; struct file_ra_state *ra; /* private: use the readahead_* accessors instead */ pgoff_t _index; unsigned int _nr_pages; unsigned int _batch_count; }; #define DEFINE_READAHEAD(ractl, f, r, m, i) \ struct readahead_control ractl = { \ .file = f, \ .mapping = m, \ .ra = r, \ ._index = i, \ } #define VM_READAHEAD_PAGES (SZ_128K / PAGE_SIZE) void page_cache_ra_unbounded(struct readahead_control *, unsigned long nr_to_read, unsigned long lookahead_count); void page_cache_sync_ra(struct readahead_control *, unsigned long req_count); void page_cache_async_ra(struct readahead_control *, struct page *, unsigned long req_count); void readahead_expand(struct readahead_control *ractl, loff_t new_start, size_t new_len); /** * page_cache_sync_readahead - generic file readahead * @mapping: address_space which holds the pagecache and I/O vectors * @ra: file_ra_state which holds the readahead state * @file: Used by the filesystem for authentication. * @index: Index of first page to be read. * @req_count: Total number of pages being read by the caller. * * page_cache_sync_readahead() should be called when a cache miss happened: * it will submit the read. The readahead logic may decide to piggyback more * pages onto the read request if access patterns suggest it will improve * performance. */ static inline void page_cache_sync_readahead(struct address_space *mapping, struct file_ra_state *ra, struct file *file, pgoff_t index, unsigned long req_count) { DEFINE_READAHEAD(ractl, file, ra, mapping, index); page_cache_sync_ra(&ractl, req_count); } /** * page_cache_async_readahead - file readahead for marked pages * @mapping: address_space which holds the pagecache and I/O vectors * @ra: file_ra_state which holds the readahead state * @file: Used by the filesystem for authentication. * @page: The page at @index which triggered the readahead call. * @index: Index of first page to be read. * @req_count: Total number of pages being read by the caller. * * page_cache_async_readahead() should be called when a page is used which * is marked as PageReadahead; this is a marker to suggest that the application * has used up enough of the readahead window that we should start pulling in * more pages. */ static inline void page_cache_async_readahead(struct address_space *mapping, struct file_ra_state *ra, struct file *file, struct page *page, pgoff_t index, unsigned long req_count) { DEFINE_READAHEAD(ractl, file, ra, mapping, index); page_cache_async_ra(&ractl, page, req_count); } /** * readahead_page - Get the next page to read. * @rac: The current readahead request. * * Context: The page is locked and has an elevated refcount. The caller * should decreases the refcount once the page has been submitted for I/O * and unlock the page once all I/O to that page has completed. * Return: A pointer to the next page, or %NULL if we are done. */ static inline struct page *readahead_page(struct readahead_control *rac) { struct page *page; BUG_ON(rac->_batch_count > rac->_nr_pages); rac->_nr_pages -= rac->_batch_count; rac->_index += rac->_batch_count; if (!rac->_nr_pages) { rac->_batch_count = 0; return NULL; } page = xa_load(&rac->mapping->i_pages, rac->_index); VM_BUG_ON_PAGE(!PageLocked(page), page); rac->_batch_count = thp_nr_pages(page); return page; } static inline unsigned int __readahead_batch(struct readahead_control *rac, struct page **array, unsigned int array_sz) { unsigned int i = 0; XA_STATE(xas, &rac->mapping->i_pages, 0); struct page *page; BUG_ON(rac->_batch_count > rac->_nr_pages); rac->_nr_pages -= rac->_batch_count; rac->_index += rac->_batch_count; rac->_batch_count = 0; xas_set(&xas, rac->_index); rcu_read_lock(); xas_for_each(&xas, page, rac->_index + rac->_nr_pages - 1) { if (xas_retry(&xas, page)) continue; VM_BUG_ON_PAGE(!PageLocked(page), page); VM_BUG_ON_PAGE(PageTail(page), page); array[i++] = page; rac->_batch_count += thp_nr_pages(page); /* * The page cache isn't using multi-index entries yet, * so the xas cursor needs to be manually moved to the * next index. This can be removed once the page cache * is converted. */ if (PageHead(page)) xas_set(&xas, rac->_index + rac->_batch_count); if (i == array_sz) break; } rcu_read_unlock(); return i; } /** * readahead_page_batch - Get a batch of pages to read. * @rac: The current readahead request. * @array: An array of pointers to struct page. * * Context: The pages are locked and have an elevated refcount. The caller * should decreases the refcount once the page has been submitted for I/O * and unlock the page once all I/O to that page has completed. * Return: The number of pages placed in the array. 0 indicates the request * is complete. */ #define readahead_page_batch(rac, array) \ __readahead_batch(rac, array, ARRAY_SIZE(array)) /** * readahead_pos - The byte offset into the file of this readahead request. * @rac: The readahead request. */ static inline loff_t readahead_pos(struct readahead_control *rac) { return (loff_t)rac->_index * PAGE_SIZE; } /** * readahead_length - The number of bytes in this readahead request. * @rac: The readahead request. */ static inline size_t readahead_length(struct readahead_control *rac) { return rac->_nr_pages * PAGE_SIZE; } /** * readahead_index - The index of the first page in this readahead request. * @rac: The readahead request. */ static inline pgoff_t readahead_index(struct readahead_control *rac) { return rac->_index; } /** * readahead_count - The number of pages in this readahead request. * @rac: The readahead request. */ static inline unsigned int readahead_count(struct readahead_control *rac) { return rac->_nr_pages; } /** * readahead_batch_length - The number of bytes in the current batch. * @rac: The readahead request. */ static inline size_t readahead_batch_length(struct readahead_control *rac) { return rac->_batch_count * PAGE_SIZE; } static inline unsigned long dir_pages(struct inode *inode) { return (unsigned long)(inode->i_size + PAGE_SIZE - 1) >> PAGE_SHIFT; } /** * page_mkwrite_check_truncate - check if page was truncated * @page: the page to check * @inode: the inode to check the page against * * Returns the number of bytes in the page up to EOF, * or -EFAULT if the page was truncated. */ static inline int page_mkwrite_check_truncate(struct page *page, struct inode *inode) { loff_t size = i_size_read(inode); pgoff_t index = size >> PAGE_SHIFT; int offset = offset_in_page(size); if (page->mapping != inode->i_mapping) return -EFAULT; /* page is wholly inside EOF */ if (page->index < index) return PAGE_SIZE; /* page is wholly past EOF */ if (page->index > index || !offset) return -EFAULT; /* page is partially inside EOF */ return offset; } /** * i_blocks_per_page - How many blocks fit in this page. * @inode: The inode which contains the blocks. * @page: The page (head page if the page is a THP). * * If the block size is larger than the size of this page, return zero. * * Context: The caller should hold a refcount on the page to prevent it * from being split. * Return: The number of filesystem blocks covered by this page. */ static inline unsigned int i_blocks_per_page(struct inode *inode, struct page *page) { return thp_size(page) >> inode->i_blkbits; } #endif /* _LINUX_PAGEMAP_H */ PK ! �.�5B 5B cpuhotplug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __CPUHOTPLUG_H #define __CPUHOTPLUG_H #include <linux/types.h> /* * CPU-up CPU-down * * BP AP BP AP * * OFFLINE OFFLINE * | ^ * v | * BRINGUP_CPU->AP_OFFLINE BRINGUP_CPU <- AP_IDLE_DEAD (idle thread/play_dead) * | AP_OFFLINE * v (IRQ-off) ,---------------^ * AP_ONLNE | (stop_machine) * | TEARDOWN_CPU <- AP_ONLINE_IDLE * | ^ * v | * AP_ACTIVE AP_ACTIVE */ /* * CPU hotplug states. The state machine invokes the installed state * startup callbacks sequentially from CPUHP_OFFLINE + 1 to CPUHP_ONLINE * during a CPU online operation. During a CPU offline operation the * installed teardown callbacks are invoked in the reverse order from * CPU_ONLINE - 1 down to CPUHP_OFFLINE. * * The state space has three sections: PREPARE, STARTING and ONLINE. * * PREPARE: The callbacks are invoked on a control CPU before the * hotplugged CPU is started up or after the hotplugged CPU has died. * * STARTING: The callbacks are invoked on the hotplugged CPU from the low level * hotplug startup/teardown code with interrupts disabled. * * ONLINE: The callbacks are invoked on the hotplugged CPU from the per CPU * hotplug thread with interrupts and preemption enabled. * * Adding explicit states to this enum is only necessary when: * * 1) The state is within the STARTING section * * 2) The state has ordering constraints vs. other states in the * same section. * * If neither #1 nor #2 apply, please use the dynamic state space when * setting up a state by using CPUHP_PREPARE_DYN or CPUHP_PREPARE_ONLINE * for the @state argument of the setup function. * * See Documentation/core-api/cpu_hotplug.rst for further information and * examples. */ enum cpuhp_state { CPUHP_INVALID = -1, /* PREPARE section invoked on a control CPU */ CPUHP_OFFLINE = 0, CPUHP_CREATE_THREADS, CPUHP_PERF_PREPARE, CPUHP_PERF_X86_PREPARE, CPUHP_PERF_X86_AMD_UNCORE_PREP, CPUHP_PERF_POWER, CPUHP_PERF_SUPERH, CPUHP_X86_HPET_DEAD, CPUHP_X86_APB_DEAD, CPUHP_X86_MCE_DEAD, CPUHP_VIRT_NET_DEAD, CPUHP_SLUB_DEAD, CPUHP_DEBUG_OBJ_DEAD, CPUHP_MM_WRITEBACK_DEAD, /* Must be after CPUHP_MM_VMSTAT_DEAD */ CPUHP_MM_DEMOTION_DEAD, CPUHP_MM_VMSTAT_DEAD, CPUHP_SOFTIRQ_DEAD, CPUHP_NET_MVNETA_DEAD, CPUHP_CPUIDLE_DEAD, CPUHP_ARM64_FPSIMD_DEAD, CPUHP_ARM_OMAP_WAKE_DEAD, CPUHP_IRQ_POLL_DEAD, CPUHP_BLOCK_SOFTIRQ_DEAD, CPUHP_BIO_DEAD, CPUHP_ACPI_CPUDRV_DEAD, CPUHP_S390_PFAULT_DEAD, CPUHP_BLK_MQ_DEAD, CPUHP_FS_BUFF_DEAD, CPUHP_PRINTK_DEAD, CPUHP_MM_MEMCQ_DEAD, CPUHP_XFS_DEAD, CPUHP_PERCPU_CNT_DEAD, CPUHP_RADIX_DEAD, CPUHP_PAGE_ALLOC, CPUHP_NET_DEV_DEAD, CPUHP_PCI_XGENE_DEAD, CPUHP_IOMMU_IOVA_DEAD, CPUHP_LUSTRE_CFS_DEAD, CPUHP_AP_ARM_CACHE_B15_RAC_DEAD, CPUHP_PADATA_DEAD, CPUHP_RANDOM_PREPARE, CPUHP_WORKQUEUE_PREP, CPUHP_POWER_NUMA_PREPARE, CPUHP_HRTIMERS_PREPARE, CPUHP_PROFILE_PREPARE, CPUHP_X2APIC_PREPARE, CPUHP_SMPCFD_PREPARE, CPUHP_RELAY_PREPARE, CPUHP_SLAB_PREPARE, CPUHP_MD_RAID5_PREPARE, CPUHP_RCUTREE_PREP, CPUHP_CPUIDLE_COUPLED_PREPARE, CPUHP_POWERPC_PMAC_PREPARE, CPUHP_POWERPC_MMU_CTX_PREPARE, CPUHP_XEN_PREPARE, CPUHP_XEN_EVTCHN_PREPARE, CPUHP_ARM_SHMOBILE_SCU_PREPARE, CPUHP_SH_SH3X_PREPARE, CPUHP_NET_FLOW_PREPARE, CPUHP_TOPOLOGY_PREPARE, CPUHP_NET_IUCV_PREPARE, CPUHP_ARM_BL_PREPARE, CPUHP_TRACE_RB_PREPARE, CPUHP_MM_ZS_PREPARE, CPUHP_MM_ZSWP_MEM_PREPARE, CPUHP_MM_ZSWP_POOL_PREPARE, CPUHP_KVM_PPC_BOOK3S_PREPARE, CPUHP_ZCOMP_PREPARE, CPUHP_TIMERS_PREPARE, CPUHP_MIPS_SOC_PREPARE, CPUHP_BP_PREPARE_DYN, CPUHP_BP_PREPARE_DYN_END = CPUHP_BP_PREPARE_DYN + 20, CPUHP_BRINGUP_CPU, /* * STARTING section invoked on the hotplugged CPU in low level * bringup and teardown code. */ CPUHP_AP_IDLE_DEAD, CPUHP_AP_OFFLINE, CPUHP_AP_SCHED_STARTING, CPUHP_AP_RCUTREE_DYING, CPUHP_AP_CPU_PM_STARTING, CPUHP_AP_IRQ_GIC_STARTING, CPUHP_AP_IRQ_HIP04_STARTING, CPUHP_AP_IRQ_APPLE_AIC_STARTING, CPUHP_AP_IRQ_ARMADA_XP_STARTING, CPUHP_AP_IRQ_BCM2836_STARTING, CPUHP_AP_IRQ_MIPS_GIC_STARTING, CPUHP_AP_IRQ_RISCV_STARTING, CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING, CPUHP_AP_ARM_MVEBU_COHERENCY, CPUHP_AP_MICROCODE_LOADER, CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING, CPUHP_AP_PERF_X86_STARTING, CPUHP_AP_PERF_X86_AMD_IBS_STARTING, CPUHP_AP_PERF_X86_CQM_STARTING, CPUHP_AP_PERF_X86_CSTATE_STARTING, CPUHP_AP_PERF_XTENSA_STARTING, CPUHP_AP_MIPS_OP_LOONGSON3_STARTING, CPUHP_AP_ARM_VFP_STARTING, CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING, CPUHP_AP_PERF_ARM_HW_BREAKPOINT_STARTING, CPUHP_AP_PERF_ARM_ACPI_STARTING, CPUHP_AP_PERF_ARM_STARTING, CPUHP_AP_ARM_L2X0_STARTING, CPUHP_AP_EXYNOS4_MCT_TIMER_STARTING, CPUHP_AP_ARM_ARCH_TIMER_STARTING, CPUHP_AP_ARM_GLOBAL_TIMER_STARTING, CPUHP_AP_JCORE_TIMER_STARTING, CPUHP_AP_ARM_TWD_STARTING, CPUHP_AP_QCOM_TIMER_STARTING, CPUHP_AP_TEGRA_TIMER_STARTING, CPUHP_AP_ARMADA_TIMER_STARTING, CPUHP_AP_MARCO_TIMER_STARTING, CPUHP_AP_MIPS_GIC_TIMER_STARTING, CPUHP_AP_ARC_TIMER_STARTING, CPUHP_AP_RISCV_TIMER_STARTING, CPUHP_AP_CLINT_TIMER_STARTING, CPUHP_AP_CSKY_TIMER_STARTING, CPUHP_AP_TI_GP_TIMER_STARTING, CPUHP_AP_HYPERV_TIMER_STARTING, CPUHP_AP_KVM_STARTING, CPUHP_AP_KVM_ARM_VGIC_INIT_STARTING, CPUHP_AP_KVM_ARM_VGIC_STARTING, CPUHP_AP_KVM_ARM_TIMER_STARTING, /* Must be the last timer callback */ CPUHP_AP_DUMMY_TIMER_STARTING, CPUHP_AP_ARM_XEN_STARTING, CPUHP_AP_ARM_XEN_RUNSTATE_STARTING, CPUHP_AP_ARM_CORESIGHT_STARTING, CPUHP_AP_ARM_CORESIGHT_CTI_STARTING, CPUHP_AP_ARM64_ISNDEP_STARTING, CPUHP_AP_SMPCFD_DYING, CPUHP_AP_HRTIMERS_DYING, CPUHP_AP_X86_TBOOT_DYING, CPUHP_AP_ARM_CACHE_B15_RAC_DYING, CPUHP_AP_ONLINE, CPUHP_TEARDOWN_CPU, /* Online section invoked on the hotplugged CPU from the hotplug thread */ CPUHP_AP_ONLINE_IDLE, CPUHP_AP_SCHED_WAIT_EMPTY, CPUHP_AP_SMPBOOT_THREADS, CPUHP_AP_X86_VDSO_VMA_ONLINE, CPUHP_AP_IRQ_AFFINITY_ONLINE, CPUHP_AP_BLK_MQ_ONLINE, CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS, CPUHP_AP_X86_INTEL_EPB_ONLINE, CPUHP_AP_PERF_ONLINE, CPUHP_AP_PERF_X86_ONLINE, CPUHP_AP_PERF_X86_UNCORE_ONLINE, CPUHP_AP_PERF_X86_AMD_UNCORE_ONLINE, CPUHP_AP_PERF_X86_AMD_POWER_ONLINE, CPUHP_AP_PERF_X86_RAPL_ONLINE, CPUHP_AP_PERF_X86_CQM_ONLINE, CPUHP_AP_PERF_X86_CSTATE_ONLINE, CPUHP_AP_PERF_X86_IDXD_ONLINE, CPUHP_AP_PERF_S390_CF_ONLINE, CPUHP_AP_PERF_S390_SF_ONLINE, CPUHP_AP_PERF_ARM_CCI_ONLINE, CPUHP_AP_PERF_ARM_CCN_ONLINE, CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE, CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, CPUHP_AP_PERF_ARM_HISI_L3_ONLINE, CPUHP_AP_PERF_ARM_HISI_PA_ONLINE, CPUHP_AP_PERF_ARM_HISI_SLLC_ONLINE, CPUHP_AP_PERF_ARM_L2X0_ONLINE, CPUHP_AP_PERF_ARM_QCOM_L2_ONLINE, CPUHP_AP_PERF_ARM_QCOM_L3_ONLINE, CPUHP_AP_PERF_ARM_APM_XGENE_ONLINE, CPUHP_AP_PERF_ARM_CAVIUM_TX2_UNCORE_ONLINE, CPUHP_AP_PERF_POWERPC_NEST_IMC_ONLINE, CPUHP_AP_PERF_POWERPC_CORE_IMC_ONLINE, CPUHP_AP_PERF_POWERPC_THREAD_IMC_ONLINE, CPUHP_AP_PERF_POWERPC_TRACE_IMC_ONLINE, CPUHP_AP_PERF_POWERPC_HV_24x7_ONLINE, CPUHP_AP_PERF_POWERPC_HV_GPCI_ONLINE, CPUHP_AP_PERF_CSKY_ONLINE, CPUHP_AP_WATCHDOG_ONLINE, CPUHP_AP_WORKQUEUE_ONLINE, CPUHP_AP_RANDOM_ONLINE, CPUHP_AP_RCUTREE_ONLINE, CPUHP_AP_BASE_CACHEINFO_ONLINE, CPUHP_AP_ONLINE_DYN, CPUHP_AP_ONLINE_DYN_END = CPUHP_AP_ONLINE_DYN + 30, /* Must be after CPUHP_AP_ONLINE_DYN for node_states[N_CPU] update */ CPUHP_AP_MM_DEMOTION_ONLINE, CPUHP_AP_X86_HPET_ONLINE, CPUHP_AP_X86_KVM_CLK_ONLINE, CPUHP_AP_DTPM_CPU_ONLINE, CPUHP_AP_ACTIVE, CPUHP_ONLINE, }; int __cpuhp_setup_state(enum cpuhp_state state, const char *name, bool invoke, int (*startup)(unsigned int cpu), int (*teardown)(unsigned int cpu), bool multi_instance); int __cpuhp_setup_state_cpuslocked(enum cpuhp_state state, const char *name, bool invoke, int (*startup)(unsigned int cpu), int (*teardown)(unsigned int cpu), bool multi_instance); /** * cpuhp_setup_state - Setup hotplug state callbacks with calling the @startup * callback * @state: The state for which the calls are installed * @name: Name of the callback (will be used in debug output) * @startup: startup callback function or NULL if not required * @teardown: teardown callback function or NULL if not required * * Installs the callback functions and invokes the @startup callback on * the online cpus which have already reached the @state. */ static inline int cpuhp_setup_state(enum cpuhp_state state, const char *name, int (*startup)(unsigned int cpu), int (*teardown)(unsigned int cpu)) { return __cpuhp_setup_state(state, name, true, startup, teardown, false); } /** * cpuhp_setup_state_cpuslocked - Setup hotplug state callbacks with calling * @startup callback from a cpus_read_lock() * held region * @state: The state for which the calls are installed * @name: Name of the callback (will be used in debug output) * @startup: startup callback function or NULL if not required * @teardown: teardown callback function or NULL if not required * * Same as cpuhp_setup_state() except that it must be invoked from within a * cpus_read_lock() held region. */ static inline int cpuhp_setup_state_cpuslocked(enum cpuhp_state state, const char *name, int (*startup)(unsigned int cpu), int (*teardown)(unsigned int cpu)) { return __cpuhp_setup_state_cpuslocked(state, name, true, startup, teardown, false); } /** * cpuhp_setup_state_nocalls - Setup hotplug state callbacks without calling the * @startup callback * @state: The state for which the calls are installed * @name: Name of the callback. * @startup: startup callback function or NULL if not required * @teardown: teardown callback function or NULL if not required * * Same as cpuhp_setup_state() except that the @startup callback is not * invoked during installation. NOP if SMP=n or HOTPLUG_CPU=n. */ static inline int cpuhp_setup_state_nocalls(enum cpuhp_state state, const char *name, int (*startup)(unsigned int cpu), int (*teardown)(unsigned int cpu)) { return __cpuhp_setup_state(state, name, false, startup, teardown, false); } /** * cpuhp_setup_state_nocalls_cpuslocked - Setup hotplug state callbacks without * invoking the @startup callback from * a cpus_read_lock() held region * callbacks * @state: The state for which the calls are installed * @name: Name of the callback. * @startup: startup callback function or NULL if not required * @teardown: teardown callback function or NULL if not required * * Same as cpuhp_setup_state_nocalls() except that it must be invoked from * within a cpus_read_lock() held region. */ static inline int cpuhp_setup_state_nocalls_cpuslocked(enum cpuhp_state state, const char *name, int (*startup)(unsigned int cpu), int (*teardown)(unsigned int cpu)) { return __cpuhp_setup_state_cpuslocked(state, name, false, startup, teardown, false); } /** * cpuhp_setup_state_multi - Add callbacks for multi state * @state: The state for which the calls are installed * @name: Name of the callback. * @startup: startup callback function or NULL if not required * @teardown: teardown callback function or NULL if not required * * Sets the internal multi_instance flag and prepares a state to work as a multi * instance callback. No callbacks are invoked at this point. The callbacks are * invoked once an instance for this state are registered via * cpuhp_state_add_instance() or cpuhp_state_add_instance_nocalls() */ static inline int cpuhp_setup_state_multi(enum cpuhp_state state, const char *name, int (*startup)(unsigned int cpu, struct hlist_node *node), int (*teardown)(unsigned int cpu, struct hlist_node *node)) { return __cpuhp_setup_state(state, name, false, (void *) startup, (void *) teardown, true); } int __cpuhp_state_add_instance(enum cpuhp_state state, struct hlist_node *node, bool invoke); int __cpuhp_state_add_instance_cpuslocked(enum cpuhp_state state, struct hlist_node *node, bool invoke); /** * cpuhp_state_add_instance - Add an instance for a state and invoke startup * callback. * @state: The state for which the instance is installed * @node: The node for this individual state. * * Installs the instance for the @state and invokes the registered startup * callback on the online cpus which have already reached the @state. The * @state must have been earlier marked as multi-instance by * cpuhp_setup_state_multi(). */ static inline int cpuhp_state_add_instance(enum cpuhp_state state, struct hlist_node *node) { return __cpuhp_state_add_instance(state, node, true); } /** * cpuhp_state_add_instance_nocalls - Add an instance for a state without * invoking the startup callback. * @state: The state for which the instance is installed * @node: The node for this individual state. * * Installs the instance for the @state. The @state must have been earlier * marked as multi-instance by cpuhp_setup_state_multi. NOP if SMP=n or * HOTPLUG_CPU=n. */ static inline int cpuhp_state_add_instance_nocalls(enum cpuhp_state state, struct hlist_node *node) { return __cpuhp_state_add_instance(state, node, false); } /** * cpuhp_state_add_instance_nocalls_cpuslocked - Add an instance for a state * without invoking the startup * callback from a cpus_read_lock() * held region. * @state: The state for which the instance is installed * @node: The node for this individual state. * * Same as cpuhp_state_add_instance_nocalls() except that it must be * invoked from within a cpus_read_lock() held region. */ static inline int cpuhp_state_add_instance_nocalls_cpuslocked(enum cpuhp_state state, struct hlist_node *node) { return __cpuhp_state_add_instance_cpuslocked(state, node, false); } void __cpuhp_remove_state(enum cpuhp_state state, bool invoke); void __cpuhp_remove_state_cpuslocked(enum cpuhp_state state, bool invoke); /** * cpuhp_remove_state - Remove hotplug state callbacks and invoke the teardown * @state: The state for which the calls are removed * * Removes the callback functions and invokes the teardown callback on * the online cpus which have already reached the @state. */ static inline void cpuhp_remove_state(enum cpuhp_state state) { __cpuhp_remove_state(state, true); } /** * cpuhp_remove_state_nocalls - Remove hotplug state callbacks without invoking * the teardown callback * @state: The state for which the calls are removed */ static inline void cpuhp_remove_state_nocalls(enum cpuhp_state state) { __cpuhp_remove_state(state, false); } /** * cpuhp_remove_state_nocalls_cpuslocked - Remove hotplug state callbacks without invoking * teardown from a cpus_read_lock() held region. * @state: The state for which the calls are removed * * Same as cpuhp_remove_state nocalls() except that it must be invoked * from within a cpus_read_lock() held region. */ static inline void cpuhp_remove_state_nocalls_cpuslocked(enum cpuhp_state state) { __cpuhp_remove_state_cpuslocked(state, false); } /** * cpuhp_remove_multi_state - Remove hotplug multi state callback * @state: The state for which the calls are removed * * Removes the callback functions from a multi state. This is the reverse of * cpuhp_setup_state_multi(). All instances should have been removed before * invoking this function. */ static inline void cpuhp_remove_multi_state(enum cpuhp_state state) { __cpuhp_remove_state(state, false); } int __cpuhp_state_remove_instance(enum cpuhp_state state, struct hlist_node *node, bool invoke); /** * cpuhp_state_remove_instance - Remove hotplug instance from state and invoke * the teardown callback * @state: The state from which the instance is removed * @node: The node for this individual state. * * Removes the instance and invokes the teardown callback on the online cpus * which have already reached @state. */ static inline int cpuhp_state_remove_instance(enum cpuhp_state state, struct hlist_node *node) { return __cpuhp_state_remove_instance(state, node, true); } /** * cpuhp_state_remove_instance_nocalls - Remove hotplug instance from state * without invoking the teardown callback * @state: The state from which the instance is removed * @node: The node for this individual state. * * Removes the instance without invoking the teardown callback. */ static inline int cpuhp_state_remove_instance_nocalls(enum cpuhp_state state, struct hlist_node *node) { return __cpuhp_state_remove_instance(state, node, false); } #ifdef CONFIG_SMP void cpuhp_online_idle(enum cpuhp_state state); #else static inline void cpuhp_online_idle(enum cpuhp_state state) { } #endif #endif PK ! ���� � sh_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Header for the new SH dmaengine driver * * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> */ #ifndef SH_DMA_H #define SH_DMA_H #include <linux/dmaengine.h> #include <linux/list.h> #include <linux/shdma-base.h> #include <linux/types.h> struct device; /* Used by slave DMA clients to request DMA to/from a specific peripheral */ struct sh_dmae_slave { struct shdma_slave shdma_slave; /* Set by the platform */ }; /* * Supplied by platforms to specify, how a DMA channel has to be configured for * a certain peripheral */ struct sh_dmae_slave_config { int slave_id; dma_addr_t addr; u32 chcr; char mid_rid; }; /** * struct sh_dmae_channel - DMAC channel platform data * @offset: register offset within the main IOMEM resource * @dmars: channel DMARS register offset * @chclr_offset: channel CHCLR register offset * @dmars_bit: channel DMARS field offset within the register * @chclr_bit: bit position, to be set to reset the channel */ struct sh_dmae_channel { unsigned int offset; unsigned int dmars; unsigned int chclr_offset; unsigned char dmars_bit; unsigned char chclr_bit; }; /** * struct sh_dmae_pdata - DMAC platform data * @slave: array of slaves * @slave_num: number of slaves in the above array * @channel: array of DMA channels * @channel_num: number of channels in the above array * @ts_low_shift: shift of the low part of the TS field * @ts_low_mask: low TS field mask * @ts_high_shift: additional shift of the high part of the TS field * @ts_high_mask: high TS field mask * @ts_shift: array of Transfer Size shifts, indexed by TS value * @ts_shift_num: number of shifts in the above array * @dmaor_init: DMAOR initialisation value * @chcr_offset: CHCR address offset * @chcr_ie_bit: CHCR Interrupt Enable bit * @dmaor_is_32bit: DMAOR is a 32-bit register * @needs_tend_set: the TEND register has to be set * @no_dmars: DMAC has no DMARS registers * @chclr_present: DMAC has one or several CHCLR registers * @chclr_bitwise: channel CHCLR registers are bitwise * @slave_only: DMAC cannot be used for MEMCPY */ struct sh_dmae_pdata { const struct sh_dmae_slave_config *slave; int slave_num; const struct sh_dmae_channel *channel; int channel_num; unsigned int ts_low_shift; unsigned int ts_low_mask; unsigned int ts_high_shift; unsigned int ts_high_mask; const unsigned int *ts_shift; int ts_shift_num; u16 dmaor_init; unsigned int chcr_offset; u32 chcr_ie_bit; unsigned int dmaor_is_32bit:1; unsigned int needs_tend_set:1; unsigned int no_dmars:1; unsigned int chclr_present:1; unsigned int chclr_bitwise:1; unsigned int slave_only:1; }; /* DMAOR definitions */ #define DMAOR_AE 0x00000004 /* Address Error Flag */ #define DMAOR_NMIF 0x00000002 #define DMAOR_DME 0x00000001 /* DMA Master Enable */ /* Definitions for the SuperH DMAC */ #define DM_INC 0x00004000 /* Destination addresses are incremented */ #define DM_DEC 0x00008000 /* Destination addresses are decremented */ #define DM_FIX 0x0000c000 /* Destination address is fixed */ #define SM_INC 0x00001000 /* Source addresses are incremented */ #define SM_DEC 0x00002000 /* Source addresses are decremented */ #define SM_FIX 0x00003000 /* Source address is fixed */ #define RS_AUTO 0x00000400 /* Auto Request */ #define RS_ERS 0x00000800 /* DMA extended resource selector */ #define CHCR_DE 0x00000001 /* DMA Enable */ #define CHCR_TE 0x00000002 /* Transfer End Flag */ #define CHCR_IE 0x00000004 /* Interrupt Enable */ #endif PK ! �� �� � nvme-tcp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * NVMe over Fabrics TCP protocol header. * Copyright (c) 2018 Lightbits Labs. All rights reserved. */ #ifndef _LINUX_NVME_TCP_H #define _LINUX_NVME_TCP_H #include <linux/nvme.h> #define NVME_TCP_DISC_PORT 8009 #define NVME_TCP_ADMIN_CCSZ SZ_8K #define NVME_TCP_DIGEST_LENGTH 4 enum nvme_tcp_pfv { NVME_TCP_PFV_1_0 = 0x0, }; enum nvme_tcp_fatal_error_status { NVME_TCP_FES_INVALID_PDU_HDR = 0x01, NVME_TCP_FES_PDU_SEQ_ERR = 0x02, NVME_TCP_FES_HDR_DIGEST_ERR = 0x03, NVME_TCP_FES_DATA_OUT_OF_RANGE = 0x04, NVME_TCP_FES_R2T_LIMIT_EXCEEDED = 0x05, NVME_TCP_FES_DATA_LIMIT_EXCEEDED = 0x05, NVME_TCP_FES_UNSUPPORTED_PARAM = 0x06, }; enum nvme_tcp_digest_option { NVME_TCP_HDR_DIGEST_ENABLE = (1 << 0), NVME_TCP_DATA_DIGEST_ENABLE = (1 << 1), }; enum nvme_tcp_pdu_type { nvme_tcp_icreq = 0x0, nvme_tcp_icresp = 0x1, nvme_tcp_h2c_term = 0x2, nvme_tcp_c2h_term = 0x3, nvme_tcp_cmd = 0x4, nvme_tcp_rsp = 0x5, nvme_tcp_h2c_data = 0x6, nvme_tcp_c2h_data = 0x7, nvme_tcp_r2t = 0x9, }; enum nvme_tcp_pdu_flags { NVME_TCP_F_HDGST = (1 << 0), NVME_TCP_F_DDGST = (1 << 1), NVME_TCP_F_DATA_LAST = (1 << 2), NVME_TCP_F_DATA_SUCCESS = (1 << 3), }; /** * struct nvme_tcp_hdr - nvme tcp pdu common header * * @type: pdu type * @flags: pdu specific flags * @hlen: pdu header length * @pdo: pdu data offset * @plen: pdu wire byte length */ struct nvme_tcp_hdr { __u8 type; __u8 flags; __u8 hlen; __u8 pdo; __le32 plen; }; /** * struct nvme_tcp_icreq_pdu - nvme tcp initialize connection request pdu * * @hdr: pdu generic header * @pfv: pdu version format * @hpda: host pdu data alignment (dwords, 0's based) * @digest: digest types enabled * @maxr2t: maximum r2ts per request supported */ struct nvme_tcp_icreq_pdu { struct nvme_tcp_hdr hdr; __le16 pfv; __u8 hpda; __u8 digest; __le32 maxr2t; __u8 rsvd2[112]; }; /** * struct nvme_tcp_icresp_pdu - nvme tcp initialize connection response pdu * * @hdr: pdu common header * @pfv: pdu version format * @cpda: controller pdu data alignment (dowrds, 0's based) * @digest: digest types enabled * @maxdata: maximum data capsules per r2t supported */ struct nvme_tcp_icresp_pdu { struct nvme_tcp_hdr hdr; __le16 pfv; __u8 cpda; __u8 digest; __le32 maxdata; __u8 rsvd[112]; }; /** * struct nvme_tcp_term_pdu - nvme tcp terminate connection pdu * * @hdr: pdu common header * @fes: fatal error status * @fei: fatal error information */ struct nvme_tcp_term_pdu { struct nvme_tcp_hdr hdr; __le16 fes; __le16 feil; __le16 feiu; __u8 rsvd[10]; }; /** * struct nvme_tcp_cmd_pdu - nvme tcp command capsule pdu * * @hdr: pdu common header * @cmd: nvme command */ struct nvme_tcp_cmd_pdu { struct nvme_tcp_hdr hdr; struct nvme_command cmd; }; /** * struct nvme_tcp_rsp_pdu - nvme tcp response capsule pdu * * @hdr: pdu common header * @hdr: nvme-tcp generic header * @cqe: nvme completion queue entry */ struct nvme_tcp_rsp_pdu { struct nvme_tcp_hdr hdr; struct nvme_completion cqe; }; /** * struct nvme_tcp_r2t_pdu - nvme tcp ready-to-transfer pdu * * @hdr: pdu common header * @command_id: nvme command identifier which this relates to * @ttag: transfer tag (controller generated) * @r2t_offset: offset from the start of the command data * @r2t_length: length the host is allowed to send */ struct nvme_tcp_r2t_pdu { struct nvme_tcp_hdr hdr; __u16 command_id; __u16 ttag; __le32 r2t_offset; __le32 r2t_length; __u8 rsvd[4]; }; /** * struct nvme_tcp_data_pdu - nvme tcp data pdu * * @hdr: pdu common header * @command_id: nvme command identifier which this relates to * @ttag: transfer tag (controller generated) * @data_offset: offset from the start of the command data * @data_length: length of the data stream */ struct nvme_tcp_data_pdu { struct nvme_tcp_hdr hdr; __u16 command_id; __u16 ttag; __le32 data_offset; __le32 data_length; __u8 rsvd[4]; }; union nvme_tcp_pdu { struct nvme_tcp_icreq_pdu icreq; struct nvme_tcp_icresp_pdu icresp; struct nvme_tcp_cmd_pdu cmd; struct nvme_tcp_rsp_pdu rsp; struct nvme_tcp_r2t_pdu r2t; struct nvme_tcp_data_pdu data; }; #endif /* _LINUX_NVME_TCP_H */ PK ! ��z iio/trigger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* The industrial I/O core, trigger handling functions * * Copyright (c) 2008 Jonathan Cameron */ #include <linux/irq.h> #include <linux/module.h> #include <linux/atomic.h> #ifndef _IIO_TRIGGER_H_ #define _IIO_TRIGGER_H_ #ifdef CONFIG_IIO_TRIGGER struct iio_subirq { bool enabled; }; struct iio_dev; struct iio_trigger; /** * struct iio_trigger_ops - operations structure for an iio_trigger. * @set_trigger_state: switch on/off the trigger on demand * @reenable: function to reenable the trigger when the * use count is zero (may be NULL) * @validate_device: function to validate the device when the * current trigger gets changed. * * This is typically static const within a driver and shared by * instances of a given device. **/ struct iio_trigger_ops { int (*set_trigger_state)(struct iio_trigger *trig, bool state); void (*reenable)(struct iio_trigger *trig); int (*validate_device)(struct iio_trigger *trig, struct iio_dev *indio_dev); }; /** * struct iio_trigger - industrial I/O trigger device * @ops: [DRIVER] operations structure * @owner: [INTERN] owner of this driver module * @id: [INTERN] unique id number * @name: [DRIVER] unique name * @dev: [DRIVER] associated device (if relevant) * @list: [INTERN] used in maintenance of global trigger list * @alloc_list: [DRIVER] used for driver specific trigger list * @use_count: [INTERN] use count for the trigger. * @subirq_chip: [INTERN] associate 'virtual' irq chip. * @subirq_base: [INTERN] base number for irqs provided by trigger. * @subirqs: [INTERN] information about the 'child' irqs. * @pool: [INTERN] bitmap of irqs currently in use. * @pool_lock: [INTERN] protection of the irq pool. * @attached_own_device:[INTERN] if we are using our own device as trigger, * i.e. if we registered a poll function to the same * device as the one providing the trigger. * @reenable_work: [INTERN] work item used to ensure reenable can sleep. **/ struct iio_trigger { const struct iio_trigger_ops *ops; struct module *owner; int id; const char *name; struct device dev; struct list_head list; struct list_head alloc_list; atomic_t use_count; struct irq_chip subirq_chip; int subirq_base; struct iio_subirq subirqs[CONFIG_IIO_CONSUMERS_PER_TRIGGER]; unsigned long pool[BITS_TO_LONGS(CONFIG_IIO_CONSUMERS_PER_TRIGGER)]; struct mutex pool_lock; bool attached_own_device; struct work_struct reenable_work; }; static inline struct iio_trigger *to_iio_trigger(struct device *d) { return container_of(d, struct iio_trigger, dev); } static inline void iio_trigger_put(struct iio_trigger *trig) { module_put(trig->owner); put_device(&trig->dev); } static inline struct iio_trigger *iio_trigger_get(struct iio_trigger *trig) { get_device(&trig->dev); __module_get(trig->owner); return trig; } /** * iio_trigger_set_drvdata() - Set trigger driver data * @trig: IIO trigger structure * @data: Driver specific data * * Allows to attach an arbitrary pointer to an IIO trigger, which can later be * retrieved by iio_trigger_get_drvdata(). */ static inline void iio_trigger_set_drvdata(struct iio_trigger *trig, void *data) { dev_set_drvdata(&trig->dev, data); } /** * iio_trigger_get_drvdata() - Get trigger driver data * @trig: IIO trigger structure * * Returns the data previously set with iio_trigger_set_drvdata() */ static inline void *iio_trigger_get_drvdata(struct iio_trigger *trig) { return dev_get_drvdata(&trig->dev); } /** * iio_trigger_register() - register a trigger with the IIO core * @trig_info: trigger to be registered **/ #define iio_trigger_register(trig_info) \ __iio_trigger_register((trig_info), THIS_MODULE) int __iio_trigger_register(struct iio_trigger *trig_info, struct module *this_mod); #define devm_iio_trigger_register(dev, trig_info) \ __devm_iio_trigger_register((dev), (trig_info), THIS_MODULE) int __devm_iio_trigger_register(struct device *dev, struct iio_trigger *trig_info, struct module *this_mod); /** * iio_trigger_unregister() - unregister a trigger from the core * @trig_info: trigger to be unregistered **/ void iio_trigger_unregister(struct iio_trigger *trig_info); /** * iio_trigger_set_immutable() - set an immutable trigger on destination * * @indio_dev: IIO device structure containing the device * @trig: trigger to assign to device * **/ int iio_trigger_set_immutable(struct iio_dev *indio_dev, struct iio_trigger *trig); /** * iio_trigger_poll() - called on a trigger occurring * @trig: trigger which occurred * * Typically called in relevant hardware interrupt handler. **/ void iio_trigger_poll(struct iio_trigger *trig); void iio_trigger_poll_chained(struct iio_trigger *trig); irqreturn_t iio_trigger_generic_data_rdy_poll(int irq, void *private); __printf(2, 3) struct iio_trigger *iio_trigger_alloc(struct device *parent, const char *fmt, ...); void iio_trigger_free(struct iio_trigger *trig); /** * iio_trigger_using_own() - tells us if we use our own HW trigger ourselves * @indio_dev: device to check */ bool iio_trigger_using_own(struct iio_dev *indio_dev); int iio_trigger_validate_own_device(struct iio_trigger *trig, struct iio_dev *indio_dev); #else struct iio_trigger; struct iio_trigger_ops; #endif #endif /* _IIO_TRIGGER_H_ */ PK ! u�tA A iio/machine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industrial I/O in kernel access map definitions for board files. * * Copyright (c) 2011 Jonathan Cameron */ #ifndef __LINUX_IIO_MACHINE_H__ #define __LINUX_IIO_MACHINE_H__ /** * struct iio_map - description of link between consumer and device channels * @adc_channel_label: Label used to identify the channel on the provider. * This is matched against the datasheet_name element * of struct iio_chan_spec. * @consumer_dev_name: Name to uniquely identify the consumer device. * @consumer_channel: Unique name used to identify the channel on the * consumer side. * @consumer_data: Data about the channel for use by the consumer driver. */ struct iio_map { const char *adc_channel_label; const char *consumer_dev_name; const char *consumer_channel; void *consumer_data; }; #define IIO_MAP(_provider_channel, _consumer_dev_name, _consumer_channel) \ { \ .adc_channel_label = _provider_channel, \ .consumer_dev_name = _consumer_dev_name, \ .consumer_channel = _consumer_channel, \ } #endif PK ! x���� � iio/driver.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industrial I/O in kernel access map interface. * * Copyright (c) 2011 Jonathan Cameron */ #ifndef _IIO_INKERN_H_ #define _IIO_INKERN_H_ struct iio_dev; struct iio_map; /** * iio_map_array_register() - tell the core about inkernel consumers * @indio_dev: provider device * @map: array of mappings specifying association of channel with client */ int iio_map_array_register(struct iio_dev *indio_dev, struct iio_map *map); /** * iio_map_array_unregister() - tell the core to remove consumer mappings for * the given provider device * @indio_dev: provider device */ int iio_map_array_unregister(struct iio_dev *indio_dev); #endif PK ! c\�� � iio/kfifo_buf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_IIO_KFIFO_BUF_H__ #define __LINUX_IIO_KFIFO_BUF_H__ struct iio_buffer; struct iio_buffer_setup_ops; struct iio_dev; struct device; struct iio_buffer *iio_kfifo_allocate(void); void iio_kfifo_free(struct iio_buffer *r); int devm_iio_kfifo_buffer_setup_ext(struct device *dev, struct iio_dev *indio_dev, int mode_flags, const struct iio_buffer_setup_ops *setup_ops, const struct attribute **buffer_attrs); #define devm_iio_kfifo_buffer_setup(dev, indio_dev, mode_flags, setup_ops) \ devm_iio_kfifo_buffer_setup_ext((dev), (indio_dev), (mode_flags), (setup_ops), NULL) #endif PK ! ��k�n n iio/buffer-dmaengine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2014-2015 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __IIO_DMAENGINE_H__ #define __IIO_DMAENGINE_H__ struct iio_dev; struct device; int devm_iio_dmaengine_buffer_setup(struct device *dev, struct iio_dev *indio_dev, const char *channel); #endif PK ! [�c�� � iio/sw_trigger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industrial I/O software trigger interface * * Copyright (c) 2015 Intel Corporation */ #ifndef __IIO_SW_TRIGGER #define __IIO_SW_TRIGGER #include <linux/module.h> #include <linux/device.h> #include <linux/iio/iio.h> #include <linux/configfs.h> #define module_iio_sw_trigger_driver(__iio_sw_trigger_type) \ module_driver(__iio_sw_trigger_type, iio_register_sw_trigger_type, \ iio_unregister_sw_trigger_type) struct iio_sw_trigger_ops; struct iio_sw_trigger_type { const char *name; struct module *owner; const struct iio_sw_trigger_ops *ops; struct list_head list; struct config_group *group; }; struct iio_sw_trigger { struct iio_trigger *trigger; struct iio_sw_trigger_type *trigger_type; struct config_group group; }; struct iio_sw_trigger_ops { struct iio_sw_trigger* (*probe)(const char *); int (*remove)(struct iio_sw_trigger *); }; static inline struct iio_sw_trigger *to_iio_sw_trigger(struct config_item *item) { return container_of(to_config_group(item), struct iio_sw_trigger, group); } int iio_register_sw_trigger_type(struct iio_sw_trigger_type *tt); void iio_unregister_sw_trigger_type(struct iio_sw_trigger_type *tt); struct iio_sw_trigger *iio_sw_trigger_create(const char *, const char *); void iio_sw_trigger_destroy(struct iio_sw_trigger *); int iio_sw_trigger_type_configfs_register(struct iio_sw_trigger_type *tt); void iio_sw_trigger_type_configfs_unregister(struct iio_sw_trigger_type *tt); static inline void iio_swt_group_init_type_name(struct iio_sw_trigger *t, const char *name, const struct config_item_type *type) { #if IS_ENABLED(CONFIG_CONFIGFS_FS) config_group_init_type_name(&t->group, name, type); #endif } #endif /* __IIO_SW_TRIGGER */ PK ! �DwwM M iio/gyro/itg3200.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * itg3200.h -- support InvenSense ITG3200 * Digital 3-Axis Gyroscope driver * * Copyright (c) 2011 Christian Strobel <christian.strobel@iis.fraunhofer.de> * Copyright (c) 2011 Manuel Stahl <manuel.stahl@iis.fraunhofer.de> * Copyright (c) 2012 Thorsten Nowak <thorsten.nowak@iis.fraunhofer.de> */ #ifndef I2C_ITG3200_H_ #define I2C_ITG3200_H_ #include <linux/iio/iio.h> /* Register with I2C address (34h) */ #define ITG3200_REG_ADDRESS 0x00 /* Sample rate divider * Range: 0 to 255 * Default value: 0x00 */ #define ITG3200_REG_SAMPLE_RATE_DIV 0x15 /* Digital low pass filter settings */ #define ITG3200_REG_DLPF 0x16 /* DLPF full scale range */ #define ITG3200_DLPF_FS_SEL_2000 0x18 /* Bandwidth (Hz) and internal sample rate * (kHz) of DLPF */ #define ITG3200_DLPF_256_8 0x00 #define ITG3200_DLPF_188_1 0x01 #define ITG3200_DLPF_98_1 0x02 #define ITG3200_DLPF_42_1 0x03 #define ITG3200_DLPF_20_1 0x04 #define ITG3200_DLPF_10_1 0x05 #define ITG3200_DLPF_5_1 0x06 #define ITG3200_DLPF_CFG_MASK 0x07 /* Configuration for interrupt operations */ #define ITG3200_REG_IRQ_CONFIG 0x17 /* Logic level */ #define ITG3200_IRQ_ACTIVE_LOW 0x80 #define ITG3200_IRQ_ACTIVE_HIGH 0x00 /* Drive type */ #define ITG3200_IRQ_OPEN_DRAIN 0x40 #define ITG3200_IRQ_PUSH_PULL 0x00 /* Latch mode */ #define ITG3200_IRQ_LATCH_UNTIL_CLEARED 0x20 #define ITG3200_IRQ_LATCH_50US_PULSE 0x00 /* Latch clear method */ #define ITG3200_IRQ_LATCH_CLEAR_ANY 0x10 #define ITG3200_IRQ_LATCH_CLEAR_STATUS 0x00 /* Enable interrupt when device is ready */ #define ITG3200_IRQ_DEVICE_RDY_ENABLE 0x04 /* Enable interrupt when data is available */ #define ITG3200_IRQ_DATA_RDY_ENABLE 0x01 /* Determine the status of ITG-3200 interrupts */ #define ITG3200_REG_IRQ_STATUS 0x1A /* Status of 'device is ready'-interrupt */ #define ITG3200_IRQ_DEVICE_RDY_STATUS 0x04 /* Status of 'data is available'-interrupt */ #define ITG3200_IRQ_DATA_RDY_STATUS 0x01 /* Sensor registers */ #define ITG3200_REG_TEMP_OUT_H 0x1B #define ITG3200_REG_TEMP_OUT_L 0x1C #define ITG3200_REG_GYRO_XOUT_H 0x1D #define ITG3200_REG_GYRO_XOUT_L 0x1E #define ITG3200_REG_GYRO_YOUT_H 0x1F #define ITG3200_REG_GYRO_YOUT_L 0x20 #define ITG3200_REG_GYRO_ZOUT_H 0x21 #define ITG3200_REG_GYRO_ZOUT_L 0x22 /* Power management */ #define ITG3200_REG_POWER_MANAGEMENT 0x3E /* Reset device and internal registers to the * power-up-default settings */ #define ITG3200_RESET 0x80 /* Enable low power sleep mode */ #define ITG3200_SLEEP 0x40 /* Put according gyroscope in standby mode */ #define ITG3200_STANDBY_GYRO_X 0x20 #define ITG3200_STANDBY_GYRO_Y 0x10 #define ITG3200_STANDBY_GYRO_Z 0x08 /* Determine the device clock source */ #define ITG3200_CLK_INTERNAL 0x00 #define ITG3200_CLK_GYRO_X 0x01 #define ITG3200_CLK_GYRO_Y 0x02 #define ITG3200_CLK_GYRO_Z 0x03 #define ITG3200_CLK_EXT_32K 0x04 #define ITG3200_CLK_EXT_19M 0x05 /** * struct itg3200 - device instance specific data * @i2c: actual i2c_client * @trig: data ready trigger from itg3200 pin **/ struct itg3200 { struct i2c_client *i2c; struct iio_trigger *trig; struct iio_mount_matrix orientation; }; enum ITG3200_SCAN_INDEX { ITG3200_SCAN_TEMP, ITG3200_SCAN_GYRO_X, ITG3200_SCAN_GYRO_Y, ITG3200_SCAN_GYRO_Z, ITG3200_SCAN_ELEMENTS, }; int itg3200_write_reg_8(struct iio_dev *indio_dev, u8 reg_address, u8 val); int itg3200_read_reg_8(struct iio_dev *indio_dev, u8 reg_address, u8 *val); #ifdef CONFIG_IIO_BUFFER void itg3200_remove_trigger(struct iio_dev *indio_dev); int itg3200_probe_trigger(struct iio_dev *indio_dev); int itg3200_buffer_configure(struct iio_dev *indio_dev); void itg3200_buffer_unconfigure(struct iio_dev *indio_dev); #else /* CONFIG_IIO_BUFFER */ static inline void itg3200_remove_trigger(struct iio_dev *indio_dev) { } static inline int itg3200_probe_trigger(struct iio_dev *indio_dev) { return 0; } static inline int itg3200_buffer_configure(struct iio_dev *indio_dev) { return 0; } static inline void itg3200_buffer_unconfigure(struct iio_dev *indio_dev) { } #endif /* CONFIG_IIO_BUFFER */ #endif /* ITG3200_H_ */ PK ! �dn�=e =e iio/iio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* The industrial I/O core * * Copyright (c) 2008 Jonathan Cameron */ #ifndef _INDUSTRIAL_IO_H_ #define _INDUSTRIAL_IO_H_ #include <linux/device.h> #include <linux/cdev.h> #include <linux/iio/types.h> #include <linux/of.h> /* IIO TODO LIST */ /* * Provide means of adjusting timer accuracy. * Currently assumes nano seconds. */ enum iio_shared_by { IIO_SEPARATE, IIO_SHARED_BY_TYPE, IIO_SHARED_BY_DIR, IIO_SHARED_BY_ALL }; enum iio_endian { IIO_CPU, IIO_BE, IIO_LE, }; struct iio_chan_spec; struct iio_dev; /** * struct iio_chan_spec_ext_info - Extended channel info attribute * @name: Info attribute name * @shared: Whether this attribute is shared between all channels. * @read: Read callback for this info attribute, may be NULL. * @write: Write callback for this info attribute, may be NULL. * @private: Data private to the driver. */ struct iio_chan_spec_ext_info { const char *name; enum iio_shared_by shared; ssize_t (*read)(struct iio_dev *, uintptr_t private, struct iio_chan_spec const *, char *buf); ssize_t (*write)(struct iio_dev *, uintptr_t private, struct iio_chan_spec const *, const char *buf, size_t len); uintptr_t private; }; /** * struct iio_enum - Enum channel info attribute * @items: An array of strings. * @num_items: Length of the item array. * @set: Set callback function, may be NULL. * @get: Get callback function, may be NULL. * * The iio_enum struct can be used to implement enum style channel attributes. * Enum style attributes are those which have a set of strings which map to * unsigned integer values. The IIO enum helper code takes care of mapping * between value and string as well as generating a "_available" file which * contains a list of all available items. The set callback will be called when * the attribute is updated. The last parameter is the index to the newly * activated item. The get callback will be used to query the currently active * item and is supposed to return the index for it. */ struct iio_enum { const char * const *items; unsigned int num_items; int (*set)(struct iio_dev *, const struct iio_chan_spec *, unsigned int); int (*get)(struct iio_dev *, const struct iio_chan_spec *); }; ssize_t iio_enum_available_read(struct iio_dev *indio_dev, uintptr_t priv, const struct iio_chan_spec *chan, char *buf); ssize_t iio_enum_read(struct iio_dev *indio_dev, uintptr_t priv, const struct iio_chan_spec *chan, char *buf); ssize_t iio_enum_write(struct iio_dev *indio_dev, uintptr_t priv, const struct iio_chan_spec *chan, const char *buf, size_t len); /** * IIO_ENUM() - Initialize enum extended channel attribute * @_name: Attribute name * @_shared: Whether the attribute is shared between all channels * @_e: Pointer to an iio_enum struct * * This should usually be used together with IIO_ENUM_AVAILABLE() */ #define IIO_ENUM(_name, _shared, _e) \ { \ .name = (_name), \ .shared = (_shared), \ .read = iio_enum_read, \ .write = iio_enum_write, \ .private = (uintptr_t)(_e), \ } /** * IIO_ENUM_AVAILABLE() - Initialize enum available extended channel attribute * @_name: Attribute name ("_available" will be appended to the name) * @_e: Pointer to an iio_enum struct * * Creates a read only attribute which lists all the available enum items in a * space separated list. This should usually be used together with IIO_ENUM() */ #define IIO_ENUM_AVAILABLE(_name, _e) \ { \ .name = (_name "_available"), \ .shared = IIO_SHARED_BY_TYPE, \ .read = iio_enum_available_read, \ .private = (uintptr_t)(_e), \ } /** * struct iio_mount_matrix - iio mounting matrix * @rotation: 3 dimensional space rotation matrix defining sensor alignment with * main hardware */ struct iio_mount_matrix { const char *rotation[9]; }; ssize_t iio_show_mount_matrix(struct iio_dev *indio_dev, uintptr_t priv, const struct iio_chan_spec *chan, char *buf); int iio_read_mount_matrix(struct device *dev, struct iio_mount_matrix *matrix); typedef const struct iio_mount_matrix * (iio_get_mount_matrix_t)(const struct iio_dev *indio_dev, const struct iio_chan_spec *chan); /** * IIO_MOUNT_MATRIX() - Initialize mount matrix extended channel attribute * @_shared: Whether the attribute is shared between all channels * @_get: Pointer to an iio_get_mount_matrix_t accessor */ #define IIO_MOUNT_MATRIX(_shared, _get) \ { \ .name = "mount_matrix", \ .shared = (_shared), \ .read = iio_show_mount_matrix, \ .private = (uintptr_t)(_get), \ } /** * struct iio_event_spec - specification for a channel event * @type: Type of the event * @dir: Direction of the event * @mask_separate: Bit mask of enum iio_event_info values. Attributes * set in this mask will be registered per channel. * @mask_shared_by_type: Bit mask of enum iio_event_info values. Attributes * set in this mask will be shared by channel type. * @mask_shared_by_dir: Bit mask of enum iio_event_info values. Attributes * set in this mask will be shared by channel type and * direction. * @mask_shared_by_all: Bit mask of enum iio_event_info values. Attributes * set in this mask will be shared by all channels. */ struct iio_event_spec { enum iio_event_type type; enum iio_event_direction dir; unsigned long mask_separate; unsigned long mask_shared_by_type; unsigned long mask_shared_by_dir; unsigned long mask_shared_by_all; }; /** * struct iio_chan_spec - specification of a single channel * @type: What type of measurement is the channel making. * @channel: What number do we wish to assign the channel. * @channel2: If there is a second number for a differential * channel then this is it. If modified is set then the * value here specifies the modifier. * @address: Driver specific identifier. * @scan_index: Monotonic index to give ordering in scans when read * from a buffer. * @scan_type: struct describing the scan type * @scan_type.sign: 's' or 'u' to specify signed or unsigned * @scan_type.realbits: Number of valid bits of data * @scan_type.storagebits: Realbits + padding * @scan_type.shift: Shift right by this before masking out * realbits. * @scan_type.repeat: Number of times real/storage bits repeats. * When the repeat element is more than 1, then * the type element in sysfs will show a repeat * value. Otherwise, the number of repetitions * is omitted. * @scan_type.endianness: little or big endian * @info_mask_separate: What information is to be exported that is specific to * this channel. * @info_mask_separate_available: What availability information is to be * exported that is specific to this channel. * @info_mask_shared_by_type: What information is to be exported that is shared * by all channels of the same type. * @info_mask_shared_by_type_available: What availability information is to be * exported that is shared by all channels of the same * type. * @info_mask_shared_by_dir: What information is to be exported that is shared * by all channels of the same direction. * @info_mask_shared_by_dir_available: What availability information is to be * exported that is shared by all channels of the same * direction. * @info_mask_shared_by_all: What information is to be exported that is shared * by all channels. * @info_mask_shared_by_all_available: What availability information is to be * exported that is shared by all channels. * @event_spec: Array of events which should be registered for this * channel. * @num_event_specs: Size of the event_spec array. * @ext_info: Array of extended info attributes for this channel. * The array is NULL terminated, the last element should * have its name field set to NULL. * @extend_name: Allows labeling of channel attributes with an * informative name. Note this has no effect codes etc, * unlike modifiers. * @datasheet_name: A name used in in-kernel mapping of channels. It should * correspond to the first name that the channel is referred * to by in the datasheet (e.g. IND), or the nearest * possible compound name (e.g. IND-INC). * @modified: Does a modifier apply to this channel. What these are * depends on the channel type. Modifier is set in * channel2. Examples are IIO_MOD_X for axial sensors about * the 'x' axis. * @indexed: Specify the channel has a numerical index. If not, * the channel index number will be suppressed for sysfs * attributes but not for event codes. * @output: Channel is output. * @differential: Channel is differential. */ struct iio_chan_spec { enum iio_chan_type type; int channel; int channel2; unsigned long address; int scan_index; struct { char sign; u8 realbits; u8 storagebits; u8 shift; u8 repeat; enum iio_endian endianness; } scan_type; long info_mask_separate; long info_mask_separate_available; long info_mask_shared_by_type; long info_mask_shared_by_type_available; long info_mask_shared_by_dir; long info_mask_shared_by_dir_available; long info_mask_shared_by_all; long info_mask_shared_by_all_available; const struct iio_event_spec *event_spec; unsigned int num_event_specs; const struct iio_chan_spec_ext_info *ext_info; const char *extend_name; const char *datasheet_name; unsigned modified:1; unsigned indexed:1; unsigned output:1; unsigned differential:1; }; /** * iio_channel_has_info() - Checks whether a channel supports a info attribute * @chan: The channel to be queried * @type: Type of the info attribute to be checked * * Returns true if the channels supports reporting values for the given info * attribute type, false otherwise. */ static inline bool iio_channel_has_info(const struct iio_chan_spec *chan, enum iio_chan_info_enum type) { return (chan->info_mask_separate & BIT(type)) | (chan->info_mask_shared_by_type & BIT(type)) | (chan->info_mask_shared_by_dir & BIT(type)) | (chan->info_mask_shared_by_all & BIT(type)); } /** * iio_channel_has_available() - Checks if a channel has an available attribute * @chan: The channel to be queried * @type: Type of the available attribute to be checked * * Returns true if the channel supports reporting available values for the * given attribute type, false otherwise. */ static inline bool iio_channel_has_available(const struct iio_chan_spec *chan, enum iio_chan_info_enum type) { return (chan->info_mask_separate_available & BIT(type)) | (chan->info_mask_shared_by_type_available & BIT(type)) | (chan->info_mask_shared_by_dir_available & BIT(type)) | (chan->info_mask_shared_by_all_available & BIT(type)); } #define IIO_CHAN_SOFT_TIMESTAMP(_si) { \ .type = IIO_TIMESTAMP, \ .channel = -1, \ .scan_index = _si, \ .scan_type = { \ .sign = 's', \ .realbits = 64, \ .storagebits = 64, \ }, \ } s64 iio_get_time_ns(const struct iio_dev *indio_dev); unsigned int iio_get_time_res(const struct iio_dev *indio_dev); /* Device operating modes */ #define INDIO_DIRECT_MODE 0x01 #define INDIO_BUFFER_TRIGGERED 0x02 #define INDIO_BUFFER_SOFTWARE 0x04 #define INDIO_BUFFER_HARDWARE 0x08 #define INDIO_EVENT_TRIGGERED 0x10 #define INDIO_HARDWARE_TRIGGERED 0x20 #define INDIO_ALL_BUFFER_MODES \ (INDIO_BUFFER_TRIGGERED | INDIO_BUFFER_HARDWARE | INDIO_BUFFER_SOFTWARE) #define INDIO_ALL_TRIGGERED_MODES \ (INDIO_BUFFER_TRIGGERED \ | INDIO_EVENT_TRIGGERED \ | INDIO_HARDWARE_TRIGGERED) #define INDIO_MAX_RAW_ELEMENTS 4 struct iio_trigger; /* forward declaration */ /** * struct iio_info - constant information about device * @event_attrs: event control attributes * @attrs: general purpose device attributes * @read_raw: function to request a value from the device. * mask specifies which value. Note 0 means a reading of * the channel in question. Return value will specify the * type of value returned by the device. val and val2 will * contain the elements making up the returned value. * @read_raw_multi: function to return values from the device. * mask specifies which value. Note 0 means a reading of * the channel in question. Return value will specify the * type of value returned by the device. vals pointer * contain the elements making up the returned value. * max_len specifies maximum number of elements * vals pointer can contain. val_len is used to return * length of valid elements in vals. * @read_avail: function to return the available values from the device. * mask specifies which value. Note 0 means the available * values for the channel in question. Return value * specifies if a IIO_AVAIL_LIST or a IIO_AVAIL_RANGE is * returned in vals. The type of the vals are returned in * type and the number of vals is returned in length. For * ranges, there are always three vals returned; min, step * and max. For lists, all possible values are enumerated. * @write_raw: function to write a value to the device. * Parameters are the same as for read_raw. * @read_label: function to request label name for a specified label, * for better channel identification. * @write_raw_get_fmt: callback function to query the expected * format/precision. If not set by the driver, write_raw * returns IIO_VAL_INT_PLUS_MICRO. * @read_event_config: find out if the event is enabled. * @write_event_config: set if the event is enabled. * @read_event_value: read a configuration value associated with the event. * @write_event_value: write a configuration value for the event. * @validate_trigger: function to validate the trigger when the * current trigger gets changed. * @update_scan_mode: function to configure device and scan buffer when * channels have changed * @debugfs_reg_access: function to read or write register value of device * @of_xlate: function pointer to obtain channel specifier index. * When #iio-cells is greater than '0', the driver could * provide a custom of_xlate function that reads the * *args* and returns the appropriate index in registered * IIO channels array. * @hwfifo_set_watermark: function pointer to set the current hardware * fifo watermark level; see hwfifo_* entries in * Documentation/ABI/testing/sysfs-bus-iio for details on * how the hardware fifo operates * @hwfifo_flush_to_buffer: function pointer to flush the samples stored * in the hardware fifo to the device buffer. The driver * should not flush more than count samples. The function * must return the number of samples flushed, 0 if no * samples were flushed or a negative integer if no samples * were flushed and there was an error. **/ struct iio_info { const struct attribute_group *event_attrs; const struct attribute_group *attrs; int (*read_raw)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask); int (*read_raw_multi)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int max_len, int *vals, int *val_len, long mask); int (*read_avail)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, const int **vals, int *type, int *length, long mask); int (*write_raw)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask); int (*read_label)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, char *label); int (*write_raw_get_fmt)(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, long mask); int (*read_event_config)(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir); int (*write_event_config)(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, int state); int (*read_event_value)(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2); int (*write_event_value)(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2); int (*validate_trigger)(struct iio_dev *indio_dev, struct iio_trigger *trig); int (*update_scan_mode)(struct iio_dev *indio_dev, const unsigned long *scan_mask); int (*debugfs_reg_access)(struct iio_dev *indio_dev, unsigned reg, unsigned writeval, unsigned *readval); int (*of_xlate)(struct iio_dev *indio_dev, const struct of_phandle_args *iiospec); int (*hwfifo_set_watermark)(struct iio_dev *indio_dev, unsigned val); int (*hwfifo_flush_to_buffer)(struct iio_dev *indio_dev, unsigned count); }; /** * struct iio_buffer_setup_ops - buffer setup related callbacks * @preenable: [DRIVER] function to run prior to marking buffer enabled * @postenable: [DRIVER] function to run after marking buffer enabled * @predisable: [DRIVER] function to run prior to marking buffer * disabled * @postdisable: [DRIVER] function to run after marking buffer disabled * @validate_scan_mask: [DRIVER] function callback to check whether a given * scan mask is valid for the device. */ struct iio_buffer_setup_ops { int (*preenable)(struct iio_dev *); int (*postenable)(struct iio_dev *); int (*predisable)(struct iio_dev *); int (*postdisable)(struct iio_dev *); bool (*validate_scan_mask)(struct iio_dev *indio_dev, const unsigned long *scan_mask); }; /** * struct iio_dev - industrial I/O device * @modes: [DRIVER] operating modes supported by device * @currentmode: [DRIVER] current operating mode * @dev: [DRIVER] device structure, should be assigned a parent * and owner * @buffer: [DRIVER] any buffer present * @scan_bytes: [INTERN] num bytes captured to be fed to buffer demux * @mlock: [INTERN] lock used to prevent simultaneous device state * changes * @available_scan_masks: [DRIVER] optional array of allowed bitmasks * @masklength: [INTERN] the length of the mask established from * channels * @active_scan_mask: [INTERN] union of all scan masks requested by buffers * @scan_timestamp: [INTERN] set if any buffers have requested timestamp * @trig: [INTERN] current device trigger (buffer modes) * @pollfunc: [DRIVER] function run on trigger being received * @pollfunc_event: [DRIVER] function run on events trigger being received * @channels: [DRIVER] channel specification structure table * @num_channels: [DRIVER] number of channels specified in @channels. * @name: [DRIVER] name of the device. * @label: [DRIVER] unique name to identify which device this is * @info: [DRIVER] callbacks and constant info from driver * @setup_ops: [DRIVER] callbacks to call before and after buffer * enable/disable * @priv: [DRIVER] reference to driver's private information * **MUST** be accessed **ONLY** via iio_priv() helper */ struct iio_dev { int modes; int currentmode; struct device dev; struct iio_buffer *buffer; int scan_bytes; struct mutex mlock; const unsigned long *available_scan_masks; unsigned masklength; const unsigned long *active_scan_mask; bool scan_timestamp; struct iio_trigger *trig; struct iio_poll_func *pollfunc; struct iio_poll_func *pollfunc_event; struct iio_chan_spec const *channels; int num_channels; const char *name; const char *label; const struct iio_info *info; const struct iio_buffer_setup_ops *setup_ops; void *priv; }; int iio_device_id(struct iio_dev *indio_dev); int iio_device_get_current_mode(struct iio_dev *indio_dev); bool iio_buffer_enabled(struct iio_dev *indio_dev); const struct iio_chan_spec *iio_find_channel_from_si(struct iio_dev *indio_dev, int si); /** * iio_device_register() - register a device with the IIO subsystem * @indio_dev: Device structure filled by the device driver **/ #define iio_device_register(indio_dev) \ __iio_device_register((indio_dev), THIS_MODULE) int __iio_device_register(struct iio_dev *indio_dev, struct module *this_mod); void iio_device_unregister(struct iio_dev *indio_dev); /** * devm_iio_device_register - Resource-managed iio_device_register() * @dev: Device to allocate iio_dev for * @indio_dev: Device structure filled by the device driver * * Managed iio_device_register. The IIO device registered with this * function is automatically unregistered on driver detach. This function * calls iio_device_register() internally. Refer to that function for more * information. * * RETURNS: * 0 on success, negative error number on failure. */ #define devm_iio_device_register(dev, indio_dev) \ __devm_iio_device_register((dev), (indio_dev), THIS_MODULE) int __devm_iio_device_register(struct device *dev, struct iio_dev *indio_dev, struct module *this_mod); int iio_push_event(struct iio_dev *indio_dev, u64 ev_code, s64 timestamp); int iio_device_claim_direct_mode(struct iio_dev *indio_dev); void iio_device_release_direct_mode(struct iio_dev *indio_dev); int iio_device_claim_buffer_mode(struct iio_dev *indio_dev); void iio_device_release_buffer_mode(struct iio_dev *indio_dev); extern struct bus_type iio_bus_type; /** * iio_device_put() - reference counted deallocation of struct device * @indio_dev: IIO device structure containing the device **/ static inline void iio_device_put(struct iio_dev *indio_dev) { if (indio_dev) put_device(&indio_dev->dev); } clockid_t iio_device_get_clock(const struct iio_dev *indio_dev); int iio_device_set_clock(struct iio_dev *indio_dev, clockid_t clock_id); /** * dev_to_iio_dev() - Get IIO device struct from a device struct * @dev: The device embedded in the IIO device * * Note: The device must be a IIO device, otherwise the result is undefined. */ static inline struct iio_dev *dev_to_iio_dev(struct device *dev) { return container_of(dev, struct iio_dev, dev); } /** * iio_device_get() - increment reference count for the device * @indio_dev: IIO device structure * * Returns: The passed IIO device **/ static inline struct iio_dev *iio_device_get(struct iio_dev *indio_dev) { return indio_dev ? dev_to_iio_dev(get_device(&indio_dev->dev)) : NULL; } /** * iio_device_set_parent() - assign parent device to the IIO device object * @indio_dev: IIO device structure * @parent: reference to parent device object * * This utility must be called between IIO device allocation * (via devm_iio_device_alloc()) & IIO device registration * (via iio_device_register() and devm_iio_device_register())). * By default, the device allocation will also assign a parent device to * the IIO device object. In cases where devm_iio_device_alloc() is used, * sometimes the parent device must be different than the device used to * manage the allocation. * In that case, this helper should be used to change the parent, hence the * requirement to call this between allocation & registration. **/ static inline void iio_device_set_parent(struct iio_dev *indio_dev, struct device *parent) { indio_dev->dev.parent = parent; } /** * iio_device_set_drvdata() - Set device driver data * @indio_dev: IIO device structure * @data: Driver specific data * * Allows to attach an arbitrary pointer to an IIO device, which can later be * retrieved by iio_device_get_drvdata(). */ static inline void iio_device_set_drvdata(struct iio_dev *indio_dev, void *data) { dev_set_drvdata(&indio_dev->dev, data); } /** * iio_device_get_drvdata() - Get device driver data * @indio_dev: IIO device structure * * Returns the data previously set with iio_device_set_drvdata() */ static inline void *iio_device_get_drvdata(const struct iio_dev *indio_dev) { return dev_get_drvdata(&indio_dev->dev); } /* Can we make this smaller? */ #define IIO_ALIGN L1_CACHE_BYTES struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv); /* The information at the returned address is guaranteed to be cacheline aligned */ static inline void *iio_priv(const struct iio_dev *indio_dev) { return indio_dev->priv; } void iio_device_free(struct iio_dev *indio_dev); struct iio_dev *devm_iio_device_alloc(struct device *parent, int sizeof_priv); __printf(2, 3) struct iio_trigger *devm_iio_trigger_alloc(struct device *parent, const char *fmt, ...); /** * iio_get_debugfs_dentry() - helper function to get the debugfs_dentry * @indio_dev: IIO device structure for device **/ #if defined(CONFIG_DEBUG_FS) struct dentry *iio_get_debugfs_dentry(struct iio_dev *indio_dev); #else static inline struct dentry *iio_get_debugfs_dentry(struct iio_dev *indio_dev) { return NULL; } #endif ssize_t iio_format_value(char *buf, unsigned int type, int size, int *vals); int iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, int *fract); /** * IIO_DEGREE_TO_RAD() - Convert degree to rad * @deg: A value in degree * * Returns the given value converted from degree to rad */ #define IIO_DEGREE_TO_RAD(deg) (((deg) * 314159ULL + 9000000ULL) / 18000000ULL) /** * IIO_RAD_TO_DEGREE() - Convert rad to degree * @rad: A value in rad * * Returns the given value converted from rad to degree */ #define IIO_RAD_TO_DEGREE(rad) \ (((rad) * 18000000ULL + 314159ULL / 2) / 314159ULL) /** * IIO_G_TO_M_S_2() - Convert g to meter / second**2 * @g: A value in g * * Returns the given value converted from g to meter / second**2 */ #define IIO_G_TO_M_S_2(g) ((g) * 980665ULL / 100000ULL) /** * IIO_M_S_2_TO_G() - Convert meter / second**2 to g * @ms2: A value in meter / second**2 * * Returns the given value converted from meter / second**2 to g */ #define IIO_M_S_2_TO_G(ms2) (((ms2) * 100000ULL + 980665ULL / 2) / 980665ULL) #endif /* _INDUSTRIAL_IO_H_ */ PK ! ���� � iio/trigger_consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* The industrial I/O core, trigger consumer functions * * Copyright (c) 2008-2011 Jonathan Cameron */ #ifndef __LINUX_IIO_TRIGGER_CONSUMER_H__ #define __LINUX_IIO_TRIGGER_CONSUMER_H__ #include <linux/interrupt.h> #include <linux/types.h> struct iio_dev; struct iio_trigger; /** * struct iio_poll_func - poll function pair * * @indio_dev: data specific to device (passed into poll func) * @h: the function that is actually run on trigger * @thread: threaded interrupt part * @type: the type of interrupt (basically if oneshot) * @name: name used to identify the trigger consumer. * @irq: the corresponding irq as allocated from the * trigger pool * @timestamp: some devices need a timestamp grabbed as soon * as possible after the trigger - hence handler * passes it via here. **/ struct iio_poll_func { struct iio_dev *indio_dev; irqreturn_t (*h)(int irq, void *p); irqreturn_t (*thread)(int irq, void *p); int type; char *name; int irq; s64 timestamp; }; __printf(5, 6) struct iio_poll_func *iio_alloc_pollfunc(irqreturn_t (*h)(int irq, void *p), irqreturn_t (*thread)(int irq, void *p), int type, struct iio_dev *indio_dev, const char *fmt, ...); void iio_dealloc_pollfunc(struct iio_poll_func *pf); irqreturn_t iio_pollfunc_store_time(int irq, void *p); void iio_trigger_notify_done(struct iio_trigger *trig); #endif PK ! ��;�� � iio/buffer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* The industrial I/O core - generic buffer interfaces. * * Copyright (c) 2008 Jonathan Cameron */ #ifndef _IIO_BUFFER_GENERIC_H_ #define _IIO_BUFFER_GENERIC_H_ #include <linux/sysfs.h> #include <linux/iio/iio.h> struct iio_buffer; int iio_push_to_buffers(struct iio_dev *indio_dev, const void *data); /** * iio_push_to_buffers_with_timestamp() - push data and timestamp to buffers * @indio_dev: iio_dev structure for device. * @data: sample data * @timestamp: timestamp for the sample data * * Pushes data to the IIO device's buffers. If timestamps are enabled for the * device the function will store the supplied timestamp as the last element in * the sample data buffer before pushing it to the device buffers. The sample * data buffer needs to be large enough to hold the additional timestamp * (usually the buffer should be indio->scan_bytes bytes large). * * Returns 0 on success, a negative error code otherwise. */ static inline int iio_push_to_buffers_with_timestamp(struct iio_dev *indio_dev, void *data, int64_t timestamp) { if (indio_dev->scan_timestamp) { size_t ts_offset = indio_dev->scan_bytes / sizeof(int64_t) - 1; ((int64_t *)data)[ts_offset] = timestamp; } return iio_push_to_buffers(indio_dev, data); } bool iio_validate_scan_mask_onehot(struct iio_dev *indio_dev, const unsigned long *mask); int iio_device_attach_buffer(struct iio_dev *indio_dev, struct iio_buffer *buffer); #endif /* _IIO_BUFFER_GENERIC_H_ */ PK ! �(�� iio/configfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industrial I/O configfs support * * Copyright (c) 2015 Intel Corporation */ #ifndef __IIO_CONFIGFS #define __IIO_CONFIGFS extern struct configfs_subsystem iio_configfs_subsys; #endif /* __IIO_CONFIGFS */ PK ! �m�uW W iio/types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* industrial I/O data types needed both in and out of kernel * * Copyright (c) 2008 Jonathan Cameron */ #ifndef _IIO_TYPES_H_ #define _IIO_TYPES_H_ #include <uapi/linux/iio/types.h> enum iio_event_info { IIO_EV_INFO_ENABLE, IIO_EV_INFO_VALUE, IIO_EV_INFO_HYSTERESIS, IIO_EV_INFO_PERIOD, IIO_EV_INFO_HIGH_PASS_FILTER_3DB, IIO_EV_INFO_LOW_PASS_FILTER_3DB, IIO_EV_INFO_TIMEOUT, }; #define IIO_VAL_INT 1 #define IIO_VAL_INT_PLUS_MICRO 2 #define IIO_VAL_INT_PLUS_NANO 3 #define IIO_VAL_INT_PLUS_MICRO_DB 4 #define IIO_VAL_INT_MULTIPLE 5 #define IIO_VAL_FRACTIONAL 10 #define IIO_VAL_FRACTIONAL_LOG2 11 #define IIO_VAL_CHAR 12 enum iio_available_type { IIO_AVAIL_LIST, IIO_AVAIL_RANGE, }; enum iio_chan_info_enum { IIO_CHAN_INFO_RAW = 0, IIO_CHAN_INFO_PROCESSED, IIO_CHAN_INFO_SCALE, IIO_CHAN_INFO_OFFSET, IIO_CHAN_INFO_CALIBSCALE, IIO_CHAN_INFO_CALIBBIAS, IIO_CHAN_INFO_PEAK, IIO_CHAN_INFO_PEAK_SCALE, IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW, IIO_CHAN_INFO_AVERAGE_RAW, IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY, IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY, IIO_CHAN_INFO_SAMP_FREQ, IIO_CHAN_INFO_FREQUENCY, IIO_CHAN_INFO_PHASE, IIO_CHAN_INFO_HARDWAREGAIN, IIO_CHAN_INFO_HYSTERESIS, IIO_CHAN_INFO_HYSTERESIS_RELATIVE, IIO_CHAN_INFO_INT_TIME, IIO_CHAN_INFO_ENABLE, IIO_CHAN_INFO_CALIBHEIGHT, IIO_CHAN_INFO_CALIBWEIGHT, IIO_CHAN_INFO_DEBOUNCE_COUNT, IIO_CHAN_INFO_DEBOUNCE_TIME, IIO_CHAN_INFO_CALIBEMISSIVITY, IIO_CHAN_INFO_OVERSAMPLING_RATIO, IIO_CHAN_INFO_THERMOCOUPLE_TYPE, IIO_CHAN_INFO_CALIBAMBIENT, }; #endif /* _IIO_TYPES_H_ */ PK ! �&:R R iio/buffer-dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2013-2015 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __INDUSTRIALIO_DMA_BUFFER_H__ #define __INDUSTRIALIO_DMA_BUFFER_H__ #include <linux/list.h> #include <linux/kref.h> #include <linux/spinlock.h> #include <linux/mutex.h> #include <linux/iio/buffer_impl.h> struct iio_dma_buffer_queue; struct iio_dma_buffer_ops; struct device; struct iio_buffer_block { u32 size; u32 bytes_used; }; /** * enum iio_block_state - State of a struct iio_dma_buffer_block * @IIO_BLOCK_STATE_DEQUEUED: Block is not queued * @IIO_BLOCK_STATE_QUEUED: Block is on the incoming queue * @IIO_BLOCK_STATE_ACTIVE: Block is currently being processed by the DMA * @IIO_BLOCK_STATE_DONE: Block is on the outgoing queue * @IIO_BLOCK_STATE_DEAD: Block has been marked as to be freed */ enum iio_block_state { IIO_BLOCK_STATE_DEQUEUED, IIO_BLOCK_STATE_QUEUED, IIO_BLOCK_STATE_ACTIVE, IIO_BLOCK_STATE_DONE, IIO_BLOCK_STATE_DEAD, }; /** * struct iio_dma_buffer_block - IIO buffer block * @head: List head * @size: Total size of the block in bytes * @bytes_used: Number of bytes that contain valid data * @vaddr: Virutal address of the blocks memory * @phys_addr: Physical address of the blocks memory * @queue: Parent DMA buffer queue * @kref: kref used to manage the lifetime of block * @state: Current state of the block */ struct iio_dma_buffer_block { /* May only be accessed by the owner of the block */ struct list_head head; size_t bytes_used; /* * Set during allocation, constant thereafter. May be accessed read-only * by anybody holding a reference to the block. */ void *vaddr; dma_addr_t phys_addr; size_t size; struct iio_dma_buffer_queue *queue; /* Must not be accessed outside the core. */ struct kref kref; /* * Must not be accessed outside the core. Access needs to hold * queue->list_lock if the block is not owned by the core. */ enum iio_block_state state; }; /** * struct iio_dma_buffer_queue_fileio - FileIO state for the DMA buffer * @blocks: Buffer blocks used for fileio * @active_block: Block being used in read() * @pos: Read offset in the active block * @block_size: Size of each block */ struct iio_dma_buffer_queue_fileio { struct iio_dma_buffer_block *blocks[2]; struct iio_dma_buffer_block *active_block; size_t pos; size_t block_size; }; /** * struct iio_dma_buffer_queue - DMA buffer base structure * @buffer: IIO buffer base structure * @dev: Parent device * @ops: DMA buffer callbacks * @lock: Protects the incoming list, active and the fields in the fileio * substruct * @list_lock: Protects lists that contain blocks which can be modified in * atomic context as well as blocks on those lists. This is the outgoing queue * list and typically also a list of active blocks in the part that handles * the DMA controller * @incoming: List of buffers on the incoming queue * @outgoing: List of buffers on the outgoing queue * @active: Whether the buffer is currently active * @fileio: FileIO state */ struct iio_dma_buffer_queue { struct iio_buffer buffer; struct device *dev; const struct iio_dma_buffer_ops *ops; struct mutex lock; spinlock_t list_lock; struct list_head incoming; struct list_head outgoing; bool active; struct iio_dma_buffer_queue_fileio fileio; }; /** * struct iio_dma_buffer_ops - DMA buffer callback operations * @submit: Called when a block is submitted to the DMA controller * @abort: Should abort all pending transfers */ struct iio_dma_buffer_ops { int (*submit)(struct iio_dma_buffer_queue *queue, struct iio_dma_buffer_block *block); void (*abort)(struct iio_dma_buffer_queue *queue); }; void iio_dma_buffer_block_done(struct iio_dma_buffer_block *block); void iio_dma_buffer_block_list_abort(struct iio_dma_buffer_queue *queue, struct list_head *list); int iio_dma_buffer_enable(struct iio_buffer *buffer, struct iio_dev *indio_dev); int iio_dma_buffer_disable(struct iio_buffer *buffer, struct iio_dev *indio_dev); int iio_dma_buffer_read(struct iio_buffer *buffer, size_t n, char __user *user_buffer); size_t iio_dma_buffer_data_available(struct iio_buffer *buffer); int iio_dma_buffer_set_bytes_per_datum(struct iio_buffer *buffer, size_t bpd); int iio_dma_buffer_set_length(struct iio_buffer *buffer, unsigned int length); int iio_dma_buffer_request_update(struct iio_buffer *buffer); int iio_dma_buffer_init(struct iio_dma_buffer_queue *queue, struct device *dma_dev, const struct iio_dma_buffer_ops *ops); void iio_dma_buffer_exit(struct iio_dma_buffer_queue *queue); void iio_dma_buffer_release(struct iio_dma_buffer_queue *queue); #endif PK ! 4�Z Z iio/hw-consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Industrial I/O in kernel hardware consumer interface * * Copyright 2017 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef LINUX_IIO_HW_CONSUMER_H #define LINUX_IIO_HW_CONSUMER_H struct iio_hw_consumer; struct iio_hw_consumer *iio_hw_consumer_alloc(struct device *dev); void iio_hw_consumer_free(struct iio_hw_consumer *hwc); struct iio_hw_consumer *devm_iio_hw_consumer_alloc(struct device *dev); int iio_hw_consumer_enable(struct iio_hw_consumer *hwc); void iio_hw_consumer_disable(struct iio_hw_consumer *hwc); #endif PK ! o �q� � ! iio/common/cros_ec_sensors_core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ChromeOS EC sensor hub * * Copyright (C) 2016 Google, Inc */ #ifndef __CROS_EC_SENSORS_CORE_H #define __CROS_EC_SENSORS_CORE_H #include <linux/iio/iio.h> #include <linux/irqreturn.h> #include <linux/platform_data/cros_ec_commands.h> #include <linux/platform_data/cros_ec_proto.h> #include <linux/platform_data/cros_ec_sensorhub.h> enum { CROS_EC_SENSOR_X, CROS_EC_SENSOR_Y, CROS_EC_SENSOR_Z, CROS_EC_SENSOR_MAX_AXIS, }; /* EC returns sensor values using signed 16 bit registers */ #define CROS_EC_SENSOR_BITS 16 /* * 4 16 bit channels are allowed. * Good enough for current sensors, they use up to 3 16 bit vectors. */ #define CROS_EC_SAMPLE_SIZE (sizeof(s64) * 2) typedef irqreturn_t (*cros_ec_sensors_capture_t)(int irq, void *p); /** * struct cros_ec_sensors_core_state - state data for EC sensors IIO driver * @ec: cros EC device structure * @cmd_lock: lock used to prevent simultaneous access to the * commands. * @msg: cros EC command structure * @param: motion sensor parameters structure * @resp: motion sensor response structure * @type: type of motion sensor * @loc: location where the motion sensor is placed * @range_updated: True if the range of the sensor has been * updated. * @curr_range: If updated, the current range value. * It will be reapplied at every resume. * @calib: calibration parameters. Note that trigger * captured data will always provide the calibrated * data * @samples: static array to hold data from a single capture. * For each channel we need 2 bytes, except for * the timestamp. The timestamp is always last and * is always 8-byte aligned. * @read_ec_sensors_data: function used for accessing sensors values * @fifo_max_event_count: Size of the EC sensor FIFO * @frequencies: Table of known available frequencies: * 0, Min and Max in mHz */ struct cros_ec_sensors_core_state { struct cros_ec_device *ec; struct mutex cmd_lock; struct cros_ec_command *msg; struct ec_params_motion_sense param; struct ec_response_motion_sense *resp; enum motionsensor_type type; enum motionsensor_location loc; bool range_updated; int curr_range; struct calib_data { s16 offset; u16 scale; } calib[CROS_EC_SENSOR_MAX_AXIS]; s8 sign[CROS_EC_SENSOR_MAX_AXIS]; u8 samples[CROS_EC_SAMPLE_SIZE] __aligned(8); int (*read_ec_sensors_data)(struct iio_dev *indio_dev, unsigned long scan_mask, s16 *data); u32 fifo_max_event_count; int frequencies[6]; }; int cros_ec_sensors_read_lpc(struct iio_dev *indio_dev, unsigned long scan_mask, s16 *data); int cros_ec_sensors_read_cmd(struct iio_dev *indio_dev, unsigned long scan_mask, s16 *data); struct platform_device; int cros_ec_sensors_core_init(struct platform_device *pdev, struct iio_dev *indio_dev, bool physical_device, cros_ec_sensors_capture_t trigger_capture); int cros_ec_sensors_core_register(struct device *dev, struct iio_dev *indio_dev, cros_ec_sensorhub_push_data_cb_t push_data); irqreturn_t cros_ec_sensors_capture(int irq, void *p); int cros_ec_sensors_push_data(struct iio_dev *indio_dev, s16 *data, s64 timestamp); int cros_ec_motion_send_host_cmd(struct cros_ec_sensors_core_state *st, u16 opt_length); int cros_ec_sensors_core_read(struct cros_ec_sensors_core_state *st, struct iio_chan_spec const *chan, int *val, int *val2, long mask); int cros_ec_sensors_core_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, const int **vals, int *type, int *length, long mask); int cros_ec_sensors_core_write(struct cros_ec_sensors_core_state *st, struct iio_chan_spec const *chan, int val, int val2, long mask); extern const struct dev_pm_ops cros_ec_sensors_pm_ops; /* List of extended channel specification for all sensors. */ extern const struct iio_chan_spec_ext_info cros_ec_sensors_ext_info[]; #endif /* __CROS_EC_SENSORS_CORE_H */ PK ! Ź鷰 � iio/common/st_sensors_spi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * STMicroelectronics sensors spi library driver * * Copyright 2012-2013 STMicroelectronics Inc. * * Denis Ciocca <denis.ciocca@st.com> */ #ifndef ST_SENSORS_SPI_H #define ST_SENSORS_SPI_H #include <linux/spi/spi.h> #include <linux/iio/common/st_sensors.h> int st_sensors_spi_configure(struct iio_dev *indio_dev, struct spi_device *spi); #endif /* ST_SENSORS_SPI_H */ PK ! ���"( "( iio/common/st_sensors.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * STMicroelectronics sensors library driver * * Copyright 2012-2013 STMicroelectronics Inc. * * Denis Ciocca <denis.ciocca@st.com> */ #ifndef ST_SENSORS_H #define ST_SENSORS_H #include <linux/i2c.h> #include <linux/spi/spi.h> #include <linux/irqreturn.h> #include <linux/iio/iio.h> #include <linux/iio/trigger.h> #include <linux/bitops.h> #include <linux/regulator/consumer.h> #include <linux/regmap.h> #include <linux/platform_data/st_sensors_pdata.h> #define LSM9DS0_IMU_DEV_NAME "lsm9ds0" /* * Buffer size max case: 2bytes per channel, 3 channels in total + * 8bytes timestamp channel (s64) */ #define ST_SENSORS_MAX_BUFFER_SIZE (ALIGN(2 * 3, sizeof(s64)) + \ sizeof(s64)) #define ST_SENSORS_ODR_LIST_MAX 10 #define ST_SENSORS_FULLSCALE_AVL_MAX 10 #define ST_SENSORS_NUMBER_ALL_CHANNELS 4 #define ST_SENSORS_ENABLE_ALL_AXIS 0x07 #define ST_SENSORS_SCAN_X 0 #define ST_SENSORS_SCAN_Y 1 #define ST_SENSORS_SCAN_Z 2 #define ST_SENSORS_DEFAULT_POWER_ON_VALUE 0x01 #define ST_SENSORS_DEFAULT_POWER_OFF_VALUE 0x00 #define ST_SENSORS_DEFAULT_WAI_ADDRESS 0x0f #define ST_SENSORS_DEFAULT_AXIS_ADDR 0x20 #define ST_SENSORS_DEFAULT_AXIS_MASK 0x07 #define ST_SENSORS_DEFAULT_AXIS_N_BIT 3 #define ST_SENSORS_DEFAULT_STAT_ADDR 0x27 #define ST_SENSORS_MAX_NAME 17 #define ST_SENSORS_MAX_4WAI 8 #define ST_SENSORS_LSM_CHANNELS_EXT(device_type, mask, index, mod, \ ch2, s, endian, rbits, sbits, addr, ext) \ { \ .type = device_type, \ .modified = mod, \ .info_mask_separate = mask, \ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ .scan_index = index, \ .channel2 = ch2, \ .address = addr, \ .scan_type = { \ .sign = s, \ .realbits = rbits, \ .shift = sbits - rbits, \ .storagebits = sbits, \ .endianness = endian, \ }, \ .ext_info = ext, \ } #define ST_SENSORS_LSM_CHANNELS(device_type, mask, index, mod, \ ch2, s, endian, rbits, sbits, addr) \ ST_SENSORS_LSM_CHANNELS_EXT(device_type, mask, index, mod, \ ch2, s, endian, rbits, sbits, addr, NULL) #define ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL() \ IIO_DEV_ATTR_SAMP_FREQ_AVAIL( \ st_sensors_sysfs_sampling_frequency_avail) #define ST_SENSORS_DEV_ATTR_SCALE_AVAIL(name) \ IIO_DEVICE_ATTR(name, S_IRUGO, \ st_sensors_sysfs_scale_avail, NULL , 0); struct st_sensor_odr_avl { unsigned int hz; u8 value; }; struct st_sensor_odr { u8 addr; u8 mask; struct st_sensor_odr_avl odr_avl[ST_SENSORS_ODR_LIST_MAX]; }; struct st_sensor_power { u8 addr; u8 mask; u8 value_off; u8 value_on; }; struct st_sensor_axis { u8 addr; u8 mask; }; struct st_sensor_fullscale_avl { unsigned int num; u8 value; unsigned int gain; unsigned int gain2; }; struct st_sensor_fullscale { u8 addr; u8 mask; struct st_sensor_fullscale_avl fs_avl[ST_SENSORS_FULLSCALE_AVL_MAX]; }; struct st_sensor_sim { u8 addr; u8 value; }; /** * struct st_sensor_bdu - ST sensor device block data update * @addr: address of the register. * @mask: mask to write the block data update flag. */ struct st_sensor_bdu { u8 addr; u8 mask; }; /** * struct st_sensor_das - ST sensor device data alignment selection * @addr: address of the register. * @mask: mask to write the das flag for left alignment. */ struct st_sensor_das { u8 addr; u8 mask; }; /** * struct st_sensor_int_drdy - ST sensor device drdy line parameters * @addr: address of INT drdy register. * @mask: mask to enable drdy line. * @addr_od: address to enable/disable Open Drain on the INT line. * @mask_od: mask to enable/disable Open Drain on the INT line. */ struct st_sensor_int_drdy { u8 addr; u8 mask; u8 addr_od; u8 mask_od; }; /** * struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt * struct int1 - data-ready configuration register for INT1 pin. * struct int2 - data-ready configuration register for INT2 pin. * @addr_ihl: address to enable/disable active low on the INT lines. * @mask_ihl: mask to enable/disable active low on the INT lines. * struct stat_drdy - status register of DRDY (data ready) interrupt. * struct ig1 - represents the Interrupt Generator 1 of sensors. * @en_addr: address of the enable ig1 register. * @en_mask: mask to write the on/off value for enable. */ struct st_sensor_data_ready_irq { struct st_sensor_int_drdy int1; struct st_sensor_int_drdy int2; u8 addr_ihl; u8 mask_ihl; struct { u8 addr; u8 mask; } stat_drdy; struct { u8 en_addr; u8 en_mask; } ig1; }; /** * struct st_sensor_settings - ST specific sensor settings * @wai: Contents of WhoAmI register. * @wai_addr: The address of WhoAmI register. * @sensors_supported: List of supported sensors by struct itself. * @ch: IIO channels for the sensor. * @odr: Output data rate register and ODR list available. * @pw: Power register of the sensor. * @enable_axis: Enable one or more axis of the sensor. * @fs: Full scale register and full scale list available. * @bdu: Block data update register. * @das: Data Alignment Selection register. * @drdy_irq: Data ready register of the sensor. * @sim: SPI serial interface mode register of the sensor. * @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read. * @bootime: samples to discard when sensor passing from power-down to power-up. */ struct st_sensor_settings { u8 wai; u8 wai_addr; char sensors_supported[ST_SENSORS_MAX_4WAI][ST_SENSORS_MAX_NAME]; struct iio_chan_spec *ch; int num_ch; struct st_sensor_odr odr; struct st_sensor_power pw; struct st_sensor_axis enable_axis; struct st_sensor_fullscale fs; struct st_sensor_bdu bdu; struct st_sensor_das das; struct st_sensor_data_ready_irq drdy_irq; struct st_sensor_sim sim; bool multi_read_bit; unsigned int bootime; }; /** * struct st_sensor_data - ST sensor device status * @dev: Pointer to instance of struct device (I2C or SPI). * @trig: The trigger in use by the core driver. * @mount_matrix: The mounting matrix of the sensor. * @sensor_settings: Pointer to the specific sensor settings in use. * @current_fullscale: Maximum range of measure by the sensor. * @vdd: Pointer to sensor's Vdd power supply * @vdd_io: Pointer to sensor's Vdd-IO power supply * @regmap: Pointer to specific sensor regmap configuration. * @enabled: Status of the sensor (false->off, true->on). * @odr: Output data rate of the sensor [Hz]. * num_data_channels: Number of data channels used in buffer. * @drdy_int_pin: Redirect DRDY on pin 1 (1) or pin 2 (2). * @int_pin_open_drain: Set the interrupt/DRDY to open drain. * @irq: the IRQ number. * @edge_irq: the IRQ triggers on edges and need special handling. * @hw_irq_trigger: if we're using the hardware interrupt on the sensor. * @hw_timestamp: Latest timestamp from the interrupt handler, when in use. * @buffer_data: Data used by buffer part. * @odr_lock: Local lock for preventing concurrent ODR accesses/changes */ struct st_sensor_data { struct device *dev; struct iio_trigger *trig; struct iio_mount_matrix mount_matrix; struct st_sensor_settings *sensor_settings; struct st_sensor_fullscale_avl *current_fullscale; struct regulator *vdd; struct regulator *vdd_io; struct regmap *regmap; bool enabled; unsigned int odr; unsigned int num_data_channels; u8 drdy_int_pin; bool int_pin_open_drain; int irq; bool edge_irq; bool hw_irq_trigger; s64 hw_timestamp; char buffer_data[ST_SENSORS_MAX_BUFFER_SIZE] ____cacheline_aligned; struct mutex odr_lock; }; #ifdef CONFIG_IIO_BUFFER irqreturn_t st_sensors_trigger_handler(int irq, void *p); #endif #ifdef CONFIG_IIO_TRIGGER int st_sensors_allocate_trigger(struct iio_dev *indio_dev, const struct iio_trigger_ops *trigger_ops); void st_sensors_deallocate_trigger(struct iio_dev *indio_dev); int st_sensors_validate_device(struct iio_trigger *trig, struct iio_dev *indio_dev); #else static inline int st_sensors_allocate_trigger(struct iio_dev *indio_dev, const struct iio_trigger_ops *trigger_ops) { return 0; } static inline void st_sensors_deallocate_trigger(struct iio_dev *indio_dev) { return; } #define st_sensors_validate_device NULL #endif int st_sensors_init_sensor(struct iio_dev *indio_dev, struct st_sensors_platform_data *pdata); int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable); int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable); int st_sensors_power_enable(struct iio_dev *indio_dev); void st_sensors_power_disable(struct iio_dev *indio_dev); int st_sensors_debugfs_reg_access(struct iio_dev *indio_dev, unsigned reg, unsigned writeval, unsigned *readval); int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr); int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable); int st_sensors_set_fullscale_by_gain(struct iio_dev *indio_dev, int scale); int st_sensors_read_info_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *ch, int *val); int st_sensors_get_settings_index(const char *name, const struct st_sensor_settings *list, const int list_length); int st_sensors_verify_id(struct iio_dev *indio_dev); ssize_t st_sensors_sysfs_sampling_frequency_avail(struct device *dev, struct device_attribute *attr, char *buf); ssize_t st_sensors_sysfs_scale_avail(struct device *dev, struct device_attribute *attr, char *buf); void st_sensors_dev_name_probe(struct device *dev, char *name, int len); /* Accelerometer */ const struct st_sensor_settings *st_accel_get_settings(const char *name); int st_accel_common_probe(struct iio_dev *indio_dev); void st_accel_common_remove(struct iio_dev *indio_dev); /* Gyroscope */ const struct st_sensor_settings *st_gyro_get_settings(const char *name); int st_gyro_common_probe(struct iio_dev *indio_dev); void st_gyro_common_remove(struct iio_dev *indio_dev); /* Magnetometer */ const struct st_sensor_settings *st_magn_get_settings(const char *name); int st_magn_common_probe(struct iio_dev *indio_dev); void st_magn_common_remove(struct iio_dev *indio_dev); /* Pressure */ const struct st_sensor_settings *st_press_get_settings(const char *name); int st_press_common_probe(struct iio_dev *indio_dev); void st_press_common_remove(struct iio_dev *indio_dev); #endif /* ST_SENSORS_H */ PK ! ) �]� � iio/common/st_sensors_i2c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * STMicroelectronics sensors i2c library driver * * Copyright 2012-2013 STMicroelectronics Inc. * * Denis Ciocca <denis.ciocca@st.com> */ #ifndef ST_SENSORS_I2C_H #define ST_SENSORS_I2C_H #include <linux/i2c.h> #include <linux/iio/common/st_sensors.h> int st_sensors_i2c_configure(struct iio_dev *indio_dev, struct i2c_client *client); #endif /* ST_SENSORS_I2C_H */ PK ! �8�<� � iio/common/ssp_sensors.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2014, Samsung Electronics Co. Ltd. All Rights Reserved. */ #ifndef _SSP_SENSORS_H_ #define _SSP_SENSORS_H_ #include <linux/iio/iio.h> #define SSP_TIME_SIZE 4 #define SSP_ACCELEROMETER_SIZE 6 #define SSP_GYROSCOPE_SIZE 6 #define SSP_BIO_HRM_RAW_SIZE 8 #define SSP_BIO_HRM_RAW_FAC_SIZE 36 #define SSP_BIO_HRM_LIB_SIZE 8 /** * enum ssp_sensor_type - SSP sensor type */ enum ssp_sensor_type { SSP_ACCELEROMETER_SENSOR = 0, SSP_GYROSCOPE_SENSOR, SSP_GEOMAGNETIC_UNCALIB_SENSOR, SSP_GEOMAGNETIC_RAW, SSP_GEOMAGNETIC_SENSOR, SSP_PRESSURE_SENSOR, SSP_GESTURE_SENSOR, SSP_PROXIMITY_SENSOR, SSP_TEMPERATURE_HUMIDITY_SENSOR, SSP_LIGHT_SENSOR, SSP_PROXIMITY_RAW, SSP_ORIENTATION_SENSOR, SSP_STEP_DETECTOR, SSP_SIG_MOTION_SENSOR, SSP_GYRO_UNCALIB_SENSOR, SSP_GAME_ROTATION_VECTOR, SSP_ROTATION_VECTOR, SSP_STEP_COUNTER, SSP_BIO_HRM_RAW, SSP_BIO_HRM_RAW_FAC, SSP_BIO_HRM_LIB, SSP_SENSOR_MAX, }; struct ssp_data; /** * struct ssp_sensor_data - Sensor object * @process_data: Callback to feed sensor data. * @type: Used sensor type. * @buffer: Received data buffer. */ struct ssp_sensor_data { int (*process_data)(struct iio_dev *indio_dev, void *buf, int64_t timestamp); enum ssp_sensor_type type; u8 *buffer; }; void ssp_register_consumer(struct iio_dev *indio_dev, enum ssp_sensor_type type); int ssp_enable_sensor(struct ssp_data *data, enum ssp_sensor_type type, u32 delay); int ssp_disable_sensor(struct ssp_data *data, enum ssp_sensor_type type); u32 ssp_get_sensor_delay(struct ssp_data *data, enum ssp_sensor_type); int ssp_change_delay(struct ssp_data *data, enum ssp_sensor_type type, u32 delay); #endif /* _SSP_SENSORS_H_ */ PK ! � �l iio/timer/stm32-timer-trigger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) STMicroelectronics 2016 * * Author: Benjamin Gaignard <benjamin.gaignard@st.com> */ #ifndef _STM32_TIMER_TRIGGER_H_ #define _STM32_TIMER_TRIGGER_H_ #define TIM1_TRGO "tim1_trgo" #define TIM1_TRGO2 "tim1_trgo2" #define TIM1_CH1 "tim1_ch1" #define TIM1_CH2 "tim1_ch2" #define TIM1_CH3 "tim1_ch3" #define TIM1_CH4 "tim1_ch4" #define TIM2_TRGO "tim2_trgo" #define TIM2_CH1 "tim2_ch1" #define TIM2_CH2 "tim2_ch2" #define TIM2_CH3 "tim2_ch3" #define TIM2_CH4 "tim2_ch4" #define TIM3_TRGO "tim3_trgo" #define TIM3_CH1 "tim3_ch1" #define TIM3_CH2 "tim3_ch2" #define TIM3_CH3 "tim3_ch3" #define TIM3_CH4 "tim3_ch4" #define TIM4_TRGO "tim4_trgo" #define TIM4_CH1 "tim4_ch1" #define TIM4_CH2 "tim4_ch2" #define TIM4_CH3 "tim4_ch3" #define TIM4_CH4 "tim4_ch4" #define TIM5_TRGO "tim5_trgo" #define TIM5_CH1 "tim5_ch1" #define TIM5_CH2 "tim5_ch2" #define TIM5_CH3 "tim5_ch3" #define TIM5_CH4 "tim5_ch4" #define TIM6_TRGO "tim6_trgo" #define TIM7_TRGO "tim7_trgo" #define TIM8_TRGO "tim8_trgo" #define TIM8_TRGO2 "tim8_trgo2" #define TIM8_CH1 "tim8_ch1" #define TIM8_CH2 "tim8_ch2" #define TIM8_CH3 "tim8_ch3" #define TIM8_CH4 "tim8_ch4" #define TIM9_TRGO "tim9_trgo" #define TIM9_CH1 "tim9_ch1" #define TIM9_CH2 "tim9_ch2" #define TIM10_OC1 "tim10_oc1" #define TIM11_OC1 "tim11_oc1" #define TIM12_TRGO "tim12_trgo" #define TIM12_CH1 "tim12_ch1" #define TIM12_CH2 "tim12_ch2" #define TIM13_OC1 "tim13_oc1" #define TIM14_OC1 "tim14_oc1" #define TIM15_TRGO "tim15_trgo" #define TIM16_OC1 "tim16_oc1" #define TIM17_OC1 "tim17_oc1" #if IS_REACHABLE(CONFIG_IIO_STM32_TIMER_TRIGGER) bool is_stm32_timer_trigger(struct iio_trigger *trig); #else static inline bool is_stm32_timer_trigger(struct iio_trigger *trig) { #if IS_ENABLED(CONFIG_IIO_STM32_TIMER_TRIGGER) pr_warn_once("stm32-timer-trigger not linked in\n"); #endif return false; } #endif #endif PK ! #��^� � iio/timer/stm32-lptim-trigger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) STMicroelectronics 2017 * * Author: Fabrice Gasnier <fabrice.gasnier@st.com> */ #ifndef _STM32_LPTIM_TRIGGER_H_ #define _STM32_LPTIM_TRIGGER_H_ #include <linux/iio/iio.h> #include <linux/iio/trigger.h> #define LPTIM1_OUT "lptim1_out" #define LPTIM2_OUT "lptim2_out" #define LPTIM3_OUT "lptim3_out" #if IS_REACHABLE(CONFIG_IIO_STM32_LPTIMER_TRIGGER) bool is_stm32_lptim_trigger(struct iio_trigger *trig); #else static inline bool is_stm32_lptim_trigger(struct iio_trigger *trig) { #if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER) pr_warn_once("stm32 lptim_trigger not linked in\n"); #endif return false; } #endif #endif PK ! DoY3 3 iio/buffer_impl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _IIO_BUFFER_GENERIC_IMPL_H_ #define _IIO_BUFFER_GENERIC_IMPL_H_ #include <linux/sysfs.h> #include <linux/kref.h> #ifdef CONFIG_IIO_BUFFER #include <uapi/linux/iio/buffer.h> struct iio_dev; struct iio_buffer; /** * INDIO_BUFFER_FLAG_FIXED_WATERMARK - Watermark level of the buffer can not be * configured. It has a fixed value which will be buffer specific. */ #define INDIO_BUFFER_FLAG_FIXED_WATERMARK BIT(0) /** * struct iio_buffer_access_funcs - access functions for buffers. * @store_to: actually store stuff to the buffer * @read: try to get a specified number of bytes (must exist) * @data_available: indicates how much data is available for reading from * the buffer. * @request_update: if a parameter change has been marked, update underlying * storage. * @set_bytes_per_datum:set number of bytes per datum * @set_length: set number of datums in buffer * @enable: called if the buffer is attached to a device and the * device starts sampling. Calls are balanced with * @disable. * @disable: called if the buffer is attached to a device and the * device stops sampling. Calles are balanced with @enable. * @release: called when the last reference to the buffer is dropped, * should free all resources allocated by the buffer. * @modes: Supported operating modes by this buffer type * @flags: A bitmask combination of INDIO_BUFFER_FLAG_* * * The purpose of this structure is to make the buffer element * modular as event for a given driver, different usecases may require * different buffer designs (space efficiency vs speed for example). * * It is worth noting that a given buffer implementation may only support a * small proportion of these functions. The core code 'should' cope fine with * any of them not existing. **/ struct iio_buffer_access_funcs { int (*store_to)(struct iio_buffer *buffer, const void *data); int (*read)(struct iio_buffer *buffer, size_t n, char __user *buf); size_t (*data_available)(struct iio_buffer *buffer); int (*request_update)(struct iio_buffer *buffer); int (*set_bytes_per_datum)(struct iio_buffer *buffer, size_t bpd); int (*set_length)(struct iio_buffer *buffer, unsigned int length); int (*enable)(struct iio_buffer *buffer, struct iio_dev *indio_dev); int (*disable)(struct iio_buffer *buffer, struct iio_dev *indio_dev); void (*release)(struct iio_buffer *buffer); unsigned int modes; unsigned int flags; }; /** * struct iio_buffer - general buffer structure * * Note that the internals of this structure should only be of interest to * those writing new buffer implementations. */ struct iio_buffer { /** @length: Number of datums in buffer. */ unsigned int length; /** @flags: File ops flags including busy flag. */ unsigned long flags; /** @bytes_per_datum: Size of individual datum including timestamp. */ size_t bytes_per_datum; /** * @access: Buffer access functions associated with the * implementation. */ const struct iio_buffer_access_funcs *access; /** @scan_mask: Bitmask used in masking scan mode elements. */ long *scan_mask; /** @demux_list: List of operations required to demux the scan. */ struct list_head demux_list; /** @pollq: Wait queue to allow for polling on the buffer. */ wait_queue_head_t pollq; /** @watermark: Number of datums to wait for poll/read. */ unsigned int watermark; /* private: */ /* @scan_timestamp: Does the scan mode include a timestamp. */ bool scan_timestamp; /* @buffer_attr_list: List of buffer attributes. */ struct list_head buffer_attr_list; /* * @buffer_group: Attributes of the new buffer group. * Includes scan elements attributes. */ struct attribute_group buffer_group; /* @attrs: Standard attributes of the buffer. */ const struct attribute **attrs; /* @demux_bounce: Buffer for doing gather from incoming scan. */ void *demux_bounce; /* @attached_entry: Entry in the devices list of buffers attached by the driver. */ struct list_head attached_entry; /* @buffer_list: Entry in the devices list of current buffers. */ struct list_head buffer_list; /* @ref: Reference count of the buffer. */ struct kref ref; }; /** * iio_update_buffers() - add or remove buffer from active list * @indio_dev: device to add buffer to * @insert_buffer: buffer to insert * @remove_buffer: buffer_to_remove * * Note this will tear down the all buffering and build it up again */ int iio_update_buffers(struct iio_dev *indio_dev, struct iio_buffer *insert_buffer, struct iio_buffer *remove_buffer); /** * iio_buffer_init() - Initialize the buffer structure * @buffer: buffer to be initialized **/ void iio_buffer_init(struct iio_buffer *buffer); struct iio_buffer *iio_buffer_get(struct iio_buffer *buffer); void iio_buffer_put(struct iio_buffer *buffer); #else /* CONFIG_IIO_BUFFER */ static inline void iio_buffer_get(struct iio_buffer *buffer) {} static inline void iio_buffer_put(struct iio_buffer *buffer) {} #endif /* CONFIG_IIO_BUFFER */ #endif /* _IIO_BUFFER_GENERIC_IMPL_H_ */ PK ! o�+�� � iio/sw_device.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industrial I/O software device interface * * Copyright (c) 2016 Intel Corporation */ #ifndef __IIO_SW_DEVICE #define __IIO_SW_DEVICE #include <linux/module.h> #include <linux/device.h> #include <linux/iio/iio.h> #include <linux/configfs.h> #define module_iio_sw_device_driver(__iio_sw_device_type) \ module_driver(__iio_sw_device_type, iio_register_sw_device_type, \ iio_unregister_sw_device_type) struct iio_sw_device_ops; struct iio_sw_device_type { const char *name; struct module *owner; const struct iio_sw_device_ops *ops; struct list_head list; struct config_group *group; }; struct iio_sw_device { struct iio_dev *device; struct iio_sw_device_type *device_type; struct config_group group; }; struct iio_sw_device_ops { struct iio_sw_device* (*probe)(const char *); int (*remove)(struct iio_sw_device *); }; static inline struct iio_sw_device *to_iio_sw_device(struct config_item *item) { return container_of(to_config_group(item), struct iio_sw_device, group); } int iio_register_sw_device_type(struct iio_sw_device_type *dt); void iio_unregister_sw_device_type(struct iio_sw_device_type *dt); struct iio_sw_device *iio_sw_device_create(const char *, const char *); void iio_sw_device_destroy(struct iio_sw_device *); int iio_sw_device_type_configfs_register(struct iio_sw_device_type *dt); void iio_sw_device_type_configfs_unregister(struct iio_sw_device_type *dt); static inline void iio_swd_group_init_type_name(struct iio_sw_device *d, const char *name, const struct config_item_type *type) { #if IS_ENABLED(CONFIG_CONFIGFS_FS) config_group_init_type_name(&d->group, name, type); #endif } #endif /* __IIO_SW_DEVICE */ PK ! ��(9� � iio/dac/mcp4725.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * MCP4725 DAC driver * * Copyright (C) 2012 Peter Meerwald <pmeerw@pmeerw.net> */ #ifndef IIO_DAC_MCP4725_H_ #define IIO_DAC_MCP4725_H_ /** * struct mcp4725_platform_data - MCP4725/6 DAC specific data. * @use_vref: Whether an external reference voltage on Vref pin should be used. * Additional vref-supply must be specified when used. * @vref_buffered: Controls buffering of the external reference voltage. * * Vref related settings are available only on MCP4756. See * Documentation/devicetree/bindings/iio/dac/microchip,mcp4725.yaml for more information. */ struct mcp4725_platform_data { bool use_vref; bool vref_buffered; }; #endif /* IIO_DAC_MCP4725_H_ */ PK ! %�4H H iio/dac/ad5421.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IIO_DAC_AD5421_H__ #define __IIO_DAC_AD5421_H__ /** * enum ad5421_current_range - Current range the AD5421 is configured for. * @AD5421_CURRENT_RANGE_4mA_20mA: 4 mA to 20 mA (RANGE1,0 pins = 00) * @AD5421_CURRENT_RANGE_3mA8_21mA: 3.8 mA to 21 mA (RANGE1,0 pins = x1) * @AD5421_CURRENT_RANGE_3mA2_24mA: 3.2 mA to 24 mA (RANGE1,0 pins = 10) */ enum ad5421_current_range { AD5421_CURRENT_RANGE_4mA_20mA, AD5421_CURRENT_RANGE_3mA8_21mA, AD5421_CURRENT_RANGE_3mA2_24mA, }; /** * struct ad5421_platform_data - AD5421 DAC driver platform data * @external_vref: whether an external reference voltage is used or not * @current_range: Current range the AD5421 is configured for */ struct ad5421_platform_data { bool external_vref; enum ad5421_current_range current_range; }; #endif PK ! ��* iio/dac/max517.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * MAX517 DAC driver * * Copyright 2011 Roland Stigge <stigge@antcom.de> */ #ifndef IIO_DAC_MAX517_H_ #define IIO_DAC_MAX517_H_ struct max517_platform_data { u16 vref_mv[8]; }; #endif /* IIO_DAC_MAX517_H_ */ PK ! ���' ' iio/dac/ad5791.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD5791 SPI DAC driver * * Copyright 2011 Analog Devices Inc. */ #ifndef SPI_AD5791_H_ #define SPI_AD5791_H_ /** * struct ad5791_platform_data - platform specific information * @vref_pos_mv: Vdd Positive Analog Supply Volatge (mV) * @vref_neg_mv: Vdd Negative Analog Supply Volatge (mV) * @use_rbuf_gain2: ext. amplifier connected in gain of two configuration */ struct ad5791_platform_data { u16 vref_pos_mv; u16 vref_neg_mv; bool use_rbuf_gain2; }; #endif /* SPI_AD5791_H_ */ PK ! \��1� � iio/dac/ad5504.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD5504 SPI DAC driver * * Copyright 2011 Analog Devices Inc. */ #ifndef SPI_AD5504_H_ #define SPI_AD5504_H_ struct ad5504_platform_data { u16 vref_mv; }; #endif /* SPI_AD5504_H_ */ PK ! p���� � iio/sysfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* The industrial I/O core * *Copyright (c) 2008 Jonathan Cameron * * General attributes */ #ifndef _INDUSTRIAL_IO_SYSFS_H_ #define _INDUSTRIAL_IO_SYSFS_H_ struct iio_buffer; struct iio_chan_spec; /** * struct iio_dev_attr - iio specific device attribute * @dev_attr: underlying device attribute * @address: associated register address * @l: list head for maintaining list of dynamically created attrs * @c: specification for the underlying channel * @buffer: the IIO buffer to which this attribute belongs to (if any) */ struct iio_dev_attr { struct device_attribute dev_attr; u64 address; struct list_head l; struct iio_chan_spec const *c; struct iio_buffer *buffer; }; #define to_iio_dev_attr(_dev_attr) \ container_of(_dev_attr, struct iio_dev_attr, dev_attr) ssize_t iio_read_const_attr(struct device *dev, struct device_attribute *attr, char *len); /** * struct iio_const_attr - constant device specific attribute * often used for things like available modes * @string: attribute string * @dev_attr: underlying device attribute */ struct iio_const_attr { const char *string; struct device_attribute dev_attr; }; #define to_iio_const_attr(_dev_attr) \ container_of(_dev_attr, struct iio_const_attr, dev_attr) /* Some attributes will be hard coded (device dependent) and not require an address, in these cases pass a negative */ #define IIO_ATTR(_name, _mode, _show, _store, _addr) \ { .dev_attr = __ATTR(_name, _mode, _show, _store), \ .address = _addr } #define IIO_ATTR_RO(_name, _addr) \ { .dev_attr = __ATTR_RO(_name), \ .address = _addr } #define IIO_ATTR_WO(_name, _addr) \ { .dev_attr = __ATTR_WO(_name), \ .address = _addr } #define IIO_ATTR_RW(_name, _addr) \ { .dev_attr = __ATTR_RW(_name), \ .address = _addr } #define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \ struct iio_dev_attr iio_dev_attr_##_name \ = IIO_ATTR(_name, _mode, _show, _store, _addr) #define IIO_DEVICE_ATTR_RO(_name, _addr) \ struct iio_dev_attr iio_dev_attr_##_name \ = IIO_ATTR_RO(_name, _addr) #define IIO_DEVICE_ATTR_WO(_name, _addr) \ struct iio_dev_attr iio_dev_attr_##_name \ = IIO_ATTR_WO(_name, _addr) #define IIO_DEVICE_ATTR_RW(_name, _addr) \ struct iio_dev_attr iio_dev_attr_##_name \ = IIO_ATTR_RW(_name, _addr) #define IIO_DEVICE_ATTR_NAMED(_vname, _name, _mode, _show, _store, _addr) \ struct iio_dev_attr iio_dev_attr_##_vname \ = IIO_ATTR(_name, _mode, _show, _store, _addr) #define IIO_CONST_ATTR(_name, _string) \ struct iio_const_attr iio_const_attr_##_name \ = { .string = _string, \ .dev_attr = __ATTR(_name, S_IRUGO, iio_read_const_attr, NULL)} #define IIO_CONST_ATTR_NAMED(_vname, _name, _string) \ struct iio_const_attr iio_const_attr_##_vname \ = { .string = _string, \ .dev_attr = __ATTR(_name, S_IRUGO, iio_read_const_attr, NULL)} /* Generic attributes of onetype or another */ /** * IIO_DEV_ATTR_SAMP_FREQ - sets any internal clock frequency * @_mode: sysfs file mode/permissions * @_show: output method for the attribute * @_store: input method for the attribute **/ #define IIO_DEV_ATTR_SAMP_FREQ(_mode, _show, _store) \ IIO_DEVICE_ATTR(sampling_frequency, _mode, _show, _store, 0) /** * IIO_DEV_ATTR_SAMP_FREQ_AVAIL - list available sampling frequencies * @_show: output method for the attribute * * May be mode dependent on some devices **/ #define IIO_DEV_ATTR_SAMP_FREQ_AVAIL(_show) \ IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO, _show, NULL, 0) /** * IIO_CONST_ATTR_SAMP_FREQ_AVAIL - list available sampling frequencies * @_string: frequency string for the attribute * * Constant version **/ #define IIO_CONST_ATTR_SAMP_FREQ_AVAIL(_string) \ IIO_CONST_ATTR(sampling_frequency_available, _string) /** * IIO_DEV_ATTR_INT_TIME_AVAIL - list available integration times * @_show: output method for the attribute **/ #define IIO_DEV_ATTR_INT_TIME_AVAIL(_show) \ IIO_DEVICE_ATTR(integration_time_available, S_IRUGO, _show, NULL, 0) /** * IIO_CONST_ATTR_INT_TIME_AVAIL - list available integration times * @_string: frequency string for the attribute * * Constant version **/ #define IIO_CONST_ATTR_INT_TIME_AVAIL(_string) \ IIO_CONST_ATTR(integration_time_available, _string) #define IIO_DEV_ATTR_TEMP_RAW(_show) \ IIO_DEVICE_ATTR(in_temp_raw, S_IRUGO, _show, NULL, 0) #define IIO_CONST_ATTR_TEMP_OFFSET(_string) \ IIO_CONST_ATTR(in_temp_offset, _string) #define IIO_CONST_ATTR_TEMP_SCALE(_string) \ IIO_CONST_ATTR(in_temp_scale, _string) #endif /* _INDUSTRIAL_IO_SYSFS_H_ */ PK ! /��S�; �; iio/consumer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industrial I/O in kernel consumer interface * * Copyright (c) 2011 Jonathan Cameron */ #ifndef _IIO_INKERN_CONSUMER_H_ #define _IIO_INKERN_CONSUMER_H_ #include <linux/types.h> #include <linux/iio/types.h> struct iio_dev; struct iio_chan_spec; struct device; struct device_node; /** * struct iio_channel - everything needed for a consumer to use a channel * @indio_dev: Device on which the channel exists. * @channel: Full description of the channel. * @data: Data about the channel used by consumer. */ struct iio_channel { struct iio_dev *indio_dev; const struct iio_chan_spec *channel; void *data; }; /** * iio_channel_get() - get description of all that is needed to access channel. * @dev: Pointer to consumer device. Device name must match * the name of the device as provided in the iio_map * with which the desired provider to consumer mapping * was registered. * @consumer_channel: Unique name to identify the channel on the consumer * side. This typically describes the channels use within * the consumer. E.g. 'battery_voltage' */ struct iio_channel *iio_channel_get(struct device *dev, const char *consumer_channel); /** * iio_channel_release() - release channels obtained via iio_channel_get * @chan: The channel to be released. */ void iio_channel_release(struct iio_channel *chan); /** * devm_iio_channel_get() - Resource managed version of iio_channel_get(). * @dev: Pointer to consumer device. Device name must match * the name of the device as provided in the iio_map * with which the desired provider to consumer mapping * was registered. * @consumer_channel: Unique name to identify the channel on the consumer * side. This typically describes the channels use within * the consumer. E.g. 'battery_voltage' * * Returns a pointer to negative errno if it is not able to get the iio channel * otherwise returns valid pointer for iio channel. * * The allocated iio channel is automatically released when the device is * unbound. */ struct iio_channel *devm_iio_channel_get(struct device *dev, const char *consumer_channel); /** * iio_channel_get_all() - get all channels associated with a client * @dev: Pointer to consumer device. * * Returns an array of iio_channel structures terminated with one with * null iio_dev pointer. * This function is used by fairly generic consumers to get all the * channels registered as having this consumer. */ struct iio_channel *iio_channel_get_all(struct device *dev); /** * iio_channel_release_all() - reverse iio_channel_get_all * @chan: Array of channels to be released. */ void iio_channel_release_all(struct iio_channel *chan); /** * devm_iio_channel_get_all() - Resource managed version of * iio_channel_get_all(). * @dev: Pointer to consumer device. * * Returns a pointer to negative errno if it is not able to get the iio channel * otherwise returns an array of iio_channel structures terminated with one with * null iio_dev pointer. * * This function is used by fairly generic consumers to get all the * channels registered as having this consumer. * * The allocated iio channels are automatically released when the device is * unbounded. */ struct iio_channel *devm_iio_channel_get_all(struct device *dev); /** * of_iio_channel_get_by_name() - get description of all that is needed to access channel. * @np: Pointer to consumer device tree node * @consumer_channel: Unique name to identify the channel on the consumer * side. This typically describes the channels use within * the consumer. E.g. 'battery_voltage' */ #ifdef CONFIG_OF struct iio_channel *of_iio_channel_get_by_name(struct device_node *np, const char *name); #else static inline struct iio_channel * of_iio_channel_get_by_name(struct device_node *np, const char *name) { return NULL; } #endif /** * devm_of_iio_channel_get_by_name() - Resource managed version of of_iio_channel_get_by_name(). * @dev: Pointer to consumer device. * @np: Pointer to consumer device tree node * @consumer_channel: Unique name to identify the channel on the consumer * side. This typically describes the channels use within * the consumer. E.g. 'battery_voltage' * * Returns a pointer to negative errno if it is not able to get the iio channel * otherwise returns valid pointer for iio channel. * * The allocated iio channel is automatically released when the device is * unbound. */ struct iio_channel *devm_of_iio_channel_get_by_name(struct device *dev, struct device_node *np, const char *consumer_channel); struct iio_cb_buffer; /** * iio_channel_get_all_cb() - register callback for triggered capture * @dev: Pointer to client device. * @cb: Callback function. * @private: Private data passed to callback. * * NB right now we have no ability to mux data from multiple devices. * So if the channels requested come from different devices this will * fail. */ struct iio_cb_buffer *iio_channel_get_all_cb(struct device *dev, int (*cb)(const void *data, void *private), void *private); /** * iio_channel_cb_set_buffer_watermark() - set the buffer watermark. * @cb_buffer: The callback buffer from whom we want the channel * information. * @watermark: buffer watermark in bytes. * * This function allows to configure the buffer watermark. */ int iio_channel_cb_set_buffer_watermark(struct iio_cb_buffer *cb_buffer, size_t watermark); /** * iio_channel_release_all_cb() - release and unregister the callback. * @cb_buffer: The callback buffer that was allocated. */ void iio_channel_release_all_cb(struct iio_cb_buffer *cb_buffer); /** * iio_channel_start_all_cb() - start the flow of data through callback. * @cb_buff: The callback buffer we are starting. */ int iio_channel_start_all_cb(struct iio_cb_buffer *cb_buff); /** * iio_channel_stop_all_cb() - stop the flow of data through the callback. * @cb_buff: The callback buffer we are stopping. */ void iio_channel_stop_all_cb(struct iio_cb_buffer *cb_buff); /** * iio_channel_cb_get_channels() - get access to the underlying channels. * @cb_buffer: The callback buffer from whom we want the channel * information. * * This function allows one to obtain information about the channels. * Whilst this may allow direct reading if all buffers are disabled, the * primary aim is to allow drivers that are consuming a channel to query * things like scaling of the channel. */ struct iio_channel *iio_channel_cb_get_channels(const struct iio_cb_buffer *cb_buffer); /** * iio_channel_cb_get_iio_dev() - get access to the underlying device. * @cb_buffer: The callback buffer from whom we want the device * information. * * This function allows one to obtain information about the device. * The primary aim is to allow drivers that are consuming a device to query * things like current trigger. */ struct iio_dev *iio_channel_cb_get_iio_dev(const struct iio_cb_buffer *cb_buffer); /** * iio_read_channel_raw() - read from a given channel * @chan: The channel being queried. * @val: Value read back. * * Note raw reads from iio channels are in adc counts and hence * scale will need to be applied if standard units required. */ int iio_read_channel_raw(struct iio_channel *chan, int *val); /** * iio_read_channel_average_raw() - read from a given channel * @chan: The channel being queried. * @val: Value read back. * * Note raw reads from iio channels are in adc counts and hence * scale will need to be applied if standard units required. * * In opposit to the normal iio_read_channel_raw this function * returns the average of multiple reads. */ int iio_read_channel_average_raw(struct iio_channel *chan, int *val); /** * iio_read_channel_processed() - read processed value from a given channel * @chan: The channel being queried. * @val: Value read back. * * Returns an error code or 0. * * This function will read a processed value from a channel. A processed value * means that this value will have the correct unit and not some device internal * representation. If the device does not support reporting a processed value * the function will query the raw value and the channels scale and offset and * do the appropriate transformation. */ int iio_read_channel_processed(struct iio_channel *chan, int *val); /** * iio_read_channel_processed_scale() - read and scale a processed value * @chan: The channel being queried. * @val: Value read back. * @scale: Scale factor to apply during the conversion * * Returns an error code or 0. * * This function will read a processed value from a channel. This will work * like @iio_read_channel_processed() but also scale with an additional * scale factor while attempting to minimize any precision loss. */ int iio_read_channel_processed_scale(struct iio_channel *chan, int *val, unsigned int scale); /** * iio_write_channel_attribute() - Write values to the device attribute. * @chan: The channel being queried. * @val: Value being written. * @val2: Value being written.val2 use depends on attribute type. * @attribute: info attribute to be read. * * Returns an error code or 0. */ int iio_write_channel_attribute(struct iio_channel *chan, int val, int val2, enum iio_chan_info_enum attribute); /** * iio_read_channel_attribute() - Read values from the device attribute. * @chan: The channel being queried. * @val: Value being written. * @val2: Value being written.Val2 use depends on attribute type. * @attribute: info attribute to be written. * * Returns an error code if failed. Else returns a description of what is in val * and val2, such as IIO_VAL_INT_PLUS_MICRO telling us we have a value of val * + val2/1e6 */ int iio_read_channel_attribute(struct iio_channel *chan, int *val, int *val2, enum iio_chan_info_enum attribute); /** * iio_write_channel_raw() - write to a given channel * @chan: The channel being queried. * @val: Value being written. * * Note raw writes to iio channels are in dac counts and hence * scale will need to be applied if standard units required. */ int iio_write_channel_raw(struct iio_channel *chan, int val); /** * iio_read_max_channel_raw() - read maximum available raw value from a given * channel, i.e. the maximum possible value. * @chan: The channel being queried. * @val: Value read back. * * Note raw reads from iio channels are in adc counts and hence * scale will need to be applied if standard units are required. */ int iio_read_max_channel_raw(struct iio_channel *chan, int *val); /** * iio_read_avail_channel_raw() - read available raw values from a given channel * @chan: The channel being queried. * @vals: Available values read back. * @length: Number of entries in vals. * * Returns an error code, IIO_AVAIL_RANGE or IIO_AVAIL_LIST. * * For ranges, three vals are always returned; min, step and max. * For lists, all the possible values are enumerated. * * Note raw available values from iio channels are in adc counts and * hence scale will need to be applied if standard units are required. */ int iio_read_avail_channel_raw(struct iio_channel *chan, const int **vals, int *length); /** * iio_read_avail_channel_attribute() - read available channel attribute values * @chan: The channel being queried. * @vals: Available values read back. * @type: Type of values read back. * @length: Number of entries in vals. * @attribute: info attribute to be read back. * * Returns an error code, IIO_AVAIL_RANGE or IIO_AVAIL_LIST. */ int iio_read_avail_channel_attribute(struct iio_channel *chan, const int **vals, int *type, int *length, enum iio_chan_info_enum attribute); /** * iio_get_channel_type() - get the type of a channel * @channel: The channel being queried. * @type: The type of the channel. * * returns the enum iio_chan_type of the channel */ int iio_get_channel_type(struct iio_channel *channel, enum iio_chan_type *type); /** * iio_read_channel_offset() - read the offset value for a channel * @chan: The channel being queried. * @val: First part of value read back. * @val2: Second part of value read back. * * Note returns a description of what is in val and val2, such * as IIO_VAL_INT_PLUS_MICRO telling us we have a value of val * + val2/1e6 */ int iio_read_channel_offset(struct iio_channel *chan, int *val, int *val2); /** * iio_read_channel_scale() - read the scale value for a channel * @chan: The channel being queried. * @val: First part of value read back. * @val2: Second part of value read back. * * Note returns a description of what is in val and val2, such * as IIO_VAL_INT_PLUS_MICRO telling us we have a value of val * + val2/1e6 */ int iio_read_channel_scale(struct iio_channel *chan, int *val, int *val2); /** * iio_convert_raw_to_processed() - Converts a raw value to a processed value * @chan: The channel being queried * @raw: The raw IIO to convert * @processed: The result of the conversion * @scale: Scale factor to apply during the conversion * * Returns an error code or 0. * * This function converts a raw value to processed value for a specific channel. * A raw value is the device internal representation of a sample and the value * returned by iio_read_channel_raw, so the unit of that value is device * depended. A processed value on the other hand is value has a normed unit * according with the IIO specification. * * The scale factor allows to increase the precession of the returned value. For * a scale factor of 1 the function will return the result in the normal IIO * unit for the channel type. E.g. millivolt for voltage channels, if you want * nanovolts instead pass 1000000 as the scale factor. */ int iio_convert_raw_to_processed(struct iio_channel *chan, int raw, int *processed, unsigned int scale); /** * iio_get_channel_ext_info_count() - get number of ext_info attributes * connected to the channel. * @chan: The channel being queried * * Returns the number of ext_info attributes */ unsigned int iio_get_channel_ext_info_count(struct iio_channel *chan); /** * iio_read_channel_ext_info() - read ext_info attribute from a given channel * @chan: The channel being queried. * @attr: The ext_info attribute to read. * @buf: Where to store the attribute value. Assumed to hold * at least PAGE_SIZE bytes. * * Returns the number of bytes written to buf (perhaps w/o zero termination; * it need not even be a string), or an error code. */ ssize_t iio_read_channel_ext_info(struct iio_channel *chan, const char *attr, char *buf); /** * iio_write_channel_ext_info() - write ext_info attribute from a given channel * @chan: The channel being queried. * @attr: The ext_info attribute to read. * @buf: The new attribute value. Strings needs to be zero- * terminated, but the terminator should not be included * in the below len. * @len: The size of the new attribute value. * * Returns the number of accepted bytes, which should be the same as len. * An error code can also be returned. */ ssize_t iio_write_channel_ext_info(struct iio_channel *chan, const char *attr, const char *buf, size_t len); #endif PK ! �؎P P iio/triggered_buffer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IIO_TRIGGERED_BUFFER_H_ #define _LINUX_IIO_TRIGGERED_BUFFER_H_ #include <linux/interrupt.h> struct attribute; struct iio_dev; struct iio_buffer_setup_ops; int iio_triggered_buffer_setup_ext(struct iio_dev *indio_dev, irqreturn_t (*h)(int irq, void *p), irqreturn_t (*thread)(int irq, void *p), const struct iio_buffer_setup_ops *setup_ops, const struct attribute **buffer_attrs); void iio_triggered_buffer_cleanup(struct iio_dev *indio_dev); #define iio_triggered_buffer_setup(indio_dev, h, thread, setup_ops) \ iio_triggered_buffer_setup_ext((indio_dev), (h), (thread), (setup_ops), NULL) int devm_iio_triggered_buffer_setup_ext(struct device *dev, struct iio_dev *indio_dev, irqreturn_t (*h)(int irq, void *p), irqreturn_t (*thread)(int irq, void *p), const struct iio_buffer_setup_ops *ops, const struct attribute **buffer_attrs); #define devm_iio_triggered_buffer_setup(dev, indio_dev, h, thread, setup_ops) \ devm_iio_triggered_buffer_setup_ext((dev), (indio_dev), (h), (thread), (setup_ops), NULL) #endif PK ! � �M M iio/accel/kxcjk_1013.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * KXCJK-1013 3-axis accelerometer Interface * Copyright (c) 2014, Intel Corporation. */ #ifndef __IIO_KXCJK_1013_H__ #define __IIO_KXCJK_1013_H__ #include <linux/iio/iio.h> struct kxcjk_1013_platform_data { bool active_high_intr; struct iio_mount_matrix orientation; }; #endif PK ! !�e �> �> iio/imu/adis.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Common library for ADIS16XXX devices * * Copyright 2012 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __IIO_ADIS_H__ #define __IIO_ADIS_H__ #include <linux/spi/spi.h> #include <linux/interrupt.h> #include <linux/iio/types.h> #define ADIS_WRITE_REG(reg) ((0x80 | (reg))) #define ADIS_READ_REG(reg) ((reg) & 0x7f) #define ADIS_PAGE_SIZE 0x80 #define ADIS_REG_PAGE_ID 0x00 struct adis; /** * struct adis_timeouts - ADIS chip variant timeouts * @reset_ms - Wait time after rst pin goes inactive * @sw_reset_ms - Wait time after sw reset command * @self_test_ms - Wait time after self test command */ struct adis_timeout { u16 reset_ms; u16 sw_reset_ms; u16 self_test_ms; }; /** * struct adis_data - ADIS chip variant specific data * @read_delay: SPI delay for read operations in us * @write_delay: SPI delay for write operations in us * @cs_change_delay: SPI delay between CS changes in us * @glob_cmd_reg: Register address of the GLOB_CMD register * @msc_ctrl_reg: Register address of the MSC_CTRL register * @diag_stat_reg: Register address of the DIAG_STAT register * @prod_id_reg: Register address of the PROD_ID register * @prod_id: Product ID code that should be expected when reading @prod_id_reg * @self_test_mask: Bitmask of supported self-test operations * @self_test_reg: Register address to request self test command * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg * @status_error_msgs: Array of error messages * @status_error_mask: Bitmask of errors supported by the device * @timeouts: Chip specific delays * @enable_irq: Hook for ADIS devices that have a special IRQ enable/disable * @unmasked_drdy: True for devices that cannot mask/unmask the data ready pin * @has_paging: True if ADIS device has paged registers * @burst_reg_cmd: Register command that triggers burst * @burst_len: Burst size in the SPI RX buffer. If @burst_max_len is defined, * this should be the minimum size supported by the device. * @burst_max_len: Holds the maximum burst size when the device supports * more than one burst mode with different sizes * @burst_max_speed_hz: Maximum spi speed that can be used in burst mode */ struct adis_data { unsigned int read_delay; unsigned int write_delay; unsigned int cs_change_delay; unsigned int glob_cmd_reg; unsigned int msc_ctrl_reg; unsigned int diag_stat_reg; unsigned int prod_id_reg; unsigned int prod_id; unsigned int self_test_mask; unsigned int self_test_reg; bool self_test_no_autoclear; const struct adis_timeout *timeouts; const char * const *status_error_msgs; unsigned int status_error_mask; int (*enable_irq)(struct adis *adis, bool enable); bool unmasked_drdy; bool has_paging; unsigned int burst_reg_cmd; unsigned int burst_len; unsigned int burst_max_len; unsigned int burst_max_speed_hz; }; /** * struct adis - ADIS device instance data * @spi: Reference to SPI device which owns this ADIS IIO device * @trig: IIO trigger object data * @data: ADIS chip variant specific data * @burst: ADIS burst transfer information * @burst_extra_len: Burst extra length. Should only be used by devices that can * dynamically change their burst mode length. * @state_lock: Lock used by the device to protect state * @msg: SPI message object * @xfer: SPI transfer objects to be used for a @msg * @current_page: Some ADIS devices have registers, this selects current page * @irq_flag: IRQ handling flags as passed to request_irq() * @buffer: Data buffer for information read from the device * @tx: DMA safe TX buffer for SPI transfers * @rx: DMA safe RX buffer for SPI transfers */ struct adis { struct spi_device *spi; struct iio_trigger *trig; const struct adis_data *data; unsigned int burst_extra_len; /** * The state_lock is meant to be used during operations that require * a sequence of SPI R/W in order to protect the SPI transfer * information (fields 'xfer', 'msg' & 'current_page') between * potential concurrent accesses. * This lock is used by all "adis_{functions}" that have to read/write * registers. These functions also have unlocked variants * (see "__adis_{functions}"), which don't hold this lock. * This allows users of the ADIS library to group SPI R/W into * the drivers, but they also must manage this lock themselves. */ struct mutex state_lock; struct spi_message msg; struct spi_transfer *xfer; unsigned int current_page; unsigned long irq_flag; void *buffer; u8 tx[10] ____cacheline_aligned; u8 rx[4]; }; int adis_init(struct adis *adis, struct iio_dev *indio_dev, struct spi_device *spi, const struct adis_data *data); int __adis_reset(struct adis *adis); /** * adis_reset() - Reset the device * @adis: The adis device * * Returns 0 on success, a negative error code otherwise */ static inline int adis_reset(struct adis *adis) { int ret; mutex_lock(&adis->state_lock); ret = __adis_reset(adis); mutex_unlock(&adis->state_lock); return ret; } int __adis_write_reg(struct adis *adis, unsigned int reg, unsigned int val, unsigned int size); int __adis_read_reg(struct adis *adis, unsigned int reg, unsigned int *val, unsigned int size); /** * __adis_write_reg_8() - Write single byte to a register (unlocked) * @adis: The adis device * @reg: The address of the register to be written * @value: The value to write */ static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg, u8 val) { return __adis_write_reg(adis, reg, val, 1); } /** * __adis_write_reg_16() - Write 2 bytes to a pair of registers (unlocked) * @adis: The adis device * @reg: The address of the lower of the two registers * @value: Value to be written */ static inline int __adis_write_reg_16(struct adis *adis, unsigned int reg, u16 val) { return __adis_write_reg(adis, reg, val, 2); } /** * __adis_write_reg_32() - write 4 bytes to four registers (unlocked) * @adis: The adis device * @reg: The address of the lower of the four register * @value: Value to be written */ static inline int __adis_write_reg_32(struct adis *adis, unsigned int reg, u32 val) { return __adis_write_reg(adis, reg, val, 4); } /** * __adis_read_reg_16() - read 2 bytes from a 16-bit register (unlocked) * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int __adis_read_reg_16(struct adis *adis, unsigned int reg, u16 *val) { unsigned int tmp; int ret; ret = __adis_read_reg(adis, reg, &tmp, 2); if (ret == 0) *val = tmp; return ret; } /** * __adis_read_reg_32() - read 4 bytes from a 32-bit register (unlocked) * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int __adis_read_reg_32(struct adis *adis, unsigned int reg, u32 *val) { unsigned int tmp; int ret; ret = __adis_read_reg(adis, reg, &tmp, 4); if (ret == 0) *val = tmp; return ret; } /** * adis_write_reg() - write N bytes to register * @adis: The adis device * @reg: The address of the lower of the two registers * @value: The value to write to device (up to 4 bytes) * @size: The size of the @value (in bytes) */ static inline int adis_write_reg(struct adis *adis, unsigned int reg, unsigned int val, unsigned int size) { int ret; mutex_lock(&adis->state_lock); ret = __adis_write_reg(adis, reg, val, size); mutex_unlock(&adis->state_lock); return ret; } /** * adis_read_reg() - read N bytes from register * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device * @size: The size of the @val buffer */ static int adis_read_reg(struct adis *adis, unsigned int reg, unsigned int *val, unsigned int size) { int ret; mutex_lock(&adis->state_lock); ret = __adis_read_reg(adis, reg, val, size); mutex_unlock(&adis->state_lock); return ret; } /** * adis_write_reg_8() - Write single byte to a register * @adis: The adis device * @reg: The address of the register to be written * @value: The value to write */ static inline int adis_write_reg_8(struct adis *adis, unsigned int reg, u8 val) { return adis_write_reg(adis, reg, val, 1); } /** * adis_write_reg_16() - Write 2 bytes to a pair of registers * @adis: The adis device * @reg: The address of the lower of the two registers * @value: Value to be written */ static inline int adis_write_reg_16(struct adis *adis, unsigned int reg, u16 val) { return adis_write_reg(adis, reg, val, 2); } /** * adis_write_reg_32() - write 4 bytes to four registers * @adis: The adis device * @reg: The address of the lower of the four register * @value: Value to be written */ static inline int adis_write_reg_32(struct adis *adis, unsigned int reg, u32 val) { return adis_write_reg(adis, reg, val, 4); } /** * adis_read_reg_16() - read 2 bytes from a 16-bit register * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int adis_read_reg_16(struct adis *adis, unsigned int reg, u16 *val) { unsigned int tmp; int ret; ret = adis_read_reg(adis, reg, &tmp, 2); if (ret == 0) *val = tmp; return ret; } /** * adis_read_reg_32() - read 4 bytes from a 32-bit register * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int adis_read_reg_32(struct adis *adis, unsigned int reg, u32 *val) { unsigned int tmp; int ret; ret = adis_read_reg(adis, reg, &tmp, 4); if (ret == 0) *val = tmp; return ret; } int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask, const u32 val, u8 size); /** * adis_update_bits_base() - ADIS Update bits function - Locked version * @adis: The adis device * @reg: The address of the lower of the two registers * @mask: Bitmask to change * @val: Value to be written * @size: Size of the register to update * * Updates the desired bits of @reg in accordance with @mask and @val. */ static inline int adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask, const u32 val, u8 size) { int ret; mutex_lock(&adis->state_lock); ret = __adis_update_bits_base(adis, reg, mask, val, size); mutex_unlock(&adis->state_lock); return ret; } /** * adis_update_bits() - Wrapper macro for adis_update_bits_base - Locked version * @adis: The adis device * @reg: The address of the lower of the two registers * @mask: Bitmask to change * @val: Value to be written * * This macro evaluates the sizeof of @val at compile time and calls * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for * @val can lead to undesired behavior if the register to update is 16bit. */ #define adis_update_bits(adis, reg, mask, val) ({ \ BUILD_BUG_ON(sizeof(val) == 1 || sizeof(val) == 8); \ __builtin_choose_expr(sizeof(val) == 4, \ adis_update_bits_base(adis, reg, mask, val, 4), \ adis_update_bits_base(adis, reg, mask, val, 2)); \ }) /** * adis_update_bits() - Wrapper macro for adis_update_bits_base * @adis: The adis device * @reg: The address of the lower of the two registers * @mask: Bitmask to change * @val: Value to be written * * This macro evaluates the sizeof of @val at compile time and calls * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for * @val can lead to undesired behavior if the register to update is 16bit. */ #define __adis_update_bits(adis, reg, mask, val) ({ \ BUILD_BUG_ON(sizeof(val) == 1 || sizeof(val) == 8); \ __builtin_choose_expr(sizeof(val) == 4, \ __adis_update_bits_base(adis, reg, mask, val, 4), \ __adis_update_bits_base(adis, reg, mask, val, 2)); \ }) int __adis_check_status(struct adis *adis); int __adis_initial_startup(struct adis *adis); int __adis_enable_irq(struct adis *adis, bool enable); static inline int adis_enable_irq(struct adis *adis, bool enable) { int ret; mutex_lock(&adis->state_lock); ret = __adis_enable_irq(adis, enable); mutex_unlock(&adis->state_lock); return ret; } static inline int adis_check_status(struct adis *adis) { int ret; mutex_lock(&adis->state_lock); ret = __adis_check_status(adis); mutex_unlock(&adis->state_lock); return ret; } /* locked version of __adis_initial_startup() */ static inline int adis_initial_startup(struct adis *adis) { int ret; mutex_lock(&adis->state_lock); ret = __adis_initial_startup(adis); mutex_unlock(&adis->state_lock); return ret; } static inline void adis_dev_lock(struct adis *adis) { mutex_lock(&adis->state_lock); } static inline void adis_dev_unlock(struct adis *adis) { mutex_unlock(&adis->state_lock); } int adis_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, unsigned int error_mask, int *val); #define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ .channel = (chan), \ .extend_name = name, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT(IIO_CHAN_INFO_SCALE), \ .info_mask_shared_by_all = info_all, \ .address = (addr), \ .scan_index = (si), \ .scan_type = { \ .sign = 'u', \ .realbits = (bits), \ .storagebits = 16, \ .endianness = IIO_BE, \ }, \ } #define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \ ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits) #define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \ ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits) #define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \ .type = IIO_TEMP, \ .indexed = 1, \ .channel = 0, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT(IIO_CHAN_INFO_SCALE) | \ BIT(IIO_CHAN_INFO_OFFSET), \ .info_mask_shared_by_all = info_all, \ .address = (addr), \ .scan_index = (si), \ .scan_type = { \ .sign = 'u', \ .realbits = (bits), \ .storagebits = 16, \ .endianness = IIO_BE, \ }, \ } #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \ .type = (_type), \ .modified = 1, \ .channel2 = IIO_MOD_ ## mod, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ (info_sep), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ .info_mask_shared_by_all = info_all, \ .address = (addr), \ .scan_index = (si), \ .scan_type = { \ .sign = 's', \ .realbits = (bits), \ .storagebits = 16, \ .endianness = IIO_BE, \ }, \ } #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \ ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits) #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \ ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits) #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \ ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits) #define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \ ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits) #ifdef CONFIG_IIO_ADIS_LIB_BUFFER int devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev, irq_handler_t trigger_handler); int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev); int adis_update_scan_mode(struct iio_dev *indio_dev, const unsigned long *scan_mask); #else /* CONFIG_IIO_BUFFER */ static inline int devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev, irq_handler_t trigger_handler) { return 0; } static inline int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev) { return 0; } #define adis_update_scan_mode NULL #endif /* CONFIG_IIO_BUFFER */ #ifdef CONFIG_DEBUG_FS int adis_debugfs_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, unsigned int *readval); #else #define adis_debugfs_reg_access NULL #endif #endif PK ! 0�� � iio/adc/adi-axi-adc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Analog Devices Generic AXI ADC IP core driver/library * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip * * Copyright 2012-2020 Analog Devices Inc. */ #ifndef __ADI_AXI_ADC_H__ #define __ADI_AXI_ADC_H__ struct device; struct iio_chan_spec; /** * struct adi_axi_adc_chip_info - Chip specific information * @name Chip name * @id Chip ID (usually product ID) * @channels Channel specifications of type @struct iio_chan_spec * @num_channels Number of @channels * @scale_table Supported scales by the chip; tuples of 2 ints * @num_scales Number of scales in the table * @max_rate Maximum sampling rate supported by the device */ struct adi_axi_adc_chip_info { const char *name; unsigned int id; const struct iio_chan_spec *channels; unsigned int num_channels; const unsigned int (*scale_table)[2]; int num_scales; unsigned long max_rate; }; /** * struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC * @chip_info chip info details for the client ADC * @preenable_setup op to run in the client before enabling the AXI ADC * @reg_access IIO debugfs_reg_access hook for the client ADC * @read_raw IIO read_raw hook for the client ADC * @write_raw IIO write_raw hook for the client ADC * @read_avail IIO read_avail hook for the client ADC */ struct adi_axi_adc_conv { const struct adi_axi_adc_chip_info *chip_info; int (*preenable_setup)(struct adi_axi_adc_conv *conv); int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg, unsigned int writeval, unsigned int *readval); int (*read_raw)(struct adi_axi_adc_conv *conv, struct iio_chan_spec const *chan, int *val, int *val2, long mask); int (*write_raw)(struct adi_axi_adc_conv *conv, struct iio_chan_spec const *chan, int val, int val2, long mask); int (*read_avail)(struct adi_axi_adc_conv *conv, struct iio_chan_spec const *chan, const int **val, int *type, int *length, long mask); }; struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, size_t sizeof_priv); void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv); #endif PK ! KJ�[ iio/adc/ad_sigma_delta.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Support code for Analog Devices Sigma-Delta ADCs * * Copyright 2012 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __AD_SIGMA_DELTA_H__ #define __AD_SIGMA_DELTA_H__ enum ad_sigma_delta_mode { AD_SD_MODE_CONTINUOUS = 0, AD_SD_MODE_SINGLE = 1, AD_SD_MODE_IDLE = 2, AD_SD_MODE_POWERDOWN = 3, }; /** * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices * @mode: Calibration mode. * @channel: Calibration channel. */ struct ad_sd_calib_data { unsigned int mode; unsigned int channel; }; struct ad_sigma_delta; struct device; struct iio_dev; /** * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options * @set_channel: Will be called to select the current channel, may be NULL. * @set_mode: Will be called to select the current mode, may be NULL. * @postprocess_sample: Is called for each sampled data word, can be used to * modify or drop the sample data, it, may be NULL. * @has_registers: true if the device has writable and readable registers, false * if there is just one read-only sample data shift register. * @addr_shift: Shift of the register address in the communications register. * @read_mask: Mask for the communications register having the read bit set. * @data_reg: Address of the data register, if 0 the default address of 0x3 will * be used. * @irq_flags: flags for the interrupt used by the triggered buffer */ struct ad_sigma_delta_info { int (*set_channel)(struct ad_sigma_delta *, unsigned int channel); int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode); int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample); bool has_registers; unsigned int addr_shift; unsigned int read_mask; unsigned int data_reg; unsigned long irq_flags; }; /** * struct ad_sigma_delta - Sigma Delta device struct * @spi: The spi device associated with the Sigma Delta device. * @trig: The IIO trigger associated with the Sigma Delta device. * * Most of the fields are private to the sigma delta library code and should not * be accessed by individual drivers. */ struct ad_sigma_delta { struct spi_device *spi; struct iio_trigger *trig; /* private: */ struct completion completion; bool irq_dis; bool bus_locked; bool keep_cs_asserted; uint8_t comm; const struct ad_sigma_delta_info *info; /* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. * 'tx_buf' is up to 32 bits. * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp, * rounded to 16 bytes to take into account padding. */ uint8_t tx_buf[4] ____cacheline_aligned; uint8_t rx_buf[16] __aligned(8); }; static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd, unsigned int channel) { if (sd->info->set_channel) return sd->info->set_channel(sd, channel); return 0; } static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd, unsigned int mode) { if (sd->info->set_mode) return sd->info->set_mode(sd, mode); return 0; } static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd, unsigned int raw_sample) { if (sd->info->postprocess_sample) return sd->info->postprocess_sample(sd, raw_sample); return 0; } void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm); int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, unsigned int size, unsigned int val); int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, unsigned int size, unsigned int *val); int ad_sd_reset(struct ad_sigma_delta *sigma_delta, unsigned int reset_length); int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val); int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel); int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta, const struct ad_sd_calib_data *cd, unsigned int n); int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, struct spi_device *spi, const struct ad_sigma_delta_info *info); int devm_ad_sd_setup_buffer_and_trigger(struct device *dev, struct iio_dev *indio_dev); int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig); #endif PK ! 5 ��. . iio/adc/qcom-vadc-common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Code shared between the different Qualcomm PMIC voltage ADCs */ #ifndef QCOM_VADC_COMMON_H #define QCOM_VADC_COMMON_H #include <linux/types.h> #define VADC_CONV_TIME_MIN_US 2000 #define VADC_CONV_TIME_MAX_US 2100 /* Min ADC code represents 0V */ #define VADC_MIN_ADC_CODE 0x6000 /* Max ADC code represents full-scale range of 1.8V */ #define VADC_MAX_ADC_CODE 0xa800 #define VADC_ABSOLUTE_RANGE_UV 625000 #define VADC_RATIOMETRIC_RANGE 1800 #define VADC_DEF_PRESCALING 0 /* 1:1 */ #define VADC_DEF_DECIMATION 0 /* 512 */ #define VADC_DEF_HW_SETTLE_TIME 0 /* 0 us */ #define VADC_DEF_AVG_SAMPLES 0 /* 1 sample */ #define VADC_DEF_CALIB_TYPE VADC_CALIB_ABSOLUTE #define VADC_DECIMATION_MIN 512 #define VADC_DECIMATION_MAX 4096 #define ADC5_DEF_VBAT_PRESCALING 1 /* 1:3 */ #define ADC5_DECIMATION_SHORT 250 #define ADC5_DECIMATION_MEDIUM 420 #define ADC5_DECIMATION_LONG 840 /* Default decimation - 1024 for rev2, 840 for pmic5 */ #define ADC5_DECIMATION_DEFAULT 2 #define ADC5_DECIMATION_SAMPLES_MAX 3 #define VADC_HW_SETTLE_DELAY_MAX 10000 #define VADC_HW_SETTLE_SAMPLES_MAX 16 #define VADC_AVG_SAMPLES_MAX 512 #define ADC5_AVG_SAMPLES_MAX 16 #define PMIC5_CHG_TEMP_SCALE_FACTOR 377500 #define PMIC5_SMB_TEMP_CONSTANT 419400 #define PMIC5_SMB_TEMP_SCALE_FACTOR 356 #define PMI_CHG_SCALE_1 -138890 #define PMI_CHG_SCALE_2 391750000000LL #define VADC5_MAX_CODE 0x7fff #define ADC5_FULL_SCALE_CODE 0x70e4 #define ADC5_USR_DATA_CHECK 0x8000 #define R_PU_100K 100000 #define RATIO_MAX_ADC7 BIT(14) /* * VADC_CALIB_ABSOLUTE: uses the 625mV and 1.25V as reference channels. * VADC_CALIB_RATIOMETRIC: uses the reference voltage (1.8V) and GND for * calibration. */ enum vadc_calibration { VADC_CALIB_ABSOLUTE = 0, VADC_CALIB_RATIOMETRIC }; /** * struct vadc_linear_graph - Represent ADC characteristics. * @dy: numerator slope to calculate the gain. * @dx: denominator slope to calculate the gain. * @gnd: A/D word of the ground reference used for the channel. * * Each ADC device has different offset and gain parameters which are * computed to calibrate the device. */ struct vadc_linear_graph { s32 dy; s32 dx; s32 gnd; }; /** * struct vadc_prescale_ratio - Represent scaling ratio for ADC input. * @num: the inverse numerator of the gain applied to the input channel. * @den: the inverse denominator of the gain applied to the input channel. */ struct vadc_prescale_ratio { u32 num; u32 den; }; /** * enum vadc_scale_fn_type - Scaling function to convert ADC code to * physical scaled units for the channel. * SCALE_DEFAULT: Default scaling to convert raw adc code to voltage (uV). * SCALE_THERM_100K_PULLUP: Returns temperature in millidegC. * Uses a mapping table with 100K pullup. * SCALE_PMIC_THERM: Returns result in milli degree's Centigrade. * SCALE_XOTHERM: Returns XO thermistor voltage in millidegC. * SCALE_PMI_CHG_TEMP: Conversion for PMI CHG temp * SCALE_HW_CALIB_DEFAULT: Default scaling to convert raw adc code to * voltage (uV) with hardware applied offset/slope values to adc code. * SCALE_HW_CALIB_THERM_100K_PULLUP: Returns temperature in millidegC using * lookup table. The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_XOTHERM: Returns XO thermistor voltage in millidegC using * 100k pullup. The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_THERM_100K_PU_PM7: Returns temperature in millidegC using * lookup table for PMIC7. The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. * The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. * The hardware applies offset/slope to adc code. This is for PMIC7. * SCALE_HW_CALIB_PM5_CHG_TEMP: Returns result in millidegrees for PMIC5 * charger temperature. * SCALE_HW_CALIB_PM5_SMB_TEMP: Returns result in millidegrees for PMIC5 * SMB1390 temperature. */ enum vadc_scale_fn_type { SCALE_DEFAULT = 0, SCALE_THERM_100K_PULLUP, SCALE_PMIC_THERM, SCALE_XOTHERM, SCALE_PMI_CHG_TEMP, SCALE_HW_CALIB_DEFAULT, SCALE_HW_CALIB_THERM_100K_PULLUP, SCALE_HW_CALIB_XOTHERM, SCALE_HW_CALIB_THERM_100K_PU_PM7, SCALE_HW_CALIB_PMIC_THERM, SCALE_HW_CALIB_PMIC_THERM_PM7, SCALE_HW_CALIB_PM5_CHG_TEMP, SCALE_HW_CALIB_PM5_SMB_TEMP, SCALE_HW_CALIB_INVALID, }; struct adc5_data { const u32 full_scale_code_volt; const u32 full_scale_code_cur; const struct adc5_channels *adc_chans; const struct iio_info *info; unsigned int *decimation; unsigned int *hw_settle_1; unsigned int *hw_settle_2; }; int qcom_vadc_scale(enum vadc_scale_fn_type scaletype, const struct vadc_linear_graph *calib_graph, const struct vadc_prescale_ratio *prescale, bool absolute, u16 adc_code, int *result_mdec); struct qcom_adc5_scale_type { int (*scale_fn)(const struct vadc_prescale_ratio *prescale, const struct adc5_data *data, u16 adc_code, int *result); }; int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype, unsigned int prescale_ratio, const struct adc5_data *data, u16 adc_code, int *result_mdec); u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio, u32 full_scale_code_volt, int temp); int qcom_adc5_prescaling_from_dt(u32 num, u32 den); int qcom_adc5_hw_settle_time_from_dt(u32 value, const unsigned int *hw_settle); int qcom_adc5_avg_samples_from_dt(u32 value); int qcom_adc5_decimation_from_dt(u32 value, const unsigned int *decimation); int qcom_vadc_decimation_from_dt(u32 value); #endif /* QCOM_VADC_COMMON_H */ PK ! �� iio/adc/stm32-dfsdm-adc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This file discribe the STM32 DFSDM IIO driver API for audio part * * Copyright (C) 2017, STMicroelectronics - All Rights Reserved * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com>. */ #ifndef STM32_DFSDM_ADC_H #define STM32_DFSDM_ADC_H #include <linux/iio/iio.h> int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev, int (*cb)(const void *data, size_t size, void *private), void *private); int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev); #endif PK ! u ��` ` iio/triggered_event.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IIO_TRIGGERED_EVENT_H_ #define _LINUX_IIO_TRIGGERED_EVENT_H_ #include <linux/interrupt.h> int iio_triggered_event_setup(struct iio_dev *indio_dev, irqreturn_t (*h)(int irq, void *p), irqreturn_t (*thread)(int irq, void *p)); void iio_triggered_event_cleanup(struct iio_dev *indio_dev); #endif PK ! L��f f iio/events.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* The industrial I/O - event passing to userspace * * Copyright (c) 2008-2011 Jonathan Cameron */ #ifndef _IIO_EVENTS_H_ #define _IIO_EVENTS_H_ #include <linux/iio/types.h> #include <uapi/linux/iio/events.h> /** * IIO_EVENT_CODE() - create event identifier * @chan_type: Type of the channel. Should be one of enum iio_chan_type. * @diff: Whether the event is for an differential channel or not. * @modifier: Modifier for the channel. Should be one of enum iio_modifier. * @direction: Direction of the event. One of enum iio_event_direction. * @type: Type of the event. Should be one of enum iio_event_type. * @chan: Channel number for non-differential channels. * @chan1: First channel number for differential channels. * @chan2: Second channel number for differential channels. */ #define IIO_EVENT_CODE(chan_type, diff, modifier, direction, \ type, chan, chan1, chan2) \ (((u64)type << 56) | ((u64)diff << 55) | \ ((u64)direction << 48) | ((u64)modifier << 40) | \ ((u64)chan_type << 32) | (((u16)chan2) << 16) | ((u16)chan1) | \ ((u16)chan)) /** * IIO_MOD_EVENT_CODE() - create event identifier for modified channels * @chan_type: Type of the channel. Should be one of enum iio_chan_type. * @number: Channel number. * @modifier: Modifier for the channel. Should be one of enum iio_modifier. * @type: Type of the event. Should be one of enum iio_event_type. * @direction: Direction of the event. One of enum iio_event_direction. */ #define IIO_MOD_EVENT_CODE(chan_type, number, modifier, \ type, direction) \ IIO_EVENT_CODE(chan_type, 0, modifier, direction, type, number, 0, 0) /** * IIO_UNMOD_EVENT_CODE() - create event identifier for unmodified channels * @chan_type: Type of the channel. Should be one of enum iio_chan_type. * @number: Channel number. * @type: Type of the event. Should be one of enum iio_event_type. * @direction: Direction of the event. One of enum iio_event_direction. */ #define IIO_UNMOD_EVENT_CODE(chan_type, number, type, direction) \ IIO_EVENT_CODE(chan_type, 0, 0, direction, type, number, 0, 0) #endif PK ! 풰gA A iio/afe/rescale.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2018 Axentia Technologies AB */ #ifndef __IIO_RESCALE_H__ #define __IIO_RESCALE_H__ #include <linux/types.h> #include <linux/iio/iio.h> struct device; struct rescale; struct rescale_cfg { enum iio_chan_type type; int (*props)(struct device *dev, struct rescale *rescale); }; struct rescale { const struct rescale_cfg *cfg; struct iio_channel *source; struct iio_chan_spec chan; struct iio_chan_spec_ext_info *ext_info; bool chan_processed; s32 numerator; s32 denominator; s32 offset; }; int rescale_process_scale(struct rescale *rescale, int scale_type, int *val, int *val2); int rescale_process_offset(struct rescale *rescale, int scale_type, int scale, int scale2, int schan_off, int *val, int *val2); #endif /* __IIO_RESCALE_H__ */ PK ! �R.*� � iio/iio-opaque.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _INDUSTRIAL_IO_OPAQUE_H_ #define _INDUSTRIAL_IO_OPAQUE_H_ /** * struct iio_dev_opaque - industrial I/O device opaque information * @indio_dev: public industrial I/O device information * @id: used to identify device internally * @driver_module: used to make it harder to undercut users * @info_exist_lock: lock to prevent use during removal * @trig_readonly: mark the current trigger immutable * @event_interface: event chrdevs associated with interrupt lines * @attached_buffers: array of buffers statically attached by the driver * @attached_buffers_cnt: number of buffers in the array of statically attached buffers * @buffer_ioctl_handler: ioctl() handler for this IIO device's buffer interface * @buffer_list: list of all buffers currently attached * @channel_attr_list: keep track of automatically created channel * attributes * @chan_attr_group: group for all attrs in base directory * @ioctl_handlers: ioctl handlers registered with the core handler * @groups: attribute groups * @groupcounter: index of next attribute group * @legacy_scan_el_group: attribute group for legacy scan elements attribute group * @legacy_buffer_group: attribute group for legacy buffer attributes group * @scan_index_timestamp: cache of the index to the timestamp * @clock_id: timestamping clock posix identifier * @chrdev: associated character device * @flags: file ops related flags including busy flag. * @debugfs_dentry: device specific debugfs dentry * @cached_reg_addr: cached register address for debugfs reads * @read_buf: read buffer to be used for the initial reg read * @read_buf_len: data length in @read_buf */ struct iio_dev_opaque { struct iio_dev indio_dev; int id; struct module *driver_module; struct mutex info_exist_lock; bool trig_readonly; struct iio_event_interface *event_interface; struct iio_buffer **attached_buffers; unsigned int attached_buffers_cnt; struct iio_ioctl_handler *buffer_ioctl_handler; struct list_head buffer_list; struct list_head channel_attr_list; struct attribute_group chan_attr_group; struct list_head ioctl_handlers; const struct attribute_group **groups; int groupcounter; struct attribute_group legacy_scan_el_group; struct attribute_group legacy_buffer_group; unsigned int scan_index_timestamp; clockid_t clock_id; struct cdev chrdev; unsigned long flags; #if defined(CONFIG_DEBUG_FS) struct dentry *debugfs_dentry; unsigned cached_reg_addr; char read_buf[20]; unsigned int read_buf_len; #endif }; #define to_iio_dev_opaque(_indio_dev) \ container_of((_indio_dev), struct iio_dev_opaque, indio_dev) #endif PK ! ϊ2� iio/frequency/adf4350.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ADF4350/ADF4351 SPI PLL driver * * Copyright 2012-2013 Analog Devices Inc. */ #ifndef IIO_PLL_ADF4350_H_ #define IIO_PLL_ADF4350_H_ /* Registers */ #define ADF4350_REG0 0 #define ADF4350_REG1 1 #define ADF4350_REG2 2 #define ADF4350_REG3 3 #define ADF4350_REG4 4 #define ADF4350_REG5 5 /* REG0 Bit Definitions */ #define ADF4350_REG0_FRACT(x) (((x) & 0xFFF) << 3) #define ADF4350_REG0_INT(x) (((x) & 0xFFFF) << 15) /* REG1 Bit Definitions */ #define ADF4350_REG1_MOD(x) (((x) & 0xFFF) << 3) #define ADF4350_REG1_PHASE(x) (((x) & 0xFFF) << 15) #define ADF4350_REG1_PRESCALER (1 << 27) /* REG2 Bit Definitions */ #define ADF4350_REG2_COUNTER_RESET_EN (1 << 3) #define ADF4350_REG2_CP_THREESTATE_EN (1 << 4) #define ADF4350_REG2_POWER_DOWN_EN (1 << 5) #define ADF4350_REG2_PD_POLARITY_POS (1 << 6) #define ADF4350_REG2_LDP_6ns (1 << 7) #define ADF4350_REG2_LDP_10ns (0 << 7) #define ADF4350_REG2_LDF_FRACT_N (0 << 8) #define ADF4350_REG2_LDF_INT_N (1 << 8) #define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x) (((((x)-312) / 312) & 0xF) << 9) #define ADF4350_REG2_DOUBLE_BUFF_EN (1 << 13) #define ADF4350_REG2_10BIT_R_CNT(x) ((x) << 14) #define ADF4350_REG2_RDIV2_EN (1 << 24) #define ADF4350_REG2_RMULT2_EN (1 << 25) #define ADF4350_REG2_MUXOUT(x) ((x) << 26) #define ADF4350_REG2_NOISE_MODE(x) (((unsigned)(x)) << 29) #define ADF4350_MUXOUT_THREESTATE 0 #define ADF4350_MUXOUT_DVDD 1 #define ADF4350_MUXOUT_GND 2 #define ADF4350_MUXOUT_R_DIV_OUT 3 #define ADF4350_MUXOUT_N_DIV_OUT 4 #define ADF4350_MUXOUT_ANALOG_LOCK_DETECT 5 #define ADF4350_MUXOUT_DIGITAL_LOCK_DETECT 6 /* REG3 Bit Definitions */ #define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3) #define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 15) #define ADF4350_REG3_12BIT_CSR_EN (1 << 18) #define ADF4351_REG3_CHARGE_CANCELLATION_EN (1 << 21) #define ADF4351_REG3_ANTI_BACKLASH_3ns_EN (1 << 22) #define ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH (1 << 23) /* REG4 Bit Definitions */ #define ADF4350_REG4_OUTPUT_PWR(x) ((x) << 3) #define ADF4350_REG4_RF_OUT_EN (1 << 5) #define ADF4350_REG4_AUX_OUTPUT_PWR(x) ((x) << 6) #define ADF4350_REG4_AUX_OUTPUT_EN (1 << 8) #define ADF4350_REG4_AUX_OUTPUT_FUND (1 << 9) #define ADF4350_REG4_AUX_OUTPUT_DIV (0 << 9) #define ADF4350_REG4_MUTE_TILL_LOCK_EN (1 << 10) #define ADF4350_REG4_VCO_PWRDOWN_EN (1 << 11) #define ADF4350_REG4_8BIT_BAND_SEL_CLKDIV(x) ((x) << 12) #define ADF4350_REG4_RF_DIV_SEL(x) ((x) << 20) #define ADF4350_REG4_FEEDBACK_DIVIDED (0 << 23) #define ADF4350_REG4_FEEDBACK_FUND (1 << 23) /* REG5 Bit Definitions */ #define ADF4350_REG5_LD_PIN_MODE_LOW (0 << 22) #define ADF4350_REG5_LD_PIN_MODE_DIGITAL (1 << 22) #define ADF4350_REG5_LD_PIN_MODE_HIGH (3 << 22) /* Specifications */ #define ADF4350_MAX_OUT_FREQ 4400000000ULL /* Hz */ #define ADF4350_MIN_OUT_FREQ 137500000 /* Hz */ #define ADF4351_MIN_OUT_FREQ 34375000 /* Hz */ #define ADF4350_MIN_VCO_FREQ 2200000000ULL /* Hz */ #define ADF4350_MAX_FREQ_45_PRESC 3000000000ULL /* Hz */ #define ADF4350_MAX_FREQ_PFD 32000000 /* Hz */ #define ADF4350_MAX_BANDSEL_CLK 125000 /* Hz */ #define ADF4350_MAX_FREQ_REFIN 250000000 /* Hz */ #define ADF4350_MAX_MODULUS 4095 #define ADF4350_MAX_R_CNT 1023 /** * struct adf4350_platform_data - platform specific information * @name: Optional device name. * @clkin: REFin frequency in Hz. * @channel_spacing: Channel spacing in Hz (influences MODULUS). * @power_up_frequency: Optional, If set in Hz the PLL tunes to the desired * frequency on probe. * @ref_div_factor: Optional, if set the driver skips dynamic calculation * and uses this default value instead. * @ref_doubler_en: Enables reference doubler. * @ref_div2_en: Enables reference divider. * @r2_user_settings: User defined settings for ADF4350/1 REGISTER_2. * @r3_user_settings: User defined settings for ADF4350/1 REGISTER_3. * @r4_user_settings: User defined settings for ADF4350/1 REGISTER_4. */ struct adf4350_platform_data { char name[32]; unsigned long clkin; unsigned long channel_spacing; unsigned long long power_up_frequency; unsigned short ref_div_factor; /* 10-bit R counter */ bool ref_doubler_en; bool ref_div2_en; unsigned r2_user_settings; unsigned r3_user_settings; unsigned r4_user_settings; }; #endif /* IIO_PLL_ADF4350_H_ */ PK ! �p��c c iio/frequency/ad9523.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AD9523 SPI Low Jitter Clock Generator * * Copyright 2012 Analog Devices Inc. */ #ifndef IIO_FREQUENCY_AD9523_H_ #define IIO_FREQUENCY_AD9523_H_ enum outp_drv_mode { TRISTATE, LVPECL_8mA, LVDS_4mA, LVDS_7mA, HSTL0_16mA, HSTL1_8mA, CMOS_CONF1, CMOS_CONF2, CMOS_CONF3, CMOS_CONF4, CMOS_CONF5, CMOS_CONF6, CMOS_CONF7, CMOS_CONF8, CMOS_CONF9 }; enum ref_sel_mode { NONEREVERTIVE_STAY_ON_REFB, REVERT_TO_REFA, SELECT_REFA, SELECT_REFB, EXT_REF_SEL }; /** * struct ad9523_channel_spec - Output channel configuration * * @channel_num: Output channel number. * @divider_output_invert_en: Invert the polarity of the output clock. * @sync_ignore_en: Ignore chip-level SYNC signal. * @low_power_mode_en: Reduce power used in the differential output modes. * @use_alt_clock_src: Channel divider uses alternative clk source. * @output_dis: Disables, powers down the entire channel. * @driver_mode: Output driver mode (logic level family). * @divider_phase: Divider initial phase after a SYNC. Range 0..63 LSB = 1/2 of a period of the divider input clock. * @channel_divider: 10-bit channel divider. * @extended_name: Optional descriptive channel name. */ struct ad9523_channel_spec { unsigned channel_num; bool divider_output_invert_en; bool sync_ignore_en; bool low_power_mode_en; /* CH0..CH3 VCXO, CH4..CH9 VCO2 */ bool use_alt_clock_src; bool output_dis; enum outp_drv_mode driver_mode; unsigned char divider_phase; unsigned short channel_divider; char extended_name[16]; }; enum pll1_rzero_resistor { RZERO_883_OHM, RZERO_677_OHM, RZERO_341_OHM, RZERO_135_OHM, RZERO_10_OHM, RZERO_USE_EXT_RES = 8, }; enum rpole2_resistor { RPOLE2_900_OHM, RPOLE2_450_OHM, RPOLE2_300_OHM, RPOLE2_225_OHM, }; enum rzero_resistor { RZERO_3250_OHM, RZERO_2750_OHM, RZERO_2250_OHM, RZERO_2100_OHM, RZERO_3000_OHM, RZERO_2500_OHM, RZERO_2000_OHM, RZERO_1850_OHM, }; enum cpole1_capacitor { CPOLE1_0_PF, CPOLE1_8_PF, CPOLE1_16_PF, CPOLE1_24_PF, _CPOLE1_24_PF, /* place holder */ CPOLE1_32_PF, CPOLE1_40_PF, CPOLE1_48_PF, }; /** * struct ad9523_platform_data - platform specific information * * @vcxo_freq: External VCXO frequency in Hz * @refa_diff_rcv_en: REFA differential/single-ended input selection. * @refb_diff_rcv_en: REFB differential/single-ended input selection. * @zd_in_diff_en: Zero Delay differential/single-ended input selection. * @osc_in_diff_en: OSC differential/ single-ended input selection. * @refa_cmos_neg_inp_en: REFA single-ended neg./pos. input enable. * @refb_cmos_neg_inp_en: REFB single-ended neg./pos. input enable. * @zd_in_cmos_neg_inp_en: Zero Delay single-ended neg./pos. input enable. * @osc_in_cmos_neg_inp_en: OSC single-ended neg./pos. input enable. * @refa_r_div: PLL1 10-bit REFA R divider. * @refb_r_div: PLL1 10-bit REFB R divider. * @pll1_feedback_div: PLL1 10-bit Feedback N divider. * @pll1_charge_pump_current_nA: Magnitude of PLL1 charge pump current (nA). * @zero_delay_mode_internal_en: Internal, external Zero Delay mode selection. * @osc_in_feedback_en: PLL1 feedback path, local feedback from * the OSC_IN receiver or zero delay mode * @pll1_loop_filter_rzero: PLL1 Loop Filter Zero Resistor selection. * @ref_mode: Reference selection mode. * @pll2_charge_pump_current_nA: Magnitude of PLL2 charge pump current (nA). * @pll2_ndiv_a_cnt: PLL2 Feedback N-divider, A Counter, range 0..4. * @pll2_ndiv_b_cnt: PLL2 Feedback N-divider, B Counter, range 0..63. * @pll2_freq_doubler_en: PLL2 frequency doubler enable. * @pll2_r2_div: PLL2 R2 divider, range 0..31. * @pll2_vco_div_m1: VCO1 divider, range 3..5. * @pll2_vco_div_m2: VCO2 divider, range 3..5. * @rpole2: PLL2 loop filter Rpole resistor value. * @rzero: PLL2 loop filter Rzero resistor value. * @cpole1: PLL2 loop filter Cpole capacitor value. * @rzero_bypass_en: PLL2 loop filter Rzero bypass enable. * @num_channels: Array size of struct ad9523_channel_spec. * @channels: Pointer to channel array. * @name: Optional alternative iio device name. */ struct ad9523_platform_data { unsigned long vcxo_freq; /* Differential/ Single-Ended Input Configuration */ bool refa_diff_rcv_en; bool refb_diff_rcv_en; bool zd_in_diff_en; bool osc_in_diff_en; /* * Valid if differential input disabled * if false defaults to pos input */ bool refa_cmos_neg_inp_en; bool refb_cmos_neg_inp_en; bool zd_in_cmos_neg_inp_en; bool osc_in_cmos_neg_inp_en; /* PLL1 Setting */ unsigned short refa_r_div; unsigned short refb_r_div; unsigned short pll1_feedback_div; unsigned short pll1_charge_pump_current_nA; bool zero_delay_mode_internal_en; bool osc_in_feedback_en; enum pll1_rzero_resistor pll1_loop_filter_rzero; /* Reference */ enum ref_sel_mode ref_mode; /* PLL2 Setting */ unsigned int pll2_charge_pump_current_nA; unsigned char pll2_ndiv_a_cnt; unsigned char pll2_ndiv_b_cnt; bool pll2_freq_doubler_en; unsigned char pll2_r2_div; unsigned char pll2_vco_div_m1; /* 3..5 */ unsigned char pll2_vco_div_m2; /* 3..5 */ /* Loop Filter PLL2 */ enum rpole2_resistor rpole2; enum rzero_resistor rzero; enum cpole1_capacitor cpole1; bool rzero_bypass_en; /* Output Channel Configuration */ int num_channels; struct ad9523_channel_spec *channels; char name[SPI_NAME_SIZE]; }; #endif /* IIO_FREQUENCY_AD9523_H_ */ PK ! ��%+~H ~H percpu-defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/percpu-defs.h - basic definitions for percpu areas * * DO NOT INCLUDE DIRECTLY OUTSIDE PERCPU IMPLEMENTATION PROPER. * * This file is separate from linux/percpu.h to avoid cyclic inclusion * dependency from arch header files. Only to be included from * asm/percpu.h. * * This file includes macros necessary to declare percpu sections and * variables, and definitions of percpu accessors and operations. It * should provide enough percpu features to arch header files even when * they can only include asm/percpu.h to avoid cyclic inclusion dependency. */ #ifndef _LINUX_PERCPU_DEFS_H #define _LINUX_PERCPU_DEFS_H #ifdef CONFIG_SMP #ifdef MODULE #define PER_CPU_SHARED_ALIGNED_SECTION "" #define PER_CPU_ALIGNED_SECTION "" #else #define PER_CPU_SHARED_ALIGNED_SECTION "..shared_aligned" #define PER_CPU_ALIGNED_SECTION "..shared_aligned" #endif #define PER_CPU_FIRST_SECTION "..first" #else #define PER_CPU_SHARED_ALIGNED_SECTION "" #define PER_CPU_ALIGNED_SECTION "..shared_aligned" #define PER_CPU_FIRST_SECTION "" #endif /* * Base implementations of per-CPU variable declarations and definitions, where * the section in which the variable is to be placed is provided by the * 'sec' argument. This may be used to affect the parameters governing the * variable's storage. * * NOTE! The sections for the DECLARE and for the DEFINE must match, lest * linkage errors occur due the compiler generating the wrong code to access * that section. */ #define __PCPU_ATTRS(sec) \ __percpu __attribute__((section(PER_CPU_BASE_SECTION sec))) \ PER_CPU_ATTRIBUTES #define __PCPU_DUMMY_ATTRS \ __section(".discard") __attribute__((unused)) /* * s390 and alpha modules require percpu variables to be defined as * weak to force the compiler to generate GOT based external * references for them. This is necessary because percpu sections * will be located outside of the usually addressable area. * * This definition puts the following two extra restrictions when * defining percpu variables. * * 1. The symbol must be globally unique, even the static ones. * 2. Static percpu variables cannot be defined inside a function. * * Archs which need weak percpu definitions should define * ARCH_NEEDS_WEAK_PER_CPU in asm/percpu.h when necessary. * * To ensure that the generic code observes the above two * restrictions, if CONFIG_DEBUG_FORCE_WEAK_PER_CPU is set weak * definition is used for all cases. */ #if defined(ARCH_NEEDS_WEAK_PER_CPU) || defined(CONFIG_DEBUG_FORCE_WEAK_PER_CPU) /* * __pcpu_scope_* dummy variable is used to enforce scope. It * receives the static modifier when it's used in front of * DEFINE_PER_CPU() and will trigger build failure if * DECLARE_PER_CPU() is used for the same variable. * * __pcpu_unique_* dummy variable is used to enforce symbol uniqueness * such that hidden weak symbol collision, which will cause unrelated * variables to share the same address, can be detected during build. */ #define DECLARE_PER_CPU_SECTION(type, name, sec) \ extern __PCPU_DUMMY_ATTRS char __pcpu_scope_##name; \ extern __PCPU_ATTRS(sec) __typeof__(type) name #define DEFINE_PER_CPU_SECTION(type, name, sec) \ __PCPU_DUMMY_ATTRS char __pcpu_scope_##name; \ extern __PCPU_DUMMY_ATTRS char __pcpu_unique_##name; \ __PCPU_DUMMY_ATTRS char __pcpu_unique_##name; \ extern __PCPU_ATTRS(sec) __typeof__(type) name; \ __PCPU_ATTRS(sec) __weak __typeof__(type) name #else /* * Normal declaration and definition macros. */ #define DECLARE_PER_CPU_SECTION(type, name, sec) \ extern __PCPU_ATTRS(sec) __typeof__(type) name #define DEFINE_PER_CPU_SECTION(type, name, sec) \ __PCPU_ATTRS(sec) __typeof__(type) name #endif /* * Variant on the per-CPU variable declaration/definition theme used for * ordinary per-CPU variables. */ #define DECLARE_PER_CPU(type, name) \ DECLARE_PER_CPU_SECTION(type, name, "") #define DEFINE_PER_CPU(type, name) \ DEFINE_PER_CPU_SECTION(type, name, "") /* * Declaration/definition used for per-CPU variables that must come first in * the set of variables. */ #define DECLARE_PER_CPU_FIRST(type, name) \ DECLARE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION) #define DEFINE_PER_CPU_FIRST(type, name) \ DEFINE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION) /* * Declaration/definition used for per-CPU variables that must be cacheline * aligned under SMP conditions so that, whilst a particular instance of the * data corresponds to a particular CPU, inefficiencies due to direct access by * other CPUs are reduced by preventing the data from unnecessarily spanning * cachelines. * * An example of this would be statistical data, where each CPU's set of data * is updated by that CPU alone, but the data from across all CPUs is collated * by a CPU processing a read from a proc file. */ #define DECLARE_PER_CPU_SHARED_ALIGNED(type, name) \ DECLARE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \ ____cacheline_aligned_in_smp #define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \ DEFINE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \ ____cacheline_aligned_in_smp #define DECLARE_PER_CPU_ALIGNED(type, name) \ DECLARE_PER_CPU_SECTION(type, name, PER_CPU_ALIGNED_SECTION) \ ____cacheline_aligned #define DEFINE_PER_CPU_ALIGNED(type, name) \ DEFINE_PER_CPU_SECTION(type, name, PER_CPU_ALIGNED_SECTION) \ ____cacheline_aligned /* * Declaration/definition used for per-CPU variables that must be page aligned. */ #define DECLARE_PER_CPU_PAGE_ALIGNED(type, name) \ DECLARE_PER_CPU_SECTION(type, name, "..page_aligned") \ __aligned(PAGE_SIZE) #define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \ DEFINE_PER_CPU_SECTION(type, name, "..page_aligned") \ __aligned(PAGE_SIZE) /* * Declaration/definition used for per-CPU variables that must be read mostly. */ #define DECLARE_PER_CPU_READ_MOSTLY(type, name) \ DECLARE_PER_CPU_SECTION(type, name, "..read_mostly") #define DEFINE_PER_CPU_READ_MOSTLY(type, name) \ DEFINE_PER_CPU_SECTION(type, name, "..read_mostly") /* * Declaration/definition used for per-CPU variables that should be accessed * as decrypted when memory encryption is enabled in the guest. */ #ifdef CONFIG_AMD_MEM_ENCRYPT #define DECLARE_PER_CPU_DECRYPTED(type, name) \ DECLARE_PER_CPU_SECTION(type, name, "..decrypted") #define DEFINE_PER_CPU_DECRYPTED(type, name) \ DEFINE_PER_CPU_SECTION(type, name, "..decrypted") #else #define DEFINE_PER_CPU_DECRYPTED(type, name) DEFINE_PER_CPU(type, name) #endif /* * Intermodule exports for per-CPU variables. sparse forgets about * address space across EXPORT_SYMBOL(), change EXPORT_SYMBOL() to * noop if __CHECKER__. */ #ifndef __CHECKER__ #define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(var) #define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(var) #else #define EXPORT_PER_CPU_SYMBOL(var) #define EXPORT_PER_CPU_SYMBOL_GPL(var) #endif /* * Accessors and operations. */ #ifndef __ASSEMBLY__ /* * __verify_pcpu_ptr() verifies @ptr is a percpu pointer without evaluating * @ptr and is invoked once before a percpu area is accessed by all * accessors and operations. This is performed in the generic part of * percpu and arch overrides don't need to worry about it; however, if an * arch wants to implement an arch-specific percpu accessor or operation, * it may use __verify_pcpu_ptr() to verify the parameters. * * + 0 is required in order to convert the pointer type from a * potential array type to a pointer to a single item of the array. */ #define __verify_pcpu_ptr(ptr) \ do { \ const void __percpu *__vpp_verify = (typeof((ptr) + 0))NULL; \ (void)__vpp_verify; \ } while (0) #ifdef CONFIG_SMP /* * Add an offset to a pointer but keep the pointer as-is. Use RELOC_HIDE() * to prevent the compiler from making incorrect assumptions about the * pointer value. The weird cast keeps both GCC and sparse happy. */ #define SHIFT_PERCPU_PTR(__p, __offset) \ RELOC_HIDE((typeof(*(__p)) __kernel __force *)(__p), (__offset)) #define per_cpu_ptr(ptr, cpu) \ ({ \ __verify_pcpu_ptr(ptr); \ SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu))); \ }) #define raw_cpu_ptr(ptr) \ ({ \ __verify_pcpu_ptr(ptr); \ arch_raw_cpu_ptr(ptr); \ }) #ifdef CONFIG_DEBUG_PREEMPT #define this_cpu_ptr(ptr) \ ({ \ __verify_pcpu_ptr(ptr); \ SHIFT_PERCPU_PTR(ptr, my_cpu_offset); \ }) #else #define this_cpu_ptr(ptr) raw_cpu_ptr(ptr) #endif #else /* CONFIG_SMP */ #define VERIFY_PERCPU_PTR(__p) \ ({ \ __verify_pcpu_ptr(__p); \ (typeof(*(__p)) __kernel __force *)(__p); \ }) #define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); VERIFY_PERCPU_PTR(ptr); }) #define raw_cpu_ptr(ptr) per_cpu_ptr(ptr, 0) #define this_cpu_ptr(ptr) raw_cpu_ptr(ptr) #endif /* CONFIG_SMP */ #define per_cpu(var, cpu) (*per_cpu_ptr(&(var), cpu)) /* * Must be an lvalue. Since @var must be a simple identifier, * we force a syntax error here if it isn't. */ #define get_cpu_var(var) \ (*({ \ preempt_disable(); \ this_cpu_ptr(&var); \ })) /* * The weird & is necessary because sparse considers (void)(var) to be * a direct dereference of percpu variable (var). */ #define put_cpu_var(var) \ do { \ (void)&(var); \ preempt_enable(); \ } while (0) #define get_cpu_ptr(var) \ ({ \ preempt_disable(); \ this_cpu_ptr(var); \ }) #define put_cpu_ptr(var) \ do { \ (void)(var); \ preempt_enable(); \ } while (0) /* * Branching function to split up a function into a set of functions that * are called for different scalar sizes of the objects handled. */ extern void __bad_size_call_parameter(void); #ifdef CONFIG_DEBUG_PREEMPT extern void __this_cpu_preempt_check(const char *op); #else static inline void __this_cpu_preempt_check(const char *op) { } #endif #define __pcpu_size_call_return(stem, variable) \ ({ \ typeof(variable) pscr_ret__; \ __verify_pcpu_ptr(&(variable)); \ switch(sizeof(variable)) { \ case 1: pscr_ret__ = stem##1(variable); break; \ case 2: pscr_ret__ = stem##2(variable); break; \ case 4: pscr_ret__ = stem##4(variable); break; \ case 8: pscr_ret__ = stem##8(variable); break; \ default: \ __bad_size_call_parameter(); break; \ } \ pscr_ret__; \ }) #define __pcpu_size_call_return2(stem, variable, ...) \ ({ \ typeof(variable) pscr2_ret__; \ __verify_pcpu_ptr(&(variable)); \ switch(sizeof(variable)) { \ case 1: pscr2_ret__ = stem##1(variable, __VA_ARGS__); break; \ case 2: pscr2_ret__ = stem##2(variable, __VA_ARGS__); break; \ case 4: pscr2_ret__ = stem##4(variable, __VA_ARGS__); break; \ case 8: pscr2_ret__ = stem##8(variable, __VA_ARGS__); break; \ default: \ __bad_size_call_parameter(); break; \ } \ pscr2_ret__; \ }) /* * Special handling for cmpxchg_double. cmpxchg_double is passed two * percpu variables. The first has to be aligned to a double word * boundary and the second has to follow directly thereafter. * We enforce this on all architectures even if they don't support * a double cmpxchg instruction, since it's a cheap requirement, and it * avoids breaking the requirement for architectures with the instruction. */ #define __pcpu_double_call_return_bool(stem, pcp1, pcp2, ...) \ ({ \ bool pdcrb_ret__; \ __verify_pcpu_ptr(&(pcp1)); \ BUILD_BUG_ON(sizeof(pcp1) != sizeof(pcp2)); \ VM_BUG_ON((unsigned long)(&(pcp1)) % (2 * sizeof(pcp1))); \ VM_BUG_ON((unsigned long)(&(pcp2)) != \ (unsigned long)(&(pcp1)) + sizeof(pcp1)); \ switch(sizeof(pcp1)) { \ case 1: pdcrb_ret__ = stem##1(pcp1, pcp2, __VA_ARGS__); break; \ case 2: pdcrb_ret__ = stem##2(pcp1, pcp2, __VA_ARGS__); break; \ case 4: pdcrb_ret__ = stem##4(pcp1, pcp2, __VA_ARGS__); break; \ case 8: pdcrb_ret__ = stem##8(pcp1, pcp2, __VA_ARGS__); break; \ default: \ __bad_size_call_parameter(); break; \ } \ pdcrb_ret__; \ }) #define __pcpu_size_call(stem, variable, ...) \ do { \ __verify_pcpu_ptr(&(variable)); \ switch(sizeof(variable)) { \ case 1: stem##1(variable, __VA_ARGS__);break; \ case 2: stem##2(variable, __VA_ARGS__);break; \ case 4: stem##4(variable, __VA_ARGS__);break; \ case 8: stem##8(variable, __VA_ARGS__);break; \ default: \ __bad_size_call_parameter();break; \ } \ } while (0) /* * this_cpu operations (C) 2008-2013 Christoph Lameter <cl@linux.com> * * Optimized manipulation for memory allocated through the per cpu * allocator or for addresses of per cpu variables. * * These operation guarantee exclusivity of access for other operations * on the *same* processor. The assumption is that per cpu data is only * accessed by a single processor instance (the current one). * * The arch code can provide optimized implementation by defining macros * for certain scalar sizes. F.e. provide this_cpu_add_2() to provide per * cpu atomic operations for 2 byte sized RMW actions. If arch code does * not provide operations for a scalar size then the fallback in the * generic code will be used. * * cmpxchg_double replaces two adjacent scalars at once. The first two * parameters are per cpu variables which have to be of the same size. A * truth value is returned to indicate success or failure (since a double * register result is difficult to handle). There is very limited hardware * support for these operations, so only certain sizes may work. */ /* * Operations for contexts where we do not want to do any checks for * preemptions. Unless strictly necessary, always use [__]this_cpu_*() * instead. * * If there is no other protection through preempt disable and/or disabling * interrupts then one of these RMW operations can show unexpected behavior * because the execution thread was rescheduled on another processor or an * interrupt occurred and the same percpu variable was modified from the * interrupt context. */ #define raw_cpu_read(pcp) __pcpu_size_call_return(raw_cpu_read_, pcp) #define raw_cpu_write(pcp, val) __pcpu_size_call(raw_cpu_write_, pcp, val) #define raw_cpu_add(pcp, val) __pcpu_size_call(raw_cpu_add_, pcp, val) #define raw_cpu_and(pcp, val) __pcpu_size_call(raw_cpu_and_, pcp, val) #define raw_cpu_or(pcp, val) __pcpu_size_call(raw_cpu_or_, pcp, val) #define raw_cpu_add_return(pcp, val) __pcpu_size_call_return2(raw_cpu_add_return_, pcp, val) #define raw_cpu_xchg(pcp, nval) __pcpu_size_call_return2(raw_cpu_xchg_, pcp, nval) #define raw_cpu_cmpxchg(pcp, oval, nval) \ __pcpu_size_call_return2(raw_cpu_cmpxchg_, pcp, oval, nval) #define raw_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ __pcpu_double_call_return_bool(raw_cpu_cmpxchg_double_, pcp1, pcp2, oval1, oval2, nval1, nval2) #define raw_cpu_sub(pcp, val) raw_cpu_add(pcp, -(val)) #define raw_cpu_inc(pcp) raw_cpu_add(pcp, 1) #define raw_cpu_dec(pcp) raw_cpu_sub(pcp, 1) #define raw_cpu_sub_return(pcp, val) raw_cpu_add_return(pcp, -(typeof(pcp))(val)) #define raw_cpu_inc_return(pcp) raw_cpu_add_return(pcp, 1) #define raw_cpu_dec_return(pcp) raw_cpu_add_return(pcp, -1) /* * Operations for contexts that are safe from preemption/interrupts. These * operations verify that preemption is disabled. */ #define __this_cpu_read(pcp) \ ({ \ __this_cpu_preempt_check("read"); \ raw_cpu_read(pcp); \ }) #define __this_cpu_write(pcp, val) \ ({ \ __this_cpu_preempt_check("write"); \ raw_cpu_write(pcp, val); \ }) #define __this_cpu_add(pcp, val) \ ({ \ __this_cpu_preempt_check("add"); \ raw_cpu_add(pcp, val); \ }) #define __this_cpu_and(pcp, val) \ ({ \ __this_cpu_preempt_check("and"); \ raw_cpu_and(pcp, val); \ }) #define __this_cpu_or(pcp, val) \ ({ \ __this_cpu_preempt_check("or"); \ raw_cpu_or(pcp, val); \ }) #define __this_cpu_add_return(pcp, val) \ ({ \ __this_cpu_preempt_check("add_return"); \ raw_cpu_add_return(pcp, val); \ }) #define __this_cpu_xchg(pcp, nval) \ ({ \ __this_cpu_preempt_check("xchg"); \ raw_cpu_xchg(pcp, nval); \ }) #define __this_cpu_cmpxchg(pcp, oval, nval) \ ({ \ __this_cpu_preempt_check("cmpxchg"); \ raw_cpu_cmpxchg(pcp, oval, nval); \ }) #define __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ ({ __this_cpu_preempt_check("cmpxchg_double"); \ raw_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2); \ }) #define __this_cpu_sub(pcp, val) __this_cpu_add(pcp, -(typeof(pcp))(val)) #define __this_cpu_inc(pcp) __this_cpu_add(pcp, 1) #define __this_cpu_dec(pcp) __this_cpu_sub(pcp, 1) #define __this_cpu_sub_return(pcp, val) __this_cpu_add_return(pcp, -(typeof(pcp))(val)) #define __this_cpu_inc_return(pcp) __this_cpu_add_return(pcp, 1) #define __this_cpu_dec_return(pcp) __this_cpu_add_return(pcp, -1) /* * Operations with implied preemption/interrupt protection. These * operations can be used without worrying about preemption or interrupt. */ #define this_cpu_read(pcp) __pcpu_size_call_return(this_cpu_read_, pcp) #define this_cpu_write(pcp, val) __pcpu_size_call(this_cpu_write_, pcp, val) #define this_cpu_add(pcp, val) __pcpu_size_call(this_cpu_add_, pcp, val) #define this_cpu_and(pcp, val) __pcpu_size_call(this_cpu_and_, pcp, val) #define this_cpu_or(pcp, val) __pcpu_size_call(this_cpu_or_, pcp, val) #define this_cpu_add_return(pcp, val) __pcpu_size_call_return2(this_cpu_add_return_, pcp, val) #define this_cpu_xchg(pcp, nval) __pcpu_size_call_return2(this_cpu_xchg_, pcp, nval) #define this_cpu_cmpxchg(pcp, oval, nval) \ __pcpu_size_call_return2(this_cpu_cmpxchg_, pcp, oval, nval) #define this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ __pcpu_double_call_return_bool(this_cpu_cmpxchg_double_, pcp1, pcp2, oval1, oval2, nval1, nval2) #define this_cpu_sub(pcp, val) this_cpu_add(pcp, -(typeof(pcp))(val)) #define this_cpu_inc(pcp) this_cpu_add(pcp, 1) #define this_cpu_dec(pcp) this_cpu_sub(pcp, 1) #define this_cpu_sub_return(pcp, val) this_cpu_add_return(pcp, -(typeof(pcp))(val)) #define this_cpu_inc_return(pcp) this_cpu_add_return(pcp, 1) #define this_cpu_dec_return(pcp) this_cpu_add_return(pcp, -1) #endif /* __ASSEMBLY__ */ #endif /* _LINUX_PERCPU_DEFS_H */ PK ! ��� � netdevice.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Definitions for the Interfaces handler. * * Version: @(#)dev.h 1.0.10 08/12/93 * * Authors: Ross Biro * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> * Corey Minyard <wf-rch!minyard@relay.EU.net> * Donald J. Becker, <becker@cesdis.gsfc.nasa.gov> * Alan Cox, <alan@lxorguk.ukuu.org.uk> * Bjorn Ekwall. <bj0rn@blox.se> * Pekka Riikonen <priikone@poseidon.pspt.fi> * * Moved to /usr/include/linux for NET3 */ #ifndef _LINUX_NETDEVICE_H #define _LINUX_NETDEVICE_H #include <linux/timer.h> #include <linux/bug.h> #include <linux/delay.h> #include <linux/atomic.h> #include <linux/prefetch.h> #include <asm/cache.h> #include <asm/byteorder.h> #include <linux/percpu.h> #include <linux/rculist.h> #include <linux/workqueue.h> #include <linux/dynamic_queue_limits.h> #include <net/net_namespace.h> #ifdef CONFIG_DCB #include <net/dcbnl.h> #endif #include <net/netprio_cgroup.h> #include <net/xdp.h> #include <linux/netdev_features.h> #include <linux/neighbour.h> #include <uapi/linux/netdevice.h> #include <uapi/linux/if_bonding.h> #include <uapi/linux/pkt_cls.h> #include <linux/hashtable.h> #include <linux/rbtree.h> struct netpoll_info; struct device; struct ethtool_ops; struct phy_device; struct dsa_port; struct ip_tunnel_parm; struct macsec_context; struct macsec_ops; struct sfp_bus; /* 802.11 specific */ struct wireless_dev; /* 802.15.4 specific */ struct wpan_dev; struct mpls_dev; /* UDP Tunnel offloads */ struct udp_tunnel_info; struct udp_tunnel_nic_info; struct udp_tunnel_nic; struct bpf_prog; struct xdp_buff; void synchronize_net(void); void netdev_set_default_ethtool_ops(struct net_device *dev, const struct ethtool_ops *ops); /* Backlog congestion levels */ #define NET_RX_SUCCESS 0 /* keep 'em coming, baby */ #define NET_RX_DROP 1 /* packet dropped */ #define MAX_NEST_DEV 8 /* * Transmit return codes: transmit return codes originate from three different * namespaces: * * - qdisc return codes * - driver transmit return codes * - errno values * * Drivers are allowed to return any one of those in their hard_start_xmit() * function. Real network devices commonly used with qdiscs should only return * the driver transmit return codes though - when qdiscs are used, the actual * transmission happens asynchronously, so the value is not propagated to * higher layers. Virtual network devices transmit synchronously; in this case * the driver transmit return codes are consumed by dev_queue_xmit(), and all * others are propagated to higher layers. */ /* qdisc ->enqueue() return codes. */ #define NET_XMIT_SUCCESS 0x00 #define NET_XMIT_DROP 0x01 /* skb dropped */ #define NET_XMIT_CN 0x02 /* congestion notification */ #define NET_XMIT_MASK 0x0f /* qdisc flags in net/sch_generic.h */ /* NET_XMIT_CN is special. It does not guarantee that this packet is lost. It * indicates that the device will soon be dropping packets, or already drops * some packets of the same priority; prompting us to send less aggressively. */ #define net_xmit_eval(e) ((e) == NET_XMIT_CN ? 0 : (e)) #define net_xmit_errno(e) ((e) != NET_XMIT_CN ? -ENOBUFS : 0) /* Driver transmit return codes */ #define NETDEV_TX_MASK 0xf0 enum netdev_tx { __NETDEV_TX_MIN = INT_MIN, /* make sure enum is signed */ NETDEV_TX_OK = 0x00, /* driver took care of packet */ NETDEV_TX_BUSY = 0x10, /* driver tx path was busy*/ }; typedef enum netdev_tx netdev_tx_t; /* * Current order: NETDEV_TX_MASK > NET_XMIT_MASK >= 0 is significant; * hard_start_xmit() return < NET_XMIT_MASK means skb was consumed. */ static inline bool dev_xmit_complete(int rc) { /* * Positive cases with an skb consumed by a driver: * - successful transmission (rc == NETDEV_TX_OK) * - error while transmitting (rc < 0) * - error while queueing to a different device (rc & NET_XMIT_MASK) */ if (likely(rc < NET_XMIT_MASK)) return true; return false; } /* * Compute the worst-case header length according to the protocols * used. */ #if defined(CONFIG_HYPERV_NET) # define LL_MAX_HEADER 128 #elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) # if defined(CONFIG_MAC80211_MESH) # define LL_MAX_HEADER 128 # else # define LL_MAX_HEADER 96 # endif #else # define LL_MAX_HEADER 32 #endif #if !IS_ENABLED(CONFIG_NET_IPIP) && !IS_ENABLED(CONFIG_NET_IPGRE) && \ !IS_ENABLED(CONFIG_IPV6_SIT) && !IS_ENABLED(CONFIG_IPV6_TUNNEL) #define MAX_HEADER LL_MAX_HEADER #else #define MAX_HEADER (LL_MAX_HEADER + 48) #endif /* * Old network device statistics. Fields are native words * (unsigned long) so they can be read and written atomically. */ #define NET_DEV_STAT(FIELD) \ union { \ unsigned long FIELD; \ atomic_long_t __##FIELD; \ } struct net_device_stats { NET_DEV_STAT(rx_packets); NET_DEV_STAT(tx_packets); NET_DEV_STAT(rx_bytes); NET_DEV_STAT(tx_bytes); NET_DEV_STAT(rx_errors); NET_DEV_STAT(tx_errors); NET_DEV_STAT(rx_dropped); NET_DEV_STAT(tx_dropped); NET_DEV_STAT(multicast); NET_DEV_STAT(collisions); NET_DEV_STAT(rx_length_errors); NET_DEV_STAT(rx_over_errors); NET_DEV_STAT(rx_crc_errors); NET_DEV_STAT(rx_frame_errors); NET_DEV_STAT(rx_fifo_errors); NET_DEV_STAT(rx_missed_errors); NET_DEV_STAT(tx_aborted_errors); NET_DEV_STAT(tx_carrier_errors); NET_DEV_STAT(tx_fifo_errors); NET_DEV_STAT(tx_heartbeat_errors); NET_DEV_STAT(tx_window_errors); NET_DEV_STAT(rx_compressed); NET_DEV_STAT(tx_compressed); }; #undef NET_DEV_STAT #include <linux/cache.h> #include <linux/skbuff.h> #ifdef CONFIG_RPS #include <linux/static_key.h> extern struct static_key_false rps_needed; extern struct static_key_false rfs_needed; #endif struct neighbour; struct neigh_parms; struct sk_buff; struct netdev_hw_addr { struct list_head list; struct rb_node node; unsigned char addr[MAX_ADDR_LEN]; unsigned char type; #define NETDEV_HW_ADDR_T_LAN 1 #define NETDEV_HW_ADDR_T_SAN 2 #define NETDEV_HW_ADDR_T_UNICAST 3 #define NETDEV_HW_ADDR_T_MULTICAST 4 bool global_use; int sync_cnt; int refcount; int synced; struct rcu_head rcu_head; }; struct netdev_hw_addr_list { struct list_head list; int count; /* Auxiliary tree for faster lookup on addition and deletion */ struct rb_root tree; }; #define netdev_hw_addr_list_count(l) ((l)->count) #define netdev_hw_addr_list_empty(l) (netdev_hw_addr_list_count(l) == 0) #define netdev_hw_addr_list_for_each(ha, l) \ list_for_each_entry(ha, &(l)->list, list) #define netdev_uc_count(dev) netdev_hw_addr_list_count(&(dev)->uc) #define netdev_uc_empty(dev) netdev_hw_addr_list_empty(&(dev)->uc) #define netdev_for_each_uc_addr(ha, dev) \ netdev_hw_addr_list_for_each(ha, &(dev)->uc) #define netdev_mc_count(dev) netdev_hw_addr_list_count(&(dev)->mc) #define netdev_mc_empty(dev) netdev_hw_addr_list_empty(&(dev)->mc) #define netdev_for_each_mc_addr(ha, dev) \ netdev_hw_addr_list_for_each(ha, &(dev)->mc) struct hh_cache { unsigned int hh_len; seqlock_t hh_lock; /* cached hardware header; allow for machine alignment needs. */ #define HH_DATA_MOD 16 #define HH_DATA_OFF(__len) \ (HH_DATA_MOD - (((__len - 1) & (HH_DATA_MOD - 1)) + 1)) #define HH_DATA_ALIGN(__len) \ (((__len)+(HH_DATA_MOD-1))&~(HH_DATA_MOD - 1)) unsigned long hh_data[HH_DATA_ALIGN(LL_MAX_HEADER) / sizeof(long)]; }; /* Reserve HH_DATA_MOD byte-aligned hard_header_len, but at least that much. * Alternative is: * dev->hard_header_len ? (dev->hard_header_len + * (HH_DATA_MOD - 1)) & ~(HH_DATA_MOD - 1) : 0 * * We could use other alignment values, but we must maintain the * relationship HH alignment <= LL alignment. */ #define LL_RESERVED_SPACE(dev) \ ((((dev)->hard_header_len + READ_ONCE((dev)->needed_headroom)) \ & ~(HH_DATA_MOD - 1)) + HH_DATA_MOD) #define LL_RESERVED_SPACE_EXTRA(dev,extra) \ ((((dev)->hard_header_len + READ_ONCE((dev)->needed_headroom) + (extra)) \ & ~(HH_DATA_MOD - 1)) + HH_DATA_MOD) struct header_ops { int (*create) (struct sk_buff *skb, struct net_device *dev, unsigned short type, const void *daddr, const void *saddr, unsigned int len); int (*parse)(const struct sk_buff *skb, unsigned char *haddr); int (*cache)(const struct neighbour *neigh, struct hh_cache *hh, __be16 type); void (*cache_update)(struct hh_cache *hh, const struct net_device *dev, const unsigned char *haddr); bool (*validate)(const char *ll_header, unsigned int len); __be16 (*parse_protocol)(const struct sk_buff *skb); }; /* These flag bits are private to the generic network queueing * layer; they may not be explicitly referenced by any other * code. */ enum netdev_state_t { __LINK_STATE_START, __LINK_STATE_PRESENT, __LINK_STATE_NOCARRIER, __LINK_STATE_LINKWATCH_PENDING, __LINK_STATE_DORMANT, __LINK_STATE_TESTING, }; struct gro_list { struct list_head list; int count; }; /* * size of gro hash buckets, must less than bit number of * napi_struct::gro_bitmask */ #define GRO_HASH_BUCKETS 8 /* * Structure for NAPI scheduling similar to tasklet but with weighting */ struct napi_struct { /* The poll_list must only be managed by the entity which * changes the state of the NAPI_STATE_SCHED bit. This means * whoever atomically sets that bit can add this napi_struct * to the per-CPU poll_list, and whoever clears that bit * can remove from the list right before clearing the bit. */ struct list_head poll_list; unsigned long state; int weight; int defer_hard_irqs_count; unsigned long gro_bitmask; int (*poll)(struct napi_struct *, int); #ifdef CONFIG_NETPOLL int poll_owner; #endif struct net_device *dev; struct gro_list gro_hash[GRO_HASH_BUCKETS]; struct sk_buff *skb; struct list_head rx_list; /* Pending GRO_NORMAL skbs */ int rx_count; /* length of rx_list */ struct hrtimer timer; struct list_head dev_list; struct hlist_node napi_hash_node; unsigned int napi_id; struct task_struct *thread; }; enum { NAPI_STATE_SCHED, /* Poll is scheduled */ NAPI_STATE_MISSED, /* reschedule a napi */ NAPI_STATE_DISABLE, /* Disable pending */ NAPI_STATE_NPSVC, /* Netpoll - don't dequeue from poll_list */ NAPI_STATE_LISTED, /* NAPI added to system lists */ NAPI_STATE_NO_BUSY_POLL, /* Do not add in napi_hash, no busy polling */ NAPI_STATE_IN_BUSY_POLL, /* sk_busy_loop() owns this NAPI */ NAPI_STATE_PREFER_BUSY_POLL, /* prefer busy-polling over softirq processing*/ NAPI_STATE_THREADED, /* The poll is performed inside its own thread*/ NAPI_STATE_SCHED_THREADED, /* Napi is currently scheduled in threaded mode */ }; enum { NAPIF_STATE_SCHED = BIT(NAPI_STATE_SCHED), NAPIF_STATE_MISSED = BIT(NAPI_STATE_MISSED), NAPIF_STATE_DISABLE = BIT(NAPI_STATE_DISABLE), NAPIF_STATE_NPSVC = BIT(NAPI_STATE_NPSVC), NAPIF_STATE_LISTED = BIT(NAPI_STATE_LISTED), NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL), NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL), NAPIF_STATE_PREFER_BUSY_POLL = BIT(NAPI_STATE_PREFER_BUSY_POLL), NAPIF_STATE_THREADED = BIT(NAPI_STATE_THREADED), NAPIF_STATE_SCHED_THREADED = BIT(NAPI_STATE_SCHED_THREADED), }; enum gro_result { GRO_MERGED, GRO_MERGED_FREE, GRO_HELD, GRO_NORMAL, GRO_CONSUMED, }; typedef enum gro_result gro_result_t; /* * enum rx_handler_result - Possible return values for rx_handlers. * @RX_HANDLER_CONSUMED: skb was consumed by rx_handler, do not process it * further. * @RX_HANDLER_ANOTHER: Do another round in receive path. This is indicated in * case skb->dev was changed by rx_handler. * @RX_HANDLER_EXACT: Force exact delivery, no wildcard. * @RX_HANDLER_PASS: Do nothing, pass the skb as if no rx_handler was called. * * rx_handlers are functions called from inside __netif_receive_skb(), to do * special processing of the skb, prior to delivery to protocol handlers. * * Currently, a net_device can only have a single rx_handler registered. Trying * to register a second rx_handler will return -EBUSY. * * To register a rx_handler on a net_device, use netdev_rx_handler_register(). * To unregister a rx_handler on a net_device, use * netdev_rx_handler_unregister(). * * Upon return, rx_handler is expected to tell __netif_receive_skb() what to * do with the skb. * * If the rx_handler consumed the skb in some way, it should return * RX_HANDLER_CONSUMED. This is appropriate when the rx_handler arranged for * the skb to be delivered in some other way. * * If the rx_handler changed skb->dev, to divert the skb to another * net_device, it should return RX_HANDLER_ANOTHER. The rx_handler for the * new device will be called if it exists. * * If the rx_handler decides the skb should be ignored, it should return * RX_HANDLER_EXACT. The skb will only be delivered to protocol handlers that * are registered on exact device (ptype->dev == skb->dev). * * If the rx_handler didn't change skb->dev, but wants the skb to be normally * delivered, it should return RX_HANDLER_PASS. * * A device without a registered rx_handler will behave as if rx_handler * returned RX_HANDLER_PASS. */ enum rx_handler_result { RX_HANDLER_CONSUMED, RX_HANDLER_ANOTHER, RX_HANDLER_EXACT, RX_HANDLER_PASS, }; typedef enum rx_handler_result rx_handler_result_t; typedef rx_handler_result_t rx_handler_func_t(struct sk_buff **pskb); void __napi_schedule(struct napi_struct *n); void __napi_schedule_irqoff(struct napi_struct *n); static inline bool napi_disable_pending(struct napi_struct *n) { return test_bit(NAPI_STATE_DISABLE, &n->state); } static inline bool napi_prefer_busy_poll(struct napi_struct *n) { return test_bit(NAPI_STATE_PREFER_BUSY_POLL, &n->state); } bool napi_schedule_prep(struct napi_struct *n); /** * napi_schedule - schedule NAPI poll * @n: NAPI context * * Schedule NAPI poll routine to be called if it is not already * running. */ static inline void napi_schedule(struct napi_struct *n) { if (napi_schedule_prep(n)) __napi_schedule(n); } /** * napi_schedule_irqoff - schedule NAPI poll * @n: NAPI context * * Variant of napi_schedule(), assuming hard irqs are masked. */ static inline void napi_schedule_irqoff(struct napi_struct *n) { if (napi_schedule_prep(n)) __napi_schedule_irqoff(n); } /* Try to reschedule poll. Called by dev->poll() after napi_complete(). */ static inline bool napi_reschedule(struct napi_struct *napi) { if (napi_schedule_prep(napi)) { __napi_schedule(napi); return true; } return false; } bool napi_complete_done(struct napi_struct *n, int work_done); /** * napi_complete - NAPI processing complete * @n: NAPI context * * Mark NAPI processing as complete. * Consider using napi_complete_done() instead. * Return false if device should avoid rearming interrupts. */ static inline bool napi_complete(struct napi_struct *n) { return napi_complete_done(n, 0); } int dev_set_threaded(struct net_device *dev, bool threaded); /** * napi_disable - prevent NAPI from scheduling * @n: NAPI context * * Stop NAPI from being scheduled on this context. * Waits till any outstanding processing completes. */ void napi_disable(struct napi_struct *n); void napi_enable(struct napi_struct *n); /** * napi_synchronize - wait until NAPI is not running * @n: NAPI context * * Wait until NAPI is done being scheduled on this context. * Waits till any outstanding processing completes but * does not disable future activations. */ static inline void napi_synchronize(const struct napi_struct *n) { if (IS_ENABLED(CONFIG_SMP)) while (test_bit(NAPI_STATE_SCHED, &n->state)) msleep(1); else barrier(); } /** * napi_if_scheduled_mark_missed - if napi is running, set the * NAPIF_STATE_MISSED * @n: NAPI context * * If napi is running, set the NAPIF_STATE_MISSED, and return true if * NAPI is scheduled. **/ static inline bool napi_if_scheduled_mark_missed(struct napi_struct *n) { unsigned long val, new; do { val = READ_ONCE(n->state); if (val & NAPIF_STATE_DISABLE) return true; if (!(val & NAPIF_STATE_SCHED)) return false; new = val | NAPIF_STATE_MISSED; } while (cmpxchg(&n->state, val, new) != val); return true; } enum netdev_queue_state_t { __QUEUE_STATE_DRV_XOFF, __QUEUE_STATE_STACK_XOFF, __QUEUE_STATE_FROZEN, }; #define QUEUE_STATE_DRV_XOFF (1 << __QUEUE_STATE_DRV_XOFF) #define QUEUE_STATE_STACK_XOFF (1 << __QUEUE_STATE_STACK_XOFF) #define QUEUE_STATE_FROZEN (1 << __QUEUE_STATE_FROZEN) #define QUEUE_STATE_ANY_XOFF (QUEUE_STATE_DRV_XOFF | QUEUE_STATE_STACK_XOFF) #define QUEUE_STATE_ANY_XOFF_OR_FROZEN (QUEUE_STATE_ANY_XOFF | \ QUEUE_STATE_FROZEN) #define QUEUE_STATE_DRV_XOFF_OR_FROZEN (QUEUE_STATE_DRV_XOFF | \ QUEUE_STATE_FROZEN) /* * __QUEUE_STATE_DRV_XOFF is used by drivers to stop the transmit queue. The * netif_tx_* functions below are used to manipulate this flag. The * __QUEUE_STATE_STACK_XOFF flag is used by the stack to stop the transmit * queue independently. The netif_xmit_*stopped functions below are called * to check if the queue has been stopped by the driver or stack (either * of the XOFF bits are set in the state). Drivers should not need to call * netif_xmit*stopped functions, they should only be using netif_tx_*. */ struct netdev_queue { /* * read-mostly part */ struct net_device *dev; struct Qdisc __rcu *qdisc; struct Qdisc *qdisc_sleeping; #ifdef CONFIG_SYSFS struct kobject kobj; #endif #if defined(CONFIG_XPS) && defined(CONFIG_NUMA) int numa_node; #endif unsigned long tx_maxrate; /* * Number of TX timeouts for this queue * (/sys/class/net/DEV/Q/trans_timeout) */ unsigned long trans_timeout; /* Subordinate device that the queue has been assigned to */ struct net_device *sb_dev; #ifdef CONFIG_XDP_SOCKETS struct xsk_buff_pool *pool; #endif /* * write-mostly part */ spinlock_t _xmit_lock ____cacheline_aligned_in_smp; int xmit_lock_owner; /* * Time (in jiffies) of last Tx */ unsigned long trans_start; unsigned long state; #ifdef CONFIG_BQL struct dql dql; #endif } ____cacheline_aligned_in_smp; extern int sysctl_fb_tunnels_only_for_init_net; extern int sysctl_devconf_inherit_init_net; /* * sysctl_fb_tunnels_only_for_init_net == 0 : For all netns * == 1 : For initns only * == 2 : For none. */ static inline bool net_has_fallback_tunnels(const struct net *net) { #if IS_ENABLED(CONFIG_SYSCTL) int fb_tunnels_only_for_init_net = READ_ONCE(sysctl_fb_tunnels_only_for_init_net); return !fb_tunnels_only_for_init_net || (net_eq(net, &init_net) && fb_tunnels_only_for_init_net == 1); #else return true; #endif } static inline int net_inherit_devconf(void) { #if IS_ENABLED(CONFIG_SYSCTL) return READ_ONCE(sysctl_devconf_inherit_init_net); #else return 0; #endif } static inline int netdev_queue_numa_node_read(const struct netdev_queue *q) { #if defined(CONFIG_XPS) && defined(CONFIG_NUMA) return q->numa_node; #else return NUMA_NO_NODE; #endif } static inline void netdev_queue_numa_node_write(struct netdev_queue *q, int node) { #if defined(CONFIG_XPS) && defined(CONFIG_NUMA) q->numa_node = node; #endif } #ifdef CONFIG_RPS /* * This structure holds an RPS map which can be of variable length. The * map is an array of CPUs. */ struct rps_map { unsigned int len; struct rcu_head rcu; u16 cpus[]; }; #define RPS_MAP_SIZE(_num) (sizeof(struct rps_map) + ((_num) * sizeof(u16))) /* * The rps_dev_flow structure contains the mapping of a flow to a CPU, the * tail pointer for that CPU's input queue at the time of last enqueue, and * a hardware filter index. */ struct rps_dev_flow { u16 cpu; u16 filter; unsigned int last_qtail; }; #define RPS_NO_FILTER 0xffff /* * The rps_dev_flow_table structure contains a table of flow mappings. */ struct rps_dev_flow_table { unsigned int mask; struct rcu_head rcu; struct rps_dev_flow flows[]; }; #define RPS_DEV_FLOW_TABLE_SIZE(_num) (sizeof(struct rps_dev_flow_table) + \ ((_num) * sizeof(struct rps_dev_flow))) /* * The rps_sock_flow_table contains mappings of flows to the last CPU * on which they were processed by the application (set in recvmsg). * Each entry is a 32bit value. Upper part is the high-order bits * of flow hash, lower part is CPU number. * rps_cpu_mask is used to partition the space, depending on number of * possible CPUs : rps_cpu_mask = roundup_pow_of_two(nr_cpu_ids) - 1 * For example, if 64 CPUs are possible, rps_cpu_mask = 0x3f, * meaning we use 32-6=26 bits for the hash. */ struct rps_sock_flow_table { u32 mask; u32 ents[] ____cacheline_aligned_in_smp; }; #define RPS_SOCK_FLOW_TABLE_SIZE(_num) (offsetof(struct rps_sock_flow_table, ents[_num])) #define RPS_NO_CPU 0xffff extern u32 rps_cpu_mask; extern struct rps_sock_flow_table __rcu *rps_sock_flow_table; static inline void rps_record_sock_flow(struct rps_sock_flow_table *table, u32 hash) { if (table && hash) { unsigned int index = hash & table->mask; u32 val = hash & ~rps_cpu_mask; /* We only give a hint, preemption can change CPU under us */ val |= raw_smp_processor_id(); /* The following WRITE_ONCE() is paired with the READ_ONCE() * here, and another one in get_rps_cpu(). */ if (READ_ONCE(table->ents[index]) != val) WRITE_ONCE(table->ents[index], val); } } #ifdef CONFIG_RFS_ACCEL bool rps_may_expire_flow(struct net_device *dev, u16 rxq_index, u32 flow_id, u16 filter_id); #endif #endif /* CONFIG_RPS */ /* This structure contains an instance of an RX queue. */ struct netdev_rx_queue { struct xdp_rxq_info xdp_rxq; #ifdef CONFIG_RPS struct rps_map __rcu *rps_map; struct rps_dev_flow_table __rcu *rps_flow_table; #endif struct kobject kobj; struct net_device *dev; #ifdef CONFIG_XDP_SOCKETS struct xsk_buff_pool *pool; #endif } ____cacheline_aligned_in_smp; /* * RX queue sysfs structures and functions. */ struct rx_queue_attribute { struct attribute attr; ssize_t (*show)(struct netdev_rx_queue *queue, char *buf); ssize_t (*store)(struct netdev_rx_queue *queue, const char *buf, size_t len); }; /* XPS map type and offset of the xps map within net_device->xps_maps[]. */ enum xps_map_type { XPS_CPUS = 0, XPS_RXQS, XPS_MAPS_MAX, }; #ifdef CONFIG_XPS /* * This structure holds an XPS map which can be of variable length. The * map is an array of queues. */ struct xps_map { unsigned int len; unsigned int alloc_len; struct rcu_head rcu; u16 queues[]; }; #define XPS_MAP_SIZE(_num) (sizeof(struct xps_map) + ((_num) * sizeof(u16))) #define XPS_MIN_MAP_ALLOC ((L1_CACHE_ALIGN(offsetof(struct xps_map, queues[1])) \ - sizeof(struct xps_map)) / sizeof(u16)) /* * This structure holds all XPS maps for device. Maps are indexed by CPU. * * We keep track of the number of cpus/rxqs used when the struct is allocated, * in nr_ids. This will help not accessing out-of-bound memory. * * We keep track of the number of traffic classes used when the struct is * allocated, in num_tc. This will be used to navigate the maps, to ensure we're * not crossing its upper bound, as the original dev->num_tc can be updated in * the meantime. */ struct xps_dev_maps { struct rcu_head rcu; unsigned int nr_ids; s16 num_tc; struct xps_map __rcu *attr_map[]; /* Either CPUs map or RXQs map */ }; #define XPS_CPU_DEV_MAPS_SIZE(_tcs) (sizeof(struct xps_dev_maps) + \ (nr_cpu_ids * (_tcs) * sizeof(struct xps_map *))) #define XPS_RXQ_DEV_MAPS_SIZE(_tcs, _rxqs) (sizeof(struct xps_dev_maps) +\ (_rxqs * (_tcs) * sizeof(struct xps_map *))) #endif /* CONFIG_XPS */ #define TC_MAX_QUEUE 16 #define TC_BITMASK 15 /* HW offloaded queuing disciplines txq count and offset maps */ struct netdev_tc_txq { u16 count; u16 offset; }; #if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) /* * This structure is to hold information about the device * configured to run FCoE protocol stack. */ struct netdev_fcoe_hbainfo { char manufacturer[64]; char serial_number[64]; char hardware_version[64]; char driver_version[64]; char optionrom_version[64]; char firmware_version[64]; char model[256]; char model_description[256]; }; #endif #define MAX_PHYS_ITEM_ID_LEN 32 /* This structure holds a unique identifier to identify some * physical item (port for example) used by a netdevice. */ struct netdev_phys_item_id { unsigned char id[MAX_PHYS_ITEM_ID_LEN]; unsigned char id_len; }; static inline bool netdev_phys_item_id_same(struct netdev_phys_item_id *a, struct netdev_phys_item_id *b) { return a->id_len == b->id_len && memcmp(a->id, b->id, a->id_len) == 0; } typedef u16 (*select_queue_fallback_t)(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev); enum net_device_path_type { DEV_PATH_ETHERNET = 0, DEV_PATH_VLAN, DEV_PATH_BRIDGE, DEV_PATH_PPPOE, DEV_PATH_DSA, }; struct net_device_path { enum net_device_path_type type; const struct net_device *dev; union { struct { u16 id; __be16 proto; u8 h_dest[ETH_ALEN]; } encap; struct { enum { DEV_PATH_BR_VLAN_KEEP, DEV_PATH_BR_VLAN_TAG, DEV_PATH_BR_VLAN_UNTAG, DEV_PATH_BR_VLAN_UNTAG_HW, } vlan_mode; u16 vlan_id; __be16 vlan_proto; } bridge; struct { int port; u16 proto; } dsa; }; }; #define NET_DEVICE_PATH_STACK_MAX 5 #define NET_DEVICE_PATH_VLAN_MAX 2 struct net_device_path_stack { int num_paths; struct net_device_path path[NET_DEVICE_PATH_STACK_MAX]; }; struct net_device_path_ctx { const struct net_device *dev; u8 daddr[ETH_ALEN]; int num_vlans; struct { u16 id; __be16 proto; } vlan[NET_DEVICE_PATH_VLAN_MAX]; }; enum tc_setup_type { TC_SETUP_QDISC_MQPRIO, TC_SETUP_CLSU32, TC_SETUP_CLSFLOWER, TC_SETUP_CLSMATCHALL, TC_SETUP_CLSBPF, TC_SETUP_BLOCK, TC_SETUP_QDISC_CBS, TC_SETUP_QDISC_RED, TC_SETUP_QDISC_PRIO, TC_SETUP_QDISC_MQ, TC_SETUP_QDISC_ETF, TC_SETUP_ROOT_QDISC, TC_SETUP_QDISC_GRED, TC_SETUP_QDISC_TAPRIO, TC_SETUP_FT, TC_SETUP_QDISC_ETS, TC_SETUP_QDISC_TBF, TC_SETUP_QDISC_FIFO, TC_SETUP_QDISC_HTB, }; /* These structures hold the attributes of bpf state that are being passed * to the netdevice through the bpf op. */ enum bpf_netdev_command { /* Set or clear a bpf program used in the earliest stages of packet * rx. The prog will have been loaded as BPF_PROG_TYPE_XDP. The callee * is responsible for calling bpf_prog_put on any old progs that are * stored. In case of error, the callee need not release the new prog * reference, but on success it takes ownership and must bpf_prog_put * when it is no longer used. */ XDP_SETUP_PROG, XDP_SETUP_PROG_HW, /* BPF program for offload callbacks, invoked at program load time. */ BPF_OFFLOAD_MAP_ALLOC, BPF_OFFLOAD_MAP_FREE, XDP_SETUP_XSK_POOL, }; struct bpf_prog_offload_ops; struct netlink_ext_ack; struct xdp_umem; struct xdp_dev_bulk_queue; struct bpf_xdp_link; enum bpf_xdp_mode { XDP_MODE_SKB = 0, XDP_MODE_DRV = 1, XDP_MODE_HW = 2, __MAX_XDP_MODE }; struct bpf_xdp_entity { struct bpf_prog *prog; struct bpf_xdp_link *link; }; struct netdev_bpf { enum bpf_netdev_command command; union { /* XDP_SETUP_PROG */ struct { u32 flags; struct bpf_prog *prog; struct netlink_ext_ack *extack; }; /* BPF_OFFLOAD_MAP_ALLOC, BPF_OFFLOAD_MAP_FREE */ struct { struct bpf_offloaded_map *offmap; }; /* XDP_SETUP_XSK_POOL */ struct { struct xsk_buff_pool *pool; u16 queue_id; } xsk; }; }; /* Flags for ndo_xsk_wakeup. */ #define XDP_WAKEUP_RX (1 << 0) #define XDP_WAKEUP_TX (1 << 1) #ifdef CONFIG_XFRM_OFFLOAD struct xfrmdev_ops { int (*xdo_dev_state_add) (struct xfrm_state *x); void (*xdo_dev_state_delete) (struct xfrm_state *x); void (*xdo_dev_state_free) (struct xfrm_state *x); bool (*xdo_dev_offload_ok) (struct sk_buff *skb, struct xfrm_state *x); void (*xdo_dev_state_advance_esn) (struct xfrm_state *x); }; #endif struct dev_ifalias { struct rcu_head rcuhead; char ifalias[]; }; struct devlink; struct tlsdev_ops; struct netdev_name_node { struct hlist_node hlist; struct list_head list; struct net_device *dev; const char *name; }; int netdev_name_node_alt_create(struct net_device *dev, const char *name); int netdev_name_node_alt_destroy(struct net_device *dev, const char *name); struct netdev_net_notifier { struct list_head list; struct notifier_block *nb; }; /* * This structure defines the management hooks for network devices. * The following hooks can be defined; unless noted otherwise, they are * optional and can be filled with a null pointer. * * int (*ndo_init)(struct net_device *dev); * This function is called once when a network device is registered. * The network device can use this for any late stage initialization * or semantic validation. It can fail with an error code which will * be propagated back to register_netdev. * * void (*ndo_uninit)(struct net_device *dev); * This function is called when device is unregistered or when registration * fails. It is not called if init fails. * * int (*ndo_open)(struct net_device *dev); * This function is called when a network device transitions to the up * state. * * int (*ndo_stop)(struct net_device *dev); * This function is called when a network device transitions to the down * state. * * netdev_tx_t (*ndo_start_xmit)(struct sk_buff *skb, * struct net_device *dev); * Called when a packet needs to be transmitted. * Returns NETDEV_TX_OK. Can return NETDEV_TX_BUSY, but you should stop * the queue before that can happen; it's for obsolete devices and weird * corner cases, but the stack really does a non-trivial amount * of useless work if you return NETDEV_TX_BUSY. * Required; cannot be NULL. * * netdev_features_t (*ndo_features_check)(struct sk_buff *skb, * struct net_device *dev * netdev_features_t features); * Called by core transmit path to determine if device is capable of * performing offload operations on a given packet. This is to give * the device an opportunity to implement any restrictions that cannot * be otherwise expressed by feature flags. The check is called with * the set of features that the stack has calculated and it returns * those the driver believes to be appropriate. * * u16 (*ndo_select_queue)(struct net_device *dev, struct sk_buff *skb, * struct net_device *sb_dev); * Called to decide which queue to use when device supports multiple * transmit queues. * * void (*ndo_change_rx_flags)(struct net_device *dev, int flags); * This function is called to allow device receiver to make * changes to configuration when multicast or promiscuous is enabled. * * void (*ndo_set_rx_mode)(struct net_device *dev); * This function is called device changes address list filtering. * If driver handles unicast address filtering, it should set * IFF_UNICAST_FLT in its priv_flags. * * int (*ndo_set_mac_address)(struct net_device *dev, void *addr); * This function is called when the Media Access Control address * needs to be changed. If this interface is not defined, the * MAC address can not be changed. * * int (*ndo_validate_addr)(struct net_device *dev); * Test if Media Access Control address is valid for the device. * * int (*ndo_do_ioctl)(struct net_device *dev, struct ifreq *ifr, int cmd); * Old-style ioctl entry point. This is used internally by the * appletalk and ieee802154 subsystems but is no longer called by * the device ioctl handler. * * int (*ndo_siocbond)(struct net_device *dev, struct ifreq *ifr, int cmd); * Used by the bonding driver for its device specific ioctls: * SIOCBONDENSLAVE, SIOCBONDRELEASE, SIOCBONDSETHWADDR, SIOCBONDCHANGEACTIVE, * SIOCBONDSLAVEINFOQUERY, and SIOCBONDINFOQUERY * * * int (*ndo_eth_ioctl)(struct net_device *dev, struct ifreq *ifr, int cmd); * Called for ethernet specific ioctls: SIOCGMIIPHY, SIOCGMIIREG, * SIOCSMIIREG, SIOCSHWTSTAMP and SIOCGHWTSTAMP. * * int (*ndo_set_config)(struct net_device *dev, struct ifmap *map); * Used to set network devices bus interface parameters. This interface * is retained for legacy reasons; new devices should use the bus * interface (PCI) for low level management. * * int (*ndo_change_mtu)(struct net_device *dev, int new_mtu); * Called when a user wants to change the Maximum Transfer Unit * of a device. * * void (*ndo_tx_timeout)(struct net_device *dev, unsigned int txqueue); * Callback used when the transmitter has not made any progress * for dev->watchdog ticks. * * void (*ndo_get_stats64)(struct net_device *dev, * struct rtnl_link_stats64 *storage); * struct net_device_stats* (*ndo_get_stats)(struct net_device *dev); * Called when a user wants to get the network device usage * statistics. Drivers must do one of the following: * 1. Define @ndo_get_stats64 to fill in a zero-initialised * rtnl_link_stats64 structure passed by the caller. * 2. Define @ndo_get_stats to update a net_device_stats structure * (which should normally be dev->stats) and return a pointer to * it. The structure may be changed asynchronously only if each * field is written atomically. * 3. Update dev->stats asynchronously and atomically, and define * neither operation. * * bool (*ndo_has_offload_stats)(const struct net_device *dev, int attr_id) * Return true if this device supports offload stats of this attr_id. * * int (*ndo_get_offload_stats)(int attr_id, const struct net_device *dev, * void *attr_data) * Get statistics for offload operations by attr_id. Write it into the * attr_data pointer. * * int (*ndo_vlan_rx_add_vid)(struct net_device *dev, __be16 proto, u16 vid); * If device supports VLAN filtering this function is called when a * VLAN id is registered. * * int (*ndo_vlan_rx_kill_vid)(struct net_device *dev, __be16 proto, u16 vid); * If device supports VLAN filtering this function is called when a * VLAN id is unregistered. * * void (*ndo_poll_controller)(struct net_device *dev); * * SR-IOV management functions. * int (*ndo_set_vf_mac)(struct net_device *dev, int vf, u8* mac); * int (*ndo_set_vf_vlan)(struct net_device *dev, int vf, u16 vlan, * u8 qos, __be16 proto); * int (*ndo_set_vf_rate)(struct net_device *dev, int vf, int min_tx_rate, * int max_tx_rate); * int (*ndo_set_vf_spoofchk)(struct net_device *dev, int vf, bool setting); * int (*ndo_set_vf_trust)(struct net_device *dev, int vf, bool setting); * int (*ndo_get_vf_config)(struct net_device *dev, * int vf, struct ifla_vf_info *ivf); * int (*ndo_set_vf_link_state)(struct net_device *dev, int vf, int link_state); * int (*ndo_set_vf_port)(struct net_device *dev, int vf, * struct nlattr *port[]); * * Enable or disable the VF ability to query its RSS Redirection Table and * Hash Key. This is needed since on some devices VF share this information * with PF and querying it may introduce a theoretical security risk. * int (*ndo_set_vf_rss_query_en)(struct net_device *dev, int vf, bool setting); * int (*ndo_get_vf_port)(struct net_device *dev, int vf, struct sk_buff *skb); * int (*ndo_setup_tc)(struct net_device *dev, enum tc_setup_type type, * void *type_data); * Called to setup any 'tc' scheduler, classifier or action on @dev. * This is always called from the stack with the rtnl lock held and netif * tx queues stopped. This allows the netdevice to perform queue * management safely. * * Fiber Channel over Ethernet (FCoE) offload functions. * int (*ndo_fcoe_enable)(struct net_device *dev); * Called when the FCoE protocol stack wants to start using LLD for FCoE * so the underlying device can perform whatever needed configuration or * initialization to support acceleration of FCoE traffic. * * int (*ndo_fcoe_disable)(struct net_device *dev); * Called when the FCoE protocol stack wants to stop using LLD for FCoE * so the underlying device can perform whatever needed clean-ups to * stop supporting acceleration of FCoE traffic. * * int (*ndo_fcoe_ddp_setup)(struct net_device *dev, u16 xid, * struct scatterlist *sgl, unsigned int sgc); * Called when the FCoE Initiator wants to initialize an I/O that * is a possible candidate for Direct Data Placement (DDP). The LLD can * perform necessary setup and returns 1 to indicate the device is set up * successfully to perform DDP on this I/O, otherwise this returns 0. * * int (*ndo_fcoe_ddp_done)(struct net_device *dev, u16 xid); * Called when the FCoE Initiator/Target is done with the DDPed I/O as * indicated by the FC exchange id 'xid', so the underlying device can * clean up and reuse resources for later DDP requests. * * int (*ndo_fcoe_ddp_target)(struct net_device *dev, u16 xid, * struct scatterlist *sgl, unsigned int sgc); * Called when the FCoE Target wants to initialize an I/O that * is a possible candidate for Direct Data Placement (DDP). The LLD can * perform necessary setup and returns 1 to indicate the device is set up * successfully to perform DDP on this I/O, otherwise this returns 0. * * int (*ndo_fcoe_get_hbainfo)(struct net_device *dev, * struct netdev_fcoe_hbainfo *hbainfo); * Called when the FCoE Protocol stack wants information on the underlying * device. This information is utilized by the FCoE protocol stack to * register attributes with Fiber Channel management service as per the * FC-GS Fabric Device Management Information(FDMI) specification. * * int (*ndo_fcoe_get_wwn)(struct net_device *dev, u64 *wwn, int type); * Called when the underlying device wants to override default World Wide * Name (WWN) generation mechanism in FCoE protocol stack to pass its own * World Wide Port Name (WWPN) or World Wide Node Name (WWNN) to the FCoE * protocol stack to use. * * RFS acceleration. * int (*ndo_rx_flow_steer)(struct net_device *dev, const struct sk_buff *skb, * u16 rxq_index, u32 flow_id); * Set hardware filter for RFS. rxq_index is the target queue index; * flow_id is a flow ID to be passed to rps_may_expire_flow() later. * Return the filter ID on success, or a negative error code. * * Slave management functions (for bridge, bonding, etc). * int (*ndo_add_slave)(struct net_device *dev, struct net_device *slave_dev); * Called to make another netdev an underling. * * int (*ndo_del_slave)(struct net_device *dev, struct net_device *slave_dev); * Called to release previously enslaved netdev. * * struct net_device *(*ndo_get_xmit_slave)(struct net_device *dev, * struct sk_buff *skb, * bool all_slaves); * Get the xmit slave of master device. If all_slaves is true, function * assume all the slaves can transmit. * * Feature/offload setting functions. * netdev_features_t (*ndo_fix_features)(struct net_device *dev, * netdev_features_t features); * Adjusts the requested feature flags according to device-specific * constraints, and returns the resulting flags. Must not modify * the device state. * * int (*ndo_set_features)(struct net_device *dev, netdev_features_t features); * Called to update device configuration to new features. Passed * feature set might be less than what was returned by ndo_fix_features()). * Must return >0 or -errno if it changed dev->features itself. * * int (*ndo_fdb_add)(struct ndmsg *ndm, struct nlattr *tb[], * struct net_device *dev, * const unsigned char *addr, u16 vid, u16 flags, * struct netlink_ext_ack *extack); * Adds an FDB entry to dev for addr. * int (*ndo_fdb_del)(struct ndmsg *ndm, struct nlattr *tb[], * struct net_device *dev, * const unsigned char *addr, u16 vid) * Deletes the FDB entry from dev coresponding to addr. * int (*ndo_fdb_del_bulk)(struct ndmsg *ndm, struct nlattr *tb[], * struct net_device *dev, * u16 vid, * struct netlink_ext_ack *extack); * int (*ndo_fdb_dump)(struct sk_buff *skb, struct netlink_callback *cb, * struct net_device *dev, struct net_device *filter_dev, * int *idx) * Used to add FDB entries to dump requests. Implementers should add * entries to skb and update idx with the number of entries. * * int (*ndo_bridge_setlink)(struct net_device *dev, struct nlmsghdr *nlh, * u16 flags, struct netlink_ext_ack *extack) * int (*ndo_bridge_getlink)(struct sk_buff *skb, u32 pid, u32 seq, * struct net_device *dev, u32 filter_mask, * int nlflags) * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh, * u16 flags); * * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier); * Called to change device carrier. Soft-devices (like dummy, team, etc) * which do not represent real hardware may define this to allow their * userspace components to manage their virtual carrier state. Devices * that determine carrier state from physical hardware properties (eg * network cables) or protocol-dependent mechanisms (eg * USB_CDC_NOTIFY_NETWORK_CONNECTION) should NOT implement this function. * * int (*ndo_get_phys_port_id)(struct net_device *dev, * struct netdev_phys_item_id *ppid); * Called to get ID of physical port of this device. If driver does * not implement this, it is assumed that the hw is not able to have * multiple net devices on single physical port. * * int (*ndo_get_port_parent_id)(struct net_device *dev, * struct netdev_phys_item_id *ppid) * Called to get the parent ID of the physical port of this device. * * void* (*ndo_dfwd_add_station)(struct net_device *pdev, * struct net_device *dev) * Called by upper layer devices to accelerate switching or other * station functionality into hardware. 'pdev is the lowerdev * to use for the offload and 'dev' is the net device that will * back the offload. Returns a pointer to the private structure * the upper layer will maintain. * void (*ndo_dfwd_del_station)(struct net_device *pdev, void *priv) * Called by upper layer device to delete the station created * by 'ndo_dfwd_add_station'. 'pdev' is the net device backing * the station and priv is the structure returned by the add * operation. * int (*ndo_set_tx_maxrate)(struct net_device *dev, * int queue_index, u32 maxrate); * Called when a user wants to set a max-rate limitation of specific * TX queue. * int (*ndo_get_iflink)(const struct net_device *dev); * Called to get the iflink value of this device. * void (*ndo_change_proto_down)(struct net_device *dev, * bool proto_down); * This function is used to pass protocol port error state information * to the switch driver. The switch driver can react to the proto_down * by doing a phys down on the associated switch port. * int (*ndo_fill_metadata_dst)(struct net_device *dev, struct sk_buff *skb); * This function is used to get egress tunnel information for given skb. * This is useful for retrieving outer tunnel header parameters while * sampling packet. * void (*ndo_set_rx_headroom)(struct net_device *dev, int needed_headroom); * This function is used to specify the headroom that the skb must * consider when allocation skb during packet reception. Setting * appropriate rx headroom value allows avoiding skb head copy on * forward. Setting a negative value resets the rx headroom to the * default value. * int (*ndo_bpf)(struct net_device *dev, struct netdev_bpf *bpf); * This function is used to set or query state related to XDP on the * netdevice and manage BPF offload. See definition of * enum bpf_netdev_command for details. * int (*ndo_xdp_xmit)(struct net_device *dev, int n, struct xdp_frame **xdp, * u32 flags); * This function is used to submit @n XDP packets for transmit on a * netdevice. Returns number of frames successfully transmitted, frames * that got dropped are freed/returned via xdp_return_frame(). * Returns negative number, means general error invoking ndo, meaning * no frames were xmit'ed and core-caller will free all frames. * struct net_device *(*ndo_xdp_get_xmit_slave)(struct net_device *dev, * struct xdp_buff *xdp); * Get the xmit slave of master device based on the xdp_buff. * int (*ndo_xsk_wakeup)(struct net_device *dev, u32 queue_id, u32 flags); * This function is used to wake up the softirq, ksoftirqd or kthread * responsible for sending and/or receiving packets on a specific * queue id bound to an AF_XDP socket. The flags field specifies if * only RX, only Tx, or both should be woken up using the flags * XDP_WAKEUP_RX and XDP_WAKEUP_TX. * struct devlink_port *(*ndo_get_devlink_port)(struct net_device *dev); * Get devlink port instance associated with a given netdev. * Called with a reference on the netdevice and devlink locks only, * rtnl_lock is not held. * int (*ndo_tunnel_ctl)(struct net_device *dev, struct ip_tunnel_parm *p, * int cmd); * Add, change, delete or get information on an IPv4 tunnel. * struct net_device *(*ndo_get_peer_dev)(struct net_device *dev); * If a device is paired with a peer device, return the peer instance. * The caller must be under RCU read context. * int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path); * Get the forwarding path to reach the real device from the HW destination address */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); void (*ndo_uninit)(struct net_device *dev); int (*ndo_open)(struct net_device *dev); int (*ndo_stop)(struct net_device *dev); netdev_tx_t (*ndo_start_xmit)(struct sk_buff *skb, struct net_device *dev); netdev_features_t (*ndo_features_check)(struct sk_buff *skb, struct net_device *dev, netdev_features_t features); u16 (*ndo_select_queue)(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev); void (*ndo_change_rx_flags)(struct net_device *dev, int flags); void (*ndo_set_rx_mode)(struct net_device *dev); int (*ndo_set_mac_address)(struct net_device *dev, void *addr); int (*ndo_validate_addr)(struct net_device *dev); int (*ndo_do_ioctl)(struct net_device *dev, struct ifreq *ifr, int cmd); int (*ndo_eth_ioctl)(struct net_device *dev, struct ifreq *ifr, int cmd); int (*ndo_siocbond)(struct net_device *dev, struct ifreq *ifr, int cmd); int (*ndo_siocwandev)(struct net_device *dev, struct if_settings *ifs); int (*ndo_siocdevprivate)(struct net_device *dev, struct ifreq *ifr, void __user *data, int cmd); int (*ndo_set_config)(struct net_device *dev, struct ifmap *map); int (*ndo_change_mtu)(struct net_device *dev, int new_mtu); int (*ndo_neigh_setup)(struct net_device *dev, struct neigh_parms *); void (*ndo_tx_timeout) (struct net_device *dev, unsigned int txqueue); void (*ndo_get_stats64)(struct net_device *dev, struct rtnl_link_stats64 *storage); bool (*ndo_has_offload_stats)(const struct net_device *dev, int attr_id); int (*ndo_get_offload_stats)(int attr_id, const struct net_device *dev, void *attr_data); struct net_device_stats* (*ndo_get_stats)(struct net_device *dev); int (*ndo_vlan_rx_add_vid)(struct net_device *dev, __be16 proto, u16 vid); int (*ndo_vlan_rx_kill_vid)(struct net_device *dev, __be16 proto, u16 vid); #ifdef CONFIG_NET_POLL_CONTROLLER void (*ndo_poll_controller)(struct net_device *dev); int (*ndo_netpoll_setup)(struct net_device *dev, struct netpoll_info *info); void (*ndo_netpoll_cleanup)(struct net_device *dev); #endif int (*ndo_set_vf_mac)(struct net_device *dev, int queue, u8 *mac); int (*ndo_set_vf_vlan)(struct net_device *dev, int queue, u16 vlan, u8 qos, __be16 proto); int (*ndo_set_vf_rate)(struct net_device *dev, int vf, int min_tx_rate, int max_tx_rate); int (*ndo_set_vf_spoofchk)(struct net_device *dev, int vf, bool setting); int (*ndo_set_vf_trust)(struct net_device *dev, int vf, bool setting); int (*ndo_get_vf_config)(struct net_device *dev, int vf, struct ifla_vf_info *ivf); int (*ndo_set_vf_link_state)(struct net_device *dev, int vf, int link_state); int (*ndo_get_vf_stats)(struct net_device *dev, int vf, struct ifla_vf_stats *vf_stats); int (*ndo_set_vf_port)(struct net_device *dev, int vf, struct nlattr *port[]); int (*ndo_get_vf_port)(struct net_device *dev, int vf, struct sk_buff *skb); int (*ndo_get_vf_guid)(struct net_device *dev, int vf, struct ifla_vf_guid *node_guid, struct ifla_vf_guid *port_guid); int (*ndo_set_vf_guid)(struct net_device *dev, int vf, u64 guid, int guid_type); int (*ndo_set_vf_rss_query_en)( struct net_device *dev, int vf, bool setting); int (*ndo_setup_tc)(struct net_device *dev, enum tc_setup_type type, void *type_data); #if IS_ENABLED(CONFIG_FCOE) int (*ndo_fcoe_enable)(struct net_device *dev); int (*ndo_fcoe_disable)(struct net_device *dev); int (*ndo_fcoe_ddp_setup)(struct net_device *dev, u16 xid, struct scatterlist *sgl, unsigned int sgc); int (*ndo_fcoe_ddp_done)(struct net_device *dev, u16 xid); int (*ndo_fcoe_ddp_target)(struct net_device *dev, u16 xid, struct scatterlist *sgl, unsigned int sgc); int (*ndo_fcoe_get_hbainfo)(struct net_device *dev, struct netdev_fcoe_hbainfo *hbainfo); #endif #if IS_ENABLED(CONFIG_LIBFCOE) #define NETDEV_FCOE_WWNN 0 #define NETDEV_FCOE_WWPN 1 int (*ndo_fcoe_get_wwn)(struct net_device *dev, u64 *wwn, int type); #endif #ifdef CONFIG_RFS_ACCEL int (*ndo_rx_flow_steer)(struct net_device *dev, const struct sk_buff *skb, u16 rxq_index, u32 flow_id); #endif int (*ndo_add_slave)(struct net_device *dev, struct net_device *slave_dev, struct netlink_ext_ack *extack); int (*ndo_del_slave)(struct net_device *dev, struct net_device *slave_dev); struct net_device* (*ndo_get_xmit_slave)(struct net_device *dev, struct sk_buff *skb, bool all_slaves); struct net_device* (*ndo_sk_get_lower_dev)(struct net_device *dev, struct sock *sk); netdev_features_t (*ndo_fix_features)(struct net_device *dev, netdev_features_t features); int (*ndo_set_features)(struct net_device *dev, netdev_features_t features); int (*ndo_neigh_construct)(struct net_device *dev, struct neighbour *n); void (*ndo_neigh_destroy)(struct net_device *dev, struct neighbour *n); int (*ndo_fdb_add)(struct ndmsg *ndm, struct nlattr *tb[], struct net_device *dev, const unsigned char *addr, u16 vid, u16 flags, struct netlink_ext_ack *extack); int (*ndo_fdb_del)(struct ndmsg *ndm, struct nlattr *tb[], struct net_device *dev, const unsigned char *addr, u16 vid); int (*ndo_fdb_del_bulk)(struct ndmsg *ndm, struct nlattr *tb[], struct net_device *dev, u16 vid, struct netlink_ext_ack *extack); int (*ndo_fdb_dump)(struct sk_buff *skb, struct netlink_callback *cb, struct net_device *dev, struct net_device *filter_dev, int *idx); int (*ndo_fdb_get)(struct sk_buff *skb, struct nlattr *tb[], struct net_device *dev, const unsigned char *addr, u16 vid, u32 portid, u32 seq, struct netlink_ext_ack *extack); int (*ndo_bridge_setlink)(struct net_device *dev, struct nlmsghdr *nlh, u16 flags, struct netlink_ext_ack *extack); int (*ndo_bridge_getlink)(struct sk_buff *skb, u32 pid, u32 seq, struct net_device *dev, u32 filter_mask, int nlflags); int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh, u16 flags); int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier); int (*ndo_get_phys_port_id)(struct net_device *dev, struct netdev_phys_item_id *ppid); int (*ndo_get_port_parent_id)(struct net_device *dev, struct netdev_phys_item_id *ppid); int (*ndo_get_phys_port_name)(struct net_device *dev, char *name, size_t len); void* (*ndo_dfwd_add_station)(struct net_device *pdev, struct net_device *dev); void (*ndo_dfwd_del_station)(struct net_device *pdev, void *priv); int (*ndo_set_tx_maxrate)(struct net_device *dev, int queue_index, u32 maxrate); int (*ndo_get_iflink)(const struct net_device *dev); int (*ndo_change_proto_down)(struct net_device *dev, bool proto_down); int (*ndo_fill_metadata_dst)(struct net_device *dev, struct sk_buff *skb); void (*ndo_set_rx_headroom)(struct net_device *dev, int needed_headroom); int (*ndo_bpf)(struct net_device *dev, struct netdev_bpf *bpf); int (*ndo_xdp_xmit)(struct net_device *dev, int n, struct xdp_frame **xdp, u32 flags); struct net_device * (*ndo_xdp_get_xmit_slave)(struct net_device *dev, struct xdp_buff *xdp); int (*ndo_xsk_wakeup)(struct net_device *dev, u32 queue_id, u32 flags); struct devlink_port * (*ndo_get_devlink_port)(struct net_device *dev); int (*ndo_tunnel_ctl)(struct net_device *dev, struct ip_tunnel_parm *p, int cmd); struct net_device * (*ndo_get_peer_dev)(struct net_device *dev); int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path); }; /** * enum netdev_priv_flags - &struct net_device priv_flags * * These are the &struct net_device, they are only set internally * by drivers and used in the kernel. These flags are invisible to * userspace; this means that the order of these flags can change * during any kernel release. * * You should have a pretty good reason to be extending these flags. * * @IFF_802_1Q_VLAN: 802.1Q VLAN device * @IFF_EBRIDGE: Ethernet bridging device * @IFF_BONDING: bonding master or slave * @IFF_ISATAP: ISATAP interface (RFC4214) * @IFF_WAN_HDLC: WAN HDLC device * @IFF_XMIT_DST_RELEASE: dev_hard_start_xmit() is allowed to * release skb->dst * @IFF_DONT_BRIDGE: disallow bridging this ether dev * @IFF_DISABLE_NETPOLL: disable netpoll at run-time * @IFF_MACVLAN_PORT: device used as macvlan port * @IFF_BRIDGE_PORT: device used as bridge port * @IFF_OVS_DATAPATH: device used as Open vSwitch datapath port * @IFF_TX_SKB_SHARING: The interface supports sharing skbs on transmit * @IFF_UNICAST_FLT: Supports unicast filtering * @IFF_TEAM_PORT: device used as team port * @IFF_SUPP_NOFCS: device supports sending custom FCS * @IFF_LIVE_ADDR_CHANGE: device supports hardware address * change when it's running * @IFF_MACVLAN: Macvlan device * @IFF_XMIT_DST_RELEASE_PERM: IFF_XMIT_DST_RELEASE not taking into account * underlying stacked devices * @IFF_L3MDEV_MASTER: device is an L3 master device * @IFF_NO_QUEUE: device can run without qdisc attached * @IFF_OPENVSWITCH: device is a Open vSwitch master * @IFF_L3MDEV_SLAVE: device is enslaved to an L3 master device * @IFF_TEAM: device is a team device * @IFF_RXFH_CONFIGURED: device has had Rx Flow indirection table configured * @IFF_PHONY_HEADROOM: the headroom value is controlled by an external * entity (i.e. the master device for bridged veth) * @IFF_MACSEC: device is a MACsec device * @IFF_NO_RX_HANDLER: device doesn't support the rx_handler hook * @IFF_FAILOVER: device is a failover master device * @IFF_FAILOVER_SLAVE: device is lower dev of a failover master device * @IFF_L3MDEV_RX_HANDLER: only invoke the rx handler of L3 master device * @IFF_LIVE_RENAME_OK: rename is allowed while device is up and running * @IFF_TX_SKB_NO_LINEAR: device/driver is capable of xmitting frames with * skb_headlen(skb) == 0 (data starts from frag0) */ enum netdev_priv_flags { IFF_802_1Q_VLAN = 1<<0, IFF_EBRIDGE = 1<<1, IFF_BONDING = 1<<2, IFF_ISATAP = 1<<3, IFF_WAN_HDLC = 1<<4, IFF_XMIT_DST_RELEASE = 1<<5, IFF_DONT_BRIDGE = 1<<6, IFF_DISABLE_NETPOLL = 1<<7, IFF_MACVLAN_PORT = 1<<8, IFF_BRIDGE_PORT = 1<<9, IFF_OVS_DATAPATH = 1<<10, IFF_TX_SKB_SHARING = 1<<11, IFF_UNICAST_FLT = 1<<12, IFF_TEAM_PORT = 1<<13, IFF_SUPP_NOFCS = 1<<14, IFF_LIVE_ADDR_CHANGE = 1<<15, IFF_MACVLAN = 1<<16, IFF_XMIT_DST_RELEASE_PERM = 1<<17, IFF_L3MDEV_MASTER = 1<<18, IFF_NO_QUEUE = 1<<19, IFF_OPENVSWITCH = 1<<20, IFF_L3MDEV_SLAVE = 1<<21, IFF_TEAM = 1<<22, IFF_RXFH_CONFIGURED = 1<<23, IFF_PHONY_HEADROOM = 1<<24, IFF_MACSEC = 1<<25, IFF_NO_RX_HANDLER = 1<<26, IFF_FAILOVER = 1<<27, IFF_FAILOVER_SLAVE = 1<<28, IFF_L3MDEV_RX_HANDLER = 1<<29, IFF_LIVE_RENAME_OK = 1<<30, IFF_TX_SKB_NO_LINEAR = BIT_ULL(31), }; #define IFF_802_1Q_VLAN IFF_802_1Q_VLAN #define IFF_EBRIDGE IFF_EBRIDGE #define IFF_BONDING IFF_BONDING #define IFF_ISATAP IFF_ISATAP #define IFF_WAN_HDLC IFF_WAN_HDLC #define IFF_XMIT_DST_RELEASE IFF_XMIT_DST_RELEASE #define IFF_DONT_BRIDGE IFF_DONT_BRIDGE #define IFF_DISABLE_NETPOLL IFF_DISABLE_NETPOLL #define IFF_MACVLAN_PORT IFF_MACVLAN_PORT #define IFF_BRIDGE_PORT IFF_BRIDGE_PORT #define IFF_OVS_DATAPATH IFF_OVS_DATAPATH #define IFF_TX_SKB_SHARING IFF_TX_SKB_SHARING #define IFF_UNICAST_FLT IFF_UNICAST_FLT #define IFF_TEAM_PORT IFF_TEAM_PORT #define IFF_SUPP_NOFCS IFF_SUPP_NOFCS #define IFF_LIVE_ADDR_CHANGE IFF_LIVE_ADDR_CHANGE #define IFF_MACVLAN IFF_MACVLAN #define IFF_XMIT_DST_RELEASE_PERM IFF_XMIT_DST_RELEASE_PERM #define IFF_L3MDEV_MASTER IFF_L3MDEV_MASTER #define IFF_NO_QUEUE IFF_NO_QUEUE #define IFF_OPENVSWITCH IFF_OPENVSWITCH #define IFF_L3MDEV_SLAVE IFF_L3MDEV_SLAVE #define IFF_TEAM IFF_TEAM #define IFF_RXFH_CONFIGURED IFF_RXFH_CONFIGURED #define IFF_PHONY_HEADROOM IFF_PHONY_HEADROOM #define IFF_MACSEC IFF_MACSEC #define IFF_NO_RX_HANDLER IFF_NO_RX_HANDLER #define IFF_FAILOVER IFF_FAILOVER #define IFF_FAILOVER_SLAVE IFF_FAILOVER_SLAVE #define IFF_L3MDEV_RX_HANDLER IFF_L3MDEV_RX_HANDLER #define IFF_LIVE_RENAME_OK IFF_LIVE_RENAME_OK #define IFF_TX_SKB_NO_LINEAR IFF_TX_SKB_NO_LINEAR /* Specifies the type of the struct net_device::ml_priv pointer */ enum netdev_ml_priv_type { ML_PRIV_NONE, ML_PRIV_CAN, }; /** * struct net_device - The DEVICE structure. * * Actually, this whole structure is a big mistake. It mixes I/O * data with strictly "high-level" data, and it has to know about * almost every data structure used in the INET module. * * @name: This is the first field of the "visible" part of this structure * (i.e. as seen by users in the "Space.c" file). It is the name * of the interface. * * @name_node: Name hashlist node * @ifalias: SNMP alias * @mem_end: Shared memory end * @mem_start: Shared memory start * @base_addr: Device I/O address * @irq: Device IRQ number * * @state: Generic network queuing layer state, see netdev_state_t * @dev_list: The global list of network devices * @napi_list: List entry used for polling NAPI devices * @unreg_list: List entry when we are unregistering the * device; see the function unregister_netdev * @close_list: List entry used when we are closing the device * @ptype_all: Device-specific packet handlers for all protocols * @ptype_specific: Device-specific, protocol-specific packet handlers * * @adj_list: Directly linked devices, like slaves for bonding * @features: Currently active device features * @hw_features: User-changeable features * * @wanted_features: User-requested features * @vlan_features: Mask of features inheritable by VLAN devices * * @hw_enc_features: Mask of features inherited by encapsulating devices * This field indicates what encapsulation * offloads the hardware is capable of doing, * and drivers will need to set them appropriately. * * @mpls_features: Mask of features inheritable by MPLS * @gso_partial_features: value(s) from NETIF_F_GSO\* * * @ifindex: interface index * @group: The group the device belongs to * * @stats: Statistics struct, which was left as a legacy, use * rtnl_link_stats64 instead * * @rx_dropped: Dropped packets by core network, * do not use this in drivers * @tx_dropped: Dropped packets by core network, * do not use this in drivers * @rx_nohandler: nohandler dropped packets by core network on * inactive devices, do not use this in drivers * @carrier_up_count: Number of times the carrier has been up * @carrier_down_count: Number of times the carrier has been down * * @wireless_handlers: List of functions to handle Wireless Extensions, * instead of ioctl, * see <net/iw_handler.h> for details. * @wireless_data: Instance data managed by the core of wireless extensions * * @netdev_ops: Includes several pointers to callbacks, * if one wants to override the ndo_*() functions * @ethtool_ops: Management operations * @l3mdev_ops: Layer 3 master device operations * @ndisc_ops: Includes callbacks for different IPv6 neighbour * discovery handling. Necessary for e.g. 6LoWPAN. * @xfrmdev_ops: Transformation offload operations * @tlsdev_ops: Transport Layer Security offload operations * @header_ops: Includes callbacks for creating,parsing,caching,etc * of Layer 2 headers. * * @flags: Interface flags (a la BSD) * @priv_flags: Like 'flags' but invisible to userspace, * see if.h for the definitions * @gflags: Global flags ( kept as legacy ) * @padded: How much padding added by alloc_netdev() * @operstate: RFC2863 operstate * @link_mode: Mapping policy to operstate * @if_port: Selectable AUI, TP, ... * @dma: DMA channel * @mtu: Interface MTU value * @min_mtu: Interface Minimum MTU value * @max_mtu: Interface Maximum MTU value * @type: Interface hardware type * @hard_header_len: Maximum hardware header length. * @min_header_len: Minimum hardware header length * * @needed_headroom: Extra headroom the hardware may need, but not in all * cases can this be guaranteed * @needed_tailroom: Extra tailroom the hardware may need, but not in all * cases can this be guaranteed. Some cases also use * LL_MAX_HEADER instead to allocate the skb * * interface address info: * * @perm_addr: Permanent hw address * @addr_assign_type: Hw address assignment type * @addr_len: Hardware address length * @upper_level: Maximum depth level of upper devices. * @lower_level: Maximum depth level of lower devices. * @neigh_priv_len: Used in neigh_alloc() * @dev_id: Used to differentiate devices that share * the same link layer address * @dev_port: Used to differentiate devices that share * the same function * @addr_list_lock: XXX: need comments on this one * @name_assign_type: network interface name assignment type * @uc_promisc: Counter that indicates promiscuous mode * has been enabled due to the need to listen to * additional unicast addresses in a device that * does not implement ndo_set_rx_mode() * @uc: unicast mac addresses * @mc: multicast mac addresses * @dev_addrs: list of device hw addresses * @queues_kset: Group of all Kobjects in the Tx and RX queues * @promiscuity: Number of times the NIC is told to work in * promiscuous mode; if it becomes 0 the NIC will * exit promiscuous mode * @allmulti: Counter, enables or disables allmulticast mode * * @vlan_info: VLAN info * @dsa_ptr: dsa specific data * @tipc_ptr: TIPC specific data * @atalk_ptr: AppleTalk link * @ip_ptr: IPv4 specific data * @ip6_ptr: IPv6 specific data * @ax25_ptr: AX.25 specific data * @ieee80211_ptr: IEEE 802.11 specific data, assign before registering * @ieee802154_ptr: IEEE 802.15.4 low-rate Wireless Personal Area Network * device struct * @mpls_ptr: mpls_dev struct pointer * @mctp_ptr: MCTP specific data * * @dev_addr: Hw address (before bcast, * because most packets are unicast) * * @_rx: Array of RX queues * @num_rx_queues: Number of RX queues * allocated at register_netdev() time * @real_num_rx_queues: Number of RX queues currently active in device * @xdp_prog: XDP sockets filter program pointer * @gro_flush_timeout: timeout for GRO layer in NAPI * @napi_defer_hard_irqs: If not zero, provides a counter that would * allow to avoid NIC hard IRQ, on busy queues. * * @rx_handler: handler for received packets * @rx_handler_data: XXX: need comments on this one * @miniq_ingress: ingress/clsact qdisc specific data for * ingress processing * @ingress_queue: XXX: need comments on this one * @nf_hooks_ingress: netfilter hooks executed for ingress packets * @broadcast: hw bcast address * * @rx_cpu_rmap: CPU reverse-mapping for RX completion interrupts, * indexed by RX queue number. Assigned by driver. * This must only be set if the ndo_rx_flow_steer * operation is defined * @index_hlist: Device index hash chain * * @_tx: Array of TX queues * @num_tx_queues: Number of TX queues allocated at alloc_netdev_mq() time * @real_num_tx_queues: Number of TX queues currently active in device * @qdisc: Root qdisc from userspace point of view * @tx_queue_len: Max frames per queue allowed * @tx_global_lock: XXX: need comments on this one * @xdp_bulkq: XDP device bulk queue * @xps_maps: all CPUs/RXQs maps for XPS device * * @xps_maps: XXX: need comments on this one * @miniq_egress: clsact qdisc specific data for * egress processing * @qdisc_hash: qdisc hash table * @watchdog_timeo: Represents the timeout that is used by * the watchdog (see dev_watchdog()) * @watchdog_timer: List of timers * * @proto_down_reason: reason a netdev interface is held down * @pcpu_refcnt: Number of references to this device * @dev_refcnt: Number of references to this device * @todo_list: Delayed register/unregister * @link_watch_list: XXX: need comments on this one * * @reg_state: Register/unregister state machine * @dismantle: Device is going to be freed * @rtnl_link_state: This enum represents the phases of creating * a new link * * @needs_free_netdev: Should unregister perform free_netdev? * @priv_destructor: Called from unregister * @npinfo: XXX: need comments on this one * @nd_net: Network namespace this network device is inside * * @ml_priv: Mid-layer private * @ml_priv_type: Mid-layer private type * @lstats: Loopback statistics * @tstats: Tunnel statistics * @dstats: Dummy statistics * @vstats: Virtual ethernet statistics * * @garp_port: GARP * @mrp_port: MRP * * @dev: Class/net/name entry * @sysfs_groups: Space for optional device, statistics and wireless * sysfs groups * * @sysfs_rx_queue_group: Space for optional per-rx queue attributes * @rtnl_link_ops: Rtnl_link_ops * * @gso_max_size: Maximum size of generic segmentation offload * @gso_max_segs: Maximum number of segments that can be passed to the * NIC for GSO * * @dcbnl_ops: Data Center Bridging netlink ops * @num_tc: Number of traffic classes in the net device * @tc_to_txq: XXX: need comments on this one * @prio_tc_map: XXX: need comments on this one * * @fcoe_ddp_xid: Max exchange id for FCoE LRO by ddp * * @priomap: XXX: need comments on this one * @phydev: Physical device may attach itself * for hardware timestamping * @sfp_bus: attached &struct sfp_bus structure. * * @qdisc_tx_busylock: lockdep class annotating Qdisc->busylock spinlock * @qdisc_running_key: lockdep class annotating Qdisc->running seqcount * * @proto_down: protocol port state information can be sent to the * switch driver and used to set the phys state of the * switch port. * * @wol_enabled: Wake-on-LAN is enabled * * @threaded: napi threaded mode is enabled * * @net_notifier_list: List of per-net netdev notifier block * that follow this device when it is moved * to another network namespace. * * @macsec_ops: MACsec offloading ops * * @udp_tunnel_nic_info: static structure describing the UDP tunnel * offload capabilities of the device * @udp_tunnel_nic: UDP tunnel offload state * @xdp_state: stores info on attached XDP BPF programs * * @nested_level: Used as as a parameter of spin_lock_nested() of * dev->addr_list_lock. * @unlink_list: As netif_addr_lock() can be called recursively, * keep a list of interfaces to be deleted. * * FIXME: cleanup struct net_device such that network protocol info * moves out. */ struct net_device { char name[IFNAMSIZ]; struct netdev_name_node *name_node; struct dev_ifalias __rcu *ifalias; /* * I/O specific fields * FIXME: Merge these and struct ifmap into one */ unsigned long mem_end; unsigned long mem_start; unsigned long base_addr; /* * Some hardware also needs these fields (state,dev_list, * napi_list,unreg_list,close_list) but they are not * part of the usual set specified in Space.c. */ unsigned long state; struct list_head dev_list; struct list_head napi_list; struct list_head unreg_list; struct list_head close_list; struct list_head ptype_all; struct list_head ptype_specific; struct { struct list_head upper; struct list_head lower; } adj_list; /* Read-mostly cache-line for fast-path access */ unsigned int flags; unsigned int priv_flags; const struct net_device_ops *netdev_ops; int ifindex; unsigned short gflags; unsigned short hard_header_len; /* Note : dev->mtu is often read without holding a lock. * Writers usually hold RTNL. * It is recommended to use READ_ONCE() to annotate the reads, * and to use WRITE_ONCE() to annotate the writes. */ unsigned int mtu; unsigned short needed_headroom; unsigned short needed_tailroom; netdev_features_t features; netdev_features_t hw_features; netdev_features_t wanted_features; netdev_features_t vlan_features; netdev_features_t hw_enc_features; netdev_features_t mpls_features; netdev_features_t gso_partial_features; unsigned int min_mtu; unsigned int max_mtu; unsigned short type; unsigned char min_header_len; unsigned char name_assign_type; int group; struct net_device_stats stats; /* not used by modern drivers */ atomic_long_t rx_dropped; atomic_long_t tx_dropped; atomic_long_t rx_nohandler; /* Stats to monitor link on/off, flapping */ atomic_t carrier_up_count; atomic_t carrier_down_count; #ifdef CONFIG_WIRELESS_EXT const struct iw_handler_def *wireless_handlers; struct iw_public_data *wireless_data; #endif const struct ethtool_ops *ethtool_ops; #ifdef CONFIG_NET_L3_MASTER_DEV const struct l3mdev_ops *l3mdev_ops; #endif #if IS_ENABLED(CONFIG_IPV6) const struct ndisc_ops *ndisc_ops; #endif #ifdef CONFIG_XFRM_OFFLOAD const struct xfrmdev_ops *xfrmdev_ops; #endif #if IS_ENABLED(CONFIG_TLS_DEVICE) const struct tlsdev_ops *tlsdev_ops; #endif const struct header_ops *header_ops; unsigned char operstate; unsigned char link_mode; unsigned char if_port; unsigned char dma; /* Interface address info. */ unsigned char perm_addr[MAX_ADDR_LEN]; unsigned char addr_assign_type; unsigned char addr_len; unsigned char upper_level; unsigned char lower_level; unsigned short neigh_priv_len; unsigned short dev_id; unsigned short dev_port; unsigned short padded; spinlock_t addr_list_lock; int irq; struct netdev_hw_addr_list uc; struct netdev_hw_addr_list mc; struct netdev_hw_addr_list dev_addrs; #ifdef CONFIG_SYSFS struct kset *queues_kset; #endif #ifdef CONFIG_LOCKDEP struct list_head unlink_list; #endif unsigned int promiscuity; unsigned int allmulti; bool uc_promisc; #ifdef CONFIG_LOCKDEP unsigned char nested_level; #endif /* Protocol-specific pointers */ #if IS_ENABLED(CONFIG_VLAN_8021Q) struct vlan_info __rcu *vlan_info; #endif #if IS_ENABLED(CONFIG_NET_DSA) struct dsa_port *dsa_ptr; #endif #if IS_ENABLED(CONFIG_TIPC) struct tipc_bearer __rcu *tipc_ptr; #endif #if IS_ENABLED(CONFIG_IRDA) || IS_ENABLED(CONFIG_ATALK) void *atalk_ptr; #endif struct in_device __rcu *ip_ptr; struct inet6_dev __rcu *ip6_ptr; #if IS_ENABLED(CONFIG_AX25) void *ax25_ptr; #endif struct wireless_dev *ieee80211_ptr; struct wpan_dev *ieee802154_ptr; #if IS_ENABLED(CONFIG_MPLS_ROUTING) struct mpls_dev __rcu *mpls_ptr; #endif #if IS_ENABLED(CONFIG_MCTP) struct mctp_dev __rcu *mctp_ptr; #endif /* * Cache lines mostly used on receive path (including eth_type_trans()) */ /* Interface address info used in eth_type_trans() */ unsigned char *dev_addr; struct netdev_rx_queue *_rx; unsigned int num_rx_queues; unsigned int real_num_rx_queues; struct bpf_prog __rcu *xdp_prog; unsigned long gro_flush_timeout; int napi_defer_hard_irqs; rx_handler_func_t __rcu *rx_handler; void __rcu *rx_handler_data; #ifdef CONFIG_NET_CLS_ACT struct mini_Qdisc __rcu *miniq_ingress; #endif struct netdev_queue __rcu *ingress_queue; #ifdef CONFIG_NETFILTER_INGRESS struct nf_hook_entries __rcu *nf_hooks_ingress; #endif unsigned char broadcast[MAX_ADDR_LEN]; #ifdef CONFIG_RFS_ACCEL struct cpu_rmap *rx_cpu_rmap; #endif struct hlist_node index_hlist; /* * Cache lines mostly used on transmit path */ struct netdev_queue *_tx ____cacheline_aligned_in_smp; unsigned int num_tx_queues; unsigned int real_num_tx_queues; struct Qdisc __rcu *qdisc; unsigned int tx_queue_len; spinlock_t tx_global_lock; struct xdp_dev_bulk_queue __percpu *xdp_bulkq; #ifdef CONFIG_XPS struct xps_dev_maps __rcu *xps_maps[XPS_MAPS_MAX]; #endif #ifdef CONFIG_NET_CLS_ACT struct mini_Qdisc __rcu *miniq_egress; #endif #ifdef CONFIG_NET_SCHED DECLARE_HASHTABLE (qdisc_hash, 4); #endif /* These may be needed for future network-power-down code. */ struct timer_list watchdog_timer; int watchdog_timeo; u32 proto_down_reason; struct list_head todo_list; #ifdef CONFIG_PCPU_DEV_REFCNT int __percpu *pcpu_refcnt; #else refcount_t dev_refcnt; #endif struct list_head link_watch_list; enum { NETREG_UNINITIALIZED=0, NETREG_REGISTERED, /* completed register_netdevice */ NETREG_UNREGISTERING, /* called unregister_netdevice */ NETREG_UNREGISTERED, /* completed unregister todo */ NETREG_RELEASED, /* called free_netdev */ NETREG_DUMMY, /* dummy device for NAPI poll */ } reg_state:8; bool dismantle; enum { RTNL_LINK_INITIALIZED, RTNL_LINK_INITIALIZING, } rtnl_link_state:16; bool needs_free_netdev; void (*priv_destructor)(struct net_device *dev); #ifdef CONFIG_NETPOLL struct netpoll_info __rcu *npinfo; #endif possible_net_t nd_net; /* mid-layer private */ void *ml_priv; enum netdev_ml_priv_type ml_priv_type; union { struct pcpu_lstats __percpu *lstats; struct pcpu_sw_netstats __percpu *tstats; struct pcpu_dstats __percpu *dstats; }; #if IS_ENABLED(CONFIG_GARP) struct garp_port __rcu *garp_port; #endif #if IS_ENABLED(CONFIG_MRP) struct mrp_port __rcu *mrp_port; #endif struct device dev; const struct attribute_group *sysfs_groups[4]; const struct attribute_group *sysfs_rx_queue_group; const struct rtnl_link_ops *rtnl_link_ops; /* for setting kernel sock attribute on TCP connection setup */ #define GSO_MAX_SIZE 65536 unsigned int gso_max_size; #define GSO_MAX_SEGS 65535 u16 gso_max_segs; #ifdef CONFIG_DCB const struct dcbnl_rtnl_ops *dcbnl_ops; #endif s16 num_tc; struct netdev_tc_txq tc_to_txq[TC_MAX_QUEUE]; u8 prio_tc_map[TC_BITMASK + 1]; #if IS_ENABLED(CONFIG_FCOE) unsigned int fcoe_ddp_xid; #endif #if IS_ENABLED(CONFIG_CGROUP_NET_PRIO) struct netprio_map __rcu *priomap; #endif struct phy_device *phydev; struct sfp_bus *sfp_bus; struct lock_class_key *qdisc_tx_busylock; struct lock_class_key *qdisc_running_key; bool proto_down; unsigned wol_enabled:1; unsigned threaded:1; struct list_head net_notifier_list; #if IS_ENABLED(CONFIG_MACSEC) /* MACsec management functions */ const struct macsec_ops *macsec_ops; #endif const struct udp_tunnel_nic_info *udp_tunnel_nic_info; struct udp_tunnel_nic *udp_tunnel_nic; /* protected by rtnl_lock */ struct bpf_xdp_entity xdp_state[__MAX_XDP_MODE]; }; #define to_net_dev(d) container_of(d, struct net_device, dev) static inline bool netif_elide_gro(const struct net_device *dev) { if (!(dev->features & NETIF_F_GRO) || dev->xdp_prog) return true; return false; } #define NETDEV_ALIGN 32 static inline int netdev_get_prio_tc_map(const struct net_device *dev, u32 prio) { return dev->prio_tc_map[prio & TC_BITMASK]; } static inline int netdev_set_prio_tc_map(struct net_device *dev, u8 prio, u8 tc) { if (tc >= dev->num_tc) return -EINVAL; dev->prio_tc_map[prio & TC_BITMASK] = tc & TC_BITMASK; return 0; } int netdev_txq_to_tc(struct net_device *dev, unsigned int txq); void netdev_reset_tc(struct net_device *dev); int netdev_set_tc_queue(struct net_device *dev, u8 tc, u16 count, u16 offset); int netdev_set_num_tc(struct net_device *dev, u8 num_tc); static inline int netdev_get_num_tc(struct net_device *dev) { return dev->num_tc; } static inline void net_prefetch(void *p) { prefetch(p); #if L1_CACHE_BYTES < 128 prefetch((u8 *)p + L1_CACHE_BYTES); #endif } static inline void net_prefetchw(void *p) { prefetchw(p); #if L1_CACHE_BYTES < 128 prefetchw((u8 *)p + L1_CACHE_BYTES); #endif } void netdev_unbind_sb_channel(struct net_device *dev, struct net_device *sb_dev); int netdev_bind_sb_channel_queue(struct net_device *dev, struct net_device *sb_dev, u8 tc, u16 count, u16 offset); int netdev_set_sb_channel(struct net_device *dev, u16 channel); static inline int netdev_get_sb_channel(struct net_device *dev) { return max_t(int, -dev->num_tc, 0); } static inline struct netdev_queue *netdev_get_tx_queue(const struct net_device *dev, unsigned int index) { return &dev->_tx[index]; } static inline struct netdev_queue *skb_get_tx_queue(const struct net_device *dev, const struct sk_buff *skb) { return netdev_get_tx_queue(dev, skb_get_queue_mapping(skb)); } static inline void netdev_for_each_tx_queue(struct net_device *dev, void (*f)(struct net_device *, struct netdev_queue *, void *), void *arg) { unsigned int i; for (i = 0; i < dev->num_tx_queues; i++) f(dev, &dev->_tx[i], arg); } #define netdev_lockdep_set_classes(dev) \ { \ static struct lock_class_key qdisc_tx_busylock_key; \ static struct lock_class_key qdisc_running_key; \ static struct lock_class_key qdisc_xmit_lock_key; \ static struct lock_class_key dev_addr_list_lock_key; \ unsigned int i; \ \ (dev)->qdisc_tx_busylock = &qdisc_tx_busylock_key; \ (dev)->qdisc_running_key = &qdisc_running_key; \ lockdep_set_class(&(dev)->addr_list_lock, \ &dev_addr_list_lock_key); \ for (i = 0; i < (dev)->num_tx_queues; i++) \ lockdep_set_class(&(dev)->_tx[i]._xmit_lock, \ &qdisc_xmit_lock_key); \ } u16 netdev_pick_tx(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev); struct netdev_queue *netdev_core_pick_tx(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev); /* returns the headroom that the master device needs to take in account * when forwarding to this dev */ static inline unsigned netdev_get_fwd_headroom(struct net_device *dev) { return dev->priv_flags & IFF_PHONY_HEADROOM ? 0 : dev->needed_headroom; } static inline void netdev_set_rx_headroom(struct net_device *dev, int new_hr) { if (dev->netdev_ops->ndo_set_rx_headroom) dev->netdev_ops->ndo_set_rx_headroom(dev, new_hr); } /* set the device rx headroom to the dev's default */ static inline void netdev_reset_rx_headroom(struct net_device *dev) { netdev_set_rx_headroom(dev, -1); } static inline void *netdev_get_ml_priv(struct net_device *dev, enum netdev_ml_priv_type type) { if (dev->ml_priv_type != type) return NULL; return dev->ml_priv; } static inline void netdev_set_ml_priv(struct net_device *dev, void *ml_priv, enum netdev_ml_priv_type type) { WARN(dev->ml_priv_type && dev->ml_priv_type != type, "Overwriting already set ml_priv_type (%u) with different ml_priv_type (%u)!\n", dev->ml_priv_type, type); WARN(!dev->ml_priv_type && dev->ml_priv, "Overwriting already set ml_priv and ml_priv_type is ML_PRIV_NONE!\n"); dev->ml_priv = ml_priv; dev->ml_priv_type = type; } /* * Net namespace inlines */ static inline struct net *dev_net(const struct net_device *dev) { return read_pnet(&dev->nd_net); } static inline struct net *dev_net_rcu(const struct net_device *dev) { return read_pnet_rcu(&dev->nd_net); } static inline void dev_net_set(struct net_device *dev, struct net *net) { write_pnet(&dev->nd_net, net); } /** * netdev_priv - access network device private data * @dev: network device * * Get network device private data */ static inline void *netdev_priv(const struct net_device *dev) { return (char *)dev + ALIGN(sizeof(struct net_device), NETDEV_ALIGN); } /* Set the sysfs physical device reference for the network logical device * if set prior to registration will cause a symlink during initialization. */ #define SET_NETDEV_DEV(net, pdev) ((net)->dev.parent = (pdev)) /* Set the sysfs device type for the network logical device to allow * fine-grained identification of different network device types. For * example Ethernet, Wireless LAN, Bluetooth, WiMAX etc. */ #define SET_NETDEV_DEVTYPE(net, devtype) ((net)->dev.type = (devtype)) /* Default NAPI poll() weight * Device drivers are strongly advised to not use bigger value */ #define NAPI_POLL_WEIGHT 64 /** * netif_napi_add - initialize a NAPI context * @dev: network device * @napi: NAPI context * @poll: polling function * @weight: default weight * * netif_napi_add() must be used to initialize a NAPI context prior to calling * *any* of the other NAPI-related functions. */ void netif_napi_add(struct net_device *dev, struct napi_struct *napi, int (*poll)(struct napi_struct *, int), int weight); /** * netif_tx_napi_add - initialize a NAPI context * @dev: network device * @napi: NAPI context * @poll: polling function * @weight: default weight * * This variant of netif_napi_add() should be used from drivers using NAPI * to exclusively poll a TX queue. * This will avoid we add it into napi_hash[], thus polluting this hash table. */ static inline void netif_tx_napi_add(struct net_device *dev, struct napi_struct *napi, int (*poll)(struct napi_struct *, int), int weight) { set_bit(NAPI_STATE_NO_BUSY_POLL, &napi->state); netif_napi_add(dev, napi, poll, weight); } /** * __netif_napi_del - remove a NAPI context * @napi: NAPI context * * Warning: caller must observe RCU grace period before freeing memory * containing @napi. Drivers might want to call this helper to combine * all the needed RCU grace periods into a single one. */ void __netif_napi_del(struct napi_struct *napi); /** * netif_napi_del - remove a NAPI context * @napi: NAPI context * * netif_napi_del() removes a NAPI context from the network device NAPI list */ static inline void netif_napi_del(struct napi_struct *napi) { __netif_napi_del(napi); synchronize_net(); } struct napi_gro_cb { /* Virtual address of skb_shinfo(skb)->frags[0].page + offset. */ void *frag0; /* Length of frag0. */ unsigned int frag0_len; /* This indicates where we are processing relative to skb->data. */ int data_offset; /* This is non-zero if the packet cannot be merged with the new skb. */ u16 flush; /* Save the IP ID here and check when we get to the transport layer */ u16 flush_id; /* Number of segments aggregated. */ u16 count; /* Start offset for remote checksum offload */ u16 gro_remcsum_start; /* jiffies when first packet was created/queued */ unsigned long age; /* Used in ipv6_gro_receive() and foo-over-udp */ u16 proto; /* This is non-zero if the packet may be of the same flow. */ u8 same_flow:1; /* Used in tunnel GRO receive */ u8 encap_mark:1; /* GRO checksum is valid */ u8 csum_valid:1; /* Number of checksums via CHECKSUM_UNNECESSARY */ u8 csum_cnt:3; /* Free the skb? */ u8 free:2; #define NAPI_GRO_FREE 1 #define NAPI_GRO_FREE_STOLEN_HEAD 2 /* Used in foo-over-udp, set in udp[46]_gro_receive */ u8 is_ipv6:1; /* Used in GRE, set in fou/gue_gro_receive */ u8 is_fou:1; /* Used to determine if flush_id can be ignored */ u8 is_atomic:1; /* Number of gro_receive callbacks this packet already went through */ u8 recursion_counter:4; /* GRO is done by frag_list pointer chaining. */ u8 is_flist:1; /* used to support CHECKSUM_COMPLETE for tunneling protocols */ __wsum csum; /* used in skb_gro_receive() slow path */ struct sk_buff *last; }; #define NAPI_GRO_CB(skb) ((struct napi_gro_cb *)(skb)->cb) #define GRO_RECURSION_LIMIT 15 static inline int gro_recursion_inc_test(struct sk_buff *skb) { return ++NAPI_GRO_CB(skb)->recursion_counter == GRO_RECURSION_LIMIT; } typedef struct sk_buff *(*gro_receive_t)(struct list_head *, struct sk_buff *); static inline struct sk_buff *call_gro_receive(gro_receive_t cb, struct list_head *head, struct sk_buff *skb) { if (unlikely(gro_recursion_inc_test(skb))) { NAPI_GRO_CB(skb)->flush |= 1; return NULL; } return cb(head, skb); } typedef struct sk_buff *(*gro_receive_sk_t)(struct sock *, struct list_head *, struct sk_buff *); static inline struct sk_buff *call_gro_receive_sk(gro_receive_sk_t cb, struct sock *sk, struct list_head *head, struct sk_buff *skb) { if (unlikely(gro_recursion_inc_test(skb))) { NAPI_GRO_CB(skb)->flush |= 1; return NULL; } return cb(sk, head, skb); } struct packet_type { __be16 type; /* This is really htons(ether_type). */ bool ignore_outgoing; struct net_device *dev; /* NULL is wildcarded here */ int (*func) (struct sk_buff *, struct net_device *, struct packet_type *, struct net_device *); void (*list_func) (struct list_head *, struct packet_type *, struct net_device *); bool (*id_match)(struct packet_type *ptype, struct sock *sk); struct net *af_packet_net; void *af_packet_priv; struct list_head list; }; struct offload_callbacks { struct sk_buff *(*gso_segment)(struct sk_buff *skb, netdev_features_t features); struct sk_buff *(*gro_receive)(struct list_head *head, struct sk_buff *skb); int (*gro_complete)(struct sk_buff *skb, int nhoff); }; struct packet_offload { __be16 type; /* This is really htons(ether_type). */ u16 priority; struct offload_callbacks callbacks; struct list_head list; }; /* often modified stats are per-CPU, other are shared (netdev->stats) */ struct pcpu_sw_netstats { u64 rx_packets; u64 rx_bytes; u64 tx_packets; u64 tx_bytes; struct u64_stats_sync syncp; } __aligned(4 * sizeof(u64)); struct pcpu_lstats { u64_stats_t packets; u64_stats_t bytes; struct u64_stats_sync syncp; } __aligned(2 * sizeof(u64)); void dev_lstats_read(struct net_device *dev, u64 *packets, u64 *bytes); static inline void dev_sw_netstats_rx_add(struct net_device *dev, unsigned int len) { struct pcpu_sw_netstats *tstats = this_cpu_ptr(dev->tstats); u64_stats_update_begin(&tstats->syncp); tstats->rx_bytes += len; tstats->rx_packets++; u64_stats_update_end(&tstats->syncp); } static inline void dev_sw_netstats_tx_add(struct net_device *dev, unsigned int packets, unsigned int len) { struct pcpu_sw_netstats *tstats = this_cpu_ptr(dev->tstats); u64_stats_update_begin(&tstats->syncp); tstats->tx_bytes += len; tstats->tx_packets += packets; u64_stats_update_end(&tstats->syncp); } static inline void dev_lstats_add(struct net_device *dev, unsigned int len) { struct pcpu_lstats *lstats = this_cpu_ptr(dev->lstats); u64_stats_update_begin(&lstats->syncp); u64_stats_add(&lstats->bytes, len); u64_stats_inc(&lstats->packets); u64_stats_update_end(&lstats->syncp); } #define __netdev_alloc_pcpu_stats(type, gfp) \ ({ \ typeof(type) __percpu *pcpu_stats = alloc_percpu_gfp(type, gfp);\ if (pcpu_stats) { \ int __cpu; \ for_each_possible_cpu(__cpu) { \ typeof(type) *stat; \ stat = per_cpu_ptr(pcpu_stats, __cpu); \ u64_stats_init(&stat->syncp); \ } \ } \ pcpu_stats; \ }) #define netdev_alloc_pcpu_stats(type) \ __netdev_alloc_pcpu_stats(type, GFP_KERNEL) #define devm_netdev_alloc_pcpu_stats(dev, type) \ ({ \ typeof(type) __percpu *pcpu_stats = devm_alloc_percpu(dev, type);\ if (pcpu_stats) { \ int __cpu; \ for_each_possible_cpu(__cpu) { \ typeof(type) *stat; \ stat = per_cpu_ptr(pcpu_stats, __cpu); \ u64_stats_init(&stat->syncp); \ } \ } \ pcpu_stats; \ }) enum netdev_lag_tx_type { NETDEV_LAG_TX_TYPE_UNKNOWN, NETDEV_LAG_TX_TYPE_RANDOM, NETDEV_LAG_TX_TYPE_BROADCAST, NETDEV_LAG_TX_TYPE_ROUNDROBIN, NETDEV_LAG_TX_TYPE_ACTIVEBACKUP, NETDEV_LAG_TX_TYPE_HASH, }; enum netdev_lag_hash { NETDEV_LAG_HASH_NONE, NETDEV_LAG_HASH_L2, NETDEV_LAG_HASH_L34, NETDEV_LAG_HASH_L23, NETDEV_LAG_HASH_E23, NETDEV_LAG_HASH_E34, NETDEV_LAG_HASH_VLAN_SRCMAC, NETDEV_LAG_HASH_UNKNOWN, }; struct netdev_lag_upper_info { enum netdev_lag_tx_type tx_type; enum netdev_lag_hash hash_type; }; struct netdev_lag_lower_state_info { u8 link_up : 1, tx_enabled : 1; }; #include <linux/notifier.h> /* netdevice notifier chain. Please remember to update netdev_cmd_to_name() * and the rtnetlink notification exclusion list in rtnetlink_event() when * adding new types. */ enum netdev_cmd { NETDEV_UP = 1, /* For now you can't veto a device up/down */ NETDEV_DOWN, NETDEV_REBOOT, /* Tell a protocol stack a network interface detected a hardware crash and restarted - we can use this eg to kick tcp sessions once done */ NETDEV_CHANGE, /* Notify device state change */ NETDEV_REGISTER, NETDEV_UNREGISTER, NETDEV_CHANGEMTU, /* notify after mtu change happened */ NETDEV_CHANGEADDR, /* notify after the address change */ NETDEV_PRE_CHANGEADDR, /* notify before the address change */ NETDEV_GOING_DOWN, NETDEV_CHANGENAME, NETDEV_FEAT_CHANGE, NETDEV_BONDING_FAILOVER, NETDEV_PRE_UP, NETDEV_PRE_TYPE_CHANGE, NETDEV_POST_TYPE_CHANGE, NETDEV_POST_INIT, NETDEV_RELEASE, NETDEV_NOTIFY_PEERS, NETDEV_JOIN, NETDEV_CHANGEUPPER, NETDEV_RESEND_IGMP, NETDEV_PRECHANGEMTU, /* notify before mtu change happened */ NETDEV_CHANGEINFODATA, NETDEV_BONDING_INFO, NETDEV_PRECHANGEUPPER, NETDEV_CHANGELOWERSTATE, NETDEV_UDP_TUNNEL_PUSH_INFO, NETDEV_UDP_TUNNEL_DROP_INFO, NETDEV_CHANGE_TX_QUEUE_LEN, NETDEV_CVLAN_FILTER_PUSH_INFO, NETDEV_CVLAN_FILTER_DROP_INFO, NETDEV_SVLAN_FILTER_PUSH_INFO, NETDEV_SVLAN_FILTER_DROP_INFO, }; const char *netdev_cmd_to_name(enum netdev_cmd cmd); int register_netdevice_notifier(struct notifier_block *nb); int unregister_netdevice_notifier(struct notifier_block *nb); int register_netdevice_notifier_net(struct net *net, struct notifier_block *nb); int unregister_netdevice_notifier_net(struct net *net, struct notifier_block *nb); int register_netdevice_notifier_dev_net(struct net_device *dev, struct notifier_block *nb, struct netdev_net_notifier *nn); int unregister_netdevice_notifier_dev_net(struct net_device *dev, struct notifier_block *nb, struct netdev_net_notifier *nn); struct netdev_notifier_info { struct net_device *dev; struct netlink_ext_ack *extack; }; struct netdev_notifier_info_ext { struct netdev_notifier_info info; /* must be first */ union { u32 mtu; } ext; }; struct netdev_notifier_change_info { struct netdev_notifier_info info; /* must be first */ unsigned int flags_changed; }; struct netdev_notifier_changeupper_info { struct netdev_notifier_info info; /* must be first */ struct net_device *upper_dev; /* new upper dev */ bool master; /* is upper dev master */ bool linking; /* is the notification for link or unlink */ void *upper_info; /* upper dev info */ }; struct netdev_notifier_changelowerstate_info { struct netdev_notifier_info info; /* must be first */ void *lower_state_info; /* is lower dev state */ }; struct netdev_notifier_pre_changeaddr_info { struct netdev_notifier_info info; /* must be first */ const unsigned char *dev_addr; }; static inline void netdev_notifier_info_init(struct netdev_notifier_info *info, struct net_device *dev) { info->dev = dev; info->extack = NULL; } static inline struct net_device * netdev_notifier_info_to_dev(const struct netdev_notifier_info *info) { return info->dev; } static inline struct netlink_ext_ack * netdev_notifier_info_to_extack(const struct netdev_notifier_info *info) { return info->extack; } int call_netdevice_notifiers(unsigned long val, struct net_device *dev); extern rwlock_t dev_base_lock; /* Device list lock */ #define for_each_netdev(net, d) \ list_for_each_entry(d, &(net)->dev_base_head, dev_list) #define for_each_netdev_reverse(net, d) \ list_for_each_entry_reverse(d, &(net)->dev_base_head, dev_list) #define for_each_netdev_rcu(net, d) \ list_for_each_entry_rcu(d, &(net)->dev_base_head, dev_list) #define for_each_netdev_safe(net, d, n) \ list_for_each_entry_safe(d, n, &(net)->dev_base_head, dev_list) #define for_each_netdev_continue(net, d) \ list_for_each_entry_continue(d, &(net)->dev_base_head, dev_list) #define for_each_netdev_continue_reverse(net, d) \ list_for_each_entry_continue_reverse(d, &(net)->dev_base_head, \ dev_list) #define for_each_netdev_continue_rcu(net, d) \ list_for_each_entry_continue_rcu(d, &(net)->dev_base_head, dev_list) #define for_each_netdev_in_bond_rcu(bond, slave) \ for_each_netdev_rcu(&init_net, slave) \ if (netdev_master_upper_dev_get_rcu(slave) == (bond)) #define net_device_entry(lh) list_entry(lh, struct net_device, dev_list) static inline struct net_device *next_net_device(struct net_device *dev) { struct list_head *lh; struct net *net; net = dev_net(dev); lh = dev->dev_list.next; return lh == &net->dev_base_head ? NULL : net_device_entry(lh); } static inline struct net_device *next_net_device_rcu(struct net_device *dev) { struct list_head *lh; struct net *net; net = dev_net(dev); lh = rcu_dereference(list_next_rcu(&dev->dev_list)); return lh == &net->dev_base_head ? NULL : net_device_entry(lh); } static inline struct net_device *first_net_device(struct net *net) { return list_empty(&net->dev_base_head) ? NULL : net_device_entry(net->dev_base_head.next); } static inline struct net_device *first_net_device_rcu(struct net *net) { struct list_head *lh = rcu_dereference(list_next_rcu(&net->dev_base_head)); return lh == &net->dev_base_head ? NULL : net_device_entry(lh); } int netdev_boot_setup_check(struct net_device *dev); struct net_device *dev_getbyhwaddr(struct net *net, unsigned short type, const char *hwaddr); struct net_device *dev_getbyhwaddr_rcu(struct net *net, unsigned short type, const char *hwaddr); struct net_device *dev_getfirstbyhwtype(struct net *net, unsigned short type); void dev_add_pack(struct packet_type *pt); void dev_remove_pack(struct packet_type *pt); void __dev_remove_pack(struct packet_type *pt); void dev_add_offload(struct packet_offload *po); void dev_remove_offload(struct packet_offload *po); int dev_get_iflink(const struct net_device *dev); int dev_fill_metadata_dst(struct net_device *dev, struct sk_buff *skb); int dev_fill_forward_path(const struct net_device *dev, const u8 *daddr, struct net_device_path_stack *stack); struct net_device *__dev_get_by_flags(struct net *net, unsigned short flags, unsigned short mask); struct net_device *dev_get_by_name(struct net *net, const char *name); struct net_device *dev_get_by_name_rcu(struct net *net, const char *name); struct net_device *__dev_get_by_name(struct net *net, const char *name); bool netdev_name_in_use(struct net *net, const char *name); int dev_alloc_name(struct net_device *dev, const char *name); int dev_open(struct net_device *dev, struct netlink_ext_ack *extack); void dev_close(struct net_device *dev); void dev_close_many(struct list_head *head, bool unlink); void dev_disable_lro(struct net_device *dev); int dev_loopback_xmit(struct net *net, struct sock *sk, struct sk_buff *newskb); u16 dev_pick_tx_zero(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev); u16 dev_pick_tx_cpu_id(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev); int dev_queue_xmit(struct sk_buff *skb); int dev_queue_xmit_accel(struct sk_buff *skb, struct net_device *sb_dev); int __dev_direct_xmit(struct sk_buff *skb, u16 queue_id); static inline int dev_direct_xmit(struct sk_buff *skb, u16 queue_id) { int ret; ret = __dev_direct_xmit(skb, queue_id); if (!dev_xmit_complete(ret)) kfree_skb(skb); return ret; } int register_netdevice(struct net_device *dev); void unregister_netdevice_queue(struct net_device *dev, struct list_head *head); void unregister_netdevice_many(struct list_head *head); static inline void unregister_netdevice(struct net_device *dev) { unregister_netdevice_queue(dev, NULL); } int netdev_refcnt_read(const struct net_device *dev); void free_netdev(struct net_device *dev); void netdev_freemem(struct net_device *dev); int init_dummy_netdev(struct net_device *dev); struct net_device *netdev_get_xmit_slave(struct net_device *dev, struct sk_buff *skb, bool all_slaves); struct net_device *netdev_sk_get_lowest_dev(struct net_device *dev, struct sock *sk); struct net_device *dev_get_by_index(struct net *net, int ifindex); struct net_device *__dev_get_by_index(struct net *net, int ifindex); struct net_device *dev_get_by_index_rcu(struct net *net, int ifindex); struct net_device *dev_get_by_napi_id(unsigned int napi_id); int netdev_get_name(struct net *net, char *name, int ifindex); int dev_restart(struct net_device *dev); int skb_gro_receive(struct sk_buff *p, struct sk_buff *skb); int skb_gro_receive_list(struct sk_buff *p, struct sk_buff *skb); static inline unsigned int skb_gro_offset(const struct sk_buff *skb) { return NAPI_GRO_CB(skb)->data_offset; } static inline unsigned int skb_gro_len(const struct sk_buff *skb) { return skb->len - NAPI_GRO_CB(skb)->data_offset; } static inline void skb_gro_pull(struct sk_buff *skb, unsigned int len) { NAPI_GRO_CB(skb)->data_offset += len; } static inline void *skb_gro_header_fast(struct sk_buff *skb, unsigned int offset) { return NAPI_GRO_CB(skb)->frag0 + offset; } static inline int skb_gro_header_hard(struct sk_buff *skb, unsigned int hlen) { return NAPI_GRO_CB(skb)->frag0_len < hlen; } static inline void skb_gro_frag0_invalidate(struct sk_buff *skb) { NAPI_GRO_CB(skb)->frag0 = NULL; NAPI_GRO_CB(skb)->frag0_len = 0; } static inline void *skb_gro_header_slow(struct sk_buff *skb, unsigned int hlen, unsigned int offset) { if (!pskb_may_pull(skb, hlen)) return NULL; skb_gro_frag0_invalidate(skb); return skb->data + offset; } static inline void *skb_gro_network_header(struct sk_buff *skb) { return (NAPI_GRO_CB(skb)->frag0 ?: skb->data) + skb_network_offset(skb); } static inline void skb_gro_postpull_rcsum(struct sk_buff *skb, const void *start, unsigned int len) { if (NAPI_GRO_CB(skb)->csum_valid) NAPI_GRO_CB(skb)->csum = csum_sub(NAPI_GRO_CB(skb)->csum, csum_partial(start, len, 0)); } /* GRO checksum functions. These are logical equivalents of the normal * checksum functions (in skbuff.h) except that they operate on the GRO * offsets and fields in sk_buff. */ __sum16 __skb_gro_checksum_complete(struct sk_buff *skb); static inline bool skb_at_gro_remcsum_start(struct sk_buff *skb) { return (NAPI_GRO_CB(skb)->gro_remcsum_start == skb_gro_offset(skb)); } static inline bool __skb_gro_checksum_validate_needed(struct sk_buff *skb, bool zero_okay, __sum16 check) { return ((skb->ip_summed != CHECKSUM_PARTIAL || skb_checksum_start_offset(skb) < skb_gro_offset(skb)) && !skb_at_gro_remcsum_start(skb) && NAPI_GRO_CB(skb)->csum_cnt == 0 && (!zero_okay || check)); } static inline __sum16 __skb_gro_checksum_validate_complete(struct sk_buff *skb, __wsum psum) { if (NAPI_GRO_CB(skb)->csum_valid && !csum_fold(csum_add(psum, NAPI_GRO_CB(skb)->csum))) return 0; NAPI_GRO_CB(skb)->csum = psum; return __skb_gro_checksum_complete(skb); } static inline void skb_gro_incr_csum_unnecessary(struct sk_buff *skb) { if (NAPI_GRO_CB(skb)->csum_cnt > 0) { /* Consume a checksum from CHECKSUM_UNNECESSARY */ NAPI_GRO_CB(skb)->csum_cnt--; } else { /* Update skb for CHECKSUM_UNNECESSARY and csum_level when we * verified a new top level checksum or an encapsulated one * during GRO. This saves work if we fallback to normal path. */ __skb_incr_checksum_unnecessary(skb); } } #define __skb_gro_checksum_validate(skb, proto, zero_okay, check, \ compute_pseudo) \ ({ \ __sum16 __ret = 0; \ if (__skb_gro_checksum_validate_needed(skb, zero_okay, check)) \ __ret = __skb_gro_checksum_validate_complete(skb, \ compute_pseudo(skb, proto)); \ if (!__ret) \ skb_gro_incr_csum_unnecessary(skb); \ __ret; \ }) #define skb_gro_checksum_validate(skb, proto, compute_pseudo) \ __skb_gro_checksum_validate(skb, proto, false, 0, compute_pseudo) #define skb_gro_checksum_validate_zero_check(skb, proto, check, \ compute_pseudo) \ __skb_gro_checksum_validate(skb, proto, true, check, compute_pseudo) #define skb_gro_checksum_simple_validate(skb) \ __skb_gro_checksum_validate(skb, 0, false, 0, null_compute_pseudo) static inline bool __skb_gro_checksum_convert_check(struct sk_buff *skb) { return (NAPI_GRO_CB(skb)->csum_cnt == 0 && !NAPI_GRO_CB(skb)->csum_valid); } static inline void __skb_gro_checksum_convert(struct sk_buff *skb, __wsum pseudo) { NAPI_GRO_CB(skb)->csum = ~pseudo; NAPI_GRO_CB(skb)->csum_valid = 1; } #define skb_gro_checksum_try_convert(skb, proto, compute_pseudo) \ do { \ if (__skb_gro_checksum_convert_check(skb)) \ __skb_gro_checksum_convert(skb, \ compute_pseudo(skb, proto)); \ } while (0) struct gro_remcsum { int offset; __wsum delta; }; static inline void skb_gro_remcsum_init(struct gro_remcsum *grc) { grc->offset = 0; grc->delta = 0; } static inline void *skb_gro_remcsum_process(struct sk_buff *skb, void *ptr, unsigned int off, size_t hdrlen, int start, int offset, struct gro_remcsum *grc, bool nopartial) { __wsum delta; size_t plen = hdrlen + max_t(size_t, offset + sizeof(u16), start); BUG_ON(!NAPI_GRO_CB(skb)->csum_valid); if (!nopartial) { NAPI_GRO_CB(skb)->gro_remcsum_start = off + hdrlen + start; return ptr; } ptr = skb_gro_header_fast(skb, off); if (skb_gro_header_hard(skb, off + plen)) { ptr = skb_gro_header_slow(skb, off + plen, off); if (!ptr) return NULL; } delta = remcsum_adjust(ptr + hdrlen, NAPI_GRO_CB(skb)->csum, start, offset); /* Adjust skb->csum since we changed the packet */ NAPI_GRO_CB(skb)->csum = csum_add(NAPI_GRO_CB(skb)->csum, delta); grc->offset = off + hdrlen + offset; grc->delta = delta; return ptr; } static inline void skb_gro_remcsum_cleanup(struct sk_buff *skb, struct gro_remcsum *grc) { void *ptr; size_t plen = grc->offset + sizeof(u16); if (!grc->delta) return; ptr = skb_gro_header_fast(skb, grc->offset); if (skb_gro_header_hard(skb, grc->offset + sizeof(u16))) { ptr = skb_gro_header_slow(skb, plen, grc->offset); if (!ptr) return; } remcsum_unadjust((__sum16 *)ptr, grc->delta); } #ifdef CONFIG_XFRM_OFFLOAD static inline void skb_gro_flush_final(struct sk_buff *skb, struct sk_buff *pp, int flush) { if (PTR_ERR(pp) != -EINPROGRESS) NAPI_GRO_CB(skb)->flush |= flush; } static inline void skb_gro_flush_final_remcsum(struct sk_buff *skb, struct sk_buff *pp, int flush, struct gro_remcsum *grc) { if (PTR_ERR(pp) != -EINPROGRESS) { NAPI_GRO_CB(skb)->flush |= flush; skb_gro_remcsum_cleanup(skb, grc); skb->remcsum_offload = 0; } } #else static inline void skb_gro_flush_final(struct sk_buff *skb, struct sk_buff *pp, int flush) { NAPI_GRO_CB(skb)->flush |= flush; } static inline void skb_gro_flush_final_remcsum(struct sk_buff *skb, struct sk_buff *pp, int flush, struct gro_remcsum *grc) { NAPI_GRO_CB(skb)->flush |= flush; skb_gro_remcsum_cleanup(skb, grc); skb->remcsum_offload = 0; } #endif static inline int dev_hard_header(struct sk_buff *skb, struct net_device *dev, unsigned short type, const void *daddr, const void *saddr, unsigned int len) { if (!dev->header_ops || !dev->header_ops->create) return 0; return dev->header_ops->create(skb, dev, type, daddr, saddr, len); } static inline int dev_parse_header(const struct sk_buff *skb, unsigned char *haddr) { const struct net_device *dev = skb->dev; if (!dev->header_ops || !dev->header_ops->parse) return 0; return dev->header_ops->parse(skb, haddr); } static inline __be16 dev_parse_header_protocol(const struct sk_buff *skb) { const struct net_device *dev = skb->dev; if (!dev->header_ops || !dev->header_ops->parse_protocol) return 0; return dev->header_ops->parse_protocol(skb); } /* ll_header must have at least hard_header_len allocated */ static inline bool dev_validate_header(const struct net_device *dev, char *ll_header, int len) { if (likely(len >= dev->hard_header_len)) return true; if (len < dev->min_header_len) return false; if (capable(CAP_SYS_RAWIO)) { memset(ll_header + len, 0, dev->hard_header_len - len); return true; } if (dev->header_ops && dev->header_ops->validate) return dev->header_ops->validate(ll_header, len); return false; } static inline bool dev_has_header(const struct net_device *dev) { return dev->header_ops && dev->header_ops->create; } #ifdef CONFIG_NET_FLOW_LIMIT #define FLOW_LIMIT_HISTORY (1 << 7) /* must be ^2 and !overflow buckets */ struct sd_flow_limit { u64 count; unsigned int num_buckets; unsigned int history_head; u16 history[FLOW_LIMIT_HISTORY]; u8 buckets[]; }; extern int netdev_flow_limit_table_len; #endif /* CONFIG_NET_FLOW_LIMIT */ /* * Incoming packets are placed on per-CPU queues */ struct softnet_data { struct list_head poll_list; struct sk_buff_head process_queue; /* stats */ unsigned int processed; unsigned int time_squeeze; unsigned int received_rps; #ifdef CONFIG_RPS struct softnet_data *rps_ipi_list; #endif #ifdef CONFIG_NET_FLOW_LIMIT struct sd_flow_limit __rcu *flow_limit; #endif struct Qdisc *output_queue; struct Qdisc **output_queue_tailp; struct sk_buff *completion_queue; #ifdef CONFIG_XFRM_OFFLOAD struct sk_buff_head xfrm_backlog; #endif /* written and read only by owning cpu: */ struct { u16 recursion; u8 more; } xmit; #ifdef CONFIG_RPS /* input_queue_head should be written by cpu owning this struct, * and only read by other cpus. Worth using a cache line. */ unsigned int input_queue_head ____cacheline_aligned_in_smp; /* Elements below can be accessed between CPUs for RPS/RFS */ call_single_data_t csd ____cacheline_aligned_in_smp; struct softnet_data *rps_ipi_next; unsigned int cpu; unsigned int input_queue_tail; #endif unsigned int dropped; struct sk_buff_head input_pkt_queue; struct napi_struct backlog; }; static inline void input_queue_head_incr(struct softnet_data *sd) { #ifdef CONFIG_RPS sd->input_queue_head++; #endif } static inline void input_queue_tail_incr_save(struct softnet_data *sd, unsigned int *qtail) { #ifdef CONFIG_RPS *qtail = ++sd->input_queue_tail; #endif } DECLARE_PER_CPU_ALIGNED(struct softnet_data, softnet_data); static inline int dev_recursion_level(void) { return this_cpu_read(softnet_data.xmit.recursion); } #define XMIT_RECURSION_LIMIT 8 static inline bool dev_xmit_recursion(void) { return unlikely(__this_cpu_read(softnet_data.xmit.recursion) > XMIT_RECURSION_LIMIT); } static inline void dev_xmit_recursion_inc(void) { __this_cpu_inc(softnet_data.xmit.recursion); } static inline void dev_xmit_recursion_dec(void) { __this_cpu_dec(softnet_data.xmit.recursion); } void __netif_schedule(struct Qdisc *q); void netif_schedule_queue(struct netdev_queue *txq); static inline void netif_tx_schedule_all(struct net_device *dev) { unsigned int i; for (i = 0; i < dev->num_tx_queues; i++) netif_schedule_queue(netdev_get_tx_queue(dev, i)); } static __always_inline void netif_tx_start_queue(struct netdev_queue *dev_queue) { clear_bit(__QUEUE_STATE_DRV_XOFF, &dev_queue->state); } /** * netif_start_queue - allow transmit * @dev: network device * * Allow upper layers to call the device hard_start_xmit routine. */ static inline void netif_start_queue(struct net_device *dev) { netif_tx_start_queue(netdev_get_tx_queue(dev, 0)); } static inline void netif_tx_start_all_queues(struct net_device *dev) { unsigned int i; for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); netif_tx_start_queue(txq); } } void netif_tx_wake_queue(struct netdev_queue *dev_queue); /** * netif_wake_queue - restart transmit * @dev: network device * * Allow upper layers to call the device hard_start_xmit routine. * Used for flow control when transmit resources are available. */ static inline void netif_wake_queue(struct net_device *dev) { netif_tx_wake_queue(netdev_get_tx_queue(dev, 0)); } static inline void netif_tx_wake_all_queues(struct net_device *dev) { unsigned int i; for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); netif_tx_wake_queue(txq); } } static __always_inline void netif_tx_stop_queue(struct netdev_queue *dev_queue) { set_bit(__QUEUE_STATE_DRV_XOFF, &dev_queue->state); } /** * netif_stop_queue - stop transmitted packets * @dev: network device * * Stop upper layers calling the device hard_start_xmit routine. * Used for flow control when transmit resources are unavailable. */ static inline void netif_stop_queue(struct net_device *dev) { netif_tx_stop_queue(netdev_get_tx_queue(dev, 0)); } void netif_tx_stop_all_queues(struct net_device *dev); static inline bool netif_tx_queue_stopped(const struct netdev_queue *dev_queue) { return test_bit(__QUEUE_STATE_DRV_XOFF, &dev_queue->state); } /** * netif_queue_stopped - test if transmit queue is flowblocked * @dev: network device * * Test if transmit queue on device is currently unable to send. */ static inline bool netif_queue_stopped(const struct net_device *dev) { return netif_tx_queue_stopped(netdev_get_tx_queue(dev, 0)); } static inline bool netif_xmit_stopped(const struct netdev_queue *dev_queue) { return dev_queue->state & QUEUE_STATE_ANY_XOFF; } static inline bool netif_xmit_frozen_or_stopped(const struct netdev_queue *dev_queue) { return dev_queue->state & QUEUE_STATE_ANY_XOFF_OR_FROZEN; } static inline bool netif_xmit_frozen_or_drv_stopped(const struct netdev_queue *dev_queue) { return dev_queue->state & QUEUE_STATE_DRV_XOFF_OR_FROZEN; } /** * netdev_queue_set_dql_min_limit - set dql minimum limit * @dev_queue: pointer to transmit queue * @min_limit: dql minimum limit * * Forces xmit_more() to return true until the minimum threshold * defined by @min_limit is reached (or until the tx queue is * empty). Warning: to be use with care, misuse will impact the * latency. */ static inline void netdev_queue_set_dql_min_limit(struct netdev_queue *dev_queue, unsigned int min_limit) { #ifdef CONFIG_BQL dev_queue->dql.min_limit = min_limit; #endif } /** * netdev_txq_bql_enqueue_prefetchw - prefetch bql data for write * @dev_queue: pointer to transmit queue * * BQL enabled drivers might use this helper in their ndo_start_xmit(), * to give appropriate hint to the CPU. */ static inline void netdev_txq_bql_enqueue_prefetchw(struct netdev_queue *dev_queue) { #ifdef CONFIG_BQL prefetchw(&dev_queue->dql.num_queued); #endif } /** * netdev_txq_bql_complete_prefetchw - prefetch bql data for write * @dev_queue: pointer to transmit queue * * BQL enabled drivers might use this helper in their TX completion path, * to give appropriate hint to the CPU. */ static inline void netdev_txq_bql_complete_prefetchw(struct netdev_queue *dev_queue) { #ifdef CONFIG_BQL prefetchw(&dev_queue->dql.limit); #endif } static inline void netdev_tx_sent_queue(struct netdev_queue *dev_queue, unsigned int bytes) { #ifdef CONFIG_BQL dql_queued(&dev_queue->dql, bytes); if (likely(dql_avail(&dev_queue->dql) >= 0)) return; set_bit(__QUEUE_STATE_STACK_XOFF, &dev_queue->state); /* * The XOFF flag must be set before checking the dql_avail below, * because in netdev_tx_completed_queue we update the dql_completed * before checking the XOFF flag. */ smp_mb(); /* check again in case another CPU has just made room avail */ if (unlikely(dql_avail(&dev_queue->dql) >= 0)) clear_bit(__QUEUE_STATE_STACK_XOFF, &dev_queue->state); #endif } /* Variant of netdev_tx_sent_queue() for drivers that are aware * that they should not test BQL status themselves. * We do want to change __QUEUE_STATE_STACK_XOFF only for the last * skb of a batch. * Returns true if the doorbell must be used to kick the NIC. */ static inline bool __netdev_tx_sent_queue(struct netdev_queue *dev_queue, unsigned int bytes, bool xmit_more) { if (xmit_more) { #ifdef CONFIG_BQL dql_queued(&dev_queue->dql, bytes); #endif return netif_tx_queue_stopped(dev_queue); } netdev_tx_sent_queue(dev_queue, bytes); return true; } /** * netdev_sent_queue - report the number of bytes queued to hardware * @dev: network device * @bytes: number of bytes queued to the hardware device queue * * Report the number of bytes queued for sending/completion to the network * device hardware queue. @bytes should be a good approximation and should * exactly match netdev_completed_queue() @bytes */ static inline void netdev_sent_queue(struct net_device *dev, unsigned int bytes) { netdev_tx_sent_queue(netdev_get_tx_queue(dev, 0), bytes); } static inline bool __netdev_sent_queue(struct net_device *dev, unsigned int bytes, bool xmit_more) { return __netdev_tx_sent_queue(netdev_get_tx_queue(dev, 0), bytes, xmit_more); } static inline void netdev_tx_completed_queue(struct netdev_queue *dev_queue, unsigned int pkts, unsigned int bytes) { #ifdef CONFIG_BQL if (unlikely(!bytes)) return; dql_completed(&dev_queue->dql, bytes); /* * Without the memory barrier there is a small possiblity that * netdev_tx_sent_queue will miss the update and cause the queue to * be stopped forever */ smp_mb(); if (unlikely(dql_avail(&dev_queue->dql) < 0)) return; if (test_and_clear_bit(__QUEUE_STATE_STACK_XOFF, &dev_queue->state)) netif_schedule_queue(dev_queue); #endif } /** * netdev_completed_queue - report bytes and packets completed by device * @dev: network device * @pkts: actual number of packets sent over the medium * @bytes: actual number of bytes sent over the medium * * Report the number of bytes and packets transmitted by the network device * hardware queue over the physical medium, @bytes must exactly match the * @bytes amount passed to netdev_sent_queue() */ static inline void netdev_completed_queue(struct net_device *dev, unsigned int pkts, unsigned int bytes) { netdev_tx_completed_queue(netdev_get_tx_queue(dev, 0), pkts, bytes); } static inline void netdev_tx_reset_queue(struct netdev_queue *q) { #ifdef CONFIG_BQL clear_bit(__QUEUE_STATE_STACK_XOFF, &q->state); dql_reset(&q->dql); #endif } /** * netdev_reset_queue - reset the packets and bytes count of a network device * @dev_queue: network device * * Reset the bytes and packet count of a network device and clear the * software flow control OFF bit for this network device */ static inline void netdev_reset_queue(struct net_device *dev_queue) { netdev_tx_reset_queue(netdev_get_tx_queue(dev_queue, 0)); } /** * netdev_cap_txqueue - check if selected tx queue exceeds device queues * @dev: network device * @queue_index: given tx queue index * * Returns 0 if given tx queue index >= number of device tx queues, * otherwise returns the originally passed tx queue index. */ static inline u16 netdev_cap_txqueue(struct net_device *dev, u16 queue_index) { if (unlikely(queue_index >= dev->real_num_tx_queues)) { net_warn_ratelimited("%s selects TX queue %d, but real number of TX queues is %d\n", dev->name, queue_index, dev->real_num_tx_queues); return 0; } return queue_index; } /** * netif_running - test if up * @dev: network device * * Test if the device has been brought up. */ static inline bool netif_running(const struct net_device *dev) { return test_bit(__LINK_STATE_START, &dev->state); } /* * Routines to manage the subqueues on a device. We only need start, * stop, and a check if it's stopped. All other device management is * done at the overall netdevice level. * Also test the device if we're multiqueue. */ /** * netif_start_subqueue - allow sending packets on subqueue * @dev: network device * @queue_index: sub queue index * * Start individual transmit queue of a device with multiple transmit queues. */ static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index) { struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index); netif_tx_start_queue(txq); } /** * netif_stop_subqueue - stop sending packets on subqueue * @dev: network device * @queue_index: sub queue index * * Stop individual transmit queue of a device with multiple transmit queues. */ static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index) { struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index); netif_tx_stop_queue(txq); } /** * __netif_subqueue_stopped - test status of subqueue * @dev: network device * @queue_index: sub queue index * * Check individual transmit queue of a device with multiple transmit queues. */ static inline bool __netif_subqueue_stopped(const struct net_device *dev, u16 queue_index) { struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index); return netif_tx_queue_stopped(txq); } /** * netif_subqueue_stopped - test status of subqueue * @dev: network device * @skb: sub queue buffer pointer * * Check individual transmit queue of a device with multiple transmit queues. */ static inline bool netif_subqueue_stopped(const struct net_device *dev, struct sk_buff *skb) { return __netif_subqueue_stopped(dev, skb_get_queue_mapping(skb)); } /** * netif_wake_subqueue - allow sending packets on subqueue * @dev: network device * @queue_index: sub queue index * * Resume individual transmit queue of a device with multiple transmit queues. */ static inline void netif_wake_subqueue(struct net_device *dev, u16 queue_index) { struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index); netif_tx_wake_queue(txq); } #ifdef CONFIG_XPS int netif_set_xps_queue(struct net_device *dev, const struct cpumask *mask, u16 index); int __netif_set_xps_queue(struct net_device *dev, const unsigned long *mask, u16 index, enum xps_map_type type); /** * netif_attr_test_mask - Test a CPU or Rx queue set in a mask * @j: CPU/Rx queue index * @mask: bitmask of all cpus/rx queues * @nr_bits: number of bits in the bitmask * * Test if a CPU or Rx queue index is set in a mask of all CPU/Rx queues. */ static inline bool netif_attr_test_mask(unsigned long j, const unsigned long *mask, unsigned int nr_bits) { cpu_max_bits_warn(j, nr_bits); return test_bit(j, mask); } /** * netif_attr_test_online - Test for online CPU/Rx queue * @j: CPU/Rx queue index * @online_mask: bitmask for CPUs/Rx queues that are online * @nr_bits: number of bits in the bitmask * * Returns true if a CPU/Rx queue is online. */ static inline bool netif_attr_test_online(unsigned long j, const unsigned long *online_mask, unsigned int nr_bits) { cpu_max_bits_warn(j, nr_bits); if (online_mask) return test_bit(j, online_mask); return (j < nr_bits); } /** * netif_attrmask_next - get the next CPU/Rx queue in a cpu/Rx queues mask * @n: CPU/Rx queue index * @srcp: the cpumask/Rx queue mask pointer * @nr_bits: number of bits in the bitmask * * Returns >= nr_bits if no further CPUs/Rx queues set. */ static inline unsigned int netif_attrmask_next(int n, const unsigned long *srcp, unsigned int nr_bits) { /* -1 is a legal arg here. */ if (n != -1) cpu_max_bits_warn(n, nr_bits); if (srcp) return find_next_bit(srcp, nr_bits, n + 1); return n + 1; } /** * netif_attrmask_next_and - get the next CPU/Rx queue in \*src1p & \*src2p * @n: CPU/Rx queue index * @src1p: the first CPUs/Rx queues mask pointer * @src2p: the second CPUs/Rx queues mask pointer * @nr_bits: number of bits in the bitmask * * Returns >= nr_bits if no further CPUs/Rx queues set in both. */ static inline int netif_attrmask_next_and(int n, const unsigned long *src1p, const unsigned long *src2p, unsigned int nr_bits) { /* -1 is a legal arg here. */ if (n != -1) cpu_max_bits_warn(n, nr_bits); if (src1p && src2p) return find_next_and_bit(src1p, src2p, nr_bits, n + 1); else if (src1p) return find_next_bit(src1p, nr_bits, n + 1); else if (src2p) return find_next_bit(src2p, nr_bits, n + 1); return n + 1; } #else static inline int netif_set_xps_queue(struct net_device *dev, const struct cpumask *mask, u16 index) { return 0; } static inline int __netif_set_xps_queue(struct net_device *dev, const unsigned long *mask, u16 index, enum xps_map_type type) { return 0; } #endif /** * netif_is_multiqueue - test if device has multiple transmit queues * @dev: network device * * Check if device has multiple transmit queues */ static inline bool netif_is_multiqueue(const struct net_device *dev) { return dev->num_tx_queues > 1; } int netif_set_real_num_tx_queues(struct net_device *dev, unsigned int txq); #ifdef CONFIG_SYSFS int netif_set_real_num_rx_queues(struct net_device *dev, unsigned int rxq); #else static inline int netif_set_real_num_rx_queues(struct net_device *dev, unsigned int rxqs) { dev->real_num_rx_queues = rxqs; return 0; } #endif int netif_set_real_num_queues(struct net_device *dev, unsigned int txq, unsigned int rxq); static inline struct netdev_rx_queue * __netif_get_rx_queue(struct net_device *dev, unsigned int rxq) { return dev->_rx + rxq; } #ifdef CONFIG_SYSFS static inline unsigned int get_netdev_rx_queue_index( struct netdev_rx_queue *queue) { struct net_device *dev = queue->dev; int index = queue - dev->_rx; BUG_ON(index >= dev->num_rx_queues); return index; } #endif #define DEFAULT_MAX_NUM_RSS_QUEUES (8) int netif_get_num_default_rss_queues(void); enum skb_free_reason { SKB_REASON_CONSUMED, SKB_REASON_DROPPED, }; void __dev_kfree_skb_irq(struct sk_buff *skb, enum skb_free_reason reason); void __dev_kfree_skb_any(struct sk_buff *skb, enum skb_free_reason reason); /* * It is not allowed to call kfree_skb() or consume_skb() from hardware * interrupt context or with hardware interrupts being disabled. * (in_hardirq() || irqs_disabled()) * * We provide four helpers that can be used in following contexts : * * dev_kfree_skb_irq(skb) when caller drops a packet from irq context, * replacing kfree_skb(skb) * * dev_consume_skb_irq(skb) when caller consumes a packet from irq context. * Typically used in place of consume_skb(skb) in TX completion path * * dev_kfree_skb_any(skb) when caller doesn't know its current irq context, * replacing kfree_skb(skb) * * dev_consume_skb_any(skb) when caller doesn't know its current irq context, * and consumed a packet. Used in place of consume_skb(skb) */ static inline void dev_kfree_skb_irq(struct sk_buff *skb) { __dev_kfree_skb_irq(skb, SKB_REASON_DROPPED); } static inline void dev_consume_skb_irq(struct sk_buff *skb) { __dev_kfree_skb_irq(skb, SKB_REASON_CONSUMED); } static inline void dev_kfree_skb_any(struct sk_buff *skb) { __dev_kfree_skb_any(skb, SKB_REASON_DROPPED); } static inline void dev_consume_skb_any(struct sk_buff *skb) { __dev_kfree_skb_any(skb, SKB_REASON_CONSUMED); } u32 bpf_prog_run_generic_xdp(struct sk_buff *skb, struct xdp_buff *xdp, struct bpf_prog *xdp_prog); void generic_xdp_tx(struct sk_buff *skb, struct bpf_prog *xdp_prog); int do_xdp_generic(struct bpf_prog *xdp_prog, struct sk_buff *skb); int netif_rx(struct sk_buff *skb); int netif_rx_ni(struct sk_buff *skb); int netif_rx_any_context(struct sk_buff *skb); int netif_receive_skb(struct sk_buff *skb); int netif_receive_skb_core(struct sk_buff *skb); void netif_receive_skb_list(struct list_head *head); gro_result_t napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb); void napi_gro_flush(struct napi_struct *napi, bool flush_old); struct sk_buff *napi_get_frags(struct napi_struct *napi); gro_result_t napi_gro_frags(struct napi_struct *napi); struct packet_offload *gro_find_receive_by_type(__be16 type); struct packet_offload *gro_find_complete_by_type(__be16 type); static inline void napi_free_frags(struct napi_struct *napi) { kfree_skb(napi->skb); napi->skb = NULL; } bool netdev_is_rx_handler_busy(struct net_device *dev); int netdev_rx_handler_register(struct net_device *dev, rx_handler_func_t *rx_handler, void *rx_handler_data); void netdev_rx_handler_unregister(struct net_device *dev); bool dev_valid_name(const char *name); static inline bool is_socket_ioctl_cmd(unsigned int cmd) { return _IOC_TYPE(cmd) == SOCK_IOC_TYPE; } int get_user_ifreq(struct ifreq *ifr, void __user **ifrdata, void __user *arg); int put_user_ifreq(struct ifreq *ifr, void __user *arg); int dev_ioctl(struct net *net, unsigned int cmd, struct ifreq *ifr, void __user *data, bool *need_copyout); int dev_ifconf(struct net *net, struct ifconf __user *ifc); int dev_ethtool(struct net *net, struct ifreq *ifr, void __user *userdata); unsigned int dev_get_flags(const struct net_device *); int __dev_change_flags(struct net_device *dev, unsigned int flags, struct netlink_ext_ack *extack); int dev_change_flags(struct net_device *dev, unsigned int flags, struct netlink_ext_ack *extack); void __dev_notify_flags(struct net_device *, unsigned int old_flags, unsigned int gchanges); int dev_change_name(struct net_device *, const char *); int dev_set_alias(struct net_device *, const char *, size_t); int dev_get_alias(const struct net_device *, char *, size_t); int __dev_change_net_namespace(struct net_device *dev, struct net *net, const char *pat, int new_ifindex); static inline int dev_change_net_namespace(struct net_device *dev, struct net *net, const char *pat) { return __dev_change_net_namespace(dev, net, pat, 0); } int __dev_set_mtu(struct net_device *, int); int dev_validate_mtu(struct net_device *dev, int mtu, struct netlink_ext_ack *extack); int dev_set_mtu_ext(struct net_device *dev, int mtu, struct netlink_ext_ack *extack); int dev_set_mtu(struct net_device *, int); int dev_change_tx_queue_len(struct net_device *, unsigned long); void dev_set_group(struct net_device *, int); int dev_pre_changeaddr_notify(struct net_device *dev, const char *addr, struct netlink_ext_ack *extack); int dev_set_mac_address(struct net_device *dev, struct sockaddr *sa, struct netlink_ext_ack *extack); int dev_set_mac_address_user(struct net_device *dev, struct sockaddr *sa, struct netlink_ext_ack *extack); int dev_get_mac_address(struct sockaddr *sa, struct net *net, char *dev_name); int dev_change_carrier(struct net_device *, bool new_carrier); int dev_get_phys_port_id(struct net_device *dev, struct netdev_phys_item_id *ppid); int dev_get_phys_port_name(struct net_device *dev, char *name, size_t len); int dev_get_port_parent_id(struct net_device *dev, struct netdev_phys_item_id *ppid, bool recurse); bool netdev_port_same_parent_id(struct net_device *a, struct net_device *b); int dev_change_proto_down(struct net_device *dev, bool proto_down); int dev_change_proto_down_generic(struct net_device *dev, bool proto_down); void dev_change_proto_down_reason(struct net_device *dev, unsigned long mask, u32 value); struct sk_buff *validate_xmit_skb_list(struct sk_buff *skb, struct net_device *dev, bool *again); struct sk_buff *dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev, struct netdev_queue *txq, int *ret); typedef int (*bpf_op_t)(struct net_device *dev, struct netdev_bpf *bpf); int dev_change_xdp_fd(struct net_device *dev, struct netlink_ext_ack *extack, int fd, int expected_fd, u32 flags); int bpf_xdp_link_attach(const union bpf_attr *attr, struct bpf_prog *prog); u8 dev_xdp_prog_count(struct net_device *dev); u32 dev_xdp_prog_id(struct net_device *dev, enum bpf_xdp_mode mode); int __dev_forward_skb(struct net_device *dev, struct sk_buff *skb); int dev_forward_skb(struct net_device *dev, struct sk_buff *skb); int dev_forward_skb_nomtu(struct net_device *dev, struct sk_buff *skb); bool is_skb_forwardable(const struct net_device *dev, const struct sk_buff *skb); static __always_inline bool __is_skb_forwardable(const struct net_device *dev, const struct sk_buff *skb, const bool check_mtu) { const u32 vlan_hdr_len = 4; /* VLAN_HLEN */ unsigned int len; if (!(dev->flags & IFF_UP)) return false; if (!check_mtu) return true; len = dev->mtu + dev->hard_header_len + vlan_hdr_len; if (skb->len <= len) return true; /* if TSO is enabled, we don't care about the length as the packet * could be forwarded without being segmented before */ if (skb_is_gso(skb)) return true; return false; } static __always_inline int ____dev_forward_skb(struct net_device *dev, struct sk_buff *skb, const bool check_mtu) { if (skb_orphan_frags(skb, GFP_ATOMIC) || unlikely(!__is_skb_forwardable(dev, skb, check_mtu))) { atomic_long_inc(&dev->rx_dropped); kfree_skb(skb); return NET_RX_DROP; } skb_scrub_packet(skb, !net_eq(dev_net(dev), dev_net(skb->dev))); skb->priority = 0; return 0; } bool dev_nit_active(struct net_device *dev); void dev_queue_xmit_nit(struct sk_buff *skb, struct net_device *dev); extern int netdev_budget; extern unsigned int netdev_budget_usecs; /* Called by rtnetlink.c:rtnl_unlock() */ void netdev_run_todo(void); /** * dev_put - release reference to device * @dev: network device * * Release reference to device to allow it to be freed. */ static inline void dev_put(struct net_device *dev) { if (dev) { #ifdef CONFIG_PCPU_DEV_REFCNT this_cpu_dec(*dev->pcpu_refcnt); #else refcount_dec(&dev->dev_refcnt); #endif } } /** * dev_hold - get reference to device * @dev: network device * * Hold reference to device to keep it from being freed. */ static inline void dev_hold(struct net_device *dev) { if (dev) { #ifdef CONFIG_PCPU_DEV_REFCNT this_cpu_inc(*dev->pcpu_refcnt); #else refcount_inc(&dev->dev_refcnt); #endif } } /* Carrier loss detection, dial on demand. The functions netif_carrier_on * and _off may be called from IRQ context, but it is caller * who is responsible for serialization of these calls. * * The name carrier is inappropriate, these functions should really be * called netif_lowerlayer_*() because they represent the state of any * kind of lower layer not just hardware media. */ void linkwatch_init_dev(struct net_device *dev); void linkwatch_fire_event(struct net_device *dev); void linkwatch_forget_dev(struct net_device *dev); /** * netif_carrier_ok - test if carrier present * @dev: network device * * Check if carrier is present on device */ static inline bool netif_carrier_ok(const struct net_device *dev) { return !test_bit(__LINK_STATE_NOCARRIER, &dev->state); } unsigned long dev_trans_start(struct net_device *dev); void __netdev_watchdog_up(struct net_device *dev); void netif_carrier_on(struct net_device *dev); void netif_carrier_off(struct net_device *dev); void netif_carrier_event(struct net_device *dev); /** * netif_dormant_on - mark device as dormant. * @dev: network device * * Mark device as dormant (as per RFC2863). * * The dormant state indicates that the relevant interface is not * actually in a condition to pass packets (i.e., it is not 'up') but is * in a "pending" state, waiting for some external event. For "on- * demand" interfaces, this new state identifies the situation where the * interface is waiting for events to place it in the up state. */ static inline void netif_dormant_on(struct net_device *dev) { if (!test_and_set_bit(__LINK_STATE_DORMANT, &dev->state)) linkwatch_fire_event(dev); } /** * netif_dormant_off - set device as not dormant. * @dev: network device * * Device is not in dormant state. */ static inline void netif_dormant_off(struct net_device *dev) { if (test_and_clear_bit(__LINK_STATE_DORMANT, &dev->state)) linkwatch_fire_event(dev); } /** * netif_dormant - test if device is dormant * @dev: network device * * Check if device is dormant. */ static inline bool netif_dormant(const struct net_device *dev) { return test_bit(__LINK_STATE_DORMANT, &dev->state); } /** * netif_testing_on - mark device as under test. * @dev: network device * * Mark device as under test (as per RFC2863). * * The testing state indicates that some test(s) must be performed on * the interface. After completion, of the test, the interface state * will change to up, dormant, or down, as appropriate. */ static inline void netif_testing_on(struct net_device *dev) { if (!test_and_set_bit(__LINK_STATE_TESTING, &dev->state)) linkwatch_fire_event(dev); } /** * netif_testing_off - set device as not under test. * @dev: network device * * Device is not in testing state. */ static inline void netif_testing_off(struct net_device *dev) { if (test_and_clear_bit(__LINK_STATE_TESTING, &dev->state)) linkwatch_fire_event(dev); } /** * netif_testing - test if device is under test * @dev: network device * * Check if device is under test */ static inline bool netif_testing(const struct net_device *dev) { return test_bit(__LINK_STATE_TESTING, &dev->state); } /** * netif_oper_up - test if device is operational * @dev: network device * * Check if carrier is operational */ static inline bool netif_oper_up(const struct net_device *dev) { return (dev->operstate == IF_OPER_UP || dev->operstate == IF_OPER_UNKNOWN /* backward compat */); } /** * netif_device_present - is device available or removed * @dev: network device * * Check if device has not been removed from system. */ static inline bool netif_device_present(const struct net_device *dev) { return test_bit(__LINK_STATE_PRESENT, &dev->state); } void netif_device_detach(struct net_device *dev); void netif_device_attach(struct net_device *dev); /* * Network interface message level settings */ enum { NETIF_MSG_DRV_BIT, NETIF_MSG_PROBE_BIT, NETIF_MSG_LINK_BIT, NETIF_MSG_TIMER_BIT, NETIF_MSG_IFDOWN_BIT, NETIF_MSG_IFUP_BIT, NETIF_MSG_RX_ERR_BIT, NETIF_MSG_TX_ERR_BIT, NETIF_MSG_TX_QUEUED_BIT, NETIF_MSG_INTR_BIT, NETIF_MSG_TX_DONE_BIT, NETIF_MSG_RX_STATUS_BIT, NETIF_MSG_PKTDATA_BIT, NETIF_MSG_HW_BIT, NETIF_MSG_WOL_BIT, /* When you add a new bit above, update netif_msg_class_names array * in net/ethtool/common.c */ NETIF_MSG_CLASS_COUNT, }; /* Both ethtool_ops interface and internal driver implementation use u32 */ static_assert(NETIF_MSG_CLASS_COUNT <= 32); #define __NETIF_MSG_BIT(bit) ((u32)1 << (bit)) #define __NETIF_MSG(name) __NETIF_MSG_BIT(NETIF_MSG_ ## name ## _BIT) #define NETIF_MSG_DRV __NETIF_MSG(DRV) #define NETIF_MSG_PROBE __NETIF_MSG(PROBE) #define NETIF_MSG_LINK __NETIF_MSG(LINK) #define NETIF_MSG_TIMER __NETIF_MSG(TIMER) #define NETIF_MSG_IFDOWN __NETIF_MSG(IFDOWN) #define NETIF_MSG_IFUP __NETIF_MSG(IFUP) #define NETIF_MSG_RX_ERR __NETIF_MSG(RX_ERR) #define NETIF_MSG_TX_ERR __NETIF_MSG(TX_ERR) #define NETIF_MSG_TX_QUEUED __NETIF_MSG(TX_QUEUED) #define NETIF_MSG_INTR __NETIF_MSG(INTR) #define NETIF_MSG_TX_DONE __NETIF_MSG(TX_DONE) #define NETIF_MSG_RX_STATUS __NETIF_MSG(RX_STATUS) #define NETIF_MSG_PKTDATA __NETIF_MSG(PKTDATA) #define NETIF_MSG_HW __NETIF_MSG(HW) #define NETIF_MSG_WOL __NETIF_MSG(WOL) #define netif_msg_drv(p) ((p)->msg_enable & NETIF_MSG_DRV) #define netif_msg_probe(p) ((p)->msg_enable & NETIF_MSG_PROBE) #define netif_msg_link(p) ((p)->msg_enable & NETIF_MSG_LINK) #define netif_msg_timer(p) ((p)->msg_enable & NETIF_MSG_TIMER) #define netif_msg_ifdown(p) ((p)->msg_enable & NETIF_MSG_IFDOWN) #define netif_msg_ifup(p) ((p)->msg_enable & NETIF_MSG_IFUP) #define netif_msg_rx_err(p) ((p)->msg_enable & NETIF_MSG_RX_ERR) #define netif_msg_tx_err(p) ((p)->msg_enable & NETIF_MSG_TX_ERR) #define netif_msg_tx_queued(p) ((p)->msg_enable & NETIF_MSG_TX_QUEUED) #define netif_msg_intr(p) ((p)->msg_enable & NETIF_MSG_INTR) #define netif_msg_tx_done(p) ((p)->msg_enable & NETIF_MSG_TX_DONE) #define netif_msg_rx_status(p) ((p)->msg_enable & NETIF_MSG_RX_STATUS) #define netif_msg_pktdata(p) ((p)->msg_enable & NETIF_MSG_PKTDATA) #define netif_msg_hw(p) ((p)->msg_enable & NETIF_MSG_HW) #define netif_msg_wol(p) ((p)->msg_enable & NETIF_MSG_WOL) static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits) { /* use default */ if (debug_value < 0 || debug_value >= (sizeof(u32) * 8)) return default_msg_enable_bits; if (debug_value == 0) /* no output */ return 0; /* set low N bits */ return (1U << debug_value) - 1; } static inline void __netif_tx_lock(struct netdev_queue *txq, int cpu) { spin_lock(&txq->_xmit_lock); /* Pairs with READ_ONCE() in __dev_queue_xmit() */ WRITE_ONCE(txq->xmit_lock_owner, cpu); } static inline bool __netif_tx_acquire(struct netdev_queue *txq) { __acquire(&txq->_xmit_lock); return true; } static inline void __netif_tx_release(struct netdev_queue *txq) { __release(&txq->_xmit_lock); } static inline void __netif_tx_lock_bh(struct netdev_queue *txq) { spin_lock_bh(&txq->_xmit_lock); /* Pairs with READ_ONCE() in __dev_queue_xmit() */ WRITE_ONCE(txq->xmit_lock_owner, smp_processor_id()); } static inline bool __netif_tx_trylock(struct netdev_queue *txq) { bool ok = spin_trylock(&txq->_xmit_lock); if (likely(ok)) { /* Pairs with READ_ONCE() in __dev_queue_xmit() */ WRITE_ONCE(txq->xmit_lock_owner, smp_processor_id()); } return ok; } static inline void __netif_tx_unlock(struct netdev_queue *txq) { /* Pairs with READ_ONCE() in __dev_queue_xmit() */ WRITE_ONCE(txq->xmit_lock_owner, -1); spin_unlock(&txq->_xmit_lock); } static inline void __netif_tx_unlock_bh(struct netdev_queue *txq) { /* Pairs with READ_ONCE() in __dev_queue_xmit() */ WRITE_ONCE(txq->xmit_lock_owner, -1); spin_unlock_bh(&txq->_xmit_lock); } static inline void txq_trans_update(struct netdev_queue *txq) { if (txq->xmit_lock_owner != -1) txq->trans_start = jiffies; } /* legacy drivers only, netdev_start_xmit() sets txq->trans_start */ static inline void netif_trans_update(struct net_device *dev) { struct netdev_queue *txq = netdev_get_tx_queue(dev, 0); if (txq->trans_start != jiffies) txq->trans_start = jiffies; } /** * netif_tx_lock - grab network device transmit lock * @dev: network device * * Get network device transmit lock */ static inline void netif_tx_lock(struct net_device *dev) { unsigned int i; int cpu; spin_lock(&dev->tx_global_lock); cpu = smp_processor_id(); for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); /* We are the only thread of execution doing a * freeze, but we have to grab the _xmit_lock in * order to synchronize with threads which are in * the ->hard_start_xmit() handler and already * checked the frozen bit. */ __netif_tx_lock(txq, cpu); set_bit(__QUEUE_STATE_FROZEN, &txq->state); __netif_tx_unlock(txq); } } static inline void netif_tx_lock_bh(struct net_device *dev) { local_bh_disable(); netif_tx_lock(dev); } static inline void netif_tx_unlock(struct net_device *dev) { unsigned int i; for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); /* No need to grab the _xmit_lock here. If the * queue is not stopped for another reason, we * force a schedule. */ clear_bit(__QUEUE_STATE_FROZEN, &txq->state); netif_schedule_queue(txq); } spin_unlock(&dev->tx_global_lock); } static inline void netif_tx_unlock_bh(struct net_device *dev) { netif_tx_unlock(dev); local_bh_enable(); } #define HARD_TX_LOCK(dev, txq, cpu) { \ if ((dev->features & NETIF_F_LLTX) == 0) { \ __netif_tx_lock(txq, cpu); \ } else { \ __netif_tx_acquire(txq); \ } \ } #define HARD_TX_TRYLOCK(dev, txq) \ (((dev->features & NETIF_F_LLTX) == 0) ? \ __netif_tx_trylock(txq) : \ __netif_tx_acquire(txq)) #define HARD_TX_UNLOCK(dev, txq) { \ if ((dev->features & NETIF_F_LLTX) == 0) { \ __netif_tx_unlock(txq); \ } else { \ __netif_tx_release(txq); \ } \ } static inline void netif_tx_disable(struct net_device *dev) { unsigned int i; int cpu; local_bh_disable(); cpu = smp_processor_id(); spin_lock(&dev->tx_global_lock); for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); __netif_tx_lock(txq, cpu); netif_tx_stop_queue(txq); __netif_tx_unlock(txq); } spin_unlock(&dev->tx_global_lock); local_bh_enable(); } static inline void netif_addr_lock(struct net_device *dev) { unsigned char nest_level = 0; #ifdef CONFIG_LOCKDEP nest_level = dev->nested_level; #endif spin_lock_nested(&dev->addr_list_lock, nest_level); } static inline void netif_addr_lock_bh(struct net_device *dev) { unsigned char nest_level = 0; #ifdef CONFIG_LOCKDEP nest_level = dev->nested_level; #endif local_bh_disable(); spin_lock_nested(&dev->addr_list_lock, nest_level); } static inline void netif_addr_unlock(struct net_device *dev) { spin_unlock(&dev->addr_list_lock); } static inline void netif_addr_unlock_bh(struct net_device *dev) { spin_unlock_bh(&dev->addr_list_lock); } /* * dev_addrs walker. Should be used only for read access. Call with * rcu_read_lock held. */ #define for_each_dev_addr(dev, ha) \ list_for_each_entry_rcu(ha, &dev->dev_addrs.list, list) /* These functions live elsewhere (drivers/net/net_init.c, but related) */ void ether_setup(struct net_device *dev); /* Support for loadable net-drivers */ struct net_device *alloc_netdev_mqs(int sizeof_priv, const char *name, unsigned char name_assign_type, void (*setup)(struct net_device *), unsigned int txqs, unsigned int rxqs); #define alloc_netdev(sizeof_priv, name, name_assign_type, setup) \ alloc_netdev_mqs(sizeof_priv, name, name_assign_type, setup, 1, 1) #define alloc_netdev_mq(sizeof_priv, name, name_assign_type, setup, count) \ alloc_netdev_mqs(sizeof_priv, name, name_assign_type, setup, count, \ count) int register_netdev(struct net_device *dev); void unregister_netdev(struct net_device *dev); int devm_register_netdev(struct device *dev, struct net_device *ndev); /* General hardware address lists handling functions */ int __hw_addr_sync(struct netdev_hw_addr_list *to_list, struct netdev_hw_addr_list *from_list, int addr_len); void __hw_addr_unsync(struct netdev_hw_addr_list *to_list, struct netdev_hw_addr_list *from_list, int addr_len); int __hw_addr_sync_dev(struct netdev_hw_addr_list *list, struct net_device *dev, int (*sync)(struct net_device *, const unsigned char *), int (*unsync)(struct net_device *, const unsigned char *)); int __hw_addr_ref_sync_dev(struct netdev_hw_addr_list *list, struct net_device *dev, int (*sync)(struct net_device *, const unsigned char *, int), int (*unsync)(struct net_device *, const unsigned char *, int)); void __hw_addr_ref_unsync_dev(struct netdev_hw_addr_list *list, struct net_device *dev, int (*unsync)(struct net_device *, const unsigned char *, int)); void __hw_addr_unsync_dev(struct netdev_hw_addr_list *list, struct net_device *dev, int (*unsync)(struct net_device *, const unsigned char *)); void __hw_addr_init(struct netdev_hw_addr_list *list); /* Functions used for device addresses handling */ static inline void __dev_addr_set(struct net_device *dev, const u8 *addr, size_t len) { memcpy(dev->dev_addr, addr, len); } static inline void dev_addr_set(struct net_device *dev, const u8 *addr) { __dev_addr_set(dev, addr, dev->addr_len); } static inline void dev_addr_mod(struct net_device *dev, unsigned int offset, const u8 *addr, size_t len) { memcpy(&dev->dev_addr[offset], addr, len); } int dev_addr_add(struct net_device *dev, const unsigned char *addr, unsigned char addr_type); int dev_addr_del(struct net_device *dev, const unsigned char *addr, unsigned char addr_type); void dev_addr_flush(struct net_device *dev); int dev_addr_init(struct net_device *dev); /* Functions used for unicast addresses handling */ int dev_uc_add(struct net_device *dev, const unsigned char *addr); int dev_uc_add_excl(struct net_device *dev, const unsigned char *addr); int dev_uc_del(struct net_device *dev, const unsigned char *addr); int dev_uc_sync(struct net_device *to, struct net_device *from); int dev_uc_sync_multiple(struct net_device *to, struct net_device *from); void dev_uc_unsync(struct net_device *to, struct net_device *from); void dev_uc_flush(struct net_device *dev); void dev_uc_init(struct net_device *dev); /** * __dev_uc_sync - Synchonize device's unicast list * @dev: device to sync * @sync: function to call if address should be added * @unsync: function to call if address should be removed * * Add newly added addresses to the interface, and release * addresses that have been deleted. */ static inline int __dev_uc_sync(struct net_device *dev, int (*sync)(struct net_device *, const unsigned char *), int (*unsync)(struct net_device *, const unsigned char *)) { return __hw_addr_sync_dev(&dev->uc, dev, sync, unsync); } /** * __dev_uc_unsync - Remove synchronized addresses from device * @dev: device to sync * @unsync: function to call if address should be removed * * Remove all addresses that were added to the device by dev_uc_sync(). */ static inline void __dev_uc_unsync(struct net_device *dev, int (*unsync)(struct net_device *, const unsigned char *)) { __hw_addr_unsync_dev(&dev->uc, dev, unsync); } /* Functions used for multicast addresses handling */ int dev_mc_add(struct net_device *dev, const unsigned char *addr); int dev_mc_add_global(struct net_device *dev, const unsigned char *addr); int dev_mc_add_excl(struct net_device *dev, const unsigned char *addr); int dev_mc_del(struct net_device *dev, const unsigned char *addr); int dev_mc_del_global(struct net_device *dev, const unsigned char *addr); int dev_mc_sync(struct net_device *to, struct net_device *from); int dev_mc_sync_multiple(struct net_device *to, struct net_device *from); void dev_mc_unsync(struct net_device *to, struct net_device *from); void dev_mc_flush(struct net_device *dev); void dev_mc_init(struct net_device *dev); /** * __dev_mc_sync - Synchonize device's multicast list * @dev: device to sync * @sync: function to call if address should be added * @unsync: function to call if address should be removed * * Add newly added addresses to the interface, and release * addresses that have been deleted. */ static inline int __dev_mc_sync(struct net_device *dev, int (*sync)(struct net_device *, const unsigned char *), int (*unsync)(struct net_device *, const unsigned char *)) { return __hw_addr_sync_dev(&dev->mc, dev, sync, unsync); } /** * __dev_mc_unsync - Remove synchronized addresses from device * @dev: device to sync * @unsync: function to call if address should be removed * * Remove all addresses that were added to the device by dev_mc_sync(). */ static inline void __dev_mc_unsync(struct net_device *dev, int (*unsync)(struct net_device *, const unsigned char *)) { __hw_addr_unsync_dev(&dev->mc, dev, unsync); } /* Functions used for secondary unicast and multicast support */ void dev_set_rx_mode(struct net_device *dev); void __dev_set_rx_mode(struct net_device *dev); int dev_set_promiscuity(struct net_device *dev, int inc); int dev_set_allmulti(struct net_device *dev, int inc); void netdev_state_change(struct net_device *dev); void __netdev_notify_peers(struct net_device *dev); void netdev_notify_peers(struct net_device *dev); void netdev_features_change(struct net_device *dev); /* Load a device via the kmod */ void dev_load(struct net *net, const char *name); struct rtnl_link_stats64 *dev_get_stats(struct net_device *dev, struct rtnl_link_stats64 *storage); void netdev_stats_to_stats64(struct rtnl_link_stats64 *stats64, const struct net_device_stats *netdev_stats); void dev_fetch_sw_netstats(struct rtnl_link_stats64 *s, const struct pcpu_sw_netstats __percpu *netstats); void dev_get_tstats64(struct net_device *dev, struct rtnl_link_stats64 *s); extern int netdev_max_backlog; extern int netdev_tstamp_prequeue; extern int netdev_unregister_timeout_secs; extern int weight_p; extern int dev_weight_rx_bias; extern int dev_weight_tx_bias; extern int dev_rx_weight; extern int dev_tx_weight; extern int gro_normal_batch; enum { NESTED_SYNC_IMM_BIT, NESTED_SYNC_TODO_BIT, }; #define __NESTED_SYNC_BIT(bit) ((u32)1 << (bit)) #define __NESTED_SYNC(name) __NESTED_SYNC_BIT(NESTED_SYNC_ ## name ## _BIT) #define NESTED_SYNC_IMM __NESTED_SYNC(IMM) #define NESTED_SYNC_TODO __NESTED_SYNC(TODO) struct netdev_nested_priv { unsigned char flags; void *data; }; bool netdev_has_upper_dev(struct net_device *dev, struct net_device *upper_dev); struct net_device *netdev_upper_get_next_dev_rcu(struct net_device *dev, struct list_head **iter); struct net_device *netdev_all_upper_get_next_dev_rcu(struct net_device *dev, struct list_head **iter); #ifdef CONFIG_LOCKDEP static LIST_HEAD(net_unlink_list); static inline void net_unlink_todo(struct net_device *dev) { if (list_empty(&dev->unlink_list)) list_add_tail(&dev->unlink_list, &net_unlink_list); } #endif /* iterate through upper list, must be called under RCU read lock */ #define netdev_for_each_upper_dev_rcu(dev, updev, iter) \ for (iter = &(dev)->adj_list.upper, \ updev = netdev_upper_get_next_dev_rcu(dev, &(iter)); \ updev; \ updev = netdev_upper_get_next_dev_rcu(dev, &(iter))) int netdev_walk_all_upper_dev_rcu(struct net_device *dev, int (*fn)(struct net_device *upper_dev, struct netdev_nested_priv *priv), struct netdev_nested_priv *priv); bool netdev_has_upper_dev_all_rcu(struct net_device *dev, struct net_device *upper_dev); bool netdev_has_any_upper_dev(struct net_device *dev); void *netdev_lower_get_next_private(struct net_device *dev, struct list_head **iter); void *netdev_lower_get_next_private_rcu(struct net_device *dev, struct list_head **iter); #define netdev_for_each_lower_private(dev, priv, iter) \ for (iter = (dev)->adj_list.lower.next, \ priv = netdev_lower_get_next_private(dev, &(iter)); \ priv; \ priv = netdev_lower_get_next_private(dev, &(iter))) #define netdev_for_each_lower_private_rcu(dev, priv, iter) \ for (iter = &(dev)->adj_list.lower, \ priv = netdev_lower_get_next_private_rcu(dev, &(iter)); \ priv; \ priv = netdev_lower_get_next_private_rcu(dev, &(iter))) void *netdev_lower_get_next(struct net_device *dev, struct list_head **iter); #define netdev_for_each_lower_dev(dev, ldev, iter) \ for (iter = (dev)->adj_list.lower.next, \ ldev = netdev_lower_get_next(dev, &(iter)); \ ldev; \ ldev = netdev_lower_get_next(dev, &(iter))) struct net_device *netdev_next_lower_dev_rcu(struct net_device *dev, struct list_head **iter); int netdev_walk_all_lower_dev(struct net_device *dev, int (*fn)(struct net_device *lower_dev, struct netdev_nested_priv *priv), struct netdev_nested_priv *priv); int netdev_walk_all_lower_dev_rcu(struct net_device *dev, int (*fn)(struct net_device *lower_dev, struct netdev_nested_priv *priv), struct netdev_nested_priv *priv); void *netdev_adjacent_get_private(struct list_head *adj_list); void *netdev_lower_get_first_private_rcu(struct net_device *dev); struct net_device *netdev_master_upper_dev_get(struct net_device *dev); struct net_device *netdev_master_upper_dev_get_rcu(struct net_device *dev); int netdev_upper_dev_link(struct net_device *dev, struct net_device *upper_dev, struct netlink_ext_ack *extack); int netdev_master_upper_dev_link(struct net_device *dev, struct net_device *upper_dev, void *upper_priv, void *upper_info, struct netlink_ext_ack *extack); void netdev_upper_dev_unlink(struct net_device *dev, struct net_device *upper_dev); int netdev_adjacent_change_prepare(struct net_device *old_dev, struct net_device *new_dev, struct net_device *dev, struct netlink_ext_ack *extack); void netdev_adjacent_change_commit(struct net_device *old_dev, struct net_device *new_dev, struct net_device *dev); void netdev_adjacent_change_abort(struct net_device *old_dev, struct net_device *new_dev, struct net_device *dev); void netdev_adjacent_rename_links(struct net_device *dev, char *oldname); void *netdev_lower_dev_get_private(struct net_device *dev, struct net_device *lower_dev); void netdev_lower_state_changed(struct net_device *lower_dev, void *lower_state_info); /* RSS keys are 40 or 52 bytes long */ #define NETDEV_RSS_KEY_LEN 52 extern u8 netdev_rss_key[NETDEV_RSS_KEY_LEN] __read_mostly; void netdev_rss_key_fill(void *buffer, size_t len); int skb_checksum_help(struct sk_buff *skb); int skb_crc32c_csum_help(struct sk_buff *skb); int skb_csum_hwoffload_help(struct sk_buff *skb, const netdev_features_t features); struct sk_buff *__skb_gso_segment(struct sk_buff *skb, netdev_features_t features, bool tx_path); struct sk_buff *skb_mac_gso_segment(struct sk_buff *skb, netdev_features_t features); struct netdev_bonding_info { ifslave slave; ifbond master; }; struct netdev_notifier_bonding_info { struct netdev_notifier_info info; /* must be first */ struct netdev_bonding_info bonding_info; }; void netdev_bonding_info_change(struct net_device *dev, struct netdev_bonding_info *bonding_info); #if IS_ENABLED(CONFIG_ETHTOOL_NETLINK) void ethtool_notify(struct net_device *dev, unsigned int cmd, const void *data); #else static inline void ethtool_notify(struct net_device *dev, unsigned int cmd, const void *data) { } #endif static inline struct sk_buff *skb_gso_segment(struct sk_buff *skb, netdev_features_t features) { return __skb_gso_segment(skb, features, true); } __be16 skb_network_protocol(struct sk_buff *skb, int *depth); static inline bool can_checksum_protocol(netdev_features_t features, __be16 protocol) { if (protocol == htons(ETH_P_FCOE)) return !!(features & NETIF_F_FCOE_CRC); /* Assume this is an IP checksum (not SCTP CRC) */ if (features & NETIF_F_HW_CSUM) { /* Can checksum everything */ return true; } switch (protocol) { case htons(ETH_P_IP): return !!(features & NETIF_F_IP_CSUM); case htons(ETH_P_IPV6): return !!(features & NETIF_F_IPV6_CSUM); default: return false; } } #ifdef CONFIG_BUG void netdev_rx_csum_fault(struct net_device *dev, struct sk_buff *skb); #else static inline void netdev_rx_csum_fault(struct net_device *dev, struct sk_buff *skb) { } #endif /* rx skb timestamps */ void net_enable_timestamp(void); void net_disable_timestamp(void); #ifdef CONFIG_PROC_FS int __init dev_proc_init(void); #else #define dev_proc_init() 0 #endif static inline netdev_tx_t __netdev_start_xmit(const struct net_device_ops *ops, struct sk_buff *skb, struct net_device *dev, bool more) { __this_cpu_write(softnet_data.xmit.more, more); return ops->ndo_start_xmit(skb, dev); } static inline bool netdev_xmit_more(void) { return __this_cpu_read(softnet_data.xmit.more); } static inline netdev_tx_t netdev_start_xmit(struct sk_buff *skb, struct net_device *dev, struct netdev_queue *txq, bool more) { const struct net_device_ops *ops = dev->netdev_ops; netdev_tx_t rc; rc = __netdev_start_xmit(ops, skb, dev, more); if (rc == NETDEV_TX_OK) txq_trans_update(txq); return rc; } int netdev_class_create_file_ns(const struct class_attribute *class_attr, const void *ns); void netdev_class_remove_file_ns(const struct class_attribute *class_attr, const void *ns); extern const struct kobj_ns_type_operations net_ns_type_operations; const char *netdev_drivername(const struct net_device *dev); void linkwatch_run_queue(void); static inline netdev_features_t netdev_intersect_features(netdev_features_t f1, netdev_features_t f2) { if ((f1 ^ f2) & NETIF_F_HW_CSUM) { if (f1 & NETIF_F_HW_CSUM) f1 |= (NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM); else f2 |= (NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM); } return f1 & f2; } static inline netdev_features_t netdev_get_wanted_features( struct net_device *dev) { return (dev->features & ~dev->hw_features) | dev->wanted_features; } netdev_features_t netdev_increment_features(netdev_features_t all, netdev_features_t one, netdev_features_t mask); /* Allow TSO being used on stacked device : * Performing the GSO segmentation before last device * is a performance improvement. */ static inline netdev_features_t netdev_add_tso_features(netdev_features_t features, netdev_features_t mask) { return netdev_increment_features(features, NETIF_F_ALL_TSO | NETIF_F_ALL_FOR_ALL, mask); } int __netdev_update_features(struct net_device *dev); void netdev_update_features(struct net_device *dev); void netdev_change_features(struct net_device *dev); void netif_stacked_transfer_operstate(const struct net_device *rootdev, struct net_device *dev); netdev_features_t passthru_features_check(struct sk_buff *skb, struct net_device *dev, netdev_features_t features); netdev_features_t netif_skb_features(struct sk_buff *skb); static inline bool net_gso_ok(netdev_features_t features, int gso_type) { netdev_features_t feature = (netdev_features_t)gso_type << NETIF_F_GSO_SHIFT; /* check flags correspondence */ BUILD_BUG_ON(SKB_GSO_TCPV4 != (NETIF_F_TSO >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_DODGY != (NETIF_F_GSO_ROBUST >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_TCP_ECN != (NETIF_F_TSO_ECN >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_TCP_FIXEDID != (NETIF_F_TSO_MANGLEID >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_TCPV6 != (NETIF_F_TSO6 >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_FCOE != (NETIF_F_FSO >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_GRE != (NETIF_F_GSO_GRE >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_GRE_CSUM != (NETIF_F_GSO_GRE_CSUM >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_IPXIP4 != (NETIF_F_GSO_IPXIP4 >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_IPXIP6 != (NETIF_F_GSO_IPXIP6 >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_UDP_TUNNEL != (NETIF_F_GSO_UDP_TUNNEL >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_UDP_TUNNEL_CSUM != (NETIF_F_GSO_UDP_TUNNEL_CSUM >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_PARTIAL != (NETIF_F_GSO_PARTIAL >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_TUNNEL_REMCSUM != (NETIF_F_GSO_TUNNEL_REMCSUM >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_SCTP != (NETIF_F_GSO_SCTP >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_ESP != (NETIF_F_GSO_ESP >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_UDP != (NETIF_F_GSO_UDP >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_UDP_L4 != (NETIF_F_GSO_UDP_L4 >> NETIF_F_GSO_SHIFT)); BUILD_BUG_ON(SKB_GSO_FRAGLIST != (NETIF_F_GSO_FRAGLIST >> NETIF_F_GSO_SHIFT)); return (features & feature) == feature; } static inline bool skb_gso_ok(struct sk_buff *skb, netdev_features_t features) { return net_gso_ok(features, skb_shinfo(skb)->gso_type) && (!skb_has_frag_list(skb) || (features & NETIF_F_FRAGLIST)); } static inline bool netif_needs_gso(struct sk_buff *skb, netdev_features_t features) { return skb_is_gso(skb) && (!skb_gso_ok(skb, features) || unlikely((skb->ip_summed != CHECKSUM_PARTIAL) && (skb->ip_summed != CHECKSUM_UNNECESSARY))); } static inline void netif_set_gso_max_size(struct net_device *dev, unsigned int size) { dev->gso_max_size = size; } static inline void skb_gso_error_unwind(struct sk_buff *skb, __be16 protocol, int pulled_hlen, u16 mac_offset, int mac_len) { skb->protocol = protocol; skb->encapsulation = 1; skb_push(skb, pulled_hlen); skb_reset_transport_header(skb); skb->mac_header = mac_offset; skb->network_header = skb->mac_header + mac_len; skb->mac_len = mac_len; } static inline bool netif_is_macsec(const struct net_device *dev) { return dev->priv_flags & IFF_MACSEC; } static inline bool netif_is_macvlan(const struct net_device *dev) { return dev->priv_flags & IFF_MACVLAN; } static inline bool netif_is_macvlan_port(const struct net_device *dev) { return dev->priv_flags & IFF_MACVLAN_PORT; } static inline bool netif_is_bond_master(const struct net_device *dev) { return dev->flags & IFF_MASTER && dev->priv_flags & IFF_BONDING; } static inline bool netif_is_bond_slave(const struct net_device *dev) { return dev->flags & IFF_SLAVE && dev->priv_flags & IFF_BONDING; } static inline bool netif_supports_nofcs(struct net_device *dev) { return dev->priv_flags & IFF_SUPP_NOFCS; } static inline bool netif_has_l3_rx_handler(const struct net_device *dev) { return dev->priv_flags & IFF_L3MDEV_RX_HANDLER; } static inline bool netif_is_l3_master(const struct net_device *dev) { return dev->priv_flags & IFF_L3MDEV_MASTER; } static inline bool netif_is_l3_slave(const struct net_device *dev) { return dev->priv_flags & IFF_L3MDEV_SLAVE; } static inline int dev_sdif(const struct net_device *dev) { #ifdef CONFIG_NET_L3_MASTER_DEV if (netif_is_l3_slave(dev)) return dev->ifindex; #endif return 0; } static inline bool netif_is_bridge_master(const struct net_device *dev) { return dev->priv_flags & IFF_EBRIDGE; } static inline bool netif_is_bridge_port(const struct net_device *dev) { return dev->priv_flags & IFF_BRIDGE_PORT; } static inline bool netif_is_ovs_master(const struct net_device *dev) { return dev->priv_flags & IFF_OPENVSWITCH; } static inline bool netif_is_ovs_port(const struct net_device *dev) { return dev->priv_flags & IFF_OVS_DATAPATH; } static inline bool netif_is_any_bridge_port(const struct net_device *dev) { return netif_is_bridge_port(dev) || netif_is_ovs_port(dev); } static inline bool netif_is_team_master(const struct net_device *dev) { return dev->priv_flags & IFF_TEAM; } static inline bool netif_is_team_port(const struct net_device *dev) { return dev->priv_flags & IFF_TEAM_PORT; } static inline bool netif_is_lag_master(const struct net_device *dev) { return netif_is_bond_master(dev) || netif_is_team_master(dev); } static inline bool netif_is_lag_port(const struct net_device *dev) { return netif_is_bond_slave(dev) || netif_is_team_port(dev); } static inline bool netif_is_rxfh_configured(const struct net_device *dev) { return dev->priv_flags & IFF_RXFH_CONFIGURED; } static inline bool netif_is_failover(const struct net_device *dev) { return dev->priv_flags & IFF_FAILOVER; } static inline bool netif_is_failover_slave(const struct net_device *dev) { return dev->priv_flags & IFF_FAILOVER_SLAVE; } /* This device needs to keep skb dst for qdisc enqueue or ndo_start_xmit() */ static inline void netif_keep_dst(struct net_device *dev) { dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | IFF_XMIT_DST_RELEASE_PERM); } /* return true if dev can't cope with mtu frames that need vlan tag insertion */ static inline bool netif_reduces_vlan_mtu(struct net_device *dev) { /* TODO: reserve and use an additional IFF bit, if we get more users */ return dev->priv_flags & IFF_MACSEC; } extern struct pernet_operations __net_initdata loopback_net_ops; /* Logging, debugging and troubleshooting/diagnostic helpers. */ /* netdev_printk helpers, similar to dev_printk */ static inline const char *netdev_name(const struct net_device *dev) { if (!dev->name[0] || strchr(dev->name, '%')) return "(unnamed net_device)"; return dev->name; } static inline bool netdev_unregistering(const struct net_device *dev) { return dev->reg_state == NETREG_UNREGISTERING; } static inline const char *netdev_reg_state(const struct net_device *dev) { switch (dev->reg_state) { case NETREG_UNINITIALIZED: return " (uninitialized)"; case NETREG_REGISTERED: return ""; case NETREG_UNREGISTERING: return " (unregistering)"; case NETREG_UNREGISTERED: return " (unregistered)"; case NETREG_RELEASED: return " (released)"; case NETREG_DUMMY: return " (dummy)"; } WARN_ONCE(1, "%s: unknown reg_state %d\n", dev->name, dev->reg_state); return " (unknown)"; } __printf(3, 4) __cold void netdev_printk(const char *level, const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_emerg(const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_alert(const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_crit(const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_err(const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_warn(const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_notice(const struct net_device *dev, const char *format, ...); __printf(2, 3) __cold void netdev_info(const struct net_device *dev, const char *format, ...); #define netdev_level_once(level, dev, fmt, ...) \ do { \ static bool __print_once __read_mostly; \ \ if (!__print_once) { \ __print_once = true; \ netdev_printk(level, dev, fmt, ##__VA_ARGS__); \ } \ } while (0) #define netdev_emerg_once(dev, fmt, ...) \ netdev_level_once(KERN_EMERG, dev, fmt, ##__VA_ARGS__) #define netdev_alert_once(dev, fmt, ...) \ netdev_level_once(KERN_ALERT, dev, fmt, ##__VA_ARGS__) #define netdev_crit_once(dev, fmt, ...) \ netdev_level_once(KERN_CRIT, dev, fmt, ##__VA_ARGS__) #define netdev_err_once(dev, fmt, ...) \ netdev_level_once(KERN_ERR, dev, fmt, ##__VA_ARGS__) #define netdev_warn_once(dev, fmt, ...) \ netdev_level_once(KERN_WARNING, dev, fmt, ##__VA_ARGS__) #define netdev_notice_once(dev, fmt, ...) \ netdev_level_once(KERN_NOTICE, dev, fmt, ##__VA_ARGS__) #define netdev_info_once(dev, fmt, ...) \ netdev_level_once(KERN_INFO, dev, fmt, ##__VA_ARGS__) #define MODULE_ALIAS_NETDEV(device) \ MODULE_ALIAS("netdev-" device) #if defined(CONFIG_DYNAMIC_DEBUG) || \ (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE)) #define netdev_dbg(__dev, format, args...) \ do { \ dynamic_netdev_dbg(__dev, format, ##args); \ } while (0) #elif defined(DEBUG) #define netdev_dbg(__dev, format, args...) \ netdev_printk(KERN_DEBUG, __dev, format, ##args) #else #define netdev_dbg(__dev, format, args...) \ ({ \ if (0) \ netdev_printk(KERN_DEBUG, __dev, format, ##args); \ }) #endif #if defined(VERBOSE_DEBUG) #define netdev_vdbg netdev_dbg #else #define netdev_vdbg(dev, format, args...) \ ({ \ if (0) \ netdev_printk(KERN_DEBUG, dev, format, ##args); \ 0; \ }) #endif /* * netdev_WARN() acts like dev_printk(), but with the key difference * of using a WARN/WARN_ON to get the message out, including the * file/line information and a backtrace. */ #define netdev_WARN(dev, format, args...) \ WARN(1, "netdevice: %s%s: " format, netdev_name(dev), \ netdev_reg_state(dev), ##args) #define netdev_WARN_ONCE(dev, format, args...) \ WARN_ONCE(1, "netdevice: %s%s: " format, netdev_name(dev), \ netdev_reg_state(dev), ##args) /* netif printk helpers, similar to netdev_printk */ #define netif_printk(priv, type, level, dev, fmt, args...) \ do { \ if (netif_msg_##type(priv)) \ netdev_printk(level, (dev), fmt, ##args); \ } while (0) #define netif_level(level, priv, type, dev, fmt, args...) \ do { \ if (netif_msg_##type(priv)) \ netdev_##level(dev, fmt, ##args); \ } while (0) #define netif_emerg(priv, type, dev, fmt, args...) \ netif_level(emerg, priv, type, dev, fmt, ##args) #define netif_alert(priv, type, dev, fmt, args...) \ netif_level(alert, priv, type, dev, fmt, ##args) #define netif_crit(priv, type, dev, fmt, args...) \ netif_level(crit, priv, type, dev, fmt, ##args) #define netif_err(priv, type, dev, fmt, args...) \ netif_level(err, priv, type, dev, fmt, ##args) #define netif_warn(priv, type, dev, fmt, args...) \ netif_level(warn, priv, type, dev, fmt, ##args) #define netif_notice(priv, type, dev, fmt, args...) \ netif_level(notice, priv, type, dev, fmt, ##args) #define netif_info(priv, type, dev, fmt, args...) \ netif_level(info, priv, type, dev, fmt, ##args) #if defined(CONFIG_DYNAMIC_DEBUG) || \ (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE)) #define netif_dbg(priv, type, netdev, format, args...) \ do { \ if (netif_msg_##type(priv)) \ dynamic_netdev_dbg(netdev, format, ##args); \ } while (0) #elif defined(DEBUG) #define netif_dbg(priv, type, dev, format, args...) \ netif_printk(priv, type, KERN_DEBUG, dev, format, ##args) #else #define netif_dbg(priv, type, dev, format, args...) \ ({ \ if (0) \ netif_printk(priv, type, KERN_DEBUG, dev, format, ##args); \ 0; \ }) #endif /* if @cond then downgrade to debug, else print at @level */ #define netif_cond_dbg(priv, type, netdev, cond, level, fmt, args...) \ do { \ if (cond) \ netif_dbg(priv, type, netdev, fmt, ##args); \ else \ netif_ ## level(priv, type, netdev, fmt, ##args); \ } while (0) #if defined(VERBOSE_DEBUG) #define netif_vdbg netif_dbg #else #define netif_vdbg(priv, type, dev, format, args...) \ ({ \ if (0) \ netif_printk(priv, type, KERN_DEBUG, dev, format, ##args); \ 0; \ }) #endif /* * The list of packet types we will receive (as opposed to discard) * and the routines to invoke. * * Why 16. Because with 16 the only overlap we get on a hash of the * low nibble of the protocol value is RARP/SNAP/X.25. * * 0800 IP * 0001 802.3 * 0002 AX.25 * 0004 802.2 * 8035 RARP * 0005 SNAP * 0805 X.25 * 0806 ARP * 8137 IPX * 0009 Localtalk * 86DD IPv6 */ #define PTYPE_HASH_SIZE (16) #define PTYPE_HASH_MASK (PTYPE_HASH_SIZE - 1) extern struct list_head ptype_all __read_mostly; extern struct list_head ptype_base[PTYPE_HASH_SIZE] __read_mostly; extern struct net_device *blackhole_netdev; /* Note: Avoid these macros in fast path, prefer per-cpu or per-queue counters. */ #define DEV_STATS_INC(DEV, FIELD) atomic_long_inc(&(DEV)->stats.__##FIELD) #define DEV_STATS_ADD(DEV, FIELD, VAL) \ atomic_long_add((VAL), &(DEV)->stats.__##FIELD) #define DEV_STATS_READ(DEV, FIELD) atomic_long_read(&(DEV)->stats.__##FIELD) #endif /* _LINUX_NETDEVICE_H */ PK ! ��C� fs_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FS_TYPES_H #define _LINUX_FS_TYPES_H /* * This is a header for the common implementation of dirent * to fs on-disk file type conversion. Although the fs on-disk * bits are specific to every file system, in practice, many * file systems use the exact same on-disk format to describe * the lower 3 file type bits that represent the 7 POSIX file * types. * * It is important to note that the definitions in this * header MUST NOT change. This would break both the * userspace ABI and the on-disk format of filesystems * using this code. * * All those file systems can use this generic code for the * conversions. */ /* * struct dirent file types * exposed to user via getdents(2), readdir(3) * * These match bits 12..15 of stat.st_mode * (ie "(i_mode >> 12) & 15"). */ #define S_DT_SHIFT 12 #define S_DT(mode) (((mode) & S_IFMT) >> S_DT_SHIFT) #define S_DT_MASK (S_IFMT >> S_DT_SHIFT) /* these are defined by POSIX and also present in glibc's dirent.h */ #define DT_UNKNOWN 0 #define DT_FIFO 1 #define DT_CHR 2 #define DT_DIR 4 #define DT_BLK 6 #define DT_REG 8 #define DT_LNK 10 #define DT_SOCK 12 #define DT_WHT 14 #define DT_MAX (S_DT_MASK + 1) /* 16 */ /* * fs on-disk file types. * Only the low 3 bits are used for the POSIX file types. * Other bits are reserved for fs private use. * These definitions are shared and used by multiple filesystems, * and MUST NOT change under any circumstances. * * Note that no fs currently stores the whiteout type on-disk, * so whiteout dirents are exposed to user as DT_CHR. */ #define FT_UNKNOWN 0 #define FT_REG_FILE 1 #define FT_DIR 2 #define FT_CHRDEV 3 #define FT_BLKDEV 4 #define FT_FIFO 5 #define FT_SOCK 6 #define FT_SYMLINK 7 #define FT_MAX 8 /* * declarations for helper functions, accompanying implementation * is in fs/fs_types.c */ extern unsigned char fs_ftype_to_dtype(unsigned int filetype); extern unsigned char fs_umode_to_ftype(umode_t mode); extern unsigned char fs_umode_to_dtype(umode_t mode); #endif PK ! � � � bpf_lirc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _BPF_LIRC_H #define _BPF_LIRC_H #include <uapi/linux/bpf.h> #ifdef CONFIG_BPF_LIRC_MODE2 int lirc_prog_attach(const union bpf_attr *attr, struct bpf_prog *prog); int lirc_prog_detach(const union bpf_attr *attr); int lirc_prog_query(const union bpf_attr *attr, union bpf_attr __user *uattr); #else static inline int lirc_prog_attach(const union bpf_attr *attr, struct bpf_prog *prog) { return -EINVAL; } static inline int lirc_prog_detach(const union bpf_attr *attr) { return -EINVAL; } static inline int lirc_prog_query(const union bpf_attr *attr, union bpf_attr __user *uattr) { return -EINVAL; } #endif #endif /* _BPF_LIRC_H */ PK ! Zz��� � atmel-mci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_ATMEL_MCI_H #define __LINUX_ATMEL_MCI_H #include <linux/types.h> #include <linux/dmaengine.h> #define ATMCI_MAX_NR_SLOTS 2 /** * struct mci_slot_pdata - board-specific per-slot configuration * @bus_width: Number of data lines wired up the slot * @detect_pin: GPIO pin wired to the card detect switch * @wp_pin: GPIO pin wired to the write protect sensor * @detect_is_active_high: The state of the detect pin when it is active * @non_removable: The slot is not removable, only detect once * * If a given slot is not present on the board, @bus_width should be * set to 0. The other fields are ignored in this case. * * Any pins that aren't available should be set to a negative value. * * Note that support for multiple slots is experimental -- some cards * might get upset if we don't get the clock management exactly right. * But in most cases, it should work just fine. */ struct mci_slot_pdata { unsigned int bus_width; int detect_pin; int wp_pin; bool detect_is_active_high; bool non_removable; }; /** * struct mci_platform_data - board-specific MMC/SDcard configuration * @dma_slave: DMA slave interface to use in data transfers. * @slot: Per-slot configuration data. */ struct mci_platform_data { void *dma_slave; dma_filter_fn dma_filter; struct mci_slot_pdata slot[ATMCI_MAX_NR_SLOTS]; }; #endif /* __LINUX_ATMEL_MCI_H */ PK ! �1s't t ipv6_route.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Linux INET6 implementation * * Authors: * Pedro Roque <roque@di.fc.ul.pt> */ #ifndef _LINUX_IPV6_ROUTE_H #define _LINUX_IPV6_ROUTE_H #include <uapi/linux/ipv6_route.h> #define IPV6_EXTRACT_PREF(flag) (((flag) & RTF_PREF_MASK) >> 27) #define IPV6_DECODE_PREF(pref) ((pref) ^ 2) /* 1:low,2:med,3:high */ #endif PK ! � x>6 >6 netfilter.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_NETFILTER_H #define __LINUX_NETFILTER_H #include <linux/init.h> #include <linux/skbuff.h> #include <linux/net.h> #include <linux/if.h> #include <linux/in.h> #include <linux/in6.h> #include <linux/wait.h> #include <linux/list.h> #include <linux/static_key.h> #include <linux/netfilter_defs.h> #include <linux/netdevice.h> #include <linux/sockptr.h> #include <net/net_namespace.h> static inline int NF_DROP_GETERR(int verdict) { return -(verdict >> NF_VERDICT_QBITS); } static inline int nf_inet_addr_cmp(const union nf_inet_addr *a1, const union nf_inet_addr *a2) { #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) && BITS_PER_LONG == 64 const unsigned long *ul1 = (const unsigned long *)a1; const unsigned long *ul2 = (const unsigned long *)a2; return ((ul1[0] ^ ul2[0]) | (ul1[1] ^ ul2[1])) == 0UL; #else return a1->all[0] == a2->all[0] && a1->all[1] == a2->all[1] && a1->all[2] == a2->all[2] && a1->all[3] == a2->all[3]; #endif } static inline void nf_inet_addr_mask(const union nf_inet_addr *a1, union nf_inet_addr *result, const union nf_inet_addr *mask) { #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) && BITS_PER_LONG == 64 const unsigned long *ua = (const unsigned long *)a1; unsigned long *ur = (unsigned long *)result; const unsigned long *um = (const unsigned long *)mask; ur[0] = ua[0] & um[0]; ur[1] = ua[1] & um[1]; #else result->all[0] = a1->all[0] & mask->all[0]; result->all[1] = a1->all[1] & mask->all[1]; result->all[2] = a1->all[2] & mask->all[2]; result->all[3] = a1->all[3] & mask->all[3]; #endif } int netfilter_init(void); struct sk_buff; struct nf_hook_ops; struct sock; struct nf_hook_state { u8 hook; u8 pf; struct net_device *in; struct net_device *out; struct sock *sk; struct net *net; int (*okfn)(struct net *, struct sock *, struct sk_buff *); }; typedef unsigned int nf_hookfn(void *priv, struct sk_buff *skb, const struct nf_hook_state *state); enum nf_hook_ops_type { NF_HOOK_OP_UNDEFINED, NF_HOOK_OP_NF_TABLES, }; struct nf_hook_ops { /* User fills in from here down. */ nf_hookfn *hook; struct net_device *dev; void *priv; u8 pf; enum nf_hook_ops_type hook_ops_type:8; unsigned int hooknum; /* Hooks are ordered in ascending priority. */ int priority; }; struct nf_hook_entry { nf_hookfn *hook; void *priv; }; struct nf_hook_entries_rcu_head { struct rcu_head head; void *allocation; }; struct nf_hook_entries { u16 num_hook_entries; /* padding */ struct nf_hook_entry hooks[]; /* trailer: pointers to original orig_ops of each hook, * followed by rcu_head and scratch space used for freeing * the structure via call_rcu. * * This is not part of struct nf_hook_entry since its only * needed in slow path (hook register/unregister): * const struct nf_hook_ops *orig_ops[] * * For the same reason, we store this at end -- its * only needed when a hook is deleted, not during * packet path processing: * struct nf_hook_entries_rcu_head head */ }; #ifdef CONFIG_NETFILTER static inline struct nf_hook_ops **nf_hook_entries_get_hook_ops(const struct nf_hook_entries *e) { unsigned int n = e->num_hook_entries; const void *hook_end; hook_end = &e->hooks[n]; /* this is *past* ->hooks[]! */ return (struct nf_hook_ops **)hook_end; } static inline int nf_hook_entry_hookfn(const struct nf_hook_entry *entry, struct sk_buff *skb, struct nf_hook_state *state) { return entry->hook(entry->priv, skb, state); } static inline void nf_hook_state_init(struct nf_hook_state *p, unsigned int hook, u_int8_t pf, struct net_device *indev, struct net_device *outdev, struct sock *sk, struct net *net, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { p->hook = hook; p->pf = pf; p->in = indev; p->out = outdev; p->sk = sk; p->net = net; p->okfn = okfn; } struct nf_sockopt_ops { struct list_head list; u_int8_t pf; /* Non-inclusive ranges: use 0/0/NULL to never get called. */ int set_optmin; int set_optmax; int (*set)(struct sock *sk, int optval, sockptr_t arg, unsigned int len); int get_optmin; int get_optmax; int (*get)(struct sock *sk, int optval, void __user *user, int *len); /* Use the module struct to lock set/get code in place */ struct module *owner; }; /* Function to register/unregister hook points. */ int nf_register_net_hook(struct net *net, const struct nf_hook_ops *ops); void nf_unregister_net_hook(struct net *net, const struct nf_hook_ops *ops); int nf_register_net_hooks(struct net *net, const struct nf_hook_ops *reg, unsigned int n); void nf_unregister_net_hooks(struct net *net, const struct nf_hook_ops *reg, unsigned int n); /* Functions to register get/setsockopt ranges (non-inclusive). You need to check permissions yourself! */ int nf_register_sockopt(struct nf_sockopt_ops *reg); void nf_unregister_sockopt(struct nf_sockopt_ops *reg); #ifdef CONFIG_JUMP_LABEL extern struct static_key nf_hooks_needed[NFPROTO_NUMPROTO][NF_MAX_HOOKS]; #endif int nf_hook_slow(struct sk_buff *skb, struct nf_hook_state *state, const struct nf_hook_entries *e, unsigned int i); void nf_hook_slow_list(struct list_head *head, struct nf_hook_state *state, const struct nf_hook_entries *e); /** * nf_hook - call a netfilter hook * * Returns 1 if the hook has allowed the packet to pass. The function * okfn must be invoked by the caller in this case. Any other return * value indicates the packet has been consumed by the hook. */ static inline int nf_hook(u_int8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb, struct net_device *indev, struct net_device *outdev, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { struct nf_hook_entries *hook_head = NULL; int ret = 1; #ifdef CONFIG_JUMP_LABEL if (__builtin_constant_p(pf) && __builtin_constant_p(hook) && !static_key_false(&nf_hooks_needed[pf][hook])) return 1; #endif rcu_read_lock(); switch (pf) { case NFPROTO_IPV4: hook_head = rcu_dereference(net->nf.hooks_ipv4[hook]); break; case NFPROTO_IPV6: hook_head = rcu_dereference(net->nf.hooks_ipv6[hook]); break; case NFPROTO_ARP: #ifdef CONFIG_NETFILTER_FAMILY_ARP if (WARN_ON_ONCE(hook >= ARRAY_SIZE(net->nf.hooks_arp))) break; hook_head = rcu_dereference(net->nf.hooks_arp[hook]); #endif break; case NFPROTO_BRIDGE: #ifdef CONFIG_NETFILTER_FAMILY_BRIDGE hook_head = rcu_dereference(net->nf.hooks_bridge[hook]); #endif break; default: WARN_ON_ONCE(1); break; } if (hook_head) { struct nf_hook_state state; nf_hook_state_init(&state, hook, pf, indev, outdev, sk, net, okfn); ret = nf_hook_slow(skb, &state, hook_head, 0); } rcu_read_unlock(); return ret; } /* Activate hook; either okfn or kfree_skb called, unless a hook returns NF_STOLEN (in which case, it's up to the hook to deal with the consequences). Returns -ERRNO if packet dropped. Zero means queued, stolen or accepted. */ /* RR: > I don't want nf_hook to return anything because people might forget > about async and trust the return value to mean "packet was ok". AK: Just document it clearly, then you can expect some sense from kernel coders :) */ static inline int NF_HOOK_COND(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb, struct net_device *in, struct net_device *out, int (*okfn)(struct net *, struct sock *, struct sk_buff *), bool cond) { int ret; if (!cond || ((ret = nf_hook(pf, hook, net, sk, skb, in, out, okfn)) == 1)) ret = okfn(net, sk, skb); return ret; } static inline int NF_HOOK(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb, struct net_device *in, struct net_device *out, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { int ret = nf_hook(pf, hook, net, sk, skb, in, out, okfn); if (ret == 1) ret = okfn(net, sk, skb); return ret; } static inline void NF_HOOK_LIST(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct list_head *head, struct net_device *in, struct net_device *out, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { struct nf_hook_entries *hook_head = NULL; #ifdef CONFIG_JUMP_LABEL if (__builtin_constant_p(pf) && __builtin_constant_p(hook) && !static_key_false(&nf_hooks_needed[pf][hook])) return; #endif rcu_read_lock(); switch (pf) { case NFPROTO_IPV4: hook_head = rcu_dereference(net->nf.hooks_ipv4[hook]); break; case NFPROTO_IPV6: hook_head = rcu_dereference(net->nf.hooks_ipv6[hook]); break; default: WARN_ON_ONCE(1); break; } if (hook_head) { struct nf_hook_state state; nf_hook_state_init(&state, hook, pf, in, out, sk, net, okfn); nf_hook_slow_list(head, &state, hook_head); } rcu_read_unlock(); } /* Call setsockopt() */ int nf_setsockopt(struct sock *sk, u_int8_t pf, int optval, sockptr_t opt, unsigned int len); int nf_getsockopt(struct sock *sk, u_int8_t pf, int optval, char __user *opt, int *len); struct flowi; struct nf_queue_entry; __sum16 nf_checksum(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, u_int8_t protocol, unsigned short family); __sum16 nf_checksum_partial(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, unsigned int len, u_int8_t protocol, unsigned short family); int nf_route(struct net *net, struct dst_entry **dst, struct flowi *fl, bool strict, unsigned short family); int nf_reroute(struct sk_buff *skb, struct nf_queue_entry *entry); #include <net/flow.h> struct nf_conn; enum nf_nat_manip_type; struct nlattr; enum ip_conntrack_dir; struct nf_nat_hook { int (*parse_nat_setup)(struct nf_conn *ct, enum nf_nat_manip_type manip, const struct nlattr *attr); void (*decode_session)(struct sk_buff *skb, struct flowi *fl); unsigned int (*manip_pkt)(struct sk_buff *skb, struct nf_conn *ct, enum nf_nat_manip_type mtype, enum ip_conntrack_dir dir); }; extern const struct nf_nat_hook __rcu *nf_nat_hook; static inline void nf_nat_decode_session(struct sk_buff *skb, struct flowi *fl, u_int8_t family) { #if IS_ENABLED(CONFIG_NF_NAT) const struct nf_nat_hook *nat_hook; rcu_read_lock(); nat_hook = rcu_dereference(nf_nat_hook); if (nat_hook && nat_hook->decode_session) nat_hook->decode_session(skb, fl); rcu_read_unlock(); #endif } #else /* !CONFIG_NETFILTER */ static inline int NF_HOOK_COND(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb, struct net_device *in, struct net_device *out, int (*okfn)(struct net *, struct sock *, struct sk_buff *), bool cond) { return okfn(net, sk, skb); } static inline int NF_HOOK(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb, struct net_device *in, struct net_device *out, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { return okfn(net, sk, skb); } static inline void NF_HOOK_LIST(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct list_head *head, struct net_device *in, struct net_device *out, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { /* nothing to do */ } static inline int nf_hook(u_int8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb, struct net_device *indev, struct net_device *outdev, int (*okfn)(struct net *, struct sock *, struct sk_buff *)) { return 1; } struct flowi; static inline void nf_nat_decode_session(struct sk_buff *skb, struct flowi *fl, u_int8_t family) { } #endif /*CONFIG_NETFILTER*/ #if IS_ENABLED(CONFIG_NF_CONNTRACK) #include <linux/netfilter/nf_conntrack_zones_common.h> void nf_ct_attach(struct sk_buff *, const struct sk_buff *); void nf_ct_set_closing(struct nf_conntrack *nfct); struct nf_conntrack_tuple; bool nf_ct_get_tuple_skb(struct nf_conntrack_tuple *dst_tuple, const struct sk_buff *skb); #else static inline void nf_ct_attach(struct sk_buff *new, struct sk_buff *skb) {} static inline void nf_ct_set_closing(struct nf_conntrack *nfct) {} struct nf_conntrack_tuple; static inline bool nf_ct_get_tuple_skb(struct nf_conntrack_tuple *dst_tuple, const struct sk_buff *skb) { return false; } #endif struct nf_conn; enum ip_conntrack_info; struct nf_ct_hook { int (*update)(struct net *net, struct sk_buff *skb); void (*destroy)(struct nf_conntrack *); bool (*get_tuple_skb)(struct nf_conntrack_tuple *, const struct sk_buff *); void (*attach)(struct sk_buff *nskb, const struct sk_buff *skb); void (*set_closing)(struct nf_conntrack *nfct); int (*confirm)(struct sk_buff *skb); }; extern const struct nf_ct_hook __rcu *nf_ct_hook; struct nlattr; struct nfnl_ct_hook { size_t (*build_size)(const struct nf_conn *ct); int (*build)(struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, u_int16_t ct_attr, u_int16_t ct_info_attr); int (*parse)(const struct nlattr *attr, struct nf_conn *ct); int (*attach_expect)(const struct nlattr *attr, struct nf_conn *ct, u32 portid, u32 report); void (*seq_adjust)(struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, s32 off); }; extern const struct nfnl_ct_hook __rcu *nfnl_ct_hook; /** * nf_skb_duplicated - TEE target has sent a packet * * When a xtables target sends a packet, the OUTPUT and POSTROUTING * hooks are traversed again, i.e. nft and xtables are invoked recursively. * * This is used by xtables TEE target to prevent the duplicated skb from * being duplicated again. */ DECLARE_PER_CPU(bool, nf_skb_duplicated); #endif /*__LINUX_NETFILTER_H*/ PK ! � 1" 1" backing-dev-defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_BACKING_DEV_DEFS_H #define __LINUX_BACKING_DEV_DEFS_H #include <linux/list.h> #include <linux/radix-tree.h> #include <linux/rbtree.h> #include <linux/spinlock.h> #include <linux/percpu_counter.h> #include <linux/percpu-refcount.h> #include <linux/flex_proportions.h> #include <linux/timer.h> #include <linux/workqueue.h> #include <linux/kref.h> #include <linux/refcount.h> struct page; struct device; struct dentry; /* * Bits in bdi_writeback.state */ enum wb_state { WB_registered, /* bdi_register() was done */ WB_writeback_running, /* Writeback is in progress */ WB_has_dirty_io, /* Dirty inodes on ->b_{dirty|io|more_io} */ WB_start_all, /* nr_pages == 0 (all) work pending */ }; enum wb_congested_state { WB_async_congested, /* The async (write) queue is getting full */ WB_sync_congested, /* The sync queue is getting full */ }; enum wb_stat_item { WB_RECLAIMABLE, WB_WRITEBACK, WB_DIRTIED, WB_WRITTEN, NR_WB_STAT_ITEMS }; #define WB_STAT_BATCH (8*(1+ilog2(nr_cpu_ids))) /* * why some writeback work was initiated */ enum wb_reason { WB_REASON_BACKGROUND, WB_REASON_VMSCAN, WB_REASON_SYNC, WB_REASON_PERIODIC, WB_REASON_LAPTOP_TIMER, WB_REASON_FS_FREE_SPACE, /* * There is no bdi forker thread any more and works are done * by emergency worker, however, this is TPs userland visible * and we'll be exposing exactly the same information, * so it has a mismatch name. */ WB_REASON_FORKER_THREAD, WB_REASON_FOREIGN_FLUSH, WB_REASON_MAX, }; struct wb_completion { atomic_t cnt; wait_queue_head_t *waitq; }; #define __WB_COMPLETION_INIT(_waitq) \ (struct wb_completion){ .cnt = ATOMIC_INIT(1), .waitq = (_waitq) } /* * If one wants to wait for one or more wb_writeback_works, each work's * ->done should be set to a wb_completion defined using the following * macro. Once all work items are issued with wb_queue_work(), the caller * can wait for the completion of all using wb_wait_for_completion(). Work * items which are waited upon aren't freed automatically on completion. */ #define WB_COMPLETION_INIT(bdi) __WB_COMPLETION_INIT(&(bdi)->wb_waitq) #define DEFINE_WB_COMPLETION(cmpl, bdi) \ struct wb_completion cmpl = WB_COMPLETION_INIT(bdi) /* * Each wb (bdi_writeback) can perform writeback operations, is measured * and throttled, independently. Without cgroup writeback, each bdi * (bdi_writeback) is served by its embedded bdi->wb. * * On the default hierarchy, blkcg implicitly enables memcg. This allows * using memcg's page ownership for attributing writeback IOs, and every * memcg - blkcg combination can be served by its own wb by assigning a * dedicated wb to each memcg, which enables isolation across different * cgroups and propagation of IO back pressure down from the IO layer upto * the tasks which are generating the dirty pages to be written back. * * A cgroup wb is indexed on its bdi by the ID of the associated memcg, * refcounted with the number of inodes attached to it, and pins the memcg * and the corresponding blkcg. As the corresponding blkcg for a memcg may * change as blkcg is disabled and enabled higher up in the hierarchy, a wb * is tested for blkcg after lookup and removed from index on mismatch so * that a new wb for the combination can be created. */ struct bdi_writeback { struct backing_dev_info *bdi; /* our parent bdi */ unsigned long state; /* Always use atomic bitops on this */ unsigned long last_old_flush; /* last old data flush */ struct list_head b_dirty; /* dirty inodes */ struct list_head b_io; /* parked for writeback */ struct list_head b_more_io; /* parked for more writeback */ struct list_head b_dirty_time; /* time stamps are dirty */ spinlock_t list_lock; /* protects the b_* lists */ atomic_t writeback_inodes; /* number of inodes under writeback */ struct percpu_counter stat[NR_WB_STAT_ITEMS]; unsigned long congested; /* WB_[a]sync_congested flags */ unsigned long bw_time_stamp; /* last time write bw is updated */ unsigned long dirtied_stamp; unsigned long written_stamp; /* pages written at bw_time_stamp */ unsigned long write_bandwidth; /* the estimated write bandwidth */ unsigned long avg_write_bandwidth; /* further smoothed write bw, > 0 */ /* * The base dirty throttle rate, re-calculated on every 200ms. * All the bdi tasks' dirty rate will be curbed under it. * @dirty_ratelimit tracks the estimated @balanced_dirty_ratelimit * in small steps and is much more smooth/stable than the latter. */ unsigned long dirty_ratelimit; unsigned long balanced_dirty_ratelimit; struct fprop_local_percpu completions; int dirty_exceeded; enum wb_reason start_all_reason; spinlock_t work_lock; /* protects work_list & dwork scheduling */ struct list_head work_list; struct delayed_work dwork; /* work item used for writeback */ struct delayed_work bw_dwork; /* work item used for bandwidth estimate */ unsigned long dirty_sleep; /* last wait */ struct list_head bdi_node; /* anchored at bdi->wb_list */ #ifdef CONFIG_CGROUP_WRITEBACK struct percpu_ref refcnt; /* used only for !root wb's */ struct fprop_local_percpu memcg_completions; struct cgroup_subsys_state *memcg_css; /* the associated memcg */ struct cgroup_subsys_state *blkcg_css; /* and blkcg */ struct list_head memcg_node; /* anchored at memcg->cgwb_list */ struct list_head blkcg_node; /* anchored at blkcg->cgwb_list */ struct list_head b_attached; /* attached inodes, protected by list_lock */ struct list_head offline_node; /* anchored at offline_cgwbs */ union { struct work_struct release_work; struct rcu_head rcu; }; #endif }; struct backing_dev_info { u64 id; struct rb_node rb_node; /* keyed by ->id */ struct list_head bdi_list; unsigned long ra_pages; /* max readahead in PAGE_SIZE units */ unsigned long io_pages; /* max allowed IO size */ struct kref refcnt; /* Reference counter for the structure */ unsigned int capabilities; /* Device capabilities */ unsigned int min_ratio; unsigned int max_ratio, max_prop_frac; /* * Sum of avg_write_bw of wbs with dirty inodes. > 0 if there are * any dirty wbs, which is depended upon by bdi_has_dirty(). */ atomic_long_t tot_write_bandwidth; struct bdi_writeback wb; /* the root writeback info for this bdi */ struct list_head wb_list; /* list of all wbs */ #ifdef CONFIG_CGROUP_WRITEBACK struct radix_tree_root cgwb_tree; /* radix tree of active cgroup wbs */ struct mutex cgwb_release_mutex; /* protect shutdown of wb structs */ struct rw_semaphore wb_switch_rwsem; /* no cgwb switch while syncing */ #endif wait_queue_head_t wb_waitq; struct device *dev; char dev_name[64]; struct device *owner; struct timer_list laptop_mode_wb_timer; #ifdef CONFIG_DEBUG_FS struct dentry *debug_dir; #endif }; enum { BLK_RW_ASYNC = 0, BLK_RW_SYNC = 1, }; void clear_bdi_congested(struct backing_dev_info *bdi, int sync); void set_bdi_congested(struct backing_dev_info *bdi, int sync); struct wb_lock_cookie { bool locked; unsigned long flags; }; #ifdef CONFIG_CGROUP_WRITEBACK /** * wb_tryget - try to increment a wb's refcount * @wb: bdi_writeback to get */ static inline bool wb_tryget(struct bdi_writeback *wb) { if (wb != &wb->bdi->wb) return percpu_ref_tryget(&wb->refcnt); return true; } /** * wb_get - increment a wb's refcount * @wb: bdi_writeback to get */ static inline void wb_get(struct bdi_writeback *wb) { if (wb != &wb->bdi->wb) percpu_ref_get(&wb->refcnt); } /** * wb_put - decrement a wb's refcount * @wb: bdi_writeback to put * @nr: number of references to put */ static inline void wb_put_many(struct bdi_writeback *wb, unsigned long nr) { if (WARN_ON_ONCE(!wb->bdi)) { /* * A driver bug might cause a file to be removed before bdi was * initialized. */ return; } if (wb != &wb->bdi->wb) percpu_ref_put_many(&wb->refcnt, nr); } /** * wb_put - decrement a wb's refcount * @wb: bdi_writeback to put */ static inline void wb_put(struct bdi_writeback *wb) { wb_put_many(wb, 1); } /** * wb_dying - is a wb dying? * @wb: bdi_writeback of interest * * Returns whether @wb is unlinked and being drained. */ static inline bool wb_dying(struct bdi_writeback *wb) { return percpu_ref_is_dying(&wb->refcnt); } #else /* CONFIG_CGROUP_WRITEBACK */ static inline bool wb_tryget(struct bdi_writeback *wb) { return true; } static inline void wb_get(struct bdi_writeback *wb) { } static inline void wb_put(struct bdi_writeback *wb) { } static inline void wb_put_many(struct bdi_writeback *wb, unsigned long nr) { } static inline bool wb_dying(struct bdi_writeback *wb) { return false; } #endif /* CONFIG_CGROUP_WRITEBACK */ #endif /* __LINUX_BACKING_DEV_DEFS_H */ PK ! ����� � hidden.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * When building position independent code with GCC using the -fPIC option, * (or even the -fPIE one on older versions), it will assume that we are * building a dynamic object (either a shared library or an executable) that * may have symbol references that can only be resolved at load time. For a * variety of reasons (ELF symbol preemption, the CoW footprint of the section * that is modified by the loader), this results in all references to symbols * with external linkage to go via entries in the Global Offset Table (GOT), * which carries absolute addresses which need to be fixed up when the * executable image is loaded at an offset which is different from its link * time offset. * * Fortunately, there is a way to inform the compiler that such symbol * references will be satisfied at link time rather than at load time, by * giving them 'hidden' visibility. */ #pragma GCC visibility push(hidden) PK ! �uK e e byteorder/little_endian.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H #define _LINUX_BYTEORDER_LITTLE_ENDIAN_H #include <uapi/linux/byteorder/little_endian.h> #ifdef CONFIG_CPU_BIG_ENDIAN #warning inconsistent configuration, CONFIG_CPU_BIG_ENDIAN is set #endif #include <linux/byteorder/generic.h> #endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ PK ! `1�GY Y byteorder/big_endian.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H #define _LINUX_BYTEORDER_BIG_ENDIAN_H #include <uapi/linux/byteorder/big_endian.h> #ifndef CONFIG_CPU_BIG_ENDIAN #warning inconsistent configuration, needs CONFIG_CPU_BIG_ENDIAN #endif #include <linux/byteorder/generic.h> #endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ PK ! �&��t t byteorder/generic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BYTEORDER_GENERIC_H #define _LINUX_BYTEORDER_GENERIC_H /* * linux/byteorder/generic.h * Generic Byte-reordering support * * The "... p" macros, like le64_to_cpup, can be used with pointers * to unaligned data, but there will be a performance penalty on * some architectures. Use get_unaligned for unaligned data. * * Francois-Rene Rideau <fare@tunes.org> 19970707 * gathered all the good ideas from all asm-foo/byteorder.h into one file, * cleaned them up. * I hope it is compliant with non-GCC compilers. * I decided to put __BYTEORDER_HAS_U64__ in byteorder.h, * because I wasn't sure it would be ok to put it in types.h * Upgraded it to 2.1.43 * Francois-Rene Rideau <fare@tunes.org> 19971012 * Upgraded it to 2.1.57 * to please Linus T., replaced huge #ifdef's between little/big endian * by nestedly #include'd files. * Francois-Rene Rideau <fare@tunes.org> 19971205 * Made it to 2.1.71; now a facelift: * Put files under include/linux/byteorder/ * Split swab from generic support. * * TODO: * = Regular kernel maintainers could also replace all these manual * byteswap macros that remain, disseminated among drivers, * after some grep or the sources... * = Linus might want to rename all these macros and files to fit his taste, * to fit his personal naming scheme. * = it seems that a few drivers would also appreciate * nybble swapping support... * = every architecture could add their byteswap macro in asm/byteorder.h * see how some architectures already do (i386, alpha, ppc, etc) * = cpu_to_beXX and beXX_to_cpu might some day need to be well * distinguished throughout the kernel. This is not the case currently, * since little endian, big endian, and pdp endian machines needn't it. * But this might be the case for, say, a port of Linux to 20/21 bit * architectures (and F21 Linux addict around?). */ /* * The following macros are to be defined by <asm/byteorder.h>: * * Conversion of long and short int between network and host format * ntohl(__u32 x) * ntohs(__u16 x) * htonl(__u32 x) * htons(__u16 x) * It seems that some programs (which? where? or perhaps a standard? POSIX?) * might like the above to be functions, not macros (why?). * if that's true, then detect them, and take measures. * Anyway, the measure is: define only ___ntohl as a macro instead, * and in a separate file, have * unsigned long inline ntohl(x){return ___ntohl(x);} * * The same for constant arguments * __constant_ntohl(__u32 x) * __constant_ntohs(__u16 x) * __constant_htonl(__u32 x) * __constant_htons(__u16 x) * * Conversion of XX-bit integers (16- 32- or 64-) * between native CPU format and little/big endian format * 64-bit stuff only defined for proper architectures * cpu_to_[bl]eXX(__uXX x) * [bl]eXX_to_cpu(__uXX x) * * The same, but takes a pointer to the value to convert * cpu_to_[bl]eXXp(__uXX x) * [bl]eXX_to_cpup(__uXX x) * * The same, but change in situ * cpu_to_[bl]eXXs(__uXX x) * [bl]eXX_to_cpus(__uXX x) * * See asm-foo/byteorder.h for examples of how to provide * architecture-optimized versions * */ #define cpu_to_le64 __cpu_to_le64 #define le64_to_cpu __le64_to_cpu #define cpu_to_le32 __cpu_to_le32 #define le32_to_cpu __le32_to_cpu #define cpu_to_le16 __cpu_to_le16 #define le16_to_cpu __le16_to_cpu #define cpu_to_be64 __cpu_to_be64 #define be64_to_cpu __be64_to_cpu #define cpu_to_be32 __cpu_to_be32 #define be32_to_cpu __be32_to_cpu #define cpu_to_be16 __cpu_to_be16 #define be16_to_cpu __be16_to_cpu #define cpu_to_le64p __cpu_to_le64p #define le64_to_cpup __le64_to_cpup #define cpu_to_le32p __cpu_to_le32p #define le32_to_cpup __le32_to_cpup #define cpu_to_le16p __cpu_to_le16p #define le16_to_cpup __le16_to_cpup #define cpu_to_be64p __cpu_to_be64p #define be64_to_cpup __be64_to_cpup #define cpu_to_be32p __cpu_to_be32p #define be32_to_cpup __be32_to_cpup #define cpu_to_be16p __cpu_to_be16p #define be16_to_cpup __be16_to_cpup #define cpu_to_le64s __cpu_to_le64s #define le64_to_cpus __le64_to_cpus #define cpu_to_le32s __cpu_to_le32s #define le32_to_cpus __le32_to_cpus #define cpu_to_le16s __cpu_to_le16s #define le16_to_cpus __le16_to_cpus #define cpu_to_be64s __cpu_to_be64s #define be64_to_cpus __be64_to_cpus #define cpu_to_be32s __cpu_to_be32s #define be32_to_cpus __be32_to_cpus #define cpu_to_be16s __cpu_to_be16s #define be16_to_cpus __be16_to_cpus /* * They have to be macros in order to do the constant folding * correctly - if the argument passed into a inline function * it is no longer constant according to gcc.. */ #undef ntohl #undef ntohs #undef htonl #undef htons #define ___htonl(x) __cpu_to_be32(x) #define ___htons(x) __cpu_to_be16(x) #define ___ntohl(x) __be32_to_cpu(x) #define ___ntohs(x) __be16_to_cpu(x) #define htonl(x) ___htonl(x) #define ntohl(x) ___ntohl(x) #define htons(x) ___htons(x) #define ntohs(x) ___ntohs(x) static inline void le16_add_cpu(__le16 *var, u16 val) { *var = cpu_to_le16(le16_to_cpu(*var) + val); } static inline void le32_add_cpu(__le32 *var, u32 val) { *var = cpu_to_le32(le32_to_cpu(*var) + val); } static inline void le64_add_cpu(__le64 *var, u64 val) { *var = cpu_to_le64(le64_to_cpu(*var) + val); } /* XXX: this stuff can be optimized */ static inline void le32_to_cpu_array(u32 *buf, unsigned int words) { while (words--) { __le32_to_cpus(buf); buf++; } } static inline void cpu_to_le32_array(u32 *buf, unsigned int words) { while (words--) { __cpu_to_le32s(buf); buf++; } } static inline void be16_add_cpu(__be16 *var, u16 val) { *var = cpu_to_be16(be16_to_cpu(*var) + val); } static inline void be32_add_cpu(__be32 *var, u32 val) { *var = cpu_to_be32(be32_to_cpu(*var) + val); } static inline void be64_add_cpu(__be64 *var, u64 val) { *var = cpu_to_be64(be64_to_cpu(*var) + val); } static inline void cpu_to_be32_array(__be32 *dst, const u32 *src, size_t len) { int i; for (i = 0; i < len; i++) dst[i] = cpu_to_be32(src[i]); } static inline void be32_to_cpu_array(u32 *dst, const __be32 *src, size_t len) { int i; for (i = 0; i < len; i++) dst[i] = be32_to_cpu(src[i]); } #endif /* _LINUX_BYTEORDER_GENERIC_H */ PK ! ����a a crc-ccitt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CRC_CCITT_H #define _LINUX_CRC_CCITT_H #include <linux/types.h> extern u16 const crc_ccitt_table[256]; extern u16 const crc_ccitt_false_table[256]; extern u16 crc_ccitt(u16 crc, const u8 *buffer, size_t len); extern u16 crc_ccitt_false(u16 crc, const u8 *buffer, size_t len); static inline u16 crc_ccitt_byte(u16 crc, const u8 c) { return (crc >> 8) ^ crc_ccitt_table[(crc ^ c) & 0xff]; } static inline u16 crc_ccitt_false_byte(u16 crc, const u8 c) { return (crc << 8) ^ crc_ccitt_false_table[(crc >> 8) ^ c]; } #endif /* _LINUX_CRC_CCITT_H */ PK ! t3`J�+ �+ switchtec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Microsemi Switchtec PCIe Driver * Copyright (c) 2017, Microsemi Corporation */ #ifndef _SWITCHTEC_H #define _SWITCHTEC_H #include <linux/pci.h> #include <linux/cdev.h> #define SWITCHTEC_MRPC_PAYLOAD_SIZE 1024 #define SWITCHTEC_MAX_PFF_CSR 255 #define SWITCHTEC_EVENT_OCCURRED BIT(0) #define SWITCHTEC_EVENT_CLEAR BIT(0) #define SWITCHTEC_EVENT_EN_LOG BIT(1) #define SWITCHTEC_EVENT_EN_CLI BIT(2) #define SWITCHTEC_EVENT_EN_IRQ BIT(3) #define SWITCHTEC_EVENT_FATAL BIT(4) #define SWITCHTEC_DMA_MRPC_EN BIT(0) #define MRPC_GAS_READ 0x29 #define MRPC_GAS_WRITE 0x87 #define MRPC_CMD_ID(x) ((x) & 0xffff) enum { SWITCHTEC_GAS_MRPC_OFFSET = 0x0000, SWITCHTEC_GAS_TOP_CFG_OFFSET = 0x1000, SWITCHTEC_GAS_SW_EVENT_OFFSET = 0x1800, SWITCHTEC_GAS_SYS_INFO_OFFSET = 0x2000, SWITCHTEC_GAS_FLASH_INFO_OFFSET = 0x2200, SWITCHTEC_GAS_PART_CFG_OFFSET = 0x4000, SWITCHTEC_GAS_NTB_OFFSET = 0x10000, SWITCHTEC_GAS_PFF_CSR_OFFSET = 0x134000, }; enum switchtec_gen { SWITCHTEC_GEN3, SWITCHTEC_GEN4, }; struct mrpc_regs { u8 input_data[SWITCHTEC_MRPC_PAYLOAD_SIZE]; u8 output_data[SWITCHTEC_MRPC_PAYLOAD_SIZE]; u32 cmd; u32 status; u32 ret_value; u32 dma_en; u64 dma_addr; u32 dma_vector; u32 dma_ver; } __packed; enum mrpc_status { SWITCHTEC_MRPC_STATUS_INPROGRESS = 1, SWITCHTEC_MRPC_STATUS_DONE = 2, SWITCHTEC_MRPC_STATUS_ERROR = 0xFF, SWITCHTEC_MRPC_STATUS_INTERRUPTED = 0x100, }; struct sw_event_regs { u64 event_report_ctrl; u64 reserved1; u64 part_event_bitmap; u64 reserved2; u32 global_summary; u32 reserved3[3]; u32 stack_error_event_hdr; u32 stack_error_event_data; u32 reserved4[4]; u32 ppu_error_event_hdr; u32 ppu_error_event_data; u32 reserved5[4]; u32 isp_error_event_hdr; u32 isp_error_event_data; u32 reserved6[4]; u32 sys_reset_event_hdr; u32 reserved7[5]; u32 fw_exception_hdr; u32 reserved8[5]; u32 fw_nmi_hdr; u32 reserved9[5]; u32 fw_non_fatal_hdr; u32 reserved10[5]; u32 fw_fatal_hdr; u32 reserved11[5]; u32 twi_mrpc_comp_hdr; u32 twi_mrpc_comp_data; u32 reserved12[4]; u32 twi_mrpc_comp_async_hdr; u32 twi_mrpc_comp_async_data; u32 reserved13[4]; u32 cli_mrpc_comp_hdr; u32 cli_mrpc_comp_data; u32 reserved14[4]; u32 cli_mrpc_comp_async_hdr; u32 cli_mrpc_comp_async_data; u32 reserved15[4]; u32 gpio_interrupt_hdr; u32 gpio_interrupt_data; u32 reserved16[4]; u32 gfms_event_hdr; u32 gfms_event_data; u32 reserved17[4]; } __packed; enum { SWITCHTEC_GEN3_CFG0_RUNNING = 0x04, SWITCHTEC_GEN3_CFG1_RUNNING = 0x05, SWITCHTEC_GEN3_IMG0_RUNNING = 0x03, SWITCHTEC_GEN3_IMG1_RUNNING = 0x07, }; enum { SWITCHTEC_GEN4_MAP0_RUNNING = 0x00, SWITCHTEC_GEN4_MAP1_RUNNING = 0x01, SWITCHTEC_GEN4_KEY0_RUNNING = 0x02, SWITCHTEC_GEN4_KEY1_RUNNING = 0x03, SWITCHTEC_GEN4_BL2_0_RUNNING = 0x04, SWITCHTEC_GEN4_BL2_1_RUNNING = 0x05, SWITCHTEC_GEN4_CFG0_RUNNING = 0x06, SWITCHTEC_GEN4_CFG1_RUNNING = 0x07, SWITCHTEC_GEN4_IMG0_RUNNING = 0x08, SWITCHTEC_GEN4_IMG1_RUNNING = 0x09, }; enum { SWITCHTEC_GEN4_KEY0_ACTIVE = 0, SWITCHTEC_GEN4_KEY1_ACTIVE = 1, SWITCHTEC_GEN4_BL2_0_ACTIVE = 0, SWITCHTEC_GEN4_BL2_1_ACTIVE = 1, SWITCHTEC_GEN4_CFG0_ACTIVE = 0, SWITCHTEC_GEN4_CFG1_ACTIVE = 1, SWITCHTEC_GEN4_IMG0_ACTIVE = 0, SWITCHTEC_GEN4_IMG1_ACTIVE = 1, }; struct sys_info_regs_gen3 { u32 reserved1; u32 vendor_table_revision; u32 table_format_version; u32 partition_id; u32 cfg_file_fmt_version; u16 cfg_running; u16 img_running; u32 reserved2[57]; char vendor_id[8]; char product_id[16]; char product_revision[4]; char component_vendor[8]; u16 component_id; u8 component_revision; } __packed; struct sys_info_regs_gen4 { u16 gas_layout_ver; u8 evlist_ver; u8 reserved1; u16 mgmt_cmd_set_ver; u16 fabric_cmd_set_ver; u32 reserved2[2]; u8 mrpc_uart_ver; u8 mrpc_twi_ver; u8 mrpc_eth_ver; u8 mrpc_inband_ver; u32 reserved3[7]; u32 fw_update_tmo; u32 xml_version_cfg; u32 xml_version_img; u32 partition_id; u16 bl2_running; u16 cfg_running; u16 img_running; u16 key_running; u32 reserved4[43]; u32 vendor_seeprom_twi; u32 vendor_table_revision; u32 vendor_specific_info[2]; u16 p2p_vendor_id; u16 p2p_device_id; u8 p2p_revision_id; u8 reserved5[3]; u32 p2p_class_id; u16 subsystem_vendor_id; u16 subsystem_id; u32 p2p_serial_number[2]; u8 mac_addr[6]; u8 reserved6[2]; u32 reserved7[3]; char vendor_id[8]; char product_id[24]; char product_revision[2]; u16 reserved8; } __packed; struct sys_info_regs { u32 device_id; u32 device_version; u32 firmware_version; union { struct sys_info_regs_gen3 gen3; struct sys_info_regs_gen4 gen4; }; } __packed; struct partition_info { u32 address; u32 length; }; struct flash_info_regs_gen3 { u32 flash_part_map_upd_idx; struct active_partition_info_gen3 { u32 address; u32 build_version; u32 build_string; } active_img; struct active_partition_info_gen3 active_cfg; struct active_partition_info_gen3 inactive_img; struct active_partition_info_gen3 inactive_cfg; u32 flash_length; struct partition_info cfg0; struct partition_info cfg1; struct partition_info img0; struct partition_info img1; struct partition_info nvlog; struct partition_info vendor[8]; }; struct flash_info_regs_gen4 { u32 flash_address; u32 flash_length; struct active_partition_info_gen4 { unsigned char bl2; unsigned char cfg; unsigned char img; unsigned char key; } active_flag; u32 reserved[3]; struct partition_info map0; struct partition_info map1; struct partition_info key0; struct partition_info key1; struct partition_info bl2_0; struct partition_info bl2_1; struct partition_info cfg0; struct partition_info cfg1; struct partition_info img0; struct partition_info img1; struct partition_info nvlog; struct partition_info vendor[8]; }; struct flash_info_regs { union { struct flash_info_regs_gen3 gen3; struct flash_info_regs_gen4 gen4; }; }; enum { SWITCHTEC_NTB_REG_INFO_OFFSET = 0x0000, SWITCHTEC_NTB_REG_CTRL_OFFSET = 0x4000, SWITCHTEC_NTB_REG_DBMSG_OFFSET = 0x64000, }; struct ntb_info_regs { u8 partition_count; u8 partition_id; u16 reserved1; u64 ep_map; u16 requester_id; u16 reserved2; u32 reserved3[4]; struct nt_partition_info { u32 xlink_enabled; u32 target_part_low; u32 target_part_high; u32 reserved; } ntp_info[48]; } __packed; struct part_cfg_regs { u32 status; u32 state; u32 port_cnt; u32 usp_port_mode; u32 usp_pff_inst_id; u32 vep_pff_inst_id; u32 dsp_pff_inst_id[47]; u32 reserved1[11]; u16 vep_vector_number; u16 usp_vector_number; u32 port_event_bitmap; u32 reserved2[3]; u32 part_event_summary; u32 reserved3[3]; u32 part_reset_hdr; u32 part_reset_data[5]; u32 mrpc_comp_hdr; u32 mrpc_comp_data[5]; u32 mrpc_comp_async_hdr; u32 mrpc_comp_async_data[5]; u32 dyn_binding_hdr; u32 dyn_binding_data[5]; u32 intercomm_notify_hdr; u32 intercomm_notify_data[5]; u32 reserved4[153]; } __packed; enum { NTB_CTRL_PART_OP_LOCK = 0x1, NTB_CTRL_PART_OP_CFG = 0x2, NTB_CTRL_PART_OP_RESET = 0x3, NTB_CTRL_PART_STATUS_NORMAL = 0x1, NTB_CTRL_PART_STATUS_LOCKED = 0x2, NTB_CTRL_PART_STATUS_LOCKING = 0x3, NTB_CTRL_PART_STATUS_CONFIGURING = 0x4, NTB_CTRL_PART_STATUS_RESETTING = 0x5, NTB_CTRL_BAR_VALID = 1 << 0, NTB_CTRL_BAR_DIR_WIN_EN = 1 << 4, NTB_CTRL_BAR_LUT_WIN_EN = 1 << 5, NTB_CTRL_REQ_ID_EN = 1 << 0, NTB_CTRL_LUT_EN = 1 << 0, NTB_PART_CTRL_ID_PROT_DIS = 1 << 0, }; struct ntb_ctrl_regs { u32 partition_status; u32 partition_op; u32 partition_ctrl; u32 bar_setup; u32 bar_error; u16 lut_table_entries; u16 lut_table_offset; u32 lut_error; u16 req_id_table_size; u16 req_id_table_offset; u32 req_id_error; u32 reserved1[7]; struct { u32 ctl; u32 win_size; u64 xlate_addr; } bar_entry[6]; struct { u32 win_size; u32 reserved[3]; } bar_ext_entry[6]; u32 reserved2[192]; u32 req_id_table[512]; u32 reserved3[256]; u64 lut_entry[512]; } __packed; #define NTB_DBMSG_IMSG_STATUS BIT_ULL(32) #define NTB_DBMSG_IMSG_MASK BIT_ULL(40) struct ntb_dbmsg_regs { u32 reserved1[1024]; u64 odb; u64 odb_mask; u64 idb; u64 idb_mask; u8 idb_vec_map[64]; u32 msg_map; u32 reserved2; struct { u32 msg; u32 status; } omsg[4]; struct { u32 msg; u8 status; u8 mask; u8 src; u8 reserved; } imsg[4]; u8 reserved3[3928]; u8 msix_table[1024]; u8 reserved4[3072]; u8 pba[24]; u8 reserved5[4072]; } __packed; enum { SWITCHTEC_PART_CFG_EVENT_RESET = 1 << 0, SWITCHTEC_PART_CFG_EVENT_MRPC_CMP = 1 << 1, SWITCHTEC_PART_CFG_EVENT_MRPC_ASYNC_CMP = 1 << 2, SWITCHTEC_PART_CFG_EVENT_DYN_PART_CMP = 1 << 3, }; struct pff_csr_regs { u16 vendor_id; u16 device_id; u16 pcicmd; u16 pcists; u32 pci_class; u32 pci_opts; union { u32 pci_bar[6]; u64 pci_bar64[3]; }; u32 pci_cardbus; u32 pci_subsystem_id; u32 pci_expansion_rom; u32 pci_cap_ptr; u32 reserved1; u32 pci_irq; u32 pci_cap_region[48]; u32 pcie_cap_region[448]; u32 indirect_gas_window[128]; u32 indirect_gas_window_off; u32 reserved[127]; u32 pff_event_summary; u32 reserved2[3]; u32 aer_in_p2p_hdr; u32 aer_in_p2p_data[5]; u32 aer_in_vep_hdr; u32 aer_in_vep_data[5]; u32 dpc_hdr; u32 dpc_data[5]; u32 cts_hdr; u32 cts_data[5]; u32 uec_hdr; u32 uec_data[5]; u32 hotplug_hdr; u32 hotplug_data[5]; u32 ier_hdr; u32 ier_data[5]; u32 threshold_hdr; u32 threshold_data[5]; u32 power_mgmt_hdr; u32 power_mgmt_data[5]; u32 tlp_throttling_hdr; u32 tlp_throttling_data[5]; u32 force_speed_hdr; u32 force_speed_data[5]; u32 credit_timeout_hdr; u32 credit_timeout_data[5]; u32 link_state_hdr; u32 link_state_data[5]; u32 reserved4[174]; } __packed; struct switchtec_ntb; struct dma_mrpc_output { u32 status; u32 cmd_id; u32 rtn_code; u32 output_size; u8 data[SWITCHTEC_MRPC_PAYLOAD_SIZE]; }; struct switchtec_dev { struct pci_dev *pdev; struct device dev; struct cdev cdev; enum switchtec_gen gen; int partition; int partition_count; int pff_csr_count; char pff_local[SWITCHTEC_MAX_PFF_CSR]; void __iomem *mmio; struct mrpc_regs __iomem *mmio_mrpc; struct sw_event_regs __iomem *mmio_sw_event; struct sys_info_regs __iomem *mmio_sys_info; struct flash_info_regs __iomem *mmio_flash_info; struct ntb_info_regs __iomem *mmio_ntb; struct part_cfg_regs __iomem *mmio_part_cfg; struct part_cfg_regs __iomem *mmio_part_cfg_all; struct pff_csr_regs __iomem *mmio_pff_csr; /* * The mrpc mutex must be held when accessing the other * mrpc_ fields, alive flag and stuser->state field */ struct mutex mrpc_mutex; struct list_head mrpc_queue; int mrpc_busy; struct work_struct mrpc_work; struct delayed_work mrpc_timeout; bool alive; wait_queue_head_t event_wq; atomic_t event_cnt; struct work_struct link_event_work; void (*link_notifier)(struct switchtec_dev *stdev); u8 link_event_count[SWITCHTEC_MAX_PFF_CSR]; struct switchtec_ntb *sndev; struct dma_mrpc_output *dma_mrpc; dma_addr_t dma_mrpc_dma_addr; }; static inline struct switchtec_dev *to_stdev(struct device *dev) { return container_of(dev, struct switchtec_dev, dev); } extern struct class *switchtec_class; #endif PK ! E'ܦF< F< jiffies.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_JIFFIES_H #define _LINUX_JIFFIES_H #include <linux/cache.h> #include <linux/limits.h> #include <linux/math64.h> #include <linux/minmax.h> #include <linux/types.h> #include <linux/time.h> #include <linux/timex.h> #include <vdso/jiffies.h> #include <asm/param.h> /* for HZ */ #include <generated/timeconst.h> /* * The following defines establish the engineering parameters of the PLL * model. The HZ variable establishes the timer interrupt frequency, 100 Hz * for the SunOS kernel, 256 Hz for the Ultrix kernel and 1024 Hz for the * OSF/1 kernel. The SHIFT_HZ define expresses the same value as the * nearest power of two in order to avoid hardware multiply operations. */ #if HZ >= 12 && HZ < 24 # define SHIFT_HZ 4 #elif HZ >= 24 && HZ < 48 # define SHIFT_HZ 5 #elif HZ >= 48 && HZ < 96 # define SHIFT_HZ 6 #elif HZ >= 96 && HZ < 192 # define SHIFT_HZ 7 #elif HZ >= 192 && HZ < 384 # define SHIFT_HZ 8 #elif HZ >= 384 && HZ < 768 # define SHIFT_HZ 9 #elif HZ >= 768 && HZ < 1536 # define SHIFT_HZ 10 #elif HZ >= 1536 && HZ < 3072 # define SHIFT_HZ 11 #elif HZ >= 3072 && HZ < 6144 # define SHIFT_HZ 12 #elif HZ >= 6144 && HZ < 12288 # define SHIFT_HZ 13 #else # error Invalid value of HZ. #endif /* Suppose we want to divide two numbers NOM and DEN: NOM/DEN, then we can * improve accuracy by shifting LSH bits, hence calculating: * (NOM << LSH) / DEN * This however means trouble for large NOM, because (NOM << LSH) may no * longer fit in 32 bits. The following way of calculating this gives us * some slack, under the following conditions: * - (NOM / DEN) fits in (32 - LSH) bits. * - (NOM % DEN) fits in (32 - LSH) bits. */ #define SH_DIV(NOM,DEN,LSH) ( (((NOM) / (DEN)) << (LSH)) \ + ((((NOM) % (DEN)) << (LSH)) + (DEN) / 2) / (DEN)) /* LATCH is used in the interval timer and ftape setup. */ #define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ) /* For divider */ extern int register_refined_jiffies(long clock_tick_rate); /* TICK_USEC is the time between ticks in usec assuming SHIFTED_HZ */ #define TICK_USEC ((USEC_PER_SEC + HZ/2) / HZ) /* USER_TICK_USEC is the time between ticks in usec assuming fake USER_HZ */ #define USER_TICK_USEC ((1000000UL + USER_HZ/2) / USER_HZ) #ifndef __jiffy_arch_data #define __jiffy_arch_data #endif /* * The 64-bit value is not atomic - you MUST NOT read it * without sampling the sequence number in jiffies_lock. * get_jiffies_64() will do this for you as appropriate. */ extern u64 __cacheline_aligned_in_smp jiffies_64; extern unsigned long volatile __cacheline_aligned_in_smp __jiffy_arch_data jiffies; #if (BITS_PER_LONG < 64) u64 get_jiffies_64(void); #else static inline u64 get_jiffies_64(void) { return (u64)jiffies; } #endif /* * These inlines deal with timer wrapping correctly. You are * strongly encouraged to use them * 1. Because people otherwise forget * 2. Because if the timer wrap changes in future you won't have to * alter your driver code. * * time_after(a,b) returns true if the time a is after time b. * * Do this with "<0" and ">=0" to only test the sign of the result. A * good compiler would generate better code (and a really good compiler * wouldn't care). Gcc is currently neither. */ #define time_after(a,b) \ (typecheck(unsigned long, a) && \ typecheck(unsigned long, b) && \ ((long)((b) - (a)) < 0)) #define time_before(a,b) time_after(b,a) #define time_after_eq(a,b) \ (typecheck(unsigned long, a) && \ typecheck(unsigned long, b) && \ ((long)((a) - (b)) >= 0)) #define time_before_eq(a,b) time_after_eq(b,a) /* * Calculate whether a is in the range of [b, c]. */ #define time_in_range(a,b,c) \ (time_after_eq(a,b) && \ time_before_eq(a,c)) /* * Calculate whether a is in the range of [b, c). */ #define time_in_range_open(a,b,c) \ (time_after_eq(a,b) && \ time_before(a,c)) /* Same as above, but does so with platform independent 64bit types. * These must be used when utilizing jiffies_64 (i.e. return value of * get_jiffies_64() */ #define time_after64(a,b) \ (typecheck(__u64, a) && \ typecheck(__u64, b) && \ ((__s64)((b) - (a)) < 0)) #define time_before64(a,b) time_after64(b,a) #define time_after_eq64(a,b) \ (typecheck(__u64, a) && \ typecheck(__u64, b) && \ ((__s64)((a) - (b)) >= 0)) #define time_before_eq64(a,b) time_after_eq64(b,a) #define time_in_range64(a, b, c) \ (time_after_eq64(a, b) && \ time_before_eq64(a, c)) /* * These four macros compare jiffies and 'a' for convenience. */ /* time_is_before_jiffies(a) return true if a is before jiffies */ #define time_is_before_jiffies(a) time_after(jiffies, a) #define time_is_before_jiffies64(a) time_after64(get_jiffies_64(), a) /* time_is_after_jiffies(a) return true if a is after jiffies */ #define time_is_after_jiffies(a) time_before(jiffies, a) #define time_is_after_jiffies64(a) time_before64(get_jiffies_64(), a) /* time_is_before_eq_jiffies(a) return true if a is before or equal to jiffies*/ #define time_is_before_eq_jiffies(a) time_after_eq(jiffies, a) #define time_is_before_eq_jiffies64(a) time_after_eq64(get_jiffies_64(), a) /* time_is_after_eq_jiffies(a) return true if a is after or equal to jiffies*/ #define time_is_after_eq_jiffies(a) time_before_eq(jiffies, a) #define time_is_after_eq_jiffies64(a) time_before_eq64(get_jiffies_64(), a) /* * Have the 32 bit jiffies value wrap 5 minutes after boot * so jiffies wrap bugs show up earlier. */ #define INITIAL_JIFFIES ((unsigned long)(unsigned int) (-300*HZ)) /* * Change timeval to jiffies, trying to avoid the * most obvious overflows.. * * And some not so obvious. * * Note that we don't want to return LONG_MAX, because * for various timeout reasons we often end up having * to wait "jiffies+1" in order to guarantee that we wait * at _least_ "jiffies" - so "jiffies+1" had better still * be positive. */ #define MAX_JIFFY_OFFSET ((LONG_MAX >> 1)-1) extern unsigned long preset_lpj; /* * We want to do realistic conversions of time so we need to use the same * values the update wall clock code uses as the jiffies size. This value * is: TICK_NSEC (which is defined in timex.h). This * is a constant and is in nanoseconds. We will use scaled math * with a set of scales defined here as SEC_JIFFIE_SC, USEC_JIFFIE_SC and * NSEC_JIFFIE_SC. Note that these defines contain nothing but * constants and so are computed at compile time. SHIFT_HZ (computed in * timex.h) adjusts the scaling for different HZ values. * Scaled math??? What is that? * * Scaled math is a way to do integer math on values that would, * otherwise, either overflow, underflow, or cause undesired div * instructions to appear in the execution path. In short, we "scale" * up the operands so they take more bits (more precision, less * underflow), do the desired operation and then "scale" the result back * by the same amount. If we do the scaling by shifting we avoid the * costly mpy and the dastardly div instructions. * Suppose, for example, we want to convert from seconds to jiffies * where jiffies is defined in nanoseconds as NSEC_PER_JIFFIE. The * simple math is: jiff = (sec * NSEC_PER_SEC) / NSEC_PER_JIFFIE; We * observe that (NSEC_PER_SEC / NSEC_PER_JIFFIE) is a constant which we * might calculate at compile time, however, the result will only have * about 3-4 bits of precision (less for smaller values of HZ). * * So, we scale as follows: * jiff = (sec) * (NSEC_PER_SEC / NSEC_PER_JIFFIE); * jiff = ((sec) * ((NSEC_PER_SEC * SCALE)/ NSEC_PER_JIFFIE)) / SCALE; * Then we make SCALE a power of two so: * jiff = ((sec) * ((NSEC_PER_SEC << SCALE)/ NSEC_PER_JIFFIE)) >> SCALE; * Now we define: * #define SEC_CONV = ((NSEC_PER_SEC << SCALE)/ NSEC_PER_JIFFIE)) * jiff = (sec * SEC_CONV) >> SCALE; * * Often the math we use will expand beyond 32-bits so we tell C how to * do this and pass the 64-bit result of the mpy through the ">> SCALE" * which should take the result back to 32-bits. We want this expansion * to capture as much precision as possible. At the same time we don't * want to overflow so we pick the SCALE to avoid this. In this file, * that means using a different scale for each range of HZ values (as * defined in timex.h). * * For those who want to know, gcc will give a 64-bit result from a "*" * operator if the result is a long long AND at least one of the * operands is cast to long long (usually just prior to the "*" so as * not to confuse it into thinking it really has a 64-bit operand, * which, buy the way, it can do, but it takes more code and at least 2 * mpys). * We also need to be aware that one second in nanoseconds is only a * couple of bits away from overflowing a 32-bit word, so we MUST use * 64-bits to get the full range time in nanoseconds. */ /* * Here are the scales we will use. One for seconds, nanoseconds and * microseconds. * * Within the limits of cpp we do a rough cut at the SEC_JIFFIE_SC and * check if the sign bit is set. If not, we bump the shift count by 1. * (Gets an extra bit of precision where we can use it.) * We know it is set for HZ = 1024 and HZ = 100 not for 1000. * Haven't tested others. * Limits of cpp (for #if expressions) only long (no long long), but * then we only need the most signicant bit. */ #define SEC_JIFFIE_SC (31 - SHIFT_HZ) #if !((((NSEC_PER_SEC << 2) / TICK_NSEC) << (SEC_JIFFIE_SC - 2)) & 0x80000000) #undef SEC_JIFFIE_SC #define SEC_JIFFIE_SC (32 - SHIFT_HZ) #endif #define NSEC_JIFFIE_SC (SEC_JIFFIE_SC + 29) #define SEC_CONVERSION ((unsigned long)((((u64)NSEC_PER_SEC << SEC_JIFFIE_SC) +\ TICK_NSEC -1) / (u64)TICK_NSEC)) #define NSEC_CONVERSION ((unsigned long)((((u64)1 << NSEC_JIFFIE_SC) +\ TICK_NSEC -1) / (u64)TICK_NSEC)) /* * The maximum jiffie value is (MAX_INT >> 1). Here we translate that * into seconds. The 64-bit case will overflow if we are not careful, * so use the messy SH_DIV macro to do it. Still all constants. */ #if BITS_PER_LONG < 64 # define MAX_SEC_IN_JIFFIES \ (long)((u64)((u64)MAX_JIFFY_OFFSET * TICK_NSEC) / NSEC_PER_SEC) #else /* take care of overflow on 64 bits machines */ # define MAX_SEC_IN_JIFFIES \ (SH_DIV((MAX_JIFFY_OFFSET >> SEC_JIFFIE_SC) * TICK_NSEC, NSEC_PER_SEC, 1) - 1) #endif /* * Convert various time units to each other: */ extern unsigned int jiffies_to_msecs(const unsigned long j); extern unsigned int jiffies_to_usecs(const unsigned long j); static inline u64 jiffies_to_nsecs(const unsigned long j) { return (u64)jiffies_to_usecs(j) * NSEC_PER_USEC; } extern u64 jiffies64_to_nsecs(u64 j); extern u64 jiffies64_to_msecs(u64 j); extern unsigned long __msecs_to_jiffies(const unsigned int m); #if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) /* * HZ is equal to or smaller than 1000, and 1000 is a nice round * multiple of HZ, divide with the factor between them, but round * upwards: */ static inline unsigned long _msecs_to_jiffies(const unsigned int m) { return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ); } #elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) /* * HZ is larger than 1000, and HZ is a nice round multiple of 1000 - * simply multiply with the factor between them. * * But first make sure the multiplication result cannot overflow: */ static inline unsigned long _msecs_to_jiffies(const unsigned int m) { if (m > jiffies_to_msecs(MAX_JIFFY_OFFSET)) return MAX_JIFFY_OFFSET; return m * (HZ / MSEC_PER_SEC); } #else /* * Generic case - multiply, round and divide. But first check that if * we are doing a net multiplication, that we wouldn't overflow: */ static inline unsigned long _msecs_to_jiffies(const unsigned int m) { if (HZ > MSEC_PER_SEC && m > jiffies_to_msecs(MAX_JIFFY_OFFSET)) return MAX_JIFFY_OFFSET; return (MSEC_TO_HZ_MUL32 * m + MSEC_TO_HZ_ADJ32) >> MSEC_TO_HZ_SHR32; } #endif /** * msecs_to_jiffies: - convert milliseconds to jiffies * @m: time in milliseconds * * conversion is done as follows: * * - negative values mean 'infinite timeout' (MAX_JIFFY_OFFSET) * * - 'too large' values [that would result in larger than * MAX_JIFFY_OFFSET values] mean 'infinite timeout' too. * * - all other values are converted to jiffies by either multiplying * the input value by a factor or dividing it with a factor and * handling any 32-bit overflows. * for the details see _msecs_to_jiffies() * * msecs_to_jiffies() checks for the passed in value being a constant * via __builtin_constant_p() allowing gcc to eliminate most of the * code, __msecs_to_jiffies() is called if the value passed does not * allow constant folding and the actual conversion must be done at * runtime. * the HZ range specific helpers _msecs_to_jiffies() are called both * directly here and from __msecs_to_jiffies() in the case where * constant folding is not possible. */ static __always_inline unsigned long msecs_to_jiffies(const unsigned int m) { if (__builtin_constant_p(m)) { if ((int)m < 0) return MAX_JIFFY_OFFSET; return _msecs_to_jiffies(m); } else { return __msecs_to_jiffies(m); } } extern unsigned long __usecs_to_jiffies(const unsigned int u); #if !(USEC_PER_SEC % HZ) static inline unsigned long _usecs_to_jiffies(const unsigned int u) { return (u + (USEC_PER_SEC / HZ) - 1) / (USEC_PER_SEC / HZ); } #else static inline unsigned long _usecs_to_jiffies(const unsigned int u) { return (USEC_TO_HZ_MUL32 * u + USEC_TO_HZ_ADJ32) >> USEC_TO_HZ_SHR32; } #endif /** * usecs_to_jiffies: - convert microseconds to jiffies * @u: time in microseconds * * conversion is done as follows: * * - 'too large' values [that would result in larger than * MAX_JIFFY_OFFSET values] mean 'infinite timeout' too. * * - all other values are converted to jiffies by either multiplying * the input value by a factor or dividing it with a factor and * handling any 32-bit overflows as for msecs_to_jiffies. * * usecs_to_jiffies() checks for the passed in value being a constant * via __builtin_constant_p() allowing gcc to eliminate most of the * code, __usecs_to_jiffies() is called if the value passed does not * allow constant folding and the actual conversion must be done at * runtime. * the HZ range specific helpers _usecs_to_jiffies() are called both * directly here and from __msecs_to_jiffies() in the case where * constant folding is not possible. */ static __always_inline unsigned long usecs_to_jiffies(const unsigned int u) { if (__builtin_constant_p(u)) { if (u > jiffies_to_usecs(MAX_JIFFY_OFFSET)) return MAX_JIFFY_OFFSET; return _usecs_to_jiffies(u); } else { return __usecs_to_jiffies(u); } } extern unsigned long timespec64_to_jiffies(const struct timespec64 *value); extern void jiffies_to_timespec64(const unsigned long jiffies, struct timespec64 *value); extern clock_t jiffies_to_clock_t(unsigned long x); static inline clock_t jiffies_delta_to_clock_t(long delta) { return jiffies_to_clock_t(max(0L, delta)); } static inline unsigned int jiffies_delta_to_msecs(long delta) { return jiffies_to_msecs(max(0L, delta)); } extern unsigned long clock_t_to_jiffies(unsigned long x); extern u64 jiffies_64_to_clock_t(u64 x); extern u64 nsec_to_clock_t(u64 x); extern u64 nsecs_to_jiffies64(u64 n); extern unsigned long nsecs_to_jiffies(u64 n); #define TIMESTAMP_SIZE 30 #endif PK ! =h �� � page_ref.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PAGE_REF_H #define _LINUX_PAGE_REF_H #include <linux/atomic.h> #include <linux/mm_types.h> #include <linux/page-flags.h> #include <linux/tracepoint-defs.h> DECLARE_TRACEPOINT(page_ref_set); DECLARE_TRACEPOINT(page_ref_mod); DECLARE_TRACEPOINT(page_ref_mod_and_test); DECLARE_TRACEPOINT(page_ref_mod_and_return); DECLARE_TRACEPOINT(page_ref_mod_unless); DECLARE_TRACEPOINT(page_ref_freeze); DECLARE_TRACEPOINT(page_ref_unfreeze); #ifdef CONFIG_DEBUG_PAGE_REF /* * Ideally we would want to use the trace_<tracepoint>_enabled() helper * functions. But due to include header file issues, that is not * feasible. Instead we have to open code the static key functions. * * See trace_##name##_enabled(void) in include/linux/tracepoint.h */ #define page_ref_tracepoint_active(t) tracepoint_enabled(t) extern void __page_ref_set(struct page *page, int v); extern void __page_ref_mod(struct page *page, int v); extern void __page_ref_mod_and_test(struct page *page, int v, int ret); extern void __page_ref_mod_and_return(struct page *page, int v, int ret); extern void __page_ref_mod_unless(struct page *page, int v, int u); extern void __page_ref_freeze(struct page *page, int v, int ret); extern void __page_ref_unfreeze(struct page *page, int v); #else #define page_ref_tracepoint_active(t) false static inline void __page_ref_set(struct page *page, int v) { } static inline void __page_ref_mod(struct page *page, int v) { } static inline void __page_ref_mod_and_test(struct page *page, int v, int ret) { } static inline void __page_ref_mod_and_return(struct page *page, int v, int ret) { } static inline void __page_ref_mod_unless(struct page *page, int v, int u) { } static inline void __page_ref_freeze(struct page *page, int v, int ret) { } static inline void __page_ref_unfreeze(struct page *page, int v) { } #endif static inline int page_ref_count(const struct page *page) { return atomic_read(&page->_refcount); } static inline int page_count(const struct page *page) { return atomic_read(&compound_head(page)->_refcount); } static inline void set_page_count(struct page *page, int v) { atomic_set(&page->_refcount, v); if (page_ref_tracepoint_active(page_ref_set)) __page_ref_set(page, v); } /* * Setup the page count before being freed into the page allocator for * the first time (boot or memory hotplug) */ static inline void init_page_count(struct page *page) { set_page_count(page, 1); } static inline void page_ref_add(struct page *page, int nr) { atomic_add(nr, &page->_refcount); if (page_ref_tracepoint_active(page_ref_mod)) __page_ref_mod(page, nr); } static inline void page_ref_sub(struct page *page, int nr) { atomic_sub(nr, &page->_refcount); if (page_ref_tracepoint_active(page_ref_mod)) __page_ref_mod(page, -nr); } static inline int page_ref_sub_return(struct page *page, int nr) { int ret = atomic_sub_return(nr, &page->_refcount); if (page_ref_tracepoint_active(page_ref_mod_and_return)) __page_ref_mod_and_return(page, -nr, ret); return ret; } static inline void page_ref_inc(struct page *page) { atomic_inc(&page->_refcount); if (page_ref_tracepoint_active(page_ref_mod)) __page_ref_mod(page, 1); } static inline void page_ref_dec(struct page *page) { atomic_dec(&page->_refcount); if (page_ref_tracepoint_active(page_ref_mod)) __page_ref_mod(page, -1); } static inline int page_ref_sub_and_test(struct page *page, int nr) { int ret = atomic_sub_and_test(nr, &page->_refcount); if (page_ref_tracepoint_active(page_ref_mod_and_test)) __page_ref_mod_and_test(page, -nr, ret); return ret; } static inline int page_ref_inc_return(struct page *page) { int ret = atomic_inc_return(&page->_refcount); if (page_ref_tracepoint_active(page_ref_mod_and_return)) __page_ref_mod_and_return(page, 1, ret); return ret; } static inline int page_ref_dec_and_test(struct page *page) { int ret = atomic_dec_and_test(&page->_refcount); if (page_ref_tracepoint_active(page_ref_mod_and_test)) __page_ref_mod_and_test(page, -1, ret); return ret; } static inline int page_ref_dec_return(struct page *page) { int ret = atomic_dec_return(&page->_refcount); if (page_ref_tracepoint_active(page_ref_mod_and_return)) __page_ref_mod_and_return(page, -1, ret); return ret; } static inline int page_ref_add_unless(struct page *page, int nr, int u) { int ret = atomic_add_unless(&page->_refcount, nr, u); if (page_ref_tracepoint_active(page_ref_mod_unless)) __page_ref_mod_unless(page, nr, ret); return ret; } static inline int page_ref_freeze(struct page *page, int count) { int ret = likely(atomic_cmpxchg(&page->_refcount, count, 0) == count); if (page_ref_tracepoint_active(page_ref_freeze)) __page_ref_freeze(page, count, ret); return ret; } static inline void page_ref_unfreeze(struct page *page, int count) { VM_BUG_ON_PAGE(page_count(page) != 0, page); VM_BUG_ON(count == 0); atomic_set_release(&page->_refcount, count); if (page_ref_tracepoint_active(page_ref_unfreeze)) __page_ref_unfreeze(page, count); } #endif PK ! ��V V rcupdate_trace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Read-Copy Update mechanism for mutual exclusion, adapted for tracing. * * Copyright (C) 2020 Paul E. McKenney. */ #ifndef __LINUX_RCUPDATE_TRACE_H #define __LINUX_RCUPDATE_TRACE_H #include <linux/sched.h> #include <linux/rcupdate.h> extern struct lockdep_map rcu_trace_lock_map; #ifdef CONFIG_DEBUG_LOCK_ALLOC static inline int rcu_read_lock_trace_held(void) { return lock_is_held(&rcu_trace_lock_map); } #else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ static inline int rcu_read_lock_trace_held(void) { return 1; } #endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ #ifdef CONFIG_TASKS_TRACE_RCU void rcu_read_unlock_trace_special(struct task_struct *t, int nesting); /** * rcu_read_lock_trace - mark beginning of RCU-trace read-side critical section * * When synchronize_rcu_tasks_trace() is invoked by one task, then that * task is guaranteed to block until all other tasks exit their read-side * critical sections. Similarly, if call_rcu_trace() is invoked on one * task while other tasks are within RCU read-side critical sections, * invocation of the corresponding RCU callback is deferred until after * the all the other tasks exit their critical sections. * * For more details, please see the documentation for rcu_read_lock(). */ static inline void rcu_read_lock_trace(void) { struct task_struct *t = current; WRITE_ONCE(t->trc_reader_nesting, READ_ONCE(t->trc_reader_nesting) + 1); barrier(); if (IS_ENABLED(CONFIG_TASKS_TRACE_RCU_READ_MB) && t->trc_reader_special.b.need_mb) smp_mb(); // Pairs with update-side barriers rcu_lock_acquire(&rcu_trace_lock_map); } /** * rcu_read_unlock_trace - mark end of RCU-trace read-side critical section * * Pairs with a preceding call to rcu_read_lock_trace(), and nesting is * allowed. Invoking a rcu_read_unlock_trace() when there is no matching * rcu_read_lock_trace() is verboten, and will result in lockdep complaints. * * For more details, please see the documentation for rcu_read_unlock(). */ static inline void rcu_read_unlock_trace(void) { int nesting; struct task_struct *t = current; rcu_lock_release(&rcu_trace_lock_map); nesting = READ_ONCE(t->trc_reader_nesting) - 1; barrier(); // Critical section before disabling. // Disable IPI-based setting of .need_qs. WRITE_ONCE(t->trc_reader_nesting, INT_MIN); if (likely(!READ_ONCE(t->trc_reader_special.s)) || nesting) { WRITE_ONCE(t->trc_reader_nesting, nesting); return; // We assume shallow reader nesting. } rcu_read_unlock_trace_special(t, nesting); } void call_rcu_tasks_trace(struct rcu_head *rhp, rcu_callback_t func); void synchronize_rcu_tasks_trace(void); void rcu_barrier_tasks_trace(void); #else /* * The BPF JIT forms these addresses even when it doesn't call these * functions, so provide definitions that result in runtime errors. */ static inline void call_rcu_tasks_trace(struct rcu_head *rhp, rcu_callback_t func) { BUG(); } static inline void rcu_read_lock_trace(void) { BUG(); } static inline void rcu_read_unlock_trace(void) { BUG(); } #endif /* #ifdef CONFIG_TASKS_TRACE_RCU */ #endif /* __LINUX_RCUPDATE_TRACE_H */ PK ! ��v v hugetlb_inline.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_HUGETLB_INLINE_H #define _LINUX_HUGETLB_INLINE_H #ifdef CONFIG_HUGETLB_PAGE #include <linux/mm.h> static inline bool is_vm_hugetlb_page(struct vm_area_struct *vma) { return !!(vma->vm_flags & VM_HUGETLB); } #else static inline bool is_vm_hugetlb_page(struct vm_area_struct *vma) { return false; } #endif #endif PK ! ����K K ecryptfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ECRYPTFS_H #define _LINUX_ECRYPTFS_H /* Version verification for shared data structures w/ userspace */ #define ECRYPTFS_VERSION_MAJOR 0x00 #define ECRYPTFS_VERSION_MINOR 0x04 #define ECRYPTFS_SUPPORTED_FILE_VERSION 0x03 /* These flags indicate which features are supported by the kernel * module; userspace tools such as the mount helper read the feature * bits from a sysfs handle in order to determine how to behave. */ #define ECRYPTFS_VERSIONING_PASSPHRASE 0x00000001 #define ECRYPTFS_VERSIONING_PUBKEY 0x00000002 #define ECRYPTFS_VERSIONING_PLAINTEXT_PASSTHROUGH 0x00000004 #define ECRYPTFS_VERSIONING_POLICY 0x00000008 #define ECRYPTFS_VERSIONING_XATTR 0x00000010 #define ECRYPTFS_VERSIONING_MULTKEY 0x00000020 #define ECRYPTFS_VERSIONING_DEVMISC 0x00000040 #define ECRYPTFS_VERSIONING_HMAC 0x00000080 #define ECRYPTFS_VERSIONING_FILENAME_ENCRYPTION 0x00000100 #define ECRYPTFS_VERSIONING_GCM 0x00000200 #define ECRYPTFS_MAX_PASSWORD_LENGTH 64 #define ECRYPTFS_MAX_PASSPHRASE_BYTES ECRYPTFS_MAX_PASSWORD_LENGTH #define ECRYPTFS_SALT_SIZE 8 #define ECRYPTFS_SALT_SIZE_HEX (ECRYPTFS_SALT_SIZE*2) /* The original signature size is only for what is stored on disk; all * in-memory representations are expanded hex, so it better adapted to * be passed around or referenced on the command line */ #define ECRYPTFS_SIG_SIZE 8 #define ECRYPTFS_SIG_SIZE_HEX (ECRYPTFS_SIG_SIZE*2) #define ECRYPTFS_PASSWORD_SIG_SIZE ECRYPTFS_SIG_SIZE_HEX #define ECRYPTFS_MAX_KEY_BYTES 64 #define ECRYPTFS_MAX_ENCRYPTED_KEY_BYTES 512 #define ECRYPTFS_FILE_VERSION 0x03 #define ECRYPTFS_MAX_PKI_NAME_BYTES 16 #define RFC2440_CIPHER_DES3_EDE 0x02 #define RFC2440_CIPHER_CAST_5 0x03 #define RFC2440_CIPHER_BLOWFISH 0x04 #define RFC2440_CIPHER_AES_128 0x07 #define RFC2440_CIPHER_AES_192 0x08 #define RFC2440_CIPHER_AES_256 0x09 #define RFC2440_CIPHER_TWOFISH 0x0a #define RFC2440_CIPHER_CAST_6 0x0b #define RFC2440_CIPHER_RSA 0x01 /** * For convenience, we may need to pass around the encrypted session * key between kernel and userspace because the authentication token * may not be extractable. For example, the TPM may not release the * private key, instead requiring the encrypted data and returning the * decrypted data. */ struct ecryptfs_session_key { #define ECRYPTFS_USERSPACE_SHOULD_TRY_TO_DECRYPT 0x00000001 #define ECRYPTFS_USERSPACE_SHOULD_TRY_TO_ENCRYPT 0x00000002 #define ECRYPTFS_CONTAINS_DECRYPTED_KEY 0x00000004 #define ECRYPTFS_CONTAINS_ENCRYPTED_KEY 0x00000008 u32 flags; u32 encrypted_key_size; u32 decrypted_key_size; u8 encrypted_key[ECRYPTFS_MAX_ENCRYPTED_KEY_BYTES]; u8 decrypted_key[ECRYPTFS_MAX_KEY_BYTES]; }; struct ecryptfs_password { u32 password_bytes; s32 hash_algo; u32 hash_iterations; u32 session_key_encryption_key_bytes; #define ECRYPTFS_PERSISTENT_PASSWORD 0x01 #define ECRYPTFS_SESSION_KEY_ENCRYPTION_KEY_SET 0x02 u32 flags; /* Iterated-hash concatenation of salt and passphrase */ u8 session_key_encryption_key[ECRYPTFS_MAX_KEY_BYTES]; u8 signature[ECRYPTFS_PASSWORD_SIG_SIZE + 1]; /* Always in expanded hex */ u8 salt[ECRYPTFS_SALT_SIZE]; }; enum ecryptfs_token_types {ECRYPTFS_PASSWORD, ECRYPTFS_PRIVATE_KEY}; struct ecryptfs_private_key { u32 key_size; u32 data_len; u8 signature[ECRYPTFS_PASSWORD_SIG_SIZE + 1]; char pki_type[ECRYPTFS_MAX_PKI_NAME_BYTES + 1]; u8 data[]; }; /* May be a password or a private key */ struct ecryptfs_auth_tok { u16 version; /* 8-bit major and 8-bit minor */ u16 token_type; #define ECRYPTFS_ENCRYPT_ONLY 0x00000001 u32 flags; struct ecryptfs_session_key session_key; u8 reserved[32]; union { struct ecryptfs_password password; struct ecryptfs_private_key private_key; } token; } __attribute__ ((packed)); #endif /* _LINUX_ECRYPTFS_H */ PK ! �,g� � rwlock_rt.hnu �[��� // SPDX-License-Identifier: GPL-2.0-only #ifndef __LINUX_RWLOCK_RT_H #define __LINUX_RWLOCK_RT_H #ifndef __LINUX_SPINLOCK_RT_H #error Do not #include directly. Use <linux/spinlock.h>. #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC extern void __rt_rwlock_init(rwlock_t *rwlock, const char *name, struct lock_class_key *key); #else static inline void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key) { } #endif #define rwlock_init(rwl) \ do { \ static struct lock_class_key __key; \ \ init_rwbase_rt(&(rwl)->rwbase); \ __rt_rwlock_init(rwl, #rwl, &__key); \ } while (0) extern void rt_read_lock(rwlock_t *rwlock); extern int rt_read_trylock(rwlock_t *rwlock); extern void rt_read_unlock(rwlock_t *rwlock); extern void rt_write_lock(rwlock_t *rwlock); extern int rt_write_trylock(rwlock_t *rwlock); extern void rt_write_unlock(rwlock_t *rwlock); static __always_inline void read_lock(rwlock_t *rwlock) { rt_read_lock(rwlock); } static __always_inline void read_lock_bh(rwlock_t *rwlock) { local_bh_disable(); rt_read_lock(rwlock); } static __always_inline void read_lock_irq(rwlock_t *rwlock) { rt_read_lock(rwlock); } #define read_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ rt_read_lock(lock); \ flags = 0; \ } while (0) #define read_trylock(lock) __cond_lock(lock, rt_read_trylock(lock)) static __always_inline void read_unlock(rwlock_t *rwlock) { rt_read_unlock(rwlock); } static __always_inline void read_unlock_bh(rwlock_t *rwlock) { rt_read_unlock(rwlock); local_bh_enable(); } static __always_inline void read_unlock_irq(rwlock_t *rwlock) { rt_read_unlock(rwlock); } static __always_inline void read_unlock_irqrestore(rwlock_t *rwlock, unsigned long flags) { rt_read_unlock(rwlock); } static __always_inline void write_lock(rwlock_t *rwlock) { rt_write_lock(rwlock); } static __always_inline void write_lock_bh(rwlock_t *rwlock) { local_bh_disable(); rt_write_lock(rwlock); } static __always_inline void write_lock_irq(rwlock_t *rwlock) { rt_write_lock(rwlock); } #define write_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ rt_write_lock(lock); \ flags = 0; \ } while (0) #define write_trylock(lock) __cond_lock(lock, rt_write_trylock(lock)) #define write_trylock_irqsave(lock, flags) \ ({ \ int __locked; \ \ typecheck(unsigned long, flags); \ flags = 0; \ __locked = write_trylock(lock); \ __locked; \ }) static __always_inline void write_unlock(rwlock_t *rwlock) { rt_write_unlock(rwlock); } static __always_inline void write_unlock_bh(rwlock_t *rwlock) { rt_write_unlock(rwlock); local_bh_enable(); } static __always_inline void write_unlock_irq(rwlock_t *rwlock) { rt_write_unlock(rwlock); } static __always_inline void write_unlock_irqrestore(rwlock_t *rwlock, unsigned long flags) { rt_write_unlock(rwlock); } #define rwlock_is_contended(lock) (((void)(lock), 0)) #endif /* __LINUX_RWLOCK_RT_H */ PK ! �д�� � leds-bd2802.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * leds-bd2802.h - RGB LED Driver * * Copyright (C) 2009 Samsung Electronics * Kim Kyuwon <q1.kim@samsung.com> * * Datasheet: http://www.rohm.com/products/databook/driver/pdf/bd2802gu-e.pdf */ #ifndef _LEDS_BD2802_H_ #define _LEDS_BD2802_H_ struct bd2802_led_platform_data{ u8 rgb_time; }; #define RGB_TIME(slopedown, slopeup, waveform) \ ((slopedown) << 6 | (slopeup) << 4 | (waveform)) #endif /* _LEDS_BD2802_H_ */ PK ! ���|� � kbd_diacr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _DIACR_H #define _DIACR_H #include <linux/kd.h> extern struct kbdiacruc accent_table[]; extern unsigned int accent_table_size; #endif /* _DIACR_H */ PK ! ��� = = igmp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Linux NET3: Internet Group Management Protocol [IGMP] * * Authors: * Alan Cox <alan@lxorguk.ukuu.org.uk> * * Extended to talk the BSD extended IGMP protocol of mrouted 3.6 */ #ifndef _LINUX_IGMP_H #define _LINUX_IGMP_H #include <linux/skbuff.h> #include <linux/timer.h> #include <linux/in.h> #include <linux/ip.h> #include <linux/refcount.h> #include <uapi/linux/igmp.h> static inline struct igmphdr *igmp_hdr(const struct sk_buff *skb) { return (struct igmphdr *)skb_transport_header(skb); } static inline struct igmpv3_report * igmpv3_report_hdr(const struct sk_buff *skb) { return (struct igmpv3_report *)skb_transport_header(skb); } static inline struct igmpv3_query * igmpv3_query_hdr(const struct sk_buff *skb) { return (struct igmpv3_query *)skb_transport_header(skb); } struct ip_sf_socklist { unsigned int sl_max; unsigned int sl_count; struct rcu_head rcu; __be32 sl_addr[]; }; #define IP_SFBLOCK 10 /* allocate this many at once */ /* ip_mc_socklist is real list now. Speed is not argument; this list never used in fast path code */ struct ip_mc_socklist { struct ip_mc_socklist __rcu *next_rcu; struct ip_mreqn multi; unsigned int sfmode; /* MCAST_{INCLUDE,EXCLUDE} */ struct ip_sf_socklist __rcu *sflist; struct rcu_head rcu; }; struct ip_sf_list { struct ip_sf_list *sf_next; unsigned long sf_count[2]; /* include/exclude counts */ __be32 sf_inaddr; unsigned char sf_gsresp; /* include in g & s response? */ unsigned char sf_oldin; /* change state */ unsigned char sf_crcount; /* retrans. left to send */ }; struct ip_mc_list { struct in_device *interface; __be32 multiaddr; unsigned int sfmode; struct ip_sf_list *sources; struct ip_sf_list *tomb; unsigned long sfcount[2]; union { struct ip_mc_list *next; struct ip_mc_list __rcu *next_rcu; }; struct ip_mc_list __rcu *next_hash; struct timer_list timer; int users; refcount_t refcnt; spinlock_t lock; char tm_running; char reporter; char unsolicit_count; char loaded; unsigned char gsquery; /* check source marks? */ unsigned char crcount; struct rcu_head rcu; }; /* V3 exponential field decoding */ #define IGMPV3_MASK(value, nb) ((nb)>=32 ? (value) : ((1<<(nb))-1) & (value)) #define IGMPV3_EXP(thresh, nbmant, nbexp, value) \ ((value) < (thresh) ? (value) : \ ((IGMPV3_MASK(value, nbmant) | (1<<(nbmant))) << \ (IGMPV3_MASK((value) >> (nbmant), nbexp) + (nbexp)))) #define IGMPV3_QQIC(value) IGMPV3_EXP(0x80, 4, 3, value) #define IGMPV3_MRC(value) IGMPV3_EXP(0x80, 4, 3, value) static inline int ip_mc_may_pull(struct sk_buff *skb, unsigned int len) { if (skb_transport_offset(skb) + ip_transport_len(skb) < len) return 0; return pskb_may_pull(skb, len); } extern int ip_check_mc_rcu(struct in_device *dev, __be32 mc_addr, __be32 src_addr, u8 proto); extern int igmp_rcv(struct sk_buff *); extern int ip_mc_join_group(struct sock *sk, struct ip_mreqn *imr); extern int ip_mc_join_group_ssm(struct sock *sk, struct ip_mreqn *imr, unsigned int mode); extern int ip_mc_leave_group(struct sock *sk, struct ip_mreqn *imr); extern void ip_mc_drop_socket(struct sock *sk); extern int ip_mc_source(int add, int omode, struct sock *sk, struct ip_mreq_source *mreqs, int ifindex); extern int ip_mc_msfilter(struct sock *sk, struct ip_msfilter *msf,int ifindex); extern int ip_mc_msfget(struct sock *sk, struct ip_msfilter *msf, sockptr_t optval, sockptr_t optlen); extern int ip_mc_gsfget(struct sock *sk, struct group_filter *gsf, sockptr_t optval, size_t offset); extern int ip_mc_sf_allow(struct sock *sk, __be32 local, __be32 rmt, int dif, int sdif); extern void ip_mc_init_dev(struct in_device *); extern void ip_mc_destroy_dev(struct in_device *); extern void ip_mc_up(struct in_device *); extern void ip_mc_down(struct in_device *); extern void ip_mc_unmap(struct in_device *); extern void ip_mc_remap(struct in_device *); extern void __ip_mc_dec_group(struct in_device *in_dev, __be32 addr, gfp_t gfp); static inline void ip_mc_dec_group(struct in_device *in_dev, __be32 addr) { return __ip_mc_dec_group(in_dev, addr, GFP_KERNEL); } extern void __ip_mc_inc_group(struct in_device *in_dev, __be32 addr, gfp_t gfp); extern void ip_mc_inc_group(struct in_device *in_dev, __be32 addr); int ip_mc_check_igmp(struct sk_buff *skb); #endif PK ! _Z�.� � perf_event.hnu �[��� /* * Performance events: * * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra * * Data type definitions, declarations, prototypes. * * Started by: Thomas Gleixner and Ingo Molnar * * For licencing details see kernel-base/COPYING */ #ifndef _LINUX_PERF_EVENT_H #define _LINUX_PERF_EVENT_H #include <uapi/linux/perf_event.h> #include <uapi/linux/bpf_perf_event.h> /* * Kernel-internal data types and definitions: */ #ifdef CONFIG_PERF_EVENTS # include <asm/perf_event.h> # include <asm/local64.h> #endif struct perf_guest_info_callbacks { int (*is_in_guest)(void); int (*is_user_mode)(void); unsigned long (*get_guest_ip)(void); void (*handle_intel_pt_intr)(void); }; #ifdef CONFIG_HAVE_HW_BREAKPOINT #include <asm/hw_breakpoint.h> #endif #include <linux/list.h> #include <linux/mutex.h> #include <linux/rculist.h> #include <linux/rcupdate.h> #include <linux/spinlock.h> #include <linux/hrtimer.h> #include <linux/fs.h> #include <linux/pid_namespace.h> #include <linux/workqueue.h> #include <linux/ftrace.h> #include <linux/cpu.h> #include <linux/irq_work.h> #include <linux/static_key.h> #include <linux/jump_label_ratelimit.h> #include <linux/atomic.h> #include <linux/sysfs.h> #include <linux/perf_regs.h> #include <linux/cgroup.h> #include <linux/refcount.h> #include <linux/security.h> #include <asm/local.h> struct perf_callchain_entry { __u64 nr; __u64 ip[]; /* /proc/sys/kernel/perf_event_max_stack */ }; struct perf_callchain_entry_ctx { struct perf_callchain_entry *entry; u32 max_stack; u32 nr; short contexts; bool contexts_maxed; }; typedef unsigned long (*perf_copy_f)(void *dst, const void *src, unsigned long off, unsigned long len); struct perf_raw_frag { union { struct perf_raw_frag *next; unsigned long pad; }; perf_copy_f copy; void *data; u32 size; } __packed; struct perf_raw_record { struct perf_raw_frag frag; u32 size; }; /* * branch stack layout: * nr: number of taken branches stored in entries[] * hw_idx: The low level index of raw branch records * for the most recent branch. * -1ULL means invalid/unknown. * * Note that nr can vary from sample to sample * branches (to, from) are stored from most recent * to least recent, i.e., entries[0] contains the most * recent branch. * The entries[] is an abstraction of raw branch records, * which may not be stored in age order in HW, e.g. Intel LBR. * The hw_idx is to expose the low level index of raw * branch record for the most recent branch aka entries[0]. * The hw_idx index is between -1 (unknown) and max depth, * which can be retrieved in /sys/devices/cpu/caps/branches. * For the architectures whose raw branch records are * already stored in age order, the hw_idx should be 0. */ struct perf_branch_stack { __u64 nr; __u64 hw_idx; struct perf_branch_entry entries[]; }; struct task_struct; /* * extra PMU register associated with an event */ struct hw_perf_event_extra { u64 config; /* register value */ unsigned int reg; /* register address or index */ int alloc; /* extra register already allocated */ int idx; /* index in shared_regs->regs[] */ }; /** * struct hw_perf_event - performance event hardware details: */ struct hw_perf_event { #ifdef CONFIG_PERF_EVENTS union { struct { /* hardware */ u64 config; u64 last_tag; unsigned long config_base; unsigned long event_base; int event_base_rdpmc; int idx; int last_cpu; int flags; struct hw_perf_event_extra extra_reg; struct hw_perf_event_extra branch_reg; }; struct { /* software */ struct hrtimer hrtimer; }; struct { /* tracepoint */ /* for tp_event->class */ struct list_head tp_list; }; struct { /* amd_power */ u64 pwr_acc; u64 ptsc; }; #ifdef CONFIG_HAVE_HW_BREAKPOINT struct { /* breakpoint */ /* * Crufty hack to avoid the chicken and egg * problem hw_breakpoint has with context * creation and event initalization. */ struct arch_hw_breakpoint info; struct list_head bp_list; }; #endif struct { /* amd_iommu */ u8 iommu_bank; u8 iommu_cntr; u16 padding; u64 conf; u64 conf1; }; }; /* * If the event is a per task event, this will point to the task in * question. See the comment in perf_event_alloc(). */ struct task_struct *target; /* * PMU would store hardware filter configuration * here. */ void *addr_filters; /* Last sync'ed generation of filters */ unsigned long addr_filters_gen; /* * hw_perf_event::state flags; used to track the PERF_EF_* state. */ #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ #define PERF_HES_ARCH 0x04 int state; /* * The last observed hardware counter value, updated with a * local64_cmpxchg() such that pmu::read() can be called nested. */ local64_t prev_count; /* * The period to start the next sample with. */ u64 sample_period; union { struct { /* Sampling */ /* * The period we started this sample with. */ u64 last_period; /* * However much is left of the current period; * note that this is a full 64bit value and * allows for generation of periods longer * than hardware might allow. */ local64_t period_left; }; struct { /* Topdown events counting for context switch */ u64 saved_metric; u64 saved_slots; }; }; /* * State for throttling the event, see __perf_event_overflow() and * perf_adjust_freq_unthr_context(). */ u64 interrupts_seq; u64 interrupts; /* * State for freq target events, see __perf_event_overflow() and * perf_adjust_freq_unthr_context(). */ u64 freq_time_stamp; u64 freq_count_stamp; #endif }; struct perf_event; /* * Common implementation detail of pmu::{start,commit,cancel}_txn */ #define PERF_PMU_TXN_ADD 0x1 /* txn to add/schedule event on PMU */ #define PERF_PMU_TXN_READ 0x2 /* txn to read event group from PMU */ /** * pmu::capabilities flags */ #define PERF_PMU_CAP_NO_INTERRUPT 0x0001 #define PERF_PMU_CAP_NO_NMI 0x0002 #define PERF_PMU_CAP_AUX_NO_SG 0x0004 #define PERF_PMU_CAP_EXTENDED_REGS 0x0008 #define PERF_PMU_CAP_EXCLUSIVE 0x0010 #define PERF_PMU_CAP_ITRACE 0x0020 #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x0040 #define PERF_PMU_CAP_NO_EXCLUDE 0x0080 #define PERF_PMU_CAP_AUX_OUTPUT 0x0100 #define PERF_PMU_CAP_EXTENDED_HW_TYPE 0x0200 struct perf_output_handle; /** * struct pmu - generic performance monitoring unit */ struct pmu { struct list_head entry; struct module *module; struct device *dev; const struct attribute_group **attr_groups; const struct attribute_group **attr_update; const char *name; int type; /* * various common per-pmu feature flags */ int capabilities; int __percpu *pmu_disable_count; struct perf_cpu_context __percpu *pmu_cpu_context; atomic_t exclusive_cnt; /* < 0: cpu; > 0: tsk */ int task_ctx_nr; int hrtimer_interval_ms; /* number of address filters this PMU can do */ unsigned int nr_addr_filters; /* * Fully disable/enable this PMU, can be used to protect from the PMI * as well as for lazy/batch writing of the MSRs. */ void (*pmu_enable) (struct pmu *pmu); /* optional */ void (*pmu_disable) (struct pmu *pmu); /* optional */ /* * Try and initialize the event for this PMU. * * Returns: * -ENOENT -- @event is not for this PMU * * -ENODEV -- @event is for this PMU but PMU not present * -EBUSY -- @event is for this PMU but PMU temporarily unavailable * -EINVAL -- @event is for this PMU but @event is not valid * -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported * -EACCES -- @event is for this PMU, @event is valid, but no privileges * * 0 -- @event is for this PMU and valid * * Other error return values are allowed. */ int (*event_init) (struct perf_event *event); /* * Notification that the event was mapped or unmapped. Called * in the context of the mapping task. */ void (*event_mapped) (struct perf_event *event, struct mm_struct *mm); /* optional */ void (*event_unmapped) (struct perf_event *event, struct mm_struct *mm); /* optional */ /* * Flags for ->add()/->del()/ ->start()/->stop(). There are * matching hw_perf_event::state flags. */ #define PERF_EF_START 0x01 /* start the counter when adding */ #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ /* * Adds/Removes a counter to/from the PMU, can be done inside a * transaction, see the ->*_txn() methods. * * The add/del callbacks will reserve all hardware resources required * to service the event, this includes any counter constraint * scheduling etc. * * Called with IRQs disabled and the PMU disabled on the CPU the event * is on. * * ->add() called without PERF_EF_START should result in the same state * as ->add() followed by ->stop(). * * ->del() must always PERF_EF_UPDATE stop an event. If it calls * ->stop() that must deal with already being stopped without * PERF_EF_UPDATE. */ int (*add) (struct perf_event *event, int flags); void (*del) (struct perf_event *event, int flags); /* * Starts/Stops a counter present on the PMU. * * The PMI handler should stop the counter when perf_event_overflow() * returns !0. ->start() will be used to continue. * * Also used to change the sample period. * * Called with IRQs disabled and the PMU disabled on the CPU the event * is on -- will be called from NMI context with the PMU generates * NMIs. * * ->stop() with PERF_EF_UPDATE will read the counter and update * period/count values like ->read() would. * * ->start() with PERF_EF_RELOAD will reprogram the counter * value, must be preceded by a ->stop() with PERF_EF_UPDATE. */ void (*start) (struct perf_event *event, int flags); void (*stop) (struct perf_event *event, int flags); /* * Updates the counter value of the event. * * For sampling capable PMUs this will also update the software period * hw_perf_event::period_left field. */ void (*read) (struct perf_event *event); /* * Group events scheduling is treated as a transaction, add * group events as a whole and perform one schedulability test. * If the test fails, roll back the whole group * * Start the transaction, after this ->add() doesn't need to * do schedulability tests. * * Optional. */ void (*start_txn) (struct pmu *pmu, unsigned int txn_flags); /* * If ->start_txn() disabled the ->add() schedulability test * then ->commit_txn() is required to perform one. On success * the transaction is closed. On error the transaction is kept * open until ->cancel_txn() is called. * * Optional. */ int (*commit_txn) (struct pmu *pmu); /* * Will cancel the transaction, assumes ->del() is called * for each successful ->add() during the transaction. * * Optional. */ void (*cancel_txn) (struct pmu *pmu); /* * Will return the value for perf_event_mmap_page::index for this event, * if no implementation is provided it will default to: event->hw.idx + 1. */ int (*event_idx) (struct perf_event *event); /*optional */ /* * context-switches callback */ void (*sched_task) (struct perf_event_context *ctx, bool sched_in); /* * Kmem cache of PMU specific data */ struct kmem_cache *task_ctx_cache; /* * PMU specific parts of task perf event context (i.e. ctx->task_ctx_data) * can be synchronized using this function. See Intel LBR callstack support * implementation and Perf core context switch handling callbacks for usage * examples. */ void (*swap_task_ctx) (struct perf_event_context *prev, struct perf_event_context *next); /* optional */ /* * Set up pmu-private data structures for an AUX area */ void *(*setup_aux) (struct perf_event *event, void **pages, int nr_pages, bool overwrite); /* optional */ /* * Free pmu-private AUX data structures */ void (*free_aux) (void *aux); /* optional */ /* * Take a snapshot of the AUX buffer without touching the event * state, so that preempting ->start()/->stop() callbacks does * not interfere with their logic. Called in PMI context. * * Returns the size of AUX data copied to the output handle. * * Optional. */ long (*snapshot_aux) (struct perf_event *event, struct perf_output_handle *handle, unsigned long size); /* * Validate address range filters: make sure the HW supports the * requested configuration and number of filters; return 0 if the * supplied filters are valid, -errno otherwise. * * Runs in the context of the ioctl()ing process and is not serialized * with the rest of the PMU callbacks. */ int (*addr_filters_validate) (struct list_head *filters); /* optional */ /* * Synchronize address range filter configuration: * translate hw-agnostic filters into hardware configuration in * event::hw::addr_filters. * * Runs as a part of filter sync sequence that is done in ->start() * callback by calling perf_event_addr_filters_sync(). * * May (and should) traverse event::addr_filters::list, for which its * caller provides necessary serialization. */ void (*addr_filters_sync) (struct perf_event *event); /* optional */ /* * Check if event can be used for aux_output purposes for * events of this PMU. * * Runs from perf_event_open(). Should return 0 for "no match" * or non-zero for "match". */ int (*aux_output_match) (struct perf_event *event); /* optional */ /* * Filter events for PMU-specific reasons. */ int (*filter_match) (struct perf_event *event); /* optional */ /* * Check period value for PERF_EVENT_IOC_PERIOD ioctl. */ int (*check_period) (struct perf_event *event, u64 value); /* optional */ }; enum perf_addr_filter_action_t { PERF_ADDR_FILTER_ACTION_STOP = 0, PERF_ADDR_FILTER_ACTION_START, PERF_ADDR_FILTER_ACTION_FILTER, }; /** * struct perf_addr_filter - address range filter definition * @entry: event's filter list linkage * @path: object file's path for file-based filters * @offset: filter range offset * @size: filter range size (size==0 means single address trigger) * @action: filter/start/stop * * This is a hardware-agnostic filter configuration as specified by the user. */ struct perf_addr_filter { struct list_head entry; struct path path; unsigned long offset; unsigned long size; enum perf_addr_filter_action_t action; }; /** * struct perf_addr_filters_head - container for address range filters * @list: list of filters for this event * @lock: spinlock that serializes accesses to the @list and event's * (and its children's) filter generations. * @nr_file_filters: number of file-based filters * * A child event will use parent's @list (and therefore @lock), so they are * bundled together; see perf_event_addr_filters(). */ struct perf_addr_filters_head { struct list_head list; raw_spinlock_t lock; unsigned int nr_file_filters; }; struct perf_addr_filter_range { unsigned long start; unsigned long size; }; /** * enum perf_event_state - the states of an event: */ enum perf_event_state { PERF_EVENT_STATE_DEAD = -4, PERF_EVENT_STATE_EXIT = -3, PERF_EVENT_STATE_ERROR = -2, PERF_EVENT_STATE_OFF = -1, PERF_EVENT_STATE_INACTIVE = 0, PERF_EVENT_STATE_ACTIVE = 1, }; struct file; struct perf_sample_data; typedef void (*perf_overflow_handler_t)(struct perf_event *, struct perf_sample_data *, struct pt_regs *regs); /* * Event capabilities. For event_caps and groups caps. * * PERF_EV_CAP_SOFTWARE: Is a software event. * PERF_EV_CAP_READ_ACTIVE_PKG: A CPU event (or cgroup event) that can be read * from any CPU in the package where it is active. * PERF_EV_CAP_SIBLING: An event with this flag must be a group sibling and * cannot be a group leader. If an event with this flag is detached from the * group it is scheduled out and moved into an unrecoverable ERROR state. */ #define PERF_EV_CAP_SOFTWARE BIT(0) #define PERF_EV_CAP_READ_ACTIVE_PKG BIT(1) #define PERF_EV_CAP_SIBLING BIT(2) #define SWEVENT_HLIST_BITS 8 #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) struct swevent_hlist { struct hlist_head heads[SWEVENT_HLIST_SIZE]; struct rcu_head rcu_head; }; #define PERF_ATTACH_CONTEXT 0x01 #define PERF_ATTACH_GROUP 0x02 #define PERF_ATTACH_TASK 0x04 #define PERF_ATTACH_TASK_DATA 0x08 #define PERF_ATTACH_ITRACE 0x10 #define PERF_ATTACH_SCHED_CB 0x20 #define PERF_ATTACH_CHILD 0x40 struct perf_cgroup; struct perf_buffer; struct pmu_event_list { raw_spinlock_t lock; struct list_head list; }; #define for_each_sibling_event(sibling, event) \ if ((event)->group_leader == (event)) \ list_for_each_entry((sibling), &(event)->sibling_list, sibling_list) /** * struct perf_event - performance event kernel representation: */ struct perf_event { #ifdef CONFIG_PERF_EVENTS /* * entry onto perf_event_context::event_list; * modifications require ctx->lock * RCU safe iterations. */ struct list_head event_entry; /* * Locked for modification by both ctx->mutex and ctx->lock; holding * either sufficies for read. */ struct list_head sibling_list; struct list_head active_list; /* * Node on the pinned or flexible tree located at the event context; */ struct rb_node group_node; u64 group_index; /* * We need storage to track the entries in perf_pmu_migrate_context; we * cannot use the event_entry because of RCU and we want to keep the * group in tact which avoids us using the other two entries. */ struct list_head migrate_entry; struct hlist_node hlist_entry; struct list_head active_entry; int nr_siblings; /* Not serialized. Only written during event initialization. */ int event_caps; /* The cumulative AND of all event_caps for events in this group. */ int group_caps; unsigned int group_generation; struct perf_event *group_leader; struct pmu *pmu; void *pmu_private; enum perf_event_state state; unsigned int attach_state; local64_t count; atomic64_t child_count; /* * These are the total time in nanoseconds that the event * has been enabled (i.e. eligible to run, and the task has * been scheduled in, if this is a per-task event) * and running (scheduled onto the CPU), respectively. */ u64 total_time_enabled; u64 total_time_running; u64 tstamp; struct perf_event_attr attr; u16 header_size; u16 id_header_size; u16 read_size; struct hw_perf_event hw; struct perf_event_context *ctx; atomic_long_t refcount; /* * These accumulate total time (in nanoseconds) that children * events have been enabled and running, respectively. */ atomic64_t child_total_time_enabled; atomic64_t child_total_time_running; /* * Protect attach/detach and child_list: */ struct mutex child_mutex; struct list_head child_list; struct perf_event *parent; int oncpu; int cpu; struct list_head owner_entry; struct task_struct *owner; /* mmap bits */ struct mutex mmap_mutex; atomic_t mmap_count; struct perf_buffer *rb; struct list_head rb_entry; unsigned long rcu_batches; int rcu_pending; /* poll related */ wait_queue_head_t waitq; struct fasync_struct *fasync; /* delayed work for NMIs and such */ unsigned int pending_wakeup; unsigned int pending_kill; unsigned int pending_disable; unsigned int pending_sigtrap; unsigned long pending_addr; /* SIGTRAP */ struct irq_work pending_irq; struct callback_head pending_task; unsigned int pending_work; struct rcuwait pending_work_wait; atomic_t event_limit; /* address range filters */ struct perf_addr_filters_head addr_filters; /* vma address array for file-based filders */ struct perf_addr_filter_range *addr_filter_ranges; unsigned long addr_filters_gen; /* for aux_output events */ struct perf_event *aux_event; void (*destroy)(struct perf_event *); struct rcu_head rcu_head; struct pid_namespace *ns; u64 id; atomic64_t lost_samples; u64 (*clock)(void); perf_overflow_handler_t overflow_handler; void *overflow_handler_context; #ifdef CONFIG_BPF_SYSCALL perf_overflow_handler_t orig_overflow_handler; struct bpf_prog *prog; u64 bpf_cookie; #endif #ifdef CONFIG_EVENT_TRACING struct trace_event_call *tp_event; struct event_filter *filter; #ifdef CONFIG_FUNCTION_TRACER struct ftrace_ops ftrace_ops; #endif #endif #ifdef CONFIG_CGROUP_PERF struct perf_cgroup *cgrp; /* cgroup event is attach to */ #endif #ifdef CONFIG_SECURITY void *security; #endif struct list_head sb_list; #endif /* CONFIG_PERF_EVENTS */ }; struct perf_event_groups { struct rb_root tree; u64 index; }; /** * struct perf_event_context - event context structure * * Used as a container for task events and CPU events as well: */ struct perf_event_context { struct pmu *pmu; /* * Protect the states of the events in the list, * nr_active, and the list: */ raw_spinlock_t lock; /* * Protect the list of events. Locking either mutex or lock * is sufficient to ensure the list doesn't change; to change * the list you need to lock both the mutex and the spinlock. */ struct mutex mutex; struct list_head active_ctx_list; struct perf_event_groups pinned_groups; struct perf_event_groups flexible_groups; struct list_head event_list; struct list_head pinned_active; struct list_head flexible_active; int nr_events; int nr_active; int is_active; int nr_stat; int nr_freq; int rotate_disable; /* * Set when nr_events != nr_active, except tolerant to events not * necessary to be active due to scheduling constraints, such as cgroups. */ int rotate_necessary; refcount_t refcount; struct task_struct *task; /* * Context clock, runs when context enabled. */ u64 time; u64 timestamp; u64 timeoffset; /* * These fields let us detect when two contexts have both * been cloned (inherited) from a common ancestor. */ struct perf_event_context *parent_ctx; u64 parent_gen; u64 generation; int pin_count; #ifdef CONFIG_CGROUP_PERF int nr_cgroups; /* cgroup evts */ #endif void *task_ctx_data; /* pmu specific data */ struct rcu_head rcu_head; /* * Sum (event->pending_sigtrap + event->pending_work) * * The SIGTRAP is targeted at ctx->task, as such it won't do changing * that until the signal is delivered. */ local_t nr_pending; }; /* * Number of contexts where an event can trigger: * task, softirq, hardirq, nmi. */ #define PERF_NR_CONTEXTS 4 /** * struct perf_event_cpu_context - per cpu event context structure */ struct perf_cpu_context { struct perf_event_context ctx; struct perf_event_context *task_ctx; int active_oncpu; int exclusive; raw_spinlock_t hrtimer_lock; struct hrtimer hrtimer; ktime_t hrtimer_interval; unsigned int hrtimer_active; #ifdef CONFIG_CGROUP_PERF struct perf_cgroup *cgrp; struct list_head cgrp_cpuctx_entry; #endif struct list_head sched_cb_entry; int sched_cb_usage; int online; /* * Per-CPU storage for iterators used in visit_groups_merge. The default * storage is of size 2 to hold the CPU and any CPU event iterators. */ int heap_size; struct perf_event **heap; struct perf_event *heap_default[2]; }; struct perf_output_handle { struct perf_event *event; struct perf_buffer *rb; unsigned long wakeup; unsigned long size; u64 aux_flags; union { void *addr; unsigned long head; }; int page; }; struct bpf_perf_event_data_kern { bpf_user_pt_regs_t *regs; struct perf_sample_data *data; struct perf_event *event; }; #ifdef CONFIG_CGROUP_PERF /* * perf_cgroup_info keeps track of time_enabled for a cgroup. * This is a per-cpu dynamically allocated data structure. */ struct perf_cgroup_info { u64 time; u64 timestamp; u64 timeoffset; int active; }; struct perf_cgroup { struct cgroup_subsys_state css; struct perf_cgroup_info __percpu *info; }; /* * Must ensure cgroup is pinned (css_get) before calling * this function. In other words, we cannot call this function * if there is no cgroup event for the current CPU context. */ static inline struct perf_cgroup * perf_cgroup_from_task(struct task_struct *task, struct perf_event_context *ctx) { return container_of(task_css_check(task, perf_event_cgrp_id, ctx ? lockdep_is_held(&ctx->lock) : true), struct perf_cgroup, css); } #endif /* CONFIG_CGROUP_PERF */ #ifdef CONFIG_PERF_EVENTS extern void *perf_aux_output_begin(struct perf_output_handle *handle, struct perf_event *event); extern void perf_aux_output_end(struct perf_output_handle *handle, unsigned long size); extern int perf_aux_output_skip(struct perf_output_handle *handle, unsigned long size); extern void *perf_get_aux(struct perf_output_handle *handle); extern void perf_aux_output_flag(struct perf_output_handle *handle, u64 flags); extern void perf_event_itrace_started(struct perf_event *event); extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); extern void perf_pmu_unregister(struct pmu *pmu); extern void __perf_event_task_sched_in(struct task_struct *prev, struct task_struct *task); extern void __perf_event_task_sched_out(struct task_struct *prev, struct task_struct *next); extern int perf_event_init_task(struct task_struct *child, u64 clone_flags); extern void perf_event_exit_task(struct task_struct *child); extern void perf_event_free_task(struct task_struct *task); extern void perf_event_delayed_put(struct task_struct *task); extern struct file *perf_event_get(unsigned int fd); extern const struct perf_event *perf_get_event(struct file *file); extern const struct perf_event_attr *perf_event_attrs(struct perf_event *event); extern void perf_event_print_debug(void); extern void perf_pmu_disable(struct pmu *pmu); extern void perf_pmu_enable(struct pmu *pmu); extern void perf_sched_cb_dec(struct pmu *pmu); extern void perf_sched_cb_inc(struct pmu *pmu); extern int perf_event_task_disable(void); extern int perf_event_task_enable(void); extern void perf_pmu_resched(struct pmu *pmu); extern int perf_event_refresh(struct perf_event *event, int refresh); extern void perf_event_update_userpage(struct perf_event *event); extern int perf_event_release_kernel(struct perf_event *event); extern struct perf_event * perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu, struct task_struct *task, perf_overflow_handler_t callback, void *context); extern void perf_pmu_migrate_context(struct pmu *pmu, int src_cpu, int dst_cpu); int perf_event_read_local(struct perf_event *event, u64 *value, u64 *enabled, u64 *running); extern u64 perf_event_read_value(struct perf_event *event, u64 *enabled, u64 *running); struct perf_sample_data { /* * Fields set by perf_sample_data_init(), group so as to * minimize the cachelines touched. */ u64 addr; struct perf_raw_record *raw; struct perf_branch_stack *br_stack; u64 period; union perf_sample_weight weight; u64 txn; union perf_mem_data_src data_src; /* * The other fields, optionally {set,used} by * perf_{prepare,output}_sample(). */ u64 type; u64 ip; struct { u32 pid; u32 tid; } tid_entry; u64 time; u64 id; u64 stream_id; struct { u32 cpu; u32 reserved; } cpu_entry; struct perf_callchain_entry *callchain; u64 aux_size; struct perf_regs regs_user; struct perf_regs regs_intr; u64 stack_user_size; u64 phys_addr; u64 cgroup; u64 data_page_size; u64 code_page_size; } ____cacheline_aligned; /* default value for data source */ #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ PERF_MEM_S(LVL, NA) |\ PERF_MEM_S(SNOOP, NA) |\ PERF_MEM_S(LOCK, NA) |\ PERF_MEM_S(TLB, NA)) static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr, u64 period) { /* remaining struct members initialized in perf_prepare_sample() */ data->addr = addr; data->raw = NULL; data->br_stack = NULL; data->period = period; data->weight.full = 0; data->data_src.val = PERF_MEM_NA; data->txn = 0; } extern void perf_output_sample(struct perf_output_handle *handle, struct perf_event_header *header, struct perf_sample_data *data, struct perf_event *event); extern void perf_prepare_sample(struct perf_event_header *header, struct perf_sample_data *data, struct perf_event *event, struct pt_regs *regs); extern int perf_event_overflow(struct perf_event *event, struct perf_sample_data *data, struct pt_regs *regs); extern void perf_event_output_forward(struct perf_event *event, struct perf_sample_data *data, struct pt_regs *regs); extern void perf_event_output_backward(struct perf_event *event, struct perf_sample_data *data, struct pt_regs *regs); extern int perf_event_output(struct perf_event *event, struct perf_sample_data *data, struct pt_regs *regs); static inline bool __is_default_overflow_handler(perf_overflow_handler_t overflow_handler) { if (likely(overflow_handler == perf_event_output_forward)) return true; if (unlikely(overflow_handler == perf_event_output_backward)) return true; return false; } #define is_default_overflow_handler(event) \ __is_default_overflow_handler((event)->overflow_handler) #ifdef CONFIG_BPF_SYSCALL static inline bool uses_default_overflow_handler(struct perf_event *event) { if (likely(is_default_overflow_handler(event))) return true; return __is_default_overflow_handler(event->orig_overflow_handler); } #else #define uses_default_overflow_handler(event) \ is_default_overflow_handler(event) #endif extern void perf_event_header__init_id(struct perf_event_header *header, struct perf_sample_data *data, struct perf_event *event); extern void perf_event__output_id_sample(struct perf_event *event, struct perf_output_handle *handle, struct perf_sample_data *sample); extern void perf_log_lost_samples(struct perf_event *event, u64 lost); static inline bool event_has_any_exclude_flag(struct perf_event *event) { struct perf_event_attr *attr = &event->attr; return attr->exclude_idle || attr->exclude_user || attr->exclude_kernel || attr->exclude_hv || attr->exclude_guest || attr->exclude_host; } static inline bool is_sampling_event(struct perf_event *event) { return event->attr.sample_period != 0; } /* * Return 1 for a software event, 0 for a hardware event */ static inline int is_software_event(struct perf_event *event) { return event->event_caps & PERF_EV_CAP_SOFTWARE; } /* * Return 1 for event in sw context, 0 for event in hw context */ static inline int in_software_context(struct perf_event *event) { return event->ctx->pmu->task_ctx_nr == perf_sw_context; } static inline int is_exclusive_pmu(struct pmu *pmu) { return pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE; } extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); #ifndef perf_arch_fetch_caller_regs static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } #endif /* * When generating a perf sample in-line, instead of from an interrupt / * exception, we lack a pt_regs. This is typically used from software events * like: SW_CONTEXT_SWITCHES, SW_MIGRATIONS and the tie-in with tracepoints. * * We typically don't need a full set, but (for x86) do require: * - ip for PERF_SAMPLE_IP * - cs for user_mode() tests * - sp for PERF_SAMPLE_CALLCHAIN * - eflags for MISC bits and CALLCHAIN (see: perf_hw_regs()) * * NOTE: assumes @regs is otherwise already 0 filled; this is important for * things like PERF_SAMPLE_REGS_INTR. */ static inline void perf_fetch_caller_regs(struct pt_regs *regs) { perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); } static __always_inline void perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { if (static_key_false(&perf_swevent_enabled[event_id])) __perf_sw_event(event_id, nr, regs, addr); } DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); /* * 'Special' version for the scheduler, it hard assumes no recursion, * which is guaranteed by us not actually scheduling inside other swevents * because those disable preemption. */ static __always_inline void __perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); perf_fetch_caller_regs(regs); ___perf_sw_event(event_id, nr, regs, addr); } extern struct static_key_false perf_sched_events; static __always_inline bool __perf_sw_enabled(int swevt) { return static_key_false(&perf_swevent_enabled[swevt]); } static inline void perf_event_task_migrate(struct task_struct *task) { if (__perf_sw_enabled(PERF_COUNT_SW_CPU_MIGRATIONS)) task->sched_migrated = 1; } static inline void perf_event_task_sched_in(struct task_struct *prev, struct task_struct *task) { if (static_branch_unlikely(&perf_sched_events)) __perf_event_task_sched_in(prev, task); if (__perf_sw_enabled(PERF_COUNT_SW_CPU_MIGRATIONS) && task->sched_migrated) { __perf_sw_event_sched(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 0); task->sched_migrated = 0; } } static inline void perf_event_task_sched_out(struct task_struct *prev, struct task_struct *next) { if (__perf_sw_enabled(PERF_COUNT_SW_CONTEXT_SWITCHES)) __perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); #ifdef CONFIG_CGROUP_PERF if (__perf_sw_enabled(PERF_COUNT_SW_CGROUP_SWITCHES) && perf_cgroup_from_task(prev, NULL) != perf_cgroup_from_task(next, NULL)) __perf_sw_event_sched(PERF_COUNT_SW_CGROUP_SWITCHES, 1, 0); #endif if (static_branch_unlikely(&perf_sched_events)) __perf_event_task_sched_out(prev, next); } extern void perf_event_mmap(struct vm_area_struct *vma); extern void perf_event_ksymbol(u16 ksym_type, u64 addr, u32 len, bool unregister, const char *sym); extern void perf_event_bpf_event(struct bpf_prog *prog, enum perf_bpf_event_type type, u16 flags); extern struct perf_guest_info_callbacks __rcu *perf_guest_cbs; static inline struct perf_guest_info_callbacks *perf_get_guest_cbs(void) { /* * Callbacks are RCU-protected and must be READ_ONCE to avoid reloading * the callbacks between a !NULL check and dereferences, to ensure * pending stores/changes to the callback pointers are visible before a * non-NULL perf_guest_cbs is visible to readers, and to prevent a * module from unloading callbacks while readers are active. */ return rcu_dereference(perf_guest_cbs); } extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); extern void perf_event_exec(void); extern void perf_event_comm(struct task_struct *tsk, bool exec); extern void perf_event_namespaces(struct task_struct *tsk); extern void perf_event_fork(struct task_struct *tsk); extern void perf_event_text_poke(const void *addr, const void *old_bytes, size_t old_len, const void *new_bytes, size_t new_len); /* Callchains */ DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); extern void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); extern void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); extern struct perf_callchain_entry * get_perf_callchain(struct pt_regs *regs, u32 init_nr, bool kernel, bool user, u32 max_stack, bool crosstask, bool add_mark); extern struct perf_callchain_entry *perf_callchain(struct perf_event *event, struct pt_regs *regs); extern int get_callchain_buffers(int max_stack); extern void put_callchain_buffers(void); extern struct perf_callchain_entry *get_callchain_entry(int *rctx); extern void put_callchain_entry(int rctx); extern int sysctl_perf_event_max_stack; extern int sysctl_perf_event_max_contexts_per_stack; static inline int perf_callchain_store_context(struct perf_callchain_entry_ctx *ctx, u64 ip) { if (ctx->contexts < sysctl_perf_event_max_contexts_per_stack) { struct perf_callchain_entry *entry = ctx->entry; entry->ip[entry->nr++] = ip; ++ctx->contexts; return 0; } else { ctx->contexts_maxed = true; return -1; /* no more room, stop walking the stack */ } } static inline int perf_callchain_store(struct perf_callchain_entry_ctx *ctx, u64 ip) { if (ctx->nr < ctx->max_stack && !ctx->contexts_maxed) { struct perf_callchain_entry *entry = ctx->entry; entry->ip[entry->nr++] = ip; ++ctx->nr; return 0; } else { return -1; /* no more room, stop walking the stack */ } } extern int sysctl_perf_event_paranoid; extern int sysctl_perf_event_mlock; extern int sysctl_perf_event_sample_rate; extern int sysctl_perf_cpu_time_max_percent; extern void perf_sample_event_took(u64 sample_len_ns); int perf_proc_update_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); int perf_event_max_stack_handler(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); /* Access to perf_event_open(2) syscall. */ #define PERF_SECURITY_OPEN 0 /* Finer grained perf_event_open(2) access control. */ #define PERF_SECURITY_CPU 1 #define PERF_SECURITY_KERNEL 2 #define PERF_SECURITY_TRACEPOINT 3 #define PERF_SECURITY_MAX 4 static inline bool perf_paranoid_any(void) { return sysctl_perf_event_paranoid >= PERF_SECURITY_MAX; } static inline int perf_is_paranoid(void) { return sysctl_perf_event_paranoid > -1; } static inline int perf_allow_kernel(struct perf_event_attr *attr) { if (sysctl_perf_event_paranoid > 1 && !perfmon_capable()) return -EACCES; return security_perf_event_open(attr, PERF_SECURITY_KERNEL); } static inline int perf_allow_cpu(struct perf_event_attr *attr) { if (sysctl_perf_event_paranoid > 0 && !perfmon_capable()) return -EACCES; return security_perf_event_open(attr, PERF_SECURITY_CPU); } static inline int perf_allow_tracepoint(struct perf_event_attr *attr) { if (sysctl_perf_event_paranoid > -1 && !perfmon_capable()) return -EPERM; return security_perf_event_open(attr, PERF_SECURITY_TRACEPOINT); } extern void perf_event_init(void); extern void perf_tp_event(u16 event_type, u64 count, void *record, int entry_size, struct pt_regs *regs, struct hlist_head *head, int rctx, struct task_struct *task); extern void perf_bp_event(struct perf_event *event, void *data); #ifndef perf_misc_flags # define perf_misc_flags(regs) \ (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) # define perf_instruction_pointer(regs) instruction_pointer(regs) #endif #ifndef perf_arch_bpf_user_pt_regs # define perf_arch_bpf_user_pt_regs(regs) regs #endif static inline bool has_branch_stack(struct perf_event *event) { return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; } static inline bool needs_branch_stack(struct perf_event *event) { return event->attr.branch_sample_type != 0; } static inline bool has_aux(struct perf_event *event) { return event->pmu->setup_aux; } static inline bool is_write_backward(struct perf_event *event) { return !!event->attr.write_backward; } static inline bool has_addr_filter(struct perf_event *event) { return event->pmu->nr_addr_filters; } /* * An inherited event uses parent's filters */ static inline struct perf_addr_filters_head * perf_event_addr_filters(struct perf_event *event) { struct perf_addr_filters_head *ifh = &event->addr_filters; if (event->parent) ifh = &event->parent->addr_filters; return ifh; } extern void perf_event_addr_filters_sync(struct perf_event *event); extern int perf_output_begin(struct perf_output_handle *handle, struct perf_sample_data *data, struct perf_event *event, unsigned int size); extern int perf_output_begin_forward(struct perf_output_handle *handle, struct perf_sample_data *data, struct perf_event *event, unsigned int size); extern int perf_output_begin_backward(struct perf_output_handle *handle, struct perf_sample_data *data, struct perf_event *event, unsigned int size); extern void perf_output_end(struct perf_output_handle *handle); extern unsigned int perf_output_copy(struct perf_output_handle *handle, const void *buf, unsigned int len); extern unsigned int perf_output_skip(struct perf_output_handle *handle, unsigned int len); extern long perf_output_copy_aux(struct perf_output_handle *aux_handle, struct perf_output_handle *handle, unsigned long from, unsigned long to); extern int perf_swevent_get_recursion_context(void); extern void perf_swevent_put_recursion_context(int rctx); extern u64 perf_swevent_set_period(struct perf_event *event); extern void perf_event_enable(struct perf_event *event); extern void perf_event_disable(struct perf_event *event); extern void perf_event_disable_local(struct perf_event *event); extern void perf_event_disable_inatomic(struct perf_event *event); extern void perf_event_task_tick(void); extern int perf_event_account_interrupt(struct perf_event *event); extern int perf_event_period(struct perf_event *event, u64 value); extern u64 perf_event_pause(struct perf_event *event, bool reset); #else /* !CONFIG_PERF_EVENTS: */ static inline void * perf_aux_output_begin(struct perf_output_handle *handle, struct perf_event *event) { return NULL; } static inline void perf_aux_output_end(struct perf_output_handle *handle, unsigned long size) { } static inline int perf_aux_output_skip(struct perf_output_handle *handle, unsigned long size) { return -EINVAL; } static inline void * perf_get_aux(struct perf_output_handle *handle) { return NULL; } static inline void perf_event_task_migrate(struct task_struct *task) { } static inline void perf_event_task_sched_in(struct task_struct *prev, struct task_struct *task) { } static inline void perf_event_task_sched_out(struct task_struct *prev, struct task_struct *next) { } static inline int perf_event_init_task(struct task_struct *child, u64 clone_flags) { return 0; } static inline void perf_event_exit_task(struct task_struct *child) { } static inline void perf_event_free_task(struct task_struct *task) { } static inline void perf_event_delayed_put(struct task_struct *task) { } static inline struct file *perf_event_get(unsigned int fd) { return ERR_PTR(-EINVAL); } static inline const struct perf_event *perf_get_event(struct file *file) { return ERR_PTR(-EINVAL); } static inline const struct perf_event_attr *perf_event_attrs(struct perf_event *event) { return ERR_PTR(-EINVAL); } static inline int perf_event_read_local(struct perf_event *event, u64 *value, u64 *enabled, u64 *running) { return -EINVAL; } static inline void perf_event_print_debug(void) { } static inline int perf_event_task_disable(void) { return -EINVAL; } static inline int perf_event_task_enable(void) { return -EINVAL; } static inline int perf_event_refresh(struct perf_event *event, int refresh) { return -EINVAL; } static inline void perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } static inline void perf_bp_event(struct perf_event *event, void *data) { } static inline int perf_register_guest_info_callbacks (struct perf_guest_info_callbacks *callbacks) { return 0; } static inline int perf_unregister_guest_info_callbacks (struct perf_guest_info_callbacks *callbacks) { return 0; } static inline void perf_event_mmap(struct vm_area_struct *vma) { } typedef int (perf_ksymbol_get_name_f)(char *name, int name_len, void *data); static inline void perf_event_ksymbol(u16 ksym_type, u64 addr, u32 len, bool unregister, const char *sym) { } static inline void perf_event_bpf_event(struct bpf_prog *prog, enum perf_bpf_event_type type, u16 flags) { } static inline void perf_event_exec(void) { } static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } static inline void perf_event_namespaces(struct task_struct *tsk) { } static inline void perf_event_fork(struct task_struct *tsk) { } static inline void perf_event_text_poke(const void *addr, const void *old_bytes, size_t old_len, const void *new_bytes, size_t new_len) { } static inline void perf_event_init(void) { } static inline int perf_swevent_get_recursion_context(void) { return -1; } static inline void perf_swevent_put_recursion_context(int rctx) { } static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } static inline void perf_event_enable(struct perf_event *event) { } static inline void perf_event_disable(struct perf_event *event) { } static inline int __perf_event_disable(void *info) { return -1; } static inline void perf_event_task_tick(void) { } static inline int perf_event_release_kernel(struct perf_event *event) { return 0; } static inline int perf_event_period(struct perf_event *event, u64 value) { return -EINVAL; } static inline u64 perf_event_pause(struct perf_event *event, bool reset) { return 0; } #endif #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) extern void perf_restore_debug_store(void); #else static inline void perf_restore_debug_store(void) { } #endif static __always_inline bool perf_raw_frag_last(const struct perf_raw_frag *frag) { return frag->pad < sizeof(u64); } #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) struct perf_pmu_events_attr { struct device_attribute attr; u64 id; const char *event_str; }; struct perf_pmu_events_ht_attr { struct device_attribute attr; u64 id; const char *event_str_ht; const char *event_str_noht; }; struct perf_pmu_events_hybrid_attr { struct device_attribute attr; u64 id; const char *event_str; u64 pmu_type; }; struct perf_pmu_format_hybrid_attr { struct device_attribute attr; u64 pmu_type; }; ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr, char *page); #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ static struct perf_pmu_events_attr _var = { \ .attr = __ATTR(_name, 0444, _show, NULL), \ .id = _id, \ }; #define PMU_EVENT_ATTR_STRING(_name, _var, _str) \ static struct perf_pmu_events_attr _var = { \ .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \ .id = 0, \ .event_str = _str, \ }; #define PMU_EVENT_ATTR_ID(_name, _show, _id) \ (&((struct perf_pmu_events_attr[]) { \ { .attr = __ATTR(_name, 0444, _show, NULL), \ .id = _id, } \ })[0].attr.attr) #define PMU_FORMAT_ATTR(_name, _format) \ static ssize_t \ _name##_show(struct device *dev, \ struct device_attribute *attr, \ char *page) \ { \ BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ return sprintf(page, _format "\n"); \ } \ \ static struct device_attribute format_attr_##_name = __ATTR_RO(_name) /* Performance counter hotplug functions */ #ifdef CONFIG_PERF_EVENTS int perf_event_init_cpu(unsigned int cpu); int perf_event_exit_cpu(unsigned int cpu); #else #define perf_event_init_cpu NULL #define perf_event_exit_cpu NULL #endif extern void __weak arch_perf_update_userpage(struct perf_event *event, struct perf_event_mmap_page *userpg, u64 now); #ifdef CONFIG_MMU extern __weak u64 arch_perf_get_page_size(struct mm_struct *mm, unsigned long addr); #endif #endif /* _LINUX_PERF_EVENT_H */ PK ! ��{�Ě Ě rcupdate.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Read-Copy Update mechanism for mutual exclusion * * Copyright IBM Corporation, 2001 * * Author: Dipankar Sarma <dipankar@in.ibm.com> * * Based on the original work by Paul McKenney <paulmck@vnet.ibm.com> * and inputs from Rusty Russell, Andrea Arcangeli and Andi Kleen. * Papers: * http://www.rdrop.com/users/paulmck/paper/rclockpdcsproof.pdf * http://lse.sourceforge.net/locking/rclock_OLS.2001.05.01c.sc.pdf (OLS2001) * * For detailed explanation of Read-Copy Update mechanism see - * http://lse.sourceforge.net/locking/rcupdate.html * */ #ifndef __LINUX_RCUPDATE_H #define __LINUX_RCUPDATE_H #include <linux/types.h> #include <linux/compiler.h> #include <linux/atomic.h> #include <linux/irqflags.h> #include <linux/preempt.h> #include <linux/bottom_half.h> #include <linux/lockdep.h> #include <linux/cleanup.h> #include <asm/processor.h> #include <linux/cpumask.h> #define ULONG_CMP_GE(a, b) (ULONG_MAX / 2 >= (a) - (b)) #define ULONG_CMP_LT(a, b) (ULONG_MAX / 2 < (a) - (b)) #define ulong2long(a) (*(long *)(&(a))) #define USHORT_CMP_GE(a, b) (USHRT_MAX / 2 >= (unsigned short)((a) - (b))) #define USHORT_CMP_LT(a, b) (USHRT_MAX / 2 < (unsigned short)((a) - (b))) /* Exported common interfaces */ void call_rcu(struct rcu_head *head, rcu_callback_t func); void rcu_barrier_tasks(void); void rcu_barrier_tasks_rude(void); void synchronize_rcu(void); #ifdef CONFIG_PREEMPT_RCU void __rcu_read_lock(void); void __rcu_read_unlock(void); /* * Defined as a macro as it is a very low level header included from * areas that don't even know about current. This gives the rcu_read_lock() * nesting depth, but makes sense only if CONFIG_PREEMPT_RCU -- in other * types of kernel builds, the rcu_read_lock() nesting depth is unknowable. */ #define rcu_preempt_depth() READ_ONCE(current->rcu_read_lock_nesting) #else /* #ifdef CONFIG_PREEMPT_RCU */ #ifdef CONFIG_TINY_RCU #define rcu_read_unlock_strict() do { } while (0) #else void rcu_read_unlock_strict(void); #endif static inline void __rcu_read_lock(void) { preempt_disable(); } static inline void __rcu_read_unlock(void) { preempt_enable(); rcu_read_unlock_strict(); } static inline int rcu_preempt_depth(void) { return 0; } #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ /* Internal to kernel */ void rcu_init(void); extern int rcu_scheduler_active __read_mostly; void rcu_sched_clock_irq(int user); void rcu_report_dead(unsigned int cpu); void rcutree_migrate_callbacks(int cpu); #ifdef CONFIG_TASKS_RCU_GENERIC void rcu_init_tasks_generic(void); #else static inline void rcu_init_tasks_generic(void) { } #endif #ifdef CONFIG_RCU_STALL_COMMON void rcu_sysrq_start(void); void rcu_sysrq_end(void); #else /* #ifdef CONFIG_RCU_STALL_COMMON */ static inline void rcu_sysrq_start(void) { } static inline void rcu_sysrq_end(void) { } #endif /* #else #ifdef CONFIG_RCU_STALL_COMMON */ #ifdef CONFIG_NO_HZ_FULL void rcu_user_enter(void); void rcu_user_exit(void); #else static inline void rcu_user_enter(void) { } static inline void rcu_user_exit(void) { } #endif /* CONFIG_NO_HZ_FULL */ #ifdef CONFIG_RCU_NOCB_CPU void rcu_init_nohz(void); int rcu_nocb_cpu_offload(int cpu); int rcu_nocb_cpu_deoffload(int cpu); void rcu_nocb_flush_deferred_wakeup(void); #else /* #ifdef CONFIG_RCU_NOCB_CPU */ static inline void rcu_init_nohz(void) { } static inline int rcu_nocb_cpu_offload(int cpu) { return -EINVAL; } static inline int rcu_nocb_cpu_deoffload(int cpu) { return 0; } static inline void rcu_nocb_flush_deferred_wakeup(void) { } #endif /* #else #ifdef CONFIG_RCU_NOCB_CPU */ /** * RCU_NONIDLE - Indicate idle-loop code that needs RCU readers * @a: Code that RCU needs to pay attention to. * * RCU read-side critical sections are forbidden in the inner idle loop, * that is, between the rcu_idle_enter() and the rcu_idle_exit() -- RCU * will happily ignore any such read-side critical sections. However, * things like powertop need tracepoints in the inner idle loop. * * This macro provides the way out: RCU_NONIDLE(do_something_with_RCU()) * will tell RCU that it needs to pay attention, invoke its argument * (in this example, calling the do_something_with_RCU() function), * and then tell RCU to go back to ignoring this CPU. It is permissible * to nest RCU_NONIDLE() wrappers, but not indefinitely (but the limit is * on the order of a million or so, even on 32-bit systems). It is * not legal to block within RCU_NONIDLE(), nor is it permissible to * transfer control either into or out of RCU_NONIDLE()'s statement. */ #define RCU_NONIDLE(a) \ do { \ rcu_irq_enter_irqson(); \ do { a; } while (0); \ rcu_irq_exit_irqson(); \ } while (0) /* * Note a quasi-voluntary context switch for RCU-tasks's benefit. * This is a macro rather than an inline function to avoid #include hell. */ #ifdef CONFIG_TASKS_RCU_GENERIC # ifdef CONFIG_TASKS_RCU # define rcu_tasks_classic_qs(t, preempt) \ do { \ if (!(preempt) && READ_ONCE((t)->rcu_tasks_holdout)) \ WRITE_ONCE((t)->rcu_tasks_holdout, false); \ } while (0) void call_rcu_tasks(struct rcu_head *head, rcu_callback_t func); void synchronize_rcu_tasks(void); # else # define rcu_tasks_classic_qs(t, preempt) do { } while (0) # define call_rcu_tasks call_rcu # define synchronize_rcu_tasks synchronize_rcu # endif # ifdef CONFIG_TASKS_TRACE_RCU # define rcu_tasks_trace_qs(t) \ do { \ if (!likely(READ_ONCE((t)->trc_reader_checked)) && \ !unlikely(READ_ONCE((t)->trc_reader_nesting))) { \ smp_store_release(&(t)->trc_reader_checked, true); \ smp_mb(); /* Readers partitioned by store. */ \ } \ } while (0) # else # define rcu_tasks_trace_qs(t) do { } while (0) # endif #define rcu_tasks_qs(t, preempt) \ do { \ rcu_tasks_classic_qs((t), (preempt)); \ rcu_tasks_trace_qs((t)); \ } while (0) # ifdef CONFIG_TASKS_RUDE_RCU void call_rcu_tasks_rude(struct rcu_head *head, rcu_callback_t func); void synchronize_rcu_tasks_rude(void); # endif #define rcu_note_voluntary_context_switch(t) rcu_tasks_qs(t, false) void exit_tasks_rcu_start(void); void exit_tasks_rcu_stop(void); void exit_tasks_rcu_finish(void); #else /* #ifdef CONFIG_TASKS_RCU_GENERIC */ #define rcu_tasks_qs(t, preempt) do { } while (0) #define rcu_note_voluntary_context_switch(t) do { } while (0) #define call_rcu_tasks call_rcu #define synchronize_rcu_tasks synchronize_rcu static inline void exit_tasks_rcu_start(void) { } static inline void exit_tasks_rcu_stop(void) { } static inline void exit_tasks_rcu_finish(void) { } #endif /* #else #ifdef CONFIG_TASKS_RCU_GENERIC */ /** * rcu_trace_implies_rcu_gp - does an RCU Tasks Trace grace period imply an RCU grace period? * * As an accident of implementation, an RCU Tasks Trace grace period also * acts as an RCU grace period. However, this could change at any time. * Code relying on this accident must call this function to verify that * this accident is still happening. * * You have been warned! */ static inline bool rcu_trace_implies_rcu_gp(void) { return true; } /** * cond_resched_tasks_rcu_qs - Report potential quiescent states to RCU * * This macro resembles cond_resched(), except that it is defined to * report potential quiescent states to RCU-tasks even if the cond_resched() * machinery were to be shut off, as some advocate for PREEMPTION kernels. */ #define cond_resched_tasks_rcu_qs() \ do { \ rcu_tasks_qs(current, false); \ cond_resched(); \ } while (0) /** * rcu_softirq_qs_periodic - Report RCU and RCU-Tasks quiescent states * @old_ts: jiffies at start of processing. * * This helper is for long-running softirq handlers, such as NAPI threads in * networking. The caller should initialize the variable passed in as @old_ts * at the beginning of the softirq handler. When invoked frequently, this macro * will invoke rcu_softirq_qs() every 100 milliseconds thereafter, which will * provide both RCU and RCU-Tasks quiescent states. Note that this macro * modifies its old_ts argument. * * Because regions of code that have disabled softirq act as RCU read-side * critical sections, this macro should be invoked with softirq (and * preemption) enabled. * * The macro is not needed when CONFIG_PREEMPT_RT is defined. RT kernels would * have more chance to invoke schedule() calls and provide necessary quiescent * states. As a contrast, calling cond_resched() only won't achieve the same * effect because cond_resched() does not provide RCU-Tasks quiescent states. */ #define rcu_softirq_qs_periodic(old_ts) \ do { \ if (!IS_ENABLED(CONFIG_PREEMPT_RT) && \ time_after(jiffies, (old_ts) + HZ / 10)) { \ preempt_disable(); \ rcu_softirq_qs(); \ preempt_enable(); \ (old_ts) = jiffies; \ } \ } while (0) /* * Infrastructure to implement the synchronize_() primitives in * TREE_RCU and rcu_barrier_() primitives in TINY_RCU. */ #if defined(CONFIG_TREE_RCU) #include <linux/rcutree.h> #elif defined(CONFIG_TINY_RCU) #include <linux/rcutiny.h> #else #error "Unknown RCU implementation specified to kernel configuration" #endif /* * The init_rcu_head_on_stack() and destroy_rcu_head_on_stack() calls * are needed for dynamic initialization and destruction of rcu_head * on the stack, and init_rcu_head()/destroy_rcu_head() are needed for * dynamic initialization and destruction of statically allocated rcu_head * structures. However, rcu_head structures allocated dynamically in the * heap don't need any initialization. */ #ifdef CONFIG_DEBUG_OBJECTS_RCU_HEAD void init_rcu_head(struct rcu_head *head); void destroy_rcu_head(struct rcu_head *head); void init_rcu_head_on_stack(struct rcu_head *head); void destroy_rcu_head_on_stack(struct rcu_head *head); #else /* !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ static inline void init_rcu_head(struct rcu_head *head) { } static inline void destroy_rcu_head(struct rcu_head *head) { } static inline void init_rcu_head_on_stack(struct rcu_head *head) { } static inline void destroy_rcu_head_on_stack(struct rcu_head *head) { } #endif /* #else !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PROVE_RCU) bool rcu_lockdep_current_cpu_online(void); #else /* #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PROVE_RCU) */ static inline bool rcu_lockdep_current_cpu_online(void) { return true; } #endif /* #else #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PROVE_RCU) */ extern struct lockdep_map rcu_lock_map; extern struct lockdep_map rcu_bh_lock_map; extern struct lockdep_map rcu_sched_lock_map; extern struct lockdep_map rcu_callback_map; #ifdef CONFIG_DEBUG_LOCK_ALLOC static inline void rcu_lock_acquire(struct lockdep_map *map) { lock_acquire(map, 0, 0, 2, 0, NULL, _THIS_IP_); } static inline void rcu_lock_release(struct lockdep_map *map) { lock_release(map, _THIS_IP_); } int debug_lockdep_rcu_enabled(void); int rcu_read_lock_held(void); int rcu_read_lock_bh_held(void); int rcu_read_lock_sched_held(void); int rcu_read_lock_any_held(void); #else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ # define rcu_lock_acquire(a) do { } while (0) # define rcu_lock_release(a) do { } while (0) static inline int rcu_read_lock_held(void) { return 1; } static inline int rcu_read_lock_bh_held(void) { return 1; } static inline int rcu_read_lock_sched_held(void) { return !preemptible(); } static inline int rcu_read_lock_any_held(void) { return !preemptible(); } #endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ #ifdef CONFIG_PROVE_RCU /** * RCU_LOCKDEP_WARN - emit lockdep splat if specified condition is met * @c: condition to check * @s: informative message * * This checks debug_lockdep_rcu_enabled() before checking (c) to * prevent early boot splats due to lockdep not yet being initialized, * and rechecks it after checking (c) to prevent false-positive splats * due to races with lockdep being disabled. See commit 3066820034b5dd * ("rcu: Reject RCU_LOCKDEP_WARN() false positives") for more detail. */ #define RCU_LOCKDEP_WARN(c, s) \ do { \ static bool __section(".data.unlikely") __warned; \ if (debug_lockdep_rcu_enabled() && (c) && \ debug_lockdep_rcu_enabled() && !__warned) { \ __warned = true; \ lockdep_rcu_suspicious(__FILE__, __LINE__, s); \ } \ } while (0) #if defined(CONFIG_PROVE_RCU) && !defined(CONFIG_PREEMPT_RCU) static inline void rcu_preempt_sleep_check(void) { RCU_LOCKDEP_WARN(lock_is_held(&rcu_lock_map), "Illegal context switch in RCU read-side critical section"); } #else /* #ifdef CONFIG_PROVE_RCU */ static inline void rcu_preempt_sleep_check(void) { } #endif /* #else #ifdef CONFIG_PROVE_RCU */ #define rcu_sleep_check() \ do { \ rcu_preempt_sleep_check(); \ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) \ RCU_LOCKDEP_WARN(lock_is_held(&rcu_bh_lock_map), \ "Illegal context switch in RCU-bh read-side critical section"); \ RCU_LOCKDEP_WARN(lock_is_held(&rcu_sched_lock_map), \ "Illegal context switch in RCU-sched read-side critical section"); \ } while (0) #else /* #ifdef CONFIG_PROVE_RCU */ #define RCU_LOCKDEP_WARN(c, s) do { } while (0 && (c)) #define rcu_sleep_check() do { } while (0) #endif /* #else #ifdef CONFIG_PROVE_RCU */ /* * Helper functions for rcu_dereference_check(), rcu_dereference_protected() * and rcu_assign_pointer(). Some of these could be folded into their * callers, but they are left separate in order to ease introduction of * multiple pointers markings to match different RCU implementations * (e.g., __srcu), should this make sense in the future. */ #ifdef __CHECKER__ #define rcu_check_sparse(p, space) \ ((void)(((typeof(*p) space *)p) == p)) #else /* #ifdef __CHECKER__ */ #define rcu_check_sparse(p, space) #endif /* #else #ifdef __CHECKER__ */ /** * unrcu_pointer - mark a pointer as not being RCU protected * @p: pointer needing to lose its __rcu property * * Converts @p from an __rcu pointer to a __kernel pointer. * This allows an __rcu pointer to be used with xchg() and friends. */ #define unrcu_pointer(p) \ ({ \ typeof(*p) *_________p1 = (typeof(*p) *__force)(p); \ rcu_check_sparse(p, __rcu); \ ((typeof(*p) __force __kernel *)(_________p1)); \ }) #define __rcu_access_pointer(p, space) \ ({ \ typeof(*p) *_________p1 = (typeof(*p) *__force)READ_ONCE(p); \ rcu_check_sparse(p, space); \ ((typeof(*p) __force __kernel *)(_________p1)); \ }) #define __rcu_dereference_check(p, c, space) \ ({ \ /* Dependency order vs. p above. */ \ typeof(*p) *________p1 = (typeof(*p) *__force)READ_ONCE(p); \ RCU_LOCKDEP_WARN(!(c), "suspicious rcu_dereference_check() usage"); \ rcu_check_sparse(p, space); \ ((typeof(*p) __force __kernel *)(________p1)); \ }) #define __rcu_dereference_protected(p, c, space) \ ({ \ RCU_LOCKDEP_WARN(!(c), "suspicious rcu_dereference_protected() usage"); \ rcu_check_sparse(p, space); \ ((typeof(*p) __force __kernel *)(p)); \ }) #define rcu_dereference_raw(p) \ ({ \ /* Dependency order vs. p above. */ \ typeof(p) ________p1 = READ_ONCE(p); \ ((typeof(*p) __force __kernel *)(________p1)); \ }) /** * RCU_INITIALIZER() - statically initialize an RCU-protected global variable * @v: The value to statically initialize with. */ #define RCU_INITIALIZER(v) (typeof(*(v)) __force __rcu *)(v) /** * rcu_assign_pointer() - assign to RCU-protected pointer * @p: pointer to assign to * @v: value to assign (publish) * * Assigns the specified value to the specified RCU-protected * pointer, ensuring that any concurrent RCU readers will see * any prior initialization. * * Inserts memory barriers on architectures that require them * (which is most of them), and also prevents the compiler from * reordering the code that initializes the structure after the pointer * assignment. More importantly, this call documents which pointers * will be dereferenced by RCU read-side code. * * In some special cases, you may use RCU_INIT_POINTER() instead * of rcu_assign_pointer(). RCU_INIT_POINTER() is a bit faster due * to the fact that it does not constrain either the CPU or the compiler. * That said, using RCU_INIT_POINTER() when you should have used * rcu_assign_pointer() is a very bad thing that results in * impossible-to-diagnose memory corruption. So please be careful. * See the RCU_INIT_POINTER() comment header for details. * * Note that rcu_assign_pointer() evaluates each of its arguments only * once, appearances notwithstanding. One of the "extra" evaluations * is in typeof() and the other visible only to sparse (__CHECKER__), * neither of which actually execute the argument. As with most cpp * macros, this execute-arguments-only-once property is important, so * please be careful when making changes to rcu_assign_pointer() and the * other macros that it invokes. */ #define rcu_assign_pointer(p, v) \ do { \ uintptr_t _r_a_p__v = (uintptr_t)(v); \ rcu_check_sparse(p, __rcu); \ \ if (__builtin_constant_p(v) && (_r_a_p__v) == (uintptr_t)NULL) \ WRITE_ONCE((p), (typeof(p))(_r_a_p__v)); \ else \ smp_store_release(&p, RCU_INITIALIZER((typeof(p))_r_a_p__v)); \ } while (0) /** * rcu_replace_pointer() - replace an RCU pointer, returning its old value * @rcu_ptr: RCU pointer, whose old value is returned * @ptr: regular pointer * @c: the lockdep conditions under which the dereference will take place * * Perform a replacement, where @rcu_ptr is an RCU-annotated * pointer and @c is the lockdep argument that is passed to the * rcu_dereference_protected() call used to read that pointer. The old * value of @rcu_ptr is returned, and @rcu_ptr is set to @ptr. */ #define rcu_replace_pointer(rcu_ptr, ptr, c) \ ({ \ typeof(ptr) __tmp = rcu_dereference_protected((rcu_ptr), (c)); \ rcu_assign_pointer((rcu_ptr), (ptr)); \ __tmp; \ }) /** * rcu_access_pointer() - fetch RCU pointer with no dereferencing * @p: The pointer to read * * Return the value of the specified RCU-protected pointer, but omit the * lockdep checks for being in an RCU read-side critical section. This is * useful when the value of this pointer is accessed, but the pointer is * not dereferenced, for example, when testing an RCU-protected pointer * against NULL. Although rcu_access_pointer() may also be used in cases * where update-side locks prevent the value of the pointer from changing, * you should instead use rcu_dereference_protected() for this use case. * * It is also permissible to use rcu_access_pointer() when read-side * access to the pointer was removed at least one grace period ago, as * is the case in the context of the RCU callback that is freeing up * the data, or after a synchronize_rcu() returns. This can be useful * when tearing down multi-linked structures after a grace period * has elapsed. */ #define rcu_access_pointer(p) __rcu_access_pointer((p), __rcu) /** * rcu_dereference_check() - rcu_dereference with debug checking * @p: The pointer to read, prior to dereferencing * @c: The conditions under which the dereference will take place * * Do an rcu_dereference(), but check that the conditions under which the * dereference will take place are correct. Typically the conditions * indicate the various locking conditions that should be held at that * point. The check should return true if the conditions are satisfied. * An implicit check for being in an RCU read-side critical section * (rcu_read_lock()) is included. * * For example: * * bar = rcu_dereference_check(foo->bar, lockdep_is_held(&foo->lock)); * * could be used to indicate to lockdep that foo->bar may only be dereferenced * if either rcu_read_lock() is held, or that the lock required to replace * the bar struct at foo->bar is held. * * Note that the list of conditions may also include indications of when a lock * need not be held, for example during initialisation or destruction of the * target struct: * * bar = rcu_dereference_check(foo->bar, lockdep_is_held(&foo->lock) || * atomic_read(&foo->usage) == 0); * * Inserts memory barriers on architectures that require them * (currently only the Alpha), prevents the compiler from refetching * (and from merging fetches), and, more importantly, documents exactly * which pointers are protected by RCU and checks that the pointer is * annotated as __rcu. */ #define rcu_dereference_check(p, c) \ __rcu_dereference_check((p), (c) || rcu_read_lock_held(), __rcu) /** * rcu_dereference_bh_check() - rcu_dereference_bh with debug checking * @p: The pointer to read, prior to dereferencing * @c: The conditions under which the dereference will take place * * This is the RCU-bh counterpart to rcu_dereference_check(). However, * please note that starting in v5.0 kernels, vanilla RCU grace periods * wait for local_bh_disable() regions of code in addition to regions of * code demarked by rcu_read_lock() and rcu_read_unlock(). This means * that synchronize_rcu(), call_rcu, and friends all take not only * rcu_read_lock() but also rcu_read_lock_bh() into account. */ #define rcu_dereference_bh_check(p, c) \ __rcu_dereference_check((p), (c) || rcu_read_lock_bh_held(), __rcu) /** * rcu_dereference_sched_check() - rcu_dereference_sched with debug checking * @p: The pointer to read, prior to dereferencing * @c: The conditions under which the dereference will take place * * This is the RCU-sched counterpart to rcu_dereference_check(). * However, please note that starting in v5.0 kernels, vanilla RCU grace * periods wait for preempt_disable() regions of code in addition to * regions of code demarked by rcu_read_lock() and rcu_read_unlock(). * This means that synchronize_rcu(), call_rcu, and friends all take not * only rcu_read_lock() but also rcu_read_lock_sched() into account. */ #define rcu_dereference_sched_check(p, c) \ __rcu_dereference_check((p), (c) || rcu_read_lock_sched_held(), \ __rcu) /* * The tracing infrastructure traces RCU (we want that), but unfortunately * some of the RCU checks causes tracing to lock up the system. * * The no-tracing version of rcu_dereference_raw() must not call * rcu_read_lock_held(). */ #define rcu_dereference_raw_check(p) __rcu_dereference_check((p), 1, __rcu) /** * rcu_dereference_protected() - fetch RCU pointer when updates prevented * @p: The pointer to read, prior to dereferencing * @c: The conditions under which the dereference will take place * * Return the value of the specified RCU-protected pointer, but omit * the READ_ONCE(). This is useful in cases where update-side locks * prevent the value of the pointer from changing. Please note that this * primitive does *not* prevent the compiler from repeating this reference * or combining it with other references, so it should not be used without * protection of appropriate locks. * * This function is only for update-side use. Using this function * when protected only by rcu_read_lock() will result in infrequent * but very ugly failures. */ #define rcu_dereference_protected(p, c) \ __rcu_dereference_protected((p), (c), __rcu) /** * rcu_dereference() - fetch RCU-protected pointer for dereferencing * @p: The pointer to read, prior to dereferencing * * This is a simple wrapper around rcu_dereference_check(). */ #define rcu_dereference(p) rcu_dereference_check(p, 0) /** * rcu_dereference_bh() - fetch an RCU-bh-protected pointer for dereferencing * @p: The pointer to read, prior to dereferencing * * Makes rcu_dereference_check() do the dirty work. */ #define rcu_dereference_bh(p) rcu_dereference_bh_check(p, 0) /** * rcu_dereference_sched() - fetch RCU-sched-protected pointer for dereferencing * @p: The pointer to read, prior to dereferencing * * Makes rcu_dereference_check() do the dirty work. */ #define rcu_dereference_sched(p) rcu_dereference_sched_check(p, 0) /** * rcu_pointer_handoff() - Hand off a pointer from RCU to other mechanism * @p: The pointer to hand off * * This is simply an identity function, but it documents where a pointer * is handed off from RCU to some other synchronization mechanism, for * example, reference counting or locking. In C11, it would map to * kill_dependency(). It could be used as follows:: * * rcu_read_lock(); * p = rcu_dereference(gp); * long_lived = is_long_lived(p); * if (long_lived) { * if (!atomic_inc_not_zero(p->refcnt)) * long_lived = false; * else * p = rcu_pointer_handoff(p); * } * rcu_read_unlock(); */ #define rcu_pointer_handoff(p) (p) /** * rcu_read_lock() - mark the beginning of an RCU read-side critical section * * When synchronize_rcu() is invoked on one CPU while other CPUs * are within RCU read-side critical sections, then the * synchronize_rcu() is guaranteed to block until after all the other * CPUs exit their critical sections. Similarly, if call_rcu() is invoked * on one CPU while other CPUs are within RCU read-side critical * sections, invocation of the corresponding RCU callback is deferred * until after the all the other CPUs exit their critical sections. * * In v5.0 and later kernels, synchronize_rcu() and call_rcu() also * wait for regions of code with preemption disabled, including regions of * code with interrupts or softirqs disabled. In pre-v5.0 kernels, which * define synchronize_sched(), only code enclosed within rcu_read_lock() * and rcu_read_unlock() are guaranteed to be waited for. * * Note, however, that RCU callbacks are permitted to run concurrently * with new RCU read-side critical sections. One way that this can happen * is via the following sequence of events: (1) CPU 0 enters an RCU * read-side critical section, (2) CPU 1 invokes call_rcu() to register * an RCU callback, (3) CPU 0 exits the RCU read-side critical section, * (4) CPU 2 enters a RCU read-side critical section, (5) the RCU * callback is invoked. This is legal, because the RCU read-side critical * section that was running concurrently with the call_rcu() (and which * therefore might be referencing something that the corresponding RCU * callback would free up) has completed before the corresponding * RCU callback is invoked. * * RCU read-side critical sections may be nested. Any deferred actions * will be deferred until the outermost RCU read-side critical section * completes. * * You can avoid reading and understanding the next paragraph by * following this rule: don't put anything in an rcu_read_lock() RCU * read-side critical section that would block in a !PREEMPTION kernel. * But if you want the full story, read on! * * In non-preemptible RCU implementations (pure TREE_RCU and TINY_RCU), * it is illegal to block while in an RCU read-side critical section. * In preemptible RCU implementations (PREEMPT_RCU) in CONFIG_PREEMPTION * kernel builds, RCU read-side critical sections may be preempted, * but explicit blocking is illegal. Finally, in preemptible RCU * implementations in real-time (with -rt patchset) kernel builds, RCU * read-side critical sections may be preempted and they may also block, but * only when acquiring spinlocks that are subject to priority inheritance. */ static __always_inline void rcu_read_lock(void) { __rcu_read_lock(); __acquire(RCU); rcu_lock_acquire(&rcu_lock_map); RCU_LOCKDEP_WARN(!rcu_is_watching(), "rcu_read_lock() used illegally while idle"); } /* * So where is rcu_write_lock()? It does not exist, as there is no * way for writers to lock out RCU readers. This is a feature, not * a bug -- this property is what provides RCU's performance benefits. * Of course, writers must coordinate with each other. The normal * spinlock primitives work well for this, but any other technique may be * used as well. RCU does not care how the writers keep out of each * others' way, as long as they do so. */ /** * rcu_read_unlock() - marks the end of an RCU read-side critical section. * * In almost all situations, rcu_read_unlock() is immune from deadlock. * In recent kernels that have consolidated synchronize_sched() and * synchronize_rcu_bh() into synchronize_rcu(), this deadlock immunity * also extends to the scheduler's runqueue and priority-inheritance * spinlocks, courtesy of the quiescent-state deferral that is carried * out when rcu_read_unlock() is invoked with interrupts disabled. * * See rcu_read_lock() for more information. */ static inline void rcu_read_unlock(void) { RCU_LOCKDEP_WARN(!rcu_is_watching(), "rcu_read_unlock() used illegally while idle"); __release(RCU); __rcu_read_unlock(); rcu_lock_release(&rcu_lock_map); /* Keep acq info for rls diags. */ } /** * rcu_read_lock_bh() - mark the beginning of an RCU-bh critical section * * This is equivalent to rcu_read_lock(), but also disables softirqs. * Note that anything else that disables softirqs can also serve as an RCU * read-side critical section. However, please note that this equivalence * applies only to v5.0 and later. Before v5.0, rcu_read_lock() and * rcu_read_lock_bh() were unrelated. * * Note that rcu_read_lock_bh() and the matching rcu_read_unlock_bh() * must occur in the same context, for example, it is illegal to invoke * rcu_read_unlock_bh() from one task if the matching rcu_read_lock_bh() * was invoked from some other task. */ static inline void rcu_read_lock_bh(void) { local_bh_disable(); __acquire(RCU_BH); rcu_lock_acquire(&rcu_bh_lock_map); RCU_LOCKDEP_WARN(!rcu_is_watching(), "rcu_read_lock_bh() used illegally while idle"); } /** * rcu_read_unlock_bh() - marks the end of a softirq-only RCU critical section * * See rcu_read_lock_bh() for more information. */ static inline void rcu_read_unlock_bh(void) { RCU_LOCKDEP_WARN(!rcu_is_watching(), "rcu_read_unlock_bh() used illegally while idle"); rcu_lock_release(&rcu_bh_lock_map); __release(RCU_BH); local_bh_enable(); } /** * rcu_read_lock_sched() - mark the beginning of a RCU-sched critical section * * This is equivalent to rcu_read_lock(), but also disables preemption. * Read-side critical sections can also be introduced by anything else that * disables preemption, including local_irq_disable() and friends. However, * please note that the equivalence to rcu_read_lock() applies only to * v5.0 and later. Before v5.0, rcu_read_lock() and rcu_read_lock_sched() * were unrelated. * * Note that rcu_read_lock_sched() and the matching rcu_read_unlock_sched() * must occur in the same context, for example, it is illegal to invoke * rcu_read_unlock_sched() from process context if the matching * rcu_read_lock_sched() was invoked from an NMI handler. */ static inline void rcu_read_lock_sched(void) { preempt_disable(); __acquire(RCU_SCHED); rcu_lock_acquire(&rcu_sched_lock_map); RCU_LOCKDEP_WARN(!rcu_is_watching(), "rcu_read_lock_sched() used illegally while idle"); } /* Used by lockdep and tracing: cannot be traced, cannot call lockdep. */ static inline notrace void rcu_read_lock_sched_notrace(void) { preempt_disable_notrace(); __acquire(RCU_SCHED); } /** * rcu_read_unlock_sched() - marks the end of a RCU-classic critical section * * See rcu_read_lock_sched() for more information. */ static inline void rcu_read_unlock_sched(void) { RCU_LOCKDEP_WARN(!rcu_is_watching(), "rcu_read_unlock_sched() used illegally while idle"); rcu_lock_release(&rcu_sched_lock_map); __release(RCU_SCHED); preempt_enable(); } /* Used by lockdep and tracing: cannot be traced, cannot call lockdep. */ static inline notrace void rcu_read_unlock_sched_notrace(void) { __release(RCU_SCHED); preempt_enable_notrace(); } /** * RCU_INIT_POINTER() - initialize an RCU protected pointer * @p: The pointer to be initialized. * @v: The value to initialized the pointer to. * * Initialize an RCU-protected pointer in special cases where readers * do not need ordering constraints on the CPU or the compiler. These * special cases are: * * 1. This use of RCU_INIT_POINTER() is NULLing out the pointer *or* * 2. The caller has taken whatever steps are required to prevent * RCU readers from concurrently accessing this pointer *or* * 3. The referenced data structure has already been exposed to * readers either at compile time or via rcu_assign_pointer() *and* * * a. You have not made *any* reader-visible changes to * this structure since then *or* * b. It is OK for readers accessing this structure from its * new location to see the old state of the structure. (For * example, the changes were to statistical counters or to * other state where exact synchronization is not required.) * * Failure to follow these rules governing use of RCU_INIT_POINTER() will * result in impossible-to-diagnose memory corruption. As in the structures * will look OK in crash dumps, but any concurrent RCU readers might * see pre-initialized values of the referenced data structure. So * please be very careful how you use RCU_INIT_POINTER()!!! * * If you are creating an RCU-protected linked structure that is accessed * by a single external-to-structure RCU-protected pointer, then you may * use RCU_INIT_POINTER() to initialize the internal RCU-protected * pointers, but you must use rcu_assign_pointer() to initialize the * external-to-structure pointer *after* you have completely initialized * the reader-accessible portions of the linked structure. * * Note that unlike rcu_assign_pointer(), RCU_INIT_POINTER() provides no * ordering guarantees for either the CPU or the compiler. */ #define RCU_INIT_POINTER(p, v) \ do { \ rcu_check_sparse(p, __rcu); \ WRITE_ONCE(p, RCU_INITIALIZER(v)); \ } while (0) /** * RCU_POINTER_INITIALIZER() - statically initialize an RCU protected pointer * @p: The pointer to be initialized. * @v: The value to initialized the pointer to. * * GCC-style initialization for an RCU-protected pointer in a structure field. */ #define RCU_POINTER_INITIALIZER(p, v) \ .p = RCU_INITIALIZER(v) /* * Does the specified offset indicate that the corresponding rcu_head * structure can be handled by kvfree_rcu()? */ #define __is_kvfree_rcu_offset(offset) ((offset) < 4096) /** * kfree_rcu() - kfree an object after a grace period. * @ptr: pointer to kfree for both single- and double-argument invocations. * @rhf: the name of the struct rcu_head within the type of @ptr, * but only for double-argument invocations. * * Many rcu callbacks functions just call kfree() on the base structure. * These functions are trivial, but their size adds up, and furthermore * when they are used in a kernel module, that module must invoke the * high-latency rcu_barrier() function at module-unload time. * * The kfree_rcu() function handles this issue. Rather than encoding a * function address in the embedded rcu_head structure, kfree_rcu() instead * encodes the offset of the rcu_head structure within the base structure. * Because the functions are not allowed in the low-order 4096 bytes of * kernel virtual memory, offsets up to 4095 bytes can be accommodated. * If the offset is larger than 4095 bytes, a compile-time error will * be generated in kvfree_rcu_arg_2(). If this error is triggered, you can * either fall back to use of call_rcu() or rearrange the structure to * position the rcu_head structure into the first 4096 bytes. * * Note that the allowable offset might decrease in the future, for example, * to allow something like kmem_cache_free_rcu(). * * The BUILD_BUG_ON check must not involve any function calls, hence the * checks are done in macros here. */ #define kfree_rcu(ptr, rhf...) kvfree_rcu(ptr, ## rhf) /** * kvfree_rcu() - kvfree an object after a grace period. * * This macro consists of one or two arguments and it is * based on whether an object is head-less or not. If it * has a head then a semantic stays the same as it used * to be before: * * kvfree_rcu(ptr, rhf); * * where @ptr is a pointer to kvfree(), @rhf is the name * of the rcu_head structure within the type of @ptr. * * When it comes to head-less variant, only one argument * is passed and that is just a pointer which has to be * freed after a grace period. Therefore the semantic is * * kvfree_rcu(ptr); * * where @ptr is a pointer to kvfree(). * * Please note, head-less way of freeing is permitted to * use from a context that has to follow might_sleep() * annotation. Otherwise, please switch and embed the * rcu_head structure within the type of @ptr. */ #define kvfree_rcu(...) KVFREE_GET_MACRO(__VA_ARGS__, \ kvfree_rcu_arg_2, kvfree_rcu_arg_1)(__VA_ARGS__) #define kvfree_rcu_mightsleep(ptr) kvfree_rcu_arg_1(ptr) #define kfree_rcu_mightsleep(ptr) kvfree_rcu_mightsleep(ptr) #define KVFREE_GET_MACRO(_1, _2, NAME, ...) NAME #define kvfree_rcu_arg_2(ptr, rhf) \ do { \ typeof (ptr) ___p = (ptr); \ \ if (___p) { \ BUILD_BUG_ON(!__is_kvfree_rcu_offset(offsetof(typeof(*(ptr)), rhf))); \ kvfree_call_rcu(&((___p)->rhf), (rcu_callback_t)(unsigned long) \ (offsetof(typeof(*(ptr)), rhf))); \ } \ } while (0) #define kvfree_rcu_arg_1(ptr) \ do { \ typeof(ptr) ___p = (ptr); \ \ if (___p) \ kvfree_call_rcu(NULL, (rcu_callback_t) (___p)); \ } while (0) /* * Place this after a lock-acquisition primitive to guarantee that * an UNLOCK+LOCK pair acts as a full barrier. This guarantee applies * if the UNLOCK and LOCK are executed by the same CPU or if the * UNLOCK and LOCK operate on the same lock variable. */ #ifdef CONFIG_ARCH_WEAK_RELEASE_ACQUIRE #define smp_mb__after_unlock_lock() smp_mb() /* Full ordering for lock. */ #else /* #ifdef CONFIG_ARCH_WEAK_RELEASE_ACQUIRE */ #define smp_mb__after_unlock_lock() do { } while (0) #endif /* #else #ifdef CONFIG_ARCH_WEAK_RELEASE_ACQUIRE */ /* Has the specified rcu_head structure been handed to call_rcu()? */ /** * rcu_head_init - Initialize rcu_head for rcu_head_after_call_rcu() * @rhp: The rcu_head structure to initialize. * * If you intend to invoke rcu_head_after_call_rcu() to test whether a * given rcu_head structure has already been passed to call_rcu(), then * you must also invoke this rcu_head_init() function on it just after * allocating that structure. Calls to this function must not race with * calls to call_rcu(), rcu_head_after_call_rcu(), or callback invocation. */ static inline void rcu_head_init(struct rcu_head *rhp) { rhp->func = (rcu_callback_t)~0L; } /** * rcu_head_after_call_rcu() - Has this rcu_head been passed to call_rcu()? * @rhp: The rcu_head structure to test. * @f: The function passed to call_rcu() along with @rhp. * * Returns @true if the @rhp has been passed to call_rcu() with @func, * and @false otherwise. Emits a warning in any other case, including * the case where @rhp has already been invoked after a grace period. * Calls to this function must not race with callback invocation. One way * to avoid such races is to enclose the call to rcu_head_after_call_rcu() * in an RCU read-side critical section that includes a read-side fetch * of the pointer to the structure containing @rhp. */ static inline bool rcu_head_after_call_rcu(struct rcu_head *rhp, rcu_callback_t f) { rcu_callback_t func = READ_ONCE(rhp->func); if (func == f) return true; WARN_ON_ONCE(func != (rcu_callback_t)~0L); return false; } /* kernel/ksysfs.c definitions */ extern int rcu_expedited; extern int rcu_normal; DEFINE_LOCK_GUARD_0(rcu, rcu_read_lock(), rcu_read_unlock()) #endif /* __LINUX_RCUPDATE_H */ PK ! �3"ܹ � skb_array.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Definitions for the 'struct skb_array' datastructure. * * Author: * Michael S. Tsirkin <mst@redhat.com> * * Copyright (C) 2016 Red Hat, Inc. * * Limited-size FIFO of skbs. Can be used more or less whenever * sk_buff_head can be used, except you need to know the queue size in * advance. * Implemented as a type-safe wrapper around ptr_ring. */ #ifndef _LINUX_SKB_ARRAY_H #define _LINUX_SKB_ARRAY_H 1 #ifdef __KERNEL__ #include <linux/ptr_ring.h> #include <linux/skbuff.h> #include <linux/if_vlan.h> #endif struct skb_array { struct ptr_ring ring; }; /* Might be slightly faster than skb_array_full below, but callers invoking * this in a loop must use a compiler barrier, for example cpu_relax(). */ static inline bool __skb_array_full(struct skb_array *a) { return __ptr_ring_full(&a->ring); } static inline bool skb_array_full(struct skb_array *a) { return ptr_ring_full(&a->ring); } static inline int skb_array_produce(struct skb_array *a, struct sk_buff *skb) { return ptr_ring_produce(&a->ring, skb); } static inline int skb_array_produce_irq(struct skb_array *a, struct sk_buff *skb) { return ptr_ring_produce_irq(&a->ring, skb); } static inline int skb_array_produce_bh(struct skb_array *a, struct sk_buff *skb) { return ptr_ring_produce_bh(&a->ring, skb); } static inline int skb_array_produce_any(struct skb_array *a, struct sk_buff *skb) { return ptr_ring_produce_any(&a->ring, skb); } /* Might be slightly faster than skb_array_empty below, but only safe if the * array is never resized. Also, callers invoking this in a loop must take care * to use a compiler barrier, for example cpu_relax(). */ static inline bool __skb_array_empty(struct skb_array *a) { return __ptr_ring_empty(&a->ring); } static inline struct sk_buff *__skb_array_peek(struct skb_array *a) { return __ptr_ring_peek(&a->ring); } static inline bool skb_array_empty(struct skb_array *a) { return ptr_ring_empty(&a->ring); } static inline bool skb_array_empty_bh(struct skb_array *a) { return ptr_ring_empty_bh(&a->ring); } static inline bool skb_array_empty_irq(struct skb_array *a) { return ptr_ring_empty_irq(&a->ring); } static inline bool skb_array_empty_any(struct skb_array *a) { return ptr_ring_empty_any(&a->ring); } static inline struct sk_buff *__skb_array_consume(struct skb_array *a) { return __ptr_ring_consume(&a->ring); } static inline struct sk_buff *skb_array_consume(struct skb_array *a) { return ptr_ring_consume(&a->ring); } static inline int skb_array_consume_batched(struct skb_array *a, struct sk_buff **array, int n) { return ptr_ring_consume_batched(&a->ring, (void **)array, n); } static inline struct sk_buff *skb_array_consume_irq(struct skb_array *a) { return ptr_ring_consume_irq(&a->ring); } static inline int skb_array_consume_batched_irq(struct skb_array *a, struct sk_buff **array, int n) { return ptr_ring_consume_batched_irq(&a->ring, (void **)array, n); } static inline struct sk_buff *skb_array_consume_any(struct skb_array *a) { return ptr_ring_consume_any(&a->ring); } static inline int skb_array_consume_batched_any(struct skb_array *a, struct sk_buff **array, int n) { return ptr_ring_consume_batched_any(&a->ring, (void **)array, n); } static inline struct sk_buff *skb_array_consume_bh(struct skb_array *a) { return ptr_ring_consume_bh(&a->ring); } static inline int skb_array_consume_batched_bh(struct skb_array *a, struct sk_buff **array, int n) { return ptr_ring_consume_batched_bh(&a->ring, (void **)array, n); } static inline int __skb_array_len_with_tag(struct sk_buff *skb) { if (likely(skb)) { int len = skb->len; if (skb_vlan_tag_present(skb)) len += VLAN_HLEN; return len; } else { return 0; } } static inline int skb_array_peek_len(struct skb_array *a) { return PTR_RING_PEEK_CALL(&a->ring, __skb_array_len_with_tag); } static inline int skb_array_peek_len_irq(struct skb_array *a) { return PTR_RING_PEEK_CALL_IRQ(&a->ring, __skb_array_len_with_tag); } static inline int skb_array_peek_len_bh(struct skb_array *a) { return PTR_RING_PEEK_CALL_BH(&a->ring, __skb_array_len_with_tag); } static inline int skb_array_peek_len_any(struct skb_array *a) { return PTR_RING_PEEK_CALL_ANY(&a->ring, __skb_array_len_with_tag); } static inline int skb_array_init(struct skb_array *a, int size, gfp_t gfp) { return ptr_ring_init(&a->ring, size, gfp); } static void __skb_array_destroy_skb(void *ptr) { kfree_skb(ptr); } static inline void skb_array_unconsume(struct skb_array *a, struct sk_buff **skbs, int n) { ptr_ring_unconsume(&a->ring, (void **)skbs, n, __skb_array_destroy_skb); } static inline int skb_array_resize(struct skb_array *a, int size, gfp_t gfp) { return ptr_ring_resize(&a->ring, size, gfp, __skb_array_destroy_skb); } static inline int skb_array_resize_multiple(struct skb_array **rings, int nrings, unsigned int size, gfp_t gfp) { BUILD_BUG_ON(offsetof(struct skb_array, ring)); return ptr_ring_resize_multiple((struct ptr_ring **)rings, nrings, size, gfp, __skb_array_destroy_skb); } static inline void skb_array_cleanup(struct skb_array *a) { ptr_ring_cleanup(&a->ring, __skb_array_destroy_skb); } #endif /* _LINUX_SKB_ARRAY_H */ PK ! =�� � � license.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __LICENSE_H #define __LICENSE_H static inline int license_is_gpl_compatible(const char *license) { return (strcmp(license, "GPL") == 0 || strcmp(license, "GPL v2") == 0 || strcmp(license, "GPL and additional rights") == 0 || strcmp(license, "Dual BSD/GPL") == 0 || strcmp(license, "Dual MIT/GPL") == 0 || strcmp(license, "Dual MPL/GPL") == 0); } #endif PK ! ZD� bcm47xx_nvram.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* */ #ifndef __BCM47XX_NVRAM_H #define __BCM47XX_NVRAM_H #include <linux/errno.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/vmalloc.h> #ifdef CONFIG_BCM47XX_NVRAM int bcm47xx_nvram_init_from_mem(u32 base, u32 lim); int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len); int bcm47xx_nvram_gpio_pin(const char *name); char *bcm47xx_nvram_get_contents(size_t *val_len); static inline void bcm47xx_nvram_release_contents(char *nvram) { vfree(nvram); }; #else static inline int bcm47xx_nvram_init_from_mem(u32 base, u32 lim) { return -ENOTSUPP; }; static inline int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len) { return -ENOTSUPP; }; static inline int bcm47xx_nvram_gpio_pin(const char *name) { return -ENOTSUPP; }; static inline char *bcm47xx_nvram_get_contents(size_t *val_len) { return NULL; }; static inline void bcm47xx_nvram_release_contents(char *nvram) { }; #endif #endif /* __BCM47XX_NVRAM_H */ PK ! �:��< < path.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PATH_H #define _LINUX_PATH_H struct dentry; struct vfsmount; struct path { struct vfsmount *mnt; struct dentry *dentry; } __randomize_layout; extern void path_get(const struct path *); extern void path_put(const struct path *); static inline int path_equal(const struct path *path1, const struct path *path2) { return path1->mnt == path2->mnt && path1->dentry == path2->dentry; } static inline void path_put_init(struct path *path) { path_put(path); *path = (struct path) { }; } #endif /* _LINUX_PATH_H */ PK ! �E,)�x �x reset.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RESET_H_ #define _LINUX_RESET_H_ #include <linux/err.h> #include <linux/errno.h> #include <linux/types.h> struct device; struct device_node; struct reset_control; /** * struct reset_control_bulk_data - Data used for bulk reset control operations. * * @id: reset control consumer ID * @rstc: struct reset_control * to store the associated reset control * * The reset APIs provide a series of reset_control_bulk_*() API calls as * a convenience to consumers which require multiple reset controls. * This structure is used to manage data for these calls. */ struct reset_control_bulk_data { const char *id; struct reset_control *rstc; }; #ifdef CONFIG_RESET_CONTROLLER int reset_control_reset(struct reset_control *rstc); int reset_control_rearm(struct reset_control *rstc); int reset_control_assert(struct reset_control *rstc); int reset_control_deassert(struct reset_control *rstc); int reset_control_status(struct reset_control *rstc); int reset_control_acquire(struct reset_control *rstc); void reset_control_release(struct reset_control *rstc); int reset_control_bulk_reset(int num_rstcs, struct reset_control_bulk_data *rstcs); int reset_control_bulk_assert(int num_rstcs, struct reset_control_bulk_data *rstcs); int reset_control_bulk_deassert(int num_rstcs, struct reset_control_bulk_data *rstcs); int reset_control_bulk_acquire(int num_rstcs, struct reset_control_bulk_data *rstcs); void reset_control_bulk_release(int num_rstcs, struct reset_control_bulk_data *rstcs); struct reset_control *__of_reset_control_get(struct device_node *node, const char *id, int index, bool shared, bool optional, bool acquired); struct reset_control *__reset_control_get(struct device *dev, const char *id, int index, bool shared, bool optional, bool acquired); void reset_control_put(struct reset_control *rstc); int __reset_control_bulk_get(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs, bool shared, bool optional, bool acquired); void reset_control_bulk_put(int num_rstcs, struct reset_control_bulk_data *rstcs); int __device_reset(struct device *dev, bool optional); struct reset_control *__devm_reset_control_get(struct device *dev, const char *id, int index, bool shared, bool optional, bool acquired); int __devm_reset_control_bulk_get(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs, bool shared, bool optional, bool acquired); struct reset_control *devm_reset_control_array_get(struct device *dev, bool shared, bool optional); struct reset_control *of_reset_control_array_get(struct device_node *np, bool shared, bool optional, bool acquired); int reset_control_get_count(struct device *dev); #else static inline int reset_control_reset(struct reset_control *rstc) { return 0; } static inline int reset_control_rearm(struct reset_control *rstc) { return 0; } static inline int reset_control_assert(struct reset_control *rstc) { return 0; } static inline int reset_control_deassert(struct reset_control *rstc) { return 0; } static inline int reset_control_status(struct reset_control *rstc) { return 0; } static inline int reset_control_acquire(struct reset_control *rstc) { return 0; } static inline void reset_control_release(struct reset_control *rstc) { } static inline void reset_control_put(struct reset_control *rstc) { } static inline int __device_reset(struct device *dev, bool optional) { return optional ? 0 : -ENOTSUPP; } static inline struct reset_control *__of_reset_control_get( struct device_node *node, const char *id, int index, bool shared, bool optional, bool acquired) { return optional ? NULL : ERR_PTR(-ENOTSUPP); } static inline struct reset_control *__reset_control_get( struct device *dev, const char *id, int index, bool shared, bool optional, bool acquired) { return optional ? NULL : ERR_PTR(-ENOTSUPP); } static inline int reset_control_bulk_reset(int num_rstcs, struct reset_control_bulk_data *rstcs) { return 0; } static inline int reset_control_bulk_assert(int num_rstcs, struct reset_control_bulk_data *rstcs) { return 0; } static inline int reset_control_bulk_deassert(int num_rstcs, struct reset_control_bulk_data *rstcs) { return 0; } static inline int reset_control_bulk_acquire(int num_rstcs, struct reset_control_bulk_data *rstcs) { return 0; } static inline void reset_control_bulk_release(int num_rstcs, struct reset_control_bulk_data *rstcs) { } static inline int __reset_control_bulk_get(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs, bool shared, bool optional, bool acquired) { return optional ? 0 : -EOPNOTSUPP; } static inline void reset_control_bulk_put(int num_rstcs, struct reset_control_bulk_data *rstcs) { } static inline struct reset_control *__devm_reset_control_get( struct device *dev, const char *id, int index, bool shared, bool optional, bool acquired) { return optional ? NULL : ERR_PTR(-ENOTSUPP); } static inline int __devm_reset_control_bulk_get(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs, bool shared, bool optional, bool acquired) { return optional ? 0 : -EOPNOTSUPP; } static inline struct reset_control * devm_reset_control_array_get(struct device *dev, bool shared, bool optional) { return optional ? NULL : ERR_PTR(-ENOTSUPP); } static inline struct reset_control * of_reset_control_array_get(struct device_node *np, bool shared, bool optional, bool acquired) { return optional ? NULL : ERR_PTR(-ENOTSUPP); } static inline int reset_control_get_count(struct device *dev) { return -ENOENT; } #endif /* CONFIG_RESET_CONTROLLER */ static inline int __must_check device_reset(struct device *dev) { return __device_reset(dev, false); } static inline int device_reset_optional(struct device *dev) { return __device_reset(dev, true); } /** * reset_control_get_exclusive - Lookup and obtain an exclusive reference * to a reset controller. * @dev: device to be reset by the controller * @id: reset line name * * Returns a struct reset_control or IS_ERR() condition containing errno. * If this function is called more than once for the same reset_control it will * return -EBUSY. * * See reset_control_get_shared() for details on shared references to * reset-controls. * * Use of id names is optional. */ static inline struct reset_control * __must_check reset_control_get_exclusive(struct device *dev, const char *id) { return __reset_control_get(dev, id, 0, false, false, true); } /** * reset_control_bulk_get_exclusive - Lookup and obtain exclusive references to * multiple reset controllers. * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Fills the rstcs array with pointers to exclusive reset controls and * returns 0, or an IS_ERR() condition containing errno. */ static inline int __must_check reset_control_bulk_get_exclusive(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __reset_control_bulk_get(dev, num_rstcs, rstcs, false, false, true); } /** * reset_control_get_exclusive_released - Lookup and obtain a temoprarily * exclusive reference to a reset * controller. * @dev: device to be reset by the controller * @id: reset line name * * Returns a struct reset_control or IS_ERR() condition containing errno. * reset-controls returned by this function must be acquired via * reset_control_acquire() before they can be used and should be released * via reset_control_release() afterwards. * * Use of id names is optional. */ static inline struct reset_control * __must_check reset_control_get_exclusive_released(struct device *dev, const char *id) { return __reset_control_get(dev, id, 0, false, false, false); } /** * reset_control_bulk_get_exclusive_released - Lookup and obtain temporarily * exclusive references to multiple reset * controllers. * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Fills the rstcs array with pointers to exclusive reset controls and * returns 0, or an IS_ERR() condition containing errno. * reset-controls returned by this function must be acquired via * reset_control_bulk_acquire() before they can be used and should be released * via reset_control_bulk_release() afterwards. */ static inline int __must_check reset_control_bulk_get_exclusive_released(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __reset_control_bulk_get(dev, num_rstcs, rstcs, false, false, false); } /** * reset_control_bulk_get_optional_exclusive_released - Lookup and obtain optional * temporarily exclusive references to multiple * reset controllers. * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Optional variant of reset_control_bulk_get_exclusive_released(). If the * requested reset is not specified in the device tree, this function returns 0 * instead of an error and missing rtsc is set to NULL. * * See reset_control_bulk_get_exclusive_released() for more information. */ static inline int __must_check reset_control_bulk_get_optional_exclusive_released(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __reset_control_bulk_get(dev, num_rstcs, rstcs, false, true, false); } /** * reset_control_get_shared - Lookup and obtain a shared reference to a * reset controller. * @dev: device to be reset by the controller * @id: reset line name * * Returns a struct reset_control or IS_ERR() condition containing errno. * This function is intended for use with reset-controls which are shared * between hardware blocks. * * When a reset-control is shared, the behavior of reset_control_assert / * deassert is changed, the reset-core will keep track of a deassert_count * and only (re-)assert the reset after reset_control_assert has been called * as many times as reset_control_deassert was called. Also see the remark * about shared reset-controls in the reset_control_assert docs. * * Calling reset_control_assert without first calling reset_control_deassert * is not allowed on a shared reset control. Calling reset_control_reset is * also not allowed on a shared reset control. * * Use of id names is optional. */ static inline struct reset_control *reset_control_get_shared( struct device *dev, const char *id) { return __reset_control_get(dev, id, 0, true, false, false); } /** * reset_control_bulk_get_shared - Lookup and obtain shared references to * multiple reset controllers. * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Fills the rstcs array with pointers to shared reset controls and * returns 0, or an IS_ERR() condition containing errno. */ static inline int __must_check reset_control_bulk_get_shared(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __reset_control_bulk_get(dev, num_rstcs, rstcs, true, false, false); } /** * reset_control_get_optional_exclusive - optional reset_control_get_exclusive() * @dev: device to be reset by the controller * @id: reset line name * * Optional variant of reset_control_get_exclusive(). If the requested reset * is not specified in the device tree, this function returns NULL instead of * an error. * * See reset_control_get_exclusive() for more information. */ static inline struct reset_control *reset_control_get_optional_exclusive( struct device *dev, const char *id) { return __reset_control_get(dev, id, 0, false, true, true); } /** * reset_control_bulk_get_optional_exclusive - optional * reset_control_bulk_get_exclusive() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Optional variant of reset_control_bulk_get_exclusive(). If any of the * requested resets are not specified in the device tree, this function sets * them to NULL instead of returning an error. * * See reset_control_bulk_get_exclusive() for more information. */ static inline int __must_check reset_control_bulk_get_optional_exclusive(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __reset_control_bulk_get(dev, num_rstcs, rstcs, false, true, true); } /** * reset_control_get_optional_shared - optional reset_control_get_shared() * @dev: device to be reset by the controller * @id: reset line name * * Optional variant of reset_control_get_shared(). If the requested reset * is not specified in the device tree, this function returns NULL instead of * an error. * * See reset_control_get_shared() for more information. */ static inline struct reset_control *reset_control_get_optional_shared( struct device *dev, const char *id) { return __reset_control_get(dev, id, 0, true, true, false); } /** * reset_control_bulk_get_optional_shared - optional * reset_control_bulk_get_shared() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Optional variant of reset_control_bulk_get_shared(). If the requested resets * are not specified in the device tree, this function sets them to NULL * instead of returning an error. * * See reset_control_bulk_get_shared() for more information. */ static inline int __must_check reset_control_bulk_get_optional_shared(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __reset_control_bulk_get(dev, num_rstcs, rstcs, true, true, false); } /** * of_reset_control_get_exclusive - Lookup and obtain an exclusive reference * to a reset controller. * @node: device to be reset by the controller * @id: reset line name * * Returns a struct reset_control or IS_ERR() condition containing errno. * * Use of id names is optional. */ static inline struct reset_control *of_reset_control_get_exclusive( struct device_node *node, const char *id) { return __of_reset_control_get(node, id, 0, false, false, true); } /** * of_reset_control_get_shared - Lookup and obtain a shared reference * to a reset controller. * @node: device to be reset by the controller * @id: reset line name * * When a reset-control is shared, the behavior of reset_control_assert / * deassert is changed, the reset-core will keep track of a deassert_count * and only (re-)assert the reset after reset_control_assert has been called * as many times as reset_control_deassert was called. Also see the remark * about shared reset-controls in the reset_control_assert docs. * * Calling reset_control_assert without first calling reset_control_deassert * is not allowed on a shared reset control. Calling reset_control_reset is * also not allowed on a shared reset control. * Returns a struct reset_control or IS_ERR() condition containing errno. * * Use of id names is optional. */ static inline struct reset_control *of_reset_control_get_shared( struct device_node *node, const char *id) { return __of_reset_control_get(node, id, 0, true, false, false); } /** * of_reset_control_get_exclusive_by_index - Lookup and obtain an exclusive * reference to a reset controller * by index. * @node: device to be reset by the controller * @index: index of the reset controller * * This is to be used to perform a list of resets for a device or power domain * in whatever order. Returns a struct reset_control or IS_ERR() condition * containing errno. */ static inline struct reset_control *of_reset_control_get_exclusive_by_index( struct device_node *node, int index) { return __of_reset_control_get(node, NULL, index, false, false, true); } /** * of_reset_control_get_shared_by_index - Lookup and obtain a shared * reference to a reset controller * by index. * @node: device to be reset by the controller * @index: index of the reset controller * * When a reset-control is shared, the behavior of reset_control_assert / * deassert is changed, the reset-core will keep track of a deassert_count * and only (re-)assert the reset after reset_control_assert has been called * as many times as reset_control_deassert was called. Also see the remark * about shared reset-controls in the reset_control_assert docs. * * Calling reset_control_assert without first calling reset_control_deassert * is not allowed on a shared reset control. Calling reset_control_reset is * also not allowed on a shared reset control. * Returns a struct reset_control or IS_ERR() condition containing errno. * * This is to be used to perform a list of resets for a device or power domain * in whatever order. Returns a struct reset_control or IS_ERR() condition * containing errno. */ static inline struct reset_control *of_reset_control_get_shared_by_index( struct device_node *node, int index) { return __of_reset_control_get(node, NULL, index, true, false, false); } /** * devm_reset_control_get_exclusive - resource managed * reset_control_get_exclusive() * @dev: device to be reset by the controller * @id: reset line name * * Managed reset_control_get_exclusive(). For reset controllers returned * from this function, reset_control_put() is called automatically on driver * detach. * * See reset_control_get_exclusive() for more information. */ static inline struct reset_control * __must_check devm_reset_control_get_exclusive(struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, false, false, true); } /** * devm_reset_control_bulk_get_exclusive - resource managed * reset_control_bulk_get_exclusive() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Managed reset_control_bulk_get_exclusive(). For reset controllers returned * from this function, reset_control_put() is called automatically on driver * detach. * * See reset_control_bulk_get_exclusive() for more information. */ static inline int __must_check devm_reset_control_bulk_get_exclusive(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __devm_reset_control_bulk_get(dev, num_rstcs, rstcs, false, false, true); } /** * devm_reset_control_get_exclusive_released - resource managed * reset_control_get_exclusive_released() * @dev: device to be reset by the controller * @id: reset line name * * Managed reset_control_get_exclusive_released(). For reset controllers * returned from this function, reset_control_put() is called automatically on * driver detach. * * See reset_control_get_exclusive_released() for more information. */ static inline struct reset_control * __must_check devm_reset_control_get_exclusive_released(struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, false, false, false); } /** * devm_reset_control_bulk_get_exclusive_released - resource managed * reset_control_bulk_get_exclusive_released() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Managed reset_control_bulk_get_exclusive_released(). For reset controllers * returned from this function, reset_control_put() is called automatically on * driver detach. * * See reset_control_bulk_get_exclusive_released() for more information. */ static inline int __must_check devm_reset_control_bulk_get_exclusive_released(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __devm_reset_control_bulk_get(dev, num_rstcs, rstcs, false, false, false); } /** * devm_reset_control_get_optional_exclusive_released - resource managed * reset_control_get_optional_exclusive_released() * @dev: device to be reset by the controller * @id: reset line name * * Managed-and-optional variant of reset_control_get_exclusive_released(). For * reset controllers returned from this function, reset_control_put() is called * automatically on driver detach. * * See reset_control_get_exclusive_released() for more information. */ static inline struct reset_control * __must_check devm_reset_control_get_optional_exclusive_released(struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, false, true, false); } /** * devm_reset_control_bulk_get_optional_exclusive_released - resource managed * reset_control_bulk_optional_get_exclusive_released() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Managed reset_control_bulk_optional_get_exclusive_released(). For reset * controllers returned from this function, reset_control_put() is called * automatically on driver detach. * * See reset_control_bulk_optional_get_exclusive_released() for more information. */ static inline int __must_check devm_reset_control_bulk_get_optional_exclusive_released(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __devm_reset_control_bulk_get(dev, num_rstcs, rstcs, false, true, false); } /** * devm_reset_control_get_shared - resource managed reset_control_get_shared() * @dev: device to be reset by the controller * @id: reset line name * * Managed reset_control_get_shared(). For reset controllers returned from * this function, reset_control_put() is called automatically on driver detach. * See reset_control_get_shared() for more information. */ static inline struct reset_control *devm_reset_control_get_shared( struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, true, false, false); } /** * devm_reset_control_bulk_get_shared - resource managed * reset_control_bulk_get_shared() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Managed reset_control_bulk_get_shared(). For reset controllers returned * from this function, reset_control_put() is called automatically on driver * detach. * * See reset_control_bulk_get_shared() for more information. */ static inline int __must_check devm_reset_control_bulk_get_shared(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __devm_reset_control_bulk_get(dev, num_rstcs, rstcs, true, false, false); } /** * devm_reset_control_get_optional_exclusive - resource managed * reset_control_get_optional_exclusive() * @dev: device to be reset by the controller * @id: reset line name * * Managed reset_control_get_optional_exclusive(). For reset controllers * returned from this function, reset_control_put() is called automatically on * driver detach. * * See reset_control_get_optional_exclusive() for more information. */ static inline struct reset_control *devm_reset_control_get_optional_exclusive( struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, false, true, true); } /** * devm_reset_control_bulk_get_optional_exclusive - resource managed * reset_control_bulk_get_optional_exclusive() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Managed reset_control_bulk_get_optional_exclusive(). For reset controllers * returned from this function, reset_control_put() is called automatically on * driver detach. * * See reset_control_bulk_get_optional_exclusive() for more information. */ static inline int __must_check devm_reset_control_bulk_get_optional_exclusive(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __devm_reset_control_bulk_get(dev, num_rstcs, rstcs, false, true, true); } /** * devm_reset_control_get_optional_shared - resource managed * reset_control_get_optional_shared() * @dev: device to be reset by the controller * @id: reset line name * * Managed reset_control_get_optional_shared(). For reset controllers returned * from this function, reset_control_put() is called automatically on driver * detach. * * See reset_control_get_optional_shared() for more information. */ static inline struct reset_control *devm_reset_control_get_optional_shared( struct device *dev, const char *id) { return __devm_reset_control_get(dev, id, 0, true, true, false); } /** * devm_reset_control_bulk_get_optional_shared - resource managed * reset_control_bulk_get_optional_shared() * @dev: device to be reset by the controller * @num_rstcs: number of entries in rstcs array * @rstcs: array of struct reset_control_bulk_data with reset line names set * * Managed reset_control_bulk_get_optional_shared(). For reset controllers * returned from this function, reset_control_put() is called automatically on * driver detach. * * See reset_control_bulk_get_optional_shared() for more information. */ static inline int __must_check devm_reset_control_bulk_get_optional_shared(struct device *dev, int num_rstcs, struct reset_control_bulk_data *rstcs) { return __devm_reset_control_bulk_get(dev, num_rstcs, rstcs, true, true, false); } /** * devm_reset_control_get_exclusive_by_index - resource managed * reset_control_get_exclusive() * @dev: device to be reset by the controller * @index: index of the reset controller * * Managed reset_control_get_exclusive(). For reset controllers returned from * this function, reset_control_put() is called automatically on driver * detach. * * See reset_control_get_exclusive() for more information. */ static inline struct reset_control * devm_reset_control_get_exclusive_by_index(struct device *dev, int index) { return __devm_reset_control_get(dev, NULL, index, false, false, true); } /** * devm_reset_control_get_shared_by_index - resource managed * reset_control_get_shared * @dev: device to be reset by the controller * @index: index of the reset controller * * Managed reset_control_get_shared(). For reset controllers returned from * this function, reset_control_put() is called automatically on driver detach. * See reset_control_get_shared() for more information. */ static inline struct reset_control * devm_reset_control_get_shared_by_index(struct device *dev, int index) { return __devm_reset_control_get(dev, NULL, index, true, false, false); } /* * TEMPORARY calls to use during transition: * * of_reset_control_get() => of_reset_control_get_exclusive() * * These inline function calls will be removed once all consumers * have been moved over to the new explicit API. */ static inline struct reset_control *of_reset_control_get( struct device_node *node, const char *id) { return of_reset_control_get_exclusive(node, id); } static inline struct reset_control *of_reset_control_get_by_index( struct device_node *node, int index) { return of_reset_control_get_exclusive_by_index(node, index); } static inline struct reset_control *devm_reset_control_get( struct device *dev, const char *id) { return devm_reset_control_get_exclusive(dev, id); } static inline struct reset_control *devm_reset_control_get_optional( struct device *dev, const char *id) { return devm_reset_control_get_optional_exclusive(dev, id); } static inline struct reset_control *devm_reset_control_get_by_index( struct device *dev, int index) { return devm_reset_control_get_exclusive_by_index(dev, index); } /* * APIs to manage a list of reset controllers */ static inline struct reset_control * devm_reset_control_array_get_exclusive(struct device *dev) { return devm_reset_control_array_get(dev, false, false); } static inline struct reset_control * devm_reset_control_array_get_shared(struct device *dev) { return devm_reset_control_array_get(dev, true, false); } static inline struct reset_control * devm_reset_control_array_get_optional_exclusive(struct device *dev) { return devm_reset_control_array_get(dev, false, true); } static inline struct reset_control * devm_reset_control_array_get_optional_shared(struct device *dev) { return devm_reset_control_array_get(dev, true, true); } static inline struct reset_control * of_reset_control_array_get_exclusive(struct device_node *node) { return of_reset_control_array_get(node, false, false, true); } static inline struct reset_control * of_reset_control_array_get_exclusive_released(struct device_node *node) { return of_reset_control_array_get(node, false, false, false); } static inline struct reset_control * of_reset_control_array_get_shared(struct device_node *node) { return of_reset_control_array_get(node, true, false, true); } static inline struct reset_control * of_reset_control_array_get_optional_exclusive(struct device_node *node) { return of_reset_control_array_get(node, false, true, true); } static inline struct reset_control * of_reset_control_array_get_optional_shared(struct device_node *node) { return of_reset_control_array_get(node, true, true, true); } #endif PK ! ���d irq_sim.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2017-2018 Bartosz Golaszewski <brgl@bgdev.pl> * Copyright (C) 2020 Bartosz Golaszewski <bgolaszewski@baylibre.com> */ #ifndef _LINUX_IRQ_SIM_H #define _LINUX_IRQ_SIM_H #include <linux/device.h> #include <linux/fwnode.h> #include <linux/irqdomain.h> /* * Provides a framework for allocating simulated interrupts which can be * requested like normal irqs and enqueued from process context. */ struct irq_domain *irq_domain_create_sim(struct fwnode_handle *fwnode, unsigned int num_irqs); struct irq_domain *devm_irq_domain_create_sim(struct device *dev, struct fwnode_handle *fwnode, unsigned int num_irqs); void irq_domain_remove_sim(struct irq_domain *domain); #endif /* _LINUX_IRQ_SIM_H */ PK ! �BZ Z fwnode_mdio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * FWNODE helper for the MDIO (Ethernet PHY) API */ #ifndef __LINUX_FWNODE_MDIO_H #define __LINUX_FWNODE_MDIO_H #include <linux/phy.h> #if IS_ENABLED(CONFIG_FWNODE_MDIO) int fwnode_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, struct fwnode_handle *child, u32 addr); int fwnode_mdiobus_register_phy(struct mii_bus *bus, struct fwnode_handle *child, u32 addr); #else /* CONFIG_FWNODE_MDIO */ int fwnode_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, struct fwnode_handle *child, u32 addr) { return -EINVAL; } static inline int fwnode_mdiobus_register_phy(struct mii_bus *bus, struct fwnode_handle *child, u32 addr) { return -EINVAL; } #endif #endif /* __LINUX_FWNODE_MDIO_H */ PK ! gZ�P P if_link.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IF_LINK_H #define _LINUX_IF_LINK_H #include <uapi/linux/if_link.h> /* We don't want this structure exposed to user space */ struct ifla_vf_stats { __u64 rx_packets; __u64 tx_packets; __u64 rx_bytes; __u64 tx_bytes; __u64 broadcast; __u64 multicast; __u64 rx_dropped; __u64 tx_dropped; }; struct ifla_vf_info { __u32 vf; __u8 mac[32]; __u32 vlan; __u32 qos; __u32 spoofchk; __u32 linkstate; __u32 min_tx_rate; __u32 max_tx_rate; __u32 rss_query_en; __u32 trusted; __be16 vlan_proto; }; #endif /* _LINUX_IF_LINK_H */ PK ! p����4 �4 phy/phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * phy.h -- generic phy header file * * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com * * Author: Kishon Vijay Abraham I <kishon@ti.com> */ #ifndef __DRIVERS_PHY_H #define __DRIVERS_PHY_H #include <linux/err.h> #include <linux/of.h> #include <linux/device.h> #include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #include <linux/phy/phy-dp.h> #include <linux/phy/phy-mipi-dphy.h> struct phy; enum phy_mode { PHY_MODE_INVALID, PHY_MODE_USB_HOST, PHY_MODE_USB_HOST_LS, PHY_MODE_USB_HOST_FS, PHY_MODE_USB_HOST_HS, PHY_MODE_USB_HOST_SS, PHY_MODE_USB_DEVICE, PHY_MODE_USB_DEVICE_LS, PHY_MODE_USB_DEVICE_FS, PHY_MODE_USB_DEVICE_HS, PHY_MODE_USB_DEVICE_SS, PHY_MODE_USB_OTG, PHY_MODE_UFS_HS_A, PHY_MODE_UFS_HS_B, PHY_MODE_PCIE, PHY_MODE_ETHERNET, PHY_MODE_MIPI_DPHY, PHY_MODE_SATA, PHY_MODE_LVDS, PHY_MODE_DP }; enum phy_media { PHY_MEDIA_DEFAULT, PHY_MEDIA_SR, PHY_MEDIA_DAC, }; /** * union phy_configure_opts - Opaque generic phy configuration * * @mipi_dphy: Configuration set applicable for phys supporting * the MIPI_DPHY phy mode. * @dp: Configuration set applicable for phys supporting * the DisplayPort protocol. */ union phy_configure_opts { struct phy_configure_opts_mipi_dphy mipi_dphy; struct phy_configure_opts_dp dp; }; /** * struct phy_ops - set of function pointers for performing phy operations * @init: operation to be performed for initializing phy * @exit: operation to be performed while exiting * @power_on: powering on the phy * @power_off: powering off the phy * @set_mode: set the mode of the phy * @set_media: set the media type of the phy (optional) * @set_speed: set the speed of the phy (optional) * @reset: resetting the phy * @calibrate: calibrate the phy * @release: ops to be performed while the consumer relinquishes the PHY * @owner: the module owner containing the ops */ struct phy_ops { int (*init)(struct phy *phy); int (*exit)(struct phy *phy); int (*power_on)(struct phy *phy); int (*power_off)(struct phy *phy); int (*set_mode)(struct phy *phy, enum phy_mode mode, int submode); int (*set_media)(struct phy *phy, enum phy_media media); int (*set_speed)(struct phy *phy, int speed); /** * @configure: * * Optional. * * Used to change the PHY parameters. phy_init() must have * been called on the phy. * * Returns: 0 if successful, an negative error code otherwise */ int (*configure)(struct phy *phy, union phy_configure_opts *opts); /** * @validate: * * Optional. * * Used to check that the current set of parameters can be * handled by the phy. Implementations are free to tune the * parameters passed as arguments if needed by some * implementation detail or constraints. It must not change * any actual configuration of the PHY, so calling it as many * times as deemed fit by the consumer must have no side * effect. * * Returns: 0 if the configuration can be applied, an negative * error code otherwise */ int (*validate)(struct phy *phy, enum phy_mode mode, int submode, union phy_configure_opts *opts); int (*reset)(struct phy *phy); int (*calibrate)(struct phy *phy); void (*release)(struct phy *phy); struct module *owner; }; /** * struct phy_attrs - represents phy attributes * @bus_width: Data path width implemented by PHY * @max_link_rate: Maximum link rate supported by PHY (units to be decided by producer and consumer) * @mode: PHY mode */ struct phy_attrs { u32 bus_width; u32 max_link_rate; enum phy_mode mode; }; /** * struct phy - represents the phy device * @dev: phy device * @id: id of the phy device * @ops: function pointers for performing phy operations * @mutex: mutex to protect phy_ops * @init_count: used to protect when the PHY is used by multiple consumers * @power_count: used to protect when the PHY is used by multiple consumers * @attrs: used to specify PHY specific attributes * @pwr: power regulator associated with the phy */ struct phy { struct device dev; int id; const struct phy_ops *ops; struct mutex mutex; int init_count; int power_count; struct phy_attrs attrs; struct regulator *pwr; }; /** * struct phy_provider - represents the phy provider * @dev: phy provider device * @children: can be used to override the default (dev->of_node) child node * @owner: the module owner having of_xlate * @list: to maintain a linked list of PHY providers * @of_xlate: function pointer to obtain phy instance from phy pointer */ struct phy_provider { struct device *dev; struct device_node *children; struct module *owner; struct list_head list; struct phy * (*of_xlate)(struct device *dev, struct of_phandle_args *args); }; /** * struct phy_lookup - PHY association in list of phys managed by the phy driver * @node: list node * @dev_id: the device of the association * @con_id: connection ID string on device * @phy: the phy of the association */ struct phy_lookup { struct list_head node; const char *dev_id; const char *con_id; struct phy *phy; }; #define to_phy(a) (container_of((a), struct phy, dev)) #define of_phy_provider_register(dev, xlate) \ __of_phy_provider_register((dev), NULL, THIS_MODULE, (xlate)) #define devm_of_phy_provider_register(dev, xlate) \ __devm_of_phy_provider_register((dev), NULL, THIS_MODULE, (xlate)) #define of_phy_provider_register_full(dev, children, xlate) \ __of_phy_provider_register(dev, children, THIS_MODULE, xlate) #define devm_of_phy_provider_register_full(dev, children, xlate) \ __devm_of_phy_provider_register(dev, children, THIS_MODULE, xlate) static inline void phy_set_drvdata(struct phy *phy, void *data) { dev_set_drvdata(&phy->dev, data); } static inline void *phy_get_drvdata(struct phy *phy) { return dev_get_drvdata(&phy->dev); } #if IS_ENABLED(CONFIG_GENERIC_PHY) int phy_pm_runtime_get(struct phy *phy); int phy_pm_runtime_get_sync(struct phy *phy); int phy_pm_runtime_put(struct phy *phy); int phy_pm_runtime_put_sync(struct phy *phy); void phy_pm_runtime_allow(struct phy *phy); void phy_pm_runtime_forbid(struct phy *phy); int phy_init(struct phy *phy); int phy_exit(struct phy *phy); int phy_power_on(struct phy *phy); int phy_power_off(struct phy *phy); int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode); #define phy_set_mode(phy, mode) \ phy_set_mode_ext(phy, mode, 0) int phy_set_media(struct phy *phy, enum phy_media media); int phy_set_speed(struct phy *phy, int speed); int phy_configure(struct phy *phy, union phy_configure_opts *opts); int phy_validate(struct phy *phy, enum phy_mode mode, int submode, union phy_configure_opts *opts); static inline enum phy_mode phy_get_mode(struct phy *phy) { return phy->attrs.mode; } int phy_reset(struct phy *phy); int phy_calibrate(struct phy *phy); static inline int phy_get_bus_width(struct phy *phy) { return phy->attrs.bus_width; } static inline void phy_set_bus_width(struct phy *phy, int bus_width) { phy->attrs.bus_width = bus_width; } struct phy *phy_get(struct device *dev, const char *string); struct phy *phy_optional_get(struct device *dev, const char *string); struct phy *devm_phy_get(struct device *dev, const char *string); struct phy *devm_phy_optional_get(struct device *dev, const char *string); struct phy *devm_of_phy_get(struct device *dev, struct device_node *np, const char *con_id); struct phy *devm_of_phy_get_by_index(struct device *dev, struct device_node *np, int index); void of_phy_put(struct phy *phy); void phy_put(struct device *dev, struct phy *phy); void devm_phy_put(struct device *dev, struct phy *phy); struct phy *of_phy_get(struct device_node *np, const char *con_id); struct phy *of_phy_simple_xlate(struct device *dev, struct of_phandle_args *args); struct phy *phy_create(struct device *dev, struct device_node *node, const struct phy_ops *ops); struct phy *devm_phy_create(struct device *dev, struct device_node *node, const struct phy_ops *ops); void phy_destroy(struct phy *phy); void devm_phy_destroy(struct device *dev, struct phy *phy); struct phy_provider *__of_phy_provider_register(struct device *dev, struct device_node *children, struct module *owner, struct phy * (*of_xlate)(struct device *dev, struct of_phandle_args *args)); struct phy_provider *__devm_of_phy_provider_register(struct device *dev, struct device_node *children, struct module *owner, struct phy * (*of_xlate)(struct device *dev, struct of_phandle_args *args)); void of_phy_provider_unregister(struct phy_provider *phy_provider); void devm_of_phy_provider_unregister(struct device *dev, struct phy_provider *phy_provider); int phy_create_lookup(struct phy *phy, const char *con_id, const char *dev_id); void phy_remove_lookup(struct phy *phy, const char *con_id, const char *dev_id); #else static inline int phy_pm_runtime_get(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_pm_runtime_get_sync(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_pm_runtime_put(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_pm_runtime_put_sync(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline void phy_pm_runtime_allow(struct phy *phy) { return; } static inline void phy_pm_runtime_forbid(struct phy *phy) { return; } static inline int phy_init(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_exit(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_power_on(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_power_off(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) { if (!phy) return 0; return -ENOSYS; } #define phy_set_mode(phy, mode) \ phy_set_mode_ext(phy, mode, 0) static inline int phy_set_media(struct phy *phy, enum phy_media media) { if (!phy) return 0; return -ENODEV; } static inline int phy_set_speed(struct phy *phy, int speed) { if (!phy) return 0; return -ENODEV; } static inline enum phy_mode phy_get_mode(struct phy *phy) { return PHY_MODE_INVALID; } static inline int phy_reset(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_calibrate(struct phy *phy) { if (!phy) return 0; return -ENOSYS; } static inline int phy_configure(struct phy *phy, union phy_configure_opts *opts) { if (!phy) return 0; return -ENOSYS; } static inline int phy_validate(struct phy *phy, enum phy_mode mode, int submode, union phy_configure_opts *opts) { if (!phy) return 0; return -ENOSYS; } static inline int phy_get_bus_width(struct phy *phy) { return -ENOSYS; } static inline void phy_set_bus_width(struct phy *phy, int bus_width) { return; } static inline struct phy *phy_get(struct device *dev, const char *string) { return ERR_PTR(-ENOSYS); } static inline struct phy *phy_optional_get(struct device *dev, const char *string) { return ERR_PTR(-ENOSYS); } static inline struct phy *devm_phy_get(struct device *dev, const char *string) { return ERR_PTR(-ENOSYS); } static inline struct phy *devm_phy_optional_get(struct device *dev, const char *string) { return NULL; } static inline struct phy *devm_of_phy_get(struct device *dev, struct device_node *np, const char *con_id) { return ERR_PTR(-ENOSYS); } static inline struct phy *devm_of_phy_get_by_index(struct device *dev, struct device_node *np, int index) { return ERR_PTR(-ENOSYS); } static inline void of_phy_put(struct phy *phy) { } static inline void phy_put(struct device *dev, struct phy *phy) { } static inline void devm_phy_put(struct device *dev, struct phy *phy) { } static inline struct phy *of_phy_get(struct device_node *np, const char *con_id) { return ERR_PTR(-ENOSYS); } static inline struct phy *of_phy_simple_xlate(struct device *dev, struct of_phandle_args *args) { return ERR_PTR(-ENOSYS); } static inline struct phy *phy_create(struct device *dev, struct device_node *node, const struct phy_ops *ops) { return ERR_PTR(-ENOSYS); } static inline struct phy *devm_phy_create(struct device *dev, struct device_node *node, const struct phy_ops *ops) { return ERR_PTR(-ENOSYS); } static inline void phy_destroy(struct phy *phy) { } static inline void devm_phy_destroy(struct device *dev, struct phy *phy) { } static inline struct phy_provider *__of_phy_provider_register( struct device *dev, struct device_node *children, struct module *owner, struct phy * (*of_xlate)(struct device *dev, struct of_phandle_args *args)) { return ERR_PTR(-ENOSYS); } static inline struct phy_provider *__devm_of_phy_provider_register(struct device *dev, struct device_node *children, struct module *owner, struct phy * (*of_xlate)(struct device *dev, struct of_phandle_args *args)) { return ERR_PTR(-ENOSYS); } static inline void of_phy_provider_unregister(struct phy_provider *phy_provider) { } static inline void devm_of_phy_provider_unregister(struct device *dev, struct phy_provider *phy_provider) { } static inline int phy_create_lookup(struct phy *phy, const char *con_id, const char *dev_id) { return 0; } static inline void phy_remove_lookup(struct phy *phy, const char *con_id, const char *dev_id) { } #endif #endif /* __DRIVERS_PHY_H */ PK ! �\A* phy/ulpi_phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #include <linux/phy/phy.h> /** * Helper that registers PHY for a ULPI device and adds a lookup for binding it * and it's controller, which is always the parent. */ static inline struct phy *ulpi_phy_create(struct ulpi *ulpi, const struct phy_ops *ops) { struct phy *phy; int ret; phy = phy_create(&ulpi->dev, NULL, ops); if (IS_ERR(phy)) return phy; ret = phy_create_lookup(phy, "usb2-phy", dev_name(ulpi->dev.parent)); if (ret) { phy_destroy(phy); return ERR_PTR(ret); } return phy; } /* Remove a PHY that was created with ulpi_phy_create() and it's lookup. */ static inline void ulpi_phy_destroy(struct ulpi *ulpi, struct phy *phy) { phy_remove_lookup(phy, "usb2-phy", dev_name(ulpi->dev.parent)); phy_destroy(phy); } PK ! �e{�2 2 phy/phy-dp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2019 Cadence Design Systems Inc. */ #ifndef __PHY_DP_H_ #define __PHY_DP_H_ #include <linux/types.h> /** * struct phy_configure_opts_dp - DisplayPort PHY configuration set * * This structure is used to represent the configuration state of a * DisplayPort phy. */ struct phy_configure_opts_dp { /** * @link_rate: * * Link Rate, in Mb/s, of the main link. * * Allowed values: 1620, 2160, 2430, 2700, 3240, 4320, 5400, 8100 Mb/s */ unsigned int link_rate; /** * @lanes: * * Number of active, consecutive, data lanes, starting from * lane 0, used for the transmissions on main link. * * Allowed values: 1, 2, 4 */ unsigned int lanes; /** * @voltage: * * Voltage swing levels, as specified by DisplayPort specification, * to be used by particular lanes. One value per lane. * voltage[0] is for lane 0, voltage[1] is for lane 1, etc. * * Maximum value: 3 */ unsigned int voltage[4]; /** * @pre: * * Pre-emphasis levels, as specified by DisplayPort specification, to be * used by particular lanes. One value per lane. * * Maximum value: 3 */ unsigned int pre[4]; /** * @ssc: * * Flag indicating, whether or not to enable spread-spectrum clocking. * */ u8 ssc : 1; /** * @set_rate: * * Flag indicating, whether or not reconfigure link rate and SSC to * requested values. * */ u8 set_rate : 1; /** * @set_lanes: * * Flag indicating, whether or not reconfigure lane count to * requested value. * */ u8 set_lanes : 1; /** * @set_voltages: * * Flag indicating, whether or not reconfigure voltage swing * and pre-emphasis to requested values. Only lanes specified * by "lanes" parameter will be affected. * */ u8 set_voltages : 1; }; #endif /* __PHY_DP_H_ */ PK ! ��� � phy/tegra/xusb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. */ #ifndef PHY_TEGRA_XUSB_H #define PHY_TEGRA_XUSB_H struct tegra_xusb_padctl; struct device; enum usb_device_speed; struct tegra_xusb_padctl *tegra_xusb_padctl_get(struct device *dev); void tegra_xusb_padctl_put(struct tegra_xusb_padctl *padctl); int tegra_xusb_padctl_usb3_save_context(struct tegra_xusb_padctl *padctl, unsigned int port); int tegra_xusb_padctl_hsic_set_idle(struct tegra_xusb_padctl *padctl, unsigned int port, bool idle); int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl, unsigned int port, bool enable); int tegra_xusb_padctl_set_vbus_override(struct tegra_xusb_padctl *padctl, bool val); int tegra_phy_xusb_utmi_port_reset(struct phy *phy); int tegra_xusb_padctl_get_usb3_companion(struct tegra_xusb_padctl *padctl, unsigned int port); int tegra_xusb_padctl_get_port_number(struct phy *phy); int tegra_xusb_padctl_enable_phy_sleepwalk(struct tegra_xusb_padctl *padctl, struct phy *phy, enum usb_device_speed speed); int tegra_xusb_padctl_disable_phy_sleepwalk(struct tegra_xusb_padctl *padctl, struct phy *phy); int tegra_xusb_padctl_enable_phy_wake(struct tegra_xusb_padctl *padctl, struct phy *phy); int tegra_xusb_padctl_disable_phy_wake(struct tegra_xusb_padctl *padctl, struct phy *phy); bool tegra_xusb_padctl_remote_wake_detected(struct tegra_xusb_padctl *padctl, struct phy *phy); #endif /* PHY_TEGRA_XUSB_H */ PK ! ����� � phy/omap_usb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * omap_usb.h -- omap usb2 phy header file * * Copyright (C) 2012-2020 Texas Instruments Incorporated - http://www.ti.com * Author: Kishon Vijay Abraham I <kishon@ti.com> */ #ifndef __DRIVERS_OMAP_USB2_H #define __DRIVERS_OMAP_USB2_H #include <linux/usb/phy_companion.h> #define phy_to_omapusb(x) container_of((x), struct omap_usb, phy) #if defined(CONFIG_OMAP_USB2) || defined(CONFIG_OMAP_USB2_MODULE) extern int omap_usb2_set_comparator(struct phy_companion *comparator); #else static inline int omap_usb2_set_comparator(struct phy_companion *comparator) { return -ENODEV; } #endif #endif /* __DRIVERS_OMAP_USB_H */ PK ! ���� � phy/omap_control_phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * omap_control_phy.h - Header file for the PHY part of control module. * * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com * Author: Kishon Vijay Abraham I <kishon@ti.com> */ #ifndef __OMAP_CONTROL_PHY_H__ #define __OMAP_CONTROL_PHY_H__ enum omap_control_phy_type { OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */ OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */ OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */ OMAP_CTRL_TYPE_PCIE, /* RX TX control of ACSPCIE */ OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */ OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */ }; struct omap_control_phy { struct device *dev; u32 __iomem *otghs_control; u32 __iomem *power; u32 __iomem *power_aux; u32 __iomem *pcie_pcs; struct clk *sys_clk; enum omap_control_phy_type type; }; enum omap_control_usb_mode { USB_MODE_UNDEFINED = 0, USB_MODE_HOST, USB_MODE_DEVICE, USB_MODE_DISCONNECT, }; #define OMAP_CTRL_DEV_PHY_PD BIT(0) #define OMAP_CTRL_DEV_AVALID BIT(0) #define OMAP_CTRL_DEV_BVALID BIT(1) #define OMAP_CTRL_DEV_VBUSVALID BIT(2) #define OMAP_CTRL_DEV_SESSEND BIT(3) #define OMAP_CTRL_DEV_IDDIG BIT(4) #define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000 #define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 0xE #define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000 #define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT 0x16 #define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3 #define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0 #define OMAP_CTRL_PCIE_PCS_MASK 0xff #define OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT 16 #define OMAP_CTRL_USB2_PHY_PD BIT(28) #define AM437X_CTRL_USB2_PHY_PD BIT(0) #define AM437X_CTRL_USB2_OTG_PD BIT(1) #define AM437X_CTRL_USB2_OTGVDET_EN BIT(19) #define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20) #if IS_ENABLED(CONFIG_OMAP_CONTROL_PHY) void omap_control_phy_power(struct device *dev, int on); void omap_control_usb_set_mode(struct device *dev, enum omap_control_usb_mode mode); void omap_control_pcie_pcs(struct device *dev, u8 delay); #else static inline void omap_control_phy_power(struct device *dev, int on) { } static inline void omap_control_usb_set_mode(struct device *dev, enum omap_control_usb_mode mode) { } static inline void omap_control_pcie_pcs(struct device *dev, u8 delay) { } #endif #endif /* __OMAP_CONTROL_PHY_H__ */ PK ! 5 $}� � phy/phy-sun4i-usb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015 Hans de Goede <hdegoede@redhat.com> */ #ifndef PHY_SUN4I_USB_H_ #define PHY_SUN4I_USB_H_ #include "phy.h" /** * sun4i_usb_phy_set_squelch_detect() - Enable/disable squelch detect * @phy: reference to a sun4i usb phy * @enabled: wether to enable or disable squelch detect */ void sun4i_usb_phy_set_squelch_detect(struct phy *phy, bool enabled); #endif PK ! ��o�� � phy/phy-mipi-dphy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2018 Cadence Design Systems Inc. */ #ifndef __PHY_MIPI_DPHY_H_ #define __PHY_MIPI_DPHY_H_ /** * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set * * This structure is used to represent the configuration state of a * MIPI D-PHY phy. */ struct phy_configure_opts_mipi_dphy { /** * @clk_miss: * * Timeout, in picoseconds, for receiver to detect absence of * Clock transitions and disable the Clock Lane HS-RX. * * Maximum value: 60000 ps */ unsigned int clk_miss; /** * @clk_post: * * Time, in picoseconds, that the transmitter continues to * send HS clock after the last associated Data Lane has * transitioned to LP Mode. Interval is defined as the period * from the end of @hs_trail to the beginning of @clk_trail. * * Minimum value: 60000 ps + 52 * @hs_clk_rate period in ps */ unsigned int clk_post; /** * @clk_pre: * * Time, in UI, that the HS clock shall be driven by * the transmitter prior to any associated Data Lane beginning * the transition from LP to HS mode. * * Minimum value: 8 UI */ unsigned int clk_pre; /** * @clk_prepare: * * Time, in picoseconds, that the transmitter drives the Clock * Lane LP-00 Line state immediately before the HS-0 Line * state starting the HS transmission. * * Minimum value: 38000 ps * Maximum value: 95000 ps */ unsigned int clk_prepare; /** * @clk_settle: * * Time interval, in picoseconds, during which the HS receiver * should ignore any Clock Lane HS transitions, starting from * the beginning of @clk_prepare. * * Minimum value: 95000 ps * Maximum value: 300000 ps */ unsigned int clk_settle; /** * @clk_term_en: * * Time, in picoseconds, for the Clock Lane receiver to enable * the HS line termination. * * Maximum value: 38000 ps */ unsigned int clk_term_en; /** * @clk_trail: * * Time, in picoseconds, that the transmitter drives the HS-0 * state after the last payload clock bit of a HS transmission * burst. * * Minimum value: 60000 ps */ unsigned int clk_trail; /** * @clk_zero: * * Time, in picoseconds, that the transmitter drives the HS-0 * state prior to starting the Clock. */ unsigned int clk_zero; /** * @d_term_en: * * Time, in picoseconds, for the Data Lane receiver to enable * the HS line termination. * * Maximum value: 35000 ps + 4 * @hs_clk_rate period in ps */ unsigned int d_term_en; /** * @eot: * * Transmitted time interval, in picoseconds, from the start * of @hs_trail or @clk_trail, to the start of the LP- 11 * state following a HS burst. * * Maximum value: 105000 ps + 12 * @hs_clk_rate period in ps */ unsigned int eot; /** * @hs_exit: * * Time, in picoseconds, that the transmitter drives LP-11 * following a HS burst. * * Minimum value: 100000 ps */ unsigned int hs_exit; /** * @hs_prepare: * * Time, in picoseconds, that the transmitter drives the Data * Lane LP-00 Line state immediately before the HS-0 Line * state starting the HS transmission. * * Minimum value: 40000 ps + 4 * @hs_clk_rate period in ps * Maximum value: 85000 ps + 6 * @hs_clk_rate period in ps */ unsigned int hs_prepare; /** * @hs_settle: * * Time interval, in picoseconds, during which the HS receiver * shall ignore any Data Lane HS transitions, starting from * the beginning of @hs_prepare. * * Minimum value: 85000 ps + 6 * @hs_clk_rate period in ps * Maximum value: 145000 ps + 10 * @hs_clk_rate period in ps */ unsigned int hs_settle; /** * @hs_skip: * * Time interval, in picoseconds, during which the HS-RX * should ignore any transitions on the Data Lane, following a * HS burst. The end point of the interval is defined as the * beginning of the LP-11 state following the HS burst. * * Minimum value: 40000 ps * Maximum value: 55000 ps + 4 * @hs_clk_rate period in ps */ unsigned int hs_skip; /** * @hs_trail: * * Time, in picoseconds, that the transmitter drives the * flipped differential state after last payload data bit of a * HS transmission burst * * Minimum value: max(8 * @hs_clk_rate period in ps, * 60000 ps + 4 * @hs_clk_rate period in ps) */ unsigned int hs_trail; /** * @hs_zero: * * Time, in picoseconds, that the transmitter drives the HS-0 * state prior to transmitting the Sync sequence. */ unsigned int hs_zero; /** * @init: * * Time, in microseconds for the initialization period to * complete. * * Minimum value: 100 us */ unsigned int init; /** * @lpx: * * Transmitted length, in picoseconds, of any Low-Power state * period. * * Minimum value: 50000 ps */ unsigned int lpx; /** * @ta_get: * * Time, in picoseconds, that the new transmitter drives the * Bridge state (LP-00) after accepting control during a Link * Turnaround. * * Value: 5 * @lpx */ unsigned int ta_get; /** * @ta_go: * * Time, in picoseconds, that the transmitter drives the * Bridge state (LP-00) before releasing control during a Link * Turnaround. * * Value: 4 * @lpx */ unsigned int ta_go; /** * @ta_sure: * * Time, in picoseconds, that the new transmitter waits after * the LP-10 state before transmitting the Bridge state * (LP-00) during a Link Turnaround. * * Minimum value: @lpx * Maximum value: 2 * @lpx */ unsigned int ta_sure; /** * @wakeup: * * Time, in microseconds, that a transmitter drives a Mark-1 * state prior to a Stop state in order to initiate an exit * from ULPS. * * Minimum value: 1000 us */ unsigned int wakeup; /** * @hs_clk_rate: * * Clock rate, in Hertz, of the high-speed clock. */ unsigned long hs_clk_rate; /** * @lp_clk_rate: * * Clock rate, in Hertz, of the low-power clock. */ unsigned long lp_clk_rate; /** * @lanes: * * Number of active, consecutive, data lanes, starting from * lane 0, used for the transmissions. */ unsigned char lanes; }; int phy_mipi_dphy_get_default_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg); int phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg); #endif /* __PHY_MIPI_DPHY_H_ */ PK ! h�y�: : mdio-bitbang.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MDIO_BITBANG_H #define __LINUX_MDIO_BITBANG_H #include <linux/phy.h> struct module; struct mdiobb_ctrl; struct mdiobb_ops { struct module *owner; /* Set the Management Data Clock high if level is one, * low if level is zero. */ void (*set_mdc)(struct mdiobb_ctrl *ctrl, int level); /* Configure the Management Data I/O pin as an input if * "output" is zero, or an output if "output" is one. */ void (*set_mdio_dir)(struct mdiobb_ctrl *ctrl, int output); /* Set the Management Data I/O pin high if value is one, * low if "value" is zero. This may only be called * when the MDIO pin is configured as an output. */ void (*set_mdio_data)(struct mdiobb_ctrl *ctrl, int value); /* Retrieve the state Management Data I/O pin. */ int (*get_mdio_data)(struct mdiobb_ctrl *ctrl); }; struct mdiobb_ctrl { const struct mdiobb_ops *ops; unsigned int override_op_c22; u8 op_c22_read; u8 op_c22_write; }; int mdiobb_read(struct mii_bus *bus, int phy, int reg); int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val); /* The returned bus is not yet registered with the phy layer. */ struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl); /* The bus must already have been unregistered. */ void free_mdio_bitbang(struct mii_bus *bus); #endif PK ! �B �� � pagewalk.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PAGEWALK_H #define _LINUX_PAGEWALK_H #include <linux/mm.h> struct mm_walk; /** * struct mm_walk_ops - callbacks for walk_page_range * @pgd_entry: if set, called for each non-empty PGD (top-level) entry * @p4d_entry: if set, called for each non-empty P4D entry * @pud_entry: if set, called for each non-empty PUD entry * @pmd_entry: if set, called for each non-empty PMD entry * this handler is required to be able to handle * pmd_trans_huge() pmds. They may simply choose to * split_huge_page() instead of handling it explicitly. * @pte_entry: if set, called for each non-empty PTE (lowest-level) * entry * @pte_hole: if set, called for each hole at all levels, * depth is -1 if not known, 0:PGD, 1:P4D, 2:PUD, 3:PMD * 4:PTE. Any folded depths (where PTRS_PER_P?D is equal * to 1) are skipped. * @hugetlb_entry: if set, called for each hugetlb entry * @test_walk: caller specific callback function to determine whether * we walk over the current vma or not. Returning 0 means * "do page table walk over the current vma", returning * a negative value means "abort current page table walk * right now" and returning 1 means "skip the current vma" * @pre_vma: if set, called before starting walk on a non-null vma. * @post_vma: if set, called after a walk on a non-null vma, provided * that @pre_vma and the vma walk succeeded. * * p?d_entry callbacks are called even if those levels are folded on a * particular architecture/configuration. */ struct mm_walk_ops { int (*pgd_entry)(pgd_t *pgd, unsigned long addr, unsigned long next, struct mm_walk *walk); int (*p4d_entry)(p4d_t *p4d, unsigned long addr, unsigned long next, struct mm_walk *walk); int (*pud_entry)(pud_t *pud, unsigned long addr, unsigned long next, struct mm_walk *walk); int (*pmd_entry)(pmd_t *pmd, unsigned long addr, unsigned long next, struct mm_walk *walk); int (*pte_entry)(pte_t *pte, unsigned long addr, unsigned long next, struct mm_walk *walk); int (*pte_hole)(unsigned long addr, unsigned long next, int depth, struct mm_walk *walk); int (*hugetlb_entry)(pte_t *pte, unsigned long hmask, unsigned long addr, unsigned long next, struct mm_walk *walk); int (*test_walk)(unsigned long addr, unsigned long next, struct mm_walk *walk); int (*pre_vma)(unsigned long start, unsigned long end, struct mm_walk *walk); void (*post_vma)(struct mm_walk *walk); }; /* * Action for pud_entry / pmd_entry callbacks. * ACTION_SUBTREE is the default */ enum page_walk_action { /* Descend to next level, splitting huge pages if needed and possible */ ACTION_SUBTREE = 0, /* Continue to next entry at this level (ignoring any subtree) */ ACTION_CONTINUE = 1, /* Call again for this entry */ ACTION_AGAIN = 2 }; /** * struct mm_walk - walk_page_range data * @ops: operation to call during the walk * @mm: mm_struct representing the target process of page table walk * @pgd: pointer to PGD; only valid with no_vma (otherwise set to NULL) * @vma: vma currently walked (NULL if walking outside vmas) * @action: next action to perform (see enum page_walk_action) * @no_vma: walk ignoring vmas (vma will always be NULL) * @private: private data for callbacks' usage * * (see the comment on walk_page_range() for more details) */ struct mm_walk { const struct mm_walk_ops *ops; struct mm_struct *mm; pgd_t *pgd; struct vm_area_struct *vma; enum page_walk_action action; bool no_vma; void *private; }; int walk_page_range(struct mm_struct *mm, unsigned long start, unsigned long end, const struct mm_walk_ops *ops, void *private); int walk_page_range_novma(struct mm_struct *mm, unsigned long start, unsigned long end, const struct mm_walk_ops *ops, pgd_t *pgd, void *private); int walk_page_range_vma(struct vm_area_struct *vma, unsigned long start, unsigned long end, const struct mm_walk_ops *ops, void *private); int walk_page_vma(struct vm_area_struct *vma, const struct mm_walk_ops *ops, void *private); int walk_page_mapping(struct address_space *mapping, pgoff_t first_index, pgoff_t nr, const struct mm_walk_ops *ops, void *private); #endif /* _LINUX_PAGEWALK_H */ PK ! [ơ� � irqdesc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IRQDESC_H #define _LINUX_IRQDESC_H #include <linux/rcupdate.h> #include <linux/kobject.h> #include <linux/mutex.h> /* * Core internal functions to deal with irq descriptors */ struct irq_affinity_notify; struct proc_dir_entry; struct module; struct irq_desc; struct irq_domain; struct pt_regs; /** * struct irq_desc - interrupt descriptor * @irq_common_data: per irq and chip data passed down to chip functions * @kstat_irqs: irq stats per cpu * @handle_irq: highlevel irq-events handler * @action: the irq action chain * @status_use_accessors: status information * @core_internal_state__do_not_mess_with_it: core internal status information * @depth: disable-depth, for nested irq_disable() calls * @wake_depth: enable depth, for multiple irq_set_irq_wake() callers * @tot_count: stats field for non-percpu irqs * @irq_count: stats field to detect stalled irqs * @last_unhandled: aging timer for unhandled count * @irqs_unhandled: stats field for spurious unhandled interrupts * @threads_handled: stats field for deferred spurious detection of threaded handlers * @threads_handled_last: comparator field for deferred spurious detection of threaded handlers * @lock: locking for SMP * @affinity_hint: hint to user space for preferred irq affinity * @affinity_notify: context for notification of affinity changes * @pending_mask: pending rebalanced interrupts * @threads_oneshot: bitfield to handle shared oneshot threads * @threads_active: number of irqaction threads currently running * @wait_for_threads: wait queue for sync_irq to wait for threaded handlers * @nr_actions: number of installed actions on this descriptor * @no_suspend_depth: number of irqactions on a irq descriptor with * IRQF_NO_SUSPEND set * @force_resume_depth: number of irqactions on a irq descriptor with * IRQF_FORCE_RESUME set * @rcu: rcu head for delayed free * @kobj: kobject used to represent this struct in sysfs * @request_mutex: mutex to protect request/free before locking desc->lock * @dir: /proc/irq/ procfs entry * @debugfs_file: dentry for the debugfs file * @name: flow handler name for /proc/interrupts output */ struct irq_desc { struct irq_common_data irq_common_data; struct irq_data irq_data; unsigned int __percpu *kstat_irqs; irq_flow_handler_t handle_irq; struct irqaction *action; /* IRQ action list */ unsigned int status_use_accessors; unsigned int core_internal_state__do_not_mess_with_it; unsigned int depth; /* nested irq disables */ unsigned int wake_depth; /* nested wake enables */ unsigned int tot_count; unsigned int irq_count; /* For detecting broken IRQs */ unsigned long last_unhandled; /* Aging timer for unhandled count */ unsigned int irqs_unhandled; atomic_t threads_handled; int threads_handled_last; raw_spinlock_t lock; struct cpumask *percpu_enabled; const struct cpumask *percpu_affinity; #ifdef CONFIG_SMP const struct cpumask *affinity_hint; struct irq_affinity_notify *affinity_notify; #ifdef CONFIG_GENERIC_PENDING_IRQ cpumask_var_t pending_mask; #endif #endif unsigned long threads_oneshot; atomic_t threads_active; wait_queue_head_t wait_for_threads; #ifdef CONFIG_PM_SLEEP unsigned int nr_actions; unsigned int no_suspend_depth; unsigned int cond_suspend_depth; unsigned int force_resume_depth; #endif #ifdef CONFIG_PROC_FS struct proc_dir_entry *dir; #endif #ifdef CONFIG_GENERIC_IRQ_DEBUGFS struct dentry *debugfs_file; const char *dev_name; #endif #ifdef CONFIG_SPARSE_IRQ struct rcu_head rcu; struct kobject kobj; #endif struct mutex request_mutex; int parent_irq; struct module *owner; const char *name; } ____cacheline_internodealigned_in_smp; #ifdef CONFIG_SPARSE_IRQ extern void irq_lock_sparse(void); extern void irq_unlock_sparse(void); #else static inline void irq_lock_sparse(void) { } static inline void irq_unlock_sparse(void) { } extern struct irq_desc irq_desc[NR_IRQS]; #endif static inline unsigned int irq_desc_kstat_cpu(struct irq_desc *desc, unsigned int cpu) { return desc->kstat_irqs ? *per_cpu_ptr(desc->kstat_irqs, cpu) : 0; } static inline struct irq_desc *irq_data_to_desc(struct irq_data *data) { return container_of(data->common, struct irq_desc, irq_common_data); } static inline unsigned int irq_desc_get_irq(struct irq_desc *desc) { return desc->irq_data.irq; } static inline struct irq_data *irq_desc_get_irq_data(struct irq_desc *desc) { return &desc->irq_data; } static inline struct irq_chip *irq_desc_get_chip(struct irq_desc *desc) { return desc->irq_data.chip; } static inline void *irq_desc_get_chip_data(struct irq_desc *desc) { return desc->irq_data.chip_data; } static inline void *irq_desc_get_handler_data(struct irq_desc *desc) { return desc->irq_common_data.handler_data; } /* * Architectures call this to let the generic IRQ layer * handle an interrupt. */ static inline void generic_handle_irq_desc(struct irq_desc *desc) { desc->handle_irq(desc); } int handle_irq_desc(struct irq_desc *desc); int generic_handle_irq(unsigned int irq); #ifdef CONFIG_IRQ_DOMAIN /* * Convert a HW interrupt number to a logical one using a IRQ domain, * and handle the result interrupt number. Return -EINVAL if * conversion failed. */ int generic_handle_domain_irq(struct irq_domain *domain, unsigned int hwirq); #ifdef CONFIG_HANDLE_DOMAIN_IRQ int handle_domain_irq(struct irq_domain *domain, unsigned int hwirq, struct pt_regs *regs); int handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq, struct pt_regs *regs); #endif #endif /* Test to see if a driver has successfully requested an irq */ static inline int irq_desc_has_action(struct irq_desc *desc) { return desc && desc->action != NULL; } /** * irq_set_handler_locked - Set irq handler from a locked region * @data: Pointer to the irq_data structure which identifies the irq * @handler: Flow control handler function for this interrupt * * Sets the handler in the irq descriptor associated to @data. * * Must be called with irq_desc locked and valid parameters. Typical * call site is the irq_set_type() callback. */ static inline void irq_set_handler_locked(struct irq_data *data, irq_flow_handler_t handler) { struct irq_desc *desc = irq_data_to_desc(data); desc->handle_irq = handler; } /** * irq_set_chip_handler_name_locked - Set chip, handler and name from a locked region * @data: Pointer to the irq_data structure for which the chip is set * @chip: Pointer to the new irq chip * @handler: Flow control handler function for this interrupt * @name: Name of the interrupt * * Replace the irq chip at the proper hierarchy level in @data and * sets the handler and name in the associated irq descriptor. * * Must be called with irq_desc locked and valid parameters. */ static inline void irq_set_chip_handler_name_locked(struct irq_data *data, struct irq_chip *chip, irq_flow_handler_t handler, const char *name) { struct irq_desc *desc = irq_data_to_desc(data); desc->handle_irq = handler; desc->name = name; data->chip = chip; } bool irq_check_status_bit(unsigned int irq, unsigned int bitmask); static inline bool irq_balancing_disabled(unsigned int irq) { return irq_check_status_bit(irq, IRQ_NO_BALANCING_MASK); } static inline bool irq_is_percpu(unsigned int irq) { return irq_check_status_bit(irq, IRQ_PER_CPU); } static inline bool irq_is_percpu_devid(unsigned int irq) { return irq_check_status_bit(irq, IRQ_PER_CPU_DEVID); } void __irq_set_lockdep_class(unsigned int irq, struct lock_class_key *lock_class, struct lock_class_key *request_class); static inline void irq_set_lockdep_class(unsigned int irq, struct lock_class_key *lock_class, struct lock_class_key *request_class) { if (IS_ENABLED(CONFIG_LOCKDEP)) __irq_set_lockdep_class(irq, lock_class, request_class); } #endif PK ! �=�d export.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LINUX_EXPORT_H #define _LINUX_EXPORT_H #include <linux/stringify.h> /* * Export symbols from the kernel to modules. Forked from module.h * to reduce the amount of pointless cruft we feed to gcc when only * exporting a simple symbol or two. * * Try not to add #includes here. It slows compilation and makes kernel * hackers place grumpy comments in header files. */ #ifndef __ASSEMBLY__ #ifdef MODULE extern struct module __this_module; #define THIS_MODULE (&__this_module) #else #define THIS_MODULE ((struct module *)0) #endif #ifdef CONFIG_MODVERSIONS /* Mark the CRC weak since genksyms apparently decides not to * generate a checksums for some symbols */ #if defined(CONFIG_MODULE_REL_CRCS) #define __CRC_SYMBOL(sym, sec) \ asm(" .section \"___kcrctab" sec "+" #sym "\", \"a\" \n" \ " .weak __crc_" #sym " \n" \ " .long __crc_" #sym " - . \n" \ " .previous \n") #else #define __CRC_SYMBOL(sym, sec) \ asm(" .section \"___kcrctab" sec "+" #sym "\", \"a\" \n" \ " .weak __crc_" #sym " \n" \ " .long __crc_" #sym " \n" \ " .previous \n") #endif #else #define __CRC_SYMBOL(sym, sec) #endif #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS #include <linux/compiler.h> /* * Emit the ksymtab entry as a pair of relative references: this reduces * the size by half on 64-bit architectures, and eliminates the need for * absolute relocations that require runtime processing on relocatable * kernels. */ #define __KSYMTAB_ENTRY(sym, sec) \ __ADDRESSABLE(sym) \ asm(" .section \"___ksymtab" sec "+" #sym "\", \"a\" \n" \ " .balign 4 \n" \ "__ksymtab_" #sym ": \n" \ " .long " #sym "- . \n" \ " .long __kstrtab_" #sym "- . \n" \ " .long __kstrtabns_" #sym "- . \n" \ " .previous \n") struct kernel_symbol { int value_offset; int name_offset; int namespace_offset; }; #else #define __KSYMTAB_ENTRY(sym, sec) \ static const struct kernel_symbol __ksymtab_##sym \ __attribute__((section("___ksymtab" sec "+" #sym), used)) \ __aligned(sizeof(void *)) \ = { (unsigned long)&sym, __kstrtab_##sym, __kstrtabns_##sym } struct kernel_symbol { unsigned long value; const char *name; const char *namespace; }; #endif #ifdef __GENKSYMS__ #define ___EXPORT_SYMBOL(sym, sec, ns) __GENKSYMS_EXPORT_SYMBOL(sym) #else /* * For every exported symbol, do the following: * * - If applicable, place a CRC entry in the __kcrctab section. * - Put the name of the symbol and namespace (empty string "" for none) in * __ksymtab_strings. * - Place a struct kernel_symbol entry in the __ksymtab section. * * note on .section use: we specify progbits since usage of the "M" (SHF_MERGE) * section flag requires it. Use '%progbits' instead of '@progbits' since the * former apparently works on all arches according to the binutils source. */ #define ___EXPORT_SYMBOL(sym, sec, ns) \ extern typeof(sym) sym; \ extern const char __kstrtab_##sym[]; \ extern const char __kstrtabns_##sym[]; \ __CRC_SYMBOL(sym, sec); \ asm(" .section \"__ksymtab_strings\",\"aMS\",%progbits,1 \n" \ "__kstrtab_" #sym ": \n" \ " .asciz \"" #sym "\" \n" \ "__kstrtabns_" #sym ": \n" \ " .asciz \"" ns "\" \n" \ " .previous \n"); \ __KSYMTAB_ENTRY(sym, sec) #endif #if !defined(CONFIG_MODULES) || defined(__DISABLE_EXPORTS) /* * Allow symbol exports to be disabled completely so that C code may * be reused in other execution contexts such as the UEFI stub or the * decompressor. */ #define __EXPORT_SYMBOL(sym, sec, ns) #elif defined(CONFIG_TRIM_UNUSED_KSYMS) #include <generated/autoksyms.h> /* * For fine grained build dependencies, we want to tell the build system * about each possible exported symbol even if they're not actually exported. * We use a symbol pattern __ksym_marker_<symbol> that the build system filters * from the $(NM) output (see scripts/gen_ksymdeps.sh). These symbols are * discarded in the final link stage. */ #define __ksym_marker(sym) \ static int __ksym_marker_##sym[0] __section(".discard.ksym") __used #define __EXPORT_SYMBOL(sym, sec, ns) \ __ksym_marker(sym); \ __cond_export_sym(sym, sec, ns, __is_defined(__KSYM_##sym)) #define __cond_export_sym(sym, sec, ns, conf) \ ___cond_export_sym(sym, sec, ns, conf) #define ___cond_export_sym(sym, sec, ns, enabled) \ __cond_export_sym_##enabled(sym, sec, ns) #define __cond_export_sym_1(sym, sec, ns) ___EXPORT_SYMBOL(sym, sec, ns) #ifdef __GENKSYMS__ #define __cond_export_sym_0(sym, sec, ns) __GENKSYMS_EXPORT_SYMBOL(sym) #else #define __cond_export_sym_0(sym, sec, ns) /* nothing */ #endif #else #define __EXPORT_SYMBOL(sym, sec, ns) ___EXPORT_SYMBOL(sym, sec, ns) #endif /* CONFIG_MODULES */ #ifdef DEFAULT_SYMBOL_NAMESPACE #define _EXPORT_SYMBOL(sym, sec) __EXPORT_SYMBOL(sym, sec, __stringify(DEFAULT_SYMBOL_NAMESPACE)) #else #define _EXPORT_SYMBOL(sym, sec) __EXPORT_SYMBOL(sym, sec, "") #endif #define EXPORT_SYMBOL(sym) _EXPORT_SYMBOL(sym, "") #define EXPORT_SYMBOL_GPL(sym) _EXPORT_SYMBOL(sym, "_gpl") #define EXPORT_SYMBOL_NS(sym, ns) __EXPORT_SYMBOL(sym, "", __stringify(ns)) #define EXPORT_SYMBOL_NS_GPL(sym, ns) __EXPORT_SYMBOL(sym, "_gpl", __stringify(ns)) #endif /* !__ASSEMBLY__ */ #endif /* _LINUX_EXPORT_H */ PK ! �d�P� � leds-regulator.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * leds-regulator.h - platform data structure for regulator driven LEDs. * * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it> */ #ifndef __LINUX_LEDS_REGULATOR_H #define __LINUX_LEDS_REGULATOR_H /* * Use "vled" as supply id when declaring the regulator consumer: * * static struct regulator_consumer_supply pcap_regulator_VVIB_consumers [] = { * { .dev_name = "leds-regulator.0", .supply = "vled" }, * }; * * If you have several regulator driven LEDs, you can append a numerical id to * .dev_name as done above, and use the same id when declaring the platform * device: * * static struct led_regulator_platform_data a780_vibrator_data = { * .name = "a780::vibrator", * }; * * static struct platform_device a780_vibrator = { * .name = "leds-regulator", * .id = 0, * .dev = { * .platform_data = &a780_vibrator_data, * }, * }; */ #include <linux/leds.h> struct led_regulator_platform_data { char *name; /* LED name as expected by LED class */ enum led_brightness brightness; /* initial brightness value */ }; #endif /* __LINUX_LEDS_REGULATOR_H */ PK ! �5�� � init_ohci1394_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT extern int __initdata init_ohci1394_dma_early; extern void __init init_ohci1394_dma_on_all_controllers(void); #endif PK ! � �U� � btree-128.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ extern struct btree_geo btree_geo128; struct btree_head128 { struct btree_head h; }; static inline void btree_init_mempool128(struct btree_head128 *head, mempool_t *mempool) { btree_init_mempool(&head->h, mempool); } static inline int btree_init128(struct btree_head128 *head) { return btree_init(&head->h); } static inline void btree_destroy128(struct btree_head128 *head) { btree_destroy(&head->h); } static inline void *btree_lookup128(struct btree_head128 *head, u64 k1, u64 k2) { u64 key[2] = {k1, k2}; return btree_lookup(&head->h, &btree_geo128, (unsigned long *)&key); } static inline void *btree_get_prev128(struct btree_head128 *head, u64 *k1, u64 *k2) { u64 key[2] = {*k1, *k2}; void *val; val = btree_get_prev(&head->h, &btree_geo128, (unsigned long *)&key); *k1 = key[0]; *k2 = key[1]; return val; } static inline int btree_insert128(struct btree_head128 *head, u64 k1, u64 k2, void *val, gfp_t gfp) { u64 key[2] = {k1, k2}; return btree_insert(&head->h, &btree_geo128, (unsigned long *)&key, val, gfp); } static inline int btree_update128(struct btree_head128 *head, u64 k1, u64 k2, void *val) { u64 key[2] = {k1, k2}; return btree_update(&head->h, &btree_geo128, (unsigned long *)&key, val); } static inline void *btree_remove128(struct btree_head128 *head, u64 k1, u64 k2) { u64 key[2] = {k1, k2}; return btree_remove(&head->h, &btree_geo128, (unsigned long *)&key); } static inline void *btree_last128(struct btree_head128 *head, u64 *k1, u64 *k2) { u64 key[2]; void *val; val = btree_last(&head->h, &btree_geo128, (unsigned long *)&key[0]); if (val) { *k1 = key[0]; *k2 = key[1]; } return val; } static inline int btree_merge128(struct btree_head128 *target, struct btree_head128 *victim, gfp_t gfp) { return btree_merge(&target->h, &victim->h, &btree_geo128, gfp); } void visitor128(void *elem, unsigned long opaque, unsigned long *__key, size_t index, void *__func); typedef void (*visitor128_t)(void *elem, unsigned long opaque, u64 key1, u64 key2, size_t index); static inline size_t btree_visitor128(struct btree_head128 *head, unsigned long opaque, visitor128_t func2) { return btree_visitor(&head->h, &btree_geo128, opaque, visitor128, func2); } static inline size_t btree_grim_visitor128(struct btree_head128 *head, unsigned long opaque, visitor128_t func2) { return btree_grim_visitor(&head->h, &btree_geo128, opaque, visitor128, func2); } #define btree_for_each_safe128(head, k1, k2, val) \ for (val = btree_last128(head, &k1, &k2); \ val; \ val = btree_get_prev128(head, &k1, &k2)) PK ! �u� � kdebug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KDEBUG_H #define _LINUX_KDEBUG_H #include <asm/kdebug.h> struct notifier_block; struct die_args { struct pt_regs *regs; const char *str; long err; int trapnr; int signr; }; int register_die_notifier(struct notifier_block *nb); int unregister_die_notifier(struct notifier_block *nb); int notify_die(enum die_val val, const char *str, struct pt_regs *regs, long err, int trap, int sig); #endif /* _LINUX_KDEBUG_H */ PK ! ylO}� � journal-head.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/journal-head.h * * buffer_head fields for JBD * * 27 May 2001 Andrew Morton * Created - pulled out of fs.h */ #ifndef JOURNAL_HEAD_H_INCLUDED #define JOURNAL_HEAD_H_INCLUDED #include <linux/spinlock.h> typedef unsigned int tid_t; /* Unique transaction ID */ typedef struct transaction_s transaction_t; /* Compound transaction type */ struct buffer_head; struct journal_head { /* * Points back to our buffer_head. [jbd_lock_bh_journal_head()] */ struct buffer_head *b_bh; /* * Protect the buffer head state */ spinlock_t b_state_lock; /* * Reference count - see description in journal.c * [jbd_lock_bh_journal_head()] */ int b_jcount; /* * Journalling list for this buffer [b_state_lock] * NOTE: We *cannot* combine this with b_modified into a bitfield * as gcc would then (which the C standard allows but which is * very unuseful) make 64-bit accesses to the bitfield and clobber * b_jcount if its update races with bitfield modification. */ unsigned b_jlist; /* * This flag signals the buffer has been modified by * the currently running transaction * [b_state_lock] */ unsigned b_modified; /* * Copy of the buffer data frozen for writing to the log. * [b_state_lock] */ char *b_frozen_data; /* * Pointer to a saved copy of the buffer containing no uncommitted * deallocation references, so that allocations can avoid overwriting * uncommitted deletes. [b_state_lock] */ char *b_committed_data; /* * Pointer to the compound transaction which owns this buffer's * metadata: either the running transaction or the committing * transaction (if there is one). Only applies to buffers on a * transaction's data or metadata journaling list. * [j_list_lock] [b_state_lock] * Either of these locks is enough for reading, both are needed for * changes. */ transaction_t *b_transaction; /* * Pointer to the running compound transaction which is currently * modifying the buffer's metadata, if there was already a transaction * committing it when the new transaction touched it. * [t_list_lock] [b_state_lock] */ transaction_t *b_next_transaction; /* * Doubly-linked list of buffers on a transaction's data, metadata or * forget queue. [t_list_lock] [b_state_lock] */ struct journal_head *b_tnext, *b_tprev; /* * Pointer to the compound transaction against which this buffer * is checkpointed. Only dirty buffers can be checkpointed. * [j_list_lock] */ transaction_t *b_cp_transaction; /* * Doubly-linked list of buffers still remaining to be flushed * before an old transaction can be checkpointed. * [j_list_lock] */ struct journal_head *b_cpnext, *b_cpprev; /* Trigger type */ struct jbd2_buffer_trigger_type *b_triggers; /* Trigger type for the committing transaction's frozen data */ struct jbd2_buffer_trigger_type *b_frozen_triggers; }; #endif /* JOURNAL_HEAD_H_INCLUDED */ PK ! |7�/�` �` cgroup-defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/cgroup-defs.h - basic definitions for cgroup * * This file provides basic type and interface. Include this file directly * only if necessary to avoid cyclic dependencies. */ #ifndef _LINUX_CGROUP_DEFS_H #define _LINUX_CGROUP_DEFS_H #include <linux/limits.h> #include <linux/list.h> #include <linux/idr.h> #include <linux/wait.h> #include <linux/mutex.h> #include <linux/rcupdate.h> #include <linux/refcount.h> #include <linux/percpu-refcount.h> #include <linux/percpu-rwsem.h> #include <linux/u64_stats_sync.h> #include <linux/workqueue.h> #include <linux/bpf-cgroup.h> #include <linux/psi_types.h> #ifdef CONFIG_CGROUPS struct cgroup; struct cgroup_root; struct cgroup_subsys; struct cgroup_taskset; struct kernfs_node; struct kernfs_ops; struct kernfs_open_file; struct seq_file; struct poll_table_struct; #define MAX_CGROUP_TYPE_NAMELEN 32 #define MAX_CGROUP_ROOT_NAMELEN 64 #define MAX_CFTYPE_NAME 64 /* define the enumeration of all cgroup subsystems */ #define SUBSYS(_x) _x ## _cgrp_id, enum cgroup_subsys_id { #include <linux/cgroup_subsys.h> CGROUP_SUBSYS_COUNT, }; #undef SUBSYS /* bits in struct cgroup_subsys_state flags field */ enum { CSS_NO_REF = (1 << 0), /* no reference counting for this css */ CSS_ONLINE = (1 << 1), /* between ->css_online() and ->css_offline() */ CSS_RELEASED = (1 << 2), /* refcnt reached zero, released */ CSS_VISIBLE = (1 << 3), /* css is visible to userland */ CSS_DYING = (1 << 4), /* css is dying */ }; /* bits in struct cgroup flags field */ enum { /* Control Group requires release notifications to userspace */ CGRP_NOTIFY_ON_RELEASE, /* * Clone the parent's configuration when creating a new child * cpuset cgroup. For historical reasons, this option can be * specified at mount time and thus is implemented here. */ CGRP_CPUSET_CLONE_CHILDREN, /* Control group has to be frozen. */ CGRP_FREEZE, /* Cgroup is frozen. */ CGRP_FROZEN, }; /* cgroup_root->flags */ enum { CGRP_ROOT_NOPREFIX = (1 << 1), /* mounted subsystems have no named prefix */ CGRP_ROOT_XATTR = (1 << 2), /* supports extended attributes */ /* * Consider namespaces as delegation boundaries. If this flag is * set, controller specific interface files in a namespace root * aren't writeable from inside the namespace. */ CGRP_ROOT_NS_DELEGATE = (1 << 3), /* * Enable cpuset controller in v1 cgroup to use v2 behavior. */ CGRP_ROOT_CPUSET_V2_MODE = (1 << 4), /* * Enable legacy local memory.events. */ CGRP_ROOT_MEMORY_LOCAL_EVENTS = (1 << 5), /* * Enable recursive subtree protection */ CGRP_ROOT_MEMORY_RECURSIVE_PROT = (1 << 6), }; /* cftype->flags */ enum { CFTYPE_ONLY_ON_ROOT = (1 << 0), /* only create on root cgrp */ CFTYPE_NOT_ON_ROOT = (1 << 1), /* don't create on root cgrp */ CFTYPE_NS_DELEGATABLE = (1 << 2), /* writeable beyond delegation boundaries */ CFTYPE_NO_PREFIX = (1 << 3), /* (DON'T USE FOR NEW FILES) no subsys prefix */ CFTYPE_WORLD_WRITABLE = (1 << 4), /* (DON'T USE FOR NEW FILES) S_IWUGO */ CFTYPE_DEBUG = (1 << 5), /* create when cgroup_debug */ CFTYPE_PRESSURE = (1 << 6), /* only if pressure feature is enabled */ /* internal flags, do not use outside cgroup core proper */ __CFTYPE_ONLY_ON_DFL = (1 << 16), /* only on default hierarchy */ __CFTYPE_NOT_ON_DFL = (1 << 17), /* not on default hierarchy */ }; /* * cgroup_file is the handle for a file instance created in a cgroup which * is used, for example, to generate file changed notifications. This can * be obtained by setting cftype->file_offset. */ struct cgroup_file { /* do not access any fields from outside cgroup core */ struct kernfs_node *kn; unsigned long notified_at; struct timer_list notify_timer; }; /* * Per-subsystem/per-cgroup state maintained by the system. This is the * fundamental structural building block that controllers deal with. * * Fields marked with "PI:" are public and immutable and may be accessed * directly without synchronization. */ struct cgroup_subsys_state { /* PI: the cgroup that this css is attached to */ struct cgroup *cgroup; /* PI: the cgroup subsystem that this css is attached to */ struct cgroup_subsys *ss; /* reference count - access via css_[try]get() and css_put() */ struct percpu_ref refcnt; /* siblings list anchored at the parent's ->children */ struct list_head sibling; struct list_head children; /* flush target list anchored at cgrp->rstat_css_list */ struct list_head rstat_css_node; /* * PI: Subsys-unique ID. 0 is unused and root is always 1. The * matching css can be looked up using css_from_id(). */ int id; unsigned int flags; /* * Monotonically increasing unique serial number which defines a * uniform order among all csses. It's guaranteed that all * ->children lists are in the ascending order of ->serial_nr and * used to allow interrupting and resuming iterations. */ u64 serial_nr; /* * Incremented by online self and children. Used to guarantee that * parents are not offlined before their children. */ atomic_t online_cnt; /* percpu_ref killing and RCU release */ struct work_struct destroy_work; struct rcu_work destroy_rwork; /* * PI: the parent css. Placed here for cache proximity to following * fields of the containing structure. */ struct cgroup_subsys_state *parent; }; /* * A css_set is a structure holding pointers to a set of * cgroup_subsys_state objects. This saves space in the task struct * object and speeds up fork()/exit(), since a single inc/dec and a * list_add()/del() can bump the reference count on the entire cgroup * set for a task. */ struct css_set { /* * Set of subsystem states, one for each subsystem. This array is * immutable after creation apart from the init_css_set during * subsystem registration (at boot time). */ struct cgroup_subsys_state *subsys[CGROUP_SUBSYS_COUNT]; /* reference count */ refcount_t refcount; /* * For a domain cgroup, the following points to self. If threaded, * to the matching cset of the nearest domain ancestor. The * dom_cset provides access to the domain cgroup and its csses to * which domain level resource consumptions should be charged. */ struct css_set *dom_cset; /* the default cgroup associated with this css_set */ struct cgroup *dfl_cgrp; /* internal task count, protected by css_set_lock */ int nr_tasks; /* * Lists running through all tasks using this cgroup group. * mg_tasks lists tasks which belong to this cset but are in the * process of being migrated out or in. Protected by * css_set_rwsem, but, during migration, once tasks are moved to * mg_tasks, it can be read safely while holding cgroup_mutex. */ struct list_head tasks; struct list_head mg_tasks; struct list_head dying_tasks; /* all css_task_iters currently walking this cset */ struct list_head task_iters; /* * On the default hierarchy, ->subsys[ssid] may point to a css * attached to an ancestor instead of the cgroup this css_set is * associated with. The following node is anchored at * ->subsys[ssid]->cgroup->e_csets[ssid] and provides a way to * iterate through all css's attached to a given cgroup. */ struct list_head e_cset_node[CGROUP_SUBSYS_COUNT]; /* all threaded csets whose ->dom_cset points to this cset */ struct list_head threaded_csets; struct list_head threaded_csets_node; /* * List running through all cgroup groups in the same hash * slot. Protected by css_set_lock */ struct hlist_node hlist; /* * List of cgrp_cset_links pointing at cgroups referenced from this * css_set. Protected by css_set_lock. */ struct list_head cgrp_links; /* * List of csets participating in the on-going migration either as * source or destination. Protected by cgroup_mutex. */ struct list_head mg_src_preload_node; struct list_head mg_dst_preload_node; struct list_head mg_node; /* * If this cset is acting as the source of migration the following * two fields are set. mg_src_cgrp and mg_dst_cgrp are * respectively the source and destination cgroups of the on-going * migration. mg_dst_cset is the destination cset the target tasks * on this cset should be migrated to. Protected by cgroup_mutex. */ struct cgroup *mg_src_cgrp; struct cgroup *mg_dst_cgrp; struct css_set *mg_dst_cset; /* dead and being drained, ignore for migration */ bool dead; /* For RCU-protected deletion */ struct rcu_head rcu_head; }; struct cgroup_base_stat { struct task_cputime cputime; }; /* * rstat - cgroup scalable recursive statistics. Accounting is done * per-cpu in cgroup_rstat_cpu which is then lazily propagated up the * hierarchy on reads. * * When a stat gets updated, the cgroup_rstat_cpu and its ancestors are * linked into the updated tree. On the following read, propagation only * considers and consumes the updated tree. This makes reading O(the * number of descendants which have been active since last read) instead of * O(the total number of descendants). * * This is important because there can be a lot of (draining) cgroups which * aren't active and stat may be read frequently. The combination can * become very expensive. By propagating selectively, increasing reading * frequency decreases the cost of each read. * * This struct hosts both the fields which implement the above - * updated_children and updated_next - and the fields which track basic * resource statistics on top of it - bsync, bstat and last_bstat. */ struct cgroup_rstat_cpu { /* * ->bsync protects ->bstat. These are the only fields which get * updated in the hot path. */ struct u64_stats_sync bsync; struct cgroup_base_stat bstat; /* * Snapshots at the last reading. These are used to calculate the * deltas to propagate to the global counters. */ struct cgroup_base_stat last_bstat; /* * Child cgroups with stat updates on this cpu since the last read * are linked on the parent's ->updated_children through * ->updated_next. * * In addition to being more compact, singly-linked list pointing * to the cgroup makes it unnecessary for each per-cpu struct to * point back to the associated cgroup. * * Protected by per-cpu cgroup_rstat_cpu_lock. */ struct cgroup *updated_children; /* terminated by self cgroup */ struct cgroup *updated_next; /* NULL iff not on the list */ }; struct cgroup_freezer_state { /* Should the cgroup and its descendants be frozen. */ bool freeze; /* Should the cgroup actually be frozen? */ int e_freeze; /* Fields below are protected by css_set_lock */ /* Number of frozen descendant cgroups */ int nr_frozen_descendants; /* * Number of tasks, which are counted as frozen: * frozen, SIGSTOPped, and PTRACEd. */ int nr_frozen_tasks; }; struct cgroup { /* self css with NULL ->ss, points back to this cgroup */ struct cgroup_subsys_state self; unsigned long flags; /* "unsigned long" so bitops work */ /* * The depth this cgroup is at. The root is at depth zero and each * step down the hierarchy increments the level. This along with * ancestor_ids[] can determine whether a given cgroup is a * descendant of another without traversing the hierarchy. */ int level; /* Maximum allowed descent tree depth */ int max_depth; /* * Keep track of total numbers of visible and dying descent cgroups. * Dying cgroups are cgroups which were deleted by a user, * but are still existing because someone else is holding a reference. * max_descendants is a maximum allowed number of descent cgroups. * * nr_descendants and nr_dying_descendants are protected * by cgroup_mutex and css_set_lock. It's fine to read them holding * any of cgroup_mutex and css_set_lock; for writing both locks * should be held. */ int nr_descendants; int nr_dying_descendants; int max_descendants; /* * Each non-empty css_set associated with this cgroup contributes * one to nr_populated_csets. The counter is zero iff this cgroup * doesn't have any tasks. * * All children which have non-zero nr_populated_csets and/or * nr_populated_children of their own contribute one to either * nr_populated_domain_children or nr_populated_threaded_children * depending on their type. Each counter is zero iff all cgroups * of the type in the subtree proper don't have any tasks. */ int nr_populated_csets; int nr_populated_domain_children; int nr_populated_threaded_children; int nr_threaded_children; /* # of live threaded child cgroups */ /* sequence number for cgroup.kill, serialized by css_set_lock. */ unsigned int kill_seq; struct kernfs_node *kn; /* cgroup kernfs entry */ struct cgroup_file procs_file; /* handle for "cgroup.procs" */ struct cgroup_file events_file; /* handle for "cgroup.events" */ /* * The bitmask of subsystems enabled on the child cgroups. * ->subtree_control is the one configured through * "cgroup.subtree_control" while ->child_ss_mask is the effective * one which may have more subsystems enabled. Controller knobs * are made available iff it's enabled in ->subtree_control. */ u16 subtree_control; u16 subtree_ss_mask; u16 old_subtree_control; u16 old_subtree_ss_mask; /* Private pointers for each registered subsystem */ struct cgroup_subsys_state __rcu *subsys[CGROUP_SUBSYS_COUNT]; struct cgroup_root *root; /* * List of cgrp_cset_links pointing at css_sets with tasks in this * cgroup. Protected by css_set_lock. */ struct list_head cset_links; /* * On the default hierarchy, a css_set for a cgroup with some * susbsys disabled will point to css's which are associated with * the closest ancestor which has the subsys enabled. The * following lists all css_sets which point to this cgroup's css * for the given subsystem. */ struct list_head e_csets[CGROUP_SUBSYS_COUNT]; /* * If !threaded, self. If threaded, it points to the nearest * domain ancestor. Inside a threaded subtree, cgroups are exempt * from process granularity and no-internal-task constraint. * Domain level resource consumptions which aren't tied to a * specific task are charged to the dom_cgrp. */ struct cgroup *dom_cgrp; struct cgroup *old_dom_cgrp; /* used while enabling threaded */ /* per-cpu recursive resource statistics */ struct cgroup_rstat_cpu __percpu *rstat_cpu; struct list_head rstat_css_list; /* cgroup basic resource statistics */ struct cgroup_base_stat last_bstat; struct cgroup_base_stat bstat; struct prev_cputime prev_cputime; /* for printing out cputime */ /* * list of pidlists, up to two for each namespace (one for procs, one * for tasks); created on demand. */ struct list_head pidlists; struct mutex pidlist_mutex; /* used to wait for offlining of csses */ wait_queue_head_t offline_waitq; /* used to schedule release agent */ struct work_struct release_agent_work; /* used to track pressure stalls */ struct psi_group psi; /* used to store eBPF programs */ struct cgroup_bpf bpf; /* If there is block congestion on this cgroup. */ atomic_t congestion_count; /* Used to store internal freezer state */ struct cgroup_freezer_state freezer; /* ids of the ancestors at each level including self */ u64 ancestor_ids[]; }; /* * A cgroup_root represents the root of a cgroup hierarchy, and may be * associated with a kernfs_root to form an active hierarchy. This is * internal to cgroup core. Don't access directly from controllers. */ struct cgroup_root { struct kernfs_root *kf_root; /* The bitmask of subsystems attached to this hierarchy */ unsigned int subsys_mask; /* Unique id for this hierarchy. */ int hierarchy_id; /* A list running through the active hierarchies */ struct list_head root_list; struct rcu_head rcu; /* Must be near the top */ /* The root cgroup. Root is destroyed on its release. */ struct cgroup cgrp; /* for cgrp->ancestor_ids[0] */ u64 cgrp_ancestor_id_storage; /* Number of cgroups in the hierarchy, used only for /proc/cgroups */ atomic_t nr_cgrps; /* Hierarchy-specific flags */ unsigned int flags; /* The path to use for release notifications. */ char release_agent_path[PATH_MAX]; /* The name for this hierarchy - may be empty */ char name[MAX_CGROUP_ROOT_NAMELEN]; }; /* * struct cftype: handler definitions for cgroup control files * * When reading/writing to a file: * - the cgroup to use is file->f_path.dentry->d_parent->d_fsdata * - the 'cftype' of the file is file->f_path.dentry->d_fsdata */ struct cftype { /* * By convention, the name should begin with the name of the * subsystem, followed by a period. Zero length string indicates * end of cftype array. */ char name[MAX_CFTYPE_NAME]; unsigned long private; /* * The maximum length of string, excluding trailing nul, that can * be passed to write. If < PAGE_SIZE-1, PAGE_SIZE-1 is assumed. */ size_t max_write_len; /* CFTYPE_* flags */ unsigned int flags; /* * If non-zero, should contain the offset from the start of css to * a struct cgroup_file field. cgroup will record the handle of * the created file into it. The recorded handle can be used as * long as the containing css remains accessible. */ unsigned int file_offset; /* * Fields used for internal bookkeeping. Initialized automatically * during registration. */ struct cgroup_subsys *ss; /* NULL for cgroup core files */ struct list_head node; /* anchored at ss->cfts */ struct kernfs_ops *kf_ops; int (*open)(struct kernfs_open_file *of); void (*release)(struct kernfs_open_file *of); /* * read_u64() is a shortcut for the common case of returning a * single integer. Use it in place of read() */ u64 (*read_u64)(struct cgroup_subsys_state *css, struct cftype *cft); /* * read_s64() is a signed version of read_u64() */ s64 (*read_s64)(struct cgroup_subsys_state *css, struct cftype *cft); /* generic seq_file read interface */ int (*seq_show)(struct seq_file *sf, void *v); /* optional ops, implement all or none */ void *(*seq_start)(struct seq_file *sf, loff_t *ppos); void *(*seq_next)(struct seq_file *sf, void *v, loff_t *ppos); void (*seq_stop)(struct seq_file *sf, void *v); /* * write_u64() is a shortcut for the common case of accepting * a single integer (as parsed by simple_strtoull) from * userspace. Use in place of write(); return 0 or error. */ int (*write_u64)(struct cgroup_subsys_state *css, struct cftype *cft, u64 val); /* * write_s64() is a signed version of write_u64() */ int (*write_s64)(struct cgroup_subsys_state *css, struct cftype *cft, s64 val); /* * write() is the generic write callback which maps directly to * kernfs write operation and overrides all other operations. * Maximum write size is determined by ->max_write_len. Use * of_css/cft() to access the associated css and cft. */ ssize_t (*write)(struct kernfs_open_file *of, char *buf, size_t nbytes, loff_t off); __poll_t (*poll)(struct kernfs_open_file *of, struct poll_table_struct *pt); #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lock_class_key lockdep_key; #endif }; /* * Control Group subsystem type. * See Documentation/admin-guide/cgroup-v1/cgroups.rst for details */ struct cgroup_subsys { struct cgroup_subsys_state *(*css_alloc)(struct cgroup_subsys_state *parent_css); int (*css_online)(struct cgroup_subsys_state *css); void (*css_offline)(struct cgroup_subsys_state *css); void (*css_released)(struct cgroup_subsys_state *css); void (*css_free)(struct cgroup_subsys_state *css); void (*css_reset)(struct cgroup_subsys_state *css); void (*css_rstat_flush)(struct cgroup_subsys_state *css, int cpu); int (*css_extra_stat_show)(struct seq_file *seq, struct cgroup_subsys_state *css); int (*can_attach)(struct cgroup_taskset *tset); void (*cancel_attach)(struct cgroup_taskset *tset); void (*attach)(struct cgroup_taskset *tset); void (*post_attach)(void); int (*can_fork)(struct task_struct *task, struct css_set *cset); void (*cancel_fork)(struct task_struct *task, struct css_set *cset); void (*fork)(struct task_struct *task); void (*exit)(struct task_struct *task); void (*release)(struct task_struct *task); void (*bind)(struct cgroup_subsys_state *root_css); bool early_init:1; /* * If %true, the controller, on the default hierarchy, doesn't show * up in "cgroup.controllers" or "cgroup.subtree_control", is * implicitly enabled on all cgroups on the default hierarchy, and * bypasses the "no internal process" constraint. This is for * utility type controllers which is transparent to userland. * * An implicit controller can be stolen from the default hierarchy * anytime and thus must be okay with offline csses from previous * hierarchies coexisting with csses for the current one. */ bool implicit_on_dfl:1; /* * If %true, the controller, supports threaded mode on the default * hierarchy. In a threaded subtree, both process granularity and * no-internal-process constraint are ignored and a threaded * controllers should be able to handle that. * * Note that as an implicit controller is automatically enabled on * all cgroups on the default hierarchy, it should also be * threaded. implicit && !threaded is not supported. */ bool threaded:1; /* the following two fields are initialized automatically during boot */ int id; const char *name; /* optional, initialized automatically during boot if not set */ const char *legacy_name; /* link to parent, protected by cgroup_lock() */ struct cgroup_root *root; /* idr for css->id */ struct idr css_idr; /* * List of cftypes. Each entry is the first entry of an array * terminated by zero length name. */ struct list_head cfts; /* * Base cftypes which are automatically registered. The two can * point to the same array. */ struct cftype *dfl_cftypes; /* for the default hierarchy */ struct cftype *legacy_cftypes; /* for the legacy hierarchies */ /* * A subsystem may depend on other subsystems. When such subsystem * is enabled on a cgroup, the depended-upon subsystems are enabled * together if available. Subsystems enabled due to dependency are * not visible to userland until explicitly enabled. The following * specifies the mask of subsystems that this one depends on. */ unsigned int depends_on; }; extern struct percpu_rw_semaphore cgroup_threadgroup_rwsem; /** * cgroup_threadgroup_change_begin - threadgroup exclusion for cgroups * @tsk: target task * * Allows cgroup operations to synchronize against threadgroup changes * using a percpu_rw_semaphore. */ static inline void cgroup_threadgroup_change_begin(struct task_struct *tsk) { percpu_down_read(&cgroup_threadgroup_rwsem); } /** * cgroup_threadgroup_change_end - threadgroup exclusion for cgroups * @tsk: target task * * Counterpart of cgroup_threadcgroup_change_begin(). */ static inline void cgroup_threadgroup_change_end(struct task_struct *tsk) { percpu_up_read(&cgroup_threadgroup_rwsem); } #else /* CONFIG_CGROUPS */ #define CGROUP_SUBSYS_COUNT 0 static inline void cgroup_threadgroup_change_begin(struct task_struct *tsk) { might_sleep(); } static inline void cgroup_threadgroup_change_end(struct task_struct *tsk) {} #endif /* CONFIG_CGROUPS */ #ifdef CONFIG_SOCK_CGROUP_DATA /* * sock_cgroup_data is embedded at sock->sk_cgrp_data and contains * per-socket cgroup information except for memcg association. * * On legacy hierarchies, net_prio and net_cls controllers directly * set attributes on each sock which can then be tested by the network * layer. On the default hierarchy, each sock is associated with the * cgroup it was created in and the networking layer can match the * cgroup directly. */ struct sock_cgroup_data { struct cgroup *cgroup; /* v2 */ #ifdef CONFIG_CGROUP_NET_CLASSID u32 classid; /* v1 */ #endif #ifdef CONFIG_CGROUP_NET_PRIO u16 prioidx; /* v1 */ #endif }; static inline u16 sock_cgroup_prioidx(const struct sock_cgroup_data *skcd) { #ifdef CONFIG_CGROUP_NET_PRIO return READ_ONCE(skcd->prioidx); #else return 1; #endif } static inline u32 sock_cgroup_classid(const struct sock_cgroup_data *skcd) { #ifdef CONFIG_CGROUP_NET_CLASSID return READ_ONCE(skcd->classid); #else return 0; #endif } static inline void sock_cgroup_set_prioidx(struct sock_cgroup_data *skcd, u16 prioidx) { #ifdef CONFIG_CGROUP_NET_PRIO WRITE_ONCE(skcd->prioidx, prioidx); #endif } static inline void sock_cgroup_set_classid(struct sock_cgroup_data *skcd, u32 classid) { #ifdef CONFIG_CGROUP_NET_CLASSID WRITE_ONCE(skcd->classid, classid); #endif } #else /* CONFIG_SOCK_CGROUP_DATA */ struct sock_cgroup_data { }; #endif /* CONFIG_SOCK_CGROUP_DATA */ #endif /* _LINUX_CGROUP_DEFS_H */ PK ! t��c� � log2.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Integer base 2 logarithm calculation * * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_LOG2_H #define _LINUX_LOG2_H #include <linux/types.h> #include <linux/bitops.h> /* * non-constant log of base 2 calculators * - the arch may override these in asm/bitops.h if they can be implemented * more efficiently than using fls() and fls64() * - the arch is not required to handle n==0 if implementing the fallback */ #ifndef CONFIG_ARCH_HAS_ILOG2_U32 static inline __attribute__((const)) int __ilog2_u32(u32 n) { return fls(n) - 1; } #endif #ifndef CONFIG_ARCH_HAS_ILOG2_U64 static inline __attribute__((const)) int __ilog2_u64(u64 n) { return fls64(n) - 1; } #endif /** * is_power_of_2() - check if a value is a power of two * @n: the value to check * * Determine whether some value is a power of two, where zero is * *not* considered a power of two. * Return: true if @n is a power of 2, otherwise false. */ static inline __attribute__((const)) bool is_power_of_2(unsigned long n) { return (n != 0 && ((n & (n - 1)) == 0)); } /** * __roundup_pow_of_two() - round up to nearest power of two * @n: value to round up */ static inline __attribute__((const)) unsigned long __roundup_pow_of_two(unsigned long n) { return 1UL << fls_long(n - 1); } /** * __rounddown_pow_of_two() - round down to nearest power of two * @n: value to round down */ static inline __attribute__((const)) unsigned long __rounddown_pow_of_two(unsigned long n) { return 1UL << (fls_long(n) - 1); } /** * const_ilog2 - log base 2 of 32-bit or a 64-bit constant unsigned value * @n: parameter * * Use this where sparse expects a true constant expression, e.g. for array * indices. */ #define const_ilog2(n) \ ( \ __builtin_constant_p(n) ? ( \ (n) < 2 ? 0 : \ (n) & (1ULL << 63) ? 63 : \ (n) & (1ULL << 62) ? 62 : \ (n) & (1ULL << 61) ? 61 : \ (n) & (1ULL << 60) ? 60 : \ (n) & (1ULL << 59) ? 59 : \ (n) & (1ULL << 58) ? 58 : \ (n) & (1ULL << 57) ? 57 : \ (n) & (1ULL << 56) ? 56 : \ (n) & (1ULL << 55) ? 55 : \ (n) & (1ULL << 54) ? 54 : \ (n) & (1ULL << 53) ? 53 : \ (n) & (1ULL << 52) ? 52 : \ (n) & (1ULL << 51) ? 51 : \ (n) & (1ULL << 50) ? 50 : \ (n) & (1ULL << 49) ? 49 : \ (n) & (1ULL << 48) ? 48 : \ (n) & (1ULL << 47) ? 47 : \ (n) & (1ULL << 46) ? 46 : \ (n) & (1ULL << 45) ? 45 : \ (n) & (1ULL << 44) ? 44 : \ (n) & (1ULL << 43) ? 43 : \ (n) & (1ULL << 42) ? 42 : \ (n) & (1ULL << 41) ? 41 : \ (n) & (1ULL << 40) ? 40 : \ (n) & (1ULL << 39) ? 39 : \ (n) & (1ULL << 38) ? 38 : \ (n) & (1ULL << 37) ? 37 : \ (n) & (1ULL << 36) ? 36 : \ (n) & (1ULL << 35) ? 35 : \ (n) & (1ULL << 34) ? 34 : \ (n) & (1ULL << 33) ? 33 : \ (n) & (1ULL << 32) ? 32 : \ (n) & (1ULL << 31) ? 31 : \ (n) & (1ULL << 30) ? 30 : \ (n) & (1ULL << 29) ? 29 : \ (n) & (1ULL << 28) ? 28 : \ (n) & (1ULL << 27) ? 27 : \ (n) & (1ULL << 26) ? 26 : \ (n) & (1ULL << 25) ? 25 : \ (n) & (1ULL << 24) ? 24 : \ (n) & (1ULL << 23) ? 23 : \ (n) & (1ULL << 22) ? 22 : \ (n) & (1ULL << 21) ? 21 : \ (n) & (1ULL << 20) ? 20 : \ (n) & (1ULL << 19) ? 19 : \ (n) & (1ULL << 18) ? 18 : \ (n) & (1ULL << 17) ? 17 : \ (n) & (1ULL << 16) ? 16 : \ (n) & (1ULL << 15) ? 15 : \ (n) & (1ULL << 14) ? 14 : \ (n) & (1ULL << 13) ? 13 : \ (n) & (1ULL << 12) ? 12 : \ (n) & (1ULL << 11) ? 11 : \ (n) & (1ULL << 10) ? 10 : \ (n) & (1ULL << 9) ? 9 : \ (n) & (1ULL << 8) ? 8 : \ (n) & (1ULL << 7) ? 7 : \ (n) & (1ULL << 6) ? 6 : \ (n) & (1ULL << 5) ? 5 : \ (n) & (1ULL << 4) ? 4 : \ (n) & (1ULL << 3) ? 3 : \ (n) & (1ULL << 2) ? 2 : \ 1) : \ -1) /** * ilog2 - log base 2 of 32-bit or a 64-bit unsigned value * @n: parameter * * constant-capable log of base 2 calculation * - this can be used to initialise global variables from constant data, hence * the massive ternary operator construction * * selects the appropriately-sized optimised version depending on sizeof(n) */ #define ilog2(n) \ ( \ __builtin_constant_p(n) ? \ ((n) < 2 ? 0 : \ 63 - __builtin_clzll(n)) : \ (sizeof(n) <= 4) ? \ __ilog2_u32(n) : \ __ilog2_u64(n) \ ) /** * roundup_pow_of_two - round the given value up to nearest power of two * @n: parameter * * round the given value up to the nearest power of two * - the result is undefined when n == 0 * - this can be used to initialise global variables from constant data */ #define roundup_pow_of_two(n) \ ( \ __builtin_constant_p(n) ? ( \ ((n) == 1) ? 1 : \ (1UL << (ilog2((n) - 1) + 1)) \ ) : \ __roundup_pow_of_two(n) \ ) /** * rounddown_pow_of_two - round the given value down to nearest power of two * @n: parameter * * round the given value down to the nearest power of two * - the result is undefined when n == 0 * - this can be used to initialise global variables from constant data */ #define rounddown_pow_of_two(n) \ ( \ __builtin_constant_p(n) ? ( \ (1UL << ilog2(n))) : \ __rounddown_pow_of_two(n) \ ) static inline __attribute_const__ int __order_base_2(unsigned long n) { return n > 1 ? ilog2(n - 1) + 1 : 0; } /** * order_base_2 - calculate the (rounded up) base 2 order of the argument * @n: parameter * * The first few values calculated by this routine: * ob2(0) = 0 * ob2(1) = 0 * ob2(2) = 1 * ob2(3) = 2 * ob2(4) = 2 * ob2(5) = 3 * ... and so on. */ #define order_base_2(n) \ ( \ __builtin_constant_p(n) ? ( \ ((n) == 0 || (n) == 1) ? 0 : \ ilog2((n) - 1) + 1) : \ __order_base_2(n) \ ) static inline __attribute__((const)) int __bits_per(unsigned long n) { if (n < 2) return 1; if (is_power_of_2(n)) return order_base_2(n) + 1; return order_base_2(n); } /** * bits_per - calculate the number of bits required for the argument * @n: parameter * * This is constant-capable and can be used for compile time * initializations, e.g bitfields. * * The first few values calculated by this routine: * bf(0) = 1 * bf(1) = 1 * bf(2) = 2 * bf(3) = 2 * bf(4) = 3 * ... and so on. */ #define bits_per(n) \ ( \ __builtin_constant_p(n) ? ( \ ((n) == 0 || (n) == 1) \ ? 1 : ilog2(n) + 1 \ ) : \ __bits_per(n) \ ) #endif /* _LINUX_LOG2_H */ PK ! T��b& b& linkage.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LINKAGE_H #define _LINUX_LINKAGE_H #include <linux/compiler_types.h> #include <linux/stringify.h> #include <linux/export.h> #include <asm/linkage.h> /* Some toolchains use other characters (e.g. '`') to mark new line in macro */ #ifndef ASM_NL #define ASM_NL ; #endif #ifdef __cplusplus #define CPP_ASMLINKAGE extern "C" #else #define CPP_ASMLINKAGE #endif #ifndef asmlinkage #define asmlinkage CPP_ASMLINKAGE #endif #ifndef cond_syscall #define cond_syscall(x) asm( \ ".weak " __stringify(x) "\n\t" \ ".set " __stringify(x) "," \ __stringify(sys_ni_syscall)) #endif #ifndef SYSCALL_ALIAS #define SYSCALL_ALIAS(alias, name) asm( \ ".globl " __stringify(alias) "\n\t" \ ".set " __stringify(alias) "," \ __stringify(name)) #endif #define __page_aligned_data __section(".data..page_aligned") __aligned(PAGE_SIZE) #define __page_aligned_bss __section(".bss..page_aligned") __aligned(PAGE_SIZE) /* * For assembly routines. * * Note when using these that you must specify the appropriate * alignment directives yourself */ #define __PAGE_ALIGNED_DATA .section ".data..page_aligned", "aw" #define __PAGE_ALIGNED_BSS .section ".bss..page_aligned", "aw" /* * This is used by architectures to keep arguments on the stack * untouched by the compiler by keeping them live until the end. * The argument stack may be owned by the assembly-language * caller, not the callee, and gcc doesn't always understand * that. * * We have the return value, and a maximum of six arguments. * * This should always be followed by a "return ret" for the * protection to work (ie no more work that the compiler might * end up needing stack temporaries for). */ /* Assembly files may be compiled with -traditional .. */ #ifndef __ASSEMBLY__ #ifndef asmlinkage_protect # define asmlinkage_protect(n, ret, args...) do { } while (0) #endif #endif #ifndef __ALIGN #define __ALIGN .balign CONFIG_FUNCTION_ALIGNMENT #define __ALIGN_STR __stringify(__ALIGN) #endif #ifdef __ASSEMBLY__ /* SYM_T_FUNC -- type used by assembler to mark functions */ #ifndef SYM_T_FUNC #define SYM_T_FUNC STT_FUNC #endif /* SYM_T_OBJECT -- type used by assembler to mark data */ #ifndef SYM_T_OBJECT #define SYM_T_OBJECT STT_OBJECT #endif /* SYM_T_NONE -- type used by assembler to mark entries of unknown type */ #ifndef SYM_T_NONE #define SYM_T_NONE STT_NOTYPE #endif /* SYM_A_* -- align the symbol? */ #define SYM_A_ALIGN ALIGN #define SYM_A_NONE /* nothing */ /* SYM_L_* -- linkage of symbols */ #define SYM_L_GLOBAL(name) .globl name #define SYM_L_WEAK(name) .weak name #define SYM_L_LOCAL(name) /* nothing */ #ifndef LINKER_SCRIPT #define ALIGN __ALIGN #define ALIGN_STR __ALIGN_STR /* === DEPRECATED annotations === */ #ifndef CONFIG_ARCH_USE_SYM_ANNOTATIONS #ifndef GLOBAL /* deprecated, use SYM_DATA*, SYM_ENTRY, or similar */ #define GLOBAL(name) \ .globl name ASM_NL \ name: #endif #ifndef ENTRY /* deprecated, use SYM_FUNC_START */ #define ENTRY(name) \ SYM_FUNC_START(name) #endif #endif /* CONFIG_ARCH_USE_SYM_ANNOTATIONS */ #endif /* LINKER_SCRIPT */ #ifndef CONFIG_ARCH_USE_SYM_ANNOTATIONS #ifndef WEAK /* deprecated, use SYM_FUNC_START_WEAK* */ #define WEAK(name) \ SYM_FUNC_START_WEAK(name) #endif #ifndef END /* deprecated, use SYM_FUNC_END, SYM_DATA_END, or SYM_END */ #define END(name) \ .size name, .-name #endif /* If symbol 'name' is treated as a subroutine (gets called, and returns) * then please use ENDPROC to mark 'name' as STT_FUNC for the benefit of * static analysis tools such as stack depth analyzer. */ #ifndef ENDPROC /* deprecated, use SYM_FUNC_END */ #define ENDPROC(name) \ SYM_FUNC_END(name) #endif #endif /* CONFIG_ARCH_USE_SYM_ANNOTATIONS */ /* === generic annotations === */ /* SYM_ENTRY -- use only if you have to for non-paired symbols */ #ifndef SYM_ENTRY #define SYM_ENTRY(name, linkage, align...) \ linkage(name) ASM_NL \ align ASM_NL \ name: #endif /* SYM_START -- use only if you have to */ #ifndef SYM_START #define SYM_START(name, linkage, align...) \ SYM_ENTRY(name, linkage, align) #endif /* SYM_END -- use only if you have to */ #ifndef SYM_END #define SYM_END(name, sym_type) \ .type name sym_type ASM_NL \ .size name, .-name #endif /* === code annotations === */ /* * FUNC -- C-like functions (proper stack frame etc.) * CODE -- non-C code (e.g. irq handlers with different, special stack etc.) * * Objtool validates stack for FUNC, but not for CODE. * Objtool generates debug info for both FUNC & CODE, but needs special * annotations for each CODE's start (to describe the actual stack frame). * * Objtool requires that all code must be contained in an ELF symbol. Symbol * names that have a .L prefix do not emit symbol table entries. .L * prefixed symbols can be used within a code region, but should be avoided for * denoting a range of code via ``SYM_*_START/END`` annotations. * * ALIAS -- does not generate debug info -- the aliased function will */ /* SYM_INNER_LABEL_ALIGN -- only for labels in the middle of code */ #ifndef SYM_INNER_LABEL_ALIGN #define SYM_INNER_LABEL_ALIGN(name, linkage) \ .type name SYM_T_NONE ASM_NL \ SYM_ENTRY(name, linkage, SYM_A_ALIGN) #endif /* SYM_INNER_LABEL -- only for labels in the middle of code */ #ifndef SYM_INNER_LABEL #define SYM_INNER_LABEL(name, linkage) \ .type name SYM_T_NONE ASM_NL \ SYM_ENTRY(name, linkage, SYM_A_NONE) #endif /* * SYM_FUNC_START_LOCAL_ALIAS -- use where there are two local names for one * function */ #ifndef SYM_FUNC_START_LOCAL_ALIAS #define SYM_FUNC_START_LOCAL_ALIAS(name) \ SYM_START(name, SYM_L_LOCAL, SYM_A_ALIGN) #endif /* * SYM_FUNC_START_ALIAS -- use where there are two global names for one * function */ #ifndef SYM_FUNC_START_ALIAS #define SYM_FUNC_START_ALIAS(name) \ SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN) #endif /* SYM_FUNC_START -- use for global functions */ #ifndef SYM_FUNC_START /* * The same as SYM_FUNC_START_ALIAS, but we will need to distinguish these two * later. */ #define SYM_FUNC_START(name) \ SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN) #endif /* SYM_FUNC_START_NOALIGN -- use for global functions, w/o alignment */ #ifndef SYM_FUNC_START_NOALIGN #define SYM_FUNC_START_NOALIGN(name) \ SYM_START(name, SYM_L_GLOBAL, SYM_A_NONE) #endif /* SYM_FUNC_START_LOCAL -- use for local functions */ #ifndef SYM_FUNC_START_LOCAL /* the same as SYM_FUNC_START_LOCAL_ALIAS, see comment near SYM_FUNC_START */ #define SYM_FUNC_START_LOCAL(name) \ SYM_START(name, SYM_L_LOCAL, SYM_A_ALIGN) #endif /* SYM_FUNC_START_LOCAL_NOALIGN -- use for local functions, w/o alignment */ #ifndef SYM_FUNC_START_LOCAL_NOALIGN #define SYM_FUNC_START_LOCAL_NOALIGN(name) \ SYM_START(name, SYM_L_LOCAL, SYM_A_NONE) #endif /* SYM_FUNC_START_WEAK -- use for weak functions */ #ifndef SYM_FUNC_START_WEAK #define SYM_FUNC_START_WEAK(name) \ SYM_START(name, SYM_L_WEAK, SYM_A_ALIGN) #endif /* SYM_FUNC_START_WEAK_NOALIGN -- use for weak functions, w/o alignment */ #ifndef SYM_FUNC_START_WEAK_NOALIGN #define SYM_FUNC_START_WEAK_NOALIGN(name) \ SYM_START(name, SYM_L_WEAK, SYM_A_NONE) #endif /* SYM_FUNC_END_ALIAS -- the end of LOCAL_ALIASed or ALIASed function */ #ifndef SYM_FUNC_END_ALIAS #define SYM_FUNC_END_ALIAS(name) \ SYM_END(name, SYM_T_FUNC) #endif /* * SYM_FUNC_END -- the end of SYM_FUNC_START_LOCAL, SYM_FUNC_START, * SYM_FUNC_START_WEAK, ... */ #ifndef SYM_FUNC_END /* the same as SYM_FUNC_END_ALIAS, see comment near SYM_FUNC_START */ #define SYM_FUNC_END(name) \ SYM_END(name, SYM_T_FUNC) #endif /* SYM_CODE_START -- use for non-C (special) functions */ #ifndef SYM_CODE_START #define SYM_CODE_START(name) \ SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN) #endif /* SYM_CODE_START_NOALIGN -- use for non-C (special) functions, w/o alignment */ #ifndef SYM_CODE_START_NOALIGN #define SYM_CODE_START_NOALIGN(name) \ SYM_START(name, SYM_L_GLOBAL, SYM_A_NONE) #endif /* SYM_CODE_START_LOCAL -- use for local non-C (special) functions */ #ifndef SYM_CODE_START_LOCAL #define SYM_CODE_START_LOCAL(name) \ SYM_START(name, SYM_L_LOCAL, SYM_A_ALIGN) #endif /* * SYM_CODE_START_LOCAL_NOALIGN -- use for local non-C (special) functions, * w/o alignment */ #ifndef SYM_CODE_START_LOCAL_NOALIGN #define SYM_CODE_START_LOCAL_NOALIGN(name) \ SYM_START(name, SYM_L_LOCAL, SYM_A_NONE) #endif /* SYM_CODE_END -- the end of SYM_CODE_START_LOCAL, SYM_CODE_START, ... */ #ifndef SYM_CODE_END #define SYM_CODE_END(name) \ SYM_END(name, SYM_T_NONE) #endif /* === data annotations === */ /* SYM_DATA_START -- global data symbol */ #ifndef SYM_DATA_START #define SYM_DATA_START(name) \ SYM_START(name, SYM_L_GLOBAL, SYM_A_NONE) #endif /* SYM_DATA_START -- local data symbol */ #ifndef SYM_DATA_START_LOCAL #define SYM_DATA_START_LOCAL(name) \ SYM_START(name, SYM_L_LOCAL, SYM_A_NONE) #endif /* SYM_DATA_END -- the end of SYM_DATA_START symbol */ #ifndef SYM_DATA_END #define SYM_DATA_END(name) \ SYM_END(name, SYM_T_OBJECT) #endif /* SYM_DATA_END_LABEL -- the labeled end of SYM_DATA_START symbol */ #ifndef SYM_DATA_END_LABEL #define SYM_DATA_END_LABEL(name, linkage, label) \ linkage(label) ASM_NL \ .type label SYM_T_OBJECT ASM_NL \ label: \ SYM_END(name, SYM_T_OBJECT) #endif /* SYM_DATA -- start+end wrapper around simple global data */ #ifndef SYM_DATA #define SYM_DATA(name, data...) \ SYM_DATA_START(name) ASM_NL \ data ASM_NL \ SYM_DATA_END(name) #endif /* SYM_DATA_LOCAL -- start+end wrapper around simple local data */ #ifndef SYM_DATA_LOCAL #define SYM_DATA_LOCAL(name, data...) \ SYM_DATA_START_LOCAL(name) ASM_NL \ data ASM_NL \ SYM_DATA_END(name) #endif #endif /* __ASSEMBLY__ */ #endif /* _LINUX_LINKAGE_H */ PK ! �v�� � netpoll.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Common code for low-level network console, dump, and debugger code * * Derived from netconsole, kgdb-over-ethernet, and netdump patches */ #ifndef _LINUX_NETPOLL_H #define _LINUX_NETPOLL_H #include <linux/netdevice.h> #include <linux/interrupt.h> #include <linux/rcupdate.h> #include <linux/list.h> #include <linux/refcount.h> union inet_addr { __u32 all[4]; __be32 ip; __be32 ip6[4]; struct in_addr in; struct in6_addr in6; }; struct netpoll { struct net_device *dev; char dev_name[IFNAMSIZ]; const char *name; union inet_addr local_ip, remote_ip; bool ipv6; u16 local_port, remote_port; u8 remote_mac[ETH_ALEN]; }; struct netpoll_info { refcount_t refcnt; struct semaphore dev_lock; struct sk_buff_head txq; struct delayed_work tx_work; struct netpoll *netpoll; struct rcu_head rcu; }; #ifdef CONFIG_NETPOLL void netpoll_poll_dev(struct net_device *dev); void netpoll_poll_disable(struct net_device *dev); void netpoll_poll_enable(struct net_device *dev); #else static inline void netpoll_poll_disable(struct net_device *dev) { return; } static inline void netpoll_poll_enable(struct net_device *dev) { return; } #endif void netpoll_send_udp(struct netpoll *np, const char *msg, int len); void netpoll_print_options(struct netpoll *np); int netpoll_parse_options(struct netpoll *np, char *opt); int __netpoll_setup(struct netpoll *np, struct net_device *ndev); int netpoll_setup(struct netpoll *np); void __netpoll_cleanup(struct netpoll *np); void __netpoll_free(struct netpoll *np); void netpoll_cleanup(struct netpoll *np); netdev_tx_t netpoll_send_skb(struct netpoll *np, struct sk_buff *skb); #ifdef CONFIG_NETPOLL static inline void *netpoll_poll_lock(struct napi_struct *napi) { struct net_device *dev = napi->dev; if (dev && rcu_access_pointer(dev->npinfo)) { int owner = smp_processor_id(); while (cmpxchg(&napi->poll_owner, -1, owner) != -1) cpu_relax(); return napi; } return NULL; } static inline void netpoll_poll_unlock(void *have) { struct napi_struct *napi = have; if (napi) smp_store_release(&napi->poll_owner, -1); } static inline bool netpoll_tx_running(struct net_device *dev) { return irqs_disabled(); } #else static inline void *netpoll_poll_lock(struct napi_struct *napi) { return NULL; } static inline void netpoll_poll_unlock(void *have) { } static inline bool netpoll_tx_running(struct net_device *dev) { return false; } #endif #endif PK ! , �E? ? irq_poll.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef IRQ_POLL_H #define IRQ_POLL_H struct irq_poll; typedef int (irq_poll_fn)(struct irq_poll *, int); struct irq_poll { struct list_head list; unsigned long state; int weight; irq_poll_fn *poll; }; enum { IRQ_POLL_F_SCHED = 0, IRQ_POLL_F_DISABLE = 1, }; extern void irq_poll_sched(struct irq_poll *); extern void irq_poll_init(struct irq_poll *, int, irq_poll_fn *); extern void irq_poll_complete(struct irq_poll *); extern void irq_poll_enable(struct irq_poll *); extern void irq_poll_disable(struct irq_poll *); #endif PK ! qL� W W mmu_context.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MMU_CONTEXT_H #define _LINUX_MMU_CONTEXT_H #include <asm/mmu_context.h> #include <asm/mmu.h> /* Architectures that care about IRQ state in switch_mm can override this. */ #ifndef switch_mm_irqs_off # define switch_mm_irqs_off switch_mm #endif #ifndef leave_mm static inline void leave_mm(int cpu) { } #endif /* * CPUs that are capable of running user task @p. Must contain at least one * active CPU. It is assumed that the kernel can run on all CPUs, so calling * this for a kernel thread is pointless. * * By default, we assume a sane, homogeneous system. */ #ifndef task_cpu_possible_mask # define task_cpu_possible_mask(p) cpu_possible_mask # define task_cpu_possible(cpu, p) true #else # define task_cpu_possible(cpu, p) cpumask_test_cpu((cpu), task_cpu_possible_mask(p)) #endif #endif PK ! �Z��� � cgroup_subsys.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * List of cgroup subsystems. * * DO NOT ADD ANY SUBSYSTEM WITHOUT EXPLICIT ACKS FROM CGROUP MAINTAINERS. */ /* * This file *must* be included with SUBSYS() defined. */ #if IS_ENABLED(CONFIG_CPUSETS) SUBSYS(cpuset) #endif #if IS_ENABLED(CONFIG_CGROUP_SCHED) SUBSYS(cpu) #endif #if IS_ENABLED(CONFIG_CGROUP_CPUACCT) SUBSYS(cpuacct) #endif #if IS_ENABLED(CONFIG_BLK_CGROUP) SUBSYS(io) #endif #if IS_ENABLED(CONFIG_MEMCG) SUBSYS(memory) #endif #if IS_ENABLED(CONFIG_CGROUP_DEVICE) SUBSYS(devices) #endif #if IS_ENABLED(CONFIG_CGROUP_FREEZER) SUBSYS(freezer) #endif #if IS_ENABLED(CONFIG_CGROUP_NET_CLASSID) SUBSYS(net_cls) #endif #if IS_ENABLED(CONFIG_CGROUP_PERF) SUBSYS(perf_event) #endif #if IS_ENABLED(CONFIG_CGROUP_NET_PRIO) SUBSYS(net_prio) #endif #if IS_ENABLED(CONFIG_CGROUP_HUGETLB) SUBSYS(hugetlb) #endif #if IS_ENABLED(CONFIG_CGROUP_PIDS) SUBSYS(pids) #endif #if IS_ENABLED(CONFIG_CGROUP_RDMA) SUBSYS(rdma) #endif #if IS_ENABLED(CONFIG_CGROUP_MISC) SUBSYS(misc) #endif /* * The following subsystems are not supported on the default hierarchy. */ #if IS_ENABLED(CONFIG_CGROUP_DEBUG) SUBSYS(debug) #endif /* * DO NOT ADD ANY SUBSYSTEM WITHOUT EXPLICIT ACKS FROM CGROUP MAINTAINERS. */ PK ! �V�)0 0 clk/sunxi-ng.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved. */ #ifndef _LINUX_CLK_SUNXI_NG_H_ #define _LINUX_CLK_SUNXI_NG_H_ #include <linux/errno.h> #ifdef CONFIG_SUNXI_CCU int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode); int sunxi_ccu_get_mmc_timing_mode(struct clk *clk); #else static inline int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode) { return -ENOTSUPP; } static inline int sunxi_ccu_get_mmc_timing_mode(struct clk *clk) { return -ENOTSUPP; } #endif #endif PK ! ��wͺ � clk/davinci.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Clock drivers for TI DaVinci PLL and PSC controllers * * Copyright (C) 2018 David Lechner <david@lechnology.com> */ #ifndef __LINUX_CLK_DAVINCI_PLL_H___ #define __LINUX_CLK_DAVINCI_PLL_H___ #include <linux/device.h> #include <linux/regmap.h> /* function for registering clocks in early boot */ #ifdef CONFIG_ARCH_DAVINCI_DA830 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); #endif #ifdef CONFIG_ARCH_DAVINCI_DA850 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); #endif #ifdef CONFIG_ARCH_DAVINCI_DM355 int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); int dm355_psc_init(struct device *dev, void __iomem *base); #endif #ifdef CONFIG_ARCH_DAVINCI_DM365 int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); int dm365_psc_init(struct device *dev, void __iomem *base); #endif #ifdef CONFIG_ARCH_DAVINCI_DM644x int dm644x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); int dm644x_psc_init(struct device *dev, void __iomem *base); #endif #ifdef CONFIG_ARCH_DAVINCI_DM646x int dm646x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); int dm646x_psc_init(struct device *dev, void __iomem *base); #endif #endif /* __LINUX_CLK_DAVINCI_PLL_H___ */ PK ! �.=K7 K7 clk/at91_pmc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/clk/at91_pmc.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People * * Power Management Controller (PMC) - System peripherals registers. * Based on AT91RM9200 datasheet revision E. */ #ifndef AT91_PMC_H #define AT91_PMC_H #define AT91_PMC_V1 (1) /* PMC version 1 */ #define AT91_PMC_V2 (2) /* PMC version 2 [SAM9X60] */ #define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ #define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */ #define AT91_PMC_SCSR 0x08 /* System Clock Status Register */ #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ #define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ #define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ #define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */ #define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ #define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ #define AT91_PMC_PLL_CTRL0 0x0C /* PLL Control Register 0 [for SAM9X60] */ #define AT91_PMC_PLL_CTRL0_ENPLL (1 << 28) /* Enable PLL */ #define AT91_PMC_PLL_CTRL0_ENPLLCK (1 << 29) /* Enable PLL clock for PMC */ #define AT91_PMC_PLL_CTRL0_ENLOCK (1 << 31) /* Enable PLL lock */ #define AT91_PMC_PLL_CTRL1 0x10 /* PLL Control Register 1 [for SAM9X60] */ #define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */ #define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */ #define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */ #define AT91_PMC_PLL_ACR 0x18 /* PLL Analog Control Register [for SAM9X60] */ #define AT91_PMC_PLL_ACR_DEFAULT_UPLL 0x12020010UL /* Default PLL ACR value for UPLL */ #define AT91_PMC_PLL_ACR_DEFAULT_PLLA 0x00020010UL /* Default PLL ACR value for PLLA */ #define AT91_PMC_PLL_ACR_UTMIVR (1 << 12) /* UPLL Voltage regulator Control */ #define AT91_PMC_PLL_ACR_UTMIBG (1 << 13) /* UPLL Bandgap Control */ #define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */ #define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ #define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */ #define AT91_PMC_PLL_UPDT 0x1C /* PMC PLL update register [for SAM9X60] */ #define AT91_PMC_PLL_UPDT_UPDATE (1 << 8) /* Update PLL settings */ #define AT91_PMC_PLL_UPDT_ID (1 << 0) /* PLL ID */ #define AT91_PMC_PLL_UPDT_ID_MSK (0xf) /* PLL ID mask */ #define AT91_PMC_PLL_UPDT_STUPTIM (0xff << 16) /* Startup time */ #define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */ #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */ #define AT91_PMC_WAITMODE (1 << 2) /* Wait Mode Command */ #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */ #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ #define AT91_PMC_KEY_MASK (0xff << 16) #define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */ #define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */ #define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */ #define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */ #define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ #define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ #define AT91_CKGR_PLLAR 0x28 /* PLL A Register */ #define AT91_CKGR_PLLBR 0x2c /* PLL B Register */ #define AT91_PMC_DIV (0xff << 0) /* Divider */ #define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ #define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ #define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ #define AT91_PMC_MUL_GET(n) ((n) >> 16 & 0x7ff) #define AT91_PMC3_MUL (0x7f << 18) /* PLL Multiplier [SAMA5 only] */ #define AT91_PMC3_MUL_GET(n) ((n) >> 18 & 0x7f) #define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ #define AT91_PMC_USBDIV_1 (0 << 28) #define AT91_PMC_USBDIV_2 (1 << 28) #define AT91_PMC_USBDIV_4 (2 << 28) #define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ #define AT91_PMC_CPU_CKR 0x28 /* CPU Clock Register */ #define AT91_PMC_MCKR 0x30 /* Master Clock Register */ #define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ #define AT91_PMC_CSS_SLOW (0 << 0) #define AT91_PMC_CSS_MAIN (1 << 0) #define AT91_PMC_CSS_PLLA (2 << 0) #define AT91_PMC_CSS_PLLB (3 << 0) #define AT91_PMC_CSS_UPLL (3 << 0) /* [some SAM9 only] */ #define PMC_PRES_OFFSET 2 #define AT91_PMC_PRES (7 << PMC_PRES_OFFSET) /* Master Clock Prescaler */ #define AT91_PMC_PRES_1 (0 << PMC_PRES_OFFSET) #define AT91_PMC_PRES_2 (1 << PMC_PRES_OFFSET) #define AT91_PMC_PRES_4 (2 << PMC_PRES_OFFSET) #define AT91_PMC_PRES_8 (3 << PMC_PRES_OFFSET) #define AT91_PMC_PRES_16 (4 << PMC_PRES_OFFSET) #define AT91_PMC_PRES_32 (5 << PMC_PRES_OFFSET) #define AT91_PMC_PRES_64 (6 << PMC_PRES_OFFSET) #define PMC_ALT_PRES_OFFSET 4 #define AT91_PMC_ALT_PRES (7 << PMC_ALT_PRES_OFFSET) /* Master Clock Prescaler [alternate location] */ #define AT91_PMC_ALT_PRES_1 (0 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_ALT_PRES_2 (1 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_ALT_PRES_4 (2 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_ALT_PRES_8 (3 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_ALT_PRES_16 (4 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_ALT_PRES_32 (5 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_ALT_PRES_64 (6 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ #define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ #define AT91RM9200_PMC_MDIV_2 (1 << 8) #define AT91RM9200_PMC_MDIV_3 (2 << 8) #define AT91RM9200_PMC_MDIV_4 (3 << 8) #define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */ #define AT91SAM9_PMC_MDIV_2 (1 << 8) #define AT91SAM9_PMC_MDIV_4 (2 << 8) #define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */ #define AT91SAM9_PMC_MDIV_3 (3 << 8) /* [some SAM9 only] */ #define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */ #define AT91_PMC_PDIV_1 (0 << 12) #define AT91_PMC_PDIV_2 (1 << 12) #define AT91_PMC_PLLADIV2 (1 << 12) /* PLLA divisor by 2 [some SAM9 only] */ #define AT91_PMC_PLLADIV2_OFF (0 << 12) #define AT91_PMC_PLLADIV2_ON (1 << 12) #define AT91_PMC_H32MXDIV BIT(24) #define AT91_PMC_MCR_V2 0x30 /* Master Clock Register [SAMA7G5 only] */ #define AT91_PMC_MCR_V2_ID_MSK (0xF) #define AT91_PMC_MCR_V2_ID(_id) ((_id) & AT91_PMC_MCR_V2_ID_MSK) #define AT91_PMC_MCR_V2_CMD (1 << 7) #define AT91_PMC_MCR_V2_DIV (7 << 8) #define AT91_PMC_MCR_V2_DIV1 (0 << 8) #define AT91_PMC_MCR_V2_DIV2 (1 << 8) #define AT91_PMC_MCR_V2_DIV4 (2 << 8) #define AT91_PMC_MCR_V2_DIV8 (3 << 8) #define AT91_PMC_MCR_V2_DIV16 (4 << 8) #define AT91_PMC_MCR_V2_DIV32 (5 << 8) #define AT91_PMC_MCR_V2_DIV64 (6 << 8) #define AT91_PMC_MCR_V2_DIV3 (7 << 8) #define AT91_PMC_MCR_V2_CSS (0x1F << 16) #define AT91_PMC_MCR_V2_CSS_MD_SLCK (0 << 16) #define AT91_PMC_MCR_V2_CSS_TD_SLCK (1 << 16) #define AT91_PMC_MCR_V2_CSS_MAINCK (2 << 16) #define AT91_PMC_MCR_V2_CSS_MCK0 (3 << 16) #define AT91_PMC_MCR_V2_CSS_SYSPLL (5 << 16) #define AT91_PMC_MCR_V2_CSS_DDRPLL (6 << 16) #define AT91_PMC_MCR_V2_CSS_IMGPLL (7 << 16) #define AT91_PMC_MCR_V2_CSS_BAUDPLL (8 << 16) #define AT91_PMC_MCR_V2_CSS_AUDIOPLL (9 << 16) #define AT91_PMC_MCR_V2_CSS_ETHPLL (10 << 16) #define AT91_PMC_MCR_V2_EN (1 << 28) #define AT91_PMC_XTALF 0x34 /* Main XTAL Frequency Register [SAMA7G5 only] */ #define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */ #define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */ #define AT91_PMC_USBS_PLLA (0 << 0) #define AT91_PMC_USBS_UPLL (1 << 0) #define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */ #define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */ #define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8) #define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8) #define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */ #define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */ #define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */ #define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV) #define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */ #define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */ #define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */ #define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */ #define AT91_PMC_CSSMCK_CSS (0 << 8) #define AT91_PMC_CSSMCK_MCK (1 << 8) #define AT91_PMC_IER 0x60 /* Interrupt Enable Register */ #define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */ #define AT91_PMC_SR 0x68 /* Status Register */ #define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ #define AT91_PMC_OSCSEL (1 << 7) /* Slow Oscillator Selection [some SAM9] */ #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ #define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */ #define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */ #define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */ #define AT91_PMC_GCKRDY (1 << 24) /* Generated Clocks */ #define AT91_PMC_MCKXRDY (1 << 26) /* Master Clock x [x=1..4] Ready Status */ #define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */ #define AT91_PMC_FSMR 0x70 /* Fast Startup Mode Register */ #define AT91_PMC_FSTT(n) BIT(n) #define AT91_PMC_RTTAL BIT(16) #define AT91_PMC_RTCAL BIT(17) /* RTC Alarm Enable */ #define AT91_PMC_USBAL BIT(18) /* USB Resume Enable */ #define AT91_PMC_SDMMC_CD BIT(19) /* SDMMC Card Detect Enable */ #define AT91_PMC_LPM BIT(20) /* Low-power Mode */ #define AT91_PMC_RXLP_MCE BIT(24) /* Backup UART Receive Enable */ #define AT91_PMC_ACC_CE BIT(25) /* ACC Enable */ #define AT91_PMC_FSPR 0x74 /* Fast Startup Polarity Reg */ #define AT91_PMC_FS_INPUT_MASK 0x7ff #define AT91_PMC_PLLICPR 0x80 /* PLL Charge Pump Current Register */ #define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */ #define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */ #define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */ #define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */ #define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */ #define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */ #define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */ #define AT91_PMC_PLL_ISR0 0xEC /* PLL Interrupt Status Register 0 [SAM9X60 only] */ #define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/ #define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */ #define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */ #define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */ #define AT91_PMC_PCR_PID_MASK 0x3f #define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ #define AT91_PMC_PCR_GCKDIV_MASK GENMASK(27, 20) #define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ #define AT91_PMC_PCR_GCKEN (0x1 << 29) /* GCK Enable */ #define AT91_PMC_AUDIO_PLL0 0x14c #define AT91_PMC_AUDIO_PLL_PLLEN (1 << 0) #define AT91_PMC_AUDIO_PLL_PADEN (1 << 1) #define AT91_PMC_AUDIO_PLL_PMCEN (1 << 2) #define AT91_PMC_AUDIO_PLL_RESETN (1 << 3) #define AT91_PMC_AUDIO_PLL_ND_OFFSET 8 #define AT91_PMC_AUDIO_PLL_ND_MASK (0x7f << AT91_PMC_AUDIO_PLL_ND_OFFSET) #define AT91_PMC_AUDIO_PLL_ND(n) ((n) << AT91_PMC_AUDIO_PLL_ND_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPMC_OFFSET 16 #define AT91_PMC_AUDIO_PLL_QDPMC_MASK (0x7f << AT91_PMC_AUDIO_PLL_QDPMC_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPMC(n) ((n) << AT91_PMC_AUDIO_PLL_QDPMC_OFFSET) #define AT91_PMC_AUDIO_PLL1 0x150 #define AT91_PMC_AUDIO_PLL_FRACR_MASK 0x3fffff #define AT91_PMC_AUDIO_PLL_QDPAD_OFFSET 24 #define AT91_PMC_AUDIO_PLL_QDPAD_MASK (0x7f << AT91_PMC_AUDIO_PLL_QDPAD_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPAD(n) ((n) << AT91_PMC_AUDIO_PLL_QDPAD_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPAD_DIV_OFFSET AT91_PMC_AUDIO_PLL_QDPAD_OFFSET #define AT91_PMC_AUDIO_PLL_QDPAD_DIV_MASK (0x3 << AT91_PMC_AUDIO_PLL_QDPAD_DIV_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPAD_DIV(n) ((n) << AT91_PMC_AUDIO_PLL_QDPAD_DIV_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV_OFFSET 26 #define AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV_MAX 0x1f #define AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV_MASK (AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV_MAX << AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV_OFFSET) #define AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV(n) ((n) << AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV_OFFSET) #endif PK ! �GK� � clk/zynq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2013 Xilinx Inc. * Copyright (C) 2012 National Instruments */ #ifndef __LINUX_CLK_ZYNQ_H_ #define __LINUX_CLK_ZYNQ_H_ #include <linux/spinlock.h> void zynq_clock_init(void); struct clk *clk_register_zynq_pll(const char *name, const char *parent, void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, spinlock_t *lock); #endif PK ! K��b b clk/spear.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2020 STMicroelectronics - All Rights Reserved * * Author: Lee Jones <lee.jones@linaro.org> */ #ifndef __LINUX_CLK_SPEAR_H #define __LINUX_CLK_SPEAR_H #ifdef CONFIG_MACH_SPEAR1310 void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base); #else static inline void spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base) {} #endif #ifdef CONFIG_MACH_SPEAR1340 void __init spear1340_clk_init(void __iomem *misc_base); #else static inline void spear1340_clk_init(void __iomem *misc_base) {} #endif #endif PK ! "��2 �2 clk/ti.hnu �[��� /* * TI clock drivers support * * Copyright (C) 2013 Texas Instruments, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __LINUX_CLK_TI_H__ #define __LINUX_CLK_TI_H__ #include <linux/clk-provider.h> #include <linux/clkdev.h> /** * struct clk_omap_reg - OMAP register declaration * @offset: offset from the master IP module base address * @index: index of the master IP module */ struct clk_omap_reg { void __iomem *ptr; u16 offset; u8 index; u8 flags; }; /** * struct dpll_data - DPLL registers and integration data * @mult_div1_reg: register containing the DPLL M and N bitfields * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg * @clk_bypass: struct clk_hw pointer to the clock's bypass clock input * @clk_ref: struct clk_hw pointer to the clock's reference clock input * @control_reg: register containing the DPLL mode bitfield * @enable_mask: mask of the DPLL mode bitfield in @control_reg * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate() * @last_rounded_m4xen: cache of the last M4X result of * omap4_dpll_regm4xen_round_rate() * @last_rounded_lpmode: cache of the last lpmode result of * omap4_dpll_lpmode_recalc() * @max_multiplier: maximum valid non-bypass multiplier value (actual) * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate() * @min_divider: minimum valid non-bypass divider value (actual) * @max_divider: maximum valid non-bypass divider value (actual) * @max_rate: maximum clock rate for the DPLL * @modes: possible values of @enable_mask * @autoidle_reg: register containing the DPLL autoidle mode bitfield * @idlest_reg: register containing the DPLL idle status bitfield * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg * @dcc_mask: mask of the DPLL DCC correction bitfield @mult_div1_reg * @dcc_rate: rate atleast which DCC @dcc_mask must be set * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg * @lpmode_mask: mask of the DPLL low-power mode bitfield in @control_reg * @m4xen_mask: mask of the DPLL M4X multiplier bitfield in @control_reg * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs * @ssc_deltam_reg: register containing the DPLL SSC frequency spreading * @ssc_modfreq_reg: register containing the DPLL SSC modulation frequency * @ssc_modfreq_mant_mask: mask of the mantissa component in @ssc_modfreq_reg * @ssc_modfreq_exp_mask: mask of the exponent component in @ssc_modfreq_reg * @ssc_enable_mask: mask of the DPLL SSC enable bit in @control_reg * @ssc_downspread_mask: mask of the DPLL SSC low frequency only bit in * @control_reg * @ssc_modfreq: the DPLL SSC frequency modulation in kHz * @ssc_deltam: the DPLL SSC frequency spreading in permille (10th of percent) * @ssc_downspread: require the only low frequency spread of the DPLL in SSC * mode * @flags: DPLL type/features (see below) * * Possible values for @flags: * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs) * * @freqsel_mask is only used on the OMAP34xx family and AM35xx. * * XXX Some DPLLs have multiple bypass inputs, so it's not technically * correct to only have one @clk_bypass pointer. * * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m, * @last_rounded_n) should be separated from the runtime-fixed fields * and placed into a different structure, so that the runtime-fixed data * can be placed into read-only space. */ struct dpll_data { struct clk_omap_reg mult_div1_reg; u32 mult_mask; u32 div1_mask; struct clk_hw *clk_bypass; struct clk_hw *clk_ref; struct clk_omap_reg control_reg; u32 enable_mask; unsigned long last_rounded_rate; u16 last_rounded_m; u8 last_rounded_m4xen; u8 last_rounded_lpmode; u16 max_multiplier; u8 last_rounded_n; u8 min_divider; u16 max_divider; unsigned long max_rate; u8 modes; struct clk_omap_reg autoidle_reg; struct clk_omap_reg idlest_reg; u32 autoidle_mask; u32 freqsel_mask; u32 idlest_mask; u32 dco_mask; u32 sddiv_mask; u32 dcc_mask; unsigned long dcc_rate; u32 lpmode_mask; u32 m4xen_mask; u8 auto_recal_bit; u8 recal_en_bit; u8 recal_st_bit; struct clk_omap_reg ssc_deltam_reg; struct clk_omap_reg ssc_modfreq_reg; u32 ssc_deltam_int_mask; u32 ssc_deltam_frac_mask; u32 ssc_modfreq_mant_mask; u32 ssc_modfreq_exp_mask; u32 ssc_enable_mask; u32 ssc_downspread_mask; u32 ssc_modfreq; u32 ssc_deltam; bool ssc_downspread; u8 flags; }; struct clk_hw_omap; /** * struct clk_hw_omap_ops - OMAP clk ops * @find_idlest: find idlest register information for a clock * @find_companion: find companion clock register information for a clock, * basically converts CM_ICLKEN* <-> CM_FCLKEN* * @allow_idle: enables autoidle hardware functionality for a clock * @deny_idle: prevent autoidle hardware functionality for a clock */ struct clk_hw_omap_ops { void (*find_idlest)(struct clk_hw_omap *oclk, struct clk_omap_reg *idlest_reg, u8 *idlest_bit, u8 *idlest_val); void (*find_companion)(struct clk_hw_omap *oclk, struct clk_omap_reg *other_reg, u8 *other_bit); void (*allow_idle)(struct clk_hw_omap *oclk); void (*deny_idle)(struct clk_hw_omap *oclk); }; /** * struct clk_hw_omap - OMAP struct clk * @node: list_head connecting this clock into the full clock list * @enable_reg: register to write to enable the clock (see @enable_bit) * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) * @flags: see "struct clk.flags possibilities" above * @clksel_reg: for clksel clks, register va containing src/divisor select * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock * @clkdm_name: clockdomain name that this clock is contained in * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime * @ops: clock ops for this clock */ struct clk_hw_omap { struct clk_hw hw; struct list_head node; unsigned long fixed_rate; u8 fixed_div; struct clk_omap_reg enable_reg; u8 enable_bit; unsigned long flags; struct clk_omap_reg clksel_reg; struct dpll_data *dpll_data; const char *clkdm_name; struct clockdomain *clkdm; const struct clk_hw_omap_ops *ops; u32 context; int autoidle_count; }; /* * struct clk_hw_omap.flags possibilities * * XXX document the rest of the clock flags here * * ENABLE_REG_32BIT: (OMAP1 only) clock control register must be accessed * with 32bit ops, by default OMAP1 uses 16bit ops. * CLOCK_IDLE_CONTROL: (OMAP1 only) clock has autoidle support. * CLOCK_NO_IDLE_PARENT: (OMAP1 only) when clock is enabled, its parent * clock is put to no-idle mode. * ENABLE_ON_INIT: Clock is enabled on init. * INVERT_ENABLE: By default, clock enable bit behavior is '1' enable, '0' * disable. This inverts the behavior making '0' enable and '1' disable. * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL * bits share the same register. This flag allows the * omap4_dpllmx*() code to determine which GATE_CTRL bit field * should be used. This is a temporary solution - a better approach * would be to associate clock type-specific data with the clock, * similar to the struct dpll_data approach. */ #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ #define CLOCK_IDLE_CONTROL (1 << 1) #define CLOCK_NO_IDLE_PARENT (1 << 2) #define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ #define CLOCK_CLKOUTX2 (1 << 5) /* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */ #define DPLL_LOW_POWER_STOP 0x1 #define DPLL_LOW_POWER_BYPASS 0x5 #define DPLL_LOCKED 0x7 /* DPLL Type and DCO Selection Flags */ #define DPLL_J_TYPE 0x1 /* Static memmap indices */ enum { TI_CLKM_CM = 0, TI_CLKM_CM2, TI_CLKM_PRM, TI_CLKM_SCRM, TI_CLKM_CTRL, TI_CLKM_CTRL_AUX, TI_CLKM_PLLSS, CLK_MAX_MEMMAPS }; /** * struct ti_clk_ll_ops - low-level ops for clocks * @clk_readl: pointer to register read function * @clk_writel: pointer to register write function * @clk_rmw: pointer to register read-modify-write function * @clkdm_clk_enable: pointer to clockdomain enable function * @clkdm_clk_disable: pointer to clockdomain disable function * @clkdm_lookup: pointer to clockdomain lookup function * @cm_wait_module_ready: pointer to CM module wait ready function * @cm_split_idlest_reg: pointer to CM module function to split idlest reg * * Low-level ops are generally used by the basic clock types (clk-gate, * clk-mux, clk-divider etc.) to provide support for various low-level * hadrware interfaces (direct MMIO, regmap etc.), and is initialized * by board code. Low-level ops also contain some other platform specific * operations not provided directly by clock drivers. */ struct ti_clk_ll_ops { u32 (*clk_readl)(const struct clk_omap_reg *reg); void (*clk_writel)(u32 val, const struct clk_omap_reg *reg); void (*clk_rmw)(u32 val, u32 mask, const struct clk_omap_reg *reg); int (*clkdm_clk_enable)(struct clockdomain *clkdm, struct clk *clk); int (*clkdm_clk_disable)(struct clockdomain *clkdm, struct clk *clk); struct clockdomain * (*clkdm_lookup)(const char *name); int (*cm_wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift); int (*cm_split_idlest_reg)(struct clk_omap_reg *idlest_reg, s16 *prcm_inst, u8 *idlest_reg_id); }; #define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw) bool omap2_clk_is_hw_omap(struct clk_hw *hw); int omap2_clk_disable_autoidle_all(void); int omap2_clk_enable_autoidle_all(void); int omap2_clk_allow_idle(struct clk *clk); int omap2_clk_deny_idle(struct clk *clk); unsigned long omap2_dpllcore_recalc(struct clk_hw *hw, unsigned long parent_rate); int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate, unsigned long parent_rate); void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); void omap2xxx_clkt_vps_init(void); unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk); void ti_dt_clk_init_retry_clks(void); void ti_dt_clockdomains_setup(void); int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops); struct regmap; int omap2_clk_provider_init(struct device_node *parent, int index, struct regmap *syscon, void __iomem *mem); void omap2_clk_legacy_provider_init(int index, void __iomem *mem); int omap3430_dt_clk_init(void); int omap3630_dt_clk_init(void); int am35xx_dt_clk_init(void); int dm814x_dt_clk_init(void); int dm816x_dt_clk_init(void); int omap4xxx_dt_clk_init(void); int omap5xxx_dt_clk_init(void); int dra7xx_dt_clk_init(void); int am33xx_dt_clk_init(void); int am43xx_dt_clk_init(void); int omap2420_dt_clk_init(void); int omap2430_dt_clk_init(void); struct ti_clk_features { u32 flags; long fint_min; long fint_max; long fint_band1_max; long fint_band2_min; u8 dpll_bypass_vals; u8 cm_idlest_val; }; #define TI_CLK_DPLL_HAS_FREQSEL BIT(0) #define TI_CLK_DPLL4_DENY_REPROGRAM BIT(1) #define TI_CLK_DISABLE_CLKDM_CONTROL BIT(2) #define TI_CLK_ERRATA_I810 BIT(3) #define TI_CLK_CLKCTRL_COMPAT BIT(4) #define TI_CLK_DEVICE_TYPE_GP BIT(5) void ti_clk_setup_features(struct ti_clk_features *features); const struct ti_clk_features *ti_clk_get_features(void); bool ti_clk_is_in_standby(struct clk *clk); int omap3_noncore_dpll_save_context(struct clk_hw *hw); void omap3_noncore_dpll_restore_context(struct clk_hw *hw); int omap3_core_dpll_save_context(struct clk_hw *hw); void omap3_core_dpll_restore_context(struct clk_hw *hw); extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll; #ifdef CONFIG_ATAGS int omap3430_clk_legacy_init(void); int omap3430es1_clk_legacy_init(void); int omap36xx_clk_legacy_init(void); int am35xx_clk_legacy_init(void); #else static inline int omap3430_clk_legacy_init(void) { return -ENXIO; } static inline int omap3430es1_clk_legacy_init(void) { return -ENXIO; } static inline int omap36xx_clk_legacy_init(void) { return -ENXIO; } static inline int am35xx_clk_legacy_init(void) { return -ENXIO; } #endif #endif PK ! �� � clk/renesas.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ * * Copyright 2013 Ideas On Board SPRL * Copyright 2013, 2014 Horms Solutions Ltd. * * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com> * Contact: Simon Horman <horms@verge.net.au> */ #ifndef __LINUX_CLK_RENESAS_H_ #define __LINUX_CLK_RENESAS_H_ #include <linux/types.h> struct device; struct device_node; struct generic_pm_domain; void cpg_mstp_add_clk_domain(struct device_node *np); #ifdef CONFIG_CLK_RENESAS_CPG_MSTP int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev); void cpg_mstp_detach_dev(struct generic_pm_domain *unused, struct device *dev); #else #define cpg_mstp_attach_dev NULL #define cpg_mstp_detach_dev NULL #endif #ifdef CONFIG_CLK_RENESAS_CPG_MSSR int cpg_mssr_attach_dev(struct generic_pm_domain *unused, struct device *dev); void cpg_mssr_detach_dev(struct generic_pm_domain *unused, struct device *dev); #else #define cpg_mssr_attach_dev NULL #define cpg_mssr_detach_dev NULL #endif #endif PK ! �WSA� � clk/mxs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2013 Freescale Semiconductor, Inc. */ #ifndef __LINUX_CLK_MXS_H #define __LINUX_CLK_MXS_H int mxs_saif_clkmux_select(unsigned int clkmux); #endif PK ! Wz7$; ; clk/analogbits-wrpll-cln28hpc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2018-2019 SiFive, Inc. * Wesley Terpstra * Paul Walmsley */ #ifndef __LINUX_CLK_ANALOGBITS_WRPLL_CLN28HPC_H #define __LINUX_CLK_ANALOGBITS_WRPLL_CLN28HPC_H #include <linux/types.h> /* DIVQ_VALUES: number of valid DIVQ values */ #define DIVQ_VALUES 6 /* * Bit definitions for struct wrpll_cfg.flags * * WRPLL_FLAGS_BYPASS_FLAG: if set, the PLL is either in bypass, or should be * programmed to enter bypass * WRPLL_FLAGS_RESET_FLAG: if set, the PLL is in reset * WRPLL_FLAGS_INT_FEEDBACK_FLAG: if set, the PLL is configured for internal * feedback mode * WRPLL_FLAGS_EXT_FEEDBACK_FLAG: if set, the PLL is configured for external * feedback mode (not yet supported by this driver) */ #define WRPLL_FLAGS_BYPASS_SHIFT 0 #define WRPLL_FLAGS_BYPASS_MASK BIT(WRPLL_FLAGS_BYPASS_SHIFT) #define WRPLL_FLAGS_RESET_SHIFT 1 #define WRPLL_FLAGS_RESET_MASK BIT(WRPLL_FLAGS_RESET_SHIFT) #define WRPLL_FLAGS_INT_FEEDBACK_SHIFT 2 #define WRPLL_FLAGS_INT_FEEDBACK_MASK BIT(WRPLL_FLAGS_INT_FEEDBACK_SHIFT) #define WRPLL_FLAGS_EXT_FEEDBACK_SHIFT 3 #define WRPLL_FLAGS_EXT_FEEDBACK_MASK BIT(WRPLL_FLAGS_EXT_FEEDBACK_SHIFT) /** * struct wrpll_cfg - WRPLL configuration values * @divr: reference divider value (6 bits), as presented to the PLL signals * @divf: feedback divider value (9 bits), as presented to the PLL signals * @divq: output divider value (3 bits), as presented to the PLL signals * @flags: PLL configuration flags. See above for more information * @range: PLL loop filter range. See below for more information * @output_rate_cache: cached output rates, swept across DIVQ * @parent_rate: PLL refclk rate for which values are valid * @max_r: maximum possible R divider value, given @parent_rate * @init_r: initial R divider value to start the search from * * @divr, @divq, @divq, @range represent what the PLL expects to see * on its input signals. Thus @divr and @divf are the actual divisors * minus one. @divq is a power-of-two divider; for example, 1 = * divide-by-2 and 6 = divide-by-64. 0 is an invalid @divq value. * * When initially passing a struct wrpll_cfg record, the * record should be zero-initialized with the exception of the @flags * field. The only flag bits that need to be set are either * WRPLL_FLAGS_INT_FEEDBACK or WRPLL_FLAGS_EXT_FEEDBACK. */ struct wrpll_cfg { u8 divr; u8 divq; u8 range; u8 flags; u16 divf; /* private: */ u32 output_rate_cache[DIVQ_VALUES]; unsigned long parent_rate; u8 max_r; u8 init_r; }; int wrpll_configure_for_rate(struct wrpll_cfg *c, u32 target_rate, unsigned long parent_rate); unsigned int wrpll_calc_max_lock_us(const struct wrpll_cfg *c); unsigned long wrpll_calc_output_rate(const struct wrpll_cfg *c, unsigned long parent_rate); #endif /* __LINUX_CLK_ANALOGBITS_WRPLL_CLN28HPC_H */ PK ! ��J'z z clk/tegra.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2012-2020, NVIDIA CORPORATION. All rights reserved. */ #ifndef __LINUX_CLK_TEGRA_H_ #define __LINUX_CLK_TEGRA_H_ #include <linux/types.h> #include <linux/bug.h> /* * Tegra CPU clock and reset control ops * * wait_for_reset: * keep waiting until the CPU in reset state * put_in_reset: * put the CPU in reset state * out_of_reset: * release the CPU from reset state * enable_clock: * CPU clock un-gate * disable_clock: * CPU clock gate * rail_off_ready: * CPU is ready for rail off * suspend: * save the clock settings when CPU go into low-power state * resume: * restore the clock settings when CPU exit low-power state */ struct tegra_cpu_car_ops { void (*wait_for_reset)(u32 cpu); void (*put_in_reset)(u32 cpu); void (*out_of_reset)(u32 cpu); void (*enable_clock)(u32 cpu); void (*disable_clock)(u32 cpu); #ifdef CONFIG_PM_SLEEP bool (*rail_off_ready)(void); void (*suspend)(void); void (*resume)(void); #endif }; extern struct tegra_cpu_car_ops *tegra_cpu_car_ops; static inline void tegra_wait_cpu_in_reset(u32 cpu) { if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset)) return; tegra_cpu_car_ops->wait_for_reset(cpu); } static inline void tegra_put_cpu_in_reset(u32 cpu) { if (WARN_ON(!tegra_cpu_car_ops->put_in_reset)) return; tegra_cpu_car_ops->put_in_reset(cpu); } static inline void tegra_cpu_out_of_reset(u32 cpu) { if (WARN_ON(!tegra_cpu_car_ops->out_of_reset)) return; tegra_cpu_car_ops->out_of_reset(cpu); } static inline void tegra_enable_cpu_clock(u32 cpu) { if (WARN_ON(!tegra_cpu_car_ops->enable_clock)) return; tegra_cpu_car_ops->enable_clock(cpu); } static inline void tegra_disable_cpu_clock(u32 cpu) { if (WARN_ON(!tegra_cpu_car_ops->disable_clock)) return; tegra_cpu_car_ops->disable_clock(cpu); } #ifdef CONFIG_PM_SLEEP static inline bool tegra_cpu_rail_off_ready(void) { if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready)) return false; return tegra_cpu_car_ops->rail_off_ready(); } static inline void tegra_cpu_clock_suspend(void) { if (WARN_ON(!tegra_cpu_car_ops->suspend)) return; tegra_cpu_car_ops->suspend(); } static inline void tegra_cpu_clock_resume(void) { if (WARN_ON(!tegra_cpu_car_ops->resume)) return; tegra_cpu_car_ops->resume(); } #else static inline bool tegra_cpu_rail_off_ready(void) { return false; } static inline void tegra_cpu_clock_suspend(void) { } static inline void tegra_cpu_clock_resume(void) { } #endif struct clk; struct tegra_emc; typedef long (tegra20_clk_emc_round_cb)(unsigned long rate, unsigned long min_rate, unsigned long max_rate, void *arg); typedef int (tegra124_emc_prepare_timing_change_cb)(struct tegra_emc *emc, unsigned long rate); typedef void (tegra124_emc_complete_timing_change_cb)(struct tegra_emc *emc, unsigned long rate); struct tegra210_clk_emc_config { unsigned long rate; bool same_freq; u32 value; unsigned long parent_rate; u8 parent; }; struct tegra210_clk_emc_provider { struct module *owner; struct device *dev; struct tegra210_clk_emc_config *configs; unsigned int num_configs; int (*set_rate)(struct device *dev, const struct tegra210_clk_emc_config *config); }; #if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_ARCH_TEGRA_3x_SOC) void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb, void *cb_arg); int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same); #else static inline void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb, void *cb_arg) { } static inline int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same) { return 0; } #endif #ifdef CONFIG_TEGRA124_CLK_EMC void tegra124_clk_set_emc_callbacks(tegra124_emc_prepare_timing_change_cb *prep_cb, tegra124_emc_complete_timing_change_cb *complete_cb); #else static inline void tegra124_clk_set_emc_callbacks(tegra124_emc_prepare_timing_change_cb *prep_cb, tegra124_emc_complete_timing_change_cb *complete_cb) { } #endif #ifdef CONFIG_ARCH_TEGRA_210_SOC int tegra210_plle_hw_sequence_start(void); bool tegra210_plle_hw_sequence_is_enabled(void); void tegra210_xusb_pll_hw_control_enable(void); void tegra210_xusb_pll_hw_sequence_start(void); void tegra210_sata_pll_hw_control_enable(void); void tegra210_sata_pll_hw_sequence_start(void); void tegra210_set_sata_pll_seq_sw(bool state); void tegra210_put_utmipll_in_iddq(void); void tegra210_put_utmipll_out_iddq(void); int tegra210_clk_handle_mbist_war(unsigned int id); void tegra210_clk_emc_dll_enable(bool flag); void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); void tegra210_clk_emc_update_setting(u32 emc_src_value); int tegra210_clk_emc_attach(struct clk *clk, struct tegra210_clk_emc_provider *provider); void tegra210_clk_emc_detach(struct clk *clk); #else static inline int tegra210_plle_hw_sequence_start(void) { return 0; } static inline bool tegra210_plle_hw_sequence_is_enabled(void) { return false; } static inline int tegra210_clk_handle_mbist_war(unsigned int id) { return 0; } static inline int tegra210_clk_emc_attach(struct clk *clk, struct tegra210_clk_emc_provider *provider) { return 0; } static inline void tegra210_xusb_pll_hw_control_enable(void) {} static inline void tegra210_xusb_pll_hw_sequence_start(void) {} static inline void tegra210_sata_pll_hw_control_enable(void) {} static inline void tegra210_sata_pll_hw_sequence_start(void) {} static inline void tegra210_set_sata_pll_seq_sw(bool state) {} static inline void tegra210_put_utmipll_in_iddq(void) {} static inline void tegra210_put_utmipll_out_iddq(void) {} static inline void tegra210_clk_emc_dll_enable(bool flag) {} static inline void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value) {} static inline void tegra210_clk_emc_update_setting(u32 emc_src_value) {} static inline void tegra210_clk_emc_detach(struct clk *clk) {} #endif #endif /* __LINUX_CLK_TEGRA_H_ */ PK ! �o�> clk/imx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2020 Freescale Semiconductor, Inc. * * Author: Lee Jones <lee.jones@linaro.org> */ #ifndef __LINUX_CLK_IMX_H #define __LINUX_CLK_IMX_H #include <linux/types.h> void imx6sl_set_wait_clk(bool enter); #endif PK ! ��� � clk/mmp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __CLK_MMP_H #define __CLK_MMP_H #include <linux/types.h> extern void pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, phys_addr_t apbc_phys); extern void pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, phys_addr_t apbc_phys, phys_addr_t apbcp_phys); extern void mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, phys_addr_t apbc_phys); #endif PK ! f� �� � clk/samsung.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2020 Krzysztof Kozlowski <krzk@kernel.org> */ #ifndef __LINUX_CLK_SAMSUNG_H_ #define __LINUX_CLK_SAMSUNG_H_ #include <linux/compiler_types.h> struct device_node; #ifdef CONFIG_S3C64XX_COMMON_CLK void s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f, unsigned long xusbxti_f, bool s3c6400, void __iomem *base); #else static inline void s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f, unsigned long xusbxti_f, bool s3c6400, void __iomem *base) { } #endif /* CONFIG_S3C64XX_COMMON_CLK */ #ifdef CONFIG_S3C2410_COMMON_CLK void s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f, int current_soc, void __iomem *reg_base); #else static inline void s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f, int current_soc, void __iomem *reg_base) { } #endif /* CONFIG_S3C2410_COMMON_CLK */ #ifdef CONFIG_S3C2412_COMMON_CLK void s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f, unsigned long ext_f, void __iomem *reg_base); #else static inline void s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f, unsigned long ext_f, void __iomem *reg_base) { } #endif /* CONFIG_S3C2412_COMMON_CLK */ #ifdef CONFIG_S3C2443_COMMON_CLK void s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f, int current_soc, void __iomem *reg_base); #else static inline void s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f, int current_soc, void __iomem *reg_base) { } #endif /* CONFIG_S3C2443_COMMON_CLK */ #endif /* __LINUX_CLK_SAMSUNG_H_ */ PK ! !�� � clk/clk-conf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2014 Samsung Electronics Co., Ltd. * Sylwester Nawrocki <s.nawrocki@samsung.com> */ #ifndef __CLK_CONF_H #define __CLK_CONF_H #include <linux/types.h> struct device_node; #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) int of_clk_set_defaults(struct device_node *node, bool clk_supplier); #else static inline int of_clk_set_defaults(struct device_node *node, bool clk_supplier) { return 0; } #endif #endif /* __CLK_CONF_H */ PK ! _U�,� ,� avf/virtchnl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /******************************************************************************* * * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver * Copyright(c) 2013 - 2014 Intel Corporation. * * Contact Information: * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 * ******************************************************************************/ #ifndef _VIRTCHNL_H_ #define _VIRTCHNL_H_ /* Description: * This header file describes the VF-PF communication protocol used * by the drivers for all devices starting from our 40G product line * * Admin queue buffer usage: * desc->opcode is always aqc_opc_send_msg_to_pf * flags, retval, datalen, and data addr are all used normally. * The Firmware copies the cookie fields when sending messages between the * PF and VF, but uses all other fields internally. Due to this limitation, * we must send all messages as "indirect", i.e. using an external buffer. * * All the VSI indexes are relative to the VF. Each VF can have maximum of * three VSIs. All the queue indexes are relative to the VSI. Each VF can * have a maximum of sixteen queues for all of its VSIs. * * The PF is required to return a status code in v_retval for all messages * except RESET_VF, which does not require any response. The return value * is of status_code type, defined in the shared type.h. * * In general, VF driver initialization should roughly follow the order of * these opcodes. The VF driver must first validate the API version of the * PF driver, then request a reset, then get resources, then configure * queues and interrupts. After these operations are complete, the VF * driver may start its queues, optionally add MAC and VLAN filters, and * process traffic. */ /* START GENERIC DEFINES * Need to ensure the following enums and defines hold the same meaning and * value in current and future projects */ /* Error Codes */ enum virtchnl_status_code { VIRTCHNL_STATUS_SUCCESS = 0, VIRTCHNL_STATUS_ERR_PARAM = -5, VIRTCHNL_STATUS_ERR_NO_MEMORY = -18, VIRTCHNL_STATUS_ERR_OPCODE_MISMATCH = -38, VIRTCHNL_STATUS_ERR_CQP_COMPL_ERROR = -39, VIRTCHNL_STATUS_ERR_INVALID_VF_ID = -40, VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR = -53, VIRTCHNL_STATUS_ERR_NOT_SUPPORTED = -64, }; /* Backward compatibility */ #define VIRTCHNL_ERR_PARAM VIRTCHNL_STATUS_ERR_PARAM #define VIRTCHNL_STATUS_NOT_SUPPORTED VIRTCHNL_STATUS_ERR_NOT_SUPPORTED #define VIRTCHNL_LINK_SPEED_2_5GB_SHIFT 0x0 #define VIRTCHNL_LINK_SPEED_100MB_SHIFT 0x1 #define VIRTCHNL_LINK_SPEED_1000MB_SHIFT 0x2 #define VIRTCHNL_LINK_SPEED_10GB_SHIFT 0x3 #define VIRTCHNL_LINK_SPEED_40GB_SHIFT 0x4 #define VIRTCHNL_LINK_SPEED_20GB_SHIFT 0x5 #define VIRTCHNL_LINK_SPEED_25GB_SHIFT 0x6 #define VIRTCHNL_LINK_SPEED_5GB_SHIFT 0x7 enum virtchnl_link_speed { VIRTCHNL_LINK_SPEED_UNKNOWN = 0, VIRTCHNL_LINK_SPEED_100MB = BIT(VIRTCHNL_LINK_SPEED_100MB_SHIFT), VIRTCHNL_LINK_SPEED_1GB = BIT(VIRTCHNL_LINK_SPEED_1000MB_SHIFT), VIRTCHNL_LINK_SPEED_10GB = BIT(VIRTCHNL_LINK_SPEED_10GB_SHIFT), VIRTCHNL_LINK_SPEED_40GB = BIT(VIRTCHNL_LINK_SPEED_40GB_SHIFT), VIRTCHNL_LINK_SPEED_20GB = BIT(VIRTCHNL_LINK_SPEED_20GB_SHIFT), VIRTCHNL_LINK_SPEED_25GB = BIT(VIRTCHNL_LINK_SPEED_25GB_SHIFT), VIRTCHNL_LINK_SPEED_2_5GB = BIT(VIRTCHNL_LINK_SPEED_2_5GB_SHIFT), VIRTCHNL_LINK_SPEED_5GB = BIT(VIRTCHNL_LINK_SPEED_5GB_SHIFT), }; /* for hsplit_0 field of Rx HMC context */ /* deprecated with AVF 1.0 */ enum virtchnl_rx_hsplit { VIRTCHNL_RX_HSPLIT_NO_SPLIT = 0, VIRTCHNL_RX_HSPLIT_SPLIT_L2 = 1, VIRTCHNL_RX_HSPLIT_SPLIT_IP = 2, VIRTCHNL_RX_HSPLIT_SPLIT_TCP_UDP = 4, VIRTCHNL_RX_HSPLIT_SPLIT_SCTP = 8, }; /* END GENERIC DEFINES */ /* Opcodes for VF-PF communication. These are placed in the v_opcode field * of the virtchnl_msg structure. */ enum virtchnl_ops { /* The PF sends status change events to VFs using * the VIRTCHNL_OP_EVENT opcode. * VFs send requests to the PF using the other ops. * Use of "advanced opcode" features must be negotiated as part of capabilities * exchange and are not considered part of base mode feature set. */ VIRTCHNL_OP_UNKNOWN = 0, VIRTCHNL_OP_VERSION = 1, /* must ALWAYS be 1 */ VIRTCHNL_OP_RESET_VF = 2, VIRTCHNL_OP_GET_VF_RESOURCES = 3, VIRTCHNL_OP_CONFIG_TX_QUEUE = 4, VIRTCHNL_OP_CONFIG_RX_QUEUE = 5, VIRTCHNL_OP_CONFIG_VSI_QUEUES = 6, VIRTCHNL_OP_CONFIG_IRQ_MAP = 7, VIRTCHNL_OP_ENABLE_QUEUES = 8, VIRTCHNL_OP_DISABLE_QUEUES = 9, VIRTCHNL_OP_ADD_ETH_ADDR = 10, VIRTCHNL_OP_DEL_ETH_ADDR = 11, VIRTCHNL_OP_ADD_VLAN = 12, VIRTCHNL_OP_DEL_VLAN = 13, VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE = 14, VIRTCHNL_OP_GET_STATS = 15, VIRTCHNL_OP_RSVD = 16, VIRTCHNL_OP_EVENT = 17, /* must ALWAYS be 17 */ VIRTCHNL_OP_IWARP = 20, /* advanced opcode */ VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP = 21, /* advanced opcode */ VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP = 22, /* advanced opcode */ VIRTCHNL_OP_CONFIG_RSS_KEY = 23, VIRTCHNL_OP_CONFIG_RSS_LUT = 24, VIRTCHNL_OP_GET_RSS_HENA_CAPS = 25, VIRTCHNL_OP_SET_RSS_HENA = 26, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING = 27, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING = 28, VIRTCHNL_OP_REQUEST_QUEUES = 29, VIRTCHNL_OP_ENABLE_CHANNELS = 30, VIRTCHNL_OP_DISABLE_CHANNELS = 31, VIRTCHNL_OP_ADD_CLOUD_FILTER = 32, VIRTCHNL_OP_DEL_CLOUD_FILTER = 33, /* opcode 34 - 44 are reserved */ VIRTCHNL_OP_ADD_RSS_CFG = 45, VIRTCHNL_OP_DEL_RSS_CFG = 46, VIRTCHNL_OP_ADD_FDIR_FILTER = 47, VIRTCHNL_OP_DEL_FDIR_FILTER = 48, VIRTCHNL_OP_MAX, }; /* These macros are used to generate compilation errors if a structure/union * is not exactly the correct length. It gives a divide by zero error if the * structure/union is not of the correct size, otherwise it creates an enum * that is never used. */ #define VIRTCHNL_CHECK_STRUCT_LEN(n, X) enum virtchnl_static_assert_enum_##X \ { virtchnl_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) } #define VIRTCHNL_CHECK_UNION_LEN(n, X) enum virtchnl_static_asset_enum_##X \ { virtchnl_static_assert_##X = (n)/((sizeof(union X) == (n)) ? 1 : 0) } /* Virtual channel message descriptor. This overlays the admin queue * descriptor. All other data is passed in external buffers. */ struct virtchnl_msg { u8 pad[8]; /* AQ flags/opcode/len/retval fields */ enum virtchnl_ops v_opcode; /* avoid confusion with desc->opcode */ enum virtchnl_status_code v_retval; /* ditto for desc->retval */ u32 vfid; /* used by PF when sending to VF */ }; VIRTCHNL_CHECK_STRUCT_LEN(20, virtchnl_msg); /* Message descriptions and data structures. */ /* VIRTCHNL_OP_VERSION * VF posts its version number to the PF. PF responds with its version number * in the same format, along with a return code. * Reply from PF has its major/minor versions also in param0 and param1. * If there is a major version mismatch, then the VF cannot operate. * If there is a minor version mismatch, then the VF can operate but should * add a warning to the system log. * * This enum element MUST always be specified as == 1, regardless of other * changes in the API. The PF must always respond to this message without * error regardless of version mismatch. */ #define VIRTCHNL_VERSION_MAJOR 1 #define VIRTCHNL_VERSION_MINOR 1 #define VIRTCHNL_VERSION_MINOR_NO_VF_CAPS 0 struct virtchnl_version_info { u32 major; u32 minor; }; VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_version_info); #define VF_IS_V10(_v) (((_v)->major == 1) && ((_v)->minor == 0)) #define VF_IS_V11(_ver) (((_ver)->major == 1) && ((_ver)->minor == 1)) /* VIRTCHNL_OP_RESET_VF * VF sends this request to PF with no parameters * PF does NOT respond! VF driver must delay then poll VFGEN_RSTAT register * until reset completion is indicated. The admin queue must be reinitialized * after this operation. * * When reset is complete, PF must ensure that all queues in all VSIs associated * with the VF are stopped, all queue configurations in the HMC are set to 0, * and all MAC and VLAN filters (except the default MAC address) on all VSIs * are cleared. */ /* VSI types that use VIRTCHNL interface for VF-PF communication. VSI_SRIOV * vsi_type should always be 6 for backward compatibility. Add other fields * as needed. */ enum virtchnl_vsi_type { VIRTCHNL_VSI_TYPE_INVALID = 0, VIRTCHNL_VSI_SRIOV = 6, }; /* VIRTCHNL_OP_GET_VF_RESOURCES * Version 1.0 VF sends this request to PF with no parameters * Version 1.1 VF sends this request to PF with u32 bitmap of its capabilities * PF responds with an indirect message containing * virtchnl_vf_resource and one or more * virtchnl_vsi_resource structures. */ struct virtchnl_vsi_resource { u16 vsi_id; u16 num_queue_pairs; enum virtchnl_vsi_type vsi_type; u16 qset_handle; u8 default_mac_addr[ETH_ALEN]; }; VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vsi_resource); /* VF capability flags * VIRTCHNL_VF_OFFLOAD_L2 flag is inclusive of base mode L2 offloads including * TX/RX Checksum offloading and TSO for non-tunnelled packets. */ #define VIRTCHNL_VF_OFFLOAD_L2 0x00000001 #define VIRTCHNL_VF_OFFLOAD_IWARP 0x00000002 #define VIRTCHNL_VF_OFFLOAD_RSVD 0x00000004 #define VIRTCHNL_VF_OFFLOAD_RSS_AQ 0x00000008 #define VIRTCHNL_VF_OFFLOAD_RSS_REG 0x00000010 #define VIRTCHNL_VF_OFFLOAD_WB_ON_ITR 0x00000020 #define VIRTCHNL_VF_OFFLOAD_REQ_QUEUES 0x00000040 #define VIRTCHNL_VF_OFFLOAD_VLAN 0x00010000 #define VIRTCHNL_VF_OFFLOAD_RX_POLLING 0x00020000 #define VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2 0x00040000 #define VIRTCHNL_VF_OFFLOAD_RSS_PF 0X00080000 #define VIRTCHNL_VF_OFFLOAD_ENCAP 0X00100000 #define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM 0X00200000 #define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM 0X00400000 #define VIRTCHNL_VF_OFFLOAD_ADQ 0X00800000 #define VIRTCHNL_VF_OFFLOAD_USO 0X02000000 #define VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF 0X08000000 #define VIRTCHNL_VF_OFFLOAD_FDIR_PF 0X10000000 /* Define below the capability flags that are not offloads */ #define VIRTCHNL_VF_CAP_ADV_LINK_SPEED 0x00000080 #define VF_BASE_MODE_OFFLOADS (VIRTCHNL_VF_OFFLOAD_L2 | \ VIRTCHNL_VF_OFFLOAD_VLAN | \ VIRTCHNL_VF_OFFLOAD_RSS_PF) struct virtchnl_vf_resource { u16 num_vsis; u16 num_queue_pairs; u16 max_vectors; u16 max_mtu; u32 vf_cap_flags; u32 rss_key_size; u32 rss_lut_size; struct virtchnl_vsi_resource vsi_res[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(36, virtchnl_vf_resource); /* VIRTCHNL_OP_CONFIG_TX_QUEUE * VF sends this message to set up parameters for one TX queue. * External data buffer contains one instance of virtchnl_txq_info. * PF configures requested queue and returns a status code. */ /* Tx queue config info */ struct virtchnl_txq_info { u16 vsi_id; u16 queue_id; u16 ring_len; /* number of descriptors, multiple of 8 */ u16 headwb_enabled; /* deprecated with AVF 1.0 */ u64 dma_ring_addr; u64 dma_headwb_addr; /* deprecated with AVF 1.0 */ }; VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_txq_info); /* VIRTCHNL_OP_CONFIG_RX_QUEUE * VF sends this message to set up parameters for one RX queue. * External data buffer contains one instance of virtchnl_rxq_info. * PF configures requested queue and returns a status code. */ /* Rx queue config info */ struct virtchnl_rxq_info { u16 vsi_id; u16 queue_id; u32 ring_len; /* number of descriptors, multiple of 32 */ u16 hdr_size; u16 splithdr_enabled; /* deprecated with AVF 1.0 */ u32 databuffer_size; u32 max_pkt_size; u32 pad1; u64 dma_ring_addr; enum virtchnl_rx_hsplit rx_split_pos; /* deprecated with AVF 1.0 */ u32 pad2; }; VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_rxq_info); /* VIRTCHNL_OP_CONFIG_VSI_QUEUES * VF sends this message to set parameters for all active TX and RX queues * associated with the specified VSI. * PF configures queues and returns status. * If the number of queues specified is greater than the number of queues * associated with the VSI, an error is returned and no queues are configured. */ struct virtchnl_queue_pair_info { /* NOTE: vsi_id and queue_id should be identical for both queues. */ struct virtchnl_txq_info txq; struct virtchnl_rxq_info rxq; }; VIRTCHNL_CHECK_STRUCT_LEN(64, virtchnl_queue_pair_info); struct virtchnl_vsi_queue_config_info { u16 vsi_id; u16 num_queue_pairs; u32 pad; struct virtchnl_queue_pair_info qpair[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(72, virtchnl_vsi_queue_config_info); /* VIRTCHNL_OP_REQUEST_QUEUES * VF sends this message to request the PF to allocate additional queues to * this VF. Each VF gets a guaranteed number of queues on init but asking for * additional queues must be negotiated. This is a best effort request as it * is possible the PF does not have enough queues left to support the request. * If the PF cannot support the number requested it will respond with the * maximum number it is able to support. If the request is successful, PF will * then reset the VF to institute required changes. */ /* VF resource request */ struct virtchnl_vf_res_request { u16 num_queue_pairs; }; /* VIRTCHNL_OP_CONFIG_IRQ_MAP * VF uses this message to map vectors to queues. * The rxq_map and txq_map fields are bitmaps used to indicate which queues * are to be associated with the specified vector. * The "other" causes are always mapped to vector 0. * PF configures interrupt mapping and returns status. */ struct virtchnl_vector_map { u16 vsi_id; u16 vector_id; u16 rxq_map; u16 txq_map; u16 rxitr_idx; u16 txitr_idx; }; VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_vector_map); struct virtchnl_irq_map_info { u16 num_vectors; struct virtchnl_vector_map vecmap[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(14, virtchnl_irq_map_info); /* VIRTCHNL_OP_ENABLE_QUEUES * VIRTCHNL_OP_DISABLE_QUEUES * VF sends these message to enable or disable TX/RX queue pairs. * The queues fields are bitmaps indicating which queues to act upon. * (Currently, we only support 16 queues per VF, but we make the field * u32 to allow for expansion.) * PF performs requested action and returns status. */ struct virtchnl_queue_select { u16 vsi_id; u16 pad; u32 rx_queues; u32 tx_queues; }; VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_select); /* VIRTCHNL_OP_ADD_ETH_ADDR * VF sends this message in order to add one or more unicast or multicast * address filters for the specified VSI. * PF adds the filters and returns status. */ /* VIRTCHNL_OP_DEL_ETH_ADDR * VF sends this message in order to remove one or more unicast or multicast * filters for the specified VSI. * PF removes the filters and returns status. */ /* VIRTCHNL_ETHER_ADDR_LEGACY * Prior to adding the @type member to virtchnl_ether_addr, there were 2 pad * bytes. Moving forward all VF drivers should not set type to * VIRTCHNL_ETHER_ADDR_LEGACY. This is only here to not break previous/legacy * behavior. The control plane function (i.e. PF) can use a best effort method * of tracking the primary/device unicast in this case, but there is no * guarantee and functionality depends on the implementation of the PF. */ /* VIRTCHNL_ETHER_ADDR_PRIMARY * All VF drivers should set @type to VIRTCHNL_ETHER_ADDR_PRIMARY for the * primary/device unicast MAC address filter for VIRTCHNL_OP_ADD_ETH_ADDR and * VIRTCHNL_OP_DEL_ETH_ADDR. This allows for the underlying control plane * function (i.e. PF) to accurately track and use this MAC address for * displaying on the host and for VM/function reset. */ /* VIRTCHNL_ETHER_ADDR_EXTRA * All VF drivers should set @type to VIRTCHNL_ETHER_ADDR_EXTRA for any extra * unicast and/or multicast filters that are being added/deleted via * VIRTCHNL_OP_DEL_ETH_ADDR/VIRTCHNL_OP_ADD_ETH_ADDR respectively. */ struct virtchnl_ether_addr { u8 addr[ETH_ALEN]; u8 type; #define VIRTCHNL_ETHER_ADDR_LEGACY 0 #define VIRTCHNL_ETHER_ADDR_PRIMARY 1 #define VIRTCHNL_ETHER_ADDR_EXTRA 2 #define VIRTCHNL_ETHER_ADDR_TYPE_MASK 3 /* first two bits of type are valid */ u8 pad; }; VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_ether_addr); struct virtchnl_ether_addr_list { u16 vsi_id; u16 num_elements; struct virtchnl_ether_addr list[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_ether_addr_list); /* VIRTCHNL_OP_ADD_VLAN * VF sends this message to add one or more VLAN tag filters for receives. * PF adds the filters and returns status. * If a port VLAN is configured by the PF, this operation will return an * error to the VF. */ /* VIRTCHNL_OP_DEL_VLAN * VF sends this message to remove one or more VLAN tag filters for receives. * PF removes the filters and returns status. * If a port VLAN is configured by the PF, this operation will return an * error to the VF. */ struct virtchnl_vlan_filter_list { u16 vsi_id; u16 num_elements; u16 vlan_id[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_vlan_filter_list); /* VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE * VF sends VSI id and flags. * PF returns status code in retval. * Note: we assume that broadcast accept mode is always enabled. */ struct virtchnl_promisc_info { u16 vsi_id; u16 flags; }; VIRTCHNL_CHECK_STRUCT_LEN(4, virtchnl_promisc_info); #define FLAG_VF_UNICAST_PROMISC 0x00000001 #define FLAG_VF_MULTICAST_PROMISC 0x00000002 /* VIRTCHNL_OP_GET_STATS * VF sends this message to request stats for the selected VSI. VF uses * the virtchnl_queue_select struct to specify the VSI. The queue_id * field is ignored by the PF. * * PF replies with struct eth_stats in an external buffer. */ /* VIRTCHNL_OP_CONFIG_RSS_KEY * VIRTCHNL_OP_CONFIG_RSS_LUT * VF sends these messages to configure RSS. Only supported if both PF * and VF drivers set the VIRTCHNL_VF_OFFLOAD_RSS_PF bit during * configuration negotiation. If this is the case, then the RSS fields in * the VF resource struct are valid. * Both the key and LUT are initialized to 0 by the PF, meaning that * RSS is effectively disabled until set up by the VF. */ struct virtchnl_rss_key { u16 vsi_id; u16 key_len; u8 key[1]; /* RSS hash key, packed bytes */ }; VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_rss_key); struct virtchnl_rss_lut { u16 vsi_id; u16 lut_entries; u8 lut[1]; /* RSS lookup table */ }; VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_rss_lut); /* VIRTCHNL_OP_GET_RSS_HENA_CAPS * VIRTCHNL_OP_SET_RSS_HENA * VF sends these messages to get and set the hash filter enable bits for RSS. * By default, the PF sets these to all possible traffic types that the * hardware supports. The VF can query this value if it wants to change the * traffic types that are hashed by the hardware. */ struct virtchnl_rss_hena { u64 hena; }; VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_rss_hena); /* VIRTCHNL_OP_ENABLE_CHANNELS * VIRTCHNL_OP_DISABLE_CHANNELS * VF sends these messages to enable or disable channels based on * the user specified queue count and queue offset for each traffic class. * This struct encompasses all the information that the PF needs from * VF to create a channel. */ struct virtchnl_channel_info { u16 count; /* number of queues in a channel */ u16 offset; /* queues in a channel start from 'offset' */ u32 pad; u64 max_tx_rate; }; VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_channel_info); struct virtchnl_tc_info { u32 num_tc; u32 pad; struct virtchnl_channel_info list[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_tc_info); /* VIRTCHNL_ADD_CLOUD_FILTER * VIRTCHNL_DEL_CLOUD_FILTER * VF sends these messages to add or delete a cloud filter based on the * user specified match and action filters. These structures encompass * all the information that the PF needs from the VF to add/delete a * cloud filter. */ struct virtchnl_l4_spec { u8 src_mac[ETH_ALEN]; u8 dst_mac[ETH_ALEN]; __be16 vlan_id; __be16 pad; /* reserved for future use */ __be32 src_ip[4]; __be32 dst_ip[4]; __be16 src_port; __be16 dst_port; }; VIRTCHNL_CHECK_STRUCT_LEN(52, virtchnl_l4_spec); union virtchnl_flow_spec { struct virtchnl_l4_spec tcp_spec; u8 buffer[128]; /* reserved for future use */ }; VIRTCHNL_CHECK_UNION_LEN(128, virtchnl_flow_spec); enum virtchnl_action { /* action types */ VIRTCHNL_ACTION_DROP = 0, VIRTCHNL_ACTION_TC_REDIRECT, VIRTCHNL_ACTION_PASSTHRU, VIRTCHNL_ACTION_QUEUE, VIRTCHNL_ACTION_Q_REGION, VIRTCHNL_ACTION_MARK, VIRTCHNL_ACTION_COUNT, }; enum virtchnl_flow_type { /* flow types */ VIRTCHNL_TCP_V4_FLOW = 0, VIRTCHNL_TCP_V6_FLOW, }; struct virtchnl_filter { union virtchnl_flow_spec data; union virtchnl_flow_spec mask; enum virtchnl_flow_type flow_type; enum virtchnl_action action; u32 action_meta; u8 field_flags; u8 pad[3]; }; VIRTCHNL_CHECK_STRUCT_LEN(272, virtchnl_filter); /* VIRTCHNL_OP_EVENT * PF sends this message to inform the VF driver of events that may affect it. * No direct response is expected from the VF, though it may generate other * messages in response to this one. */ enum virtchnl_event_codes { VIRTCHNL_EVENT_UNKNOWN = 0, VIRTCHNL_EVENT_LINK_CHANGE, VIRTCHNL_EVENT_RESET_IMPENDING, VIRTCHNL_EVENT_PF_DRIVER_CLOSE, }; #define PF_EVENT_SEVERITY_INFO 0 #define PF_EVENT_SEVERITY_CERTAIN_DOOM 255 struct virtchnl_pf_event { enum virtchnl_event_codes event; union { /* If the PF driver does not support the new speed reporting * capabilities then use link_event else use link_event_adv to * get the speed and link information. The ability to understand * new speeds is indicated by setting the capability flag * VIRTCHNL_VF_CAP_ADV_LINK_SPEED in vf_cap_flags parameter * in virtchnl_vf_resource struct and can be used to determine * which link event struct to use below. */ struct { enum virtchnl_link_speed link_speed; bool link_status; } link_event; struct { /* link_speed provided in Mbps */ u32 link_speed; u8 link_status; u8 pad[3]; } link_event_adv; } event_data; int severity; }; VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_pf_event); /* VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP * VF uses this message to request PF to map IWARP vectors to IWARP queues. * The request for this originates from the VF IWARP driver through * a client interface between VF LAN and VF IWARP driver. * A vector could have an AEQ and CEQ attached to it although * there is a single AEQ per VF IWARP instance in which case * most vectors will have an INVALID_IDX for aeq and valid idx for ceq. * There will never be a case where there will be multiple CEQs attached * to a single vector. * PF configures interrupt mapping and returns status. */ struct virtchnl_iwarp_qv_info { u32 v_idx; /* msix_vector */ u16 ceq_idx; u16 aeq_idx; u8 itr_idx; u8 pad[3]; }; VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_iwarp_qv_info); struct virtchnl_iwarp_qvlist_info { u32 num_vectors; struct virtchnl_iwarp_qv_info qv_info[1]; }; VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_iwarp_qvlist_info); /* VF reset states - these are written into the RSTAT register: * VFGEN_RSTAT on the VF * When the PF initiates a reset, it writes 0 * When the reset is complete, it writes 1 * When the PF detects that the VF has recovered, it writes 2 * VF checks this register periodically to determine if a reset has occurred, * then polls it to know when the reset is complete. * If either the PF or VF reads the register while the hardware * is in a reset state, it will return DEADBEEF, which, when masked * will result in 3. */ enum virtchnl_vfr_states { VIRTCHNL_VFR_INPROGRESS = 0, VIRTCHNL_VFR_COMPLETED, VIRTCHNL_VFR_VFACTIVE, }; /* Type of RSS algorithm */ enum virtchnl_rss_algorithm { VIRTCHNL_RSS_ALG_TOEPLITZ_ASYMMETRIC = 0, VIRTCHNL_RSS_ALG_R_ASYMMETRIC = 1, VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC = 2, VIRTCHNL_RSS_ALG_XOR_SYMMETRIC = 3, }; #define VIRTCHNL_MAX_NUM_PROTO_HDRS 32 #define PROTO_HDR_SHIFT 5 #define PROTO_HDR_FIELD_START(proto_hdr_type) ((proto_hdr_type) << PROTO_HDR_SHIFT) #define PROTO_HDR_FIELD_MASK ((1UL << PROTO_HDR_SHIFT) - 1) /* VF use these macros to configure each protocol header. * Specify which protocol headers and protocol header fields base on * virtchnl_proto_hdr_type and virtchnl_proto_hdr_field. * @param hdr: a struct of virtchnl_proto_hdr * @param hdr_type: ETH/IPV4/TCP, etc * @param field: SRC/DST/TEID/SPI, etc */ #define VIRTCHNL_ADD_PROTO_HDR_FIELD(hdr, field) \ ((hdr)->field_selector |= BIT((field) & PROTO_HDR_FIELD_MASK)) #define VIRTCHNL_DEL_PROTO_HDR_FIELD(hdr, field) \ ((hdr)->field_selector &= ~BIT((field) & PROTO_HDR_FIELD_MASK)) #define VIRTCHNL_TEST_PROTO_HDR_FIELD(hdr, val) \ ((hdr)->field_selector & BIT((val) & PROTO_HDR_FIELD_MASK)) #define VIRTCHNL_GET_PROTO_HDR_FIELD(hdr) ((hdr)->field_selector) #define VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, hdr_type, field) \ (VIRTCHNL_ADD_PROTO_HDR_FIELD(hdr, \ VIRTCHNL_PROTO_HDR_ ## hdr_type ## _ ## field)) #define VIRTCHNL_DEL_PROTO_HDR_FIELD_BIT(hdr, hdr_type, field) \ (VIRTCHNL_DEL_PROTO_HDR_FIELD(hdr, \ VIRTCHNL_PROTO_HDR_ ## hdr_type ## _ ## field)) #define VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, hdr_type) \ ((hdr)->type = VIRTCHNL_PROTO_HDR_ ## hdr_type) #define VIRTCHNL_GET_PROTO_HDR_TYPE(hdr) \ (((hdr)->type) >> PROTO_HDR_SHIFT) #define VIRTCHNL_TEST_PROTO_HDR_TYPE(hdr, val) \ ((hdr)->type == ((val) >> PROTO_HDR_SHIFT)) #define VIRTCHNL_TEST_PROTO_HDR(hdr, val) \ (VIRTCHNL_TEST_PROTO_HDR_TYPE((hdr), (val)) && \ VIRTCHNL_TEST_PROTO_HDR_FIELD((hdr), (val))) /* Protocol header type within a packet segment. A segment consists of one or * more protocol headers that make up a logical group of protocol headers. Each * logical group of protocol headers encapsulates or is encapsulated using/by * tunneling or encapsulation protocols for network virtualization. */ enum virtchnl_proto_hdr_type { VIRTCHNL_PROTO_HDR_NONE, VIRTCHNL_PROTO_HDR_ETH, VIRTCHNL_PROTO_HDR_S_VLAN, VIRTCHNL_PROTO_HDR_C_VLAN, VIRTCHNL_PROTO_HDR_IPV4, VIRTCHNL_PROTO_HDR_IPV6, VIRTCHNL_PROTO_HDR_TCP, VIRTCHNL_PROTO_HDR_UDP, VIRTCHNL_PROTO_HDR_SCTP, VIRTCHNL_PROTO_HDR_GTPU_IP, VIRTCHNL_PROTO_HDR_GTPU_EH, VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN, VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP, VIRTCHNL_PROTO_HDR_PPPOE, VIRTCHNL_PROTO_HDR_L2TPV3, VIRTCHNL_PROTO_HDR_ESP, VIRTCHNL_PROTO_HDR_AH, VIRTCHNL_PROTO_HDR_PFCP, }; /* Protocol header field within a protocol header. */ enum virtchnl_proto_hdr_field { /* ETHER */ VIRTCHNL_PROTO_HDR_ETH_SRC = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ETH), VIRTCHNL_PROTO_HDR_ETH_DST, VIRTCHNL_PROTO_HDR_ETH_ETHERTYPE, /* S-VLAN */ VIRTCHNL_PROTO_HDR_S_VLAN_ID = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_S_VLAN), /* C-VLAN */ VIRTCHNL_PROTO_HDR_C_VLAN_ID = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_C_VLAN), /* IPV4 */ VIRTCHNL_PROTO_HDR_IPV4_SRC = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4), VIRTCHNL_PROTO_HDR_IPV4_DST, VIRTCHNL_PROTO_HDR_IPV4_DSCP, VIRTCHNL_PROTO_HDR_IPV4_TTL, VIRTCHNL_PROTO_HDR_IPV4_PROT, /* IPV6 */ VIRTCHNL_PROTO_HDR_IPV6_SRC = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6), VIRTCHNL_PROTO_HDR_IPV6_DST, VIRTCHNL_PROTO_HDR_IPV6_TC, VIRTCHNL_PROTO_HDR_IPV6_HOP_LIMIT, VIRTCHNL_PROTO_HDR_IPV6_PROT, /* TCP */ VIRTCHNL_PROTO_HDR_TCP_SRC_PORT = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_TCP), VIRTCHNL_PROTO_HDR_TCP_DST_PORT, /* UDP */ VIRTCHNL_PROTO_HDR_UDP_SRC_PORT = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_UDP), VIRTCHNL_PROTO_HDR_UDP_DST_PORT, /* SCTP */ VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_SCTP), VIRTCHNL_PROTO_HDR_SCTP_DST_PORT, /* GTPU_IP */ VIRTCHNL_PROTO_HDR_GTPU_IP_TEID = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_IP), /* GTPU_EH */ VIRTCHNL_PROTO_HDR_GTPU_EH_PDU = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_EH), VIRTCHNL_PROTO_HDR_GTPU_EH_QFI, /* PPPOE */ VIRTCHNL_PROTO_HDR_PPPOE_SESS_ID = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_PPPOE), /* L2TPV3 */ VIRTCHNL_PROTO_HDR_L2TPV3_SESS_ID = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_L2TPV3), /* ESP */ VIRTCHNL_PROTO_HDR_ESP_SPI = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ESP), /* AH */ VIRTCHNL_PROTO_HDR_AH_SPI = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_AH), /* PFCP */ VIRTCHNL_PROTO_HDR_PFCP_S_FIELD = PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_PFCP), VIRTCHNL_PROTO_HDR_PFCP_SEID, }; struct virtchnl_proto_hdr { enum virtchnl_proto_hdr_type type; u32 field_selector; /* a bit mask to select field for header type */ u8 buffer[64]; /** * binary buffer in network order for specific header type. * For example, if type = VIRTCHNL_PROTO_HDR_IPV4, a IPv4 * header is expected to be copied into the buffer. */ }; VIRTCHNL_CHECK_STRUCT_LEN(72, virtchnl_proto_hdr); struct virtchnl_proto_hdrs { u8 tunnel_level; u8 pad[3]; /** * specify where protocol header start from. * 0 - from the outer layer * 1 - from the first inner layer * 2 - from the second inner layer * .... **/ int count; /* the proto layers must < VIRTCHNL_MAX_NUM_PROTO_HDRS */ struct virtchnl_proto_hdr proto_hdr[VIRTCHNL_MAX_NUM_PROTO_HDRS]; }; VIRTCHNL_CHECK_STRUCT_LEN(2312, virtchnl_proto_hdrs); struct virtchnl_rss_cfg { struct virtchnl_proto_hdrs proto_hdrs; /* protocol headers */ enum virtchnl_rss_algorithm rss_algorithm; /* RSS algorithm type */ u8 reserved[128]; /* reserve for future */ }; VIRTCHNL_CHECK_STRUCT_LEN(2444, virtchnl_rss_cfg); /* action configuration for FDIR */ struct virtchnl_filter_action { enum virtchnl_action type; union { /* used for queue and qgroup action */ struct { u16 index; u8 region; } queue; /* used for count action */ struct { /* share counter ID with other flow rules */ u8 shared; u32 id; /* counter ID */ } count; /* used for mark action */ u32 mark_id; u8 reserve[32]; } act_conf; }; VIRTCHNL_CHECK_STRUCT_LEN(36, virtchnl_filter_action); #define VIRTCHNL_MAX_NUM_ACTIONS 8 struct virtchnl_filter_action_set { /* action number must be less then VIRTCHNL_MAX_NUM_ACTIONS */ int count; struct virtchnl_filter_action actions[VIRTCHNL_MAX_NUM_ACTIONS]; }; VIRTCHNL_CHECK_STRUCT_LEN(292, virtchnl_filter_action_set); /* pattern and action for FDIR rule */ struct virtchnl_fdir_rule { struct virtchnl_proto_hdrs proto_hdrs; struct virtchnl_filter_action_set action_set; }; VIRTCHNL_CHECK_STRUCT_LEN(2604, virtchnl_fdir_rule); /* Status returned to VF after VF requests FDIR commands * VIRTCHNL_FDIR_SUCCESS * VF FDIR related request is successfully done by PF * The request can be OP_ADD/DEL. * * VIRTCHNL_FDIR_FAILURE_RULE_NORESOURCE * OP_ADD_FDIR_FILTER request is failed due to no Hardware resource. * * VIRTCHNL_FDIR_FAILURE_RULE_EXIST * OP_ADD_FDIR_FILTER request is failed due to the rule is already existed. * * VIRTCHNL_FDIR_FAILURE_RULE_CONFLICT * OP_ADD_FDIR_FILTER request is failed due to conflict with existing rule. * * VIRTCHNL_FDIR_FAILURE_RULE_NONEXIST * OP_DEL_FDIR_FILTER request is failed due to this rule doesn't exist. * * VIRTCHNL_FDIR_FAILURE_RULE_INVALID * OP_ADD_FDIR_FILTER request is failed due to parameters validation * or HW doesn't support. * * VIRTCHNL_FDIR_FAILURE_RULE_TIMEOUT * OP_ADD/DEL_FDIR_FILTER request is failed due to timing out * for programming. */ enum virtchnl_fdir_prgm_status { VIRTCHNL_FDIR_SUCCESS = 0, VIRTCHNL_FDIR_FAILURE_RULE_NORESOURCE, VIRTCHNL_FDIR_FAILURE_RULE_EXIST, VIRTCHNL_FDIR_FAILURE_RULE_CONFLICT, VIRTCHNL_FDIR_FAILURE_RULE_NONEXIST, VIRTCHNL_FDIR_FAILURE_RULE_INVALID, VIRTCHNL_FDIR_FAILURE_RULE_TIMEOUT, }; /* VIRTCHNL_OP_ADD_FDIR_FILTER * VF sends this request to PF by filling out vsi_id, * validate_only and rule_cfg. PF will return flow_id * if the request is successfully done and return add_status to VF. */ struct virtchnl_fdir_add { u16 vsi_id; /* INPUT */ /* * 1 for validating a fdir rule, 0 for creating a fdir rule. * Validate and create share one ops: VIRTCHNL_OP_ADD_FDIR_FILTER. */ u16 validate_only; /* INPUT */ u32 flow_id; /* OUTPUT */ struct virtchnl_fdir_rule rule_cfg; /* INPUT */ enum virtchnl_fdir_prgm_status status; /* OUTPUT */ }; VIRTCHNL_CHECK_STRUCT_LEN(2616, virtchnl_fdir_add); /* VIRTCHNL_OP_DEL_FDIR_FILTER * VF sends this request to PF by filling out vsi_id * and flow_id. PF will return del_status to VF. */ struct virtchnl_fdir_del { u16 vsi_id; /* INPUT */ u16 pad; u32 flow_id; /* INPUT */ enum virtchnl_fdir_prgm_status status; /* OUTPUT */ }; VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_fdir_del); /** * virtchnl_vc_validate_vf_msg * @ver: Virtchnl version info * @v_opcode: Opcode for the message * @msg: pointer to the msg buffer * @msglen: msg length * * validate msg format against struct for each opcode */ static inline int virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode, u8 *msg, u16 msglen) { bool err_msg_format = false; int valid_len = 0; /* Validate message length. */ switch (v_opcode) { case VIRTCHNL_OP_VERSION: valid_len = sizeof(struct virtchnl_version_info); break; case VIRTCHNL_OP_RESET_VF: break; case VIRTCHNL_OP_GET_VF_RESOURCES: if (VF_IS_V11(ver)) valid_len = sizeof(u32); break; case VIRTCHNL_OP_CONFIG_TX_QUEUE: valid_len = sizeof(struct virtchnl_txq_info); break; case VIRTCHNL_OP_CONFIG_RX_QUEUE: valid_len = sizeof(struct virtchnl_rxq_info); break; case VIRTCHNL_OP_CONFIG_VSI_QUEUES: valid_len = sizeof(struct virtchnl_vsi_queue_config_info); if (msglen >= valid_len) { struct virtchnl_vsi_queue_config_info *vqc = (struct virtchnl_vsi_queue_config_info *)msg; valid_len += (vqc->num_queue_pairs * sizeof(struct virtchnl_queue_pair_info)); if (vqc->num_queue_pairs == 0) err_msg_format = true; } break; case VIRTCHNL_OP_CONFIG_IRQ_MAP: valid_len = sizeof(struct virtchnl_irq_map_info); if (msglen >= valid_len) { struct virtchnl_irq_map_info *vimi = (struct virtchnl_irq_map_info *)msg; valid_len += (vimi->num_vectors * sizeof(struct virtchnl_vector_map)); if (vimi->num_vectors == 0) err_msg_format = true; } break; case VIRTCHNL_OP_ENABLE_QUEUES: case VIRTCHNL_OP_DISABLE_QUEUES: valid_len = sizeof(struct virtchnl_queue_select); break; case VIRTCHNL_OP_ADD_ETH_ADDR: case VIRTCHNL_OP_DEL_ETH_ADDR: valid_len = sizeof(struct virtchnl_ether_addr_list); if (msglen >= valid_len) { struct virtchnl_ether_addr_list *veal = (struct virtchnl_ether_addr_list *)msg; valid_len += veal->num_elements * sizeof(struct virtchnl_ether_addr); if (veal->num_elements == 0) err_msg_format = true; } break; case VIRTCHNL_OP_ADD_VLAN: case VIRTCHNL_OP_DEL_VLAN: valid_len = sizeof(struct virtchnl_vlan_filter_list); if (msglen >= valid_len) { struct virtchnl_vlan_filter_list *vfl = (struct virtchnl_vlan_filter_list *)msg; valid_len += vfl->num_elements * sizeof(u16); if (vfl->num_elements == 0) err_msg_format = true; } break; case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: valid_len = sizeof(struct virtchnl_promisc_info); break; case VIRTCHNL_OP_GET_STATS: valid_len = sizeof(struct virtchnl_queue_select); break; case VIRTCHNL_OP_IWARP: /* These messages are opaque to us and will be validated in * the RDMA client code. We just need to check for nonzero * length. The firmware will enforce max length restrictions. */ if (msglen) valid_len = msglen; else err_msg_format = true; break; case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP: break; case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP: valid_len = sizeof(struct virtchnl_iwarp_qvlist_info); if (msglen >= valid_len) { struct virtchnl_iwarp_qvlist_info *qv = (struct virtchnl_iwarp_qvlist_info *)msg; if (qv->num_vectors == 0) { err_msg_format = true; break; } valid_len += ((qv->num_vectors - 1) * sizeof(struct virtchnl_iwarp_qv_info)); } break; case VIRTCHNL_OP_CONFIG_RSS_KEY: valid_len = sizeof(struct virtchnl_rss_key); if (msglen >= valid_len) { struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg; valid_len += vrk->key_len - 1; } break; case VIRTCHNL_OP_CONFIG_RSS_LUT: valid_len = sizeof(struct virtchnl_rss_lut); if (msglen >= valid_len) { struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg; valid_len += vrl->lut_entries - 1; } break; case VIRTCHNL_OP_GET_RSS_HENA_CAPS: break; case VIRTCHNL_OP_SET_RSS_HENA: valid_len = sizeof(struct virtchnl_rss_hena); break; case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING: case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING: break; case VIRTCHNL_OP_REQUEST_QUEUES: valid_len = sizeof(struct virtchnl_vf_res_request); break; case VIRTCHNL_OP_ENABLE_CHANNELS: valid_len = sizeof(struct virtchnl_tc_info); if (msglen >= valid_len) { struct virtchnl_tc_info *vti = (struct virtchnl_tc_info *)msg; valid_len += (vti->num_tc - 1) * sizeof(struct virtchnl_channel_info); if (vti->num_tc == 0) err_msg_format = true; } break; case VIRTCHNL_OP_DISABLE_CHANNELS: break; case VIRTCHNL_OP_ADD_CLOUD_FILTER: valid_len = sizeof(struct virtchnl_filter); break; case VIRTCHNL_OP_DEL_CLOUD_FILTER: valid_len = sizeof(struct virtchnl_filter); break; case VIRTCHNL_OP_ADD_RSS_CFG: case VIRTCHNL_OP_DEL_RSS_CFG: valid_len = sizeof(struct virtchnl_rss_cfg); break; case VIRTCHNL_OP_ADD_FDIR_FILTER: valid_len = sizeof(struct virtchnl_fdir_add); break; case VIRTCHNL_OP_DEL_FDIR_FILTER: valid_len = sizeof(struct virtchnl_fdir_del); break; /* These are always errors coming from the VF. */ case VIRTCHNL_OP_EVENT: case VIRTCHNL_OP_UNKNOWN: default: return VIRTCHNL_STATUS_ERR_PARAM; } /* few more checks */ if (err_msg_format || valid_len != msglen) return VIRTCHNL_STATUS_ERR_OPCODE_MISMATCH; return 0; } #endif /* _VIRTCHNL_H_ */ PK ! ��V�� � devpts_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* -*- linux-c -*- --------------------------------------------------------- * * * linux/include/linux/devpts_fs.h * * Copyright 1998-2004 H. Peter Anvin -- All Rights Reserved * * ------------------------------------------------------------------------- */ #ifndef _LINUX_DEVPTS_FS_H #define _LINUX_DEVPTS_FS_H #include <linux/errno.h> #ifdef CONFIG_UNIX98_PTYS struct pts_fs_info; struct vfsmount *devpts_mntget(struct file *, struct pts_fs_info *); struct pts_fs_info *devpts_acquire(struct file *); void devpts_release(struct pts_fs_info *); int devpts_new_index(struct pts_fs_info *); void devpts_kill_index(struct pts_fs_info *, int); /* mknod in devpts */ struct dentry *devpts_pty_new(struct pts_fs_info *, int, void *); /* get private structure */ void *devpts_get_priv(struct dentry *); /* unlink */ void devpts_pty_kill(struct dentry *); /* in pty.c */ int ptm_open_peer(struct file *master, struct tty_struct *tty, int flags); #else static inline int ptm_open_peer(struct file *master, struct tty_struct *tty, int flags) { return -EIO; } #endif #endif /* _LINUX_DEVPTS_FS_H */ PK ! �&�j� � if_tap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IF_TAP_H_ #define _LINUX_IF_TAP_H_ #if IS_ENABLED(CONFIG_TAP) struct socket *tap_get_socket(struct file *); struct ptr_ring *tap_get_ptr_ring(struct file *file); #else #include <linux/err.h> #include <linux/errno.h> struct file; struct socket; static inline struct socket *tap_get_socket(struct file *f) { return ERR_PTR(-EINVAL); } static inline struct ptr_ring *tap_get_ptr_ring(struct file *f) { return ERR_PTR(-EINVAL); } #endif /* CONFIG_TAP */ #include <net/sock.h> #include <linux/skb_array.h> /* * Maximum times a tap device can be opened. This can be used to * configure the number of receive queue, e.g. for multiqueue virtio. */ #define MAX_TAP_QUEUES 256 struct tap_queue; struct tap_dev { struct net_device *dev; u16 flags; /* This array tracks active taps. */ struct tap_queue __rcu *taps[MAX_TAP_QUEUES]; /* This list tracks all taps (both enabled and disabled) */ struct list_head queue_list; int numvtaps; int numqueues; netdev_features_t tap_features; int minor; void (*update_features)(struct tap_dev *tap, netdev_features_t features); void (*count_tx_dropped)(struct tap_dev *tap); void (*count_rx_dropped)(struct tap_dev *tap); }; /* * A tap queue is the central object of tap module, it connects * an open character device to virtual interface. There can be * multiple queues on one interface, which map back to queues * implemented in hardware on the underlying device. * * tap_proto is used to allocate queues through the sock allocation * mechanism. * */ struct tap_queue { struct sock sk; struct socket sock; int vnet_hdr_sz; struct tap_dev __rcu *tap; struct file *file; unsigned int flags; u16 queue_index; bool enabled; struct list_head next; struct ptr_ring ring; }; rx_handler_result_t tap_handle_frame(struct sk_buff **pskb); void tap_del_queues(struct tap_dev *tap); int tap_get_minor(dev_t major, struct tap_dev *tap); void tap_free_minor(dev_t major, struct tap_dev *tap); int tap_queue_resize(struct tap_dev *tap); int tap_create_cdev(struct cdev *tap_cdev, dev_t *tap_major, const char *device_name, struct module *module); void tap_destroy_cdev(dev_t major, struct cdev *tap_cdev); #endif /*_LINUX_IF_TAP_H_*/ PK ! 3�� � of_device.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_OF_DEVICE_H #define _LINUX_OF_DEVICE_H #include <linux/cpu.h> #include <linux/platform_device.h> #include <linux/of_platform.h> /* temporary until merge */ #include <linux/of.h> #include <linux/mod_devicetable.h> struct device; #ifdef CONFIG_OF extern const struct of_device_id *of_match_device( const struct of_device_id *matches, const struct device *dev); /** * of_driver_match_device - Tell if a driver's of_match_table matches a device. * @drv: the device_driver structure to test * @dev: the device structure to match against */ static inline int of_driver_match_device(struct device *dev, const struct device_driver *drv) { return of_match_device(drv->of_match_table, dev) != NULL; } extern int of_device_add(struct platform_device *pdev); extern int of_device_register(struct platform_device *ofdev); extern void of_device_unregister(struct platform_device *ofdev); extern const void *of_device_get_match_data(const struct device *dev); extern ssize_t of_device_modalias(struct device *dev, char *str, ssize_t len); extern int of_device_request_module(struct device *dev); extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env); extern int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env); static inline struct device_node *of_cpu_device_node_get(int cpu) { struct device *cpu_dev; cpu_dev = get_cpu_device(cpu); if (!cpu_dev) return of_get_cpu_node(cpu, NULL); return of_node_get(cpu_dev->of_node); } int of_dma_configure_id(struct device *dev, struct device_node *np, bool force_dma, const u32 *id); static inline int of_dma_configure(struct device *dev, struct device_node *np, bool force_dma) { return of_dma_configure_id(dev, np, force_dma, NULL); } #else /* CONFIG_OF */ static inline int of_driver_match_device(struct device *dev, const struct device_driver *drv) { return 0; } static inline void of_device_uevent(struct device *dev, struct kobj_uevent_env *env) { } static inline const void *of_device_get_match_data(const struct device *dev) { return NULL; } static inline int of_device_modalias(struct device *dev, char *str, ssize_t len) { return -ENODEV; } static inline int of_device_request_module(struct device *dev) { return -ENODEV; } static inline int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env) { return -ENODEV; } static inline const struct of_device_id *of_match_device( const struct of_device_id *matches, const struct device *dev) { return NULL; } static inline struct device_node *of_cpu_device_node_get(int cpu) { return NULL; } static inline int of_dma_configure_id(struct device *dev, struct device_node *np, bool force_dma, const u32 *id) { return 0; } static inline int of_dma_configure(struct device *dev, struct device_node *np, bool force_dma) { return 0; } #endif /* CONFIG_OF */ #endif /* _LINUX_OF_DEVICE_H */ PK ! ����� � ext2_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/ext2_fs.h * * Copyright (C) 1992, 1993, 1994, 1995 * Remy Card (card@masi.ibp.fr) * Laboratoire MASI - Institut Blaise Pascal * Universite Pierre et Marie Curie (Paris VI) * * from * * linux/include/linux/minix_fs.h * * Copyright (C) 1991, 1992 Linus Torvalds */ #ifndef _LINUX_EXT2_FS_H #define _LINUX_EXT2_FS_H #include <linux/types.h> #include <linux/magic.h> #define EXT2_NAME_LEN 255 /* * Maximal count of links to a file */ #define EXT2_LINK_MAX 32000 #define EXT2_SB_MAGIC_OFFSET 0x38 #define EXT2_SB_BLOCKS_OFFSET 0x04 #define EXT2_SB_BSIZE_OFFSET 0x18 static inline u64 ext2_image_size(void *ext2_sb) { __u8 *p = ext2_sb; if (*(__le16 *)(p + EXT2_SB_MAGIC_OFFSET) != cpu_to_le16(EXT2_SUPER_MAGIC)) return 0; return (u64)le32_to_cpup((__le32 *)(p + EXT2_SB_BLOCKS_OFFSET)) << le32_to_cpup((__le32 *)(p + EXT2_SB_BSIZE_OFFSET)); } #endif /* _LINUX_EXT2_FS_H */ PK ! ��#�4 4 ntb_transport.hnu �[��� /* * This file is provided under a dual BSD/GPLv2 license. When using or * redistributing this file, you may do so under either license. * * GPL LICENSE SUMMARY * * Copyright(c) 2012 Intel Corporation. All rights reserved. * Copyright (C) 2015 EMC Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * BSD LICENSE * * Copyright(c) 2012 Intel Corporation. All rights reserved. * Copyright (C) 2015 EMC Corporation. All Rights Reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copy * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * PCIe NTB Transport Linux driver * * Contact Information: * Jon Mason <jon.mason@intel.com> */ struct ntb_transport_qp; struct ntb_transport_client { struct device_driver driver; int (*probe)(struct device *client_dev); void (*remove)(struct device *client_dev); }; int ntb_transport_register_client(struct ntb_transport_client *drvr); void ntb_transport_unregister_client(struct ntb_transport_client *drvr); int ntb_transport_register_client_dev(char *device_name); void ntb_transport_unregister_client_dev(char *device_name); struct ntb_queue_handlers { void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data, void *data, int len); void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data, void *data, int len); void (*event_handler)(void *data, int status); }; unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp); unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp); struct ntb_transport_qp * ntb_transport_create_queue(void *data, struct device *client_dev, const struct ntb_queue_handlers *handlers); void ntb_transport_free_queue(struct ntb_transport_qp *qp); int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data, unsigned int len); int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data, unsigned int len); void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len); void ntb_transport_link_up(struct ntb_transport_qp *qp); void ntb_transport_link_down(struct ntb_transport_qp *qp); bool ntb_transport_link_query(struct ntb_transport_qp *qp); unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp); PK ! Z"` asn1_ber_bytecode.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* ASN.1 BER/DER/CER parsing state machine internal definitions * * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_ASN1_BER_BYTECODE_H #define _LINUX_ASN1_BER_BYTECODE_H #ifdef __KERNEL__ #include <linux/types.h> #endif #include <linux/asn1.h> typedef int (*asn1_action_t)(void *context, size_t hdrlen, /* In case of ANY type */ unsigned char tag, /* In case of ANY type */ const void *value, size_t vlen); struct asn1_decoder { const unsigned char *machine; size_t machlen; const asn1_action_t *actions; }; enum asn1_opcode { /* The tag-matching ops come first and the odd-numbered slots * are for OR_SKIP ops. */ #define ASN1_OP_MATCH__SKIP 0x01 #define ASN1_OP_MATCH__ACT 0x02 #define ASN1_OP_MATCH__JUMP 0x04 #define ASN1_OP_MATCH__ANY 0x08 #define ASN1_OP_MATCH__COND 0x10 ASN1_OP_MATCH = 0x00, ASN1_OP_MATCH_OR_SKIP = 0x01, ASN1_OP_MATCH_ACT = 0x02, ASN1_OP_MATCH_ACT_OR_SKIP = 0x03, ASN1_OP_MATCH_JUMP = 0x04, ASN1_OP_MATCH_JUMP_OR_SKIP = 0x05, ASN1_OP_MATCH_ANY = 0x08, ASN1_OP_MATCH_ANY_OR_SKIP = 0x09, ASN1_OP_MATCH_ANY_ACT = 0x0a, ASN1_OP_MATCH_ANY_ACT_OR_SKIP = 0x0b, /* Everything before here matches unconditionally */ ASN1_OP_COND_MATCH_OR_SKIP = 0x11, ASN1_OP_COND_MATCH_ACT_OR_SKIP = 0x13, ASN1_OP_COND_MATCH_JUMP_OR_SKIP = 0x15, ASN1_OP_COND_MATCH_ANY = 0x18, ASN1_OP_COND_MATCH_ANY_OR_SKIP = 0x19, ASN1_OP_COND_MATCH_ANY_ACT = 0x1a, ASN1_OP_COND_MATCH_ANY_ACT_OR_SKIP = 0x1b, /* Everything before here will want a tag from the data */ #define ASN1_OP__MATCHES_TAG ASN1_OP_COND_MATCH_ANY_ACT_OR_SKIP /* These are here to help fill up space */ ASN1_OP_COND_FAIL = 0x1c, ASN1_OP_COMPLETE = 0x1d, ASN1_OP_ACT = 0x1e, ASN1_OP_MAYBE_ACT = 0x1f, /* The following eight have bit 0 -> SET, 1 -> OF, 2 -> ACT */ ASN1_OP_END_SEQ = 0x20, ASN1_OP_END_SET = 0x21, ASN1_OP_END_SEQ_OF = 0x22, ASN1_OP_END_SET_OF = 0x23, ASN1_OP_END_SEQ_ACT = 0x24, ASN1_OP_END_SET_ACT = 0x25, ASN1_OP_END_SEQ_OF_ACT = 0x26, ASN1_OP_END_SET_OF_ACT = 0x27, #define ASN1_OP_END__SET 0x01 #define ASN1_OP_END__OF 0x02 #define ASN1_OP_END__ACT 0x04 ASN1_OP_RETURN = 0x28, ASN1_OP__NR }; #define _tag(CLASS, CP, TAG) ((ASN1_##CLASS << 6) | (ASN1_##CP << 5) | ASN1_##TAG) #define _tagn(CLASS, CP, TAG) ((ASN1_##CLASS << 6) | (ASN1_##CP << 5) | TAG) #define _jump_target(N) (N) #define _action(N) (N) #endif /* _LINUX_ASN1_BER_BYTECODE_H */ PK ! z�7M�: �: ptrace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PTRACE_H #define _LINUX_PTRACE_H #include <linux/compiler.h> /* For unlikely. */ #include <linux/sched.h> /* For struct task_struct. */ #include <linux/sched/signal.h> /* For send_sig(), same_thread_group(), etc. */ #include <linux/err.h> /* for IS_ERR_VALUE */ #include <linux/bug.h> /* For BUG_ON. */ #include <linux/pid_namespace.h> /* For task_active_pid_ns. */ #include <uapi/linux/ptrace.h> #include <linux/seccomp.h> /* Add sp to seccomp_data, as seccomp is user API, we don't want to modify it */ struct syscall_info { __u64 sp; struct seccomp_data data; }; extern int ptrace_access_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, unsigned int gup_flags); /* * Ptrace flags * * The owner ship rules for task->ptrace which holds the ptrace * flags is simple. When a task is running it owns it's task->ptrace * flags. When the a task is stopped the ptracer owns task->ptrace. */ #define PT_SEIZED 0x00010000 /* SEIZE used, enable new behavior */ #define PT_PTRACED 0x00000001 #define PT_OPT_FLAG_SHIFT 3 /* PT_TRACE_* event enable flags */ #define PT_EVENT_FLAG(event) (1 << (PT_OPT_FLAG_SHIFT + (event))) #define PT_TRACESYSGOOD PT_EVENT_FLAG(0) #define PT_TRACE_FORK PT_EVENT_FLAG(PTRACE_EVENT_FORK) #define PT_TRACE_VFORK PT_EVENT_FLAG(PTRACE_EVENT_VFORK) #define PT_TRACE_CLONE PT_EVENT_FLAG(PTRACE_EVENT_CLONE) #define PT_TRACE_EXEC PT_EVENT_FLAG(PTRACE_EVENT_EXEC) #define PT_TRACE_VFORK_DONE PT_EVENT_FLAG(PTRACE_EVENT_VFORK_DONE) #define PT_TRACE_EXIT PT_EVENT_FLAG(PTRACE_EVENT_EXIT) #define PT_TRACE_SECCOMP PT_EVENT_FLAG(PTRACE_EVENT_SECCOMP) #define PT_EXITKILL (PTRACE_O_EXITKILL << PT_OPT_FLAG_SHIFT) #define PT_SUSPEND_SECCOMP (PTRACE_O_SUSPEND_SECCOMP << PT_OPT_FLAG_SHIFT) extern long arch_ptrace(struct task_struct *child, long request, unsigned long addr, unsigned long data); extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __user *dst, int len); extern int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long dst, int len); extern void ptrace_disable(struct task_struct *); extern int ptrace_request(struct task_struct *child, long request, unsigned long addr, unsigned long data); extern void ptrace_notify(int exit_code); extern void __ptrace_link(struct task_struct *child, struct task_struct *new_parent, const struct cred *ptracer_cred); extern void __ptrace_unlink(struct task_struct *child); extern void exit_ptrace(struct task_struct *tracer, struct list_head *dead); #define PTRACE_MODE_READ 0x01 #define PTRACE_MODE_ATTACH 0x02 #define PTRACE_MODE_NOAUDIT 0x04 #define PTRACE_MODE_FSCREDS 0x08 #define PTRACE_MODE_REALCREDS 0x10 /* shorthands for READ/ATTACH and FSCREDS/REALCREDS combinations */ #define PTRACE_MODE_READ_FSCREDS (PTRACE_MODE_READ | PTRACE_MODE_FSCREDS) #define PTRACE_MODE_READ_REALCREDS (PTRACE_MODE_READ | PTRACE_MODE_REALCREDS) #define PTRACE_MODE_ATTACH_FSCREDS (PTRACE_MODE_ATTACH | PTRACE_MODE_FSCREDS) #define PTRACE_MODE_ATTACH_REALCREDS (PTRACE_MODE_ATTACH | PTRACE_MODE_REALCREDS) /** * ptrace_may_access - check whether the caller is permitted to access * a target task. * @task: target task * @mode: selects type of access and caller credentials * * Returns true on success, false on denial. * * One of the flags PTRACE_MODE_FSCREDS and PTRACE_MODE_REALCREDS must * be set in @mode to specify whether the access was requested through * a filesystem syscall (should use effective capabilities and fsuid * of the caller) or through an explicit syscall such as * process_vm_writev or ptrace (and should use the real credentials). */ extern bool ptrace_may_access(struct task_struct *task, unsigned int mode); static inline int ptrace_reparented(struct task_struct *child) { return !same_thread_group(child->real_parent, child->parent); } static inline void ptrace_unlink(struct task_struct *child) { if (unlikely(child->ptrace)) __ptrace_unlink(child); } int generic_ptrace_peekdata(struct task_struct *tsk, unsigned long addr, unsigned long data); int generic_ptrace_pokedata(struct task_struct *tsk, unsigned long addr, unsigned long data); /** * ptrace_parent - return the task that is tracing the given task * @task: task to consider * * Returns %NULL if no one is tracing @task, or the &struct task_struct * pointer to its tracer. * * Must called under rcu_read_lock(). The pointer returned might be kept * live only by RCU. During exec, this may be called with task_lock() held * on @task, still held from when check_unsafe_exec() was called. */ static inline struct task_struct *ptrace_parent(struct task_struct *task) { if (unlikely(task->ptrace)) return rcu_dereference(task->parent); return NULL; } /** * ptrace_event_enabled - test whether a ptrace event is enabled * @task: ptracee of interest * @event: %PTRACE_EVENT_* to test * * Test whether @event is enabled for ptracee @task. * * Returns %true if @event is enabled, %false otherwise. */ static inline bool ptrace_event_enabled(struct task_struct *task, int event) { return task->ptrace & PT_EVENT_FLAG(event); } /** * ptrace_event - possibly stop for a ptrace event notification * @event: %PTRACE_EVENT_* value to report * @message: value for %PTRACE_GETEVENTMSG to return * * Check whether @event is enabled and, if so, report @event and @message * to the ptrace parent. * * Called without locks. */ static inline void ptrace_event(int event, unsigned long message) { if (unlikely(ptrace_event_enabled(current, event))) { current->ptrace_message = message; ptrace_notify((event << 8) | SIGTRAP); } else if (event == PTRACE_EVENT_EXEC) { /* legacy EXEC report via SIGTRAP */ if ((current->ptrace & (PT_PTRACED|PT_SEIZED)) == PT_PTRACED) send_sig(SIGTRAP, current, 0); } } /** * ptrace_event_pid - possibly stop for a ptrace event notification * @event: %PTRACE_EVENT_* value to report * @pid: process identifier for %PTRACE_GETEVENTMSG to return * * Check whether @event is enabled and, if so, report @event and @pid * to the ptrace parent. @pid is reported as the pid_t seen from the * ptrace parent's pid namespace. * * Called without locks. */ static inline void ptrace_event_pid(int event, struct pid *pid) { /* * FIXME: There's a potential race if a ptracer in a different pid * namespace than parent attaches between computing message below and * when we acquire tasklist_lock in ptrace_stop(). If this happens, * the ptracer will get a bogus pid from PTRACE_GETEVENTMSG. */ unsigned long message = 0; struct pid_namespace *ns; rcu_read_lock(); ns = task_active_pid_ns(rcu_dereference(current->parent)); if (ns) message = pid_nr_ns(pid, ns); rcu_read_unlock(); ptrace_event(event, message); } /** * ptrace_init_task - initialize ptrace state for a new child * @child: new child task * @ptrace: true if child should be ptrace'd by parent's tracer * * This is called immediately after adding @child to its parent's children * list. @ptrace is false in the normal case, and true to ptrace @child. * * Called with current's siglock and write_lock_irq(&tasklist_lock) held. */ static inline void ptrace_init_task(struct task_struct *child, bool ptrace) { INIT_LIST_HEAD(&child->ptrace_entry); INIT_LIST_HEAD(&child->ptraced); child->jobctl = 0; child->ptrace = 0; child->parent = child->real_parent; if (unlikely(ptrace) && current->ptrace) { child->ptrace = current->ptrace; __ptrace_link(child, current->parent, current->ptracer_cred); if (child->ptrace & PT_SEIZED) task_set_jobctl_pending(child, JOBCTL_TRAP_STOP); else sigaddset(&child->pending.signal, SIGSTOP); } else child->ptracer_cred = NULL; } /** * ptrace_release_task - final ptrace-related cleanup of a zombie being reaped * @task: task in %EXIT_DEAD state * * Called with write_lock(&tasklist_lock) held. */ static inline void ptrace_release_task(struct task_struct *task) { BUG_ON(!list_empty(&task->ptraced)); ptrace_unlink(task); BUG_ON(!list_empty(&task->ptrace_entry)); } #ifndef force_successful_syscall_return /* * System call handlers that, upon successful completion, need to return a * negative value should call force_successful_syscall_return() right before * returning. On architectures where the syscall convention provides for a * separate error flag (e.g., alpha, ia64, ppc{,64}, sparc{,64}, possibly * others), this macro can be used to ensure that the error flag will not get * set. On architectures which do not support a separate error flag, the macro * is a no-op and the spurious error condition needs to be filtered out by some * other means (e.g., in user-level, by passing an extra argument to the * syscall handler, or something along those lines). */ #define force_successful_syscall_return() do { } while (0) #endif #ifndef is_syscall_success /* * On most systems we can tell if a syscall is a success based on if the retval * is an error value. On some systems like ia64 and powerpc they have different * indicators of success/failure and must define their own. */ #define is_syscall_success(regs) (!IS_ERR_VALUE((unsigned long)(regs_return_value(regs)))) #endif /* * <asm/ptrace.h> should define the following things inside #ifdef __KERNEL__. * * These do-nothing inlines are used when the arch does not * implement single-step. The kerneldoc comments are here * to document the interface for all arch definitions. */ #ifndef arch_has_single_step /** * arch_has_single_step - does this CPU support user-mode single-step? * * If this is defined, then there must be function declarations or * inlines for user_enable_single_step() and user_disable_single_step(). * arch_has_single_step() should evaluate to nonzero iff the machine * supports instruction single-step for user mode. * It can be a constant or it can test a CPU feature bit. */ #define arch_has_single_step() (0) /** * user_enable_single_step - single-step in user-mode task * @task: either current or a task stopped in %TASK_TRACED * * This can only be called when arch_has_single_step() has returned nonzero. * Set @task so that when it returns to user mode, it will trap after the * next single instruction executes. If arch_has_block_step() is defined, * this must clear the effects of user_enable_block_step() too. */ static inline void user_enable_single_step(struct task_struct *task) { BUG(); /* This can never be called. */ } /** * user_disable_single_step - cancel user-mode single-step * @task: either current or a task stopped in %TASK_TRACED * * Clear @task of the effects of user_enable_single_step() and * user_enable_block_step(). This can be called whether or not either * of those was ever called on @task, and even if arch_has_single_step() * returned zero. */ static inline void user_disable_single_step(struct task_struct *task) { } #else extern void user_enable_single_step(struct task_struct *); extern void user_disable_single_step(struct task_struct *); #endif /* arch_has_single_step */ #ifndef arch_has_block_step /** * arch_has_block_step - does this CPU support user-mode block-step? * * If this is defined, then there must be a function declaration or inline * for user_enable_block_step(), and arch_has_single_step() must be defined * too. arch_has_block_step() should evaluate to nonzero iff the machine * supports step-until-branch for user mode. It can be a constant or it * can test a CPU feature bit. */ #define arch_has_block_step() (0) /** * user_enable_block_step - step until branch in user-mode task * @task: either current or a task stopped in %TASK_TRACED * * This can only be called when arch_has_block_step() has returned nonzero, * and will never be called when single-instruction stepping is being used. * Set @task so that when it returns to user mode, it will trap after the * next branch or trap taken. */ static inline void user_enable_block_step(struct task_struct *task) { BUG(); /* This can never be called. */ } #else extern void user_enable_block_step(struct task_struct *); #endif /* arch_has_block_step */ #ifdef ARCH_HAS_USER_SINGLE_STEP_REPORT extern void user_single_step_report(struct pt_regs *regs); #else static inline void user_single_step_report(struct pt_regs *regs) { kernel_siginfo_t info; clear_siginfo(&info); info.si_signo = SIGTRAP; info.si_errno = 0; info.si_code = SI_USER; info.si_pid = 0; info.si_uid = 0; force_sig_info(&info); } #endif #ifndef arch_ptrace_stop_needed /** * arch_ptrace_stop_needed - Decide whether arch_ptrace_stop() should be called * @code: current->exit_code value ptrace will stop with * @info: siginfo_t pointer (or %NULL) for signal ptrace will stop with * * This is called with the siglock held, to decide whether or not it's * necessary to release the siglock and call arch_ptrace_stop() with the * same @code and @info arguments. It can be defined to a constant if * arch_ptrace_stop() is never required, or always is. On machines where * this makes sense, it should be defined to a quick test to optimize out * calling arch_ptrace_stop() when it would be superfluous. For example, * if the thread has not been back to user mode since the last stop, the * thread state might indicate that nothing needs to be done. * * This is guaranteed to be invoked once before a task stops for ptrace and * may include arch-specific operations necessary prior to a ptrace stop. */ #define arch_ptrace_stop_needed(code, info) (0) #endif #ifndef arch_ptrace_stop /** * arch_ptrace_stop - Do machine-specific work before stopping for ptrace * @code: current->exit_code value ptrace will stop with * @info: siginfo_t pointer (or %NULL) for signal ptrace will stop with * * This is called with no locks held when arch_ptrace_stop_needed() has * just returned nonzero. It is allowed to block, e.g. for user memory * access. The arch can have machine-specific work to be done before * ptrace stops. On ia64, register backing store gets written back to user * memory here. Since this can be costly (requires dropping the siglock), * we only do it when the arch requires it for this particular stop, as * indicated by arch_ptrace_stop_needed(). */ #define arch_ptrace_stop(code, info) do { } while (0) #endif #ifndef current_pt_regs #define current_pt_regs() task_pt_regs(current) #endif /* * unlike current_pt_regs(), this one is equal to task_pt_regs(current) * on *all* architectures; the only reason to have a per-arch definition * is optimisation. */ #ifndef signal_pt_regs #define signal_pt_regs() task_pt_regs(current) #endif #ifndef current_user_stack_pointer #define current_user_stack_pointer() user_stack_pointer(current_pt_regs()) #endif extern int task_current_syscall(struct task_struct *target, struct syscall_info *info); extern void sigaction_compat_abi(struct k_sigaction *act, struct k_sigaction *oact); #endif PK ! �x��" " bootconfig.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_XBC_H #define _LINUX_XBC_H /* * Extra Boot Config * Copyright (C) 2019 Linaro Ltd. * Author: Masami Hiramatsu <mhiramat@kernel.org> */ #include <linux/kernel.h> #include <linux/types.h> #define BOOTCONFIG_MAGIC "#BOOTCONFIG\n" #define BOOTCONFIG_MAGIC_LEN 12 #define BOOTCONFIG_ALIGN_SHIFT 2 #define BOOTCONFIG_ALIGN (1 << BOOTCONFIG_ALIGN_SHIFT) #define BOOTCONFIG_ALIGN_MASK (BOOTCONFIG_ALIGN - 1) /** * xbc_calc_checksum() - Calculate checksum of bootconfig * @data: Bootconfig data. * @size: The size of the bootconfig data. * * Calculate the checksum value of the bootconfig data. * The checksum will be used with the BOOTCONFIG_MAGIC and the size for * embedding the bootconfig in the initrd image. */ static inline __init u32 xbc_calc_checksum(void *data, u32 size) { unsigned char *p = data; u32 ret = 0; while (size--) ret += *p++; return ret; } /* XBC tree node */ struct xbc_node { u16 next; u16 child; u16 parent; u16 data; } __attribute__ ((__packed__)); #define XBC_KEY 0 #define XBC_VALUE (1 << 15) /* Maximum size of boot config is 32KB - 1 */ #define XBC_DATA_MAX (XBC_VALUE - 1) #define XBC_NODE_MAX 8192 #define XBC_KEYLEN_MAX 256 #define XBC_DEPTH_MAX 16 /* Node tree access raw APIs */ struct xbc_node * __init xbc_root_node(void); int __init xbc_node_index(struct xbc_node *node); struct xbc_node * __init xbc_node_get_parent(struct xbc_node *node); struct xbc_node * __init xbc_node_get_child(struct xbc_node *node); struct xbc_node * __init xbc_node_get_next(struct xbc_node *node); const char * __init xbc_node_get_data(struct xbc_node *node); /** * xbc_node_is_value() - Test the node is a value node * @node: An XBC node. * * Test the @node is a value node and return true if a value node, false if not. */ static inline __init bool xbc_node_is_value(struct xbc_node *node) { return node->data & XBC_VALUE; } /** * xbc_node_is_key() - Test the node is a key node * @node: An XBC node. * * Test the @node is a key node and return true if a key node, false if not. */ static inline __init bool xbc_node_is_key(struct xbc_node *node) { return !xbc_node_is_value(node); } /** * xbc_node_is_array() - Test the node is an arraied value node * @node: An XBC node. * * Test the @node is an arraied value node. */ static inline __init bool xbc_node_is_array(struct xbc_node *node) { return xbc_node_is_value(node) && node->child != 0; } /** * xbc_node_is_leaf() - Test the node is a leaf key node * @node: An XBC node. * * Test the @node is a leaf key node which is a key node and has a value node * or no child. Returns true if it is a leaf node, or false if not. * Note that the leaf node can have subkey nodes in addition to the * value node. */ static inline __init bool xbc_node_is_leaf(struct xbc_node *node) { return xbc_node_is_key(node) && (!node->child || xbc_node_is_value(xbc_node_get_child(node))); } /* Tree-based key-value access APIs */ struct xbc_node * __init xbc_node_find_subkey(struct xbc_node *parent, const char *key); const char * __init xbc_node_find_value(struct xbc_node *parent, const char *key, struct xbc_node **vnode); struct xbc_node * __init xbc_node_find_next_leaf(struct xbc_node *root, struct xbc_node *leaf); const char * __init xbc_node_find_next_key_value(struct xbc_node *root, struct xbc_node **leaf); /** * xbc_find_value() - Find a value which matches the key * @key: Search key * @vnode: A container pointer of XBC value node. * * Search a value whose key matches @key from whole of XBC tree and return * the value if found. Found value node is stored in *@vnode. * Note that this can return 0-length string and store NULL in *@vnode for * key-only (non-value) entry. */ static inline const char * __init xbc_find_value(const char *key, struct xbc_node **vnode) { return xbc_node_find_value(NULL, key, vnode); } /** * xbc_find_node() - Find a node which matches the key * @key: Search key * * Search a (key) node whose key matches @key from whole of XBC tree and * return the node if found. If not found, returns NULL. */ static inline struct xbc_node * __init xbc_find_node(const char *key) { return xbc_node_find_subkey(NULL, key); } /** * xbc_node_get_subkey() - Return the first subkey node if exists * @node: Parent node * * Return the first subkey node of the @node. If the @node has no child * or only value node, this will return NULL. */ static inline struct xbc_node * __init xbc_node_get_subkey(struct xbc_node *node) { struct xbc_node *child = xbc_node_get_child(node); if (child && xbc_node_is_value(child)) return xbc_node_get_next(child); else return child; } /** * xbc_array_for_each_value() - Iterate value nodes on an array * @anode: An XBC arraied value node * @value: A value * * Iterate array value nodes and values starts from @anode. This is expected to * be used with xbc_find_value() and xbc_node_find_value(), so that user can * process each array entry node. */ #define xbc_array_for_each_value(anode, value) \ for (value = xbc_node_get_data(anode); anode != NULL ; \ anode = xbc_node_get_child(anode), \ value = anode ? xbc_node_get_data(anode) : NULL) /** * xbc_node_for_each_child() - Iterate child nodes * @parent: An XBC node. * @child: Iterated XBC node. * * Iterate child nodes of @parent. Each child nodes are stored to @child. * The @child can be mixture of a value node and subkey nodes. */ #define xbc_node_for_each_child(parent, child) \ for (child = xbc_node_get_child(parent); child != NULL ; \ child = xbc_node_get_next(child)) /** * xbc_node_for_each_subkey() - Iterate child subkey nodes * @parent: An XBC node. * @child: Iterated XBC node. * * Iterate subkey nodes of @parent. Each child nodes are stored to @child. * The @child is only the subkey node. */ #define xbc_node_for_each_subkey(parent, child) \ for (child = xbc_node_get_subkey(parent); child != NULL ; \ child = xbc_node_get_next(child)) /** * xbc_node_for_each_array_value() - Iterate array entries of geven key * @node: An XBC node. * @key: A key string searched under @node * @anode: Iterated XBC node of array entry. * @value: Iterated value of array entry. * * Iterate array entries of given @key under @node. Each array entry node * is stored to @anode and @value. If the @node doesn't have @key node, * it does nothing. * Note that even if the found key node has only one value (not array) * this executes block once. However, if the found key node has no value * (key-only node), this does nothing. So don't use this for testing the * key-value pair existence. */ #define xbc_node_for_each_array_value(node, key, anode, value) \ for (value = xbc_node_find_value(node, key, &anode); value != NULL; \ anode = xbc_node_get_child(anode), \ value = anode ? xbc_node_get_data(anode) : NULL) /** * xbc_node_for_each_key_value() - Iterate key-value pairs under a node * @node: An XBC node. * @knode: Iterated key node * @value: Iterated value string * * Iterate key-value pairs under @node. Each key node and value string are * stored in @knode and @value respectively. */ #define xbc_node_for_each_key_value(node, knode, value) \ for (knode = NULL, value = xbc_node_find_next_key_value(node, &knode);\ knode != NULL; value = xbc_node_find_next_key_value(node, &knode)) /** * xbc_for_each_key_value() - Iterate key-value pairs * @knode: Iterated key node * @value: Iterated value string * * Iterate key-value pairs in whole XBC tree. Each key node and value string * are stored in @knode and @value respectively. */ #define xbc_for_each_key_value(knode, value) \ xbc_node_for_each_key_value(NULL, knode, value) /* Compose partial key */ int __init xbc_node_compose_key_after(struct xbc_node *root, struct xbc_node *node, char *buf, size_t size); /** * xbc_node_compose_key() - Compose full key string of the XBC node * @node: An XBC node. * @buf: A buffer to store the key. * @size: The size of the @buf. * * Compose the full-length key of the @node into @buf. Returns the total * length of the key stored in @buf. Or returns -EINVAL if @node is NULL, * and -ERANGE if the key depth is deeper than max depth. */ static inline int __init xbc_node_compose_key(struct xbc_node *node, char *buf, size_t size) { return xbc_node_compose_key_after(NULL, node, buf, size); } /* XBC node initializer */ int __init xbc_init(char *buf, const char **emsg, int *epos); /* XBC cleanup data structures */ void __init xbc_destroy_all(void); /* Debug dump functions */ void __init xbc_debug_dump(void); #endif PK ! }|�u�y �y list.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LIST_H #define _LINUX_LIST_H #include <linux/types.h> #include <linux/stddef.h> #include <linux/poison.h> #include <linux/const.h> #include <linux/kernel.h> /* * Circular doubly linked list implementation. * * Some of the internal functions ("__xxx") are useful when * manipulating whole lists rather than single entries, as * sometimes we already know the next/prev entries and we can * generate better code by using them directly rather than * using the generic single-entry routines. */ #define LIST_HEAD_INIT(name) { &(name), &(name) } #define LIST_HEAD(name) \ struct list_head name = LIST_HEAD_INIT(name) /** * INIT_LIST_HEAD - Initialize a list_head structure * @list: list_head structure to be initialized. * * Initializes the list_head to point to itself. If it is a list header, * the result is an empty list. */ static inline void INIT_LIST_HEAD(struct list_head *list) { WRITE_ONCE(list->next, list); WRITE_ONCE(list->prev, list); } #ifdef CONFIG_DEBUG_LIST extern bool __list_add_valid(struct list_head *new, struct list_head *prev, struct list_head *next); extern bool __list_del_entry_valid(struct list_head *entry); #else static inline bool __list_add_valid(struct list_head *new, struct list_head *prev, struct list_head *next) { return true; } static inline bool __list_del_entry_valid(struct list_head *entry) { return true; } #endif /* * Insert a new entry between two known consecutive entries. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static inline void __list_add(struct list_head *new, struct list_head *prev, struct list_head *next) { if (!__list_add_valid(new, prev, next)) return; next->prev = new; new->next = next; new->prev = prev; WRITE_ONCE(prev->next, new); } /** * list_add - add a new entry * @new: new entry to be added * @head: list head to add it after * * Insert a new entry after the specified head. * This is good for implementing stacks. */ static inline void list_add(struct list_head *new, struct list_head *head) { __list_add(new, head, head->next); } /** * list_add_tail - add a new entry * @new: new entry to be added * @head: list head to add it before * * Insert a new entry before the specified head. * This is useful for implementing queues. */ static inline void list_add_tail(struct list_head *new, struct list_head *head) { __list_add(new, head->prev, head); } /* * Delete a list entry by making the prev/next entries * point to each other. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static inline void __list_del(struct list_head * prev, struct list_head * next) { next->prev = prev; WRITE_ONCE(prev->next, next); } /* * Delete a list entry and clear the 'prev' pointer. * * This is a special-purpose list clearing method used in the networking code * for lists allocated as per-cpu, where we don't want to incur the extra * WRITE_ONCE() overhead of a regular list_del_init(). The code that uses this * needs to check the node 'prev' pointer instead of calling list_empty(). */ static inline void __list_del_clearprev(struct list_head *entry) { __list_del(entry->prev, entry->next); entry->prev = NULL; } static inline void __list_del_entry(struct list_head *entry) { if (!__list_del_entry_valid(entry)) return; __list_del(entry->prev, entry->next); } /** * list_del - deletes entry from list. * @entry: the element to delete from the list. * Note: list_empty() on entry does not return true after this, the entry is * in an undefined state. */ static inline void list_del(struct list_head *entry) { __list_del_entry(entry); entry->next = LIST_POISON1; entry->prev = LIST_POISON2; } /** * list_replace - replace old entry by new one * @old : the element to be replaced * @new : the new element to insert * * If @old was empty, it will be overwritten. */ static inline void list_replace(struct list_head *old, struct list_head *new) { new->next = old->next; new->next->prev = new; new->prev = old->prev; new->prev->next = new; } /** * list_replace_init - replace old entry by new one and initialize the old one * @old : the element to be replaced * @new : the new element to insert * * If @old was empty, it will be overwritten. */ static inline void list_replace_init(struct list_head *old, struct list_head *new) { list_replace(old, new); INIT_LIST_HEAD(old); } /** * list_swap - replace entry1 with entry2 and re-add entry1 at entry2's position * @entry1: the location to place entry2 * @entry2: the location to place entry1 */ static inline void list_swap(struct list_head *entry1, struct list_head *entry2) { struct list_head *pos = entry2->prev; list_del(entry2); list_replace(entry1, entry2); if (pos == entry1) pos = entry2; list_add(entry1, pos); } /** * list_del_init - deletes entry from list and reinitialize it. * @entry: the element to delete from the list. */ static inline void list_del_init(struct list_head *entry) { __list_del_entry(entry); INIT_LIST_HEAD(entry); } /** * list_move - delete from one list and add as another's head * @list: the entry to move * @head: the head that will precede our entry */ static inline void list_move(struct list_head *list, struct list_head *head) { __list_del_entry(list); list_add(list, head); } /** * list_move_tail - delete from one list and add as another's tail * @list: the entry to move * @head: the head that will follow our entry */ static inline void list_move_tail(struct list_head *list, struct list_head *head) { __list_del_entry(list); list_add_tail(list, head); } /** * list_bulk_move_tail - move a subsection of a list to its tail * @head: the head that will follow our entry * @first: first entry to move * @last: last entry to move, can be the same as first * * Move all entries between @first and including @last before @head. * All three entries must belong to the same linked list. */ static inline void list_bulk_move_tail(struct list_head *head, struct list_head *first, struct list_head *last) { first->prev->next = last->next; last->next->prev = first->prev; head->prev->next = first; first->prev = head->prev; last->next = head; head->prev = last; } /** * list_is_first -- tests whether @list is the first entry in list @head * @list: the entry to test * @head: the head of the list */ static inline int list_is_first(const struct list_head *list, const struct list_head *head) { return list->prev == head; } /** * list_is_last - tests whether @list is the last entry in list @head * @list: the entry to test * @head: the head of the list */ static inline int list_is_last(const struct list_head *list, const struct list_head *head) { return list->next == head; } /** * list_is_head - tests whether @list is the list @head * @list: the entry to test * @head: the head of the list */ static inline int list_is_head(const struct list_head *list, const struct list_head *head) { return list == head; } /** * list_empty - tests whether a list is empty * @head: the list to test. */ static inline int list_empty(const struct list_head *head) { return READ_ONCE(head->next) == head; } /** * list_del_init_careful - deletes entry from list and reinitialize it. * @entry: the element to delete from the list. * * This is the same as list_del_init(), except designed to be used * together with list_empty_careful() in a way to guarantee ordering * of other memory operations. * * Any memory operations done before a list_del_init_careful() are * guaranteed to be visible after a list_empty_careful() test. */ static inline void list_del_init_careful(struct list_head *entry) { __list_del_entry(entry); WRITE_ONCE(entry->prev, entry); smp_store_release(&entry->next, entry); } /** * list_empty_careful - tests whether a list is empty and not being modified * @head: the list to test * * Description: * tests whether a list is empty _and_ checks that no other CPU might be * in the process of modifying either member (next or prev) * * NOTE: using list_empty_careful() without synchronization * can only be safe if the only activity that can happen * to the list entry is list_del_init(). Eg. it cannot be used * if another CPU could re-list_add() it. */ static inline int list_empty_careful(const struct list_head *head) { struct list_head *next = smp_load_acquire(&head->next); return list_is_head(next, head) && (next == READ_ONCE(head->prev)); } /** * list_rotate_left - rotate the list to the left * @head: the head of the list */ static inline void list_rotate_left(struct list_head *head) { struct list_head *first; if (!list_empty(head)) { first = head->next; list_move_tail(first, head); } } /** * list_rotate_to_front() - Rotate list to specific item. * @list: The desired new front of the list. * @head: The head of the list. * * Rotates list so that @list becomes the new front of the list. */ static inline void list_rotate_to_front(struct list_head *list, struct list_head *head) { /* * Deletes the list head from the list denoted by @head and * places it as the tail of @list, this effectively rotates the * list so that @list is at the front. */ list_move_tail(head, list); } /** * list_is_singular - tests whether a list has just one entry. * @head: the list to test. */ static inline int list_is_singular(const struct list_head *head) { return !list_empty(head) && (head->next == head->prev); } static inline void __list_cut_position(struct list_head *list, struct list_head *head, struct list_head *entry) { struct list_head *new_first = entry->next; list->next = head->next; list->next->prev = list; list->prev = entry; entry->next = list; head->next = new_first; new_first->prev = head; } /** * list_cut_position - cut a list into two * @list: a new list to add all removed entries * @head: a list with entries * @entry: an entry within head, could be the head itself * and if so we won't cut the list * * This helper moves the initial part of @head, up to and * including @entry, from @head to @list. You should * pass on @entry an element you know is on @head. @list * should be an empty list or a list you do not care about * losing its data. * */ static inline void list_cut_position(struct list_head *list, struct list_head *head, struct list_head *entry) { if (list_empty(head)) return; if (list_is_singular(head) && !list_is_head(entry, head) && (entry != head->next)) return; if (list_is_head(entry, head)) INIT_LIST_HEAD(list); else __list_cut_position(list, head, entry); } /** * list_cut_before - cut a list into two, before given entry * @list: a new list to add all removed entries * @head: a list with entries * @entry: an entry within head, could be the head itself * * This helper moves the initial part of @head, up to but * excluding @entry, from @head to @list. You should pass * in @entry an element you know is on @head. @list should * be an empty list or a list you do not care about losing * its data. * If @entry == @head, all entries on @head are moved to * @list. */ static inline void list_cut_before(struct list_head *list, struct list_head *head, struct list_head *entry) { if (head->next == entry) { INIT_LIST_HEAD(list); return; } list->next = head->next; list->next->prev = list; list->prev = entry->prev; list->prev->next = list; head->next = entry; entry->prev = head; } static inline void __list_splice(const struct list_head *list, struct list_head *prev, struct list_head *next) { struct list_head *first = list->next; struct list_head *last = list->prev; first->prev = prev; prev->next = first; last->next = next; next->prev = last; } /** * list_splice - join two lists, this is designed for stacks * @list: the new list to add. * @head: the place to add it in the first list. */ static inline void list_splice(const struct list_head *list, struct list_head *head) { if (!list_empty(list)) __list_splice(list, head, head->next); } /** * list_splice_tail - join two lists, each list being a queue * @list: the new list to add. * @head: the place to add it in the first list. */ static inline void list_splice_tail(struct list_head *list, struct list_head *head) { if (!list_empty(list)) __list_splice(list, head->prev, head); } /** * list_splice_init - join two lists and reinitialise the emptied list. * @list: the new list to add. * @head: the place to add it in the first list. * * The list at @list is reinitialised */ static inline void list_splice_init(struct list_head *list, struct list_head *head) { if (!list_empty(list)) { __list_splice(list, head, head->next); INIT_LIST_HEAD(list); } } /** * list_splice_tail_init - join two lists and reinitialise the emptied list * @list: the new list to add. * @head: the place to add it in the first list. * * Each of the lists is a queue. * The list at @list is reinitialised */ static inline void list_splice_tail_init(struct list_head *list, struct list_head *head) { if (!list_empty(list)) { __list_splice(list, head->prev, head); INIT_LIST_HEAD(list); } } /** * list_entry - get the struct for this entry * @ptr: the &struct list_head pointer. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. */ #define list_entry(ptr, type, member) \ container_of(ptr, type, member) /** * list_first_entry - get the first element from a list * @ptr: the list head to take the element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * Note, that list is expected to be not empty. */ #define list_first_entry(ptr, type, member) \ list_entry((ptr)->next, type, member) /** * list_last_entry - get the last element from a list * @ptr: the list head to take the element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * Note, that list is expected to be not empty. */ #define list_last_entry(ptr, type, member) \ list_entry((ptr)->prev, type, member) /** * list_first_entry_or_null - get the first element from a list * @ptr: the list head to take the element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_head within the struct. * * Note that if the list is empty, it returns NULL. */ #define list_first_entry_or_null(ptr, type, member) ({ \ struct list_head *head__ = (ptr); \ struct list_head *pos__ = READ_ONCE(head__->next); \ pos__ != head__ ? list_entry(pos__, type, member) : NULL; \ }) /** * list_next_entry - get the next element in list * @pos: the type * to cursor * @member: the name of the list_head within the struct. */ #define list_next_entry(pos, member) \ list_entry((pos)->member.next, typeof(*(pos)), member) /** * list_prev_entry - get the prev element in list * @pos: the type * to cursor * @member: the name of the list_head within the struct. */ #define list_prev_entry(pos, member) \ list_entry((pos)->member.prev, typeof(*(pos)), member) /** * list_for_each - iterate over a list * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. */ #define list_for_each(pos, head) \ for (pos = (head)->next; !list_is_head(pos, (head)); pos = pos->next) /** * list_for_each_rcu - Iterate over a list in an RCU-safe fashion * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. */ #define list_for_each_rcu(pos, head) \ for (pos = rcu_dereference((head)->next); \ !list_is_head(pos, (head)); \ pos = rcu_dereference(pos->next)) /** * list_for_each_continue - continue iteration over a list * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. * * Continue to iterate over a list, continuing after the current position. */ #define list_for_each_continue(pos, head) \ for (pos = pos->next; !list_is_head(pos, (head)); pos = pos->next) /** * list_for_each_prev - iterate over a list backwards * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. */ #define list_for_each_prev(pos, head) \ for (pos = (head)->prev; !list_is_head(pos, (head)); pos = pos->prev) /** * list_for_each_safe - iterate over a list safe against removal of list entry * @pos: the &struct list_head to use as a loop cursor. * @n: another &struct list_head to use as temporary storage * @head: the head for your list. */ #define list_for_each_safe(pos, n, head) \ for (pos = (head)->next, n = pos->next; \ !list_is_head(pos, (head)); \ pos = n, n = pos->next) /** * list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry * @pos: the &struct list_head to use as a loop cursor. * @n: another &struct list_head to use as temporary storage * @head: the head for your list. */ #define list_for_each_prev_safe(pos, n, head) \ for (pos = (head)->prev, n = pos->prev; \ !list_is_head(pos, (head)); \ pos = n, n = pos->prev) /** * list_entry_is_head - test if the entry points to the head of the list * @pos: the type * to cursor * @head: the head for your list. * @member: the name of the list_head within the struct. */ #define list_entry_is_head(pos, head, member) \ (&pos->member == (head)) /** * list_for_each_entry - iterate over list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. */ #define list_for_each_entry(pos, head, member) \ for (pos = list_first_entry(head, typeof(*pos), member); \ !list_entry_is_head(pos, head, member); \ pos = list_next_entry(pos, member)) /** * list_for_each_entry_reverse - iterate backwards over list of given type. * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. */ #define list_for_each_entry_reverse(pos, head, member) \ for (pos = list_last_entry(head, typeof(*pos), member); \ !list_entry_is_head(pos, head, member); \ pos = list_prev_entry(pos, member)) /** * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue() * @pos: the type * to use as a start point * @head: the head of the list * @member: the name of the list_head within the struct. * * Prepares a pos entry for use as a start point in list_for_each_entry_continue(). */ #define list_prepare_entry(pos, head, member) \ ((pos) ? : list_entry(head, typeof(*pos), member)) /** * list_for_each_entry_continue - continue iteration over list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * * Continue to iterate over list of given type, continuing after * the current position. */ #define list_for_each_entry_continue(pos, head, member) \ for (pos = list_next_entry(pos, member); \ !list_entry_is_head(pos, head, member); \ pos = list_next_entry(pos, member)) /** * list_for_each_entry_continue_reverse - iterate backwards from the given point * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * * Start to iterate over list of given type backwards, continuing after * the current position. */ #define list_for_each_entry_continue_reverse(pos, head, member) \ for (pos = list_prev_entry(pos, member); \ !list_entry_is_head(pos, head, member); \ pos = list_prev_entry(pos, member)) /** * list_for_each_entry_from - iterate over list of given type from the current point * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * * Iterate over list of given type, continuing from current position. */ #define list_for_each_entry_from(pos, head, member) \ for (; !list_entry_is_head(pos, head, member); \ pos = list_next_entry(pos, member)) /** * list_for_each_entry_from_reverse - iterate backwards over list of given type * from the current point * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_head within the struct. * * Iterate backwards over list of given type, continuing from current position. */ #define list_for_each_entry_from_reverse(pos, head, member) \ for (; !list_entry_is_head(pos, head, member); \ pos = list_prev_entry(pos, member)) /** * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_head within the struct. */ #define list_for_each_entry_safe(pos, n, head, member) \ for (pos = list_first_entry(head, typeof(*pos), member), \ n = list_next_entry(pos, member); \ !list_entry_is_head(pos, head, member); \ pos = n, n = list_next_entry(n, member)) /** * list_for_each_entry_safe_continue - continue list iteration safe against removal * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_head within the struct. * * Iterate over list of given type, continuing after current point, * safe against removal of list entry. */ #define list_for_each_entry_safe_continue(pos, n, head, member) \ for (pos = list_next_entry(pos, member), \ n = list_next_entry(pos, member); \ !list_entry_is_head(pos, head, member); \ pos = n, n = list_next_entry(n, member)) /** * list_for_each_entry_safe_from - iterate over list from current point safe against removal * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_head within the struct. * * Iterate over list of given type from current point, safe against * removal of list entry. */ #define list_for_each_entry_safe_from(pos, n, head, member) \ for (n = list_next_entry(pos, member); \ !list_entry_is_head(pos, head, member); \ pos = n, n = list_next_entry(n, member)) /** * list_for_each_entry_safe_reverse - iterate backwards over list safe against removal * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_head within the struct. * * Iterate backwards over list of given type, safe against removal * of list entry. */ #define list_for_each_entry_safe_reverse(pos, n, head, member) \ for (pos = list_last_entry(head, typeof(*pos), member), \ n = list_prev_entry(pos, member); \ !list_entry_is_head(pos, head, member); \ pos = n, n = list_prev_entry(n, member)) /** * list_safe_reset_next - reset a stale list_for_each_entry_safe loop * @pos: the loop cursor used in the list_for_each_entry_safe loop * @n: temporary storage used in list_for_each_entry_safe * @member: the name of the list_head within the struct. * * list_safe_reset_next is not safe to use in general if the list may be * modified concurrently (eg. the lock is dropped in the loop body). An * exception to this is if the cursor element (pos) is pinned in the list, * and list_safe_reset_next is called after re-taking the lock and before * completing the current iteration of the loop body. */ #define list_safe_reset_next(pos, n, member) \ n = list_next_entry(pos, member) /* * Double linked lists with a single pointer list head. * Mostly useful for hash tables where the two pointer list head is * too wasteful. * You lose the ability to access the tail in O(1). */ #define HLIST_HEAD_INIT { .first = NULL } #define HLIST_HEAD(name) struct hlist_head name = { .first = NULL } #define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL) static inline void INIT_HLIST_NODE(struct hlist_node *h) { h->next = NULL; h->pprev = NULL; } /** * hlist_unhashed - Has node been removed from list and reinitialized? * @h: Node to be checked * * Not that not all removal functions will leave a node in unhashed * state. For example, hlist_nulls_del_init_rcu() does leave the * node in unhashed state, but hlist_nulls_del() does not. */ static inline int hlist_unhashed(const struct hlist_node *h) { return !h->pprev; } /** * hlist_unhashed_lockless - Version of hlist_unhashed for lockless use * @h: Node to be checked * * This variant of hlist_unhashed() must be used in lockless contexts * to avoid potential load-tearing. The READ_ONCE() is paired with the * various WRITE_ONCE() in hlist helpers that are defined below. */ static inline int hlist_unhashed_lockless(const struct hlist_node *h) { return !READ_ONCE(h->pprev); } /** * hlist_empty - Is the specified hlist_head structure an empty hlist? * @h: Structure to check. */ static inline int hlist_empty(const struct hlist_head *h) { return !READ_ONCE(h->first); } static inline void __hlist_del(struct hlist_node *n) { struct hlist_node *next = n->next; struct hlist_node **pprev = n->pprev; WRITE_ONCE(*pprev, next); if (next) WRITE_ONCE(next->pprev, pprev); } /** * hlist_del - Delete the specified hlist_node from its list * @n: Node to delete. * * Note that this function leaves the node in hashed state. Use * hlist_del_init() or similar instead to unhash @n. */ static inline void hlist_del(struct hlist_node *n) { __hlist_del(n); n->next = LIST_POISON1; n->pprev = LIST_POISON2; } /** * hlist_del_init - Delete the specified hlist_node from its list and initialize * @n: Node to delete. * * Note that this function leaves the node in unhashed state. */ static inline void hlist_del_init(struct hlist_node *n) { if (!hlist_unhashed(n)) { __hlist_del(n); INIT_HLIST_NODE(n); } } /** * hlist_add_head - add a new entry at the beginning of the hlist * @n: new entry to be added * @h: hlist head to add it after * * Insert a new entry after the specified head. * This is good for implementing stacks. */ static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) { struct hlist_node *first = h->first; WRITE_ONCE(n->next, first); if (first) WRITE_ONCE(first->pprev, &n->next); WRITE_ONCE(h->first, n); WRITE_ONCE(n->pprev, &h->first); } /** * hlist_add_before - add a new entry before the one specified * @n: new entry to be added * @next: hlist node to add it before, which must be non-NULL */ static inline void hlist_add_before(struct hlist_node *n, struct hlist_node *next) { WRITE_ONCE(n->pprev, next->pprev); WRITE_ONCE(n->next, next); WRITE_ONCE(next->pprev, &n->next); WRITE_ONCE(*(n->pprev), n); } /** * hlist_add_behind - add a new entry after the one specified * @n: new entry to be added * @prev: hlist node to add it after, which must be non-NULL */ static inline void hlist_add_behind(struct hlist_node *n, struct hlist_node *prev) { WRITE_ONCE(n->next, prev->next); WRITE_ONCE(prev->next, n); WRITE_ONCE(n->pprev, &prev->next); if (n->next) WRITE_ONCE(n->next->pprev, &n->next); } /** * hlist_add_fake - create a fake hlist consisting of a single headless node * @n: Node to make a fake list out of * * This makes @n appear to be its own predecessor on a headless hlist. * The point of this is to allow things like hlist_del() to work correctly * in cases where there is no list. */ static inline void hlist_add_fake(struct hlist_node *n) { n->pprev = &n->next; } /** * hlist_fake: Is this node a fake hlist? * @h: Node to check for being a self-referential fake hlist. */ static inline bool hlist_fake(struct hlist_node *h) { return h->pprev == &h->next; } /** * hlist_is_singular_node - is node the only element of the specified hlist? * @n: Node to check for singularity. * @h: Header for potentially singular list. * * Check whether the node is the only node of the head without * accessing head, thus avoiding unnecessary cache misses. */ static inline bool hlist_is_singular_node(struct hlist_node *n, struct hlist_head *h) { return !n->next && n->pprev == &h->first; } /** * hlist_move_list - Move an hlist * @old: hlist_head for old list. * @new: hlist_head for new list. * * Move a list from one list head to another. Fixup the pprev * reference of the first entry if it exists. */ static inline void hlist_move_list(struct hlist_head *old, struct hlist_head *new) { new->first = old->first; if (new->first) new->first->pprev = &new->first; old->first = NULL; } #define hlist_entry(ptr, type, member) container_of(ptr,type,member) #define hlist_for_each(pos, head) \ for (pos = (head)->first; pos ; pos = pos->next) #define hlist_for_each_safe(pos, n, head) \ for (pos = (head)->first; pos && ({ n = pos->next; 1; }); \ pos = n) #define hlist_entry_safe(ptr, type, member) \ ({ typeof(ptr) ____ptr = (ptr); \ ____ptr ? hlist_entry(____ptr, type, member) : NULL; \ }) /** * hlist_for_each_entry - iterate over list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry(pos, head, member) \ for (pos = hlist_entry_safe((head)->first, typeof(*(pos)), member);\ pos; \ pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) /** * hlist_for_each_entry_continue - iterate over a hlist continuing after current point * @pos: the type * to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry_continue(pos, member) \ for (pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member);\ pos; \ pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) /** * hlist_for_each_entry_from - iterate over a hlist continuing from current point * @pos: the type * to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry_from(pos, member) \ for (; pos; \ pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) /** * hlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry * @pos: the type * to use as a loop cursor. * @n: a &struct hlist_node to use as temporary storage * @head: the head for your list. * @member: the name of the hlist_node within the struct. */ #define hlist_for_each_entry_safe(pos, n, head, member) \ for (pos = hlist_entry_safe((head)->first, typeof(*pos), member);\ pos && ({ n = pos->member.next; 1; }); \ pos = hlist_entry_safe(n, typeof(*pos), member)) #endif PK ! p�e rwlock_types.hnu �[��� #ifndef __LINUX_RWLOCK_TYPES_H #define __LINUX_RWLOCK_TYPES_H #if !defined(__LINUX_SPINLOCK_TYPES_H) # error "Do not include directly, include spinlock_types.h" #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC # define RW_DEP_MAP_INIT(lockname) \ .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_CONFIG, \ } #else # define RW_DEP_MAP_INIT(lockname) #endif #ifndef CONFIG_PREEMPT_RT /* * generic rwlock type definitions and initializers * * portions Copyright 2005, Red Hat, Inc., Ingo Molnar * Released under the General Public License (GPL). */ typedef struct { arch_rwlock_t raw_lock; #ifdef CONFIG_DEBUG_SPINLOCK unsigned int magic, owner_cpu; void *owner; #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif } rwlock_t; #define RWLOCK_MAGIC 0xdeaf1eed #ifdef CONFIG_DEBUG_SPINLOCK #define __RW_LOCK_UNLOCKED(lockname) \ (rwlock_t) { .raw_lock = __ARCH_RW_LOCK_UNLOCKED, \ .magic = RWLOCK_MAGIC, \ .owner = SPINLOCK_OWNER_INIT, \ .owner_cpu = -1, \ RW_DEP_MAP_INIT(lockname) } #else #define __RW_LOCK_UNLOCKED(lockname) \ (rwlock_t) { .raw_lock = __ARCH_RW_LOCK_UNLOCKED, \ RW_DEP_MAP_INIT(lockname) } #endif #define DEFINE_RWLOCK(x) rwlock_t x = __RW_LOCK_UNLOCKED(x) #else /* !CONFIG_PREEMPT_RT */ #include <linux/rwbase_rt.h> typedef struct { struct rwbase_rt rwbase; atomic_t readers; #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif } rwlock_t; #define __RWLOCK_RT_INITIALIZER(name) \ { \ .rwbase = __RWBASE_INITIALIZER(name), \ RW_DEP_MAP_INIT(name) \ } #define __RW_LOCK_UNLOCKED(name) __RWLOCK_RT_INITIALIZER(name) #define DEFINE_RWLOCK(name) \ rwlock_t name = __RW_LOCK_UNLOCKED(name) #endif /* CONFIG_PREEMPT_RT */ #endif /* __LINUX_RWLOCK_TYPES_H */ PK ! �z��� � irqbypass.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * IRQ offload/bypass manager * * Copyright (C) 2015 Red Hat, Inc. * Copyright (c) 2015 Linaro Ltd. */ #ifndef IRQBYPASS_H #define IRQBYPASS_H #include <linux/list.h> struct irq_bypass_consumer; /* * Theory of operation * * The IRQ bypass manager is a simple set of lists and callbacks that allows * IRQ producers (ex. physical interrupt sources) to be matched to IRQ * consumers (ex. virtualization hardware that allows IRQ bypass or offload) * via a shared token (ex. eventfd_ctx). Producers and consumers register * independently. When a token match is found, the optional @stop callback * will be called for each participant. The pair will then be connected via * the @add_* callbacks, and finally the optional @start callback will allow * any final coordination. When either participant is unregistered, the * process is repeated using the @del_* callbacks in place of the @add_* * callbacks. Match tokens must be unique per producer/consumer, 1:N pairings * are not supported. */ /** * struct irq_bypass_producer - IRQ bypass producer definition * @node: IRQ bypass manager private list management * @token: opaque token to match between producer and consumer (non-NULL) * @irq: Linux IRQ number for the producer device * @add_consumer: Connect the IRQ producer to an IRQ consumer (optional) * @del_consumer: Disconnect the IRQ producer from an IRQ consumer (optional) * @stop: Perform any quiesce operations necessary prior to add/del (optional) * @start: Perform any startup operations necessary after add/del (optional) * * The IRQ bypass producer structure represents an interrupt source for * participation in possible host bypass, for instance an interrupt vector * for a physical device assigned to a VM. */ struct irq_bypass_producer { struct list_head node; void *token; int irq; int (*add_consumer)(struct irq_bypass_producer *, struct irq_bypass_consumer *); void (*del_consumer)(struct irq_bypass_producer *, struct irq_bypass_consumer *); void (*stop)(struct irq_bypass_producer *); void (*start)(struct irq_bypass_producer *); }; /** * struct irq_bypass_consumer - IRQ bypass consumer definition * @node: IRQ bypass manager private list management * @token: opaque token to match between producer and consumer (non-NULL) * @add_producer: Connect the IRQ consumer to an IRQ producer * @del_producer: Disconnect the IRQ consumer from an IRQ producer * @stop: Perform any quiesce operations necessary prior to add/del (optional) * @start: Perform any startup operations necessary after add/del (optional) * * The IRQ bypass consumer structure represents an interrupt sink for * participation in possible host bypass, for instance a hypervisor may * support offloads to allow bypassing the host entirely or offload * portions of the interrupt handling to the VM. */ struct irq_bypass_consumer { struct list_head node; void *token; int (*add_producer)(struct irq_bypass_consumer *, struct irq_bypass_producer *); void (*del_producer)(struct irq_bypass_consumer *, struct irq_bypass_producer *); void (*stop)(struct irq_bypass_consumer *); void (*start)(struct irq_bypass_consumer *); }; int irq_bypass_register_producer(struct irq_bypass_producer *); void irq_bypass_unregister_producer(struct irq_bypass_producer *); int irq_bypass_register_consumer(struct irq_bypass_consumer *); void irq_bypass_unregister_consumer(struct irq_bypass_consumer *); #endif /* IRQBYPASS_H */ PK ! �$�� � crash_core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_CRASH_CORE_H #define LINUX_CRASH_CORE_H #include <linux/linkage.h> #include <linux/elfcore.h> #include <linux/elf.h> #define CRASH_CORE_NOTE_NAME "CORE" #define CRASH_CORE_NOTE_HEAD_BYTES ALIGN(sizeof(struct elf_note), 4) #define CRASH_CORE_NOTE_NAME_BYTES ALIGN(sizeof(CRASH_CORE_NOTE_NAME), 4) #define CRASH_CORE_NOTE_DESC_BYTES ALIGN(sizeof(struct elf_prstatus), 4) /* * The per-cpu notes area is a list of notes terminated by a "NULL" * note header. For kdump, the code in vmcore.c runs in the context * of the second kernel to combine them into one note. */ #define CRASH_CORE_NOTE_BYTES ((CRASH_CORE_NOTE_HEAD_BYTES * 2) + \ CRASH_CORE_NOTE_NAME_BYTES + \ CRASH_CORE_NOTE_DESC_BYTES) #define VMCOREINFO_BYTES PAGE_SIZE #define VMCOREINFO_NOTE_NAME "VMCOREINFO" #define VMCOREINFO_NOTE_NAME_BYTES ALIGN(sizeof(VMCOREINFO_NOTE_NAME), 4) #define VMCOREINFO_NOTE_SIZE ((CRASH_CORE_NOTE_HEAD_BYTES * 2) + \ VMCOREINFO_NOTE_NAME_BYTES + \ VMCOREINFO_BYTES) typedef u32 note_buf_t[CRASH_CORE_NOTE_BYTES/4]; void crash_update_vmcoreinfo_safecopy(void *ptr); void crash_save_vmcoreinfo(void); void arch_crash_save_vmcoreinfo(void); __printf(1, 2) void vmcoreinfo_append_str(const char *fmt, ...); phys_addr_t paddr_vmcoreinfo_note(void); #define VMCOREINFO_OSRELEASE(value) \ vmcoreinfo_append_str("OSRELEASE=%s\n", value) #define VMCOREINFO_BUILD_ID() \ ({ \ static_assert(sizeof(vmlinux_build_id) == 20); \ vmcoreinfo_append_str("BUILD-ID=%20phN\n", vmlinux_build_id); \ }) #define VMCOREINFO_PAGESIZE(value) \ vmcoreinfo_append_str("PAGESIZE=%ld\n", value) #define VMCOREINFO_SYMBOL(name) \ vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)&name) #define VMCOREINFO_SYMBOL_ARRAY(name) \ vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)name) #define VMCOREINFO_SIZE(name) \ vmcoreinfo_append_str("SIZE(%s)=%lu\n", #name, \ (unsigned long)sizeof(name)) #define VMCOREINFO_STRUCT_SIZE(name) \ vmcoreinfo_append_str("SIZE(%s)=%lu\n", #name, \ (unsigned long)sizeof(struct name)) #define VMCOREINFO_OFFSET(name, field) \ vmcoreinfo_append_str("OFFSET(%s.%s)=%lu\n", #name, #field, \ (unsigned long)offsetof(struct name, field)) #define VMCOREINFO_TYPE_OFFSET(name, field) \ vmcoreinfo_append_str("OFFSET(%s.%s)=%lu\n", #name, #field, \ (unsigned long)offsetof(name, field)) #define VMCOREINFO_LENGTH(name, value) \ vmcoreinfo_append_str("LENGTH(%s)=%lu\n", #name, (unsigned long)value) #define VMCOREINFO_NUMBER(name) \ vmcoreinfo_append_str("NUMBER(%s)=%ld\n", #name, (long)name) #define VMCOREINFO_CONFIG(name) \ vmcoreinfo_append_str("CONFIG_%s=y\n", #name) extern unsigned char *vmcoreinfo_data; extern size_t vmcoreinfo_size; extern u32 *vmcoreinfo_note; Elf_Word *append_elf_note(Elf_Word *buf, char *name, unsigned int type, void *data, size_t data_len); void final_note(Elf_Word *buf); int __init parse_crashkernel(char *cmdline, unsigned long long system_ram, unsigned long long *crash_size, unsigned long long *crash_base); int parse_crashkernel_high(char *cmdline, unsigned long long system_ram, unsigned long long *crash_size, unsigned long long *crash_base); int parse_crashkernel_low(char *cmdline, unsigned long long system_ram, unsigned long long *crash_size, unsigned long long *crash_base); #endif /* LINUX_CRASH_CORE_H */ PK ! J��N�a �a fsl_ifc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Freescale Integrated Flash Controller * * Copyright 2011 Freescale Semiconductor, Inc * * Author: Dipen Dudhat <dipen.dudhat@freescale.com> */ #ifndef __ASM_FSL_IFC_H #define __ASM_FSL_IFC_H #include <linux/compiler.h> #include <linux/types.h> #include <linux/io.h> #include <linux/of_platform.h> #include <linux/interrupt.h> /* * The actual number of banks implemented depends on the IFC version * - IFC version 1.0 implements 4 banks. * - IFC version 1.1 onward implements 8 banks. */ #define FSL_IFC_BANK_COUNT 8 #define FSL_IFC_VERSION_MASK 0x0F0F0000 #define FSL_IFC_VERSION_1_0_0 0x01000000 #define FSL_IFC_VERSION_1_1_0 0x01010000 #define FSL_IFC_VERSION_2_0_0 0x02000000 #define PGOFFSET_64K (64*1024) #define PGOFFSET_4K (4*1024) /* * CSPR - Chip Select Property Register */ #define CSPR_BA 0xFFFF0000 #define CSPR_BA_SHIFT 16 #define CSPR_PORT_SIZE 0x00000180 #define CSPR_PORT_SIZE_SHIFT 7 /* Port Size 8 bit */ #define CSPR_PORT_SIZE_8 0x00000080 /* Port Size 16 bit */ #define CSPR_PORT_SIZE_16 0x00000100 /* Port Size 32 bit */ #define CSPR_PORT_SIZE_32 0x00000180 /* Write Protect */ #define CSPR_WP 0x00000040 #define CSPR_WP_SHIFT 6 /* Machine Select */ #define CSPR_MSEL 0x00000006 #define CSPR_MSEL_SHIFT 1 /* NOR */ #define CSPR_MSEL_NOR 0x00000000 /* NAND */ #define CSPR_MSEL_NAND 0x00000002 /* GPCM */ #define CSPR_MSEL_GPCM 0x00000004 /* Bank Valid */ #define CSPR_V 0x00000001 #define CSPR_V_SHIFT 0 /* * Address Mask Register */ #define IFC_AMASK_MASK 0xFFFF0000 #define IFC_AMASK_SHIFT 16 #define IFC_AMASK(n) (IFC_AMASK_MASK << \ (__ilog2(n) - IFC_AMASK_SHIFT)) /* * Chip Select Option Register IFC_NAND Machine */ /* Enable ECC Encoder */ #define CSOR_NAND_ECC_ENC_EN 0x80000000 #define CSOR_NAND_ECC_MODE_MASK 0x30000000 /* 4 bit correction per 520 Byte sector */ #define CSOR_NAND_ECC_MODE_4 0x00000000 /* 8 bit correction per 528 Byte sector */ #define CSOR_NAND_ECC_MODE_8 0x10000000 /* Enable ECC Decoder */ #define CSOR_NAND_ECC_DEC_EN 0x04000000 /* Row Address Length */ #define CSOR_NAND_RAL_MASK 0x01800000 #define CSOR_NAND_RAL_SHIFT 20 #define CSOR_NAND_RAL_1 0x00000000 #define CSOR_NAND_RAL_2 0x00800000 #define CSOR_NAND_RAL_3 0x01000000 #define CSOR_NAND_RAL_4 0x01800000 /* Page Size 512b, 2k, 4k */ #define CSOR_NAND_PGS_MASK 0x00180000 #define CSOR_NAND_PGS_SHIFT 16 #define CSOR_NAND_PGS_512 0x00000000 #define CSOR_NAND_PGS_2K 0x00080000 #define CSOR_NAND_PGS_4K 0x00100000 #define CSOR_NAND_PGS_8K 0x00180000 /* Spare region Size */ #define CSOR_NAND_SPRZ_MASK 0x0000E000 #define CSOR_NAND_SPRZ_SHIFT 13 #define CSOR_NAND_SPRZ_16 0x00000000 #define CSOR_NAND_SPRZ_64 0x00002000 #define CSOR_NAND_SPRZ_128 0x00004000 #define CSOR_NAND_SPRZ_210 0x00006000 #define CSOR_NAND_SPRZ_218 0x00008000 #define CSOR_NAND_SPRZ_224 0x0000A000 #define CSOR_NAND_SPRZ_CSOR_EXT 0x0000C000 /* Pages Per Block */ #define CSOR_NAND_PB_MASK 0x00000700 #define CSOR_NAND_PB_SHIFT 8 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT) /* Time for Read Enable High to Output High Impedance */ #define CSOR_NAND_TRHZ_MASK 0x0000001C #define CSOR_NAND_TRHZ_SHIFT 2 #define CSOR_NAND_TRHZ_20 0x00000000 #define CSOR_NAND_TRHZ_40 0x00000004 #define CSOR_NAND_TRHZ_60 0x00000008 #define CSOR_NAND_TRHZ_80 0x0000000C #define CSOR_NAND_TRHZ_100 0x00000010 /* Buffer control disable */ #define CSOR_NAND_BCTLD 0x00000001 /* * Chip Select Option Register - NOR Flash Mode */ /* Enable Address shift Mode */ #define CSOR_NOR_ADM_SHFT_MODE_EN 0x80000000 /* Page Read Enable from NOR device */ #define CSOR_NOR_PGRD_EN 0x10000000 /* AVD Toggle Enable during Burst Program */ #define CSOR_NOR_AVD_TGL_PGM_EN 0x01000000 /* Address Data Multiplexing Shift */ #define CSOR_NOR_ADM_MASK 0x0003E000 #define CSOR_NOR_ADM_SHIFT_SHIFT 13 #define CSOR_NOR_ADM_SHIFT(n) ((n) << CSOR_NOR_ADM_SHIFT_SHIFT) /* Type of the NOR device hooked */ #define CSOR_NOR_NOR_MODE_AYSNC_NOR 0x00000000 #define CSOR_NOR_NOR_MODE_AVD_NOR 0x00000020 /* Time for Read Enable High to Output High Impedance */ #define CSOR_NOR_TRHZ_MASK 0x0000001C #define CSOR_NOR_TRHZ_SHIFT 2 #define CSOR_NOR_TRHZ_20 0x00000000 #define CSOR_NOR_TRHZ_40 0x00000004 #define CSOR_NOR_TRHZ_60 0x00000008 #define CSOR_NOR_TRHZ_80 0x0000000C #define CSOR_NOR_TRHZ_100 0x00000010 /* Buffer control disable */ #define CSOR_NOR_BCTLD 0x00000001 /* * Chip Select Option Register - GPCM Mode */ /* GPCM Mode - Normal */ #define CSOR_GPCM_GPMODE_NORMAL 0x00000000 /* GPCM Mode - GenericASIC */ #define CSOR_GPCM_GPMODE_ASIC 0x80000000 /* Parity Mode odd/even */ #define CSOR_GPCM_PARITY_EVEN 0x40000000 /* Parity Checking enable/disable */ #define CSOR_GPCM_PAR_EN 0x20000000 /* GPCM Timeout Count */ #define CSOR_GPCM_GPTO_MASK 0x0F000000 #define CSOR_GPCM_GPTO_SHIFT 24 #define CSOR_GPCM_GPTO(n) ((__ilog2(n) - 8) << CSOR_GPCM_GPTO_SHIFT) /* GPCM External Access Termination mode for read access */ #define CSOR_GPCM_RGETA_EXT 0x00080000 /* GPCM External Access Termination mode for write access */ #define CSOR_GPCM_WGETA_EXT 0x00040000 /* Address Data Multiplexing Shift */ #define CSOR_GPCM_ADM_MASK 0x0003E000 #define CSOR_GPCM_ADM_SHIFT_SHIFT 13 #define CSOR_GPCM_ADM_SHIFT(n) ((n) << CSOR_GPCM_ADM_SHIFT_SHIFT) /* Generic ASIC Parity error indication delay */ #define CSOR_GPCM_GAPERRD_MASK 0x00000180 #define CSOR_GPCM_GAPERRD_SHIFT 7 #define CSOR_GPCM_GAPERRD(n) (((n) - 1) << CSOR_GPCM_GAPERRD_SHIFT) /* Time for Read Enable High to Output High Impedance */ #define CSOR_GPCM_TRHZ_MASK 0x0000001C #define CSOR_GPCM_TRHZ_20 0x00000000 #define CSOR_GPCM_TRHZ_40 0x00000004 #define CSOR_GPCM_TRHZ_60 0x00000008 #define CSOR_GPCM_TRHZ_80 0x0000000C #define CSOR_GPCM_TRHZ_100 0x00000010 /* Buffer control disable */ #define CSOR_GPCM_BCTLD 0x00000001 /* * Ready Busy Status Register (RB_STAT) */ /* CSn is READY */ #define IFC_RB_STAT_READY_CS0 0x80000000 #define IFC_RB_STAT_READY_CS1 0x40000000 #define IFC_RB_STAT_READY_CS2 0x20000000 #define IFC_RB_STAT_READY_CS3 0x10000000 /* * General Control Register (GCR) */ #define IFC_GCR_MASK 0x8000F800 /* reset all IFC hardware */ #define IFC_GCR_SOFT_RST_ALL 0x80000000 /* Turnaroud Time of external buffer */ #define IFC_GCR_TBCTL_TRN_TIME 0x0000F800 #define IFC_GCR_TBCTL_TRN_TIME_SHIFT 11 /* * Common Event and Error Status Register (CM_EVTER_STAT) */ /* Chip select error */ #define IFC_CM_EVTER_STAT_CSER 0x80000000 /* * Common Event and Error Enable Register (CM_EVTER_EN) */ /* Chip select error checking enable */ #define IFC_CM_EVTER_EN_CSEREN 0x80000000 /* * Common Event and Error Interrupt Enable Register (CM_EVTER_INTR_EN) */ /* Chip select error interrupt enable */ #define IFC_CM_EVTER_INTR_EN_CSERIREN 0x80000000 /* * Common Transfer Error Attribute Register-0 (CM_ERATTR0) */ /* transaction type of error Read/Write */ #define IFC_CM_ERATTR0_ERTYP_READ 0x80000000 #define IFC_CM_ERATTR0_ERAID 0x0FF00000 #define IFC_CM_ERATTR0_ERAID_SHIFT 20 #define IFC_CM_ERATTR0_ESRCID 0x0000FF00 #define IFC_CM_ERATTR0_ESRCID_SHIFT 8 /* * Clock Control Register (CCR) */ #define IFC_CCR_MASK 0x0F0F8800 /* Clock division ratio */ #define IFC_CCR_CLK_DIV_MASK 0x0F000000 #define IFC_CCR_CLK_DIV_SHIFT 24 #define IFC_CCR_CLK_DIV(n) ((n-1) << IFC_CCR_CLK_DIV_SHIFT) /* IFC Clock Delay */ #define IFC_CCR_CLK_DLY_MASK 0x000F0000 #define IFC_CCR_CLK_DLY_SHIFT 16 #define IFC_CCR_CLK_DLY(n) ((n) << IFC_CCR_CLK_DLY_SHIFT) /* Invert IFC clock before sending out */ #define IFC_CCR_INV_CLK_EN 0x00008000 /* Fedback IFC Clock */ #define IFC_CCR_FB_IFC_CLK_SEL 0x00000800 /* * Clock Status Register (CSR) */ /* Clk is stable */ #define IFC_CSR_CLK_STAT_STABLE 0x80000000 /* * IFC_NAND Machine Specific Registers */ /* * NAND Configuration Register (NCFGR) */ /* Auto Boot Mode */ #define IFC_NAND_NCFGR_BOOT 0x80000000 /* SRAM Initialization */ #define IFC_NAND_NCFGR_SRAM_INIT_EN 0x20000000 /* Addressing Mode-ROW0+n/COL0 */ #define IFC_NAND_NCFGR_ADDR_MODE_RC0 0x00000000 /* Addressing Mode-ROW0+n/COL0+n */ #define IFC_NAND_NCFGR_ADDR_MODE_RC1 0x00400000 /* Number of loop iterations of FIR sequences for multi page operations */ #define IFC_NAND_NCFGR_NUM_LOOP_MASK 0x0000F000 #define IFC_NAND_NCFGR_NUM_LOOP_SHIFT 12 #define IFC_NAND_NCFGR_NUM_LOOP(n) ((n) << IFC_NAND_NCFGR_NUM_LOOP_SHIFT) /* Number of wait cycles */ #define IFC_NAND_NCFGR_NUM_WAIT_MASK 0x000000FF #define IFC_NAND_NCFGR_NUM_WAIT_SHIFT 0 /* * NAND Flash Command Registers (NAND_FCR0/NAND_FCR1) */ /* General purpose FCM flash command bytes CMD0-CMD7 */ #define IFC_NAND_FCR0_CMD0 0xFF000000 #define IFC_NAND_FCR0_CMD0_SHIFT 24 #define IFC_NAND_FCR0_CMD1 0x00FF0000 #define IFC_NAND_FCR0_CMD1_SHIFT 16 #define IFC_NAND_FCR0_CMD2 0x0000FF00 #define IFC_NAND_FCR0_CMD2_SHIFT 8 #define IFC_NAND_FCR0_CMD3 0x000000FF #define IFC_NAND_FCR0_CMD3_SHIFT 0 #define IFC_NAND_FCR1_CMD4 0xFF000000 #define IFC_NAND_FCR1_CMD4_SHIFT 24 #define IFC_NAND_FCR1_CMD5 0x00FF0000 #define IFC_NAND_FCR1_CMD5_SHIFT 16 #define IFC_NAND_FCR1_CMD6 0x0000FF00 #define IFC_NAND_FCR1_CMD6_SHIFT 8 #define IFC_NAND_FCR1_CMD7 0x000000FF #define IFC_NAND_FCR1_CMD7_SHIFT 0 /* * Flash ROW and COL Address Register (ROWn, COLn) */ /* Main/spare region locator */ #define IFC_NAND_COL_MS 0x80000000 /* Column Address */ #define IFC_NAND_COL_CA_MASK 0x00000FFF /* * NAND Flash Byte Count Register (NAND_BC) */ /* Byte Count for read/Write */ #define IFC_NAND_BC 0x000001FF /* * NAND Flash Instruction Registers (NAND_FIR0/NAND_FIR1/NAND_FIR2) */ /* NAND Machine specific opcodes OP0-OP14*/ #define IFC_NAND_FIR0_OP0 0xFC000000 #define IFC_NAND_FIR0_OP0_SHIFT 26 #define IFC_NAND_FIR0_OP1 0x03F00000 #define IFC_NAND_FIR0_OP1_SHIFT 20 #define IFC_NAND_FIR0_OP2 0x000FC000 #define IFC_NAND_FIR0_OP2_SHIFT 14 #define IFC_NAND_FIR0_OP3 0x00003F00 #define IFC_NAND_FIR0_OP3_SHIFT 8 #define IFC_NAND_FIR0_OP4 0x000000FC #define IFC_NAND_FIR0_OP4_SHIFT 2 #define IFC_NAND_FIR1_OP5 0xFC000000 #define IFC_NAND_FIR1_OP5_SHIFT 26 #define IFC_NAND_FIR1_OP6 0x03F00000 #define IFC_NAND_FIR1_OP6_SHIFT 20 #define IFC_NAND_FIR1_OP7 0x000FC000 #define IFC_NAND_FIR1_OP7_SHIFT 14 #define IFC_NAND_FIR1_OP8 0x00003F00 #define IFC_NAND_FIR1_OP8_SHIFT 8 #define IFC_NAND_FIR1_OP9 0x000000FC #define IFC_NAND_FIR1_OP9_SHIFT 2 #define IFC_NAND_FIR2_OP10 0xFC000000 #define IFC_NAND_FIR2_OP10_SHIFT 26 #define IFC_NAND_FIR2_OP11 0x03F00000 #define IFC_NAND_FIR2_OP11_SHIFT 20 #define IFC_NAND_FIR2_OP12 0x000FC000 #define IFC_NAND_FIR2_OP12_SHIFT 14 #define IFC_NAND_FIR2_OP13 0x00003F00 #define IFC_NAND_FIR2_OP13_SHIFT 8 #define IFC_NAND_FIR2_OP14 0x000000FC #define IFC_NAND_FIR2_OP14_SHIFT 2 /* * Instruction opcodes to be programmed * in FIR registers- 6bits */ enum ifc_nand_fir_opcodes { IFC_FIR_OP_NOP, IFC_FIR_OP_CA0, IFC_FIR_OP_CA1, IFC_FIR_OP_CA2, IFC_FIR_OP_CA3, IFC_FIR_OP_RA0, IFC_FIR_OP_RA1, IFC_FIR_OP_RA2, IFC_FIR_OP_RA3, IFC_FIR_OP_CMD0, IFC_FIR_OP_CMD1, IFC_FIR_OP_CMD2, IFC_FIR_OP_CMD3, IFC_FIR_OP_CMD4, IFC_FIR_OP_CMD5, IFC_FIR_OP_CMD6, IFC_FIR_OP_CMD7, IFC_FIR_OP_CW0, IFC_FIR_OP_CW1, IFC_FIR_OP_CW2, IFC_FIR_OP_CW3, IFC_FIR_OP_CW4, IFC_FIR_OP_CW5, IFC_FIR_OP_CW6, IFC_FIR_OP_CW7, IFC_FIR_OP_WBCD, IFC_FIR_OP_RBCD, IFC_FIR_OP_BTRD, IFC_FIR_OP_RDSTAT, IFC_FIR_OP_NWAIT, IFC_FIR_OP_WFR, IFC_FIR_OP_SBRD, IFC_FIR_OP_UA, IFC_FIR_OP_RB, }; /* * NAND Chip Select Register (NAND_CSEL) */ #define IFC_NAND_CSEL 0x0C000000 #define IFC_NAND_CSEL_SHIFT 26 #define IFC_NAND_CSEL_CS0 0x00000000 #define IFC_NAND_CSEL_CS1 0x04000000 #define IFC_NAND_CSEL_CS2 0x08000000 #define IFC_NAND_CSEL_CS3 0x0C000000 /* * NAND Operation Sequence Start (NANDSEQ_STRT) */ /* NAND Flash Operation Start */ #define IFC_NAND_SEQ_STRT_FIR_STRT 0x80000000 /* Automatic Erase */ #define IFC_NAND_SEQ_STRT_AUTO_ERS 0x00800000 /* Automatic Program */ #define IFC_NAND_SEQ_STRT_AUTO_PGM 0x00100000 /* Automatic Copyback */ #define IFC_NAND_SEQ_STRT_AUTO_CPB 0x00020000 /* Automatic Read Operation */ #define IFC_NAND_SEQ_STRT_AUTO_RD 0x00004000 /* Automatic Status Read */ #define IFC_NAND_SEQ_STRT_AUTO_STAT_RD 0x00000800 /* * NAND Event and Error Status Register (NAND_EVTER_STAT) */ /* Operation Complete */ #define IFC_NAND_EVTER_STAT_OPC 0x80000000 /* Flash Timeout Error */ #define IFC_NAND_EVTER_STAT_FTOER 0x08000000 /* Write Protect Error */ #define IFC_NAND_EVTER_STAT_WPER 0x04000000 /* ECC Error */ #define IFC_NAND_EVTER_STAT_ECCER 0x02000000 /* RCW Load Done */ #define IFC_NAND_EVTER_STAT_RCW_DN 0x00008000 /* Boot Loadr Done */ #define IFC_NAND_EVTER_STAT_BOOT_DN 0x00004000 /* Bad Block Indicator search select */ #define IFC_NAND_EVTER_STAT_BBI_SRCH_SE 0x00000800 /* * NAND Flash Page Read Completion Event Status Register * (PGRDCMPL_EVT_STAT) */ #define PGRDCMPL_EVT_STAT_MASK 0xFFFF0000 /* Small Page 0-15 Done */ #define PGRDCMPL_EVT_STAT_SECTION_SP(n) (1 << (31 - (n))) /* Large Page(2K) 0-3 Done */ #define PGRDCMPL_EVT_STAT_LP_2K(n) (0xF << (28 - (n)*4)) /* Large Page(4K) 0-1 Done */ #define PGRDCMPL_EVT_STAT_LP_4K(n) (0xFF << (24 - (n)*8)) /* * NAND Event and Error Enable Register (NAND_EVTER_EN) */ /* Operation complete event enable */ #define IFC_NAND_EVTER_EN_OPC_EN 0x80000000 /* Page read complete event enable */ #define IFC_NAND_EVTER_EN_PGRDCMPL_EN 0x20000000 /* Flash Timeout error enable */ #define IFC_NAND_EVTER_EN_FTOER_EN 0x08000000 /* Write Protect error enable */ #define IFC_NAND_EVTER_EN_WPER_EN 0x04000000 /* ECC error logging enable */ #define IFC_NAND_EVTER_EN_ECCER_EN 0x02000000 /* * NAND Event and Error Interrupt Enable Register (NAND_EVTER_INTR_EN) */ /* Enable interrupt for operation complete */ #define IFC_NAND_EVTER_INTR_OPCIR_EN 0x80000000 /* Enable interrupt for Page read complete */ #define IFC_NAND_EVTER_INTR_PGRDCMPLIR_EN 0x20000000 /* Enable interrupt for Flash timeout error */ #define IFC_NAND_EVTER_INTR_FTOERIR_EN 0x08000000 /* Enable interrupt for Write protect error */ #define IFC_NAND_EVTER_INTR_WPERIR_EN 0x04000000 /* Enable interrupt for ECC error*/ #define IFC_NAND_EVTER_INTR_ECCERIR_EN 0x02000000 /* * NAND Transfer Error Attribute Register-0 (NAND_ERATTR0) */ #define IFC_NAND_ERATTR0_MASK 0x0C080000 /* Error on CS0-3 for NAND */ #define IFC_NAND_ERATTR0_ERCS_CS0 0x00000000 #define IFC_NAND_ERATTR0_ERCS_CS1 0x04000000 #define IFC_NAND_ERATTR0_ERCS_CS2 0x08000000 #define IFC_NAND_ERATTR0_ERCS_CS3 0x0C000000 /* Transaction type of error Read/Write */ #define IFC_NAND_ERATTR0_ERTTYPE_READ 0x00080000 /* * NAND Flash Status Register (NAND_FSR) */ /* First byte of data read from read status op */ #define IFC_NAND_NFSR_RS0 0xFF000000 /* Second byte of data read from read status op */ #define IFC_NAND_NFSR_RS1 0x00FF0000 /* * ECC Error Status Registers (ECCSTAT0-ECCSTAT3) */ /* Number of ECC errors on sector n (n = 0-15) */ #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_MASK 0x0F000000 #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_SHIFT 24 #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_MASK 0x000F0000 #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_SHIFT 16 #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_MASK 0x00000F00 #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_SHIFT 8 #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_MASK 0x0000000F #define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_SHIFT 0 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_MASK 0x0F000000 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_SHIFT 24 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_MASK 0x000F0000 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_SHIFT 16 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_MASK 0x00000F00 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_SHIFT 8 #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_MASK 0x0000000F #define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_SHIFT 0 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_MASK 0x0F000000 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_SHIFT 24 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_MASK 0x000F0000 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_SHIFT 16 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_MASK 0x00000F00 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_SHIFT 8 #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_MASK 0x0000000F #define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_SHIFT 0 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_MASK 0x0F000000 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_SHIFT 24 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_MASK 0x000F0000 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_SHIFT 16 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_MASK 0x00000F00 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_SHIFT 8 #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_MASK 0x0000000F #define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_SHIFT 0 /* * NAND Control Register (NANDCR) */ #define IFC_NAND_NCR_FTOCNT_MASK 0x1E000000 #define IFC_NAND_NCR_FTOCNT_SHIFT 25 #define IFC_NAND_NCR_FTOCNT(n) ((_ilog2(n) - 8) << IFC_NAND_NCR_FTOCNT_SHIFT) /* * NAND_AUTOBOOT_TRGR */ /* Trigger RCW load */ #define IFC_NAND_AUTOBOOT_TRGR_RCW_LD 0x80000000 /* Trigget Auto Boot */ #define IFC_NAND_AUTOBOOT_TRGR_BOOT_LD 0x20000000 /* * NAND_MDR */ /* 1st read data byte when opcode SBRD */ #define IFC_NAND_MDR_RDATA0 0xFF000000 /* 2nd read data byte when opcode SBRD */ #define IFC_NAND_MDR_RDATA1 0x00FF0000 /* * NOR Machine Specific Registers */ /* * NOR Event and Error Status Register (NOR_EVTER_STAT) */ /* NOR Command Sequence Operation Complete */ #define IFC_NOR_EVTER_STAT_OPC_NOR 0x80000000 /* Write Protect Error */ #define IFC_NOR_EVTER_STAT_WPER 0x04000000 /* Command Sequence Timeout Error */ #define IFC_NOR_EVTER_STAT_STOER 0x01000000 /* * NOR Event and Error Enable Register (NOR_EVTER_EN) */ /* NOR Command Seq complete event enable */ #define IFC_NOR_EVTER_EN_OPCEN_NOR 0x80000000 /* Write Protect Error Checking Enable */ #define IFC_NOR_EVTER_EN_WPEREN 0x04000000 /* Timeout Error Enable */ #define IFC_NOR_EVTER_EN_STOEREN 0x01000000 /* * NOR Event and Error Interrupt Enable Register (NOR_EVTER_INTR_EN) */ /* Enable interrupt for OPC complete */ #define IFC_NOR_EVTER_INTR_OPCEN_NOR 0x80000000 /* Enable interrupt for write protect error */ #define IFC_NOR_EVTER_INTR_WPEREN 0x04000000 /* Enable interrupt for timeout error */ #define IFC_NOR_EVTER_INTR_STOEREN 0x01000000 /* * NOR Transfer Error Attribute Register-0 (NOR_ERATTR0) */ /* Source ID for error transaction */ #define IFC_NOR_ERATTR0_ERSRCID 0xFF000000 /* AXI ID for error transation */ #define IFC_NOR_ERATTR0_ERAID 0x000FF000 /* Chip select corresponds to NOR error */ #define IFC_NOR_ERATTR0_ERCS_CS0 0x00000000 #define IFC_NOR_ERATTR0_ERCS_CS1 0x00000010 #define IFC_NOR_ERATTR0_ERCS_CS2 0x00000020 #define IFC_NOR_ERATTR0_ERCS_CS3 0x00000030 /* Type of transaction read/write */ #define IFC_NOR_ERATTR0_ERTYPE_READ 0x00000001 /* * NOR Transfer Error Attribute Register-2 (NOR_ERATTR2) */ #define IFC_NOR_ERATTR2_ER_NUM_PHASE_EXP 0x000F0000 #define IFC_NOR_ERATTR2_ER_NUM_PHASE_PER 0x00000F00 /* * NOR Control Register (NORCR) */ #define IFC_NORCR_MASK 0x0F0F0000 /* No. of Address/Data Phase */ #define IFC_NORCR_NUM_PHASE_MASK 0x0F000000 #define IFC_NORCR_NUM_PHASE_SHIFT 24 #define IFC_NORCR_NUM_PHASE(n) ((n-1) << IFC_NORCR_NUM_PHASE_SHIFT) /* Sequence Timeout Count */ #define IFC_NORCR_STOCNT_MASK 0x000F0000 #define IFC_NORCR_STOCNT_SHIFT 16 #define IFC_NORCR_STOCNT(n) ((__ilog2(n) - 8) << IFC_NORCR_STOCNT_SHIFT) /* * GPCM Machine specific registers */ /* * GPCM Event and Error Status Register (GPCM_EVTER_STAT) */ /* Timeout error */ #define IFC_GPCM_EVTER_STAT_TOER 0x04000000 /* Parity error */ #define IFC_GPCM_EVTER_STAT_PER 0x01000000 /* * GPCM Event and Error Enable Register (GPCM_EVTER_EN) */ /* Timeout error enable */ #define IFC_GPCM_EVTER_EN_TOER_EN 0x04000000 /* Parity error enable */ #define IFC_GPCM_EVTER_EN_PER_EN 0x01000000 /* * GPCM Event and Error Interrupt Enable Register (GPCM_EVTER_INTR_EN) */ /* Enable Interrupt for timeout error */ #define IFC_GPCM_EEIER_TOERIR_EN 0x04000000 /* Enable Interrupt for Parity error */ #define IFC_GPCM_EEIER_PERIR_EN 0x01000000 /* * GPCM Transfer Error Attribute Register-0 (GPCM_ERATTR0) */ /* Source ID for error transaction */ #define IFC_GPCM_ERATTR0_ERSRCID 0xFF000000 /* AXI ID for error transaction */ #define IFC_GPCM_ERATTR0_ERAID 0x000FF000 /* Chip select corresponds to GPCM error */ #define IFC_GPCM_ERATTR0_ERCS_CS0 0x00000000 #define IFC_GPCM_ERATTR0_ERCS_CS1 0x00000040 #define IFC_GPCM_ERATTR0_ERCS_CS2 0x00000080 #define IFC_GPCM_ERATTR0_ERCS_CS3 0x000000C0 /* Type of transaction read/Write */ #define IFC_GPCM_ERATTR0_ERTYPE_READ 0x00000001 /* * GPCM Transfer Error Attribute Register-2 (GPCM_ERATTR2) */ /* On which beat of address/data parity error is observed */ #define IFC_GPCM_ERATTR2_PERR_BEAT 0x00000C00 /* Parity Error on byte */ #define IFC_GPCM_ERATTR2_PERR_BYTE 0x000000F0 /* Parity Error reported in addr or data phase */ #define IFC_GPCM_ERATTR2_PERR_DATA_PHASE 0x00000001 /* * GPCM Status Register (GPCM_STAT) */ #define IFC_GPCM_STAT_BSY 0x80000000 /* GPCM is busy */ /* * IFC Controller NAND Machine registers */ struct fsl_ifc_nand { __be32 ncfgr; u32 res1[0x4]; __be32 nand_fcr0; __be32 nand_fcr1; u32 res2[0x8]; __be32 row0; u32 res3; __be32 col0; u32 res4; __be32 row1; u32 res5; __be32 col1; u32 res6; __be32 row2; u32 res7; __be32 col2; u32 res8; __be32 row3; u32 res9; __be32 col3; u32 res10[0x24]; __be32 nand_fbcr; u32 res11; __be32 nand_fir0; __be32 nand_fir1; __be32 nand_fir2; u32 res12[0x10]; __be32 nand_csel; u32 res13; __be32 nandseq_strt; u32 res14; __be32 nand_evter_stat; u32 res15; __be32 pgrdcmpl_evt_stat; u32 res16[0x2]; __be32 nand_evter_en; u32 res17[0x2]; __be32 nand_evter_intr_en; __be32 nand_vol_addr_stat; u32 res18; __be32 nand_erattr0; __be32 nand_erattr1; u32 res19[0x10]; __be32 nand_fsr; u32 res20; __be32 nand_eccstat[8]; u32 res21[0x1c]; __be32 nanndcr; u32 res22[0x2]; __be32 nand_autoboot_trgr; u32 res23; __be32 nand_mdr; u32 res24[0x1C]; __be32 nand_dll_lowcfg0; __be32 nand_dll_lowcfg1; u32 res25; __be32 nand_dll_lowstat; u32 res26[0x3c]; }; /* * IFC controller NOR Machine registers */ struct fsl_ifc_nor { __be32 nor_evter_stat; u32 res1[0x2]; __be32 nor_evter_en; u32 res2[0x2]; __be32 nor_evter_intr_en; u32 res3[0x2]; __be32 nor_erattr0; __be32 nor_erattr1; __be32 nor_erattr2; u32 res4[0x4]; __be32 norcr; u32 res5[0xEF]; }; /* * IFC controller GPCM Machine registers */ struct fsl_ifc_gpcm { __be32 gpcm_evter_stat; u32 res1[0x2]; __be32 gpcm_evter_en; u32 res2[0x2]; __be32 gpcm_evter_intr_en; u32 res3[0x2]; __be32 gpcm_erattr0; __be32 gpcm_erattr1; __be32 gpcm_erattr2; __be32 gpcm_stat; }; /* * IFC Controller Registers */ struct fsl_ifc_global { __be32 ifc_rev; u32 res1[0x2]; struct { __be32 cspr_ext; __be32 cspr; u32 res2; } cspr_cs[FSL_IFC_BANK_COUNT]; u32 res3[0xd]; struct { __be32 amask; u32 res4[0x2]; } amask_cs[FSL_IFC_BANK_COUNT]; u32 res5[0xc]; struct { __be32 csor; __be32 csor_ext; u32 res6; } csor_cs[FSL_IFC_BANK_COUNT]; u32 res7[0xc]; struct { __be32 ftim[4]; u32 res8[0x8]; } ftim_cs[FSL_IFC_BANK_COUNT]; u32 res9[0x30]; __be32 rb_stat; __be32 rb_map; __be32 wb_map; __be32 ifc_gcr; u32 res10[0x2]; __be32 cm_evter_stat; u32 res11[0x2]; __be32 cm_evter_en; u32 res12[0x2]; __be32 cm_evter_intr_en; u32 res13[0x2]; __be32 cm_erattr0; __be32 cm_erattr1; u32 res14[0x2]; __be32 ifc_ccr; __be32 ifc_csr; __be32 ddr_ccr_low; }; struct fsl_ifc_runtime { struct fsl_ifc_nand ifc_nand; struct fsl_ifc_nor ifc_nor; struct fsl_ifc_gpcm ifc_gpcm; }; extern unsigned int convert_ifc_address(phys_addr_t addr_base); extern int fsl_ifc_find(phys_addr_t addr_base); /* overview of the fsl ifc controller */ struct fsl_ifc_ctrl { /* device info */ struct device *dev; struct fsl_ifc_global __iomem *gregs; struct fsl_ifc_runtime __iomem *rregs; int irq; int nand_irq; spinlock_t lock; void *nand; int version; int banks; u32 nand_stat; wait_queue_head_t nand_wait; bool little_endian; }; extern struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev; static inline u32 ifc_in32(void __iomem *addr) { u32 val; if (fsl_ifc_ctrl_dev->little_endian) val = ioread32(addr); else val = ioread32be(addr); return val; } static inline u16 ifc_in16(void __iomem *addr) { u16 val; if (fsl_ifc_ctrl_dev->little_endian) val = ioread16(addr); else val = ioread16be(addr); return val; } static inline u8 ifc_in8(void __iomem *addr) { return ioread8(addr); } static inline void ifc_out32(u32 val, void __iomem *addr) { if (fsl_ifc_ctrl_dev->little_endian) iowrite32(val, addr); else iowrite32be(val, addr); } static inline void ifc_out16(u16 val, void __iomem *addr) { if (fsl_ifc_ctrl_dev->little_endian) iowrite16(val, addr); else iowrite16be(val, addr); } static inline void ifc_out8(u8 val, void __iomem *addr) { iowrite8(val, addr); } #endif /* __ASM_FSL_IFC_H */ PK ! �j� � � shm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SHM_H_ #define _LINUX_SHM_H_ #include <linux/list.h> #include <asm/page.h> #include <uapi/linux/shm.h> #include <asm/shmparam.h> struct file; #ifdef CONFIG_SYSVIPC struct sysv_shm { struct list_head shm_clist; }; long do_shmat(int shmid, char __user *shmaddr, int shmflg, unsigned long *addr, unsigned long shmlba); bool is_file_shm_hugepages(struct file *file); void exit_shm(struct task_struct *task); #define shm_init_task(task) INIT_LIST_HEAD(&(task)->sysvshm.shm_clist) #else struct sysv_shm { /* empty */ }; static inline long do_shmat(int shmid, char __user *shmaddr, int shmflg, unsigned long *addr, unsigned long shmlba) { return -ENOSYS; } static inline bool is_file_shm_hugepages(struct file *file) { return false; } static inline void exit_shm(struct task_struct *task) { } static inline void shm_init_task(struct task_struct *task) { } #endif #endif /* _LINUX_SHM_H_ */ PK ! �� h h c2port.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Silicon Labs C2 port Linux support * * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it> * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it> */ #define C2PORT_NAME_LEN 32 struct device; /* * C2 port basic structs */ /* Main struct */ struct c2port_ops; struct c2port_device { unsigned int access:1; unsigned int flash_access:1; int id; char name[C2PORT_NAME_LEN]; struct c2port_ops *ops; struct mutex mutex; /* prevent races during read/write */ struct device *dev; void *private_data; }; /* Basic operations */ struct c2port_ops { /* Flash layout */ unsigned short block_size; /* flash block size in bytes */ unsigned short blocks_num; /* flash blocks number */ /* Enable or disable the access to C2 port */ void (*access)(struct c2port_device *dev, int status); /* Set C2D data line as input/output */ void (*c2d_dir)(struct c2port_device *dev, int dir); /* Read/write C2D data line */ int (*c2d_get)(struct c2port_device *dev); void (*c2d_set)(struct c2port_device *dev, int status); /* Write C2CK clock line */ void (*c2ck_set)(struct c2port_device *dev, int status); }; /* * Exported functions */ extern struct c2port_device *c2port_device_register(char *name, struct c2port_ops *ops, void *devdata); extern void c2port_device_unregister(struct c2port_device *dev); PK ! ���~� � hid-sensor-ids.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * HID Sensors Driver * Copyright (c) 2012, Intel Corporation. */ #ifndef _HID_SENSORS_IDS_H #define _HID_SENSORS_IDS_H #define HID_MAX_PHY_DEVICES 0xFF #define HID_USAGE_SENSOR_COLLECTION 0x200001 /* Accel 3D (200073) */ #define HID_USAGE_SENSOR_ACCEL_3D 0x200073 #define HID_USAGE_SENSOR_DATA_ACCELERATION 0x200452 #define HID_USAGE_SENSOR_ACCEL_X_AXIS 0x200453 #define HID_USAGE_SENSOR_ACCEL_Y_AXIS 0x200454 #define HID_USAGE_SENSOR_ACCEL_Z_AXIS 0x200455 /* ALS (200041) */ #define HID_USAGE_SENSOR_ALS 0x200041 #define HID_USAGE_SENSOR_DATA_LIGHT 0x2004d0 #define HID_USAGE_SENSOR_LIGHT_ILLUM 0x2004d1 /* PROX (200011) */ #define HID_USAGE_SENSOR_PROX 0x200011 #define HID_USAGE_SENSOR_DATA_PRESENCE 0x2004b0 #define HID_USAGE_SENSOR_HUMAN_PRESENCE 0x2004b1 /* Pressure (200031) */ #define HID_USAGE_SENSOR_PRESSURE 0x200031 #define HID_USAGE_SENSOR_DATA_ATMOSPHERIC_PRESSURE 0x200430 #define HID_USAGE_SENSOR_ATMOSPHERIC_PRESSURE 0x200431 /* Tempreture (200033) */ #define HID_USAGE_SENSOR_TEMPERATURE 0x200033 #define HID_USAGE_SENSOR_DATA_ENVIRONMENTAL_TEMPERATURE 0x200434 /* humidity */ #define HID_USAGE_SENSOR_HUMIDITY 0x200032 #define HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY 0x200433 /* Gyro 3D: (200076) */ #define HID_USAGE_SENSOR_GYRO_3D 0x200076 #define HID_USAGE_SENSOR_DATA_ANGL_VELOCITY 0x200456 #define HID_USAGE_SENSOR_ANGL_VELOCITY_X_AXIS 0x200457 #define HID_USAGE_SENSOR_ANGL_VELOCITY_Y_AXIS 0x200458 #define HID_USAGE_SENSOR_ANGL_VELOCITY_Z_AXIS 0x200459 /* Gravity vector */ #define HID_USAGE_SENSOR_GRAVITY_VECTOR 0x20007B /* ORIENTATION: Compass 3D: (200083) */ #define HID_USAGE_SENSOR_COMPASS_3D 0x200083 #define HID_USAGE_SENSOR_DATA_ORIENTATION 0x200470 #define HID_USAGE_SENSOR_ORIENT_MAGN_HEADING 0x200471 #define HID_USAGE_SENSOR_ORIENT_MAGN_HEADING_X 0x200472 #define HID_USAGE_SENSOR_ORIENT_MAGN_HEADING_Y 0x200473 #define HID_USAGE_SENSOR_ORIENT_MAGN_HEADING_Z 0x200474 #define HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH 0x200475 #define HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH 0x200476 #define HID_USAGE_SENSOR_ORIENT_MAGN_NORTH 0x200477 #define HID_USAGE_SENSOR_ORIENT_TRUE_NORTH 0x200478 #define HID_USAGE_SENSOR_ORIENT_DISTANCE 0x200479 #define HID_USAGE_SENSOR_ORIENT_DISTANCE_X 0x20047A #define HID_USAGE_SENSOR_ORIENT_DISTANCE_Y 0x20047B #define HID_USAGE_SENSOR_ORIENT_DISTANCE_Z 0x20047C #define HID_USAGE_SENSOR_ORIENT_DISTANCE_OUT_OF_RANGE 0x20047D /* ORIENTATION: Inclinometer 3D: (200086) */ #define HID_USAGE_SENSOR_INCLINOMETER_3D 0x200086 #define HID_USAGE_SENSOR_ORIENT_TILT 0x20047E #define HID_USAGE_SENSOR_ORIENT_TILT_X 0x20047F #define HID_USAGE_SENSOR_ORIENT_TILT_Y 0x200480 #define HID_USAGE_SENSOR_ORIENT_TILT_Z 0x200481 #define HID_USAGE_SENSOR_DEVICE_ORIENTATION 0x20008A #define HID_USAGE_SENSOR_RELATIVE_ORIENTATION 0x20008E #define HID_USAGE_SENSOR_GEOMAGNETIC_ORIENTATION 0x2000C1 #define HID_USAGE_SENSOR_ORIENT_ROTATION_MATRIX 0x200482 #define HID_USAGE_SENSOR_ORIENT_QUATERNION 0x200483 #define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX 0x200484 #define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS 0x200485 #define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS 0x200486 #define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS 0x200487 /* Time (2000a0) */ #define HID_USAGE_SENSOR_TIME 0x2000a0 #define HID_USAGE_SENSOR_TIME_YEAR 0x200521 #define HID_USAGE_SENSOR_TIME_MONTH 0x200522 #define HID_USAGE_SENSOR_TIME_DAY 0x200523 #define HID_USAGE_SENSOR_TIME_HOUR 0x200525 #define HID_USAGE_SENSOR_TIME_MINUTE 0x200526 #define HID_USAGE_SENSOR_TIME_SECOND 0x200527 #define HID_USAGE_SENSOR_TIME_TIMESTAMP 0x200529 /* Units */ #define HID_USAGE_SENSOR_UNITS_NOT_SPECIFIED 0x00 #define HID_USAGE_SENSOR_UNITS_LUX 0x01 #define HID_USAGE_SENSOR_UNITS_KELVIN 0x01000100 #define HID_USAGE_SENSOR_UNITS_FAHRENHEIT 0x03000100 #define HID_USAGE_SENSOR_UNITS_PASCAL 0xF1E1 #define HID_USAGE_SENSOR_UNITS_NEWTON 0x11E1 #define HID_USAGE_SENSOR_UNITS_METERS_PER_SECOND 0x11F0 #define HID_USAGE_SENSOR_UNITS_METERS_PER_SEC_SQRD 0x11E0 #define HID_USAGE_SENSOR_UNITS_FARAD 0xE14F2000 #define HID_USAGE_SENSOR_UNITS_AMPERE 0x01001000 #define HID_USAGE_SENSOR_UNITS_WATT 0x21d1 #define HID_USAGE_SENSOR_UNITS_HENRY 0x21E1E000 #define HID_USAGE_SENSOR_UNITS_OHM 0x21D1E000 #define HID_USAGE_SENSOR_UNITS_VOLT 0x21D1F000 #define HID_USAGE_SENSOR_UNITS_HERTZ 0x01F0 #define HID_USAGE_SENSOR_UNITS_DEGREES_PER_SEC_SQRD 0x14E0 #define HID_USAGE_SENSOR_UNITS_RADIANS 0x12 #define HID_USAGE_SENSOR_UNITS_RADIANS_PER_SECOND 0x12F0 #define HID_USAGE_SENSOR_UNITS_RADIANS_PER_SEC_SQRD 0x12E0 #define HID_USAGE_SENSOR_UNITS_SECOND 0x0110 #define HID_USAGE_SENSOR_UNITS_GAUSS 0x01E1F000 #define HID_USAGE_SENSOR_UNITS_GRAM 0x0101 #define HID_USAGE_SENSOR_UNITS_CENTIMETER 0x11 #define HID_USAGE_SENSOR_UNITS_G 0x1A #define HID_USAGE_SENSOR_UNITS_MILLISECOND 0x19 #define HID_USAGE_SENSOR_UNITS_PERCENT 0x17 #define HID_USAGE_SENSOR_UNITS_DEGREES 0x14 #define HID_USAGE_SENSOR_UNITS_DEGREES_PER_SECOND 0x15 /* Common selectors */ #define HID_USAGE_SENSOR_PROP_DESC 0x200300 #define HID_USAGE_SENSOR_PROP_FRIENDLY_NAME 0x200301 #define HID_USAGE_SENSOR_PROP_SERIAL_NUM 0x200307 #define HID_USAGE_SENSOR_PROP_MANUFACTURER 0x200305 #define HID_USAGE_SENSOR_PROP_REPORT_INTERVAL 0x20030E #define HID_USAGE_SENSOR_PROP_SENSITIVITY_ABS 0x20030F #define HID_USAGE_SENSOR_PROP_SENSITIVITY_RANGE_PCT 0x200310 #define HID_USAGE_SENSOR_PROP_SENSITIVITY_REL_PCT 0x200311 #define HID_USAGE_SENSOR_PROP_ACCURACY 0x200312 #define HID_USAGE_SENSOR_PROP_RESOLUTION 0x200313 #define HID_USAGE_SENSOR_PROP_RANGE_MAXIMUM 0x200314 #define HID_USAGE_SENSOR_PROP_RANGE_MINIMUM 0x200315 #define HID_USAGE_SENSOR_PROP_REPORT_STATE 0x200316 #define HID_USAGE_SENSOR_PROY_POWER_STATE 0x200319 /* Batch mode selectors */ #define HID_USAGE_SENSOR_PROP_REPORT_LATENCY 0x20031B /* Per data field properties */ #define HID_USAGE_SENSOR_DATA_MOD_NONE 0x00 #define HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS 0x1000 #define HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_REL_PCT 0xE000 /* Power state enumerations */ #define HID_USAGE_SENSOR_PROP_POWER_STATE_UNDEFINED_ENUM 0x200850 #define HID_USAGE_SENSOR_PROP_POWER_STATE_D0_FULL_POWER_ENUM 0x200851 #define HID_USAGE_SENSOR_PROP_POWER_STATE_D1_LOW_POWER_ENUM 0x200852 #define HID_USAGE_SENSOR_PROP_POWER_STATE_D2_STANDBY_WITH_WAKE_ENUM 0x200853 #define HID_USAGE_SENSOR_PROP_POWER_STATE_D3_SLEEP_WITH_WAKE_ENUM 0x200854 #define HID_USAGE_SENSOR_PROP_POWER_STATE_D4_POWER_OFF_ENUM 0x200855 /* Report State enumerations */ #define HID_USAGE_SENSOR_PROP_REPORTING_STATE_NO_EVENTS_ENUM 0x200840 #define HID_USAGE_SENSOR_PROP_REPORTING_STATE_ALL_EVENTS_ENUM 0x200841 /* Custom Sensor (2000e1) */ #define HID_USAGE_SENSOR_HINGE 0x20020B #define HID_USAGE_SENSOR_DATA_FIELD_LOCATION 0x200400 #define HID_USAGE_SENSOR_DATA_FIELE_TIME_SINCE_SYS_BOOT 0x20052B #define HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_USAGE 0x200541 #define HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE_BASE 0x200543 /* Custom Sensor data 28=>x>=0 */ #define HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE(x) \ (HID_USAGE_SENSOR_DATA_FIELD_CUSTOM_VALUE_BASE + (x)) #endif PK ! �I^H� � mv643xx_eth.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * MV-643XX ethernet platform device data definition file. */ #ifndef __LINUX_MV643XX_ETH_H #define __LINUX_MV643XX_ETH_H #include <linux/mbus.h> #include <linux/if_ether.h> #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" #define MV643XX_ETH_NAME "mv643xx_eth_port" #define MV643XX_ETH_SHARED_REGS 0x2000 #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 #define MV643XX_ETH_BAR_4 0x2220 #define MV643XX_ETH_SIZE_REG_4 0x2224 #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 #define MV643XX_TX_CSUM_DEFAULT_LIMIT 0 struct mv643xx_eth_shared_platform_data { struct mbus_dram_target_info *dram; /* * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default * limit of 9KiB will be used. */ int tx_csum_limit; }; #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) #define MV643XX_ETH_PHY_NONE 0xff struct device_node; struct mv643xx_eth_platform_data { /* * Pointer back to our parent instance, and our port number. */ struct platform_device *shared; int port_number; /* * Whether a PHY is present, and if yes, at which address. */ int phy_addr; struct device_node *phy_node; /* * Use this MAC address if it is valid, overriding the * address that is already in the hardware. */ u8 mac_addr[ETH_ALEN]; /* * If speed is 0, autonegotiation is enabled. * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. */ int speed; int duplex; /* * How many RX/TX queues to use. */ int rx_queue_count; int tx_queue_count; /* * Override default RX/TX queue sizes if nonzero. */ int rx_queue_size; int tx_queue_size; /* * Use on-chip SRAM for RX/TX descriptors if size is nonzero * and sufficient to contain all descriptors for the requested * ring sizes. */ unsigned long rx_sram_addr; int rx_sram_size; unsigned long tx_sram_addr; int tx_sram_size; }; #endif PK ! $�NT< < qcom_scm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights reserved. * Copyright (C) 2015 Linaro Ltd. */ #ifndef __QCOM_SCM_H #define __QCOM_SCM_H #include <linux/err.h> #include <linux/types.h> #include <linux/cpumask.h> #define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) #define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1 #define QCOM_SCM_HDCP_MAX_REQ_CNT 5 struct qcom_scm_hdcp_req { u32 addr; u32 val; }; struct qcom_scm_vmperm { int vmid; int perm; }; enum qcom_scm_ocmem_client { QCOM_SCM_OCMEM_UNUSED_ID = 0x0, QCOM_SCM_OCMEM_GRAPHICS_ID, QCOM_SCM_OCMEM_VIDEO_ID, QCOM_SCM_OCMEM_LP_AUDIO_ID, QCOM_SCM_OCMEM_SENSORS_ID, QCOM_SCM_OCMEM_OTHER_OS_ID, QCOM_SCM_OCMEM_DEBUG_ID, }; enum qcom_scm_sec_dev_id { QCOM_SCM_MDSS_DEV_ID = 1, QCOM_SCM_OCMEM_DEV_ID = 5, QCOM_SCM_PCIE0_DEV_ID = 11, QCOM_SCM_PCIE1_DEV_ID = 12, QCOM_SCM_GFX_DEV_ID = 18, QCOM_SCM_UFS_DEV_ID = 19, QCOM_SCM_ICE_DEV_ID = 20, }; enum qcom_scm_ice_cipher { QCOM_SCM_ICE_CIPHER_AES_128_XTS = 0, QCOM_SCM_ICE_CIPHER_AES_128_CBC = 1, QCOM_SCM_ICE_CIPHER_AES_256_XTS = 3, QCOM_SCM_ICE_CIPHER_AES_256_CBC = 4, }; #define QCOM_SCM_VMID_HLOS 0x3 #define QCOM_SCM_VMID_MSS_MSA 0xF #define QCOM_SCM_VMID_WLAN 0x18 #define QCOM_SCM_VMID_WLAN_CE 0x19 #define QCOM_SCM_PERM_READ 0x4 #define QCOM_SCM_PERM_WRITE 0x2 #define QCOM_SCM_PERM_EXEC 0x1 #define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE) #define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC) extern bool qcom_scm_is_available(void); extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus); extern void qcom_scm_cpu_power_down(u32 flags); extern int qcom_scm_set_remote_state(u32 state, u32 id); extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size); extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size); extern int qcom_scm_pas_auth_and_reset(u32 peripheral); extern int qcom_scm_pas_shutdown(u32 peripheral); extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); extern bool qcom_scm_restore_sec_cfg_available(void); extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare); extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size); extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare); extern int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size, u32 cp_nonpixel_start, u32 cp_nonpixel_size); extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, unsigned int *src, const struct qcom_scm_vmperm *newvm, unsigned int dest_cnt); extern bool qcom_scm_ocmem_lock_available(void); extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, u32 size, u32 mode); extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, u32 size); extern bool qcom_scm_ice_available(void); extern int qcom_scm_ice_invalidate_key(u32 index); extern int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size, enum qcom_scm_ice_cipher cipher, u32 data_unit_size); extern bool qcom_scm_hdcp_available(void); extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en); extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, u64 limit_node, u32 node_id, u64 version); extern int qcom_scm_lmh_profile_change(u32 profile_id); extern bool qcom_scm_lmh_dcvsh_available(void); #endif PK ! ���x� � key-type.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Definitions for key type implementations * * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_KEY_TYPE_H #define _LINUX_KEY_TYPE_H #include <linux/key.h> #include <linux/errno.h> #ifdef CONFIG_KEYS struct kernel_pkey_query; struct kernel_pkey_params; /* * Pre-parsed payload, used by key add, update and instantiate. * * This struct will be cleared and data and datalen will be set with the data * and length parameters from the caller and quotalen will be set from * def_datalen from the key type. Then if the preparse() op is provided by the * key type, that will be called. Then the struct will be passed to the * instantiate() or the update() op. * * If the preparse() op is given, the free_preparse() op will be called to * clear the contents. */ struct key_preparsed_payload { const char *orig_description; /* Actual or proposed description (maybe NULL) */ char *description; /* Proposed key description (or NULL) */ union key_payload payload; /* Proposed payload */ const void *data; /* Raw data */ size_t datalen; /* Raw datalen */ size_t quotalen; /* Quota length for proposed payload */ time64_t expiry; /* Expiry time of key */ } __randomize_layout; typedef int (*request_key_actor_t)(struct key *auth_key, void *aux); /* * Preparsed matching criterion. */ struct key_match_data { /* Comparison function, defaults to exact description match, but can be * overridden by type->match_preparse(). Should return true if a match * is found and false if not. */ bool (*cmp)(const struct key *key, const struct key_match_data *match_data); const void *raw_data; /* Raw match data */ void *preparsed; /* For ->match_preparse() to stash stuff */ unsigned lookup_type; /* Type of lookup for this search. */ #define KEYRING_SEARCH_LOOKUP_DIRECT 0x0000 /* Direct lookup by description. */ #define KEYRING_SEARCH_LOOKUP_ITERATE 0x0001 /* Iterative search. */ }; /* * kernel managed key type definition */ struct key_type { /* name of the type */ const char *name; /* default payload length for quota precalculation (optional) * - this can be used instead of calling key_payload_reserve(), that * function only needs to be called if the real datalen is different */ size_t def_datalen; unsigned int flags; #define KEY_TYPE_NET_DOMAIN 0x00000001 /* Keys of this type have a net namespace domain */ #define KEY_TYPE_INSTANT_REAP 0x00000002 /* Keys of this type don't have a delay after expiring */ /* vet a description */ int (*vet_description)(const char *description); /* Preparse the data blob from userspace that is to be the payload, * generating a proposed description and payload that will be handed to * the instantiate() and update() ops. */ int (*preparse)(struct key_preparsed_payload *prep); /* Free a preparse data structure. */ void (*free_preparse)(struct key_preparsed_payload *prep); /* instantiate a key of this type * - this method should call key_payload_reserve() to determine if the * user's quota will hold the payload */ int (*instantiate)(struct key *key, struct key_preparsed_payload *prep); /* update a key of this type (optional) * - this method should call key_payload_reserve() to recalculate the * quota consumption * - the key must be locked against read when modifying */ int (*update)(struct key *key, struct key_preparsed_payload *prep); /* Preparse the data supplied to ->match() (optional). The * data to be preparsed can be found in match_data->raw_data. * The lookup type can also be set by this function. */ int (*match_preparse)(struct key_match_data *match_data); /* Free preparsed match data (optional). This should be supplied it * ->match_preparse() is supplied. */ void (*match_free)(struct key_match_data *match_data); /* clear some of the data from a key on revokation (optional) * - the key's semaphore will be write-locked by the caller */ void (*revoke)(struct key *key); /* clear the data from a key (optional) */ void (*destroy)(struct key *key); /* describe a key */ void (*describe)(const struct key *key, struct seq_file *p); /* read a key's data (optional) * - permission checks will be done by the caller * - the key's semaphore will be readlocked by the caller * - should return the amount of data that could be read, no matter how * much is copied into the buffer * - shouldn't do the copy if the buffer is NULL */ long (*read)(const struct key *key, char *buffer, size_t buflen); /* handle request_key() for this type instead of invoking * /sbin/request-key (optional) * - key is the key to instantiate * - authkey is the authority to assume when instantiating this key * - op is the operation to be done, usually "create" * - the call must not return until the instantiation process has run * its course */ request_key_actor_t request_key; /* Look up a keyring access restriction (optional) * * - NULL is a valid return value (meaning the requested restriction * is known but will never block addition of a key) * - should return -EINVAL if the restriction is unknown */ struct key_restriction *(*lookup_restriction)(const char *params); /* Asymmetric key accessor functions. */ int (*asym_query)(const struct kernel_pkey_params *params, struct kernel_pkey_query *info); int (*asym_eds_op)(struct kernel_pkey_params *params, const void *in, void *out); int (*asym_verify_signature)(struct kernel_pkey_params *params, const void *in, const void *in2); /* internal fields */ struct list_head link; /* link in types list */ struct lock_class_key lock_class; /* key->sem lock class */ } __randomize_layout; extern struct key_type key_type_keyring; extern int register_key_type(struct key_type *ktype); extern void unregister_key_type(struct key_type *ktype); extern int key_payload_reserve(struct key *key, size_t datalen); extern int key_instantiate_and_link(struct key *key, const void *data, size_t datalen, struct key *keyring, struct key *authkey); extern int key_reject_and_link(struct key *key, unsigned timeout, unsigned error, struct key *keyring, struct key *authkey); extern void complete_request_key(struct key *authkey, int error); static inline int key_negate_and_link(struct key *key, unsigned timeout, struct key *keyring, struct key *authkey) { return key_reject_and_link(key, timeout, ENOKEY, keyring, authkey); } extern int generic_key_instantiate(struct key *key, struct key_preparsed_payload *prep); #endif /* CONFIG_KEYS */ #endif /* _LINUX_KEY_TYPE_H */ PK ! ,\�� � pkeys.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PKEYS_H #define _LINUX_PKEYS_H #include <linux/mm.h> #define ARCH_DEFAULT_PKEY 0 #ifdef CONFIG_ARCH_HAS_PKEYS #include <asm/pkeys.h> #else /* ! CONFIG_ARCH_HAS_PKEYS */ #define arch_max_pkey() (1) #define execute_only_pkey(mm) (0) #define arch_override_mprotect_pkey(vma, prot, pkey) (0) #define PKEY_DEDICATED_EXECUTE_ONLY 0 #define ARCH_VM_PKEY_FLAGS 0 static inline int vma_pkey(struct vm_area_struct *vma) { return 0; } static inline bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey) { return (pkey == 0); } static inline int mm_pkey_alloc(struct mm_struct *mm) { return -1; } static inline int mm_pkey_free(struct mm_struct *mm, int pkey) { return -EINVAL; } static inline int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val) { return 0; } static inline bool arch_pkeys_enabled(void) { return false; } #endif /* ! CONFIG_ARCH_HAS_PKEYS */ #endif /* _LINUX_PKEYS_H */ PK ! sQ���% �% pci-epc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * PCI Endpoint *Controller* (EPC) header file * * Copyright (C) 2017 Texas Instruments * Author: Kishon Vijay Abraham I <kishon@ti.com> */ #ifndef __LINUX_PCI_EPC_H #define __LINUX_PCI_EPC_H #include <linux/pci-epf.h> struct pci_epc; enum pci_epc_interface_type { UNKNOWN_INTERFACE = -1, PRIMARY_INTERFACE, SECONDARY_INTERFACE, }; enum pci_epc_irq_type { PCI_EPC_IRQ_UNKNOWN, PCI_EPC_IRQ_LEGACY, PCI_EPC_IRQ_MSI, PCI_EPC_IRQ_MSIX, }; static inline const char * pci_epc_interface_string(enum pci_epc_interface_type type) { switch (type) { case PRIMARY_INTERFACE: return "primary"; case SECONDARY_INTERFACE: return "secondary"; default: return "UNKNOWN interface"; } } /** * struct pci_epc_ops - set of function pointers for performing EPC operations * @write_header: ops to populate configuration space header * @set_bar: ops to configure the BAR * @clear_bar: ops to reset the BAR * @map_addr: ops to map CPU address to PCI address * @unmap_addr: ops to unmap CPU address and PCI address * @set_msi: ops to set the requested number of MSI interrupts in the MSI * capability register * @get_msi: ops to get the number of MSI interrupts allocated by the RC from * the MSI capability register * @set_msix: ops to set the requested number of MSI-X interrupts in the * MSI-X capability register * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC * from the MSI-X capability register * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt * @map_msi_irq: ops to map physical address to MSI address and return MSI data * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @get_features: ops to get the features supported by the EPC * @owner: the module owner containing the ops */ struct pci_epc_ops { int (*write_header)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_header *hdr); int (*set_bar)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_bar *epf_bar); void (*clear_bar)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_bar *epf_bar); int (*map_addr)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, phys_addr_t addr, u64 pci_addr, size_t size); void (*unmap_addr)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, phys_addr_t addr); int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, u8 interrupts); int (*get_msi)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); int (*set_msix)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, u16 interrupts, enum pci_barno, u32 offset); int (*get_msix)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); int (*raise_irq)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, enum pci_epc_irq_type type, u16 interrupt_num); int (*map_msi_irq)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, phys_addr_t phys_addr, u8 interrupt_num, u32 entry_size, u32 *msi_data, u32 *msi_addr_offset); int (*start)(struct pci_epc *epc); void (*stop)(struct pci_epc *epc); const struct pci_epc_features* (*get_features)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); struct module *owner; }; /** * struct pci_epc_mem_window - address window of the endpoint controller * @phys_base: physical base address of the PCI address window * @size: the size of the PCI address window * @page_size: size of each page */ struct pci_epc_mem_window { phys_addr_t phys_base; size_t size; size_t page_size; }; /** * struct pci_epc_mem - address space of the endpoint controller * @window: address window of the endpoint controller * @bitmap: bitmap to manage the PCI address space * @pages: number of bits representing the address region * @lock: mutex to protect bitmap */ struct pci_epc_mem { struct pci_epc_mem_window window; unsigned long *bitmap; int pages; /* mutex to protect against concurrent access for memory allocation*/ struct mutex lock; }; /** * struct pci_epc - represents the PCI EPC device * @dev: PCI EPC device * @pci_epf: list of endpoint functions present in this EPC device * @ops: function pointers for performing endpoint operations * @windows: array of address space of the endpoint controller * @mem: first window of the endpoint controller, which corresponds to * default address space of the endpoint controller supporting * single window. * @num_windows: number of windows supported by device * @max_functions: max number of functions that can be configured in this EPC * @max_vfs: Array indicating the maximum number of virtual functions that can * be associated with each physical function * @group: configfs group representing the PCI EPC device * @lock: mutex to protect pci_epc ops * @function_num_map: bitmap to manage physical function number * @notifier: used to notify EPF of any EPC events (like linkup) */ struct pci_epc { struct device dev; struct list_head pci_epf; const struct pci_epc_ops *ops; struct pci_epc_mem **windows; struct pci_epc_mem *mem; unsigned int num_windows; u8 max_functions; u8 *max_vfs; struct config_group *group; /* mutex to protect against concurrent access of EP controller */ struct mutex lock; unsigned long function_num_map; struct atomic_notifier_head notifier; }; /** * struct pci_epc_features - features supported by a EPC device per function * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up * @core_init_notifier: indicate cores that can notify about their availability * for initialization * @msi_capable: indicate if the endpoint function has MSI capability * @msix_capable: indicate if the endpoint function has MSI-X capability * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs * @bar_fixed_size: Array specifying the size supported by each BAR * @align: alignment size required for BAR buffer allocation */ struct pci_epc_features { unsigned int linkup_notifier : 1; unsigned int core_init_notifier : 1; unsigned int msi_capable : 1; unsigned int msix_capable : 1; u8 reserved_bar; u8 bar_fixed_64bit; u64 bar_fixed_size[PCI_STD_NUM_BARS]; size_t align; }; #define to_pci_epc(device) container_of((device), struct pci_epc, dev) #define pci_epc_create(dev, ops) \ __pci_epc_create((dev), (ops), THIS_MODULE) #define devm_pci_epc_create(dev, ops) \ __devm_pci_epc_create((dev), (ops), THIS_MODULE) static inline void epc_set_drvdata(struct pci_epc *epc, void *data) { dev_set_drvdata(&epc->dev, data); } static inline void *epc_get_drvdata(struct pci_epc *epc) { return dev_get_drvdata(&epc->dev); } static inline int pci_epc_register_notifier(struct pci_epc *epc, struct notifier_block *nb) { return atomic_notifier_chain_register(&epc->notifier, nb); } struct pci_epc * __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, struct module *owner); struct pci_epc * __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, struct module *owner); void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc); void pci_epc_destroy(struct pci_epc *epc); int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_header *hdr); int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_bar *epf_bar); void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_bar *epf_bar); int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no, phys_addr_t phys_addr, u64 pci_addr, size_t size); void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no, phys_addr_t phys_addr); int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no, u8 interrupts); int pci_epc_get_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no); int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no, u16 interrupts, enum pci_barno, u32 offset); int pci_epc_get_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no); int pci_epc_map_msi_irq(struct pci_epc *epc, u8 func_no, u8 vfunc_no, phys_addr_t phys_addr, u8 interrupt_num, u32 entry_size, u32 *msi_data, u32 *msi_addr_offset); int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, u8 vfunc_no, enum pci_epc_irq_type type, u16 interrupt_num); int pci_epc_start(struct pci_epc *epc); void pci_epc_stop(struct pci_epc *epc); const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no); enum pci_barno pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features); enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features *epc_features, enum pci_barno bar); struct pci_epc *pci_epc_get(const char *epc_name); void pci_epc_put(struct pci_epc *epc); int pci_epc_mem_init(struct pci_epc *epc, phys_addr_t base, size_t size, size_t page_size); int pci_epc_multi_mem_init(struct pci_epc *epc, struct pci_epc_mem_window *window, unsigned int num_windows); void pci_epc_mem_exit(struct pci_epc *epc); void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc, phys_addr_t *phys_addr, size_t size); void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr, void __iomem *virt_addr, size_t size); #endif /* __LINUX_PCI_EPC_H */ PK ! `�7�P P dma-heap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * DMABUF Heaps Allocation Infrastructure * * Copyright (C) 2011 Google, Inc. * Copyright (C) 2019 Linaro Ltd. */ #ifndef _DMA_HEAPS_H #define _DMA_HEAPS_H #include <linux/cdev.h> #include <linux/types.h> struct dma_heap; /** * struct dma_heap_ops - ops to operate on a given heap * @allocate: allocate dmabuf and return struct dma_buf ptr * * allocate returns dmabuf on success, ERR_PTR(-errno) on error. */ struct dma_heap_ops { struct dma_buf *(*allocate)(struct dma_heap *heap, unsigned long len, unsigned long fd_flags, unsigned long heap_flags); }; /** * struct dma_heap_export_info - information needed to export a new dmabuf heap * @name: used for debugging/device-node name * @ops: ops struct for this heap * @priv: heap exporter private data * * Information needed to export a new dmabuf heap. */ struct dma_heap_export_info { const char *name; const struct dma_heap_ops *ops; void *priv; }; /** * dma_heap_get_drvdata() - get per-heap driver data * @heap: DMA-Heap to retrieve private data for * * Returns: * The per-heap data for the heap. */ void *dma_heap_get_drvdata(struct dma_heap *heap); /** * dma_heap_get_name() - get heap name * @heap: DMA-Heap to retrieve private data for * * Returns: * The char* for the heap name. */ const char *dma_heap_get_name(struct dma_heap *heap); /** * dma_heap_add - adds a heap to dmabuf heaps * @exp_info: information needed to register this heap */ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info); #endif /* _DMA_HEAPS_H */ PK ! �i2�^+ ^+ percpu-refcount.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Percpu refcounts: * (C) 2012 Google, Inc. * Author: Kent Overstreet <koverstreet@google.com> * * This implements a refcount with similar semantics to atomic_t - atomic_inc(), * atomic_dec_and_test() - but percpu. * * There's one important difference between percpu refs and normal atomic_t * refcounts; you have to keep track of your initial refcount, and then when you * start shutting down you call percpu_ref_kill() _before_ dropping the initial * refcount. * * The refcount will have a range of 0 to ((1U << 31) - 1), i.e. one bit less * than an atomic_t - this is because of the way shutdown works, see * percpu_ref_kill()/PERCPU_COUNT_BIAS. * * Before you call percpu_ref_kill(), percpu_ref_put() does not check for the * refcount hitting 0 - it can't, if it was in percpu mode. percpu_ref_kill() * puts the ref back in single atomic_t mode, collecting the per cpu refs and * issuing the appropriate barriers, and then marks the ref as shutting down so * that percpu_ref_put() will check for the ref hitting 0. After it returns, * it's safe to drop the initial ref. * * USAGE: * * See fs/aio.c for some example usage; it's used there for struct kioctx, which * is created when userspaces calls io_setup(), and destroyed when userspace * calls io_destroy() or the process exits. * * In the aio code, kill_ioctx() is called when we wish to destroy a kioctx; it * removes the kioctx from the proccess's table of kioctxs and kills percpu_ref. * After that, there can't be any new users of the kioctx (from lookup_ioctx()) * and it's then safe to drop the initial ref with percpu_ref_put(). * * Note that the free path, free_ioctx(), needs to go through explicit call_rcu() * to synchronize with RCU protected lookup_ioctx(). percpu_ref operations don't * imply RCU grace periods of any kind and if a user wants to combine percpu_ref * with RCU protection, it must be done explicitly. * * Code that does a two stage shutdown like this often needs some kind of * explicit synchronization to ensure the initial refcount can only be dropped * once - percpu_ref_kill() does this for you, it returns true once and false if * someone else already called it. The aio code uses it this way, but it's not * necessary if the code has some other mechanism to synchronize teardown. * around. */ #ifndef _LINUX_PERCPU_REFCOUNT_H #define _LINUX_PERCPU_REFCOUNT_H #include <linux/atomic.h> #include <linux/kernel.h> #include <linux/percpu.h> #include <linux/rcupdate.h> #include <linux/gfp.h> struct percpu_ref; typedef void (percpu_ref_func_t)(struct percpu_ref *); /* flags set in the lower bits of percpu_ref->percpu_count_ptr */ enum { __PERCPU_REF_ATOMIC = 1LU << 0, /* operating in atomic mode */ __PERCPU_REF_DEAD = 1LU << 1, /* (being) killed */ __PERCPU_REF_ATOMIC_DEAD = __PERCPU_REF_ATOMIC | __PERCPU_REF_DEAD, __PERCPU_REF_FLAG_BITS = 2, }; /* @flags for percpu_ref_init() */ enum { /* * Start w/ ref == 1 in atomic mode. Can be switched to percpu * operation using percpu_ref_switch_to_percpu(). If initialized * with this flag, the ref will stay in atomic mode until * percpu_ref_switch_to_percpu() is invoked on it. * Implies ALLOW_REINIT. */ PERCPU_REF_INIT_ATOMIC = 1 << 0, /* * Start dead w/ ref == 0 in atomic mode. Must be revived with * percpu_ref_reinit() before used. Implies INIT_ATOMIC and * ALLOW_REINIT. */ PERCPU_REF_INIT_DEAD = 1 << 1, /* * Allow switching from atomic mode to percpu mode. */ PERCPU_REF_ALLOW_REINIT = 1 << 2, }; struct percpu_ref_data { atomic_long_t count; percpu_ref_func_t *release; percpu_ref_func_t *confirm_switch; bool force_atomic:1; bool allow_reinit:1; struct rcu_head rcu; struct percpu_ref *ref; }; struct percpu_ref { /* * The low bit of the pointer indicates whether the ref is in percpu * mode; if set, then get/put will manipulate the atomic_t. */ unsigned long percpu_count_ptr; /* * 'percpu_ref' is often embedded into user structure, and only * 'percpu_count_ptr' is required in fast path, move other fields * into 'percpu_ref_data', so we can reduce memory footprint in * fast path. */ struct percpu_ref_data *data; }; int __must_check percpu_ref_init(struct percpu_ref *ref, percpu_ref_func_t *release, unsigned int flags, gfp_t gfp); void percpu_ref_exit(struct percpu_ref *ref); void percpu_ref_switch_to_atomic(struct percpu_ref *ref, percpu_ref_func_t *confirm_switch); void percpu_ref_switch_to_atomic_sync(struct percpu_ref *ref); void percpu_ref_switch_to_percpu(struct percpu_ref *ref); void percpu_ref_kill_and_confirm(struct percpu_ref *ref, percpu_ref_func_t *confirm_kill); void percpu_ref_resurrect(struct percpu_ref *ref); void percpu_ref_reinit(struct percpu_ref *ref); bool percpu_ref_is_zero(struct percpu_ref *ref); /** * percpu_ref_kill - drop the initial ref * @ref: percpu_ref to kill * * Must be used to drop the initial ref on a percpu refcount; must be called * precisely once before shutdown. * * Switches @ref into atomic mode before gathering up the percpu counters * and dropping the initial ref. * * There are no implied RCU grace periods between kill and release. */ static inline void percpu_ref_kill(struct percpu_ref *ref) { percpu_ref_kill_and_confirm(ref, NULL); } /* * Internal helper. Don't use outside percpu-refcount proper. The * function doesn't return the pointer and let the caller test it for NULL * because doing so forces the compiler to generate two conditional * branches as it can't assume that @ref->percpu_count is not NULL. */ static inline bool __ref_is_percpu(struct percpu_ref *ref, unsigned long __percpu **percpu_countp) { unsigned long percpu_ptr; /* * The value of @ref->percpu_count_ptr is tested for * !__PERCPU_REF_ATOMIC, which may be set asynchronously, and then * used as a pointer. If the compiler generates a separate fetch * when using it as a pointer, __PERCPU_REF_ATOMIC may be set in * between contaminating the pointer value, meaning that * READ_ONCE() is required when fetching it. * * The dependency ordering from the READ_ONCE() pairs * with smp_store_release() in __percpu_ref_switch_to_percpu(). */ percpu_ptr = READ_ONCE(ref->percpu_count_ptr); /* * Theoretically, the following could test just ATOMIC; however, * then we'd have to mask off DEAD separately as DEAD may be * visible without ATOMIC if we race with percpu_ref_kill(). DEAD * implies ATOMIC anyway. Test them together. */ if (unlikely(percpu_ptr & __PERCPU_REF_ATOMIC_DEAD)) return false; *percpu_countp = (unsigned long __percpu *)percpu_ptr; return true; } /** * percpu_ref_get_many - increment a percpu refcount * @ref: percpu_ref to get * @nr: number of references to get * * Analogous to atomic_long_add(). * * This function is safe to call as long as @ref is between init and exit. */ static inline void percpu_ref_get_many(struct percpu_ref *ref, unsigned long nr) { unsigned long __percpu *percpu_count; rcu_read_lock(); if (__ref_is_percpu(ref, &percpu_count)) this_cpu_add(*percpu_count, nr); else atomic_long_add(nr, &ref->data->count); rcu_read_unlock(); } /** * percpu_ref_get - increment a percpu refcount * @ref: percpu_ref to get * * Analogous to atomic_long_inc(). * * This function is safe to call as long as @ref is between init and exit. */ static inline void percpu_ref_get(struct percpu_ref *ref) { percpu_ref_get_many(ref, 1); } /** * percpu_ref_tryget_many - try to increment a percpu refcount * @ref: percpu_ref to try-get * @nr: number of references to get * * Increment a percpu refcount by @nr unless its count already reached zero. * Returns %true on success; %false on failure. * * This function is safe to call as long as @ref is between init and exit. */ static inline bool percpu_ref_tryget_many(struct percpu_ref *ref, unsigned long nr) { unsigned long __percpu *percpu_count; bool ret; rcu_read_lock(); if (__ref_is_percpu(ref, &percpu_count)) { this_cpu_add(*percpu_count, nr); ret = true; } else { ret = atomic_long_add_unless(&ref->data->count, nr, 0); } rcu_read_unlock(); return ret; } /** * percpu_ref_tryget - try to increment a percpu refcount * @ref: percpu_ref to try-get * * Increment a percpu refcount unless its count already reached zero. * Returns %true on success; %false on failure. * * This function is safe to call as long as @ref is between init and exit. */ static inline bool percpu_ref_tryget(struct percpu_ref *ref) { return percpu_ref_tryget_many(ref, 1); } /** * percpu_ref_tryget_live - try to increment a live percpu refcount * @ref: percpu_ref to try-get * * Increment a percpu refcount unless it has already been killed. Returns * %true on success; %false on failure. * * Completion of percpu_ref_kill() in itself doesn't guarantee that this * function will fail. For such guarantee, percpu_ref_kill_and_confirm() * should be used. After the confirm_kill callback is invoked, it's * guaranteed that no new reference will be given out by * percpu_ref_tryget_live(). * * This function is safe to call as long as @ref is between init and exit. */ static inline bool percpu_ref_tryget_live(struct percpu_ref *ref) { unsigned long __percpu *percpu_count; bool ret = false; rcu_read_lock(); if (__ref_is_percpu(ref, &percpu_count)) { this_cpu_inc(*percpu_count); ret = true; } else if (!(ref->percpu_count_ptr & __PERCPU_REF_DEAD)) { ret = atomic_long_inc_not_zero(&ref->data->count); } rcu_read_unlock(); return ret; } /** * percpu_ref_put_many - decrement a percpu refcount * @ref: percpu_ref to put * @nr: number of references to put * * Decrement the refcount, and if 0, call the release function (which was passed * to percpu_ref_init()) * * This function is safe to call as long as @ref is between init and exit. */ static inline void percpu_ref_put_many(struct percpu_ref *ref, unsigned long nr) { unsigned long __percpu *percpu_count; rcu_read_lock(); if (__ref_is_percpu(ref, &percpu_count)) this_cpu_sub(*percpu_count, nr); else if (unlikely(atomic_long_sub_and_test(nr, &ref->data->count))) ref->data->release(ref); rcu_read_unlock(); } /** * percpu_ref_put - decrement a percpu refcount * @ref: percpu_ref to put * * Decrement the refcount, and if 0, call the release function (which was passed * to percpu_ref_init()) * * This function is safe to call as long as @ref is between init and exit. */ static inline void percpu_ref_put(struct percpu_ref *ref) { percpu_ref_put_many(ref, 1); } /** * percpu_ref_is_dying - test whether a percpu refcount is dying or dead * @ref: percpu_ref to test * * Returns %true if @ref is dying or dead. * * This function is safe to call as long as @ref is between init and exit * and the caller is responsible for synchronizing against state changes. */ static inline bool percpu_ref_is_dying(struct percpu_ref *ref) { return ref->percpu_count_ptr & __PERCPU_REF_DEAD; } #endif PK ! T�r�X X fbcon.hnu �[��� #ifndef _LINUX_FBCON_H #define _LINUX_FBCON_H #ifdef CONFIG_FRAMEBUFFER_CONSOLE void __init fb_console_init(void); void __exit fb_console_exit(void); int fbcon_fb_registered(struct fb_info *info); void fbcon_fb_unregistered(struct fb_info *info); void fbcon_fb_unbind(struct fb_info *info); void fbcon_suspended(struct fb_info *info); void fbcon_resumed(struct fb_info *info); int fbcon_mode_deleted(struct fb_info *info, struct fb_videomode *mode); void fbcon_new_modelist(struct fb_info *info); void fbcon_get_requirement(struct fb_info *info, struct fb_blit_caps *caps); void fbcon_fb_blanked(struct fb_info *info, int blank); int fbcon_modechange_possible(struct fb_info *info, struct fb_var_screeninfo *var); void fbcon_update_vcs(struct fb_info *info, bool all); void fbcon_remap_all(struct fb_info *info); int fbcon_set_con2fb_map_ioctl(void __user *argp); int fbcon_get_con2fb_map_ioctl(void __user *argp); #else static inline void fb_console_init(void) {} static inline void fb_console_exit(void) {} static inline int fbcon_fb_registered(struct fb_info *info) { return 0; } static inline void fbcon_fb_unregistered(struct fb_info *info) {} static inline void fbcon_fb_unbind(struct fb_info *info) {} static inline void fbcon_suspended(struct fb_info *info) {} static inline void fbcon_resumed(struct fb_info *info) {} static inline int fbcon_mode_deleted(struct fb_info *info, struct fb_videomode *mode) { return 0; } static inline void fbcon_new_modelist(struct fb_info *info) {} static inline void fbcon_get_requirement(struct fb_info *info, struct fb_blit_caps *caps) {} static inline void fbcon_fb_blanked(struct fb_info *info, int blank) {} static inline int fbcon_modechange_possible(struct fb_info *info, struct fb_var_screeninfo *var) { return 0; } static inline void fbcon_update_vcs(struct fb_info *info, bool all) {} static inline void fbcon_remap_all(struct fb_info *info) {} static inline int fbcon_set_con2fb_map_ioctl(void __user *argp) { return 0; } static inline int fbcon_get_con2fb_map_ioctl(void __user *argp) { return 0; } #endif #endif /* _LINUX_FBCON_H */ PK ! /���� � rtmutex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * RT Mutexes: blocking mutual exclusion locks with PI support * * started by Ingo Molnar and Thomas Gleixner: * * Copyright (C) 2004-2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> * Copyright (C) 2006, Timesys Corp., Thomas Gleixner <tglx@timesys.com> * * This file contains the public data structure and API definitions. */ #ifndef __LINUX_RT_MUTEX_H #define __LINUX_RT_MUTEX_H #include <linux/compiler.h> #include <linux/linkage.h> #include <linux/rbtree_types.h> #include <linux/spinlock_types_raw.h> extern int max_lock_depth; /* for sysctl */ struct rt_mutex_base { raw_spinlock_t wait_lock; struct rb_root_cached waiters; struct task_struct *owner; }; #define __RT_MUTEX_BASE_INITIALIZER(rtbasename) \ { \ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(rtbasename.wait_lock), \ .waiters = RB_ROOT_CACHED, \ .owner = NULL \ } /** * rt_mutex_base_is_locked - is the rtmutex locked * @lock: the mutex to be queried * * Returns true if the mutex is locked, false if unlocked. */ static inline bool rt_mutex_base_is_locked(struct rt_mutex_base *lock) { return READ_ONCE(lock->owner) != NULL; } extern void rt_mutex_base_init(struct rt_mutex_base *rtb); /** * The rt_mutex structure * * @wait_lock: spinlock to protect the structure * @waiters: rbtree root to enqueue waiters in priority order; * caches top-waiter (leftmost node). * @owner: the mutex owner */ struct rt_mutex { struct rt_mutex_base rtmutex; #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif }; struct rt_mutex_waiter; struct hrtimer_sleeper; #ifdef CONFIG_DEBUG_RT_MUTEXES extern void rt_mutex_debug_task_free(struct task_struct *tsk); #else static inline void rt_mutex_debug_task_free(struct task_struct *tsk) { } #endif #define rt_mutex_init(mutex) \ do { \ static struct lock_class_key __key; \ __rt_mutex_init(mutex, __func__, &__key); \ } while (0) #ifdef CONFIG_DEBUG_LOCK_ALLOC #define __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) \ .dep_map = { \ .name = #mutexname, \ .wait_type_inner = LD_WAIT_SLEEP, \ } #else #define __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) #endif #define __RT_MUTEX_INITIALIZER(mutexname) \ { \ .rtmutex = __RT_MUTEX_BASE_INITIALIZER(mutexname.rtmutex), \ __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) \ } #define DEFINE_RT_MUTEX(mutexname) \ struct rt_mutex mutexname = __RT_MUTEX_INITIALIZER(mutexname) extern void __rt_mutex_init(struct rt_mutex *lock, const char *name, struct lock_class_key *key); #ifdef CONFIG_DEBUG_LOCK_ALLOC extern void rt_mutex_lock_nested(struct rt_mutex *lock, unsigned int subclass); #define rt_mutex_lock(lock) rt_mutex_lock_nested(lock, 0) #else extern void rt_mutex_lock(struct rt_mutex *lock); #define rt_mutex_lock_nested(lock, subclass) rt_mutex_lock(lock) #endif extern int rt_mutex_lock_interruptible(struct rt_mutex *lock); extern int rt_mutex_trylock(struct rt_mutex *lock); extern void rt_mutex_unlock(struct rt_mutex *lock); #endif PK ! 0���.? .? hwspinlock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Hardware spinlock public header * * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com * * Contact: Ohad Ben-Cohen <ohad@wizery.com> */ #ifndef __LINUX_HWSPINLOCK_H #define __LINUX_HWSPINLOCK_H #include <linux/err.h> #include <linux/sched.h> /* hwspinlock mode argument */ #define HWLOCK_IRQSTATE 0x01 /* Disable interrupts, save state */ #define HWLOCK_IRQ 0x02 /* Disable interrupts, don't save state */ #define HWLOCK_RAW 0x03 #define HWLOCK_IN_ATOMIC 0x04 /* Called while in atomic context */ struct device; struct device_node; struct hwspinlock; struct hwspinlock_device; struct hwspinlock_ops; /** * struct hwspinlock_pdata - platform data for hwspinlock drivers * @base_id: base id for this hwspinlock device * * hwspinlock devices provide system-wide hardware locks that are used * by remote processors that have no other way to achieve synchronization. * * To achieve that, each physical lock must have a system-wide id number * that is agreed upon, otherwise remote processors can't possibly assume * they're using the same hardware lock. * * Usually boards have a single hwspinlock device, which provides several * hwspinlocks, and in this case, they can be trivially numbered 0 to * (num-of-locks - 1). * * In case boards have several hwspinlocks devices, a different base id * should be used for each hwspinlock device (they can't all use 0 as * a starting id!). * * This platform data structure should be used to provide the base id * for each device (which is trivially 0 when only a single hwspinlock * device exists). It can be shared between different platforms, hence * its location. */ struct hwspinlock_pdata { int base_id; }; #ifdef CONFIG_HWSPINLOCK int hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev, const struct hwspinlock_ops *ops, int base_id, int num_locks); int hwspin_lock_unregister(struct hwspinlock_device *bank); struct hwspinlock *hwspin_lock_request(void); struct hwspinlock *hwspin_lock_request_specific(unsigned int id); int hwspin_lock_free(struct hwspinlock *hwlock); int of_hwspin_lock_get_id(struct device_node *np, int index); int hwspin_lock_get_id(struct hwspinlock *hwlock); int __hwspin_lock_timeout(struct hwspinlock *, unsigned int, int, unsigned long *); int __hwspin_trylock(struct hwspinlock *, int, unsigned long *); void __hwspin_unlock(struct hwspinlock *, int, unsigned long *); int of_hwspin_lock_get_id_byname(struct device_node *np, const char *name); int hwspin_lock_bust(struct hwspinlock *hwlock, unsigned int id); int devm_hwspin_lock_free(struct device *dev, struct hwspinlock *hwlock); struct hwspinlock *devm_hwspin_lock_request(struct device *dev); struct hwspinlock *devm_hwspin_lock_request_specific(struct device *dev, unsigned int id); int devm_hwspin_lock_unregister(struct device *dev, struct hwspinlock_device *bank); int devm_hwspin_lock_register(struct device *dev, struct hwspinlock_device *bank, const struct hwspinlock_ops *ops, int base_id, int num_locks); #else /* !CONFIG_HWSPINLOCK */ /* * We don't want these functions to fail if CONFIG_HWSPINLOCK is not * enabled. We prefer to silently succeed in this case, and let the * code path get compiled away. This way, if CONFIG_HWSPINLOCK is not * required on a given setup, users will still work. * * The only exception is hwspin_lock_register/hwspin_lock_unregister, with which * we _do_ want users to fail (no point in registering hwspinlock instances if * the framework is not available). * * Note: ERR_PTR(-ENODEV) will still be considered a success for NULL-checking * users. Others, which care, can still check this with IS_ERR. */ static inline struct hwspinlock *hwspin_lock_request(void) { return ERR_PTR(-ENODEV); } static inline struct hwspinlock *hwspin_lock_request_specific(unsigned int id) { return ERR_PTR(-ENODEV); } static inline int hwspin_lock_free(struct hwspinlock *hwlock) { return 0; } static inline int __hwspin_lock_timeout(struct hwspinlock *hwlock, unsigned int to, int mode, unsigned long *flags) { return 0; } static inline int __hwspin_trylock(struct hwspinlock *hwlock, int mode, unsigned long *flags) { return 0; } static inline void __hwspin_unlock(struct hwspinlock *hwlock, int mode, unsigned long *flags) { } static inline int hwspin_lock_bust(struct hwspinlock *hwlock, unsigned int id) { return 0; } static inline int of_hwspin_lock_get_id(struct device_node *np, int index) { return 0; } static inline int hwspin_lock_get_id(struct hwspinlock *hwlock) { return 0; } static inline int of_hwspin_lock_get_id_byname(struct device_node *np, const char *name) { return 0; } static inline int devm_hwspin_lock_free(struct device *dev, struct hwspinlock *hwlock) { return 0; } static inline struct hwspinlock *devm_hwspin_lock_request(struct device *dev) { return ERR_PTR(-ENODEV); } static inline struct hwspinlock *devm_hwspin_lock_request_specific(struct device *dev, unsigned int id) { return ERR_PTR(-ENODEV); } #endif /* !CONFIG_HWSPINLOCK */ /** * hwspin_trylock_irqsave() - try to lock an hwspinlock, disable interrupts * @hwlock: an hwspinlock which we want to trylock * @flags: a pointer to where the caller's interrupt state will be saved at * * This function attempts to lock the underlying hwspinlock, and will * immediately fail if the hwspinlock is already locked. * * Upon a successful return from this function, preemption and local * interrupts are disabled (previous interrupts state is saved at @flags), * so the caller must not sleep, and is advised to release the hwspinlock * as soon as possible. * * Returns 0 if we successfully locked the hwspinlock, -EBUSY if * the hwspinlock was already taken, and -EINVAL if @hwlock is invalid. */ static inline int hwspin_trylock_irqsave(struct hwspinlock *hwlock, unsigned long *flags) { return __hwspin_trylock(hwlock, HWLOCK_IRQSTATE, flags); } /** * hwspin_trylock_irq() - try to lock an hwspinlock, disable interrupts * @hwlock: an hwspinlock which we want to trylock * * This function attempts to lock the underlying hwspinlock, and will * immediately fail if the hwspinlock is already locked. * * Upon a successful return from this function, preemption and local * interrupts are disabled, so the caller must not sleep, and is advised * to release the hwspinlock as soon as possible. * * Returns 0 if we successfully locked the hwspinlock, -EBUSY if * the hwspinlock was already taken, and -EINVAL if @hwlock is invalid. */ static inline int hwspin_trylock_irq(struct hwspinlock *hwlock) { return __hwspin_trylock(hwlock, HWLOCK_IRQ, NULL); } /** * hwspin_trylock_raw() - attempt to lock a specific hwspinlock * @hwlock: an hwspinlock which we want to trylock * * This function attempts to lock an hwspinlock, and will immediately fail * if the hwspinlock is already taken. * * Caution: User must protect the routine of getting hardware lock with mutex * or spinlock to avoid dead-lock, that will let user can do some time-consuming * or sleepable operations under the hardware lock. * * Returns 0 if we successfully locked the hwspinlock, -EBUSY if * the hwspinlock was already taken, and -EINVAL if @hwlock is invalid. */ static inline int hwspin_trylock_raw(struct hwspinlock *hwlock) { return __hwspin_trylock(hwlock, HWLOCK_RAW, NULL); } /** * hwspin_trylock_in_atomic() - attempt to lock a specific hwspinlock * @hwlock: an hwspinlock which we want to trylock * * This function attempts to lock an hwspinlock, and will immediately fail * if the hwspinlock is already taken. * * This function shall be called only from an atomic context. * * Returns 0 if we successfully locked the hwspinlock, -EBUSY if * the hwspinlock was already taken, and -EINVAL if @hwlock is invalid. */ static inline int hwspin_trylock_in_atomic(struct hwspinlock *hwlock) { return __hwspin_trylock(hwlock, HWLOCK_IN_ATOMIC, NULL); } /** * hwspin_trylock() - attempt to lock a specific hwspinlock * @hwlock: an hwspinlock which we want to trylock * * This function attempts to lock an hwspinlock, and will immediately fail * if the hwspinlock is already taken. * * Upon a successful return from this function, preemption is disabled, * so the caller must not sleep, and is advised to release the hwspinlock * as soon as possible. This is required in order to minimize remote cores * polling on the hardware interconnect. * * Returns 0 if we successfully locked the hwspinlock, -EBUSY if * the hwspinlock was already taken, and -EINVAL if @hwlock is invalid. */ static inline int hwspin_trylock(struct hwspinlock *hwlock) { return __hwspin_trylock(hwlock, 0, NULL); } /** * hwspin_lock_timeout_irqsave() - lock hwspinlock, with timeout, disable irqs * @hwlock: the hwspinlock to be locked * @to: timeout value in msecs * @flags: a pointer to where the caller's interrupt state will be saved at * * This function locks the underlying @hwlock. If the @hwlock * is already taken, the function will busy loop waiting for it to * be released, but give up when @timeout msecs have elapsed. * * Upon a successful return from this function, preemption and local interrupts * are disabled (plus previous interrupt state is saved), so the caller must * not sleep, and is advised to release the hwspinlock as soon as possible. * * Returns 0 when the @hwlock was successfully taken, and an appropriate * error code otherwise (most notably an -ETIMEDOUT if the @hwlock is still * busy after @timeout msecs). The function will never sleep. */ static inline int hwspin_lock_timeout_irqsave(struct hwspinlock *hwlock, unsigned int to, unsigned long *flags) { return __hwspin_lock_timeout(hwlock, to, HWLOCK_IRQSTATE, flags); } /** * hwspin_lock_timeout_irq() - lock hwspinlock, with timeout, disable irqs * @hwlock: the hwspinlock to be locked * @to: timeout value in msecs * * This function locks the underlying @hwlock. If the @hwlock * is already taken, the function will busy loop waiting for it to * be released, but give up when @timeout msecs have elapsed. * * Upon a successful return from this function, preemption and local interrupts * are disabled so the caller must not sleep, and is advised to release the * hwspinlock as soon as possible. * * Returns 0 when the @hwlock was successfully taken, and an appropriate * error code otherwise (most notably an -ETIMEDOUT if the @hwlock is still * busy after @timeout msecs). The function will never sleep. */ static inline int hwspin_lock_timeout_irq(struct hwspinlock *hwlock, unsigned int to) { return __hwspin_lock_timeout(hwlock, to, HWLOCK_IRQ, NULL); } /** * hwspin_lock_timeout_raw() - lock an hwspinlock with timeout limit * @hwlock: the hwspinlock to be locked * @to: timeout value in msecs * * This function locks the underlying @hwlock. If the @hwlock * is already taken, the function will busy loop waiting for it to * be released, but give up when @timeout msecs have elapsed. * * Caution: User must protect the routine of getting hardware lock with mutex * or spinlock to avoid dead-lock, that will let user can do some time-consuming * or sleepable operations under the hardware lock. * * Returns 0 when the @hwlock was successfully taken, and an appropriate * error code otherwise (most notably an -ETIMEDOUT if the @hwlock is still * busy after @timeout msecs). The function will never sleep. */ static inline int hwspin_lock_timeout_raw(struct hwspinlock *hwlock, unsigned int to) { return __hwspin_lock_timeout(hwlock, to, HWLOCK_RAW, NULL); } /** * hwspin_lock_timeout_in_atomic() - lock an hwspinlock with timeout limit * @hwlock: the hwspinlock to be locked * @to: timeout value in msecs * * This function locks the underlying @hwlock. If the @hwlock * is already taken, the function will busy loop waiting for it to * be released, but give up when @timeout msecs have elapsed. * * This function shall be called only from an atomic context and the timeout * value shall not exceed a few msecs. * * Returns 0 when the @hwlock was successfully taken, and an appropriate * error code otherwise (most notably an -ETIMEDOUT if the @hwlock is still * busy after @timeout msecs). The function will never sleep. */ static inline int hwspin_lock_timeout_in_atomic(struct hwspinlock *hwlock, unsigned int to) { return __hwspin_lock_timeout(hwlock, to, HWLOCK_IN_ATOMIC, NULL); } /** * hwspin_lock_timeout() - lock an hwspinlock with timeout limit * @hwlock: the hwspinlock to be locked * @to: timeout value in msecs * * This function locks the underlying @hwlock. If the @hwlock * is already taken, the function will busy loop waiting for it to * be released, but give up when @timeout msecs have elapsed. * * Upon a successful return from this function, preemption is disabled * so the caller must not sleep, and is advised to release the hwspinlock * as soon as possible. * This is required in order to minimize remote cores polling on the * hardware interconnect. * * Returns 0 when the @hwlock was successfully taken, and an appropriate * error code otherwise (most notably an -ETIMEDOUT if the @hwlock is still * busy after @timeout msecs). The function will never sleep. */ static inline int hwspin_lock_timeout(struct hwspinlock *hwlock, unsigned int to) { return __hwspin_lock_timeout(hwlock, to, 0, NULL); } /** * hwspin_unlock_irqrestore() - unlock hwspinlock, restore irq state * @hwlock: a previously-acquired hwspinlock which we want to unlock * @flags: previous caller's interrupt state to restore * * This function will unlock a specific hwspinlock, enable preemption and * restore the previous state of the local interrupts. It should be used * to undo, e.g., hwspin_trylock_irqsave(). * * @hwlock must be already locked before calling this function: it is a bug * to call unlock on a @hwlock that is already unlocked. */ static inline void hwspin_unlock_irqrestore(struct hwspinlock *hwlock, unsigned long *flags) { __hwspin_unlock(hwlock, HWLOCK_IRQSTATE, flags); } /** * hwspin_unlock_irq() - unlock hwspinlock, enable interrupts * @hwlock: a previously-acquired hwspinlock which we want to unlock * * This function will unlock a specific hwspinlock, enable preemption and * enable local interrupts. Should be used to undo hwspin_lock_irq(). * * @hwlock must be already locked (e.g. by hwspin_trylock_irq()) before * calling this function: it is a bug to call unlock on a @hwlock that is * already unlocked. */ static inline void hwspin_unlock_irq(struct hwspinlock *hwlock) { __hwspin_unlock(hwlock, HWLOCK_IRQ, NULL); } /** * hwspin_unlock_raw() - unlock hwspinlock * @hwlock: a previously-acquired hwspinlock which we want to unlock * * This function will unlock a specific hwspinlock. * * @hwlock must be already locked (e.g. by hwspin_trylock()) before calling * this function: it is a bug to call unlock on a @hwlock that is already * unlocked. */ static inline void hwspin_unlock_raw(struct hwspinlock *hwlock) { __hwspin_unlock(hwlock, HWLOCK_RAW, NULL); } /** * hwspin_unlock_in_atomic() - unlock hwspinlock * @hwlock: a previously-acquired hwspinlock which we want to unlock * * This function will unlock a specific hwspinlock. * * @hwlock must be already locked (e.g. by hwspin_trylock()) before calling * this function: it is a bug to call unlock on a @hwlock that is already * unlocked. */ static inline void hwspin_unlock_in_atomic(struct hwspinlock *hwlock) { __hwspin_unlock(hwlock, HWLOCK_IN_ATOMIC, NULL); } /** * hwspin_unlock() - unlock hwspinlock * @hwlock: a previously-acquired hwspinlock which we want to unlock * * This function will unlock a specific hwspinlock and enable preemption * back. * * @hwlock must be already locked (e.g. by hwspin_trylock()) before calling * this function: it is a bug to call unlock on a @hwlock that is already * unlocked. */ static inline void hwspin_unlock(struct hwspinlock *hwlock) { __hwspin_unlock(hwlock, 0, NULL); } #endif /* __LINUX_HWSPINLOCK_H */ PK ! .�2U� � psp-tee.hnu �[��� /* SPDX-License-Identifier: MIT */ /* * AMD Trusted Execution Environment (TEE) interface * * Author: Rijo Thomas <Rijo-john.Thomas@amd.com> * * Copyright 2019 Advanced Micro Devices, Inc. * */ #ifndef __PSP_TEE_H_ #define __PSP_TEE_H_ #include <linux/types.h> #include <linux/errno.h> /* This file defines the Trusted Execution Environment (TEE) interface commands * and the API exported by AMD Secure Processor driver to communicate with * AMD-TEE Trusted OS. */ /** * enum tee_cmd_id - TEE Interface Command IDs * @TEE_CMD_ID_LOAD_TA: Load Trusted Application (TA) binary into * TEE environment * @TEE_CMD_ID_UNLOAD_TA: Unload TA binary from TEE environment * @TEE_CMD_ID_OPEN_SESSION: Open session with loaded TA * @TEE_CMD_ID_CLOSE_SESSION: Close session with loaded TA * @TEE_CMD_ID_INVOKE_CMD: Invoke a command with loaded TA * @TEE_CMD_ID_MAP_SHARED_MEM: Map shared memory * @TEE_CMD_ID_UNMAP_SHARED_MEM: Unmap shared memory */ enum tee_cmd_id { TEE_CMD_ID_LOAD_TA = 1, TEE_CMD_ID_UNLOAD_TA, TEE_CMD_ID_OPEN_SESSION, TEE_CMD_ID_CLOSE_SESSION, TEE_CMD_ID_INVOKE_CMD, TEE_CMD_ID_MAP_SHARED_MEM, TEE_CMD_ID_UNMAP_SHARED_MEM, }; #ifdef CONFIG_CRYPTO_DEV_SP_PSP /** * psp_tee_process_cmd() - Process command in Trusted Execution Environment * @cmd_id: TEE command ID (&enum tee_cmd_id) * @buf: Command buffer for TEE processing. On success, is updated * with the response * @len: Length of command buffer in bytes * @status: On success, holds the TEE command execution status * * This function submits a command to the Trusted OS for processing in the * TEE environment and waits for a response or until the command times out. * * Returns: * 0 if TEE successfully processed the command * -%ENODEV if PSP device not available * -%EINVAL if invalid input * -%ETIMEDOUT if TEE command timed out * -%EBUSY if PSP device is not responsive */ int psp_tee_process_cmd(enum tee_cmd_id cmd_id, void *buf, size_t len, u32 *status); /** * psp_check_tee_status() - Checks whether there is a TEE which a driver can * talk to. * * This function can be used by AMD-TEE driver to query if there is TEE with * which it can communicate. * * Returns: * 0 if the device has TEE * -%ENODEV if there is no TEE available */ int psp_check_tee_status(void); #else /* !CONFIG_CRYPTO_DEV_SP_PSP */ static inline int psp_tee_process_cmd(enum tee_cmd_id cmd_id, void *buf, size_t len, u32 *status) { return -ENODEV; } static inline int psp_check_tee_status(void) { return -ENODEV; } #endif /* CONFIG_CRYPTO_DEV_SP_PSP */ #endif /* __PSP_TEE_H_ */ PK ! �?7� � badblocks.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BADBLOCKS_H #define _LINUX_BADBLOCKS_H #include <linux/seqlock.h> #include <linux/device.h> #include <linux/kernel.h> #include <linux/stddef.h> #include <linux/types.h> #define BB_LEN_MASK (0x00000000000001FFULL) #define BB_OFFSET_MASK (0x7FFFFFFFFFFFFE00ULL) #define BB_ACK_MASK (0x8000000000000000ULL) #define BB_MAX_LEN 512 #define BB_OFFSET(x) (((x) & BB_OFFSET_MASK) >> 9) #define BB_LEN(x) (((x) & BB_LEN_MASK) + 1) #define BB_ACK(x) (!!((x) & BB_ACK_MASK)) #define BB_MAKE(a, l, ack) (((a)<<9) | ((l)-1) | ((u64)(!!(ack)) << 63)) /* Bad block numbers are stored sorted in a single page. * 64bits is used for each block or extent. * 54 bits are sector number, 9 bits are extent size, * 1 bit is an 'acknowledged' flag. */ #define MAX_BADBLOCKS (PAGE_SIZE/8) struct badblocks { struct device *dev; /* set by devm_init_badblocks */ int count; /* count of bad blocks */ int unacked_exist; /* there probably are unacknowledged * bad blocks. This is only cleared * when a read discovers none */ int shift; /* shift from sectors to block size * a -ve shift means badblocks are * disabled.*/ u64 *page; /* badblock list */ int changed; seqlock_t lock; sector_t sector; sector_t size; /* in sectors */ }; int badblocks_check(struct badblocks *bb, sector_t s, int sectors, sector_t *first_bad, int *bad_sectors); int badblocks_set(struct badblocks *bb, sector_t s, int sectors, int acknowledged); int badblocks_clear(struct badblocks *bb, sector_t s, int sectors); void ack_all_badblocks(struct badblocks *bb); ssize_t badblocks_show(struct badblocks *bb, char *page, int unack); ssize_t badblocks_store(struct badblocks *bb, const char *page, size_t len, int unack); int badblocks_init(struct badblocks *bb, int enable); void badblocks_exit(struct badblocks *bb); struct device; int devm_init_badblocks(struct device *dev, struct badblocks *bb); static inline void devm_exit_badblocks(struct device *dev, struct badblocks *bb) { if (bb->dev != dev) { dev_WARN_ONCE(dev, 1, "%s: badblocks instance not associated\n", __func__); return; } badblocks_exit(bb); } #endif PK ! V�b�+ + compiler_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_COMPILER_TYPES_H #define __LINUX_COMPILER_TYPES_H #ifndef __ASSEMBLY__ #ifdef __CHECKER__ /* address spaces */ # define __kernel __attribute__((address_space(0))) # define __user __attribute__((noderef, address_space(__user))) # define __iomem __attribute__((noderef, address_space(__iomem))) # define __percpu __attribute__((noderef, address_space(__percpu))) # define __rcu __attribute__((noderef, address_space(__rcu))) static inline void __chk_user_ptr(const volatile void __user *ptr) { } static inline void __chk_io_ptr(const volatile void __iomem *ptr) { } /* context/locking */ # define __must_hold(x) __attribute__((context(x,1,1))) # define __acquires(x) __attribute__((context(x,0,1))) # define __releases(x) __attribute__((context(x,1,0))) # define __acquire(x) __context__(x,1) # define __release(x) __context__(x,-1) # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) /* other */ # define __force __attribute__((force)) # define __nocast __attribute__((nocast)) # define __safe __attribute__((safe)) # define __private __attribute__((noderef)) # define ACCESS_PRIVATE(p, member) (*((typeof((p)->member) __force *) &(p)->member)) #else /* __CHECKER__ */ /* address spaces */ # define __kernel # ifdef STRUCTLEAK_PLUGIN # define __user __attribute__((user)) # else # define __user # endif # define __iomem # define __percpu # define __rcu # define __chk_user_ptr(x) (void)0 # define __chk_io_ptr(x) (void)0 /* context/locking */ # define __must_hold(x) # define __acquires(x) # define __releases(x) # define __acquire(x) (void)0 # define __release(x) (void)0 # define __cond_lock(x,c) (c) /* other */ # define __force # define __nocast # define __safe # define __private # define ACCESS_PRIVATE(p, member) ((p)->member) # define __builtin_warning(x, y...) (1) #endif /* __CHECKER__ */ /* Indirect macros required for expanded argument pasting, eg. __LINE__. */ #define ___PASTE(a,b) a##b #define __PASTE(a,b) ___PASTE(a,b) #ifdef __KERNEL__ /* Attributes */ #include <linux/compiler_attributes.h> /* Builtins */ /* * __has_builtin is supported on gcc >= 10, clang >= 3 and icc >= 21. * In the meantime, to support gcc < 10, we implement __has_builtin * by hand. */ #ifndef __has_builtin #define __has_builtin(x) (0) #endif /* Compiler specific macros. */ #ifdef __clang__ #include <linux/compiler-clang.h> #elif defined(__INTEL_COMPILER) #include <linux/compiler-intel.h> #elif defined(__GNUC__) /* The above compilers also define __GNUC__, so order is important here. */ #include <linux/compiler-gcc.h> #else #error "Unknown compiler" #endif /* * Some architectures need to provide custom definitions of macros provided * by linux/compiler-*.h, and can do so using asm/compiler.h. We include that * conditionally rather than using an asm-generic wrapper in order to avoid * build failures if any C compilation, which will include this file via an * -include argument in c_flags, occurs prior to the asm-generic wrappers being * generated. */ #ifdef CONFIG_HAVE_ARCH_COMPILER_H #include <asm/compiler.h> #endif struct ftrace_branch_data { const char *func; const char *file; unsigned line; union { struct { unsigned long correct; unsigned long incorrect; }; struct { unsigned long miss; unsigned long hit; }; unsigned long miss_hit[2]; }; }; struct ftrace_likely_data { struct ftrace_branch_data data; unsigned long constant; }; #if defined(CC_USING_HOTPATCH) #define notrace __attribute__((hotpatch(0, 0))) #elif defined(CC_USING_PATCHABLE_FUNCTION_ENTRY) #define notrace __attribute__((patchable_function_entry(0, 0))) #else #define notrace __attribute__((__no_instrument_function__)) #endif /* * it doesn't make sense on ARM (currently the only user of __naked) * to trace naked functions because then mcount is called without * stack and frame pointer being set up and there is no chance to * restore the lr register to the value before mcount was called. */ #define __naked __attribute__((__naked__)) notrace #define __compiler_offsetof(a, b) __builtin_offsetof(a, b) /* * Prefer gnu_inline, so that extern inline functions do not emit an * externally visible function. This makes extern inline behave as per gnu89 * semantics rather than c99. This prevents multiple symbol definition errors * of extern inline functions at link time. * A lot of inline functions can cause havoc with function tracing. */ #define inline inline __gnu_inline __inline_maybe_unused notrace /* * gcc provides both __inline__ and __inline as alternate spellings of * the inline keyword, though the latter is undocumented. New kernel * code should only use the inline spelling, but some existing code * uses __inline__. Since we #define inline above, to ensure * __inline__ has the same semantics, we need this #define. * * However, the spelling __inline is strictly reserved for referring * to the bare keyword. */ #define __inline__ inline /* * GCC does not warn about unused static inline functions for -Wunused-function. * Suppress the warning in clang as well by using __maybe_unused, but enable it * for W=2 build. This will allow clang to find unused functions. */ #ifdef KBUILD_EXTRA_WARN2 #define __inline_maybe_unused #else #define __inline_maybe_unused __maybe_unused #endif /* * Rather then using noinline to prevent stack consumption, use * noinline_for_stack instead. For documentation reasons. */ #define noinline_for_stack noinline /* * Sanitizer helper attributes: Because using __always_inline and * __no_sanitize_* conflict, provide helper attributes that will either expand * to __no_sanitize_* in compilation units where instrumentation is enabled * (__SANITIZE_*__), or __always_inline in compilation units without * instrumentation (__SANITIZE_*__ undefined). */ #ifdef __SANITIZE_ADDRESS__ /* * We can't declare function 'inline' because __no_sanitize_address conflicts * with inlining. Attempt to inline it may cause a build failure. * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368 * '__maybe_unused' allows us to avoid defined-but-not-used warnings. */ # define __no_kasan_or_inline __no_sanitize_address notrace __maybe_unused # define __no_sanitize_or_inline __no_kasan_or_inline #else # define __no_kasan_or_inline __always_inline #endif #define __no_kcsan __no_sanitize_thread #ifdef __SANITIZE_THREAD__ # define __no_sanitize_or_inline __no_kcsan notrace __maybe_unused #endif #ifndef __no_sanitize_or_inline #define __no_sanitize_or_inline __always_inline #endif /* Section for code which can't be instrumented at all */ #define noinstr \ noinline notrace __attribute((__section__(".noinstr.text"))) \ __no_kcsan __no_sanitize_address __no_profile __no_sanitize_coverage #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ /* * The below symbols may be defined for one or more, but not ALL, of the above * compilers. We don't consider that to be an error, so set them to nothing. * For example, some of them are for compiler specific plugins. */ #ifndef __latent_entropy # define __latent_entropy #endif #ifndef __randomize_layout # define __randomize_layout __designated_init #endif #ifndef __no_randomize_layout # define __no_randomize_layout #endif #ifndef randomized_struct_fields_start # define randomized_struct_fields_start # define randomized_struct_fields_end #endif #ifndef __noscs # define __noscs #endif #ifndef __nocfi # define __nocfi #endif #ifndef __cficanonical # define __cficanonical #endif /* * Any place that could be marked with the "alloc_size" attribute is also * a place to be marked with the "malloc" attribute. Do this as part of the * __alloc_size macro to avoid redundant attributes and to avoid missing a * __malloc marking. */ #ifdef __alloc_size__ # define __alloc_size(x, ...) __alloc_size__(x, ## __VA_ARGS__) __malloc #else # define __alloc_size(x, ...) __malloc #endif #ifndef asm_volatile_goto #define asm_volatile_goto(x...) asm goto(x) #endif #ifdef CONFIG_CC_HAS_ASM_INLINE #define asm_inline asm __inline #else #define asm_inline asm #endif /* Are two types/vars the same type (ignoring qualifiers)? */ #define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) /* * __unqual_scalar_typeof(x) - Declare an unqualified scalar type, leaving * non-scalar types unchanged. */ /* * Prefer C11 _Generic for better compile-times and simpler code. Note: 'char' * is not type-compatible with 'signed char', and we define a separate case. */ #define __scalar_type_to_expr_cases(type) \ unsigned type: (unsigned type)0, \ signed type: (signed type)0 #define __unqual_scalar_typeof(x) typeof( \ _Generic((x), \ char: (char)0, \ __scalar_type_to_expr_cases(char), \ __scalar_type_to_expr_cases(short), \ __scalar_type_to_expr_cases(int), \ __scalar_type_to_expr_cases(long), \ __scalar_type_to_expr_cases(long long), \ default: (x))) /* Is this type a native word size -- useful for atomic operations */ #define __native_word(t) \ (sizeof(t) == sizeof(char) || sizeof(t) == sizeof(short) || \ sizeof(t) == sizeof(int) || sizeof(t) == sizeof(long)) /* Compile time object size, -1 for unknown */ #ifndef __compiletime_object_size # define __compiletime_object_size(obj) -1 #endif #ifdef __OPTIMIZE__ # define __compiletime_assert(condition, msg, prefix, suffix) \ do { \ extern void prefix ## suffix(void) __compiletime_error(msg); \ if (!(condition)) \ prefix ## suffix(); \ } while (0) #else # define __compiletime_assert(condition, msg, prefix, suffix) do { } while (0) #endif #define _compiletime_assert(condition, msg, prefix, suffix) \ __compiletime_assert(condition, msg, prefix, suffix) /** * compiletime_assert - break build and emit msg if condition is false * @condition: a compile-time constant condition to check * @msg: a message to emit if condition is false * * In tradition of POSIX assert, this macro will break the build if the * supplied condition is *false*, emitting the supplied error message if the * compiler has support to do so. */ #define compiletime_assert(condition, msg) \ _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) #define compiletime_assert_atomic_type(t) \ compiletime_assert(__native_word(t), \ "Need native word sized stores/loads for atomicity.") /* Helpers for emitting diagnostics in pragmas. */ #ifndef __diag #define __diag(string) #endif #ifndef __diag_GCC #define __diag_GCC(version, severity, string) #endif #define __diag_push() __diag(push) #define __diag_pop() __diag(pop) #define __diag_ignore(compiler, version, option, comment) \ __diag_ ## compiler(version, ignore, option) #define __diag_warn(compiler, version, option, comment) \ __diag_ ## compiler(version, warn, option) #define __diag_error(compiler, version, option, comment) \ __diag_ ## compiler(version, error, option) #endif /* __LINUX_COMPILER_TYPES_H */ PK ! %��J� � cfi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Clang Control Flow Integrity (CFI) support. * * Copyright (C) 2021 Google LLC */ #ifndef _LINUX_CFI_H #define _LINUX_CFI_H #ifdef CONFIG_CFI_CLANG typedef void (*cfi_check_fn)(uint64_t id, void *ptr, void *diag); /* Compiler-generated function in each module, and the kernel */ extern void __cfi_check(uint64_t id, void *ptr, void *diag); /* * Force the compiler to generate a CFI jump table entry for a function * and store the jump table address to __cfi_jt_<function>. */ #define __CFI_ADDRESSABLE(fn, __attr) \ const void *__cfi_jt_ ## fn __visible __attr = (void *)&fn #ifdef CONFIG_CFI_CLANG_SHADOW extern void cfi_module_add(struct module *mod, unsigned long base_addr); extern void cfi_module_remove(struct module *mod, unsigned long base_addr); #else static inline void cfi_module_add(struct module *mod, unsigned long base_addr) {} static inline void cfi_module_remove(struct module *mod, unsigned long base_addr) {} #endif /* CONFIG_CFI_CLANG_SHADOW */ #else /* !CONFIG_CFI_CLANG */ #define __CFI_ADDRESSABLE(fn, __attr) #endif /* CONFIG_CFI_CLANG */ #endif /* _LINUX_CFI_H */ PK ! �m�� � debugobjects.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DEBUGOBJECTS_H #define _LINUX_DEBUGOBJECTS_H #include <linux/list.h> #include <linux/spinlock.h> enum debug_obj_state { ODEBUG_STATE_NONE, ODEBUG_STATE_INIT, ODEBUG_STATE_INACTIVE, ODEBUG_STATE_ACTIVE, ODEBUG_STATE_DESTROYED, ODEBUG_STATE_NOTAVAILABLE, ODEBUG_STATE_MAX, }; struct debug_obj_descr; /** * struct debug_obj - representation of an tracked object * @node: hlist node to link the object into the tracker list * @state: tracked object state * @astate: current active state * @object: pointer to the real object * @descr: pointer to an object type specific debug description structure */ struct debug_obj { struct hlist_node node; enum debug_obj_state state; unsigned int astate; void *object; const struct debug_obj_descr *descr; }; /** * struct debug_obj_descr - object type specific debug description structure * * @name: name of the object typee * @debug_hint: function returning address, which have associated * kernel symbol, to allow identify the object * @is_static_object: return true if the obj is static, otherwise return false * @fixup_init: fixup function, which is called when the init check * fails. All fixup functions must return true if fixup * was successful, otherwise return false * @fixup_activate: fixup function, which is called when the activate check * fails * @fixup_destroy: fixup function, which is called when the destroy check * fails * @fixup_free: fixup function, which is called when the free check * fails * @fixup_assert_init: fixup function, which is called when the assert_init * check fails */ struct debug_obj_descr { const char *name; void *(*debug_hint)(void *addr); bool (*is_static_object)(void *addr); bool (*fixup_init)(void *addr, enum debug_obj_state state); bool (*fixup_activate)(void *addr, enum debug_obj_state state); bool (*fixup_destroy)(void *addr, enum debug_obj_state state); bool (*fixup_free)(void *addr, enum debug_obj_state state); bool (*fixup_assert_init)(void *addr, enum debug_obj_state state); }; #ifdef CONFIG_DEBUG_OBJECTS extern void debug_object_init (void *addr, const struct debug_obj_descr *descr); extern void debug_object_init_on_stack(void *addr, const struct debug_obj_descr *descr); extern int debug_object_activate (void *addr, const struct debug_obj_descr *descr); extern void debug_object_deactivate(void *addr, const struct debug_obj_descr *descr); extern void debug_object_destroy (void *addr, const struct debug_obj_descr *descr); extern void debug_object_free (void *addr, const struct debug_obj_descr *descr); extern void debug_object_assert_init(void *addr, const struct debug_obj_descr *descr); /* * Active state: * - Set at 0 upon initialization. * - Must return to 0 before deactivation. */ extern void debug_object_active_state(void *addr, const struct debug_obj_descr *descr, unsigned int expect, unsigned int next); extern void debug_objects_early_init(void); extern void debug_objects_mem_init(void); #else static inline void debug_object_init (void *addr, const struct debug_obj_descr *descr) { } static inline void debug_object_init_on_stack(void *addr, const struct debug_obj_descr *descr) { } static inline int debug_object_activate (void *addr, const struct debug_obj_descr *descr) { return 0; } static inline void debug_object_deactivate(void *addr, const struct debug_obj_descr *descr) { } static inline void debug_object_destroy (void *addr, const struct debug_obj_descr *descr) { } static inline void debug_object_free (void *addr, const struct debug_obj_descr *descr) { } static inline void debug_object_assert_init(void *addr, const struct debug_obj_descr *descr) { } static inline void debug_objects_early_init(void) { } static inline void debug_objects_mem_init(void) { } #endif #ifdef CONFIG_DEBUG_OBJECTS_FREE extern void debug_check_no_obj_freed(const void *address, unsigned long size); #else static inline void debug_check_no_obj_freed(const void *address, unsigned long size) { } #endif #endif PK ! D��� � hash.hnu �[��� #ifndef _LINUX_HASH_H #define _LINUX_HASH_H /* Fast hashing routine for ints, longs and pointers. (C) 2002 Nadia Yvette Chambers, IBM */ #include <asm/types.h> #include <linux/compiler.h> /* * The "GOLDEN_RATIO_PRIME" is used in ifs/btrfs/brtfs_inode.h and * fs/inode.c. It's not actually prime any more (the previous primes * were actively bad for hashing), but the name remains. */ #if BITS_PER_LONG == 32 #define GOLDEN_RATIO_PRIME GOLDEN_RATIO_32 #define hash_long(val, bits) hash_32(val, bits) #elif BITS_PER_LONG == 64 #define hash_long(val, bits) hash_64(val, bits) #define GOLDEN_RATIO_PRIME GOLDEN_RATIO_64 #else #error Wordsize not 32 or 64 #endif /* * This hash multiplies the input by a large odd number and takes the * high bits. Since multiplication propagates changes to the most * significant end only, it is essential that the high bits of the * product be used for the hash value. * * Chuck Lever verified the effectiveness of this technique: * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf * * Although a random odd number will do, it turns out that the golden * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice * properties. (See Knuth vol 3, section 6.4, exercise 9.) * * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2, * which is very slightly easier to multiply by and makes no * difference to the hash distribution. */ #define GOLDEN_RATIO_32 0x61C88647 #define GOLDEN_RATIO_64 0x61C8864680B583EBull #ifdef CONFIG_HAVE_ARCH_HASH /* This header may use the GOLDEN_RATIO_xx constants */ #include <asm/hash.h> #endif /* * The _generic versions exist only so lib/test_hash.c can compare * the arch-optimized versions with the generic. * * Note that if you change these, any <asm/hash.h> that aren't updated * to match need to have their HAVE_ARCH_* define values updated so the * self-test will not false-positive. */ #ifndef HAVE_ARCH__HASH_32 #define __hash_32 __hash_32_generic #endif static inline u32 __hash_32_generic(u32 val) { return val * GOLDEN_RATIO_32; } #ifndef HAVE_ARCH_HASH_32 #define hash_32 hash_32_generic #endif static inline u32 hash_32_generic(u32 val, unsigned int bits) { /* High bits are more random, so use them. */ return __hash_32(val) >> (32 - bits); } #ifndef HAVE_ARCH_HASH_64 #define hash_64 hash_64_generic #endif static __always_inline u32 hash_64_generic(u64 val, unsigned int bits) { #if BITS_PER_LONG == 64 /* 64x64-bit multiply is efficient on all 64-bit processors */ return val * GOLDEN_RATIO_64 >> (64 - bits); #else /* Hash 64 bits using only 32x32-bit multiply. */ return hash_32((u32)val ^ __hash_32(val >> 32), bits); #endif } static inline u32 hash_ptr(const void *ptr, unsigned int bits) { return hash_long((unsigned long)ptr, bits); } /* This really should be called fold32_ptr; it does no hashing to speak of. */ static inline u32 hash32_ptr(const void *ptr) { unsigned long val = (unsigned long)ptr; #if BITS_PER_LONG == 64 val ^= (val >> 32); #endif return (u32)val; } #endif /* _LINUX_HASH_H */ PK ! �|�f mailbox/mtk-cmdq-mailbox.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018 MediaTek Inc. * */ #ifndef __MTK_CMDQ_MAILBOX_H__ #define __MTK_CMDQ_MAILBOX_H__ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/types.h> #define CMDQ_INST_SIZE 8 /* instruction is 64-bit */ #define CMDQ_SUBSYS_SHIFT 16 #define CMDQ_OP_CODE_SHIFT 24 #define CMDQ_JUMP_PASS CMDQ_INST_SIZE #define CMDQ_WFE_UPDATE BIT(31) #define CMDQ_WFE_UPDATE_VALUE BIT(16) #define CMDQ_WFE_WAIT BIT(15) #define CMDQ_WFE_WAIT_VALUE 0x1 /* * WFE arg_b * bit 0-11: wait value * bit 15: 1 - wait, 0 - no wait * bit 16-27: update value * bit 31: 1 - update, 0 - no update */ #define CMDQ_WFE_OPTION (CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE) /** cmdq event maximum */ #define CMDQ_MAX_EVENT 0x3ff /* * CMDQ_CODE_MASK: * set write mask * format: op mask * CMDQ_CODE_WRITE: * write value into target register * format: op subsys address value * CMDQ_CODE_JUMP: * jump by offset * format: op offset * CMDQ_CODE_WFE: * wait for event and clear * it is just clear if no wait * format: [wait] op event update:1 to_wait:1 wait:1 * [clear] op event update:1 to_wait:0 wait:0 * CMDQ_CODE_EOC: * end of command * format: op irq_flag */ enum cmdq_code { CMDQ_CODE_MASK = 0x02, CMDQ_CODE_WRITE = 0x04, CMDQ_CODE_POLL = 0x08, CMDQ_CODE_JUMP = 0x10, CMDQ_CODE_WFE = 0x20, CMDQ_CODE_EOC = 0x40, CMDQ_CODE_READ_S = 0x80, CMDQ_CODE_WRITE_S = 0x90, CMDQ_CODE_WRITE_S_MASK = 0x91, CMDQ_CODE_LOGIC = 0xa0, }; struct cmdq_cb_data { int sta; void *data; struct cmdq_pkt *pkt; }; typedef void (*cmdq_async_flush_cb)(struct cmdq_cb_data data); struct cmdq_task_cb { cmdq_async_flush_cb cb; void *data; }; struct cmdq_pkt { void *va_base; dma_addr_t pa_base; size_t cmd_buf_size; /* command occupied size */ size_t buf_size; /* real buffer size */ struct cmdq_task_cb cb; struct cmdq_task_cb async_cb; void *cl; }; u8 cmdq_get_shift_pa(struct mbox_chan *chan); #endif /* __MTK_CMDQ_MAILBOX_H__ */ PK ! r��O� � mailbox/brcm-message.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Broadcom * * Common header for Broadcom mailbox messages which is shared across * Broadcom SoCs and Broadcom mailbox client drivers. */ #ifndef _LINUX_BRCM_MESSAGE_H_ #define _LINUX_BRCM_MESSAGE_H_ #include <linux/scatterlist.h> enum brcm_message_type { BRCM_MESSAGE_UNKNOWN = 0, BRCM_MESSAGE_BATCH, BRCM_MESSAGE_SPU, BRCM_MESSAGE_SBA, BRCM_MESSAGE_MAX, }; struct brcm_sba_command { u64 cmd; u64 *cmd_dma; dma_addr_t cmd_dma_addr; #define BRCM_SBA_CMD_TYPE_A BIT(0) #define BRCM_SBA_CMD_TYPE_B BIT(1) #define BRCM_SBA_CMD_TYPE_C BIT(2) #define BRCM_SBA_CMD_HAS_RESP BIT(3) #define BRCM_SBA_CMD_HAS_OUTPUT BIT(4) u64 flags; dma_addr_t resp; size_t resp_len; dma_addr_t data; size_t data_len; }; struct brcm_message { enum brcm_message_type type; union { struct { struct brcm_message *msgs; unsigned int msgs_queued; unsigned int msgs_count; } batch; struct { struct scatterlist *src; struct scatterlist *dst; } spu; struct { struct brcm_sba_command *cmds; unsigned int cmds_count; } sba; }; void *ctx; int error; }; #endif /* _LINUX_BRCM_MESSAGE_H_ */ PK ! ���� � mailbox/arm_mhuv2_message.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * ARM MHUv2 Mailbox Message * * Copyright (C) 2020 Arm Ltd. * Copyright (C) 2020 Linaro Ltd. */ #ifndef _LINUX_ARM_MHUV2_MESSAGE_H_ #define _LINUX_ARM_MHUV2_MESSAGE_H_ #include <linux/types.h> /* Data structure for data-transfer protocol */ struct arm_mhuv2_mbox_msg { void *data; size_t len; }; #endif /* _LINUX_ARM_MHUV2_MESSAGE_H_ */ PK ! ��'�� � mailbox/zynqmp-ipi-message.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ZYNQMP_IPI_MESSAGE_H_ #define _LINUX_ZYNQMP_IPI_MESSAGE_H_ /** * struct zynqmp_ipi_message - ZynqMP IPI message structure * @len: Length of message * @data: message payload * * This is the structure for data used in mbox_send_message * the maximum length of data buffer is fixed to 32 bytes. * Client is supposed to be aware of this. */ struct zynqmp_ipi_message { size_t len; u8 data[]; }; #endif /* _LINUX_ZYNQMP_IPI_MESSAGE_H_ */ PK ! p_ ,n n sockptr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020 Christoph Hellwig. * * Support for "universal" pointers that can point to either kernel or userspace * memory. */ #ifndef _LINUX_SOCKPTR_H #define _LINUX_SOCKPTR_H #include <linux/slab.h> #include <linux/uaccess.h> typedef struct { union { void *kernel; void __user *user; }; bool is_kernel : 1; } sockptr_t; static inline bool sockptr_is_kernel(sockptr_t sockptr) { return sockptr.is_kernel; } static inline sockptr_t KERNEL_SOCKPTR(void *p) { return (sockptr_t) { .kernel = p, .is_kernel = true }; } static inline sockptr_t USER_SOCKPTR(void __user *p) { return (sockptr_t) { .user = p }; } static inline bool sockptr_is_null(sockptr_t sockptr) { if (sockptr_is_kernel(sockptr)) return !sockptr.kernel; return !sockptr.user; } static inline int copy_from_sockptr_offset(void *dst, sockptr_t src, size_t offset, size_t size) { if (!sockptr_is_kernel(src)) return copy_from_user(dst, src.user + offset, size); memcpy(dst, src.kernel + offset, size); return 0; } static inline int copy_from_sockptr(void *dst, sockptr_t src, size_t size) { return copy_from_sockptr_offset(dst, src, 0, size); } static inline int copy_to_sockptr_offset(sockptr_t dst, size_t offset, const void *src, size_t size) { if (!sockptr_is_kernel(dst)) return copy_to_user(dst.user + offset, src, size); memcpy(dst.kernel + offset, src, size); return 0; } static inline int copy_to_sockptr(sockptr_t dst, const void *src, size_t size) { return copy_to_sockptr_offset(dst, 0, src, size); } static inline void *memdup_sockptr(sockptr_t src, size_t len) { void *p = kmalloc_track_caller(len, GFP_USER | __GFP_NOWARN); if (!p) return ERR_PTR(-ENOMEM); if (copy_from_sockptr(p, src, len)) { kfree(p); return ERR_PTR(-EFAULT); } return p; } static inline void *memdup_sockptr_nul(sockptr_t src, size_t len) { char *p = kmalloc_track_caller(len + 1, GFP_KERNEL); if (!p) return ERR_PTR(-ENOMEM); if (copy_from_sockptr(p, src, len)) { kfree(p); return ERR_PTR(-EFAULT); } p[len] = '\0'; return p; } static inline long strncpy_from_sockptr(char *dst, sockptr_t src, size_t count) { if (sockptr_is_kernel(src)) { size_t len = min(strnlen(src.kernel, count - 1) + 1, count); memcpy(dst, src.kernel, len); return len; } return strncpy_from_user(dst, src.user, count); } #endif /* _LINUX_SOCKPTR_H */ PK ! +0{�K K watch_queue.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* User-mappable watch queue * * Copyright (C) 2020 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) * * See Documentation/watch_queue.rst */ #ifndef _LINUX_WATCH_QUEUE_H #define _LINUX_WATCH_QUEUE_H #include <uapi/linux/watch_queue.h> #include <linux/kref.h> #include <linux/rcupdate.h> #ifdef CONFIG_WATCH_QUEUE struct cred; struct watch_type_filter { enum watch_notification_type type; __u32 subtype_filter[1]; /* Bitmask of subtypes to filter on */ __u32 info_filter; /* Filter on watch_notification::info */ __u32 info_mask; /* Mask of relevant bits in info_filter */ }; struct watch_filter { union { struct rcu_head rcu; /* Bitmask of accepted types */ DECLARE_BITMAP(type_filter, WATCH_TYPE__NR); }; u32 nr_filters; /* Number of filters */ struct watch_type_filter filters[]; }; struct watch_queue { struct rcu_head rcu; struct watch_filter __rcu *filter; struct pipe_inode_info *pipe; /* The pipe we're using as a buffer */ struct hlist_head watches; /* Contributory watches */ struct page **notes; /* Preallocated notifications */ unsigned long *notes_bitmap; /* Allocation bitmap for notes */ struct kref usage; /* Object usage count */ spinlock_t lock; unsigned int nr_notes; /* Number of notes */ unsigned int nr_pages; /* Number of pages in notes[] */ bool defunct; /* T when queues closed */ }; /* * Representation of a watch on an object. */ struct watch { union { struct rcu_head rcu; u32 info_id; /* ID to be OR'd in to info field */ }; struct watch_queue __rcu *queue; /* Queue to post events to */ struct hlist_node queue_node; /* Link in queue->watches */ struct watch_list __rcu *watch_list; struct hlist_node list_node; /* Link in watch_list->watchers */ const struct cred *cred; /* Creds of the owner of the watch */ void *private; /* Private data for the watched object */ u64 id; /* Internal identifier */ struct kref usage; /* Object usage count */ }; /* * List of watches on an object. */ struct watch_list { struct rcu_head rcu; struct hlist_head watchers; void (*release_watch)(struct watch *); spinlock_t lock; }; extern void __post_watch_notification(struct watch_list *, struct watch_notification *, const struct cred *, u64); extern struct watch_queue *get_watch_queue(int); extern void put_watch_queue(struct watch_queue *); extern void init_watch(struct watch *, struct watch_queue *); extern int add_watch_to_object(struct watch *, struct watch_list *); extern int remove_watch_from_object(struct watch_list *, struct watch_queue *, u64, bool); extern long watch_queue_set_size(struct pipe_inode_info *, unsigned int); extern long watch_queue_set_filter(struct pipe_inode_info *, struct watch_notification_filter __user *); extern int watch_queue_init(struct pipe_inode_info *); extern void watch_queue_clear(struct watch_queue *); static inline void init_watch_list(struct watch_list *wlist, void (*release_watch)(struct watch *)) { INIT_HLIST_HEAD(&wlist->watchers); spin_lock_init(&wlist->lock); wlist->release_watch = release_watch; } static inline void post_watch_notification(struct watch_list *wlist, struct watch_notification *n, const struct cred *cred, u64 id) { if (unlikely(wlist)) __post_watch_notification(wlist, n, cred, id); } static inline void remove_watch_list(struct watch_list *wlist, u64 id) { if (wlist) { remove_watch_from_object(wlist, NULL, id, true); kfree_rcu(wlist, rcu); } } /** * watch_sizeof - Calculate the information part of the size of a watch record, * given the structure size. */ #define watch_sizeof(STRUCT) (sizeof(STRUCT) << WATCH_INFO_LENGTH__SHIFT) #else static inline int watch_queue_init(struct pipe_inode_info *pipe) { return -ENOPKG; } #endif #endif /* _LINUX_WATCH_QUEUE_H */ PK ! q�䫡1 �1 hdmi.hnu �[��� /* * Copyright (C) 2012 Avionic Design GmbH * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sub license, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef __LINUX_HDMI_H_ #define __LINUX_HDMI_H_ #include <linux/types.h> #include <linux/device.h> enum hdmi_packet_type { HDMI_PACKET_TYPE_NULL = 0x00, HDMI_PACKET_TYPE_AUDIO_CLOCK_REGEN = 0x01, HDMI_PACKET_TYPE_AUDIO_SAMPLE = 0x02, HDMI_PACKET_TYPE_GENERAL_CONTROL = 0x03, HDMI_PACKET_TYPE_ACP = 0x04, HDMI_PACKET_TYPE_ISRC1 = 0x05, HDMI_PACKET_TYPE_ISRC2 = 0x06, HDMI_PACKET_TYPE_ONE_BIT_AUDIO_SAMPLE = 0x07, HDMI_PACKET_TYPE_DST_AUDIO = 0x08, HDMI_PACKET_TYPE_HBR_AUDIO_STREAM = 0x09, HDMI_PACKET_TYPE_GAMUT_METADATA = 0x0a, /* + enum hdmi_infoframe_type */ }; enum hdmi_infoframe_type { HDMI_INFOFRAME_TYPE_VENDOR = 0x81, HDMI_INFOFRAME_TYPE_AVI = 0x82, HDMI_INFOFRAME_TYPE_SPD = 0x83, HDMI_INFOFRAME_TYPE_AUDIO = 0x84, HDMI_INFOFRAME_TYPE_DRM = 0x87, }; #define HDMI_IEEE_OUI 0x000c03 #define HDMI_FORUM_IEEE_OUI 0xc45dd8 #define HDMI_INFOFRAME_HEADER_SIZE 4 #define HDMI_AVI_INFOFRAME_SIZE 13 #define HDMI_SPD_INFOFRAME_SIZE 25 #define HDMI_AUDIO_INFOFRAME_SIZE 10 #define HDMI_DRM_INFOFRAME_SIZE 26 #define HDMI_VENDOR_INFOFRAME_SIZE 4 #define HDMI_INFOFRAME_SIZE(type) \ (HDMI_INFOFRAME_HEADER_SIZE + HDMI_ ## type ## _INFOFRAME_SIZE) struct hdmi_any_infoframe { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; }; enum hdmi_colorspace { HDMI_COLORSPACE_RGB, HDMI_COLORSPACE_YUV422, HDMI_COLORSPACE_YUV444, HDMI_COLORSPACE_YUV420, HDMI_COLORSPACE_RESERVED4, HDMI_COLORSPACE_RESERVED5, HDMI_COLORSPACE_RESERVED6, HDMI_COLORSPACE_IDO_DEFINED, }; enum hdmi_scan_mode { HDMI_SCAN_MODE_NONE, HDMI_SCAN_MODE_OVERSCAN, HDMI_SCAN_MODE_UNDERSCAN, HDMI_SCAN_MODE_RESERVED, }; enum hdmi_colorimetry { HDMI_COLORIMETRY_NONE, HDMI_COLORIMETRY_ITU_601, HDMI_COLORIMETRY_ITU_709, HDMI_COLORIMETRY_EXTENDED, }; enum hdmi_picture_aspect { HDMI_PICTURE_ASPECT_NONE, HDMI_PICTURE_ASPECT_4_3, HDMI_PICTURE_ASPECT_16_9, HDMI_PICTURE_ASPECT_64_27, HDMI_PICTURE_ASPECT_256_135, HDMI_PICTURE_ASPECT_RESERVED, }; enum hdmi_active_aspect { HDMI_ACTIVE_ASPECT_16_9_TOP = 2, HDMI_ACTIVE_ASPECT_14_9_TOP = 3, HDMI_ACTIVE_ASPECT_16_9_CENTER = 4, HDMI_ACTIVE_ASPECT_PICTURE = 8, HDMI_ACTIVE_ASPECT_4_3 = 9, HDMI_ACTIVE_ASPECT_16_9 = 10, HDMI_ACTIVE_ASPECT_14_9 = 11, HDMI_ACTIVE_ASPECT_4_3_SP_14_9 = 13, HDMI_ACTIVE_ASPECT_16_9_SP_14_9 = 14, HDMI_ACTIVE_ASPECT_16_9_SP_4_3 = 15, }; enum hdmi_extended_colorimetry { HDMI_EXTENDED_COLORIMETRY_XV_YCC_601, HDMI_EXTENDED_COLORIMETRY_XV_YCC_709, HDMI_EXTENDED_COLORIMETRY_S_YCC_601, HDMI_EXTENDED_COLORIMETRY_OPYCC_601, HDMI_EXTENDED_COLORIMETRY_OPRGB, /* The following EC values are only defined in CEA-861-F. */ HDMI_EXTENDED_COLORIMETRY_BT2020_CONST_LUM, HDMI_EXTENDED_COLORIMETRY_BT2020, HDMI_EXTENDED_COLORIMETRY_RESERVED, }; enum hdmi_quantization_range { HDMI_QUANTIZATION_RANGE_DEFAULT, HDMI_QUANTIZATION_RANGE_LIMITED, HDMI_QUANTIZATION_RANGE_FULL, HDMI_QUANTIZATION_RANGE_RESERVED, }; /* non-uniform picture scaling */ enum hdmi_nups { HDMI_NUPS_UNKNOWN, HDMI_NUPS_HORIZONTAL, HDMI_NUPS_VERTICAL, HDMI_NUPS_BOTH, }; enum hdmi_ycc_quantization_range { HDMI_YCC_QUANTIZATION_RANGE_LIMITED, HDMI_YCC_QUANTIZATION_RANGE_FULL, }; enum hdmi_content_type { HDMI_CONTENT_TYPE_GRAPHICS, HDMI_CONTENT_TYPE_PHOTO, HDMI_CONTENT_TYPE_CINEMA, HDMI_CONTENT_TYPE_GAME, }; enum hdmi_metadata_type { HDMI_STATIC_METADATA_TYPE1 = 0, }; enum hdmi_eotf { HDMI_EOTF_TRADITIONAL_GAMMA_SDR, HDMI_EOTF_TRADITIONAL_GAMMA_HDR, HDMI_EOTF_SMPTE_ST2084, HDMI_EOTF_BT_2100_HLG, }; struct hdmi_avi_infoframe { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; enum hdmi_colorspace colorspace; enum hdmi_scan_mode scan_mode; enum hdmi_colorimetry colorimetry; enum hdmi_picture_aspect picture_aspect; enum hdmi_active_aspect active_aspect; bool itc; enum hdmi_extended_colorimetry extended_colorimetry; enum hdmi_quantization_range quantization_range; enum hdmi_nups nups; unsigned char video_code; enum hdmi_ycc_quantization_range ycc_quantization_range; enum hdmi_content_type content_type; unsigned char pixel_repeat; unsigned short top_bar; unsigned short bottom_bar; unsigned short left_bar; unsigned short right_bar; }; /* DRM Infoframe as per CTA 861.G spec */ struct hdmi_drm_infoframe { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; enum hdmi_eotf eotf; enum hdmi_metadata_type metadata_type; struct { u16 x, y; } display_primaries[3]; struct { u16 x, y; } white_point; u16 max_display_mastering_luminance; u16 min_display_mastering_luminance; u16 max_cll; u16 max_fall; }; void hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame); ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_avi_infoframe_pack_only(const struct hdmi_avi_infoframe *frame, void *buffer, size_t size); int hdmi_avi_infoframe_check(struct hdmi_avi_infoframe *frame); int hdmi_drm_infoframe_init(struct hdmi_drm_infoframe *frame); ssize_t hdmi_drm_infoframe_pack(struct hdmi_drm_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_drm_infoframe_pack_only(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size); int hdmi_drm_infoframe_check(struct hdmi_drm_infoframe *frame); int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame, const void *buffer, size_t size); enum hdmi_spd_sdi { HDMI_SPD_SDI_UNKNOWN, HDMI_SPD_SDI_DSTB, HDMI_SPD_SDI_DVDP, HDMI_SPD_SDI_DVHS, HDMI_SPD_SDI_HDDVR, HDMI_SPD_SDI_DVC, HDMI_SPD_SDI_DSC, HDMI_SPD_SDI_VCD, HDMI_SPD_SDI_GAME, HDMI_SPD_SDI_PC, HDMI_SPD_SDI_BD, HDMI_SPD_SDI_SACD, HDMI_SPD_SDI_HDDVD, HDMI_SPD_SDI_PMP, }; struct hdmi_spd_infoframe { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; char vendor[8]; char product[16]; enum hdmi_spd_sdi sdi; }; int hdmi_spd_infoframe_init(struct hdmi_spd_infoframe *frame, const char *vendor, const char *product); ssize_t hdmi_spd_infoframe_pack(struct hdmi_spd_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_spd_infoframe_pack_only(const struct hdmi_spd_infoframe *frame, void *buffer, size_t size); int hdmi_spd_infoframe_check(struct hdmi_spd_infoframe *frame); enum hdmi_audio_coding_type { HDMI_AUDIO_CODING_TYPE_STREAM, HDMI_AUDIO_CODING_TYPE_PCM, HDMI_AUDIO_CODING_TYPE_AC3, HDMI_AUDIO_CODING_TYPE_MPEG1, HDMI_AUDIO_CODING_TYPE_MP3, HDMI_AUDIO_CODING_TYPE_MPEG2, HDMI_AUDIO_CODING_TYPE_AAC_LC, HDMI_AUDIO_CODING_TYPE_DTS, HDMI_AUDIO_CODING_TYPE_ATRAC, HDMI_AUDIO_CODING_TYPE_DSD, HDMI_AUDIO_CODING_TYPE_EAC3, HDMI_AUDIO_CODING_TYPE_DTS_HD, HDMI_AUDIO_CODING_TYPE_MLP, HDMI_AUDIO_CODING_TYPE_DST, HDMI_AUDIO_CODING_TYPE_WMA_PRO, HDMI_AUDIO_CODING_TYPE_CXT, }; enum hdmi_audio_sample_size { HDMI_AUDIO_SAMPLE_SIZE_STREAM, HDMI_AUDIO_SAMPLE_SIZE_16, HDMI_AUDIO_SAMPLE_SIZE_20, HDMI_AUDIO_SAMPLE_SIZE_24, }; enum hdmi_audio_sample_frequency { HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM, HDMI_AUDIO_SAMPLE_FREQUENCY_32000, HDMI_AUDIO_SAMPLE_FREQUENCY_44100, HDMI_AUDIO_SAMPLE_FREQUENCY_48000, HDMI_AUDIO_SAMPLE_FREQUENCY_88200, HDMI_AUDIO_SAMPLE_FREQUENCY_96000, HDMI_AUDIO_SAMPLE_FREQUENCY_176400, HDMI_AUDIO_SAMPLE_FREQUENCY_192000, }; enum hdmi_audio_coding_type_ext { /* Refer to Audio Coding Type (CT) field in Data Byte 1 */ HDMI_AUDIO_CODING_TYPE_EXT_CT, /* * The next three CXT values are defined in CEA-861-E only. * They do not exist in older versions, and in CEA-861-F they are * defined as 'Not in use'. */ HDMI_AUDIO_CODING_TYPE_EXT_HE_AAC, HDMI_AUDIO_CODING_TYPE_EXT_HE_AAC_V2, HDMI_AUDIO_CODING_TYPE_EXT_MPEG_SURROUND, /* The following CXT values are only defined in CEA-861-F. */ HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC, HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC_V2, HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_AAC_LC, HDMI_AUDIO_CODING_TYPE_EXT_DRA, HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC_SURROUND, HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_AAC_LC_SURROUND = 10, }; struct hdmi_audio_infoframe { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; unsigned char channels; enum hdmi_audio_coding_type coding_type; enum hdmi_audio_sample_size sample_size; enum hdmi_audio_sample_frequency sample_frequency; enum hdmi_audio_coding_type_ext coding_type_ext; unsigned char channel_allocation; unsigned char level_shift_value; bool downmix_inhibit; }; int hdmi_audio_infoframe_init(struct hdmi_audio_infoframe *frame); ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_audio_infoframe_pack_only(const struct hdmi_audio_infoframe *frame, void *buffer, size_t size); int hdmi_audio_infoframe_check(struct hdmi_audio_infoframe *frame); enum hdmi_3d_structure { HDMI_3D_STRUCTURE_INVALID = -1, HDMI_3D_STRUCTURE_FRAME_PACKING = 0, HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE, HDMI_3D_STRUCTURE_LINE_ALTERNATIVE, HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL, HDMI_3D_STRUCTURE_L_DEPTH, HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH, HDMI_3D_STRUCTURE_TOP_AND_BOTTOM, HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF = 8, }; struct hdmi_vendor_infoframe { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; unsigned int oui; u8 vic; enum hdmi_3d_structure s3d_struct; unsigned int s3d_ext_data; }; /* HDR Metadata as per 861.G spec */ struct hdr_static_metadata { __u8 eotf; __u8 metadata_type; __u16 max_cll; __u16 max_fall; __u16 min_cll; }; /** * struct hdr_sink_metadata - HDR sink metadata * * Metadata Information read from Sink's EDID */ struct hdr_sink_metadata { /** * @metadata_type: Static_Metadata_Descriptor_ID. */ __u32 metadata_type; /** * @hdmi_type1: HDR Metadata Infoframe. */ union { struct hdr_static_metadata hdmi_type1; }; }; int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame); ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_vendor_infoframe_pack_only(const struct hdmi_vendor_infoframe *frame, void *buffer, size_t size); int hdmi_vendor_infoframe_check(struct hdmi_vendor_infoframe *frame); union hdmi_vendor_any_infoframe { struct { enum hdmi_infoframe_type type; unsigned char version; unsigned char length; unsigned int oui; } any; struct hdmi_vendor_infoframe hdmi; }; /** * union hdmi_infoframe - overall union of all abstract infoframe representations * @any: generic infoframe * @avi: avi infoframe * @spd: spd infoframe * @vendor: union of all vendor infoframes * @audio: audio infoframe * @drm: Dynamic Range and Mastering infoframe * * This is used by the generic pack function. This works since all infoframes * have the same header which also indicates which type of infoframe should be * packed. */ union hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; }; ssize_t hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_infoframe_pack_only(const union hdmi_infoframe *frame, void *buffer, size_t size); int hdmi_infoframe_check(union hdmi_infoframe *frame); int hdmi_infoframe_unpack(union hdmi_infoframe *frame, const void *buffer, size_t size); void hdmi_infoframe_log(const char *level, struct device *dev, const union hdmi_infoframe *frame); #endif /* _DRM_HDMI_H */ PK ! ��6�> �> tty_driver.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TTY_DRIVER_H #define _LINUX_TTY_DRIVER_H /* * This structure defines the interface between the low-level tty * driver and the tty routines. The following routines can be * defined; unless noted otherwise, they are optional, and can be * filled in with a null pointer. * * struct tty_struct * (*lookup)(struct tty_driver *self, struct file *, int idx) * * Return the tty device corresponding to idx, NULL if there is not * one currently in use and an ERR_PTR value on error. Called under * tty_mutex (for now!) * * Optional method. Default behaviour is to use the ttys array * * int (*install)(struct tty_driver *self, struct tty_struct *tty) * * Install a new tty into the tty driver internal tables. Used in * conjunction with lookup and remove methods. * * Optional method. Default behaviour is to use the ttys array * * void (*remove)(struct tty_driver *self, struct tty_struct *tty) * * Remove a closed tty from the tty driver internal tables. Used in * conjunction with lookup and remove methods. * * Optional method. Default behaviour is to use the ttys array * * int (*open)(struct tty_struct * tty, struct file * filp); * * This routine is called when a particular tty device is opened. * This routine is mandatory; if this routine is not filled in, * the attempted open will fail with ENODEV. * * Required method. Called with tty lock held. * * void (*close)(struct tty_struct * tty, struct file * filp); * * This routine is called when a particular tty device is closed. * Note: called even if the corresponding open() failed. * * Required method. Called with tty lock held. * * void (*shutdown)(struct tty_struct * tty); * * This routine is called under the tty lock when a particular tty device * is closed for the last time. It executes before the tty resources * are freed so may execute while another function holds a tty kref. * * void (*cleanup)(struct tty_struct * tty); * * This routine is called asynchronously when a particular tty device * is closed for the last time freeing up the resources. This is * actually the second part of shutdown for routines that might sleep. * * * int (*write)(struct tty_struct * tty, * const unsigned char *buf, int count); * * This routine is called by the kernel to write a series of * characters to the tty device. The characters may come from * user space or kernel space. This routine will return the * number of characters actually accepted for writing. * * Optional: Required for writable devices. * * int (*put_char)(struct tty_struct *tty, unsigned char ch); * * This routine is called by the kernel to write a single * character to the tty device. If the kernel uses this routine, * it must call the flush_chars() routine (if defined) when it is * done stuffing characters into the driver. If there is no room * in the queue, the character is ignored. * * Optional: Kernel will use the write method if not provided. * * Note: Do not call this function directly, call tty_put_char * * void (*flush_chars)(struct tty_struct *tty); * * This routine is called by the kernel after it has written a * series of characters to the tty device using put_char(). * * Optional: * * Note: Do not call this function directly, call tty_driver_flush_chars * * unsigned int (*write_room)(struct tty_struct *tty); * * This routine returns the numbers of characters the tty driver * will accept for queuing to be written. This number is subject * to change as output buffers get emptied, or if the output flow * control is acted. * * Required if write method is provided else not needed. * * Note: Do not call this function directly, call tty_write_room * * int (*ioctl)(struct tty_struct *tty, unsigned int cmd, unsigned long arg); * * This routine allows the tty driver to implement * device-specific ioctls. If the ioctl number passed in cmd * is not recognized by the driver, it should return ENOIOCTLCMD. * * Optional * * long (*compat_ioctl)(struct tty_struct *tty,, * unsigned int cmd, unsigned long arg); * * implement ioctl processing for 32 bit process on 64 bit system * * Optional * * void (*set_termios)(struct tty_struct *tty, struct ktermios * old); * * This routine allows the tty driver to be notified when * device's termios settings have changed. * * Optional: Called under the termios lock * * * void (*set_ldisc)(struct tty_struct *tty); * * This routine allows the tty driver to be notified when the * device's termios settings have changed. * * Optional: Called under BKL (currently) * * void (*throttle)(struct tty_struct * tty); * * This routine notifies the tty driver that input buffers for * the line discipline are close to full, and it should somehow * signal that no more characters should be sent to the tty. * * Optional: Always invoke via tty_throttle_safe(), called under the * termios lock. * * void (*unthrottle)(struct tty_struct * tty); * * This routine notifies the tty drivers that it should signals * that characters can now be sent to the tty without fear of * overrunning the input buffers of the line disciplines. * * Optional: Always invoke via tty_unthrottle(), called under the * termios lock. * * void (*stop)(struct tty_struct *tty); * * This routine notifies the tty driver that it should stop * outputting characters to the tty device. * * Called with ->flow.lock held. Serialized with start() method. * * Optional: * * Note: Call stop_tty not this method. * * void (*start)(struct tty_struct *tty); * * This routine notifies the tty driver that it resume sending * characters to the tty device. * * Called with ->flow.lock held. Serialized with stop() method. * * Optional: * * Note: Call start_tty not this method. * * void (*hangup)(struct tty_struct *tty); * * This routine notifies the tty driver that it should hang up the * tty device. * * Optional: * * Called with tty lock held. * * int (*break_ctl)(struct tty_struct *tty, int state); * * This optional routine requests the tty driver to turn on or * off BREAK status on the RS-232 port. If state is -1, * then the BREAK status should be turned on; if state is 0, then * BREAK should be turned off. * * If this routine is implemented, the high-level tty driver will * handle the following ioctls: TCSBRK, TCSBRKP, TIOCSBRK, * TIOCCBRK. * * If the driver sets TTY_DRIVER_HARDWARE_BREAK then the interface * will also be called with actual times and the hardware is expected * to do the delay work itself. 0 and -1 are still used for on/off. * * Optional: Required for TCSBRK/BRKP/etc handling. * * void (*wait_until_sent)(struct tty_struct *tty, int timeout); * * This routine waits until the device has written out all of the * characters in its transmitter FIFO. * * Optional: If not provided the device is assumed to have no FIFO * * Note: Usually correct to call tty_wait_until_sent * * void (*send_xchar)(struct tty_struct *tty, char ch); * * This routine is used to send a high-priority XON/XOFF * character to the device. * * Optional: If not provided then the write method is called under * the atomic write lock to keep it serialized with the ldisc. * * int (*resize)(struct tty_struct *tty, struct winsize *ws) * * Called when a termios request is issued which changes the * requested terminal geometry. * * Optional: the default action is to update the termios structure * without error. This is usually the correct behaviour. Drivers should * not force errors here if they are not resizable objects (eg a serial * line). See tty_do_resize() if you need to wrap the standard method * in your own logic - the usual case. * * int (*get_icount)(struct tty_struct *tty, struct serial_icounter *icount); * * Called when the device receives a TIOCGICOUNT ioctl. Passed a kernel * structure to complete. This method is optional and will only be called * if provided (otherwise ENOTTY will be returned). */ #include <linux/export.h> #include <linux/fs.h> #include <linux/kref.h> #include <linux/list.h> #include <linux/cdev.h> #include <linux/termios.h> #include <linux/seq_file.h> struct tty_struct; struct tty_driver; struct serial_icounter_struct; struct serial_struct; struct tty_operations { struct tty_struct * (*lookup)(struct tty_driver *driver, struct file *filp, int idx); int (*install)(struct tty_driver *driver, struct tty_struct *tty); void (*remove)(struct tty_driver *driver, struct tty_struct *tty); int (*open)(struct tty_struct * tty, struct file * filp); void (*close)(struct tty_struct * tty, struct file * filp); void (*shutdown)(struct tty_struct *tty); void (*cleanup)(struct tty_struct *tty); int (*write)(struct tty_struct * tty, const unsigned char *buf, int count); int (*put_char)(struct tty_struct *tty, unsigned char ch); void (*flush_chars)(struct tty_struct *tty); unsigned int (*write_room)(struct tty_struct *tty); unsigned int (*chars_in_buffer)(struct tty_struct *tty); int (*ioctl)(struct tty_struct *tty, unsigned int cmd, unsigned long arg); long (*compat_ioctl)(struct tty_struct *tty, unsigned int cmd, unsigned long arg); void (*set_termios)(struct tty_struct *tty, struct ktermios * old); void (*throttle)(struct tty_struct * tty); void (*unthrottle)(struct tty_struct * tty); void (*stop)(struct tty_struct *tty); void (*start)(struct tty_struct *tty); void (*hangup)(struct tty_struct *tty); int (*break_ctl)(struct tty_struct *tty, int state); void (*flush_buffer)(struct tty_struct *tty); void (*set_ldisc)(struct tty_struct *tty); void (*wait_until_sent)(struct tty_struct *tty, int timeout); void (*send_xchar)(struct tty_struct *tty, char ch); int (*tiocmget)(struct tty_struct *tty); int (*tiocmset)(struct tty_struct *tty, unsigned int set, unsigned int clear); int (*resize)(struct tty_struct *tty, struct winsize *ws); int (*get_icount)(struct tty_struct *tty, struct serial_icounter_struct *icount); int (*get_serial)(struct tty_struct *tty, struct serial_struct *p); int (*set_serial)(struct tty_struct *tty, struct serial_struct *p); void (*show_fdinfo)(struct tty_struct *tty, struct seq_file *m); #ifdef CONFIG_CONSOLE_POLL int (*poll_init)(struct tty_driver *driver, int line, char *options); int (*poll_get_char)(struct tty_driver *driver, int line); void (*poll_put_char)(struct tty_driver *driver, int line, char ch); #endif int (*proc_show)(struct seq_file *, void *); } __randomize_layout; struct tty_driver { int magic; /* magic number for this structure */ struct kref kref; /* Reference management */ struct cdev **cdevs; struct module *owner; const char *driver_name; const char *name; int name_base; /* offset of printed name */ int major; /* major device number */ int minor_start; /* start of minor device number */ unsigned int num; /* number of devices allocated */ short type; /* type of tty driver */ short subtype; /* subtype of tty driver */ struct ktermios init_termios; /* Initial termios */ unsigned long flags; /* tty driver flags */ struct proc_dir_entry *proc_entry; /* /proc fs entry */ struct tty_driver *other; /* only used for the PTY driver */ /* * Pointer to the tty data structures */ struct tty_struct **ttys; struct tty_port **ports; struct ktermios **termios; void *driver_state; /* * Driver methods */ const struct tty_operations *ops; struct list_head tty_drivers; } __randomize_layout; extern struct list_head tty_drivers; extern struct tty_driver *__tty_alloc_driver(unsigned int lines, struct module *owner, unsigned long flags); extern struct tty_driver *tty_find_polling_driver(char *name, int *line); extern void tty_driver_kref_put(struct tty_driver *driver); /* Use TTY_DRIVER_* flags below */ #define tty_alloc_driver(lines, flags) \ __tty_alloc_driver(lines, THIS_MODULE, flags) static inline struct tty_driver *tty_driver_kref_get(struct tty_driver *d) { kref_get(&d->kref); return d; } static inline void tty_set_operations(struct tty_driver *driver, const struct tty_operations *op) { driver->ops = op; } /* tty driver magic number */ #define TTY_DRIVER_MAGIC 0x5402 /* * tty driver flags * * TTY_DRIVER_RESET_TERMIOS --- requests the tty layer to reset the * termios setting when the last process has closed the device. * Used for PTY's, in particular. * * TTY_DRIVER_REAL_RAW --- if set, indicates that the driver will * guarantee never not to set any special character handling * flags if ((IGNBRK || (!BRKINT && !PARMRK)) && (IGNPAR || * !INPCK)). That is, if there is no reason for the driver to * send notifications of parity and break characters up to the * line driver, it won't do so. This allows the line driver to * optimize for this case if this flag is set. (Note that there * is also a promise, if the above case is true, not to signal * overruns, either.) * * TTY_DRIVER_DYNAMIC_DEV --- if set, the individual tty devices need * to be registered with a call to tty_register_device() when the * device is found in the system and unregistered with a call to * tty_unregister_device() so the devices will be show up * properly in sysfs. If not set, driver->num entries will be * created by the tty core in sysfs when tty_register_driver() is * called. This is to be used by drivers that have tty devices * that can appear and disappear while the main tty driver is * registered with the tty core. * * TTY_DRIVER_DEVPTS_MEM -- don't use the standard arrays, instead * use dynamic memory keyed through the devpts filesystem. This * is only applicable to the pty driver. * * TTY_DRIVER_HARDWARE_BREAK -- hardware handles break signals. Pass * the requested timeout to the caller instead of using a simple * on/off interface. * * TTY_DRIVER_DYNAMIC_ALLOC -- do not allocate structures which are * needed per line for this driver as it would waste memory. * The driver will take care. * * TTY_DRIVER_UNNUMBERED_NODE -- do not create numbered /dev nodes. In * other words create /dev/ttyprintk and not /dev/ttyprintk0. * Applicable only when a driver for a single tty device is * being allocated. */ #define TTY_DRIVER_INSTALLED 0x0001 #define TTY_DRIVER_RESET_TERMIOS 0x0002 #define TTY_DRIVER_REAL_RAW 0x0004 #define TTY_DRIVER_DYNAMIC_DEV 0x0008 #define TTY_DRIVER_DEVPTS_MEM 0x0010 #define TTY_DRIVER_HARDWARE_BREAK 0x0020 #define TTY_DRIVER_DYNAMIC_ALLOC 0x0040 #define TTY_DRIVER_UNNUMBERED_NODE 0x0080 /* tty driver types */ #define TTY_DRIVER_TYPE_SYSTEM 0x0001 #define TTY_DRIVER_TYPE_CONSOLE 0x0002 #define TTY_DRIVER_TYPE_SERIAL 0x0003 #define TTY_DRIVER_TYPE_PTY 0x0004 #define TTY_DRIVER_TYPE_SCC 0x0005 /* scc driver */ #define TTY_DRIVER_TYPE_SYSCONS 0x0006 /* system subtypes (magic, used by tty_io.c) */ #define SYSTEM_TYPE_TTY 0x0001 #define SYSTEM_TYPE_CONSOLE 0x0002 #define SYSTEM_TYPE_SYSCONS 0x0003 #define SYSTEM_TYPE_SYSPTMX 0x0004 /* pty subtypes (magic, used by tty_io.c) */ #define PTY_TYPE_MASTER 0x0001 #define PTY_TYPE_SLAVE 0x0002 /* serial subtype definitions */ #define SERIAL_TYPE_NORMAL 1 int tty_register_driver(struct tty_driver *driver); void tty_unregister_driver(struct tty_driver *driver); struct device *tty_register_device(struct tty_driver *driver, unsigned index, struct device *dev); struct device *tty_register_device_attr(struct tty_driver *driver, unsigned index, struct device *device, void *drvdata, const struct attribute_group **attr_grp); void tty_unregister_device(struct tty_driver *driver, unsigned index); #ifdef CONFIG_PROC_FS void proc_tty_register_driver(struct tty_driver *); void proc_tty_unregister_driver(struct tty_driver *); #else static inline void proc_tty_register_driver(struct tty_driver *d) {} static inline void proc_tty_unregister_driver(struct tty_driver *d) {} #endif #endif /* #ifdef _LINUX_TTY_DRIVER_H */ PK ! E�F� � stackdepot.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * A generic stack depot implementation * * Author: Alexander Potapenko <glider@google.com> * Copyright (C) 2016 Google, Inc. * * Based on code by Dmitry Chernenkov. */ #ifndef _LINUX_STACKDEPOT_H #define _LINUX_STACKDEPOT_H typedef u32 depot_stack_handle_t; depot_stack_handle_t stack_depot_save(unsigned long *entries, unsigned int nr_entries, gfp_t gfp_flags); unsigned int stack_depot_fetch(depot_stack_handle_t handle, unsigned long **entries); #ifdef CONFIG_STACKDEPOT int stack_depot_init(void); #else static inline int stack_depot_init(void) { return 0; } #endif /* CONFIG_STACKDEPOT */ #endif PK ! o��� � vgaarb.hnu �[��� /* * The VGA aribiter manages VGA space routing and VGA resource decode to * allow multiple VGA devices to be used in a system in a safe way. * * (C) Copyright 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> * (C) Copyright 2007 Paulo R. Zanoni <przanoni@gmail.com> * (C) Copyright 2007, 2009 Tiago Vignatti <vignatti@freedesktop.org> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS * IN THE SOFTWARE. * */ #ifndef LINUX_VGA_H #define LINUX_VGA_H #include <video/vga.h> struct pci_dev; /* Legacy VGA regions */ #define VGA_RSRC_NONE 0x00 #define VGA_RSRC_LEGACY_IO 0x01 #define VGA_RSRC_LEGACY_MEM 0x02 #define VGA_RSRC_LEGACY_MASK (VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM) /* Non-legacy access */ #define VGA_RSRC_NORMAL_IO 0x04 #define VGA_RSRC_NORMAL_MEM 0x08 #ifdef CONFIG_VGA_ARB void vga_set_legacy_decoding(struct pci_dev *pdev, unsigned int decodes); int vga_get(struct pci_dev *pdev, unsigned int rsrc, int interruptible); void vga_put(struct pci_dev *pdev, unsigned int rsrc); struct pci_dev *vga_default_device(void); void vga_set_default_device(struct pci_dev *pdev); int vga_remove_vgacon(struct pci_dev *pdev); int vga_client_register(struct pci_dev *pdev, unsigned int (*set_decode)(struct pci_dev *pdev, bool state)); #else /* CONFIG_VGA_ARB */ static inline void vga_set_legacy_decoding(struct pci_dev *pdev, unsigned int decodes) { }; static inline int vga_get(struct pci_dev *pdev, unsigned int rsrc, int interruptible) { return 0; } static inline void vga_put(struct pci_dev *pdev, unsigned int rsrc) { } static inline struct pci_dev *vga_default_device(void) { return NULL; } static inline void vga_set_default_device(struct pci_dev *pdev) { } static inline int vga_remove_vgacon(struct pci_dev *pdev) { return 0; } static inline int vga_client_register(struct pci_dev *pdev, unsigned int (*set_decode)(struct pci_dev *pdev, bool state)) { return 0; } #endif /* CONFIG_VGA_ARB */ /** * vga_get_interruptible * @pdev: pci device of the VGA card or NULL for the system default * @rsrc: bit mask of resources to acquire and lock * * Shortcut to vga_get with interruptible set to true. * * On success, release the VGA resource again with vga_put(). */ static inline int vga_get_interruptible(struct pci_dev *pdev, unsigned int rsrc) { return vga_get(pdev, rsrc, 1); } /** * vga_get_uninterruptible - shortcut to vga_get() * @pdev: pci device of the VGA card or NULL for the system default * @rsrc: bit mask of resources to acquire and lock * * Shortcut to vga_get with interruptible set to false. * * On success, release the VGA resource again with vga_put(). */ static inline int vga_get_uninterruptible(struct pci_dev *pdev, unsigned int rsrc) { return vga_get(pdev, rsrc, 0); } static inline void vga_client_unregister(struct pci_dev *pdev) { vga_client_register(pdev, NULL); } #endif /* LINUX_VGA_H */ PK ! h��.� � nsc_gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /** nsc_gpio.c National Semiconductor GPIO common access methods. struct nsc_gpio_ops abstracts the low-level access operations for the GPIO units on 2 NSC chip families; the GEODE integrated CPU, and the PC-8736[03456] integrated PC-peripheral chips. The GPIO units on these chips have the same pin architecture, but the access methods differ. Thus, scx200_gpio and pc8736x_gpio implement their own versions of these routines; and use the common file-operations routines implemented in nsc_gpio module. Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com> NB: this work was tested on the Geode SC-1100 and PC-87366 chips. NSC sold the GEODE line to AMD, and the PC-8736x line to Winbond. */ struct nsc_gpio_ops { struct module* owner; u32 (*gpio_config) (unsigned iminor, u32 mask, u32 bits); void (*gpio_dump) (struct nsc_gpio_ops *amp, unsigned iminor); int (*gpio_get) (unsigned iminor); void (*gpio_set) (unsigned iminor, int state); void (*gpio_change) (unsigned iminor); int (*gpio_current) (unsigned iminor); struct device* dev; /* for dev_dbg() support, set in init */ }; extern ssize_t nsc_gpio_write(struct file *file, const char __user *data, size_t len, loff_t *ppos); extern ssize_t nsc_gpio_read(struct file *file, char __user *buf, size_t len, loff_t *ppos); extern void nsc_gpio_dump(struct nsc_gpio_ops *amp, unsigned index); PK ! @�d{� � gpio_keys.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _GPIO_KEYS_H #define _GPIO_KEYS_H #include <linux/types.h> struct device; /** * struct gpio_keys_button - configuration parameters * @code: input event code (KEY_*, SW_*) * @gpio: %-1 if this key does not support gpio * @active_low: %true indicates that button is considered * depressed when gpio is low * @desc: label that will be attached to button's gpio * @type: input event type (%EV_KEY, %EV_SW, %EV_ABS) * @wakeup: configure the button as a wake-up source * @wakeup_event_action: event action to trigger wakeup * @debounce_interval: debounce ticks interval in msecs * @can_disable: %true indicates that userspace is allowed to * disable button via sysfs * @value: axis value for %EV_ABS * @irq: Irq number in case of interrupt keys */ struct gpio_keys_button { unsigned int code; int gpio; int active_low; const char *desc; unsigned int type; int wakeup; int wakeup_event_action; int debounce_interval; bool can_disable; int value; unsigned int irq; }; /** * struct gpio_keys_platform_data - platform data for gpio_keys driver * @buttons: pointer to array of &gpio_keys_button structures * describing buttons attached to the device * @nbuttons: number of elements in @buttons array * @poll_interval: polling interval in msecs - for polling driver only * @rep: enable input subsystem auto repeat * @enable: platform hook for enabling the device * @disable: platform hook for disabling the device * @name: input device name */ struct gpio_keys_platform_data { const struct gpio_keys_button *buttons; int nbuttons; unsigned int poll_interval; unsigned int rep:1; int (*enable)(struct device *dev); void (*disable)(struct device *dev); const char *name; }; #endif PK ! ��P� msdos_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MSDOS_FS_H #define _LINUX_MSDOS_FS_H #include <uapi/linux/msdos_fs.h> /* media of boot sector */ static inline int fat_valid_media(u8 media) { return 0xf8 <= media || media == 0xf0; } #endif /* !_LINUX_MSDOS_FS_H */ PK ! ʁ��C �C sbitmap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Fast and scalable bitmaps. * * Copyright (C) 2016 Facebook * Copyright (C) 2013-2014 Jens Axboe */ #ifndef __LINUX_SCALE_BITMAP_H #define __LINUX_SCALE_BITMAP_H #include <linux/kernel.h> #include <linux/slab.h> struct seq_file; /** * struct sbitmap_word - Word in a &struct sbitmap. */ struct sbitmap_word { /** * @depth: Number of bits being used in @word/@cleared */ unsigned long depth; /** * @word: word holding free bits */ unsigned long word ____cacheline_aligned_in_smp; /** * @cleared: word holding cleared bits */ unsigned long cleared ____cacheline_aligned_in_smp; } ____cacheline_aligned_in_smp; /** * struct sbitmap - Scalable bitmap. * * A &struct sbitmap is spread over multiple cachelines to avoid ping-pong. This * trades off higher memory usage for better scalability. */ struct sbitmap { /** * @depth: Number of bits used in the whole bitmap. */ unsigned int depth; /** * @shift: log2(number of bits used per word) */ unsigned int shift; /** * @map_nr: Number of words (cachelines) being used for the bitmap. */ unsigned int map_nr; /** * @round_robin: Allocate bits in strict round-robin order. */ bool round_robin; /** * @map: Allocated bitmap. */ struct sbitmap_word *map; /* * @alloc_hint: Cache of last successfully allocated or freed bit. * * This is per-cpu, which allows multiple users to stick to different * cachelines until the map is exhausted. */ unsigned int __percpu *alloc_hint; }; #define SBQ_WAIT_QUEUES 8 #define SBQ_WAKE_BATCH 8 /** * struct sbq_wait_state - Wait queue in a &struct sbitmap_queue. */ struct sbq_wait_state { /** * @wait_cnt: Number of frees remaining before we wake up. */ atomic_t wait_cnt; /** * @wait: Wait queue. */ wait_queue_head_t wait; } ____cacheline_aligned_in_smp; /** * struct sbitmap_queue - Scalable bitmap with the added ability to wait on free * bits. * * A &struct sbitmap_queue uses multiple wait queues and rolling wakeups to * avoid contention on the wait queue spinlock. This ensures that we don't hit a * scalability wall when we run out of free bits and have to start putting tasks * to sleep. */ struct sbitmap_queue { /** * @sb: Scalable bitmap. */ struct sbitmap sb; /** * @wake_batch: Number of bits which must be freed before we wake up any * waiters. */ unsigned int wake_batch; /** * @wake_index: Next wait queue in @ws to wake up. */ atomic_t wake_index; /** * @ws: Wait queues. */ struct sbq_wait_state *ws; /* * @ws_active: count of currently active ws waitqueues */ atomic_t ws_active; /** * @min_shallow_depth: The minimum shallow depth which may be passed to * sbitmap_queue_get_shallow() or __sbitmap_queue_get_shallow(). */ unsigned int min_shallow_depth; }; /** * sbitmap_init_node() - Initialize a &struct sbitmap on a specific memory node. * @sb: Bitmap to initialize. * @depth: Number of bits to allocate. * @shift: Use 2^@shift bits per word in the bitmap; if a negative number if * given, a good default is chosen. * @flags: Allocation flags. * @node: Memory node to allocate on. * @round_robin: If true, be stricter about allocation order; always allocate * starting from the last allocated bit. This is less efficient * than the default behavior (false). * @alloc_hint: If true, apply percpu hint for where to start searching for * a free bit. * * Return: Zero on success or negative errno on failure. */ int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift, gfp_t flags, int node, bool round_robin, bool alloc_hint); /** * sbitmap_free() - Free memory used by a &struct sbitmap. * @sb: Bitmap to free. */ static inline void sbitmap_free(struct sbitmap *sb) { free_percpu(sb->alloc_hint); kfree(sb->map); sb->map = NULL; } /** * sbitmap_resize() - Resize a &struct sbitmap. * @sb: Bitmap to resize. * @depth: New number of bits to resize to. * * Doesn't reallocate anything. It's up to the caller to ensure that the new * depth doesn't exceed the depth that the sb was initialized with. */ void sbitmap_resize(struct sbitmap *sb, unsigned int depth); /** * sbitmap_get() - Try to allocate a free bit from a &struct sbitmap. * @sb: Bitmap to allocate from. * * This operation provides acquire barrier semantics if it succeeds. * * Return: Non-negative allocated bit number if successful, -1 otherwise. */ int sbitmap_get(struct sbitmap *sb); /** * sbitmap_get_shallow() - Try to allocate a free bit from a &struct sbitmap, * limiting the depth used from each word. * @sb: Bitmap to allocate from. * @shallow_depth: The maximum number of bits to allocate from a single word. * * This rather specific operation allows for having multiple users with * different allocation limits. E.g., there can be a high-priority class that * uses sbitmap_get() and a low-priority class that uses sbitmap_get_shallow() * with a @shallow_depth of (1 << (@sb->shift - 1)). Then, the low-priority * class can only allocate half of the total bits in the bitmap, preventing it * from starving out the high-priority class. * * Return: Non-negative allocated bit number if successful, -1 otherwise. */ int sbitmap_get_shallow(struct sbitmap *sb, unsigned long shallow_depth); /** * sbitmap_any_bit_set() - Check for a set bit in a &struct sbitmap. * @sb: Bitmap to check. * * Return: true if any bit in the bitmap is set, false otherwise. */ bool sbitmap_any_bit_set(const struct sbitmap *sb); #define SB_NR_TO_INDEX(sb, bitnr) ((bitnr) >> (sb)->shift) #define SB_NR_TO_BIT(sb, bitnr) ((bitnr) & ((1U << (sb)->shift) - 1U)) typedef bool (*sb_for_each_fn)(struct sbitmap *, unsigned int, void *); /** * __sbitmap_for_each_set() - Iterate over each set bit in a &struct sbitmap. * @start: Where to start the iteration. * @sb: Bitmap to iterate over. * @fn: Callback. Should return true to continue or false to break early. * @data: Pointer to pass to callback. * * This is inline even though it's non-trivial so that the function calls to the * callback will hopefully get optimized away. */ static inline void __sbitmap_for_each_set(struct sbitmap *sb, unsigned int start, sb_for_each_fn fn, void *data) { unsigned int index; unsigned int nr; unsigned int scanned = 0; if (start >= sb->depth) start = 0; index = SB_NR_TO_INDEX(sb, start); nr = SB_NR_TO_BIT(sb, start); while (scanned < sb->depth) { unsigned long word; unsigned int depth = min_t(unsigned int, sb->map[index].depth - nr, sb->depth - scanned); scanned += depth; word = sb->map[index].word & ~sb->map[index].cleared; if (!word) goto next; /* * On the first iteration of the outer loop, we need to add the * bit offset back to the size of the word for find_next_bit(). * On all other iterations, nr is zero, so this is a noop. */ depth += nr; while (1) { nr = find_next_bit(&word, depth, nr); if (nr >= depth) break; if (!fn(sb, (index << sb->shift) + nr, data)) return; nr++; } next: nr = 0; if (++index >= sb->map_nr) index = 0; } } /** * sbitmap_for_each_set() - Iterate over each set bit in a &struct sbitmap. * @sb: Bitmap to iterate over. * @fn: Callback. Should return true to continue or false to break early. * @data: Pointer to pass to callback. */ static inline void sbitmap_for_each_set(struct sbitmap *sb, sb_for_each_fn fn, void *data) { __sbitmap_for_each_set(sb, 0, fn, data); } static inline unsigned long *__sbitmap_word(struct sbitmap *sb, unsigned int bitnr) { return &sb->map[SB_NR_TO_INDEX(sb, bitnr)].word; } /* Helpers equivalent to the operations in asm/bitops.h and linux/bitmap.h */ static inline void sbitmap_set_bit(struct sbitmap *sb, unsigned int bitnr) { set_bit(SB_NR_TO_BIT(sb, bitnr), __sbitmap_word(sb, bitnr)); } static inline void sbitmap_clear_bit(struct sbitmap *sb, unsigned int bitnr) { clear_bit(SB_NR_TO_BIT(sb, bitnr), __sbitmap_word(sb, bitnr)); } /* * This one is special, since it doesn't actually clear the bit, rather it * sets the corresponding bit in the ->cleared mask instead. Paired with * the caller doing sbitmap_deferred_clear() if a given index is full, which * will clear the previously freed entries in the corresponding ->word. */ static inline void sbitmap_deferred_clear_bit(struct sbitmap *sb, unsigned int bitnr) { unsigned long *addr = &sb->map[SB_NR_TO_INDEX(sb, bitnr)].cleared; set_bit(SB_NR_TO_BIT(sb, bitnr), addr); } /* * Pair of sbitmap_get, and this one applies both cleared bit and * allocation hint. */ static inline void sbitmap_put(struct sbitmap *sb, unsigned int bitnr) { sbitmap_deferred_clear_bit(sb, bitnr); if (likely(sb->alloc_hint && !sb->round_robin && bitnr < sb->depth)) *raw_cpu_ptr(sb->alloc_hint) = bitnr; } static inline int sbitmap_test_bit(struct sbitmap *sb, unsigned int bitnr) { return test_bit(SB_NR_TO_BIT(sb, bitnr), __sbitmap_word(sb, bitnr)); } static inline int sbitmap_calculate_shift(unsigned int depth) { int shift = ilog2(BITS_PER_LONG); /* * If the bitmap is small, shrink the number of bits per word so * we spread over a few cachelines, at least. If less than 4 * bits, just forget about it, it's not going to work optimally * anyway. */ if (depth >= 4) { while ((4U << shift) > depth) shift--; } return shift; } /** * sbitmap_show() - Dump &struct sbitmap information to a &struct seq_file. * @sb: Bitmap to show. * @m: struct seq_file to write to. * * This is intended for debugging. The format may change at any time. */ void sbitmap_show(struct sbitmap *sb, struct seq_file *m); /** * sbitmap_weight() - Return how many set and not cleared bits in a &struct * sbitmap. * @sb: Bitmap to check. * * Return: How many set and not cleared bits set */ unsigned int sbitmap_weight(const struct sbitmap *sb); /** * sbitmap_bitmap_show() - Write a hex dump of a &struct sbitmap to a &struct * seq_file. * @sb: Bitmap to show. * @m: struct seq_file to write to. * * This is intended for debugging. The output isn't guaranteed to be internally * consistent. */ void sbitmap_bitmap_show(struct sbitmap *sb, struct seq_file *m); /** * sbitmap_queue_init_node() - Initialize a &struct sbitmap_queue on a specific * memory node. * @sbq: Bitmap queue to initialize. * @depth: See sbitmap_init_node(). * @shift: See sbitmap_init_node(). * @round_robin: See sbitmap_get(). * @flags: Allocation flags. * @node: Memory node to allocate on. * * Return: Zero on success or negative errno on failure. */ int sbitmap_queue_init_node(struct sbitmap_queue *sbq, unsigned int depth, int shift, bool round_robin, gfp_t flags, int node); /** * sbitmap_queue_free() - Free memory used by a &struct sbitmap_queue. * * @sbq: Bitmap queue to free. */ static inline void sbitmap_queue_free(struct sbitmap_queue *sbq) { kfree(sbq->ws); sbitmap_free(&sbq->sb); } /** * sbitmap_queue_resize() - Resize a &struct sbitmap_queue. * @sbq: Bitmap queue to resize. * @depth: New number of bits to resize to. * * Like sbitmap_resize(), this doesn't reallocate anything. It has to do * some extra work on the &struct sbitmap_queue, so it's not safe to just * resize the underlying &struct sbitmap. */ void sbitmap_queue_resize(struct sbitmap_queue *sbq, unsigned int depth); /** * __sbitmap_queue_get() - Try to allocate a free bit from a &struct * sbitmap_queue with preemption already disabled. * @sbq: Bitmap queue to allocate from. * * Return: Non-negative allocated bit number if successful, -1 otherwise. */ int __sbitmap_queue_get(struct sbitmap_queue *sbq); /** * __sbitmap_queue_get_shallow() - Try to allocate a free bit from a &struct * sbitmap_queue, limiting the depth used from each word, with preemption * already disabled. * @sbq: Bitmap queue to allocate from. * @shallow_depth: The maximum number of bits to allocate from a single word. * See sbitmap_get_shallow(). * * If you call this, make sure to call sbitmap_queue_min_shallow_depth() after * initializing @sbq. * * Return: Non-negative allocated bit number if successful, -1 otherwise. */ int __sbitmap_queue_get_shallow(struct sbitmap_queue *sbq, unsigned int shallow_depth); /** * sbitmap_queue_get() - Try to allocate a free bit from a &struct * sbitmap_queue. * @sbq: Bitmap queue to allocate from. * @cpu: Output parameter; will contain the CPU we ran on (e.g., to be passed to * sbitmap_queue_clear()). * * Return: Non-negative allocated bit number if successful, -1 otherwise. */ static inline int sbitmap_queue_get(struct sbitmap_queue *sbq, unsigned int *cpu) { int nr; *cpu = get_cpu(); nr = __sbitmap_queue_get(sbq); put_cpu(); return nr; } /** * sbitmap_queue_get_shallow() - Try to allocate a free bit from a &struct * sbitmap_queue, limiting the depth used from each word. * @sbq: Bitmap queue to allocate from. * @cpu: Output parameter; will contain the CPU we ran on (e.g., to be passed to * sbitmap_queue_clear()). * @shallow_depth: The maximum number of bits to allocate from a single word. * See sbitmap_get_shallow(). * * If you call this, make sure to call sbitmap_queue_min_shallow_depth() after * initializing @sbq. * * Return: Non-negative allocated bit number if successful, -1 otherwise. */ static inline int sbitmap_queue_get_shallow(struct sbitmap_queue *sbq, unsigned int *cpu, unsigned int shallow_depth) { int nr; *cpu = get_cpu(); nr = __sbitmap_queue_get_shallow(sbq, shallow_depth); put_cpu(); return nr; } /** * sbitmap_queue_min_shallow_depth() - Inform a &struct sbitmap_queue of the * minimum shallow depth that will be used. * @sbq: Bitmap queue in question. * @min_shallow_depth: The minimum shallow depth that will be passed to * sbitmap_queue_get_shallow() or __sbitmap_queue_get_shallow(). * * sbitmap_queue_clear() batches wakeups as an optimization. The batch size * depends on the depth of the bitmap. Since the shallow allocation functions * effectively operate with a different depth, the shallow depth must be taken * into account when calculating the batch size. This function must be called * with the minimum shallow depth that will be used. Failure to do so can result * in missed wakeups. */ void sbitmap_queue_min_shallow_depth(struct sbitmap_queue *sbq, unsigned int min_shallow_depth); /** * sbitmap_queue_clear() - Free an allocated bit and wake up waiters on a * &struct sbitmap_queue. * @sbq: Bitmap to free from. * @nr: Bit number to free. * @cpu: CPU the bit was allocated on. */ void sbitmap_queue_clear(struct sbitmap_queue *sbq, unsigned int nr, unsigned int cpu); static inline int sbq_index_inc(int index) { return (index + 1) & (SBQ_WAIT_QUEUES - 1); } static inline void sbq_index_atomic_inc(atomic_t *index) { int old = atomic_read(index); int new = sbq_index_inc(old); atomic_cmpxchg(index, old, new); } /** * sbq_wait_ptr() - Get the next wait queue to use for a &struct * sbitmap_queue. * @sbq: Bitmap queue to wait on. * @wait_index: A counter per "user" of @sbq. */ static inline struct sbq_wait_state *sbq_wait_ptr(struct sbitmap_queue *sbq, atomic_t *wait_index) { struct sbq_wait_state *ws; ws = &sbq->ws[atomic_read(wait_index)]; sbq_index_atomic_inc(wait_index); return ws; } /** * sbitmap_queue_wake_all() - Wake up everything waiting on a &struct * sbitmap_queue. * @sbq: Bitmap queue to wake up. */ void sbitmap_queue_wake_all(struct sbitmap_queue *sbq); /** * sbitmap_queue_wake_up() - Wake up some of waiters in one waitqueue * on a &struct sbitmap_queue. * @sbq: Bitmap queue to wake up. */ void sbitmap_queue_wake_up(struct sbitmap_queue *sbq); /** * sbitmap_queue_show() - Dump &struct sbitmap_queue information to a &struct * seq_file. * @sbq: Bitmap queue to show. * @m: struct seq_file to write to. * * This is intended for debugging. The format may change at any time. */ void sbitmap_queue_show(struct sbitmap_queue *sbq, struct seq_file *m); struct sbq_wait { struct sbitmap_queue *sbq; /* if set, sbq_wait is accounted */ struct wait_queue_entry wait; }; #define DEFINE_SBQ_WAIT(name) \ struct sbq_wait name = { \ .sbq = NULL, \ .wait = { \ .private = current, \ .func = autoremove_wake_function, \ .entry = LIST_HEAD_INIT((name).wait.entry), \ } \ } /* * Wrapper around prepare_to_wait_exclusive(), which maintains some extra * internal state. */ void sbitmap_prepare_to_wait(struct sbitmap_queue *sbq, struct sbq_wait_state *ws, struct sbq_wait *sbq_wait, int state); /* * Must be paired with sbitmap_prepare_to_wait(). */ void sbitmap_finish_wait(struct sbitmap_queue *sbq, struct sbq_wait_state *ws, struct sbq_wait *sbq_wait); /* * Wrapper around add_wait_queue(), which maintains some extra internal state */ void sbitmap_add_wait_queue(struct sbitmap_queue *sbq, struct sbq_wait_state *ws, struct sbq_wait *sbq_wait); /* * Must be paired with sbitmap_add_wait_queue() */ void sbitmap_del_wait_queue(struct sbq_wait *sbq_wait); #endif /* __LINUX_SCALE_BITMAP_H */ PK ! �}�� ioam6_iptunnel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * IPv6 IOAM Lightweight Tunnel API * * Author: * Justin Iurman <justin.iurman@uliege.be> */ #ifndef _LINUX_IOAM6_IPTUNNEL_H #define _LINUX_IOAM6_IPTUNNEL_H #include <uapi/linux/ioam6_iptunnel.h> #endif /* _LINUX_IOAM6_IPTUNNEL_H */ PK ! X�9�� � fs_uart_pd.hnu �[��� /* * Platform information definitions for the CPM Uart driver. * * 2006 (c) MontaVista Software, Inc. * Vitaly Bordug <vbordug@ru.mvista.com> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef FS_UART_PD_H #define FS_UART_PD_H #include <asm/types.h> enum fs_uart_id { fsid_smc1_uart, fsid_smc2_uart, fsid_scc1_uart, fsid_scc2_uart, fsid_scc3_uart, fsid_scc4_uart, fs_uart_nr, }; static inline int fs_uart_id_scc2fsid(int id) { return fsid_scc1_uart + id - 1; } static inline int fs_uart_id_fsid2scc(int id) { return id - fsid_scc1_uart + 1; } static inline int fs_uart_id_smc2fsid(int id) { return fsid_smc1_uart + id - 1; } static inline int fs_uart_id_fsid2smc(int id) { return id - fsid_smc1_uart + 1; } struct fs_uart_platform_info { void(*init_ioports)(struct fs_uart_platform_info *); /* device specific information */ int fs_no; /* controller index */ char fs_type[4]; /* controller type */ u32 uart_clk; u8 tx_num_fifo; u8 tx_buf_size; u8 rx_num_fifo; u8 rx_buf_size; u8 brg; u8 clk_rx; u8 clk_tx; }; static inline int fs_uart_get_id(struct fs_uart_platform_info *fpi) { if(strstr(fpi->fs_type, "SMC")) return fs_uart_id_smc2fsid(fpi->fs_no); if(strstr(fpi->fs_type, "SCC")) return fs_uart_id_scc2fsid(fpi->fs_no); return fpi->fs_no; } #endif PK ! ��'�R R local_lock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LOCAL_LOCK_H #define _LINUX_LOCAL_LOCK_H #include <linux/local_lock_internal.h> /** * local_lock_init - Runtime initialize a lock instance */ #define local_lock_init(lock) __local_lock_init(lock) /** * local_lock - Acquire a per CPU local lock * @lock: The lock variable */ #define local_lock(lock) __local_lock(lock) /** * local_lock_irq - Acquire a per CPU local lock and disable interrupts * @lock: The lock variable */ #define local_lock_irq(lock) __local_lock_irq(lock) /** * local_lock_irqsave - Acquire a per CPU local lock, save and disable * interrupts * @lock: The lock variable * @flags: Storage for interrupt flags */ #define local_lock_irqsave(lock, flags) \ __local_lock_irqsave(lock, flags) /** * local_unlock - Release a per CPU local lock * @lock: The lock variable */ #define local_unlock(lock) __local_unlock(lock) /** * local_unlock_irq - Release a per CPU local lock and enable interrupts * @lock: The lock variable */ #define local_unlock_irq(lock) __local_unlock_irq(lock) /** * local_unlock_irqrestore - Release a per CPU local lock and restore * interrupt flags * @lock: The lock variable * @flags: Interrupt flags to restore */ #define local_unlock_irqrestore(lock, flags) \ __local_unlock_irqrestore(lock, flags) #endif PK ! ��)@ @ psi_types.hnu �[��� #ifndef _LINUX_PSI_TYPES_H #define _LINUX_PSI_TYPES_H #include <linux/kthread.h> #include <linux/seqlock.h> #include <linux/types.h> #include <linux/kref.h> #include <linux/wait.h> #ifdef CONFIG_PSI /* Tracked task states */ enum psi_task_count { NR_IOWAIT, NR_MEMSTALL, NR_RUNNING, /* * This can't have values other than 0 or 1 and could be * implemented as a bit flag. But for now we still have room * in the first cacheline of psi_group_cpu, and this way we * don't have to special case any state tracking for it. */ NR_ONCPU, /* * For IO and CPU stalls the presence of running/oncpu tasks * in the domain means a partial rather than a full stall. * For memory it's not so simple because of page reclaimers: * they are running/oncpu while representing a stall. To tell * whether a domain has productivity left or not, we need to * distinguish between regular running (i.e. productive) * threads and memstall ones. */ NR_MEMSTALL_RUNNING, NR_PSI_TASK_COUNTS = 5, }; /* Task state bitmasks */ #define TSK_IOWAIT (1 << NR_IOWAIT) #define TSK_MEMSTALL (1 << NR_MEMSTALL) #define TSK_RUNNING (1 << NR_RUNNING) #define TSK_ONCPU (1 << NR_ONCPU) #define TSK_MEMSTALL_RUNNING (1 << NR_MEMSTALL_RUNNING) /* Resources that workloads could be stalled on */ enum psi_res { PSI_IO, PSI_MEM, PSI_CPU, NR_PSI_RESOURCES = 3, }; /* * Pressure states for each resource: * * SOME: Stalled tasks & working tasks * FULL: Stalled tasks & no working tasks */ enum psi_states { PSI_IO_SOME, PSI_IO_FULL, PSI_MEM_SOME, PSI_MEM_FULL, PSI_CPU_SOME, PSI_CPU_FULL, /* Only per-CPU, to weigh the CPU in the global average: */ PSI_NONIDLE, NR_PSI_STATES = 7, }; enum psi_aggregators { PSI_AVGS = 0, PSI_POLL, NR_PSI_AGGREGATORS, }; struct psi_group_cpu { /* 1st cacheline updated by the scheduler */ /* Aggregator needs to know of concurrent changes */ seqcount_t seq ____cacheline_aligned_in_smp; /* States of the tasks belonging to this group */ unsigned int tasks[NR_PSI_TASK_COUNTS]; /* Aggregate pressure state derived from the tasks */ u32 state_mask; /* Period time sampling buckets for each state of interest (ns) */ u32 times[NR_PSI_STATES]; /* Time of last task change in this group (rq_clock) */ u64 state_start; /* 2nd cacheline updated by the aggregator */ /* Delta detection against the sampling buckets */ u32 times_prev[NR_PSI_AGGREGATORS][NR_PSI_STATES] ____cacheline_aligned_in_smp; }; /* PSI growth tracking window */ struct psi_window { /* Window size in ns */ u64 size; /* Start time of the current window in ns */ u64 start_time; /* Value at the start of the window */ u64 start_value; /* Value growth in the previous window */ u64 prev_growth; }; struct psi_trigger { /* PSI state being monitored by the trigger */ enum psi_states state; /* User-spacified threshold in ns */ u64 threshold; /* List node inside triggers list */ struct list_head node; /* Backpointer needed during trigger destruction */ struct psi_group *group; /* Wait queue for polling */ wait_queue_head_t event_wait; /* Pending event flag */ int event; /* Tracking window */ struct psi_window win; /* * Time last event was generated. Used for rate-limiting * events to one per window */ u64 last_event_time; }; struct psi_group { /* Protects data used by the aggregator */ struct mutex avgs_lock; /* Per-cpu task state & time tracking */ struct psi_group_cpu __percpu *pcpu; /* Running pressure averages */ u64 avg_total[NR_PSI_STATES - 1]; u64 avg_last_update; u64 avg_next_update; /* Aggregator work control */ struct delayed_work avgs_work; /* Total stall times and sampled pressure averages */ u64 total[NR_PSI_AGGREGATORS][NR_PSI_STATES - 1]; unsigned long avg[NR_PSI_STATES - 1][3]; /* Monitor work control */ struct task_struct __rcu *poll_task; struct timer_list poll_timer; wait_queue_head_t poll_wait; atomic_t poll_wakeup; /* Protects data used by the monitor */ struct mutex trigger_lock; /* Configured polling triggers */ struct list_head triggers; u32 nr_triggers[NR_PSI_STATES - 1]; u32 poll_states; u64 poll_min_period; /* Total stall times at the start of monitor activation */ u64 polling_total[NR_PSI_STATES - 1]; u64 polling_next_update; u64 polling_until; }; #else /* CONFIG_PSI */ struct psi_group { }; #endif /* CONFIG_PSI */ #endif /* _LINUX_PSI_TYPES_H */ PK ! *rT� � trace_clock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TRACE_CLOCK_H #define _LINUX_TRACE_CLOCK_H /* * 3 trace clock variants, with differing scalability/precision * tradeoffs: * * - local: CPU-local trace clock * - medium: scalable global clock with some jitter * - global: globally monotonic, serialized clock */ #include <linux/compiler.h> #include <linux/types.h> #include <asm/trace_clock.h> extern u64 notrace trace_clock_local(void); extern u64 notrace trace_clock(void); extern u64 notrace trace_clock_jiffies(void); extern u64 notrace trace_clock_global(void); extern u64 notrace trace_clock_counter(void); #endif /* _LINUX_TRACE_CLOCK_H */ PK ! ��J J cc_platform.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Confidential Computing Platform Capability checks * * Copyright (C) 2021 Advanced Micro Devices, Inc. * * Author: Tom Lendacky <thomas.lendacky@amd.com> */ #ifndef _LINUX_CC_PLATFORM_H #define _LINUX_CC_PLATFORM_H #include <linux/types.h> #include <linux/stddef.h> /** * enum cc_attr - Confidential computing attributes * * These attributes represent confidential computing features that are * currently active. */ enum cc_attr { /** * @CC_ATTR_MEM_ENCRYPT: Memory encryption is active * * The platform/OS is running with active memory encryption. This * includes running either as a bare-metal system or a hypervisor * and actively using memory encryption or as a guest/virtual machine * and actively using memory encryption. * * Examples include SME, SEV and SEV-ES. */ CC_ATTR_MEM_ENCRYPT, /** * @CC_ATTR_HOST_MEM_ENCRYPT: Host memory encryption is active * * The platform/OS is running as a bare-metal system or a hypervisor * and actively using memory encryption. * * Examples include SME. */ CC_ATTR_HOST_MEM_ENCRYPT, /** * @CC_ATTR_GUEST_MEM_ENCRYPT: Guest memory encryption is active * * The platform/OS is running as a guest/virtual machine and actively * using memory encryption. * * Examples include SEV and SEV-ES. */ CC_ATTR_GUEST_MEM_ENCRYPT, /** * @CC_ATTR_GUEST_STATE_ENCRYPT: Guest state encryption is active * * The platform/OS is running as a guest/virtual machine and actively * using memory encryption and register state encryption. * * Examples include SEV-ES. */ CC_ATTR_GUEST_STATE_ENCRYPT, }; #ifdef CONFIG_ARCH_HAS_CC_PLATFORM /** * cc_platform_has() - Checks if the specified cc_attr attribute is active * @attr: Confidential computing attribute to check * * The cc_platform_has() function will return an indicator as to whether the * specified Confidential Computing attribute is currently active. * * Context: Any context * Return: * * TRUE - Specified Confidential Computing attribute is active * * FALSE - Specified Confidential Computing attribute is not active */ bool cc_platform_has(enum cc_attr attr); #else /* !CONFIG_ARCH_HAS_CC_PLATFORM */ static inline bool cc_platform_has(enum cc_attr attr) { return false; } #endif /* CONFIG_ARCH_HAS_CC_PLATFORM */ #endif /* _LINUX_CC_PLATFORM_H */ PK ! @�@� � kmsg_dump.hnu �[��� /* * linux/include/kmsg_dump.h * * Copyright (C) 2009 Net Insight AB * * Author: Simon Kagstrom <simon.kagstrom@netinsight.net> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #ifndef _LINUX_KMSG_DUMP_H #define _LINUX_KMSG_DUMP_H #include <linux/errno.h> #include <linux/list.h> /* * Keep this list arranged in rough order of priority. Anything listed after * KMSG_DUMP_OOPS will not be logged by default unless printk.always_kmsg_dump * is passed to the kernel. */ enum kmsg_dump_reason { KMSG_DUMP_UNDEF, KMSG_DUMP_PANIC, KMSG_DUMP_OOPS, KMSG_DUMP_EMERG, KMSG_DUMP_SHUTDOWN, KMSG_DUMP_MAX }; /** * struct kmsg_dump_iter - iterator for retrieving kernel messages * @cur_seq: Points to the oldest message to dump * @next_seq: Points after the newest message to dump */ struct kmsg_dump_iter { u64 cur_seq; u64 next_seq; }; /** * struct kmsg_dumper - kernel crash message dumper structure * @list: Entry in the dumper list (private) * @dump: Call into dumping code which will retrieve the data with * through the record iterator * @max_reason: filter for highest reason number that should be dumped * @registered: Flag that specifies if this is already registered */ struct kmsg_dumper { struct list_head list; void (*dump)(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason); enum kmsg_dump_reason max_reason; bool registered; }; #ifdef CONFIG_PRINTK void kmsg_dump(enum kmsg_dump_reason reason); bool kmsg_dump_get_line(struct kmsg_dump_iter *iter, bool syslog, char *line, size_t size, size_t *len); bool kmsg_dump_get_buffer(struct kmsg_dump_iter *iter, bool syslog, char *buf, size_t size, size_t *len_out); void kmsg_dump_rewind(struct kmsg_dump_iter *iter); int kmsg_dump_register(struct kmsg_dumper *dumper); int kmsg_dump_unregister(struct kmsg_dumper *dumper); const char *kmsg_dump_reason_str(enum kmsg_dump_reason reason); #else static inline void kmsg_dump(enum kmsg_dump_reason reason) { } static inline bool kmsg_dump_get_line(struct kmsg_dump_iter *iter, bool syslog, const char *line, size_t size, size_t *len) { return false; } static inline bool kmsg_dump_get_buffer(struct kmsg_dump_iter *iter, bool syslog, char *buf, size_t size, size_t *len) { return false; } static inline void kmsg_dump_rewind(struct kmsg_dump_iter *iter) { } static inline int kmsg_dump_register(struct kmsg_dumper *dumper) { return -EINVAL; } static inline int kmsg_dump_unregister(struct kmsg_dumper *dumper) { return -EINVAL; } static inline const char *kmsg_dump_reason_str(enum kmsg_dump_reason reason) { return "Disabled"; } #endif #endif /* _LINUX_KMSG_DUMP_H */ PK ! �v�" �" ipack.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Industry-pack bus. * * Copyright (C) 2011-2012 CERN (www.cern.ch) * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com> */ #include <linux/mod_devicetable.h> #include <linux/device.h> #include <linux/interrupt.h> #define IPACK_IDPROM_OFFSET_I 0x01 #define IPACK_IDPROM_OFFSET_P 0x03 #define IPACK_IDPROM_OFFSET_A 0x05 #define IPACK_IDPROM_OFFSET_C 0x07 #define IPACK_IDPROM_OFFSET_MANUFACTURER_ID 0x09 #define IPACK_IDPROM_OFFSET_MODEL 0x0B #define IPACK_IDPROM_OFFSET_REVISION 0x0D #define IPACK_IDPROM_OFFSET_RESERVED 0x0F #define IPACK_IDPROM_OFFSET_DRIVER_ID_L 0x11 #define IPACK_IDPROM_OFFSET_DRIVER_ID_H 0x13 #define IPACK_IDPROM_OFFSET_NUM_BYTES 0x15 #define IPACK_IDPROM_OFFSET_CRC 0x17 /* * IndustryPack Fromat, Vendor and Device IDs. */ /* ID section format versions */ #define IPACK_ID_VERSION_INVALID 0x00 #define IPACK_ID_VERSION_1 0x01 #define IPACK_ID_VERSION_2 0x02 /* Vendors and devices. Sort key: vendor first, device next. */ #define IPACK1_VENDOR_ID_RESERVED1 0x00 #define IPACK1_VENDOR_ID_RESERVED2 0xFF #define IPACK1_VENDOR_ID_UNREGISTRED01 0x01 #define IPACK1_VENDOR_ID_UNREGISTRED02 0x02 #define IPACK1_VENDOR_ID_UNREGISTRED03 0x03 #define IPACK1_VENDOR_ID_UNREGISTRED04 0x04 #define IPACK1_VENDOR_ID_UNREGISTRED05 0x05 #define IPACK1_VENDOR_ID_UNREGISTRED06 0x06 #define IPACK1_VENDOR_ID_UNREGISTRED07 0x07 #define IPACK1_VENDOR_ID_UNREGISTRED08 0x08 #define IPACK1_VENDOR_ID_UNREGISTRED09 0x09 #define IPACK1_VENDOR_ID_UNREGISTRED10 0x0A #define IPACK1_VENDOR_ID_UNREGISTRED11 0x0B #define IPACK1_VENDOR_ID_UNREGISTRED12 0x0C #define IPACK1_VENDOR_ID_UNREGISTRED13 0x0D #define IPACK1_VENDOR_ID_UNREGISTRED14 0x0E #define IPACK1_VENDOR_ID_UNREGISTRED15 0x0F #define IPACK1_VENDOR_ID_SBS 0xF0 #define IPACK1_DEVICE_ID_SBS_OCTAL_232 0x22 #define IPACK1_DEVICE_ID_SBS_OCTAL_422 0x2A #define IPACK1_DEVICE_ID_SBS_OCTAL_485 0x48 struct ipack_bus_ops; struct ipack_driver; enum ipack_space { IPACK_IO_SPACE = 0, IPACK_ID_SPACE, IPACK_INT_SPACE, IPACK_MEM8_SPACE, IPACK_MEM16_SPACE, /* Dummy for counting the number of entries. Must remain the last * entry */ IPACK_SPACE_COUNT, }; /** */ struct ipack_region { phys_addr_t start; size_t size; }; /** * struct ipack_device * * @slot: Slot where the device is plugged in the carrier board * @bus: ipack_bus_device where the device is plugged to. * @id_space: Virtual address to ID space. * @io_space: Virtual address to IO space. * @mem_space: Virtual address to MEM space. * @dev: device in kernel representation. * * Warning: Direct access to mapped memory is possible but the endianness * is not the same with PCI carrier or VME carrier. The endianness is managed * by the carrier board throught bus->ops. */ struct ipack_device { unsigned int slot; struct ipack_bus_device *bus; struct device dev; void (*release) (struct ipack_device *dev); struct ipack_region region[IPACK_SPACE_COUNT]; u8 *id; size_t id_avail; u32 id_vendor; u32 id_device; u8 id_format; unsigned int id_crc_correct:1; unsigned int speed_8mhz:1; unsigned int speed_32mhz:1; }; /** * struct ipack_driver_ops -- Callbacks to IPack device driver * * @probe: Probe function * @remove: Prepare imminent removal of the device. Services provided by the * device should be revoked. */ struct ipack_driver_ops { int (*probe) (struct ipack_device *dev); void (*remove) (struct ipack_device *dev); }; /** * struct ipack_driver -- Specific data to each ipack device driver * * @driver: Device driver kernel representation * @ops: Callbacks provided by the IPack device driver */ struct ipack_driver { struct device_driver driver; const struct ipack_device_id *id_table; const struct ipack_driver_ops *ops; }; /** * struct ipack_bus_ops - available operations on a bridge module * * @map_space: map IP address space * @unmap_space: unmap IP address space * @request_irq: request IRQ * @free_irq: free IRQ * @get_clockrate: Returns the clockrate the carrier is currently * communicating with the device at. * @set_clockrate: Sets the clock-rate for carrier / module communication. * Should return -EINVAL if the requested speed is not supported. * @get_error: Returns the error state for the slot the device is attached * to. * @get_timeout: Returns 1 if the communication with the device has * previously timed out. * @reset_timeout: Resets the state returned by get_timeout. */ struct ipack_bus_ops { int (*request_irq) (struct ipack_device *dev, irqreturn_t (*handler)(void *), void *arg); int (*free_irq) (struct ipack_device *dev); int (*get_clockrate) (struct ipack_device *dev); int (*set_clockrate) (struct ipack_device *dev, int mherz); int (*get_error) (struct ipack_device *dev); int (*get_timeout) (struct ipack_device *dev); int (*reset_timeout) (struct ipack_device *dev); }; /** * struct ipack_bus_device * * @dev: pointer to carrier device * @slots: number of slots available * @bus_nr: ipack bus number * @ops: bus operations for the mezzanine drivers */ struct ipack_bus_device { struct module *owner; struct device *parent; int slots; int bus_nr; const struct ipack_bus_ops *ops; }; /** * ipack_bus_register -- register a new ipack bus * * @parent: pointer to the parent device, if any. * @slots: number of slots available in the bus device. * @ops: bus operations for the mezzanine drivers. * * The carrier board device should call this function to register itself as * available bus device in ipack. */ struct ipack_bus_device *ipack_bus_register(struct device *parent, int slots, const struct ipack_bus_ops *ops, struct module *owner); /** * ipack_bus_unregister -- unregister an ipack bus */ int ipack_bus_unregister(struct ipack_bus_device *bus); /** * ipack_driver_register -- Register a new ipack device driver * * Called by a ipack driver to register itself as a driver * that can manage ipack devices. */ int ipack_driver_register(struct ipack_driver *edrv, struct module *owner, const char *name); void ipack_driver_unregister(struct ipack_driver *edrv); /** * ipack_device_init -- initialize an IPack device * @dev: the new device to initialize. * * Initialize a new IPack device ("module" in IndustryPack jargon). The call * is done by the carrier driver. The carrier should populate the fields * bus and slot as well as the region array of @dev prior to calling this * function. The rest of the fields will be allocated and populated * during initalization. * * Return zero on success or error code on failure. * * NOTE: _Never_ directly free @dev after calling this function, even * if it returned an error! Always use ipack_put_device() to give up the * reference initialized in this function instead. */ int ipack_device_init(struct ipack_device *dev); /** * ipack_device_add -- Add an IPack device * @dev: the new device to add. * * Add a new IPack device. The call is done by the carrier driver * after calling ipack_device_init(). * * Return zero on success or error code on failure. * * NOTE: _Never_ directly free @dev after calling this function, even * if it returned an error! Always use ipack_put_device() to give up the * reference initialized in this function instead. */ int ipack_device_add(struct ipack_device *dev); void ipack_device_del(struct ipack_device *dev); void ipack_get_device(struct ipack_device *dev); void ipack_put_device(struct ipack_device *dev); /** * DEFINE_IPACK_DEVICE_TABLE - macro used to describe a IndustryPack table * @_table: device table name * * This macro is used to create a struct ipack_device_id array (a device table) * in a generic manner. */ #define DEFINE_IPACK_DEVICE_TABLE(_table) \ const struct ipack_device_id _table[] /** * IPACK_DEVICE - macro used to describe a specific IndustryPack device * @_format: the format version (currently either 1 or 2, 8 bit value) * @vend: the 8 or 24 bit IndustryPack Vendor ID * @dev: the 8 or 16 bit IndustryPack Device ID * * This macro is used to create a struct ipack_device_id that matches a specific * device. */ #define IPACK_DEVICE(_format, vend, dev) \ .format = (_format), \ .vendor = (vend), \ .device = (dev) /** * ipack_get_carrier - it increase the carrier ref. counter of * the carrier module * @dev: mezzanine device which wants to get the carrier */ static inline int ipack_get_carrier(struct ipack_device *dev) { return try_module_get(dev->bus->owner); } /** * ipack_get_carrier - it decrease the carrier ref. counter of * the carrier module * @dev: mezzanine device which wants to get the carrier */ static inline void ipack_put_carrier(struct ipack_device *dev) { module_put(dev->bus->owner); } PK ! i�(� � dirent.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DIRENT_H #define _LINUX_DIRENT_H struct linux_dirent64 { u64 d_ino; s64 d_off; unsigned short d_reclen; unsigned char d_type; char d_name[]; }; #endif PK ! ���� � timb_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * timb_dma.h timberdale FPGA DMA driver defines * Copyright (c) 2010 Intel Corporation */ /* Supports: * Timberdale FPGA DMA engine */ #ifndef _LINUX_TIMB_DMA_H #define _LINUX_TIMB_DMA_H /** * struct timb_dma_platform_data_channel - Description of each individual * DMA channel for the timberdale DMA driver * @rx: true if this channel handles data in the direction to * the CPU. * @bytes_per_line: Number of bytes per line, this is specific for channels * handling video data. For other channels this shall be left to 0. * @descriptors: Number of descriptors to allocate for this channel. * @descriptor_elements: Number of elements in each descriptor. * */ struct timb_dma_platform_data_channel { bool rx; unsigned int bytes_per_line; unsigned int descriptors; unsigned int descriptor_elements; }; /** * struct timb_dma_platform_data - Platform data of the timberdale DMA driver * @nr_channels: Number of defined channels in the channels array. * @channels: Definition of the each channel. * */ struct timb_dma_platform_data { unsigned nr_channels; struct timb_dma_platform_data_channel channels[32]; }; #endif PK ! "�$� � memfd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MEMFD_H #define __LINUX_MEMFD_H #include <linux/file.h> #ifdef CONFIG_MEMFD_CREATE extern long memfd_fcntl(struct file *file, unsigned int cmd, unsigned long arg); unsigned int *memfd_file_seals_ptr(struct file *file); #else static inline long memfd_fcntl(struct file *f, unsigned int c, unsigned long a) { return -EINVAL; } static inline unsigned int *memfd_file_seals_ptr(struct file *file) { return NULL; } #endif /* Retrieve memfd seals associated with the file, if any. */ static inline unsigned int memfd_file_seals(struct file *file) { unsigned int *sealsp = memfd_file_seals_ptr(file); return sealsp ? *sealsp : 0; } #endif /* __LINUX_MEMFD_H */ PK ! !�U; ; pci-epf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * PCI Endpoint *Function* (EPF) header file * * Copyright (C) 2017 Texas Instruments * Author: Kishon Vijay Abraham I <kishon@ti.com> */ #ifndef __LINUX_PCI_EPF_H #define __LINUX_PCI_EPF_H #include <linux/configfs.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/pci.h> struct pci_epf; enum pci_epc_interface_type; enum pci_notify_event { CORE_INIT, LINK_UP, }; enum pci_barno { NO_BAR = -1, BAR_0, BAR_1, BAR_2, BAR_3, BAR_4, BAR_5, }; /** * struct pci_epf_header - represents standard configuration header * @vendorid: identifies device manufacturer * @deviceid: identifies a particular device * @revid: specifies a device-specific revision identifier * @progif_code: identifies a specific register-level programming interface * @subclass_code: identifies more specifically the function of the device * @baseclass_code: broadly classifies the type of function the device performs * @cache_line_size: specifies the system cacheline size in units of DWORDs * @subsys_vendor_id: vendor of the add-in card or subsystem * @subsys_id: id specific to vendor * @interrupt_pin: interrupt pin the device (or device function) uses */ struct pci_epf_header { u16 vendorid; u16 deviceid; u8 revid; u8 progif_code; u8 subclass_code; u8 baseclass_code; u8 cache_line_size; u16 subsys_vendor_id; u16 subsys_id; enum pci_interrupt_pin interrupt_pin; }; /** * struct pci_epf_ops - set of function pointers for performing EPF operations * @bind: ops to perform when a EPC device has been bound to EPF device * @unbind: ops to perform when a binding has been lost between a EPC device * and EPF device * @add_cfs: ops to initialize function specific configfs attributes */ struct pci_epf_ops { int (*bind)(struct pci_epf *epf); void (*unbind)(struct pci_epf *epf); struct config_group *(*add_cfs)(struct pci_epf *epf, struct config_group *group); }; /** * struct pci_epf_driver - represents the PCI EPF driver * @probe: ops to perform when a new EPF device has been bound to the EPF driver * @remove: ops to perform when the binding between the EPF device and EPF * driver is broken * @driver: PCI EPF driver * @ops: set of function pointers for performing EPF operations * @owner: the owner of the module that registers the PCI EPF driver * @epf_group: list of configfs group corresponding to the PCI EPF driver * @id_table: identifies EPF devices for probing */ struct pci_epf_driver { int (*probe)(struct pci_epf *epf); void (*remove)(struct pci_epf *epf); struct device_driver driver; struct pci_epf_ops *ops; struct module *owner; struct list_head epf_group; const struct pci_epf_device_id *id_table; }; #define to_pci_epf_driver(drv) (container_of((drv), struct pci_epf_driver, \ driver)) /** * struct pci_epf_bar - represents the BAR of EPF device * @phys_addr: physical address that should be mapped to the BAR * @addr: virtual address corresponding to the @phys_addr * @size: the size of the address space present in BAR * @barno: BAR number * @flags: flags that are set for the BAR */ struct pci_epf_bar { dma_addr_t phys_addr; void *addr; size_t size; enum pci_barno barno; int flags; }; /** * struct pci_epf - represents the PCI EPF device * @dev: the PCI EPF device * @name: the name of the PCI EPF device * @header: represents standard configuration header * @bar: represents the BAR of EPF device * @msi_interrupts: number of MSI interrupts required by this function * @msix_interrupts: number of MSI-X interrupts required by this function * @func_no: unique (physical) function number within this endpoint device * @vfunc_no: unique virtual function number within a physical function * @epc: the EPC device to which this EPF device is bound * @epf_pf: the physical EPF device to which this virtual EPF device is bound * @driver: the EPF driver to which this EPF device is bound * @list: to add pci_epf as a list of PCI endpoint functions to pci_epc * @nb: notifier block to notify EPF of any EPC events (like linkup) * @lock: mutex to protect pci_epf_ops * @sec_epc: the secondary EPC device to which this EPF device is bound * @sec_epc_list: to add pci_epf as list of PCI endpoint functions to secondary * EPC device * @sec_epc_bar: represents the BAR of EPF device associated with secondary EPC * @sec_epc_func_no: unique (physical) function number within the secondary EPC * @group: configfs group associated with the EPF device * @is_bound: indicates if bind notification to function driver has been invoked * @is_vf: true - virtual function, false - physical function * @vfunction_num_map: bitmap to manage virtual function number * @pci_vepf: list of virtual endpoint functions associated with this function */ struct pci_epf { struct device dev; const char *name; struct pci_epf_header *header; struct pci_epf_bar bar[6]; u8 msi_interrupts; u16 msix_interrupts; u8 func_no; u8 vfunc_no; struct pci_epc *epc; struct pci_epf *epf_pf; struct pci_epf_driver *driver; struct list_head list; struct notifier_block nb; /* mutex to protect against concurrent access of pci_epf_ops */ struct mutex lock; /* Below members are to attach secondary EPC to an endpoint function */ struct pci_epc *sec_epc; struct list_head sec_epc_list; struct pci_epf_bar sec_epc_bar[6]; u8 sec_epc_func_no; struct config_group *group; unsigned int is_bound; unsigned int is_vf; unsigned long vfunction_num_map; struct list_head pci_vepf; }; /** * struct pci_epf_msix_tbl - represents the MSIX table entry structure * @msg_addr: Writes to this address will trigger MSIX interrupt in host * @msg_data: Data that should be written to @msg_addr to trigger MSIX interrupt * @vector_ctrl: Identifies if the function is prohibited from sending a message * using this MSIX table entry */ struct pci_epf_msix_tbl { u64 msg_addr; u32 msg_data; u32 vector_ctrl; }; #define to_pci_epf(epf_dev) container_of((epf_dev), struct pci_epf, dev) #define pci_epf_register_driver(driver) \ __pci_epf_register_driver((driver), THIS_MODULE) static inline void epf_set_drvdata(struct pci_epf *epf, void *data) { dev_set_drvdata(&epf->dev, data); } static inline void *epf_get_drvdata(struct pci_epf *epf) { return dev_get_drvdata(&epf->dev); } struct pci_epf *pci_epf_create(const char *name); void pci_epf_destroy(struct pci_epf *epf); int __pci_epf_register_driver(struct pci_epf_driver *driver, struct module *owner); void pci_epf_unregister_driver(struct pci_epf_driver *driver); void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar, size_t align, enum pci_epc_interface_type type); void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar, enum pci_epc_interface_type type); int pci_epf_bind(struct pci_epf *epf); void pci_epf_unbind(struct pci_epf *epf); struct config_group *pci_epf_type_add_cfs(struct pci_epf *epf, struct config_group *group); int pci_epf_add_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf); void pci_epf_remove_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf); #endif /* __LINUX_PCI_EPF_H */ PK ! =�]�/ / assoc_array_priv.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Private definitions for the generic associative array implementation. * * See Documentation/core-api/assoc_array.rst for information. * * Copyright (C) 2013 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_ASSOC_ARRAY_PRIV_H #define _LINUX_ASSOC_ARRAY_PRIV_H #ifdef CONFIG_ASSOCIATIVE_ARRAY #include <linux/assoc_array.h> #define ASSOC_ARRAY_FAN_OUT 16 /* Number of slots per node */ #define ASSOC_ARRAY_FAN_MASK (ASSOC_ARRAY_FAN_OUT - 1) #define ASSOC_ARRAY_LEVEL_STEP (ilog2(ASSOC_ARRAY_FAN_OUT)) #define ASSOC_ARRAY_LEVEL_STEP_MASK (ASSOC_ARRAY_LEVEL_STEP - 1) #define ASSOC_ARRAY_KEY_CHUNK_MASK (ASSOC_ARRAY_KEY_CHUNK_SIZE - 1) #define ASSOC_ARRAY_KEY_CHUNK_SHIFT (ilog2(BITS_PER_LONG)) /* * Undefined type representing a pointer with type information in the bottom * two bits. */ struct assoc_array_ptr; /* * An N-way node in the tree. * * Each slot contains one of four things: * * (1) Nothing (NULL). * * (2) A leaf object (pointer types 0). * * (3) A next-level node (pointer type 1, subtype 0). * * (4) A shortcut (pointer type 1, subtype 1). * * The tree is optimised for search-by-ID, but permits reasonable iteration * also. * * The tree is navigated by constructing an index key consisting of an array of * segments, where each segment is ilog2(ASSOC_ARRAY_FAN_OUT) bits in size. * * The segments correspond to levels of the tree (the first segment is used at * level 0, the second at level 1, etc.). */ struct assoc_array_node { struct assoc_array_ptr *back_pointer; u8 parent_slot; struct assoc_array_ptr *slots[ASSOC_ARRAY_FAN_OUT]; unsigned long nr_leaves_on_branch; }; /* * A shortcut through the index space out to where a collection of nodes/leaves * with the same IDs live. */ struct assoc_array_shortcut { struct assoc_array_ptr *back_pointer; int parent_slot; int skip_to_level; struct assoc_array_ptr *next_node; unsigned long index_key[]; }; /* * Preallocation cache. */ struct assoc_array_edit { struct rcu_head rcu; struct assoc_array *array; const struct assoc_array_ops *ops; const struct assoc_array_ops *ops_for_excised_subtree; struct assoc_array_ptr *leaf; struct assoc_array_ptr **leaf_p; struct assoc_array_ptr *dead_leaf; struct assoc_array_ptr *new_meta[3]; struct assoc_array_ptr *excised_meta[1]; struct assoc_array_ptr *excised_subtree; struct assoc_array_ptr **set_backpointers[ASSOC_ARRAY_FAN_OUT]; struct assoc_array_ptr *set_backpointers_to; struct assoc_array_node *adjust_count_on; long adjust_count_by; struct { struct assoc_array_ptr **ptr; struct assoc_array_ptr *to; } set[2]; struct { u8 *p; u8 to; } set_parent_slot[1]; u8 segment_cache[ASSOC_ARRAY_FAN_OUT + 1]; }; /* * Internal tree member pointers are marked in the bottom one or two bits to * indicate what type they are so that we don't have to look behind every * pointer to see what it points to. * * We provide functions to test type annotations and to create and translate * the annotated pointers. */ #define ASSOC_ARRAY_PTR_TYPE_MASK 0x1UL #define ASSOC_ARRAY_PTR_LEAF_TYPE 0x0UL /* Points to leaf (or nowhere) */ #define ASSOC_ARRAY_PTR_META_TYPE 0x1UL /* Points to node or shortcut */ #define ASSOC_ARRAY_PTR_SUBTYPE_MASK 0x2UL #define ASSOC_ARRAY_PTR_NODE_SUBTYPE 0x0UL #define ASSOC_ARRAY_PTR_SHORTCUT_SUBTYPE 0x2UL static inline bool assoc_array_ptr_is_meta(const struct assoc_array_ptr *x) { return (unsigned long)x & ASSOC_ARRAY_PTR_TYPE_MASK; } static inline bool assoc_array_ptr_is_leaf(const struct assoc_array_ptr *x) { return !assoc_array_ptr_is_meta(x); } static inline bool assoc_array_ptr_is_shortcut(const struct assoc_array_ptr *x) { return (unsigned long)x & ASSOC_ARRAY_PTR_SUBTYPE_MASK; } static inline bool assoc_array_ptr_is_node(const struct assoc_array_ptr *x) { return !assoc_array_ptr_is_shortcut(x); } static inline void *assoc_array_ptr_to_leaf(const struct assoc_array_ptr *x) { return (void *)((unsigned long)x & ~ASSOC_ARRAY_PTR_TYPE_MASK); } static inline unsigned long __assoc_array_ptr_to_meta(const struct assoc_array_ptr *x) { return (unsigned long)x & ~(ASSOC_ARRAY_PTR_SUBTYPE_MASK | ASSOC_ARRAY_PTR_TYPE_MASK); } static inline struct assoc_array_node *assoc_array_ptr_to_node(const struct assoc_array_ptr *x) { return (struct assoc_array_node *)__assoc_array_ptr_to_meta(x); } static inline struct assoc_array_shortcut *assoc_array_ptr_to_shortcut(const struct assoc_array_ptr *x) { return (struct assoc_array_shortcut *)__assoc_array_ptr_to_meta(x); } static inline struct assoc_array_ptr *__assoc_array_x_to_ptr(const void *p, unsigned long t) { return (struct assoc_array_ptr *)((unsigned long)p | t); } static inline struct assoc_array_ptr *assoc_array_leaf_to_ptr(const void *p) { return __assoc_array_x_to_ptr(p, ASSOC_ARRAY_PTR_LEAF_TYPE); } static inline struct assoc_array_ptr *assoc_array_node_to_ptr(const struct assoc_array_node *p) { return __assoc_array_x_to_ptr( p, ASSOC_ARRAY_PTR_META_TYPE | ASSOC_ARRAY_PTR_NODE_SUBTYPE); } static inline struct assoc_array_ptr *assoc_array_shortcut_to_ptr(const struct assoc_array_shortcut *p) { return __assoc_array_x_to_ptr( p, ASSOC_ARRAY_PTR_META_TYPE | ASSOC_ARRAY_PTR_SHORTCUT_SUBTYPE); } #endif /* CONFIG_ASSOCIATIVE_ARRAY */ #endif /* _LINUX_ASSOC_ARRAY_PRIV_H */ PK ! ��T�, , swapfile.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SWAPFILE_H #define _LINUX_SWAPFILE_H /* * these were static in swapfile.c but frontswap.c needs them and we don't * want to expose them to the dozens of source files that include swap.h */ extern spinlock_t swap_lock; extern struct plist_head swap_active_head; extern struct swap_info_struct *swap_info[]; extern int try_to_unuse(unsigned int, bool, unsigned long); extern unsigned long generic_max_swapfile_size(void); extern unsigned long max_swapfile_size(void); #endif /* _LINUX_SWAPFILE_H */ PK ! 2���M �M phylink.hnu �[��� #ifndef NETDEV_PCS_H #define NETDEV_PCS_H #include <linux/phy.h> #include <linux/spinlock.h> #include <linux/workqueue.h> struct device_node; struct ethtool_cmd; struct fwnode_handle; struct net_device; enum { MLO_PAUSE_NONE, MLO_PAUSE_RX = BIT(0), MLO_PAUSE_TX = BIT(1), MLO_PAUSE_TXRX_MASK = MLO_PAUSE_TX | MLO_PAUSE_RX, MLO_PAUSE_AN = BIT(2), MLO_AN_PHY = 0, /* Conventional PHY */ MLO_AN_FIXED, /* Fixed-link mode */ MLO_AN_INBAND, /* In-band protocol */ }; static inline bool phylink_autoneg_inband(unsigned int mode) { return mode == MLO_AN_INBAND; } /** * struct phylink_link_state - link state structure * @advertising: ethtool bitmask containing advertised link modes * @lp_advertising: ethtool bitmask containing link partner advertised link * modes * @interface: link &typedef phy_interface_t mode * @speed: link speed, one of the SPEED_* constants. * @duplex: link duplex mode, one of DUPLEX_* constants. * @pause: link pause state, described by MLO_PAUSE_* constants. * @link: true if the link is up. * @an_enabled: true if autonegotiation is enabled/desired. * @an_complete: true if autonegotiation has completed. */ struct phylink_link_state { __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); phy_interface_t interface; int speed; int duplex; int pause; unsigned int link:1; unsigned int an_enabled:1; unsigned int an_complete:1; }; enum phylink_op_type { PHYLINK_NETDEV = 0, PHYLINK_DEV, }; /** * struct phylink_config - PHYLINK configuration structure * @dev: a pointer to a struct device associated with the MAC * @type: operation type of PHYLINK instance * @pcs_poll: MAC PCS cannot provide link change interrupt * @poll_fixed_state: if true, starts link_poll, * if MAC link is at %MLO_AN_FIXED mode. * @mac_managed_pm: if true, indicate the MAC driver is responsible for PHY PM. * @ovr_an_inband: if true, override PCS to MLO_AN_INBAND * @get_fixed_state: callback to execute to determine the fixed link state, * if MAC link is at %MLO_AN_FIXED mode. */ struct phylink_config { struct device *dev; enum phylink_op_type type; bool pcs_poll; bool poll_fixed_state; bool mac_managed_pm; bool ovr_an_inband; void (*get_fixed_state)(struct phylink_config *config, struct phylink_link_state *state); }; /** * struct phylink_mac_ops - MAC operations structure. * @validate: Validate and update the link configuration. * @mac_pcs_get_state: Read the current link state from the hardware. * @mac_prepare: prepare for a major reconfiguration of the interface. * @mac_config: configure the MAC for the selected mode and state. * @mac_finish: finish a major reconfiguration of the interface. * @mac_an_restart: restart 802.3z BaseX autonegotiation. * @mac_link_down: take the link down. * @mac_link_up: allow the link to come up. * * The individual methods are described more fully below. */ struct phylink_mac_ops { void (*validate)(struct phylink_config *config, unsigned long *supported, struct phylink_link_state *state); void (*mac_pcs_get_state)(struct phylink_config *config, struct phylink_link_state *state); int (*mac_prepare)(struct phylink_config *config, unsigned int mode, phy_interface_t iface); void (*mac_config)(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state); int (*mac_finish)(struct phylink_config *config, unsigned int mode, phy_interface_t iface); void (*mac_an_restart)(struct phylink_config *config); void (*mac_link_down)(struct phylink_config *config, unsigned int mode, phy_interface_t interface); void (*mac_link_up)(struct phylink_config *config, struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); }; #if 0 /* For kernel-doc purposes only. */ /** * validate - Validate and update the link configuration * @config: a pointer to a &struct phylink_config. * @supported: ethtool bitmask for supported link modes. * @state: a pointer to a &struct phylink_link_state. * * Clear bits in the @supported and @state->advertising masks that * are not supportable by the MAC. * * Note that the PHY may be able to transform from one connection * technology to another, so, eg, don't clear 1000BaseX just * because the MAC is unable to BaseX mode. This is more about * clearing unsupported speeds and duplex settings. The port modes * should not be cleared; phylink_set_port_modes() will help with this. * * If the @state->interface mode is %PHY_INTERFACE_MODE_1000BASEX * or %PHY_INTERFACE_MODE_2500BASEX, select the appropriate mode * based on @state->advertising and/or @state->speed and update * @state->interface accordingly. See phylink_helper_basex_speed(). * * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink expects the * MAC driver to return all supported link modes. * * If the @state->interface mode is not supported, then the @supported * mask must be cleared. */ void validate(struct phylink_config *config, unsigned long *supported, struct phylink_link_state *state); /** * mac_pcs_get_state() - Read the current inband link state from the hardware * @config: a pointer to a &struct phylink_config. * @state: a pointer to a &struct phylink_link_state. * * Read the current inband link state from the MAC PCS, reporting the * current speed in @state->speed, duplex mode in @state->duplex, pause * mode in @state->pause using the %MLO_PAUSE_RX and %MLO_PAUSE_TX bits, * negotiation completion state in @state->an_complete, and link up state * in @state->link. If possible, @state->lp_advertising should also be * populated. */ void mac_pcs_get_state(struct phylink_config *config, struct phylink_link_state *state); /** * mac_prepare() - prepare to change the PHY interface mode * @config: a pointer to a &struct phylink_config. * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. * @iface: interface mode to switch to * * phylink will call this method at the beginning of a full initialisation * of the link, which includes changing the interface mode or at initial * startup time. It may be called for the current mode. The MAC driver * should perform whatever actions are required, e.g. disabling the * Serdes PHY. * * This will be the first call in the sequence: * - mac_prepare() * - mac_config() * - pcs_config() * - possible pcs_an_restart() * - mac_finish() * * Returns zero on success, or negative errno on failure which will be * reported to the kernel log. */ int mac_prepare(struct phylink_config *config, unsigned int mode, phy_interface_t iface); /** * mac_config() - configure the MAC for the selected mode and state * @config: a pointer to a &struct phylink_config. * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. * @state: a pointer to a &struct phylink_link_state. * * Note - not all members of @state are valid. In particular, * @state->lp_advertising, @state->link, @state->an_complete are never * guaranteed to be correct, and so any mac_config() implementation must * never reference these fields. * * (this requires a rewrite - please refer to mac_link_up() for situations * where the PCS and MAC are not tightly integrated.) * * In all negotiation modes, as defined by @mode, @state->pause indicates the * pause settings which should be applied as follows. If %MLO_PAUSE_AN is not * set, %MLO_PAUSE_TX and %MLO_PAUSE_RX indicate whether the MAC should send * pause frames and/or act on received pause frames respectively. Otherwise, * the results of in-band negotiation/status from the MAC PCS should be used * to control the MAC pause mode settings. * * The action performed depends on the currently selected mode: * * %MLO_AN_FIXED, %MLO_AN_PHY: * Configure for non-inband negotiation mode, where the link settings * are completely communicated via mac_link_up(). The physical link * protocol from the MAC is specified by @state->interface. * * @state->advertising may be used, but is not required. * * Older drivers (prior to the mac_link_up() change) may use @state->speed, * @state->duplex and @state->pause to configure the MAC, but this is * deprecated; such drivers should be converted to use mac_link_up(). * * Other members of @state must be ignored. * * Valid state members: interface, advertising. * Deprecated state members: speed, duplex, pause. * * %MLO_AN_INBAND: * place the link in an inband negotiation mode (such as 802.3z * 1000base-X or Cisco SGMII mode depending on the @state->interface * mode). In both cases, link state management (whether the link * is up or not) is performed by the MAC, and reported via the * mac_pcs_get_state() callback. Changes in link state must be made * by calling phylink_mac_change(). * * Interface mode specific details are mentioned below. * * If in 802.3z mode, the link speed is fixed, dependent on the * @state->interface. Duplex and pause modes are negotiated via * the in-band configuration word. Advertised pause modes are set * according to the @state->an_enabled and @state->advertising * flags. Beware of MACs which only support full duplex at gigabit * and higher speeds. * * If in Cisco SGMII mode, the link speed and duplex mode are passed * in the serial bitstream 16-bit configuration word, and the MAC * should be configured to read these bits and acknowledge the * configuration word. Nothing is advertised by the MAC. The MAC is * responsible for reading the configuration word and configuring * itself accordingly. * * Valid state members: interface, an_enabled, pause, advertising. * * Implementations are expected to update the MAC to reflect the * requested settings - i.o.w., if nothing has changed between two * calls, no action is expected. If only flow control settings have * changed, flow control should be updated *without* taking the link * down. This "update" behaviour is critical to avoid bouncing the * link up status. */ void mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state); /** * mac_finish() - finish a to change the PHY interface mode * @config: a pointer to a &struct phylink_config. * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. * @iface: interface mode to switch to * * phylink will call this if it called mac_prepare() to allow the MAC to * complete any necessary steps after the MAC and PCS have been configured * for the @mode and @iface. E.g. a MAC driver may wish to re-enable the * Serdes PHY here if it was previously disabled by mac_prepare(). * * Returns zero on success, or negative errno on failure which will be * reported to the kernel log. */ int mac_finish(struct phylink_config *config, unsigned int mode, phy_interface_t iface); /** * mac_an_restart() - restart 802.3z BaseX autonegotiation * @config: a pointer to a &struct phylink_config. */ void mac_an_restart(struct phylink_config *config); /** * mac_link_down() - take the link down * @config: a pointer to a &struct phylink_config. * @mode: link autonegotiation mode * @interface: link &typedef phy_interface_t mode * * If @mode is not an in-band negotiation mode (as defined by * phylink_autoneg_inband()), force the link down and disable any * Energy Efficient Ethernet MAC configuration. Interface type * selection must be done in mac_config(). */ void mac_link_down(struct phylink_config *config, unsigned int mode, phy_interface_t interface); /** * mac_link_up() - allow the link to come up * @config: a pointer to a &struct phylink_config. * @phy: any attached phy * @mode: link autonegotiation mode * @interface: link &typedef phy_interface_t mode * @speed: link speed * @duplex: link duplex * @tx_pause: link transmit pause enablement status * @rx_pause: link receive pause enablement status * * Configure the MAC for an established link. * * @speed, @duplex, @tx_pause and @rx_pause indicate the finalised link * settings, and should be used to configure the MAC block appropriately * where these settings are not automatically conveyed from the PCS block, * or if in-band negotiation (as defined by phylink_autoneg_inband(@mode)) * is disabled. * * Note that when 802.3z in-band negotiation is in use, it is possible * that the user wishes to override the pause settings, and this should * be allowed when considering the implementation of this method. * * If in-band negotiation mode is disabled, allow the link to come up. If * @phy is non-%NULL, configure Energy Efficient Ethernet by calling * phy_init_eee() and perform appropriate MAC configuration for EEE. * Interface type selection must be done in mac_config(). */ void mac_link_up(struct phylink_config *config, struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); #endif struct phylink_pcs_ops; /** * struct phylink_pcs - PHYLINK PCS instance * @ops: a pointer to the &struct phylink_pcs_ops structure * @poll: poll the PCS for link changes * * This structure is designed to be embedded within the PCS private data, * and will be passed between phylink and the PCS. */ struct phylink_pcs { const struct phylink_pcs_ops *ops; bool poll; }; /** * struct phylink_pcs_ops - MAC PCS operations structure. * @pcs_get_state: read the current MAC PCS link state from the hardware. * @pcs_config: configure the MAC PCS for the selected mode and state. * @pcs_an_restart: restart 802.3z BaseX autonegotiation. * @pcs_link_up: program the PCS for the resolved link configuration * (where necessary). */ struct phylink_pcs_ops { void (*pcs_get_state)(struct phylink_pcs *pcs, struct phylink_link_state *state); int (*pcs_config)(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, const unsigned long *advertising, bool permit_pause_to_mac); void (*pcs_an_restart)(struct phylink_pcs *pcs); void (*pcs_link_up)(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, int speed, int duplex); }; #if 0 /* For kernel-doc purposes only. */ /** * pcs_get_state() - Read the current inband link state from the hardware * @pcs: a pointer to a &struct phylink_pcs. * @state: a pointer to a &struct phylink_link_state. * * Read the current inband link state from the MAC PCS, reporting the * current speed in @state->speed, duplex mode in @state->duplex, pause * mode in @state->pause using the %MLO_PAUSE_RX and %MLO_PAUSE_TX bits, * negotiation completion state in @state->an_complete, and link up state * in @state->link. If possible, @state->lp_advertising should also be * populated. * * When present, this overrides mac_pcs_get_state() in &struct * phylink_mac_ops. */ void pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state); /** * pcs_config() - Configure the PCS mode and advertisement * @pcs: a pointer to a &struct phylink_pcs. * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. * @interface: interface mode to be used * @advertising: adertisement ethtool link mode mask * @permit_pause_to_mac: permit forwarding pause resolution to MAC * * Configure the PCS for the operating mode, the interface mode, and set * the advertisement mask. @permit_pause_to_mac indicates whether the * hardware may forward the pause mode resolution to the MAC. * * When operating in %MLO_AN_INBAND, inband should always be enabled, * otherwise inband should be disabled. * * For SGMII, there is no advertisement from the MAC side, the PCS should * be programmed to acknowledge the inband word from the PHY. * * For 1000BASE-X, the advertisement should be programmed into the PCS. * * For most 10GBASE-R, there is no advertisement. */ int pcs_config(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, const unsigned long *advertising, bool permit_pause_to_mac); /** * pcs_an_restart() - restart 802.3z BaseX autonegotiation * @pcs: a pointer to a &struct phylink_pcs. * * When PCS ops are present, this overrides mac_an_restart() in &struct * phylink_mac_ops. */ void pcs_an_restart(struct phylink_pcs *pcs); /** * pcs_link_up() - program the PCS for the resolved link configuration * @pcs: a pointer to a &struct phylink_pcs. * @mode: link autonegotiation mode * @interface: link &typedef phy_interface_t mode * @speed: link speed * @duplex: link duplex * * This call will be made just before mac_link_up() to inform the PCS of * the resolved link parameters. For example, a PCS operating in SGMII * mode without in-band AN needs to be manually configured for the link * and duplex setting. Otherwise, this should be a no-op. */ void pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, int speed, int duplex); #endif struct phylink *phylink_create(struct phylink_config *, struct fwnode_handle *, phy_interface_t iface, const struct phylink_mac_ops *mac_ops); void phylink_set_pcs(struct phylink *, struct phylink_pcs *pcs); void phylink_destroy(struct phylink *); int phylink_connect_phy(struct phylink *, struct phy_device *); int phylink_of_phy_connect(struct phylink *, struct device_node *, u32 flags); int phylink_fwnode_phy_connect(struct phylink *pl, struct fwnode_handle *fwnode, u32 flags); void phylink_disconnect_phy(struct phylink *); void phylink_mac_change(struct phylink *, bool up); void phylink_start(struct phylink *); void phylink_stop(struct phylink *); void phylink_suspend(struct phylink *pl, bool mac_wol); void phylink_resume(struct phylink *pl); void phylink_ethtool_get_wol(struct phylink *, struct ethtool_wolinfo *); int phylink_ethtool_set_wol(struct phylink *, struct ethtool_wolinfo *); int phylink_ethtool_ksettings_get(struct phylink *, struct ethtool_link_ksettings *); int phylink_ethtool_ksettings_set(struct phylink *, const struct ethtool_link_ksettings *); int phylink_ethtool_nway_reset(struct phylink *); void phylink_ethtool_get_pauseparam(struct phylink *, struct ethtool_pauseparam *); int phylink_ethtool_set_pauseparam(struct phylink *, struct ethtool_pauseparam *); int phylink_get_eee_err(struct phylink *); int phylink_init_eee(struct phylink *, bool); int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *); int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); int phylink_speed_down(struct phylink *pl, bool sync); int phylink_speed_up(struct phylink *pl); #define phylink_zero(bm) \ bitmap_zero(bm, __ETHTOOL_LINK_MODE_MASK_NBITS) #define __phylink_do_bit(op, bm, mode) \ op(ETHTOOL_LINK_MODE_ ## mode ## _BIT, bm) #define phylink_set(bm, mode) __phylink_do_bit(__set_bit, bm, mode) #define phylink_clear(bm, mode) __phylink_do_bit(__clear_bit, bm, mode) #define phylink_test(bm, mode) __phylink_do_bit(test_bit, bm, mode) void phylink_set_port_modes(unsigned long *bits); void phylink_helper_basex_speed(struct phylink_link_state *state); void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, struct phylink_link_state *state); int phylink_mii_c22_pcs_set_advertisement(struct mdio_device *pcs, phy_interface_t interface, const unsigned long *advertising); int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, phy_interface_t interface, const unsigned long *advertising); void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs); void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, struct phylink_link_state *state); void phylink_decode_usxgmii_word(struct phylink_link_state *state, uint16_t lpa); #endif PK ! �]=�L L logic_iomem.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2021 Intel Corporation * Author: johannes@sipsolutions.net */ #ifndef __LOGIC_IOMEM_H #define __LOGIC_IOMEM_H #include <linux/types.h> #include <linux/ioport.h> /** * struct logic_iomem_ops - emulated IO memory ops * @read: read an 8, 16, 32 or 64 bit quantity from the given offset, * size is given in bytes (1, 2, 4 or 8) * (64-bit only necessary if CONFIG_64BIT is set) * @write: write an 8, 16 32 or 64 bit quantity to the given offset, * size is given in bytes (1, 2, 4 or 8) * (64-bit only necessary if CONFIG_64BIT is set) * @set: optional, for memset_io() * @copy_from: optional, for memcpy_fromio() * @copy_to: optional, for memcpy_toio() * @unmap: optional, this region is getting unmapped */ struct logic_iomem_ops { unsigned long (*read)(void *priv, unsigned int offset, int size); void (*write)(void *priv, unsigned int offset, int size, unsigned long val); void (*set)(void *priv, unsigned int offset, u8 value, int size); void (*copy_from)(void *priv, void *buffer, unsigned int offset, int size); void (*copy_to)(void *priv, unsigned int offset, const void *buffer, int size); void (*unmap)(void *priv); }; /** * struct logic_iomem_region_ops - ops for an IO memory handler * @map: map a range in the registered IO memory region, must * fill *ops with the ops and may fill *priv to be passed * to the ops. The offset is given as the offset into the * registered resource region. * The return value is negative for errors, or >= 0 for * success. On success, the return value is added to the * offset for later ops, to allow for partial mappings. */ struct logic_iomem_region_ops { long (*map)(unsigned long offset, size_t size, const struct logic_iomem_ops **ops, void **priv); }; /** * logic_iomem_add_region - register an IO memory region * @resource: the resource description for this region * @ops: the IO memory mapping ops for this resource */ int logic_iomem_add_region(struct resource *resource, const struct logic_iomem_region_ops *ops); #endif /* __LOGIC_IOMEM_H */ PK ! ˯��� � kobject.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * kobject.h - generic kernel object infrastructure. * * Copyright (c) 2002-2003 Patrick Mochel * Copyright (c) 2002-2003 Open Source Development Labs * Copyright (c) 2006-2008 Greg Kroah-Hartman <greg@kroah.com> * Copyright (c) 2006-2008 Novell Inc. * * Please read Documentation/core-api/kobject.rst before using the kobject * interface, ESPECIALLY the parts about reference counts and object * destructors. */ #ifndef _KOBJECT_H_ #define _KOBJECT_H_ #include <linux/types.h> #include <linux/list.h> #include <linux/sysfs.h> #include <linux/compiler.h> #include <linux/spinlock.h> #include <linux/kref.h> #include <linux/kobject_ns.h> #include <linux/kernel.h> #include <linux/wait.h> #include <linux/atomic.h> #include <linux/workqueue.h> #include <linux/uidgid.h> #define UEVENT_HELPER_PATH_LEN 256 #define UEVENT_NUM_ENVP 64 /* number of env pointers */ #define UEVENT_BUFFER_SIZE 2048 /* buffer for the variables */ #ifdef CONFIG_UEVENT_HELPER /* path to the userspace helper executed on an event */ extern char uevent_helper[]; #endif /* counter to tag the uevent, read only except for the kobject core */ extern u64 uevent_seqnum; /* * The actions here must match the index to the string array * in lib/kobject_uevent.c * * Do not add new actions here without checking with the driver-core * maintainers. Action strings are not meant to express subsystem * or device specific properties. In most cases you want to send a * kobject_uevent_env(kobj, KOBJ_CHANGE, env) with additional event * specific variables added to the event environment. */ enum kobject_action { KOBJ_ADD, KOBJ_REMOVE, KOBJ_CHANGE, KOBJ_MOVE, KOBJ_ONLINE, KOBJ_OFFLINE, KOBJ_BIND, KOBJ_UNBIND, }; struct kobject { const char *name; struct list_head entry; struct kobject *parent; struct kset *kset; struct kobj_type *ktype; struct kernfs_node *sd; /* sysfs directory entry */ struct kref kref; #ifdef CONFIG_DEBUG_KOBJECT_RELEASE struct delayed_work release; #endif unsigned int state_initialized:1; unsigned int state_in_sysfs:1; unsigned int state_add_uevent_sent:1; unsigned int state_remove_uevent_sent:1; unsigned int uevent_suppress:1; }; extern __printf(2, 3) int kobject_set_name(struct kobject *kobj, const char *name, ...); extern __printf(2, 0) int kobject_set_name_vargs(struct kobject *kobj, const char *fmt, va_list vargs); static inline const char *kobject_name(const struct kobject *kobj) { return kobj->name; } extern void kobject_init(struct kobject *kobj, struct kobj_type *ktype); extern __printf(3, 4) __must_check int kobject_add(struct kobject *kobj, struct kobject *parent, const char *fmt, ...); extern __printf(4, 5) __must_check int kobject_init_and_add(struct kobject *kobj, struct kobj_type *ktype, struct kobject *parent, const char *fmt, ...); extern void kobject_del(struct kobject *kobj); extern struct kobject * __must_check kobject_create(void); extern struct kobject * __must_check kobject_create_and_add(const char *name, struct kobject *parent); extern int __must_check kobject_rename(struct kobject *, const char *new_name); extern int __must_check kobject_move(struct kobject *, struct kobject *); extern struct kobject *kobject_get(struct kobject *kobj); extern struct kobject * __must_check kobject_get_unless_zero( struct kobject *kobj); extern void kobject_put(struct kobject *kobj); extern const void *kobject_namespace(struct kobject *kobj); extern void kobject_get_ownership(struct kobject *kobj, kuid_t *uid, kgid_t *gid); extern char *kobject_get_path(const struct kobject *kobj, gfp_t flag); /** * kobject_has_children - Returns whether a kobject has children. * @kobj: the object to test * * This will return whether a kobject has other kobjects as children. * * It does NOT account for the presence of attribute files, only sub * directories. It also assumes there is no concurrent addition or * removal of such children, and thus relies on external locking. */ static inline bool kobject_has_children(struct kobject *kobj) { WARN_ON_ONCE(kref_read(&kobj->kref) == 0); return kobj->sd && kobj->sd->dir.subdirs; } struct kobj_type { void (*release)(struct kobject *kobj); const struct sysfs_ops *sysfs_ops; struct attribute **default_attrs; /* use default_groups instead */ const struct attribute_group **default_groups; const struct kobj_ns_type_operations *(*child_ns_type)(struct kobject *kobj); const void *(*namespace)(struct kobject *kobj); void (*get_ownership)(struct kobject *kobj, kuid_t *uid, kgid_t *gid); }; struct kobj_uevent_env { char *argv[3]; char *envp[UEVENT_NUM_ENVP]; int envp_idx; char buf[UEVENT_BUFFER_SIZE]; int buflen; }; struct kset_uevent_ops { int (* const filter)(struct kset *kset, struct kobject *kobj); const char *(* const name)(struct kset *kset, struct kobject *kobj); int (* const uevent)(struct kset *kset, struct kobject *kobj, struct kobj_uevent_env *env); }; struct kobj_attribute { struct attribute attr; ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr, char *buf); ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count); }; extern const struct sysfs_ops kobj_sysfs_ops; struct sock; /** * struct kset - a set of kobjects of a specific type, belonging to a specific subsystem. * * A kset defines a group of kobjects. They can be individually * different "types" but overall these kobjects all want to be grouped * together and operated on in the same manner. ksets are used to * define the attribute callbacks and other common events that happen to * a kobject. * * @list: the list of all kobjects for this kset * @list_lock: a lock for iterating over the kobjects * @kobj: the embedded kobject for this kset (recursion, isn't it fun...) * @uevent_ops: the set of uevent operations for this kset. These are * called whenever a kobject has something happen to it so that the kset * can add new environment variables, or filter out the uevents if so * desired. */ struct kset { struct list_head list; spinlock_t list_lock; struct kobject kobj; const struct kset_uevent_ops *uevent_ops; } __randomize_layout; extern void kset_init(struct kset *kset); extern int __must_check kset_register(struct kset *kset); extern void kset_unregister(struct kset *kset); extern struct kset * __must_check kset_create_and_add(const char *name, const struct kset_uevent_ops *u, struct kobject *parent_kobj); static inline struct kset *to_kset(struct kobject *kobj) { return kobj ? container_of(kobj, struct kset, kobj) : NULL; } static inline struct kset *kset_get(struct kset *k) { return k ? to_kset(kobject_get(&k->kobj)) : NULL; } static inline void kset_put(struct kset *k) { kobject_put(&k->kobj); } static inline struct kobj_type *get_ktype(struct kobject *kobj) { return kobj->ktype; } extern struct kobject *kset_find_obj(struct kset *, const char *); /* The global /sys/kernel/ kobject for people to chain off of */ extern struct kobject *kernel_kobj; /* The global /sys/kernel/mm/ kobject for people to chain off of */ extern struct kobject *mm_kobj; /* The global /sys/hypervisor/ kobject for people to chain off of */ extern struct kobject *hypervisor_kobj; /* The global /sys/power/ kobject for people to chain off of */ extern struct kobject *power_kobj; /* The global /sys/firmware/ kobject for people to chain off of */ extern struct kobject *firmware_kobj; int kobject_uevent(struct kobject *kobj, enum kobject_action action); int kobject_uevent_env(struct kobject *kobj, enum kobject_action action, char *envp[]); int kobject_synth_uevent(struct kobject *kobj, const char *buf, size_t count); __printf(2, 3) int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...); #endif /* _KOBJECT_H_ */ PK ! )xڇ� � libfdt_env.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LIBFDT_ENV_H #define LIBFDT_ENV_H #include <linux/limits.h> /* For INT_MAX */ #include <linux/string.h> #include <asm/byteorder.h> #define INT32_MAX S32_MAX #define UINT32_MAX U32_MAX typedef __be16 fdt16_t; typedef __be32 fdt32_t; typedef __be64 fdt64_t; #define fdt32_to_cpu(x) be32_to_cpu(x) #define cpu_to_fdt32(x) cpu_to_be32(x) #define fdt64_to_cpu(x) be64_to_cpu(x) #define cpu_to_fdt64(x) cpu_to_be64(x) #endif /* LIBFDT_ENV_H */ PK ! 1��# # user_namespace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_USER_NAMESPACE_H #define _LINUX_USER_NAMESPACE_H #include <linux/kref.h> #include <linux/nsproxy.h> #include <linux/ns_common.h> #include <linux/sched.h> #include <linux/workqueue.h> #include <linux/rwsem.h> #include <linux/sysctl.h> #include <linux/err.h> #define UID_GID_MAP_MAX_BASE_EXTENTS 5 #define UID_GID_MAP_MAX_EXTENTS 340 struct uid_gid_extent { u32 first; u32 lower_first; u32 count; }; struct uid_gid_map { /* 64 bytes -- 1 cache line */ u32 nr_extents; union { struct uid_gid_extent extent[UID_GID_MAP_MAX_BASE_EXTENTS]; struct { struct uid_gid_extent *forward; struct uid_gid_extent *reverse; }; }; }; #define USERNS_SETGROUPS_ALLOWED 1UL #define USERNS_INIT_FLAGS USERNS_SETGROUPS_ALLOWED struct ucounts; enum ucount_type { UCOUNT_USER_NAMESPACES, UCOUNT_PID_NAMESPACES, UCOUNT_UTS_NAMESPACES, UCOUNT_IPC_NAMESPACES, UCOUNT_NET_NAMESPACES, UCOUNT_MNT_NAMESPACES, UCOUNT_CGROUP_NAMESPACES, UCOUNT_TIME_NAMESPACES, #ifdef CONFIG_INOTIFY_USER UCOUNT_INOTIFY_INSTANCES, UCOUNT_INOTIFY_WATCHES, #endif #ifdef CONFIG_FANOTIFY UCOUNT_FANOTIFY_GROUPS, UCOUNT_FANOTIFY_MARKS, #endif UCOUNT_RLIMIT_NPROC, UCOUNT_RLIMIT_MSGQUEUE, UCOUNT_RLIMIT_SIGPENDING, UCOUNT_RLIMIT_MEMLOCK, UCOUNT_COUNTS, }; #define MAX_PER_NAMESPACE_UCOUNTS UCOUNT_RLIMIT_NPROC struct user_namespace { struct uid_gid_map uid_map; struct uid_gid_map gid_map; struct uid_gid_map projid_map; struct user_namespace *parent; int level; kuid_t owner; kgid_t group; struct ns_common ns; unsigned long flags; /* parent_could_setfcap: true if the creator if this ns had CAP_SETFCAP * in its effective capability set at the child ns creation time. */ bool parent_could_setfcap; #ifdef CONFIG_KEYS /* List of joinable keyrings in this namespace. Modification access of * these pointers is controlled by keyring_sem. Once * user_keyring_register is set, it won't be changed, so it can be * accessed directly with READ_ONCE(). */ struct list_head keyring_name_list; struct key *user_keyring_register; struct rw_semaphore keyring_sem; #endif /* Register of per-UID persistent keyrings for this namespace */ #ifdef CONFIG_PERSISTENT_KEYRINGS struct key *persistent_keyring_register; #endif struct work_struct work; #ifdef CONFIG_SYSCTL struct ctl_table_set set; struct ctl_table_header *sysctls; #endif struct ucounts *ucounts; long ucount_max[UCOUNT_COUNTS]; } __randomize_layout; struct ucounts { struct hlist_node node; struct user_namespace *ns; kuid_t uid; atomic_t count; atomic_long_t ucount[UCOUNT_COUNTS]; }; extern struct user_namespace init_user_ns; extern struct ucounts init_ucounts; bool setup_userns_sysctls(struct user_namespace *ns); void retire_userns_sysctls(struct user_namespace *ns); struct ucounts *inc_ucount(struct user_namespace *ns, kuid_t uid, enum ucount_type type); void dec_ucount(struct ucounts *ucounts, enum ucount_type type); struct ucounts *alloc_ucounts(struct user_namespace *ns, kuid_t uid); struct ucounts * __must_check get_ucounts(struct ucounts *ucounts); void put_ucounts(struct ucounts *ucounts); static inline long get_ucounts_value(struct ucounts *ucounts, enum ucount_type type) { return atomic_long_read(&ucounts->ucount[type]); } long inc_rlimit_ucounts(struct ucounts *ucounts, enum ucount_type type, long v); bool dec_rlimit_ucounts(struct ucounts *ucounts, enum ucount_type type, long v); long inc_rlimit_get_ucounts(struct ucounts *ucounts, enum ucount_type type); void dec_rlimit_put_ucounts(struct ucounts *ucounts, enum ucount_type type); bool is_ucounts_overlimit(struct ucounts *ucounts, enum ucount_type type, unsigned long max); static inline void set_rlimit_ucount_max(struct user_namespace *ns, enum ucount_type type, unsigned long max) { ns->ucount_max[type] = max <= LONG_MAX ? max : LONG_MAX; } #ifdef CONFIG_USER_NS static inline struct user_namespace *get_user_ns(struct user_namespace *ns) { if (ns) refcount_inc(&ns->ns.count); return ns; } extern int create_user_ns(struct cred *new); extern int unshare_userns(unsigned long unshare_flags, struct cred **new_cred); extern void __put_user_ns(struct user_namespace *ns); static inline void put_user_ns(struct user_namespace *ns) { if (ns && refcount_dec_and_test(&ns->ns.count)) __put_user_ns(ns); } struct seq_operations; extern const struct seq_operations proc_uid_seq_operations; extern const struct seq_operations proc_gid_seq_operations; extern const struct seq_operations proc_projid_seq_operations; extern ssize_t proc_uid_map_write(struct file *, const char __user *, size_t, loff_t *); extern ssize_t proc_gid_map_write(struct file *, const char __user *, size_t, loff_t *); extern ssize_t proc_projid_map_write(struct file *, const char __user *, size_t, loff_t *); extern ssize_t proc_setgroups_write(struct file *, const char __user *, size_t, loff_t *); extern int proc_setgroups_show(struct seq_file *m, void *v); extern bool userns_may_setgroups(const struct user_namespace *ns); extern bool in_userns(const struct user_namespace *ancestor, const struct user_namespace *child); extern bool current_in_userns(const struct user_namespace *target_ns); struct ns_common *ns_get_owner(struct ns_common *ns); extern int unprivileged_userns_clone; #else static inline struct user_namespace *get_user_ns(struct user_namespace *ns) { return &init_user_ns; } static inline int create_user_ns(struct cred *new) { return -EINVAL; } static inline int unshare_userns(unsigned long unshare_flags, struct cred **new_cred) { if (unshare_flags & CLONE_NEWUSER) return -EINVAL; return 0; } static inline void put_user_ns(struct user_namespace *ns) { } static inline bool userns_may_setgroups(const struct user_namespace *ns) { return true; } static inline bool in_userns(const struct user_namespace *ancestor, const struct user_namespace *child) { return true; } static inline bool current_in_userns(const struct user_namespace *target_ns) { return true; } static inline struct ns_common *ns_get_owner(struct ns_common *ns) { return ERR_PTR(-EPERM); } #endif #endif /* _LINUX_USER_H */ PK ! s=R R acpi_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * ACPI helpers for DMA request / controller * * Based on of_dma.h * * Copyright (C) 2013, Intel Corporation * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> */ #ifndef __LINUX_ACPI_DMA_H #define __LINUX_ACPI_DMA_H #include <linux/list.h> #include <linux/device.h> #include <linux/err.h> #include <linux/dmaengine.h> /** * struct acpi_dma_spec - slave device DMA resources * @chan_id: channel unique id * @slave_id: request line unique id * @dev: struct device of the DMA controller to be used in the filter * function */ struct acpi_dma_spec { int chan_id; int slave_id; struct device *dev; }; /** * struct acpi_dma - representation of the registered DMAC * @dma_controllers: linked list node * @dev: struct device of this controller * @acpi_dma_xlate: callback function to find a suitable channel * @data: private data used by a callback function * @base_request_line: first supported request line (CSRT) * @end_request_line: last supported request line (CSRT) */ struct acpi_dma { struct list_head dma_controllers; struct device *dev; struct dma_chan *(*acpi_dma_xlate) (struct acpi_dma_spec *, struct acpi_dma *); void *data; unsigned short base_request_line; unsigned short end_request_line; }; /* Used with acpi_dma_simple_xlate() */ struct acpi_dma_filter_info { dma_cap_mask_t dma_cap; dma_filter_fn filter_fn; }; #ifdef CONFIG_DMA_ACPI int acpi_dma_controller_register(struct device *dev, struct dma_chan *(*acpi_dma_xlate) (struct acpi_dma_spec *, struct acpi_dma *), void *data); int acpi_dma_controller_free(struct device *dev); int devm_acpi_dma_controller_register(struct device *dev, struct dma_chan *(*acpi_dma_xlate) (struct acpi_dma_spec *, struct acpi_dma *), void *data); void devm_acpi_dma_controller_free(struct device *dev); struct dma_chan *acpi_dma_request_slave_chan_by_index(struct device *dev, size_t index); struct dma_chan *acpi_dma_request_slave_chan_by_name(struct device *dev, const char *name); struct dma_chan *acpi_dma_simple_xlate(struct acpi_dma_spec *dma_spec, struct acpi_dma *adma); #else static inline int acpi_dma_controller_register(struct device *dev, struct dma_chan *(*acpi_dma_xlate) (struct acpi_dma_spec *, struct acpi_dma *), void *data) { return -ENODEV; } static inline int acpi_dma_controller_free(struct device *dev) { return -ENODEV; } static inline int devm_acpi_dma_controller_register(struct device *dev, struct dma_chan *(*acpi_dma_xlate) (struct acpi_dma_spec *, struct acpi_dma *), void *data) { return -ENODEV; } static inline void devm_acpi_dma_controller_free(struct device *dev) { } static inline struct dma_chan *acpi_dma_request_slave_chan_by_index( struct device *dev, size_t index) { return ERR_PTR(-ENODEV); } static inline struct dma_chan *acpi_dma_request_slave_chan_by_name( struct device *dev, const char *name) { return ERR_PTR(-ENODEV); } #define acpi_dma_simple_xlate NULL #endif #define acpi_dma_request_slave_channel acpi_dma_request_slave_chan_by_index #endif /* __LINUX_ACPI_DMA_H */ PK ! ��_%! %! cpu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/cpu.h - generic cpu definition * * This is mainly for topological representation. We define the * basic 'struct cpu' here, which can be embedded in per-arch * definitions of processors. * * Basic handling of the devices is done in drivers/base/cpu.c * * CPUs are exported via sysfs in the devices/system/cpu * directory. */ #ifndef _LINUX_CPU_H_ #define _LINUX_CPU_H_ #include <linux/node.h> #include <linux/compiler.h> #include <linux/cpumask.h> #include <linux/cpuhotplug.h> struct device; struct device_node; struct attribute_group; struct cpu { int node_id; /* The node which contains the CPU */ int hotpluggable; /* creates sysfs control file if hotpluggable */ struct device dev; }; extern void boot_cpu_init(void); extern void boot_cpu_hotplug_init(void); extern void cpu_init(void); extern void trap_init(void); extern int register_cpu(struct cpu *cpu, int num); extern struct device *get_cpu_device(unsigned cpu); extern bool cpu_is_hotpluggable(unsigned cpu); extern bool arch_match_cpu_phys_id(int cpu, u64 phys_id); extern bool arch_find_n_match_cpu_physical_id(struct device_node *cpun, int cpu, unsigned int *thread); extern int cpu_add_dev_attr(struct device_attribute *attr); extern void cpu_remove_dev_attr(struct device_attribute *attr); extern int cpu_add_dev_attr_group(struct attribute_group *attrs); extern void cpu_remove_dev_attr_group(struct attribute_group *attrs); extern ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_mds(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_tsx_async_abort(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_itlb_multihit(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_srbds(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_mmio_stale_data(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_retbleed(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_spec_rstack_overflow(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_gds(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_reg_file_data_sampling(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_indirect_target_selection(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_tsa(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_vmscape(struct device *dev, struct device_attribute *attr, char *buf); extern __printf(4, 5) struct device *cpu_device_create(struct device *parent, void *drvdata, const struct attribute_group **groups, const char *fmt, ...); #ifdef CONFIG_HOTPLUG_CPU extern void unregister_cpu(struct cpu *cpu); extern ssize_t arch_cpu_probe(const char *, size_t); extern ssize_t arch_cpu_release(const char *, size_t); #endif /* * These states are not related to the core CPU hotplug mechanism. They are * used by various (sub)architectures to track internal state */ #define CPU_ONLINE 0x0002 /* CPU is up */ #define CPU_UP_PREPARE 0x0003 /* CPU coming up */ #define CPU_DEAD 0x0007 /* CPU dead */ #define CPU_DEAD_FROZEN 0x0008 /* CPU timed out on unplug */ #define CPU_POST_DEAD 0x0009 /* CPU successfully unplugged */ #define CPU_BROKEN 0x000B /* CPU did not die properly */ #ifdef CONFIG_SMP extern bool cpuhp_tasks_frozen; int add_cpu(unsigned int cpu); int cpu_device_up(struct device *dev); void notify_cpu_starting(unsigned int cpu); extern void cpu_maps_update_begin(void); extern void cpu_maps_update_done(void); int bringup_hibernate_cpu(unsigned int sleep_cpu); void bringup_nonboot_cpus(unsigned int setup_max_cpus); #else /* CONFIG_SMP */ #define cpuhp_tasks_frozen 0 static inline void cpu_maps_update_begin(void) { } static inline void cpu_maps_update_done(void) { } static inline int add_cpu(unsigned int cpu) { return 0;} #endif /* CONFIG_SMP */ extern struct bus_type cpu_subsys; extern int lockdep_is_cpus_held(void); #ifdef CONFIG_HOTPLUG_CPU extern void cpus_write_lock(void); extern void cpus_write_unlock(void); extern void cpus_read_lock(void); extern void cpus_read_unlock(void); extern int cpus_read_trylock(void); extern void lockdep_assert_cpus_held(void); extern void cpu_hotplug_disable(void); extern void cpu_hotplug_enable(void); void clear_tasks_mm_cpumask(int cpu); int remove_cpu(unsigned int cpu); int cpu_device_down(struct device *dev); extern void smp_shutdown_nonboot_cpus(unsigned int primary_cpu); #else /* CONFIG_HOTPLUG_CPU */ static inline void cpus_write_lock(void) { } static inline void cpus_write_unlock(void) { } static inline void cpus_read_lock(void) { } static inline void cpus_read_unlock(void) { } static inline int cpus_read_trylock(void) { return true; } static inline void lockdep_assert_cpus_held(void) { } static inline void cpu_hotplug_disable(void) { } static inline void cpu_hotplug_enable(void) { } static inline int remove_cpu(unsigned int cpu) { return -EPERM; } static inline void smp_shutdown_nonboot_cpus(unsigned int primary_cpu) { } #endif /* !CONFIG_HOTPLUG_CPU */ #ifdef CONFIG_PM_SLEEP_SMP extern int freeze_secondary_cpus(int primary); extern void thaw_secondary_cpus(void); static inline int suspend_disable_secondary_cpus(void) { int cpu = 0; if (IS_ENABLED(CONFIG_PM_SLEEP_SMP_NONZERO_CPU)) cpu = -1; return freeze_secondary_cpus(cpu); } static inline void suspend_enable_secondary_cpus(void) { return thaw_secondary_cpus(); } #else /* !CONFIG_PM_SLEEP_SMP */ static inline void thaw_secondary_cpus(void) {} static inline int suspend_disable_secondary_cpus(void) { return 0; } static inline void suspend_enable_secondary_cpus(void) { } #endif /* !CONFIG_PM_SLEEP_SMP */ void cpu_startup_entry(enum cpuhp_state state); void cpu_idle_poll_ctrl(bool enable); /* Attach to any functions which should be considered cpuidle. */ #define __cpuidle __section(".cpuidle.text") bool cpu_in_idle(unsigned long pc); void arch_cpu_idle(void); void arch_cpu_idle_prepare(void); void arch_cpu_idle_enter(void); void arch_cpu_idle_exit(void); void arch_cpu_idle_dead(void); #ifdef CONFIG_ARCH_HAS_CPU_FINALIZE_INIT void arch_cpu_finalize_init(void); #else static inline void arch_cpu_finalize_init(void) { } #endif int cpu_report_state(int cpu); int cpu_check_up_prepare(int cpu); void cpu_set_state_online(int cpu); void play_idle_precise(u64 duration_ns, u64 latency_ns); static inline void play_idle(unsigned long duration_us) { play_idle_precise(duration_us * NSEC_PER_USEC, U64_MAX); } #ifdef CONFIG_HOTPLUG_CPU bool cpu_wait_death(unsigned int cpu, int seconds); bool cpu_report_death(void); void cpuhp_report_idle_dead(void); #else static inline void cpuhp_report_idle_dead(void) { } #endif /* #ifdef CONFIG_HOTPLUG_CPU */ enum cpuhp_smt_control { CPU_SMT_ENABLED, CPU_SMT_DISABLED, CPU_SMT_FORCE_DISABLED, CPU_SMT_NOT_SUPPORTED, CPU_SMT_NOT_IMPLEMENTED, }; #if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT) extern enum cpuhp_smt_control cpu_smt_control; extern void cpu_smt_disable(bool force); extern void cpu_smt_check_topology(void); extern bool cpu_smt_possible(void); extern int cpuhp_smt_enable(void); extern int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval); #else # define cpu_smt_control (CPU_SMT_NOT_IMPLEMENTED) static inline void cpu_smt_disable(bool force) { } static inline void cpu_smt_check_topology(void) { } static inline bool cpu_smt_possible(void) { return false; } static inline int cpuhp_smt_enable(void) { return 0; } static inline int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval) { return 0; } #endif extern bool cpu_mitigations_off(void); extern bool cpu_mitigations_auto_nosmt(void); #endif /* _LINUX_CPU_H_ */ PK ! �* �� �� jbd2.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * linux/include/linux/jbd2.h * * Written by Stephen C. Tweedie <sct@redhat.com> * * Copyright 1998-2000 Red Hat, Inc --- All Rights Reserved * * Definitions for transaction data structures for the buffer cache * filesystem journaling support. */ #ifndef _LINUX_JBD2_H #define _LINUX_JBD2_H /* Allow this file to be included directly into e2fsprogs */ #ifndef __KERNEL__ #include "jfs_compat.h" #define JBD2_DEBUG #else #include <linux/types.h> #include <linux/buffer_head.h> #include <linux/journal-head.h> #include <linux/stddef.h> #include <linux/mutex.h> #include <linux/timer.h> #include <linux/slab.h> #include <linux/bit_spinlock.h> #include <linux/blkdev.h> #include <crypto/hash.h> #endif #define journal_oom_retry 1 /* * Define JBD2_PARANIOD_IOFAIL to cause a kernel BUG() if ext4 finds * certain classes of error which can occur due to failed IOs. Under * normal use we want ext4 to continue after such errors, because * hardware _can_ fail, but for debugging purposes when running tests on * known-good hardware we may want to trap these errors. */ #undef JBD2_PARANOID_IOFAIL /* * The default maximum commit age, in seconds. */ #define JBD2_DEFAULT_MAX_COMMIT_AGE 5 #ifdef CONFIG_JBD2_DEBUG /* * Define JBD2_EXPENSIVE_CHECKING to enable more expensive internal * consistency checks. By default we don't do this unless * CONFIG_JBD2_DEBUG is on. */ #define JBD2_EXPENSIVE_CHECKING extern ushort jbd2_journal_enable_debug; void __jbd2_debug(int level, const char *file, const char *func, unsigned int line, const char *fmt, ...); #define jbd2_debug(n, fmt, a...) \ __jbd2_debug((n), __FILE__, __func__, __LINE__, (fmt), ##a) #else #define jbd2_debug(n, fmt, a...) no_printk(fmt, ##a) #endif extern void *jbd2_alloc(size_t size, gfp_t flags); extern void jbd2_free(void *ptr, size_t size); #define JBD2_MIN_JOURNAL_BLOCKS 1024 #define JBD2_DEFAULT_FAST_COMMIT_BLOCKS 256 #ifdef __KERNEL__ /** * typedef handle_t - The handle_t type represents a single atomic update being performed by some process. * * All filesystem modifications made by the process go * through this handle. Recursive operations (such as quota operations) * are gathered into a single update. * * The buffer credits field is used to account for journaled buffers * being modified by the running process. To ensure that there is * enough log space for all outstanding operations, we need to limit the * number of outstanding buffers possible at any time. When the * operation completes, any buffer credits not used are credited back to * the transaction, so that at all times we know how many buffers the * outstanding updates on a transaction might possibly touch. * * This is an opaque datatype. **/ typedef struct jbd2_journal_handle handle_t; /* Atomic operation type */ /** * typedef journal_t - The journal_t maintains all of the journaling state information for a single filesystem. * * journal_t is linked to from the fs superblock structure. * * We use the journal_t to keep track of all outstanding transaction * activity on the filesystem, and to manage the state of the log * writing process. * * This is an opaque datatype. **/ typedef struct journal_s journal_t; /* Journal control structure */ #endif /* * Internal structures used by the logging mechanism: */ #define JBD2_MAGIC_NUMBER 0xc03b3998U /* The first 4 bytes of /dev/random! */ /* * On-disk structures */ /* * Descriptor block types: */ #define JBD2_DESCRIPTOR_BLOCK 1 #define JBD2_COMMIT_BLOCK 2 #define JBD2_SUPERBLOCK_V1 3 #define JBD2_SUPERBLOCK_V2 4 #define JBD2_REVOKE_BLOCK 5 /* * Standard header for all descriptor blocks: */ typedef struct journal_header_s { __be32 h_magic; __be32 h_blocktype; __be32 h_sequence; } journal_header_t; /* * Checksum types. */ #define JBD2_CRC32_CHKSUM 1 #define JBD2_MD5_CHKSUM 2 #define JBD2_SHA1_CHKSUM 3 #define JBD2_CRC32C_CHKSUM 4 #define JBD2_CRC32_CHKSUM_SIZE 4 #define JBD2_CHECKSUM_BYTES (32 / sizeof(u32)) /* * Commit block header for storing transactional checksums: * * NOTE: If FEATURE_COMPAT_CHECKSUM (checksum v1) is set, the h_chksum* * fields are used to store a checksum of the descriptor and data blocks. * * If FEATURE_INCOMPAT_CSUM_V2 (checksum v2) is set, then the h_chksum * field is used to store crc32c(uuid+commit_block). Each journal metadata * block gets its own checksum, and data block checksums are stored in * journal_block_tag (in the descriptor). The other h_chksum* fields are * not used. * * If FEATURE_INCOMPAT_CSUM_V3 is set, the descriptor block uses * journal_block_tag3_t to store a full 32-bit checksum. Everything else * is the same as v2. * * Checksum v1, v2, and v3 are mutually exclusive features. */ struct commit_header { __be32 h_magic; __be32 h_blocktype; __be32 h_sequence; unsigned char h_chksum_type; unsigned char h_chksum_size; unsigned char h_padding[2]; __be32 h_chksum[JBD2_CHECKSUM_BYTES]; __be64 h_commit_sec; __be32 h_commit_nsec; }; /* * The block tag: used to describe a single buffer in the journal. * t_blocknr_high is only used if INCOMPAT_64BIT is set, so this * raw struct shouldn't be used for pointer math or sizeof() - use * journal_tag_bytes(journal) instead to compute this. */ typedef struct journal_block_tag3_s { __be32 t_blocknr; /* The on-disk block number */ __be32 t_flags; /* See below */ __be32 t_blocknr_high; /* most-significant high 32bits. */ __be32 t_checksum; /* crc32c(uuid+seq+block) */ } journal_block_tag3_t; typedef struct journal_block_tag_s { __be32 t_blocknr; /* The on-disk block number */ __be16 t_checksum; /* truncated crc32c(uuid+seq+block) */ __be16 t_flags; /* See below */ __be32 t_blocknr_high; /* most-significant high 32bits. */ } journal_block_tag_t; /* Tail of descriptor or revoke block, for checksumming */ struct jbd2_journal_block_tail { __be32 t_checksum; /* crc32c(uuid+descr_block) */ }; /* * The revoke descriptor: used on disk to describe a series of blocks to * be revoked from the log */ typedef struct jbd2_journal_revoke_header_s { journal_header_t r_header; __be32 r_count; /* Count of bytes used in the block */ } jbd2_journal_revoke_header_t; /* Definitions for the journal tag flags word: */ #define JBD2_FLAG_ESCAPE 1 /* on-disk block is escaped */ #define JBD2_FLAG_SAME_UUID 2 /* block has same uuid as previous */ #define JBD2_FLAG_DELETED 4 /* block deleted by this transaction */ #define JBD2_FLAG_LAST_TAG 8 /* last tag in this descriptor block */ /* * The journal superblock. All fields are in big-endian byte order. */ typedef struct journal_superblock_s { /* 0x0000 */ journal_header_t s_header; /* 0x000C */ /* Static information describing the journal */ __be32 s_blocksize; /* journal device blocksize */ __be32 s_maxlen; /* total blocks in journal file */ __be32 s_first; /* first block of log information */ /* 0x0018 */ /* Dynamic information describing the current state of the log */ __be32 s_sequence; /* first commit ID expected in log */ __be32 s_start; /* blocknr of start of log */ /* 0x0020 */ /* Error value, as set by jbd2_journal_abort(). */ __be32 s_errno; /* 0x0024 */ /* Remaining fields are only valid in a version-2 superblock */ __be32 s_feature_compat; /* compatible feature set */ __be32 s_feature_incompat; /* incompatible feature set */ __be32 s_feature_ro_compat; /* readonly-compatible feature set */ /* 0x0030 */ __u8 s_uuid[16]; /* 128-bit uuid for journal */ /* 0x0040 */ __be32 s_nr_users; /* Nr of filesystems sharing log */ __be32 s_dynsuper; /* Blocknr of dynamic superblock copy*/ /* 0x0048 */ __be32 s_max_transaction; /* Limit of journal blocks per trans.*/ __be32 s_max_trans_data; /* Limit of data blocks per trans. */ /* 0x0050 */ __u8 s_checksum_type; /* checksum type */ __u8 s_padding2[3]; /* 0x0054 */ __be32 s_num_fc_blks; /* Number of fast commit blocks */ /* 0x0058 */ __u32 s_padding[41]; __be32 s_checksum; /* crc32c(superblock) */ /* 0x0100 */ __u8 s_users[16*48]; /* ids of all fs'es sharing the log */ /* 0x0400 */ } journal_superblock_t; /* Use the jbd2_{has,set,clear}_feature_* helpers; these will be removed */ #define JBD2_HAS_COMPAT_FEATURE(j,mask) \ ((j)->j_format_version >= 2 && \ ((j)->j_superblock->s_feature_compat & cpu_to_be32((mask)))) #define JBD2_HAS_RO_COMPAT_FEATURE(j,mask) \ ((j)->j_format_version >= 2 && \ ((j)->j_superblock->s_feature_ro_compat & cpu_to_be32((mask)))) #define JBD2_HAS_INCOMPAT_FEATURE(j,mask) \ ((j)->j_format_version >= 2 && \ ((j)->j_superblock->s_feature_incompat & cpu_to_be32((mask)))) #define JBD2_FEATURE_COMPAT_CHECKSUM 0x00000001 #define JBD2_FEATURE_INCOMPAT_REVOKE 0x00000001 #define JBD2_FEATURE_INCOMPAT_64BIT 0x00000002 #define JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT 0x00000004 #define JBD2_FEATURE_INCOMPAT_CSUM_V2 0x00000008 #define JBD2_FEATURE_INCOMPAT_CSUM_V3 0x00000010 #define JBD2_FEATURE_INCOMPAT_FAST_COMMIT 0x00000020 /* See "journal feature predicate functions" below */ /* Features known to this kernel version: */ #define JBD2_KNOWN_COMPAT_FEATURES JBD2_FEATURE_COMPAT_CHECKSUM #define JBD2_KNOWN_ROCOMPAT_FEATURES 0 #define JBD2_KNOWN_INCOMPAT_FEATURES (JBD2_FEATURE_INCOMPAT_REVOKE | \ JBD2_FEATURE_INCOMPAT_64BIT | \ JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT | \ JBD2_FEATURE_INCOMPAT_CSUM_V2 | \ JBD2_FEATURE_INCOMPAT_CSUM_V3 | \ JBD2_FEATURE_INCOMPAT_FAST_COMMIT) #ifdef __KERNEL__ #include <linux/fs.h> #include <linux/sched.h> enum jbd_state_bits { BH_JBD /* Has an attached ext3 journal_head */ = BH_PrivateStart, BH_JWrite, /* Being written to log (@@@ DEBUGGING) */ BH_Freed, /* Has been freed (truncated) */ BH_Revoked, /* Has been revoked from the log */ BH_RevokeValid, /* Revoked flag is valid */ BH_JBDDirty, /* Is dirty but journaled */ BH_JournalHead, /* Pins bh->b_private and jh->b_bh */ BH_Shadow, /* IO on shadow buffer is running */ BH_Verified, /* Metadata block has been verified ok */ BH_JBDPrivateStart, /* First bit available for private use by FS */ }; BUFFER_FNS(JBD, jbd) BUFFER_FNS(JWrite, jwrite) BUFFER_FNS(JBDDirty, jbddirty) TAS_BUFFER_FNS(JBDDirty, jbddirty) BUFFER_FNS(Revoked, revoked) TAS_BUFFER_FNS(Revoked, revoked) BUFFER_FNS(RevokeValid, revokevalid) TAS_BUFFER_FNS(RevokeValid, revokevalid) BUFFER_FNS(Freed, freed) BUFFER_FNS(Shadow, shadow) BUFFER_FNS(Verified, verified) static inline struct buffer_head *jh2bh(struct journal_head *jh) { return jh->b_bh; } static inline struct journal_head *bh2jh(struct buffer_head *bh) { return bh->b_private; } static inline void jbd_lock_bh_journal_head(struct buffer_head *bh) { bit_spin_lock(BH_JournalHead, &bh->b_state); } static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh) { bit_spin_unlock(BH_JournalHead, &bh->b_state); } #define J_ASSERT(assert) BUG_ON(!(assert)) #define J_ASSERT_BH(bh, expr) J_ASSERT(expr) #define J_ASSERT_JH(jh, expr) J_ASSERT(expr) #if defined(JBD2_PARANOID_IOFAIL) #define J_EXPECT(expr, why...) J_ASSERT(expr) #define J_EXPECT_BH(bh, expr, why...) J_ASSERT_BH(bh, expr) #define J_EXPECT_JH(jh, expr, why...) J_ASSERT_JH(jh, expr) #else #define __journal_expect(expr, why...) \ ({ \ int val = (expr); \ if (!val) { \ printk(KERN_ERR \ "JBD2 unexpected failure: %s: %s;\n", \ __func__, #expr); \ printk(KERN_ERR why "\n"); \ } \ val; \ }) #define J_EXPECT(expr, why...) __journal_expect(expr, ## why) #define J_EXPECT_BH(bh, expr, why...) __journal_expect(expr, ## why) #define J_EXPECT_JH(jh, expr, why...) __journal_expect(expr, ## why) #endif /* Flags in jbd_inode->i_flags */ #define __JI_COMMIT_RUNNING 0 #define __JI_WRITE_DATA 1 #define __JI_WAIT_DATA 2 /* * Commit of the inode data in progress. We use this flag to protect us from * concurrent deletion of inode. We cannot use reference to inode for this * since we cannot afford doing last iput() on behalf of kjournald */ #define JI_COMMIT_RUNNING (1 << __JI_COMMIT_RUNNING) /* Write allocated dirty buffers in this inode before commit */ #define JI_WRITE_DATA (1 << __JI_WRITE_DATA) /* Wait for outstanding data writes for this inode before commit */ #define JI_WAIT_DATA (1 << __JI_WAIT_DATA) /** * struct jbd2_inode - The jbd_inode type is the structure linking inodes in * ordered mode present in a transaction so that we can sync them during commit. */ struct jbd2_inode { /** * @i_transaction: * * Which transaction does this inode belong to? Either the running * transaction or the committing one. [j_list_lock] */ transaction_t *i_transaction; /** * @i_next_transaction: * * Pointer to the running transaction modifying inode's data in case * there is already a committing transaction touching it. [j_list_lock] */ transaction_t *i_next_transaction; /** * @i_list: List of inodes in the i_transaction [j_list_lock] */ struct list_head i_list; /** * @i_vfs_inode: * * VFS inode this inode belongs to [constant for lifetime of structure] */ struct inode *i_vfs_inode; /** * @i_flags: Flags of inode [j_list_lock] */ unsigned long i_flags; /** * @i_dirty_start: * * Offset in bytes where the dirty range for this inode starts. * [j_list_lock] */ loff_t i_dirty_start; /** * @i_dirty_end: * * Inclusive offset in bytes where the dirty range for this inode * ends. [j_list_lock] */ loff_t i_dirty_end; }; struct jbd2_revoke_table_s; /** * struct jbd2_journal_handle - The jbd2_journal_handle type is the concrete * type associated with handle_t. * @h_transaction: Which compound transaction is this update a part of? * @h_journal: Which journal handle belongs to - used iff h_reserved set. * @h_rsv_handle: Handle reserved for finishing the logical operation. * @h_total_credits: Number of remaining buffers we are allowed to add to * journal. These are dirty buffers and revoke descriptor blocks. * @h_revoke_credits: Number of remaining revoke records available for handle * @h_ref: Reference count on this handle. * @h_err: Field for caller's use to track errors through large fs operations. * @h_sync: Flag for sync-on-close. * @h_jdata: Flag to force data journaling. * @h_reserved: Flag for handle for reserved credits. * @h_aborted: Flag indicating fatal error on handle. * @h_type: For handle statistics. * @h_line_no: For handle statistics. * @h_start_jiffies: Handle Start time. * @h_requested_credits: Holds @h_total_credits after handle is started. * @h_revoke_credits_requested: Holds @h_revoke_credits after handle is started. * @saved_alloc_context: Saved context while transaction is open. **/ /* Docbook can't yet cope with the bit fields, but will leave the documentation * in so it can be fixed later. */ struct jbd2_journal_handle { union { transaction_t *h_transaction; /* Which journal handle belongs to - used iff h_reserved set */ journal_t *h_journal; }; handle_t *h_rsv_handle; int h_total_credits; int h_revoke_credits; int h_revoke_credits_requested; int h_ref; int h_err; /* Flags [no locking] */ unsigned int h_sync: 1; unsigned int h_jdata: 1; unsigned int h_reserved: 1; unsigned int h_aborted: 1; unsigned int h_type: 8; unsigned int h_line_no: 16; unsigned long h_start_jiffies; unsigned int h_requested_credits; unsigned int saved_alloc_context; }; /* * Some stats for checkpoint phase */ struct transaction_chp_stats_s { unsigned long cs_chp_time; __u32 cs_forced_to_close; __u32 cs_written; __u32 cs_dropped; }; /* The transaction_t type is the guts of the journaling mechanism. It * tracks a compound transaction through its various states: * * RUNNING: accepting new updates * LOCKED: Updates still running but we don't accept new ones * RUNDOWN: Updates are tidying up but have finished requesting * new buffers to modify (state not used for now) * FLUSH: All updates complete, but we are still writing to disk * COMMIT: All data on disk, writing commit record * FINISHED: We still have to keep the transaction for checkpointing. * * The transaction keeps track of all of the buffers modified by a * running transaction, and all of the buffers committed but not yet * flushed to home for finished transactions. * (Locking Documentation improved by LockDoc) */ /* * Lock ranking: * * j_list_lock * ->jbd_lock_bh_journal_head() (This is "innermost") * * j_state_lock * ->b_state_lock * * b_state_lock * ->j_list_lock * * j_state_lock * ->j_list_lock (journal_unmap_buffer) * */ struct transaction_s { /* Pointer to the journal for this transaction. [no locking] */ journal_t *t_journal; /* Sequence number for this transaction [no locking] */ tid_t t_tid; /* * Transaction's current state * [no locking - only kjournald2 alters this] * [j_list_lock] guards transition of a transaction into T_FINISHED * state and subsequent call of __jbd2_journal_drop_transaction() * FIXME: needs barriers * KLUDGE: [use j_state_lock] */ enum { T_RUNNING, T_LOCKED, T_SWITCH, T_FLUSH, T_COMMIT, T_COMMIT_DFLUSH, T_COMMIT_JFLUSH, T_COMMIT_CALLBACK, T_FINISHED } t_state; /* * Where in the log does this transaction's commit start? [no locking] */ unsigned long t_log_start; /* * Number of buffers on the t_buffers list [j_list_lock, no locks * needed for jbd2 thread] */ int t_nr_buffers; /* * Doubly-linked circular list of all buffers reserved but not yet * modified by this transaction [j_list_lock, no locks needed fo * jbd2 thread] */ struct journal_head *t_reserved_list; /* * Doubly-linked circular list of all metadata buffers owned by this * transaction [j_list_lock, no locks needed for jbd2 thread] */ struct journal_head *t_buffers; /* * Doubly-linked circular list of all forget buffers (superseded * buffers which we can un-checkpoint once this transaction commits) * [j_list_lock] */ struct journal_head *t_forget; /* * Doubly-linked circular list of all buffers still to be flushed before * this transaction can be checkpointed. [j_list_lock] */ struct journal_head *t_checkpoint_list; /* * Doubly-linked circular list of metadata buffers being * shadowed by log IO. The IO buffers on the iobuf list and * the shadow buffers on this list match each other one for * one at all times. [j_list_lock, no locks needed for jbd2 * thread] */ struct journal_head *t_shadow_list; /* * List of inodes associated with the transaction; e.g., ext4 uses * this to track inodes in data=ordered and data=journal mode that * need special handling on transaction commit; also used by ocfs2. * [j_list_lock] */ struct list_head t_inode_list; /* * Protects info related to handles */ spinlock_t t_handle_lock; /* * Longest time some handle had to wait for running transaction */ unsigned long t_max_wait; /* * When transaction started */ unsigned long t_start; /* * When commit was requested [j_state_lock] */ unsigned long t_requested; /* * Checkpointing stats [j_list_lock] */ struct transaction_chp_stats_s t_chp_stats; /* * Number of outstanding updates running on this transaction * [none] */ atomic_t t_updates; /* * Number of blocks reserved for this transaction in the journal. * This is including all credits reserved when starting transaction * handles as well as all journal descriptor blocks needed for this * transaction. [none] */ atomic_t t_outstanding_credits; /* * Number of revoke records for this transaction added by already * stopped handles. [none] */ atomic_t t_outstanding_revokes; /* * How many handles used this transaction? [none] */ atomic_t t_handle_count; /* * Forward and backward links for the circular list of all transactions * awaiting checkpoint. [j_list_lock] */ transaction_t *t_cpnext, *t_cpprev; /* * When will the transaction expire (become due for commit), in jiffies? * [no locking] */ unsigned long t_expires; /* * When this transaction started, in nanoseconds [no locking] */ ktime_t t_start_time; /* * This transaction is being forced and some process is * waiting for it to finish. */ unsigned int t_synchronous_commit:1; /* Disk flush needs to be sent to fs partition [no locking] */ int t_need_data_flush; /* * For use by the filesystem to store fs-specific data * structures associated with the transaction */ struct list_head t_private_list; }; struct transaction_run_stats_s { unsigned long rs_wait; unsigned long rs_request_delay; unsigned long rs_running; unsigned long rs_locked; unsigned long rs_flushing; unsigned long rs_logging; __u32 rs_handle_count; __u32 rs_blocks; __u32 rs_blocks_logged; }; struct transaction_stats_s { unsigned long ts_tid; unsigned long ts_requested; struct transaction_run_stats_s run; }; static inline unsigned long jbd2_time_diff(unsigned long start, unsigned long end) { if (end >= start) return end - start; return end + (MAX_JIFFY_OFFSET - start); } #define JBD2_NR_BATCH 64 enum passtype {PASS_SCAN, PASS_REVOKE, PASS_REPLAY}; #define JBD2_FC_REPLAY_STOP 0 #define JBD2_FC_REPLAY_CONTINUE 1 /** * struct journal_s - The journal_s type is the concrete type associated with * journal_t. */ struct journal_s { /** * @j_flags: General journaling state flags [j_state_lock, * no lock for quick racy checks] */ unsigned long j_flags; /** * @j_atomic_flags: Atomic journaling state flags. */ unsigned long j_atomic_flags; /** * @j_errno: * * Is there an outstanding uncleared error on the journal (from a prior * abort)? [j_state_lock] */ int j_errno; /** * @j_abort_mutex: Lock the whole aborting procedure. */ struct mutex j_abort_mutex; /** * @j_sb_buffer: The first part of the superblock buffer. */ struct buffer_head *j_sb_buffer; /** * @j_superblock: The second part of the superblock buffer. */ journal_superblock_t *j_superblock; /** * @j_format_version: Version of the superblock format. */ int j_format_version; /** * @j_state_lock: Protect the various scalars in the journal. */ rwlock_t j_state_lock; /** * @j_barrier_count: * * Number of processes waiting to create a barrier lock [j_state_lock, * no lock for quick racy checks] */ int j_barrier_count; /** * @j_barrier: The barrier lock itself. */ struct mutex j_barrier; /** * @j_running_transaction: * * Transactions: The current running transaction... * [j_state_lock, no lock for quick racy checks] [caller holding * open handle] */ transaction_t *j_running_transaction; /** * @j_committing_transaction: * * the transaction we are pushing to disk * [j_state_lock] [caller holding open handle] */ transaction_t *j_committing_transaction; /** * @j_checkpoint_transactions: * * ... and a linked circular list of all transactions waiting for * checkpointing. [j_list_lock] */ transaction_t *j_checkpoint_transactions; /** * @j_wait_transaction_locked: * * Wait queue for waiting for a locked transaction to start committing, * or for a barrier lock to be released. */ wait_queue_head_t j_wait_transaction_locked; /** * @j_wait_done_commit: Wait queue for waiting for commit to complete. */ wait_queue_head_t j_wait_done_commit; /** * @j_wait_commit: Wait queue to trigger commit. */ wait_queue_head_t j_wait_commit; /** * @j_wait_updates: Wait queue to wait for updates to complete. */ wait_queue_head_t j_wait_updates; /** * @j_wait_reserved: * * Wait queue to wait for reserved buffer credits to drop. */ wait_queue_head_t j_wait_reserved; /** * @j_fc_wait: * * Wait queue to wait for completion of async fast commits. */ wait_queue_head_t j_fc_wait; /** * @j_checkpoint_mutex: * * Semaphore for locking against concurrent checkpoints. */ struct mutex j_checkpoint_mutex; /** * @j_chkpt_bhs: * * List of buffer heads used by the checkpoint routine. This * was moved from jbd2_log_do_checkpoint() to reduce stack * usage. Access to this array is controlled by the * @j_checkpoint_mutex. [j_checkpoint_mutex] */ struct buffer_head *j_chkpt_bhs[JBD2_NR_BATCH]; /** * @j_shrinker: * * Journal head shrinker, reclaim buffer's journal head which * has been written back. */ struct shrinker j_shrinker; /** * @j_checkpoint_jh_count: * * Number of journal buffers on the checkpoint list. [j_list_lock] */ struct percpu_counter j_checkpoint_jh_count; /** * @j_shrink_transaction: * * Record next transaction will shrink on the checkpoint list. * [j_list_lock] */ transaction_t *j_shrink_transaction; /** * @j_head: * * Journal head: identifies the first unused block in the journal. * [j_state_lock] */ unsigned long j_head; /** * @j_tail: * * Journal tail: identifies the oldest still-used block in the journal. * [j_state_lock] */ unsigned long j_tail; /** * @j_free: * * Journal free: how many free blocks are there in the journal? * [j_state_lock] */ unsigned long j_free; /** * @j_first: * * The block number of the first usable block in the journal * [j_state_lock]. */ unsigned long j_first; /** * @j_last: * * The block number one beyond the last usable block in the journal * [j_state_lock]. */ unsigned long j_last; /** * @j_fc_first: * * The block number of the first fast commit block in the journal * [j_state_lock]. */ unsigned long j_fc_first; /** * @j_fc_off: * * Number of fast commit blocks currently allocated. Accessed only * during fast commit. Currently only process can do fast commit, so * this field is not protected by any lock. */ unsigned long j_fc_off; /** * @j_fc_last: * * The block number one beyond the last fast commit block in the journal * [j_state_lock]. */ unsigned long j_fc_last; /** * @j_dev: Device where we store the journal. */ struct block_device *j_dev; /** * @j_blocksize: Block size for the location where we store the journal. */ int j_blocksize; /** * @j_blk_offset: * * Starting block offset into the device where we store the journal. */ unsigned long long j_blk_offset; /** * @j_devname: Journal device name. */ char j_devname[BDEVNAME_SIZE+24]; /** * @j_fs_dev: * * Device which holds the client fs. For internal journal this will be * equal to j_dev. */ struct block_device *j_fs_dev; /** * @j_total_len: Total maximum capacity of the journal region on disk. */ unsigned int j_total_len; /** * @j_reserved_credits: * * Number of buffers reserved from the running transaction. */ atomic_t j_reserved_credits; /** * @j_list_lock: Protects the buffer lists and internal buffer state. */ spinlock_t j_list_lock; /** * @j_inode: * * Optional inode where we store the journal. If present, all * journal block numbers are mapped into this inode via bmap(). */ struct inode *j_inode; /** * @j_tail_sequence: * * Sequence number of the oldest transaction in the log [j_state_lock] */ tid_t j_tail_sequence; /** * @j_transaction_sequence: * * Sequence number of the next transaction to grant [j_state_lock] */ tid_t j_transaction_sequence; /** * @j_commit_sequence: * * Sequence number of the most recently committed transaction * [j_state_lock, no lock for quick racy checks] */ tid_t j_commit_sequence; /** * @j_commit_request: * * Sequence number of the most recent transaction wanting commit * [j_state_lock, no lock for quick racy checks] */ tid_t j_commit_request; /** * @j_uuid: * * Journal uuid: identifies the object (filesystem, LVM volume etc) * backed by this journal. This will eventually be replaced by an array * of uuids, allowing us to index multiple devices within a single * journal and to perform atomic updates across them. */ __u8 j_uuid[16]; /** * @j_task: Pointer to the current commit thread for this journal. */ struct task_struct *j_task; /** * @j_max_transaction_buffers: * * Maximum number of metadata buffers to allow in a single compound * commit transaction. */ int j_max_transaction_buffers; /** * @j_revoke_records_per_block: * * Number of revoke records that fit in one descriptor block. */ int j_revoke_records_per_block; /** * @j_commit_interval: * * What is the maximum transaction lifetime before we begin a commit? */ unsigned long j_commit_interval; /** * @j_commit_timer: The timer used to wakeup the commit thread. */ struct timer_list j_commit_timer; /** * @j_revoke_lock: Protect the revoke table. */ spinlock_t j_revoke_lock; /** * @j_revoke: * * The revoke table - maintains the list of revoked blocks in the * current transaction. */ struct jbd2_revoke_table_s *j_revoke; /** * @j_revoke_table: Alternate revoke tables for j_revoke. */ struct jbd2_revoke_table_s *j_revoke_table[2]; /** * @j_wbuf: Array of bhs for jbd2_journal_commit_transaction. */ struct buffer_head **j_wbuf; /** * @j_fc_wbuf: Array of fast commit bhs for fast commit. Accessed only * during a fast commit. Currently only process can do fast commit, so * this field is not protected by any lock. */ struct buffer_head **j_fc_wbuf; /** * @j_wbufsize: * * Size of @j_wbuf array. */ int j_wbufsize; /** * @j_fc_wbufsize: * * Size of @j_fc_wbuf array. */ int j_fc_wbufsize; /** * @j_last_sync_writer: * * The pid of the last person to run a synchronous operation * through the journal. */ pid_t j_last_sync_writer; /** * @j_average_commit_time: * * The average amount of time in nanoseconds it takes to commit a * transaction to disk. [j_state_lock] */ u64 j_average_commit_time; /** * @j_min_batch_time: * * Minimum time that we should wait for additional filesystem operations * to get batched into a synchronous handle in microseconds. */ u32 j_min_batch_time; /** * @j_max_batch_time: * * Maximum time that we should wait for additional filesystem operations * to get batched into a synchronous handle in microseconds. */ u32 j_max_batch_time; /** * @j_commit_callback: * * This function is called when a transaction is closed. */ void (*j_commit_callback)(journal_t *, transaction_t *); /** * @j_submit_inode_data_buffers: * * This function is called for all inodes associated with the * committing transaction marked with JI_WRITE_DATA flag * before we start to write out the transaction to the journal. */ int (*j_submit_inode_data_buffers) (struct jbd2_inode *); /** * @j_finish_inode_data_buffers: * * This function is called for all inodes associated with the * committing transaction marked with JI_WAIT_DATA flag * after we have written the transaction to the journal * but before we write out the commit block. */ int (*j_finish_inode_data_buffers) (struct jbd2_inode *); /* * Journal statistics */ /** * @j_history_lock: Protect the transactions statistics history. */ spinlock_t j_history_lock; /** * @j_proc_entry: procfs entry for the jbd statistics directory. */ struct proc_dir_entry *j_proc_entry; /** * @j_stats: Overall statistics. */ struct transaction_stats_s j_stats; /** * @j_failed_commit: Failed journal commit ID. */ unsigned int j_failed_commit; /** * @j_private: * * An opaque pointer to fs-private information. ext3 puts its * superblock pointer here. */ void *j_private; /** * @j_chksum_driver: * * Reference to checksum algorithm driver via cryptoapi. */ struct crypto_shash *j_chksum_driver; /** * @j_csum_seed: * * Precomputed journal UUID checksum for seeding other checksums. */ __u32 j_csum_seed; #ifdef CONFIG_DEBUG_LOCK_ALLOC /** * @j_trans_commit_map: * * Lockdep entity to track transaction commit dependencies. Handles * hold this "lock" for read, when we wait for commit, we acquire the * "lock" for writing. This matches the properties of jbd2 journalling * where the running transaction has to wait for all handles to be * dropped to commit that transaction and also acquiring a handle may * require transaction commit to finish. */ struct lockdep_map j_trans_commit_map; #endif /** * @j_fc_cleanup_callback: * * Clean-up after fast commit or full commit. JBD2 calls this function * after every commit operation. */ void (*j_fc_cleanup_callback)(struct journal_s *journal, int full, tid_t tid); /** * @j_fc_replay_callback: * * File-system specific function that performs replay of a fast * commit. JBD2 calls this function for each fast commit block found in * the journal. This function should return JBD2_FC_REPLAY_CONTINUE * to indicate that the block was processed correctly and more fast * commit replay should continue. Return value of JBD2_FC_REPLAY_STOP * indicates the end of replay (no more blocks remaining). A negative * return value indicates error. */ int (*j_fc_replay_callback)(struct journal_s *journal, struct buffer_head *bh, enum passtype pass, int off, tid_t expected_commit_id); }; #define jbd2_might_wait_for_commit(j) \ do { \ rwsem_acquire(&j->j_trans_commit_map, 0, 0, _THIS_IP_); \ rwsem_release(&j->j_trans_commit_map, _THIS_IP_); \ } while (0) /* journal feature predicate functions */ #define JBD2_FEATURE_COMPAT_FUNCS(name, flagname) \ static inline bool jbd2_has_feature_##name(journal_t *j) \ { \ return ((j)->j_format_version >= 2 && \ ((j)->j_superblock->s_feature_compat & \ cpu_to_be32(JBD2_FEATURE_COMPAT_##flagname)) != 0); \ } \ static inline void jbd2_set_feature_##name(journal_t *j) \ { \ (j)->j_superblock->s_feature_compat |= \ cpu_to_be32(JBD2_FEATURE_COMPAT_##flagname); \ } \ static inline void jbd2_clear_feature_##name(journal_t *j) \ { \ (j)->j_superblock->s_feature_compat &= \ ~cpu_to_be32(JBD2_FEATURE_COMPAT_##flagname); \ } #define JBD2_FEATURE_RO_COMPAT_FUNCS(name, flagname) \ static inline bool jbd2_has_feature_##name(journal_t *j) \ { \ return ((j)->j_format_version >= 2 && \ ((j)->j_superblock->s_feature_ro_compat & \ cpu_to_be32(JBD2_FEATURE_RO_COMPAT_##flagname)) != 0); \ } \ static inline void jbd2_set_feature_##name(journal_t *j) \ { \ (j)->j_superblock->s_feature_ro_compat |= \ cpu_to_be32(JBD2_FEATURE_RO_COMPAT_##flagname); \ } \ static inline void jbd2_clear_feature_##name(journal_t *j) \ { \ (j)->j_superblock->s_feature_ro_compat &= \ ~cpu_to_be32(JBD2_FEATURE_RO_COMPAT_##flagname); \ } #define JBD2_FEATURE_INCOMPAT_FUNCS(name, flagname) \ static inline bool jbd2_has_feature_##name(journal_t *j) \ { \ return ((j)->j_format_version >= 2 && \ ((j)->j_superblock->s_feature_incompat & \ cpu_to_be32(JBD2_FEATURE_INCOMPAT_##flagname)) != 0); \ } \ static inline void jbd2_set_feature_##name(journal_t *j) \ { \ (j)->j_superblock->s_feature_incompat |= \ cpu_to_be32(JBD2_FEATURE_INCOMPAT_##flagname); \ } \ static inline void jbd2_clear_feature_##name(journal_t *j) \ { \ (j)->j_superblock->s_feature_incompat &= \ ~cpu_to_be32(JBD2_FEATURE_INCOMPAT_##flagname); \ } JBD2_FEATURE_COMPAT_FUNCS(checksum, CHECKSUM) JBD2_FEATURE_INCOMPAT_FUNCS(revoke, REVOKE) JBD2_FEATURE_INCOMPAT_FUNCS(64bit, 64BIT) JBD2_FEATURE_INCOMPAT_FUNCS(async_commit, ASYNC_COMMIT) JBD2_FEATURE_INCOMPAT_FUNCS(csum2, CSUM_V2) JBD2_FEATURE_INCOMPAT_FUNCS(csum3, CSUM_V3) JBD2_FEATURE_INCOMPAT_FUNCS(fast_commit, FAST_COMMIT) /* * Journal flag definitions */ #define JBD2_UNMOUNT 0x001 /* Journal thread is being destroyed */ #define JBD2_ABORT 0x002 /* Journaling has been aborted for errors. */ #define JBD2_ACK_ERR 0x004 /* The errno in the sb has been acked */ #define JBD2_FLUSHED 0x008 /* The journal superblock has been flushed */ #define JBD2_LOADED 0x010 /* The journal superblock has been loaded */ #define JBD2_BARRIER 0x020 /* Use IDE barriers */ #define JBD2_ABORT_ON_SYNCDATA_ERR 0x040 /* Abort the journal on file * data write error in ordered * mode */ #define JBD2_FAST_COMMIT_ONGOING 0x100 /* Fast commit is ongoing */ #define JBD2_FULL_COMMIT_ONGOING 0x200 /* Full commit is ongoing */ #define JBD2_JOURNAL_FLUSH_DISCARD 0x0001 #define JBD2_JOURNAL_FLUSH_ZEROOUT 0x0002 #define JBD2_JOURNAL_FLUSH_VALID (JBD2_JOURNAL_FLUSH_DISCARD | \ JBD2_JOURNAL_FLUSH_ZEROOUT) /* * Journal atomic flag definitions */ #define JBD2_CHECKPOINT_IO_ERROR 0x001 /* Detect io error while writing * buffer back to disk */ /* * Function declarations for the journaling transaction and buffer * management */ /* Filing buffers */ extern void jbd2_journal_unfile_buffer(journal_t *, struct journal_head *); extern bool __jbd2_journal_refile_buffer(struct journal_head *); extern void jbd2_journal_refile_buffer(journal_t *, struct journal_head *); extern void __jbd2_journal_file_buffer(struct journal_head *, transaction_t *, int); extern void __journal_free_buffer(struct journal_head *bh); extern void jbd2_journal_file_buffer(struct journal_head *, transaction_t *, int); extern void __journal_clean_data_list(transaction_t *transaction); static inline void jbd2_file_log_bh(struct list_head *head, struct buffer_head *bh) { list_add_tail(&bh->b_assoc_buffers, head); } static inline void jbd2_unfile_log_bh(struct buffer_head *bh) { list_del_init(&bh->b_assoc_buffers); } /* Log buffer allocation */ struct buffer_head *jbd2_journal_get_descriptor_buffer(transaction_t *, int); void jbd2_descriptor_block_csum_set(journal_t *, struct buffer_head *); int jbd2_journal_next_log_block(journal_t *, unsigned long long *); int jbd2_journal_get_log_tail(journal_t *journal, tid_t *tid, unsigned long *block); int __jbd2_update_log_tail(journal_t *journal, tid_t tid, unsigned long block); void jbd2_update_log_tail(journal_t *journal, tid_t tid, unsigned long block); /* Commit management */ extern void jbd2_journal_commit_transaction(journal_t *); /* Checkpoint list management */ void __jbd2_journal_clean_checkpoint_list(journal_t *journal, bool destroy); unsigned long jbd2_journal_shrink_checkpoint_list(journal_t *journal, unsigned long *nr_to_scan); int __jbd2_journal_remove_checkpoint(struct journal_head *); int jbd2_journal_try_remove_checkpoint(struct journal_head *jh); void jbd2_journal_destroy_checkpoint(journal_t *journal); void __jbd2_journal_insert_checkpoint(struct journal_head *, transaction_t *); /* * Triggers */ struct jbd2_buffer_trigger_type { /* * Fired a the moment data to write to the journal are known to be * stable - so either at the moment b_frozen_data is created or just * before a buffer is written to the journal. mapped_data is a mapped * buffer that is the frozen data for commit. */ void (*t_frozen)(struct jbd2_buffer_trigger_type *type, struct buffer_head *bh, void *mapped_data, size_t size); /* * Fired during journal abort for dirty buffers that will not be * committed. */ void (*t_abort)(struct jbd2_buffer_trigger_type *type, struct buffer_head *bh); }; extern void jbd2_buffer_frozen_trigger(struct journal_head *jh, void *mapped_data, struct jbd2_buffer_trigger_type *triggers); extern void jbd2_buffer_abort_trigger(struct journal_head *jh, struct jbd2_buffer_trigger_type *triggers); /* Buffer IO */ extern int jbd2_journal_write_metadata_buffer(transaction_t *transaction, struct journal_head *jh_in, struct buffer_head **bh_out, sector_t blocknr); /* Transaction locking */ extern void __wait_on_journal (journal_t *); /* Transaction cache support */ extern void jbd2_journal_destroy_transaction_cache(void); extern int __init jbd2_journal_init_transaction_cache(void); extern void jbd2_journal_free_transaction(transaction_t *); /* * Journal locking. * * We need to lock the journal during transaction state changes so that nobody * ever tries to take a handle on the running transaction while we are in the * middle of moving it to the commit phase. j_state_lock does this. * * Note that the locking is completely interrupt unsafe. We never touch * journal structures from interrupts. */ static inline handle_t *journal_current_handle(void) { return current->journal_info; } /* The journaling code user interface: * * Create and destroy handles * Register buffer modifications against the current transaction. */ extern handle_t *jbd2_journal_start(journal_t *, int nblocks); extern handle_t *jbd2__journal_start(journal_t *, int blocks, int rsv_blocks, int revoke_records, gfp_t gfp_mask, unsigned int type, unsigned int line_no); extern int jbd2_journal_restart(handle_t *, int nblocks); extern int jbd2__journal_restart(handle_t *, int nblocks, int revoke_records, gfp_t gfp_mask); extern int jbd2_journal_start_reserved(handle_t *handle, unsigned int type, unsigned int line_no); extern void jbd2_journal_free_reserved(handle_t *handle); extern int jbd2_journal_extend(handle_t *handle, int nblocks, int revoke_records); extern int jbd2_journal_get_write_access(handle_t *, struct buffer_head *); extern int jbd2_journal_get_create_access (handle_t *, struct buffer_head *); extern int jbd2_journal_get_undo_access(handle_t *, struct buffer_head *); void jbd2_journal_set_triggers(struct buffer_head *, struct jbd2_buffer_trigger_type *type); extern int jbd2_journal_dirty_metadata (handle_t *, struct buffer_head *); extern int jbd2_journal_forget (handle_t *, struct buffer_head *); extern int jbd2_journal_invalidatepage(journal_t *, struct page *, unsigned int, unsigned int); extern int jbd2_journal_try_to_free_buffers(journal_t *journal, struct page *page); extern int jbd2_journal_stop(handle_t *); extern int jbd2_journal_flush(journal_t *journal, unsigned int flags); extern void jbd2_journal_lock_updates (journal_t *); extern void jbd2_journal_unlock_updates (journal_t *); void jbd2_journal_wait_updates(journal_t *); extern journal_t * jbd2_journal_init_dev(struct block_device *bdev, struct block_device *fs_dev, unsigned long long start, int len, int bsize); extern journal_t * jbd2_journal_init_inode (struct inode *); extern int jbd2_journal_update_format (journal_t *); extern int jbd2_journal_check_used_features (journal_t *, unsigned long, unsigned long, unsigned long); extern int jbd2_journal_check_available_features (journal_t *, unsigned long, unsigned long, unsigned long); extern int jbd2_journal_set_features (journal_t *, unsigned long, unsigned long, unsigned long); extern void jbd2_journal_clear_features (journal_t *, unsigned long, unsigned long, unsigned long); extern int jbd2_journal_load (journal_t *journal); extern int jbd2_journal_destroy (journal_t *); extern int jbd2_journal_recover (journal_t *journal); extern int jbd2_journal_wipe (journal_t *, int); extern int jbd2_journal_skip_recovery (journal_t *); extern void jbd2_journal_update_sb_errno(journal_t *); extern int jbd2_journal_update_sb_log_tail (journal_t *, tid_t, unsigned long, int); extern void jbd2_journal_abort (journal_t *, int); extern int jbd2_journal_errno (journal_t *); extern void jbd2_journal_ack_err (journal_t *); extern int jbd2_journal_clear_err (journal_t *); extern int jbd2_journal_bmap(journal_t *, unsigned long, unsigned long long *); extern int jbd2_journal_force_commit(journal_t *); extern int jbd2_journal_force_commit_nested(journal_t *); extern int jbd2_journal_inode_ranged_write(handle_t *handle, struct jbd2_inode *inode, loff_t start_byte, loff_t length); extern int jbd2_journal_inode_ranged_wait(handle_t *handle, struct jbd2_inode *inode, loff_t start_byte, loff_t length); extern int jbd2_journal_submit_inode_data_buffers( struct jbd2_inode *jinode); extern int jbd2_journal_finish_inode_data_buffers( struct jbd2_inode *jinode); extern int jbd2_journal_begin_ordered_truncate(journal_t *journal, struct jbd2_inode *inode, loff_t new_size); extern void jbd2_journal_init_jbd_inode(struct jbd2_inode *jinode, struct inode *inode); extern void jbd2_journal_release_jbd_inode(journal_t *journal, struct jbd2_inode *jinode); /* * journal_head management */ struct journal_head *jbd2_journal_add_journal_head(struct buffer_head *bh); struct journal_head *jbd2_journal_grab_journal_head(struct buffer_head *bh); void jbd2_journal_put_journal_head(struct journal_head *jh); /* * handle management */ extern struct kmem_cache *jbd2_handle_cache; static inline handle_t *jbd2_alloc_handle(gfp_t gfp_flags) { return kmem_cache_zalloc(jbd2_handle_cache, gfp_flags); } static inline void jbd2_free_handle(handle_t *handle) { kmem_cache_free(jbd2_handle_cache, handle); } /* * jbd2_inode management (optional, for those file systems that want to use * dynamically allocated jbd2_inode structures) */ extern struct kmem_cache *jbd2_inode_cache; static inline struct jbd2_inode *jbd2_alloc_inode(gfp_t gfp_flags) { return kmem_cache_alloc(jbd2_inode_cache, gfp_flags); } static inline void jbd2_free_inode(struct jbd2_inode *jinode) { kmem_cache_free(jbd2_inode_cache, jinode); } /* Primary revoke support */ #define JOURNAL_REVOKE_DEFAULT_HASH 256 extern int jbd2_journal_init_revoke(journal_t *, int); extern void jbd2_journal_destroy_revoke_record_cache(void); extern void jbd2_journal_destroy_revoke_table_cache(void); extern int __init jbd2_journal_init_revoke_record_cache(void); extern int __init jbd2_journal_init_revoke_table_cache(void); extern void jbd2_journal_destroy_revoke(journal_t *); extern int jbd2_journal_revoke (handle_t *, unsigned long long, struct buffer_head *); extern int jbd2_journal_cancel_revoke(handle_t *, struct journal_head *); extern void jbd2_journal_write_revoke_records(transaction_t *transaction, struct list_head *log_bufs); /* Recovery revoke support */ extern int jbd2_journal_set_revoke(journal_t *, unsigned long long, tid_t); extern int jbd2_journal_test_revoke(journal_t *, unsigned long long, tid_t); extern void jbd2_journal_clear_revoke(journal_t *); extern void jbd2_journal_switch_revoke_table(journal_t *journal); extern void jbd2_clear_buffer_revoked_flags(journal_t *journal); /* * The log thread user interface: * * Request space in the current transaction, and force transaction commit * transitions on demand. */ int jbd2_log_start_commit(journal_t *journal, tid_t tid); int __jbd2_log_start_commit(journal_t *journal, tid_t tid); int jbd2_journal_start_commit(journal_t *journal, tid_t *tid); int jbd2_log_wait_commit(journal_t *journal, tid_t tid); int jbd2_transaction_committed(journal_t *journal, tid_t tid); int jbd2_complete_transaction(journal_t *journal, tid_t tid); int jbd2_log_do_checkpoint(journal_t *journal); int jbd2_trans_will_send_data_barrier(journal_t *journal, tid_t tid); void __jbd2_log_wait_for_space(journal_t *journal); extern void __jbd2_journal_drop_transaction(journal_t *, transaction_t *); extern int jbd2_cleanup_journal_tail(journal_t *); /* Fast commit related APIs */ int jbd2_fc_begin_commit(journal_t *journal, tid_t tid); int jbd2_fc_end_commit(journal_t *journal); int jbd2_fc_end_commit_fallback(journal_t *journal); int jbd2_fc_get_buf(journal_t *journal, struct buffer_head **bh_out); int jbd2_submit_inode_data(struct jbd2_inode *jinode); int jbd2_wait_inode_data(journal_t *journal, struct jbd2_inode *jinode); int jbd2_fc_wait_bufs(journal_t *journal, int num_blks); int jbd2_fc_release_bufs(journal_t *journal); /* * is_journal_abort * * Simple test wrapper function to test the JBD2_ABORT state flag. This * bit, when set, indicates that we have had a fatal error somewhere, * either inside the journaling layer or indicated to us by the client * (eg. ext3), and that we and should not commit any further * transactions. */ static inline int is_journal_aborted(journal_t *journal) { return journal->j_flags & JBD2_ABORT; } static inline int is_handle_aborted(handle_t *handle) { if (handle->h_aborted || !handle->h_transaction) return 1; return is_journal_aborted(handle->h_transaction->t_journal); } static inline void jbd2_journal_abort_handle(handle_t *handle) { handle->h_aborted = 1; } #endif /* __KERNEL__ */ /* Comparison functions for transaction IDs: perform comparisons using * modulo arithmetic so that they work over sequence number wraps. */ static inline int tid_gt(tid_t x, tid_t y) { int difference = (x - y); return (difference > 0); } static inline int tid_geq(tid_t x, tid_t y) { int difference = (x - y); return (difference >= 0); } extern int jbd2_journal_blocks_per_page(struct inode *inode); extern size_t journal_tag_bytes(journal_t *journal); static inline bool jbd2_journal_has_csum_v2or3_feature(journal_t *j) { return jbd2_has_feature_csum2(j) || jbd2_has_feature_csum3(j); } static inline int jbd2_journal_has_csum_v2or3(journal_t *journal) { WARN_ON_ONCE(jbd2_journal_has_csum_v2or3_feature(journal) && journal->j_chksum_driver == NULL); return journal->j_chksum_driver != NULL; } static inline int jbd2_journal_get_num_fc_blks(journal_superblock_t *jsb) { int num_fc_blocks = be32_to_cpu(jsb->s_num_fc_blks); return num_fc_blocks ? num_fc_blocks : JBD2_DEFAULT_FAST_COMMIT_BLOCKS; } /* * Return number of free blocks in the log. Must be called under j_state_lock. */ static inline unsigned long jbd2_log_space_left(journal_t *journal) { /* Allow for rounding errors */ long free = journal->j_free - 32; if (journal->j_committing_transaction) { free -= atomic_read(&journal-> j_committing_transaction->t_outstanding_credits); } return max_t(long, free, 0); } /* * Definitions which augment the buffer_head layer */ /* journaling buffer types */ #define BJ_None 0 /* Not journaled */ #define BJ_Metadata 1 /* Normal journaled metadata */ #define BJ_Forget 2 /* Buffer superseded by this transaction */ #define BJ_Shadow 3 /* Buffer contents being shadowed to the log */ #define BJ_Reserved 4 /* Buffer is reserved for access by journal */ #define BJ_Types 5 extern int jbd_blocks_per_page(struct inode *inode); /* JBD uses a CRC32 checksum */ #define JBD_MAX_CHECKSUM_SIZE 4 static inline u32 jbd2_chksum(journal_t *journal, u32 crc, const void *address, unsigned int length) { struct { struct shash_desc shash; char ctx[JBD_MAX_CHECKSUM_SIZE]; } desc; int err; BUG_ON(crypto_shash_descsize(journal->j_chksum_driver) > JBD_MAX_CHECKSUM_SIZE); desc.shash.tfm = journal->j_chksum_driver; *(u32 *)desc.ctx = crc; err = crypto_shash_update(&desc.shash, address, length); BUG_ON(err); return *(u32 *)desc.ctx; } /* Return most recent uncommitted transaction */ static inline tid_t jbd2_get_latest_transaction(journal_t *journal) { tid_t tid; read_lock(&journal->j_state_lock); tid = journal->j_commit_request; if (journal->j_running_transaction) tid = journal->j_running_transaction->t_tid; read_unlock(&journal->j_state_lock); return tid; } static inline int jbd2_handle_buffer_credits(handle_t *handle) { journal_t *journal; if (!handle->h_reserved) journal = handle->h_transaction->t_journal; else journal = handle->h_journal; return handle->h_total_credits - DIV_ROUND_UP(handle->h_revoke_credits_requested, journal->j_revoke_records_per_block); } #ifdef __KERNEL__ #define buffer_trace_init(bh) do {} while (0) #define print_buffer_fields(bh) do {} while (0) #define print_buffer_trace(bh) do {} while (0) #define BUFFER_TRACE(bh, info) do {} while (0) #define BUFFER_TRACE2(bh, bh2, info) do {} while (0) #define JBUFFER_TRACE(jh, info) do {} while (0) #endif /* __KERNEL__ */ #define EFSBADCRC EBADMSG /* Bad CRC detected */ #define EFSCORRUPTED EUCLEAN /* Filesystem is corrupted */ #endif /* _LINUX_JBD2_H */ PK ! ��۫ ۫ filter.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Linux Socket Filter Data Structures */ #ifndef __LINUX_FILTER_H__ #define __LINUX_FILTER_H__ #include <linux/atomic.h> #include <linux/refcount.h> #include <linux/compat.h> #include <linux/skbuff.h> #include <linux/linkage.h> #include <linux/printk.h> #include <linux/workqueue.h> #include <linux/sched.h> #include <linux/capability.h> #include <linux/set_memory.h> #include <linux/kallsyms.h> #include <linux/if_vlan.h> #include <linux/vmalloc.h> #include <linux/sockptr.h> #include <crypto/sha1.h> #include <linux/u64_stats_sync.h> #include <net/sch_generic.h> #include <asm/byteorder.h> #include <uapi/linux/filter.h> #include <uapi/linux/bpf.h> struct sk_buff; struct sock; struct seccomp_data; struct bpf_prog_aux; struct xdp_rxq_info; struct xdp_buff; struct sock_reuseport; struct ctl_table; struct ctl_table_header; /* ArgX, context and stack frame pointer register positions. Note, * Arg1, Arg2, Arg3, etc are used as argument mappings of function * calls in BPF_CALL instruction. */ #define BPF_REG_ARG1 BPF_REG_1 #define BPF_REG_ARG2 BPF_REG_2 #define BPF_REG_ARG3 BPF_REG_3 #define BPF_REG_ARG4 BPF_REG_4 #define BPF_REG_ARG5 BPF_REG_5 #define BPF_REG_CTX BPF_REG_6 #define BPF_REG_FP BPF_REG_10 /* Additional register mappings for converted user programs. */ #define BPF_REG_A BPF_REG_0 #define BPF_REG_X BPF_REG_7 #define BPF_REG_TMP BPF_REG_2 /* scratch reg */ #define BPF_REG_D BPF_REG_8 /* data, callee-saved */ #define BPF_REG_H BPF_REG_9 /* hlen, callee-saved */ /* Kernel hidden auxiliary/helper register. */ #define BPF_REG_AX MAX_BPF_REG #define MAX_BPF_EXT_REG (MAX_BPF_REG + 1) #define MAX_BPF_JIT_REG MAX_BPF_EXT_REG /* unused opcode to mark special call to bpf_tail_call() helper */ #define BPF_TAIL_CALL 0xf0 /* unused opcode to mark special load instruction. Same as BPF_ABS */ #define BPF_PROBE_MEM 0x20 /* unused opcode to mark call to interpreter with arguments */ #define BPF_CALL_ARGS 0xe0 /* unused opcode to mark speculation barrier for mitigating * Speculative Store Bypass */ #define BPF_NOSPEC 0xc0 /* As per nm, we expose JITed images as text (code) section for * kallsyms. That way, tools like perf can find it to match * addresses. */ #define BPF_SYM_ELF_TYPE 't' /* BPF program can access up to 512 bytes of stack space. */ #define MAX_BPF_STACK 512 /* Helper macros for filter block array initializers. */ /* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */ #define BPF_ALU64_REG(OP, DST, SRC) \ ((struct bpf_insn) { \ .code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = 0 }) #define BPF_ALU32_REG(OP, DST, SRC) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_OP(OP) | BPF_X, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = 0 }) /* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */ #define BPF_ALU64_IMM(OP, DST, IMM) \ ((struct bpf_insn) { \ .code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \ .dst_reg = DST, \ .src_reg = 0, \ .off = 0, \ .imm = IMM }) #define BPF_ALU32_IMM(OP, DST, IMM) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_OP(OP) | BPF_K, \ .dst_reg = DST, \ .src_reg = 0, \ .off = 0, \ .imm = IMM }) /* Endianess conversion, cpu_to_{l,b}e(), {l,b}e_to_cpu() */ #define BPF_ENDIAN(TYPE, DST, LEN) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_END | BPF_SRC(TYPE), \ .dst_reg = DST, \ .src_reg = 0, \ .off = 0, \ .imm = LEN }) /* Short form of mov, dst_reg = src_reg */ #define BPF_MOV64_REG(DST, SRC) \ ((struct bpf_insn) { \ .code = BPF_ALU64 | BPF_MOV | BPF_X, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = 0 }) #define BPF_MOV32_REG(DST, SRC) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_MOV | BPF_X, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = 0 }) /* Short form of mov, dst_reg = imm32 */ #define BPF_MOV64_IMM(DST, IMM) \ ((struct bpf_insn) { \ .code = BPF_ALU64 | BPF_MOV | BPF_K, \ .dst_reg = DST, \ .src_reg = 0, \ .off = 0, \ .imm = IMM }) #define BPF_MOV32_IMM(DST, IMM) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_MOV | BPF_K, \ .dst_reg = DST, \ .src_reg = 0, \ .off = 0, \ .imm = IMM }) /* Special form of mov32, used for doing explicit zero extension on dst. */ #define BPF_ZEXT_REG(DST) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_MOV | BPF_X, \ .dst_reg = DST, \ .src_reg = DST, \ .off = 0, \ .imm = 1 }) static inline bool insn_is_zext(const struct bpf_insn *insn) { return insn->code == (BPF_ALU | BPF_MOV | BPF_X) && insn->imm == 1; } /* BPF_LD_IMM64 macro encodes single 'load 64-bit immediate' insn */ #define BPF_LD_IMM64(DST, IMM) \ BPF_LD_IMM64_RAW(DST, 0, IMM) #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \ ((struct bpf_insn) { \ .code = BPF_LD | BPF_DW | BPF_IMM, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = (__u32) (IMM) }), \ ((struct bpf_insn) { \ .code = 0, /* zero is reserved opcode */ \ .dst_reg = 0, \ .src_reg = 0, \ .off = 0, \ .imm = ((__u64) (IMM)) >> 32 }) /* pseudo BPF_LD_IMM64 insn used to refer to process-local map_fd */ #define BPF_LD_MAP_FD(DST, MAP_FD) \ BPF_LD_IMM64_RAW(DST, BPF_PSEUDO_MAP_FD, MAP_FD) /* Short form of mov based on type, BPF_X: dst_reg = src_reg, BPF_K: dst_reg = imm32 */ #define BPF_MOV64_RAW(TYPE, DST, SRC, IMM) \ ((struct bpf_insn) { \ .code = BPF_ALU64 | BPF_MOV | BPF_SRC(TYPE), \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = IMM }) #define BPF_MOV32_RAW(TYPE, DST, SRC, IMM) \ ((struct bpf_insn) { \ .code = BPF_ALU | BPF_MOV | BPF_SRC(TYPE), \ .dst_reg = DST, \ .src_reg = SRC, \ .off = 0, \ .imm = IMM }) /* Direct packet access, R0 = *(uint *) (skb->data + imm32) */ #define BPF_LD_ABS(SIZE, IMM) \ ((struct bpf_insn) { \ .code = BPF_LD | BPF_SIZE(SIZE) | BPF_ABS, \ .dst_reg = 0, \ .src_reg = 0, \ .off = 0, \ .imm = IMM }) /* Indirect packet access, R0 = *(uint *) (skb->data + src_reg + imm32) */ #define BPF_LD_IND(SIZE, SRC, IMM) \ ((struct bpf_insn) { \ .code = BPF_LD | BPF_SIZE(SIZE) | BPF_IND, \ .dst_reg = 0, \ .src_reg = SRC, \ .off = 0, \ .imm = IMM }) /* Memory load, dst_reg = *(uint *) (src_reg + off16) */ #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \ ((struct bpf_insn) { \ .code = BPF_LDX | BPF_SIZE(SIZE) | BPF_MEM, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = OFF, \ .imm = 0 }) /* Memory store, *(uint *) (dst_reg + off16) = src_reg */ #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \ ((struct bpf_insn) { \ .code = BPF_STX | BPF_SIZE(SIZE) | BPF_MEM, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = OFF, \ .imm = 0 }) /* * Atomic operations: * * BPF_ADD *(uint *) (dst_reg + off16) += src_reg * BPF_AND *(uint *) (dst_reg + off16) &= src_reg * BPF_OR *(uint *) (dst_reg + off16) |= src_reg * BPF_XOR *(uint *) (dst_reg + off16) ^= src_reg * BPF_ADD | BPF_FETCH src_reg = atomic_fetch_add(dst_reg + off16, src_reg); * BPF_AND | BPF_FETCH src_reg = atomic_fetch_and(dst_reg + off16, src_reg); * BPF_OR | BPF_FETCH src_reg = atomic_fetch_or(dst_reg + off16, src_reg); * BPF_XOR | BPF_FETCH src_reg = atomic_fetch_xor(dst_reg + off16, src_reg); * BPF_XCHG src_reg = atomic_xchg(dst_reg + off16, src_reg) * BPF_CMPXCHG r0 = atomic_cmpxchg(dst_reg + off16, r0, src_reg) */ #define BPF_ATOMIC_OP(SIZE, OP, DST, SRC, OFF) \ ((struct bpf_insn) { \ .code = BPF_STX | BPF_SIZE(SIZE) | BPF_ATOMIC, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = OFF, \ .imm = OP }) /* Legacy alias */ #define BPF_STX_XADD(SIZE, DST, SRC, OFF) BPF_ATOMIC_OP(SIZE, BPF_ADD, DST, SRC, OFF) /* Memory store, *(uint *) (dst_reg + off16) = imm32 */ #define BPF_ST_MEM(SIZE, DST, OFF, IMM) \ ((struct bpf_insn) { \ .code = BPF_ST | BPF_SIZE(SIZE) | BPF_MEM, \ .dst_reg = DST, \ .src_reg = 0, \ .off = OFF, \ .imm = IMM }) /* Conditional jumps against registers, if (dst_reg 'op' src_reg) goto pc + off16 */ #define BPF_JMP_REG(OP, DST, SRC, OFF) \ ((struct bpf_insn) { \ .code = BPF_JMP | BPF_OP(OP) | BPF_X, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = OFF, \ .imm = 0 }) /* Conditional jumps against immediates, if (dst_reg 'op' imm32) goto pc + off16 */ #define BPF_JMP_IMM(OP, DST, IMM, OFF) \ ((struct bpf_insn) { \ .code = BPF_JMP | BPF_OP(OP) | BPF_K, \ .dst_reg = DST, \ .src_reg = 0, \ .off = OFF, \ .imm = IMM }) /* Like BPF_JMP_REG, but with 32-bit wide operands for comparison. */ #define BPF_JMP32_REG(OP, DST, SRC, OFF) \ ((struct bpf_insn) { \ .code = BPF_JMP32 | BPF_OP(OP) | BPF_X, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = OFF, \ .imm = 0 }) /* Like BPF_JMP_IMM, but with 32-bit wide operands for comparison. */ #define BPF_JMP32_IMM(OP, DST, IMM, OFF) \ ((struct bpf_insn) { \ .code = BPF_JMP32 | BPF_OP(OP) | BPF_K, \ .dst_reg = DST, \ .src_reg = 0, \ .off = OFF, \ .imm = IMM }) /* Unconditional jumps, goto pc + off16 */ #define BPF_JMP_A(OFF) \ ((struct bpf_insn) { \ .code = BPF_JMP | BPF_JA, \ .dst_reg = 0, \ .src_reg = 0, \ .off = OFF, \ .imm = 0 }) /* Relative call */ #define BPF_CALL_REL(TGT) \ ((struct bpf_insn) { \ .code = BPF_JMP | BPF_CALL, \ .dst_reg = 0, \ .src_reg = BPF_PSEUDO_CALL, \ .off = 0, \ .imm = TGT }) /* Function call */ #define BPF_CAST_CALL(x) \ ((u64 (*)(u64, u64, u64, u64, u64))(x)) #define BPF_EMIT_CALL(FUNC) \ ((struct bpf_insn) { \ .code = BPF_JMP | BPF_CALL, \ .dst_reg = 0, \ .src_reg = 0, \ .off = 0, \ .imm = ((FUNC) - __bpf_call_base) }) /* Raw code statement block */ #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \ ((struct bpf_insn) { \ .code = CODE, \ .dst_reg = DST, \ .src_reg = SRC, \ .off = OFF, \ .imm = IMM }) /* Program exit */ #define BPF_EXIT_INSN() \ ((struct bpf_insn) { \ .code = BPF_JMP | BPF_EXIT, \ .dst_reg = 0, \ .src_reg = 0, \ .off = 0, \ .imm = 0 }) /* Speculation barrier */ #define BPF_ST_NOSPEC() \ ((struct bpf_insn) { \ .code = BPF_ST | BPF_NOSPEC, \ .dst_reg = 0, \ .src_reg = 0, \ .off = 0, \ .imm = 0 }) /* Internal classic blocks for direct assignment */ #define __BPF_STMT(CODE, K) \ ((struct sock_filter) BPF_STMT(CODE, K)) #define __BPF_JUMP(CODE, K, JT, JF) \ ((struct sock_filter) BPF_JUMP(CODE, K, JT, JF)) #define bytes_to_bpf_size(bytes) \ ({ \ int bpf_size = -EINVAL; \ \ if (bytes == sizeof(u8)) \ bpf_size = BPF_B; \ else if (bytes == sizeof(u16)) \ bpf_size = BPF_H; \ else if (bytes == sizeof(u32)) \ bpf_size = BPF_W; \ else if (bytes == sizeof(u64)) \ bpf_size = BPF_DW; \ \ bpf_size; \ }) #define bpf_size_to_bytes(bpf_size) \ ({ \ int bytes = -EINVAL; \ \ if (bpf_size == BPF_B) \ bytes = sizeof(u8); \ else if (bpf_size == BPF_H) \ bytes = sizeof(u16); \ else if (bpf_size == BPF_W) \ bytes = sizeof(u32); \ else if (bpf_size == BPF_DW) \ bytes = sizeof(u64); \ \ bytes; \ }) #define BPF_SIZEOF(type) \ ({ \ const int __size = bytes_to_bpf_size(sizeof(type)); \ BUILD_BUG_ON(__size < 0); \ __size; \ }) #define BPF_FIELD_SIZEOF(type, field) \ ({ \ const int __size = bytes_to_bpf_size(sizeof_field(type, field)); \ BUILD_BUG_ON(__size < 0); \ __size; \ }) #define BPF_LDST_BYTES(insn) \ ({ \ const int __size = bpf_size_to_bytes(BPF_SIZE((insn)->code)); \ WARN_ON(__size < 0); \ __size; \ }) #define __BPF_MAP_0(m, v, ...) v #define __BPF_MAP_1(m, v, t, a, ...) m(t, a) #define __BPF_MAP_2(m, v, t, a, ...) m(t, a), __BPF_MAP_1(m, v, __VA_ARGS__) #define __BPF_MAP_3(m, v, t, a, ...) m(t, a), __BPF_MAP_2(m, v, __VA_ARGS__) #define __BPF_MAP_4(m, v, t, a, ...) m(t, a), __BPF_MAP_3(m, v, __VA_ARGS__) #define __BPF_MAP_5(m, v, t, a, ...) m(t, a), __BPF_MAP_4(m, v, __VA_ARGS__) #define __BPF_REG_0(...) __BPF_PAD(5) #define __BPF_REG_1(...) __BPF_MAP(1, __VA_ARGS__), __BPF_PAD(4) #define __BPF_REG_2(...) __BPF_MAP(2, __VA_ARGS__), __BPF_PAD(3) #define __BPF_REG_3(...) __BPF_MAP(3, __VA_ARGS__), __BPF_PAD(2) #define __BPF_REG_4(...) __BPF_MAP(4, __VA_ARGS__), __BPF_PAD(1) #define __BPF_REG_5(...) __BPF_MAP(5, __VA_ARGS__) #define __BPF_MAP(n, ...) __BPF_MAP_##n(__VA_ARGS__) #define __BPF_REG(n, ...) __BPF_REG_##n(__VA_ARGS__) #define __BPF_CAST(t, a) \ (__force t) \ (__force \ typeof(__builtin_choose_expr(sizeof(t) == sizeof(unsigned long), \ (unsigned long)0, (t)0))) a #define __BPF_V void #define __BPF_N #define __BPF_DECL_ARGS(t, a) t a #define __BPF_DECL_REGS(t, a) u64 a #define __BPF_PAD(n) \ __BPF_MAP(n, __BPF_DECL_ARGS, __BPF_N, u64, __ur_1, u64, __ur_2, \ u64, __ur_3, u64, __ur_4, u64, __ur_5) #define BPF_CALL_x(x, attr, name, ...) \ static __always_inline \ u64 ____##name(__BPF_MAP(x, __BPF_DECL_ARGS, __BPF_V, __VA_ARGS__)); \ typedef u64 (*btf_##name)(__BPF_MAP(x, __BPF_DECL_ARGS, __BPF_V, __VA_ARGS__)); \ attr u64 name(__BPF_REG(x, __BPF_DECL_REGS, __BPF_N, __VA_ARGS__)); \ attr u64 name(__BPF_REG(x, __BPF_DECL_REGS, __BPF_N, __VA_ARGS__)) \ { \ return ((btf_##name)____##name)(__BPF_MAP(x,__BPF_CAST,__BPF_N,__VA_ARGS__));\ } \ static __always_inline \ u64 ____##name(__BPF_MAP(x, __BPF_DECL_ARGS, __BPF_V, __VA_ARGS__)) #define __NOATTR #define BPF_CALL_0(name, ...) BPF_CALL_x(0, __NOATTR, name, __VA_ARGS__) #define BPF_CALL_1(name, ...) BPF_CALL_x(1, __NOATTR, name, __VA_ARGS__) #define BPF_CALL_2(name, ...) BPF_CALL_x(2, __NOATTR, name, __VA_ARGS__) #define BPF_CALL_3(name, ...) BPF_CALL_x(3, __NOATTR, name, __VA_ARGS__) #define BPF_CALL_4(name, ...) BPF_CALL_x(4, __NOATTR, name, __VA_ARGS__) #define BPF_CALL_5(name, ...) BPF_CALL_x(5, __NOATTR, name, __VA_ARGS__) #define NOTRACE_BPF_CALL_1(name, ...) BPF_CALL_x(1, notrace, name, __VA_ARGS__) #define bpf_ctx_range(TYPE, MEMBER) \ offsetof(TYPE, MEMBER) ... offsetofend(TYPE, MEMBER) - 1 #define bpf_ctx_range_till(TYPE, MEMBER1, MEMBER2) \ offsetof(TYPE, MEMBER1) ... offsetofend(TYPE, MEMBER2) - 1 #if BITS_PER_LONG == 64 # define bpf_ctx_range_ptr(TYPE, MEMBER) \ offsetof(TYPE, MEMBER) ... offsetofend(TYPE, MEMBER) - 1 #else # define bpf_ctx_range_ptr(TYPE, MEMBER) \ offsetof(TYPE, MEMBER) ... offsetof(TYPE, MEMBER) + 8 - 1 #endif /* BITS_PER_LONG == 64 */ #define bpf_target_off(TYPE, MEMBER, SIZE, PTR_SIZE) \ ({ \ BUILD_BUG_ON(sizeof_field(TYPE, MEMBER) != (SIZE)); \ *(PTR_SIZE) = (SIZE); \ offsetof(TYPE, MEMBER); \ }) /* A struct sock_filter is architecture independent. */ struct compat_sock_fprog { u16 len; compat_uptr_t filter; /* struct sock_filter * */ }; struct sock_fprog_kern { u16 len; struct sock_filter *filter; }; /* Some arches need doubleword alignment for their instructions and/or data */ #define BPF_IMAGE_ALIGNMENT 8 struct bpf_binary_header { u32 pages; u8 image[] __aligned(BPF_IMAGE_ALIGNMENT); }; struct bpf_prog_stats { u64_stats_t cnt; u64_stats_t nsecs; u64_stats_t misses; struct u64_stats_sync syncp; } __aligned(2 * sizeof(u64)); struct bpf_prog { u16 pages; /* Number of allocated pages */ u16 jited:1, /* Is our filter JIT'ed? */ jit_requested:1,/* archs need to JIT the prog */ gpl_compatible:1, /* Is filter GPL compatible? */ cb_access:1, /* Is control block accessed? */ dst_needed:1, /* Do we need dst entry? */ blinded:1, /* Was blinded */ is_func:1, /* program is a bpf function */ kprobe_override:1, /* Do we override a kprobe? */ has_callchain_buf:1, /* callchain buffer allocated? */ enforce_expected_attach_type:1, /* Enforce expected_attach_type checking at attach time */ call_get_stack:1, /* Do we call bpf_get_stack() or bpf_get_stackid() */ call_get_func_ip:1; /* Do we call get_func_ip() */ enum bpf_prog_type type; /* Type of BPF program */ enum bpf_attach_type expected_attach_type; /* For some prog types */ u32 len; /* Number of filter blocks */ u32 jited_len; /* Size of jited insns in bytes */ u8 tag[BPF_TAG_SIZE]; struct bpf_prog_stats __percpu *stats; int __percpu *active; unsigned int (*bpf_func)(const void *ctx, const struct bpf_insn *insn); struct bpf_prog_aux *aux; /* Auxiliary fields */ struct sock_fprog_kern *orig_prog; /* Original BPF program */ /* Instructions for interpreter */ struct sock_filter insns[0]; struct bpf_insn insnsi[]; }; struct sk_filter { refcount_t refcnt; struct rcu_head rcu; struct bpf_prog *prog; }; DECLARE_STATIC_KEY_FALSE(bpf_stats_enabled_key); typedef unsigned int (*bpf_dispatcher_fn)(const void *ctx, const struct bpf_insn *insnsi, unsigned int (*bpf_func)(const void *, const struct bpf_insn *)); static __always_inline u32 __bpf_prog_run(const struct bpf_prog *prog, const void *ctx, bpf_dispatcher_fn dfunc) { u32 ret; cant_migrate(); if (static_branch_unlikely(&bpf_stats_enabled_key)) { struct bpf_prog_stats *stats; u64 start = sched_clock(); unsigned long flags; ret = dfunc(ctx, prog->insnsi, prog->bpf_func); stats = this_cpu_ptr(prog->stats); flags = u64_stats_update_begin_irqsave(&stats->syncp); u64_stats_inc(&stats->cnt); u64_stats_add(&stats->nsecs, sched_clock() - start); u64_stats_update_end_irqrestore(&stats->syncp, flags); } else { ret = dfunc(ctx, prog->insnsi, prog->bpf_func); } return ret; } static __always_inline u32 bpf_prog_run(const struct bpf_prog *prog, const void *ctx) { return __bpf_prog_run(prog, ctx, bpf_dispatcher_nop_func); } /* * Use in preemptible and therefore migratable context to make sure that * the execution of the BPF program runs on one CPU. * * This uses migrate_disable/enable() explicitly to document that the * invocation of a BPF program does not require reentrancy protection * against a BPF program which is invoked from a preempting task. */ static inline u32 bpf_prog_run_pin_on_cpu(const struct bpf_prog *prog, const void *ctx) { u32 ret; migrate_disable(); ret = bpf_prog_run(prog, ctx); migrate_enable(); return ret; } #define BPF_SKB_CB_LEN QDISC_CB_PRIV_LEN struct bpf_skb_data_end { struct qdisc_skb_cb qdisc_cb; void *data_meta; void *data_end; }; struct bpf_nh_params { u32 nh_family; union { u32 ipv4_nh; struct in6_addr ipv6_nh; }; }; struct bpf_redirect_info { u32 flags; u32 tgt_index; void *tgt_value; struct bpf_map *map; u32 map_id; enum bpf_map_type map_type; u32 kern_flags; struct bpf_nh_params nh; }; DECLARE_PER_CPU(struct bpf_redirect_info, bpf_redirect_info); /* flags for bpf_redirect_info kern_flags */ #define BPF_RI_F_RF_NO_DIRECT BIT(0) /* no napi_direct on return_frame */ /* Compute the linear packet data range [data, data_end) which * will be accessed by various program types (cls_bpf, act_bpf, * lwt, ...). Subsystems allowing direct data access must (!) * ensure that cb[] area can be written to when BPF program is * invoked (otherwise cb[] save/restore is necessary). */ static inline void bpf_compute_data_pointers(struct sk_buff *skb) { struct bpf_skb_data_end *cb = (struct bpf_skb_data_end *)skb->cb; BUILD_BUG_ON(sizeof(*cb) > sizeof_field(struct sk_buff, cb)); cb->data_meta = skb->data - skb_metadata_len(skb); cb->data_end = skb->data + skb_headlen(skb); } static inline int bpf_prog_run_data_pointers( const struct bpf_prog *prog, struct sk_buff *skb) { struct bpf_skb_data_end *cb = (struct bpf_skb_data_end *)skb->cb; void *save_data_meta, *save_data_end; int res; save_data_meta = cb->data_meta; save_data_end = cb->data_end; bpf_compute_data_pointers(skb); res = bpf_prog_run(prog, skb); cb->data_meta = save_data_meta; cb->data_end = save_data_end; return res; } /* Similar to bpf_compute_data_pointers(), except that save orginal * data in cb->data and cb->meta_data for restore. */ static inline void bpf_compute_and_save_data_end( struct sk_buff *skb, void **saved_data_end) { struct bpf_skb_data_end *cb = (struct bpf_skb_data_end *)skb->cb; *saved_data_end = cb->data_end; cb->data_end = skb->data + skb_headlen(skb); } /* Restore data saved by bpf_compute_data_pointers(). */ static inline void bpf_restore_data_end( struct sk_buff *skb, void *saved_data_end) { struct bpf_skb_data_end *cb = (struct bpf_skb_data_end *)skb->cb; cb->data_end = saved_data_end; } static inline u8 *bpf_skb_cb(const struct sk_buff *skb) { /* eBPF programs may read/write skb->cb[] area to transfer meta * data between tail calls. Since this also needs to work with * tc, that scratch memory is mapped to qdisc_skb_cb's data area. * * In some socket filter cases, the cb unfortunately needs to be * saved/restored so that protocol specific skb->cb[] data won't * be lost. In any case, due to unpriviledged eBPF programs * attached to sockets, we need to clear the bpf_skb_cb() area * to not leak previous contents to user space. */ BUILD_BUG_ON(sizeof_field(struct __sk_buff, cb) != BPF_SKB_CB_LEN); BUILD_BUG_ON(sizeof_field(struct __sk_buff, cb) != sizeof_field(struct qdisc_skb_cb, data)); return qdisc_skb_cb(skb)->data; } /* Must be invoked with migration disabled */ static inline u32 __bpf_prog_run_save_cb(const struct bpf_prog *prog, const void *ctx) { const struct sk_buff *skb = ctx; u8 *cb_data = bpf_skb_cb(skb); u8 cb_saved[BPF_SKB_CB_LEN]; u32 res; if (unlikely(prog->cb_access)) { memcpy(cb_saved, cb_data, sizeof(cb_saved)); memset(cb_data, 0, sizeof(cb_saved)); } res = bpf_prog_run(prog, skb); if (unlikely(prog->cb_access)) memcpy(cb_data, cb_saved, sizeof(cb_saved)); return res; } static inline u32 bpf_prog_run_save_cb(const struct bpf_prog *prog, struct sk_buff *skb) { u32 res; migrate_disable(); res = __bpf_prog_run_save_cb(prog, skb); migrate_enable(); return res; } static inline u32 bpf_prog_run_clear_cb(const struct bpf_prog *prog, struct sk_buff *skb) { u8 *cb_data = bpf_skb_cb(skb); u32 res; if (unlikely(prog->cb_access)) memset(cb_data, 0, BPF_SKB_CB_LEN); res = bpf_prog_run_pin_on_cpu(prog, skb); return res; } DECLARE_BPF_DISPATCHER(xdp) DECLARE_STATIC_KEY_FALSE(bpf_master_redirect_enabled_key); u32 xdp_master_redirect(struct xdp_buff *xdp); static __always_inline u32 bpf_prog_run_xdp(const struct bpf_prog *prog, struct xdp_buff *xdp) { /* Driver XDP hooks are invoked within a single NAPI poll cycle and thus * under local_bh_disable(), which provides the needed RCU protection * for accessing map entries. */ struct bpf_redirect_info *ri = this_cpu_ptr(&bpf_redirect_info); u32 act; if (ri->map_id || ri->map_type) { ri->map_id = 0; ri->map_type = BPF_MAP_TYPE_UNSPEC; } act = __bpf_prog_run(prog, xdp, BPF_DISPATCHER_FUNC(xdp)); if (static_branch_unlikely(&bpf_master_redirect_enabled_key)) { if (act == XDP_TX && netif_is_bond_slave(xdp->rxq->dev)) act = xdp_master_redirect(xdp); } return act; } void bpf_prog_change_xdp(struct bpf_prog *prev_prog, struct bpf_prog *prog); static inline u32 bpf_prog_insn_size(const struct bpf_prog *prog) { return prog->len * sizeof(struct bpf_insn); } static inline u32 bpf_prog_tag_scratch_size(const struct bpf_prog *prog) { return round_up(bpf_prog_insn_size(prog) + sizeof(__be64) + 1, SHA1_BLOCK_SIZE); } static inline unsigned int bpf_prog_size(unsigned int proglen) { return max(sizeof(struct bpf_prog), offsetof(struct bpf_prog, insns[proglen])); } static inline bool bpf_prog_was_classic(const struct bpf_prog *prog) { /* When classic BPF programs have been loaded and the arch * does not have a classic BPF JIT (anymore), they have been * converted via bpf_migrate_filter() to eBPF and thus always * have an unspec program type. */ return prog->type == BPF_PROG_TYPE_UNSPEC; } static inline u32 bpf_ctx_off_adjust_machine(u32 size) { const u32 size_machine = sizeof(unsigned long); if (size > size_machine && size % size_machine == 0) size = size_machine; return size; } static inline bool bpf_ctx_narrow_access_ok(u32 off, u32 size, u32 size_default) { return size <= size_default && (size & (size - 1)) == 0; } static inline u8 bpf_ctx_narrow_access_offset(u32 off, u32 size, u32 size_default) { u8 access_off = off & (size_default - 1); #ifdef __LITTLE_ENDIAN return access_off; #else return size_default - (access_off + size); #endif } #define bpf_ctx_wide_access_ok(off, size, type, field) \ (size == sizeof(__u64) && \ off >= offsetof(type, field) && \ off + sizeof(__u64) <= offsetofend(type, field) && \ off % sizeof(__u64) == 0) #define bpf_classic_proglen(fprog) (fprog->len * sizeof(fprog->filter[0])) static inline int __must_check bpf_prog_lock_ro(struct bpf_prog *fp) { #ifndef CONFIG_BPF_JIT_ALWAYS_ON if (!fp->jited) { set_vm_flush_reset_perms(fp); return set_memory_ro((unsigned long)fp, fp->pages); } #endif return 0; } static inline void bpf_jit_binary_lock_ro(struct bpf_binary_header *hdr) { set_vm_flush_reset_perms(hdr); set_memory_ro((unsigned long)hdr, hdr->pages); set_memory_x((unsigned long)hdr, hdr->pages); } static inline struct bpf_binary_header * bpf_jit_binary_hdr(const struct bpf_prog *fp) { unsigned long real_start = (unsigned long)fp->bpf_func; unsigned long addr = real_start & PAGE_MASK; return (void *)addr; } int sk_filter_trim_cap(struct sock *sk, struct sk_buff *skb, unsigned int cap); static inline int sk_filter(struct sock *sk, struct sk_buff *skb) { return sk_filter_trim_cap(sk, skb, 1); } struct bpf_prog *bpf_prog_select_runtime(struct bpf_prog *fp, int *err); void bpf_prog_free(struct bpf_prog *fp); bool bpf_opcode_in_insntable(u8 code); void bpf_prog_free_linfo(struct bpf_prog *prog); void bpf_prog_fill_jited_linfo(struct bpf_prog *prog, const u32 *insn_to_jit_off); int bpf_prog_alloc_jited_linfo(struct bpf_prog *prog); void bpf_prog_jit_attempt_done(struct bpf_prog *prog); struct bpf_prog *bpf_prog_alloc(unsigned int size, gfp_t gfp_extra_flags); struct bpf_prog *bpf_prog_alloc_no_stats(unsigned int size, gfp_t gfp_extra_flags); struct bpf_prog *bpf_prog_realloc(struct bpf_prog *fp_old, unsigned int size, gfp_t gfp_extra_flags); void __bpf_prog_free(struct bpf_prog *fp); static inline void bpf_prog_unlock_free(struct bpf_prog *fp) { __bpf_prog_free(fp); } typedef int (*bpf_aux_classic_check_t)(struct sock_filter *filter, unsigned int flen); int bpf_prog_create(struct bpf_prog **pfp, struct sock_fprog_kern *fprog); int bpf_prog_create_from_user(struct bpf_prog **pfp, struct sock_fprog *fprog, bpf_aux_classic_check_t trans, bool save_orig); void bpf_prog_destroy(struct bpf_prog *fp); int sk_attach_filter(struct sock_fprog *fprog, struct sock *sk); int sk_attach_bpf(u32 ufd, struct sock *sk); int sk_reuseport_attach_filter(struct sock_fprog *fprog, struct sock *sk); int sk_reuseport_attach_bpf(u32 ufd, struct sock *sk); void sk_reuseport_prog_free(struct bpf_prog *prog); int sk_detach_filter(struct sock *sk); int sk_get_filter(struct sock *sk, sockptr_t optval, unsigned int len); bool sk_filter_charge(struct sock *sk, struct sk_filter *fp); void sk_filter_uncharge(struct sock *sk, struct sk_filter *fp); u64 __bpf_call_base(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5); #define __bpf_call_base_args \ ((u64 (*)(u64, u64, u64, u64, u64, const struct bpf_insn *)) \ (void *)__bpf_call_base) struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog); void bpf_jit_compile(struct bpf_prog *prog); bool bpf_jit_needs_zext(void); bool bpf_jit_supports_kfunc_call(void); bool bpf_helper_changes_pkt_data(void *func); static inline bool bpf_dump_raw_ok(const struct cred *cred) { /* Reconstruction of call-sites is dependent on kallsyms, * thus make dump the same restriction. */ return kallsyms_show_value(cred); } struct bpf_prog *bpf_patch_insn_single(struct bpf_prog *prog, u32 off, const struct bpf_insn *patch, u32 len); int bpf_remove_insns(struct bpf_prog *prog, u32 off, u32 cnt); void bpf_clear_redirect_map(struct bpf_map *map); static inline bool xdp_return_frame_no_direct(void) { struct bpf_redirect_info *ri = this_cpu_ptr(&bpf_redirect_info); return ri->kern_flags & BPF_RI_F_RF_NO_DIRECT; } static inline void xdp_set_return_frame_no_direct(void) { struct bpf_redirect_info *ri = this_cpu_ptr(&bpf_redirect_info); ri->kern_flags |= BPF_RI_F_RF_NO_DIRECT; } static inline void xdp_clear_return_frame_no_direct(void) { struct bpf_redirect_info *ri = this_cpu_ptr(&bpf_redirect_info); ri->kern_flags &= ~BPF_RI_F_RF_NO_DIRECT; } static inline int xdp_ok_fwd_dev(const struct net_device *fwd, unsigned int pktlen) { unsigned int len; if (unlikely(!(fwd->flags & IFF_UP))) return -ENETDOWN; len = fwd->mtu + fwd->hard_header_len + VLAN_HLEN; if (pktlen > len) return -EMSGSIZE; return 0; } /* The pair of xdp_do_redirect and xdp_do_flush MUST be called in the * same cpu context. Further for best results no more than a single map * for the do_redirect/do_flush pair should be used. This limitation is * because we only track one map and force a flush when the map changes. * This does not appear to be a real limitation for existing software. */ int xdp_do_generic_redirect(struct net_device *dev, struct sk_buff *skb, struct xdp_buff *xdp, struct bpf_prog *prog); int xdp_do_redirect(struct net_device *dev, struct xdp_buff *xdp, struct bpf_prog *prog); int xdp_do_redirect_frame(struct net_device *dev, struct xdp_buff *xdp, struct xdp_frame *xdpf, struct bpf_prog *prog); void xdp_do_flush(void); /* The xdp_do_flush_map() helper has been renamed to drop the _map suffix, as * it is no longer only flushing maps. Keep this define for compatibility * until all drivers are updated - do not use xdp_do_flush_map() in new code! */ #define xdp_do_flush_map xdp_do_flush void bpf_warn_invalid_xdp_action(u32 act); #ifdef CONFIG_INET struct sock *bpf_run_sk_reuseport(struct sock_reuseport *reuse, struct sock *sk, struct bpf_prog *prog, struct sk_buff *skb, struct sock *migrating_sk, u32 hash); #else static inline struct sock * bpf_run_sk_reuseport(struct sock_reuseport *reuse, struct sock *sk, struct bpf_prog *prog, struct sk_buff *skb, struct sock *migrating_sk, u32 hash) { return NULL; } #endif #ifdef CONFIG_BPF_JIT extern int bpf_jit_enable; extern int bpf_jit_harden; extern int bpf_jit_kallsyms; extern long bpf_jit_limit; extern long bpf_jit_limit_max; typedef void (*bpf_jit_fill_hole_t)(void *area, unsigned int size); struct bpf_binary_header * bpf_jit_binary_alloc(unsigned int proglen, u8 **image_ptr, unsigned int alignment, bpf_jit_fill_hole_t bpf_fill_ill_insns); void bpf_jit_binary_free(struct bpf_binary_header *hdr); u64 bpf_jit_alloc_exec_limit(void); void *bpf_jit_alloc_exec(unsigned long size); void bpf_jit_free_exec(void *addr); void bpf_jit_free(struct bpf_prog *fp); int bpf_jit_add_poke_descriptor(struct bpf_prog *prog, struct bpf_jit_poke_descriptor *poke); int bpf_jit_get_func_addr(const struct bpf_prog *prog, const struct bpf_insn *insn, bool extra_pass, u64 *func_addr, bool *func_addr_fixed); struct bpf_prog *bpf_jit_blind_constants(struct bpf_prog *fp); void bpf_jit_prog_release_other(struct bpf_prog *fp, struct bpf_prog *fp_other); static inline void bpf_jit_dump(unsigned int flen, unsigned int proglen, u32 pass, void *image) { pr_err("flen=%u proglen=%u pass=%u image=%p from=%s pid=%d\n", flen, proglen, pass, image, current->comm, task_pid_nr(current)); if (image) print_hex_dump(KERN_ERR, "JIT code: ", DUMP_PREFIX_OFFSET, 16, 1, image, proglen, false); } static inline bool bpf_jit_is_ebpf(void) { # ifdef CONFIG_HAVE_EBPF_JIT return true; # else return false; # endif } static inline bool ebpf_jit_enabled(void) { return bpf_jit_enable && bpf_jit_is_ebpf(); } static inline bool bpf_prog_ebpf_jited(const struct bpf_prog *fp) { return fp->jited && bpf_jit_is_ebpf(); } static inline bool bpf_jit_blinding_enabled(struct bpf_prog *prog) { /* These are the prerequisites, should someone ever have the * idea to call blinding outside of them, we make sure to * bail out. */ if (!bpf_jit_is_ebpf()) return false; if (!prog->jit_requested) return false; if (!bpf_jit_harden) return false; if (bpf_jit_harden == 1 && capable(CAP_SYS_ADMIN)) return false; return true; } static inline bool bpf_jit_kallsyms_enabled(void) { /* There are a couple of corner cases where kallsyms should * not be enabled f.e. on hardening. */ if (bpf_jit_harden) return false; if (!bpf_jit_kallsyms) return false; if (bpf_jit_kallsyms == 1) return true; return false; } const char *__bpf_address_lookup(unsigned long addr, unsigned long *size, unsigned long *off, char *sym); bool is_bpf_text_address(unsigned long addr); int bpf_get_kallsym(unsigned int symnum, unsigned long *value, char *type, char *sym); static inline const char * bpf_address_lookup(unsigned long addr, unsigned long *size, unsigned long *off, char **modname, char *sym) { const char *ret = __bpf_address_lookup(addr, size, off, sym); if (ret && modname) *modname = NULL; return ret; } void bpf_prog_kallsyms_add(struct bpf_prog *fp); void bpf_prog_kallsyms_del(struct bpf_prog *fp); #else /* CONFIG_BPF_JIT */ static inline bool ebpf_jit_enabled(void) { return false; } static inline bool bpf_jit_blinding_enabled(struct bpf_prog *prog) { return false; } static inline bool bpf_prog_ebpf_jited(const struct bpf_prog *fp) { return false; } static inline int bpf_jit_add_poke_descriptor(struct bpf_prog *prog, struct bpf_jit_poke_descriptor *poke) { return -ENOTSUPP; } static inline void bpf_jit_free(struct bpf_prog *fp) { bpf_prog_unlock_free(fp); } static inline bool bpf_jit_kallsyms_enabled(void) { return false; } static inline const char * __bpf_address_lookup(unsigned long addr, unsigned long *size, unsigned long *off, char *sym) { return NULL; } static inline bool is_bpf_text_address(unsigned long addr) { return false; } static inline int bpf_get_kallsym(unsigned int symnum, unsigned long *value, char *type, char *sym) { return -ERANGE; } static inline const char * bpf_address_lookup(unsigned long addr, unsigned long *size, unsigned long *off, char **modname, char *sym) { return NULL; } static inline void bpf_prog_kallsyms_add(struct bpf_prog *fp) { } static inline void bpf_prog_kallsyms_del(struct bpf_prog *fp) { } #endif /* CONFIG_BPF_JIT */ void bpf_prog_kallsyms_del_all(struct bpf_prog *fp); #define BPF_ANC BIT(15) static inline bool bpf_needs_clear_a(const struct sock_filter *first) { switch (first->code) { case BPF_RET | BPF_K: case BPF_LD | BPF_W | BPF_LEN: return false; case BPF_LD | BPF_W | BPF_ABS: case BPF_LD | BPF_H | BPF_ABS: case BPF_LD | BPF_B | BPF_ABS: if (first->k == SKF_AD_OFF + SKF_AD_ALU_XOR_X) return true; return false; default: return true; } } static inline u16 bpf_anc_helper(const struct sock_filter *ftest) { BUG_ON(ftest->code & BPF_ANC); switch (ftest->code) { case BPF_LD | BPF_W | BPF_ABS: case BPF_LD | BPF_H | BPF_ABS: case BPF_LD | BPF_B | BPF_ABS: #define BPF_ANCILLARY(CODE) case SKF_AD_OFF + SKF_AD_##CODE: \ return BPF_ANC | SKF_AD_##CODE switch (ftest->k) { BPF_ANCILLARY(PROTOCOL); BPF_ANCILLARY(PKTTYPE); BPF_ANCILLARY(IFINDEX); BPF_ANCILLARY(NLATTR); BPF_ANCILLARY(NLATTR_NEST); BPF_ANCILLARY(MARK); BPF_ANCILLARY(QUEUE); BPF_ANCILLARY(HATYPE); BPF_ANCILLARY(RXHASH); BPF_ANCILLARY(CPU); BPF_ANCILLARY(ALU_XOR_X); BPF_ANCILLARY(VLAN_TAG); BPF_ANCILLARY(VLAN_TAG_PRESENT); BPF_ANCILLARY(PAY_OFFSET); BPF_ANCILLARY(RANDOM); BPF_ANCILLARY(VLAN_TPID); } fallthrough; default: return ftest->code; } } void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb, int k, unsigned int size); static inline int bpf_tell_extensions(void) { return SKF_AD_MAX; } struct bpf_sock_addr_kern { struct sock *sk; struct sockaddr *uaddr; /* Temporary "register" to make indirect stores to nested structures * defined above. We need three registers to make such a store, but * only two (src and dst) are available at convert_ctx_access time */ u64 tmp_reg; void *t_ctx; /* Attach type specific context. */ }; struct bpf_sock_ops_kern { struct sock *sk; union { u32 args[4]; u32 reply; u32 replylong[4]; }; struct sk_buff *syn_skb; struct sk_buff *skb; void *skb_data_end; u8 op; u8 is_fullsock; u8 remaining_opt_len; u64 temp; /* temp and everything after is not * initialized to 0 before calling * the BPF program. New fields that * should be initialized to 0 should * be inserted before temp. * temp is scratch storage used by * sock_ops_convert_ctx_access * as temporary storage of a register. */ }; struct bpf_sysctl_kern { struct ctl_table_header *head; struct ctl_table *table; void *cur_val; size_t cur_len; void *new_val; size_t new_len; int new_updated; int write; loff_t *ppos; /* Temporary "register" for indirect stores to ppos. */ u64 tmp_reg; }; #define BPF_SOCKOPT_KERN_BUF_SIZE 32 struct bpf_sockopt_buf { u8 data[BPF_SOCKOPT_KERN_BUF_SIZE]; }; struct bpf_sockopt_kern { struct sock *sk; u8 *optval; u8 *optval_end; s32 level; s32 optname; s32 optlen; s32 retval; }; int copy_bpf_fprog_from_user(struct sock_fprog *dst, sockptr_t src, int len); struct bpf_sk_lookup_kern { u16 family; u16 protocol; __be16 sport; u16 dport; struct { __be32 saddr; __be32 daddr; } v4; struct { const struct in6_addr *saddr; const struct in6_addr *daddr; } v6; struct sock *selected_sk; bool no_reuseport; }; extern struct static_key_false bpf_sk_lookup_enabled; /* Runners for BPF_SK_LOOKUP programs to invoke on socket lookup. * * Allowed return values for a BPF SK_LOOKUP program are SK_PASS and * SK_DROP. Their meaning is as follows: * * SK_PASS && ctx.selected_sk != NULL: use selected_sk as lookup result * SK_PASS && ctx.selected_sk == NULL: continue to htable-based socket lookup * SK_DROP : terminate lookup with -ECONNREFUSED * * This macro aggregates return values and selected sockets from * multiple BPF programs according to following rules in order: * * 1. If any program returned SK_PASS and a non-NULL ctx.selected_sk, * macro result is SK_PASS and last ctx.selected_sk is used. * 2. If any program returned SK_DROP return value, * macro result is SK_DROP. * 3. Otherwise result is SK_PASS and ctx.selected_sk is NULL. * * Caller must ensure that the prog array is non-NULL, and that the * array as well as the programs it contains remain valid. */ #define BPF_PROG_SK_LOOKUP_RUN_ARRAY(array, ctx, func) \ ({ \ struct bpf_sk_lookup_kern *_ctx = &(ctx); \ struct bpf_prog_array_item *_item; \ struct sock *_selected_sk = NULL; \ bool _no_reuseport = false; \ struct bpf_prog *_prog; \ bool _all_pass = true; \ u32 _ret; \ \ migrate_disable(); \ _item = &(array)->items[0]; \ while ((_prog = READ_ONCE(_item->prog))) { \ /* restore most recent selection */ \ _ctx->selected_sk = _selected_sk; \ _ctx->no_reuseport = _no_reuseport; \ \ _ret = func(_prog, _ctx); \ if (_ret == SK_PASS && _ctx->selected_sk) { \ /* remember last non-NULL socket */ \ _selected_sk = _ctx->selected_sk; \ _no_reuseport = _ctx->no_reuseport; \ } else if (_ret == SK_DROP && _all_pass) { \ _all_pass = false; \ } \ _item++; \ } \ _ctx->selected_sk = _selected_sk; \ _ctx->no_reuseport = _no_reuseport; \ migrate_enable(); \ _all_pass || _selected_sk ? SK_PASS : SK_DROP; \ }) static inline bool bpf_sk_lookup_run_v4(struct net *net, int protocol, const __be32 saddr, const __be16 sport, const __be32 daddr, const u16 dport, struct sock **psk) { struct bpf_prog_array *run_array; struct sock *selected_sk = NULL; bool no_reuseport = false; rcu_read_lock(); run_array = rcu_dereference(net->bpf.run_array[NETNS_BPF_SK_LOOKUP]); if (run_array) { struct bpf_sk_lookup_kern ctx = { .family = AF_INET, .protocol = protocol, .v4.saddr = saddr, .v4.daddr = daddr, .sport = sport, .dport = dport, }; u32 act; act = BPF_PROG_SK_LOOKUP_RUN_ARRAY(run_array, ctx, bpf_prog_run); if (act == SK_PASS) { selected_sk = ctx.selected_sk; no_reuseport = ctx.no_reuseport; } else { selected_sk = ERR_PTR(-ECONNREFUSED); } } rcu_read_unlock(); *psk = selected_sk; return no_reuseport; } #if IS_ENABLED(CONFIG_IPV6) static inline bool bpf_sk_lookup_run_v6(struct net *net, int protocol, const struct in6_addr *saddr, const __be16 sport, const struct in6_addr *daddr, const u16 dport, struct sock **psk) { struct bpf_prog_array *run_array; struct sock *selected_sk = NULL; bool no_reuseport = false; rcu_read_lock(); run_array = rcu_dereference(net->bpf.run_array[NETNS_BPF_SK_LOOKUP]); if (run_array) { struct bpf_sk_lookup_kern ctx = { .family = AF_INET6, .protocol = protocol, .v6.saddr = saddr, .v6.daddr = daddr, .sport = sport, .dport = dport, }; u32 act; act = BPF_PROG_SK_LOOKUP_RUN_ARRAY(run_array, ctx, bpf_prog_run); if (act == SK_PASS) { selected_sk = ctx.selected_sk; no_reuseport = ctx.no_reuseport; } else { selected_sk = ERR_PTR(-ECONNREFUSED); } } rcu_read_unlock(); *psk = selected_sk; return no_reuseport; } #endif /* IS_ENABLED(CONFIG_IPV6) */ static __always_inline int __bpf_xdp_redirect_map(struct bpf_map *map, u32 ifindex, u64 flags, const u64 flag_mask, void *lookup_elem(struct bpf_map *map, u32 key)) { struct bpf_redirect_info *ri = this_cpu_ptr(&bpf_redirect_info); const u64 action_mask = XDP_ABORTED | XDP_DROP | XDP_PASS | XDP_TX; /* Lower bits of the flags are used as return code on lookup failure */ if (unlikely(flags & ~(action_mask | flag_mask))) return XDP_ABORTED; ri->tgt_value = lookup_elem(map, ifindex); if (unlikely(!ri->tgt_value) && !(flags & BPF_F_BROADCAST)) { /* If the lookup fails we want to clear out the state in the * redirect_info struct completely, so that if an eBPF program * performs multiple lookups, the last one always takes * precedence. */ ri->map_id = INT_MAX; /* Valid map id idr range: [1,INT_MAX[ */ ri->map_type = BPF_MAP_TYPE_UNSPEC; return flags & action_mask; } ri->tgt_index = ifindex; ri->map_id = map->id; ri->map_type = map->map_type; if (flags & BPF_F_BROADCAST) { WRITE_ONCE(ri->map, map); ri->flags = flags; } else { WRITE_ONCE(ri->map, NULL); ri->flags = 0; } return XDP_REDIRECT; } #endif /* __LINUX_FILTER_H__ */ PK ! Lߜ�� � padata.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * padata.h - header for the padata parallelization interface * * Copyright (C) 2008, 2009 secunet Security Networks AG * Copyright (C) 2008, 2009 Steffen Klassert <steffen.klassert@secunet.com> * * Copyright (c) 2020 Oracle and/or its affiliates. * Author: Daniel Jordan <daniel.m.jordan@oracle.com> */ #ifndef PADATA_H #define PADATA_H #include <linux/refcount.h> #include <linux/compiler_types.h> #include <linux/workqueue.h> #include <linux/spinlock.h> #include <linux/list.h> #include <linux/kobject.h> #define PADATA_CPU_SERIAL 0x01 #define PADATA_CPU_PARALLEL 0x02 /** * struct padata_priv - Represents one job * * @list: List entry, to attach to the padata lists. * @pd: Pointer to the internal control structure. * @cb_cpu: Callback cpu for serializatioon. * @seq_nr: Sequence number of the parallelized data object. * @info: Used to pass information from the parallel to the serial function. * @parallel: Parallel execution function. * @serial: Serial complete function. */ struct padata_priv { struct list_head list; struct parallel_data *pd; int cb_cpu; unsigned int seq_nr; int info; void (*parallel)(struct padata_priv *padata); void (*serial)(struct padata_priv *padata); }; /** * struct padata_list - one per work type per CPU * * @list: List head. * @lock: List lock. */ struct padata_list { struct list_head list; spinlock_t lock; }; /** * struct padata_serial_queue - The percpu padata serial queue * * @serial: List to wait for serialization after reordering. * @work: work struct for serialization. * @pd: Backpointer to the internal control structure. */ struct padata_serial_queue { struct padata_list serial; struct work_struct work; struct parallel_data *pd; }; /** * struct padata_cpumask - The cpumasks for the parallel/serial workers * * @pcpu: cpumask for the parallel workers. * @cbcpu: cpumask for the serial (callback) workers. */ struct padata_cpumask { cpumask_var_t pcpu; cpumask_var_t cbcpu; }; /** * struct parallel_data - Internal control structure, covers everything * that depends on the cpumask in use. * * @ps: padata_shell object. * @reorder_list: percpu reorder lists * @squeue: percpu padata queues used for serialuzation. * @refcnt: Number of objects holding a reference on this parallel_data. * @seq_nr: Sequence number of the parallelized data object. * @processed: Number of already processed objects. * @cpu: Next CPU to be processed. * @cpumask: The cpumasks in use for parallel and serial workers. */ struct parallel_data { struct padata_shell *ps; struct padata_list __percpu *reorder_list; struct padata_serial_queue __percpu *squeue; refcount_t refcnt; unsigned int seq_nr; unsigned int processed; int cpu; struct padata_cpumask cpumask; }; /** * struct padata_shell - Wrapper around struct parallel_data, its * purpose is to allow the underlying control structure to be replaced * on the fly using RCU. * * @pinst: padat instance. * @pd: Actual parallel_data structure which may be substituted on the fly. * @opd: Pointer to old pd to be freed by padata_replace. * @list: List entry in padata_instance list. */ struct padata_shell { struct padata_instance *pinst; struct parallel_data __rcu *pd; struct parallel_data *opd; struct list_head list; }; /** * struct padata_mt_job - represents one multithreaded job * * @thread_fn: Called for each chunk of work that a padata thread does. * @fn_arg: The thread function argument. * @start: The start of the job (units are job-specific). * @size: size of this node's work (units are job-specific). * @align: Ranges passed to the thread function fall on this boundary, with the * possible exceptions of the beginning and end of the job. * @min_chunk: The minimum chunk size in job-specific units. This allows * the client to communicate the minimum amount of work that's * appropriate for one worker thread to do at once. * @max_threads: Max threads to use for the job, actual number may be less * depending on task size and minimum chunk size. */ struct padata_mt_job { void (*thread_fn)(unsigned long start, unsigned long end, void *arg); void *fn_arg; unsigned long start; unsigned long size; unsigned long align; unsigned long min_chunk; int max_threads; }; /** * struct padata_instance - The overall control structure. * * @cpu_online_node: Linkage for CPU online callback. * @cpu_dead_node: Linkage for CPU offline callback. * @parallel_wq: The workqueue used for parallel work. * @serial_wq: The workqueue used for serial work. * @pslist: List of padata_shell objects attached to this instance. * @cpumask: User supplied cpumasks for parallel and serial works. * @kobj: padata instance kernel object. * @lock: padata instance lock. * @flags: padata flags. */ struct padata_instance { struct hlist_node cpu_online_node; struct hlist_node cpu_dead_node; struct workqueue_struct *parallel_wq; struct workqueue_struct *serial_wq; struct list_head pslist; struct padata_cpumask cpumask; struct kobject kobj; struct mutex lock; u8 flags; #define PADATA_INIT 1 #define PADATA_RESET 2 #define PADATA_INVALID 4 }; #ifdef CONFIG_PADATA extern void __init padata_init(void); #else static inline void __init padata_init(void) {} #endif extern struct padata_instance *padata_alloc(const char *name); extern void padata_free(struct padata_instance *pinst); extern struct padata_shell *padata_alloc_shell(struct padata_instance *pinst); extern void padata_free_shell(struct padata_shell *ps); extern int padata_do_parallel(struct padata_shell *ps, struct padata_priv *padata, int *cb_cpu); extern void padata_do_serial(struct padata_priv *padata); extern void __init padata_do_multithreaded(struct padata_mt_job *job); extern int padata_set_cpumask(struct padata_instance *pinst, int cpumask_type, cpumask_var_t cpumask); #endif PK ! �S�mP mP dma-mapping.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DMA_MAPPING_H #define _LINUX_DMA_MAPPING_H #include <linux/sizes.h> #include <linux/string.h> #include <linux/device.h> #include <linux/err.h> #include <linux/dma-direction.h> #include <linux/scatterlist.h> #include <linux/bug.h> #include <linux/mem_encrypt.h> /** * List of possible attributes associated with a DMA mapping. The semantics * of each attribute should be defined in Documentation/core-api/dma-attributes.rst. */ /* * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping * may be weakly ordered, that is that reads and writes may pass each other. */ #define DMA_ATTR_WEAK_ORDERING (1UL << 1) /* * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be * buffered to improve performance. */ #define DMA_ATTR_WRITE_COMBINE (1UL << 2) /* * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel * virtual mapping for the allocated buffer. */ #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) /* * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of * the CPU cache for the given buffer assuming that it has been already * transferred to 'device' domain. */ #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) /* * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer * in physical memory. */ #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) /* * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem * that it's probably not worth the time to try to allocate memory to in a way * that gives better TLB efficiency. */ #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) /* * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress * allocation failure reports (similarly to __GFP_NOWARN). */ #define DMA_ATTR_NO_WARN (1UL << 8) /* * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully * accessible at an elevated privilege level (and ideally inaccessible or * at least read-only at lesser-privileged levels). */ #define DMA_ATTR_PRIVILEGED (1UL << 9) /* * A dma_addr_t can hold any valid DMA or bus address for the platform. It can * be given to a device to use as a DMA source or target. It is specific to a * given device and there may be a translation between the CPU physical address * space and the bus address space. * * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not * be used directly in drivers, but checked for using dma_mapping_error() * instead. */ #define DMA_MAPPING_ERROR (~(dma_addr_t)0) #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) #ifdef CONFIG_DMA_API_DEBUG void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); void debug_dma_map_single(struct device *dev, const void *addr, unsigned long len); #else static inline void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { } static inline void debug_dma_map_single(struct device *dev, const void *addr, unsigned long len) { } #endif /* CONFIG_DMA_API_DEBUG */ #ifdef CONFIG_HAS_DMA static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { debug_dma_mapping_error(dev, dma_addr); if (unlikely(dma_addr == DMA_MAPPING_ERROR)) return -ENOMEM; return 0; } dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, size_t offset, size_t size, enum dma_data_direction dir, unsigned long attrs); void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, unsigned long attrs); unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs); void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs); int dma_map_sgtable(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir, unsigned long attrs); dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, unsigned long attrs); void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, unsigned long attrs); void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir); void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir); void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction dir); void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction dir); void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs); void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle, unsigned long attrs); void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs); int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs); bool dma_can_mmap(struct device *dev); int dma_supported(struct device *dev, u64 mask); int dma_set_mask(struct device *dev, u64 mask); int dma_set_coherent_mask(struct device *dev, u64 mask); u64 dma_get_required_mask(struct device *dev); size_t dma_max_mapping_size(struct device *dev); size_t dma_opt_mapping_size(struct device *dev); bool dma_need_sync(struct device *dev, dma_addr_t dma_addr); unsigned long dma_get_merge_boundary(struct device *dev); struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size, enum dma_data_direction dir, gfp_t gfp, unsigned long attrs); void dma_free_noncontiguous(struct device *dev, size_t size, struct sg_table *sgt, enum dma_data_direction dir); void *dma_vmap_noncontiguous(struct device *dev, size_t size, struct sg_table *sgt); void dma_vunmap_noncontiguous(struct device *dev, void *vaddr); int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma, size_t size, struct sg_table *sgt); #else /* CONFIG_HAS_DMA */ static inline dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, size_t offset, size_t size, enum dma_data_direction dir, unsigned long attrs) { return DMA_MAPPING_ERROR; } static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, unsigned long attrs) { } static inline unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs) { return 0; } static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs) { } static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir, unsigned long attrs) { return -EOPNOTSUPP; } static inline dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, unsigned long attrs) { return DMA_MAPPING_ERROR; } static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, unsigned long attrs) { } static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir) { } static inline void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir) { } static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction dir) { } static inline void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction dir) { } static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return -ENOMEM; } static inline void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) { return NULL; } static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle, unsigned long attrs) { } static inline void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) { return NULL; } static inline void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle) { } static inline int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs) { return -ENXIO; } static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs) { return -ENXIO; } static inline bool dma_can_mmap(struct device *dev) { return false; } static inline int dma_supported(struct device *dev, u64 mask) { return 0; } static inline int dma_set_mask(struct device *dev, u64 mask) { return -EIO; } static inline int dma_set_coherent_mask(struct device *dev, u64 mask) { return -EIO; } static inline u64 dma_get_required_mask(struct device *dev) { return 0; } static inline size_t dma_max_mapping_size(struct device *dev) { return 0; } static inline size_t dma_opt_mapping_size(struct device *dev) { return 0; } static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr) { return false; } static inline unsigned long dma_get_merge_boundary(struct device *dev) { return 0; } static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size, enum dma_data_direction dir, gfp_t gfp, unsigned long attrs) { return NULL; } static inline void dma_free_noncontiguous(struct device *dev, size_t size, struct sg_table *sgt, enum dma_data_direction dir) { } static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size, struct sg_table *sgt) { return NULL; } static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr) { } static inline int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma, size_t size, struct sg_table *sgt) { return -EINVAL; } #endif /* CONFIG_HAS_DMA */ struct page *dma_alloc_pages(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); void dma_free_pages(struct device *dev, size_t size, struct page *page, dma_addr_t dma_handle, enum dma_data_direction dir); int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma, size_t size, struct page *page); static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp) { struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp); return page ? page_address(page) : NULL; } static inline void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir) { dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir); } static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir, unsigned long attrs) { /* DMA must never operate on areas that might be remapped. */ if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr), "rejecting DMA map of vmalloc memory\n")) return DMA_MAPPING_ERROR; debug_dma_map_single(dev, ptr, size); return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), size, dir, attrs); } static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, unsigned long attrs) { return dma_unmap_page_attrs(dev, addr, size, dir, attrs); } static inline void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t addr, unsigned long offset, size_t size, enum dma_data_direction dir) { return dma_sync_single_for_cpu(dev, addr + offset, size, dir); } static inline void dma_sync_single_range_for_device(struct device *dev, dma_addr_t addr, unsigned long offset, size_t size, enum dma_data_direction dir) { return dma_sync_single_for_device(dev, addr + offset, size, dir); } /** * dma_unmap_sgtable - Unmap the given buffer for DMA * @dev: The device for which to perform the DMA operation * @sgt: The sg_table object describing the buffer * @dir: DMA direction * @attrs: Optional DMA attributes for the unmap operation * * Unmaps a buffer described by a scatterlist stored in the given sg_table * object for the @dir DMA operation by the @dev device. After this function * the ownership of the buffer is transferred back to the CPU domain. */ static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir, unsigned long attrs) { dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); } /** * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access * @dev: The device for which to perform the DMA operation * @sgt: The sg_table object describing the buffer * @dir: DMA direction * * Performs the needed cache synchronization and moves the ownership of the * buffer back to the CPU domain, so it is safe to perform any access to it * by the CPU. Before doing any further DMA operations, one has to transfer * the ownership of the buffer back to the DMA domain by calling the * dma_sync_sgtable_for_device(). */ static inline void dma_sync_sgtable_for_cpu(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir) { dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir); } /** * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA * @dev: The device for which to perform the DMA operation * @sgt: The sg_table object describing the buffer * @dir: DMA direction * * Performs the needed cache synchronization and moves the ownership of the * buffer back to the DMA domain, so it is safe to perform the DMA operation. * Once finished, one has to call dma_sync_sgtable_for_cpu() or * dma_unmap_sgtable(). */ static inline void dma_sync_sgtable_for_device(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir) { dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir); } #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) static inline void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { return dma_alloc_attrs(dev, size, dma_handle, gfp, (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); } static inline void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle) { return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); } static inline u64 dma_get_mask(struct device *dev) { if (dev->dma_mask && *dev->dma_mask) return *dev->dma_mask; return DMA_BIT_MASK(32); } /* * Set both the DMA mask and the coherent DMA mask to the same thing. * Note that we don't check the return value from dma_set_coherent_mask() * as the DMA API guarantees that the coherent DMA mask can be set to * the same or smaller than the streaming DMA mask. */ static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) { int rc = dma_set_mask(dev, mask); if (rc == 0) dma_set_coherent_mask(dev, mask); return rc; } /* * Similar to the above, except it deals with the case where the device * does not have dev->dma_mask appropriately setup. */ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) { dev->dma_mask = &dev->coherent_dma_mask; return dma_set_mask_and_coherent(dev, mask); } /** * dma_addressing_limited - return if the device is addressing limited * @dev: device to check * * Return %true if the devices DMA mask is too small to address all memory in * the system, else %false. Lack of addressing bits is the prime reason for * bounce buffering, but might not be the only one. */ static inline bool dma_addressing_limited(struct device *dev) { return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < dma_get_required_mask(dev); } static inline unsigned int dma_get_max_seg_size(struct device *dev) { if (dev->dma_parms && dev->dma_parms->max_segment_size) return dev->dma_parms->max_segment_size; return SZ_64K; } static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) { if (dev->dma_parms) { dev->dma_parms->max_segment_size = size; return 0; } return -EIO; } static inline unsigned long dma_get_seg_boundary(struct device *dev) { if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) return dev->dma_parms->segment_boundary_mask; return ULONG_MAX; } /** * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units * @dev: device to guery the boundary for * @page_shift: ilog() of the IOMMU page size * * Return the segment boundary in IOMMU page units (which may be different from * the CPU page size) for the passed in device. * * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for * non-DMA API callers. */ static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev, unsigned int page_shift) { if (!dev) return (U32_MAX >> page_shift) + 1; return (dma_get_seg_boundary(dev) >> page_shift) + 1; } static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) { if (dev->dma_parms) { dev->dma_parms->segment_boundary_mask = mask; return 0; } return -EIO; } static inline unsigned int dma_get_min_align_mask(struct device *dev) { if (dev->dma_parms) return dev->dma_parms->min_align_mask; return 0; } static inline int dma_set_min_align_mask(struct device *dev, unsigned int min_align_mask) { if (WARN_ON_ONCE(!dev->dma_parms)) return -EIO; dev->dma_parms->min_align_mask = min_align_mask; return 0; } static inline int dma_get_cache_alignment(void) { #ifdef ARCH_DMA_MINALIGN return ARCH_DMA_MINALIGN; #endif return 1; } static inline void *dmam_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { return dmam_alloc_attrs(dev, size, dma_handle, gfp, (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); } static inline void *dma_alloc_wc(struct device *dev, size_t size, dma_addr_t *dma_addr, gfp_t gfp) { unsigned long attrs = DMA_ATTR_WRITE_COMBINE; if (gfp & __GFP_NOWARN) attrs |= DMA_ATTR_NO_WARN; return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); } static inline void dma_free_wc(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr) { return dma_free_attrs(dev, size, cpu_addr, dma_addr, DMA_ATTR_WRITE_COMBINE); } static inline int dma_mmap_wc(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size) { return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, DMA_ATTR_WRITE_COMBINE); } #ifdef CONFIG_NEED_DMA_MAP_STATE #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) #else #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) #define dma_unmap_addr(PTR, ADDR_NAME) \ ({ typeof(PTR) __p __maybe_unused = PTR; 0; }) #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) \ do { typeof(PTR) __p __maybe_unused = PTR; } while (0) #define dma_unmap_len(PTR, LEN_NAME) \ ({ typeof(PTR) __p __maybe_unused = PTR; 0; }) #define dma_unmap_len_set(PTR, LEN_NAME, VAL) \ do { typeof(PTR) __p __maybe_unused = PTR; } while (0) #endif #endif /* _LINUX_DMA_MAPPING_H */ PK ! )�,i) i) damon.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * DAMON api * * Author: SeongJae Park <sjpark@amazon.de> */ #ifndef _DAMON_H_ #define _DAMON_H_ #include <linux/mutex.h> #include <linux/time64.h> #include <linux/types.h> /* Minimal region size. Every damon_region is aligned by this. */ #define DAMON_MIN_REGION PAGE_SIZE /** * struct damon_addr_range - Represents an address region of [@start, @end). * @start: Start address of the region (inclusive). * @end: End address of the region (exclusive). */ struct damon_addr_range { unsigned long start; unsigned long end; }; /** * struct damon_region - Represents a monitoring target region. * @ar: The address range of the region. * @sampling_addr: Address of the sample for the next access check. * @nr_accesses: Access frequency of this region. * @list: List head for siblings. */ struct damon_region { struct damon_addr_range ar; unsigned long sampling_addr; unsigned int nr_accesses; struct list_head list; }; /** * struct damon_target - Represents a monitoring target. * @id: Unique identifier for this target. * @nr_regions: Number of monitoring target regions of this target. * @regions_list: Head of the monitoring target regions of this target. * @list: List head for siblings. * * Each monitoring context could have multiple targets. For example, a context * for virtual memory address spaces could have multiple target processes. The * @id of each target should be unique among the targets of the context. For * example, in the virtual address monitoring context, it could be a pidfd or * an address of an mm_struct. */ struct damon_target { unsigned long id; unsigned int nr_regions; struct list_head regions_list; struct list_head list; }; struct damon_ctx; /** * struct damon_primitive Monitoring primitives for given use cases. * * @init: Initialize primitive-internal data structures. * @update: Update primitive-internal data structures. * @prepare_access_checks: Prepare next access check of target regions. * @check_accesses: Check the accesses to target regions. * @reset_aggregated: Reset aggregated accesses monitoring results. * @target_valid: Determine if the target is valid. * @cleanup: Clean up the context. * * DAMON can be extended for various address spaces and usages. For this, * users should register the low level primitives for their target address * space and usecase via the &damon_ctx.primitive. Then, the monitoring thread * (&damon_ctx.kdamond) calls @init and @prepare_access_checks before starting * the monitoring, @update after each &damon_ctx.primitive_update_interval, and * @check_accesses, @target_valid and @prepare_access_checks after each * &damon_ctx.sample_interval. Finally, @reset_aggregated is called after each * &damon_ctx.aggr_interval. * * @init should initialize primitive-internal data structures. For example, * this could be used to construct proper monitoring target regions and link * those to @damon_ctx.adaptive_targets. * @update should update the primitive-internal data structures. For example, * this could be used to update monitoring target regions for current status. * @prepare_access_checks should manipulate the monitoring regions to be * prepared for the next access check. * @check_accesses should check the accesses to each region that made after the * last preparation and update the number of observed accesses of each region. * It should also return max number of observed accesses that made as a result * of its update. The value will be used for regions adjustment threshold. * @reset_aggregated should reset the access monitoring results that aggregated * by @check_accesses. * @target_valid should check whether the target is still valid for the * monitoring. * @cleanup is called from @kdamond just before its termination. */ struct damon_primitive { void (*init)(struct damon_ctx *context); void (*update)(struct damon_ctx *context); void (*prepare_access_checks)(struct damon_ctx *context); unsigned int (*check_accesses)(struct damon_ctx *context); void (*reset_aggregated)(struct damon_ctx *context); bool (*target_valid)(void *target); void (*cleanup)(struct damon_ctx *context); }; /* * struct damon_callback Monitoring events notification callbacks. * * @before_start: Called before starting the monitoring. * @after_sampling: Called after each sampling. * @after_aggregation: Called after each aggregation. * @before_terminate: Called before terminating the monitoring. * @private: User private data. * * The monitoring thread (&damon_ctx.kdamond) calls @before_start and * @before_terminate just before starting and finishing the monitoring, * respectively. Therefore, those are good places for installing and cleaning * @private. * * The monitoring thread calls @after_sampling and @after_aggregation for each * of the sampling intervals and aggregation intervals, respectively. * Therefore, users can safely access the monitoring results without additional * protection. For the reason, users are recommended to use these callback for * the accesses to the results. * * If any callback returns non-zero, monitoring stops. */ struct damon_callback { void *private; int (*before_start)(struct damon_ctx *context); int (*after_sampling)(struct damon_ctx *context); int (*after_aggregation)(struct damon_ctx *context); int (*before_terminate)(struct damon_ctx *context); }; /** * struct damon_ctx - Represents a context for each monitoring. This is the * main interface that allows users to set the attributes and get the results * of the monitoring. * * @sample_interval: The time between access samplings. * @aggr_interval: The time between monitor results aggregations. * @primitive_update_interval: The time between monitoring primitive updates. * * For each @sample_interval, DAMON checks whether each region is accessed or * not. It aggregates and keeps the access information (number of accesses to * each region) for @aggr_interval time. DAMON also checks whether the target * memory regions need update (e.g., by ``mmap()`` calls from the application, * in case of virtual memory monitoring) and applies the changes for each * @primitive_update_interval. All time intervals are in micro-seconds. * Please refer to &struct damon_primitive and &struct damon_callback for more * detail. * * @kdamond: Kernel thread who does the monitoring. * @kdamond_stop: Notifies whether kdamond should stop. * @kdamond_lock: Mutex for the synchronizations with @kdamond. * * For each monitoring context, one kernel thread for the monitoring is * created. The pointer to the thread is stored in @kdamond. * * Once started, the monitoring thread runs until explicitly required to be * terminated or every monitoring target is invalid. The validity of the * targets is checked via the &damon_primitive.target_valid of @primitive. The * termination can also be explicitly requested by writing non-zero to * @kdamond_stop. The thread sets @kdamond to NULL when it terminates. * Therefore, users can know whether the monitoring is ongoing or terminated by * reading @kdamond. Reads and writes to @kdamond and @kdamond_stop from * outside of the monitoring thread must be protected by @kdamond_lock. * * Note that the monitoring thread protects only @kdamond and @kdamond_stop via * @kdamond_lock. Accesses to other fields must be protected by themselves. * * @primitive: Set of monitoring primitives for given use cases. * @callback: Set of callbacks for monitoring events notifications. * * @min_nr_regions: The minimum number of adaptive monitoring regions. * @max_nr_regions: The maximum number of adaptive monitoring regions. * @adaptive_targets: Head of monitoring targets (&damon_target) list. */ struct damon_ctx { unsigned long sample_interval; unsigned long aggr_interval; unsigned long primitive_update_interval; /* private: internal use only */ struct timespec64 last_aggregation; struct timespec64 last_primitive_update; /* public: */ struct task_struct *kdamond; bool kdamond_stop; struct mutex kdamond_lock; struct damon_primitive primitive; struct damon_callback callback; unsigned long min_nr_regions; unsigned long max_nr_regions; struct list_head adaptive_targets; }; #define damon_next_region(r) \ (container_of(r->list.next, struct damon_region, list)) #define damon_prev_region(r) \ (container_of(r->list.prev, struct damon_region, list)) #define damon_for_each_region(r, t) \ list_for_each_entry(r, &t->regions_list, list) #define damon_for_each_region_safe(r, next, t) \ list_for_each_entry_safe(r, next, &t->regions_list, list) #define damon_for_each_target(t, ctx) \ list_for_each_entry(t, &(ctx)->adaptive_targets, list) #define damon_for_each_target_safe(t, next, ctx) \ list_for_each_entry_safe(t, next, &(ctx)->adaptive_targets, list) #ifdef CONFIG_DAMON struct damon_region *damon_new_region(unsigned long start, unsigned long end); inline void damon_insert_region(struct damon_region *r, struct damon_region *prev, struct damon_region *next, struct damon_target *t); void damon_add_region(struct damon_region *r, struct damon_target *t); void damon_destroy_region(struct damon_region *r, struct damon_target *t); struct damon_target *damon_new_target(unsigned long id); void damon_add_target(struct damon_ctx *ctx, struct damon_target *t); void damon_free_target(struct damon_target *t); void damon_destroy_target(struct damon_target *t); unsigned int damon_nr_regions(struct damon_target *t); struct damon_ctx *damon_new_ctx(void); void damon_destroy_ctx(struct damon_ctx *ctx); int damon_set_targets(struct damon_ctx *ctx, unsigned long *ids, ssize_t nr_ids); int damon_set_attrs(struct damon_ctx *ctx, unsigned long sample_int, unsigned long aggr_int, unsigned long primitive_upd_int, unsigned long min_nr_reg, unsigned long max_nr_reg); int damon_nr_running_ctxs(void); int damon_start(struct damon_ctx **ctxs, int nr_ctxs); int damon_stop(struct damon_ctx **ctxs, int nr_ctxs); #endif /* CONFIG_DAMON */ #ifdef CONFIG_DAMON_VADDR /* Monitoring primitives for virtual memory address spaces */ void damon_va_init(struct damon_ctx *ctx); void damon_va_update(struct damon_ctx *ctx); void damon_va_prepare_access_checks(struct damon_ctx *ctx); unsigned int damon_va_check_accesses(struct damon_ctx *ctx); bool damon_va_target_valid(void *t); void damon_va_cleanup(struct damon_ctx *ctx); void damon_va_set_primitives(struct damon_ctx *ctx); #endif /* CONFIG_DAMON_VADDR */ #endif /* _DAMON_H */ PK ! w � � futex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FUTEX_H #define _LINUX_FUTEX_H #include <linux/sched.h> #include <linux/ktime.h> #include <uapi/linux/futex.h> struct inode; struct mm_struct; struct task_struct; /* * Futexes are matched on equal values of this key. * The key type depends on whether it's a shared or private mapping. * Don't rearrange members without looking at hash_futex(). * * offset is aligned to a multiple of sizeof(u32) (== 4) by definition. * We use the two low order bits of offset to tell what is the kind of key : * 00 : Private process futex (PTHREAD_PROCESS_PRIVATE) * (no reference on an inode or mm) * 01 : Shared futex (PTHREAD_PROCESS_SHARED) * mapped on a file (reference on the underlying inode) * 10 : Shared futex (PTHREAD_PROCESS_SHARED) * (but private mapping on an mm, and reference taken on it) */ #define FUT_OFF_INODE 1 /* We set bit 0 if key has a reference on inode */ #define FUT_OFF_MMSHARED 2 /* We set bit 1 if key has a reference on mm */ union futex_key { struct { u64 i_seq; unsigned long pgoff; unsigned int offset; } shared; struct { union { struct mm_struct *mm; u64 __tmp; }; unsigned long address; unsigned int offset; } private; struct { u64 ptr; unsigned long word; unsigned int offset; } both; }; #define FUTEX_KEY_INIT (union futex_key) { .both = { .ptr = 0ULL } } #ifdef CONFIG_FUTEX enum { FUTEX_STATE_OK, FUTEX_STATE_EXITING, FUTEX_STATE_DEAD, }; static inline void futex_init_task(struct task_struct *tsk) { tsk->robust_list = NULL; #ifdef CONFIG_COMPAT tsk->compat_robust_list = NULL; #endif INIT_LIST_HEAD(&tsk->pi_state_list); tsk->pi_state_cache = NULL; tsk->futex_state = FUTEX_STATE_OK; mutex_init(&tsk->futex_exit_mutex); } void futex_exit_recursive(struct task_struct *tsk); void futex_exit_release(struct task_struct *tsk); void futex_exec_release(struct task_struct *tsk); long do_futex(u32 __user *uaddr, int op, u32 val, ktime_t *timeout, u32 __user *uaddr2, u32 val2, u32 val3); #else static inline void futex_init_task(struct task_struct *tsk) { } static inline void futex_exit_recursive(struct task_struct *tsk) { } static inline void futex_exit_release(struct task_struct *tsk) { } static inline void futex_exec_release(struct task_struct *tsk) { } static inline long do_futex(u32 __user *uaddr, int op, u32 val, ktime_t *timeout, u32 __user *uaddr2, u32 val2, u32 val3) { return -EINVAL; } #endif #endif PK ! /�1n; ; gpio-pxa.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __GPIO_PXA_H #define __GPIO_PXA_H #define GPIO_bit(x) (1 << ((x) & 0x1f)) #define gpio_to_bank(gpio) ((gpio) >> 5) /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). * Those cases currently cause holes in the GPIO number space, the * actual number of the last GPIO is recorded by 'pxa_last_gpio'. */ extern int pxa_last_gpio; extern int pxa_irq_to_gpio(int irq); struct pxa_gpio_platform_data { int irq_base; int (*gpio_set_wake)(unsigned int gpio, unsigned int on); }; #endif /* __GPIO_PXA_H */ PK ! N��!. !. genl_magic_func.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef GENL_MAGIC_FUNC_H #define GENL_MAGIC_FUNC_H #include <linux/build_bug.h> #include <linux/genl_magic_struct.h> /* * Magic: declare tla policy {{{1 * Magic: declare nested policies * {{{2 */ #undef GENL_mc_group #define GENL_mc_group(group) #undef GENL_notification #define GENL_notification(op_name, op_num, mcast_group, tla_list) #undef GENL_op #define GENL_op(op_name, op_num, handler, tla_list) #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ [tag_name] = { .type = NLA_NESTED }, static struct nla_policy CONCAT_(GENL_MAGIC_FAMILY, _tla_nl_policy)[] = { #include GENL_MAGIC_INCLUDE_FILE }; #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ static struct nla_policy s_name ## _nl_policy[] __read_mostly = \ { s_fields }; #undef __field #define __field(attr_nr, attr_flag, name, nla_type, _type, __get, \ __put, __is_signed) \ [attr_nr] = { .type = nla_type }, #undef __array #define __array(attr_nr, attr_flag, name, nla_type, _type, maxlen, \ __get, __put, __is_signed) \ [attr_nr] = { .type = nla_type, \ .len = maxlen - (nla_type == NLA_NUL_STRING) }, #include GENL_MAGIC_INCLUDE_FILE #ifndef __KERNEL__ #ifndef pr_info #define pr_info(args...) fprintf(stderr, args); #endif #endif #ifdef GENL_MAGIC_DEBUG static void dprint_field(const char *dir, int nla_type, const char *name, void *valp) { __u64 val = valp ? *(__u32 *)valp : 1; switch (nla_type) { case NLA_U8: val = (__u8)val; case NLA_U16: val = (__u16)val; case NLA_U32: val = (__u32)val; pr_info("%s attr %s: %d 0x%08x\n", dir, name, (int)val, (unsigned)val); break; case NLA_U64: val = *(__u64*)valp; pr_info("%s attr %s: %lld 0x%08llx\n", dir, name, (long long)val, (unsigned long long)val); break; case NLA_FLAG: if (val) pr_info("%s attr %s: set\n", dir, name); break; } } static void dprint_array(const char *dir, int nla_type, const char *name, const char *val, unsigned len) { switch (nla_type) { case NLA_NUL_STRING: if (len && val[len-1] == '\0') len--; pr_info("%s attr %s: [len:%u] '%s'\n", dir, name, len, val); break; default: /* we can always show 4 byte, * thats what nlattr are aligned to. */ pr_info("%s attr %s: [len:%u] %02x%02x%02x%02x ...\n", dir, name, len, val[0], val[1], val[2], val[3]); } } #define DPRINT_TLA(a, op, b) pr_info("%s %s %s\n", a, op, b); /* Name is a member field name of the struct s. * If s is NULL (only parsing, no copy requested in *_from_attrs()), * nla is supposed to point to the attribute containing the information * corresponding to that struct member. */ #define DPRINT_FIELD(dir, nla_type, name, s, nla) \ do { \ if (s) \ dprint_field(dir, nla_type, #name, &s->name); \ else if (nla) \ dprint_field(dir, nla_type, #name, \ (nla_type == NLA_FLAG) ? NULL \ : nla_data(nla)); \ } while (0) #define DPRINT_ARRAY(dir, nla_type, name, s, nla) \ do { \ if (s) \ dprint_array(dir, nla_type, #name, \ s->name, s->name ## _len); \ else if (nla) \ dprint_array(dir, nla_type, #name, \ nla_data(nla), nla_len(nla)); \ } while (0) #else #define DPRINT_TLA(a, op, b) do {} while (0) #define DPRINT_FIELD(dir, nla_type, name, s, nla) do {} while (0) #define DPRINT_ARRAY(dir, nla_type, name, s, nla) do {} while (0) #endif /* * Magic: provide conversion functions {{{1 * populate struct from attribute table: * {{{2 */ /* processing of generic netlink messages is serialized. * use one static buffer for parsing of nested attributes */ static struct nlattr *nested_attr_tb[128]; #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ /* *_from_attrs functions are static, but potentially unused */ \ static int __ ## s_name ## _from_attrs(struct s_name *s, \ struct genl_info *info, bool exclude_invariants) \ { \ const int maxtype = ARRAY_SIZE(s_name ## _nl_policy)-1; \ struct nlattr *tla = info->attrs[tag_number]; \ struct nlattr **ntb = nested_attr_tb; \ struct nlattr *nla; \ int err; \ BUILD_BUG_ON(ARRAY_SIZE(s_name ## _nl_policy) > ARRAY_SIZE(nested_attr_tb)); \ if (!tla) \ return -ENOMSG; \ DPRINT_TLA(#s_name, "<=-", #tag_name); \ err = drbd_nla_parse_nested(ntb, maxtype, tla, s_name ## _nl_policy); \ if (err) \ return err; \ \ s_fields \ return 0; \ } __attribute__((unused)) \ static int s_name ## _from_attrs(struct s_name *s, \ struct genl_info *info) \ { \ return __ ## s_name ## _from_attrs(s, info, false); \ } __attribute__((unused)) \ static int s_name ## _from_attrs_for_change(struct s_name *s, \ struct genl_info *info) \ { \ return __ ## s_name ## _from_attrs(s, info, true); \ } __attribute__((unused)) \ #define __assign(attr_nr, attr_flag, name, nla_type, type, assignment...) \ nla = ntb[attr_nr]; \ if (nla) { \ if (exclude_invariants && !!((attr_flag) & DRBD_F_INVARIANT)) { \ pr_info("<< must not change invariant attr: %s\n", #name); \ return -EEXIST; \ } \ assignment; \ } else if (exclude_invariants && !!((attr_flag) & DRBD_F_INVARIANT)) { \ /* attribute missing from payload, */ \ /* which was expected */ \ } else if ((attr_flag) & DRBD_F_REQUIRED) { \ pr_info("<< missing attr: %s\n", #name); \ return -ENOMSG; \ } #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, __get, __put, \ __is_signed) \ __assign(attr_nr, attr_flag, name, nla_type, type, \ if (s) \ s->name = __get(nla); \ DPRINT_FIELD("<<", nla_type, name, s, nla)) /* validate_nla() already checked nla_len <= maxlen appropriately. */ #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, maxlen, \ __get, __put, __is_signed) \ __assign(attr_nr, attr_flag, name, nla_type, type, \ if (s) \ s->name ## _len = \ __get(s->name, nla, maxlen); \ DPRINT_ARRAY("<<", nla_type, name, s, nla)) #include GENL_MAGIC_INCLUDE_FILE #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) /* * Magic: define op number to op name mapping {{{1 * {{{2 */ const char *CONCAT_(GENL_MAGIC_FAMILY, _genl_cmd_to_str)(__u8 cmd) { switch (cmd) { #undef GENL_op #define GENL_op(op_name, op_num, handler, tla_list) \ case op_num: return #op_name; #include GENL_MAGIC_INCLUDE_FILE default: return "unknown"; } } #ifdef __KERNEL__ #include <linux/stringify.h> /* * Magic: define genl_ops {{{1 * {{{2 */ #undef GENL_op #define GENL_op(op_name, op_num, handler, tla_list) \ { \ handler \ .cmd = op_name, \ }, #define ZZZ_genl_ops CONCAT_(GENL_MAGIC_FAMILY, _genl_ops) static struct genl_ops ZZZ_genl_ops[] __read_mostly = { #include GENL_MAGIC_INCLUDE_FILE }; #undef GENL_op #define GENL_op(op_name, op_num, handler, tla_list) /* * Define the genl_family, multicast groups, {{{1 * and provide register/unregister functions. * {{{2 */ #define ZZZ_genl_family CONCAT_(GENL_MAGIC_FAMILY, _genl_family) static struct genl_family ZZZ_genl_family; /* * Magic: define multicast groups * Magic: define multicast group registration helper */ #define ZZZ_genl_mcgrps CONCAT_(GENL_MAGIC_FAMILY, _genl_mcgrps) static const struct genl_multicast_group ZZZ_genl_mcgrps[] = { #undef GENL_mc_group #define GENL_mc_group(group) { .name = #group, }, #include GENL_MAGIC_INCLUDE_FILE }; enum CONCAT_(GENL_MAGIC_FAMILY, group_ids) { #undef GENL_mc_group #define GENL_mc_group(group) CONCAT_(GENL_MAGIC_FAMILY, _group_ ## group), #include GENL_MAGIC_INCLUDE_FILE }; #undef GENL_mc_group #define GENL_mc_group(group) \ static int CONCAT_(GENL_MAGIC_FAMILY, _genl_multicast_ ## group)( \ struct sk_buff *skb, gfp_t flags) \ { \ unsigned int group_id = \ CONCAT_(GENL_MAGIC_FAMILY, _group_ ## group); \ return genlmsg_multicast(&ZZZ_genl_family, skb, 0, \ group_id, flags); \ } #include GENL_MAGIC_INCLUDE_FILE #undef GENL_mc_group #define GENL_mc_group(group) static struct genl_family ZZZ_genl_family __ro_after_init = { .name = __stringify(GENL_MAGIC_FAMILY), .version = GENL_MAGIC_VERSION, #ifdef GENL_MAGIC_FAMILY_HDRSZ .hdrsize = NLA_ALIGN(GENL_MAGIC_FAMILY_HDRSZ), #endif .maxattr = ARRAY_SIZE(CONCAT_(GENL_MAGIC_FAMILY, _tla_nl_policy))-1, .policy = CONCAT_(GENL_MAGIC_FAMILY, _tla_nl_policy), .ops = ZZZ_genl_ops, .n_ops = ARRAY_SIZE(ZZZ_genl_ops), .mcgrps = ZZZ_genl_mcgrps, .n_mcgrps = ARRAY_SIZE(ZZZ_genl_mcgrps), .module = THIS_MODULE, }; int CONCAT_(GENL_MAGIC_FAMILY, _genl_register)(void) { return genl_register_family(&ZZZ_genl_family); } void CONCAT_(GENL_MAGIC_FAMILY, _genl_unregister)(void) { genl_unregister_family(&ZZZ_genl_family); } /* * Magic: provide conversion functions {{{1 * populate skb from struct. * {{{2 */ #undef GENL_op #define GENL_op(op_name, op_num, handler, tla_list) #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ static int s_name ## _to_skb(struct sk_buff *skb, struct s_name *s, \ const bool exclude_sensitive) \ { \ struct nlattr *tla = nla_nest_start(skb, tag_number); \ if (!tla) \ goto nla_put_failure; \ DPRINT_TLA(#s_name, "-=>", #tag_name); \ s_fields \ nla_nest_end(skb, tla); \ return 0; \ \ nla_put_failure: \ if (tla) \ nla_nest_cancel(skb, tla); \ return -EMSGSIZE; \ } \ static inline int s_name ## _to_priv_skb(struct sk_buff *skb, \ struct s_name *s) \ { \ return s_name ## _to_skb(skb, s, 0); \ } \ static inline int s_name ## _to_unpriv_skb(struct sk_buff *skb, \ struct s_name *s) \ { \ return s_name ## _to_skb(skb, s, 1); \ } #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, __get, __put, \ __is_signed) \ if (!exclude_sensitive || !((attr_flag) & DRBD_F_SENSITIVE)) { \ DPRINT_FIELD(">>", nla_type, name, s, NULL); \ if (__put(skb, attr_nr, s->name)) \ goto nla_put_failure; \ } #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, maxlen, \ __get, __put, __is_signed) \ if (!exclude_sensitive || !((attr_flag) & DRBD_F_SENSITIVE)) { \ DPRINT_ARRAY(">>",nla_type, name, s, NULL); \ if (__put(skb, attr_nr, min_t(int, maxlen, \ s->name ## _len + (nla_type == NLA_NUL_STRING)),\ s->name)) \ goto nla_put_failure; \ } #include GENL_MAGIC_INCLUDE_FILE /* Functions for initializing structs to default values. */ #undef __field #define __field(attr_nr, attr_flag, name, nla_type, type, __get, __put, \ __is_signed) #undef __array #define __array(attr_nr, attr_flag, name, nla_type, type, maxlen, \ __get, __put, __is_signed) #undef __u32_field_def #define __u32_field_def(attr_nr, attr_flag, name, default) \ x->name = default; #undef __s32_field_def #define __s32_field_def(attr_nr, attr_flag, name, default) \ x->name = default; #undef __flg_field_def #define __flg_field_def(attr_nr, attr_flag, name, default) \ x->name = default; #undef __str_field_def #define __str_field_def(attr_nr, attr_flag, name, maxlen) \ memset(x->name, 0, sizeof(x->name)); \ x->name ## _len = 0; #undef GENL_struct #define GENL_struct(tag_name, tag_number, s_name, s_fields) \ static void set_ ## s_name ## _defaults(struct s_name *x) __attribute__((unused)); \ static void set_ ## s_name ## _defaults(struct s_name *x) { \ s_fields \ } #include GENL_MAGIC_INCLUDE_FILE #endif /* __KERNEL__ */ /* }}}1 */ #endif /* GENL_MAGIC_FUNC_H */ PK ! �]��f� f� i2c.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * i2c.h - definitions for the Linux i2c bus interface * Copyright (C) 1995-2000 Simon G. Vogl * Copyright (C) 2013-2019 Wolfram Sang <wsa@kernel.org> * * With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and * Frodo Looijaard <frodol@dds.nl> */ #ifndef _LINUX_I2C_H #define _LINUX_I2C_H #include <linux/acpi.h> /* for acpi_handle */ #include <linux/mod_devicetable.h> #include <linux/device.h> /* for struct device */ #include <linux/sched.h> /* for completion */ #include <linux/mutex.h> #include <linux/regulator/consumer.h> #include <linux/rtmutex.h> #include <linux/irqdomain.h> /* for Host Notify IRQ */ #include <linux/of.h> /* for struct device_node */ #include <linux/swab.h> /* for swab16 */ #include <uapi/linux/i2c.h> extern struct bus_type i2c_bus_type; extern struct device_type i2c_adapter_type; extern struct device_type i2c_client_type; /* --- General options ------------------------------------------------ */ struct i2c_msg; struct i2c_algorithm; struct i2c_adapter; struct i2c_client; struct i2c_driver; struct i2c_device_identity; union i2c_smbus_data; struct i2c_board_info; enum i2c_slave_event; typedef int (*i2c_slave_cb_t)(struct i2c_client *client, enum i2c_slave_event event, u8 *val); /* I2C Frequency Modes */ #define I2C_MAX_STANDARD_MODE_FREQ 100000 #define I2C_MAX_FAST_MODE_FREQ 400000 #define I2C_MAX_FAST_MODE_PLUS_FREQ 1000000 #define I2C_MAX_TURBO_MODE_FREQ 1400000 #define I2C_MAX_HIGH_SPEED_MODE_FREQ 3400000 #define I2C_MAX_ULTRA_FAST_MODE_FREQ 5000000 struct module; struct property_entry; #if IS_ENABLED(CONFIG_I2C) /* Return the Frequency mode string based on the bus frequency */ const char *i2c_freq_mode_string(u32 bus_freq_hz); /* * The master routines are the ones normally used to transmit data to devices * on a bus (or read from them). Apart from two basic transfer functions to * transmit one message at a time, a more complex version can be used to * transmit an arbitrary number of messages without interruption. * @count must be less than 64k since msg.len is u16. */ int i2c_transfer_buffer_flags(const struct i2c_client *client, char *buf, int count, u16 flags); /** * i2c_master_recv - issue a single I2C message in master receive mode * @client: Handle to slave device * @buf: Where to store data read from slave * @count: How many bytes to read, must be less than 64k since msg.len is u16 * * Returns negative errno, or else the number of bytes read. */ static inline int i2c_master_recv(const struct i2c_client *client, char *buf, int count) { return i2c_transfer_buffer_flags(client, buf, count, I2C_M_RD); }; /** * i2c_master_recv_dmasafe - issue a single I2C message in master receive mode * using a DMA safe buffer * @client: Handle to slave device * @buf: Where to store data read from slave, must be safe to use with DMA * @count: How many bytes to read, must be less than 64k since msg.len is u16 * * Returns negative errno, or else the number of bytes read. */ static inline int i2c_master_recv_dmasafe(const struct i2c_client *client, char *buf, int count) { return i2c_transfer_buffer_flags(client, buf, count, I2C_M_RD | I2C_M_DMA_SAFE); }; /** * i2c_master_send - issue a single I2C message in master transmit mode * @client: Handle to slave device * @buf: Data that will be written to the slave * @count: How many bytes to write, must be less than 64k since msg.len is u16 * * Returns negative errno, or else the number of bytes written. */ static inline int i2c_master_send(const struct i2c_client *client, const char *buf, int count) { return i2c_transfer_buffer_flags(client, (char *)buf, count, 0); }; /** * i2c_master_send_dmasafe - issue a single I2C message in master transmit mode * using a DMA safe buffer * @client: Handle to slave device * @buf: Data that will be written to the slave, must be safe to use with DMA * @count: How many bytes to write, must be less than 64k since msg.len is u16 * * Returns negative errno, or else the number of bytes written. */ static inline int i2c_master_send_dmasafe(const struct i2c_client *client, const char *buf, int count) { return i2c_transfer_buffer_flags(client, (char *)buf, count, I2C_M_DMA_SAFE); }; /* Transfer num messages. */ int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); /* Unlocked flavor */ int __i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); /* This is the very generalized SMBus access routine. You probably do not want to use this, though; one of the functions below may be much easier, and probably just as fast. Note that we use i2c_adapter here, because you do not need a specific smbus adapter to call this function. */ s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, unsigned short flags, char read_write, u8 command, int protocol, union i2c_smbus_data *data); /* Unlocked flavor */ s32 __i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, unsigned short flags, char read_write, u8 command, int protocol, union i2c_smbus_data *data); /* Now follow the 'nice' access routines. These also document the calling conventions of i2c_smbus_xfer. */ u8 i2c_smbus_pec(u8 crc, u8 *p, size_t count); s32 i2c_smbus_read_byte(const struct i2c_client *client); s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value); s32 i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command); s32 i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command, u8 value); s32 i2c_smbus_read_word_data(const struct i2c_client *client, u8 command); s32 i2c_smbus_write_word_data(const struct i2c_client *client, u8 command, u16 value); static inline s32 i2c_smbus_read_word_swapped(const struct i2c_client *client, u8 command) { s32 value = i2c_smbus_read_word_data(client, command); return (value < 0) ? value : swab16(value); } static inline s32 i2c_smbus_write_word_swapped(const struct i2c_client *client, u8 command, u16 value) { return i2c_smbus_write_word_data(client, command, swab16(value)); } /* Returns the number of read bytes */ s32 i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values); s32 i2c_smbus_write_block_data(const struct i2c_client *client, u8 command, u8 length, const u8 *values); /* Returns the number of read bytes */ s32 i2c_smbus_read_i2c_block_data(const struct i2c_client *client, u8 command, u8 length, u8 *values); s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client, u8 command, u8 length, const u8 *values); s32 i2c_smbus_read_i2c_block_data_or_emulated(const struct i2c_client *client, u8 command, u8 length, u8 *values); int i2c_get_device_id(const struct i2c_client *client, struct i2c_device_identity *id); #endif /* I2C */ /** * struct i2c_device_identity - i2c client device identification * @manufacturer_id: 0 - 4095, database maintained by NXP * @part_id: 0 - 511, according to manufacturer * @die_revision: 0 - 7, according to manufacturer */ struct i2c_device_identity { u16 manufacturer_id; #define I2C_DEVICE_ID_NXP_SEMICONDUCTORS 0 #define I2C_DEVICE_ID_NXP_SEMICONDUCTORS_1 1 #define I2C_DEVICE_ID_NXP_SEMICONDUCTORS_2 2 #define I2C_DEVICE_ID_NXP_SEMICONDUCTORS_3 3 #define I2C_DEVICE_ID_RAMTRON_INTERNATIONAL 4 #define I2C_DEVICE_ID_ANALOG_DEVICES 5 #define I2C_DEVICE_ID_STMICROELECTRONICS 6 #define I2C_DEVICE_ID_ON_SEMICONDUCTOR 7 #define I2C_DEVICE_ID_SPRINTEK_CORPORATION 8 #define I2C_DEVICE_ID_ESPROS_PHOTONICS_AG 9 #define I2C_DEVICE_ID_FUJITSU_SEMICONDUCTOR 10 #define I2C_DEVICE_ID_FLIR 11 #define I2C_DEVICE_ID_O2MICRO 12 #define I2C_DEVICE_ID_ATMEL 13 #define I2C_DEVICE_ID_NONE 0xffff u16 part_id; u8 die_revision; }; enum i2c_alert_protocol { I2C_PROTOCOL_SMBUS_ALERT, I2C_PROTOCOL_SMBUS_HOST_NOTIFY, }; /** * struct i2c_driver - represent an I2C device driver * @class: What kind of i2c device we instantiate (for detect) * @probe: Callback for device binding - soon to be deprecated * @probe_new: New callback for device binding * @remove: Callback for device unbinding * @shutdown: Callback for device shutdown * @alert: Alert callback, for example for the SMBus alert protocol * @command: Callback for bus-wide signaling (optional) * @driver: Device driver model driver * @id_table: List of I2C devices supported by this driver * @detect: Callback for device detection * @address_list: The I2C addresses to probe (for detect) * @clients: List of detected clients we created (for i2c-core use only) * * The driver.owner field should be set to the module owner of this driver. * The driver.name field should be set to the name of this driver. * * For automatic device detection, both @detect and @address_list must * be defined. @class should also be set, otherwise only devices forced * with module parameters will be created. The detect function must * fill at least the name field of the i2c_board_info structure it is * handed upon successful detection, and possibly also the flags field. * * If @detect is missing, the driver will still work fine for enumerated * devices. Detected devices simply won't be supported. This is expected * for the many I2C/SMBus devices which can't be detected reliably, and * the ones which can always be enumerated in practice. * * The i2c_client structure which is handed to the @detect callback is * not a real i2c_client. It is initialized just enough so that you can * call i2c_smbus_read_byte_data and friends on it. Don't do anything * else with it. In particular, calling dev_dbg and friends on it is * not allowed. */ struct i2c_driver { unsigned int class; /* Standard driver model interfaces */ int (*probe)(struct i2c_client *client, const struct i2c_device_id *id); int (*remove)(struct i2c_client *client); /* New driver model interface to aid the seamless removal of the * current probe()'s, more commonly unused than used second parameter. */ int (*probe_new)(struct i2c_client *client); /* driver model interfaces that don't relate to enumeration */ void (*shutdown)(struct i2c_client *client); /* Alert callback, for example for the SMBus alert protocol. * The format and meaning of the data value depends on the protocol. * For the SMBus alert protocol, there is a single bit of data passed * as the alert response's low bit ("event flag"). * For the SMBus Host Notify protocol, the data corresponds to the * 16-bit payload data reported by the slave device acting as master. */ void (*alert)(struct i2c_client *client, enum i2c_alert_protocol protocol, unsigned int data); /* a ioctl like command that can be used to perform specific functions * with the device. */ int (*command)(struct i2c_client *client, unsigned int cmd, void *arg); struct device_driver driver; const struct i2c_device_id *id_table; /* Device detection callback for automatic device creation */ int (*detect)(struct i2c_client *client, struct i2c_board_info *info); const unsigned short *address_list; struct list_head clients; }; #define to_i2c_driver(d) container_of(d, struct i2c_driver, driver) /** * struct i2c_client - represent an I2C slave device * @flags: see I2C_CLIENT_* for possible flags * @addr: Address used on the I2C bus connected to the parent adapter. * @name: Indicates the type of the device, usually a chip name that's * generic enough to hide second-sourcing and compatible revisions. * @adapter: manages the bus segment hosting this I2C device * @dev: Driver model device node for the slave. * @init_irq: IRQ that was set at initialization * @irq: indicates the IRQ generated by this device (if any) * @detected: member of an i2c_driver.clients list or i2c-core's * userspace_devices list * @slave_cb: Callback when I2C slave mode of an adapter is used. The adapter * calls it to pass on slave events to the slave driver. * @devres_group_id: id of the devres group that will be created for resources * acquired when probing this device. * * An i2c_client identifies a single device (i.e. chip) connected to an * i2c bus. The behaviour exposed to Linux is defined by the driver * managing the device. */ struct i2c_client { unsigned short flags; /* div., see below */ #define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ #define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */ /* Must equal I2C_M_TEN below */ #define I2C_CLIENT_SLAVE 0x20 /* we are the slave */ #define I2C_CLIENT_HOST_NOTIFY 0x40 /* We want to use I2C host notify */ #define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */ #define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */ /* Must match I2C_M_STOP|IGNORE_NAK */ unsigned short addr; /* chip address - NOTE: 7bit */ /* addresses are stored in the */ /* _LOWER_ 7 bits */ char name[I2C_NAME_SIZE]; struct i2c_adapter *adapter; /* the adapter we sit on */ struct device dev; /* the device structure */ int init_irq; /* irq set at initialization */ int irq; /* irq issued by device */ struct list_head detected; #if IS_ENABLED(CONFIG_I2C_SLAVE) i2c_slave_cb_t slave_cb; /* callback for slave mode */ #endif void *devres_group_id; /* ID of probe devres group */ }; #define to_i2c_client(d) container_of(d, struct i2c_client, dev) struct i2c_adapter *i2c_verify_adapter(struct device *dev); const struct i2c_device_id *i2c_match_id(const struct i2c_device_id *id, const struct i2c_client *client); const void *i2c_get_match_data(const struct i2c_client *client); static inline struct i2c_client *kobj_to_i2c_client(struct kobject *kobj) { struct device * const dev = kobj_to_dev(kobj); return to_i2c_client(dev); } static inline void *i2c_get_clientdata(const struct i2c_client *client) { return dev_get_drvdata(&client->dev); } static inline void i2c_set_clientdata(struct i2c_client *client, void *data) { dev_set_drvdata(&client->dev, data); } /* I2C slave support */ #if IS_ENABLED(CONFIG_I2C_SLAVE) enum i2c_slave_event { I2C_SLAVE_READ_REQUESTED, I2C_SLAVE_WRITE_REQUESTED, I2C_SLAVE_READ_PROCESSED, I2C_SLAVE_WRITE_RECEIVED, I2C_SLAVE_STOP, }; int i2c_slave_register(struct i2c_client *client, i2c_slave_cb_t slave_cb); int i2c_slave_unregister(struct i2c_client *client); bool i2c_detect_slave_mode(struct device *dev); static inline int i2c_slave_event(struct i2c_client *client, enum i2c_slave_event event, u8 *val) { return client->slave_cb(client, event, val); } #else static inline bool i2c_detect_slave_mode(struct device *dev) { return false; } #endif /** * struct i2c_board_info - template for device creation * @type: chip type, to initialize i2c_client.name * @flags: to initialize i2c_client.flags * @addr: stored in i2c_client.addr * @dev_name: Overrides the default <busnr>-<addr> dev_name if set * @platform_data: stored in i2c_client.dev.platform_data * @of_node: pointer to OpenFirmware device node * @fwnode: device node supplied by the platform firmware * @swnode: software node for the device * @resources: resources associated with the device * @num_resources: number of resources in the @resources array * @irq: stored in i2c_client.irq * * I2C doesn't actually support hardware probing, although controllers and * devices may be able to use I2C_SMBUS_QUICK to tell whether or not there's * a device at a given address. Drivers commonly need more information than * that, such as chip type, configuration, associated IRQ, and so on. * * i2c_board_info is used to build tables of information listing I2C devices * that are present. This information is used to grow the driver model tree. * For mainboards this is done statically using i2c_register_board_info(); * bus numbers identify adapters that aren't yet available. For add-on boards, * i2c_new_client_device() does this dynamically with the adapter already known. */ struct i2c_board_info { char type[I2C_NAME_SIZE]; unsigned short flags; unsigned short addr; const char *dev_name; void *platform_data; struct device_node *of_node; struct fwnode_handle *fwnode; const struct software_node *swnode; const struct resource *resources; unsigned int num_resources; int irq; }; /** * I2C_BOARD_INFO - macro used to list an i2c device and its address * @dev_type: identifies the device type * @dev_addr: the device's address on the bus. * * This macro initializes essential fields of a struct i2c_board_info, * declaring what has been provided on a particular board. Optional * fields (such as associated irq, or device-specific platform_data) * are provided using conventional syntax. */ #define I2C_BOARD_INFO(dev_type, dev_addr) \ .type = dev_type, .addr = (dev_addr) #if IS_ENABLED(CONFIG_I2C) /* * Add-on boards should register/unregister their devices; e.g. a board * with integrated I2C, a config eeprom, sensors, and a codec that's * used in conjunction with the primary hardware. */ struct i2c_client * i2c_new_client_device(struct i2c_adapter *adap, struct i2c_board_info const *info); /* If you don't know the exact address of an I2C device, use this variant * instead, which can probe for device presence in a list of possible * addresses. The "probe" callback function is optional. If it is provided, * it must return 1 on successful probe, 0 otherwise. If it is not provided, * a default probing method is used. */ struct i2c_client * i2c_new_scanned_device(struct i2c_adapter *adap, struct i2c_board_info *info, unsigned short const *addr_list, int (*probe)(struct i2c_adapter *adap, unsigned short addr)); /* Common custom probe functions */ int i2c_probe_func_quick_read(struct i2c_adapter *adap, unsigned short addr); struct i2c_client * i2c_new_dummy_device(struct i2c_adapter *adapter, u16 address); struct i2c_client * devm_i2c_new_dummy_device(struct device *dev, struct i2c_adapter *adap, u16 address); struct i2c_client * i2c_new_ancillary_device(struct i2c_client *client, const char *name, u16 default_addr); void i2c_unregister_device(struct i2c_client *client); struct i2c_client *i2c_verify_client(struct device *dev); #else static inline struct i2c_client *i2c_verify_client(struct device *dev) { return NULL; } #endif /* I2C */ /* Mainboard arch_initcall() code should register all its I2C devices. * This is done at arch_initcall time, before declaring any i2c adapters. * Modules for add-on boards must use other calls. */ #ifdef CONFIG_I2C_BOARDINFO int i2c_register_board_info(int busnum, struct i2c_board_info const *info, unsigned n); #else static inline int i2c_register_board_info(int busnum, struct i2c_board_info const *info, unsigned n) { return 0; } #endif /* I2C_BOARDINFO */ /** * struct i2c_algorithm - represent I2C transfer method * @master_xfer: Issue a set of i2c transactions to the given I2C adapter * defined by the msgs array, with num messages available to transfer via * the adapter specified by adap. * @master_xfer_atomic: same as @master_xfer. Yet, only using atomic context * so e.g. PMICs can be accessed very late before shutdown. Optional. * @smbus_xfer: Issue smbus transactions to the given I2C adapter. If this * is not present, then the bus layer will try and convert the SMBus calls * into I2C transfers instead. * @smbus_xfer_atomic: same as @smbus_xfer. Yet, only using atomic context * so e.g. PMICs can be accessed very late before shutdown. Optional. * @functionality: Return the flags that this algorithm/adapter pair supports * from the ``I2C_FUNC_*`` flags. * @reg_slave: Register given client to I2C slave mode of this adapter * @unreg_slave: Unregister given client from I2C slave mode of this adapter * * The following structs are for those who like to implement new bus drivers: * i2c_algorithm is the interface to a class of hardware solutions which can * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584 * to name two of the most common. * * The return codes from the ``master_xfer{_atomic}`` fields should indicate the * type of error code that occurred during the transfer, as documented in the * Kernel Documentation file Documentation/i2c/fault-codes.rst. */ struct i2c_algorithm { /* * If an adapter algorithm can't do I2C-level access, set master_xfer * to NULL. If an adapter algorithm can do SMBus access, set * smbus_xfer. If set to NULL, the SMBus protocol is simulated * using common I2C messages. * * master_xfer should return the number of messages successfully * processed, or a negative value on error */ int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); int (*master_xfer_atomic)(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); int (*smbus_xfer)(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data); int (*smbus_xfer_atomic)(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data); /* To determine what the adapter supports */ u32 (*functionality)(struct i2c_adapter *adap); #if IS_ENABLED(CONFIG_I2C_SLAVE) int (*reg_slave)(struct i2c_client *client); int (*unreg_slave)(struct i2c_client *client); #endif }; /** * struct i2c_lock_operations - represent I2C locking operations * @lock_bus: Get exclusive access to an I2C bus segment * @trylock_bus: Try to get exclusive access to an I2C bus segment * @unlock_bus: Release exclusive access to an I2C bus segment * * The main operations are wrapped by i2c_lock_bus and i2c_unlock_bus. */ struct i2c_lock_operations { void (*lock_bus)(struct i2c_adapter *adapter, unsigned int flags); int (*trylock_bus)(struct i2c_adapter *adapter, unsigned int flags); void (*unlock_bus)(struct i2c_adapter *adapter, unsigned int flags); }; /** * struct i2c_timings - I2C timing information * @bus_freq_hz: the bus frequency in Hz * @scl_rise_ns: time SCL signal takes to rise in ns; t(r) in the I2C specification * @scl_fall_ns: time SCL signal takes to fall in ns; t(f) in the I2C specification * @scl_int_delay_ns: time IP core additionally needs to setup SCL in ns * @sda_fall_ns: time SDA signal takes to fall in ns; t(f) in the I2C specification * @sda_hold_ns: time IP core additionally needs to hold SDA in ns * @digital_filter_width_ns: width in ns of spikes on i2c lines that the IP core * digital filter can filter out * @analog_filter_cutoff_freq_hz: threshold frequency for the low pass IP core * analog filter */ struct i2c_timings { u32 bus_freq_hz; u32 scl_rise_ns; u32 scl_fall_ns; u32 scl_int_delay_ns; u32 sda_fall_ns; u32 sda_hold_ns; u32 digital_filter_width_ns; u32 analog_filter_cutoff_freq_hz; }; /** * struct i2c_bus_recovery_info - I2C bus recovery information * @recover_bus: Recover routine. Either pass driver's recover_bus() routine, or * i2c_generic_scl_recovery(). * @get_scl: This gets current value of SCL line. Mandatory for generic SCL * recovery. Populated internally for generic GPIO recovery. * @set_scl: This sets/clears the SCL line. Mandatory for generic SCL recovery. * Populated internally for generic GPIO recovery. * @get_sda: This gets current value of SDA line. This or set_sda() is mandatory * for generic SCL recovery. Populated internally, if sda_gpio is a valid * GPIO, for generic GPIO recovery. * @set_sda: This sets/clears the SDA line. This or get_sda() is mandatory for * generic SCL recovery. Populated internally, if sda_gpio is a valid GPIO, * for generic GPIO recovery. * @get_bus_free: Returns the bus free state as seen from the IP core in case it * has a more complex internal logic than just reading SDA. Optional. * @prepare_recovery: This will be called before starting recovery. Platform may * configure padmux here for SDA/SCL line or something else they want. * @unprepare_recovery: This will be called after completing recovery. Platform * may configure padmux here for SDA/SCL line or something else they want. * @scl_gpiod: gpiod of the SCL line. Only required for GPIO recovery. * @sda_gpiod: gpiod of the SDA line. Only required for GPIO recovery. * @pinctrl: pinctrl used by GPIO recovery to change the state of the I2C pins. * Optional. * @pins_default: default pinctrl state of SCL/SDA lines, when they are assigned * to the I2C bus. Optional. Populated internally for GPIO recovery, if * state with the name PINCTRL_STATE_DEFAULT is found and pinctrl is valid. * @pins_gpio: recovery pinctrl state of SCL/SDA lines, when they are used as * GPIOs. Optional. Populated internally for GPIO recovery, if this state * is called "gpio" or "recovery" and pinctrl is valid. */ struct i2c_bus_recovery_info { int (*recover_bus)(struct i2c_adapter *adap); int (*get_scl)(struct i2c_adapter *adap); void (*set_scl)(struct i2c_adapter *adap, int val); int (*get_sda)(struct i2c_adapter *adap); void (*set_sda)(struct i2c_adapter *adap, int val); int (*get_bus_free)(struct i2c_adapter *adap); void (*prepare_recovery)(struct i2c_adapter *adap); void (*unprepare_recovery)(struct i2c_adapter *adap); /* gpio recovery */ struct gpio_desc *scl_gpiod; struct gpio_desc *sda_gpiod; struct pinctrl *pinctrl; struct pinctrl_state *pins_default; struct pinctrl_state *pins_gpio; }; int i2c_recover_bus(struct i2c_adapter *adap); /* Generic recovery routines */ int i2c_generic_scl_recovery(struct i2c_adapter *adap); /** * struct i2c_adapter_quirks - describe flaws of an i2c adapter * @flags: see I2C_AQ_* for possible flags and read below * @max_num_msgs: maximum number of messages per transfer * @max_write_len: maximum length of a write message * @max_read_len: maximum length of a read message * @max_comb_1st_msg_len: maximum length of the first msg in a combined message * @max_comb_2nd_msg_len: maximum length of the second msg in a combined message * * Note about combined messages: Some I2C controllers can only send one message * per transfer, plus something called combined message or write-then-read. * This is (usually) a small write message followed by a read message and * barely enough to access register based devices like EEPROMs. There is a flag * to support this mode. It implies max_num_msg = 2 and does the length checks * with max_comb_*_len because combined message mode usually has its own * limitations. Because of HW implementations, some controllers can actually do * write-then-anything or other variants. To support that, write-then-read has * been broken out into smaller bits like write-first and read-second which can * be combined as needed. */ struct i2c_adapter_quirks { u64 flags; int max_num_msgs; u16 max_write_len; u16 max_read_len; u16 max_comb_1st_msg_len; u16 max_comb_2nd_msg_len; }; /* enforce max_num_msgs = 2 and use max_comb_*_len for length checks */ #define I2C_AQ_COMB BIT(0) /* first combined message must be write */ #define I2C_AQ_COMB_WRITE_FIRST BIT(1) /* second combined message must be read */ #define I2C_AQ_COMB_READ_SECOND BIT(2) /* both combined messages must have the same target address */ #define I2C_AQ_COMB_SAME_ADDR BIT(3) /* convenience macro for typical write-then read case */ #define I2C_AQ_COMB_WRITE_THEN_READ (I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | \ I2C_AQ_COMB_READ_SECOND | I2C_AQ_COMB_SAME_ADDR) /* clock stretching is not supported */ #define I2C_AQ_NO_CLK_STRETCH BIT(4) /* message cannot have length of 0 */ #define I2C_AQ_NO_ZERO_LEN_READ BIT(5) #define I2C_AQ_NO_ZERO_LEN_WRITE BIT(6) #define I2C_AQ_NO_ZERO_LEN (I2C_AQ_NO_ZERO_LEN_READ | I2C_AQ_NO_ZERO_LEN_WRITE) /* adapter cannot do repeated START */ #define I2C_AQ_NO_REP_START BIT(7) /* * i2c_adapter is the structure used to identify a physical i2c bus along * with the access algorithms necessary to access it. */ struct i2c_adapter { struct module *owner; unsigned int class; /* classes to allow probing for */ const struct i2c_algorithm *algo; /* the algorithm to access the bus */ void *algo_data; /* data fields that are valid for all devices */ const struct i2c_lock_operations *lock_ops; struct rt_mutex bus_lock; struct rt_mutex mux_lock; int timeout; /* in jiffies */ int retries; struct device dev; /* the adapter device */ unsigned long locked_flags; /* owned by the I2C core */ #define I2C_ALF_IS_SUSPENDED 0 #define I2C_ALF_SUSPEND_REPORTED 1 int nr; char name[48]; struct completion dev_released; struct mutex userspace_clients_lock; struct list_head userspace_clients; struct i2c_bus_recovery_info *bus_recovery_info; const struct i2c_adapter_quirks *quirks; struct irq_domain *host_notify_domain; struct regulator *bus_regulator; struct dentry *debugfs; /* 7bit address space */ DECLARE_BITMAP(addrs_in_instantiation, 1 << 7); }; #define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev) static inline void *i2c_get_adapdata(const struct i2c_adapter *adap) { return dev_get_drvdata(&adap->dev); } static inline void i2c_set_adapdata(struct i2c_adapter *adap, void *data) { dev_set_drvdata(&adap->dev, data); } static inline struct i2c_adapter * i2c_parent_is_i2c_adapter(const struct i2c_adapter *adapter) { #if IS_ENABLED(CONFIG_I2C_MUX) struct device *parent = adapter->dev.parent; if (parent != NULL && parent->type == &i2c_adapter_type) return to_i2c_adapter(parent); else #endif return NULL; } int i2c_for_each_dev(void *data, int (*fn)(struct device *dev, void *data)); /* Adapter locking functions, exported for shared pin cases */ #define I2C_LOCK_ROOT_ADAPTER BIT(0) #define I2C_LOCK_SEGMENT BIT(1) /** * i2c_lock_bus - Get exclusive access to an I2C bus segment * @adapter: Target I2C bus segment * @flags: I2C_LOCK_ROOT_ADAPTER locks the root i2c adapter, I2C_LOCK_SEGMENT * locks only this branch in the adapter tree */ static inline void i2c_lock_bus(struct i2c_adapter *adapter, unsigned int flags) { adapter->lock_ops->lock_bus(adapter, flags); } /** * i2c_trylock_bus - Try to get exclusive access to an I2C bus segment * @adapter: Target I2C bus segment * @flags: I2C_LOCK_ROOT_ADAPTER tries to locks the root i2c adapter, * I2C_LOCK_SEGMENT tries to lock only this branch in the adapter tree * * Return: true if the I2C bus segment is locked, false otherwise */ static inline int i2c_trylock_bus(struct i2c_adapter *adapter, unsigned int flags) { return adapter->lock_ops->trylock_bus(adapter, flags); } /** * i2c_unlock_bus - Release exclusive access to an I2C bus segment * @adapter: Target I2C bus segment * @flags: I2C_LOCK_ROOT_ADAPTER unlocks the root i2c adapter, I2C_LOCK_SEGMENT * unlocks only this branch in the adapter tree */ static inline void i2c_unlock_bus(struct i2c_adapter *adapter, unsigned int flags) { adapter->lock_ops->unlock_bus(adapter, flags); } /** * i2c_mark_adapter_suspended - Report suspended state of the adapter to the core * @adap: Adapter to mark as suspended * * When using this helper to mark an adapter as suspended, the core will reject * further transfers to this adapter. The usage of this helper is optional but * recommended for devices having distinct handlers for system suspend and * runtime suspend. More complex devices are free to implement custom solutions * to reject transfers when suspended. */ static inline void i2c_mark_adapter_suspended(struct i2c_adapter *adap) { i2c_lock_bus(adap, I2C_LOCK_ROOT_ADAPTER); set_bit(I2C_ALF_IS_SUSPENDED, &adap->locked_flags); i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER); } /** * i2c_mark_adapter_resumed - Report resumed state of the adapter to the core * @adap: Adapter to mark as resumed * * When using this helper to mark an adapter as resumed, the core will allow * further transfers to this adapter. See also further notes to * @i2c_mark_adapter_suspended(). */ static inline void i2c_mark_adapter_resumed(struct i2c_adapter *adap) { i2c_lock_bus(adap, I2C_LOCK_ROOT_ADAPTER); clear_bit(I2C_ALF_IS_SUSPENDED, &adap->locked_flags); i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER); } /* i2c adapter classes (bitmask) */ #define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ #define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */ #define I2C_CLASS_SPD (1<<7) /* Memory modules */ /* Warn users that the adapter doesn't support classes anymore */ #define I2C_CLASS_DEPRECATED (1<<8) /* Internal numbers to terminate lists */ #define I2C_CLIENT_END 0xfffeU /* Construct an I2C_CLIENT_END-terminated array of i2c addresses */ #define I2C_ADDRS(addr, addrs...) \ ((const unsigned short []){ addr, ## addrs, I2C_CLIENT_END }) /* ----- functions exported by i2c.o */ /* administration... */ #if IS_ENABLED(CONFIG_I2C) int i2c_add_adapter(struct i2c_adapter *adap); int devm_i2c_add_adapter(struct device *dev, struct i2c_adapter *adapter); void i2c_del_adapter(struct i2c_adapter *adap); int i2c_add_numbered_adapter(struct i2c_adapter *adap); int i2c_register_driver(struct module *owner, struct i2c_driver *driver); void i2c_del_driver(struct i2c_driver *driver); /* use a define to avoid include chaining to get THIS_MODULE */ #define i2c_add_driver(driver) \ i2c_register_driver(THIS_MODULE, driver) static inline bool i2c_client_has_driver(struct i2c_client *client) { return !IS_ERR_OR_NULL(client) && client->dev.driver; } /* call the i2c_client->command() of all attached clients with * the given arguments */ void i2c_clients_command(struct i2c_adapter *adap, unsigned int cmd, void *arg); struct i2c_adapter *i2c_get_adapter(int nr); void i2c_put_adapter(struct i2c_adapter *adap); unsigned int i2c_adapter_depth(struct i2c_adapter *adapter); void i2c_parse_fw_timings(struct device *dev, struct i2c_timings *t, bool use_defaults); /* Return the functionality mask */ static inline u32 i2c_get_functionality(struct i2c_adapter *adap) { return adap->algo->functionality(adap); } /* Return 1 if adapter supports everything we need, 0 if not. */ static inline int i2c_check_functionality(struct i2c_adapter *adap, u32 func) { return (func & i2c_get_functionality(adap)) == func; } /** * i2c_check_quirks() - Function for checking the quirk flags in an i2c adapter * @adap: i2c adapter * @quirks: quirk flags * * Return: true if the adapter has all the specified quirk flags, false if not */ static inline bool i2c_check_quirks(struct i2c_adapter *adap, u64 quirks) { if (!adap->quirks) return false; return (adap->quirks->flags & quirks) == quirks; } /* Return the adapter number for a specific adapter */ static inline int i2c_adapter_id(struct i2c_adapter *adap) { return adap->nr; } static inline u8 i2c_8bit_addr_from_msg(const struct i2c_msg *msg) { return (msg->addr << 1) | (msg->flags & I2C_M_RD ? 1 : 0); } u8 *i2c_get_dma_safe_msg_buf(struct i2c_msg *msg, unsigned int threshold); void i2c_put_dma_safe_msg_buf(u8 *buf, struct i2c_msg *msg, bool xferred); int i2c_handle_smbus_host_notify(struct i2c_adapter *adap, unsigned short addr); /** * module_i2c_driver() - Helper macro for registering a modular I2C driver * @__i2c_driver: i2c_driver struct * * Helper macro for I2C drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_i2c_driver(__i2c_driver) \ module_driver(__i2c_driver, i2c_add_driver, \ i2c_del_driver) /** * builtin_i2c_driver() - Helper macro for registering a builtin I2C driver * @__i2c_driver: i2c_driver struct * * Helper macro for I2C drivers which do not do anything special in their * init. This eliminates a lot of boilerplate. Each driver may only * use this macro once, and calling it replaces device_initcall(). */ #define builtin_i2c_driver(__i2c_driver) \ builtin_driver(__i2c_driver, i2c_add_driver) #endif /* I2C */ /* must call put_device() when done with returned i2c_client device */ struct i2c_client *i2c_find_device_by_fwnode(struct fwnode_handle *fwnode); /* must call put_device() when done with returned i2c_adapter device */ struct i2c_adapter *i2c_find_adapter_by_fwnode(struct fwnode_handle *fwnode); /* must call i2c_put_adapter() when done with returned i2c_adapter device */ struct i2c_adapter *i2c_get_adapter_by_fwnode(struct fwnode_handle *fwnode); #if IS_ENABLED(CONFIG_OF) /* must call put_device() when done with returned i2c_client device */ static inline struct i2c_client *of_find_i2c_device_by_node(struct device_node *node) { return i2c_find_device_by_fwnode(of_fwnode_handle(node)); } /* must call put_device() when done with returned i2c_adapter device */ static inline struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node) { return i2c_find_adapter_by_fwnode(of_fwnode_handle(node)); } /* must call i2c_put_adapter() when done with returned i2c_adapter device */ static inline struct i2c_adapter *of_get_i2c_adapter_by_node(struct device_node *node) { return i2c_get_adapter_by_fwnode(of_fwnode_handle(node)); } const struct of_device_id *i2c_of_match_device(const struct of_device_id *matches, struct i2c_client *client); int of_i2c_get_board_info(struct device *dev, struct device_node *node, struct i2c_board_info *info); #else static inline struct i2c_client *of_find_i2c_device_by_node(struct device_node *node) { return NULL; } static inline struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node) { return NULL; } static inline struct i2c_adapter *of_get_i2c_adapter_by_node(struct device_node *node) { return NULL; } static inline const struct of_device_id *i2c_of_match_device(const struct of_device_id *matches, struct i2c_client *client) { return NULL; } static inline int of_i2c_get_board_info(struct device *dev, struct device_node *node, struct i2c_board_info *info) { return -ENOTSUPP; } #endif /* CONFIG_OF */ struct acpi_resource; struct acpi_resource_i2c_serialbus; #if IS_REACHABLE(CONFIG_ACPI) && IS_REACHABLE(CONFIG_I2C) bool i2c_acpi_get_i2c_resource(struct acpi_resource *ares, struct acpi_resource_i2c_serialbus **i2c); int i2c_acpi_client_count(struct acpi_device *adev); u32 i2c_acpi_find_bus_speed(struct device *dev); struct i2c_client *i2c_acpi_new_device(struct device *dev, int index, struct i2c_board_info *info); struct i2c_adapter *i2c_acpi_find_adapter_by_handle(acpi_handle handle); #else static inline bool i2c_acpi_get_i2c_resource(struct acpi_resource *ares, struct acpi_resource_i2c_serialbus **i2c) { return false; } static inline int i2c_acpi_client_count(struct acpi_device *adev) { return 0; } static inline u32 i2c_acpi_find_bus_speed(struct device *dev) { return 0; } static inline struct i2c_client *i2c_acpi_new_device(struct device *dev, int index, struct i2c_board_info *info) { return ERR_PTR(-ENODEV); } static inline struct i2c_adapter *i2c_acpi_find_adapter_by_handle(acpi_handle handle) { return NULL; } #endif /* CONFIG_ACPI */ #endif /* _LINUX_I2C_H */ PK ! �|z�� � virtio_ring.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_VIRTIO_RING_H #define _LINUX_VIRTIO_RING_H #include <asm/barrier.h> #include <linux/irqreturn.h> #include <uapi/linux/virtio_ring.h> /* * Barriers in virtio are tricky. Non-SMP virtio guests can't assume * they're not on an SMP host system, so they need to assume real * barriers. Non-SMP virtio hosts could skip the barriers, but does * anyone care? * * For virtio_pci on SMP, we don't need to order with respect to MMIO * accesses through relaxed memory I/O windows, so virt_mb() et al are * sufficient. * * For using virtio to talk to real devices (eg. other heterogeneous * CPUs) we do need real barriers. In theory, we could be using both * kinds of virtio, so it's a runtime decision, and the branch is * actually quite cheap. */ static inline void virtio_mb(bool weak_barriers) { if (weak_barriers) virt_mb(); else mb(); } static inline void virtio_rmb(bool weak_barriers) { if (weak_barriers) virt_rmb(); else dma_rmb(); } static inline void virtio_wmb(bool weak_barriers) { if (weak_barriers) virt_wmb(); else dma_wmb(); } #define virtio_store_mb(weak_barriers, p, v) \ do { \ if (weak_barriers) { \ virt_store_mb(*p, v); \ } else { \ WRITE_ONCE(*p, v); \ mb(); \ } \ } while (0) \ struct virtio_device; struct virtqueue; /* * Creates a virtqueue and allocates the descriptor ring. If * may_reduce_num is set, then this may allocate a smaller ring than * expected. The caller should query virtqueue_get_vring_size to learn * the actual size of the ring. */ struct virtqueue *vring_create_virtqueue(unsigned int index, unsigned int num, unsigned int vring_align, struct virtio_device *vdev, bool weak_barriers, bool may_reduce_num, bool ctx, bool (*notify)(struct virtqueue *vq), void (*callback)(struct virtqueue *vq), const char *name); /* Creates a virtqueue with a custom layout. */ struct virtqueue *__vring_new_virtqueue(unsigned int index, struct vring vring, struct virtio_device *vdev, bool weak_barriers, bool ctx, bool (*notify)(struct virtqueue *), void (*callback)(struct virtqueue *), const char *name); /* * Creates a virtqueue with a standard layout but a caller-allocated * ring. */ struct virtqueue *vring_new_virtqueue(unsigned int index, unsigned int num, unsigned int vring_align, struct virtio_device *vdev, bool weak_barriers, bool ctx, void *pages, bool (*notify)(struct virtqueue *vq), void (*callback)(struct virtqueue *vq), const char *name); /* * Destroys a virtqueue. If created with vring_create_virtqueue, this * also frees the ring. */ void vring_del_virtqueue(struct virtqueue *vq); /* Filter out transport-specific feature bits. */ void vring_transport_features(struct virtio_device *vdev); irqreturn_t vring_interrupt(int irq, void *_vq); #endif /* _LINUX_VIRTIO_RING_H */ PK ! Yf� phonet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /** * file phonet.h * * Phonet sockets kernel interface * * Copyright (C) 2008 Nokia Corporation. All rights reserved. */ #ifndef LINUX_PHONET_H #define LINUX_PHONET_H #include <uapi/linux/phonet.h> #define SIOCPNGAUTOCONF (SIOCDEVPRIVATE + 0) struct if_phonet_autoconf { uint8_t device; }; struct if_phonet_req { char ifr_phonet_name[16]; union { struct if_phonet_autoconf ifru_phonet_autoconf; } ifr_ifru; }; #define ifr_phonet_autoconf ifr_ifru.ifru_phonet_autoconf #endif PK ! �Q�� l2tp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * L2TP-over-IP socket for L2TPv3. * * Author: James Chapman <jchapman@katalix.com> */ #ifndef _LINUX_L2TP_H_ #define _LINUX_L2TP_H_ #include <linux/in.h> #include <linux/in6.h> #include <uapi/linux/l2tp.h> #endif PK ! "��@" @" kfence.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Kernel Electric-Fence (KFENCE). Public interface for allocator and fault * handler integration. For more info see Documentation/dev-tools/kfence.rst. * * Copyright (C) 2020, Google LLC. */ #ifndef _LINUX_KFENCE_H #define _LINUX_KFENCE_H #include <linux/mm.h> #include <linux/types.h> #ifdef CONFIG_KFENCE #include <linux/atomic.h> #include <linux/static_key.h> /* * We allocate an even number of pages, as it simplifies calculations to map * address to metadata indices; effectively, the very first page serves as an * extended guard page, but otherwise has no special purpose. */ #define KFENCE_POOL_SIZE ((CONFIG_KFENCE_NUM_OBJECTS + 1) * 2 * PAGE_SIZE) extern char *__kfence_pool; DECLARE_STATIC_KEY_FALSE(kfence_allocation_key); extern atomic_t kfence_allocation_gate; /** * is_kfence_address() - check if an address belongs to KFENCE pool * @addr: address to check * * Return: true or false depending on whether the address is within the KFENCE * object range. * * KFENCE objects live in a separate page range and are not to be intermixed * with regular heap objects (e.g. KFENCE objects must never be added to the * allocator freelists). Failing to do so may and will result in heap * corruptions, therefore is_kfence_address() must be used to check whether * an object requires specific handling. * * Note: This function may be used in fast-paths, and is performance critical. * Future changes should take this into account; for instance, we want to avoid * introducing another load and therefore need to keep KFENCE_POOL_SIZE a * constant (until immediate patching support is added to the kernel). */ static __always_inline bool is_kfence_address(const void *addr) { /* * The __kfence_pool != NULL check is required to deal with the case * where __kfence_pool == NULL && addr < KFENCE_POOL_SIZE. Keep it in * the slow-path after the range-check! */ return unlikely((unsigned long)((char *)addr - __kfence_pool) < KFENCE_POOL_SIZE && __kfence_pool); } /** * kfence_alloc_pool() - allocate the KFENCE pool via memblock */ void __init kfence_alloc_pool(void); /** * kfence_init() - perform KFENCE initialization at boot time * * Requires that kfence_alloc_pool() was called before. This sets up the * allocation gate timer, and requires that workqueues are available. */ void __init kfence_init(void); /** * kfence_shutdown_cache() - handle shutdown_cache() for KFENCE objects * @s: cache being shut down * * Before shutting down a cache, one must ensure there are no remaining objects * allocated from it. Because KFENCE objects are not referenced from the cache * directly, we need to check them here. * * Note that shutdown_cache() is internal to SL*B, and kmem_cache_destroy() does * not return if allocated objects still exist: it prints an error message and * simply aborts destruction of a cache, leaking memory. * * If the only such objects are KFENCE objects, we will not leak the entire * cache, but instead try to provide more useful debug info by making allocated * objects "zombie allocations". Objects may then still be used or freed (which * is handled gracefully), but usage will result in showing KFENCE error reports * which include stack traces to the user of the object, the original allocation * site, and caller to shutdown_cache(). */ void kfence_shutdown_cache(struct kmem_cache *s); /* * Allocate a KFENCE object. Allocators must not call this function directly, * use kfence_alloc() instead. */ void *__kfence_alloc(struct kmem_cache *s, size_t size, gfp_t flags); /** * kfence_alloc() - allocate a KFENCE object with a low probability * @s: struct kmem_cache with object requirements * @size: exact size of the object to allocate (can be less than @s->size * e.g. for kmalloc caches) * @flags: GFP flags * * Return: * * NULL - must proceed with allocating as usual, * * non-NULL - pointer to a KFENCE object. * * kfence_alloc() should be inserted into the heap allocation fast path, * allowing it to transparently return KFENCE-allocated objects with a low * probability using a static branch (the probability is controlled by the * kfence.sample_interval boot parameter). */ static __always_inline void *kfence_alloc(struct kmem_cache *s, size_t size, gfp_t flags) { #if defined(CONFIG_KFENCE_STATIC_KEYS) || CONFIG_KFENCE_SAMPLE_INTERVAL == 0 if (!static_branch_unlikely(&kfence_allocation_key)) return NULL; #else if (!static_branch_likely(&kfence_allocation_key)) return NULL; #endif if (likely(atomic_read(&kfence_allocation_gate))) return NULL; return __kfence_alloc(s, size, flags); } /** * kfence_ksize() - get actual amount of memory allocated for a KFENCE object * @addr: pointer to a heap object * * Return: * * 0 - not a KFENCE object, must call __ksize() instead, * * non-0 - this many bytes can be accessed without causing a memory error. * * kfence_ksize() returns the number of bytes requested for a KFENCE object at * allocation time. This number may be less than the object size of the * corresponding struct kmem_cache. */ size_t kfence_ksize(const void *addr); /** * kfence_object_start() - find the beginning of a KFENCE object * @addr: address within a KFENCE-allocated object * * Return: address of the beginning of the object. * * SL[AU]B-allocated objects are laid out within a page one by one, so it is * easy to calculate the beginning of an object given a pointer inside it and * the object size. The same is not true for KFENCE, which places a single * object at either end of the page. This helper function is used to find the * beginning of a KFENCE-allocated object. */ void *kfence_object_start(const void *addr); /** * __kfence_free() - release a KFENCE heap object to KFENCE pool * @addr: object to be freed * * Requires: is_kfence_address(addr) * * Release a KFENCE object and mark it as freed. */ void __kfence_free(void *addr); /** * kfence_free() - try to release an arbitrary heap object to KFENCE pool * @addr: object to be freed * * Return: * * false - object doesn't belong to KFENCE pool and was ignored, * * true - object was released to KFENCE pool. * * Release a KFENCE object and mark it as freed. May be called on any object, * even non-KFENCE objects, to simplify integration of the hooks into the * allocator's free codepath. The allocator must check the return value to * determine if it was a KFENCE object or not. */ static __always_inline __must_check bool kfence_free(void *addr) { if (!is_kfence_address(addr)) return false; __kfence_free(addr); return true; } /** * kfence_handle_page_fault() - perform page fault handling for KFENCE pages * @addr: faulting address * @is_write: is access a write * @regs: current struct pt_regs (can be NULL, but shows full stack trace) * * Return: * * false - address outside KFENCE pool, * * true - page fault handled by KFENCE, no additional handling required. * * A page fault inside KFENCE pool indicates a memory error, such as an * out-of-bounds access, a use-after-free or an invalid memory access. In these * cases KFENCE prints an error message and marks the offending page as * present, so that the kernel can proceed. */ bool __must_check kfence_handle_page_fault(unsigned long addr, bool is_write, struct pt_regs *regs); #ifdef CONFIG_PRINTK struct kmem_obj_info; /** * __kfence_obj_info() - fill kmem_obj_info struct * @kpp: kmem_obj_info to be filled * @object: the object * @slab: the slab * * Return: * * false - not a KFENCE object * * true - a KFENCE object, filled @kpp * * Copies information to @kpp for KFENCE objects. */ bool __kfence_obj_info(struct kmem_obj_info *kpp, void *object, struct page *page); #endif #else /* CONFIG_KFENCE */ static inline bool is_kfence_address(const void *addr) { return false; } static inline void kfence_alloc_pool(void) { } static inline void kfence_init(void) { } static inline void kfence_shutdown_cache(struct kmem_cache *s) { } static inline void *kfence_alloc(struct kmem_cache *s, size_t size, gfp_t flags) { return NULL; } static inline size_t kfence_ksize(const void *addr) { return 0; } static inline void *kfence_object_start(const void *addr) { return NULL; } static inline void __kfence_free(void *addr) { } static inline bool __must_check kfence_free(void *addr) { return false; } static inline bool __must_check kfence_handle_page_fault(unsigned long addr, bool is_write, struct pt_regs *regs) { return false; } #ifdef CONFIG_PRINTK struct kmem_obj_info; static inline bool __kfence_obj_info(struct kmem_obj_info *kpp, void *object, struct page *page) { return false; } #endif #endif #endif /* _LINUX_KFENCE_H */ PK ! &���� � fs_enet_pd.hnu �[��� /* * Platform information definitions for the * universal Freescale Ethernet driver. * * Copyright (c) 2003 Intracom S.A. * by Pantelis Antoniou <panto@intracom.gr> * * 2005 (c) MontaVista Software, Inc. * Vitaly Bordug <vbordug@ru.mvista.com> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef FS_ENET_PD_H #define FS_ENET_PD_H #include <linux/clk.h> #include <linux/string.h> #include <linux/of_mdio.h> #include <linux/if_ether.h> #include <asm/types.h> #define FS_ENET_NAME "fs_enet" enum fs_id { fsid_fec1, fsid_fec2, fsid_fcc1, fsid_fcc2, fsid_fcc3, fsid_scc1, fsid_scc2, fsid_scc3, fsid_scc4, }; #define FS_MAX_INDEX 9 static inline int fs_get_fec_index(enum fs_id id) { if (id >= fsid_fec1 && id <= fsid_fec2) return id - fsid_fec1; return -1; } static inline int fs_get_fcc_index(enum fs_id id) { if (id >= fsid_fcc1 && id <= fsid_fcc3) return id - fsid_fcc1; return -1; } static inline int fs_get_scc_index(enum fs_id id) { if (id >= fsid_scc1 && id <= fsid_scc4) return id - fsid_scc1; return -1; } static inline int fs_fec_index2id(int index) { int id = fsid_fec1 + index - 1; if (id >= fsid_fec1 && id <= fsid_fec2) return id; return FS_MAX_INDEX; } static inline int fs_fcc_index2id(int index) { int id = fsid_fcc1 + index - 1; if (id >= fsid_fcc1 && id <= fsid_fcc3) return id; return FS_MAX_INDEX; } static inline int fs_scc_index2id(int index) { int id = fsid_scc1 + index - 1; if (id >= fsid_scc1 && id <= fsid_scc4) return id; return FS_MAX_INDEX; } enum fs_mii_method { fsmii_fixed, fsmii_fec, fsmii_bitbang, }; enum fs_ioport { fsiop_porta, fsiop_portb, fsiop_portc, fsiop_portd, fsiop_porte, }; struct fs_mii_bit { u32 offset; u8 bit; u8 polarity; }; struct fs_mii_bb_platform_info { struct fs_mii_bit mdio_dir; struct fs_mii_bit mdio_dat; struct fs_mii_bit mdc_dat; int delay; /* delay in us */ int irq[32]; /* irqs per phy's */ }; struct fs_platform_info { void(*init_ioports)(struct fs_platform_info *); /* device specific information */ int fs_no; /* controller index */ char fs_type[4]; /* controller type */ u32 cp_page; /* CPM page */ u32 cp_block; /* CPM sblock */ u32 cp_command; /* CPM page/sblock/mcn */ u32 clk_trx; /* some stuff for pins & mux configuration*/ u32 clk_rx; u32 clk_tx; u32 clk_route; u32 clk_mask; u32 mem_offset; u32 dpram_offset; u32 fcc_regs_c; u32 device_flags; struct device_node *phy_node; const struct fs_mii_bus_info *bus_info; int rx_ring, tx_ring; /* number of buffers on rx */ __u8 macaddr[ETH_ALEN]; /* mac address */ int rx_copybreak; /* limit we copy small frames */ int napi_weight; /* NAPI weight */ int use_rmii; /* use RMII mode */ int has_phy; /* if the network is phy container as well...*/ struct clk *clk_per; /* 'per' clock for register access */ }; struct fs_mii_fec_platform_info { u32 irq[32]; u32 mii_speed; }; static inline int fs_get_id(struct fs_platform_info *fpi) { if(strstr(fpi->fs_type, "SCC")) return fs_scc_index2id(fpi->fs_no); if(strstr(fpi->fs_type, "FCC")) return fs_fcc_index2id(fpi->fs_no); if(strstr(fpi->fs_type, "FEC")) return fs_fec_index2id(fpi->fs_no); return fpi->fs_no; } #endif PK ! �~�� H H tracepoint.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LINUX_TRACEPOINT_H #define _LINUX_TRACEPOINT_H /* * Kernel Tracepoint API. * * See Documentation/trace/tracepoints.rst. * * Copyright (C) 2008-2014 Mathieu Desnoyers <mathieu.desnoyers@efficios.com> * * Heavily inspired from the Linux Kernel Markers. */ #include <linux/smp.h> #include <linux/srcu.h> #include <linux/errno.h> #include <linux/types.h> #include <linux/cpumask.h> #include <linux/rcupdate.h> #include <linux/tracepoint-defs.h> #include <linux/static_call.h> struct module; struct tracepoint; struct notifier_block; struct trace_eval_map { const char *system; const char *eval_string; unsigned long eval_value; }; #define TRACEPOINT_DEFAULT_PRIO 10 extern struct srcu_struct tracepoint_srcu; extern int tracepoint_probe_register(struct tracepoint *tp, void *probe, void *data); extern int tracepoint_probe_register_prio(struct tracepoint *tp, void *probe, void *data, int prio); extern int tracepoint_probe_register_prio_may_exist(struct tracepoint *tp, void *probe, void *data, int prio); extern int tracepoint_probe_unregister(struct tracepoint *tp, void *probe, void *data); static inline int tracepoint_probe_register_may_exist(struct tracepoint *tp, void *probe, void *data) { return tracepoint_probe_register_prio_may_exist(tp, probe, data, TRACEPOINT_DEFAULT_PRIO); } extern void for_each_kernel_tracepoint(void (*fct)(struct tracepoint *tp, void *priv), void *priv); #ifdef CONFIG_MODULES struct tp_module { struct list_head list; struct module *mod; }; bool trace_module_has_bad_taint(struct module *mod); extern int register_tracepoint_module_notifier(struct notifier_block *nb); extern int unregister_tracepoint_module_notifier(struct notifier_block *nb); #else static inline bool trace_module_has_bad_taint(struct module *mod) { return false; } static inline int register_tracepoint_module_notifier(struct notifier_block *nb) { return 0; } static inline int unregister_tracepoint_module_notifier(struct notifier_block *nb) { return 0; } #endif /* CONFIG_MODULES */ /* * tracepoint_synchronize_unregister must be called between the last tracepoint * probe unregistration and the end of module exit to make sure there is no * caller executing a probe when it is freed. */ #ifdef CONFIG_TRACEPOINTS static inline void tracepoint_synchronize_unregister(void) { synchronize_srcu(&tracepoint_srcu); synchronize_rcu(); } #else static inline void tracepoint_synchronize_unregister(void) { } #endif #ifdef CONFIG_HAVE_SYSCALL_TRACEPOINTS extern int syscall_regfunc(void); extern void syscall_unregfunc(void); #endif /* CONFIG_HAVE_SYSCALL_TRACEPOINTS */ #ifndef PARAMS #define PARAMS(args...) args #endif #define TRACE_DEFINE_ENUM(x) #define TRACE_DEFINE_SIZEOF(x) #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS static inline struct tracepoint *tracepoint_ptr_deref(tracepoint_ptr_t *p) { return offset_to_ptr(p); } #define __TRACEPOINT_ENTRY(name) \ asm(" .section \"__tracepoints_ptrs\", \"a\" \n" \ " .balign 4 \n" \ " .long __tracepoint_" #name " - . \n" \ " .previous \n") #else static inline struct tracepoint *tracepoint_ptr_deref(tracepoint_ptr_t *p) { return *p; } #define __TRACEPOINT_ENTRY(name) \ static tracepoint_ptr_t __tracepoint_ptr_##name __used \ __section("__tracepoints_ptrs") = &__tracepoint_##name #endif #endif /* _LINUX_TRACEPOINT_H */ /* * Note: we keep the TRACE_EVENT and DECLARE_TRACE outside the include * file ifdef protection. * This is due to the way trace events work. If a file includes two * trace event headers under one "CREATE_TRACE_POINTS" the first include * will override the TRACE_EVENT and break the second include. */ #ifndef DECLARE_TRACE #define TP_PROTO(args...) args #define TP_ARGS(args...) args #define TP_CONDITION(args...) args /* * Individual subsystem my have a separate configuration to * enable their tracepoints. By default, this file will create * the tracepoints if CONFIG_TRACEPOINT is defined. If a subsystem * wants to be able to disable its tracepoints from being created * it can define NOTRACE before including the tracepoint headers. */ #if defined(CONFIG_TRACEPOINTS) && !defined(NOTRACE) #define TRACEPOINTS_ENABLED #endif #ifdef TRACEPOINTS_ENABLED #ifdef CONFIG_HAVE_STATIC_CALL #define __DO_TRACE_CALL(name, args) \ do { \ struct tracepoint_func *it_func_ptr; \ void *__data; \ it_func_ptr = \ rcu_dereference_raw((&__tracepoint_##name)->funcs); \ if (it_func_ptr) { \ __data = (it_func_ptr)->data; \ static_call(tp_func_##name)(__data, args); \ } \ } while (0) #else #define __DO_TRACE_CALL(name, args) __traceiter_##name(NULL, args) #endif /* CONFIG_HAVE_STATIC_CALL */ /* * it_func[0] is never NULL because there is at least one element in the array * when the array itself is non NULL. */ #define __DO_TRACE(name, args, cond, rcuidle) \ do { \ int __maybe_unused __idx = 0; \ \ if (!(cond)) \ return; \ \ /* srcu can't be used from NMI */ \ WARN_ON_ONCE(rcuidle && in_nmi()); \ \ /* keep srcu and sched-rcu usage consistent */ \ preempt_disable_notrace(); \ \ /* \ * For rcuidle callers, use srcu since sched-rcu \ * doesn't work from the idle path. \ */ \ if (rcuidle) { \ __idx = srcu_read_lock_notrace(&tracepoint_srcu);\ rcu_irq_enter_irqson(); \ } \ \ __DO_TRACE_CALL(name, TP_ARGS(args)); \ \ if (rcuidle) { \ rcu_irq_exit_irqson(); \ srcu_read_unlock_notrace(&tracepoint_srcu, __idx);\ } \ \ preempt_enable_notrace(); \ } while (0) #ifndef MODULE #define __DECLARE_TRACE_RCU(name, proto, args, cond) \ static inline void trace_##name##_rcuidle(proto) \ { \ if (static_key_false(&__tracepoint_##name.key)) \ __DO_TRACE(name, \ TP_ARGS(args), \ TP_CONDITION(cond), 1); \ } #else #define __DECLARE_TRACE_RCU(name, proto, args, cond) #endif /* * Make sure the alignment of the structure in the __tracepoints section will * not add unwanted padding between the beginning of the section and the * structure. Force alignment to the same alignment as the section start. * * When lockdep is enabled, we make sure to always test if RCU is * "watching" regardless if the tracepoint is enabled or not. Tracepoints * require RCU to be active, and it should always warn at the tracepoint * site if it is not watching, as it will need to be active when the * tracepoint is enabled. */ #define __DECLARE_TRACE(name, proto, args, cond, data_proto) \ extern int __traceiter_##name(data_proto); \ DECLARE_STATIC_CALL(tp_func_##name, __traceiter_##name); \ extern struct tracepoint __tracepoint_##name; \ static inline void trace_##name(proto) \ { \ if (static_key_false(&__tracepoint_##name.key)) \ __DO_TRACE(name, \ TP_ARGS(args), \ TP_CONDITION(cond), 0); \ if (IS_ENABLED(CONFIG_LOCKDEP) && (cond)) { \ WARN_ON_ONCE(!rcu_is_watching()); \ } \ } \ __DECLARE_TRACE_RCU(name, PARAMS(proto), PARAMS(args), \ PARAMS(cond)) \ static inline int \ register_trace_##name(void (*probe)(data_proto), void *data) \ { \ return tracepoint_probe_register(&__tracepoint_##name, \ (void *)probe, data); \ } \ static inline int \ register_trace_prio_##name(void (*probe)(data_proto), void *data,\ int prio) \ { \ return tracepoint_probe_register_prio(&__tracepoint_##name, \ (void *)probe, data, prio); \ } \ static inline int \ unregister_trace_##name(void (*probe)(data_proto), void *data) \ { \ return tracepoint_probe_unregister(&__tracepoint_##name,\ (void *)probe, data); \ } \ static inline void \ check_trace_callback_type_##name(void (*cb)(data_proto)) \ { \ } \ static inline bool \ trace_##name##_enabled(void) \ { \ return static_key_false(&__tracepoint_##name.key); \ } /* * We have no guarantee that gcc and the linker won't up-align the tracepoint * structures, so we create an array of pointers that will be used for iteration * on the tracepoints. */ #define DEFINE_TRACE_FN(_name, _reg, _unreg, proto, args) \ static const char __tpstrtab_##_name[] \ __section("__tracepoints_strings") = #_name; \ extern struct static_call_key STATIC_CALL_KEY(tp_func_##_name); \ int __traceiter_##_name(void *__data, proto); \ struct tracepoint __tracepoint_##_name __used \ __section("__tracepoints") = { \ .name = __tpstrtab_##_name, \ .key = STATIC_KEY_INIT_FALSE, \ .static_call_key = &STATIC_CALL_KEY(tp_func_##_name), \ .static_call_tramp = STATIC_CALL_TRAMP_ADDR(tp_func_##_name), \ .iterator = &__traceiter_##_name, \ .regfunc = _reg, \ .unregfunc = _unreg, \ .funcs = NULL }; \ __TRACEPOINT_ENTRY(_name); \ int __traceiter_##_name(void *__data, proto) \ { \ struct tracepoint_func *it_func_ptr; \ void *it_func; \ \ it_func_ptr = \ rcu_dereference_raw((&__tracepoint_##_name)->funcs); \ if (it_func_ptr) { \ do { \ it_func = READ_ONCE((it_func_ptr)->func); \ __data = (it_func_ptr)->data; \ ((void(*)(void *, proto))(it_func))(__data, args); \ } while ((++it_func_ptr)->func); \ } \ return 0; \ } \ DEFINE_STATIC_CALL(tp_func_##_name, __traceiter_##_name); #define DEFINE_TRACE(name, proto, args) \ DEFINE_TRACE_FN(name, NULL, NULL, PARAMS(proto), PARAMS(args)); #define EXPORT_TRACEPOINT_SYMBOL_GPL(name) \ EXPORT_SYMBOL_GPL(__tracepoint_##name); \ EXPORT_SYMBOL_GPL(__traceiter_##name); \ EXPORT_STATIC_CALL_GPL(tp_func_##name) #define EXPORT_TRACEPOINT_SYMBOL(name) \ EXPORT_SYMBOL(__tracepoint_##name); \ EXPORT_SYMBOL(__traceiter_##name); \ EXPORT_STATIC_CALL(tp_func_##name) #else /* !TRACEPOINTS_ENABLED */ #define __DECLARE_TRACE(name, proto, args, cond, data_proto) \ static inline void trace_##name(proto) \ { } \ static inline void trace_##name##_rcuidle(proto) \ { } \ static inline int \ register_trace_##name(void (*probe)(data_proto), \ void *data) \ { \ return -ENOSYS; \ } \ static inline int \ unregister_trace_##name(void (*probe)(data_proto), \ void *data) \ { \ return -ENOSYS; \ } \ static inline void check_trace_callback_type_##name(void (*cb)(data_proto)) \ { \ } \ static inline bool \ trace_##name##_enabled(void) \ { \ return false; \ } #define DEFINE_TRACE_FN(name, reg, unreg, proto, args) #define DEFINE_TRACE(name, proto, args) #define EXPORT_TRACEPOINT_SYMBOL_GPL(name) #define EXPORT_TRACEPOINT_SYMBOL(name) #endif /* TRACEPOINTS_ENABLED */ #ifdef CONFIG_TRACING /** * tracepoint_string - register constant persistent string to trace system * @str - a constant persistent string that will be referenced in tracepoints * * If constant strings are being used in tracepoints, it is faster and * more efficient to just save the pointer to the string and reference * that with a printf "%s" instead of saving the string in the ring buffer * and wasting space and time. * * The problem with the above approach is that userspace tools that read * the binary output of the trace buffers do not have access to the string. * Instead they just show the address of the string which is not very * useful to users. * * With tracepoint_string(), the string will be registered to the tracing * system and exported to userspace via the debugfs/tracing/printk_formats * file that maps the string address to the string text. This way userspace * tools that read the binary buffers have a way to map the pointers to * the ASCII strings they represent. * * The @str used must be a constant string and persistent as it would not * make sense to show a string that no longer exists. But it is still fine * to be used with modules, because when modules are unloaded, if they * had tracepoints, the ring buffers are cleared too. As long as the string * does not change during the life of the module, it is fine to use * tracepoint_string() within a module. */ #define tracepoint_string(str) \ ({ \ static const char *___tp_str __tracepoint_string = str; \ ___tp_str; \ }) #define __tracepoint_string __used __section("__tracepoint_str") #else /* * tracepoint_string() is used to save the string address for userspace * tracing tools. When tracing isn't configured, there's no need to save * anything. */ # define tracepoint_string(str) str # define __tracepoint_string #endif #define DECLARE_TRACE(name, proto, args) \ __DECLARE_TRACE(name, PARAMS(proto), PARAMS(args), \ cpu_online(raw_smp_processor_id()), \ PARAMS(void *__data, proto)) #define DECLARE_TRACE_CONDITION(name, proto, args, cond) \ __DECLARE_TRACE(name, PARAMS(proto), PARAMS(args), \ cpu_online(raw_smp_processor_id()) && (PARAMS(cond)), \ PARAMS(void *__data, proto)) #define TRACE_EVENT_FLAGS(event, flag) #define TRACE_EVENT_PERF_PERM(event, expr...) #endif /* DECLARE_TRACE */ #ifndef TRACE_EVENT /* * For use with the TRACE_EVENT macro: * * We define a tracepoint, its arguments, its printk format * and its 'fast binary record' layout. * * Firstly, name your tracepoint via TRACE_EVENT(name : the * 'subsystem_event' notation is fine. * * Think about this whole construct as the * 'trace_sched_switch() function' from now on. * * * TRACE_EVENT(sched_switch, * * * * * A function has a regular function arguments * * prototype, declare it via TP_PROTO(): * * * * TP_PROTO(struct rq *rq, struct task_struct *prev, * struct task_struct *next), * * * * * Define the call signature of the 'function'. * * (Design sidenote: we use this instead of a * * TP_PROTO1/TP_PROTO2/TP_PROTO3 ugliness.) * * * * TP_ARGS(rq, prev, next), * * * * * Fast binary tracing: define the trace record via * * TP_STRUCT__entry(). You can think about it like a * * regular C structure local variable definition. * * * * This is how the trace record is structured and will * * be saved into the ring buffer. These are the fields * * that will be exposed to user-space in * * /sys/kernel/debug/tracing/events/<*>/format. * * * * The declared 'local variable' is called '__entry' * * * * __field(pid_t, prev_pid) is equivalent to a standard declaration: * * * * pid_t prev_pid; * * * * __array(char, prev_comm, TASK_COMM_LEN) is equivalent to: * * * * char prev_comm[TASK_COMM_LEN]; * * * * TP_STRUCT__entry( * __array( char, prev_comm, TASK_COMM_LEN ) * __field( pid_t, prev_pid ) * __field( int, prev_prio ) * __array( char, next_comm, TASK_COMM_LEN ) * __field( pid_t, next_pid ) * __field( int, next_prio ) * ), * * * * * Assign the entry into the trace record, by embedding * * a full C statement block into TP_fast_assign(). You * * can refer to the trace record as '__entry' - * * otherwise you can put arbitrary C code in here. * * * * Note: this C code will execute every time a trace event * * happens, on an active tracepoint. * * * * TP_fast_assign( * memcpy(__entry->next_comm, next->comm, TASK_COMM_LEN); * __entry->prev_pid = prev->pid; * __entry->prev_prio = prev->prio; * memcpy(__entry->prev_comm, prev->comm, TASK_COMM_LEN); * __entry->next_pid = next->pid; * __entry->next_prio = next->prio; * ), * * * * * Formatted output of a trace record via TP_printk(). * * This is how the tracepoint will appear under ftrace * * plugins that make use of this tracepoint. * * * * (raw-binary tracing wont actually perform this step.) * * * * TP_printk("task %s:%d [%d] ==> %s:%d [%d]", * __entry->prev_comm, __entry->prev_pid, __entry->prev_prio, * __entry->next_comm, __entry->next_pid, __entry->next_prio), * * ); * * This macro construct is thus used for the regular printk format * tracing setup, it is used to construct a function pointer based * tracepoint callback (this is used by programmatic plugins and * can also by used by generic instrumentation like SystemTap), and * it is also used to expose a structured trace record in * /sys/kernel/debug/tracing/events/. * * A set of (un)registration functions can be passed to the variant * TRACE_EVENT_FN to perform any (un)registration work. */ #define DECLARE_EVENT_CLASS(name, proto, args, tstruct, assign, print) #define DEFINE_EVENT(template, name, proto, args) \ DECLARE_TRACE(name, PARAMS(proto), PARAMS(args)) #define DEFINE_EVENT_FN(template, name, proto, args, reg, unreg)\ DECLARE_TRACE(name, PARAMS(proto), PARAMS(args)) #define DEFINE_EVENT_PRINT(template, name, proto, args, print) \ DECLARE_TRACE(name, PARAMS(proto), PARAMS(args)) #define DEFINE_EVENT_CONDITION(template, name, proto, \ args, cond) \ DECLARE_TRACE_CONDITION(name, PARAMS(proto), \ PARAMS(args), PARAMS(cond)) #define TRACE_EVENT(name, proto, args, struct, assign, print) \ DECLARE_TRACE(name, PARAMS(proto), PARAMS(args)) #define TRACE_EVENT_FN(name, proto, args, struct, \ assign, print, reg, unreg) \ DECLARE_TRACE(name, PARAMS(proto), PARAMS(args)) #define TRACE_EVENT_FN_COND(name, proto, args, cond, struct, \ assign, print, reg, unreg) \ DECLARE_TRACE_CONDITION(name, PARAMS(proto), \ PARAMS(args), PARAMS(cond)) #define TRACE_EVENT_CONDITION(name, proto, args, cond, \ struct, assign, print) \ DECLARE_TRACE_CONDITION(name, PARAMS(proto), \ PARAMS(args), PARAMS(cond)) #define TRACE_EVENT_FLAGS(event, flag) #define TRACE_EVENT_PERF_PERM(event, expr...) #define DECLARE_EVENT_NOP(name, proto, args) \ static inline void trace_##name(proto) \ { } \ static inline bool trace_##name##_enabled(void) \ { \ return false; \ } #define TRACE_EVENT_NOP(name, proto, args, struct, assign, print) \ DECLARE_EVENT_NOP(name, PARAMS(proto), PARAMS(args)) #define DECLARE_EVENT_CLASS_NOP(name, proto, args, tstruct, assign, print) #define DEFINE_EVENT_NOP(template, name, proto, args) \ DECLARE_EVENT_NOP(name, PARAMS(proto), PARAMS(args)) #endif /* ifdef TRACE_EVENT (see note above) */ PK ! ��Sq$ q$ fortify-string.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FORTIFY_STRING_H_ #define _LINUX_FORTIFY_STRING_H_ #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS) extern void *__underlying_memchr(const void *p, int c, __kernel_size_t size) __RENAME(memchr); extern int __underlying_memcmp(const void *p, const void *q, __kernel_size_t size) __RENAME(memcmp); extern void *__underlying_memcpy(void *p, const void *q, __kernel_size_t size) __RENAME(memcpy); extern void *__underlying_memmove(void *p, const void *q, __kernel_size_t size) __RENAME(memmove); extern void *__underlying_memset(void *p, int c, __kernel_size_t size) __RENAME(memset); extern char *__underlying_strcat(char *p, const char *q) __RENAME(strcat); extern char *__underlying_strcpy(char *p, const char *q) __RENAME(strcpy); extern __kernel_size_t __underlying_strlen(const char *p) __RENAME(strlen); extern char *__underlying_strncat(char *p, const char *q, __kernel_size_t count) __RENAME(strncat); extern char *__underlying_strncpy(char *p, const char *q, __kernel_size_t size) __RENAME(strncpy); #else #define __underlying_memchr __builtin_memchr #define __underlying_memcmp __builtin_memcmp #define __underlying_memcpy __builtin_memcpy #define __underlying_memmove __builtin_memmove #define __underlying_memset __builtin_memset #define __underlying_strcat __builtin_strcat #define __underlying_strcpy __builtin_strcpy #define __underlying_strlen __builtin_strlen #define __underlying_strncat __builtin_strncat #define __underlying_strncpy __builtin_strncpy #endif __FORTIFY_INLINE char *strncpy(char *p, const char *q, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 1); if (__builtin_constant_p(size) && p_size < size) __write_overflow(); if (p_size < size) fortify_panic(__func__); return __underlying_strncpy(p, q, size); } __FORTIFY_INLINE char *strcat(char *p, const char *q) { size_t p_size = __builtin_object_size(p, 1); if (p_size == (size_t)-1) return __underlying_strcat(p, q); if (strlcat(p, q, p_size) >= p_size) fortify_panic(__func__); return p; } __FORTIFY_INLINE __kernel_size_t strlen(const char *p) { __kernel_size_t ret; size_t p_size = __builtin_object_size(p, 1); /* Work around gcc excess stack consumption issue */ if (p_size == (size_t)-1 || (__builtin_constant_p(p[p_size - 1]) && p[p_size - 1] == '\0')) return __underlying_strlen(p); ret = strnlen(p, p_size); if (p_size <= ret) fortify_panic(__func__); return ret; } extern __kernel_size_t __real_strnlen(const char *, __kernel_size_t) __RENAME(strnlen); __FORTIFY_INLINE __kernel_size_t strnlen(const char *p, __kernel_size_t maxlen) { size_t p_size = __builtin_object_size(p, 1); __kernel_size_t ret = __real_strnlen(p, maxlen < p_size ? maxlen : p_size); if (p_size <= ret && maxlen != ret) fortify_panic(__func__); return ret; } /* defined after fortified strlen to reuse it */ extern size_t __real_strlcpy(char *, const char *, size_t) __RENAME(strlcpy); __FORTIFY_INLINE size_t strlcpy(char *p, const char *q, size_t size) { size_t ret; size_t p_size = __builtin_object_size(p, 1); size_t q_size = __builtin_object_size(q, 1); if (p_size == (size_t)-1 && q_size == (size_t)-1) return __real_strlcpy(p, q, size); ret = strlen(q); if (size) { size_t len = (ret >= size) ? size - 1 : ret; if (__builtin_constant_p(len) && len >= p_size) __write_overflow(); if (len >= p_size) fortify_panic(__func__); __underlying_memcpy(p, q, len); p[len] = '\0'; } return ret; } /* defined after fortified strnlen to reuse it */ extern ssize_t __real_strscpy(char *, const char *, size_t) __RENAME(strscpy); __FORTIFY_INLINE ssize_t strscpy(char *p, const char *q, size_t size) { size_t len; /* Use string size rather than possible enclosing struct size. */ size_t p_size = __builtin_object_size(p, 1); size_t q_size = __builtin_object_size(q, 1); /* If we cannot get size of p and q default to call strscpy. */ if (p_size == (size_t) -1 && q_size == (size_t) -1) return __real_strscpy(p, q, size); /* * If size can be known at compile time and is greater than * p_size, generate a compile time write overflow error. */ if (__builtin_constant_p(size) && size > p_size) __write_overflow(); /* * This call protects from read overflow, because len will default to q * length if it smaller than size. */ len = strnlen(q, size); /* * If len equals size, we will copy only size bytes which leads to * -E2BIG being returned. * Otherwise we will copy len + 1 because of the final '\O'. */ len = len == size ? size : len + 1; /* * Generate a runtime write overflow error if len is greater than * p_size. */ if (len > p_size) fortify_panic(__func__); /* * We can now safely call vanilla strscpy because we are protected from: * 1. Read overflow thanks to call to strnlen(). * 2. Write overflow thanks to above ifs. */ return __real_strscpy(p, q, len); } /* defined after fortified strlen and strnlen to reuse them */ __FORTIFY_INLINE char *strncat(char *p, const char *q, __kernel_size_t count) { size_t p_len, copy_len; size_t p_size = __builtin_object_size(p, 1); size_t q_size = __builtin_object_size(q, 1); if (p_size == (size_t)-1 && q_size == (size_t)-1) return __underlying_strncat(p, q, count); p_len = strlen(p); copy_len = strnlen(q, count); if (p_size < p_len + copy_len + 1) fortify_panic(__func__); __underlying_memcpy(p + p_len, q, copy_len); p[p_len + copy_len] = '\0'; return p; } __FORTIFY_INLINE void *memset(void *p, int c, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 0); if (__builtin_constant_p(size) && p_size < size) __write_overflow(); if (p_size < size) fortify_panic(__func__); return __underlying_memset(p, c, size); } __FORTIFY_INLINE void *memcpy(void *p, const void *q, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 0); size_t q_size = __builtin_object_size(q, 0); if (__builtin_constant_p(size)) { if (p_size < size) __write_overflow(); if (q_size < size) __read_overflow2(); } if (p_size < size || q_size < size) fortify_panic(__func__); return __underlying_memcpy(p, q, size); } __FORTIFY_INLINE void *memmove(void *p, const void *q, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 0); size_t q_size = __builtin_object_size(q, 0); if (__builtin_constant_p(size)) { if (p_size < size) __write_overflow(); if (q_size < size) __read_overflow2(); } if (p_size < size || q_size < size) fortify_panic(__func__); return __underlying_memmove(p, q, size); } extern void *__real_memscan(void *, int, __kernel_size_t) __RENAME(memscan); __FORTIFY_INLINE void *memscan(void *p, int c, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 0); if (__builtin_constant_p(size) && p_size < size) __read_overflow(); if (p_size < size) fortify_panic(__func__); return __real_memscan(p, c, size); } __FORTIFY_INLINE int memcmp(const void *p, const void *q, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 0); size_t q_size = __builtin_object_size(q, 0); if (__builtin_constant_p(size)) { if (p_size < size) __read_overflow(); if (q_size < size) __read_overflow2(); } if (p_size < size || q_size < size) fortify_panic(__func__); return __underlying_memcmp(p, q, size); } __FORTIFY_INLINE void *memchr(const void *p, int c, __kernel_size_t size) { size_t p_size = __builtin_object_size(p, 0); if (__builtin_constant_p(size) && p_size < size) __read_overflow(); if (p_size < size) fortify_panic(__func__); return __underlying_memchr(p, c, size); } void *__real_memchr_inv(const void *s, int c, size_t n) __RENAME(memchr_inv); __FORTIFY_INLINE void *memchr_inv(const void *p, int c, size_t size) { size_t p_size = __builtin_object_size(p, 0); if (__builtin_constant_p(size) && p_size < size) __read_overflow(); if (p_size < size) fortify_panic(__func__); return __real_memchr_inv(p, c, size); } extern void *__real_kmemdup(const void *src, size_t len, gfp_t gfp) __RENAME(kmemdup); __FORTIFY_INLINE void *kmemdup(const void *p, size_t size, gfp_t gfp) { size_t p_size = __builtin_object_size(p, 0); if (__builtin_constant_p(size) && p_size < size) __read_overflow(); if (p_size < size) fortify_panic(__func__); return __real_kmemdup(p, size, gfp); } /* defined after fortified strlen and memcpy to reuse them */ __FORTIFY_INLINE char *strcpy(char *p, const char *q) { size_t p_size = __builtin_object_size(p, 1); size_t q_size = __builtin_object_size(q, 1); size_t size; if (p_size == (size_t)-1 && q_size == (size_t)-1) return __underlying_strcpy(p, q); size = strlen(q) + 1; /* Compile-time check for const size overflow. */ if (__builtin_constant_p(size) && p_size < size) __write_overflow(); /* Run-time check for dynamic size overflow. */ if (p_size < size) fortify_panic(__func__); memcpy(p, q, size); return p; } /* Don't use these outside the FORITFY_SOURCE implementation */ #undef __underlying_memchr #undef __underlying_memcmp #undef __underlying_memcpy #undef __underlying_memmove #undef __underlying_memset #undef __underlying_strcat #undef __underlying_strcpy #undef __underlying_strlen #undef __underlying_strncat #undef __underlying_strncpy #endif /* _LINUX_FORTIFY_STRING_H_ */ PK ! �֔[ [ debug_locks.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_DEBUG_LOCKING_H #define __LINUX_DEBUG_LOCKING_H #include <linux/atomic.h> #include <linux/cache.h> struct task_struct; extern int debug_locks __read_mostly; extern int debug_locks_silent __read_mostly; static __always_inline int __debug_locks_off(void) { return xchg(&debug_locks, 0); } /* * Generic 'turn off all lock debugging' function: */ extern int debug_locks_off(void); #define DEBUG_LOCKS_WARN_ON(c) \ ({ \ int __ret = 0; \ \ if (!oops_in_progress && unlikely(c)) { \ instrumentation_begin(); \ if (debug_locks_off() && !debug_locks_silent) \ WARN(1, "DEBUG_LOCKS_WARN_ON(%s)", #c); \ instrumentation_end(); \ __ret = 1; \ } \ __ret; \ }) #ifdef CONFIG_SMP # define SMP_DEBUG_LOCKS_WARN_ON(c) DEBUG_LOCKS_WARN_ON(c) #else # define SMP_DEBUG_LOCKS_WARN_ON(c) do { } while (0) #endif #ifdef CONFIG_DEBUG_LOCKING_API_SELFTESTS extern void locking_selftest(void); #else # define locking_selftest() do { } while (0) #endif struct task_struct; #ifdef CONFIG_LOCKDEP extern void debug_show_all_locks(void); extern void debug_show_held_locks(struct task_struct *task); extern void debug_check_no_locks_freed(const void *from, unsigned long len); extern void debug_check_no_locks_held(void); #else static inline void debug_show_all_locks(void) { } static inline void debug_show_held_locks(struct task_struct *task) { } static inline void debug_check_no_locks_freed(const void *from, unsigned long len) { } static inline void debug_check_no_locks_held(void) { } #endif #endif PK ! � `� � rcu_node_tree.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * RCU node combining tree definitions. These are used to compute * global attributes while avoiding common-case global contention. A key * property that these computations rely on is a tournament-style approach * where only one of the tasks contending a lower level in the tree need * advance to the next higher level. If properly configured, this allows * unlimited scalability while maintaining a constant level of contention * on the root node. * * This seemingly RCU-private file must be available to SRCU users * because the size of the TREE SRCU srcu_struct structure depends * on these definitions. * * Copyright IBM Corporation, 2017 * * Author: Paul E. McKenney <paulmck@linux.ibm.com> */ #ifndef __LINUX_RCU_NODE_TREE_H #define __LINUX_RCU_NODE_TREE_H #include <linux/math.h> /* * Define shape of hierarchy based on NR_CPUS, CONFIG_RCU_FANOUT, and * CONFIG_RCU_FANOUT_LEAF. * In theory, it should be possible to add more levels straightforwardly. * In practice, this did work well going from three levels to four. * Of course, your mileage may vary. */ #ifdef CONFIG_RCU_FANOUT #define RCU_FANOUT CONFIG_RCU_FANOUT #else /* #ifdef CONFIG_RCU_FANOUT */ # ifdef CONFIG_64BIT # define RCU_FANOUT 64 # else # define RCU_FANOUT 32 # endif #endif /* #else #ifdef CONFIG_RCU_FANOUT */ #ifdef CONFIG_RCU_FANOUT_LEAF #define RCU_FANOUT_LEAF CONFIG_RCU_FANOUT_LEAF #else /* #ifdef CONFIG_RCU_FANOUT_LEAF */ #define RCU_FANOUT_LEAF 16 #endif /* #else #ifdef CONFIG_RCU_FANOUT_LEAF */ #define RCU_FANOUT_1 (RCU_FANOUT_LEAF) #define RCU_FANOUT_2 (RCU_FANOUT_1 * RCU_FANOUT) #define RCU_FANOUT_3 (RCU_FANOUT_2 * RCU_FANOUT) #define RCU_FANOUT_4 (RCU_FANOUT_3 * RCU_FANOUT) #if NR_CPUS <= RCU_FANOUT_1 # define RCU_NUM_LVLS 1 # define NUM_RCU_LVL_0 1 # define NUM_RCU_NODES NUM_RCU_LVL_0 # define NUM_RCU_LVL_INIT { NUM_RCU_LVL_0 } # define RCU_NODE_NAME_INIT { "rcu_node_0" } # define RCU_FQS_NAME_INIT { "rcu_node_fqs_0" } #elif NR_CPUS <= RCU_FANOUT_2 # define RCU_NUM_LVLS 2 # define NUM_RCU_LVL_0 1 # define NUM_RCU_LVL_1 DIV_ROUND_UP(NR_CPUS, RCU_FANOUT_1) # define NUM_RCU_NODES (NUM_RCU_LVL_0 + NUM_RCU_LVL_1) # define NUM_RCU_LVL_INIT { NUM_RCU_LVL_0, NUM_RCU_LVL_1 } # define RCU_NODE_NAME_INIT { "rcu_node_0", "rcu_node_1" } # define RCU_FQS_NAME_INIT { "rcu_node_fqs_0", "rcu_node_fqs_1" } #elif NR_CPUS <= RCU_FANOUT_3 # define RCU_NUM_LVLS 3 # define NUM_RCU_LVL_0 1 # define NUM_RCU_LVL_1 DIV_ROUND_UP(NR_CPUS, RCU_FANOUT_2) # define NUM_RCU_LVL_2 DIV_ROUND_UP(NR_CPUS, RCU_FANOUT_1) # define NUM_RCU_NODES (NUM_RCU_LVL_0 + NUM_RCU_LVL_1 + NUM_RCU_LVL_2) # define NUM_RCU_LVL_INIT { NUM_RCU_LVL_0, NUM_RCU_LVL_1, NUM_RCU_LVL_2 } # define RCU_NODE_NAME_INIT { "rcu_node_0", "rcu_node_1", "rcu_node_2" } # define RCU_FQS_NAME_INIT { "rcu_node_fqs_0", "rcu_node_fqs_1", "rcu_node_fqs_2" } #elif NR_CPUS <= RCU_FANOUT_4 # define RCU_NUM_LVLS 4 # define NUM_RCU_LVL_0 1 # define NUM_RCU_LVL_1 DIV_ROUND_UP(NR_CPUS, RCU_FANOUT_3) # define NUM_RCU_LVL_2 DIV_ROUND_UP(NR_CPUS, RCU_FANOUT_2) # define NUM_RCU_LVL_3 DIV_ROUND_UP(NR_CPUS, RCU_FANOUT_1) # define NUM_RCU_NODES (NUM_RCU_LVL_0 + NUM_RCU_LVL_1 + NUM_RCU_LVL_2 + NUM_RCU_LVL_3) # define NUM_RCU_LVL_INIT { NUM_RCU_LVL_0, NUM_RCU_LVL_1, NUM_RCU_LVL_2, NUM_RCU_LVL_3 } # define RCU_NODE_NAME_INIT { "rcu_node_0", "rcu_node_1", "rcu_node_2", "rcu_node_3" } # define RCU_FQS_NAME_INIT { "rcu_node_fqs_0", "rcu_node_fqs_1", "rcu_node_fqs_2", "rcu_node_fqs_3" } #else # error "CONFIG_RCU_FANOUT insufficient for NR_CPUS" #endif /* #if (NR_CPUS) <= RCU_FANOUT_1 */ #endif /* __LINUX_RCU_NODE_TREE_H */ PK ! o� �� � marvell_phy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _MARVELL_PHY_H #define _MARVELL_PHY_H /* Mask used for ID comparisons */ #define MARVELL_PHY_ID_MASK 0xfffffff0 /* Known PHY IDs */ #define MARVELL_PHY_ID_88E1101 0x01410c60 #define MARVELL_PHY_ID_88E1112 0x01410c90 #define MARVELL_PHY_ID_88E1111 0x01410cc0 #define MARVELL_PHY_ID_88E1118 0x01410e10 #define MARVELL_PHY_ID_88E1121R 0x01410cb0 #define MARVELL_PHY_ID_88E1145 0x01410cd0 #define MARVELL_PHY_ID_88E1149R 0x01410e50 #define MARVELL_PHY_ID_88E1240 0x01410e30 #define MARVELL_PHY_ID_88E1318S 0x01410e90 #define MARVELL_PHY_ID_88E1340S 0x01410dc0 #define MARVELL_PHY_ID_88E1116R 0x01410e40 #define MARVELL_PHY_ID_88E1510 0x01410dd0 #define MARVELL_PHY_ID_88E1540 0x01410eb0 #define MARVELL_PHY_ID_88E1545 0x01410ea0 #define MARVELL_PHY_ID_88E1548P 0x01410ec0 #define MARVELL_PHY_ID_88E3016 0x01410e60 #define MARVELL_PHY_ID_88X3310 0x002b09a0 #define MARVELL_PHY_ID_88E2110 0x002b09b0 #define MARVELL_PHY_ID_88X2222 0x01410f10 /* Marvel 88E1111 in Finisar SFP module with modified PHY ID */ #define MARVELL_PHY_ID_88E1111_FINISAR 0x01ff0cc0 /* These Ethernet switch families contain embedded PHYs, but they do * not have a model ID. So the switch driver traps reads to the ID2 * register and returns the switch family ID */ #define MARVELL_PHY_ID_88E6341_FAMILY 0x01410f41 #define MARVELL_PHY_ID_88E6390_FAMILY 0x01410f90 #define MARVELL_PHY_ID_88E6393_FAMILY 0x002b0b9b #define MARVELL_PHY_FAMILY_ID(id) ((id) >> 4) /* struct phy_device dev_flags definitions */ #define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001 #define MARVELL_PHY_M1118_DNS323_LEDS 0x00000002 #define MARVELL_PHY_LED0_LINK_LED1_ACTIVE 0x00000004 #endif /* _MARVELL_PHY_H */ PK ! :Q��� � kernel_stat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KERNEL_STAT_H #define _LINUX_KERNEL_STAT_H #include <linux/smp.h> #include <linux/threads.h> #include <linux/percpu.h> #include <linux/cpumask.h> #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/vtime.h> #include <asm/irq.h> /* * 'kernel_stat.h' contains the definitions needed for doing * some kernel statistics (CPU usage, context switches ...), * used by rstatd/perfmeter */ enum cpu_usage_stat { CPUTIME_USER, CPUTIME_NICE, CPUTIME_SYSTEM, CPUTIME_SOFTIRQ, CPUTIME_IRQ, CPUTIME_IDLE, CPUTIME_IOWAIT, CPUTIME_STEAL, CPUTIME_GUEST, CPUTIME_GUEST_NICE, NR_STATS, }; struct kernel_cpustat { u64 cpustat[NR_STATS]; }; struct kernel_stat { unsigned long irqs_sum; unsigned int softirqs[NR_SOFTIRQS]; }; DECLARE_PER_CPU(struct kernel_stat, kstat); DECLARE_PER_CPU(struct kernel_cpustat, kernel_cpustat); /* Must have preemption disabled for this to be meaningful. */ #define kstat_this_cpu this_cpu_ptr(&kstat) #define kcpustat_this_cpu this_cpu_ptr(&kernel_cpustat) #define kstat_cpu(cpu) per_cpu(kstat, cpu) #define kcpustat_cpu(cpu) per_cpu(kernel_cpustat, cpu) extern unsigned long long nr_context_switches(void); extern unsigned int kstat_irqs_cpu(unsigned int irq, int cpu); extern void kstat_incr_irq_this_cpu(unsigned int irq); static inline void kstat_incr_softirqs_this_cpu(unsigned int irq) { __this_cpu_inc(kstat.softirqs[irq]); } static inline unsigned int kstat_softirqs_cpu(unsigned int irq, int cpu) { return kstat_cpu(cpu).softirqs[irq]; } /* * Number of interrupts per specific IRQ source, since bootup */ extern unsigned int kstat_irqs_usr(unsigned int irq); /* * Number of interrupts per cpu, since bootup */ static inline unsigned long kstat_cpu_irqs_sum(unsigned int cpu) { return kstat_cpu(cpu).irqs_sum; } #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN extern u64 kcpustat_field(struct kernel_cpustat *kcpustat, enum cpu_usage_stat usage, int cpu); extern void kcpustat_cpu_fetch(struct kernel_cpustat *dst, int cpu); #else static inline u64 kcpustat_field(struct kernel_cpustat *kcpustat, enum cpu_usage_stat usage, int cpu) { return kcpustat->cpustat[usage]; } static inline void kcpustat_cpu_fetch(struct kernel_cpustat *dst, int cpu) { *dst = kcpustat_cpu(cpu); } #endif extern void account_user_time(struct task_struct *, u64); extern void account_guest_time(struct task_struct *, u64); extern void account_system_time(struct task_struct *, int, u64); extern void account_system_index_time(struct task_struct *, u64, enum cpu_usage_stat); extern void account_steal_time(u64); extern void account_idle_time(u64); extern u64 get_idle_time(struct kernel_cpustat *kcs, int cpu); #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE static inline void account_process_tick(struct task_struct *tsk, int user) { vtime_flush(tsk); } #else extern void account_process_tick(struct task_struct *, int user); #endif extern void account_idle_ticks(unsigned long ticks); #endif /* _LINUX_KERNEL_STAT_H */ PK ! �@w� � sysfb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _LINUX_SYSFB_H #define _LINUX_SYSFB_H /* * Generic System Framebuffers on x86 * Copyright (c) 2012-2013 David Herrmann <dh.herrmann@gmail.com> */ #include <linux/kernel.h> #include <linux/platform_data/simplefb.h> #include <linux/screen_info.h> enum { M_I17, /* 17-Inch iMac */ M_I20, /* 20-Inch iMac */ M_I20_SR, /* 20-Inch iMac (Santa Rosa) */ M_I24, /* 24-Inch iMac */ M_I24_8_1, /* 24-Inch iMac, 8,1th gen */ M_I24_10_1, /* 24-Inch iMac, 10,1th gen */ M_I27_11_1, /* 27-Inch iMac, 11,1th gen */ M_MINI, /* Mac Mini */ M_MINI_3_1, /* Mac Mini, 3,1th gen */ M_MINI_4_1, /* Mac Mini, 4,1th gen */ M_MB, /* MacBook */ M_MB_2, /* MacBook, 2nd rev. */ M_MB_3, /* MacBook, 3rd rev. */ M_MB_5_1, /* MacBook, 5th rev. */ M_MB_6_1, /* MacBook, 6th rev. */ M_MB_7_1, /* MacBook, 7th rev. */ M_MB_SR, /* MacBook, 2nd gen, (Santa Rosa) */ M_MBA, /* MacBook Air */ M_MBA_3, /* Macbook Air, 3rd rev */ M_MBP, /* MacBook Pro */ M_MBP_2, /* MacBook Pro 2nd gen */ M_MBP_2_2, /* MacBook Pro 2,2nd gen */ M_MBP_SR, /* MacBook Pro (Santa Rosa) */ M_MBP_4, /* MacBook Pro, 4th gen */ M_MBP_5_1, /* MacBook Pro, 5,1th gen */ M_MBP_5_2, /* MacBook Pro, 5,2th gen */ M_MBP_5_3, /* MacBook Pro, 5,3rd gen */ M_MBP_6_1, /* MacBook Pro, 6,1th gen */ M_MBP_6_2, /* MacBook Pro, 6,2th gen */ M_MBP_7_1, /* MacBook Pro, 7,1th gen */ M_MBP_8_2, /* MacBook Pro, 8,2nd gen */ M_UNKNOWN /* placeholder */ }; struct efifb_dmi_info { char *optname; unsigned long base; int stride; int width; int height; int flags; }; #ifdef CONFIG_SYSFB void sysfb_disable(void); #else /* CONFIG_SYSFB */ static inline void sysfb_disable(void) { } #endif /* CONFIG_SYSFB */ #ifdef CONFIG_EFI extern struct efifb_dmi_info efifb_dmi_list[]; void sysfb_apply_efi_quirks(void); void sysfb_set_efifb_fwnode(struct platform_device *pd); #else /* CONFIG_EFI */ static inline void sysfb_apply_efi_quirks(void) { } static inline void sysfb_set_efifb_fwnode(struct platform_device *pd) { } #endif /* CONFIG_EFI */ #ifdef CONFIG_SYSFB_SIMPLEFB bool sysfb_parse_mode(const struct screen_info *si, struct simplefb_platform_data *mode); struct platform_device *sysfb_create_simplefb(const struct screen_info *si, const struct simplefb_platform_data *mode); #else /* CONFIG_SYSFB_SIMPLE */ static inline bool sysfb_parse_mode(const struct screen_info *si, struct simplefb_platform_data *mode) { return false; } static inline struct platform_device *sysfb_create_simplefb(const struct screen_info *si, const struct simplefb_platform_data *mode) { return ERR_PTR(-EINVAL); } #endif /* CONFIG_SYSFB_SIMPLE */ #endif /* _LINUX_SYSFB_H */ PK ! �*3�� � randomize_kstack.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _LINUX_RANDOMIZE_KSTACK_H #define _LINUX_RANDOMIZE_KSTACK_H #include <linux/kernel.h> #include <linux/jump_label.h> #include <linux/percpu-defs.h> DECLARE_STATIC_KEY_MAYBE(CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT, randomize_kstack_offset); DECLARE_PER_CPU(u32, kstack_offset); /* * Do not use this anywhere else in the kernel. This is used here because * it provides an arch-agnostic way to grow the stack with correct * alignment. Also, since this use is being explicitly masked to a max of * 10 bits, stack-clash style attacks are unlikely. For more details see * "VLAs" in Documentation/process/deprecated.rst * * The normal __builtin_alloca() is initialized with INIT_STACK_ALL (currently * only with Clang and not GCC). Initializing the unused area on each syscall * entry is expensive, and generating an implicit call to memset() may also be * problematic (such as in noinstr functions). Therefore, if the compiler * supports it (which it should if it initializes allocas), always use the * "uninitialized" variant of the builtin. */ #if __has_builtin(__builtin_alloca_uninitialized) #define __kstack_alloca __builtin_alloca_uninitialized #else #define __kstack_alloca __builtin_alloca #endif /* * Use, at most, 10 bits of entropy. We explicitly cap this to keep the * "VLA" from being unbounded (see above). 10 bits leaves enough room for * per-arch offset masks to reduce entropy (by removing higher bits, since * high entropy may overly constrain usable stack space), and for * compiler/arch-specific stack alignment to remove the lower bits. */ #define KSTACK_OFFSET_MAX(x) ((x) & 0x3FF) /* * These macros must be used during syscall entry when interrupts and * preempt are disabled, and after user registers have been stored to * the stack. */ #define add_random_kstack_offset() do { \ if (static_branch_maybe(CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT, \ &randomize_kstack_offset)) { \ u32 offset = raw_cpu_read(kstack_offset); \ u8 *ptr = __kstack_alloca(KSTACK_OFFSET_MAX(offset)); \ /* Keep allocation even after "ptr" loses scope. */ \ asm volatile("" :: "r"(ptr) : "memory"); \ } \ } while (0) #define choose_random_kstack_offset(rand) do { \ if (static_branch_maybe(CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT, \ &randomize_kstack_offset)) { \ u32 offset = raw_cpu_read(kstack_offset); \ offset ^= (rand); \ raw_cpu_write(kstack_offset, offset); \ } \ } while (0) #endif PK ! _'5<� � pata_arasan_cf_data.hnu �[��� /* * include/linux/pata_arasan_cf_data.h * * Arasan Compact Flash host controller platform data header file * * Copyright (C) 2011 ST Microelectronics * Viresh Kumar <vireshk@kernel.org> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef _PATA_ARASAN_CF_DATA_H #define _PATA_ARASAN_CF_DATA_H #include <linux/platform_device.h> struct arasan_cf_pdata { u8 cf_if_clk; #define CF_IF_CLK_100M (0x0) #define CF_IF_CLK_75M (0x1) #define CF_IF_CLK_66M (0x2) #define CF_IF_CLK_50M (0x3) #define CF_IF_CLK_40M (0x4) #define CF_IF_CLK_33M (0x5) #define CF_IF_CLK_25M (0x6) #define CF_IF_CLK_125M (0x7) #define CF_IF_CLK_150M (0x8) #define CF_IF_CLK_166M (0x9) #define CF_IF_CLK_200M (0xA) /* * Platform specific incapabilities of CF controller is handled via * quirks */ u32 quirk; #define CF_BROKEN_PIO (1) #define CF_BROKEN_MWDMA (1 << 1) #define CF_BROKEN_UDMA (1 << 2) }; static inline void set_arasan_cf_pdata(struct platform_device *pdev, struct arasan_cf_pdata *data) { pdev->dev.platform_data = data; } #endif /* _PATA_ARASAN_CF_DATA_H */ PK ! �<��� � kasan-tags.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KASAN_TAGS_H #define _LINUX_KASAN_TAGS_H #define KASAN_TAG_KERNEL 0xFF /* native kernel pointers tag */ #define KASAN_TAG_INVALID 0xFE /* inaccessible memory tag */ #define KASAN_TAG_MAX 0xFD /* maximum value for random tags */ #ifdef CONFIG_KASAN_HW_TAGS #define KASAN_TAG_MIN 0xF0 /* minimum value for random tags */ #else #define KASAN_TAG_MIN 0x00 /* minimum value for random tags */ #endif #endif /* LINUX_KASAN_TAGS_H */ PK ! I� �: �: preempt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PREEMPT_H #define __LINUX_PREEMPT_H /* * include/linux/preempt.h - macros for accessing and manipulating * preempt_count (used for kernel preemption, interrupt count, etc.) */ #include <linux/linkage.h> #include <linux/cleanup.h> #include <linux/list.h> /* * We put the hardirq and softirq counter into the preemption * counter. The bitmask has the following meaning: * * - bits 0-7 are the preemption count (max preemption depth: 256) * - bits 8-15 are the softirq count (max # of softirqs: 256) * * The hardirq count could in theory be the same as the number of * interrupts in the system, but we run all interrupt handlers with * interrupts disabled, so we cannot have nesting interrupts. Though * there are a few palaeontologic drivers which reenable interrupts in * the handler, so we need more than one bit here. * * PREEMPT_MASK: 0x000000ff * SOFTIRQ_MASK: 0x0000ff00 * HARDIRQ_MASK: 0x000f0000 * NMI_MASK: 0x00f00000 * PREEMPT_NEED_RESCHED: 0x80000000 */ #define PREEMPT_BITS 8 #define SOFTIRQ_BITS 8 #define HARDIRQ_BITS 4 #define NMI_BITS 4 #define PREEMPT_SHIFT 0 #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS) #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS) #define NMI_SHIFT (HARDIRQ_SHIFT + HARDIRQ_BITS) #define __IRQ_MASK(x) ((1UL << (x))-1) #define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT) #define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT) #define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT) #define NMI_MASK (__IRQ_MASK(NMI_BITS) << NMI_SHIFT) #define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT) #define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT) #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT) #define NMI_OFFSET (1UL << NMI_SHIFT) #define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) #define PREEMPT_DISABLED (PREEMPT_DISABLE_OFFSET + PREEMPT_ENABLED) /* * Disable preemption until the scheduler is running -- use an unconditional * value so that it also works on !PREEMPT_COUNT kernels. * * Reset by start_kernel()->sched_init()->init_idle()->init_idle_preempt_count(). */ #define INIT_PREEMPT_COUNT PREEMPT_OFFSET /* * Initial preempt_count value; reflects the preempt_count schedule invariant * which states that during context switches: * * preempt_count() == 2*PREEMPT_DISABLE_OFFSET * * Note: PREEMPT_DISABLE_OFFSET is 0 for !PREEMPT_COUNT kernels. * Note: See finish_task_switch(). */ #define FORK_PREEMPT_COUNT (2*PREEMPT_DISABLE_OFFSET + PREEMPT_ENABLED) /* preempt_count() and related functions, depends on PREEMPT_NEED_RESCHED */ #include <asm/preempt.h> /** * interrupt_context_level - return interrupt context level * * Returns the current interrupt context level. * 0 - normal context * 1 - softirq context * 2 - hardirq context * 3 - NMI context */ static __always_inline unsigned char interrupt_context_level(void) { unsigned long pc = preempt_count(); unsigned char level = 0; level += !!(pc & (NMI_MASK)); level += !!(pc & (NMI_MASK | HARDIRQ_MASK)); level += !!(pc & (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET)); return level; } /* * These macro definitions avoid redundant invocations of preempt_count() * because such invocations would result in redundant loads given that * preempt_count() is commonly implemented with READ_ONCE(). */ #define nmi_count() (preempt_count() & NMI_MASK) #define hardirq_count() (preempt_count() & HARDIRQ_MASK) #ifdef CONFIG_PREEMPT_RT # define softirq_count() (current->softirq_disable_cnt & SOFTIRQ_MASK) # define irq_count() ((preempt_count() & (NMI_MASK | HARDIRQ_MASK)) | softirq_count()) #else # define softirq_count() (preempt_count() & SOFTIRQ_MASK) # define irq_count() (preempt_count() & (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_MASK)) #endif /* * Macros to retrieve the current execution context: * * in_nmi() - We're in NMI context * in_hardirq() - We're in hard IRQ context * in_serving_softirq() - We're in softirq context * in_task() - We're in task context */ #define in_nmi() (nmi_count()) #define in_hardirq() (hardirq_count()) #define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) #ifdef CONFIG_PREEMPT_RT # define in_task() (!((preempt_count() & (NMI_MASK | HARDIRQ_MASK)) | in_serving_softirq())) #else # define in_task() (!(preempt_count() & (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET))) #endif /* * The following macros are deprecated and should not be used in new code: * in_irq() - Obsolete version of in_hardirq() * in_softirq() - We have BH disabled, or are processing softirqs * in_interrupt() - We're in NMI,IRQ,SoftIRQ context or have BH disabled */ #define in_irq() (hardirq_count()) #define in_softirq() (softirq_count()) #define in_interrupt() (irq_count()) /* * The preempt_count offset after preempt_disable(); */ #if defined(CONFIG_PREEMPT_COUNT) # define PREEMPT_DISABLE_OFFSET PREEMPT_OFFSET #else # define PREEMPT_DISABLE_OFFSET 0 #endif /* * The preempt_count offset after spin_lock() */ #if !defined(CONFIG_PREEMPT_RT) #define PREEMPT_LOCK_OFFSET PREEMPT_DISABLE_OFFSET #else #define PREEMPT_LOCK_OFFSET 0 #endif /* * The preempt_count offset needed for things like: * * spin_lock_bh() * * Which need to disable both preemption (CONFIG_PREEMPT_COUNT) and * softirqs, such that unlock sequences of: * * spin_unlock(); * local_bh_enable(); * * Work as expected. */ #define SOFTIRQ_LOCK_OFFSET (SOFTIRQ_DISABLE_OFFSET + PREEMPT_LOCK_OFFSET) /* * Are we running in atomic context? WARNING: this macro cannot * always detect atomic context; in particular, it cannot know about * held spinlocks in non-preemptible kernels. Thus it should not be * used in the general case to determine whether sleeping is possible. * Do not use in_atomic() in driver code. */ #define in_atomic() (preempt_count() != 0) /* * Check whether we were atomic before we did preempt_disable(): * (used by the scheduler) */ #define in_atomic_preempt_off() (preempt_count() != PREEMPT_DISABLE_OFFSET) #if defined(CONFIG_DEBUG_PREEMPT) || defined(CONFIG_TRACE_PREEMPT_TOGGLE) extern void preempt_count_add(int val); extern void preempt_count_sub(int val); #define preempt_count_dec_and_test() \ ({ preempt_count_sub(1); should_resched(0); }) #else #define preempt_count_add(val) __preempt_count_add(val) #define preempt_count_sub(val) __preempt_count_sub(val) #define preempt_count_dec_and_test() __preempt_count_dec_and_test() #endif #define __preempt_count_inc() __preempt_count_add(1) #define __preempt_count_dec() __preempt_count_sub(1) #define preempt_count_inc() preempt_count_add(1) #define preempt_count_dec() preempt_count_sub(1) #ifdef CONFIG_PREEMPT_COUNT #define preempt_disable() \ do { \ preempt_count_inc(); \ barrier(); \ } while (0) #define sched_preempt_enable_no_resched() \ do { \ barrier(); \ preempt_count_dec(); \ } while (0) #define preempt_enable_no_resched() sched_preempt_enable_no_resched() #define preemptible() (preempt_count() == 0 && !irqs_disabled()) #ifdef CONFIG_PREEMPTION #define preempt_enable() \ do { \ barrier(); \ if (unlikely(preempt_count_dec_and_test())) \ __preempt_schedule(); \ } while (0) #define preempt_enable_notrace() \ do { \ barrier(); \ if (unlikely(__preempt_count_dec_and_test())) \ __preempt_schedule_notrace(); \ } while (0) #define preempt_check_resched() \ do { \ if (should_resched(0)) \ __preempt_schedule(); \ } while (0) #else /* !CONFIG_PREEMPTION */ #define preempt_enable() \ do { \ barrier(); \ preempt_count_dec(); \ } while (0) #define preempt_enable_notrace() \ do { \ barrier(); \ __preempt_count_dec(); \ } while (0) #define preempt_check_resched() do { } while (0) #endif /* CONFIG_PREEMPTION */ #define preempt_disable_notrace() \ do { \ __preempt_count_inc(); \ barrier(); \ } while (0) #define preempt_enable_no_resched_notrace() \ do { \ barrier(); \ __preempt_count_dec(); \ } while (0) #else /* !CONFIG_PREEMPT_COUNT */ /* * Even if we don't have any preemption, we need preempt disable/enable * to be barriers, so that we don't have things like get_user/put_user * that can cause faults and scheduling migrate into our preempt-protected * region. */ #define preempt_disable() barrier() #define sched_preempt_enable_no_resched() barrier() #define preempt_enable_no_resched() barrier() #define preempt_enable() barrier() #define preempt_check_resched() do { } while (0) #define preempt_disable_notrace() barrier() #define preempt_enable_no_resched_notrace() barrier() #define preempt_enable_notrace() barrier() #define preemptible() 0 #endif /* CONFIG_PREEMPT_COUNT */ #ifdef MODULE /* * Modules have no business playing preemption tricks. */ #undef sched_preempt_enable_no_resched #undef preempt_enable_no_resched #undef preempt_enable_no_resched_notrace #undef preempt_check_resched #endif #define preempt_set_need_resched() \ do { \ set_preempt_need_resched(); \ } while (0) #define preempt_fold_need_resched() \ do { \ if (tif_need_resched()) \ set_preempt_need_resched(); \ } while (0) #ifdef CONFIG_PREEMPT_NOTIFIERS struct preempt_notifier; /** * preempt_ops - notifiers called when a task is preempted and rescheduled * @sched_in: we're about to be rescheduled: * notifier: struct preempt_notifier for the task being scheduled * cpu: cpu we're scheduled on * @sched_out: we've just been preempted * notifier: struct preempt_notifier for the task being preempted * next: the task that's kicking us out * * Please note that sched_in and out are called under different * contexts. sched_out is called with rq lock held and irq disabled * while sched_in is called without rq lock and irq enabled. This * difference is intentional and depended upon by its users. */ struct preempt_ops { void (*sched_in)(struct preempt_notifier *notifier, int cpu); void (*sched_out)(struct preempt_notifier *notifier, struct task_struct *next); }; /** * preempt_notifier - key for installing preemption notifiers * @link: internal use * @ops: defines the notifier functions to be called * * Usually used in conjunction with container_of(). */ struct preempt_notifier { struct hlist_node link; struct preempt_ops *ops; }; void preempt_notifier_inc(void); void preempt_notifier_dec(void); void preempt_notifier_register(struct preempt_notifier *notifier); void preempt_notifier_unregister(struct preempt_notifier *notifier); static inline void preempt_notifier_init(struct preempt_notifier *notifier, struct preempt_ops *ops) { INIT_HLIST_NODE(¬ifier->link); notifier->ops = ops; } #endif #ifdef CONFIG_SMP /* * Migrate-Disable and why it is undesired. * * When a preempted task becomes elegible to run under the ideal model (IOW it * becomes one of the M highest priority tasks), it might still have to wait * for the preemptee's migrate_disable() section to complete. Thereby suffering * a reduction in bandwidth in the exact duration of the migrate_disable() * section. * * Per this argument, the change from preempt_disable() to migrate_disable() * gets us: * * - a higher priority tasks gains reduced wake-up latency; with preempt_disable() * it would have had to wait for the lower priority task. * * - a lower priority tasks; which under preempt_disable() could've instantly * migrated away when another CPU becomes available, is now constrained * by the ability to push the higher priority task away, which might itself be * in a migrate_disable() section, reducing it's available bandwidth. * * IOW it trades latency / moves the interference term, but it stays in the * system, and as long as it remains unbounded, the system is not fully * deterministic. * * * The reason we have it anyway. * * PREEMPT_RT breaks a number of assumptions traditionally held. By forcing a * number of primitives into becoming preemptible, they would also allow * migration. This turns out to break a bunch of per-cpu usage. To this end, * all these primitives employ migirate_disable() to restore this implicit * assumption. * * This is a 'temporary' work-around at best. The correct solution is getting * rid of the above assumptions and reworking the code to employ explicit * per-cpu locking or short preempt-disable regions. * * The end goal must be to get rid of migrate_disable(), alternatively we need * a schedulability theory that does not depend on abritrary migration. * * * Notes on the implementation. * * The implementation is particularly tricky since existing code patterns * dictate neither migrate_disable() nor migrate_enable() is allowed to block. * This means that it cannot use cpus_read_lock() to serialize against hotplug, * nor can it easily migrate itself into a pending affinity mask change on * migrate_enable(). * * * Note: even non-work-conserving schedulers like semi-partitioned depends on * migration, so migrate_disable() is not only a problem for * work-conserving schedulers. * */ extern void migrate_disable(void); extern void migrate_enable(void); #else static inline void migrate_disable(void) { } static inline void migrate_enable(void) { } #endif /* CONFIG_SMP */ /** * preempt_disable_nested - Disable preemption inside a normally preempt disabled section * * Use for code which requires preemption protection inside a critical * section which has preemption disabled implicitly on non-PREEMPT_RT * enabled kernels, by e.g.: * - holding a spinlock/rwlock * - soft interrupt context * - regular interrupt handlers * * On PREEMPT_RT enabled kernels spinlock/rwlock held sections, soft * interrupt context and regular interrupt handlers are preemptible and * only prevent migration. preempt_disable_nested() ensures that preemption * is disabled for cases which require CPU local serialization even on * PREEMPT_RT. For non-PREEMPT_RT kernels this is a NOP. * * The use cases are code sequences which are not serialized by a * particular lock instance, e.g.: * - seqcount write side critical sections where the seqcount is not * associated to a particular lock and therefore the automatic * protection mechanism does not work. This prevents a live lock * against a preempting high priority reader. * - RMW per CPU variable updates like vmstat. */ /* Macro to avoid header recursion hell vs. lockdep */ #define preempt_disable_nested() \ do { \ if (IS_ENABLED(CONFIG_PREEMPT_RT)) \ preempt_disable(); \ else \ lockdep_assert_preemption_disabled(); \ } while (0) /** * preempt_enable_nested - Undo the effect of preempt_disable_nested() */ static __always_inline void preempt_enable_nested(void) { if (IS_ENABLED(CONFIG_PREEMPT_RT)) preempt_enable(); } DEFINE_LOCK_GUARD_0(preempt, preempt_disable(), preempt_enable()) DEFINE_LOCK_GUARD_0(preempt_notrace, preempt_disable_notrace(), preempt_enable_notrace()) DEFINE_LOCK_GUARD_0(migrate, migrate_disable(), migrate_enable()) #endif /* __LINUX_PREEMPT_H */ PK ! Oޝ� � s3c_adc_battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _S3C_ADC_BATTERY_H #define _S3C_ADC_BATTERY_H struct s3c_adc_bat_thresh { int volt; /* mV */ int cur; /* mA */ int level; /* percent */ }; struct s3c_adc_bat_pdata { int (*init)(void); void (*exit)(void); void (*enable_charger)(void); void (*disable_charger)(void); const struct s3c_adc_bat_thresh *lut_noac; unsigned int lut_noac_cnt; const struct s3c_adc_bat_thresh *lut_acin; unsigned int lut_acin_cnt; const unsigned int volt_channel; const unsigned int current_channel; const unsigned int backup_volt_channel; const unsigned int volt_samples; const unsigned int current_samples; const unsigned int backup_volt_samples; const unsigned int volt_mult; const unsigned int current_mult; const unsigned int backup_volt_mult; const unsigned int internal_impedance; const unsigned int backup_volt_max; const unsigned int backup_volt_min; }; #endif PK ! �"�i! i! compiler.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_COMPILER_H #define __LINUX_COMPILER_H #include <linux/compiler_types.h> #ifndef __ASSEMBLY__ #ifdef __KERNEL__ /* * Note: DISABLE_BRANCH_PROFILING can be used by special lowlevel code * to disable branch tracing on a per file basis. */ #if defined(CONFIG_TRACE_BRANCH_PROFILING) \ && !defined(DISABLE_BRANCH_PROFILING) && !defined(__CHECKER__) void ftrace_likely_update(struct ftrace_likely_data *f, int val, int expect, int is_constant); #define likely_notrace(x) __builtin_expect(!!(x), 1) #define unlikely_notrace(x) __builtin_expect(!!(x), 0) #define __branch_check__(x, expect, is_constant) ({ \ long ______r; \ static struct ftrace_likely_data \ __aligned(4) \ __section("_ftrace_annotated_branch") \ ______f = { \ .data.func = __func__, \ .data.file = __FILE__, \ .data.line = __LINE__, \ }; \ ______r = __builtin_expect(!!(x), expect); \ ftrace_likely_update(&______f, ______r, \ expect, is_constant); \ ______r; \ }) /* * Using __builtin_constant_p(x) to ignore cases where the return * value is always the same. This idea is taken from a similar patch * written by Daniel Walker. */ # ifndef likely # define likely(x) (__branch_check__(x, 1, __builtin_constant_p(x))) # endif # ifndef unlikely # define unlikely(x) (__branch_check__(x, 0, __builtin_constant_p(x))) # endif #ifdef CONFIG_PROFILE_ALL_BRANCHES /* * "Define 'is'", Bill Clinton * "Define 'if'", Steven Rostedt */ #define if(cond, ...) if ( __trace_if_var( !!(cond , ## __VA_ARGS__) ) ) #define __trace_if_var(cond) (__builtin_constant_p(cond) ? (cond) : __trace_if_value(cond)) #define __trace_if_value(cond) ({ \ static struct ftrace_branch_data \ __aligned(4) \ __section("_ftrace_branch") \ __if_trace = { \ .func = __func__, \ .file = __FILE__, \ .line = __LINE__, \ }; \ (cond) ? \ (__if_trace.miss_hit[1]++,1) : \ (__if_trace.miss_hit[0]++,0); \ }) #endif /* CONFIG_PROFILE_ALL_BRANCHES */ #else # define likely(x) __builtin_expect(!!(x), 1) # define unlikely(x) __builtin_expect(!!(x), 0) # define likely_notrace(x) likely(x) # define unlikely_notrace(x) unlikely(x) #endif /* Optimization barrier */ #ifndef barrier /* The "volatile" is due to gcc bugs */ # define barrier() __asm__ __volatile__("": : :"memory") #endif #ifndef barrier_data /* * This version is i.e. to prevent dead stores elimination on @ptr * where gcc and llvm may behave differently when otherwise using * normal barrier(): while gcc behavior gets along with a normal * barrier(), llvm needs an explicit input variable to be assumed * clobbered. The issue is as follows: while the inline asm might * access any memory it wants, the compiler could have fit all of * @ptr into memory registers instead, and since @ptr never escaped * from that, it proved that the inline asm wasn't touching any of * it. This version works well with both compilers, i.e. we're telling * the compiler that the inline asm absolutely may see the contents * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 */ # define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") #endif /* workaround for GCC PR82365 if needed */ #ifndef barrier_before_unreachable # define barrier_before_unreachable() do { } while (0) #endif /* Unreachable code */ #ifdef CONFIG_STACK_VALIDATION /* * These macros help objtool understand GCC code flow for unreachable code. * The __COUNTER__ based labels are a hack to make each instance of the macros * unique, to convince GCC not to merge duplicate inline asm statements. */ #define __stringify_label(n) #n #define __annotate_unreachable(c) ({ \ asm volatile(__stringify_label(c) ":\n\t" \ ".pushsection .discard.unreachable\n\t" \ ".long " __stringify_label(c) "b - .\n\t" \ ".popsection\n\t" : : "i" (c)); \ }) #define annotate_unreachable() __annotate_unreachable(__COUNTER__) #define ASM_REACHABLE \ "998:\n\t" \ ".pushsection .discard.reachable\n\t" \ ".long 998b - .\n\t" \ ".popsection\n\t" /* Annotate a C jump table to allow objtool to follow the code flow */ #define __annotate_jump_table __section(".rodata..c_jump_table") #else #define annotate_unreachable() # define ASM_REACHABLE #define __annotate_jump_table #endif #ifndef unreachable # define unreachable() do { \ annotate_unreachable(); \ __builtin_unreachable(); \ } while (0) #endif /* * KENTRY - kernel entry point * This can be used to annotate symbols (functions or data) that are used * without their linker symbol being referenced explicitly. For example, * interrupt vector handlers, or functions in the kernel image that are found * programatically. * * Not required for symbols exported with EXPORT_SYMBOL, or initcalls. Those * are handled in their own way (with KEEP() in linker scripts). * * KENTRY can be avoided if the symbols in question are marked as KEEP() in the * linker script. For example an architecture could KEEP() its entire * boot/exception vector code rather than annotate each function and data. */ #ifndef KENTRY # define KENTRY(sym) \ extern typeof(sym) sym; \ static const unsigned long __kentry_##sym \ __used \ __attribute__((__section__("___kentry+" #sym))) \ = (unsigned long)&sym; #endif #ifndef RELOC_HIDE # define RELOC_HIDE(ptr, off) \ ({ unsigned long __ptr; \ __ptr = (unsigned long) (ptr); \ (typeof(ptr)) (__ptr + (off)); }) #endif #define absolute_pointer(val) RELOC_HIDE((void *)(val), 0) #ifndef OPTIMIZER_HIDE_VAR /* Make the optimizer believe the variable can be manipulated arbitrarily. */ #define OPTIMIZER_HIDE_VAR(var) \ __asm__ ("" : "=r" (var) : "0" (var)) #endif /* Not-quite-unique ID. */ #ifndef __UNIQUE_ID # define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __LINE__) #endif /** * data_race - mark an expression as containing intentional data races * * This data_race() macro is useful for situations in which data races * should be forgiven. One example is diagnostic code that accesses * shared variables but is not a part of the core synchronization design. * * This macro *does not* affect normal code generation, but is a hint * to tooling that data races here are to be ignored. */ #define data_race(expr) \ ({ \ __unqual_scalar_typeof(({ expr; })) __v = ({ \ __kcsan_disable_current(); \ expr; \ }); \ __kcsan_enable_current(); \ __v; \ }) /* * With CONFIG_CFI_CLANG, the compiler replaces function addresses in * instrumented C code with jump table addresses. Architectures that * support CFI can define this macro to return the actual function address * when needed. */ #ifndef function_nocfi #define function_nocfi(x) (x) #endif #endif /* __KERNEL__ */ /** * offset_to_ptr - convert a relative memory offset to an absolute pointer * @off: the address of the 32-bit offset value */ static inline void *offset_to_ptr(const int *off) { return (void *)((unsigned long)off + *off); } #endif /* __ASSEMBLY__ */ #ifdef CONFIG_64BIT #define ARCH_SEL(a,b) a #else #define ARCH_SEL(a,b) b #endif /* * Force the compiler to emit 'sym' as a symbol, so that we can reference * it from inline assembler. Necessary in case 'sym' could be inlined * otherwise, or eliminated entirely due to lack of references that are * visible to the compiler. */ #define __ADDRESSABLE(sym) \ static void * __section(".discard.addressable") __used \ __UNIQUE_ID(__PASTE(__addressable_,sym)) = (void *)&sym; /* &a[0] degrades to a pointer: a different type from an array */ #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) /* * Whether 'type' is a signed type or an unsigned type. Supports scalar types, * bool and also pointer types. */ #define is_signed_type(type) (((type)(-1)) < (__force type)1) /* * Useful shorthand for "is this condition known at compile-time?" * * Note that the condition may involve non-constant values, * but the compiler may know enough about the details of the * values to determine that the condition is statically true. */ #define statically_true(x) (__builtin_constant_p(x) && (x)) /* * This is needed in functions which generate the stack canary, see * arch/x86/kernel/smpboot.c::start_secondary() for an example. */ #define prevent_tail_call_optimization() mb() #include <asm/rwonce.h> #endif /* __LINUX_COMPILER_H */ PK ! Kͦҵ � amd-iommu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. * Author: Joerg Roedel <joerg.roedel@amd.com> * Leo Duran <leo.duran@amd.com> */ #ifndef _ASM_X86_AMD_IOMMU_H #define _ASM_X86_AMD_IOMMU_H #include <linux/types.h> struct amd_iommu; /* * This is mainly used to communicate information back-and-forth * between SVM and IOMMU for setting up and tearing down posted * interrupt */ struct amd_iommu_pi_data { u32 ga_tag; u32 prev_ga_tag; u64 base; bool is_guest_mode; struct vcpu_data *vcpu_data; void *ir_data; }; #ifdef CONFIG_AMD_IOMMU struct task_struct; struct pci_dev; extern int amd_iommu_detect(void); extern int amd_iommu_init_hardware(void); /** * amd_iommu_init_device() - Init device for use with IOMMUv2 driver * @pdev: The PCI device to initialize * @pasids: Number of PASIDs to support for this device * * This function does all setup for the device pdev so that it can be * used with IOMMUv2. * Returns 0 on success or negative value on error. */ extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids); /** * amd_iommu_free_device() - Free all IOMMUv2 related device resources * and disable IOMMUv2 usage for this device * @pdev: The PCI device to disable IOMMUv2 usage for' */ extern void amd_iommu_free_device(struct pci_dev *pdev); /** * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device * @pdev: The PCI device to bind the task to * @pasid: The PASID on the device the task should be bound to * @task: the task to bind * * The function returns 0 on success or a negative value on error. */ extern int amd_iommu_bind_pasid(struct pci_dev *pdev, u32 pasid, struct task_struct *task); /** * amd_iommu_unbind_pasid() - Unbind a PASID from its task on * a device * @pdev: The device of the PASID * @pasid: The PASID to unbind * * When this function returns the device is no longer using the PASID * and the PASID is no longer bound to its task. */ extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, u32 pasid); /** * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed * PRI requests * @pdev: The PCI device the call-back should be registered for * @cb: The call-back function * * The IOMMUv2 driver invokes this call-back when it is unable to * successfully handle a PRI request. The device driver can then decide * which PRI response the device should see. Possible return values for * the call-back are: * * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device, * the device is required to disable * PRI when it receives this response * * The function returns 0 on success or negative value on error. */ #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0 #define AMD_IOMMU_INV_PRI_RSP_INVALID 1 #define AMD_IOMMU_INV_PRI_RSP_FAIL 2 typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev, u32 pasid, unsigned long address, u16); extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev, amd_iommu_invalid_ppr_cb cb); #define PPR_FAULT_EXEC (1 << 1) #define PPR_FAULT_READ (1 << 2) #define PPR_FAULT_WRITE (1 << 5) #define PPR_FAULT_USER (1 << 6) #define PPR_FAULT_RSVD (1 << 7) #define PPR_FAULT_GN (1 << 8) /** * amd_iommu_device_info() - Get information about IOMMUv2 support of a * PCI device * @pdev: PCI device to query information from * @info: A pointer to an amd_iommu_device_info structure which will contain * the information about the PCI device * * Returns 0 on success, negative value on error */ #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */ #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */ #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */ #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution on memory pages */ #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request super-user privileges */ struct amd_iommu_device_info { int max_pasids; u32 flags; }; extern int amd_iommu_device_info(struct pci_dev *pdev, struct amd_iommu_device_info *info); /** * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating * a pasid context. This call-back is * invoked when the IOMMUv2 driver needs to * invalidate a PASID context, for example * because the task that is bound to that * context is about to exit. * * @pdev: The PCI device the call-back should be registered for * @cb: The call-back function */ typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, u32 pasid); extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev, amd_iommu_invalidate_ctx cb); #else /* CONFIG_AMD_IOMMU */ static inline int amd_iommu_detect(void) { return -ENODEV; } #endif /* CONFIG_AMD_IOMMU */ #if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) /* IOMMU AVIC Function */ extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32)); extern int amd_iommu_update_ga(int cpu, bool is_run, void *data); extern int amd_iommu_activate_guest_mode(void *data); extern int amd_iommu_deactivate_guest_mode(void *data); #else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */ static inline int amd_iommu_register_ga_log_notifier(int (*notifier)(u32)) { return 0; } static inline int amd_iommu_update_ga(int cpu, bool is_run, void *data) { return 0; } static inline int amd_iommu_activate_guest_mode(void *data) { return 0; } static inline int amd_iommu_deactivate_guest_mode(void *data) { return 0; } #endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */ int amd_iommu_get_num_iommus(void); bool amd_iommu_pc_supported(void); u8 amd_iommu_pc_get_max_banks(unsigned int idx); u8 amd_iommu_pc_get_max_counters(unsigned int idx); int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value); int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value); struct amd_iommu *get_amd_iommu(unsigned int idx); #endif /* _ASM_X86_AMD_IOMMU_H */ PK ! ��)% rational.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * rational fractions * * Copyright (C) 2009 emlix GmbH, Oskar Schirmer <oskar@scara.com> * * helper functions when coping with rational numbers, * e.g. when calculating optimum numerator/denominator pairs for * pll configuration taking into account restricted register size */ #ifndef _LINUX_RATIONAL_H #define _LINUX_RATIONAL_H void rational_best_approximation( unsigned long given_numerator, unsigned long given_denominator, unsigned long max_numerator, unsigned long max_denominator, unsigned long *best_numerator, unsigned long *best_denominator); #endif /* _LINUX_RATIONAL_H */ PK ! ZI��� � netfilter_ipv4/ip_tables.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * 25-Jul-1998 Major changes to allow for ip chain table * * 3-Jan-2000 Named tables to allow packet selection for different uses. */ /* * Format of an IP firewall descriptor * * src, dst, src_mask, dst_mask are always stored in network byte order. * flags are stored in host byte order (of course). * Port numbers are stored in HOST byte order. */ #ifndef _IPTABLES_H #define _IPTABLES_H #include <linux/if.h> #include <linux/in.h> #include <linux/init.h> #include <linux/ip.h> #include <linux/skbuff.h> #include <uapi/linux/netfilter_ipv4/ip_tables.h> int ipt_register_table(struct net *net, const struct xt_table *table, const struct ipt_replace *repl, const struct nf_hook_ops *ops); void ipt_unregister_table_pre_exit(struct net *net, const char *name); void ipt_unregister_table_exit(struct net *net, const char *name); /* Standard entry. */ struct ipt_standard { struct ipt_entry entry; struct xt_standard_target target; }; struct ipt_error { struct ipt_entry entry; struct xt_error_target target; }; #define IPT_ENTRY_INIT(__size) \ { \ .target_offset = sizeof(struct ipt_entry), \ .next_offset = (__size), \ } #define IPT_STANDARD_INIT(__verdict) \ { \ .entry = IPT_ENTRY_INIT(sizeof(struct ipt_standard)), \ .target = XT_TARGET_INIT(XT_STANDARD_TARGET, \ sizeof(struct xt_standard_target)), \ .target.verdict = -(__verdict) - 1, \ } #define IPT_ERROR_INIT \ { \ .entry = IPT_ENTRY_INIT(sizeof(struct ipt_error)), \ .target = XT_TARGET_INIT(XT_ERROR_TARGET, \ sizeof(struct xt_error_target)), \ .target.errorname = "ERROR", \ } extern void *ipt_alloc_initial_table(const struct xt_table *); extern unsigned int ipt_do_table(struct sk_buff *skb, const struct nf_hook_state *state, struct xt_table *table); #ifdef CONFIG_NETFILTER_XTABLES_COMPAT #include <net/compat.h> struct compat_ipt_entry { struct ipt_ip ip; compat_uint_t nfcache; __u16 target_offset; __u16 next_offset; compat_uint_t comefrom; struct compat_xt_counters counters; unsigned char elems[]; }; /* Helper functions */ static inline struct xt_entry_target * compat_ipt_get_target(struct compat_ipt_entry *e) { return (void *)e + e->target_offset; } #endif /* CONFIG_COMPAT */ #endif /* _IPTABLES_H */ PK ! �{l�K K quota.hnu �[��� /* * Copyright (c) 1982, 1986 Regents of the University of California. * All rights reserved. * * This code is derived from software contributed to Berkeley by * Robert Elz at The University of Melbourne. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #ifndef _LINUX_QUOTA_ #define _LINUX_QUOTA_ #include <linux/list.h> #include <linux/mutex.h> #include <linux/rwsem.h> #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/percpu_counter.h> #include <linux/dqblk_xfs.h> #include <linux/dqblk_v1.h> #include <linux/dqblk_v2.h> #include <linux/atomic.h> #include <linux/uidgid.h> #include <linux/projid.h> #include <uapi/linux/quota.h> #undef USRQUOTA #undef GRPQUOTA #undef PRJQUOTA enum quota_type { USRQUOTA = 0, /* element used for user quotas */ GRPQUOTA = 1, /* element used for group quotas */ PRJQUOTA = 2, /* element used for project quotas */ }; /* Masks for quota types when used as a bitmask */ #define QTYPE_MASK_USR (1 << USRQUOTA) #define QTYPE_MASK_GRP (1 << GRPQUOTA) #define QTYPE_MASK_PRJ (1 << PRJQUOTA) typedef __kernel_uid32_t qid_t; /* Type in which we store ids in memory */ typedef long long qsize_t; /* Type in which we store sizes */ struct kqid { /* Type in which we store the quota identifier */ union { kuid_t uid; kgid_t gid; kprojid_t projid; }; enum quota_type type; /* USRQUOTA (uid) or GRPQUOTA (gid) or PRJQUOTA (projid) */ }; extern bool qid_eq(struct kqid left, struct kqid right); extern bool qid_lt(struct kqid left, struct kqid right); extern qid_t from_kqid(struct user_namespace *to, struct kqid qid); extern qid_t from_kqid_munged(struct user_namespace *to, struct kqid qid); extern bool qid_valid(struct kqid qid); /** * make_kqid - Map a user-namespace, type, qid tuple into a kqid. * @from: User namespace that the qid is in * @type: The type of quota * @qid: Quota identifier * * Maps a user-namespace, type qid tuple into a kernel internal * kqid, and returns that kqid. * * When there is no mapping defined for the user-namespace, type, * qid tuple an invalid kqid is returned. Callers are expected to * test for and handle handle invalid kqids being returned. * Invalid kqids may be tested for using qid_valid(). */ static inline struct kqid make_kqid(struct user_namespace *from, enum quota_type type, qid_t qid) { struct kqid kqid; kqid.type = type; switch (type) { case USRQUOTA: kqid.uid = make_kuid(from, qid); break; case GRPQUOTA: kqid.gid = make_kgid(from, qid); break; case PRJQUOTA: kqid.projid = make_kprojid(from, qid); break; default: BUG(); } return kqid; } /** * make_kqid_invalid - Explicitly make an invalid kqid * @type: The type of quota identifier * * Returns an invalid kqid with the specified type. */ static inline struct kqid make_kqid_invalid(enum quota_type type) { struct kqid kqid; kqid.type = type; switch (type) { case USRQUOTA: kqid.uid = INVALID_UID; break; case GRPQUOTA: kqid.gid = INVALID_GID; break; case PRJQUOTA: kqid.projid = INVALID_PROJID; break; default: BUG(); } return kqid; } /** * make_kqid_uid - Make a kqid from a kuid * @uid: The kuid to make the quota identifier from */ static inline struct kqid make_kqid_uid(kuid_t uid) { struct kqid kqid; kqid.type = USRQUOTA; kqid.uid = uid; return kqid; } /** * make_kqid_gid - Make a kqid from a kgid * @gid: The kgid to make the quota identifier from */ static inline struct kqid make_kqid_gid(kgid_t gid) { struct kqid kqid; kqid.type = GRPQUOTA; kqid.gid = gid; return kqid; } /** * make_kqid_projid - Make a kqid from a projid * @projid: The kprojid to make the quota identifier from */ static inline struct kqid make_kqid_projid(kprojid_t projid) { struct kqid kqid; kqid.type = PRJQUOTA; kqid.projid = projid; return kqid; } /** * qid_has_mapping - Report if a qid maps into a user namespace. * @ns: The user namespace to see if a value maps into. * @qid: The kernel internal quota identifier to test. */ static inline bool qid_has_mapping(struct user_namespace *ns, struct kqid qid) { return from_kqid(ns, qid) != (qid_t) -1; } extern spinlock_t dq_data_lock; /* Maximal numbers of writes for quota operation (insert/delete/update) * (over VFS all formats) */ #define DQUOT_INIT_ALLOC max(V1_INIT_ALLOC, V2_INIT_ALLOC) #define DQUOT_INIT_REWRITE max(V1_INIT_REWRITE, V2_INIT_REWRITE) #define DQUOT_DEL_ALLOC max(V1_DEL_ALLOC, V2_DEL_ALLOC) #define DQUOT_DEL_REWRITE max(V1_DEL_REWRITE, V2_DEL_REWRITE) /* * Data for one user/group kept in memory */ struct mem_dqblk { qsize_t dqb_bhardlimit; /* absolute limit on disk blks alloc */ qsize_t dqb_bsoftlimit; /* preferred limit on disk blks */ qsize_t dqb_curspace; /* current used space */ qsize_t dqb_rsvspace; /* current reserved space for delalloc*/ qsize_t dqb_ihardlimit; /* absolute limit on allocated inodes */ qsize_t dqb_isoftlimit; /* preferred inode limit */ qsize_t dqb_curinodes; /* current # allocated inodes */ time64_t dqb_btime; /* time limit for excessive disk use */ time64_t dqb_itime; /* time limit for excessive inode use */ }; /* * Data for one quotafile kept in memory */ struct quota_format_type; struct mem_dqinfo { struct quota_format_type *dqi_format; int dqi_fmt_id; /* Id of the dqi_format - used when turning * quotas on after remount RW */ struct list_head dqi_dirty_list; /* List of dirty dquots [dq_list_lock] */ unsigned long dqi_flags; /* DFQ_ flags [dq_data_lock] */ unsigned int dqi_bgrace; /* Space grace time [dq_data_lock] */ unsigned int dqi_igrace; /* Inode grace time [dq_data_lock] */ qsize_t dqi_max_spc_limit; /* Maximum space limit [static] */ qsize_t dqi_max_ino_limit; /* Maximum inode limit [static] */ void *dqi_priv; }; struct super_block; /* Mask for flags passed to userspace */ #define DQF_GETINFO_MASK (DQF_ROOT_SQUASH | DQF_SYS_FILE) /* Mask for flags modifiable from userspace */ #define DQF_SETINFO_MASK DQF_ROOT_SQUASH enum { DQF_INFO_DIRTY_B = DQF_PRIVATE, }; #define DQF_INFO_DIRTY (1 << DQF_INFO_DIRTY_B) /* Is info dirty? */ extern void mark_info_dirty(struct super_block *sb, int type); static inline int info_dirty(struct mem_dqinfo *info) { return test_bit(DQF_INFO_DIRTY_B, &info->dqi_flags); } enum { DQST_LOOKUPS, DQST_DROPS, DQST_READS, DQST_WRITES, DQST_CACHE_HITS, DQST_ALLOC_DQUOTS, DQST_FREE_DQUOTS, DQST_SYNCS, _DQST_DQSTAT_LAST }; struct dqstats { unsigned long stat[_DQST_DQSTAT_LAST]; struct percpu_counter counter[_DQST_DQSTAT_LAST]; }; extern struct dqstats dqstats; static inline void dqstats_inc(unsigned int type) { percpu_counter_inc(&dqstats.counter[type]); } static inline void dqstats_dec(unsigned int type) { percpu_counter_dec(&dqstats.counter[type]); } #define DQ_MOD_B 0 /* dquot modified since read */ #define DQ_BLKS_B 1 /* uid/gid has been warned about blk limit */ #define DQ_INODES_B 2 /* uid/gid has been warned about inode limit */ #define DQ_FAKE_B 3 /* no limits only usage */ #define DQ_READ_B 4 /* dquot was read into memory */ #define DQ_ACTIVE_B 5 /* dquot is active (dquot_release not called) */ #define DQ_RELEASING_B 6 /* dquot is in releasing_dquots list waiting * to be cleaned up */ #define DQ_LASTSET_B 7 /* Following 6 bits (see QIF_) are reserved\ * for the mask of entries set via SETQUOTA\ * quotactl. They are set under dq_data_lock\ * and the quota format handling dquot can\ * clear them when it sees fit. */ struct dquot { struct hlist_node dq_hash; /* Hash list in memory [dq_list_lock] */ struct list_head dq_inuse; /* List of all quotas [dq_list_lock] */ struct list_head dq_free; /* Free list element [dq_list_lock] */ struct list_head dq_dirty; /* List of dirty dquots [dq_list_lock] */ struct mutex dq_lock; /* dquot IO lock */ spinlock_t dq_dqb_lock; /* Lock protecting dq_dqb changes */ atomic_t dq_count; /* Use count */ struct super_block *dq_sb; /* superblock this applies to */ struct kqid dq_id; /* ID this applies to (uid, gid, projid) */ loff_t dq_off; /* Offset of dquot on disk [dq_lock, stable once set] */ unsigned long dq_flags; /* See DQ_* */ struct mem_dqblk dq_dqb; /* Diskquota usage [dq_dqb_lock] */ }; /* Operations which must be implemented by each quota format */ struct quota_format_ops { int (*check_quota_file)(struct super_block *sb, int type); /* Detect whether file is in our format */ int (*read_file_info)(struct super_block *sb, int type); /* Read main info about file - called on quotaon() */ int (*write_file_info)(struct super_block *sb, int type); /* Write main info about file */ int (*free_file_info)(struct super_block *sb, int type); /* Called on quotaoff() */ int (*read_dqblk)(struct dquot *dquot); /* Read structure for one user */ int (*commit_dqblk)(struct dquot *dquot); /* Write structure for one user */ int (*release_dqblk)(struct dquot *dquot); /* Called when last reference to dquot is being dropped */ int (*get_next_id)(struct super_block *sb, struct kqid *qid); /* Get next ID with existing structure in the quota file */ }; /* Operations working with dquots */ struct dquot_operations { int (*write_dquot) (struct dquot *); /* Ordinary dquot write */ struct dquot *(*alloc_dquot)(struct super_block *, int); /* Allocate memory for new dquot */ void (*destroy_dquot)(struct dquot *); /* Free memory for dquot */ int (*acquire_dquot) (struct dquot *); /* Quota is going to be created on disk */ int (*release_dquot) (struct dquot *); /* Quota is going to be deleted from disk */ int (*mark_dirty) (struct dquot *); /* Dquot is marked dirty */ int (*write_info) (struct super_block *, int); /* Write of quota "superblock" */ /* get reserved quota for delayed alloc, value returned is managed by * quota code only */ qsize_t *(*get_reserved_space) (struct inode *); int (*get_projid) (struct inode *, kprojid_t *);/* Get project ID */ /* Get number of inodes that were charged for a given inode */ int (*get_inode_usage) (struct inode *, qsize_t *); /* Get next ID with active quota structure */ int (*get_next_id) (struct super_block *sb, struct kqid *qid); }; struct path; /* Structure for communicating via ->get_dqblk() & ->set_dqblk() */ struct qc_dqblk { int d_fieldmask; /* mask of fields to change in ->set_dqblk() */ u64 d_spc_hardlimit; /* absolute limit on used space */ u64 d_spc_softlimit; /* preferred limit on used space */ u64 d_ino_hardlimit; /* maximum # allocated inodes */ u64 d_ino_softlimit; /* preferred inode limit */ u64 d_space; /* Space owned by the user */ u64 d_ino_count; /* # inodes owned by the user */ s64 d_ino_timer; /* zero if within inode limits */ /* if not, we refuse service */ s64 d_spc_timer; /* similar to above; for space */ int d_ino_warns; /* # warnings issued wrt num inodes */ int d_spc_warns; /* # warnings issued wrt used space */ u64 d_rt_spc_hardlimit; /* absolute limit on realtime space */ u64 d_rt_spc_softlimit; /* preferred limit on RT space */ u64 d_rt_space; /* realtime space owned */ s64 d_rt_spc_timer; /* similar to above; for RT space */ int d_rt_spc_warns; /* # warnings issued wrt RT space */ }; /* * Field specifiers for ->set_dqblk() in struct qc_dqblk and also for * ->set_info() in struct qc_info */ #define QC_INO_SOFT (1<<0) #define QC_INO_HARD (1<<1) #define QC_SPC_SOFT (1<<2) #define QC_SPC_HARD (1<<3) #define QC_RT_SPC_SOFT (1<<4) #define QC_RT_SPC_HARD (1<<5) #define QC_LIMIT_MASK (QC_INO_SOFT | QC_INO_HARD | QC_SPC_SOFT | QC_SPC_HARD | \ QC_RT_SPC_SOFT | QC_RT_SPC_HARD) #define QC_SPC_TIMER (1<<6) #define QC_INO_TIMER (1<<7) #define QC_RT_SPC_TIMER (1<<8) #define QC_TIMER_MASK (QC_SPC_TIMER | QC_INO_TIMER | QC_RT_SPC_TIMER) #define QC_SPC_WARNS (1<<9) #define QC_INO_WARNS (1<<10) #define QC_RT_SPC_WARNS (1<<11) #define QC_WARNS_MASK (QC_SPC_WARNS | QC_INO_WARNS | QC_RT_SPC_WARNS) #define QC_SPACE (1<<12) #define QC_INO_COUNT (1<<13) #define QC_RT_SPACE (1<<14) #define QC_ACCT_MASK (QC_SPACE | QC_INO_COUNT | QC_RT_SPACE) #define QC_FLAGS (1<<15) #define QCI_SYSFILE (1 << 0) /* Quota file is hidden from userspace */ #define QCI_ROOT_SQUASH (1 << 1) /* Root squash turned on */ #define QCI_ACCT_ENABLED (1 << 2) /* Quota accounting enabled */ #define QCI_LIMITS_ENFORCED (1 << 3) /* Quota limits enforced */ /* Structures for communicating via ->get_state */ struct qc_type_state { unsigned int flags; /* Flags QCI_* */ unsigned int spc_timelimit; /* Time after which space softlimit is * enforced */ unsigned int ino_timelimit; /* Ditto for inode softlimit */ unsigned int rt_spc_timelimit; /* Ditto for real-time space */ unsigned int spc_warnlimit; /* Limit for number of space warnings */ unsigned int ino_warnlimit; /* Ditto for inodes */ unsigned int rt_spc_warnlimit; /* Ditto for real-time space */ unsigned long long ino; /* Inode number of quota file */ blkcnt_t blocks; /* Number of 512-byte blocks in the file */ blkcnt_t nextents; /* Number of extents in the file */ }; struct qc_state { unsigned int s_incoredqs; /* Number of dquots in core */ struct qc_type_state s_state[MAXQUOTAS]; /* Per quota type information */ }; /* Structure for communicating via ->set_info */ struct qc_info { int i_fieldmask; /* mask of fields to change in ->set_info() */ unsigned int i_flags; /* Flags QCI_* */ unsigned int i_spc_timelimit; /* Time after which space softlimit is * enforced */ unsigned int i_ino_timelimit; /* Ditto for inode softlimit */ unsigned int i_rt_spc_timelimit;/* Ditto for real-time space */ unsigned int i_spc_warnlimit; /* Limit for number of space warnings */ unsigned int i_ino_warnlimit; /* Limit for number of inode warnings */ unsigned int i_rt_spc_warnlimit; /* Ditto for real-time space */ }; /* Operations handling requests from userspace */ struct quotactl_ops { int (*quota_on)(struct super_block *, int, int, const struct path *); int (*quota_off)(struct super_block *, int); int (*quota_enable)(struct super_block *, unsigned int); int (*quota_disable)(struct super_block *, unsigned int); int (*quota_sync)(struct super_block *, int); int (*set_info)(struct super_block *, int, struct qc_info *); int (*get_dqblk)(struct super_block *, struct kqid, struct qc_dqblk *); int (*get_nextdqblk)(struct super_block *, struct kqid *, struct qc_dqblk *); int (*set_dqblk)(struct super_block *, struct kqid, struct qc_dqblk *); int (*get_state)(struct super_block *, struct qc_state *); int (*rm_xquota)(struct super_block *, unsigned int); }; struct quota_format_type { int qf_fmt_id; /* Quota format id */ const struct quota_format_ops *qf_ops; /* Operations of format */ struct module *qf_owner; /* Module implementing quota format */ struct quota_format_type *qf_next; }; /** * Quota state flags - they come in three flavors - for users, groups and projects. * * Actual typed flags layout: * USRQUOTA GRPQUOTA PRJQUOTA * DQUOT_USAGE_ENABLED 0x0001 0x0002 0x0004 * DQUOT_LIMITS_ENABLED 0x0008 0x0010 0x0020 * DQUOT_SUSPENDED 0x0040 0x0080 0x0100 * * Following bits are used for non-typed flags: * DQUOT_QUOTA_SYS_FILE 0x0200 * DQUOT_NEGATIVE_USAGE 0x0400 * DQUOT_NOLIST_DIRTY 0x0800 */ enum { _DQUOT_USAGE_ENABLED = 0, /* Track disk usage for users */ _DQUOT_LIMITS_ENABLED, /* Enforce quota limits for users */ _DQUOT_SUSPENDED, /* User diskquotas are off, but * we have necessary info in * memory to turn them on */ _DQUOT_STATE_FLAGS }; #define DQUOT_USAGE_ENABLED (1 << _DQUOT_USAGE_ENABLED * MAXQUOTAS) #define DQUOT_LIMITS_ENABLED (1 << _DQUOT_LIMITS_ENABLED * MAXQUOTAS) #define DQUOT_SUSPENDED (1 << _DQUOT_SUSPENDED * MAXQUOTAS) #define DQUOT_STATE_FLAGS (DQUOT_USAGE_ENABLED | DQUOT_LIMITS_ENABLED | \ DQUOT_SUSPENDED) /* Other quota flags */ #define DQUOT_STATE_LAST (_DQUOT_STATE_FLAGS * MAXQUOTAS) #define DQUOT_QUOTA_SYS_FILE (1 << DQUOT_STATE_LAST) /* Quota file is a special * system file and user cannot * touch it. Filesystem is * responsible for setting * S_NOQUOTA, S_NOATIME flags */ #define DQUOT_NEGATIVE_USAGE (1 << (DQUOT_STATE_LAST + 1)) /* Allow negative quota usage */ /* Do not track dirty dquots in a list */ #define DQUOT_NOLIST_DIRTY (1 << (DQUOT_STATE_LAST + 2)) static inline unsigned int dquot_state_flag(unsigned int flags, int type) { return flags << type; } static inline unsigned int dquot_generic_flag(unsigned int flags, int type) { return (flags >> type) & DQUOT_STATE_FLAGS; } /* Bitmap of quota types where flag is set in flags */ static __always_inline unsigned dquot_state_types(unsigned flags, unsigned flag) { BUILD_BUG_ON_NOT_POWER_OF_2(flag); return (flags / flag) & ((1 << MAXQUOTAS) - 1); } #ifdef CONFIG_QUOTA_NETLINK_INTERFACE extern void quota_send_warning(struct kqid qid, dev_t dev, const char warntype); #else static inline void quota_send_warning(struct kqid qid, dev_t dev, const char warntype) { return; } #endif /* CONFIG_QUOTA_NETLINK_INTERFACE */ struct quota_info { unsigned int flags; /* Flags for diskquotas on this device */ struct rw_semaphore dqio_sem; /* Lock quota file while I/O in progress */ struct inode *files[MAXQUOTAS]; /* inodes of quotafiles */ struct mem_dqinfo info[MAXQUOTAS]; /* Information for each quota type */ const struct quota_format_ops *ops[MAXQUOTAS]; /* Operations for each type */ }; int register_quota_format(struct quota_format_type *fmt); void unregister_quota_format(struct quota_format_type *fmt); struct quota_module_name { int qm_fmt_id; char *qm_mod_name; }; #define INIT_QUOTA_MODULE_NAMES {\ {QFMT_VFS_OLD, "quota_v1"},\ {QFMT_VFS_V0, "quota_v2"},\ {QFMT_VFS_V1, "quota_v2"},\ {0, NULL}} #endif /* _QUOTA_ */ PK ! �|�M� � lzo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LZO_H__ #define __LZO_H__ /* * LZO Public Kernel Interface * A mini subset of the LZO real-time data compression library * * Copyright (C) 1996-2012 Markus F.X.J. Oberhumer <markus@oberhumer.com> * * The full LZO package can be found at: * http://www.oberhumer.com/opensource/lzo/ * * Changed for Linux kernel use by: * Nitin Gupta <nitingupta910@gmail.com> * Richard Purdie <rpurdie@openedhand.com> */ #define LZO1X_1_MEM_COMPRESS (8192 * sizeof(unsigned short)) #define LZO1X_MEM_COMPRESS LZO1X_1_MEM_COMPRESS #define lzo1x_worst_compress(x) ((x) + ((x) / 16) + 64 + 3 + 2) /* This requires 'wrkmem' of size LZO1X_1_MEM_COMPRESS */ int lzo1x_1_compress(const unsigned char *src, size_t src_len, unsigned char *dst, size_t *dst_len, void *wrkmem); /* Same as above but does not write more than dst_len to dst. */ int lzo1x_1_compress_safe(const unsigned char *src, size_t src_len, unsigned char *dst, size_t *dst_len, void *wrkmem); /* This requires 'wrkmem' of size LZO1X_1_MEM_COMPRESS */ int lzorle1x_1_compress(const unsigned char *src, size_t src_len, unsigned char *dst, size_t *dst_len, void *wrkmem); /* Same as above but does not write more than dst_len to dst. */ int lzorle1x_1_compress_safe(const unsigned char *src, size_t src_len, unsigned char *dst, size_t *dst_len, void *wrkmem); /* safe decompression with overrun testing */ int lzo1x_decompress_safe(const unsigned char *src, size_t src_len, unsigned char *dst, size_t *dst_len); /* * Return values (< 0 = Error) */ #define LZO_E_OK 0 #define LZO_E_ERROR (-1) #define LZO_E_OUT_OF_MEMORY (-2) #define LZO_E_NOT_COMPRESSIBLE (-3) #define LZO_E_INPUT_OVERRUN (-4) #define LZO_E_OUTPUT_OVERRUN (-5) #define LZO_E_LOOKBEHIND_OVERRUN (-6) #define LZO_E_EOF_NOT_FOUND (-7) #define LZO_E_INPUT_NOT_CONSUMED (-8) #define LZO_E_NOT_YET_IMPLEMENTED (-9) #define LZO_E_INVALID_ARGUMENT (-10) #endif PK ! Q��>� � syslog.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Syslog internals * * Copyright 2010 Canonical, Ltd. * Author: Kees Cook <kees.cook@canonical.com> */ #ifndef _LINUX_SYSLOG_H #define _LINUX_SYSLOG_H /* Close the log. Currently a NOP. */ #define SYSLOG_ACTION_CLOSE 0 /* Open the log. Currently a NOP. */ #define SYSLOG_ACTION_OPEN 1 /* Read from the log. */ #define SYSLOG_ACTION_READ 2 /* Read all messages remaining in the ring buffer. */ #define SYSLOG_ACTION_READ_ALL 3 /* Read and clear all messages remaining in the ring buffer */ #define SYSLOG_ACTION_READ_CLEAR 4 /* Clear ring buffer. */ #define SYSLOG_ACTION_CLEAR 5 /* Disable printk's to console */ #define SYSLOG_ACTION_CONSOLE_OFF 6 /* Enable printk's to console */ #define SYSLOG_ACTION_CONSOLE_ON 7 /* Set level of messages printed to console */ #define SYSLOG_ACTION_CONSOLE_LEVEL 8 /* Return number of unread characters in the log buffer */ #define SYSLOG_ACTION_SIZE_UNREAD 9 /* Return size of the log buffer */ #define SYSLOG_ACTION_SIZE_BUFFER 10 #define SYSLOG_FROM_READER 0 #define SYSLOG_FROM_PROC 1 int do_syslog(int type, char __user *buf, int count, int source); #endif /* _LINUX_SYSLOG_H */ PK ! M���� � vmw_vmci_api.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * VMware VMCI Driver * * Copyright (C) 2012 VMware, Inc. All rights reserved. */ #ifndef __VMW_VMCI_API_H__ #define __VMW_VMCI_API_H__ #include <linux/uidgid.h> #include <linux/vmw_vmci_defs.h> #undef VMCI_KERNEL_API_VERSION #define VMCI_KERNEL_API_VERSION_1 1 #define VMCI_KERNEL_API_VERSION_2 2 #define VMCI_KERNEL_API_VERSION VMCI_KERNEL_API_VERSION_2 struct msghdr; typedef void (vmci_device_shutdown_fn) (void *device_registration, void *user_data); typedef void (*vmci_vsock_cb) (bool is_host); int vmci_datagram_create_handle(u32 resource_id, u32 flags, vmci_datagram_recv_cb recv_cb, void *client_data, struct vmci_handle *out_handle); int vmci_datagram_create_handle_priv(u32 resource_id, u32 flags, u32 priv_flags, vmci_datagram_recv_cb recv_cb, void *client_data, struct vmci_handle *out_handle); int vmci_datagram_destroy_handle(struct vmci_handle handle); int vmci_datagram_send(struct vmci_datagram *msg); int vmci_doorbell_create(struct vmci_handle *handle, u32 flags, u32 priv_flags, vmci_callback notify_cb, void *client_data); int vmci_doorbell_destroy(struct vmci_handle handle); int vmci_doorbell_notify(struct vmci_handle handle, u32 priv_flags); u32 vmci_get_context_id(void); bool vmci_is_context_owner(u32 context_id, kuid_t uid); int vmci_register_vsock_callback(vmci_vsock_cb callback); int vmci_event_subscribe(u32 event, vmci_event_cb callback, void *callback_data, u32 *subid); int vmci_event_unsubscribe(u32 subid); u32 vmci_context_get_priv_flags(u32 context_id); int vmci_qpair_alloc(struct vmci_qp **qpair, struct vmci_handle *handle, u64 produce_qsize, u64 consume_qsize, u32 peer, u32 flags, u32 priv_flags); int vmci_qpair_detach(struct vmci_qp **qpair); int vmci_qpair_get_produce_indexes(const struct vmci_qp *qpair, u64 *producer_tail, u64 *consumer_head); int vmci_qpair_get_consume_indexes(const struct vmci_qp *qpair, u64 *consumer_tail, u64 *producer_head); s64 vmci_qpair_produce_free_space(const struct vmci_qp *qpair); s64 vmci_qpair_produce_buf_ready(const struct vmci_qp *qpair); s64 vmci_qpair_consume_free_space(const struct vmci_qp *qpair); s64 vmci_qpair_consume_buf_ready(const struct vmci_qp *qpair); ssize_t vmci_qpair_enqueue(struct vmci_qp *qpair, const void *buf, size_t buf_size, int mode); ssize_t vmci_qpair_dequeue(struct vmci_qp *qpair, void *buf, size_t buf_size, int mode); ssize_t vmci_qpair_peek(struct vmci_qp *qpair, void *buf, size_t buf_size, int mode); ssize_t vmci_qpair_enquev(struct vmci_qp *qpair, struct msghdr *msg, size_t iov_size, int mode); ssize_t vmci_qpair_dequev(struct vmci_qp *qpair, struct msghdr *msg, size_t iov_size, int mode); ssize_t vmci_qpair_peekv(struct vmci_qp *qpair, struct msghdr *msg, size_t iov_size, int mode); #endif /* !__VMW_VMCI_API_H__ */ PK ! ,K�e�0 �0 ptp_clock_kernel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * PTP 1588 clock support * * Copyright (C) 2010 OMICRON electronics GmbH */ #ifndef _PTP_CLOCK_KERNEL_H_ #define _PTP_CLOCK_KERNEL_H_ #include <linux/device.h> #include <linux/pps_kernel.h> #include <linux/ptp_clock.h> #include <linux/timecounter.h> #include <linux/skbuff.h> #define PTP_CLOCK_NAME_LEN 32 /** * struct ptp_clock_request - request PTP clock event * * @type: The type of the request. * EXTTS: Configure external trigger timestamping * PEROUT: Configure periodic output signal (e.g. PPS) * PPS: trigger internal PPS event for input * into kernel PPS subsystem * @extts: describes configuration for external trigger timestamping. * This is only valid when event == PTP_CLK_REQ_EXTTS. * @perout: describes configuration for periodic output. * This is only valid when event == PTP_CLK_REQ_PEROUT. */ struct ptp_clock_request { enum { PTP_CLK_REQ_EXTTS, PTP_CLK_REQ_PEROUT, PTP_CLK_REQ_PPS, } type; union { struct ptp_extts_request extts; struct ptp_perout_request perout; }; }; struct system_device_crosststamp; /** * struct ptp_system_timestamp - system time corresponding to a PHC timestamp */ struct ptp_system_timestamp { struct timespec64 pre_ts; struct timespec64 post_ts; }; /** * struct ptp_clock_info - describes a PTP hardware clock * * @owner: The clock driver should set to THIS_MODULE. * @name: A short "friendly name" to identify the clock and to * help distinguish PHY based devices from MAC based ones. * The string is not meant to be a unique id. * @max_adj: The maximum possible frequency adjustment, in parts per billon. * @n_alarm: The number of programmable alarms. * @n_ext_ts: The number of external time stamp channels. * @n_per_out: The number of programmable periodic signals. * @n_pins: The number of programmable pins. * @pps: Indicates whether the clock supports a PPS callback. * @pin_config: Array of length 'n_pins'. If the number of * programmable pins is nonzero, then drivers must * allocate and initialize this array. * * clock operations * * @adjfine: Adjusts the frequency of the hardware clock. * parameter scaled_ppm: Desired frequency offset from * nominal frequency in parts per million, but with a * 16 bit binary fractional field. * * @adjfreq: Adjusts the frequency of the hardware clock. * This method is deprecated. New drivers should implement * the @adjfine method instead. * parameter delta: Desired frequency offset from nominal frequency * in parts per billion * * @adjphase: Adjusts the phase offset of the hardware clock. * parameter delta: Desired change in nanoseconds. * * @adjtime: Shifts the time of the hardware clock. * parameter delta: Desired change in nanoseconds. * * @gettime64: Reads the current time from the hardware clock. * This method is deprecated. New drivers should implement * the @gettimex64 method instead. * parameter ts: Holds the result. * * @gettimex64: Reads the current time from the hardware clock and optionally * also the system clock. * parameter ts: Holds the PHC timestamp. * parameter sts: If not NULL, it holds a pair of timestamps from * the system clock. The first reading is made right before * reading the lowest bits of the PHC timestamp and the second * reading immediately follows that. * * @getcrosststamp: Reads the current time from the hardware clock and * system clock simultaneously. * parameter cts: Contains timestamp (device,system) pair, * where system time is realtime and monotonic. * * @settime64: Set the current time on the hardware clock. * parameter ts: Time value to set. * * @enable: Request driver to enable or disable an ancillary feature. * parameter request: Desired resource to enable or disable. * parameter on: Caller passes one to enable or zero to disable. * * @verify: Confirm that a pin can perform a given function. The PTP * Hardware Clock subsystem maintains the 'pin_config' * array on behalf of the drivers, but the PHC subsystem * assumes that every pin can perform every function. This * hook gives drivers a way of telling the core about * limitations on specific pins. This function must return * zero if the function can be assigned to this pin, and * nonzero otherwise. * parameter pin: index of the pin in question. * parameter func: the desired function to use. * parameter chan: the function channel index to use. * * @do_aux_work: Request driver to perform auxiliary (periodic) operations * Driver should return delay of the next auxiliary work * scheduling time (>=0) or negative value in case further * scheduling is not required. * * Drivers should embed their ptp_clock_info within a private * structure, obtaining a reference to it using container_of(). * * The callbacks must all return zero on success, non-zero otherwise. */ struct ptp_clock_info { struct module *owner; char name[PTP_CLOCK_NAME_LEN]; s32 max_adj; int n_alarm; int n_ext_ts; int n_per_out; int n_pins; int pps; struct ptp_pin_desc *pin_config; int (*adjfine)(struct ptp_clock_info *ptp, long scaled_ppm); int (*adjfreq)(struct ptp_clock_info *ptp, s32 delta); int (*adjphase)(struct ptp_clock_info *ptp, s32 phase); int (*adjtime)(struct ptp_clock_info *ptp, s64 delta); int (*gettime64)(struct ptp_clock_info *ptp, struct timespec64 *ts); int (*gettimex64)(struct ptp_clock_info *ptp, struct timespec64 *ts, struct ptp_system_timestamp *sts); int (*getcrosststamp)(struct ptp_clock_info *ptp, struct system_device_crosststamp *cts); int (*settime64)(struct ptp_clock_info *p, const struct timespec64 *ts); int (*enable)(struct ptp_clock_info *ptp, struct ptp_clock_request *request, int on); int (*verify)(struct ptp_clock_info *ptp, unsigned int pin, enum ptp_pin_function func, unsigned int chan); long (*do_aux_work)(struct ptp_clock_info *ptp); }; struct ptp_clock; enum ptp_clock_events { PTP_CLOCK_ALARM, PTP_CLOCK_EXTTS, PTP_CLOCK_PPS, PTP_CLOCK_PPSUSR, }; /** * struct ptp_clock_event - decribes a PTP hardware clock event * * @type: One of the ptp_clock_events enumeration values. * @index: Identifies the source of the event. * @timestamp: When the event occurred (%PTP_CLOCK_EXTTS only). * @pps_times: When the event occurred (%PTP_CLOCK_PPSUSR only). */ struct ptp_clock_event { int type; int index; union { u64 timestamp; struct pps_event_time pps_times; }; }; /** * scaled_ppm_to_ppb() - convert scaled ppm to ppb * * @ppm: Parts per million, but with a 16 bit binary fractional field */ static inline long scaled_ppm_to_ppb(long ppm) { /* * The 'freq' field in the 'struct timex' is in parts per * million, but with a 16 bit binary fractional field. * * We want to calculate * * ppb = scaled_ppm * 1000 / 2^16 * * which simplifies to * * ppb = scaled_ppm * 125 / 2^13 */ s64 ppb = 1 + ppm; ppb *= 125; ppb >>= 13; return (long)ppb; } #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) /** * ptp_clock_register() - register a PTP hardware clock driver * * @info: Structure describing the new clock. * @parent: Pointer to the parent device of the new clock. * * Returns a valid pointer on success or PTR_ERR on failure. If PHC * support is missing at the configuration level, this function * returns NULL, and drivers are expected to gracefully handle that * case separately. */ extern struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info, struct device *parent); /** * ptp_clock_unregister() - unregister a PTP hardware clock driver * * @ptp: The clock to remove from service. */ extern int ptp_clock_unregister(struct ptp_clock *ptp); /** * ptp_clock_event() - notify the PTP layer about an event * * @ptp: The clock obtained from ptp_clock_register(). * @event: Message structure describing the event. */ extern void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event); /** * ptp_clock_index() - obtain the device index of a PTP clock * * @ptp: The clock obtained from ptp_clock_register(). */ extern int ptp_clock_index(struct ptp_clock *ptp); /** * ptp_find_pin() - obtain the pin index of a given auxiliary function * * The caller must hold ptp_clock::pincfg_mux. Drivers do not have * access to that mutex as ptp_clock is an opaque type. However, the * core code acquires the mutex before invoking the driver's * ptp_clock_info::enable() callback, and so drivers may call this * function from that context. * * @ptp: The clock obtained from ptp_clock_register(). * @func: One of the ptp_pin_function enumerated values. * @chan: The particular functional channel to find. * Return: Pin index in the range of zero to ptp_clock_caps.n_pins - 1, * or -1 if the auxiliary function cannot be found. */ int ptp_find_pin(struct ptp_clock *ptp, enum ptp_pin_function func, unsigned int chan); /** * ptp_find_pin_unlocked() - wrapper for ptp_find_pin() * * This function acquires the ptp_clock::pincfg_mux mutex before * invoking ptp_find_pin(). Instead of using this function, drivers * should most likely call ptp_find_pin() directly from their * ptp_clock_info::enable() method. * */ int ptp_find_pin_unlocked(struct ptp_clock *ptp, enum ptp_pin_function func, unsigned int chan); /** * ptp_schedule_worker() - schedule ptp auxiliary work * * @ptp: The clock obtained from ptp_clock_register(). * @delay: number of jiffies to wait before queuing * See kthread_queue_delayed_work() for more info. */ int ptp_schedule_worker(struct ptp_clock *ptp, unsigned long delay); /** * ptp_cancel_worker_sync() - cancel ptp auxiliary clock * * @ptp: The clock obtained from ptp_clock_register(). */ void ptp_cancel_worker_sync(struct ptp_clock *ptp); #else static inline struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info, struct device *parent) { return NULL; } static inline int ptp_clock_unregister(struct ptp_clock *ptp) { return 0; } static inline void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event) { } static inline int ptp_clock_index(struct ptp_clock *ptp) { return -1; } static inline int ptp_find_pin(struct ptp_clock *ptp, enum ptp_pin_function func, unsigned int chan) { return -1; } static inline int ptp_schedule_worker(struct ptp_clock *ptp, unsigned long delay) { return -EOPNOTSUPP; } static inline void ptp_cancel_worker_sync(struct ptp_clock *ptp) { } #endif #if IS_BUILTIN(CONFIG_PTP_1588_CLOCK) /* * These are called by the network core, and don't work if PTP is in * a loadable module. */ /** * ptp_get_vclocks_index() - get all vclocks index on pclock, and * caller is responsible to free memory * of vclock_index * * @pclock_index: phc index of ptp pclock. * @vclock_index: pointer to pointer of vclock index. * * return number of vclocks. */ int ptp_get_vclocks_index(int pclock_index, int **vclock_index); /** * ptp_convert_timestamp() - convert timestamp to a ptp vclock time * * @hwtstamps: skb_shared_hwtstamps structure pointer * @vclock_index: phc index of ptp vclock. * * Returns converted timestamp, or 0 on error. */ ktime_t ptp_convert_timestamp(const struct skb_shared_hwtstamps *hwtstamps, int vclock_index); #else static inline int ptp_get_vclocks_index(int pclock_index, int **vclock_index) { return 0; } static inline ktime_t ptp_convert_timestamp(const struct skb_shared_hwtstamps *hwtstamps, int vclock_index) { return 0; } #endif static inline void ptp_read_system_prets(struct ptp_system_timestamp *sts) { if (sts) ktime_get_real_ts64(&sts->pre_ts); } static inline void ptp_read_system_postts(struct ptp_system_timestamp *sts) { if (sts) ktime_get_real_ts64(&sts->post_ts); } #endif PK ! �9L� � timerqueue.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TIMERQUEUE_H #define _LINUX_TIMERQUEUE_H #include <linux/rbtree.h> #include <linux/ktime.h> struct timerqueue_node { struct rb_node node; ktime_t expires; }; struct timerqueue_head { struct rb_root_cached rb_root; }; extern bool timerqueue_add(struct timerqueue_head *head, struct timerqueue_node *node); extern bool timerqueue_del(struct timerqueue_head *head, struct timerqueue_node *node); extern struct timerqueue_node *timerqueue_iterate_next( struct timerqueue_node *node); /** * timerqueue_getnext - Returns the timer with the earliest expiration time * * @head: head of timerqueue * * Returns a pointer to the timer node that has the earliest expiration time. */ static inline struct timerqueue_node *timerqueue_getnext(struct timerqueue_head *head) { struct rb_node *leftmost = rb_first_cached(&head->rb_root); return rb_entry_safe(leftmost, struct timerqueue_node, node); } static inline void timerqueue_init(struct timerqueue_node *node) { RB_CLEAR_NODE(&node->node); } static inline bool timerqueue_node_queued(struct timerqueue_node *node) { return !RB_EMPTY_NODE(&node->node); } static inline bool timerqueue_node_expires(struct timerqueue_node *node) { return node->expires; } static inline void timerqueue_init_head(struct timerqueue_head *head) { head->rb_root = RB_ROOT_CACHED; } #endif /* _LINUX_TIMERQUEUE_H */ PK ! �L* * wl12xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * This file is part of wl12xx * * Copyright (C) 2009 Nokia Corporation * * Contact: Luciano Coelho <luciano.coelho@nokia.com> */ #ifndef _LINUX_WL12XX_H #define _LINUX_WL12XX_H #include <linux/err.h> struct wl1251_platform_data { int power_gpio; /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */ int irq; bool use_eeprom; }; #ifdef CONFIG_WILINK_PLATFORM_DATA int wl1251_set_platform_data(const struct wl1251_platform_data *data); struct wl1251_platform_data *wl1251_get_platform_data(void); #else static inline int wl1251_set_platform_data(const struct wl1251_platform_data *data) { return -ENOSYS; } static inline struct wl1251_platform_data *wl1251_get_platform_data(void) { return ERR_PTR(-ENODATA); } #endif #endif PK ! � r� � oid_registry.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* ASN.1 Object identifier (OID) registry * * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_OID_REGISTRY_H #define _LINUX_OID_REGISTRY_H #include <linux/types.h> /* * OIDs are turned into these values if possible, or OID__NR if not held here. * * NOTE! Do not mess with the format of each line as this is read by * build_OID_registry.pl to generate the data for look_up_OID(). */ enum OID { OID_id_dsa_with_sha1, /* 1.2.840.10030.4.3 */ OID_id_dsa, /* 1.2.840.10040.4.1 */ OID_id_ecPublicKey, /* 1.2.840.10045.2.1 */ OID_id_prime192v1, /* 1.2.840.10045.3.1.1 */ OID_id_prime256v1, /* 1.2.840.10045.3.1.7 */ OID_id_ecdsa_with_sha1, /* 1.2.840.10045.4.1 */ OID_id_ecdsa_with_sha224, /* 1.2.840.10045.4.3.1 */ OID_id_ecdsa_with_sha256, /* 1.2.840.10045.4.3.2 */ OID_id_ecdsa_with_sha384, /* 1.2.840.10045.4.3.3 */ OID_id_ecdsa_with_sha512, /* 1.2.840.10045.4.3.4 */ /* PKCS#1 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) pkcs-1(1)} */ OID_rsaEncryption, /* 1.2.840.113549.1.1.1 */ OID_md2WithRSAEncryption, /* 1.2.840.113549.1.1.2 */ OID_md3WithRSAEncryption, /* 1.2.840.113549.1.1.3 */ OID_md4WithRSAEncryption, /* 1.2.840.113549.1.1.4 */ OID_sha1WithRSAEncryption, /* 1.2.840.113549.1.1.5 */ OID_sha256WithRSAEncryption, /* 1.2.840.113549.1.1.11 */ OID_sha384WithRSAEncryption, /* 1.2.840.113549.1.1.12 */ OID_sha512WithRSAEncryption, /* 1.2.840.113549.1.1.13 */ OID_sha224WithRSAEncryption, /* 1.2.840.113549.1.1.14 */ /* PKCS#7 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) pkcs-7(7)} */ OID_data, /* 1.2.840.113549.1.7.1 */ OID_signed_data, /* 1.2.840.113549.1.7.2 */ /* PKCS#9 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) pkcs-9(9)} */ OID_email_address, /* 1.2.840.113549.1.9.1 */ OID_contentType, /* 1.2.840.113549.1.9.3 */ OID_messageDigest, /* 1.2.840.113549.1.9.4 */ OID_signingTime, /* 1.2.840.113549.1.9.5 */ OID_smimeCapabilites, /* 1.2.840.113549.1.9.15 */ OID_smimeAuthenticatedAttrs, /* 1.2.840.113549.1.9.16.2.11 */ /* {iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2)} */ OID_md2, /* 1.2.840.113549.2.2 */ OID_md4, /* 1.2.840.113549.2.4 */ OID_md5, /* 1.2.840.113549.2.5 */ OID_mskrb5, /* 1.2.840.48018.1.2.2 */ OID_krb5, /* 1.2.840.113554.1.2.2 */ OID_krb5u2u, /* 1.2.840.113554.1.2.2.3 */ /* Microsoft Authenticode & Software Publishing */ OID_msIndirectData, /* 1.3.6.1.4.1.311.2.1.4 */ OID_msStatementType, /* 1.3.6.1.4.1.311.2.1.11 */ OID_msSpOpusInfo, /* 1.3.6.1.4.1.311.2.1.12 */ OID_msPeImageDataObjId, /* 1.3.6.1.4.1.311.2.1.15 */ OID_msIndividualSPKeyPurpose, /* 1.3.6.1.4.1.311.2.1.21 */ OID_msOutlookExpress, /* 1.3.6.1.4.1.311.16.4 */ OID_ntlmssp, /* 1.3.6.1.4.1.311.2.2.10 */ OID_spnego, /* 1.3.6.1.5.5.2 */ OID_IAKerb, /* 1.3.6.1.5.2.5 */ OID_PKU2U, /* 1.3.5.1.5.2.7 */ OID_Scram, /* 1.3.6.1.5.5.14 */ OID_certAuthInfoAccess, /* 1.3.6.1.5.5.7.1.1 */ OID_sha1, /* 1.3.14.3.2.26 */ OID_id_ansip384r1, /* 1.3.132.0.34 */ OID_sha256, /* 2.16.840.1.101.3.4.2.1 */ OID_sha384, /* 2.16.840.1.101.3.4.2.2 */ OID_sha512, /* 2.16.840.1.101.3.4.2.3 */ OID_sha224, /* 2.16.840.1.101.3.4.2.4 */ /* Distinguished Name attribute IDs [RFC 2256] */ OID_commonName, /* 2.5.4.3 */ OID_surname, /* 2.5.4.4 */ OID_countryName, /* 2.5.4.6 */ OID_locality, /* 2.5.4.7 */ OID_stateOrProvinceName, /* 2.5.4.8 */ OID_organizationName, /* 2.5.4.10 */ OID_organizationUnitName, /* 2.5.4.11 */ OID_title, /* 2.5.4.12 */ OID_description, /* 2.5.4.13 */ OID_name, /* 2.5.4.41 */ OID_givenName, /* 2.5.4.42 */ OID_initials, /* 2.5.4.43 */ OID_generationalQualifier, /* 2.5.4.44 */ /* Certificate extension IDs */ OID_subjectKeyIdentifier, /* 2.5.29.14 */ OID_keyUsage, /* 2.5.29.15 */ OID_subjectAltName, /* 2.5.29.17 */ OID_issuerAltName, /* 2.5.29.18 */ OID_basicConstraints, /* 2.5.29.19 */ OID_crlDistributionPoints, /* 2.5.29.31 */ OID_certPolicies, /* 2.5.29.32 */ OID_authorityKeyIdentifier, /* 2.5.29.35 */ OID_extKeyUsage, /* 2.5.29.37 */ /* Heimdal mechanisms */ OID_NetlogonMechanism, /* 1.2.752.43.14.2 */ OID_appleLocalKdcSupported, /* 1.2.752.43.14.3 */ /* EC-RDSA */ OID_gostCPSignA, /* 1.2.643.2.2.35.1 */ OID_gostCPSignB, /* 1.2.643.2.2.35.2 */ OID_gostCPSignC, /* 1.2.643.2.2.35.3 */ OID_gost2012PKey256, /* 1.2.643.7.1.1.1.1 */ OID_gost2012PKey512, /* 1.2.643.7.1.1.1.2 */ OID_gost2012Digest256, /* 1.2.643.7.1.1.2.2 */ OID_gost2012Digest512, /* 1.2.643.7.1.1.2.3 */ OID_gost2012Signature256, /* 1.2.643.7.1.1.3.2 */ OID_gost2012Signature512, /* 1.2.643.7.1.1.3.3 */ OID_gostTC26Sign256A, /* 1.2.643.7.1.2.1.1.1 */ OID_gostTC26Sign256B, /* 1.2.643.7.1.2.1.1.2 */ OID_gostTC26Sign256C, /* 1.2.643.7.1.2.1.1.3 */ OID_gostTC26Sign256D, /* 1.2.643.7.1.2.1.1.4 */ OID_gostTC26Sign512A, /* 1.2.643.7.1.2.1.2.1 */ OID_gostTC26Sign512B, /* 1.2.643.7.1.2.1.2.2 */ OID_gostTC26Sign512C, /* 1.2.643.7.1.2.1.2.3 */ /* OSCCA */ OID_sm2, /* 1.2.156.10197.1.301 */ OID_sm3, /* 1.2.156.10197.1.401 */ OID_SM2_with_SM3, /* 1.2.156.10197.1.501 */ OID_sm3WithRSAEncryption, /* 1.2.156.10197.1.504 */ /* TCG defined OIDS for TPM based keys */ OID_TPMLoadableKey, /* 2.23.133.10.1.3 */ OID_TPMImportableKey, /* 2.23.133.10.1.4 */ OID_TPMSealedData, /* 2.23.133.10.1.5 */ OID__NR }; extern enum OID look_up_OID(const void *data, size_t datasize); extern int parse_OID(const void *data, size_t datasize, enum OID *oid); extern int sprint_oid(const void *, size_t, char *, size_t); extern int sprint_OID(enum OID, char *, size_t); #endif /* _LINUX_OID_REGISTRY_H */ PK ! T�Y\ \ rcuwait.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RCUWAIT_H_ #define _LINUX_RCUWAIT_H_ #include <linux/rcupdate.h> #include <linux/sched/signal.h> /* * rcuwait provides a way of blocking and waking up a single * task in an rcu-safe manner. * * The only time @task is non-nil is when a user is blocked (or * checking if it needs to) on a condition, and reset as soon as we * know that the condition has succeeded and are awoken. */ struct rcuwait { struct task_struct __rcu *task; }; #define __RCUWAIT_INITIALIZER(name) \ { .task = NULL, } static inline void rcuwait_init(struct rcuwait *w) { w->task = NULL; } /* * Note: this provides no serialization and, just as with waitqueues, * requires care to estimate as to whether or not the wait is active. */ static inline int rcuwait_active(struct rcuwait *w) { return !!rcu_access_pointer(w->task); } extern int rcuwait_wake_up(struct rcuwait *w); /* * The caller is responsible for locking around rcuwait_wait_event(), * and [prepare_to/finish]_rcuwait() such that writes to @task are * properly serialized. */ static inline void prepare_to_rcuwait(struct rcuwait *w) { rcu_assign_pointer(w->task, current); } static inline void finish_rcuwait(struct rcuwait *w) { rcu_assign_pointer(w->task, NULL); __set_current_state(TASK_RUNNING); } #define rcuwait_wait_event(w, condition, state) \ ({ \ int __ret = 0; \ prepare_to_rcuwait(w); \ for (;;) { \ /* \ * Implicit barrier (A) pairs with (B) in \ * rcuwait_wake_up(). \ */ \ set_current_state(state); \ if (condition) \ break; \ \ if (signal_pending_state(state, current)) { \ __ret = -EINTR; \ break; \ } \ \ schedule(); \ } \ finish_rcuwait(w); \ __ret; \ }) #endif /* _LINUX_RCUWAIT_H_ */ PK ! h��nr4 r4 ww_mutex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Wound/Wait Mutexes: blocking mutual exclusion locks with deadlock avoidance * * Original mutex implementation started by Ingo Molnar: * * Copyright (C) 2004, 2005, 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> * * Wait/Die implementation: * Copyright (C) 2013 Canonical Ltd. * Choice of algorithm: * Copyright (C) 2018 WMWare Inc. * * This file contains the main data structure and API definitions. */ #ifndef __LINUX_WW_MUTEX_H #define __LINUX_WW_MUTEX_H #include <linux/mutex.h> #include <linux/rtmutex.h> #if defined(CONFIG_DEBUG_MUTEXES) || \ (defined(CONFIG_PREEMPT_RT) && defined(CONFIG_DEBUG_RT_MUTEXES)) #define DEBUG_WW_MUTEXES #endif #ifndef CONFIG_PREEMPT_RT #define WW_MUTEX_BASE mutex #define ww_mutex_base_init(l,n,k) __mutex_init(l,n,k) #define ww_mutex_base_trylock(l) mutex_trylock(l) #define ww_mutex_base_is_locked(b) mutex_is_locked((b)) #else #define WW_MUTEX_BASE rt_mutex #define ww_mutex_base_init(l,n,k) __rt_mutex_init(l,n,k) #define ww_mutex_base_trylock(l) rt_mutex_trylock(l) #define ww_mutex_base_is_locked(b) rt_mutex_base_is_locked(&(b)->rtmutex) #endif struct ww_class { atomic_long_t stamp; struct lock_class_key acquire_key; struct lock_class_key mutex_key; const char *acquire_name; const char *mutex_name; unsigned int is_wait_die; }; struct ww_mutex { struct WW_MUTEX_BASE base; struct ww_acquire_ctx *ctx; #ifdef DEBUG_WW_MUTEXES struct ww_class *ww_class; #endif }; struct ww_acquire_ctx { struct task_struct *task; unsigned long stamp; unsigned int acquired; unsigned short wounded; unsigned short is_wait_die; #ifdef DEBUG_WW_MUTEXES unsigned int done_acquire; struct ww_class *ww_class; void *contending_lock; #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif #ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH unsigned int deadlock_inject_interval; unsigned int deadlock_inject_countdown; #endif }; #define __WW_CLASS_INITIALIZER(ww_class, _is_wait_die) \ { .stamp = ATOMIC_LONG_INIT(0) \ , .acquire_name = #ww_class "_acquire" \ , .mutex_name = #ww_class "_mutex" \ , .is_wait_die = _is_wait_die } #define DEFINE_WD_CLASS(classname) \ struct ww_class classname = __WW_CLASS_INITIALIZER(classname, 1) #define DEFINE_WW_CLASS(classname) \ struct ww_class classname = __WW_CLASS_INITIALIZER(classname, 0) /** * ww_mutex_init - initialize the w/w mutex * @lock: the mutex to be initialized * @ww_class: the w/w class the mutex should belong to * * Initialize the w/w mutex to unlocked state and associate it with the given * class. Static define macro for w/w mutex is not provided and this function * is the only way to properly initialize the w/w mutex. * * It is not allowed to initialize an already locked mutex. */ static inline void ww_mutex_init(struct ww_mutex *lock, struct ww_class *ww_class) { ww_mutex_base_init(&lock->base, ww_class->mutex_name, &ww_class->mutex_key); lock->ctx = NULL; #ifdef DEBUG_WW_MUTEXES lock->ww_class = ww_class; #endif } /** * ww_acquire_init - initialize a w/w acquire context * @ctx: w/w acquire context to initialize * @ww_class: w/w class of the context * * Initializes an context to acquire multiple mutexes of the given w/w class. * * Context-based w/w mutex acquiring can be done in any order whatsoever within * a given lock class. Deadlocks will be detected and handled with the * wait/die logic. * * Mixing of context-based w/w mutex acquiring and single w/w mutex locking can * result in undetected deadlocks and is so forbidden. Mixing different contexts * for the same w/w class when acquiring mutexes can also result in undetected * deadlocks, and is hence also forbidden. Both types of abuse will be caught by * enabling CONFIG_PROVE_LOCKING. * * Nesting of acquire contexts for _different_ w/w classes is possible, subject * to the usual locking rules between different lock classes. * * An acquire context must be released with ww_acquire_fini by the same task * before the memory is freed. It is recommended to allocate the context itself * on the stack. */ static inline void ww_acquire_init(struct ww_acquire_ctx *ctx, struct ww_class *ww_class) { ctx->task = current; ctx->stamp = atomic_long_inc_return_relaxed(&ww_class->stamp); ctx->acquired = 0; ctx->wounded = false; ctx->is_wait_die = ww_class->is_wait_die; #ifdef DEBUG_WW_MUTEXES ctx->ww_class = ww_class; ctx->done_acquire = 0; ctx->contending_lock = NULL; #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC debug_check_no_locks_freed((void *)ctx, sizeof(*ctx)); lockdep_init_map(&ctx->dep_map, ww_class->acquire_name, &ww_class->acquire_key, 0); mutex_acquire(&ctx->dep_map, 0, 0, _RET_IP_); #endif #ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH ctx->deadlock_inject_interval = 1; ctx->deadlock_inject_countdown = ctx->stamp & 0xf; #endif } /** * ww_acquire_done - marks the end of the acquire phase * @ctx: the acquire context * * Marks the end of the acquire phase, any further w/w mutex lock calls using * this context are forbidden. * * Calling this function is optional, it is just useful to document w/w mutex * code and clearly designated the acquire phase from actually using the locked * data structures. */ static inline void ww_acquire_done(struct ww_acquire_ctx *ctx) { #ifdef DEBUG_WW_MUTEXES lockdep_assert_held(ctx); DEBUG_LOCKS_WARN_ON(ctx->done_acquire); ctx->done_acquire = 1; #endif } /** * ww_acquire_fini - releases a w/w acquire context * @ctx: the acquire context to free * * Releases a w/w acquire context. This must be called _after_ all acquired w/w * mutexes have been released with ww_mutex_unlock. */ static inline void ww_acquire_fini(struct ww_acquire_ctx *ctx) { #ifdef CONFIG_DEBUG_LOCK_ALLOC mutex_release(&ctx->dep_map, _THIS_IP_); #endif #ifdef DEBUG_WW_MUTEXES DEBUG_LOCKS_WARN_ON(ctx->acquired); if (!IS_ENABLED(CONFIG_PROVE_LOCKING)) /* * lockdep will normally handle this, * but fail without anyway */ ctx->done_acquire = 1; if (!IS_ENABLED(CONFIG_DEBUG_LOCK_ALLOC)) /* ensure ww_acquire_fini will still fail if called twice */ ctx->acquired = ~0U; #endif } /** * ww_mutex_lock - acquire the w/w mutex * @lock: the mutex to be acquired * @ctx: w/w acquire context, or NULL to acquire only a single lock. * * Lock the w/w mutex exclusively for this task. * * Deadlocks within a given w/w class of locks are detected and handled with the * wait/die algorithm. If the lock isn't immediately available this function * will either sleep until it is (wait case). Or it selects the current context * for backing off by returning -EDEADLK (die case). Trying to acquire the * same lock with the same context twice is also detected and signalled by * returning -EALREADY. Returns 0 if the mutex was successfully acquired. * * In the die case the caller must release all currently held w/w mutexes for * the given context and then wait for this contending lock to be available by * calling ww_mutex_lock_slow. Alternatively callers can opt to not acquire this * lock and proceed with trying to acquire further w/w mutexes (e.g. when * scanning through lru lists trying to free resources). * * The mutex must later on be released by the same task that * acquired it. The task may not exit without first unlocking the mutex. Also, * kernel memory where the mutex resides must not be freed with the mutex still * locked. The mutex must first be initialized (or statically defined) before it * can be locked. memset()-ing the mutex to 0 is not allowed. The mutex must be * of the same w/w lock class as was used to initialize the acquire context. * * A mutex acquired with this function must be released with ww_mutex_unlock. */ extern int /* __must_check */ ww_mutex_lock(struct ww_mutex *lock, struct ww_acquire_ctx *ctx); /** * ww_mutex_lock_interruptible - acquire the w/w mutex, interruptible * @lock: the mutex to be acquired * @ctx: w/w acquire context * * Lock the w/w mutex exclusively for this task. * * Deadlocks within a given w/w class of locks are detected and handled with the * wait/die algorithm. If the lock isn't immediately available this function * will either sleep until it is (wait case). Or it selects the current context * for backing off by returning -EDEADLK (die case). Trying to acquire the * same lock with the same context twice is also detected and signalled by * returning -EALREADY. Returns 0 if the mutex was successfully acquired. If a * signal arrives while waiting for the lock then this function returns -EINTR. * * In the die case the caller must release all currently held w/w mutexes for * the given context and then wait for this contending lock to be available by * calling ww_mutex_lock_slow_interruptible. Alternatively callers can opt to * not acquire this lock and proceed with trying to acquire further w/w mutexes * (e.g. when scanning through lru lists trying to free resources). * * The mutex must later on be released by the same task that * acquired it. The task may not exit without first unlocking the mutex. Also, * kernel memory where the mutex resides must not be freed with the mutex still * locked. The mutex must first be initialized (or statically defined) before it * can be locked. memset()-ing the mutex to 0 is not allowed. The mutex must be * of the same w/w lock class as was used to initialize the acquire context. * * A mutex acquired with this function must be released with ww_mutex_unlock. */ extern int __must_check ww_mutex_lock_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ctx); /** * ww_mutex_lock_slow - slowpath acquiring of the w/w mutex * @lock: the mutex to be acquired * @ctx: w/w acquire context * * Acquires a w/w mutex with the given context after a die case. This function * will sleep until the lock becomes available. * * The caller must have released all w/w mutexes already acquired with the * context and then call this function on the contended lock. * * Afterwards the caller may continue to (re)acquire the other w/w mutexes it * needs with ww_mutex_lock. Note that the -EALREADY return code from * ww_mutex_lock can be used to avoid locking this contended mutex twice. * * It is forbidden to call this function with any other w/w mutexes associated * with the context held. It is forbidden to call this on anything else than the * contending mutex. * * Note that the slowpath lock acquiring can also be done by calling * ww_mutex_lock directly. This function here is simply to help w/w mutex * locking code readability by clearly denoting the slowpath. */ static inline void ww_mutex_lock_slow(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) { int ret; #ifdef DEBUG_WW_MUTEXES DEBUG_LOCKS_WARN_ON(!ctx->contending_lock); #endif ret = ww_mutex_lock(lock, ctx); (void)ret; } /** * ww_mutex_lock_slow_interruptible - slowpath acquiring of the w/w mutex, interruptible * @lock: the mutex to be acquired * @ctx: w/w acquire context * * Acquires a w/w mutex with the given context after a die case. This function * will sleep until the lock becomes available and returns 0 when the lock has * been acquired. If a signal arrives while waiting for the lock then this * function returns -EINTR. * * The caller must have released all w/w mutexes already acquired with the * context and then call this function on the contended lock. * * Afterwards the caller may continue to (re)acquire the other w/w mutexes it * needs with ww_mutex_lock. Note that the -EALREADY return code from * ww_mutex_lock can be used to avoid locking this contended mutex twice. * * It is forbidden to call this function with any other w/w mutexes associated * with the given context held. It is forbidden to call this on anything else * than the contending mutex. * * Note that the slowpath lock acquiring can also be done by calling * ww_mutex_lock_interruptible directly. This function here is simply to help * w/w mutex locking code readability by clearly denoting the slowpath. */ static inline int __must_check ww_mutex_lock_slow_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) { #ifdef DEBUG_WW_MUTEXES DEBUG_LOCKS_WARN_ON(!ctx->contending_lock); #endif return ww_mutex_lock_interruptible(lock, ctx); } extern void ww_mutex_unlock(struct ww_mutex *lock); /** * ww_mutex_trylock - tries to acquire the w/w mutex without acquire context * @lock: mutex to lock * * Trylocks a mutex without acquire context, so no deadlock detection is * possible. Returns 1 if the mutex has been acquired successfully, 0 otherwise. */ static inline int __must_check ww_mutex_trylock(struct ww_mutex *lock) { return ww_mutex_base_trylock(&lock->base); } /*** * ww_mutex_destroy - mark a w/w mutex unusable * @lock: the mutex to be destroyed * * This function marks the mutex uninitialized, and any subsequent * use of the mutex is forbidden. The mutex must not be locked when * this function is called. */ static inline void ww_mutex_destroy(struct ww_mutex *lock) { #ifndef CONFIG_PREEMPT_RT mutex_destroy(&lock->base); #endif } /** * ww_mutex_is_locked - is the w/w mutex locked * @lock: the mutex to be queried * * Returns 1 if the mutex is locked, 0 if unlocked. */ static inline bool ww_mutex_is_locked(struct ww_mutex *lock) { return ww_mutex_base_is_locked(&lock->base); } #endif PK ! �@� sunrpc/bc_xprt.hnu �[��� /****************************************************************************** (c) 2008 NetApp. All Rights Reserved. NetApp provides this source code under the GPL v2 License. The GPL v2 license is available at https://opensource.org/licenses/gpl-license.php. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************/ /* * Functions to create and manage the backchannel */ #ifndef _LINUX_SUNRPC_BC_XPRT_H #define _LINUX_SUNRPC_BC_XPRT_H #include <linux/sunrpc/svcsock.h> #include <linux/sunrpc/xprt.h> #include <linux/sunrpc/sched.h> #ifdef CONFIG_SUNRPC_BACKCHANNEL struct rpc_rqst *xprt_lookup_bc_request(struct rpc_xprt *xprt, __be32 xid); void xprt_complete_bc_request(struct rpc_rqst *req, uint32_t copied); void xprt_init_bc_request(struct rpc_rqst *req, struct rpc_task *task); void xprt_free_bc_request(struct rpc_rqst *req); int xprt_setup_backchannel(struct rpc_xprt *, unsigned int min_reqs); void xprt_destroy_backchannel(struct rpc_xprt *, unsigned int max_reqs); /* Socket backchannel transport methods */ int xprt_setup_bc(struct rpc_xprt *xprt, unsigned int min_reqs); void xprt_destroy_bc(struct rpc_xprt *xprt, unsigned int max_reqs); void xprt_free_bc_rqst(struct rpc_rqst *req); unsigned int xprt_bc_max_slots(struct rpc_xprt *xprt); /* * Determine if a shared backchannel is in use */ static inline bool svc_is_backchannel(const struct svc_rqst *rqstp) { return rqstp->rq_server->sv_bc_enabled; } static inline void set_bc_enabled(struct svc_serv *serv) { serv->sv_bc_enabled = true; } #else /* CONFIG_SUNRPC_BACKCHANNEL */ static inline int xprt_setup_backchannel(struct rpc_xprt *xprt, unsigned int min_reqs) { return 0; } static inline void xprt_destroy_backchannel(struct rpc_xprt *xprt, unsigned int max_reqs) { } static inline bool svc_is_backchannel(const struct svc_rqst *rqstp) { return false; } static inline void set_bc_enabled(struct svc_serv *serv) { } static inline void xprt_free_bc_request(struct rpc_rqst *req) { } #endif /* CONFIG_SUNRPC_BACKCHANNEL */ #endif /* _LINUX_SUNRPC_BC_XPRT_H */ PK ! �u}� � sunrpc/xprtmultipath.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * RPC client multipathing definitions * * Copyright (c) 2015, 2016, Primary Data, Inc. All rights reserved. * * Trond Myklebust <trond.myklebust@primarydata.com> */ #ifndef _NET_SUNRPC_XPRTMULTIPATH_H #define _NET_SUNRPC_XPRTMULTIPATH_H struct rpc_xprt_iter_ops; struct rpc_sysfs_xprt_switch; struct rpc_xprt_switch { spinlock_t xps_lock; struct kref xps_kref; unsigned int xps_id; unsigned int xps_nxprts; unsigned int xps_nactive; unsigned int xps_nunique_destaddr_xprts; atomic_long_t xps_queuelen; struct list_head xps_xprt_list; struct net * xps_net; const struct rpc_xprt_iter_ops *xps_iter_ops; struct rpc_sysfs_xprt_switch *xps_sysfs; struct rcu_head xps_rcu; }; struct rpc_xprt_iter { struct rpc_xprt_switch __rcu *xpi_xpswitch; struct rpc_xprt * xpi_cursor; const struct rpc_xprt_iter_ops *xpi_ops; }; struct rpc_xprt_iter_ops { void (*xpi_rewind)(struct rpc_xprt_iter *); struct rpc_xprt *(*xpi_xprt)(struct rpc_xprt_iter *); struct rpc_xprt *(*xpi_next)(struct rpc_xprt_iter *); }; extern struct rpc_xprt_switch *xprt_switch_alloc(struct rpc_xprt *xprt, gfp_t gfp_flags); extern struct rpc_xprt_switch *xprt_switch_get(struct rpc_xprt_switch *xps); extern void xprt_switch_put(struct rpc_xprt_switch *xps); extern void rpc_xprt_switch_set_roundrobin(struct rpc_xprt_switch *xps); extern void rpc_xprt_switch_add_xprt(struct rpc_xprt_switch *xps, struct rpc_xprt *xprt); extern void rpc_xprt_switch_remove_xprt(struct rpc_xprt_switch *xps, struct rpc_xprt *xprt); extern void xprt_iter_init(struct rpc_xprt_iter *xpi, struct rpc_xprt_switch *xps); extern void xprt_iter_init_listall(struct rpc_xprt_iter *xpi, struct rpc_xprt_switch *xps); extern void xprt_iter_destroy(struct rpc_xprt_iter *xpi); extern struct rpc_xprt_switch *xprt_iter_xchg_switch( struct rpc_xprt_iter *xpi, struct rpc_xprt_switch *newswitch); extern struct rpc_xprt *xprt_iter_xprt(struct rpc_xprt_iter *xpi); extern struct rpc_xprt *xprt_iter_get_xprt(struct rpc_xprt_iter *xpi); extern struct rpc_xprt *xprt_iter_get_next(struct rpc_xprt_iter *xpi); extern bool rpc_xprt_switch_has_addr(struct rpc_xprt_switch *xps, const struct sockaddr *sap); extern void xprt_multipath_cleanup_ids(void); #endif PK ! � ���S �S sunrpc/xdr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * XDR standard data types and function declarations * * Copyright (C) 1995-1997 Olaf Kirch <okir@monad.swb.de> * * Based on: * RFC 4506 "XDR: External Data Representation Standard", May 2006 */ #ifndef _SUNRPC_XDR_H_ #define _SUNRPC_XDR_H_ #include <linux/uio.h> #include <asm/byteorder.h> #include <asm/unaligned.h> #include <linux/scatterlist.h> struct bio_vec; struct rpc_rqst; /* * Size of an XDR encoding unit in bytes, i.e. 32 bits, * as defined in Section 3 of RFC 4506. All encoded * XDR data items are aligned on a boundary of 32 bits. */ #define XDR_UNIT sizeof(__be32) /* * Buffer adjustment */ #define XDR_QUADLEN(l) (((l) + 3) >> 2) /* * Generic opaque `network object.' */ #define XDR_MAX_NETOBJ 1024 struct xdr_netobj { unsigned int len; u8 * data; }; /* * Basic structure for transmission/reception of a client XDR message. * Features a header (for a linear buffer containing RPC headers * and the data payload for short messages), and then an array of * pages. * The tail iovec allows you to append data after the page array. Its * main interest is for appending padding to the pages in order to * satisfy the int_32-alignment requirements in RFC1832. * * For the future, we might want to string several of these together * in a list if anybody wants to make use of NFSv4 COMPOUND * operations and/or has a need for scatter/gather involving pages. */ struct xdr_buf { struct kvec head[1], /* RPC header + non-page data */ tail[1]; /* Appended after page data */ struct bio_vec *bvec; struct page ** pages; /* Array of pages */ unsigned int page_base, /* Start of page data */ page_len, /* Length of page data */ flags; /* Flags for data disposition */ #define XDRBUF_READ 0x01 /* target of file read */ #define XDRBUF_WRITE 0x02 /* source of file write */ #define XDRBUF_SPARSE_PAGES 0x04 /* Page array is sparse */ unsigned int buflen, /* Total length of storage buffer */ len; /* Length of XDR encoded message */ }; static inline void xdr_buf_init(struct xdr_buf *buf, void *start, size_t len) { buf->head[0].iov_base = start; buf->head[0].iov_len = len; buf->tail[0].iov_len = 0; buf->pages = NULL; buf->page_len = 0; buf->flags = 0; buf->len = 0; buf->buflen = len; } /* * pre-xdr'ed macros. */ #define xdr_zero cpu_to_be32(0) #define xdr_one cpu_to_be32(1) #define xdr_two cpu_to_be32(2) #define rpc_auth_null cpu_to_be32(RPC_AUTH_NULL) #define rpc_auth_unix cpu_to_be32(RPC_AUTH_UNIX) #define rpc_auth_short cpu_to_be32(RPC_AUTH_SHORT) #define rpc_auth_gss cpu_to_be32(RPC_AUTH_GSS) #define rpc_auth_tls cpu_to_be32(RPC_AUTH_TLS) #define rpc_call cpu_to_be32(RPC_CALL) #define rpc_reply cpu_to_be32(RPC_REPLY) #define rpc_msg_accepted cpu_to_be32(RPC_MSG_ACCEPTED) #define rpc_success cpu_to_be32(RPC_SUCCESS) #define rpc_prog_unavail cpu_to_be32(RPC_PROG_UNAVAIL) #define rpc_prog_mismatch cpu_to_be32(RPC_PROG_MISMATCH) #define rpc_proc_unavail cpu_to_be32(RPC_PROC_UNAVAIL) #define rpc_garbage_args cpu_to_be32(RPC_GARBAGE_ARGS) #define rpc_system_err cpu_to_be32(RPC_SYSTEM_ERR) #define rpc_drop_reply cpu_to_be32(RPC_DROP_REPLY) #define rpc_mismatch cpu_to_be32(RPC_MISMATCH) #define rpc_auth_error cpu_to_be32(RPC_AUTH_ERROR) #define rpc_auth_ok cpu_to_be32(RPC_AUTH_OK) #define rpc_autherr_badcred cpu_to_be32(RPC_AUTH_BADCRED) #define rpc_autherr_rejectedcred cpu_to_be32(RPC_AUTH_REJECTEDCRED) #define rpc_autherr_badverf cpu_to_be32(RPC_AUTH_BADVERF) #define rpc_autherr_rejectedverf cpu_to_be32(RPC_AUTH_REJECTEDVERF) #define rpc_autherr_tooweak cpu_to_be32(RPC_AUTH_TOOWEAK) #define rpcsec_gsserr_credproblem cpu_to_be32(RPCSEC_GSS_CREDPROBLEM) #define rpcsec_gsserr_ctxproblem cpu_to_be32(RPCSEC_GSS_CTXPROBLEM) /* * Miscellaneous XDR helper functions */ __be32 *xdr_encode_opaque_fixed(__be32 *p, const void *ptr, unsigned int len); __be32 *xdr_encode_opaque(__be32 *p, const void *ptr, unsigned int len); __be32 *xdr_encode_string(__be32 *p, const char *s); __be32 *xdr_decode_string_inplace(__be32 *p, char **sp, unsigned int *lenp, unsigned int maxlen); __be32 *xdr_encode_netobj(__be32 *p, const struct xdr_netobj *); __be32 *xdr_decode_netobj(__be32 *p, struct xdr_netobj *); void xdr_inline_pages(struct xdr_buf *, unsigned int, struct page **, unsigned int, unsigned int); void xdr_terminate_string(const struct xdr_buf *, const u32); size_t xdr_buf_pagecount(const struct xdr_buf *buf); int xdr_alloc_bvec(struct xdr_buf *buf, gfp_t gfp); void xdr_free_bvec(struct xdr_buf *buf); static inline __be32 *xdr_encode_array(__be32 *p, const void *s, unsigned int len) { return xdr_encode_opaque(p, s, len); } /* * Decode 64bit quantities (NFSv3 support) */ static inline __be32 * xdr_encode_hyper(__be32 *p, __u64 val) { put_unaligned_be64(val, p); return p + 2; } static inline __be32 * xdr_decode_hyper(__be32 *p, __u64 *valp) { *valp = get_unaligned_be64(p); return p + 2; } static inline __be32 * xdr_decode_opaque_fixed(__be32 *p, void *ptr, unsigned int len) { memcpy(ptr, p, len); return p + XDR_QUADLEN(len); } static inline void xdr_netobj_dup(struct xdr_netobj *dst, struct xdr_netobj *src, gfp_t gfp_mask) { dst->data = kmemdup(src->data, src->len, gfp_mask); dst->len = src->len; } /* * Adjust kvec to reflect end of xdr'ed data (RPC client XDR) */ static inline int xdr_adjust_iovec(struct kvec *iov, __be32 *p) { return iov->iov_len = ((u8 *) p - (u8 *) iov->iov_base); } /* * XDR buffer helper functions */ extern void xdr_shift_buf(struct xdr_buf *, size_t); extern void xdr_buf_from_iov(const struct kvec *, struct xdr_buf *); extern int xdr_buf_subsegment(const struct xdr_buf *, struct xdr_buf *, unsigned int, unsigned int); extern void xdr_buf_trim(struct xdr_buf *, unsigned int); extern int read_bytes_from_xdr_buf(const struct xdr_buf *, unsigned int, void *, unsigned int); extern int write_bytes_to_xdr_buf(const struct xdr_buf *, unsigned int, void *, unsigned int); extern int xdr_encode_word(const struct xdr_buf *, unsigned int, u32); extern int xdr_decode_word(const struct xdr_buf *, unsigned int, u32 *); struct xdr_array2_desc; typedef int (*xdr_xcode_elem_t)(struct xdr_array2_desc *desc, void *elem); struct xdr_array2_desc { unsigned int elem_size; unsigned int array_len; unsigned int array_maxlen; xdr_xcode_elem_t xcode; }; extern int xdr_decode_array2(const struct xdr_buf *buf, unsigned int base, struct xdr_array2_desc *desc); extern int xdr_encode_array2(const struct xdr_buf *buf, unsigned int base, struct xdr_array2_desc *desc); extern void _copy_from_pages(char *p, struct page **pages, size_t pgbase, size_t len); /* * Provide some simple tools for XDR buffer overflow-checking etc. */ struct xdr_stream { __be32 *p; /* start of available buffer */ struct xdr_buf *buf; /* XDR buffer to read/write */ __be32 *end; /* end of available buffer space */ struct kvec *iov; /* pointer to the current kvec */ struct kvec scratch; /* Scratch buffer */ struct page **page_ptr; /* pointer to the current page */ unsigned int nwords; /* Remaining decode buffer length */ struct rpc_rqst *rqst; /* For debugging */ }; /* * These are the xdr_stream style generic XDR encode and decode functions. */ typedef void (*kxdreproc_t)(struct rpc_rqst *rqstp, struct xdr_stream *xdr, const void *obj); typedef int (*kxdrdproc_t)(struct rpc_rqst *rqstp, struct xdr_stream *xdr, void *obj); extern void xdr_init_encode(struct xdr_stream *xdr, struct xdr_buf *buf, __be32 *p, struct rpc_rqst *rqst); extern void xdr_init_encode_pages(struct xdr_stream *xdr, struct xdr_buf *buf, struct page **pages, struct rpc_rqst *rqst); extern __be32 *xdr_reserve_space(struct xdr_stream *xdr, size_t nbytes); extern int xdr_reserve_space_vec(struct xdr_stream *xdr, struct kvec *vec, size_t nbytes); extern void xdr_commit_encode(struct xdr_stream *xdr); extern void xdr_truncate_encode(struct xdr_stream *xdr, size_t len); extern int xdr_restrict_buflen(struct xdr_stream *xdr, int newbuflen); extern void xdr_write_pages(struct xdr_stream *xdr, struct page **pages, unsigned int base, unsigned int len); extern unsigned int xdr_stream_pos(const struct xdr_stream *xdr); extern unsigned int xdr_page_pos(const struct xdr_stream *xdr); extern void xdr_init_decode(struct xdr_stream *xdr, struct xdr_buf *buf, __be32 *p, struct rpc_rqst *rqst); extern void xdr_init_decode_pages(struct xdr_stream *xdr, struct xdr_buf *buf, struct page **pages, unsigned int len); extern __be32 *xdr_inline_decode(struct xdr_stream *xdr, size_t nbytes); extern unsigned int xdr_read_pages(struct xdr_stream *xdr, unsigned int len); extern void xdr_enter_page(struct xdr_stream *xdr, unsigned int len); extern int xdr_process_buf(const struct xdr_buf *buf, unsigned int offset, unsigned int len, int (*actor)(struct scatterlist *, void *), void *data); extern unsigned int xdr_align_data(struct xdr_stream *, unsigned int offset, unsigned int length); extern unsigned int xdr_expand_hole(struct xdr_stream *, unsigned int offset, unsigned int length); extern bool xdr_stream_subsegment(struct xdr_stream *xdr, struct xdr_buf *subbuf, unsigned int len); /** * xdr_set_scratch_buffer - Attach a scratch buffer for decoding data. * @xdr: pointer to xdr_stream struct * @buf: pointer to an empty buffer * @buflen: size of 'buf' * * The scratch buffer is used when decoding from an array of pages. * If an xdr_inline_decode() call spans across page boundaries, then * we copy the data into the scratch buffer in order to allow linear * access. */ static inline void xdr_set_scratch_buffer(struct xdr_stream *xdr, void *buf, size_t buflen) { xdr->scratch.iov_base = buf; xdr->scratch.iov_len = buflen; } /** * xdr_set_scratch_page - Attach a scratch buffer for decoding data * @xdr: pointer to xdr_stream struct * @page: an anonymous page * * See xdr_set_scratch_buffer(). */ static inline void xdr_set_scratch_page(struct xdr_stream *xdr, struct page *page) { xdr_set_scratch_buffer(xdr, page_address(page), PAGE_SIZE); } /** * xdr_reset_scratch_buffer - Clear scratch buffer information * @xdr: pointer to xdr_stream struct * * See xdr_set_scratch_buffer(). */ static inline void xdr_reset_scratch_buffer(struct xdr_stream *xdr) { xdr_set_scratch_buffer(xdr, NULL, 0); } /** * xdr_stream_remaining - Return the number of bytes remaining in the stream * @xdr: pointer to struct xdr_stream * * Return value: * Number of bytes remaining in @xdr before xdr->end */ static inline size_t xdr_stream_remaining(const struct xdr_stream *xdr) { return xdr->nwords << 2; } ssize_t xdr_stream_decode_opaque(struct xdr_stream *xdr, void *ptr, size_t size); ssize_t xdr_stream_decode_opaque_dup(struct xdr_stream *xdr, void **ptr, size_t maxlen, gfp_t gfp_flags); ssize_t xdr_stream_decode_string(struct xdr_stream *xdr, char *str, size_t size); ssize_t xdr_stream_decode_string_dup(struct xdr_stream *xdr, char **str, size_t maxlen, gfp_t gfp_flags); /** * xdr_align_size - Calculate padded size of an object * @n: Size of an object being XDR encoded (in bytes) * * Return value: * Size (in bytes) of the object including xdr padding */ static inline size_t xdr_align_size(size_t n) { const size_t mask = XDR_UNIT - 1; return (n + mask) & ~mask; } /** * xdr_pad_size - Calculate size of an object's pad * @n: Size of an object being XDR encoded (in bytes) * * This implementation avoids the need for conditional * branches or modulo division. * * Return value: * Size (in bytes) of the needed XDR pad */ static inline size_t xdr_pad_size(size_t n) { return xdr_align_size(n) - n; } /** * xdr_stream_encode_item_present - Encode a "present" list item * @xdr: pointer to xdr_stream * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_item_present(struct xdr_stream *xdr) { const size_t len = XDR_UNIT; __be32 *p = xdr_reserve_space(xdr, len); if (unlikely(!p)) return -EMSGSIZE; *p = xdr_one; return len; } /** * xdr_stream_encode_item_absent - Encode a "not present" list item * @xdr: pointer to xdr_stream * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline int xdr_stream_encode_item_absent(struct xdr_stream *xdr) { const size_t len = XDR_UNIT; __be32 *p = xdr_reserve_space(xdr, len); if (unlikely(!p)) return -EMSGSIZE; *p = xdr_zero; return len; } /** * xdr_encode_bool - Encode a boolean item * @p: address in a buffer into which to encode * @n: boolean value to encode * * Return value: * Address of item following the encoded boolean */ static inline __be32 *xdr_encode_bool(__be32 *p, u32 n) { *p++ = n ? xdr_one : xdr_zero; return p; } /** * xdr_stream_encode_bool - Encode a boolean item * @xdr: pointer to xdr_stream * @n: boolean value to encode * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline int xdr_stream_encode_bool(struct xdr_stream *xdr, __u32 n) { const size_t len = XDR_UNIT; __be32 *p = xdr_reserve_space(xdr, len); if (unlikely(!p)) return -EMSGSIZE; xdr_encode_bool(p, n); return len; } /** * xdr_stream_encode_u32 - Encode a 32-bit integer * @xdr: pointer to xdr_stream * @n: integer to encode * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_u32(struct xdr_stream *xdr, __u32 n) { const size_t len = sizeof(n); __be32 *p = xdr_reserve_space(xdr, len); if (unlikely(!p)) return -EMSGSIZE; *p = cpu_to_be32(n); return len; } /** * xdr_stream_encode_u64 - Encode a 64-bit integer * @xdr: pointer to xdr_stream * @n: 64-bit integer to encode * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_u64(struct xdr_stream *xdr, __u64 n) { const size_t len = sizeof(n); __be32 *p = xdr_reserve_space(xdr, len); if (unlikely(!p)) return -EMSGSIZE; xdr_encode_hyper(p, n); return len; } /** * xdr_stream_encode_opaque_inline - Encode opaque xdr data * @xdr: pointer to xdr_stream * @ptr: pointer to void pointer * @len: size of object * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_opaque_inline(struct xdr_stream *xdr, void **ptr, size_t len) { size_t count = sizeof(__u32) + xdr_align_size(len); __be32 *p = xdr_reserve_space(xdr, count); if (unlikely(!p)) { *ptr = NULL; return -EMSGSIZE; } xdr_encode_opaque(p, NULL, len); *ptr = ++p; return count; } /** * xdr_stream_encode_opaque_fixed - Encode fixed length opaque xdr data * @xdr: pointer to xdr_stream * @ptr: pointer to opaque data object * @len: size of object pointed to by @ptr * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_opaque_fixed(struct xdr_stream *xdr, const void *ptr, size_t len) { __be32 *p = xdr_reserve_space(xdr, len); if (unlikely(!p)) return -EMSGSIZE; xdr_encode_opaque_fixed(p, ptr, len); return xdr_align_size(len); } /** * xdr_stream_encode_opaque - Encode variable length opaque xdr data * @xdr: pointer to xdr_stream * @ptr: pointer to opaque data object * @len: size of object pointed to by @ptr * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_opaque(struct xdr_stream *xdr, const void *ptr, size_t len) { size_t count = sizeof(__u32) + xdr_align_size(len); __be32 *p = xdr_reserve_space(xdr, count); if (unlikely(!p)) return -EMSGSIZE; xdr_encode_opaque(p, ptr, len); return count; } /** * xdr_stream_encode_uint32_array - Encode variable length array of integers * @xdr: pointer to xdr_stream * @array: array of integers * @array_size: number of elements in @array * * Return values: * On success, returns length in bytes of XDR buffer consumed * %-EMSGSIZE on XDR buffer overflow */ static inline ssize_t xdr_stream_encode_uint32_array(struct xdr_stream *xdr, const __u32 *array, size_t array_size) { ssize_t ret = (array_size+1) * sizeof(__u32); __be32 *p = xdr_reserve_space(xdr, ret); if (unlikely(!p)) return -EMSGSIZE; *p++ = cpu_to_be32(array_size); for (; array_size > 0; p++, array++, array_size--) *p = cpu_to_be32p(array); return ret; } /** * xdr_item_is_absent - symbolically handle XDR discriminators * @p: pointer to undecoded discriminator * * Return values: * %true if the following XDR item is absent * %false if the following XDR item is present */ static inline bool xdr_item_is_absent(const __be32 *p) { return *p == xdr_zero; } /** * xdr_item_is_present - symbolically handle XDR discriminators * @p: pointer to undecoded discriminator * * Return values: * %true if the following XDR item is present * %false if the following XDR item is absent */ static inline bool xdr_item_is_present(const __be32 *p) { return *p != xdr_zero; } /** * xdr_stream_decode_bool - Decode a boolean * @xdr: pointer to xdr_stream * @ptr: pointer to a u32 in which to store the result * * Return values: * %0 on success * %-EBADMSG on XDR buffer overflow */ static inline ssize_t xdr_stream_decode_bool(struct xdr_stream *xdr, __u32 *ptr) { const size_t count = sizeof(*ptr); __be32 *p = xdr_inline_decode(xdr, count); if (unlikely(!p)) return -EBADMSG; *ptr = (*p != xdr_zero); return 0; } /** * xdr_stream_decode_u32 - Decode a 32-bit integer * @xdr: pointer to xdr_stream * @ptr: location to store integer * * Return values: * %0 on success * %-EBADMSG on XDR buffer overflow */ static inline ssize_t xdr_stream_decode_u32(struct xdr_stream *xdr, __u32 *ptr) { const size_t count = sizeof(*ptr); __be32 *p = xdr_inline_decode(xdr, count); if (unlikely(!p)) return -EBADMSG; *ptr = be32_to_cpup(p); return 0; } /** * xdr_stream_decode_u64 - Decode a 64-bit integer * @xdr: pointer to xdr_stream * @ptr: location to store 64-bit integer * * Return values: * %0 on success * %-EBADMSG on XDR buffer overflow */ static inline ssize_t xdr_stream_decode_u64(struct xdr_stream *xdr, __u64 *ptr) { const size_t count = sizeof(*ptr); __be32 *p = xdr_inline_decode(xdr, count); if (unlikely(!p)) return -EBADMSG; xdr_decode_hyper(p, ptr); return 0; } /** * xdr_stream_decode_opaque_fixed - Decode fixed length opaque xdr data * @xdr: pointer to xdr_stream * @ptr: location to store data * @len: size of buffer pointed to by @ptr * * Return values: * On success, returns size of object stored in @ptr * %-EBADMSG on XDR buffer overflow */ static inline ssize_t xdr_stream_decode_opaque_fixed(struct xdr_stream *xdr, void *ptr, size_t len) { __be32 *p = xdr_inline_decode(xdr, len); if (unlikely(!p)) return -EBADMSG; xdr_decode_opaque_fixed(p, ptr, len); return len; } /** * xdr_stream_decode_opaque_inline - Decode variable length opaque xdr data * @xdr: pointer to xdr_stream * @ptr: location to store pointer to opaque data * @maxlen: maximum acceptable object size * * Note: the pointer stored in @ptr cannot be assumed valid after the XDR * buffer has been destroyed, or even after calling xdr_inline_decode() * on @xdr. It is therefore expected that the object it points to should * be processed immediately. * * Return values: * On success, returns size of object stored in *@ptr * %-EBADMSG on XDR buffer overflow * %-EMSGSIZE if the size of the object would exceed @maxlen */ static inline ssize_t xdr_stream_decode_opaque_inline(struct xdr_stream *xdr, void **ptr, size_t maxlen) { __be32 *p; __u32 len; *ptr = NULL; if (unlikely(xdr_stream_decode_u32(xdr, &len) < 0)) return -EBADMSG; if (len != 0) { p = xdr_inline_decode(xdr, len); if (unlikely(!p)) return -EBADMSG; if (unlikely(len > maxlen)) return -EMSGSIZE; *ptr = p; } return len; } /** * xdr_stream_decode_uint32_array - Decode variable length array of integers * @xdr: pointer to xdr_stream * @array: location to store the integer array or NULL * @array_size: number of elements to store * * Return values: * On success, returns number of elements stored in @array * %-EBADMSG on XDR buffer overflow * %-EMSGSIZE if the size of the array exceeds @array_size */ static inline ssize_t xdr_stream_decode_uint32_array(struct xdr_stream *xdr, __u32 *array, size_t array_size) { __be32 *p; __u32 len; ssize_t retval; if (unlikely(xdr_stream_decode_u32(xdr, &len) < 0)) return -EBADMSG; if (len > SIZE_MAX / sizeof(*p)) return -EBADMSG; p = xdr_inline_decode(xdr, len * sizeof(*p)); if (unlikely(!p)) return -EBADMSG; if (array == NULL) return len; if (len <= array_size) { if (len < array_size) memset(array+len, 0, (array_size-len)*sizeof(*array)); array_size = len; retval = len; } else retval = -EMSGSIZE; for (; array_size > 0; p++, array++, array_size--) *array = be32_to_cpup(p); return retval; } #endif /* _SUNRPC_XDR_H_ */ PK ! � uѾ# �# sunrpc/cache.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/sunrpc/cache.h * * Generic code for various authentication-related caches * used by sunrpc clients and servers. * * Copyright (C) 2002 Neil Brown <neilb@cse.unsw.edu.au> */ #ifndef _LINUX_SUNRPC_CACHE_H_ #define _LINUX_SUNRPC_CACHE_H_ #include <linux/kref.h> #include <linux/slab.h> #include <linux/atomic.h> #include <linux/kstrtox.h> #include <linux/proc_fs.h> /* * Each cache requires: * - A 'struct cache_detail' which contains information specific to the cache * for common code to use. * - An item structure that must contain a "struct cache_head" * - A lookup function defined using DefineCacheLookup * - A 'put' function that can release a cache item. It will only * be called after cache_put has succeed, so there are guarantee * to be no references. * - A function to calculate a hash of an item's key. * * as well as assorted code fragments (e.g. compare keys) and numbers * (e.g. hash size, goal_age, etc). * * Each cache must be registered so that it can be cleaned regularly. * When the cache is unregistered, it is flushed completely. * * Entries have a ref count and a 'hashed' flag which counts the existence * in the hash table. * We only expire entries when refcount is zero. * Existence in the cache is counted the refcount. */ /* Every cache item has a common header that is used * for expiring and refreshing entries. * */ struct cache_head { struct hlist_node cache_list; time64_t expiry_time; /* After time expiry_time, don't use * the data */ time64_t last_refresh; /* If CACHE_PENDING, this is when upcall was * sent, else this is when update was * received, though it is alway set to * be *after* ->flush_time. */ struct kref ref; unsigned long flags; }; #define CACHE_VALID 0 /* Entry contains valid data */ #define CACHE_NEGATIVE 1 /* Negative entry - there is no match for the key */ #define CACHE_PENDING 2 /* An upcall has been sent but no reply received yet*/ #define CACHE_CLEANED 3 /* Entry has been cleaned from cache */ #define CACHE_NEW_EXPIRY 120 /* keep new things pending confirmation for 120 seconds */ struct cache_detail { struct module * owner; int hash_size; struct hlist_head * hash_table; spinlock_t hash_lock; char *name; void (*cache_put)(struct kref *); int (*cache_upcall)(struct cache_detail *, struct cache_head *); void (*cache_request)(struct cache_detail *cd, struct cache_head *ch, char **bpp, int *blen); int (*cache_parse)(struct cache_detail *, char *buf, int len); int (*cache_show)(struct seq_file *m, struct cache_detail *cd, struct cache_head *h); void (*warn_no_listener)(struct cache_detail *cd, int has_died); struct cache_head * (*alloc)(void); void (*flush)(void); int (*match)(struct cache_head *orig, struct cache_head *new); void (*init)(struct cache_head *orig, struct cache_head *new); void (*update)(struct cache_head *orig, struct cache_head *new); /* fields below this comment are for internal use * and should not be touched by cache owners */ time64_t flush_time; /* flush all cache items with * last_refresh at or earlier * than this. last_refresh * is never set at or earlier * than this. */ struct list_head others; time64_t nextcheck; int entries; /* fields for communication over channel */ struct list_head queue; atomic_t writers; /* how many time is /channel open */ time64_t last_close; /* if no writers, when did last close */ time64_t last_warn; /* when we last warned about no writers */ union { struct proc_dir_entry *procfs; struct dentry *pipefs; }; struct net *net; }; /* this must be embedded in any request structure that * identifies an object that will want a callback on * a cache fill */ struct cache_req { struct cache_deferred_req *(*defer)(struct cache_req *req); int thread_wait; /* How long (jiffies) we can block the * current thread to wait for updates. */ }; /* this must be embedded in a deferred_request that is being * delayed awaiting cache-fill */ struct cache_deferred_req { struct hlist_node hash; /* on hash chain */ struct list_head recent; /* on fifo */ struct cache_head *item; /* cache item we wait on */ void *owner; /* we might need to discard all defered requests * owned by someone */ void (*revisit)(struct cache_deferred_req *req, int too_many); }; /* * timestamps kept in the cache are expressed in seconds * since boot. This is the best for measuring differences in * real time. * This reimplemnts ktime_get_boottime_seconds() in a slightly * faster but less accurate way. When we end up converting * back to wallclock (CLOCK_REALTIME), that error often * cancels out during the reverse operation. */ static inline time64_t seconds_since_boot(void) { struct timespec64 boot; getboottime64(&boot); return ktime_get_real_seconds() - boot.tv_sec; } static inline time64_t convert_to_wallclock(time64_t sinceboot) { struct timespec64 boot; getboottime64(&boot); return boot.tv_sec + sinceboot; } extern const struct file_operations cache_file_operations_pipefs; extern const struct file_operations content_file_operations_pipefs; extern const struct file_operations cache_flush_operations_pipefs; extern struct cache_head * sunrpc_cache_lookup_rcu(struct cache_detail *detail, struct cache_head *key, int hash); extern struct cache_head * sunrpc_cache_update(struct cache_detail *detail, struct cache_head *new, struct cache_head *old, int hash); extern int sunrpc_cache_pipe_upcall(struct cache_detail *detail, struct cache_head *h); extern int sunrpc_cache_pipe_upcall_timeout(struct cache_detail *detail, struct cache_head *h); extern void cache_clean_deferred(void *owner); static inline struct cache_head *cache_get(struct cache_head *h) { kref_get(&h->ref); return h; } static inline struct cache_head *cache_get_rcu(struct cache_head *h) { if (kref_get_unless_zero(&h->ref)) return h; return NULL; } static inline void cache_put(struct cache_head *h, struct cache_detail *cd) { if (kref_read(&h->ref) <= 2 && h->expiry_time < cd->nextcheck) cd->nextcheck = h->expiry_time; kref_put(&h->ref, cd->cache_put); } static inline bool cache_is_expired(struct cache_detail *detail, struct cache_head *h) { if (h->expiry_time < seconds_since_boot()) return true; if (!test_bit(CACHE_VALID, &h->flags)) return false; return detail->flush_time >= h->last_refresh; } extern int cache_check(struct cache_detail *detail, struct cache_head *h, struct cache_req *rqstp); extern void cache_flush(void); extern void cache_purge(struct cache_detail *detail); #define NEVER (0x7FFFFFFF) extern void __init cache_initialize(void); extern int cache_register_net(struct cache_detail *cd, struct net *net); extern void cache_unregister_net(struct cache_detail *cd, struct net *net); extern struct cache_detail *cache_create_net(const struct cache_detail *tmpl, struct net *net); extern void cache_destroy_net(struct cache_detail *cd, struct net *net); extern void sunrpc_init_cache_detail(struct cache_detail *cd); extern void sunrpc_destroy_cache_detail(struct cache_detail *cd); extern int sunrpc_cache_register_pipefs(struct dentry *parent, const char *, umode_t, struct cache_detail *); extern void sunrpc_cache_unregister_pipefs(struct cache_detail *); extern void sunrpc_cache_unhash(struct cache_detail *, struct cache_head *); /* Must store cache_detail in seq_file->private if using next three functions */ extern void *cache_seq_start_rcu(struct seq_file *file, loff_t *pos); extern void *cache_seq_next_rcu(struct seq_file *file, void *p, loff_t *pos); extern void cache_seq_stop_rcu(struct seq_file *file, void *p); extern void qword_add(char **bpp, int *lp, char *str); extern void qword_addhex(char **bpp, int *lp, char *buf, int blen); extern int qword_get(char **bpp, char *dest, int bufsize); static inline int get_int(char **bpp, int *anint) { char buf[50]; char *ep; int rv; int len = qword_get(bpp, buf, sizeof(buf)); if (len < 0) return -EINVAL; if (len == 0) return -ENOENT; rv = simple_strtol(buf, &ep, 0); if (*ep) return -EINVAL; *anint = rv; return 0; } static inline int get_uint(char **bpp, unsigned int *anint) { char buf[50]; int len = qword_get(bpp, buf, sizeof(buf)); if (len < 0) return -EINVAL; if (len == 0) return -ENOENT; if (kstrtouint(buf, 0, anint)) return -EINVAL; return 0; } static inline int get_time(char **bpp, time64_t *time) { char buf[50]; long long ll; int len = qword_get(bpp, buf, sizeof(buf)); if (len < 0) return -EINVAL; if (len == 0) return -ENOENT; if (kstrtoll(buf, 0, &ll)) return -EINVAL; *time = ll; return 0; } static inline time64_t get_expiry(char **bpp) { time64_t rv; struct timespec64 boot; if (get_time(bpp, &rv)) return 0; if (rv < 0) return 0; getboottime64(&boot); return rv - boot.tv_sec; } #endif /* _LINUX_SUNRPC_CACHE_H_ */ PK ! ��K@� � sunrpc/gss_api.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/gss_api.h * * Somewhat simplified version of the gss api. * * Dug Song <dugsong@monkey.org> * Andy Adamson <andros@umich.edu> * Bruce Fields <bfields@umich.edu> * Copyright (c) 2000 The Regents of the University of Michigan */ #ifndef _LINUX_SUNRPC_GSS_API_H #define _LINUX_SUNRPC_GSS_API_H #include <linux/sunrpc/xdr.h> #include <linux/sunrpc/msg_prot.h> #include <linux/uio.h> /* The mechanism-independent gss-api context: */ struct gss_ctx { struct gss_api_mech *mech_type; void *internal_ctx_id; unsigned int slack, align; }; #define GSS_C_NO_BUFFER ((struct xdr_netobj) 0) #define GSS_C_NO_CONTEXT ((struct gss_ctx *) 0) #define GSS_C_QOP_DEFAULT (0) /*XXX arbitrary length - is this set somewhere? */ #define GSS_OID_MAX_LEN 32 struct rpcsec_gss_oid { unsigned int len; u8 data[GSS_OID_MAX_LEN]; }; /* From RFC 3530 */ struct rpcsec_gss_info { struct rpcsec_gss_oid oid; u32 qop; u32 service; }; /* gss-api prototypes; note that these are somewhat simplified versions of * the prototypes specified in RFC 2744. */ int gss_import_sec_context( const void* input_token, size_t bufsize, struct gss_api_mech *mech, struct gss_ctx **ctx_id, time64_t *endtime, gfp_t gfp_mask); u32 gss_get_mic( struct gss_ctx *ctx_id, struct xdr_buf *message, struct xdr_netobj *mic_token); u32 gss_verify_mic( struct gss_ctx *ctx_id, struct xdr_buf *message, struct xdr_netobj *mic_token); u32 gss_wrap( struct gss_ctx *ctx_id, int offset, struct xdr_buf *outbuf, struct page **inpages); u32 gss_unwrap( struct gss_ctx *ctx_id, int offset, int len, struct xdr_buf *inbuf); u32 gss_delete_sec_context( struct gss_ctx **ctx_id); rpc_authflavor_t gss_svc_to_pseudoflavor(struct gss_api_mech *, u32 qop, u32 service); u32 gss_pseudoflavor_to_service(struct gss_api_mech *, u32 pseudoflavor); bool gss_pseudoflavor_to_datatouch(struct gss_api_mech *, u32 pseudoflavor); char *gss_service_to_auth_domain_name(struct gss_api_mech *, u32 service); struct pf_desc { u32 pseudoflavor; u32 qop; u32 service; char *name; char *auth_domain_name; struct auth_domain *domain; bool datatouch; }; /* Different mechanisms (e.g., krb5 or spkm3) may implement gss-api, and * mechanisms may be dynamically registered or unregistered by modules. */ /* Each mechanism is described by the following struct: */ struct gss_api_mech { struct list_head gm_list; struct module *gm_owner; struct rpcsec_gss_oid gm_oid; char *gm_name; const struct gss_api_ops *gm_ops; /* pseudoflavors supported by this mechanism: */ int gm_pf_num; struct pf_desc * gm_pfs; /* Should the following be a callback operation instead? */ const char *gm_upcall_enctypes; }; /* and must provide the following operations: */ struct gss_api_ops { int (*gss_import_sec_context)( const void *input_token, size_t bufsize, struct gss_ctx *ctx_id, time64_t *endtime, gfp_t gfp_mask); u32 (*gss_get_mic)( struct gss_ctx *ctx_id, struct xdr_buf *message, struct xdr_netobj *mic_token); u32 (*gss_verify_mic)( struct gss_ctx *ctx_id, struct xdr_buf *message, struct xdr_netobj *mic_token); u32 (*gss_wrap)( struct gss_ctx *ctx_id, int offset, struct xdr_buf *outbuf, struct page **inpages); u32 (*gss_unwrap)( struct gss_ctx *ctx_id, int offset, int len, struct xdr_buf *buf); void (*gss_delete_sec_context)( void *internal_ctx_id); }; int gss_mech_register(struct gss_api_mech *); void gss_mech_unregister(struct gss_api_mech *); /* returns a mechanism descriptor given an OID, and increments the mechanism's * reference count. */ struct gss_api_mech * gss_mech_get_by_OID(struct rpcsec_gss_oid *); /* Given a GSS security tuple, look up a pseudoflavor */ rpc_authflavor_t gss_mech_info2flavor(struct rpcsec_gss_info *); /* Given a pseudoflavor, look up a GSS security tuple */ int gss_mech_flavor2info(rpc_authflavor_t, struct rpcsec_gss_info *); /* Returns a reference to a mechanism, given a name like "krb5" etc. */ struct gss_api_mech *gss_mech_get_by_name(const char *); /* Similar, but get by pseudoflavor. */ struct gss_api_mech *gss_mech_get_by_pseudoflavor(u32); struct gss_api_mech * gss_mech_get(struct gss_api_mech *); /* For every successful gss_mech_get or gss_mech_get_by_* call there must be a * corresponding call to gss_mech_put. */ void gss_mech_put(struct gss_api_mech *); #endif /* _LINUX_SUNRPC_GSS_API_H */ PK ! 9�"�� � sunrpc/addr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/addr.h * * Various routines for copying and comparing sockaddrs and for * converting them to and from presentation format. */ #ifndef _LINUX_SUNRPC_ADDR_H #define _LINUX_SUNRPC_ADDR_H #include <linux/socket.h> #include <linux/in.h> #include <linux/in6.h> #include <net/ipv6.h> size_t rpc_ntop(const struct sockaddr *, char *, const size_t); size_t rpc_pton(struct net *, const char *, const size_t, struct sockaddr *, const size_t); char * rpc_sockaddr2uaddr(const struct sockaddr *, gfp_t); size_t rpc_uaddr2sockaddr(struct net *, const char *, const size_t, struct sockaddr *, const size_t); static inline unsigned short rpc_get_port(const struct sockaddr *sap) { switch (sap->sa_family) { case AF_INET: return ntohs(((struct sockaddr_in *)sap)->sin_port); case AF_INET6: return ntohs(((struct sockaddr_in6 *)sap)->sin6_port); } return 0; } static inline void rpc_set_port(struct sockaddr *sap, const unsigned short port) { switch (sap->sa_family) { case AF_INET: ((struct sockaddr_in *)sap)->sin_port = htons(port); break; case AF_INET6: ((struct sockaddr_in6 *)sap)->sin6_port = htons(port); break; } } #define IPV6_SCOPE_DELIMITER '%' #define IPV6_SCOPE_ID_LEN sizeof("%nnnnnnnnnn") static inline bool rpc_cmp_addr4(const struct sockaddr *sap1, const struct sockaddr *sap2) { const struct sockaddr_in *sin1 = (const struct sockaddr_in *)sap1; const struct sockaddr_in *sin2 = (const struct sockaddr_in *)sap2; return sin1->sin_addr.s_addr == sin2->sin_addr.s_addr; } static inline bool __rpc_copy_addr4(struct sockaddr *dst, const struct sockaddr *src) { const struct sockaddr_in *ssin = (struct sockaddr_in *) src; struct sockaddr_in *dsin = (struct sockaddr_in *) dst; dsin->sin_family = ssin->sin_family; dsin->sin_addr.s_addr = ssin->sin_addr.s_addr; return true; } #if IS_ENABLED(CONFIG_IPV6) static inline bool rpc_cmp_addr6(const struct sockaddr *sap1, const struct sockaddr *sap2) { const struct sockaddr_in6 *sin1 = (const struct sockaddr_in6 *)sap1; const struct sockaddr_in6 *sin2 = (const struct sockaddr_in6 *)sap2; if (!ipv6_addr_equal(&sin1->sin6_addr, &sin2->sin6_addr)) return false; else if (ipv6_addr_type(&sin1->sin6_addr) & IPV6_ADDR_LINKLOCAL) return sin1->sin6_scope_id == sin2->sin6_scope_id; return true; } static inline bool __rpc_copy_addr6(struct sockaddr *dst, const struct sockaddr *src) { const struct sockaddr_in6 *ssin6 = (const struct sockaddr_in6 *) src; struct sockaddr_in6 *dsin6 = (struct sockaddr_in6 *) dst; dsin6->sin6_family = ssin6->sin6_family; dsin6->sin6_addr = ssin6->sin6_addr; dsin6->sin6_scope_id = ssin6->sin6_scope_id; return true; } #else /* !(IS_ENABLED(CONFIG_IPV6) */ static inline bool rpc_cmp_addr6(const struct sockaddr *sap1, const struct sockaddr *sap2) { return false; } static inline bool __rpc_copy_addr6(struct sockaddr *dst, const struct sockaddr *src) { return false; } #endif /* !(IS_ENABLED(CONFIG_IPV6) */ /** * rpc_cmp_addr - compare the address portion of two sockaddrs. * @sap1: first sockaddr * @sap2: second sockaddr * * Just compares the family and address portion. Ignores port, but * compares the scope if it's a link-local address. * * Returns true if the addrs are equal, false if they aren't. */ static inline bool rpc_cmp_addr(const struct sockaddr *sap1, const struct sockaddr *sap2) { if (sap1->sa_family == sap2->sa_family) { switch (sap1->sa_family) { case AF_INET: return rpc_cmp_addr4(sap1, sap2); case AF_INET6: return rpc_cmp_addr6(sap1, sap2); } } return false; } /** * rpc_cmp_addr_port - compare the address and port number of two sockaddrs. * @sap1: first sockaddr * @sap2: second sockaddr */ static inline bool rpc_cmp_addr_port(const struct sockaddr *sap1, const struct sockaddr *sap2) { if (!rpc_cmp_addr(sap1, sap2)) return false; return rpc_get_port(sap1) == rpc_get_port(sap2); } /** * rpc_copy_addr - copy the address portion of one sockaddr to another * @dst: destination sockaddr * @src: source sockaddr * * Just copies the address portion and family. Ignores port, scope, etc. * Caller is responsible for making certain that dst is large enough to hold * the address in src. Returns true if address family is supported. Returns * false otherwise. */ static inline bool rpc_copy_addr(struct sockaddr *dst, const struct sockaddr *src) { switch (src->sa_family) { case AF_INET: return __rpc_copy_addr4(dst, src); case AF_INET6: return __rpc_copy_addr6(dst, src); } return false; } /** * rpc_get_scope_id - return scopeid for a given sockaddr * @sa: sockaddr to get scopeid from * * Returns the value of the sin6_scope_id for AF_INET6 addrs, or 0 if * not an AF_INET6 address. */ static inline u32 rpc_get_scope_id(const struct sockaddr *sa) { if (sa->sa_family != AF_INET6) return 0; return ((struct sockaddr_in6 *) sa)->sin6_scope_id; } #endif /* _LINUX_SUNRPC_ADDR_H */ PK ! ��K K sunrpc/rpc_rdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* * Copyright (c) 2015-2017 Oracle. All rights reserved. * Copyright (c) 2003-2007 Network Appliance, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the BSD-type * license below: * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Network Appliance, Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _LINUX_SUNRPC_RPC_RDMA_H #define _LINUX_SUNRPC_RPC_RDMA_H #include <linux/types.h> #include <linux/bitops.h> #define RPCRDMA_VERSION 1 #define rpcrdma_version cpu_to_be32(RPCRDMA_VERSION) enum { RPCRDMA_V1_DEF_INLINE_SIZE = 1024, }; /* * XDR sizes, in quads */ enum { rpcrdma_fixed_maxsz = 4, rpcrdma_segment_maxsz = 4, rpcrdma_readseg_maxsz = 1 + rpcrdma_segment_maxsz, rpcrdma_readchunk_maxsz = 1 + rpcrdma_readseg_maxsz, }; /* * Smallest RPC/RDMA header: rm_xid through rm_type, then rm_nochunks */ #define RPCRDMA_HDRLEN_MIN (sizeof(__be32) * 7) #define RPCRDMA_HDRLEN_ERR (sizeof(__be32) * 5) enum rpcrdma_errcode { ERR_VERS = 1, ERR_CHUNK = 2 }; enum rpcrdma_proc { RDMA_MSG = 0, /* An RPC call or reply msg */ RDMA_NOMSG = 1, /* An RPC call or reply msg - separate body */ RDMA_MSGP = 2, /* An RPC call or reply msg with padding */ RDMA_DONE = 3, /* Client signals reply completion */ RDMA_ERROR = 4 /* An RPC RDMA encoding error */ }; #define rdma_msg cpu_to_be32(RDMA_MSG) #define rdma_nomsg cpu_to_be32(RDMA_NOMSG) #define rdma_msgp cpu_to_be32(RDMA_MSGP) #define rdma_done cpu_to_be32(RDMA_DONE) #define rdma_error cpu_to_be32(RDMA_ERROR) #define err_vers cpu_to_be32(ERR_VERS) #define err_chunk cpu_to_be32(ERR_CHUNK) /* * Private extension to RPC-over-RDMA Version One. * Message passed during RDMA-CM connection set-up. * * Add new fields at the end, and don't permute existing * fields. */ struct rpcrdma_connect_private { __be32 cp_magic; u8 cp_version; u8 cp_flags; u8 cp_send_size; u8 cp_recv_size; } __packed; #define rpcrdma_cmp_magic __cpu_to_be32(0xf6ab0e18) enum { RPCRDMA_CMP_VERSION = 1, RPCRDMA_CMP_F_SND_W_INV_OK = BIT(0), }; static inline u8 rpcrdma_encode_buffer_size(unsigned int size) { return (size >> 10) - 1; } static inline unsigned int rpcrdma_decode_buffer_size(u8 val) { return ((unsigned int)val + 1) << 10; } /** * xdr_encode_rdma_segment - Encode contents of an RDMA segment * @p: Pointer into a send buffer * @handle: The RDMA handle to encode * @length: The RDMA length to encode * @offset: The RDMA offset to encode * * Return value: * Pointer to the XDR position that follows the encoded RDMA segment */ static inline __be32 *xdr_encode_rdma_segment(__be32 *p, u32 handle, u32 length, u64 offset) { *p++ = cpu_to_be32(handle); *p++ = cpu_to_be32(length); return xdr_encode_hyper(p, offset); } /** * xdr_encode_read_segment - Encode contents of a Read segment * @p: Pointer into a send buffer * @position: The position to encode * @handle: The RDMA handle to encode * @length: The RDMA length to encode * @offset: The RDMA offset to encode * * Return value: * Pointer to the XDR position that follows the encoded Read segment */ static inline __be32 *xdr_encode_read_segment(__be32 *p, u32 position, u32 handle, u32 length, u64 offset) { *p++ = cpu_to_be32(position); return xdr_encode_rdma_segment(p, handle, length, offset); } /** * xdr_decode_rdma_segment - Decode contents of an RDMA segment * @p: Pointer to the undecoded RDMA segment * @handle: Upon return, the RDMA handle * @length: Upon return, the RDMA length * @offset: Upon return, the RDMA offset * * Return value: * Pointer to the XDR item that follows the RDMA segment */ static inline __be32 *xdr_decode_rdma_segment(__be32 *p, u32 *handle, u32 *length, u64 *offset) { *handle = be32_to_cpup(p++); *length = be32_to_cpup(p++); return xdr_decode_hyper(p, offset); } /** * xdr_decode_read_segment - Decode contents of a Read segment * @p: Pointer to the undecoded Read segment * @position: Upon return, the segment's position * @handle: Upon return, the RDMA handle * @length: Upon return, the RDMA length * @offset: Upon return, the RDMA offset * * Return value: * Pointer to the XDR item that follows the Read segment */ static inline __be32 *xdr_decode_read_segment(__be32 *p, u32 *position, u32 *handle, u32 *length, u64 *offset) { *position = be32_to_cpup(p++); return xdr_decode_rdma_segment(p, handle, length, offset); } #endif /* _LINUX_SUNRPC_RPC_RDMA_H */ PK ! ��@w w sunrpc/svc_rdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* * Copyright (c) 2005-2006 Network Appliance, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the BSD-type * license below: * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Network Appliance, Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Tom Tucker <tom@opengridcomputing.com> */ #ifndef SVC_RDMA_H #define SVC_RDMA_H #include <linux/llist.h> #include <linux/sunrpc/xdr.h> #include <linux/sunrpc/svcsock.h> #include <linux/sunrpc/rpc_rdma.h> #include <linux/sunrpc/rpc_rdma_cid.h> #include <linux/sunrpc/svc_rdma_pcl.h> #include <linux/percpu_counter.h> #include <rdma/ib_verbs.h> #include <rdma/rdma_cm.h> /* Default and maximum inline threshold sizes */ enum { RPCRDMA_PULLUP_THRESH = RPCRDMA_V1_DEF_INLINE_SIZE >> 1, RPCRDMA_DEF_INLINE_THRESH = 4096, RPCRDMA_MAX_INLINE_THRESH = 65536 }; /* RPC/RDMA parameters and stats */ extern unsigned int svcrdma_ord; extern unsigned int svcrdma_max_requests; extern unsigned int svcrdma_max_bc_requests; extern unsigned int svcrdma_max_req_size; extern struct percpu_counter svcrdma_stat_read; extern struct percpu_counter svcrdma_stat_recv; extern struct percpu_counter svcrdma_stat_sq_starve; extern struct percpu_counter svcrdma_stat_write; struct svcxprt_rdma { struct svc_xprt sc_xprt; /* SVC transport structure */ struct rdma_cm_id *sc_cm_id; /* RDMA connection id */ struct list_head sc_accept_q; /* Conn. waiting accept */ int sc_ord; /* RDMA read limit */ int sc_max_send_sges; bool sc_snd_w_inv; /* OK to use Send With Invalidate */ atomic_t sc_sq_avail; /* SQEs ready to be consumed */ unsigned int sc_sq_depth; /* Depth of SQ */ __be32 sc_fc_credits; /* Forward credits */ u32 sc_max_requests; /* Max requests */ u32 sc_max_bc_requests;/* Backward credits */ int sc_max_req_size; /* Size of each RQ WR buf */ u8 sc_port_num; struct ib_pd *sc_pd; spinlock_t sc_send_lock; struct llist_head sc_send_ctxts; spinlock_t sc_rw_ctxt_lock; struct llist_head sc_rw_ctxts; u32 sc_pending_recvs; u32 sc_recv_batch; struct list_head sc_rq_dto_q; spinlock_t sc_rq_dto_lock; struct ib_qp *sc_qp; struct ib_cq *sc_rq_cq; struct ib_cq *sc_sq_cq; spinlock_t sc_lock; /* transport lock */ wait_queue_head_t sc_send_wait; /* SQ exhaustion waitlist */ unsigned long sc_flags; struct work_struct sc_work; struct llist_head sc_recv_ctxts; atomic_t sc_completion_ids; }; /* sc_flags */ #define RDMAXPRT_CONN_PENDING 3 /* * Default connection parameters */ enum { RPCRDMA_LISTEN_BACKLOG = 10, RPCRDMA_MAX_REQUESTS = 64, RPCRDMA_MAX_BC_REQUESTS = 2, }; #define RPCSVC_MAXPAYLOAD_RDMA RPCSVC_MAXPAYLOAD struct svc_rdma_recv_ctxt { struct llist_node rc_node; struct list_head rc_list; struct ib_recv_wr rc_recv_wr; struct ib_cqe rc_cqe; struct rpc_rdma_cid rc_cid; struct ib_sge rc_recv_sge; void *rc_recv_buf; struct xdr_stream rc_stream; bool rc_temp; u32 rc_byte_len; unsigned int rc_page_count; u32 rc_inv_rkey; __be32 rc_msgtype; struct svc_rdma_pcl rc_call_pcl; struct svc_rdma_pcl rc_read_pcl; struct svc_rdma_chunk *rc_cur_result_payload; struct svc_rdma_pcl rc_write_pcl; struct svc_rdma_pcl rc_reply_pcl; }; struct svc_rdma_send_ctxt { struct llist_node sc_node; struct rpc_rdma_cid sc_cid; struct ib_send_wr sc_send_wr; struct ib_cqe sc_cqe; struct completion sc_done; struct xdr_buf sc_hdrbuf; struct xdr_stream sc_stream; void *sc_xprt_buf; int sc_cur_sge_no; struct ib_sge sc_sges[]; }; /* svc_rdma_backchannel.c */ extern void svc_rdma_handle_bc_reply(struct svc_rqst *rqstp, struct svc_rdma_recv_ctxt *rctxt); /* svc_rdma_recvfrom.c */ extern void svc_rdma_recv_ctxts_destroy(struct svcxprt_rdma *rdma); extern bool svc_rdma_post_recvs(struct svcxprt_rdma *rdma); extern struct svc_rdma_recv_ctxt * svc_rdma_recv_ctxt_get(struct svcxprt_rdma *rdma); extern void svc_rdma_recv_ctxt_put(struct svcxprt_rdma *rdma, struct svc_rdma_recv_ctxt *ctxt); extern void svc_rdma_flush_recv_queues(struct svcxprt_rdma *rdma); extern void svc_rdma_release_ctxt(struct svc_xprt *xprt, void *ctxt); extern int svc_rdma_recvfrom(struct svc_rqst *); /* svc_rdma_rw.c */ extern void svc_rdma_destroy_rw_ctxts(struct svcxprt_rdma *rdma); extern int svc_rdma_send_write_chunk(struct svcxprt_rdma *rdma, const struct svc_rdma_chunk *chunk, const struct xdr_buf *xdr); extern int svc_rdma_send_reply_chunk(struct svcxprt_rdma *rdma, const struct svc_rdma_recv_ctxt *rctxt, const struct xdr_buf *xdr); extern int svc_rdma_process_read_list(struct svcxprt_rdma *rdma, struct svc_rqst *rqstp, struct svc_rdma_recv_ctxt *head); /* svc_rdma_sendto.c */ extern void svc_rdma_send_ctxts_destroy(struct svcxprt_rdma *rdma); extern struct svc_rdma_send_ctxt * svc_rdma_send_ctxt_get(struct svcxprt_rdma *rdma); extern void svc_rdma_send_ctxt_put(struct svcxprt_rdma *rdma, struct svc_rdma_send_ctxt *ctxt); extern int svc_rdma_send(struct svcxprt_rdma *rdma, struct svc_rdma_send_ctxt *ctxt); extern int svc_rdma_map_reply_msg(struct svcxprt_rdma *rdma, struct svc_rdma_send_ctxt *sctxt, const struct svc_rdma_recv_ctxt *rctxt, const struct xdr_buf *xdr); extern void svc_rdma_send_error_msg(struct svcxprt_rdma *rdma, struct svc_rdma_send_ctxt *sctxt, struct svc_rdma_recv_ctxt *rctxt, int status); extern void svc_rdma_wake_send_waiters(struct svcxprt_rdma *rdma, int avail); extern int svc_rdma_sendto(struct svc_rqst *); extern int svc_rdma_result_payload(struct svc_rqst *rqstp, unsigned int offset, unsigned int length); /* svc_rdma_transport.c */ extern struct svc_xprt_class svc_rdma_class; #ifdef CONFIG_SUNRPC_BACKCHANNEL extern struct svc_xprt_class svc_rdma_bc_class; #endif /* svc_rdma.c */ extern int svc_rdma_init(void); extern void svc_rdma_cleanup(void); #endif PK ! zh|! �! sunrpc/clnt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/clnt.h * * Declarations for the high-level RPC client interface * * Copyright (C) 1995, 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_CLNT_H #define _LINUX_SUNRPC_CLNT_H #include <linux/types.h> #include <linux/socket.h> #include <linux/in.h> #include <linux/in6.h> #include <linux/refcount.h> #include <linux/sunrpc/msg_prot.h> #include <linux/sunrpc/sched.h> #include <linux/sunrpc/xprt.h> #include <linux/sunrpc/auth.h> #include <linux/sunrpc/stats.h> #include <linux/sunrpc/xdr.h> #include <linux/sunrpc/timer.h> #include <linux/sunrpc/rpc_pipe_fs.h> #include <asm/signal.h> #include <linux/path.h> #include <net/ipv6.h> #include <linux/sunrpc/xprtmultipath.h> struct rpc_inode; struct rpc_sysfs_client; /* * The high-level client handle */ struct rpc_clnt { refcount_t cl_count; /* Number of references */ unsigned int cl_clid; /* client id */ struct list_head cl_clients; /* Global list of clients */ struct list_head cl_tasks; /* List of tasks */ spinlock_t cl_lock; /* spinlock */ struct rpc_xprt __rcu * cl_xprt; /* transport */ const struct rpc_procinfo *cl_procinfo; /* procedure info */ u32 cl_prog, /* RPC program number */ cl_vers, /* RPC version number */ cl_maxproc; /* max procedure number */ struct rpc_auth * cl_auth; /* authenticator */ struct rpc_stat * cl_stats; /* per-program statistics */ struct rpc_iostats * cl_metrics; /* per-client statistics */ unsigned int cl_softrtry : 1,/* soft timeouts */ cl_softerr : 1,/* Timeouts return errors */ cl_discrtry : 1,/* disconnect before retry */ cl_noretranstimeo: 1,/* No retransmit timeouts */ cl_autobind : 1,/* use getport() */ cl_chatty : 1;/* be verbose */ struct rpc_rtt * cl_rtt; /* RTO estimator data */ const struct rpc_timeout *cl_timeout; /* Timeout strategy */ atomic_t cl_swapper; /* swapfile count */ int cl_nodelen; /* nodename length */ char cl_nodename[UNX_MAXNODENAME+1]; struct rpc_pipe_dir_head cl_pipedir_objects; struct rpc_clnt * cl_parent; /* Points to parent of clones */ struct rpc_rtt cl_rtt_default; struct rpc_timeout cl_timeout_default; const struct rpc_program *cl_program; const char * cl_principal; /* use for machine cred */ #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) struct dentry *cl_debugfs; /* debugfs directory */ #endif struct rpc_sysfs_client *cl_sysfs; /* sysfs directory */ /* cl_work is only needed after cl_xpi is no longer used, * and that are of similar size */ union { struct rpc_xprt_iter cl_xpi; struct work_struct cl_work; }; const struct cred *cl_cred; unsigned int cl_max_connect; /* max number of transports not to the same IP */ struct super_block *pipefs_sb; }; /* * General RPC program info */ #define RPC_MAXVERSION 4 struct rpc_program { const char * name; /* protocol name */ u32 number; /* program number */ unsigned int nrvers; /* number of versions */ const struct rpc_version ** version; /* version array */ struct rpc_stat * stats; /* statistics */ const char * pipe_dir_name; /* path to rpc_pipefs dir */ }; struct rpc_version { u32 number; /* version number */ unsigned int nrprocs; /* number of procs */ const struct rpc_procinfo *procs; /* procedure array */ unsigned int *counts; /* call counts */ }; /* * Procedure information */ struct rpc_procinfo { u32 p_proc; /* RPC procedure number */ kxdreproc_t p_encode; /* XDR encode function */ kxdrdproc_t p_decode; /* XDR decode function */ unsigned int p_arglen; /* argument hdr length (u32) */ unsigned int p_replen; /* reply hdr length (u32) */ unsigned int p_timer; /* Which RTT timer to use */ u32 p_statidx; /* Which procedure to account */ const char * p_name; /* name of procedure */ }; struct rpc_create_args { struct net *net; int protocol; struct sockaddr *address; size_t addrsize; struct sockaddr *saddress; const struct rpc_timeout *timeout; const char *servername; const char *nodename; const struct rpc_program *program; struct rpc_stat *stats; u32 prognumber; /* overrides program->number */ u32 version; rpc_authflavor_t authflavor; u32 nconnect; unsigned long flags; char *client_name; struct svc_xprt *bc_xprt; /* NFSv4.1 backchannel */ const struct cred *cred; unsigned int max_connect; }; struct rpc_add_xprt_test { void (*add_xprt_test)(struct rpc_clnt *clnt, struct rpc_xprt *xprt, void *calldata); void *data; }; /* Values for "flags" field */ #define RPC_CLNT_CREATE_HARDRTRY (1UL << 0) #define RPC_CLNT_CREATE_AUTOBIND (1UL << 2) #define RPC_CLNT_CREATE_NONPRIVPORT (1UL << 3) #define RPC_CLNT_CREATE_NOPING (1UL << 4) #define RPC_CLNT_CREATE_DISCRTRY (1UL << 5) #define RPC_CLNT_CREATE_QUIET (1UL << 6) #define RPC_CLNT_CREATE_INFINITE_SLOTS (1UL << 7) #define RPC_CLNT_CREATE_NO_IDLE_TIMEOUT (1UL << 8) #define RPC_CLNT_CREATE_NO_RETRANS_TIMEOUT (1UL << 9) #define RPC_CLNT_CREATE_SOFTERR (1UL << 10) #define RPC_CLNT_CREATE_REUSEPORT (1UL << 11) #define RPC_CLNT_CREATE_CONNECTED (1UL << 12) struct rpc_clnt *rpc_create(struct rpc_create_args *args); struct rpc_clnt *rpc_bind_new_program(struct rpc_clnt *, const struct rpc_program *, u32); struct rpc_clnt *rpc_clone_client(struct rpc_clnt *); struct rpc_clnt *rpc_clone_client_set_auth(struct rpc_clnt *, rpc_authflavor_t); int rpc_switch_client_transport(struct rpc_clnt *, struct xprt_create *, const struct rpc_timeout *); void rpc_shutdown_client(struct rpc_clnt *); void rpc_release_client(struct rpc_clnt *); void rpc_task_release_transport(struct rpc_task *); void rpc_task_release_client(struct rpc_task *); struct rpc_xprt *rpc_task_get_xprt(struct rpc_clnt *clnt, struct rpc_xprt *xprt); int rpcb_create_local(struct net *); void rpcb_put_local(struct net *); int rpcb_register(struct net *, u32, u32, int, unsigned short); int rpcb_v4_register(struct net *net, const u32 program, const u32 version, const struct sockaddr *address, const char *netid); void rpcb_getport_async(struct rpc_task *); void rpc_prepare_reply_pages(struct rpc_rqst *req, struct page **pages, unsigned int base, unsigned int len, unsigned int hdrsize); void rpc_call_start(struct rpc_task *); int rpc_call_async(struct rpc_clnt *clnt, const struct rpc_message *msg, int flags, const struct rpc_call_ops *tk_ops, void *calldata); int rpc_call_sync(struct rpc_clnt *clnt, const struct rpc_message *msg, int flags); struct rpc_task *rpc_call_null(struct rpc_clnt *clnt, struct rpc_cred *cred, int flags); int rpc_restart_call_prepare(struct rpc_task *); int rpc_restart_call(struct rpc_task *); void rpc_setbufsize(struct rpc_clnt *, unsigned int, unsigned int); struct net * rpc_net_ns(struct rpc_clnt *); size_t rpc_max_payload(struct rpc_clnt *); size_t rpc_max_bc_payload(struct rpc_clnt *); unsigned int rpc_num_bc_slots(struct rpc_clnt *); void rpc_force_rebind(struct rpc_clnt *); size_t rpc_peeraddr(struct rpc_clnt *, struct sockaddr *, size_t); const char *rpc_peeraddr2str(struct rpc_clnt *, enum rpc_display_format_t); int rpc_localaddr(struct rpc_clnt *, struct sockaddr *, size_t); int rpc_clnt_iterate_for_each_xprt(struct rpc_clnt *clnt, int (*fn)(struct rpc_clnt *, struct rpc_xprt *, void *), void *data); int rpc_clnt_test_and_add_xprt(struct rpc_clnt *clnt, struct rpc_xprt_switch *xps, struct rpc_xprt *xprt, void *dummy); int rpc_clnt_add_xprt(struct rpc_clnt *, struct xprt_create *, int (*setup)(struct rpc_clnt *, struct rpc_xprt_switch *, struct rpc_xprt *, void *), void *data); void rpc_set_connect_timeout(struct rpc_clnt *clnt, unsigned long connect_timeout, unsigned long reconnect_timeout); int rpc_clnt_setup_test_and_add_xprt(struct rpc_clnt *, struct rpc_xprt_switch *, struct rpc_xprt *, void *); const char *rpc_proc_name(const struct rpc_task *task); void rpc_clnt_xprt_switch_put(struct rpc_clnt *); void rpc_clnt_xprt_switch_add_xprt(struct rpc_clnt *, struct rpc_xprt *); bool rpc_clnt_xprt_switch_has_addr(struct rpc_clnt *clnt, const struct sockaddr *sap); void rpc_cleanup_clids(void); static inline int rpc_reply_expected(struct rpc_task *task) { return (task->tk_msg.rpc_proc != NULL) && (task->tk_msg.rpc_proc->p_decode != NULL); } static inline void rpc_task_close_connection(struct rpc_task *task) { if (task->tk_xprt) xprt_force_disconnect(task->tk_xprt); } #endif /* _LINUX_SUNRPC_CLNT_H */ PK ! p ��A A sunrpc/auth_gss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/auth_gss.h * * Declarations for RPCSEC_GSS * * Dug Song <dugsong@monkey.org> * Andy Adamson <andros@umich.edu> * Bruce Fields <bfields@umich.edu> * Copyright (c) 2000 The Regents of the University of Michigan */ #ifndef _LINUX_SUNRPC_AUTH_GSS_H #define _LINUX_SUNRPC_AUTH_GSS_H #include <linux/refcount.h> #include <linux/sunrpc/auth.h> #include <linux/sunrpc/svc.h> #include <linux/sunrpc/gss_api.h> #define RPC_GSS_VERSION 1 #define MAXSEQ 0x80000000 /* maximum legal sequence number, from rfc 2203 */ enum rpc_gss_proc { RPC_GSS_PROC_DATA = 0, RPC_GSS_PROC_INIT = 1, RPC_GSS_PROC_CONTINUE_INIT = 2, RPC_GSS_PROC_DESTROY = 3 }; enum rpc_gss_svc { RPC_GSS_SVC_NONE = 1, RPC_GSS_SVC_INTEGRITY = 2, RPC_GSS_SVC_PRIVACY = 3 }; /* on-the-wire gss cred: */ struct rpc_gss_wire_cred { u32 gc_v; /* version */ u32 gc_proc; /* control procedure */ u32 gc_seq; /* sequence number */ u32 gc_svc; /* service */ struct xdr_netobj gc_ctx; /* context handle */ }; /* on-the-wire gss verifier: */ struct rpc_gss_wire_verf { u32 gv_flavor; struct xdr_netobj gv_verf; }; /* return from gss NULL PROC init sec context */ struct rpc_gss_init_res { struct xdr_netobj gr_ctx; /* context handle */ u32 gr_major; /* major status */ u32 gr_minor; /* minor status */ u32 gr_win; /* sequence window */ struct xdr_netobj gr_token; /* token */ }; /* The gss_cl_ctx struct holds all the information the rpcsec_gss client * code needs to know about a single security context. In particular, * gc_gss_ctx is the context handle that is used to do gss-api calls, while * gc_wire_ctx is the context handle that is used to identify the context on * the wire when communicating with a server. */ struct gss_cl_ctx { refcount_t count; enum rpc_gss_proc gc_proc; u32 gc_seq; u32 gc_seq_xmit; spinlock_t gc_seq_lock; struct gss_ctx *gc_gss_ctx; struct xdr_netobj gc_wire_ctx; struct xdr_netobj gc_acceptor; u32 gc_win; unsigned long gc_expiry; struct rcu_head gc_rcu; }; struct gss_upcall_msg; struct gss_cred { struct rpc_cred gc_base; enum rpc_gss_svc gc_service; struct gss_cl_ctx __rcu *gc_ctx; struct gss_upcall_msg *gc_upcall; const char *gc_principal; unsigned long gc_upcall_timestamp; }; #endif /* _LINUX_SUNRPC_AUTH_GSS_H */ PK ! 6��oN N sunrpc/msg_prot.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/msg_prot.h * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_MSGPROT_H_ #define _LINUX_SUNRPC_MSGPROT_H_ #define RPC_VERSION 2 /* spec defines authentication flavor as an unsigned 32 bit integer */ typedef u32 rpc_authflavor_t; enum rpc_auth_flavors { RPC_AUTH_NULL = 0, RPC_AUTH_UNIX = 1, RPC_AUTH_SHORT = 2, RPC_AUTH_DES = 3, RPC_AUTH_KRB = 4, RPC_AUTH_GSS = 6, RPC_AUTH_TLS = 7, RPC_AUTH_MAXFLAVOR = 8, /* pseudoflavors: */ RPC_AUTH_GSS_KRB5 = 390003, RPC_AUTH_GSS_KRB5I = 390004, RPC_AUTH_GSS_KRB5P = 390005, RPC_AUTH_GSS_LKEY = 390006, RPC_AUTH_GSS_LKEYI = 390007, RPC_AUTH_GSS_LKEYP = 390008, RPC_AUTH_GSS_SPKM = 390009, RPC_AUTH_GSS_SPKMI = 390010, RPC_AUTH_GSS_SPKMP = 390011, }; /* Maximum size (in bytes) of an rpc credential or verifier */ #define RPC_MAX_AUTH_SIZE (400) enum rpc_msg_type { RPC_CALL = 0, RPC_REPLY = 1 }; enum rpc_reply_stat { RPC_MSG_ACCEPTED = 0, RPC_MSG_DENIED = 1 }; enum rpc_accept_stat { RPC_SUCCESS = 0, RPC_PROG_UNAVAIL = 1, RPC_PROG_MISMATCH = 2, RPC_PROC_UNAVAIL = 3, RPC_GARBAGE_ARGS = 4, RPC_SYSTEM_ERR = 5, /* internal use only */ RPC_DROP_REPLY = 60000, }; enum rpc_reject_stat { RPC_MISMATCH = 0, RPC_AUTH_ERROR = 1 }; enum rpc_auth_stat { RPC_AUTH_OK = 0, RPC_AUTH_BADCRED = 1, RPC_AUTH_REJECTEDCRED = 2, RPC_AUTH_BADVERF = 3, RPC_AUTH_REJECTEDVERF = 4, RPC_AUTH_TOOWEAK = 5, /* RPCSEC_GSS errors */ RPCSEC_GSS_CREDPROBLEM = 13, RPCSEC_GSS_CTXPROBLEM = 14 }; #define RPC_MAXNETNAMELEN 256 /* * From RFC 1831: * * "A record is composed of one or more record fragments. A record * fragment is a four-byte header followed by 0 to (2**31) - 1 bytes of * fragment data. The bytes encode an unsigned binary number; as with * XDR integers, the byte order is from highest to lowest. The number * encodes two values -- a boolean which indicates whether the fragment * is the last fragment of the record (bit value 1 implies the fragment * is the last fragment) and a 31-bit unsigned binary value which is the * length in bytes of the fragment's data. The boolean value is the * highest-order bit of the header; the length is the 31 low-order bits. * (Note that this record specification is NOT in XDR standard form!)" * * The Linux RPC client always sends its requests in a single record * fragment, limiting the maximum payload size for stream transports to * 2GB. */ typedef __be32 rpc_fraghdr; #define RPC_LAST_STREAM_FRAGMENT (1U << 31) #define RPC_FRAGMENT_SIZE_MASK (~RPC_LAST_STREAM_FRAGMENT) #define RPC_MAX_FRAGMENT_SIZE ((1U << 31) - 1) /* * RPC call and reply header size as number of 32bit words (verifier * size computed separately, see below) */ #define RPC_CALLHDRSIZE (6) #define RPC_REPHDRSIZE (4) /* * Maximum RPC header size, including authentication, * as number of 32bit words (see RFCs 1831, 1832). * * xid 1 xdr unit = 4 bytes * mtype 1 * rpc_version 1 * program 1 * prog_version 1 * procedure 1 * cred { * flavor 1 * length 1 * body<RPC_MAX_AUTH_SIZE> 100 xdr units = 400 bytes * } * verf { * flavor 1 * length 1 * body<RPC_MAX_AUTH_SIZE> 100 xdr units = 400 bytes * } * TOTAL 210 xdr units = 840 bytes */ #define RPC_MAX_HEADER_WITH_AUTH \ (RPC_CALLHDRSIZE + 2*(2+RPC_MAX_AUTH_SIZE/4)) #define RPC_MAX_REPHEADER_WITH_AUTH \ (RPC_REPHDRSIZE + (2 + RPC_MAX_AUTH_SIZE/4)) /* * Well-known netids. See: * * https://www.iana.org/assignments/rpc-netids/rpc-netids.xhtml */ #define RPCBIND_NETID_UDP "udp" #define RPCBIND_NETID_TCP "tcp" #define RPCBIND_NETID_RDMA "rdma" #define RPCBIND_NETID_SCTP "sctp" #define RPCBIND_NETID_UDP6 "udp6" #define RPCBIND_NETID_TCP6 "tcp6" #define RPCBIND_NETID_RDMA6 "rdma6" #define RPCBIND_NETID_SCTP6 "sctp6" #define RPCBIND_NETID_LOCAL "local" /* * Note that RFC 1833 does not put any size restrictions on the * netid string, but all currently defined netid's fit in 5 bytes. */ #define RPCBIND_MAXNETIDLEN (5u) /* * Universal addresses are introduced in RFC 1833 and further spelled * out in RFC 3530. RPCBIND_MAXUADDRLEN defines a maximum byte length * of a universal address for use in allocating buffers and character * arrays. * * Quoting RFC 3530, section 2.2: * * For TCP over IPv4 and for UDP over IPv4, the format of r_addr is the * US-ASCII string: * * h1.h2.h3.h4.p1.p2 * * The prefix, "h1.h2.h3.h4", is the standard textual form for * representing an IPv4 address, which is always four octets long. * Assuming big-endian ordering, h1, h2, h3, and h4, are respectively, * the first through fourth octets each converted to ASCII-decimal. * Assuming big-endian ordering, p1 and p2 are, respectively, the first * and second octets each converted to ASCII-decimal. For example, if a * host, in big-endian order, has an address of 0x0A010307 and there is * a service listening on, in big endian order, port 0x020F (decimal * 527), then the complete universal address is "10.1.3.7.2.15". * * ... * * For TCP over IPv6 and for UDP over IPv6, the format of r_addr is the * US-ASCII string: * * x1:x2:x3:x4:x5:x6:x7:x8.p1.p2 * * The suffix "p1.p2" is the service port, and is computed the same way * as with universal addresses for TCP and UDP over IPv4. The prefix, * "x1:x2:x3:x4:x5:x6:x7:x8", is the standard textual form for * representing an IPv6 address as defined in Section 2.2 of [RFC2373]. * Additionally, the two alternative forms specified in Section 2.2 of * [RFC2373] are also acceptable. */ #include <linux/inet.h> /* Maximum size of the port number part of a universal address */ #define RPCBIND_MAXUADDRPLEN sizeof(".255.255") /* Maximum size of an IPv4 universal address */ #define RPCBIND_MAXUADDR4LEN \ (INET_ADDRSTRLEN + RPCBIND_MAXUADDRPLEN) /* Maximum size of an IPv6 universal address */ #define RPCBIND_MAXUADDR6LEN \ (INET6_ADDRSTRLEN + RPCBIND_MAXUADDRPLEN) /* Assume INET6_ADDRSTRLEN will always be larger than INET_ADDRSTRLEN... */ #define RPCBIND_MAXUADDRLEN RPCBIND_MAXUADDR6LEN #endif /* _LINUX_SUNRPC_MSGPROT_H_ */ PK ! ���� � sunrpc/xprtrdma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* * Copyright (c) 2003-2007 Network Appliance, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the BSD-type * license below: * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Network Appliance, Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _LINUX_SUNRPC_XPRTRDMA_H #define _LINUX_SUNRPC_XPRTRDMA_H /* * Constants. Max RPC/NFS header is big enough to account for * additional marshaling buffers passed down by Linux client. * * RDMA header is currently fixed max size, and is big enough for a * fully-chunked NFS message (read chunks are the largest). Note only * a single chunk type per message is supported currently. */ #define RPCRDMA_MIN_SLOT_TABLE (4U) #define RPCRDMA_DEF_SLOT_TABLE (128U) #define RPCRDMA_MAX_SLOT_TABLE (16384U) #define RPCRDMA_MIN_INLINE (1024) /* min inline thresh */ #define RPCRDMA_DEF_INLINE (4096) /* default inline thresh */ #define RPCRDMA_MAX_INLINE (65536) /* max inline thresh */ /* Memory registration strategies, by number. * This is part of a kernel / user space API. Do not remove. */ enum rpcrdma_memreg { RPCRDMA_BOUNCEBUFFERS = 0, RPCRDMA_REGISTER, RPCRDMA_MEMWINDOWS, RPCRDMA_MEMWINDOWS_ASYNC, RPCRDMA_MTHCAFMR, RPCRDMA_FRWR, RPCRDMA_ALLPHYSICAL, RPCRDMA_LAST }; #endif /* _LINUX_SUNRPC_XPRTRDMA_H */ PK ! �me��' �' sunrpc/sched.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/sched.h * * Scheduling primitives for kernel Sun RPC. * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_SCHED_H_ #define _LINUX_SUNRPC_SCHED_H_ #include <linux/timer.h> #include <linux/ktime.h> #include <linux/sunrpc/types.h> #include <linux/spinlock.h> #include <linux/wait_bit.h> #include <linux/workqueue.h> #include <linux/sunrpc/xdr.h> /* * This is the actual RPC procedure call info. */ struct rpc_procinfo; struct rpc_message { const struct rpc_procinfo *rpc_proc; /* Procedure information */ void * rpc_argp; /* Arguments */ void * rpc_resp; /* Result */ const struct cred * rpc_cred; /* Credentials */ }; struct rpc_call_ops; struct rpc_wait_queue; struct rpc_wait { struct list_head list; /* wait queue links */ struct list_head links; /* Links to related tasks */ struct list_head timer_list; /* Timer list */ }; /* * This is the RPC task struct */ struct rpc_task { atomic_t tk_count; /* Reference count */ int tk_status; /* result of last operation */ struct list_head tk_task; /* global list of tasks */ /* * callback to be executed after waking up * action next procedure for async tasks */ void (*tk_callback)(struct rpc_task *); void (*tk_action)(struct rpc_task *); unsigned long tk_timeout; /* timeout for rpc_sleep() */ unsigned long tk_runstate; /* Task run status */ struct rpc_wait_queue *tk_waitqueue; /* RPC wait queue we're on */ union { struct work_struct tk_work; /* Async task work queue */ struct rpc_wait tk_wait; /* RPC wait */ } u; int tk_rpc_status; /* Result of last RPC operation */ /* * RPC call state */ struct rpc_message tk_msg; /* RPC call info */ void * tk_calldata; /* Caller private data */ const struct rpc_call_ops *tk_ops; /* Caller callbacks */ struct rpc_clnt * tk_client; /* RPC client */ struct rpc_xprt * tk_xprt; /* Transport */ struct rpc_cred * tk_op_cred; /* cred being operated on */ struct rpc_rqst * tk_rqstp; /* RPC request */ struct workqueue_struct *tk_workqueue; /* Normally rpciod, but could * be any workqueue */ ktime_t tk_start; /* RPC task init timestamp */ pid_t tk_owner; /* Process id for batching tasks */ unsigned short tk_flags; /* misc flags */ unsigned short tk_timeouts; /* maj timeouts */ #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) || IS_ENABLED(CONFIG_TRACEPOINTS) unsigned short tk_pid; /* debugging aid */ #endif unsigned char tk_priority : 2,/* Task priority */ tk_garb_retry : 2, tk_cred_retry : 2; }; typedef void (*rpc_action)(struct rpc_task *); struct rpc_call_ops { void (*rpc_call_prepare)(struct rpc_task *, void *); void (*rpc_call_done)(struct rpc_task *, void *); void (*rpc_count_stats)(struct rpc_task *, void *); void (*rpc_release)(void *); }; struct rpc_task_setup { struct rpc_task *task; struct rpc_clnt *rpc_client; struct rpc_xprt *rpc_xprt; struct rpc_cred *rpc_op_cred; /* credential being operated on */ const struct rpc_message *rpc_message; const struct rpc_call_ops *callback_ops; void *callback_data; struct workqueue_struct *workqueue; unsigned short flags; signed char priority; }; /* * RPC task flags */ #define RPC_TASK_ASYNC 0x0001 /* is an async task */ #define RPC_TASK_SWAPPER 0x0002 /* is swapping in/out */ #define RPC_TASK_MOVEABLE 0x0004 /* nfs4.1+ rpc tasks */ #define RPC_TASK_NULLCREDS 0x0010 /* Use AUTH_NULL credential */ #define RPC_CALL_MAJORSEEN 0x0020 /* major timeout seen */ #define RPC_TASK_ROOTCREDS 0x0040 /* force root creds */ #define RPC_TASK_DYNAMIC 0x0080 /* task was kmalloc'ed */ #define RPC_TASK_NO_ROUND_ROBIN 0x0100 /* send requests on "main" xprt */ #define RPC_TASK_SOFT 0x0200 /* Use soft timeouts */ #define RPC_TASK_SOFTCONN 0x0400 /* Fail if can't connect */ #define RPC_TASK_SENT 0x0800 /* message was sent */ #define RPC_TASK_TIMEOUT 0x1000 /* fail with ETIMEDOUT on timeout */ #define RPC_TASK_NOCONNECT 0x2000 /* return ENOTCONN if not connected */ #define RPC_TASK_NO_RETRANS_TIMEOUT 0x4000 /* wait forever for a reply */ #define RPC_TASK_CRED_NOREF 0x8000 /* No refcount on the credential */ #define RPC_IS_ASYNC(t) ((t)->tk_flags & RPC_TASK_ASYNC) #define RPC_IS_SWAPPER(t) ((t)->tk_flags & RPC_TASK_SWAPPER) #define RPC_IS_SOFT(t) ((t)->tk_flags & (RPC_TASK_SOFT|RPC_TASK_TIMEOUT)) #define RPC_IS_SOFTCONN(t) ((t)->tk_flags & RPC_TASK_SOFTCONN) #define RPC_WAS_SENT(t) ((t)->tk_flags & RPC_TASK_SENT) #define RPC_IS_MOVEABLE(t) ((t)->tk_flags & RPC_TASK_MOVEABLE) #define RPC_TASK_RUNNING 0 #define RPC_TASK_QUEUED 1 #define RPC_TASK_ACTIVE 2 #define RPC_TASK_NEED_XMIT 3 #define RPC_TASK_NEED_RECV 4 #define RPC_TASK_MSG_PIN_WAIT 5 #define RPC_TASK_SIGNALLED 6 #define RPC_IS_RUNNING(t) test_bit(RPC_TASK_RUNNING, &(t)->tk_runstate) #define rpc_set_running(t) set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate) #define rpc_test_and_set_running(t) \ test_and_set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate) #define rpc_clear_running(t) \ do { \ smp_mb__before_atomic(); \ clear_bit(RPC_TASK_RUNNING, &(t)->tk_runstate); \ smp_mb__after_atomic(); \ } while (0) #define RPC_IS_QUEUED(t) test_bit(RPC_TASK_QUEUED, &(t)->tk_runstate) #define rpc_set_queued(t) set_bit(RPC_TASK_QUEUED, &(t)->tk_runstate) #define rpc_clear_queued(t) \ do { \ smp_mb__before_atomic(); \ clear_bit(RPC_TASK_QUEUED, &(t)->tk_runstate); \ smp_mb__after_atomic(); \ } while (0) #define RPC_IS_ACTIVATED(t) test_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate) #define RPC_SIGNALLED(t) test_bit(RPC_TASK_SIGNALLED, &(t)->tk_runstate) /* * Task priorities. * Note: if you change these, you must also change * the task initialization definitions below. */ #define RPC_PRIORITY_LOW (-1) #define RPC_PRIORITY_NORMAL (0) #define RPC_PRIORITY_HIGH (1) #define RPC_PRIORITY_PRIVILEGED (2) #define RPC_NR_PRIORITY (1 + RPC_PRIORITY_PRIVILEGED - RPC_PRIORITY_LOW) struct rpc_timer { struct list_head list; unsigned long expires; struct delayed_work dwork; }; /* * RPC synchronization objects */ struct rpc_wait_queue { spinlock_t lock; struct list_head tasks[RPC_NR_PRIORITY]; /* task queue for each priority level */ unsigned char maxpriority; /* maximum priority (0 if queue is not a priority queue) */ unsigned char priority; /* current priority */ unsigned char nr; /* # tasks remaining for cookie */ unsigned int qlen; /* total # tasks waiting in queue */ struct rpc_timer timer_list; #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) || IS_ENABLED(CONFIG_TRACEPOINTS) const char * name; #endif }; /* * This is the # requests to send consecutively * from a single cookie. The aim is to improve * performance of NFS operations such as read/write. */ #define RPC_IS_PRIORITY(q) ((q)->maxpriority > 0) /* * Function prototypes */ struct rpc_task *rpc_new_task(const struct rpc_task_setup *); struct rpc_task *rpc_run_task(const struct rpc_task_setup *); struct rpc_task *rpc_run_bc_task(struct rpc_rqst *req); void rpc_put_task(struct rpc_task *); void rpc_put_task_async(struct rpc_task *); void rpc_signal_task(struct rpc_task *); void rpc_exit_task(struct rpc_task *); void rpc_exit(struct rpc_task *, int); void rpc_release_calldata(const struct rpc_call_ops *, void *); void rpc_killall_tasks(struct rpc_clnt *); void rpc_execute(struct rpc_task *); void rpc_init_priority_wait_queue(struct rpc_wait_queue *, const char *); void rpc_init_wait_queue(struct rpc_wait_queue *, const char *); void rpc_destroy_wait_queue(struct rpc_wait_queue *); unsigned long rpc_task_timeout(const struct rpc_task *task); void rpc_sleep_on_timeout(struct rpc_wait_queue *queue, struct rpc_task *task, rpc_action action, unsigned long timeout); void rpc_sleep_on(struct rpc_wait_queue *, struct rpc_task *, rpc_action action); void rpc_sleep_on_priority_timeout(struct rpc_wait_queue *queue, struct rpc_task *task, unsigned long timeout, int priority); void rpc_sleep_on_priority(struct rpc_wait_queue *, struct rpc_task *, int priority); void rpc_wake_up_queued_task(struct rpc_wait_queue *, struct rpc_task *); void rpc_wake_up_queued_task_set_status(struct rpc_wait_queue *, struct rpc_task *, int); void rpc_wake_up(struct rpc_wait_queue *); struct rpc_task *rpc_wake_up_next(struct rpc_wait_queue *); struct rpc_task *rpc_wake_up_first_on_wq(struct workqueue_struct *wq, struct rpc_wait_queue *, bool (*)(struct rpc_task *, void *), void *); struct rpc_task *rpc_wake_up_first(struct rpc_wait_queue *, bool (*)(struct rpc_task *, void *), void *); void rpc_wake_up_status(struct rpc_wait_queue *, int); void rpc_delay(struct rpc_task *, unsigned long); int rpc_malloc(struct rpc_task *); void rpc_free(struct rpc_task *); int rpciod_up(void); void rpciod_down(void); int __rpc_wait_for_completion_task(struct rpc_task *task, wait_bit_action_f *); #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) struct net; void rpc_show_tasks(struct net *); #endif int rpc_init_mempool(void); void rpc_destroy_mempool(void); extern struct workqueue_struct *rpciod_workqueue; extern struct workqueue_struct *xprtiod_workqueue; void rpc_prepare_task(struct rpc_task *task); static inline int rpc_wait_for_completion_task(struct rpc_task *task) { return __rpc_wait_for_completion_task(task, NULL); } #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) || IS_ENABLED(CONFIG_TRACEPOINTS) static inline const char * rpc_qname(const struct rpc_wait_queue *q) { return ((q && q->name) ? q->name : "unknown"); } static inline void rpc_assign_waitqueue_name(struct rpc_wait_queue *q, const char *name) { q->name = name; } #else static inline void rpc_assign_waitqueue_name(struct rpc_wait_queue *q, const char *name) { } #endif #if IS_ENABLED(CONFIG_SUNRPC_SWAP) int rpc_clnt_swap_activate(struct rpc_clnt *clnt); void rpc_clnt_swap_deactivate(struct rpc_clnt *clnt); #else static inline int rpc_clnt_swap_activate(struct rpc_clnt *clnt) { return -EINVAL; } static inline void rpc_clnt_swap_deactivate(struct rpc_clnt *clnt) { } #endif /* CONFIG_SUNRPC_SWAP */ #endif /* _LINUX_SUNRPC_SCHED_H_ */ PK ! ��/Ft t sunrpc/gss_asn1.hnu �[��� /* * linux/include/linux/sunrpc/gss_asn1.h * * minimal asn1 for generic encoding/decoding of gss tokens * * Adapted from MIT Kerberos 5-1.2.1 lib/include/krb5.h, * lib/gssapi/krb5/gssapiP_krb5.h, and others * * Copyright (c) 2000 The Regents of the University of Michigan. * All rights reserved. * * Andy Adamson <andros@umich.edu> */ /* * Copyright 1995 by the Massachusetts Institute of Technology. * All Rights Reserved. * * Export of this software from the United States of America may * require a specific license from the United States Government. * It is the responsibility of any person or organization contemplating * export to obtain such a license before exporting. * * WITHIN THAT CONSTRAINT, permission to use, copy, modify, and * distribute this software and its documentation for any purpose and * without fee is hereby granted, provided that the above copyright * notice appear in all copies and that both that copyright notice and * this permission notice appear in supporting documentation, and that * the name of M.I.T. not be used in advertising or publicity pertaining * to distribution of the software without specific, written prior * permission. Furthermore if you modify this software you must label * your software as modified software and not distribute it in such a * fashion that it might be confused with the original M.I.T. software. * M.I.T. makes no representations about the suitability of * this software for any purpose. It is provided "as is" without express * or implied warranty. * */ #include <linux/sunrpc/gss_api.h> #define SIZEOF_INT 4 /* from gssapi_err_generic.h */ #define G_BAD_SERVICE_NAME (-2045022976L) #define G_BAD_STRING_UID (-2045022975L) #define G_NOUSER (-2045022974L) #define G_VALIDATE_FAILED (-2045022973L) #define G_BUFFER_ALLOC (-2045022972L) #define G_BAD_MSG_CTX (-2045022971L) #define G_WRONG_SIZE (-2045022970L) #define G_BAD_USAGE (-2045022969L) #define G_UNKNOWN_QOP (-2045022968L) #define G_NO_HOSTNAME (-2045022967L) #define G_BAD_HOSTNAME (-2045022966L) #define G_WRONG_MECH (-2045022965L) #define G_BAD_TOK_HEADER (-2045022964L) #define G_BAD_DIRECTION (-2045022963L) #define G_TOK_TRUNC (-2045022962L) #define G_REFLECT (-2045022961L) #define G_WRONG_TOKID (-2045022960L) #define g_OID_equal(o1,o2) \ (((o1)->len == (o2)->len) && \ (memcmp((o1)->data,(o2)->data,(int) (o1)->len) == 0)) u32 g_verify_token_header( struct xdr_netobj *mech, int *body_size, unsigned char **buf_in, int toksize); int g_token_size( struct xdr_netobj *mech, unsigned int body_size); void g_make_token_header( struct xdr_netobj *mech, int body_size, unsigned char **buf); PK ! 7 �� � sunrpc/types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/types.h * * Generic types and misc stuff for RPC. * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_TYPES_H_ #define _LINUX_SUNRPC_TYPES_H_ #include <linux/timer.h> #include <linux/sched/signal.h> #include <linux/workqueue.h> #include <linux/sunrpc/debug.h> #include <linux/list.h> /* * Shorthands */ #define signalled() (signal_pending(current)) #endif /* _LINUX_SUNRPC_TYPES_H_ */ PK ! _�<} sunrpc/svc_xprt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/svc_xprt.h * * RPC server transport I/O */ #ifndef SUNRPC_SVC_XPRT_H #define SUNRPC_SVC_XPRT_H #include <linux/sunrpc/svc.h> struct module; struct svc_xprt_ops { struct svc_xprt *(*xpo_create)(struct svc_serv *, struct net *net, struct sockaddr *, int, int); struct svc_xprt *(*xpo_accept)(struct svc_xprt *); int (*xpo_has_wspace)(struct svc_xprt *); int (*xpo_recvfrom)(struct svc_rqst *); int (*xpo_sendto)(struct svc_rqst *); int (*xpo_result_payload)(struct svc_rqst *, unsigned int, unsigned int); void (*xpo_release_ctxt)(struct svc_xprt *xprt, void *ctxt); void (*xpo_detach)(struct svc_xprt *); void (*xpo_free)(struct svc_xprt *); void (*xpo_secure_port)(struct svc_rqst *rqstp); void (*xpo_kill_temp_xprt)(struct svc_xprt *); }; struct svc_xprt_class { const char *xcl_name; struct module *xcl_owner; const struct svc_xprt_ops *xcl_ops; struct list_head xcl_list; u32 xcl_max_payload; int xcl_ident; }; /* * This is embedded in an object that wants a callback before deleting * an xprt; intended for use by NFSv4.1, which needs to know when a * client's tcp connection (and hence possibly a backchannel) goes away. */ struct svc_xpt_user { struct list_head list; void (*callback)(struct svc_xpt_user *); }; struct svc_xprt { struct svc_xprt_class *xpt_class; const struct svc_xprt_ops *xpt_ops; struct kref xpt_ref; struct list_head xpt_list; struct list_head xpt_ready; unsigned long xpt_flags; #define XPT_BUSY 0 /* enqueued/receiving */ #define XPT_CONN 1 /* conn pending */ #define XPT_CLOSE 2 /* dead or dying */ #define XPT_DATA 3 /* data pending */ #define XPT_TEMP 4 /* connected transport */ #define XPT_DEAD 6 /* transport closed */ #define XPT_CHNGBUF 7 /* need to change snd/rcv buf sizes */ #define XPT_DEFERRED 8 /* deferred request pending */ #define XPT_OLD 9 /* used for xprt aging mark+sweep */ #define XPT_LISTENER 10 /* listening endpoint */ #define XPT_CACHE_AUTH 11 /* cache auth info */ #define XPT_LOCAL 12 /* connection from loopback interface */ #define XPT_KILL_TEMP 13 /* call xpo_kill_temp_xprt before closing */ #define XPT_CONG_CTRL 14 /* has congestion control */ struct svc_serv *xpt_server; /* service for transport */ atomic_t xpt_reserved; /* space on outq that is rsvd */ atomic_t xpt_nr_rqsts; /* Number of requests */ struct mutex xpt_mutex; /* to serialize sending data */ spinlock_t xpt_lock; /* protects sk_deferred * and xpt_auth_cache */ void *xpt_auth_cache;/* auth cache */ struct list_head xpt_deferred; /* deferred requests that need * to be revisted */ struct sockaddr_storage xpt_local; /* local address */ size_t xpt_locallen; /* length of address */ struct sockaddr_storage xpt_remote; /* remote peer's address */ size_t xpt_remotelen; /* length of address */ char xpt_remotebuf[INET6_ADDRSTRLEN + 10]; struct list_head xpt_users; /* callbacks on free */ struct net *xpt_net; const struct cred *xpt_cred; struct rpc_xprt *xpt_bc_xprt; /* NFSv4.1 backchannel */ struct rpc_xprt_switch *xpt_bc_xps; /* NFSv4.1 backchannel */ }; static inline void unregister_xpt_user(struct svc_xprt *xpt, struct svc_xpt_user *u) { spin_lock(&xpt->xpt_lock); list_del_init(&u->list); spin_unlock(&xpt->xpt_lock); } static inline int register_xpt_user(struct svc_xprt *xpt, struct svc_xpt_user *u) { spin_lock(&xpt->xpt_lock); if (test_bit(XPT_CLOSE, &xpt->xpt_flags)) { /* * The connection is about to be deleted soon (or, * worse, may already be deleted--in which case we've * already notified the xpt_users). */ spin_unlock(&xpt->xpt_lock); return -ENOTCONN; } list_add(&u->list, &xpt->xpt_users); spin_unlock(&xpt->xpt_lock); return 0; } static inline bool svc_xprt_is_dead(const struct svc_xprt *xprt) { return (test_bit(XPT_DEAD, &xprt->xpt_flags) != 0) || (test_bit(XPT_CLOSE, &xprt->xpt_flags) != 0); } int svc_reg_xprt_class(struct svc_xprt_class *); void svc_unreg_xprt_class(struct svc_xprt_class *); void svc_xprt_init(struct net *, struct svc_xprt_class *, struct svc_xprt *, struct svc_serv *); int svc_xprt_create(struct svc_serv *serv, const char *xprt_name, struct net *net, const int family, const unsigned short port, int flags, const struct cred *cred); void svc_xprt_destroy_all(struct svc_serv *serv, struct net *net); void svc_xprt_received(struct svc_xprt *xprt); void svc_xprt_enqueue(struct svc_xprt *xprt); void svc_xprt_put(struct svc_xprt *xprt); void svc_xprt_copy_addrs(struct svc_rqst *rqstp, struct svc_xprt *xprt); void svc_xprt_close(struct svc_xprt *xprt); int svc_port_is_privileged(struct sockaddr *sin); int svc_print_xprts(char *buf, int maxlen); struct svc_xprt *svc_find_xprt(struct svc_serv *serv, const char *xcl_name, struct net *net, const sa_family_t af, const unsigned short port); int svc_xprt_names(struct svc_serv *serv, char *buf, const int buflen); void svc_add_new_perm_xprt(struct svc_serv *serv, struct svc_xprt *xprt); void svc_age_temp_xprts_now(struct svc_serv *, struct sockaddr *); void svc_xprt_deferred_close(struct svc_xprt *xprt); static inline void svc_xprt_get(struct svc_xprt *xprt) { kref_get(&xprt->xpt_ref); } static inline void svc_xprt_set_local(struct svc_xprt *xprt, const struct sockaddr *sa, const size_t salen) { memcpy(&xprt->xpt_local, sa, salen); xprt->xpt_locallen = salen; } static inline void svc_xprt_set_remote(struct svc_xprt *xprt, const struct sockaddr *sa, const size_t salen) { memcpy(&xprt->xpt_remote, sa, salen); xprt->xpt_remotelen = salen; snprintf(xprt->xpt_remotebuf, sizeof(xprt->xpt_remotebuf) - 1, "%pISpc", sa); } static inline unsigned short svc_addr_port(const struct sockaddr *sa) { const struct sockaddr_in *sin = (const struct sockaddr_in *)sa; const struct sockaddr_in6 *sin6 = (const struct sockaddr_in6 *)sa; switch (sa->sa_family) { case AF_INET: return ntohs(sin->sin_port); case AF_INET6: return ntohs(sin6->sin6_port); } return 0; } static inline size_t svc_addr_len(const struct sockaddr *sa) { switch (sa->sa_family) { case AF_INET: return sizeof(struct sockaddr_in); case AF_INET6: return sizeof(struct sockaddr_in6); } BUG(); } static inline unsigned short svc_xprt_local_port(const struct svc_xprt *xprt) { return svc_addr_port((const struct sockaddr *)&xprt->xpt_local); } static inline unsigned short svc_xprt_remote_port(const struct svc_xprt *xprt) { return svc_addr_port((const struct sockaddr *)&xprt->xpt_remote); } static inline char *__svc_print_addr(const struct sockaddr *addr, char *buf, const size_t len) { const struct sockaddr_in *sin = (const struct sockaddr_in *)addr; const struct sockaddr_in6 *sin6 = (const struct sockaddr_in6 *)addr; switch (addr->sa_family) { case AF_INET: snprintf(buf, len, "%pI4, port=%u", &sin->sin_addr, ntohs(sin->sin_port)); break; case AF_INET6: snprintf(buf, len, "%pI6, port=%u", &sin6->sin6_addr, ntohs(sin6->sin6_port)); break; default: snprintf(buf, len, "unknown address type: %d", addr->sa_family); break; } return buf; } #endif /* SUNRPC_SVC_XPRT_H */ PK ! �X[%� � sunrpc/svcsock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/svcsock.h * * RPC server socket I/O. * * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef SUNRPC_SVCSOCK_H #define SUNRPC_SVCSOCK_H #include <linux/sunrpc/svc.h> #include <linux/sunrpc/svc_xprt.h> /* * RPC server socket. */ struct svc_sock { struct svc_xprt sk_xprt; struct socket * sk_sock; /* berkeley socket layer */ struct sock * sk_sk; /* INET layer */ /* We keep the old state_change and data_ready CB's here */ void (*sk_ostate)(struct sock *); void (*sk_odata)(struct sock *); void (*sk_owspace)(struct sock *); /* private TCP part */ /* On-the-wire fragment header: */ __be32 sk_marker; /* As we receive a record, this includes the length received so * far (including the fragment header): */ u32 sk_tcplen; /* Total length of the data (not including fragment headers) * received so far in the fragments making up this rpc: */ u32 sk_datalen; /* Number of queued send requests */ atomic_t sk_sendqlen; struct page * sk_pages[RPCSVC_MAXPAGES]; /* received data */ }; static inline u32 svc_sock_reclen(struct svc_sock *svsk) { return be32_to_cpu(svsk->sk_marker) & RPC_FRAGMENT_SIZE_MASK; } static inline u32 svc_sock_final_rec(struct svc_sock *svsk) { return be32_to_cpu(svsk->sk_marker) & RPC_LAST_STREAM_FRAGMENT; } /* * Function prototypes. */ void svc_close_net(struct svc_serv *, struct net *); int svc_recv(struct svc_rqst *, long); int svc_send(struct svc_rqst *); void svc_drop(struct svc_rqst *); void svc_sock_update_bufs(struct svc_serv *serv); int svc_addsock(struct svc_serv *serv, struct net *net, const int fd, char *name_return, const size_t len, const struct cred *cred); void svc_init_xprt_sock(void); void svc_cleanup_xprt_sock(void); struct svc_xprt *svc_sock_create(struct svc_serv *serv, int prot); void svc_sock_destroy(struct svc_xprt *); /* * svc_makesock socket characteristics */ #define SVC_SOCK_DEFAULTS (0U) #define SVC_SOCK_ANONYMOUS (1U << 0) /* don't register with pmap */ #define SVC_SOCK_TEMPORARY (1U << 1) /* flag socket as temporary */ #endif /* SUNRPC_SVCSOCK_H */ PK ! ~�7�NJ NJ sunrpc/svc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/svc.h * * RPC server declarations. * * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef SUNRPC_SVC_H #define SUNRPC_SVC_H #include <linux/in.h> #include <linux/in6.h> #include <linux/sunrpc/types.h> #include <linux/sunrpc/xdr.h> #include <linux/sunrpc/auth.h> #include <linux/sunrpc/svcauth.h> #include <linux/wait.h> #include <linux/mm.h> #include <linux/pagevec.h> /* statistics for svc_pool structures */ struct svc_pool_stats { atomic_long_t packets; unsigned long sockets_queued; atomic_long_t threads_woken; atomic_long_t threads_timedout; }; /* * * RPC service thread pool. * * Pool of threads and temporary sockets. Generally there is only * a single one of these per RPC service, but on NUMA machines those * services that can benefit from it (i.e. nfs but not lockd) will * have one pool per NUMA node. This optimisation reduces cross- * node traffic on multi-node NUMA NFS servers. */ struct svc_pool { unsigned int sp_id; /* pool id; also node id on NUMA */ spinlock_t sp_lock; /* protects all fields */ struct list_head sp_sockets; /* pending sockets */ unsigned int sp_nrthreads; /* # of threads in pool */ struct list_head sp_all_threads; /* all server threads */ struct svc_pool_stats sp_stats; /* statistics on pool operation */ #define SP_TASK_PENDING (0) /* still work to do even if no * xprt is queued. */ #define SP_CONGESTED (1) unsigned long sp_flags; } ____cacheline_aligned_in_smp; /* * RPC service. * * An RPC service is a ``daemon,'' possibly multithreaded, which * receives and processes incoming RPC messages. * It has one or more transport sockets associated with it, and maintains * a list of idle threads waiting for input. * * We currently do not support more than one RPC program per daemon. */ struct svc_serv { struct svc_program * sv_program; /* RPC program */ struct svc_stat * sv_stats; /* RPC statistics */ spinlock_t sv_lock; struct kref sv_refcnt; unsigned int sv_nrthreads; /* # of server threads */ unsigned int sv_maxconn; /* max connections allowed or * '0' causing max to be based * on number of threads. */ unsigned int sv_max_payload; /* datagram payload size */ unsigned int sv_max_mesg; /* max_payload + 1 page for overheads */ unsigned int sv_xdrsize; /* XDR buffer size */ struct list_head sv_permsocks; /* all permanent sockets */ struct list_head sv_tempsocks; /* all temporary sockets */ int sv_tmpcnt; /* count of temporary sockets */ struct timer_list sv_temptimer; /* timer for aging temporary sockets */ char * sv_name; /* service name */ unsigned int sv_nrpools; /* number of thread pools */ struct svc_pool * sv_pools; /* array of thread pools */ int (*sv_threadfn)(void *data); #if defined(CONFIG_SUNRPC_BACKCHANNEL) struct list_head sv_cb_list; /* queue for callback requests * that arrive over the same * connection */ spinlock_t sv_cb_lock; /* protects the svc_cb_list */ wait_queue_head_t sv_cb_waitq; /* sleep here if there are no * entries in the svc_cb_list */ bool sv_bc_enabled; /* service uses backchannel */ #endif /* CONFIG_SUNRPC_BACKCHANNEL */ }; /** * svc_get() - increment reference count on a SUNRPC serv * @serv: the svc_serv to have count incremented * * Returns: the svc_serv that was passed in. */ static inline struct svc_serv *svc_get(struct svc_serv *serv) { kref_get(&serv->sv_refcnt); return serv; } void svc_destroy(struct kref *); /** * svc_put - decrement reference count on a SUNRPC serv * @serv: the svc_serv to have count decremented * * When the reference count reaches zero, svc_destroy() * is called to clean up and free the serv. */ static inline void svc_put(struct svc_serv *serv) { kref_put(&serv->sv_refcnt, svc_destroy); } /* * Maximum payload size supported by a kernel RPC server. * This is use to determine the max number of pages nfsd is * willing to return in a single READ operation. * * These happen to all be powers of 2, which is not strictly * necessary but helps enforce the real limitation, which is * that they should be multiples of PAGE_SIZE. * * For UDP transports, a block plus NFS,RPC, and UDP headers * has to fit into the IP datagram limit of 64K. The largest * feasible number for all known page sizes is probably 48K, * but we choose 32K here. This is the same as the historical * Linux limit; someone who cares more about NFS/UDP performance * can test a larger number. * * For TCP transports we have more freedom. A size of 1MB is * chosen to match the client limit. Other OSes are known to * have larger limits, but those numbers are probably beyond * the point of diminishing returns. */ #define RPCSVC_MAXPAYLOAD (1*1024*1024u) #define RPCSVC_MAXPAYLOAD_TCP RPCSVC_MAXPAYLOAD #define RPCSVC_MAXPAYLOAD_UDP (32*1024u) extern u32 svc_max_payload(const struct svc_rqst *rqstp); /* * RPC Requsts and replies are stored in one or more pages. * We maintain an array of pages for each server thread. * Requests are copied into these pages as they arrive. Remaining * pages are available to write the reply into. * * Pages are sent using ->sendpage so each server thread needs to * allocate more to replace those used in sending. To help keep track * of these pages we have a receive list where all pages initialy live, * and a send list where pages are moved to when there are to be part * of a reply. * * We use xdr_buf for holding responses as it fits well with NFS * read responses (that have a header, and some data pages, and possibly * a tail) and means we can share some client side routines. * * The xdr_buf.head kvec always points to the first page in the rq_*pages * list. The xdr_buf.pages pointer points to the second page on that * list. xdr_buf.tail points to the end of the first page. * This assumes that the non-page part of an rpc reply will fit * in a page - NFSd ensures this. lockd also has no trouble. * * Each request/reply pair can have at most one "payload", plus two pages, * one for the request, and one for the reply. * We using ->sendfile to return read data, we might need one extra page * if the request is not page-aligned. So add another '1'. */ #define RPCSVC_MAXPAGES ((RPCSVC_MAXPAYLOAD+PAGE_SIZE-1)/PAGE_SIZE \ + 2 + 1) static inline u32 svc_getnl(struct kvec *iov) { __be32 val, *vp; vp = iov->iov_base; val = *vp++; iov->iov_base = (void*)vp; iov->iov_len -= sizeof(__be32); return ntohl(val); } static inline void svc_putnl(struct kvec *iov, u32 val) { __be32 *vp = iov->iov_base + iov->iov_len; *vp = htonl(val); iov->iov_len += sizeof(__be32); } static inline __be32 svc_getu32(struct kvec *iov) { __be32 val, *vp; vp = iov->iov_base; val = *vp++; iov->iov_base = (void*)vp; iov->iov_len -= sizeof(__be32); return val; } static inline void svc_ungetu32(struct kvec *iov) { __be32 *vp = (__be32 *)iov->iov_base; iov->iov_base = (void *)(vp - 1); iov->iov_len += sizeof(*vp); } static inline void svc_putu32(struct kvec *iov, __be32 val) { __be32 *vp = iov->iov_base + iov->iov_len; *vp = val; iov->iov_len += sizeof(__be32); } /* * The context of a single thread, including the request currently being * processed. */ struct svc_rqst { struct list_head rq_all; /* all threads list */ struct rcu_head rq_rcu_head; /* for RCU deferred kfree */ struct svc_xprt * rq_xprt; /* transport ptr */ struct sockaddr_storage rq_addr; /* peer address */ size_t rq_addrlen; struct sockaddr_storage rq_daddr; /* dest addr of request * - reply from here */ size_t rq_daddrlen; struct svc_serv * rq_server; /* RPC service definition */ struct svc_pool * rq_pool; /* thread pool */ const struct svc_procedure *rq_procinfo;/* procedure info */ struct auth_ops * rq_authop; /* authentication flavour */ struct svc_cred rq_cred; /* auth info */ void * rq_xprt_ctxt; /* transport specific context ptr */ struct svc_deferred_req*rq_deferred; /* deferred request we are replaying */ struct xdr_buf rq_arg; struct xdr_stream rq_arg_stream; struct xdr_stream rq_res_stream; struct page *rq_scratch_page; struct xdr_buf rq_res; struct page *rq_pages[RPCSVC_MAXPAGES + 1]; struct page * *rq_respages; /* points into rq_pages */ struct page * *rq_next_page; /* next reply page to use */ struct page * *rq_page_end; /* one past the last page */ struct pagevec rq_pvec; struct kvec rq_vec[RPCSVC_MAXPAGES]; /* generally useful.. */ struct bio_vec rq_bvec[RPCSVC_MAXPAGES]; __be32 rq_xid; /* transmission id */ u32 rq_prog; /* program number */ u32 rq_vers; /* program version */ u32 rq_proc; /* procedure number */ u32 rq_prot; /* IP protocol */ int rq_cachetype; /* catering to nfsd */ #define RQ_SECURE (0) /* secure port */ #define RQ_LOCAL (1) /* local request */ #define RQ_USEDEFERRAL (2) /* use deferral */ #define RQ_DROPME (3) /* drop current reply */ #define RQ_SPLICE_OK (4) /* turned off in gss privacy * to prevent encrypting page * cache pages */ #define RQ_VICTIM (5) /* about to be shut down */ #define RQ_BUSY (6) /* request is busy */ #define RQ_DATA (7) /* request has data */ unsigned long rq_flags; /* flags field */ ktime_t rq_qtime; /* enqueue time */ void * rq_argp; /* decoded arguments */ void * rq_resp; /* xdr'd results */ void * rq_auth_data; /* flavor-specific data */ __be32 rq_auth_stat; /* authentication status */ int rq_auth_slack; /* extra space xdr code * should leave in head * for krb5i, krb5p. */ int rq_reserved; /* space on socket outq * reserved for this request */ ktime_t rq_stime; /* start time */ struct cache_req rq_chandle; /* handle passed to caches for * request delaying */ /* Catering to nfsd */ struct auth_domain * rq_client; /* RPC peer info */ struct auth_domain * rq_gssclient; /* "gss/"-style peer info */ struct svc_cacherep * rq_cacherep; /* cache info */ struct task_struct *rq_task; /* service thread */ spinlock_t rq_lock; /* per-request lock */ struct net *rq_bc_net; /* pointer to backchannel's * net namespace */ void ** rq_lease_breaker; /* The v4 client breaking a lease */ }; #define SVC_NET(rqst) (rqst->rq_xprt ? rqst->rq_xprt->xpt_net : rqst->rq_bc_net) /* * Rigorous type checking on sockaddr type conversions */ static inline struct sockaddr_in *svc_addr_in(const struct svc_rqst *rqst) { return (struct sockaddr_in *) &rqst->rq_addr; } static inline struct sockaddr_in6 *svc_addr_in6(const struct svc_rqst *rqst) { return (struct sockaddr_in6 *) &rqst->rq_addr; } static inline struct sockaddr *svc_addr(const struct svc_rqst *rqst) { return (struct sockaddr *) &rqst->rq_addr; } static inline struct sockaddr_in *svc_daddr_in(const struct svc_rqst *rqst) { return (struct sockaddr_in *) &rqst->rq_daddr; } static inline struct sockaddr_in6 *svc_daddr_in6(const struct svc_rqst *rqst) { return (struct sockaddr_in6 *) &rqst->rq_daddr; } static inline struct sockaddr *svc_daddr(const struct svc_rqst *rqst) { return (struct sockaddr *) &rqst->rq_daddr; } /* * Check buffer bounds after decoding arguments */ static inline int xdr_argsize_check(struct svc_rqst *rqstp, __be32 *p) { char *cp = (char *)p; struct kvec *vec = &rqstp->rq_arg.head[0]; return cp >= (char*)vec->iov_base && cp <= (char*)vec->iov_base + vec->iov_len; } static inline int xdr_ressize_check(struct svc_rqst *rqstp, __be32 *p) { struct kvec *vec = &rqstp->rq_res.head[0]; char *cp = (char*)p; vec->iov_len = cp - (char*)vec->iov_base; return vec->iov_len <= PAGE_SIZE; } static inline void svc_free_res_pages(struct svc_rqst *rqstp) { while (rqstp->rq_next_page != rqstp->rq_respages) { struct page **pp = --rqstp->rq_next_page; if (*pp) { put_page(*pp); *pp = NULL; } } } struct svc_deferred_req { u32 prot; /* protocol (UDP or TCP) */ struct svc_xprt *xprt; struct sockaddr_storage addr; /* where reply must go */ size_t addrlen; struct sockaddr_storage daddr; /* where reply must come from */ size_t daddrlen; void *xprt_ctxt; struct cache_deferred_req handle; int argslen; __be32 args[]; }; struct svc_process_info { union { int (*dispatch)(struct svc_rqst *, __be32 *); struct { unsigned int lovers; unsigned int hivers; } mismatch; }; }; /* * List of RPC programs on the same transport endpoint */ struct svc_program { struct svc_program * pg_next; /* other programs (same xprt) */ u32 pg_prog; /* program number */ unsigned int pg_lovers; /* lowest version */ unsigned int pg_hivers; /* highest version */ unsigned int pg_nvers; /* number of versions */ const struct svc_version **pg_vers; /* version array */ char * pg_name; /* service name */ char * pg_class; /* class name: services sharing authentication */ int (*pg_authenticate)(struct svc_rqst *); __be32 (*pg_init_request)(struct svc_rqst *, const struct svc_program *, struct svc_process_info *); int (*pg_rpcbind_set)(struct net *net, const struct svc_program *, u32 version, int family, unsigned short proto, unsigned short port); }; /* * RPC program version */ struct svc_version { u32 vs_vers; /* version number */ u32 vs_nproc; /* number of procedures */ const struct svc_procedure *vs_proc; /* per-procedure info */ unsigned int *vs_count; /* call counts */ u32 vs_xdrsize; /* xdrsize needed for this version */ /* Don't register with rpcbind */ bool vs_hidden; /* Don't care if the rpcbind registration fails */ bool vs_rpcb_optnl; /* Need xprt with congestion control */ bool vs_need_cong_ctrl; /* Override dispatch function (e.g. when caching replies). * A return value of 0 means drop the request. * vs_dispatch == NULL means use default dispatcher. */ int (*vs_dispatch)(struct svc_rqst *, __be32 *); }; /* * RPC procedure info */ struct svc_procedure { /* process the request: */ __be32 (*pc_func)(struct svc_rqst *); /* XDR decode args: */ bool (*pc_decode)(struct svc_rqst *rqstp, struct xdr_stream *xdr); /* XDR encode result: */ bool (*pc_encode)(struct svc_rqst *rqstp, struct xdr_stream *xdr); /* XDR free result: */ void (*pc_release)(struct svc_rqst *); unsigned int pc_argsize; /* argument struct size */ unsigned int pc_argzero; /* how much of argument to clear */ unsigned int pc_ressize; /* result struct size */ unsigned int pc_cachetype; /* cache info (NFS) */ unsigned int pc_xdrressize; /* maximum size of XDR reply */ const char * pc_name; /* for display */ }; /* * Function prototypes. */ int svc_rpcb_setup(struct svc_serv *serv, struct net *net); void svc_rpcb_cleanup(struct svc_serv *serv, struct net *net); int svc_bind(struct svc_serv *serv, struct net *net); struct svc_serv *svc_create(struct svc_program *, unsigned int, int (*threadfn)(void *data)); struct svc_rqst *svc_rqst_alloc(struct svc_serv *serv, struct svc_pool *pool, int node); void svc_rqst_replace_page(struct svc_rqst *rqstp, struct page *page); void svc_rqst_free(struct svc_rqst *); void svc_exit_thread(struct svc_rqst *); struct svc_serv * svc_create_pooled(struct svc_program *prog, struct svc_stat *stats, unsigned int bufsize, int (*threadfn)(void *data)); int svc_set_num_threads(struct svc_serv *, struct svc_pool *, int); int svc_pool_stats_open(struct svc_serv *serv, struct file *file); int svc_process(struct svc_rqst *); int bc_svc_process(struct svc_serv *, struct rpc_rqst *, struct svc_rqst *); int svc_register(const struct svc_serv *, struct net *, const int, const unsigned short, const unsigned short); void svc_wake_up(struct svc_serv *); void svc_reserve(struct svc_rqst *rqstp, int space); struct svc_pool * svc_pool_for_cpu(struct svc_serv *serv, int cpu); char * svc_print_addr(struct svc_rqst *, char *, size_t); const char * svc_proc_name(const struct svc_rqst *rqstp); int svc_encode_result_payload(struct svc_rqst *rqstp, unsigned int offset, unsigned int length); unsigned int svc_fill_write_vector(struct svc_rqst *rqstp, struct xdr_buf *payload); char *svc_fill_symlink_pathname(struct svc_rqst *rqstp, struct kvec *first, void *p, size_t total); __be32 svc_generic_init_request(struct svc_rqst *rqstp, const struct svc_program *progp, struct svc_process_info *procinfo); int svc_generic_rpcbind_set(struct net *net, const struct svc_program *progp, u32 version, int family, unsigned short proto, unsigned short port); int svc_rpcbind_set_version(struct net *net, const struct svc_program *progp, u32 version, int family, unsigned short proto, unsigned short port); #define RPC_MAX_ADDRBUFLEN (63U) /* * When we want to reduce the size of the reserved space in the response * buffer, we need to take into account the size of any checksum data that * may be at the end of the packet. This is difficult to determine exactly * for all cases without actually generating the checksum, so we just use a * static value. */ static inline void svc_reserve_auth(struct svc_rqst *rqstp, int space) { svc_reserve(rqstp, space + rqstp->rq_auth_slack); } /** * svcxdr_init_decode - Prepare an xdr_stream for Call decoding * @rqstp: controlling server RPC transaction context * * This function currently assumes the RPC header in rq_arg has * already been decoded. Upon return, xdr->p points to the * location of the upper layer header. */ static inline void svcxdr_init_decode(struct svc_rqst *rqstp) { struct xdr_stream *xdr = &rqstp->rq_arg_stream; struct xdr_buf *buf = &rqstp->rq_arg; struct kvec *argv = buf->head; /* * svc_getnl() and friends do not keep the xdr_buf's ::len * field up to date. Refresh that field before initializing * the argument decoding stream. */ buf->len = buf->head->iov_len + buf->page_len + buf->tail->iov_len; xdr_init_decode(xdr, buf, argv->iov_base, NULL); xdr_set_scratch_page(xdr, rqstp->rq_scratch_page); } /** * svcxdr_init_encode - Prepare an xdr_stream for svc Reply encoding * @rqstp: controlling server RPC transaction context * */ static inline void svcxdr_init_encode(struct svc_rqst *rqstp) { struct xdr_stream *xdr = &rqstp->rq_res_stream; struct xdr_buf *buf = &rqstp->rq_res; struct kvec *resv = buf->head; xdr_reset_scratch_buffer(xdr); xdr->buf = buf; xdr->iov = resv; xdr->p = resv->iov_base + resv->iov_len; xdr->end = resv->iov_base + PAGE_SIZE - rqstp->rq_auth_slack; buf->len = resv->iov_len; xdr->page_ptr = buf->pages - 1; buf->buflen = PAGE_SIZE * (rqstp->rq_page_end - buf->pages); buf->buflen -= rqstp->rq_auth_slack; xdr->rqst = NULL; } #endif /* SUNRPC_SVC_H */ PK ! ���n n sunrpc/rpc_rdma_cid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * * Copyright (c) 2020, Oracle and/or its affiliates. */ #ifndef RPC_RDMA_CID_H #define RPC_RDMA_CID_H /* * The rpc_rdma_cid struct records completion ID information. A * completion ID matches an incoming Send or Receive completion * to a Completion Queue and to a previous ib_post_*(). The ID * can then be displayed in an error message or recorded in a * trace record. * * This struct is shared between the server and client RPC/RDMA * transport implementations. */ struct rpc_rdma_cid { u32 ci_queue_id; int ci_completion_id; }; #endif /* RPC_RDMA_CID_H */ PK ! �� � sunrpc/svcauth.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/svcauth.h * * RPC server-side authentication stuff. * * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_SVCAUTH_H_ #define _LINUX_SUNRPC_SVCAUTH_H_ #include <linux/string.h> #include <linux/sunrpc/msg_prot.h> #include <linux/sunrpc/cache.h> #include <linux/sunrpc/gss_api.h> #include <linux/hash.h> #include <linux/stringhash.h> #include <linux/cred.h> struct svc_cred { kuid_t cr_uid; kgid_t cr_gid; struct group_info *cr_group_info; u32 cr_flavor; /* pseudoflavor */ /* name of form servicetype/hostname@REALM, passed down by * gss-proxy: */ char *cr_raw_principal; /* name of form servicetype@hostname, passed down by * rpc.svcgssd, or computed from the above: */ char *cr_principal; char *cr_targ_princ; struct gss_api_mech *cr_gss_mech; }; static inline void init_svc_cred(struct svc_cred *cred) { cred->cr_group_info = NULL; cred->cr_raw_principal = NULL; cred->cr_principal = NULL; cred->cr_targ_princ = NULL; cred->cr_gss_mech = NULL; } static inline void free_svc_cred(struct svc_cred *cred) { if (cred->cr_group_info) put_group_info(cred->cr_group_info); kfree(cred->cr_raw_principal); kfree(cred->cr_principal); kfree(cred->cr_targ_princ); gss_mech_put(cred->cr_gss_mech); init_svc_cred(cred); } struct svc_rqst; /* forward decl */ struct in6_addr; /* Authentication is done in the context of a domain. * * Currently, the nfs server uses the auth_domain to stand * for the "client" listed in /etc/exports. * * More generally, a domain might represent a group of clients using * a common mechanism for authentication and having a common mapping * between local identity (uid) and network identity. All clients * in a domain have similar general access rights. Each domain can * contain multiple principals which will have different specific right * based on normal Discretionary Access Control. * * A domain is created by an authentication flavour module based on name * only. Userspace then fills in detail on demand. * * In the case of auth_unix and auth_null, the auth_domain is also * associated with entries in another cache representing the mapping * of ip addresses to the given client. */ struct auth_domain { struct kref ref; struct hlist_node hash; char *name; struct auth_ops *flavour; struct rcu_head rcu_head; }; /* * Each authentication flavour registers an auth_ops * structure. * name is simply the name. * flavour gives the auth flavour. It determines where the flavour is registered * accept() is given a request and should verify it. * It should inspect the authenticator and verifier, and possibly the data. * If there is a problem with the authentication *authp should be set. * The return value of accept() can indicate: * OK - authorised. client and credential are set in rqstp. * reqbuf points to arguments * resbuf points to good place for results. verfier * is (probably) already in place. Certainly space is * reserved for it. * DROP - simply drop the request. It may have been deferred * GARBAGE - rpc garbage_args error * SYSERR - rpc system_err error * DENIED - authp holds reason for denial. * COMPLETE - the reply is encoded already and ready to be sent; no * further processing is necessary. (This is used for processing * null procedure calls which are used to set up encryption * contexts.) * * accept is passed the proc number so that it can accept NULL rpc requests * even if it cannot authenticate the client (as is sometimes appropriate). * * release() is given a request after the procedure has been run. * It should sign/encrypt the results if needed * It should return: * OK - the resbuf is ready to be sent * DROP - the reply should be quitely dropped * DENIED - authp holds a reason for MSG_DENIED * SYSERR - rpc system_err * * domain_release() * This call releases a domain. * set_client() * Givens a pending request (struct svc_rqst), finds and assigns * an appropriate 'auth_domain' as the client. */ struct auth_ops { char * name; struct module *owner; int flavour; int (*accept)(struct svc_rqst *rq); int (*release)(struct svc_rqst *rq); void (*domain_release)(struct auth_domain *); int (*set_client)(struct svc_rqst *rq); }; #define SVC_GARBAGE 1 #define SVC_SYSERR 2 #define SVC_VALID 3 #define SVC_NEGATIVE 4 #define SVC_OK 5 #define SVC_DROP 6 #define SVC_CLOSE 7 /* Like SVC_DROP, but request is definitely * lost so if there is a tcp connection, it * should be closed */ #define SVC_DENIED 8 #define SVC_PENDING 9 #define SVC_COMPLETE 10 struct svc_xprt; extern int svc_authenticate(struct svc_rqst *rqstp); extern int svc_authorise(struct svc_rqst *rqstp); extern int svc_set_client(struct svc_rqst *rqstp); extern int svc_auth_register(rpc_authflavor_t flavor, struct auth_ops *aops); extern void svc_auth_unregister(rpc_authflavor_t flavor); extern struct auth_domain *unix_domain_find(char *name); extern void auth_domain_put(struct auth_domain *item); extern int auth_unix_add_addr(struct net *net, struct in6_addr *addr, struct auth_domain *dom); extern struct auth_domain *auth_domain_lookup(char *name, struct auth_domain *new); extern struct auth_domain *auth_domain_find(char *name); extern struct auth_domain *auth_unix_lookup(struct net *net, struct in6_addr *addr); extern int auth_unix_forget_old(struct auth_domain *dom); extern void svcauth_unix_purge(struct net *net); extern void svcauth_unix_info_release(struct svc_xprt *xpt); extern int svcauth_unix_set_client(struct svc_rqst *rqstp); extern int unix_gid_cache_create(struct net *net); extern void unix_gid_cache_destroy(struct net *net); /* * The <stringhash.h> functions are good enough that we don't need to * use hash_32() on them; just extracting the high bits is enough. */ static inline unsigned long hash_str(char const *name, int bits) { return hashlen_hash(hashlen_string(NULL, name)) >> (32 - bits); } static inline unsigned long hash_mem(char const *buf, int length, int bits) { return full_name_hash(NULL, buf, length) >> (32 - bits); } #endif /* _LINUX_SUNRPC_SVCAUTH_H_ */ PK ! ����7 7 sunrpc/xprtsock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/xprtsock.h * * Declarations for the RPC transport socket provider. */ #ifndef _LINUX_SUNRPC_XPRTSOCK_H #define _LINUX_SUNRPC_XPRTSOCK_H int init_socket_xprt(void); void cleanup_socket_xprt(void); unsigned short get_srcport(struct rpc_xprt *); #define RPC_MIN_RESVPORT (1U) #define RPC_MAX_RESVPORT (65535U) #define RPC_DEF_MIN_RESVPORT (665U) #define RPC_DEF_MAX_RESVPORT (1023U) struct sock_xprt { struct rpc_xprt xprt; /* * Network layer */ struct socket * sock; struct sock * inet; struct file * file; /* * State of TCP reply receive */ struct { struct { __be32 fraghdr, xid, calldir; } __attribute__((packed)); u32 offset, len; unsigned long copied; } recv; /* * State of TCP transmit queue */ struct { u32 offset; } xmit; /* * Connection of transports */ unsigned long sock_state; struct delayed_work connect_worker; struct work_struct error_worker; struct work_struct recv_worker; struct mutex recv_mutex; struct sockaddr_storage srcaddr; unsigned short srcport; int xprt_err; /* * UDP socket buffer size parameters */ size_t rcvsize, sndsize; struct rpc_timeout tcp_timeout; /* * Saved socket callback addresses */ void (*old_data_ready)(struct sock *); void (*old_state_change)(struct sock *); void (*old_write_space)(struct sock *); void (*old_error_report)(struct sock *); }; /* * TCP RPC flags */ #define XPRT_SOCK_CONNECTING 1U #define XPRT_SOCK_DATA_READY (2) #define XPRT_SOCK_UPD_TIMEOUT (3) #define XPRT_SOCK_WAKE_ERROR (4) #define XPRT_SOCK_WAKE_WRITE (5) #define XPRT_SOCK_WAKE_PENDING (6) #define XPRT_SOCK_WAKE_DISCONNECT (7) #define XPRT_SOCK_CONNECT_SENT (8) #define XPRT_SOCK_NOSPACE (9) #endif /* _LINUX_SUNRPC_XPRTSOCK_H */ PK ! �ݗ� sunrpc/debug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/debug.h * * Debugging support for sunrpc module * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_DEBUG_H_ #define _LINUX_SUNRPC_DEBUG_H_ #include <uapi/linux/sunrpc/debug.h> /* * Debugging macros etc */ #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) extern unsigned int rpc_debug; extern unsigned int nfs_debug; extern unsigned int nfsd_debug; extern unsigned int nlm_debug; #endif #define dprintk(fmt, ...) \ dfprintk(FACILITY, fmt, ##__VA_ARGS__) #define dprintk_cont(fmt, ...) \ dfprintk_cont(FACILITY, fmt, ##__VA_ARGS__) #define dprintk_rcu(fmt, ...) \ dfprintk_rcu(FACILITY, fmt, ##__VA_ARGS__) #define dprintk_rcu_cont(fmt, ...) \ dfprintk_rcu_cont(FACILITY, fmt, ##__VA_ARGS__) #undef ifdebug #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) # define ifdebug(fac) if (unlikely(rpc_debug & RPCDBG_##fac)) # define dfprintk(fac, fmt, ...) \ do { \ ifdebug(fac) \ printk(KERN_DEFAULT fmt, ##__VA_ARGS__); \ } while (0) # define dfprintk_cont(fac, fmt, ...) \ do { \ ifdebug(fac) \ printk(KERN_CONT fmt, ##__VA_ARGS__); \ } while (0) # define dfprintk_rcu(fac, fmt, ...) \ do { \ ifdebug(fac) { \ rcu_read_lock(); \ printk(KERN_DEFAULT fmt, ##__VA_ARGS__); \ rcu_read_unlock(); \ } \ } while (0) # define dfprintk_rcu_cont(fac, fmt, ...) \ do { \ ifdebug(fac) { \ rcu_read_lock(); \ printk(KERN_CONT fmt, ##__VA_ARGS__); \ rcu_read_unlock(); \ } \ } while (0) # define RPC_IFDEBUG(x) x #else # define ifdebug(fac) if (0) # define dfprintk(fac, fmt, ...) do {} while (0) # define dfprintk_cont(fac, fmt, ...) do {} while (0) # define dfprintk_rcu(fac, fmt, ...) do {} while (0) # define RPC_IFDEBUG(x) #endif /* * Sysctl interface for RPC debugging */ struct rpc_clnt; struct rpc_xprt; #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) void rpc_register_sysctl(void); void rpc_unregister_sysctl(void); void sunrpc_debugfs_init(void); void sunrpc_debugfs_exit(void); void rpc_clnt_debugfs_register(struct rpc_clnt *); void rpc_clnt_debugfs_unregister(struct rpc_clnt *); void rpc_xprt_debugfs_register(struct rpc_xprt *); void rpc_xprt_debugfs_unregister(struct rpc_xprt *); #else static inline void sunrpc_debugfs_init(void) { return; } static inline void sunrpc_debugfs_exit(void) { return; } static inline void rpc_clnt_debugfs_register(struct rpc_clnt *clnt) { return; } static inline void rpc_clnt_debugfs_unregister(struct rpc_clnt *clnt) { return; } static inline void rpc_xprt_debugfs_register(struct rpc_xprt *xprt) { return; } static inline void rpc_xprt_debugfs_unregister(struct rpc_xprt *xprt) { return; } #endif #endif /* _LINUX_SUNRPC_DEBUG_H_ */ PK ! >�ֻ � sunrpc/metrics.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/metrics.h * * Declarations for RPC client per-operation metrics * * Copyright (C) 2005 Chuck Lever <cel@netapp.com> * * RPC client per-operation statistics provide latency and retry * information about each type of RPC procedure in a given RPC program. * These statistics are not for detailed problem diagnosis, but simply * to indicate whether the problem is local or remote. * * These counters are not meant to be human-readable, but are meant to be * integrated into system monitoring tools such as "sar" and "iostat". As * such, the counters are sampled by the tools over time, and are never * zeroed after a file system is mounted. Moving averages can be computed * by the tools by taking the difference between two instantaneous samples * and dividing that by the time between the samples. * * The counters are maintained in a single array per RPC client, indexed * by procedure number. There is no need to maintain separate counter * arrays per-CPU because these counters are always modified behind locks. */ #ifndef _LINUX_SUNRPC_METRICS_H #define _LINUX_SUNRPC_METRICS_H #include <linux/seq_file.h> #include <linux/ktime.h> #include <linux/spinlock.h> #define RPC_IOSTATS_VERS "1.1" struct rpc_iostats { spinlock_t om_lock; /* * These counters give an idea about how many request * transmissions are required, on average, to complete that * particular procedure. Some procedures may require more * than one transmission because the server is unresponsive, * the client is retransmitting too aggressively, or the * requests are large and the network is congested. */ unsigned long om_ops, /* count of operations */ om_ntrans, /* count of RPC transmissions */ om_timeouts; /* count of major timeouts */ /* * These count how many bytes are sent and received for a * given RPC procedure type. This indicates how much load a * particular procedure is putting on the network. These * counts include the RPC and ULP headers, and the request * payload. */ unsigned long long om_bytes_sent, /* count of bytes out */ om_bytes_recv; /* count of bytes in */ /* * The length of time an RPC request waits in queue before * transmission, the network + server latency of the request, * and the total time the request spent from init to release * are measured. */ ktime_t om_queue, /* queued for xmit */ om_rtt, /* RPC RTT */ om_execute; /* RPC execution */ /* * The count of operations that complete with tk_status < 0. * These statuses usually indicate error conditions. */ unsigned long om_error_status; } ____cacheline_aligned; struct rpc_task; struct rpc_clnt; /* * EXPORTed functions for managing rpc_iostats structures */ #ifdef CONFIG_PROC_FS struct rpc_iostats * rpc_alloc_iostats(struct rpc_clnt *); void rpc_count_iostats(const struct rpc_task *, struct rpc_iostats *); void rpc_count_iostats_metrics(const struct rpc_task *, struct rpc_iostats *); void rpc_clnt_show_stats(struct seq_file *, struct rpc_clnt *); void rpc_free_iostats(struct rpc_iostats *); #else /* CONFIG_PROC_FS */ static inline struct rpc_iostats *rpc_alloc_iostats(struct rpc_clnt *clnt) { return NULL; } static inline void rpc_count_iostats(const struct rpc_task *task, struct rpc_iostats *stats) {} static inline void rpc_count_iostats_metrics(const struct rpc_task *task, struct rpc_iostats *stats) { } static inline void rpc_clnt_show_stats(struct seq_file *seq, struct rpc_clnt *clnt) {} static inline void rpc_free_iostats(struct rpc_iostats *stats) {} #endif /* CONFIG_PROC_FS */ #endif /* _LINUX_SUNRPC_METRICS_H */ PK ! ��f sunrpc/svcauth_gss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/svcauth_gss.h * * Bruce Fields <bfields@umich.edu> * Copyright (c) 2002 The Regents of the University of Michigan */ #ifndef _LINUX_SUNRPC_SVCAUTH_GSS_H #define _LINUX_SUNRPC_SVCAUTH_GSS_H #include <linux/sched.h> #include <linux/sunrpc/types.h> #include <linux/sunrpc/xdr.h> #include <linux/sunrpc/svcauth.h> #include <linux/sunrpc/svcsock.h> #include <linux/sunrpc/auth_gss.h> int gss_svc_init(void); void gss_svc_shutdown(void); int gss_svc_init_net(struct net *net); void gss_svc_shutdown_net(struct net *net); struct auth_domain *svcauth_gss_register_pseudoflavor(u32 pseudoflavor, char *name); u32 svcauth_gss_flavor(struct auth_domain *dom); #endif /* _LINUX_SUNRPC_SVCAUTH_GSS_H */ PK ! �� sunrpc/stats.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/stats.h * * Client statistics collection for SUN RPC * * Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_STATS_H #define _LINUX_SUNRPC_STATS_H #include <linux/proc_fs.h> struct rpc_stat { const struct rpc_program *program; unsigned int netcnt, netudpcnt, nettcpcnt, nettcpconn, netreconn; unsigned int rpccnt, rpcretrans, rpcauthrefresh, rpcgarbage; }; struct svc_stat { struct svc_program * program; unsigned int netcnt, netudpcnt, nettcpcnt, nettcpconn; unsigned int rpccnt, rpcbadfmt, rpcbadauth, rpcbadclnt; }; struct net; #ifdef CONFIG_PROC_FS int rpc_proc_init(struct net *); void rpc_proc_exit(struct net *); #else static inline int rpc_proc_init(struct net *net) { return 0; } static inline void rpc_proc_exit(struct net *net) { } #endif #ifdef MODULE void rpc_modcount(struct inode *, int); #endif #ifdef CONFIG_PROC_FS struct proc_dir_entry * rpc_proc_register(struct net *,struct rpc_stat *); void rpc_proc_unregister(struct net *,const char *); void rpc_proc_zero(const struct rpc_program *); struct proc_dir_entry * svc_proc_register(struct net *, struct svc_stat *, const struct proc_ops *); void svc_proc_unregister(struct net *, const char *); void svc_seq_show(struct seq_file *, const struct svc_stat *); #else static inline struct proc_dir_entry *rpc_proc_register(struct net *net, struct rpc_stat *s) { return NULL; } static inline void rpc_proc_unregister(struct net *net, const char *p) {} static inline void rpc_proc_zero(const struct rpc_program *p) {} static inline struct proc_dir_entry *svc_proc_register(struct net *net, struct svc_stat *s, const struct proc_ops *proc_ops) { return NULL; } static inline void svc_proc_unregister(struct net *net, const char *p) {} static inline void svc_seq_show(struct seq_file *seq, const struct svc_stat *st) {} #endif #endif /* _LINUX_SUNRPC_STATS_H */ PK ! QE2�y+ y+ sunrpc/gss_krb5.hnu �[��� /* * linux/include/linux/sunrpc/gss_krb5_types.h * * Adapted from MIT Kerberos 5-1.2.1 lib/include/krb5.h, * lib/gssapi/krb5/gssapiP_krb5.h, and others * * Copyright (c) 2000-2008 The Regents of the University of Michigan. * All rights reserved. * * Andy Adamson <andros@umich.edu> * Bruce Fields <bfields@umich.edu> */ /* * Copyright 1995 by the Massachusetts Institute of Technology. * All Rights Reserved. * * Export of this software from the United States of America may * require a specific license from the United States Government. * It is the responsibility of any person or organization contemplating * export to obtain such a license before exporting. * * WITHIN THAT CONSTRAINT, permission to use, copy, modify, and * distribute this software and its documentation for any purpose and * without fee is hereby granted, provided that the above copyright * notice appear in all copies and that both that copyright notice and * this permission notice appear in supporting documentation, and that * the name of M.I.T. not be used in advertising or publicity pertaining * to distribution of the software without specific, written prior * permission. Furthermore if you modify this software you must label * your software as modified software and not distribute it in such a * fashion that it might be confused with the original M.I.T. software. * M.I.T. makes no representations about the suitability of * this software for any purpose. It is provided "as is" without express * or implied warranty. * */ #include <crypto/skcipher.h> #include <linux/sunrpc/auth_gss.h> #include <linux/sunrpc/gss_err.h> #include <linux/sunrpc/gss_asn1.h> /* Length of constant used in key derivation */ #define GSS_KRB5_K5CLENGTH (5) /* Maximum key length (in bytes) for the supported crypto algorithms*/ #define GSS_KRB5_MAX_KEYLEN (32) /* Maximum checksum function output for the supported crypto algorithms */ #define GSS_KRB5_MAX_CKSUM_LEN (20) /* Maximum blocksize for the supported crypto algorithms */ #define GSS_KRB5_MAX_BLOCKSIZE (16) struct krb5_ctx; struct gss_krb5_enctype { const u32 etype; /* encryption (key) type */ const u32 ctype; /* checksum type */ const char *name; /* "friendly" name */ const char *encrypt_name; /* crypto encrypt name */ const char *cksum_name; /* crypto checksum name */ const u16 signalg; /* signing algorithm */ const u16 sealalg; /* sealing algorithm */ const u32 blocksize; /* encryption blocksize */ const u32 conflen; /* confounder length (normally the same as the blocksize) */ const u32 cksumlength; /* checksum length */ const u32 keyed_cksum; /* is it a keyed cksum? */ const u32 keybytes; /* raw key len, in bytes */ const u32 keylength; /* final key len, in bytes */ u32 (*encrypt) (struct crypto_sync_skcipher *tfm, void *iv, void *in, void *out, int length); /* encryption function */ u32 (*decrypt) (struct crypto_sync_skcipher *tfm, void *iv, void *in, void *out, int length); /* decryption function */ u32 (*mk_key) (const struct gss_krb5_enctype *gk5e, struct xdr_netobj *in, struct xdr_netobj *out); /* complete key generation */ u32 (*encrypt_v2) (struct krb5_ctx *kctx, u32 offset, struct xdr_buf *buf, struct page **pages); /* v2 encryption function */ u32 (*decrypt_v2) (struct krb5_ctx *kctx, u32 offset, u32 len, struct xdr_buf *buf, u32 *headskip, u32 *tailskip); /* v2 decryption function */ }; /* krb5_ctx flags definitions */ #define KRB5_CTX_FLAG_INITIATOR 0x00000001 #define KRB5_CTX_FLAG_CFX 0x00000002 #define KRB5_CTX_FLAG_ACCEPTOR_SUBKEY 0x00000004 struct krb5_ctx { int initiate; /* 1 = initiating, 0 = accepting */ u32 enctype; u32 flags; const struct gss_krb5_enctype *gk5e; /* enctype-specific info */ struct crypto_sync_skcipher *enc; struct crypto_sync_skcipher *seq; struct crypto_sync_skcipher *acceptor_enc; struct crypto_sync_skcipher *initiator_enc; struct crypto_sync_skcipher *acceptor_enc_aux; struct crypto_sync_skcipher *initiator_enc_aux; u8 Ksess[GSS_KRB5_MAX_KEYLEN]; /* session key */ u8 cksum[GSS_KRB5_MAX_KEYLEN]; atomic_t seq_send; atomic64_t seq_send64; time64_t endtime; struct xdr_netobj mech_used; u8 initiator_sign[GSS_KRB5_MAX_KEYLEN]; u8 acceptor_sign[GSS_KRB5_MAX_KEYLEN]; u8 initiator_seal[GSS_KRB5_MAX_KEYLEN]; u8 acceptor_seal[GSS_KRB5_MAX_KEYLEN]; u8 initiator_integ[GSS_KRB5_MAX_KEYLEN]; u8 acceptor_integ[GSS_KRB5_MAX_KEYLEN]; }; /* The length of the Kerberos GSS token header */ #define GSS_KRB5_TOK_HDR_LEN (16) #define KG_TOK_MIC_MSG 0x0101 #define KG_TOK_WRAP_MSG 0x0201 #define KG2_TOK_INITIAL 0x0101 #define KG2_TOK_RESPONSE 0x0202 #define KG2_TOK_MIC 0x0404 #define KG2_TOK_WRAP 0x0504 #define KG2_TOKEN_FLAG_SENTBYACCEPTOR 0x01 #define KG2_TOKEN_FLAG_SEALED 0x02 #define KG2_TOKEN_FLAG_ACCEPTORSUBKEY 0x04 #define KG2_RESP_FLAG_ERROR 0x0001 #define KG2_RESP_FLAG_DELEG_OK 0x0002 enum sgn_alg { SGN_ALG_DES_MAC_MD5 = 0x0000, SGN_ALG_MD2_5 = 0x0001, SGN_ALG_DES_MAC = 0x0002, SGN_ALG_3 = 0x0003, /* not published */ SGN_ALG_HMAC_SHA1_DES3_KD = 0x0004 }; enum seal_alg { SEAL_ALG_NONE = 0xffff, SEAL_ALG_DES = 0x0000, SEAL_ALG_1 = 0x0001, /* not published */ SEAL_ALG_DES3KD = 0x0002 }; #define CKSUMTYPE_CRC32 0x0001 #define CKSUMTYPE_RSA_MD4 0x0002 #define CKSUMTYPE_RSA_MD4_DES 0x0003 #define CKSUMTYPE_DESCBC 0x0004 #define CKSUMTYPE_RSA_MD5 0x0007 #define CKSUMTYPE_RSA_MD5_DES 0x0008 #define CKSUMTYPE_NIST_SHA 0x0009 #define CKSUMTYPE_HMAC_SHA1_DES3 0x000c #define CKSUMTYPE_HMAC_SHA1_96_AES128 0x000f #define CKSUMTYPE_HMAC_SHA1_96_AES256 0x0010 #define CKSUMTYPE_HMAC_MD5_ARCFOUR -138 /* Microsoft md5 hmac cksumtype */ /* from gssapi_err_krb5.h */ #define KG_CCACHE_NOMATCH (39756032L) #define KG_KEYTAB_NOMATCH (39756033L) #define KG_TGT_MISSING (39756034L) #define KG_NO_SUBKEY (39756035L) #define KG_CONTEXT_ESTABLISHED (39756036L) #define KG_BAD_SIGN_TYPE (39756037L) #define KG_BAD_LENGTH (39756038L) #define KG_CTX_INCOMPLETE (39756039L) #define KG_CONTEXT (39756040L) #define KG_CRED (39756041L) #define KG_ENC_DESC (39756042L) #define KG_BAD_SEQ (39756043L) #define KG_EMPTY_CCACHE (39756044L) #define KG_NO_CTYPES (39756045L) /* per Kerberos v5 protocol spec crypto types from the wire. * these get mapped to linux kernel crypto routines. */ #define ENCTYPE_NULL 0x0000 #define ENCTYPE_DES_CBC_CRC 0x0001 /* DES cbc mode with CRC-32 */ #define ENCTYPE_DES_CBC_MD4 0x0002 /* DES cbc mode with RSA-MD4 */ #define ENCTYPE_DES_CBC_MD5 0x0003 /* DES cbc mode with RSA-MD5 */ #define ENCTYPE_DES_CBC_RAW 0x0004 /* DES cbc mode raw */ /* XXX deprecated? */ #define ENCTYPE_DES3_CBC_SHA 0x0005 /* DES-3 cbc mode with NIST-SHA */ #define ENCTYPE_DES3_CBC_RAW 0x0006 /* DES-3 cbc mode raw */ #define ENCTYPE_DES_HMAC_SHA1 0x0008 #define ENCTYPE_DES3_CBC_SHA1 0x0010 #define ENCTYPE_AES128_CTS_HMAC_SHA1_96 0x0011 #define ENCTYPE_AES256_CTS_HMAC_SHA1_96 0x0012 #define ENCTYPE_ARCFOUR_HMAC 0x0017 #define ENCTYPE_ARCFOUR_HMAC_EXP 0x0018 #define ENCTYPE_UNKNOWN 0x01ff /* * Constants used for key derivation */ /* for 3DES */ #define KG_USAGE_SEAL (22) #define KG_USAGE_SIGN (23) #define KG_USAGE_SEQ (24) /* from rfc3961 */ #define KEY_USAGE_SEED_CHECKSUM (0x99) #define KEY_USAGE_SEED_ENCRYPTION (0xAA) #define KEY_USAGE_SEED_INTEGRITY (0x55) /* from rfc4121 */ #define KG_USAGE_ACCEPTOR_SEAL (22) #define KG_USAGE_ACCEPTOR_SIGN (23) #define KG_USAGE_INITIATOR_SEAL (24) #define KG_USAGE_INITIATOR_SIGN (25) /* * This compile-time check verifies that we will not exceed the * slack space allotted by the client and server auth_gss code * before they call gss_wrap(). */ #define GSS_KRB5_MAX_SLACK_NEEDED \ (GSS_KRB5_TOK_HDR_LEN /* gss token header */ \ + GSS_KRB5_MAX_CKSUM_LEN /* gss token checksum */ \ + GSS_KRB5_MAX_BLOCKSIZE /* confounder */ \ + GSS_KRB5_MAX_BLOCKSIZE /* possible padding */ \ + GSS_KRB5_TOK_HDR_LEN /* encrypted hdr in v2 token */\ + GSS_KRB5_MAX_CKSUM_LEN /* encryption hmac */ \ + 4 + 4 /* RPC verifier */ \ + GSS_KRB5_TOK_HDR_LEN \ + GSS_KRB5_MAX_CKSUM_LEN) u32 make_checksum(struct krb5_ctx *kctx, char *header, int hdrlen, struct xdr_buf *body, int body_offset, u8 *cksumkey, unsigned int usage, struct xdr_netobj *cksumout); u32 make_checksum_v2(struct krb5_ctx *, char *header, int hdrlen, struct xdr_buf *body, int body_offset, u8 *key, unsigned int usage, struct xdr_netobj *cksum); u32 gss_get_mic_kerberos(struct gss_ctx *, struct xdr_buf *, struct xdr_netobj *); u32 gss_verify_mic_kerberos(struct gss_ctx *, struct xdr_buf *, struct xdr_netobj *); u32 gss_wrap_kerberos(struct gss_ctx *ctx_id, int offset, struct xdr_buf *outbuf, struct page **pages); u32 gss_unwrap_kerberos(struct gss_ctx *ctx_id, int offset, int len, struct xdr_buf *buf); u32 krb5_encrypt(struct crypto_sync_skcipher *key, void *iv, void *in, void *out, int length); u32 krb5_decrypt(struct crypto_sync_skcipher *key, void *iv, void *in, void *out, int length); int gss_encrypt_xdr_buf(struct crypto_sync_skcipher *tfm, struct xdr_buf *outbuf, int offset, struct page **pages); int gss_decrypt_xdr_buf(struct crypto_sync_skcipher *tfm, struct xdr_buf *inbuf, int offset); s32 krb5_make_seq_num(struct krb5_ctx *kctx, struct crypto_sync_skcipher *key, int direction, u32 seqnum, unsigned char *cksum, unsigned char *buf); s32 krb5_get_seq_num(struct krb5_ctx *kctx, unsigned char *cksum, unsigned char *buf, int *direction, u32 *seqnum); int xdr_extend_head(struct xdr_buf *buf, unsigned int base, unsigned int shiftlen); u32 krb5_derive_key(const struct gss_krb5_enctype *gk5e, const struct xdr_netobj *inkey, struct xdr_netobj *outkey, const struct xdr_netobj *in_constant, gfp_t gfp_mask); u32 gss_krb5_des3_make_key(const struct gss_krb5_enctype *gk5e, struct xdr_netobj *randombits, struct xdr_netobj *key); u32 gss_krb5_aes_make_key(const struct gss_krb5_enctype *gk5e, struct xdr_netobj *randombits, struct xdr_netobj *key); u32 gss_krb5_aes_encrypt(struct krb5_ctx *kctx, u32 offset, struct xdr_buf *buf, struct page **pages); u32 gss_krb5_aes_decrypt(struct krb5_ctx *kctx, u32 offset, u32 len, struct xdr_buf *buf, u32 *plainoffset, u32 *plainlen); void gss_krb5_make_confounder(char *p, u32 conflen); PK ! ;L�� � sunrpc/timer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/timer.h * * Declarations for the RPC transport timer. * * Copyright (C) 2002 Trond Myklebust <trond.myklebust@fys.uio.no> */ #ifndef _LINUX_SUNRPC_TIMER_H #define _LINUX_SUNRPC_TIMER_H #include <linux/atomic.h> struct rpc_rtt { unsigned long timeo; /* default timeout value */ unsigned long srtt[5]; /* smoothed round trip time << 3 */ unsigned long sdrtt[5]; /* smoothed medium deviation of RTT */ int ntimeouts[5]; /* Number of timeouts for the last request */ }; extern void rpc_init_rtt(struct rpc_rtt *rt, unsigned long timeo); extern void rpc_update_rtt(struct rpc_rtt *rt, unsigned timer, long m); extern unsigned long rpc_calc_rto(struct rpc_rtt *rt, unsigned timer); static inline void rpc_set_timeo(struct rpc_rtt *rt, int timer, int ntimeo) { int *t; if (!timer) return; t = &rt->ntimeouts[timer-1]; if (ntimeo < *t) { if (*t > 0) (*t)--; } else { if (ntimeo > 8) ntimeo = 8; *t = ntimeo; } } static inline int rpc_ntimeo(struct rpc_rtt *rt, int timer) { if (!timer) return 0; return rt->ntimeouts[timer-1]; } #endif /* _LINUX_SUNRPC_TIMER_H */ PK ! 6�A�> �> sunrpc/xprt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/xprt.h * * Declarations for the RPC transport interface. * * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_XPRT_H #define _LINUX_SUNRPC_XPRT_H #include <linux/uio.h> #include <linux/socket.h> #include <linux/in.h> #include <linux/ktime.h> #include <linux/kref.h> #include <linux/sunrpc/sched.h> #include <linux/sunrpc/xdr.h> #include <linux/sunrpc/msg_prot.h> #define RPC_MIN_SLOT_TABLE (2U) #define RPC_DEF_SLOT_TABLE (16U) #define RPC_MAX_SLOT_TABLE_LIMIT (65536U) #define RPC_MAX_SLOT_TABLE RPC_MAX_SLOT_TABLE_LIMIT #define RPC_CWNDSHIFT (8U) #define RPC_CWNDSCALE (1U << RPC_CWNDSHIFT) #define RPC_INITCWND RPC_CWNDSCALE #define RPC_MAXCWND(xprt) ((xprt)->max_reqs << RPC_CWNDSHIFT) #define RPCXPRT_CONGESTED(xprt) ((xprt)->cong >= (xprt)->cwnd) /* * This describes a timeout strategy */ struct rpc_timeout { unsigned long to_initval, /* initial timeout */ to_maxval, /* max timeout */ to_increment; /* if !exponential */ unsigned int to_retries; /* max # of retries */ unsigned char to_exponential; }; enum rpc_display_format_t { RPC_DISPLAY_ADDR = 0, RPC_DISPLAY_PORT, RPC_DISPLAY_PROTO, RPC_DISPLAY_HEX_ADDR, RPC_DISPLAY_HEX_PORT, RPC_DISPLAY_NETID, RPC_DISPLAY_MAX, }; struct rpc_task; struct rpc_xprt; struct xprt_class; struct seq_file; struct svc_serv; struct net; /* * This describes a complete RPC request */ struct rpc_rqst { /* * This is the user-visible part */ struct rpc_xprt * rq_xprt; /* RPC client */ struct xdr_buf rq_snd_buf; /* send buffer */ struct xdr_buf rq_rcv_buf; /* recv buffer */ /* * This is the private part */ struct rpc_task * rq_task; /* RPC task data */ struct rpc_cred * rq_cred; /* Bound cred */ __be32 rq_xid; /* request XID */ int rq_cong; /* has incremented xprt->cong */ u32 rq_seqno; /* gss seq no. used on req. */ int rq_enc_pages_num; struct page **rq_enc_pages; /* scratch pages for use by gss privacy code */ void (*rq_release_snd_buf)(struct rpc_rqst *); /* release rq_enc_pages */ union { struct list_head rq_list; /* Slot allocation list */ struct rb_node rq_recv; /* Receive queue */ }; struct list_head rq_xmit; /* Send queue */ struct list_head rq_xmit2; /* Send queue */ void *rq_buffer; /* Call XDR encode buffer */ size_t rq_callsize; void *rq_rbuffer; /* Reply XDR decode buffer */ size_t rq_rcvsize; size_t rq_xmit_bytes_sent; /* total bytes sent */ size_t rq_reply_bytes_recvd; /* total reply bytes */ /* received */ struct xdr_buf rq_private_buf; /* The receive buffer * used in the softirq. */ unsigned long rq_majortimeo; /* major timeout alarm */ unsigned long rq_minortimeo; /* minor timeout alarm */ unsigned long rq_timeout; /* Current timeout value */ ktime_t rq_rtt; /* round-trip time */ unsigned int rq_retries; /* # of retries */ unsigned int rq_connect_cookie; /* A cookie used to track the state of the transport connection */ atomic_t rq_pin; /* * Partial send handling */ u32 rq_bytes_sent; /* Bytes we have sent */ ktime_t rq_xtime; /* transmit time stamp */ int rq_ntrans; #if defined(CONFIG_SUNRPC_BACKCHANNEL) struct list_head rq_bc_list; /* Callback service list */ unsigned long rq_bc_pa_state; /* Backchannel prealloc state */ struct list_head rq_bc_pa_list; /* Backchannel prealloc list */ #endif /* CONFIG_SUNRPC_BACKCHANEL */ }; #define rq_svec rq_snd_buf.head #define rq_slen rq_snd_buf.len struct rpc_xprt_ops { void (*set_buffer_size)(struct rpc_xprt *xprt, size_t sndsize, size_t rcvsize); int (*reserve_xprt)(struct rpc_xprt *xprt, struct rpc_task *task); void (*release_xprt)(struct rpc_xprt *xprt, struct rpc_task *task); void (*alloc_slot)(struct rpc_xprt *xprt, struct rpc_task *task); void (*free_slot)(struct rpc_xprt *xprt, struct rpc_rqst *req); void (*rpcbind)(struct rpc_task *task); void (*set_port)(struct rpc_xprt *xprt, unsigned short port); void (*connect)(struct rpc_xprt *xprt, struct rpc_task *task); int (*buf_alloc)(struct rpc_task *task); void (*buf_free)(struct rpc_task *task); void (*prepare_request)(struct rpc_rqst *req); int (*send_request)(struct rpc_rqst *req); void (*wait_for_reply_request)(struct rpc_task *task); void (*timer)(struct rpc_xprt *xprt, struct rpc_task *task); void (*release_request)(struct rpc_task *task); void (*close)(struct rpc_xprt *xprt); void (*destroy)(struct rpc_xprt *xprt); void (*set_connect_timeout)(struct rpc_xprt *xprt, unsigned long connect_timeout, unsigned long reconnect_timeout); void (*print_stats)(struct rpc_xprt *xprt, struct seq_file *seq); int (*enable_swap)(struct rpc_xprt *xprt); void (*disable_swap)(struct rpc_xprt *xprt); void (*inject_disconnect)(struct rpc_xprt *xprt); int (*bc_setup)(struct rpc_xprt *xprt, unsigned int min_reqs); size_t (*bc_maxpayload)(struct rpc_xprt *xprt); unsigned int (*bc_num_slots)(struct rpc_xprt *xprt); void (*bc_free_rqst)(struct rpc_rqst *rqst); void (*bc_destroy)(struct rpc_xprt *xprt, unsigned int max_reqs); }; /* * RPC transport identifiers * * To preserve compatibility with the historical use of raw IP protocol * id's for transport selection, UDP and TCP identifiers are specified * with the previous values. No such restriction exists for new transports, * except that they may not collide with these values (17 and 6, * respectively). */ #define XPRT_TRANSPORT_BC (1 << 31) enum xprt_transports { XPRT_TRANSPORT_UDP = IPPROTO_UDP, XPRT_TRANSPORT_TCP = IPPROTO_TCP, XPRT_TRANSPORT_BC_TCP = IPPROTO_TCP | XPRT_TRANSPORT_BC, XPRT_TRANSPORT_RDMA = 256, XPRT_TRANSPORT_BC_RDMA = XPRT_TRANSPORT_RDMA | XPRT_TRANSPORT_BC, XPRT_TRANSPORT_LOCAL = 257, }; struct rpc_sysfs_xprt; struct rpc_xprt { struct kref kref; /* Reference count */ const struct rpc_xprt_ops *ops; /* transport methods */ unsigned int id; /* transport id */ const struct rpc_timeout *timeout; /* timeout parms */ struct sockaddr_storage addr; /* server address */ size_t addrlen; /* size of server address */ int prot; /* IP protocol */ unsigned long cong; /* current congestion */ unsigned long cwnd; /* congestion window */ size_t max_payload; /* largest RPC payload size, in bytes */ struct rpc_wait_queue binding; /* requests waiting on rpcbind */ struct rpc_wait_queue sending; /* requests waiting to send */ struct rpc_wait_queue pending; /* requests in flight */ struct rpc_wait_queue backlog; /* waiting for slot */ struct list_head free; /* free slots */ unsigned int max_reqs; /* max number of slots */ unsigned int min_reqs; /* min number of slots */ unsigned int num_reqs; /* total slots */ unsigned long state; /* transport state */ unsigned char resvport : 1, /* use a reserved port */ reuseport : 1; /* reuse port on reconnect */ atomic_t swapper; /* we're swapping over this transport */ unsigned int bind_index; /* bind function index */ /* * Multipath */ struct list_head xprt_switch; /* * Connection of transports */ unsigned long bind_timeout, reestablish_timeout; unsigned int connect_cookie; /* A cookie that gets bumped every time the transport is reconnected */ /* * Disconnection of idle transports */ struct work_struct task_cleanup; struct timer_list timer; unsigned long last_used, idle_timeout, connect_timeout, max_reconnect_timeout; /* * Send stuff */ atomic_long_t queuelen; spinlock_t transport_lock; /* lock transport info */ spinlock_t reserve_lock; /* lock slot table */ spinlock_t queue_lock; /* send/receive queue lock */ u32 xid; /* Next XID value to use */ struct rpc_task * snd_task; /* Task blocked in send */ struct list_head xmit_queue; /* Send queue */ atomic_long_t xmit_queuelen; struct svc_xprt *bc_xprt; /* NFSv4.1 backchannel */ #if defined(CONFIG_SUNRPC_BACKCHANNEL) struct svc_serv *bc_serv; /* The RPC service which will */ /* process the callback */ unsigned int bc_alloc_max; unsigned int bc_alloc_count; /* Total number of preallocs */ atomic_t bc_slot_count; /* Number of allocated slots */ spinlock_t bc_pa_lock; /* Protects the preallocated * items */ struct list_head bc_pa_list; /* List of preallocated * backchannel rpc_rqst's */ #endif /* CONFIG_SUNRPC_BACKCHANNEL */ struct rb_root recv_queue; /* Receive queue */ struct { unsigned long bind_count, /* total number of binds */ connect_count, /* total number of connects */ connect_start, /* connect start timestamp */ connect_time, /* jiffies waiting for connect */ sends, /* how many complete requests */ recvs, /* how many complete requests */ bad_xids, /* lookup_rqst didn't find XID */ max_slots; /* max rpc_slots used */ unsigned long long req_u, /* average requests on the wire */ bklog_u, /* backlog queue utilization */ sending_u, /* send q utilization */ pending_u; /* pend q utilization */ } stat; struct net *xprt_net; const char *servername; const char *address_strings[RPC_DISPLAY_MAX]; #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) struct dentry *debugfs; /* debugfs directory */ #endif struct rcu_head rcu; const struct xprt_class *xprt_class; struct rpc_sysfs_xprt *xprt_sysfs; bool main; /*mark if this is the 1st transport */ }; #if defined(CONFIG_SUNRPC_BACKCHANNEL) /* * Backchannel flags */ #define RPC_BC_PA_IN_USE 0x0001 /* Preallocated backchannel */ /* buffer in use */ #endif /* CONFIG_SUNRPC_BACKCHANNEL */ #if defined(CONFIG_SUNRPC_BACKCHANNEL) static inline int bc_prealloc(struct rpc_rqst *req) { return test_bit(RPC_BC_PA_IN_USE, &req->rq_bc_pa_state); } #else static inline int bc_prealloc(struct rpc_rqst *req) { return 0; } #endif /* CONFIG_SUNRPC_BACKCHANNEL */ #define XPRT_CREATE_INFINITE_SLOTS (1U) #define XPRT_CREATE_NO_IDLE_TIMEOUT (1U << 1) struct xprt_create { int ident; /* XPRT_TRANSPORT identifier */ struct net * net; struct sockaddr * srcaddr; /* optional local address */ struct sockaddr * dstaddr; /* remote peer address */ size_t addrlen; const char *servername; struct svc_xprt *bc_xprt; /* NFSv4.1 backchannel */ struct rpc_xprt_switch *bc_xps; unsigned int flags; }; struct xprt_class { struct list_head list; int ident; /* XPRT_TRANSPORT identifier */ struct rpc_xprt * (*setup)(struct xprt_create *); struct module *owner; char name[32]; const char * netid[]; }; /* * Generic internal transport functions */ struct rpc_xprt *xprt_create_transport(struct xprt_create *args); void xprt_connect(struct rpc_task *task); unsigned long xprt_reconnect_delay(const struct rpc_xprt *xprt); void xprt_reconnect_backoff(struct rpc_xprt *xprt, unsigned long init_to); void xprt_reserve(struct rpc_task *task); void xprt_retry_reserve(struct rpc_task *task); int xprt_reserve_xprt(struct rpc_xprt *xprt, struct rpc_task *task); int xprt_reserve_xprt_cong(struct rpc_xprt *xprt, struct rpc_task *task); void xprt_alloc_slot(struct rpc_xprt *xprt, struct rpc_task *task); void xprt_free_slot(struct rpc_xprt *xprt, struct rpc_rqst *req); void xprt_request_prepare(struct rpc_rqst *req); bool xprt_prepare_transmit(struct rpc_task *task); void xprt_request_enqueue_transmit(struct rpc_task *task); void xprt_request_enqueue_receive(struct rpc_task *task); void xprt_request_wait_receive(struct rpc_task *task); void xprt_request_dequeue_xprt(struct rpc_task *task); bool xprt_request_need_retransmit(struct rpc_task *task); void xprt_transmit(struct rpc_task *task); void xprt_end_transmit(struct rpc_task *task); int xprt_adjust_timeout(struct rpc_rqst *req); void xprt_release_xprt(struct rpc_xprt *xprt, struct rpc_task *task); void xprt_release_xprt_cong(struct rpc_xprt *xprt, struct rpc_task *task); void xprt_release(struct rpc_task *task); struct rpc_xprt * xprt_get(struct rpc_xprt *xprt); void xprt_put(struct rpc_xprt *xprt); struct rpc_xprt * xprt_alloc(struct net *net, size_t size, unsigned int num_prealloc, unsigned int max_req); void xprt_free(struct rpc_xprt *); void xprt_add_backlog(struct rpc_xprt *xprt, struct rpc_task *task); bool xprt_wake_up_backlog(struct rpc_xprt *xprt, struct rpc_rqst *req); void xprt_cleanup_ids(void); static inline int xprt_enable_swap(struct rpc_xprt *xprt) { return xprt->ops->enable_swap(xprt); } static inline void xprt_disable_swap(struct rpc_xprt *xprt) { xprt->ops->disable_swap(xprt); } /* * Transport switch helper functions */ int xprt_register_transport(struct xprt_class *type); int xprt_unregister_transport(struct xprt_class *type); int xprt_find_transport_ident(const char *); void xprt_wait_for_reply_request_def(struct rpc_task *task); void xprt_wait_for_reply_request_rtt(struct rpc_task *task); void xprt_wake_pending_tasks(struct rpc_xprt *xprt, int status); void xprt_wait_for_buffer_space(struct rpc_xprt *xprt); bool xprt_write_space(struct rpc_xprt *xprt); void xprt_adjust_cwnd(struct rpc_xprt *xprt, struct rpc_task *task, int result); struct rpc_rqst * xprt_lookup_rqst(struct rpc_xprt *xprt, __be32 xid); void xprt_update_rtt(struct rpc_task *task); void xprt_complete_rqst(struct rpc_task *task, int copied); void xprt_pin_rqst(struct rpc_rqst *req); void xprt_unpin_rqst(struct rpc_rqst *req); void xprt_release_rqst_cong(struct rpc_task *task); bool xprt_request_get_cong(struct rpc_xprt *xprt, struct rpc_rqst *req); void xprt_disconnect_done(struct rpc_xprt *xprt); void xprt_force_disconnect(struct rpc_xprt *xprt); void xprt_conditional_disconnect(struct rpc_xprt *xprt, unsigned int cookie); bool xprt_lock_connect(struct rpc_xprt *, struct rpc_task *, void *); void xprt_unlock_connect(struct rpc_xprt *, void *); void xprt_release_write(struct rpc_xprt *, struct rpc_task *); /* * Reserved bit positions in xprt->state */ #define XPRT_LOCKED (0) #define XPRT_CONNECTED (1) #define XPRT_CONNECTING (2) #define XPRT_CLOSE_WAIT (3) #define XPRT_BOUND (4) #define XPRT_BINDING (5) #define XPRT_CLOSING (6) #define XPRT_OFFLINE (7) #define XPRT_REMOVE (8) #define XPRT_CONGESTED (9) #define XPRT_CWND_WAIT (10) #define XPRT_WRITE_SPACE (11) #define XPRT_SND_IS_COOKIE (12) static inline void xprt_set_connected(struct rpc_xprt *xprt) { set_bit(XPRT_CONNECTED, &xprt->state); } static inline void xprt_clear_connected(struct rpc_xprt *xprt) { clear_bit(XPRT_CONNECTED, &xprt->state); } static inline int xprt_connected(struct rpc_xprt *xprt) { return test_bit(XPRT_CONNECTED, &xprt->state); } static inline int xprt_test_and_set_connected(struct rpc_xprt *xprt) { return test_and_set_bit(XPRT_CONNECTED, &xprt->state); } static inline int xprt_test_and_clear_connected(struct rpc_xprt *xprt) { return test_and_clear_bit(XPRT_CONNECTED, &xprt->state); } static inline void xprt_clear_connecting(struct rpc_xprt *xprt) { smp_mb__before_atomic(); clear_bit(XPRT_CONNECTING, &xprt->state); smp_mb__after_atomic(); } static inline int xprt_connecting(struct rpc_xprt *xprt) { return test_bit(XPRT_CONNECTING, &xprt->state); } static inline int xprt_test_and_set_connecting(struct rpc_xprt *xprt) { return test_and_set_bit(XPRT_CONNECTING, &xprt->state); } static inline void xprt_set_bound(struct rpc_xprt *xprt) { test_and_set_bit(XPRT_BOUND, &xprt->state); } static inline int xprt_bound(struct rpc_xprt *xprt) { return test_bit(XPRT_BOUND, &xprt->state); } static inline void xprt_clear_bound(struct rpc_xprt *xprt) { clear_bit(XPRT_BOUND, &xprt->state); } static inline void xprt_clear_binding(struct rpc_xprt *xprt) { smp_mb__before_atomic(); clear_bit(XPRT_BINDING, &xprt->state); smp_mb__after_atomic(); } static inline int xprt_test_and_set_binding(struct rpc_xprt *xprt) { return test_and_set_bit(XPRT_BINDING, &xprt->state); } #endif /* _LINUX_SUNRPC_XPRT_H */ PK ! λ'E� � sunrpc/auth.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * linux/include/linux/sunrpc/auth.h * * Declarations for the RPC client authentication machinery. * * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> */ #ifndef _LINUX_SUNRPC_AUTH_H #define _LINUX_SUNRPC_AUTH_H #include <linux/sunrpc/sched.h> #include <linux/sunrpc/msg_prot.h> #include <linux/sunrpc/xdr.h> #include <linux/atomic.h> #include <linux/rcupdate.h> #include <linux/uidgid.h> #include <linux/utsname.h> /* * Maximum size of AUTH_NONE authentication information, in XDR words. */ #define NUL_CALLSLACK (4) #define NUL_REPLYSLACK (2) /* * Size of the nodename buffer. RFC1831 specifies a hard limit of 255 bytes, * but Linux hostnames are actually limited to __NEW_UTS_LEN bytes. */ #define UNX_MAXNODENAME __NEW_UTS_LEN #define UNX_CALLSLACK (21 + XDR_QUADLEN(UNX_MAXNODENAME)) #define UNX_NGROUPS 16 struct rpcsec_gss_info; struct auth_cred { const struct cred *cred; const char *principal; /* If present, this is a machine credential */ }; /* * Client user credentials */ struct rpc_auth; struct rpc_credops; struct rpc_cred { struct hlist_node cr_hash; /* hash chain */ struct list_head cr_lru; /* lru garbage collection */ struct rcu_head cr_rcu; struct rpc_auth * cr_auth; const struct rpc_credops *cr_ops; unsigned long cr_expire; /* when to gc */ unsigned long cr_flags; /* various flags */ refcount_t cr_count; /* ref count */ const struct cred *cr_cred; /* per-flavor data */ }; #define RPCAUTH_CRED_NEW 0 #define RPCAUTH_CRED_UPTODATE 1 #define RPCAUTH_CRED_HASHED 2 #define RPCAUTH_CRED_NEGATIVE 3 const struct cred *rpc_machine_cred(void); /* * Client authentication handle */ struct rpc_cred_cache; struct rpc_authops; struct rpc_auth { unsigned int au_cslack; /* call cred size estimate */ unsigned int au_rslack; /* reply cred size estimate */ unsigned int au_verfsize; /* size of reply verifier */ unsigned int au_ralign; /* words before UL header */ unsigned long au_flags; const struct rpc_authops *au_ops; rpc_authflavor_t au_flavor; /* pseudoflavor (note may * differ from the flavor in * au_ops->au_flavor in gss * case) */ refcount_t au_count; /* Reference counter */ struct rpc_cred_cache * au_credcache; /* per-flavor data */ }; /* rpc_auth au_flags */ #define RPCAUTH_AUTH_DATATOUCH (1) #define RPCAUTH_AUTH_UPDATE_SLACK (2) struct rpc_auth_create_args { rpc_authflavor_t pseudoflavor; const char *target_name; }; /* Flags for rpcauth_lookupcred() */ #define RPCAUTH_LOOKUP_NEW 0x01 /* Accept an uninitialised cred */ /* * Client authentication ops */ struct rpc_authops { struct module *owner; rpc_authflavor_t au_flavor; /* flavor (RPC_AUTH_*) */ char * au_name; struct rpc_auth * (*create)(const struct rpc_auth_create_args *, struct rpc_clnt *); void (*destroy)(struct rpc_auth *); int (*hash_cred)(struct auth_cred *, unsigned int); struct rpc_cred * (*lookup_cred)(struct rpc_auth *, struct auth_cred *, int); struct rpc_cred * (*crcreate)(struct rpc_auth*, struct auth_cred *, int, gfp_t); rpc_authflavor_t (*info2flavor)(struct rpcsec_gss_info *); int (*flavor2info)(rpc_authflavor_t, struct rpcsec_gss_info *); int (*key_timeout)(struct rpc_auth *, struct rpc_cred *); }; struct rpc_credops { const char * cr_name; /* Name of the auth flavour */ int (*cr_init)(struct rpc_auth *, struct rpc_cred *); void (*crdestroy)(struct rpc_cred *); int (*crmatch)(struct auth_cred *, struct rpc_cred *, int); int (*crmarshal)(struct rpc_task *task, struct xdr_stream *xdr); int (*crrefresh)(struct rpc_task *); int (*crvalidate)(struct rpc_task *task, struct xdr_stream *xdr); int (*crwrap_req)(struct rpc_task *task, struct xdr_stream *xdr); int (*crunwrap_resp)(struct rpc_task *task, struct xdr_stream *xdr); int (*crkey_timeout)(struct rpc_cred *); char * (*crstringify_acceptor)(struct rpc_cred *); bool (*crneed_reencode)(struct rpc_task *); }; extern const struct rpc_authops authunix_ops; extern const struct rpc_authops authnull_ops; int __init rpc_init_authunix(void); int __init rpcauth_init_module(void); void rpcauth_remove_module(void); void rpc_destroy_authunix(void); int rpcauth_register(const struct rpc_authops *); int rpcauth_unregister(const struct rpc_authops *); struct rpc_auth * rpcauth_create(const struct rpc_auth_create_args *, struct rpc_clnt *); void rpcauth_release(struct rpc_auth *); rpc_authflavor_t rpcauth_get_pseudoflavor(rpc_authflavor_t, struct rpcsec_gss_info *); int rpcauth_get_gssinfo(rpc_authflavor_t, struct rpcsec_gss_info *); struct rpc_cred * rpcauth_lookup_credcache(struct rpc_auth *, struct auth_cred *, int, gfp_t); void rpcauth_init_cred(struct rpc_cred *, const struct auth_cred *, struct rpc_auth *, const struct rpc_credops *); struct rpc_cred * rpcauth_lookupcred(struct rpc_auth *, int); void put_rpccred(struct rpc_cred *); int rpcauth_marshcred(struct rpc_task *task, struct xdr_stream *xdr); int rpcauth_checkverf(struct rpc_task *task, struct xdr_stream *xdr); int rpcauth_wrap_req_encode(struct rpc_task *task, struct xdr_stream *xdr); int rpcauth_wrap_req(struct rpc_task *task, struct xdr_stream *xdr); int rpcauth_unwrap_resp_decode(struct rpc_task *task, struct xdr_stream *xdr); int rpcauth_unwrap_resp(struct rpc_task *task, struct xdr_stream *xdr); bool rpcauth_xmit_need_reencode(struct rpc_task *task); int rpcauth_refreshcred(struct rpc_task *); void rpcauth_invalcred(struct rpc_task *); int rpcauth_uptodatecred(struct rpc_task *); int rpcauth_init_credcache(struct rpc_auth *); void rpcauth_destroy_credcache(struct rpc_auth *); void rpcauth_clear_credcache(struct rpc_cred_cache *); char * rpcauth_stringify_acceptor(struct rpc_cred *); static inline struct rpc_cred *get_rpccred(struct rpc_cred *cred) { if (cred != NULL && refcount_inc_not_zero(&cred->cr_count)) return cred; return NULL; } #endif /* _LINUX_SUNRPC_AUTH_H */ PK ! ~&^� � sunrpc/gss_krb5_enctypes.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Define the string that exports the set of kernel-supported * Kerberos enctypes. This list is sent via upcall to gssd, and * is also exposed via the nfsd /proc API. The consumers generally * treat this as an ordered list, where the first item in the list * is the most preferred. */ #ifndef _LINUX_SUNRPC_GSS_KRB5_ENCTYPES_H #define _LINUX_SUNRPC_GSS_KRB5_ENCTYPES_H #ifdef CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES /* * NB: This list includes DES3_CBC_SHA1, which was deprecated by RFC 8429. * * ENCTYPE_AES256_CTS_HMAC_SHA1_96 * ENCTYPE_AES128_CTS_HMAC_SHA1_96 * ENCTYPE_DES3_CBC_SHA1 */ #define KRB5_SUPPORTED_ENCTYPES "18,17,16" #else /* CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES */ /* * NB: This list includes encryption types that were deprecated * by RFC 8429 and RFC 6649. * * ENCTYPE_AES256_CTS_HMAC_SHA1_96 * ENCTYPE_AES128_CTS_HMAC_SHA1_96 * ENCTYPE_DES3_CBC_SHA1 * ENCTYPE_DES_CBC_MD5 * ENCTYPE_DES_CBC_CRC * ENCTYPE_DES_CBC_MD4 */ #define KRB5_SUPPORTED_ENCTYPES "18,17,16,3,1,2" #endif /* CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES */ #endif /* _LINUX_SUNRPC_GSS_KRB5_ENCTYPES_H */ PK ! ��ӈ � sunrpc/svc_rdma_pcl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2020, Oracle and/or its affiliates */ #ifndef SVC_RDMA_PCL_H #define SVC_RDMA_PCL_H #include <linux/list.h> struct svc_rdma_segment { u32 rs_handle; u32 rs_length; u64 rs_offset; }; struct svc_rdma_chunk { struct list_head ch_list; u32 ch_position; u32 ch_length; u32 ch_payload_length; u32 ch_segcount; struct svc_rdma_segment ch_segments[]; }; struct svc_rdma_pcl { unsigned int cl_count; struct list_head cl_chunks; }; /** * pcl_init - Initialize a parsed chunk list * @pcl: parsed chunk list to initialize * */ static inline void pcl_init(struct svc_rdma_pcl *pcl) { INIT_LIST_HEAD(&pcl->cl_chunks); } /** * pcl_is_empty - Return true if parsed chunk list is empty * @pcl: parsed chunk list * */ static inline bool pcl_is_empty(const struct svc_rdma_pcl *pcl) { return list_empty(&pcl->cl_chunks); } /** * pcl_first_chunk - Return first chunk in a parsed chunk list * @pcl: parsed chunk list * * Returns the first chunk in the list, or NULL if the list is empty. */ static inline struct svc_rdma_chunk * pcl_first_chunk(const struct svc_rdma_pcl *pcl) { if (pcl_is_empty(pcl)) return NULL; return list_first_entry(&pcl->cl_chunks, struct svc_rdma_chunk, ch_list); } /** * pcl_next_chunk - Return next chunk in a parsed chunk list * @pcl: a parsed chunk list * @chunk: chunk in @pcl * * Returns the next chunk in the list, or NULL if @chunk is already last. */ static inline struct svc_rdma_chunk * pcl_next_chunk(const struct svc_rdma_pcl *pcl, struct svc_rdma_chunk *chunk) { if (list_is_last(&chunk->ch_list, &pcl->cl_chunks)) return NULL; return list_next_entry(chunk, ch_list); } /** * pcl_for_each_chunk - Iterate over chunks in a parsed chunk list * @pos: the loop cursor * @pcl: a parsed chunk list */ #define pcl_for_each_chunk(pos, pcl) \ for (pos = list_first_entry(&(pcl)->cl_chunks, struct svc_rdma_chunk, ch_list); \ &pos->ch_list != &(pcl)->cl_chunks; \ pos = list_next_entry(pos, ch_list)) /** * pcl_for_each_segment - Iterate over segments in a parsed chunk * @pos: the loop cursor * @chunk: a parsed chunk */ #define pcl_for_each_segment(pos, chunk) \ for (pos = &(chunk)->ch_segments[0]; \ pos <= &(chunk)->ch_segments[(chunk)->ch_segcount - 1]; \ pos++) /** * pcl_chunk_end_offset - Return offset of byte range following @chunk * @chunk: chunk in @pcl * * Returns starting offset of the region just after @chunk */ static inline unsigned int pcl_chunk_end_offset(const struct svc_rdma_chunk *chunk) { return xdr_align_size(chunk->ch_position + chunk->ch_payload_length); } struct svc_rdma_recv_ctxt; extern void pcl_free(struct svc_rdma_pcl *pcl); extern bool pcl_alloc_call(struct svc_rdma_recv_ctxt *rctxt, __be32 *p); extern bool pcl_alloc_read(struct svc_rdma_recv_ctxt *rctxt, __be32 *p); extern bool pcl_alloc_write(struct svc_rdma_recv_ctxt *rctxt, struct svc_rdma_pcl *pcl, __be32 *p); extern int pcl_process_nonpayloads(const struct svc_rdma_pcl *pcl, const struct xdr_buf *xdr, int (*actor)(const struct xdr_buf *, void *), void *data); #endif /* SVC_RDMA_PCL_H */ PK ! �R $� � sunrpc/gss_err.hnu �[��� /* * linux/include/sunrpc/gss_err.h * * Adapted from MIT Kerberos 5-1.2.1 include/gssapi/gssapi.h * * Copyright (c) 2002 The Regents of the University of Michigan. * All rights reserved. * * Andy Adamson <andros@umich.edu> */ /* * Copyright 1993 by OpenVision Technologies, Inc. * * Permission to use, copy, modify, distribute, and sell this software * and its documentation for any purpose is hereby granted without fee, * provided that the above copyright notice appears in all copies and * that both that copyright notice and this permission notice appear in * supporting documentation, and that the name of OpenVision not be used * in advertising or publicity pertaining to distribution of the software * without specific, written prior permission. OpenVision makes no * representations about the suitability of this software for any * purpose. It is provided "as is" without express or implied warranty. * * OPENVISION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL OPENVISION BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #ifndef _LINUX_SUNRPC_GSS_ERR_H #define _LINUX_SUNRPC_GSS_ERR_H typedef unsigned int OM_uint32; /* * Flag bits for context-level services. */ #define GSS_C_DELEG_FLAG 1 #define GSS_C_MUTUAL_FLAG 2 #define GSS_C_REPLAY_FLAG 4 #define GSS_C_SEQUENCE_FLAG 8 #define GSS_C_CONF_FLAG 16 #define GSS_C_INTEG_FLAG 32 #define GSS_C_ANON_FLAG 64 #define GSS_C_PROT_READY_FLAG 128 #define GSS_C_TRANS_FLAG 256 /* * Credential usage options */ #define GSS_C_BOTH 0 #define GSS_C_INITIATE 1 #define GSS_C_ACCEPT 2 /* * Status code types for gss_display_status */ #define GSS_C_GSS_CODE 1 #define GSS_C_MECH_CODE 2 /* * Expiration time of 2^32-1 seconds means infinite lifetime for a * credential or security context */ #define GSS_C_INDEFINITE ((OM_uint32) 0xfffffffful) /* Major status codes */ #define GSS_S_COMPLETE 0 /* * Some "helper" definitions to make the status code macros obvious. */ #define GSS_C_CALLING_ERROR_OFFSET 24 #define GSS_C_ROUTINE_ERROR_OFFSET 16 #define GSS_C_SUPPLEMENTARY_OFFSET 0 #define GSS_C_CALLING_ERROR_MASK ((OM_uint32) 0377ul) #define GSS_C_ROUTINE_ERROR_MASK ((OM_uint32) 0377ul) #define GSS_C_SUPPLEMENTARY_MASK ((OM_uint32) 0177777ul) /* * The macros that test status codes for error conditions. Note that the * GSS_ERROR() macro has changed slightly from the V1 GSSAPI so that it now * evaluates its argument only once. */ #define GSS_CALLING_ERROR(x) \ ((x) & (GSS_C_CALLING_ERROR_MASK << GSS_C_CALLING_ERROR_OFFSET)) #define GSS_ROUTINE_ERROR(x) \ ((x) & (GSS_C_ROUTINE_ERROR_MASK << GSS_C_ROUTINE_ERROR_OFFSET)) #define GSS_SUPPLEMENTARY_INFO(x) \ ((x) & (GSS_C_SUPPLEMENTARY_MASK << GSS_C_SUPPLEMENTARY_OFFSET)) #define GSS_ERROR(x) \ ((x) & ((GSS_C_CALLING_ERROR_MASK << GSS_C_CALLING_ERROR_OFFSET) | \ (GSS_C_ROUTINE_ERROR_MASK << GSS_C_ROUTINE_ERROR_OFFSET))) /* * Now the actual status code definitions */ /* * Calling errors: */ #define GSS_S_CALL_INACCESSIBLE_READ \ (((OM_uint32) 1ul) << GSS_C_CALLING_ERROR_OFFSET) #define GSS_S_CALL_INACCESSIBLE_WRITE \ (((OM_uint32) 2ul) << GSS_C_CALLING_ERROR_OFFSET) #define GSS_S_CALL_BAD_STRUCTURE \ (((OM_uint32) 3ul) << GSS_C_CALLING_ERROR_OFFSET) /* * Routine errors: */ #define GSS_S_BAD_MECH (((OM_uint32) 1ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_BAD_NAME (((OM_uint32) 2ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_BAD_NAMETYPE (((OM_uint32) 3ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_BAD_BINDINGS (((OM_uint32) 4ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_BAD_STATUS (((OM_uint32) 5ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_BAD_SIG (((OM_uint32) 6ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_NO_CRED (((OM_uint32) 7ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_NO_CONTEXT (((OM_uint32) 8ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_DEFECTIVE_TOKEN (((OM_uint32) 9ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_DEFECTIVE_CREDENTIAL \ (((OM_uint32) 10ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_CREDENTIALS_EXPIRED \ (((OM_uint32) 11ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_CONTEXT_EXPIRED \ (((OM_uint32) 12ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_FAILURE (((OM_uint32) 13ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_BAD_QOP (((OM_uint32) 14ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_UNAUTHORIZED (((OM_uint32) 15ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_UNAVAILABLE (((OM_uint32) 16ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_DUPLICATE_ELEMENT \ (((OM_uint32) 17ul) << GSS_C_ROUTINE_ERROR_OFFSET) #define GSS_S_NAME_NOT_MN \ (((OM_uint32) 18ul) << GSS_C_ROUTINE_ERROR_OFFSET) /* * Supplementary info bits: */ #define GSS_S_CONTINUE_NEEDED (1 << (GSS_C_SUPPLEMENTARY_OFFSET + 0)) #define GSS_S_DUPLICATE_TOKEN (1 << (GSS_C_SUPPLEMENTARY_OFFSET + 1)) #define GSS_S_OLD_TOKEN (1 << (GSS_C_SUPPLEMENTARY_OFFSET + 2)) #define GSS_S_UNSEQ_TOKEN (1 << (GSS_C_SUPPLEMENTARY_OFFSET + 3)) #define GSS_S_GAP_TOKEN (1 << (GSS_C_SUPPLEMENTARY_OFFSET + 4)) /* XXXX these are not part of the GSSAPI C bindings! (but should be) */ #define GSS_CALLING_ERROR_FIELD(x) \ (((x) >> GSS_C_CALLING_ERROR_OFFSET) & GSS_C_CALLING_ERROR_MASK) #define GSS_ROUTINE_ERROR_FIELD(x) \ (((x) >> GSS_C_ROUTINE_ERROR_OFFSET) & GSS_C_ROUTINE_ERROR_MASK) #define GSS_SUPPLEMENTARY_INFO_FIELD(x) \ (((x) >> GSS_C_SUPPLEMENTARY_OFFSET) & GSS_C_SUPPLEMENTARY_MASK) /* XXXX This is a necessary evil until the spec is fixed */ #define GSS_S_CRED_UNAVAIL GSS_S_FAILURE #endif /* __LINUX_SUNRPC_GSS_ERR_H */ PK ! J�Zk k sunrpc/rpc_pipe_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SUNRPC_RPC_PIPE_FS_H #define _LINUX_SUNRPC_RPC_PIPE_FS_H #include <linux/workqueue.h> struct rpc_pipe_dir_head { struct list_head pdh_entries; struct dentry *pdh_dentry; }; struct rpc_pipe_dir_object_ops; struct rpc_pipe_dir_object { struct list_head pdo_head; const struct rpc_pipe_dir_object_ops *pdo_ops; void *pdo_data; }; struct rpc_pipe_dir_object_ops { int (*create)(struct dentry *dir, struct rpc_pipe_dir_object *pdo); void (*destroy)(struct dentry *dir, struct rpc_pipe_dir_object *pdo); }; struct rpc_pipe_msg { struct list_head list; void *data; size_t len; size_t copied; int errno; }; struct rpc_pipe_ops { ssize_t (*upcall)(struct file *, struct rpc_pipe_msg *, char __user *, size_t); ssize_t (*downcall)(struct file *, const char __user *, size_t); void (*release_pipe)(struct inode *); int (*open_pipe)(struct inode *); void (*destroy_msg)(struct rpc_pipe_msg *); }; struct rpc_pipe { struct list_head pipe; struct list_head in_upcall; struct list_head in_downcall; int pipelen; int nreaders; int nwriters; #define RPC_PIPE_WAIT_FOR_OPEN 1 int flags; struct delayed_work queue_timeout; const struct rpc_pipe_ops *ops; spinlock_t lock; struct dentry *dentry; }; struct rpc_inode { struct inode vfs_inode; void *private; struct rpc_pipe *pipe; wait_queue_head_t waitq; }; static inline struct rpc_inode * RPC_I(struct inode *inode) { return container_of(inode, struct rpc_inode, vfs_inode); } enum { SUNRPC_PIPEFS_NFS_PRIO, SUNRPC_PIPEFS_RPC_PRIO, }; extern int rpc_pipefs_notifier_register(struct notifier_block *); extern void rpc_pipefs_notifier_unregister(struct notifier_block *); enum { RPC_PIPEFS_MOUNT, RPC_PIPEFS_UMOUNT, }; extern struct dentry *rpc_d_lookup_sb(const struct super_block *sb, const unsigned char *dir_name); extern int rpc_pipefs_init_net(struct net *net); extern void rpc_pipefs_exit_net(struct net *net); extern struct super_block *rpc_get_sb_net(const struct net *net); extern void rpc_put_sb_net(const struct net *net); extern ssize_t rpc_pipe_generic_upcall(struct file *, struct rpc_pipe_msg *, char __user *, size_t); extern int rpc_queue_upcall(struct rpc_pipe *, struct rpc_pipe_msg *); /* returns true if the msg is in-flight, i.e., already eaten by the peer */ static inline bool rpc_msg_is_inflight(const struct rpc_pipe_msg *msg) { return (msg->copied != 0 && list_empty(&msg->list)); } struct rpc_clnt; extern struct dentry *rpc_create_client_dir(struct dentry *, const char *, struct rpc_clnt *); extern int rpc_remove_client_dir(struct rpc_clnt *); extern void rpc_init_pipe_dir_head(struct rpc_pipe_dir_head *pdh); extern void rpc_init_pipe_dir_object(struct rpc_pipe_dir_object *pdo, const struct rpc_pipe_dir_object_ops *pdo_ops, void *pdo_data); extern int rpc_add_pipe_dir_object(struct net *net, struct rpc_pipe_dir_head *pdh, struct rpc_pipe_dir_object *pdo); extern void rpc_remove_pipe_dir_object(struct net *net, struct rpc_pipe_dir_head *pdh, struct rpc_pipe_dir_object *pdo); extern struct rpc_pipe_dir_object *rpc_find_or_alloc_pipe_dir_object( struct net *net, struct rpc_pipe_dir_head *pdh, int (*match)(struct rpc_pipe_dir_object *, void *), struct rpc_pipe_dir_object *(*alloc)(void *), void *data); struct cache_detail; extern struct dentry *rpc_create_cache_dir(struct dentry *, const char *, umode_t umode, struct cache_detail *); extern void rpc_remove_cache_dir(struct dentry *); struct rpc_pipe *rpc_mkpipe_data(const struct rpc_pipe_ops *ops, int flags); void rpc_destroy_pipe_data(struct rpc_pipe *pipe); extern struct dentry *rpc_mkpipe_dentry(struct dentry *, const char *, void *, struct rpc_pipe *); extern int rpc_unlink(struct dentry *); extern int register_rpc_pipefs(void); extern void unregister_rpc_pipefs(void); extern bool gssd_running(struct net *net); #endif PK ! �I�2 2 mmiotrace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MMIOTRACE_H #define _LINUX_MMIOTRACE_H #include <linux/types.h> #include <linux/list.h> struct kmmio_probe; struct pt_regs; typedef void (*kmmio_pre_handler_t)(struct kmmio_probe *, struct pt_regs *, unsigned long addr); typedef void (*kmmio_post_handler_t)(struct kmmio_probe *, unsigned long condition, struct pt_regs *); struct kmmio_probe { /* kmmio internal list: */ struct list_head list; /* start location of the probe point: */ unsigned long addr; /* length of the probe region: */ unsigned long len; /* Called before addr is executed: */ kmmio_pre_handler_t pre_handler; /* Called after addr is executed: */ kmmio_post_handler_t post_handler; void *private; }; extern unsigned int kmmio_count; extern int register_kmmio_probe(struct kmmio_probe *p); extern void unregister_kmmio_probe(struct kmmio_probe *p); extern int kmmio_init(void); extern void kmmio_cleanup(void); #ifdef CONFIG_MMIOTRACE /* kmmio is active by some kmmio_probes? */ static inline int is_kmmio_active(void) { return kmmio_count; } /* Called from page fault handler. */ extern int kmmio_handler(struct pt_regs *regs, unsigned long addr); /* Called from ioremap.c */ extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size, void __iomem *addr); extern void mmiotrace_iounmap(volatile void __iomem *addr); /* For anyone to insert markers. Remember trailing newline. */ extern __printf(1, 2) int mmiotrace_printk(const char *fmt, ...); #else /* !CONFIG_MMIOTRACE: */ static inline int is_kmmio_active(void) { return 0; } static inline int kmmio_handler(struct pt_regs *regs, unsigned long addr) { return 0; } static inline void mmiotrace_ioremap(resource_size_t offset, unsigned long size, void __iomem *addr) { } static inline void mmiotrace_iounmap(volatile void __iomem *addr) { } static inline __printf(1, 2) int mmiotrace_printk(const char *fmt, ...) { return 0; } #endif /* CONFIG_MMIOTRACE */ enum mm_io_opcode { MMIO_READ = 0x1, /* struct mmiotrace_rw */ MMIO_WRITE = 0x2, /* struct mmiotrace_rw */ MMIO_PROBE = 0x3, /* struct mmiotrace_map */ MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */ MMIO_UNKNOWN_OP = 0x5, /* struct mmiotrace_rw */ }; struct mmiotrace_rw { resource_size_t phys; /* PCI address of register */ unsigned long value; unsigned long pc; /* optional program counter */ int map_id; unsigned char opcode; /* one of MMIO_{READ,WRITE,UNKNOWN_OP} */ unsigned char width; /* size of register access in bytes */ }; struct mmiotrace_map { resource_size_t phys; /* base address in PCI space */ unsigned long virt; /* base virtual address */ unsigned long len; /* mapping size */ int map_id; unsigned char opcode; /* MMIO_PROBE or MMIO_UNPROBE */ }; /* in kernel/trace/trace_mmiotrace.c */ extern void enable_mmiotrace(void); extern void disable_mmiotrace(void); extern void mmio_trace_rw(struct mmiotrace_rw *rw); extern void mmio_trace_mapping(struct mmiotrace_map *map); extern __printf(1, 0) int mmio_trace_printk(const char *fmt, va_list args); #endif /* _LINUX_MMIOTRACE_H */ PK ! ����� � firmware-map.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/firmware-map.h: * Copyright (C) 2008 SUSE LINUX Products GmbH * by Bernhard Walle <bernhard.walle@gmx.de> */ #ifndef _LINUX_FIRMWARE_MAP_H #define _LINUX_FIRMWARE_MAP_H #include <linux/list.h> /* * provide a dummy interface if CONFIG_FIRMWARE_MEMMAP is disabled */ #ifdef CONFIG_FIRMWARE_MEMMAP int firmware_map_add_early(u64 start, u64 end, const char *type); int firmware_map_add_hotplug(u64 start, u64 end, const char *type); int firmware_map_remove(u64 start, u64 end, const char *type); #else /* CONFIG_FIRMWARE_MEMMAP */ static inline int firmware_map_add_early(u64 start, u64 end, const char *type) { return 0; } static inline int firmware_map_add_hotplug(u64 start, u64 end, const char *type) { return 0; } static inline int firmware_map_remove(u64 start, u64 end, const char *type) { return 0; } #endif /* CONFIG_FIRMWARE_MEMMAP */ #endif /* _LINUX_FIRMWARE_MAP_H */ PK ! K �/� � sxgbe_platform.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * 10G controller driver for Samsung Exynos SoCs * * Copyright (C) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Author: Siva Reddy Kallam <siva.kallam@samsung.com> */ #ifndef __SXGBE_PLATFORM_H__ #define __SXGBE_PLATFORM_H__ #include <linux/phy.h> /* MDC Clock Selection define*/ #define SXGBE_CSR_100_150M 0x0 /* MDC = clk_scr_i/62 */ #define SXGBE_CSR_150_250M 0x1 /* MDC = clk_scr_i/102 */ #define SXGBE_CSR_250_300M 0x2 /* MDC = clk_scr_i/122 */ #define SXGBE_CSR_300_350M 0x3 /* MDC = clk_scr_i/142 */ #define SXGBE_CSR_350_400M 0x4 /* MDC = clk_scr_i/162 */ #define SXGBE_CSR_400_500M 0x5 /* MDC = clk_scr_i/202 */ /* Platfrom data for platform device structure's * platform_data field */ struct sxgbe_mdio_bus_data { unsigned int phy_mask; int *irqs; int probed_phy_irq; }; struct sxgbe_dma_cfg { int pbl; int fixed_burst; int burst_map; int adv_addr_mode; }; struct sxgbe_plat_data { char *phy_bus_name; int bus_id; int phy_addr; phy_interface_t interface; struct sxgbe_mdio_bus_data *mdio_bus_data; struct sxgbe_dma_cfg *dma_cfg; int clk_csr; int pmt; int force_sf_dma_mode; int force_thresh_dma_mode; int riwt_off; }; #endif /* __SXGBE_PLATFORM_H__ */ PK ! S i�� � delayacct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* delayacct.h - per-task delay accounting * * Copyright (C) Shailabh Nagar, IBM Corp. 2006 */ #ifndef _LINUX_DELAYACCT_H #define _LINUX_DELAYACCT_H #include <uapi/linux/taskstats.h> /* * Per-task flags relevant to delay accounting * maintained privately to avoid exhausting similar flags in sched.h:PF_* * Used to set current->delays->flags */ #define DELAYACCT_PF_SWAPIN 0x00000001 /* I am doing a swapin */ #define DELAYACCT_PF_BLKIO 0x00000002 /* I am waiting on IO */ #ifdef CONFIG_TASK_DELAY_ACCT struct task_delay_info { raw_spinlock_t lock; unsigned int flags; /* Private per-task flags */ /* For each stat XXX, add following, aligned appropriately * * struct timespec XXX_start, XXX_end; * u64 XXX_delay; * u32 XXX_count; * * Atomicity of updates to XXX_delay, XXX_count protected by * single lock above (split into XXX_lock if contention is an issue). */ /* * XXX_count is incremented on every XXX operation, the delay * associated with the operation is added to XXX_delay. * XXX_delay contains the accumulated delay time in nanoseconds. */ u64 blkio_start; /* Shared by blkio, swapin */ u64 blkio_delay; /* wait for sync block io completion */ u64 swapin_delay; /* wait for swapin block io completion */ u32 blkio_count; /* total count of the number of sync block */ /* io operations performed */ u32 swapin_count; /* total count of the number of swapin block */ /* io operations performed */ u64 freepages_start; u64 freepages_delay; /* wait for memory reclaim */ u64 thrashing_start; u64 thrashing_delay; /* wait for thrashing page */ u32 freepages_count; /* total count of memory reclaim */ u32 thrashing_count; /* total count of thrash waits */ }; #endif #include <linux/sched.h> #include <linux/slab.h> #include <linux/jump_label.h> #ifdef CONFIG_TASK_DELAY_ACCT DECLARE_STATIC_KEY_FALSE(delayacct_key); extern int delayacct_on; /* Delay accounting turned on/off */ extern struct kmem_cache *delayacct_cache; extern void delayacct_init(void); extern int sysctl_delayacct(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); extern void __delayacct_tsk_init(struct task_struct *); extern void __delayacct_tsk_exit(struct task_struct *); extern void __delayacct_blkio_start(void); extern void __delayacct_blkio_end(struct task_struct *); extern int delayacct_add_tsk(struct taskstats *, struct task_struct *); extern __u64 __delayacct_blkio_ticks(struct task_struct *); extern void __delayacct_freepages_start(void); extern void __delayacct_freepages_end(void); extern void __delayacct_thrashing_start(void); extern void __delayacct_thrashing_end(void); static inline int delayacct_is_task_waiting_on_io(struct task_struct *p) { if (p->delays) return (p->delays->flags & DELAYACCT_PF_BLKIO); else return 0; } static inline void delayacct_set_flag(struct task_struct *p, int flag) { if (p->delays) p->delays->flags |= flag; } static inline void delayacct_clear_flag(struct task_struct *p, int flag) { if (p->delays) p->delays->flags &= ~flag; } static inline void delayacct_tsk_init(struct task_struct *tsk) { /* reinitialize in case parent's non-null pointer was dup'ed*/ tsk->delays = NULL; if (delayacct_on) __delayacct_tsk_init(tsk); } /* Free tsk->delays. Called from bad fork and __put_task_struct * where there's no risk of tsk->delays being accessed elsewhere */ static inline void delayacct_tsk_free(struct task_struct *tsk) { if (tsk->delays) kmem_cache_free(delayacct_cache, tsk->delays); tsk->delays = NULL; } static inline void delayacct_blkio_start(void) { if (!static_branch_unlikely(&delayacct_key)) return; delayacct_set_flag(current, DELAYACCT_PF_BLKIO); if (current->delays) __delayacct_blkio_start(); } static inline void delayacct_blkio_end(struct task_struct *p) { if (!static_branch_unlikely(&delayacct_key)) return; if (p->delays) __delayacct_blkio_end(p); delayacct_clear_flag(p, DELAYACCT_PF_BLKIO); } static inline __u64 delayacct_blkio_ticks(struct task_struct *tsk) { if (tsk->delays) return __delayacct_blkio_ticks(tsk); return 0; } static inline void delayacct_freepages_start(void) { if (current->delays) __delayacct_freepages_start(); } static inline void delayacct_freepages_end(void) { if (current->delays) __delayacct_freepages_end(); } static inline void delayacct_thrashing_start(void) { if (current->delays) __delayacct_thrashing_start(); } static inline void delayacct_thrashing_end(void) { if (current->delays) __delayacct_thrashing_end(); } #else static inline void delayacct_set_flag(struct task_struct *p, int flag) {} static inline void delayacct_clear_flag(struct task_struct *p, int flag) {} static inline void delayacct_init(void) {} static inline void delayacct_tsk_init(struct task_struct *tsk) {} static inline void delayacct_tsk_free(struct task_struct *tsk) {} static inline void delayacct_blkio_start(void) {} static inline void delayacct_blkio_end(struct task_struct *p) {} static inline int delayacct_add_tsk(struct taskstats *d, struct task_struct *tsk) { return 0; } static inline __u64 delayacct_blkio_ticks(struct task_struct *tsk) { return 0; } static inline int delayacct_is_task_waiting_on_io(struct task_struct *p) { return 0; } static inline void delayacct_freepages_start(void) {} static inline void delayacct_freepages_end(void) {} static inline void delayacct_thrashing_start(void) {} static inline void delayacct_thrashing_end(void) {} #endif /* CONFIG_TASK_DELAY_ACCT */ #endif PK ! \ɜ(�" �" rculist_nulls.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RCULIST_NULLS_H #define _LINUX_RCULIST_NULLS_H #ifdef __KERNEL__ /* * RCU-protected list version */ #include <linux/list_nulls.h> #include <linux/rcupdate.h> /** * hlist_nulls_del_init_rcu - deletes entry from hash list with re-initialization * @n: the element to delete from the hash list. * * Note: hlist_nulls_unhashed() on the node return true after this. It is * useful for RCU based read lockfree traversal if the writer side * must know if the list entry is still hashed or already unhashed. * * In particular, it means that we can not poison the forward pointers * that may still be used for walking the hash list and we can only * zero the pprev pointer so list_unhashed() will return true after * this. * * The caller must take whatever precautions are necessary (such as * holding appropriate locks) to avoid racing with another * list-mutation primitive, such as hlist_nulls_add_head_rcu() or * hlist_nulls_del_rcu(), running on this same list. However, it is * perfectly legal to run concurrently with the _rcu list-traversal * primitives, such as hlist_nulls_for_each_entry_rcu(). */ static inline void hlist_nulls_del_init_rcu(struct hlist_nulls_node *n) { if (!hlist_nulls_unhashed(n)) { __hlist_nulls_del(n); WRITE_ONCE(n->pprev, NULL); } } /** * hlist_nulls_first_rcu - returns the first element of the hash list. * @head: the head of the list. */ #define hlist_nulls_first_rcu(head) \ (*((struct hlist_nulls_node __rcu __force **)&(head)->first)) /** * hlist_nulls_next_rcu - returns the element of the list after @node. * @node: element of the list. */ #define hlist_nulls_next_rcu(node) \ (*((struct hlist_nulls_node __rcu __force **)&(node)->next)) /** * hlist_nulls_pprev_rcu - returns the dereferenced pprev of @node. * @node: element of the list. */ #define hlist_nulls_pprev_rcu(node) \ (*((struct hlist_nulls_node __rcu __force **)(node)->pprev)) /** * hlist_nulls_del_rcu - deletes entry from hash list without re-initialization * @n: the element to delete from the hash list. * * Note: hlist_nulls_unhashed() on entry does not return true after this, * the entry is in an undefined state. It is useful for RCU based * lockfree traversal. * * In particular, it means that we can not poison the forward * pointers that may still be used for walking the hash list. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_nulls_add_head_rcu() * or hlist_nulls_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_nulls_for_each_entry(). */ static inline void hlist_nulls_del_rcu(struct hlist_nulls_node *n) { __hlist_nulls_del(n); WRITE_ONCE(n->pprev, LIST_POISON2); } /** * hlist_nulls_add_head_rcu * @n: the element to add to the hash list. * @h: the list to add to. * * Description: * Adds the specified element to the specified hlist_nulls, * while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_nulls_add_head_rcu() * or hlist_nulls_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_nulls_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. Regardless of the type of CPU, the * list-traversal primitive must be guarded by rcu_read_lock(). */ static inline void hlist_nulls_add_head_rcu(struct hlist_nulls_node *n, struct hlist_nulls_head *h) { struct hlist_nulls_node *first = h->first; n->next = first; WRITE_ONCE(n->pprev, &h->first); rcu_assign_pointer(hlist_nulls_first_rcu(h), n); if (!is_a_nulls(first)) WRITE_ONCE(first->pprev, &n->next); } /** * hlist_nulls_add_tail_rcu * @n: the element to add to the hash list. * @h: the list to add to. * * Description: * Adds the specified element to the specified hlist_nulls, * while permitting racing traversals. * * The caller must take whatever precautions are necessary * (such as holding appropriate locks) to avoid racing * with another list-mutation primitive, such as hlist_nulls_add_head_rcu() * or hlist_nulls_del_rcu(), running on this same list. * However, it is perfectly legal to run concurrently with * the _rcu list-traversal primitives, such as * hlist_nulls_for_each_entry_rcu(), used to prevent memory-consistency * problems on Alpha CPUs. Regardless of the type of CPU, the * list-traversal primitive must be guarded by rcu_read_lock(). */ static inline void hlist_nulls_add_tail_rcu(struct hlist_nulls_node *n, struct hlist_nulls_head *h) { struct hlist_nulls_node *i, *last = NULL; /* Note: write side code, so rcu accessors are not needed. */ for (i = h->first; !is_a_nulls(i); i = i->next) last = i; if (last) { n->next = last->next; n->pprev = &last->next; rcu_assign_pointer(hlist_next_rcu(last), n); } else { hlist_nulls_add_head_rcu(n, h); } } /* after that hlist_nulls_del will work */ static inline void hlist_nulls_add_fake(struct hlist_nulls_node *n) { n->pprev = &n->next; n->next = (struct hlist_nulls_node *)NULLS_MARKER(NULL); } /** * hlist_nulls_replace_rcu - replace an old entry by a new one * @old: the element to be replaced * @new: the new element to insert * * Description: * Replace the old entry with the new one in a RCU-protected hlist_nulls, while * permitting racing traversals. * * The caller must take whatever precautions are necessary (such as holding * appropriate locks) to avoid racing with another list-mutation primitive, such * as hlist_nulls_add_head_rcu() or hlist_nulls_del_rcu(), running on this same * list. However, it is perfectly legal to run concurrently with the _rcu * list-traversal primitives, such as hlist_nulls_for_each_entry_rcu(). */ static inline void hlist_nulls_replace_rcu(struct hlist_nulls_node *old, struct hlist_nulls_node *new) { struct hlist_nulls_node *next = old->next; WRITE_ONCE(new->next, next); WRITE_ONCE(new->pprev, old->pprev); rcu_assign_pointer(hlist_nulls_pprev_rcu(new), new); if (!is_a_nulls(next)) WRITE_ONCE(next->pprev, &new->next); } /** * hlist_nulls_replace_init_rcu - replace an old entry by a new one and * initialize the old * @old: the element to be replaced * @new: the new element to insert * * Description: * Replace the old entry with the new one in a RCU-protected hlist_nulls, while * permitting racing traversals, and reinitialize the old entry. * * Note: @old must be hashed. * * The caller must take whatever precautions are necessary (such as holding * appropriate locks) to avoid racing with another list-mutation primitive, such * as hlist_nulls_add_head_rcu() or hlist_nulls_del_rcu(), running on this same * list. However, it is perfectly legal to run concurrently with the _rcu * list-traversal primitives, such as hlist_nulls_for_each_entry_rcu(). */ static inline void hlist_nulls_replace_init_rcu(struct hlist_nulls_node *old, struct hlist_nulls_node *new) { hlist_nulls_replace_rcu(old, new); WRITE_ONCE(old->pprev, NULL); } /** * hlist_nulls_for_each_entry_rcu - iterate over rcu list of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_nulls_node to use as a loop cursor. * @head: the head of the list. * @member: the name of the hlist_nulls_node within the struct. * * The barrier() is needed to make sure compiler doesn't cache first element [1], * as this loop can be restarted [2] * [1] Documentation/memory-barriers.txt around line 1533 * [2] Documentation/RCU/rculist_nulls.rst around line 146 */ #define hlist_nulls_for_each_entry_rcu(tpos, pos, head, member) \ for (({barrier();}), \ pos = rcu_dereference_raw(hlist_nulls_first_rcu(head)); \ (!is_a_nulls(pos)) && \ ({ tpos = hlist_nulls_entry(pos, typeof(*tpos), member); 1; }); \ pos = rcu_dereference_raw(hlist_nulls_next_rcu(pos))) /** * hlist_nulls_for_each_entry_safe - * iterate over list of given type safe against removal of list entry * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_nulls_node to use as a loop cursor. * @head: the head of the list. * @member: the name of the hlist_nulls_node within the struct. */ #define hlist_nulls_for_each_entry_safe(tpos, pos, head, member) \ for (({barrier();}), \ pos = rcu_dereference_raw(hlist_nulls_first_rcu(head)); \ (!is_a_nulls(pos)) && \ ({ tpos = hlist_nulls_entry(pos, typeof(*tpos), member); \ pos = rcu_dereference_raw(hlist_nulls_next_rcu(pos)); 1; });) #endif #endif PK ! �k_�% % uacce.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _LINUX_UACCE_H #define _LINUX_UACCE_H #include <linux/cdev.h> #include <uapi/misc/uacce/uacce.h> #define UACCE_NAME "uacce" #define UACCE_MAX_REGION 2 #define UACCE_MAX_NAME_SIZE 64 struct uacce_queue; struct uacce_device; /** * struct uacce_qfile_region - structure of queue file region * @type: type of the region */ struct uacce_qfile_region { enum uacce_qfrt type; }; /** * struct uacce_ops - uacce device operations * @get_available_instances: get available instances left of the device * @get_queue: get a queue from the device * @put_queue: free a queue to the device * @start_queue: make the queue start work after get_queue * @stop_queue: make the queue stop work before put_queue * @is_q_updated: check whether the task is finished * @mmap: mmap addresses of queue to user space * @ioctl: ioctl for user space users of the queue */ struct uacce_ops { int (*get_available_instances)(struct uacce_device *uacce); int (*get_queue)(struct uacce_device *uacce, unsigned long arg, struct uacce_queue *q); void (*put_queue)(struct uacce_queue *q); int (*start_queue)(struct uacce_queue *q); void (*stop_queue)(struct uacce_queue *q); int (*is_q_updated)(struct uacce_queue *q); int (*mmap)(struct uacce_queue *q, struct vm_area_struct *vma, struct uacce_qfile_region *qfr); long (*ioctl)(struct uacce_queue *q, unsigned int cmd, unsigned long arg); }; /** * struct uacce_interface - interface required for uacce_register() * @name: the uacce device name. Will show up in sysfs * @flags: uacce device attributes * @ops: pointer to the struct uacce_ops */ struct uacce_interface { char name[UACCE_MAX_NAME_SIZE]; unsigned int flags; const struct uacce_ops *ops; }; enum uacce_q_state { UACCE_Q_ZOMBIE = 0, UACCE_Q_INIT, UACCE_Q_STARTED, }; /** * struct uacce_queue * @uacce: pointer to uacce * @priv: private pointer * @wait: wait queue head * @list: index into uacce queues list * @qfrs: pointer of qfr regions * @mutex: protects queue state * @state: queue state machine * @pasid: pasid associated to the mm * @handle: iommu_sva handle returned by iommu_sva_bind_device() */ struct uacce_queue { struct uacce_device *uacce; void *priv; wait_queue_head_t wait; struct list_head list; struct uacce_qfile_region *qfrs[UACCE_MAX_REGION]; struct mutex mutex; enum uacce_q_state state; u32 pasid; struct iommu_sva *handle; }; /** * struct uacce_device * @algs: supported algorithms * @api_ver: api version * @ops: pointer to the struct uacce_ops * @qf_pg_num: page numbers of the queue file regions * @parent: pointer to the parent device * @is_vf: whether virtual function * @flags: uacce attributes * @dev_id: id of the uacce device * @cdev: cdev of the uacce * @dev: dev of the uacce * @mutex: protects uacce operation * @priv: private pointer of the uacce * @queues: list of queues * @inode: core vfs */ struct uacce_device { const char *algs; const char *api_ver; const struct uacce_ops *ops; unsigned long qf_pg_num[UACCE_MAX_REGION]; struct device *parent; bool is_vf; u32 flags; u32 dev_id; struct cdev *cdev; struct device dev; struct mutex mutex; void *priv; struct list_head queues; struct inode *inode; }; #if IS_ENABLED(CONFIG_UACCE) struct uacce_device *uacce_alloc(struct device *parent, struct uacce_interface *interface); int uacce_register(struct uacce_device *uacce); void uacce_remove(struct uacce_device *uacce); #else /* CONFIG_UACCE */ static inline struct uacce_device *uacce_alloc(struct device *parent, struct uacce_interface *interface) { return ERR_PTR(-ENODEV); } static inline int uacce_register(struct uacce_device *uacce) { return -EINVAL; } static inline void uacce_remove(struct uacce_device *uacce) {} #endif /* CONFIG_UACCE */ #endif /* _LINUX_UACCE_H */ PK ! ��os{ { altera_jtaguart.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * altera_jtaguart.h -- Altera JTAG UART driver defines. */ #ifndef __ALTJUART_H #define __ALTJUART_H #define ALTERA_JTAGUART_MAJOR 204 #define ALTERA_JTAGUART_MINOR 186 struct altera_jtaguart_platform_uart { unsigned long mapbase; /* Physical address base */ unsigned int irq; /* Interrupt vector */ }; #endif /* __ALTJUART_H */ PK ! ���B# # utsname.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_UTSNAME_H #define _LINUX_UTSNAME_H #include <linux/sched.h> #include <linux/nsproxy.h> #include <linux/ns_common.h> #include <linux/err.h> #include <uapi/linux/utsname.h> enum uts_proc { UTS_PROC_OSTYPE, UTS_PROC_OSRELEASE, UTS_PROC_VERSION, UTS_PROC_HOSTNAME, UTS_PROC_DOMAINNAME, }; struct user_namespace; extern struct user_namespace init_user_ns; struct uts_namespace { struct new_utsname name; struct user_namespace *user_ns; struct ucounts *ucounts; struct ns_common ns; } __randomize_layout; extern struct uts_namespace init_uts_ns; #ifdef CONFIG_UTS_NS static inline void get_uts_ns(struct uts_namespace *ns) { refcount_inc(&ns->ns.count); } extern struct uts_namespace *copy_utsname(unsigned long flags, struct user_namespace *user_ns, struct uts_namespace *old_ns); extern void free_uts_ns(struct uts_namespace *ns); static inline void put_uts_ns(struct uts_namespace *ns) { if (refcount_dec_and_test(&ns->ns.count)) free_uts_ns(ns); } void uts_ns_init(void); #else static inline void get_uts_ns(struct uts_namespace *ns) { } static inline void put_uts_ns(struct uts_namespace *ns) { } static inline struct uts_namespace *copy_utsname(unsigned long flags, struct user_namespace *user_ns, struct uts_namespace *old_ns) { if (flags & CLONE_NEWUTS) return ERR_PTR(-EINVAL); return old_ns; } static inline void uts_ns_init(void) { } #endif #ifdef CONFIG_PROC_SYSCTL extern void uts_proc_notify(enum uts_proc proc); #else static inline void uts_proc_notify(enum uts_proc proc) { } #endif static inline struct new_utsname *utsname(void) { return ¤t->nsproxy->uts_ns->name; } static inline struct new_utsname *init_utsname(void) { return &init_uts_ns.name; } extern struct rw_semaphore uts_sem; #endif /* _LINUX_UTSNAME_H */ PK ! p�+�4 �4 pm_domain.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * pm_domain.h - Definitions and headers related to device power domains. * * Copyright (C) 2011 Rafael J. Wysocki <rjw@sisk.pl>, Renesas Electronics Corp. */ #ifndef _LINUX_PM_DOMAIN_H #define _LINUX_PM_DOMAIN_H #include <linux/device.h> #include <linux/ktime.h> #include <linux/mutex.h> #include <linux/pm.h> #include <linux/err.h> #include <linux/of.h> #include <linux/notifier.h> #include <linux/spinlock.h> #include <linux/cpumask.h> /* * Flags to control the behaviour of a genpd. * * These flags may be set in the struct generic_pm_domain's flags field by a * genpd backend driver. The flags must be set before it calls pm_genpd_init(), * which initializes a genpd. * * GENPD_FLAG_PM_CLK: Instructs genpd to use the PM clk framework, * while powering on/off attached devices. * * GENPD_FLAG_IRQ_SAFE: This informs genpd that its backend callbacks, * ->power_on|off(), doesn't sleep. Hence, these * can be invoked from within atomic context, which * enables genpd to power on/off the PM domain, * even when pm_runtime_is_irq_safe() returns true, * for any of its attached devices. Note that, a * genpd having this flag set, requires its * masterdomains to also have it set. * * GENPD_FLAG_ALWAYS_ON: Instructs genpd to always keep the PM domain * powered on. * * GENPD_FLAG_ACTIVE_WAKEUP: Instructs genpd to keep the PM domain powered * on, in case any of its attached devices is used * in the wakeup path to serve system wakeups. * * GENPD_FLAG_CPU_DOMAIN: Instructs genpd that it should expect to get * devices attached, which may belong to CPUs or * possibly have subdomains with CPUs attached. * This flag enables the genpd backend driver to * deploy idle power management support for CPUs * and groups of CPUs. Note that, the backend * driver must then comply with the so called, * last-man-standing algorithm, for the CPUs in the * PM domain. * * GENPD_FLAG_RPM_ALWAYS_ON: Instructs genpd to always keep the PM domain * powered on except for system suspend. * * GENPD_FLAG_MIN_RESIDENCY: Enable the genpd governor to consider its * components' next wakeup when determining the * optimal idle state. */ #define GENPD_FLAG_PM_CLK (1U << 0) #define GENPD_FLAG_IRQ_SAFE (1U << 1) #define GENPD_FLAG_ALWAYS_ON (1U << 2) #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3) #define GENPD_FLAG_CPU_DOMAIN (1U << 4) #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5) #define GENPD_FLAG_MIN_RESIDENCY (1U << 6) enum gpd_status { GENPD_STATE_ON = 0, /* PM domain is on */ GENPD_STATE_OFF, /* PM domain is off */ }; enum genpd_notication { GENPD_NOTIFY_PRE_OFF = 0, GENPD_NOTIFY_OFF, GENPD_NOTIFY_PRE_ON, GENPD_NOTIFY_ON, }; struct dev_power_governor { bool (*power_down_ok)(struct dev_pm_domain *domain); bool (*suspend_ok)(struct device *dev); }; struct gpd_dev_ops { int (*start)(struct device *dev); int (*stop)(struct device *dev); }; struct genpd_power_state { s64 power_off_latency_ns; s64 power_on_latency_ns; s64 residency_ns; u64 usage; u64 rejected; struct fwnode_handle *fwnode; ktime_t idle_time; void *data; }; struct genpd_lock_ops; struct dev_pm_opp; struct opp_table; struct generic_pm_domain { struct device dev; struct dev_pm_domain domain; /* PM domain operations */ struct list_head gpd_list_node; /* Node in the global PM domains list */ struct list_head parent_links; /* Links with PM domain as a parent */ struct list_head child_links; /* Links with PM domain as a child */ struct list_head dev_list; /* List of devices */ struct dev_power_governor *gov; struct work_struct power_off_work; struct fwnode_handle *provider; /* Identity of the domain provider */ bool has_provider; const char *name; atomic_t sd_count; /* Number of subdomains with power "on" */ enum gpd_status status; /* Current state of the domain */ unsigned int device_count; /* Number of devices */ unsigned int suspended_count; /* System suspend device counter */ unsigned int prepared_count; /* Suspend counter of prepared devices */ unsigned int performance_state; /* Aggregated max performance state */ cpumask_var_t cpus; /* A cpumask of the attached CPUs */ int (*power_off)(struct generic_pm_domain *domain); int (*power_on)(struct generic_pm_domain *domain); struct raw_notifier_head power_notifiers; /* Power on/off notifiers */ struct opp_table *opp_table; /* OPP table of the genpd */ unsigned int (*opp_to_performance_state)(struct generic_pm_domain *genpd, struct dev_pm_opp *opp); int (*set_performance_state)(struct generic_pm_domain *genpd, unsigned int state); struct gpd_dev_ops dev_ops; s64 max_off_time_ns; /* Maximum allowed "suspended" time. */ ktime_t next_wakeup; /* Maintained by the domain governor */ bool max_off_time_changed; bool cached_power_down_ok; bool cached_power_down_state_idx; int (*attach_dev)(struct generic_pm_domain *domain, struct device *dev); void (*detach_dev)(struct generic_pm_domain *domain, struct device *dev); unsigned int flags; /* Bit field of configs for genpd */ struct genpd_power_state *states; void (*free_states)(struct genpd_power_state *states, unsigned int state_count); unsigned int state_count; /* number of states */ unsigned int state_idx; /* state that genpd will go to when off */ ktime_t on_time; ktime_t accounting_time; const struct genpd_lock_ops *lock_ops; union { struct mutex mlock; struct { spinlock_t slock; unsigned long lock_flags; }; }; }; static inline struct generic_pm_domain *pd_to_genpd(struct dev_pm_domain *pd) { return container_of(pd, struct generic_pm_domain, domain); } struct gpd_link { struct generic_pm_domain *parent; struct list_head parent_node; struct generic_pm_domain *child; struct list_head child_node; /* Sub-domain's per-master domain performance state */ unsigned int performance_state; unsigned int prev_performance_state; }; struct gpd_timing_data { s64 suspend_latency_ns; s64 resume_latency_ns; s64 effective_constraint_ns; bool constraint_changed; bool cached_suspend_ok; }; struct pm_domain_data { struct list_head list_node; struct device *dev; }; struct generic_pm_domain_data { struct pm_domain_data base; struct gpd_timing_data td; struct notifier_block nb; struct notifier_block *power_nb; int cpu; unsigned int performance_state; unsigned int default_pstate; unsigned int rpm_pstate; ktime_t next_wakeup; void *data; }; #ifdef CONFIG_PM_GENERIC_DOMAINS static inline struct generic_pm_domain_data *to_gpd_data(struct pm_domain_data *pdd) { return container_of(pdd, struct generic_pm_domain_data, base); } static inline struct generic_pm_domain_data *dev_gpd_data(struct device *dev) { return to_gpd_data(dev->power.subsys_data->domain_data); } int pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev); int pm_genpd_remove_device(struct device *dev); int pm_genpd_add_subdomain(struct generic_pm_domain *genpd, struct generic_pm_domain *subdomain); int pm_genpd_remove_subdomain(struct generic_pm_domain *genpd, struct generic_pm_domain *subdomain); int pm_genpd_init(struct generic_pm_domain *genpd, struct dev_power_governor *gov, bool is_off); int pm_genpd_remove(struct generic_pm_domain *genpd); int dev_pm_genpd_set_performance_state(struct device *dev, unsigned int state); int dev_pm_genpd_add_notifier(struct device *dev, struct notifier_block *nb); int dev_pm_genpd_remove_notifier(struct device *dev); void dev_pm_genpd_set_next_wakeup(struct device *dev, ktime_t next); extern struct dev_power_governor simple_qos_governor; extern struct dev_power_governor pm_domain_always_on_gov; #ifdef CONFIG_CPU_IDLE extern struct dev_power_governor pm_domain_cpu_gov; #endif #else static inline struct generic_pm_domain_data *dev_gpd_data(struct device *dev) { return ERR_PTR(-ENOSYS); } static inline int pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev) { return -ENOSYS; } static inline int pm_genpd_remove_device(struct device *dev) { return -ENOSYS; } static inline int pm_genpd_add_subdomain(struct generic_pm_domain *genpd, struct generic_pm_domain *subdomain) { return -ENOSYS; } static inline int pm_genpd_remove_subdomain(struct generic_pm_domain *genpd, struct generic_pm_domain *subdomain) { return -ENOSYS; } static inline int pm_genpd_init(struct generic_pm_domain *genpd, struct dev_power_governor *gov, bool is_off) { return -ENOSYS; } static inline int pm_genpd_remove(struct generic_pm_domain *genpd) { return -EOPNOTSUPP; } static inline int dev_pm_genpd_set_performance_state(struct device *dev, unsigned int state) { return -EOPNOTSUPP; } static inline int dev_pm_genpd_add_notifier(struct device *dev, struct notifier_block *nb) { return -EOPNOTSUPP; } static inline int dev_pm_genpd_remove_notifier(struct device *dev) { return -EOPNOTSUPP; } static inline void dev_pm_genpd_set_next_wakeup(struct device *dev, ktime_t next) { } #define simple_qos_governor (*(struct dev_power_governor *)(NULL)) #define pm_domain_always_on_gov (*(struct dev_power_governor *)(NULL)) #endif #ifdef CONFIG_PM_GENERIC_DOMAINS_SLEEP void dev_pm_genpd_suspend(struct device *dev); void dev_pm_genpd_resume(struct device *dev); #else static inline void dev_pm_genpd_suspend(struct device *dev) {} static inline void dev_pm_genpd_resume(struct device *dev) {} #endif /* OF PM domain providers */ struct of_device_id; typedef struct generic_pm_domain *(*genpd_xlate_t)(struct of_phandle_args *args, void *data); struct genpd_onecell_data { struct generic_pm_domain **domains; unsigned int num_domains; genpd_xlate_t xlate; }; #ifdef CONFIG_PM_GENERIC_DOMAINS_OF int of_genpd_add_provider_simple(struct device_node *np, struct generic_pm_domain *genpd); int of_genpd_add_provider_onecell(struct device_node *np, struct genpd_onecell_data *data); void of_genpd_del_provider(struct device_node *np); int of_genpd_add_device(struct of_phandle_args *args, struct device *dev); int of_genpd_add_subdomain(struct of_phandle_args *parent_spec, struct of_phandle_args *subdomain_spec); int of_genpd_remove_subdomain(struct of_phandle_args *parent_spec, struct of_phandle_args *subdomain_spec); struct generic_pm_domain *of_genpd_remove_last(struct device_node *np); int of_genpd_parse_idle_states(struct device_node *dn, struct genpd_power_state **states, int *n); unsigned int pm_genpd_opp_to_performance_state(struct device *genpd_dev, struct dev_pm_opp *opp); int genpd_dev_pm_attach(struct device *dev); struct device *genpd_dev_pm_attach_by_id(struct device *dev, unsigned int index); struct device *genpd_dev_pm_attach_by_name(struct device *dev, const char *name); #else /* !CONFIG_PM_GENERIC_DOMAINS_OF */ static inline int of_genpd_add_provider_simple(struct device_node *np, struct generic_pm_domain *genpd) { return -EOPNOTSUPP; } static inline int of_genpd_add_provider_onecell(struct device_node *np, struct genpd_onecell_data *data) { return -EOPNOTSUPP; } static inline void of_genpd_del_provider(struct device_node *np) {} static inline int of_genpd_add_device(struct of_phandle_args *args, struct device *dev) { return -ENODEV; } static inline int of_genpd_add_subdomain(struct of_phandle_args *parent_spec, struct of_phandle_args *subdomain_spec) { return -ENODEV; } static inline int of_genpd_remove_subdomain(struct of_phandle_args *parent_spec, struct of_phandle_args *subdomain_spec) { return -ENODEV; } static inline int of_genpd_parse_idle_states(struct device_node *dn, struct genpd_power_state **states, int *n) { return -ENODEV; } static inline unsigned int pm_genpd_opp_to_performance_state(struct device *genpd_dev, struct dev_pm_opp *opp) { return 0; } static inline int genpd_dev_pm_attach(struct device *dev) { return 0; } static inline struct device *genpd_dev_pm_attach_by_id(struct device *dev, unsigned int index) { return NULL; } static inline struct device *genpd_dev_pm_attach_by_name(struct device *dev, const char *name) { return NULL; } static inline struct generic_pm_domain *of_genpd_remove_last(struct device_node *np) { return ERR_PTR(-EOPNOTSUPP); } #endif /* CONFIG_PM_GENERIC_DOMAINS_OF */ #ifdef CONFIG_PM int dev_pm_domain_attach(struct device *dev, bool power_on); struct device *dev_pm_domain_attach_by_id(struct device *dev, unsigned int index); struct device *dev_pm_domain_attach_by_name(struct device *dev, const char *name); void dev_pm_domain_detach(struct device *dev, bool power_off); int dev_pm_domain_start(struct device *dev); void dev_pm_domain_set(struct device *dev, struct dev_pm_domain *pd); #else static inline int dev_pm_domain_attach(struct device *dev, bool power_on) { return 0; } static inline struct device *dev_pm_domain_attach_by_id(struct device *dev, unsigned int index) { return NULL; } static inline struct device *dev_pm_domain_attach_by_name(struct device *dev, const char *name) { return NULL; } static inline void dev_pm_domain_detach(struct device *dev, bool power_off) {} static inline int dev_pm_domain_start(struct device *dev) { return 0; } static inline void dev_pm_domain_set(struct device *dev, struct dev_pm_domain *pd) {} #endif #endif /* _LINUX_PM_DOMAIN_H */ PK ! ye�_� � netlink.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_NETLINK_H #define __LINUX_NETLINK_H #include <linux/capability.h> #include <linux/skbuff.h> #include <linux/export.h> #include <net/scm.h> #include <uapi/linux/netlink.h> struct net; void do_trace_netlink_extack(const char *msg); static inline struct nlmsghdr *nlmsg_hdr(const struct sk_buff *skb) { return (struct nlmsghdr *)skb->data; } enum netlink_skb_flags { NETLINK_SKB_DST = 0x8, /* Dst set in sendto or sendmsg */ }; struct netlink_skb_parms { struct scm_creds creds; /* Skb credentials */ __u32 portid; __u32 dst_group; __u32 flags; struct sock *sk; bool nsid_is_set; int nsid; }; #define NETLINK_CB(skb) (*(struct netlink_skb_parms*)&((skb)->cb)) #define NETLINK_CREDS(skb) (&NETLINK_CB((skb)).creds) void netlink_table_grab(void); void netlink_table_ungrab(void); #define NL_CFG_F_NONROOT_RECV (1 << 0) #define NL_CFG_F_NONROOT_SEND (1 << 1) /* optional Netlink kernel configuration parameters */ struct netlink_kernel_cfg { unsigned int groups; unsigned int flags; void (*input)(struct sk_buff *skb); struct mutex *cb_mutex; int (*bind)(struct net *net, int group); void (*unbind)(struct net *net, int group); bool (*compare)(struct net *net, struct sock *sk); }; struct sock *__netlink_kernel_create(struct net *net, int unit, struct module *module, struct netlink_kernel_cfg *cfg); static inline struct sock * netlink_kernel_create(struct net *net, int unit, struct netlink_kernel_cfg *cfg) { return __netlink_kernel_create(net, unit, THIS_MODULE, cfg); } /* this can be increased when necessary - don't expose to userland */ #define NETLINK_MAX_COOKIE_LEN 20 /** * struct netlink_ext_ack - netlink extended ACK report struct * @_msg: message string to report - don't access directly, use * %NL_SET_ERR_MSG * @bad_attr: attribute with error * @policy: policy for a bad attribute * @cookie: cookie data to return to userspace (for success) * @cookie_len: actual cookie data length */ struct netlink_ext_ack { const char *_msg; const struct nlattr *bad_attr; const struct nla_policy *policy; u8 cookie[NETLINK_MAX_COOKIE_LEN]; u8 cookie_len; }; /* Always use this macro, this allows later putting the * message into a separate section or such for things * like translation or listing all possible messages. * Currently string formatting is not supported (due * to the lack of an output buffer.) */ #define NL_SET_ERR_MSG(extack, msg) do { \ static const char __msg[] = msg; \ struct netlink_ext_ack *__extack = (extack); \ \ do_trace_netlink_extack(__msg); \ \ if (__extack) \ __extack->_msg = __msg; \ } while (0) #define NL_SET_ERR_MSG_MOD(extack, msg) \ NL_SET_ERR_MSG((extack), KBUILD_MODNAME ": " msg) #define NL_SET_BAD_ATTR_POLICY(extack, attr, pol) do { \ if ((extack)) { \ (extack)->bad_attr = (attr); \ (extack)->policy = (pol); \ } \ } while (0) #define NL_SET_BAD_ATTR(extack, attr) NL_SET_BAD_ATTR_POLICY(extack, attr, NULL) #define NL_SET_ERR_MSG_ATTR_POL(extack, attr, pol, msg) do { \ static const char __msg[] = msg; \ struct netlink_ext_ack *__extack = (extack); \ \ do_trace_netlink_extack(__msg); \ \ if (__extack) { \ __extack->_msg = __msg; \ __extack->bad_attr = (attr); \ __extack->policy = (pol); \ } \ } while (0) #define NL_SET_ERR_MSG_ATTR(extack, attr, msg) \ NL_SET_ERR_MSG_ATTR_POL(extack, attr, NULL, msg) static inline void nl_set_extack_cookie_u64(struct netlink_ext_ack *extack, u64 cookie) { if (!extack) return; memcpy(extack->cookie, &cookie, sizeof(cookie)); extack->cookie_len = sizeof(cookie); } static inline void nl_set_extack_cookie_u32(struct netlink_ext_ack *extack, u32 cookie) { if (!extack) return; memcpy(extack->cookie, &cookie, sizeof(cookie)); extack->cookie_len = sizeof(cookie); } void netlink_kernel_release(struct sock *sk); int __netlink_change_ngroups(struct sock *sk, unsigned int groups); int netlink_change_ngroups(struct sock *sk, unsigned int groups); void __netlink_clear_multicast_users(struct sock *sk, unsigned int group); void netlink_ack(struct sk_buff *in_skb, struct nlmsghdr *nlh, int err, const struct netlink_ext_ack *extack); int netlink_has_listeners(struct sock *sk, unsigned int group); bool netlink_strict_get_check(struct sk_buff *skb); int netlink_unicast(struct sock *ssk, struct sk_buff *skb, __u32 portid, int nonblock); int netlink_broadcast(struct sock *ssk, struct sk_buff *skb, __u32 portid, __u32 group, gfp_t allocation); int netlink_broadcast_filtered(struct sock *ssk, struct sk_buff *skb, __u32 portid, __u32 group, gfp_t allocation, int (*filter)(struct sock *dsk, struct sk_buff *skb, void *data), void *filter_data); int netlink_set_err(struct sock *ssk, __u32 portid, __u32 group, int code); int netlink_register_notifier(struct notifier_block *nb); int netlink_unregister_notifier(struct notifier_block *nb); /* finegrained unicast helpers: */ struct sock *netlink_getsockbyfilp(struct file *filp); int netlink_attachskb(struct sock *sk, struct sk_buff *skb, long *timeo, struct sock *ssk); void netlink_detachskb(struct sock *sk, struct sk_buff *skb); int netlink_sendskb(struct sock *sk, struct sk_buff *skb); static inline struct sk_buff * netlink_skb_clone(struct sk_buff *skb, gfp_t gfp_mask) { struct sk_buff *nskb; nskb = skb_clone(skb, gfp_mask); if (!nskb) return NULL; /* This is a large skb, set destructor callback to release head */ if (is_vmalloc_addr(skb->head)) nskb->destructor = skb->destructor; return nskb; } /* * skb should fit one page. This choice is good for headerless malloc. * But we should limit to 8K so that userspace does not have to * use enormous buffer sizes on recvmsg() calls just to avoid * MSG_TRUNC when PAGE_SIZE is very large. */ #if PAGE_SIZE < 8192UL #define NLMSG_GOODSIZE SKB_WITH_OVERHEAD(PAGE_SIZE) #else #define NLMSG_GOODSIZE SKB_WITH_OVERHEAD(8192UL) #endif #define NLMSG_DEFAULT_SIZE (NLMSG_GOODSIZE - NLMSG_HDRLEN) struct netlink_callback { struct sk_buff *skb; const struct nlmsghdr *nlh; int (*dump)(struct sk_buff * skb, struct netlink_callback *cb); int (*done)(struct netlink_callback *cb); void *data; /* the module that dump function belong to */ struct module *module; struct netlink_ext_ack *extack; u16 family; u16 answer_flags; u32 min_dump_alloc; unsigned int prev_seq, seq; bool strict_check; union { u8 ctx[48]; /* args is deprecated. Cast a struct over ctx instead * for proper type safety. */ long args[6]; }; }; struct netlink_notify { struct net *net; u32 portid; int protocol; }; struct nlmsghdr * __nlmsg_put(struct sk_buff *skb, u32 portid, u32 seq, int type, int len, int flags); struct netlink_dump_control { int (*start)(struct netlink_callback *); int (*dump)(struct sk_buff *skb, struct netlink_callback *); int (*done)(struct netlink_callback *); void *data; struct module *module; u32 min_dump_alloc; }; int __netlink_dump_start(struct sock *ssk, struct sk_buff *skb, const struct nlmsghdr *nlh, struct netlink_dump_control *control); static inline int netlink_dump_start(struct sock *ssk, struct sk_buff *skb, const struct nlmsghdr *nlh, struct netlink_dump_control *control) { if (!control->module) control->module = THIS_MODULE; return __netlink_dump_start(ssk, skb, nlh, control); } struct netlink_tap { struct net_device *dev; struct module *module; struct list_head list; }; int netlink_add_tap(struct netlink_tap *nt); int netlink_remove_tap(struct netlink_tap *nt); bool __netlink_ns_capable(const struct netlink_skb_parms *nsp, struct user_namespace *ns, int cap); bool netlink_ns_capable(const struct sk_buff *skb, struct user_namespace *ns, int cap); bool netlink_capable(const struct sk_buff *skb, int cap); bool netlink_net_capable(const struct sk_buff *skb, int cap); #endif /* __LINUX_NETLINK_H */ PK ! ցi��& �& nvme-fc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2016 Avago Technologies. All rights reserved. */ /* * This file contains definitions relative to FC-NVME-2 r1.08 * (T11-2019-00210-v004). */ #ifndef _NVME_FC_H #define _NVME_FC_H 1 #include <uapi/scsi/fc/fc_fs.h> #define NVME_CMD_FORMAT_ID 0xFD #define NVME_CMD_FC_ID FC_TYPE_NVME /* FC-NVME Cmd IU Flags */ enum { FCNVME_CMD_FLAGS_DIRMASK = 0x03, FCNVME_CMD_FLAGS_WRITE = (1 << 0), FCNVME_CMD_FLAGS_READ = (1 << 1), FCNVME_CMD_FLAGS_PICWP = (1 << 2), }; enum { FCNVME_CMD_CAT_MASK = 0x0F, FCNVME_CMD_CAT_ADMINQ = 0x01, FCNVME_CMD_CAT_CSSMASK = 0x07, FCNVME_CMD_CAT_CSSFLAG = 0x08, }; static inline __u8 fccmnd_set_cat_admin(__u8 rsv_cat) { return (rsv_cat & ~FCNVME_CMD_CAT_MASK) | FCNVME_CMD_CAT_ADMINQ; } static inline __u8 fccmnd_set_cat_css(__u8 rsv_cat, __u8 css) { return (rsv_cat & ~FCNVME_CMD_CAT_MASK) | FCNVME_CMD_CAT_CSSFLAG | (css & FCNVME_CMD_CAT_CSSMASK); } struct nvme_fc_cmd_iu { __u8 format_id; __u8 fc_id; __be16 iu_len; __u8 rsvd4[2]; __u8 rsv_cat; __u8 flags; __be64 connection_id; __be32 csn; __be32 data_len; struct nvme_command sqe; __u8 dps; __u8 lbads; __be16 ms; __be32 rsvd92; }; #define NVME_FC_SIZEOF_ZEROS_RSP 12 enum { FCNVME_SC_SUCCESS = 0, FCNVME_SC_INVALID_FIELD = 1, /* reserved 2 */ FCNVME_SC_ILL_CONN_PARAMS = 3, }; struct nvme_fc_ersp_iu { __u8 ersp_result; __u8 rsvd1; __be16 iu_len; __be32 rsn; __be32 xfrd_len; __be32 rsvd12; struct nvme_completion cqe; /* for now - no additional payload */ }; #define FCNVME_NVME_SR_OPCODE 0x01 #define FCNVME_NVME_SR_RSP_OPCODE 0x02 struct nvme_fc_nvme_sr_iu { __u8 fc_id; __u8 opcode; __u8 rsvd2; __u8 retry_rctl; __be32 rsvd4; }; enum { FCNVME_SRSTAT_ACC = 0x0, /* reserved 0x1 */ /* reserved 0x2 */ FCNVME_SRSTAT_LOGICAL_ERR = 0x3, FCNVME_SRSTAT_INV_QUALIF = 0x4, FCNVME_SRSTAT_UNABL2PERFORM = 0x9, }; struct nvme_fc_nvme_sr_rsp_iu { __u8 fc_id; __u8 opcode; __u8 rsvd2; __u8 status; __be32 rsvd4; }; /* FC-NVME Link Services - LS cmd values (w0 bits 31:24) */ enum { FCNVME_LS_RSVD = 0, FCNVME_LS_RJT = 1, FCNVME_LS_ACC = 2, FCNVME_LS_CREATE_ASSOCIATION = 3, /* Create Association */ FCNVME_LS_CREATE_CONNECTION = 4, /* Create I/O Connection */ FCNVME_LS_DISCONNECT_ASSOC = 5, /* Disconnect Association */ FCNVME_LS_DISCONNECT_CONN = 6, /* Disconnect Connection */ }; /* FC-NVME Link Service Descriptors */ enum { FCNVME_LSDESC_RSVD = 0x0, FCNVME_LSDESC_RQST = 0x1, FCNVME_LSDESC_RJT = 0x2, FCNVME_LSDESC_CREATE_ASSOC_CMD = 0x3, FCNVME_LSDESC_CREATE_CONN_CMD = 0x4, FCNVME_LSDESC_DISCONN_CMD = 0x5, FCNVME_LSDESC_CONN_ID = 0x6, FCNVME_LSDESC_ASSOC_ID = 0x7, }; /* ********** start of Link Service Descriptors ********** */ /* * fills in length of a descriptor. Struture minus descriptor header */ static inline __be32 fcnvme_lsdesc_len(size_t sz) { return cpu_to_be32(sz - (2 * sizeof(u32))); } struct fcnvme_ls_rqst_w0 { u8 ls_cmd; /* FCNVME_LS_xxx */ u8 zeros[3]; }; /* FCNVME_LSDESC_RQST */ struct fcnvme_lsdesc_rqst { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; struct fcnvme_ls_rqst_w0 w0; __be32 rsvd12; }; /* FC-NVME LS RJT reason_code values */ enum fcnvme_ls_rjt_reason { FCNVME_RJT_RC_NONE = 0, /* no reason - not to be sent */ FCNVME_RJT_RC_INVAL = 0x01, /* invalid NVMe_LS command code */ FCNVME_RJT_RC_LOGIC = 0x03, /* logical error */ FCNVME_RJT_RC_UNAB = 0x09, /* unable to perform command request */ FCNVME_RJT_RC_UNSUP = 0x0b, /* command not supported */ FCNVME_RJT_RC_INV_ASSOC = 0x40, /* Invalid Association ID */ FCNVME_RJT_RC_INV_CONN = 0x41, /* Invalid Connection ID */ FCNVME_RJT_RC_INV_PARAM = 0x42, /* Invalid Parameters */ FCNVME_RJT_RC_INSUF_RES = 0x43, /* Insufficient Resources */ FCNVME_RJT_RC_VENDOR = 0xff, /* vendor specific error */ }; /* FC-NVME LS RJT reason_explanation values */ enum fcnvme_ls_rjt_explan { FCNVME_RJT_EXP_NONE = 0x00, /* No additional explanation */ FCNVME_RJT_EXP_OXID_RXID = 0x17, /* invalid OX_ID-RX_ID combination */ FCNVME_RJT_EXP_UNAB_DATA = 0x2a, /* unable to supply requested data */ FCNVME_RJT_EXP_INV_LEN = 0x2d, /* Invalid payload length */ FCNVME_RJT_EXP_INV_ERSP_RAT = 0x40, /* Invalid NVMe_ERSP Ratio */ FCNVME_RJT_EXP_INV_CTLR_ID = 0x41, /* Invalid Controller ID */ FCNVME_RJT_EXP_INV_QUEUE_ID = 0x42, /* Invalid Queue ID */ FCNVME_RJT_EXP_INV_SQSIZE = 0x43, /* Invalid Submission Queue Size */ FCNVME_RJT_EXP_INV_HOSTID = 0x44, /* Invalid HOST ID */ FCNVME_RJT_EXP_INV_HOSTNQN = 0x45, /* Invalid HOSTNQN */ FCNVME_RJT_EXP_INV_SUBNQN = 0x46, /* Invalid SUBNQN */ }; /* FCNVME_LSDESC_RJT */ struct fcnvme_lsdesc_rjt { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; u8 rsvd8; /* * Reject reason and explanaction codes are generic * to ELs's from LS-3. */ u8 reason_code; /* fcnvme_ls_rjt_reason */ u8 reason_explanation; /* fcnvme_ls_rjt_explan */ u8 vendor; __be32 rsvd12; }; #define FCNVME_ASSOC_HOSTNQN_LEN 256 #define FCNVME_ASSOC_SUBNQN_LEN 256 /* FCNVME_LSDESC_CREATE_ASSOC_CMD */ struct fcnvme_lsdesc_cr_assoc_cmd { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; __be16 ersp_ratio; __be16 rsvd10; __be32 rsvd12[9]; __be16 cntlid; __be16 sqsize; __be32 rsvd52; uuid_t hostid; u8 hostnqn[FCNVME_ASSOC_HOSTNQN_LEN]; u8 subnqn[FCNVME_ASSOC_SUBNQN_LEN]; __be32 rsvd584[108]; /* pad to 1016 bytes, * which makes overall LS rqst * payload 1024 bytes */ }; #define FCNVME_LSDESC_CRA_CMD_DESC_MINLEN \ offsetof(struct fcnvme_lsdesc_cr_assoc_cmd, rsvd584) #define FCNVME_LSDESC_CRA_CMD_DESC_MIN_DESCLEN \ (FCNVME_LSDESC_CRA_CMD_DESC_MINLEN - \ offsetof(struct fcnvme_lsdesc_cr_assoc_cmd, ersp_ratio)) /* FCNVME_LSDESC_CREATE_CONN_CMD */ struct fcnvme_lsdesc_cr_conn_cmd { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; __be16 ersp_ratio; __be16 rsvd10; __be32 rsvd12[9]; __be16 qid; __be16 sqsize; __be32 rsvd52; }; /* FCNVME_LSDESC_DISCONN_CMD */ struct fcnvme_lsdesc_disconn_cmd { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; __be32 rsvd8[4]; }; /* FCNVME_LSDESC_CONN_ID */ struct fcnvme_lsdesc_conn_id { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; __be64 connection_id; }; /* FCNVME_LSDESC_ASSOC_ID */ struct fcnvme_lsdesc_assoc_id { __be32 desc_tag; /* FCNVME_LSDESC_xxx */ __be32 desc_len; __be64 association_id; }; /* r_ctl values */ enum { FCNVME_RS_RCTL_CMND = 0x6, FCNVME_RS_RCTL_DATA = 0x1, FCNVME_RS_RCTL_CONF = 0x3, FCNVME_RS_RCTL_SR = 0x9, FCNVME_RS_RCTL_XFER_RDY = 0x5, FCNVME_RS_RCTL_RSP = 0x7, FCNVME_RS_RCTL_ERSP = 0x8, FCNVME_RS_RCTL_SR_RSP = 0xA, }; /* ********** start of Link Services ********** */ /* FCNVME_LS_RJT */ struct fcnvme_ls_rjt { struct fcnvme_ls_rqst_w0 w0; __be32 desc_list_len; struct fcnvme_lsdesc_rqst rqst; struct fcnvme_lsdesc_rjt rjt; }; /* FCNVME_LS_ACC */ struct fcnvme_ls_acc_hdr { struct fcnvme_ls_rqst_w0 w0; __be32 desc_list_len; struct fcnvme_lsdesc_rqst rqst; /* * Followed by cmd-specific ACCEPT descriptors, see xxx_acc * definitions below */ }; /* FCNVME_LS_CREATE_ASSOCIATION */ struct fcnvme_ls_cr_assoc_rqst { struct fcnvme_ls_rqst_w0 w0; __be32 desc_list_len; struct fcnvme_lsdesc_cr_assoc_cmd assoc_cmd; }; #define FCNVME_LSDESC_CRA_RQST_MINLEN \ (offsetof(struct fcnvme_ls_cr_assoc_rqst, assoc_cmd) + \ FCNVME_LSDESC_CRA_CMD_DESC_MINLEN) #define FCNVME_LSDESC_CRA_RQST_MIN_LISTLEN \ FCNVME_LSDESC_CRA_CMD_DESC_MINLEN struct fcnvme_ls_cr_assoc_acc { struct fcnvme_ls_acc_hdr hdr; struct fcnvme_lsdesc_assoc_id associd; struct fcnvme_lsdesc_conn_id connectid; }; /* FCNVME_LS_CREATE_CONNECTION */ struct fcnvme_ls_cr_conn_rqst { struct fcnvme_ls_rqst_w0 w0; __be32 desc_list_len; struct fcnvme_lsdesc_assoc_id associd; struct fcnvme_lsdesc_cr_conn_cmd connect_cmd; }; struct fcnvme_ls_cr_conn_acc { struct fcnvme_ls_acc_hdr hdr; struct fcnvme_lsdesc_conn_id connectid; }; /* FCNVME_LS_DISCONNECT_ASSOC */ struct fcnvme_ls_disconnect_assoc_rqst { struct fcnvme_ls_rqst_w0 w0; __be32 desc_list_len; struct fcnvme_lsdesc_assoc_id associd; struct fcnvme_lsdesc_disconn_cmd discon_cmd; }; struct fcnvme_ls_disconnect_assoc_acc { struct fcnvme_ls_acc_hdr hdr; }; /* FCNVME_LS_DISCONNECT_CONN */ struct fcnvme_ls_disconnect_conn_rqst { struct fcnvme_ls_rqst_w0 w0; __be32 desc_list_len; struct fcnvme_lsdesc_assoc_id associd; struct fcnvme_lsdesc_conn_id connectid; }; struct fcnvme_ls_disconnect_conn_acc { struct fcnvme_ls_acc_hdr hdr; }; /* * Default R_A_TOV is pulled in from fc_fs.h but needs conversion * from ms to seconds for our use. */ #define FC_TWO_TIMES_R_A_TOV (2 * (FC_DEF_R_A_TOV / 1000)) #define NVME_FC_LS_TIMEOUT_SEC FC_TWO_TIMES_R_A_TOV #define NVME_FC_TGTOP_TIMEOUT_SEC FC_TWO_TIMES_R_A_TOV /* * TRADDR string must be of form "nn-<16hexdigits>:pn-<16hexdigits>" * the string is allowed to be specified with or without a "0x" prefix * infront of the <16hexdigits>. Without is considered the "min" string * and with is considered the "max" string. The hexdigits may be upper * or lower case. * Note: FC-NVME-2 standard requires a "0x" prefix. */ #define NVME_FC_TRADDR_NNLEN 3 /* "?n-" */ #define NVME_FC_TRADDR_OXNNLEN 5 /* "?n-0x" */ #define NVME_FC_TRADDR_HEXNAMELEN 16 #define NVME_FC_TRADDR_MINLENGTH \ (2 * (NVME_FC_TRADDR_NNLEN + NVME_FC_TRADDR_HEXNAMELEN) + 1) #define NVME_FC_TRADDR_MAXLENGTH \ (2 * (NVME_FC_TRADDR_OXNNLEN + NVME_FC_TRADDR_HEXNAMELEN) + 1) #define NVME_FC_TRADDR_MIN_PN_OFFSET \ (NVME_FC_TRADDR_NNLEN + NVME_FC_TRADDR_HEXNAMELEN + 1) #define NVME_FC_TRADDR_MAX_PN_OFFSET \ (NVME_FC_TRADDR_OXNNLEN + NVME_FC_TRADDR_HEXNAMELEN + 1) #endif /* _NVME_FC_H */ PK ! ~�]�u u dlm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** ******************************************************************************* ** ** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved. ** Copyright (C) 2004-2011 Red Hat, Inc. All rights reserved. ** ** ******************************************************************************* ******************************************************************************/ #ifndef __DLM_DOT_H__ #define __DLM_DOT_H__ #include <uapi/linux/dlm.h> struct dlm_slot { int nodeid; /* 1 to MAX_INT */ int slot; /* 1 to MAX_INT */ }; /* * recover_prep: called before the dlm begins lock recovery. * Notfies lockspace user that locks from failed members will be granted. * recover_slot: called after recover_prep and before recover_done. * Identifies a failed lockspace member. * recover_done: called after the dlm completes lock recovery. * Identifies lockspace members and lockspace generation number. */ struct dlm_lockspace_ops { void (*recover_prep) (void *ops_arg); void (*recover_slot) (void *ops_arg, struct dlm_slot *slot); void (*recover_done) (void *ops_arg, struct dlm_slot *slots, int num_slots, int our_slot, uint32_t generation); }; /* * dlm_new_lockspace * * Create/join a lockspace. * * name: lockspace name, null terminated, up to DLM_LOCKSPACE_LEN (not * including terminating null). * * cluster: cluster name, null terminated, up to DLM_LOCKSPACE_LEN (not * including terminating null). Optional. When cluster is null, it * is not used. When set, dlm_new_lockspace() returns -EBADR if cluster * is not equal to the dlm cluster name. * * flags: * DLM_LSFL_NODIR * The dlm should not use a resource directory, but statically assign * resource mastery to nodes based on the name hash that is otherwise * used to select the directory node. Must be the same on all nodes. * DLM_LSFL_TIMEWARN * The dlm should emit netlink messages if locks have been waiting * for a configurable amount of time. (Unused.) * DLM_LSFL_FS * The lockspace user is in the kernel (i.e. filesystem). Enables * direct bast/cast callbacks. * DLM_LSFL_NEWEXCL * dlm_new_lockspace() should return -EEXIST if the lockspace exists. * * lvblen: length of lvb in bytes. Must be multiple of 8. * dlm_new_lockspace() returns an error if this does not match * what other nodes are using. * * ops: callbacks that indicate lockspace recovery points so the * caller can coordinate its recovery and know lockspace members. * This is only used by the initial dlm_new_lockspace() call. * Optional. * * ops_arg: arg for ops callbacks. * * ops_result: tells caller if the ops callbacks (if provided) will * be used or not. 0: will be used, -EXXX will not be used. * -EOPNOTSUPP: the dlm does not have recovery_callbacks enabled. * * lockspace: handle for dlm functions */ int dlm_new_lockspace(const char *name, const char *cluster, uint32_t flags, int lvblen, const struct dlm_lockspace_ops *ops, void *ops_arg, int *ops_result, dlm_lockspace_t **lockspace); /* * dlm_release_lockspace * * Stop a lockspace. */ int dlm_release_lockspace(dlm_lockspace_t *lockspace, int force); /* * dlm_lock * * Make an asynchronous request to acquire or convert a lock on a named * resource. * * lockspace: context for the request * mode: the requested mode of the lock (DLM_LOCK_) * lksb: lock status block for input and async return values * flags: input flags (DLM_LKF_) * name: name of the resource to lock, can be binary * namelen: the length in bytes of the resource name (MAX_RESNAME_LEN) * parent: the lock ID of a parent lock or 0 if none * lockast: function DLM executes when it completes processing the request * astarg: argument passed to lockast and bast functions * bast: function DLM executes when this lock later blocks another request * * Returns: * 0 if request is successfully queued for processing * -EINVAL if any input parameters are invalid * -EAGAIN if request would block and is flagged DLM_LKF_NOQUEUE * -ENOMEM if there is no memory to process request * -ENOTCONN if there is a communication error * * If the call to dlm_lock returns an error then the operation has failed and * the AST routine will not be called. If dlm_lock returns 0 it is still * possible that the lock operation will fail. The AST routine will be called * when the locking is complete and the status is returned in the lksb. * * If the AST routines or parameter are passed to a conversion operation then * they will overwrite those values that were passed to a previous dlm_lock * call. * * AST routines should not block (at least not for long), but may make * any locking calls they please. */ int dlm_lock(dlm_lockspace_t *lockspace, int mode, struct dlm_lksb *lksb, uint32_t flags, void *name, unsigned int namelen, uint32_t parent_lkid, void (*lockast) (void *astarg), void *astarg, void (*bast) (void *astarg, int mode)); /* * dlm_unlock * * Asynchronously release a lock on a resource. The AST routine is called * when the resource is successfully unlocked. * * lockspace: context for the request * lkid: the lock ID as returned in the lksb * flags: input flags (DLM_LKF_) * lksb: if NULL the lksb parameter passed to last lock request is used * astarg: the arg used with the completion ast for the unlock * * Returns: * 0 if request is successfully queued for processing * -EINVAL if any input parameters are invalid * -ENOTEMPTY if the lock still has sublocks * -EBUSY if the lock is waiting for a remote lock operation * -ENOTCONN if there is a communication error */ int dlm_unlock(dlm_lockspace_t *lockspace, uint32_t lkid, uint32_t flags, struct dlm_lksb *lksb, void *astarg); #endif /* __DLM_DOT_H__ */ PK ! ����D �D tcp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Definitions for the TCP protocol. * * Version: @(#)tcp.h 1.0.2 04/28/93 * * Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> */ #ifndef _LINUX_TCP_H #define _LINUX_TCP_H #include <linux/skbuff.h> #include <linux/win_minmax.h> #include <net/sock.h> #include <net/inet_connection_sock.h> #include <net/inet_timewait_sock.h> #include <uapi/linux/tcp.h> static inline struct tcphdr *tcp_hdr(const struct sk_buff *skb) { return (struct tcphdr *)skb_transport_header(skb); } static inline unsigned int __tcp_hdrlen(const struct tcphdr *th) { return th->doff * 4; } static inline unsigned int tcp_hdrlen(const struct sk_buff *skb) { return __tcp_hdrlen(tcp_hdr(skb)); } static inline struct tcphdr *inner_tcp_hdr(const struct sk_buff *skb) { return (struct tcphdr *)skb_inner_transport_header(skb); } static inline unsigned int inner_tcp_hdrlen(const struct sk_buff *skb) { return inner_tcp_hdr(skb)->doff * 4; } static inline unsigned int tcp_optlen(const struct sk_buff *skb) { return (tcp_hdr(skb)->doff - 5) * 4; } /* TCP Fast Open */ #define TCP_FASTOPEN_COOKIE_MIN 4 /* Min Fast Open Cookie size in bytes */ #define TCP_FASTOPEN_COOKIE_MAX 16 /* Max Fast Open Cookie size in bytes */ #define TCP_FASTOPEN_COOKIE_SIZE 8 /* the size employed by this impl. */ /* TCP Fast Open Cookie as stored in memory */ struct tcp_fastopen_cookie { __le64 val[DIV_ROUND_UP(TCP_FASTOPEN_COOKIE_MAX, sizeof(u64))]; s8 len; bool exp; /* In RFC6994 experimental option format */ }; /* This defines a selective acknowledgement block. */ struct tcp_sack_block_wire { __be32 start_seq; __be32 end_seq; }; struct tcp_sack_block { u32 start_seq; u32 end_seq; }; /*These are used to set the sack_ok field in struct tcp_options_received */ #define TCP_SACK_SEEN (1 << 0) /*1 = peer is SACK capable, */ #define TCP_DSACK_SEEN (1 << 2) /*1 = DSACK was received from peer*/ struct tcp_options_received { /* PAWS/RTTM data */ int ts_recent_stamp;/* Time we stored ts_recent (for aging) */ u32 ts_recent; /* Time stamp to echo next */ u32 rcv_tsval; /* Time stamp value */ u32 rcv_tsecr; /* Time stamp echo reply */ u16 saw_tstamp : 1, /* Saw TIMESTAMP on last packet */ tstamp_ok : 1, /* TIMESTAMP seen on SYN packet */ dsack : 1, /* D-SACK is scheduled */ wscale_ok : 1, /* Wscale seen on SYN packet */ sack_ok : 3, /* SACK seen on SYN packet */ smc_ok : 1, /* SMC seen on SYN packet */ snd_wscale : 4, /* Window scaling received from sender */ rcv_wscale : 4; /* Window scaling to send to receiver */ u8 saw_unknown:1, /* Received unknown option */ unused:7; u8 num_sacks; /* Number of SACK blocks */ u16 user_mss; /* mss requested by user in ioctl */ u16 mss_clamp; /* Maximal mss, negotiated at connection setup */ }; static inline void tcp_clear_options(struct tcp_options_received *rx_opt) { rx_opt->tstamp_ok = rx_opt->sack_ok = 0; rx_opt->wscale_ok = rx_opt->snd_wscale = 0; #if IS_ENABLED(CONFIG_SMC) rx_opt->smc_ok = 0; #endif } /* This is the max number of SACKS that we'll generate and process. It's safe * to increase this, although since: * size = TCPOLEN_SACK_BASE_ALIGNED (4) + n * TCPOLEN_SACK_PERBLOCK (8) * only four options will fit in a standard TCP header */ #define TCP_NUM_SACKS 4 struct tcp_request_sock_ops; struct tcp_request_sock { struct inet_request_sock req; const struct tcp_request_sock_ops *af_specific; u64 snt_synack; /* first SYNACK sent time */ bool tfo_listener; bool is_mptcp; #if IS_ENABLED(CONFIG_MPTCP) bool drop_req; #endif u32 txhash; u32 rcv_isn; u32 snt_isn; u32 ts_off; u32 last_oow_ack_time; /* last SYNACK */ u32 rcv_nxt; /* the ack # by SYNACK. For * FastOpen it's the seq# * after data-in-SYN. */ u8 syn_tos; }; static inline struct tcp_request_sock *tcp_rsk(const struct request_sock *req) { return (struct tcp_request_sock *)req; } struct tcp_sock { /* inet_connection_sock has to be the first member of tcp_sock */ struct inet_connection_sock inet_conn; u16 tcp_header_len; /* Bytes of tcp header to send */ u16 gso_segs; /* Max number of segs per GSO packet */ /* * Header prediction flags * 0x5?10 << 16 + snd_wnd in net byte order */ __be32 pred_flags; /* * RFC793 variables by their proper names. This means you can * read the code and the spec side by side (and laugh ...) * See RFC793 and RFC1122. The RFC writes these in capitals. */ u64 bytes_received; /* RFC4898 tcpEStatsAppHCThruOctetsReceived * sum(delta(rcv_nxt)), or how many bytes * were acked. */ u32 segs_in; /* RFC4898 tcpEStatsPerfSegsIn * total number of segments in. */ u32 data_segs_in; /* RFC4898 tcpEStatsPerfDataSegsIn * total number of data segments in. */ u32 rcv_nxt; /* What we want to receive next */ u32 copied_seq; /* Head of yet unread data */ u32 rcv_wup; /* rcv_nxt on last window update sent */ u32 snd_nxt; /* Next sequence we send */ u32 segs_out; /* RFC4898 tcpEStatsPerfSegsOut * The total number of segments sent. */ u32 data_segs_out; /* RFC4898 tcpEStatsPerfDataSegsOut * total number of data segments sent. */ u64 bytes_sent; /* RFC4898 tcpEStatsPerfHCDataOctetsOut * total number of data bytes sent. */ u64 bytes_acked; /* RFC4898 tcpEStatsAppHCThruOctetsAcked * sum(delta(snd_una)), or how many bytes * were acked. */ u32 dsack_dups; /* RFC4898 tcpEStatsStackDSACKDups * total number of DSACK blocks received */ u32 snd_una; /* First byte we want an ack for */ u32 snd_sml; /* Last byte of the most recently transmitted small packet */ u32 rcv_tstamp; /* timestamp of last received ACK (for keepalives) */ u32 lsndtime; /* timestamp of last sent data packet (for restart window) */ u32 last_oow_ack_time; /* timestamp of last out-of-window ACK */ u32 compressed_ack_rcv_nxt; u32 tsoffset; /* timestamp offset */ struct list_head tsq_node; /* anchor in tsq_tasklet.head list */ struct list_head tsorted_sent_queue; /* time-sorted sent but un-SACKed skbs */ u32 snd_wl1; /* Sequence for window update */ u32 snd_wnd; /* The window we expect to receive */ u32 max_window; /* Maximal window ever seen from peer */ u32 mss_cache; /* Cached effective mss, not including SACKS */ u32 window_clamp; /* Maximal window to advertise */ u32 rcv_ssthresh; /* Current window clamp */ /* Information of the most recently (s)acked skb */ struct tcp_rack { u64 mstamp; /* (Re)sent time of the skb */ u32 rtt_us; /* Associated RTT */ u32 end_seq; /* Ending TCP sequence of the skb */ u32 last_delivered; /* tp->delivered at last reo_wnd adj */ u8 reo_wnd_steps; /* Allowed reordering window */ #define TCP_RACK_RECOVERY_THRESH 16 u8 reo_wnd_persist:5, /* No. of recovery since last adj */ dsack_seen:1, /* Whether DSACK seen after last adj */ advanced:1; /* mstamp advanced since last lost marking */ } rack; u16 advmss; /* Advertised MSS */ u8 compressed_ack; u8 dup_ack_counter:2, tlp_retrans:1, /* TLP is a retransmission */ unused:5; u32 chrono_start; /* Start time in jiffies of a TCP chrono */ u32 chrono_stat[3]; /* Time in jiffies for chrono_stat stats */ u8 chrono_type:2, /* current chronograph type */ rate_app_limited:1, /* rate_{delivered,interval_us} limited? */ fastopen_connect:1, /* FASTOPEN_CONNECT sockopt */ fastopen_no_cookie:1, /* Allow send/recv SYN+data without a cookie */ is_sack_reneg:1, /* in recovery from loss with SACK reneg? */ fastopen_client_fail:2; /* reason why fastopen failed */ u8 nonagle : 4,/* Disable Nagle algorithm? */ thin_lto : 1,/* Use linear timeouts for thin streams */ recvmsg_inq : 1,/* Indicate # of bytes in queue upon recvmsg */ repair : 1, frto : 1;/* F-RTO (RFC5682) activated in CA_Loss */ u8 repair_queue; u8 save_syn:2, /* Save headers of SYN packet */ syn_data:1, /* SYN includes data */ syn_fastopen:1, /* SYN includes Fast Open option */ syn_fastopen_exp:1,/* SYN includes Fast Open exp. option */ syn_fastopen_ch:1, /* Active TFO re-enabling probe */ syn_data_acked:1,/* data in SYN is acked by SYN-ACK */ is_cwnd_limited:1;/* forward progress limited by snd_cwnd? */ u32 tlp_high_seq; /* snd_nxt at the time of TLP */ u32 tcp_tx_delay; /* delay (in usec) added to TX packets */ u64 tcp_wstamp_ns; /* departure time for next sent data packet */ u64 tcp_clock_cache; /* cache last tcp_clock_ns() (see tcp_mstamp_refresh()) */ /* RTT measurement */ u64 tcp_mstamp; /* most recent packet received/sent */ u32 srtt_us; /* smoothed round trip time << 3 in usecs */ u32 mdev_us; /* medium deviation */ u32 mdev_max_us; /* maximal mdev for the last rtt period */ u32 rttvar_us; /* smoothed mdev_max */ u32 rtt_seq; /* sequence number to update rttvar */ struct minmax rtt_min; u32 packets_out; /* Packets which are "in flight" */ u32 retrans_out; /* Retransmitted packets out */ u32 max_packets_out; /* max packets_out in last window */ u32 cwnd_usage_seq; /* right edge of cwnd usage tracking flight */ u16 urg_data; /* Saved octet of OOB data and control flags */ u8 ecn_flags; /* ECN status bits. */ u8 keepalive_probes; /* num of allowed keep alive probes */ u32 reordering; /* Packet reordering metric. */ u32 reord_seen; /* number of data packet reordering events */ u32 snd_up; /* Urgent pointer */ /* * Options received (usually on last packet, some only on SYN packets). */ struct tcp_options_received rx_opt; /* * Slow start and congestion control (see also Nagle, and Karn & Partridge) */ u32 snd_ssthresh; /* Slow start size threshold */ u32 snd_cwnd; /* Sending congestion window */ u32 snd_cwnd_cnt; /* Linear increase counter */ u32 snd_cwnd_clamp; /* Do not allow snd_cwnd to grow above this */ u32 snd_cwnd_used; u32 snd_cwnd_stamp; u32 prior_cwnd; /* cwnd right before starting loss recovery */ u32 prr_delivered; /* Number of newly delivered packets to * receiver in Recovery. */ u32 prr_out; /* Total number of pkts sent during Recovery. */ u32 delivered; /* Total data packets delivered incl. rexmits */ u32 delivered_ce; /* Like the above but only ECE marked packets */ u32 lost; /* Total data packets lost incl. rexmits */ u32 app_limited; /* limited until "delivered" reaches this val */ u64 first_tx_mstamp; /* start of window send phase */ u64 delivered_mstamp; /* time we reached "delivered" */ u32 rate_delivered; /* saved rate sample: packets delivered */ u32 rate_interval_us; /* saved rate sample: time elapsed */ u32 rcv_wnd; /* Current receiver window */ u32 write_seq; /* Tail(+1) of data held in tcp send buffer */ u32 notsent_lowat; /* TCP_NOTSENT_LOWAT */ u32 pushed_seq; /* Last pushed seq, required to talk to windows */ u32 lost_out; /* Lost packets */ u32 sacked_out; /* SACK'd packets */ struct hrtimer pacing_timer; struct hrtimer compressed_ack_timer; /* from STCP, retrans queue hinting */ struct sk_buff* lost_skb_hint; struct sk_buff *retransmit_skb_hint; /* OOO segments go in this rbtree. Socket lock must be held. */ struct rb_root out_of_order_queue; struct sk_buff *ooo_last_skb; /* cache rb_last(out_of_order_queue) */ /* SACKs data, these 2 need to be together (see tcp_options_write) */ struct tcp_sack_block duplicate_sack[1]; /* D-SACK block */ struct tcp_sack_block selective_acks[4]; /* The SACKS themselves*/ struct tcp_sack_block recv_sack_cache[4]; struct sk_buff *highest_sack; /* skb just after the highest * skb with SACKed bit set * (validity guaranteed only if * sacked_out > 0) */ int lost_cnt_hint; u32 prior_ssthresh; /* ssthresh saved at recovery start */ u32 high_seq; /* snd_nxt at onset of congestion */ u32 retrans_stamp; /* Timestamp of the last retransmit, * also used in SYN-SENT to remember stamp of * the first SYN. */ u32 undo_marker; /* snd_una upon a new recovery episode. */ int undo_retrans; /* number of undoable retransmissions. */ u64 bytes_retrans; /* RFC4898 tcpEStatsPerfOctetsRetrans * Total data bytes retransmitted */ u32 total_retrans; /* Total retransmits for entire connection */ u32 urg_seq; /* Seq of received urgent pointer */ unsigned int keepalive_time; /* time before keep alive takes place */ unsigned int keepalive_intvl; /* time interval between keep alive probes */ int linger2; /* Sock_ops bpf program related variables */ #ifdef CONFIG_BPF u8 bpf_sock_ops_cb_flags; /* Control calling BPF programs * values defined in uapi/linux/tcp.h */ #define BPF_SOCK_OPS_TEST_FLAG(TP, ARG) (TP->bpf_sock_ops_cb_flags & ARG) #else #define BPF_SOCK_OPS_TEST_FLAG(TP, ARG) 0 #endif u16 timeout_rehash; /* Timeout-triggered rehash attempts */ u32 rcv_ooopack; /* Received out-of-order packets, for tcpinfo */ /* Receiver side RTT estimation */ u32 rcv_rtt_last_tsecr; struct { u32 rtt_us; u32 seq; u64 time; } rcv_rtt_est; /* Receiver queue space */ struct { u32 space; u32 seq; u64 time; } rcvq_space; /* TCP-specific MTU probe information. */ struct { u32 probe_seq_start; u32 probe_seq_end; } mtu_probe; u32 mtu_info; /* We received an ICMP_FRAG_NEEDED / ICMPV6_PKT_TOOBIG * while socket was owned by user. */ #if IS_ENABLED(CONFIG_MPTCP) bool is_mptcp; #endif #if IS_ENABLED(CONFIG_SMC) bool syn_smc; /* SYN includes SMC */ #endif #ifdef CONFIG_TCP_MD5SIG /* TCP AF-Specific parts; only used by MD5 Signature support so far */ const struct tcp_sock_af_ops *af_specific; /* TCP MD5 Signature Option information */ struct tcp_md5sig_info __rcu *md5sig_info; #endif /* TCP fastopen related information */ struct tcp_fastopen_request *fastopen_req; /* fastopen_rsk points to request_sock that resulted in this big * socket. Used to retransmit SYNACKs etc. */ struct request_sock __rcu *fastopen_rsk; struct saved_syn *saved_syn; }; enum tsq_enum { TSQ_THROTTLED, TSQ_QUEUED, TCP_TSQ_DEFERRED, /* tcp_tasklet_func() found socket was owned */ TCP_WRITE_TIMER_DEFERRED, /* tcp_write_timer() found socket was owned */ TCP_DELACK_TIMER_DEFERRED, /* tcp_delack_timer() found socket was owned */ TCP_MTU_REDUCED_DEFERRED, /* tcp_v{4|6}_err() could not call * tcp_v{4|6}_mtu_reduced() */ }; enum tsq_flags { TSQF_THROTTLED = (1UL << TSQ_THROTTLED), TSQF_QUEUED = (1UL << TSQ_QUEUED), TCPF_TSQ_DEFERRED = (1UL << TCP_TSQ_DEFERRED), TCPF_WRITE_TIMER_DEFERRED = (1UL << TCP_WRITE_TIMER_DEFERRED), TCPF_DELACK_TIMER_DEFERRED = (1UL << TCP_DELACK_TIMER_DEFERRED), TCPF_MTU_REDUCED_DEFERRED = (1UL << TCP_MTU_REDUCED_DEFERRED), }; static inline struct tcp_sock *tcp_sk(const struct sock *sk) { return (struct tcp_sock *)sk; } struct tcp_timewait_sock { struct inet_timewait_sock tw_sk; #define tw_rcv_nxt tw_sk.__tw_common.skc_tw_rcv_nxt #define tw_snd_nxt tw_sk.__tw_common.skc_tw_snd_nxt u32 tw_rcv_wnd; u32 tw_ts_offset; u32 tw_ts_recent; /* The time we sent the last out-of-window ACK: */ u32 tw_last_oow_ack_time; int tw_ts_recent_stamp; u32 tw_tx_delay; #ifdef CONFIG_TCP_MD5SIG struct tcp_md5sig_key *tw_md5_key; #endif }; static inline struct tcp_timewait_sock *tcp_twsk(const struct sock *sk) { return (struct tcp_timewait_sock *)sk; } static inline bool tcp_passive_fastopen(const struct sock *sk) { return sk->sk_state == TCP_SYN_RECV && rcu_access_pointer(tcp_sk(sk)->fastopen_rsk) != NULL; } static inline void fastopen_queue_tune(struct sock *sk, int backlog) { struct request_sock_queue *queue = &inet_csk(sk)->icsk_accept_queue; int somaxconn = READ_ONCE(sock_net(sk)->core.sysctl_somaxconn); WRITE_ONCE(queue->fastopenq.max_qlen, min_t(unsigned int, backlog, somaxconn)); } static inline void tcp_move_syn(struct tcp_sock *tp, struct request_sock *req) { tp->saved_syn = req->saved_syn; req->saved_syn = NULL; } static inline void tcp_saved_syn_free(struct tcp_sock *tp) { kfree(tp->saved_syn); tp->saved_syn = NULL; } static inline u32 tcp_saved_syn_len(const struct saved_syn *saved_syn) { return saved_syn->mac_hdrlen + saved_syn->network_hdrlen + saved_syn->tcp_hdrlen; } struct sk_buff *tcp_get_timestamping_opt_stats(const struct sock *sk, const struct sk_buff *orig_skb, const struct sk_buff *ack_skb); static inline u16 tcp_mss_clamp(const struct tcp_sock *tp, u16 mss) { /* We use READ_ONCE() here because socket might not be locked. * This happens for listeners. */ u16 user_mss = READ_ONCE(tp->rx_opt.user_mss); return (user_mss && user_mss < mss) ? user_mss : mss; } int tcp_skb_shift(struct sk_buff *to, struct sk_buff *from, int pcount, int shiftlen); void tcp_sock_set_cork(struct sock *sk, bool on); int tcp_sock_set_keepcnt(struct sock *sk, int val); int tcp_sock_set_keepidle_locked(struct sock *sk, int val); int tcp_sock_set_keepidle(struct sock *sk, int val); int tcp_sock_set_keepintvl(struct sock *sk, int val); void tcp_sock_set_nodelay(struct sock *sk); void tcp_sock_set_quickack(struct sock *sk, int val); int tcp_sock_set_syncnt(struct sock *sk, int val); void tcp_sock_set_user_timeout(struct sock *sk, u32 val); #endif /* _LINUX_TCP_H */ PK ! K:�٫ � local_lock_internal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LOCAL_LOCK_H # error "Do not include directly, include linux/local_lock.h" #endif #include <linux/percpu-defs.h> #include <linux/lockdep.h> #ifndef CONFIG_PREEMPT_RT typedef struct { #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; struct task_struct *owner; #endif } local_lock_t; #ifdef CONFIG_DEBUG_LOCK_ALLOC # define LOCAL_LOCK_DEBUG_INIT(lockname) \ .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_CONFIG, \ .lock_type = LD_LOCK_PERCPU, \ }, \ .owner = NULL, static inline void local_lock_acquire(local_lock_t *l) { lock_map_acquire(&l->dep_map); DEBUG_LOCKS_WARN_ON(l->owner); l->owner = current; } static inline void local_lock_release(local_lock_t *l) { DEBUG_LOCKS_WARN_ON(l->owner != current); l->owner = NULL; lock_map_release(&l->dep_map); } static inline void local_lock_debug_init(local_lock_t *l) { l->owner = NULL; } #else /* CONFIG_DEBUG_LOCK_ALLOC */ # define LOCAL_LOCK_DEBUG_INIT(lockname) static inline void local_lock_acquire(local_lock_t *l) { } static inline void local_lock_release(local_lock_t *l) { } static inline void local_lock_debug_init(local_lock_t *l) { } #endif /* !CONFIG_DEBUG_LOCK_ALLOC */ #define INIT_LOCAL_LOCK(lockname) { LOCAL_LOCK_DEBUG_INIT(lockname) } #define __local_lock_init(lock) \ do { \ static struct lock_class_key __key; \ \ debug_check_no_locks_freed((void *)lock, sizeof(*lock));\ lockdep_init_map_type(&(lock)->dep_map, #lock, &__key, \ 0, LD_WAIT_CONFIG, LD_WAIT_INV, \ LD_LOCK_PERCPU); \ local_lock_debug_init(lock); \ } while (0) #define __local_lock(lock) \ do { \ preempt_disable(); \ local_lock_acquire(this_cpu_ptr(lock)); \ } while (0) #define __local_lock_irq(lock) \ do { \ local_irq_disable(); \ local_lock_acquire(this_cpu_ptr(lock)); \ } while (0) #define __local_lock_irqsave(lock, flags) \ do { \ local_irq_save(flags); \ local_lock_acquire(this_cpu_ptr(lock)); \ } while (0) #define __local_unlock(lock) \ do { \ local_lock_release(this_cpu_ptr(lock)); \ preempt_enable(); \ } while (0) #define __local_unlock_irq(lock) \ do { \ local_lock_release(this_cpu_ptr(lock)); \ local_irq_enable(); \ } while (0) #define __local_unlock_irqrestore(lock, flags) \ do { \ local_lock_release(this_cpu_ptr(lock)); \ local_irq_restore(flags); \ } while (0) #else /* !CONFIG_PREEMPT_RT */ /* * On PREEMPT_RT local_lock maps to a per CPU spinlock, which protects the * critical section while staying preemptible. */ typedef spinlock_t local_lock_t; #define INIT_LOCAL_LOCK(lockname) __LOCAL_SPIN_LOCK_UNLOCKED((lockname)) #define __local_lock_init(l) \ do { \ local_spin_lock_init((l)); \ } while (0) #define __local_lock(__lock) \ do { \ migrate_disable(); \ spin_lock(this_cpu_ptr((__lock))); \ } while (0) #define __local_lock_irq(lock) __local_lock(lock) #define __local_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ flags = 0; \ __local_lock(lock); \ } while (0) #define __local_unlock(__lock) \ do { \ spin_unlock(this_cpu_ptr((__lock))); \ migrate_enable(); \ } while (0) #define __local_unlock_irq(lock) __local_unlock(lock) #define __local_unlock_irqrestore(lock, flags) __local_unlock(lock) #endif /* CONFIG_PREEMPT_RT */ PK ! =�y, y, ieee802154.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * IEEE802.15.4-2003 specification * * Copyright (C) 2007, 2008 Siemens AG * * Written by: * Pavel Smolenskiy <pavel.smolenskiy@gmail.com> * Maxim Gorbachyov <maxim.gorbachev@siemens.com> * Maxim Osipov <maxim.osipov@siemens.com> * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> * Alexander Smirnov <alex.bluesman.smirnov@gmail.com> */ #ifndef LINUX_IEEE802154_H #define LINUX_IEEE802154_H #include <linux/types.h> #include <linux/random.h> #define IEEE802154_MTU 127 #define IEEE802154_ACK_PSDU_LEN 5 #define IEEE802154_MIN_PSDU_LEN 9 #define IEEE802154_FCS_LEN 2 #define IEEE802154_MAX_AUTH_TAG_LEN 16 #define IEEE802154_FC_LEN 2 #define IEEE802154_SEQ_LEN 1 /* General MAC frame format: * 2 bytes: Frame Control * 1 byte: Sequence Number * 20 bytes: Addressing fields * 14 bytes: Auxiliary Security Header */ #define IEEE802154_MAX_HEADER_LEN (2 + 1 + 20 + 14) #define IEEE802154_MIN_HEADER_LEN (IEEE802154_ACK_PSDU_LEN - \ IEEE802154_FCS_LEN) #define IEEE802154_PAN_ID_BROADCAST 0xffff #define IEEE802154_ADDR_SHORT_BROADCAST 0xffff #define IEEE802154_ADDR_SHORT_UNSPEC 0xfffe #define IEEE802154_EXTENDED_ADDR_LEN 8 #define IEEE802154_SHORT_ADDR_LEN 2 #define IEEE802154_PAN_ID_LEN 2 #define IEEE802154_LIFS_PERIOD 40 #define IEEE802154_SIFS_PERIOD 12 #define IEEE802154_MAX_SIFS_FRAME_SIZE 18 #define IEEE802154_MAX_CHANNEL 26 #define IEEE802154_MAX_PAGE 31 #define IEEE802154_FC_TYPE_BEACON 0x0 /* Frame is beacon */ #define IEEE802154_FC_TYPE_DATA 0x1 /* Frame is data */ #define IEEE802154_FC_TYPE_ACK 0x2 /* Frame is acknowledgment */ #define IEEE802154_FC_TYPE_MAC_CMD 0x3 /* Frame is MAC command */ #define IEEE802154_FC_TYPE_SHIFT 0 #define IEEE802154_FC_TYPE_MASK ((1 << 3) - 1) #define IEEE802154_FC_TYPE(x) ((x & IEEE802154_FC_TYPE_MASK) >> IEEE802154_FC_TYPE_SHIFT) #define IEEE802154_FC_SET_TYPE(v, x) do { \ v = (((v) & ~IEEE802154_FC_TYPE_MASK) | \ (((x) << IEEE802154_FC_TYPE_SHIFT) & IEEE802154_FC_TYPE_MASK)); \ } while (0) #define IEEE802154_FC_SECEN_SHIFT 3 #define IEEE802154_FC_SECEN (1 << IEEE802154_FC_SECEN_SHIFT) #define IEEE802154_FC_FRPEND_SHIFT 4 #define IEEE802154_FC_FRPEND (1 << IEEE802154_FC_FRPEND_SHIFT) #define IEEE802154_FC_ACK_REQ_SHIFT 5 #define IEEE802154_FC_ACK_REQ (1 << IEEE802154_FC_ACK_REQ_SHIFT) #define IEEE802154_FC_INTRA_PAN_SHIFT 6 #define IEEE802154_FC_INTRA_PAN (1 << IEEE802154_FC_INTRA_PAN_SHIFT) #define IEEE802154_FC_SAMODE_SHIFT 14 #define IEEE802154_FC_SAMODE_MASK (3 << IEEE802154_FC_SAMODE_SHIFT) #define IEEE802154_FC_DAMODE_SHIFT 10 #define IEEE802154_FC_DAMODE_MASK (3 << IEEE802154_FC_DAMODE_SHIFT) #define IEEE802154_FC_VERSION_SHIFT 12 #define IEEE802154_FC_VERSION_MASK (3 << IEEE802154_FC_VERSION_SHIFT) #define IEEE802154_FC_VERSION(x) ((x & IEEE802154_FC_VERSION_MASK) >> IEEE802154_FC_VERSION_SHIFT) #define IEEE802154_FC_SAMODE(x) \ (((x) & IEEE802154_FC_SAMODE_MASK) >> IEEE802154_FC_SAMODE_SHIFT) #define IEEE802154_FC_DAMODE(x) \ (((x) & IEEE802154_FC_DAMODE_MASK) >> IEEE802154_FC_DAMODE_SHIFT) #define IEEE802154_SCF_SECLEVEL_MASK 7 #define IEEE802154_SCF_SECLEVEL_SHIFT 0 #define IEEE802154_SCF_SECLEVEL(x) (x & IEEE802154_SCF_SECLEVEL_MASK) #define IEEE802154_SCF_KEY_ID_MODE_SHIFT 3 #define IEEE802154_SCF_KEY_ID_MODE_MASK (3 << IEEE802154_SCF_KEY_ID_MODE_SHIFT) #define IEEE802154_SCF_KEY_ID_MODE(x) \ ((x & IEEE802154_SCF_KEY_ID_MODE_MASK) >> IEEE802154_SCF_KEY_ID_MODE_SHIFT) #define IEEE802154_SCF_KEY_IMPLICIT 0 #define IEEE802154_SCF_KEY_INDEX 1 #define IEEE802154_SCF_KEY_SHORT_INDEX 2 #define IEEE802154_SCF_KEY_HW_INDEX 3 #define IEEE802154_SCF_SECLEVEL_NONE 0 #define IEEE802154_SCF_SECLEVEL_MIC32 1 #define IEEE802154_SCF_SECLEVEL_MIC64 2 #define IEEE802154_SCF_SECLEVEL_MIC128 3 #define IEEE802154_SCF_SECLEVEL_ENC 4 #define IEEE802154_SCF_SECLEVEL_ENC_MIC32 5 #define IEEE802154_SCF_SECLEVEL_ENC_MIC64 6 #define IEEE802154_SCF_SECLEVEL_ENC_MIC128 7 /* MAC footer size */ #define IEEE802154_MFR_SIZE 2 /* 2 octets */ /* MAC's Command Frames Identifiers */ #define IEEE802154_CMD_ASSOCIATION_REQ 0x01 #define IEEE802154_CMD_ASSOCIATION_RESP 0x02 #define IEEE802154_CMD_DISASSOCIATION_NOTIFY 0x03 #define IEEE802154_CMD_DATA_REQ 0x04 #define IEEE802154_CMD_PANID_CONFLICT_NOTIFY 0x05 #define IEEE802154_CMD_ORPHAN_NOTIFY 0x06 #define IEEE802154_CMD_BEACON_REQ 0x07 #define IEEE802154_CMD_COORD_REALIGN_NOTIFY 0x08 #define IEEE802154_CMD_GTS_REQ 0x09 /* * The return values of MAC operations */ enum { /* * The requested operation was completed successfully. * For a transmission request, this value indicates * a successful transmission. */ IEEE802154_SUCCESS = 0x0, /* The beacon was lost following a synchronization request. */ IEEE802154_BEACON_LOSS = 0xe0, /* * A transmission could not take place due to activity on the * channel, i.e., the CSMA-CA mechanism has failed. */ IEEE802154_CHNL_ACCESS_FAIL = 0xe1, /* The GTS request has been denied by the PAN coordinator. */ IEEE802154_DENINED = 0xe2, /* The attempt to disable the transceiver has failed. */ IEEE802154_DISABLE_TRX_FAIL = 0xe3, /* * The received frame induces a failed security check according to * the security suite. */ IEEE802154_FAILED_SECURITY_CHECK = 0xe4, /* * The frame resulting from secure processing has a length that is * greater than aMACMaxFrameSize. */ IEEE802154_FRAME_TOO_LONG = 0xe5, /* * The requested GTS transmission failed because the specified GTS * either did not have a transmit GTS direction or was not defined. */ IEEE802154_INVALID_GTS = 0xe6, /* * A request to purge an MSDU from the transaction queue was made using * an MSDU handle that was not found in the transaction table. */ IEEE802154_INVALID_HANDLE = 0xe7, /* A parameter in the primitive is out of the valid range.*/ IEEE802154_INVALID_PARAMETER = 0xe8, /* No acknowledgment was received after aMaxFrameRetries. */ IEEE802154_NO_ACK = 0xe9, /* A scan operation failed to find any network beacons.*/ IEEE802154_NO_BEACON = 0xea, /* No response data were available following a request. */ IEEE802154_NO_DATA = 0xeb, /* The operation failed because a short address was not allocated. */ IEEE802154_NO_SHORT_ADDRESS = 0xec, /* * A receiver enable request was unsuccessful because it could not be * completed within the CAP. */ IEEE802154_OUT_OF_CAP = 0xed, /* * A PAN identifier conflict has been detected and communicated to the * PAN coordinator. */ IEEE802154_PANID_CONFLICT = 0xee, /* A coordinator realignment command has been received. */ IEEE802154_REALIGMENT = 0xef, /* The transaction has expired and its information discarded. */ IEEE802154_TRANSACTION_EXPIRED = 0xf0, /* There is no capacity to store the transaction. */ IEEE802154_TRANSACTION_OVERFLOW = 0xf1, /* * The transceiver was in the transmitter enabled state when the * receiver was requested to be enabled. */ IEEE802154_TX_ACTIVE = 0xf2, /* The appropriate key is not available in the ACL. */ IEEE802154_UNAVAILABLE_KEY = 0xf3, /* * A SET/GET request was issued with the identifier of a PIB attribute * that is not supported. */ IEEE802154_UNSUPPORTED_ATTR = 0xf4, /* * A request to perform a scan operation failed because the MLME was * in the process of performing a previously initiated scan operation. */ IEEE802154_SCAN_IN_PROGRESS = 0xfc, }; /* frame control handling */ #define IEEE802154_FCTL_FTYPE 0x0003 #define IEEE802154_FCTL_ACKREQ 0x0020 #define IEEE802154_FCTL_SECEN 0x0004 #define IEEE802154_FCTL_INTRA_PAN 0x0040 #define IEEE802154_FCTL_DADDR 0x0c00 #define IEEE802154_FCTL_SADDR 0xc000 #define IEEE802154_FTYPE_DATA 0x0001 #define IEEE802154_FCTL_ADDR_NONE 0x0000 #define IEEE802154_FCTL_DADDR_SHORT 0x0800 #define IEEE802154_FCTL_DADDR_EXTENDED 0x0c00 #define IEEE802154_FCTL_SADDR_SHORT 0x8000 #define IEEE802154_FCTL_SADDR_EXTENDED 0xc000 /* * ieee802154_is_data - check if type is IEEE802154_FTYPE_DATA * @fc: frame control bytes in little-endian byteorder */ static inline int ieee802154_is_data(__le16 fc) { return (fc & cpu_to_le16(IEEE802154_FCTL_FTYPE)) == cpu_to_le16(IEEE802154_FTYPE_DATA); } /** * ieee802154_is_secen - check if Security bit is set * @fc: frame control bytes in little-endian byteorder */ static inline bool ieee802154_is_secen(__le16 fc) { return fc & cpu_to_le16(IEEE802154_FCTL_SECEN); } /** * ieee802154_is_ackreq - check if acknowledgment request bit is set * @fc: frame control bytes in little-endian byteorder */ static inline bool ieee802154_is_ackreq(__le16 fc) { return fc & cpu_to_le16(IEEE802154_FCTL_ACKREQ); } /** * ieee802154_is_intra_pan - check if intra pan id communication * @fc: frame control bytes in little-endian byteorder */ static inline bool ieee802154_is_intra_pan(__le16 fc) { return fc & cpu_to_le16(IEEE802154_FCTL_INTRA_PAN); } /* * ieee802154_daddr_mode - get daddr mode from fc * @fc: frame control bytes in little-endian byteorder */ static inline __le16 ieee802154_daddr_mode(__le16 fc) { return fc & cpu_to_le16(IEEE802154_FCTL_DADDR); } /* * ieee802154_saddr_mode - get saddr mode from fc * @fc: frame control bytes in little-endian byteorder */ static inline __le16 ieee802154_saddr_mode(__le16 fc) { return fc & cpu_to_le16(IEEE802154_FCTL_SADDR); } /** * ieee802154_is_valid_psdu_len - check if psdu len is valid * available lengths: * 0-4 Reserved * 5 MPDU (Acknowledgment) * 6-8 Reserved * 9-127 MPDU * * @len: psdu len with (MHR + payload + MFR) */ static inline bool ieee802154_is_valid_psdu_len(u8 len) { return (len == IEEE802154_ACK_PSDU_LEN || (len >= IEEE802154_MIN_PSDU_LEN && len <= IEEE802154_MTU)); } /** * ieee802154_is_valid_extended_unicast_addr - check if extended addr is valid * @addr: extended addr to check */ static inline bool ieee802154_is_valid_extended_unicast_addr(__le64 addr) { /* Bail out if the address is all zero, or if the group * address bit is set. */ return ((addr != cpu_to_le64(0x0000000000000000ULL)) && !(addr & cpu_to_le64(0x0100000000000000ULL))); } /** * ieee802154_is_broadcast_short_addr - check if short addr is broadcast * @addr: short addr to check */ static inline bool ieee802154_is_broadcast_short_addr(__le16 addr) { return (addr == cpu_to_le16(IEEE802154_ADDR_SHORT_BROADCAST)); } /** * ieee802154_is_unspec_short_addr - check if short addr is unspecified * @addr: short addr to check */ static inline bool ieee802154_is_unspec_short_addr(__le16 addr) { return (addr == cpu_to_le16(IEEE802154_ADDR_SHORT_UNSPEC)); } /** * ieee802154_is_valid_src_short_addr - check if source short address is valid * @addr: short addr to check */ static inline bool ieee802154_is_valid_src_short_addr(__le16 addr) { return !(ieee802154_is_broadcast_short_addr(addr) || ieee802154_is_unspec_short_addr(addr)); } /** * ieee802154_random_extended_addr - generates a random extended address * @addr: extended addr pointer to place the random address */ static inline void ieee802154_random_extended_addr(__le64 *addr) { get_random_bytes(addr, IEEE802154_EXTENDED_ADDR_LEN); /* clear the group bit, and set the locally administered bit */ ((u8 *)addr)[IEEE802154_EXTENDED_ADDR_LEN - 1] &= ~0x01; ((u8 *)addr)[IEEE802154_EXTENDED_ADDR_LEN - 1] |= 0x02; } #endif /* LINUX_IEEE802154_H */ PK ! V��; ; litex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Common LiteX header providing * helper functions for accessing CSRs. * * Copyright (C) 2019-2020 Antmicro <www.antmicro.com> */ #ifndef _LINUX_LITEX_H #define _LINUX_LITEX_H #include <linux/io.h> static inline void _write_litex_subregister(u32 val, void __iomem *addr) { writel((u32 __force)cpu_to_le32(val), addr); } static inline u32 _read_litex_subregister(void __iomem *addr) { return le32_to_cpu((__le32 __force)readl(addr)); } /* * LiteX SoC Generator, depending on the configuration, can split a single * logical CSR (Control&Status Register) into a series of consecutive physical * registers. * * For example, in the configuration with 8-bit CSR Bus, a 32-bit aligned, * 32-bit wide logical CSR will be laid out as four 32-bit physical * subregisters, each one containing one byte of meaningful data. * * For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which * means that only larger-than-32-bit CSRs will be split across multiple * subregisters (e.g., a 64-bit CSR will be spread across two consecutive * 32-bit subregisters). * * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus */ static inline void litex_write8(void __iomem *reg, u8 val) { _write_litex_subregister(val, reg); } static inline void litex_write16(void __iomem *reg, u16 val) { _write_litex_subregister(val, reg); } static inline void litex_write32(void __iomem *reg, u32 val) { _write_litex_subregister(val, reg); } static inline void litex_write64(void __iomem *reg, u64 val) { _write_litex_subregister(val >> 32, reg); _write_litex_subregister(val, reg + 4); } static inline u8 litex_read8(void __iomem *reg) { return _read_litex_subregister(reg); } static inline u16 litex_read16(void __iomem *reg) { return _read_litex_subregister(reg); } static inline u32 litex_read32(void __iomem *reg) { return _read_litex_subregister(reg); } static inline u64 litex_read64(void __iomem *reg) { return ((u64)_read_litex_subregister(reg) << 32) | _read_litex_subregister(reg + 4); } #endif /* _LINUX_LITEX_H */ PK ! c|]�r r irqchip/arm-gic-common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/irqchip/arm-gic-common.h * * Copyright (C) 2016 ARM Limited, All Rights Reserved. */ #ifndef __LINUX_IRQCHIP_ARM_GIC_COMMON_H #define __LINUX_IRQCHIP_ARM_GIC_COMMON_H #include <linux/irqchip/arm-vgic-info.h> #define GICD_INT_DEF_PRI 0xa0 #define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\ (GICD_INT_DEF_PRI << 16) |\ (GICD_INT_DEF_PRI << 8) |\ GICD_INT_DEF_PRI) struct irq_domain; struct fwnode_handle; int gicv2m_init(struct fwnode_handle *parent_handle, struct irq_domain *parent); #endif /* __LINUX_IRQCHIP_ARM_GIC_COMMON_H */ PK ! I�� � irqchip/irq-bcm2836.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Root interrupt controller for the BCM2836 (Raspberry Pi 2). * * Copyright 2015 Broadcom */ #define LOCAL_CONTROL 0x000 #define LOCAL_PRESCALER 0x008 /* * The low 2 bits identify the CPU that the GPU IRQ goes to, and the * next 2 bits identify the CPU that the GPU FIQ goes to. */ #define LOCAL_GPU_ROUTING 0x00c /* When setting bits 0-3, enables PMU interrupts on that CPU. */ #define LOCAL_PM_ROUTING_SET 0x010 /* When setting bits 0-3, disables PMU interrupts on that CPU. */ #define LOCAL_PM_ROUTING_CLR 0x014 /* * The low 4 bits of this are the CPU's timer IRQ enables, and the * next 4 bits are the CPU's timer FIQ enables (which override the IRQ * bits). */ #define LOCAL_TIMER_INT_CONTROL0 0x040 /* * The low 4 bits of this are the CPU's per-mailbox IRQ enables, and * the next 4 bits are the CPU's per-mailbox FIQ enables (which * override the IRQ bits). */ #define LOCAL_MAILBOX_INT_CONTROL0 0x050 /* * The CPU's interrupt status register. Bits are defined by the * LOCAL_IRQ_* bits below. */ #define LOCAL_IRQ_PENDING0 0x060 /* Same status bits as above, but for FIQ. */ #define LOCAL_FIQ_PENDING0 0x070 /* * Mailbox write-to-set bits. There are 16 mailboxes, 4 per CPU, and * these bits are organized by mailbox number and then CPU number. We * use mailbox 0 for IPIs. The mailbox's interrupt is raised while * any bit is set. */ #define LOCAL_MAILBOX0_SET0 0x080 #define LOCAL_MAILBOX3_SET0 0x08c /* Mailbox write-to-clear bits. */ #define LOCAL_MAILBOX0_CLR0 0x0c0 #define LOCAL_MAILBOX3_CLR0 0x0cc #define LOCAL_IRQ_CNTPSIRQ 0 #define LOCAL_IRQ_CNTPNSIRQ 1 #define LOCAL_IRQ_CNTHPIRQ 2 #define LOCAL_IRQ_CNTVIRQ 3 #define LOCAL_IRQ_MAILBOX0 4 #define LOCAL_IRQ_MAILBOX1 5 #define LOCAL_IRQ_MAILBOX2 6 #define LOCAL_IRQ_MAILBOX3 7 #define LOCAL_IRQ_GPU_FAST 8 #define LOCAL_IRQ_PMU_FAST 9 #define LAST_IRQ LOCAL_IRQ_PMU_FAST PK ! ACR6 6 irqchip/arm-gic-v4.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016,2017 ARM Limited, All Rights Reserved. * Author: Marc Zyngier <marc.zyngier@arm.com> */ #ifndef __LINUX_IRQCHIP_ARM_GIC_V4_H #define __LINUX_IRQCHIP_ARM_GIC_V4_H struct its_vpe; /* * Maximum number of ITTs when GITS_TYPER.VMOVP == 0, using the * ITSList mechanism to perform inter-ITS synchronization. */ #define GICv4_ITS_LIST_MAX 16 /* Embedded in kvm.arch */ struct its_vm { struct fwnode_handle *fwnode; struct irq_domain *domain; struct page *vprop_page; struct its_vpe **vpes; int nr_vpes; irq_hw_number_t db_lpi_base; unsigned long *db_bitmap; int nr_db_lpis; u32 vlpi_count[GICv4_ITS_LIST_MAX]; }; /* Embedded in kvm_vcpu.arch */ struct its_vpe { struct page *vpt_page; struct its_vm *its_vm; /* per-vPE VLPI tracking */ atomic_t vlpi_count; /* Doorbell interrupt */ int irq; irq_hw_number_t vpe_db_lpi; /* VPE resident */ bool resident; /* VPT parse complete */ bool ready; union { /* GICv4.0 implementations */ struct { /* VPE proxy mapping */ int vpe_proxy_event; /* Implementation Defined Area Invalid */ bool idai; }; /* GICv4.1 implementations */ struct { struct fwnode_handle *fwnode; struct irq_domain *sgi_domain; struct { u8 priority; bool enabled; bool group; } sgi_config[16]; }; }; /* Track the VPE being mapped */ atomic_t vmapp_count; /* * Ensures mutual exclusion between affinity setting of the * vPE and vLPI operations using vpe->col_idx. */ raw_spinlock_t vpe_lock; /* * This collection ID is used to indirect the target * redistributor for this VPE. The ID itself isn't involved in * programming of the ITS. */ u16 col_idx; /* Unique (system-wide) VPE identifier */ u16 vpe_id; /* Pending VLPIs on schedule out? */ bool pending_last; }; /* * struct its_vlpi_map: structure describing the mapping of a * VLPI. Only to be interpreted in the context of a physical interrupt * it complements. To be used as the vcpu_info passed to * irq_set_vcpu_affinity(). * * @vm: Pointer to the GICv4 notion of a VM * @vpe: Pointer to the GICv4 notion of a virtual CPU (VPE) * @vintid: Virtual LPI number * @properties: Priority and enable bits (as written in the prop table) * @db_enabled: Is the VPE doorbell to be generated? */ struct its_vlpi_map { struct its_vm *vm; struct its_vpe *vpe; u32 vintid; u8 properties; bool db_enabled; }; enum its_vcpu_info_cmd_type { MAP_VLPI, GET_VLPI, PROP_UPDATE_VLPI, PROP_UPDATE_AND_INV_VLPI, SCHEDULE_VPE, DESCHEDULE_VPE, COMMIT_VPE, INVALL_VPE, PROP_UPDATE_VSGI, }; struct its_cmd_info { enum its_vcpu_info_cmd_type cmd_type; union { struct its_vlpi_map *map; u8 config; bool req_db; struct { bool g0en; bool g1en; }; struct { u8 priority; bool group; }; }; }; int its_alloc_vcpu_irqs(struct its_vm *vm); void its_free_vcpu_irqs(struct its_vm *vm); int its_make_vpe_resident(struct its_vpe *vpe, bool g0en, bool g1en); int its_make_vpe_non_resident(struct its_vpe *vpe, bool db); int its_commit_vpe(struct its_vpe *vpe); int its_invall_vpe(struct its_vpe *vpe); int its_map_vlpi(int irq, struct its_vlpi_map *map); int its_get_vlpi(int irq, struct its_vlpi_map *map); int its_unmap_vlpi(int irq); int its_prop_update_vlpi(int irq, u8 config, bool inv); int its_prop_update_vsgi(int irq, u8 priority, bool group); struct irq_domain_ops; int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *vpe_ops, const struct irq_domain_ops *sgi_ops); bool gic_cpuif_has_vsgi(void); #endif PK ! �`��a a irqchip/versatile-fpga.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef PLAT_FPGA_IRQ_H #define PLAT_FPGA_IRQ_H struct device_node; struct pt_regs; void fpga_handle_irq(struct pt_regs *regs); void fpga_irq_init(void __iomem *, const char *, int, int, u32, struct device_node *node); int fpga_irq_of_init(struct device_node *node, struct device_node *parent); #endif PK ! FS�� � irqchip/irq-davinci-aintc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2019 Texas Instruments */ #ifndef _LINUX_IRQ_DAVINCI_AINTC_ #define _LINUX_IRQ_DAVINCI_AINTC_ #include <linux/ioport.h> /** * struct davinci_aintc_config - configuration data for davinci-aintc driver. * * @reg: register range to map * @num_irqs: number of HW interrupts supported by the controller * @prios: an array of size num_irqs containing priority settings for * each interrupt */ struct davinci_aintc_config { struct resource reg; unsigned int num_irqs; u8 *prios; }; void davinci_aintc_init(const struct davinci_aintc_config *config); #endif /* _LINUX_IRQ_DAVINCI_AINTC_ */ PK ! �2ba a irqchip/arm-vic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * arch/arm/include/asm/hardware/vic.h * * Copyright (c) ARM Limited 2003. All rights reserved. */ #ifndef __ASM_ARM_HARDWARE_VIC_H #define __ASM_ARM_HARDWARE_VIC_H #include <linux/types.h> void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); #endif PK ! ����7 7 irqchip/irq-omap-intc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /** * irq-omap-intc.h - INTC Idle Functions * * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> */ #ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H #define __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H int omap_irq_pending(void); void omap_intc_save_context(void); void omap_intc_restore_context(void); void omap3_intc_suspend(void); void omap3_intc_prepare_idle(void); void omap3_intc_resume_idle(void); #endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H */ PK ! ����� � irqchip/arm-vgic-info.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/irqchip/arm-vgic-info.h * * Copyright (C) 2016 ARM Limited, All Rights Reserved. */ #ifndef __LINUX_IRQCHIP_ARM_VGIC_INFO_H #define __LINUX_IRQCHIP_ARM_VGIC_INFO_H #include <linux/types.h> #include <linux/ioport.h> enum gic_type { /* Full GICv2 */ GIC_V2, /* Full GICv3, optionally with v2 compat */ GIC_V3, }; struct gic_kvm_info { /* GIC type */ enum gic_type type; /* Virtual CPU interface */ struct resource vcpu; /* Interrupt number */ unsigned int maint_irq; /* No interrupt mask, no need to use the above field */ bool no_maint_irq_mask; /* Virtual control interface */ struct resource vctrl; /* vlpi support */ bool has_v4; /* rvpeid support */ bool has_v4_1; /* Deactivation impared, subpar stuff */ bool no_hw_deactivation; }; #ifdef CONFIG_KVM void vgic_set_kvm_info(const struct gic_kvm_info *info); #else static inline void vgic_set_kvm_info(const struct gic_kvm_info *info) {} #endif #endif PK ! �L� _ _ irqchip/arm-gic-v3.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. * Author: Marc Zyngier <marc.zyngier@arm.com> */ #ifndef __LINUX_IRQCHIP_ARM_GIC_V3_H #define __LINUX_IRQCHIP_ARM_GIC_V3_H /* * Distributor registers. We assume we're running non-secure, with ARE * being set. Secure-only and non-ARE registers are not described. */ #define GICD_CTLR 0x0000 #define GICD_TYPER 0x0004 #define GICD_IIDR 0x0008 #define GICD_TYPER2 0x000C #define GICD_STATUSR 0x0010 #define GICD_SETSPI_NSR 0x0040 #define GICD_CLRSPI_NSR 0x0048 #define GICD_SETSPI_SR 0x0050 #define GICD_CLRSPI_SR 0x0058 #define GICD_IGROUPR 0x0080 #define GICD_ISENABLER 0x0100 #define GICD_ICENABLER 0x0180 #define GICD_ISPENDR 0x0200 #define GICD_ICPENDR 0x0280 #define GICD_ISACTIVER 0x0300 #define GICD_ICACTIVER 0x0380 #define GICD_IPRIORITYR 0x0400 #define GICD_ICFGR 0x0C00 #define GICD_IGRPMODR 0x0D00 #define GICD_NSACR 0x0E00 #define GICD_IGROUPRnE 0x1000 #define GICD_ISENABLERnE 0x1200 #define GICD_ICENABLERnE 0x1400 #define GICD_ISPENDRnE 0x1600 #define GICD_ICPENDRnE 0x1800 #define GICD_ISACTIVERnE 0x1A00 #define GICD_ICACTIVERnE 0x1C00 #define GICD_IPRIORITYRnE 0x2000 #define GICD_ICFGRnE 0x3000 #define GICD_IROUTER 0x6000 #define GICD_IROUTERnE 0x8000 #define GICD_IDREGS 0xFFD0 #define GICD_PIDR2 0xFFE8 #define ESPI_BASE_INTID 4096 /* * Those registers are actually from GICv2, but the spec demands that they * are implemented as RES0 if ARE is 1 (which we do in KVM's emulated GICv3). */ #define GICD_ITARGETSR 0x0800 #define GICD_SGIR 0x0F00 #define GICD_CPENDSGIR 0x0F10 #define GICD_SPENDSGIR 0x0F20 #define GICD_CTLR_RWP (1U << 31) #define GICD_CTLR_nASSGIreq (1U << 8) #define GICD_CTLR_DS (1U << 6) #define GICD_CTLR_ARE_NS (1U << 4) #define GICD_CTLR_ENABLE_G1A (1U << 1) #define GICD_CTLR_ENABLE_G1 (1U << 0) #define GICD_IIDR_IMPLEMENTER_SHIFT 0 #define GICD_IIDR_IMPLEMENTER_MASK (0xfff << GICD_IIDR_IMPLEMENTER_SHIFT) #define GICD_IIDR_REVISION_SHIFT 12 #define GICD_IIDR_REVISION_MASK (0xf << GICD_IIDR_REVISION_SHIFT) #define GICD_IIDR_VARIANT_SHIFT 16 #define GICD_IIDR_VARIANT_MASK (0xf << GICD_IIDR_VARIANT_SHIFT) #define GICD_IIDR_PRODUCT_ID_SHIFT 24 #define GICD_IIDR_PRODUCT_ID_MASK (0xff << GICD_IIDR_PRODUCT_ID_SHIFT) /* * In systems with a single security state (what we emulate in KVM) * the meaning of the interrupt group enable bits is slightly different */ #define GICD_CTLR_ENABLE_SS_G1 (1U << 1) #define GICD_CTLR_ENABLE_SS_G0 (1U << 0) #define GICD_TYPER_RSS (1U << 26) #define GICD_TYPER_LPIS (1U << 17) #define GICD_TYPER_MBIS (1U << 16) #define GICD_TYPER_ESPI (1U << 8) #define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1) #define GICD_TYPER_NUM_LPIS(typer) ((((typer) >> 11) & 0x1f) + 1) #define GICD_TYPER_SPIS(typer) ((((typer) & 0x1f) + 1) * 32) #define GICD_TYPER_ESPIS(typer) \ (((typer) & GICD_TYPER_ESPI) ? GICD_TYPER_SPIS((typer) >> 27) : 0) #define GICD_TYPER2_nASSGIcap (1U << 8) #define GICD_TYPER2_VIL (1U << 7) #define GICD_TYPER2_VID GENMASK(4, 0) #define GICD_IROUTER_SPI_MODE_ONE (0U << 31) #define GICD_IROUTER_SPI_MODE_ANY (1U << 31) #define GIC_PIDR2_ARCH_MASK 0xf0 #define GIC_PIDR2_ARCH_GICv3 0x30 #define GIC_PIDR2_ARCH_GICv4 0x40 #define GIC_V3_DIST_SIZE 0x10000 #define GIC_PAGE_SIZE_4K 0ULL #define GIC_PAGE_SIZE_16K 1ULL #define GIC_PAGE_SIZE_64K 2ULL #define GIC_PAGE_SIZE_MASK 3ULL /* * Re-Distributor registers, offsets from RD_base */ #define GICR_CTLR GICD_CTLR #define GICR_IIDR 0x0004 #define GICR_TYPER 0x0008 #define GICR_STATUSR GICD_STATUSR #define GICR_WAKER 0x0014 #define GICR_SETLPIR 0x0040 #define GICR_CLRLPIR 0x0048 #define GICR_PROPBASER 0x0070 #define GICR_PENDBASER 0x0078 #define GICR_INVLPIR 0x00A0 #define GICR_INVALLR 0x00B0 #define GICR_SYNCR 0x00C0 #define GICR_IDREGS GICD_IDREGS #define GICR_PIDR2 GICD_PIDR2 #define GICR_CTLR_ENABLE_LPIS (1UL << 0) #define GICR_CTLR_RWP (1UL << 3) #define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff) #define EPPI_BASE_INTID 1056 #define GICR_TYPER_NR_PPIS(r) \ ({ \ unsigned int __ppinum = ((r) >> 27) & 0x1f; \ unsigned int __nr_ppis = 16; \ if (__ppinum == 1 || __ppinum == 2) \ __nr_ppis += __ppinum * 32; \ \ __nr_ppis; \ }) #define GICR_WAKER_ProcessorSleep (1U << 1) #define GICR_WAKER_ChildrenAsleep (1U << 2) #define GIC_BASER_CACHE_nCnB 0ULL #define GIC_BASER_CACHE_SameAsInner 0ULL #define GIC_BASER_CACHE_nC 1ULL #define GIC_BASER_CACHE_RaWt 2ULL #define GIC_BASER_CACHE_RaWb 3ULL #define GIC_BASER_CACHE_WaWt 4ULL #define GIC_BASER_CACHE_WaWb 5ULL #define GIC_BASER_CACHE_RaWaWt 6ULL #define GIC_BASER_CACHE_RaWaWb 7ULL #define GIC_BASER_CACHE_MASK 7ULL #define GIC_BASER_NonShareable 0ULL #define GIC_BASER_InnerShareable 1ULL #define GIC_BASER_OuterShareable 2ULL #define GIC_BASER_SHAREABILITY_MASK 3ULL #define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \ (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT) #define GIC_BASER_SHAREABILITY(reg, type) \ (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT) /* encode a size field of width @w containing @n - 1 units */ #define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) & GENMASK_ULL(((w) - 1), 0)) #define GICR_PROPBASER_SHAREABILITY_SHIFT (10) #define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT (7) #define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT (56) #define GICR_PROPBASER_SHAREABILITY_MASK \ GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK) #define GICR_PROPBASER_INNER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK) #define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK) #define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK #define GICR_PROPBASER_InnerShareable \ GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable) #define GICR_PROPBASER_nCnB GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, nCnB) #define GICR_PROPBASER_nC GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, nC) #define GICR_PROPBASER_RaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWt) #define GICR_PROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) #define GICR_PROPBASER_WaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WaWt) #define GICR_PROPBASER_WaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WaWb) #define GICR_PROPBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWt) #define GICR_PROPBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWb) #define GICR_PROPBASER_IDBITS_MASK (0x1f) #define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) #define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) #define GICR_PENDBASER_SHAREABILITY_SHIFT (10) #define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7) #define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT (56) #define GICR_PENDBASER_SHAREABILITY_MASK \ GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK) #define GICR_PENDBASER_INNER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK) #define GICR_PENDBASER_OUTER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK) #define GICR_PENDBASER_CACHEABILITY_MASK GICR_PENDBASER_INNER_CACHEABILITY_MASK #define GICR_PENDBASER_InnerShareable \ GIC_BASER_SHAREABILITY(GICR_PENDBASER, InnerShareable) #define GICR_PENDBASER_nCnB GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, nCnB) #define GICR_PENDBASER_nC GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, nC) #define GICR_PENDBASER_RaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWt) #define GICR_PENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWb) #define GICR_PENDBASER_WaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WaWt) #define GICR_PENDBASER_WaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WaWb) #define GICR_PENDBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWaWt) #define GICR_PENDBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWaWb) #define GICR_PENDBASER_PTZ BIT_ULL(62) /* * Re-Distributor registers, offsets from SGI_base */ #define GICR_IGROUPR0 GICD_IGROUPR #define GICR_ISENABLER0 GICD_ISENABLER #define GICR_ICENABLER0 GICD_ICENABLER #define GICR_ISPENDR0 GICD_ISPENDR #define GICR_ICPENDR0 GICD_ICPENDR #define GICR_ISACTIVER0 GICD_ISACTIVER #define GICR_ICACTIVER0 GICD_ICACTIVER #define GICR_IPRIORITYR0 GICD_IPRIORITYR #define GICR_ICFGR0 GICD_ICFGR #define GICR_IGRPMODR0 GICD_IGRPMODR #define GICR_NSACR GICD_NSACR #define GICR_TYPER_PLPIS (1U << 0) #define GICR_TYPER_VLPIS (1U << 1) #define GICR_TYPER_DIRTY (1U << 2) #define GICR_TYPER_DirectLPIS (1U << 3) #define GICR_TYPER_LAST (1U << 4) #define GICR_TYPER_RVPEID (1U << 7) #define GICR_TYPER_COMMON_LPI_AFF GENMASK_ULL(25, 24) #define GICR_TYPER_AFFINITY GENMASK_ULL(63, 32) #define GICR_INVLPIR_INTID GENMASK_ULL(31, 0) #define GICR_INVLPIR_VPEID GENMASK_ULL(47, 32) #define GICR_INVLPIR_V GENMASK_ULL(63, 63) #define GICR_INVALLR_VPEID GICR_INVLPIR_VPEID #define GICR_INVALLR_V GICR_INVLPIR_V #define GIC_V3_REDIST_SIZE 0x20000 #define LPI_PROP_GROUP1 (1 << 1) #define LPI_PROP_ENABLED (1 << 0) /* * Re-Distributor registers, offsets from VLPI_base */ #define GICR_VPROPBASER 0x0070 #define GICR_VPROPBASER_IDBITS_MASK 0x1f #define GICR_VPROPBASER_SHAREABILITY_SHIFT (10) #define GICR_VPROPBASER_INNER_CACHEABILITY_SHIFT (7) #define GICR_VPROPBASER_OUTER_CACHEABILITY_SHIFT (56) #define GICR_VPROPBASER_SHAREABILITY_MASK \ GIC_BASER_SHAREABILITY(GICR_VPROPBASER, SHAREABILITY_MASK) #define GICR_VPROPBASER_INNER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK) #define GICR_VPROPBASER_OUTER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK) #define GICR_VPROPBASER_CACHEABILITY_MASK \ GICR_VPROPBASER_INNER_CACHEABILITY_MASK #define GICR_VPROPBASER_InnerShareable \ GIC_BASER_SHAREABILITY(GICR_VPROPBASER, InnerShareable) #define GICR_VPROPBASER_nCnB GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, nCnB) #define GICR_VPROPBASER_nC GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, nC) #define GICR_VPROPBASER_RaWt GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWt) #define GICR_VPROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWb) #define GICR_VPROPBASER_WaWt GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, WaWt) #define GICR_VPROPBASER_WaWb GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, WaWb) #define GICR_VPROPBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWaWt) #define GICR_VPROPBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, RaWaWb) /* * GICv4.1 VPROPBASER reinvention. A subtle mix between the old * VPROPBASER and ITS_BASER. Just not quite any of the two. */ #define GICR_VPROPBASER_4_1_VALID (1ULL << 63) #define GICR_VPROPBASER_4_1_ENTRY_SIZE GENMASK_ULL(61, 59) #define GICR_VPROPBASER_4_1_INDIRECT (1ULL << 55) #define GICR_VPROPBASER_4_1_PAGE_SIZE GENMASK_ULL(54, 53) #define GICR_VPROPBASER_4_1_Z (1ULL << 52) #define GICR_VPROPBASER_4_1_ADDR GENMASK_ULL(51, 12) #define GICR_VPROPBASER_4_1_SIZE GENMASK_ULL(6, 0) #define GICR_VPENDBASER 0x0078 #define GICR_VPENDBASER_SHAREABILITY_SHIFT (10) #define GICR_VPENDBASER_INNER_CACHEABILITY_SHIFT (7) #define GICR_VPENDBASER_OUTER_CACHEABILITY_SHIFT (56) #define GICR_VPENDBASER_SHAREABILITY_MASK \ GIC_BASER_SHAREABILITY(GICR_VPENDBASER, SHAREABILITY_MASK) #define GICR_VPENDBASER_INNER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK) #define GICR_VPENDBASER_OUTER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GICR_VPENDBASER, OUTER, MASK) #define GICR_VPENDBASER_CACHEABILITY_MASK \ GICR_VPENDBASER_INNER_CACHEABILITY_MASK #define GICR_VPENDBASER_NonShareable \ GIC_BASER_SHAREABILITY(GICR_VPENDBASER, NonShareable) #define GICR_VPENDBASER_InnerShareable \ GIC_BASER_SHAREABILITY(GICR_VPENDBASER, InnerShareable) #define GICR_VPENDBASER_nCnB GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, nCnB) #define GICR_VPENDBASER_nC GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, nC) #define GICR_VPENDBASER_RaWt GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWt) #define GICR_VPENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWb) #define GICR_VPENDBASER_WaWt GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, WaWt) #define GICR_VPENDBASER_WaWb GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, WaWb) #define GICR_VPENDBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWaWt) #define GICR_VPENDBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, RaWaWb) #define GICR_VPENDBASER_Dirty (1ULL << 60) #define GICR_VPENDBASER_PendingLast (1ULL << 61) #define GICR_VPENDBASER_IDAI (1ULL << 62) #define GICR_VPENDBASER_Valid (1ULL << 63) /* * GICv4.1 VPENDBASER, used for VPE residency. On top of these fields, * also use the above Valid, PendingLast and Dirty. */ #define GICR_VPENDBASER_4_1_DB (1ULL << 62) #define GICR_VPENDBASER_4_1_VGRP0EN (1ULL << 59) #define GICR_VPENDBASER_4_1_VGRP1EN (1ULL << 58) #define GICR_VPENDBASER_4_1_VPEID GENMASK_ULL(15, 0) #define GICR_VSGIR 0x0080 #define GICR_VSGIR_VPEID GENMASK(15, 0) #define GICR_VSGIPENDR 0x0088 #define GICR_VSGIPENDR_BUSY (1U << 31) #define GICR_VSGIPENDR_PENDING GENMASK(15, 0) /* * ITS registers, offsets from ITS_base */ #define GITS_CTLR 0x0000 #define GITS_IIDR 0x0004 #define GITS_TYPER 0x0008 #define GITS_MPIDR 0x0018 #define GITS_CBASER 0x0080 #define GITS_CWRITER 0x0088 #define GITS_CREADR 0x0090 #define GITS_BASER 0x0100 #define GITS_IDREGS_BASE 0xffd0 #define GITS_PIDR0 0xffe0 #define GITS_PIDR1 0xffe4 #define GITS_PIDR2 GICR_PIDR2 #define GITS_PIDR4 0xffd0 #define GITS_CIDR0 0xfff0 #define GITS_CIDR1 0xfff4 #define GITS_CIDR2 0xfff8 #define GITS_CIDR3 0xfffc #define GITS_TRANSLATER 0x10040 #define GITS_SGIR 0x20020 #define GITS_SGIR_VPEID GENMASK_ULL(47, 32) #define GITS_SGIR_VINTID GENMASK_ULL(3, 0) #define GITS_CTLR_ENABLE (1U << 0) #define GITS_CTLR_ImDe (1U << 1) #define GITS_CTLR_ITS_NUMBER_SHIFT 4 #define GITS_CTLR_ITS_NUMBER (0xFU << GITS_CTLR_ITS_NUMBER_SHIFT) #define GITS_CTLR_QUIESCENT (1U << 31) #define GITS_TYPER_PLPIS (1UL << 0) #define GITS_TYPER_VLPIS (1UL << 1) #define GITS_TYPER_ITT_ENTRY_SIZE_SHIFT 4 #define GITS_TYPER_ITT_ENTRY_SIZE GENMASK_ULL(7, 4) #define GITS_TYPER_IDBITS_SHIFT 8 #define GITS_TYPER_DEVBITS_SHIFT 13 #define GITS_TYPER_DEVBITS GENMASK_ULL(17, 13) #define GITS_TYPER_PTA (1UL << 19) #define GITS_TYPER_HCC_SHIFT 24 #define GITS_TYPER_HCC(r) (((r) >> GITS_TYPER_HCC_SHIFT) & 0xff) #define GITS_TYPER_VMOVP (1ULL << 37) #define GITS_TYPER_VMAPP (1ULL << 40) #define GITS_TYPER_SVPET GENMASK_ULL(42, 41) #define GITS_IIDR_REV_SHIFT 12 #define GITS_IIDR_REV_MASK (0xf << GITS_IIDR_REV_SHIFT) #define GITS_IIDR_REV(r) (((r) >> GITS_IIDR_REV_SHIFT) & 0xf) #define GITS_IIDR_PRODUCTID_SHIFT 24 #define GITS_CBASER_VALID (1ULL << 63) #define GITS_CBASER_SHAREABILITY_SHIFT (10) #define GITS_CBASER_INNER_CACHEABILITY_SHIFT (59) #define GITS_CBASER_OUTER_CACHEABILITY_SHIFT (53) #define GITS_CBASER_SHAREABILITY_MASK \ GIC_BASER_SHAREABILITY(GITS_CBASER, SHAREABILITY_MASK) #define GITS_CBASER_INNER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK) #define GITS_CBASER_OUTER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK) #define GITS_CBASER_CACHEABILITY_MASK GITS_CBASER_INNER_CACHEABILITY_MASK #define GITS_CBASER_InnerShareable \ GIC_BASER_SHAREABILITY(GITS_CBASER, InnerShareable) #define GITS_CBASER_nCnB GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, nCnB) #define GITS_CBASER_nC GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, nC) #define GITS_CBASER_RaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWt) #define GITS_CBASER_RaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWb) #define GITS_CBASER_WaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, WaWt) #define GITS_CBASER_WaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, WaWb) #define GITS_CBASER_RaWaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWaWt) #define GITS_CBASER_RaWaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWaWb) #define GITS_CBASER_ADDRESS(cbaser) ((cbaser) & GENMASK_ULL(51, 12)) #define GITS_BASER_NR_REGS 8 #define GITS_BASER_VALID (1ULL << 63) #define GITS_BASER_INDIRECT (1ULL << 62) #define GITS_BASER_INNER_CACHEABILITY_SHIFT (59) #define GITS_BASER_OUTER_CACHEABILITY_SHIFT (53) #define GITS_BASER_INNER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GITS_BASER, INNER, MASK) #define GITS_BASER_CACHEABILITY_MASK GITS_BASER_INNER_CACHEABILITY_MASK #define GITS_BASER_OUTER_CACHEABILITY_MASK \ GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, MASK) #define GITS_BASER_SHAREABILITY_MASK \ GIC_BASER_SHAREABILITY(GITS_BASER, SHAREABILITY_MASK) #define GITS_BASER_nCnB GIC_BASER_CACHEABILITY(GITS_BASER, INNER, nCnB) #define GITS_BASER_nC GIC_BASER_CACHEABILITY(GITS_BASER, INNER, nC) #define GITS_BASER_RaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWt) #define GITS_BASER_RaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) #define GITS_BASER_WaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, WaWt) #define GITS_BASER_WaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, WaWb) #define GITS_BASER_RaWaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWaWt) #define GITS_BASER_RaWaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWaWb) #define GITS_BASER_TYPE_SHIFT (56) #define GITS_BASER_TYPE(r) (((r) >> GITS_BASER_TYPE_SHIFT) & 7) #define GITS_BASER_ENTRY_SIZE_SHIFT (48) #define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f) + 1) #define GITS_BASER_ENTRY_SIZE_MASK GENMASK_ULL(52, 48) #define GITS_BASER_PHYS_52_to_48(phys) \ (((phys) & GENMASK_ULL(47, 16)) | (((phys) >> 48) & 0xf) << 12) #define GITS_BASER_ADDR_48_to_52(baser) \ (((baser) & GENMASK_ULL(47, 16)) | (((baser) >> 12) & 0xf) << 48) #define GITS_BASER_SHAREABILITY_SHIFT (10) #define GITS_BASER_InnerShareable \ GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) #define GITS_BASER_PAGE_SIZE_SHIFT (8) #define __GITS_BASER_PSZ(sz) (GIC_PAGE_SIZE_ ## sz << GITS_BASER_PAGE_SIZE_SHIFT) #define GITS_BASER_PAGE_SIZE_4K __GITS_BASER_PSZ(4K) #define GITS_BASER_PAGE_SIZE_16K __GITS_BASER_PSZ(16K) #define GITS_BASER_PAGE_SIZE_64K __GITS_BASER_PSZ(64K) #define GITS_BASER_PAGE_SIZE_MASK __GITS_BASER_PSZ(MASK) #define GITS_BASER_PAGES_MAX 256 #define GITS_BASER_PAGES_SHIFT (0) #define GITS_BASER_NR_PAGES(r) (((r) & 0xff) + 1) #define GITS_BASER_TYPE_NONE 0 #define GITS_BASER_TYPE_DEVICE 1 #define GITS_BASER_TYPE_VCPU 2 #define GITS_BASER_TYPE_RESERVED3 3 #define GITS_BASER_TYPE_COLLECTION 4 #define GITS_BASER_TYPE_RESERVED5 5 #define GITS_BASER_TYPE_RESERVED6 6 #define GITS_BASER_TYPE_RESERVED7 7 #define GITS_LVL1_ENTRY_SIZE (8UL) /* * ITS commands */ #define GITS_CMD_MAPD 0x08 #define GITS_CMD_MAPC 0x09 #define GITS_CMD_MAPTI 0x0a #define GITS_CMD_MAPI 0x0b #define GITS_CMD_MOVI 0x01 #define GITS_CMD_DISCARD 0x0f #define GITS_CMD_INV 0x0c #define GITS_CMD_MOVALL 0x0e #define GITS_CMD_INVALL 0x0d #define GITS_CMD_INT 0x03 #define GITS_CMD_CLEAR 0x04 #define GITS_CMD_SYNC 0x05 /* * GICv4 ITS specific commands */ #define GITS_CMD_GICv4(x) ((x) | 0x20) #define GITS_CMD_VINVALL GITS_CMD_GICv4(GITS_CMD_INVALL) #define GITS_CMD_VMAPP GITS_CMD_GICv4(GITS_CMD_MAPC) #define GITS_CMD_VMAPTI GITS_CMD_GICv4(GITS_CMD_MAPTI) #define GITS_CMD_VMOVI GITS_CMD_GICv4(GITS_CMD_MOVI) #define GITS_CMD_VSYNC GITS_CMD_GICv4(GITS_CMD_SYNC) /* VMOVP, VSGI and INVDB are the odd ones, as they dont have a physical counterpart */ #define GITS_CMD_VMOVP GITS_CMD_GICv4(2) #define GITS_CMD_VSGI GITS_CMD_GICv4(3) #define GITS_CMD_INVDB GITS_CMD_GICv4(0xe) /* * ITS error numbers */ #define E_ITS_MOVI_UNMAPPED_INTERRUPT 0x010107 #define E_ITS_MOVI_UNMAPPED_COLLECTION 0x010109 #define E_ITS_INT_UNMAPPED_INTERRUPT 0x010307 #define E_ITS_CLEAR_UNMAPPED_INTERRUPT 0x010507 #define E_ITS_MAPD_DEVICE_OOR 0x010801 #define E_ITS_MAPD_ITTSIZE_OOR 0x010802 #define E_ITS_MAPC_PROCNUM_OOR 0x010902 #define E_ITS_MAPC_COLLECTION_OOR 0x010903 #define E_ITS_MAPTI_UNMAPPED_DEVICE 0x010a04 #define E_ITS_MAPTI_ID_OOR 0x010a05 #define E_ITS_MAPTI_PHYSICALID_OOR 0x010a06 #define E_ITS_INV_UNMAPPED_INTERRUPT 0x010c07 #define E_ITS_INVALL_UNMAPPED_COLLECTION 0x010d09 #define E_ITS_MOVALL_PROCNUM_OOR 0x010e01 #define E_ITS_DISCARD_UNMAPPED_INTERRUPT 0x010f07 /* * CPU interface registers */ #define ICC_CTLR_EL1_EOImode_SHIFT (1) #define ICC_CTLR_EL1_EOImode_drop_dir (0U << ICC_CTLR_EL1_EOImode_SHIFT) #define ICC_CTLR_EL1_EOImode_drop (1U << ICC_CTLR_EL1_EOImode_SHIFT) #define ICC_CTLR_EL1_EOImode_MASK (1 << ICC_CTLR_EL1_EOImode_SHIFT) #define ICC_CTLR_EL1_CBPR_SHIFT 0 #define ICC_CTLR_EL1_CBPR_MASK (1 << ICC_CTLR_EL1_CBPR_SHIFT) #define ICC_CTLR_EL1_PMHE_SHIFT 6 #define ICC_CTLR_EL1_PMHE_MASK (1 << ICC_CTLR_EL1_PMHE_SHIFT) #define ICC_CTLR_EL1_PRI_BITS_SHIFT 8 #define ICC_CTLR_EL1_PRI_BITS_MASK (0x7 << ICC_CTLR_EL1_PRI_BITS_SHIFT) #define ICC_CTLR_EL1_ID_BITS_SHIFT 11 #define ICC_CTLR_EL1_ID_BITS_MASK (0x7 << ICC_CTLR_EL1_ID_BITS_SHIFT) #define ICC_CTLR_EL1_SEIS_SHIFT 14 #define ICC_CTLR_EL1_SEIS_MASK (0x1 << ICC_CTLR_EL1_SEIS_SHIFT) #define ICC_CTLR_EL1_A3V_SHIFT 15 #define ICC_CTLR_EL1_A3V_MASK (0x1 << ICC_CTLR_EL1_A3V_SHIFT) #define ICC_CTLR_EL1_RSS (0x1 << 18) #define ICC_CTLR_EL1_ExtRange (0x1 << 19) #define ICC_PMR_EL1_SHIFT 0 #define ICC_PMR_EL1_MASK (0xff << ICC_PMR_EL1_SHIFT) #define ICC_BPR0_EL1_SHIFT 0 #define ICC_BPR0_EL1_MASK (0x7 << ICC_BPR0_EL1_SHIFT) #define ICC_BPR1_EL1_SHIFT 0 #define ICC_BPR1_EL1_MASK (0x7 << ICC_BPR1_EL1_SHIFT) #define ICC_IGRPEN0_EL1_SHIFT 0 #define ICC_IGRPEN0_EL1_MASK (1 << ICC_IGRPEN0_EL1_SHIFT) #define ICC_IGRPEN1_EL1_SHIFT 0 #define ICC_IGRPEN1_EL1_MASK (1 << ICC_IGRPEN1_EL1_SHIFT) #define ICC_SRE_EL1_DIB (1U << 2) #define ICC_SRE_EL1_DFB (1U << 1) #define ICC_SRE_EL1_SRE (1U << 0) /* These are for GICv2 emulation only */ #define GICH_LR_VIRTUALID (0x3ffUL << 0) #define GICH_LR_PHYSID_CPUID_SHIFT (10) #define GICH_LR_PHYSID_CPUID (7UL << GICH_LR_PHYSID_CPUID_SHIFT) #define ICC_IAR1_EL1_SPURIOUS 0x3ff #define ICC_SRE_EL2_SRE (1 << 0) #define ICC_SRE_EL2_ENABLE (1 << 3) #define ICC_SGI1R_TARGET_LIST_SHIFT 0 #define ICC_SGI1R_TARGET_LIST_MASK (0xffff << ICC_SGI1R_TARGET_LIST_SHIFT) #define ICC_SGI1R_AFFINITY_1_SHIFT 16 #define ICC_SGI1R_AFFINITY_1_MASK (0xff << ICC_SGI1R_AFFINITY_1_SHIFT) #define ICC_SGI1R_SGI_ID_SHIFT 24 #define ICC_SGI1R_SGI_ID_MASK (0xfULL << ICC_SGI1R_SGI_ID_SHIFT) #define ICC_SGI1R_AFFINITY_2_SHIFT 32 #define ICC_SGI1R_AFFINITY_2_MASK (0xffULL << ICC_SGI1R_AFFINITY_2_SHIFT) #define ICC_SGI1R_IRQ_ROUTING_MODE_BIT 40 #define ICC_SGI1R_RS_SHIFT 44 #define ICC_SGI1R_RS_MASK (0xfULL << ICC_SGI1R_RS_SHIFT) #define ICC_SGI1R_AFFINITY_3_SHIFT 48 #define ICC_SGI1R_AFFINITY_3_MASK (0xffULL << ICC_SGI1R_AFFINITY_3_SHIFT) #include <asm/arch_gicv3.h> #ifndef __ASSEMBLY__ /* * We need a value to serve as a irq-type for LPIs. Choose one that will * hopefully pique the interest of the reviewer. */ #define GIC_IRQ_TYPE_LPI 0xa110c8ed struct rdists { struct { raw_spinlock_t rd_lock; void __iomem *rd_base; struct page *pend_page; phys_addr_t phys_base; bool lpi_enabled; cpumask_t *vpe_table_mask; void *vpe_l1_base; } __percpu *rdist; phys_addr_t prop_table_pa; void *prop_table_va; u64 flags; u32 gicd_typer; u32 gicd_typer2; bool has_vlpis; bool has_rvpeid; bool has_direct_lpi; bool has_vpend_valid_dirty; }; struct irq_domain; struct fwnode_handle; int its_cpu_init(void); int its_init(struct fwnode_handle *handle, struct rdists *rdists, struct irq_domain *domain); int mbi_init(struct fwnode_handle *fwnode, struct irq_domain *parent); static inline bool gic_enable_sre(void) { u32 val; val = gic_read_sre(); if (val & ICC_SRE_EL1_SRE) return true; val |= ICC_SRE_EL1_SRE; gic_write_sre(val); val = gic_read_sre(); return !!(val & ICC_SRE_EL1_SRE); } #endif #endif PK ! ���>� � irqchip/chained_irq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Chained IRQ handlers support. * * Copyright (C) 2011 ARM Ltd. */ #ifndef __IRQCHIP_CHAINED_IRQ_H #define __IRQCHIP_CHAINED_IRQ_H #include <linux/irq.h> /* * Entry/exit functions for chained handlers where the primary IRQ chip * may implement either fasteoi or level-trigger flow control. */ static inline void chained_irq_enter(struct irq_chip *chip, struct irq_desc *desc) { /* FastEOI controllers require no action on entry. */ if (chip->irq_eoi) return; if (chip->irq_mask_ack) { chip->irq_mask_ack(&desc->irq_data); } else { chip->irq_mask(&desc->irq_data); if (chip->irq_ack) chip->irq_ack(&desc->irq_data); } } static inline void chained_irq_exit(struct irq_chip *chip, struct irq_desc *desc) { if (chip->irq_eoi) chip->irq_eoi(&desc->irq_data); else chip->irq_unmask(&desc->irq_data); } #endif /* __IRQCHIP_CHAINED_IRQ_H */ PK ! �� � irqchip/arm-gic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * include/linux/irqchip/arm-gic.h * * Copyright (C) 2002 ARM Limited, All Rights Reserved. */ #ifndef __LINUX_IRQCHIP_ARM_GIC_H #define __LINUX_IRQCHIP_ARM_GIC_H #define GIC_CPU_CTRL 0x00 #define GIC_CPU_PRIMASK 0x04 #define GIC_CPU_BINPOINT 0x08 #define GIC_CPU_INTACK 0x0c #define GIC_CPU_EOI 0x10 #define GIC_CPU_RUNNINGPRI 0x14 #define GIC_CPU_HIGHPRI 0x18 #define GIC_CPU_ALIAS_BINPOINT 0x1c #define GIC_CPU_ACTIVEPRIO 0xd0 #define GIC_CPU_IDENT 0xfc #define GIC_CPU_DEACTIVATE 0x1000 #define GICC_ENABLE 0x1 #define GICC_INT_PRI_THRESHOLD 0xf0 #define GIC_CPU_CTRL_EnableGrp0_SHIFT 0 #define GIC_CPU_CTRL_EnableGrp0 (1 << GIC_CPU_CTRL_EnableGrp0_SHIFT) #define GIC_CPU_CTRL_EnableGrp1_SHIFT 1 #define GIC_CPU_CTRL_EnableGrp1 (1 << GIC_CPU_CTRL_EnableGrp1_SHIFT) #define GIC_CPU_CTRL_AckCtl_SHIFT 2 #define GIC_CPU_CTRL_AckCtl (1 << GIC_CPU_CTRL_AckCtl_SHIFT) #define GIC_CPU_CTRL_FIQEn_SHIFT 3 #define GIC_CPU_CTRL_FIQEn (1 << GIC_CPU_CTRL_FIQEn_SHIFT) #define GIC_CPU_CTRL_CBPR_SHIFT 4 #define GIC_CPU_CTRL_CBPR (1 << GIC_CPU_CTRL_CBPR_SHIFT) #define GIC_CPU_CTRL_EOImodeNS_SHIFT 9 #define GIC_CPU_CTRL_EOImodeNS (1 << GIC_CPU_CTRL_EOImodeNS_SHIFT) #define GICC_IAR_INT_ID_MASK 0x3ff #define GICC_INT_SPURIOUS 1023 #define GICC_DIS_BYPASS_MASK 0x1e0 #define GIC_DIST_CTRL 0x000 #define GIC_DIST_CTR 0x004 #define GIC_DIST_IIDR 0x008 #define GIC_DIST_IGROUP 0x080 #define GIC_DIST_ENABLE_SET 0x100 #define GIC_DIST_ENABLE_CLEAR 0x180 #define GIC_DIST_PENDING_SET 0x200 #define GIC_DIST_PENDING_CLEAR 0x280 #define GIC_DIST_ACTIVE_SET 0x300 #define GIC_DIST_ACTIVE_CLEAR 0x380 #define GIC_DIST_PRI 0x400 #define GIC_DIST_TARGET 0x800 #define GIC_DIST_CONFIG 0xc00 #define GIC_DIST_SOFTINT 0xf00 #define GIC_DIST_SGI_PENDING_CLEAR 0xf10 #define GIC_DIST_SGI_PENDING_SET 0xf20 #define GICD_ENABLE 0x1 #define GICD_DISABLE 0x0 #define GICD_INT_ACTLOW_LVLTRIG 0x0 #define GICD_INT_EN_CLR_X32 0xffffffff #define GICD_INT_EN_SET_SGI 0x0000ffff #define GICD_INT_EN_CLR_PPI 0xffff0000 #define GICD_IIDR_IMPLEMENTER_SHIFT 0 #define GICD_IIDR_IMPLEMENTER_MASK (0xfff << GICD_IIDR_IMPLEMENTER_SHIFT) #define GICD_IIDR_REVISION_SHIFT 12 #define GICD_IIDR_REVISION_MASK (0xf << GICD_IIDR_REVISION_SHIFT) #define GICD_IIDR_VARIANT_SHIFT 16 #define GICD_IIDR_VARIANT_MASK (0xf << GICD_IIDR_VARIANT_SHIFT) #define GICD_IIDR_PRODUCT_ID_SHIFT 24 #define GICD_IIDR_PRODUCT_ID_MASK (0xff << GICD_IIDR_PRODUCT_ID_SHIFT) #define GICH_HCR 0x0 #define GICH_VTR 0x4 #define GICH_VMCR 0x8 #define GICH_MISR 0x10 #define GICH_EISR0 0x20 #define GICH_EISR1 0x24 #define GICH_ELRSR0 0x30 #define GICH_ELRSR1 0x34 #define GICH_APR 0xf0 #define GICH_LR0 0x100 #define GICH_HCR_EN (1 << 0) #define GICH_HCR_UIE (1 << 1) #define GICH_HCR_NPIE (1 << 3) #define GICH_LR_VIRTUALID (0x3ff << 0) #define GICH_LR_PHYSID_CPUID_SHIFT (10) #define GICH_LR_PHYSID_CPUID (0x3ff << GICH_LR_PHYSID_CPUID_SHIFT) #define GICH_LR_PRIORITY_SHIFT 23 #define GICH_LR_STATE (3 << 28) #define GICH_LR_PENDING_BIT (1 << 28) #define GICH_LR_ACTIVE_BIT (1 << 29) #define GICH_LR_EOI (1 << 19) #define GICH_LR_GROUP1 (1 << 30) #define GICH_LR_HW (1 << 31) #define GICH_VMCR_ENABLE_GRP0_SHIFT 0 #define GICH_VMCR_ENABLE_GRP0_MASK (1 << GICH_VMCR_ENABLE_GRP0_SHIFT) #define GICH_VMCR_ENABLE_GRP1_SHIFT 1 #define GICH_VMCR_ENABLE_GRP1_MASK (1 << GICH_VMCR_ENABLE_GRP1_SHIFT) #define GICH_VMCR_ACK_CTL_SHIFT 2 #define GICH_VMCR_ACK_CTL_MASK (1 << GICH_VMCR_ACK_CTL_SHIFT) #define GICH_VMCR_FIQ_EN_SHIFT 3 #define GICH_VMCR_FIQ_EN_MASK (1 << GICH_VMCR_FIQ_EN_SHIFT) #define GICH_VMCR_CBPR_SHIFT 4 #define GICH_VMCR_CBPR_MASK (1 << GICH_VMCR_CBPR_SHIFT) #define GICH_VMCR_EOI_MODE_SHIFT 9 #define GICH_VMCR_EOI_MODE_MASK (1 << GICH_VMCR_EOI_MODE_SHIFT) #define GICH_VMCR_PRIMASK_SHIFT 27 #define GICH_VMCR_PRIMASK_MASK (0x1f << GICH_VMCR_PRIMASK_SHIFT) #define GICH_VMCR_BINPOINT_SHIFT 21 #define GICH_VMCR_BINPOINT_MASK (0x7 << GICH_VMCR_BINPOINT_SHIFT) #define GICH_VMCR_ALIAS_BINPOINT_SHIFT 18 #define GICH_VMCR_ALIAS_BINPOINT_MASK (0x7 << GICH_VMCR_ALIAS_BINPOINT_SHIFT) #define GICH_MISR_EOI (1 << 0) #define GICH_MISR_U (1 << 1) #define GICV_PMR_PRIORITY_SHIFT 3 #define GICV_PMR_PRIORITY_MASK (0x1f << GICV_PMR_PRIORITY_SHIFT) #ifndef __ASSEMBLY__ #include <linux/irqdomain.h> struct device_node; struct gic_chip_data; void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); int gic_cpu_if_down(unsigned int gic_nr); void gic_cpu_save(struct gic_chip_data *gic); void gic_cpu_restore(struct gic_chip_data *gic); void gic_dist_save(struct gic_chip_data *gic); void gic_dist_restore(struct gic_chip_data *gic); /* * Subdrivers that need some preparatory work can initialize their * chips and call this to register their GICs. */ int gic_of_init(struct device_node *node, struct device_node *parent); /* * Initialises and registers a non-root or child GIC chip. Memory for * the gic_chip_data structure is dynamically allocated. */ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq); /* * Legacy platforms not converted to DT yet must use this to init * their GIC */ void gic_init(void __iomem *dist , void __iomem *cpu); void gic_send_sgi(unsigned int cpu_id, unsigned int irq); int gic_get_cpu_id(unsigned int cpu); void gic_migrate_target(unsigned int new_cpu_id); unsigned long gic_get_sgir_physaddr(void); #endif /* __ASSEMBLY */ #endif PK ! �f6� � irqchip/mxs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2013 Freescale Semiconductor, Inc. */ #ifndef __LINUX_IRQCHIP_MXS_H #define __LINUX_IRQCHIP_MXS_H extern void icoll_handle_irq(struct pt_regs *); #endif PK ! Ҹ� irqchip/irq-ixp4xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IRQ_IXP4XX_H #define __IRQ_IXP4XX_H #include <linux/ioport.h> struct irq_domain; void ixp4xx_irq_init(resource_size_t irqbase, bool is_356); struct irq_domain *ixp4xx_get_irq_domain(void); #endif /* __IRQ_IXP4XX_H */ PK ! �*� � irqchip/xtensa-mx.hnu �[��� /* * Xtensa MX interrupt distributor * * Copyright (C) 2002 - 2013 Tensilica, Inc. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef __LINUX_IRQCHIP_XTENSA_MX_H #define __LINUX_IRQCHIP_XTENSA_MX_H struct device_node; int xtensa_mx_init_legacy(struct device_node *interrupt_parent); #endif /* __LINUX_IRQCHIP_XTENSA_MX_H */ PK ! �' irqchip/xtensa-pic.hnu �[��� /* * Xtensa built-in interrupt controller * * Copyright (C) 2002 - 2013 Tensilica, Inc. * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef __LINUX_IRQCHIP_XTENSA_PIC_H #define __LINUX_IRQCHIP_XTENSA_PIC_H struct device_node; int xtensa_pic_init_legacy(struct device_node *interrupt_parent); #endif /* __LINUX_IRQCHIP_XTENSA_PIC_H */ PK ! �"D�K K irqchip/irq-partition-percpu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 ARM Limited, All Rights Reserved. * Author: Marc Zyngier <marc.zyngier@arm.com> */ #ifndef __LINUX_IRQCHIP_IRQ_PARTITION_PERCPU_H #define __LINUX_IRQCHIP_IRQ_PARTITION_PERCPU_H #include <linux/fwnode.h> #include <linux/cpumask.h> #include <linux/irqdomain.h> struct partition_affinity { cpumask_t mask; void *partition_id; }; struct partition_desc; #ifdef CONFIG_PARTITION_PERCPU int partition_translate_id(struct partition_desc *desc, void *partition_id); struct partition_desc *partition_create_desc(struct fwnode_handle *fwnode, struct partition_affinity *parts, int nr_parts, int chained_irq, const struct irq_domain_ops *ops); struct irq_domain *partition_get_domain(struct partition_desc *dsc); #else static inline int partition_translate_id(struct partition_desc *desc, void *partition_id) { return -EINVAL; } static inline struct partition_desc *partition_create_desc(struct fwnode_handle *fwnode, struct partition_affinity *parts, int nr_parts, int chained_irq, const struct irq_domain_ops *ops) { return NULL; } static inline struct irq_domain *partition_get_domain(struct partition_desc *dsc) { return NULL; } #endif #endif /* __LINUX_IRQCHIP_IRQ_PARTITION_PERCPU_H */ PK ! Jk�̛ � irqchip/mmp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IRQCHIP_MMP_H #define __IRQCHIP_MMP_H extern struct irq_chip icu_irq_chip; #endif /* __IRQCHIP_MMP_H */ PK ! �x2h h irqchip/irq-davinci-cp-intc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2019 Texas Instruments */ #ifndef _LINUX_IRQ_DAVINCI_CP_INTC_ #define _LINUX_IRQ_DAVINCI_CP_INTC_ #include <linux/ioport.h> /** * struct davinci_cp_intc_config - configuration data for davinci-cp-intc * driver. * * @reg: register range to map * @num_irqs: number of HW interrupts supported by the controller */ struct davinci_cp_intc_config { struct resource reg; unsigned int num_irqs; }; int davinci_cp_intc_init(const struct davinci_cp_intc_config *config); #endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */ PK ! ���ա � irqchip/irq-madera.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Interrupt support for Cirrus Logic Madera codecs * * Copyright (C) 2016-2018 Cirrus Logic, Inc. and * Cirrus Logic International Semiconductor Ltd. */ #ifndef IRQCHIP_MADERA_H #define IRQCHIP_MADERA_H #include <linux/interrupt.h> #include <linux/mfd/madera/core.h> #define MADERA_IRQ_FLL1_LOCK 0 #define MADERA_IRQ_FLL2_LOCK 1 #define MADERA_IRQ_FLL3_LOCK 2 #define MADERA_IRQ_FLLAO_LOCK 3 #define MADERA_IRQ_CLK_SYS_ERR 4 #define MADERA_IRQ_CLK_ASYNC_ERR 5 #define MADERA_IRQ_CLK_DSP_ERR 6 #define MADERA_IRQ_HPDET 7 #define MADERA_IRQ_MICDET1 8 #define MADERA_IRQ_MICDET2 9 #define MADERA_IRQ_JD1_RISE 10 #define MADERA_IRQ_JD1_FALL 11 #define MADERA_IRQ_JD2_RISE 12 #define MADERA_IRQ_JD2_FALL 13 #define MADERA_IRQ_MICD_CLAMP_RISE 14 #define MADERA_IRQ_MICD_CLAMP_FALL 15 #define MADERA_IRQ_DRC2_SIG_DET 16 #define MADERA_IRQ_DRC1_SIG_DET 17 #define MADERA_IRQ_ASRC1_IN1_LOCK 18 #define MADERA_IRQ_ASRC1_IN2_LOCK 19 #define MADERA_IRQ_ASRC2_IN1_LOCK 20 #define MADERA_IRQ_ASRC2_IN2_LOCK 21 #define MADERA_IRQ_DSP_IRQ1 22 #define MADERA_IRQ_DSP_IRQ2 23 #define MADERA_IRQ_DSP_IRQ3 24 #define MADERA_IRQ_DSP_IRQ4 25 #define MADERA_IRQ_DSP_IRQ5 26 #define MADERA_IRQ_DSP_IRQ6 27 #define MADERA_IRQ_DSP_IRQ7 28 #define MADERA_IRQ_DSP_IRQ8 29 #define MADERA_IRQ_DSP_IRQ9 30 #define MADERA_IRQ_DSP_IRQ10 31 #define MADERA_IRQ_DSP_IRQ11 32 #define MADERA_IRQ_DSP_IRQ12 33 #define MADERA_IRQ_DSP_IRQ13 34 #define MADERA_IRQ_DSP_IRQ14 35 #define MADERA_IRQ_DSP_IRQ15 36 #define MADERA_IRQ_DSP_IRQ16 37 #define MADERA_IRQ_HP1L_SC 38 #define MADERA_IRQ_HP1R_SC 39 #define MADERA_IRQ_HP2L_SC 40 #define MADERA_IRQ_HP2R_SC 41 #define MADERA_IRQ_HP3L_SC 42 #define MADERA_IRQ_HP3R_SC 43 #define MADERA_IRQ_SPKOUTL_SC 44 #define MADERA_IRQ_SPKOUTR_SC 45 #define MADERA_IRQ_HP1L_ENABLE_DONE 46 #define MADERA_IRQ_HP1R_ENABLE_DONE 47 #define MADERA_IRQ_HP2L_ENABLE_DONE 48 #define MADERA_IRQ_HP2R_ENABLE_DONE 49 #define MADERA_IRQ_HP3L_ENABLE_DONE 50 #define MADERA_IRQ_HP3R_ENABLE_DONE 51 #define MADERA_IRQ_SPKOUTL_ENABLE_DONE 52 #define MADERA_IRQ_SPKOUTR_ENABLE_DONE 53 #define MADERA_IRQ_SPK_SHUTDOWN 54 #define MADERA_IRQ_SPK_OVERHEAT 55 #define MADERA_IRQ_SPK_OVERHEAT_WARN 56 #define MADERA_IRQ_GPIO1 57 #define MADERA_IRQ_GPIO2 58 #define MADERA_IRQ_GPIO3 59 #define MADERA_IRQ_GPIO4 60 #define MADERA_IRQ_GPIO5 61 #define MADERA_IRQ_GPIO6 62 #define MADERA_IRQ_GPIO7 63 #define MADERA_IRQ_GPIO8 64 #define MADERA_IRQ_DSP1_BUS_ERR 65 #define MADERA_IRQ_DSP2_BUS_ERR 66 #define MADERA_IRQ_DSP3_BUS_ERR 67 #define MADERA_IRQ_DSP4_BUS_ERR 68 #define MADERA_IRQ_DSP5_BUS_ERR 69 #define MADERA_IRQ_DSP6_BUS_ERR 70 #define MADERA_IRQ_DSP7_BUS_ERR 71 #define MADERA_NUM_IRQ 72 /* * These wrapper functions are for use by other child drivers of the * same parent MFD. */ static inline int madera_get_irq_mapping(struct madera *madera, int irq) { if (!madera->irq_dev) return -ENODEV; return regmap_irq_get_virq(madera->irq_data, irq); } static inline int madera_request_irq(struct madera *madera, int irq, const char *name, irq_handler_t handler, void *data) { irq = madera_get_irq_mapping(madera, irq); if (irq < 0) return irq; return request_threaded_irq(irq, NULL, handler, IRQF_ONESHOT, name, data); } static inline void madera_free_irq(struct madera *madera, int irq, void *data) { irq = madera_get_irq_mapping(madera, irq); if (irq < 0) return; free_irq(irq, data); } static inline int madera_set_irq_wake(struct madera *madera, int irq, int on) { irq = madera_get_irq_mapping(madera, irq); if (irq < 0) return irq; return irq_set_irq_wake(irq, on); } #endif PK ! ۜ��d d irqchip/irq-sa11x0.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Generic IRQ handling for the SA11x0. * * Copyright (C) 2015 Dmitry Eremin-Solenikov * Copyright (C) 1999-2001 Nicolas Pitre */ #ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_SA11x0_H #define __INCLUDE_LINUX_IRQCHIP_IRQ_SA11x0_H void __init sa11x0_init_irq_nodt(int irq_start, resource_size_t io_start); #endif PK ! 1Dѥ of_irq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __OF_IRQ_H #define __OF_IRQ_H #include <linux/types.h> #include <linux/errno.h> #include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/ioport.h> #include <linux/of.h> typedef int (*of_irq_init_cb_t)(struct device_node *, struct device_node *); /* * Workarounds only applied to 32bit powermac machines */ #define OF_IMAP_OLDWORLD_MAC 0x00000001 #define OF_IMAP_NO_PHANDLE 0x00000002 #if defined(CONFIG_PPC32) && defined(CONFIG_PPC_PMAC) extern unsigned int of_irq_workarounds; extern struct device_node *of_irq_dflt_pic; extern int of_irq_parse_oldworld(struct device_node *device, int index, struct of_phandle_args *out_irq); #else /* CONFIG_PPC32 && CONFIG_PPC_PMAC */ #define of_irq_workarounds (0) #define of_irq_dflt_pic (NULL) static inline int of_irq_parse_oldworld(struct device_node *device, int index, struct of_phandle_args *out_irq) { return -EINVAL; } #endif /* CONFIG_PPC32 && CONFIG_PPC_PMAC */ extern int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); extern int of_irq_to_resource(struct device_node *dev, int index, struct resource *r); extern void of_irq_init(const struct of_device_id *matches); #ifdef CONFIG_OF_IRQ extern int of_irq_parse_one(struct device_node *device, int index, struct of_phandle_args *out_irq); extern int of_irq_count(struct device_node *dev); extern int of_irq_get(struct device_node *dev, int index); extern int of_irq_get_byname(struct device_node *dev, const char *name); extern int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs); extern struct device_node *of_irq_find_parent(struct device_node *child); extern struct irq_domain *of_msi_get_domain(struct device *dev, struct device_node *np, enum irq_domain_bus_token token); extern struct irq_domain *of_msi_map_get_device_domain(struct device *dev, u32 id, u32 bus_token); extern void of_msi_configure(struct device *dev, struct device_node *np); u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in); #else static inline int of_irq_parse_one(struct device_node *device, int index, struct of_phandle_args *out_irq) { return -EINVAL; } static inline int of_irq_count(struct device_node *dev) { return 0; } static inline int of_irq_get(struct device_node *dev, int index) { return 0; } static inline int of_irq_get_byname(struct device_node *dev, const char *name) { return 0; } static inline int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs) { return 0; } static inline void *of_irq_find_parent(struct device_node *child) { return NULL; } static inline struct irq_domain *of_msi_get_domain(struct device *dev, struct device_node *np, enum irq_domain_bus_token token) { return NULL; } static inline struct irq_domain *of_msi_map_get_device_domain(struct device *dev, u32 id, u32 bus_token) { return NULL; } static inline void of_msi_configure(struct device *dev, struct device_node *np) { } static inline u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in) { return id_in; } #endif #if defined(CONFIG_OF_IRQ) || defined(CONFIG_SPARC) /* * irq_of_parse_and_map() is used by all OF enabled platforms; but SPARC * implements it differently. However, the prototype is the same for all, * so declare it here regardless of the CONFIG_OF_IRQ setting. */ extern unsigned int irq_of_parse_and_map(struct device_node *node, int index); #else /* !CONFIG_OF && !CONFIG_SPARC */ static inline unsigned int irq_of_parse_and_map(struct device_node *dev, int index) { return 0; } #endif /* !CONFIG_OF */ #endif /* __OF_IRQ_H */ PK ! _\� � nvmem-provider.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * nvmem framework provider. * * Copyright (C) 2015 Srinivas Kandagatla <srinivas.kandagatla@linaro.org> * Copyright (C) 2013 Maxime Ripard <maxime.ripard@free-electrons.com> */ #ifndef _LINUX_NVMEM_PROVIDER_H #define _LINUX_NVMEM_PROVIDER_H #include <linux/err.h> #include <linux/errno.h> #include <linux/gpio/consumer.h> struct nvmem_device; struct nvmem_cell_info; typedef int (*nvmem_reg_read_t)(void *priv, unsigned int offset, void *val, size_t bytes); typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, void *val, size_t bytes); enum nvmem_type { NVMEM_TYPE_UNKNOWN = 0, NVMEM_TYPE_EEPROM, NVMEM_TYPE_OTP, NVMEM_TYPE_BATTERY_BACKED, NVMEM_TYPE_FRAM, }; #define NVMEM_DEVID_NONE (-1) #define NVMEM_DEVID_AUTO (-2) /** * struct nvmem_keepout - NVMEM register keepout range. * * @start: The first byte offset to avoid. * @end: One beyond the last byte offset to avoid. * @value: The byte to fill reads with for this region. */ struct nvmem_keepout { unsigned int start; unsigned int end; unsigned char value; }; /** * struct nvmem_config - NVMEM device configuration * * @dev: Parent device. * @name: Optional name. * @id: Optional device ID used in full name. Ignored if name is NULL. * @owner: Pointer to exporter module. Used for refcounting. * @cells: Optional array of pre-defined NVMEM cells. * @ncells: Number of elements in cells. * @keepout: Optional array of keepout ranges (sorted ascending by start). * @nkeepout: Number of elements in the keepout array. * @type: Type of the nvmem storage * @read_only: Device is read-only. * @root_only: Device is accessibly to root only. * @of_node: If given, this will be used instead of the parent's of_node. * @no_of_node: Device should not use the parent's of_node even if it's !NULL. * @reg_read: Callback to read data. * @reg_write: Callback to write data. * @size: Device size. * @word_size: Minimum read/write access granularity. * @stride: Minimum read/write access stride. * @priv: User context passed to read/write callbacks. * @ignore_wp: Write Protect pin is managed by the provider. * * Note: A default "nvmem<id>" name will be assigned to the device if * no name is specified in its configuration. In such case "<id>" is * generated with ida_simple_get() and provided id field is ignored. * * Note: Specifying name and setting id to -1 implies a unique device * whose name is provided as-is (kept unaltered). */ struct nvmem_config { struct device *dev; const char *name; int id; struct module *owner; const struct nvmem_cell_info *cells; int ncells; const struct nvmem_keepout *keepout; unsigned int nkeepout; enum nvmem_type type; bool read_only; bool root_only; bool ignore_wp; struct device_node *of_node; bool no_of_node; nvmem_reg_read_t reg_read; nvmem_reg_write_t reg_write; int size; int word_size; int stride; void *priv; /* To be only used by old driver/misc/eeprom drivers */ bool compat; struct device *base_dev; }; /** * struct nvmem_cell_table - NVMEM cell definitions for given provider * * @nvmem_name: Provider name. * @cells: Array of cell definitions. * @ncells: Number of cell definitions in the array. * @node: List node. * * This structure together with related helper functions is provided for users * that don't can't access the nvmem provided structure but wish to register * cell definitions for it e.g. board files registering an EEPROM device. */ struct nvmem_cell_table { const char *nvmem_name; const struct nvmem_cell_info *cells; size_t ncells; struct list_head node; }; #if IS_ENABLED(CONFIG_NVMEM) struct nvmem_device *nvmem_register(const struct nvmem_config *cfg); void nvmem_unregister(struct nvmem_device *nvmem); struct nvmem_device *devm_nvmem_register(struct device *dev, const struct nvmem_config *cfg); int devm_nvmem_unregister(struct device *dev, struct nvmem_device *nvmem); void nvmem_add_cell_table(struct nvmem_cell_table *table); void nvmem_del_cell_table(struct nvmem_cell_table *table); #else static inline struct nvmem_device *nvmem_register(const struct nvmem_config *c) { return ERR_PTR(-EOPNOTSUPP); } static inline void nvmem_unregister(struct nvmem_device *nvmem) {} static inline struct nvmem_device * devm_nvmem_register(struct device *dev, const struct nvmem_config *c) { return nvmem_register(c); } static inline int devm_nvmem_unregister(struct device *dev, struct nvmem_device *nvmem) { return -EOPNOTSUPP; } static inline void nvmem_add_cell_table(struct nvmem_cell_table *table) {} static inline void nvmem_del_cell_table(struct nvmem_cell_table *table) {} #endif /* CONFIG_NVMEM */ #endif /* ifndef _LINUX_NVMEM_PROVIDER_H */ PK ! 2�-Hz z highuid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_HIGHUID_H #define _LINUX_HIGHUID_H #include <linux/types.h> /* * general notes: * * CONFIG_UID16 is defined if the given architecture needs to * support backwards compatibility for old system calls. * * kernel code should use uid_t and gid_t at all times when dealing with * kernel-private data. * * old_uid_t and old_gid_t should only be different if CONFIG_UID16 is * defined, else the platform should provide dummy typedefs for them * such that they are equivalent to __kernel_{u,g}id_t. * * uid16_t and gid16_t are used on all architectures. (when dealing * with structures hard coded to 16 bits, such as in filesystems) */ /* * This is the "overflow" UID and GID. They are used to signify uid/gid * overflow to old programs when they request uid/gid information but are * using the old 16 bit interfaces. * When you run a libc5 program, it will think that all highuid files or * processes are owned by this uid/gid. * The idea is that it's better to do so than possibly return 0 in lieu of * 65536, etc. */ extern int overflowuid; extern int overflowgid; extern void __bad_uid(void); extern void __bad_gid(void); #define DEFAULT_OVERFLOWUID 65534 #define DEFAULT_OVERFLOWGID 65534 #ifdef CONFIG_UID16 /* prevent uid mod 65536 effect by returning a default value for high UIDs */ #define high2lowuid(uid) ((uid) & ~0xFFFF ? (old_uid_t)overflowuid : (old_uid_t)(uid)) #define high2lowgid(gid) ((gid) & ~0xFFFF ? (old_gid_t)overflowgid : (old_gid_t)(gid)) /* * -1 is different in 16 bits than it is in 32 bits * these macros are used by chown(), setreuid(), ..., */ #define low2highuid(uid) ((uid) == (old_uid_t)-1 ? (uid_t)-1 : (uid_t)(uid)) #define low2highgid(gid) ((gid) == (old_gid_t)-1 ? (gid_t)-1 : (gid_t)(gid)) #define __convert_uid(size, uid) \ (size >= sizeof(uid) ? (uid) : high2lowuid(uid)) #define __convert_gid(size, gid) \ (size >= sizeof(gid) ? (gid) : high2lowgid(gid)) #else #define __convert_uid(size, uid) (uid) #define __convert_gid(size, gid) (gid) #endif /* !CONFIG_UID16 */ /* uid/gid input should be always 32bit uid_t */ #define SET_UID(var, uid) do { (var) = __convert_uid(sizeof(var), (uid)); } while (0) #define SET_GID(var, gid) do { (var) = __convert_gid(sizeof(var), (gid)); } while (0) /* * Everything below this line is needed on all architectures, to deal with * filesystems that only store 16 bits of the UID/GID, etc. */ /* * This is the UID and GID that will get written to disk if a filesystem * only supports 16-bit UIDs and the kernel has a high UID/GID to write */ extern int fs_overflowuid; extern int fs_overflowgid; #define DEFAULT_FS_OVERFLOWUID 65534 #define DEFAULT_FS_OVERFLOWGID 65534 /* * Since these macros are used in architectures that only need limited * 16-bit UID back compatibility, we won't use old_uid_t and old_gid_t */ #define fs_high2lowuid(uid) ((uid) & ~0xFFFF ? (uid16_t)fs_overflowuid : (uid16_t)(uid)) #define fs_high2lowgid(gid) ((gid) & ~0xFFFF ? (gid16_t)fs_overflowgid : (gid16_t)(gid)) #define low_16_bits(x) ((x) & 0xFFFF) #define high_16_bits(x) (((x) & 0xFFFF0000) >> 16) #endif /* _LINUX_HIGHUID_H */ PK ! ��0�U �U surface_aggregator/serial_hub.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Surface Serial Hub (SSH) protocol and communication interface. * * Lower-level communication layers and SSH protocol definitions for the * Surface System Aggregator Module (SSAM). Provides the interface for basic * packet- and request-based communication with the SSAM EC via SSH. * * Copyright (C) 2019-2021 Maximilian Luz <luzmaximilian@gmail.com> */ #ifndef _LINUX_SURFACE_AGGREGATOR_SERIAL_HUB_H #define _LINUX_SURFACE_AGGREGATOR_SERIAL_HUB_H #include <linux/crc-ccitt.h> #include <linux/kref.h> #include <linux/ktime.h> #include <linux/list.h> #include <linux/types.h> /* -- Data structures for SAM-over-SSH communication. ----------------------- */ /** * enum ssh_frame_type - Frame types for SSH frames. * * @SSH_FRAME_TYPE_DATA_SEQ: * Indicates a data frame, followed by a payload with the length specified * in the ``struct ssh_frame.len`` field. This frame is sequenced, meaning * that an ACK is required. * * @SSH_FRAME_TYPE_DATA_NSQ: * Same as %SSH_FRAME_TYPE_DATA_SEQ, but unsequenced, meaning that the * message does not have to be ACKed. * * @SSH_FRAME_TYPE_ACK: * Indicates an ACK message. * * @SSH_FRAME_TYPE_NAK: * Indicates an error response for previously sent frame. In general, this * means that the frame and/or payload is malformed, e.g. a CRC is wrong. * For command-type payloads, this can also mean that the command is * invalid. */ enum ssh_frame_type { SSH_FRAME_TYPE_DATA_SEQ = 0x80, SSH_FRAME_TYPE_DATA_NSQ = 0x00, SSH_FRAME_TYPE_ACK = 0x40, SSH_FRAME_TYPE_NAK = 0x04, }; /** * struct ssh_frame - SSH communication frame. * @type: The type of the frame. See &enum ssh_frame_type. * @len: The length of the frame payload directly following the CRC for this * frame. Does not include the final CRC for that payload. * @seq: The sequence number for this message/exchange. */ struct ssh_frame { u8 type; __le16 len; u8 seq; } __packed; static_assert(sizeof(struct ssh_frame) == 4); /* * SSH_FRAME_MAX_PAYLOAD_SIZE - Maximum SSH frame payload length in bytes. * * This is the physical maximum length of the protocol. Implementations may * set a more constrained limit. */ #define SSH_FRAME_MAX_PAYLOAD_SIZE U16_MAX /** * enum ssh_payload_type - Type indicator for the SSH payload. * @SSH_PLD_TYPE_CMD: The payload is a command structure with optional command * payload. */ enum ssh_payload_type { SSH_PLD_TYPE_CMD = 0x80, }; /** * struct ssh_command - Payload of a command-type frame. * @type: The type of the payload. See &enum ssh_payload_type. Should be * SSH_PLD_TYPE_CMD for this struct. * @tc: Command target category. * @tid_out: Output target ID. Should be zero if this an incoming (EC to host) * message. * @tid_in: Input target ID. Should be zero if this is an outgoing (host to * EC) message. * @iid: Instance ID. * @rqid: Request ID. Used to match requests with responses and differentiate * between responses and events. * @cid: Command ID. */ struct ssh_command { u8 type; u8 tc; u8 tid_out; u8 tid_in; u8 iid; __le16 rqid; u8 cid; } __packed; static_assert(sizeof(struct ssh_command) == 8); /* * SSH_COMMAND_MAX_PAYLOAD_SIZE - Maximum SSH command payload length in bytes. * * This is the physical maximum length of the protocol. Implementations may * set a more constrained limit. */ #define SSH_COMMAND_MAX_PAYLOAD_SIZE \ (SSH_FRAME_MAX_PAYLOAD_SIZE - sizeof(struct ssh_command)) /* * SSH_MSG_LEN_BASE - Base-length of a SSH message. * * This is the minimum number of bytes required to form a message. The actual * message length is SSH_MSG_LEN_BASE plus the length of the frame payload. */ #define SSH_MSG_LEN_BASE (sizeof(struct ssh_frame) + 3ull * sizeof(u16)) /* * SSH_MSG_LEN_CTRL - Length of a SSH control message. * * This is the length of a SSH control message, which is equal to a SSH * message without any payload. */ #define SSH_MSG_LEN_CTRL SSH_MSG_LEN_BASE /** * SSH_MESSAGE_LENGTH() - Compute length of SSH message. * @payload_size: Length of the payload inside the SSH frame. * * Return: Returns the length of a SSH message with payload of specified size. */ #define SSH_MESSAGE_LENGTH(payload_size) (SSH_MSG_LEN_BASE + (payload_size)) /** * SSH_COMMAND_MESSAGE_LENGTH() - Compute length of SSH command message. * @payload_size: Length of the command payload. * * Return: Returns the length of a SSH command message with command payload of * specified size. */ #define SSH_COMMAND_MESSAGE_LENGTH(payload_size) \ SSH_MESSAGE_LENGTH(sizeof(struct ssh_command) + (payload_size)) /** * SSH_MSGOFFSET_FRAME() - Compute offset in SSH message to specified field in * frame. * @field: The field for which the offset should be computed. * * Return: Returns the offset of the specified &struct ssh_frame field in the * raw SSH message data as. Takes SYN bytes (u16) preceding the frame into * account. */ #define SSH_MSGOFFSET_FRAME(field) \ (sizeof(u16) + offsetof(struct ssh_frame, field)) /** * SSH_MSGOFFSET_COMMAND() - Compute offset in SSH message to specified field * in command. * @field: The field for which the offset should be computed. * * Return: Returns the offset of the specified &struct ssh_command field in * the raw SSH message data. Takes SYN bytes (u16) preceding the frame and the * frame CRC (u16) between frame and command into account. */ #define SSH_MSGOFFSET_COMMAND(field) \ (2ull * sizeof(u16) + sizeof(struct ssh_frame) \ + offsetof(struct ssh_command, field)) /* * SSH_MSG_SYN - SSH message synchronization (SYN) bytes as u16. */ #define SSH_MSG_SYN ((u16)0x55aa) /** * ssh_crc() - Compute CRC for SSH messages. * @buf: The pointer pointing to the data for which the CRC should be computed. * @len: The length of the data for which the CRC should be computed. * * Return: Returns the CRC computed on the provided data, as used for SSH * messages. */ static inline u16 ssh_crc(const u8 *buf, size_t len) { return crc_ccitt_false(0xffff, buf, len); } /* * SSH_NUM_EVENTS - The number of reserved event IDs. * * The number of reserved event IDs, used for registering an SSH event * handler. Valid event IDs are numbers below or equal to this value, with * exception of zero, which is not an event ID. Thus, this is also the * absolute maximum number of event handlers that can be registered. */ #define SSH_NUM_EVENTS 34 /* * SSH_NUM_TARGETS - The number of communication targets used in the protocol. */ #define SSH_NUM_TARGETS 2 /** * ssh_rqid_next_valid() - Return the next valid request ID. * @rqid: The current request ID. * * Return: Returns the next valid request ID, following the current request ID * provided to this function. This function skips any request IDs reserved for * events. */ static inline u16 ssh_rqid_next_valid(u16 rqid) { return rqid > 0 ? rqid + 1u : rqid + SSH_NUM_EVENTS + 1u; } /** * ssh_rqid_to_event() - Convert request ID to its corresponding event ID. * @rqid: The request ID to convert. */ static inline u16 ssh_rqid_to_event(u16 rqid) { return rqid - 1u; } /** * ssh_rqid_is_event() - Check if given request ID is a valid event ID. * @rqid: The request ID to check. */ static inline bool ssh_rqid_is_event(u16 rqid) { return ssh_rqid_to_event(rqid) < SSH_NUM_EVENTS; } /** * ssh_tc_to_rqid() - Convert target category to its corresponding request ID. * @tc: The target category to convert. */ static inline u16 ssh_tc_to_rqid(u8 tc) { return tc; } /** * ssh_tid_to_index() - Convert target ID to its corresponding target index. * @tid: The target ID to convert. */ static inline u8 ssh_tid_to_index(u8 tid) { return tid - 1u; } /** * ssh_tid_is_valid() - Check if target ID is valid/supported. * @tid: The target ID to check. */ static inline bool ssh_tid_is_valid(u8 tid) { return ssh_tid_to_index(tid) < SSH_NUM_TARGETS; } /** * struct ssam_span - Reference to a buffer region. * @ptr: Pointer to the buffer region. * @len: Length of the buffer region. * * A reference to a (non-owned) buffer segment, consisting of pointer and * length. Use of this struct indicates non-owned data, i.e. data of which the * life-time is managed (i.e. it is allocated/freed) via another pointer. */ struct ssam_span { u8 *ptr; size_t len; }; /* * Known SSH/EC target categories. * * List of currently known target category values; "Known" as in we know they * exist and are valid on at least some device/model. Detailed functionality * or the full category name is only known for some of these categories and * is detailed in the respective comment below. * * These values and abbreviations have been extracted from strings inside the * Windows driver. */ enum ssam_ssh_tc { /* Category 0x00 is invalid for EC use. */ SSAM_SSH_TC_SAM = 0x01, /* Generic system functionality, real-time clock. */ SSAM_SSH_TC_BAT = 0x02, /* Battery/power subsystem. */ SSAM_SSH_TC_TMP = 0x03, /* Thermal subsystem. */ SSAM_SSH_TC_PMC = 0x04, SSAM_SSH_TC_FAN = 0x05, SSAM_SSH_TC_PoM = 0x06, SSAM_SSH_TC_DBG = 0x07, SSAM_SSH_TC_KBD = 0x08, /* Legacy keyboard (Laptop 1/2). */ SSAM_SSH_TC_FWU = 0x09, SSAM_SSH_TC_UNI = 0x0a, SSAM_SSH_TC_LPC = 0x0b, SSAM_SSH_TC_TCL = 0x0c, SSAM_SSH_TC_SFL = 0x0d, SSAM_SSH_TC_KIP = 0x0e, SSAM_SSH_TC_EXT = 0x0f, SSAM_SSH_TC_BLD = 0x10, SSAM_SSH_TC_BAS = 0x11, /* Detachment system (Surface Book 2/3). */ SSAM_SSH_TC_SEN = 0x12, SSAM_SSH_TC_SRQ = 0x13, SSAM_SSH_TC_MCU = 0x14, SSAM_SSH_TC_HID = 0x15, /* Generic HID input subsystem. */ SSAM_SSH_TC_TCH = 0x16, SSAM_SSH_TC_BKL = 0x17, SSAM_SSH_TC_TAM = 0x18, SSAM_SSH_TC_ACC = 0x19, SSAM_SSH_TC_UFI = 0x1a, SSAM_SSH_TC_USC = 0x1b, SSAM_SSH_TC_PEN = 0x1c, SSAM_SSH_TC_VID = 0x1d, SSAM_SSH_TC_AUD = 0x1e, SSAM_SSH_TC_SMC = 0x1f, SSAM_SSH_TC_KPD = 0x20, SSAM_SSH_TC_REG = 0x21, /* Extended event registry. */ }; /* -- Packet transport layer (ptl). ----------------------------------------- */ /** * enum ssh_packet_base_priority - Base priorities for &struct ssh_packet. * @SSH_PACKET_PRIORITY_FLUSH: Base priority for flush packets. * @SSH_PACKET_PRIORITY_DATA: Base priority for normal data packets. * @SSH_PACKET_PRIORITY_NAK: Base priority for NAK packets. * @SSH_PACKET_PRIORITY_ACK: Base priority for ACK packets. */ enum ssh_packet_base_priority { SSH_PACKET_PRIORITY_FLUSH = 0, /* same as DATA to sequence flush */ SSH_PACKET_PRIORITY_DATA = 0, SSH_PACKET_PRIORITY_NAK = 1, SSH_PACKET_PRIORITY_ACK = 2, }; /* * Same as SSH_PACKET_PRIORITY() below, only with actual values. */ #define __SSH_PACKET_PRIORITY(base, try) \ (((base) << 4) | ((try) & 0x0f)) /** * SSH_PACKET_PRIORITY() - Compute packet priority from base priority and * number of tries. * @base: The base priority as suffix of &enum ssh_packet_base_priority, e.g. * ``FLUSH``, ``DATA``, ``ACK``, or ``NAK``. * @try: The number of tries (must be less than 16). * * Compute the combined packet priority. The combined priority is dominated by * the base priority, whereas the number of (re-)tries decides the precedence * of packets with the same base priority, giving higher priority to packets * that already have more tries. * * Return: Returns the computed priority as value fitting inside a &u8. A * higher number means a higher priority. */ #define SSH_PACKET_PRIORITY(base, try) \ __SSH_PACKET_PRIORITY(SSH_PACKET_PRIORITY_##base, (try)) /** * ssh_packet_priority_get_try() - Get number of tries from packet priority. * @priority: The packet priority. * * Return: Returns the number of tries encoded in the specified packet * priority. */ static inline u8 ssh_packet_priority_get_try(u8 priority) { return priority & 0x0f; } /** * ssh_packet_priority_get_base - Get base priority from packet priority. * @priority: The packet priority. * * Return: Returns the base priority encoded in the given packet priority. */ static inline u8 ssh_packet_priority_get_base(u8 priority) { return (priority & 0xf0) >> 4; } enum ssh_packet_flags { /* state flags */ SSH_PACKET_SF_LOCKED_BIT, SSH_PACKET_SF_QUEUED_BIT, SSH_PACKET_SF_PENDING_BIT, SSH_PACKET_SF_TRANSMITTING_BIT, SSH_PACKET_SF_TRANSMITTED_BIT, SSH_PACKET_SF_ACKED_BIT, SSH_PACKET_SF_CANCELED_BIT, SSH_PACKET_SF_COMPLETED_BIT, /* type flags */ SSH_PACKET_TY_FLUSH_BIT, SSH_PACKET_TY_SEQUENCED_BIT, SSH_PACKET_TY_BLOCKING_BIT, /* mask for state flags */ SSH_PACKET_FLAGS_SF_MASK = BIT(SSH_PACKET_SF_LOCKED_BIT) | BIT(SSH_PACKET_SF_QUEUED_BIT) | BIT(SSH_PACKET_SF_PENDING_BIT) | BIT(SSH_PACKET_SF_TRANSMITTING_BIT) | BIT(SSH_PACKET_SF_TRANSMITTED_BIT) | BIT(SSH_PACKET_SF_ACKED_BIT) | BIT(SSH_PACKET_SF_CANCELED_BIT) | BIT(SSH_PACKET_SF_COMPLETED_BIT), /* mask for type flags */ SSH_PACKET_FLAGS_TY_MASK = BIT(SSH_PACKET_TY_FLUSH_BIT) | BIT(SSH_PACKET_TY_SEQUENCED_BIT) | BIT(SSH_PACKET_TY_BLOCKING_BIT), }; struct ssh_ptl; struct ssh_packet; /** * struct ssh_packet_ops - Callback operations for a SSH packet. * @release: Function called when the packet reference count reaches zero. * This callback must be relied upon to ensure that the packet has * left the transport system(s). * @complete: Function called when the packet is completed, either with * success or failure. In case of failure, the reason for the * failure is indicated by the value of the provided status code * argument. This value will be zero in case of success. Note that * a call to this callback does not guarantee that the packet is * not in use by the transport system any more. */ struct ssh_packet_ops { void (*release)(struct ssh_packet *p); void (*complete)(struct ssh_packet *p, int status); }; /** * struct ssh_packet - SSH transport packet. * @ptl: Pointer to the packet transport layer. May be %NULL if the packet * (or enclosing request) has not been submitted yet. * @refcnt: Reference count of the packet. * @priority: Priority of the packet. Must be computed via * SSH_PACKET_PRIORITY(). Must only be accessed while holding the * queue lock after first submission. * @data: Raw message data. * @data.len: Length of the raw message data. * @data.ptr: Pointer to the raw message data buffer. * @state: State and type flags describing current packet state (dynamic) * and type (static). See &enum ssh_packet_flags for possible * options. * @timestamp: Timestamp specifying when the latest transmission of a * currently pending packet has been started. May be %KTIME_MAX * before or in-between transmission attempts. Used for the packet * timeout implementation. Must only be accessed while holding the * pending lock after first submission. * @queue_node: The list node for the packet queue. * @pending_node: The list node for the set of pending packets. * @ops: Packet operations. */ struct ssh_packet { struct ssh_ptl *ptl; struct kref refcnt; u8 priority; struct { size_t len; u8 *ptr; } data; unsigned long state; ktime_t timestamp; struct list_head queue_node; struct list_head pending_node; const struct ssh_packet_ops *ops; }; struct ssh_packet *ssh_packet_get(struct ssh_packet *p); void ssh_packet_put(struct ssh_packet *p); /** * ssh_packet_set_data() - Set raw message data of packet. * @p: The packet for which the message data should be set. * @ptr: Pointer to the memory holding the message data. * @len: Length of the message data. * * Sets the raw message data buffer of the packet to the provided memory. The * memory is not copied. Instead, the caller is responsible for management * (i.e. allocation and deallocation) of the memory. The caller must ensure * that the provided memory is valid and contains a valid SSH message, * starting from the time of submission of the packet until the ``release`` * callback has been called. During this time, the memory may not be altered * in any way. */ static inline void ssh_packet_set_data(struct ssh_packet *p, u8 *ptr, size_t len) { p->data.ptr = ptr; p->data.len = len; } /* -- Request transport layer (rtl). ---------------------------------------- */ enum ssh_request_flags { /* state flags */ SSH_REQUEST_SF_LOCKED_BIT, SSH_REQUEST_SF_QUEUED_BIT, SSH_REQUEST_SF_PENDING_BIT, SSH_REQUEST_SF_TRANSMITTING_BIT, SSH_REQUEST_SF_TRANSMITTED_BIT, SSH_REQUEST_SF_RSPRCVD_BIT, SSH_REQUEST_SF_CANCELED_BIT, SSH_REQUEST_SF_COMPLETED_BIT, /* type flags */ SSH_REQUEST_TY_FLUSH_BIT, SSH_REQUEST_TY_HAS_RESPONSE_BIT, /* mask for state flags */ SSH_REQUEST_FLAGS_SF_MASK = BIT(SSH_REQUEST_SF_LOCKED_BIT) | BIT(SSH_REQUEST_SF_QUEUED_BIT) | BIT(SSH_REQUEST_SF_PENDING_BIT) | BIT(SSH_REQUEST_SF_TRANSMITTING_BIT) | BIT(SSH_REQUEST_SF_TRANSMITTED_BIT) | BIT(SSH_REQUEST_SF_RSPRCVD_BIT) | BIT(SSH_REQUEST_SF_CANCELED_BIT) | BIT(SSH_REQUEST_SF_COMPLETED_BIT), /* mask for type flags */ SSH_REQUEST_FLAGS_TY_MASK = BIT(SSH_REQUEST_TY_FLUSH_BIT) | BIT(SSH_REQUEST_TY_HAS_RESPONSE_BIT), }; struct ssh_rtl; struct ssh_request; /** * struct ssh_request_ops - Callback operations for a SSH request. * @release: Function called when the request's reference count reaches zero. * This callback must be relied upon to ensure that the request has * left the transport systems (both, packet an request systems). * @complete: Function called when the request is completed, either with * success or failure. The command data for the request response * is provided via the &struct ssh_command parameter (``cmd``), * the command payload of the request response via the &struct * ssh_span parameter (``data``). * * If the request does not have any response or has not been * completed with success, both ``cmd`` and ``data`` parameters will * be NULL. If the request response does not have any command * payload, the ``data`` span will be an empty (zero-length) span. * * In case of failure, the reason for the failure is indicated by * the value of the provided status code argument (``status``). This * value will be zero in case of success and a regular errno * otherwise. * * Note that a call to this callback does not guarantee that the * request is not in use by the transport systems any more. */ struct ssh_request_ops { void (*release)(struct ssh_request *rqst); void (*complete)(struct ssh_request *rqst, const struct ssh_command *cmd, const struct ssam_span *data, int status); }; /** * struct ssh_request - SSH transport request. * @packet: The underlying SSH transport packet. * @node: List node for the request queue and pending set. * @state: State and type flags describing current request state (dynamic) * and type (static). See &enum ssh_request_flags for possible * options. * @timestamp: Timestamp specifying when we start waiting on the response of * the request. This is set once the underlying packet has been * completed and may be %KTIME_MAX before that, or when the request * does not expect a response. Used for the request timeout * implementation. * @ops: Request Operations. */ struct ssh_request { struct ssh_packet packet; struct list_head node; unsigned long state; ktime_t timestamp; const struct ssh_request_ops *ops; }; /** * to_ssh_request() - Cast a SSH packet to its enclosing SSH request. * @p: The packet to cast. * * Casts the given &struct ssh_packet to its enclosing &struct ssh_request. * The caller is responsible for making sure that the packet is actually * wrapped in a &struct ssh_request. * * Return: Returns the &struct ssh_request wrapping the provided packet. */ static inline struct ssh_request *to_ssh_request(struct ssh_packet *p) { return container_of(p, struct ssh_request, packet); } /** * ssh_request_get() - Increment reference count of request. * @r: The request to increment the reference count of. * * Increments the reference count of the given request by incrementing the * reference count of the underlying &struct ssh_packet, enclosed in it. * * See also ssh_request_put(), ssh_packet_get(). * * Return: Returns the request provided as input. */ static inline struct ssh_request *ssh_request_get(struct ssh_request *r) { return r ? to_ssh_request(ssh_packet_get(&r->packet)) : NULL; } /** * ssh_request_put() - Decrement reference count of request. * @r: The request to decrement the reference count of. * * Decrements the reference count of the given request by decrementing the * reference count of the underlying &struct ssh_packet, enclosed in it. If * the reference count reaches zero, the ``release`` callback specified in the * request's &struct ssh_request_ops, i.e. ``r->ops->release``, will be * called. * * See also ssh_request_get(), ssh_packet_put(). */ static inline void ssh_request_put(struct ssh_request *r) { if (r) ssh_packet_put(&r->packet); } /** * ssh_request_set_data() - Set raw message data of request. * @r: The request for which the message data should be set. * @ptr: Pointer to the memory holding the message data. * @len: Length of the message data. * * Sets the raw message data buffer of the underlying packet to the specified * buffer. Does not copy the actual message data, just sets the buffer pointer * and length. Refer to ssh_packet_set_data() for more details. */ static inline void ssh_request_set_data(struct ssh_request *r, u8 *ptr, size_t len) { ssh_packet_set_data(&r->packet, ptr, len); } #endif /* _LINUX_SURFACE_AGGREGATOR_SERIAL_HUB_H */ PK ! ����> �> surface_aggregator/device.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Surface System Aggregator Module (SSAM) bus and client-device subsystem. * * Main interface for the surface-aggregator bus, surface-aggregator client * devices, and respective drivers building on top of the SSAM controller. * Provides support for non-platform/non-ACPI SSAM clients via dedicated * subsystem. * * Copyright (C) 2019-2021 Maximilian Luz <luzmaximilian@gmail.com> */ #ifndef _LINUX_SURFACE_AGGREGATOR_DEVICE_H #define _LINUX_SURFACE_AGGREGATOR_DEVICE_H #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/types.h> #include <linux/surface_aggregator/controller.h> /* -- Surface System Aggregator Module bus. --------------------------------- */ /** * enum ssam_device_domain - SAM device domain. * @SSAM_DOMAIN_VIRTUAL: Virtual device. * @SSAM_DOMAIN_SERIALHUB: Physical device connected via Surface Serial Hub. */ enum ssam_device_domain { SSAM_DOMAIN_VIRTUAL = 0x00, SSAM_DOMAIN_SERIALHUB = 0x01, }; /** * enum ssam_virtual_tc - Target categories for the virtual SAM domain. * @SSAM_VIRTUAL_TC_HUB: Device hub category. */ enum ssam_virtual_tc { SSAM_VIRTUAL_TC_HUB = 0x00, }; /** * struct ssam_device_uid - Unique identifier for SSAM device. * @domain: Domain of the device. * @category: Target category of the device. * @target: Target ID of the device. * @instance: Instance ID of the device. * @function: Sub-function of the device. This field can be used to split a * single SAM device into multiple virtual subdevices to separate * different functionality of that device and allow one driver per * such functionality. */ struct ssam_device_uid { u8 domain; u8 category; u8 target; u8 instance; u8 function; }; /* * Special values for device matching. * * These values are intended to be used with SSAM_DEVICE(), SSAM_VDEV(), and * SSAM_SDEV() exclusively. Specifically, they are used to initialize the * match_flags member of the device ID structure. Do not use them directly * with struct ssam_device_id or struct ssam_device_uid. */ #define SSAM_ANY_TID 0xffff #define SSAM_ANY_IID 0xffff #define SSAM_ANY_FUN 0xffff /** * SSAM_DEVICE() - Initialize a &struct ssam_device_id with the given * parameters. * @d: Domain of the device. * @cat: Target category of the device. * @tid: Target ID of the device. * @iid: Instance ID of the device. * @fun: Sub-function of the device. * * Initializes a &struct ssam_device_id with the given parameters. See &struct * ssam_device_uid for details regarding the parameters. The special values * %SSAM_ANY_TID, %SSAM_ANY_IID, and %SSAM_ANY_FUN can be used to specify that * matching should ignore target ID, instance ID, and/or sub-function, * respectively. This macro initializes the ``match_flags`` field based on the * given parameters. * * Note: The parameters @d and @cat must be valid &u8 values, the parameters * @tid, @iid, and @fun must be either valid &u8 values or %SSAM_ANY_TID, * %SSAM_ANY_IID, or %SSAM_ANY_FUN, respectively. Other non-&u8 values are not * allowed. */ #define SSAM_DEVICE(d, cat, tid, iid, fun) \ .match_flags = (((tid) != SSAM_ANY_TID) ? SSAM_MATCH_TARGET : 0) \ | (((iid) != SSAM_ANY_IID) ? SSAM_MATCH_INSTANCE : 0) \ | (((fun) != SSAM_ANY_FUN) ? SSAM_MATCH_FUNCTION : 0), \ .domain = d, \ .category = cat, \ .target = __builtin_choose_expr((tid) != SSAM_ANY_TID, (tid), 0), \ .instance = __builtin_choose_expr((iid) != SSAM_ANY_IID, (iid), 0), \ .function = __builtin_choose_expr((fun) != SSAM_ANY_FUN, (fun), 0) /** * SSAM_VDEV() - Initialize a &struct ssam_device_id as virtual device with * the given parameters. * @cat: Target category of the device. * @tid: Target ID of the device. * @iid: Instance ID of the device. * @fun: Sub-function of the device. * * Initializes a &struct ssam_device_id with the given parameters in the * virtual domain. See &struct ssam_device_uid for details regarding the * parameters. The special values %SSAM_ANY_TID, %SSAM_ANY_IID, and * %SSAM_ANY_FUN can be used to specify that matching should ignore target ID, * instance ID, and/or sub-function, respectively. This macro initializes the * ``match_flags`` field based on the given parameters. * * Note: The parameter @cat must be a valid &u8 value, the parameters @tid, * @iid, and @fun must be either valid &u8 values or %SSAM_ANY_TID, * %SSAM_ANY_IID, or %SSAM_ANY_FUN, respectively. Other non-&u8 values are not * allowed. */ #define SSAM_VDEV(cat, tid, iid, fun) \ SSAM_DEVICE(SSAM_DOMAIN_VIRTUAL, SSAM_VIRTUAL_TC_##cat, tid, iid, fun) /** * SSAM_SDEV() - Initialize a &struct ssam_device_id as physical SSH device * with the given parameters. * @cat: Target category of the device. * @tid: Target ID of the device. * @iid: Instance ID of the device. * @fun: Sub-function of the device. * * Initializes a &struct ssam_device_id with the given parameters in the SSH * domain. See &struct ssam_device_uid for details regarding the parameters. * The special values %SSAM_ANY_TID, %SSAM_ANY_IID, and %SSAM_ANY_FUN can be * used to specify that matching should ignore target ID, instance ID, and/or * sub-function, respectively. This macro initializes the ``match_flags`` * field based on the given parameters. * * Note: The parameter @cat must be a valid &u8 value, the parameters @tid, * @iid, and @fun must be either valid &u8 values or %SSAM_ANY_TID, * %SSAM_ANY_IID, or %SSAM_ANY_FUN, respectively. Other non-&u8 values are not * allowed. */ #define SSAM_SDEV(cat, tid, iid, fun) \ SSAM_DEVICE(SSAM_DOMAIN_SERIALHUB, SSAM_SSH_TC_##cat, tid, iid, fun) /** * struct ssam_device - SSAM client device. * @dev: Driver model representation of the device. * @ctrl: SSAM controller managing this device. * @uid: UID identifying the device. */ struct ssam_device { struct device dev; struct ssam_controller *ctrl; struct ssam_device_uid uid; }; /** * struct ssam_device_driver - SSAM client device driver. * @driver: Base driver model structure. * @match_table: Match table specifying which devices the driver should bind to. * @probe: Called when the driver is being bound to a device. * @remove: Called when the driver is being unbound from the device. */ struct ssam_device_driver { struct device_driver driver; const struct ssam_device_id *match_table; int (*probe)(struct ssam_device *sdev); void (*remove)(struct ssam_device *sdev); }; extern struct bus_type ssam_bus_type; extern const struct device_type ssam_device_type; /** * is_ssam_device() - Check if the given device is a SSAM client device. * @d: The device to test the type of. * * Return: Returns %true if the specified device is of type &struct * ssam_device, i.e. the device type points to %ssam_device_type, and %false * otherwise. */ static inline bool is_ssam_device(struct device *d) { return d->type == &ssam_device_type; } /** * to_ssam_device() - Casts the given device to a SSAM client device. * @d: The device to cast. * * Casts the given &struct device to a &struct ssam_device. The caller has to * ensure that the given device is actually enclosed in a &struct ssam_device, * e.g. by calling is_ssam_device(). * * Return: Returns a pointer to the &struct ssam_device wrapping the given * device @d. */ static inline struct ssam_device *to_ssam_device(struct device *d) { return container_of(d, struct ssam_device, dev); } /** * to_ssam_device_driver() - Casts the given device driver to a SSAM client * device driver. * @d: The driver to cast. * * Casts the given &struct device_driver to a &struct ssam_device_driver. The * caller has to ensure that the given driver is actually enclosed in a * &struct ssam_device_driver. * * Return: Returns the pointer to the &struct ssam_device_driver wrapping the * given device driver @d. */ static inline struct ssam_device_driver *to_ssam_device_driver(struct device_driver *d) { return container_of(d, struct ssam_device_driver, driver); } const struct ssam_device_id *ssam_device_id_match(const struct ssam_device_id *table, const struct ssam_device_uid uid); const struct ssam_device_id *ssam_device_get_match(const struct ssam_device *dev); const void *ssam_device_get_match_data(const struct ssam_device *dev); struct ssam_device *ssam_device_alloc(struct ssam_controller *ctrl, struct ssam_device_uid uid); int ssam_device_add(struct ssam_device *sdev); void ssam_device_remove(struct ssam_device *sdev); /** * ssam_device_get() - Increment reference count of SSAM client device. * @sdev: The device to increment the reference count of. * * Increments the reference count of the given SSAM client device by * incrementing the reference count of the enclosed &struct device via * get_device(). * * See ssam_device_put() for the counter-part of this function. * * Return: Returns the device provided as input. */ static inline struct ssam_device *ssam_device_get(struct ssam_device *sdev) { return sdev ? to_ssam_device(get_device(&sdev->dev)) : NULL; } /** * ssam_device_put() - Decrement reference count of SSAM client device. * @sdev: The device to decrement the reference count of. * * Decrements the reference count of the given SSAM client device by * decrementing the reference count of the enclosed &struct device via * put_device(). * * See ssam_device_get() for the counter-part of this function. */ static inline void ssam_device_put(struct ssam_device *sdev) { if (sdev) put_device(&sdev->dev); } /** * ssam_device_get_drvdata() - Get driver-data of SSAM client device. * @sdev: The device to get the driver-data from. * * Return: Returns the driver-data of the given device, previously set via * ssam_device_set_drvdata(). */ static inline void *ssam_device_get_drvdata(struct ssam_device *sdev) { return dev_get_drvdata(&sdev->dev); } /** * ssam_device_set_drvdata() - Set driver-data of SSAM client device. * @sdev: The device to set the driver-data of. * @data: The data to set the device's driver-data pointer to. */ static inline void ssam_device_set_drvdata(struct ssam_device *sdev, void *data) { dev_set_drvdata(&sdev->dev, data); } int __ssam_device_driver_register(struct ssam_device_driver *d, struct module *o); void ssam_device_driver_unregister(struct ssam_device_driver *d); /** * ssam_device_driver_register() - Register a SSAM client device driver. * @drv: The driver to register. */ #define ssam_device_driver_register(drv) \ __ssam_device_driver_register(drv, THIS_MODULE) /** * module_ssam_device_driver() - Helper macro for SSAM device driver * registration. * @drv: The driver managed by this module. * * Helper macro to register a SSAM device driver via module_init() and * module_exit(). This macro may only be used once per module and replaces the * aforementioned definitions. */ #define module_ssam_device_driver(drv) \ module_driver(drv, ssam_device_driver_register, \ ssam_device_driver_unregister) /* -- Helpers for client-device requests. ----------------------------------- */ /** * SSAM_DEFINE_SYNC_REQUEST_CL_N() - Define synchronous client-device SAM * request function with neither argument nor return value. * @name: Name of the generated function. * @spec: Specification (&struct ssam_request_spec_md) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request having neither argument nor return value. Device * specifying parameters are not hard-coded, but instead are provided via the * client device, specifically its UID, supplied when calling this function. * The generated function takes care of setting up the request struct, buffer * allocation, as well as execution of the request itself, returning once the * request has been fully completed. The required transport buffer will be * allocated on the stack. * * The generated function is defined as ``static int name(struct ssam_device * *sdev)``, returning the status of the request, which is zero on success and * negative on failure. The ``sdev`` parameter specifies both the target * device of the request and by association the controller via which the * request is sent. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_CL_N(name, spec...) \ SSAM_DEFINE_SYNC_REQUEST_MD_N(__raw_##name, spec) \ static int name(struct ssam_device *sdev) \ { \ return __raw_##name(sdev->ctrl, sdev->uid.target, \ sdev->uid.instance); \ } /** * SSAM_DEFINE_SYNC_REQUEST_CL_W() - Define synchronous client-device SAM * request function with argument. * @name: Name of the generated function. * @atype: Type of the request's argument. * @spec: Specification (&struct ssam_request_spec_md) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request taking an argument of type @atype and having no * return value. Device specifying parameters are not hard-coded, but instead * are provided via the client device, specifically its UID, supplied when * calling this function. The generated function takes care of setting up the * request struct, buffer allocation, as well as execution of the request * itself, returning once the request has been fully completed. The required * transport buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct ssam_device * *sdev, const atype *arg)``, returning the status of the request, which is * zero on success and negative on failure. The ``sdev`` parameter specifies * both the target device of the request and by association the controller via * which the request is sent. The request's argument is specified via the * ``arg`` pointer. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_CL_W(name, atype, spec...) \ SSAM_DEFINE_SYNC_REQUEST_MD_W(__raw_##name, atype, spec) \ static int name(struct ssam_device *sdev, const atype *arg) \ { \ return __raw_##name(sdev->ctrl, sdev->uid.target, \ sdev->uid.instance, arg); \ } /** * SSAM_DEFINE_SYNC_REQUEST_CL_R() - Define synchronous client-device SAM * request function with return value. * @name: Name of the generated function. * @rtype: Type of the request's return value. * @spec: Specification (&struct ssam_request_spec_md) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request taking no argument but having a return value of * type @rtype. Device specifying parameters are not hard-coded, but instead * are provided via the client device, specifically its UID, supplied when * calling this function. The generated function takes care of setting up the * request struct, buffer allocation, as well as execution of the request * itself, returning once the request has been fully completed. The required * transport buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct ssam_device * *sdev, rtype *ret)``, returning the status of the request, which is zero on * success and negative on failure. The ``sdev`` parameter specifies both the * target device of the request and by association the controller via which * the request is sent. The request's return value is written to the memory * pointed to by the ``ret`` parameter. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_CL_R(name, rtype, spec...) \ SSAM_DEFINE_SYNC_REQUEST_MD_R(__raw_##name, rtype, spec) \ static int name(struct ssam_device *sdev, rtype *ret) \ { \ return __raw_##name(sdev->ctrl, sdev->uid.target, \ sdev->uid.instance, ret); \ } #endif /* _LINUX_SURFACE_AGGREGATOR_DEVICE_H */ PK ! �KoK} K} surface_aggregator/controller.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Surface System Aggregator Module (SSAM) controller interface. * * Main communication interface for the SSAM EC. Provides a controller * managing access and communication to and from the SSAM EC, as well as main * communication structures and definitions. * * Copyright (C) 2019-2021 Maximilian Luz <luzmaximilian@gmail.com> */ #ifndef _LINUX_SURFACE_AGGREGATOR_CONTROLLER_H #define _LINUX_SURFACE_AGGREGATOR_CONTROLLER_H #include <linux/completion.h> #include <linux/device.h> #include <linux/types.h> #include <linux/surface_aggregator/serial_hub.h> /* -- Main data types and definitions --------------------------------------- */ /** * enum ssam_event_flags - Flags for enabling/disabling SAM events * @SSAM_EVENT_SEQUENCED: The event will be sent via a sequenced data frame. */ enum ssam_event_flags { SSAM_EVENT_SEQUENCED = BIT(0), }; /** * struct ssam_event - SAM event sent from the EC to the host. * @target_category: Target category of the event source. See &enum ssam_ssh_tc. * @target_id: Target ID of the event source. * @command_id: Command ID of the event. * @instance_id: Instance ID of the event source. * @length: Length of the event payload in bytes. * @data: Event payload data. */ struct ssam_event { u8 target_category; u8 target_id; u8 command_id; u8 instance_id; u16 length; u8 data[]; }; /** * enum ssam_request_flags - Flags for SAM requests. * * @SSAM_REQUEST_HAS_RESPONSE: * Specifies that the request expects a response. If not set, the request * will be directly completed after its underlying packet has been * transmitted. If set, the request transport system waits for a response * of the request. * * @SSAM_REQUEST_UNSEQUENCED: * Specifies that the request should be transmitted via an unsequenced * packet. If set, the request must not have a response, meaning that this * flag and the %SSAM_REQUEST_HAS_RESPONSE flag are mutually exclusive. */ enum ssam_request_flags { SSAM_REQUEST_HAS_RESPONSE = BIT(0), SSAM_REQUEST_UNSEQUENCED = BIT(1), }; /** * struct ssam_request - SAM request description. * @target_category: Category of the request's target. See &enum ssam_ssh_tc. * @target_id: ID of the request's target. * @command_id: Command ID of the request. * @instance_id: Instance ID of the request's target. * @flags: Flags for the request. See &enum ssam_request_flags. * @length: Length of the request payload in bytes. * @payload: Request payload data. * * This struct fully describes a SAM request with payload. It is intended to * help set up the actual transport struct, e.g. &struct ssam_request_sync, * and specifically its raw message data via ssam_request_write_data(). */ struct ssam_request { u8 target_category; u8 target_id; u8 command_id; u8 instance_id; u16 flags; u16 length; const u8 *payload; }; /** * struct ssam_response - Response buffer for SAM request. * @capacity: Capacity of the buffer, in bytes. * @length: Length of the actual data stored in the memory pointed to by * @pointer, in bytes. Set by the transport system. * @pointer: Pointer to the buffer's memory, storing the response payload data. */ struct ssam_response { size_t capacity; size_t length; u8 *pointer; }; struct ssam_controller; struct ssam_controller *ssam_get_controller(void); struct ssam_controller *ssam_client_bind(struct device *client); int ssam_client_link(struct ssam_controller *ctrl, struct device *client); struct device *ssam_controller_device(struct ssam_controller *c); struct ssam_controller *ssam_controller_get(struct ssam_controller *c); void ssam_controller_put(struct ssam_controller *c); void ssam_controller_statelock(struct ssam_controller *c); void ssam_controller_stateunlock(struct ssam_controller *c); ssize_t ssam_request_write_data(struct ssam_span *buf, struct ssam_controller *ctrl, const struct ssam_request *spec); /* -- Synchronous request interface. ---------------------------------------- */ /** * struct ssam_request_sync - Synchronous SAM request struct. * @base: Underlying SSH request. * @comp: Completion used to signal full completion of the request. After the * request has been submitted, this struct may only be modified or * deallocated after the completion has been signaled. * request has been submitted, * @resp: Buffer to store the response. * @status: Status of the request, set after the base request has been * completed or has failed. */ struct ssam_request_sync { struct ssh_request base; struct completion comp; struct ssam_response *resp; int status; }; int ssam_request_sync_alloc(size_t payload_len, gfp_t flags, struct ssam_request_sync **rqst, struct ssam_span *buffer); void ssam_request_sync_free(struct ssam_request_sync *rqst); int ssam_request_sync_init(struct ssam_request_sync *rqst, enum ssam_request_flags flags); /** * ssam_request_sync_set_data - Set message data of a synchronous request. * @rqst: The request. * @ptr: Pointer to the request message data. * @len: Length of the request message data. * * Set the request message data of a synchronous request. The provided buffer * needs to live until the request has been completed. */ static inline void ssam_request_sync_set_data(struct ssam_request_sync *rqst, u8 *ptr, size_t len) { ssh_request_set_data(&rqst->base, ptr, len); } /** * ssam_request_sync_set_resp - Set response buffer of a synchronous request. * @rqst: The request. * @resp: The response buffer. * * Sets the response buffer of a synchronous request. This buffer will store * the response of the request after it has been completed. May be %NULL if no * response is expected. */ static inline void ssam_request_sync_set_resp(struct ssam_request_sync *rqst, struct ssam_response *resp) { rqst->resp = resp; } int ssam_request_sync_submit(struct ssam_controller *ctrl, struct ssam_request_sync *rqst); /** * ssam_request_sync_wait - Wait for completion of a synchronous request. * @rqst: The request to wait for. * * Wait for completion and release of a synchronous request. After this * function terminates, the request is guaranteed to have left the transport * system. After successful submission of a request, this function must be * called before accessing the response of the request, freeing the request, * or freeing any of the buffers associated with the request. * * This function must not be called if the request has not been submitted yet * and may lead to a deadlock/infinite wait if a subsequent request submission * fails in that case, due to the completion never triggering. * * Return: Returns the status of the given request, which is set on completion * of the packet. This value is zero on success and negative on failure. */ static inline int ssam_request_sync_wait(struct ssam_request_sync *rqst) { wait_for_completion(&rqst->comp); return rqst->status; } int ssam_request_sync(struct ssam_controller *ctrl, const struct ssam_request *spec, struct ssam_response *rsp); int ssam_request_sync_with_buffer(struct ssam_controller *ctrl, const struct ssam_request *spec, struct ssam_response *rsp, struct ssam_span *buf); /** * ssam_request_sync_onstack - Execute a synchronous request on the stack. * @ctrl: The controller via which the request is submitted. * @rqst: The request specification. * @rsp: The response buffer. * @payload_len: The (maximum) request payload length. * * Allocates a synchronous request with specified payload length on the stack, * fully initializes it via the provided request specification, submits it, * and finally waits for its completion before returning its status. This * helper macro essentially allocates the request message buffer on the stack * and then calls ssam_request_sync_with_buffer(). * * Note: The @payload_len parameter specifies the maximum payload length, used * for buffer allocation. The actual payload length may be smaller. * * Return: Returns the status of the request or any failure during setup, i.e. * zero on success and a negative value on failure. */ #define ssam_request_sync_onstack(ctrl, rqst, rsp, payload_len) \ ({ \ u8 __data[SSH_COMMAND_MESSAGE_LENGTH(payload_len)]; \ struct ssam_span __buf = { &__data[0], ARRAY_SIZE(__data) }; \ \ ssam_request_sync_with_buffer(ctrl, rqst, rsp, &__buf); \ }) /** * __ssam_retry - Retry request in case of I/O errors or timeouts. * @request: The request function to execute. Must return an integer. * @n: Number of tries. * @args: Arguments for the request function. * * Executes the given request function, i.e. calls @request. In case the * request returns %-EREMOTEIO (indicates I/O error) or %-ETIMEDOUT (request * or underlying packet timed out), @request will be re-executed again, up to * @n times in total. * * Return: Returns the return value of the last execution of @request. */ #define __ssam_retry(request, n, args...) \ ({ \ int __i, __s = 0; \ \ for (__i = (n); __i > 0; __i--) { \ __s = request(args); \ if (__s != -ETIMEDOUT && __s != -EREMOTEIO) \ break; \ } \ __s; \ }) /** * ssam_retry - Retry request in case of I/O errors or timeouts up to three * times in total. * @request: The request function to execute. Must return an integer. * @args: Arguments for the request function. * * Executes the given request function, i.e. calls @request. In case the * request returns %-EREMOTEIO (indicates I/O error) or -%ETIMEDOUT (request * or underlying packet timed out), @request will be re-executed again, up to * three times in total. * * See __ssam_retry() for a more generic macro for this purpose. * * Return: Returns the return value of the last execution of @request. */ #define ssam_retry(request, args...) \ __ssam_retry(request, 3, args) /** * struct ssam_request_spec - Blue-print specification of SAM request. * @target_category: Category of the request's target. See &enum ssam_ssh_tc. * @target_id: ID of the request's target. * @command_id: Command ID of the request. * @instance_id: Instance ID of the request's target. * @flags: Flags for the request. See &enum ssam_request_flags. * * Blue-print specification for a SAM request. This struct describes the * unique static parameters of a request (i.e. type) without specifying any of * its instance-specific data (e.g. payload). It is intended to be used as base * for defining simple request functions via the * ``SSAM_DEFINE_SYNC_REQUEST_x()`` family of macros. */ struct ssam_request_spec { u8 target_category; u8 target_id; u8 command_id; u8 instance_id; u8 flags; }; /** * struct ssam_request_spec_md - Blue-print specification for multi-device SAM * request. * @target_category: Category of the request's target. See &enum ssam_ssh_tc. * @command_id: Command ID of the request. * @flags: Flags for the request. See &enum ssam_request_flags. * * Blue-print specification for a multi-device SAM request, i.e. a request * that is applicable to multiple device instances, described by their * individual target and instance IDs. This struct describes the unique static * parameters of a request (i.e. type) without specifying any of its * instance-specific data (e.g. payload) and without specifying any of its * device specific IDs (i.e. target and instance ID). It is intended to be * used as base for defining simple multi-device request functions via the * ``SSAM_DEFINE_SYNC_REQUEST_MD_x()`` and ``SSAM_DEFINE_SYNC_REQUEST_CL_x()`` * families of macros. */ struct ssam_request_spec_md { u8 target_category; u8 command_id; u8 flags; }; /** * SSAM_DEFINE_SYNC_REQUEST_N() - Define synchronous SAM request function * with neither argument nor return value. * @name: Name of the generated function. * @spec: Specification (&struct ssam_request_spec) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request having neither argument nor return value. The * generated function takes care of setting up the request struct and buffer * allocation, as well as execution of the request itself, returning once the * request has been fully completed. The required transport buffer will be * allocated on the stack. * * The generated function is defined as ``static int name(struct * ssam_controller *ctrl)``, returning the status of the request, which is * zero on success and negative on failure. The ``ctrl`` parameter is the * controller via which the request is being sent. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_N(name, spec...) \ static int name(struct ssam_controller *ctrl) \ { \ struct ssam_request_spec s = (struct ssam_request_spec)spec; \ struct ssam_request rqst; \ \ rqst.target_category = s.target_category; \ rqst.target_id = s.target_id; \ rqst.command_id = s.command_id; \ rqst.instance_id = s.instance_id; \ rqst.flags = s.flags; \ rqst.length = 0; \ rqst.payload = NULL; \ \ return ssam_request_sync_onstack(ctrl, &rqst, NULL, 0); \ } /** * SSAM_DEFINE_SYNC_REQUEST_W() - Define synchronous SAM request function with * argument. * @name: Name of the generated function. * @atype: Type of the request's argument. * @spec: Specification (&struct ssam_request_spec) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request taking an argument of type @atype and having no * return value. The generated function takes care of setting up the request * struct, buffer allocation, as well as execution of the request itself, * returning once the request has been fully completed. The required transport * buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct * ssam_controller *ctrl, const atype *arg)``, returning the status of the * request, which is zero on success and negative on failure. The ``ctrl`` * parameter is the controller via which the request is sent. The request * argument is specified via the ``arg`` pointer. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_W(name, atype, spec...) \ static int name(struct ssam_controller *ctrl, const atype *arg) \ { \ struct ssam_request_spec s = (struct ssam_request_spec)spec; \ struct ssam_request rqst; \ \ rqst.target_category = s.target_category; \ rqst.target_id = s.target_id; \ rqst.command_id = s.command_id; \ rqst.instance_id = s.instance_id; \ rqst.flags = s.flags; \ rqst.length = sizeof(atype); \ rqst.payload = (u8 *)arg; \ \ return ssam_request_sync_onstack(ctrl, &rqst, NULL, \ sizeof(atype)); \ } /** * SSAM_DEFINE_SYNC_REQUEST_R() - Define synchronous SAM request function with * return value. * @name: Name of the generated function. * @rtype: Type of the request's return value. * @spec: Specification (&struct ssam_request_spec) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request taking no argument but having a return value of * type @rtype. The generated function takes care of setting up the request * and response structs, buffer allocation, as well as execution of the * request itself, returning once the request has been fully completed. The * required transport buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct * ssam_controller *ctrl, rtype *ret)``, returning the status of the request, * which is zero on success and negative on failure. The ``ctrl`` parameter is * the controller via which the request is sent. The request's return value is * written to the memory pointed to by the ``ret`` parameter. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_R(name, rtype, spec...) \ static int name(struct ssam_controller *ctrl, rtype *ret) \ { \ struct ssam_request_spec s = (struct ssam_request_spec)spec; \ struct ssam_request rqst; \ struct ssam_response rsp; \ int status; \ \ rqst.target_category = s.target_category; \ rqst.target_id = s.target_id; \ rqst.command_id = s.command_id; \ rqst.instance_id = s.instance_id; \ rqst.flags = s.flags | SSAM_REQUEST_HAS_RESPONSE; \ rqst.length = 0; \ rqst.payload = NULL; \ \ rsp.capacity = sizeof(rtype); \ rsp.length = 0; \ rsp.pointer = (u8 *)ret; \ \ status = ssam_request_sync_onstack(ctrl, &rqst, &rsp, 0); \ if (status) \ return status; \ \ if (rsp.length != sizeof(rtype)) { \ struct device *dev = ssam_controller_device(ctrl); \ dev_err(dev, \ "rqst: invalid response length, expected %zu, got %zu (tc: %#04x, cid: %#04x)", \ sizeof(rtype), rsp.length, rqst.target_category,\ rqst.command_id); \ return -EIO; \ } \ \ return 0; \ } /** * SSAM_DEFINE_SYNC_REQUEST_MD_N() - Define synchronous multi-device SAM * request function with neither argument nor return value. * @name: Name of the generated function. * @spec: Specification (&struct ssam_request_spec_md) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request having neither argument nor return value. Device * specifying parameters are not hard-coded, but instead must be provided to * the function. The generated function takes care of setting up the request * struct, buffer allocation, as well as execution of the request itself, * returning once the request has been fully completed. The required transport * buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct * ssam_controller *ctrl, u8 tid, u8 iid)``, returning the status of the * request, which is zero on success and negative on failure. The ``ctrl`` * parameter is the controller via which the request is sent, ``tid`` the * target ID for the request, and ``iid`` the instance ID. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_MD_N(name, spec...) \ static int name(struct ssam_controller *ctrl, u8 tid, u8 iid) \ { \ struct ssam_request_spec_md s = (struct ssam_request_spec_md)spec; \ struct ssam_request rqst; \ \ rqst.target_category = s.target_category; \ rqst.target_id = tid; \ rqst.command_id = s.command_id; \ rqst.instance_id = iid; \ rqst.flags = s.flags; \ rqst.length = 0; \ rqst.payload = NULL; \ \ return ssam_request_sync_onstack(ctrl, &rqst, NULL, 0); \ } /** * SSAM_DEFINE_SYNC_REQUEST_MD_W() - Define synchronous multi-device SAM * request function with argument. * @name: Name of the generated function. * @atype: Type of the request's argument. * @spec: Specification (&struct ssam_request_spec_md) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request taking an argument of type @atype and having no * return value. Device specifying parameters are not hard-coded, but instead * must be provided to the function. The generated function takes care of * setting up the request struct, buffer allocation, as well as execution of * the request itself, returning once the request has been fully completed. * The required transport buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct * ssam_controller *ctrl, u8 tid, u8 iid, const atype *arg)``, returning the * status of the request, which is zero on success and negative on failure. * The ``ctrl`` parameter is the controller via which the request is sent, * ``tid`` the target ID for the request, and ``iid`` the instance ID. The * request argument is specified via the ``arg`` pointer. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_MD_W(name, atype, spec...) \ static int name(struct ssam_controller *ctrl, u8 tid, u8 iid, const atype *arg) \ { \ struct ssam_request_spec_md s = (struct ssam_request_spec_md)spec; \ struct ssam_request rqst; \ \ rqst.target_category = s.target_category; \ rqst.target_id = tid; \ rqst.command_id = s.command_id; \ rqst.instance_id = iid; \ rqst.flags = s.flags; \ rqst.length = sizeof(atype); \ rqst.payload = (u8 *)arg; \ \ return ssam_request_sync_onstack(ctrl, &rqst, NULL, \ sizeof(atype)); \ } /** * SSAM_DEFINE_SYNC_REQUEST_MD_R() - Define synchronous multi-device SAM * request function with return value. * @name: Name of the generated function. * @rtype: Type of the request's return value. * @spec: Specification (&struct ssam_request_spec_md) defining the request. * * Defines a function executing the synchronous SAM request specified by * @spec, with the request taking no argument but having a return value of * type @rtype. Device specifying parameters are not hard-coded, but instead * must be provided to the function. The generated function takes care of * setting up the request and response structs, buffer allocation, as well as * execution of the request itself, returning once the request has been fully * completed. The required transport buffer will be allocated on the stack. * * The generated function is defined as ``static int name(struct * ssam_controller *ctrl, u8 tid, u8 iid, rtype *ret)``, returning the status * of the request, which is zero on success and negative on failure. The * ``ctrl`` parameter is the controller via which the request is sent, ``tid`` * the target ID for the request, and ``iid`` the instance ID. The request's * return value is written to the memory pointed to by the ``ret`` parameter. * * Refer to ssam_request_sync_onstack() for more details on the behavior of * the generated function. */ #define SSAM_DEFINE_SYNC_REQUEST_MD_R(name, rtype, spec...) \ static int name(struct ssam_controller *ctrl, u8 tid, u8 iid, rtype *ret) \ { \ struct ssam_request_spec_md s = (struct ssam_request_spec_md)spec; \ struct ssam_request rqst; \ struct ssam_response rsp; \ int status; \ \ rqst.target_category = s.target_category; \ rqst.target_id = tid; \ rqst.command_id = s.command_id; \ rqst.instance_id = iid; \ rqst.flags = s.flags | SSAM_REQUEST_HAS_RESPONSE; \ rqst.length = 0; \ rqst.payload = NULL; \ \ rsp.capacity = sizeof(rtype); \ rsp.length = 0; \ rsp.pointer = (u8 *)ret; \ \ status = ssam_request_sync_onstack(ctrl, &rqst, &rsp, 0); \ if (status) \ return status; \ \ if (rsp.length != sizeof(rtype)) { \ struct device *dev = ssam_controller_device(ctrl); \ dev_err(dev, \ "rqst: invalid response length, expected %zu, got %zu (tc: %#04x, cid: %#04x)", \ sizeof(rtype), rsp.length, rqst.target_category,\ rqst.command_id); \ return -EIO; \ } \ \ return 0; \ } /* -- Event notifier/callbacks. --------------------------------------------- */ #define SSAM_NOTIF_STATE_SHIFT 2 #define SSAM_NOTIF_STATE_MASK ((1 << SSAM_NOTIF_STATE_SHIFT) - 1) /** * enum ssam_notif_flags - Flags used in return values from SSAM notifier * callback functions. * * @SSAM_NOTIF_HANDLED: * Indicates that the notification has been handled. This flag should be * set by the handler if the handler can act/has acted upon the event * provided to it. This flag should not be set if the handler is not a * primary handler intended for the provided event. * * If this flag has not been set by any handler after the notifier chain * has been traversed, a warning will be emitted, stating that the event * has not been handled. * * @SSAM_NOTIF_STOP: * Indicates that the notifier traversal should stop. If this flag is * returned from a notifier callback, notifier chain traversal will * immediately stop and any remaining notifiers will not be called. This * flag is automatically set when ssam_notifier_from_errno() is called * with a negative error value. */ enum ssam_notif_flags { SSAM_NOTIF_HANDLED = BIT(0), SSAM_NOTIF_STOP = BIT(1), }; struct ssam_event_notifier; typedef u32 (*ssam_notifier_fn_t)(struct ssam_event_notifier *nf, const struct ssam_event *event); /** * struct ssam_notifier_block - Base notifier block for SSAM event * notifications. * @node: The node for the list of notifiers. * @fn: The callback function of this notifier. This function takes the * respective notifier block and event as input and should return * a notifier value, which can either be obtained from the flags * provided in &enum ssam_notif_flags, converted from a standard * error value via ssam_notifier_from_errno(), or a combination of * both (e.g. ``ssam_notifier_from_errno(e) | SSAM_NOTIF_HANDLED``). * @priority: Priority value determining the order in which notifier callbacks * will be called. A higher value means higher priority, i.e. the * associated callback will be executed earlier than other (lower * priority) callbacks. */ struct ssam_notifier_block { struct list_head node; ssam_notifier_fn_t fn; int priority; }; /** * ssam_notifier_from_errno() - Convert standard error value to notifier * return code. * @err: The error code to convert, must be negative (in case of failure) or * zero (in case of success). * * Return: Returns the notifier return value obtained by converting the * specified @err value. In case @err is negative, the %SSAM_NOTIF_STOP flag * will be set, causing notifier call chain traversal to abort. */ static inline u32 ssam_notifier_from_errno(int err) { if (WARN_ON(err > 0) || err == 0) return 0; else return ((-err) << SSAM_NOTIF_STATE_SHIFT) | SSAM_NOTIF_STOP; } /** * ssam_notifier_to_errno() - Convert notifier return code to standard error * value. * @ret: The notifier return value to convert. * * Return: Returns the negative error value encoded in @ret or zero if @ret * indicates success. */ static inline int ssam_notifier_to_errno(u32 ret) { return -(ret >> SSAM_NOTIF_STATE_SHIFT); } /* -- Event/notification registry. ------------------------------------------ */ /** * struct ssam_event_registry - Registry specification used for enabling events. * @target_category: Target category for the event registry requests. * @target_id: Target ID for the event registry requests. * @cid_enable: Command ID for the event-enable request. * @cid_disable: Command ID for the event-disable request. * * This struct describes a SAM event registry via the minimal collection of * SAM IDs specifying the requests to use for enabling and disabling an event. * The individual event to be enabled/disabled itself is specified via &struct * ssam_event_id. */ struct ssam_event_registry { u8 target_category; u8 target_id; u8 cid_enable; u8 cid_disable; }; /** * struct ssam_event_id - Unique event ID used for enabling events. * @target_category: Target category of the event source. * @instance: Instance ID of the event source. * * This struct specifies the event to be enabled/disabled via an externally * provided registry. It does not specify the registry to be used itself, this * is done via &struct ssam_event_registry. */ struct ssam_event_id { u8 target_category; u8 instance; }; /** * enum ssam_event_mask - Flags specifying how events are matched to notifiers. * * @SSAM_EVENT_MASK_NONE: * Run the callback for any event with matching target category. Do not * do any additional filtering. * * @SSAM_EVENT_MASK_TARGET: * In addition to filtering by target category, only execute the notifier * callback for events with a target ID matching to the one of the * registry used for enabling/disabling the event. * * @SSAM_EVENT_MASK_INSTANCE: * In addition to filtering by target category, only execute the notifier * callback for events with an instance ID matching to the instance ID * used when enabling the event. * * @SSAM_EVENT_MASK_STRICT: * Do all the filtering above. */ enum ssam_event_mask { SSAM_EVENT_MASK_TARGET = BIT(0), SSAM_EVENT_MASK_INSTANCE = BIT(1), SSAM_EVENT_MASK_NONE = 0, SSAM_EVENT_MASK_STRICT = SSAM_EVENT_MASK_TARGET | SSAM_EVENT_MASK_INSTANCE, }; /** * SSAM_EVENT_REGISTRY() - Define a new event registry. * @tc: Target category for the event registry requests. * @tid: Target ID for the event registry requests. * @cid_en: Command ID for the event-enable request. * @cid_dis: Command ID for the event-disable request. * * Return: Returns the &struct ssam_event_registry specified by the given * parameters. */ #define SSAM_EVENT_REGISTRY(tc, tid, cid_en, cid_dis) \ ((struct ssam_event_registry) { \ .target_category = (tc), \ .target_id = (tid), \ .cid_enable = (cid_en), \ .cid_disable = (cid_dis), \ }) #define SSAM_EVENT_REGISTRY_SAM \ SSAM_EVENT_REGISTRY(SSAM_SSH_TC_SAM, 0x01, 0x0b, 0x0c) #define SSAM_EVENT_REGISTRY_KIP \ SSAM_EVENT_REGISTRY(SSAM_SSH_TC_KIP, 0x02, 0x27, 0x28) #define SSAM_EVENT_REGISTRY_REG(tid)\ SSAM_EVENT_REGISTRY(SSAM_SSH_TC_REG, tid, 0x01, 0x02) /** * enum ssam_event_notifier_flags - Flags for event notifiers. * @SSAM_EVENT_NOTIFIER_OBSERVER: * The corresponding notifier acts as observer. Registering a notifier * with this flag set will not attempt to enable any event. Equally, * unregistering will not attempt to disable any event. Note that a * notifier with this flag may not even correspond to a certain event at * all, only to a specific event target category. Event matching will not * be influenced by this flag. */ enum ssam_event_notifier_flags { SSAM_EVENT_NOTIFIER_OBSERVER = BIT(0), }; /** * struct ssam_event_notifier - Notifier block for SSAM events. * @base: The base notifier block with callback function and priority. * @event: The event for which this block will receive notifications. * @event.reg: Registry via which the event will be enabled/disabled. * @event.id: ID specifying the event. * @event.mask: Flags determining how events are matched to the notifier. * @event.flags: Flags used for enabling the event. * @flags: Notifier flags (see &enum ssam_event_notifier_flags). */ struct ssam_event_notifier { struct ssam_notifier_block base; struct { struct ssam_event_registry reg; struct ssam_event_id id; enum ssam_event_mask mask; u8 flags; } event; unsigned long flags; }; int ssam_notifier_register(struct ssam_controller *ctrl, struct ssam_event_notifier *n); int ssam_notifier_unregister(struct ssam_controller *ctrl, struct ssam_event_notifier *n); int ssam_controller_event_enable(struct ssam_controller *ctrl, struct ssam_event_registry reg, struct ssam_event_id id, u8 flags); int ssam_controller_event_disable(struct ssam_controller *ctrl, struct ssam_event_registry reg, struct ssam_event_id id, u8 flags); #endif /* _LINUX_SURFACE_AGGREGATOR_CONTROLLER_H */ PK ! +�>'` ` hypervisor.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_HYPEVISOR_H #define __LINUX_HYPEVISOR_H /* * Generic Hypervisor support * Juergen Gross <jgross@suse.com> */ #ifdef CONFIG_X86 #include <asm/jailhouse_para.h> #include <asm/x86_init.h> static inline void hypervisor_pin_vcpu(int cpu) { x86_platform.hyper.pin_vcpu(cpu); } #else /* !CONFIG_X86 */ #include <linux/of.h> static inline void hypervisor_pin_vcpu(int cpu) { } static inline bool jailhouse_paravirt(void) { return of_find_compatible_node(NULL, NULL, "jailhouse,cell"); } #endif /* !CONFIG_X86 */ #endif /* __LINUX_HYPEVISOR_H */ PK ! ��0 �0 mroute_base.hnu �[��� #ifndef __LINUX_MROUTE_BASE_H #define __LINUX_MROUTE_BASE_H #include <linux/netdevice.h> #include <linux/rhashtable-types.h> #include <linux/spinlock.h> #include <net/net_namespace.h> #include <net/sock.h> #include <net/fib_notifier.h> #include <net/ip_fib.h> /** * struct vif_device - interface representor for multicast routing * @dev: network device being used * @bytes_in: statistic; bytes ingressing * @bytes_out: statistic; bytes egresing * @pkt_in: statistic; packets ingressing * @pkt_out: statistic; packets egressing * @rate_limit: Traffic shaping (NI) * @threshold: TTL threshold * @flags: Control flags * @link: Physical interface index * @dev_parent_id: device parent id * @local: Local address * @remote: Remote address for tunnels */ struct vif_device { struct net_device *dev; unsigned long bytes_in, bytes_out; unsigned long pkt_in, pkt_out; unsigned long rate_limit; unsigned char threshold; unsigned short flags; int link; /* Currently only used by ipmr */ struct netdev_phys_item_id dev_parent_id; __be32 local, remote; }; struct vif_entry_notifier_info { struct fib_notifier_info info; struct net_device *dev; unsigned short vif_index; unsigned short vif_flags; u32 tb_id; }; static inline int mr_call_vif_notifier(struct notifier_block *nb, unsigned short family, enum fib_event_type event_type, struct vif_device *vif, unsigned short vif_index, u32 tb_id, struct netlink_ext_ack *extack) { struct vif_entry_notifier_info info = { .info = { .family = family, .extack = extack, }, .dev = vif->dev, .vif_index = vif_index, .vif_flags = vif->flags, .tb_id = tb_id, }; return call_fib_notifier(nb, event_type, &info.info); } static inline int mr_call_vif_notifiers(struct net *net, unsigned short family, enum fib_event_type event_type, struct vif_device *vif, unsigned short vif_index, u32 tb_id, unsigned int *ipmr_seq) { struct vif_entry_notifier_info info = { .info = { .family = family, }, .dev = vif->dev, .vif_index = vif_index, .vif_flags = vif->flags, .tb_id = tb_id, }; ASSERT_RTNL(); (*ipmr_seq)++; return call_fib_notifiers(net, event_type, &info.info); } #ifndef MAXVIFS /* This one is nasty; value is defined in uapi using different symbols for * mroute and morute6 but both map into same 32. */ #define MAXVIFS 32 #endif #define VIF_EXISTS(_mrt, _idx) (!!((_mrt)->vif_table[_idx].dev)) /* mfc_flags: * MFC_STATIC - the entry was added statically (not by a routing daemon) * MFC_OFFLOAD - the entry was offloaded to the hardware */ enum { MFC_STATIC = BIT(0), MFC_OFFLOAD = BIT(1), }; /** * struct mr_mfc - common multicast routing entries * @mnode: rhashtable list * @mfc_parent: source interface (iif) * @mfc_flags: entry flags * @expires: unresolved entry expire time * @unresolved: unresolved cached skbs * @last_assert: time of last assert * @minvif: minimum VIF id * @maxvif: maximum VIF id * @bytes: bytes that have passed for this entry * @pkt: packets that have passed for this entry * @wrong_if: number of wrong source interface hits * @lastuse: time of last use of the group (traffic or update) * @ttls: OIF TTL threshold array * @refcount: reference count for this entry * @list: global entry list * @rcu: used for entry destruction * @free: Operation used for freeing an entry under RCU */ struct mr_mfc { struct rhlist_head mnode; unsigned short mfc_parent; int mfc_flags; union { struct { unsigned long expires; struct sk_buff_head unresolved; } unres; struct { unsigned long last_assert; int minvif; int maxvif; unsigned long bytes; unsigned long pkt; unsigned long wrong_if; unsigned long lastuse; unsigned char ttls[MAXVIFS]; refcount_t refcount; } res; } mfc_un; struct list_head list; struct rcu_head rcu; void (*free)(struct rcu_head *head); }; static inline void mr_cache_put(struct mr_mfc *c) { if (refcount_dec_and_test(&c->mfc_un.res.refcount)) call_rcu(&c->rcu, c->free); } static inline void mr_cache_hold(struct mr_mfc *c) { refcount_inc(&c->mfc_un.res.refcount); } struct mfc_entry_notifier_info { struct fib_notifier_info info; struct mr_mfc *mfc; u32 tb_id; }; static inline int mr_call_mfc_notifier(struct notifier_block *nb, unsigned short family, enum fib_event_type event_type, struct mr_mfc *mfc, u32 tb_id, struct netlink_ext_ack *extack) { struct mfc_entry_notifier_info info = { .info = { .family = family, .extack = extack, }, .mfc = mfc, .tb_id = tb_id }; return call_fib_notifier(nb, event_type, &info.info); } static inline int mr_call_mfc_notifiers(struct net *net, unsigned short family, enum fib_event_type event_type, struct mr_mfc *mfc, u32 tb_id, unsigned int *ipmr_seq) { struct mfc_entry_notifier_info info = { .info = { .family = family, }, .mfc = mfc, .tb_id = tb_id }; ASSERT_RTNL(); (*ipmr_seq)++; return call_fib_notifiers(net, event_type, &info.info); } struct mr_table; /** * struct mr_table_ops - callbacks and info for protocol-specific ops * @rht_params: parameters for accessing the MFC hash * @cmparg_any: a hash key to be used for matching on (*,*) routes */ struct mr_table_ops { const struct rhashtable_params *rht_params; void *cmparg_any; }; /** * struct mr_table - a multicast routing table * @list: entry within a list of multicast routing tables * @net: net where this table belongs * @ops: protocol specific operations * @id: identifier of the table * @mroute_sk: socket associated with the table * @ipmr_expire_timer: timer for handling unresolved routes * @mfc_unres_queue: list of unresolved MFC entries * @vif_table: array containing all possible vifs * @mfc_hash: Hash table of all resolved routes for easy lookup * @mfc_cache_list: list of resovled routes for possible traversal * @maxvif: Identifier of highest value vif currently in use * @cache_resolve_queue_len: current size of unresolved queue * @mroute_do_assert: Whether to inform userspace on wrong ingress * @mroute_do_pim: Whether to receive IGMP PIMv1 * @mroute_reg_vif_num: PIM-device vif index */ struct mr_table { struct list_head list; possible_net_t net; struct mr_table_ops ops; u32 id; struct sock __rcu *mroute_sk; struct timer_list ipmr_expire_timer; struct list_head mfc_unres_queue; struct vif_device vif_table[MAXVIFS]; struct rhltable mfc_hash; struct list_head mfc_cache_list; int maxvif; atomic_t cache_resolve_queue_len; bool mroute_do_assert; bool mroute_do_pim; bool mroute_do_wrvifwhole; int mroute_reg_vif_num; }; #ifdef CONFIG_IP_MROUTE_COMMON void vif_device_init(struct vif_device *v, struct net_device *dev, unsigned long rate_limit, unsigned char threshold, unsigned short flags, unsigned short get_iflink_mask); struct mr_table * mr_table_alloc(struct net *net, u32 id, struct mr_table_ops *ops, void (*expire_func)(struct timer_list *t), void (*table_set)(struct mr_table *mrt, struct net *net)); /* These actually return 'struct mr_mfc *', but to avoid need for explicit * castings they simply return void. */ void *mr_mfc_find_parent(struct mr_table *mrt, void *hasharg, int parent); void *mr_mfc_find_any_parent(struct mr_table *mrt, int vifi); void *mr_mfc_find_any(struct mr_table *mrt, int vifi, void *hasharg); int mr_fill_mroute(struct mr_table *mrt, struct sk_buff *skb, struct mr_mfc *c, struct rtmsg *rtm); int mr_table_dump(struct mr_table *mrt, struct sk_buff *skb, struct netlink_callback *cb, int (*fill)(struct mr_table *mrt, struct sk_buff *skb, u32 portid, u32 seq, struct mr_mfc *c, int cmd, int flags), spinlock_t *lock, struct fib_dump_filter *filter); int mr_rtm_dumproute(struct sk_buff *skb, struct netlink_callback *cb, struct mr_table *(*iter)(struct net *net, struct mr_table *mrt), int (*fill)(struct mr_table *mrt, struct sk_buff *skb, u32 portid, u32 seq, struct mr_mfc *c, int cmd, int flags), spinlock_t *lock, struct fib_dump_filter *filter); int mr_dump(struct net *net, struct notifier_block *nb, unsigned short family, int (*rules_dump)(struct net *net, struct notifier_block *nb, struct netlink_ext_ack *extack), struct mr_table *(*mr_iter)(struct net *net, struct mr_table *mrt), rwlock_t *mrt_lock, struct netlink_ext_ack *extack); #else static inline void vif_device_init(struct vif_device *v, struct net_device *dev, unsigned long rate_limit, unsigned char threshold, unsigned short flags, unsigned short get_iflink_mask) { } static inline void *mr_mfc_find_parent(struct mr_table *mrt, void *hasharg, int parent) { return NULL; } static inline void *mr_mfc_find_any_parent(struct mr_table *mrt, int vifi) { return NULL; } static inline struct mr_mfc *mr_mfc_find_any(struct mr_table *mrt, int vifi, void *hasharg) { return NULL; } static inline int mr_fill_mroute(struct mr_table *mrt, struct sk_buff *skb, struct mr_mfc *c, struct rtmsg *rtm) { return -EINVAL; } static inline int mr_rtm_dumproute(struct sk_buff *skb, struct netlink_callback *cb, struct mr_table *(*iter)(struct net *net, struct mr_table *mrt), int (*fill)(struct mr_table *mrt, struct sk_buff *skb, u32 portid, u32 seq, struct mr_mfc *c, int cmd, int flags), spinlock_t *lock, struct fib_dump_filter *filter) { return -EINVAL; } static inline int mr_dump(struct net *net, struct notifier_block *nb, unsigned short family, int (*rules_dump)(struct net *net, struct notifier_block *nb, struct netlink_ext_ack *extack), struct mr_table *(*mr_iter)(struct net *net, struct mr_table *mrt), rwlock_t *mrt_lock, struct netlink_ext_ack *extack) { return -EINVAL; } #endif static inline void *mr_mfc_find(struct mr_table *mrt, void *hasharg) { return mr_mfc_find_parent(mrt, hasharg, -1); } #ifdef CONFIG_PROC_FS struct mr_vif_iter { struct seq_net_private p; struct mr_table *mrt; int ct; }; struct mr_mfc_iter { struct seq_net_private p; struct mr_table *mrt; struct list_head *cache; /* Lock protecting the mr_table's unresolved queue */ spinlock_t *lock; }; #ifdef CONFIG_IP_MROUTE_COMMON void *mr_vif_seq_idx(struct net *net, struct mr_vif_iter *iter, loff_t pos); void *mr_vif_seq_next(struct seq_file *seq, void *v, loff_t *pos); static inline void *mr_vif_seq_start(struct seq_file *seq, loff_t *pos) { return *pos ? mr_vif_seq_idx(seq_file_net(seq), seq->private, *pos - 1) : SEQ_START_TOKEN; } /* These actually return 'struct mr_mfc *', but to avoid need for explicit * castings they simply return void. */ void *mr_mfc_seq_idx(struct net *net, struct mr_mfc_iter *it, loff_t pos); void *mr_mfc_seq_next(struct seq_file *seq, void *v, loff_t *pos); static inline void *mr_mfc_seq_start(struct seq_file *seq, loff_t *pos, struct mr_table *mrt, spinlock_t *lock) { struct mr_mfc_iter *it = seq->private; it->mrt = mrt; it->cache = NULL; it->lock = lock; return *pos ? mr_mfc_seq_idx(seq_file_net(seq), seq->private, *pos - 1) : SEQ_START_TOKEN; } static inline void mr_mfc_seq_stop(struct seq_file *seq, void *v) { struct mr_mfc_iter *it = seq->private; struct mr_table *mrt = it->mrt; if (it->cache == &mrt->mfc_unres_queue) spin_unlock_bh(it->lock); else if (it->cache == &mrt->mfc_cache_list) rcu_read_unlock(); } #else static inline void *mr_vif_seq_idx(struct net *net, struct mr_vif_iter *iter, loff_t pos) { return NULL; } static inline void *mr_vif_seq_next(struct seq_file *seq, void *v, loff_t *pos) { return NULL; } static inline void *mr_vif_seq_start(struct seq_file *seq, loff_t *pos) { return NULL; } static inline void *mr_mfc_seq_idx(struct net *net, struct mr_mfc_iter *it, loff_t pos) { return NULL; } static inline void *mr_mfc_seq_next(struct seq_file *seq, void *v, loff_t *pos) { return NULL; } static inline void *mr_mfc_seq_start(struct seq_file *seq, loff_t *pos, struct mr_table *mrt, spinlock_t *lock) { return NULL; } static inline void mr_mfc_seq_stop(struct seq_file *seq, void *v) { } #endif #endif #endif PK ! "�~<Q Q transport_class.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * transport_class.h - a generic container for all transport classes * * Copyright (c) 2005 - James Bottomley <James.Bottomley@steeleye.com> */ #ifndef _TRANSPORT_CLASS_H_ #define _TRANSPORT_CLASS_H_ #include <linux/device.h> #include <linux/bug.h> #include <linux/attribute_container.h> struct transport_container; struct transport_class { struct class class; int (*setup)(struct transport_container *, struct device *, struct device *); int (*configure)(struct transport_container *, struct device *, struct device *); int (*remove)(struct transport_container *, struct device *, struct device *); }; #define DECLARE_TRANSPORT_CLASS(cls, nm, su, rm, cfg) \ struct transport_class cls = { \ .class = { \ .name = nm, \ }, \ .setup = su, \ .remove = rm, \ .configure = cfg, \ } struct anon_transport_class { struct transport_class tclass; struct attribute_container container; }; #define DECLARE_ANON_TRANSPORT_CLASS(cls, mtch, cfg) \ struct anon_transport_class cls = { \ .tclass = { \ .configure = cfg, \ }, \ . container = { \ .match = mtch, \ }, \ } #define class_to_transport_class(x) \ container_of(x, struct transport_class, class) struct transport_container { struct attribute_container ac; const struct attribute_group *statistics; }; #define attribute_container_to_transport_container(x) \ container_of(x, struct transport_container, ac) void transport_remove_device(struct device *); int transport_add_device(struct device *); void transport_setup_device(struct device *); void transport_configure_device(struct device *); void transport_destroy_device(struct device *); static inline int transport_register_device(struct device *dev) { int ret; transport_setup_device(dev); ret = transport_add_device(dev); if (ret) transport_destroy_device(dev); return ret; } static inline void transport_unregister_device(struct device *dev) { transport_remove_device(dev); transport_destroy_device(dev); } static inline int transport_container_register(struct transport_container *tc) { return attribute_container_register(&tc->ac); } static inline void transport_container_unregister(struct transport_container *tc) { if (unlikely(attribute_container_unregister(&tc->ac))) BUG(); } int transport_class_register(struct transport_class *); int anon_transport_class_register(struct anon_transport_class *); void transport_class_unregister(struct transport_class *); void anon_transport_class_unregister(struct anon_transport_class *); #endif PK ! �[M<� � sh_timer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SH_TIMER_H__ #define __SH_TIMER_H__ struct sh_timer_config { unsigned int channels_mask; }; #endif /* __SH_TIMER_H__ */ PK ! ����I �I hil.hnu �[��� #ifndef _HIL_H_ #define _HIL_H_ /* * Hewlett Packard Human Interface Loop (HP-HIL) Protocol -- header. * * Copyright (c) 2001 Brian S. Julin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification. * 2. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * Alternatively, this software may be distributed under the terms of the * GNU General Public License ("GPL"). * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * * References: * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A * * A note of thanks to HP for providing and shipping reference materials * free of charge to help in the development of HIL support for Linux. * */ #include <asm/types.h> /* Physical constants relevant to raw loop/device timing. */ #define HIL_CLOCK 8MHZ #define HIL_EK1_CLOCK 30HZ #define HIL_EK2_CLOCK 60HZ #define HIL_TIMEOUT_DEV 5 /* ms */ #define HIL_TIMEOUT_DEVS 10 /* ms */ #define HIL_TIMEOUT_NORESP 10 /* ms */ #define HIL_TIMEOUT_DEVS_DATA 16 /* ms */ #define HIL_TIMEOUT_SELFTEST 200 /* ms */ /* Actual wire line coding. These will only be useful if someone is * implementing a software MLC to run HIL devices on a non-parisc machine. */ #define HIL_WIRE_PACKET_LEN 15 enum hil_wire_bitpos { HIL_WIRE_START = 0, HIL_WIRE_ADDR2, HIL_WIRE_ADDR1, HIL_WIRE_ADDR0, HIL_WIRE_COMMAND, HIL_WIRE_DATA7, HIL_WIRE_DATA6, HIL_WIRE_DATA5, HIL_WIRE_DATA4, HIL_WIRE_DATA3, HIL_WIRE_DATA2, HIL_WIRE_DATA1, HIL_WIRE_DATA0, HIL_WIRE_PARITY, HIL_WIRE_STOP }; /* HP documentation uses these bit positions to refer to commands; * we will call these "packets". */ enum hil_pkt_bitpos { HIL_PKT_CMD = 0x00000800, HIL_PKT_ADDR2 = 0x00000400, HIL_PKT_ADDR1 = 0x00000200, HIL_PKT_ADDR0 = 0x00000100, HIL_PKT_ADDR_MASK = 0x00000700, HIL_PKT_ADDR_SHIFT = 8, HIL_PKT_DATA7 = 0x00000080, HIL_PKT_DATA6 = 0x00000040, HIL_PKT_DATA5 = 0x00000020, HIL_PKT_DATA4 = 0x00000010, HIL_PKT_DATA3 = 0x00000008, HIL_PKT_DATA2 = 0x00000004, HIL_PKT_DATA1 = 0x00000002, HIL_PKT_DATA0 = 0x00000001, HIL_PKT_DATA_MASK = 0x000000FF, HIL_PKT_DATA_SHIFT = 0 }; /* The HIL MLC also has several error/status/control bits. We extend the * "packet" to include these when direct access to the MLC is available, * or emulate them in cases where they are not available. * * This way the device driver knows that the underlying MLC driver * has had to deal with loop errors. */ enum hil_error_bitpos { HIL_ERR_OB = 0x00000800, /* MLC is busy sending an auto-poll, or we have filled up the output buffer and must wait. */ HIL_ERR_INT = 0x00010000, /* A normal interrupt has occurred. */ HIL_ERR_NMI = 0x00020000, /* An NMI has occurred. */ HIL_ERR_LERR = 0x00040000, /* A poll didn't come back. */ HIL_ERR_PERR = 0x01000000, /* There was a Parity Error. */ HIL_ERR_FERR = 0x02000000, /* There was a Framing Error. */ HIL_ERR_FOF = 0x04000000 /* Input FIFO Overflowed. */ }; enum hil_control_bitpos { HIL_CTRL_TEST = 0x00010000, HIL_CTRL_IPF = 0x00040000, HIL_CTRL_APE = 0x02000000 }; /* Bits 30,31 are unused, we use them to control write behavior. */ #define HIL_DO_ALTER_CTRL 0x40000000 /* Write MSW of packet to control before writing LSW to loop */ #define HIL_CTRL_ONLY 0xc0000000 /* *Only* alter the control registers */ /* This gives us a 32-bit "packet" */ typedef u32 hil_packet; /* HIL Loop commands */ enum hil_command { HIL_CMD_IFC = 0x00, /* Interface Clear */ HIL_CMD_EPT = 0x01, /* Enter Pass-Thru Mode */ HIL_CMD_ELB = 0x02, /* Enter Loop-Back Mode */ HIL_CMD_IDD = 0x03, /* Identify and Describe */ HIL_CMD_DSR = 0x04, /* Device Soft Reset */ HIL_CMD_PST = 0x05, /* Perform Self Test */ HIL_CMD_RRG = 0x06, /* Read Register */ HIL_CMD_WRG = 0x07, /* Write Register */ HIL_CMD_ACF = 0x08, /* Auto Configure */ HIL_CMDID_ACF = 0x07, /* Auto Configure bits with incremented ID */ HIL_CMD_POL = 0x10, /* Poll */ HIL_CMDCT_POL = 0x0f, /* Poll command bits with item count */ HIL_CMD_RPL = 0x20, /* RePoll */ HIL_CMDCT_RPL = 0x0f, /* RePoll command bits with item count */ HIL_CMD_RNM = 0x30, /* Report Name */ HIL_CMD_RST = 0x31, /* Report Status */ HIL_CMD_EXD = 0x32, /* Extended Describe */ HIL_CMD_RSC = 0x33, /* Report Security Code */ /* 0x34 to 0x3c reserved for future use */ HIL_CMD_DKA = 0x3d, /* Disable Keyswitch Autorepeat */ HIL_CMD_EK1 = 0x3e, /* Enable Keyswitch Autorepeat 1 */ HIL_CMD_EK2 = 0x3f, /* Enable Keyswitch Autorepeat 2 */ HIL_CMD_PR1 = 0x40, /* Prompt1 */ HIL_CMD_PR2 = 0x41, /* Prompt2 */ HIL_CMD_PR3 = 0x42, /* Prompt3 */ HIL_CMD_PR4 = 0x43, /* Prompt4 */ HIL_CMD_PR5 = 0x44, /* Prompt5 */ HIL_CMD_PR6 = 0x45, /* Prompt6 */ HIL_CMD_PR7 = 0x46, /* Prompt7 */ HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */ HIL_CMD_AK1 = 0x48, /* Acknowledge1 */ HIL_CMD_AK2 = 0x49, /* Acknowledge2 */ HIL_CMD_AK3 = 0x4a, /* Acknowledge3 */ HIL_CMD_AK4 = 0x4b, /* Acknowledge4 */ HIL_CMD_AK5 = 0x4c, /* Acknowledge5 */ HIL_CMD_AK6 = 0x4d, /* Acknowledge6 */ HIL_CMD_AK7 = 0x4e, /* Acknowledge7 */ HIL_CMD_ACK = 0x4f, /* Acknowledge (General Purpose) */ /* 0x50 to 0x78 reserved for future use */ /* 0x80 to 0xEF device-specific commands */ /* 0xf0 to 0xf9 reserved for future use */ HIL_CMD_RIO = 0xfa, /* Register I/O Error */ HIL_CMD_SHR = 0xfb, /* System Hard Reset */ HIL_CMD_TER = 0xfc, /* Transmission Error */ HIL_CMD_CAE = 0xfd, /* Configuration Address Error */ HIL_CMD_DHR = 0xfe, /* Device Hard Reset */ /* 0xff is prohibited from use. */ }; /* * Response "records" to HIL commands */ /* Device ID byte */ #define HIL_IDD_DID_TYPE_MASK 0xe0 /* Primary type bits */ #define HIL_IDD_DID_TYPE_KB_INTEGRAL 0xa0 /* Integral keyboard */ #define HIL_IDD_DID_TYPE_KB_ITF 0xc0 /* ITD keyboard */ #define HIL_IDD_DID_TYPE_KB_RSVD 0xe0 /* Reserved keyboard type */ #define HIL_IDD_DID_TYPE_KB_LANG_MASK 0x1f /* Keyboard locale bits */ #define HIL_IDD_DID_KBLANG_USE_ESD 0x00 /* Use ESD Locale instead */ #define HIL_IDD_DID_TYPE_ABS 0x80 /* Absolute Positioners */ #define HIL_IDD_DID_ABS_RSVD1_MASK 0xf8 /* Reserved */ #define HIL_IDD_DID_ABS_RSVD1 0x98 #define HIL_IDD_DID_ABS_TABLET_MASK 0xf8 /* Tablets and digitizers */ #define HIL_IDD_DID_ABS_TABLET 0x90 #define HIL_IDD_DID_ABS_TSCREEN_MASK 0xfc /* Touch screens */ #define HIL_IDD_DID_ABS_TSCREEN 0x8c #define HIL_IDD_DID_ABS_RSVD2_MASK 0xfc /* Reserved */ #define HIL_IDD_DID_ABS_RSVD2 0x88 #define HIL_IDD_DID_ABS_RSVD3_MASK 0xfc /* Reserved */ #define HIL_IDD_DID_ABS_RSVD3 0x80 #define HIL_IDD_DID_TYPE_REL 0x60 /* Relative Positioners */ #define HIL_IDD_DID_REL_RSVD1_MASK 0xf0 /* Reserved */ #define HIL_IDD_DID_REL_RSVD1 0x70 #define HIL_IDD_DID_REL_RSVD2_MASK 0xfc /* Reserved */ #define HIL_IDD_DID_REL_RSVD2 0x6c #define HIL_IDD_DID_REL_MOUSE_MASK 0xfc /* Mouse */ #define HIL_IDD_DID_REL_MOUSE 0x68 #define HIL_IDD_DID_REL_QUAD_MASK 0xf8 /* Other Quadrature Devices */ #define HIL_IDD_DID_REL_QUAD 0x60 #define HIL_IDD_DID_TYPE_CHAR 0x40 /* Character Entry */ #define HIL_IDD_DID_CHAR_BARCODE_MASK 0xfc /* Barcode Reader */ #define HIL_IDD_DID_CHAR_BARCODE 0x5c #define HIL_IDD_DID_CHAR_RSVD1_MASK 0xfc /* Reserved */ #define HIL_IDD_DID_CHAR_RSVD1 0x58 #define HIL_IDD_DID_CHAR_RSVD2_MASK 0xf8 /* Reserved */ #define HIL_IDD_DID_CHAR_RSVD2 0x50 #define HIL_IDD_DID_CHAR_RSVD3_MASK 0xf0 /* Reserved */ #define HIL_IDD_DID_CHAR_RSVD3 0x40 #define HIL_IDD_DID_TYPE_OTHER 0x20 /* Miscellaneous */ #define HIL_IDD_DID_OTHER_RSVD1_MASK 0xf0 /* Reserved */ #define HIL_IDD_DID_OTHER_RSVD1 0x30 #define HIL_IDD_DID_OTHER_BARCODE_MASK 0xfc /* Tone Generator */ #define HIL_IDD_DID_OTHER_BARCODE 0x2c #define HIL_IDD_DID_OTHER_RSVD2_MASK 0xfc /* Reserved */ #define HIL_IDD_DID_OTHER_RSVD2 0x28 #define HIL_IDD_DID_OTHER_RSVD3_MASK 0xf8 /* Reserved */ #define HIL_IDD_DID_OTHER_RSVD3 0x20 #define HIL_IDD_DID_TYPE_KEYPAD 0x00 /* Vectra Keyboard */ /* IDD record header */ #define HIL_IDD_HEADER_AXSET_MASK 0x03 /* Number of axis in a set */ #define HIL_IDD_HEADER_RSC 0x04 /* Supports RSC command */ #define HIL_IDD_HEADER_EXD 0x08 /* Supports EXD command */ #define HIL_IDD_HEADER_IOD 0x10 /* IOD byte to follow */ #define HIL_IDD_HEADER_16BIT 0x20 /* 16 (vs. 8) bit resolution */ #define HIL_IDD_HEADER_ABS 0x40 /* Reports Absolute Position */ #define HIL_IDD_HEADER_2X_AXIS 0x80 /* Two sets of 1-3 axis */ /* I/O Descriptor */ #define HIL_IDD_IOD_NBUTTON_MASK 0x07 /* Number of buttons */ #define HIL_IDD_IOD_PROXIMITY 0x08 /* Proximity in/out events */ #define HIL_IDD_IOD_PROMPT_MASK 0x70 /* Number of prompts/acks */ #define HIL_IDD_IOD_PROMPT_SHIFT 4 #define HIL_IDD_IOD_PROMPT 0x80 /* Generic prompt/ack */ #define HIL_IDD_NUM_AXES_PER_SET(header_packet) \ ((header_packet) & HIL_IDD_HEADER_AXSET_MASK) #define HIL_IDD_NUM_AXSETS(header_packet) \ (2 - !((header_packet) & HIL_IDD_HEADER_2X_AXIS)) #define HIL_IDD_LEN(header_packet) \ ((4 - !(header_packet & HIL_IDD_HEADER_IOD) - \ 2 * !(HIL_IDD_NUM_AXES_PER_SET(header_packet))) + \ 2 * HIL_IDD_NUM_AXES_PER_SET(header_packet) * \ !!((header_packet) & HIL_IDD_HEADER_ABS)) /* The following HIL_IDD_* macros assume you have an array of * packets and/or unpacked 8-bit data in the order that they * were received. */ #define HIL_IDD_AXIS_COUNTS_PER_M(header_ptr) \ (!(HIL_IDD_NUM_AXSETS(*(header_ptr))) ? -1 : \ (((*(header_ptr + 1) & HIL_PKT_DATA_MASK) + \ ((*(header_ptr + 2) & HIL_PKT_DATA_MASK)) << 8) \ * ((*(header_ptr) & HIL_IDD_HEADER_16BIT) ? 100 : 1))) #define HIL_IDD_AXIS_MAX(header_ptr, __axnum) \ ((!(*(header_ptr) & HIL_IDD_HEADER_ABS) || \ (HIL_IDD_NUM_AXES_PER_SET(*(header_ptr)) <= __axnum)) ? 0 : \ ((HIL_PKT_DATA_MASK & *((header_ptr) + 3 + 2 * __axnum)) + \ ((HIL_PKT_DATA_MASK & *((header_ptr) + 4 + 2 * __axnum)) << 8))) #define HIL_IDD_IOD(header_ptr) \ (*(header_ptr + HIL_IDD_LEN((*header_ptr)) - 1)) #define HIL_IDD_HAS_GEN_PROMPT(header_ptr) \ ((*header_ptr & HIL_IDD_HEADER_IOD) && \ (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROMPT)) #define HIL_IDD_HAS_GEN_PROXIMITY(header_ptr) \ ((*header_ptr & HIL_IDD_HEADER_IOD) && \ (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROXIMITY)) #define HIL_IDD_NUM_BUTTONS(header_ptr) \ ((*header_ptr & HIL_IDD_HEADER_IOD) ? \ (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NBUTTON_MASK) : 0) #define HIL_IDD_NUM_PROMPTS(header_ptr) \ ((*header_ptr & HIL_IDD_HEADER_IOD) ? \ ((HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NPROMPT_MASK) \ >> HIL_IDD_IOD_PROMPT_SHIFT) : 0) /* The response to HIL EXD commands -- the "extended describe record" */ #define HIL_EXD_HEADER_WRG 0x03 /* Supports type2 WRG */ #define HIL_EXD_HEADER_WRG_TYPE1 0x01 /* Supports type1 WRG */ #define HIL_EXD_HEADER_WRG_TYPE2 0x02 /* Supports type2 WRG */ #define HIL_EXD_HEADER_RRG 0x04 /* Supports RRG command */ #define HIL_EXD_HEADER_RNM 0x10 /* Supports RNM command */ #define HIL_EXD_HEADER_RST 0x20 /* Supports RST command */ #define HIL_EXD_HEADER_LOCALE 0x40 /* Contains locale code */ #define HIL_EXD_NUM_RRG(header_ptr) \ ((*header_ptr & HIL_EXD_HEADER_RRG) ? \ (*(header_ptr + 1) & HIL_PKT_DATA_MASK) : 0) #define HIL_EXD_NUM_WWG(header_ptr) \ ((*header_ptr & HIL_EXD_HEADER_WRG) ? \ (*(header_ptr + 2 - !(*header_ptr & HIL_EXD_HEADER_RRG)) & \ HIL_PKT_DATA_MASK) : 0) #define HIL_EXD_LEN(header_ptr) \ (!!(*header_ptr & HIL_EXD_HEADER_RRG) + \ !!(*header_ptr & HIL_EXD_HEADER_WRG) + \ !!(*header_ptr & HIL_EXD_HEADER_LOCALE) + \ 2 * !!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) + 1) #define HIL_EXD_LOCALE(header_ptr) \ (!(*header_ptr & HIL_EXD_HEADER_LOCALE) ? -1 : \ (*(header_ptr + HIL_EXD_LEN(header_ptr) - 1) & HIL_PKT_DATA_MASK)) #define HIL_EXD_WRG_TYPE2_LEN(header_ptr) \ (!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) ? -1 : \ (*(header_ptr + HIL_EXD_LEN(header_ptr) - 2 - \ !!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) + \ ((*(header_ptr + HIL_EXD_LEN(header_ptr) - 1 - \ !!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) << 8)) /* Device locale codes. */ /* Last defined locale code. Everything above this is "Reserved", and note that this same table applies to the Device ID Byte where keyboards may have a nationality code which is only 5 bits. */ #define HIL_LOCALE_MAX 0x1f /* Map to hopefully useful strings. I was trying to make these look like locale.aliases strings do; maybe that isn't the right table to emulate. In either case, I didn't have much to work on. */ #define HIL_LOCALE_MAP \ "", /* 0x00 Reserved */ \ "", /* 0x01 Reserved */ \ "", /* 0x02 Reserved */ \ "swiss.french", /* 0x03 Swiss/French */ \ "portuguese", /* 0x04 Portuguese */ \ "arabic", /* 0x05 Arabic */ \ "hebrew", /* 0x06 Hebrew */ \ "english.canadian", /* 0x07 Canadian English */ \ "turkish", /* 0x08 Turkish */ \ "greek", /* 0x09 Greek */ \ "thai", /* 0x0a Thai (Thailand) */ \ "italian", /* 0x0b Italian */ \ "korean", /* 0x0c Hangul (Korea) */ \ "dutch", /* 0x0d Dutch */ \ "swedish", /* 0x0e Swedish */ \ "german", /* 0x0f German */ \ "chinese", /* 0x10 Chinese-PRC */ \ "chinese", /* 0x11 Chinese-ROC */ \ "swiss.french", /* 0x12 Swiss/French II */ \ "spanish", /* 0x13 Spanish */ \ "swiss.german", /* 0x14 Swiss/German II */ \ "flemish", /* 0x15 Belgian (Flemish) */ \ "finnish", /* 0x16 Finnish */ \ "english.uk", /* 0x17 United Kingdom */ \ "french.canadian", /* 0x18 French/Canadian */ \ "swiss.german", /* 0x19 Swiss/German */ \ "norwegian", /* 0x1a Norwegian */ \ "french", /* 0x1b French */ \ "danish", /* 0x1c Danish */ \ "japanese", /* 0x1d Katakana */ \ "spanish", /* 0x1e Latin American/Spanish*/\ "english.us" /* 0x1f United States */ \ /* HIL keycodes */ #define HIL_KEYCODES_SET1_TBLSIZE 128 #define HIL_KEYCODES_SET1 \ KEY_5, KEY_RESERVED, KEY_RIGHTALT, KEY_LEFTALT, \ KEY_RIGHTSHIFT, KEY_LEFTSHIFT, KEY_LEFTCTRL, KEY_SYSRQ, \ KEY_KP4, KEY_KP8, KEY_KP5, KEY_KP9, \ KEY_KP6, KEY_KP7, KEY_KPCOMMA, KEY_KPENTER, \ KEY_KP1, KEY_KPSLASH, KEY_KP2, KEY_KPPLUS, \ KEY_KP3, KEY_KPASTERISK, KEY_KP0, KEY_KPMINUS, \ KEY_B, KEY_V, KEY_C, KEY_X, \ KEY_Z, KEY_RESERVED, KEY_RESERVED, KEY_ESC, \ KEY_6, KEY_F10, KEY_3, KEY_F11, \ KEY_KPDOT, KEY_F9, KEY_TAB /*KP*/, KEY_F12, \ KEY_H, KEY_G, KEY_F, KEY_D, \ KEY_S, KEY_A, KEY_RESERVED, KEY_CAPSLOCK, \ KEY_U, KEY_Y, KEY_T, KEY_R, \ KEY_E, KEY_W, KEY_Q, KEY_TAB, \ KEY_7, KEY_6, KEY_5, KEY_4, \ KEY_3, KEY_2, KEY_1, KEY_GRAVE, \ KEY_F13, KEY_F14, KEY_F15, KEY_F16, \ KEY_F17, KEY_F18, KEY_F19, KEY_F20, \ KEY_MENU, KEY_F4, KEY_F3, KEY_F2, \ KEY_F1, KEY_VOLUMEUP, KEY_STOP, KEY_SENDFILE, \ KEY_SYSRQ, KEY_F5, KEY_F6, KEY_F7, \ KEY_F8, KEY_VOLUMEDOWN, KEY_DEL_EOL, KEY_DEL_EOS, \ KEY_8, KEY_9, KEY_0, KEY_MINUS, \ KEY_EQUAL, KEY_BACKSPACE, KEY_INS_LINE, KEY_DEL_LINE, \ KEY_I, KEY_O, KEY_P, KEY_LEFTBRACE, \ KEY_RIGHTBRACE, KEY_BACKSLASH, KEY_INSERT, KEY_DELETE, \ KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \ KEY_APOSTROPHE, KEY_ENTER, KEY_HOME, KEY_PAGEUP, \ KEY_M, KEY_COMMA, KEY_DOT, KEY_SLASH, \ KEY_BACKSLASH, KEY_SELECT, KEY_102ND, KEY_PAGEDOWN, \ KEY_N, KEY_SPACE, KEY_NEXT, KEY_RESERVED, \ KEY_LEFT, KEY_DOWN, KEY_UP, KEY_RIGHT #define HIL_KEYCODES_SET3_TBLSIZE 128 #define HIL_KEYCODES_SET3 \ KEY_RESERVED, KEY_ESC, KEY_1, KEY_2, \ KEY_3, KEY_4, KEY_5, KEY_6, \ KEY_7, KEY_8, KEY_9, KEY_0, \ KEY_MINUS, KEY_EQUAL, KEY_BACKSPACE, KEY_TAB, \ KEY_Q, KEY_W, KEY_E, KEY_R, \ KEY_T, KEY_Y, KEY_U, KEY_I, \ KEY_O, KEY_P, KEY_LEFTBRACE, KEY_RIGHTBRACE, \ KEY_ENTER, KEY_LEFTCTRL, KEY_A, KEY_S, \ KEY_D, KEY_F, KEY_G, KEY_H, \ KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \ KEY_APOSTROPHE,KEY_GRAVE, KEY_LEFTSHIFT, KEY_BACKSLASH, \ KEY_Z, KEY_X, KEY_C, KEY_V, \ KEY_B, KEY_N, KEY_M, KEY_COMMA, \ KEY_DOT, KEY_SLASH, KEY_RIGHTSHIFT, KEY_KPASTERISK, \ KEY_LEFTALT, KEY_SPACE, KEY_CAPSLOCK, KEY_F1, \ KEY_F2, KEY_F3, KEY_F4, KEY_F5, \ KEY_F6, KEY_F7, KEY_F8, KEY_F9, \ KEY_F10, KEY_NUMLOCK, KEY_SCROLLLOCK, KEY_KP7, \ KEY_KP8, KEY_KP9, KEY_KPMINUS, KEY_KP4, \ KEY_KP5, KEY_KP6, KEY_KPPLUS, KEY_KP1, \ KEY_KP2, KEY_KP3, KEY_KP0, KEY_KPDOT, \ KEY_SYSRQ, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ KEY_UP, KEY_LEFT, KEY_DOWN, KEY_RIGHT, \ KEY_HOME, KEY_PAGEUP, KEY_END, KEY_PAGEDOWN, \ KEY_INSERT, KEY_DELETE, KEY_102ND, KEY_RESERVED, \ KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ KEY_F1, KEY_F2, KEY_F3, KEY_F4, \ KEY_F5, KEY_F6, KEY_F7, KEY_F8, \ KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \ KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED /* Response to POL command, the "poll record header" */ #define HIL_POL_NUM_AXES_MASK 0x03 /* Number of axis reported */ #define HIL_POL_CTS 0x04 /* Device ready to receive data */ #define HIL_POL_STATUS_PENDING 0x08 /* Device has status to report */ #define HIL_POL_CHARTYPE_MASK 0x70 /* Type of character data to follow */ #define HIL_POL_CHARTYPE_NONE 0x00 /* No character data to follow */ #define HIL_POL_CHARTYPE_RSVD1 0x10 /* Reserved Set 1 */ #define HIL_POL_CHARTYPE_ASCII 0x20 /* U.S. ASCII */ #define HIL_POL_CHARTYPE_BINARY 0x30 /* Binary data */ #define HIL_POL_CHARTYPE_SET1 0x40 /* Keycode Set 1 */ #define HIL_POL_CHARTYPE_RSVD2 0x50 /* Reserved Set 2 */ #define HIL_POL_CHARTYPE_SET2 0x60 /* Keycode Set 2 */ #define HIL_POL_CHARTYPE_SET3 0x70 /* Keycode Set 3 */ #define HIL_POL_AXIS_ALT 0x80 /* Data is from axis set 2 */ #endif /* _HIL_H_ */ PK ! �NJ�4 �4 compiler_attributes.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_COMPILER_ATTRIBUTES_H #define __LINUX_COMPILER_ATTRIBUTES_H /* * The attributes in this file are unconditionally defined and they directly * map to compiler attribute(s), unless one of the compilers does not support * the attribute. In that case, __has_attribute is used to check for support * and the reason is stated in its comment ("Optional: ..."). * * Any other "attributes" (i.e. those that depend on a configuration option, * on a compiler, on an architecture, on plugins, on other attributes...) * should be defined elsewhere (e.g. compiler_types.h or compiler-*.h). * The intention is to keep this file as simple as possible, as well as * compiler- and version-agnostic (e.g. avoiding GCC_VERSION checks). * * This file is meant to be sorted (by actual attribute name, * not by #define identifier). Use the __attribute__((__name__)) syntax * (i.e. with underscores) to avoid future collisions with other macros. * Provide links to the documentation of each supported compiler, if it exists. */ /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-alias-function-attribute */ #define __alias(symbol) __attribute__((__alias__(#symbol))) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-aligned-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-aligned-type-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-aligned-variable-attribute */ #define __aligned(x) __attribute__((__aligned__(x))) #define __aligned_largest __attribute__((__aligned__)) /* * Note: do not use this directly. Instead, use __alloc_size() since it is conditionally * available and includes other attributes. * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-alloc_005fsize-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#alloc-size */ #define __alloc_size__(x, ...) __attribute__((__alloc_size__(x, ## __VA_ARGS__))) /* * Note: users of __always_inline currently do not write "inline" themselves, * which seems to be required by gcc to apply the attribute according * to its docs (and also "warning: always_inline function might not be * inlinable [-Wattributes]" is emitted). * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-always_005finline-function-attribute * clang: mentioned */ #define __always_inline inline __attribute__((__always_inline__)) /* * The second argument is optional (default 0), so we use a variadic macro * to make the shorthand. * * Beware: Do not apply this to functions which may return * ERR_PTRs. Also, it is probably unwise to apply it to functions * returning extra information in the low bits (but in that case the * compiler should see some alignment anyway, when the return value is * massaged by 'flags = ptr & 3; ptr &= ~3;'). * * Optional: not supported by icc * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-assume_005faligned-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#assume-aligned */ #if __has_attribute(__assume_aligned__) # define __assume_aligned(a, ...) __attribute__((__assume_aligned__(a, ## __VA_ARGS__))) #else # define __assume_aligned(a, ...) #endif /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-cold-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Label-Attributes.html#index-cold-label-attribute */ #define __cold __attribute__((__cold__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-cleanup-variable-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#cleanup */ #define __cleanup(func) __attribute__((__cleanup__(func))) /* * Note the long name. * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-const-function-attribute */ #define __attribute_const__ __attribute__((__const__)) /* * Optional: only supported since gcc >= 9 * Optional: not supported by clang * Optional: not supported by icc * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-copy-function-attribute */ #if __has_attribute(__copy__) # define __copy(symbol) __attribute__((__copy__(symbol))) #else # define __copy(symbol) #endif /* * Don't. Just don't. See commit 771c035372a0 ("deprecate the '__deprecated' * attribute warnings entirely and for good") for more information. * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-deprecated-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-deprecated-type-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-deprecated-variable-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Enumerator-Attributes.html#index-deprecated-enumerator-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#deprecated */ #define __deprecated /* * Optional: only supported since gcc >= 5.1 * Optional: not supported by clang * Optional: not supported by icc * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-designated_005finit-type-attribute */ #if __has_attribute(__designated_init__) # define __designated_init __attribute__((__designated_init__)) #else # define __designated_init #endif /* * Optional: only supported since clang >= 14.0 * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-error-function-attribute */ #if __has_attribute(__error__) # define __compiletime_error(msg) __attribute__((__error__(msg))) #else # define __compiletime_error(msg) #endif /* * Optional: not supported by clang * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-externally_005fvisible-function-attribute */ #if __has_attribute(__externally_visible__) # define __visible __attribute__((__externally_visible__)) #else # define __visible #endif /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-format-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#format */ #define __printf(a, b) __attribute__((__format__(printf, a, b))) #define __scanf(a, b) __attribute__((__format__(scanf, a, b))) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-gnu_005finline-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#gnu-inline */ #define __gnu_inline __attribute__((__gnu_inline__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-malloc-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#malloc */ #define __malloc __attribute__((__malloc__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-mode-type-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-mode-variable-attribute */ #define __mode(x) __attribute__((__mode__(x))) /* * Optional: only supported since gcc >= 7 * * gcc: https://gcc.gnu.org/onlinedocs/gcc/x86-Function-Attributes.html#index-no_005fcaller_005fsaved_005fregisters-function-attribute_002c-x86 * clang: https://clang.llvm.org/docs/AttributeReference.html#no-caller-saved-registers */ #if __has_attribute(__no_caller_saved_registers__) # define __no_caller_saved_registers __attribute__((__no_caller_saved_registers__)) #else # define __no_caller_saved_registers #endif /* * Optional: not supported by clang * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-noclone-function-attribute */ #if __has_attribute(__noclone__) # define __noclone __attribute__((__noclone__)) #else # define __noclone #endif /* * Add the pseudo keyword 'fallthrough' so case statement blocks * must end with any of these keywords: * break; * fallthrough; * continue; * goto <label>; * return [expression]; * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html#Statement-Attributes */ #if __has_attribute(__fallthrough__) # define fallthrough __attribute__((__fallthrough__)) #else # define fallthrough do {} while (0) /* fallthrough */ #endif /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#Common-Function-Attributes * clang: https://clang.llvm.org/docs/AttributeReference.html#flatten */ # define __flatten __attribute__((flatten)) /* * Note the missing underscores. * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-noinline-function-attribute * clang: mentioned */ #define noinline __attribute__((__noinline__)) /* * Optional: only supported since gcc >= 8 * Optional: not supported by clang * Optional: not supported by icc * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-nonstring-variable-attribute */ #if __has_attribute(__nonstring__) # define __nonstring __attribute__((__nonstring__)) #else # define __nonstring #endif /* * Optional: only supported since GCC >= 7.1, clang >= 13.0. * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-no_005fprofile_005finstrument_005ffunction-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#no-profile-instrument-function */ #if __has_attribute(__no_profile_instrument_function__) # define __no_profile __attribute__((__no_profile_instrument_function__)) #else # define __no_profile #endif /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-noreturn-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#noreturn * clang: https://clang.llvm.org/docs/AttributeReference.html#id1 */ #define __noreturn __attribute__((__noreturn__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-packed-type-attribute * clang: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-packed-variable-attribute */ #define __packed __attribute__((__packed__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-pure-function-attribute */ #define __pure __attribute__((__pure__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-section-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-section-variable-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#section-declspec-allocate */ #define __section(section) __attribute__((__section__(section))) /* * Optional: only supported since gcc >= 12 * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-uninitialized-variable-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#uninitialized */ #if __has_attribute(__uninitialized__) # define __uninitialized __attribute__((__uninitialized__)) #else # define __uninitialized #endif /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-unused-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-unused-type-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-unused-variable-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Label-Attributes.html#index-unused-label-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#maybe-unused-unused */ #define __always_unused __attribute__((__unused__)) #define __maybe_unused __attribute__((__unused__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-used-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-used-variable-attribute */ #define __used __attribute__((__used__)) /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-warn_005funused_005fresult-function-attribute * clang: https://clang.llvm.org/docs/AttributeReference.html#nodiscard-warn-unused-result */ #define __must_check __attribute__((__warn_unused_result__)) /* * Optional: only supported since clang >= 14.0 * * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-warning-function-attribute */ #if __has_attribute(__warning__) # define __compiletime_warning(msg) __attribute__((__warning__(msg))) #else # define __compiletime_warning(msg) #endif /* * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-weak-function-attribute * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-weak-variable-attribute */ #define __weak __attribute__((__weak__)) #endif /* __LINUX_COMPILER_ATTRIBUTES_H */ PK ! ����~" ~" vringh.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Linux host-side vring helpers; for when the kernel needs to access * someone else's vring. * * Copyright IBM Corporation, 2013. * Parts taken from drivers/vhost/vhost.c Copyright 2009 Red Hat, Inc. * * Written by: Rusty Russell <rusty@rustcorp.com.au> */ #ifndef _LINUX_VRINGH_H #define _LINUX_VRINGH_H #include <uapi/linux/virtio_ring.h> #include <linux/virtio_byteorder.h> #include <linux/uio.h> #include <linux/slab.h> #include <linux/spinlock.h> #if IS_REACHABLE(CONFIG_VHOST_IOTLB) #include <linux/dma-direction.h> #include <linux/vhost_iotlb.h> #endif #include <asm/barrier.h> /* virtio_ring with information needed for host access. */ struct vringh { /* Everything is little endian */ bool little_endian; /* Guest publishes used event idx (note: we always do). */ bool event_indices; /* Can we get away with weak barriers? */ bool weak_barriers; /* Last available index we saw (ie. where we're up to). */ u16 last_avail_idx; /* Last index we used. */ u16 last_used_idx; /* How many descriptors we've completed since last need_notify(). */ u32 completed; /* The vring (note: it may contain user pointers!) */ struct vring vring; /* IOTLB for this vring */ struct vhost_iotlb *iotlb; /* spinlock to synchronize IOTLB accesses */ spinlock_t *iotlb_lock; /* The function to call to notify the guest about added buffers */ void (*notify)(struct vringh *); }; /** * struct vringh_config_ops - ops for creating a host vring from a virtio driver * @find_vrhs: find the host vrings and instantiate them * vdev: the virtio_device * nhvrs: the number of host vrings to find * hvrs: on success, includes new host vrings * callbacks: array of driver callbacks, for each host vring * include a NULL entry for vqs that do not need a callback * Returns 0 on success or error status * @del_vrhs: free the host vrings found by find_vrhs(). */ struct virtio_device; typedef void vrh_callback_t(struct virtio_device *, struct vringh *); struct vringh_config_ops { int (*find_vrhs)(struct virtio_device *vdev, unsigned nhvrs, struct vringh *vrhs[], vrh_callback_t *callbacks[]); void (*del_vrhs)(struct virtio_device *vdev); }; /* The memory the vring can access, and what offset to apply. */ struct vringh_range { u64 start, end_incl; u64 offset; }; /** * struct vringh_iov - iovec mangler. * * Mangles iovec in place, and restores it. * Remaining data is iov + i, of used - i elements. */ struct vringh_iov { struct iovec *iov; size_t consumed; /* Within iov[i] */ unsigned i, used, max_num; }; /** * struct vringh_iov - kvec mangler. * * Mangles kvec in place, and restores it. * Remaining data is iov + i, of used - i elements. */ struct vringh_kiov { struct kvec *iov; size_t consumed; /* Within iov[i] */ unsigned i, used, max_num; }; /* Flag on max_num to indicate we're kmalloced. */ #define VRINGH_IOV_ALLOCATED 0x8000000 /* Helpers for userspace vrings. */ int vringh_init_user(struct vringh *vrh, u64 features, unsigned int num, bool weak_barriers, vring_desc_t __user *desc, vring_avail_t __user *avail, vring_used_t __user *used); static inline void vringh_iov_init(struct vringh_iov *iov, struct iovec *iovec, unsigned num) { iov->used = iov->i = 0; iov->consumed = 0; iov->max_num = num; iov->iov = iovec; } static inline void vringh_iov_reset(struct vringh_iov *iov) { iov->iov[iov->i].iov_len += iov->consumed; iov->iov[iov->i].iov_base -= iov->consumed; iov->consumed = 0; iov->i = 0; } static inline void vringh_iov_cleanup(struct vringh_iov *iov) { if (iov->max_num & VRINGH_IOV_ALLOCATED) kfree(iov->iov); iov->max_num = iov->used = iov->i = iov->consumed = 0; iov->iov = NULL; } /* Convert a descriptor into iovecs. */ int vringh_getdesc_user(struct vringh *vrh, struct vringh_iov *riov, struct vringh_iov *wiov, bool (*getrange)(struct vringh *vrh, u64 addr, struct vringh_range *r), u16 *head); /* Copy bytes from readable vsg, consuming it (and incrementing wiov->i). */ ssize_t vringh_iov_pull_user(struct vringh_iov *riov, void *dst, size_t len); /* Copy bytes into writable vsg, consuming it (and incrementing wiov->i). */ ssize_t vringh_iov_push_user(struct vringh_iov *wiov, const void *src, size_t len); /* Mark a descriptor as used. */ int vringh_complete_user(struct vringh *vrh, u16 head, u32 len); int vringh_complete_multi_user(struct vringh *vrh, const struct vring_used_elem used[], unsigned num_used); /* Pretend we've never seen descriptor (for easy error handling). */ void vringh_abandon_user(struct vringh *vrh, unsigned int num); /* Do we need to fire the eventfd to notify the other side? */ int vringh_need_notify_user(struct vringh *vrh); bool vringh_notify_enable_user(struct vringh *vrh); void vringh_notify_disable_user(struct vringh *vrh); /* Helpers for kernelspace vrings. */ int vringh_init_kern(struct vringh *vrh, u64 features, unsigned int num, bool weak_barriers, struct vring_desc *desc, struct vring_avail *avail, struct vring_used *used); static inline void vringh_kiov_init(struct vringh_kiov *kiov, struct kvec *kvec, unsigned num) { kiov->used = kiov->i = 0; kiov->consumed = 0; kiov->max_num = num; kiov->iov = kvec; } static inline void vringh_kiov_reset(struct vringh_kiov *kiov) { kiov->iov[kiov->i].iov_len += kiov->consumed; kiov->iov[kiov->i].iov_base -= kiov->consumed; kiov->consumed = 0; kiov->i = 0; } static inline void vringh_kiov_cleanup(struct vringh_kiov *kiov) { if (kiov->max_num & VRINGH_IOV_ALLOCATED) kfree(kiov->iov); kiov->max_num = kiov->used = kiov->i = kiov->consumed = 0; kiov->iov = NULL; } static inline size_t vringh_kiov_length(struct vringh_kiov *kiov) { size_t len = 0; int i; for (i = kiov->i; i < kiov->used; i++) len += kiov->iov[i].iov_len; return len; } void vringh_kiov_advance(struct vringh_kiov *kiov, size_t len); int vringh_getdesc_kern(struct vringh *vrh, struct vringh_kiov *riov, struct vringh_kiov *wiov, u16 *head, gfp_t gfp); ssize_t vringh_iov_pull_kern(struct vringh_kiov *riov, void *dst, size_t len); ssize_t vringh_iov_push_kern(struct vringh_kiov *wiov, const void *src, size_t len); void vringh_abandon_kern(struct vringh *vrh, unsigned int num); int vringh_complete_kern(struct vringh *vrh, u16 head, u32 len); bool vringh_notify_enable_kern(struct vringh *vrh); void vringh_notify_disable_kern(struct vringh *vrh); int vringh_need_notify_kern(struct vringh *vrh); /* Notify the guest about buffers added to the used ring */ static inline void vringh_notify(struct vringh *vrh) { if (vrh->notify) vrh->notify(vrh); } static inline bool vringh_is_little_endian(const struct vringh *vrh) { return vrh->little_endian || virtio_legacy_is_little_endian(); } static inline u16 vringh16_to_cpu(const struct vringh *vrh, __virtio16 val) { return __virtio16_to_cpu(vringh_is_little_endian(vrh), val); } static inline __virtio16 cpu_to_vringh16(const struct vringh *vrh, u16 val) { return __cpu_to_virtio16(vringh_is_little_endian(vrh), val); } static inline u32 vringh32_to_cpu(const struct vringh *vrh, __virtio32 val) { return __virtio32_to_cpu(vringh_is_little_endian(vrh), val); } static inline __virtio32 cpu_to_vringh32(const struct vringh *vrh, u32 val) { return __cpu_to_virtio32(vringh_is_little_endian(vrh), val); } static inline u64 vringh64_to_cpu(const struct vringh *vrh, __virtio64 val) { return __virtio64_to_cpu(vringh_is_little_endian(vrh), val); } static inline __virtio64 cpu_to_vringh64(const struct vringh *vrh, u64 val) { return __cpu_to_virtio64(vringh_is_little_endian(vrh), val); } #if IS_REACHABLE(CONFIG_VHOST_IOTLB) void vringh_set_iotlb(struct vringh *vrh, struct vhost_iotlb *iotlb, spinlock_t *iotlb_lock); int vringh_init_iotlb(struct vringh *vrh, u64 features, unsigned int num, bool weak_barriers, struct vring_desc *desc, struct vring_avail *avail, struct vring_used *used); int vringh_getdesc_iotlb(struct vringh *vrh, struct vringh_kiov *riov, struct vringh_kiov *wiov, u16 *head, gfp_t gfp); ssize_t vringh_iov_pull_iotlb(struct vringh *vrh, struct vringh_kiov *riov, void *dst, size_t len); ssize_t vringh_iov_push_iotlb(struct vringh *vrh, struct vringh_kiov *wiov, const void *src, size_t len); void vringh_abandon_iotlb(struct vringh *vrh, unsigned int num); int vringh_complete_iotlb(struct vringh *vrh, u16 head, u32 len); bool vringh_notify_enable_iotlb(struct vringh *vrh); void vringh_notify_disable_iotlb(struct vringh *vrh); int vringh_need_notify_iotlb(struct vringh *vrh); #endif /* CONFIG_VHOST_IOTLB */ #endif /* _LINUX_VRINGH_H */ PK ! @� 7�' �' clocksource.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* linux/include/linux/clocksource.h * * This file contains the structure definitions for clocksources. * * If you are not a clocksource, or timekeeping code, you should * not be including this file! */ #ifndef _LINUX_CLOCKSOURCE_H #define _LINUX_CLOCKSOURCE_H #include <linux/types.h> #include <linux/timex.h> #include <linux/time.h> #include <linux/list.h> #include <linux/cache.h> #include <linux/timer.h> #include <linux/init.h> #include <linux/of.h> #include <linux/clocksource_ids.h> #include <asm/div64.h> #include <asm/io.h> struct clocksource; struct module; #if defined(CONFIG_ARCH_CLOCKSOURCE_DATA) || \ defined(CONFIG_GENERIC_GETTIMEOFDAY) #include <asm/clocksource.h> #endif #include <vdso/clocksource.h> /** * struct clocksource - hardware abstraction for a free running counter * Provides mostly state-free accessors to the underlying hardware. * This is the structure used for system time. * * @read: Returns a cycle value, passes clocksource as argument * @mask: Bitmask for two's complement * subtraction of non 64 bit counters * @mult: Cycle to nanosecond multiplier * @shift: Cycle to nanosecond divisor (power of two) * @max_idle_ns: Maximum idle time permitted by the clocksource (nsecs) * @maxadj: Maximum adjustment value to mult (~11%) * @uncertainty_margin: Maximum uncertainty in nanoseconds per half second. * Zero says to use default WATCHDOG_THRESHOLD. * @archdata: Optional arch-specific data * @max_cycles: Maximum safe cycle value which won't overflow on * multiplication * @name: Pointer to clocksource name * @list: List head for registration (internal) * @rating: Rating value for selection (higher is better) * To avoid rating inflation the following * list should give you a guide as to how * to assign your clocksource a rating * 1-99: Unfit for real use * Only available for bootup and testing purposes. * 100-199: Base level usability. * Functional for real use, but not desired. * 200-299: Good. * A correct and usable clocksource. * 300-399: Desired. * A reasonably fast and accurate clocksource. * 400-499: Perfect * The ideal clocksource. A must-use where * available. * @id: Defaults to CSID_GENERIC. The id value is captured * in certain snapshot functions to allow callers to * validate the clocksource from which the snapshot was * taken. * @flags: Flags describing special properties * @enable: Optional function to enable the clocksource * @disable: Optional function to disable the clocksource * @suspend: Optional suspend function for the clocksource * @resume: Optional resume function for the clocksource * @mark_unstable: Optional function to inform the clocksource driver that * the watchdog marked the clocksource unstable * @tick_stable: Optional function called periodically from the watchdog * code to provide stable synchronization points * @wd_list: List head to enqueue into the watchdog list (internal) * @cs_last: Last clocksource value for clocksource watchdog * @wd_last: Last watchdog value corresponding to @cs_last * @owner: Module reference, must be set by clocksource in modules * * Note: This struct is not used in hotpathes of the timekeeping code * because the timekeeper caches the hot path fields in its own data * structure, so no cache line alignment is required, * * The pointer to the clocksource itself is handed to the read * callback. If you need extra information there you can wrap struct * clocksource into your own struct. Depending on the amount of * information you need you should consider to cache line align that * structure. */ struct clocksource { u64 (*read)(struct clocksource *cs); u64 mask; u32 mult; u32 shift; u64 max_idle_ns; u32 maxadj; u32 uncertainty_margin; #ifdef CONFIG_ARCH_CLOCKSOURCE_DATA struct arch_clocksource_data archdata; #endif u64 max_cycles; const char *name; struct list_head list; int rating; enum clocksource_ids id; enum vdso_clock_mode vdso_clock_mode; unsigned long flags; int (*enable)(struct clocksource *cs); void (*disable)(struct clocksource *cs); void (*suspend)(struct clocksource *cs); void (*resume)(struct clocksource *cs); void (*mark_unstable)(struct clocksource *cs); void (*tick_stable)(struct clocksource *cs); /* private: */ #ifdef CONFIG_CLOCKSOURCE_WATCHDOG /* Watchdog related data, used by the framework */ struct list_head wd_list; u64 cs_last; u64 wd_last; #endif struct module *owner; }; /* * Clock source flags bits:: */ #define CLOCK_SOURCE_IS_CONTINUOUS 0x01 #define CLOCK_SOURCE_MUST_VERIFY 0x02 #define CLOCK_SOURCE_WATCHDOG 0x10 #define CLOCK_SOURCE_VALID_FOR_HRES 0x20 #define CLOCK_SOURCE_UNSTABLE 0x40 #define CLOCK_SOURCE_SUSPEND_NONSTOP 0x80 #define CLOCK_SOURCE_RESELECT 0x100 #define CLOCK_SOURCE_VERIFY_PERCPU 0x200 /* simplify initialization of mask field */ #define CLOCKSOURCE_MASK(bits) GENMASK_ULL((bits) - 1, 0) static inline u32 clocksource_freq2mult(u32 freq, u32 shift_constant, u64 from) { /* freq = cyc/from * mult/2^shift = ns/cyc * mult = ns/cyc * 2^shift * mult = from/freq * 2^shift * mult = from * 2^shift / freq * mult = (from<<shift) / freq */ u64 tmp = ((u64)from) << shift_constant; tmp += freq/2; /* round for do_div */ do_div(tmp, freq); return (u32)tmp; } /** * clocksource_khz2mult - calculates mult from khz and shift * @khz: Clocksource frequency in KHz * @shift_constant: Clocksource shift factor * * Helper functions that converts a khz counter frequency to a timsource * multiplier, given the clocksource shift value */ static inline u32 clocksource_khz2mult(u32 khz, u32 shift_constant) { return clocksource_freq2mult(khz, shift_constant, NSEC_PER_MSEC); } /** * clocksource_hz2mult - calculates mult from hz and shift * @hz: Clocksource frequency in Hz * @shift_constant: Clocksource shift factor * * Helper functions that converts a hz counter * frequency to a timsource multiplier, given the * clocksource shift value */ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant) { return clocksource_freq2mult(hz, shift_constant, NSEC_PER_SEC); } /** * clocksource_cyc2ns - converts clocksource cycles to nanoseconds * @cycles: cycles * @mult: cycle to nanosecond multiplier * @shift: cycle to nanosecond divisor (power of two) * * Converts clocksource cycles to nanoseconds, using the given @mult and @shift. * The code is optimized for performance and is not intended to work * with absolute clocksource cycles (as those will easily overflow), * but is only intended to be used with relative (delta) clocksource cycles. * * XXX - This could use some mult_lxl_ll() asm optimization */ static inline s64 clocksource_cyc2ns(u64 cycles, u32 mult, u32 shift) { return ((u64) cycles * mult) >> shift; } extern int clocksource_unregister(struct clocksource*); extern void clocksource_touch_watchdog(void); extern void clocksource_change_rating(struct clocksource *cs, int rating); extern void clocksource_suspend(void); extern void clocksource_resume(void); extern struct clocksource * __init clocksource_default_clock(void); extern void clocksource_mark_unstable(struct clocksource *cs); extern void clocksource_start_suspend_timing(struct clocksource *cs, u64 start_cycles); extern u64 clocksource_stop_suspend_timing(struct clocksource *cs, u64 now); extern u64 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles); extern void clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec); /* * Don't call __clocksource_register_scale directly, use * clocksource_register_hz/khz */ extern int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq); extern void __clocksource_update_freq_scale(struct clocksource *cs, u32 scale, u32 freq); /* * Don't call this unless you are a default clocksource * (AKA: jiffies) and absolutely have to. */ static inline int __clocksource_register(struct clocksource *cs) { return __clocksource_register_scale(cs, 1, 0); } static inline int clocksource_register_hz(struct clocksource *cs, u32 hz) { return __clocksource_register_scale(cs, 1, hz); } static inline int clocksource_register_khz(struct clocksource *cs, u32 khz) { return __clocksource_register_scale(cs, 1000, khz); } static inline void __clocksource_update_freq_hz(struct clocksource *cs, u32 hz) { __clocksource_update_freq_scale(cs, 1, hz); } static inline void __clocksource_update_freq_khz(struct clocksource *cs, u32 khz) { __clocksource_update_freq_scale(cs, 1000, khz); } #ifdef CONFIG_ARCH_CLOCKSOURCE_INIT extern void clocksource_arch_init(struct clocksource *cs); #else static inline void clocksource_arch_init(struct clocksource *cs) { } #endif extern int timekeeping_notify(struct clocksource *clock); extern u64 clocksource_mmio_readl_up(struct clocksource *); extern u64 clocksource_mmio_readl_down(struct clocksource *); extern u64 clocksource_mmio_readw_up(struct clocksource *); extern u64 clocksource_mmio_readw_down(struct clocksource *); extern int clocksource_mmio_init(void __iomem *, const char *, unsigned long, int, unsigned, u64 (*)(struct clocksource *)); extern int clocksource_i8253_init(void); #define TIMER_OF_DECLARE(name, compat, fn) \ OF_DECLARE_1_RET(timer, name, compat, fn) #ifdef CONFIG_TIMER_PROBE extern void timer_probe(void); #else static inline void timer_probe(void) {} #endif #define TIMER_ACPI_DECLARE(name, table_id, fn) \ ACPI_DECLARE_PROBE_ENTRY(timer, name, table_id, 0, NULL, 0, fn) static inline unsigned int clocksource_get_max_watchdog_retry(void) { /* * When system is in the boot phase or under heavy workload, there * can be random big latencies during the clocksource/watchdog * read, so allow retries to filter the noise latency. As the * latency's frequency and maximum value goes up with the number of * CPUs, scale the number of retries with the number of online * CPUs. */ return (ilog2(num_online_cpus()) / 2) + 1; } void clocksource_verify_percpu(struct clocksource *cs); #endif /* _LINUX_CLOCKSOURCE_H */ PK ! x�b�9� 9� iommu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. * Author: Joerg Roedel <joerg.roedel@amd.com> */ #ifndef __LINUX_IOMMU_H #define __LINUX_IOMMU_H #include <linux/scatterlist.h> #include <linux/device.h> #include <linux/types.h> #include <linux/errno.h> #include <linux/err.h> #include <linux/of.h> #include <linux/ioasid.h> #include <uapi/linux/iommu.h> #define IOMMU_READ (1 << 0) #define IOMMU_WRITE (1 << 1) #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ #define IOMMU_NOEXEC (1 << 3) #define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */ /* * Where the bus hardware includes a privilege level as part of its access type * markings, and certain devices are capable of issuing transactions marked as * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other * given permission flags only apply to accesses at the higher privilege level, * and that unprivileged transactions should have as little access as possible. * This would usually imply the same permissions as kernel mappings on the CPU, * if the IOMMU page table format is equivalent. */ #define IOMMU_PRIV (1 << 5) struct iommu_ops; struct iommu_group; struct bus_type; struct device; struct iommu_domain; struct notifier_block; struct iommu_sva; struct iommu_fault_event; struct iommu_dma_cookie; /* iommu fault flags */ #define IOMMU_FAULT_READ 0x0 #define IOMMU_FAULT_WRITE 0x1 typedef int (*iommu_fault_handler_t)(struct iommu_domain *, struct device *, unsigned long, int, void *); typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *); struct iommu_domain_geometry { dma_addr_t aperture_start; /* First address that can be mapped */ dma_addr_t aperture_end; /* Last address that can be mapped */ bool force_aperture; /* DMA only allowed in mappable range? */ }; /* Domain feature flags */ #define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */ #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API implementation */ #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ #define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */ /* * This are the possible domain-types * * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate * devices * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used * for VMs * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations. * This flag allows IOMMU drivers to implement * certain optimizations for these domains * IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB * invalidation. */ #define IOMMU_DOMAIN_BLOCKED (0U) #define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) #define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING) #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API) #define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API | \ __IOMMU_DOMAIN_DMA_FQ) struct iommu_domain { unsigned type; const struct iommu_ops *ops; unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ iommu_fault_handler_t handler; void *handler_token; struct iommu_domain_geometry geometry; struct iommu_dma_cookie *iova_cookie; }; static inline bool iommu_is_dma_domain(struct iommu_domain *domain) { return domain->type & __IOMMU_DOMAIN_DMA_API; } enum iommu_cap { IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA transactions */ IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ }; /* These are the possible reserved region types */ enum iommu_resv_type { /* Memory regions which must be mapped 1:1 at all times */ IOMMU_RESV_DIRECT, /* * Memory regions which are advertised to be 1:1 but are * commonly considered relaxable in some conditions, * for instance in device assignment use case (USB, Graphics) */ IOMMU_RESV_DIRECT_RELAXABLE, /* Arbitrary "never map this or give it to a device" address ranges */ IOMMU_RESV_RESERVED, /* Hardware MSI region (untranslated) */ IOMMU_RESV_MSI, /* Software-managed MSI translation window */ IOMMU_RESV_SW_MSI, }; /** * struct iommu_resv_region - descriptor for a reserved memory region * @list: Linked list pointers * @start: System physical start address of the region * @length: Length of the region in bytes * @prot: IOMMU Protection flags (READ/WRITE/...) * @type: Type of the reserved region */ struct iommu_resv_region { struct list_head list; phys_addr_t start; size_t length; int prot; enum iommu_resv_type type; }; /** * enum iommu_dev_features - Per device IOMMU features * @IOMMU_DEV_FEAT_AUX: Auxiliary domain feature * @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally * enabling %IOMMU_DEV_FEAT_SVA requires * %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page * Faults themselves instead of relying on the IOMMU. When * supported, this feature must be enabled before and * disabled after %IOMMU_DEV_FEAT_SVA. * * Device drivers query whether a feature is supported using * iommu_dev_has_feature(), and enable it using iommu_dev_enable_feature(). */ enum iommu_dev_features { IOMMU_DEV_FEAT_AUX, IOMMU_DEV_FEAT_SVA, IOMMU_DEV_FEAT_IOPF, }; #define IOMMU_PASID_INVALID (-1U) #ifdef CONFIG_IOMMU_API /** * struct iommu_iotlb_gather - Range information for a pending IOTLB flush * * @start: IOVA representing the start of the range to be flushed * @end: IOVA representing the end of the range to be flushed (inclusive) * @pgsize: The interval at which to perform the flush * @freelist: Removed pages to free after sync * @queued: Indicates that the flush will be queued * * This structure is intended to be updated by multiple calls to the * ->unmap() function in struct iommu_ops before eventually being passed * into ->iotlb_sync(). Drivers can add pages to @freelist to be freed after * ->iotlb_sync() or ->iotlb_flush_all() have cleared all cached references to * them. @queued is set to indicate when ->iotlb_flush_all() will be called * later instead of ->iotlb_sync(), so drivers may optimise accordingly. */ struct iommu_iotlb_gather { unsigned long start; unsigned long end; size_t pgsize; struct page *freelist; bool queued; }; /** * struct iommu_ops - iommu ops and capabilities * @capable: check capability * @domain_alloc: allocate iommu domain * @domain_free: free iommu domain * @attach_dev: attach device to an iommu domain * @detach_dev: detach device from an iommu domain * @map: map a physically contiguous memory region to an iommu domain * @map_pages: map a physically contiguous set of pages of the same size to * an iommu domain. * @unmap: unmap a physically contiguous memory region from an iommu domain * @unmap_pages: unmap a number of pages of the same size from an iommu domain * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain * @iotlb_sync_map: Sync mappings created recently using @map to the hardware * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush * queue * @iova_to_phys: translate iova to physical address * @probe_device: Add device to iommu driver handling * @release_device: Remove device from iommu driver handling * @probe_finalize: Do final setup work after the device is added to an IOMMU * group and attached to the groups domain * @device_group: find iommu group for a particular device * @enable_nesting: Enable nesting * @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*) * @get_resv_regions: Request list of reserved regions for a device * @put_resv_regions: Free list of reserved regions for a device * @apply_resv_region: Temporary helper call-back for iova reserved ranges * @of_xlate: add OF master IDs to iommu grouping * @is_attach_deferred: Check if domain attach should be deferred from iommu * driver init to device driver init (default no) * @dev_has/enable/disable_feat: per device entries to check/enable/disable * iommu specific features. * @dev_feat_enabled: check enabled feature * @aux_attach/detach_dev: aux-domain specific attach/detach entries. * @aux_get_pasid: get the pasid given an aux-domain * @sva_bind: Bind process address space to device * @sva_unbind: Unbind process address space from device * @sva_get_pasid: Get PASID associated to a SVA handle * @page_response: handle page request response * @cache_invalidate: invalidate translation caches * @sva_bind_gpasid: bind guest pasid and mm * @sva_unbind_gpasid: unbind guest pasid and mm * @def_domain_type: device default domain type, return value: * - IOMMU_DOMAIN_IDENTITY: must use an identity domain * - IOMMU_DOMAIN_DMA: must use a dma domain * - 0: use the default setting * @pgsize_bitmap: bitmap of all possible supported page sizes * @owner: Driver module providing these ops */ struct iommu_ops { bool (*capable)(enum iommu_cap); /* Domain allocation and freeing by the iommu driver */ struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); void (*domain_free)(struct iommu_domain *); int (*attach_dev)(struct iommu_domain *domain, struct device *dev); void (*detach_dev)(struct iommu_domain *domain, struct device *dev); int (*map)(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot, gfp_t gfp); int (*map_pages)(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t pgsize, size_t pgcount, int prot, gfp_t gfp, size_t *mapped); size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, size_t size, struct iommu_iotlb_gather *iotlb_gather); size_t (*unmap_pages)(struct iommu_domain *domain, unsigned long iova, size_t pgsize, size_t pgcount, struct iommu_iotlb_gather *iotlb_gather); void (*flush_iotlb_all)(struct iommu_domain *domain); void (*iotlb_sync_map)(struct iommu_domain *domain, unsigned long iova, size_t size); void (*iotlb_sync)(struct iommu_domain *domain, struct iommu_iotlb_gather *iotlb_gather); phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); struct iommu_device *(*probe_device)(struct device *dev); void (*release_device)(struct device *dev); void (*probe_finalize)(struct device *dev); struct iommu_group *(*device_group)(struct device *dev); int (*enable_nesting)(struct iommu_domain *domain); int (*set_pgtable_quirks)(struct iommu_domain *domain, unsigned long quirks); /* Request/Free a list of reserved regions for a device */ void (*get_resv_regions)(struct device *dev, struct list_head *list); void (*put_resv_regions)(struct device *dev, struct list_head *list); void (*apply_resv_region)(struct device *dev, struct iommu_domain *domain, struct iommu_resv_region *region); int (*of_xlate)(struct device *dev, struct of_phandle_args *args); bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev); /* Per device IOMMU features */ bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f); bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f); int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f); int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f); /* Aux-domain specific attach/detach entries */ int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev); void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev); int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev); struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm, void *drvdata); void (*sva_unbind)(struct iommu_sva *handle); u32 (*sva_get_pasid)(struct iommu_sva *handle); int (*page_response)(struct device *dev, struct iommu_fault_event *evt, struct iommu_page_response *msg); int (*cache_invalidate)(struct iommu_domain *domain, struct device *dev, struct iommu_cache_invalidate_info *inv_info); int (*sva_bind_gpasid)(struct iommu_domain *domain, struct device *dev, struct iommu_gpasid_bind_data *data); int (*sva_unbind_gpasid)(struct device *dev, u32 pasid); int (*def_domain_type)(struct device *dev); unsigned long pgsize_bitmap; struct module *owner; }; /** * struct iommu_device - IOMMU core representation of one IOMMU hardware * instance * @list: Used by the iommu-core to keep a list of registered iommus * @ops: iommu-ops for talking to this iommu * @dev: struct device for sysfs handling */ struct iommu_device { struct list_head list; const struct iommu_ops *ops; struct fwnode_handle *fwnode; struct device *dev; }; /** * struct iommu_fault_event - Generic fault event * * Can represent recoverable faults such as a page requests or * unrecoverable faults such as DMA or IRQ remapping faults. * * @fault: fault descriptor * @list: pending fault event list, used for tracking responses */ struct iommu_fault_event { struct iommu_fault fault; struct list_head list; }; /** * struct iommu_fault_param - per-device IOMMU fault data * @handler: Callback function to handle IOMMU faults at device level * @data: handler private data * @faults: holds the pending faults which needs response * @lock: protect pending faults list */ struct iommu_fault_param { iommu_dev_fault_handler_t handler; void *data; struct list_head faults; struct mutex lock; }; /** * struct dev_iommu - Collection of per-device IOMMU data * * @fault_param: IOMMU detected device fault reporting data * @iopf_param: I/O Page Fault queue and data * @fwspec: IOMMU fwspec data * @iommu_dev: IOMMU device this device is linked to * @priv: IOMMU Driver private data * * TODO: migrate other per device data pointers under iommu_dev_data, e.g. * struct iommu_group *iommu_group; */ struct dev_iommu { struct mutex lock; struct iommu_fault_param *fault_param; struct iopf_device_param *iopf_param; struct iommu_fwspec *fwspec; struct iommu_device *iommu_dev; void *priv; }; int iommu_device_register(struct iommu_device *iommu, const struct iommu_ops *ops, struct device *hwdev); void iommu_device_unregister(struct iommu_device *iommu); int iommu_device_sysfs_add(struct iommu_device *iommu, struct device *parent, const struct attribute_group **groups, const char *fmt, ...) __printf(4, 5); void iommu_device_sysfs_remove(struct iommu_device *iommu); int iommu_device_link(struct iommu_device *iommu, struct device *link); void iommu_device_unlink(struct iommu_device *iommu, struct device *link); int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain); static inline struct iommu_device *dev_to_iommu_device(struct device *dev) { return (struct iommu_device *)dev_get_drvdata(dev); } static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather) { *gather = (struct iommu_iotlb_gather) { .start = ULONG_MAX, }; } #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops); extern int bus_iommu_probe(struct bus_type *bus); extern bool iommu_present(struct bus_type *bus); extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap); extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); extern struct iommu_group *iommu_group_get_by_id(int id); extern void iommu_domain_free(struct iommu_domain *domain); extern int iommu_attach_device(struct iommu_domain *domain, struct device *dev); extern void iommu_detach_device(struct iommu_domain *domain, struct device *dev); extern int iommu_uapi_cache_invalidate(struct iommu_domain *domain, struct device *dev, void __user *uinfo); extern int iommu_uapi_sva_bind_gpasid(struct iommu_domain *domain, struct device *dev, void __user *udata); extern int iommu_uapi_sva_unbind_gpasid(struct iommu_domain *domain, struct device *dev, void __user *udata); extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid); extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); extern struct iommu_domain *iommu_get_dma_domain(struct device *dev); extern int iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot); extern int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot); extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size); extern size_t iommu_unmap_fast(struct iommu_domain *domain, unsigned long iova, size_t size, struct iommu_iotlb_gather *iotlb_gather); extern ssize_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova, struct scatterlist *sg, unsigned int nents, int prot); extern ssize_t iommu_map_sg_atomic(struct iommu_domain *domain, unsigned long iova, struct scatterlist *sg, unsigned int nents, int prot); extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); extern void iommu_set_fault_handler(struct iommu_domain *domain, iommu_fault_handler_t handler, void *token); extern void iommu_get_resv_regions(struct device *dev, struct list_head *list); extern void iommu_put_resv_regions(struct device *dev, struct list_head *list); extern void generic_iommu_put_resv_regions(struct device *dev, struct list_head *list); extern void iommu_set_default_passthrough(bool cmd_line); extern void iommu_set_default_translated(bool cmd_line); extern bool iommu_default_passthrough(void); extern struct iommu_resv_region * iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot, enum iommu_resv_type type); extern int iommu_get_group_resv_regions(struct iommu_group *group, struct list_head *head); extern int iommu_attach_group(struct iommu_domain *domain, struct iommu_group *group); extern void iommu_detach_group(struct iommu_domain *domain, struct iommu_group *group); extern struct iommu_group *iommu_group_alloc(void); extern void *iommu_group_get_iommudata(struct iommu_group *group); extern void iommu_group_set_iommudata(struct iommu_group *group, void *iommu_data, void (*release)(void *iommu_data)); extern int iommu_group_set_name(struct iommu_group *group, const char *name); extern int iommu_group_add_device(struct iommu_group *group, struct device *dev); extern void iommu_group_remove_device(struct device *dev); extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, int (*fn)(struct device *, void *)); extern struct iommu_group *iommu_group_get(struct device *dev); extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group); extern void iommu_group_put(struct iommu_group *group); extern int iommu_group_register_notifier(struct iommu_group *group, struct notifier_block *nb); extern int iommu_group_unregister_notifier(struct iommu_group *group, struct notifier_block *nb); extern int iommu_register_device_fault_handler(struct device *dev, iommu_dev_fault_handler_t handler, void *data); extern int iommu_unregister_device_fault_handler(struct device *dev); extern int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt); extern int iommu_page_response(struct device *dev, struct iommu_page_response *msg); extern int iommu_group_id(struct iommu_group *group); extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *); int iommu_enable_nesting(struct iommu_domain *domain); int iommu_set_pgtable_quirks(struct iommu_domain *domain, unsigned long quirks); void iommu_set_dma_strict(void); extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags); static inline void iommu_flush_iotlb_all(struct iommu_domain *domain) { if (domain->ops->flush_iotlb_all) domain->ops->flush_iotlb_all(domain); } static inline void iommu_iotlb_sync(struct iommu_domain *domain, struct iommu_iotlb_gather *iotlb_gather) { if (domain->ops->iotlb_sync) domain->ops->iotlb_sync(domain, iotlb_gather); iommu_iotlb_gather_init(iotlb_gather); } /** * iommu_iotlb_gather_is_disjoint - Checks whether a new range is disjoint * * @gather: TLB gather data * @iova: start of page to invalidate * @size: size of page to invalidate * * Helper for IOMMU drivers to check whether a new range and the gathered range * are disjoint. For many IOMMUs, flushing the IOMMU in this case is better * than merging the two, which might lead to unnecessary invalidations. */ static inline bool iommu_iotlb_gather_is_disjoint(struct iommu_iotlb_gather *gather, unsigned long iova, size_t size) { unsigned long start = iova, end = start + size - 1; return gather->end != 0 && (end + 1 < gather->start || start > gather->end + 1); } /** * iommu_iotlb_gather_add_range - Gather for address-based TLB invalidation * @gather: TLB gather data * @iova: start of page to invalidate * @size: size of page to invalidate * * Helper for IOMMU drivers to build arbitrarily-sized invalidation commands * where only the address range matters, and simply minimising intermediate * syncs is preferred. */ static inline void iommu_iotlb_gather_add_range(struct iommu_iotlb_gather *gather, unsigned long iova, size_t size) { unsigned long end = iova + size - 1; if (gather->start > iova) gather->start = iova; if (gather->end < end) gather->end = end; } /** * iommu_iotlb_gather_add_page - Gather for page-based TLB invalidation * @domain: IOMMU domain to be invalidated * @gather: TLB gather data * @iova: start of page to invalidate * @size: size of page to invalidate * * Helper for IOMMU drivers to build invalidation commands based on individual * pages, or with page size/table level hints which cannot be gathered if they * differ. */ static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, struct iommu_iotlb_gather *gather, unsigned long iova, size_t size) { /* * If the new page is disjoint from the current range or is mapped at * a different granularity, then sync the TLB so that the gather * structure can be rewritten. */ if ((gather->pgsize && gather->pgsize != size) || iommu_iotlb_gather_is_disjoint(gather, iova, size)) iommu_iotlb_sync(domain, gather); gather->pgsize = size; iommu_iotlb_gather_add_range(gather, iova, size); } static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather) { return gather && gather->queued; } /* PCI device grouping function */ extern struct iommu_group *pci_device_group(struct device *dev); /* Generic device grouping function */ extern struct iommu_group *generic_device_group(struct device *dev); /* FSL-MC device grouping function */ struct iommu_group *fsl_mc_device_group(struct device *dev); /** * struct iommu_fwspec - per-device IOMMU instance data * @ops: ops for this device's IOMMU * @iommu_fwnode: firmware handle for this device's IOMMU * @flags: IOMMU_FWSPEC_* flags * @num_ids: number of associated device IDs * @ids: IDs which this device may present to the IOMMU */ struct iommu_fwspec { const struct iommu_ops *ops; struct fwnode_handle *iommu_fwnode; u32 flags; unsigned int num_ids; u32 ids[]; }; /* ATS is supported */ #define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0) /** * struct iommu_sva - handle to a device-mm bond */ struct iommu_sva { struct device *dev; }; int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, const struct iommu_ops *ops); void iommu_fwspec_free(struct device *dev); int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids); const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode); static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) { if (dev->iommu) return dev->iommu->fwspec; else return NULL; } static inline void dev_iommu_fwspec_set(struct device *dev, struct iommu_fwspec *fwspec) { dev->iommu->fwspec = fwspec; } static inline void *dev_iommu_priv_get(struct device *dev) { if (dev->iommu) return dev->iommu->priv; else return NULL; } static inline void dev_iommu_priv_set(struct device *dev, void *priv) { dev->iommu->priv = priv; } int iommu_probe_device(struct device *dev); void iommu_release_device(struct device *dev); int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f); int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f); bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f); int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev); void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev); int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev); struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata); void iommu_sva_unbind_device(struct iommu_sva *handle); u32 iommu_sva_get_pasid(struct iommu_sva *handle); #else /* CONFIG_IOMMU_API */ struct iommu_ops {}; struct iommu_group {}; struct iommu_fwspec {}; struct iommu_device {}; struct iommu_fault_param {}; struct iommu_iotlb_gather {}; static inline bool iommu_present(struct bus_type *bus) { return false; } static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap) { return false; } static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) { return NULL; } static inline struct iommu_group *iommu_group_get_by_id(int id) { return NULL; } static inline void iommu_domain_free(struct iommu_domain *domain) { } static inline int iommu_attach_device(struct iommu_domain *domain, struct device *dev) { return -ENODEV; } static inline void iommu_detach_device(struct iommu_domain *domain, struct device *dev) { } static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev) { return NULL; } static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot) { return -ENODEV; } static inline int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot) { return -ENODEV; } static inline size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size) { return 0; } static inline size_t iommu_unmap_fast(struct iommu_domain *domain, unsigned long iova, int gfp_order, struct iommu_iotlb_gather *iotlb_gather) { return 0; } static inline ssize_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova, struct scatterlist *sg, unsigned int nents, int prot) { return -ENODEV; } static inline ssize_t iommu_map_sg_atomic(struct iommu_domain *domain, unsigned long iova, struct scatterlist *sg, unsigned int nents, int prot) { return -ENODEV; } static inline void iommu_flush_iotlb_all(struct iommu_domain *domain) { } static inline void iommu_iotlb_sync(struct iommu_domain *domain, struct iommu_iotlb_gather *iotlb_gather) { } static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) { return 0; } static inline void iommu_set_fault_handler(struct iommu_domain *domain, iommu_fault_handler_t handler, void *token) { } static inline void iommu_get_resv_regions(struct device *dev, struct list_head *list) { } static inline void iommu_put_resv_regions(struct device *dev, struct list_head *list) { } static inline int iommu_get_group_resv_regions(struct iommu_group *group, struct list_head *head) { return -ENODEV; } static inline void iommu_set_default_passthrough(bool cmd_line) { } static inline void iommu_set_default_translated(bool cmd_line) { } static inline bool iommu_default_passthrough(void) { return true; } static inline int iommu_attach_group(struct iommu_domain *domain, struct iommu_group *group) { return -ENODEV; } static inline void iommu_detach_group(struct iommu_domain *domain, struct iommu_group *group) { } static inline struct iommu_group *iommu_group_alloc(void) { return ERR_PTR(-ENODEV); } static inline void *iommu_group_get_iommudata(struct iommu_group *group) { return NULL; } static inline void iommu_group_set_iommudata(struct iommu_group *group, void *iommu_data, void (*release)(void *iommu_data)) { } static inline int iommu_group_set_name(struct iommu_group *group, const char *name) { return -ENODEV; } static inline int iommu_group_add_device(struct iommu_group *group, struct device *dev) { return -ENODEV; } static inline void iommu_group_remove_device(struct device *dev) { } static inline int iommu_group_for_each_dev(struct iommu_group *group, void *data, int (*fn)(struct device *, void *)) { return -ENODEV; } static inline struct iommu_group *iommu_group_get(struct device *dev) { return NULL; } static inline void iommu_group_put(struct iommu_group *group) { } static inline int iommu_group_register_notifier(struct iommu_group *group, struct notifier_block *nb) { return -ENODEV; } static inline int iommu_group_unregister_notifier(struct iommu_group *group, struct notifier_block *nb) { return 0; } static inline int iommu_register_device_fault_handler(struct device *dev, iommu_dev_fault_handler_t handler, void *data) { return -ENODEV; } static inline int iommu_unregister_device_fault_handler(struct device *dev) { return 0; } static inline int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt) { return -ENODEV; } static inline int iommu_page_response(struct device *dev, struct iommu_page_response *msg) { return -ENODEV; } static inline int iommu_group_id(struct iommu_group *group) { return -ENODEV; } static inline int iommu_set_pgtable_quirks(struct iommu_domain *domain, unsigned long quirks) { return 0; } static inline int iommu_device_register(struct iommu_device *iommu, const struct iommu_ops *ops, struct device *hwdev) { return -ENODEV; } static inline struct iommu_device *dev_to_iommu_device(struct device *dev) { return NULL; } static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather) { } static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, struct iommu_iotlb_gather *gather, unsigned long iova, size_t size) { } static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather) { return false; } static inline void iommu_device_unregister(struct iommu_device *iommu) { } static inline int iommu_device_sysfs_add(struct iommu_device *iommu, struct device *parent, const struct attribute_group **groups, const char *fmt, ...) { return -ENODEV; } static inline void iommu_device_sysfs_remove(struct iommu_device *iommu) { } static inline int iommu_device_link(struct device *dev, struct device *link) { return -EINVAL; } static inline void iommu_device_unlink(struct device *dev, struct device *link) { } static inline int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, const struct iommu_ops *ops) { return -ENODEV; } static inline void iommu_fwspec_free(struct device *dev) { } static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids) { return -ENODEV; } static inline const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode) { return NULL; } static inline bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat) { return false; } static inline int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat) { return -ENODEV; } static inline int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat) { return -ENODEV; } static inline int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev) { return -ENODEV; } static inline void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev) { } static inline int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev) { return -ENODEV; } static inline struct iommu_sva * iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata) { return ERR_PTR(-ENODEV); } static inline void iommu_sva_unbind_device(struct iommu_sva *handle) { } static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle) { return IOMMU_PASID_INVALID; } static inline int iommu_uapi_cache_invalidate(struct iommu_domain *domain, struct device *dev, struct iommu_cache_invalidate_info *inv_info) { return -ENODEV; } static inline int iommu_uapi_sva_bind_gpasid(struct iommu_domain *domain, struct device *dev, void __user *udata) { return -ENODEV; } static inline int iommu_uapi_sva_unbind_gpasid(struct iommu_domain *domain, struct device *dev, void __user *udata) { return -ENODEV; } static inline int iommu_sva_unbind_gpasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid) { return -ENODEV; } static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) { return NULL; } #endif /* CONFIG_IOMMU_API */ /** * iommu_map_sgtable - Map the given buffer to the IOMMU domain * @domain: The IOMMU domain to perform the mapping * @iova: The start address to map the buffer * @sgt: The sg_table object describing the buffer * @prot: IOMMU protection bits * * Creates a mapping at @iova for the buffer described by a scatterlist * stored in the given sg_table object in the provided IOMMU domain. */ static inline size_t iommu_map_sgtable(struct iommu_domain *domain, unsigned long iova, struct sg_table *sgt, int prot) { return iommu_map_sg(domain, iova, sgt->sgl, sgt->orig_nents, prot); } #ifdef CONFIG_IOMMU_DEBUGFS extern struct dentry *iommu_debugfs_dir; void iommu_debugfs_setup(void); #else static inline void iommu_debugfs_setup(void) {} #endif #endif /* __LINUX_IOMMU_H */ PK ! �5f�� � dma/qcom-gpi-dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2020, Linaro Limited */ #ifndef QCOM_GPI_DMA_H #define QCOM_GPI_DMA_H /** * enum spi_transfer_cmd - spi transfer commands */ enum spi_transfer_cmd { SPI_TX = 1, SPI_RX, SPI_DUPLEX, }; /** * struct gpi_spi_config - spi config for peripheral * * @loopback_en: spi loopback enable when set * @clock_pol_high: clock polarity * @data_pol_high: data polarity * @pack_en: process tx/rx buffers as packed * @word_len: spi word length * @clk_div: source clock divider * @clk_src: serial clock * @cmd: spi cmd * @fragmentation: keep CS assserted at end of sequence * @cs: chip select toggle * @set_config: set peripheral config * @rx_len: receive length for buffer */ struct gpi_spi_config { u8 set_config; u8 loopback_en; u8 clock_pol_high; u8 data_pol_high; u8 pack_en; u8 word_len; u8 fragmentation; u8 cs; u32 clk_div; u32 clk_src; enum spi_transfer_cmd cmd; u32 rx_len; }; enum i2c_op { I2C_WRITE = 1, I2C_READ, }; /** * struct gpi_i2c_config - i2c config for peripheral * * @pack_enable: process tx/rx buffers as packed * @cycle_count: clock cycles to be sent * @high_count: high period of clock * @low_count: low period of clock * @clk_div: source clock divider * @addr: i2c bus address * @stretch: stretch the clock at eot * @set_config: set peripheral config * @rx_len: receive length for buffer * @op: i2c cmd * @muli-msg: is part of multi i2c r-w msgs */ struct gpi_i2c_config { u8 set_config; u8 pack_enable; u8 cycle_count; u8 high_count; u8 low_count; u8 addr; u8 stretch; u16 clk_div; u32 rx_len; enum i2c_op op; bool multi_msg; }; #endif /* QCOM_GPI_DMA_H */ PK ! �[�_� � dma/k3-udma-glue.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_UDMA_GLUE_H_ #define K3_UDMA_GLUE_H_ #include <linux/types.h> #include <linux/soc/ti/k3-ringacc.h> #include <linux/dma/ti-cppi5.h> struct k3_udma_glue_tx_channel_cfg { struct k3_ring_cfg tx_cfg; struct k3_ring_cfg txcq_cfg; bool tx_pause_on_err; bool tx_filt_einfo; bool tx_filt_pswords; bool tx_supr_tdpkt; u32 swdata_size; }; struct k3_udma_glue_tx_channel; struct k3_udma_glue_tx_channel *k3_udma_glue_request_tx_chn(struct device *dev, const char *name, struct k3_udma_glue_tx_channel_cfg *cfg); void k3_udma_glue_release_tx_chn(struct k3_udma_glue_tx_channel *tx_chn); int k3_udma_glue_push_tx_chn(struct k3_udma_glue_tx_channel *tx_chn, struct cppi5_host_desc_t *desc_tx, dma_addr_t desc_dma); int k3_udma_glue_pop_tx_chn(struct k3_udma_glue_tx_channel *tx_chn, dma_addr_t *desc_dma); int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn); void k3_udma_glue_disable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn); void k3_udma_glue_tdown_tx_chn(struct k3_udma_glue_tx_channel *tx_chn, bool sync); void k3_udma_glue_reset_tx_chn(struct k3_udma_glue_tx_channel *tx_chn, void *data, void (*cleanup)(void *data, dma_addr_t desc_dma)); u32 k3_udma_glue_tx_get_hdesc_size(struct k3_udma_glue_tx_channel *tx_chn); u32 k3_udma_glue_tx_get_txcq_id(struct k3_udma_glue_tx_channel *tx_chn); int k3_udma_glue_tx_get_irq(struct k3_udma_glue_tx_channel *tx_chn); struct device * k3_udma_glue_tx_get_dma_device(struct k3_udma_glue_tx_channel *tx_chn); void k3_udma_glue_tx_dma_to_cppi5_addr(struct k3_udma_glue_tx_channel *tx_chn, dma_addr_t *addr); void k3_udma_glue_tx_cppi5_to_dma_addr(struct k3_udma_glue_tx_channel *tx_chn, dma_addr_t *addr); enum { K3_UDMA_GLUE_SRC_TAG_LO_KEEP = 0, K3_UDMA_GLUE_SRC_TAG_LO_USE_FLOW_REG = 1, K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_FLOW_ID = 2, K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG = 4, }; /** * k3_udma_glue_rx_flow_cfg - UDMA RX flow cfg * * @rx_cfg: RX ring configuration * @rxfdq_cfg: RX free Host PD ring configuration * @ring_rxq_id: RX ring id (or -1 for any) * @ring_rxfdq0_id: RX free Host PD ring (FDQ) if (or -1 for any) * @rx_error_handling: Rx Error Handling Mode (0 - drop, 1 - re-try) * @src_tag_lo_sel: Rx Source Tag Low Byte Selector in Host PD */ struct k3_udma_glue_rx_flow_cfg { struct k3_ring_cfg rx_cfg; struct k3_ring_cfg rxfdq_cfg; int ring_rxq_id; int ring_rxfdq0_id; bool rx_error_handling; int src_tag_lo_sel; }; /** * k3_udma_glue_rx_channel_cfg - UDMA RX channel cfg * * @psdata_size: SW Data is present in Host PD of @swdata_size bytes * @flow_id_base: first flow_id used by channel. * if @flow_id_base = -1 - range of GP rflows will be * allocated dynamically. * @flow_id_num: number of RX flows used by channel * @flow_id_use_rxchan_id: use RX channel id as flow id, * used only if @flow_id_num = 1 * @remote indication that RX channel is remote - some remote CPU * core owns and control the RX channel. Linux Host only * allowed to attach and configure RX Flow within RX * channel. if set - not RX channel operation will be * performed by K3 NAVSS DMA glue interface. * @def_flow_cfg default RX flow configuration, * used only if @flow_id_num = 1 */ struct k3_udma_glue_rx_channel_cfg { u32 swdata_size; int flow_id_base; int flow_id_num; bool flow_id_use_rxchan_id; bool remote; struct k3_udma_glue_rx_flow_cfg *def_flow_cfg; }; struct k3_udma_glue_rx_channel; struct k3_udma_glue_rx_channel *k3_udma_glue_request_rx_chn( struct device *dev, const char *name, struct k3_udma_glue_rx_channel_cfg *cfg); void k3_udma_glue_release_rx_chn(struct k3_udma_glue_rx_channel *rx_chn); int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn); void k3_udma_glue_disable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn); void k3_udma_glue_tdown_rx_chn(struct k3_udma_glue_rx_channel *rx_chn, bool sync); int k3_udma_glue_push_rx_chn(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_num, struct cppi5_host_desc_t *desc_tx, dma_addr_t desc_dma); int k3_udma_glue_pop_rx_chn(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_num, dma_addr_t *desc_dma); int k3_udma_glue_rx_flow_init(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_idx, struct k3_udma_glue_rx_flow_cfg *flow_cfg); u32 k3_udma_glue_rx_flow_get_fdq_id(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_idx); u32 k3_udma_glue_rx_get_flow_id_base(struct k3_udma_glue_rx_channel *rx_chn); int k3_udma_glue_rx_get_irq(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_num); void k3_udma_glue_rx_put_irq(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_num); void k3_udma_glue_reset_rx_chn(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_num, void *data, void (*cleanup)(void *data, dma_addr_t desc_dma), bool skip_fdq); int k3_udma_glue_rx_flow_enable(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_idx); int k3_udma_glue_rx_flow_disable(struct k3_udma_glue_rx_channel *rx_chn, u32 flow_idx); struct device * k3_udma_glue_rx_get_dma_device(struct k3_udma_glue_rx_channel *rx_chn); void k3_udma_glue_rx_dma_to_cppi5_addr(struct k3_udma_glue_rx_channel *rx_chn, dma_addr_t *addr); void k3_udma_glue_rx_cppi5_to_dma_addr(struct k3_udma_glue_rx_channel *rx_chn, dma_addr_t *addr); #endif /* K3_UDMA_GLUE_H_ */ PK ! *9m� � dma/k3-psil.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_PSIL_H_ #define K3_PSIL_H_ #include <linux/types.h> #define K3_PSIL_DST_THREAD_ID_OFFSET 0x8000 struct device; /** * enum udma_tp_level - Channel Throughput Levels * @UDMA_TP_NORMAL: Normal channel * @UDMA_TP_HIGH: High Throughput channel * @UDMA_TP_ULTRAHIGH: Ultra High Throughput channel */ enum udma_tp_level { UDMA_TP_NORMAL = 0, UDMA_TP_HIGH, UDMA_TP_ULTRAHIGH, UDMA_TP_LAST, }; /** * enum psil_endpoint_type - PSI-L Endpoint type * @PSIL_EP_NATIVE: Normal channel * @PSIL_EP_PDMA_XY: XY mode PDMA * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA */ enum psil_endpoint_type { PSIL_EP_NATIVE = 0, PSIL_EP_PDMA_XY, PSIL_EP_PDMA_MCAN, PSIL_EP_PDMA_AASRC, }; /** * struct psil_endpoint_config - PSI-L Endpoint configuration * @ep_type: PSI-L endpoint type * @channel_tpl: Desired throughput level for the channel * @pkt_mode: If set, the channel must be in Packet mode, otherwise in * TR mode * @notdpkt: TDCM must be suppressed on the TX channel * @needs_epib: Endpoint needs EPIB * @pdma_acc32: ACC32 must be enabled on the PDMA side * @pdma_burst: BURST must be enabled on the PDMA side * @psd_size: If set, PSdata is used by the endpoint * @mapped_channel_id: PKTDMA thread to channel mapping for mapped channels. * The thread must be serviced by the specified channel if * mapped_channel_id is >= 0 in case of PKTDMA * @flow_start: PKDMA flow range start of mapped channel. Unmapped * channels use flow_id == chan_id * @flow_num: PKDMA flow count of mapped channel. Unmapped channels * use flow_id == chan_id * @default_flow_id: PKDMA default (r)flow index of mapped channel. * Must be within the flow range of the mapped channel. */ struct psil_endpoint_config { enum psil_endpoint_type ep_type; enum udma_tp_level channel_tpl; unsigned pkt_mode:1; unsigned notdpkt:1; unsigned needs_epib:1; /* PDMA properties, valid for PSIL_EP_PDMA_* */ unsigned pdma_acc32:1; unsigned pdma_burst:1; u32 psd_size; /* PKDMA mapped channel */ s16 mapped_channel_id; /* PKTDMA tflow and rflow ranges for mapped channel */ u16 flow_start; u16 flow_num; s16 default_flow_id; }; int psil_set_new_ep_config(struct device *dev, const char *name, struct psil_endpoint_config *ep_config); #endif /* K3_PSIL_H_ */ PK ! ��J6 6 dma/idma64.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for the Intel integrated DMA 64-bit * * Copyright (C) 2019 Intel Corporation */ #ifndef __LINUX_DMA_IDMA64_H__ #define __LINUX_DMA_IDMA64_H__ /* Platform driver name */ #define LPSS_IDMA64_DRIVER_NAME "idma64" #endif /* __LINUX_DMA_IDMA64_H__ */ PK ! �x��.� .� dma/ti-cppi5.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * CPPI5 descriptors interface * * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef __TI_CPPI5_H__ #define __TI_CPPI5_H__ #include <linux/bitops.h> #include <linux/printk.h> #include <linux/bug.h> /** * struct cppi5_desc_hdr_t - Descriptor header, present in all types of * descriptors * @pkt_info0: Packet info word 0 (n/a in Buffer desc) * @pkt_info0: Packet info word 1 (n/a in Buffer desc) * @pkt_info0: Packet info word 2 (n/a in Buffer desc) * @src_dst_tag: Packet info word 3 (n/a in Buffer desc) */ struct cppi5_desc_hdr_t { u32 pkt_info0; u32 pkt_info1; u32 pkt_info2; u32 src_dst_tag; } __packed; /** * struct cppi5_host_desc_t - Host-mode packet and buffer descriptor definition * @hdr: Descriptor header * @next_desc: word 4/5: Linking word * @buf_ptr: word 6/7: Buffer pointer * @buf_info1: word 8: Buffer valid data length * @org_buf_len: word 9: Original buffer length * @org_buf_ptr: word 10/11: Original buffer pointer * @epib[0]: Extended Packet Info Data (optional, 4 words), and/or * Protocol Specific Data (optional, 0-128 bytes in * multiples of 4), and/or * Other Software Data (0-N bytes, optional) */ struct cppi5_host_desc_t { struct cppi5_desc_hdr_t hdr; u64 next_desc; u64 buf_ptr; u32 buf_info1; u32 org_buf_len; u64 org_buf_ptr; u32 epib[]; } __packed; #define CPPI5_DESC_MIN_ALIGN (16U) #define CPPI5_INFO0_HDESC_EPIB_SIZE (16U) #define CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE (128U) #define CPPI5_INFO0_HDESC_TYPE_SHIFT (30U) #define CPPI5_INFO0_HDESC_TYPE_MASK GENMASK(31, 30) #define CPPI5_INFO0_DESC_TYPE_VAL_HOST (1U) #define CPPI5_INFO0_DESC_TYPE_VAL_MONO (2U) #define CPPI5_INFO0_DESC_TYPE_VAL_TR (3U) #define CPPI5_INFO0_HDESC_EPIB_PRESENT BIT(29) /* * Protocol Specific Words location: * 0 - located in the descriptor, * 1 = located in the SOP Buffer immediately prior to the data. */ #define CPPI5_INFO0_HDESC_PSINFO_LOCATION BIT(28) #define CPPI5_INFO0_HDESC_PSINFO_SIZE_SHIFT (22U) #define CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK GENMASK(27, 22) #define CPPI5_INFO0_HDESC_PKTLEN_SHIFT (0) #define CPPI5_INFO0_HDESC_PKTLEN_MASK GENMASK(21, 0) #define CPPI5_INFO1_DESC_PKTERROR_SHIFT (28U) #define CPPI5_INFO1_DESC_PKTERROR_MASK GENMASK(31, 28) #define CPPI5_INFO1_HDESC_PSFLGS_SHIFT (24U) #define CPPI5_INFO1_HDESC_PSFLGS_MASK GENMASK(27, 24) #define CPPI5_INFO1_DESC_PKTID_SHIFT (14U) #define CPPI5_INFO1_DESC_PKTID_MASK GENMASK(23, 14) #define CPPI5_INFO1_DESC_FLOWID_SHIFT (0) #define CPPI5_INFO1_DESC_FLOWID_MASK GENMASK(13, 0) #define CPPI5_INFO1_DESC_FLOWID_DEFAULT CPPI5_INFO1_DESC_FLOWID_MASK #define CPPI5_INFO2_HDESC_PKTTYPE_SHIFT (27U) #define CPPI5_INFO2_HDESC_PKTTYPE_MASK GENMASK(31, 27) /* Return Policy: 0 - Entire packet 1 - Each buffer */ #define CPPI5_INFO2_HDESC_RETPOLICY BIT(18) /* * Early Return: * 0 = desc pointers should be returned after all reads have been completed * 1 = desc pointers should be returned immediately upon fetching * the descriptor and beginning to transfer data. */ #define CPPI5_INFO2_HDESC_EARLYRET BIT(17) /* * Return Push Policy: * 0 = Descriptor must be returned to tail of queue * 1 = Descriptor must be returned to head of queue */ #define CPPI5_INFO2_DESC_RETPUSHPOLICY BIT(16) #define CPPI5_INFO2_DESC_RETP_MASK GENMASK(18, 16) #define CPPI5_INFO2_DESC_RETQ_SHIFT (0) #define CPPI5_INFO2_DESC_RETQ_MASK GENMASK(15, 0) #define CPPI5_INFO3_DESC_SRCTAG_SHIFT (16U) #define CPPI5_INFO3_DESC_SRCTAG_MASK GENMASK(31, 16) #define CPPI5_INFO3_DESC_DSTTAG_SHIFT (0) #define CPPI5_INFO3_DESC_DSTTAG_MASK GENMASK(15, 0) #define CPPI5_BUFINFO1_HDESC_DATA_LEN_SHIFT (0) #define CPPI5_BUFINFO1_HDESC_DATA_LEN_MASK GENMASK(27, 0) #define CPPI5_OBUFINFO0_HDESC_BUF_LEN_SHIFT (0) #define CPPI5_OBUFINFO0_HDESC_BUF_LEN_MASK GENMASK(27, 0) /** * struct cppi5_desc_epib_t - Host Packet Descriptor Extended Packet Info Block * @timestamp: word 0: application specific timestamp * @sw_info0: word 1: Software Info 0 * @sw_info1: word 1: Software Info 1 * @sw_info2: word 1: Software Info 2 */ struct cppi5_desc_epib_t { u32 timestamp; /* w0: application specific timestamp */ u32 sw_info0; /* w1: Software Info 0 */ u32 sw_info1; /* w2: Software Info 1 */ u32 sw_info2; /* w3: Software Info 2 */ }; /** * struct cppi5_monolithic_desc_t - Monolithic-mode packet descriptor * @hdr: Descriptor header * @epib[0]: Extended Packet Info Data (optional, 4 words), and/or * Protocol Specific Data (optional, 0-128 bytes in * multiples of 4), and/or * Other Software Data (0-N bytes, optional) */ struct cppi5_monolithic_desc_t { struct cppi5_desc_hdr_t hdr; u32 epib[]; }; #define CPPI5_INFO2_MDESC_DATA_OFFSET_SHIFT (18U) #define CPPI5_INFO2_MDESC_DATA_OFFSET_MASK GENMASK(26, 18) /* * Reload Count: * 0 = Finish the packet and place the descriptor back on the return queue * 1-0x1ff = Vector to the Reload Index and resume processing * 0x1ff indicates perpetual loop, infinite reload until the channel is stopped */ #define CPPI5_INFO0_TRDESC_RLDCNT_SHIFT (20U) #define CPPI5_INFO0_TRDESC_RLDCNT_MASK GENMASK(28, 20) #define CPPI5_INFO0_TRDESC_RLDCNT_MAX (0x1ff) #define CPPI5_INFO0_TRDESC_RLDCNT_INFINITE CPPI5_INFO0_TRDESC_RLDCNT_MAX #define CPPI5_INFO0_TRDESC_RLDIDX_SHIFT (14U) #define CPPI5_INFO0_TRDESC_RLDIDX_MASK GENMASK(19, 14) #define CPPI5_INFO0_TRDESC_RLDIDX_MAX (0x3f) #define CPPI5_INFO0_TRDESC_LASTIDX_SHIFT (0) #define CPPI5_INFO0_TRDESC_LASTIDX_MASK GENMASK(13, 0) #define CPPI5_INFO1_TRDESC_RECSIZE_SHIFT (24U) #define CPPI5_INFO1_TRDESC_RECSIZE_MASK GENMASK(26, 24) #define CPPI5_INFO1_TRDESC_RECSIZE_VAL_16B (0) #define CPPI5_INFO1_TRDESC_RECSIZE_VAL_32B (1U) #define CPPI5_INFO1_TRDESC_RECSIZE_VAL_64B (2U) #define CPPI5_INFO1_TRDESC_RECSIZE_VAL_128B (3U) static inline void cppi5_desc_dump(void *desc, u32 size) { print_hex_dump(KERN_ERR, "dump udmap_desc: ", DUMP_PREFIX_NONE, 32, 4, desc, size, false); } #define CPPI5_TDCM_MARKER (0x1) /** * cppi5_desc_is_tdcm - check if the paddr indicates Teardown Complete Message * @paddr: Physical address of the packet popped from the ring * * Returns true if the address indicates TDCM */ static inline bool cppi5_desc_is_tdcm(dma_addr_t paddr) { return (paddr & CPPI5_TDCM_MARKER) ? true : false; } /** * cppi5_desc_get_type - get descriptor type * @desc_hdr: packet descriptor/TR header * * Returns descriptor type: * CPPI5_INFO0_DESC_TYPE_VAL_HOST * CPPI5_INFO0_DESC_TYPE_VAL_MONO * CPPI5_INFO0_DESC_TYPE_VAL_TR */ static inline u32 cppi5_desc_get_type(struct cppi5_desc_hdr_t *desc_hdr) { return (desc_hdr->pkt_info0 & CPPI5_INFO0_HDESC_TYPE_MASK) >> CPPI5_INFO0_HDESC_TYPE_SHIFT; } /** * cppi5_desc_get_errflags - get Error Flags from Desc * @desc_hdr: packet/TR descriptor header * * Returns Error Flags from Packet/TR Descriptor */ static inline u32 cppi5_desc_get_errflags(struct cppi5_desc_hdr_t *desc_hdr) { return (desc_hdr->pkt_info1 & CPPI5_INFO1_DESC_PKTERROR_MASK) >> CPPI5_INFO1_DESC_PKTERROR_SHIFT; } /** * cppi5_desc_get_pktids - get Packet and Flow ids from Desc * @desc_hdr: packet/TR descriptor header * @pkt_id: Packet ID * @flow_id: Flow ID * * Returns Packet and Flow ids from packet/TR descriptor */ static inline void cppi5_desc_get_pktids(struct cppi5_desc_hdr_t *desc_hdr, u32 *pkt_id, u32 *flow_id) { *pkt_id = (desc_hdr->pkt_info1 & CPPI5_INFO1_DESC_PKTID_MASK) >> CPPI5_INFO1_DESC_PKTID_SHIFT; *flow_id = (desc_hdr->pkt_info1 & CPPI5_INFO1_DESC_FLOWID_MASK) >> CPPI5_INFO1_DESC_FLOWID_SHIFT; } /** * cppi5_desc_set_pktids - set Packet and Flow ids in Desc * @desc_hdr: packet/TR descriptor header * @pkt_id: Packet ID * @flow_id: Flow ID */ static inline void cppi5_desc_set_pktids(struct cppi5_desc_hdr_t *desc_hdr, u32 pkt_id, u32 flow_id) { desc_hdr->pkt_info1 &= ~(CPPI5_INFO1_DESC_PKTID_MASK | CPPI5_INFO1_DESC_FLOWID_MASK); desc_hdr->pkt_info1 |= (pkt_id << CPPI5_INFO1_DESC_PKTID_SHIFT) & CPPI5_INFO1_DESC_PKTID_MASK; desc_hdr->pkt_info1 |= (flow_id << CPPI5_INFO1_DESC_FLOWID_SHIFT) & CPPI5_INFO1_DESC_FLOWID_MASK; } /** * cppi5_desc_set_retpolicy - set Packet Return Policy in Desc * @desc_hdr: packet/TR descriptor header * @flags: fags, supported values * CPPI5_INFO2_HDESC_RETPOLICY * CPPI5_INFO2_HDESC_EARLYRET * CPPI5_INFO2_DESC_RETPUSHPOLICY * @return_ring_id: Packet Return Queue/Ring id, value 0xFFFF reserved */ static inline void cppi5_desc_set_retpolicy(struct cppi5_desc_hdr_t *desc_hdr, u32 flags, u32 return_ring_id) { desc_hdr->pkt_info2 &= ~(CPPI5_INFO2_DESC_RETP_MASK | CPPI5_INFO2_DESC_RETQ_MASK); desc_hdr->pkt_info2 |= flags & CPPI5_INFO2_DESC_RETP_MASK; desc_hdr->pkt_info2 |= return_ring_id & CPPI5_INFO2_DESC_RETQ_MASK; } /** * cppi5_desc_get_tags_ids - get Packet Src/Dst Tags from Desc * @desc_hdr: packet/TR descriptor header * @src_tag_id: Source Tag * @dst_tag_id: Dest Tag * * Returns Packet Src/Dst Tags from packet/TR descriptor */ static inline void cppi5_desc_get_tags_ids(struct cppi5_desc_hdr_t *desc_hdr, u32 *src_tag_id, u32 *dst_tag_id) { if (src_tag_id) *src_tag_id = (desc_hdr->src_dst_tag & CPPI5_INFO3_DESC_SRCTAG_MASK) >> CPPI5_INFO3_DESC_SRCTAG_SHIFT; if (dst_tag_id) *dst_tag_id = desc_hdr->src_dst_tag & CPPI5_INFO3_DESC_DSTTAG_MASK; } /** * cppi5_desc_set_tags_ids - set Packet Src/Dst Tags in HDesc * @desc_hdr: packet/TR descriptor header * @src_tag_id: Source Tag * @dst_tag_id: Dest Tag * * Returns Packet Src/Dst Tags from packet/TR descriptor */ static inline void cppi5_desc_set_tags_ids(struct cppi5_desc_hdr_t *desc_hdr, u32 src_tag_id, u32 dst_tag_id) { desc_hdr->src_dst_tag = (src_tag_id << CPPI5_INFO3_DESC_SRCTAG_SHIFT) & CPPI5_INFO3_DESC_SRCTAG_MASK; desc_hdr->src_dst_tag |= dst_tag_id & CPPI5_INFO3_DESC_DSTTAG_MASK; } /** * cppi5_hdesc_calc_size - Calculate Host Packet Descriptor size * @epib: is EPIB present * @psdata_size: PSDATA size * @sw_data_size: SWDATA size * * Returns required Host Packet Descriptor size * 0 - if PSDATA > CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE */ static inline u32 cppi5_hdesc_calc_size(bool epib, u32 psdata_size, u32 sw_data_size) { u32 desc_size; if (psdata_size > CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE) return 0; desc_size = sizeof(struct cppi5_host_desc_t) + psdata_size + sw_data_size; if (epib) desc_size += CPPI5_INFO0_HDESC_EPIB_SIZE; return ALIGN(desc_size, CPPI5_DESC_MIN_ALIGN); } /** * cppi5_hdesc_init - Init Host Packet Descriptor size * @desc: Host packet descriptor * @flags: supported values * CPPI5_INFO0_HDESC_EPIB_PRESENT * CPPI5_INFO0_HDESC_PSINFO_LOCATION * @psdata_size: PSDATA size * * Returns required Host Packet Descriptor size * 0 - if PSDATA > CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE */ static inline void cppi5_hdesc_init(struct cppi5_host_desc_t *desc, u32 flags, u32 psdata_size) { desc->hdr.pkt_info0 = (CPPI5_INFO0_DESC_TYPE_VAL_HOST << CPPI5_INFO0_HDESC_TYPE_SHIFT) | (flags); desc->hdr.pkt_info0 |= ((psdata_size >> 2) << CPPI5_INFO0_HDESC_PSINFO_SIZE_SHIFT) & CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK; desc->next_desc = 0; } /** * cppi5_hdesc_update_flags - Replace descriptor flags * @desc: Host packet descriptor * @flags: supported values * CPPI5_INFO0_HDESC_EPIB_PRESENT * CPPI5_INFO0_HDESC_PSINFO_LOCATION */ static inline void cppi5_hdesc_update_flags(struct cppi5_host_desc_t *desc, u32 flags) { desc->hdr.pkt_info0 &= ~(CPPI5_INFO0_HDESC_EPIB_PRESENT | CPPI5_INFO0_HDESC_PSINFO_LOCATION); desc->hdr.pkt_info0 |= flags; } /** * cppi5_hdesc_update_psdata_size - Replace PSdata size * @desc: Host packet descriptor * @psdata_size: PSDATA size */ static inline void cppi5_hdesc_update_psdata_size(struct cppi5_host_desc_t *desc, u32 psdata_size) { desc->hdr.pkt_info0 &= ~CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK; desc->hdr.pkt_info0 |= ((psdata_size >> 2) << CPPI5_INFO0_HDESC_PSINFO_SIZE_SHIFT) & CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK; } /** * cppi5_hdesc_get_psdata_size - get PSdata size in bytes * @desc: Host packet descriptor */ static inline u32 cppi5_hdesc_get_psdata_size(struct cppi5_host_desc_t *desc) { u32 psdata_size = 0; if (!(desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PSINFO_LOCATION)) psdata_size = (desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK) >> CPPI5_INFO0_HDESC_PSINFO_SIZE_SHIFT; return (psdata_size << 2); } /** * cppi5_hdesc_get_pktlen - get Packet Length from HDesc * @desc: Host packet descriptor * * Returns Packet Length from Host Packet Descriptor */ static inline u32 cppi5_hdesc_get_pktlen(struct cppi5_host_desc_t *desc) { return (desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PKTLEN_MASK); } /** * cppi5_hdesc_set_pktlen - set Packet Length in HDesc * @desc: Host packet descriptor */ static inline void cppi5_hdesc_set_pktlen(struct cppi5_host_desc_t *desc, u32 pkt_len) { desc->hdr.pkt_info0 &= ~CPPI5_INFO0_HDESC_PKTLEN_MASK; desc->hdr.pkt_info0 |= (pkt_len & CPPI5_INFO0_HDESC_PKTLEN_MASK); } /** * cppi5_hdesc_get_psflags - get Protocol Specific Flags from HDesc * @desc: Host packet descriptor * * Returns Protocol Specific Flags from Host Packet Descriptor */ static inline u32 cppi5_hdesc_get_psflags(struct cppi5_host_desc_t *desc) { return (desc->hdr.pkt_info1 & CPPI5_INFO1_HDESC_PSFLGS_MASK) >> CPPI5_INFO1_HDESC_PSFLGS_SHIFT; } /** * cppi5_hdesc_set_psflags - set Protocol Specific Flags in HDesc * @desc: Host packet descriptor */ static inline void cppi5_hdesc_set_psflags(struct cppi5_host_desc_t *desc, u32 ps_flags) { desc->hdr.pkt_info1 &= ~CPPI5_INFO1_HDESC_PSFLGS_MASK; desc->hdr.pkt_info1 |= (ps_flags << CPPI5_INFO1_HDESC_PSFLGS_SHIFT) & CPPI5_INFO1_HDESC_PSFLGS_MASK; } /** * cppi5_hdesc_get_errflags - get Packet Type from HDesc * @desc: Host packet descriptor */ static inline u32 cppi5_hdesc_get_pkttype(struct cppi5_host_desc_t *desc) { return (desc->hdr.pkt_info2 & CPPI5_INFO2_HDESC_PKTTYPE_MASK) >> CPPI5_INFO2_HDESC_PKTTYPE_SHIFT; } /** * cppi5_hdesc_get_errflags - set Packet Type in HDesc * @desc: Host packet descriptor * @pkt_type: Packet Type */ static inline void cppi5_hdesc_set_pkttype(struct cppi5_host_desc_t *desc, u32 pkt_type) { desc->hdr.pkt_info2 &= ~CPPI5_INFO2_HDESC_PKTTYPE_MASK; desc->hdr.pkt_info2 |= (pkt_type << CPPI5_INFO2_HDESC_PKTTYPE_SHIFT) & CPPI5_INFO2_HDESC_PKTTYPE_MASK; } /** * cppi5_hdesc_attach_buf - attach buffer to HDesc * @desc: Host packet descriptor * @buf: Buffer physical address * @buf_data_len: Buffer length * @obuf: Original Buffer physical address * @obuf_len: Original Buffer length * * Attaches buffer to Host Packet Descriptor */ static inline void cppi5_hdesc_attach_buf(struct cppi5_host_desc_t *desc, dma_addr_t buf, u32 buf_data_len, dma_addr_t obuf, u32 obuf_len) { desc->buf_ptr = buf; desc->buf_info1 = buf_data_len & CPPI5_BUFINFO1_HDESC_DATA_LEN_MASK; desc->org_buf_ptr = obuf; desc->org_buf_len = obuf_len & CPPI5_OBUFINFO0_HDESC_BUF_LEN_MASK; } static inline void cppi5_hdesc_get_obuf(struct cppi5_host_desc_t *desc, dma_addr_t *obuf, u32 *obuf_len) { *obuf = desc->org_buf_ptr; *obuf_len = desc->org_buf_len & CPPI5_OBUFINFO0_HDESC_BUF_LEN_MASK; } static inline void cppi5_hdesc_reset_to_original(struct cppi5_host_desc_t *desc) { desc->buf_ptr = desc->org_buf_ptr; desc->buf_info1 = desc->org_buf_len; } /** * cppi5_hdesc_link_hbdesc - link Host Buffer Descriptor to HDesc * @desc: Host Packet Descriptor * @buf_desc: Host Buffer Descriptor physical address * * add and link Host Buffer Descriptor to HDesc */ static inline void cppi5_hdesc_link_hbdesc(struct cppi5_host_desc_t *desc, dma_addr_t hbuf_desc) { desc->next_desc = hbuf_desc; } static inline dma_addr_t cppi5_hdesc_get_next_hbdesc(struct cppi5_host_desc_t *desc) { return (dma_addr_t)desc->next_desc; } static inline void cppi5_hdesc_reset_hbdesc(struct cppi5_host_desc_t *desc) { desc->hdr = (struct cppi5_desc_hdr_t) { 0 }; desc->next_desc = 0; } /** * cppi5_hdesc_epib_present - check if EPIB present * @desc_hdr: packet descriptor/TR header * * Returns true if EPIB present in the packet */ static inline bool cppi5_hdesc_epib_present(struct cppi5_desc_hdr_t *desc_hdr) { return !!(desc_hdr->pkt_info0 & CPPI5_INFO0_HDESC_EPIB_PRESENT); } /** * cppi5_hdesc_get_psdata - Get pointer on PSDATA * @desc: Host packet descriptor * * Returns pointer on PSDATA in HDesc. * NULL - if ps_data placed at the start of data buffer. */ static inline void *cppi5_hdesc_get_psdata(struct cppi5_host_desc_t *desc) { u32 psdata_size; void *psdata; if (desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PSINFO_LOCATION) return NULL; psdata_size = (desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK) >> CPPI5_INFO0_HDESC_PSINFO_SIZE_SHIFT; if (!psdata_size) return NULL; psdata = &desc->epib; if (cppi5_hdesc_epib_present(&desc->hdr)) psdata += CPPI5_INFO0_HDESC_EPIB_SIZE; return psdata; } /** * cppi5_hdesc_get_swdata - Get pointer on swdata * @desc: Host packet descriptor * * Returns pointer on SWDATA in HDesc. * NOTE. It's caller responsibility to be sure hdesc actually has swdata. */ static inline void *cppi5_hdesc_get_swdata(struct cppi5_host_desc_t *desc) { u32 psdata_size = 0; void *swdata; if (!(desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PSINFO_LOCATION)) psdata_size = (desc->hdr.pkt_info0 & CPPI5_INFO0_HDESC_PSINFO_SIZE_MASK) >> CPPI5_INFO0_HDESC_PSINFO_SIZE_SHIFT; swdata = &desc->epib; if (cppi5_hdesc_epib_present(&desc->hdr)) swdata += CPPI5_INFO0_HDESC_EPIB_SIZE; swdata += (psdata_size << 2); return swdata; } /* ================================== TR ================================== */ #define CPPI5_TR_TYPE_SHIFT (0U) #define CPPI5_TR_TYPE_MASK GENMASK(3, 0) #define CPPI5_TR_STATIC BIT(4) #define CPPI5_TR_WAIT BIT(5) #define CPPI5_TR_EVENT_SIZE_SHIFT (6U) #define CPPI5_TR_EVENT_SIZE_MASK GENMASK(7, 6) #define CPPI5_TR_TRIGGER0_SHIFT (8U) #define CPPI5_TR_TRIGGER0_MASK GENMASK(9, 8) #define CPPI5_TR_TRIGGER0_TYPE_SHIFT (10U) #define CPPI5_TR_TRIGGER0_TYPE_MASK GENMASK(11, 10) #define CPPI5_TR_TRIGGER1_SHIFT (12U) #define CPPI5_TR_TRIGGER1_MASK GENMASK(13, 12) #define CPPI5_TR_TRIGGER1_TYPE_SHIFT (14U) #define CPPI5_TR_TRIGGER1_TYPE_MASK GENMASK(15, 14) #define CPPI5_TR_CMD_ID_SHIFT (16U) #define CPPI5_TR_CMD_ID_MASK GENMASK(23, 16) #define CPPI5_TR_CSF_FLAGS_SHIFT (24U) #define CPPI5_TR_CSF_FLAGS_MASK GENMASK(31, 24) #define CPPI5_TR_CSF_SA_INDIRECT BIT(0) #define CPPI5_TR_CSF_DA_INDIRECT BIT(1) #define CPPI5_TR_CSF_SUPR_EVT BIT(2) #define CPPI5_TR_CSF_EOL_ADV_SHIFT (4U) #define CPPI5_TR_CSF_EOL_ADV_MASK GENMASK(6, 4) #define CPPI5_TR_CSF_EOP BIT(7) /** * enum cppi5_tr_types - TR types * @CPPI5_TR_TYPE0: One dimensional data move * @CPPI5_TR_TYPE1: Two dimensional data move * @CPPI5_TR_TYPE2: Three dimensional data move * @CPPI5_TR_TYPE3: Four dimensional data move * @CPPI5_TR_TYPE4: Four dimensional data move with data formatting * @CPPI5_TR_TYPE5: Four dimensional Cache Warm * @CPPI5_TR_TYPE8: Four Dimensional Block Move * @CPPI5_TR_TYPE9: Four Dimensional Block Move with Repacking * @CPPI5_TR_TYPE10: Two Dimensional Block Move * @CPPI5_TR_TYPE11: Two Dimensional Block Move with Repacking * @CPPI5_TR_TYPE15: Four Dimensional Block Move with Repacking and * Indirection */ enum cppi5_tr_types { CPPI5_TR_TYPE0 = 0, CPPI5_TR_TYPE1, CPPI5_TR_TYPE2, CPPI5_TR_TYPE3, CPPI5_TR_TYPE4, CPPI5_TR_TYPE5, /* type6-7: Reserved */ CPPI5_TR_TYPE8 = 8, CPPI5_TR_TYPE9, CPPI5_TR_TYPE10, CPPI5_TR_TYPE11, /* type12-14: Reserved */ CPPI5_TR_TYPE15 = 15, CPPI5_TR_TYPE_MAX }; /** * enum cppi5_tr_event_size - TR Flags EVENT_SIZE field specifies when an event * is generated for each TR. * @CPPI5_TR_EVENT_SIZE_COMPLETION: When TR is complete and all status for * the TR has been received * @CPPI5_TR_EVENT_SIZE_ICNT1_DEC: Type 0: when the last data transaction * is sent for the TR * Type 1-11: when ICNT1 is decremented * @CPPI5_TR_EVENT_SIZE_ICNT2_DEC: Type 0-1,10-11: when the last data * transaction is sent for the TR * All other types: when ICNT2 is * decremented * @CPPI5_TR_EVENT_SIZE_ICNT3_DEC: Type 0-2,10-11: when the last data * transaction is sent for the TR * All other types: when ICNT3 is * decremented */ enum cppi5_tr_event_size { CPPI5_TR_EVENT_SIZE_COMPLETION, CPPI5_TR_EVENT_SIZE_ICNT1_DEC, CPPI5_TR_EVENT_SIZE_ICNT2_DEC, CPPI5_TR_EVENT_SIZE_ICNT3_DEC, CPPI5_TR_EVENT_SIZE_MAX }; /** * enum cppi5_tr_trigger - TR Flags TRIGGERx field specifies the type of trigger * used to enable the TR to transfer data as specified * by TRIGGERx_TYPE field. * @CPPI5_TR_TRIGGER_NONE: No trigger * @CPPI5_TR_TRIGGER_GLOBAL0: Global trigger 0 * @CPPI5_TR_TRIGGER_GLOBAL1: Global trigger 1 * @CPPI5_TR_TRIGGER_LOCAL_EVENT: Local Event */ enum cppi5_tr_trigger { CPPI5_TR_TRIGGER_NONE, CPPI5_TR_TRIGGER_GLOBAL0, CPPI5_TR_TRIGGER_GLOBAL1, CPPI5_TR_TRIGGER_LOCAL_EVENT, CPPI5_TR_TRIGGER_MAX }; /** * enum cppi5_tr_trigger_type - TR Flags TRIGGERx_TYPE field specifies the type * of data transfer that will be enabled by * receiving a trigger as specified by TRIGGERx. * @CPPI5_TR_TRIGGER_TYPE_ICNT1_DEC: The second inner most loop (ICNT1) will * be decremented by 1 * @CPPI5_TR_TRIGGER_TYPE_ICNT2_DEC: The third inner most loop (ICNT2) will * be decremented by 1 * @CPPI5_TR_TRIGGER_TYPE_ICNT3_DEC: The outer most loop (ICNT3) will be * decremented by 1 * @CPPI5_TR_TRIGGER_TYPE_ALL: The entire TR will be allowed to * complete */ enum cppi5_tr_trigger_type { CPPI5_TR_TRIGGER_TYPE_ICNT1_DEC, CPPI5_TR_TRIGGER_TYPE_ICNT2_DEC, CPPI5_TR_TRIGGER_TYPE_ICNT3_DEC, CPPI5_TR_TRIGGER_TYPE_ALL, CPPI5_TR_TRIGGER_TYPE_MAX }; typedef u32 cppi5_tr_flags_t; /** * struct cppi5_tr_type0_t - Type 0 (One dimensional data move) TR (16 byte) * @flags: TR flags (type, triggers, event, configuration) * @icnt0: Total loop iteration count for level 0 (innermost) * @_reserved: Not used * @addr: Starting address for the source data or destination data */ struct cppi5_tr_type0_t { cppi5_tr_flags_t flags; u16 icnt0; u16 _reserved; u64 addr; } __aligned(16) __packed; /** * struct cppi5_tr_type1_t - Type 1 (Two dimensional data move) TR (32 byte) * @flags: TR flags (type, triggers, event, configuration) * @icnt0: Total loop iteration count for level 0 (innermost) * @icnt1: Total loop iteration count for level 1 * @addr: Starting address for the source data or destination data * @dim1: Signed dimension for loop level 1 */ struct cppi5_tr_type1_t { cppi5_tr_flags_t flags; u16 icnt0; u16 icnt1; u64 addr; s32 dim1; } __aligned(32) __packed; /** * struct cppi5_tr_type2_t - Type 2 (Three dimensional data move) TR (32 byte) * @flags: TR flags (type, triggers, event, configuration) * @icnt0: Total loop iteration count for level 0 (innermost) * @icnt1: Total loop iteration count for level 1 * @addr: Starting address for the source data or destination data * @dim1: Signed dimension for loop level 1 * @icnt2: Total loop iteration count for level 2 * @_reserved: Not used * @dim2: Signed dimension for loop level 2 */ struct cppi5_tr_type2_t { cppi5_tr_flags_t flags; u16 icnt0; u16 icnt1; u64 addr; s32 dim1; u16 icnt2; u16 _reserved; s32 dim2; } __aligned(32) __packed; /** * struct cppi5_tr_type3_t - Type 3 (Four dimensional data move) TR (32 byte) * @flags: TR flags (type, triggers, event, configuration) * @icnt0: Total loop iteration count for level 0 (innermost) * @icnt1: Total loop iteration count for level 1 * @addr: Starting address for the source data or destination data * @dim1: Signed dimension for loop level 1 * @icnt2: Total loop iteration count for level 2 * @icnt3: Total loop iteration count for level 3 (outermost) * @dim2: Signed dimension for loop level 2 * @dim3: Signed dimension for loop level 3 */ struct cppi5_tr_type3_t { cppi5_tr_flags_t flags; u16 icnt0; u16 icnt1; u64 addr; s32 dim1; u16 icnt2; u16 icnt3; s32 dim2; s32 dim3; } __aligned(32) __packed; /** * struct cppi5_tr_type15_t - Type 15 (Four Dimensional Block Copy with * Repacking and Indirection Support) TR (64 byte) * @flags: TR flags (type, triggers, event, configuration) * @icnt0: Total loop iteration count for level 0 (innermost) for * source * @icnt1: Total loop iteration count for level 1 for source * @addr: Starting address for the source data * @dim1: Signed dimension for loop level 1 for source * @icnt2: Total loop iteration count for level 2 for source * @icnt3: Total loop iteration count for level 3 (outermost) for * source * @dim2: Signed dimension for loop level 2 for source * @dim3: Signed dimension for loop level 3 for source * @_reserved: Not used * @ddim1: Signed dimension for loop level 1 for destination * @daddr: Starting address for the destination data * @ddim2: Signed dimension for loop level 2 for destination * @ddim3: Signed dimension for loop level 3 for destination * @dicnt0: Total loop iteration count for level 0 (innermost) for * destination * @dicnt1: Total loop iteration count for level 1 for destination * @dicnt2: Total loop iteration count for level 2 for destination * @sicnt3: Total loop iteration count for level 3 (outermost) for * destination */ struct cppi5_tr_type15_t { cppi5_tr_flags_t flags; u16 icnt0; u16 icnt1; u64 addr; s32 dim1; u16 icnt2; u16 icnt3; s32 dim2; s32 dim3; u32 _reserved; s32 ddim1; u64 daddr; s32 ddim2; s32 ddim3; u16 dicnt0; u16 dicnt1; u16 dicnt2; u16 dicnt3; } __aligned(64) __packed; /** * struct cppi5_tr_resp_t - TR response record * @status: Status type and info * @_reserved: Not used * @cmd_id: Command ID for the TR for TR identification * @flags: Configuration Specific Flags */ struct cppi5_tr_resp_t { u8 status; u8 _reserved; u8 cmd_id; u8 flags; } __packed; #define CPPI5_TR_RESPONSE_STATUS_TYPE_SHIFT (0U) #define CPPI5_TR_RESPONSE_STATUS_TYPE_MASK GENMASK(3, 0) #define CPPI5_TR_RESPONSE_STATUS_INFO_SHIFT (4U) #define CPPI5_TR_RESPONSE_STATUS_INFO_MASK GENMASK(7, 4) #define CPPI5_TR_RESPONSE_CMDID_SHIFT (16U) #define CPPI5_TR_RESPONSE_CMDID_MASK GENMASK(23, 16) #define CPPI5_TR_RESPONSE_CFG_SPECIFIC_SHIFT (24U) #define CPPI5_TR_RESPONSE_CFG_SPECIFIC_MASK GENMASK(31, 24) /** * enum cppi5_tr_resp_status_type - TR Response Status Type field is used to * determine what type of status is being * returned. * @CPPI5_TR_RESPONSE_STATUS_NONE: No error, completion: completed * @CPPI5_TR_RESPONSE_STATUS_TRANSFER_ERR: Transfer Error, completion: none * or partially completed * @CPPI5_TR_RESPONSE_STATUS_ABORTED_ERR: Aborted Error, completion: none * or partially completed * @CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR: Submission Error, completion: * none * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_ERR: Unsupported Error, completion: * none * @CPPI5_TR_RESPONSE_STATUS_TRANSFER_EXCEPTION: Transfer Exception, completion: * partially completed * @CPPI5_TR_RESPONSE_STATUS__TEARDOWN_FLUSH: Teardown Flush, completion: none */ enum cppi5_tr_resp_status_type { CPPI5_TR_RESPONSE_STATUS_NONE, CPPI5_TR_RESPONSE_STATUS_TRANSFER_ERR, CPPI5_TR_RESPONSE_STATUS_ABORTED_ERR, CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_ERR, CPPI5_TR_RESPONSE_STATUS_TRANSFER_EXCEPTION, CPPI5_TR_RESPONSE_STATUS__TEARDOWN_FLUSH, CPPI5_TR_RESPONSE_STATUS_MAX }; /** * enum cppi5_tr_resp_status_submission - TR Response Status field values which * corresponds Submission Error * @CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ICNT0: ICNT0 was 0 * @CPPI5_TR_RESPONSE_STATUS_SUBMISSION_FIFO_FULL: Channel FIFO was full when TR * received * @CPPI5_TR_RESPONSE_STATUS_SUBMISSION_OWN: Channel is not owned by the * submitter */ enum cppi5_tr_resp_status_submission { CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ICNT0, CPPI5_TR_RESPONSE_STATUS_SUBMISSION_FIFO_FULL, CPPI5_TR_RESPONSE_STATUS_SUBMISSION_OWN, CPPI5_TR_RESPONSE_STATUS_SUBMISSION_MAX }; /** * enum cppi5_tr_resp_status_unsupported - TR Response Status field values which * corresponds Unsupported Error * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_TR_TYPE: TR Type not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_STATIC: STATIC not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_EOL: EOL not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_CFG_SPECIFIC: CONFIGURATION SPECIFIC * not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_AMODE: AMODE not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_ELTYPE: ELTYPE not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_DFMT: DFMT not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_SECTR: SECTR not supported * @CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_AMODE_SPECIFIC: AMODE SPECIFIC field * not supported */ enum cppi5_tr_resp_status_unsupported { CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_TR_TYPE, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_STATIC, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_EOL, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_CFG_SPECIFIC, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_AMODE, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_ELTYPE, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_DFMT, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_SECTR, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_AMODE_SPECIFIC, CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_MAX }; /** * cppi5_trdesc_calc_size - Calculate TR Descriptor size * @tr_count: number of TR records * @tr_size: Nominal size of TR record (max) [16, 32, 64, 128] * * Returns required TR Descriptor size */ static inline size_t cppi5_trdesc_calc_size(u32 tr_count, u32 tr_size) { /* * The Size of a TR descriptor is: * 1 x tr_size : the first 16 bytes is used by the packet info block + * tr_count x tr_size : Transfer Request Records + * tr_count x sizeof(struct cppi5_tr_resp_t) : Transfer Response Records */ return tr_size * (tr_count + 1) + sizeof(struct cppi5_tr_resp_t) * tr_count; } /** * cppi5_trdesc_init - Init TR Descriptor * @desc: TR Descriptor * @tr_count: number of TR records * @tr_size: Nominal size of TR record (max) [16, 32, 64, 128] * @reload_idx: Absolute index to jump to on the 2nd and following passes * through the TR packet. * @reload_count: Number of times to jump from last entry to reload_idx. 0x1ff * indicates infinite looping. * * Init TR Descriptor */ static inline void cppi5_trdesc_init(struct cppi5_desc_hdr_t *desc_hdr, u32 tr_count, u32 tr_size, u32 reload_idx, u32 reload_count) { desc_hdr->pkt_info0 = CPPI5_INFO0_DESC_TYPE_VAL_TR << CPPI5_INFO0_HDESC_TYPE_SHIFT; desc_hdr->pkt_info0 |= (reload_count << CPPI5_INFO0_TRDESC_RLDCNT_SHIFT) & CPPI5_INFO0_TRDESC_RLDCNT_MASK; desc_hdr->pkt_info0 |= (reload_idx << CPPI5_INFO0_TRDESC_RLDIDX_SHIFT) & CPPI5_INFO0_TRDESC_RLDIDX_MASK; desc_hdr->pkt_info0 |= (tr_count - 1) & CPPI5_INFO0_TRDESC_LASTIDX_MASK; desc_hdr->pkt_info1 |= ((ffs(tr_size >> 4) - 1) << CPPI5_INFO1_TRDESC_RECSIZE_SHIFT) & CPPI5_INFO1_TRDESC_RECSIZE_MASK; } /** * cppi5_tr_init - Init TR record * @flags: Pointer to the TR's flags * @type: TR type * @static_tr: TR is static * @wait: Wait for TR completion before allow the next TR to start * @event_size: output event generation cfg * @cmd_id: TR identifier (application specifics) * * Init TR record */ static inline void cppi5_tr_init(cppi5_tr_flags_t *flags, enum cppi5_tr_types type, bool static_tr, bool wait, enum cppi5_tr_event_size event_size, u32 cmd_id) { *flags = type; *flags |= (event_size << CPPI5_TR_EVENT_SIZE_SHIFT) & CPPI5_TR_EVENT_SIZE_MASK; *flags |= (cmd_id << CPPI5_TR_CMD_ID_SHIFT) & CPPI5_TR_CMD_ID_MASK; if (static_tr && (type == CPPI5_TR_TYPE8 || type == CPPI5_TR_TYPE9)) *flags |= CPPI5_TR_STATIC; if (wait) *flags |= CPPI5_TR_WAIT; } /** * cppi5_tr_set_trigger - Configure trigger0/1 and trigger0/1_type * @flags: Pointer to the TR's flags * @trigger0: trigger0 selection * @trigger0_type: type of data transfer that will be enabled by trigger0 * @trigger1: trigger1 selection * @trigger1_type: type of data transfer that will be enabled by trigger1 * * Configure the triggers for the TR */ static inline void cppi5_tr_set_trigger(cppi5_tr_flags_t *flags, enum cppi5_tr_trigger trigger0, enum cppi5_tr_trigger_type trigger0_type, enum cppi5_tr_trigger trigger1, enum cppi5_tr_trigger_type trigger1_type) { *flags &= ~(CPPI5_TR_TRIGGER0_MASK | CPPI5_TR_TRIGGER0_TYPE_MASK | CPPI5_TR_TRIGGER1_MASK | CPPI5_TR_TRIGGER1_TYPE_MASK); *flags |= (trigger0 << CPPI5_TR_TRIGGER0_SHIFT) & CPPI5_TR_TRIGGER0_MASK; *flags |= (trigger0_type << CPPI5_TR_TRIGGER0_TYPE_SHIFT) & CPPI5_TR_TRIGGER0_TYPE_MASK; *flags |= (trigger1 << CPPI5_TR_TRIGGER1_SHIFT) & CPPI5_TR_TRIGGER1_MASK; *flags |= (trigger1_type << CPPI5_TR_TRIGGER1_TYPE_SHIFT) & CPPI5_TR_TRIGGER1_TYPE_MASK; } /** * cppi5_tr_cflag_set - Update the Configuration specific flags * @flags: Pointer to the TR's flags * @csf: Configuration specific flags * * Set a bit in Configuration Specific Flags section of the TR flags. */ static inline void cppi5_tr_csf_set(cppi5_tr_flags_t *flags, u32 csf) { *flags &= ~CPPI5_TR_CSF_FLAGS_MASK; *flags |= (csf << CPPI5_TR_CSF_FLAGS_SHIFT) & CPPI5_TR_CSF_FLAGS_MASK; } #endif /* __TI_CPPI5_H__ */ PK ! ��ӗ� � dma/xilinx_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Xilinx DMA Engine drivers support header file * * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved. */ #ifndef __DMA_XILINX_DMA_H #define __DMA_XILINX_DMA_H #include <linux/dma-mapping.h> #include <linux/dmaengine.h> /** * struct xilinx_vdma_config - VDMA Configuration structure * @frm_dly: Frame delay * @gen_lock: Whether in gen-lock mode * @master: Master that it syncs to * @frm_cnt_en: Enable frame count enable * @park: Whether wants to park * @park_frm: Frame to park on * @coalesc: Interrupt coalescing threshold * @delay: Delay counter * @reset: Reset Channel * @ext_fsync: External Frame Sync source * @vflip_en: Vertical Flip enable */ struct xilinx_vdma_config { int frm_dly; int gen_lock; int master; int frm_cnt_en; int park; int park_frm; int coalesc; int delay; int reset; int ext_fsync; bool vflip_en; }; int xilinx_vdma_channel_set_config(struct dma_chan *dchan, struct xilinx_vdma_config *cfg); #endif PK ! 7"s�e e dma/hsu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Driver for the High Speed UART DMA * * Copyright (C) 2015 Intel Corporation */ #ifndef _DMA_HSU_H #define _DMA_HSU_H #include <linux/device.h> #include <linux/interrupt.h> #include <linux/platform_data/dma-hsu.h> struct hsu_dma; /** * struct hsu_dma_chip - representation of HSU DMA hardware * @dev: struct device of the DMA controller * @irq: irq line * @regs: memory mapped I/O space * @length: I/O space length * @offset: offset of the I/O space where registers are located * @hsu: struct hsu_dma that is filed by ->probe() * @pdata: platform data for the DMA controller if provided */ struct hsu_dma_chip { struct device *dev; int irq; void __iomem *regs; unsigned int length; unsigned int offset; struct hsu_dma *hsu; }; #if IS_ENABLED(CONFIG_HSU_DMA) /* Export to the internal users */ int hsu_dma_get_status(struct hsu_dma_chip *chip, unsigned short nr, u32 *status); int hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr, u32 status); /* Export to the platform drivers */ int hsu_dma_probe(struct hsu_dma_chip *chip); int hsu_dma_remove(struct hsu_dma_chip *chip); #else static inline int hsu_dma_get_status(struct hsu_dma_chip *chip, unsigned short nr, u32 *status) { return 0; } static inline int hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr, u32 status) { return 0; } static inline int hsu_dma_probe(struct hsu_dma_chip *chip) { return -ENODEV; } static inline int hsu_dma_remove(struct hsu_dma_chip *chip) { return 0; } #endif /* CONFIG_HSU_DMA */ #endif /* _DMA_HSU_H */ PK ! s��$ dma/edma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates. * Synopsys DesignWare eDMA core driver * * Author: Gustavo Pimentel <gustavo.pimentel@synopsys.com> */ #ifndef _DW_EDMA_H #define _DW_EDMA_H #include <linux/device.h> #include <linux/dmaengine.h> struct dw_edma; /** * struct dw_edma_chip - representation of DesignWare eDMA controller hardware * @dev: struct device of the eDMA controller * @id: instance ID * @irq: irq line * @dw: struct dw_edma that is filed by dw_edma_probe() */ struct dw_edma_chip { struct device *dev; int id; int irq; struct dw_edma *dw; }; /* Export to the platform drivers */ #if IS_ENABLED(CONFIG_DW_EDMA) int dw_edma_probe(struct dw_edma_chip *chip); int dw_edma_remove(struct dw_edma_chip *chip); #else static inline int dw_edma_probe(struct dw_edma_chip *chip) { return -ENODEV; } static inline int dw_edma_remove(struct dw_edma_chip *chip) { return 0; } #endif /* CONFIG_DW_EDMA */ #endif /* _DW_EDMA_H */ PK ! � �y dma/ipu-dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2008 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> * * Copyright (C) 2005-2007 Freescale Semiconductor, Inc. */ #ifndef __LINUX_DMA_IPU_DMA_H #define __LINUX_DMA_IPU_DMA_H #include <linux/types.h> #include <linux/dmaengine.h> /* IPU DMA Controller channel definitions. */ enum ipu_channel { IDMAC_IC_0 = 0, /* IC (encoding task) to memory */ IDMAC_IC_1 = 1, /* IC (viewfinder task) to memory */ IDMAC_ADC_0 = 1, IDMAC_IC_2 = 2, IDMAC_ADC_1 = 2, IDMAC_IC_3 = 3, IDMAC_IC_4 = 4, IDMAC_IC_5 = 5, IDMAC_IC_6 = 6, IDMAC_IC_7 = 7, /* IC (sensor data) to memory */ IDMAC_IC_8 = 8, IDMAC_IC_9 = 9, IDMAC_IC_10 = 10, IDMAC_IC_11 = 11, IDMAC_IC_12 = 12, IDMAC_IC_13 = 13, IDMAC_SDC_0 = 14, /* Background synchronous display data */ IDMAC_SDC_1 = 15, /* Foreground data (overlay) */ IDMAC_SDC_2 = 16, IDMAC_SDC_3 = 17, IDMAC_ADC_2 = 18, IDMAC_ADC_3 = 19, IDMAC_ADC_4 = 20, IDMAC_ADC_5 = 21, IDMAC_ADC_6 = 22, IDMAC_ADC_7 = 23, IDMAC_PF_0 = 24, IDMAC_PF_1 = 25, IDMAC_PF_2 = 26, IDMAC_PF_3 = 27, IDMAC_PF_4 = 28, IDMAC_PF_5 = 29, IDMAC_PF_6 = 30, IDMAC_PF_7 = 31, }; /* Order significant! */ enum ipu_channel_status { IPU_CHANNEL_FREE, IPU_CHANNEL_INITIALIZED, IPU_CHANNEL_READY, IPU_CHANNEL_ENABLED, }; #define IPU_CHANNELS_NUM 32 enum pixel_fmt { /* 1 byte */ IPU_PIX_FMT_GENERIC, IPU_PIX_FMT_RGB332, IPU_PIX_FMT_YUV420P, IPU_PIX_FMT_YUV422P, IPU_PIX_FMT_YUV420P2, IPU_PIX_FMT_YVU422P, /* 2 bytes */ IPU_PIX_FMT_RGB565, IPU_PIX_FMT_RGB666, IPU_PIX_FMT_BGR666, IPU_PIX_FMT_YUYV, IPU_PIX_FMT_UYVY, /* 3 bytes */ IPU_PIX_FMT_RGB24, IPU_PIX_FMT_BGR24, /* 4 bytes */ IPU_PIX_FMT_GENERIC_32, IPU_PIX_FMT_RGB32, IPU_PIX_FMT_BGR32, IPU_PIX_FMT_ABGR32, IPU_PIX_FMT_BGRA32, IPU_PIX_FMT_RGBA32, }; enum ipu_color_space { IPU_COLORSPACE_RGB, IPU_COLORSPACE_YCBCR, IPU_COLORSPACE_YUV }; /* * Enumeration of IPU rotation modes */ enum ipu_rotate_mode { /* Note the enum values correspond to BAM value */ IPU_ROTATE_NONE = 0, IPU_ROTATE_VERT_FLIP = 1, IPU_ROTATE_HORIZ_FLIP = 2, IPU_ROTATE_180 = 3, IPU_ROTATE_90_RIGHT = 4, IPU_ROTATE_90_RIGHT_VFLIP = 5, IPU_ROTATE_90_RIGHT_HFLIP = 6, IPU_ROTATE_90_LEFT = 7, }; /* * Enumeration of DI ports for ADC. */ enum display_port { DISP0, DISP1, DISP2, DISP3 }; struct idmac_video_param { unsigned short in_width; unsigned short in_height; uint32_t in_pixel_fmt; unsigned short out_width; unsigned short out_height; uint32_t out_pixel_fmt; unsigned short out_stride; bool graphics_combine_en; bool global_alpha_en; bool key_color_en; enum display_port disp; unsigned short out_left; unsigned short out_top; }; /* * Union of initialization parameters for a logical channel. So far only video * parameters are used. */ union ipu_channel_param { struct idmac_video_param video; }; struct idmac_tx_desc { struct dma_async_tx_descriptor txd; struct scatterlist *sg; /* scatterlist for this */ unsigned int sg_len; /* tx-descriptor. */ struct list_head list; }; struct idmac_channel { struct dma_chan dma_chan; dma_cookie_t completed; /* last completed cookie */ union ipu_channel_param params; enum ipu_channel link; /* input channel, linked to the output */ enum ipu_channel_status status; void *client; /* Only one client per channel */ unsigned int n_tx_desc; struct idmac_tx_desc *desc; /* allocated tx-descriptors */ struct scatterlist *sg[2]; /* scatterlist elements in buffer-0 and -1 */ struct list_head free_list; /* free tx-descriptors */ struct list_head queue; /* queued tx-descriptors */ spinlock_t lock; /* protects sg[0,1], queue */ struct mutex chan_mutex; /* protects status, cookie, free_list */ bool sec_chan_en; int active_buffer; unsigned int eof_irq; char eof_name[16]; /* EOF IRQ name for request_irq() */ }; #define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd) #define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan) #endif /* __LINUX_DMA_IPU_DMA_H */ PK ! bb� dma/mxs-dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _MXS_DMA_H_ #define _MXS_DMA_H_ #include <linux/dmaengine.h> #define MXS_DMA_CTRL_WAIT4END BIT(31) #define MXS_DMA_CTRL_WAIT4RDY BIT(30) /* * The mxs dmaengine can do PIO transfers. We pass a pointer to the PIO words * in the second argument to dmaengine_prep_slave_sg when the direction is * set to DMA_TRANS_NONE. To make this clear and to prevent users from doing * the error prone casting we have this wrapper function */ static inline struct dma_async_tx_descriptor *mxs_dmaengine_prep_pio( struct dma_chan *chan, u32 *pio, unsigned int npio, enum dma_transfer_direction dir, unsigned long flags) { return dmaengine_prep_slave_sg(chan, (struct scatterlist *)pio, npio, dir, flags); } #endif /* _MXS_DMA_H_ */ PK ! K y� � dma/dw.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Driver for the Synopsys DesignWare DMA Controller * * Copyright (C) 2007 Atmel Corporation * Copyright (C) 2010-2011 ST Microelectronics * Copyright (C) 2014 Intel Corporation */ #ifndef _DMA_DW_H #define _DMA_DW_H #include <linux/clk.h> #include <linux/device.h> #include <linux/dmaengine.h> #include <linux/platform_data/dma-dw.h> struct dw_dma; /** * struct dw_dma_chip - representation of DesignWare DMA controller hardware * @dev: struct device of the DMA controller * @id: instance ID * @irq: irq line * @regs: memory mapped I/O space * @clk: hclk clock * @dw: struct dw_dma that is filed by dw_dma_probe() * @pdata: pointer to platform data */ struct dw_dma_chip { struct device *dev; int id; int irq; void __iomem *regs; struct clk *clk; struct dw_dma *dw; const struct dw_dma_platform_data *pdata; }; /* Export to the platform drivers */ #if IS_ENABLED(CONFIG_DW_DMAC_CORE) int dw_dma_probe(struct dw_dma_chip *chip); int dw_dma_remove(struct dw_dma_chip *chip); int idma32_dma_probe(struct dw_dma_chip *chip); int idma32_dma_remove(struct dw_dma_chip *chip); #else static inline int dw_dma_probe(struct dw_dma_chip *chip) { return -ENODEV; } static inline int dw_dma_remove(struct dw_dma_chip *chip) { return 0; } static inline int idma32_dma_probe(struct dw_dma_chip *chip) { return -ENODEV; } static inline int idma32_dma_remove(struct dw_dma_chip *chip) { return 0; } #endif /* CONFIG_DW_DMAC_CORE */ #endif /* _DMA_DW_H */ PK ! �eX� � dma/sprd-dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _SPRD_DMA_H_ #define _SPRD_DMA_H_ #define SPRD_DMA_REQ_SHIFT 8 #define SPRD_DMA_TRG_MODE_SHIFT 16 #define SPRD_DMA_CHN_MODE_SHIFT 24 #define SPRD_DMA_FLAGS(chn_mode, trg_mode, req_mode, int_type) \ ((chn_mode) << SPRD_DMA_CHN_MODE_SHIFT | \ (trg_mode) << SPRD_DMA_TRG_MODE_SHIFT | \ (req_mode) << SPRD_DMA_REQ_SHIFT | (int_type)) /* * The Spreadtrum DMA controller supports channel 2-stage tansfer, that means * we can request 2 dma channels, one for source channel, and another one for * destination channel. Each channel is independent, and has its own * configurations. Once the source channel's transaction is done, it will * trigger the destination channel's transaction automatically by hardware * signal. * * To support 2-stage tansfer, we must configure the channel mode and trigger * mode as below definition. */ /* * enum sprd_dma_chn_mode: define the DMA channel mode for 2-stage transfer * @SPRD_DMA_CHN_MODE_NONE: No channel mode setting which means channel doesn't * support the 2-stage transfer. * @SPRD_DMA_SRC_CHN0: Channel used as source channel 0. * @SPRD_DMA_SRC_CHN1: Channel used as source channel 1. * @SPRD_DMA_DST_CHN0: Channel used as destination channel 0. * @SPRD_DMA_DST_CHN1: Channel used as destination channel 1. * * Now the DMA controller can supports 2 groups 2-stage transfer. */ enum sprd_dma_chn_mode { SPRD_DMA_CHN_MODE_NONE, SPRD_DMA_SRC_CHN0, SPRD_DMA_SRC_CHN1, SPRD_DMA_DST_CHN0, SPRD_DMA_DST_CHN1, }; /* * enum sprd_dma_trg_mode: define the DMA channel trigger mode for 2-stage * transfer * @SPRD_DMA_NO_TRG: No trigger setting. * @SPRD_DMA_FRAG_DONE_TRG: Trigger the transaction of destination channel * automatically once the source channel's fragment request is done. * @SPRD_DMA_BLOCK_DONE_TRG: Trigger the transaction of destination channel * automatically once the source channel's block request is done. * @SPRD_DMA_TRANS_DONE_TRG: Trigger the transaction of destination channel * automatically once the source channel's transfer request is done. * @SPRD_DMA_LIST_DONE_TRG: Trigger the transaction of destination channel * automatically once the source channel's link-list request is done. */ enum sprd_dma_trg_mode { SPRD_DMA_NO_TRG, SPRD_DMA_FRAG_DONE_TRG, SPRD_DMA_BLOCK_DONE_TRG, SPRD_DMA_TRANS_DONE_TRG, SPRD_DMA_LIST_DONE_TRG, }; /* * enum sprd_dma_req_mode: define the DMA request mode * @SPRD_DMA_FRAG_REQ: fragment request mode * @SPRD_DMA_BLK_REQ: block request mode * @SPRD_DMA_TRANS_REQ: transaction request mode * @SPRD_DMA_LIST_REQ: link-list request mode * * We have 4 types request mode: fragment mode, block mode, transaction mode * and linklist mode. One transaction can contain several blocks, one block can * contain several fragments. Link-list mode means we can save several DMA * configuration into one reserved memory, then DMA can fetch each DMA * configuration automatically to start transfer. */ enum sprd_dma_req_mode { SPRD_DMA_FRAG_REQ, SPRD_DMA_BLK_REQ, SPRD_DMA_TRANS_REQ, SPRD_DMA_LIST_REQ, }; /* * enum sprd_dma_int_type: define the DMA interrupt type * @SPRD_DMA_NO_INT: do not need generate DMA interrupts. * @SPRD_DMA_FRAG_INT: fragment done interrupt when one fragment request * is done. * @SPRD_DMA_BLK_INT: block done interrupt when one block request is done. * @SPRD_DMA_BLK_FRAG_INT: block and fragment interrupt when one fragment * or one block request is done. * @SPRD_DMA_TRANS_INT: tansaction done interrupt when one transaction * request is done. * @SPRD_DMA_TRANS_FRAG_INT: transaction and fragment interrupt when one * transaction request or fragment request is done. * @SPRD_DMA_TRANS_BLK_INT: transaction and block interrupt when one * transaction request or block request is done. * @SPRD_DMA_LIST_INT: link-list done interrupt when one link-list request * is done. * @SPRD_DMA_CFGERR_INT: configure error interrupt when configuration is * incorrect. */ enum sprd_dma_int_type { SPRD_DMA_NO_INT, SPRD_DMA_FRAG_INT, SPRD_DMA_BLK_INT, SPRD_DMA_BLK_FRAG_INT, SPRD_DMA_TRANS_INT, SPRD_DMA_TRANS_FRAG_INT, SPRD_DMA_TRANS_BLK_INT, SPRD_DMA_LIST_INT, SPRD_DMA_CFGERR_INT, }; /* * struct sprd_dma_linklist - DMA link-list address structure * @virt_addr: link-list virtual address to configure link-list node * @phy_addr: link-list physical address to link DMA transfer * @wrap_addr: the wrap address for link-list mode, which means once the * transfer address reaches the wrap address, the next transfer address * will jump to the address specified by wrap_to register. * * The Spreadtrum DMA controller supports the link-list mode, that means slaves * can supply several groups configurations (each configuration represents one * DMA transfer) saved in memory, and DMA controller will link these groups * configurations by writing the physical address of each configuration into the * link-list register. * * Just as shown below, the link-list pointer register will be pointed to the * physical address of 'configuration 1', and the 'configuration 1' link-list * pointer will be pointed to 'configuration 2', and so on. * Once trigger the DMA transfer, the DMA controller will load 'configuration * 1' to its registers automatically, after 'configuration 1' transaction is * done, DMA controller will load 'configuration 2' automatically, until all * DMA transactions are done. * * Note: The last link-list pointer should point to the physical address * of 'configuration 1', which can avoid DMA controller loads incorrect * configuration when the last configuration transaction is done. * * DMA controller linklist memory * ====================== ----------------------- *| | | configuration 1 |<--- *| DMA controller | ------->| | | *| | | | | | *| | | | | | *| | | | | | *| linklist pointer reg |---- ----| linklist pointer | | * ====================== | ----------------------- | * | | * | ----------------------- | * | | configuration 2 | | * --->| | | * | | | * | | | * | | | * ----| linklist pointer | | * | ----------------------- | * | | * | ----------------------- | * | | configuration 3 | | * --->| | | * | | | * | . | | * . | * . | * . | * | . | * | ----------------------- | * | | configuration n | | * --->| | | * | | | * | | | * | | | * | linklist pointer |---- * ----------------------- * * To support the link-list mode, DMA slaves should allocate one segment memory * from always-on IRAM or dma coherent memory to store these groups of DMA * configuration, and pass the virtual and physical address to DMA controller. */ struct sprd_dma_linklist { unsigned long virt_addr; phys_addr_t phy_addr; phys_addr_t wrap_addr; }; #endif PK ! \l�= = dma/k3-event-router.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_EVENT_ROUTER_ #define K3_EVENT_ROUTER_ #include <linux/types.h> struct k3_event_route_data { void *priv; int (*set_event)(void *priv, u32 event); }; #endif /* K3_EVENT_ROUTER_ */ PK ! �|ʫ} } dma/pxa-dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _PXA_DMA_H_ #define _PXA_DMA_H_ enum pxad_chan_prio { PXAD_PRIO_HIGHEST = 0, PXAD_PRIO_NORMAL, PXAD_PRIO_LOW, PXAD_PRIO_LOWEST, }; /** * struct pxad_param - dma channel request parameters * @drcmr: requestor line number * @prio: minimal mandatory priority of the channel * * If a requested channel is granted, its priority will be at least @prio, * ie. if PXAD_PRIO_LOW is required, the requested channel will be either * PXAD_PRIO_LOW, PXAD_PRIO_NORMAL or PXAD_PRIO_HIGHEST. */ struct pxad_param { unsigned int drcmr; enum pxad_chan_prio prio; }; #endif /* _PXA_DMA_H_ */ PK ! }H� � dma/qcom_bam_dma.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. */ #ifndef _QCOM_BAM_DMA_H #define _QCOM_BAM_DMA_H #include <asm/byteorder.h> /* * This data type corresponds to the native Command Element * supported by BAM DMA Engine. * * @cmd_and_addr - upper 8 bits command and lower 24 bits register address. * @data - for write command: content to be written into peripheral register. * for read command: dest addr to write peripheral register value. * @mask - register mask. * @reserved - for future usage. * */ struct bam_cmd_element { __le32 cmd_and_addr; __le32 data; __le32 mask; __le32 reserved; }; /* * This enum indicates the command type in a command element */ enum bam_command_type { BAM_WRITE_COMMAND = 0, BAM_READ_COMMAND, }; /* * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command * element with the data already in le32 format. * * @bam_ce: bam command element * @addr: target address * @cmd: BAM command * @data: actual data for write and dest addr for read in le32 */ static inline void bam_prep_ce_le32(struct bam_cmd_element *bam_ce, u32 addr, enum bam_command_type cmd, __le32 data) { bam_ce->cmd_and_addr = cpu_to_le32((addr & 0xffffff) | ((cmd & 0xff) << 24)); bam_ce->data = data; bam_ce->mask = cpu_to_le32(0xffffffff); } /* * bam_prep_ce - Wrapper function to prepare a single BAM command element * with the data. * * @bam_ce: BAM command element * @addr: target address * @cmd: BAM command * @data: actual data for write and dest addr for read */ static inline void bam_prep_ce(struct bam_cmd_element *bam_ce, u32 addr, enum bam_command_type cmd, u32 data) { bam_prep_ce_le32(bam_ce, addr, cmd, cpu_to_le32(data)); } #endif PK ! r��� � yam.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /*****************************************************************************/ /* * yam.h -- YAM radio modem driver. * * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr) * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch) * * Please note that the GPL allows you to use the driver, NOT the radio. * In order to use the radio, you need a license from the communications * authority of your country. */ /*****************************************************************************/ #define SIOCYAMRESERVED (0) #define SIOCYAMSCFG (1) /* Set configuration */ #define SIOCYAMGCFG (2) /* Get configuration */ #define SIOCYAMSMCS (3) /* Set mcs data */ #define YAM_IOBASE (1 << 0) #define YAM_IRQ (1 << 1) #define YAM_BITRATE (1 << 2) /* Bit rate of radio port ->57600 */ #define YAM_MODE (1 << 3) /* 0=simplex 1=duplex 2=duplex+tempo */ #define YAM_HOLDDLY (1 << 4) /* duplex tempo (sec) */ #define YAM_TXDELAY (1 << 5) /* Tx Delay (ms) */ #define YAM_TXTAIL (1 << 6) /* Tx Tail (ms) */ #define YAM_PERSIST (1 << 7) /* Persist (ms) */ #define YAM_SLOTTIME (1 << 8) /* Slottime (ms) */ #define YAM_BAUDRATE (1 << 9) /* Baud rate of rs232 port ->115200 */ #define YAM_MAXBITRATE 57600 #define YAM_MAXBAUDRATE 115200 #define YAM_MAXMODE 2 #define YAM_MAXHOLDDLY 99 #define YAM_MAXTXDELAY 999 #define YAM_MAXTXTAIL 999 #define YAM_MAXPERSIST 255 #define YAM_MAXSLOTTIME 999 #define YAM_FPGA_SIZE 5302 struct yamcfg { unsigned int mask; /* Mask of commands */ unsigned int iobase; /* IO Base of COM port */ unsigned int irq; /* IRQ of COM port */ unsigned int bitrate; /* Bit rate of radio port */ unsigned int baudrate; /* Baud rate of the RS232 port */ unsigned int txdelay; /* TxDelay */ unsigned int txtail; /* TxTail */ unsigned int persist; /* Persistence */ unsigned int slottime; /* Slottime */ unsigned int mode; /* mode 0 (simp), 1(Dupl), 2(Dupl+delay) */ unsigned int holddly; /* PTT delay in FullDuplex 2 mode */ }; struct yamdrv_ioctl_cfg { int cmd; struct yamcfg cfg; }; struct yamdrv_ioctl_mcs { int cmd; unsigned int bitrate; unsigned char bits[YAM_FPGA_SIZE]; }; PK ! ��S\ ns_common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_NS_COMMON_H #define _LINUX_NS_COMMON_H #include <linux/refcount.h> struct proc_ns_operations; struct ns_common { atomic_long_t stashed; const struct proc_ns_operations *ops; unsigned int inum; refcount_t count; }; #endif PK ! �A�] ] nsproxy.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_NSPROXY_H #define _LINUX_NSPROXY_H #include <linux/spinlock.h> #include <linux/sched.h> struct mnt_namespace; struct uts_namespace; struct ipc_namespace; struct pid_namespace; struct cgroup_namespace; struct fs_struct; /* * A structure to contain pointers to all per-process * namespaces - fs (mount), uts, network, sysvipc, etc. * * The pid namespace is an exception -- it's accessed using * task_active_pid_ns. The pid namespace here is the * namespace that children will use. * * 'count' is the number of tasks holding a reference. * The count for each namespace, then, will be the number * of nsproxies pointing to it, not the number of tasks. * * The nsproxy is shared by tasks which share all namespaces. * As soon as a single namespace is cloned or unshared, the * nsproxy is copied. */ struct nsproxy { atomic_t count; struct uts_namespace *uts_ns; struct ipc_namespace *ipc_ns; struct mnt_namespace *mnt_ns; struct pid_namespace *pid_ns_for_children; struct net *net_ns; struct time_namespace *time_ns; struct time_namespace *time_ns_for_children; struct cgroup_namespace *cgroup_ns; }; extern struct nsproxy init_nsproxy; /* * A structure to encompass all bits needed to install * a partial or complete new set of namespaces. * * If a new user namespace is requested cred will * point to a modifiable set of credentials. If a pointer * to a modifiable set is needed nsset_cred() must be * used and tested. */ struct nsset { unsigned flags; struct nsproxy *nsproxy; struct fs_struct *fs; const struct cred *cred; }; static inline struct cred *nsset_cred(struct nsset *set) { if (set->flags & CLONE_NEWUSER) return (struct cred *)set->cred; return NULL; } /* * the namespaces access rules are: * * 1. only current task is allowed to change tsk->nsproxy pointer or * any pointer on the nsproxy itself. Current must hold the task_lock * when changing tsk->nsproxy. * * 2. when accessing (i.e. reading) current task's namespaces - no * precautions should be taken - just dereference the pointers * * 3. the access to other task namespaces is performed like this * task_lock(task); * nsproxy = task->nsproxy; * if (nsproxy != NULL) { * / * * * work with the namespaces here * * e.g. get the reference on one of them * * / * } / * * * NULL task->nsproxy means that this task is * * almost dead (zombie) * * / * task_unlock(task); * */ int copy_namespaces(unsigned long flags, struct task_struct *tsk); void exit_task_namespaces(struct task_struct *tsk); void switch_task_namespaces(struct task_struct *tsk, struct nsproxy *new); void free_nsproxy(struct nsproxy *ns); int unshare_nsproxy_namespaces(unsigned long, struct nsproxy **, struct cred *, struct fs_struct *); int __init nsproxy_cache_init(void); static inline void put_nsproxy(struct nsproxy *ns) { if (atomic_dec_and_test(&ns->count)) { free_nsproxy(ns); } } static inline void get_nsproxy(struct nsproxy *ns) { atomic_inc(&ns->count); } #endif PK ! �Lnz� � fiemap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FIEMAP_H #define _LINUX_FIEMAP_H 1 #include <uapi/linux/fiemap.h> #include <linux/fs.h> struct fiemap_extent_info { unsigned int fi_flags; /* Flags as passed from user */ unsigned int fi_extents_mapped; /* Number of mapped extents */ unsigned int fi_extents_max; /* Size of fiemap_extent array */ struct fiemap_extent __user *fi_extents_start; /* Start of fiemap_extent array */ }; int fiemap_prep(struct inode *inode, struct fiemap_extent_info *fieinfo, u64 start, u64 *len, u32 supported_flags); int fiemap_fill_next_extent(struct fiemap_extent_info *info, u64 logical, u64 phys, u64 len, u32 flags); #endif /* _LINUX_FIEMAP_H 1 */ PK ! \��[u u memremap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_MEMREMAP_H_ #define _LINUX_MEMREMAP_H_ #include <linux/range.h> #include <linux/ioport.h> #include <linux/percpu-refcount.h> struct resource; struct device; /** * struct vmem_altmap - pre-allocated storage for vmemmap_populate * @base_pfn: base of the entire dev_pagemap mapping * @reserve: pages mapped, but reserved for driver use (relative to @base) * @free: free pages set aside in the mapping for memmap storage * @align: pages reserved to meet allocation alignments * @alloc: track pages consumed, private to vmemmap_populate() */ struct vmem_altmap { unsigned long base_pfn; const unsigned long end_pfn; const unsigned long reserve; unsigned long free; unsigned long align; unsigned long alloc; }; /* * Specialize ZONE_DEVICE memory into multiple types each has a different * usage. * * MEMORY_DEVICE_PRIVATE: * Device memory that is not directly addressable by the CPU: CPU can neither * read nor write private memory. In this case, we do still have struct pages * backing the device memory. Doing so simplifies the implementation, but it is * important to remember that there are certain points at which the struct page * must be treated as an opaque object, rather than a "normal" struct page. * * A more complete discussion of unaddressable memory may be found in * include/linux/hmm.h and Documentation/vm/hmm.rst. * * MEMORY_DEVICE_FS_DAX: * Host memory that has similar access semantics as System RAM i.e. DMA * coherent and supports page pinning. In support of coordinating page * pinning vs other operations MEMORY_DEVICE_FS_DAX arranges for a * wakeup event whenever a page is unpinned and becomes idle. This * wakeup is used to coordinate physical address space management (ex: * fs truncate/hole punch) vs pinned pages (ex: device dma). * * MEMORY_DEVICE_GENERIC: * Host memory that has similar access semantics as System RAM i.e. DMA * coherent and supports page pinning. This is for example used by DAX devices * that expose memory using a character device. * * MEMORY_DEVICE_PCI_P2PDMA: * Device memory residing in a PCI BAR intended for use with Peer-to-Peer * transactions. */ enum memory_type { /* 0 is reserved to catch uninitialized type fields */ MEMORY_DEVICE_PRIVATE = 1, MEMORY_DEVICE_FS_DAX, MEMORY_DEVICE_GENERIC, MEMORY_DEVICE_PCI_P2PDMA, }; struct dev_pagemap_ops { /* * Called once the page refcount reaches 1. (ZONE_DEVICE pages never * reach 0 refcount unless there is a refcount bug. This allows the * device driver to implement its own memory management.) */ void (*page_free)(struct page *page); /* * Used for private (un-addressable) device memory only. Must migrate * the page back to a CPU accessible page. */ vm_fault_t (*migrate_to_ram)(struct vm_fault *vmf); }; #define PGMAP_ALTMAP_VALID (1 << 0) /** * struct dev_pagemap - metadata for ZONE_DEVICE mappings * @altmap: pre-allocated/reserved memory for vmemmap allocations * @ref: reference count that pins the devm_memremap_pages() mapping * @done: completion for @ref * @type: memory type: see MEMORY_* in memory_hotplug.h * @flags: PGMAP_* flags to specify defailed behavior * @ops: method table * @owner: an opaque pointer identifying the entity that manages this * instance. Used by various helpers to make sure that no * foreign ZONE_DEVICE memory is accessed. * @nr_range: number of ranges to be mapped * @range: range to be mapped when nr_range == 1 * @ranges: array of ranges to be mapped when nr_range > 1 */ struct dev_pagemap { struct vmem_altmap altmap; struct percpu_ref ref; struct completion done; enum memory_type type; unsigned int flags; const struct dev_pagemap_ops *ops; void *owner; int nr_range; union { struct range range; struct range ranges[0]; }; }; static inline struct vmem_altmap *pgmap_altmap(struct dev_pagemap *pgmap) { if (pgmap->flags & PGMAP_ALTMAP_VALID) return &pgmap->altmap; return NULL; } #ifdef CONFIG_ZONE_DEVICE void *memremap_pages(struct dev_pagemap *pgmap, int nid); void memunmap_pages(struct dev_pagemap *pgmap); void *devm_memremap_pages(struct device *dev, struct dev_pagemap *pgmap); void devm_memunmap_pages(struct device *dev, struct dev_pagemap *pgmap); struct dev_pagemap *get_dev_pagemap(unsigned long pfn, struct dev_pagemap *pgmap); bool pgmap_pfn_valid(struct dev_pagemap *pgmap, unsigned long pfn); unsigned long vmem_altmap_offset(struct vmem_altmap *altmap); void vmem_altmap_free(struct vmem_altmap *altmap, unsigned long nr_pfns); unsigned long memremap_compat_align(void); #else static inline void *devm_memremap_pages(struct device *dev, struct dev_pagemap *pgmap) { /* * Fail attempts to call devm_memremap_pages() without * ZONE_DEVICE support enabled, this requires callers to fall * back to plain devm_memremap() based on config */ WARN_ON_ONCE(1); return ERR_PTR(-ENXIO); } static inline void devm_memunmap_pages(struct device *dev, struct dev_pagemap *pgmap) { } static inline struct dev_pagemap *get_dev_pagemap(unsigned long pfn, struct dev_pagemap *pgmap) { return NULL; } static inline bool pgmap_pfn_valid(struct dev_pagemap *pgmap, unsigned long pfn) { return false; } static inline unsigned long vmem_altmap_offset(struct vmem_altmap *altmap) { return 0; } static inline void vmem_altmap_free(struct vmem_altmap *altmap, unsigned long nr_pfns) { } /* when memremap_pages() is disabled all archs can remap a single page */ static inline unsigned long memremap_compat_align(void) { return PAGE_SIZE; } #endif /* CONFIG_ZONE_DEVICE */ static inline void put_dev_pagemap(struct dev_pagemap *pgmap) { if (pgmap) percpu_ref_put(&pgmap->ref); } #endif /* _LINUX_MEMREMAP_H_ */ PK ! � ��N N purgatory.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PURGATORY_H #define _LINUX_PURGATORY_H #include <linux/types.h> #include <crypto/sha2.h> #include <uapi/linux/kexec.h> struct kexec_sha_region { unsigned long start; unsigned long len; }; /* * These forward declarations serve two purposes: * * 1) Make sparse happy when checking arch/purgatory * 2) Document that these are required to be global so the symbol * lookup in kexec works */ extern struct kexec_sha_region purgatory_sha_regions[KEXEC_SEGMENT_MAX]; extern u8 purgatory_sha256_digest[SHA256_DIGEST_SIZE]; #endif PK ! �ϩ��Q �Q serial_core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * linux/drivers/char/serial_core.h * * Copyright (C) 2000 Deep Blue Solutions Ltd. */ #ifndef LINUX_SERIAL_CORE_H #define LINUX_SERIAL_CORE_H #include <linux/bitops.h> #include <linux/compiler.h> #include <linux/console.h> #include <linux/interrupt.h> #include <linux/circ_buf.h> #include <linux/spinlock.h> #include <linux/sched.h> #include <linux/tty.h> #include <linux/mutex.h> #include <linux/sysrq.h> #include <uapi/linux/serial_core.h> #ifdef CONFIG_SERIAL_CORE_CONSOLE #define uart_console(port) \ ((port)->cons && (port)->cons->index == (port)->line) #else #define uart_console(port) ({ (void)port; 0; }) #endif struct uart_port; struct serial_struct; struct device; struct gpio_desc; /* * This structure describes all the operations that can be done on the * physical hardware. See Documentation/driver-api/serial/driver.rst for details. */ struct uart_ops { unsigned int (*tx_empty)(struct uart_port *); void (*set_mctrl)(struct uart_port *, unsigned int mctrl); unsigned int (*get_mctrl)(struct uart_port *); void (*stop_tx)(struct uart_port *); void (*start_tx)(struct uart_port *); void (*throttle)(struct uart_port *); void (*unthrottle)(struct uart_port *); void (*send_xchar)(struct uart_port *, char ch); void (*stop_rx)(struct uart_port *); void (*enable_ms)(struct uart_port *); void (*break_ctl)(struct uart_port *, int ctl); int (*startup)(struct uart_port *); void (*shutdown)(struct uart_port *); void (*flush_buffer)(struct uart_port *); void (*set_termios)(struct uart_port *, struct ktermios *new, struct ktermios *old); void (*set_ldisc)(struct uart_port *, struct ktermios *); void (*pm)(struct uart_port *, unsigned int state, unsigned int oldstate); /* * Return a string describing the type of the port */ const char *(*type)(struct uart_port *); /* * Release IO and memory resources used by the port. * This includes iounmap if necessary. */ void (*release_port)(struct uart_port *); /* * Request IO and memory resources used by the port. * This includes iomapping the port if necessary. */ int (*request_port)(struct uart_port *); void (*config_port)(struct uart_port *, int); int (*verify_port)(struct uart_port *, struct serial_struct *); int (*ioctl)(struct uart_port *, unsigned int, unsigned long); #ifdef CONFIG_CONSOLE_POLL int (*poll_init)(struct uart_port *); void (*poll_put_char)(struct uart_port *, unsigned char); int (*poll_get_char)(struct uart_port *); #endif }; #define NO_POLL_CHAR 0x00ff0000 #define UART_CONFIG_TYPE (1 << 0) #define UART_CONFIG_IRQ (1 << 1) struct uart_icount { __u32 cts; __u32 dsr; __u32 rng; __u32 dcd; __u32 rx; __u32 tx; __u32 frame; __u32 overrun; __u32 parity; __u32 brk; __u32 buf_overrun; }; typedef u64 __bitwise upf_t; typedef unsigned int __bitwise upstat_t; struct uart_port { spinlock_t lock; /* port lock */ unsigned long iobase; /* in/out[bwl] */ unsigned char __iomem *membase; /* read/write[bwl] */ unsigned int (*serial_in)(struct uart_port *, int); void (*serial_out)(struct uart_port *, int, int); void (*set_termios)(struct uart_port *, struct ktermios *new, struct ktermios *old); void (*set_ldisc)(struct uart_port *, struct ktermios *); unsigned int (*get_mctrl)(struct uart_port *); void (*set_mctrl)(struct uart_port *, unsigned int); unsigned int (*get_divisor)(struct uart_port *, unsigned int baud, unsigned int *frac); void (*set_divisor)(struct uart_port *, unsigned int baud, unsigned int quot, unsigned int quot_frac); int (*startup)(struct uart_port *port); void (*shutdown)(struct uart_port *port); void (*throttle)(struct uart_port *port); void (*unthrottle)(struct uart_port *port); int (*handle_irq)(struct uart_port *); void (*pm)(struct uart_port *, unsigned int state, unsigned int old); void (*handle_break)(struct uart_port *); int (*rs485_config)(struct uart_port *, struct serial_rs485 *rs485); int (*iso7816_config)(struct uart_port *, struct serial_iso7816 *iso7816); unsigned int irq; /* irq number */ unsigned long irqflags; /* irq flags */ unsigned int uartclk; /* base uart clock */ unsigned int fifosize; /* tx fifo size */ unsigned char x_char; /* xon/xoff char */ unsigned char regshift; /* reg offset shift */ unsigned char iotype; /* io access style */ unsigned char quirks; /* internal quirks */ #define UPIO_PORT (SERIAL_IO_PORT) /* 8b I/O port access */ #define UPIO_HUB6 (SERIAL_IO_HUB6) /* Hub6 ISA card */ #define UPIO_MEM (SERIAL_IO_MEM) /* driver-specific */ #define UPIO_MEM32 (SERIAL_IO_MEM32) /* 32b little endian */ #define UPIO_AU (SERIAL_IO_AU) /* Au1x00 and RT288x type IO */ #define UPIO_TSI (SERIAL_IO_TSI) /* Tsi108/109 type IO */ #define UPIO_MEM32BE (SERIAL_IO_MEM32BE) /* 32b big endian */ #define UPIO_MEM16 (SERIAL_IO_MEM16) /* 16b little endian */ /* quirks must be updated while holding port mutex */ #define UPQ_NO_TXEN_TEST BIT(0) unsigned int read_status_mask; /* driver specific */ unsigned int ignore_status_mask; /* driver specific */ struct uart_state *state; /* pointer to parent state */ struct uart_icount icount; /* statistics */ struct console *cons; /* struct console, if any */ /* flags must be updated while holding port mutex */ upf_t flags; /* * These flags must be equivalent to the flags defined in * include/uapi/linux/tty_flags.h which are the userspace definitions * assigned from the serial_struct flags in uart_set_info() * [for bit definitions in the UPF_CHANGE_MASK] * * Bits [0..UPF_LAST_USER] are userspace defined/visible/changeable * The remaining bits are serial-core specific and not modifiable by * userspace. */ #define UPF_FOURPORT ((__force upf_t) ASYNC_FOURPORT /* 1 */ ) #define UPF_SAK ((__force upf_t) ASYNC_SAK /* 2 */ ) #define UPF_SPD_HI ((__force upf_t) ASYNC_SPD_HI /* 4 */ ) #define UPF_SPD_VHI ((__force upf_t) ASYNC_SPD_VHI /* 5 */ ) #define UPF_SPD_CUST ((__force upf_t) ASYNC_SPD_CUST /* 0x0030 */ ) #define UPF_SPD_WARP ((__force upf_t) ASYNC_SPD_WARP /* 0x1010 */ ) #define UPF_SPD_MASK ((__force upf_t) ASYNC_SPD_MASK /* 0x1030 */ ) #define UPF_SKIP_TEST ((__force upf_t) ASYNC_SKIP_TEST /* 6 */ ) #define UPF_AUTO_IRQ ((__force upf_t) ASYNC_AUTO_IRQ /* 7 */ ) #define UPF_HARDPPS_CD ((__force upf_t) ASYNC_HARDPPS_CD /* 11 */ ) #define UPF_SPD_SHI ((__force upf_t) ASYNC_SPD_SHI /* 12 */ ) #define UPF_LOW_LATENCY ((__force upf_t) ASYNC_LOW_LATENCY /* 13 */ ) #define UPF_BUGGY_UART ((__force upf_t) ASYNC_BUGGY_UART /* 14 */ ) #define UPF_MAGIC_MULTIPLIER ((__force upf_t) ASYNC_MAGIC_MULTIPLIER /* 16 */ ) #define UPF_NO_THRE_TEST ((__force upf_t) (1 << 19)) /* Port has hardware-assisted h/w flow control */ #define UPF_AUTO_CTS ((__force upf_t) (1 << 20)) #define UPF_AUTO_RTS ((__force upf_t) (1 << 21)) #define UPF_HARD_FLOW ((__force upf_t) (UPF_AUTO_CTS | UPF_AUTO_RTS)) /* Port has hardware-assisted s/w flow control */ #define UPF_SOFT_FLOW ((__force upf_t) (1 << 22)) #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) #define UPF_EXAR_EFR ((__force upf_t) (1 << 25)) #define UPF_BUG_THRE ((__force upf_t) (1 << 26)) /* The exact UART type is known and should not be probed. */ #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) #define UPF_DEAD ((__force upf_t) (1 << 30)) #define UPF_IOREMAP ((__force upf_t) (1 << 31)) #define UPF_FULL_PROBE ((__force upf_t) (1ULL << 32)) #define __UPF_CHANGE_MASK 0x17fff #define UPF_CHANGE_MASK ((__force upf_t) __UPF_CHANGE_MASK) #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) #if __UPF_CHANGE_MASK > ASYNC_FLAGS #error Change mask not equivalent to userspace-visible bit defines #endif /* * Must hold termios_rwsem, port mutex and port lock to change; * can hold any one lock to read. */ upstat_t status; #define UPSTAT_CTS_ENABLE ((__force upstat_t) (1 << 0)) #define UPSTAT_DCD_ENABLE ((__force upstat_t) (1 << 1)) #define UPSTAT_AUTORTS ((__force upstat_t) (1 << 2)) #define UPSTAT_AUTOCTS ((__force upstat_t) (1 << 3)) #define UPSTAT_AUTOXOFF ((__force upstat_t) (1 << 4)) #define UPSTAT_SYNC_FIFO ((__force upstat_t) (1 << 5)) int hw_stopped; /* sw-assisted CTS flow state */ unsigned int mctrl; /* current modem ctrl settings */ unsigned int timeout; /* character-based timeout */ unsigned int type; /* port type */ const struct uart_ops *ops; unsigned int custom_divisor; unsigned int line; /* port index */ unsigned int minor; resource_size_t mapbase; /* for ioremap */ resource_size_t mapsize; struct device *dev; /* parent device */ unsigned long sysrq; /* sysrq timeout */ unsigned int sysrq_ch; /* char for sysrq */ unsigned char has_sysrq; unsigned char sysrq_seq; /* index in sysrq_toggle_seq */ unsigned char hub6; /* this should be in the 8250 driver */ unsigned char suspended; unsigned char console_reinit; const char *name; /* port name */ struct attribute_group *attr_group; /* port specific attributes */ const struct attribute_group **tty_groups; /* all attributes (serial core use only) */ struct serial_rs485 rs485; const struct serial_rs485 *rs485_supported; /* Supported mask for serial_rs485 */ struct gpio_desc *rs485_term_gpio; /* enable RS485 bus termination */ struct serial_iso7816 iso7816; void *private_data; /* generic platform data pointer */ }; /** * uart_port_lock - Lock the UART port * @up: Pointer to UART port structure */ static inline void uart_port_lock(struct uart_port *up) { spin_lock(&up->lock); } /** * uart_port_lock_irq - Lock the UART port and disable interrupts * @up: Pointer to UART port structure */ static inline void uart_port_lock_irq(struct uart_port *up) { spin_lock_irq(&up->lock); } /** * uart_port_lock_irqsave - Lock the UART port, save and disable interrupts * @up: Pointer to UART port structure * @flags: Pointer to interrupt flags storage */ static inline void uart_port_lock_irqsave(struct uart_port *up, unsigned long *flags) { spin_lock_irqsave(&up->lock, *flags); } /** * uart_port_trylock - Try to lock the UART port * @up: Pointer to UART port structure * * Returns: True if lock was acquired, false otherwise */ static inline bool uart_port_trylock(struct uart_port *up) { return spin_trylock(&up->lock); } /** * uart_port_trylock_irqsave - Try to lock the UART port, save and disable interrupts * @up: Pointer to UART port structure * @flags: Pointer to interrupt flags storage * * Returns: True if lock was acquired, false otherwise */ static inline bool uart_port_trylock_irqsave(struct uart_port *up, unsigned long *flags) { return spin_trylock_irqsave(&up->lock, *flags); } /** * uart_port_unlock - Unlock the UART port * @up: Pointer to UART port structure */ static inline void uart_port_unlock(struct uart_port *up) { spin_unlock(&up->lock); } /** * uart_port_unlock_irq - Unlock the UART port and re-enable interrupts * @up: Pointer to UART port structure */ static inline void uart_port_unlock_irq(struct uart_port *up) { spin_unlock_irq(&up->lock); } /** * uart_port_unlock_irqrestore - Unlock the UART port, restore interrupts * @up: Pointer to UART port structure * @flags: The saved interrupt flags for restore */ static inline void uart_port_unlock_irqrestore(struct uart_port *up, unsigned long flags) { spin_unlock_irqrestore(&up->lock, flags); } static inline int serial_port_in(struct uart_port *up, int offset) { return up->serial_in(up, offset); } static inline void serial_port_out(struct uart_port *up, int offset, int value) { up->serial_out(up, offset, value); } /** * enum uart_pm_state - power states for UARTs * @UART_PM_STATE_ON: UART is powered, up and operational * @UART_PM_STATE_OFF: UART is powered off * @UART_PM_STATE_UNDEFINED: sentinel */ enum uart_pm_state { UART_PM_STATE_ON = 0, UART_PM_STATE_OFF = 3, /* number taken from ACPI */ UART_PM_STATE_UNDEFINED, }; /* * This is the state information which is persistent across opens. */ struct uart_state { struct tty_port port; enum uart_pm_state pm_state; struct circ_buf xmit; atomic_t refcount; wait_queue_head_t remove_wait; struct uart_port *uart_port; }; #define UART_XMIT_SIZE PAGE_SIZE /* number of characters left in xmit buffer before we ask for more */ #define WAKEUP_CHARS 256 /** * uart_xmit_advance - Advance xmit buffer and account Tx'ed chars * @up: uart_port structure describing the port * @chars: number of characters sent * * This function advances the tail of circular xmit buffer by the number of * @chars transmitted and handles accounting of transmitted bytes (into * @up's icount.tx). */ static inline void uart_xmit_advance(struct uart_port *up, unsigned int chars) { struct circ_buf *xmit = &up->state->xmit; xmit->tail = (xmit->tail + chars) & (UART_XMIT_SIZE - 1); up->icount.tx += chars; } struct module; struct tty_driver; struct uart_driver { struct module *owner; const char *driver_name; const char *dev_name; int major; int minor; int nr; struct console *cons; /* * these are private; the low level driver should not * touch these; they should be initialised to NULL */ struct uart_state *state; struct tty_driver *tty_driver; }; void uart_write_wakeup(struct uart_port *port); /* * Baud rate helpers. */ void uart_update_timeout(struct uart_port *port, unsigned int cflag, unsigned int baud); unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, struct ktermios *old, unsigned int min, unsigned int max); unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); /* Base timer interval for polling */ static inline int uart_poll_timeout(struct uart_port *port) { int timeout = port->timeout; return timeout > 6 ? (timeout / 2 - 2) : 1; } /* * Console helpers. */ struct earlycon_device { struct console *con; struct uart_port port; char options[16]; /* e.g., 115200n8 */ unsigned int baud; }; struct earlycon_id { char name[15]; char name_term; /* In case compiler didn't '\0' term name */ char compatible[128]; int (*setup)(struct earlycon_device *, const char *options); }; extern const struct earlycon_id __earlycon_table[]; extern const struct earlycon_id __earlycon_table_end[]; #if defined(CONFIG_SERIAL_EARLYCON) && !defined(MODULE) #define EARLYCON_USED_OR_UNUSED __used #else #define EARLYCON_USED_OR_UNUSED __maybe_unused #endif #define OF_EARLYCON_DECLARE(_name, compat, fn) \ static const struct earlycon_id __UNIQUE_ID(__earlycon_##_name) \ EARLYCON_USED_OR_UNUSED __section("__earlycon_table") \ __aligned(__alignof__(struct earlycon_id)) \ = { .name = __stringify(_name), \ .compatible = compat, \ .setup = fn } #define EARLYCON_DECLARE(_name, fn) OF_EARLYCON_DECLARE(_name, "", fn) extern int of_setup_earlycon(const struct earlycon_id *match, unsigned long node, const char *options); #ifdef CONFIG_SERIAL_EARLYCON extern bool earlycon_acpi_spcr_enable __initdata; int setup_earlycon(char *buf); #else static const bool earlycon_acpi_spcr_enable EARLYCON_USED_OR_UNUSED; static inline int setup_earlycon(char *buf) { return 0; } #endif static inline bool uart_console_enabled(struct uart_port *port) { return uart_console(port) && (port->cons->flags & CON_ENABLED); } struct uart_port *uart_get_console(struct uart_port *ports, int nr, struct console *c); int uart_parse_earlycon(char *p, unsigned char *iotype, resource_size_t *addr, char **options); void uart_parse_options(const char *options, int *baud, int *parity, int *bits, int *flow); int uart_set_options(struct uart_port *port, struct console *co, int baud, int parity, int bits, int flow); struct tty_driver *uart_console_device(struct console *co, int *index); void uart_console_write(struct uart_port *port, const char *s, unsigned int count, void (*putchar)(struct uart_port *, int)); /* * Port/driver registration/removal */ int uart_register_driver(struct uart_driver *uart); void uart_unregister_driver(struct uart_driver *uart); int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); bool uart_match_port(const struct uart_port *port1, const struct uart_port *port2); /* * Power Management */ int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); int uart_resume_port(struct uart_driver *reg, struct uart_port *port); #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) #define uart_circ_chars_pending(circ) \ (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) #define uart_circ_chars_free(circ) \ (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) static inline int uart_tx_stopped(struct uart_port *port) { struct tty_struct *tty = port->state->port.tty; if ((tty && tty->flow.stopped) || port->hw_stopped) return 1; return 0; } static inline bool uart_cts_enabled(struct uart_port *uport) { return !!(uport->status & UPSTAT_CTS_ENABLE); } static inline bool uart_softcts_mode(struct uart_port *uport) { upstat_t mask = UPSTAT_CTS_ENABLE | UPSTAT_AUTOCTS; return ((uport->status & mask) == UPSTAT_CTS_ENABLE); } /* * The following are helper functions for the low level drivers. */ extern void uart_handle_dcd_change(struct uart_port *uport, unsigned int status); extern void uart_handle_cts_change(struct uart_port *uport, unsigned int status); extern void uart_insert_char(struct uart_port *port, unsigned int status, unsigned int overrun, unsigned int ch, unsigned int flag); void uart_xchar_out(struct uart_port *uport, int offset); #ifdef CONFIG_MAGIC_SYSRQ_SERIAL #define SYSRQ_TIMEOUT (HZ * 5) bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch); static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) { if (!port->sysrq) return 0; if (ch && time_before(jiffies, port->sysrq)) { if (sysrq_mask()) { handle_sysrq(ch); port->sysrq = 0; return 1; } if (uart_try_toggle_sysrq(port, ch)) return 1; } port->sysrq = 0; return 0; } static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int ch) { if (!port->sysrq) return 0; if (ch && time_before(jiffies, port->sysrq)) { if (sysrq_mask()) { port->sysrq_ch = ch; port->sysrq = 0; return 1; } if (uart_try_toggle_sysrq(port, ch)) return 1; } port->sysrq = 0; return 0; } static inline void uart_unlock_and_check_sysrq(struct uart_port *port) { int sysrq_ch; if (!port->has_sysrq) { spin_unlock(&port->lock); return; } sysrq_ch = port->sysrq_ch; port->sysrq_ch = 0; spin_unlock(&port->lock); if (sysrq_ch) handle_sysrq(sysrq_ch); } static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port, unsigned long flags) { int sysrq_ch; if (!port->has_sysrq) { spin_unlock_irqrestore(&port->lock, flags); return; } sysrq_ch = port->sysrq_ch; port->sysrq_ch = 0; spin_unlock_irqrestore(&port->lock, flags); if (sysrq_ch) handle_sysrq(sysrq_ch); } #else /* CONFIG_MAGIC_SYSRQ_SERIAL */ static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) { return 0; } static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int ch) { return 0; } static inline void uart_unlock_and_check_sysrq(struct uart_port *port) { spin_unlock(&port->lock); } static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port, unsigned long flags) { spin_unlock_irqrestore(&port->lock, flags); } #endif /* CONFIG_MAGIC_SYSRQ_SERIAL */ /* * We do the SysRQ and SAK checking like this... */ static inline int uart_handle_break(struct uart_port *port) { struct uart_state *state = port->state; if (port->handle_break) port->handle_break(port); #ifdef CONFIG_MAGIC_SYSRQ_SERIAL if (port->has_sysrq && uart_console(port)) { if (!port->sysrq) { port->sysrq = jiffies + SYSRQ_TIMEOUT; return 1; } port->sysrq = 0; } #endif if (port->flags & UPF_SAK) do_SAK(state->port.tty); return 0; } /* * UART_ENABLE_MS - determine if port should enable modem status irqs */ #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ (cflag) & CRTSCTS || \ !((cflag) & CLOCAL)) int uart_get_rs485_mode(struct uart_port *port); #endif /* LINUX_SERIAL_CORE_H */ PK ! a�'g�, �, pxa2xx_ssp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2003 Russell King, All Rights Reserved. * * This driver supports the following PXA CPU/SSP ports:- * * PXA250 SSP * PXA255 SSP, NSSP * PXA26x SSP, NSSP, ASSP * PXA27x SSP1, SSP2, SSP3 * PXA3xx SSP1, SSP2, SSP3, SSP4 */ #ifndef __LINUX_PXA2XX_SSP_H #define __LINUX_PXA2XX_SSP_H #include <linux/bits.h> #include <linux/compiler_types.h> #include <linux/io.h> #include <linux/kconfig.h> #include <linux/list.h> #include <linux/types.h> struct clk; struct device; struct device_node; /* * SSP Serial Port Registers * PXA250, PXA255, PXA26x and PXA27x SSP controllers are all slightly different. * PXA255, PXA26x and PXA27x have extra ports, registers and bits. */ #define SSCR0 (0x00) /* SSP Control Register 0 */ #define SSCR1 (0x04) /* SSP Control Register 1 */ #define SSSR (0x08) /* SSP Status Register */ #define SSITR (0x0C) /* SSP Interrupt Test Register */ #define SSDR (0x10) /* SSP Data Write/Data Read Register */ #define SSTO (0x28) /* SSP Time Out Register */ #define SSPSP (0x2C) /* SSP Programmable Serial Protocol */ #define SSTSA (0x30) /* SSP Tx Timeslot Active */ #define SSRSA (0x34) /* SSP Rx Timeslot Active */ #define SSTSS (0x38) /* SSP Timeslot Status */ #define SSACD (0x3C) /* SSP Audio Clock Divider */ #define SSACDD (0x40) /* SSP Audio Clock Dither Divider */ /* Common PXA2xx bits first */ #define SSCR0_DSS GENMASK(3, 0) /* Data Size Select (mask) */ #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ #define SSCR0_FRF GENMASK(5, 4) /* FRame Format (mask) */ #define SSCR0_Motorola (0x0 << 4) /* Motorola's Serial Peripheral Interface (SPI) */ #define SSCR0_TI (0x1 << 4) /* Texas Instruments' Synchronous Serial Protocol (SSP) */ #define SSCR0_National (0x2 << 4) /* National Microwire */ #define SSCR0_ECS BIT(6) /* External clock select */ #define SSCR0_SSE BIT(7) /* Synchronous Serial Port Enable */ #define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */ /* PXA27x, PXA3xx */ #define SSCR0_EDSS BIT(20) /* Extended data size select */ #define SSCR0_NCS BIT(21) /* Network clock select */ #define SSCR0_RIM BIT(22) /* Receive FIFO overrun interrupt mask */ #define SSCR0_TUM BIT(23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC GENMASK(26, 24) /* Frame rate divider control (mask) */ #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ #define SSCR0_FPCKE BIT(29) /* FIFO packing enable */ #define SSCR0_ACS BIT(30) /* Audio clock select */ #define SSCR0_MOD BIT(31) /* Mode (normal or network) */ #define SSCR1_RIE BIT(0) /* Receive FIFO Interrupt Enable */ #define SSCR1_TIE BIT(1) /* Transmit FIFO Interrupt Enable */ #define SSCR1_LBM BIT(2) /* Loop-Back Mode */ #define SSCR1_SPO BIT(3) /* Motorola SPI SSPSCLK polarity setting */ #define SSCR1_SPH BIT(4) /* Motorola SPI SSPSCLK phase setting */ #define SSCR1_MWDS BIT(5) /* Microwire Transmit Data Size */ #define SSSR_ALT_FRM_MASK GENMASK(1, 0) /* Masks the SFRM signal number */ #define SSSR_TNF BIT(2) /* Transmit FIFO Not Full */ #define SSSR_RNE BIT(3) /* Receive FIFO Not Empty */ #define SSSR_BSY BIT(4) /* SSP Busy */ #define SSSR_TFS BIT(5) /* Transmit FIFO Service Request */ #define SSSR_RFS BIT(6) /* Receive FIFO Service Request */ #define SSSR_ROR BIT(7) /* Receive FIFO Overrun */ #define RX_THRESH_DFLT 8 #define TX_THRESH_DFLT 8 #define SSSR_TFL_MASK GENMASK(11, 8) /* Transmit FIFO Level mask */ #define SSSR_RFL_MASK GENMASK(15, 12) /* Receive FIFO Level mask */ #define SSCR1_TFT GENMASK(9, 6) /* Transmit FIFO Threshold (mask) */ #define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */ #define SSCR1_RFT GENMASK(13, 10) /* Receive FIFO Threshold (mask) */ #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */ #define RX_THRESH_CE4100_DFLT 2 #define TX_THRESH_CE4100_DFLT 2 #define CE4100_SSSR_TFL_MASK GENMASK(9, 8) /* Transmit FIFO Level mask */ #define CE4100_SSSR_RFL_MASK GENMASK(13, 12) /* Receive FIFO Level mask */ #define CE4100_SSCR1_TFT GENMASK(7, 6) /* Transmit FIFO Threshold (mask) */ #define CE4100_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */ #define CE4100_SSCR1_RFT GENMASK(11, 10) /* Receive FIFO Threshold (mask) */ #define CE4100_SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */ /* Intel Quark X1000 */ #define DDS_RATE 0x28 /* SSP DDS Clock Rate Register */ /* QUARK_X1000 SSCR0 bit definition */ #define QUARK_X1000_SSCR0_DSS GENMASK(4, 0) /* Data Size Select (mask) */ #define QUARK_X1000_SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..32] */ #define QUARK_X1000_SSCR0_FRF GENMASK(6, 5) /* FRame Format (mask) */ #define QUARK_X1000_SSCR0_Motorola (0x0 << 5) /* Motorola's Serial Peripheral Interface (SPI) */ #define RX_THRESH_QUARK_X1000_DFLT 1 #define TX_THRESH_QUARK_X1000_DFLT 16 #define QUARK_X1000_SSSR_TFL_MASK GENMASK(12, 8) /* Transmit FIFO Level mask */ #define QUARK_X1000_SSSR_RFL_MASK GENMASK(17, 13) /* Receive FIFO Level mask */ #define QUARK_X1000_SSCR1_TFT GENMASK(10, 6) /* Transmit FIFO Threshold (mask) */ #define QUARK_X1000_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..32] */ #define QUARK_X1000_SSCR1_RFT GENMASK(15, 11) /* Receive FIFO Threshold (mask) */ #define QUARK_X1000_SSCR1_RxTresh(x) (((x) - 1) << 11) /* level [1..32] */ #define QUARK_X1000_SSCR1_EFWR BIT(16) /* Enable FIFO Write/Read */ #define QUARK_X1000_SSCR1_STRF BIT(17) /* Select FIFO or EFWR */ /* Extra bits in PXA255, PXA26x and PXA27x SSP ports */ #define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ #define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ #define SSCR1_EFWR BIT(14) /* Enable FIFO Write/Read */ #define SSCR1_STRF BIT(15) /* Select FIFO or EFWR */ #define SSCR1_IFS BIT(16) /* Invert Frame Signal */ #define SSCR1_PINTE BIT(18) /* Peripheral Trailing Byte Interrupt Enable */ #define SSCR1_TINTE BIT(19) /* Receiver Time-out Interrupt enable */ #define SSCR1_RSRE BIT(20) /* Receive Service Request Enable */ #define SSCR1_TSRE BIT(21) /* Transmit Service Request Enable */ #define SSCR1_TRAIL BIT(22) /* Trailing Byte */ #define SSCR1_RWOT BIT(23) /* Receive Without Transmit */ #define SSCR1_SFRMDIR BIT(24) /* Frame Direction */ #define SSCR1_SCLKDIR BIT(25) /* Serial Bit Rate Clock Direction */ #define SSCR1_ECRB BIT(26) /* Enable Clock request B */ #define SSCR1_ECRA BIT(27) /* Enable Clock Request A */ #define SSCR1_SCFR BIT(28) /* Slave Clock free Running */ #define SSCR1_EBCEI BIT(29) /* Enable Bit Count Error interrupt */ #define SSCR1_TTE BIT(30) /* TXD Tristate Enable */ #define SSCR1_TTELP BIT(31) /* TXD Tristate Enable Last Phase */ #define SSSR_PINT BIT(18) /* Peripheral Trailing Byte Interrupt */ #define SSSR_TINT BIT(19) /* Receiver Time-out Interrupt */ #define SSSR_EOC BIT(20) /* End Of Chain */ #define SSSR_TUR BIT(21) /* Transmit FIFO Under Run */ #define SSSR_CSS BIT(22) /* Clock Synchronisation Status */ #define SSSR_BCE BIT(23) /* Bit Count Error */ #define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */ #define SSPSP_SFRMP BIT(2) /* Serial Frame Polarity */ #define SSPSP_ETDS BIT(3) /* End of Transfer data State */ #define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */ #define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */ #define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */ #define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ #define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ #define SSPSP_FSRT BIT(25) /* Frame Sync Relative Timing */ /* PXA3xx */ #define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */ #define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */ #define SSPSP_TIMING_MASK (0x7f8001f0) #define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ #define SSACD_ACDS_1 (0) #define SSACD_ACDS_2 (1) #define SSACD_ACDS_4 (2) #define SSACD_ACDS_8 (3) #define SSACD_ACDS_16 (4) #define SSACD_ACDS_32 (5) #define SSACD_SCDB BIT(3) /* SSPSYSCLK Divider Bypass */ #define SSACD_SCDB_4X (0) #define SSACD_SCDB_1X (1) #define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */ #define SSACD_SCDX8 BIT(7) /* SYSCLK division ratio select */ /* Intel Merrifield SSP */ #define SFIFOL 0x68 /* FIFO level */ #define SFIFOTT 0x6c /* FIFO trigger threshold */ #define RX_THRESH_MRFLD_DFLT 16 #define TX_THRESH_MRFLD_DFLT 16 #define SFIFOL_TFL_MASK GENMASK(15, 0) /* Transmit FIFO Level mask */ #define SFIFOL_RFL_MASK GENMASK(31, 16) /* Receive FIFO Level mask */ #define SFIFOTT_TFT GENMASK(15, 0) /* Transmit FIFO Threshold (mask) */ #define SFIFOTT_TxThresh(x) (((x) - 1) << 0) /* TX FIFO trigger threshold / level */ #define SFIFOTT_RFT GENMASK(31, 16) /* Receive FIFO Threshold (mask) */ #define SFIFOTT_RxThresh(x) (((x) - 1) << 16) /* RX FIFO trigger threshold / level */ /* LPSS SSP */ #define SSITF 0x44 /* TX FIFO trigger level */ #define SSITF_TxHiThresh(x) (((x) - 1) << 0) #define SSITF_TxLoThresh(x) (((x) - 1) << 8) #define SSIRF 0x48 /* RX FIFO trigger level */ #define SSIRF_RxThresh(x) ((x) - 1) /* LPT/WPT SSP */ #define SSCR2 (0x40) /* SSP Command / Status 2 */ #define SSPSP2 (0x44) /* SSP Programmable Serial Protocol 2 */ enum pxa_ssp_type { SSP_UNDEFINED = 0, PXA25x_SSP, /* pxa 210, 250, 255, 26x */ PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */ PXA27x_SSP, PXA3xx_SSP, PXA168_SSP, MMP2_SSP, PXA910_SSP, CE4100_SSP, MRFLD_SSP, QUARK_X1000_SSP, /* Keep LPSS types sorted with lpss_platforms[] */ LPSS_LPT_SSP, LPSS_BYT_SSP, LPSS_BSW_SSP, LPSS_SPT_SSP, LPSS_BXT_SSP, LPSS_CNL_SSP, }; struct ssp_device { struct device *dev; struct list_head node; struct clk *clk; void __iomem *mmio_base; unsigned long phys_base; const char *label; int port_id; enum pxa_ssp_type type; int use_count; int irq; struct device_node *of_node; }; /** * pxa_ssp_write_reg - Write to a SSP register * * @dev: SSP device to access * @reg: Register to write to * @val: Value to be written. */ static inline void pxa_ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val) { __raw_writel(val, dev->mmio_base + reg); } /** * pxa_ssp_read_reg - Read from a SSP register * * @dev: SSP device to access * @reg: Register to read from */ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg) { return __raw_readl(dev->mmio_base + reg); } static inline void pxa_ssp_enable(struct ssp_device *ssp) { u32 sscr0; sscr0 = pxa_ssp_read_reg(ssp, SSCR0) | SSCR0_SSE; pxa_ssp_write_reg(ssp, SSCR0, sscr0); } static inline void pxa_ssp_disable(struct ssp_device *ssp) { u32 sscr0; sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~SSCR0_SSE; pxa_ssp_write_reg(ssp, SSCR0, sscr0); } #if IS_ENABLED(CONFIG_PXA_SSP) struct ssp_device *pxa_ssp_request(int port, const char *label); void pxa_ssp_free(struct ssp_device *); struct ssp_device *pxa_ssp_request_of(const struct device_node *of_node, const char *label); #else static inline struct ssp_device *pxa_ssp_request(int port, const char *label) { return NULL; } static inline struct ssp_device *pxa_ssp_request_of(const struct device_node *n, const char *name) { return NULL; } static inline void pxa_ssp_free(struct ssp_device *ssp) {} #endif #endif /* __LINUX_PXA2XX_SSP_H */ PK ! 0�O� lcd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * LCD Lowlevel Control Abstraction * * Copyright (C) 2003,2004 Hewlett-Packard Company * */ #ifndef _LINUX_LCD_H #define _LINUX_LCD_H #include <linux/device.h> #include <linux/mutex.h> #include <linux/notifier.h> #include <linux/fb.h> /* Notes on locking: * * lcd_device->ops_lock is an internal backlight lock protecting the ops * field and no code outside the core should need to touch it. * * Access to set_power() is serialised by the update_lock mutex since * most drivers seem to need this and historically get it wrong. * * Most drivers don't need locking on their get_power() method. * If yours does, you need to implement it in the driver. You can use the * update_lock mutex if appropriate. * * Any other use of the locks below is probably wrong. */ struct lcd_device; struct fb_info; struct lcd_properties { /* The maximum value for contrast (read-only) */ int max_contrast; }; struct lcd_ops { /* Get the LCD panel power status (0: full on, 1..3: controller power on, flat panel power off, 4: full off), see FB_BLANK_XXX */ int (*get_power)(struct lcd_device *); /* Enable or disable power to the LCD (0: on; 4: off, see FB_BLANK_XXX) */ int (*set_power)(struct lcd_device *, int power); /* Get the current contrast setting (0-max_contrast) */ int (*get_contrast)(struct lcd_device *); /* Set LCD panel contrast */ int (*set_contrast)(struct lcd_device *, int contrast); /* Set LCD panel mode (resolutions ...) */ int (*set_mode)(struct lcd_device *, struct fb_videomode *); /* Check if given framebuffer device is the one LCD is bound to; return 0 if not, !=0 if it is. If NULL, lcd always matches the fb. */ int (*check_fb)(struct lcd_device *, struct fb_info *); }; struct lcd_device { struct lcd_properties props; /* This protects the 'ops' field. If 'ops' is NULL, the driver that registered this device has been unloaded, and if class_get_devdata() points to something in the body of that driver, it is also invalid. */ struct mutex ops_lock; /* If this is NULL, the backing module is unloaded */ struct lcd_ops *ops; /* Serialise access to set_power method */ struct mutex update_lock; /* The framebuffer notifier block */ struct notifier_block fb_notif; struct device dev; }; struct lcd_platform_data { /* reset lcd panel device. */ int (*reset)(struct lcd_device *ld); /* on or off to lcd panel. if 'enable' is 0 then lcd power off and 1, lcd power on. */ int (*power_on)(struct lcd_device *ld, int enable); /* it indicates whether lcd panel was enabled from bootloader or not. */ int lcd_enabled; /* it means delay for stable time when it becomes low to high or high to low that is dependent on whether reset gpio is low active or high active. */ unsigned int reset_delay; /* stable time needing to become lcd power on. */ unsigned int power_on_delay; /* stable time needing to become lcd power off. */ unsigned int power_off_delay; /* it could be used for any purpose. */ void *pdata; }; static inline void lcd_set_power(struct lcd_device *ld, int power) { mutex_lock(&ld->update_lock); if (ld->ops && ld->ops->set_power) ld->ops->set_power(ld, power); mutex_unlock(&ld->update_lock); } extern struct lcd_device *lcd_device_register(const char *name, struct device *parent, void *devdata, struct lcd_ops *ops); extern struct lcd_device *devm_lcd_device_register(struct device *dev, const char *name, struct device *parent, void *devdata, struct lcd_ops *ops); extern void lcd_device_unregister(struct lcd_device *ld); extern void devm_lcd_device_unregister(struct device *dev, struct lcd_device *ld); #define to_lcd_device(obj) container_of(obj, struct lcd_device, dev) static inline void * lcd_get_data(struct lcd_device *ld_dev) { return dev_get_drvdata(&ld_dev->dev); } #endif PK ! ��6> > splice.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Function declerations and data structures related to the splice * implementation. * * Copyright (C) 2007 Jens Axboe <jens.axboe@oracle.com> * */ #ifndef SPLICE_H #define SPLICE_H #include <linux/pipe_fs_i.h> /* * Flags passed in from splice/tee/vmsplice */ #define SPLICE_F_MOVE (0x01) /* move pages instead of copying */ #define SPLICE_F_NONBLOCK (0x02) /* don't block on the pipe splicing (but */ /* we may still block on the fd we splice */ /* from/to, of course */ #define SPLICE_F_MORE (0x04) /* expect more data */ #define SPLICE_F_GIFT (0x08) /* pages passed in are a gift */ #define SPLICE_F_ALL (SPLICE_F_MOVE|SPLICE_F_NONBLOCK|SPLICE_F_MORE|SPLICE_F_GIFT) /* * Passed to the actors */ struct splice_desc { size_t total_len; /* remaining length */ unsigned int len; /* current length */ unsigned int flags; /* splice flags */ /* * actor() private data */ union { void __user *userptr; /* memory to write to */ struct file *file; /* file to read/write */ void *data; /* cookie */ } u; void (*splice_eof)(struct splice_desc *sd); /* Unexpected EOF handler */ loff_t pos; /* file position */ loff_t *opos; /* sendfile: output position */ size_t num_spliced; /* number of bytes already spliced */ bool need_wakeup; /* need to wake up writer */ }; struct partial_page { unsigned int offset; unsigned int len; unsigned long private; }; /* * Passed to splice_to_pipe */ struct splice_pipe_desc { struct page **pages; /* page map */ struct partial_page *partial; /* pages[] may not be contig */ int nr_pages; /* number of populated pages in map */ unsigned int nr_pages_max; /* pages[] & partial[] arrays size */ const struct pipe_buf_operations *ops;/* ops associated with output pipe */ void (*spd_release)(struct splice_pipe_desc *, unsigned int); }; typedef int (splice_actor)(struct pipe_inode_info *, struct pipe_buffer *, struct splice_desc *); typedef int (splice_direct_actor)(struct pipe_inode_info *, struct splice_desc *); extern ssize_t splice_from_pipe(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int, splice_actor *); extern ssize_t __splice_from_pipe(struct pipe_inode_info *, struct splice_desc *, splice_actor *); extern ssize_t splice_to_pipe(struct pipe_inode_info *, struct splice_pipe_desc *); extern ssize_t add_to_pipe(struct pipe_inode_info *, struct pipe_buffer *); extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, splice_direct_actor *); extern long do_splice(struct file *in, loff_t *off_in, struct file *out, loff_t *off_out, size_t len, unsigned int flags); extern long do_tee(struct file *in, struct file *out, size_t len, unsigned int flags); /* * for dynamic pipe sizing */ extern int splice_grow_spd(const struct pipe_inode_info *, struct splice_pipe_desc *); extern void splice_shrink_spd(struct splice_pipe_desc *); extern const struct pipe_buf_operations page_cache_pipe_buf_ops; extern const struct pipe_buf_operations default_pipe_buf_ops; extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out, loff_t *ppos, size_t len, unsigned int flags); extern long do_splice_to(struct file *in, loff_t *ppos, struct pipe_inode_info *pipe, size_t len, unsigned int flags); #endif PK ! ��N N greybus/greybus_id.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* FIXME * move this to include/linux/mod_devicetable.h when merging */ #ifndef __LINUX_GREYBUS_ID_H #define __LINUX_GREYBUS_ID_H #include <linux/types.h> #include <linux/mod_devicetable.h> struct greybus_bundle_id { __u16 match_flags; __u32 vendor; __u32 product; __u8 class; kernel_ulong_t driver_info __aligned(sizeof(kernel_ulong_t)); }; /* Used to match the greybus_bundle_id */ #define GREYBUS_ID_MATCH_VENDOR BIT(0) #define GREYBUS_ID_MATCH_PRODUCT BIT(1) #define GREYBUS_ID_MATCH_CLASS BIT(2) #endif /* __LINUX_GREYBUS_ID_H */ PK ! Nõ� greybus/bundle.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus bundles * * Copyright 2014 Google Inc. * Copyright 2014 Linaro Ltd. */ #ifndef __BUNDLE_H #define __BUNDLE_H #include <linux/types.h> #include <linux/list.h> #include <linux/pm_runtime.h> #include <linux/device.h> #define BUNDLE_ID_NONE U8_MAX /* Greybus "public" definitions" */ struct gb_bundle { struct device dev; struct gb_interface *intf; u8 id; u8 class; u8 class_major; u8 class_minor; size_t num_cports; struct greybus_descriptor_cport *cport_desc; struct list_head connections; u8 *state; struct list_head links; /* interface->bundles */ }; #define to_gb_bundle(d) container_of(d, struct gb_bundle, dev) /* Greybus "private" definitions" */ struct gb_bundle *gb_bundle_create(struct gb_interface *intf, u8 bundle_id, u8 class); int gb_bundle_add(struct gb_bundle *bundle); void gb_bundle_destroy(struct gb_bundle *bundle); /* Bundle Runtime PM wrappers */ #ifdef CONFIG_PM static inline int gb_pm_runtime_get_sync(struct gb_bundle *bundle) { int retval; retval = pm_runtime_get_sync(&bundle->dev); if (retval < 0) { dev_err(&bundle->dev, "pm_runtime_get_sync failed: %d\n", retval); pm_runtime_put_noidle(&bundle->dev); return retval; } return 0; } static inline int gb_pm_runtime_put_autosuspend(struct gb_bundle *bundle) { int retval; pm_runtime_mark_last_busy(&bundle->dev); retval = pm_runtime_put_autosuspend(&bundle->dev); return retval; } static inline void gb_pm_runtime_get_noresume(struct gb_bundle *bundle) { pm_runtime_get_noresume(&bundle->dev); } static inline void gb_pm_runtime_put_noidle(struct gb_bundle *bundle) { pm_runtime_put_noidle(&bundle->dev); } #else static inline int gb_pm_runtime_get_sync(struct gb_bundle *bundle) { return 0; } static inline int gb_pm_runtime_put_autosuspend(struct gb_bundle *bundle) { return 0; } static inline void gb_pm_runtime_get_noresume(struct gb_bundle *bundle) {} static inline void gb_pm_runtime_put_noidle(struct gb_bundle *bundle) {} #endif #endif /* __BUNDLE_H */ PK ! x�*ӗ � greybus/hd.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus Host Device * * Copyright 2014-2015 Google Inc. * Copyright 2014-2015 Linaro Ltd. */ #ifndef __HD_H #define __HD_H #include <linux/types.h> #include <linux/device.h> struct gb_host_device; struct gb_message; struct gb_hd_driver { size_t hd_priv_size; int (*cport_allocate)(struct gb_host_device *hd, int cport_id, unsigned long flags); void (*cport_release)(struct gb_host_device *hd, u16 cport_id); int (*cport_enable)(struct gb_host_device *hd, u16 cport_id, unsigned long flags); int (*cport_disable)(struct gb_host_device *hd, u16 cport_id); int (*cport_connected)(struct gb_host_device *hd, u16 cport_id); int (*cport_flush)(struct gb_host_device *hd, u16 cport_id); int (*cport_shutdown)(struct gb_host_device *hd, u16 cport_id, u8 phase, unsigned int timeout); int (*cport_quiesce)(struct gb_host_device *hd, u16 cport_id, size_t peer_space, unsigned int timeout); int (*cport_clear)(struct gb_host_device *hd, u16 cport_id); int (*message_send)(struct gb_host_device *hd, u16 dest_cport_id, struct gb_message *message, gfp_t gfp_mask); void (*message_cancel)(struct gb_message *message); int (*latency_tag_enable)(struct gb_host_device *hd, u16 cport_id); int (*latency_tag_disable)(struct gb_host_device *hd, u16 cport_id); int (*output)(struct gb_host_device *hd, void *req, u16 size, u8 cmd, bool async); }; struct gb_host_device { struct device dev; int bus_id; const struct gb_hd_driver *driver; struct list_head modules; struct list_head connections; struct ida cport_id_map; /* Number of CPorts supported by the UniPro IP */ size_t num_cports; /* Host device buffer constraints */ size_t buffer_size_max; struct gb_svc *svc; /* Private data for the host driver */ unsigned long hd_priv[0] __aligned(sizeof(s64)); }; #define to_gb_host_device(d) container_of(d, struct gb_host_device, dev) int gb_hd_cport_reserve(struct gb_host_device *hd, u16 cport_id); void gb_hd_cport_release_reserved(struct gb_host_device *hd, u16 cport_id); int gb_hd_cport_allocate(struct gb_host_device *hd, int cport_id, unsigned long flags); void gb_hd_cport_release(struct gb_host_device *hd, u16 cport_id); struct gb_host_device *gb_hd_create(struct gb_hd_driver *driver, struct device *parent, size_t buffer_size_max, size_t num_cports); int gb_hd_add(struct gb_host_device *hd); void gb_hd_del(struct gb_host_device *hd); void gb_hd_shutdown(struct gb_host_device *hd); void gb_hd_put(struct gb_host_device *hd); int gb_hd_output(struct gb_host_device *hd, void *req, u16 size, u8 cmd, bool in_irq); int gb_hd_init(void); void gb_hd_exit(void); #endif /* __HD_H */ PK ! ���� �� greybus/greybus_protocols.hnu �[��� /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ /* * Copyright(c) 2014 - 2015 Google Inc. All rights reserved. * Copyright(c) 2014 - 2015 Linaro Ltd. All rights reserved. */ #ifndef __GREYBUS_PROTOCOLS_H #define __GREYBUS_PROTOCOLS_H #include <linux/types.h> /* Fixed IDs for control/svc protocols */ /* SVC switch-port device ids */ #define GB_SVC_DEVICE_ID_SVC 0 #define GB_SVC_DEVICE_ID_AP 1 #define GB_SVC_DEVICE_ID_MIN 2 #define GB_SVC_DEVICE_ID_MAX 31 #define GB_SVC_CPORT_ID 0 #define GB_CONTROL_BUNDLE_ID 0 #define GB_CONTROL_CPORT_ID 0 /* * All operation messages (both requests and responses) begin with * a header that encodes the size of the message (header included). * This header also contains a unique identifier, that associates a * response message with its operation. The header contains an * operation type field, whose interpretation is dependent on what * type of protocol is used over the connection. The high bit * (0x80) of the operation type field is used to indicate whether * the message is a request (clear) or a response (set). * * Response messages include an additional result byte, which * communicates the result of the corresponding request. A zero * result value means the operation completed successfully. Any * other value indicates an error; in this case, the payload of the * response message (if any) is ignored. The result byte must be * zero in the header for a request message. * * The wire format for all numeric fields in the header is little * endian. Any operation-specific data begins immediately after the * header. */ struct gb_operation_msg_hdr { __le16 size; /* Size in bytes of header + payload */ __le16 operation_id; /* Operation unique id */ __u8 type; /* E.g GB_I2C_TYPE_* or GB_GPIO_TYPE_* */ __u8 result; /* Result of request (in responses only) */ __u8 pad[2]; /* must be zero (ignore when read) */ } __packed; /* Generic request types */ #define GB_REQUEST_TYPE_CPORT_SHUTDOWN 0x00 #define GB_REQUEST_TYPE_INVALID 0x7f struct gb_cport_shutdown_request { __u8 phase; } __packed; /* Control Protocol */ /* Greybus control request types */ #define GB_CONTROL_TYPE_VERSION 0x01 #define GB_CONTROL_TYPE_PROBE_AP 0x02 #define GB_CONTROL_TYPE_GET_MANIFEST_SIZE 0x03 #define GB_CONTROL_TYPE_GET_MANIFEST 0x04 #define GB_CONTROL_TYPE_CONNECTED 0x05 #define GB_CONTROL_TYPE_DISCONNECTED 0x06 #define GB_CONTROL_TYPE_TIMESYNC_ENABLE 0x07 #define GB_CONTROL_TYPE_TIMESYNC_DISABLE 0x08 #define GB_CONTROL_TYPE_TIMESYNC_AUTHORITATIVE 0x09 /* Unused 0x0a */ #define GB_CONTROL_TYPE_BUNDLE_VERSION 0x0b #define GB_CONTROL_TYPE_DISCONNECTING 0x0c #define GB_CONTROL_TYPE_TIMESYNC_GET_LAST_EVENT 0x0d #define GB_CONTROL_TYPE_MODE_SWITCH 0x0e #define GB_CONTROL_TYPE_BUNDLE_SUSPEND 0x0f #define GB_CONTROL_TYPE_BUNDLE_RESUME 0x10 #define GB_CONTROL_TYPE_BUNDLE_DEACTIVATE 0x11 #define GB_CONTROL_TYPE_BUNDLE_ACTIVATE 0x12 #define GB_CONTROL_TYPE_INTF_SUSPEND_PREPARE 0x13 #define GB_CONTROL_TYPE_INTF_DEACTIVATE_PREPARE 0x14 #define GB_CONTROL_TYPE_INTF_HIBERNATE_ABORT 0x15 struct gb_control_version_request { __u8 major; __u8 minor; } __packed; struct gb_control_version_response { __u8 major; __u8 minor; } __packed; struct gb_control_bundle_version_request { __u8 bundle_id; } __packed; struct gb_control_bundle_version_response { __u8 major; __u8 minor; } __packed; /* Control protocol manifest get size request has no payload*/ struct gb_control_get_manifest_size_response { __le16 size; } __packed; /* Control protocol manifest get request has no payload */ struct gb_control_get_manifest_response { __u8 data[0]; } __packed; /* Control protocol [dis]connected request */ struct gb_control_connected_request { __le16 cport_id; } __packed; struct gb_control_disconnecting_request { __le16 cport_id; } __packed; /* disconnecting response has no payload */ struct gb_control_disconnected_request { __le16 cport_id; } __packed; /* Control protocol [dis]connected response has no payload */ /* * All Bundle power management operations use the same request and response * layout and status codes. */ #define GB_CONTROL_BUNDLE_PM_OK 0x00 #define GB_CONTROL_BUNDLE_PM_INVAL 0x01 #define GB_CONTROL_BUNDLE_PM_BUSY 0x02 #define GB_CONTROL_BUNDLE_PM_FAIL 0x03 #define GB_CONTROL_BUNDLE_PM_NA 0x04 struct gb_control_bundle_pm_request { __u8 bundle_id; } __packed; struct gb_control_bundle_pm_response { __u8 status; } __packed; /* * Interface Suspend Prepare and Deactivate Prepare operations use the same * response layout and error codes. Define a single response structure and reuse * it. Both operations have no payload. */ #define GB_CONTROL_INTF_PM_OK 0x00 #define GB_CONTROL_INTF_PM_BUSY 0x01 #define GB_CONTROL_INTF_PM_NA 0x02 struct gb_control_intf_pm_response { __u8 status; } __packed; /* APBridge protocol */ /* request APB1 log */ #define GB_APB_REQUEST_LOG 0x02 /* request to map a cport to bulk in and bulk out endpoints */ #define GB_APB_REQUEST_EP_MAPPING 0x03 /* request to get the number of cports available */ #define GB_APB_REQUEST_CPORT_COUNT 0x04 /* request to reset a cport state */ #define GB_APB_REQUEST_RESET_CPORT 0x05 /* request to time the latency of messages on a given cport */ #define GB_APB_REQUEST_LATENCY_TAG_EN 0x06 #define GB_APB_REQUEST_LATENCY_TAG_DIS 0x07 /* request to control the CSI transmitter */ #define GB_APB_REQUEST_CSI_TX_CONTROL 0x08 /* request to control audio streaming */ #define GB_APB_REQUEST_AUDIO_CONTROL 0x09 /* TimeSync requests */ #define GB_APB_REQUEST_TIMESYNC_ENABLE 0x0d #define GB_APB_REQUEST_TIMESYNC_DISABLE 0x0e #define GB_APB_REQUEST_TIMESYNC_AUTHORITATIVE 0x0f #define GB_APB_REQUEST_TIMESYNC_GET_LAST_EVENT 0x10 /* requests to set Greybus CPort flags */ #define GB_APB_REQUEST_CPORT_FLAGS 0x11 /* ARPC request */ #define GB_APB_REQUEST_ARPC_RUN 0x12 struct gb_apb_request_cport_flags { __le32 flags; #define GB_APB_CPORT_FLAG_CONTROL 0x01 #define GB_APB_CPORT_FLAG_HIGH_PRIO 0x02 } __packed; /* Firmware Download Protocol */ /* Request Types */ #define GB_FW_DOWNLOAD_TYPE_FIND_FIRMWARE 0x01 #define GB_FW_DOWNLOAD_TYPE_FETCH_FIRMWARE 0x02 #define GB_FW_DOWNLOAD_TYPE_RELEASE_FIRMWARE 0x03 #define GB_FIRMWARE_TAG_MAX_SIZE 10 /* firmware download find firmware request/response */ struct gb_fw_download_find_firmware_request { __u8 firmware_tag[GB_FIRMWARE_TAG_MAX_SIZE]; } __packed; struct gb_fw_download_find_firmware_response { __u8 firmware_id; __le32 size; } __packed; /* firmware download fetch firmware request/response */ struct gb_fw_download_fetch_firmware_request { __u8 firmware_id; __le32 offset; __le32 size; } __packed; struct gb_fw_download_fetch_firmware_response { __u8 data[0]; } __packed; /* firmware download release firmware request */ struct gb_fw_download_release_firmware_request { __u8 firmware_id; } __packed; /* firmware download release firmware response has no payload */ /* Firmware Management Protocol */ /* Request Types */ #define GB_FW_MGMT_TYPE_INTERFACE_FW_VERSION 0x01 #define GB_FW_MGMT_TYPE_LOAD_AND_VALIDATE_FW 0x02 #define GB_FW_MGMT_TYPE_LOADED_FW 0x03 #define GB_FW_MGMT_TYPE_BACKEND_FW_VERSION 0x04 #define GB_FW_MGMT_TYPE_BACKEND_FW_UPDATE 0x05 #define GB_FW_MGMT_TYPE_BACKEND_FW_UPDATED 0x06 #define GB_FW_LOAD_METHOD_UNIPRO 0x01 #define GB_FW_LOAD_METHOD_INTERNAL 0x02 #define GB_FW_LOAD_STATUS_FAILED 0x00 #define GB_FW_LOAD_STATUS_UNVALIDATED 0x01 #define GB_FW_LOAD_STATUS_VALIDATED 0x02 #define GB_FW_LOAD_STATUS_VALIDATION_FAILED 0x03 #define GB_FW_BACKEND_FW_STATUS_SUCCESS 0x01 #define GB_FW_BACKEND_FW_STATUS_FAIL_FIND 0x02 #define GB_FW_BACKEND_FW_STATUS_FAIL_FETCH 0x03 #define GB_FW_BACKEND_FW_STATUS_FAIL_WRITE 0x04 #define GB_FW_BACKEND_FW_STATUS_INT 0x05 #define GB_FW_BACKEND_FW_STATUS_RETRY 0x06 #define GB_FW_BACKEND_FW_STATUS_NOT_SUPPORTED 0x07 #define GB_FW_BACKEND_VERSION_STATUS_SUCCESS 0x01 #define GB_FW_BACKEND_VERSION_STATUS_NOT_AVAILABLE 0x02 #define GB_FW_BACKEND_VERSION_STATUS_NOT_SUPPORTED 0x03 #define GB_FW_BACKEND_VERSION_STATUS_RETRY 0x04 #define GB_FW_BACKEND_VERSION_STATUS_FAIL_INT 0x05 /* firmware management interface firmware version request has no payload */ struct gb_fw_mgmt_interface_fw_version_response { __u8 firmware_tag[GB_FIRMWARE_TAG_MAX_SIZE]; __le16 major; __le16 minor; } __packed; /* firmware management load and validate firmware request/response */ struct gb_fw_mgmt_load_and_validate_fw_request { __u8 request_id; __u8 load_method; __u8 firmware_tag[GB_FIRMWARE_TAG_MAX_SIZE]; } __packed; /* firmware management load and validate firmware response has no payload*/ /* firmware management loaded firmware request */ struct gb_fw_mgmt_loaded_fw_request { __u8 request_id; __u8 status; __le16 major; __le16 minor; } __packed; /* firmware management loaded firmware response has no payload */ /* firmware management backend firmware version request/response */ struct gb_fw_mgmt_backend_fw_version_request { __u8 firmware_tag[GB_FIRMWARE_TAG_MAX_SIZE]; } __packed; struct gb_fw_mgmt_backend_fw_version_response { __le16 major; __le16 minor; __u8 status; } __packed; /* firmware management backend firmware update request */ struct gb_fw_mgmt_backend_fw_update_request { __u8 request_id; __u8 firmware_tag[GB_FIRMWARE_TAG_MAX_SIZE]; } __packed; /* firmware management backend firmware update response has no payload */ /* firmware management backend firmware updated request */ struct gb_fw_mgmt_backend_fw_updated_request { __u8 request_id; __u8 status; } __packed; /* firmware management backend firmware updated response has no payload */ /* Component Authentication Protocol (CAP) */ /* Request Types */ #define GB_CAP_TYPE_GET_ENDPOINT_UID 0x01 #define GB_CAP_TYPE_GET_IMS_CERTIFICATE 0x02 #define GB_CAP_TYPE_AUTHENTICATE 0x03 /* CAP get endpoint uid request has no payload */ struct gb_cap_get_endpoint_uid_response { __u8 uid[8]; } __packed; /* CAP get endpoint ims certificate request/response */ struct gb_cap_get_ims_certificate_request { __le32 certificate_class; __le32 certificate_id; } __packed; struct gb_cap_get_ims_certificate_response { __u8 result_code; __u8 certificate[]; } __packed; /* CAP authenticate request/response */ struct gb_cap_authenticate_request { __le32 auth_type; __u8 uid[8]; __u8 challenge[32]; } __packed; struct gb_cap_authenticate_response { __u8 result_code; __u8 response[64]; __u8 signature[]; } __packed; /* Bootrom Protocol */ /* Version of the Greybus bootrom protocol we support */ #define GB_BOOTROM_VERSION_MAJOR 0x00 #define GB_BOOTROM_VERSION_MINOR 0x01 /* Greybus bootrom request types */ #define GB_BOOTROM_TYPE_VERSION 0x01 #define GB_BOOTROM_TYPE_FIRMWARE_SIZE 0x02 #define GB_BOOTROM_TYPE_GET_FIRMWARE 0x03 #define GB_BOOTROM_TYPE_READY_TO_BOOT 0x04 #define GB_BOOTROM_TYPE_AP_READY 0x05 /* Request with no-payload */ #define GB_BOOTROM_TYPE_GET_VID_PID 0x06 /* Request with no-payload */ /* Greybus bootrom boot stages */ #define GB_BOOTROM_BOOT_STAGE_ONE 0x01 /* Reserved for the boot ROM */ #define GB_BOOTROM_BOOT_STAGE_TWO 0x02 /* Bootrom package to be loaded by the boot ROM */ #define GB_BOOTROM_BOOT_STAGE_THREE 0x03 /* Module personality package loaded by Stage 2 firmware */ /* Greybus bootrom ready to boot status */ #define GB_BOOTROM_BOOT_STATUS_INVALID 0x00 /* Firmware blob could not be validated */ #define GB_BOOTROM_BOOT_STATUS_INSECURE 0x01 /* Firmware blob is valid but insecure */ #define GB_BOOTROM_BOOT_STATUS_SECURE 0x02 /* Firmware blob is valid and secure */ /* Max bootrom data fetch size in bytes */ #define GB_BOOTROM_FETCH_MAX 2000 struct gb_bootrom_version_request { __u8 major; __u8 minor; } __packed; struct gb_bootrom_version_response { __u8 major; __u8 minor; } __packed; /* Bootrom protocol firmware size request/response */ struct gb_bootrom_firmware_size_request { __u8 stage; } __packed; struct gb_bootrom_firmware_size_response { __le32 size; } __packed; /* Bootrom protocol get firmware request/response */ struct gb_bootrom_get_firmware_request { __le32 offset; __le32 size; } __packed; struct gb_bootrom_get_firmware_response { __u8 data[0]; } __packed; /* Bootrom protocol Ready to boot request */ struct gb_bootrom_ready_to_boot_request { __u8 status; } __packed; /* Bootrom protocol Ready to boot response has no payload */ /* Bootrom protocol get VID/PID request has no payload */ struct gb_bootrom_get_vid_pid_response { __le32 vendor_id; __le32 product_id; } __packed; /* Power Supply */ /* Greybus power supply request types */ #define GB_POWER_SUPPLY_TYPE_GET_SUPPLIES 0x02 #define GB_POWER_SUPPLY_TYPE_GET_DESCRIPTION 0x03 #define GB_POWER_SUPPLY_TYPE_GET_PROP_DESCRIPTORS 0x04 #define GB_POWER_SUPPLY_TYPE_GET_PROPERTY 0x05 #define GB_POWER_SUPPLY_TYPE_SET_PROPERTY 0x06 #define GB_POWER_SUPPLY_TYPE_EVENT 0x07 /* Greybus power supply battery technologies types */ #define GB_POWER_SUPPLY_TECH_UNKNOWN 0x0000 #define GB_POWER_SUPPLY_TECH_NiMH 0x0001 #define GB_POWER_SUPPLY_TECH_LION 0x0002 #define GB_POWER_SUPPLY_TECH_LIPO 0x0003 #define GB_POWER_SUPPLY_TECH_LiFe 0x0004 #define GB_POWER_SUPPLY_TECH_NiCd 0x0005 #define GB_POWER_SUPPLY_TECH_LiMn 0x0006 /* Greybus power supply types */ #define GB_POWER_SUPPLY_UNKNOWN_TYPE 0x0000 #define GB_POWER_SUPPLY_BATTERY_TYPE 0x0001 #define GB_POWER_SUPPLY_UPS_TYPE 0x0002 #define GB_POWER_SUPPLY_MAINS_TYPE 0x0003 #define GB_POWER_SUPPLY_USB_TYPE 0x0004 #define GB_POWER_SUPPLY_USB_DCP_TYPE 0x0005 #define GB_POWER_SUPPLY_USB_CDP_TYPE 0x0006 #define GB_POWER_SUPPLY_USB_ACA_TYPE 0x0007 /* Greybus power supply health values */ #define GB_POWER_SUPPLY_HEALTH_UNKNOWN 0x0000 #define GB_POWER_SUPPLY_HEALTH_GOOD 0x0001 #define GB_POWER_SUPPLY_HEALTH_OVERHEAT 0x0002 #define GB_POWER_SUPPLY_HEALTH_DEAD 0x0003 #define GB_POWER_SUPPLY_HEALTH_OVERVOLTAGE 0x0004 #define GB_POWER_SUPPLY_HEALTH_UNSPEC_FAILURE 0x0005 #define GB_POWER_SUPPLY_HEALTH_COLD 0x0006 #define GB_POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE 0x0007 #define GB_POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE 0x0008 /* Greybus power supply status values */ #define GB_POWER_SUPPLY_STATUS_UNKNOWN 0x0000 #define GB_POWER_SUPPLY_STATUS_CHARGING 0x0001 #define GB_POWER_SUPPLY_STATUS_DISCHARGING 0x0002 #define GB_POWER_SUPPLY_STATUS_NOT_CHARGING 0x0003 #define GB_POWER_SUPPLY_STATUS_FULL 0x0004 /* Greybus power supply capacity level values */ #define GB_POWER_SUPPLY_CAPACITY_LEVEL_UNKNOWN 0x0000 #define GB_POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL 0x0001 #define GB_POWER_SUPPLY_CAPACITY_LEVEL_LOW 0x0002 #define GB_POWER_SUPPLY_CAPACITY_LEVEL_NORMAL 0x0003 #define GB_POWER_SUPPLY_CAPACITY_LEVEL_HIGH 0x0004 #define GB_POWER_SUPPLY_CAPACITY_LEVEL_FULL 0x0005 /* Greybus power supply scope values */ #define GB_POWER_SUPPLY_SCOPE_UNKNOWN 0x0000 #define GB_POWER_SUPPLY_SCOPE_SYSTEM 0x0001 #define GB_POWER_SUPPLY_SCOPE_DEVICE 0x0002 struct gb_power_supply_get_supplies_response { __u8 supplies_count; } __packed; struct gb_power_supply_get_description_request { __u8 psy_id; } __packed; struct gb_power_supply_get_description_response { __u8 manufacturer[32]; __u8 model[32]; __u8 serial_number[32]; __le16 type; __u8 properties_count; } __packed; struct gb_power_supply_props_desc { __u8 property; #define GB_POWER_SUPPLY_PROP_STATUS 0x00 #define GB_POWER_SUPPLY_PROP_CHARGE_TYPE 0x01 #define GB_POWER_SUPPLY_PROP_HEALTH 0x02 #define GB_POWER_SUPPLY_PROP_PRESENT 0x03 #define GB_POWER_SUPPLY_PROP_ONLINE 0x04 #define GB_POWER_SUPPLY_PROP_AUTHENTIC 0x05 #define GB_POWER_SUPPLY_PROP_TECHNOLOGY 0x06 #define GB_POWER_SUPPLY_PROP_CYCLE_COUNT 0x07 #define GB_POWER_SUPPLY_PROP_VOLTAGE_MAX 0x08 #define GB_POWER_SUPPLY_PROP_VOLTAGE_MIN 0x09 #define GB_POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN 0x0A #define GB_POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN 0x0B #define GB_POWER_SUPPLY_PROP_VOLTAGE_NOW 0x0C #define GB_POWER_SUPPLY_PROP_VOLTAGE_AVG 0x0D #define GB_POWER_SUPPLY_PROP_VOLTAGE_OCV 0x0E #define GB_POWER_SUPPLY_PROP_VOLTAGE_BOOT 0x0F #define GB_POWER_SUPPLY_PROP_CURRENT_MAX 0x10 #define GB_POWER_SUPPLY_PROP_CURRENT_NOW 0x11 #define GB_POWER_SUPPLY_PROP_CURRENT_AVG 0x12 #define GB_POWER_SUPPLY_PROP_CURRENT_BOOT 0x13 #define GB_POWER_SUPPLY_PROP_POWER_NOW 0x14 #define GB_POWER_SUPPLY_PROP_POWER_AVG 0x15 #define GB_POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN 0x16 #define GB_POWER_SUPPLY_PROP_CHARGE_EMPTY_DESIGN 0x17 #define GB_POWER_SUPPLY_PROP_CHARGE_FULL 0x18 #define GB_POWER_SUPPLY_PROP_CHARGE_EMPTY 0x19 #define GB_POWER_SUPPLY_PROP_CHARGE_NOW 0x1A #define GB_POWER_SUPPLY_PROP_CHARGE_AVG 0x1B #define GB_POWER_SUPPLY_PROP_CHARGE_COUNTER 0x1C #define GB_POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT 0x1D #define GB_POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX 0x1E #define GB_POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE 0x1F #define GB_POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX 0x20 #define GB_POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT 0x21 #define GB_POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX 0x22 #define GB_POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT 0x23 #define GB_POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN 0x24 #define GB_POWER_SUPPLY_PROP_ENERGY_EMPTY_DESIGN 0x25 #define GB_POWER_SUPPLY_PROP_ENERGY_FULL 0x26 #define GB_POWER_SUPPLY_PROP_ENERGY_EMPTY 0x27 #define GB_POWER_SUPPLY_PROP_ENERGY_NOW 0x28 #define GB_POWER_SUPPLY_PROP_ENERGY_AVG 0x29 #define GB_POWER_SUPPLY_PROP_CAPACITY 0x2A #define GB_POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN 0x2B #define GB_POWER_SUPPLY_PROP_CAPACITY_ALERT_MAX 0x2C #define GB_POWER_SUPPLY_PROP_CAPACITY_LEVEL 0x2D #define GB_POWER_SUPPLY_PROP_TEMP 0x2E #define GB_POWER_SUPPLY_PROP_TEMP_MAX 0x2F #define GB_POWER_SUPPLY_PROP_TEMP_MIN 0x30 #define GB_POWER_SUPPLY_PROP_TEMP_ALERT_MIN 0x31 #define GB_POWER_SUPPLY_PROP_TEMP_ALERT_MAX 0x32 #define GB_POWER_SUPPLY_PROP_TEMP_AMBIENT 0x33 #define GB_POWER_SUPPLY_PROP_TEMP_AMBIENT_ALERT_MIN 0x34 #define GB_POWER_SUPPLY_PROP_TEMP_AMBIENT_ALERT_MAX 0x35 #define GB_POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW 0x36 #define GB_POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG 0x37 #define GB_POWER_SUPPLY_PROP_TIME_TO_FULL_NOW 0x38 #define GB_POWER_SUPPLY_PROP_TIME_TO_FULL_AVG 0x39 #define GB_POWER_SUPPLY_PROP_TYPE 0x3A #define GB_POWER_SUPPLY_PROP_SCOPE 0x3B #define GB_POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT 0x3C #define GB_POWER_SUPPLY_PROP_CALIBRATE 0x3D __u8 is_writeable; } __packed; struct gb_power_supply_get_property_descriptors_request { __u8 psy_id; } __packed; struct gb_power_supply_get_property_descriptors_response { __u8 properties_count; struct gb_power_supply_props_desc props[]; } __packed; struct gb_power_supply_get_property_request { __u8 psy_id; __u8 property; } __packed; struct gb_power_supply_get_property_response { __le32 prop_val; }; struct gb_power_supply_set_property_request { __u8 psy_id; __u8 property; __le32 prop_val; } __packed; struct gb_power_supply_event_request { __u8 psy_id; __u8 event; #define GB_POWER_SUPPLY_UPDATE 0x01 } __packed; /* HID */ /* Greybus HID operation types */ #define GB_HID_TYPE_GET_DESC 0x02 #define GB_HID_TYPE_GET_REPORT_DESC 0x03 #define GB_HID_TYPE_PWR_ON 0x04 #define GB_HID_TYPE_PWR_OFF 0x05 #define GB_HID_TYPE_GET_REPORT 0x06 #define GB_HID_TYPE_SET_REPORT 0x07 #define GB_HID_TYPE_IRQ_EVENT 0x08 /* Report type */ #define GB_HID_INPUT_REPORT 0 #define GB_HID_OUTPUT_REPORT 1 #define GB_HID_FEATURE_REPORT 2 /* Different request/response structures */ /* HID get descriptor response */ struct gb_hid_desc_response { __u8 bLength; __le16 wReportDescLength; __le16 bcdHID; __le16 wProductID; __le16 wVendorID; __u8 bCountryCode; } __packed; /* HID get report request/response */ struct gb_hid_get_report_request { __u8 report_type; __u8 report_id; } __packed; /* HID set report request */ struct gb_hid_set_report_request { __u8 report_type; __u8 report_id; __u8 report[]; } __packed; /* HID input report request, via interrupt pipe */ struct gb_hid_input_report_request { __u8 report[0]; } __packed; /* I2C */ /* Greybus i2c request types */ #define GB_I2C_TYPE_FUNCTIONALITY 0x02 #define GB_I2C_TYPE_TRANSFER 0x05 /* functionality request has no payload */ struct gb_i2c_functionality_response { __le32 functionality; } __packed; /* * Outgoing data immediately follows the op count and ops array. * The data for each write (master -> slave) op in the array is sent * in order, with no (e.g. pad) bytes separating them. * * Short reads cause the entire transfer request to fail So response * payload consists only of bytes read, and the number of bytes is * exactly what was specified in the corresponding op. Like * outgoing data, the incoming data is in order and contiguous. */ struct gb_i2c_transfer_op { __le16 addr; __le16 flags; __le16 size; } __packed; struct gb_i2c_transfer_request { __le16 op_count; struct gb_i2c_transfer_op ops[]; /* op_count of these */ } __packed; struct gb_i2c_transfer_response { __u8 data[0]; /* inbound data */ } __packed; /* GPIO */ /* Greybus GPIO request types */ #define GB_GPIO_TYPE_LINE_COUNT 0x02 #define GB_GPIO_TYPE_ACTIVATE 0x03 #define GB_GPIO_TYPE_DEACTIVATE 0x04 #define GB_GPIO_TYPE_GET_DIRECTION 0x05 #define GB_GPIO_TYPE_DIRECTION_IN 0x06 #define GB_GPIO_TYPE_DIRECTION_OUT 0x07 #define GB_GPIO_TYPE_GET_VALUE 0x08 #define GB_GPIO_TYPE_SET_VALUE 0x09 #define GB_GPIO_TYPE_SET_DEBOUNCE 0x0a #define GB_GPIO_TYPE_IRQ_TYPE 0x0b #define GB_GPIO_TYPE_IRQ_MASK 0x0c #define GB_GPIO_TYPE_IRQ_UNMASK 0x0d #define GB_GPIO_TYPE_IRQ_EVENT 0x0e #define GB_GPIO_IRQ_TYPE_NONE 0x00 #define GB_GPIO_IRQ_TYPE_EDGE_RISING 0x01 #define GB_GPIO_IRQ_TYPE_EDGE_FALLING 0x02 #define GB_GPIO_IRQ_TYPE_EDGE_BOTH 0x03 #define GB_GPIO_IRQ_TYPE_LEVEL_HIGH 0x04 #define GB_GPIO_IRQ_TYPE_LEVEL_LOW 0x08 /* line count request has no payload */ struct gb_gpio_line_count_response { __u8 count; } __packed; struct gb_gpio_activate_request { __u8 which; } __packed; /* activate response has no payload */ struct gb_gpio_deactivate_request { __u8 which; } __packed; /* deactivate response has no payload */ struct gb_gpio_get_direction_request { __u8 which; } __packed; struct gb_gpio_get_direction_response { __u8 direction; } __packed; struct gb_gpio_direction_in_request { __u8 which; } __packed; /* direction in response has no payload */ struct gb_gpio_direction_out_request { __u8 which; __u8 value; } __packed; /* direction out response has no payload */ struct gb_gpio_get_value_request { __u8 which; } __packed; struct gb_gpio_get_value_response { __u8 value; } __packed; struct gb_gpio_set_value_request { __u8 which; __u8 value; } __packed; /* set value response has no payload */ struct gb_gpio_set_debounce_request { __u8 which; __le16 usec; } __packed; /* debounce response has no payload */ struct gb_gpio_irq_type_request { __u8 which; __u8 type; } __packed; /* irq type response has no payload */ struct gb_gpio_irq_mask_request { __u8 which; } __packed; /* irq mask response has no payload */ struct gb_gpio_irq_unmask_request { __u8 which; } __packed; /* irq unmask response has no payload */ /* irq event requests originate on another module and are handled on the AP */ struct gb_gpio_irq_event_request { __u8 which; } __packed; /* irq event has no response */ /* PWM */ /* Greybus PWM operation types */ #define GB_PWM_TYPE_PWM_COUNT 0x02 #define GB_PWM_TYPE_ACTIVATE 0x03 #define GB_PWM_TYPE_DEACTIVATE 0x04 #define GB_PWM_TYPE_CONFIG 0x05 #define GB_PWM_TYPE_POLARITY 0x06 #define GB_PWM_TYPE_ENABLE 0x07 #define GB_PWM_TYPE_DISABLE 0x08 /* pwm count request has no payload */ struct gb_pwm_count_response { __u8 count; } __packed; struct gb_pwm_activate_request { __u8 which; } __packed; struct gb_pwm_deactivate_request { __u8 which; } __packed; struct gb_pwm_config_request { __u8 which; __le32 duty; __le32 period; } __packed; struct gb_pwm_polarity_request { __u8 which; __u8 polarity; } __packed; struct gb_pwm_enable_request { __u8 which; } __packed; struct gb_pwm_disable_request { __u8 which; } __packed; /* SPI */ /* Should match up with modes in linux/spi/spi.h */ #define GB_SPI_MODE_CPHA 0x01 /* clock phase */ #define GB_SPI_MODE_CPOL 0x02 /* clock polarity */ #define GB_SPI_MODE_MODE_0 (0 | 0) /* (original MicroWire) */ #define GB_SPI_MODE_MODE_1 (0 | GB_SPI_MODE_CPHA) #define GB_SPI_MODE_MODE_2 (GB_SPI_MODE_CPOL | 0) #define GB_SPI_MODE_MODE_3 (GB_SPI_MODE_CPOL | GB_SPI_MODE_CPHA) #define GB_SPI_MODE_CS_HIGH 0x04 /* chipselect active high? */ #define GB_SPI_MODE_LSB_FIRST 0x08 /* per-word bits-on-wire */ #define GB_SPI_MODE_3WIRE 0x10 /* SI/SO signals shared */ #define GB_SPI_MODE_LOOP 0x20 /* loopback mode */ #define GB_SPI_MODE_NO_CS 0x40 /* 1 dev/bus, no chipselect */ #define GB_SPI_MODE_READY 0x80 /* slave pulls low to pause */ /* Should match up with flags in linux/spi/spi.h */ #define GB_SPI_FLAG_HALF_DUPLEX BIT(0) /* can't do full duplex */ #define GB_SPI_FLAG_NO_RX BIT(1) /* can't do buffer read */ #define GB_SPI_FLAG_NO_TX BIT(2) /* can't do buffer write */ /* Greybus spi operation types */ #define GB_SPI_TYPE_MASTER_CONFIG 0x02 #define GB_SPI_TYPE_DEVICE_CONFIG 0x03 #define GB_SPI_TYPE_TRANSFER 0x04 /* mode request has no payload */ struct gb_spi_master_config_response { __le32 bits_per_word_mask; __le32 min_speed_hz; __le32 max_speed_hz; __le16 mode; __le16 flags; __u8 num_chipselect; } __packed; struct gb_spi_device_config_request { __u8 chip_select; } __packed; struct gb_spi_device_config_response { __le16 mode; __u8 bits_per_word; __le32 max_speed_hz; __u8 device_type; #define GB_SPI_SPI_DEV 0x00 #define GB_SPI_SPI_NOR 0x01 #define GB_SPI_SPI_MODALIAS 0x02 __u8 name[32]; } __packed; /** * struct gb_spi_transfer - a read/write buffer pair * @speed_hz: Select a speed other than the device default for this transfer. If * 0 the default (from @spi_device) is used. * @len: size of rx and tx buffers (in bytes) * @delay_usecs: microseconds to delay after this transfer before (optionally) * changing the chipselect status, then starting the next transfer or * completing this spi_message. * @cs_change: affects chipselect after this transfer completes * @bits_per_word: select a bits_per_word other than the device default for this * transfer. If 0 the default (from @spi_device) is used. */ struct gb_spi_transfer { __le32 speed_hz; __le32 len; __le16 delay_usecs; __u8 cs_change; __u8 bits_per_word; __u8 xfer_flags; #define GB_SPI_XFER_READ 0x01 #define GB_SPI_XFER_WRITE 0x02 #define GB_SPI_XFER_INPROGRESS 0x04 } __packed; struct gb_spi_transfer_request { __u8 chip_select; /* of the spi device */ __u8 mode; /* of the spi device */ __le16 count; struct gb_spi_transfer transfers[]; /* count of these */ } __packed; struct gb_spi_transfer_response { __u8 data[0]; /* inbound data */ } __packed; /* Version of the Greybus SVC protocol we support */ #define GB_SVC_VERSION_MAJOR 0x00 #define GB_SVC_VERSION_MINOR 0x01 /* Greybus SVC request types */ #define GB_SVC_TYPE_PROTOCOL_VERSION 0x01 #define GB_SVC_TYPE_SVC_HELLO 0x02 #define GB_SVC_TYPE_INTF_DEVICE_ID 0x03 #define GB_SVC_TYPE_INTF_RESET 0x06 #define GB_SVC_TYPE_CONN_CREATE 0x07 #define GB_SVC_TYPE_CONN_DESTROY 0x08 #define GB_SVC_TYPE_DME_PEER_GET 0x09 #define GB_SVC_TYPE_DME_PEER_SET 0x0a #define GB_SVC_TYPE_ROUTE_CREATE 0x0b #define GB_SVC_TYPE_ROUTE_DESTROY 0x0c #define GB_SVC_TYPE_TIMESYNC_ENABLE 0x0d #define GB_SVC_TYPE_TIMESYNC_DISABLE 0x0e #define GB_SVC_TYPE_TIMESYNC_AUTHORITATIVE 0x0f #define GB_SVC_TYPE_INTF_SET_PWRM 0x10 #define GB_SVC_TYPE_INTF_EJECT 0x11 #define GB_SVC_TYPE_PING 0x13 #define GB_SVC_TYPE_PWRMON_RAIL_COUNT_GET 0x14 #define GB_SVC_TYPE_PWRMON_RAIL_NAMES_GET 0x15 #define GB_SVC_TYPE_PWRMON_SAMPLE_GET 0x16 #define GB_SVC_TYPE_PWRMON_INTF_SAMPLE_GET 0x17 #define GB_SVC_TYPE_TIMESYNC_WAKE_PINS_ACQUIRE 0x18 #define GB_SVC_TYPE_TIMESYNC_WAKE_PINS_RELEASE 0x19 #define GB_SVC_TYPE_TIMESYNC_PING 0x1a #define GB_SVC_TYPE_MODULE_INSERTED 0x1f #define GB_SVC_TYPE_MODULE_REMOVED 0x20 #define GB_SVC_TYPE_INTF_VSYS_ENABLE 0x21 #define GB_SVC_TYPE_INTF_VSYS_DISABLE 0x22 #define GB_SVC_TYPE_INTF_REFCLK_ENABLE 0x23 #define GB_SVC_TYPE_INTF_REFCLK_DISABLE 0x24 #define GB_SVC_TYPE_INTF_UNIPRO_ENABLE 0x25 #define GB_SVC_TYPE_INTF_UNIPRO_DISABLE 0x26 #define GB_SVC_TYPE_INTF_ACTIVATE 0x27 #define GB_SVC_TYPE_INTF_RESUME 0x28 #define GB_SVC_TYPE_INTF_MAILBOX_EVENT 0x29 #define GB_SVC_TYPE_INTF_OOPS 0x2a /* Greybus SVC protocol status values */ #define GB_SVC_OP_SUCCESS 0x00 #define GB_SVC_OP_UNKNOWN_ERROR 0x01 #define GB_SVC_INTF_NOT_DETECTED 0x02 #define GB_SVC_INTF_NO_UPRO_LINK 0x03 #define GB_SVC_INTF_UPRO_NOT_DOWN 0x04 #define GB_SVC_INTF_UPRO_NOT_HIBERNATED 0x05 #define GB_SVC_INTF_NO_V_SYS 0x06 #define GB_SVC_INTF_V_CHG 0x07 #define GB_SVC_INTF_WAKE_BUSY 0x08 #define GB_SVC_INTF_NO_REFCLK 0x09 #define GB_SVC_INTF_RELEASING 0x0a #define GB_SVC_INTF_NO_ORDER 0x0b #define GB_SVC_INTF_MBOX_SET 0x0c #define GB_SVC_INTF_BAD_MBOX 0x0d #define GB_SVC_INTF_OP_TIMEOUT 0x0e #define GB_SVC_PWRMON_OP_NOT_PRESENT 0x0f struct gb_svc_version_request { __u8 major; __u8 minor; } __packed; struct gb_svc_version_response { __u8 major; __u8 minor; } __packed; /* SVC protocol hello request */ struct gb_svc_hello_request { __le16 endo_id; __u8 interface_id; } __packed; /* hello response has no payload */ struct gb_svc_intf_device_id_request { __u8 intf_id; __u8 device_id; } __packed; /* device id response has no payload */ struct gb_svc_intf_reset_request { __u8 intf_id; } __packed; /* interface reset response has no payload */ struct gb_svc_intf_eject_request { __u8 intf_id; } __packed; /* interface eject response has no payload */ struct gb_svc_conn_create_request { __u8 intf1_id; __le16 cport1_id; __u8 intf2_id; __le16 cport2_id; __u8 tc; __u8 flags; } __packed; /* connection create response has no payload */ struct gb_svc_conn_destroy_request { __u8 intf1_id; __le16 cport1_id; __u8 intf2_id; __le16 cport2_id; } __packed; /* connection destroy response has no payload */ struct gb_svc_dme_peer_get_request { __u8 intf_id; __le16 attr; __le16 selector; } __packed; struct gb_svc_dme_peer_get_response { __le16 result_code; __le32 attr_value; } __packed; struct gb_svc_dme_peer_set_request { __u8 intf_id; __le16 attr; __le16 selector; __le32 value; } __packed; struct gb_svc_dme_peer_set_response { __le16 result_code; } __packed; /* Greybus init-status values, currently retrieved using DME peer gets. */ #define GB_INIT_SPI_BOOT_STARTED 0x02 #define GB_INIT_TRUSTED_SPI_BOOT_FINISHED 0x03 #define GB_INIT_UNTRUSTED_SPI_BOOT_FINISHED 0x04 #define GB_INIT_BOOTROM_UNIPRO_BOOT_STARTED 0x06 #define GB_INIT_BOOTROM_FALLBACK_UNIPRO_BOOT_STARTED 0x09 #define GB_INIT_S2_LOADER_BOOT_STARTED 0x0D struct gb_svc_route_create_request { __u8 intf1_id; __u8 dev1_id; __u8 intf2_id; __u8 dev2_id; } __packed; /* route create response has no payload */ struct gb_svc_route_destroy_request { __u8 intf1_id; __u8 intf2_id; } __packed; /* route destroy response has no payload */ /* used for svc_intf_vsys_{enable,disable} */ struct gb_svc_intf_vsys_request { __u8 intf_id; } __packed; struct gb_svc_intf_vsys_response { __u8 result_code; #define GB_SVC_INTF_VSYS_OK 0x00 /* 0x01 is reserved */ #define GB_SVC_INTF_VSYS_FAIL 0x02 } __packed; /* used for svc_intf_refclk_{enable,disable} */ struct gb_svc_intf_refclk_request { __u8 intf_id; } __packed; struct gb_svc_intf_refclk_response { __u8 result_code; #define GB_SVC_INTF_REFCLK_OK 0x00 /* 0x01 is reserved */ #define GB_SVC_INTF_REFCLK_FAIL 0x02 } __packed; /* used for svc_intf_unipro_{enable,disable} */ struct gb_svc_intf_unipro_request { __u8 intf_id; } __packed; struct gb_svc_intf_unipro_response { __u8 result_code; #define GB_SVC_INTF_UNIPRO_OK 0x00 /* 0x01 is reserved */ #define GB_SVC_INTF_UNIPRO_FAIL 0x02 #define GB_SVC_INTF_UNIPRO_NOT_OFF 0x03 } __packed; #define GB_SVC_UNIPRO_FAST_MODE 0x01 #define GB_SVC_UNIPRO_SLOW_MODE 0x02 #define GB_SVC_UNIPRO_FAST_AUTO_MODE 0x04 #define GB_SVC_UNIPRO_SLOW_AUTO_MODE 0x05 #define GB_SVC_UNIPRO_MODE_UNCHANGED 0x07 #define GB_SVC_UNIPRO_HIBERNATE_MODE 0x11 #define GB_SVC_UNIPRO_OFF_MODE 0x12 #define GB_SVC_SMALL_AMPLITUDE 0x01 #define GB_SVC_LARGE_AMPLITUDE 0x02 #define GB_SVC_NO_DE_EMPHASIS 0x00 #define GB_SVC_SMALL_DE_EMPHASIS 0x01 #define GB_SVC_LARGE_DE_EMPHASIS 0x02 #define GB_SVC_PWRM_RXTERMINATION 0x01 #define GB_SVC_PWRM_TXTERMINATION 0x02 #define GB_SVC_PWRM_LINE_RESET 0x04 #define GB_SVC_PWRM_SCRAMBLING 0x20 #define GB_SVC_PWRM_QUIRK_HSSER 0x00000001 #define GB_SVC_UNIPRO_HS_SERIES_A 0x01 #define GB_SVC_UNIPRO_HS_SERIES_B 0x02 #define GB_SVC_SETPWRM_PWR_OK 0x00 #define GB_SVC_SETPWRM_PWR_LOCAL 0x01 #define GB_SVC_SETPWRM_PWR_REMOTE 0x02 #define GB_SVC_SETPWRM_PWR_BUSY 0x03 #define GB_SVC_SETPWRM_PWR_ERROR_CAP 0x04 #define GB_SVC_SETPWRM_PWR_FATAL_ERROR 0x05 struct gb_svc_l2_timer_cfg { __le16 tsb_fc0_protection_timeout; __le16 tsb_tc0_replay_timeout; __le16 tsb_afc0_req_timeout; __le16 tsb_fc1_protection_timeout; __le16 tsb_tc1_replay_timeout; __le16 tsb_afc1_req_timeout; __le16 reserved_for_tc2[3]; __le16 reserved_for_tc3[3]; } __packed; struct gb_svc_intf_set_pwrm_request { __u8 intf_id; __u8 hs_series; __u8 tx_mode; __u8 tx_gear; __u8 tx_nlanes; __u8 tx_amplitude; __u8 tx_hs_equalizer; __u8 rx_mode; __u8 rx_gear; __u8 rx_nlanes; __u8 flags; __le32 quirks; struct gb_svc_l2_timer_cfg local_l2timerdata, remote_l2timerdata; } __packed; struct gb_svc_intf_set_pwrm_response { __u8 result_code; } __packed; struct gb_svc_key_event_request { __le16 key_code; #define GB_KEYCODE_ARA 0x00 __u8 key_event; #define GB_SVC_KEY_RELEASED 0x00 #define GB_SVC_KEY_PRESSED 0x01 } __packed; #define GB_SVC_PWRMON_MAX_RAIL_COUNT 254 struct gb_svc_pwrmon_rail_count_get_response { __u8 rail_count; } __packed; #define GB_SVC_PWRMON_RAIL_NAME_BUFSIZE 32 struct gb_svc_pwrmon_rail_names_get_response { __u8 status; __u8 name[][GB_SVC_PWRMON_RAIL_NAME_BUFSIZE]; } __packed; #define GB_SVC_PWRMON_TYPE_CURR 0x01 #define GB_SVC_PWRMON_TYPE_VOL 0x02 #define GB_SVC_PWRMON_TYPE_PWR 0x03 #define GB_SVC_PWRMON_GET_SAMPLE_OK 0x00 #define GB_SVC_PWRMON_GET_SAMPLE_INVAL 0x01 #define GB_SVC_PWRMON_GET_SAMPLE_NOSUPP 0x02 #define GB_SVC_PWRMON_GET_SAMPLE_HWERR 0x03 struct gb_svc_pwrmon_sample_get_request { __u8 rail_id; __u8 measurement_type; } __packed; struct gb_svc_pwrmon_sample_get_response { __u8 result; __le32 measurement; } __packed; struct gb_svc_pwrmon_intf_sample_get_request { __u8 intf_id; __u8 measurement_type; } __packed; struct gb_svc_pwrmon_intf_sample_get_response { __u8 result; __le32 measurement; } __packed; #define GB_SVC_MODULE_INSERTED_FLAG_NO_PRIMARY 0x0001 struct gb_svc_module_inserted_request { __u8 primary_intf_id; __u8 intf_count; __le16 flags; } __packed; /* module_inserted response has no payload */ struct gb_svc_module_removed_request { __u8 primary_intf_id; } __packed; /* module_removed response has no payload */ struct gb_svc_intf_activate_request { __u8 intf_id; } __packed; #define GB_SVC_INTF_TYPE_UNKNOWN 0x00 #define GB_SVC_INTF_TYPE_DUMMY 0x01 #define GB_SVC_INTF_TYPE_UNIPRO 0x02 #define GB_SVC_INTF_TYPE_GREYBUS 0x03 struct gb_svc_intf_activate_response { __u8 status; __u8 intf_type; } __packed; struct gb_svc_intf_resume_request { __u8 intf_id; } __packed; struct gb_svc_intf_resume_response { __u8 status; } __packed; #define GB_SVC_INTF_MAILBOX_NONE 0x00 #define GB_SVC_INTF_MAILBOX_AP 0x01 #define GB_SVC_INTF_MAILBOX_GREYBUS 0x02 struct gb_svc_intf_mailbox_event_request { __u8 intf_id; __le16 result_code; __le32 mailbox; } __packed; /* intf_mailbox_event response has no payload */ struct gb_svc_intf_oops_request { __u8 intf_id; __u8 reason; } __packed; /* intf_oops response has no payload */ /* RAW */ /* Greybus raw request types */ #define GB_RAW_TYPE_SEND 0x02 struct gb_raw_send_request { __le32 len; __u8 data[]; } __packed; /* UART */ /* Greybus UART operation types */ #define GB_UART_TYPE_SEND_DATA 0x02 #define GB_UART_TYPE_RECEIVE_DATA 0x03 /* Unsolicited data */ #define GB_UART_TYPE_SET_LINE_CODING 0x04 #define GB_UART_TYPE_SET_CONTROL_LINE_STATE 0x05 #define GB_UART_TYPE_SEND_BREAK 0x06 #define GB_UART_TYPE_SERIAL_STATE 0x07 /* Unsolicited data */ #define GB_UART_TYPE_RECEIVE_CREDITS 0x08 #define GB_UART_TYPE_FLUSH_FIFOS 0x09 /* Represents data from AP -> Module */ struct gb_uart_send_data_request { __le16 size; __u8 data[]; } __packed; /* recv-data-request flags */ #define GB_UART_RECV_FLAG_FRAMING 0x01 /* Framing error */ #define GB_UART_RECV_FLAG_PARITY 0x02 /* Parity error */ #define GB_UART_RECV_FLAG_OVERRUN 0x04 /* Overrun error */ #define GB_UART_RECV_FLAG_BREAK 0x08 /* Break */ /* Represents data from Module -> AP */ struct gb_uart_recv_data_request { __le16 size; __u8 flags; __u8 data[]; } __packed; struct gb_uart_receive_credits_request { __le16 count; } __packed; struct gb_uart_set_line_coding_request { __le32 rate; __u8 format; #define GB_SERIAL_1_STOP_BITS 0 #define GB_SERIAL_1_5_STOP_BITS 1 #define GB_SERIAL_2_STOP_BITS 2 __u8 parity; #define GB_SERIAL_NO_PARITY 0 #define GB_SERIAL_ODD_PARITY 1 #define GB_SERIAL_EVEN_PARITY 2 #define GB_SERIAL_MARK_PARITY 3 #define GB_SERIAL_SPACE_PARITY 4 __u8 data_bits; __u8 flow_control; #define GB_SERIAL_AUTO_RTSCTS_EN 0x1 } __packed; /* output control lines */ #define GB_UART_CTRL_DTR 0x01 #define GB_UART_CTRL_RTS 0x02 struct gb_uart_set_control_line_state_request { __u8 control; } __packed; struct gb_uart_set_break_request { __u8 state; } __packed; /* input control lines and line errors */ #define GB_UART_CTRL_DCD 0x01 #define GB_UART_CTRL_DSR 0x02 #define GB_UART_CTRL_RI 0x04 struct gb_uart_serial_state_request { __u8 control; } __packed; struct gb_uart_serial_flush_request { __u8 flags; #define GB_SERIAL_FLAG_FLUSH_TRANSMITTER 0x01 #define GB_SERIAL_FLAG_FLUSH_RECEIVER 0x02 } __packed; /* Loopback */ /* Greybus loopback request types */ #define GB_LOOPBACK_TYPE_PING 0x02 #define GB_LOOPBACK_TYPE_TRANSFER 0x03 #define GB_LOOPBACK_TYPE_SINK 0x04 /* * Loopback request/response header format should be identical * to simplify bandwidth and data movement analysis. */ struct gb_loopback_transfer_request { __le32 len; __le32 reserved0; __le32 reserved1; __u8 data[]; } __packed; struct gb_loopback_transfer_response { __le32 len; __le32 reserved0; __le32 reserved1; __u8 data[]; } __packed; /* SDIO */ /* Greybus SDIO operation types */ #define GB_SDIO_TYPE_GET_CAPABILITIES 0x02 #define GB_SDIO_TYPE_SET_IOS 0x03 #define GB_SDIO_TYPE_COMMAND 0x04 #define GB_SDIO_TYPE_TRANSFER 0x05 #define GB_SDIO_TYPE_EVENT 0x06 /* get caps response: request has no payload */ struct gb_sdio_get_caps_response { __le32 caps; #define GB_SDIO_CAP_NONREMOVABLE 0x00000001 #define GB_SDIO_CAP_4_BIT_DATA 0x00000002 #define GB_SDIO_CAP_8_BIT_DATA 0x00000004 #define GB_SDIO_CAP_MMC_HS 0x00000008 #define GB_SDIO_CAP_SD_HS 0x00000010 #define GB_SDIO_CAP_ERASE 0x00000020 #define GB_SDIO_CAP_1_2V_DDR 0x00000040 #define GB_SDIO_CAP_1_8V_DDR 0x00000080 #define GB_SDIO_CAP_POWER_OFF_CARD 0x00000100 #define GB_SDIO_CAP_UHS_SDR12 0x00000200 #define GB_SDIO_CAP_UHS_SDR25 0x00000400 #define GB_SDIO_CAP_UHS_SDR50 0x00000800 #define GB_SDIO_CAP_UHS_SDR104 0x00001000 #define GB_SDIO_CAP_UHS_DDR50 0x00002000 #define GB_SDIO_CAP_DRIVER_TYPE_A 0x00004000 #define GB_SDIO_CAP_DRIVER_TYPE_C 0x00008000 #define GB_SDIO_CAP_DRIVER_TYPE_D 0x00010000 #define GB_SDIO_CAP_HS200_1_2V 0x00020000 #define GB_SDIO_CAP_HS200_1_8V 0x00040000 #define GB_SDIO_CAP_HS400_1_2V 0x00080000 #define GB_SDIO_CAP_HS400_1_8V 0x00100000 /* see possible values below at vdd */ __le32 ocr; __le32 f_min; __le32 f_max; __le16 max_blk_count; __le16 max_blk_size; } __packed; /* set ios request: response has no payload */ struct gb_sdio_set_ios_request { __le32 clock; __le32 vdd; #define GB_SDIO_VDD_165_195 0x00000001 #define GB_SDIO_VDD_20_21 0x00000002 #define GB_SDIO_VDD_21_22 0x00000004 #define GB_SDIO_VDD_22_23 0x00000008 #define GB_SDIO_VDD_23_24 0x00000010 #define GB_SDIO_VDD_24_25 0x00000020 #define GB_SDIO_VDD_25_26 0x00000040 #define GB_SDIO_VDD_26_27 0x00000080 #define GB_SDIO_VDD_27_28 0x00000100 #define GB_SDIO_VDD_28_29 0x00000200 #define GB_SDIO_VDD_29_30 0x00000400 #define GB_SDIO_VDD_30_31 0x00000800 #define GB_SDIO_VDD_31_32 0x00001000 #define GB_SDIO_VDD_32_33 0x00002000 #define GB_SDIO_VDD_33_34 0x00004000 #define GB_SDIO_VDD_34_35 0x00008000 #define GB_SDIO_VDD_35_36 0x00010000 __u8 bus_mode; #define GB_SDIO_BUSMODE_OPENDRAIN 0x00 #define GB_SDIO_BUSMODE_PUSHPULL 0x01 __u8 power_mode; #define GB_SDIO_POWER_OFF 0x00 #define GB_SDIO_POWER_UP 0x01 #define GB_SDIO_POWER_ON 0x02 #define GB_SDIO_POWER_UNDEFINED 0x03 __u8 bus_width; #define GB_SDIO_BUS_WIDTH_1 0x00 #define GB_SDIO_BUS_WIDTH_4 0x02 #define GB_SDIO_BUS_WIDTH_8 0x03 __u8 timing; #define GB_SDIO_TIMING_LEGACY 0x00 #define GB_SDIO_TIMING_MMC_HS 0x01 #define GB_SDIO_TIMING_SD_HS 0x02 #define GB_SDIO_TIMING_UHS_SDR12 0x03 #define GB_SDIO_TIMING_UHS_SDR25 0x04 #define GB_SDIO_TIMING_UHS_SDR50 0x05 #define GB_SDIO_TIMING_UHS_SDR104 0x06 #define GB_SDIO_TIMING_UHS_DDR50 0x07 #define GB_SDIO_TIMING_MMC_DDR52 0x08 #define GB_SDIO_TIMING_MMC_HS200 0x09 #define GB_SDIO_TIMING_MMC_HS400 0x0A __u8 signal_voltage; #define GB_SDIO_SIGNAL_VOLTAGE_330 0x00 #define GB_SDIO_SIGNAL_VOLTAGE_180 0x01 #define GB_SDIO_SIGNAL_VOLTAGE_120 0x02 __u8 drv_type; #define GB_SDIO_SET_DRIVER_TYPE_B 0x00 #define GB_SDIO_SET_DRIVER_TYPE_A 0x01 #define GB_SDIO_SET_DRIVER_TYPE_C 0x02 #define GB_SDIO_SET_DRIVER_TYPE_D 0x03 } __packed; /* command request */ struct gb_sdio_command_request { __u8 cmd; __u8 cmd_flags; #define GB_SDIO_RSP_NONE 0x00 #define GB_SDIO_RSP_PRESENT 0x01 #define GB_SDIO_RSP_136 0x02 #define GB_SDIO_RSP_CRC 0x04 #define GB_SDIO_RSP_BUSY 0x08 #define GB_SDIO_RSP_OPCODE 0x10 __u8 cmd_type; #define GB_SDIO_CMD_AC 0x00 #define GB_SDIO_CMD_ADTC 0x01 #define GB_SDIO_CMD_BC 0x02 #define GB_SDIO_CMD_BCR 0x03 __le32 cmd_arg; __le16 data_blocks; __le16 data_blksz; } __packed; struct gb_sdio_command_response { __le32 resp[4]; } __packed; /* transfer request */ struct gb_sdio_transfer_request { __u8 data_flags; #define GB_SDIO_DATA_WRITE 0x01 #define GB_SDIO_DATA_READ 0x02 #define GB_SDIO_DATA_STREAM 0x04 __le16 data_blocks; __le16 data_blksz; __u8 data[]; } __packed; struct gb_sdio_transfer_response { __le16 data_blocks; __le16 data_blksz; __u8 data[]; } __packed; /* event request: generated by module and is defined as unidirectional */ struct gb_sdio_event_request { __u8 event; #define GB_SDIO_CARD_INSERTED 0x01 #define GB_SDIO_CARD_REMOVED 0x02 #define GB_SDIO_WP 0x04 } __packed; /* Camera */ /* Greybus Camera request types */ #define GB_CAMERA_TYPE_CAPABILITIES 0x02 #define GB_CAMERA_TYPE_CONFIGURE_STREAMS 0x03 #define GB_CAMERA_TYPE_CAPTURE 0x04 #define GB_CAMERA_TYPE_FLUSH 0x05 #define GB_CAMERA_TYPE_METADATA 0x06 #define GB_CAMERA_MAX_STREAMS 4 #define GB_CAMERA_MAX_SETTINGS_SIZE 8192 /* Greybus Camera Configure Streams request payload */ struct gb_camera_stream_config_request { __le16 width; __le16 height; __le16 format; __le16 padding; } __packed; struct gb_camera_configure_streams_request { __u8 num_streams; __u8 flags; #define GB_CAMERA_CONFIGURE_STREAMS_TEST_ONLY 0x01 __le16 padding; struct gb_camera_stream_config_request config[]; } __packed; /* Greybus Camera Configure Streams response payload */ struct gb_camera_stream_config_response { __le16 width; __le16 height; __le16 format; __u8 virtual_channel; __u8 data_type[2]; __le16 max_pkt_size; __u8 padding; __le32 max_size; } __packed; struct gb_camera_configure_streams_response { __u8 num_streams; #define GB_CAMERA_CONFIGURE_STREAMS_ADJUSTED 0x01 __u8 flags; __u8 padding[2]; __le32 data_rate; struct gb_camera_stream_config_response config[]; }; /* Greybus Camera Capture request payload - response has no payload */ struct gb_camera_capture_request { __le32 request_id; __u8 streams; __u8 padding; __le16 num_frames; __u8 settings[]; } __packed; /* Greybus Camera Flush response payload - request has no payload */ struct gb_camera_flush_response { __le32 request_id; } __packed; /* Greybus Camera Metadata request payload - operation has no response */ struct gb_camera_metadata_request { __le32 request_id; __le16 frame_number; __u8 stream; __u8 padding; __u8 metadata[]; } __packed; /* Lights */ /* Greybus Lights request types */ #define GB_LIGHTS_TYPE_GET_LIGHTS 0x02 #define GB_LIGHTS_TYPE_GET_LIGHT_CONFIG 0x03 #define GB_LIGHTS_TYPE_GET_CHANNEL_CONFIG 0x04 #define GB_LIGHTS_TYPE_GET_CHANNEL_FLASH_CONFIG 0x05 #define GB_LIGHTS_TYPE_SET_BRIGHTNESS 0x06 #define GB_LIGHTS_TYPE_SET_BLINK 0x07 #define GB_LIGHTS_TYPE_SET_COLOR 0x08 #define GB_LIGHTS_TYPE_SET_FADE 0x09 #define GB_LIGHTS_TYPE_EVENT 0x0A #define GB_LIGHTS_TYPE_SET_FLASH_INTENSITY 0x0B #define GB_LIGHTS_TYPE_SET_FLASH_STROBE 0x0C #define GB_LIGHTS_TYPE_SET_FLASH_TIMEOUT 0x0D #define GB_LIGHTS_TYPE_GET_FLASH_FAULT 0x0E /* Greybus Light modes */ /* * if you add any specific mode below, update also the * GB_CHANNEL_MODE_DEFINED_RANGE value accordingly */ #define GB_CHANNEL_MODE_NONE 0x00000000 #define GB_CHANNEL_MODE_BATTERY 0x00000001 #define GB_CHANNEL_MODE_POWER 0x00000002 #define GB_CHANNEL_MODE_WIRELESS 0x00000004 #define GB_CHANNEL_MODE_BLUETOOTH 0x00000008 #define GB_CHANNEL_MODE_KEYBOARD 0x00000010 #define GB_CHANNEL_MODE_BUTTONS 0x00000020 #define GB_CHANNEL_MODE_NOTIFICATION 0x00000040 #define GB_CHANNEL_MODE_ATTENTION 0x00000080 #define GB_CHANNEL_MODE_FLASH 0x00000100 #define GB_CHANNEL_MODE_TORCH 0x00000200 #define GB_CHANNEL_MODE_INDICATOR 0x00000400 /* Lights Mode valid bit values */ #define GB_CHANNEL_MODE_DEFINED_RANGE 0x000004FF #define GB_CHANNEL_MODE_VENDOR_RANGE 0x00F00000 /* Greybus Light Channels Flags */ #define GB_LIGHT_CHANNEL_MULTICOLOR 0x00000001 #define GB_LIGHT_CHANNEL_FADER 0x00000002 #define GB_LIGHT_CHANNEL_BLINK 0x00000004 /* get count of lights in module */ struct gb_lights_get_lights_response { __u8 lights_count; } __packed; /* light config request payload */ struct gb_lights_get_light_config_request { __u8 id; } __packed; /* light config response payload */ struct gb_lights_get_light_config_response { __u8 channel_count; __u8 name[32]; } __packed; /* channel config request payload */ struct gb_lights_get_channel_config_request { __u8 light_id; __u8 channel_id; } __packed; /* channel flash config request payload */ struct gb_lights_get_channel_flash_config_request { __u8 light_id; __u8 channel_id; } __packed; /* channel config response payload */ struct gb_lights_get_channel_config_response { __u8 max_brightness; __le32 flags; __le32 color; __u8 color_name[32]; __le32 mode; __u8 mode_name[32]; } __packed; /* channel flash config response payload */ struct gb_lights_get_channel_flash_config_response { __le32 intensity_min_uA; __le32 intensity_max_uA; __le32 intensity_step_uA; __le32 timeout_min_us; __le32 timeout_max_us; __le32 timeout_step_us; } __packed; /* blink request payload: response have no payload */ struct gb_lights_blink_request { __u8 light_id; __u8 channel_id; __le16 time_on_ms; __le16 time_off_ms; } __packed; /* set brightness request payload: response have no payload */ struct gb_lights_set_brightness_request { __u8 light_id; __u8 channel_id; __u8 brightness; } __packed; /* set color request payload: response have no payload */ struct gb_lights_set_color_request { __u8 light_id; __u8 channel_id; __le32 color; } __packed; /* set fade request payload: response have no payload */ struct gb_lights_set_fade_request { __u8 light_id; __u8 channel_id; __u8 fade_in; __u8 fade_out; } __packed; /* event request: generated by module */ struct gb_lights_event_request { __u8 light_id; __u8 event; #define GB_LIGHTS_LIGHT_CONFIG 0x01 } __packed; /* set flash intensity request payload: response have no payload */ struct gb_lights_set_flash_intensity_request { __u8 light_id; __u8 channel_id; __le32 intensity_uA; } __packed; /* set flash strobe state request payload: response have no payload */ struct gb_lights_set_flash_strobe_request { __u8 light_id; __u8 channel_id; __u8 state; } __packed; /* set flash timeout request payload: response have no payload */ struct gb_lights_set_flash_timeout_request { __u8 light_id; __u8 channel_id; __le32 timeout_us; } __packed; /* get flash fault request payload */ struct gb_lights_get_flash_fault_request { __u8 light_id; __u8 channel_id; } __packed; /* get flash fault response payload */ struct gb_lights_get_flash_fault_response { __le32 fault; #define GB_LIGHTS_FLASH_FAULT_OVER_VOLTAGE 0x00000000 #define GB_LIGHTS_FLASH_FAULT_TIMEOUT 0x00000001 #define GB_LIGHTS_FLASH_FAULT_OVER_TEMPERATURE 0x00000002 #define GB_LIGHTS_FLASH_FAULT_SHORT_CIRCUIT 0x00000004 #define GB_LIGHTS_FLASH_FAULT_OVER_CURRENT 0x00000008 #define GB_LIGHTS_FLASH_FAULT_INDICATOR 0x00000010 #define GB_LIGHTS_FLASH_FAULT_UNDER_VOLTAGE 0x00000020 #define GB_LIGHTS_FLASH_FAULT_INPUT_VOLTAGE 0x00000040 #define GB_LIGHTS_FLASH_FAULT_LED_OVER_TEMPERATURE 0x00000080 } __packed; /* Audio */ #define GB_AUDIO_TYPE_GET_TOPOLOGY_SIZE 0x02 #define GB_AUDIO_TYPE_GET_TOPOLOGY 0x03 #define GB_AUDIO_TYPE_GET_CONTROL 0x04 #define GB_AUDIO_TYPE_SET_CONTROL 0x05 #define GB_AUDIO_TYPE_ENABLE_WIDGET 0x06 #define GB_AUDIO_TYPE_DISABLE_WIDGET 0x07 #define GB_AUDIO_TYPE_GET_PCM 0x08 #define GB_AUDIO_TYPE_SET_PCM 0x09 #define GB_AUDIO_TYPE_SET_TX_DATA_SIZE 0x0a /* 0x0b unused */ #define GB_AUDIO_TYPE_ACTIVATE_TX 0x0c #define GB_AUDIO_TYPE_DEACTIVATE_TX 0x0d #define GB_AUDIO_TYPE_SET_RX_DATA_SIZE 0x0e /* 0x0f unused */ #define GB_AUDIO_TYPE_ACTIVATE_RX 0x10 #define GB_AUDIO_TYPE_DEACTIVATE_RX 0x11 #define GB_AUDIO_TYPE_JACK_EVENT 0x12 #define GB_AUDIO_TYPE_BUTTON_EVENT 0x13 #define GB_AUDIO_TYPE_STREAMING_EVENT 0x14 #define GB_AUDIO_TYPE_SEND_DATA 0x15 /* Module must be able to buffer 10ms of audio data, minimum */ #define GB_AUDIO_SAMPLE_BUFFER_MIN_US 10000 #define GB_AUDIO_PCM_NAME_MAX 32 #define AUDIO_DAI_NAME_MAX 32 #define AUDIO_CONTROL_NAME_MAX 32 #define AUDIO_CTL_ELEM_NAME_MAX 44 #define AUDIO_ENUM_NAME_MAX 64 #define AUDIO_WIDGET_NAME_MAX 32 /* See SNDRV_PCM_FMTBIT_* in Linux source */ #define GB_AUDIO_PCM_FMT_S8 BIT(0) #define GB_AUDIO_PCM_FMT_U8 BIT(1) #define GB_AUDIO_PCM_FMT_S16_LE BIT(2) #define GB_AUDIO_PCM_FMT_S16_BE BIT(3) #define GB_AUDIO_PCM_FMT_U16_LE BIT(4) #define GB_AUDIO_PCM_FMT_U16_BE BIT(5) #define GB_AUDIO_PCM_FMT_S24_LE BIT(6) #define GB_AUDIO_PCM_FMT_S24_BE BIT(7) #define GB_AUDIO_PCM_FMT_U24_LE BIT(8) #define GB_AUDIO_PCM_FMT_U24_BE BIT(9) #define GB_AUDIO_PCM_FMT_S32_LE BIT(10) #define GB_AUDIO_PCM_FMT_S32_BE BIT(11) #define GB_AUDIO_PCM_FMT_U32_LE BIT(12) #define GB_AUDIO_PCM_FMT_U32_BE BIT(13) /* See SNDRV_PCM_RATE_* in Linux source */ #define GB_AUDIO_PCM_RATE_5512 BIT(0) #define GB_AUDIO_PCM_RATE_8000 BIT(1) #define GB_AUDIO_PCM_RATE_11025 BIT(2) #define GB_AUDIO_PCM_RATE_16000 BIT(3) #define GB_AUDIO_PCM_RATE_22050 BIT(4) #define GB_AUDIO_PCM_RATE_32000 BIT(5) #define GB_AUDIO_PCM_RATE_44100 BIT(6) #define GB_AUDIO_PCM_RATE_48000 BIT(7) #define GB_AUDIO_PCM_RATE_64000 BIT(8) #define GB_AUDIO_PCM_RATE_88200 BIT(9) #define GB_AUDIO_PCM_RATE_96000 BIT(10) #define GB_AUDIO_PCM_RATE_176400 BIT(11) #define GB_AUDIO_PCM_RATE_192000 BIT(12) #define GB_AUDIO_STREAM_TYPE_CAPTURE 0x1 #define GB_AUDIO_STREAM_TYPE_PLAYBACK 0x2 #define GB_AUDIO_CTL_ELEM_ACCESS_READ BIT(0) #define GB_AUDIO_CTL_ELEM_ACCESS_WRITE BIT(1) /* See SNDRV_CTL_ELEM_TYPE_* in Linux source */ #define GB_AUDIO_CTL_ELEM_TYPE_BOOLEAN 0x01 #define GB_AUDIO_CTL_ELEM_TYPE_INTEGER 0x02 #define GB_AUDIO_CTL_ELEM_TYPE_ENUMERATED 0x03 #define GB_AUDIO_CTL_ELEM_TYPE_INTEGER64 0x06 /* See SNDRV_CTL_ELEM_IFACE_* in Linux source */ #define GB_AUDIO_CTL_ELEM_IFACE_CARD 0x00 #define GB_AUDIO_CTL_ELEM_IFACE_HWDEP 0x01 #define GB_AUDIO_CTL_ELEM_IFACE_MIXER 0x02 #define GB_AUDIO_CTL_ELEM_IFACE_PCM 0x03 #define GB_AUDIO_CTL_ELEM_IFACE_RAWMIDI 0x04 #define GB_AUDIO_CTL_ELEM_IFACE_TIMER 0x05 #define GB_AUDIO_CTL_ELEM_IFACE_SEQUENCER 0x06 /* SNDRV_CTL_ELEM_ACCESS_* in Linux source */ #define GB_AUDIO_ACCESS_READ BIT(0) #define GB_AUDIO_ACCESS_WRITE BIT(1) #define GB_AUDIO_ACCESS_VOLATILE BIT(2) #define GB_AUDIO_ACCESS_TIMESTAMP BIT(3) #define GB_AUDIO_ACCESS_TLV_READ BIT(4) #define GB_AUDIO_ACCESS_TLV_WRITE BIT(5) #define GB_AUDIO_ACCESS_TLV_COMMAND BIT(6) #define GB_AUDIO_ACCESS_INACTIVE BIT(7) #define GB_AUDIO_ACCESS_LOCK BIT(8) #define GB_AUDIO_ACCESS_OWNER BIT(9) /* enum snd_soc_dapm_type */ #define GB_AUDIO_WIDGET_TYPE_INPUT 0x0 #define GB_AUDIO_WIDGET_TYPE_OUTPUT 0x1 #define GB_AUDIO_WIDGET_TYPE_MUX 0x2 #define GB_AUDIO_WIDGET_TYPE_VIRT_MUX 0x3 #define GB_AUDIO_WIDGET_TYPE_VALUE_MUX 0x4 #define GB_AUDIO_WIDGET_TYPE_MIXER 0x5 #define GB_AUDIO_WIDGET_TYPE_MIXER_NAMED_CTL 0x6 #define GB_AUDIO_WIDGET_TYPE_PGA 0x7 #define GB_AUDIO_WIDGET_TYPE_OUT_DRV 0x8 #define GB_AUDIO_WIDGET_TYPE_ADC 0x9 #define GB_AUDIO_WIDGET_TYPE_DAC 0xa #define GB_AUDIO_WIDGET_TYPE_MICBIAS 0xb #define GB_AUDIO_WIDGET_TYPE_MIC 0xc #define GB_AUDIO_WIDGET_TYPE_HP 0xd #define GB_AUDIO_WIDGET_TYPE_SPK 0xe #define GB_AUDIO_WIDGET_TYPE_LINE 0xf #define GB_AUDIO_WIDGET_TYPE_SWITCH 0x10 #define GB_AUDIO_WIDGET_TYPE_VMID 0x11 #define GB_AUDIO_WIDGET_TYPE_PRE 0x12 #define GB_AUDIO_WIDGET_TYPE_POST 0x13 #define GB_AUDIO_WIDGET_TYPE_SUPPLY 0x14 #define GB_AUDIO_WIDGET_TYPE_REGULATOR_SUPPLY 0x15 #define GB_AUDIO_WIDGET_TYPE_CLOCK_SUPPLY 0x16 #define GB_AUDIO_WIDGET_TYPE_AIF_IN 0x17 #define GB_AUDIO_WIDGET_TYPE_AIF_OUT 0x18 #define GB_AUDIO_WIDGET_TYPE_SIGGEN 0x19 #define GB_AUDIO_WIDGET_TYPE_DAI_IN 0x1a #define GB_AUDIO_WIDGET_TYPE_DAI_OUT 0x1b #define GB_AUDIO_WIDGET_TYPE_DAI_LINK 0x1c #define GB_AUDIO_WIDGET_STATE_DISABLED 0x01 #define GB_AUDIO_WIDGET_STATE_ENAABLED 0x02 #define GB_AUDIO_JACK_EVENT_INSERTION 0x1 #define GB_AUDIO_JACK_EVENT_REMOVAL 0x2 #define GB_AUDIO_BUTTON_EVENT_PRESS 0x1 #define GB_AUDIO_BUTTON_EVENT_RELEASE 0x2 #define GB_AUDIO_STREAMING_EVENT_UNSPECIFIED 0x1 #define GB_AUDIO_STREAMING_EVENT_HALT 0x2 #define GB_AUDIO_STREAMING_EVENT_INTERNAL_ERROR 0x3 #define GB_AUDIO_STREAMING_EVENT_PROTOCOL_ERROR 0x4 #define GB_AUDIO_STREAMING_EVENT_FAILURE 0x5 #define GB_AUDIO_STREAMING_EVENT_UNDERRUN 0x6 #define GB_AUDIO_STREAMING_EVENT_OVERRUN 0x7 #define GB_AUDIO_STREAMING_EVENT_CLOCKING 0x8 #define GB_AUDIO_STREAMING_EVENT_DATA_LEN 0x9 #define GB_AUDIO_INVALID_INDEX 0xff /* enum snd_jack_types */ #define GB_AUDIO_JACK_HEADPHONE 0x0000001 #define GB_AUDIO_JACK_MICROPHONE 0x0000002 #define GB_AUDIO_JACK_HEADSET (GB_AUDIO_JACK_HEADPHONE | \ GB_AUDIO_JACK_MICROPHONE) #define GB_AUDIO_JACK_LINEOUT 0x0000004 #define GB_AUDIO_JACK_MECHANICAL 0x0000008 #define GB_AUDIO_JACK_VIDEOOUT 0x0000010 #define GB_AUDIO_JACK_AVOUT (GB_AUDIO_JACK_LINEOUT | \ GB_AUDIO_JACK_VIDEOOUT) #define GB_AUDIO_JACK_LINEIN 0x0000020 #define GB_AUDIO_JACK_OC_HPHL 0x0000040 #define GB_AUDIO_JACK_OC_HPHR 0x0000080 #define GB_AUDIO_JACK_MICROPHONE2 0x0000200 #define GB_AUDIO_JACK_ANC_HEADPHONE (GB_AUDIO_JACK_HEADPHONE | \ GB_AUDIO_JACK_MICROPHONE | \ GB_AUDIO_JACK_MICROPHONE2) /* Kept separate from switches to facilitate implementation */ #define GB_AUDIO_JACK_BTN_0 0x4000000 #define GB_AUDIO_JACK_BTN_1 0x2000000 #define GB_AUDIO_JACK_BTN_2 0x1000000 #define GB_AUDIO_JACK_BTN_3 0x0800000 struct gb_audio_pcm { __u8 stream_name[GB_AUDIO_PCM_NAME_MAX]; __le32 formats; /* GB_AUDIO_PCM_FMT_* */ __le32 rates; /* GB_AUDIO_PCM_RATE_* */ __u8 chan_min; __u8 chan_max; __u8 sig_bits; /* number of bits of content */ } __packed; struct gb_audio_dai { __u8 name[AUDIO_DAI_NAME_MAX]; __le16 data_cport; struct gb_audio_pcm capture; struct gb_audio_pcm playback; } __packed; struct gb_audio_integer { __le32 min; __le32 max; __le32 step; } __packed; struct gb_audio_integer64 { __le64 min; __le64 max; __le64 step; } __packed; struct gb_audio_enumerated { __le32 items; __le16 names_length; __u8 names[]; } __packed; struct gb_audio_ctl_elem_info { /* See snd_ctl_elem_info in Linux source */ __u8 type; /* GB_AUDIO_CTL_ELEM_TYPE_* */ __le16 dimen[4]; union { struct gb_audio_integer integer; struct gb_audio_integer64 integer64; struct gb_audio_enumerated enumerated; } value; } __packed; struct gb_audio_ctl_elem_value { /* See snd_ctl_elem_value in Linux source */ __le64 timestamp; /* XXX needed? */ union { __le32 integer_value[2]; /* consider CTL_DOUBLE_xxx */ __le64 integer64_value[2]; __le32 enumerated_item[2]; } value; } __packed; struct gb_audio_control { __u8 name[AUDIO_CONTROL_NAME_MAX]; __u8 id; /* 0-63 */ __u8 iface; /* GB_AUDIO_IFACE_* */ __le16 data_cport; __le32 access; /* GB_AUDIO_ACCESS_* */ __u8 count; /* count of same elements */ __u8 count_values; /* count of values, max=2 for CTL_DOUBLE_xxx */ struct gb_audio_ctl_elem_info info; } __packed; struct gb_audio_widget { __u8 name[AUDIO_WIDGET_NAME_MAX]; __u8 sname[AUDIO_WIDGET_NAME_MAX]; __u8 id; __u8 type; /* GB_AUDIO_WIDGET_TYPE_* */ __u8 state; /* GB_AUDIO_WIDGET_STATE_* */ __u8 ncontrols; struct gb_audio_control ctl[]; /* 'ncontrols' entries */ } __packed; struct gb_audio_route { __u8 source_id; /* widget id */ __u8 destination_id; /* widget id */ __u8 control_id; /* 0-63 */ __u8 index; /* Selection within the control */ } __packed; struct gb_audio_topology { __u8 num_dais; __u8 num_controls; __u8 num_widgets; __u8 num_routes; __le32 size_dais; __le32 size_controls; __le32 size_widgets; __le32 size_routes; __le32 jack_type; /* * struct gb_audio_dai dai[num_dais]; * struct gb_audio_control controls[num_controls]; * struct gb_audio_widget widgets[num_widgets]; * struct gb_audio_route routes[num_routes]; */ __u8 data[]; } __packed; struct gb_audio_get_topology_size_response { __le16 size; } __packed; struct gb_audio_get_topology_response { struct gb_audio_topology topology; } __packed; struct gb_audio_get_control_request { __u8 control_id; __u8 index; } __packed; struct gb_audio_get_control_response { struct gb_audio_ctl_elem_value value; } __packed; struct gb_audio_set_control_request { __u8 control_id; __u8 index; struct gb_audio_ctl_elem_value value; } __packed; struct gb_audio_enable_widget_request { __u8 widget_id; } __packed; struct gb_audio_disable_widget_request { __u8 widget_id; } __packed; struct gb_audio_get_pcm_request { __le16 data_cport; } __packed; struct gb_audio_get_pcm_response { __le32 format; __le32 rate; __u8 channels; __u8 sig_bits; } __packed; struct gb_audio_set_pcm_request { __le16 data_cport; __le32 format; __le32 rate; __u8 channels; __u8 sig_bits; } __packed; struct gb_audio_set_tx_data_size_request { __le16 data_cport; __le16 size; } __packed; struct gb_audio_activate_tx_request { __le16 data_cport; } __packed; struct gb_audio_deactivate_tx_request { __le16 data_cport; } __packed; struct gb_audio_set_rx_data_size_request { __le16 data_cport; __le16 size; } __packed; struct gb_audio_activate_rx_request { __le16 data_cport; } __packed; struct gb_audio_deactivate_rx_request { __le16 data_cport; } __packed; struct gb_audio_jack_event_request { __u8 widget_id; __u8 jack_attribute; __u8 event; } __packed; struct gb_audio_button_event_request { __u8 widget_id; __u8 button_id; __u8 event; } __packed; struct gb_audio_streaming_event_request { __le16 data_cport; __u8 event; } __packed; struct gb_audio_send_data_request { __le64 timestamp; __u8 data[]; } __packed; /* Log */ /* operations */ #define GB_LOG_TYPE_SEND_LOG 0x02 /* length */ #define GB_LOG_MAX_LEN 1024 struct gb_log_send_log_request { __le16 len; __u8 msg[]; } __packed; #endif /* __GREYBUS_PROTOCOLS_H */ PK ! &;]F greybus/operation.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus operations * * Copyright 2014 Google Inc. * Copyright 2014 Linaro Ltd. */ #ifndef __OPERATION_H #define __OPERATION_H #include <linux/completion.h> #include <linux/kref.h> #include <linux/timer.h> #include <linux/types.h> #include <linux/workqueue.h> struct gb_host_device; struct gb_operation; /* The default amount of time a request is given to complete */ #define GB_OPERATION_TIMEOUT_DEFAULT 1000 /* milliseconds */ /* * The top bit of the type in an operation message header indicates * whether the message is a request (bit clear) or response (bit set) */ #define GB_MESSAGE_TYPE_RESPONSE ((u8)0x80) enum gb_operation_result { GB_OP_SUCCESS = 0x00, GB_OP_INTERRUPTED = 0x01, GB_OP_TIMEOUT = 0x02, GB_OP_NO_MEMORY = 0x03, GB_OP_PROTOCOL_BAD = 0x04, GB_OP_OVERFLOW = 0x05, GB_OP_INVALID = 0x06, GB_OP_RETRY = 0x07, GB_OP_NONEXISTENT = 0x08, GB_OP_UNKNOWN_ERROR = 0xfe, GB_OP_MALFUNCTION = 0xff, }; #define GB_OPERATION_MESSAGE_SIZE_MIN sizeof(struct gb_operation_msg_hdr) #define GB_OPERATION_MESSAGE_SIZE_MAX U16_MAX /* * Protocol code should only examine the payload and payload_size fields, and * host-controller drivers may use the hcpriv field. All other fields are * intended to be private to the operations core code. */ struct gb_message { struct gb_operation *operation; struct gb_operation_msg_hdr *header; void *payload; size_t payload_size; void *buffer; void *hcpriv; }; #define GB_OPERATION_FLAG_INCOMING BIT(0) #define GB_OPERATION_FLAG_UNIDIRECTIONAL BIT(1) #define GB_OPERATION_FLAG_SHORT_RESPONSE BIT(2) #define GB_OPERATION_FLAG_CORE BIT(3) #define GB_OPERATION_FLAG_USER_MASK (GB_OPERATION_FLAG_SHORT_RESPONSE | \ GB_OPERATION_FLAG_UNIDIRECTIONAL) /* * A Greybus operation is a remote procedure call performed over a * connection between two UniPro interfaces. * * Every operation consists of a request message sent to the other * end of the connection coupled with a reply message returned to * the sender. Every operation has a type, whose interpretation is * dependent on the protocol associated with the connection. * * Only four things in an operation structure are intended to be * directly usable by protocol handlers: the operation's connection * pointer; the operation type; the request message payload (and * size); and the response message payload (and size). Note that a * message with a 0-byte payload has a null message payload pointer. * * In addition, every operation has a result, which is an errno * value. Protocol handlers access the operation result using * gb_operation_result(). */ typedef void (*gb_operation_callback)(struct gb_operation *); struct gb_operation { struct gb_connection *connection; struct gb_message *request; struct gb_message *response; unsigned long flags; u8 type; u16 id; int errno; /* Operation result */ struct work_struct work; gb_operation_callback callback; struct completion completion; struct timer_list timer; struct kref kref; atomic_t waiters; int active; struct list_head links; /* connection->operations */ void *private; }; static inline bool gb_operation_is_incoming(struct gb_operation *operation) { return operation->flags & GB_OPERATION_FLAG_INCOMING; } static inline bool gb_operation_is_unidirectional(struct gb_operation *operation) { return operation->flags & GB_OPERATION_FLAG_UNIDIRECTIONAL; } static inline bool gb_operation_short_response_allowed(struct gb_operation *operation) { return operation->flags & GB_OPERATION_FLAG_SHORT_RESPONSE; } static inline bool gb_operation_is_core(struct gb_operation *operation) { return operation->flags & GB_OPERATION_FLAG_CORE; } void gb_connection_recv(struct gb_connection *connection, void *data, size_t size); int gb_operation_result(struct gb_operation *operation); size_t gb_operation_get_payload_size_max(struct gb_connection *connection); struct gb_operation * gb_operation_create_flags(struct gb_connection *connection, u8 type, size_t request_size, size_t response_size, unsigned long flags, gfp_t gfp); static inline struct gb_operation * gb_operation_create(struct gb_connection *connection, u8 type, size_t request_size, size_t response_size, gfp_t gfp) { return gb_operation_create_flags(connection, type, request_size, response_size, 0, gfp); } struct gb_operation * gb_operation_create_core(struct gb_connection *connection, u8 type, size_t request_size, size_t response_size, unsigned long flags, gfp_t gfp); void gb_operation_get(struct gb_operation *operation); void gb_operation_put(struct gb_operation *operation); bool gb_operation_response_alloc(struct gb_operation *operation, size_t response_size, gfp_t gfp); int gb_operation_request_send(struct gb_operation *operation, gb_operation_callback callback, unsigned int timeout, gfp_t gfp); int gb_operation_request_send_sync_timeout(struct gb_operation *operation, unsigned int timeout); static inline int gb_operation_request_send_sync(struct gb_operation *operation) { return gb_operation_request_send_sync_timeout(operation, GB_OPERATION_TIMEOUT_DEFAULT); } void gb_operation_cancel(struct gb_operation *operation, int errno); void gb_operation_cancel_incoming(struct gb_operation *operation, int errno); void greybus_message_sent(struct gb_host_device *hd, struct gb_message *message, int status); int gb_operation_sync_timeout(struct gb_connection *connection, int type, void *request, int request_size, void *response, int response_size, unsigned int timeout); int gb_operation_unidirectional_timeout(struct gb_connection *connection, int type, void *request, int request_size, unsigned int timeout); static inline int gb_operation_sync(struct gb_connection *connection, int type, void *request, int request_size, void *response, int response_size) { return gb_operation_sync_timeout(connection, type, request, request_size, response, response_size, GB_OPERATION_TIMEOUT_DEFAULT); } static inline int gb_operation_unidirectional(struct gb_connection *connection, int type, void *request, int request_size) { return gb_operation_unidirectional_timeout(connection, type, request, request_size, GB_OPERATION_TIMEOUT_DEFAULT); } static inline void *gb_operation_get_data(struct gb_operation *operation) { return operation->private; } static inline void gb_operation_set_data(struct gb_operation *operation, void *data) { operation->private = data; } int gb_operation_init(void); void gb_operation_exit(void); #endif /* !__OPERATION_H */ PK ! wH 6� � greybus/connection.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus connections * * Copyright 2014 Google Inc. * Copyright 2014 Linaro Ltd. */ #ifndef __CONNECTION_H #define __CONNECTION_H #include <linux/bits.h> #include <linux/list.h> #include <linux/kfifo.h> #include <linux/kref.h> #include <linux/workqueue.h> #define GB_CONNECTION_FLAG_CSD BIT(0) #define GB_CONNECTION_FLAG_NO_FLOWCTRL BIT(1) #define GB_CONNECTION_FLAG_OFFLOADED BIT(2) #define GB_CONNECTION_FLAG_CDSI1 BIT(3) #define GB_CONNECTION_FLAG_CONTROL BIT(4) #define GB_CONNECTION_FLAG_HIGH_PRIO BIT(5) #define GB_CONNECTION_FLAG_CORE_MASK GB_CONNECTION_FLAG_CONTROL enum gb_connection_state { GB_CONNECTION_STATE_DISABLED = 0, GB_CONNECTION_STATE_ENABLED_TX = 1, GB_CONNECTION_STATE_ENABLED = 2, GB_CONNECTION_STATE_DISCONNECTING = 3, }; struct gb_operation; typedef int (*gb_request_handler_t)(struct gb_operation *); struct gb_connection { struct gb_host_device *hd; struct gb_interface *intf; struct gb_bundle *bundle; struct kref kref; u16 hd_cport_id; u16 intf_cport_id; struct list_head hd_links; struct list_head bundle_links; gb_request_handler_t handler; unsigned long flags; struct mutex mutex; spinlock_t lock; enum gb_connection_state state; struct list_head operations; char name[16]; struct workqueue_struct *wq; atomic_t op_cycle; void *private; bool mode_switch; }; struct gb_connection *gb_connection_create_static(struct gb_host_device *hd, u16 hd_cport_id, gb_request_handler_t handler); struct gb_connection *gb_connection_create_control(struct gb_interface *intf); struct gb_connection *gb_connection_create(struct gb_bundle *bundle, u16 cport_id, gb_request_handler_t handler); struct gb_connection *gb_connection_create_flags(struct gb_bundle *bundle, u16 cport_id, gb_request_handler_t handler, unsigned long flags); struct gb_connection *gb_connection_create_offloaded(struct gb_bundle *bundle, u16 cport_id, unsigned long flags); void gb_connection_destroy(struct gb_connection *connection); static inline bool gb_connection_is_static(struct gb_connection *connection) { return !connection->intf; } int gb_connection_enable(struct gb_connection *connection); int gb_connection_enable_tx(struct gb_connection *connection); void gb_connection_disable_rx(struct gb_connection *connection); void gb_connection_disable(struct gb_connection *connection); void gb_connection_disable_forced(struct gb_connection *connection); void gb_connection_mode_switch_prepare(struct gb_connection *connection); void gb_connection_mode_switch_complete(struct gb_connection *connection); void greybus_data_rcvd(struct gb_host_device *hd, u16 cport_id, u8 *data, size_t length); void gb_connection_latency_tag_enable(struct gb_connection *connection); void gb_connection_latency_tag_disable(struct gb_connection *connection); static inline bool gb_connection_e2efc_enabled(struct gb_connection *connection) { return !(connection->flags & GB_CONNECTION_FLAG_CSD); } static inline bool gb_connection_flow_control_disabled(struct gb_connection *connection) { return connection->flags & GB_CONNECTION_FLAG_NO_FLOWCTRL; } static inline bool gb_connection_is_offloaded(struct gb_connection *connection) { return connection->flags & GB_CONNECTION_FLAG_OFFLOADED; } static inline bool gb_connection_is_control(struct gb_connection *connection) { return connection->flags & GB_CONNECTION_FLAG_CONTROL; } static inline void *gb_connection_get_data(struct gb_connection *connection) { return connection->private; } static inline void gb_connection_set_data(struct gb_connection *connection, void *data) { connection->private = data; } #endif /* __CONNECTION_H */ PK ! u��( ( greybus/greybus_manifest.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus manifest definition * * See "Greybus Application Protocol" document (version 0.1) for * details on these values and structures. * * Copyright 2014-2015 Google Inc. * Copyright 2014-2015 Linaro Ltd. * * Released under the GPLv2 and BSD licenses. */ #ifndef __GREYBUS_MANIFEST_H #define __GREYBUS_MANIFEST_H #include <linux/bits.h> #include <linux/types.h> enum greybus_descriptor_type { GREYBUS_TYPE_INVALID = 0x00, GREYBUS_TYPE_INTERFACE = 0x01, GREYBUS_TYPE_STRING = 0x02, GREYBUS_TYPE_BUNDLE = 0x03, GREYBUS_TYPE_CPORT = 0x04, }; enum greybus_protocol { GREYBUS_PROTOCOL_CONTROL = 0x00, /* 0x01 is unused */ GREYBUS_PROTOCOL_GPIO = 0x02, GREYBUS_PROTOCOL_I2C = 0x03, GREYBUS_PROTOCOL_UART = 0x04, GREYBUS_PROTOCOL_HID = 0x05, GREYBUS_PROTOCOL_USB = 0x06, GREYBUS_PROTOCOL_SDIO = 0x07, GREYBUS_PROTOCOL_POWER_SUPPLY = 0x08, GREYBUS_PROTOCOL_PWM = 0x09, /* 0x0a is unused */ GREYBUS_PROTOCOL_SPI = 0x0b, GREYBUS_PROTOCOL_DISPLAY = 0x0c, GREYBUS_PROTOCOL_CAMERA_MGMT = 0x0d, GREYBUS_PROTOCOL_SENSOR = 0x0e, GREYBUS_PROTOCOL_LIGHTS = 0x0f, GREYBUS_PROTOCOL_VIBRATOR = 0x10, GREYBUS_PROTOCOL_LOOPBACK = 0x11, GREYBUS_PROTOCOL_AUDIO_MGMT = 0x12, GREYBUS_PROTOCOL_AUDIO_DATA = 0x13, GREYBUS_PROTOCOL_SVC = 0x14, GREYBUS_PROTOCOL_BOOTROM = 0x15, GREYBUS_PROTOCOL_CAMERA_DATA = 0x16, GREYBUS_PROTOCOL_FW_DOWNLOAD = 0x17, GREYBUS_PROTOCOL_FW_MANAGEMENT = 0x18, GREYBUS_PROTOCOL_AUTHENTICATION = 0x19, GREYBUS_PROTOCOL_LOG = 0x1a, /* ... */ GREYBUS_PROTOCOL_RAW = 0xfe, GREYBUS_PROTOCOL_VENDOR = 0xff, }; enum greybus_class_type { GREYBUS_CLASS_CONTROL = 0x00, /* 0x01 is unused */ /* 0x02 is unused */ /* 0x03 is unused */ /* 0x04 is unused */ GREYBUS_CLASS_HID = 0x05, /* 0x06 is unused */ /* 0x07 is unused */ GREYBUS_CLASS_POWER_SUPPLY = 0x08, /* 0x09 is unused */ GREYBUS_CLASS_BRIDGED_PHY = 0x0a, /* 0x0b is unused */ GREYBUS_CLASS_DISPLAY = 0x0c, GREYBUS_CLASS_CAMERA = 0x0d, GREYBUS_CLASS_SENSOR = 0x0e, GREYBUS_CLASS_LIGHTS = 0x0f, GREYBUS_CLASS_VIBRATOR = 0x10, GREYBUS_CLASS_LOOPBACK = 0x11, GREYBUS_CLASS_AUDIO = 0x12, /* 0x13 is unused */ /* 0x14 is unused */ GREYBUS_CLASS_BOOTROM = 0x15, GREYBUS_CLASS_FW_MANAGEMENT = 0x16, GREYBUS_CLASS_LOG = 0x17, /* ... */ GREYBUS_CLASS_RAW = 0xfe, GREYBUS_CLASS_VENDOR = 0xff, }; enum { GREYBUS_INTERFACE_FEATURE_TIMESYNC = BIT(0), }; /* * The string in a string descriptor is not NUL-terminated. The * size of the descriptor will be rounded up to a multiple of 4 * bytes, by padding the string with 0x00 bytes if necessary. */ struct greybus_descriptor_string { __u8 length; __u8 id; __u8 string[0]; } __packed; /* * An interface descriptor describes information about an interface as a whole, * *not* the functions within it. */ struct greybus_descriptor_interface { __u8 vendor_stringid; __u8 product_stringid; __u8 features; __u8 pad; } __packed; /* * An bundle descriptor defines an identification number and a class for * each bundle. * * @id: Uniquely identifies a bundle within a interface, its sole purpose is to * allow CPort descriptors to specify which bundle they are associated with. * The first bundle will have id 0, second will have 1 and so on. * * The largest CPort id associated with an bundle (defined by a * CPort descriptor in the manifest) is used to determine how to * encode the device id and module number in UniPro packets * that use the bundle. * * @class: It is used by kernel to know the functionality provided by the * bundle and will be matched against drivers functinality while probing greybus * driver. It should contain one of the values defined in * 'enum greybus_class_type'. * */ struct greybus_descriptor_bundle { __u8 id; /* interface-relative id (0..) */ __u8 class; __u8 pad[2]; } __packed; /* * A CPort descriptor indicates the id of the bundle within the * module it's associated with, along with the CPort id used to * address the CPort. The protocol id defines the format of messages * exchanged using the CPort. */ struct greybus_descriptor_cport { __le16 id; __u8 bundle; __u8 protocol_id; /* enum greybus_protocol */ } __packed; struct greybus_descriptor_header { __le16 size; __u8 type; /* enum greybus_descriptor_type */ __u8 pad; } __packed; struct greybus_descriptor { struct greybus_descriptor_header header; union { struct greybus_descriptor_string string; struct greybus_descriptor_interface interface; struct greybus_descriptor_bundle bundle; struct greybus_descriptor_cport cport; }; } __packed; struct greybus_manifest_header { __le16 size; __u8 version_major; __u8 version_minor; } __packed; struct greybus_manifest { struct greybus_manifest_header header; struct greybus_descriptor descriptors[0]; } __packed; #endif /* __GREYBUS_MANIFEST_H */ PK ! �7~L� � greybus/interface.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus Interface Block code * * Copyright 2014 Google Inc. * Copyright 2014 Linaro Ltd. */ #ifndef __INTERFACE_H #define __INTERFACE_H #include <linux/types.h> #include <linux/device.h> enum gb_interface_type { GB_INTERFACE_TYPE_INVALID = 0, GB_INTERFACE_TYPE_UNKNOWN, GB_INTERFACE_TYPE_DUMMY, GB_INTERFACE_TYPE_UNIPRO, GB_INTERFACE_TYPE_GREYBUS, }; #define GB_INTERFACE_QUIRK_NO_CPORT_FEATURES BIT(0) #define GB_INTERFACE_QUIRK_NO_INIT_STATUS BIT(1) #define GB_INTERFACE_QUIRK_NO_GMP_IDS BIT(2) #define GB_INTERFACE_QUIRK_FORCED_DISABLE BIT(3) #define GB_INTERFACE_QUIRK_LEGACY_MODE_SWITCH BIT(4) #define GB_INTERFACE_QUIRK_NO_BUNDLE_ACTIVATE BIT(5) #define GB_INTERFACE_QUIRK_NO_PM BIT(6) struct gb_interface { struct device dev; struct gb_control *control; struct list_head bundles; struct list_head module_node; struct list_head manifest_descs; u8 interface_id; /* Physical location within the Endo */ u8 device_id; u8 features; /* Feature flags set in the manifest */ enum gb_interface_type type; u32 ddbl1_manufacturer_id; u32 ddbl1_product_id; u32 vendor_id; u32 product_id; u64 serial_number; struct gb_host_device *hd; struct gb_module *module; unsigned long quirks; struct mutex mutex; bool disconnected; bool ejected; bool removed; bool active; bool enabled; bool mode_switch; bool dme_read; struct work_struct mode_switch_work; struct completion mode_switch_completion; }; #define to_gb_interface(d) container_of(d, struct gb_interface, dev) struct gb_interface *gb_interface_create(struct gb_module *module, u8 interface_id); int gb_interface_activate(struct gb_interface *intf); void gb_interface_deactivate(struct gb_interface *intf); int gb_interface_enable(struct gb_interface *intf); void gb_interface_disable(struct gb_interface *intf); int gb_interface_add(struct gb_interface *intf); void gb_interface_del(struct gb_interface *intf); void gb_interface_put(struct gb_interface *intf); void gb_interface_mailbox_event(struct gb_interface *intf, u16 result, u32 mailbox); int gb_interface_request_mode_switch(struct gb_interface *intf); #endif /* __INTERFACE_H */ PK ! �ד� � greybus/control.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus CPort control protocol * * Copyright 2015 Google Inc. * Copyright 2015 Linaro Ltd. */ #ifndef __CONTROL_H #define __CONTROL_H #include <linux/types.h> #include <linux/device.h> struct gb_control { struct device dev; struct gb_interface *intf; struct gb_connection *connection; u8 protocol_major; u8 protocol_minor; bool has_bundle_activate; bool has_bundle_version; char *vendor_string; char *product_string; }; #define to_gb_control(d) container_of(d, struct gb_control, dev) struct gb_control *gb_control_create(struct gb_interface *intf); int gb_control_enable(struct gb_control *control); void gb_control_disable(struct gb_control *control); int gb_control_suspend(struct gb_control *control); int gb_control_resume(struct gb_control *control); int gb_control_add(struct gb_control *control); void gb_control_del(struct gb_control *control); struct gb_control *gb_control_get(struct gb_control *control); void gb_control_put(struct gb_control *control); int gb_control_get_bundle_versions(struct gb_control *control); int gb_control_connected_operation(struct gb_control *control, u16 cport_id); int gb_control_disconnected_operation(struct gb_control *control, u16 cport_id); int gb_control_disconnecting_operation(struct gb_control *control, u16 cport_id); int gb_control_mode_switch_operation(struct gb_control *control); void gb_control_mode_switch_prepare(struct gb_control *control); void gb_control_mode_switch_complete(struct gb_control *control); int gb_control_get_manifest_size_operation(struct gb_interface *intf); int gb_control_get_manifest_operation(struct gb_interface *intf, void *manifest, size_t size); int gb_control_bundle_suspend(struct gb_control *control, u8 bundle_id); int gb_control_bundle_resume(struct gb_control *control, u8 bundle_id); int gb_control_bundle_deactivate(struct gb_control *control, u8 bundle_id); int gb_control_bundle_activate(struct gb_control *control, u8 bundle_id); int gb_control_interface_suspend_prepare(struct gb_control *control); int gb_control_interface_deactivate_prepare(struct gb_control *control); int gb_control_interface_hibernate_abort(struct gb_control *control); #endif /* __CONTROL_H */ PK ! �@�� � greybus/svc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus SVC code * * Copyright 2015 Google Inc. * Copyright 2015 Linaro Ltd. */ #ifndef __SVC_H #define __SVC_H #include <linux/types.h> #include <linux/device.h> struct gb_svc_l2_timer_cfg; #define GB_SVC_CPORT_FLAG_E2EFC BIT(0) #define GB_SVC_CPORT_FLAG_CSD_N BIT(1) #define GB_SVC_CPORT_FLAG_CSV_N BIT(2) enum gb_svc_state { GB_SVC_STATE_RESET, GB_SVC_STATE_PROTOCOL_VERSION, GB_SVC_STATE_SVC_HELLO, }; enum gb_svc_watchdog_bite { GB_SVC_WATCHDOG_BITE_RESET_UNIPRO = 0, GB_SVC_WATCHDOG_BITE_PANIC_KERNEL, }; struct gb_svc_watchdog; struct svc_debugfs_pwrmon_rail { u8 id; struct gb_svc *svc; }; struct gb_svc { struct device dev; struct gb_host_device *hd; struct gb_connection *connection; enum gb_svc_state state; struct ida device_id_map; struct workqueue_struct *wq; u16 endo_id; u8 ap_intf_id; u8 protocol_major; u8 protocol_minor; struct gb_svc_watchdog *watchdog; enum gb_svc_watchdog_bite action; struct dentry *debugfs_dentry; struct svc_debugfs_pwrmon_rail *pwrmon_rails; }; #define to_gb_svc(d) container_of(d, struct gb_svc, dev) struct gb_svc *gb_svc_create(struct gb_host_device *hd); int gb_svc_add(struct gb_svc *svc); void gb_svc_del(struct gb_svc *svc); void gb_svc_put(struct gb_svc *svc); int gb_svc_pwrmon_intf_sample_get(struct gb_svc *svc, u8 intf_id, u8 measurement_type, u32 *value); int gb_svc_intf_device_id(struct gb_svc *svc, u8 intf_id, u8 device_id); int gb_svc_route_create(struct gb_svc *svc, u8 intf1_id, u8 dev1_id, u8 intf2_id, u8 dev2_id); void gb_svc_route_destroy(struct gb_svc *svc, u8 intf1_id, u8 intf2_id); int gb_svc_connection_create(struct gb_svc *svc, u8 intf1_id, u16 cport1_id, u8 intf2_id, u16 cport2_id, u8 cport_flags); void gb_svc_connection_destroy(struct gb_svc *svc, u8 intf1_id, u16 cport1_id, u8 intf2_id, u16 cport2_id); int gb_svc_intf_eject(struct gb_svc *svc, u8 intf_id); int gb_svc_intf_vsys_set(struct gb_svc *svc, u8 intf_id, bool enable); int gb_svc_intf_refclk_set(struct gb_svc *svc, u8 intf_id, bool enable); int gb_svc_intf_unipro_set(struct gb_svc *svc, u8 intf_id, bool enable); int gb_svc_intf_activate(struct gb_svc *svc, u8 intf_id, u8 *intf_type); int gb_svc_intf_resume(struct gb_svc *svc, u8 intf_id); int gb_svc_dme_peer_get(struct gb_svc *svc, u8 intf_id, u16 attr, u16 selector, u32 *value); int gb_svc_dme_peer_set(struct gb_svc *svc, u8 intf_id, u16 attr, u16 selector, u32 value); int gb_svc_intf_set_power_mode(struct gb_svc *svc, u8 intf_id, u8 hs_series, u8 tx_mode, u8 tx_gear, u8 tx_nlanes, u8 tx_amplitude, u8 tx_hs_equalizer, u8 rx_mode, u8 rx_gear, u8 rx_nlanes, u8 flags, u32 quirks, struct gb_svc_l2_timer_cfg *local, struct gb_svc_l2_timer_cfg *remote); int gb_svc_intf_set_power_mode_hibernate(struct gb_svc *svc, u8 intf_id); int gb_svc_ping(struct gb_svc *svc); int gb_svc_watchdog_create(struct gb_svc *svc); void gb_svc_watchdog_destroy(struct gb_svc *svc); bool gb_svc_watchdog_enabled(struct gb_svc *svc); int gb_svc_watchdog_enable(struct gb_svc *svc); int gb_svc_watchdog_disable(struct gb_svc *svc); int gb_svc_protocol_init(void); void gb_svc_protocol_exit(void); #endif /* __SVC_H */ PK ! �wK K greybus/manifest.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus manifest parsing * * Copyright 2014 Google Inc. * Copyright 2014 Linaro Ltd. */ #ifndef __MANIFEST_H #define __MANIFEST_H #include <linux/types.h> struct gb_interface; bool gb_manifest_parse(struct gb_interface *intf, void *data, size_t size); #endif /* __MANIFEST_H */ PK ! �~��� � greybus/module.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus Module code * * Copyright 2016 Google Inc. * Copyright 2016 Linaro Ltd. */ #ifndef __MODULE_H #define __MODULE_H #include <linux/types.h> #include <linux/device.h> struct gb_module { struct device dev; struct gb_host_device *hd; struct list_head hd_node; u8 module_id; size_t num_interfaces; bool disconnected; struct gb_interface *interfaces[0]; }; #define to_gb_module(d) container_of(d, struct gb_module, dev) struct gb_module *gb_module_create(struct gb_host_device *hd, u8 module_id, size_t num_interfaces); int gb_module_add(struct gb_module *module); void gb_module_del(struct gb_module *module); void gb_module_put(struct gb_module *module); #endif /* __MODULE_H */ PK ! �=�{ { pktcdvd.hnu �[��� /* * Copyright (C) 2000 Jens Axboe <axboe@suse.de> * Copyright (C) 2001-2004 Peter Osterlund <petero2@telia.com> * * May be copied or modified under the terms of the GNU General Public * License. See linux/COPYING for more information. * * Packet writing layer for ATAPI and SCSI CD-R, CD-RW, DVD-R, and * DVD-RW devices. * */ #ifndef __PKTCDVD_H #define __PKTCDVD_H #include <linux/blkdev.h> #include <linux/completion.h> #include <linux/cdrom.h> #include <linux/kobject.h> #include <linux/sysfs.h> #include <linux/mempool.h> #include <uapi/linux/pktcdvd.h> /* default bio write queue congestion marks */ #define PKT_WRITE_CONGESTION_ON 10000 #define PKT_WRITE_CONGESTION_OFF 9000 struct packet_settings { __u32 size; /* packet size in (512 byte) sectors */ __u8 fp; /* fixed packets */ __u8 link_loss; /* the rest is specified * as per Mt Fuji */ __u8 write_type; __u8 track_mode; __u8 block_mode; }; /* * Very crude stats for now */ struct packet_stats { unsigned long pkt_started; unsigned long pkt_ended; unsigned long secs_w; unsigned long secs_rg; unsigned long secs_r; }; struct packet_cdrw { struct list_head pkt_free_list; struct list_head pkt_active_list; spinlock_t active_list_lock; /* Serialize access to pkt_active_list */ struct task_struct *thread; atomic_t pending_bios; }; /* * Switch to high speed reading after reading this many kilobytes * with no interspersed writes. */ #define HI_SPEED_SWITCH 512 struct packet_iosched { atomic_t attention; /* Set to non-zero when queue processing is needed */ int writing; /* Non-zero when writing, zero when reading */ spinlock_t lock; /* Protecting read/write queue manipulations */ struct bio_list read_queue; struct bio_list write_queue; sector_t last_write; /* The sector where the last write ended */ int successive_reads; }; /* * 32 buffers of 2048 bytes */ #if (PAGE_SIZE % CD_FRAMESIZE) != 0 #error "PAGE_SIZE must be a multiple of CD_FRAMESIZE" #endif #define PACKET_MAX_SIZE 128 #define FRAMES_PER_PAGE (PAGE_SIZE / CD_FRAMESIZE) #define PACKET_MAX_SECTORS (PACKET_MAX_SIZE * CD_FRAMESIZE >> 9) enum packet_data_state { PACKET_IDLE_STATE, /* Not used at the moment */ PACKET_WAITING_STATE, /* Waiting for more bios to arrive, so */ /* we don't have to do as much */ /* data gathering */ PACKET_READ_WAIT_STATE, /* Waiting for reads to fill in holes */ PACKET_WRITE_WAIT_STATE, /* Waiting for the write to complete */ PACKET_RECOVERY_STATE, /* Recover after read/write errors */ PACKET_FINISHED_STATE, /* After write has finished */ PACKET_NUM_STATES /* Number of possible states */ }; /* * Information needed for writing a single packet */ struct pktcdvd_device; struct packet_data { struct list_head list; spinlock_t lock; /* Lock protecting state transitions and */ /* orig_bios list */ struct bio_list orig_bios; /* Original bios passed to pkt_make_request */ /* that will be handled by this packet */ int write_size; /* Total size of all bios in the orig_bios */ /* list, measured in number of frames */ struct bio *w_bio; /* The bio we will send to the real CD */ /* device once we have all data for the */ /* packet we are going to write */ sector_t sector; /* First sector in this packet */ int frames; /* Number of frames in this packet */ enum packet_data_state state; /* Current state */ atomic_t run_sm; /* Incremented whenever the state */ /* machine needs to be run */ long sleep_time; /* Set this to non-zero to make the state */ /* machine run after this many jiffies. */ atomic_t io_wait; /* Number of pending IO operations */ atomic_t io_errors; /* Number of read/write errors during IO */ struct bio *r_bios[PACKET_MAX_SIZE]; /* bios to use during data gathering */ struct page *pages[PACKET_MAX_SIZE / FRAMES_PER_PAGE]; int cache_valid; /* If non-zero, the data for the zone defined */ /* by the sector variable is completely cached */ /* in the pages[] vector. */ int id; /* ID number for debugging */ struct pktcdvd_device *pd; }; struct pkt_rb_node { struct rb_node rb_node; struct bio *bio; }; struct packet_stacked_data { struct bio *bio; /* Original read request bio */ struct pktcdvd_device *pd; }; #define PSD_POOL_SIZE 64 struct pktcdvd_kobj { struct kobject kobj; struct pktcdvd_device *pd; }; #define to_pktcdvdkobj(_k) \ ((struct pktcdvd_kobj*)container_of(_k,struct pktcdvd_kobj,kobj)) struct pktcdvd_device { struct block_device *bdev; /* dev attached */ dev_t pkt_dev; /* our dev */ char name[20]; struct packet_settings settings; struct packet_stats stats; int refcnt; /* Open count */ int write_speed; /* current write speed, kB/s */ int read_speed; /* current read speed, kB/s */ unsigned long offset; /* start offset */ __u8 mode_offset; /* 0 / 8 */ __u8 type; unsigned long flags; __u16 mmc3_profile; __u32 nwa; /* next writable address */ __u32 lra; /* last recorded address */ struct packet_cdrw cdrw; wait_queue_head_t wqueue; spinlock_t lock; /* Serialize access to bio_queue */ struct rb_root bio_queue; /* Work queue of bios we need to handle */ int bio_queue_size; /* Number of nodes in bio_queue */ sector_t current_sector; /* Keep track of where the elevator is */ atomic_t scan_queue; /* Set to non-zero when pkt_handle_queue */ /* needs to be run. */ mempool_t rb_pool; /* mempool for pkt_rb_node allocations */ struct packet_iosched iosched; struct gendisk *disk; int write_congestion_off; int write_congestion_on; struct device *dev; /* sysfs pktcdvd[0-7] dev */ struct pktcdvd_kobj *kobj_stat; /* sysfs pktcdvd[0-7]/stat/ */ struct pktcdvd_kobj *kobj_wqueue; /* sysfs pktcdvd[0-7]/write_queue/ */ struct dentry *dfs_d_root; /* debugfs: devname directory */ struct dentry *dfs_f_info; /* debugfs: info file */ }; #endif /* __PKTCDVD_H */ PK ! �ń� � netfilter_defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_NETFILTER_CORE_H_ #define __LINUX_NETFILTER_CORE_H_ #include <uapi/linux/netfilter.h> /* in/out/forward only */ #define NF_ARP_NUMHOOKS 3 #define NF_MAX_HOOKS NF_INET_NUMHOOKS #endif PK ! Ŧ��0 �0 most.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * most.h - API for component and adapter drivers * * Copyright (C) 2013-2015, Microchip Technology Germany II GmbH & Co. KG */ #ifndef __MOST_CORE_H__ #define __MOST_CORE_H__ #include <linux/types.h> #include <linux/device.h> struct module; struct interface_private; /** * Interface type */ enum most_interface_type { ITYPE_LOOPBACK = 1, ITYPE_I2C, ITYPE_I2S, ITYPE_TSI, ITYPE_HBI, ITYPE_MEDIALB_DIM, ITYPE_MEDIALB_DIM2, ITYPE_USB, ITYPE_PCIE }; /** * Channel direction. */ enum most_channel_direction { MOST_CH_RX = 1 << 0, MOST_CH_TX = 1 << 1, }; /** * Channel data type. */ enum most_channel_data_type { MOST_CH_CONTROL = 1 << 0, MOST_CH_ASYNC = 1 << 1, MOST_CH_ISOC = 1 << 2, MOST_CH_SYNC = 1 << 5, }; enum most_status_flags { /* MBO was processed successfully (data was send or received )*/ MBO_SUCCESS = 0, /* The MBO contains wrong or missing information. */ MBO_E_INVAL, /* MBO was completed as HDM Channel will be closed */ MBO_E_CLOSE, }; /** * struct most_channel_capability - Channel capability * @direction: Supported channel directions. * The value is bitwise OR-combination of the values from the * enumeration most_channel_direction. Zero is allowed value and means * "channel may not be used". * @data_type: Supported channel data types. * The value is bitwise OR-combination of the values from the * enumeration most_channel_data_type. Zero is allowed value and means * "channel may not be used". * @num_buffers_packet: Maximum number of buffers supported by this channel * for packet data types (Async,Control,QoS) * @buffer_size_packet: Maximum buffer size supported by this channel * for packet data types (Async,Control,QoS) * @num_buffers_streaming: Maximum number of buffers supported by this channel * for streaming data types (Sync,AV Packetized) * @buffer_size_streaming: Maximum buffer size supported by this channel * for streaming data types (Sync,AV Packetized) * @name_suffix: Optional suffix providean by an HDM that is attached to the * regular channel name. * * Describes the capabilities of a MOST channel like supported Data Types * and directions. This information is provided by an HDM for the MostCore. * * The Core creates read only sysfs attribute files in * /sys/devices/most/mdev#/<channel>/ with the * following attributes: * -available_directions * -available_datatypes * -number_of_packet_buffers * -number_of_stream_buffers * -size_of_packet_buffer * -size_of_stream_buffer * where content of each file is a string with all supported properties of this * very channel attribute. */ struct most_channel_capability { u16 direction; u16 data_type; u16 num_buffers_packet; u16 buffer_size_packet; u16 num_buffers_streaming; u16 buffer_size_streaming; const char *name_suffix; }; /** * struct most_channel_config - stores channel configuration * @direction: direction of the channel * @data_type: data type travelling over this channel * @num_buffers: number of buffers * @buffer_size: size of a buffer for AIM. * Buffer size may be cutted down by HDM in a configure callback * to match to a given interface and channel type. * @extra_len: additional buffer space for internal HDM purposes like padding. * May be set by HDM in a configure callback if needed. * @subbuffer_size: size of a subbuffer * @packets_per_xact: number of MOST frames that are packet inside one USB * packet. This is USB specific * * Describes the configuration for a MOST channel. This information is * provided from the MostCore to a HDM (like the Medusa PCIe Interface) as a * parameter of the "configure" function call. */ struct most_channel_config { enum most_channel_direction direction; enum most_channel_data_type data_type; u16 num_buffers; u16 buffer_size; u16 extra_len; u16 subbuffer_size; u16 packets_per_xact; u16 dbr_size; }; /* * struct mbo - MOST Buffer Object. * @context: context for core completion handler * @priv: private data for HDM * * public: documented fields that are used for the communications * between MostCore and HDMs * * @list: list head for use by the mbo's current owner * @ifp: (in) associated interface instance * @num_buffers_ptr: amount of pool buffers * @hdm_channel_id: (in) HDM channel instance * @virt_address: (in) kernel virtual address of the buffer * @bus_address: (in) bus address of the buffer * @buffer_length: (in) buffer payload length * @processed_length: (out) processed length * @status: (out) transfer status * @complete: (in) completion routine * * The core allocates and initializes the MBO. * * The HDM receives MBO for transfer from the core with the call to enqueue(). * The HDM copies the data to- or from the buffer depending on configured * channel direction, set "processed_length" and "status" and completes * the transfer procedure by calling the completion routine. * * Finally, the MBO is being deallocated or recycled for further * transfers of the same or a different HDM. * * Directions of usage: * The core driver should never access any MBO fields (even if marked * as "public") while the MBO is owned by an HDM. The ownership starts with * the call of enqueue() and ends with the call of its complete() routine. * * II. * Every HDM attached to the core driver _must_ ensure that it returns any MBO * it owns (due to a previous call to enqueue() by the core driver) before it * de-registers an interface or gets unloaded from the kernel. If this direction * is violated memory leaks will occur, since the core driver does _not_ track * MBOs it is currently not in control of. * */ struct mbo { void *context; void *priv; struct list_head list; struct most_interface *ifp; int *num_buffers_ptr; u16 hdm_channel_id; void *virt_address; dma_addr_t bus_address; u16 buffer_length; u16 processed_length; enum most_status_flags status; void (*complete)(struct mbo *mbo); }; /** * Interface instance description. * * Describes an interface of a MOST device the core driver is bound to. * This structure is allocated and initialized in the HDM. MostCore may not * modify this structure. * * @dev: the actual device * @mod: module * @interface Interface type. \sa most_interface_type. * @description PRELIMINARY. * Unique description of the device instance from point of view of the * interface in free text form (ASCII). * It may be a hexadecimal presentation of the memory address for the MediaLB * IP or USB device ID with USB properties for USB interface, etc. * @num_channels Number of channels and size of the channel_vector. * @channel_vector Properties of the channels. * Array index represents channel ID by the driver. * @configure Callback to change data type for the channel of the * interface instance. May be zero if the instance of the interface is not * configurable. Parameter channel_config describes direction and data * type for the channel, configured by the higher level. The content of * @enqueue Delivers MBO to the HDM for processing. * After HDM completes Rx- or Tx- operation the processed MBO shall * be returned back to the MostCore using completion routine. * The reason to get the MBO delivered from the MostCore after the channel * is poisoned is the re-opening of the channel by the application. * In this case the HDM shall hold MBOs and service the channel as usual. * The HDM must be able to hold at least one MBO for each channel. * The callback returns a negative value on error, otherwise 0. * @poison_channel Informs HDM about closing the channel. The HDM shall * cancel all transfers and synchronously or asynchronously return * all enqueued for this channel MBOs using the completion routine. * The callback returns a negative value on error, otherwise 0. * @request_netinfo: triggers retrieving of network info from the HDM by * means of "Message exchange over MDP/MEP" * The call of the function request_netinfo with the parameter on_netinfo as * NULL prohibits use of the previously obtained function pointer. * @priv Private field used by mostcore to store context information. */ struct most_interface { struct device *dev; struct device *driver_dev; struct module *mod; enum most_interface_type interface; const char *description; unsigned int num_channels; struct most_channel_capability *channel_vector; void *(*dma_alloc)(struct mbo *mbo, u32 size); void (*dma_free)(struct mbo *mbo, u32 size); int (*configure)(struct most_interface *iface, int channel_idx, struct most_channel_config *channel_config); int (*enqueue)(struct most_interface *iface, int channel_idx, struct mbo *mbo); int (*poison_channel)(struct most_interface *iface, int channel_idx); void (*request_netinfo)(struct most_interface *iface, int channel_idx, void (*on_netinfo)(struct most_interface *iface, unsigned char link_stat, unsigned char *mac_addr)); void *priv; struct interface_private *p; }; /** * struct most_component - identifies a loadable component for the mostcore * @list: list_head * @name: component name * @probe_channel: function for core to notify driver about channel connection * @disconnect_channel: callback function to disconnect a certain channel * @rx_completion: completion handler for received packets * @tx_completion: completion handler for transmitted packets */ struct most_component { struct list_head list; const char *name; struct module *mod; int (*probe_channel)(struct most_interface *iface, int channel_idx, struct most_channel_config *cfg, char *name, char *param); int (*disconnect_channel)(struct most_interface *iface, int channel_idx); int (*rx_completion)(struct mbo *mbo); int (*tx_completion)(struct most_interface *iface, int channel_idx); int (*cfg_complete)(void); }; /** * most_register_interface - Registers instance of the interface. * @iface: Pointer to the interface instance description. * * Returns a pointer to the kobject of the generated instance. * * Note: HDM has to ensure that any reference held on the kobj is * released before deregistering the interface. */ int most_register_interface(struct most_interface *iface); /** * Deregisters instance of the interface. * @intf_instance Pointer to the interface instance description. */ void most_deregister_interface(struct most_interface *iface); void most_submit_mbo(struct mbo *mbo); /** * most_stop_enqueue - prevents core from enqueing MBOs * @iface: pointer to interface * @channel_idx: channel index */ void most_stop_enqueue(struct most_interface *iface, int channel_idx); /** * most_resume_enqueue - allow core to enqueue MBOs again * @iface: pointer to interface * @channel_idx: channel index * * This clears the enqueue halt flag and enqueues all MBOs currently * in wait fifo. */ void most_resume_enqueue(struct most_interface *iface, int channel_idx); int most_register_component(struct most_component *comp); int most_deregister_component(struct most_component *comp); struct mbo *most_get_mbo(struct most_interface *iface, int channel_idx, struct most_component *comp); void most_put_mbo(struct mbo *mbo); int channel_has_mbo(struct most_interface *iface, int channel_idx, struct most_component *comp); int most_start_channel(struct most_interface *iface, int channel_idx, struct most_component *comp); int most_stop_channel(struct most_interface *iface, int channel_idx, struct most_component *comp); int __init configfs_init(void); int most_register_configfs_subsys(struct most_component *comp); void most_deregister_configfs_subsys(struct most_component *comp); int most_add_link(char *mdev, char *mdev_ch, char *comp_name, char *link_name, char *comp_param); int most_remove_link(char *mdev, char *mdev_ch, char *comp_name); int most_set_cfg_buffer_size(char *mdev, char *mdev_ch, u16 val); int most_set_cfg_subbuffer_size(char *mdev, char *mdev_ch, u16 val); int most_set_cfg_dbr_size(char *mdev, char *mdev_ch, u16 val); int most_set_cfg_num_buffers(char *mdev, char *mdev_ch, u16 val); int most_set_cfg_datatype(char *mdev, char *mdev_ch, char *buf); int most_set_cfg_direction(char *mdev, char *mdev_ch, char *buf); int most_set_cfg_packets_xact(char *mdev, char *mdev_ch, u16 val); int most_cfg_complete(char *comp_name); void most_interface_register_notify(const char *mdev_name); #endif /* MOST_CORE_H_ */ PK ! c^Zv� � omap-gpmc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * OMAP GPMC (General Purpose Memory Controller) defines */ #include <linux/platform_data/gpmc-omap.h> #define GPMC_CONFIG_WP 0x00000005 /* IRQ numbers in GPMC IRQ domain for legacy boot use */ #define GPMC_IRQ_FIFOEVENTENABLE 0 #define GPMC_IRQ_COUNT_EVENT 1 /** * gpmc_nand_ops - Interface between NAND and GPMC * @nand_write_buffer_empty: get the NAND write buffer empty status. */ struct gpmc_nand_ops { bool (*nand_writebuffer_empty)(void); }; struct gpmc_nand_regs; struct gpmc_onenand_info { bool sync_read; bool sync_write; int burst_len; }; #if IS_ENABLED(CONFIG_OMAP_GPMC) struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, int cs); /** * gpmc_omap_onenand_set_timings - set optimized sync timings. * @cs: Chip Select Region * @freq: Chip frequency * @latency: Burst latency cycle count * @info: Structure describing parameters used * * Sets optimized timings for the @cs region based on @freq and @latency. * Updates the @info structure based on the GPMC settings. */ int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, int latency, struct gpmc_onenand_info *info); #else static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, int cs) { return NULL; } static inline int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, int latency, struct gpmc_onenand_info *info) { return -EINVAL; } #endif /* CONFIG_OMAP_GPMC */ extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t, struct gpmc_settings *gpmc_s, struct gpmc_device_timings *dev_t); struct device_node; extern int gpmc_get_client_irq(unsigned irq_config); extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); extern void gpmc_cs_write_reg(int cs, int idx, u32 val); extern int gpmc_calc_divider(unsigned int sync_clk); extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, const struct gpmc_settings *s); extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p); extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); extern void gpmc_cs_free(int cs); extern int gpmc_configure(int cmd, int wval); extern void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p); struct gpmc_timings; struct omap_nand_platform_data; struct omap_onenand_platform_data; #if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) extern int gpmc_onenand_init(struct omap_onenand_platform_data *d); #else #define board_onenand_data NULL static inline int gpmc_onenand_init(struct omap_onenand_platform_data *d) { return 0; } #endif PK ! �H�ČN �N bio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2001 Jens Axboe <axboe@suse.de> */ #ifndef __LINUX_BIO_H #define __LINUX_BIO_H #include <linux/mempool.h> #include <linux/ioprio.h> /* struct bio, bio_vec and BIO_* flags are defined in blk_types.h */ #include <linux/blk_types.h> #include <linux/uio.h> #define BIO_DEBUG #ifdef BIO_DEBUG #define BIO_BUG_ON BUG_ON #else #define BIO_BUG_ON #endif #define BIO_MAX_VECS 256U static inline unsigned int bio_max_segs(unsigned int nr_segs) { return min(nr_segs, BIO_MAX_VECS); } #define bio_prio(bio) (bio)->bi_ioprio #define bio_set_prio(bio, prio) ((bio)->bi_ioprio = prio) #define bio_iter_iovec(bio, iter) \ bvec_iter_bvec((bio)->bi_io_vec, (iter)) #define bio_iter_page(bio, iter) \ bvec_iter_page((bio)->bi_io_vec, (iter)) #define bio_iter_len(bio, iter) \ bvec_iter_len((bio)->bi_io_vec, (iter)) #define bio_iter_offset(bio, iter) \ bvec_iter_offset((bio)->bi_io_vec, (iter)) #define bio_page(bio) bio_iter_page((bio), (bio)->bi_iter) #define bio_offset(bio) bio_iter_offset((bio), (bio)->bi_iter) #define bio_iovec(bio) bio_iter_iovec((bio), (bio)->bi_iter) #define bvec_iter_sectors(iter) ((iter).bi_size >> 9) #define bvec_iter_end_sector(iter) ((iter).bi_sector + bvec_iter_sectors((iter))) #define bio_sectors(bio) bvec_iter_sectors((bio)->bi_iter) #define bio_end_sector(bio) bvec_iter_end_sector((bio)->bi_iter) /* * Return the data direction, READ or WRITE. */ #define bio_data_dir(bio) \ (op_is_write(bio_op(bio)) ? WRITE : READ) /* * Check whether this bio carries any data or not. A NULL bio is allowed. */ static inline bool bio_has_data(struct bio *bio) { if (bio && bio->bi_iter.bi_size && bio_op(bio) != REQ_OP_DISCARD && bio_op(bio) != REQ_OP_SECURE_ERASE && bio_op(bio) != REQ_OP_WRITE_ZEROES) return true; return false; } static inline bool bio_no_advance_iter(const struct bio *bio) { return bio_op(bio) == REQ_OP_DISCARD || bio_op(bio) == REQ_OP_SECURE_ERASE || bio_op(bio) == REQ_OP_WRITE_SAME || bio_op(bio) == REQ_OP_WRITE_ZEROES; } static inline bool bio_mergeable(struct bio *bio) { if (bio->bi_opf & REQ_NOMERGE_FLAGS) return false; return true; } static inline unsigned int bio_cur_bytes(struct bio *bio) { if (bio_has_data(bio)) return bio_iovec(bio).bv_len; else /* dataless requests such as discard */ return bio->bi_iter.bi_size; } static inline void *bio_data(struct bio *bio) { if (bio_has_data(bio)) return page_address(bio_page(bio)) + bio_offset(bio); return NULL; } /** * bio_full - check if the bio is full * @bio: bio to check * @len: length of one segment to be added * * Return true if @bio is full and one segment with @len bytes can't be * added to the bio, otherwise return false */ static inline bool bio_full(struct bio *bio, unsigned len) { if (bio->bi_vcnt >= bio->bi_max_vecs) return true; if (bio->bi_iter.bi_size > UINT_MAX - len) return true; return false; } static inline bool bio_next_segment(const struct bio *bio, struct bvec_iter_all *iter) { if (iter->idx >= bio->bi_vcnt) return false; bvec_advance(&bio->bi_io_vec[iter->idx], iter); return true; } /* * drivers should _never_ use the all version - the bio may have been split * before it got to the driver and the driver won't own all of it */ #define bio_for_each_segment_all(bvl, bio, iter) \ for (bvl = bvec_init_iter_all(&iter); bio_next_segment((bio), &iter); ) static inline void bio_advance_iter(const struct bio *bio, struct bvec_iter *iter, unsigned int bytes) { iter->bi_sector += bytes >> 9; if (bio_no_advance_iter(bio)) iter->bi_size -= bytes; else bvec_iter_advance(bio->bi_io_vec, iter, bytes); /* TODO: It is reasonable to complete bio with error here. */ } /* @bytes should be less or equal to bvec[i->bi_idx].bv_len */ static inline void bio_advance_iter_single(const struct bio *bio, struct bvec_iter *iter, unsigned int bytes) { iter->bi_sector += bytes >> 9; if (bio_no_advance_iter(bio)) iter->bi_size -= bytes; else bvec_iter_advance_single(bio->bi_io_vec, iter, bytes); } #define __bio_for_each_segment(bvl, bio, iter, start) \ for (iter = (start); \ (iter).bi_size && \ ((bvl = bio_iter_iovec((bio), (iter))), 1); \ bio_advance_iter_single((bio), &(iter), (bvl).bv_len)) #define bio_for_each_segment(bvl, bio, iter) \ __bio_for_each_segment(bvl, bio, iter, (bio)->bi_iter) #define __bio_for_each_bvec(bvl, bio, iter, start) \ for (iter = (start); \ (iter).bi_size && \ ((bvl = mp_bvec_iter_bvec((bio)->bi_io_vec, (iter))), 1); \ bio_advance_iter_single((bio), &(iter), (bvl).bv_len)) /* iterate over multi-page bvec */ #define bio_for_each_bvec(bvl, bio, iter) \ __bio_for_each_bvec(bvl, bio, iter, (bio)->bi_iter) /* * Iterate over all multi-page bvecs. Drivers shouldn't use this version for the * same reasons as bio_for_each_segment_all(). */ #define bio_for_each_bvec_all(bvl, bio, i) \ for (i = 0, bvl = bio_first_bvec_all(bio); \ i < (bio)->bi_vcnt; i++, bvl++) \ #define bio_iter_last(bvec, iter) ((iter).bi_size == (bvec).bv_len) static inline unsigned bio_segments(struct bio *bio) { unsigned segs = 0; struct bio_vec bv; struct bvec_iter iter; /* * We special case discard/write same/write zeroes, because they * interpret bi_size differently: */ switch (bio_op(bio)) { case REQ_OP_DISCARD: case REQ_OP_SECURE_ERASE: case REQ_OP_WRITE_ZEROES: return 0; case REQ_OP_WRITE_SAME: return 1; default: break; } bio_for_each_segment(bv, bio, iter) segs++; return segs; } /* * get a reference to a bio, so it won't disappear. the intended use is * something like: * * bio_get(bio); * submit_bio(rw, bio); * if (bio->bi_flags ...) * do_something * bio_put(bio); * * without the bio_get(), it could potentially complete I/O before submit_bio * returns. and then bio would be freed memory when if (bio->bi_flags ...) * runs */ static inline void bio_get(struct bio *bio) { bio->bi_flags |= (1 << BIO_REFFED); smp_mb__before_atomic(); atomic_inc(&bio->__bi_cnt); } static inline void bio_cnt_set(struct bio *bio, unsigned int count) { if (count != 1) { bio->bi_flags |= (1 << BIO_REFFED); smp_mb(); } atomic_set(&bio->__bi_cnt, count); } static inline bool bio_flagged(struct bio *bio, unsigned int bit) { return (bio->bi_flags & (1U << bit)) != 0; } static inline void bio_set_flag(struct bio *bio, unsigned int bit) { bio->bi_flags |= (1U << bit); } static inline void bio_clear_flag(struct bio *bio, unsigned int bit) { bio->bi_flags &= ~(1U << bit); } static inline void bio_get_first_bvec(struct bio *bio, struct bio_vec *bv) { *bv = mp_bvec_iter_bvec(bio->bi_io_vec, bio->bi_iter); } static inline void bio_get_last_bvec(struct bio *bio, struct bio_vec *bv) { struct bvec_iter iter = bio->bi_iter; int idx; bio_get_first_bvec(bio, bv); if (bv->bv_len == bio->bi_iter.bi_size) return; /* this bio only has a single bvec */ bio_advance_iter(bio, &iter, iter.bi_size); if (!iter.bi_bvec_done) idx = iter.bi_idx - 1; else /* in the middle of bvec */ idx = iter.bi_idx; *bv = bio->bi_io_vec[idx]; /* * iter.bi_bvec_done records actual length of the last bvec * if this bio ends in the middle of one io vector */ if (iter.bi_bvec_done) bv->bv_len = iter.bi_bvec_done; } static inline struct bio_vec *bio_first_bvec_all(struct bio *bio) { WARN_ON_ONCE(bio_flagged(bio, BIO_CLONED)); return bio->bi_io_vec; } static inline struct page *bio_first_page_all(struct bio *bio) { return bio_first_bvec_all(bio)->bv_page; } static inline struct bio_vec *bio_last_bvec_all(struct bio *bio) { WARN_ON_ONCE(bio_flagged(bio, BIO_CLONED)); return &bio->bi_io_vec[bio->bi_vcnt - 1]; } enum bip_flags { BIP_BLOCK_INTEGRITY = 1 << 0, /* block layer owns integrity data */ BIP_MAPPED_INTEGRITY = 1 << 1, /* ref tag has been remapped */ BIP_CTRL_NOCHECK = 1 << 2, /* disable HBA integrity checking */ BIP_DISK_NOCHECK = 1 << 3, /* disable disk integrity checking */ BIP_IP_CHECKSUM = 1 << 4, /* IP checksum */ }; /* * bio integrity payload */ struct bio_integrity_payload { struct bio *bip_bio; /* parent bio */ struct bvec_iter bip_iter; unsigned short bip_vcnt; /* # of integrity bio_vecs */ unsigned short bip_max_vcnt; /* integrity bio_vec slots */ unsigned short bip_flags; /* control flags */ struct bvec_iter bio_iter; /* for rewinding parent bio */ struct work_struct bip_work; /* I/O completion */ struct bio_vec *bip_vec; struct bio_vec bip_inline_vecs[];/* embedded bvec array */ }; #if defined(CONFIG_BLK_DEV_INTEGRITY) static inline struct bio_integrity_payload *bio_integrity(struct bio *bio) { if (bio->bi_opf & REQ_INTEGRITY) return bio->bi_integrity; return NULL; } static inline bool bio_integrity_flagged(struct bio *bio, enum bip_flags flag) { struct bio_integrity_payload *bip = bio_integrity(bio); if (bip) return bip->bip_flags & flag; return false; } static inline sector_t bip_get_seed(struct bio_integrity_payload *bip) { return bip->bip_iter.bi_sector; } static inline void bip_set_seed(struct bio_integrity_payload *bip, sector_t seed) { bip->bip_iter.bi_sector = seed; } #endif /* CONFIG_BLK_DEV_INTEGRITY */ void bio_trim(struct bio *bio, sector_t offset, sector_t size); extern struct bio *bio_split(struct bio *bio, int sectors, gfp_t gfp, struct bio_set *bs); /** * bio_next_split - get next @sectors from a bio, splitting if necessary * @bio: bio to split * @sectors: number of sectors to split from the front of @bio * @gfp: gfp mask * @bs: bio set to allocate from * * Returns a bio representing the next @sectors of @bio - if the bio is smaller * than @sectors, returns the original bio unchanged. */ static inline struct bio *bio_next_split(struct bio *bio, int sectors, gfp_t gfp, struct bio_set *bs) { if (sectors >= bio_sectors(bio)) return bio; return bio_split(bio, sectors, gfp, bs); } enum { BIOSET_NEED_BVECS = BIT(0), BIOSET_NEED_RESCUER = BIT(1), BIOSET_PERCPU_CACHE = BIT(2), }; extern int bioset_init(struct bio_set *, unsigned int, unsigned int, int flags); extern void bioset_exit(struct bio_set *); extern int biovec_init_pool(mempool_t *pool, int pool_entries); extern int bioset_init_from_src(struct bio_set *bs, struct bio_set *src); struct bio *bio_alloc_bioset(gfp_t gfp, unsigned short nr_iovecs, struct bio_set *bs); struct bio *bio_alloc_kiocb(struct kiocb *kiocb, unsigned short nr_vecs, struct bio_set *bs); struct bio *bio_kmalloc(gfp_t gfp_mask, unsigned short nr_iovecs); extern void bio_put(struct bio *); extern void __bio_clone_fast(struct bio *, struct bio *); extern struct bio *bio_clone_fast(struct bio *, gfp_t, struct bio_set *); extern struct bio_set fs_bio_set; static inline struct bio *bio_alloc(gfp_t gfp_mask, unsigned short nr_iovecs) { return bio_alloc_bioset(gfp_mask, nr_iovecs, &fs_bio_set); } extern blk_qc_t submit_bio(struct bio *); extern void bio_endio(struct bio *); static inline void bio_io_error(struct bio *bio) { bio->bi_status = BLK_STS_IOERR; bio_endio(bio); } static inline void bio_wouldblock_error(struct bio *bio) { bio_set_flag(bio, BIO_QUIET); bio->bi_status = BLK_STS_AGAIN; bio_endio(bio); } /* * Calculate number of bvec segments that should be allocated to fit data * pointed by @iter. If @iter is backed by bvec it's going to be reused * instead of allocating a new one. */ static inline int bio_iov_vecs_to_alloc(struct iov_iter *iter, int max_segs) { if (iov_iter_is_bvec(iter)) return 0; return iov_iter_npages(iter, max_segs); } struct request_queue; extern int submit_bio_wait(struct bio *bio); extern void bio_advance(struct bio *, unsigned); extern void bio_init(struct bio *bio, struct bio_vec *table, unsigned short max_vecs); extern void bio_uninit(struct bio *); extern void bio_reset(struct bio *); void bio_chain(struct bio *, struct bio *); extern int bio_add_page(struct bio *, struct page *, unsigned int,unsigned int); extern int bio_add_pc_page(struct request_queue *, struct bio *, struct page *, unsigned int, unsigned int); int bio_add_zone_append_page(struct bio *bio, struct page *page, unsigned int len, unsigned int offset); bool __bio_try_merge_page(struct bio *bio, struct page *page, unsigned int len, unsigned int off, bool *same_page); void __bio_add_page(struct bio *bio, struct page *page, unsigned int len, unsigned int off); int bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter); void bio_release_pages(struct bio *bio, bool mark_dirty); extern void bio_set_pages_dirty(struct bio *bio); extern void bio_check_pages_dirty(struct bio *bio); extern void bio_copy_data_iter(struct bio *dst, struct bvec_iter *dst_iter, struct bio *src, struct bvec_iter *src_iter); extern void bio_copy_data(struct bio *dst, struct bio *src); extern void bio_free_pages(struct bio *bio); void bio_truncate(struct bio *bio, unsigned new_size); void guard_bio_eod(struct bio *bio); void zero_fill_bio(struct bio *bio); extern const char *bio_devname(struct bio *bio, char *buffer); #define bio_set_dev(bio, bdev) \ do { \ bio_clear_flag(bio, BIO_REMAPPED); \ if ((bio)->bi_bdev != (bdev)) \ bio_clear_flag(bio, BIO_THROTTLED); \ (bio)->bi_bdev = (bdev); \ bio_associate_blkg(bio); \ } while (0) #define bio_copy_dev(dst, src) \ do { \ bio_clear_flag(dst, BIO_REMAPPED); \ (dst)->bi_bdev = (src)->bi_bdev; \ bio_clone_blkg_association(dst, src); \ } while (0) #define bio_dev(bio) \ disk_devt((bio)->bi_bdev->bd_disk) #ifdef CONFIG_BLK_CGROUP void bio_associate_blkg(struct bio *bio); void bio_associate_blkg_from_css(struct bio *bio, struct cgroup_subsys_state *css); void bio_clone_blkg_association(struct bio *dst, struct bio *src); #else /* CONFIG_BLK_CGROUP */ static inline void bio_associate_blkg(struct bio *bio) { } static inline void bio_associate_blkg_from_css(struct bio *bio, struct cgroup_subsys_state *css) { } static inline void bio_clone_blkg_association(struct bio *dst, struct bio *src) { } #endif /* CONFIG_BLK_CGROUP */ /* * BIO list management for use by remapping drivers (e.g. DM or MD) and loop. * * A bio_list anchors a singly-linked list of bios chained through the bi_next * member of the bio. The bio_list also caches the last list member to allow * fast access to the tail. */ struct bio_list { struct bio *head; struct bio *tail; }; static inline int bio_list_empty(const struct bio_list *bl) { return bl->head == NULL; } static inline void bio_list_init(struct bio_list *bl) { bl->head = bl->tail = NULL; } #define BIO_EMPTY_LIST { NULL, NULL } #define bio_list_for_each(bio, bl) \ for (bio = (bl)->head; bio; bio = bio->bi_next) static inline unsigned bio_list_size(const struct bio_list *bl) { unsigned sz = 0; struct bio *bio; bio_list_for_each(bio, bl) sz++; return sz; } static inline void bio_list_add(struct bio_list *bl, struct bio *bio) { bio->bi_next = NULL; if (bl->tail) bl->tail->bi_next = bio; else bl->head = bio; bl->tail = bio; } static inline void bio_list_add_head(struct bio_list *bl, struct bio *bio) { bio->bi_next = bl->head; bl->head = bio; if (!bl->tail) bl->tail = bio; } static inline void bio_list_merge(struct bio_list *bl, struct bio_list *bl2) { if (!bl2->head) return; if (bl->tail) bl->tail->bi_next = bl2->head; else bl->head = bl2->head; bl->tail = bl2->tail; } static inline void bio_list_merge_head(struct bio_list *bl, struct bio_list *bl2) { if (!bl2->head) return; if (bl->head) bl2->tail->bi_next = bl->head; else bl->tail = bl2->tail; bl->head = bl2->head; } static inline struct bio *bio_list_peek(struct bio_list *bl) { return bl->head; } static inline struct bio *bio_list_pop(struct bio_list *bl) { struct bio *bio = bl->head; if (bio) { bl->head = bl->head->bi_next; if (!bl->head) bl->tail = NULL; bio->bi_next = NULL; } return bio; } static inline struct bio *bio_list_get(struct bio_list *bl) { struct bio *bio = bl->head; bl->head = bl->tail = NULL; return bio; } /* * Increment chain count for the bio. Make sure the CHAIN flag update * is visible before the raised count. */ static inline void bio_inc_remaining(struct bio *bio) { bio_set_flag(bio, BIO_CHAIN); smp_mb__before_atomic(); atomic_inc(&bio->__bi_remaining); } /* * bio_set is used to allow other portions of the IO system to * allocate their own private memory pools for bio and iovec structures. * These memory pools in turn all allocate from the bio_slab * and the bvec_slabs[]. */ #define BIO_POOL_SIZE 2 struct bio_set { struct kmem_cache *bio_slab; unsigned int front_pad; /* * per-cpu bio alloc cache */ struct bio_alloc_cache __percpu *cache; mempool_t bio_pool; mempool_t bvec_pool; #if defined(CONFIG_BLK_DEV_INTEGRITY) mempool_t bio_integrity_pool; mempool_t bvec_integrity_pool; #endif unsigned int back_pad; /* * Deadlock avoidance for stacking block drivers: see comments in * bio_alloc_bioset() for details */ spinlock_t rescue_lock; struct bio_list rescue_list; struct work_struct rescue_work; struct workqueue_struct *rescue_workqueue; /* * Hot un-plug notifier for the per-cpu cache, if used */ struct hlist_node cpuhp_dead; }; static inline bool bioset_initialized(struct bio_set *bs) { return bs->bio_slab != NULL; } #if defined(CONFIG_BLK_DEV_INTEGRITY) #define bip_for_each_vec(bvl, bip, iter) \ for_each_bvec(bvl, (bip)->bip_vec, iter, (bip)->bip_iter) #define bio_for_each_integrity_vec(_bvl, _bio, _iter) \ for_each_bio(_bio) \ bip_for_each_vec(_bvl, _bio->bi_integrity, _iter) extern struct bio_integrity_payload *bio_integrity_alloc(struct bio *, gfp_t, unsigned int); extern int bio_integrity_add_page(struct bio *, struct page *, unsigned int, unsigned int); extern bool bio_integrity_prep(struct bio *); extern void bio_integrity_advance(struct bio *, unsigned int); extern void bio_integrity_trim(struct bio *); extern int bio_integrity_clone(struct bio *, struct bio *, gfp_t); extern int bioset_integrity_create(struct bio_set *, int); extern void bioset_integrity_free(struct bio_set *); extern void bio_integrity_init(void); #else /* CONFIG_BLK_DEV_INTEGRITY */ static inline void *bio_integrity(struct bio *bio) { return NULL; } static inline int bioset_integrity_create(struct bio_set *bs, int pool_size) { return 0; } static inline void bioset_integrity_free (struct bio_set *bs) { return; } static inline bool bio_integrity_prep(struct bio *bio) { return true; } static inline int bio_integrity_clone(struct bio *bio, struct bio *bio_src, gfp_t gfp_mask) { return 0; } static inline void bio_integrity_advance(struct bio *bio, unsigned int bytes_done) { return; } static inline void bio_integrity_trim(struct bio *bio) { return; } static inline void bio_integrity_init(void) { return; } static inline bool bio_integrity_flagged(struct bio *bio, enum bip_flags flag) { return false; } static inline void *bio_integrity_alloc(struct bio * bio, gfp_t gfp, unsigned int nr) { return ERR_PTR(-EINVAL); } static inline int bio_integrity_add_page(struct bio *bio, struct page *page, unsigned int len, unsigned int offset) { return 0; } #endif /* CONFIG_BLK_DEV_INTEGRITY */ /* * Mark a bio as polled. Note that for async polled IO, the caller must * expect -EWOULDBLOCK if we cannot allocate a request (or other resources). * We cannot block waiting for requests on polled IO, as those completions * must be found by the caller. This is different than IRQ driven IO, where * it's safe to wait for IO to complete. */ static inline void bio_set_polled(struct bio *bio, struct kiocb *kiocb) { bio->bi_opf |= REQ_HIPRI; if (!is_sync_kiocb(kiocb)) bio->bi_opf |= REQ_NOWAIT; } struct bio *blk_next_bio(struct bio *bio, unsigned int nr_pages, gfp_t gfp); #endif /* __LINUX_BIO_H */ PK ! `U/� wkup_m3_ipc.hnu �[��� /* * TI Wakeup M3 for AMx3 SoCs Power Management Routines * * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _LINUX_WKUP_M3_IPC_H #define _LINUX_WKUP_M3_IPC_H #define WKUP_M3_DEEPSLEEP 1 #define WKUP_M3_STANDBY 2 #define WKUP_M3_IDLE 3 #include <linux/mailbox_client.h> struct wkup_m3_ipc_ops; struct wkup_m3_ipc { struct rproc *rproc; void __iomem *ipc_mem_base; struct device *dev; int mem_type; unsigned long resume_addr; int state; struct completion sync_complete; struct mbox_client mbox_client; struct mbox_chan *mbox; struct wkup_m3_ipc_ops *ops; int is_rtc_only; }; struct wkup_m3_wakeup_src { int irq_nr; char src[10]; }; struct wkup_m3_ipc_ops { void (*set_mem_type)(struct wkup_m3_ipc *m3_ipc, int mem_type); void (*set_resume_address)(struct wkup_m3_ipc *m3_ipc, void *addr); int (*prepare_low_power)(struct wkup_m3_ipc *m3_ipc, int state); int (*finish_low_power)(struct wkup_m3_ipc *m3_ipc); int (*request_pm_status)(struct wkup_m3_ipc *m3_ipc); const char *(*request_wake_src)(struct wkup_m3_ipc *m3_ipc); void (*set_rtc_only)(struct wkup_m3_ipc *m3_ipc); }; struct wkup_m3_ipc *wkup_m3_ipc_get(void); void wkup_m3_ipc_put(struct wkup_m3_ipc *m3_ipc); void wkup_m3_set_rtc_only_mode(void); #endif /* _LINUX_WKUP_M3_IPC_H */ PK ! #�휷 � fault-inject.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_FAULT_INJECT_H #define _LINUX_FAULT_INJECT_H #ifdef CONFIG_FAULT_INJECTION #include <linux/types.h> #include <linux/debugfs.h> #include <linux/ratelimit.h> #include <linux/atomic.h> /* * For explanation of the elements of this struct, see * Documentation/fault-injection/fault-injection.rst */ struct fault_attr { unsigned long probability; unsigned long interval; atomic_t times; atomic_t space; unsigned long verbose; bool task_filter; unsigned long stacktrace_depth; unsigned long require_start; unsigned long require_end; unsigned long reject_start; unsigned long reject_end; unsigned long count; struct ratelimit_state ratelimit_state; struct dentry *dname; }; #define FAULT_ATTR_INITIALIZER { \ .interval = 1, \ .times = ATOMIC_INIT(1), \ .require_end = ULONG_MAX, \ .stacktrace_depth = 32, \ .ratelimit_state = RATELIMIT_STATE_INIT_DISABLED, \ .verbose = 2, \ .dname = NULL, \ } #define DECLARE_FAULT_ATTR(name) struct fault_attr name = FAULT_ATTR_INITIALIZER int setup_fault_attr(struct fault_attr *attr, char *str); bool should_fail(struct fault_attr *attr, ssize_t size); #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS struct dentry *fault_create_debugfs_attr(const char *name, struct dentry *parent, struct fault_attr *attr); #else /* CONFIG_FAULT_INJECTION_DEBUG_FS */ static inline struct dentry *fault_create_debugfs_attr(const char *name, struct dentry *parent, struct fault_attr *attr) { return ERR_PTR(-ENODEV); } #endif /* CONFIG_FAULT_INJECTION_DEBUG_FS */ #endif /* CONFIG_FAULT_INJECTION */ struct kmem_cache; int should_failslab(struct kmem_cache *s, gfp_t gfpflags); #ifdef CONFIG_FAILSLAB extern bool __should_failslab(struct kmem_cache *s, gfp_t gfpflags); #else static inline bool __should_failslab(struct kmem_cache *s, gfp_t gfpflags) { return false; } #endif /* CONFIG_FAILSLAB */ #endif /* _LINUX_FAULT_INJECT_H */ PK ! ޝ�� � mount.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * * Definitions for mount interface. This describes the in the kernel build * linkedlist with mounted filesystems. * * Author: Marco van Wieringen <mvw@planets.elm.net> * */ #ifndef _LINUX_MOUNT_H #define _LINUX_MOUNT_H #include <linux/types.h> #include <linux/list.h> #include <linux/nodemask.h> #include <linux/spinlock.h> #include <linux/seqlock.h> #include <linux/atomic.h> struct super_block; struct vfsmount; struct dentry; struct mnt_namespace; struct fs_context; #define MNT_NOSUID 0x01 #define MNT_NODEV 0x02 #define MNT_NOEXEC 0x04 #define MNT_NOATIME 0x08 #define MNT_NODIRATIME 0x10 #define MNT_RELATIME 0x20 #define MNT_READONLY 0x40 /* does the user want this to be r/o? */ #define MNT_NOSYMFOLLOW 0x80 #define MNT_SHRINKABLE 0x100 #define MNT_WRITE_HOLD 0x200 #define MNT_SHARED 0x1000 /* if the vfsmount is a shared mount */ #define MNT_UNBINDABLE 0x2000 /* if the vfsmount is a unbindable mount */ /* * MNT_SHARED_MASK is the set of flags that should be cleared when a * mount becomes shared. Currently, this is only the flag that says a * mount cannot be bind mounted, since this is how we create a mount * that shares events with another mount. If you add a new MNT_* * flag, consider how it interacts with shared mounts. */ #define MNT_SHARED_MASK (MNT_UNBINDABLE) #define MNT_USER_SETTABLE_MASK (MNT_NOSUID | MNT_NODEV | MNT_NOEXEC \ | MNT_NOATIME | MNT_NODIRATIME | MNT_RELATIME \ | MNT_READONLY | MNT_NOSYMFOLLOW) #define MNT_ATIME_MASK (MNT_NOATIME | MNT_NODIRATIME | MNT_RELATIME ) #define MNT_INTERNAL_FLAGS (MNT_SHARED | MNT_WRITE_HOLD | MNT_INTERNAL | \ MNT_DOOMED | MNT_SYNC_UMOUNT | MNT_MARKED | \ MNT_CURSOR) #define MNT_INTERNAL 0x4000 #define MNT_LOCK_ATIME 0x040000 #define MNT_LOCK_NOEXEC 0x080000 #define MNT_LOCK_NOSUID 0x100000 #define MNT_LOCK_NODEV 0x200000 #define MNT_LOCK_READONLY 0x400000 #define MNT_LOCKED 0x800000 #define MNT_DOOMED 0x1000000 #define MNT_SYNC_UMOUNT 0x2000000 #define MNT_MARKED 0x4000000 #define MNT_UMOUNT 0x8000000 #define MNT_CURSOR 0x10000000 struct vfsmount { struct dentry *mnt_root; /* root of the mounted tree */ struct super_block *mnt_sb; /* pointer to superblock */ int mnt_flags; struct user_namespace *mnt_userns; } __randomize_layout; static inline struct user_namespace *mnt_user_ns(const struct vfsmount *mnt) { /* Pairs with smp_store_release() in do_idmap_mount(). */ return smp_load_acquire(&mnt->mnt_userns); } struct file; /* forward dec */ struct path; extern int mnt_want_write(struct vfsmount *mnt); extern int mnt_want_write_file(struct file *file); extern void mnt_drop_write(struct vfsmount *mnt); extern void mnt_drop_write_file(struct file *file); extern void mntput(struct vfsmount *mnt); extern struct vfsmount *mntget(struct vfsmount *mnt); extern struct vfsmount *mnt_clone_internal(const struct path *path); extern bool __mnt_is_readonly(struct vfsmount *mnt); extern bool mnt_may_suid(struct vfsmount *mnt); struct path; extern struct vfsmount *clone_private_mount(const struct path *path); extern int __mnt_want_write(struct vfsmount *); extern void __mnt_drop_write(struct vfsmount *); struct file_system_type; extern struct vfsmount *fc_mount(struct fs_context *fc); extern struct vfsmount *vfs_create_mount(struct fs_context *fc); extern struct vfsmount *vfs_kern_mount(struct file_system_type *type, int flags, const char *name, void *data); extern struct vfsmount *vfs_submount(const struct dentry *mountpoint, struct file_system_type *type, const char *name, void *data); extern void mnt_set_expiry(struct vfsmount *mnt, struct list_head *expiry_list); extern void mark_mounts_for_expiry(struct list_head *mounts); extern dev_t name_to_dev_t(const char *name); extern unsigned int sysctl_mount_max; extern bool path_is_mountpoint(const struct path *path); extern void kern_unmount_array(struct vfsmount *mnt[], unsigned int num); #endif /* _LINUX_MOUNT_H */ PK ! �Ķ9S# S# alcor_pci.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de> * * Driver for Alcor Micro AU6601 and AU6621 controllers */ #ifndef __ALCOR_PCI_H #define __ALCOR_PCI_H #define ALCOR_SD_CARD 0 #define ALCOR_MS_CARD 1 #define DRV_NAME_ALCOR_PCI_SDMMC "alcor_sdmmc" #define DRV_NAME_ALCOR_PCI_MS "alcor_ms" #define PCI_ID_ALCOR_MICRO 0x1AEA #define PCI_ID_AU6601 0x6601 #define PCI_ID_AU6621 0x6621 #define PCI_ID_AU6625 0x6625 #define MHZ_TO_HZ(freq) ((freq) * 1000 * 1000) #define AU6601_BASE_CLOCK 31000000 #define AU6601_MIN_CLOCK 150000 #define AU6601_MAX_CLOCK 208000000 #define AU6601_MAX_DMA_SEGMENTS 64 #define AU6601_MAX_PIO_SEGMENTS 1 #define AU6601_MAX_DMA_BLOCK_SIZE 0x1000 #define AU6601_MAX_PIO_BLOCK_SIZE 0x200 #define AU6601_MAX_DMA_BLOCKS 1 #define AU6601_DMA_LOCAL_SEGMENTS 1 /* registers spotter by reverse engineering but still * with unknown functionality: * 0x10 - ADMA phy address. AU6621 only? * 0x51 - LED ctrl? * 0x52 - unknown * 0x61 - LED related? Always toggled BIT0 * 0x63 - Same as 0x61? * 0x77 - unknown */ /* SDMA phy address. Higher then 0x0800.0000? * The au6601 and au6621 have different DMA engines with different issues. One * For example au6621 engine is triggered by addr change. No other interaction * is needed. This means, if we get two buffers with same address, then engine * will stall. */ #define AU6601_REG_SDMA_ADDR 0x00 #define AU6601_SDMA_MASK 0xffffffff #define AU6601_DMA_BOUNDARY 0x05 #define AU6621_DMA_PAGE_CNT 0x05 /* PIO */ #define AU6601_REG_BUFFER 0x08 /* ADMA ctrl? AU6621 only. */ #define AU6621_DMA_CTRL 0x0c #define AU6621_DMA_ENABLE BIT(0) /* CMD index */ #define AU6601_REG_CMD_OPCODE 0x23 /* CMD parametr */ #define AU6601_REG_CMD_ARG 0x24 /* CMD response 4x4 Bytes */ #define AU6601_REG_CMD_RSP0 0x30 #define AU6601_REG_CMD_RSP1 0x34 #define AU6601_REG_CMD_RSP2 0x38 #define AU6601_REG_CMD_RSP3 0x3C /* default timeout set to 125: 125 * 40ms = 5 sec * how exactly it is calculated? */ #define AU6601_TIME_OUT_CTRL 0x69 /* Block size for SDMA or PIO */ #define AU6601_REG_BLOCK_SIZE 0x6c /* Some power related reg, used together with AU6601_OUTPUT_ENABLE */ #define AU6601_POWER_CONTROL 0x70 /* PLL ctrl */ #define AU6601_CLK_SELECT 0x72 #define AU6601_CLK_OVER_CLK 0x80 #define AU6601_CLK_384_MHZ 0x30 #define AU6601_CLK_125_MHZ 0x20 #define AU6601_CLK_48_MHZ 0x10 #define AU6601_CLK_EXT_PLL 0x04 #define AU6601_CLK_X2_MODE 0x02 #define AU6601_CLK_ENABLE 0x01 #define AU6601_CLK_31_25_MHZ 0x00 #define AU6601_CLK_DIVIDER 0x73 #define AU6601_INTERFACE_MODE_CTRL 0x74 #define AU6601_DLINK_MODE 0x80 #define AU6601_INTERRUPT_DELAY_TIME 0x40 #define AU6601_SIGNAL_REQ_CTRL 0x30 #define AU6601_MS_CARD_WP BIT(3) #define AU6601_SD_CARD_WP BIT(0) /* same register values are used for: * - AU6601_OUTPUT_ENABLE * - AU6601_POWER_CONTROL */ #define AU6601_ACTIVE_CTRL 0x75 #define AU6601_XD_CARD BIT(4) /* AU6601_MS_CARD_ACTIVE - will cativate MS card section? */ #define AU6601_MS_CARD BIT(3) #define AU6601_SD_CARD BIT(0) /* card slot state. It should automatically detect type of * the card */ #define AU6601_DETECT_STATUS 0x76 #define AU6601_DETECT_EN BIT(7) #define AU6601_MS_DETECTED BIT(3) #define AU6601_SD_DETECTED BIT(0) #define AU6601_DETECT_STATUS_M 0xf #define AU6601_REG_SW_RESET 0x79 #define AU6601_BUF_CTRL_RESET BIT(7) #define AU6601_RESET_DATA BIT(3) #define AU6601_RESET_CMD BIT(0) #define AU6601_OUTPUT_ENABLE 0x7a #define AU6601_PAD_DRIVE0 0x7b #define AU6601_PAD_DRIVE1 0x7c #define AU6601_PAD_DRIVE2 0x7d /* read EEPROM? */ #define AU6601_FUNCTION 0x7f #define AU6601_CMD_XFER_CTRL 0x81 #define AU6601_CMD_17_BYTE_CRC 0xc0 #define AU6601_CMD_6_BYTE_WO_CRC 0x80 #define AU6601_CMD_6_BYTE_CRC 0x40 #define AU6601_CMD_START_XFER 0x20 #define AU6601_CMD_STOP_WAIT_RDY 0x10 #define AU6601_CMD_NO_RESP 0x00 #define AU6601_REG_BUS_CTRL 0x82 #define AU6601_BUS_WIDTH_4BIT 0x20 #define AU6601_BUS_WIDTH_8BIT 0x10 #define AU6601_BUS_WIDTH_1BIT 0x00 #define AU6601_DATA_XFER_CTRL 0x83 #define AU6601_DATA_WRITE BIT(7) #define AU6601_DATA_DMA_MODE BIT(6) #define AU6601_DATA_START_XFER BIT(0) #define AU6601_DATA_PIN_STATE 0x84 #define AU6601_BUS_STAT_CMD BIT(15) /* BIT(4) - BIT(7) are permanently 1. * May be reserved or not attached DAT4-DAT7 */ #define AU6601_BUS_STAT_DAT3 BIT(3) #define AU6601_BUS_STAT_DAT2 BIT(2) #define AU6601_BUS_STAT_DAT1 BIT(1) #define AU6601_BUS_STAT_DAT0 BIT(0) #define AU6601_BUS_STAT_DAT_MASK 0xf #define AU6601_OPT 0x85 #define AU6601_OPT_CMD_LINE_LEVEL 0x80 #define AU6601_OPT_NCRC_16_CLK BIT(4) #define AU6601_OPT_CMD_NWT BIT(3) #define AU6601_OPT_STOP_CLK BIT(2) #define AU6601_OPT_DDR_MODE BIT(1) #define AU6601_OPT_SD_18V BIT(0) #define AU6601_CLK_DELAY 0x86 #define AU6601_CLK_DATA_POSITIVE_EDGE 0x80 #define AU6601_CLK_CMD_POSITIVE_EDGE 0x40 #define AU6601_CLK_POSITIVE_EDGE_ALL (AU6601_CLK_CMD_POSITIVE_EDGE \ | AU6601_CLK_DATA_POSITIVE_EDGE) #define AU6601_REG_INT_STATUS 0x90 #define AU6601_REG_INT_ENABLE 0x94 #define AU6601_INT_DATA_END_BIT_ERR BIT(22) #define AU6601_INT_DATA_CRC_ERR BIT(21) #define AU6601_INT_DATA_TIMEOUT_ERR BIT(20) #define AU6601_INT_CMD_INDEX_ERR BIT(19) #define AU6601_INT_CMD_END_BIT_ERR BIT(18) #define AU6601_INT_CMD_CRC_ERR BIT(17) #define AU6601_INT_CMD_TIMEOUT_ERR BIT(16) #define AU6601_INT_ERROR BIT(15) #define AU6601_INT_OVER_CURRENT_ERR BIT(8) #define AU6601_INT_CARD_INSERT BIT(7) #define AU6601_INT_CARD_REMOVE BIT(6) #define AU6601_INT_READ_BUF_RDY BIT(5) #define AU6601_INT_WRITE_BUF_RDY BIT(4) #define AU6601_INT_DMA_END BIT(3) #define AU6601_INT_DATA_END BIT(1) #define AU6601_INT_CMD_END BIT(0) #define AU6601_INT_NORMAL_MASK 0x00007FFF #define AU6601_INT_ERROR_MASK 0xFFFF8000 #define AU6601_INT_CMD_MASK (AU6601_INT_CMD_END | \ AU6601_INT_CMD_TIMEOUT_ERR | AU6601_INT_CMD_CRC_ERR | \ AU6601_INT_CMD_END_BIT_ERR | AU6601_INT_CMD_INDEX_ERR) #define AU6601_INT_DATA_MASK (AU6601_INT_DATA_END | AU6601_INT_DMA_END | \ AU6601_INT_READ_BUF_RDY | AU6601_INT_WRITE_BUF_RDY | \ AU6601_INT_DATA_TIMEOUT_ERR | AU6601_INT_DATA_CRC_ERR | \ AU6601_INT_DATA_END_BIT_ERR) #define AU6601_INT_ALL_MASK ((u32)-1) /* MS_CARD mode registers */ #define AU6601_MS_STATUS 0xa0 #define AU6601_MS_BUS_MODE_CTRL 0xa1 #define AU6601_MS_BUS_8BIT_MODE 0x03 #define AU6601_MS_BUS_4BIT_MODE 0x01 #define AU6601_MS_BUS_1BIT_MODE 0x00 #define AU6601_MS_TPC_CMD 0xa2 #define AU6601_MS_TPC_READ_PAGE_DATA 0x02 #define AU6601_MS_TPC_READ_REG 0x04 #define AU6601_MS_TPC_GET_INT 0x07 #define AU6601_MS_TPC_WRITE_PAGE_DATA 0x0D #define AU6601_MS_TPC_WRITE_REG 0x0B #define AU6601_MS_TPC_SET_RW_REG_ADRS 0x08 #define AU6601_MS_TPC_SET_CMD 0x0E #define AU6601_MS_TPC_EX_SET_CMD 0x09 #define AU6601_MS_TPC_READ_SHORT_DATA 0x03 #define AU6601_MS_TPC_WRITE_SHORT_DATA 0x0C #define AU6601_MS_TRANSFER_MODE 0xa3 #define AU6601_MS_XFER_INT_TIMEOUT_CHK BIT(2) #define AU6601_MS_XFER_DMA_ENABLE BIT(1) #define AU6601_MS_XFER_START BIT(0) #define AU6601_MS_DATA_PIN_STATE 0xa4 #define AU6601_MS_INT_STATUS 0xb0 #define AU6601_MS_INT_ENABLE 0xb4 #define AU6601_MS_INT_OVER_CURRENT_ERROR BIT(23) #define AU6601_MS_INT_DATA_CRC_ERROR BIT(21) #define AU6601_MS_INT_INT_TIMEOUT BIT(20) #define AU6601_MS_INT_INT_RESP_ERROR BIT(19) #define AU6601_MS_INT_CED_ERROR BIT(18) #define AU6601_MS_INT_TPC_TIMEOUT BIT(16) #define AU6601_MS_INT_ERROR BIT(15) #define AU6601_MS_INT_CARD_INSERT BIT(7) #define AU6601_MS_INT_CARD_REMOVE BIT(6) #define AU6601_MS_INT_BUF_READ_RDY BIT(5) #define AU6601_MS_INT_BUF_WRITE_RDY BIT(4) #define AU6601_MS_INT_DMA_END BIT(3) #define AU6601_MS_INT_TPC_END BIT(1) #define AU6601_MS_INT_DATA_MASK 0x00000038 #define AU6601_MS_INT_TPC_MASK 0x003d8002 #define AU6601_MS_INT_TPC_ERROR 0x003d0000 #define ALCOR_PCIE_LINK_CTRL_OFFSET 0x10 #define ALCOR_PCIE_LINK_CAP_OFFSET 0x0c #define ALCOR_CAP_START_OFFSET 0x34 struct alcor_dev_cfg { u8 dma; }; struct alcor_pci_priv { struct pci_dev *pdev; struct pci_dev *parent_pdev; struct device *dev; void __iomem *iobase; unsigned int irq; unsigned long id; /* idr id */ struct alcor_dev_cfg *cfg; /* PCI ASPM related vars */ int pdev_cap_off; u8 pdev_aspm_cap; int parent_cap_off; u8 parent_aspm_cap; u8 ext_config_dev_aspm; }; void alcor_write8(struct alcor_pci_priv *priv, u8 val, unsigned int addr); void alcor_write16(struct alcor_pci_priv *priv, u16 val, unsigned int addr); void alcor_write32(struct alcor_pci_priv *priv, u32 val, unsigned int addr); void alcor_write32be(struct alcor_pci_priv *priv, u32 val, unsigned int addr); u8 alcor_read8(struct alcor_pci_priv *priv, unsigned int addr); u32 alcor_read32(struct alcor_pci_priv *priv, unsigned int addr); u32 alcor_read32be(struct alcor_pci_priv *priv, unsigned int addr); #endif PK ! �G usermode_driver.hnu �[��� #ifndef __LINUX_USERMODE_DRIVER_H__ #define __LINUX_USERMODE_DRIVER_H__ #include <linux/umh.h> #include <linux/path.h> struct umd_info { const char *driver_name; struct file *pipe_to_umh; struct file *pipe_from_umh; struct path wd; struct pid *tgid; }; int umd_load_blob(struct umd_info *info, const void *data, size_t len); int umd_unload_blob(struct umd_info *info); int fork_usermode_driver(struct umd_info *info); void umd_cleanup_helper(struct umd_info *info); #endif /* __LINUX_USERMODE_DRIVER_H__ */ PK ! jI�J� � hid-debug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __HID_DEBUG_H #define __HID_DEBUG_H /* * Copyright (c) 2007-2009 Jiri Kosina */ /* */ #ifdef CONFIG_DEBUG_FS #include <linux/kfifo.h> #define HID_DEBUG_BUFSIZE 512 #define HID_DEBUG_FIFOSIZE 512 void hid_dump_input(struct hid_device *, struct hid_usage *, __s32); void hid_dump_report(struct hid_device *, int , u8 *, int); void hid_dump_device(struct hid_device *, struct seq_file *); void hid_dump_field(struct hid_field *, int, struct seq_file *); char *hid_resolv_usage(unsigned, struct seq_file *); void hid_debug_register(struct hid_device *, const char *); void hid_debug_unregister(struct hid_device *); void hid_debug_init(void); void hid_debug_exit(void); void hid_debug_event(struct hid_device *, char *); struct hid_debug_list { DECLARE_KFIFO_PTR(hid_debug_fifo, char); struct fasync_struct *fasync; struct hid_device *hdev; struct list_head node; struct mutex read_mutex; }; #else #define hid_dump_input(a,b,c) do { } while (0) #define hid_dump_report(a,b,c,d) do { } while (0) #define hid_dump_device(a,b) do { } while (0) #define hid_dump_field(a,b,c) do { } while (0) #define hid_resolv_usage(a,b) do { } while (0) #define hid_debug_register(a, b) do { } while (0) #define hid_debug_unregister(a) do { } while (0) #define hid_debug_init() do { } while (0) #define hid_debug_exit() do { } while (0) #define hid_debug_event(a,b) do { } while (0) #endif #endif PK ! �v�f� � start_kernel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_START_KERNEL_H #define _LINUX_START_KERNEL_H #include <linux/linkage.h> #include <linux/init.h> /* Define the prototype for start_kernel here, rather than cluttering up something else. */ extern asmlinkage void __init start_kernel(void); extern void __init arch_call_rest_init(void); extern void __ref rest_init(void); #endif /* _LINUX_START_KERNEL_H */ PK ! ���� � ktime.hnu �[��� /* * include/linux/ktime.h * * ktime_t - nanosecond-resolution time format. * * Copyright(C) 2005, Thomas Gleixner <tglx@linutronix.de> * Copyright(C) 2005, Red Hat, Inc., Ingo Molnar * * data type definitions, declarations, prototypes and macros. * * Started by: Thomas Gleixner and Ingo Molnar * * Credits: * * Roman Zippel provided the ideas and primary code snippets of * the ktime_t union and further simplifications of the original * code. * * For licencing details see kernel-base/COPYING */ #ifndef _LINUX_KTIME_H #define _LINUX_KTIME_H #include <linux/time.h> #include <linux/jiffies.h> #include <asm/bug.h> /* Nanosecond scalar representation for kernel time values */ typedef s64 ktime_t; /** * ktime_set - Set a ktime_t variable from a seconds/nanoseconds value * @secs: seconds to set * @nsecs: nanoseconds to set * * Return: The ktime_t representation of the value. */ static inline ktime_t ktime_set(const s64 secs, const unsigned long nsecs) { if (unlikely(secs >= KTIME_SEC_MAX)) return KTIME_MAX; return secs * NSEC_PER_SEC + (s64)nsecs; } /* Subtract two ktime_t variables. rem = lhs -rhs: */ #define ktime_sub(lhs, rhs) ((lhs) - (rhs)) /* Add two ktime_t variables. res = lhs + rhs: */ #define ktime_add(lhs, rhs) ((lhs) + (rhs)) /* * Same as ktime_add(), but avoids undefined behaviour on overflow; however, * this means that you must check the result for overflow yourself. */ #define ktime_add_unsafe(lhs, rhs) ((u64) (lhs) + (rhs)) /* * Add a ktime_t variable and a scalar nanosecond value. * res = kt + nsval: */ #define ktime_add_ns(kt, nsval) ((kt) + (nsval)) /* * Subtract a scalar nanosecod from a ktime_t variable * res = kt - nsval: */ #define ktime_sub_ns(kt, nsval) ((kt) - (nsval)) /* convert a timespec64 to ktime_t format: */ static inline ktime_t timespec64_to_ktime(struct timespec64 ts) { return ktime_set(ts.tv_sec, ts.tv_nsec); } /* Map the ktime_t to timespec conversion to ns_to_timespec function */ #define ktime_to_timespec64(kt) ns_to_timespec64((kt)) /* Convert ktime_t to nanoseconds */ static inline s64 ktime_to_ns(const ktime_t kt) { return kt; } /** * ktime_compare - Compares two ktime_t variables for less, greater or equal * @cmp1: comparable1 * @cmp2: comparable2 * * Return: ... * cmp1 < cmp2: return <0 * cmp1 == cmp2: return 0 * cmp1 > cmp2: return >0 */ static inline int ktime_compare(const ktime_t cmp1, const ktime_t cmp2) { if (cmp1 < cmp2) return -1; if (cmp1 > cmp2) return 1; return 0; } /** * ktime_after - Compare if a ktime_t value is bigger than another one. * @cmp1: comparable1 * @cmp2: comparable2 * * Return: true if cmp1 happened after cmp2. */ static inline bool ktime_after(const ktime_t cmp1, const ktime_t cmp2) { return ktime_compare(cmp1, cmp2) > 0; } /** * ktime_before - Compare if a ktime_t value is smaller than another one. * @cmp1: comparable1 * @cmp2: comparable2 * * Return: true if cmp1 happened before cmp2. */ static inline bool ktime_before(const ktime_t cmp1, const ktime_t cmp2) { return ktime_compare(cmp1, cmp2) < 0; } #if BITS_PER_LONG < 64 extern s64 __ktime_divns(const ktime_t kt, s64 div); static inline s64 ktime_divns(const ktime_t kt, s64 div) { /* * Negative divisors could cause an inf loop, * so bug out here. */ BUG_ON(div < 0); if (__builtin_constant_p(div) && !(div >> 32)) { s64 ns = kt; u64 tmp = ns < 0 ? -ns : ns; do_div(tmp, div); return ns < 0 ? -tmp : tmp; } else { return __ktime_divns(kt, div); } } #else /* BITS_PER_LONG < 64 */ static inline s64 ktime_divns(const ktime_t kt, s64 div) { /* * 32-bit implementation cannot handle negative divisors, * so catch them on 64bit as well. */ WARN_ON(div < 0); return kt / div; } #endif static inline s64 ktime_to_us(const ktime_t kt) { return ktime_divns(kt, NSEC_PER_USEC); } static inline s64 ktime_to_ms(const ktime_t kt) { return ktime_divns(kt, NSEC_PER_MSEC); } static inline s64 ktime_us_delta(const ktime_t later, const ktime_t earlier) { return ktime_to_us(ktime_sub(later, earlier)); } static inline s64 ktime_ms_delta(const ktime_t later, const ktime_t earlier) { return ktime_to_ms(ktime_sub(later, earlier)); } static inline ktime_t ktime_add_us(const ktime_t kt, const u64 usec) { return ktime_add_ns(kt, usec * NSEC_PER_USEC); } static inline ktime_t ktime_add_ms(const ktime_t kt, const u64 msec) { return ktime_add_ns(kt, msec * NSEC_PER_MSEC); } static inline ktime_t ktime_sub_us(const ktime_t kt, const u64 usec) { return ktime_sub_ns(kt, usec * NSEC_PER_USEC); } static inline ktime_t ktime_sub_ms(const ktime_t kt, const u64 msec) { return ktime_sub_ns(kt, msec * NSEC_PER_MSEC); } extern ktime_t ktime_add_safe(const ktime_t lhs, const ktime_t rhs); /** * ktime_to_timespec64_cond - convert a ktime_t variable to timespec64 * format only if the variable contains data * @kt: the ktime_t variable to convert * @ts: the timespec variable to store the result in * * Return: %true if there was a successful conversion, %false if kt was 0. */ static inline __must_check bool ktime_to_timespec64_cond(const ktime_t kt, struct timespec64 *ts) { if (kt) { *ts = ktime_to_timespec64(kt); return true; } else { return false; } } #include <vdso/ktime.h> static inline ktime_t ns_to_ktime(u64 ns) { return ns; } static inline ktime_t ms_to_ktime(u64 ms) { return ms * NSEC_PER_MSEC; } # include <linux/timekeeping.h> #endif PK ! p�ǴT T atomic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Atomic operations usable in machine independent code */ #ifndef _LINUX_ATOMIC_H #define _LINUX_ATOMIC_H #include <linux/types.h> #include <asm/atomic.h> #include <asm/barrier.h> /* * Relaxed variants of xchg, cmpxchg and some atomic operations. * * We support four variants: * * - Fully ordered: The default implementation, no suffix required. * - Acquire: Provides ACQUIRE semantics, _acquire suffix. * - Release: Provides RELEASE semantics, _release suffix. * - Relaxed: No ordering guarantees, _relaxed suffix. * * For compound atomics performing both a load and a store, ACQUIRE * semantics apply only to the load and RELEASE semantics only to the * store portion of the operation. Note that a failed cmpxchg_acquire * does -not- imply any memory ordering constraints. * * See Documentation/memory-barriers.txt for ACQUIRE/RELEASE definitions. */ #define atomic_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c)) #define atomic_cond_read_relaxed(v, c) smp_cond_load_relaxed(&(v)->counter, (c)) #define atomic64_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c)) #define atomic64_cond_read_relaxed(v, c) smp_cond_load_relaxed(&(v)->counter, (c)) /* * The idea here is to build acquire/release variants by adding explicit * barriers on top of the relaxed variant. In the case where the relaxed * variant is already fully ordered, no additional barriers are needed. * * If an architecture overrides __atomic_acquire_fence() it will probably * want to define smp_mb__after_spinlock(). */ #ifndef __atomic_acquire_fence #define __atomic_acquire_fence smp_mb__after_atomic #endif #ifndef __atomic_release_fence #define __atomic_release_fence smp_mb__before_atomic #endif #ifndef __atomic_pre_full_fence #define __atomic_pre_full_fence smp_mb__before_atomic #endif #ifndef __atomic_post_full_fence #define __atomic_post_full_fence smp_mb__after_atomic #endif #define __atomic_op_acquire(op, args...) \ ({ \ typeof(op##_relaxed(args)) __ret = op##_relaxed(args); \ __atomic_acquire_fence(); \ __ret; \ }) #define __atomic_op_release(op, args...) \ ({ \ __atomic_release_fence(); \ op##_relaxed(args); \ }) #define __atomic_op_fence(op, args...) \ ({ \ typeof(op##_relaxed(args)) __ret; \ __atomic_pre_full_fence(); \ __ret = op##_relaxed(args); \ __atomic_post_full_fence(); \ __ret; \ }) #include <linux/atomic/atomic-arch-fallback.h> #include <linux/atomic/atomic-long.h> #include <linux/atomic/atomic-instrumented.h> #endif /* _LINUX_ATOMIC_H */ PK ! �Uϝ�" �" plist.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Descending-priority-sorted double-linked list * * (C) 2002-2003 Intel Corp * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>. * * 2001-2005 (c) MontaVista Software, Inc. * Daniel Walker <dwalker@mvista.com> * * (C) 2005 Thomas Gleixner <tglx@linutronix.de> * * Simplifications of the original code by * Oleg Nesterov <oleg@tv-sign.ru> * * Based on simple lists (include/linux/list.h). * * This is a priority-sorted list of nodes; each node has a * priority from INT_MIN (highest) to INT_MAX (lowest). * * Addition is O(K), removal is O(1), change of priority of a node is * O(K) and K is the number of RT priority levels used in the system. * (1 <= K <= 99) * * This list is really a list of lists: * * - The tier 1 list is the prio_list, different priority nodes. * * - The tier 2 list is the node_list, serialized nodes. * * Simple ASCII art explanation: * * pl:prio_list (only for plist_node) * nl:node_list * HEAD| NODE(S) * | * ||------------------------------------| * ||->|pl|<->|pl|<--------------->|pl|<-| * | |10| |21| |21| |21| |40| (prio) * | | | | | | | | | | | * | | | | | | | | | | | * |->|nl|<->|nl|<->|nl|<->|nl|<->|nl|<->|nl|<-| * |-------------------------------------------| * * The nodes on the prio_list list are sorted by priority to simplify * the insertion of new nodes. There are no nodes with duplicate * priorites on the list. * * The nodes on the node_list are ordered by priority and can contain * entries which have the same priority. Those entries are ordered * FIFO * * Addition means: look for the prio_list node in the prio_list * for the priority of the node and insert it before the node_list * entry of the next prio_list node. If it is the first node of * that priority, add it to the prio_list in the right position and * insert it into the serialized node_list list * * Removal means remove it from the node_list and remove it from * the prio_list if the node_list list_head is non empty. In case * of removal from the prio_list it must be checked whether other * entries of the same priority are on the list or not. If there * is another entry of the same priority then this entry has to * replace the removed entry on the prio_list. If the entry which * is removed is the only entry of this priority then a simple * remove from both list is sufficient. * * INT_MIN is the highest priority, 0 is the medium highest, INT_MAX * is lowest priority. * * No locking is done, up to the caller. */ #ifndef _LINUX_PLIST_H_ #define _LINUX_PLIST_H_ #include <linux/kernel.h> #include <linux/list.h> struct plist_head { struct list_head node_list; }; struct plist_node { int prio; struct list_head prio_list; struct list_head node_list; }; /** * PLIST_HEAD_INIT - static struct plist_head initializer * @head: struct plist_head variable name */ #define PLIST_HEAD_INIT(head) \ { \ .node_list = LIST_HEAD_INIT((head).node_list) \ } /** * PLIST_HEAD - declare and init plist_head * @head: name for struct plist_head variable */ #define PLIST_HEAD(head) \ struct plist_head head = PLIST_HEAD_INIT(head) /** * PLIST_NODE_INIT - static struct plist_node initializer * @node: struct plist_node variable name * @__prio: initial node priority */ #define PLIST_NODE_INIT(node, __prio) \ { \ .prio = (__prio), \ .prio_list = LIST_HEAD_INIT((node).prio_list), \ .node_list = LIST_HEAD_INIT((node).node_list), \ } /** * plist_head_init - dynamic struct plist_head initializer * @head: &struct plist_head pointer */ static inline void plist_head_init(struct plist_head *head) { INIT_LIST_HEAD(&head->node_list); } /** * plist_node_init - Dynamic struct plist_node initializer * @node: &struct plist_node pointer * @prio: initial node priority */ static inline void plist_node_init(struct plist_node *node, int prio) { node->prio = prio; INIT_LIST_HEAD(&node->prio_list); INIT_LIST_HEAD(&node->node_list); } extern void plist_add(struct plist_node *node, struct plist_head *head); extern void plist_del(struct plist_node *node, struct plist_head *head); extern void plist_requeue(struct plist_node *node, struct plist_head *head); /** * plist_for_each - iterate over the plist * @pos: the type * to use as a loop counter * @head: the head for your list */ #define plist_for_each(pos, head) \ list_for_each_entry(pos, &(head)->node_list, node_list) /** * plist_for_each_continue - continue iteration over the plist * @pos: the type * to use as a loop cursor * @head: the head for your list * * Continue to iterate over plist, continuing after the current position. */ #define plist_for_each_continue(pos, head) \ list_for_each_entry_continue(pos, &(head)->node_list, node_list) /** * plist_for_each_safe - iterate safely over a plist of given type * @pos: the type * to use as a loop counter * @n: another type * to use as temporary storage * @head: the head for your list * * Iterate over a plist of given type, safe against removal of list entry. */ #define plist_for_each_safe(pos, n, head) \ list_for_each_entry_safe(pos, n, &(head)->node_list, node_list) /** * plist_for_each_entry - iterate over list of given type * @pos: the type * to use as a loop counter * @head: the head for your list * @mem: the name of the list_head within the struct */ #define plist_for_each_entry(pos, head, mem) \ list_for_each_entry(pos, &(head)->node_list, mem.node_list) /** * plist_for_each_entry_continue - continue iteration over list of given type * @pos: the type * to use as a loop cursor * @head: the head for your list * @m: the name of the list_head within the struct * * Continue to iterate over list of given type, continuing after * the current position. */ #define plist_for_each_entry_continue(pos, head, m) \ list_for_each_entry_continue(pos, &(head)->node_list, m.node_list) /** * plist_for_each_entry_safe - iterate safely over list of given type * @pos: the type * to use as a loop counter * @n: another type * to use as temporary storage * @head: the head for your list * @m: the name of the list_head within the struct * * Iterate over list of given type, safe against removal of list entry. */ #define plist_for_each_entry_safe(pos, n, head, m) \ list_for_each_entry_safe(pos, n, &(head)->node_list, m.node_list) /** * plist_head_empty - return !0 if a plist_head is empty * @head: &struct plist_head pointer */ static inline int plist_head_empty(const struct plist_head *head) { return list_empty(&head->node_list); } /** * plist_node_empty - return !0 if plist_node is not on a list * @node: &struct plist_node pointer */ static inline int plist_node_empty(const struct plist_node *node) { return list_empty(&node->node_list); } /* All functions below assume the plist_head is not empty. */ /** * plist_first_entry - get the struct for the first entry * @head: the &struct plist_head pointer * @type: the type of the struct this is embedded in * @member: the name of the list_head within the struct */ #ifdef CONFIG_DEBUG_PLIST # define plist_first_entry(head, type, member) \ ({ \ WARN_ON(plist_head_empty(head)); \ container_of(plist_first(head), type, member); \ }) #else # define plist_first_entry(head, type, member) \ container_of(plist_first(head), type, member) #endif /** * plist_last_entry - get the struct for the last entry * @head: the &struct plist_head pointer * @type: the type of the struct this is embedded in * @member: the name of the list_head within the struct */ #ifdef CONFIG_DEBUG_PLIST # define plist_last_entry(head, type, member) \ ({ \ WARN_ON(plist_head_empty(head)); \ container_of(plist_last(head), type, member); \ }) #else # define plist_last_entry(head, type, member) \ container_of(plist_last(head), type, member) #endif /** * plist_next - get the next entry in list * @pos: the type * to cursor */ #define plist_next(pos) \ list_next_entry(pos, node_list) /** * plist_prev - get the prev entry in list * @pos: the type * to cursor */ #define plist_prev(pos) \ list_prev_entry(pos, node_list) /** * plist_first - return the first node (and thus, highest priority) * @head: the &struct plist_head pointer * * Assumes the plist is _not_ empty. */ static inline struct plist_node *plist_first(const struct plist_head *head) { return list_entry(head->node_list.next, struct plist_node, node_list); } /** * plist_last - return the last node (and thus, lowest priority) * @head: the &struct plist_head pointer * * Assumes the plist is _not_ empty. */ static inline struct plist_node *plist_last(const struct plist_head *head) { return list_entry(head->node_list.prev, struct plist_node, node_list); } #endif PK ! ѯ� � � prmt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifdef CONFIG_ACPI_PRMT void init_prmt(void); #else static inline void init_prmt(void) { } #endif PK ! 7��� � scx200_gpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ u32 scx200_gpio_configure(unsigned index, u32 set, u32 clear); extern unsigned scx200_gpio_base; extern unsigned long scx200_gpio_shadow[2]; extern struct nsc_gpio_ops scx200_gpio_ops; #define scx200_gpio_present() (scx200_gpio_base!=0) /* Definitions to make sure I do the same thing in all functions */ #define __SCx200_GPIO_BANK unsigned bank = index>>5 #define __SCx200_GPIO_IOADDR unsigned short ioaddr = scx200_gpio_base+0x10*bank #define __SCx200_GPIO_SHADOW unsigned long *shadow = scx200_gpio_shadow+bank #define __SCx200_GPIO_INDEX index &= 31 #define __SCx200_GPIO_OUT __asm__ __volatile__("outsl":"=mS" (shadow):"d" (ioaddr), "0" (shadow)) /* returns the value of the GPIO pin */ static inline int scx200_gpio_get(unsigned index) { __SCx200_GPIO_BANK; __SCx200_GPIO_IOADDR + 0x04; __SCx200_GPIO_INDEX; return (inl(ioaddr) & (1<<index)) ? 1 : 0; } /* return the value driven on the GPIO signal (the value that will be driven if the GPIO is configured as an output, it might not be the state of the GPIO right now if the GPIO is configured as an input) */ static inline int scx200_gpio_current(unsigned index) { __SCx200_GPIO_BANK; __SCx200_GPIO_INDEX; return (scx200_gpio_shadow[bank] & (1<<index)) ? 1 : 0; } /* drive the GPIO signal high */ static inline void scx200_gpio_set_high(unsigned index) { __SCx200_GPIO_BANK; __SCx200_GPIO_IOADDR; __SCx200_GPIO_SHADOW; __SCx200_GPIO_INDEX; set_bit(index, shadow); /* __set_bit()? */ __SCx200_GPIO_OUT; } /* drive the GPIO signal low */ static inline void scx200_gpio_set_low(unsigned index) { __SCx200_GPIO_BANK; __SCx200_GPIO_IOADDR; __SCx200_GPIO_SHADOW; __SCx200_GPIO_INDEX; clear_bit(index, shadow); /* __clear_bit()? */ __SCx200_GPIO_OUT; } /* drive the GPIO signal to state */ static inline void scx200_gpio_set(unsigned index, int state) { __SCx200_GPIO_BANK; __SCx200_GPIO_IOADDR; __SCx200_GPIO_SHADOW; __SCx200_GPIO_INDEX; if (state) set_bit(index, shadow); else clear_bit(index, shadow); __SCx200_GPIO_OUT; } /* toggle the GPIO signal */ static inline void scx200_gpio_change(unsigned index) { __SCx200_GPIO_BANK; __SCx200_GPIO_IOADDR; __SCx200_GPIO_SHADOW; __SCx200_GPIO_INDEX; change_bit(index, shadow); __SCx200_GPIO_OUT; } #undef __SCx200_GPIO_BANK #undef __SCx200_GPIO_IOADDR #undef __SCx200_GPIO_SHADOW #undef __SCx200_GPIO_INDEX #undef __SCx200_GPIO_OUT PK ! ���f` ` mbus.hnu �[��� /* * Marvell MBUS common definitions. * * Copyright (C) 2008 Marvell Semiconductor * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef __LINUX_MBUS_H #define __LINUX_MBUS_H #include <linux/errno.h> struct resource; struct mbus_dram_target_info { /* * The 4-bit MBUS target ID of the DRAM controller. */ u8 mbus_dram_target_id; /* * The base address, size, and MBUS attribute ID for each * of the possible DRAM chip selects. Peripherals are * required to support at least 4 decode windows. */ int num_cs; struct mbus_dram_window { u8 cs_index; u8 mbus_attr; u64 base; u64 size; } cs[4]; }; /* Flags for PCI/PCIe address decoding regions */ #define MVEBU_MBUS_PCI_IO 0x1 #define MVEBU_MBUS_PCI_MEM 0x2 #define MVEBU_MBUS_PCI_WA 0x3 /* * Magic value that explicits that we don't need a remapping-capable * address decoding window. */ #define MVEBU_MBUS_NO_REMAP (0xffffffff) /* Maximum size of a mbus window name */ #define MVEBU_MBUS_MAX_WINNAME_SZ 32 /* * The Marvell mbus is to be found only on SOCs from the Orion family * at the moment. Provide a dummy stub for other architectures. */ #ifdef CONFIG_PLAT_ORION extern const struct mbus_dram_target_info *mv_mbus_dram_info(void); extern const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void); int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target, u8 *attr); #else static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void) { return NULL; } static inline const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void) { return NULL; } static inline int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target, u8 *attr) { /* * On all ARM32 MVEBU platforms with MBus support, this stub * function will not get called. The real function from the * MBus driver is called instead. ARM64 MVEBU platforms like * the Armada 3700 could use the mv_xor device driver which calls * into this function */ return -EINVAL; } #endif #ifdef CONFIG_MVEBU_MBUS int mvebu_mbus_save_cpu_target(u32 __iomem *store_addr); void mvebu_mbus_get_pcie_mem_aperture(struct resource *res); void mvebu_mbus_get_pcie_io_aperture(struct resource *res); int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr); int mvebu_mbus_add_window_remap_by_id(unsigned int target, unsigned int attribute, phys_addr_t base, size_t size, phys_addr_t remap); int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute, phys_addr_t base, size_t size); int mvebu_mbus_del_window(phys_addr_t base, size_t size); int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base, size_t mbus_size, phys_addr_t sdram_phys_base, size_t sdram_size); int mvebu_mbus_dt_init(bool is_coherent); #else static inline int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr) { return -EINVAL; } #endif /* CONFIG_MVEBU_MBUS */ #endif /* __LINUX_MBUS_H */ PK ! iJiK K srcu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Sleepable Read-Copy Update mechanism for mutual exclusion * * Copyright (C) IBM Corporation, 2006 * Copyright (C) Fujitsu, 2012 * * Author: Paul McKenney <paulmck@linux.ibm.com> * Lai Jiangshan <laijs@cn.fujitsu.com> * * For detailed explanation of Read-Copy Update mechanism see - * Documentation/RCU/ *.txt * */ #ifndef _LINUX_SRCU_H #define _LINUX_SRCU_H #include <linux/mutex.h> #include <linux/rcupdate.h> #include <linux/workqueue.h> #include <linux/rcu_segcblist.h> struct srcu_struct; #ifdef CONFIG_DEBUG_LOCK_ALLOC int __init_srcu_struct(struct srcu_struct *ssp, const char *name, struct lock_class_key *key); #define init_srcu_struct(ssp) \ ({ \ static struct lock_class_key __srcu_key; \ \ __init_srcu_struct((ssp), #ssp, &__srcu_key); \ }) #define __SRCU_DEP_MAP_INIT(srcu_name) .dep_map = { .name = #srcu_name }, #else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ int init_srcu_struct(struct srcu_struct *ssp); #define __SRCU_DEP_MAP_INIT(srcu_name) #endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ #ifdef CONFIG_TINY_SRCU #include <linux/srcutiny.h> #elif defined(CONFIG_TREE_SRCU) #include <linux/srcutree.h> #elif defined(CONFIG_SRCU) #error "Unknown SRCU implementation specified to kernel configuration" #else /* Dummy definition for things like notifiers. Actual use gets link error. */ struct srcu_struct { }; #endif void call_srcu(struct srcu_struct *ssp, struct rcu_head *head, void (*func)(struct rcu_head *head)); void cleanup_srcu_struct(struct srcu_struct *ssp); int __srcu_read_lock(struct srcu_struct *ssp) __acquires(ssp); void __srcu_read_unlock(struct srcu_struct *ssp, int idx) __releases(ssp); void synchronize_srcu(struct srcu_struct *ssp); unsigned long get_state_synchronize_srcu(struct srcu_struct *ssp); unsigned long start_poll_synchronize_srcu(struct srcu_struct *ssp); bool poll_state_synchronize_srcu(struct srcu_struct *ssp, unsigned long cookie); #ifdef CONFIG_SRCU void srcu_init(void); #else /* #ifdef CONFIG_SRCU */ static inline void srcu_init(void) { } #endif /* #else #ifdef CONFIG_SRCU */ #ifdef CONFIG_DEBUG_LOCK_ALLOC /** * srcu_read_lock_held - might we be in SRCU read-side critical section? * @ssp: The srcu_struct structure to check * * If CONFIG_DEBUG_LOCK_ALLOC is selected, returns nonzero iff in an SRCU * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC, * this assumes we are in an SRCU read-side critical section unless it can * prove otherwise. * * Checks debug_lockdep_rcu_enabled() to prevent false positives during boot * and while lockdep is disabled. * * Note that SRCU is based on its own statemachine and it doesn't * relies on normal RCU, it can be called from the CPU which * is in the idle loop from an RCU point of view or offline. */ static inline int srcu_read_lock_held(const struct srcu_struct *ssp) { if (!debug_lockdep_rcu_enabled()) return 1; return lock_is_held(&ssp->dep_map); } #else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ static inline int srcu_read_lock_held(const struct srcu_struct *ssp) { return 1; } #endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ /** * srcu_dereference_check - fetch SRCU-protected pointer for later dereferencing * @p: the pointer to fetch and protect for later dereferencing * @ssp: pointer to the srcu_struct, which is used to check that we * really are in an SRCU read-side critical section. * @c: condition to check for update-side use * * If PROVE_RCU is enabled, invoking this outside of an RCU read-side * critical section will result in an RCU-lockdep splat, unless @c evaluates * to 1. The @c argument will normally be a logical expression containing * lockdep_is_held() calls. */ #define srcu_dereference_check(p, ssp, c) \ __rcu_dereference_check((p), (c) || srcu_read_lock_held(ssp), __rcu) /** * srcu_dereference - fetch SRCU-protected pointer for later dereferencing * @p: the pointer to fetch and protect for later dereferencing * @ssp: pointer to the srcu_struct, which is used to check that we * really are in an SRCU read-side critical section. * * Makes rcu_dereference_check() do the dirty work. If PROVE_RCU * is enabled, invoking this outside of an RCU read-side critical * section will result in an RCU-lockdep splat. */ #define srcu_dereference(p, ssp) srcu_dereference_check((p), (ssp), 0) /** * srcu_dereference_notrace - no tracing and no lockdep calls from here * @p: the pointer to fetch and protect for later dereferencing * @ssp: pointer to the srcu_struct, which is used to check that we * really are in an SRCU read-side critical section. */ #define srcu_dereference_notrace(p, ssp) srcu_dereference_check((p), (ssp), 1) /** * srcu_read_lock - register a new reader for an SRCU-protected structure. * @ssp: srcu_struct in which to register the new reader. * * Enter an SRCU read-side critical section. Note that SRCU read-side * critical sections may be nested. However, it is illegal to * call anything that waits on an SRCU grace period for the same * srcu_struct, whether directly or indirectly. Please note that * one way to indirectly wait on an SRCU grace period is to acquire * a mutex that is held elsewhere while calling synchronize_srcu() or * synchronize_srcu_expedited(). * * Note that srcu_read_lock() and the matching srcu_read_unlock() must * occur in the same context, for example, it is illegal to invoke * srcu_read_unlock() in an irq handler if the matching srcu_read_lock() * was invoked in process context. */ static inline int srcu_read_lock(struct srcu_struct *ssp) __acquires(ssp) { int retval; retval = __srcu_read_lock(ssp); rcu_lock_acquire(&(ssp)->dep_map); return retval; } /* Used by tracing, cannot be traced and cannot invoke lockdep. */ static inline notrace int srcu_read_lock_notrace(struct srcu_struct *ssp) __acquires(ssp) { int retval; retval = __srcu_read_lock(ssp); return retval; } /** * srcu_read_unlock - unregister a old reader from an SRCU-protected structure. * @ssp: srcu_struct in which to unregister the old reader. * @idx: return value from corresponding srcu_read_lock(). * * Exit an SRCU read-side critical section. */ static inline void srcu_read_unlock(struct srcu_struct *ssp, int idx) __releases(ssp) { WARN_ON_ONCE(idx & ~0x1); rcu_lock_release(&(ssp)->dep_map); __srcu_read_unlock(ssp, idx); } /* Used by tracing, cannot be traced and cannot call lockdep. */ static inline notrace void srcu_read_unlock_notrace(struct srcu_struct *ssp, int idx) __releases(ssp) { __srcu_read_unlock(ssp, idx); } /** * smp_mb__after_srcu_read_unlock - ensure full ordering after srcu_read_unlock * * Converts the preceding srcu_read_unlock into a two-way memory barrier. * * Call this after srcu_read_unlock, to guarantee that all memory operations * that occur after smp_mb__after_srcu_read_unlock will appear to happen after * the preceding srcu_read_unlock. */ static inline void smp_mb__after_srcu_read_unlock(void) { /* __srcu_read_unlock has smp_mb() internally so nothing to do here. */ } DEFINE_LOCK_GUARD_1(srcu, struct srcu_struct, _T->idx = srcu_read_lock(_T->lock), srcu_read_unlock(_T->lock, _T->idx), int idx) #endif PK ! W7K K binfmts.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BINFMTS_H #define _LINUX_BINFMTS_H #include <linux/sched.h> #include <linux/unistd.h> #include <asm/exec.h> #include <uapi/linux/binfmts.h> struct filename; #define CORENAME_MAX_SIZE 128 /* * This structure is used to hold the arguments that are used when loading binaries. */ struct linux_binprm { #ifdef CONFIG_MMU struct vm_area_struct *vma; unsigned long vma_pages; #else # define MAX_ARG_PAGES 32 struct page *page[MAX_ARG_PAGES]; #endif struct mm_struct *mm; unsigned long p; /* current top of mem */ unsigned long argmin; /* rlimit marker for copy_strings() */ unsigned int /* Should an execfd be passed to userspace? */ have_execfd:1, /* Use the creds of a script (see binfmt_misc) */ execfd_creds:1, /* * Set by bprm_creds_for_exec hook to indicate a * privilege-gaining exec has happened. Used to set * AT_SECURE auxv for glibc. */ secureexec:1, /* * Set when errors can no longer be returned to the * original userspace. */ point_of_no_return:1; #ifdef __alpha__ unsigned int taso:1; #endif struct file *executable; /* Executable to pass to the interpreter */ struct file *interpreter; struct file *file; struct cred *cred; /* new credentials */ int unsafe; /* how unsafe this exec is (mask of LSM_UNSAFE_*) */ unsigned int per_clear; /* bits to clear in current->personality */ int argc, envc; const char *filename; /* Name of binary as seen by procps */ const char *interp; /* Name of the binary really executed. Most of the time same as filename, but could be different for binfmt_{misc,script} */ const char *fdpath; /* generated filename for execveat */ unsigned interp_flags; int execfd; /* File descriptor of the executable */ unsigned long loader, exec; struct rlimit rlim_stack; /* Saved RLIMIT_STACK used during exec. */ char buf[BINPRM_BUF_SIZE]; } __randomize_layout; #define BINPRM_FLAGS_ENFORCE_NONDUMP_BIT 0 #define BINPRM_FLAGS_ENFORCE_NONDUMP (1 << BINPRM_FLAGS_ENFORCE_NONDUMP_BIT) /* filename of the binary will be inaccessible after exec */ #define BINPRM_FLAGS_PATH_INACCESSIBLE_BIT 2 #define BINPRM_FLAGS_PATH_INACCESSIBLE (1 << BINPRM_FLAGS_PATH_INACCESSIBLE_BIT) /* preserve argv0 for the interpreter */ #define BINPRM_FLAGS_PRESERVE_ARGV0_BIT 3 #define BINPRM_FLAGS_PRESERVE_ARGV0 (1 << BINPRM_FLAGS_PRESERVE_ARGV0_BIT) /* Function parameter for binfmt->coredump */ struct coredump_params { const kernel_siginfo_t *siginfo; struct pt_regs *regs; struct file *file; unsigned long limit; unsigned long mm_flags; loff_t written; loff_t pos; loff_t to_skip; int vma_count; size_t vma_data_size; struct core_vma_metadata *vma_meta; struct pid *pid; }; /* * This structure defines the functions that are used to load the binary formats that * linux accepts. */ struct linux_binfmt { struct list_head lh; struct module *module; int (*load_binary)(struct linux_binprm *); int (*load_shlib)(struct file *); int (*core_dump)(struct coredump_params *cprm); unsigned long min_coredump; /* minimal dump size */ } __randomize_layout; extern void __register_binfmt(struct linux_binfmt *fmt, int insert); /* Registration of default binfmt handlers */ static inline void register_binfmt(struct linux_binfmt *fmt) { __register_binfmt(fmt, 0); } /* Same as above, but adds a new binfmt at the top of the list */ static inline void insert_binfmt(struct linux_binfmt *fmt) { __register_binfmt(fmt, 1); } extern void unregister_binfmt(struct linux_binfmt *); extern int __must_check remove_arg_zero(struct linux_binprm *); extern int begin_new_exec(struct linux_binprm * bprm); extern void setup_new_exec(struct linux_binprm * bprm); extern void finalize_exec(struct linux_binprm *bprm); extern void would_dump(struct linux_binprm *, struct file *); extern int suid_dumpable; /* Stack area protections */ #define EXSTACK_DEFAULT 0 /* Whatever the arch defaults to */ #define EXSTACK_DISABLE_X 1 /* Disable executable stacks */ #define EXSTACK_ENABLE_X 2 /* Enable executable stacks */ extern int setup_arg_pages(struct linux_binprm * bprm, unsigned long stack_top, int executable_stack); extern int transfer_args_to_stack(struct linux_binprm *bprm, unsigned long *sp_location); extern int bprm_change_interp(const char *interp, struct linux_binprm *bprm); int copy_string_kernel(const char *arg, struct linux_binprm *bprm); extern void set_binfmt(struct linux_binfmt *new); extern ssize_t read_code(struct file *, unsigned long, loff_t, size_t); int kernel_execve(const char *filename, const char *const *argv, const char *const *envp); #endif /* _LINUX_BINFMTS_H */ PK ! ��� � toshiba.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* toshiba.h -- Linux driver for accessing the SMM on Toshiba laptops * * Copyright (c) 1996-2000 Jonathan A. Buzzard (jonathan@buzzard.org.uk) * * Thanks to Juergen Heinzl <juergen@monocerus.demon.co.uk> for the pointers * on making sure the structure is aligned and packed. */ #ifndef _LINUX_TOSHIBA_H #define _LINUX_TOSHIBA_H #include <uapi/linux/toshiba.h> int tosh_smm(SMMRegisters *regs); #endif PK ! w�?D9 D9 rio_drv.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * RapidIO driver services * * Copyright 2005 MontaVista Software, Inc. * Matt Porter <mporter@kernel.crashing.org> */ #ifndef LINUX_RIO_DRV_H #define LINUX_RIO_DRV_H #include <linux/types.h> #include <linux/ioport.h> #include <linux/list.h> #include <linux/errno.h> #include <linux/string.h> #include <linux/rio.h> extern int __rio_local_read_config_32(struct rio_mport *port, u32 offset, u32 * data); extern int __rio_local_write_config_32(struct rio_mport *port, u32 offset, u32 data); extern int __rio_local_read_config_16(struct rio_mport *port, u32 offset, u16 * data); extern int __rio_local_write_config_16(struct rio_mport *port, u32 offset, u16 data); extern int __rio_local_read_config_8(struct rio_mport *port, u32 offset, u8 * data); extern int __rio_local_write_config_8(struct rio_mport *port, u32 offset, u8 data); extern int rio_mport_read_config_32(struct rio_mport *port, u16 destid, u8 hopcount, u32 offset, u32 * data); extern int rio_mport_write_config_32(struct rio_mport *port, u16 destid, u8 hopcount, u32 offset, u32 data); extern int rio_mport_read_config_16(struct rio_mport *port, u16 destid, u8 hopcount, u32 offset, u16 * data); extern int rio_mport_write_config_16(struct rio_mport *port, u16 destid, u8 hopcount, u32 offset, u16 data); extern int rio_mport_read_config_8(struct rio_mport *port, u16 destid, u8 hopcount, u32 offset, u8 * data); extern int rio_mport_write_config_8(struct rio_mport *port, u16 destid, u8 hopcount, u32 offset, u8 data); /** * rio_local_read_config_32 - Read 32 bits from local configuration space * @port: Master port * @offset: Offset into local configuration space * @data: Pointer to read data into * * Reads 32 bits of data from the specified offset within the local * device's configuration space. */ static inline int rio_local_read_config_32(struct rio_mport *port, u32 offset, u32 * data) { return __rio_local_read_config_32(port, offset, data); } /** * rio_local_write_config_32 - Write 32 bits to local configuration space * @port: Master port * @offset: Offset into local configuration space * @data: Data to be written * * Writes 32 bits of data to the specified offset within the local * device's configuration space. */ static inline int rio_local_write_config_32(struct rio_mport *port, u32 offset, u32 data) { return __rio_local_write_config_32(port, offset, data); } /** * rio_local_read_config_16 - Read 16 bits from local configuration space * @port: Master port * @offset: Offset into local configuration space * @data: Pointer to read data into * * Reads 16 bits of data from the specified offset within the local * device's configuration space. */ static inline int rio_local_read_config_16(struct rio_mport *port, u32 offset, u16 * data) { return __rio_local_read_config_16(port, offset, data); } /** * rio_local_write_config_16 - Write 16 bits to local configuration space * @port: Master port * @offset: Offset into local configuration space * @data: Data to be written * * Writes 16 bits of data to the specified offset within the local * device's configuration space. */ static inline int rio_local_write_config_16(struct rio_mport *port, u32 offset, u16 data) { return __rio_local_write_config_16(port, offset, data); } /** * rio_local_read_config_8 - Read 8 bits from local configuration space * @port: Master port * @offset: Offset into local configuration space * @data: Pointer to read data into * * Reads 8 bits of data from the specified offset within the local * device's configuration space. */ static inline int rio_local_read_config_8(struct rio_mport *port, u32 offset, u8 * data) { return __rio_local_read_config_8(port, offset, data); } /** * rio_local_write_config_8 - Write 8 bits to local configuration space * @port: Master port * @offset: Offset into local configuration space * @data: Data to be written * * Writes 8 bits of data to the specified offset within the local * device's configuration space. */ static inline int rio_local_write_config_8(struct rio_mport *port, u32 offset, u8 data) { return __rio_local_write_config_8(port, offset, data); } /** * rio_read_config_32 - Read 32 bits from configuration space * @rdev: RIO device * @offset: Offset into device configuration space * @data: Pointer to read data into * * Reads 32 bits of data from the specified offset within the * RIO device's configuration space. */ static inline int rio_read_config_32(struct rio_dev *rdev, u32 offset, u32 * data) { return rio_mport_read_config_32(rdev->net->hport, rdev->destid, rdev->hopcount, offset, data); }; /** * rio_write_config_32 - Write 32 bits to configuration space * @rdev: RIO device * @offset: Offset into device configuration space * @data: Data to be written * * Writes 32 bits of data to the specified offset within the * RIO device's configuration space. */ static inline int rio_write_config_32(struct rio_dev *rdev, u32 offset, u32 data) { return rio_mport_write_config_32(rdev->net->hport, rdev->destid, rdev->hopcount, offset, data); }; /** * rio_read_config_16 - Read 16 bits from configuration space * @rdev: RIO device * @offset: Offset into device configuration space * @data: Pointer to read data into * * Reads 16 bits of data from the specified offset within the * RIO device's configuration space. */ static inline int rio_read_config_16(struct rio_dev *rdev, u32 offset, u16 * data) { return rio_mport_read_config_16(rdev->net->hport, rdev->destid, rdev->hopcount, offset, data); }; /** * rio_write_config_16 - Write 16 bits to configuration space * @rdev: RIO device * @offset: Offset into device configuration space * @data: Data to be written * * Writes 16 bits of data to the specified offset within the * RIO device's configuration space. */ static inline int rio_write_config_16(struct rio_dev *rdev, u32 offset, u16 data) { return rio_mport_write_config_16(rdev->net->hport, rdev->destid, rdev->hopcount, offset, data); }; /** * rio_read_config_8 - Read 8 bits from configuration space * @rdev: RIO device * @offset: Offset into device configuration space * @data: Pointer to read data into * * Reads 8 bits of data from the specified offset within the * RIO device's configuration space. */ static inline int rio_read_config_8(struct rio_dev *rdev, u32 offset, u8 * data) { return rio_mport_read_config_8(rdev->net->hport, rdev->destid, rdev->hopcount, offset, data); }; /** * rio_write_config_8 - Write 8 bits to configuration space * @rdev: RIO device * @offset: Offset into device configuration space * @data: Data to be written * * Writes 8 bits of data to the specified offset within the * RIO device's configuration space. */ static inline int rio_write_config_8(struct rio_dev *rdev, u32 offset, u8 data) { return rio_mport_write_config_8(rdev->net->hport, rdev->destid, rdev->hopcount, offset, data); }; extern int rio_mport_send_doorbell(struct rio_mport *mport, u16 destid, u16 data); /** * rio_send_doorbell - Send a doorbell message to a device * @rdev: RIO device * @data: Doorbell message data * * Send a doorbell message to a RIO device. The doorbell message * has a 16-bit info field provided by the @data argument. */ static inline int rio_send_doorbell(struct rio_dev *rdev, u16 data) { return rio_mport_send_doorbell(rdev->net->hport, rdev->destid, data); }; /** * rio_init_mbox_res - Initialize a RIO mailbox resource * @res: resource struct * @start: start of mailbox range * @end: end of mailbox range * * This function is used to initialize the fields of a resource * for use as a mailbox resource. It initializes a range of * mailboxes using the start and end arguments. */ static inline void rio_init_mbox_res(struct resource *res, int start, int end) { memset(res, 0, sizeof(struct resource)); res->start = start; res->end = end; res->flags = RIO_RESOURCE_MAILBOX; } /** * rio_init_dbell_res - Initialize a RIO doorbell resource * @res: resource struct * @start: start of doorbell range * @end: end of doorbell range * * This function is used to initialize the fields of a resource * for use as a doorbell resource. It initializes a range of * doorbell messages using the start and end arguments. */ static inline void rio_init_dbell_res(struct resource *res, u16 start, u16 end) { memset(res, 0, sizeof(struct resource)); res->start = start; res->end = end; res->flags = RIO_RESOURCE_DOORBELL; } /** * RIO_DEVICE - macro used to describe a specific RIO device * @dev: the 16 bit RIO device ID * @ven: the 16 bit RIO vendor ID * * This macro is used to create a struct rio_device_id that matches a * specific device. The assembly vendor and assembly device fields * will be set to %RIO_ANY_ID. */ #define RIO_DEVICE(dev,ven) \ .did = (dev), .vid = (ven), \ .asm_did = RIO_ANY_ID, .asm_vid = RIO_ANY_ID /* Mailbox management */ extern int rio_request_outb_mbox(struct rio_mport *, void *, int, int, void (*)(struct rio_mport *, void *,int, int)); extern int rio_release_outb_mbox(struct rio_mport *, int); /** * rio_add_outb_message - Add RIO message to an outbound mailbox queue * @mport: RIO master port containing the outbound queue * @rdev: RIO device the message is be sent to * @mbox: The outbound mailbox queue * @buffer: Pointer to the message buffer * @len: Length of the message buffer * * Adds a RIO message buffer to an outbound mailbox queue for * transmission. Returns 0 on success. */ static inline int rio_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, void *buffer, size_t len) { return mport->ops->add_outb_message(mport, rdev, mbox, buffer, len); } extern int rio_request_inb_mbox(struct rio_mport *, void *, int, int, void (*)(struct rio_mport *, void *, int, int)); extern int rio_release_inb_mbox(struct rio_mport *, int); /** * rio_add_inb_buffer - Add buffer to an inbound mailbox queue * @mport: Master port containing the inbound mailbox * @mbox: The inbound mailbox number * @buffer: Pointer to the message buffer * * Adds a buffer to an inbound mailbox queue for reception. Returns * 0 on success. */ static inline int rio_add_inb_buffer(struct rio_mport *mport, int mbox, void *buffer) { return mport->ops->add_inb_buffer(mport, mbox, buffer); } /** * rio_get_inb_message - Get A RIO message from an inbound mailbox queue * @mport: Master port containing the inbound mailbox * @mbox: The inbound mailbox number * * Get a RIO message from an inbound mailbox queue. Returns 0 on success. */ static inline void *rio_get_inb_message(struct rio_mport *mport, int mbox) { return mport->ops->get_inb_message(mport, mbox); } /* Doorbell management */ extern int rio_request_inb_dbell(struct rio_mport *, void *, u16, u16, void (*)(struct rio_mport *, void *, u16, u16, u16)); extern int rio_release_inb_dbell(struct rio_mport *, u16, u16); extern struct resource *rio_request_outb_dbell(struct rio_dev *, u16, u16); extern int rio_release_outb_dbell(struct rio_dev *, struct resource *); /* Memory region management */ int rio_claim_resource(struct rio_dev *, int); int rio_request_regions(struct rio_dev *, char *); void rio_release_regions(struct rio_dev *); int rio_request_region(struct rio_dev *, int, char *); void rio_release_region(struct rio_dev *, int); /* Memory mapping functions */ extern int rio_map_inb_region(struct rio_mport *mport, dma_addr_t local, u64 rbase, u32 size, u32 rflags); extern void rio_unmap_inb_region(struct rio_mport *mport, dma_addr_t lstart); extern int rio_map_outb_region(struct rio_mport *mport, u16 destid, u64 rbase, u32 size, u32 rflags, dma_addr_t *local); extern void rio_unmap_outb_region(struct rio_mport *mport, u16 destid, u64 rstart); /* Port-Write management */ extern int rio_request_inb_pwrite(struct rio_dev *, int (*)(struct rio_dev *, union rio_pw_msg*, int)); extern int rio_release_inb_pwrite(struct rio_dev *); extern int rio_add_mport_pw_handler(struct rio_mport *mport, void *dev_id, int (*pwcback)(struct rio_mport *mport, void *dev_id, union rio_pw_msg *msg, int step)); extern int rio_del_mport_pw_handler(struct rio_mport *mport, void *dev_id, int (*pwcback)(struct rio_mport *mport, void *dev_id, union rio_pw_msg *msg, int step)); extern int rio_inb_pwrite_handler(struct rio_mport *mport, union rio_pw_msg *pw_msg); extern void rio_pw_enable(struct rio_mport *mport, int enable); /* LDM support */ int rio_register_driver(struct rio_driver *); void rio_unregister_driver(struct rio_driver *); struct rio_dev *rio_dev_get(struct rio_dev *); void rio_dev_put(struct rio_dev *); #ifdef CONFIG_RAPIDIO_DMA_ENGINE extern struct dma_chan *rio_request_dma(struct rio_dev *rdev); extern struct dma_chan *rio_request_mport_dma(struct rio_mport *mport); extern void rio_release_dma(struct dma_chan *dchan); extern struct dma_async_tx_descriptor *rio_dma_prep_slave_sg( struct rio_dev *rdev, struct dma_chan *dchan, struct rio_dma_data *data, enum dma_transfer_direction direction, unsigned long flags); extern struct dma_async_tx_descriptor *rio_dma_prep_xfer( struct dma_chan *dchan, u16 destid, struct rio_dma_data *data, enum dma_transfer_direction direction, unsigned long flags); #endif /** * rio_name - Get the unique RIO device identifier * @rdev: RIO device * * Get the unique RIO device identifier. Returns the device * identifier string. */ static inline const char *rio_name(struct rio_dev *rdev) { return dev_name(&rdev->dev); } /** * rio_get_drvdata - Get RIO driver specific data * @rdev: RIO device * * Get RIO driver specific data. Returns a pointer to the * driver specific data. */ static inline void *rio_get_drvdata(struct rio_dev *rdev) { return dev_get_drvdata(&rdev->dev); } /** * rio_set_drvdata - Set RIO driver specific data * @rdev: RIO device * @data: Pointer to driver specific data * * Set RIO driver specific data. device struct driver data pointer * is set to the @data argument. */ static inline void rio_set_drvdata(struct rio_dev *rdev, void *data) { dev_set_drvdata(&rdev->dev, data); } /* Misc driver helpers */ extern u16 rio_local_get_device_id(struct rio_mport *port); extern void rio_local_set_device_id(struct rio_mport *port, u16 did); extern int rio_init_mports(void); #endif /* LINUX_RIO_DRV_H */ PK ! �H�Rb b container.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Definitions for container bus type. * * Copyright (C) 2013, Intel Corporation * Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com> */ #ifndef _LINUX_CONTAINER_H #define _LINUX_CONTAINER_H #include <linux/device.h> /* drivers/base/power/container.c */ extern struct bus_type container_subsys; struct container_dev { struct device dev; int (*offline)(struct container_dev *cdev); }; static inline struct container_dev *to_container_dev(struct device *dev) { return container_of(dev, struct container_dev, dev); } #endif /* _LINUX_CONTAINER_H */ PK ! -%� �* �* host1x.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2009-2013, NVIDIA Corporation. All rights reserved. */ #ifndef __LINUX_HOST1X_H #define __LINUX_HOST1X_H #include <linux/device.h> #include <linux/types.h> enum host1x_class { HOST1X_CLASS_HOST1X = 0x1, HOST1X_CLASS_GR2D = 0x51, HOST1X_CLASS_GR2D_SB = 0x52, HOST1X_CLASS_VIC = 0x5D, HOST1X_CLASS_GR3D = 0x60, }; struct host1x; struct host1x_client; struct iommu_group; u64 host1x_get_dma_mask(struct host1x *host1x); /** * struct host1x_client_ops - host1x client operations * @early_init: host1x client early initialization code * @init: host1x client initialization code * @exit: host1x client tear down code * @late_exit: host1x client late tear down code * @suspend: host1x client suspend code * @resume: host1x client resume code */ struct host1x_client_ops { int (*early_init)(struct host1x_client *client); int (*init)(struct host1x_client *client); int (*exit)(struct host1x_client *client); int (*late_exit)(struct host1x_client *client); int (*suspend)(struct host1x_client *client); int (*resume)(struct host1x_client *client); }; /** * struct host1x_client - host1x client structure * @list: list node for the host1x client * @host: pointer to struct device representing the host1x controller * @dev: pointer to struct device backing this host1x client * @group: IOMMU group that this client is a member of * @ops: host1x client operations * @class: host1x class represented by this client * @channel: host1x channel associated with this client * @syncpts: array of syncpoints requested for this client * @num_syncpts: number of syncpoints requested for this client * @parent: pointer to parent structure * @usecount: reference count for this structure * @lock: mutex for mutually exclusive concurrency */ struct host1x_client { struct list_head list; struct device *host; struct device *dev; struct iommu_group *group; const struct host1x_client_ops *ops; enum host1x_class class; struct host1x_channel *channel; struct host1x_syncpt **syncpts; unsigned int num_syncpts; struct host1x_client *parent; unsigned int usecount; struct mutex lock; }; /* * host1x buffer objects */ struct host1x_bo; struct sg_table; struct host1x_bo_ops { struct host1x_bo *(*get)(struct host1x_bo *bo); void (*put)(struct host1x_bo *bo); struct sg_table *(*pin)(struct device *dev, struct host1x_bo *bo, dma_addr_t *phys); void (*unpin)(struct device *dev, struct sg_table *sgt); void *(*mmap)(struct host1x_bo *bo); void (*munmap)(struct host1x_bo *bo, void *addr); }; struct host1x_bo { const struct host1x_bo_ops *ops; }; static inline void host1x_bo_init(struct host1x_bo *bo, const struct host1x_bo_ops *ops) { bo->ops = ops; } static inline struct host1x_bo *host1x_bo_get(struct host1x_bo *bo) { return bo->ops->get(bo); } static inline void host1x_bo_put(struct host1x_bo *bo) { bo->ops->put(bo); } static inline struct sg_table *host1x_bo_pin(struct device *dev, struct host1x_bo *bo, dma_addr_t *phys) { return bo->ops->pin(dev, bo, phys); } static inline void host1x_bo_unpin(struct device *dev, struct host1x_bo *bo, struct sg_table *sgt) { bo->ops->unpin(dev, sgt); } static inline void *host1x_bo_mmap(struct host1x_bo *bo) { return bo->ops->mmap(bo); } static inline void host1x_bo_munmap(struct host1x_bo *bo, void *addr) { bo->ops->munmap(bo, addr); } /* * host1x syncpoints */ #define HOST1X_SYNCPT_CLIENT_MANAGED (1 << 0) #define HOST1X_SYNCPT_HAS_BASE (1 << 1) struct host1x_syncpt_base; struct host1x_syncpt; struct host1x; struct host1x_syncpt *host1x_syncpt_get_by_id(struct host1x *host, u32 id); struct host1x_syncpt *host1x_syncpt_get_by_id_noref(struct host1x *host, u32 id); struct host1x_syncpt *host1x_syncpt_get(struct host1x_syncpt *sp); u32 host1x_syncpt_id(struct host1x_syncpt *sp); u32 host1x_syncpt_read_min(struct host1x_syncpt *sp); u32 host1x_syncpt_read_max(struct host1x_syncpt *sp); u32 host1x_syncpt_read(struct host1x_syncpt *sp); int host1x_syncpt_incr(struct host1x_syncpt *sp); u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs); int host1x_syncpt_wait(struct host1x_syncpt *sp, u32 thresh, long timeout, u32 *value); struct host1x_syncpt *host1x_syncpt_request(struct host1x_client *client, unsigned long flags); void host1x_syncpt_put(struct host1x_syncpt *sp); struct host1x_syncpt *host1x_syncpt_alloc(struct host1x *host, unsigned long flags, const char *name); struct host1x_syncpt_base *host1x_syncpt_get_base(struct host1x_syncpt *sp); u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base); void host1x_syncpt_release_vblank_reservation(struct host1x_client *client, u32 syncpt_id); struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold); /* * host1x channel */ struct host1x_channel; struct host1x_job; struct host1x_channel *host1x_channel_request(struct host1x_client *client); struct host1x_channel *host1x_channel_get(struct host1x_channel *channel); void host1x_channel_put(struct host1x_channel *channel); int host1x_job_submit(struct host1x_job *job); /* * host1x job */ #define HOST1X_RELOC_READ (1 << 0) #define HOST1X_RELOC_WRITE (1 << 1) struct host1x_reloc { struct { struct host1x_bo *bo; unsigned long offset; } cmdbuf; struct { struct host1x_bo *bo; unsigned long offset; } target; unsigned long shift; unsigned long flags; }; struct host1x_job { /* When refcount goes to zero, job can be freed */ struct kref ref; /* List entry */ struct list_head list; /* Channel where job is submitted to */ struct host1x_channel *channel; /* client where the job originated */ struct host1x_client *client; /* Gathers and their memory */ struct host1x_job_cmd *cmds; unsigned int num_cmds; /* Array of handles to be pinned & unpinned */ struct host1x_reloc *relocs; unsigned int num_relocs; struct host1x_job_unpin_data *unpins; unsigned int num_unpins; dma_addr_t *addr_phys; dma_addr_t *gather_addr_phys; dma_addr_t *reloc_addr_phys; /* Sync point id, number of increments and end related to the submit */ struct host1x_syncpt *syncpt; u32 syncpt_incrs; u32 syncpt_end; /* Completion waiter ref */ void *waiter; /* Maximum time to wait for this job */ unsigned int timeout; /* Job has timed out and should be released */ bool cancelled; /* Index and number of slots used in the push buffer */ unsigned int first_get; unsigned int num_slots; /* Copy of gathers */ size_t gather_copy_size; dma_addr_t gather_copy; u8 *gather_copy_mapped; /* Check if register is marked as an address reg */ int (*is_addr_reg)(struct device *dev, u32 class, u32 reg); /* Check if class belongs to the unit */ int (*is_valid_class)(u32 class); /* Request a SETCLASS to this class */ u32 class; /* Add a channel wait for previous ops to complete */ bool serialize; /* Fast-forward syncpoint increments on job timeout */ bool syncpt_recovery; /* Callback called when job is freed */ void (*release)(struct host1x_job *job); void *user_data; /* Whether host1x-side firewall should be ran for this job or not */ bool enable_firewall; }; struct host1x_job *host1x_job_alloc(struct host1x_channel *ch, u32 num_cmdbufs, u32 num_relocs, bool skip_firewall); void host1x_job_add_gather(struct host1x_job *job, struct host1x_bo *bo, unsigned int words, unsigned int offset); void host1x_job_add_wait(struct host1x_job *job, u32 id, u32 thresh, bool relative, u32 next_class); struct host1x_job *host1x_job_get(struct host1x_job *job); void host1x_job_put(struct host1x_job *job); int host1x_job_pin(struct host1x_job *job, struct device *dev); void host1x_job_unpin(struct host1x_job *job); /* * subdevice probe infrastructure */ struct host1x_device; /** * struct host1x_driver - host1x logical device driver * @driver: core driver * @subdevs: table of OF device IDs matching subdevices for this driver * @list: list node for the driver * @probe: called when the host1x logical device is probed * @remove: called when the host1x logical device is removed * @shutdown: called when the host1x logical device is shut down */ struct host1x_driver { struct device_driver driver; const struct of_device_id *subdevs; struct list_head list; int (*probe)(struct host1x_device *device); int (*remove)(struct host1x_device *device); void (*shutdown)(struct host1x_device *device); }; static inline struct host1x_driver * to_host1x_driver(struct device_driver *driver) { return container_of(driver, struct host1x_driver, driver); } int host1x_driver_register_full(struct host1x_driver *driver, struct module *owner); void host1x_driver_unregister(struct host1x_driver *driver); #define host1x_driver_register(driver) \ host1x_driver_register_full(driver, THIS_MODULE) struct host1x_device { struct host1x_driver *driver; struct list_head list; struct device dev; struct mutex subdevs_lock; struct list_head subdevs; struct list_head active; struct mutex clients_lock; struct list_head clients; bool registered; struct device_dma_parameters dma_parms; }; static inline struct host1x_device *to_host1x_device(struct device *dev) { return container_of(dev, struct host1x_device, dev); } int host1x_device_init(struct host1x_device *device); int host1x_device_exit(struct host1x_device *device); void __host1x_client_init(struct host1x_client *client, struct lock_class_key *key); void host1x_client_exit(struct host1x_client *client); #define host1x_client_init(client) \ ({ \ static struct lock_class_key __key; \ __host1x_client_init(client, &__key); \ }) int __host1x_client_register(struct host1x_client *client); /* * Note that this wrapper calls __host1x_client_init() for compatibility * with existing callers. Callers that want to separately initialize and * register a host1x client must first initialize using either of the * __host1x_client_init() or host1x_client_init() functions and then use * the low-level __host1x_client_register() function to avoid the client * getting reinitialized. */ #define host1x_client_register(client) \ ({ \ static struct lock_class_key __key; \ __host1x_client_init(client, &__key); \ __host1x_client_register(client); \ }) int host1x_client_unregister(struct host1x_client *client); int host1x_client_suspend(struct host1x_client *client); int host1x_client_resume(struct host1x_client *client); struct tegra_mipi_device; struct tegra_mipi_device *tegra_mipi_request(struct device *device, struct device_node *np); void tegra_mipi_free(struct tegra_mipi_device *device); int tegra_mipi_enable(struct tegra_mipi_device *device); int tegra_mipi_disable(struct tegra_mipi_device *device); int tegra_mipi_start_calibration(struct tegra_mipi_device *device); int tegra_mipi_finish_calibration(struct tegra_mipi_device *device); #endif PK ! HNS� � part_stat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_PART_STAT_H #define _LINUX_PART_STAT_H #include <linux/genhd.h> #include <asm/local.h> struct disk_stats { u64 nsecs[NR_STAT_GROUPS]; unsigned long sectors[NR_STAT_GROUPS]; unsigned long ios[NR_STAT_GROUPS]; unsigned long merges[NR_STAT_GROUPS]; unsigned long io_ticks; local_t in_flight[2]; }; /* * Macros to operate on percpu disk statistics: * * {disk|part|all}_stat_{add|sub|inc|dec}() modify the stat counters and should * be called between disk_stat_lock() and disk_stat_unlock(). * * part_stat_read() can be called at any time. */ #define part_stat_lock() preempt_disable() #define part_stat_unlock() preempt_enable() #define part_stat_get_cpu(part, field, cpu) \ (per_cpu_ptr((part)->bd_stats, (cpu))->field) #define part_stat_get(part, field) \ part_stat_get_cpu(part, field, smp_processor_id()) #define part_stat_read(part, field) \ ({ \ typeof((part)->bd_stats->field) res = 0; \ unsigned int _cpu; \ for_each_possible_cpu(_cpu) \ res += per_cpu_ptr((part)->bd_stats, _cpu)->field; \ res; \ }) static inline void part_stat_set_all(struct block_device *part, int value) { int i; for_each_possible_cpu(i) memset(per_cpu_ptr(part->bd_stats, i), value, sizeof(struct disk_stats)); } #define part_stat_read_accum(part, field) \ (part_stat_read(part, field[STAT_READ]) + \ part_stat_read(part, field[STAT_WRITE]) + \ part_stat_read(part, field[STAT_DISCARD])) #define __part_stat_add(part, field, addnd) \ __this_cpu_add((part)->bd_stats->field, addnd) #define part_stat_add(part, field, addnd) do { \ __part_stat_add((part), field, addnd); \ if ((part)->bd_partno) \ __part_stat_add(bdev_whole(part), field, addnd); \ } while (0) #define part_stat_dec(part, field) \ part_stat_add(part, field, -1) #define part_stat_inc(part, field) \ part_stat_add(part, field, 1) #define part_stat_sub(part, field, subnd) \ part_stat_add(part, field, -subnd) #define part_stat_local_dec(part, field) \ local_dec(&(part_stat_get(part, field))) #define part_stat_local_inc(part, field) \ local_inc(&(part_stat_get(part, field))) #define part_stat_local_read(part, field) \ local_read(&(part_stat_get(part, field))) #define part_stat_local_read_cpu(part, field, cpu) \ local_read(&(part_stat_get_cpu(part, field, cpu))) #endif /* _LINUX_PART_STAT_H */ PK ! vj��x x ctype.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CTYPE_H #define _LINUX_CTYPE_H #include <linux/compiler.h> /* * NOTE! This ctype does not handle EOF like the standard C * library is required to. */ #define _U 0x01 /* upper */ #define _L 0x02 /* lower */ #define _D 0x04 /* digit */ #define _C 0x08 /* cntrl */ #define _P 0x10 /* punct */ #define _S 0x20 /* white space (space/lf/tab) */ #define _X 0x40 /* hex digit */ #define _SP 0x80 /* hard space (0x20) */ extern const unsigned char _ctype[]; #define __ismask(x) (_ctype[(int)(unsigned char)(x)]) #define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0) #define isalpha(c) ((__ismask(c)&(_U|_L)) != 0) #define iscntrl(c) ((__ismask(c)&(_C)) != 0) #define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0) #define islower(c) ((__ismask(c)&(_L)) != 0) #define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0) #define ispunct(c) ((__ismask(c)&(_P)) != 0) /* Note: isspace() must return false for %NUL-terminator */ #define isspace(c) ((__ismask(c)&(_S)) != 0) #define isupper(c) ((__ismask(c)&(_U)) != 0) #define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0) #define isascii(c) (((unsigned char)(c))<=0x7f) #define toascii(c) (((unsigned char)(c))&0x7f) #if __has_builtin(__builtin_isdigit) #define isdigit(c) __builtin_isdigit(c) #else static inline int isdigit(int c) { return '0' <= c && c <= '9'; } #endif static inline unsigned char __tolower(unsigned char c) { if (isupper(c)) c -= 'A'-'a'; return c; } static inline unsigned char __toupper(unsigned char c) { if (islower(c)) c -= 'a'-'A'; return c; } #define tolower(c) __tolower(c) #define toupper(c) __toupper(c) /* * Fast implementation of tolower() for internal usage. Do not use in your * code. */ static inline char _tolower(const char c) { return c | 0x20; } /* Fast check for octal digit */ static inline int isodigit(const char c) { return c >= '0' && c <= '7'; } #endif PK ! ��g g earlycpio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_EARLYCPIO_H #define _LINUX_EARLYCPIO_H #include <linux/types.h> #define MAX_CPIO_FILE_NAME 18 struct cpio_data { void *data; size_t size; char name[MAX_CPIO_FILE_NAME]; }; struct cpio_data find_cpio_data(const char *path, void *data, size_t len, long *offset); #endif /* _LINUX_EARLYCPIO_H */ PK ! �u��6 6 adxl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Address translation interface via ACPI DSM. * Copyright (C) 2018 Intel Corporation */ #ifndef _LINUX_ADXL_H #define _LINUX_ADXL_H const char * const *adxl_get_component_names(void); int adxl_decode(u64 addr, u64 component_values[]); #endif /* _LINUX_ADXL_H */ PK ! _d#�C �C arm-smccc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015, Linaro Limited */ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H #include <linux/init.h> #include <uapi/linux/const.h> /* * This file provides common defines for ARM SMC Calling Convention as * specified in * https://developer.arm.com/docs/den0028/latest * * This code is up-to-date with version DEN 0028 C */ #define ARM_SMCCC_STD_CALL _AC(0,U) #define ARM_SMCCC_FAST_CALL _AC(1,U) #define ARM_SMCCC_TYPE_SHIFT 31 #define ARM_SMCCC_SMC_32 0 #define ARM_SMCCC_SMC_64 1 #define ARM_SMCCC_CALL_CONV_SHIFT 30 #define ARM_SMCCC_OWNER_MASK 0x3F #define ARM_SMCCC_OWNER_SHIFT 24 #define ARM_SMCCC_FUNC_MASK 0xFFFF #define ARM_SMCCC_IS_FAST_CALL(smc_val) \ ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) #define ARM_SMCCC_IS_64(smc_val) \ ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) #define ARM_SMCCC_OWNER_NUM(smc_val) \ (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ (((type) << ARM_SMCCC_TYPE_SHIFT) | \ ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ ((func_num) & ARM_SMCCC_FUNC_MASK)) #define ARM_SMCCC_OWNER_ARCH 0 #define ARM_SMCCC_OWNER_CPU 1 #define ARM_SMCCC_OWNER_SIP 2 #define ARM_SMCCC_OWNER_OEM 3 #define ARM_SMCCC_OWNER_STANDARD 4 #define ARM_SMCCC_OWNER_STANDARD_HYP 5 #define ARM_SMCCC_OWNER_VENDOR_HYP 6 #define ARM_SMCCC_OWNER_TRUSTED_APP 48 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 #define ARM_SMCCC_OWNER_TRUSTED_OS 50 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 #define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01 #define ARM_SMCCC_QUIRK_NONE 0 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ #define ARM_SMCCC_VERSION_1_0 0x10000 #define ARM_SMCCC_VERSION_1_1 0x10001 #define ARM_SMCCC_VERSION_1_2 0x10002 #define ARM_SMCCC_VERSION_1_3 0x10003 #define ARM_SMCCC_1_3_SVE_HINT 0x10000 #define ARM_SMCCC_VERSION_FUNC_ID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ 0, 0) #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ 0, 1) #define ARM_SMCCC_ARCH_SOC_ID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ 0, 2) #define ARM_SMCCC_ARCH_WORKAROUND_1 \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ 0, 0x8000) #define ARM_SMCCC_ARCH_WORKAROUND_2 \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ 0, 0x7fff) #define ARM_SMCCC_ARCH_WORKAROUND_3 \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ 0, 0x3fff) #define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_VENDOR_HYP, \ ARM_SMCCC_FUNC_QUERY_CALL_UID) /* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */ #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 0xb66fb428U #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1 0xe911c52eU #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2 0x564bcaa9U #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3 0x743a004dU /* KVM "vendor specific" services */ #define ARM_SMCCC_KVM_FUNC_FEATURES 0 #define ARM_SMCCC_KVM_FUNC_PTP 1 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127 #define ARM_SMCCC_KVM_NUM_FUNCS 128 #define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_VENDOR_HYP, \ ARM_SMCCC_KVM_FUNC_FEATURES) #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1 /* * ptp_kvm is a feature used for time sync between vm and host. * ptp_kvm module in guest kernel will get service from host using * this hypercall ID. */ #define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_VENDOR_HYP, \ ARM_SMCCC_KVM_FUNC_PTP) /* ptp_kvm counter type ID */ #define KVM_PTP_VIRT_COUNTER 0 #define KVM_PTP_PHYS_COUNTER 1 /* Paravirtualised time calls (defined by ARM DEN0057A) */ #define ARM_SMCCC_HV_PV_TIME_FEATURES \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_64, \ ARM_SMCCC_OWNER_STANDARD_HYP, \ 0x20) #define ARM_SMCCC_HV_PV_TIME_ST \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_64, \ ARM_SMCCC_OWNER_STANDARD_HYP, \ 0x21) /* TRNG entropy source calls (defined by ARM DEN0098) */ #define ARM_SMCCC_TRNG_VERSION \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_STANDARD, \ 0x50) #define ARM_SMCCC_TRNG_FEATURES \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_STANDARD, \ 0x51) #define ARM_SMCCC_TRNG_GET_UUID \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_STANDARD, \ 0x52) #define ARM_SMCCC_TRNG_RND32 \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_32, \ ARM_SMCCC_OWNER_STANDARD, \ 0x53) #define ARM_SMCCC_TRNG_RND64 \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_SMC_64, \ ARM_SMCCC_OWNER_STANDARD, \ 0x53) /* * Return codes defined in ARM DEN 0070A * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C */ #define SMCCC_RET_SUCCESS 0 #define SMCCC_RET_NOT_SUPPORTED -1 #define SMCCC_RET_NOT_REQUIRED -2 #define SMCCC_RET_INVALID_PARAMETER -3 #ifndef __ASSEMBLY__ #include <linux/linkage.h> #include <linux/types.h> enum arm_smccc_conduit { SMCCC_CONDUIT_NONE, SMCCC_CONDUIT_SMC, SMCCC_CONDUIT_HVC, }; /** * arm_smccc_1_1_get_conduit() * * Returns the conduit to be used for SMCCCv1.1 or later. * * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE. */ enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void); /** * arm_smccc_get_version() * * Returns the version to be used for SMCCCv1.1 or later. * * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this * does not imply the presence of firmware or a valid conduit. Caller * handling SMCCCv1.0 must determine the conduit by other means. */ u32 arm_smccc_get_version(void); void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit); /** * struct arm_smccc_res - Result from SMC/HVC call * @a0-a3 result values from registers 0 to 3 */ struct arm_smccc_res { unsigned long a0; unsigned long a1; unsigned long a2; unsigned long a3; }; #ifdef CONFIG_ARM64 /** * struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call * @a0-a17 argument values from registers 0 to 17 */ struct arm_smccc_1_2_regs { unsigned long a0; unsigned long a1; unsigned long a2; unsigned long a3; unsigned long a4; unsigned long a5; unsigned long a6; unsigned long a7; unsigned long a8; unsigned long a9; unsigned long a10; unsigned long a11; unsigned long a12; unsigned long a13; unsigned long a14; unsigned long a15; unsigned long a16; unsigned long a17; }; /** * arm_smccc_1_2_hvc() - make HVC calls * @args: arguments passed via struct arm_smccc_1_2_regs * @res: result values via struct arm_smccc_1_2_regs * * This function is used to make HVC calls following SMC Calling Convention * v1.2 or above. The content of the supplied param are copied from the * structure to registers prior to the HVC instruction. The return values * are updated with the content from registers on return from the HVC * instruction. */ asmlinkage void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args, struct arm_smccc_1_2_regs *res); /** * arm_smccc_1_2_smc() - make SMC calls * @args: arguments passed via struct arm_smccc_1_2_regs * @res: result values via struct arm_smccc_1_2_regs * * This function is used to make SMC calls following SMC Calling Convention * v1.2 or above. The content of the supplied param are copied from the * structure to registers prior to the SMC instruction. The return values * are updated with the content from registers on return from the SMC * instruction. */ asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, struct arm_smccc_1_2_regs *res); #endif /** * struct arm_smccc_quirk - Contains quirk information * @id: quirk identification * @state: quirk specific information * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 */ struct arm_smccc_quirk { int id; union { unsigned long a6; } state; }; /** * __arm_smccc_smc() - make SMC calls * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. * * This function is used to make SMC calls following SMC Calling Convention. * The content of the supplied param are copied to registers 0 to 7 prior * to the SMC instruction. The return values are updated with the content * from register 0 to 3 on return from the SMC instruction. An optional * quirk structure provides vendor specific behavior. */ #ifdef CONFIG_HAVE_ARM_SMCCC asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); #else static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res, struct arm_smccc_quirk *quirk) { *res = (struct arm_smccc_res){}; } #endif /** * __arm_smccc_hvc() - make HVC calls * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. * * This function is used to make HVC calls following SMC Calling * Convention. The content of the supplied param are copied to registers 0 * to 7 prior to the HVC instruction. The return values are updated with * the content from register 0 to 3 on return from the HVC instruction. An * optional quirk structure provides vendor specific behavior. */ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) /* SMCCC v1.1 implementation madness follows */ #ifdef CONFIG_ARM64 #define SMCCC_SMC_INST "smc #0" #define SMCCC_HVC_INST "hvc #0" #elif defined(CONFIG_ARM) #include <asm/opcodes-sec.h> #include <asm/opcodes-virt.h> #define SMCCC_SMC_INST __SMC(0) #define SMCCC_HVC_INST __HVC(0) #endif #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x #define __count_args(...) \ ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) #define __constraint_read_0 "r" (arg0) #define __constraint_read_1 __constraint_read_0, "r" (arg1) #define __constraint_read_2 __constraint_read_1, "r" (arg2) #define __constraint_read_3 __constraint_read_2, "r" (arg3) #define __constraint_read_4 __constraint_read_3, "r" (arg4) #define __constraint_read_5 __constraint_read_4, "r" (arg5) #define __constraint_read_6 __constraint_read_5, "r" (arg6) #define __constraint_read_7 __constraint_read_6, "r" (arg7) #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = res; \ register unsigned long arg0 asm("r0") = (u32)a0 #define __declare_arg_1(a0, a1, res) \ typeof(a1) __a1 = a1; \ struct arm_smccc_res *___res = res; \ register unsigned long arg0 asm("r0") = (u32)a0; \ register typeof(a1) arg1 asm("r1") = __a1 #define __declare_arg_2(a0, a1, a2, res) \ typeof(a1) __a1 = a1; \ typeof(a2) __a2 = a2; \ struct arm_smccc_res *___res = res; \ register unsigned long arg0 asm("r0") = (u32)a0; \ register typeof(a1) arg1 asm("r1") = __a1; \ register typeof(a2) arg2 asm("r2") = __a2 #define __declare_arg_3(a0, a1, a2, a3, res) \ typeof(a1) __a1 = a1; \ typeof(a2) __a2 = a2; \ typeof(a3) __a3 = a3; \ struct arm_smccc_res *___res = res; \ register unsigned long arg0 asm("r0") = (u32)a0; \ register typeof(a1) arg1 asm("r1") = __a1; \ register typeof(a2) arg2 asm("r2") = __a2; \ register typeof(a3) arg3 asm("r3") = __a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ typeof(a4) __a4 = a4; \ __declare_arg_3(a0, a1, a2, a3, res); \ register typeof(a4) arg4 asm("r4") = __a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ typeof(a5) __a5 = a5; \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ register typeof(a5) arg5 asm("r5") = __a5 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ typeof(a6) __a6 = a6; \ __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ register typeof(a6) arg6 asm("r6") = __a6 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ typeof(a7) __a7 = a7; \ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ register typeof(a7) arg7 asm("r7") = __a7 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) #define ___constraints(count) \ : __constraint_read_ ## count \ : "memory" #define __constraints(count) ___constraints(count) /* * We have an output list that is not necessarily used, and GCC feels * entitled to optimise the whole sequence away. "volatile" is what * makes it stick. */ #define __arm_smccc_1_1(inst, ...) \ do { \ register unsigned long r0 asm("r0"); \ register unsigned long r1 asm("r1"); \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3"); \ __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ asm volatile(inst "\n" : \ "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \ __constraints(__count_args(__VA_ARGS__))); \ if (___res) \ *___res = (typeof(*___res)){r0, r1, r2, r3}; \ } while (0) /* * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call * * This is a variadic macro taking one to eight source arguments, and * an optional return structure. * * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * * This macro is used to make SMC calls following SMC Calling Convention v1.1. * The content of the supplied param are copied to registers 0 to 7 prior * to the SMC instruction. The return values are updated with the content * from register 0 to 3 on return from the SMC instruction if not NULL. */ #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) /* * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call * * This is a variadic macro taking one to eight source arguments, and * an optional return structure. * * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * * This macro is used to make HVC calls following SMC Calling Convention v1.1. * The content of the supplied param are copied to registers 0 to 7 prior * to the HVC instruction. The return values are updated with the content * from register 0 to 3 on return from the HVC instruction if not NULL. */ #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) /* * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED. * Used when the SMCCC conduit is not defined. The empty asm statement * avoids compiler warnings about unused variables. */ #define __fail_smccc_1_1(...) \ do { \ __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ asm ("" : __constraints(__count_args(__VA_ARGS__))); \ if (___res) \ ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \ } while (0) /* * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call * * This is a variadic macro taking one to eight source arguments, and * an optional return structure. * * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * * This macro will make either an HVC call or an SMC call depending on the * current SMCCC conduit. If no valid conduit is available then -1 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied). * * The return value also provides the conduit that was used. */ #define arm_smccc_1_1_invoke(...) ({ \ int method = arm_smccc_1_1_get_conduit(); \ switch (method) { \ case SMCCC_CONDUIT_HVC: \ arm_smccc_1_1_hvc(__VA_ARGS__); \ break; \ case SMCCC_CONDUIT_SMC: \ arm_smccc_1_1_smc(__VA_ARGS__); \ break; \ default: \ __fail_smccc_1_1(__VA_ARGS__); \ method = SMCCC_CONDUIT_NONE; \ break; \ } \ method; \ }) #endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/ PK ! �&��!1 !1 ioport.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * ioport.h Definitions of routines for detecting, reserving and * allocating system resources. * * Authors: Linus Torvalds */ #ifndef _LINUX_IOPORT_H #define _LINUX_IOPORT_H #ifndef __ASSEMBLY__ #include <linux/bits.h> #include <linux/compiler.h> #include <linux/minmax.h> #include <linux/types.h> /* * Resources are tree-like, allowing * nesting etc.. */ struct resource { resource_size_t start; resource_size_t end; const char *name; unsigned long flags; unsigned long desc; struct resource *parent, *sibling, *child; }; /* * IO resources have these defined flags. * * PCI devices expose these flags to userspace in the "resource" sysfs file, * so don't move them. */ #define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ #define IORESOURCE_TYPE_BITS 0x00001f00 /* Resource type */ #define IORESOURCE_IO 0x00000100 /* PCI/ISA I/O ports */ #define IORESOURCE_MEM 0x00000200 #define IORESOURCE_REG 0x00000300 /* Register offsets */ #define IORESOURCE_IRQ 0x00000400 #define IORESOURCE_DMA 0x00000800 #define IORESOURCE_BUS 0x00001000 #define IORESOURCE_PREFETCH 0x00002000 /* No side effects */ #define IORESOURCE_READONLY 0x00004000 #define IORESOURCE_CACHEABLE 0x00008000 #define IORESOURCE_RANGELENGTH 0x00010000 #define IORESOURCE_SHADOWABLE 0x00020000 #define IORESOURCE_SIZEALIGN 0x00040000 /* size indicates alignment */ #define IORESOURCE_STARTALIGN 0x00080000 /* start field is alignment */ #define IORESOURCE_MEM_64 0x00100000 #define IORESOURCE_WINDOW 0x00200000 /* forwarded by bridge */ #define IORESOURCE_MUXED 0x00400000 /* Resource is software muxed */ #define IORESOURCE_EXT_TYPE_BITS 0x01000000 /* Resource extended types */ #define IORESOURCE_SYSRAM 0x01000000 /* System RAM (modifier) */ /* IORESOURCE_SYSRAM specific bits. */ #define IORESOURCE_SYSRAM_DRIVER_MANAGED 0x02000000 /* Always detected via a driver. */ #define IORESOURCE_SYSRAM_MERGEABLE 0x04000000 /* Resource can be merged. */ #define IORESOURCE_EXCLUSIVE 0x08000000 /* Userland may not map this resource */ #define IORESOURCE_DISABLED 0x10000000 #define IORESOURCE_UNSET 0x20000000 /* No address assigned yet */ #define IORESOURCE_AUTO 0x40000000 #define IORESOURCE_BUSY 0x80000000 /* Driver has marked this resource busy */ /* I/O resource extended types */ #define IORESOURCE_SYSTEM_RAM (IORESOURCE_MEM|IORESOURCE_SYSRAM) /* PnP IRQ specific bits (IORESOURCE_BITS) */ #define IORESOURCE_IRQ_HIGHEDGE (1<<0) #define IORESOURCE_IRQ_LOWEDGE (1<<1) #define IORESOURCE_IRQ_HIGHLEVEL (1<<2) #define IORESOURCE_IRQ_LOWLEVEL (1<<3) #define IORESOURCE_IRQ_SHAREABLE (1<<4) #define IORESOURCE_IRQ_OPTIONAL (1<<5) /* PnP DMA specific bits (IORESOURCE_BITS) */ #define IORESOURCE_DMA_TYPE_MASK (3<<0) #define IORESOURCE_DMA_8BIT (0<<0) #define IORESOURCE_DMA_8AND16BIT (1<<0) #define IORESOURCE_DMA_16BIT (2<<0) #define IORESOURCE_DMA_MASTER (1<<2) #define IORESOURCE_DMA_BYTE (1<<3) #define IORESOURCE_DMA_WORD (1<<4) #define IORESOURCE_DMA_SPEED_MASK (3<<6) #define IORESOURCE_DMA_COMPATIBLE (0<<6) #define IORESOURCE_DMA_TYPEA (1<<6) #define IORESOURCE_DMA_TYPEB (2<<6) #define IORESOURCE_DMA_TYPEF (3<<6) /* PnP memory I/O specific bits (IORESOURCE_BITS) */ #define IORESOURCE_MEM_WRITEABLE (1<<0) /* dup: IORESOURCE_READONLY */ #define IORESOURCE_MEM_CACHEABLE (1<<1) /* dup: IORESOURCE_CACHEABLE */ #define IORESOURCE_MEM_RANGELENGTH (1<<2) /* dup: IORESOURCE_RANGELENGTH */ #define IORESOURCE_MEM_TYPE_MASK (3<<3) #define IORESOURCE_MEM_8BIT (0<<3) #define IORESOURCE_MEM_16BIT (1<<3) #define IORESOURCE_MEM_8AND16BIT (2<<3) #define IORESOURCE_MEM_32BIT (3<<3) #define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */ #define IORESOURCE_MEM_EXPANSIONROM (1<<6) #define IORESOURCE_MEM_NONPOSTED (1<<7) /* PnP I/O specific bits (IORESOURCE_BITS) */ #define IORESOURCE_IO_16BIT_ADDR (1<<0) #define IORESOURCE_IO_FIXED (1<<1) #define IORESOURCE_IO_SPARSE (1<<2) /* PCI ROM control bits (IORESOURCE_BITS) */ #define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */ #define IORESOURCE_ROM_SHADOW (1<<1) /* Use RAM image, not ROM BAR */ /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ #define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ #define IORESOURCE_PCI_EA_BEI (1<<5) /* BAR Equivalent Indicator */ /* * I/O Resource Descriptors * * Descriptors are used by walk_iomem_res_desc() and region_intersects() * for searching a specific resource range in the iomem table. Assign * a new descriptor when a resource range supports the search interfaces. * Otherwise, resource.desc must be set to IORES_DESC_NONE (0). */ enum { IORES_DESC_NONE = 0, IORES_DESC_CRASH_KERNEL = 1, IORES_DESC_ACPI_TABLES = 2, IORES_DESC_ACPI_NV_STORAGE = 3, IORES_DESC_PERSISTENT_MEMORY = 4, IORES_DESC_PERSISTENT_MEMORY_LEGACY = 5, IORES_DESC_DEVICE_PRIVATE_MEMORY = 6, IORES_DESC_RESERVED = 7, IORES_DESC_SOFT_RESERVED = 8, }; /* * Flags controlling ioremap() behavior. */ enum { IORES_MAP_SYSTEM_RAM = BIT(0), IORES_MAP_ENCRYPTED = BIT(1), }; /* helpers to define resources */ #define DEFINE_RES_NAMED(_start, _size, _name, _flags) \ { \ .start = (_start), \ .end = (_start) + (_size) - 1, \ .name = (_name), \ .flags = (_flags), \ .desc = IORES_DESC_NONE, \ } #define DEFINE_RES_IO_NAMED(_start, _size, _name) \ DEFINE_RES_NAMED((_start), (_size), (_name), IORESOURCE_IO) #define DEFINE_RES_IO(_start, _size) \ DEFINE_RES_IO_NAMED((_start), (_size), NULL) #define DEFINE_RES_MEM_NAMED(_start, _size, _name) \ DEFINE_RES_NAMED((_start), (_size), (_name), IORESOURCE_MEM) #define DEFINE_RES_MEM(_start, _size) \ DEFINE_RES_MEM_NAMED((_start), (_size), NULL) #define DEFINE_RES_IRQ_NAMED(_irq, _name) \ DEFINE_RES_NAMED((_irq), 1, (_name), IORESOURCE_IRQ) #define DEFINE_RES_IRQ(_irq) \ DEFINE_RES_IRQ_NAMED((_irq), NULL) #define DEFINE_RES_DMA_NAMED(_dma, _name) \ DEFINE_RES_NAMED((_dma), 1, (_name), IORESOURCE_DMA) #define DEFINE_RES_DMA(_dma) \ DEFINE_RES_DMA_NAMED((_dma), NULL) /* PC/ISA/whatever - the normal PC address spaces: IO and memory */ extern struct resource ioport_resource; extern struct resource iomem_resource; extern struct resource *request_resource_conflict(struct resource *root, struct resource *new); extern int request_resource(struct resource *root, struct resource *new); extern int release_resource(struct resource *new); void release_child_resources(struct resource *new); extern void reserve_region_with_split(struct resource *root, resource_size_t start, resource_size_t end, const char *name); extern struct resource *insert_resource_conflict(struct resource *parent, struct resource *new); extern int insert_resource(struct resource *parent, struct resource *new); extern void insert_resource_expand_to_fit(struct resource *root, struct resource *new); extern int remove_resource(struct resource *old); extern void arch_remove_reservations(struct resource *avail); extern int allocate_resource(struct resource *root, struct resource *new, resource_size_t size, resource_size_t min, resource_size_t max, resource_size_t align, resource_size_t (*alignf)(void *, const struct resource *, resource_size_t, resource_size_t), void *alignf_data); struct resource *lookup_resource(struct resource *root, resource_size_t start); int adjust_resource(struct resource *res, resource_size_t start, resource_size_t size); resource_size_t resource_alignment(struct resource *res); static inline resource_size_t resource_size(const struct resource *res) { return res->end - res->start + 1; } static inline unsigned long resource_type(const struct resource *res) { return res->flags & IORESOURCE_TYPE_BITS; } static inline unsigned long resource_ext_type(const struct resource *res) { return res->flags & IORESOURCE_EXT_TYPE_BITS; } /* True iff r1 completely contains r2 */ static inline bool resource_contains(struct resource *r1, struct resource *r2) { if (resource_type(r1) != resource_type(r2)) return false; if (r1->flags & IORESOURCE_UNSET || r2->flags & IORESOURCE_UNSET) return false; return r1->start <= r2->start && r1->end >= r2->end; } /* True if any part of r1 overlaps r2 */ static inline bool resource_overlaps(struct resource *r1, struct resource *r2) { return r1->start <= r2->end && r1->end >= r2->start; } static inline bool resource_intersection(struct resource *r1, struct resource *r2, struct resource *r) { if (!resource_overlaps(r1, r2)) return false; r->start = max(r1->start, r2->start); r->end = min(r1->end, r2->end); return true; } static inline bool resource_union(struct resource *r1, struct resource *r2, struct resource *r) { if (!resource_overlaps(r1, r2)) return false; r->start = min(r1->start, r2->start); r->end = max(r1->end, r2->end); return true; } /* Convenience shorthand with allocation */ #define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), 0) #define request_muxed_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), IORESOURCE_MUXED) #define __request_mem_region(start,n,name, excl) __request_region(&iomem_resource, (start), (n), (name), excl) #define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name), 0) #define request_mem_region_muxed(start, n, name) \ __request_region(&iomem_resource, (start), (n), (name), IORESOURCE_MUXED) #define request_mem_region_exclusive(start,n,name) \ __request_region(&iomem_resource, (start), (n), (name), IORESOURCE_EXCLUSIVE) #define rename_region(region, newname) do { (region)->name = (newname); } while (0) extern struct resource * __request_region(struct resource *, resource_size_t start, resource_size_t n, const char *name, int flags); /* Compatibility cruft */ #define release_region(start,n) __release_region(&ioport_resource, (start), (n)) #define release_mem_region(start,n) __release_region(&iomem_resource, (start), (n)) extern void __release_region(struct resource *, resource_size_t, resource_size_t); #ifdef CONFIG_MEMORY_HOTREMOVE extern void release_mem_region_adjustable(resource_size_t, resource_size_t); #endif #ifdef CONFIG_MEMORY_HOTPLUG extern void merge_system_ram_resource(struct resource *res); #endif /* Wrappers for managed devices */ struct device; extern int devm_request_resource(struct device *dev, struct resource *root, struct resource *new); extern void devm_release_resource(struct device *dev, struct resource *new); #define devm_request_region(dev,start,n,name) \ __devm_request_region(dev, &ioport_resource, (start), (n), (name)) #define devm_request_mem_region(dev,start,n,name) \ __devm_request_region(dev, &iomem_resource, (start), (n), (name)) extern struct resource * __devm_request_region(struct device *dev, struct resource *parent, resource_size_t start, resource_size_t n, const char *name); #define devm_release_region(dev, start, n) \ __devm_release_region(dev, &ioport_resource, (start), (n)) #define devm_release_mem_region(dev, start, n) \ __devm_release_region(dev, &iomem_resource, (start), (n)) extern void __devm_release_region(struct device *dev, struct resource *parent, resource_size_t start, resource_size_t n); extern int iomem_map_sanity_check(resource_size_t addr, unsigned long size); extern bool iomem_is_exclusive(u64 addr); extern int walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages, void *arg, int (*func)(unsigned long, unsigned long, void *)); extern int walk_mem_res(u64 start, u64 end, void *arg, int (*func)(struct resource *, void *)); extern int walk_system_ram_res(u64 start, u64 end, void *arg, int (*func)(struct resource *, void *)); extern int walk_iomem_res_desc(unsigned long desc, unsigned long flags, u64 start, u64 end, void *arg, int (*func)(struct resource *, void *)); struct resource *devm_request_free_mem_region(struct device *dev, struct resource *base, unsigned long size); struct resource *request_free_mem_region(struct resource *base, unsigned long size, const char *name); static inline void irqresource_disabled(struct resource *res, u32 irq) { res->start = irq; res->end = irq; res->flags |= IORESOURCE_IRQ | IORESOURCE_DISABLED | IORESOURCE_UNSET; } extern struct address_space *iomem_get_mapping(void); #endif /* __ASSEMBLY__ */ #endif /* _LINUX_IOPORT_H */ PK ! ���~ ~ errseq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * See Documentation/core-api/errseq.rst and lib/errseq.c */ #ifndef _LINUX_ERRSEQ_H #define _LINUX_ERRSEQ_H typedef u32 errseq_t; errseq_t errseq_set(errseq_t *eseq, int err); errseq_t errseq_sample(errseq_t *eseq); int errseq_check(errseq_t *eseq, errseq_t since); int errseq_check_and_advance(errseq_t *eseq, errseq_t *since); #endif PK ! {���/ �/ powercap.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * powercap.h: Data types and headers for sysfs power capping interface * Copyright (c) 2013, Intel Corporation. */ #ifndef __POWERCAP_H__ #define __POWERCAP_H__ #include <linux/device.h> #include <linux/idr.h> /* * A power cap class device can contain multiple powercap control_types. * Each control_type can have multiple power zones, which can be independently * controlled. Each power zone can have one or more constraints. */ struct powercap_control_type; struct powercap_zone; struct powercap_zone_constraint; /** * struct powercap_control_type_ops - Define control type callbacks * @set_enable: Enable/Disable whole control type. * Default is enabled. But this callback allows all zones * to be in disable state and remove any applied power * limits. If disabled power zone can only be monitored * not controlled. * @get_enable: get Enable/Disable status. * @release: Callback to inform that last reference to this * control type is closed. So it is safe to free data * structure associated with this control type. * This callback is mandatory if the client own memory * for the control type. * * This structure defines control type callbacks to be implemented by client * drivers */ struct powercap_control_type_ops { int (*set_enable) (struct powercap_control_type *, bool mode); int (*get_enable) (struct powercap_control_type *, bool *mode); int (*release) (struct powercap_control_type *); }; /** * struct powercap_control_type - Defines a powercap control_type * @dev: device for this control_type * @idr: idr to have unique id for its child * @nr_zones: counter for number of zones of this type * @ops: Pointer to callback struct * @lock: mutex for control type * @allocated: This is possible that client owns the memory * used by this structure. In this case * this flag is set to false by framework to * prevent deallocation during release process. * Otherwise this flag is set to true. * @node: linked-list node * * Defines powercap control_type. This acts as a container for power * zones, which use same method to control power. E.g. RAPL, RAPL-PCI etc. * All fields are private and should not be used by client drivers. */ struct powercap_control_type { struct device dev; struct idr idr; int nr_zones; const struct powercap_control_type_ops *ops; struct mutex lock; bool allocated; struct list_head node; }; /** * struct powercap_zone_ops - Define power zone callbacks * @get_max_energy_range_uj: Get maximum range of energy counter in * micro-joules. * @get_energy_uj: Get current energy counter in micro-joules. * @reset_energy_uj: Reset micro-joules energy counter. * @get_max_power_range_uw: Get maximum range of power counter in * micro-watts. * @get_power_uw: Get current power counter in micro-watts. * @set_enable: Enable/Disable power zone controls. * Default is enabled. * @get_enable: get Enable/Disable status. * @release: Callback to inform that last reference to this * control type is closed. So it is safe to free * data structure associated with this * control type. Mandatory, if client driver owns * the power_zone memory. * * This structure defines zone callbacks to be implemented by client drivers. * Client drives can define both energy and power related callbacks. But at * the least one type (either power or energy) is mandatory. Client drivers * should handle mutual exclusion, if required in callbacks. */ struct powercap_zone_ops { int (*get_max_energy_range_uj) (struct powercap_zone *, u64 *); int (*get_energy_uj) (struct powercap_zone *, u64 *); int (*reset_energy_uj) (struct powercap_zone *); int (*get_max_power_range_uw) (struct powercap_zone *, u64 *); int (*get_power_uw) (struct powercap_zone *, u64 *); int (*set_enable) (struct powercap_zone *, bool mode); int (*get_enable) (struct powercap_zone *, bool *mode); int (*release) (struct powercap_zone *); }; #define POWERCAP_ZONE_MAX_ATTRS 6 #define POWERCAP_CONSTRAINTS_ATTRS 8 #define MAX_CONSTRAINTS_PER_ZONE 10 /** * struct powercap_zone- Defines instance of a power cap zone * @id: Unique id * @name: Power zone name. * @control_type_inst: Control type instance for this zone. * @ops: Pointer to the zone operation structure. * @dev: Instance of a device. * @const_id_cnt: Number of constraint defined. * @idr: Instance to an idr entry for children zones. * @parent_idr: To remove reference from the parent idr. * @private_data: Private data pointer if any for this zone. * @zone_dev_attrs: Attributes associated with this device. * @zone_attr_count: Attribute count. * @dev_zone_attr_group: Attribute group for attributes. * @dev_attr_groups: Attribute group store to register with device. * @allocated: This is possible that client owns the memory * used by this structure. In this case * this flag is set to false by framework to * prevent deallocation during release process. * Otherwise this flag is set to true. * @constraints: List of constraints for this zone. * * This defines a power zone instance. The fields of this structure are * private, and should not be used by client drivers. */ struct powercap_zone { int id; char *name; void *control_type_inst; const struct powercap_zone_ops *ops; struct device dev; int const_id_cnt; struct idr idr; struct idr *parent_idr; void *private_data; struct attribute **zone_dev_attrs; int zone_attr_count; struct attribute_group dev_zone_attr_group; const struct attribute_group *dev_attr_groups[2]; /* 1 group + NULL */ bool allocated; struct powercap_zone_constraint *constraints; }; /** * struct powercap_zone_constraint_ops - Define constraint callbacks * @set_power_limit_uw: Set power limit in micro-watts. * @get_power_limit_uw: Get power limit in micro-watts. * @set_time_window_us: Set time window in micro-seconds. * @get_time_window_us: Get time window in micro-seconds. * @get_max_power_uw: Get max power allowed in micro-watts. * @get_min_power_uw: Get min power allowed in micro-watts. * @get_max_time_window_us: Get max time window allowed in micro-seconds. * @get_min_time_window_us: Get min time window allowed in micro-seconds. * @get_name: Get the name of constraint * * This structure is used to define the constraint callbacks for the client * drivers. The following callbacks are mandatory and can't be NULL: * set_power_limit_uw * get_power_limit_uw * set_time_window_us * get_time_window_us * get_name * Client drivers should handle mutual exclusion, if required in callbacks. */ struct powercap_zone_constraint_ops { int (*set_power_limit_uw) (struct powercap_zone *, int, u64); int (*get_power_limit_uw) (struct powercap_zone *, int, u64 *); int (*set_time_window_us) (struct powercap_zone *, int, u64); int (*get_time_window_us) (struct powercap_zone *, int, u64 *); int (*get_max_power_uw) (struct powercap_zone *, int, u64 *); int (*get_min_power_uw) (struct powercap_zone *, int, u64 *); int (*get_max_time_window_us) (struct powercap_zone *, int, u64 *); int (*get_min_time_window_us) (struct powercap_zone *, int, u64 *); const char *(*get_name) (struct powercap_zone *, int); }; /** * struct powercap_zone_constraint- Defines instance of a constraint * @id: Instance Id of this constraint. * @power_zone: Pointer to the power zone for this constraint. * @ops: Pointer to the constraint callbacks. * * This defines a constraint instance. */ struct powercap_zone_constraint { int id; struct powercap_zone *power_zone; const struct powercap_zone_constraint_ops *ops; }; /* For clients to get their device pointer, may be used for dev_dbgs */ #define POWERCAP_GET_DEV(power_zone) (&power_zone->dev) /** * powercap_set_zone_data() - Set private data for a zone * @power_zone: A pointer to the valid zone instance. * @pdata: A pointer to the user private data. * * Allows client drivers to associate some private data to zone instance. */ static inline void powercap_set_zone_data(struct powercap_zone *power_zone, void *pdata) { if (power_zone) power_zone->private_data = pdata; } /** * powercap_get_zone_data() - Get private data for a zone * @power_zone: A pointer to the valid zone instance. * * Allows client drivers to get private data associate with a zone, * using call to powercap_set_zone_data. */ static inline void *powercap_get_zone_data(struct powercap_zone *power_zone) { if (power_zone) return power_zone->private_data; return NULL; } /** * powercap_register_control_type() - Register a control_type with framework * @control_type: Pointer to client allocated memory for the control type * structure storage. If this is NULL, powercap framework * will allocate memory and own it. * Advantage of this parameter is that client can embed * this data in its data structures and allocate in a * single call, preventing multiple allocations. * @control_type_name: The Name of this control_type, which will be shown * in the sysfs Interface. * @ops: Callbacks for control type. This parameter is optional. * * Used to create a control_type with the power capping class. Here control_type * can represent a type of technology, which can control a range of power zones. * For example a control_type can be RAPL (Running Average Power Limit) * Intel® 64 and IA-32 Processor Architectures. The name can be any string * which must be unique, otherwise this function returns NULL. * A pointer to the control_type instance is returned on success. */ struct powercap_control_type *powercap_register_control_type( struct powercap_control_type *control_type, const char *name, const struct powercap_control_type_ops *ops); /** * powercap_unregister_control_type() - Unregister a control_type from framework * @instance: A pointer to the valid control_type instance. * * Used to unregister a control_type with the power capping class. * All power zones registered under this control type have to be unregistered * before calling this function, or it will fail with an error code. */ int powercap_unregister_control_type(struct powercap_control_type *instance); /* Zone register/unregister API */ /** * powercap_register_zone() - Register a power zone * @power_zone: Pointer to client allocated memory for the power zone structure * storage. If this is NULL, powercap framework will allocate * memory and own it. Advantage of this parameter is that client * can embed this data in its data structures and allocate in a * single call, preventing multiple allocations. * @control_type: A control_type instance under which this zone operates. * @name: A name for this zone. * @parent: A pointer to the parent power zone instance if any or NULL * @ops: Pointer to zone operation callback structure. * @no_constraints: Number of constraints for this zone * @const_ops: Pointer to constraint callback structure * * Register a power zone under a given control type. A power zone must register * a pointer to a structure representing zone callbacks. * A power zone can be located under a parent power zone, in which case @parent * should point to it. Otherwise, if @parent is NULL, the new power zone will * be located directly under the given control type * For each power zone there may be a number of constraints that appear in the * sysfs under that zone as attributes with unique numeric IDs. * Returns pointer to the power_zone on success. */ struct powercap_zone *powercap_register_zone( struct powercap_zone *power_zone, struct powercap_control_type *control_type, const char *name, struct powercap_zone *parent, const struct powercap_zone_ops *ops, int nr_constraints, const struct powercap_zone_constraint_ops *const_ops); /** * powercap_unregister_zone() - Unregister a zone device * @control_type: A pointer to the valid instance of a control_type. * @power_zone: A pointer to the valid zone instance for a control_type * * Used to unregister a zone device for a control_type. Caller should * make sure that children for this zone are unregistered first. */ int powercap_unregister_zone(struct powercap_control_type *control_type, struct powercap_zone *power_zone); #endif PK ! �.hlb b cn_proc.hnu �[��� /* * cn_proc.h - process events connector * * Copyright (C) Matt Helsley, IBM Corp. 2005 * Based on cn_fork.h by Nguyen Anh Quynh and Guillaume Thouvenin * Copyright (C) 2005 Nguyen Anh Quynh <aquynh@gmail.com> * Copyright (C) 2005 Guillaume Thouvenin <guillaume.thouvenin@bull.net> * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2.1 of the GNU Lesser General Public License * as published by the Free Software Foundation. * * This program is distributed in the hope that it would be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. */ #ifndef CN_PROC_H #define CN_PROC_H #include <uapi/linux/cn_proc.h> #ifdef CONFIG_PROC_EVENTS void proc_fork_connector(struct task_struct *task); void proc_exec_connector(struct task_struct *task); void proc_id_connector(struct task_struct *task, int which_id); void proc_sid_connector(struct task_struct *task); void proc_ptrace_connector(struct task_struct *task, int which_id); void proc_comm_connector(struct task_struct *task); void proc_coredump_connector(struct task_struct *task); void proc_exit_connector(struct task_struct *task); #else static inline void proc_fork_connector(struct task_struct *task) {} static inline void proc_exec_connector(struct task_struct *task) {} static inline void proc_id_connector(struct task_struct *task, int which_id) {} static inline void proc_sid_connector(struct task_struct *task) {} static inline void proc_comm_connector(struct task_struct *task) {} static inline void proc_ptrace_connector(struct task_struct *task, int ptrace_id) {} static inline void proc_coredump_connector(struct task_struct *task) {} static inline void proc_exit_connector(struct task_struct *task) {} #endif /* CONFIG_PROC_EVENTS */ #endif /* CN_PROC_H */ PK ! @�=� � ds2782_battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_DS2782_BATTERY_H #define __LINUX_DS2782_BATTERY_H struct ds278x_platform_data { int rsns; }; #endif PK ! b �> > adfs_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ADFS_FS_H #define _ADFS_FS_H #include <uapi/linux/adfs_fs.h> /* * Calculate the boot block checksum on an ADFS drive. Note that this will * appear to be correct if the sector contains all zeros, so also check that * the disk size is non-zero!!! */ static inline int adfs_checkbblk(unsigned char *ptr) { unsigned int result = 0; unsigned char *p = ptr + 511; do { result = (result & 0xff) + (result >> 8); result = result + *--p; } while (p != ptr); return (result & 0xff) != ptr[511]; } #endif PK ! ڥnW� � wwan.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2021, Linaro Ltd <loic.poulain@linaro.org> */ #ifndef __WWAN_H #define __WWAN_H #include <linux/device.h> #include <linux/kernel.h> #include <linux/poll.h> #include <linux/skbuff.h> #include <linux/netlink.h> #include <linux/netdevice.h> /** * enum wwan_port_type - WWAN port types * @WWAN_PORT_AT: AT commands * @WWAN_PORT_MBIM: Mobile Broadband Interface Model control * @WWAN_PORT_QMI: Qcom modem/MSM interface for modem control * @WWAN_PORT_QCDM: Qcom Modem diagnostic interface * @WWAN_PORT_FIREHOSE: XML based command protocol * * @WWAN_PORT_MAX: Highest supported port types * @WWAN_PORT_UNKNOWN: Special value to indicate an unknown port type * @__WWAN_PORT_MAX: Internal use */ enum wwan_port_type { WWAN_PORT_AT, WWAN_PORT_MBIM, WWAN_PORT_QMI, WWAN_PORT_QCDM, WWAN_PORT_FIREHOSE, /* Add new port types above this line */ __WWAN_PORT_MAX, WWAN_PORT_MAX = __WWAN_PORT_MAX - 1, WWAN_PORT_UNKNOWN, }; struct wwan_port; /** struct wwan_port_ops - The WWAN port operations * @start: The routine for starting the WWAN port device. * @stop: The routine for stopping the WWAN port device. * @tx: Non-blocking routine that sends WWAN port protocol data to the device. * @tx_blocking: Optional blocking routine that sends WWAN port protocol data * to the device. * @tx_poll: Optional routine that sets additional TX poll flags. * * The wwan_port_ops structure contains a list of low-level operations * that control a WWAN port device. All functions are mandatory unless specified. */ struct wwan_port_ops { int (*start)(struct wwan_port *port); void (*stop)(struct wwan_port *port); int (*tx)(struct wwan_port *port, struct sk_buff *skb); /* Optional operations */ int (*tx_blocking)(struct wwan_port *port, struct sk_buff *skb); __poll_t (*tx_poll)(struct wwan_port *port, struct file *filp, poll_table *wait); }; /** * wwan_create_port - Add a new WWAN port * @parent: Device to use as parent and shared by all WWAN ports * @type: WWAN port type * @ops: WWAN port operations * @drvdata: Pointer to caller driver data * * Allocate and register a new WWAN port. The port will be automatically exposed * to user as a character device and attached to the right virtual WWAN device, * based on the parent pointer. The parent pointer is the device shared by all * components of a same WWAN modem (e.g. USB dev, PCI dev, MHI controller...). * * drvdata will be placed in the WWAN port device driver data and can be * retrieved with wwan_port_get_drvdata(). * * This function must be balanced with a call to wwan_remove_port(). * * Returns a valid pointer to wwan_port on success or PTR_ERR on failure */ struct wwan_port *wwan_create_port(struct device *parent, enum wwan_port_type type, const struct wwan_port_ops *ops, void *drvdata); /** * wwan_remove_port - Remove a WWAN port * @port: WWAN port to remove * * Remove a previously created port. */ void wwan_remove_port(struct wwan_port *port); /** * wwan_port_rx - Receive data from the WWAN port * @port: WWAN port for which data is received * @skb: Pointer to the rx buffer * * A port driver calls this function upon data reception (MBIM, AT...). */ void wwan_port_rx(struct wwan_port *port, struct sk_buff *skb); /** * wwan_port_txoff - Stop TX on WWAN port * @port: WWAN port for which TX must be stopped * * Used for TX flow control, a port driver calls this function to indicate TX * is temporary unavailable (e.g. due to ring buffer fullness). */ void wwan_port_txoff(struct wwan_port *port); /** * wwan_port_txon - Restart TX on WWAN port * @port: WWAN port for which TX must be restarted * * Used for TX flow control, a port driver calls this function to indicate TX * is available again. */ void wwan_port_txon(struct wwan_port *port); /** * wwan_port_get_drvdata - Retrieve driver data from a WWAN port * @port: Related WWAN port */ void *wwan_port_get_drvdata(struct wwan_port *port); /** * struct wwan_netdev_priv - WWAN core network device private data * @link_id: WWAN device data link id * @drv_priv: driver private data area, size is determined in &wwan_ops */ struct wwan_netdev_priv { u32 link_id; /* must be last */ u8 drv_priv[] __aligned(sizeof(void *)); }; static inline void *wwan_netdev_drvpriv(struct net_device *dev) { return ((struct wwan_netdev_priv *)netdev_priv(dev))->drv_priv; } /* * Used to indicate that the WWAN core should not create a default network * link. */ #define WWAN_NO_DEFAULT_LINK U32_MAX /** * struct wwan_ops - WWAN device ops * @priv_size: size of private netdev data area * @setup: set up a new netdev * @newlink: register the new netdev * @dellink: remove the given netdev */ struct wwan_ops { unsigned int priv_size; void (*setup)(struct net_device *dev); int (*newlink)(void *ctxt, struct net_device *dev, u32 if_id, struct netlink_ext_ack *extack); void (*dellink)(void *ctxt, struct net_device *dev, struct list_head *head); }; int wwan_register_ops(struct device *parent, const struct wwan_ops *ops, void *ctxt, u32 def_link_id); void wwan_unregister_ops(struct device *parent); #endif /* __WWAN_H */ PK ! }�0� � mroute6.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_MROUTE6_H #define __LINUX_MROUTE6_H #include <linux/pim.h> #include <linux/skbuff.h> /* for struct sk_buff_head */ #include <net/net_namespace.h> #include <uapi/linux/mroute6.h> #include <linux/mroute_base.h> #include <linux/sockptr.h> #include <net/fib_rules.h> #ifdef CONFIG_IPV6_MROUTE static inline int ip6_mroute_opt(int opt) { return (opt >= MRT6_BASE) && (opt <= MRT6_MAX); } #else static inline int ip6_mroute_opt(int opt) { return 0; } #endif struct sock; #ifdef CONFIG_IPV6_MROUTE extern int ip6_mroute_setsockopt(struct sock *, int, sockptr_t, unsigned int); extern int ip6_mroute_getsockopt(struct sock *, int, char __user *, int __user *); extern int ip6_mr_input(struct sk_buff *skb); extern int ip6mr_ioctl(struct sock *sk, int cmd, void __user *arg); extern int ip6mr_compat_ioctl(struct sock *sk, unsigned int cmd, void __user *arg); extern int ip6_mr_init(void); extern void ip6_mr_cleanup(void); #else static inline int ip6_mroute_setsockopt(struct sock *sock, int optname, sockptr_t optval, unsigned int optlen) { return -ENOPROTOOPT; } static inline int ip6_mroute_getsockopt(struct sock *sock, int optname, char __user *optval, int __user *optlen) { return -ENOPROTOOPT; } static inline int ip6mr_ioctl(struct sock *sk, int cmd, void __user *arg) { return -ENOIOCTLCMD; } static inline int ip6_mr_init(void) { return 0; } static inline void ip6_mr_cleanup(void) { return; } #endif #ifdef CONFIG_IPV6_MROUTE_MULTIPLE_TABLES bool ip6mr_rule_default(const struct fib_rule *rule); #else static inline bool ip6mr_rule_default(const struct fib_rule *rule) { return true; } #endif #define VIFF_STATIC 0x8000 struct mfc6_cache_cmp_arg { struct in6_addr mf6c_mcastgrp; struct in6_addr mf6c_origin; }; struct mfc6_cache { struct mr_mfc _c; union { struct { struct in6_addr mf6c_mcastgrp; struct in6_addr mf6c_origin; }; struct mfc6_cache_cmp_arg cmparg; }; }; #define MFC_ASSERT_THRESH (3*HZ) /* Maximal freq. of asserts */ struct rtmsg; extern int ip6mr_get_route(struct net *net, struct sk_buff *skb, struct rtmsg *rtm, u32 portid); #ifdef CONFIG_IPV6_MROUTE bool mroute6_is_socket(struct net *net, struct sk_buff *skb); extern int ip6mr_sk_done(struct sock *sk); #else static inline bool mroute6_is_socket(struct net *net, struct sk_buff *skb) { return false; } static inline int ip6mr_sk_done(struct sock *sk) { return 0; } #endif #endif PK ! +e�' atmel_pdc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * include/linux/atmel_pdc.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People * * Peripheral Data Controller (PDC) registers. * Based on AT91RM9200 datasheet revision E. */ #ifndef ATMEL_PDC_H #define ATMEL_PDC_H #define ATMEL_PDC_RPR 0x100 /* Receive Pointer Register */ #define ATMEL_PDC_RCR 0x104 /* Receive Counter Register */ #define ATMEL_PDC_TPR 0x108 /* Transmit Pointer Register */ #define ATMEL_PDC_TCR 0x10c /* Transmit Counter Register */ #define ATMEL_PDC_RNPR 0x110 /* Receive Next Pointer Register */ #define ATMEL_PDC_RNCR 0x114 /* Receive Next Counter Register */ #define ATMEL_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ #define ATMEL_PDC_TNCR 0x11c /* Transmit Next Counter Register */ #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */ #define ATMEL_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ #define ATMEL_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ #define ATMEL_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ #define ATMEL_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ #define ATMEL_PDC_PTSR 0x124 /* Transfer Status Register */ #define ATMEL_PDC_SCND_BUF_OFF 0x10 /* Offset between first and second buffer registers */ #endif PK ! �DI4 4 of_graph.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * OF graph binding parsing helpers * * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> * * Copyright (C) 2012 Renesas Electronics Corp. * Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de> */ #ifndef __LINUX_OF_GRAPH_H #define __LINUX_OF_GRAPH_H #include <linux/types.h> #include <linux/errno.h> /** * struct of_endpoint - the OF graph endpoint data structure * @port: identifier (value of reg property) of a port this endpoint belongs to * @id: identifier (value of reg property) of this endpoint * @local_node: pointer to device_node of this endpoint */ struct of_endpoint { unsigned int port; unsigned int id; const struct device_node *local_node; }; /** * for_each_endpoint_of_node - iterate over every endpoint in a device node * @parent: parent device node containing ports and endpoints * @child: loop variable pointing to the current endpoint node * * When breaking out of the loop, of_node_put(child) has to be called manually. */ #define for_each_endpoint_of_node(parent, child) \ for (child = of_graph_get_next_endpoint(parent, NULL); child != NULL; \ child = of_graph_get_next_endpoint(parent, child)) #ifdef CONFIG_OF bool of_graph_is_present(const struct device_node *node); int of_graph_parse_endpoint(const struct device_node *node, struct of_endpoint *endpoint); int of_graph_get_endpoint_count(const struct device_node *np); struct device_node *of_graph_get_port_by_id(struct device_node *node, u32 id); struct device_node *of_graph_get_next_endpoint(const struct device_node *parent, struct device_node *previous); struct device_node *of_graph_get_endpoint_by_regs( const struct device_node *parent, int port_reg, int reg); struct device_node *of_graph_get_remote_endpoint( const struct device_node *node); struct device_node *of_graph_get_port_parent(struct device_node *node); struct device_node *of_graph_get_remote_port_parent( const struct device_node *node); struct device_node *of_graph_get_remote_port(const struct device_node *node); struct device_node *of_graph_get_remote_node(const struct device_node *node, u32 port, u32 endpoint); #else static inline bool of_graph_is_present(const struct device_node *node) { return false; } static inline int of_graph_parse_endpoint(const struct device_node *node, struct of_endpoint *endpoint) { return -ENOSYS; } static inline int of_graph_get_endpoint_count(const struct device_node *np) { return 0; } static inline struct device_node *of_graph_get_port_by_id( struct device_node *node, u32 id) { return NULL; } static inline struct device_node *of_graph_get_next_endpoint( const struct device_node *parent, struct device_node *previous) { return NULL; } static inline struct device_node *of_graph_get_endpoint_by_regs( const struct device_node *parent, int port_reg, int reg) { return NULL; } static inline struct device_node *of_graph_get_remote_endpoint( const struct device_node *node) { return NULL; } static inline struct device_node *of_graph_get_port_parent( struct device_node *node) { return NULL; } static inline struct device_node *of_graph_get_remote_port_parent( const struct device_node *node) { return NULL; } static inline struct device_node *of_graph_get_remote_port( const struct device_node *node) { return NULL; } static inline struct device_node *of_graph_get_remote_node( const struct device_node *node, u32 port, u32 endpoint) { return NULL; } #endif /* CONFIG_OF */ #endif /* __LINUX_OF_GRAPH_H */ PK ! ^���� � trace_seq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TRACE_SEQ_H #define _LINUX_TRACE_SEQ_H #include <linux/seq_buf.h> #include <asm/page.h> /* * Trace sequences are used to allow a function to call several other functions * to create a string of data to use (up to a max of PAGE_SIZE). */ struct trace_seq { char buffer[PAGE_SIZE]; struct seq_buf seq; int full; }; static inline void trace_seq_init(struct trace_seq *s) { seq_buf_init(&s->seq, s->buffer, PAGE_SIZE); s->full = 0; } /** * trace_seq_used - amount of actual data written to buffer * @s: trace sequence descriptor * * Returns the amount of data written to the buffer. * * IMPORTANT! * * Use this instead of @s->seq.len if you need to pass the amount * of data from the buffer to another buffer (userspace, or what not). * The @s->seq.len on overflow is bigger than the buffer size and * using it can cause access to undefined memory. */ static inline int trace_seq_used(struct trace_seq *s) { return seq_buf_used(&s->seq); } /** * trace_seq_buffer_ptr - return pointer to next location in buffer * @s: trace sequence descriptor * * Returns the pointer to the buffer where the next write to * the buffer will happen. This is useful to save the location * that is about to be written to and then return the result * of that write. */ static inline char * trace_seq_buffer_ptr(struct trace_seq *s) { return s->buffer + seq_buf_used(&s->seq); } /** * trace_seq_has_overflowed - return true if the trace_seq took too much * @s: trace sequence descriptor * * Returns true if too much data was added to the trace_seq and it is * now full and will not take anymore. */ static inline bool trace_seq_has_overflowed(struct trace_seq *s) { return s->full || seq_buf_has_overflowed(&s->seq); } /* * Currently only defined when tracing is enabled. */ #ifdef CONFIG_TRACING extern __printf(2, 3) void trace_seq_printf(struct trace_seq *s, const char *fmt, ...); extern __printf(2, 0) void trace_seq_vprintf(struct trace_seq *s, const char *fmt, va_list args); extern __printf(2, 0) void trace_seq_bprintf(struct trace_seq *s, const char *fmt, const u32 *binary); extern int trace_print_seq(struct seq_file *m, struct trace_seq *s); extern int trace_seq_to_user(struct trace_seq *s, char __user *ubuf, int cnt); extern void trace_seq_puts(struct trace_seq *s, const char *str); extern void trace_seq_putc(struct trace_seq *s, unsigned char c); extern void trace_seq_putmem(struct trace_seq *s, const void *mem, unsigned int len); extern void trace_seq_putmem_hex(struct trace_seq *s, const void *mem, unsigned int len); extern int trace_seq_path(struct trace_seq *s, const struct path *path); extern void trace_seq_bitmask(struct trace_seq *s, const unsigned long *maskp, int nmaskbits); extern int trace_seq_hex_dump(struct trace_seq *s, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii); #else /* CONFIG_TRACING */ static inline void trace_seq_printf(struct trace_seq *s, const char *fmt, ...) { } static inline __printf(2, 0) void trace_seq_bprintf(struct trace_seq *s, const char *fmt, const u32 *binary) { } static inline void trace_seq_bitmask(struct trace_seq *s, const unsigned long *maskp, int nmaskbits) { } static inline int trace_print_seq(struct seq_file *m, struct trace_seq *s) { return 0; } static inline int trace_seq_to_user(struct trace_seq *s, char __user *ubuf, int cnt) { return 0; } static inline void trace_seq_puts(struct trace_seq *s, const char *str) { } static inline void trace_seq_putc(struct trace_seq *s, unsigned char c) { } static inline void trace_seq_putmem(struct trace_seq *s, const void *mem, unsigned int len) { } static inline void trace_seq_putmem_hex(struct trace_seq *s, const void *mem, unsigned int len) { } static inline int trace_seq_path(struct trace_seq *s, const struct path *path) { return 0; } #endif /* CONFIG_TRACING */ #endif /* _LINUX_TRACE_SEQ_H */ PK ! �UF�2 �2 mdio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/mdio.h: definitions for MDIO (clause 45) transceivers * Copyright 2006-2009 Solarflare Communications Inc. */ #ifndef __LINUX_MDIO_H__ #define __LINUX_MDIO_H__ #include <uapi/linux/mdio.h> #include <linux/bitfield.h> #include <linux/mod_devicetable.h> /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit * IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ #define MII_ADDR_C45 (1<<30) #define MII_DEVADDR_C45_SHIFT 16 #define MII_DEVADDR_C45_MASK GENMASK(20, 16) #define MII_REGADDR_C45_MASK GENMASK(15, 0) struct gpio_desc; struct mii_bus; struct reset_control; /* Multiple levels of nesting are possible. However typically this is * limited to nested DSA like layer, a MUX layer, and the normal * user. Instead of trying to handle the general case, just define * these cases. */ enum mdio_mutex_lock_class { MDIO_MUTEX_NORMAL, MDIO_MUTEX_MUX, MDIO_MUTEX_NESTED, }; struct mdio_device { struct device dev; struct mii_bus *bus; char modalias[MDIO_NAME_SIZE]; int (*bus_match)(struct device *dev, struct device_driver *drv); void (*device_free)(struct mdio_device *mdiodev); void (*device_remove)(struct mdio_device *mdiodev); /* Bus address of the MDIO device (0-31) */ int addr; int flags; struct gpio_desc *reset_gpio; struct reset_control *reset_ctrl; unsigned int reset_assert_delay; unsigned int reset_deassert_delay; }; static inline struct mdio_device *to_mdio_device(const struct device *dev) { return container_of(dev, struct mdio_device, dev); } /* struct mdio_driver_common: Common to all MDIO drivers */ struct mdio_driver_common { struct device_driver driver; int flags; }; #define MDIO_DEVICE_FLAG_PHY 1 static inline struct mdio_driver_common * to_mdio_common_driver(const struct device_driver *driver) { return container_of(driver, struct mdio_driver_common, driver); } /* struct mdio_driver: Generic MDIO driver */ struct mdio_driver { struct mdio_driver_common mdiodrv; /* * Called during discovery. Used to set * up device-specific structures, if any */ int (*probe)(struct mdio_device *mdiodev); /* Clears up any memory if needed */ void (*remove)(struct mdio_device *mdiodev); /* Quiesces the device on system shutdown, turns off interrupts etc */ void (*shutdown)(struct mdio_device *mdiodev); }; static inline struct mdio_driver * to_mdio_driver(const struct device_driver *driver) { return container_of(to_mdio_common_driver(driver), struct mdio_driver, mdiodrv); } /* device driver data */ static inline void mdiodev_set_drvdata(struct mdio_device *mdio, void *data) { dev_set_drvdata(&mdio->dev, data); } static inline void *mdiodev_get_drvdata(struct mdio_device *mdio) { return dev_get_drvdata(&mdio->dev); } void mdio_device_free(struct mdio_device *mdiodev); struct mdio_device *mdio_device_create(struct mii_bus *bus, int addr); int mdio_device_register(struct mdio_device *mdiodev); void mdio_device_remove(struct mdio_device *mdiodev); void mdio_device_reset(struct mdio_device *mdiodev, int value); int mdio_driver_register(struct mdio_driver *drv); void mdio_driver_unregister(struct mdio_driver *drv); int mdio_device_bus_match(struct device *dev, struct device_driver *drv); static inline bool mdio_phy_id_is_c45(int phy_id) { return (phy_id & MDIO_PHY_ID_C45) && !(phy_id & ~MDIO_PHY_ID_C45_MASK); } static inline __u16 mdio_phy_id_prtad(int phy_id) { return (phy_id & MDIO_PHY_ID_PRTAD) >> 5; } static inline __u16 mdio_phy_id_devad(int phy_id) { return phy_id & MDIO_PHY_ID_DEVAD; } /** * struct mdio_if_info - Ethernet controller MDIO interface * @prtad: PRTAD of the PHY (%MDIO_PRTAD_NONE if not present/unknown) * @mmds: Mask of MMDs expected to be present in the PHY. This must be * non-zero unless @prtad = %MDIO_PRTAD_NONE. * @mode_support: MDIO modes supported. If %MDIO_SUPPORTS_C22 is set then * MII register access will be passed through with @devad = * %MDIO_DEVAD_NONE. If %MDIO_EMULATE_C22 is set then access to * commonly used clause 22 registers will be translated into * clause 45 registers. * @dev: Net device structure * @mdio_read: Register read function; returns value or negative error code * @mdio_write: Register write function; returns 0 or negative error code */ struct mdio_if_info { int prtad; u32 mmds; unsigned mode_support; struct net_device *dev; int (*mdio_read)(struct net_device *dev, int prtad, int devad, u16 addr); int (*mdio_write)(struct net_device *dev, int prtad, int devad, u16 addr, u16 val); }; #define MDIO_PRTAD_NONE (-1) #define MDIO_DEVAD_NONE (-1) #define MDIO_SUPPORTS_C22 1 #define MDIO_SUPPORTS_C45 2 #define MDIO_EMULATE_C22 4 struct ethtool_cmd; struct ethtool_pauseparam; extern int mdio45_probe(struct mdio_if_info *mdio, int prtad); extern int mdio_set_flag(const struct mdio_if_info *mdio, int prtad, int devad, u16 addr, int mask, bool sense); extern int mdio45_links_ok(const struct mdio_if_info *mdio, u32 mmds); extern int mdio45_nway_restart(const struct mdio_if_info *mdio); extern void mdio45_ethtool_gset_npage(const struct mdio_if_info *mdio, struct ethtool_cmd *ecmd, u32 npage_adv, u32 npage_lpa); extern void mdio45_ethtool_ksettings_get_npage(const struct mdio_if_info *mdio, struct ethtool_link_ksettings *cmd, u32 npage_adv, u32 npage_lpa); /** * mdio45_ethtool_gset - get settings for ETHTOOL_GSET * @mdio: MDIO interface * @ecmd: Ethtool request structure * * Since the CSRs for auto-negotiation using next pages are not fully * standardised, this function does not attempt to decode them. Use * mdio45_ethtool_gset_npage() to specify advertisement bits from next * pages. */ static inline void mdio45_ethtool_gset(const struct mdio_if_info *mdio, struct ethtool_cmd *ecmd) { mdio45_ethtool_gset_npage(mdio, ecmd, 0, 0); } /** * mdio45_ethtool_ksettings_get - get settings for ETHTOOL_GLINKSETTINGS * @mdio: MDIO interface * @cmd: Ethtool request structure * * Since the CSRs for auto-negotiation using next pages are not fully * standardised, this function does not attempt to decode them. Use * mdio45_ethtool_ksettings_get_npage() to specify advertisement bits * from next pages. */ static inline void mdio45_ethtool_ksettings_get(const struct mdio_if_info *mdio, struct ethtool_link_ksettings *cmd) { mdio45_ethtool_ksettings_get_npage(mdio, cmd, 0, 0); } extern int mdio_mii_ioctl(const struct mdio_if_info *mdio, struct mii_ioctl_data *mii_data, int cmd); /** * mmd_eee_cap_to_ethtool_sup_t * @eee_cap: value of the MMD EEE Capability register * * A small helper function that translates MMD EEE Capability (3.20) bits * to ethtool supported settings. */ static inline u32 mmd_eee_cap_to_ethtool_sup_t(u16 eee_cap) { u32 supported = 0; if (eee_cap & MDIO_EEE_100TX) supported |= SUPPORTED_100baseT_Full; if (eee_cap & MDIO_EEE_1000T) supported |= SUPPORTED_1000baseT_Full; if (eee_cap & MDIO_EEE_10GT) supported |= SUPPORTED_10000baseT_Full; if (eee_cap & MDIO_EEE_1000KX) supported |= SUPPORTED_1000baseKX_Full; if (eee_cap & MDIO_EEE_10GKX4) supported |= SUPPORTED_10000baseKX4_Full; if (eee_cap & MDIO_EEE_10GKR) supported |= SUPPORTED_10000baseKR_Full; return supported; } /** * mmd_eee_adv_to_ethtool_adv_t * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers * * A small helper function that translates the MMD EEE Advertisment (7.60) * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement * settings. */ static inline u32 mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv) { u32 adv = 0; if (eee_adv & MDIO_EEE_100TX) adv |= ADVERTISED_100baseT_Full; if (eee_adv & MDIO_EEE_1000T) adv |= ADVERTISED_1000baseT_Full; if (eee_adv & MDIO_EEE_10GT) adv |= ADVERTISED_10000baseT_Full; if (eee_adv & MDIO_EEE_1000KX) adv |= ADVERTISED_1000baseKX_Full; if (eee_adv & MDIO_EEE_10GKX4) adv |= ADVERTISED_10000baseKX4_Full; if (eee_adv & MDIO_EEE_10GKR) adv |= ADVERTISED_10000baseKR_Full; return adv; } /** * ethtool_adv_to_mmd_eee_adv_t * @adv: the ethtool advertisement settings * * A small helper function that translates ethtool advertisement settings * to EEE advertisements for the MMD EEE Advertisement (7.60) and * MMD EEE Link Partner Ability (7.61) registers. */ static inline u16 ethtool_adv_to_mmd_eee_adv_t(u32 adv) { u16 reg = 0; if (adv & ADVERTISED_100baseT_Full) reg |= MDIO_EEE_100TX; if (adv & ADVERTISED_1000baseT_Full) reg |= MDIO_EEE_1000T; if (adv & ADVERTISED_10000baseT_Full) reg |= MDIO_EEE_10GT; if (adv & ADVERTISED_1000baseKX_Full) reg |= MDIO_EEE_1000KX; if (adv & ADVERTISED_10000baseKX4_Full) reg |= MDIO_EEE_10GKX4; if (adv & ADVERTISED_10000baseKR_Full) reg |= MDIO_EEE_10GKR; return reg; } /** * linkmode_adv_to_mii_10gbt_adv_t * @advertising: the linkmode advertisement settings * * A small helper function that translates linkmode advertisement * settings to phy autonegotiation advertisements for the C45 * 10GBASE-T AN CONTROL (7.32) register. */ static inline u32 linkmode_adv_to_mii_10gbt_adv_t(unsigned long *advertising) { u32 result = 0; if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, advertising)) result |= MDIO_AN_10GBT_CTRL_ADV2_5G; if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, advertising)) result |= MDIO_AN_10GBT_CTRL_ADV5G; if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, advertising)) result |= MDIO_AN_10GBT_CTRL_ADV10G; return result; } /** * mii_10gbt_stat_mod_linkmode_lpa_t * @advertising: target the linkmode advertisement settings * @lpa: value of the C45 10GBASE-T AN STATUS register * * A small helper function that translates C45 10GBASE-T AN STATUS register bits * to linkmode advertisement settings. Other bits in advertising aren't changed. */ static inline void mii_10gbt_stat_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) { linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, advertising, lpa & MDIO_AN_10GBT_STAT_LP2_5G); linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, advertising, lpa & MDIO_AN_10GBT_STAT_LP5G); linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, advertising, lpa & MDIO_AN_10GBT_STAT_LP10G); } int __mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); int __mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); int __mdiobus_modify_changed(struct mii_bus *bus, int addr, u32 regnum, u16 mask, u16 set); int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); int mdiobus_read_nested(struct mii_bus *bus, int addr, u32 regnum); int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); int mdiobus_write_nested(struct mii_bus *bus, int addr, u32 regnum, u16 val); int mdiobus_modify(struct mii_bus *bus, int addr, u32 regnum, u16 mask, u16 set); static inline u32 mdiobus_c45_addr(int devad, u16 regnum) { return MII_ADDR_C45 | devad << MII_DEVADDR_C45_SHIFT | regnum; } static inline u16 mdiobus_c45_regad(u32 regnum) { return FIELD_GET(MII_REGADDR_C45_MASK, regnum); } static inline u16 mdiobus_c45_devad(u32 regnum) { return FIELD_GET(MII_DEVADDR_C45_MASK, regnum); } static inline int __mdiobus_c45_read(struct mii_bus *bus, int prtad, int devad, u16 regnum) { return __mdiobus_read(bus, prtad, mdiobus_c45_addr(devad, regnum)); } static inline int __mdiobus_c45_write(struct mii_bus *bus, int prtad, int devad, u16 regnum, u16 val) { return __mdiobus_write(bus, prtad, mdiobus_c45_addr(devad, regnum), val); } static inline int mdiobus_c45_read(struct mii_bus *bus, int prtad, int devad, u16 regnum) { return mdiobus_read(bus, prtad, mdiobus_c45_addr(devad, regnum)); } static inline int mdiobus_c45_write(struct mii_bus *bus, int prtad, int devad, u16 regnum, u16 val) { return mdiobus_write(bus, prtad, mdiobus_c45_addr(devad, regnum), val); } int mdiobus_register_device(struct mdio_device *mdiodev); int mdiobus_unregister_device(struct mdio_device *mdiodev); bool mdiobus_is_registered_device(struct mii_bus *bus, int addr); struct phy_device *mdiobus_get_phy(struct mii_bus *bus, int addr); /** * mdio_module_driver() - Helper macro for registering mdio drivers * @_mdio_driver: driver to register * * Helper macro for MDIO drivers which do not do anything special in module * init/exit. Each module may only use this macro once, and calling it * replaces module_init() and module_exit(). */ #define mdio_module_driver(_mdio_driver) \ static int __init mdio_module_init(void) \ { \ return mdio_driver_register(&_mdio_driver); \ } \ module_init(mdio_module_init); \ static void __exit mdio_module_exit(void) \ { \ mdio_driver_unregister(&_mdio_driver); \ } \ module_exit(mdio_module_exit) #endif /* __LINUX_MDIO_H__ */ PK ! 6��1 1 efs_vh.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * efs_vh.h * * Copyright (c) 1999 Al Smith * * Portions derived from IRIX header files (c) 1985 MIPS Computer Systems, Inc. */ #ifndef __EFS_VH_H__ #define __EFS_VH_H__ #define VHMAGIC 0xbe5a941 /* volume header magic number */ #define NPARTAB 16 /* 16 unix partitions */ #define NVDIR 15 /* max of 15 directory entries */ #define BFNAMESIZE 16 /* max 16 chars in boot file name */ #define VDNAMESIZE 8 struct volume_directory { char vd_name[VDNAMESIZE]; /* name */ __be32 vd_lbn; /* logical block number */ __be32 vd_nbytes; /* file length in bytes */ }; struct partition_table { /* one per logical partition */ __be32 pt_nblks; /* # of logical blks in partition */ __be32 pt_firstlbn; /* first lbn of partition */ __be32 pt_type; /* use of partition */ }; struct volume_header { __be32 vh_magic; /* identifies volume header */ __be16 vh_rootpt; /* root partition number */ __be16 vh_swappt; /* swap partition number */ char vh_bootfile[BFNAMESIZE]; /* name of file to boot */ char pad[48]; /* device param space */ struct volume_directory vh_vd[NVDIR]; /* other vol hdr contents */ struct partition_table vh_pt[NPARTAB]; /* device partition layout */ __be32 vh_csum; /* volume header checksum */ __be32 vh_fill; /* fill out to 512 bytes */ }; /* partition type sysv is used for EFS format CD-ROM partitions */ #define SGI_SYSV 0x05 #define SGI_EFS 0x07 #define IS_EFS(x) (((x) == SGI_EFS) || ((x) == SGI_SYSV)) struct pt_types { int pt_type; char *pt_name; }; #endif /* __EFS_VH_H__ */ PK ! YF�o= o= msi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_MSI_H #define LINUX_MSI_H #include <linux/kobject.h> #include <linux/list.h> #include <asm/msi.h> /* Dummy shadow structures if an architecture does not define them */ #ifndef arch_msi_msg_addr_lo typedef struct arch_msi_msg_addr_lo { u32 address_lo; } __attribute__ ((packed)) arch_msi_msg_addr_lo_t; #endif #ifndef arch_msi_msg_addr_hi typedef struct arch_msi_msg_addr_hi { u32 address_hi; } __attribute__ ((packed)) arch_msi_msg_addr_hi_t; #endif #ifndef arch_msi_msg_data typedef struct arch_msi_msg_data { u32 data; } __attribute__ ((packed)) arch_msi_msg_data_t; #endif /** * msi_msg - Representation of a MSI message * @address_lo: Low 32 bits of msi message address * @arch_addrlo: Architecture specific shadow of @address_lo * @address_hi: High 32 bits of msi message address * (only used when device supports it) * @arch_addrhi: Architecture specific shadow of @address_hi * @data: MSI message data (usually 16 bits) * @arch_data: Architecture specific shadow of @data */ struct msi_msg { union { u32 address_lo; arch_msi_msg_addr_lo_t arch_addr_lo; }; union { u32 address_hi; arch_msi_msg_addr_hi_t arch_addr_hi; }; union { u32 data; arch_msi_msg_data_t arch_data; }; }; extern int pci_msi_ignore_mask; /* Helper functions */ struct irq_data; struct msi_desc; struct pci_dev; struct platform_msi_priv_data; void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); #ifdef CONFIG_GENERIC_MSI_IRQ void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); #else static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { } #endif typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc, struct msi_msg *msg); /** * platform_msi_desc - Platform device specific msi descriptor data * @msi_priv_data: Pointer to platform private data * @msi_index: The index of the MSI descriptor for multi MSI */ struct platform_msi_desc { struct platform_msi_priv_data *msi_priv_data; u16 msi_index; }; /** * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data * @msi_index: The index of the MSI descriptor */ struct fsl_mc_msi_desc { u16 msi_index; }; /** * ti_sci_inta_msi_desc - TISCI based INTA specific msi descriptor data * @dev_index: TISCI device index */ struct ti_sci_inta_msi_desc { u16 dev_index; }; /** * struct msi_desc - Descriptor structure for MSI based interrupts * @list: List head for management * @irq: The base interrupt number * @nvec_used: The number of vectors used * @dev: Pointer to the device which uses this descriptor * @msg: The last set MSI message cached for reuse * @affinity: Optional pointer to a cpu affinity mask for this descriptor * * @write_msi_msg: Callback that may be called when the MSI message * address or data changes * @write_msi_msg_data: Data parameter for the callback. * * @msi_mask: [PCI MSI] MSI cached mask bits * @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits * @is_msix: [PCI MSI/X] True if MSI-X * @multiple: [PCI MSI/X] log2 num of messages allocated * @multi_cap: [PCI MSI/X] log2 num of messages supported * @maskbit: [PCI MSI/X] Mask-Pending bit supported? * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq * @mask_pos: [PCI MSI] Mask register position * @mask_base: [PCI MSI-X] Mask register base address * @platform: [platform] Platform device specific msi descriptor data * @fsl_mc: [fsl-mc] FSL MC device specific msi descriptor data * @inta: [INTA] TISCI based INTA specific msi descriptor data */ struct msi_desc { /* Shared device/bus type independent data */ struct list_head list; unsigned int irq; unsigned int nvec_used; struct device *dev; struct msi_msg msg; struct irq_affinity_desc *affinity; #ifdef CONFIG_IRQ_MSI_IOMMU const void *iommu_cookie; #endif void (*write_msi_msg)(struct msi_desc *entry, void *data); void *write_msi_msg_data; union { /* PCI MSI/X specific data */ struct { union { u32 msi_mask; u32 msix_ctrl; }; struct { u8 is_msix : 1; u8 multiple : 3; u8 multi_cap : 3; u8 can_mask : 1; u8 is_64 : 1; u8 is_virtual : 1; u16 entry_nr; unsigned default_irq; } msi_attrib; union { u8 mask_pos; void __iomem *mask_base; }; }; /* * Non PCI variants add their data structure here. New * entries need to use a named structure. We want * proper name spaces for this. The PCI part is * anonymous for now as it would require an immediate * tree wide cleanup. */ struct platform_msi_desc platform; struct fsl_mc_msi_desc fsl_mc; struct ti_sci_inta_msi_desc inta; }; }; /* Helpers to hide struct msi_desc implementation details */ #define msi_desc_to_dev(desc) ((desc)->dev) #define dev_to_msi_list(dev) (&(dev)->msi_list) #define first_msi_entry(dev) \ list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list) #define for_each_msi_entry(desc, dev) \ list_for_each_entry((desc), dev_to_msi_list((dev)), list) #define for_each_msi_entry_safe(desc, tmp, dev) \ list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list) #define for_each_msi_vector(desc, __irq, dev) \ for_each_msi_entry((desc), (dev)) \ if ((desc)->irq) \ for (__irq = (desc)->irq; \ __irq < ((desc)->irq + (desc)->nvec_used); \ __irq++) #ifdef CONFIG_IRQ_MSI_IOMMU static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) { return desc->iommu_cookie; } static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, const void *iommu_cookie) { desc->iommu_cookie = iommu_cookie; } #else static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) { return NULL; } static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, const void *iommu_cookie) { } #endif #ifdef CONFIG_PCI_MSI #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) #define for_each_pci_msi_entry(desc, pdev) \ for_each_msi_entry((desc), &(pdev)->dev) struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc); void *msi_desc_to_pci_sysdata(struct msi_desc *desc); void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); #else /* CONFIG_PCI_MSI */ static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc) { return NULL; } static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) { } #endif /* CONFIG_PCI_MSI */ struct msi_desc *alloc_msi_entry(struct device *dev, int nvec, const struct irq_affinity_desc *affinity); void free_msi_entry(struct msi_desc *entry); void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); void pci_msi_mask_irq(struct irq_data *data); void pci_msi_unmask_irq(struct irq_data *data); const struct attribute_group **msi_populate_sysfs(struct device *dev); void msi_destroy_sysfs(struct device *dev, const struct attribute_group **msi_irq_groups); /* * The arch hooks to setup up msi irqs. Default functions are implemented * as weak symbols so that they /can/ be overriden by architecture specific * code if needed. These hooks can only be enabled by the architecture. * * If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by * stubs with warnings. */ #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); void arch_teardown_msi_irq(unsigned int irq); int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); void arch_teardown_msi_irqs(struct pci_dev *dev); #else static inline int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { WARN_ON_ONCE(1); return -ENODEV; } static inline void arch_teardown_msi_irqs(struct pci_dev *dev) { WARN_ON_ONCE(1); } #endif /* * The restore hooks are still available as they are useful even * for fully irq domain based setups. Courtesy to XEN/X86. */ void arch_restore_msi_irqs(struct pci_dev *dev); void default_restore_msi_irqs(struct pci_dev *dev); #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #include <linux/irqhandler.h> struct irq_domain; struct irq_domain_ops; struct irq_chip; struct device_node; struct fwnode_handle; struct msi_domain_info; /** * struct msi_domain_ops - MSI interrupt domain callbacks * @get_hwirq: Retrieve the resulting hw irq number * @msi_init: Domain specific init function for MSI interrupts * @msi_free: Domain specific function to free a MSI interrupts * @msi_check: Callback for verification of the domain/info/dev data * @msi_prepare: Prepare the allocation of the interrupts in the domain * @msi_finish: Optional callback to finalize the allocation * @set_desc: Set the msi descriptor for an interrupt * @handle_error: Optional error handler if the allocation fails * @domain_alloc_irqs: Optional function to override the default allocation * function. * @domain_free_irqs: Optional function to override the default free * function. * * @get_hwirq, @msi_init and @msi_free are callbacks used by * msi_create_irq_domain() and related interfaces * * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error * are callbacks used by msi_domain_alloc_irqs() and related * interfaces which are based on msi_desc. * * @domain_alloc_irqs, @domain_free_irqs can be used to override the * default allocation/free functions (__msi_domain_alloc/free_irqs). This * is initially for a wrapper around XENs seperate MSI universe which can't * be wrapped into the regular irq domains concepts by mere mortals. This * allows to universally use msi_domain_alloc/free_irqs without having to * special case XEN all over the place. * * Contrary to other operations @domain_alloc_irqs and @domain_free_irqs * are set to the default implementation if NULL and even when * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and * because these callbacks are obviously mandatory. * * This is NOT meant to be abused, but it can be useful to build wrappers * for specialized MSI irq domains which need extra work before and after * calling __msi_domain_alloc_irqs()/__msi_domain_free_irqs(). */ struct msi_domain_ops { irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, msi_alloc_info_t *arg); int (*msi_init)(struct irq_domain *domain, struct msi_domain_info *info, unsigned int virq, irq_hw_number_t hwirq, msi_alloc_info_t *arg); void (*msi_free)(struct irq_domain *domain, struct msi_domain_info *info, unsigned int virq); int (*msi_check)(struct irq_domain *domain, struct msi_domain_info *info, struct device *dev); int (*msi_prepare)(struct irq_domain *domain, struct device *dev, int nvec, msi_alloc_info_t *arg); void (*msi_finish)(msi_alloc_info_t *arg, int retval); void (*set_desc)(msi_alloc_info_t *arg, struct msi_desc *desc); int (*handle_error)(struct irq_domain *domain, struct msi_desc *desc, int error); int (*domain_alloc_irqs)(struct irq_domain *domain, struct device *dev, int nvec); void (*domain_free_irqs)(struct irq_domain *domain, struct device *dev); }; /** * struct msi_domain_info - MSI interrupt domain data * @flags: Flags to decribe features and capabilities * @ops: The callback data structure * @chip: Optional: associated interrupt chip * @chip_data: Optional: associated interrupt chip data * @handler: Optional: associated interrupt flow handler * @handler_data: Optional: associated interrupt flow handler data * @handler_name: Optional: associated interrupt flow handler name * @data: Optional: domain specific data */ struct msi_domain_info { u32 flags; struct msi_domain_ops *ops; struct irq_chip *chip; void *chip_data; irq_flow_handler_t handler; void *handler_data; const char *handler_name; void *data; }; /* Flags for msi_domain_info */ enum { /* * Init non implemented ops callbacks with default MSI domain * callbacks. */ MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0), /* * Init non implemented chip callbacks with default MSI chip * callbacks. */ MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1), /* Support multiple PCI MSI interrupts */ MSI_FLAG_MULTI_PCI_MSI = (1 << 2), /* Support PCI MSIX interrupts */ MSI_FLAG_PCI_MSIX = (1 << 3), /* Needs early activate, required for PCI */ MSI_FLAG_ACTIVATE_EARLY = (1 << 4), /* * Must reactivate when irq is started even when * MSI_FLAG_ACTIVATE_EARLY has been set. */ MSI_FLAG_MUST_REACTIVATE = (1 << 5), /* Is level-triggered capable, using two messages */ MSI_FLAG_LEVEL_CAPABLE = (1 << 6), }; int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force); struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec, irq_write_msi_msg_t write_msi_msg); void platform_msi_domain_free_irqs(struct device *dev); /* When an MSI domain is used as an intermediate domain */ int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev, int nvec, msi_alloc_info_t *args); int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev, int virq, int nvec, msi_alloc_info_t *args); struct irq_domain * __platform_msi_create_device_domain(struct device *dev, unsigned int nvec, bool is_tree, irq_write_msi_msg_t write_msi_msg, const struct irq_domain_ops *ops, void *host_data); #define platform_msi_create_device_domain(dev, nvec, write, ops, data) \ __platform_msi_create_device_domain(dev, nvec, false, write, ops, data) #define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \ __platform_msi_create_device_domain(dev, nvec, true, write, ops, data) int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs); void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq, unsigned int nvec); void *platform_msi_get_host_data(struct irq_domain *domain); #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg); struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); int pci_msi_domain_check_cap(struct irq_domain *domain, struct msi_domain_info *info, struct device *dev); u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev); struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev); bool pci_dev_has_special_msi_domain(struct pci_dev *pdev); #else static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev) { return NULL; } #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */ #endif /* LINUX_MSI_H */ PK ! �I� � ata_platform.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_ATA_PLATFORM_H #define __LINUX_ATA_PLATFORM_H struct pata_platform_info { /* * I/O port shift, for platforms with ports that are * constantly spaced and need larger than the 1-byte * spacing used by ata_std_ports(). */ unsigned int ioport_shift; }; struct scsi_host_template; extern int __pata_platform_probe(struct device *dev, struct resource *io_res, struct resource *ctl_res, struct resource *irq_res, unsigned int ioport_shift, int __pio_mask, struct scsi_host_template *sht, bool use16bit); /* * Marvell SATA private data */ struct mv_sata_platform_data { int n_ports; /* number of sata ports */ }; #endif /* __LINUX_ATA_PLATFORM_H */ PK ! �s�M M fwnode.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * fwnode.h - Firmware device node object handle type definition. * * Copyright (C) 2015, Intel Corporation * Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com> */ #ifndef _LINUX_FWNODE_H_ #define _LINUX_FWNODE_H_ #include <linux/types.h> #include <linux/list.h> #include <linux/err.h> struct fwnode_operations; struct device; /* * fwnode link flags * * LINKS_ADDED: The fwnode has already be parsed to add fwnode links. * NOT_DEVICE: The fwnode will never be populated as a struct device. * INITIALIZED: The hardware corresponding to fwnode has been initialized. * NEEDS_CHILD_BOUND_ON_ADD: For this fwnode/device to probe successfully, its * driver needs its child devices to be bound with * their respective drivers as soon as they are * added. */ #define FWNODE_FLAG_LINKS_ADDED BIT(0) #define FWNODE_FLAG_NOT_DEVICE BIT(1) #define FWNODE_FLAG_INITIALIZED BIT(2) #define FWNODE_FLAG_NEEDS_CHILD_BOUND_ON_ADD BIT(3) struct fwnode_handle { struct fwnode_handle *secondary; const struct fwnode_operations *ops; struct device *dev; struct list_head suppliers; struct list_head consumers; u8 flags; }; struct fwnode_link { struct fwnode_handle *supplier; struct list_head s_hook; struct fwnode_handle *consumer; struct list_head c_hook; }; /** * struct fwnode_endpoint - Fwnode graph endpoint * @port: Port number * @id: Endpoint id * @local_fwnode: reference to the related fwnode */ struct fwnode_endpoint { unsigned int port; unsigned int id; const struct fwnode_handle *local_fwnode; }; /* * ports and endpoints defined as software_nodes should all follow a common * naming scheme; use these macros to ensure commonality. */ #define SWNODE_GRAPH_PORT_NAME_FMT "port@%u" #define SWNODE_GRAPH_ENDPOINT_NAME_FMT "endpoint@%u" #define NR_FWNODE_REFERENCE_ARGS 16 /** * struct fwnode_reference_args - Fwnode reference with additional arguments * @fwnode:- A reference to the base fwnode * @nargs: Number of elements in @args array * @args: Integer arguments on the fwnode */ struct fwnode_reference_args { struct fwnode_handle *fwnode; unsigned int nargs; u64 args[NR_FWNODE_REFERENCE_ARGS]; }; /** * struct fwnode_operations - Operations for fwnode interface * @get: Get a reference to an fwnode. * @put: Put a reference to an fwnode. * @device_is_available: Return true if the device is available. * @device_get_match_data: Return the device driver match data. * @property_present: Return true if a property is present. * @property_read_int_array: Read an array of integer properties. Return zero on * success, a negative error code otherwise. * @property_read_string_array: Read an array of string properties. Return zero * on success, a negative error code otherwise. * @get_name: Return the name of an fwnode. * @get_name_prefix: Get a prefix for a node (for printing purposes). * @get_parent: Return the parent of an fwnode. * @get_next_child_node: Return the next child node in an iteration. * @get_named_child_node: Return a child node with a given name. * @get_reference_args: Return a reference pointed to by a property, with args * @graph_get_next_endpoint: Return an endpoint node in an iteration. * @graph_get_remote_endpoint: Return the remote endpoint node of a local * endpoint node. * @graph_get_port_parent: Return the parent node of a port node. * @graph_parse_endpoint: Parse endpoint for port and endpoint id. * @add_links: Create fwnode links to all the suppliers of the fwnode. Return * zero on success, a negative error code otherwise. */ struct fwnode_operations { struct fwnode_handle *(*get)(struct fwnode_handle *fwnode); void (*put)(struct fwnode_handle *fwnode); bool (*device_is_available)(const struct fwnode_handle *fwnode); const void *(*device_get_match_data)(const struct fwnode_handle *fwnode, const struct device *dev); bool (*property_present)(const struct fwnode_handle *fwnode, const char *propname); int (*property_read_int_array)(const struct fwnode_handle *fwnode, const char *propname, unsigned int elem_size, void *val, size_t nval); int (*property_read_string_array)(const struct fwnode_handle *fwnode_handle, const char *propname, const char **val, size_t nval); const char *(*get_name)(const struct fwnode_handle *fwnode); const char *(*get_name_prefix)(const struct fwnode_handle *fwnode); struct fwnode_handle *(*get_parent)(const struct fwnode_handle *fwnode); struct fwnode_handle * (*get_next_child_node)(const struct fwnode_handle *fwnode, struct fwnode_handle *child); struct fwnode_handle * (*get_named_child_node)(const struct fwnode_handle *fwnode, const char *name); int (*get_reference_args)(const struct fwnode_handle *fwnode, const char *prop, const char *nargs_prop, unsigned int nargs, unsigned int index, struct fwnode_reference_args *args); struct fwnode_handle * (*graph_get_next_endpoint)(const struct fwnode_handle *fwnode, struct fwnode_handle *prev); struct fwnode_handle * (*graph_get_remote_endpoint)(const struct fwnode_handle *fwnode); struct fwnode_handle * (*graph_get_port_parent)(struct fwnode_handle *fwnode); int (*graph_parse_endpoint)(const struct fwnode_handle *fwnode, struct fwnode_endpoint *endpoint); int (*add_links)(struct fwnode_handle *fwnode); }; #define fwnode_has_op(fwnode, op) \ (!IS_ERR_OR_NULL(fwnode) && (fwnode)->ops && (fwnode)->ops->op) #define fwnode_call_int_op(fwnode, op, ...) \ (fwnode_has_op(fwnode, op) ? \ (fwnode)->ops->op(fwnode, ## __VA_ARGS__) : (IS_ERR_OR_NULL(fwnode) ? -EINVAL : -ENXIO)) #define fwnode_call_bool_op(fwnode, op, ...) \ (fwnode_has_op(fwnode, op) ? \ (fwnode)->ops->op(fwnode, ## __VA_ARGS__) : false) #define fwnode_call_ptr_op(fwnode, op, ...) \ (fwnode_has_op(fwnode, op) ? \ (fwnode)->ops->op(fwnode, ## __VA_ARGS__) : NULL) #define fwnode_call_void_op(fwnode, op, ...) \ do { \ if (fwnode_has_op(fwnode, op)) \ (fwnode)->ops->op(fwnode, ## __VA_ARGS__); \ } while (false) #define get_dev_from_fwnode(fwnode) get_device((fwnode)->dev) static inline void fwnode_init(struct fwnode_handle *fwnode, const struct fwnode_operations *ops) { fwnode->ops = ops; INIT_LIST_HEAD(&fwnode->consumers); INIT_LIST_HEAD(&fwnode->suppliers); } static inline void fwnode_dev_initialized(struct fwnode_handle *fwnode, bool initialized) { if (IS_ERR_OR_NULL(fwnode)) return; if (initialized) fwnode->flags |= FWNODE_FLAG_INITIALIZED; else fwnode->flags &= ~FWNODE_FLAG_INITIALIZED; } extern u32 fw_devlink_get_flags(void); extern bool fw_devlink_is_strict(void); int fwnode_link_add(struct fwnode_handle *con, struct fwnode_handle *sup); void fwnode_links_purge(struct fwnode_handle *fwnode); void fw_devlink_purge_absent_suppliers(struct fwnode_handle *fwnode); #endif PK ! 3lƀ � dm-bufio.hnu �[��� /* * Copyright (C) 2009-2011 Red Hat, Inc. * * Author: Mikulas Patocka <mpatocka@redhat.com> * * This file is released under the GPL. */ #ifndef _LINUX_DM_BUFIO_H #define _LINUX_DM_BUFIO_H #include <linux/blkdev.h> #include <linux/types.h> /*----------------------------------------------------------------*/ struct dm_bufio_client; struct dm_buffer; /* * Create a buffered IO cache on a given device */ struct dm_bufio_client * dm_bufio_client_create(struct block_device *bdev, unsigned block_size, unsigned reserved_buffers, unsigned aux_size, void (*alloc_callback)(struct dm_buffer *), void (*write_callback)(struct dm_buffer *)); /* * Release a buffered IO cache. */ void dm_bufio_client_destroy(struct dm_bufio_client *c); /* * Set the sector range. * When this function is called, there must be no I/O in progress on the bufio * client. */ void dm_bufio_set_sector_offset(struct dm_bufio_client *c, sector_t start); /* * WARNING: to avoid deadlocks, these conditions are observed: * * - At most one thread can hold at most "reserved_buffers" simultaneously. * - Each other threads can hold at most one buffer. * - Threads which call only dm_bufio_get can hold unlimited number of * buffers. */ /* * Read a given block from disk. Returns pointer to data. Returns a * pointer to dm_buffer that can be used to release the buffer or to make * it dirty. */ void *dm_bufio_read(struct dm_bufio_client *c, sector_t block, struct dm_buffer **bp); /* * Like dm_bufio_read, but return buffer from cache, don't read * it. If the buffer is not in the cache, return NULL. */ void *dm_bufio_get(struct dm_bufio_client *c, sector_t block, struct dm_buffer **bp); /* * Like dm_bufio_read, but don't read anything from the disk. It is * expected that the caller initializes the buffer and marks it dirty. */ void *dm_bufio_new(struct dm_bufio_client *c, sector_t block, struct dm_buffer **bp); /* * Prefetch the specified blocks to the cache. * The function starts to read the blocks and returns without waiting for * I/O to finish. */ void dm_bufio_prefetch(struct dm_bufio_client *c, sector_t block, unsigned n_blocks); /* * Release a reference obtained with dm_bufio_{read,get,new}. The data * pointer and dm_buffer pointer is no longer valid after this call. */ void dm_bufio_release(struct dm_buffer *b); /* * Mark a buffer dirty. It should be called after the buffer is modified. * * In case of memory pressure, the buffer may be written after * dm_bufio_mark_buffer_dirty, but before dm_bufio_write_dirty_buffers. So * dm_bufio_write_dirty_buffers guarantees that the buffer is on-disk but * the actual writing may occur earlier. */ void dm_bufio_mark_buffer_dirty(struct dm_buffer *b); /* * Mark a part of the buffer dirty. * * The specified part of the buffer is scheduled to be written. dm-bufio may * write the specified part of the buffer or it may write a larger superset. */ void dm_bufio_mark_partial_buffer_dirty(struct dm_buffer *b, unsigned start, unsigned end); /* * Initiate writing of dirty buffers, without waiting for completion. */ void dm_bufio_write_dirty_buffers_async(struct dm_bufio_client *c); /* * Write all dirty buffers. Guarantees that all dirty buffers created prior * to this call are on disk when this call exits. */ int dm_bufio_write_dirty_buffers(struct dm_bufio_client *c); /* * Send an empty write barrier to the device to flush hardware disk cache. */ int dm_bufio_issue_flush(struct dm_bufio_client *c); /* * Send a discard request to the underlying device. */ int dm_bufio_issue_discard(struct dm_bufio_client *c, sector_t block, sector_t count); /* * Like dm_bufio_release but also move the buffer to the new * block. dm_bufio_write_dirty_buffers is needed to commit the new block. */ void dm_bufio_release_move(struct dm_buffer *b, sector_t new_block); /* * Free the given buffer. * This is just a hint, if the buffer is in use or dirty, this function * does nothing. */ void dm_bufio_forget(struct dm_bufio_client *c, sector_t block); /* * Free the given range of buffers. * This is just a hint, if the buffer is in use or dirty, this function * does nothing. */ void dm_bufio_forget_buffers(struct dm_bufio_client *c, sector_t block, sector_t n_blocks); /* * Set the minimum number of buffers before cleanup happens. */ void dm_bufio_set_minimum_buffers(struct dm_bufio_client *c, unsigned n); unsigned dm_bufio_get_block_size(struct dm_bufio_client *c); sector_t dm_bufio_get_device_size(struct dm_bufio_client *c); struct dm_io_client *dm_bufio_get_dm_io_client(struct dm_bufio_client *c); sector_t dm_bufio_get_block_number(struct dm_buffer *b); void *dm_bufio_get_block_data(struct dm_buffer *b); void *dm_bufio_get_aux_data(struct dm_buffer *b); struct dm_bufio_client *dm_bufio_get_client(struct dm_buffer *b); /*----------------------------------------------------------------*/ #endif PK ! ��Y6� � spinlock_types_raw.hnu �[��� #ifndef __LINUX_SPINLOCK_TYPES_RAW_H #define __LINUX_SPINLOCK_TYPES_RAW_H #include <linux/types.h> #if defined(CONFIG_SMP) # include <asm/spinlock_types.h> #else # include <linux/spinlock_types_up.h> #endif #include <linux/lockdep_types.h> typedef struct raw_spinlock { arch_spinlock_t raw_lock; #ifdef CONFIG_DEBUG_SPINLOCK unsigned int magic, owner_cpu; void *owner; #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif } raw_spinlock_t; #define SPINLOCK_MAGIC 0xdead4ead #define SPINLOCK_OWNER_INIT ((void *)-1L) #ifdef CONFIG_DEBUG_LOCK_ALLOC # define RAW_SPIN_DEP_MAP_INIT(lockname) \ .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_SPIN, \ } # define SPIN_DEP_MAP_INIT(lockname) \ .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_CONFIG, \ } # define LOCAL_SPIN_DEP_MAP_INIT(lockname) \ .dep_map = { \ .name = #lockname, \ .wait_type_inner = LD_WAIT_CONFIG, \ .lock_type = LD_LOCK_PERCPU, \ } #else # define RAW_SPIN_DEP_MAP_INIT(lockname) # define SPIN_DEP_MAP_INIT(lockname) # define LOCAL_SPIN_DEP_MAP_INIT(lockname) #endif #ifdef CONFIG_DEBUG_SPINLOCK # define SPIN_DEBUG_INIT(lockname) \ .magic = SPINLOCK_MAGIC, \ .owner_cpu = -1, \ .owner = SPINLOCK_OWNER_INIT, #else # define SPIN_DEBUG_INIT(lockname) #endif #define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ { \ .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ SPIN_DEBUG_INIT(lockname) \ RAW_SPIN_DEP_MAP_INIT(lockname) } #define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) #define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) #endif /* __LINUX_SPINLOCK_TYPES_RAW_H */ PK ! v���S S resource.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_RESOURCE_H #define _LINUX_RESOURCE_H #include <uapi/linux/resource.h> struct task_struct; void getrusage(struct task_struct *p, int who, struct rusage *ru); int do_prlimit(struct task_struct *tsk, unsigned int resource, struct rlimit *new_rlim, struct rlimit *old_rlim); #endif PK ! ޜ�b b a.out.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __A_OUT_GNU_H__ #define __A_OUT_GNU_H__ #include <uapi/linux/a.out.h> #ifndef __ASSEMBLY__ #ifdef linux #include <asm/page.h> #if defined(__i386__) || defined(__mc68000__) #else #ifndef SEGMENT_SIZE #define SEGMENT_SIZE PAGE_SIZE #endif #endif #endif #endif /*__ASSEMBLY__ */ #endif /* __A_OUT_GNU_H__ */ PK ! 2�q�u u mem_encrypt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * AMD Memory Encryption Support * * Copyright (C) 2016 Advanced Micro Devices, Inc. * * Author: Tom Lendacky <thomas.lendacky@amd.com> */ #ifndef __MEM_ENCRYPT_H__ #define __MEM_ENCRYPT_H__ #ifndef __ASSEMBLY__ #ifdef CONFIG_ARCH_HAS_MEM_ENCRYPT #include <asm/mem_encrypt.h> #else /* !CONFIG_ARCH_HAS_MEM_ENCRYPT */ static inline bool mem_encrypt_active(void) { return false; } #endif /* CONFIG_ARCH_HAS_MEM_ENCRYPT */ #ifdef CONFIG_AMD_MEM_ENCRYPT /* * The __sme_set() and __sme_clr() macros are useful for adding or removing * the encryption mask from a value (e.g. when dealing with pagetable * entries). */ #define __sme_set(x) ((x) | sme_me_mask) #define __sme_clr(x) ((x) & ~sme_me_mask) #else #define __sme_set(x) (x) #define __sme_clr(x) (x) #endif #endif /* __ASSEMBLY__ */ #endif /* __MEM_ENCRYPT_H__ */ PK ! �� � � pm-trace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef PM_TRACE_H #define PM_TRACE_H #include <linux/types.h> #ifdef CONFIG_PM_TRACE #include <asm/pm-trace.h> extern int pm_trace_enabled; extern bool pm_trace_rtc_abused; static inline bool pm_trace_rtc_valid(void) { return !pm_trace_rtc_abused; } static inline int pm_trace_is_enabled(void) { return pm_trace_enabled; } struct device; extern void set_trace_device(struct device *); extern void generate_pm_trace(const void *tracedata, unsigned int user); extern int show_trace_dev_match(char *buf, size_t size); #define TRACE_DEVICE(dev) do { \ if (pm_trace_enabled) \ set_trace_device(dev); \ } while(0) #else static inline bool pm_trace_rtc_valid(void) { return true; } static inline int pm_trace_is_enabled(void) { return 0; } #define TRACE_DEVICE(dev) do { } while (0) #define TRACE_RESUME(dev) do { } while (0) #define TRACE_SUSPEND(dev) do { } while (0) #endif #endif PK ! :� qnx6_fs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Name : qnx6_fs.h * Author : Kai Bankett * Function : qnx6 global filesystem definitions * History : 17-01-2012 created */ #ifndef _LINUX_QNX6_FS_H #define _LINUX_QNX6_FS_H #include <linux/types.h> #include <linux/magic.h> #define QNX6_ROOT_INO 1 /* for di_status */ #define QNX6_FILE_DIRECTORY 0x01 #define QNX6_FILE_DELETED 0x02 #define QNX6_FILE_NORMAL 0x03 #define QNX6_SUPERBLOCK_SIZE 0x200 /* superblock always is 512 bytes */ #define QNX6_SUPERBLOCK_AREA 0x1000 /* area reserved for superblock */ #define QNX6_BOOTBLOCK_SIZE 0x2000 /* heading bootblock area */ #define QNX6_DIR_ENTRY_SIZE 0x20 /* dir entry size of 32 bytes */ #define QNX6_INODE_SIZE 0x80 /* each inode is 128 bytes */ #define QNX6_INODE_SIZE_BITS 7 /* inode entry size shift */ #define QNX6_NO_DIRECT_POINTERS 16 /* 16 blockptrs in sbl/inode */ #define QNX6_PTR_MAX_LEVELS 5 /* maximum indirect levels */ /* for filenames */ #define QNX6_SHORT_NAME_MAX 27 #define QNX6_LONG_NAME_MAX 510 /* list of mount options */ #define QNX6_MOUNT_MMI_FS 0x010000 /* mount as Audi MMI 3G fs */ /* * This is the original qnx6 inode layout on disk. * Each inode is 128 byte long. */ struct qnx6_inode_entry { __fs64 di_size; __fs32 di_uid; __fs32 di_gid; __fs32 di_ftime; __fs32 di_mtime; __fs32 di_atime; __fs32 di_ctime; __fs16 di_mode; __fs16 di_ext_mode; __fs32 di_block_ptr[QNX6_NO_DIRECT_POINTERS]; __u8 di_filelevels; __u8 di_status; __u8 di_unknown2[2]; __fs32 di_zero2[6]; }; /* * Each directory entry is maximum 32 bytes long. * If more characters or special characters required it is stored * in the longfilenames structure. */ struct qnx6_dir_entry { __fs32 de_inode; __u8 de_size; char de_fname[QNX6_SHORT_NAME_MAX]; }; /* * Longfilename direntries have a different structure */ struct qnx6_long_dir_entry { __fs32 de_inode; __u8 de_size; __u8 de_unknown[3]; __fs32 de_long_inode; __fs32 de_checksum; }; struct qnx6_long_filename { __fs16 lf_size; __u8 lf_fname[QNX6_LONG_NAME_MAX]; }; struct qnx6_root_node { __fs64 size; __fs32 ptr[QNX6_NO_DIRECT_POINTERS]; __u8 levels; __u8 mode; __u8 spare[6]; }; struct qnx6_super_block { __fs32 sb_magic; __fs32 sb_checksum; __fs64 sb_serial; __fs32 sb_ctime; /* time the fs was created */ __fs32 sb_atime; /* last access time */ __fs32 sb_flags; __fs16 sb_version1; /* filesystem version information */ __fs16 sb_version2; /* filesystem version information */ __u8 sb_volumeid[16]; __fs32 sb_blocksize; __fs32 sb_num_inodes; __fs32 sb_free_inodes; __fs32 sb_num_blocks; __fs32 sb_free_blocks; __fs32 sb_allocgroup; struct qnx6_root_node Inode; struct qnx6_root_node Bitmap; struct qnx6_root_node Longfile; struct qnx6_root_node Unknown; }; /* Audi MMI 3G superblock layout is different to plain qnx6 */ struct qnx6_mmi_super_block { __fs32 sb_magic; __fs32 sb_checksum; __fs64 sb_serial; __u8 sb_spare0[12]; __u8 sb_id[12]; __fs32 sb_blocksize; __fs32 sb_num_inodes; __fs32 sb_free_inodes; __fs32 sb_num_blocks; __fs32 sb_free_blocks; __u8 sb_spare1[4]; struct qnx6_root_node Inode; struct qnx6_root_node Bitmap; struct qnx6_root_node Longfile; struct qnx6_root_node Unknown; }; #endif PK ! fm@ @ isdn/capilli.hnu �[��� /* $Id: capilli.h,v 1.1.2.2 2004/01/16 21:09:27 keil Exp $ * * Kernel CAPI 2.0 Driver Interface for Linux * * Copyright 1999 by Carsten Paeth <calle@calle.de> * * This software may be used and distributed according to the terms * of the GNU General Public License, incorporated herein by reference. * */ #ifndef __CAPILLI_H__ #define __CAPILLI_H__ #include <linux/kernel.h> #include <linux/list.h> #include <linux/capi.h> #include <linux/kernelcapi.h> typedef struct capiloaddatapart { int user; /* data in userspace ? */ int len; unsigned char *data; } capiloaddatapart; typedef struct capiloaddata { capiloaddatapart firmware; capiloaddatapart configuration; } capiloaddata; typedef struct capicardparams { unsigned int port; unsigned irq; int cardtype; int cardnr; unsigned int membase; } capicardparams; struct capi_ctr { /* filled in before calling attach_capi_ctr */ struct module *owner; void *driverdata; /* driver specific */ char name[32]; /* name of controller */ char *driver_name; /* name of driver */ int (*load_firmware)(struct capi_ctr *, capiloaddata *); void (*reset_ctr)(struct capi_ctr *); void (*register_appl)(struct capi_ctr *, u16 appl, capi_register_params *); void (*release_appl)(struct capi_ctr *, u16 appl); u16 (*send_message)(struct capi_ctr *, struct sk_buff *skb); char *(*procinfo)(struct capi_ctr *); int (*proc_show)(struct seq_file *, void *); /* filled in before calling ready callback */ u8 manu[CAPI_MANUFACTURER_LEN]; /* CAPI_GET_MANUFACTURER */ capi_version version; /* CAPI_GET_VERSION */ capi_profile profile; /* CAPI_GET_PROFILE */ u8 serial[CAPI_SERIAL_LEN]; /* CAPI_GET_SERIAL */ /* management information for kcapi */ unsigned long nrecvctlpkt; unsigned long nrecvdatapkt; unsigned long nsentctlpkt; unsigned long nsentdatapkt; int cnr; /* controller number */ unsigned short state; /* controller state */ int blocked; /* output blocked */ int traceflag; /* capi trace */ struct proc_dir_entry *procent; char procfn[128]; }; int attach_capi_ctr(struct capi_ctr *); int detach_capi_ctr(struct capi_ctr *); void capi_ctr_ready(struct capi_ctr * card); void capi_ctr_down(struct capi_ctr * card); void capi_ctr_handle_message(struct capi_ctr * card, u16 appl, struct sk_buff *skb); // --------------------------------------------------------------------------- // needed for AVM capi drivers struct capi_driver { char name[32]; /* driver name */ char revision[32]; /* management information for kcapi */ struct list_head list; }; #endif /* __CAPILLI_H__ */ PK ! �[�� � isdn/capiutil.hnu �[��� /* $Id: capiutil.h,v 1.5.6.2 2001/09/23 22:24:33 kai Exp $ * * CAPI 2.0 defines & types * * From CAPI 2.0 Development Kit AVM 1995 (msg.c) * Rewritten for Linux 1996 by Carsten Paeth <calle@calle.de> * * This software may be used and distributed according to the terms * of the GNU General Public License, incorporated herein by reference. * */ #ifndef __CAPIUTIL_H__ #define __CAPIUTIL_H__ #include <asm/types.h> #define CAPIMSG_BASELEN 8 #define CAPIMSG_U8(m, off) (m[off]) #define CAPIMSG_U16(m, off) (m[off]|(m[(off)+1]<<8)) #define CAPIMSG_U32(m, off) (m[off]|(m[(off)+1]<<8)|(m[(off)+2]<<16)|(m[(off)+3]<<24)) #define CAPIMSG_LEN(m) CAPIMSG_U16(m,0) #define CAPIMSG_APPID(m) CAPIMSG_U16(m,2) #define CAPIMSG_COMMAND(m) CAPIMSG_U8(m,4) #define CAPIMSG_SUBCOMMAND(m) CAPIMSG_U8(m,5) #define CAPIMSG_CMD(m) (((m[4])<<8)|(m[5])) #define CAPIMSG_MSGID(m) CAPIMSG_U16(m,6) #define CAPIMSG_CONTROLLER(m) (m[8] & 0x7f) #define CAPIMSG_CONTROL(m) CAPIMSG_U32(m, 8) #define CAPIMSG_NCCI(m) CAPIMSG_CONTROL(m) #define CAPIMSG_DATALEN(m) CAPIMSG_U16(m,16) /* DATA_B3_REQ */ static inline void capimsg_setu8(void *m, int off, __u8 val) { ((__u8 *)m)[off] = val; } static inline void capimsg_setu16(void *m, int off, __u16 val) { ((__u8 *)m)[off] = val & 0xff; ((__u8 *)m)[off+1] = (val >> 8) & 0xff; } static inline void capimsg_setu32(void *m, int off, __u32 val) { ((__u8 *)m)[off] = val & 0xff; ((__u8 *)m)[off+1] = (val >> 8) & 0xff; ((__u8 *)m)[off+2] = (val >> 16) & 0xff; ((__u8 *)m)[off+3] = (val >> 24) & 0xff; } #define CAPIMSG_SETLEN(m, len) capimsg_setu16(m, 0, len) #define CAPIMSG_SETAPPID(m, applid) capimsg_setu16(m, 2, applid) #define CAPIMSG_SETCOMMAND(m,cmd) capimsg_setu8(m, 4, cmd) #define CAPIMSG_SETSUBCOMMAND(m, cmd) capimsg_setu8(m, 5, cmd) #define CAPIMSG_SETMSGID(m, msgid) capimsg_setu16(m, 6, msgid) #define CAPIMSG_SETCONTROL(m, contr) capimsg_setu32(m, 8, contr) #define CAPIMSG_SETDATALEN(m, len) capimsg_setu16(m, 16, len) #endif /* __CAPIUTIL_H__ */ PK ! ���d� � kasan-checks.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_KASAN_CHECKS_H #define _LINUX_KASAN_CHECKS_H #include <linux/types.h> /* * The annotations present in this file are only relevant for the software * KASAN modes that rely on compiler instrumentation, and will be optimized * away for the hardware tag-based KASAN mode. Use kasan_check_byte() instead. */ /* * __kasan_check_*: Always available when KASAN is enabled. This may be used * even in compilation units that selectively disable KASAN, but must use KASAN * to validate access to an address. Never use these in header files! */ #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS) bool __kasan_check_read(const volatile void *p, unsigned int size); bool __kasan_check_write(const volatile void *p, unsigned int size); #else static inline bool __kasan_check_read(const volatile void *p, unsigned int size) { return true; } static inline bool __kasan_check_write(const volatile void *p, unsigned int size) { return true; } #endif /* * kasan_check_*: Only available when the particular compilation unit has KASAN * instrumentation enabled. May be used in header files. */ #ifdef __SANITIZE_ADDRESS__ #define kasan_check_read __kasan_check_read #define kasan_check_write __kasan_check_write #else static inline bool kasan_check_read(const volatile void *p, unsigned int size) { return true; } static inline bool kasan_check_write(const volatile void *p, unsigned int size) { return true; } #endif #endif PK ! >��� � const.hnu �[��� #ifndef _LINUX_CONST_H #define _LINUX_CONST_H #include <vdso/const.h> /* * This returns a constant expression while determining if an argument is * a constant expression, most importantly without evaluating the argument. * Glory to Martin Uecker <Martin.Uecker@med.uni-goettingen.de> */ #define __is_constexpr(x) \ (sizeof(int) == sizeof(*(8 ? ((void *)((long)(x) * 0l)) : (int *)8))) #endif /* _LINUX_CONST_H */ PK ! hf}�F �F sysfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * sysfs.h - definitions for the device driver filesystem * * Copyright (c) 2001,2002 Patrick Mochel * Copyright (c) 2004 Silicon Graphics, Inc. * Copyright (c) 2007 SUSE Linux Products GmbH * Copyright (c) 2007 Tejun Heo <teheo@suse.de> * * Please see Documentation/filesystems/sysfs.rst for more information. */ #ifndef _SYSFS_H_ #define _SYSFS_H_ #include <linux/kernfs.h> #include <linux/compiler.h> #include <linux/errno.h> #include <linux/list.h> #include <linux/lockdep.h> #include <linux/kobject_ns.h> #include <linux/stat.h> #include <linux/atomic.h> struct kobject; struct module; struct bin_attribute; enum kobj_ns_type; struct attribute { const char *name; umode_t mode; #ifdef CONFIG_DEBUG_LOCK_ALLOC bool ignore_lockdep:1; struct lock_class_key *key; struct lock_class_key skey; #endif }; /** * sysfs_attr_init - initialize a dynamically allocated sysfs attribute * @attr: struct attribute to initialize * * Initialize a dynamically allocated struct attribute so we can * make lockdep happy. This is a new requirement for attributes * and initially this is only needed when lockdep is enabled. * Lockdep gives a nice error when your attribute is added to * sysfs if you don't have this. */ #ifdef CONFIG_DEBUG_LOCK_ALLOC #define sysfs_attr_init(attr) \ do { \ static struct lock_class_key __key; \ \ (attr)->key = &__key; \ } while (0) #else #define sysfs_attr_init(attr) do {} while (0) #endif /** * struct attribute_group - data structure used to declare an attribute group. * @name: Optional: Attribute group name * If specified, the attribute group will be created in * a new subdirectory with this name. * @is_visible: Optional: Function to return permissions associated with an * attribute of the group. Will be called repeatedly for each * non-binary attribute in the group. Only read/write * permissions as well as SYSFS_PREALLOC are accepted. Must * return 0 if an attribute is not visible. The returned value * will replace static permissions defined in struct attribute. * @is_bin_visible: * Optional: Function to return permissions associated with a * binary attribute of the group. Will be called repeatedly * for each binary attribute in the group. Only read/write * permissions as well as SYSFS_PREALLOC are accepted. Must * return 0 if a binary attribute is not visible. The returned * value will replace static permissions defined in * struct bin_attribute. * @attrs: Pointer to NULL terminated list of attributes. * @bin_attrs: Pointer to NULL terminated list of binary attributes. * Either attrs or bin_attrs or both must be provided. */ struct attribute_group { const char *name; umode_t (*is_visible)(struct kobject *, struct attribute *, int); umode_t (*is_bin_visible)(struct kobject *, struct bin_attribute *, int); struct attribute **attrs; struct bin_attribute **bin_attrs; }; /* * Use these macros to make defining attributes easier. * See include/linux/device.h for examples.. */ #define SYSFS_PREALLOC 010000 #define __ATTR(_name, _mode, _show, _store) { \ .attr = {.name = __stringify(_name), \ .mode = VERIFY_OCTAL_PERMISSIONS(_mode) }, \ .show = _show, \ .store = _store, \ } #define __ATTR_PREALLOC(_name, _mode, _show, _store) { \ .attr = {.name = __stringify(_name), \ .mode = SYSFS_PREALLOC | VERIFY_OCTAL_PERMISSIONS(_mode) },\ .show = _show, \ .store = _store, \ } #define __ATTR_RO(_name) { \ .attr = { .name = __stringify(_name), .mode = 0444 }, \ .show = _name##_show, \ } #define __ATTR_RO_MODE(_name, _mode) { \ .attr = { .name = __stringify(_name), \ .mode = VERIFY_OCTAL_PERMISSIONS(_mode) }, \ .show = _name##_show, \ } #define __ATTR_RW_MODE(_name, _mode) { \ .attr = { .name = __stringify(_name), \ .mode = VERIFY_OCTAL_PERMISSIONS(_mode) }, \ .show = _name##_show, \ .store = _name##_store, \ } #define __ATTR_WO(_name) { \ .attr = { .name = __stringify(_name), .mode = 0200 }, \ .store = _name##_store, \ } #define __ATTR_RW(_name) __ATTR(_name, 0644, _name##_show, _name##_store) #define __ATTR_NULL { .attr = { .name = NULL } } #ifdef CONFIG_DEBUG_LOCK_ALLOC #define __ATTR_IGNORE_LOCKDEP(_name, _mode, _show, _store) { \ .attr = {.name = __stringify(_name), .mode = _mode, \ .ignore_lockdep = true }, \ .show = _show, \ .store = _store, \ } #else #define __ATTR_IGNORE_LOCKDEP __ATTR #endif #define __ATTRIBUTE_GROUPS(_name) \ static const struct attribute_group *_name##_groups[] = { \ &_name##_group, \ NULL, \ } #define ATTRIBUTE_GROUPS(_name) \ static const struct attribute_group _name##_group = { \ .attrs = _name##_attrs, \ }; \ __ATTRIBUTE_GROUPS(_name) #define BIN_ATTRIBUTE_GROUPS(_name) \ static const struct attribute_group _name##_group = { \ .bin_attrs = _name##_attrs, \ }; \ __ATTRIBUTE_GROUPS(_name) struct file; struct vm_area_struct; struct address_space; struct bin_attribute { struct attribute attr; size_t size; void *private; struct address_space *(*f_mapping)(void); ssize_t (*read)(struct file *, struct kobject *, struct bin_attribute *, char *, loff_t, size_t); ssize_t (*write)(struct file *, struct kobject *, struct bin_attribute *, char *, loff_t, size_t); int (*mmap)(struct file *, struct kobject *, struct bin_attribute *attr, struct vm_area_struct *vma); }; /** * sysfs_bin_attr_init - initialize a dynamically allocated bin_attribute * @attr: struct bin_attribute to initialize * * Initialize a dynamically allocated struct bin_attribute so we * can make lockdep happy. This is a new requirement for * attributes and initially this is only needed when lockdep is * enabled. Lockdep gives a nice error when your attribute is * added to sysfs if you don't have this. */ #define sysfs_bin_attr_init(bin_attr) sysfs_attr_init(&(bin_attr)->attr) /* macros to create static binary attributes easier */ #define __BIN_ATTR(_name, _mode, _read, _write, _size) { \ .attr = { .name = __stringify(_name), .mode = _mode }, \ .read = _read, \ .write = _write, \ .size = _size, \ } #define __BIN_ATTR_RO(_name, _size) { \ .attr = { .name = __stringify(_name), .mode = 0444 }, \ .read = _name##_read, \ .size = _size, \ } #define __BIN_ATTR_WO(_name, _size) { \ .attr = { .name = __stringify(_name), .mode = 0200 }, \ .write = _name##_write, \ .size = _size, \ } #define __BIN_ATTR_RW(_name, _size) \ __BIN_ATTR(_name, 0644, _name##_read, _name##_write, _size) #define __BIN_ATTR_NULL __ATTR_NULL #define BIN_ATTR(_name, _mode, _read, _write, _size) \ struct bin_attribute bin_attr_##_name = __BIN_ATTR(_name, _mode, _read, \ _write, _size) #define BIN_ATTR_RO(_name, _size) \ struct bin_attribute bin_attr_##_name = __BIN_ATTR_RO(_name, _size) #define BIN_ATTR_WO(_name, _size) \ struct bin_attribute bin_attr_##_name = __BIN_ATTR_WO(_name, _size) #define BIN_ATTR_RW(_name, _size) \ struct bin_attribute bin_attr_##_name = __BIN_ATTR_RW(_name, _size) struct sysfs_ops { ssize_t (*show)(struct kobject *, struct attribute *, char *); ssize_t (*store)(struct kobject *, struct attribute *, const char *, size_t); }; #ifdef CONFIG_SYSFS int __must_check sysfs_create_dir_ns(struct kobject *kobj, const void *ns); void sysfs_remove_dir(struct kobject *kobj); int __must_check sysfs_rename_dir_ns(struct kobject *kobj, const char *new_name, const void *new_ns); int __must_check sysfs_move_dir_ns(struct kobject *kobj, struct kobject *new_parent_kobj, const void *new_ns); int __must_check sysfs_create_mount_point(struct kobject *parent_kobj, const char *name); void sysfs_remove_mount_point(struct kobject *parent_kobj, const char *name); int __must_check sysfs_create_file_ns(struct kobject *kobj, const struct attribute *attr, const void *ns); int __must_check sysfs_create_files(struct kobject *kobj, const struct attribute * const *attr); int __must_check sysfs_chmod_file(struct kobject *kobj, const struct attribute *attr, umode_t mode); struct kernfs_node *sysfs_break_active_protection(struct kobject *kobj, const struct attribute *attr); void sysfs_unbreak_active_protection(struct kernfs_node *kn); void sysfs_remove_file_ns(struct kobject *kobj, const struct attribute *attr, const void *ns); bool sysfs_remove_file_self(struct kobject *kobj, const struct attribute *attr); void sysfs_remove_files(struct kobject *kobj, const struct attribute * const *attr); int __must_check sysfs_create_bin_file(struct kobject *kobj, const struct bin_attribute *attr); void sysfs_remove_bin_file(struct kobject *kobj, const struct bin_attribute *attr); int __must_check sysfs_create_link(struct kobject *kobj, struct kobject *target, const char *name); int __must_check sysfs_create_link_nowarn(struct kobject *kobj, struct kobject *target, const char *name); void sysfs_remove_link(struct kobject *kobj, const char *name); int sysfs_rename_link_ns(struct kobject *kobj, struct kobject *target, const char *old_name, const char *new_name, const void *new_ns); void sysfs_delete_link(struct kobject *dir, struct kobject *targ, const char *name); int __must_check sysfs_create_group(struct kobject *kobj, const struct attribute_group *grp); int __must_check sysfs_create_groups(struct kobject *kobj, const struct attribute_group **groups); int __must_check sysfs_update_groups(struct kobject *kobj, const struct attribute_group **groups); int sysfs_update_group(struct kobject *kobj, const struct attribute_group *grp); void sysfs_remove_group(struct kobject *kobj, const struct attribute_group *grp); void sysfs_remove_groups(struct kobject *kobj, const struct attribute_group **groups); int sysfs_add_file_to_group(struct kobject *kobj, const struct attribute *attr, const char *group); void sysfs_remove_file_from_group(struct kobject *kobj, const struct attribute *attr, const char *group); int sysfs_merge_group(struct kobject *kobj, const struct attribute_group *grp); void sysfs_unmerge_group(struct kobject *kobj, const struct attribute_group *grp); int sysfs_add_link_to_group(struct kobject *kobj, const char *group_name, struct kobject *target, const char *link_name); void sysfs_remove_link_from_group(struct kobject *kobj, const char *group_name, const char *link_name); int compat_only_sysfs_link_entry_to_kobj(struct kobject *kobj, struct kobject *target_kobj, const char *target_name, const char *symlink_name); void sysfs_notify(struct kobject *kobj, const char *dir, const char *attr); int __must_check sysfs_init(void); static inline void sysfs_enable_ns(struct kernfs_node *kn) { return kernfs_enable_ns(kn); } int sysfs_file_change_owner(struct kobject *kobj, const char *name, kuid_t kuid, kgid_t kgid); int sysfs_change_owner(struct kobject *kobj, kuid_t kuid, kgid_t kgid); int sysfs_link_change_owner(struct kobject *kobj, struct kobject *targ, const char *name, kuid_t kuid, kgid_t kgid); int sysfs_groups_change_owner(struct kobject *kobj, const struct attribute_group **groups, kuid_t kuid, kgid_t kgid); int sysfs_group_change_owner(struct kobject *kobj, const struct attribute_group *groups, kuid_t kuid, kgid_t kgid); __printf(2, 3) int sysfs_emit(char *buf, const char *fmt, ...); __printf(3, 4) int sysfs_emit_at(char *buf, int at, const char *fmt, ...); #else /* CONFIG_SYSFS */ static inline int sysfs_create_dir_ns(struct kobject *kobj, const void *ns) { return 0; } static inline void sysfs_remove_dir(struct kobject *kobj) { } static inline int sysfs_rename_dir_ns(struct kobject *kobj, const char *new_name, const void *new_ns) { return 0; } static inline int sysfs_move_dir_ns(struct kobject *kobj, struct kobject *new_parent_kobj, const void *new_ns) { return 0; } static inline int sysfs_create_mount_point(struct kobject *parent_kobj, const char *name) { return 0; } static inline void sysfs_remove_mount_point(struct kobject *parent_kobj, const char *name) { } static inline int sysfs_create_file_ns(struct kobject *kobj, const struct attribute *attr, const void *ns) { return 0; } static inline int sysfs_create_files(struct kobject *kobj, const struct attribute * const *attr) { return 0; } static inline int sysfs_chmod_file(struct kobject *kobj, const struct attribute *attr, umode_t mode) { return 0; } static inline struct kernfs_node * sysfs_break_active_protection(struct kobject *kobj, const struct attribute *attr) { return NULL; } static inline void sysfs_unbreak_active_protection(struct kernfs_node *kn) { } static inline void sysfs_remove_file_ns(struct kobject *kobj, const struct attribute *attr, const void *ns) { } static inline bool sysfs_remove_file_self(struct kobject *kobj, const struct attribute *attr) { return false; } static inline void sysfs_remove_files(struct kobject *kobj, const struct attribute * const *attr) { } static inline int sysfs_create_bin_file(struct kobject *kobj, const struct bin_attribute *attr) { return 0; } static inline void sysfs_remove_bin_file(struct kobject *kobj, const struct bin_attribute *attr) { } static inline int sysfs_create_link(struct kobject *kobj, struct kobject *target, const char *name) { return 0; } static inline int sysfs_create_link_nowarn(struct kobject *kobj, struct kobject *target, const char *name) { return 0; } static inline void sysfs_remove_link(struct kobject *kobj, const char *name) { } static inline int sysfs_rename_link_ns(struct kobject *k, struct kobject *t, const char *old_name, const char *new_name, const void *ns) { return 0; } static inline void sysfs_delete_link(struct kobject *k, struct kobject *t, const char *name) { } static inline int sysfs_create_group(struct kobject *kobj, const struct attribute_group *grp) { return 0; } static inline int sysfs_create_groups(struct kobject *kobj, const struct attribute_group **groups) { return 0; } static inline int sysfs_update_groups(struct kobject *kobj, const struct attribute_group **groups) { return 0; } static inline int sysfs_update_group(struct kobject *kobj, const struct attribute_group *grp) { return 0; } static inline void sysfs_remove_group(struct kobject *kobj, const struct attribute_group *grp) { } static inline void sysfs_remove_groups(struct kobject *kobj, const struct attribute_group **groups) { } static inline int sysfs_add_file_to_group(struct kobject *kobj, const struct attribute *attr, const char *group) { return 0; } static inline void sysfs_remove_file_from_group(struct kobject *kobj, const struct attribute *attr, const char *group) { } static inline int sysfs_merge_group(struct kobject *kobj, const struct attribute_group *grp) { return 0; } static inline void sysfs_unmerge_group(struct kobject *kobj, const struct attribute_group *grp) { } static inline int sysfs_add_link_to_group(struct kobject *kobj, const char *group_name, struct kobject *target, const char *link_name) { return 0; } static inline void sysfs_remove_link_from_group(struct kobject *kobj, const char *group_name, const char *link_name) { } static inline int compat_only_sysfs_link_entry_to_kobj(struct kobject *kobj, struct kobject *target_kobj, const char *target_name, const char *symlink_name) { return 0; } static inline void sysfs_notify(struct kobject *kobj, const char *dir, const char *attr) { } static inline int __must_check sysfs_init(void) { return 0; } static inline void sysfs_enable_ns(struct kernfs_node *kn) { } static inline int sysfs_file_change_owner(struct kobject *kobj, const char *name, kuid_t kuid, kgid_t kgid) { return 0; } static inline int sysfs_link_change_owner(struct kobject *kobj, struct kobject *targ, const char *name, kuid_t kuid, kgid_t kgid) { return 0; } static inline int sysfs_change_owner(struct kobject *kobj, kuid_t kuid, kgid_t kgid) { return 0; } static inline int sysfs_groups_change_owner(struct kobject *kobj, const struct attribute_group **groups, kuid_t kuid, kgid_t kgid) { return 0; } static inline int sysfs_group_change_owner(struct kobject *kobj, const struct attribute_group *groups, kuid_t kuid, kgid_t kgid) { return 0; } __printf(2, 3) static inline int sysfs_emit(char *buf, const char *fmt, ...) { return 0; } __printf(3, 4) static inline int sysfs_emit_at(char *buf, int at, const char *fmt, ...) { return 0; } #endif /* CONFIG_SYSFS */ static inline int __must_check sysfs_create_file(struct kobject *kobj, const struct attribute *attr) { return sysfs_create_file_ns(kobj, attr, NULL); } static inline void sysfs_remove_file(struct kobject *kobj, const struct attribute *attr) { sysfs_remove_file_ns(kobj, attr, NULL); } static inline int sysfs_rename_link(struct kobject *kobj, struct kobject *target, const char *old_name, const char *new_name) { return sysfs_rename_link_ns(kobj, target, old_name, new_name, NULL); } static inline void sysfs_notify_dirent(struct kernfs_node *kn) { kernfs_notify(kn); } static inline struct kernfs_node *sysfs_get_dirent(struct kernfs_node *parent, const char *name) { return kernfs_find_and_get(parent, name); } static inline struct kernfs_node *sysfs_get(struct kernfs_node *kn) { kernfs_get(kn); return kn; } static inline void sysfs_put(struct kernfs_node *kn) { kernfs_put(kn); } #endif /* _SYSFS_H_ */ PK ! =�b� � bottom_half.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BH_H #define _LINUX_BH_H #include <linux/preempt.h> #if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_TRACE_IRQFLAGS) extern void __local_bh_disable_ip(unsigned long ip, unsigned int cnt); #else static __always_inline void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) { preempt_count_add(cnt); barrier(); } #endif static inline void local_bh_disable(void) { __local_bh_disable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); } extern void _local_bh_enable(void); extern void __local_bh_enable_ip(unsigned long ip, unsigned int cnt); static inline void local_bh_enable_ip(unsigned long ip) { __local_bh_enable_ip(ip, SOFTIRQ_DISABLE_OFFSET); } static inline void local_bh_enable(void) { __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); } #ifdef CONFIG_PREEMPT_RT extern bool local_bh_blocked(void); #else static inline bool local_bh_blocked(void) { return false; } #endif #endif /* _LINUX_BH_H */ PK ! 1n2; posix_acl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* File: linux/posix_acl.h (C) 2002 Andreas Gruenbacher, <a.gruenbacher@computer.org> */ #ifndef __LINUX_POSIX_ACL_H #define __LINUX_POSIX_ACL_H #include <linux/bug.h> #include <linux/slab.h> #include <linux/rcupdate.h> #include <linux/refcount.h> #include <uapi/linux/posix_acl.h> struct user_namespace; struct posix_acl_entry { short e_tag; unsigned short e_perm; union { kuid_t e_uid; kgid_t e_gid; }; }; struct posix_acl { refcount_t a_refcount; struct rcu_head a_rcu; unsigned int a_count; struct posix_acl_entry a_entries[]; }; #define FOREACH_ACL_ENTRY(pa, acl, pe) \ for(pa=(acl)->a_entries, pe=pa+(acl)->a_count; pa<pe; pa++) /* * Duplicate an ACL handle. */ static inline struct posix_acl * posix_acl_dup(struct posix_acl *acl) { if (acl) refcount_inc(&acl->a_refcount); return acl; } /* * Free an ACL handle. */ static inline void posix_acl_release(struct posix_acl *acl) { if (acl && refcount_dec_and_test(&acl->a_refcount)) kfree_rcu(acl, a_rcu); } /* posix_acl.c */ extern void posix_acl_init(struct posix_acl *, int); extern struct posix_acl *posix_acl_alloc(int, gfp_t); extern struct posix_acl *posix_acl_from_mode(umode_t, gfp_t); extern int posix_acl_equiv_mode(const struct posix_acl *, umode_t *); extern int __posix_acl_create(struct posix_acl **, gfp_t, umode_t *); extern int __posix_acl_chmod(struct posix_acl **, gfp_t, umode_t); extern struct posix_acl *get_posix_acl(struct inode *, int); extern int set_posix_acl(struct user_namespace *, struct inode *, int, struct posix_acl *); struct posix_acl *get_cached_acl_rcu(struct inode *inode, int type); #ifdef CONFIG_FS_POSIX_ACL int posix_acl_chmod(struct user_namespace *, struct inode *, umode_t); extern int posix_acl_create(struct inode *, umode_t *, struct posix_acl **, struct posix_acl **); int posix_acl_update_mode(struct user_namespace *, struct inode *, umode_t *, struct posix_acl **); extern int simple_set_acl(struct user_namespace *, struct inode *, struct posix_acl *, int); extern int simple_acl_create(struct inode *, struct inode *); struct posix_acl *get_cached_acl(struct inode *inode, int type); void set_cached_acl(struct inode *inode, int type, struct posix_acl *acl); void forget_cached_acl(struct inode *inode, int type); void forget_all_cached_acls(struct inode *inode); int posix_acl_valid(struct user_namespace *, const struct posix_acl *); int posix_acl_permission(struct user_namespace *, struct inode *, const struct posix_acl *, int); static inline void cache_no_acl(struct inode *inode) { inode->i_acl = NULL; inode->i_default_acl = NULL; } #else static inline int posix_acl_chmod(struct user_namespace *mnt_userns, struct inode *inode, umode_t mode) { return 0; } #define simple_set_acl NULL static inline int simple_acl_create(struct inode *dir, struct inode *inode) { return 0; } static inline void cache_no_acl(struct inode *inode) { } static inline int posix_acl_create(struct inode *inode, umode_t *mode, struct posix_acl **default_acl, struct posix_acl **acl) { *default_acl = *acl = NULL; return 0; } static inline void forget_all_cached_acls(struct inode *inode) { } #endif /* CONFIG_FS_POSIX_ACL */ struct posix_acl *get_acl(struct inode *inode, int type); #endif /* __LINUX_POSIX_ACL_H */ PK ! �v�~; ; pageblock-flags.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Macros for manipulating and testing flags related to a * pageblock_nr_pages number of pages. * * Copyright (C) IBM Corporation, 2006 * * Original author, Mel Gorman * Major cleanups and reduction of bit operations, Andy Whitcroft */ #ifndef PAGEBLOCK_FLAGS_H #define PAGEBLOCK_FLAGS_H #include <linux/types.h> #define PB_migratetype_bits 3 /* Bit indices that affect a whole block of pages */ enum pageblock_bits { PB_migrate, PB_migrate_end = PB_migrate + PB_migratetype_bits - 1, /* 3 bits required for migrate types */ PB_migrate_skip,/* If set the block is skipped by compaction */ /* * Assume the bits will always align on a word. If this assumption * changes then get/set pageblock needs updating. */ NR_PAGEBLOCK_BITS }; #ifdef CONFIG_HUGETLB_PAGE #ifdef CONFIG_HUGETLB_PAGE_SIZE_VARIABLE /* Huge page sizes are variable */ extern unsigned int pageblock_order; #else /* CONFIG_HUGETLB_PAGE_SIZE_VARIABLE */ /* Huge pages are a constant size */ #define pageblock_order HUGETLB_PAGE_ORDER #endif /* CONFIG_HUGETLB_PAGE_SIZE_VARIABLE */ #else /* CONFIG_HUGETLB_PAGE */ /* If huge pages are not used, group by MAX_ORDER_NR_PAGES */ #define pageblock_order (MAX_ORDER-1) #endif /* CONFIG_HUGETLB_PAGE */ #define pageblock_nr_pages (1UL << pageblock_order) /* Forward declaration */ struct page; unsigned long get_pfnblock_flags_mask(const struct page *page, unsigned long pfn, unsigned long mask); void set_pfnblock_flags_mask(struct page *page, unsigned long flags, unsigned long pfn, unsigned long mask); /* Declarations for getting and setting flags. See mm/page_alloc.c */ #ifdef CONFIG_COMPACTION #define get_pageblock_skip(page) \ get_pfnblock_flags_mask(page, page_to_pfn(page), \ (1 << (PB_migrate_skip))) #define clear_pageblock_skip(page) \ set_pfnblock_flags_mask(page, 0, page_to_pfn(page), \ (1 << PB_migrate_skip)) #define set_pageblock_skip(page) \ set_pfnblock_flags_mask(page, (1 << PB_migrate_skip), \ page_to_pfn(page), \ (1 << PB_migrate_skip)) #else static inline bool get_pageblock_skip(struct page *page) { return false; } static inline void clear_pageblock_skip(struct page *page) { } static inline void set_pageblock_skip(struct page *page) { } #endif /* CONFIG_COMPACTION */ #endif /* PAGEBLOCK_FLAGS_H */ PK ! wN^#? ? interval_tree.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_INTERVAL_TREE_H #define _LINUX_INTERVAL_TREE_H #include <linux/rbtree.h> struct interval_tree_node { struct rb_node rb; unsigned long start; /* Start of interval */ unsigned long last; /* Last location _in_ interval */ unsigned long __subtree_last; }; extern void interval_tree_insert(struct interval_tree_node *node, struct rb_root_cached *root); extern void interval_tree_remove(struct interval_tree_node *node, struct rb_root_cached *root); extern struct interval_tree_node * interval_tree_iter_first(struct rb_root_cached *root, unsigned long start, unsigned long last); extern struct interval_tree_node * interval_tree_iter_next(struct interval_tree_node *node, unsigned long start, unsigned long last); #endif /* _LINUX_INTERVAL_TREE_H */ PK ! �� Je e ipc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IPC_H #define _LINUX_IPC_H #include <linux/spinlock.h> #include <linux/uidgid.h> #include <linux/rhashtable-types.h> #include <uapi/linux/ipc.h> #include <linux/refcount.h> /* used by in-kernel data structures */ struct kern_ipc_perm { spinlock_t lock; bool deleted; int id; key_t key; kuid_t uid; kgid_t gid; kuid_t cuid; kgid_t cgid; umode_t mode; unsigned long seq; void *security; struct rhash_head khtnode; struct rcu_head rcu; refcount_t refcount; } ____cacheline_aligned_in_smp __randomize_layout; #endif /* _LINUX_IPC_H */ PK ! ̿�A A gnss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * GNSS receiver support * * Copyright (C) 2018 Johan Hovold <johan@kernel.org> */ #ifndef _LINUX_GNSS_H #define _LINUX_GNSS_H #include <linux/cdev.h> #include <linux/device.h> #include <linux/kfifo.h> #include <linux/mutex.h> #include <linux/rwsem.h> #include <linux/types.h> #include <linux/wait.h> struct gnss_device; enum gnss_type { GNSS_TYPE_NMEA = 0, GNSS_TYPE_SIRF, GNSS_TYPE_UBX, GNSS_TYPE_MTK, GNSS_TYPE_COUNT }; struct gnss_operations { int (*open)(struct gnss_device *gdev); void (*close)(struct gnss_device *gdev); int (*write_raw)(struct gnss_device *gdev, const unsigned char *buf, size_t count); }; struct gnss_device { struct device dev; struct cdev cdev; int id; enum gnss_type type; unsigned long flags; struct rw_semaphore rwsem; const struct gnss_operations *ops; unsigned int count; unsigned int disconnected:1; struct mutex read_mutex; struct kfifo read_fifo; wait_queue_head_t read_queue; struct mutex write_mutex; char *write_buf; }; struct gnss_device *gnss_allocate_device(struct device *parent); void gnss_put_device(struct gnss_device *gdev); int gnss_register_device(struct gnss_device *gdev); void gnss_deregister_device(struct gnss_device *gdev); int gnss_insert_raw(struct gnss_device *gdev, const unsigned char *buf, size_t count); static inline void gnss_set_drvdata(struct gnss_device *gdev, void *data) { dev_set_drvdata(&gdev->dev, data); } static inline void *gnss_get_drvdata(struct gnss_device *gdev) { return dev_get_drvdata(&gdev->dev); } #endif /* _LINUX_GNSS_H */ PK ! e�h. pstore_zone.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __PSTORE_ZONE_H_ #define __PSTORE_ZONE_H_ #include <linux/types.h> typedef ssize_t (*pstore_zone_read_op)(char *, size_t, loff_t); typedef ssize_t (*pstore_zone_write_op)(const char *, size_t, loff_t); typedef ssize_t (*pstore_zone_erase_op)(size_t, loff_t); /** * struct pstore_zone_info - pstore/zone back-end driver structure * * @owner: Module which is responsible for this back-end driver. * @name: Name of the back-end driver. * @total_size: The total size in bytes pstore/zone can use. It must be greater * than 4096 and be multiple of 4096. * @kmsg_size: The size of oops/panic zone. Zero means disabled, otherwise, * it must be multiple of SECTOR_SIZE(512 Bytes). * @max_reason: Maximum kmsg dump reason to store. * @pmsg_size: The size of pmsg zone which is the same as @kmsg_size. * @console_size:The size of console zone which is the same as @kmsg_size. * @ftrace_size:The size of ftrace zone which is the same as @kmsg_size. * @read: The general read operation. Both of the function parameters * @size and @offset are relative value to storage. * On success, the number of bytes should be returned, others * mean error. * @write: The same as @read, but the following error number: * -EBUSY means try to write again later. * -ENOMSG means to try next zone. * @erase: The general erase operation for device with special removing * job. Both of the function parameters @size and @offset are * relative value to storage. * Return 0 on success and others on failure. * @panic_write:The write operation only used for panic case. It's optional * if you do not care panic log. The parameters are relative * value to storage. * On success, the number of bytes should be returned, others * excluding -ENOMSG mean error. -ENOMSG means to try next zone. */ struct pstore_zone_info { struct module *owner; const char *name; unsigned long total_size; unsigned long kmsg_size; int max_reason; unsigned long pmsg_size; unsigned long console_size; unsigned long ftrace_size; pstore_zone_read_op read; pstore_zone_write_op write; pstore_zone_erase_op erase; pstore_zone_write_op panic_write; }; extern int register_pstore_zone(struct pstore_zone_info *info); extern void unregister_pstore_zone(struct pstore_zone_info *info); #endif PK ! g4�� � pci-ecam.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright 2016 Broadcom */ #ifndef DRIVERS_PCI_ECAM_H #define DRIVERS_PCI_ECAM_H #include <linux/pci.h> #include <linux/kernel.h> #include <linux/platform_device.h> /* * Memory address shift values for the byte-level address that * can be used when accessing the PCI Express Configuration Space. */ /* * Enhanced Configuration Access Mechanism (ECAM) * * See PCI Express Base Specification, Revision 5.0, Version 1.0, * Section 7.2.2, Table 7-1, p. 677. */ #define PCIE_ECAM_BUS_SHIFT 20 /* Bus number */ #define PCIE_ECAM_DEVFN_SHIFT 12 /* Device and Function number */ #define PCIE_ECAM_BUS_MASK 0xff #define PCIE_ECAM_DEVFN_MASK 0xff #define PCIE_ECAM_REG_MASK 0xfff /* Limit offset to a maximum of 4K */ #define PCIE_ECAM_BUS(x) (((x) & PCIE_ECAM_BUS_MASK) << PCIE_ECAM_BUS_SHIFT) #define PCIE_ECAM_DEVFN(x) (((x) & PCIE_ECAM_DEVFN_MASK) << PCIE_ECAM_DEVFN_SHIFT) #define PCIE_ECAM_REG(x) ((x) & PCIE_ECAM_REG_MASK) #define PCIE_ECAM_OFFSET(bus, devfn, where) \ (PCIE_ECAM_BUS(bus) | \ PCIE_ECAM_DEVFN(devfn) | \ PCIE_ECAM_REG(where)) /* * struct to hold pci ops and bus shift of the config window * for a PCI controller. */ struct pci_config_window; struct pci_ecam_ops { unsigned int bus_shift; struct pci_ops pci_ops; int (*init)(struct pci_config_window *); }; /* * struct to hold the mappings of a config space window. This * is expected to be used as sysdata for PCI controllers that * use ECAM. */ struct pci_config_window { struct resource res; struct resource busr; unsigned int bus_shift; void *priv; const struct pci_ecam_ops *ops; union { void __iomem *win; /* 64-bit single mapping */ void __iomem **winp; /* 32-bit per-bus mapping */ }; struct device *parent;/* ECAM res was from this dev */ }; /* create and free pci_config_window */ struct pci_config_window *pci_ecam_create(struct device *dev, struct resource *cfgres, struct resource *busr, const struct pci_ecam_ops *ops); void pci_ecam_free(struct pci_config_window *cfg); /* map_bus when ->sysdata is an instance of pci_config_window */ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, int where); /* default ECAM ops */ extern const struct pci_ecam_ops pci_generic_ecam_ops; #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */ extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */ extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */ extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */ extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ extern const struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */ extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */ extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */ extern const struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */ #endif #if IS_ENABLED(CONFIG_PCI_HOST_COMMON) /* for DT-based PCI controllers that support ECAM */ int pci_host_common_probe(struct platform_device *pdev); int pci_host_common_remove(struct platform_device *pdev); #endif #endif PK ! � �(� � seg6_iptunnel.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SEG6_IPTUNNEL_H #define _LINUX_SEG6_IPTUNNEL_H #include <uapi/linux/seg6_iptunnel.h> #endif PK ! U��~� � kernelcapi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * $Id: kernelcapi.h,v 1.8.6.2 2001/02/07 11:31:31 kai Exp $ * * Kernel CAPI 2.0 Interface for Linux * * (c) Copyright 1997 by Carsten Paeth (calle@calle.in-berlin.de) * */ #ifndef __KERNELCAPI_H__ #define __KERNELCAPI_H__ #include <linux/list.h> #include <linux/skbuff.h> #include <linux/workqueue.h> #include <linux/notifier.h> #include <uapi/linux/kernelcapi.h> #define CAPI_NOERROR 0x0000 #define CAPI_TOOMANYAPPLS 0x1001 #define CAPI_LOGBLKSIZETOSMALL 0x1002 #define CAPI_BUFFEXECEEDS64K 0x1003 #define CAPI_MSGBUFSIZETOOSMALL 0x1004 #define CAPI_ANZLOGCONNNOTSUPPORTED 0x1005 #define CAPI_REGRESERVED 0x1006 #define CAPI_REGBUSY 0x1007 #define CAPI_REGOSRESOURCEERR 0x1008 #define CAPI_REGNOTINSTALLED 0x1009 #define CAPI_REGCTRLERNOTSUPPORTEXTEQUIP 0x100a #define CAPI_REGCTRLERONLYSUPPORTEXTEQUIP 0x100b #define CAPI_ILLAPPNR 0x1101 #define CAPI_ILLCMDORSUBCMDORMSGTOSMALL 0x1102 #define CAPI_SENDQUEUEFULL 0x1103 #define CAPI_RECEIVEQUEUEEMPTY 0x1104 #define CAPI_RECEIVEOVERFLOW 0x1105 #define CAPI_UNKNOWNNOTPAR 0x1106 #define CAPI_MSGBUSY 0x1107 #define CAPI_MSGOSRESOURCEERR 0x1108 #define CAPI_MSGNOTINSTALLED 0x1109 #define CAPI_MSGCTRLERNOTSUPPORTEXTEQUIP 0x110a #define CAPI_MSGCTRLERONLYSUPPORTEXTEQUIP 0x110b #endif /* __KERNELCAPI_H__ */ PK ! �� � acct.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * BSD Process Accounting for Linux - Definitions * * Author: Marco van Wieringen (mvw@planets.elm.net) * * This header file contains the definitions needed to implement * BSD-style process accounting. The kernel accounting code and all * user-level programs that try to do something useful with the * process accounting log must include this file. * * Copyright (C) 1995 - 1997 Marco van Wieringen - ELM Consultancy B.V. * */ #ifndef _LINUX_ACCT_H #define _LINUX_ACCT_H #include <uapi/linux/acct.h> #ifdef CONFIG_BSD_PROCESS_ACCT struct pid_namespace; extern int acct_parm[]; /* for sysctl */ extern void acct_collect(long exitcode, int group_dead); extern void acct_process(void); extern void acct_exit_ns(struct pid_namespace *); #else #define acct_collect(x,y) do { } while (0) #define acct_process() do { } while (0) #define acct_exit_ns(ns) do { } while (0) #endif /* * ACCT_VERSION numbers as yet defined: * 0: old format (until 2.6.7) with 16 bit uid/gid * 1: extended variant (binary compatible on M68K) * 2: extended variant (binary compatible on everything except M68K) * 3: new binary incompatible format (64 bytes) * 4: new binary incompatible format (128 bytes) * 5: new binary incompatible format (128 bytes, second half) * */ #undef ACCT_VERSION #undef AHZ #ifdef CONFIG_BSD_PROCESS_ACCT_V3 #define ACCT_VERSION 3 #define AHZ 100 typedef struct acct_v3 acct_t; #else #ifdef CONFIG_M68K #define ACCT_VERSION 1 #else #define ACCT_VERSION 2 #endif #define AHZ (USER_HZ) typedef struct acct acct_t; #endif #include <linux/jiffies.h> /* * Yet another set of HZ to *HZ helper functions. * See <linux/jiffies.h> for the original. */ static inline u32 jiffies_to_AHZ(unsigned long x) { #if (TICK_NSEC % (NSEC_PER_SEC / AHZ)) == 0 # if HZ < AHZ return x * (AHZ / HZ); # else return x / (HZ / AHZ); # endif #else u64 tmp = (u64)x * TICK_NSEC; do_div(tmp, (NSEC_PER_SEC / AHZ)); return (long)tmp; #endif } static inline u64 nsec_to_AHZ(u64 x) { #if (NSEC_PER_SEC % AHZ) == 0 do_div(x, (NSEC_PER_SEC / AHZ)); #elif (AHZ % 512) == 0 x *= AHZ/512; do_div(x, (NSEC_PER_SEC / 512)); #else /* * max relative error 5.7e-8 (1.8s per year) for AHZ <= 1024, * overflow after 64.99 years. * exact for AHZ=60, 72, 90, 120, 144, 180, 300, 600, 900, ... */ x *= 9; do_div(x, (unsigned long)((9ull * NSEC_PER_SEC + (AHZ/2)) / AHZ)); #endif return x; } #endif /* _LINUX_ACCT_H */ PK ! �+�� textsearch.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_TEXTSEARCH_H #define __LINUX_TEXTSEARCH_H #include <linux/types.h> #include <linux/list.h> #include <linux/kernel.h> #include <linux/err.h> #include <linux/slab.h> struct module; struct ts_config; #define TS_AUTOLOAD 1 /* Automatically load textsearch modules when needed */ #define TS_IGNORECASE 2 /* Searches string case insensitively */ /** * struct ts_state - search state * @offset: offset for next match * @cb: control buffer, for persistent variables of get_next_block() */ struct ts_state { unsigned int offset; char cb[48]; }; /** * struct ts_ops - search module operations * @name: name of search algorithm * @init: initialization function to prepare a search * @find: find the next occurrence of the pattern * @destroy: destroy algorithm specific parts of a search configuration * @get_pattern: return head of pattern * @get_pattern_len: return length of pattern * @owner: module reference to algorithm * @list: list to search */ struct ts_ops { const char *name; struct ts_config * (*init)(const void *, unsigned int, gfp_t, int); unsigned int (*find)(struct ts_config *, struct ts_state *); void (*destroy)(struct ts_config *); void * (*get_pattern)(struct ts_config *); unsigned int (*get_pattern_len)(struct ts_config *); struct module *owner; struct list_head list; }; /** * struct ts_config - search configuration * @ops: operations of chosen algorithm * @flags: flags * @get_next_block: callback to fetch the next block to search in * @finish: callback to finalize a search */ struct ts_config { struct ts_ops *ops; int flags; /** * @get_next_block: fetch next block of data * @consumed: number of bytes consumed by the caller * @dst: destination buffer * @conf: search configuration * @state: search state * * Called repeatedly until 0 is returned. Must assign the * head of the next block of data to &*dst and return the length * of the block or 0 if at the end. consumed == 0 indicates * a new search. May store/read persistent values in state->cb. */ unsigned int (*get_next_block)(unsigned int consumed, const u8 **dst, struct ts_config *conf, struct ts_state *state); /** * @finish: finalize/clean a series of get_next_block() calls * @conf: search configuration * @state: search state * * Called after the last use of get_next_block(), may be used * to cleanup any leftovers. */ void (*finish)(struct ts_config *conf, struct ts_state *state); }; /** * textsearch_next - continue searching for a pattern * @conf: search configuration * @state: search state * * Continues a search looking for more occurrences of the pattern. * textsearch_find() must be called to find the first occurrence * in order to reset the state. * * Returns the position of the next occurrence of the pattern or * UINT_MAX if not match was found. */ static inline unsigned int textsearch_next(struct ts_config *conf, struct ts_state *state) { unsigned int ret = conf->ops->find(conf, state); if (conf->finish) conf->finish(conf, state); return ret; } /** * textsearch_find - start searching for a pattern * @conf: search configuration * @state: search state * * Returns the position of first occurrence of the pattern or * UINT_MAX if no match was found. */ static inline unsigned int textsearch_find(struct ts_config *conf, struct ts_state *state) { state->offset = 0; return textsearch_next(conf, state); } /** * textsearch_get_pattern - return head of the pattern * @conf: search configuration */ static inline void *textsearch_get_pattern(struct ts_config *conf) { return conf->ops->get_pattern(conf); } /** * textsearch_get_pattern_len - return length of the pattern * @conf: search configuration */ static inline unsigned int textsearch_get_pattern_len(struct ts_config *conf) { return conf->ops->get_pattern_len(conf); } extern int textsearch_register(struct ts_ops *); extern int textsearch_unregister(struct ts_ops *); extern struct ts_config *textsearch_prepare(const char *, const void *, unsigned int, gfp_t, int); extern void textsearch_destroy(struct ts_config *conf); extern unsigned int textsearch_find_continuous(struct ts_config *, struct ts_state *, const void *, unsigned int); #define TS_PRIV_ALIGNTO 8 #define TS_PRIV_ALIGN(len) (((len) + TS_PRIV_ALIGNTO-1) & ~(TS_PRIV_ALIGNTO-1)) static inline struct ts_config *alloc_ts_config(size_t payload, gfp_t gfp_mask) { struct ts_config *conf; conf = kzalloc(TS_PRIV_ALIGN(sizeof(*conf)) + payload, gfp_mask); if (conf == NULL) return ERR_PTR(-ENOMEM); return conf; } static inline void *ts_config_priv(struct ts_config *conf) { return ((u8 *) conf + TS_PRIV_ALIGN(sizeof(struct ts_config))); } #endif PK ! ��1�J J vfio_pci_core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012 Red Hat, Inc. All rights reserved. * Author: Alex Williamson <alex.williamson@redhat.com> * * Derived from original vfio: * Copyright 2010 Cisco Systems, Inc. All rights reserved. * Author: Tom Lyon, pugs@cisco.com */ #include <linux/mutex.h> #include <linux/pci.h> #include <linux/vfio.h> #include <linux/irqbypass.h> #include <linux/types.h> #include <linux/uuid.h> #include <linux/notifier.h> #ifndef VFIO_PCI_CORE_H #define VFIO_PCI_CORE_H #define VFIO_PCI_OFFSET_SHIFT 40 #define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT) #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT) #define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1) /* Special capability IDs predefined access */ #define PCI_CAP_ID_INVALID 0xFF /* default raw access */ #define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */ /* Cap maximum number of ioeventfds per device (arbitrary) */ #define VFIO_PCI_IOEVENTFD_MAX 1000 struct vfio_pci_ioeventfd { struct list_head next; struct vfio_pci_core_device *vdev; struct virqfd *virqfd; void __iomem *addr; uint64_t data; loff_t pos; int bar; int count; bool test_mem; }; struct vfio_pci_irq_ctx { struct eventfd_ctx *trigger; struct virqfd *unmask; struct virqfd *mask; char *name; bool masked; struct irq_bypass_producer producer; }; struct vfio_pci_core_device; struct vfio_pci_region; struct vfio_pci_regops { ssize_t (*rw)(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite); void (*release)(struct vfio_pci_core_device *vdev, struct vfio_pci_region *region); int (*mmap)(struct vfio_pci_core_device *vdev, struct vfio_pci_region *region, struct vm_area_struct *vma); int (*add_capability)(struct vfio_pci_core_device *vdev, struct vfio_pci_region *region, struct vfio_info_cap *caps); }; struct vfio_pci_region { u32 type; u32 subtype; const struct vfio_pci_regops *ops; void *data; size_t size; u32 flags; }; struct vfio_pci_dummy_resource { struct resource resource; int index; struct list_head res_next; }; struct vfio_pci_vf_token { struct mutex lock; uuid_t uuid; int users; }; struct vfio_pci_mmap_vma { struct vm_area_struct *vma; struct list_head vma_next; }; struct vfio_pci_core_device { struct vfio_device vdev; struct pci_dev *pdev; void __iomem *barmap[PCI_STD_NUM_BARS]; bool bar_mmap_supported[PCI_STD_NUM_BARS]; u8 *pci_config_map; u8 *vconfig; struct perm_bits *msi_perm; spinlock_t irqlock; struct mutex igate; struct vfio_pci_irq_ctx *ctx; int num_ctx; int irq_type; int num_regions; struct vfio_pci_region *region; u8 msi_qmax; u8 msix_bar; u16 msix_size; u32 msix_offset; u32 rbar[7]; bool pci_2_3; bool virq_disabled; bool reset_works; bool extended_caps; bool bardirty; bool has_vga; bool needs_reset; bool nointx; bool needs_pm_restore; struct pci_saved_state *pci_saved_state; struct pci_saved_state *pm_save; int ioeventfds_nr; struct eventfd_ctx *err_trigger; struct eventfd_ctx *req_trigger; struct list_head dummy_resources_list; struct mutex ioeventfds_lock; struct list_head ioeventfds_list; struct vfio_pci_vf_token *vf_token; struct list_head sriov_pfs_item; struct vfio_pci_core_device *sriov_pf_core_dev; struct notifier_block nb; struct mutex vma_lock; struct list_head vma_list; struct rw_semaphore memory_lock; }; #define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) #define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX) #define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX) #define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev))) #define irq_is(vdev, type) (vdev->irq_type == type) extern void vfio_pci_intx_mask(struct vfio_pci_core_device *vdev); extern void vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev); extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, uint32_t flags, unsigned index, unsigned start, unsigned count, void *data); extern ssize_t vfio_pci_config_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite); extern ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite); #ifdef CONFIG_VFIO_PCI_VGA extern ssize_t vfio_pci_vga_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite); #else static inline ssize_t vfio_pci_vga_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) { return -EINVAL; } #endif extern long vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset, uint64_t data, int count, int fd); extern int vfio_pci_init_perm_bits(void); extern void vfio_pci_uninit_perm_bits(void); extern int vfio_config_init(struct vfio_pci_core_device *vdev); extern void vfio_config_free(struct vfio_pci_core_device *vdev); extern int vfio_pci_register_dev_region(struct vfio_pci_core_device *vdev, unsigned int type, unsigned int subtype, const struct vfio_pci_regops *ops, size_t size, u32 flags, void *data); extern int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, pci_power_t state); extern bool __vfio_pci_memory_enabled(struct vfio_pci_core_device *vdev); extern void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device *vdev); extern u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device *vdev); extern void vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device *vdev, u16 cmd); #ifdef CONFIG_VFIO_PCI_IGD extern int vfio_pci_igd_init(struct vfio_pci_core_device *vdev); #else static inline int vfio_pci_igd_init(struct vfio_pci_core_device *vdev) { return -ENODEV; } #endif #ifdef CONFIG_VFIO_PCI_ZDEV_KVM extern int vfio_pci_info_zdev_add_caps(struct vfio_pci_core_device *vdev, struct vfio_info_cap *caps); int vfio_pci_zdev_open_device(struct vfio_pci_core_device *vdev); void vfio_pci_zdev_close_device(struct vfio_pci_core_device *vdev); #else static inline int vfio_pci_info_zdev_add_caps(struct vfio_pci_core_device *vdev, struct vfio_info_cap *caps) { return -ENODEV; } static inline int vfio_pci_zdev_open_device(struct vfio_pci_core_device *vdev) { return 0; } static inline void vfio_pci_zdev_close_device(struct vfio_pci_core_device *vdev) {} #endif /* Will be exported for vfio pci drivers usage */ void vfio_pci_core_set_params(bool nointxmask, bool is_disable_vga, bool is_disable_idle_d3); void vfio_pci_core_close_device(struct vfio_device *core_vdev); void vfio_pci_core_init_device(struct vfio_pci_core_device *vdev, struct pci_dev *pdev, const struct vfio_device_ops *vfio_pci_ops); int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev); void vfio_pci_core_uninit_device(struct vfio_pci_core_device *vdev); void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev); int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn); extern const struct pci_error_handlers vfio_pci_core_err_handlers; long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd, unsigned long arg); ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf, size_t count, loff_t *ppos); ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf, size_t count, loff_t *ppos); int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma); void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count); int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); static inline bool vfio_pci_is_vga(struct pci_dev *pdev) { return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA; } #endif /* VFIO_PCI_CORE_H */ PK ! �S� crc64.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * See lib/crc64.c for the related specification and polynomial arithmetic. */ #ifndef _LINUX_CRC64_H #define _LINUX_CRC64_H #include <linux/types.h> u64 __pure crc64_be(u64 crc, const void *p, size_t len); #endif /* _LINUX_CRC64_H */ PK ! + 5�U U page_ext.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PAGE_EXT_H #define __LINUX_PAGE_EXT_H #include <linux/types.h> #include <linux/stacktrace.h> #include <linux/stackdepot.h> struct pglist_data; struct page_ext_operations { size_t offset; size_t size; bool (*need)(void); void (*init)(void); }; #ifdef CONFIG_PAGE_EXTENSION enum page_ext_flags { PAGE_EXT_OWNER, PAGE_EXT_OWNER_ALLOCATED, #if defined(CONFIG_PAGE_IDLE_FLAG) && !defined(CONFIG_64BIT) PAGE_EXT_YOUNG, PAGE_EXT_IDLE, #endif }; /* * Page Extension can be considered as an extended mem_map. * A page_ext page is associated with every page descriptor. The * page_ext helps us add more information about the page. * All page_ext are allocated at boot or memory hotplug event, * then the page_ext for pfn always exists. */ struct page_ext { unsigned long flags; }; extern unsigned long page_ext_size; extern void pgdat_page_ext_init(struct pglist_data *pgdat); #ifdef CONFIG_SPARSEMEM static inline void page_ext_init_flatmem(void) { } extern void page_ext_init(void); static inline void page_ext_init_flatmem_late(void) { } #else extern void page_ext_init_flatmem(void); extern void page_ext_init_flatmem_late(void); static inline void page_ext_init(void) { } #endif struct page_ext *lookup_page_ext(const struct page *page); static inline struct page_ext *page_ext_next(struct page_ext *curr) { void *next = curr; next += page_ext_size; return next; } #else /* !CONFIG_PAGE_EXTENSION */ struct page_ext; static inline void pgdat_page_ext_init(struct pglist_data *pgdat) { } static inline struct page_ext *lookup_page_ext(const struct page *page) { return NULL; } static inline void page_ext_init(void) { } static inline void page_ext_init_flatmem_late(void) { } static inline void page_ext_init_flatmem(void) { } #endif /* CONFIG_PAGE_EXTENSION */ #endif /* __LINUX_PAGE_EXT_H */ PK ! ��]g+ + netdev_features.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Network device features. */ #ifndef _LINUX_NETDEV_FEATURES_H #define _LINUX_NETDEV_FEATURES_H #include <linux/types.h> #include <linux/bitops.h> #include <asm/byteorder.h> typedef u64 netdev_features_t; enum { NETIF_F_SG_BIT, /* Scatter/gather IO. */ NETIF_F_IP_CSUM_BIT, /* Can checksum TCP/UDP over IPv4. */ __UNUSED_NETIF_F_1, NETIF_F_HW_CSUM_BIT, /* Can checksum all the packets. */ NETIF_F_IPV6_CSUM_BIT, /* Can checksum TCP/UDP over IPV6 */ NETIF_F_HIGHDMA_BIT, /* Can DMA to high memory. */ NETIF_F_FRAGLIST_BIT, /* Scatter/gather IO. */ NETIF_F_HW_VLAN_CTAG_TX_BIT, /* Transmit VLAN CTAG HW acceleration */ NETIF_F_HW_VLAN_CTAG_RX_BIT, /* Receive VLAN CTAG HW acceleration */ NETIF_F_HW_VLAN_CTAG_FILTER_BIT,/* Receive filtering on VLAN CTAGs */ NETIF_F_VLAN_CHALLENGED_BIT, /* Device cannot handle VLAN packets */ NETIF_F_GSO_BIT, /* Enable software GSO. */ NETIF_F_LLTX_BIT, /* LockLess TX - deprecated. Please */ /* do not use LLTX in new drivers */ NETIF_F_NETNS_LOCAL_BIT, /* Does not change network namespaces */ NETIF_F_GRO_BIT, /* Generic receive offload */ NETIF_F_LRO_BIT, /* large receive offload */ /**/NETIF_F_GSO_SHIFT, /* keep the order of SKB_GSO_* bits */ NETIF_F_TSO_BIT /* ... TCPv4 segmentation */ = NETIF_F_GSO_SHIFT, NETIF_F_GSO_ROBUST_BIT, /* ... ->SKB_GSO_DODGY */ NETIF_F_TSO_ECN_BIT, /* ... TCP ECN support */ NETIF_F_TSO_MANGLEID_BIT, /* ... IPV4 ID mangling allowed */ NETIF_F_TSO6_BIT, /* ... TCPv6 segmentation */ NETIF_F_FSO_BIT, /* ... FCoE segmentation */ NETIF_F_GSO_GRE_BIT, /* ... GRE with TSO */ NETIF_F_GSO_GRE_CSUM_BIT, /* ... GRE with csum with TSO */ NETIF_F_GSO_IPXIP4_BIT, /* ... IP4 or IP6 over IP4 with TSO */ NETIF_F_GSO_IPXIP6_BIT, /* ... IP4 or IP6 over IP6 with TSO */ NETIF_F_GSO_UDP_TUNNEL_BIT, /* ... UDP TUNNEL with TSO */ NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT,/* ... UDP TUNNEL with TSO & CSUM */ NETIF_F_GSO_PARTIAL_BIT, /* ... Only segment inner-most L4 * in hardware and all other * headers in software. */ NETIF_F_GSO_TUNNEL_REMCSUM_BIT, /* ... TUNNEL with TSO & REMCSUM */ NETIF_F_GSO_SCTP_BIT, /* ... SCTP fragmentation */ NETIF_F_GSO_ESP_BIT, /* ... ESP with TSO */ NETIF_F_GSO_UDP_BIT, /* ... UFO, deprecated except tuntap */ NETIF_F_GSO_UDP_L4_BIT, /* ... UDP payload GSO (not UFO) */ NETIF_F_GSO_FRAGLIST_BIT, /* ... Fraglist GSO */ /**/NETIF_F_GSO_LAST = /* last bit, see GSO_MASK */ NETIF_F_GSO_FRAGLIST_BIT, NETIF_F_FCOE_CRC_BIT, /* FCoE CRC32 */ NETIF_F_SCTP_CRC_BIT, /* SCTP checksum offload */ NETIF_F_FCOE_MTU_BIT, /* Supports max FCoE MTU, 2158 bytes*/ NETIF_F_NTUPLE_BIT, /* N-tuple filters supported */ NETIF_F_RXHASH_BIT, /* Receive hashing offload */ NETIF_F_RXCSUM_BIT, /* Receive checksumming offload */ NETIF_F_NOCACHE_COPY_BIT, /* Use no-cache copyfromuser */ NETIF_F_LOOPBACK_BIT, /* Enable loopback */ NETIF_F_RXFCS_BIT, /* Append FCS to skb pkt data */ NETIF_F_RXALL_BIT, /* Receive errored frames too */ NETIF_F_HW_VLAN_STAG_TX_BIT, /* Transmit VLAN STAG HW acceleration */ NETIF_F_HW_VLAN_STAG_RX_BIT, /* Receive VLAN STAG HW acceleration */ NETIF_F_HW_VLAN_STAG_FILTER_BIT,/* Receive filtering on VLAN STAGs */ NETIF_F_HW_L2FW_DOFFLOAD_BIT, /* Allow L2 Forwarding in Hardware */ NETIF_F_HW_TC_BIT, /* Offload TC infrastructure */ NETIF_F_HW_ESP_BIT, /* Hardware ESP transformation offload */ NETIF_F_HW_ESP_TX_CSUM_BIT, /* ESP with TX checksum offload */ NETIF_F_RX_UDP_TUNNEL_PORT_BIT, /* Offload of RX port for UDP tunnels */ NETIF_F_HW_TLS_TX_BIT, /* Hardware TLS TX offload */ NETIF_F_HW_TLS_RX_BIT, /* Hardware TLS RX offload */ NETIF_F_GRO_HW_BIT, /* Hardware Generic receive offload */ NETIF_F_HW_TLS_RECORD_BIT, /* Offload TLS record */ NETIF_F_GRO_FRAGLIST_BIT, /* Fraglist GRO */ NETIF_F_HW_MACSEC_BIT, /* Offload MACsec operations */ NETIF_F_GRO_UDP_FWD_BIT, /* Allow UDP GRO for forwarding */ NETIF_F_HW_HSR_TAG_INS_BIT, /* Offload HSR tag insertion */ NETIF_F_HW_HSR_TAG_RM_BIT, /* Offload HSR tag removal */ NETIF_F_HW_HSR_FWD_BIT, /* Offload HSR forwarding */ NETIF_F_HW_HSR_DUP_BIT, /* Offload HSR duplication */ /* * Add your fresh new feature above and remember to update * netdev_features_strings[] in net/ethtool/common.c and maybe * some feature mask #defines below. Please also describe it * in Documentation/networking/netdev-features.rst. */ /**/NETDEV_FEATURE_COUNT }; /* copy'n'paste compression ;) */ #define __NETIF_F_BIT(bit) ((netdev_features_t)1 << (bit)) #define __NETIF_F(name) __NETIF_F_BIT(NETIF_F_##name##_BIT) #define NETIF_F_FCOE_CRC __NETIF_F(FCOE_CRC) #define NETIF_F_FCOE_MTU __NETIF_F(FCOE_MTU) #define NETIF_F_FRAGLIST __NETIF_F(FRAGLIST) #define NETIF_F_FSO __NETIF_F(FSO) #define NETIF_F_GRO __NETIF_F(GRO) #define NETIF_F_GRO_HW __NETIF_F(GRO_HW) #define NETIF_F_GSO __NETIF_F(GSO) #define NETIF_F_GSO_ROBUST __NETIF_F(GSO_ROBUST) #define NETIF_F_HIGHDMA __NETIF_F(HIGHDMA) #define NETIF_F_HW_CSUM __NETIF_F(HW_CSUM) #define NETIF_F_HW_VLAN_CTAG_FILTER __NETIF_F(HW_VLAN_CTAG_FILTER) #define NETIF_F_HW_VLAN_CTAG_RX __NETIF_F(HW_VLAN_CTAG_RX) #define NETIF_F_HW_VLAN_CTAG_TX __NETIF_F(HW_VLAN_CTAG_TX) #define NETIF_F_IP_CSUM __NETIF_F(IP_CSUM) #define NETIF_F_IPV6_CSUM __NETIF_F(IPV6_CSUM) #define NETIF_F_LLTX __NETIF_F(LLTX) #define NETIF_F_LOOPBACK __NETIF_F(LOOPBACK) #define NETIF_F_LRO __NETIF_F(LRO) #define NETIF_F_NETNS_LOCAL __NETIF_F(NETNS_LOCAL) #define NETIF_F_NOCACHE_COPY __NETIF_F(NOCACHE_COPY) #define NETIF_F_NTUPLE __NETIF_F(NTUPLE) #define NETIF_F_RXCSUM __NETIF_F(RXCSUM) #define NETIF_F_RXHASH __NETIF_F(RXHASH) #define NETIF_F_SCTP_CRC __NETIF_F(SCTP_CRC) #define NETIF_F_SG __NETIF_F(SG) #define NETIF_F_TSO6 __NETIF_F(TSO6) #define NETIF_F_TSO_ECN __NETIF_F(TSO_ECN) #define NETIF_F_TSO __NETIF_F(TSO) #define NETIF_F_VLAN_CHALLENGED __NETIF_F(VLAN_CHALLENGED) #define NETIF_F_RXFCS __NETIF_F(RXFCS) #define NETIF_F_RXALL __NETIF_F(RXALL) #define NETIF_F_GSO_GRE __NETIF_F(GSO_GRE) #define NETIF_F_GSO_GRE_CSUM __NETIF_F(GSO_GRE_CSUM) #define NETIF_F_GSO_IPXIP4 __NETIF_F(GSO_IPXIP4) #define NETIF_F_GSO_IPXIP6 __NETIF_F(GSO_IPXIP6) #define NETIF_F_GSO_UDP_TUNNEL __NETIF_F(GSO_UDP_TUNNEL) #define NETIF_F_GSO_UDP_TUNNEL_CSUM __NETIF_F(GSO_UDP_TUNNEL_CSUM) #define NETIF_F_TSO_MANGLEID __NETIF_F(TSO_MANGLEID) #define NETIF_F_GSO_PARTIAL __NETIF_F(GSO_PARTIAL) #define NETIF_F_GSO_TUNNEL_REMCSUM __NETIF_F(GSO_TUNNEL_REMCSUM) #define NETIF_F_GSO_SCTP __NETIF_F(GSO_SCTP) #define NETIF_F_GSO_ESP __NETIF_F(GSO_ESP) #define NETIF_F_GSO_UDP __NETIF_F(GSO_UDP) #define NETIF_F_HW_VLAN_STAG_FILTER __NETIF_F(HW_VLAN_STAG_FILTER) #define NETIF_F_HW_VLAN_STAG_RX __NETIF_F(HW_VLAN_STAG_RX) #define NETIF_F_HW_VLAN_STAG_TX __NETIF_F(HW_VLAN_STAG_TX) #define NETIF_F_HW_L2FW_DOFFLOAD __NETIF_F(HW_L2FW_DOFFLOAD) #define NETIF_F_HW_TC __NETIF_F(HW_TC) #define NETIF_F_HW_ESP __NETIF_F(HW_ESP) #define NETIF_F_HW_ESP_TX_CSUM __NETIF_F(HW_ESP_TX_CSUM) #define NETIF_F_RX_UDP_TUNNEL_PORT __NETIF_F(RX_UDP_TUNNEL_PORT) #define NETIF_F_HW_TLS_RECORD __NETIF_F(HW_TLS_RECORD) #define NETIF_F_GSO_UDP_L4 __NETIF_F(GSO_UDP_L4) #define NETIF_F_HW_TLS_TX __NETIF_F(HW_TLS_TX) #define NETIF_F_HW_TLS_RX __NETIF_F(HW_TLS_RX) #define NETIF_F_GRO_FRAGLIST __NETIF_F(GRO_FRAGLIST) #define NETIF_F_GSO_FRAGLIST __NETIF_F(GSO_FRAGLIST) #define NETIF_F_HW_MACSEC __NETIF_F(HW_MACSEC) #define NETIF_F_GRO_UDP_FWD __NETIF_F(GRO_UDP_FWD) #define NETIF_F_HW_HSR_TAG_INS __NETIF_F(HW_HSR_TAG_INS) #define NETIF_F_HW_HSR_TAG_RM __NETIF_F(HW_HSR_TAG_RM) #define NETIF_F_HW_HSR_FWD __NETIF_F(HW_HSR_FWD) #define NETIF_F_HW_HSR_DUP __NETIF_F(HW_HSR_DUP) /* Finds the next feature with the highest number of the range of start-1 till 0. */ static inline int find_next_netdev_feature(u64 feature, unsigned long start) { /* like BITMAP_LAST_WORD_MASK() for u64 * this sets the most significant 64 - start to 0. */ feature &= ~0ULL >> (-start & ((sizeof(feature) * 8) - 1)); return fls64(feature) - 1; } /* This goes for the MSB to the LSB through the set feature bits, * mask_addr should be a u64 and bit an int */ #define for_each_netdev_feature(mask_addr, bit) \ for ((bit) = find_next_netdev_feature((mask_addr), \ NETDEV_FEATURE_COUNT); \ (bit) >= 0; \ (bit) = find_next_netdev_feature((mask_addr), (bit))) /* Features valid for ethtool to change */ /* = all defined minus driver/device-class-related */ #define NETIF_F_NEVER_CHANGE (NETIF_F_VLAN_CHALLENGED | \ NETIF_F_LLTX | NETIF_F_NETNS_LOCAL) /* remember that ((t)1 << t_BITS) is undefined in C99 */ #define NETIF_F_ETHTOOL_BITS ((__NETIF_F_BIT(NETDEV_FEATURE_COUNT - 1) | \ (__NETIF_F_BIT(NETDEV_FEATURE_COUNT - 1) - 1)) & \ ~NETIF_F_NEVER_CHANGE) /* Segmentation offload feature mask */ #define NETIF_F_GSO_MASK (__NETIF_F_BIT(NETIF_F_GSO_LAST + 1) - \ __NETIF_F_BIT(NETIF_F_GSO_SHIFT)) /* List of IP checksum features. Note that NETIF_F_HW_CSUM should not be * set in features when NETIF_F_IP_CSUM or NETIF_F_IPV6_CSUM are set-- * this would be contradictory */ #define NETIF_F_CSUM_MASK (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \ NETIF_F_HW_CSUM) #define NETIF_F_ALL_TSO (NETIF_F_TSO | NETIF_F_TSO6 | \ NETIF_F_TSO_ECN | NETIF_F_TSO_MANGLEID) #define NETIF_F_ALL_FCOE (NETIF_F_FCOE_CRC | NETIF_F_FCOE_MTU | \ NETIF_F_FSO) /* List of features with software fallbacks. */ #define NETIF_F_GSO_SOFTWARE (NETIF_F_ALL_TSO | NETIF_F_GSO_SCTP | \ NETIF_F_GSO_UDP_L4 | NETIF_F_GSO_FRAGLIST) /* * If one device supports one of these features, then enable them * for all in netdev_increment_features. */ #define NETIF_F_ONE_FOR_ALL (NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_ROBUST | \ NETIF_F_SG | NETIF_F_HIGHDMA | \ NETIF_F_FRAGLIST | NETIF_F_VLAN_CHALLENGED) /* * If one device doesn't support one of these features, then disable it * for all in netdev_increment_features. */ #define NETIF_F_ALL_FOR_ALL (NETIF_F_NOCACHE_COPY | NETIF_F_FSO) /* * If upper/master device has these features disabled, they must be disabled * on all lower/slave devices as well. */ #define NETIF_F_UPPER_DISABLES NETIF_F_LRO /* changeable features with no special hardware requirements */ #define NETIF_F_SOFT_FEATURES (NETIF_F_GSO | NETIF_F_GRO) /* Changeable features with no special hardware requirements that defaults to off. */ #define NETIF_F_SOFT_FEATURES_OFF (NETIF_F_GRO_FRAGLIST | NETIF_F_GRO_UDP_FWD) #define NETIF_F_VLAN_FEATURES (NETIF_F_HW_VLAN_CTAG_FILTER | \ NETIF_F_HW_VLAN_CTAG_RX | \ NETIF_F_HW_VLAN_CTAG_TX | \ NETIF_F_HW_VLAN_STAG_FILTER | \ NETIF_F_HW_VLAN_STAG_RX | \ NETIF_F_HW_VLAN_STAG_TX) #define NETIF_F_GSO_ENCAP_ALL (NETIF_F_GSO_GRE | \ NETIF_F_GSO_GRE_CSUM | \ NETIF_F_GSO_IPXIP4 | \ NETIF_F_GSO_IPXIP6 | \ NETIF_F_GSO_UDP_TUNNEL | \ NETIF_F_GSO_UDP_TUNNEL_CSUM) #endif /* _LINUX_NETDEV_FEATURES_H */ PK ! D|ۼr r restart_block.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Common syscall restarting data */ #ifndef __LINUX_RESTART_BLOCK_H #define __LINUX_RESTART_BLOCK_H #include <linux/compiler.h> #include <linux/types.h> #include <linux/time64.h> struct timespec; struct old_timespec32; struct pollfd; enum timespec_type { TT_NONE = 0, TT_NATIVE = 1, TT_COMPAT = 2, }; /* * System call restart block. */ struct restart_block { unsigned long arch_data; long (*fn)(struct restart_block *); union { /* For futex_wait and futex_wait_requeue_pi */ struct { u32 __user *uaddr; u32 val; u32 flags; u32 bitset; u64 time; u32 __user *uaddr2; } futex; /* For nanosleep */ struct { clockid_t clockid; enum timespec_type type; union { struct __kernel_timespec __user *rmtp; struct old_timespec32 __user *compat_rmtp; }; u64 expires; } nanosleep; /* For poll */ struct { struct pollfd __user *ufds; int nfds; int has_timeout; unsigned long tv_sec; unsigned long tv_nsec; } poll; }; }; extern long do_no_restart_syscall(struct restart_block *parm); #endif /* __LINUX_RESTART_BLOCK_H */ PK ! P6Ny y seg6.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SEG6_H #define _LINUX_SEG6_H #include <uapi/linux/seg6.h> #endif PK ! �Fx]* * pagevec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/pagevec.h * * In many places it is efficient to batch an operation up against multiple * pages. A pagevec is a multipage container which is used for that. */ #ifndef _LINUX_PAGEVEC_H #define _LINUX_PAGEVEC_H #include <linux/xarray.h> /* 15 pointers + header align the pagevec structure to a power of two */ #define PAGEVEC_SIZE 15 struct page; struct address_space; struct pagevec { unsigned char nr; bool percpu_pvec_drained; struct page *pages[PAGEVEC_SIZE]; }; void __pagevec_release(struct pagevec *pvec); void __pagevec_lru_add(struct pagevec *pvec); void pagevec_remove_exceptionals(struct pagevec *pvec); unsigned pagevec_lookup_range(struct pagevec *pvec, struct address_space *mapping, pgoff_t *start, pgoff_t end); static inline unsigned pagevec_lookup(struct pagevec *pvec, struct address_space *mapping, pgoff_t *start) { return pagevec_lookup_range(pvec, mapping, start, (pgoff_t)-1); } unsigned pagevec_lookup_range_tag(struct pagevec *pvec, struct address_space *mapping, pgoff_t *index, pgoff_t end, xa_mark_t tag); static inline unsigned pagevec_lookup_tag(struct pagevec *pvec, struct address_space *mapping, pgoff_t *index, xa_mark_t tag) { return pagevec_lookup_range_tag(pvec, mapping, index, (pgoff_t)-1, tag); } static inline void pagevec_init(struct pagevec *pvec) { pvec->nr = 0; pvec->percpu_pvec_drained = false; } static inline void pagevec_reinit(struct pagevec *pvec) { pvec->nr = 0; } static inline unsigned pagevec_count(struct pagevec *pvec) { return pvec->nr; } static inline unsigned pagevec_space(struct pagevec *pvec) { return PAGEVEC_SIZE - pvec->nr; } /* * Add a page to a pagevec. Returns the number of slots still available. */ static inline unsigned pagevec_add(struct pagevec *pvec, struct page *page) { pvec->pages[pvec->nr++] = page; return pagevec_space(pvec); } static inline void pagevec_release(struct pagevec *pvec) { if (pagevec_count(pvec)) __pagevec_release(pvec); } #endif /* _LINUX_PAGEVEC_H */ PK ! }�'� � slub_def.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SLUB_DEF_H #define _LINUX_SLUB_DEF_H /* * SLUB : A Slab allocator without object queues. * * (C) 2007 SGI, Christoph Lameter */ #include <linux/kfence.h> #include <linux/kobject.h> #include <linux/reciprocal_div.h> #include <linux/local_lock.h> enum stat_item { ALLOC_FASTPATH, /* Allocation from cpu slab */ ALLOC_SLOWPATH, /* Allocation by getting a new cpu slab */ FREE_FASTPATH, /* Free to cpu slab */ FREE_SLOWPATH, /* Freeing not to cpu slab */ FREE_FROZEN, /* Freeing to frozen slab */ FREE_ADD_PARTIAL, /* Freeing moves slab to partial list */ FREE_REMOVE_PARTIAL, /* Freeing removes last object */ ALLOC_FROM_PARTIAL, /* Cpu slab acquired from node partial list */ ALLOC_SLAB, /* Cpu slab acquired from page allocator */ ALLOC_REFILL, /* Refill cpu slab from slab freelist */ ALLOC_NODE_MISMATCH, /* Switching cpu slab */ FREE_SLAB, /* Slab freed to the page allocator */ CPUSLAB_FLUSH, /* Abandoning of the cpu slab */ DEACTIVATE_FULL, /* Cpu slab was full when deactivated */ DEACTIVATE_EMPTY, /* Cpu slab was empty when deactivated */ DEACTIVATE_TO_HEAD, /* Cpu slab was moved to the head of partials */ DEACTIVATE_TO_TAIL, /* Cpu slab was moved to the tail of partials */ DEACTIVATE_REMOTE_FREES,/* Slab contained remotely freed objects */ DEACTIVATE_BYPASS, /* Implicit deactivation */ ORDER_FALLBACK, /* Number of times fallback was necessary */ CMPXCHG_DOUBLE_CPU_FAIL,/* Failure of this_cpu_cmpxchg_double */ CMPXCHG_DOUBLE_FAIL, /* Number of times that cmpxchg double did not match */ CPU_PARTIAL_ALLOC, /* Used cpu partial on alloc */ CPU_PARTIAL_FREE, /* Refill cpu partial on free */ CPU_PARTIAL_NODE, /* Refill cpu partial from node partial */ CPU_PARTIAL_DRAIN, /* Drain cpu partial to node partial */ NR_SLUB_STAT_ITEMS }; /* * When changing the layout, make sure freelist and tid are still compatible * with this_cpu_cmpxchg_double() alignment requirements. */ struct kmem_cache_cpu { void **freelist; /* Pointer to next available object */ unsigned long tid; /* Globally unique transaction id */ struct page *page; /* The slab from which we are allocating */ #ifdef CONFIG_SLUB_CPU_PARTIAL struct page *partial; /* Partially allocated frozen slabs */ #endif local_lock_t lock; /* Protects the fields above */ #ifdef CONFIG_SLUB_STATS unsigned stat[NR_SLUB_STAT_ITEMS]; #endif }; #ifdef CONFIG_SLUB_CPU_PARTIAL #define slub_percpu_partial(c) ((c)->partial) #define slub_set_percpu_partial(c, p) \ ({ \ slub_percpu_partial(c) = (p)->next; \ }) #define slub_percpu_partial_read_once(c) READ_ONCE(slub_percpu_partial(c)) #else #define slub_percpu_partial(c) NULL #define slub_set_percpu_partial(c, p) #define slub_percpu_partial_read_once(c) NULL #endif // CONFIG_SLUB_CPU_PARTIAL /* * Word size structure that can be atomically updated or read and that * contains both the order and the number of objects that a slab of the * given order would contain. */ struct kmem_cache_order_objects { unsigned int x; }; /* * Slab cache management. */ struct kmem_cache { struct kmem_cache_cpu __percpu *cpu_slab; /* Used for retrieving partial slabs, etc. */ slab_flags_t flags; unsigned long min_partial; unsigned int size; /* The size of an object including metadata */ unsigned int object_size;/* The size of an object without metadata */ struct reciprocal_value reciprocal_size; unsigned int offset; /* Free pointer offset */ #ifdef CONFIG_SLUB_CPU_PARTIAL /* Number of per cpu partial objects to keep around */ unsigned int cpu_partial; #endif struct kmem_cache_order_objects oo; /* Allocation and freeing of slabs */ struct kmem_cache_order_objects max; struct kmem_cache_order_objects min; gfp_t allocflags; /* gfp flags to use on each alloc */ int refcount; /* Refcount for slab cache destroy */ void (*ctor)(void *); unsigned int inuse; /* Offset to metadata */ unsigned int align; /* Alignment */ unsigned int red_left_pad; /* Left redzone padding size */ const char *name; /* Name (only for display!) */ struct list_head list; /* List of slab caches */ #ifdef CONFIG_SYSFS struct kobject kobj; /* For sysfs */ #endif #ifdef CONFIG_SLAB_FREELIST_HARDENED unsigned long random; #endif #ifdef CONFIG_NUMA /* * Defragmentation by allocating from a remote node. */ unsigned int remote_node_defrag_ratio; #endif #ifdef CONFIG_SLAB_FREELIST_RANDOM unsigned int *random_seq; #endif #ifdef CONFIG_KASAN struct kasan_cache kasan_info; #endif unsigned int useroffset; /* Usercopy region offset */ unsigned int usersize; /* Usercopy region size */ struct kmem_cache_node *node[MAX_NUMNODES]; }; #ifdef CONFIG_SLUB_CPU_PARTIAL #define slub_cpu_partial(s) ((s)->cpu_partial) #define slub_set_cpu_partial(s, n) \ ({ \ slub_cpu_partial(s) = (n); \ }) #else #define slub_cpu_partial(s) (0) #define slub_set_cpu_partial(s, n) #endif /* CONFIG_SLUB_CPU_PARTIAL */ #ifdef CONFIG_SYSFS #define SLAB_SUPPORTS_SYSFS void sysfs_slab_unlink(struct kmem_cache *); void sysfs_slab_release(struct kmem_cache *); #else static inline void sysfs_slab_unlink(struct kmem_cache *s) { } static inline void sysfs_slab_release(struct kmem_cache *s) { } #endif void object_err(struct kmem_cache *s, struct page *page, u8 *object, char *reason); void *fixup_red_left(struct kmem_cache *s, void *p); static inline void *nearest_obj(struct kmem_cache *cache, struct page *page, void *x) { void *object = x - (x - page_address(page)) % cache->size; void *last_object = page_address(page) + (page->objects - 1) * cache->size; void *result = (unlikely(object > last_object)) ? last_object : object; result = fixup_red_left(cache, result); return result; } /* Determine object index from a given position */ static inline unsigned int __obj_to_index(const struct kmem_cache *cache, void *addr, void *obj) { return reciprocal_divide(kasan_reset_tag(obj) - addr, cache->reciprocal_size); } static inline unsigned int obj_to_index(const struct kmem_cache *cache, const struct page *page, void *obj) { if (is_kfence_address(obj)) return 0; return __obj_to_index(cache, page_address(page), obj); } static inline int objs_per_slab_page(const struct kmem_cache *cache, const struct page *page) { return page->objects; } #endif /* _LINUX_SLUB_DEF_H */ PK ! 6Щ" hwmon-sysfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * hwmon-sysfs.h - hardware monitoring chip driver sysfs defines * * Copyright (C) 2005 Yani Ioannou <yani.ioannou@gmail.com> */ #ifndef _LINUX_HWMON_SYSFS_H #define _LINUX_HWMON_SYSFS_H #include <linux/device.h> struct sensor_device_attribute{ struct device_attribute dev_attr; int index; }; #define to_sensor_dev_attr(_dev_attr) \ container_of(_dev_attr, struct sensor_device_attribute, dev_attr) #define SENSOR_ATTR(_name, _mode, _show, _store, _index) \ { .dev_attr = __ATTR(_name, _mode, _show, _store), \ .index = _index } #define SENSOR_ATTR_RO(_name, _func, _index) \ SENSOR_ATTR(_name, 0444, _func##_show, NULL, _index) #define SENSOR_ATTR_RW(_name, _func, _index) \ SENSOR_ATTR(_name, 0644, _func##_show, _func##_store, _index) #define SENSOR_ATTR_WO(_name, _func, _index) \ SENSOR_ATTR(_name, 0200, NULL, _func##_store, _index) #define SENSOR_DEVICE_ATTR(_name, _mode, _show, _store, _index) \ struct sensor_device_attribute sensor_dev_attr_##_name \ = SENSOR_ATTR(_name, _mode, _show, _store, _index) #define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index) #define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index) #define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index) struct sensor_device_attribute_2 { struct device_attribute dev_attr; u8 index; u8 nr; }; #define to_sensor_dev_attr_2(_dev_attr) \ container_of(_dev_attr, struct sensor_device_attribute_2, dev_attr) #define SENSOR_ATTR_2(_name, _mode, _show, _store, _nr, _index) \ { .dev_attr = __ATTR(_name, _mode, _show, _store), \ .index = _index, \ .nr = _nr } #define SENSOR_ATTR_2_RO(_name, _func, _nr, _index) \ SENSOR_ATTR_2(_name, 0444, _func##_show, NULL, _nr, _index) #define SENSOR_ATTR_2_RW(_name, _func, _nr, _index) \ SENSOR_ATTR_2(_name, 0644, _func##_show, _func##_store, _nr, _index) #define SENSOR_ATTR_2_WO(_name, _func, _nr, _index) \ SENSOR_ATTR_2(_name, 0200, NULL, _func##_store, _nr, _index) #define SENSOR_DEVICE_ATTR_2(_name,_mode,_show,_store,_nr,_index) \ struct sensor_device_attribute_2 sensor_dev_attr_##_name \ = SENSOR_ATTR_2(_name, _mode, _show, _store, _nr, _index) #define SENSOR_DEVICE_ATTR_2_RO(_name, _func, _nr, _index) \ SENSOR_DEVICE_ATTR_2(_name, 0444, _func##_show, NULL, \ _nr, _index) #define SENSOR_DEVICE_ATTR_2_RW(_name, _func, _nr, _index) \ SENSOR_DEVICE_ATTR_2(_name, 0644, _func##_show, _func##_store, \ _nr, _index) #define SENSOR_DEVICE_ATTR_2_WO(_name, _func, _nr, _index) \ SENSOR_DEVICE_ATTR_2(_name, 0200, NULL, _func##_store, \ _nr, _index) #endif /* _LINUX_HWMON_SYSFS_H */ PK ! F�� � linux_logo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_LINUX_LOGO_H #define _LINUX_LINUX_LOGO_H /* * Linux logo to be displayed on boot * * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu) * Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) * Copyright (C) 2001 Greg Banks <gnb@alphalink.com.au> * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de> * Copyright (C) 2003 Geert Uytterhoeven <geert@linux-m68k.org> * * Serial_console ascii image can be any size, * but should contain %s to display the version */ #include <linux/init.h> #define LINUX_LOGO_MONO 1 /* monochrome black/white */ #define LINUX_LOGO_VGA16 2 /* 16 colors VGA text palette */ #define LINUX_LOGO_CLUT224 3 /* 224 colors */ #define LINUX_LOGO_GRAY256 4 /* 256 levels grayscale */ struct linux_logo { int type; /* one of LINUX_LOGO_* */ unsigned int width; unsigned int height; unsigned int clutsize; /* LINUX_LOGO_CLUT224 only */ const unsigned char *clut; /* LINUX_LOGO_CLUT224 only */ const unsigned char *data; }; extern const struct linux_logo logo_linux_mono; extern const struct linux_logo logo_linux_vga16; extern const struct linux_logo logo_linux_clut224; extern const struct linux_logo logo_dec_clut224; extern const struct linux_logo logo_mac_clut224; extern const struct linux_logo logo_parisc_clut224; extern const struct linux_logo logo_sgi_clut224; extern const struct linux_logo logo_sun_clut224; extern const struct linux_logo logo_superh_mono; extern const struct linux_logo logo_superh_vga16; extern const struct linux_logo logo_superh_clut224; extern const struct linux_logo logo_spe_clut224; extern const struct linux_logo *fb_find_logo(int depth); #ifdef CONFIG_FB_LOGO_EXTRA extern void fb_append_extra_logo(const struct linux_logo *logo, unsigned int n); #else static inline void fb_append_extra_logo(const struct linux_logo *logo, unsigned int n) {} #endif #endif /* _LINUX_LINUX_LOGO_H */ PK ! 6�[ �[ sctp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* SCTP kernel reference Implementation * (C) Copyright IBM Corp. 2001, 2004 * Copyright (c) 1999-2000 Cisco, Inc. * Copyright (c) 1999-2001 Motorola, Inc. * Copyright (c) 2001 Intel Corp. * Copyright (c) 2001 Nokia, Inc. * Copyright (c) 2001 La Monte H.P. Yarroll * * This file is part of the SCTP kernel reference Implementation * * Various protocol defined structures. * * Please send any bug reports or fixes you make to the * email address(es): * lksctp developers <linux-sctp@vger.kernel.org> * * Or submit a bug report through the following website: * http://www.sf.net/projects/lksctp * * Written or modified by: * La Monte H.P. Yarroll <piggy@acm.org> * Karl Knutson <karl@athena.chicago.il.us> * Jon Grimm <jgrimm@us.ibm.com> * Xingang Guo <xingang.guo@intel.com> * randall@sctp.chicago.il.us * kmorneau@cisco.com * qxie1@email.mot.com * Sridhar Samudrala <sri@us.ibm.com> * Kevin Gao <kevin.gao@intel.com> * * Any bugs reported given to us we will try to fix... any fixes shared will * be incorporated into the next SCTP release. */ #ifndef __LINUX_SCTP_H__ #define __LINUX_SCTP_H__ #include <linux/in.h> /* We need in_addr. */ #include <linux/in6.h> /* We need in6_addr. */ #include <linux/skbuff.h> #include <uapi/linux/sctp.h> /* Section 3.1. SCTP Common Header Format */ struct sctphdr { __be16 source; __be16 dest; __be32 vtag; __le32 checksum; }; static inline struct sctphdr *sctp_hdr(const struct sk_buff *skb) { return (struct sctphdr *)skb_transport_header(skb); } /* Section 3.2. Chunk Field Descriptions. */ struct sctp_chunkhdr { __u8 type; __u8 flags; __be16 length; }; /* Section 3.2. Chunk Type Values. * [Chunk Type] identifies the type of information contained in the Chunk * Value field. It takes a value from 0 to 254. The value of 255 is * reserved for future use as an extension field. */ enum sctp_cid { SCTP_CID_DATA = 0, SCTP_CID_INIT = 1, SCTP_CID_INIT_ACK = 2, SCTP_CID_SACK = 3, SCTP_CID_HEARTBEAT = 4, SCTP_CID_HEARTBEAT_ACK = 5, SCTP_CID_ABORT = 6, SCTP_CID_SHUTDOWN = 7, SCTP_CID_SHUTDOWN_ACK = 8, SCTP_CID_ERROR = 9, SCTP_CID_COOKIE_ECHO = 10, SCTP_CID_COOKIE_ACK = 11, SCTP_CID_ECN_ECNE = 12, SCTP_CID_ECN_CWR = 13, SCTP_CID_SHUTDOWN_COMPLETE = 14, /* AUTH Extension Section 4.1 */ SCTP_CID_AUTH = 0x0F, /* sctp ndata 5.1. I-DATA */ SCTP_CID_I_DATA = 0x40, /* PR-SCTP Sec 3.2 */ SCTP_CID_FWD_TSN = 0xC0, /* Use hex, as defined in ADDIP sec. 3.1 */ SCTP_CID_ASCONF = 0xC1, SCTP_CID_I_FWD_TSN = 0xC2, SCTP_CID_ASCONF_ACK = 0x80, SCTP_CID_RECONF = 0x82, SCTP_CID_PAD = 0x84, }; /* enum */ /* Section 3.2 * Chunk Types are encoded such that the highest-order two bits specify * the action that must be taken if the processing endpoint does not * recognize the Chunk Type. */ enum { SCTP_CID_ACTION_DISCARD = 0x00, SCTP_CID_ACTION_DISCARD_ERR = 0x40, SCTP_CID_ACTION_SKIP = 0x80, SCTP_CID_ACTION_SKIP_ERR = 0xc0, }; enum { SCTP_CID_ACTION_MASK = 0xc0, }; /* This flag is used in Chunk Flags for ABORT and SHUTDOWN COMPLETE. * * 3.3.7 Abort Association (ABORT) (6): * The T bit is set to 0 if the sender had a TCB that it destroyed. * If the sender did not have a TCB it should set this bit to 1. */ enum { SCTP_CHUNK_FLAG_T = 0x01 }; /* * Set the T bit * * 0 1 2 3 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Type = 14 |Reserved |T| Length = 4 | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * * Chunk Flags: 8 bits * * Reserved: 7 bits * Set to 0 on transmit and ignored on receipt. * * T bit: 1 bit * The T bit is set to 0 if the sender had a TCB that it destroyed. If * the sender did NOT have a TCB it should set this bit to 1. * * Note: Special rules apply to this chunk for verification, please * see Section 8.5.1 for details. */ #define sctp_test_T_bit(c) ((c)->chunk_hdr->flags & SCTP_CHUNK_FLAG_T) /* RFC 2960 * Section 3.2.1 Optional/Variable-length Parmaeter Format. */ struct sctp_paramhdr { __be16 type; __be16 length; }; enum sctp_param { /* RFC 2960 Section 3.3.5 */ SCTP_PARAM_HEARTBEAT_INFO = cpu_to_be16(1), /* RFC 2960 Section 3.3.2.1 */ SCTP_PARAM_IPV4_ADDRESS = cpu_to_be16(5), SCTP_PARAM_IPV6_ADDRESS = cpu_to_be16(6), SCTP_PARAM_STATE_COOKIE = cpu_to_be16(7), SCTP_PARAM_UNRECOGNIZED_PARAMETERS = cpu_to_be16(8), SCTP_PARAM_COOKIE_PRESERVATIVE = cpu_to_be16(9), SCTP_PARAM_HOST_NAME_ADDRESS = cpu_to_be16(11), SCTP_PARAM_SUPPORTED_ADDRESS_TYPES = cpu_to_be16(12), SCTP_PARAM_ECN_CAPABLE = cpu_to_be16(0x8000), /* AUTH Extension Section 3 */ SCTP_PARAM_RANDOM = cpu_to_be16(0x8002), SCTP_PARAM_CHUNKS = cpu_to_be16(0x8003), SCTP_PARAM_HMAC_ALGO = cpu_to_be16(0x8004), /* Add-IP: Supported Extensions, Section 4.2 */ SCTP_PARAM_SUPPORTED_EXT = cpu_to_be16(0x8008), /* PR-SCTP Sec 3.1 */ SCTP_PARAM_FWD_TSN_SUPPORT = cpu_to_be16(0xc000), /* Add-IP Extension. Section 3.2 */ SCTP_PARAM_ADD_IP = cpu_to_be16(0xc001), SCTP_PARAM_DEL_IP = cpu_to_be16(0xc002), SCTP_PARAM_ERR_CAUSE = cpu_to_be16(0xc003), SCTP_PARAM_SET_PRIMARY = cpu_to_be16(0xc004), SCTP_PARAM_SUCCESS_REPORT = cpu_to_be16(0xc005), SCTP_PARAM_ADAPTATION_LAYER_IND = cpu_to_be16(0xc006), /* RE-CONFIG. Section 4 */ SCTP_PARAM_RESET_OUT_REQUEST = cpu_to_be16(0x000d), SCTP_PARAM_RESET_IN_REQUEST = cpu_to_be16(0x000e), SCTP_PARAM_RESET_TSN_REQUEST = cpu_to_be16(0x000f), SCTP_PARAM_RESET_RESPONSE = cpu_to_be16(0x0010), SCTP_PARAM_RESET_ADD_OUT_STREAMS = cpu_to_be16(0x0011), SCTP_PARAM_RESET_ADD_IN_STREAMS = cpu_to_be16(0x0012), }; /* enum */ /* RFC 2960 Section 3.2.1 * The Parameter Types are encoded such that the highest-order two bits * specify the action that must be taken if the processing endpoint does * not recognize the Parameter Type. * */ enum { SCTP_PARAM_ACTION_DISCARD = cpu_to_be16(0x0000), SCTP_PARAM_ACTION_DISCARD_ERR = cpu_to_be16(0x4000), SCTP_PARAM_ACTION_SKIP = cpu_to_be16(0x8000), SCTP_PARAM_ACTION_SKIP_ERR = cpu_to_be16(0xc000), }; enum { SCTP_PARAM_ACTION_MASK = cpu_to_be16(0xc000), }; /* RFC 2960 Section 3.3.1 Payload Data (DATA) (0) */ struct sctp_datahdr { __be32 tsn; __be16 stream; __be16 ssn; __u32 ppid; __u8 payload[]; }; struct sctp_data_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_datahdr data_hdr; }; struct sctp_idatahdr { __be32 tsn; __be16 stream; __be16 reserved; __be32 mid; union { __u32 ppid; __be32 fsn; }; __u8 payload[0]; }; struct sctp_idata_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_idatahdr data_hdr; }; /* DATA Chuck Specific Flags */ enum { SCTP_DATA_MIDDLE_FRAG = 0x00, SCTP_DATA_LAST_FRAG = 0x01, SCTP_DATA_FIRST_FRAG = 0x02, SCTP_DATA_NOT_FRAG = 0x03, SCTP_DATA_UNORDERED = 0x04, SCTP_DATA_SACK_IMM = 0x08, }; enum { SCTP_DATA_FRAG_MASK = 0x03, }; /* RFC 2960 Section 3.3.2 Initiation (INIT) (1) * * This chunk is used to initiate a SCTP association between two * endpoints. */ struct sctp_inithdr { __be32 init_tag; __be32 a_rwnd; __be16 num_outbound_streams; __be16 num_inbound_streams; __be32 initial_tsn; __u8 params[]; }; struct sctp_init_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_inithdr init_hdr; }; /* Section 3.3.2.1. IPv4 Address Parameter (5) */ struct sctp_ipv4addr_param { struct sctp_paramhdr param_hdr; struct in_addr addr; }; /* Section 3.3.2.1. IPv6 Address Parameter (6) */ struct sctp_ipv6addr_param { struct sctp_paramhdr param_hdr; struct in6_addr addr; }; /* Section 3.3.2.1 Cookie Preservative (9) */ struct sctp_cookie_preserve_param { struct sctp_paramhdr param_hdr; __be32 lifespan_increment; }; /* Section 3.3.2.1 Host Name Address (11) */ struct sctp_hostname_param { struct sctp_paramhdr param_hdr; uint8_t hostname[]; }; /* Section 3.3.2.1 Supported Address Types (12) */ struct sctp_supported_addrs_param { struct sctp_paramhdr param_hdr; __be16 types[]; }; /* ADDIP Section 3.2.6 Adaptation Layer Indication */ struct sctp_adaptation_ind_param { struct sctp_paramhdr param_hdr; __be32 adaptation_ind; }; /* ADDIP Section 4.2.7 Supported Extensions Parameter */ struct sctp_supported_ext_param { struct sctp_paramhdr param_hdr; __u8 chunks[]; }; /* AUTH Section 3.1 Random */ struct sctp_random_param { struct sctp_paramhdr param_hdr; __u8 random_val[]; }; /* AUTH Section 3.2 Chunk List */ struct sctp_chunks_param { struct sctp_paramhdr param_hdr; __u8 chunks[]; }; /* AUTH Section 3.3 HMAC Algorithm */ struct sctp_hmac_algo_param { struct sctp_paramhdr param_hdr; __be16 hmac_ids[]; }; /* RFC 2960. Section 3.3.3 Initiation Acknowledgement (INIT ACK) (2): * The INIT ACK chunk is used to acknowledge the initiation of an SCTP * association. */ struct sctp_initack_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_inithdr init_hdr; }; /* Section 3.3.3.1 State Cookie (7) */ struct sctp_cookie_param { struct sctp_paramhdr p; __u8 body[]; }; /* Section 3.3.3.1 Unrecognized Parameters (8) */ struct sctp_unrecognized_param { struct sctp_paramhdr param_hdr; struct sctp_paramhdr unrecognized; }; /* * 3.3.4 Selective Acknowledgement (SACK) (3): * * This chunk is sent to the peer endpoint to acknowledge received DATA * chunks and to inform the peer endpoint of gaps in the received * subsequences of DATA chunks as represented by their TSNs. */ struct sctp_gap_ack_block { __be16 start; __be16 end; }; union sctp_sack_variable { struct sctp_gap_ack_block gab; __be32 dup; }; struct sctp_sackhdr { __be32 cum_tsn_ack; __be32 a_rwnd; __be16 num_gap_ack_blocks; __be16 num_dup_tsns; union sctp_sack_variable variable[]; }; struct sctp_sack_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_sackhdr sack_hdr; }; /* RFC 2960. Section 3.3.5 Heartbeat Request (HEARTBEAT) (4): * * An endpoint should send this chunk to its peer endpoint to probe the * reachability of a particular destination transport address defined in * the present association. */ struct sctp_heartbeathdr { struct sctp_paramhdr info; }; struct sctp_heartbeat_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_heartbeathdr hb_hdr; }; /* PAD chunk could be bundled with heartbeat chunk to probe pmtu */ struct sctp_pad_chunk { struct sctp_chunkhdr uh; }; /* For the abort and shutdown ACK we must carry the init tag in the * common header. Just the common header is all that is needed with a * chunk descriptor. */ struct sctp_abort_chunk { struct sctp_chunkhdr uh; }; /* For the graceful shutdown we must carry the tag (in common header) * and the highest consecutive acking value. */ struct sctp_shutdownhdr { __be32 cum_tsn_ack; }; struct sctp_shutdown_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_shutdownhdr shutdown_hdr; }; /* RFC 2960. Section 3.3.10 Operation Error (ERROR) (9) */ struct sctp_errhdr { __be16 cause; __be16 length; __u8 variable[]; }; struct sctp_operr_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_errhdr err_hdr; }; /* RFC 2960 3.3.10 - Operation Error * * Cause Code: 16 bits (unsigned integer) * * Defines the type of error conditions being reported. * Cause Code * Value Cause Code * --------- ---------------- * 1 Invalid Stream Identifier * 2 Missing Mandatory Parameter * 3 Stale Cookie Error * 4 Out of Resource * 5 Unresolvable Address * 6 Unrecognized Chunk Type * 7 Invalid Mandatory Parameter * 8 Unrecognized Parameters * 9 No User Data * 10 Cookie Received While Shutting Down */ enum sctp_error { SCTP_ERROR_NO_ERROR = cpu_to_be16(0x00), SCTP_ERROR_INV_STRM = cpu_to_be16(0x01), SCTP_ERROR_MISS_PARAM = cpu_to_be16(0x02), SCTP_ERROR_STALE_COOKIE = cpu_to_be16(0x03), SCTP_ERROR_NO_RESOURCE = cpu_to_be16(0x04), SCTP_ERROR_DNS_FAILED = cpu_to_be16(0x05), SCTP_ERROR_UNKNOWN_CHUNK = cpu_to_be16(0x06), SCTP_ERROR_INV_PARAM = cpu_to_be16(0x07), SCTP_ERROR_UNKNOWN_PARAM = cpu_to_be16(0x08), SCTP_ERROR_NO_DATA = cpu_to_be16(0x09), SCTP_ERROR_COOKIE_IN_SHUTDOWN = cpu_to_be16(0x0a), /* SCTP Implementation Guide: * 11 Restart of an association with new addresses * 12 User Initiated Abort * 13 Protocol Violation * 14 Restart of an Association with New Encapsulation Port */ SCTP_ERROR_RESTART = cpu_to_be16(0x0b), SCTP_ERROR_USER_ABORT = cpu_to_be16(0x0c), SCTP_ERROR_PROTO_VIOLATION = cpu_to_be16(0x0d), SCTP_ERROR_NEW_ENCAP_PORT = cpu_to_be16(0x0e), /* ADDIP Section 3.3 New Error Causes * * Four new Error Causes are added to the SCTP Operational Errors, * primarily for use in the ASCONF-ACK chunk. * * Value Cause Code * --------- ---------------- * 0x00A0 Request to Delete Last Remaining IP Address. * 0x00A1 Operation Refused Due to Resource Shortage. * 0x00A2 Request to Delete Source IP Address. * 0x00A3 Association Aborted due to illegal ASCONF-ACK * 0x00A4 Request refused - no authorization. */ SCTP_ERROR_DEL_LAST_IP = cpu_to_be16(0x00A0), SCTP_ERROR_RSRC_LOW = cpu_to_be16(0x00A1), SCTP_ERROR_DEL_SRC_IP = cpu_to_be16(0x00A2), SCTP_ERROR_ASCONF_ACK = cpu_to_be16(0x00A3), SCTP_ERROR_REQ_REFUSED = cpu_to_be16(0x00A4), /* AUTH Section 4. New Error Cause * * This section defines a new error cause that will be sent if an AUTH * chunk is received with an unsupported HMAC identifier. * illustrates the new error cause. * * Cause Code Error Cause Name * -------------------------------------------------------------- * 0x0105 Unsupported HMAC Identifier */ SCTP_ERROR_UNSUP_HMAC = cpu_to_be16(0x0105) }; /* RFC 2960. Appendix A. Explicit Congestion Notification. * Explicit Congestion Notification Echo (ECNE) (12) */ struct sctp_ecnehdr { __be32 lowest_tsn; }; struct sctp_ecne_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_ecnehdr ence_hdr; }; /* RFC 2960. Appendix A. Explicit Congestion Notification. * Congestion Window Reduced (CWR) (13) */ struct sctp_cwrhdr { __be32 lowest_tsn; }; /* PR-SCTP * 3.2 Forward Cumulative TSN Chunk Definition (FORWARD TSN) * * Forward Cumulative TSN chunk has the following format: * * 0 1 2 3 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Type = 192 | Flags = 0x00 | Length = Variable | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | New Cumulative TSN | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Stream-1 | Stream Sequence-1 | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * \ / * / \ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Stream-N | Stream Sequence-N | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * * Chunk Flags: * * Set to all zeros on transmit and ignored on receipt. * * New Cumulative TSN: 32 bit u_int * * This indicates the new cumulative TSN to the data receiver. Upon * the reception of this value, the data receiver MUST consider * any missing TSNs earlier than or equal to this value as received * and stop reporting them as gaps in any subsequent SACKs. * * Stream-N: 16 bit u_int * * This field holds a stream number that was skipped by this * FWD-TSN. * * Stream Sequence-N: 16 bit u_int * This field holds the sequence number associated with the stream * that was skipped. The stream sequence field holds the largest stream * sequence number in this stream being skipped. The receiver of * the FWD-TSN's can use the Stream-N and Stream Sequence-N fields * to enable delivery of any stranded TSN's that remain on the stream * re-ordering queues. This field MUST NOT report TSN's corresponding * to DATA chunk that are marked as unordered. For ordered DATA * chunks this field MUST be filled in. */ struct sctp_fwdtsn_skip { __be16 stream; __be16 ssn; }; struct sctp_fwdtsn_hdr { __be32 new_cum_tsn; struct sctp_fwdtsn_skip skip[]; }; struct sctp_fwdtsn_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_fwdtsn_hdr fwdtsn_hdr; }; struct sctp_ifwdtsn_skip { __be16 stream; __u8 reserved; __u8 flags; __be32 mid; }; struct sctp_ifwdtsn_hdr { __be32 new_cum_tsn; struct sctp_ifwdtsn_skip skip[]; }; struct sctp_ifwdtsn_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_ifwdtsn_hdr fwdtsn_hdr; }; /* ADDIP * Section 3.1.1 Address Configuration Change Chunk (ASCONF) * * Serial Number: 32 bits (unsigned integer) * This value represents a Serial Number for the ASCONF Chunk. The * valid range of Serial Number is from 0 to 2^32-1. * Serial Numbers wrap back to 0 after reaching 2^32 -1. * * Address Parameter: 8 or 20 bytes (depending on type) * The address is an address of the sender of the ASCONF chunk, * the address MUST be considered part of the association by the * peer endpoint. This field may be used by the receiver of the * ASCONF to help in finding the association. This parameter MUST * be present in every ASCONF message i.e. it is a mandatory TLV * parameter. * * ASCONF Parameter: TLV format * Each Address configuration change is represented by a TLV * parameter as defined in Section 3.2. One or more requests may * be present in an ASCONF Chunk. * * Section 3.1.2 Address Configuration Acknowledgement Chunk (ASCONF-ACK) * * Serial Number: 32 bits (unsigned integer) * This value represents the Serial Number for the received ASCONF * Chunk that is acknowledged by this chunk. This value is copied * from the received ASCONF Chunk. * * ASCONF Parameter Response: TLV format * The ASCONF Parameter Response is used in the ASCONF-ACK to * report status of ASCONF processing. */ struct sctp_addip_param { struct sctp_paramhdr param_hdr; __be32 crr_id; }; struct sctp_addiphdr { __be32 serial; __u8 params[]; }; struct sctp_addip_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_addiphdr addip_hdr; }; /* AUTH * Section 4.1 Authentication Chunk (AUTH) * * This chunk is used to hold the result of the HMAC calculation. * * 0 1 2 3 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Type = 0x0F | Flags=0 | Length | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Shared Key Identifier | HMAC Identifier | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | | * \ HMAC / * / \ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * * Type: 1 byte (unsigned integer) * This value MUST be set to 0x0F for all AUTH-chunks. * * Flags: 1 byte (unsigned integer) * Set to zero on transmit and ignored on receipt. * * Length: 2 bytes (unsigned integer) * This value holds the length of the HMAC in bytes plus 8. * * Shared Key Identifier: 2 bytes (unsigned integer) * This value describes which endpoint pair shared key is used. * * HMAC Identifier: 2 bytes (unsigned integer) * This value describes which message digest is being used. Table 2 * shows the currently defined values. * * The following Table 2 shows the currently defined values for HMAC * identifiers. * * +-----------------+--------------------------+ * | HMAC Identifier | Message Digest Algorithm | * +-----------------+--------------------------+ * | 0 | Reserved | * | 1 | SHA-1 defined in [8] | * | 2 | Reserved | * | 3 | SHA-256 defined in [8] | * +-----------------+--------------------------+ * * * HMAC: n bytes (unsigned integer) This hold the result of the HMAC * calculation. */ struct sctp_authhdr { __be16 shkey_id; __be16 hmac_id; __u8 hmac[]; }; struct sctp_auth_chunk { struct sctp_chunkhdr chunk_hdr; struct sctp_authhdr auth_hdr; }; struct sctp_infox { struct sctp_info *sctpinfo; struct sctp_association *asoc; }; struct sctp_reconf_chunk { struct sctp_chunkhdr chunk_hdr; __u8 params[]; }; struct sctp_strreset_outreq { struct sctp_paramhdr param_hdr; __be32 request_seq; __be32 response_seq; __be32 send_reset_at_tsn; __be16 list_of_streams[]; }; struct sctp_strreset_inreq { struct sctp_paramhdr param_hdr; __be32 request_seq; __be16 list_of_streams[]; }; struct sctp_strreset_tsnreq { struct sctp_paramhdr param_hdr; __be32 request_seq; }; struct sctp_strreset_addstrm { struct sctp_paramhdr param_hdr; __be32 request_seq; __be16 number_of_streams; __be16 reserved; }; enum { SCTP_STRRESET_NOTHING_TO_DO = 0x00, SCTP_STRRESET_PERFORMED = 0x01, SCTP_STRRESET_DENIED = 0x02, SCTP_STRRESET_ERR_WRONG_SSN = 0x03, SCTP_STRRESET_ERR_IN_PROGRESS = 0x04, SCTP_STRRESET_ERR_BAD_SEQNO = 0x05, SCTP_STRRESET_IN_PROGRESS = 0x06, }; struct sctp_strreset_resp { struct sctp_paramhdr param_hdr; __be32 response_seq; __be32 result; }; struct sctp_strreset_resptsn { struct sctp_paramhdr param_hdr; __be32 response_seq; __be32 result; __be32 senders_next_tsn; __be32 receivers_next_tsn; }; enum { SCTP_DSCP_SET_MASK = 0x1, SCTP_DSCP_VAL_MASK = 0xfc, SCTP_FLOWLABEL_SET_MASK = 0x100000, SCTP_FLOWLABEL_VAL_MASK = 0xfffff }; /* UDP Encapsulation * draft-tuexen-tsvwg-sctp-udp-encaps-cons-03.html#section-4-4 * * The error cause indicating an "Restart of an Association with * New Encapsulation Port" * * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Cause Code = 14 | Cause Length = 8 | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | Current Encapsulation Port | New Encapsulation Port | * +-------------------------------+-------------------------------+ */ struct sctp_new_encap_port_hdr { __be16 cur_port; __be16 new_port; }; #endif /* __LINUX_SCTP_H__ */ PK ! �E�/� � tsacct_kern.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * tsacct_kern.h - kernel header for system accounting over taskstats interface * * Copyright (C) Jay Lan SGI */ #ifndef _LINUX_TSACCT_KERN_H #define _LINUX_TSACCT_KERN_H #include <linux/taskstats.h> #ifdef CONFIG_TASKSTATS extern void bacct_add_tsk(struct user_namespace *user_ns, struct pid_namespace *pid_ns, struct taskstats *stats, struct task_struct *tsk); #else static inline void bacct_add_tsk(struct user_namespace *user_ns, struct pid_namespace *pid_ns, struct taskstats *stats, struct task_struct *tsk) {} #endif /* CONFIG_TASKSTATS */ #ifdef CONFIG_TASK_XACCT extern void xacct_add_tsk(struct taskstats *stats, struct task_struct *p); extern void acct_update_integrals(struct task_struct *tsk); extern void acct_account_cputime(struct task_struct *tsk); extern void acct_clear_integrals(struct task_struct *tsk); #else static inline void xacct_add_tsk(struct taskstats *stats, struct task_struct *p) {} static inline void acct_update_integrals(struct task_struct *tsk) {} static inline void acct_account_cputime(struct task_struct *tsk) {} static inline void acct_clear_integrals(struct task_struct *tsk) {} #endif /* CONFIG_TASK_XACCT */ #endif PK ! ���� � mISDNhw.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * * Author Karsten Keil <kkeil@novell.com> * * Basic declarations for the mISDN HW channels * * Copyright 2008 by Karsten Keil <kkeil@novell.com> */ #ifndef MISDNHW_H #define MISDNHW_H #include <linux/mISDNif.h> #include <linux/timer.h> /* * HW DEBUG 0xHHHHGGGG * H - hardware driver specific bits * G - for all drivers */ #define DEBUG_HW 0x00000001 #define DEBUG_HW_OPEN 0x00000002 #define DEBUG_HW_DCHANNEL 0x00000100 #define DEBUG_HW_DFIFO 0x00000200 #define DEBUG_HW_BCHANNEL 0x00001000 #define DEBUG_HW_BFIFO 0x00002000 #define MAX_DFRAME_LEN_L1 300 #define MAX_MON_FRAME 32 #define MAX_LOG_SPACE 2048 #define MISDN_COPY_SIZE 32 /* channel->Flags bit field */ #define FLG_TX_BUSY 0 /* tx_buf in use */ #define FLG_TX_NEXT 1 /* next_skb in use */ #define FLG_L1_BUSY 2 /* L1 is permanent busy */ #define FLG_L2_ACTIVATED 3 /* activated from L2 */ #define FLG_OPEN 5 /* channel is in use */ #define FLG_ACTIVE 6 /* channel is activated */ #define FLG_BUSY_TIMER 7 /* channel type */ #define FLG_DCHANNEL 8 /* channel is D-channel */ #define FLG_BCHANNEL 9 /* channel is B-channel */ #define FLG_ECHANNEL 10 /* channel is E-channel */ #define FLG_TRANSPARENT 12 /* channel use transparent data */ #define FLG_HDLC 13 /* channel use hdlc data */ #define FLG_L2DATA 14 /* channel use L2 DATA primitivs */ #define FLG_ORIGIN 15 /* channel is on origin site */ /* channel specific stuff */ #define FLG_FILLEMPTY 16 /* fill fifo on first frame (empty) */ /* arcofi specific */ #define FLG_ARCOFI_TIMER 17 #define FLG_ARCOFI_ERROR 18 /* isar specific */ #define FLG_INITIALIZED 17 #define FLG_DLEETX 18 #define FLG_LASTDLE 19 #define FLG_FIRST 20 #define FLG_LASTDATA 21 #define FLG_NMD_DATA 22 #define FLG_FTI_RUN 23 #define FLG_LL_OK 24 #define FLG_LL_CONN 25 #define FLG_DTMFSEND 26 #define FLG_TX_EMPTY 27 /* stop sending received data upstream */ #define FLG_RX_OFF 28 /* workq events */ #define FLG_RECVQUEUE 30 #define FLG_PHCHANGE 31 #define schedule_event(s, ev) do { \ test_and_set_bit(ev, &((s)->Flags)); \ schedule_work(&((s)->workq)); \ } while (0) struct dchannel { struct mISDNdevice dev; u_long Flags; struct work_struct workq; void (*phfunc) (struct dchannel *); u_int state; void *l1; void *hw; int slot; /* multiport card channel slot */ struct timer_list timer; /* receive data */ struct sk_buff *rx_skb; int maxlen; /* send data */ struct sk_buff_head squeue; struct sk_buff_head rqueue; struct sk_buff *tx_skb; int tx_idx; int debug; /* statistics */ int err_crc; int err_tx; int err_rx; }; typedef int (dchannel_l1callback)(struct dchannel *, u_int); extern int create_l1(struct dchannel *, dchannel_l1callback *); /* private L1 commands */ #define INFO0 0x8002 #define INFO1 0x8102 #define INFO2 0x8202 #define INFO3_P8 0x8302 #define INFO3_P10 0x8402 #define INFO4_P8 0x8502 #define INFO4_P10 0x8602 #define LOSTFRAMING 0x8702 #define ANYSIGNAL 0x8802 #define HW_POWERDOWN 0x8902 #define HW_RESET_REQ 0x8a02 #define HW_POWERUP_REQ 0x8b02 #define HW_DEACT_REQ 0x8c02 #define HW_ACTIVATE_REQ 0x8e02 #define HW_D_NOBLOCKED 0x8f02 #define HW_RESET_IND 0x9002 #define HW_POWERUP_IND 0x9102 #define HW_DEACT_IND 0x9202 #define HW_ACTIVATE_IND 0x9302 #define HW_DEACT_CNF 0x9402 #define HW_TESTLOOP 0x9502 #define HW_TESTRX_RAW 0x9602 #define HW_TESTRX_HDLC 0x9702 #define HW_TESTRX_OFF 0x9802 #define HW_TIMER3_IND 0x9902 #define HW_TIMER3_VALUE 0x9a00 #define HW_TIMER3_VMASK 0x00FF struct layer1; extern int l1_event(struct layer1 *, u_int); #define MISDN_BCH_FILL_SIZE 4 struct bchannel { struct mISDNchannel ch; int nr; u_long Flags; struct work_struct workq; u_int state; void *hw; int slot; /* multiport card channel slot */ struct timer_list timer; /* receive data */ u8 fill[MISDN_BCH_FILL_SIZE]; struct sk_buff *rx_skb; unsigned short maxlen; unsigned short init_maxlen; /* initial value */ unsigned short next_maxlen; /* pending value */ unsigned short minlen; /* for transparent data */ unsigned short init_minlen; /* initial value */ unsigned short next_minlen; /* pending value */ /* send data */ struct sk_buff *next_skb; struct sk_buff *tx_skb; struct sk_buff_head rqueue; int rcount; int tx_idx; int debug; /* statistics */ int err_crc; int err_tx; int err_rx; int dropcnt; }; extern int mISDN_initdchannel(struct dchannel *, int, void *); extern int mISDN_initbchannel(struct bchannel *, unsigned short, unsigned short); extern int mISDN_freedchannel(struct dchannel *); extern void mISDN_clear_bchannel(struct bchannel *); extern void mISDN_freebchannel(struct bchannel *); extern int mISDN_ctrl_bchannel(struct bchannel *, struct mISDN_ctrl_req *); extern void queue_ch_frame(struct mISDNchannel *, u_int, int, struct sk_buff *); extern int dchannel_senddata(struct dchannel *, struct sk_buff *); extern int bchannel_senddata(struct bchannel *, struct sk_buff *); extern int bchannel_get_rxbuf(struct bchannel *, int); extern void recv_Dchannel(struct dchannel *); extern void recv_Echannel(struct dchannel *, struct dchannel *); extern void recv_Bchannel(struct bchannel *, unsigned int, bool); extern void recv_Dchannel_skb(struct dchannel *, struct sk_buff *); extern void recv_Bchannel_skb(struct bchannel *, struct sk_buff *); extern int get_next_bframe(struct bchannel *); extern int get_next_dframe(struct dchannel *); #endif PK ! xv֣ poll.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_POLL_H #define _LINUX_POLL_H #include <linux/compiler.h> #include <linux/ktime.h> #include <linux/wait.h> #include <linux/string.h> #include <linux/fs.h> #include <linux/sysctl.h> #include <linux/uaccess.h> #include <uapi/linux/poll.h> #include <uapi/linux/eventpoll.h> extern struct ctl_table epoll_table[]; /* for sysctl */ /* ~832 bytes of stack space used max in sys_select/sys_poll before allocating additional memory. */ #define MAX_STACK_ALLOC 832 #define FRONTEND_STACK_ALLOC 256 #define SELECT_STACK_ALLOC FRONTEND_STACK_ALLOC #define POLL_STACK_ALLOC FRONTEND_STACK_ALLOC #define WQUEUES_STACK_ALLOC (MAX_STACK_ALLOC - FRONTEND_STACK_ALLOC) #define N_INLINE_POLL_ENTRIES (WQUEUES_STACK_ALLOC / sizeof(struct poll_table_entry)) #define DEFAULT_POLLMASK (EPOLLIN | EPOLLOUT | EPOLLRDNORM | EPOLLWRNORM) struct poll_table_struct; /* * structures and helpers for f_op->poll implementations */ typedef void (*poll_queue_proc)(struct file *, wait_queue_head_t *, struct poll_table_struct *); /* * Do not touch the structure directly, use the access functions * poll_does_not_wait() and poll_requested_events() instead. */ typedef struct poll_table_struct { poll_queue_proc _qproc; __poll_t _key; } poll_table; static inline void poll_wait(struct file * filp, wait_queue_head_t * wait_address, poll_table *p) { if (p && p->_qproc && wait_address) { p->_qproc(filp, wait_address, p); /* * This memory barrier is paired in the wq_has_sleeper(). * See the comment above prepare_to_wait(), we need to * ensure that subsequent tests in this thread can't be * reordered with __add_wait_queue() in _qproc() paths. */ smp_mb(); } } /* * Return true if it is guaranteed that poll will not wait. This is the case * if the poll() of another file descriptor in the set got an event, so there * is no need for waiting. */ static inline bool poll_does_not_wait(const poll_table *p) { return p == NULL || p->_qproc == NULL; } /* * Return the set of events that the application wants to poll for. * This is useful for drivers that need to know whether a DMA transfer has * to be started implicitly on poll(). You typically only want to do that * if the application is actually polling for POLLIN and/or POLLOUT. */ static inline __poll_t poll_requested_events(const poll_table *p) { return p ? p->_key : ~(__poll_t)0; } static inline void init_poll_funcptr(poll_table *pt, poll_queue_proc qproc) { pt->_qproc = qproc; pt->_key = ~(__poll_t)0; /* all events enabled */ } static inline bool file_can_poll(struct file *file) { return file->f_op->poll; } static inline __poll_t vfs_poll(struct file *file, struct poll_table_struct *pt) { if (unlikely(!file->f_op->poll)) return DEFAULT_POLLMASK; return file->f_op->poll(file, pt); } struct poll_table_entry { struct file *filp; __poll_t key; wait_queue_entry_t wait; wait_queue_head_t *wait_address; }; /* * Structures and helpers for select/poll syscall */ struct poll_wqueues { poll_table pt; struct poll_table_page *table; struct task_struct *polling_task; int triggered; int error; int inline_index; struct poll_table_entry inline_entries[N_INLINE_POLL_ENTRIES]; }; extern void poll_initwait(struct poll_wqueues *pwq); extern void poll_freewait(struct poll_wqueues *pwq); extern u64 select_estimate_accuracy(struct timespec64 *tv); #define MAX_INT64_SECONDS (((s64)(~((u64)0)>>1)/HZ)-1) extern int core_sys_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timespec64 *end_time); extern int poll_select_set_timeout(struct timespec64 *to, time64_t sec, long nsec); #define __MAP(v, from, to) \ (from < to ? (v & from) * (to/from) : (v & from) / (from/to)) static inline __u16 mangle_poll(__poll_t val) { __u16 v = (__force __u16)val; #define M(X) __MAP(v, (__force __u16)EPOLL##X, POLL##X) return M(IN) | M(OUT) | M(PRI) | M(ERR) | M(NVAL) | M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) | M(HUP) | M(RDHUP) | M(MSG); #undef M } static inline __poll_t demangle_poll(u16 val) { #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X) return M(IN) | M(OUT) | M(PRI) | M(ERR) | M(NVAL) | M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) | M(HUP) | M(RDHUP) | M(MSG); #undef M } #undef __MAP #endif /* _LINUX_POLL_H */ PK ! QH��� � ahci_platform.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * AHCI SATA platform driver * * Copyright 2004-2005 Red Hat, Inc. * Jeff Garzik <jgarzik@pobox.com> * Copyright 2010 MontaVista Software, LLC. * Anton Vorontsov <avorontsov@ru.mvista.com> */ #ifndef _AHCI_PLATFORM_H #define _AHCI_PLATFORM_H #include <linux/compiler.h> struct device; struct ata_port_info; struct ahci_host_priv; struct platform_device; struct scsi_host_template; int ahci_platform_enable_phys(struct ahci_host_priv *hpriv); void ahci_platform_disable_phys(struct ahci_host_priv *hpriv); int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); void ahci_platform_disable_clks(struct ahci_host_priv *hpriv); int ahci_platform_deassert_rsts(struct ahci_host_priv *hpriv); int ahci_platform_assert_rsts(struct ahci_host_priv *hpriv); int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv); void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv); int ahci_platform_enable_resources(struct ahci_host_priv *hpriv); void ahci_platform_disable_resources(struct ahci_host_priv *hpriv); struct ahci_host_priv *ahci_platform_get_resources( struct platform_device *pdev, unsigned int flags); int ahci_platform_init_host(struct platform_device *pdev, struct ahci_host_priv *hpriv, const struct ata_port_info *pi_template, struct scsi_host_template *sht); void ahci_platform_shutdown(struct platform_device *pdev); int ahci_platform_suspend_host(struct device *dev); int ahci_platform_resume_host(struct device *dev); int ahci_platform_suspend(struct device *dev); int ahci_platform_resume(struct device *dev); #define AHCI_PLATFORM_GET_RESETS BIT(0) #define AHCI_PLATFORM_RST_TRIGGER BIT(1) #endif /* _AHCI_PLATFORM_H */ PK ! �6� dtlk.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #define DTLK_MINOR 0 #define DTLK_IO_EXTENT 0x02 /* ioctl's use magic number of 0xa3 */ #define DTLK_INTERROGATE 0xa390 /* get settings from the DoubleTalk */ #define DTLK_STATUS 0xa391 /* get status from the DoubleTalk */ #define DTLK_CLEAR 0x18 /* stops speech */ #define DTLK_MAX_RETRIES (loops_per_jiffy/(10000/HZ)) /* TTS Port Status Flags */ #define TTS_READABLE 0x80 /* mask for bit which is nonzero if a byte can be read from the TTS port */ #define TTS_SPEAKING 0x40 /* mask for SYNC bit, which is nonzero while DoubleTalk is producing output with TTS, PCM or CVSD synthesizers or tone generators (that is, all but LPC) */ #define TTS_SPEAKING2 0x20 /* mask for SYNC2 bit, which falls to zero up to 0.4 sec before speech stops */ #define TTS_WRITABLE 0x10 /* mask for RDY bit, which when set to 1, indicates the TTS port is ready to accept a byte of data. The RDY bit goes zero 2-3 usec after writing, and goes 1 again 180-190 usec later. */ #define TTS_ALMOST_FULL 0x08 /* mask for AF bit: When set to 1, indicates that less than 300 free bytes are available in the TTS input buffer. AF is always 0 in the PCM, TGN and CVSD modes. */ #define TTS_ALMOST_EMPTY 0x04 /* mask for AE bit: When set to 1, indicates that less than 300 bytes of data remain in DoubleTalk's input (TTS or PCM) buffer. AE is always 1 in the TGN and CVSD modes. */ /* LPC speak commands */ #define LPC_5220_NORMAL 0x60 /* 5220 format decoding table, normal rate */ #define LPC_5220_FAST 0x64 /* 5220 format decoding table, fast rate */ #define LPC_D6_NORMAL 0x20 /* D6 format decoding table, normal rate */ #define LPC_D6_FAST 0x24 /* D6 format decoding table, fast rate */ /* LPC Port Status Flags (valid only after one of the LPC speak commands) */ #define LPC_SPEAKING 0x80 /* mask for TS bit: When set to 1, indicates the LPC synthesizer is producing speech.*/ #define LPC_BUFFER_LOW 0x40 /* mask for BL bit: When set to 1, indicates that the hardware LPC data buffer has less than 30 bytes remaining. (Total internal buffer size = 4096 bytes.) */ #define LPC_BUFFER_EMPTY 0x20 /* mask for BE bit: When set to 1, indicates that the LPC data buffer ran out of data (error condition if TS is also 1). */ /* data returned by Interrogate command */ struct dtlk_settings { unsigned short serial_number; /* 0-7Fh:0-7Fh */ unsigned char rom_version[24]; /* null terminated string */ unsigned char mode; /* 0=Character; 1=Phoneme; 2=Text */ unsigned char punc_level; /* nB; 0-7 */ unsigned char formant_freq; /* nF; 0-9 */ unsigned char pitch; /* nP; 0-99 */ unsigned char speed; /* nS; 0-9 */ unsigned char volume; /* nV; 0-9 */ unsigned char tone; /* nX; 0-2 */ unsigned char expression; /* nE; 0-9 */ unsigned char ext_dict_loaded; /* 1=exception dictionary loaded */ unsigned char ext_dict_status; /* 1=exception dictionary enabled */ unsigned char free_ram; /* # pages (truncated) remaining for text buffer */ unsigned char articulation; /* nA; 0-9 */ unsigned char reverb; /* nR; 0-9 */ unsigned char eob; /* 7Fh value indicating end of parameter block */ unsigned char has_indexing; /* nonzero if indexing is implemented */ }; PK ! ~���� � elf-fdpic.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* FDPIC ELF load map * * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) */ #ifndef _LINUX_ELF_FDPIC_H #define _LINUX_ELF_FDPIC_H #include <uapi/linux/elf-fdpic.h> /* * binfmt binary parameters structure */ struct elf_fdpic_params { struct elfhdr hdr; /* ref copy of ELF header */ struct elf_phdr *phdrs; /* ref copy of PT_PHDR table */ struct elf32_fdpic_loadmap *loadmap; /* loadmap to be passed to userspace */ unsigned long elfhdr_addr; /* mapped ELF header user address */ unsigned long ph_addr; /* mapped PT_PHDR user address */ unsigned long map_addr; /* mapped loadmap user address */ unsigned long entry_addr; /* mapped entry user address */ unsigned long stack_size; /* stack size requested (PT_GNU_STACK) */ unsigned long dynamic_addr; /* mapped PT_DYNAMIC user address */ unsigned long load_addr; /* user address at which to map binary */ unsigned long flags; #define ELF_FDPIC_FLAG_ARRANGEMENT 0x0000000f /* PT_LOAD arrangement flags */ #define ELF_FDPIC_FLAG_INDEPENDENT 0x00000000 /* PT_LOADs can be put anywhere */ #define ELF_FDPIC_FLAG_HONOURVADDR 0x00000001 /* PT_LOAD.vaddr must be honoured */ #define ELF_FDPIC_FLAG_CONSTDISP 0x00000002 /* PT_LOADs require constant * displacement */ #define ELF_FDPIC_FLAG_CONTIGUOUS 0x00000003 /* PT_LOADs should be contiguous */ #define ELF_FDPIC_FLAG_EXEC_STACK 0x00000010 /* T if stack to be executable */ #define ELF_FDPIC_FLAG_NOEXEC_STACK 0x00000020 /* T if stack not to be executable */ #define ELF_FDPIC_FLAG_EXECUTABLE 0x00000040 /* T if this object is the executable */ #define ELF_FDPIC_FLAG_PRESENT 0x80000000 /* T if this object is present */ }; #ifdef CONFIG_MMU extern void elf_fdpic_arch_lay_out_mm(struct elf_fdpic_params *exec_params, struct elf_fdpic_params *interp_params, unsigned long *start_stack, unsigned long *start_brk); #endif #endif /* _LINUX_ELF_FDPIC_H */ PK ! �v�R� � i2c-algo-pcf.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* ------------------------------------------------------------------------- */ /* adap-pcf.h i2c driver algorithms for PCF8584 adapters */ /* ------------------------------------------------------------------------- */ /* Copyright (C) 1995-97 Simon G. Vogl 1998-99 Hans Berglund */ /* ------------------------------------------------------------------------- */ /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even Frodo Looijaard <frodol@dds.nl> */ #ifndef _LINUX_I2C_ALGO_PCF_H #define _LINUX_I2C_ALGO_PCF_H struct i2c_algo_pcf_data { void *data; /* private data for lolevel routines */ void (*setpcf) (void *data, int ctl, int val); int (*getpcf) (void *data, int ctl); int (*getown) (void *data); int (*getclock) (void *data); void (*waitforpin) (void *data); void (*xfer_begin) (void *data); void (*xfer_end) (void *data); /* Multi-master lost arbitration back-off delay (msecs) * This should be set by the bus adapter or knowledgable client * if bus is multi-mastered, else zero */ unsigned long lab_mdelay; }; int i2c_pcf_add_bus(struct i2c_adapter *); #endif /* _LINUX_I2C_ALGO_PCF_H */ PK ! ��C 7 7 usb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_USB_H #define __LINUX_USB_H #include <linux/mod_devicetable.h> #include <linux/usb/ch9.h> #define USB_MAJOR 180 #define USB_DEVICE_MAJOR 189 #ifdef __KERNEL__ #include <linux/errno.h> /* for -ENODEV */ #include <linux/delay.h> /* for mdelay() */ #include <linux/interrupt.h> /* for in_interrupt() */ #include <linux/list.h> /* for struct list_head */ #include <linux/kref.h> /* for struct kref */ #include <linux/device.h> /* for struct device */ #include <linux/fs.h> /* for struct file_operations */ #include <linux/completion.h> /* for struct completion */ #include <linux/sched.h> /* for current && schedule_timeout */ #include <linux/mutex.h> /* for struct mutex */ #include <linux/pm_runtime.h> /* for runtime PM */ struct usb_device; struct usb_driver; struct wusb_dev; /*-------------------------------------------------------------------------*/ /* * Host-side wrappers for standard USB descriptors ... these are parsed * from the data provided by devices. Parsing turns them from a flat * sequence of descriptors into a hierarchy: * * - devices have one (usually) or more configs; * - configs have one (often) or more interfaces; * - interfaces have one (usually) or more settings; * - each interface setting has zero or (usually) more endpoints. * - a SuperSpeed endpoint has a companion descriptor * * And there might be other descriptors mixed in with those. * * Devices may also have class-specific or vendor-specific descriptors. */ struct ep_device; /** * struct usb_host_endpoint - host-side endpoint descriptor and queue * @desc: descriptor for this endpoint, wMaxPacketSize in native byteorder * @ss_ep_comp: SuperSpeed companion descriptor for this endpoint * @ssp_isoc_ep_comp: SuperSpeedPlus isoc companion descriptor for this endpoint * @urb_list: urbs queued to this endpoint; maintained by usbcore * @hcpriv: for use by HCD; typically holds hardware dma queue head (QH) * with one or more transfer descriptors (TDs) per urb * @ep_dev: ep_device for sysfs info * @extra: descriptors following this endpoint in the configuration * @extralen: how many bytes of "extra" are valid * @enabled: URBs may be submitted to this endpoint * @streams: number of USB-3 streams allocated on the endpoint * * USB requests are always queued to a given endpoint, identified by a * descriptor within an active interface in a given USB configuration. */ struct usb_host_endpoint { struct usb_endpoint_descriptor desc; struct usb_ss_ep_comp_descriptor ss_ep_comp; struct usb_ssp_isoc_ep_comp_descriptor ssp_isoc_ep_comp; struct list_head urb_list; void *hcpriv; struct ep_device *ep_dev; /* For sysfs info */ unsigned char *extra; /* Extra descriptors */ int extralen; int enabled; int streams; }; /* host-side wrapper for one interface setting's parsed descriptors */ struct usb_host_interface { struct usb_interface_descriptor desc; int extralen; unsigned char *extra; /* Extra descriptors */ /* array of desc.bNumEndpoints endpoints associated with this * interface setting. these will be in no particular order. */ struct usb_host_endpoint *endpoint; char *string; /* iInterface string, if present */ }; enum usb_interface_condition { USB_INTERFACE_UNBOUND = 0, USB_INTERFACE_BINDING, USB_INTERFACE_BOUND, USB_INTERFACE_UNBINDING, }; int __must_check usb_find_common_endpoints(struct usb_host_interface *alt, struct usb_endpoint_descriptor **bulk_in, struct usb_endpoint_descriptor **bulk_out, struct usb_endpoint_descriptor **int_in, struct usb_endpoint_descriptor **int_out); int __must_check usb_find_common_endpoints_reverse(struct usb_host_interface *alt, struct usb_endpoint_descriptor **bulk_in, struct usb_endpoint_descriptor **bulk_out, struct usb_endpoint_descriptor **int_in, struct usb_endpoint_descriptor **int_out); static inline int __must_check usb_find_bulk_in_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **bulk_in) { return usb_find_common_endpoints(alt, bulk_in, NULL, NULL, NULL); } static inline int __must_check usb_find_bulk_out_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **bulk_out) { return usb_find_common_endpoints(alt, NULL, bulk_out, NULL, NULL); } static inline int __must_check usb_find_int_in_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **int_in) { return usb_find_common_endpoints(alt, NULL, NULL, int_in, NULL); } static inline int __must_check usb_find_int_out_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **int_out) { return usb_find_common_endpoints(alt, NULL, NULL, NULL, int_out); } static inline int __must_check usb_find_last_bulk_in_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **bulk_in) { return usb_find_common_endpoints_reverse(alt, bulk_in, NULL, NULL, NULL); } static inline int __must_check usb_find_last_bulk_out_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **bulk_out) { return usb_find_common_endpoints_reverse(alt, NULL, bulk_out, NULL, NULL); } static inline int __must_check usb_find_last_int_in_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **int_in) { return usb_find_common_endpoints_reverse(alt, NULL, NULL, int_in, NULL); } static inline int __must_check usb_find_last_int_out_endpoint(struct usb_host_interface *alt, struct usb_endpoint_descriptor **int_out) { return usb_find_common_endpoints_reverse(alt, NULL, NULL, NULL, int_out); } /** * struct usb_interface - what usb device drivers talk to * @altsetting: array of interface structures, one for each alternate * setting that may be selected. Each one includes a set of * endpoint configurations. They will be in no particular order. * @cur_altsetting: the current altsetting. * @num_altsetting: number of altsettings defined. * @intf_assoc: interface association descriptor * @minor: the minor number assigned to this interface, if this * interface is bound to a driver that uses the USB major number. * If this interface does not use the USB major, this field should * be unused. The driver should set this value in the probe() * function of the driver, after it has been assigned a minor * number from the USB core by calling usb_register_dev(). * @condition: binding state of the interface: not bound, binding * (in probe()), bound to a driver, or unbinding (in disconnect()) * @sysfs_files_created: sysfs attributes exist * @ep_devs_created: endpoint child pseudo-devices exist * @unregistering: flag set when the interface is being unregistered * @needs_remote_wakeup: flag set when the driver requires remote-wakeup * capability during autosuspend. * @needs_altsetting0: flag set when a set-interface request for altsetting 0 * has been deferred. * @needs_binding: flag set when the driver should be re-probed or unbound * following a reset or suspend operation it doesn't support. * @authorized: This allows to (de)authorize individual interfaces instead * a whole device in contrast to the device authorization. * @dev: driver model's view of this device * @usb_dev: if an interface is bound to the USB major, this will point * to the sysfs representation for that device. * @reset_ws: Used for scheduling resets from atomic context. * @resetting_device: USB core reset the device, so use alt setting 0 as * current; needs bandwidth alloc after reset. * * USB device drivers attach to interfaces on a physical device. Each * interface encapsulates a single high level function, such as feeding * an audio stream to a speaker or reporting a change in a volume control. * Many USB devices only have one interface. The protocol used to talk to * an interface's endpoints can be defined in a usb "class" specification, * or by a product's vendor. The (default) control endpoint is part of * every interface, but is never listed among the interface's descriptors. * * The driver that is bound to the interface can use standard driver model * calls such as dev_get_drvdata() on the dev member of this structure. * * Each interface may have alternate settings. The initial configuration * of a device sets altsetting 0, but the device driver can change * that setting using usb_set_interface(). Alternate settings are often * used to control the use of periodic endpoints, such as by having * different endpoints use different amounts of reserved USB bandwidth. * All standards-conformant USB devices that use isochronous endpoints * will use them in non-default settings. * * The USB specification says that alternate setting numbers must run from * 0 to one less than the total number of alternate settings. But some * devices manage to mess this up, and the structures aren't necessarily * stored in numerical order anyhow. Use usb_altnum_to_altsetting() to * look up an alternate setting in the altsetting array based on its number. */ struct usb_interface { /* array of alternate settings for this interface, * stored in no particular order */ struct usb_host_interface *altsetting; struct usb_host_interface *cur_altsetting; /* the currently * active alternate setting */ unsigned num_altsetting; /* number of alternate settings */ /* If there is an interface association descriptor then it will list * the associated interfaces */ struct usb_interface_assoc_descriptor *intf_assoc; int minor; /* minor number this interface is * bound to */ enum usb_interface_condition condition; /* state of binding */ unsigned sysfs_files_created:1; /* the sysfs attributes exist */ unsigned ep_devs_created:1; /* endpoint "devices" exist */ unsigned unregistering:1; /* unregistration is in progress */ unsigned needs_remote_wakeup:1; /* driver requires remote wakeup */ unsigned needs_altsetting0:1; /* switch to altsetting 0 is pending */ unsigned needs_binding:1; /* needs delayed unbind/rebind */ unsigned resetting_device:1; /* true: bandwidth alloc after reset */ unsigned authorized:1; /* used for interface authorization */ struct device dev; /* interface specific device info */ struct device *usb_dev; struct work_struct reset_ws; /* for resets in atomic context */ }; #define to_usb_interface(d) container_of(d, struct usb_interface, dev) static inline void *usb_get_intfdata(struct usb_interface *intf) { return dev_get_drvdata(&intf->dev); } static inline void usb_set_intfdata(struct usb_interface *intf, void *data) { dev_set_drvdata(&intf->dev, data); } struct usb_interface *usb_get_intf(struct usb_interface *intf); void usb_put_intf(struct usb_interface *intf); /* Hard limit */ #define USB_MAXENDPOINTS 30 /* this maximum is arbitrary */ #define USB_MAXINTERFACES 32 #define USB_MAXIADS (USB_MAXINTERFACES/2) bool usb_check_bulk_endpoints( const struct usb_interface *intf, const u8 *ep_addrs); bool usb_check_int_endpoints( const struct usb_interface *intf, const u8 *ep_addrs); /* * USB Resume Timer: Every Host controller driver should drive the resume * signalling on the bus for the amount of time defined by this macro. * * That way we will have a 'stable' behavior among all HCDs supported by Linux. * * Note that the USB Specification states we should drive resume for *at least* * 20 ms, but it doesn't give an upper bound. This creates two possible * situations which we want to avoid: * * (a) sometimes an msleep(20) might expire slightly before 20 ms, which causes * us to fail USB Electrical Tests, thus failing Certification * * (b) Some (many) devices actually need more than 20 ms of resume signalling, * and while we can argue that's against the USB Specification, we don't have * control over which devices a certification laboratory will be using for * certification. If CertLab uses a device which was tested against Windows and * that happens to have relaxed resume signalling rules, we might fall into * situations where we fail interoperability and electrical tests. * * In order to avoid both conditions, we're using a 40 ms resume timeout, which * should cope with both LPJ calibration errors and devices not following every * detail of the USB Specification. */ #define USB_RESUME_TIMEOUT 40 /* ms */ /** * struct usb_interface_cache - long-term representation of a device interface * @num_altsetting: number of altsettings defined. * @ref: reference counter. * @altsetting: variable-length array of interface structures, one for * each alternate setting that may be selected. Each one includes a * set of endpoint configurations. They will be in no particular order. * * These structures persist for the lifetime of a usb_device, unlike * struct usb_interface (which persists only as long as its configuration * is installed). The altsetting arrays can be accessed through these * structures at any time, permitting comparison of configurations and * providing support for the /sys/kernel/debug/usb/devices pseudo-file. */ struct usb_interface_cache { unsigned num_altsetting; /* number of alternate settings */ struct kref ref; /* reference counter */ /* variable-length array of alternate settings for this interface, * stored in no particular order */ struct usb_host_interface altsetting[]; }; #define ref_to_usb_interface_cache(r) \ container_of(r, struct usb_interface_cache, ref) #define altsetting_to_usb_interface_cache(a) \ container_of(a, struct usb_interface_cache, altsetting[0]) /** * struct usb_host_config - representation of a device's configuration * @desc: the device's configuration descriptor. * @string: pointer to the cached version of the iConfiguration string, if * present for this configuration. * @intf_assoc: list of any interface association descriptors in this config * @interface: array of pointers to usb_interface structures, one for each * interface in the configuration. The number of interfaces is stored * in desc.bNumInterfaces. These pointers are valid only while the * configuration is active. * @intf_cache: array of pointers to usb_interface_cache structures, one * for each interface in the configuration. These structures exist * for the entire life of the device. * @extra: pointer to buffer containing all extra descriptors associated * with this configuration (those preceding the first interface * descriptor). * @extralen: length of the extra descriptors buffer. * * USB devices may have multiple configurations, but only one can be active * at any time. Each encapsulates a different operational environment; * for example, a dual-speed device would have separate configurations for * full-speed and high-speed operation. The number of configurations * available is stored in the device descriptor as bNumConfigurations. * * A configuration can contain multiple interfaces. Each corresponds to * a different function of the USB device, and all are available whenever * the configuration is active. The USB standard says that interfaces * are supposed to be numbered from 0 to desc.bNumInterfaces-1, but a lot * of devices get this wrong. In addition, the interface array is not * guaranteed to be sorted in numerical order. Use usb_ifnum_to_if() to * look up an interface entry based on its number. * * Device drivers should not attempt to activate configurations. The choice * of which configuration to install is a policy decision based on such * considerations as available power, functionality provided, and the user's * desires (expressed through userspace tools). However, drivers can call * usb_reset_configuration() to reinitialize the current configuration and * all its interfaces. */ struct usb_host_config { struct usb_config_descriptor desc; char *string; /* iConfiguration string, if present */ /* List of any Interface Association Descriptors in this * configuration. */ struct usb_interface_assoc_descriptor *intf_assoc[USB_MAXIADS]; /* the interfaces associated with this configuration, * stored in no particular order */ struct usb_interface *interface[USB_MAXINTERFACES]; /* Interface information available even when this is not the * active configuration */ struct usb_interface_cache *intf_cache[USB_MAXINTERFACES]; unsigned char *extra; /* Extra descriptors */ int extralen; }; /* USB2.0 and USB3.0 device BOS descriptor set */ struct usb_host_bos { struct usb_bos_descriptor *desc; /* wireless cap descriptor is handled by wusb */ struct usb_ext_cap_descriptor *ext_cap; struct usb_ss_cap_descriptor *ss_cap; struct usb_ssp_cap_descriptor *ssp_cap; struct usb_ss_container_id_descriptor *ss_id; struct usb_ptm_cap_descriptor *ptm_cap; }; int __usb_get_extra_descriptor(char *buffer, unsigned size, unsigned char type, void **ptr, size_t min); #define usb_get_extra_descriptor(ifpoint, type, ptr) \ __usb_get_extra_descriptor((ifpoint)->extra, \ (ifpoint)->extralen, \ type, (void **)ptr, sizeof(**(ptr))) /* ----------------------------------------------------------------------- */ /* USB device number allocation bitmap */ struct usb_devmap { unsigned long devicemap[128 / (8*sizeof(unsigned long))]; }; /* * Allocated per bus (tree of devices) we have: */ struct usb_bus { struct device *controller; /* host side hardware */ struct device *sysdev; /* as seen from firmware or bus */ int busnum; /* Bus number (in order of reg) */ const char *bus_name; /* stable id (PCI slot_name etc) */ u8 uses_pio_for_control; /* * Does the host controller use PIO * for control transfers? */ u8 otg_port; /* 0, or number of OTG/HNP port */ unsigned is_b_host:1; /* true during some HNP roleswitches */ unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */ unsigned no_stop_on_short:1; /* * Quirk: some controllers don't stop * the ep queue on a short transfer * with the URB_SHORT_NOT_OK flag set. */ unsigned no_sg_constraint:1; /* no sg constraint */ unsigned sg_tablesize; /* 0 or largest number of sg list entries */ int devnum_next; /* Next open device number in * round-robin allocation */ struct mutex devnum_next_mutex; /* devnum_next mutex */ struct usb_devmap devmap; /* device address allocation map */ struct usb_device *root_hub; /* Root hub */ struct usb_bus *hs_companion; /* Companion EHCI bus, if any */ int bandwidth_allocated; /* on this bus: how much of the time * reserved for periodic (intr/iso) * requests is used, on average? * Units: microseconds/frame. * Limits: Full/low speed reserve 90%, * while high speed reserves 80%. */ int bandwidth_int_reqs; /* number of Interrupt requests */ int bandwidth_isoc_reqs; /* number of Isoc. requests */ unsigned resuming_ports; /* bit array: resuming root-hub ports */ #if defined(CONFIG_USB_MON) || defined(CONFIG_USB_MON_MODULE) struct mon_bus *mon_bus; /* non-null when associated */ int monitored; /* non-zero when monitored */ #endif }; struct usb_dev_state; /* ----------------------------------------------------------------------- */ struct usb_tt; enum usb_port_connect_type { USB_PORT_CONNECT_TYPE_UNKNOWN = 0, USB_PORT_CONNECT_TYPE_HOT_PLUG, USB_PORT_CONNECT_TYPE_HARD_WIRED, USB_PORT_NOT_USED, }; /* * USB port quirks. */ /* For the given port, prefer the old (faster) enumeration scheme. */ #define USB_PORT_QUIRK_OLD_SCHEME BIT(0) /* Decrease TRSTRCY to 10ms during device enumeration. */ #define USB_PORT_QUIRK_FAST_ENUM BIT(1) /* * USB 2.0 Link Power Management (LPM) parameters. */ struct usb2_lpm_parameters { /* Best effort service latency indicate how long the host will drive * resume on an exit from L1. */ unsigned int besl; /* Timeout value in microseconds for the L1 inactivity (LPM) timer. * When the timer counts to zero, the parent hub will initiate a LPM * transition to L1. */ int timeout; }; /* * USB 3.0 Link Power Management (LPM) parameters. * * PEL and SEL are USB 3.0 Link PM latencies for device-initiated LPM exit. * MEL is the USB 3.0 Link PM latency for host-initiated LPM exit. * All three are stored in nanoseconds. */ struct usb3_lpm_parameters { /* * Maximum exit latency (MEL) for the host to send a packet to the * device (either a Ping for isoc endpoints, or a data packet for * interrupt endpoints), the hubs to decode the packet, and for all hubs * in the path to transition the links to U0. */ unsigned int mel; /* * Maximum exit latency for a device-initiated LPM transition to bring * all links into U0. Abbreviated as "PEL" in section 9.4.12 of the USB * 3.0 spec, with no explanation of what "P" stands for. "Path"? */ unsigned int pel; /* * The System Exit Latency (SEL) includes PEL, and three other * latencies. After a device initiates a U0 transition, it will take * some time from when the device sends the ERDY to when it will finally * receive the data packet. Basically, SEL should be the worse-case * latency from when a device starts initiating a U0 transition to when * it will get data. */ unsigned int sel; /* * The idle timeout value that is currently programmed into the parent * hub for this device. When the timer counts to zero, the parent hub * will initiate an LPM transition to either U1 or U2. */ int timeout; }; /** * struct usb_device - kernel's representation of a USB device * @devnum: device number; address on a USB bus * @devpath: device ID string for use in messages (e.g., /port/...) * @route: tree topology hex string for use with xHCI * @state: device state: configured, not attached, etc. * @speed: device speed: high/full/low (or error) * @rx_lanes: number of rx lanes in use, USB 3.2 adds dual-lane support * @tx_lanes: number of tx lanes in use, USB 3.2 adds dual-lane support * @ssp_rate: SuperSpeed Plus phy signaling rate and lane count * @tt: Transaction Translator info; used with low/full speed dev, highspeed hub * @ttport: device port on that tt hub * @toggle: one bit for each endpoint, with ([0] = IN, [1] = OUT) endpoints * @parent: our hub, unless we're the root * @bus: bus we're part of * @ep0: endpoint 0 data (default control pipe) * @dev: generic device interface * @descriptor: USB device descriptor * @bos: USB device BOS descriptor set * @config: all of the device's configs * @actconfig: the active configuration * @ep_in: array of IN endpoints * @ep_out: array of OUT endpoints * @rawdescriptors: raw descriptors for each config * @bus_mA: Current available from the bus * @portnum: parent port number (origin 1) * @level: number of USB hub ancestors * @devaddr: device address, XHCI: assigned by HW, others: same as devnum * @can_submit: URBs may be submitted * @persist_enabled: USB_PERSIST enabled for this device * @reset_in_progress: the device is being reset * @have_langid: whether string_langid is valid * @authorized: policy has said we can use it; * (user space) policy determines if we authorize this device to be * used or not. By default, wired USB devices are authorized. * WUSB devices are not, until we authorize them from user space. * FIXME -- complete doc * @authenticated: Crypto authentication passed * @wusb: device is Wireless USB * @lpm_capable: device supports LPM * @usb2_hw_lpm_capable: device can perform USB2 hardware LPM * @usb2_hw_lpm_besl_capable: device can perform USB2 hardware BESL LPM * @usb2_hw_lpm_enabled: USB2 hardware LPM is enabled * @usb2_hw_lpm_allowed: Userspace allows USB 2.0 LPM to be enabled * @usb3_lpm_u1_enabled: USB3 hardware U1 LPM enabled * @usb3_lpm_u2_enabled: USB3 hardware U2 LPM enabled * @string_langid: language ID for strings * @product: iProduct string, if present (static) * @manufacturer: iManufacturer string, if present (static) * @serial: iSerialNumber string, if present (static) * @filelist: usbfs files that are open to this device * @maxchild: number of ports if hub * @quirks: quirks of the whole device * @urbnum: number of URBs submitted for the whole device * @active_duration: total time device is not suspended * @connect_time: time device was first connected * @do_remote_wakeup: remote wakeup should be enabled * @reset_resume: needs reset instead of resume * @port_is_suspended: the upstream port is suspended (L2 or U3) * @wusb_dev: if this is a Wireless USB device, link to the WUSB * specific data for the device. * @slot_id: Slot ID assigned by xHCI * @removable: Device can be physically removed from this port * @l1_params: best effor service latency for USB2 L1 LPM state, and L1 timeout. * @u1_params: exit latencies for USB3 U1 LPM state, and hub-initiated timeout. * @u2_params: exit latencies for USB3 U2 LPM state, and hub-initiated timeout. * @lpm_disable_count: Ref count used by usb_disable_lpm() and usb_enable_lpm() * to keep track of the number of functions that require USB 3.0 Link Power * Management to be disabled for this usb_device. This count should only * be manipulated by those functions, with the bandwidth_mutex is held. * @hub_delay: cached value consisting of: * parent->hub_delay + wHubDelay + tTPTransmissionDelay (40ns) * Will be used as wValue for SetIsochDelay requests. * @use_generic_driver: ask driver core to reprobe using the generic driver. * * Notes: * Usbcore drivers should not set usbdev->state directly. Instead use * usb_set_device_state(). */ struct usb_device { int devnum; char devpath[16]; u32 route; enum usb_device_state state; enum usb_device_speed speed; unsigned int rx_lanes; unsigned int tx_lanes; enum usb_ssp_rate ssp_rate; struct usb_tt *tt; int ttport; unsigned int toggle[2]; struct usb_device *parent; struct usb_bus *bus; struct usb_host_endpoint ep0; struct device dev; struct usb_device_descriptor descriptor; struct usb_host_bos *bos; struct usb_host_config *config; struct usb_host_config *actconfig; struct usb_host_endpoint *ep_in[16]; struct usb_host_endpoint *ep_out[16]; char **rawdescriptors; unsigned short bus_mA; u8 portnum; u8 level; u8 devaddr; unsigned can_submit:1; unsigned persist_enabled:1; unsigned reset_in_progress:1; unsigned have_langid:1; unsigned authorized:1; unsigned authenticated:1; unsigned wusb:1; unsigned lpm_capable:1; unsigned usb2_hw_lpm_capable:1; unsigned usb2_hw_lpm_besl_capable:1; unsigned usb2_hw_lpm_enabled:1; unsigned usb2_hw_lpm_allowed:1; unsigned usb3_lpm_u1_enabled:1; unsigned usb3_lpm_u2_enabled:1; int string_langid; /* static strings from the device */ char *product; char *manufacturer; char *serial; struct list_head filelist; int maxchild; u32 quirks; atomic_t urbnum; unsigned long active_duration; unsigned long connect_time; unsigned do_remote_wakeup:1; unsigned reset_resume:1; unsigned port_is_suspended:1; struct wusb_dev *wusb_dev; int slot_id; struct usb2_lpm_parameters l1_params; struct usb3_lpm_parameters u1_params; struct usb3_lpm_parameters u2_params; unsigned lpm_disable_count; u16 hub_delay; unsigned use_generic_driver:1; }; #define to_usb_device(d) container_of(d, struct usb_device, dev) static inline struct usb_device *interface_to_usbdev(struct usb_interface *intf) { return to_usb_device(intf->dev.parent); } extern struct usb_device *usb_get_dev(struct usb_device *dev); extern void usb_put_dev(struct usb_device *dev); extern struct usb_device *usb_hub_find_child(struct usb_device *hdev, int port1); /** * usb_hub_for_each_child - iterate over all child devices on the hub * @hdev: USB device belonging to the usb hub * @port1: portnum associated with child device * @child: child device pointer */ #define usb_hub_for_each_child(hdev, port1, child) \ for (port1 = 1, child = usb_hub_find_child(hdev, port1); \ port1 <= hdev->maxchild; \ child = usb_hub_find_child(hdev, ++port1)) \ if (!child) continue; else /* USB device locking */ #define usb_lock_device(udev) device_lock(&(udev)->dev) #define usb_unlock_device(udev) device_unlock(&(udev)->dev) #define usb_lock_device_interruptible(udev) device_lock_interruptible(&(udev)->dev) #define usb_trylock_device(udev) device_trylock(&(udev)->dev) extern int usb_lock_device_for_reset(struct usb_device *udev, const struct usb_interface *iface); /* USB port reset for device reinitialization */ extern int usb_reset_device(struct usb_device *dev); extern void usb_queue_reset_device(struct usb_interface *dev); extern struct device *usb_intf_get_dma_device(struct usb_interface *intf); #ifdef CONFIG_ACPI extern int usb_acpi_set_power_state(struct usb_device *hdev, int index, bool enable); extern bool usb_acpi_power_manageable(struct usb_device *hdev, int index); extern int usb_acpi_port_lpm_incapable(struct usb_device *hdev, int index); #else static inline int usb_acpi_set_power_state(struct usb_device *hdev, int index, bool enable) { return 0; } static inline bool usb_acpi_power_manageable(struct usb_device *hdev, int index) { return true; } static inline int usb_acpi_port_lpm_incapable(struct usb_device *hdev, int index) { return 0; } #endif /* USB autosuspend and autoresume */ #ifdef CONFIG_PM extern void usb_enable_autosuspend(struct usb_device *udev); extern void usb_disable_autosuspend(struct usb_device *udev); extern int usb_autopm_get_interface(struct usb_interface *intf); extern void usb_autopm_put_interface(struct usb_interface *intf); extern int usb_autopm_get_interface_async(struct usb_interface *intf); extern void usb_autopm_put_interface_async(struct usb_interface *intf); extern void usb_autopm_get_interface_no_resume(struct usb_interface *intf); extern void usb_autopm_put_interface_no_suspend(struct usb_interface *intf); static inline void usb_mark_last_busy(struct usb_device *udev) { pm_runtime_mark_last_busy(&udev->dev); } #else static inline int usb_enable_autosuspend(struct usb_device *udev) { return 0; } static inline int usb_disable_autosuspend(struct usb_device *udev) { return 0; } static inline int usb_autopm_get_interface(struct usb_interface *intf) { return 0; } static inline int usb_autopm_get_interface_async(struct usb_interface *intf) { return 0; } static inline void usb_autopm_put_interface(struct usb_interface *intf) { } static inline void usb_autopm_put_interface_async(struct usb_interface *intf) { } static inline void usb_autopm_get_interface_no_resume( struct usb_interface *intf) { } static inline void usb_autopm_put_interface_no_suspend( struct usb_interface *intf) { } static inline void usb_mark_last_busy(struct usb_device *udev) { } #endif extern int usb_disable_lpm(struct usb_device *udev); extern void usb_enable_lpm(struct usb_device *udev); /* Same as above, but these functions lock/unlock the bandwidth_mutex. */ extern int usb_unlocked_disable_lpm(struct usb_device *udev); extern void usb_unlocked_enable_lpm(struct usb_device *udev); extern int usb_disable_ltm(struct usb_device *udev); extern void usb_enable_ltm(struct usb_device *udev); static inline bool usb_device_supports_ltm(struct usb_device *udev) { if (udev->speed < USB_SPEED_SUPER || !udev->bos || !udev->bos->ss_cap) return false; return udev->bos->ss_cap->bmAttributes & USB_LTM_SUPPORT; } static inline bool usb_device_no_sg_constraint(struct usb_device *udev) { return udev && udev->bus && udev->bus->no_sg_constraint; } /*-------------------------------------------------------------------------*/ /* for drivers using iso endpoints */ extern int usb_get_current_frame_number(struct usb_device *usb_dev); /* Sets up a group of bulk endpoints to support multiple stream IDs. */ extern int usb_alloc_streams(struct usb_interface *interface, struct usb_host_endpoint **eps, unsigned int num_eps, unsigned int num_streams, gfp_t mem_flags); /* Reverts a group of bulk endpoints back to not using stream IDs. */ extern int usb_free_streams(struct usb_interface *interface, struct usb_host_endpoint **eps, unsigned int num_eps, gfp_t mem_flags); /* used these for multi-interface device registration */ extern int usb_driver_claim_interface(struct usb_driver *driver, struct usb_interface *iface, void *data); /** * usb_interface_claimed - returns true iff an interface is claimed * @iface: the interface being checked * * Return: %true (nonzero) iff the interface is claimed, else %false * (zero). * * Note: * Callers must own the driver model's usb bus readlock. So driver * probe() entries don't need extra locking, but other call contexts * may need to explicitly claim that lock. * */ static inline int usb_interface_claimed(struct usb_interface *iface) { return (iface->dev.driver != NULL); } extern void usb_driver_release_interface(struct usb_driver *driver, struct usb_interface *iface); const struct usb_device_id *usb_match_id(struct usb_interface *interface, const struct usb_device_id *id); extern int usb_match_one_id(struct usb_interface *interface, const struct usb_device_id *id); extern int usb_for_each_dev(void *data, int (*fn)(struct usb_device *, void *)); extern struct usb_interface *usb_find_interface(struct usb_driver *drv, int minor); extern struct usb_interface *usb_ifnum_to_if(const struct usb_device *dev, unsigned ifnum); extern struct usb_host_interface *usb_altnum_to_altsetting( const struct usb_interface *intf, unsigned int altnum); extern struct usb_host_interface *usb_find_alt_setting( struct usb_host_config *config, unsigned int iface_num, unsigned int alt_num); #if IS_REACHABLE(CONFIG_USB) int usb_for_each_port(void *data, int (*fn)(struct device *, void *)); #else static inline int usb_for_each_port(void *data, int (*fn)(struct device *, void *)) { return 0; } #endif /* port claiming functions */ int usb_hub_claim_port(struct usb_device *hdev, unsigned port1, struct usb_dev_state *owner); int usb_hub_release_port(struct usb_device *hdev, unsigned port1, struct usb_dev_state *owner); /** * usb_make_path - returns stable device path in the usb tree * @dev: the device whose path is being constructed * @buf: where to put the string * @size: how big is "buf"? * * Return: Length of the string (> 0) or negative if size was too small. * * Note: * This identifier is intended to be "stable", reflecting physical paths in * hardware such as physical bus addresses for host controllers or ports on * USB hubs. That makes it stay the same until systems are physically * reconfigured, by re-cabling a tree of USB devices or by moving USB host * controllers. Adding and removing devices, including virtual root hubs * in host controller driver modules, does not change these path identifiers; * neither does rebooting or re-enumerating. These are more useful identifiers * than changeable ("unstable") ones like bus numbers or device addresses. * * With a partial exception for devices connected to USB 2.0 root hubs, these * identifiers are also predictable. So long as the device tree isn't changed, * plugging any USB device into a given hub port always gives it the same path. * Because of the use of "companion" controllers, devices connected to ports on * USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are * high speed, and a different one if they are full or low speed. */ static inline int usb_make_path(struct usb_device *dev, char *buf, size_t size) { int actual; actual = snprintf(buf, size, "usb-%s-%s", dev->bus->bus_name, dev->devpath); return (actual >= (int)size) ? -1 : actual; } /*-------------------------------------------------------------------------*/ #define USB_DEVICE_ID_MATCH_DEVICE \ (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) #define USB_DEVICE_ID_MATCH_DEV_RANGE \ (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI) #define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION \ (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE) #define USB_DEVICE_ID_MATCH_DEV_INFO \ (USB_DEVICE_ID_MATCH_DEV_CLASS | \ USB_DEVICE_ID_MATCH_DEV_SUBCLASS | \ USB_DEVICE_ID_MATCH_DEV_PROTOCOL) #define USB_DEVICE_ID_MATCH_INT_INFO \ (USB_DEVICE_ID_MATCH_INT_CLASS | \ USB_DEVICE_ID_MATCH_INT_SUBCLASS | \ USB_DEVICE_ID_MATCH_INT_PROTOCOL) /** * USB_DEVICE - macro used to describe a specific usb device * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * * This macro is used to create a struct usb_device_id that matches a * specific device. */ #define USB_DEVICE(vend, prod) \ .match_flags = USB_DEVICE_ID_MATCH_DEVICE, \ .idVendor = (vend), \ .idProduct = (prod) /** * USB_DEVICE_VER - describe a specific usb device with a version range * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * @lo: the bcdDevice_lo value * @hi: the bcdDevice_hi value * * This macro is used to create a struct usb_device_id that matches a * specific device, with a version range. */ #define USB_DEVICE_VER(vend, prod, lo, hi) \ .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, \ .idVendor = (vend), \ .idProduct = (prod), \ .bcdDevice_lo = (lo), \ .bcdDevice_hi = (hi) /** * USB_DEVICE_INTERFACE_CLASS - describe a usb device with a specific interface class * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * @cl: bInterfaceClass value * * This macro is used to create a struct usb_device_id that matches a * specific interface class of devices. */ #define USB_DEVICE_INTERFACE_CLASS(vend, prod, cl) \ .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \ USB_DEVICE_ID_MATCH_INT_CLASS, \ .idVendor = (vend), \ .idProduct = (prod), \ .bInterfaceClass = (cl) /** * USB_DEVICE_INTERFACE_PROTOCOL - describe a usb device with a specific interface protocol * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * @pr: bInterfaceProtocol value * * This macro is used to create a struct usb_device_id that matches a * specific interface protocol of devices. */ #define USB_DEVICE_INTERFACE_PROTOCOL(vend, prod, pr) \ .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \ USB_DEVICE_ID_MATCH_INT_PROTOCOL, \ .idVendor = (vend), \ .idProduct = (prod), \ .bInterfaceProtocol = (pr) /** * USB_DEVICE_INTERFACE_NUMBER - describe a usb device with a specific interface number * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * @num: bInterfaceNumber value * * This macro is used to create a struct usb_device_id that matches a * specific interface number of devices. */ #define USB_DEVICE_INTERFACE_NUMBER(vend, prod, num) \ .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \ USB_DEVICE_ID_MATCH_INT_NUMBER, \ .idVendor = (vend), \ .idProduct = (prod), \ .bInterfaceNumber = (num) /** * USB_DEVICE_INFO - macro used to describe a class of usb devices * @cl: bDeviceClass value * @sc: bDeviceSubClass value * @pr: bDeviceProtocol value * * This macro is used to create a struct usb_device_id that matches a * specific class of devices. */ #define USB_DEVICE_INFO(cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, \ .bDeviceClass = (cl), \ .bDeviceSubClass = (sc), \ .bDeviceProtocol = (pr) /** * USB_INTERFACE_INFO - macro used to describe a class of usb interfaces * @cl: bInterfaceClass value * @sc: bInterfaceSubClass value * @pr: bInterfaceProtocol value * * This macro is used to create a struct usb_device_id that matches a * specific class of interfaces. */ #define USB_INTERFACE_INFO(cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, \ .bInterfaceClass = (cl), \ .bInterfaceSubClass = (sc), \ .bInterfaceProtocol = (pr) /** * USB_DEVICE_AND_INTERFACE_INFO - describe a specific usb device with a class of usb interfaces * @vend: the 16 bit USB Vendor ID * @prod: the 16 bit USB Product ID * @cl: bInterfaceClass value * @sc: bInterfaceSubClass value * @pr: bInterfaceProtocol value * * This macro is used to create a struct usb_device_id that matches a * specific device with a specific class of interfaces. * * This is especially useful when explicitly matching devices that have * vendor specific bDeviceClass values, but standards-compliant interfaces. */ #define USB_DEVICE_AND_INTERFACE_INFO(vend, prod, cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ | USB_DEVICE_ID_MATCH_DEVICE, \ .idVendor = (vend), \ .idProduct = (prod), \ .bInterfaceClass = (cl), \ .bInterfaceSubClass = (sc), \ .bInterfaceProtocol = (pr) /** * USB_VENDOR_AND_INTERFACE_INFO - describe a specific usb vendor with a class of usb interfaces * @vend: the 16 bit USB Vendor ID * @cl: bInterfaceClass value * @sc: bInterfaceSubClass value * @pr: bInterfaceProtocol value * * This macro is used to create a struct usb_device_id that matches a * specific vendor with a specific class of interfaces. * * This is especially useful when explicitly matching devices that have * vendor specific bDeviceClass values, but standards-compliant interfaces. */ #define USB_VENDOR_AND_INTERFACE_INFO(vend, cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ | USB_DEVICE_ID_MATCH_VENDOR, \ .idVendor = (vend), \ .bInterfaceClass = (cl), \ .bInterfaceSubClass = (sc), \ .bInterfaceProtocol = (pr) /* ----------------------------------------------------------------------- */ /* Stuff for dynamic usb ids */ struct usb_dynids { spinlock_t lock; struct list_head list; }; struct usb_dynid { struct list_head node; struct usb_device_id id; }; extern ssize_t usb_store_new_id(struct usb_dynids *dynids, const struct usb_device_id *id_table, struct device_driver *driver, const char *buf, size_t count); extern ssize_t usb_show_dynids(struct usb_dynids *dynids, char *buf); /** * struct usbdrv_wrap - wrapper for driver-model structure * @driver: The driver-model core driver structure. * @for_devices: Non-zero for device drivers, 0 for interface drivers. */ struct usbdrv_wrap { struct device_driver driver; int for_devices; }; /** * struct usb_driver - identifies USB interface driver to usbcore * @name: The driver name should be unique among USB drivers, * and should normally be the same as the module name. * @probe: Called to see if the driver is willing to manage a particular * interface on a device. If it is, probe returns zero and uses * usb_set_intfdata() to associate driver-specific data with the * interface. It may also use usb_set_interface() to specify the * appropriate altsetting. If unwilling to manage the interface, * return -ENODEV, if genuine IO errors occurred, an appropriate * negative errno value. * @disconnect: Called when the interface is no longer accessible, usually * because its device has been (or is being) disconnected or the * driver module is being unloaded. * @unlocked_ioctl: Used for drivers that want to talk to userspace through * the "usbfs" filesystem. This lets devices provide ways to * expose information to user space regardless of where they * do (or don't) show up otherwise in the filesystem. * @suspend: Called when the device is going to be suspended by the * system either from system sleep or runtime suspend context. The * return value will be ignored in system sleep context, so do NOT * try to continue using the device if suspend fails in this case. * Instead, let the resume or reset-resume routine recover from * the failure. * @resume: Called when the device is being resumed by the system. * @reset_resume: Called when the suspended device has been reset instead * of being resumed. * @pre_reset: Called by usb_reset_device() when the device is about to be * reset. This routine must not return until the driver has no active * URBs for the device, and no more URBs may be submitted until the * post_reset method is called. * @post_reset: Called by usb_reset_device() after the device * has been reset * @id_table: USB drivers use ID table to support hotplugging. * Export this with MODULE_DEVICE_TABLE(usb,...). This must be set * or your driver's probe function will never get called. * @dev_groups: Attributes attached to the device that will be created once it * is bound to the driver. * @dynids: used internally to hold the list of dynamically added device * ids for this driver. * @drvwrap: Driver-model core structure wrapper. * @no_dynamic_id: if set to 1, the USB core will not allow dynamic ids to be * added to this driver by preventing the sysfs file from being created. * @supports_autosuspend: if set to 0, the USB core will not allow autosuspend * for interfaces bound to this driver. * @soft_unbind: if set to 1, the USB core will not kill URBs and disable * endpoints before calling the driver's disconnect method. * @disable_hub_initiated_lpm: if set to 1, the USB core will not allow hubs * to initiate lower power link state transitions when an idle timeout * occurs. Device-initiated USB 3.0 link PM will still be allowed. * * USB interface drivers must provide a name, probe() and disconnect() * methods, and an id_table. Other driver fields are optional. * * The id_table is used in hotplugging. It holds a set of descriptors, * and specialized data may be associated with each entry. That table * is used by both user and kernel mode hotplugging support. * * The probe() and disconnect() methods are called in a context where * they can sleep, but they should avoid abusing the privilege. Most * work to connect to a device should be done when the device is opened, * and undone at the last close. The disconnect code needs to address * concurrency issues with respect to open() and close() methods, as * well as forcing all pending I/O requests to complete (by unlinking * them as necessary, and blocking until the unlinks complete). */ struct usb_driver { const char *name; int (*probe) (struct usb_interface *intf, const struct usb_device_id *id); void (*disconnect) (struct usb_interface *intf); int (*unlocked_ioctl) (struct usb_interface *intf, unsigned int code, void *buf); int (*suspend) (struct usb_interface *intf, pm_message_t message); int (*resume) (struct usb_interface *intf); int (*reset_resume)(struct usb_interface *intf); int (*pre_reset)(struct usb_interface *intf); int (*post_reset)(struct usb_interface *intf); const struct usb_device_id *id_table; const struct attribute_group **dev_groups; struct usb_dynids dynids; struct usbdrv_wrap drvwrap; unsigned int no_dynamic_id:1; unsigned int supports_autosuspend:1; unsigned int disable_hub_initiated_lpm:1; unsigned int soft_unbind:1; }; #define to_usb_driver(d) container_of(d, struct usb_driver, drvwrap.driver) /** * struct usb_device_driver - identifies USB device driver to usbcore * @name: The driver name should be unique among USB drivers, * and should normally be the same as the module name. * @match: If set, used for better device/driver matching. * @probe: Called to see if the driver is willing to manage a particular * device. If it is, probe returns zero and uses dev_set_drvdata() * to associate driver-specific data with the device. If unwilling * to manage the device, return a negative errno value. * @disconnect: Called when the device is no longer accessible, usually * because it has been (or is being) disconnected or the driver's * module is being unloaded. * @suspend: Called when the device is going to be suspended by the system. * @resume: Called when the device is being resumed by the system. * @dev_groups: Attributes attached to the device that will be created once it * is bound to the driver. * @drvwrap: Driver-model core structure wrapper. * @id_table: used with @match() to select better matching driver at * probe() time. * @supports_autosuspend: if set to 0, the USB core will not allow autosuspend * for devices bound to this driver. * @generic_subclass: if set to 1, the generic USB driver's probe, disconnect, * resume and suspend functions will be called in addition to the driver's * own, so this part of the setup does not need to be replicated. * * USB drivers must provide all the fields listed above except drvwrap, * match, and id_table. */ struct usb_device_driver { const char *name; bool (*match) (struct usb_device *udev); int (*probe) (struct usb_device *udev); void (*disconnect) (struct usb_device *udev); int (*suspend) (struct usb_device *udev, pm_message_t message); int (*resume) (struct usb_device *udev, pm_message_t message); const struct attribute_group **dev_groups; struct usbdrv_wrap drvwrap; const struct usb_device_id *id_table; unsigned int supports_autosuspend:1; unsigned int generic_subclass:1; }; #define to_usb_device_driver(d) container_of(d, struct usb_device_driver, \ drvwrap.driver) /** * struct usb_class_driver - identifies a USB driver that wants to use the USB major number * @name: the usb class device name for this driver. Will show up in sysfs. * @devnode: Callback to provide a naming hint for a possible * device node to create. * @fops: pointer to the struct file_operations of this driver. * @minor_base: the start of the minor range for this driver. * * This structure is used for the usb_register_dev() and * usb_deregister_dev() functions, to consolidate a number of the * parameters used for them. */ struct usb_class_driver { char *name; char *(*devnode)(struct device *dev, umode_t *mode); const struct file_operations *fops; int minor_base; }; /* * use these in module_init()/module_exit() * and don't forget MODULE_DEVICE_TABLE(usb, ...) */ extern int usb_register_driver(struct usb_driver *, struct module *, const char *); /* use a define to avoid include chaining to get THIS_MODULE & friends */ #define usb_register(driver) \ usb_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) extern void usb_deregister(struct usb_driver *); /** * module_usb_driver() - Helper macro for registering a USB driver * @__usb_driver: usb_driver struct * * Helper macro for USB drivers which do not do anything special in module * init/exit. This eliminates a lot of boilerplate. Each module may only * use this macro once, and calling it replaces module_init() and module_exit() */ #define module_usb_driver(__usb_driver) \ module_driver(__usb_driver, usb_register, \ usb_deregister) extern int usb_register_device_driver(struct usb_device_driver *, struct module *); extern void usb_deregister_device_driver(struct usb_device_driver *); extern int usb_register_dev(struct usb_interface *intf, struct usb_class_driver *class_driver); extern void usb_deregister_dev(struct usb_interface *intf, struct usb_class_driver *class_driver); extern int usb_disabled(void); /* ----------------------------------------------------------------------- */ /* * URB support, for asynchronous request completions */ /* * urb->transfer_flags: * * Note: URB_DIR_IN/OUT is automatically set in usb_submit_urb(). */ #define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */ #define URB_ISO_ASAP 0x0002 /* iso-only; use the first unexpired * slot in the schedule */ #define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */ #define URB_ZERO_PACKET 0x0040 /* Finish bulk OUT with short packet */ #define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt * needed */ #define URB_FREE_BUFFER 0x0100 /* Free transfer buffer with the URB */ /* The following flags are used internally by usbcore and HCDs */ #define URB_DIR_IN 0x0200 /* Transfer from device to host */ #define URB_DIR_OUT 0 #define URB_DIR_MASK URB_DIR_IN #define URB_DMA_MAP_SINGLE 0x00010000 /* Non-scatter-gather mapping */ #define URB_DMA_MAP_PAGE 0x00020000 /* HCD-unsupported S-G */ #define URB_DMA_MAP_SG 0x00040000 /* HCD-supported S-G */ #define URB_MAP_LOCAL 0x00080000 /* HCD-local-memory mapping */ #define URB_SETUP_MAP_SINGLE 0x00100000 /* Setup packet DMA mapped */ #define URB_SETUP_MAP_LOCAL 0x00200000 /* HCD-local setup packet */ #define URB_DMA_SG_COMBINED 0x00400000 /* S-G entries were combined */ #define URB_ALIGNED_TEMP_BUFFER 0x00800000 /* Temp buffer was alloc'd */ struct usb_iso_packet_descriptor { unsigned int offset; unsigned int length; /* expected length */ unsigned int actual_length; int status; }; struct urb; struct usb_anchor { struct list_head urb_list; wait_queue_head_t wait; spinlock_t lock; atomic_t suspend_wakeups; unsigned int poisoned:1; }; static inline void init_usb_anchor(struct usb_anchor *anchor) { memset(anchor, 0, sizeof(*anchor)); INIT_LIST_HEAD(&anchor->urb_list); init_waitqueue_head(&anchor->wait); spin_lock_init(&anchor->lock); } typedef void (*usb_complete_t)(struct urb *); /** * struct urb - USB Request Block * @urb_list: For use by current owner of the URB. * @anchor_list: membership in the list of an anchor * @anchor: to anchor URBs to a common mooring * @ep: Points to the endpoint's data structure. Will eventually * replace @pipe. * @pipe: Holds endpoint number, direction, type, and more. * Create these values with the eight macros available; * usb_{snd,rcv}TYPEpipe(dev,endpoint), where the TYPE is "ctrl" * (control), "bulk", "int" (interrupt), or "iso" (isochronous). * For example usb_sndbulkpipe() or usb_rcvintpipe(). Endpoint * numbers range from zero to fifteen. Note that "in" endpoint two * is a different endpoint (and pipe) from "out" endpoint two. * The current configuration controls the existence, type, and * maximum packet size of any given endpoint. * @stream_id: the endpoint's stream ID for bulk streams * @dev: Identifies the USB device to perform the request. * @status: This is read in non-iso completion functions to get the * status of the particular request. ISO requests only use it * to tell whether the URB was unlinked; detailed status for * each frame is in the fields of the iso_frame-desc. * @transfer_flags: A variety of flags may be used to affect how URB * submission, unlinking, or operation are handled. Different * kinds of URB can use different flags. * @transfer_buffer: This identifies the buffer to (or from) which the I/O * request will be performed unless URB_NO_TRANSFER_DMA_MAP is set * (however, do not leave garbage in transfer_buffer even then). * This buffer must be suitable for DMA; allocate it with * kmalloc() or equivalent. For transfers to "in" endpoints, contents * of this buffer will be modified. This buffer is used for the data * stage of control transfers. * @transfer_dma: When transfer_flags includes URB_NO_TRANSFER_DMA_MAP, * the device driver is saying that it provided this DMA address, * which the host controller driver should use in preference to the * transfer_buffer. * @sg: scatter gather buffer list, the buffer size of each element in * the list (except the last) must be divisible by the endpoint's * max packet size if no_sg_constraint isn't set in 'struct usb_bus' * @num_mapped_sgs: (internal) number of mapped sg entries * @num_sgs: number of entries in the sg list * @transfer_buffer_length: How big is transfer_buffer. The transfer may * be broken up into chunks according to the current maximum packet * size for the endpoint, which is a function of the configuration * and is encoded in the pipe. When the length is zero, neither * transfer_buffer nor transfer_dma is used. * @actual_length: This is read in non-iso completion functions, and * it tells how many bytes (out of transfer_buffer_length) were * transferred. It will normally be the same as requested, unless * either an error was reported or a short read was performed. * The URB_SHORT_NOT_OK transfer flag may be used to make such * short reads be reported as errors. * @setup_packet: Only used for control transfers, this points to eight bytes * of setup data. Control transfers always start by sending this data * to the device. Then transfer_buffer is read or written, if needed. * @setup_dma: DMA pointer for the setup packet. The caller must not use * this field; setup_packet must point to a valid buffer. * @start_frame: Returns the initial frame for isochronous transfers. * @number_of_packets: Lists the number of ISO transfer buffers. * @interval: Specifies the polling interval for interrupt or isochronous * transfers. The units are frames (milliseconds) for full and low * speed devices, and microframes (1/8 millisecond) for highspeed * and SuperSpeed devices. * @error_count: Returns the number of ISO transfers that reported errors. * @context: For use in completion functions. This normally points to * request-specific driver context. * @complete: Completion handler. This URB is passed as the parameter to the * completion function. The completion function may then do what * it likes with the URB, including resubmitting or freeing it. * @iso_frame_desc: Used to provide arrays of ISO transfer buffers and to * collect the transfer status for each buffer. * * This structure identifies USB transfer requests. URBs must be allocated by * calling usb_alloc_urb() and freed with a call to usb_free_urb(). * Initialization may be done using various usb_fill_*_urb() functions. URBs * are submitted using usb_submit_urb(), and pending requests may be canceled * using usb_unlink_urb() or usb_kill_urb(). * * Data Transfer Buffers: * * Normally drivers provide I/O buffers allocated with kmalloc() or otherwise * taken from the general page pool. That is provided by transfer_buffer * (control requests also use setup_packet), and host controller drivers * perform a dma mapping (and unmapping) for each buffer transferred. Those * mapping operations can be expensive on some platforms (perhaps using a dma * bounce buffer or talking to an IOMMU), * although they're cheap on commodity x86 and ppc hardware. * * Alternatively, drivers may pass the URB_NO_TRANSFER_DMA_MAP transfer flag, * which tells the host controller driver that no such mapping is needed for * the transfer_buffer since * the device driver is DMA-aware. For example, a device driver might * allocate a DMA buffer with usb_alloc_coherent() or call usb_buffer_map(). * When this transfer flag is provided, host controller drivers will * attempt to use the dma address found in the transfer_dma * field rather than determining a dma address themselves. * * Note that transfer_buffer must still be set if the controller * does not support DMA (as indicated by hcd_uses_dma()) and when talking * to root hub. If you have to transfer between highmem zone and the device * on such controller, create a bounce buffer or bail out with an error. * If transfer_buffer cannot be set (is in highmem) and the controller is DMA * capable, assign NULL to it, so that usbmon knows not to use the value. * The setup_packet must always be set, so it cannot be located in highmem. * * Initialization: * * All URBs submitted must initialize the dev, pipe, transfer_flags (may be * zero), and complete fields. All URBs must also initialize * transfer_buffer and transfer_buffer_length. They may provide the * URB_SHORT_NOT_OK transfer flag, indicating that short reads are * to be treated as errors; that flag is invalid for write requests. * * Bulk URBs may * use the URB_ZERO_PACKET transfer flag, indicating that bulk OUT transfers * should always terminate with a short packet, even if it means adding an * extra zero length packet. * * Control URBs must provide a valid pointer in the setup_packet field. * Unlike the transfer_buffer, the setup_packet may not be mapped for DMA * beforehand. * * Interrupt URBs must provide an interval, saying how often (in milliseconds * or, for highspeed devices, 125 microsecond units) * to poll for transfers. After the URB has been submitted, the interval * field reflects how the transfer was actually scheduled. * The polling interval may be more frequent than requested. * For example, some controllers have a maximum interval of 32 milliseconds, * while others support intervals of up to 1024 milliseconds. * Isochronous URBs also have transfer intervals. (Note that for isochronous * endpoints, as well as high speed interrupt endpoints, the encoding of * the transfer interval in the endpoint descriptor is logarithmic. * Device drivers must convert that value to linear units themselves.) * * If an isochronous endpoint queue isn't already running, the host * controller will schedule a new URB to start as soon as bandwidth * utilization allows. If the queue is running then a new URB will be * scheduled to start in the first transfer slot following the end of the * preceding URB, if that slot has not already expired. If the slot has * expired (which can happen when IRQ delivery is delayed for a long time), * the scheduling behavior depends on the URB_ISO_ASAP flag. If the flag * is clear then the URB will be scheduled to start in the expired slot, * implying that some of its packets will not be transferred; if the flag * is set then the URB will be scheduled in the first unexpired slot, * breaking the queue's synchronization. Upon URB completion, the * start_frame field will be set to the (micro)frame number in which the * transfer was scheduled. Ranges for frame counter values are HC-specific * and can go from as low as 256 to as high as 65536 frames. * * Isochronous URBs have a different data transfer model, in part because * the quality of service is only "best effort". Callers provide specially * allocated URBs, with number_of_packets worth of iso_frame_desc structures * at the end. Each such packet is an individual ISO transfer. Isochronous * URBs are normally queued, submitted by drivers to arrange that * transfers are at least double buffered, and then explicitly resubmitted * in completion handlers, so * that data (such as audio or video) streams at as constant a rate as the * host controller scheduler can support. * * Completion Callbacks: * * The completion callback is made in_interrupt(), and one of the first * things that a completion handler should do is check the status field. * The status field is provided for all URBs. It is used to report * unlinked URBs, and status for all non-ISO transfers. It should not * be examined before the URB is returned to the completion handler. * * The context field is normally used to link URBs back to the relevant * driver or request state. * * When the completion callback is invoked for non-isochronous URBs, the * actual_length field tells how many bytes were transferred. This field * is updated even when the URB terminated with an error or was unlinked. * * ISO transfer status is reported in the status and actual_length fields * of the iso_frame_desc array, and the number of errors is reported in * error_count. Completion callbacks for ISO transfers will normally * (re)submit URBs to ensure a constant transfer rate. * * Note that even fields marked "public" should not be touched by the driver * when the urb is owned by the hcd, that is, since the call to * usb_submit_urb() till the entry into the completion routine. */ struct urb { /* private: usb core and host controller only fields in the urb */ struct kref kref; /* reference count of the URB */ int unlinked; /* unlink error code */ void *hcpriv; /* private data for host controller */ atomic_t use_count; /* concurrent submissions counter */ atomic_t reject; /* submissions will fail */ /* public: documented fields in the urb that can be used by drivers */ struct list_head urb_list; /* list head for use by the urb's * current owner */ struct list_head anchor_list; /* the URB may be anchored */ struct usb_anchor *anchor; struct usb_device *dev; /* (in) pointer to associated device */ struct usb_host_endpoint *ep; /* (internal) pointer to endpoint */ unsigned int pipe; /* (in) pipe information */ unsigned int stream_id; /* (in) stream ID */ int status; /* (return) non-ISO status */ unsigned int transfer_flags; /* (in) URB_SHORT_NOT_OK | ...*/ void *transfer_buffer; /* (in) associated data buffer */ dma_addr_t transfer_dma; /* (in) dma addr for transfer_buffer */ struct scatterlist *sg; /* (in) scatter gather buffer list */ int num_mapped_sgs; /* (internal) mapped sg entries */ int num_sgs; /* (in) number of entries in the sg list */ u32 transfer_buffer_length; /* (in) data buffer length */ u32 actual_length; /* (return) actual transfer length */ unsigned char *setup_packet; /* (in) setup packet (control only) */ dma_addr_t setup_dma; /* (in) dma addr for setup_packet */ int start_frame; /* (modify) start frame (ISO) */ int number_of_packets; /* (in) number of ISO packets */ int interval; /* (modify) transfer interval * (INT/ISO) */ int error_count; /* (return) number of ISO errors */ void *context; /* (in) context for completion */ usb_complete_t complete; /* (in) completion routine */ struct usb_iso_packet_descriptor iso_frame_desc[]; /* (in) ISO ONLY */ }; /* ----------------------------------------------------------------------- */ /** * usb_fill_control_urb - initializes a control urb * @urb: pointer to the urb to initialize. * @dev: pointer to the struct usb_device for this urb. * @pipe: the endpoint pipe * @setup_packet: pointer to the setup_packet buffer * @transfer_buffer: pointer to the transfer buffer * @buffer_length: length of the transfer buffer * @complete_fn: pointer to the usb_complete_t function * @context: what to set the urb context to. * * Initializes a control urb with the proper information needed to submit * it to a device. */ static inline void usb_fill_control_urb(struct urb *urb, struct usb_device *dev, unsigned int pipe, unsigned char *setup_packet, void *transfer_buffer, int buffer_length, usb_complete_t complete_fn, void *context) { urb->dev = dev; urb->pipe = pipe; urb->setup_packet = setup_packet; urb->transfer_buffer = transfer_buffer; urb->transfer_buffer_length = buffer_length; urb->complete = complete_fn; urb->context = context; } /** * usb_fill_bulk_urb - macro to help initialize a bulk urb * @urb: pointer to the urb to initialize. * @dev: pointer to the struct usb_device for this urb. * @pipe: the endpoint pipe * @transfer_buffer: pointer to the transfer buffer * @buffer_length: length of the transfer buffer * @complete_fn: pointer to the usb_complete_t function * @context: what to set the urb context to. * * Initializes a bulk urb with the proper information needed to submit it * to a device. */ static inline void usb_fill_bulk_urb(struct urb *urb, struct usb_device *dev, unsigned int pipe, void *transfer_buffer, int buffer_length, usb_complete_t complete_fn, void *context) { urb->dev = dev; urb->pipe = pipe; urb->transfer_buffer = transfer_buffer; urb->transfer_buffer_length = buffer_length; urb->complete = complete_fn; urb->context = context; } /** * usb_fill_int_urb - macro to help initialize a interrupt urb * @urb: pointer to the urb to initialize. * @dev: pointer to the struct usb_device for this urb. * @pipe: the endpoint pipe * @transfer_buffer: pointer to the transfer buffer * @buffer_length: length of the transfer buffer * @complete_fn: pointer to the usb_complete_t function * @context: what to set the urb context to. * @interval: what to set the urb interval to, encoded like * the endpoint descriptor's bInterval value. * * Initializes a interrupt urb with the proper information needed to submit * it to a device. * * Note that High Speed and SuperSpeed(+) interrupt endpoints use a logarithmic * encoding of the endpoint interval, and express polling intervals in * microframes (eight per millisecond) rather than in frames (one per * millisecond). * * Wireless USB also uses the logarithmic encoding, but specifies it in units of * 128us instead of 125us. For Wireless USB devices, the interval is passed * through to the host controller, rather than being translated into microframe * units. */ static inline void usb_fill_int_urb(struct urb *urb, struct usb_device *dev, unsigned int pipe, void *transfer_buffer, int buffer_length, usb_complete_t complete_fn, void *context, int interval) { urb->dev = dev; urb->pipe = pipe; urb->transfer_buffer = transfer_buffer; urb->transfer_buffer_length = buffer_length; urb->complete = complete_fn; urb->context = context; if (dev->speed == USB_SPEED_HIGH || dev->speed >= USB_SPEED_SUPER) { /* make sure interval is within allowed range */ interval = clamp(interval, 1, 16); urb->interval = 1 << (interval - 1); } else { urb->interval = interval; } urb->start_frame = -1; } extern void usb_init_urb(struct urb *urb); extern struct urb *usb_alloc_urb(int iso_packets, gfp_t mem_flags); extern void usb_free_urb(struct urb *urb); #define usb_put_urb usb_free_urb extern struct urb *usb_get_urb(struct urb *urb); extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags); extern int usb_unlink_urb(struct urb *urb); extern void usb_kill_urb(struct urb *urb); extern void usb_poison_urb(struct urb *urb); extern void usb_unpoison_urb(struct urb *urb); extern void usb_block_urb(struct urb *urb); extern void usb_kill_anchored_urbs(struct usb_anchor *anchor); extern void usb_poison_anchored_urbs(struct usb_anchor *anchor); extern void usb_unpoison_anchored_urbs(struct usb_anchor *anchor); extern void usb_unlink_anchored_urbs(struct usb_anchor *anchor); extern void usb_anchor_suspend_wakeups(struct usb_anchor *anchor); extern void usb_anchor_resume_wakeups(struct usb_anchor *anchor); extern void usb_anchor_urb(struct urb *urb, struct usb_anchor *anchor); extern void usb_unanchor_urb(struct urb *urb); extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor, unsigned int timeout); extern struct urb *usb_get_from_anchor(struct usb_anchor *anchor); extern void usb_scuttle_anchored_urbs(struct usb_anchor *anchor); extern int usb_anchor_empty(struct usb_anchor *anchor); #define usb_unblock_urb usb_unpoison_urb /** * usb_urb_dir_in - check if an URB describes an IN transfer * @urb: URB to be checked * * Return: 1 if @urb describes an IN transfer (device-to-host), * otherwise 0. */ static inline int usb_urb_dir_in(struct urb *urb) { return (urb->transfer_flags & URB_DIR_MASK) == URB_DIR_IN; } /** * usb_urb_dir_out - check if an URB describes an OUT transfer * @urb: URB to be checked * * Return: 1 if @urb describes an OUT transfer (host-to-device), * otherwise 0. */ static inline int usb_urb_dir_out(struct urb *urb) { return (urb->transfer_flags & URB_DIR_MASK) == URB_DIR_OUT; } int usb_pipe_type_check(struct usb_device *dev, unsigned int pipe); int usb_urb_ep_type_check(const struct urb *urb); void *usb_alloc_coherent(struct usb_device *dev, size_t size, gfp_t mem_flags, dma_addr_t *dma); void usb_free_coherent(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma); #if 0 struct urb *usb_buffer_map(struct urb *urb); void usb_buffer_dmasync(struct urb *urb); void usb_buffer_unmap(struct urb *urb); #endif struct scatterlist; int usb_buffer_map_sg(const struct usb_device *dev, int is_in, struct scatterlist *sg, int nents); #if 0 void usb_buffer_dmasync_sg(const struct usb_device *dev, int is_in, struct scatterlist *sg, int n_hw_ents); #endif void usb_buffer_unmap_sg(const struct usb_device *dev, int is_in, struct scatterlist *sg, int n_hw_ents); /*-------------------------------------------------------------------* * SYNCHRONOUS CALL SUPPORT * *-------------------------------------------------------------------*/ extern int usb_control_msg(struct usb_device *dev, unsigned int pipe, __u8 request, __u8 requesttype, __u16 value, __u16 index, void *data, __u16 size, int timeout); extern int usb_interrupt_msg(struct usb_device *usb_dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout); extern int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout); /* wrappers around usb_control_msg() for the most common standard requests */ int usb_control_msg_send(struct usb_device *dev, __u8 endpoint, __u8 request, __u8 requesttype, __u16 value, __u16 index, const void *data, __u16 size, int timeout, gfp_t memflags); int usb_control_msg_recv(struct usb_device *dev, __u8 endpoint, __u8 request, __u8 requesttype, __u16 value, __u16 index, void *data, __u16 size, int timeout, gfp_t memflags); extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype, unsigned char descindex, void *buf, int size); extern int usb_get_status(struct usb_device *dev, int recip, int type, int target, void *data); static inline int usb_get_std_status(struct usb_device *dev, int recip, int target, void *data) { return usb_get_status(dev, recip, USB_STATUS_TYPE_STANDARD, target, data); } static inline int usb_get_ptm_status(struct usb_device *dev, void *data) { return usb_get_status(dev, USB_RECIP_DEVICE, USB_STATUS_TYPE_PTM, 0, data); } extern int usb_string(struct usb_device *dev, int index, char *buf, size_t size); /* wrappers that also update important state inside usbcore */ extern int usb_clear_halt(struct usb_device *dev, int pipe); extern int usb_reset_configuration(struct usb_device *dev); extern int usb_set_interface(struct usb_device *dev, int ifnum, int alternate); extern void usb_reset_endpoint(struct usb_device *dev, unsigned int epaddr); /* this request isn't really synchronous, but it belongs with the others */ extern int usb_driver_set_configuration(struct usb_device *udev, int config); /* choose and set configuration for device */ extern int usb_choose_configuration(struct usb_device *udev); extern int usb_set_configuration(struct usb_device *dev, int configuration); /* * timeouts, in milliseconds, used for sending/receiving control messages * they typically complete within a few frames (msec) after they're issued * USB identifies 5 second timeouts, maybe more in a few cases, and a few * slow devices (like some MGE Ellipse UPSes) actually push that limit. */ #define USB_CTRL_GET_TIMEOUT 5000 #define USB_CTRL_SET_TIMEOUT 5000 /** * struct usb_sg_request - support for scatter/gather I/O * @status: zero indicates success, else negative errno * @bytes: counts bytes transferred. * * These requests are initialized using usb_sg_init(), and then are used * as request handles passed to usb_sg_wait() or usb_sg_cancel(). Most * members of the request object aren't for driver access. * * The status and bytecount values are valid only after usb_sg_wait() * returns. If the status is zero, then the bytecount matches the total * from the request. * * After an error completion, drivers may need to clear a halt condition * on the endpoint. */ struct usb_sg_request { int status; size_t bytes; /* private: * members below are private to usbcore, * and are not provided for driver access! */ spinlock_t lock; struct usb_device *dev; int pipe; int entries; struct urb **urbs; int count; struct completion complete; }; int usb_sg_init( struct usb_sg_request *io, struct usb_device *dev, unsigned pipe, unsigned period, struct scatterlist *sg, int nents, size_t length, gfp_t mem_flags ); void usb_sg_cancel(struct usb_sg_request *io); void usb_sg_wait(struct usb_sg_request *io); /* ----------------------------------------------------------------------- */ /* * For various legacy reasons, Linux has a small cookie that's paired with * a struct usb_device to identify an endpoint queue. Queue characteristics * are defined by the endpoint's descriptor. This cookie is called a "pipe", * an unsigned int encoded as: * * - direction: bit 7 (0 = Host-to-Device [Out], * 1 = Device-to-Host [In] ... * like endpoint bEndpointAddress) * - device address: bits 8-14 ... bit positions known to uhci-hcd * - endpoint: bits 15-18 ... bit positions known to uhci-hcd * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, * 10 = control, 11 = bulk) * * Given the device address and endpoint descriptor, pipes are redundant. */ /* NOTE: these are not the standard USB_ENDPOINT_XFER_* values!! */ /* (yet ... they're the values used by usbfs) */ #define PIPE_ISOCHRONOUS 0 #define PIPE_INTERRUPT 1 #define PIPE_CONTROL 2 #define PIPE_BULK 3 #define usb_pipein(pipe) ((pipe) & USB_DIR_IN) #define usb_pipeout(pipe) (!usb_pipein(pipe)) #define usb_pipedevice(pipe) (((pipe) >> 8) & 0x7f) #define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf) #define usb_pipetype(pipe) (((pipe) >> 30) & 3) #define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) #define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) #define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) #define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK) static inline unsigned int __create_pipe(struct usb_device *dev, unsigned int endpoint) { return (dev->devnum << 8) | (endpoint << 15); } /* Create various pipes... */ #define usb_sndctrlpipe(dev, endpoint) \ ((PIPE_CONTROL << 30) | __create_pipe(dev, endpoint)) #define usb_rcvctrlpipe(dev, endpoint) \ ((PIPE_CONTROL << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) #define usb_sndisocpipe(dev, endpoint) \ ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev, endpoint)) #define usb_rcvisocpipe(dev, endpoint) \ ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) #define usb_sndbulkpipe(dev, endpoint) \ ((PIPE_BULK << 30) | __create_pipe(dev, endpoint)) #define usb_rcvbulkpipe(dev, endpoint) \ ((PIPE_BULK << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) #define usb_sndintpipe(dev, endpoint) \ ((PIPE_INTERRUPT << 30) | __create_pipe(dev, endpoint)) #define usb_rcvintpipe(dev, endpoint) \ ((PIPE_INTERRUPT << 30) | __create_pipe(dev, endpoint) | USB_DIR_IN) static inline struct usb_host_endpoint * usb_pipe_endpoint(struct usb_device *dev, unsigned int pipe) { struct usb_host_endpoint **eps; eps = usb_pipein(pipe) ? dev->ep_in : dev->ep_out; return eps[usb_pipeendpoint(pipe)]; } static inline u16 usb_maxpacket(struct usb_device *udev, int pipe, /* int is_out deprecated */ ...) { struct usb_host_endpoint *ep; unsigned epnum = usb_pipeendpoint(pipe); if (usb_pipeout(pipe)) ep = udev->ep_out[epnum]; else ep = udev->ep_in[epnum]; if (!ep) return 0; /* NOTE: only 0x07ff bits are for packet size... */ return usb_endpoint_maxp(&ep->desc); } /* translate USB error codes to codes user space understands */ static inline int usb_translate_errors(int error_code) { switch (error_code) { case 0: case -ENOMEM: case -ENODEV: case -EOPNOTSUPP: return error_code; default: return -EIO; } } /* Events from the usb core */ #define USB_DEVICE_ADD 0x0001 #define USB_DEVICE_REMOVE 0x0002 #define USB_BUS_ADD 0x0003 #define USB_BUS_REMOVE 0x0004 extern void usb_register_notify(struct notifier_block *nb); extern void usb_unregister_notify(struct notifier_block *nb); /* debugfs stuff */ extern struct dentry *usb_debug_root; /* LED triggers */ enum usb_led_event { USB_LED_EVENT_HOST = 0, USB_LED_EVENT_GADGET = 1, }; #ifdef CONFIG_USB_LED_TRIG extern void usb_led_activity(enum usb_led_event ev); #else static inline void usb_led_activity(enum usb_led_event ev) {} #endif #endif /* __KERNEL__ */ #endif PK ! I��� � libata.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2003-2005 Red Hat, Inc. All rights reserved. * Copyright 2003-2005 Jeff Garzik * * libata documentation is available via 'make {ps|pdf}docs', * as Documentation/driver-api/libata.rst */ #ifndef __LINUX_LIBATA_H__ #define __LINUX_LIBATA_H__ #include <linux/delay.h> #include <linux/jiffies.h> #include <linux/interrupt.h> #include <linux/dma-mapping.h> #include <linux/scatterlist.h> #include <linux/io.h> #include <linux/ata.h> #include <linux/workqueue.h> #include <scsi/scsi_host.h> #include <linux/acpi.h> #include <linux/cdrom.h> #include <linux/sched.h> #include <linux/async.h> /* * Define if arch has non-standard setup. This is a _PCI_ standard * not a legacy or ISA standard. */ #ifdef CONFIG_ATA_NONSTANDARD #include <asm/libata-portmap.h> #else #define ATA_PRIMARY_IRQ(dev) 14 #define ATA_SECONDARY_IRQ(dev) 15 #endif /* * compile-time options: to be removed as soon as all the drivers are * converted to the new debugging mechanism */ #undef ATA_DEBUG /* debugging output */ #undef ATA_VERBOSE_DEBUG /* yet more debugging output */ #undef ATA_IRQ_TRAP /* define to ack screaming irqs */ #undef ATA_NDEBUG /* define to disable quick runtime checks */ /* note: prints function name for you */ #ifdef ATA_DEBUG #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) #ifdef ATA_VERBOSE_DEBUG #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) #else #define VPRINTK(fmt, args...) #endif /* ATA_VERBOSE_DEBUG */ #else #define DPRINTK(fmt, args...) #define VPRINTK(fmt, args...) #endif /* ATA_DEBUG */ #define ata_print_version_once(dev, version) \ ({ \ static bool __print_once; \ \ if (!__print_once) { \ __print_once = true; \ ata_print_version(dev, version); \ } \ }) /* NEW: debug levels */ #define HAVE_LIBATA_MSG 1 enum { ATA_MSG_DRV = 0x0001, ATA_MSG_INFO = 0x0002, ATA_MSG_PROBE = 0x0004, ATA_MSG_WARN = 0x0008, ATA_MSG_MALLOC = 0x0010, ATA_MSG_CTL = 0x0020, ATA_MSG_INTR = 0x0040, ATA_MSG_ERR = 0x0080, }; #define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV) #define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO) #define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE) #define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN) #define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC) #define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL) #define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR) #define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR) static inline u32 ata_msg_init(int dval, int default_msg_enable_bits) { if (dval < 0 || dval >= (sizeof(u32) * 8)) return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */ if (!dval) return 0; return (1 << dval) - 1; } /* defines only for the constants which don't work well as enums */ #define ATA_TAG_POISON 0xfafbfcfdU enum { /* various global constants */ LIBATA_MAX_PRD = ATA_MAX_PRD / 2, LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4, /* Worst case */ ATA_DEF_QUEUE = 1, ATA_MAX_QUEUE = 32, ATA_TAG_INTERNAL = ATA_MAX_QUEUE, ATA_SHORT_PAUSE = 16, ATAPI_MAX_DRAIN = 16 << 10, ATA_ALL_DEVICES = (1 << ATA_MAX_DEVICES) - 1, ATA_SHT_EMULATED = 1, ATA_SHT_THIS_ID = -1, /* struct ata_taskfile flags */ ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */ /* struct ata_device stuff */ ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */ ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */ ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */ ATA_DFLAG_NCQ = (1 << 3), /* device supports NCQ */ ATA_DFLAG_FLUSH_EXT = (1 << 4), /* do FLUSH_EXT instead of FLUSH */ ATA_DFLAG_ACPI_PENDING = (1 << 5), /* ACPI resume action pending */ ATA_DFLAG_ACPI_FAILED = (1 << 6), /* ACPI on devcfg has failed */ ATA_DFLAG_AN = (1 << 7), /* AN configured */ ATA_DFLAG_TRUSTED = (1 << 8), /* device supports trusted send/recv */ ATA_DFLAG_DMADIR = (1 << 10), /* device requires DMADIR */ ATA_DFLAG_CFG_MASK = (1 << 12) - 1, ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */ ATA_DFLAG_NCQ_OFF = (1 << 13), /* device limited to non-NCQ mode */ ATA_DFLAG_SLEEPING = (1 << 15), /* device is sleeping */ ATA_DFLAG_DUBIOUS_XFER = (1 << 16), /* data transfer not verified */ ATA_DFLAG_NO_UNLOAD = (1 << 17), /* device doesn't support unload */ ATA_DFLAG_UNLOCK_HPA = (1 << 18), /* unlock HPA */ ATA_DFLAG_NCQ_SEND_RECV = (1 << 19), /* device supports NCQ SEND and RECV */ ATA_DFLAG_NCQ_PRIO = (1 << 20), /* device supports NCQ priority */ ATA_DFLAG_NCQ_PRIO_ENABLE = (1 << 21), /* Priority cmds sent to dev */ ATA_DFLAG_INIT_MASK = (1 << 24) - 1, ATA_DFLAG_DETACH = (1 << 24), ATA_DFLAG_DETACHED = (1 << 25), ATA_DFLAG_DA = (1 << 26), /* device supports Device Attention */ ATA_DFLAG_DEVSLP = (1 << 27), /* device supports Device Sleep */ ATA_DFLAG_ACPI_DISABLED = (1 << 28), /* ACPI for the device is disabled */ ATA_DFLAG_D_SENSE = (1 << 29), /* Descriptor sense requested */ ATA_DFLAG_ZAC = (1 << 30), /* ZAC device */ ATA_DFLAG_FEATURES_MASK = ATA_DFLAG_TRUSTED | ATA_DFLAG_DA | \ ATA_DFLAG_DEVSLP | ATA_DFLAG_NCQ_SEND_RECV | \ ATA_DFLAG_NCQ_PRIO, ATA_DEV_UNKNOWN = 0, /* unknown device */ ATA_DEV_ATA = 1, /* ATA device */ ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */ ATA_DEV_ATAPI = 3, /* ATAPI device */ ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */ ATA_DEV_PMP = 5, /* SATA port multiplier */ ATA_DEV_PMP_UNSUP = 6, /* SATA port multiplier (unsupported) */ ATA_DEV_SEMB = 7, /* SEMB */ ATA_DEV_SEMB_UNSUP = 8, /* SEMB (unsupported) */ ATA_DEV_ZAC = 9, /* ZAC device */ ATA_DEV_ZAC_UNSUP = 10, /* ZAC device (unsupported) */ ATA_DEV_NONE = 11, /* no device */ /* struct ata_link flags */ /* NOTE: struct ata_force_param currently stores lflags in u16 */ ATA_LFLAG_NO_HRST = (1 << 1), /* avoid hardreset */ ATA_LFLAG_NO_SRST = (1 << 2), /* avoid softreset */ ATA_LFLAG_ASSUME_ATA = (1 << 3), /* assume ATA class */ ATA_LFLAG_ASSUME_SEMB = (1 << 4), /* assume SEMB class */ ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB, ATA_LFLAG_NO_RETRY = (1 << 5), /* don't retry this link */ ATA_LFLAG_DISABLED = (1 << 6), /* link is disabled */ ATA_LFLAG_SW_ACTIVITY = (1 << 7), /* keep activity stats */ ATA_LFLAG_NO_LPM = (1 << 8), /* disable LPM on this link */ ATA_LFLAG_RST_ONCE = (1 << 9), /* limit recovery to one reset */ ATA_LFLAG_CHANGED = (1 << 10), /* LPM state changed on this link */ ATA_LFLAG_NO_DEBOUNCE_DELAY = (1 << 11), /* no debounce delay on link resume */ /* struct ata_port flags */ ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */ /* (doesn't imply presence) */ ATA_FLAG_SATA = (1 << 1), ATA_FLAG_NO_LPM = (1 << 2), /* host not happy with LPM */ ATA_FLAG_NO_LOG_PAGE = (1 << 5), /* do not issue log page read */ ATA_FLAG_NO_ATAPI = (1 << 6), /* No ATAPI support */ ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */ ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */ ATA_FLAG_PIO_POLLING = (1 << 9), /* use polling PIO if LLD * doesn't handle PIO interrupts */ ATA_FLAG_NCQ = (1 << 10), /* host supports NCQ */ ATA_FLAG_NO_POWEROFF_SPINDOWN = (1 << 11), /* don't spindown before poweroff */ ATA_FLAG_NO_HIBERNATE_SPINDOWN = (1 << 12), /* don't spindown before hibernation */ ATA_FLAG_DEBUGMSG = (1 << 13), ATA_FLAG_FPDMA_AA = (1 << 14), /* driver supports Auto-Activate */ ATA_FLAG_IGN_SIMPLEX = (1 << 15), /* ignore SIMPLEX */ ATA_FLAG_NO_IORDY = (1 << 16), /* controller lacks iordy */ ATA_FLAG_ACPI_SATA = (1 << 17), /* need native SATA ACPI layout */ ATA_FLAG_AN = (1 << 18), /* controller supports AN */ ATA_FLAG_PMP = (1 << 19), /* controller supports PMP */ ATA_FLAG_FPDMA_AUX = (1 << 20), /* controller supports H2DFIS aux field */ ATA_FLAG_EM = (1 << 21), /* driver supports enclosure * management */ ATA_FLAG_SW_ACTIVITY = (1 << 22), /* driver supports sw activity * led */ ATA_FLAG_NO_DIPM = (1 << 23), /* host not happy with DIPM */ ATA_FLAG_SAS_HOST = (1 << 24), /* SAS host */ /* bits 24:31 of ap->flags are reserved for LLD specific flags */ /* struct ata_port pflags */ ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */ ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */ ATA_PFLAG_FROZEN = (1 << 2), /* port is frozen */ ATA_PFLAG_RECOVERED = (1 << 3), /* recovery action performed */ ATA_PFLAG_LOADING = (1 << 4), /* boot/loading probe */ ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), /* SCSI hotplug scheduled */ ATA_PFLAG_INITIALIZING = (1 << 7), /* being initialized, don't touch */ ATA_PFLAG_RESETTING = (1 << 8), /* reset in progress */ ATA_PFLAG_UNLOADING = (1 << 9), /* driver is being unloaded */ ATA_PFLAG_UNLOADED = (1 << 10), /* driver is unloaded */ ATA_PFLAG_SUSPENDED = (1 << 17), /* port is suspended (power) */ ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */ ATA_PFLAG_INIT_GTM_VALID = (1 << 19), /* initial gtm data valid */ ATA_PFLAG_PIO32 = (1 << 20), /* 32bit PIO */ ATA_PFLAG_PIO32CHANGE = (1 << 21), /* 32bit PIO can be turned on/off */ ATA_PFLAG_EXTERNAL = (1 << 22), /* eSATA/external port */ /* struct ata_queued_cmd flags */ ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */ ATA_QCFLAG_DMAMAP = (1 << 1), /* SG table is DMA mapped */ ATA_QCFLAG_IO = (1 << 3), /* standard IO command */ ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */ ATA_QCFLAG_CLEAR_EXCL = (1 << 5), /* clear excl_link on completion */ ATA_QCFLAG_QUIET = (1 << 6), /* don't report device error */ ATA_QCFLAG_RETRY = (1 << 7), /* retry after failure */ ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */ ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */ ATA_QCFLAG_EH_SCHEDULED = (1 << 18), /* EH scheduled (obsolete) */ /* host set flags */ ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host only */ ATA_HOST_STARTED = (1 << 1), /* Host started */ ATA_HOST_PARALLEL_SCAN = (1 << 2), /* Ports on this host can be scanned in parallel */ ATA_HOST_IGNORE_ATA = (1 << 3), /* Ignore ATA devices on this host. */ ATA_HOST_NO_PART = (1 << 4), /* Host does not support partial */ ATA_HOST_NO_SSC = (1 << 5), /* Host does not support slumber */ ATA_HOST_NO_DEVSLP = (1 << 6), /* Host does not support devslp */ /* bits 24:31 of host->flags are reserved for LLD specific flags */ /* various lengths of time */ ATA_TMOUT_BOOT = 30000, /* heuristic */ ATA_TMOUT_BOOT_QUICK = 7000, /* heuristic */ ATA_TMOUT_INTERNAL_QUICK = 5000, ATA_TMOUT_MAX_PARK = 30000, /* * GoVault needs 2s and iVDR disk HHD424020F7SV00 800ms. 2s * is too much without parallel probing. Use 2s if parallel * probing is available, 800ms otherwise. */ ATA_TMOUT_FF_WAIT_LONG = 2000, ATA_TMOUT_FF_WAIT = 800, /* Spec mandates to wait for ">= 2ms" before checking status * after reset. We wait 150ms, because that was the magic * delay used for ATAPI devices in Hale Landis's ATADRVR, for * the period of time between when the ATA command register is * written, and then status is checked. Because waiting for * "a while" before checking status is fine, post SRST, we * perform this magic delay here as well. * * Old drivers/ide uses the 2mS rule and then waits for ready. */ ATA_WAIT_AFTER_RESET = 150, /* If PMP is supported, we have to do follow-up SRST. As some * PMPs don't send D2H Reg FIS after hardreset, LLDs are * advised to wait only for the following duration before * doing SRST. */ ATA_TMOUT_PMP_SRST_WAIT = 10000, /* When the LPM policy is set to ATA_LPM_MAX_POWER, there might * be a spurious PHY event, so ignore the first PHY event that * occurs within 10s after the policy change. */ ATA_TMOUT_SPURIOUS_PHY = 10000, /* ATA bus states */ BUS_UNKNOWN = 0, BUS_DMA = 1, BUS_IDLE = 2, BUS_NOINTR = 3, BUS_NODATA = 4, BUS_TIMER = 5, BUS_PIO = 6, BUS_EDD = 7, BUS_IDENTIFY = 8, BUS_PACKET = 9, /* SATA port states */ PORT_UNKNOWN = 0, PORT_ENABLED = 1, PORT_DISABLED = 2, /* encoding various smaller bitmaps into a single * unsigned long bitmap */ ATA_NR_PIO_MODES = 7, ATA_NR_MWDMA_MODES = 5, ATA_NR_UDMA_MODES = 8, ATA_SHIFT_PIO = 0, ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES, ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES, ATA_SHIFT_PRIO = 6, ATA_PRIO_HIGH = 2, /* size of buffer to pad xfers ending on unaligned boundaries */ ATA_DMA_PAD_SZ = 4, /* ering size */ ATA_ERING_SIZE = 32, /* return values for ->qc_defer */ ATA_DEFER_LINK = 1, ATA_DEFER_PORT = 2, /* desc_len for ata_eh_info and context */ ATA_EH_DESC_LEN = 80, /* reset / recovery action types */ ATA_EH_REVALIDATE = (1 << 0), ATA_EH_SOFTRESET = (1 << 1), /* meaningful only in ->prereset */ ATA_EH_HARDRESET = (1 << 2), /* meaningful only in ->prereset */ ATA_EH_RESET = ATA_EH_SOFTRESET | ATA_EH_HARDRESET, ATA_EH_ENABLE_LINK = (1 << 3), ATA_EH_PARK = (1 << 5), /* unload heads and stop I/O */ ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE | ATA_EH_PARK, ATA_EH_ALL_ACTIONS = ATA_EH_REVALIDATE | ATA_EH_RESET | ATA_EH_ENABLE_LINK, /* ata_eh_info->flags */ ATA_EHI_HOTPLUGGED = (1 << 0), /* could have been hotplugged */ ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */ ATA_EHI_QUIET = (1 << 3), /* be quiet */ ATA_EHI_NO_RECOVERY = (1 << 4), /* no recovery */ ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */ ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */ ATA_EHI_PRINTINFO = (1 << 18), /* print configuration info */ ATA_EHI_SETMODE = (1 << 19), /* configure transfer mode */ ATA_EHI_POST_SETMODE = (1 << 20), /* revalidating after setmode */ ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET, /* mask of flags to transfer *to* the slave link */ ATA_EHI_TO_SLAVE_MASK = ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, /* max tries if error condition is still set after ->error_handler */ ATA_EH_MAX_TRIES = 5, /* sometimes resuming a link requires several retries */ ATA_LINK_RESUME_TRIES = 5, /* how hard are we gonna try to probe/recover devices */ ATA_PROBE_MAX_TRIES = 3, ATA_EH_DEV_TRIES = 3, ATA_EH_PMP_TRIES = 5, ATA_EH_PMP_LINK_TRIES = 3, SATA_PMP_RW_TIMEOUT = 3000, /* PMP read/write timeout */ /* This should match the actual table size of * ata_eh_cmd_timeout_table in libata-eh.c. */ ATA_EH_CMD_TIMEOUT_TABLE_SIZE = 7, /* Horkage types. May be set by libata or controller on drives (some horkage may be drive/controller pair dependent */ ATA_HORKAGE_DIAGNOSTIC = (1 << 0), /* Failed boot diag */ ATA_HORKAGE_NODMA = (1 << 1), /* DMA problems */ ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */ ATA_HORKAGE_MAX_SEC_128 = (1 << 3), /* Limit max sects to 128 */ ATA_HORKAGE_BROKEN_HPA = (1 << 4), /* Broken HPA */ ATA_HORKAGE_DISABLE = (1 << 5), /* Disable it */ ATA_HORKAGE_HPA_SIZE = (1 << 6), /* native size off by one */ ATA_HORKAGE_IVB = (1 << 8), /* cbl det validity bit bugs */ ATA_HORKAGE_STUCK_ERR = (1 << 9), /* stuck ERR on next PACKET */ ATA_HORKAGE_BRIDGE_OK = (1 << 10), /* no bridge limits */ ATA_HORKAGE_ATAPI_MOD16_DMA = (1 << 11), /* use ATAPI DMA for commands not multiple of 16 bytes */ ATA_HORKAGE_FIRMWARE_WARN = (1 << 12), /* firmware update warning */ ATA_HORKAGE_1_5_GBPS = (1 << 13), /* force 1.5 Gbps */ ATA_HORKAGE_NOSETXFER = (1 << 14), /* skip SETXFER, SATA only */ ATA_HORKAGE_BROKEN_FPDMA_AA = (1 << 15), /* skip AA */ ATA_HORKAGE_DUMP_ID = (1 << 16), /* dump IDENTIFY data */ ATA_HORKAGE_MAX_SEC_LBA48 = (1 << 17), /* Set max sects to 65535 */ ATA_HORKAGE_ATAPI_DMADIR = (1 << 18), /* device requires dmadir */ ATA_HORKAGE_NO_NCQ_TRIM = (1 << 19), /* don't use queued TRIM */ ATA_HORKAGE_NOLPM = (1 << 20), /* don't use LPM */ ATA_HORKAGE_WD_BROKEN_LPM = (1 << 21), /* some WDs have broken LPM */ ATA_HORKAGE_ZERO_AFTER_TRIM = (1 << 22),/* guarantees zero after trim */ ATA_HORKAGE_NO_DMA_LOG = (1 << 23), /* don't use DMA for log read */ ATA_HORKAGE_NOTRIM = (1 << 24), /* don't use TRIM */ ATA_HORKAGE_MAX_SEC_1024 = (1 << 25), /* Limit max sects to 1024 */ ATA_HORKAGE_MAX_TRIM_128M = (1 << 26), /* Limit max trim size to 128M */ ATA_HORKAGE_NO_NCQ_ON_ATI = (1 << 27), /* Disable NCQ on ATI chipset */ /* DMA mask for user DMA control: User visible values; DO NOT renumber */ ATA_DMA_MASK_ATA = (1 << 0), /* DMA on ATA Disk */ ATA_DMA_MASK_ATAPI = (1 << 1), /* DMA on ATAPI */ ATA_DMA_MASK_CFA = (1 << 2), /* DMA on CF Card */ /* ATAPI command types */ ATAPI_READ = 0, /* READs */ ATAPI_WRITE = 1, /* WRITEs */ ATAPI_READ_CD = 2, /* READ CD [MSF] */ ATAPI_PASS_THRU = 3, /* SAT pass-thru */ ATAPI_MISC = 4, /* the rest */ /* Timing constants */ ATA_TIMING_SETUP = (1 << 0), ATA_TIMING_ACT8B = (1 << 1), ATA_TIMING_REC8B = (1 << 2), ATA_TIMING_CYC8B = (1 << 3), ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | ATA_TIMING_CYC8B, ATA_TIMING_ACTIVE = (1 << 4), ATA_TIMING_RECOVER = (1 << 5), ATA_TIMING_DMACK_HOLD = (1 << 6), ATA_TIMING_CYCLE = (1 << 7), ATA_TIMING_UDMA = (1 << 8), ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | ATA_TIMING_REC8B | ATA_TIMING_CYC8B | ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | ATA_TIMING_DMACK_HOLD | ATA_TIMING_CYCLE | ATA_TIMING_UDMA, /* ACPI constants */ ATA_ACPI_FILTER_SETXFER = 1 << 0, ATA_ACPI_FILTER_LOCK = 1 << 1, ATA_ACPI_FILTER_DIPM = 1 << 2, ATA_ACPI_FILTER_FPDMA_OFFSET = 1 << 3, /* FPDMA non-zero offset */ ATA_ACPI_FILTER_FPDMA_AA = 1 << 4, /* FPDMA auto activate */ ATA_ACPI_FILTER_DEFAULT = ATA_ACPI_FILTER_SETXFER | ATA_ACPI_FILTER_LOCK | ATA_ACPI_FILTER_DIPM, }; enum ata_xfer_mask { ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO, ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA, ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA, }; enum hsm_task_states { HSM_ST_IDLE, /* no command on going */ HSM_ST_FIRST, /* (waiting the device to) write CDB or first data block */ HSM_ST, /* (waiting the device to) transfer data */ HSM_ST_LAST, /* (waiting the device to) complete command */ HSM_ST_ERR, /* error */ }; enum ata_completion_errors { AC_ERR_OK = 0, /* no error */ AC_ERR_DEV = (1 << 0), /* device reported error */ AC_ERR_HSM = (1 << 1), /* host state machine violation */ AC_ERR_TIMEOUT = (1 << 2), /* timeout */ AC_ERR_MEDIA = (1 << 3), /* media error */ AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */ AC_ERR_HOST_BUS = (1 << 5), /* host bus error */ AC_ERR_SYSTEM = (1 << 6), /* system error */ AC_ERR_INVALID = (1 << 7), /* invalid argument */ AC_ERR_OTHER = (1 << 8), /* unknown */ AC_ERR_NODEV_HINT = (1 << 9), /* polling device detection hint */ AC_ERR_NCQ = (1 << 10), /* marker for offending NCQ qc */ }; /* * Link power management policy: If you alter this, you also need to * alter libata-scsi.c (for the ascii descriptions) */ enum ata_lpm_policy { ATA_LPM_UNKNOWN, ATA_LPM_MAX_POWER, ATA_LPM_MED_POWER, ATA_LPM_MED_POWER_WITH_DIPM, /* Med power + DIPM as win IRST does */ ATA_LPM_MIN_POWER_WITH_PARTIAL, /* Min Power + partial and slumber */ ATA_LPM_MIN_POWER, /* Min power + no partial (slumber only) */ }; enum ata_lpm_hints { ATA_LPM_EMPTY = (1 << 0), /* port empty/probing */ ATA_LPM_HIPM = (1 << 1), /* may use HIPM */ ATA_LPM_WAKE_ONLY = (1 << 2), /* only wake up link */ }; /* forward declarations */ struct scsi_device; struct ata_port_operations; struct ata_port; struct ata_link; struct ata_queued_cmd; /* typedefs */ typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); typedef int (*ata_prereset_fn_t)(struct ata_link *link, unsigned long deadline); typedef int (*ata_reset_fn_t)(struct ata_link *link, unsigned int *classes, unsigned long deadline); typedef void (*ata_postreset_fn_t)(struct ata_link *link, unsigned int *classes); extern struct device_attribute dev_attr_unload_heads; #ifdef CONFIG_SATA_HOST extern struct device_attribute dev_attr_link_power_management_policy; extern struct device_attribute dev_attr_ncq_prio_supported; extern struct device_attribute dev_attr_ncq_prio_enable; extern struct device_attribute dev_attr_em_message_type; extern struct device_attribute dev_attr_em_message; extern struct device_attribute dev_attr_sw_activity; #endif enum sw_activity { OFF, BLINK_ON, BLINK_OFF, }; struct ata_taskfile { unsigned long flags; /* ATA_TFLAG_xxx */ u8 protocol; /* ATA_PROT_xxx */ u8 ctl; /* control reg */ u8 hob_feature; /* additional data */ u8 hob_nsect; /* to support LBA48 */ u8 hob_lbal; u8 hob_lbam; u8 hob_lbah; union { u8 error; u8 feature; }; u8 nsect; u8 lbal; u8 lbam; u8 lbah; u8 device; union { u8 status; u8 command; }; u32 auxiliary; /* auxiliary field */ /* from SATA 3.1 and */ /* ATA-8 ACS-3 */ }; #ifdef CONFIG_ATA_SFF struct ata_ioports { void __iomem *cmd_addr; void __iomem *data_addr; void __iomem *error_addr; void __iomem *feature_addr; void __iomem *nsect_addr; void __iomem *lbal_addr; void __iomem *lbam_addr; void __iomem *lbah_addr; void __iomem *device_addr; void __iomem *status_addr; void __iomem *command_addr; void __iomem *altstatus_addr; void __iomem *ctl_addr; #ifdef CONFIG_ATA_BMDMA void __iomem *bmdma_addr; #endif /* CONFIG_ATA_BMDMA */ void __iomem *scr_addr; }; #endif /* CONFIG_ATA_SFF */ struct ata_host { spinlock_t lock; struct device *dev; void __iomem * const *iomap; unsigned int n_ports; unsigned int n_tags; /* nr of NCQ tags */ void *private_data; struct ata_port_operations *ops; unsigned long flags; struct kref kref; struct mutex eh_mutex; struct task_struct *eh_owner; struct ata_port *simplex_claimed; /* channel owning the DMA */ struct ata_port *ports[]; }; struct ata_queued_cmd { struct ata_port *ap; struct ata_device *dev; struct scsi_cmnd *scsicmd; void (*scsidone)(struct scsi_cmnd *); struct ata_taskfile tf; u8 cdb[ATAPI_CDB_LEN]; unsigned long flags; /* ATA_QCFLAG_xxx */ unsigned int tag; /* libata core tag */ unsigned int hw_tag; /* driver tag */ unsigned int n_elem; unsigned int orig_n_elem; int dma_dir; unsigned int sect_size; unsigned int nbytes; unsigned int extrabytes; unsigned int curbytes; struct scatterlist sgent; struct scatterlist *sg; struct scatterlist *cursg; unsigned int cursg_ofs; unsigned int err_mask; struct ata_taskfile result_tf; ata_qc_cb_t complete_fn; void *private_data; void *lldd_task; }; struct ata_port_stats { unsigned long unhandled_irq; unsigned long idle_irq; unsigned long rw_reqbuf; }; struct ata_ering_entry { unsigned int eflags; unsigned int err_mask; u64 timestamp; }; struct ata_ering { int cursor; struct ata_ering_entry ring[ATA_ERING_SIZE]; }; struct ata_device { struct ata_link *link; unsigned int devno; /* 0 or 1 */ unsigned int horkage; /* List of broken features */ unsigned long flags; /* ATA_DFLAG_xxx */ struct scsi_device *sdev; /* attached SCSI device */ void *private_data; #ifdef CONFIG_ATA_ACPI union acpi_object *gtf_cache; unsigned int gtf_filter; #endif #ifdef CONFIG_SATA_ZPODD void *zpodd; #endif struct device tdev; /* n_sector is CLEAR_BEGIN, read comment above CLEAR_BEGIN */ u64 n_sectors; /* size of device, if ATA */ u64 n_native_sectors; /* native size, if ATA */ unsigned int class; /* ATA_DEV_xxx */ unsigned long unpark_deadline; u8 pio_mode; u8 dma_mode; u8 xfer_mode; unsigned int xfer_shift; /* ATA_SHIFT_xxx */ unsigned int multi_count; /* sectors count for READ/WRITE MULTIPLE */ unsigned int max_sectors; /* per-device max sectors */ unsigned int cdb_len; /* per-dev xfer mask */ unsigned long pio_mask; unsigned long mwdma_mask; unsigned long udma_mask; /* for CHS addressing */ u16 cylinders; /* Number of cylinders */ u16 heads; /* Number of heads */ u16 sectors; /* Number of sectors per track */ union { u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */ u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */ } ____cacheline_aligned; /* DEVSLP Timing Variables from Identify Device Data Log */ u8 devslp_timing[ATA_LOG_DEVSLP_SIZE]; /* NCQ send and receive log subcommand support */ u8 ncq_send_recv_cmds[ATA_LOG_NCQ_SEND_RECV_SIZE]; u8 ncq_non_data_cmds[ATA_LOG_NCQ_NON_DATA_SIZE]; /* ZAC zone configuration */ u32 zac_zoned_cap; u32 zac_zones_optimal_open; u32 zac_zones_optimal_nonseq; u32 zac_zones_max_open; /* error history */ int spdn_cnt; /* ering is CLEAR_END, read comment above CLEAR_END */ struct ata_ering ering; }; /* Fields between ATA_DEVICE_CLEAR_BEGIN and ATA_DEVICE_CLEAR_END are * cleared to zero on ata_dev_init(). */ #define ATA_DEVICE_CLEAR_BEGIN offsetof(struct ata_device, n_sectors) #define ATA_DEVICE_CLEAR_END offsetof(struct ata_device, ering) struct ata_eh_info { struct ata_device *dev; /* offending device */ u32 serror; /* SError from LLDD */ unsigned int err_mask; /* port-wide err_mask */ unsigned int action; /* ATA_EH_* action mask */ unsigned int dev_action[ATA_MAX_DEVICES]; /* dev EH action */ unsigned int flags; /* ATA_EHI_* flags */ unsigned int probe_mask; char desc[ATA_EH_DESC_LEN]; int desc_len; }; struct ata_eh_context { struct ata_eh_info i; int tries[ATA_MAX_DEVICES]; int cmd_timeout_idx[ATA_MAX_DEVICES] [ATA_EH_CMD_TIMEOUT_TABLE_SIZE]; unsigned int classes[ATA_MAX_DEVICES]; unsigned int did_probe_mask; unsigned int unloaded_mask; unsigned int saved_ncq_enabled; u8 saved_xfer_mode[ATA_MAX_DEVICES]; /* timestamp for the last reset attempt or success */ unsigned long last_reset; }; struct ata_acpi_drive { u32 pio; u32 dma; } __packed; struct ata_acpi_gtm { struct ata_acpi_drive drive[2]; u32 flags; } __packed; struct ata_link { struct ata_port *ap; int pmp; /* port multiplier port # */ struct device tdev; unsigned int active_tag; /* active tag on this link */ u32 sactive; /* active NCQ commands */ unsigned int flags; /* ATA_LFLAG_xxx */ u32 saved_scontrol; /* SControl on probe */ unsigned int hw_sata_spd_limit; unsigned int sata_spd_limit; unsigned int sata_spd; /* current SATA PHY speed */ enum ata_lpm_policy lpm_policy; /* record runtime error info, protected by host_set lock */ struct ata_eh_info eh_info; /* EH context */ struct ata_eh_context eh_context; struct ata_device device[ATA_MAX_DEVICES]; unsigned long last_lpm_change; /* when last LPM change happened */ }; #define ATA_LINK_CLEAR_BEGIN offsetof(struct ata_link, active_tag) #define ATA_LINK_CLEAR_END offsetof(struct ata_link, device[0]) struct ata_port { struct Scsi_Host *scsi_host; /* our co-allocated scsi host */ struct ata_port_operations *ops; spinlock_t *lock; /* Flags owned by the EH context. Only EH should touch these once the port is active */ unsigned long flags; /* ATA_FLAG_xxx */ /* Flags that change dynamically, protected by ap->lock */ unsigned int pflags; /* ATA_PFLAG_xxx */ unsigned int print_id; /* user visible unique port ID */ unsigned int local_port_no; /* host local port num */ unsigned int port_no; /* 0 based port no. inside the host */ #ifdef CONFIG_ATA_SFF struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ u8 ctl; /* cache of ATA control register */ u8 last_ctl; /* Cache last written value */ struct ata_link* sff_pio_task_link; /* link currently used */ struct delayed_work sff_pio_task; #ifdef CONFIG_ATA_BMDMA struct ata_bmdma_prd *bmdma_prd; /* BMDMA SG list */ dma_addr_t bmdma_prd_dma; /* and its DMA mapping */ #endif /* CONFIG_ATA_BMDMA */ #endif /* CONFIG_ATA_SFF */ unsigned int pio_mask; unsigned int mwdma_mask; unsigned int udma_mask; unsigned int cbl; /* cable type; ATA_CBL_xxx */ struct ata_queued_cmd qcmd[ATA_MAX_QUEUE + 1]; unsigned long sas_tag_allocated; /* for sas tag allocation only */ u64 qc_active; int nr_active_links; /* #links with active qcs */ unsigned int sas_last_tag; /* track next tag hw expects */ struct ata_link link; /* host default link */ struct ata_link *slave_link; /* see ata_slave_link_init() */ int nr_pmp_links; /* nr of available PMP links */ struct ata_link *pmp_link; /* array of PMP links */ struct ata_link *excl_link; /* for PMP qc exclusion */ struct ata_port_stats stats; struct ata_host *host; struct device *dev; struct device tdev; struct mutex scsi_scan_mutex; struct delayed_work hotplug_task; struct delayed_work scsi_rescan_task; unsigned int hsm_task_state; u32 msg_enable; struct list_head eh_done_q; wait_queue_head_t eh_wait_q; int eh_tries; struct completion park_req_pending; pm_message_t pm_mesg; enum ata_lpm_policy target_lpm_policy; struct timer_list fastdrain_timer; unsigned long fastdrain_cnt; async_cookie_t cookie; int em_message_type; void *private_data; #ifdef CONFIG_ATA_ACPI struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ #endif /* owned by EH */ u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned; }; /* The following initializer overrides a method to NULL whether one of * its parent has the method defined or not. This is equivalent to * ERR_PTR(-ENOENT). Unfortunately, ERR_PTR doesn't render a constant * expression and thus can't be used as an initializer. */ #define ATA_OP_NULL (void *)(unsigned long)(-ENOENT) struct ata_port_operations { /* * Command execution */ int (*qc_defer)(struct ata_queued_cmd *qc); int (*check_atapi_dma)(struct ata_queued_cmd *qc); enum ata_completion_errors (*qc_prep)(struct ata_queued_cmd *qc); unsigned int (*qc_issue)(struct ata_queued_cmd *qc); bool (*qc_fill_rtf)(struct ata_queued_cmd *qc); /* * Configuration and exception handling */ int (*cable_detect)(struct ata_port *ap); unsigned long (*mode_filter)(struct ata_device *dev, unsigned long xfer_mask); void (*set_piomode)(struct ata_port *ap, struct ata_device *dev); void (*set_dmamode)(struct ata_port *ap, struct ata_device *dev); int (*set_mode)(struct ata_link *link, struct ata_device **r_failed_dev); unsigned int (*read_id)(struct ata_device *dev, struct ata_taskfile *tf, u16 *id); void (*dev_config)(struct ata_device *dev); void (*freeze)(struct ata_port *ap); void (*thaw)(struct ata_port *ap); ata_prereset_fn_t prereset; ata_reset_fn_t softreset; ata_reset_fn_t hardreset; ata_postreset_fn_t postreset; ata_prereset_fn_t pmp_prereset; ata_reset_fn_t pmp_softreset; ata_reset_fn_t pmp_hardreset; ata_postreset_fn_t pmp_postreset; void (*error_handler)(struct ata_port *ap); void (*lost_interrupt)(struct ata_port *ap); void (*post_internal_cmd)(struct ata_queued_cmd *qc); void (*sched_eh)(struct ata_port *ap); void (*end_eh)(struct ata_port *ap); /* * Optional features */ int (*scr_read)(struct ata_link *link, unsigned int sc_reg, u32 *val); int (*scr_write)(struct ata_link *link, unsigned int sc_reg, u32 val); void (*pmp_attach)(struct ata_port *ap); void (*pmp_detach)(struct ata_port *ap); int (*set_lpm)(struct ata_link *link, enum ata_lpm_policy policy, unsigned hints); /* * Start, stop, suspend and resume */ int (*port_suspend)(struct ata_port *ap, pm_message_t mesg); int (*port_resume)(struct ata_port *ap); int (*port_start)(struct ata_port *ap); void (*port_stop)(struct ata_port *ap); void (*host_stop)(struct ata_host *host); #ifdef CONFIG_ATA_SFF /* * SFF / taskfile oriented ops */ void (*sff_dev_select)(struct ata_port *ap, unsigned int device); void (*sff_set_devctl)(struct ata_port *ap, u8 ctl); u8 (*sff_check_status)(struct ata_port *ap); u8 (*sff_check_altstatus)(struct ata_port *ap); void (*sff_tf_load)(struct ata_port *ap, const struct ata_taskfile *tf); void (*sff_tf_read)(struct ata_port *ap, struct ata_taskfile *tf); void (*sff_exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); unsigned int (*sff_data_xfer)(struct ata_queued_cmd *qc, unsigned char *buf, unsigned int buflen, int rw); void (*sff_irq_on)(struct ata_port *); bool (*sff_irq_check)(struct ata_port *); void (*sff_irq_clear)(struct ata_port *); void (*sff_drain_fifo)(struct ata_queued_cmd *qc); #ifdef CONFIG_ATA_BMDMA void (*bmdma_setup)(struct ata_queued_cmd *qc); void (*bmdma_start)(struct ata_queued_cmd *qc); void (*bmdma_stop)(struct ata_queued_cmd *qc); u8 (*bmdma_status)(struct ata_port *ap); #endif /* CONFIG_ATA_BMDMA */ #endif /* CONFIG_ATA_SFF */ ssize_t (*em_show)(struct ata_port *ap, char *buf); ssize_t (*em_store)(struct ata_port *ap, const char *message, size_t size); ssize_t (*sw_activity_show)(struct ata_device *dev, char *buf); ssize_t (*sw_activity_store)(struct ata_device *dev, enum sw_activity val); ssize_t (*transmit_led_message)(struct ata_port *ap, u32 state, ssize_t size); /* * Obsolete */ void (*phy_reset)(struct ata_port *ap); void (*eng_timeout)(struct ata_port *ap); /* * ->inherits must be the last field and all the preceding * fields must be pointers. */ const struct ata_port_operations *inherits; }; struct ata_port_info { unsigned long flags; unsigned long link_flags; unsigned long pio_mask; unsigned long mwdma_mask; unsigned long udma_mask; struct ata_port_operations *port_ops; void *private_data; }; struct ata_timing { unsigned short mode; /* ATA mode */ unsigned short setup; /* t1 */ unsigned short act8b; /* t2 for 8-bit I/O */ unsigned short rec8b; /* t2i for 8-bit I/O */ unsigned short cyc8b; /* t0 for 8-bit I/O */ unsigned short active; /* t2 or tD */ unsigned short recover; /* t2i or tK */ unsigned short dmack_hold; /* tj */ unsigned short cycle; /* t0 */ unsigned short udma; /* t2CYCTYP/2 */ }; /* * Core layer - drivers/ata/libata-core.c */ extern struct ata_port_operations ata_dummy_port_ops; extern const struct ata_port_info ata_dummy_port_info; static inline bool ata_is_atapi(u8 prot) { return prot & ATA_PROT_FLAG_ATAPI; } static inline bool ata_is_pio(u8 prot) { return prot & ATA_PROT_FLAG_PIO; } static inline bool ata_is_dma(u8 prot) { return prot & ATA_PROT_FLAG_DMA; } static inline bool ata_is_ncq(u8 prot) { return prot & ATA_PROT_FLAG_NCQ; } static inline bool ata_is_data(u8 prot) { return prot & (ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA); } static inline int is_multi_taskfile(struct ata_taskfile *tf) { return (tf->command == ATA_CMD_READ_MULTI) || (tf->command == ATA_CMD_WRITE_MULTI) || (tf->command == ATA_CMD_READ_MULTI_EXT) || (tf->command == ATA_CMD_WRITE_MULTI_EXT) || (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT); } static inline int ata_port_is_dummy(struct ata_port *ap) { return ap->ops == &ata_dummy_port_ops; } extern int ata_std_prereset(struct ata_link *link, unsigned long deadline); extern int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, int (*check_ready)(struct ata_link *link)); extern int sata_std_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline); extern void ata_std_postreset(struct ata_link *link, unsigned int *classes); extern struct ata_host *ata_host_alloc(struct device *dev, int max_ports); extern struct ata_host *ata_host_alloc_pinfo(struct device *dev, const struct ata_port_info * const * ppi, int n_ports); extern void ata_host_get(struct ata_host *host); extern void ata_host_put(struct ata_host *host); extern int ata_host_start(struct ata_host *host); extern int ata_host_register(struct ata_host *host, struct scsi_host_template *sht); extern int ata_host_activate(struct ata_host *host, int irq, irq_handler_t irq_handler, unsigned long irq_flags, struct scsi_host_template *sht); extern void ata_host_detach(struct ata_host *host); extern void ata_host_init(struct ata_host *, struct device *, struct ata_port_operations *); extern int ata_scsi_detect(struct scsi_host_template *sht); extern int ata_scsi_ioctl(struct scsi_device *dev, unsigned int cmd, void __user *arg); #ifdef CONFIG_COMPAT #define ATA_SCSI_COMPAT_IOCTL .compat_ioctl = ata_scsi_ioctl, #else #define ATA_SCSI_COMPAT_IOCTL /* empty */ #endif extern int ata_scsi_queuecmd(struct Scsi_Host *h, struct scsi_cmnd *cmd); #if IS_REACHABLE(CONFIG_ATA) bool ata_scsi_dma_need_drain(struct request *rq); #else #define ata_scsi_dma_need_drain NULL #endif extern int ata_sas_scsi_ioctl(struct ata_port *ap, struct scsi_device *dev, unsigned int cmd, void __user *arg); extern bool ata_link_online(struct ata_link *link); extern bool ata_link_offline(struct ata_link *link); #ifdef CONFIG_PM extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg); extern void ata_host_resume(struct ata_host *host); extern void ata_sas_port_suspend(struct ata_port *ap); extern void ata_sas_port_resume(struct ata_port *ap); #else static inline void ata_sas_port_suspend(struct ata_port *ap) { } static inline void ata_sas_port_resume(struct ata_port *ap) { } #endif extern int ata_ratelimit(void); extern void ata_msleep(struct ata_port *ap, unsigned int msecs); extern u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val, unsigned long interval, unsigned long timeout); extern int atapi_cmd_type(u8 opcode); extern unsigned long ata_pack_xfermask(unsigned long pio_mask, unsigned long mwdma_mask, unsigned long udma_mask); extern void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask, unsigned long *mwdma_mask, unsigned long *udma_mask); extern u8 ata_xfer_mask2mode(unsigned long xfer_mask); extern unsigned long ata_xfer_mode2mask(u8 xfer_mode); extern int ata_xfer_mode2shift(unsigned long xfer_mode); extern const char *ata_mode_string(unsigned long xfer_mask); extern unsigned long ata_id_xfermask(const u16 *id); extern int ata_std_qc_defer(struct ata_queued_cmd *qc); extern enum ata_completion_errors ata_noop_qc_prep(struct ata_queued_cmd *qc); extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, unsigned int n_elem); extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); extern void ata_dev_disable(struct ata_device *adev); extern void ata_id_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern void ata_id_c_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern unsigned int ata_do_dev_read_id(struct ata_device *dev, struct ata_taskfile *tf, u16 *id); extern void ata_qc_complete(struct ata_queued_cmd *qc); extern u64 ata_qc_get_active(struct ata_port *ap); extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd); extern int ata_std_bios_param(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int geom[]); extern void ata_scsi_unlock_native_capacity(struct scsi_device *sdev); extern int ata_scsi_slave_config(struct scsi_device *sdev); extern void ata_scsi_slave_destroy(struct scsi_device *sdev); extern int ata_scsi_change_queue_depth(struct scsi_device *sdev, int queue_depth); extern int __ata_change_queue_depth(struct ata_port *ap, struct scsi_device *sdev, int queue_depth); extern struct ata_device *ata_dev_pair(struct ata_device *adev); extern int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev); extern void ata_scsi_port_error_handler(struct Scsi_Host *host, struct ata_port *ap); extern void ata_scsi_cmd_error_handler(struct Scsi_Host *host, struct ata_port *ap, struct list_head *eh_q); /* * SATA specific code - drivers/ata/libata-sata.c */ #ifdef CONFIG_SATA_HOST extern const unsigned long sata_deb_timing_normal[]; extern const unsigned long sata_deb_timing_hotplug[]; extern const unsigned long sata_deb_timing_long[]; static inline const unsigned long * sata_ehc_deb_timing(struct ata_eh_context *ehc) { if (ehc->i.flags & ATA_EHI_HOTPLUGGED) return sata_deb_timing_hotplug; else return sata_deb_timing_normal; } extern int sata_scr_valid(struct ata_link *link); extern int sata_scr_read(struct ata_link *link, int reg, u32 *val); extern int sata_scr_write(struct ata_link *link, int reg, u32 val); extern int sata_scr_write_flush(struct ata_link *link, int reg, u32 val); extern int sata_set_spd(struct ata_link *link); extern int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, unsigned long deadline, bool *online, int (*check_ready)(struct ata_link *)); extern int sata_link_resume(struct ata_link *link, const unsigned long *params, unsigned long deadline); extern void ata_eh_analyze_ncq_error(struct ata_link *link); #else static inline const unsigned long * sata_ehc_deb_timing(struct ata_eh_context *ehc) { return NULL; } static inline int sata_scr_valid(struct ata_link *link) { return 0; } static inline int sata_scr_read(struct ata_link *link, int reg, u32 *val) { return -EOPNOTSUPP; } static inline int sata_scr_write(struct ata_link *link, int reg, u32 val) { return -EOPNOTSUPP; } static inline int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) { return -EOPNOTSUPP; } static inline int sata_set_spd(struct ata_link *link) { return -EOPNOTSUPP; } static inline int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, unsigned long deadline, bool *online, int (*check_ready)(struct ata_link *)) { if (online) *online = false; return -EOPNOTSUPP; } static inline int sata_link_resume(struct ata_link *link, const unsigned long *params, unsigned long deadline) { return -EOPNOTSUPP; } static inline void ata_eh_analyze_ncq_error(struct ata_link *link) { } #endif extern int sata_link_debounce(struct ata_link *link, const unsigned long *params, unsigned long deadline); extern int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy, bool spm_wakeup); extern int ata_slave_link_init(struct ata_port *ap); extern void ata_sas_port_destroy(struct ata_port *); extern struct ata_port *ata_sas_port_alloc(struct ata_host *, struct ata_port_info *, struct Scsi_Host *); extern void ata_sas_async_probe(struct ata_port *ap); extern int ata_sas_sync_probe(struct ata_port *ap); extern int ata_sas_port_init(struct ata_port *); extern int ata_sas_port_start(struct ata_port *ap); extern int ata_sas_tport_add(struct device *parent, struct ata_port *ap); extern void ata_sas_tport_delete(struct ata_port *ap); extern void ata_sas_port_stop(struct ata_port *ap); extern int ata_sas_slave_configure(struct scsi_device *, struct ata_port *); extern int ata_sas_queuecmd(struct scsi_cmnd *cmd, struct ata_port *ap); extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis); extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); extern int ata_qc_complete_multiple(struct ata_port *ap, u64 qc_active); extern bool sata_lpm_ignore_phy_events(struct ata_link *link); extern int sata_async_notification(struct ata_port *ap); extern int ata_cable_40wire(struct ata_port *ap); extern int ata_cable_80wire(struct ata_port *ap); extern int ata_cable_sata(struct ata_port *ap); extern int ata_cable_ignore(struct ata_port *ap); extern int ata_cable_unknown(struct ata_port *ap); /* Timing helpers */ extern unsigned int ata_pio_need_iordy(const struct ata_device *); extern u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle); /* PCI */ #ifdef CONFIG_PCI struct pci_dev; struct pci_bits { unsigned int reg; /* PCI config register to read */ unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ unsigned long mask; unsigned long val; }; extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); extern void ata_pci_shutdown_one(struct pci_dev *pdev); extern void ata_pci_remove_one(struct pci_dev *pdev); #ifdef CONFIG_PM extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg); extern int __must_check ata_pci_device_do_resume(struct pci_dev *pdev); extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); extern int ata_pci_device_resume(struct pci_dev *pdev); #endif /* CONFIG_PM */ #endif /* CONFIG_PCI */ struct platform_device; extern int ata_platform_remove_one(struct platform_device *pdev); /* * ACPI - drivers/ata/libata-acpi.c */ #ifdef CONFIG_ATA_ACPI static inline const struct ata_acpi_gtm *ata_acpi_init_gtm(struct ata_port *ap) { if (ap->pflags & ATA_PFLAG_INIT_GTM_VALID) return &ap->__acpi_init_gtm; return NULL; } int ata_acpi_stm(struct ata_port *ap, const struct ata_acpi_gtm *stm); int ata_acpi_gtm(struct ata_port *ap, struct ata_acpi_gtm *stm); unsigned long ata_acpi_gtm_xfermask(struct ata_device *dev, const struct ata_acpi_gtm *gtm); int ata_acpi_cbl_80wire(struct ata_port *ap, const struct ata_acpi_gtm *gtm); #else static inline const struct ata_acpi_gtm *ata_acpi_init_gtm(struct ata_port *ap) { return NULL; } static inline int ata_acpi_stm(const struct ata_port *ap, struct ata_acpi_gtm *stm) { return -ENOSYS; } static inline int ata_acpi_gtm(const struct ata_port *ap, struct ata_acpi_gtm *stm) { return -ENOSYS; } static inline unsigned int ata_acpi_gtm_xfermask(struct ata_device *dev, const struct ata_acpi_gtm *gtm) { return 0; } static inline int ata_acpi_cbl_80wire(struct ata_port *ap, const struct ata_acpi_gtm *gtm) { return 0; } #endif /* * EH - drivers/ata/libata-eh.c */ extern void ata_port_schedule_eh(struct ata_port *ap); extern void ata_port_wait_eh(struct ata_port *ap); extern int ata_link_abort(struct ata_link *link); extern int ata_port_abort(struct ata_port *ap); extern int ata_port_freeze(struct ata_port *ap); extern void ata_eh_freeze_port(struct ata_port *ap); extern void ata_eh_thaw_port(struct ata_port *ap); extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ata_reset_fn_t softreset, ata_reset_fn_t hardreset, ata_postreset_fn_t postreset); extern void ata_std_error_handler(struct ata_port *ap); extern void ata_std_sched_eh(struct ata_port *ap); extern void ata_std_end_eh(struct ata_port *ap); extern int ata_link_nr_enabled(struct ata_link *link); /* * Base operations to inherit from and initializers for sht * * Operations * * base : Common to all libata drivers. * sata : SATA controllers w/ native interface. * pmp : SATA controllers w/ PMP support. * sff : SFF ATA controllers w/o BMDMA support. * bmdma : SFF ATA controllers w/ BMDMA support. * * sht initializers * * BASE : Common to all libata drivers. The user must set * sg_tablesize and dma_boundary. * PIO : SFF ATA controllers w/ only PIO support. * BMDMA : SFF ATA controllers w/ BMDMA support. sg_tablesize and * dma_boundary are set to BMDMA limits. * NCQ : SATA controllers supporting NCQ. The user must set * sg_tablesize, dma_boundary and can_queue. */ extern const struct ata_port_operations ata_base_port_ops; extern const struct ata_port_operations sata_port_ops; extern struct device_attribute *ata_common_sdev_attrs[]; /* * All sht initializers (BASE, PIO, BMDMA, NCQ) must be instantiated * by the edge drivers. Because the 'module' field of sht must be the * edge driver's module reference, otherwise the driver can be unloaded * even if the scsi_device is being accessed. */ #define __ATA_BASE_SHT(drv_name) \ .module = THIS_MODULE, \ .name = drv_name, \ .ioctl = ata_scsi_ioctl, \ ATA_SCSI_COMPAT_IOCTL \ .queuecommand = ata_scsi_queuecmd, \ .dma_need_drain = ata_scsi_dma_need_drain, \ .this_id = ATA_SHT_THIS_ID, \ .emulated = ATA_SHT_EMULATED, \ .proc_name = drv_name, \ .slave_destroy = ata_scsi_slave_destroy, \ .bios_param = ata_std_bios_param, \ .unlock_native_capacity = ata_scsi_unlock_native_capacity #define ATA_SUBBASE_SHT(drv_name) \ __ATA_BASE_SHT(drv_name), \ .can_queue = ATA_DEF_QUEUE, \ .tag_alloc_policy = BLK_TAG_ALLOC_RR, \ .slave_configure = ata_scsi_slave_config #define ATA_BASE_SHT(drv_name) \ ATA_SUBBASE_SHT(drv_name), \ .sdev_attrs = ata_common_sdev_attrs #ifdef CONFIG_SATA_HOST extern struct device_attribute *ata_ncq_sdev_attrs[]; #define ATA_NCQ_SHT(drv_name) \ ATA_SUBBASE_SHT(drv_name), \ .sdev_attrs = ata_ncq_sdev_attrs, \ .change_queue_depth = ata_scsi_change_queue_depth #endif /* * PMP helpers */ #ifdef CONFIG_SATA_PMP static inline bool sata_pmp_supported(struct ata_port *ap) { return ap->flags & ATA_FLAG_PMP; } static inline bool sata_pmp_attached(struct ata_port *ap) { return ap->nr_pmp_links != 0; } static inline bool ata_is_host_link(const struct ata_link *link) { return link == &link->ap->link || link == link->ap->slave_link; } #else /* CONFIG_SATA_PMP */ static inline bool sata_pmp_supported(struct ata_port *ap) { return false; } static inline bool sata_pmp_attached(struct ata_port *ap) { return false; } static inline bool ata_is_host_link(const struct ata_link *link) { return true; } #endif /* CONFIG_SATA_PMP */ static inline int sata_srst_pmp(struct ata_link *link) { if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) return SATA_PMP_CTRL_PORT; return link->pmp; } #define ata_port_printk(level, ap, fmt, ...) \ pr_ ## level ("ata%u: " fmt, (ap)->print_id, ##__VA_ARGS__) #define ata_port_err(ap, fmt, ...) \ ata_port_printk(err, ap, fmt, ##__VA_ARGS__) #define ata_port_warn(ap, fmt, ...) \ ata_port_printk(warn, ap, fmt, ##__VA_ARGS__) #define ata_port_notice(ap, fmt, ...) \ ata_port_printk(notice, ap, fmt, ##__VA_ARGS__) #define ata_port_info(ap, fmt, ...) \ ata_port_printk(info, ap, fmt, ##__VA_ARGS__) #define ata_port_dbg(ap, fmt, ...) \ ata_port_printk(debug, ap, fmt, ##__VA_ARGS__) #define ata_link_printk(level, link, fmt, ...) \ do { \ if (sata_pmp_attached((link)->ap) || \ (link)->ap->slave_link) \ pr_ ## level ("ata%u.%02u: " fmt, \ (link)->ap->print_id, \ (link)->pmp, \ ##__VA_ARGS__); \ else \ pr_ ## level ("ata%u: " fmt, \ (link)->ap->print_id, \ ##__VA_ARGS__); \ } while (0) #define ata_link_err(link, fmt, ...) \ ata_link_printk(err, link, fmt, ##__VA_ARGS__) #define ata_link_warn(link, fmt, ...) \ ata_link_printk(warn, link, fmt, ##__VA_ARGS__) #define ata_link_notice(link, fmt, ...) \ ata_link_printk(notice, link, fmt, ##__VA_ARGS__) #define ata_link_info(link, fmt, ...) \ ata_link_printk(info, link, fmt, ##__VA_ARGS__) #define ata_link_dbg(link, fmt, ...) \ ata_link_printk(debug, link, fmt, ##__VA_ARGS__) #define ata_dev_printk(level, dev, fmt, ...) \ pr_ ## level("ata%u.%02u: " fmt, \ (dev)->link->ap->print_id, \ (dev)->link->pmp + (dev)->devno, \ ##__VA_ARGS__) #define ata_dev_err(dev, fmt, ...) \ ata_dev_printk(err, dev, fmt, ##__VA_ARGS__) #define ata_dev_warn(dev, fmt, ...) \ ata_dev_printk(warn, dev, fmt, ##__VA_ARGS__) #define ata_dev_notice(dev, fmt, ...) \ ata_dev_printk(notice, dev, fmt, ##__VA_ARGS__) #define ata_dev_info(dev, fmt, ...) \ ata_dev_printk(info, dev, fmt, ##__VA_ARGS__) #define ata_dev_dbg(dev, fmt, ...) \ ata_dev_printk(debug, dev, fmt, ##__VA_ARGS__) void ata_print_version(const struct device *dev, const char *version); /* * ata_eh_info helpers */ extern __printf(2, 3) void __ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...); extern __printf(2, 3) void ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...); extern void ata_ehi_clear_desc(struct ata_eh_info *ehi); static inline void ata_ehi_hotplugged(struct ata_eh_info *ehi) { ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1; ehi->flags |= ATA_EHI_HOTPLUGGED; ehi->action |= ATA_EH_RESET | ATA_EH_ENABLE_LINK; ehi->err_mask |= AC_ERR_ATA_BUS; } /* * port description helpers */ extern __printf(2, 3) void ata_port_desc(struct ata_port *ap, const char *fmt, ...); #ifdef CONFIG_PCI extern void ata_port_pbar_desc(struct ata_port *ap, int bar, ssize_t offset, const char *name); #endif static inline bool ata_tag_internal(unsigned int tag) { return tag == ATA_TAG_INTERNAL; } static inline bool ata_tag_valid(unsigned int tag) { return tag < ATA_MAX_QUEUE || ata_tag_internal(tag); } #define __ata_qc_for_each(ap, qc, tag, max_tag, fn) \ for ((tag) = 0; (tag) < (max_tag) && \ ({ qc = fn((ap), (tag)); 1; }); (tag)++) \ /* * Internal use only, iterate commands ignoring error handling and * status of 'qc'. */ #define ata_qc_for_each_raw(ap, qc, tag) \ __ata_qc_for_each(ap, qc, tag, ATA_MAX_QUEUE, __ata_qc_from_tag) /* * Iterate all potential commands that can be queued */ #define ata_qc_for_each(ap, qc, tag) \ __ata_qc_for_each(ap, qc, tag, ATA_MAX_QUEUE, ata_qc_from_tag) /* * Like ata_qc_for_each, but with the internal tag included */ #define ata_qc_for_each_with_internal(ap, qc, tag) \ __ata_qc_for_each(ap, qc, tag, ATA_MAX_QUEUE + 1, ata_qc_from_tag) /* * device helpers */ static inline unsigned int ata_class_enabled(unsigned int class) { return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI || class == ATA_DEV_PMP || class == ATA_DEV_SEMB || class == ATA_DEV_ZAC; } static inline unsigned int ata_class_disabled(unsigned int class) { return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP || class == ATA_DEV_PMP_UNSUP || class == ATA_DEV_SEMB_UNSUP || class == ATA_DEV_ZAC_UNSUP; } static inline unsigned int ata_class_absent(unsigned int class) { return !ata_class_enabled(class) && !ata_class_disabled(class); } static inline unsigned int ata_dev_enabled(const struct ata_device *dev) { return ata_class_enabled(dev->class); } static inline unsigned int ata_dev_disabled(const struct ata_device *dev) { return ata_class_disabled(dev->class); } static inline unsigned int ata_dev_absent(const struct ata_device *dev) { return ata_class_absent(dev->class); } /* * link helpers */ static inline int ata_link_max_devices(const struct ata_link *link) { if (ata_is_host_link(link) && link->ap->flags & ATA_FLAG_SLAVE_POSS) return 2; return 1; } static inline int ata_link_active(struct ata_link *link) { return ata_tag_valid(link->active_tag) || link->sactive; } /* * Iterators * * ATA_LITER_* constants are used to select link iteration mode and * ATA_DITER_* device iteration mode. * * For a custom iteration directly using ata_{link|dev}_next(), if * @link or @dev, respectively, is NULL, the first element is * returned. @dev and @link can be any valid device or link and the * next element according to the iteration mode will be returned. * After the last element, NULL is returned. */ enum ata_link_iter_mode { ATA_LITER_EDGE, /* if present, PMP links only; otherwise, * host link. no slave link */ ATA_LITER_HOST_FIRST, /* host link followed by PMP or slave links */ ATA_LITER_PMP_FIRST, /* PMP links followed by host link, * slave link still comes after host link */ }; enum ata_dev_iter_mode { ATA_DITER_ENABLED, ATA_DITER_ENABLED_REVERSE, ATA_DITER_ALL, ATA_DITER_ALL_REVERSE, }; extern struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap, enum ata_link_iter_mode mode); extern struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link, enum ata_dev_iter_mode mode); /* * Shortcut notation for iterations * * ata_for_each_link() iterates over each link of @ap according to * @mode. @link points to the current link in the loop. @link is * NULL after loop termination. ata_for_each_dev() works the same way * except that it iterates over each device of @link. * * Note that the mode prefixes ATA_{L|D}ITER_ shouldn't need to be * specified when using the following shorthand notations. Only the * mode itself (EDGE, HOST_FIRST, ENABLED, etc...) should be * specified. This not only increases brevity but also makes it * impossible to use ATA_LITER_* for device iteration or vice-versa. */ #define ata_for_each_link(link, ap, mode) \ for ((link) = ata_link_next(NULL, (ap), ATA_LITER_##mode); (link); \ (link) = ata_link_next((link), (ap), ATA_LITER_##mode)) #define ata_for_each_dev(dev, link, mode) \ for ((dev) = ata_dev_next(NULL, (link), ATA_DITER_##mode); (dev); \ (dev) = ata_dev_next((dev), (link), ATA_DITER_##mode)) /** * ata_ncq_enabled - Test whether NCQ is enabled * @dev: ATA device to test for * * LOCKING: * spin_lock_irqsave(host lock) * * RETURNS: * 1 if NCQ is enabled for @dev, 0 otherwise. */ static inline int ata_ncq_enabled(struct ata_device *dev) { if (!IS_ENABLED(CONFIG_SATA_HOST)) return 0; return (dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF | ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ; } static inline bool ata_fpdma_dsm_supported(struct ata_device *dev) { return (dev->flags & ATA_DFLAG_NCQ_SEND_RECV) && (dev->ncq_send_recv_cmds[ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET] & ATA_LOG_NCQ_SEND_RECV_DSM_TRIM); } static inline bool ata_fpdma_read_log_supported(struct ata_device *dev) { return (dev->flags & ATA_DFLAG_NCQ_SEND_RECV) && (dev->ncq_send_recv_cmds[ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET] & ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED); } static inline bool ata_fpdma_zac_mgmt_in_supported(struct ata_device *dev) { return (dev->flags & ATA_DFLAG_NCQ_SEND_RECV) && (dev->ncq_send_recv_cmds[ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET] & ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED); } static inline bool ata_fpdma_zac_mgmt_out_supported(struct ata_device *dev) { return (dev->ncq_non_data_cmds[ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET] & ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT); } static inline void ata_qc_set_polling(struct ata_queued_cmd *qc) { qc->tf.ctl |= ATA_NIEN; } static inline struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap, unsigned int tag) { if (ata_tag_valid(tag)) return &ap->qcmd[tag]; return NULL; } static inline struct ata_queued_cmd *ata_qc_from_tag(struct ata_port *ap, unsigned int tag) { struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag); if (unlikely(!qc) || !ap->ops->error_handler) return qc; if ((qc->flags & (ATA_QCFLAG_ACTIVE | ATA_QCFLAG_FAILED)) == ATA_QCFLAG_ACTIVE) return qc; return NULL; } static inline unsigned int ata_qc_raw_nbytes(struct ata_queued_cmd *qc) { return qc->nbytes - min(qc->extrabytes, qc->nbytes); } static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf) { memset(tf, 0, sizeof(*tf)); #ifdef CONFIG_ATA_SFF tf->ctl = dev->link->ap->ctl; #else tf->ctl = ATA_DEVCTL_OBS; #endif if (dev->devno == 0) tf->device = ATA_DEVICE_OBS; else tf->device = ATA_DEVICE_OBS | ATA_DEV1; } static inline void ata_qc_reinit(struct ata_queued_cmd *qc) { qc->dma_dir = DMA_NONE; qc->sg = NULL; qc->flags = 0; qc->cursg = NULL; qc->cursg_ofs = 0; qc->nbytes = qc->extrabytes = qc->curbytes = 0; qc->n_elem = 0; qc->err_mask = 0; qc->sect_size = ATA_SECT_SIZE; ata_tf_init(qc->dev, &qc->tf); /* init result_tf such that it indicates normal completion */ qc->result_tf.command = ATA_DRDY; qc->result_tf.feature = 0; } static inline int ata_try_flush_cache(const struct ata_device *dev) { return ata_id_wcache_enabled(dev->id) || ata_id_has_flush(dev->id) || ata_id_has_flush_ext(dev->id); } static inline unsigned int ac_err_mask(u8 status) { if (status & (ATA_BUSY | ATA_DRQ)) return AC_ERR_HSM; if (status & (ATA_ERR | ATA_DF)) return AC_ERR_DEV; return 0; } static inline unsigned int __ac_err_mask(u8 status) { unsigned int mask = ac_err_mask(status); if (mask == 0) return AC_ERR_OTHER; return mask; } static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host) { return *(struct ata_port **)&host->hostdata[0]; } static inline int ata_check_ready(u8 status) { if (!(status & ATA_BUSY)) return 1; /* 0xff indicates either no device or device not ready */ if (status == 0xff) return -ENODEV; return 0; } static inline unsigned long ata_deadline(unsigned long from_jiffies, unsigned long timeout_msecs) { return from_jiffies + msecs_to_jiffies(timeout_msecs); } /* Don't open code these in drivers as there are traps. Firstly the range may change in future hardware and specs, secondly 0xFF means 'no DMA' but is > UDMA_0. Dyma ddreigiau */ static inline int ata_using_mwdma(struct ata_device *adev) { if (adev->dma_mode >= XFER_MW_DMA_0 && adev->dma_mode <= XFER_MW_DMA_4) return 1; return 0; } static inline int ata_using_udma(struct ata_device *adev) { if (adev->dma_mode >= XFER_UDMA_0 && adev->dma_mode <= XFER_UDMA_7) return 1; return 0; } static inline int ata_dma_enabled(struct ata_device *adev) { return (adev->dma_mode == 0xFF ? 0 : 1); } /************************************************************************** * PATA timings - drivers/ata/libata-pata-timings.c */ extern const struct ata_timing *ata_timing_find_mode(u8 xfer_mode); extern int ata_timing_compute(struct ata_device *, unsigned short, struct ata_timing *, int, int); extern void ata_timing_merge(const struct ata_timing *, const struct ata_timing *, struct ata_timing *, unsigned int); /************************************************************************** * PMP - drivers/ata/libata-pmp.c */ #ifdef CONFIG_SATA_PMP extern const struct ata_port_operations sata_pmp_port_ops; extern int sata_pmp_qc_defer_cmd_switch(struct ata_queued_cmd *qc); extern void sata_pmp_error_handler(struct ata_port *ap); #else /* CONFIG_SATA_PMP */ #define sata_pmp_port_ops sata_port_ops #define sata_pmp_qc_defer_cmd_switch ata_std_qc_defer #define sata_pmp_error_handler ata_std_error_handler #endif /* CONFIG_SATA_PMP */ /************************************************************************** * SFF - drivers/ata/libata-sff.c */ #ifdef CONFIG_ATA_SFF extern const struct ata_port_operations ata_sff_port_ops; extern const struct ata_port_operations ata_bmdma32_port_ops; /* PIO only, sg_tablesize and dma_boundary limits can be removed */ #define ATA_PIO_SHT(drv_name) \ ATA_BASE_SHT(drv_name), \ .sg_tablesize = LIBATA_MAX_PRD, \ .dma_boundary = ATA_DMA_BOUNDARY extern void ata_sff_dev_select(struct ata_port *ap, unsigned int device); extern u8 ata_sff_check_status(struct ata_port *ap); extern void ata_sff_pause(struct ata_port *ap); extern void ata_sff_dma_pause(struct ata_port *ap); extern int ata_sff_busy_sleep(struct ata_port *ap, unsigned long timeout_pat, unsigned long timeout); extern int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline); extern void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); extern void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf); extern void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); extern unsigned int ata_sff_data_xfer(struct ata_queued_cmd *qc, unsigned char *buf, unsigned int buflen, int rw); extern unsigned int ata_sff_data_xfer32(struct ata_queued_cmd *qc, unsigned char *buf, unsigned int buflen, int rw); extern void ata_sff_irq_on(struct ata_port *ap); extern void ata_sff_irq_clear(struct ata_port *ap); extern int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, u8 status, int in_wq); extern void ata_sff_queue_work(struct work_struct *work); extern void ata_sff_queue_delayed_work(struct delayed_work *dwork, unsigned long delay); extern void ata_sff_queue_pio_task(struct ata_link *link, unsigned long delay); extern unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc); extern bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc); extern unsigned int ata_sff_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc); extern irqreturn_t ata_sff_interrupt(int irq, void *dev_instance); extern void ata_sff_lost_interrupt(struct ata_port *ap); extern void ata_sff_freeze(struct ata_port *ap); extern void ata_sff_thaw(struct ata_port *ap); extern int ata_sff_prereset(struct ata_link *link, unsigned long deadline); extern unsigned int ata_sff_dev_classify(struct ata_device *dev, int present, u8 *r_err); extern int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask, unsigned long deadline); extern int ata_sff_softreset(struct ata_link *link, unsigned int *classes, unsigned long deadline); extern int sata_sff_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline); extern void ata_sff_postreset(struct ata_link *link, unsigned int *classes); extern void ata_sff_drain_fifo(struct ata_queued_cmd *qc); extern void ata_sff_error_handler(struct ata_port *ap); extern void ata_sff_std_ports(struct ata_ioports *ioaddr); #ifdef CONFIG_PCI extern int ata_pci_sff_init_host(struct ata_host *host); extern int ata_pci_sff_prepare_host(struct pci_dev *pdev, const struct ata_port_info * const * ppi, struct ata_host **r_host); extern int ata_pci_sff_activate_host(struct ata_host *host, irq_handler_t irq_handler, struct scsi_host_template *sht); extern int ata_pci_sff_init_one(struct pci_dev *pdev, const struct ata_port_info * const * ppi, struct scsi_host_template *sht, void *host_priv, int hflags); #endif /* CONFIG_PCI */ #ifdef CONFIG_ATA_BMDMA extern const struct ata_port_operations ata_bmdma_port_ops; #define ATA_BMDMA_SHT(drv_name) \ ATA_BASE_SHT(drv_name), \ .sg_tablesize = LIBATA_MAX_PRD, \ .dma_boundary = ATA_DMA_BOUNDARY extern enum ata_completion_errors ata_bmdma_qc_prep(struct ata_queued_cmd *qc); extern unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc); extern enum ata_completion_errors ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc); extern unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc); extern irqreturn_t ata_bmdma_interrupt(int irq, void *dev_instance); extern void ata_bmdma_error_handler(struct ata_port *ap); extern void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc); extern void ata_bmdma_irq_clear(struct ata_port *ap); extern void ata_bmdma_setup(struct ata_queued_cmd *qc); extern void ata_bmdma_start(struct ata_queued_cmd *qc); extern void ata_bmdma_stop(struct ata_queued_cmd *qc); extern u8 ata_bmdma_status(struct ata_port *ap); extern int ata_bmdma_port_start(struct ata_port *ap); extern int ata_bmdma_port_start32(struct ata_port *ap); #ifdef CONFIG_PCI extern int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev); extern void ata_pci_bmdma_init(struct ata_host *host); extern int ata_pci_bmdma_prepare_host(struct pci_dev *pdev, const struct ata_port_info * const * ppi, struct ata_host **r_host); extern int ata_pci_bmdma_init_one(struct pci_dev *pdev, const struct ata_port_info * const * ppi, struct scsi_host_template *sht, void *host_priv, int hflags); #endif /* CONFIG_PCI */ #endif /* CONFIG_ATA_BMDMA */ /** * ata_sff_busy_wait - Wait for a port status register * @ap: Port to wait for. * @bits: bits that must be clear * @max: number of 10uS waits to perform * * Waits up to max*10 microseconds for the selected bits in the port's * status register to be cleared. * Returns final value of status register. * * LOCKING: * Inherited from caller. */ static inline u8 ata_sff_busy_wait(struct ata_port *ap, unsigned int bits, unsigned int max) { u8 status; do { udelay(10); status = ap->ops->sff_check_status(ap); max--; } while (status != 0xff && (status & bits) && (max > 0)); return status; } /** * ata_wait_idle - Wait for a port to be idle. * @ap: Port to wait for. * * Waits up to 10ms for port's BUSY and DRQ signals to clear. * Returns final value of status register. * * LOCKING: * Inherited from caller. */ static inline u8 ata_wait_idle(struct ata_port *ap) { u8 status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) ata_port_dbg(ap, "abnormal Status 0x%X\n", status); return status; } #endif /* CONFIG_ATA_SFF */ #endif /* __LINUX_LIBATA_H__ */ PK ! �Xa9 9 vt_kern.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _VT_KERN_H #define _VT_KERN_H /* * this really is an extension of the vc_cons structure in console.c, but * with information needed by the vt package */ #include <linux/vt.h> #include <linux/kd.h> #include <linux/tty.h> #include <linux/mutex.h> #include <linux/console_struct.h> #include <linux/mm.h> #include <linux/consolemap.h> #include <linux/notifier.h> void kd_mksound(unsigned int hz, unsigned int ticks); int kbd_rate(struct kbd_repeat *rep); extern int fg_console, last_console, want_console; /* console.c */ int vc_allocate(unsigned int console); int vc_cons_allocated(unsigned int console); int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int lines); struct vc_data *vc_deallocate(unsigned int console); void reset_palette(struct vc_data *vc); void do_blank_screen(int entering_gfx); void do_unblank_screen(int leaving_gfx); void unblank_screen(void); void poke_blanked_console(void); int con_font_op(struct vc_data *vc, struct console_font_op *op); int con_set_cmap(unsigned char __user *cmap); int con_get_cmap(unsigned char __user *cmap); void scrollback(struct vc_data *vc); void scrollfront(struct vc_data *vc, int lines); void clear_buffer_attributes(struct vc_data *vc); void update_region(struct vc_data *vc, unsigned long start, int count); void redraw_screen(struct vc_data *vc, int is_switch); #define update_screen(x) redraw_screen(x, 0) #define switch_screen(x) redraw_screen(x, 1) struct tty_struct; int tioclinux(struct tty_struct *tty, unsigned long arg); #ifdef CONFIG_CONSOLE_TRANSLATIONS /* consolemap.c */ struct unipair; int con_set_trans_old(unsigned char __user * table); int con_get_trans_old(unsigned char __user * table); int con_set_trans_new(unsigned short __user * table); int con_get_trans_new(unsigned short __user * table); int con_clear_unimap(struct vc_data *vc); int con_set_unimap(struct vc_data *vc, ushort ct, struct unipair __user *list); int con_get_unimap(struct vc_data *vc, ushort ct, ushort __user *uct, struct unipair __user *list); int con_set_default_unimap(struct vc_data *vc); void con_free_unimap(struct vc_data *vc); int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc); #else static inline int con_set_trans_old(unsigned char __user *table) { return 0; } static inline int con_get_trans_old(unsigned char __user *table) { return -EINVAL; } static inline int con_set_trans_new(unsigned short __user *table) { return 0; } static inline int con_get_trans_new(unsigned short __user *table) { return -EINVAL; } static inline int con_clear_unimap(struct vc_data *vc) { return 0; } static inline int con_set_unimap(struct vc_data *vc, ushort ct, struct unipair __user *list) { return 0; } static inline int con_get_unimap(struct vc_data *vc, ushort ct, ushort __user *uct, struct unipair __user *list) { return -EINVAL; } static inline int con_set_default_unimap(struct vc_data *vc) { return 0; } static inline void con_free_unimap(struct vc_data *vc) { } static inline void con_protect_unimap(struct vc_data *vc, int rdonly) { } static inline int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc) { return 0; } #endif /* vt.c */ void vt_event_post(unsigned int event, unsigned int old, unsigned int new); int vt_waitactive(int n); void change_console(struct vc_data *new_vc); void reset_vc(struct vc_data *vc); int do_unbind_con_driver(const struct consw *csw, int first, int last, int deflt); int vty_init(const struct file_operations *console_fops); extern bool vt_dont_switch; extern int default_utf8; extern int global_cursor_default; struct vt_spawn_console { spinlock_t lock; struct pid *pid; int sig; }; extern struct vt_spawn_console vt_spawn_con; int vt_move_to_console(unsigned int vt, int alloc); /* Interfaces for VC notification of character events (for accessibility etc) */ struct vt_notifier_param { struct vc_data *vc; /* VC on which the update happened */ unsigned int c; /* Printed char */ }; int register_vt_notifier(struct notifier_block *nb); int unregister_vt_notifier(struct notifier_block *nb); void hide_boot_cursor(bool hide); /* keyboard provided interfaces */ int vt_do_diacrit(unsigned int cmd, void __user *up, int eperm); int vt_do_kdskbmode(unsigned int console, unsigned int arg); int vt_do_kdskbmeta(unsigned int console, unsigned int arg); int vt_do_kbkeycode_ioctl(int cmd, struct kbkeycode __user *user_kbkc, int perm); int vt_do_kdsk_ioctl(int cmd, struct kbentry __user *user_kbe, int perm, unsigned int console); int vt_do_kdgkb_ioctl(int cmd, struct kbsentry __user *user_kdgkb, int perm); int vt_do_kdskled(unsigned int console, int cmd, unsigned long arg, int perm); int vt_do_kdgkbmode(unsigned int console); int vt_do_kdgkbmeta(unsigned int console); void vt_reset_unicode(unsigned int console); int vt_get_shift_state(void); void vt_reset_keyboard(unsigned int console); int vt_get_leds(unsigned int console, int flag); int vt_get_kbd_mode_bit(unsigned int console, int bit); void vt_set_kbd_mode_bit(unsigned int console, int bit); void vt_clr_kbd_mode_bit(unsigned int console, int bit); void vt_set_led_state(unsigned int console, int leds); void vt_kbd_con_start(unsigned int console); void vt_kbd_con_stop(unsigned int console); void vc_scrolldelta_helper(struct vc_data *c, int lines, unsigned int rolled_over, void *_base, unsigned int size); #endif /* _VT_KERN_H */ PK ! ��wN N crc32.hnu �[��� /* * crc32.h * See linux/lib/crc32.c for license and changes */ #ifndef _LINUX_CRC32_H #define _LINUX_CRC32_H #include <linux/types.h> #include <linux/bitrev.h> u32 __pure crc32_le(u32 crc, unsigned char const *p, size_t len); u32 __pure crc32_be(u32 crc, unsigned char const *p, size_t len); /** * crc32_le_combine - Combine two crc32 check values into one. For two * sequences of bytes, seq1 and seq2 with lengths len1 * and len2, crc32_le() check values were calculated * for each, crc1 and crc2. * * @crc1: crc32 of the first block * @crc2: crc32 of the second block * @len2: length of the second block * * Return: The crc32_le() check value of seq1 and seq2 concatenated, * requiring only crc1, crc2, and len2. Note: If seq_full denotes * the concatenated memory area of seq1 with seq2, and crc_full * the crc32_le() value of seq_full, then crc_full == * crc32_le_combine(crc1, crc2, len2) when crc_full was seeded * with the same initializer as crc1, and crc2 seed was 0. See * also crc32_combine_test(). */ u32 __attribute_const__ crc32_le_shift(u32 crc, size_t len); static inline u32 crc32_le_combine(u32 crc1, u32 crc2, size_t len2) { return crc32_le_shift(crc1, len2) ^ crc2; } u32 __pure __crc32c_le(u32 crc, unsigned char const *p, size_t len); /** * __crc32c_le_combine - Combine two crc32c check values into one. For two * sequences of bytes, seq1 and seq2 with lengths len1 * and len2, __crc32c_le() check values were calculated * for each, crc1 and crc2. * * @crc1: crc32c of the first block * @crc2: crc32c of the second block * @len2: length of the second block * * Return: The __crc32c_le() check value of seq1 and seq2 concatenated, * requiring only crc1, crc2, and len2. Note: If seq_full denotes * the concatenated memory area of seq1 with seq2, and crc_full * the __crc32c_le() value of seq_full, then crc_full == * __crc32c_le_combine(crc1, crc2, len2) when crc_full was * seeded with the same initializer as crc1, and crc2 seed * was 0. See also crc32c_combine_test(). */ u32 __attribute_const__ __crc32c_le_shift(u32 crc, size_t len); static inline u32 __crc32c_le_combine(u32 crc1, u32 crc2, size_t len2) { return __crc32c_le_shift(crc1, len2) ^ crc2; } #define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)(data), length) /* * Helpers for hash table generation of ethernet nics: * * Ethernet sends the least significant bit of a byte first, thus crc32_le * is used. The output of crc32_le is bit reversed [most significant bit * is in bit nr 0], thus it must be reversed before use. Except for * nics that bit swap the result internally... */ #define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) #define ether_crc_le(length, data) crc32_le(~0, data, length) #endif /* _LINUX_CRC32_H */ PK ! Ȧ��� � soc/ixp4xx/cpu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * IXP4XX cpu type detection * * Copyright (C) 2007 MontaVista Software, Inc. */ #ifndef __SOC_IXP4XX_CPU_H__ #define __SOC_IXP4XX_CPU_H__ #include <linux/io.h> #ifdef CONFIG_ARM #include <asm/cputype.h> #endif /* Processor id value in CP15 Register 0 */ #define IXP42X_PROCESSOR_ID_VALUE 0x690541c0 /* including unused 0x690541Ex */ #define IXP42X_PROCESSOR_ID_MASK 0xffffffc0 #define IXP43X_PROCESSOR_ID_VALUE 0x69054040 #define IXP43X_PROCESSOR_ID_MASK 0xfffffff0 #define IXP46X_PROCESSOR_ID_VALUE 0x69054200 /* including IXP455 */ #define IXP46X_PROCESSOR_ID_MASK 0xfffffff0 /* "fuse" bits of IXP_EXP_CFG2 */ /* All IXP4xx CPUs */ #define IXP4XX_FEATURE_RCOMP (1 << 0) #define IXP4XX_FEATURE_USB_DEVICE (1 << 1) #define IXP4XX_FEATURE_HASH (1 << 2) #define IXP4XX_FEATURE_AES (1 << 3) #define IXP4XX_FEATURE_DES (1 << 4) #define IXP4XX_FEATURE_HDLC (1 << 5) #define IXP4XX_FEATURE_AAL (1 << 6) #define IXP4XX_FEATURE_HSS (1 << 7) #define IXP4XX_FEATURE_UTOPIA (1 << 8) #define IXP4XX_FEATURE_NPEB_ETH0 (1 << 9) #define IXP4XX_FEATURE_NPEC_ETH (1 << 10) #define IXP4XX_FEATURE_RESET_NPEA (1 << 11) #define IXP4XX_FEATURE_RESET_NPEB (1 << 12) #define IXP4XX_FEATURE_RESET_NPEC (1 << 13) #define IXP4XX_FEATURE_PCI (1 << 14) #define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16) #define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) #define IXP42X_FEATURE_MASK (IXP4XX_FEATURE_RCOMP | \ IXP4XX_FEATURE_USB_DEVICE | \ IXP4XX_FEATURE_HASH | \ IXP4XX_FEATURE_AES | \ IXP4XX_FEATURE_DES | \ IXP4XX_FEATURE_HDLC | \ IXP4XX_FEATURE_AAL | \ IXP4XX_FEATURE_HSS | \ IXP4XX_FEATURE_UTOPIA | \ IXP4XX_FEATURE_NPEB_ETH0 | \ IXP4XX_FEATURE_NPEC_ETH | \ IXP4XX_FEATURE_RESET_NPEA | \ IXP4XX_FEATURE_RESET_NPEB | \ IXP4XX_FEATURE_RESET_NPEC | \ IXP4XX_FEATURE_PCI | \ IXP4XX_FEATURE_UTOPIA_PHY_LIMIT | \ IXP4XX_FEATURE_XSCALE_MAX_FREQ) /* IXP43x/46x CPUs */ #define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15) #define IXP4XX_FEATURE_USB_HOST (1 << 18) #define IXP4XX_FEATURE_NPEA_ETH (1 << 19) #define IXP43X_FEATURE_MASK (IXP42X_FEATURE_MASK | \ IXP4XX_FEATURE_ECC_TIMESYNC | \ IXP4XX_FEATURE_USB_HOST | \ IXP4XX_FEATURE_NPEA_ETH) /* IXP46x CPU (including IXP455) only */ #define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 (1 << 20) #define IXP4XX_FEATURE_RSA (1 << 21) #define IXP46X_FEATURE_MASK (IXP43X_FEATURE_MASK | \ IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \ IXP4XX_FEATURE_RSA) #ifdef CONFIG_ARCH_IXP4XX #define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \ IXP42X_PROCESSOR_ID_VALUE) #define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \ IXP42X_PROCESSOR_ID_VALUE) #define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \ IXP43X_PROCESSOR_ID_VALUE) #define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \ IXP46X_PROCESSOR_ID_VALUE) u32 ixp4xx_read_feature_bits(void); void ixp4xx_write_feature_bits(u32 value); #else #define cpu_is_ixp42x_rev_a0() 0 #define cpu_is_ixp42x() 0 #define cpu_is_ixp43x() 0 #define cpu_is_ixp46x() 0 static inline u32 ixp4xx_read_feature_bits(void) { return 0; } static inline void ixp4xx_write_feature_bits(u32 value) { } #endif #endif /* _ASM_ARCH_CPU_H */ PK ! *�Z�� � soc/ixp4xx/npe.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IXP4XX_NPE_H #define __IXP4XX_NPE_H #include <linux/kernel.h> extern const char *npe_names[]; struct npe_regs { u32 exec_addr, exec_data, exec_status_cmd, exec_count; u32 action_points[4]; u32 watchpoint_fifo, watch_count; u32 profile_count; u32 messaging_status, messaging_control; u32 mailbox_status, /*messaging_*/ in_out_fifo; }; struct npe { struct npe_regs __iomem *regs; int id; int valid; }; static inline const char *npe_name(struct npe *npe) { return npe_names[npe->id]; } int npe_running(struct npe *npe); int npe_send_message(struct npe *npe, const void *msg, const char *what); int npe_recv_message(struct npe *npe, void *msg, const char *what); int npe_send_recv_message(struct npe *npe, void *msg, const char *what); int npe_load_firmware(struct npe *npe, const char *name, struct device *dev); struct npe *npe_request(unsigned id); void npe_release(struct npe *npe); #endif /* __IXP4XX_NPE_H */ PK ! `P soc/ixp4xx/qmgr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl> */ #ifndef IXP4XX_QMGR_H #define IXP4XX_QMGR_H #include <linux/io.h> #include <linux/kernel.h> #define DEBUG_QMGR 0 #define HALF_QUEUES 32 #define QUEUES 64 #define MAX_QUEUE_LENGTH 4 /* in dwords */ #define QUEUE_STAT1_EMPTY 1 /* queue status bits */ #define QUEUE_STAT1_NEARLY_EMPTY 2 #define QUEUE_STAT1_NEARLY_FULL 4 #define QUEUE_STAT1_FULL 8 #define QUEUE_STAT2_UNDERFLOW 1 #define QUEUE_STAT2_OVERFLOW 2 #define QUEUE_WATERMARK_0_ENTRIES 0 #define QUEUE_WATERMARK_1_ENTRY 1 #define QUEUE_WATERMARK_2_ENTRIES 2 #define QUEUE_WATERMARK_4_ENTRIES 3 #define QUEUE_WATERMARK_8_ENTRIES 4 #define QUEUE_WATERMARK_16_ENTRIES 5 #define QUEUE_WATERMARK_32_ENTRIES 6 #define QUEUE_WATERMARK_64_ENTRIES 7 /* queue interrupt request conditions */ #define QUEUE_IRQ_SRC_EMPTY 0 #define QUEUE_IRQ_SRC_NEARLY_EMPTY 1 #define QUEUE_IRQ_SRC_NEARLY_FULL 2 #define QUEUE_IRQ_SRC_FULL 3 #define QUEUE_IRQ_SRC_NOT_EMPTY 4 #define QUEUE_IRQ_SRC_NOT_NEARLY_EMPTY 5 #define QUEUE_IRQ_SRC_NOT_NEARLY_FULL 6 #define QUEUE_IRQ_SRC_NOT_FULL 7 struct qmgr_regs { u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 0x000 - 0x3FF */ u32 stat1[4]; /* 0x400 - 0x40F */ u32 stat2[2]; /* 0x410 - 0x417 */ u32 statne_h; /* 0x418 - queue nearly empty */ u32 statf_h; /* 0x41C - queue full */ u32 irqsrc[4]; /* 0x420 - 0x42F IRC source */ u32 irqen[2]; /* 0x430 - 0x437 IRQ enabled */ u32 irqstat[2]; /* 0x438 - 0x43F - IRQ access only */ u32 reserved[1776]; u32 sram[2048]; /* 0x2000 - 0x3FFF - config and buffer */ }; void qmgr_put_entry(unsigned int queue, u32 val); u32 qmgr_get_entry(unsigned int queue); int qmgr_stat_empty(unsigned int queue); int qmgr_stat_below_low_watermark(unsigned int queue); int qmgr_stat_full(unsigned int queue); int qmgr_stat_overflow(unsigned int queue); void qmgr_release_queue(unsigned int queue); void qmgr_set_irq(unsigned int queue, int src, void (*handler)(void *pdev), void *pdev); void qmgr_enable_irq(unsigned int queue); void qmgr_disable_irq(unsigned int queue); /* request_ and release_queue() must be called from non-IRQ context */ #if DEBUG_QMGR extern char qmgr_queue_descs[QUEUES][32]; int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, unsigned int nearly_empty_watermark, unsigned int nearly_full_watermark, const char *desc_format, const char* name); #else int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, unsigned int nearly_empty_watermark, unsigned int nearly_full_watermark); #define qmgr_request_queue(queue, len, nearly_empty_watermark, \ nearly_full_watermark, desc_format, name) \ __qmgr_request_queue(queue, len, nearly_empty_watermark, \ nearly_full_watermark) #endif #endif PK ! ���T� � soc/sunxi/sunxi_sram.hnu �[��� /* * Allwinner SoCs SRAM Controller Driver * * Copyright (C) 2015 Maxime Ripard * * Author: Maxime Ripard <maxime.ripard@free-electrons.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef _SUNXI_SRAM_H_ #define _SUNXI_SRAM_H_ int sunxi_sram_claim(struct device *dev); int sunxi_sram_release(struct device *dev); #endif /* _SUNXI_SRAM_H_ */ PK ! �z� � soc/mediatek/mtk_sip_svc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2019 MediaTek Inc. */ #ifndef __MTK_SIP_SVC_H #define __MTK_SIP_SVC_H /* Error Code */ #define SIP_SVC_E_SUCCESS 0 #define SIP_SVC_E_NOT_SUPPORTED -1 #define SIP_SVC_E_INVALID_PARAMS -2 #define SIP_SVC_E_INVALID_RANGE -3 #define SIP_SVC_E_PERMISSION_DENIED -4 #ifdef CONFIG_ARM64 #define MTK_SIP_SMC_CONVENTION ARM_SMCCC_SMC_64 #else #define MTK_SIP_SMC_CONVENTION ARM_SMCCC_SMC_32 #endif #define MTK_SIP_SMC_CMD(fn_id) \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \ ARM_SMCCC_OWNER_SIP, fn_id) #endif PK ! 1{Ҵ � soc/mediatek/infracfg.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SOC_MEDIATEK_INFRACFG_H #define __SOC_MEDIATEK_INFRACFG_H #define MT8192_TOP_AXI_PROT_EN_STA1 0x228 #define MT8192_TOP_AXI_PROT_EN_1_STA1 0x258 #define MT8192_TOP_AXI_PROT_EN_SET 0x2a0 #define MT8192_TOP_AXI_PROT_EN_CLR 0x2a4 #define MT8192_TOP_AXI_PROT_EN_1_SET 0x2a8 #define MT8192_TOP_AXI_PROT_EN_1_CLR 0x2ac #define MT8192_TOP_AXI_PROT_EN_MM_SET 0x2d4 #define MT8192_TOP_AXI_PROT_EN_MM_CLR 0x2d8 #define MT8192_TOP_AXI_PROT_EN_MM_STA1 0x2ec #define MT8192_TOP_AXI_PROT_EN_2_SET 0x714 #define MT8192_TOP_AXI_PROT_EN_2_CLR 0x718 #define MT8192_TOP_AXI_PROT_EN_2_STA1 0x724 #define MT8192_TOP_AXI_PROT_EN_VDNR_SET 0xb84 #define MT8192_TOP_AXI_PROT_EN_VDNR_CLR 0xb88 #define MT8192_TOP_AXI_PROT_EN_VDNR_STA1 0xb90 #define MT8192_TOP_AXI_PROT_EN_MM_2_SET 0xdcc #define MT8192_TOP_AXI_PROT_EN_MM_2_CLR 0xdd0 #define MT8192_TOP_AXI_PROT_EN_MM_2_STA1 0xdd8 #define MT8192_TOP_AXI_PROT_EN_DISP (BIT(6) | BIT(23)) #define MT8192_TOP_AXI_PROT_EN_CONN (BIT(13) | BIT(18)) #define MT8192_TOP_AXI_PROT_EN_CONN_2ND BIT(14) #define MT8192_TOP_AXI_PROT_EN_MFG1 GENMASK(22, 21) #define MT8192_TOP_AXI_PROT_EN_1_CONN BIT(10) #define MT8192_TOP_AXI_PROT_EN_1_MFG1 BIT(21) #define MT8192_TOP_AXI_PROT_EN_1_CAM BIT(22) #define MT8192_TOP_AXI_PROT_EN_2_CAM BIT(0) #define MT8192_TOP_AXI_PROT_EN_2_ADSP BIT(3) #define MT8192_TOP_AXI_PROT_EN_2_AUDIO BIT(4) #define MT8192_TOP_AXI_PROT_EN_2_MFG1 GENMASK(6, 5) #define MT8192_TOP_AXI_PROT_EN_2_MFG1_2ND BIT(7) #define MT8192_TOP_AXI_PROT_EN_MM_CAM (BIT(0) | BIT(2)) #define MT8192_TOP_AXI_PROT_EN_MM_DISP (BIT(0) | BIT(2) | \ BIT(10) | BIT(12) | \ BIT(14) | BIT(16) | \ BIT(24) | BIT(26)) #define MT8192_TOP_AXI_PROT_EN_MM_CAM_2ND (BIT(1) | BIT(3)) #define MT8192_TOP_AXI_PROT_EN_MM_DISP_2ND (BIT(1) | BIT(3) | \ BIT(15) | BIT(17) | \ BIT(25) | BIT(27)) #define MT8192_TOP_AXI_PROT_EN_MM_ISP2 BIT(14) #define MT8192_TOP_AXI_PROT_EN_MM_ISP2_2ND BIT(15) #define MT8192_TOP_AXI_PROT_EN_MM_IPE BIT(16) #define MT8192_TOP_AXI_PROT_EN_MM_IPE_2ND BIT(17) #define MT8192_TOP_AXI_PROT_EN_MM_VDEC BIT(24) #define MT8192_TOP_AXI_PROT_EN_MM_VDEC_2ND BIT(25) #define MT8192_TOP_AXI_PROT_EN_MM_VENC BIT(26) #define MT8192_TOP_AXI_PROT_EN_MM_VENC_2ND BIT(27) #define MT8192_TOP_AXI_PROT_EN_MM_2_ISP BIT(8) #define MT8192_TOP_AXI_PROT_EN_MM_2_DISP (BIT(8) | BIT(12)) #define MT8192_TOP_AXI_PROT_EN_MM_2_ISP_2ND BIT(9) #define MT8192_TOP_AXI_PROT_EN_MM_2_DISP_2ND (BIT(9) | BIT(13)) #define MT8192_TOP_AXI_PROT_EN_MM_2_MDP BIT(12) #define MT8192_TOP_AXI_PROT_EN_MM_2_MDP_2ND BIT(13) #define MT8192_TOP_AXI_PROT_EN_VDNR_CAM BIT(21) #define MT8183_TOP_AXI_PROT_EN_STA1 0x228 #define MT8183_TOP_AXI_PROT_EN_STA1_1 0x258 #define MT8183_TOP_AXI_PROT_EN_SET 0x2a0 #define MT8183_TOP_AXI_PROT_EN_CLR 0x2a4 #define MT8183_TOP_AXI_PROT_EN_1_SET 0x2a8 #define MT8183_TOP_AXI_PROT_EN_1_CLR 0x2ac #define MT8183_TOP_AXI_PROT_EN_MCU_SET 0x2c4 #define MT8183_TOP_AXI_PROT_EN_MCU_CLR 0x2c8 #define MT8183_TOP_AXI_PROT_EN_MCU_STA1 0x2e4 #define MT8183_TOP_AXI_PROT_EN_MM_SET 0x2d4 #define MT8183_TOP_AXI_PROT_EN_MM_CLR 0x2d8 #define MT8183_TOP_AXI_PROT_EN_MM_STA1 0x2ec #define MT8183_TOP_AXI_PROT_EN_DISP (BIT(10) | BIT(11)) #define MT8183_TOP_AXI_PROT_EN_CONN (BIT(13) | BIT(14)) #define MT8183_TOP_AXI_PROT_EN_MFG (BIT(21) | BIT(22)) #define MT8183_TOP_AXI_PROT_EN_CAM BIT(28) #define MT8183_TOP_AXI_PROT_EN_VPU_TOP BIT(27) #define MT8183_TOP_AXI_PROT_EN_1_DISP (BIT(16) | BIT(17)) #define MT8183_TOP_AXI_PROT_EN_1_MFG GENMASK(21, 19) #define MT8183_TOP_AXI_PROT_EN_MM_ISP (BIT(3) | BIT(8)) #define MT8183_TOP_AXI_PROT_EN_MM_ISP_2ND BIT(10) #define MT8183_TOP_AXI_PROT_EN_MM_CAM (BIT(4) | BIT(5) | \ BIT(9) | BIT(13)) #define MT8183_TOP_AXI_PROT_EN_MM_VPU_TOP (GENMASK(9, 6) | \ BIT(12)) #define MT8183_TOP_AXI_PROT_EN_MM_VPU_TOP_2ND (BIT(10) | BIT(11)) #define MT8183_TOP_AXI_PROT_EN_MM_CAM_2ND BIT(11) #define MT8183_TOP_AXI_PROT_EN_MCU_VPU_CORE0_2ND (BIT(0) | BIT(2) | \ BIT(4)) #define MT8183_TOP_AXI_PROT_EN_MCU_VPU_CORE1_2ND (BIT(1) | BIT(3) | \ BIT(5)) #define MT8183_TOP_AXI_PROT_EN_MCU_VPU_CORE0 BIT(6) #define MT8183_TOP_AXI_PROT_EN_MCU_VPU_CORE1 BIT(7) #define MT8183_SMI_COMMON_CLAMP_EN 0x3c0 #define MT8183_SMI_COMMON_CLAMP_EN_SET 0x3c4 #define MT8183_SMI_COMMON_CLAMP_EN_CLR 0x3c8 #define MT8183_SMI_COMMON_SMI_CLAMP_DISP GENMASK(7, 0) #define MT8183_SMI_COMMON_SMI_CLAMP_VENC BIT(1) #define MT8183_SMI_COMMON_SMI_CLAMP_ISP BIT(2) #define MT8183_SMI_COMMON_SMI_CLAMP_CAM (BIT(3) | BIT(4)) #define MT8183_SMI_COMMON_SMI_CLAMP_VPU_TOP (BIT(5) | BIT(6)) #define MT8183_SMI_COMMON_SMI_CLAMP_VDEC BIT(7) #define MT8173_TOP_AXI_PROT_EN_MCI_M2 BIT(0) #define MT8173_TOP_AXI_PROT_EN_MM_M0 BIT(1) #define MT8173_TOP_AXI_PROT_EN_MM_M1 BIT(2) #define MT8173_TOP_AXI_PROT_EN_MMAPB_S BIT(6) #define MT8173_TOP_AXI_PROT_EN_L2C_M2 BIT(9) #define MT8173_TOP_AXI_PROT_EN_L2SS_SMI BIT(11) #define MT8173_TOP_AXI_PROT_EN_L2SS_ADD BIT(12) #define MT8173_TOP_AXI_PROT_EN_CCI_M2 BIT(13) #define MT8173_TOP_AXI_PROT_EN_MFG_S BIT(14) #define MT8173_TOP_AXI_PROT_EN_PERI_M0 BIT(15) #define MT8173_TOP_AXI_PROT_EN_PERI_M1 BIT(16) #define MT8173_TOP_AXI_PROT_EN_DEBUGSYS BIT(17) #define MT8173_TOP_AXI_PROT_EN_CQ_DMA BIT(18) #define MT8173_TOP_AXI_PROT_EN_GCPU BIT(19) #define MT8173_TOP_AXI_PROT_EN_IOMMU BIT(20) #define MT8173_TOP_AXI_PROT_EN_MFG_M0 BIT(21) #define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22) #define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23) #define MT8167_TOP_AXI_PROT_EN_MM_EMI BIT(1) #define MT8167_TOP_AXI_PROT_EN_MCU_MFG BIT(2) #define MT8167_TOP_AXI_PROT_EN_CONN_EMI BIT(4) #define MT8167_TOP_AXI_PROT_EN_MFG_EMI BIT(5) #define MT8167_TOP_AXI_PROT_EN_CONN_MCU BIT(8) #define MT8167_TOP_AXI_PROT_EN_MCU_CONN BIT(9) #define MT8167_TOP_AXI_PROT_EN_MCU_MM BIT(11) #define MT2701_TOP_AXI_PROT_EN_MM_M0 BIT(1) #define MT2701_TOP_AXI_PROT_EN_CONN_M BIT(2) #define MT2701_TOP_AXI_PROT_EN_CONN_S BIT(8) #define MT7622_TOP_AXI_PROT_EN_ETHSYS (BIT(3) | BIT(17)) #define MT7622_TOP_AXI_PROT_EN_HIF0 (BIT(24) | BIT(25)) #define MT7622_TOP_AXI_PROT_EN_HIF1 (BIT(26) | BIT(27) | \ BIT(28)) #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ BIT(7) | BIT(8)) #define INFRA_TOPAXI_PROTECTEN 0x0220 #define INFRA_TOPAXI_PROTECTSTA1 0x0228 #define INFRA_TOPAXI_PROTECTEN_SET 0x0260 #define INFRA_TOPAXI_PROTECTEN_CLR 0x0264 #define REG_INFRA_MISC 0xf00 #define F_DDR_4GB_SUPPORT_EN BIT(13) int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, bool reg_update); int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, bool reg_update); #endif /* __SOC_MEDIATEK_INFRACFG_H */ PK ! �� ��$ �$ soc/mediatek/mtk-cmdq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018 MediaTek Inc. * */ #ifndef __MTK_CMDQ_H__ #define __MTK_CMDQ_H__ #include <linux/mailbox_client.h> #include <linux/mailbox/mtk-cmdq-mailbox.h> #include <linux/timer.h> #define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) #define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) struct cmdq_pkt; struct cmdq_client_reg { u8 subsys; u16 offset; u16 size; }; struct cmdq_client { struct mbox_client client; struct mbox_chan *chan; }; /** * cmdq_dev_get_client_reg() - parse cmdq client reg from the device * node of CMDQ client * @dev: device of CMDQ mailbox client * @client_reg: CMDQ client reg pointer * @idx: the index of desired reg * * Return: 0 for success; else the error code is returned * * Help CMDQ client parsing the cmdq client reg * from the device node of CMDQ client. */ int cmdq_dev_get_client_reg(struct device *dev, struct cmdq_client_reg *client_reg, int idx); /** * cmdq_mbox_create() - create CMDQ mailbox client and channel * @dev: device of CMDQ mailbox client * @index: index of CMDQ mailbox channel * * Return: CMDQ mailbox client pointer */ struct cmdq_client *cmdq_mbox_create(struct device *dev, int index); /** * cmdq_mbox_destroy() - destroy CMDQ mailbox client and channel * @client: the CMDQ mailbox client */ void cmdq_mbox_destroy(struct cmdq_client *client); /** * cmdq_pkt_create() - create a CMDQ packet * @client: the CMDQ mailbox client * @size: required CMDQ buffer size * * Return: CMDQ packet pointer */ struct cmdq_pkt *cmdq_pkt_create(struct cmdq_client *client, size_t size); /** * cmdq_pkt_destroy() - destroy the CMDQ packet * @pkt: the CMDQ packet */ void cmdq_pkt_destroy(struct cmdq_pkt *pkt); /** * cmdq_pkt_write() - append write command to the CMDQ packet * @pkt: the CMDQ packet * @subsys: the CMDQ sub system code * @offset: register offset from CMDQ sub system * @value: the specified target register value * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); /** * cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet * @pkt: the CMDQ packet * @subsys: the CMDQ sub system code * @offset: register offset from CMDQ sub system * @value: the specified target register value * @mask: the specified target register mask * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value, u32 mask); /* * cmdq_pkt_read_s() - append read_s command to the CMDQ packet * @pkt: the CMDQ packet * @high_addr_reg_idx: internal register ID which contains high address of pa * @addr_low: low address of pa * @reg_idx: the CMDQ internal register ID to cache read data * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, u16 reg_idx); /** * cmdq_pkt_write_s() - append write_s command to the CMDQ packet * @pkt: the CMDQ packet * @high_addr_reg_idx: internal register ID which contains high address of pa * @addr_low: low address of pa * @src_reg_idx: the CMDQ internal register ID which cache source value * * Return: 0 for success; else the error code is returned * * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() * to get high address and call cmdq_pkt_assign() to assign value into internal * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when * call to this function. */ int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, u16 src_reg_idx); /** * cmdq_pkt_write_s_mask() - append write_s with mask command to the CMDQ packet * @pkt: the CMDQ packet * @high_addr_reg_idx: internal register ID which contains high address of pa * @addr_low: low address of pa * @src_reg_idx: the CMDQ internal register ID which cache source value * @mask: the specified target address mask, use U32_MAX if no need * * Return: 0 for success; else the error code is returned * * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() * to get high address and call cmdq_pkt_assign() to assign value into internal * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when * call to this function. */ int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, u16 src_reg_idx, u32 mask); /** * cmdq_pkt_write_s_value() - append write_s command to the CMDQ packet which * write value to a physical address * @pkt: the CMDQ packet * @high_addr_reg_idx: internal register ID which contains high address of pa * @addr_low: low address of pa * @value: the specified target value * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u16 addr_low, u32 value); /** * cmdq_pkt_write_s_mask_value() - append write_s command with mask to the CMDQ * packet which write value to a physical * address * @pkt: the CMDQ packet * @high_addr_reg_idx: internal register ID which contains high address of pa * @addr_low: low address of pa * @value: the specified target value * @mask: the specified target mask * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u16 addr_low, u32 value, u32 mask); /** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet * @pkt: the CMDQ packet * @event: the desired event type to wait * @clear: clear event or not after event arrive * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear); /** * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet * @pkt: the CMDQ packet * @event: the desired event to be cleared * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event); /** * cmdq_pkt_set_event() - append set event command to the CMDQ packet * @pkt: the CMDQ packet * @event: the desired event to be set * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event); /** * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to * execute an instruction that wait for a specified * hardware register to check for the value w/o mask. * All GCE hardware threads will be blocked by this * instruction. * @pkt: the CMDQ packet * @subsys: the CMDQ sub system code * @offset: register offset from CMDQ sub system * @value: the specified target register value * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); /** * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to * execute an instruction that wait for a specified * hardware register to check for the value w/ mask. * All GCE hardware threads will be blocked by this * instruction. * @pkt: the CMDQ packet * @subsys: the CMDQ sub system code * @offset: register offset from CMDQ sub system * @value: the specified target register value * @mask: the specified target register mask * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value, u32 mask); /** * cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE * to execute an instruction that set a constant value into * internal register and use as value, mask or address in * read/write instruction. * @pkt: the CMDQ packet * @reg_idx: the CMDQ internal register ID * @value: the specified value * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value); /** * cmdq_pkt_jump() - Append jump command to the CMDQ packet, ask GCE * to execute an instruction that change current thread PC to * a physical address which should contains more instruction. * @pkt: the CMDQ packet * @addr: physical address of target instruction buffer * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr); /** * cmdq_pkt_finalize() - Append EOC and jump command to pkt. * @pkt: the CMDQ packet * * Return: 0 for success; else the error code is returned */ int cmdq_pkt_finalize(struct cmdq_pkt *pkt); /** * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ * packet and call back at the end of done packet * @pkt: the CMDQ packet * @cb: called at the end of done packet * @data: this data will pass back to cb * * Return: 0 for success; else the error code is returned * * Trigger CMDQ to asynchronously execute the CMDQ packet and call back * at the end of done packet. Note that this is an ASYNC function. When the * function returned, it may or may not be finished. */ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, void *data); #endif /* __MTK_CMDQ_H__ */ PK ! ��cQV V soc/mediatek/mtk-mmsys.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015 MediaTek Inc. */ #ifndef __MTK_MMSYS_H #define __MTK_MMSYS_H enum mtk_ddp_comp_id; struct device; enum mtk_ddp_comp_id { DDP_COMPONENT_AAL0, DDP_COMPONENT_AAL1, DDP_COMPONENT_BLS, DDP_COMPONENT_CCORR, DDP_COMPONENT_COLOR0, DDP_COMPONENT_COLOR1, DDP_COMPONENT_DITHER, DDP_COMPONENT_DPI0, DDP_COMPONENT_DPI1, DDP_COMPONENT_DSI0, DDP_COMPONENT_DSI1, DDP_COMPONENT_DSI2, DDP_COMPONENT_DSI3, DDP_COMPONENT_GAMMA, DDP_COMPONENT_OD0, DDP_COMPONENT_OD1, DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_OVL1, DDP_COMPONENT_PWM0, DDP_COMPONENT_PWM1, DDP_COMPONENT_PWM2, DDP_COMPONENT_RDMA0, DDP_COMPONENT_RDMA1, DDP_COMPONENT_RDMA2, DDP_COMPONENT_UFOE, DDP_COMPONENT_WDMA0, DDP_COMPONENT_WDMA1, DDP_COMPONENT_ID_MAX, }; void mtk_mmsys_ddp_connect(struct device *dev, enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next); void mtk_mmsys_ddp_disconnect(struct device *dev, enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next); #endif /* __MTK_MMSYS_H */ PK ! ~лJ� � soc/mediatek/mtk-mutex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015 MediaTek Inc. */ #ifndef MTK_MUTEX_H #define MTK_MUTEX_H struct regmap; struct device; struct mtk_mutex; struct mtk_mutex *mtk_mutex_get(struct device *dev); int mtk_mutex_prepare(struct mtk_mutex *mutex); void mtk_mutex_add_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); void mtk_mutex_enable(struct mtk_mutex *mutex); void mtk_mutex_disable(struct mtk_mutex *mutex); void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); void mtk_mutex_unprepare(struct mtk_mutex *mutex); void mtk_mutex_put(struct mtk_mutex *mutex); void mtk_mutex_acquire(struct mtk_mutex *mutex); void mtk_mutex_release(struct mtk_mutex *mutex); #endif /* MTK_MUTEX_H */ PK ! d�� � soc/samsung/s3c-adc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * S3C ADC driver information */ #ifndef __LINUX_SOC_SAMSUNG_S3C_ADC_H #define __LINUX_SOC_SAMSUNG_S3C_ADC_H __FILE__ struct s3c_adc_client; struct platform_device; extern int s3c_adc_start(struct s3c_adc_client *client, unsigned int channel, unsigned int nr_samples); extern int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch); extern struct s3c_adc_client * s3c_adc_register(struct platform_device *pdev, void (*select)(struct s3c_adc_client *client, unsigned selected), void (*conv)(struct s3c_adc_client *client, unsigned d0, unsigned d1, unsigned *samples_left), unsigned int is_ts); extern void s3c_adc_release(struct s3c_adc_client *client); #endif /* __LINUX_SOC_SAMSUNG_S3C_ADC_H */ PK ! ̵�:� � soc/samsung/s3c-pm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2013 Samsung Electronics Co., Ltd. * Tomasz Figa <t.figa@samsung.com> * Copyright (c) 2004 Simtec Electronics * http://armlinux.simtec.co.uk/ * Written by Ben Dooks, <ben@simtec.co.uk> */ #ifndef __LINUX_SOC_SAMSUNG_S3C_PM_H #define __LINUX_SOC_SAMSUNG_S3C_PM_H __FILE__ #include <linux/types.h> /* PM debug functions */ /** * struct pm_uart_save - save block for core UART * @ulcon: Save value for S3C2410_ULCON * @ucon: Save value for S3C2410_UCON * @ufcon: Save value for S3C2410_UFCON * @umcon: Save value for S3C2410_UMCON * @ubrdiv: Save value for S3C2410_UBRDIV * * Save block for UART registers to be held over sleep and restored if they * are needed (say by debug). */ struct pm_uart_save { u32 ulcon; u32 ucon; u32 ufcon; u32 umcon; u32 ubrdiv; u32 udivslot; }; #ifdef CONFIG_SAMSUNG_PM_DEBUG /** * s3c_pm_dbg() - low level debug function for use in suspend/resume. * @msg: The message to print. * * This function is used mainly to debug the resume process before the system * can rely on printk/console output. It uses the low-level debugging output * routine printascii() to do its work. */ extern void s3c_pm_dbg(const char *msg, ...); #define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) extern void s3c_pm_save_uarts(bool is_s3c24xx); extern void s3c_pm_restore_uarts(bool is_s3c24xx); #ifdef CONFIG_ARCH_S3C64XX extern void s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save); #else static inline void s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save) { } #endif #else #define S3C_PMDBG(fmt...) pr_debug(fmt) static inline void s3c_pm_save_uarts(bool is_s3c24xx) { } static inline void s3c_pm_restore_uarts(bool is_s3c24xx) { } #endif /* suspend memory checking */ #ifdef CONFIG_SAMSUNG_PM_CHECK extern void s3c_pm_check_prepare(void); extern void s3c_pm_check_restore(void); extern void s3c_pm_check_cleanup(void); extern void s3c_pm_check_store(void); #else #define s3c_pm_check_prepare() do { } while (0) #define s3c_pm_check_restore() do { } while (0) #define s3c_pm_check_cleanup() do { } while (0) #define s3c_pm_check_store() do { } while (0) #endif /* system device subsystems */ extern struct bus_type s3c2410_subsys; extern struct bus_type s3c2410a_subsys; extern struct bus_type s3c2412_subsys; extern struct bus_type s3c2416_subsys; extern struct bus_type s3c2440_subsys; extern struct bus_type s3c2442_subsys; extern struct bus_type s3c2443_subsys; #endif PK ! ��V9h$ h$ soc/samsung/s3c-cpufreq-core.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2006-2009 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * S3C CPU frequency scaling support - core support */ #ifndef __LINUX_SOC_SAMSUNG_S3C_CPUFREQ_CORE_H #define __LINUX_SOC_SAMSUNG_S3C_CPUFREQ_CORE_H #include <linux/soc/samsung/s3c-cpu-freq.h> struct seq_file; #define MAX_BANKS (8) #define S3C2412_MAX_IO (8) /** * struct s3c2410_iobank_timing - IO bank timings for S3C2410 style timings * @bankcon: The cached version of settings in this structure. * @tacp: * @tacs: Time from address valid to nCS asserted. * @tcos: Time from nCS asserted to nOE or nWE asserted. * @tacc: Time that nOE or nWE is asserted. * @tcoh: Time nCS is held after nOE or nWE are released. * @tcah: Time address is held for after * @nwait_en: Whether nWAIT is enabled for this bank. * * This structure represents the IO timings for a S3C2410 style IO bank * used by the CPU frequency support if it needs to change the settings * of the IO. */ struct s3c2410_iobank_timing { unsigned long bankcon; unsigned int tacp; unsigned int tacs; unsigned int tcos; unsigned int tacc; unsigned int tcoh; /* nCS hold after nOE/nWE */ unsigned int tcah; /* Address hold after nCS */ unsigned char nwait_en; /* nWait enabled for bank. */ }; /** * struct s3c2412_iobank_timing - io timings for PL092 (S3C2412) style IO * @idcy: The idle cycle time between transactions. * @wstrd: nCS release to end of read cycle. * @wstwr: nCS release to end of write cycle. * @wstoen: nCS assertion to nOE assertion time. * @wstwen: nCS assertion to nWE assertion time. * @wstbrd: Burst ready delay. * @smbidcyr: Register cache for smbidcyr value. * @smbwstrd: Register cache for smbwstrd value. * @smbwstwr: Register cache for smbwstwr value. * @smbwstoen: Register cache for smbwstoen value. * @smbwstwen: Register cache for smbwstwen value. * @smbwstbrd: Register cache for smbwstbrd value. * * Timing information for a IO bank on an S3C2412 or similar system which * uses a PL093 block. */ struct s3c2412_iobank_timing { unsigned int idcy; unsigned int wstrd; unsigned int wstwr; unsigned int wstoen; unsigned int wstwen; unsigned int wstbrd; /* register cache */ unsigned char smbidcyr; unsigned char smbwstrd; unsigned char smbwstwr; unsigned char smbwstoen; unsigned char smbwstwen; unsigned char smbwstbrd; }; union s3c_iobank { struct s3c2410_iobank_timing *io_2410; struct s3c2412_iobank_timing *io_2412; }; /** * struct s3c_iotimings - Chip IO timings holder * @bank: The timings for each IO bank. */ struct s3c_iotimings { union s3c_iobank bank[MAX_BANKS]; }; /** * struct s3c_plltab - PLL table information. * @vals: List of PLL values. * @size: Size of the PLL table @vals. */ struct s3c_plltab { struct s3c_pllval *vals; int size; }; /** * struct s3c_cpufreq_config - current cpu frequency configuration * @freq: The current settings for the core clocks. * @max: Maxium settings, derived from core, board and user settings. * @pll: The PLL table entry for the current PLL settings. * @divs: The divisor settings for the core clocks. * @info: The current core driver information. * @board: The information for the board we are running on. * @lock_pll: Set if the PLL settings cannot be changed. * * This is for the core drivers that need to know information about * the current settings and values. It should not be needed by any * device drivers. */ struct s3c_cpufreq_config { struct s3c_freq freq; struct s3c_freq max; struct clk *mpll; struct cpufreq_frequency_table pll; struct s3c_clkdivs divs; struct s3c_cpufreq_info *info; /* for core, not drivers */ struct s3c_cpufreq_board *board; unsigned int lock_pll:1; }; /** * struct s3c_cpufreq_info - Information for the CPU frequency driver. * @name: The name of this implementation. * @max: The maximum frequencies for the system. * @latency: Transition latency to give to cpufreq. * @locktime_m: The lock-time in uS for the MPLL. * @locktime_u: The lock-time in uS for the UPLL. * @locttime_bits: The number of bits each LOCKTIME field. * @need_pll: Set if this driver needs to change the PLL values to achieve * any frequency changes. This is really only need by devices like the * S3C2410 where there is no or limited divider between the PLL and the * ARMCLK. * @get_iotiming: Get the current IO timing data, mainly for use at start. * @set_iotiming: Update the IO timings from the cached copies calculated * from the @calc_iotiming entry when changing the frequency. * @calc_iotiming: Calculate and update the cached copies of the IO timings * from the newly calculated frequencies. * @calc_freqtable: Calculate (fill in) the given frequency table from the * current frequency configuration. If the table passed in is NULL, * then the return is the number of elements to be filled for allocation * of the table. * @set_refresh: Set the memory refresh configuration. * @set_fvco: Set the PLL frequencies. * @set_divs: Update the clock divisors. * @calc_divs: Calculate the clock divisors. */ struct s3c_cpufreq_info { const char *name; struct s3c_freq max; unsigned int latency; unsigned int locktime_m; unsigned int locktime_u; unsigned char locktime_bits; unsigned int need_pll:1; /* driver routines */ int (*get_iotiming)(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); void (*set_iotiming)(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); int (*calc_iotiming)(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); int (*calc_freqtable)(struct s3c_cpufreq_config *cfg, struct cpufreq_frequency_table *t, size_t table_size); void (*debug_io_show)(struct seq_file *seq, struct s3c_cpufreq_config *cfg, union s3c_iobank *iob); void (*set_refresh)(struct s3c_cpufreq_config *cfg); void (*set_fvco)(struct s3c_cpufreq_config *cfg); void (*set_divs)(struct s3c_cpufreq_config *cfg); int (*calc_divs)(struct s3c_cpufreq_config *cfg); }; extern int s3c_cpufreq_register(struct s3c_cpufreq_info *info); extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, unsigned int plls_no); /* exports and utilities for debugfs */ extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS #define s3c_cpufreq_debugfs_call(x) x #else #define s3c_cpufreq_debugfs_call(x) NULL #endif /* Useful utility functions. */ extern struct clk *s3c_cpufreq_clk_get(struct device *, const char *); /* S3C2410 and compatible exported functions */ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); #ifdef CONFIG_S3C2410_IOTIMING extern void s3c2410_iotiming_debugfs(struct seq_file *seq, struct s3c_cpufreq_config *cfg, union s3c_iobank *iob); extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); #else #define s3c2410_iotiming_debugfs NULL #define s3c2410_iotiming_calc NULL #define s3c2410_iotiming_get NULL #define s3c2410_iotiming_set NULL #endif /* CONFIG_S3C2410_IOTIMING */ /* S3C2412 compatible routines */ #ifdef CONFIG_S3C2412_IOTIMING extern void s3c2412_iotiming_debugfs(struct seq_file *seq, struct s3c_cpufreq_config *cfg, union s3c_iobank *iob); extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); extern void s3c2412_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); #else #define s3c2412_iotiming_debugfs NULL #define s3c2412_iotiming_calc NULL #define s3c2412_iotiming_get NULL #define s3c2412_iotiming_set NULL #endif /* CONFIG_S3C2412_IOTIMING */ #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG #define s3c_freq_dbg(x...) printk(KERN_INFO x) #else #define s3c_freq_dbg(x...) do { if (0) printk(x); } while (0) #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG */ #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG #define s3c_freq_iodbg(x...) printk(KERN_INFO x) #else #define s3c_freq_iodbg(x...) do { if (0) printk(x); } while (0) #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG */ static inline int s3c_cpufreq_addfreq(struct cpufreq_frequency_table *table, int index, size_t table_size, unsigned int freq) { if (index < 0) return index; if (table) { if (index >= table_size) return -ENOMEM; s3c_freq_dbg("%s: { %d = %u kHz }\n", __func__, index, freq); table[index].driver_data = index; table[index].frequency = freq; } return index + 1; } u32 s3c2440_read_camdivn(void); void s3c2440_write_camdivn(u32 camdiv); u32 s3c24xx_read_clkdivn(void); void s3c24xx_write_clkdivn(u32 clkdiv); u32 s3c24xx_read_mpllcon(void); void s3c24xx_write_locktime(u32 locktime); #endif PK ! �@�:a a soc/samsung/exynos-pmu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2014 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Header for Exynos PMU Driver support */ #ifndef __LINUX_SOC_EXYNOS_PMU_H #define __LINUX_SOC_EXYNOS_PMU_H struct regmap; enum sys_powerdown { SYS_AFTR, SYS_LPA, SYS_SLEEP, NUM_SYS_POWERDOWN, }; extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); #ifdef CONFIG_EXYNOS_PMU extern struct regmap *exynos_get_pmu_regmap(void); #else static inline struct regmap *exynos_get_pmu_regmap(void) { return ERR_PTR(-ENODEV); } #endif #endif /* __LINUX_SOC_EXYNOS_PMU_H */ PK ! �,�� soc/samsung/s3c-cpu-freq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2006-2007 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * S3C CPU frequency scaling support - driver and board */ #ifndef __LINUX_SOC_SAMSUNG_S3C_CPU_FREQ_H #define __LINUX_SOC_SAMSUNG_S3C_CPU_FREQ_H #include <linux/cpufreq.h> struct s3c_cpufreq_info; struct s3c_cpufreq_board; struct s3c_iotimings; /** * struct s3c_freq - frequency information (mainly for core drivers) * @fclk: The FCLK frequency in Hz. * @armclk: The ARMCLK frequency in Hz. * @hclk_tns: HCLK cycle time in 10ths of nano-seconds. * @hclk: The HCLK frequency in Hz. * @pclk: The PCLK frequency in Hz. * * This contains the frequency information about the current configuration * mainly for the core drivers to ensure we do not end up passing about * a large number of parameters. * * The @hclk_tns field is a useful cache for the parts of the drivers that * need to calculate IO timings and suchlike. */ struct s3c_freq { unsigned long fclk; unsigned long armclk; unsigned long hclk_tns; /* in 10ths of ns */ unsigned long hclk; unsigned long pclk; }; /** * struct s3c_cpufreq_freqs - s3c cpufreq notification information. * @freqs: The cpufreq setting information. * @old: The old clock settings. * @new: The new clock settings. * @pll_changing: Set if the PLL is changing. * * Wrapper 'struct cpufreq_freqs' so that any drivers receiving the * notification can use this information that is not provided by just * having the core frequency alone. * * The pll_changing flag is used to indicate if the PLL itself is * being set during this change. This is important as the clocks * will temporarily be set to the XTAL clock during this time, so * drivers may want to close down their output during this time. * * Note, this is not being used by any current drivers and therefore * may be removed in the future. */ struct s3c_cpufreq_freqs { struct cpufreq_freqs freqs; struct s3c_freq old; struct s3c_freq new; unsigned int pll_changing:1; }; #define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) /** * struct s3c_clkdivs - clock divisor information * @p_divisor: Divisor from FCLK to PCLK. * @h_divisor: Divisor from FCLK to HCLK. * @arm_divisor: Divisor from FCLK to ARMCLK (not all CPUs). * @dvs: Non-zero if using DVS mode for ARMCLK. * * Divisor settings for the core clocks. */ struct s3c_clkdivs { int p_divisor; int h_divisor; int arm_divisor; unsigned char dvs; }; #define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) /** * struct s3c_pllval - PLL value entry. * @freq: The frequency for this entry in Hz. * @pll_reg: The PLL register setting for this PLL value. */ struct s3c_pllval { unsigned long freq; unsigned long pll_reg; }; /** * struct s3c_cpufreq_board - per-board cpu frequency informatin * @refresh: The SDRAM refresh period in nanoseconds. * @auto_io: Set if the IO timing settings should be generated from the * initialisation time hardware registers. * @need_io: Set if the board has external IO on any of the chipselect * lines that will require the hardware timing registers to be * updated on a clock change. * @max: The maxium frequency limits for the system. Any field that * is left at zero will use the CPU's settings. * * This contains the board specific settings that affect how the CPU * drivers chose settings. These include the memory refresh and IO * timing information. * * Registration depends on the driver being used, the ARMCLK only * implementation does not currently need this but the older style * driver requires this to be available. */ struct s3c_cpufreq_board { unsigned int refresh; unsigned int auto_io:1; /* automatically init io timings. */ unsigned int need_io:1; /* set if needs io timing support. */ /* any non-zero field in here is taken as an upper limit. */ struct s3c_freq max; /* frequency limits */ }; /* Things depending on frequency scaling. */ #ifdef CONFIG_ARM_S3C_CPUFREQ #define __init_or_cpufreq #else #define __init_or_cpufreq __init #endif /* Board functions */ #ifdef CONFIG_ARM_S3C_CPUFREQ extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board); #else static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) { return 0; } #endif /* CONFIG_ARM_S3C_CPUFREQ */ #endif PK ! ����p p soc/samsung/exynos-regs-pmu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2010-2015 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Exynos - Power management unit definition * * Notice: * This is not a list of all Exynos Power Management Unit SFRs. * There are too many of them, not mentioning subtle differences * between SoCs. For now, put here only the used registers. */ #ifndef __LINUX_SOC_EXYNOS_REGS_PMU_H #define __LINUX_SOC_EXYNOS_REGS_PMU_H __FILE__ #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200 #define S5P_CENTRAL_LOWPWR_CFG (1 << 16) #define S5P_CENTRAL_SEQ_OPTION 0x0208 #define S5P_USE_STANDBY_WFI0 (1 << 16) #define S5P_USE_STANDBY_WFI1 (1 << 17) #define S5P_USE_STANDBY_WFI2 (1 << 19) #define S5P_USE_STANDBY_WFI3 (1 << 20) #define S5P_USE_STANDBY_WFE0 (1 << 24) #define S5P_USE_STANDBY_WFE1 (1 << 25) #define S5P_USE_STANDBY_WFE2 (1 << 27) #define S5P_USE_STANDBY_WFE3 (1 << 28) #define S5P_USE_STANDBY_WFI_ALL \ (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFI1 | \ S5P_USE_STANDBY_WFI2 | S5P_USE_STANDBY_WFI3 | \ S5P_USE_STANDBY_WFE0 | S5P_USE_STANDBY_WFE1 | \ S5P_USE_STANDBY_WFE2 | S5P_USE_STANDBY_WFE3) #define S5P_USE_DELAYED_RESET_ASSERTION BIT(12) #define EXYNOS_CORE_PO_RESET(n) ((1 << 4) << n) #define EXYNOS_WAKEUP_FROM_LOWPWR (1 << 28) #define EXYNOS_SWRESET 0x0400 #define S5P_WAKEUP_STAT 0x0600 /* Value for EXYNOS_EINT_WAKEUP_MASK disabling all external wakeup interrupts */ #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff #define EXYNOS_EINT_WAKEUP_MASK 0x0604 #define S5P_WAKEUP_MASK 0x0608 #define S5P_WAKEUP_MASK2 0x0614 /* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */ #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4) /* Phy enable bit, common for all phy registers, not only MIPI */ #define EXYNOS4_PHY_ENABLE (1 << 0) #define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) #define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) #define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) #define S5P_INFORM0 0x0800 #define S5P_INFORM1 0x0804 #define S5P_INFORM5 0x0814 #define S5P_INFORM6 0x0818 #define S5P_INFORM7 0x081C #define S5P_PMU_SPARE2 0x0908 #define S5P_PMU_SPARE3 0x090C #define EXYNOS_IROM_DATA2 0x0988 #define S5P_ARM_CORE0_LOWPWR 0x1000 #define S5P_DIS_IRQ_CORE0 0x1004 #define S5P_DIS_IRQ_CENTRAL0 0x1008 #define S5P_ARM_CORE1_LOWPWR 0x1010 #define S5P_DIS_IRQ_CORE1 0x1014 #define S5P_DIS_IRQ_CENTRAL1 0x1018 #define S5P_ARM_COMMON_LOWPWR 0x1080 #define S5P_L2_0_LOWPWR 0x10C0 #define S5P_L2_1_LOWPWR 0x10C4 #define S5P_CMU_ACLKSTOP_LOWPWR 0x1100 #define S5P_CMU_SCLKSTOP_LOWPWR 0x1104 #define S5P_CMU_RESET_LOWPWR 0x110C #define S5P_APLL_SYSCLK_LOWPWR 0x1120 #define S5P_MPLL_SYSCLK_LOWPWR 0x1124 #define S5P_VPLL_SYSCLK_LOWPWR 0x1128 #define S5P_EPLL_SYSCLK_LOWPWR 0x112C #define S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR 0x1138 #define S5P_CMU_RESET_GPSALIVE_LOWPWR 0x113C #define S5P_CMU_CLKSTOP_CAM_LOWPWR 0x1140 #define S5P_CMU_CLKSTOP_TV_LOWPWR 0x1144 #define S5P_CMU_CLKSTOP_MFC_LOWPWR 0x1148 #define S5P_CMU_CLKSTOP_G3D_LOWPWR 0x114C #define S5P_CMU_CLKSTOP_LCD0_LOWPWR 0x1150 #define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR 0x1158 #define S5P_CMU_CLKSTOP_GPS_LOWPWR 0x115C #define S5P_CMU_RESET_CAM_LOWPWR 0x1160 #define S5P_CMU_RESET_TV_LOWPWR 0x1164 #define S5P_CMU_RESET_MFC_LOWPWR 0x1168 #define S5P_CMU_RESET_G3D_LOWPWR 0x116C #define S5P_CMU_RESET_LCD0_LOWPWR 0x1170 #define S5P_CMU_RESET_MAUDIO_LOWPWR 0x1178 #define S5P_CMU_RESET_GPS_LOWPWR 0x117C #define S5P_TOP_BUS_LOWPWR 0x1180 #define S5P_TOP_RETENTION_LOWPWR 0x1184 #define S5P_TOP_PWR_LOWPWR 0x1188 #define S5P_LOGIC_RESET_LOWPWR 0x11A0 #define S5P_ONENAND_MEM_LOWPWR 0x11C0 #define S5P_G2D_ACP_MEM_LOWPWR 0x11C8 #define S5P_USBOTG_MEM_LOWPWR 0x11CC #define S5P_HSMMC_MEM_LOWPWR 0x11D0 #define S5P_CSSYS_MEM_LOWPWR 0x11D4 #define S5P_SECSS_MEM_LOWPWR 0x11D8 #define S5P_PAD_RETENTION_DRAM_LOWPWR 0x1200 #define S5P_PAD_RETENTION_MAUDIO_LOWPWR 0x1204 #define S5P_PAD_RETENTION_GPIO_LOWPWR 0x1220 #define S5P_PAD_RETENTION_UART_LOWPWR 0x1224 #define S5P_PAD_RETENTION_MMCA_LOWPWR 0x1228 #define S5P_PAD_RETENTION_MMCB_LOWPWR 0x122C #define S5P_PAD_RETENTION_EBIA_LOWPWR 0x1230 #define S5P_PAD_RETENTION_EBIB_LOWPWR 0x1234 #define S5P_PAD_RETENTION_ISOLATION_LOWPWR 0x1240 #define S5P_PAD_RETENTION_ALV_SEL_LOWPWR 0x1260 #define S5P_XUSBXTI_LOWPWR 0x1280 #define S5P_XXTI_LOWPWR 0x1284 #define S5P_EXT_REGULATOR_LOWPWR 0x12C0 #define S5P_GPIO_MODE_LOWPWR 0x1300 #define S5P_GPIO_MODE_MAUDIO_LOWPWR 0x1340 #define S5P_CAM_LOWPWR 0x1380 #define S5P_TV_LOWPWR 0x1384 #define S5P_MFC_LOWPWR 0x1388 #define S5P_G3D_LOWPWR 0x138C #define S5P_LCD0_LOWPWR 0x1390 #define S5P_MAUDIO_LOWPWR 0x1398 #define S5P_GPS_LOWPWR 0x139C #define S5P_GPS_ALIVE_LOWPWR 0x13A0 #define EXYNOS_ARM_CORE0_CONFIGURATION 0x2000 #define EXYNOS_ARM_CORE_CONFIGURATION(_nr) \ (EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr))) #define EXYNOS_ARM_CORE_STATUS(_nr) \ (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4) #define EXYNOS_ARM_CORE_OPTION(_nr) \ (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x8) #define EXYNOS_ARM_COMMON_CONFIGURATION 0x2500 #define EXYNOS_COMMON_CONFIGURATION(_nr) \ (EXYNOS_ARM_COMMON_CONFIGURATION + (0x80 * (_nr))) #define EXYNOS_COMMON_STATUS(_nr) \ (EXYNOS_COMMON_CONFIGURATION(_nr) + 0x4) #define EXYNOS_COMMON_OPTION(_nr) \ (EXYNOS_COMMON_CONFIGURATION(_nr) + 0x8) #define EXYNOS_ARM_L2_CONFIGURATION 0x2600 #define EXYNOS_L2_CONFIGURATION(_nr) \ (EXYNOS_ARM_L2_CONFIGURATION + ((_nr) * 0x80)) #define EXYNOS_L2_STATUS(_nr) \ (EXYNOS_L2_CONFIGURATION(_nr) + 0x4) #define EXYNOS_L2_OPTION(_nr) \ (EXYNOS_L2_CONFIGURATION(_nr) + 0x8) #define EXYNOS_L2_USE_RETENTION BIT(4) #define S5P_PAD_RET_MAUDIO_OPTION 0x3028 #define S5P_PAD_RET_MMC2_OPTION 0x30c8 #define S5P_PAD_RET_GPIO_OPTION 0x3108 #define S5P_PAD_RET_UART_OPTION 0x3128 #define S5P_PAD_RET_MMCA_OPTION 0x3148 #define S5P_PAD_RET_MMCB_OPTION 0x3168 #define S5P_PAD_RET_EBIA_OPTION 0x3188 #define S5P_PAD_RET_EBIB_OPTION 0x31A8 #define S5P_PAD_RET_SPI_OPTION 0x31c8 #define S5P_PS_HOLD_CONTROL 0x330C #define S5P_PS_HOLD_EN (1 << 31) #define S5P_PS_HOLD_OUTPUT_HIGH (3 << 8) #define S5P_CAM_OPTION 0x3C08 #define S5P_MFC_OPTION 0x3C48 #define S5P_G3D_OPTION 0x3C68 #define S5P_LCD0_OPTION 0x3C88 #define S5P_LCD1_OPTION 0x3CA8 #define S5P_ISP_OPTION S5P_LCD1_OPTION #define S5P_CORE_LOCAL_PWR_EN 0x3 #define S5P_CORE_WAKEUP_FROM_LOCAL_CFG (0x3 << 8) #define S5P_CORE_AUTOWAKEUP_EN (1 << 31) /* Only for S5Pv210 */ #define S5PV210_EINT_WAKEUP_MASK 0xC004 /* Only for Exynos4210 */ #define S5P_CMU_CLKSTOP_LCD1_LOWPWR 0x1154 #define S5P_CMU_RESET_LCD1_LOWPWR 0x1174 #define S5P_MODIMIF_MEM_LOWPWR 0x11C4 #define S5P_PCIE_MEM_LOWPWR 0x11E0 #define S5P_SATA_MEM_LOWPWR 0x11E4 #define S5P_LCD1_LOWPWR 0x1394 /* Only for Exynos4x12 */ #define S5P_ISP_ARM_LOWPWR 0x1050 #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR 0x1054 #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR 0x1058 #define S5P_CMU_ACLKSTOP_COREBLK_LOWPWR 0x1110 #define S5P_CMU_SCLKSTOP_COREBLK_LOWPWR 0x1114 #define S5P_CMU_RESET_COREBLK_LOWPWR 0x111C #define S5P_MPLLUSER_SYSCLK_LOWPWR 0x1130 #define S5P_CMU_CLKSTOP_ISP_LOWPWR 0x1154 #define S5P_CMU_RESET_ISP_LOWPWR 0x1174 #define S5P_TOP_BUS_COREBLK_LOWPWR 0x1190 #define S5P_TOP_RETENTION_COREBLK_LOWPWR 0x1194 #define S5P_TOP_PWR_COREBLK_LOWPWR 0x1198 #define S5P_OSCCLK_GATE_LOWPWR 0x11A4 #define S5P_LOGIC_RESET_COREBLK_LOWPWR 0x11B0 #define S5P_OSCCLK_GATE_COREBLK_LOWPWR 0x11B4 #define S5P_HSI_MEM_LOWPWR 0x11C4 #define S5P_ROTATOR_MEM_LOWPWR 0x11DC #define S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR 0x123C #define S5P_PAD_ISOLATION_COREBLK_LOWPWR 0x1250 #define S5P_GPIO_MODE_COREBLK_LOWPWR 0x1320 #define S5P_TOP_ASB_RESET_LOWPWR 0x1344 #define S5P_TOP_ASB_ISOLATION_LOWPWR 0x1348 #define S5P_ISP_LOWPWR 0x1394 #define S5P_DRAM_FREQ_DOWN_LOWPWR 0x13B0 #define S5P_DDRPHY_DLLOFF_LOWPWR 0x13B4 #define S5P_CMU_SYSCLK_ISP_LOWPWR 0x13B8 #define S5P_CMU_SYSCLK_GPS_LOWPWR 0x13BC #define S5P_LPDDR_PHY_DLL_LOCK_LOWPWR 0x13C0 #define S5P_ARM_L2_0_OPTION 0x2608 #define S5P_ARM_L2_1_OPTION 0x2628 #define S5P_ONENAND_MEM_OPTION 0x2E08 #define S5P_HSI_MEM_OPTION 0x2E28 #define S5P_G2D_ACP_MEM_OPTION 0x2E48 #define S5P_USBOTG_MEM_OPTION 0x2E68 #define S5P_HSMMC_MEM_OPTION 0x2E88 #define S5P_CSSYS_MEM_OPTION 0x2EA8 #define S5P_SECSS_MEM_OPTION 0x2EC8 #define S5P_ROTATOR_MEM_OPTION 0x2F48 /* Only for Exynos4412 */ #define S5P_ARM_CORE2_LOWPWR 0x1020 #define S5P_DIS_IRQ_CORE2 0x1024 #define S5P_DIS_IRQ_CENTRAL2 0x1028 #define S5P_ARM_CORE3_LOWPWR 0x1030 #define S5P_DIS_IRQ_CORE3 0x1034 #define S5P_DIS_IRQ_CENTRAL3 0x1038 /* Only for Exynos3XXX */ #define EXYNOS3_ARM_CORE0_SYS_PWR_REG 0x1000 #define EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004 #define EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008 #define EXYNOS3_ARM_CORE1_SYS_PWR_REG 0x1010 #define EXYNOS3_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG 0x1014 #define EXYNOS3_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG 0x1018 #define EXYNOS3_ISP_ARM_SYS_PWR_REG 0x1050 #define EXYNOS3_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1054 #define EXYNOS3_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1058 #define EXYNOS3_ARM_COMMON_SYS_PWR_REG 0x1080 #define EXYNOS3_ARM_L2_SYS_PWR_REG 0x10C0 #define EXYNOS3_CMU_ACLKSTOP_SYS_PWR_REG 0x1100 #define EXYNOS3_CMU_SCLKSTOP_SYS_PWR_REG 0x1104 #define EXYNOS3_CMU_RESET_SYS_PWR_REG 0x110C #define EXYNOS3_CMU_ACLKSTOP_COREBLK_SYS_PWR_REG 0x1110 #define EXYNOS3_CMU_SCLKSTOP_COREBLK_SYS_PWR_REG 0x1114 #define EXYNOS3_CMU_RESET_COREBLK_SYS_PWR_REG 0x111C #define EXYNOS3_APLL_SYSCLK_SYS_PWR_REG 0x1120 #define EXYNOS3_MPLL_SYSCLK_SYS_PWR_REG 0x1124 #define EXYNOS3_VPLL_SYSCLK_SYS_PWR_REG 0x1128 #define EXYNOS3_EPLL_SYSCLK_SYS_PWR_REG 0x112C #define EXYNOS3_MPLLUSER_SYSCLK_SYS_PWR_REG 0x1130 #define EXYNOS3_BPLLUSER_SYSCLK_SYS_PWR_REG 0x1134 #define EXYNOS3_EPLLUSER_SYSCLK_SYS_PWR_REG 0x1138 #define EXYNOS3_CMU_CLKSTOP_CAM_SYS_PWR_REG 0x1140 #define EXYNOS3_CMU_CLKSTOP_MFC_SYS_PWR_REG 0x1148 #define EXYNOS3_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x114C #define EXYNOS3_CMU_CLKSTOP_LCD0_SYS_PWR_REG 0x1150 #define EXYNOS3_CMU_CLKSTOP_ISP_SYS_PWR_REG 0x1154 #define EXYNOS3_CMU_CLKSTOP_MAUDIO_SYS_PWR_REG 0x1158 #define EXYNOS3_CMU_RESET_CAM_SYS_PWR_REG 0x1160 #define EXYNOS3_CMU_RESET_MFC_SYS_PWR_REG 0x1168 #define EXYNOS3_CMU_RESET_G3D_SYS_PWR_REG 0x116C #define EXYNOS3_CMU_RESET_LCD0_SYS_PWR_REG 0x1170 #define EXYNOS3_CMU_RESET_ISP_SYS_PWR_REG 0x1174 #define EXYNOS3_CMU_RESET_MAUDIO_SYS_PWR_REG 0x1178 #define EXYNOS3_TOP_BUS_SYS_PWR_REG 0x1180 #define EXYNOS3_TOP_RETENTION_SYS_PWR_REG 0x1184 #define EXYNOS3_TOP_PWR_SYS_PWR_REG 0x1188 #define EXYNOS3_TOP_BUS_COREBLK_SYS_PWR_REG 0x1190 #define EXYNOS3_TOP_RETENTION_COREBLK_SYS_PWR_REG 0x1194 #define EXYNOS3_TOP_PWR_COREBLK_SYS_PWR_REG 0x1198 #define EXYNOS3_LOGIC_RESET_SYS_PWR_REG 0x11A0 #define EXYNOS3_OSCCLK_GATE_SYS_PWR_REG 0x11A4 #define EXYNOS3_LOGIC_RESET_COREBLK_SYS_PWR_REG 0x11B0 #define EXYNOS3_OSCCLK_GATE_COREBLK_SYS_PWR_REG 0x11B4 #define EXYNOS3_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200 #define EXYNOS3_PAD_RETENTION_MAUDIO_SYS_PWR_REG 0x1204 #define EXYNOS3_PAD_RETENTION_SPI_SYS_PWR_REG 0x1208 #define EXYNOS3_PAD_RETENTION_MMC2_SYS_PWR_REG 0x1218 #define EXYNOS3_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220 #define EXYNOS3_PAD_RETENTION_UART_SYS_PWR_REG 0x1224 #define EXYNOS3_PAD_RETENTION_MMC0_SYS_PWR_REG 0x1228 #define EXYNOS3_PAD_RETENTION_MMC1_SYS_PWR_REG 0x122C #define EXYNOS3_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1230 #define EXYNOS3_PAD_RETENTION_EBIB_SYS_PWR_REG 0x1234 #define EXYNOS3_PAD_RETENTION_JTAG_SYS_PWR_REG 0x1238 #define EXYNOS3_PAD_ISOLATION_SYS_PWR_REG 0x1240 #define EXYNOS3_PAD_ALV_SEL_SYS_PWR_REG 0x1260 #define EXYNOS3_XUSBXTI_SYS_PWR_REG 0x1280 #define EXYNOS3_XXTI_SYS_PWR_REG 0x1284 #define EXYNOS3_EXT_REGULATOR_SYS_PWR_REG 0x12C0 #define EXYNOS3_EXT_REGULATOR_COREBLK_SYS_PWR_REG 0x12C4 #define EXYNOS3_GPIO_MODE_SYS_PWR_REG 0x1300 #define EXYNOS3_GPIO_MODE_MAUDIO_SYS_PWR_REG 0x1340 #define EXYNOS3_TOP_ASB_RESET_SYS_PWR_REG 0x1344 #define EXYNOS3_TOP_ASB_ISOLATION_SYS_PWR_REG 0x1348 #define EXYNOS3_TOP_ASB_RESET_COREBLK_SYS_PWR_REG 0x1350 #define EXYNOS3_TOP_ASB_ISOLATION_COREBLK_SYS_PWR_REG 0x1354 #define EXYNOS3_CAM_SYS_PWR_REG 0x1380 #define EXYNOS3_MFC_SYS_PWR_REG 0x1388 #define EXYNOS3_G3D_SYS_PWR_REG 0x138C #define EXYNOS3_LCD0_SYS_PWR_REG 0x1390 #define EXYNOS3_ISP_SYS_PWR_REG 0x1394 #define EXYNOS3_MAUDIO_SYS_PWR_REG 0x1398 #define EXYNOS3_DRAM_FREQ_DOWN_SYS_PWR_REG 0x13B0 #define EXYNOS3_DDRPHY_DLLOFF_SYS_PWR_REG 0x13B4 #define EXYNOS3_CMU_SYSCLK_ISP_SYS_PWR_REG 0x13B8 #define EXYNOS3_LPDDR_PHY_DLL_LOCK_SYS_PWR_REG 0x13C0 #define EXYNOS3_BPLL_SYSCLK_SYS_PWR_REG 0x13C4 #define EXYNOS3_UPLL_SYSCLK_SYS_PWR_REG 0x13C8 #define EXYNOS3_ARM_CORE0_OPTION 0x2008 #define EXYNOS3_ARM_CORE_OPTION(_nr) \ (EXYNOS3_ARM_CORE0_OPTION + ((_nr) * 0x80)) #define EXYNOS3_ARM_COMMON_OPTION 0x2408 #define EXYNOS3_ARM_L2_OPTION 0x2608 #define EXYNOS3_TOP_PWR_OPTION 0x2C48 #define EXYNOS3_CORE_TOP_PWR_OPTION 0x2CA8 #define EXYNOS3_XUSBXTI_DURATION 0x341C #define EXYNOS3_XXTI_DURATION 0x343C #define EXYNOS3_EXT_REGULATOR_DURATION 0x361C #define EXYNOS3_EXT_REGULATOR_COREBLK_DURATION 0x363C #define XUSBXTI_DURATION 0x00000BB8 #define XXTI_DURATION XUSBXTI_DURATION #define EXT_REGULATOR_DURATION 0x00001D4C #define EXT_REGULATOR_COREBLK_DURATION EXT_REGULATOR_DURATION /* for XXX_OPTION */ #define EXYNOS3_OPTION_USE_SC_COUNTER (1 << 0) #define EXYNOS3_OPTION_USE_SC_FEEDBACK (1 << 1) #define EXYNOS3_OPTION_SKIP_DEACTIVATE_ACEACP_IN_PWDN (1 << 7) /* For Exynos5 */ #define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408 #define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C #define EXYNOS5_USBDRD_PHY_CONTROL 0x0704 #define EXYNOS5_DPTX_PHY_CONTROL 0x0720 #define EXYNOS5_USE_RETENTION BIT(4) #define EXYNOS5_SYS_WDTRESET (1 << 20) #define EXYNOS5_ARM_CORE0_SYS_PWR_REG 0x1000 #define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004 #define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008 #define EXYNOS5_ARM_CORE1_SYS_PWR_REG 0x1010 #define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG 0x1014 #define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG 0x1018 #define EXYNOS5_FSYS_ARM_SYS_PWR_REG 0x1040 #define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG 0x1048 #define EXYNOS5_ISP_ARM_SYS_PWR_REG 0x1050 #define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1054 #define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1058 #define EXYNOS5_ARM_COMMON_SYS_PWR_REG 0x1080 #define EXYNOS5_ARM_L2_SYS_PWR_REG 0x10C0 #define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG 0x1100 #define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG 0x1104 #define EXYNOS5_CMU_RESET_SYS_PWR_REG 0x110C #define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG 0x1120 #define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG 0x1124 #define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG 0x112C #define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG 0x1130 #define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG 0x1134 #define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG 0x1138 #define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG 0x1140 #define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG 0x1144 #define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG 0x1148 #define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG 0x114C #define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG 0x1150 #define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG 0x1154 #define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG 0x1164 #define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG 0x1170 #define EXYNOS5_TOP_BUS_SYS_PWR_REG 0x1180 #define EXYNOS5_TOP_RETENTION_SYS_PWR_REG 0x1184 #define EXYNOS5_TOP_PWR_SYS_PWR_REG 0x1188 #define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG 0x1190 #define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG 0x1194 #define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG 0x1198 #define EXYNOS5_LOGIC_RESET_SYS_PWR_REG 0x11A0 #define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG 0x11A4 #define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG 0x11B0 #define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG 0x11B4 #define EXYNOS5_USBOTG_MEM_SYS_PWR_REG 0x11C0 #define EXYNOS5_G2D_MEM_SYS_PWR_REG 0x11C8 #define EXYNOS5_USBDRD_MEM_SYS_PWR_REG 0x11CC #define EXYNOS5_SDMMC_MEM_SYS_PWR_REG 0x11D0 #define EXYNOS5_CSSYS_MEM_SYS_PWR_REG 0x11D4 #define EXYNOS5_SECSS_MEM_SYS_PWR_REG 0x11D8 #define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG 0x11DC #define EXYNOS5_INTRAM_MEM_SYS_PWR_REG 0x11E0 #define EXYNOS5_INTROM_MEM_SYS_PWR_REG 0x11E4 #define EXYNOS5_JPEG_MEM_SYS_PWR_REG 0x11E8 #define EXYNOS5_HSI_MEM_SYS_PWR_REG 0x11EC #define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG 0x11F4 #define EXYNOS5_SATA_MEM_SYS_PWR_REG 0x11FC #define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1200 #define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG 0x1204 #define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220 #define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG 0x1224 #define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG 0x1228 #define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG 0x122C #define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1230 #define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG 0x1234 #define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG 0x1238 #define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG 0x123C #define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG 0x1240 #define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG 0x1250 #define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG 0x1260 #define EXYNOS5_XUSBXTI_SYS_PWR_REG 0x1280 #define EXYNOS5_XXTI_SYS_PWR_REG 0x1284 #define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG 0x12C0 #define EXYNOS5_GPIO_MODE_SYS_PWR_REG 0x1300 #define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG 0x1320 #define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG 0x1340 #define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG 0x1344 #define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG 0x1348 #define EXYNOS5_GSCL_SYS_PWR_REG 0x1400 #define EXYNOS5_ISP_SYS_PWR_REG 0x1404 #define EXYNOS5_MFC_SYS_PWR_REG 0x1408 #define EXYNOS5_G3D_SYS_PWR_REG 0x140C #define EXYNOS5_DISP1_SYS_PWR_REG 0x1414 #define EXYNOS5_MAU_SYS_PWR_REG 0x1418 #define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG 0x1480 #define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG 0x1484 #define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG 0x1488 #define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x148C #define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG 0x1494 #define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG 0x1498 #define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG 0x14C0 #define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG 0x14C4 #define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG 0x14C8 #define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG 0x14CC #define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG 0x14D4 #define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG 0x14D8 #define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG 0x1580 #define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG 0x1584 #define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG 0x1588 #define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG 0x158C #define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG 0x1594 #define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG 0x1598 #define EXYNOS5_ARM_CORE0_OPTION 0x2008 #define EXYNOS5_ARM_CORE1_OPTION 0x2088 #define EXYNOS5_FSYS_ARM_OPTION 0x2208 #define EXYNOS5_ISP_ARM_OPTION 0x2288 #define EXYNOS5_ARM_COMMON_OPTION 0x2408 #define EXYNOS5_ARM_L2_OPTION 0x2608 #define EXYNOS5_TOP_PWR_OPTION 0x2C48 #define EXYNOS5_TOP_PWR_SYSMEM_OPTION 0x2CC8 #define EXYNOS5_JPEG_MEM_OPTION 0x2F48 #define EXYNOS5_GSCL_OPTION 0x4008 #define EXYNOS5_ISP_OPTION 0x4028 #define EXYNOS5_MFC_OPTION 0x4048 #define EXYNOS5_G3D_OPTION 0x4068 #define EXYNOS5_DISP1_OPTION 0x40A8 #define EXYNOS5_MAU_OPTION 0x40C8 #define EXYNOS5_USE_SC_FEEDBACK (1 << 1) #define EXYNOS5_USE_SC_COUNTER (1 << 0) #define EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN (1 << 7) #define EXYNOS5_OPTION_USE_STANDBYWFE (1 << 24) #define EXYNOS5_OPTION_USE_STANDBYWFI (1 << 16) #define EXYNOS5_OPTION_USE_RETENTION (1 << 4) #define EXYNOS5420_SWRESET_KFC_SEL 0x3 /* Only for Exynos5420 */ #define EXYNOS5420_L2RSTDISABLE_VALUE BIT(3) #define EXYNOS5420_LPI_MASK 0x0004 #define EXYNOS5420_LPI_MASK1 0x0008 #define EXYNOS5420_UFS BIT(8) #define EXYNOS5420_ATB_KFC BIT(13) #define EXYNOS5420_ATB_ISP_ARM BIT(19) #define EXYNOS5420_EMULATION BIT(31) #define EXYNOS5420_ARM_INTR_SPREAD_ENABLE 0x0100 #define EXYNOS5420_ARM_INTR_SPREAD_USE_STANDBYWFI 0x0104 #define EXYNOS5420_UP_SCHEDULER 0x0120 #define SPREAD_ENABLE 0xF #define SPREAD_USE_STANDWFI 0xF #define EXYNOS5420_KFC_CORE_RESET0 BIT(8) #define EXYNOS5420_KFC_ETM_RESET0 BIT(20) #define EXYNOS5420_KFC_CORE_RESET(_nr) \ ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) #define EXYNOS5420_USBDRD1_PHY_CONTROL 0x0708 #define EXYNOS5420_MIPI_PHY_CONTROL(n) (0x0714 + (n) * 4) #define EXYNOS5420_DPTX_PHY_CONTROL 0x0728 #define EXYNOS5420_ARM_CORE2_SYS_PWR_REG 0x1020 #define EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG 0x1024 #define EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG 0x1028 #define EXYNOS5420_ARM_CORE3_SYS_PWR_REG 0x1030 #define EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG 0x1034 #define EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG 0x1038 #define EXYNOS5420_KFC_CORE0_SYS_PWR_REG 0x1040 #define EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG 0x1044 #define EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG 0x1048 #define EXYNOS5420_KFC_CORE1_SYS_PWR_REG 0x1050 #define EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG 0x1054 #define EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG 0x1058 #define EXYNOS5420_KFC_CORE2_SYS_PWR_REG 0x1060 #define EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG 0x1064 #define EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG 0x1068 #define EXYNOS5420_KFC_CORE3_SYS_PWR_REG 0x1070 #define EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG 0x1074 #define EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG 0x1078 #define EXYNOS5420_ISP_ARM_SYS_PWR_REG 0x1090 #define EXYNOS5420_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG 0x1094 #define EXYNOS5420_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG 0x1098 #define EXYNOS5420_ARM_COMMON_SYS_PWR_REG 0x10A0 #define EXYNOS5420_KFC_COMMON_SYS_PWR_REG 0x10B0 #define EXYNOS5420_KFC_L2_SYS_PWR_REG 0x10D0 #define EXYNOS5420_DPLL_SYSCLK_SYS_PWR_REG 0x1158 #define EXYNOS5420_IPLL_SYSCLK_SYS_PWR_REG 0x115C #define EXYNOS5420_KPLL_SYSCLK_SYS_PWR_REG 0x1160 #define EXYNOS5420_RPLL_SYSCLK_SYS_PWR_REG 0x1174 #define EXYNOS5420_SPLL_SYSCLK_SYS_PWR_REG 0x1178 #define EXYNOS5420_INTRAM_MEM_SYS_PWR_REG 0x11B8 #define EXYNOS5420_INTROM_MEM_SYS_PWR_REG 0x11BC #define EXYNOS5420_PAD_RETENTION_JTAG_SYS_PWR_REG 0x1208 #define EXYNOS5420_PAD_RETENTION_DRAM_SYS_PWR_REG 0x1210 #define EXYNOS5420_PAD_RETENTION_UART_SYS_PWR_REG 0x1214 #define EXYNOS5420_PAD_RETENTION_MMC0_SYS_PWR_REG 0x1218 #define EXYNOS5420_PAD_RETENTION_MMC1_SYS_PWR_REG 0x121C #define EXYNOS5420_PAD_RETENTION_MMC2_SYS_PWR_REG 0x1220 #define EXYNOS5420_PAD_RETENTION_HSI_SYS_PWR_REG 0x1224 #define EXYNOS5420_PAD_RETENTION_EBIA_SYS_PWR_REG 0x1228 #define EXYNOS5420_PAD_RETENTION_EBIB_SYS_PWR_REG 0x122C #define EXYNOS5420_PAD_RETENTION_SPI_SYS_PWR_REG 0x1230 #define EXYNOS5420_PAD_RETENTION_DRAM_COREBLK_SYS_PWR_REG 0x1234 #define EXYNOS5420_DISP1_SYS_PWR_REG 0x1410 #define EXYNOS5420_MAU_SYS_PWR_REG 0x1414 #define EXYNOS5420_G2D_SYS_PWR_REG 0x1418 #define EXYNOS5420_MSC_SYS_PWR_REG 0x141C #define EXYNOS5420_FSYS_SYS_PWR_REG 0x1420 #define EXYNOS5420_FSYS2_SYS_PWR_REG 0x1424 #define EXYNOS5420_PSGEN_SYS_PWR_REG 0x1428 #define EXYNOS5420_PERIC_SYS_PWR_REG 0x142C #define EXYNOS5420_WCORE_SYS_PWR_REG 0x1430 #define EXYNOS5420_CMU_CLKSTOP_DISP1_SYS_PWR_REG 0x1490 #define EXYNOS5420_CMU_CLKSTOP_MAU_SYS_PWR_REG 0x1494 #define EXYNOS5420_CMU_CLKSTOP_G2D_SYS_PWR_REG 0x1498 #define EXYNOS5420_CMU_CLKSTOP_MSC_SYS_PWR_REG 0x149C #define EXYNOS5420_CMU_CLKSTOP_FSYS_SYS_PWR_REG 0x14A0 #define EXYNOS5420_CMU_CLKSTOP_FSYS2_SYS_PWR_REG 0x14A4 #define EXYNOS5420_CMU_CLKSTOP_PSGEN_SYS_PWR_REG 0x14A8 #define EXYNOS5420_CMU_CLKSTOP_PERIC_SYS_PWR_REG 0x14AC #define EXYNOS5420_CMU_CLKSTOP_WCORE_SYS_PWR_REG 0x14B0 #define EXYNOS5420_CMU_SYSCLK_TOPPWR_SYS_PWR_REG 0x14BC #define EXYNOS5420_CMU_SYSCLK_DISP1_SYS_PWR_REG 0x14D0 #define EXYNOS5420_CMU_SYSCLK_MAU_SYS_PWR_REG 0x14D4 #define EXYNOS5420_CMU_SYSCLK_G2D_SYS_PWR_REG 0x14D8 #define EXYNOS5420_CMU_SYSCLK_MSC_SYS_PWR_REG 0x14DC #define EXYNOS5420_CMU_SYSCLK_FSYS_SYS_PWR_REG 0x14E0 #define EXYNOS5420_CMU_SYSCLK_FSYS2_SYS_PWR_REG 0x14E4 #define EXYNOS5420_CMU_SYSCLK_PSGEN_SYS_PWR_REG 0x14E8 #define EXYNOS5420_CMU_SYSCLK_PERIC_SYS_PWR_REG 0x14EC #define EXYNOS5420_CMU_SYSCLK_WCORE_SYS_PWR_REG 0x14F0 #define EXYNOS5420_CMU_SYSCLK_SYSMEM_TOPPWR_SYS_PWR_REG 0x14F4 #define EXYNOS5420_CMU_RESET_FSYS2_SYS_PWR_REG 0x1570 #define EXYNOS5420_CMU_RESET_PSGEN_SYS_PWR_REG 0x1574 #define EXYNOS5420_CMU_RESET_PERIC_SYS_PWR_REG 0x1578 #define EXYNOS5420_CMU_RESET_WCORE_SYS_PWR_REG 0x157C #define EXYNOS5420_CMU_RESET_DISP1_SYS_PWR_REG 0x1590 #define EXYNOS5420_CMU_RESET_MAU_SYS_PWR_REG 0x1594 #define EXYNOS5420_CMU_RESET_G2D_SYS_PWR_REG 0x1598 #define EXYNOS5420_CMU_RESET_MSC_SYS_PWR_REG 0x159C #define EXYNOS5420_CMU_RESET_FSYS_SYS_PWR_REG 0x15A0 #define EXYNOS5420_SFR_AXI_CGDIS1 0x15E4 #define EXYNOS5420_ARM_COMMON_OPTION 0x2508 #define EXYNOS5420_KFC_COMMON_OPTION 0x2588 #define EXYNOS5420_LOGIC_RESET_DURATION3 0x2D1C #define EXYNOS5420_PAD_RET_GPIO_OPTION 0x30C8 #define EXYNOS5420_PAD_RET_UART_OPTION 0x30E8 #define EXYNOS5420_PAD_RET_MMCA_OPTION 0x3108 #define EXYNOS5420_PAD_RET_MMCB_OPTION 0x3128 #define EXYNOS5420_PAD_RET_MMCC_OPTION 0x3148 #define EXYNOS5420_PAD_RET_HSI_OPTION 0x3168 #define EXYNOS5420_PAD_RET_SPI_OPTION 0x31C8 #define EXYNOS5420_PAD_RET_DRAM_COREBLK_OPTION 0x31E8 #define EXYNOS_PAD_RET_DRAM_OPTION 0x3008 #define EXYNOS_PAD_RET_MAUDIO_OPTION 0x3028 #define EXYNOS_PAD_RET_JTAG_OPTION 0x3048 #define EXYNOS_PAD_RET_EBIA_OPTION 0x3188 #define EXYNOS_PAD_RET_EBIB_OPTION 0x31A8 #define EXYNOS5420_FSYS2_OPTION 0x4168 #define EXYNOS5420_PSGEN_OPTION 0x4188 #define EXYNOS5420_ARM_USE_STANDBY_WFI0 BIT(4) #define EXYNOS5420_ARM_USE_STANDBY_WFI1 BIT(5) #define EXYNOS5420_ARM_USE_STANDBY_WFI2 BIT(6) #define EXYNOS5420_ARM_USE_STANDBY_WFI3 BIT(7) #define EXYNOS5420_KFC_USE_STANDBY_WFI0 BIT(8) #define EXYNOS5420_KFC_USE_STANDBY_WFI1 BIT(9) #define EXYNOS5420_KFC_USE_STANDBY_WFI2 BIT(10) #define EXYNOS5420_KFC_USE_STANDBY_WFI3 BIT(11) #define EXYNOS5420_ARM_USE_STANDBY_WFE0 BIT(16) #define EXYNOS5420_ARM_USE_STANDBY_WFE1 BIT(17) #define EXYNOS5420_ARM_USE_STANDBY_WFE2 BIT(18) #define EXYNOS5420_ARM_USE_STANDBY_WFE3 BIT(19) #define EXYNOS5420_KFC_USE_STANDBY_WFE0 BIT(20) #define EXYNOS5420_KFC_USE_STANDBY_WFE1 BIT(21) #define EXYNOS5420_KFC_USE_STANDBY_WFE2 BIT(22) #define EXYNOS5420_KFC_USE_STANDBY_WFE3 BIT(23) #define DUR_WAIT_RESET 0xF #define EXYNOS5420_USE_STANDBY_WFI_ALL (EXYNOS5420_ARM_USE_STANDBY_WFI0 \ | EXYNOS5420_ARM_USE_STANDBY_WFI1 \ | EXYNOS5420_ARM_USE_STANDBY_WFI2 \ | EXYNOS5420_ARM_USE_STANDBY_WFI3 \ | EXYNOS5420_KFC_USE_STANDBY_WFI0 \ | EXYNOS5420_KFC_USE_STANDBY_WFI1 \ | EXYNOS5420_KFC_USE_STANDBY_WFI2 \ | EXYNOS5420_KFC_USE_STANDBY_WFI3) /* For Exynos5433 */ #define EXYNOS5433_EINT_WAKEUP_MASK (0x060C) #define EXYNOS5433_USBHOST30_PHY_CONTROL (0x0728) #define EXYNOS5433_PAD_RETENTION_AUD_OPTION (0x3028) #define EXYNOS5433_PAD_RETENTION_MMC2_OPTION (0x30C8) #define EXYNOS5433_PAD_RETENTION_TOP_OPTION (0x3108) #define EXYNOS5433_PAD_RETENTION_UART_OPTION (0x3128) #define EXYNOS5433_PAD_RETENTION_MMC0_OPTION (0x3148) #define EXYNOS5433_PAD_RETENTION_MMC1_OPTION (0x3168) #define EXYNOS5433_PAD_RETENTION_EBIA_OPTION (0x3188) #define EXYNOS5433_PAD_RETENTION_EBIB_OPTION (0x31A8) #define EXYNOS5433_PAD_RETENTION_SPI_OPTION (0x31C8) #define EXYNOS5433_PAD_RETENTION_MIF_OPTION (0x31E8) #define EXYNOS5433_PAD_RETENTION_USBXTI_OPTION (0x3228) #define EXYNOS5433_PAD_RETENTION_BOOTLDO_OPTION (0x3248) #define EXYNOS5433_PAD_RETENTION_UFS_OPTION (0x3268) #define EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION (0x32A8) #endif /* __LINUX_SOC_EXYNOS_REGS_PMU_H */ PK ! �X`r1 1 soc/samsung/exynos-chipid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * * Exynos - CHIPID support */ #ifndef __LINUX_SOC_EXYNOS_CHIPID_H #define __LINUX_SOC_EXYNOS_CHIPID_H #define EXYNOS_CHIPID_REG_PRO_ID 0x00 #define EXYNOS_REV_PART_MASK 0xf #define EXYNOS_REV_PART_SHIFT 4 #define EXYNOS_MASK 0xfffff000 #define EXYNOS_CHIPID_REG_PKG_ID 0x04 /* Bit field definitions for EXYNOS_CHIPID_REG_PKG_ID register */ #define EXYNOS5422_IDS_OFFSET 24 #define EXYNOS5422_IDS_MASK 0xff #define EXYNOS5422_USESG_OFFSET 3 #define EXYNOS5422_USESG_MASK 0x01 #define EXYNOS5422_SG_OFFSET 0 #define EXYNOS5422_SG_MASK 0x07 #define EXYNOS5422_TABLE_OFFSET 8 #define EXYNOS5422_TABLE_MASK 0x03 #define EXYNOS5422_SG_A_OFFSET 17 #define EXYNOS5422_SG_A_MASK 0x0f #define EXYNOS5422_SG_B_OFFSET 21 #define EXYNOS5422_SG_B_MASK 0x03 #define EXYNOS5422_SG_BSIGN_OFFSET 23 #define EXYNOS5422_SG_BSIGN_MASK 0x01 #define EXYNOS5422_BIN2_OFFSET 12 #define EXYNOS5422_BIN2_MASK 0x01 #define EXYNOS_CHIPID_REG_LOT_ID 0x14 #define EXYNOS_CHIPID_REG_AUX_INFO 0x1c /* Bit field definitions for EXYNOS_CHIPID_REG_AUX_INFO register */ #define EXYNOS5422_TMCB_OFFSET 0 #define EXYNOS5422_TMCB_MASK 0x7f #define EXYNOS5422_ARM_UP_OFFSET 8 #define EXYNOS5422_ARM_UP_MASK 0x03 #define EXYNOS5422_ARM_DN_OFFSET 10 #define EXYNOS5422_ARM_DN_MASK 0x03 #define EXYNOS5422_KFC_UP_OFFSET 12 #define EXYNOS5422_KFC_UP_MASK 0x03 #define EXYNOS5422_KFC_DN_OFFSET 14 #define EXYNOS5422_KFC_DN_MASK 0x03 #endif /*__LINUX_SOC_EXYNOS_CHIPID_H */ PK ! ,4n*� � soc/dove/pmu.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_SOC_DOVE_PMU_H #define LINUX_SOC_DOVE_PMU_H #include <linux/types.h> struct dove_pmu_domain_initdata { u32 pwr_mask; u32 rst_mask; u32 iso_mask; const char *name; }; struct dove_pmu_initdata { void __iomem *pmc_base; void __iomem *pmu_base; int irq; int irq_domain_start; const struct dove_pmu_domain_initdata *domains; }; int dove_init_pmu_legacy(const struct dove_pmu_initdata *); int dove_init_pmu(void); #endif PK ! l((Hf f soc/brcmstb/brcmstb.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __BRCMSTB_SOC_H #define __BRCMSTB_SOC_H #include <linux/kconfig.h> static inline u32 BRCM_ID(u32 reg) { return reg >> 28 ? reg >> 16 : reg >> 8; } static inline u32 BRCM_REV(u32 reg) { return reg & 0xff; } #if IS_ENABLED(CONFIG_SOC_BRCMSTB) /* * Helper functions for getting family or product id from the * SoC driver. */ u32 brcmstb_get_family_id(void); u32 brcmstb_get_product_id(void); #else static inline u32 brcmstb_get_family_id(void) { return 0; } static inline u32 brcmstb_get_product_id(void) { return 0; } #endif #endif /* __BRCMSTB_SOC_H */ PK ! t���� � soc/actions/owl-sps.hnu �[��� /* * Copyright (c) 2017 Andreas Färber * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef SOC_ACTIONS_OWL_SPS_H #define SOC_ACTIONS_OWL_SPS_H int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable); #endif PK ! D �F� � soc/ti/knav_dma.hnu �[��� /* * Copyright (C) 2014 Texas Instruments Incorporated * Authors: Sandeep Nair <sandeep_n@ti.com * Cyril Chemparathy <cyril@ti.com Santosh Shilimkar <santosh.shilimkar@ti.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__ #define __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__ #include <linux/dmaengine.h> /* * PKTDMA descriptor manipulation macros for host packet descriptor */ #define MASK(x) (BIT(x) - 1) #define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22) #define KNAV_DMA_DESC_PKT_LEN_SHIFT 0 #define KNAV_DMA_DESC_PS_INFO_IN_SOP BIT(22) #define KNAV_DMA_DESC_PS_INFO_IN_DESC 0 #define KNAV_DMA_DESC_TAG_MASK MASK(8) #define KNAV_DMA_DESC_SAG_HI_SHIFT 24 #define KNAV_DMA_DESC_STAG_LO_SHIFT 16 #define KNAV_DMA_DESC_DTAG_HI_SHIFT 8 #define KNAV_DMA_DESC_DTAG_LO_SHIFT 0 #define KNAV_DMA_DESC_HAS_EPIB BIT(31) #define KNAV_DMA_DESC_NO_EPIB 0 #define KNAV_DMA_DESC_PSLEN_SHIFT 24 #define KNAV_DMA_DESC_PSLEN_MASK MASK(6) #define KNAV_DMA_DESC_ERR_FLAG_SHIFT 20 #define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4) #define KNAV_DMA_DESC_PSFLAG_SHIFT 16 #define KNAV_DMA_DESC_PSFLAG_MASK MASK(4) #define KNAV_DMA_DESC_RETQ_SHIFT 0 #define KNAV_DMA_DESC_RETQ_MASK MASK(14) #define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22) #define KNAV_DMA_DESC_EFLAGS_MASK MASK(4) #define KNAV_DMA_DESC_EFLAGS_SHIFT 20 #define KNAV_DMA_NUM_EPIB_WORDS 4 #define KNAV_DMA_NUM_PS_WORDS 16 #define KNAV_DMA_NUM_SW_DATA_WORDS 4 #define KNAV_DMA_FDQ_PER_CHAN 4 /* Tx channel scheduling priority */ enum knav_dma_tx_priority { DMA_PRIO_HIGH = 0, DMA_PRIO_MED_H, DMA_PRIO_MED_L, DMA_PRIO_LOW }; /* Rx channel error handling mode during buffer starvation */ enum knav_dma_rx_err_mode { DMA_DROP = 0, DMA_RETRY }; /* Rx flow size threshold configuration */ enum knav_dma_rx_thresholds { DMA_THRESH_NONE = 0, DMA_THRESH_0 = 1, DMA_THRESH_0_1 = 3, DMA_THRESH_0_1_2 = 7 }; /* Descriptor type */ enum knav_dma_desc_type { DMA_DESC_HOST = 0, DMA_DESC_MONOLITHIC = 2 }; /** * struct knav_dma_tx_cfg: Tx channel configuration * @filt_einfo: Filter extended packet info * @filt_pswords: Filter PS words present * @knav_dma_tx_priority: Tx channel scheduling priority */ struct knav_dma_tx_cfg { bool filt_einfo; bool filt_pswords; enum knav_dma_tx_priority priority; }; /** * struct knav_dma_rx_cfg: Rx flow configuration * @einfo_present: Extended packet info present * @psinfo_present: PS words present * @knav_dma_rx_err_mode: Error during buffer starvation * @knav_dma_desc_type: Host or Monolithic desc * @psinfo_at_sop: PS word located at start of packet * @sop_offset: Start of packet offset * @dst_q: Destination queue for a given flow * @thresh: Rx flow size threshold * @fdq[]: Free desc Queue array * @sz_thresh0: RX packet size threshold 0 * @sz_thresh1: RX packet size threshold 1 * @sz_thresh2: RX packet size threshold 2 */ struct knav_dma_rx_cfg { bool einfo_present; bool psinfo_present; enum knav_dma_rx_err_mode err_mode; enum knav_dma_desc_type desc_type; bool psinfo_at_sop; unsigned int sop_offset; unsigned int dst_q; enum knav_dma_rx_thresholds thresh; unsigned int fdq[KNAV_DMA_FDQ_PER_CHAN]; unsigned int sz_thresh0; unsigned int sz_thresh1; unsigned int sz_thresh2; }; /** * struct knav_dma_cfg: Pktdma channel configuration * @sl_cfg: Slave configuration * @tx: Tx channel configuration * @rx: Rx flow configuration */ struct knav_dma_cfg { enum dma_transfer_direction direction; union { struct knav_dma_tx_cfg tx; struct knav_dma_rx_cfg rx; } u; }; /** * struct knav_dma_desc: Host packet descriptor layout * @desc_info: Descriptor information like id, type, length * @tag_info: Flow tag info written in during RX * @packet_info: Queue Manager, policy, flags etc * @buff_len: Buffer length in bytes * @buff: Buffer pointer * @next_desc: For chaining the descriptors * @orig_len: length since 'buff_len' can be overwritten * @orig_buff: buff pointer since 'buff' can be overwritten * @epib: Extended packet info block * @psdata: Protocol specific * @sw_data: Software private data not touched by h/w */ struct knav_dma_desc { __le32 desc_info; __le32 tag_info; __le32 packet_info; __le32 buff_len; __le32 buff; __le32 next_desc; __le32 orig_len; __le32 orig_buff; __le32 epib[KNAV_DMA_NUM_EPIB_WORDS]; __le32 psdata[KNAV_DMA_NUM_PS_WORDS]; u32 sw_data[KNAV_DMA_NUM_SW_DATA_WORDS]; } ____cacheline_aligned; #if IS_ENABLED(CONFIG_KEYSTONE_NAVIGATOR_DMA) void *knav_dma_open_channel(struct device *dev, const char *name, struct knav_dma_cfg *config); void knav_dma_close_channel(void *channel); int knav_dma_get_flow(void *channel); bool knav_dma_device_ready(void); #else static inline void *knav_dma_open_channel(struct device *dev, const char *name, struct knav_dma_cfg *config) { return (void *) NULL; } static inline void knav_dma_close_channel(void *channel) {} static inline int knav_dma_get_flow(void *channel) { return -EINVAL; } static inline bool knav_dma_device_ready(void) { return false; } #endif #endif /* __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__ */ PK ! ɐ��� � soc/ti/k3-ringacc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * K3 Ring Accelerator (RA) subsystem interface * * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef __SOC_TI_K3_RINGACC_API_H_ #define __SOC_TI_K3_RINGACC_API_H_ #include <linux/types.h> struct device_node; /** * enum k3_ring_mode - &struct k3_ring_cfg mode * * RA ring operational modes * * @K3_RINGACC_RING_MODE_RING: Exposed Ring mode for SW direct access * @K3_RINGACC_RING_MODE_MESSAGE: Messaging mode. Messaging mode requires * that all accesses to the queue must go through this IP so that all * accesses to the memory are controlled and ordered. This IP then * controls the entire state of the queue, and SW has no directly control, * such as through doorbells and cannot access the storage memory directly. * This is particularly useful when more than one SW or HW entity can be * the producer and/or consumer at the same time * @K3_RINGACC_RING_MODE_CREDENTIALS: Credentials mode is message mode plus * stores credentials with each message, requiring the element size to be * doubled to fit the credentials. Any exposed memory should be protected * by a firewall from unwanted access */ enum k3_ring_mode { K3_RINGACC_RING_MODE_RING = 0, K3_RINGACC_RING_MODE_MESSAGE, K3_RINGACC_RING_MODE_CREDENTIALS, K3_RINGACC_RING_MODE_INVALID }; /** * enum k3_ring_size - &struct k3_ring_cfg elm_size * * RA ring element's sizes in bytes. */ enum k3_ring_size { K3_RINGACC_RING_ELSIZE_4 = 0, K3_RINGACC_RING_ELSIZE_8, K3_RINGACC_RING_ELSIZE_16, K3_RINGACC_RING_ELSIZE_32, K3_RINGACC_RING_ELSIZE_64, K3_RINGACC_RING_ELSIZE_128, K3_RINGACC_RING_ELSIZE_256, K3_RINGACC_RING_ELSIZE_INVALID }; struct k3_ringacc; struct k3_ring; /** * enum k3_ring_cfg - RA ring configuration structure * * @size: Ring size, number of elements * @elm_size: Ring element size * @mode: Ring operational mode * @flags: Ring configuration flags. Possible values: * @K3_RINGACC_RING_SHARED: when set allows to request the same ring * few times. It's usable when the same ring is used as Free Host PD ring * for different flows, for example. * Note: Locking should be done by consumer if required * @dma_dev: Master device which is using and accessing to the ring * memory when the mode is K3_RINGACC_RING_MODE_RING. Memory allocations * should be done using this device. * @asel: Address Space Select value for physical addresses */ struct k3_ring_cfg { u32 size; enum k3_ring_size elm_size; enum k3_ring_mode mode; #define K3_RINGACC_RING_SHARED BIT(1) u32 flags; struct device *dma_dev; u32 asel; }; #define K3_RINGACC_RING_ID_ANY (-1) /** * of_k3_ringacc_get_by_phandle - find a RA by phandle property * @np: device node * @propname: property name containing phandle on RA node * * Returns pointer on the RA - struct k3_ringacc * or -ENODEV if not found, * or -EPROBE_DEFER if not yet registered */ struct k3_ringacc *of_k3_ringacc_get_by_phandle(struct device_node *np, const char *property); #define K3_RINGACC_RING_USE_PROXY BIT(1) /** * k3_ringacc_request_ring - request ring from ringacc * @ringacc: pointer on ringacc * @id: ring id or K3_RINGACC_RING_ID_ANY for any general purpose ring * @flags: * @K3_RINGACC_RING_USE_PROXY: if set - proxy will be allocated and * used to access ring memory. Sopported only for rings in * Message/Credentials/Queue mode. * * Returns pointer on the Ring - struct k3_ring * or NULL in case of failure. */ struct k3_ring *k3_ringacc_request_ring(struct k3_ringacc *ringacc, int id, u32 flags); int k3_ringacc_request_rings_pair(struct k3_ringacc *ringacc, int fwd_id, int compl_id, struct k3_ring **fwd_ring, struct k3_ring **compl_ring); /** * k3_ringacc_ring_reset - ring reset * @ring: pointer on Ring * * Resets ring internal state ((hw)occ, (hw)idx). */ void k3_ringacc_ring_reset(struct k3_ring *ring); /** * k3_ringacc_ring_reset - ring reset for DMA rings * @ring: pointer on Ring * * Resets ring internal state ((hw)occ, (hw)idx). Should be used for rings * which are read by K3 UDMA, like TX or Free Host PD rings. */ void k3_ringacc_ring_reset_dma(struct k3_ring *ring, u32 occ); /** * k3_ringacc_ring_free - ring free * @ring: pointer on Ring * * Resets ring and free all alocated resources. */ int k3_ringacc_ring_free(struct k3_ring *ring); /** * k3_ringacc_get_ring_id - Get the Ring ID * @ring: pointer on ring * * Returns the Ring ID */ u32 k3_ringacc_get_ring_id(struct k3_ring *ring); /** * k3_ringacc_get_ring_irq_num - Get the irq number for the ring * @ring: pointer on ring * * Returns the interrupt number which can be used to request the interrupt */ int k3_ringacc_get_ring_irq_num(struct k3_ring *ring); /** * k3_ringacc_ring_cfg - ring configure * @ring: pointer on ring * @cfg: Ring configuration parameters (see &struct k3_ring_cfg) * * Configures ring, including ring memory allocation. * Returns 0 on success, errno otherwise. */ int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg); /** * k3_ringacc_ring_get_size - get ring size * @ring: pointer on ring * * Returns ring size in number of elements. */ u32 k3_ringacc_ring_get_size(struct k3_ring *ring); /** * k3_ringacc_ring_get_free - get free elements * @ring: pointer on ring * * Returns number of free elements in the ring. */ u32 k3_ringacc_ring_get_free(struct k3_ring *ring); /** * k3_ringacc_ring_get_occ - get ring occupancy * @ring: pointer on ring * * Returns total number of valid entries on the ring */ u32 k3_ringacc_ring_get_occ(struct k3_ring *ring); /** * k3_ringacc_ring_is_full - checks if ring is full * @ring: pointer on ring * * Returns true if the ring is full */ u32 k3_ringacc_ring_is_full(struct k3_ring *ring); /** * k3_ringacc_ring_push - push element to the ring tail * @ring: pointer on ring * @elem: pointer on ring element buffer * * Push one ring element to the ring tail. Size of the ring element is * determined by ring configuration &struct k3_ring_cfg elm_size. * * Returns 0 on success, errno otherwise. */ int k3_ringacc_ring_push(struct k3_ring *ring, void *elem); /** * k3_ringacc_ring_pop - pop element from the ring head * @ring: pointer on ring * @elem: pointer on ring element buffer * * Push one ring element from the ring head. Size of the ring element is * determined by ring configuration &struct k3_ring_cfg elm_size.. * * Returns 0 on success, errno otherwise. */ int k3_ringacc_ring_pop(struct k3_ring *ring, void *elem); /** * k3_ringacc_ring_push_head - push element to the ring head * @ring: pointer on ring * @elem: pointer on ring element buffer * * Push one ring element to the ring head. Size of the ring element is * determined by ring configuration &struct k3_ring_cfg elm_size. * * Returns 0 on success, errno otherwise. * Not Supported by ring modes: K3_RINGACC_RING_MODE_RING */ int k3_ringacc_ring_push_head(struct k3_ring *ring, void *elem); /** * k3_ringacc_ring_pop_tail - pop element from the ring tail * @ring: pointer on ring * @elem: pointer on ring element buffer * * Push one ring element from the ring tail. Size of the ring element is * determined by ring configuration &struct k3_ring_cfg elm_size. * * Returns 0 on success, errno otherwise. * Not Supported by ring modes: K3_RINGACC_RING_MODE_RING */ int k3_ringacc_ring_pop_tail(struct k3_ring *ring, void *elem); u32 k3_ringacc_get_tisci_dev_id(struct k3_ring *ring); /* DMA ring support */ struct ti_sci_handle; /** * struct struct k3_ringacc_init_data - Initialization data for DMA rings */ struct k3_ringacc_init_data { const struct ti_sci_handle *tisci; u32 tisci_dev_id; u32 num_rings; }; struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, struct k3_ringacc_init_data *data); #endif /* __SOC_TI_K3_RINGACC_API_H_ */ PK ! '��< < soc/ti/ti-msgmgr.hnu �[��� /* * Texas Instruments' Message Manager * * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef TI_MSGMGR_H #define TI_MSGMGR_H /** * struct ti_msgmgr_message - Message Manager structure * @len: Length of data in the Buffer * @buf: Buffer pointer * * This is the structure for data used in mbox_send_message * the length of data buffer used depends on the SoC integration * parameters - each message may be 64, 128 bytes long depending * on SoC. Client is supposed to be aware of this. */ struct ti_msgmgr_message { size_t len; u8 *buf; }; #endif /* TI_MSGMGR_H */ PK ! a8 I soc/ti/ti_sci_inta_msi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Texas Instruments' K3 TI SCI INTA MSI helper * * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ #ifndef __INCLUDE_LINUX_TI_SCI_INTA_MSI_H #define __INCLUDE_LINUX_TI_SCI_INTA_MSI_H #include <linux/msi.h> #include <linux/soc/ti/ti_sci_protocol.h> struct irq_domain *ti_sci_inta_msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); int ti_sci_inta_msi_domain_alloc_irqs(struct device *dev, struct ti_sci_resource *res); unsigned int ti_sci_inta_msi_get_virq(struct device *dev, u32 index); void ti_sci_inta_msi_domain_free_irqs(struct device *dev); #endif /* __INCLUDE_LINUX_IRQCHIP_TI_SCI_INTA_H */ PK ! ���[-b -b soc/ti/ti_sci_protocol.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Texas Instruments System Control Interface Protocol * * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon */ #ifndef __TISCI_PROTOCOL_H #define __TISCI_PROTOCOL_H /** * struct ti_sci_version_info - version information structure * @abi_major: Major ABI version. Change here implies risk of backward * compatibility break. * @abi_minor: Minor ABI version. Change here implies new feature addition, * or compatible change in ABI. * @firmware_revision: Firmware revision (not usually used). * @firmware_description: Firmware description (not usually used). */ struct ti_sci_version_info { u8 abi_major; u8 abi_minor; u16 firmware_revision; char firmware_description[32]; }; struct ti_sci_handle; /** * struct ti_sci_core_ops - SoC Core Operations * @reboot_device: Reboot the SoC * Returns 0 for successful request(ideally should never return), * else returns corresponding error value. */ struct ti_sci_core_ops { int (*reboot_device)(const struct ti_sci_handle *handle); }; /** * struct ti_sci_dev_ops - Device control operations * @get_device: Command to request for device managed by TISCI * Returns 0 for successful exclusive request, else returns * corresponding error message. * @idle_device: Command to idle a device managed by TISCI * Returns 0 for successful exclusive request, else returns * corresponding error message. * @put_device: Command to release a device managed by TISCI * Returns 0 for successful release, else returns corresponding * error message. * @is_valid: Check if the device ID is a valid ID. * Returns 0 if the ID is valid, else returns corresponding error. * @get_context_loss_count: Command to retrieve context loss counter - this * increments every time the device looses context. Overflow * is possible. * - count: pointer to u32 which will retrieve counter * Returns 0 for successful information request and count has * proper data, else returns corresponding error message. * @is_idle: Reports back about device idle state * - req_state: Returns requested idle state * Returns 0 for successful information request and req_state and * current_state has proper data, else returns corresponding error * message. * @is_stop: Reports back about device stop state * - req_state: Returns requested stop state * - current_state: Returns current stop state * Returns 0 for successful information request and req_state and * current_state has proper data, else returns corresponding error * message. * @is_on: Reports back about device ON(or active) state * - req_state: Returns requested ON state * - current_state: Returns current ON state * Returns 0 for successful information request and req_state and * current_state has proper data, else returns corresponding error * message. * @is_transitioning: Reports back if the device is in the middle of transition * of state. * -current_state: Returns 'true' if currently transitioning. * @set_device_resets: Command to configure resets for device managed by TISCI. * -reset_state: Device specific reset bit field * Returns 0 for successful request, else returns * corresponding error message. * @get_device_resets: Command to read state of resets for device managed * by TISCI. * -reset_state: pointer to u32 which will retrieve resets * Returns 0 for successful request, else returns * corresponding error message. * * NOTE: for all these functions, the following parameters are generic in * nature: * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle * -id: Device Identifier * * Request for the device - NOTE: the client MUST maintain integrity of * usage count by balancing get_device with put_device. No refcounting is * managed by driver for that purpose. */ struct ti_sci_dev_ops { int (*get_device)(const struct ti_sci_handle *handle, u32 id); int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id); int (*idle_device)(const struct ti_sci_handle *handle, u32 id); int (*idle_device_exclusive)(const struct ti_sci_handle *handle, u32 id); int (*put_device)(const struct ti_sci_handle *handle, u32 id); int (*is_valid)(const struct ti_sci_handle *handle, u32 id); int (*get_context_loss_count)(const struct ti_sci_handle *handle, u32 id, u32 *count); int (*is_idle)(const struct ti_sci_handle *handle, u32 id, bool *requested_state); int (*is_stop)(const struct ti_sci_handle *handle, u32 id, bool *req_state, bool *current_state); int (*is_on)(const struct ti_sci_handle *handle, u32 id, bool *req_state, bool *current_state); int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id, bool *current_state); int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id, u32 reset_state); int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id, u32 *reset_state); }; /** * struct ti_sci_clk_ops - Clock control operations * @get_clock: Request for activation of clock and manage by processor * - needs_ssc: 'true' if Spread Spectrum clock is desired. * - can_change_freq: 'true' if frequency change is desired. * - enable_input_term: 'true' if input termination is desired. * @idle_clock: Request for Idling a clock managed by processor * @put_clock: Release the clock to be auto managed by TISCI * @is_auto: Is the clock being auto managed * - req_state: state indicating if the clock is auto managed * @is_on: Is the clock ON * - req_state: if the clock is requested to be forced ON * - current_state: if the clock is currently ON * @is_off: Is the clock OFF * - req_state: if the clock is requested to be forced OFF * - current_state: if the clock is currently Gated * @set_parent: Set the clock source of a specific device clock * - parent_id: Parent clock identifier to set. * @get_parent: Get the current clock source of a specific device clock * - parent_id: Parent clock identifier which is the parent. * @get_num_parents: Get the number of parents of the current clock source * - num_parents: returns the number of parent clocks. * @get_best_match_freq: Find a best matching frequency for a frequency * range. * - match_freq: Best matching frequency in Hz. * @set_freq: Set the Clock frequency * @get_freq: Get the Clock frequency * - current_freq: Frequency in Hz that the clock is at. * * NOTE: for all these functions, the following parameters are generic in * nature: * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle * -did: Device identifier this request is for * -cid: Clock identifier for the device for this request. * Each device has it's own set of clock inputs. This indexes * which clock input to modify. * -min_freq: The minimum allowable frequency in Hz. This is the minimum * allowable programmed frequency and does not account for clock * tolerances and jitter. * -target_freq: The target clock frequency in Hz. A frequency will be * processed as close to this target frequency as possible. * -max_freq: The maximum allowable frequency in Hz. This is the maximum * allowable programmed frequency and does not account for clock * tolerances and jitter. * * Request for the clock - NOTE: the client MUST maintain integrity of * usage count by balancing get_clock with put_clock. No refcounting is * managed by driver for that purpose. */ struct ti_sci_clk_ops { int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid, bool needs_ssc, bool can_change_freq, bool enable_input_term); int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid); int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid); int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u32 cid, bool *req_state); int (*is_on)(const struct ti_sci_handle *handle, u32 did, u32 cid, bool *req_state, bool *current_state); int (*is_off)(const struct ti_sci_handle *handle, u32 did, u32 cid, bool *req_state, bool *current_state); int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid, u32 parent_id); int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid, u32 *parent_id); int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did, u32 cid, u32 *num_parents); int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, u64 min_freq, u64 target_freq, u64 max_freq, u64 *match_freq); int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, u64 min_freq, u64 target_freq, u64 max_freq); int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, u64 *current_freq); }; /** * struct ti_sci_resource_desc - Description of TI SCI resource instance range. * @start: Start index of the first resource range. * @num: Number of resources in the first range. * @start_sec: Start index of the second resource range. * @num_sec: Number of resources in the second range. * @res_map: Bitmap to manage the allocation of these resources. */ struct ti_sci_resource_desc { u16 start; u16 num; u16 start_sec; u16 num_sec; unsigned long *res_map; }; /** * struct ti_sci_rm_core_ops - Resource management core operations * @get_range: Get a range of resources belonging to ti sci host. * @get_rage_from_shost: Get a range of resources belonging to * specified host id. * - s_host: Host processing entity to which the * resources are allocated * * NOTE: for these functions, all the parameters are consolidated and defined * as below: * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle * - dev_id: TISCI device ID. * - subtype: Resource assignment subtype that is being requested * from the given device. * - desc: Pointer to ti_sci_resource_desc to be updated with the resource * range start index and number of resources */ struct ti_sci_rm_core_ops { int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id, u8 subtype, struct ti_sci_resource_desc *desc); int (*get_range_from_shost)(const struct ti_sci_handle *handle, u32 dev_id, u8 subtype, u8 s_host, struct ti_sci_resource_desc *desc); }; #define TI_SCI_RESASG_SUBTYPE_IR_OUTPUT 0 #define TI_SCI_RESASG_SUBTYPE_IA_VINT 0xa #define TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0xd /** * struct ti_sci_rm_irq_ops: IRQ management operations * @set_irq: Set an IRQ route between the requested source * and destination * @set_event_map: Set an Event based peripheral irq to Interrupt * Aggregator. * @free_irq: Free an IRQ route between the requested source * and destination. * @free_event_map: Free an event based peripheral irq to Interrupt * Aggregator. */ struct ti_sci_rm_irq_ops { int (*set_irq)(const struct ti_sci_handle *handle, u16 src_id, u16 src_index, u16 dst_id, u16 dst_host_irq); int (*set_event_map)(const struct ti_sci_handle *handle, u16 src_id, u16 src_index, u16 ia_id, u16 vint, u16 global_event, u8 vint_status_bit); int (*free_irq)(const struct ti_sci_handle *handle, u16 src_id, u16 src_index, u16 dst_id, u16 dst_host_irq); int (*free_event_map)(const struct ti_sci_handle *handle, u16 src_id, u16 src_index, u16 ia_id, u16 vint, u16 global_event, u8 vint_status_bit); }; /* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */ #define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0) /* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */ #define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1) /* RA config.count parameter is valid for RM ring configure TI_SCI message */ #define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2) /* RA config.mode parameter is valid for RM ring configure TI_SCI message */ #define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3) /* RA config.size parameter is valid for RM ring configure TI_SCI message */ #define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4) /* RA config.order_id parameter is valid for RM ring configure TISCI message */ #define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5) /* RA config.virtid parameter is valid for RM ring configure TISCI message */ #define TI_SCI_MSG_VALUE_RM_RING_VIRTID_VALID BIT(6) /* RA config.asel parameter is valid for RM ring configure TISCI message */ #define TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID BIT(7) #define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \ (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \ TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \ TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \ TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \ TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID | \ TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID) /** * struct ti_sci_msg_rm_ring_cfg - Ring configuration * * Parameters for Navigator Subsystem ring configuration * See @ti_sci_msg_rm_ring_cfg_req */ struct ti_sci_msg_rm_ring_cfg { u32 valid_params; u16 nav_id; u16 index; u32 addr_lo; u32 addr_hi; u32 count; u8 mode; u8 size; u8 order_id; u16 virtid; u8 asel; }; /** * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations * @set_cfg: configure the SoC Navigator Subsystem Ring Accelerator ring */ struct ti_sci_rm_ringacc_ops { int (*set_cfg)(const struct ti_sci_handle *handle, const struct ti_sci_msg_rm_ring_cfg *params); }; /** * struct ti_sci_rm_psil_ops - PSI-L thread operations * @pair: pair PSI-L source thread to a destination thread. * If the src_thread is mapped to UDMA tchan, the corresponding channel's * TCHAN_THRD_ID register is updated. * If the dst_thread is mapped to UDMA rchan, the corresponding channel's * RCHAN_THRD_ID register is updated. * @unpair: unpair PSI-L source thread from a destination thread. * If the src_thread is mapped to UDMA tchan, the corresponding channel's * TCHAN_THRD_ID register is cleared. * If the dst_thread is mapped to UDMA rchan, the corresponding channel's * RCHAN_THRD_ID register is cleared. */ struct ti_sci_rm_psil_ops { int (*pair)(const struct ti_sci_handle *handle, u32 nav_id, u32 src_thread, u32 dst_thread); int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id, u32 src_thread, u32 dst_thread); }; /* UDMAP channel types */ #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */ #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2 #define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES 1 #define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_128_BYTES 2 #define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_256_BYTES 3 #define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_TCHAN 0 #define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_BCHAN 1 /* UDMAP TX/RX channel valid_params common declarations */ #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID BIT(14) /** * Configures a Navigator Subsystem UDMAP transmit channel * * Configures a Navigator Subsystem UDMAP transmit channel registers. * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req */ struct ti_sci_msg_rm_udmap_tx_ch_cfg { u32 valid_params; #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID BIT(15) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_EXTENDED_CH_TYPE_VALID BIT(16) u16 nav_id; u16 index; u8 tx_pause_on_err; u8 tx_filt_einfo; u8 tx_filt_pswords; u8 tx_atype; u8 tx_chan_type; u8 tx_supr_tdpkt; u16 tx_fetch_size; u8 tx_credit_count; u16 txcq_qnum; u8 tx_priority; u8 tx_qos; u8 tx_orderid; u16 fdepth; u8 tx_sched_priority; u8 tx_burst_size; u8 tx_tdtype; u8 extended_ch_type; }; /** * Configures a Navigator Subsystem UDMAP receive channel * * Configures a Navigator Subsystem UDMAP receive channel registers. * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req */ struct ti_sci_msg_rm_udmap_rx_ch_cfg { u32 valid_params; #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12) u16 nav_id; u16 index; u16 rx_fetch_size; u16 rxcq_qnum; u8 rx_priority; u8 rx_qos; u8 rx_orderid; u8 rx_sched_priority; u16 flowid_start; u16 flowid_cnt; u8 rx_pause_on_err; u8 rx_atype; u8 rx_chan_type; u8 rx_ignore_short; u8 rx_ignore_long; u8 rx_burst_size; }; /** * Configures a Navigator Subsystem UDMAP receive flow * * Configures a Navigator Subsystem UDMAP receive flow's registers. * See @tis_ci_msg_rm_udmap_flow_cfg_req */ struct ti_sci_msg_rm_udmap_flow_cfg { u32 valid_params; #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17) #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18) u16 nav_id; u16 flow_index; u8 rx_einfo_present; u8 rx_psinfo_present; u8 rx_error_handling; u8 rx_desc_type; u16 rx_sop_offset; u16 rx_dest_qnum; u8 rx_src_tag_hi; u8 rx_src_tag_lo; u8 rx_dest_tag_hi; u8 rx_dest_tag_lo; u8 rx_src_tag_hi_sel; u8 rx_src_tag_lo_sel; u8 rx_dest_tag_hi_sel; u8 rx_dest_tag_lo_sel; u16 rx_fdq0_sz0_qnum; u16 rx_fdq1_qnum; u16 rx_fdq2_qnum; u16 rx_fdq3_qnum; u8 rx_ps_location; }; /** * struct ti_sci_rm_udmap_ops - UDMA Management operations * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel. * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel. * @rx_flow_cfg1: configure SoC Navigator Subsystem UDMA receive flow. */ struct ti_sci_rm_udmap_ops { int (*tx_ch_cfg)(const struct ti_sci_handle *handle, const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params); int (*rx_ch_cfg)(const struct ti_sci_handle *handle, const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params); int (*rx_flow_cfg)(const struct ti_sci_handle *handle, const struct ti_sci_msg_rm_udmap_flow_cfg *params); }; /** * struct ti_sci_proc_ops - Processor Control operations * @request: Request to control a physical processor. The requesting host * should be in the processor access list * @release: Relinquish a physical processor control * @handover: Handover a physical processor control to another host * in the permitted list * @set_config: Set base configuration of a processor * @set_control: Setup limited control flags in specific cases * @get_status: Get the state of physical processor * * NOTE: The following paramteres are generic in nature for all these ops, * -handle: Pointer to TI SCI handle as retrieved by *ti_sci_get_handle * -pid: Processor ID * -hid: Host ID */ struct ti_sci_proc_ops { int (*request)(const struct ti_sci_handle *handle, u8 pid); int (*release)(const struct ti_sci_handle *handle, u8 pid); int (*handover)(const struct ti_sci_handle *handle, u8 pid, u8 hid); int (*set_config)(const struct ti_sci_handle *handle, u8 pid, u64 boot_vector, u32 cfg_set, u32 cfg_clr); int (*set_control)(const struct ti_sci_handle *handle, u8 pid, u32 ctrl_set, u32 ctrl_clr); int (*get_status)(const struct ti_sci_handle *handle, u8 pid, u64 *boot_vector, u32 *cfg_flags, u32 *ctrl_flags, u32 *status_flags); }; /** * struct ti_sci_ops - Function support for TI SCI * @dev_ops: Device specific operations * @clk_ops: Clock specific operations * @rm_core_ops: Resource management core operations. * @rm_irq_ops: IRQ management specific operations * @proc_ops: Processor Control specific operations */ struct ti_sci_ops { struct ti_sci_core_ops core_ops; struct ti_sci_dev_ops dev_ops; struct ti_sci_clk_ops clk_ops; struct ti_sci_rm_core_ops rm_core_ops; struct ti_sci_rm_irq_ops rm_irq_ops; struct ti_sci_rm_ringacc_ops rm_ring_ops; struct ti_sci_rm_psil_ops rm_psil_ops; struct ti_sci_rm_udmap_ops rm_udmap_ops; struct ti_sci_proc_ops proc_ops; }; /** * struct ti_sci_handle - Handle returned to TI SCI clients for usage. * @version: structure containing version information * @ops: operations that are made available to TI SCI clients */ struct ti_sci_handle { struct ti_sci_version_info version; struct ti_sci_ops ops; }; #define TI_SCI_RESOURCE_NULL 0xffff /** * struct ti_sci_resource - Structure representing a resource assigned * to a device. * @sets: Number of sets available from this resource type * @lock: Lock to guard the res map in each set. * @desc: Array of resource descriptors. */ struct ti_sci_resource { u16 sets; raw_spinlock_t lock; struct ti_sci_resource_desc *desc; }; #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL) const struct ti_sci_handle *ti_sci_get_handle(struct device *dev); int ti_sci_put_handle(const struct ti_sci_handle *handle); const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev); const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np, const char *property); const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev, const char *property); u16 ti_sci_get_free_resource(struct ti_sci_resource *res); void ti_sci_release_resource(struct ti_sci_resource *res, u16 id); u32 ti_sci_get_num_resources(struct ti_sci_resource *res); struct ti_sci_resource * devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, struct device *dev, u32 dev_id, char *of_prop); struct ti_sci_resource * devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev, u32 dev_id, u32 sub_type); #else /* CONFIG_TI_SCI_PROTOCOL */ static inline const struct ti_sci_handle *ti_sci_get_handle(struct device *dev) { return ERR_PTR(-EINVAL); } static inline int ti_sci_put_handle(const struct ti_sci_handle *handle) { return -EINVAL; } static inline const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev) { return ERR_PTR(-EINVAL); } static inline const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np, const char *property) { return ERR_PTR(-EINVAL); } static inline const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev, const char *property) { return ERR_PTR(-EINVAL); } static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res) { return TI_SCI_RESOURCE_NULL; } static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id) { } static inline u32 ti_sci_get_num_resources(struct ti_sci_resource *res) { return 0; } static inline struct ti_sci_resource * devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, struct device *dev, u32 dev_id, char *of_prop) { return ERR_PTR(-EINVAL); } static inline struct ti_sci_resource * devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev, u32 dev_id, u32 sub_type) { return ERR_PTR(-EINVAL); } #endif /* CONFIG_TI_SCI_PROTOCOL */ #endif /* __TISCI_PROTOCOL_H */ PK ! ��* * soc/ti/knav_qmss.hnu �[��� /* * Keystone Navigator Queue Management Sub-System header * * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com * Author: Sandeep Nair <sandeep_n@ti.com> * Cyril Chemparathy <cyril@ti.com> * Santosh Shilimkar <santosh.shilimkar@ti.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __SOC_TI_KNAV_QMSS_H__ #define __SOC_TI_KNAV_QMSS_H__ #include <linux/err.h> #include <linux/time.h> #include <linux/atomic.h> #include <linux/device.h> #include <linux/fcntl.h> #include <linux/dma-mapping.h> /* queue types */ #define KNAV_QUEUE_QPEND ((unsigned)-2) /* interruptible qpend queue */ #define KNAV_QUEUE_ACC ((unsigned)-3) /* Accumulated queue */ #define KNAV_QUEUE_GP ((unsigned)-4) /* General purpose queue */ /* queue flags */ #define KNAV_QUEUE_SHARED 0x0001 /* Queue can be shared */ /** * enum knav_queue_ctrl_cmd - queue operations. * @KNAV_QUEUE_GET_ID: Get the ID number for an open queue * @KNAV_QUEUE_FLUSH: forcibly empty a queue if possible * @KNAV_QUEUE_SET_NOTIFIER: Set a notifier callback to a queue handle. * @KNAV_QUEUE_ENABLE_NOTIFY: Enable notifier callback for a queue handle. * @KNAV_QUEUE_DISABLE_NOTIFY: Disable notifier callback for a queue handle. * @KNAV_QUEUE_GET_COUNT: Get number of queues. */ enum knav_queue_ctrl_cmd { KNAV_QUEUE_GET_ID, KNAV_QUEUE_FLUSH, KNAV_QUEUE_SET_NOTIFIER, KNAV_QUEUE_ENABLE_NOTIFY, KNAV_QUEUE_DISABLE_NOTIFY, KNAV_QUEUE_GET_COUNT }; /* Queue notifier callback prototype */ typedef void (*knav_queue_notify_fn)(void *arg); /** * struct knav_queue_notify_config: Notifier configuration * @fn: Notifier function * @fn_arg: Notifier function arguments */ struct knav_queue_notify_config { knav_queue_notify_fn fn; void *fn_arg; }; void *knav_queue_open(const char *name, unsigned id, unsigned flags); void knav_queue_close(void *qhandle); int knav_queue_device_control(void *qhandle, enum knav_queue_ctrl_cmd cmd, unsigned long arg); dma_addr_t knav_queue_pop(void *qhandle, unsigned *size); int knav_queue_push(void *qhandle, dma_addr_t dma, unsigned size, unsigned flags); void *knav_pool_create(const char *name, int num_desc, int region_id); void knav_pool_destroy(void *ph); int knav_pool_count(void *ph); void *knav_pool_desc_get(void *ph); void knav_pool_desc_put(void *ph, void *desc); int knav_pool_desc_map(void *ph, void *desc, unsigned size, dma_addr_t *dma, unsigned *dma_sz); void *knav_pool_desc_unmap(void *ph, dma_addr_t dma, unsigned dma_sz); dma_addr_t knav_pool_desc_virt_to_dma(void *ph, void *virt); void *knav_pool_desc_dma_to_virt(void *ph, dma_addr_t dma); bool knav_qmss_device_ready(void); #endif /* __SOC_TI_KNAV_QMSS_H__ */ PK ! =n�w w soc/amlogic/meson-canvas.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2018 BayLibre, SAS */ #ifndef __SOC_MESON_CANVAS_H #define __SOC_MESON_CANVAS_H #include <linux/kernel.h> #define MESON_CANVAS_WRAP_NONE 0x00 #define MESON_CANVAS_WRAP_X 0x01 #define MESON_CANVAS_WRAP_Y 0x02 #define MESON_CANVAS_BLKMODE_LINEAR 0x00 #define MESON_CANVAS_BLKMODE_32x32 0x01 #define MESON_CANVAS_BLKMODE_64x64 0x02 #define MESON_CANVAS_ENDIAN_SWAP16 0x1 #define MESON_CANVAS_ENDIAN_SWAP32 0x3 #define MESON_CANVAS_ENDIAN_SWAP64 0x7 #define MESON_CANVAS_ENDIAN_SWAP128 0xf struct device; struct meson_canvas; /** * meson_canvas_get() - get a canvas provider instance * * @dev: consumer device pointer */ struct meson_canvas *meson_canvas_get(struct device *dev); /** * meson_canvas_alloc() - take ownership of a canvas * * @canvas: canvas provider instance retrieved from meson_canvas_get() * @canvas_index: will be filled with the canvas ID */ int meson_canvas_alloc(struct meson_canvas *canvas, u8 *canvas_index); /** * meson_canvas_free() - remove ownership from a canvas * * @canvas: canvas provider instance retrieved from meson_canvas_get() * @canvas_index: canvas ID that was obtained via meson_canvas_alloc() */ int meson_canvas_free(struct meson_canvas *canvas, u8 canvas_index); /** * meson_canvas_config() - configure a canvas * * @canvas: canvas provider instance retrieved from meson_canvas_get() * @canvas_index: canvas ID that was obtained via meson_canvas_alloc() * @addr: physical address to the pixel buffer * @stride: width of the buffer * @height: height of the buffer * @wrap: undocumented * @blkmode: block mode (linear, 32x32, 64x64) * @endian: byte swapping (swap16, swap32, swap64, swap128) */ int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index, u32 addr, u32 stride, u32 height, unsigned int wrap, unsigned int blkmode, unsigned int endian); #endif PK ! &h ~= = soc/nxp/lpc32xx-misc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Author: Kevin Wells <kevin.wells@nxp.com> * * Copyright (C) 2010 NXP Semiconductors */ #ifndef __SOC_LPC32XX_MISC_H #define __SOC_LPC32XX_MISC_H #include <linux/types.h> #include <linux/phy.h> #ifdef CONFIG_ARCH_LPC32XX extern u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr); extern void lpc32xx_set_phy_interface_mode(phy_interface_t mode); extern void lpc32xx_loopback_set(resource_size_t mapbase, int state); #else static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr) { *mapbase = NULL; *dmaaddr = 0; return 0; } static inline void lpc32xx_set_phy_interface_mode(phy_interface_t mode) { } static inline void lpc32xx_loopback_set(resource_size_t mapbase, int state) { } #endif #endif /* __SOC_LPC32XX_MISC_H */ PK ! R���> > soc/renesas/rcar-rst.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__ #define __LINUX_SOC_RENESAS_RCAR_RST_H__ #ifdef CONFIG_RST_RCAR int rcar_rst_read_mode_pins(u32 *mode); #else static inline int rcar_rst_read_mode_pins(u32 *mode) { return -ENODEV; } #endif #endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */ PK ! �[�� soc/renesas/rcar-sysc.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SOC_RENESAS_RCAR_SYSC_H__ #define __LINUX_SOC_RENESAS_RCAR_SYSC_H__ int rcar_sysc_power_down_cpu(unsigned int cpu); int rcar_sysc_power_up_cpu(unsigned int cpu); #endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */ PK ! �E_�, , soc/marvell/octeontx2/asm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only * Copyright (C) 2020 Marvell. */ #ifndef __SOC_OTX2_ASM_H #define __SOC_OTX2_ASM_H #include <linux/types.h> #if defined(CONFIG_ARM64) /* * otx2_lmt_flush is used for LMT store operation. * On octeontx2 platform CPT instruction enqueue and * NIX packet send are only possible via LMTST * operations and it uses LDEOR instruction targeting * the coprocessor address. */ #define otx2_lmt_flush(ioaddr) \ ({ \ u64 result = 0; \ __asm__ volatile(".cpu generic+lse\n" \ "ldeor xzr, %x[rf], [%[rs]]" \ : [rf]"=r" (result) \ : [rs]"r" (ioaddr)); \ (result); \ }) /* * STEORL store to memory with release semantics. * This will avoid using DMB barrier after each LMTST * operation. */ #define cn10k_lmt_flush(val, addr) \ ({ \ __asm__ volatile(".cpu generic+lse\n" \ "steorl %x[rf],[%[rs]]" \ : [rf] "+r"(val) \ : [rs] "r"(addr)); \ }) static inline u64 otx2_atomic64_fetch_add(u64 incr, u64 *ptr) { u64 result; asm volatile (".cpu generic+lse\n" "ldadda %x[i], %x[r], [%[b]]" : [r] "=r" (result), "+m" (*ptr) : [i] "r" (incr), [b] "r" (ptr) : "memory"); return result; } #else #define otx2_lmt_flush(ioaddr) ({ 0; }) #define cn10k_lmt_flush(val, addr) ({ addr = val; }) #define otx2_atomic64_fetch_add(incr, ptr) ({ incr; }) #endif #endif /* __SOC_OTX2_ASM_H */ PK ! IL}� � soc/cirrus/ep93xx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _SOC_EP93XX_H #define _SOC_EP93XX_H struct platform_device; #define EP93XX_CHIP_REV_D0 3 #define EP93XX_CHIP_REV_D1 4 #define EP93XX_CHIP_REV_E0 5 #define EP93XX_CHIP_REV_E1 6 #define EP93XX_CHIP_REV_E2 7 #ifdef CONFIG_ARCH_EP93XX int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); void ep93xx_pwm_release_gpio(struct platform_device *pdev); int ep93xx_ide_acquire_gpio(struct platform_device *pdev); void ep93xx_ide_release_gpio(struct platform_device *pdev); int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); void ep93xx_keypad_release_gpio(struct platform_device *pdev); int ep93xx_i2s_acquire(void); void ep93xx_i2s_release(void); unsigned int ep93xx_chip_revision(void); #else static inline int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) { return 0; } static inline void ep93xx_pwm_release_gpio(struct platform_device *pdev) {} static inline int ep93xx_ide_acquire_gpio(struct platform_device *pdev) { return 0; } static inline void ep93xx_ide_release_gpio(struct platform_device *pdev) {} static inline int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) { return 0; } static inline void ep93xx_keypad_release_gpio(struct platform_device *pdev) {} static inline int ep93xx_i2s_acquire(void) { return 0; } static inline void ep93xx_i2s_release(void) {} static inline unsigned int ep93xx_chip_revision(void) { return 0; } #endif #endif PK ! I�E E soc/mmp/cputype.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_MACH_CPUTYPE_H #define __ASM_MACH_CPUTYPE_H #if defined(CONFIG_ARM) || defined(CONFIG_ARM64) #include <asm/cputype.h> #endif /* * CPU Stepping CPU_ID CHIP_ID * * PXA168 S0 0x56158400 0x0000C910 * PXA168 A0 0x56158400 0x00A0A168 * PXA910 Y1 0x56158400 0x00F2C920 * PXA910 A0 0x56158400 0x00F2C910 * PXA910 A1 0x56158400 0x00A0C910 * PXA920 Y0 0x56158400 0x00F2C920 * PXA920 A0 0x56158400 0x00A0C920 * PXA920 A1 0x56158400 0x00A1C920 * MMP2 Z0 0x560f5811 0x00F00410 * MMP2 Z1 0x560f5811 0x00E00410 * MMP2 A0 0x560f5811 0x00A0A610 * MMP3 A0 0x562f5842 0x00A02128 * MMP3 B0 0x562f5842 0x00B02128 */ extern unsigned int mmp_chip_id; #ifdef CONFIG_CPU_PXA168 static inline int cpu_is_pxa168(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && ((mmp_chip_id & 0xfff) == 0x168); } #else #define cpu_is_pxa168() (0) #endif /* cpu_is_pxa910() is shared on both pxa910 and pxa920 */ #ifdef CONFIG_CPU_PXA910 static inline int cpu_is_pxa910(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && (((mmp_chip_id & 0xfff) == 0x910) || ((mmp_chip_id & 0xfff) == 0x920)); } #else #define cpu_is_pxa910() (0) #endif #if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT) static inline int cpu_is_mmp2(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && (((mmp_chip_id & 0xfff) == 0x410) || ((mmp_chip_id & 0xfff) == 0x610)); } #else #define cpu_is_mmp2() (0) #endif #ifdef CONFIG_MACH_MMP3_DT static inline int cpu_is_mmp3(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && ((mmp_chip_id & 0xffff) == 0x2128); } static inline int cpu_is_mmp3_a0(void) { return (cpu_is_mmp3() && ((mmp_chip_id & 0x00ff0000) == 0x00a00000)); } static inline int cpu_is_mmp3_b0(void) { return (cpu_is_mmp3() && ((mmp_chip_id & 0x00ff0000) == 0x00b00000)); } #else #define cpu_is_mmp3() (0) #define cpu_is_mmp3_a0() (0) #define cpu_is_mmp3_b0() (0) #endif #endif /* __ASM_MACH_CPUTYPE_H */ PK ! � �e� � soc/qcom/wcnss_ctrl.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __WCNSS_CTRL_H__ #define __WCNSS_CTRL_H__ #include <linux/rpmsg.h> #if IS_ENABLED(CONFIG_QCOM_WCNSS_CTRL) struct rpmsg_endpoint *qcom_wcnss_open_channel(void *wcnss, const char *name, rpmsg_rx_cb_t cb, void *priv); #else static struct rpmsg_endpoint *qcom_wcnss_open_channel(void *wcnss, const char *name, rpmsg_rx_cb_t cb, void *priv) { WARN_ON(1); return ERR_PTR(-ENXIO); } #endif #endif PK ! ��H�� � soc/qcom/apr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __QCOM_APR_H_ #define __QCOM_APR_H_ #include <linux/spinlock.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #include <dt-bindings/soc/qcom,apr.h> extern struct bus_type aprbus; #define APR_HDR_LEN(hdr_len) ((hdr_len)/4) /* * HEADER field * version:0:3 * header_size : 4:7 * message_type : 8:9 * reserved: 10:15 */ #define APR_HDR_FIELD(msg_type, hdr_len, ver)\ (((msg_type & 0x3) << 8) | ((hdr_len & 0xF) << 4) | (ver & 0xF)) #define APR_HDR_SIZE sizeof(struct apr_hdr) #define APR_SEQ_CMD_HDR_FIELD APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, \ APR_HDR_LEN(APR_HDR_SIZE), \ APR_PKT_VER) /* Version */ #define APR_PKT_VER 0x0 /* Command and Response Types */ #define APR_MSG_TYPE_EVENT 0x0 #define APR_MSG_TYPE_CMD_RSP 0x1 #define APR_MSG_TYPE_SEQ_CMD 0x2 #define APR_MSG_TYPE_NSEQ_CMD 0x3 #define APR_MSG_TYPE_MAX 0x04 /* APR Basic Response Message */ #define APR_BASIC_RSP_RESULT 0x000110E8 #define APR_RSP_ACCEPTED 0x000100BE struct aprv2_ibasic_rsp_result_t { uint32_t opcode; uint32_t status; }; /* hdr field Ver [0:3], Size [4:7], Message type [8:10] */ #define APR_HDR_FIELD_VER(h) (h & 0x000F) #define APR_HDR_FIELD_SIZE(h) ((h & 0x00F0) >> 4) #define APR_HDR_FIELD_SIZE_BYTES(h) (((h & 0x00F0) >> 4) * 4) #define APR_HDR_FIELD_MT(h) ((h & 0x0300) >> 8) struct apr_hdr { uint16_t hdr_field; uint16_t pkt_size; uint8_t src_svc; uint8_t src_domain; uint16_t src_port; uint8_t dest_svc; uint8_t dest_domain; uint16_t dest_port; uint32_t token; uint32_t opcode; } __packed; struct apr_pkt { struct apr_hdr hdr; uint8_t payload[]; }; struct apr_resp_pkt { struct apr_hdr hdr; void *payload; int payload_size; }; /* Bits 0 to 15 -- Minor version, Bits 16 to 31 -- Major version */ #define APR_SVC_MAJOR_VERSION(v) ((v >> 16) & 0xFF) #define APR_SVC_MINOR_VERSION(v) (v & 0xFF) struct packet_router; struct pkt_router_svc { struct device *dev; struct packet_router *pr; spinlock_t lock; int id; void *priv; }; struct apr_device { struct device dev; uint16_t svc_id; uint16_t domain_id; uint32_t version; char name[APR_NAME_SIZE]; const char *service_path; struct pkt_router_svc svc; struct list_head node; }; #define to_apr_device(d) container_of(d, struct apr_device, dev) #define svc_to_apr_device(d) container_of(d, struct apr_device, svc) struct apr_driver { int (*probe)(struct apr_device *sl); int (*remove)(struct apr_device *sl); int (*callback)(struct apr_device *a, struct apr_resp_pkt *d); struct device_driver driver; const struct apr_device_id *id_table; }; #define to_apr_driver(d) container_of(d, struct apr_driver, driver) /* * use a macro to avoid include chaining to get THIS_MODULE */ #define apr_driver_register(drv) __apr_driver_register(drv, THIS_MODULE) int __apr_driver_register(struct apr_driver *drv, struct module *owner); void apr_driver_unregister(struct apr_driver *drv); /** * module_apr_driver() - Helper macro for registering a aprbus driver * @__apr_driver: apr_driver struct * * Helper macro for aprbus drivers which do not do anything special in * module init/exit. This eliminates a lot of boilerplate. Each module * may only use this macro once, and calling it replaces module_init() * and module_exit() */ #define module_apr_driver(__apr_driver) \ module_driver(__apr_driver, apr_driver_register, \ apr_driver_unregister) int apr_send_pkt(struct apr_device *adev, struct apr_pkt *pkt); #endif /* __QCOM_APR_H_ */ PK ! �q)mf f soc/qcom/mdt_loader.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __QCOM_MDT_LOADER_H__ #define __QCOM_MDT_LOADER_H__ #include <linux/types.h> #define QCOM_MDT_TYPE_MASK (7 << 24) #define QCOM_MDT_TYPE_HASH (2 << 24) #define QCOM_MDT_RELOCATABLE BIT(27) struct device; struct firmware; #if IS_ENABLED(CONFIG_QCOM_MDT_LOADER) ssize_t qcom_mdt_get_size(const struct firmware *fw); int qcom_mdt_load(struct device *dev, const struct firmware *fw, const char *fw_name, int pas_id, void *mem_region, phys_addr_t mem_phys, size_t mem_size, phys_addr_t *reloc_base); int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw, const char *fw_name, int pas_id, void *mem_region, phys_addr_t mem_phys, size_t mem_size, phys_addr_t *reloc_base); void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len); #else /* !IS_ENABLED(CONFIG_QCOM_MDT_LOADER) */ static inline ssize_t qcom_mdt_get_size(const struct firmware *fw) { return -ENODEV; } static inline int qcom_mdt_load(struct device *dev, const struct firmware *fw, const char *fw_name, int pas_id, void *mem_region, phys_addr_t mem_phys, size_t mem_size, phys_addr_t *reloc_base) { return -ENODEV; } static inline int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw, const char *fw_name, int pas_id, void *mem_region, phys_addr_t mem_phys, size_t mem_size, phys_addr_t *reloc_base) { return -ENODEV; } static inline void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len) { return ERR_PTR(-ENODEV); } #endif /* !IS_ENABLED(CONFIG_QCOM_MDT_LOADER) */ #endif PK ! I���� � soc/qcom/smd-rpm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __QCOM_SMD_RPM_H__ #define __QCOM_SMD_RPM_H__ struct qcom_smd_rpm; #define QCOM_SMD_RPM_ACTIVE_STATE 0 #define QCOM_SMD_RPM_SLEEP_STATE 1 /* * Constants used for addressing resources in the RPM. */ #define QCOM_SMD_RPM_BBYB 0x62796262 #define QCOM_SMD_RPM_BOBB 0x62626f62 #define QCOM_SMD_RPM_BOOST 0x61747362 #define QCOM_SMD_RPM_BUS_CLK 0x316b6c63 #define QCOM_SMD_RPM_BUS_MASTER 0x73616d62 #define QCOM_SMD_RPM_BUS_SLAVE 0x766c7362 #define QCOM_SMD_RPM_CLK_BUF_A 0x616B6C63 #define QCOM_SMD_RPM_LDOA 0x616f646c #define QCOM_SMD_RPM_LDOB 0x626F646C #define QCOM_SMD_RPM_RWCX 0x78637772 #define QCOM_SMD_RPM_RWMX 0x786d7772 #define QCOM_SMD_RPM_RWLC 0x636c7772 #define QCOM_SMD_RPM_RWLM 0x6d6c7772 #define QCOM_SMD_RPM_MEM_CLK 0x326b6c63 #define QCOM_SMD_RPM_MISC_CLK 0x306b6c63 #define QCOM_SMD_RPM_NCPA 0x6170636E #define QCOM_SMD_RPM_NCPB 0x6270636E #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 #define QCOM_SMD_RPM_QUP_CLK 0x707571 #define QCOM_SMD_RPM_SMPA 0x61706d73 #define QCOM_SMD_RPM_SMPB 0x62706d73 #define QCOM_SMD_RPM_SPDM 0x63707362 #define QCOM_SMD_RPM_VSA 0x00617376 #define QCOM_SMD_RPM_MMAXI_CLK 0x69786d6d #define QCOM_SMD_RPM_IPA_CLK 0x617069 #define QCOM_SMD_RPM_CE_CLK 0x6563 #define QCOM_SMD_RPM_AGGR_CLK 0x72676761 int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, u32 resource_type, u32 resource_id, void *buf, size_t count); #endif PK ! ��� * * soc/qcom/qmi.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * Copyright (c) 2017, Linaro Ltd. */ #ifndef __QMI_HELPERS_H__ #define __QMI_HELPERS_H__ #include <linux/completion.h> #include <linux/idr.h> #include <linux/list.h> #include <linux/qrtr.h> #include <linux/types.h> #include <linux/workqueue.h> struct socket; /** * struct qmi_header - wireformat header of QMI messages * @type: type of message * @txn_id: transaction id * @msg_id: message id * @msg_len: length of message payload following header */ struct qmi_header { u8 type; u16 txn_id; u16 msg_id; u16 msg_len; } __packed; #define QMI_REQUEST 0 #define QMI_RESPONSE 2 #define QMI_INDICATION 4 #define QMI_COMMON_TLV_TYPE 0 enum qmi_elem_type { QMI_EOTI, QMI_OPT_FLAG, QMI_DATA_LEN, QMI_UNSIGNED_1_BYTE, QMI_UNSIGNED_2_BYTE, QMI_UNSIGNED_4_BYTE, QMI_UNSIGNED_8_BYTE, QMI_SIGNED_2_BYTE_ENUM, QMI_SIGNED_4_BYTE_ENUM, QMI_STRUCT, QMI_STRING, }; enum qmi_array_type { NO_ARRAY, STATIC_ARRAY, VAR_LEN_ARRAY, }; /** * struct qmi_elem_info - describes how to encode a single QMI element * @data_type: Data type of this element. * @elem_len: Array length of this element, if an array. * @elem_size: Size of a single instance of this data type. * @array_type: Array type of this element. * @tlv_type: QMI message specific type to identify which element * is present in an incoming message. * @offset: Specifies the offset of the first instance of this * element in the data structure. * @ei_array: Null-terminated array of @qmi_elem_info to describe nested * structures. */ struct qmi_elem_info { enum qmi_elem_type data_type; u32 elem_len; u32 elem_size; enum qmi_array_type array_type; u8 tlv_type; u32 offset; struct qmi_elem_info *ei_array; }; #define QMI_RESULT_SUCCESS_V01 0 #define QMI_RESULT_FAILURE_V01 1 #define QMI_ERR_NONE_V01 0 #define QMI_ERR_MALFORMED_MSG_V01 1 #define QMI_ERR_NO_MEMORY_V01 2 #define QMI_ERR_INTERNAL_V01 3 #define QMI_ERR_CLIENT_IDS_EXHAUSTED_V01 5 #define QMI_ERR_INVALID_ID_V01 41 #define QMI_ERR_ENCODING_V01 58 #define QMI_ERR_DISABLED_V01 69 #define QMI_ERR_INCOMPATIBLE_STATE_V01 90 #define QMI_ERR_NOT_SUPPORTED_V01 94 /** * struct qmi_response_type_v01 - common response header (decoded) * @result: result of the transaction * @error: error value, when @result is QMI_RESULT_FAILURE_V01 */ struct qmi_response_type_v01 { u16 result; u16 error; }; extern struct qmi_elem_info qmi_response_type_v01_ei[]; /** * struct qmi_service - context to track lookup-results * @service: service type * @version: version of the @service * @instance: instance id of the @service * @node: node of the service * @port: port of the service * @priv: handle for client's use * @list_node: list_head for house keeping */ struct qmi_service { unsigned int service; unsigned int version; unsigned int instance; unsigned int node; unsigned int port; void *priv; struct list_head list_node; }; struct qmi_handle; /** * struct qmi_ops - callbacks for qmi_handle * @new_server: inform client of a new_server lookup-result, returning * successfully from this call causes the library to call * @del_server as the service is removed from the * lookup-result. @priv of the qmi_service can be used by * the client * @del_server: inform client of a del_server lookup-result * @net_reset: inform client that the name service was restarted and * that and any state needs to be released * @msg_handler: invoked for incoming messages, allows a client to * override the usual QMI message handler * @bye: inform a client that all clients from a node are gone * @del_client: inform a client that a particular client is gone */ struct qmi_ops { int (*new_server)(struct qmi_handle *qmi, struct qmi_service *svc); void (*del_server)(struct qmi_handle *qmi, struct qmi_service *svc); void (*net_reset)(struct qmi_handle *qmi); void (*msg_handler)(struct qmi_handle *qmi, struct sockaddr_qrtr *sq, const void *data, size_t count); void (*bye)(struct qmi_handle *qmi, unsigned int node); void (*del_client)(struct qmi_handle *qmi, unsigned int node, unsigned int port); }; /** * struct qmi_txn - transaction context * @qmi: QMI handle this transaction is associated with * @id: transaction id * @lock: for synchronization between handler and waiter of messages * @completion: completion object as the transaction receives a response * @result: result code for the completed transaction * @ei: description of the QMI encoded response (optional) * @dest: destination buffer to decode message into (optional) */ struct qmi_txn { struct qmi_handle *qmi; u16 id; struct mutex lock; struct completion completion; int result; struct qmi_elem_info *ei; void *dest; }; /** * struct qmi_msg_handler - description of QMI message handler * @type: type of message * @msg_id: message id * @ei: description of the QMI encoded message * @decoded_size: size of the decoded object * @fn: function to invoke as the message is decoded */ struct qmi_msg_handler { unsigned int type; unsigned int msg_id; struct qmi_elem_info *ei; size_t decoded_size; void (*fn)(struct qmi_handle *qmi, struct sockaddr_qrtr *sq, struct qmi_txn *txn, const void *decoded); }; /** * struct qmi_handle - QMI context * @sock: socket handle * @sock_lock: synchronization of @sock modifications * @sq: sockaddr of @sock * @work: work for handling incoming messages * @wq: workqueue to post @work on * @recv_buf: scratch buffer for handling incoming messages * @recv_buf_size: size of @recv_buf * @lookups: list of registered lookup requests * @lookup_results: list of lookup-results advertised to the client * @services: list of registered services (by this client) * @ops: reference to callbacks * @txns: outstanding transactions * @txn_lock: lock for modifications of @txns * @handlers: list of handlers for incoming messages */ struct qmi_handle { struct socket *sock; struct mutex sock_lock; struct sockaddr_qrtr sq; struct work_struct work; struct workqueue_struct *wq; void *recv_buf; size_t recv_buf_size; struct list_head lookups; struct list_head lookup_results; struct list_head services; struct qmi_ops ops; struct idr txns; struct mutex txn_lock; const struct qmi_msg_handler *handlers; }; int qmi_add_lookup(struct qmi_handle *qmi, unsigned int service, unsigned int version, unsigned int instance); int qmi_add_server(struct qmi_handle *qmi, unsigned int service, unsigned int version, unsigned int instance); int qmi_handle_init(struct qmi_handle *qmi, size_t max_msg_len, const struct qmi_ops *ops, const struct qmi_msg_handler *handlers); void qmi_handle_release(struct qmi_handle *qmi); ssize_t qmi_send_request(struct qmi_handle *qmi, struct sockaddr_qrtr *sq, struct qmi_txn *txn, int msg_id, size_t len, struct qmi_elem_info *ei, const void *c_struct); ssize_t qmi_send_response(struct qmi_handle *qmi, struct sockaddr_qrtr *sq, struct qmi_txn *txn, int msg_id, size_t len, struct qmi_elem_info *ei, const void *c_struct); ssize_t qmi_send_indication(struct qmi_handle *qmi, struct sockaddr_qrtr *sq, int msg_id, size_t len, struct qmi_elem_info *ei, const void *c_struct); void *qmi_encode_message(int type, unsigned int msg_id, size_t *len, unsigned int txn_id, struct qmi_elem_info *ei, const void *c_struct); int qmi_decode_message(const void *buf, size_t len, struct qmi_elem_info *ei, void *c_struct); int qmi_txn_init(struct qmi_handle *qmi, struct qmi_txn *txn, struct qmi_elem_info *ei, void *c_struct); int qmi_txn_wait(struct qmi_txn *txn, unsigned long timeout); void qmi_txn_cancel(struct qmi_txn *txn); #endif PK ! �o� � soc/qcom/qcom_aoss.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2021, The Linux Foundation. All rights reserved. */ #ifndef __QCOM_AOSS_H__ #define __QCOM_AOSS_H__ #include <linux/err.h> #include <linux/device.h> struct qmp; #if IS_ENABLED(CONFIG_QCOM_AOSS_QMP) int qmp_send(struct qmp *qmp, const void *data, size_t len); struct qmp *qmp_get(struct device *dev); void qmp_put(struct qmp *qmp); #else static inline int qmp_send(struct qmp *qmp, const void *data, size_t len) { return -ENODEV; } static inline struct qmp *qmp_get(struct device *dev) { return ERR_PTR(-ENODEV); } static inline void qmp_put(struct qmp *qmp) { } #endif #endif PK ! r��. . soc/qcom/pdr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __QCOM_PDR_HELPER__ #define __QCOM_PDR_HELPER__ #include <linux/soc/qcom/qmi.h> #define SERVREG_NAME_LENGTH 64 struct pdr_service; struct pdr_handle; enum servreg_service_state { SERVREG_LOCATOR_ERR = 0x1, SERVREG_SERVICE_STATE_DOWN = 0x0FFFFFFF, SERVREG_SERVICE_STATE_UP = 0x1FFFFFFF, SERVREG_SERVICE_STATE_EARLY_DOWN = 0x2FFFFFFF, SERVREG_SERVICE_STATE_UNINIT = 0x7FFFFFFF, }; struct pdr_handle *pdr_handle_alloc(void (*status)(int state, char *service_path, void *priv), void *priv); struct pdr_service *pdr_add_lookup(struct pdr_handle *pdr, const char *service_name, const char *service_path); int pdr_restart_pd(struct pdr_handle *pdr, struct pdr_service *pds); void pdr_handle_release(struct pdr_handle *pdr); #endif PK ! 5�5u\ \ soc/qcom/smem.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __QCOM_SMEM_H__ #define __QCOM_SMEM_H__ #define QCOM_SMEM_HOST_ANY -1 int qcom_smem_alloc(unsigned host, unsigned item, size_t size); void *qcom_smem_get(unsigned host, unsigned item, size_t *size); int qcom_smem_get_free_space(unsigned host); phys_addr_t qcom_smem_virt_to_phys(void *p); #endif PK ! q�WD D soc/qcom/smem_state.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __QCOM_SMEM_STATE__ #define __QCOM_SMEM_STATE__ #include <linux/err.h> struct device_node; struct qcom_smem_state; struct qcom_smem_state_ops { int (*update_bits)(void *, u32, u32); }; #ifdef CONFIG_QCOM_SMEM_STATE struct qcom_smem_state *qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit); struct qcom_smem_state *devm_qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit); void qcom_smem_state_put(struct qcom_smem_state *); int qcom_smem_state_update_bits(struct qcom_smem_state *state, u32 mask, u32 value); struct qcom_smem_state *qcom_smem_state_register(struct device_node *of_node, const struct qcom_smem_state_ops *ops, void *data); void qcom_smem_state_unregister(struct qcom_smem_state *state); #else static inline struct qcom_smem_state *qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit) { return ERR_PTR(-EINVAL); } static inline struct qcom_smem_state *devm_qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit) { return ERR_PTR(-EINVAL); } static inline void qcom_smem_state_put(struct qcom_smem_state *state) { } static inline int qcom_smem_state_update_bits(struct qcom_smem_state *state, u32 mask, u32 value) { return -EINVAL; } static inline struct qcom_smem_state *qcom_smem_state_register(struct device_node *of_node, const struct qcom_smem_state_ops *ops, void *data) { return ERR_PTR(-EINVAL); } static inline void qcom_smem_state_unregister(struct qcom_smem_state *state) { } #endif #endif PK ! L���D D soc/qcom/llcc-qcom.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * */ #include <linux/platform_device.h> #ifndef __LLCC_QCOM__ #define __LLCC_QCOM__ #define LLCC_CPUSS 1 #define LLCC_VIDSC0 2 #define LLCC_VIDSC1 3 #define LLCC_ROTATOR 4 #define LLCC_VOICE 5 #define LLCC_AUDIO 6 #define LLCC_MDMHPGRW 7 #define LLCC_MDM 8 #define LLCC_MODHW 9 #define LLCC_CMPT 10 #define LLCC_GPUHTW 11 #define LLCC_GPU 12 #define LLCC_MMUHWT 13 #define LLCC_CMPTDMA 15 #define LLCC_DISP 16 #define LLCC_VIDFW 17 #define LLCC_MDMHPFX 20 #define LLCC_MDMPNG 21 #define LLCC_AUDHW 22 #define LLCC_NPU 23 #define LLCC_WLHW 24 #define LLCC_CVP 28 #define LLCC_MODPE 29 #define LLCC_APTCM 30 #define LLCC_WRCACHE 31 /** * struct llcc_slice_desc - Cache slice descriptor * @slice_id: llcc slice id * @slice_size: Size allocated for the llcc slice */ struct llcc_slice_desc { u32 slice_id; size_t slice_size; }; /** * struct llcc_edac_reg_data - llcc edac registers data for each error type * @name: Name of the error * @synd_reg: Syndrome register address * @count_status_reg: Status register address to read the error count * @ways_status_reg: Status register address to read the error ways * @reg_cnt: Number of registers * @count_mask: Mask value to get the error count * @ways_mask: Mask value to get the error ways * @count_shift: Shift value to get the error count * @ways_shift: Shift value to get the error ways */ struct llcc_edac_reg_data { char *name; u64 synd_reg; u64 count_status_reg; u64 ways_status_reg; u32 reg_cnt; u32 count_mask; u32 ways_mask; u8 count_shift; u8 ways_shift; }; /** * struct llcc_drv_data - Data associated with the llcc driver * @regmap: regmap associated with the llcc device * @bcast_regmap: regmap associated with llcc broadcast offset * @cfg: pointer to the data structure for slice configuration * @lock: mutex associated with each slice * @cfg_size: size of the config data table * @max_slices: max slices as read from device tree * @num_banks: Number of llcc banks * @bitmap: Bit map to track the active slice ids * @offsets: Pointer to the bank offsets array * @ecc_irq: interrupt for llcc cache error detection and reporting * @major_version: Indicates the LLCC major version */ struct llcc_drv_data { struct regmap *regmap; struct regmap *bcast_regmap; const struct llcc_slice_config *cfg; struct mutex lock; u32 cfg_size; u32 max_slices; u32 num_banks; unsigned long *bitmap; u32 *offsets; int ecc_irq; u32 major_version; }; #if IS_ENABLED(CONFIG_QCOM_LLCC) /** * llcc_slice_getd - get llcc slice descriptor * @uid: usecase_id of the client */ struct llcc_slice_desc *llcc_slice_getd(u32 uid); /** * llcc_slice_putd - llcc slice descritpor * @desc: Pointer to llcc slice descriptor */ void llcc_slice_putd(struct llcc_slice_desc *desc); /** * llcc_get_slice_id - get slice id * @desc: Pointer to llcc slice descriptor */ int llcc_get_slice_id(struct llcc_slice_desc *desc); /** * llcc_get_slice_size - llcc slice size * @desc: Pointer to llcc slice descriptor */ size_t llcc_get_slice_size(struct llcc_slice_desc *desc); /** * llcc_slice_activate - Activate the llcc slice * @desc: Pointer to llcc slice descriptor */ int llcc_slice_activate(struct llcc_slice_desc *desc); /** * llcc_slice_deactivate - Deactivate the llcc slice * @desc: Pointer to llcc slice descriptor */ int llcc_slice_deactivate(struct llcc_slice_desc *desc); #else static inline struct llcc_slice_desc *llcc_slice_getd(u32 uid) { return NULL; } static inline void llcc_slice_putd(struct llcc_slice_desc *desc) { }; static inline int llcc_get_slice_id(struct llcc_slice_desc *desc) { return -EINVAL; } static inline size_t llcc_get_slice_size(struct llcc_slice_desc *desc) { return 0; } static inline int llcc_slice_activate(struct llcc_slice_desc *desc) { return -EINVAL; } static inline int llcc_slice_deactivate(struct llcc_slice_desc *desc) { return -EINVAL; } #endif #endif PK ! ͒�M M soc/qcom/irq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __QCOM_IRQ_H #define __QCOM_IRQ_H #include <linux/irqdomain.h> #define GPIO_NO_WAKE_IRQ ~0U /* * QCOM specific IRQ domain flags that distinguishes the handling of wakeup * capable interrupts by different interrupt controllers. * * IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP: Line must be masked at TLMM and the * interrupt configuration is done at PDC * IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP: Interrupt configuration is handled at TLMM */ #define IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 0) #define IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 1) /** * irq_domain_qcom_handle_wakeup: Return if the domain handles interrupt * configuration * @d: irq domain * * This QCOM specific irq domain call returns if the interrupt controller * requires the interrupt be masked at the child interrupt controller. */ static inline bool irq_domain_qcom_handle_wakeup(const struct irq_domain *d) { return (d->flags & IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP); } #endif PK ! ǰ�Б � power/bq24735-charger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* */ #ifndef __CHARGER_BQ24735_H_ #define __CHARGER_BQ24735_H_ #include <linux/types.h> #include <linux/power_supply.h> struct bq24735_platform { uint32_t charge_current; uint32_t charge_voltage; uint32_t input_current; const char *name; bool ext_control; char **supplied_to; size_t num_supplicants; }; #endif /* __CHARGER_BQ24735_H_ */ PK ! �8�ld d power/max17042_battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Fuel gauge driver for Maxim 17042 / 8966 / 8997 * Note that Maxim 8966 and 8997 are mfd and this is its subdevice. * * Copyright (C) 2011 Samsung Electronics * MyungJoo Ham <myungjoo.ham@samsung.com> */ #ifndef __MAX17042_BATTERY_H_ #define __MAX17042_BATTERY_H_ #define MAX17042_STATUS_BattAbsent (1 << 3) #define MAX17042_BATTERY_FULL (95) /* Recommend. FullSOCThr value */ #define MAX17042_DEFAULT_SNS_RESISTOR (10000) #define MAX17042_DEFAULT_VMIN (3000) #define MAX17042_DEFAULT_VMAX (4500) /* LiHV cell max */ #define MAX17042_DEFAULT_TEMP_MIN (0) /* For sys without temp sensor */ #define MAX17042_DEFAULT_TEMP_MAX (700) /* 70 degrees Celcius */ /* Consider RepCap which is less then 10 units below FullCAP full */ #define MAX17042_FULL_THRESHOLD 10 #define MAX17042_CHARACTERIZATION_DATA_SIZE 48 enum max17042_register { MAX17042_STATUS = 0x00, MAX17042_VALRT_Th = 0x01, MAX17042_TALRT_Th = 0x02, MAX17042_SALRT_Th = 0x03, MAX17042_AtRate = 0x04, MAX17042_RepCap = 0x05, MAX17042_RepSOC = 0x06, MAX17042_Age = 0x07, MAX17042_TEMP = 0x08, MAX17042_VCELL = 0x09, MAX17042_Current = 0x0A, MAX17042_AvgCurrent = 0x0B, MAX17042_SOC = 0x0D, MAX17042_AvSOC = 0x0E, MAX17042_RemCap = 0x0F, MAX17042_FullCAP = 0x10, MAX17042_TTE = 0x11, MAX17042_V_empty = 0x12, MAX17042_RSLOW = 0x14, MAX17042_AvgTA = 0x16, MAX17042_Cycles = 0x17, MAX17042_DesignCap = 0x18, MAX17042_AvgVCELL = 0x19, MAX17042_MinMaxTemp = 0x1A, MAX17042_MinMaxVolt = 0x1B, MAX17042_MinMaxCurr = 0x1C, MAX17042_CONFIG = 0x1D, MAX17042_ICHGTerm = 0x1E, MAX17042_AvCap = 0x1F, MAX17042_ManName = 0x20, MAX17042_DevName = 0x21, MAX17042_FullCAPNom = 0x23, MAX17042_TempNom = 0x24, MAX17042_TempLim = 0x25, MAX17042_TempHot = 0x26, MAX17042_AIN = 0x27, MAX17042_LearnCFG = 0x28, MAX17042_FilterCFG = 0x29, MAX17042_RelaxCFG = 0x2A, MAX17042_MiscCFG = 0x2B, MAX17042_TGAIN = 0x2C, MAX17042_TOFF = 0x2D, MAX17042_CGAIN = 0x2E, MAX17042_COFF = 0x2F, MAX17042_MaskSOC = 0x32, MAX17042_SOC_empty = 0x33, MAX17042_T_empty = 0x34, MAX17042_FullCAP0 = 0x35, MAX17042_LAvg_empty = 0x36, MAX17042_FCTC = 0x37, MAX17042_RCOMP0 = 0x38, MAX17042_TempCo = 0x39, MAX17042_EmptyTempCo = 0x3A, MAX17042_K_empty0 = 0x3B, MAX17042_TaskPeriod = 0x3C, MAX17042_FSTAT = 0x3D, MAX17042_SHDNTIMER = 0x3F, MAX17042_dQacc = 0x45, MAX17042_dPacc = 0x46, MAX17042_VFSOC0 = 0x48, MAX17042_QH = 0x4D, MAX17042_QL = 0x4E, MAX17042_VFSOC0Enable = 0x60, MAX17042_MLOCKReg1 = 0x62, MAX17042_MLOCKReg2 = 0x63, MAX17042_MODELChrTbl = 0x80, MAX17042_OCV = 0xEE, MAX17042_OCVInternal = 0xFB, /* MAX17055 VFOCV */ MAX17042_VFSOC = 0xFF, }; /* Registers specific to max17055 only */ enum max17055_register { MAX17055_QRes = 0x0C, MAX17055_RCell = 0x14, MAX17055_TTF = 0x20, MAX17055_DieTemp = 0x34, MAX17055_USER_MEM = 0x40, MAX17055_RGAIN = 0x43, MAX17055_ConvgCfg = 0x49, MAX17055_VFRemCap = 0x4A, MAX17055_STATUS2 = 0xB0, MAX17055_POWER = 0xB1, MAX17055_ID = 0xB2, MAX17055_AvgPower = 0xB3, MAX17055_IAlrtTh = 0xB4, MAX17055_TTFCfg = 0xB5, MAX17055_CVMixCap = 0xB6, MAX17055_CVHalfTime = 0xB7, MAX17055_CGTempCo = 0xB8, MAX17055_Curve = 0xB9, MAX17055_HibCfg = 0xBA, MAX17055_Config2 = 0xBB, MAX17055_VRipple = 0xBC, MAX17055_RippleCfg = 0xBD, MAX17055_TimerH = 0xBE, MAX17055_RSense = 0xD0, MAX17055_ScOcvLim = 0xD1, MAX17055_SOCHold = 0xD3, MAX17055_MaxPeakPwr = 0xD4, MAX17055_SusPeakPwr = 0xD5, MAX17055_PackResistance = 0xD6, MAX17055_SysResistance = 0xD7, MAX17055_MinSysV = 0xD8, MAX17055_MPPCurrent = 0xD9, MAX17055_SPPCurrent = 0xDA, MAX17055_ModelCfg = 0xDB, MAX17055_AtQResidual = 0xDC, MAX17055_AtTTE = 0xDD, MAX17055_AtAvSOC = 0xDE, MAX17055_AtAvCap = 0xDF, }; /* Registers specific to max17047/50/55 */ enum max17047_register { MAX17047_QRTbl00 = 0x12, MAX17047_FullSOCThr = 0x13, MAX17047_QRTbl10 = 0x22, MAX17047_QRTbl20 = 0x32, MAX17047_V_empty = 0x3A, MAX17047_TIMER = 0x3E, MAX17047_QRTbl30 = 0x42, }; enum max170xx_chip_type { MAXIM_DEVICE_TYPE_UNKNOWN = 0, MAXIM_DEVICE_TYPE_MAX17042, MAXIM_DEVICE_TYPE_MAX17047, MAXIM_DEVICE_TYPE_MAX17050, MAXIM_DEVICE_TYPE_MAX17055, MAXIM_DEVICE_TYPE_NUM }; /* * used for setting a register to a desired value * addr : address for a register * data : setting value for the register */ struct max17042_reg_data { u8 addr; u16 data; }; struct max17042_config_data { /* External current sense resistor value in milli-ohms */ u32 cur_sense_val; /* A/D measurement */ u16 tgain; /* 0x2C */ u16 toff; /* 0x2D */ u16 cgain; /* 0x2E */ u16 coff; /* 0x2F */ /* Alert / Status */ u16 valrt_thresh; /* 0x01 */ u16 talrt_thresh; /* 0x02 */ u16 soc_alrt_thresh; /* 0x03 */ u16 config; /* 0x01D */ u16 shdntimer; /* 0x03F */ /* App data */ u16 full_soc_thresh; /* 0x13 */ u16 design_cap; /* 0x18 */ u16 ichgt_term; /* 0x1E */ /* MG3 config */ u16 at_rate; /* 0x04 */ u16 learn_cfg; /* 0x28 */ u16 filter_cfg; /* 0x29 */ u16 relax_cfg; /* 0x2A */ u16 misc_cfg; /* 0x2B */ u16 masksoc; /* 0x32 */ /* MG3 save and restore */ u16 fullcap; /* 0x10 */ u16 fullcapnom; /* 0x23 */ u16 socempty; /* 0x33 */ u16 lavg_empty; /* 0x36 */ u16 dqacc; /* 0x45 */ u16 dpacc; /* 0x46 */ u16 qrtbl00; /* 0x12 */ u16 qrtbl10; /* 0x22 */ u16 qrtbl20; /* 0x32 */ u16 qrtbl30; /* 0x42 */ /* Cell technology from power_supply.h */ u16 cell_technology; /* Cell Data */ u16 vempty; /* 0x12 */ u16 temp_nom; /* 0x24 */ u16 temp_lim; /* 0x25 */ u16 fctc; /* 0x37 */ u16 rcomp0; /* 0x38 */ u16 tcompc0; /* 0x39 */ u16 empty_tempco; /* 0x3A */ u16 kempty0; /* 0x3B */ u16 cell_char_tbl[MAX17042_CHARACTERIZATION_DATA_SIZE]; } __packed; struct max17042_platform_data { struct max17042_reg_data *init_data; struct max17042_config_data *config_data; int num_init_data; /* Number of enties in init_data array */ bool enable_current_sense; bool enable_por_init; /* Use POR init from Maxim appnote */ /* * R_sns in micro-ohms. * default 10000 (if r_sns = 0) as it is the recommended value by * the datasheet although it can be changed by board designers. */ unsigned int r_sns; int vmin; /* in millivolts */ int vmax; /* in millivolts */ int temp_min; /* in tenths of degree Celsius */ int temp_max; /* in tenths of degree Celsius */ }; #endif /* __MAX17042_BATTERY_H_ */ PK ! �S��� � power/gpio-charger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __LINUX_POWER_GPIO_CHARGER_H__ #define __LINUX_POWER_GPIO_CHARGER_H__ #include <linux/power_supply.h> #include <linux/types.h> /** * struct gpio_charger_platform_data - platform_data for gpio_charger devices * @name: Name for the chargers power_supply device * @type: Type of the charger * @supplied_to: Array of battery names to which this chargers supplies power * @num_supplicants: Number of entries in the supplied_to array */ struct gpio_charger_platform_data { const char *name; enum power_supply_type type; char **supplied_to; size_t num_supplicants; }; #endif PK ! ��%$ $ power/bq27xxx_battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_BQ27X00_BATTERY_H__ #define __LINUX_BQ27X00_BATTERY_H__ #include <linux/power_supply.h> enum bq27xxx_chip { BQ27000 = 1, /* bq27000, bq27200 */ BQ27010, /* bq27010, bq27210 */ BQ2750X, /* bq27500 deprecated alias */ BQ2751X, /* bq27510, bq27520 deprecated alias */ BQ2752X, BQ27500, /* bq27500/1 */ BQ27510G1, /* bq27510G1 */ BQ27510G2, /* bq27510G2 */ BQ27510G3, /* bq27510G3 */ BQ27520G1, /* bq27520G1 */ BQ27520G2, /* bq27520G2 */ BQ27520G3, /* bq27520G3 */ BQ27520G4, /* bq27520G4 */ BQ27521, /* bq27521 */ BQ27530, /* bq27530, bq27531 */ BQ27531, BQ27541, /* bq27541, bq27542, bq27546, bq27742 */ BQ27542, BQ27546, BQ27742, BQ27545, /* bq27545 */ BQ27411, BQ27421, /* bq27421, bq27441, bq27621 */ BQ27425, BQ27426, BQ27441, BQ27621, BQ27Z561, BQ28Z610, BQ34Z100, BQ78Z100, }; struct bq27xxx_device_info; struct bq27xxx_access_methods { int (*read)(struct bq27xxx_device_info *di, u8 reg, bool single); int (*write)(struct bq27xxx_device_info *di, u8 reg, int value, bool single); int (*read_bulk)(struct bq27xxx_device_info *di, u8 reg, u8 *data, int len); int (*write_bulk)(struct bq27xxx_device_info *di, u8 reg, u8 *data, int len); }; struct bq27xxx_reg_cache { int temperature; int time_to_empty; int time_to_empty_avg; int time_to_full; int charge_full; int cycle_count; int capacity; int energy; int flags; int health; }; struct bq27xxx_device_info { struct device *dev; int id; enum bq27xxx_chip chip; u32 opts; const char *name; struct bq27xxx_dm_reg *dm_regs; u32 unseal_key; struct bq27xxx_access_methods bus; struct bq27xxx_reg_cache cache; int charge_design_full; bool removed; unsigned long last_update; union power_supply_propval last_status; struct delayed_work work; struct power_supply *bat; struct list_head list; struct mutex lock; u8 *regs; }; void bq27xxx_battery_update(struct bq27xxx_device_info *di); int bq27xxx_battery_setup(struct bq27xxx_device_info *di); void bq27xxx_battery_teardown(struct bq27xxx_device_info *di); #endif PK ! &>r1 1 power/bq24190_charger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Platform data for the TI bq24190 battery charger driver. */ #ifndef _BQ24190_CHARGER_H_ #define _BQ24190_CHARGER_H_ #include <linux/regulator/machine.h> struct bq24190_platform_data { const struct regulator_init_data *regulator_init_data; }; #endif PK ! ��,E E power/jz4740-battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2009, Jiejing Zhang <kzjeef@gmail.com> */ #ifndef __JZ4740_BATTERY_H #define __JZ4740_BATTERY_H struct jz_battery_platform_data { struct power_supply_info info; int gpio_charge; /* GPIO port of Charger state */ int gpio_charge_active_low; }; #endif PK ! *u2� � power/bq2415x_charger.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * bq2415x charger driver * * Copyright (C) 2011-2013 Pali Rohár <pali@kernel.org> */ #ifndef BQ2415X_CHARGER_H #define BQ2415X_CHARGER_H /* * This is platform data for bq2415x chip. It contains default board * voltages and currents which can be also later configured via sysfs. If * value is -1 then default chip value (specified in datasheet) will be * used. * * Value resistor_sense is needed for configuring charge and * termination current. If it is less or equal to zero, configuring charge * and termination current will not be possible. * * For automode support is needed to provide name of power supply device * in value notify_device. Device driver must immediately report property * POWER_SUPPLY_PROP_CURRENT_MAX when current changed. */ /* Supported modes with maximal current limit */ enum bq2415x_mode { BQ2415X_MODE_OFF, /* offline mode (charger disabled) */ BQ2415X_MODE_NONE, /* unknown charger (100mA) */ BQ2415X_MODE_HOST_CHARGER, /* usb host/hub charger (500mA) */ BQ2415X_MODE_DEDICATED_CHARGER, /* dedicated charger (unlimited) */ BQ2415X_MODE_BOOST, /* boost mode (charging disabled) */ }; struct bq2415x_platform_data { int current_limit; /* mA */ int weak_battery_voltage; /* mV */ int battery_regulation_voltage; /* mV */ int charge_current; /* mA */ int termination_current; /* mA */ int resistor_sense; /* m ohm */ const char *notify_device; /* name */ }; #endif PK ! ���� � power/charger-manager.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2011 Samsung Electronics Co., Ltd. * MyungJoo.Ham <myungjoo.ham@samsung.com> * * Charger Manager. * This framework enables to control and multiple chargers and to * monitor charging even in the context of suspend-to-RAM with * an interface combining the chargers. * **/ #ifndef _CHARGER_MANAGER_H #define _CHARGER_MANAGER_H #include <linux/power_supply.h> #include <linux/extcon.h> #include <linux/alarmtimer.h> enum data_source { CM_BATTERY_PRESENT, CM_NO_BATTERY, CM_FUEL_GAUGE, CM_CHARGER_STAT, }; enum polling_modes { CM_POLL_DISABLE = 0, CM_POLL_ALWAYS, CM_POLL_EXTERNAL_POWER_ONLY, CM_POLL_CHARGING_ONLY, }; enum cm_batt_temp { CM_BATT_OK = 0, CM_BATT_OVERHEAT, CM_BATT_COLD, }; /** * struct charger_cable * @extcon_name: the name of extcon device. * @name: the name of the cable connector * @extcon_dev: the extcon device. * @wq: the workqueue to control charger according to the state of * charger cable. If charger cable is attached, enable charger. * But if charger cable is detached, disable charger. * @nb: the notifier block to receive changed state from EXTCON * (External Connector) when charger cable is attached/detached. * @attached: the state of charger cable. * true: the charger cable is attached * false: the charger cable is detached * @charger: the instance of struct charger_regulator. * @cm: the Charger Manager representing the battery. */ struct charger_cable { const char *extcon_name; const char *name; struct extcon_dev *extcon_dev; u64 extcon_type; /* The charger-manager use Extcon framework */ struct work_struct wq; struct notifier_block nb; /* The state of charger cable */ bool attached; struct charger_regulator *charger; /* * Set min/max current of regulator to protect over-current issue * according to a kind of charger cable when cable is attached. */ int min_uA; int max_uA; struct charger_manager *cm; }; /** * struct charger_regulator * @regulator_name: the name of regulator for using charger. * @consumer: the regulator consumer for the charger. * @externally_control: * Set if the charger-manager cannot control charger, * the charger will be maintained with disabled state. * @cables: * the array of charger cables to enable/disable charger * and set current limit according to constraint data of * struct charger_cable if only charger cable included * in the array of charger cables is attached/detached. * @num_cables: the number of charger cables. * @attr_g: Attribute group for the charger(regulator) * @attr_name: "name" sysfs entry * @attr_state: "state" sysfs entry * @attr_externally_control: "externally_control" sysfs entry * @attrs: Arrays pointing to attr_name/state/externally_control for attr_g */ struct charger_regulator { /* The name of regulator for charging */ const char *regulator_name; struct regulator *consumer; /* charger never on when system is on */ int externally_control; /* * Store constraint information related to current limit, * each cable have different condition for charging. */ struct charger_cable *cables; int num_cables; struct attribute_group attr_grp; struct device_attribute attr_name; struct device_attribute attr_state; struct device_attribute attr_externally_control; struct attribute *attrs[4]; struct charger_manager *cm; }; /** * struct charger_desc * @psy_name: the name of power-supply-class for charger manager * @polling_mode: * Determine which polling mode will be used * @fullbatt_vchkdrop_uV: * Check voltage drop after the battery is fully charged. * If it has dropped more than fullbatt_vchkdrop_uV * CM will restart charging. * @fullbatt_uV: voltage in microvolt * If VBATT >= fullbatt_uV, it is assumed to be full. * @fullbatt_soc: state of Charge in % * If state of Charge >= fullbatt_soc, it is assumed to be full. * @fullbatt_full_capacity: full capacity measure * If full capacity of battery >= fullbatt_full_capacity, * it is assumed to be full. * @polling_interval_ms: interval in millisecond at which * charger manager will monitor battery health * @battery_present: * Specify where information for existence of battery can be obtained * @psy_charger_stat: the names of power-supply for chargers * @num_charger_regulator: the number of entries in charger_regulators * @charger_regulators: array of charger regulators * @psy_fuel_gauge: the name of power-supply for fuel gauge * @thermal_zone : the name of thermal zone for battery * @temp_min : Minimum battery temperature for charging. * @temp_max : Maximum battery temperature for charging. * @temp_diff : Temperature difference to restart charging. * @measure_battery_temp: * true: measure battery temperature * false: measure ambient temperature * @charging_max_duration_ms: Maximum possible duration for charging * If whole charging duration exceed 'charging_max_duration_ms', * cm stop charging. * @discharging_max_duration_ms: * Maximum possible duration for discharging with charger cable * after full-batt. If discharging duration exceed 'discharging * max_duration_ms', cm start charging. */ struct charger_desc { const char *psy_name; enum polling_modes polling_mode; unsigned int polling_interval_ms; unsigned int fullbatt_vchkdrop_uV; unsigned int fullbatt_uV; unsigned int fullbatt_soc; unsigned int fullbatt_full_capacity; enum data_source battery_present; const char **psy_charger_stat; int num_charger_regulators; struct charger_regulator *charger_regulators; const struct attribute_group **sysfs_groups; const char *psy_fuel_gauge; const char *thermal_zone; int temp_min; int temp_max; int temp_diff; bool measure_battery_temp; u32 charging_max_duration_ms; u32 discharging_max_duration_ms; }; #define PSY_NAME_MAX 30 /** * struct charger_manager * @entry: entry for list * @dev: device pointer * @desc: instance of charger_desc * @fuel_gauge: power_supply for fuel gauge * @charger_stat: array of power_supply for chargers * @tzd_batt : thermal zone device for battery * @charger_enabled: the state of charger * @emergency_stop: * When setting true, stop charging * @psy_name_buf: the name of power-supply-class for charger manager * @charger_psy: power_supply for charger manager * @status_save_ext_pwr_inserted: * saved status of external power before entering suspend-to-RAM * @status_save_batt: * saved status of battery before entering suspend-to-RAM * @charging_start_time: saved start time of enabling charging * @charging_end_time: saved end time of disabling charging * @battery_status: Current battery status */ struct charger_manager { struct list_head entry; struct device *dev; struct charger_desc *desc; #ifdef CONFIG_THERMAL struct thermal_zone_device *tzd_batt; #endif bool charger_enabled; int emergency_stop; char psy_name_buf[PSY_NAME_MAX + 1]; struct power_supply_desc charger_psy_desc; struct power_supply *charger_psy; u64 charging_start_time; u64 charging_end_time; int battery_status; }; #endif /* _CHARGER_MANAGER_H */ PK ! �d� � power/generic-adc-battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012, Anish Kumar <anish198519851985@gmail.com> */ #ifndef GENERIC_ADC_BATTERY_H #define GENERIC_ADC_BATTERY_H /** * struct gab_platform_data - platform_data for generic adc iio battery driver. * @battery_info: recommended structure to specify static power supply * parameters * @cal_charge: calculate charge level. * @jitter_delay: delay required after the interrupt to check battery * status.Default set is 10ms. */ struct gab_platform_data { struct power_supply_info battery_info; int (*cal_charge)(long value); int jitter_delay; }; #endif /* GENERIC_ADC_BATTERY_H */ PK ! D��% % power/smartreflex.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * OMAP Smartreflex Defines and Routines * * Author: Thara Gopinath <thara@ti.com> * * Copyright (C) 2010 Texas Instruments, Inc. * Thara Gopinath <thara@ti.com> * * Copyright (C) 2008 Nokia Corporation * Kalle Jokiniemi * * Copyright (C) 2007 Texas Instruments, Inc. * Lesly A M <x0080970@ti.com> */ #ifndef __POWER_SMARTREFLEX_H #define __POWER_SMARTREFLEX_H #include <linux/types.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/platform_data/voltage-omap.h> /* * Different Smartreflex IPs version. The v1 is the 65nm version used in * OMAP3430. The v2 is the update for the 45nm version of the IP * used in OMAP3630 and OMAP4430 */ #define SR_TYPE_V1 1 #define SR_TYPE_V2 2 /* SMART REFLEX REG ADDRESS OFFSET */ #define SRCONFIG 0x00 #define SRSTATUS 0x04 #define SENVAL 0x08 #define SENMIN 0x0C #define SENMAX 0x10 #define SENAVG 0x14 #define AVGWEIGHT 0x18 #define NVALUERECIPROCAL 0x1c #define SENERROR_V1 0x20 #define ERRCONFIG_V1 0x24 #define IRQ_EOI 0x20 #define IRQSTATUS_RAW 0x24 #define IRQSTATUS 0x28 #define IRQENABLE_SET 0x2C #define IRQENABLE_CLR 0x30 #define SENERROR_V2 0x34 #define ERRCONFIG_V2 0x38 /* Bit/Shift Positions */ /* SRCONFIG */ #define SRCONFIG_ACCUMDATA_SHIFT 22 #define SRCONFIG_SRCLKLENGTH_SHIFT 12 #define SRCONFIG_SENNENABLE_V1_SHIFT 5 #define SRCONFIG_SENPENABLE_V1_SHIFT 3 #define SRCONFIG_SENNENABLE_V2_SHIFT 1 #define SRCONFIG_SENPENABLE_V2_SHIFT 0 #define SRCONFIG_CLKCTRL_SHIFT 0 #define SRCONFIG_ACCUMDATA_MASK (0x3ff << 22) #define SRCONFIG_SRENABLE BIT(11) #define SRCONFIG_SENENABLE BIT(10) #define SRCONFIG_ERRGEN_EN BIT(9) #define SRCONFIG_MINMAXAVG_EN BIT(8) #define SRCONFIG_DELAYCTRL BIT(2) /* AVGWEIGHT */ #define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2 #define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0 /* NVALUERECIPROCAL */ #define NVALUERECIPROCAL_SENPGAIN_SHIFT 20 #define NVALUERECIPROCAL_SENNGAIN_SHIFT 16 #define NVALUERECIPROCAL_RNSENP_SHIFT 8 #define NVALUERECIPROCAL_RNSENN_SHIFT 0 /* ERRCONFIG */ #define ERRCONFIG_ERRWEIGHT_SHIFT 16 #define ERRCONFIG_ERRMAXLIMIT_SHIFT 8 #define ERRCONFIG_ERRMINLIMIT_SHIFT 0 #define SR_ERRWEIGHT_MASK (0x07 << 16) #define SR_ERRMAXLIMIT_MASK (0xff << 8) #define SR_ERRMINLIMIT_MASK (0xff << 0) #define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31) #define ERRCONFIG_VPBOUNDINTST_V1 BIT(30) #define ERRCONFIG_MCUACCUMINTEN BIT(29) #define ERRCONFIG_MCUACCUMINTST BIT(28) #define ERRCONFIG_MCUVALIDINTEN BIT(27) #define ERRCONFIG_MCUVALIDINTST BIT(26) #define ERRCONFIG_MCUBOUNDINTEN BIT(25) #define ERRCONFIG_MCUBOUNDINTST BIT(24) #define ERRCONFIG_MCUDISACKINTEN BIT(23) #define ERRCONFIG_VPBOUNDINTST_V2 BIT(23) #define ERRCONFIG_MCUDISACKINTST BIT(22) #define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22) #define ERRCONFIG_STATUS_V1_MASK (ERRCONFIG_VPBOUNDINTST_V1 | \ ERRCONFIG_MCUACCUMINTST | \ ERRCONFIG_MCUVALIDINTST | \ ERRCONFIG_MCUBOUNDINTST | \ ERRCONFIG_MCUDISACKINTST) /* IRQSTATUS */ #define IRQSTATUS_MCUACCUMINT BIT(3) #define IRQSTATUS_MCVALIDINT BIT(2) #define IRQSTATUS_MCBOUNDSINT BIT(1) #define IRQSTATUS_MCUDISABLEACKINT BIT(0) /* IRQENABLE_SET and IRQENABLE_CLEAR */ #define IRQENABLE_MCUACCUMINT BIT(3) #define IRQENABLE_MCUVALIDINT BIT(2) #define IRQENABLE_MCUBOUNDSINT BIT(1) #define IRQENABLE_MCUDISABLEACKINT BIT(0) /* Common Bit values */ #define SRCLKLENGTH_12MHZ_SYSCLK 0x3c #define SRCLKLENGTH_13MHZ_SYSCLK 0x41 #define SRCLKLENGTH_19MHZ_SYSCLK 0x60 #define SRCLKLENGTH_26MHZ_SYSCLK 0x82 #define SRCLKLENGTH_38MHZ_SYSCLK 0xC0 /* * 3430 specific values. Maybe these should be passed from board file or * pmic structures. */ #define OMAP3430_SR_ACCUMDATA 0x1f4 #define OMAP3430_SR1_SENPAVGWEIGHT 0x03 #define OMAP3430_SR1_SENNAVGWEIGHT 0x03 #define OMAP3430_SR2_SENPAVGWEIGHT 0x01 #define OMAP3430_SR2_SENNAVGWEIGHT 0x01 #define OMAP3430_SR_ERRWEIGHT 0x04 #define OMAP3430_SR_ERRMAXLIMIT 0x02 enum sr_instance { OMAP_SR_MPU, /* shared with iva on omap3 */ OMAP_SR_CORE, OMAP_SR_IVA, OMAP_SR_NR, }; struct omap_sr { char *name; struct list_head node; struct platform_device *pdev; struct omap_sr_nvalue_table *nvalue_table; struct voltagedomain *voltdm; struct dentry *dbg_dir; unsigned int irq; struct clk *fck; int srid; int ip_type; int nvalue_count; bool autocomp_active; u32 clk_length; u32 err_weight; u32 err_minlimit; u32 err_maxlimit; u32 accum_data; u32 senn_avgweight; u32 senp_avgweight; u32 senp_mod; u32 senn_mod; void __iomem *base; unsigned long enabled:1; }; /** * test_cond_timeout - busy-loop, testing a condition * @cond: condition to test until it evaluates to true * @timeout: maximum number of microseconds in the timeout * @index: loop index (integer) * * Loop waiting for @cond to become true or until at least @timeout * microseconds have passed. To use, define some integer @index in the * calling code. After running, if @index == @timeout, then the loop has * timed out. * * Copied from omap_test_timeout */ #define sr_test_cond_timeout(cond, timeout, index) \ ({ \ for (index = 0; index < timeout; index++) { \ if (cond) \ break; \ udelay(1); \ } \ }) /** * struct omap_sr_pmic_data - Strucutre to be populated by pmic code to pass * pmic specific info to smartreflex driver * * @sr_pmic_init: API to initialize smartreflex on the PMIC side. */ struct omap_sr_pmic_data { void (*sr_pmic_init) (void); }; /** * struct omap_smartreflex_dev_attr - Smartreflex Device attribute. * * @sensor_voltdm_name: Name of voltdomain of SR instance */ struct omap_smartreflex_dev_attr { const char *sensor_voltdm_name; }; /* * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR. * The smartreflex class driver should pass the class type. * Should be used to populate the class_type field of the * omap_smartreflex_class_data structure. */ #define SR_CLASS1 0x1 #define SR_CLASS2 0x2 #define SR_CLASS3 0x3 /** * struct omap_sr_class_data - Smartreflex class driver info * * @enable: API to enable a particular class smaartreflex. * @disable: API to disable a particular class smartreflex. * @configure: API to configure a particular class smartreflex. * @notify: API to notify the class driver about an event in SR. * Not needed for class3. * @notify_flags: specify the events to be notified to the class driver * @class_type: specify which smartreflex class. * Can be used by the SR driver to take any class * based decisions. */ struct omap_sr_class_data { int (*enable)(struct omap_sr *sr); int (*disable)(struct omap_sr *sr, int is_volt_reset); int (*configure)(struct omap_sr *sr); int (*notify)(struct omap_sr *sr, u32 status); u8 notify_flags; u8 class_type; }; /** * struct omap_sr_nvalue_table - Smartreflex n-target value info * * @efuse_offs: The offset of the efuse where n-target values are stored. * @nvalue: The n-target value. * @errminlimit: The value of the ERRMINLIMIT bitfield for this n-target * @volt_nominal: microvolts DC that the VDD is initially programmed to */ struct omap_sr_nvalue_table { u32 efuse_offs; u32 nvalue; u32 errminlimit; unsigned long volt_nominal; }; /** * struct omap_sr_data - Smartreflex platform data. * * @name: instance name * @ip_type: Smartreflex IP type. * @senp_mod: SENPENABLE value of the sr CONFIG register * @senn_mod: SENNENABLE value for sr CONFIG register * @err_weight ERRWEIGHT value of the sr ERRCONFIG register * @err_maxlimit ERRMAXLIMIT value of the sr ERRCONFIG register * @accum_data ACCUMDATA value of the sr CONFIG register * @senn_avgweight SENNAVGWEIGHT value of the sr AVGWEIGHT register * @senp_avgweight SENPAVGWEIGHT value of the sr AVGWEIGHT register * @nvalue_count: Number of distinct nvalues in the nvalue table * @enable_on_init: whether this sr module needs to enabled at * boot up or not. * @nvalue_table: table containing the efuse offsets and nvalues * corresponding to them. * @voltdm: Pointer to the voltage domain associated with the SR */ struct omap_sr_data { const char *name; int ip_type; u32 senp_mod; u32 senn_mod; u32 err_weight; u32 err_maxlimit; u32 accum_data; u32 senn_avgweight; u32 senp_avgweight; int nvalue_count; bool enable_on_init; struct omap_sr_nvalue_table *nvalue_table; struct voltagedomain *voltdm; }; extern struct omap_sr_data omap_sr_pdata[OMAP_SR_NR]; #ifdef CONFIG_POWER_AVS_OMAP /* Smartreflex module enable/disable interface */ void omap_sr_enable(struct voltagedomain *voltdm); void omap_sr_disable(struct voltagedomain *voltdm); void omap_sr_disable_reset_volt(struct voltagedomain *voltdm); /* Smartreflex driver hooks to be called from Smartreflex class driver */ int sr_enable(struct omap_sr *sr, unsigned long volt); void sr_disable(struct omap_sr *sr); int sr_configure_errgen(struct omap_sr *sr); int sr_disable_errgen(struct omap_sr *sr); int sr_configure_minmax(struct omap_sr *sr); /* API to register the smartreflex class driver with the smartreflex driver */ int sr_register_class(struct omap_sr_class_data *class_data); #else static inline void omap_sr_enable(struct voltagedomain *voltdm) {} static inline void omap_sr_disable(struct voltagedomain *voltdm) {} static inline void omap_sr_disable_reset_volt( struct voltagedomain *voltdm) {} #endif #endif PK ! I �JZ Z power/sbs-battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Gas Gauge driver for SBS Compliant Gas Gauges * * Copyright (c) 2010, NVIDIA Corporation. */ #ifndef __LINUX_POWER_SBS_BATTERY_H_ #define __LINUX_POWER_SBS_BATTERY_H_ #include <linux/power_supply.h> #include <linux/types.h> /** * struct sbs_platform_data - platform data for sbs devices * @i2c_retry_count: # of times to retry on i2c IO failure * @poll_retry_count: # of times to retry looking for new status after * external change notification */ struct sbs_platform_data { u32 i2c_retry_count; u32 poll_retry_count; }; #endif PK ! ^`W�� � power/twl4030_madc_battery.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Dumb driver for LiIon batteries using TWL4030 madc. * * Copyright 2013 Golden Delicious Computers * Nikolaus Schaller <hns@goldelico.com> */ #ifndef __TWL4030_MADC_BATTERY_H #define __TWL4030_MADC_BATTERY_H /* * Usually we can assume 100% @ 4.15V and 0% @ 3.3V but curves differ for * charging and discharging! */ struct twl4030_madc_bat_calibration { short voltage; /* in mV - specify -1 for end of list */ short level; /* in percent (0 .. 100%) */ }; struct twl4030_madc_bat_platform_data { unsigned int capacity; /* total capacity in uAh */ struct twl4030_madc_bat_calibration *charging; int charging_size; struct twl4030_madc_bat_calibration *discharging; int discharging_size; }; #endif PK ! P��� � stmp_device.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * basic functions for devices following the "stmp" style register layout * * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. */ #ifndef __STMP_DEVICE_H__ #define __STMP_DEVICE_H__ #define STMP_OFFSET_REG_SET 0x4 #define STMP_OFFSET_REG_CLR 0x8 #define STMP_OFFSET_REG_TOG 0xc extern int stmp_reset_block(void __iomem *); #endif /* __STMP_DEVICE_H__ */ PK ! .xE$� � nospec.hnu �[��� // SPDX-License-Identifier: GPL-2.0 // Copyright(c) 2018 Linus Torvalds. All rights reserved. // Copyright(c) 2018 Alexei Starovoitov. All rights reserved. // Copyright(c) 2018 Intel Corporation. All rights reserved. #ifndef _LINUX_NOSPEC_H #define _LINUX_NOSPEC_H #include <linux/compiler.h> #include <asm/barrier.h> struct task_struct; #ifndef barrier_nospec # define barrier_nospec() do { } while (0) #endif /** * array_index_mask_nospec() - generate a ~0 mask when index < size, 0 otherwise * @index: array element index * @size: number of elements in array * * When @index is out of bounds (@index >= @size), the sign bit will be * set. Extend the sign bit to all bits and invert, giving a result of * zero for an out of bounds index, or ~0 if within bounds [0, @size). */ #ifndef array_index_mask_nospec static inline unsigned long array_index_mask_nospec(unsigned long index, unsigned long size) { /* * Always calculate and emit the mask even if the compiler * thinks the mask is not needed. The compiler does not take * into account the value of @index under speculation. */ OPTIMIZER_HIDE_VAR(index); return ~(long)(index | (size - 1UL - index)) >> (BITS_PER_LONG - 1); } #endif /* * array_index_nospec - sanitize an array index after a bounds check * * For a code sequence like: * * if (index < size) { * index = array_index_nospec(index, size); * val = array[index]; * } * * ...if the CPU speculates past the bounds check then * array_index_nospec() will clamp the index within the range of [0, * size). */ #define array_index_nospec(index, size) \ ({ \ typeof(index) _i = (index); \ typeof(size) _s = (size); \ unsigned long _mask = array_index_mask_nospec(_i, _s); \ \ BUILD_BUG_ON(sizeof(_i) > sizeof(long)); \ BUILD_BUG_ON(sizeof(_s) > sizeof(long)); \ \ (typeof(_i)) (_i & _mask); \ }) /* Speculation control prctl */ int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which); int arch_prctl_spec_ctrl_set(struct task_struct *task, unsigned long which, unsigned long ctrl); /* Speculation control for seccomp enforced mitigation */ void arch_seccomp_spec_mitigate(struct task_struct *task); #endif /* _LINUX_NOSPEC_H */ PK ! �]�� � logic_pio.hnu �[��� // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2017 HiSilicon Limited, All Rights Reserved. * Author: Gabriele Paoloni <gabriele.paoloni@huawei.com> * Author: Zhichang Yuan <yuanzhichang@hisilicon.com> */ #ifndef __LINUX_LOGIC_PIO_H #define __LINUX_LOGIC_PIO_H #include <linux/fwnode.h> enum { LOGIC_PIO_INDIRECT, /* Indirect IO flag */ LOGIC_PIO_CPU_MMIO, /* Memory-mapped IO flag */ }; struct logic_pio_hwaddr { struct list_head list; struct fwnode_handle *fwnode; resource_size_t hw_start; resource_size_t io_start; resource_size_t size; /* range size populated */ unsigned long flags; void *hostdata; const struct logic_pio_host_ops *ops; }; struct logic_pio_host_ops { u32 (*in)(void *hostdata, unsigned long addr, size_t dwidth); void (*out)(void *hostdata, unsigned long addr, u32 val, size_t dwidth); u32 (*ins)(void *hostdata, unsigned long addr, void *buffer, size_t dwidth, unsigned int count); void (*outs)(void *hostdata, unsigned long addr, const void *buffer, size_t dwidth, unsigned int count); }; #ifdef CONFIG_INDIRECT_PIO u8 logic_inb(unsigned long addr); void logic_outb(u8 value, unsigned long addr); void logic_outw(u16 value, unsigned long addr); void logic_outl(u32 value, unsigned long addr); u16 logic_inw(unsigned long addr); u32 logic_inl(unsigned long addr); void logic_outb(u8 value, unsigned long addr); void logic_outw(u16 value, unsigned long addr); void logic_outl(u32 value, unsigned long addr); void logic_insb(unsigned long addr, void *buffer, unsigned int count); void logic_insl(unsigned long addr, void *buffer, unsigned int count); void logic_insw(unsigned long addr, void *buffer, unsigned int count); void logic_outsb(unsigned long addr, const void *buffer, unsigned int count); void logic_outsw(unsigned long addr, const void *buffer, unsigned int count); void logic_outsl(unsigned long addr, const void *buffer, unsigned int count); #ifndef inb #define inb logic_inb #endif #ifndef inw #define inw logic_inw #endif #ifndef inl #define inl logic_inl #endif #ifndef outb #define outb logic_outb #endif #ifndef outw #define outw logic_outw #endif #ifndef outl #define outl logic_outl #endif #ifndef insb #define insb logic_insb #endif #ifndef insw #define insw logic_insw #endif #ifndef insl #define insl logic_insl #endif #ifndef outsb #define outsb logic_outsb #endif #ifndef outsw #define outsw logic_outsw #endif #ifndef outsl #define outsl logic_outsl #endif /* * We reserve 0x4000 bytes for Indirect IO as so far this library is only * used by the HiSilicon LPC Host. If needed, we can reserve a wider IO * area by redefining the macro below. */ #define PIO_INDIRECT_SIZE 0x4000 #else #define PIO_INDIRECT_SIZE 0 #endif /* CONFIG_INDIRECT_PIO */ #define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE) struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode); unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode, resource_size_t hw_addr, resource_size_t size); int logic_pio_register_range(struct logic_pio_hwaddr *newrange); void logic_pio_unregister_range(struct logic_pio_hwaddr *range); resource_size_t logic_pio_to_hwaddr(unsigned long pio); unsigned long logic_pio_trans_cpuaddr(resource_size_t hw_addr); #endif /* __LINUX_LOGIC_PIO_H */ PK ! H�ҁ� � xattr.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* File: linux/xattr.h Extended attributes handling. Copyright (C) 2001 by Andreas Gruenbacher <a.gruenbacher@computer.org> Copyright (c) 2001-2002 Silicon Graphics, Inc. All Rights Reserved. Copyright (c) 2004 Red Hat, Inc., James Morris <jmorris@redhat.com> */ #ifndef _LINUX_XATTR_H #define _LINUX_XATTR_H #include <linux/slab.h> #include <linux/types.h> #include <linux/spinlock.h> #include <linux/mm.h> #include <linux/user_namespace.h> #include <uapi/linux/xattr.h> struct inode; struct dentry; /* * struct xattr_handler: When @name is set, match attributes with exactly that * name. When @prefix is set instead, match attributes with that prefix and * with a non-empty suffix. */ struct xattr_handler { const char *name; const char *prefix; int flags; /* fs private flags */ bool (*list)(struct dentry *dentry); int (*get)(const struct xattr_handler *, struct dentry *dentry, struct inode *inode, const char *name, void *buffer, size_t size); int (*set)(const struct xattr_handler *, struct user_namespace *mnt_userns, struct dentry *dentry, struct inode *inode, const char *name, const void *buffer, size_t size, int flags); }; const char *xattr_full_name(const struct xattr_handler *, const char *); struct xattr { const char *name; void *value; size_t value_len; }; ssize_t __vfs_getxattr(struct dentry *, struct inode *, const char *, void *, size_t); ssize_t vfs_getxattr(struct user_namespace *, struct dentry *, const char *, void *, size_t); ssize_t vfs_listxattr(struct dentry *d, char *list, size_t size); int __vfs_setxattr(struct user_namespace *, struct dentry *, struct inode *, const char *, const void *, size_t, int); int __vfs_setxattr_noperm(struct user_namespace *, struct dentry *, const char *, const void *, size_t, int); int __vfs_setxattr_locked(struct user_namespace *, struct dentry *, const char *, const void *, size_t, int, struct inode **); int vfs_setxattr(struct user_namespace *, struct dentry *, const char *, const void *, size_t, int); int __vfs_removexattr(struct user_namespace *, struct dentry *, const char *); int __vfs_removexattr_locked(struct user_namespace *, struct dentry *, const char *, struct inode **); int vfs_removexattr(struct user_namespace *, struct dentry *, const char *); ssize_t generic_listxattr(struct dentry *dentry, char *buffer, size_t buffer_size); ssize_t vfs_getxattr_alloc(struct user_namespace *mnt_userns, struct dentry *dentry, const char *name, char **xattr_value, size_t size, gfp_t flags); int xattr_supported_namespace(struct inode *inode, const char *prefix); static inline const char *xattr_prefix(const struct xattr_handler *handler) { return handler->prefix ?: handler->name; } struct simple_xattrs { struct list_head head; spinlock_t lock; }; struct simple_xattr { struct list_head list; char *name; size_t size; char value[]; }; /* * initialize the simple_xattrs structure */ static inline void simple_xattrs_init(struct simple_xattrs *xattrs) { INIT_LIST_HEAD(&xattrs->head); spin_lock_init(&xattrs->lock); } /* * free all the xattrs */ static inline void simple_xattrs_free(struct simple_xattrs *xattrs) { struct simple_xattr *xattr, *node; list_for_each_entry_safe(xattr, node, &xattrs->head, list) { kfree(xattr->name); kvfree(xattr); } } struct simple_xattr *simple_xattr_alloc(const void *value, size_t size); int simple_xattr_get(struct simple_xattrs *xattrs, const char *name, void *buffer, size_t size); int simple_xattr_set(struct simple_xattrs *xattrs, const char *name, const void *value, size_t size, int flags, ssize_t *removed_size); ssize_t simple_xattr_list(struct inode *inode, struct simple_xattrs *xattrs, char *buffer, size_t size); void simple_xattr_list_add(struct simple_xattrs *xattrs, struct simple_xattr *new_xattr); #endif /* _LINUX_XATTR_H */ PK ! ��"2�) �) lsm_hooks.hnu �[��� /* * Linux Security Module interfaces * * Copyright (C) 2001 WireX Communications, Inc <chris@wirex.com> * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com> * Copyright (C) 2001 Networks Associates Technology, Inc <ssmalley@nai.com> * Copyright (C) 2001 James Morris <jmorris@intercode.com.au> * Copyright (C) 2001 Silicon Graphics, Inc. (Trust Technology Group) * Copyright (C) 2015 Intel Corporation. * Copyright (C) 2015 Casey Schaufler <casey@schaufler-ca.com> * Copyright (C) 2016 Mellanox Techonologies * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * Due to this file being licensed under the GPL there is controversy over * whether this permits you to write a module that #includes this file * without placing your module under the GPL. Please consult a lawyer for * advice before doing this. * */ #ifndef __LINUX_LSM_HOOKS_H #define __LINUX_LSM_HOOKS_H #include <linux/security.h> #include <linux/init.h> #include <linux/rculist.h> /** * union security_list_options - Linux Security Module hook function list * * Security hooks for program execution operations. * * @bprm_creds_for_exec: * If the setup in prepare_exec_creds did not setup @bprm->cred->security * properly for executing @bprm->file, update the LSM's portion of * @bprm->cred->security to be what commit_creds needs to install for the * new program. This hook may also optionally check permissions * (e.g. for transitions between security domains). * The hook must set @bprm->secureexec to 1 if AT_SECURE should be set to * request libc enable secure mode. * @bprm contains the linux_binprm structure. * Return 0 if the hook is successful and permission is granted. * @bprm_creds_from_file: * If @file is setpcap, suid, sgid or otherwise marked to change * privilege upon exec, update @bprm->cred to reflect that change. * This is called after finding the binary that will be executed. * without an interpreter. This ensures that the credentials will not * be derived from a script that the binary will need to reopen, which * when reopend may end up being a completely different file. This * hook may also optionally check permissions (e.g. for transitions * between security domains). * The hook must set @bprm->secureexec to 1 if AT_SECURE should be set to * request libc enable secure mode. * The hook must add to @bprm->per_clear any personality flags that * should be cleared from current->personality. * @bprm contains the linux_binprm structure. * Return 0 if the hook is successful and permission is granted. * @bprm_check_security: * This hook mediates the point when a search for a binary handler will * begin. It allows a check against the @bprm->cred->security value * which was set in the preceding creds_for_exec call. The argv list and * envp list are reliably available in @bprm. This hook may be called * multiple times during a single execve. * @bprm contains the linux_binprm structure. * Return 0 if the hook is successful and permission is granted. * @bprm_committing_creds: * Prepare to install the new security attributes of a process being * transformed by an execve operation, based on the old credentials * pointed to by @current->cred and the information set in @bprm->cred by * the bprm_creds_for_exec hook. @bprm points to the linux_binprm * structure. This hook is a good place to perform state changes on the * process such as closing open file descriptors to which access will no * longer be granted when the attributes are changed. This is called * immediately before commit_creds(). * @bprm_committed_creds: * Tidy up after the installation of the new security attributes of a * process being transformed by an execve operation. The new credentials * have, by this point, been set to @current->cred. @bprm points to the * linux_binprm structure. This hook is a good place to perform state * changes on the process such as clearing out non-inheritable signal * state. This is called immediately after commit_creds(). * * Security hooks for mount using fs_context. * [See also Documentation/filesystems/mount_api.rst] * * @fs_context_dup: * Allocate and attach a security structure to sc->security. This pointer * is initialised to NULL by the caller. * @fc indicates the new filesystem context. * @src_fc indicates the original filesystem context. * @fs_context_parse_param: * Userspace provided a parameter to configure a superblock. The LSM may * reject it with an error and may use it for itself, in which case it * should return 0; otherwise it should return -ENOPARAM to pass it on to * the filesystem. * @fc indicates the filesystem context. * @param The parameter * * Security hooks for filesystem operations. * * @sb_alloc_security: * Allocate and attach a security structure to the sb->s_security field. * The s_security field is initialized to NULL when the structure is * allocated. * @sb contains the super_block structure to be modified. * Return 0 if operation was successful. * @sb_delete: * Release objects tied to a superblock (e.g. inodes). * @sb contains the super_block structure being released. * @sb_free_security: * Deallocate and clear the sb->s_security field. * @sb contains the super_block structure to be modified. * @sb_free_mnt_opts: * Free memory associated with @mnt_ops. * @sb_eat_lsm_opts: * Eat (scan @orig options) and save them in @mnt_opts. * @sb_statfs: * Check permission before obtaining filesystem statistics for the @mnt * mountpoint. * @dentry is a handle on the superblock for the filesystem. * Return 0 if permission is granted. * @sb_mount: * Check permission before an object specified by @dev_name is mounted on * the mount point named by @nd. For an ordinary mount, @dev_name * identifies a device if the file system type requires a device. For a * remount (@flags & MS_REMOUNT), @dev_name is irrelevant. For a * loopback/bind mount (@flags & MS_BIND), @dev_name identifies the * pathname of the object being mounted. * @dev_name contains the name for object being mounted. * @path contains the path for mount point object. * @type contains the filesystem type. * @flags contains the mount flags. * @data contains the filesystem-specific data. * Return 0 if permission is granted. * @sb_copy_data: * Allow mount option data to be copied prior to parsing by the filesystem, * so that the security module can extract security-specific mount * options cleanly (a filesystem may modify the data e.g. with strsep()). * This also allows the original mount data to be stripped of security- * specific options to avoid having to make filesystems aware of them. * @orig the original mount data copied from userspace. * @copy copied data which will be passed to the security module. * Returns 0 if the copy was successful. * @sb_mnt_opts_compat: * Determine if the new mount options in @mnt_opts are allowed given * the existing mounted filesystem at @sb. * @sb superblock being compared * @mnt_opts new mount options * Return 0 if options are compatible. * @sb_remount: * Extracts security system specific mount options and verifies no changes * are being made to those options. * @sb superblock being remounted * @data contains the filesystem-specific data. * Return 0 if permission is granted. * @sb_kern_mount: * Mount this @sb if allowed by permissions. * @sb_show_options: * Show (print on @m) mount options for this @sb. * @sb_umount: * Check permission before the @mnt file system is unmounted. * @mnt contains the mounted file system. * @flags contains the unmount flags, e.g. MNT_FORCE. * Return 0 if permission is granted. * @sb_pivotroot: * Check permission before pivoting the root filesystem. * @old_path contains the path for the new location of the * current root (put_old). * @new_path contains the path for the new root (new_root). * Return 0 if permission is granted. * @sb_set_mnt_opts: * Set the security relevant mount options used for a superblock * @sb the superblock to set security mount options for * @opts binary data structure containing all lsm mount data * @sb_clone_mnt_opts: * Copy all security options from a given superblock to another * @oldsb old superblock which contain information to clone * @newsb new superblock which needs filled in * @sb_add_mnt_opt: * Add one mount @option to @mnt_opts. * @sb_parse_opts_str: * Parse a string of security data filling in the opts structure * @options string containing all mount options known by the LSM * @opts binary data structure usable by the LSM * @move_mount: * Check permission before a mount is moved. * @from_path indicates the mount that is going to be moved. * @to_path indicates the mountpoint that will be mounted upon. * @dentry_init_security: * Compute a context for a dentry as the inode is not yet available * since NFSv4 has no label backed by an EA anyway. * @dentry dentry to use in calculating the context. * @mode mode used to determine resource type. * @name name of the last path component used to create file * @ctx pointer to place the pointer to the resulting context in. * @ctxlen point to place the length of the resulting context. * @dentry_create_files_as: * Compute a context for a dentry as the inode is not yet available * and set that context in passed in creds so that new files are * created using that context. Context is calculated using the * passed in creds and not the creds of the caller. * @dentry dentry to use in calculating the context. * @mode mode used to determine resource type. * @name name of the last path component used to create file * @old creds which should be used for context calculation * @new creds to modify * * * Security hooks for inode operations. * * @inode_alloc_security: * Allocate and attach a security structure to @inode->i_security. The * i_security field is initialized to NULL when the inode structure is * allocated. * @inode contains the inode structure. * Return 0 if operation was successful. * @inode_free_security: * @inode contains the inode structure. * Deallocate the inode security structure and set @inode->i_security to * NULL. * @inode_init_security: * Obtain the security attribute name suffix and value to set on a newly * created inode and set up the incore security field for the new inode. * This hook is called by the fs code as part of the inode creation * transaction and provides for atomic labeling of the inode, unlike * the post_create/mkdir/... hooks called by the VFS. The hook function * is expected to allocate the name and value via kmalloc, with the caller * being responsible for calling kfree after using them. * If the security module does not use security attributes or does * not wish to put a security attribute on this particular inode, * then it should return -EOPNOTSUPP to skip this processing. * @inode contains the inode structure of the newly created inode. * @dir contains the inode structure of the parent directory. * @qstr contains the last path component of the new object * @name will be set to the allocated name suffix (e.g. selinux). * @value will be set to the allocated attribute value. * @len will be set to the length of the value. * Returns 0 if @name and @value have been successfully set, * -EOPNOTSUPP if no security attribute is needed, or * -ENOMEM on memory allocation failure. * @inode_init_security_anon: * Set up the incore security field for the new anonymous inode * and return whether the inode creation is permitted by the security * module or not. * @inode contains the inode structure * @name name of the anonymous inode class * @context_inode optional related inode * Returns 0 on success, -EACCES if the security module denies the * creation of this inode, or another -errno upon other errors. * @inode_create: * Check permission to create a regular file. * @dir contains inode structure of the parent of the new file. * @dentry contains the dentry structure for the file to be created. * @mode contains the file mode of the file to be created. * Return 0 if permission is granted. * @inode_link: * Check permission before creating a new hard link to a file. * @old_dentry contains the dentry structure for an existing * link to the file. * @dir contains the inode structure of the parent directory * of the new link. * @new_dentry contains the dentry structure for the new link. * Return 0 if permission is granted. * @path_link: * Check permission before creating a new hard link to a file. * @old_dentry contains the dentry structure for an existing link * to the file. * @new_dir contains the path structure of the parent directory of * the new link. * @new_dentry contains the dentry structure for the new link. * Return 0 if permission is granted. * @inode_unlink: * Check the permission to remove a hard link to a file. * @dir contains the inode structure of parent directory of the file. * @dentry contains the dentry structure for file to be unlinked. * Return 0 if permission is granted. * @path_unlink: * Check the permission to remove a hard link to a file. * @dir contains the path structure of parent directory of the file. * @dentry contains the dentry structure for file to be unlinked. * Return 0 if permission is granted. * @inode_symlink: * Check the permission to create a symbolic link to a file. * @dir contains the inode structure of parent directory of * the symbolic link. * @dentry contains the dentry structure of the symbolic link. * @old_name contains the pathname of file. * Return 0 if permission is granted. * @path_symlink: * Check the permission to create a symbolic link to a file. * @dir contains the path structure of parent directory of * the symbolic link. * @dentry contains the dentry structure of the symbolic link. * @old_name contains the pathname of file. * Return 0 if permission is granted. * @inode_mkdir: * Check permissions to create a new directory in the existing directory * associated with inode structure @dir. * @dir contains the inode structure of parent of the directory * to be created. * @dentry contains the dentry structure of new directory. * @mode contains the mode of new directory. * Return 0 if permission is granted. * @path_mkdir: * Check permissions to create a new directory in the existing directory * associated with path structure @path. * @dir contains the path structure of parent of the directory * to be created. * @dentry contains the dentry structure of new directory. * @mode contains the mode of new directory. * Return 0 if permission is granted. * @inode_rmdir: * Check the permission to remove a directory. * @dir contains the inode structure of parent of the directory * to be removed. * @dentry contains the dentry structure of directory to be removed. * Return 0 if permission is granted. * @path_rmdir: * Check the permission to remove a directory. * @dir contains the path structure of parent of the directory to be * removed. * @dentry contains the dentry structure of directory to be removed. * Return 0 if permission is granted. * @inode_mknod: * Check permissions when creating a special file (or a socket or a fifo * file created via the mknod system call). Note that if mknod operation * is being done for a regular file, then the create hook will be called * and not this hook. * @dir contains the inode structure of parent of the new file. * @dentry contains the dentry structure of the new file. * @mode contains the mode of the new file. * @dev contains the device number. * Return 0 if permission is granted. * @path_mknod: * Check permissions when creating a file. Note that this hook is called * even if mknod operation is being done for a regular file. * @dir contains the path structure of parent of the new file. * @dentry contains the dentry structure of the new file. * @mode contains the mode of the new file. * @dev contains the undecoded device number. Use new_decode_dev() to get * the decoded device number. * Return 0 if permission is granted. * @inode_rename: * Check for permission to rename a file or directory. * @old_dir contains the inode structure for parent of the old link. * @old_dentry contains the dentry structure of the old link. * @new_dir contains the inode structure for parent of the new link. * @new_dentry contains the dentry structure of the new link. * Return 0 if permission is granted. * @path_rename: * Check for permission to rename a file or directory. * @old_dir contains the path structure for parent of the old link. * @old_dentry contains the dentry structure of the old link. * @new_dir contains the path structure for parent of the new link. * @new_dentry contains the dentry structure of the new link. * Return 0 if permission is granted. * @path_chmod: * Check for permission to change a mode of the file @path. The new * mode is specified in @mode. * @path contains the path structure of the file to change the mode. * @mode contains the new DAC's permission, which is a bitmask of * constants from <include/uapi/linux/stat.h> * Return 0 if permission is granted. * @path_chown: * Check for permission to change owner/group of a file or directory. * @path contains the path structure. * @uid contains new owner's ID. * @gid contains new group's ID. * Return 0 if permission is granted. * @path_chroot: * Check for permission to change root directory. * @path contains the path structure. * Return 0 if permission is granted. * @path_notify: * Check permissions before setting a watch on events as defined by @mask, * on an object at @path, whose type is defined by @obj_type. * @inode_readlink: * Check the permission to read the symbolic link. * @dentry contains the dentry structure for the file link. * Return 0 if permission is granted. * @inode_follow_link: * Check permission to follow a symbolic link when looking up a pathname. * @dentry contains the dentry structure for the link. * @inode contains the inode, which itself is not stable in RCU-walk * @rcu indicates whether we are in RCU-walk mode. * Return 0 if permission is granted. * @inode_permission: * Check permission before accessing an inode. This hook is called by the * existing Linux permission function, so a security module can use it to * provide additional checking for existing Linux permission checks. * Notice that this hook is called when a file is opened (as well as many * other operations), whereas the file_security_ops permission hook is * called when the actual read/write operations are performed. * @inode contains the inode structure to check. * @mask contains the permission mask. * Return 0 if permission is granted. * @inode_setattr: * Check permission before setting file attributes. Note that the kernel * call to notify_change is performed from several locations, whenever * file attributes change (such as when a file is truncated, chown/chmod * operations, transferring disk quotas, etc). * @dentry contains the dentry structure for the file. * @attr is the iattr structure containing the new file attributes. * Return 0 if permission is granted. * @path_truncate: * Check permission before truncating a file. * @path contains the path structure for the file. * Return 0 if permission is granted. * @inode_getattr: * Check permission before obtaining file attributes. * @path contains the path structure for the file. * Return 0 if permission is granted. * @inode_setxattr: * Check permission before setting the extended attributes * @value identified by @name for @dentry. * Return 0 if permission is granted. * @inode_post_setxattr: * Update inode security field after successful setxattr operation. * @value identified by @name for @dentry. * @inode_getxattr: * Check permission before obtaining the extended attributes * identified by @name for @dentry. * Return 0 if permission is granted. * @inode_listxattr: * Check permission before obtaining the list of extended attribute * names for @dentry. * Return 0 if permission is granted. * @inode_removexattr: * Check permission before removing the extended attribute * identified by @name for @dentry. * Return 0 if permission is granted. * @inode_getsecurity: * Retrieve a copy of the extended attribute representation of the * security label associated with @name for @inode via @buffer. Note that * @name is the remainder of the attribute name after the security prefix * has been removed. @alloc is used to specify of the call should return a * value via the buffer or just the value length Return size of buffer on * success. * @inode_setsecurity: * Set the security label associated with @name for @inode from the * extended attribute value @value. @size indicates the size of the * @value in bytes. @flags may be XATTR_CREATE, XATTR_REPLACE, or 0. * Note that @name is the remainder of the attribute name after the * security. prefix has been removed. * Return 0 on success. * @inode_listsecurity: * Copy the extended attribute names for the security labels * associated with @inode into @buffer. The maximum size of @buffer * is specified by @buffer_size. @buffer may be NULL to request * the size of the buffer required. * Returns number of bytes used/required on success. * @inode_need_killpriv: * Called when an inode has been changed. * @dentry is the dentry being changed. * Return <0 on error to abort the inode change operation. * Return 0 if inode_killpriv does not need to be called. * Return >0 if inode_killpriv does need to be called. * @inode_killpriv: * The setuid bit is being removed. Remove similar security labels. * Called with the dentry->d_inode->i_mutex held. * @mnt_userns: user namespace of the mount * @dentry is the dentry being changed. * Return 0 on success. If error is returned, then the operation * causing setuid bit removal is failed. * @inode_getsecid: * Get the secid associated with the node. * @inode contains a pointer to the inode. * @secid contains a pointer to the location where result will be saved. * In case of failure, @secid will be set to zero. * @inode_copy_up: * A file is about to be copied up from lower layer to upper layer of * overlay filesystem. Security module can prepare a set of new creds * and modify as need be and return new creds. Caller will switch to * new creds temporarily to create new file and release newly allocated * creds. * @src indicates the union dentry of file that is being copied up. * @new pointer to pointer to return newly allocated creds. * Returns 0 on success or a negative error code on error. * @inode_copy_up_xattr: * Filter the xattrs being copied up when a unioned file is copied * up from a lower layer to the union/overlay layer. * @name indicates the name of the xattr. * Returns 0 to accept the xattr, 1 to discard the xattr, -EOPNOTSUPP if * security module does not know about attribute or a negative error code * to abort the copy up. Note that the caller is responsible for reading * and writing the xattrs as this hook is merely a filter. * @d_instantiate: * Fill in @inode security information for a @dentry if allowed. * @getprocattr: * Read attribute @name for process @p and store it into @value if allowed. * @setprocattr: * Write (set) attribute @name to @value, size @size if allowed. * * Security hooks for kernfs node operations * * @kernfs_init_security: * Initialize the security context of a newly created kernfs node based * on its own and its parent's attributes. * * @kn_dir the parent kernfs node * @kn the new child kernfs node * * Security hooks for file operations * * @file_permission: * Check file permissions before accessing an open file. This hook is * called by various operations that read or write files. A security * module can use this hook to perform additional checking on these * operations, e.g. to revalidate permissions on use to support privilege * bracketing or policy changes. Notice that this hook is used when the * actual read/write operations are performed, whereas the * inode_security_ops hook is called when a file is opened (as well as * many other operations). * Caveat: Although this hook can be used to revalidate permissions for * various system call operations that read or write files, it does not * address the revalidation of permissions for memory-mapped files. * Security modules must handle this separately if they need such * revalidation. * @file contains the file structure being accessed. * @mask contains the requested permissions. * Return 0 if permission is granted. * @file_alloc_security: * Allocate and attach a security structure to the file->f_security field. * The security field is initialized to NULL when the structure is first * created. * @file contains the file structure to secure. * Return 0 if the hook is successful and permission is granted. * @file_free_security: * Deallocate and free any security structures stored in file->f_security. * @file contains the file structure being modified. * @file_ioctl: * @file contains the file structure. * @cmd contains the operation to perform. * @arg contains the operational arguments. * Check permission for an ioctl operation on @file. Note that @arg * sometimes represents a user space pointer; in other cases, it may be a * simple integer value. When @arg represents a user space pointer, it * should never be used by the security module. * Return 0 if permission is granted. * @mmap_addr : * Check permissions for a mmap operation at @addr. * @addr contains virtual address that will be used for the operation. * Return 0 if permission is granted. * @mmap_file : * Check permissions for a mmap operation. The @file may be NULL, e.g. * if mapping anonymous memory. * @file contains the file structure for file to map (may be NULL). * @reqprot contains the protection requested by the application. * @prot contains the protection that will be applied by the kernel. * @flags contains the operational flags. * Return 0 if permission is granted. * @file_mprotect: * Check permissions before changing memory access permissions. * @vma contains the memory region to modify. * @reqprot contains the protection requested by the application. * @prot contains the protection that will be applied by the kernel. * Return 0 if permission is granted. * @file_lock: * Check permission before performing file locking operations. * Note the hook mediates both flock and fcntl style locks. * @file contains the file structure. * @cmd contains the posix-translated lock operation to perform * (e.g. F_RDLCK, F_WRLCK). * Return 0 if permission is granted. * @file_fcntl: * Check permission before allowing the file operation specified by @cmd * from being performed on the file @file. Note that @arg sometimes * represents a user space pointer; in other cases, it may be a simple * integer value. When @arg represents a user space pointer, it should * never be used by the security module. * @file contains the file structure. * @cmd contains the operation to be performed. * @arg contains the operational arguments. * Return 0 if permission is granted. * @file_set_fowner: * Save owner security information (typically from current->security) in * file->f_security for later use by the send_sigiotask hook. * @file contains the file structure to update. * Return 0 on success. * @file_send_sigiotask: * Check permission for the file owner @fown to send SIGIO or SIGURG to the * process @tsk. Note that this hook is sometimes called from interrupt. * Note that the fown_struct, @fown, is never outside the context of a * struct file, so the file structure (and associated security information) * can always be obtained: container_of(fown, struct file, f_owner) * @tsk contains the structure of task receiving signal. * @fown contains the file owner information. * @sig is the signal that will be sent. When 0, kernel sends SIGIO. * Return 0 if permission is granted. * @file_receive: * This hook allows security modules to control the ability of a process * to receive an open file descriptor via socket IPC. * @file contains the file structure being received. * Return 0 if permission is granted. * @file_open: * Save open-time permission checking state for later use upon * file_permission, and recheck access if anything has changed * since inode_permission. * * Security hooks for task operations. * * @task_alloc: * @task task being allocated. * @clone_flags contains the flags indicating what should be shared. * Handle allocation of task-related resources. * Returns a zero on success, negative values on failure. * @task_free: * @task task about to be freed. * Handle release of task-related resources. (Note that this can be called * from interrupt context.) * @cred_alloc_blank: * @cred points to the credentials. * @gfp indicates the atomicity of any memory allocations. * Only allocate sufficient memory and attach to @cred such that * cred_transfer() will not get ENOMEM. * @cred_free: * @cred points to the credentials. * Deallocate and clear the cred->security field in a set of credentials. * @cred_prepare: * @new points to the new credentials. * @old points to the original credentials. * @gfp indicates the atomicity of any memory allocations. * Prepare a new set of credentials by copying the data from the old set. * @cred_transfer: * @new points to the new credentials. * @old points to the original credentials. * Transfer data from original creds to new creds * @cred_getsecid: * Retrieve the security identifier of the cred structure @c * @c contains the credentials, secid will be placed into @secid. * In case of failure, @secid will be set to zero. * @kernel_act_as: * Set the credentials for a kernel service to act as (subjective context). * @new points to the credentials to be modified. * @secid specifies the security ID to be set * The current task must be the one that nominated @secid. * Return 0 if successful. * @kernel_create_files_as: * Set the file creation context in a set of credentials to be the same as * the objective context of the specified inode. * @new points to the credentials to be modified. * @inode points to the inode to use as a reference. * The current task must be the one that nominated @inode. * Return 0 if successful. * @kernel_module_request: * Ability to trigger the kernel to automatically upcall to userspace for * userspace to load a kernel module with the given name. * @kmod_name name of the module requested by the kernel * Return 0 if successful. * @kernel_load_data: * Load data provided by userspace. * @id kernel load data identifier * @contents if a subsequent @kernel_post_load_data will be called. * Return 0 if permission is granted. * @kernel_post_load_data: * Load data provided by a non-file source (usually userspace buffer). * @buf pointer to buffer containing the data contents. * @size length of the data contents. * @id kernel load data identifier * @description a text description of what was loaded, @id-specific * Return 0 if permission is granted. * This must be paired with a prior @kernel_load_data call that had * @contents set to true. * @kernel_read_file: * Read a file specified by userspace. * @file contains the file structure pointing to the file being read * by the kernel. * @id kernel read file identifier * @contents if a subsequent @kernel_post_read_file will be called. * Return 0 if permission is granted. * @kernel_post_read_file: * Read a file specified by userspace. * @file contains the file structure pointing to the file being read * by the kernel. * @buf pointer to buffer containing the file contents. * @size length of the file contents. * @id kernel read file identifier * This must be paired with a prior @kernel_read_file call that had * @contents set to true. * Return 0 if permission is granted. * @task_fix_setuid: * Update the module's state after setting one or more of the user * identity attributes of the current process. The @flags parameter * indicates which of the set*uid system calls invoked this hook. If * @new is the set of credentials that will be installed. Modifications * should be made to this rather than to @current->cred. * @old is the set of credentials that are being replaces * @flags contains one of the LSM_SETID_* values. * Return 0 on success. * @task_fix_setgid: * Update the module's state after setting one or more of the group * identity attributes of the current process. The @flags parameter * indicates which of the set*gid system calls invoked this hook. * @new is the set of credentials that will be installed. Modifications * should be made to this rather than to @current->cred. * @old is the set of credentials that are being replaced. * @flags contains one of the LSM_SETID_* values. * Return 0 on success. * @task_setpgid: * Check permission before setting the process group identifier of the * process @p to @pgid. * @p contains the task_struct for process being modified. * @pgid contains the new pgid. * Return 0 if permission is granted. * @task_getpgid: * Check permission before getting the process group identifier of the * process @p. * @p contains the task_struct for the process. * Return 0 if permission is granted. * @task_getsid: * Check permission before getting the session identifier of the process * @p. * @p contains the task_struct for the process. * Return 0 if permission is granted. * @task_getsecid_subj: * Retrieve the subjective security identifier of the task_struct in @p * and return it in @secid. Special care must be taken to ensure that @p * is the either the "current" task, or the caller has exclusive access * to @p. * In case of failure, @secid will be set to zero. * @task_getsecid_obj: * Retrieve the objective security identifier of the task_struct in @p * and return it in @secid. * In case of failure, @secid will be set to zero. * * @task_setnice: * Check permission before setting the nice value of @p to @nice. * @p contains the task_struct of process. * @nice contains the new nice value. * Return 0 if permission is granted. * @task_setioprio: * Check permission before setting the ioprio value of @p to @ioprio. * @p contains the task_struct of process. * @ioprio contains the new ioprio value * Return 0 if permission is granted. * @task_getioprio: * Check permission before getting the ioprio value of @p. * @p contains the task_struct of process. * Return 0 if permission is granted. * @task_prlimit: * Check permission before getting and/or setting the resource limits of * another task. * @cred points to the cred structure for the current task. * @tcred points to the cred structure for the target task. * @flags contains the LSM_PRLIMIT_* flag bits indicating whether the * resource limits are being read, modified, or both. * Return 0 if permission is granted. * @task_setrlimit: * Check permission before setting the resource limits of process @p * for @resource to @new_rlim. The old resource limit values can * be examined by dereferencing (p->signal->rlim + resource). * @p points to the task_struct for the target task's group leader. * @resource contains the resource whose limit is being set. * @new_rlim contains the new limits for @resource. * Return 0 if permission is granted. * @task_setscheduler: * Check permission before setting scheduling policy and/or parameters of * process @p. * @p contains the task_struct for process. * Return 0 if permission is granted. * @task_getscheduler: * Check permission before obtaining scheduling information for process * @p. * @p contains the task_struct for process. * Return 0 if permission is granted. * @task_movememory: * Check permission before moving memory owned by process @p. * @p contains the task_struct for process. * Return 0 if permission is granted. * @task_kill: * Check permission before sending signal @sig to @p. @info can be NULL, * the constant 1, or a pointer to a kernel_siginfo structure. If @info is 1 or * SI_FROMKERNEL(info) is true, then the signal should be viewed as coming * from the kernel and should typically be permitted. * SIGIO signals are handled separately by the send_sigiotask hook in * file_security_ops. * @p contains the task_struct for process. * @info contains the signal information. * @sig contains the signal value. * @cred contains the cred of the process where the signal originated, or * NULL if the current task is the originator. * Return 0 if permission is granted. * @task_prctl: * Check permission before performing a process control operation on the * current process. * @option contains the operation. * @arg2 contains a argument. * @arg3 contains a argument. * @arg4 contains a argument. * @arg5 contains a argument. * Return -ENOSYS if no-one wanted to handle this op, any other value to * cause prctl() to return immediately with that value. * @task_to_inode: * Set the security attributes for an inode based on an associated task's * security attributes, e.g. for /proc/pid inodes. * @p contains the task_struct for the task. * @inode contains the inode structure for the inode. * * Security hooks for Netlink messaging. * * @netlink_send: * Save security information for a netlink message so that permission * checking can be performed when the message is processed. The security * information can be saved using the eff_cap field of the * netlink_skb_parms structure. Also may be used to provide fine * grained control over message transmission. * @sk associated sock of task sending the message. * @skb contains the sk_buff structure for the netlink message. * Return 0 if the information was successfully saved and message * is allowed to be transmitted. * * Security hooks for Unix domain networking. * * @unix_stream_connect: * Check permissions before establishing a Unix domain stream connection * between @sock and @other. * @sock contains the sock structure. * @other contains the peer sock structure. * @newsk contains the new sock structure. * Return 0 if permission is granted. * @unix_may_send: * Check permissions before connecting or sending datagrams from @sock to * @other. * @sock contains the socket structure. * @other contains the peer socket structure. * Return 0 if permission is granted. * * The @unix_stream_connect and @unix_may_send hooks were necessary because * Linux provides an alternative to the conventional file name space for Unix * domain sockets. Whereas binding and connecting to sockets in the file name * space is mediated by the typical file permissions (and caught by the mknod * and permission hooks in inode_security_ops), binding and connecting to * sockets in the abstract name space is completely unmediated. Sufficient * control of Unix domain sockets in the abstract name space isn't possible * using only the socket layer hooks, since we need to know the actual target * socket, which is not looked up until we are inside the af_unix code. * * Security hooks for socket operations. * * @socket_create: * Check permissions prior to creating a new socket. * @family contains the requested protocol family. * @type contains the requested communications type. * @protocol contains the requested protocol. * @kern set to 1 if a kernel socket. * Return 0 if permission is granted. * @socket_post_create: * This hook allows a module to update or allocate a per-socket security * structure. Note that the security field was not added directly to the * socket structure, but rather, the socket security information is stored * in the associated inode. Typically, the inode alloc_security hook will * allocate and attach security information to * SOCK_INODE(sock)->i_security. This hook may be used to update the * SOCK_INODE(sock)->i_security field with additional information that * wasn't available when the inode was allocated. * @sock contains the newly created socket structure. * @family contains the requested protocol family. * @type contains the requested communications type. * @protocol contains the requested protocol. * @kern set to 1 if a kernel socket. * @socket_socketpair: * Check permissions before creating a fresh pair of sockets. * @socka contains the first socket structure. * @sockb contains the second socket structure. * Return 0 if permission is granted and the connection was established. * @socket_bind: * Check permission before socket protocol layer bind operation is * performed and the socket @sock is bound to the address specified in the * @address parameter. * @sock contains the socket structure. * @address contains the address to bind to. * @addrlen contains the length of address. * Return 0 if permission is granted. * @socket_connect: * Check permission before socket protocol layer connect operation * attempts to connect socket @sock to a remote address, @address. * @sock contains the socket structure. * @address contains the address of remote endpoint. * @addrlen contains the length of address. * Return 0 if permission is granted. * @socket_listen: * Check permission before socket protocol layer listen operation. * @sock contains the socket structure. * @backlog contains the maximum length for the pending connection queue. * Return 0 if permission is granted. * @socket_accept: * Check permission before accepting a new connection. Note that the new * socket, @newsock, has been created and some information copied to it, * but the accept operation has not actually been performed. * @sock contains the listening socket structure. * @newsock contains the newly created server socket for connection. * Return 0 if permission is granted. * @socket_sendmsg: * Check permission before transmitting a message to another socket. * @sock contains the socket structure. * @msg contains the message to be transmitted. * @size contains the size of message. * Return 0 if permission is granted. * @socket_recvmsg: * Check permission before receiving a message from a socket. * @sock contains the socket structure. * @msg contains the message structure. * @size contains the size of message structure. * @flags contains the operational flags. * Return 0 if permission is granted. * @socket_getsockname: * Check permission before the local address (name) of the socket object * @sock is retrieved. * @sock contains the socket structure. * Return 0 if permission is granted. * @socket_getpeername: * Check permission before the remote address (name) of a socket object * @sock is retrieved. * @sock contains the socket structure. * Return 0 if permission is granted. * @socket_getsockopt: * Check permissions before retrieving the options associated with socket * @sock. * @sock contains the socket structure. * @level contains the protocol level to retrieve option from. * @optname contains the name of option to retrieve. * Return 0 if permission is granted. * @socket_setsockopt: * Check permissions before setting the options associated with socket * @sock. * @sock contains the socket structure. * @level contains the protocol level to set options for. * @optname contains the name of the option to set. * Return 0 if permission is granted. * @socket_shutdown: * Checks permission before all or part of a connection on the socket * @sock is shut down. * @sock contains the socket structure. * @how contains the flag indicating how future sends and receives * are handled. * Return 0 if permission is granted. * @socket_sock_rcv_skb: * Check permissions on incoming network packets. This hook is distinct * from Netfilter's IP input hooks since it is the first time that the * incoming sk_buff @skb has been associated with a particular socket, @sk. * Must not sleep inside this hook because some callers hold spinlocks. * @sk contains the sock (not socket) associated with the incoming sk_buff. * @skb contains the incoming network data. * @socket_getpeersec_stream: * This hook allows the security module to provide peer socket security * state for unix or connected tcp sockets to userspace via getsockopt * SO_GETPEERSEC. For tcp sockets this can be meaningful if the * socket is associated with an ipsec SA. * @sock is the local socket. * @optval userspace memory where the security state is to be copied. * @optlen userspace int where the module should copy the actual length * of the security state. * @len as input is the maximum length to copy to userspace provided * by the caller. * Return 0 if all is well, otherwise, typical getsockopt return * values. * @socket_getpeersec_dgram: * This hook allows the security module to provide peer socket security * state for udp sockets on a per-packet basis to userspace via * getsockopt SO_GETPEERSEC. The application must first have indicated * the IP_PASSSEC option via getsockopt. It can then retrieve the * security state returned by this hook for a packet via the SCM_SECURITY * ancillary message type. * @sock contains the peer socket. May be NULL. * @skb is the sk_buff for the packet being queried. May be NULL. * @secid pointer to store the secid of the packet. * Return 0 on success, error on failure. * @sk_alloc_security: * Allocate and attach a security structure to the sk->sk_security field, * which is used to copy security attributes between local stream sockets. * @sk_free_security: * Deallocate security structure. * @sk_clone_security: * Clone/copy security structure. * @sk_getsecid: * Retrieve the LSM-specific secid for the sock to enable caching * of network authorizations. * @sock_graft: * Sets the socket's isec sid to the sock's sid. * @inet_conn_request: * Sets the openreq's sid to socket's sid with MLS portion taken * from peer sid. * @inet_csk_clone: * Sets the new child socket's sid to the openreq sid. * @inet_conn_established: * Sets the connection's peersid to the secmark on skb. * @secmark_relabel_packet: * check if the process should be allowed to relabel packets to * the given secid * @secmark_refcount_inc: * tells the LSM to increment the number of secmark labeling rules loaded * @secmark_refcount_dec: * tells the LSM to decrement the number of secmark labeling rules loaded * @req_classify_flow: * Sets the flow's sid to the openreq sid. * @tun_dev_alloc_security: * This hook allows a module to allocate a security structure for a TUN * device. * @security pointer to a security structure pointer. * Returns a zero on success, negative values on failure. * @tun_dev_free_security: * This hook allows a module to free the security structure for a TUN * device. * @security pointer to the TUN device's security structure * @tun_dev_create: * Check permissions prior to creating a new TUN device. * @tun_dev_attach_queue: * Check permissions prior to attaching to a TUN device queue. * @security pointer to the TUN device's security structure. * @tun_dev_attach: * This hook can be used by the module to update any security state * associated with the TUN device's sock structure. * @sk contains the existing sock structure. * @security pointer to the TUN device's security structure. * @tun_dev_open: * This hook can be used by the module to update any security state * associated with the TUN device's security structure. * @security pointer to the TUN devices's security structure. * * Security hooks for SCTP * * @sctp_assoc_request: * Passes the @ep and @chunk->skb of the association INIT packet to * the security module. * @ep pointer to sctp endpoint structure. * @skb pointer to skbuff of association packet. * Return 0 on success, error on failure. * @sctp_bind_connect: * Validiate permissions required for each address associated with sock * @sk. Depending on @optname, the addresses will be treated as either * for a connect or bind service. The @addrlen is calculated on each * ipv4 and ipv6 address using sizeof(struct sockaddr_in) or * sizeof(struct sockaddr_in6). * @sk pointer to sock structure. * @optname name of the option to validate. * @address list containing one or more ipv4/ipv6 addresses. * @addrlen total length of address(s). * Return 0 on success, error on failure. * @sctp_sk_clone: * Called whenever a new socket is created by accept(2) (i.e. a TCP * style socket) or when a socket is 'peeled off' e.g userspace * calls sctp_peeloff(3). * @ep pointer to current sctp endpoint structure. * @sk pointer to current sock structure. * @sk pointer to new sock structure. * * Security hooks for Infiniband * * @ib_pkey_access: * Check permission to access a pkey when modifing a QP. * @subnet_prefix the subnet prefix of the port being used. * @pkey the pkey to be accessed. * @sec pointer to a security structure. * @ib_endport_manage_subnet: * Check permissions to send and receive SMPs on a end port. * @dev_name the IB device name (i.e. mlx4_0). * @port_num the port number. * @sec pointer to a security structure. * @ib_alloc_security: * Allocate a security structure for Infiniband objects. * @sec pointer to a security structure pointer. * Returns 0 on success, non-zero on failure * @ib_free_security: * Deallocate an Infiniband security structure. * @sec contains the security structure to be freed. * * Security hooks for XFRM operations. * * @xfrm_policy_alloc_security: * @ctxp is a pointer to the xfrm_sec_ctx being added to Security Policy * Database used by the XFRM system. * @sec_ctx contains the security context information being provided by * the user-level policy update program (e.g., setkey). * Allocate a security structure to the xp->security field; the security * field is initialized to NULL when the xfrm_policy is allocated. * Return 0 if operation was successful (memory to allocate, legal context) * @gfp is to specify the context for the allocation * @xfrm_policy_clone_security: * @old_ctx contains an existing xfrm_sec_ctx. * @new_ctxp contains a new xfrm_sec_ctx being cloned from old. * Allocate a security structure in new_ctxp that contains the * information from the old_ctx structure. * Return 0 if operation was successful (memory to allocate). * @xfrm_policy_free_security: * @ctx contains the xfrm_sec_ctx * Deallocate xp->security. * @xfrm_policy_delete_security: * @ctx contains the xfrm_sec_ctx. * Authorize deletion of xp->security. * @xfrm_state_alloc: * @x contains the xfrm_state being added to the Security Association * Database by the XFRM system. * @sec_ctx contains the security context information being provided by * the user-level SA generation program (e.g., setkey or racoon). * Allocate a security structure to the x->security field; the security * field is initialized to NULL when the xfrm_state is allocated. Set the * context to correspond to sec_ctx. Return 0 if operation was successful * (memory to allocate, legal context). * @xfrm_state_alloc_acquire: * @x contains the xfrm_state being added to the Security Association * Database by the XFRM system. * @polsec contains the policy's security context. * @secid contains the secid from which to take the mls portion of the * context. * Allocate a security structure to the x->security field; the security * field is initialized to NULL when the xfrm_state is allocated. Set the * context to correspond to secid. Return 0 if operation was successful * (memory to allocate, legal context). * @xfrm_state_free_security: * @x contains the xfrm_state. * Deallocate x->security. * @xfrm_state_delete_security: * @x contains the xfrm_state. * Authorize deletion of x->security. * @xfrm_policy_lookup: * @ctx contains the xfrm_sec_ctx for which the access control is being * checked. * @fl_secid contains the flow security label that is used to authorize * access to the policy xp. * @dir contains the direction of the flow (input or output). * Check permission when a flow selects a xfrm_policy for processing * XFRMs on a packet. The hook is called when selecting either a * per-socket policy or a generic xfrm policy. * Return 0 if permission is granted, -ESRCH otherwise, or -errno * on other errors. * @xfrm_state_pol_flow_match: * @x contains the state to match. * @xp contains the policy to check for a match. * @flic contains the flowi_common struct to check for a match. * Return 1 if there is a match. * @xfrm_decode_session: * @skb points to skb to decode. * @secid points to the flow key secid to set. * @ckall says if all xfrms used should be checked for same secid. * Return 0 if ckall is zero or all xfrms used have the same secid. * * Security hooks affecting all Key Management operations * * @key_alloc: * Permit allocation of a key and assign security data. Note that key does * not have a serial number assigned at this point. * @key points to the key. * @flags is the allocation flags * Return 0 if permission is granted, -ve error otherwise. * @key_free: * Notification of destruction; free security data. * @key points to the key. * No return value. * @key_permission: * See whether a specific operational right is granted to a process on a * key. * @key_ref refers to the key (key pointer + possession attribute bit). * @cred points to the credentials to provide the context against which to * evaluate the security data on the key. * @perm describes the combination of permissions required of this key. * Return 0 if permission is granted, -ve error otherwise. * @key_getsecurity: * Get a textual representation of the security context attached to a key * for the purposes of honouring KEYCTL_GETSECURITY. This function * allocates the storage for the NUL-terminated string and the caller * should free it. * @key points to the key to be queried. * @_buffer points to a pointer that should be set to point to the * resulting string (if no label or an error occurs). * Return the length of the string (including terminating NUL) or -ve if * an error. * May also return 0 (and a NULL buffer pointer) if there is no label. * * Security hooks affecting all System V IPC operations. * * @ipc_permission: * Check permissions for access to IPC * @ipcp contains the kernel IPC permission structure * @flag contains the desired (requested) permission set * Return 0 if permission is granted. * @ipc_getsecid: * Get the secid associated with the ipc object. * @ipcp contains the kernel IPC permission structure. * @secid contains a pointer to the location where result will be saved. * In case of failure, @secid will be set to zero. * * Security hooks for individual messages held in System V IPC message queues * * @msg_msg_alloc_security: * Allocate and attach a security structure to the msg->security field. * The security field is initialized to NULL when the structure is first * created. * @msg contains the message structure to be modified. * Return 0 if operation was successful and permission is granted. * @msg_msg_free_security: * Deallocate the security structure for this message. * @msg contains the message structure to be modified. * * Security hooks for System V IPC Message Queues * * @msg_queue_alloc_security: * Allocate and attach a security structure to the * @perm->security field. The security field is initialized to * NULL when the structure is first created. * @perm contains the IPC permissions of the message queue. * Return 0 if operation was successful and permission is granted. * @msg_queue_free_security: * Deallocate security field @perm->security for the message queue. * @perm contains the IPC permissions of the message queue. * @msg_queue_associate: * Check permission when a message queue is requested through the * msgget system call. This hook is only called when returning the * message queue identifier for an existing message queue, not when a * new message queue is created. * @perm contains the IPC permissions of the message queue. * @msqflg contains the operation control flags. * Return 0 if permission is granted. * @msg_queue_msgctl: * Check permission when a message control operation specified by @cmd * is to be performed on the message queue with permissions @perm. * The @perm may be NULL, e.g. for IPC_INFO or MSG_INFO. * @perm contains the IPC permissions of the msg queue. May be NULL. * @cmd contains the operation to be performed. * Return 0 if permission is granted. * @msg_queue_msgsnd: * Check permission before a message, @msg, is enqueued on the message * queue with permissions @perm. * @perm contains the IPC permissions of the message queue. * @msg contains the message to be enqueued. * @msqflg contains operational flags. * Return 0 if permission is granted. * @msg_queue_msgrcv: * Check permission before a message, @msg, is removed from the message * queue. The @target task structure contains a pointer to the * process that will be receiving the message (not equal to the current * process when inline receives are being performed). * @perm contains the IPC permissions of the message queue. * @msg contains the message destination. * @target contains the task structure for recipient process. * @type contains the type of message requested. * @mode contains the operational flags. * Return 0 if permission is granted. * * Security hooks for System V Shared Memory Segments * * @shm_alloc_security: * Allocate and attach a security structure to the @perm->security * field. The security field is initialized to NULL when the structure is * first created. * @perm contains the IPC permissions of the shared memory structure. * Return 0 if operation was successful and permission is granted. * @shm_free_security: * Deallocate the security structure @perm->security for the memory segment. * @perm contains the IPC permissions of the shared memory structure. * @shm_associate: * Check permission when a shared memory region is requested through the * shmget system call. This hook is only called when returning the shared * memory region identifier for an existing region, not when a new shared * memory region is created. * @perm contains the IPC permissions of the shared memory structure. * @shmflg contains the operation control flags. * Return 0 if permission is granted. * @shm_shmctl: * Check permission when a shared memory control operation specified by * @cmd is to be performed on the shared memory region with permissions @perm. * The @perm may be NULL, e.g. for IPC_INFO or SHM_INFO. * @perm contains the IPC permissions of the shared memory structure. * @cmd contains the operation to be performed. * Return 0 if permission is granted. * @shm_shmat: * Check permissions prior to allowing the shmat system call to attach the * shared memory segment with permissions @perm to the data segment of the * calling process. The attaching address is specified by @shmaddr. * @perm contains the IPC permissions of the shared memory structure. * @shmaddr contains the address to attach memory region to. * @shmflg contains the operational flags. * Return 0 if permission is granted. * * Security hooks for System V Semaphores * * @sem_alloc_security: * Allocate and attach a security structure to the @perm->security * field. The security field is initialized to NULL when the structure is * first created. * @perm contains the IPC permissions of the semaphore. * Return 0 if operation was successful and permission is granted. * @sem_free_security: * Deallocate security structure @perm->security for the semaphore. * @perm contains the IPC permissions of the semaphore. * @sem_associate: * Check permission when a semaphore is requested through the semget * system call. This hook is only called when returning the semaphore * identifier for an existing semaphore, not when a new one must be * created. * @perm contains the IPC permissions of the semaphore. * @semflg contains the operation control flags. * Return 0 if permission is granted. * @sem_semctl: * Check permission when a semaphore operation specified by @cmd is to be * performed on the semaphore. The @perm may be NULL, e.g. for * IPC_INFO or SEM_INFO. * @perm contains the IPC permissions of the semaphore. May be NULL. * @cmd contains the operation to be performed. * Return 0 if permission is granted. * @sem_semop: * Check permissions before performing operations on members of the * semaphore set. If the @alter flag is nonzero, the semaphore set * may be modified. * @perm contains the IPC permissions of the semaphore. * @sops contains the operations to perform. * @nsops contains the number of operations to perform. * @alter contains the flag indicating whether changes are to be made. * Return 0 if permission is granted. * * @binder_set_context_mgr: * Check whether @mgr is allowed to be the binder context manager. * @mgr contains the struct cred for the current binder process. * Return 0 if permission is granted. * @binder_transaction: * Check whether @from is allowed to invoke a binder transaction call * to @to. * @from contains the struct cred for the sending process. * @to contains the struct cred for the receiving process. * @binder_transfer_binder: * Check whether @from is allowed to transfer a binder reference to @to. * @from contains the struct cred for the sending process. * @to contains the struct cred for the receiving process. * @binder_transfer_file: * Check whether @from is allowed to transfer @file to @to. * @from contains the struct cred for the sending process. * @file contains the struct file being transferred. * @to contains the struct cred for the receiving process. * * @ptrace_access_check: * Check permission before allowing the current process to trace the * @child process. * Security modules may also want to perform a process tracing check * during an execve in the set_security or apply_creds hooks of * tracing check during an execve in the bprm_set_creds hook of * binprm_security_ops if the process is being traced and its security * attributes would be changed by the execve. * @child contains the task_struct structure for the target process. * @mode contains the PTRACE_MODE flags indicating the form of access. * Return 0 if permission is granted. * @ptrace_traceme: * Check that the @parent process has sufficient permission to trace the * current process before allowing the current process to present itself * to the @parent process for tracing. * @parent contains the task_struct structure for debugger process. * Return 0 if permission is granted. * @capget: * Get the @effective, @inheritable, and @permitted capability sets for * the @target process. The hook may also perform permission checking to * determine if the current process is allowed to see the capability sets * of the @target process. * @target contains the task_struct structure for target process. * @effective contains the effective capability set. * @inheritable contains the inheritable capability set. * @permitted contains the permitted capability set. * Return 0 if the capability sets were successfully obtained. * @capset: * Set the @effective, @inheritable, and @permitted capability sets for * the current process. * @new contains the new credentials structure for target process. * @old contains the current credentials structure for target process. * @effective contains the effective capability set. * @inheritable contains the inheritable capability set. * @permitted contains the permitted capability set. * Return 0 and update @new if permission is granted. * @capable: * Check whether the @tsk process has the @cap capability in the indicated * credentials. * @cred contains the credentials to use. * @ns contains the user namespace we want the capability in * @cap contains the capability <include/linux/capability.h>. * @opts contains options for the capable check <include/linux/security.h> * Return 0 if the capability is granted for @tsk. * @quotactl: * Check whether the quotactl syscall is allowed for this @sb. * @quota_on: * Check whether QUOTAON is allowed for this @dentry. * @syslog: * Check permission before accessing the kernel message ring or changing * logging to the console. * See the syslog(2) manual page for an explanation of the @type values. * @type contains the SYSLOG_ACTION_* constant from <include/linux/syslog.h> * Return 0 if permission is granted. * @settime: * Check permission to change the system time. * struct timespec64 is defined in <include/linux/time64.h> and timezone * is defined in <include/linux/time.h> * @ts contains new time * @tz contains new timezone * Return 0 if permission is granted. * @vm_enough_memory: * Check permissions for allocating a new virtual mapping. * @mm contains the mm struct it is being added to. * @pages contains the number of pages. * Return 0 if permission is granted. * * @getprocattr: * Provide the named process attribute for display in special files in * the /proc/.../attr directory. Attribute naming and the data displayed * is at the discretion of the security modules. The exception is the * "context" attribute, which will contain the security context of the * task as a nul terminated text string without trailing whitespace. * @ismaclabel: * Check if the extended attribute specified by @name * represents a MAC label. Returns 1 if name is a MAC * attribute otherwise returns 0. * @name full extended attribute name to check against * LSM as a MAC label. * * @secid_to_secctx: * Convert secid to security context. If secdata is NULL the length of * the result will be returned in seclen, but no secdata will be returned. * This does mean that the length could change between calls to check the * length and the next call which actually allocates and returns the * secdata. * @secid contains the security ID. * @secdata contains the pointer that stores the converted security * context. * @seclen pointer which contains the length of the data * @secctx_to_secid: * Convert security context to secid. * @secid contains the pointer to the generated security ID. * @secdata contains the security context. * * @release_secctx: * Release the security context. * @secdata contains the security context. * @seclen contains the length of the security context. * * Security hooks for Audit * * @audit_rule_init: * Allocate and initialize an LSM audit rule structure. * @field contains the required Audit action. * Fields flags are defined in <include/linux/audit.h> * @op contains the operator the rule uses. * @rulestr contains the context where the rule will be applied to. * @lsmrule contains a pointer to receive the result. * Return 0 if @lsmrule has been successfully set, * -EINVAL in case of an invalid rule. * * @audit_rule_known: * Specifies whether given @krule contains any fields related to * current LSM. * @krule contains the audit rule of interest. * Return 1 in case of relation found, 0 otherwise. * * @audit_rule_match: * Determine if given @secid matches a rule previously approved * by @audit_rule_known. * @secid contains the security id in question. * @field contains the field which relates to current LSM. * @op contains the operator that will be used for matching. * @lrule points to the audit rule that will be checked against. * Return 1 if secid matches the rule, 0 if it does not, -ERRNO on failure. * * @audit_rule_free: * Deallocate the LSM audit rule structure previously allocated by * audit_rule_init. * @lsmrule contains the allocated rule * * @inode_invalidate_secctx: * Notify the security module that it must revalidate the security context * of an inode. * * @inode_notifysecctx: * Notify the security module of what the security context of an inode * should be. Initializes the incore security context managed by the * security module for this inode. Example usage: NFS client invokes * this hook to initialize the security context in its incore inode to the * value provided by the server for the file when the server returned the * file's attributes to the client. * Must be called with inode->i_mutex locked. * @inode we wish to set the security context of. * @ctx contains the string which we wish to set in the inode. * @ctxlen contains the length of @ctx. * * @inode_setsecctx: * Change the security context of an inode. Updates the * incore security context managed by the security module and invokes the * fs code as needed (via __vfs_setxattr_noperm) to update any backing * xattrs that represent the context. Example usage: NFS server invokes * this hook to change the security context in its incore inode and on the * backing filesystem to a value provided by the client on a SETATTR * operation. * Must be called with inode->i_mutex locked. * @dentry contains the inode we wish to set the security context of. * @ctx contains the string which we wish to set in the inode. * @ctxlen contains the length of @ctx. * * @inode_getsecctx: * On success, returns 0 and fills out @ctx and @ctxlen with the security * context for the given @inode. * @inode we wish to get the security context of. * @ctx is a pointer in which to place the allocated security context. * @ctxlen points to the place to put the length of @ctx. * * Security hooks for the general notification queue: * * @post_notification: * Check to see if a watch notification can be posted to a particular * queue. * @w_cred: The credentials of the whoever set the watch. * @cred: The event-triggerer's credentials * @n: The notification being posted * * @watch_key: * Check to see if a process is allowed to watch for event notifications * from a key or keyring. * @key: The key to watch. * * Security hooks for using the eBPF maps and programs functionalities through * eBPF syscalls. * * @bpf: * Do a initial check for all bpf syscalls after the attribute is copied * into the kernel. The actual security module can implement their own * rules to check the specific cmd they need. * * @bpf_map: * Do a check when the kernel generate and return a file descriptor for * eBPF maps. * * @map: bpf map that we want to access * @mask: the access flags * * @bpf_prog: * Do a check when the kernel generate and return a file descriptor for * eBPF programs. * * @prog: bpf prog that userspace want to use. * * @bpf_map_alloc_security: * Initialize the security field inside bpf map. * * @bpf_map_free_security: * Clean up the security information stored inside bpf map. * * @bpf_prog_alloc_security: * Initialize the security field inside bpf program. * * @bpf_prog_free_security: * Clean up the security information stored inside bpf prog. * * @locked_down: * Determine whether a kernel feature that potentially enables arbitrary * code execution in kernel space should be permitted. * * @what: kernel feature being accessed * * @lock_kernel_down * Put the kernel into lock-down mode. * * @where: Where the lock-down is originating from (e.g. command line option) * @level: The lock-down level (can only increase) * * Security hooks for perf events * * @perf_event_open: * Check whether the @type of perf_event_open syscall is allowed. * @perf_event_alloc: * Allocate and save perf_event security info. * @perf_event_free: * Release (free) perf_event security info. * @perf_event_read: * Read perf_event security info if allowed. * @perf_event_write: * Write perf_event security info if allowed. */ union security_list_options { #define LSM_HOOK(RET, DEFAULT, NAME, ...) RET (*NAME)(__VA_ARGS__); #include "lsm_hook_defs.h" #undef LSM_HOOK }; struct security_hook_heads { #define LSM_HOOK(RET, DEFAULT, NAME, ...) struct hlist_head NAME; #include "lsm_hook_defs.h" #undef LSM_HOOK } __randomize_layout; /* * Information that identifies a security module. */ struct lsm_id { const char *lsm; /* Name of the LSM */ int slot; /* Slot in lsmblob if one is allocated */ }; /* * Security module hook list structure. * For use with generic list macros for common operations. */ struct security_hook_list { struct hlist_node list; struct hlist_head *head; union security_list_options hook; struct lsm_id *lsmid; } __randomize_layout; /* * Security blob size or offset data. */ struct lsm_blob_sizes { int lbs_cred; int lbs_file; int lbs_inode; int lbs_superblock; int lbs_sock; int lbs_ipc; int lbs_msg_msg; int lbs_task; }; /* * LSM_RET_VOID is used as the default value in LSM_HOOK definitions for void * LSM hooks (in include/linux/lsm_hook_defs.h). */ #define LSM_RET_VOID ((void) 0) /* * Initializing a security_hook_list structure takes * up a lot of space in a source file. This macro takes * care of the common case and reduces the amount of * text involved. */ #define LSM_HOOK_INIT(HEAD, HOOK) \ { .head = &security_hook_heads.HEAD, .hook = { .HEAD = HOOK } } extern struct security_hook_heads security_hook_heads; extern char *lsm_names; extern void security_add_hooks(struct security_hook_list *hooks, int count, struct lsm_id *lsmid); #define LSM_FLAG_LEGACY_MAJOR BIT(0) #define LSM_FLAG_EXCLUSIVE BIT(1) enum lsm_order { LSM_ORDER_FIRST = -1, /* This is only for capabilities. */ LSM_ORDER_MUTABLE = 0, }; struct lsm_info { const char *name; /* Required. */ enum lsm_order order; /* Optional: default is LSM_ORDER_MUTABLE */ unsigned long flags; /* Optional: flags describing LSM */ int *enabled; /* Optional: controlled by CONFIG_LSM */ int (*init)(void); /* Required. */ struct lsm_blob_sizes *blobs; /* Optional: for blob sharing. */ }; extern struct lsm_info __start_lsm_info[], __end_lsm_info[]; extern struct lsm_info __start_early_lsm_info[], __end_early_lsm_info[]; #define DEFINE_LSM(lsm) \ static struct lsm_info __lsm_##lsm \ __used __section(".lsm_info.init") \ __aligned(sizeof(unsigned long)) #define DEFINE_EARLY_LSM(lsm) \ static struct lsm_info __early_lsm_##lsm \ __used __section(".early_lsm_info.init") \ __aligned(sizeof(unsigned long)) #ifdef CONFIG_SECURITY_SELINUX_DISABLE /* * Assuring the safety of deleting a security module is up to * the security module involved. This may entail ordering the * module's hook list in a particular way, refusing to disable * the module once a policy is loaded or any number of other * actions better imagined than described. * * The name of the configuration option reflects the only module * that currently uses the mechanism. Any developer who thinks * disabling their module is a good idea needs to be at least as * careful as the SELinux team. */ static inline void security_delete_hooks(struct security_hook_list *hooks, int count) { int i; for (i = 0; i < count; i++) hlist_del_rcu(&hooks[i].list); } #endif /* CONFIG_SECURITY_SELINUX_DISABLE */ /* Currently required to handle SELinux runtime hook disable. */ #ifdef CONFIG_SECURITY_WRITABLE_HOOKS #define __lsm_ro_after_init #else #define __lsm_ro_after_init __ro_after_init #endif /* CONFIG_SECURITY_WRITABLE_HOOKS */ extern int lsm_inode_alloc(struct inode *inode); /** * lsm_task_display - the "display" LSM for this task * @task: The task to report on * * Returns the task's display LSM slot. */ static inline int lsm_task_display(struct task_struct *task) { #ifdef CONFIG_SECURITY int *display = task->security; if (display) return *display; #endif return LSMBLOB_INVALID; } /* Same as lsm_task_display(), using struct cred as input */ static inline int lsm_cred_display(struct cred *cred) { #ifdef CONFIG_SECURITY int *display = cred->security; if (display) return *display; #endif return LSMBLOB_INVALID; } #endif /* ! __LINUX_LSM_HOOKS_H */ PK ! ���M M pm_clock.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * pm_clock.h - Definitions and headers related to device clocks. * * Copyright (C) 2011 Rafael J. Wysocki <rjw@sisk.pl>, Renesas Electronics Corp. */ #ifndef _LINUX_PM_CLOCK_H #define _LINUX_PM_CLOCK_H #include <linux/device.h> #include <linux/notifier.h> struct pm_clk_notifier_block { struct notifier_block nb; struct dev_pm_domain *pm_domain; char *con_ids[]; }; struct clk; #ifdef CONFIG_PM extern int pm_clk_runtime_suspend(struct device *dev); extern int pm_clk_runtime_resume(struct device *dev); #define USE_PM_CLK_RUNTIME_OPS \ .runtime_suspend = pm_clk_runtime_suspend, \ .runtime_resume = pm_clk_runtime_resume, #else #define USE_PM_CLK_RUNTIME_OPS #endif #ifdef CONFIG_PM_CLK static inline bool pm_clk_no_clocks(struct device *dev) { return dev && dev->power.subsys_data && list_empty(&dev->power.subsys_data->clock_list); } extern void pm_clk_init(struct device *dev); extern int pm_clk_create(struct device *dev); extern void pm_clk_destroy(struct device *dev); extern int pm_clk_add(struct device *dev, const char *con_id); extern int pm_clk_add_clk(struct device *dev, struct clk *clk); extern int of_pm_clk_add_clk(struct device *dev, const char *name); extern int of_pm_clk_add_clks(struct device *dev); extern void pm_clk_remove(struct device *dev, const char *con_id); extern void pm_clk_remove_clk(struct device *dev, struct clk *clk); extern int pm_clk_suspend(struct device *dev); extern int pm_clk_resume(struct device *dev); extern int devm_pm_clk_create(struct device *dev); #else static inline bool pm_clk_no_clocks(struct device *dev) { return true; } static inline void pm_clk_init(struct device *dev) { } static inline int pm_clk_create(struct device *dev) { return -EINVAL; } static inline void pm_clk_destroy(struct device *dev) { } static inline int pm_clk_add(struct device *dev, const char *con_id) { return -EINVAL; } static inline int pm_clk_add_clk(struct device *dev, struct clk *clk) { return -EINVAL; } static inline int of_pm_clk_add_clks(struct device *dev) { return -EINVAL; } static inline void pm_clk_remove(struct device *dev, const char *con_id) { } #define pm_clk_suspend NULL #define pm_clk_resume NULL static inline void pm_clk_remove_clk(struct device *dev, struct clk *clk) { } static inline int devm_pm_clk_create(struct device *dev) { return -EINVAL; } #endif #ifdef CONFIG_HAVE_CLK extern void pm_clk_add_notifier(struct bus_type *bus, struct pm_clk_notifier_block *clknb); #else static inline void pm_clk_add_notifier(struct bus_type *bus, struct pm_clk_notifier_block *clknb) { } #endif #endif PK ! �ǜaq q spinlock_rt.hnu �[��� // SPDX-License-Identifier: GPL-2.0-only #ifndef __LINUX_SPINLOCK_RT_H #define __LINUX_SPINLOCK_RT_H #ifndef __LINUX_SPINLOCK_H #error Do not include directly. Use spinlock.h #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC extern void __rt_spin_lock_init(spinlock_t *lock, const char *name, struct lock_class_key *key, bool percpu); #else static inline void __rt_spin_lock_init(spinlock_t *lock, const char *name, struct lock_class_key *key, bool percpu) { } #endif #define spin_lock_init(slock) \ do { \ static struct lock_class_key __key; \ \ rt_mutex_base_init(&(slock)->lock); \ __rt_spin_lock_init(slock, #slock, &__key, false); \ } while (0) #define local_spin_lock_init(slock) \ do { \ static struct lock_class_key __key; \ \ rt_mutex_base_init(&(slock)->lock); \ __rt_spin_lock_init(slock, #slock, &__key, true); \ } while (0) extern void rt_spin_lock(spinlock_t *lock); extern void rt_spin_lock_nested(spinlock_t *lock, int subclass); extern void rt_spin_lock_nest_lock(spinlock_t *lock, struct lockdep_map *nest_lock); extern void rt_spin_unlock(spinlock_t *lock); extern void rt_spin_lock_unlock(spinlock_t *lock); extern int rt_spin_trylock_bh(spinlock_t *lock); extern int rt_spin_trylock(spinlock_t *lock); static __always_inline void spin_lock(spinlock_t *lock) { rt_spin_lock(lock); } #ifdef CONFIG_LOCKDEP # define __spin_lock_nested(lock, subclass) \ rt_spin_lock_nested(lock, subclass) # define __spin_lock_nest_lock(lock, nest_lock) \ do { \ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ rt_spin_lock_nest_lock(lock, &(nest_lock)->dep_map); \ } while (0) # define __spin_lock_irqsave_nested(lock, flags, subclass) \ do { \ typecheck(unsigned long, flags); \ flags = 0; \ __spin_lock_nested(lock, subclass); \ } while (0) #else /* * Always evaluate the 'subclass' argument to avoid that the compiler * warns about set-but-not-used variables when building with * CONFIG_DEBUG_LOCK_ALLOC=n and with W=1. */ # define __spin_lock_nested(lock, subclass) spin_lock(((void)(subclass), (lock))) # define __spin_lock_nest_lock(lock, subclass) spin_lock(((void)(subclass), (lock))) # define __spin_lock_irqsave_nested(lock, flags, subclass) \ spin_lock_irqsave(((void)(subclass), (lock)), flags) #endif #define spin_lock_nested(lock, subclass) \ __spin_lock_nested(lock, subclass) #define spin_lock_nest_lock(lock, nest_lock) \ __spin_lock_nest_lock(lock, nest_lock) #define spin_lock_irqsave_nested(lock, flags, subclass) \ __spin_lock_irqsave_nested(lock, flags, subclass) static __always_inline void spin_lock_bh(spinlock_t *lock) { /* Investigate: Drop bh when blocking ? */ local_bh_disable(); rt_spin_lock(lock); } static __always_inline void spin_lock_irq(spinlock_t *lock) { rt_spin_lock(lock); } #define spin_lock_irqsave(lock, flags) \ do { \ typecheck(unsigned long, flags); \ flags = 0; \ spin_lock(lock); \ } while (0) static __always_inline void spin_unlock(spinlock_t *lock) { rt_spin_unlock(lock); } static __always_inline void spin_unlock_bh(spinlock_t *lock) { rt_spin_unlock(lock); local_bh_enable(); } static __always_inline void spin_unlock_irq(spinlock_t *lock) { rt_spin_unlock(lock); } static __always_inline void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags) { rt_spin_unlock(lock); } #define spin_trylock(lock) \ __cond_lock(lock, rt_spin_trylock(lock)) #define spin_trylock_bh(lock) \ __cond_lock(lock, rt_spin_trylock_bh(lock)) #define spin_trylock_irq(lock) \ __cond_lock(lock, rt_spin_trylock(lock)) #define __spin_trylock_irqsave(lock, flags) \ ({ \ int __locked; \ \ typecheck(unsigned long, flags); \ flags = 0; \ __locked = spin_trylock(lock); \ __locked; \ }) #define spin_trylock_irqsave(lock, flags) \ __cond_lock(lock, __spin_trylock_irqsave(lock, flags)) #define spin_is_contended(lock) (((void)(lock), 0)) static inline int spin_is_locked(spinlock_t *lock) { return rt_mutex_base_is_locked(&lock->lock); } #define assert_spin_locked(lock) BUG_ON(!spin_is_locked(lock)) #include <linux/rwlock_rt.h> #endif PK ! ��نlI lI bpf-cgroup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _BPF_CGROUP_H #define _BPF_CGROUP_H #include <linux/bpf.h> #include <linux/errno.h> #include <linux/jump_label.h> #include <linux/percpu.h> #include <linux/percpu-refcount.h> #include <linux/rbtree.h> #include <uapi/linux/bpf.h> struct sock; struct sockaddr; struct cgroup; struct sk_buff; struct bpf_map; struct bpf_prog; struct bpf_sock_ops_kern; struct bpf_cgroup_storage; struct ctl_table; struct ctl_table_header; struct task_struct; #ifdef CONFIG_CGROUP_BPF enum cgroup_bpf_attach_type { CGROUP_BPF_ATTACH_TYPE_INVALID = -1, CGROUP_INET_INGRESS = 0, CGROUP_INET_EGRESS, CGROUP_INET_SOCK_CREATE, CGROUP_SOCK_OPS, CGROUP_DEVICE, CGROUP_INET4_BIND, CGROUP_INET6_BIND, CGROUP_INET4_CONNECT, CGROUP_INET6_CONNECT, CGROUP_INET4_POST_BIND, CGROUP_INET6_POST_BIND, CGROUP_UDP4_SENDMSG, CGROUP_UDP6_SENDMSG, CGROUP_SYSCTL, CGROUP_UDP4_RECVMSG, CGROUP_UDP6_RECVMSG, CGROUP_GETSOCKOPT, CGROUP_SETSOCKOPT, CGROUP_INET4_GETPEERNAME, CGROUP_INET6_GETPEERNAME, CGROUP_INET4_GETSOCKNAME, CGROUP_INET6_GETSOCKNAME, CGROUP_INET_SOCK_RELEASE, MAX_CGROUP_BPF_ATTACH_TYPE }; #define CGROUP_ATYPE(type) \ case BPF_##type: return type static inline enum cgroup_bpf_attach_type to_cgroup_bpf_attach_type(enum bpf_attach_type attach_type) { switch (attach_type) { CGROUP_ATYPE(CGROUP_INET_INGRESS); CGROUP_ATYPE(CGROUP_INET_EGRESS); CGROUP_ATYPE(CGROUP_INET_SOCK_CREATE); CGROUP_ATYPE(CGROUP_SOCK_OPS); CGROUP_ATYPE(CGROUP_DEVICE); CGROUP_ATYPE(CGROUP_INET4_BIND); CGROUP_ATYPE(CGROUP_INET6_BIND); CGROUP_ATYPE(CGROUP_INET4_CONNECT); CGROUP_ATYPE(CGROUP_INET6_CONNECT); CGROUP_ATYPE(CGROUP_INET4_POST_BIND); CGROUP_ATYPE(CGROUP_INET6_POST_BIND); CGROUP_ATYPE(CGROUP_UDP4_SENDMSG); CGROUP_ATYPE(CGROUP_UDP6_SENDMSG); CGROUP_ATYPE(CGROUP_SYSCTL); CGROUP_ATYPE(CGROUP_UDP4_RECVMSG); CGROUP_ATYPE(CGROUP_UDP6_RECVMSG); CGROUP_ATYPE(CGROUP_GETSOCKOPT); CGROUP_ATYPE(CGROUP_SETSOCKOPT); CGROUP_ATYPE(CGROUP_INET4_GETPEERNAME); CGROUP_ATYPE(CGROUP_INET6_GETPEERNAME); CGROUP_ATYPE(CGROUP_INET4_GETSOCKNAME); CGROUP_ATYPE(CGROUP_INET6_GETSOCKNAME); CGROUP_ATYPE(CGROUP_INET_SOCK_RELEASE); default: return CGROUP_BPF_ATTACH_TYPE_INVALID; } } #undef CGROUP_ATYPE extern struct static_key_false cgroup_bpf_enabled_key[MAX_CGROUP_BPF_ATTACH_TYPE]; #define cgroup_bpf_enabled(atype) static_branch_unlikely(&cgroup_bpf_enabled_key[atype]) struct bpf_cgroup_storage_map; struct bpf_storage_buffer { struct rcu_head rcu; char data[]; }; struct bpf_cgroup_storage { union { struct bpf_storage_buffer *buf; void __percpu *percpu_buf; }; struct bpf_cgroup_storage_map *map; struct bpf_cgroup_storage_key key; struct list_head list_map; struct list_head list_cg; struct rb_node node; struct rcu_head rcu; }; struct bpf_cgroup_link { struct bpf_link link; struct cgroup *cgroup; enum bpf_attach_type type; }; struct bpf_prog_list { struct list_head node; struct bpf_prog *prog; struct bpf_cgroup_link *link; struct bpf_cgroup_storage *storage[MAX_BPF_CGROUP_STORAGE_TYPE]; }; struct bpf_prog_array; struct cgroup_bpf { /* array of effective progs in this cgroup */ struct bpf_prog_array __rcu *effective[MAX_CGROUP_BPF_ATTACH_TYPE]; /* attached progs to this cgroup and attach flags * when flags == 0 or BPF_F_ALLOW_OVERRIDE the progs list will * have either zero or one element * when BPF_F_ALLOW_MULTI the list can have up to BPF_CGROUP_MAX_PROGS */ struct list_head progs[MAX_CGROUP_BPF_ATTACH_TYPE]; u32 flags[MAX_CGROUP_BPF_ATTACH_TYPE]; /* list of cgroup shared storages */ struct list_head storages; /* temp storage for effective prog array used by prog_attach/detach */ struct bpf_prog_array *inactive; /* reference counter used to detach bpf programs after cgroup removal */ struct percpu_ref refcnt; /* cgroup_bpf is released using a work queue */ struct work_struct release_work; }; int cgroup_bpf_inherit(struct cgroup *cgrp); void cgroup_bpf_offline(struct cgroup *cgrp); int __cgroup_bpf_attach(struct cgroup *cgrp, struct bpf_prog *prog, struct bpf_prog *replace_prog, struct bpf_cgroup_link *link, enum bpf_attach_type type, u32 flags); int __cgroup_bpf_detach(struct cgroup *cgrp, struct bpf_prog *prog, struct bpf_cgroup_link *link, enum bpf_attach_type type); int __cgroup_bpf_query(struct cgroup *cgrp, const union bpf_attr *attr, union bpf_attr __user *uattr); /* Wrapper for __cgroup_bpf_*() protected by cgroup_mutex */ int cgroup_bpf_attach(struct cgroup *cgrp, struct bpf_prog *prog, struct bpf_prog *replace_prog, struct bpf_cgroup_link *link, enum bpf_attach_type type, u32 flags); int cgroup_bpf_detach(struct cgroup *cgrp, struct bpf_prog *prog, enum bpf_attach_type type); int cgroup_bpf_query(struct cgroup *cgrp, const union bpf_attr *attr, union bpf_attr __user *uattr); int __cgroup_bpf_run_filter_skb(struct sock *sk, struct sk_buff *skb, enum cgroup_bpf_attach_type atype); int __cgroup_bpf_run_filter_sk(struct sock *sk, enum cgroup_bpf_attach_type atype); int __cgroup_bpf_run_filter_sock_addr(struct sock *sk, struct sockaddr *uaddr, enum cgroup_bpf_attach_type atype, void *t_ctx, u32 *flags); int __cgroup_bpf_run_filter_sock_ops(struct sock *sk, struct bpf_sock_ops_kern *sock_ops, enum cgroup_bpf_attach_type atype); int __cgroup_bpf_check_dev_permission(short dev_type, u32 major, u32 minor, short access, enum cgroup_bpf_attach_type atype); int __cgroup_bpf_run_filter_sysctl(struct ctl_table_header *head, struct ctl_table *table, int write, char **buf, size_t *pcount, loff_t *ppos, enum cgroup_bpf_attach_type atype); int __cgroup_bpf_run_filter_setsockopt(struct sock *sock, int *level, int *optname, char __user *optval, int *optlen, char **kernel_optval); int __cgroup_bpf_run_filter_getsockopt(struct sock *sk, int level, int optname, char __user *optval, int __user *optlen, int max_optlen, int retval); int __cgroup_bpf_run_filter_getsockopt_kern(struct sock *sk, int level, int optname, void *optval, int *optlen, int retval); static inline enum bpf_cgroup_storage_type cgroup_storage_type( struct bpf_map *map) { if (map->map_type == BPF_MAP_TYPE_PERCPU_CGROUP_STORAGE) return BPF_CGROUP_STORAGE_PERCPU; return BPF_CGROUP_STORAGE_SHARED; } struct bpf_cgroup_storage * cgroup_storage_lookup(struct bpf_cgroup_storage_map *map, void *key, bool locked); struct bpf_cgroup_storage *bpf_cgroup_storage_alloc(struct bpf_prog *prog, enum bpf_cgroup_storage_type stype); void bpf_cgroup_storage_free(struct bpf_cgroup_storage *storage); void bpf_cgroup_storage_link(struct bpf_cgroup_storage *storage, struct cgroup *cgroup, enum bpf_attach_type type); void bpf_cgroup_storage_unlink(struct bpf_cgroup_storage *storage); int bpf_cgroup_storage_assign(struct bpf_prog_aux *aux, struct bpf_map *map); int bpf_percpu_cgroup_storage_copy(struct bpf_map *map, void *key, void *value); int bpf_percpu_cgroup_storage_update(struct bpf_map *map, void *key, void *value, u64 flags); /* Wrappers for __cgroup_bpf_run_filter_skb() guarded by cgroup_bpf_enabled. */ #define BPF_CGROUP_RUN_PROG_INET_INGRESS(sk, skb) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_INET_INGRESS)) \ __ret = __cgroup_bpf_run_filter_skb(sk, skb, \ CGROUP_INET_INGRESS); \ \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_INET_EGRESS(sk, skb) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_INET_EGRESS) && sk && sk == skb->sk) { \ typeof(sk) __sk = sk_to_full_sk(sk); \ if (sk_fullsock(__sk)) \ __ret = __cgroup_bpf_run_filter_skb(__sk, skb, \ CGROUP_INET_EGRESS); \ } \ __ret; \ }) #define BPF_CGROUP_RUN_SK_PROG(sk, atype) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(atype)) { \ __ret = __cgroup_bpf_run_filter_sk(sk, atype); \ } \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_INET_SOCK(sk) \ BPF_CGROUP_RUN_SK_PROG(sk, CGROUP_INET_SOCK_CREATE) #define BPF_CGROUP_RUN_PROG_INET_SOCK_RELEASE(sk) \ BPF_CGROUP_RUN_SK_PROG(sk, CGROUP_INET_SOCK_RELEASE) #define BPF_CGROUP_RUN_PROG_INET4_POST_BIND(sk) \ BPF_CGROUP_RUN_SK_PROG(sk, CGROUP_INET4_POST_BIND) #define BPF_CGROUP_RUN_PROG_INET6_POST_BIND(sk) \ BPF_CGROUP_RUN_SK_PROG(sk, CGROUP_INET6_POST_BIND) #define BPF_CGROUP_RUN_SA_PROG(sk, uaddr, atype) \ ({ \ u32 __unused_flags; \ int __ret = 0; \ if (cgroup_bpf_enabled(atype)) \ __ret = __cgroup_bpf_run_filter_sock_addr(sk, uaddr, atype, \ NULL, \ &__unused_flags); \ __ret; \ }) #define BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, atype, t_ctx) \ ({ \ u32 __unused_flags; \ int __ret = 0; \ if (cgroup_bpf_enabled(atype)) { \ lock_sock(sk); \ __ret = __cgroup_bpf_run_filter_sock_addr(sk, uaddr, atype, \ t_ctx, \ &__unused_flags); \ release_sock(sk); \ } \ __ret; \ }) /* BPF_CGROUP_INET4_BIND and BPF_CGROUP_INET6_BIND can return extra flags * via upper bits of return code. The only flag that is supported * (at bit position 0) is to indicate CAP_NET_BIND_SERVICE capability check * should be bypassed (BPF_RET_BIND_NO_CAP_NET_BIND_SERVICE). */ #define BPF_CGROUP_RUN_PROG_INET_BIND_LOCK(sk, uaddr, atype, bind_flags) \ ({ \ u32 __flags = 0; \ int __ret = 0; \ if (cgroup_bpf_enabled(atype)) { \ lock_sock(sk); \ __ret = __cgroup_bpf_run_filter_sock_addr(sk, uaddr, atype, \ NULL, &__flags); \ release_sock(sk); \ if (__flags & BPF_RET_BIND_NO_CAP_NET_BIND_SERVICE) \ *bind_flags |= BIND_NO_CAP_NET_BIND_SERVICE; \ } \ __ret; \ }) #define BPF_CGROUP_PRE_CONNECT_ENABLED(sk) \ ((cgroup_bpf_enabled(CGROUP_INET4_CONNECT) || \ cgroup_bpf_enabled(CGROUP_INET6_CONNECT)) && \ (sk)->sk_prot->pre_connect) #define BPF_CGROUP_RUN_PROG_INET4_CONNECT(sk, uaddr) \ BPF_CGROUP_RUN_SA_PROG(sk, uaddr, CGROUP_INET4_CONNECT) #define BPF_CGROUP_RUN_PROG_INET6_CONNECT(sk, uaddr) \ BPF_CGROUP_RUN_SA_PROG(sk, uaddr, CGROUP_INET6_CONNECT) #define BPF_CGROUP_RUN_PROG_INET4_CONNECT_LOCK(sk, uaddr) \ BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, CGROUP_INET4_CONNECT, NULL) #define BPF_CGROUP_RUN_PROG_INET6_CONNECT_LOCK(sk, uaddr) \ BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, CGROUP_INET6_CONNECT, NULL) #define BPF_CGROUP_RUN_PROG_UDP4_SENDMSG_LOCK(sk, uaddr, t_ctx) \ BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, CGROUP_UDP4_SENDMSG, t_ctx) #define BPF_CGROUP_RUN_PROG_UDP6_SENDMSG_LOCK(sk, uaddr, t_ctx) \ BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, CGROUP_UDP6_SENDMSG, t_ctx) #define BPF_CGROUP_RUN_PROG_UDP4_RECVMSG_LOCK(sk, uaddr) \ BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, CGROUP_UDP4_RECVMSG, NULL) #define BPF_CGROUP_RUN_PROG_UDP6_RECVMSG_LOCK(sk, uaddr) \ BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, CGROUP_UDP6_RECVMSG, NULL) /* The SOCK_OPS"_SK" macro should be used when sock_ops->sk is not a * fullsock and its parent fullsock cannot be traced by * sk_to_full_sk(). * * e.g. sock_ops->sk is a request_sock and it is under syncookie mode. * Its listener-sk is not attached to the rsk_listener. * In this case, the caller holds the listener-sk (unlocked), * set its sock_ops->sk to req_sk, and call this SOCK_OPS"_SK" with * the listener-sk such that the cgroup-bpf-progs of the * listener-sk will be run. * * Regardless of syncookie mode or not, * calling bpf_setsockopt on listener-sk will not make sense anyway, * so passing 'sock_ops->sk == req_sk' to the bpf prog is appropriate here. */ #define BPF_CGROUP_RUN_PROG_SOCK_OPS_SK(sock_ops, sk) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_SOCK_OPS)) \ __ret = __cgroup_bpf_run_filter_sock_ops(sk, \ sock_ops, \ CGROUP_SOCK_OPS); \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_SOCK_OPS(sock_ops) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_SOCK_OPS) && (sock_ops)->sk) { \ typeof(sk) __sk = sk_to_full_sk((sock_ops)->sk); \ if (__sk && sk_fullsock(__sk)) \ __ret = __cgroup_bpf_run_filter_sock_ops(__sk, \ sock_ops, \ CGROUP_SOCK_OPS); \ } \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_DEVICE_CGROUP(atype, major, minor, access) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_DEVICE)) \ __ret = __cgroup_bpf_check_dev_permission(atype, major, minor, \ access, \ CGROUP_DEVICE); \ \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_SYSCTL(head, table, write, buf, count, pos) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_SYSCTL)) \ __ret = __cgroup_bpf_run_filter_sysctl(head, table, write, \ buf, count, pos, \ CGROUP_SYSCTL); \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_SETSOCKOPT(sock, level, optname, optval, optlen, \ kernel_optval) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_SETSOCKOPT)) \ __ret = __cgroup_bpf_run_filter_setsockopt(sock, level, \ optname, optval, \ optlen, \ kernel_optval); \ __ret; \ }) #define BPF_CGROUP_GETSOCKOPT_MAX_OPTLEN(optlen) \ ({ \ int __ret = 0; \ if (cgroup_bpf_enabled(CGROUP_GETSOCKOPT)) \ get_user(__ret, optlen); \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_GETSOCKOPT(sock, level, optname, optval, optlen, \ max_optlen, retval) \ ({ \ int __ret = retval; \ if (cgroup_bpf_enabled(CGROUP_GETSOCKOPT)) \ if (!(sock)->sk_prot->bpf_bypass_getsockopt || \ !INDIRECT_CALL_INET_1((sock)->sk_prot->bpf_bypass_getsockopt, \ tcp_bpf_bypass_getsockopt, \ level, optname)) \ __ret = __cgroup_bpf_run_filter_getsockopt( \ sock, level, optname, optval, optlen, \ max_optlen, retval); \ __ret; \ }) #define BPF_CGROUP_RUN_PROG_GETSOCKOPT_KERN(sock, level, optname, optval, \ optlen, retval) \ ({ \ int __ret = retval; \ if (cgroup_bpf_enabled(CGROUP_GETSOCKOPT)) \ __ret = __cgroup_bpf_run_filter_getsockopt_kern( \ sock, level, optname, optval, optlen, retval); \ __ret; \ }) int cgroup_bpf_prog_attach(const union bpf_attr *attr, enum bpf_prog_type ptype, struct bpf_prog *prog); int cgroup_bpf_prog_detach(const union bpf_attr *attr, enum bpf_prog_type ptype); int cgroup_bpf_link_attach(const union bpf_attr *attr, struct bpf_prog *prog); int cgroup_bpf_prog_query(const union bpf_attr *attr, union bpf_attr __user *uattr); #else struct cgroup_bpf {}; static inline int cgroup_bpf_inherit(struct cgroup *cgrp) { return 0; } static inline void cgroup_bpf_offline(struct cgroup *cgrp) {} static inline int cgroup_bpf_prog_attach(const union bpf_attr *attr, enum bpf_prog_type ptype, struct bpf_prog *prog) { return -EINVAL; } static inline int cgroup_bpf_prog_detach(const union bpf_attr *attr, enum bpf_prog_type ptype) { return -EINVAL; } static inline int cgroup_bpf_link_attach(const union bpf_attr *attr, struct bpf_prog *prog) { return -EINVAL; } static inline int cgroup_bpf_prog_query(const union bpf_attr *attr, union bpf_attr __user *uattr) { return -EINVAL; } static inline int bpf_cgroup_storage_assign(struct bpf_prog_aux *aux, struct bpf_map *map) { return 0; } static inline struct bpf_cgroup_storage *bpf_cgroup_storage_alloc( struct bpf_prog *prog, enum bpf_cgroup_storage_type stype) { return NULL; } static inline void bpf_cgroup_storage_free( struct bpf_cgroup_storage *storage) {} static inline int bpf_percpu_cgroup_storage_copy(struct bpf_map *map, void *key, void *value) { return 0; } static inline int bpf_percpu_cgroup_storage_update(struct bpf_map *map, void *key, void *value, u64 flags) { return 0; } #define cgroup_bpf_enabled(atype) (0) #define BPF_CGROUP_RUN_SA_PROG_LOCK(sk, uaddr, atype, t_ctx) ({ 0; }) #define BPF_CGROUP_RUN_SA_PROG(sk, uaddr, atype) ({ 0; }) #define BPF_CGROUP_PRE_CONNECT_ENABLED(sk) (0) #define BPF_CGROUP_RUN_PROG_INET_INGRESS(sk,skb) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET_EGRESS(sk,skb) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET_SOCK(sk) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET_SOCK_RELEASE(sk) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET_BIND_LOCK(sk, uaddr, atype, flags) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET4_POST_BIND(sk) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET6_POST_BIND(sk) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET4_CONNECT(sk, uaddr) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET4_CONNECT_LOCK(sk, uaddr) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET6_CONNECT(sk, uaddr) ({ 0; }) #define BPF_CGROUP_RUN_PROG_INET6_CONNECT_LOCK(sk, uaddr) ({ 0; }) #define BPF_CGROUP_RUN_PROG_UDP4_SENDMSG_LOCK(sk, uaddr, t_ctx) ({ 0; }) #define BPF_CGROUP_RUN_PROG_UDP6_SENDMSG_LOCK(sk, uaddr, t_ctx) ({ 0; }) #define BPF_CGROUP_RUN_PROG_UDP4_RECVMSG_LOCK(sk, uaddr) ({ 0; }) #define BPF_CGROUP_RUN_PROG_UDP6_RECVMSG_LOCK(sk, uaddr) ({ 0; }) #define BPF_CGROUP_RUN_PROG_SOCK_OPS(sock_ops) ({ 0; }) #define BPF_CGROUP_RUN_PROG_DEVICE_CGROUP(atype, major, minor, access) ({ 0; }) #define BPF_CGROUP_RUN_PROG_SYSCTL(head,table,write,buf,count,pos) ({ 0; }) #define BPF_CGROUP_GETSOCKOPT_MAX_OPTLEN(optlen) ({ 0; }) #define BPF_CGROUP_RUN_PROG_GETSOCKOPT(sock, level, optname, optval, \ optlen, max_optlen, retval) ({ retval; }) #define BPF_CGROUP_RUN_PROG_GETSOCKOPT_KERN(sock, level, optname, optval, \ optlen, retval) ({ retval; }) #define BPF_CGROUP_RUN_PROG_SETSOCKOPT(sock, level, optname, optval, optlen, \ kernel_optval) ({ 0; }) #endif /* CONFIG_CGROUP_BPF */ #endif /* _BPF_CGROUP_H */ PK ! �6}$ $ if_rmnet.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only * Copyright (c) 2013-2019, 2021 The Linux Foundation. All rights reserved. */ #ifndef _LINUX_IF_RMNET_H_ #define _LINUX_IF_RMNET_H_ struct rmnet_map_header { u8 flags; /* MAP_CMD_FLAG, MAP_PAD_LEN_MASK */ u8 mux_id; __be16 pkt_len; /* Length of packet, including pad */ } __aligned(1); /* rmnet_map_header flags field: * PAD_LEN: number of pad bytes following packet data * CMD: 1 = packet contains a MAP command; 0 = packet contains data * NEXT_HEADER: 1 = packet contains V5 CSUM header 0 = no V5 CSUM header */ #define MAP_PAD_LEN_MASK GENMASK(5, 0) #define MAP_NEXT_HEADER_FLAG BIT(6) #define MAP_CMD_FLAG BIT(7) struct rmnet_map_dl_csum_trailer { u8 reserved1; u8 flags; /* MAP_CSUM_DL_VALID_FLAG */ __be16 csum_start_offset; __be16 csum_length; __sum16 csum_value; } __aligned(1); /* rmnet_map_dl_csum_trailer flags field: * VALID: 1 = checksum and length valid; 0 = ignore them */ #define MAP_CSUM_DL_VALID_FLAG BIT(0) struct rmnet_map_ul_csum_header { __be16 csum_start_offset; __be16 csum_info; /* MAP_CSUM_UL_* */ } __aligned(1); /* csum_info field: * OFFSET: where (offset in bytes) to insert computed checksum * UDP: 1 = UDP checksum (zero checkum means no checksum) * ENABLED: 1 = checksum computation requested */ #define MAP_CSUM_UL_OFFSET_MASK GENMASK(13, 0) #define MAP_CSUM_UL_UDP_FLAG BIT(14) #define MAP_CSUM_UL_ENABLED_FLAG BIT(15) /* MAP CSUM headers */ struct rmnet_map_v5_csum_header { u8 header_info; u8 csum_info; __be16 reserved; } __aligned(1); /* v5 header_info field * NEXT_HEADER: represents whether there is any next header * HEADER_TYPE: represents the type of this header * * csum_info field * CSUM_VALID_OR_REQ: * 1 = for UL, checksum computation is requested. * 1 = for DL, validated the checksum and has found it valid */ #define MAPV5_HDRINFO_NXT_HDR_FLAG BIT(0) #define MAPV5_HDRINFO_HDR_TYPE_FMASK GENMASK(7, 1) #define MAPV5_CSUMINFO_VALID_FLAG BIT(7) #define RMNET_MAP_HEADER_TYPE_CSUM_OFFLOAD 2 #endif /* !(_LINUX_IF_RMNET_H_) */ PK ! �7n�� � dmar.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2006, Intel Corporation. * * Copyright (C) Ashok Raj <ashok.raj@intel.com> * Copyright (C) Shaohua Li <shaohua.li@intel.com> */ #ifndef __DMAR_H__ #define __DMAR_H__ #include <linux/acpi.h> #include <linux/types.h> #include <linux/msi.h> #include <linux/irqreturn.h> #include <linux/rwsem.h> #include <linux/rculist.h> struct acpi_dmar_header; #ifdef CONFIG_X86 # define DMAR_UNITS_SUPPORTED MAX_IO_APICS #else # define DMAR_UNITS_SUPPORTED 64 #endif /* DMAR Flags */ #define DMAR_INTR_REMAP 0x1 #define DMAR_X2APIC_OPT_OUT 0x2 #define DMAR_PLATFORM_OPT_IN 0x4 struct intel_iommu; struct dmar_dev_scope { struct device __rcu *dev; u8 bus; u8 devfn; }; #ifdef CONFIG_DMAR_TABLE extern struct acpi_table_header *dmar_tbl; struct dmar_drhd_unit { struct list_head list; /* list of drhd units */ struct acpi_dmar_header *hdr; /* ACPI header */ u64 reg_base_addr; /* register base address*/ struct dmar_dev_scope *devices;/* target device array */ int devices_cnt; /* target device count */ u16 segment; /* PCI domain */ u8 ignored:1; /* ignore drhd */ u8 include_all:1; u8 gfx_dedicated:1; /* graphic dedicated */ struct intel_iommu *iommu; }; struct dmar_pci_path { u8 bus; u8 device; u8 function; }; struct dmar_pci_notify_info { struct pci_dev *dev; unsigned long event; int bus; u16 seg; u16 level; struct dmar_pci_path path[]; } __attribute__((packed)); extern struct rw_semaphore dmar_global_lock; extern struct list_head dmar_drhd_units; #define for_each_drhd_unit(drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) #define for_each_active_drhd_unit(drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) \ if (drhd->ignored) {} else #define for_each_active_iommu(i, drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) \ if (i=drhd->iommu, drhd->ignored) {} else #define for_each_iommu(i, drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) \ if (i=drhd->iommu, 0) {} else static inline bool dmar_rcu_check(void) { return rwsem_is_locked(&dmar_global_lock) || system_state == SYSTEM_BOOTING; } #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check()) #define for_each_dev_scope(devs, cnt, i, tmp) \ for ((i) = 0; ((tmp) = (i) < (cnt) ? \ dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \ (i)++) #define for_each_active_dev_scope(devs, cnt, i, tmp) \ for_each_dev_scope((devs), (cnt), (i), (tmp)) \ if (!(tmp)) { continue; } else extern int dmar_table_init(void); extern int dmar_dev_scope_init(void); extern void dmar_register_bus_notifier(void); extern int dmar_parse_dev_scope(void *start, void *end, int *cnt, struct dmar_dev_scope **devices, u16 segment); extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt); extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt); extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info, void *start, void*end, u16 segment, struct dmar_dev_scope *devices, int devices_cnt); extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info, u16 segment, struct dmar_dev_scope *devices, int count); /* Intel IOMMU detection */ extern int detect_intel_iommu(void); extern int enable_drhd_fault_handling(void); extern int dmar_device_add(acpi_handle handle); extern int dmar_device_remove(acpi_handle handle); static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg) { return 0; } #ifdef CONFIG_INTEL_IOMMU extern int iommu_detected, no_iommu; extern int intel_iommu_init(void); extern void intel_iommu_shutdown(void); extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg); extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg); extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg); extern int dmar_parse_one_satc(struct acpi_dmar_header *hdr, void *arg); extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg); extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert); extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info); #else /* !CONFIG_INTEL_IOMMU: */ static inline int intel_iommu_init(void) { return -ENODEV; } static inline void intel_iommu_shutdown(void) { } #define dmar_parse_one_rmrr dmar_res_noop #define dmar_parse_one_atsr dmar_res_noop #define dmar_check_one_atsr dmar_res_noop #define dmar_release_one_atsr dmar_res_noop #define dmar_parse_one_satc dmar_res_noop static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info) { return 0; } static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert) { return 0; } #endif /* CONFIG_INTEL_IOMMU */ #ifdef CONFIG_IRQ_REMAP extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert); #else /* CONFIG_IRQ_REMAP */ static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert) { return 0; } #endif /* CONFIG_IRQ_REMAP */ extern bool dmar_platform_optin(void); #else /* CONFIG_DMAR_TABLE */ static inline int dmar_device_add(void *handle) { return 0; } static inline int dmar_device_remove(void *handle) { return 0; } static inline bool dmar_platform_optin(void) { return false; } #endif /* CONFIG_DMAR_TABLE */ struct irte { union { /* Shared between remapped and posted mode*/ struct { __u64 present : 1, /* 0 */ fpd : 1, /* 1 */ __res0 : 6, /* 2 - 6 */ avail : 4, /* 8 - 11 */ __res1 : 3, /* 12 - 14 */ pst : 1, /* 15 */ vector : 8, /* 16 - 23 */ __res2 : 40; /* 24 - 63 */ }; /* Remapped mode */ struct { __u64 r_present : 1, /* 0 */ r_fpd : 1, /* 1 */ dst_mode : 1, /* 2 */ redir_hint : 1, /* 3 */ trigger_mode : 1, /* 4 */ dlvry_mode : 3, /* 5 - 7 */ r_avail : 4, /* 8 - 11 */ r_res0 : 4, /* 12 - 15 */ r_vector : 8, /* 16 - 23 */ r_res1 : 8, /* 24 - 31 */ dest_id : 32; /* 32 - 63 */ }; /* Posted mode */ struct { __u64 p_present : 1, /* 0 */ p_fpd : 1, /* 1 */ p_res0 : 6, /* 2 - 7 */ p_avail : 4, /* 8 - 11 */ p_res1 : 2, /* 12 - 13 */ p_urgent : 1, /* 14 */ p_pst : 1, /* 15 */ p_vector : 8, /* 16 - 23 */ p_res2 : 14, /* 24 - 37 */ pda_l : 26; /* 38 - 63 */ }; __u64 low; }; union { /* Shared between remapped and posted mode*/ struct { __u64 sid : 16, /* 64 - 79 */ sq : 2, /* 80 - 81 */ svt : 2, /* 82 - 83 */ __res3 : 44; /* 84 - 127 */ }; /* Posted mode*/ struct { __u64 p_sid : 16, /* 64 - 79 */ p_sq : 2, /* 80 - 81 */ p_svt : 2, /* 82 - 83 */ p_res3 : 12, /* 84 - 95 */ pda_h : 32; /* 96 - 127 */ }; __u64 high; }; }; static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src) { dst->present = src->present; dst->fpd = src->fpd; dst->avail = src->avail; dst->pst = src->pst; dst->vector = src->vector; dst->sid = src->sid; dst->sq = src->sq; dst->svt = src->svt; } #define PDA_LOW_BIT 26 #define PDA_HIGH_BIT 32 /* Can't use the common MSI interrupt functions * since DMAR is not a pci device */ struct irq_data; extern void dmar_msi_unmask(struct irq_data *data); extern void dmar_msi_mask(struct irq_data *data); extern void dmar_msi_read(int irq, struct msi_msg *msg); extern void dmar_msi_write(int irq, struct msi_msg *msg); extern int dmar_set_interrupt(struct intel_iommu *iommu); extern irqreturn_t dmar_fault(int irq, void *dev_id); extern int dmar_alloc_hwirq(int id, int node, void *arg); extern void dmar_free_hwirq(int irq); #endif /* __DMAR_H__ */ PK ! Y"x� � set_memory.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright 2017, Michael Ellerman, IBM Corporation. */ #ifndef _LINUX_SET_MEMORY_H_ #define _LINUX_SET_MEMORY_H_ #ifdef CONFIG_ARCH_HAS_SET_MEMORY #include <asm/set_memory.h> #else static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; } static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; } static inline int set_memory_x(unsigned long addr, int numpages) { return 0; } static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; } #endif #ifndef CONFIG_ARCH_HAS_SET_DIRECT_MAP static inline int set_direct_map_invalid_noflush(struct page *page) { return 0; } static inline int set_direct_map_default_noflush(struct page *page) { return 0; } static inline bool kernel_page_present(struct page *page) { return true; } #else /* CONFIG_ARCH_HAS_SET_DIRECT_MAP */ /* * Some architectures, e.g. ARM64 can disable direct map modifications at * boot time. Let them overrive this query. */ #ifndef can_set_direct_map static inline bool can_set_direct_map(void) { return true; } #define can_set_direct_map can_set_direct_map #endif #endif /* CONFIG_ARCH_HAS_SET_DIRECT_MAP */ #ifndef set_mce_nospec static inline int set_mce_nospec(unsigned long pfn, bool unmap) { return 0; } #endif #ifndef clear_mce_nospec static inline int clear_mce_nospec(unsigned long pfn) { return 0; } #endif #ifndef CONFIG_ARCH_HAS_MEM_ENCRYPT static inline int set_memory_encrypted(unsigned long addr, int numpages) { return 0; } static inline int set_memory_decrypted(unsigned long addr, int numpages) { return 0; } #endif /* CONFIG_ARCH_HAS_MEM_ENCRYPT */ #endif /* _LINUX_SET_MEMORY_H_ */ PK ! �$�O typecheck.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef TYPECHECK_H_INCLUDED #define TYPECHECK_H_INCLUDED /* * Check at compile time that something is of a particular type. * Always evaluates to 1 so you may use it easily in comparisons. */ #define typecheck(type,x) \ ({ type __dummy; \ typeof(x) __dummy2; \ (void)(&__dummy == &__dummy2); \ 1; \ }) /* * Check at compile time that 'function' is a certain type, or is a pointer * to that type (needs to use typedef for the function type.) */ #define typecheck_fn(type,function) \ ({ typeof(type) __tmp = function; \ (void)__tmp; \ }) /* * Check at compile time that something is a pointer type. */ #define typecheck_pointer(x) \ ({ typeof(x) __dummy; \ (void)sizeof(*__dummy); \ 1; \ }) #endif /* TYPECHECK_H_INCLUDED */ PK ! p�^�� � devm-helpers.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __LINUX_DEVM_HELPERS_H #define __LINUX_DEVM_HELPERS_H /* * Functions which do automatically cancel operations or release resources upon * driver detach. * * These should be helpful to avoid mixing the manual and devm-based resource * management which can be source of annoying, rarely occurring, * hard-to-reproduce bugs. * * Please take into account that devm based cancellation may be performed some * time after the remove() is ran. * * Thus mixing devm and manual resource management can easily cause problems * when unwinding operations with dependencies. IRQ scheduling a work in a queue * is typical example where IRQs are often devm-managed and WQs are manually * cleaned at remove(). If IRQs are not manually freed at remove() (and this is * often the case when we use devm for IRQs) we have a period of time after * remove() - and before devm managed IRQs are freed - where new IRQ may fire * and schedule a work item which won't be cancelled because remove() was * already ran. */ #include <linux/device.h> #include <linux/workqueue.h> static inline void devm_delayed_work_drop(void *res) { cancel_delayed_work_sync(res); } /** * devm_delayed_work_autocancel - Resource-managed delayed work allocation * @dev: Device which lifetime work is bound to * @w: Work item to be queued * @worker: Worker function * * Initialize delayed work which is automatically cancelled when driver is * detached. A few drivers need delayed work which must be cancelled before * driver is detached to avoid accessing removed resources. * devm_delayed_work_autocancel() can be used to omit the explicit * cancelleation when driver is detached. */ static inline int devm_delayed_work_autocancel(struct device *dev, struct delayed_work *w, work_func_t worker) { INIT_DELAYED_WORK(w, worker); return devm_add_action(dev, devm_delayed_work_drop, w); } static inline void devm_work_drop(void *res) { cancel_work_sync(res); } /** * devm_work_autocancel - Resource-managed work allocation * @dev: Device which lifetime work is bound to * @w: Work to be added (and automatically cancelled) * @worker: Worker function * * Initialize work which is automatically cancelled when driver is detached. * A few drivers need to queue work which must be cancelled before driver * is detached to avoid accessing removed resources. * devm_work_autocancel() can be used to omit the explicit * cancelleation when driver is detached. */ static inline int devm_work_autocancel(struct device *dev, struct work_struct *w, work_func_t worker) { INIT_WORK(w, worker); return devm_add_action(dev, devm_work_drop, w); } #endif PK ! <�@K K stmp3xxx_rtc_wdt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * stmp3xxx_rtc_wdt.h * * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. */ #ifndef __LINUX_STMP3XXX_RTC_WDT_H #define __LINUX_STMP3XXX_RTC_WDT_H struct stmp3xxx_wdt_pdata { void (*wdt_set_timeout)(struct device *dev, u32 timeout); }; #endif /* __LINUX_STMP3XXX_RTC_WDT_H */ PK ! u���1 1 buildid.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BUILDID_H #define _LINUX_BUILDID_H #include <linux/mm_types.h> #define BUILD_ID_SIZE_MAX 20 int build_id_parse(struct vm_area_struct *vma, unsigned char *build_id, __u32 *size); int build_id_parse_buf(const void *buf, unsigned char *build_id, u32 buf_size); #if IS_ENABLED(CONFIG_STACKTRACE_BUILD_ID) || IS_ENABLED(CONFIG_CRASH_CORE) extern unsigned char vmlinux_build_id[BUILD_ID_SIZE_MAX]; void init_vmlinux_build_id(void); #else static inline void init_vmlinux_build_id(void) { } #endif #endif PK ! �!��� � gameport.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 1999-2002 Vojtech Pavlik */ #ifndef _GAMEPORT_H #define _GAMEPORT_H #include <asm/io.h> #include <linux/types.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/device.h> #include <linux/timer.h> #include <linux/slab.h> #include <uapi/linux/gameport.h> struct gameport { void *port_data; /* Private pointer for gameport drivers */ char name[32]; char phys[32]; int io; int speed; int fuzz; void (*trigger)(struct gameport *); unsigned char (*read)(struct gameport *); int (*cooked_read)(struct gameport *, int *, int *); int (*calibrate)(struct gameport *, int *, int *); int (*open)(struct gameport *, int); void (*close)(struct gameport *); struct timer_list poll_timer; unsigned int poll_interval; /* in msecs */ spinlock_t timer_lock; unsigned int poll_cnt; void (*poll_handler)(struct gameport *); struct gameport *parent, *child; struct gameport_driver *drv; struct mutex drv_mutex; /* protects serio->drv so attributes can pin driver */ struct device dev; struct list_head node; }; #define to_gameport_port(d) container_of(d, struct gameport, dev) struct gameport_driver { const char *description; int (*connect)(struct gameport *, struct gameport_driver *drv); int (*reconnect)(struct gameport *); void (*disconnect)(struct gameport *); struct device_driver driver; bool ignore; }; #define to_gameport_driver(d) container_of(d, struct gameport_driver, driver) int gameport_open(struct gameport *gameport, struct gameport_driver *drv, int mode); void gameport_close(struct gameport *gameport); #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) void __gameport_register_port(struct gameport *gameport, struct module *owner); /* use a define to avoid include chaining to get THIS_MODULE */ #define gameport_register_port(gameport) \ __gameport_register_port(gameport, THIS_MODULE) void gameport_unregister_port(struct gameport *gameport); __printf(2, 3) void gameport_set_phys(struct gameport *gameport, const char *fmt, ...); #else static inline void gameport_register_port(struct gameport *gameport) { return; } static inline void gameport_unregister_port(struct gameport *gameport) { return; } static inline __printf(2, 3) void gameport_set_phys(struct gameport *gameport, const char *fmt, ...) { return; } #endif static inline struct gameport *gameport_allocate_port(void) { struct gameport *gameport = kzalloc(sizeof(struct gameport), GFP_KERNEL); return gameport; } static inline void gameport_free_port(struct gameport *gameport) { kfree(gameport); } static inline void gameport_set_name(struct gameport *gameport, const char *name) { strlcpy(gameport->name, name, sizeof(gameport->name)); } /* * Use the following functions to manipulate gameport's per-port * driver-specific data. */ static inline void *gameport_get_drvdata(struct gameport *gameport) { return dev_get_drvdata(&gameport->dev); } static inline void gameport_set_drvdata(struct gameport *gameport, void *data) { dev_set_drvdata(&gameport->dev, data); } /* * Use the following functions to pin gameport's driver in process context */ static inline int gameport_pin_driver(struct gameport *gameport) { return mutex_lock_interruptible(&gameport->drv_mutex); } static inline void gameport_unpin_driver(struct gameport *gameport) { mutex_unlock(&gameport->drv_mutex); } int __must_check __gameport_register_driver(struct gameport_driver *drv, struct module *owner, const char *mod_name); /* use a define to avoid include chaining to get THIS_MODULE & friends */ #define gameport_register_driver(drv) \ __gameport_register_driver(drv, THIS_MODULE, KBUILD_MODNAME) void gameport_unregister_driver(struct gameport_driver *drv); /** * module_gameport_driver() - Helper macro for registering a gameport driver * @__gameport_driver: gameport_driver struct * * Helper macro for gameport drivers which do not do anything special in * module init/exit. This eliminates a lot of boilerplate. Each module may * only use this macro once, and calling it replaces module_init() and * module_exit(). */ #define module_gameport_driver(__gameport_driver) \ module_driver(__gameport_driver, gameport_register_driver, \ gameport_unregister_driver) static inline void gameport_trigger(struct gameport *gameport) { if (gameport->trigger) gameport->trigger(gameport); else outb(0xff, gameport->io); } static inline unsigned char gameport_read(struct gameport *gameport) { if (gameport->read) return gameport->read(gameport); else return inb(gameport->io); } static inline int gameport_cooked_read(struct gameport *gameport, int *axes, int *buttons) { if (gameport->cooked_read) return gameport->cooked_read(gameport, axes, buttons); else return -1; } static inline int gameport_calibrate(struct gameport *gameport, int *axes, int *max) { if (gameport->calibrate) return gameport->calibrate(gameport, axes, max); else return -1; } static inline int gameport_time(struct gameport *gameport, int time) { return (time * gameport->speed) / 1000; } static inline void gameport_set_poll_handler(struct gameport *gameport, void (*handler)(struct gameport *)) { gameport->poll_handler = handler; } static inline void gameport_set_poll_interval(struct gameport *gameport, unsigned int msecs) { gameport->poll_interval = msecs; } void gameport_start_polling(struct gameport *gameport); void gameport_stop_polling(struct gameport *gameport); #endif PK ! ^�a dw_apb_timer.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * (C) Copyright 2009 Intel Corporation * Author: Jacob Pan (jacob.jun.pan@intel.com) * * Shared with ARM platforms, Jamie Iles, Picochip 2011 * * Support for the Synopsys DesignWare APB Timers. */ #ifndef __DW_APB_TIMER_H__ #define __DW_APB_TIMER_H__ #include <linux/clockchips.h> #include <linux/clocksource.h> #include <linux/interrupt.h> #define APBTMRS_REG_SIZE 0x14 struct dw_apb_timer { void __iomem *base; unsigned long freq; int irq; }; struct dw_apb_clock_event_device { struct clock_event_device ced; struct dw_apb_timer timer; void (*eoi)(struct dw_apb_timer *); }; struct dw_apb_clocksource { struct dw_apb_timer timer; struct clocksource cs; }; void dw_apb_clockevent_register(struct dw_apb_clock_event_device *dw_ced); void dw_apb_clockevent_pause(struct dw_apb_clock_event_device *dw_ced); void dw_apb_clockevent_resume(struct dw_apb_clock_event_device *dw_ced); void dw_apb_clockevent_stop(struct dw_apb_clock_event_device *dw_ced); struct dw_apb_clock_event_device * dw_apb_clockevent_init(int cpu, const char *name, unsigned rating, void __iomem *base, int irq, unsigned long freq); struct dw_apb_clocksource * dw_apb_clocksource_init(unsigned rating, const char *name, void __iomem *base, unsigned long freq); void dw_apb_clocksource_register(struct dw_apb_clocksource *dw_cs); void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs); u64 dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs); #endif /* __DW_APB_TIMER_H__ */ PK ! �b��C C proc_ns.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * procfs namespace bits */ #ifndef _LINUX_PROC_NS_H #define _LINUX_PROC_NS_H #include <linux/ns_common.h> struct pid_namespace; struct nsset; struct path; struct task_struct; struct inode; struct proc_ns_operations { const char *name; const char *real_ns_name; int type; struct ns_common *(*get)(struct task_struct *task); void (*put)(struct ns_common *ns); int (*install)(struct nsset *nsset, struct ns_common *ns); struct user_namespace *(*owner)(struct ns_common *ns); struct ns_common *(*get_parent)(struct ns_common *ns); } __randomize_layout; extern const struct proc_ns_operations netns_operations; extern const struct proc_ns_operations utsns_operations; extern const struct proc_ns_operations ipcns_operations; extern const struct proc_ns_operations pidns_operations; extern const struct proc_ns_operations pidns_for_children_operations; extern const struct proc_ns_operations userns_operations; extern const struct proc_ns_operations mntns_operations; extern const struct proc_ns_operations cgroupns_operations; extern const struct proc_ns_operations timens_operations; extern const struct proc_ns_operations timens_for_children_operations; /* * We always define these enumerators */ enum { PROC_ROOT_INO = 1, PROC_IPC_INIT_INO = 0xEFFFFFFFU, PROC_UTS_INIT_INO = 0xEFFFFFFEU, PROC_USER_INIT_INO = 0xEFFFFFFDU, PROC_PID_INIT_INO = 0xEFFFFFFCU, PROC_CGROUP_INIT_INO = 0xEFFFFFFBU, PROC_TIME_INIT_INO = 0xEFFFFFFAU, }; #ifdef CONFIG_PROC_FS extern int proc_alloc_inum(unsigned int *pino); extern void proc_free_inum(unsigned int inum); #else /* CONFIG_PROC_FS */ static inline int proc_alloc_inum(unsigned int *inum) { *inum = 1; return 0; } static inline void proc_free_inum(unsigned int inum) {} #endif /* CONFIG_PROC_FS */ static inline int ns_alloc_inum(struct ns_common *ns) { atomic_long_set(&ns->stashed, 0); return proc_alloc_inum(&ns->inum); } #define ns_free_inum(ns) proc_free_inum((ns)->inum) extern struct file *proc_ns_fget(int fd); #define get_proc_ns(inode) ((struct ns_common *)(inode)->i_private) extern int ns_get_path(struct path *path, struct task_struct *task, const struct proc_ns_operations *ns_ops); typedef struct ns_common *ns_get_path_helper_t(void *); extern int ns_get_path_cb(struct path *path, ns_get_path_helper_t ns_get_cb, void *private_data); extern bool ns_match(const struct ns_common *ns, dev_t dev, ino_t ino); extern int ns_get_name(char *buf, size_t size, struct task_struct *task, const struct proc_ns_operations *ns_ops); extern void nsfs_init(void); #endif /* _LINUX_PROC_NS_H */ PK ! ��:} } ucb1400.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Register definitions and functions for: * Philips UCB1400 driver * * Based on ucb1400_ts: * Author: Nicolas Pitre * Created: September 25, 2006 * Copyright: MontaVista Software, Inc. * * Spliting done by: Marek Vasut <marek.vasut@gmail.com> * If something doesn't work and it worked before spliting, e-mail me, * dont bother Nicolas please ;-) * * This code is heavily based on ucb1x00-*.c copyrighted by Russell King * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. */ #ifndef _LINUX__UCB1400_H #define _LINUX__UCB1400_H #include <sound/ac97_codec.h> #include <linux/mutex.h> #include <linux/platform_device.h> #include <linux/gpio.h> /* * UCB1400 AC-link registers */ #define UCB_IO_DATA 0x5a #define UCB_IO_DIR 0x5c #define UCB_IE_RIS 0x5e #define UCB_IE_FAL 0x60 #define UCB_IE_STATUS 0x62 #define UCB_IE_CLEAR 0x62 #define UCB_IE_ADC (1 << 11) #define UCB_IE_TSPX (1 << 12) #define UCB_TS_CR 0x64 #define UCB_TS_CR_TSMX_POW (1 << 0) #define UCB_TS_CR_TSPX_POW (1 << 1) #define UCB_TS_CR_TSMY_POW (1 << 2) #define UCB_TS_CR_TSPY_POW (1 << 3) #define UCB_TS_CR_TSMX_GND (1 << 4) #define UCB_TS_CR_TSPX_GND (1 << 5) #define UCB_TS_CR_TSMY_GND (1 << 6) #define UCB_TS_CR_TSPY_GND (1 << 7) #define UCB_TS_CR_MODE_INT (0 << 8) #define UCB_TS_CR_MODE_PRES (1 << 8) #define UCB_TS_CR_MODE_POS (2 << 8) #define UCB_TS_CR_BIAS_ENA (1 << 11) #define UCB_TS_CR_TSPX_LOW (1 << 12) #define UCB_TS_CR_TSMX_LOW (1 << 13) #define UCB_ADC_CR 0x66 #define UCB_ADC_SYNC_ENA (1 << 0) #define UCB_ADC_VREFBYP_CON (1 << 1) #define UCB_ADC_INP_TSPX (0 << 2) #define UCB_ADC_INP_TSMX (1 << 2) #define UCB_ADC_INP_TSPY (2 << 2) #define UCB_ADC_INP_TSMY (3 << 2) #define UCB_ADC_INP_AD0 (4 << 2) #define UCB_ADC_INP_AD1 (5 << 2) #define UCB_ADC_INP_AD2 (6 << 2) #define UCB_ADC_INP_AD3 (7 << 2) #define UCB_ADC_EXT_REF (1 << 5) #define UCB_ADC_START (1 << 7) #define UCB_ADC_ENA (1 << 15) #define UCB_ADC_DATA 0x68 #define UCB_ADC_DAT_VALID (1 << 15) #define UCB_FCSR 0x6c #define UCB_FCSR_AVE (1 << 12) #define UCB_ADC_DAT_MASK 0x3ff #define UCB_ID 0x7e #define UCB_ID_1400 0x4304 struct ucb1400_gpio { struct gpio_chip gc; struct snd_ac97 *ac97; int gpio_offset; int (*gpio_setup)(struct device *dev, int ngpio); int (*gpio_teardown)(struct device *dev, int ngpio); }; struct ucb1400_ts { struct input_dev *ts_idev; int id; int irq; struct snd_ac97 *ac97; wait_queue_head_t ts_wait; bool stopped; }; struct ucb1400 { struct platform_device *ucb1400_ts; struct platform_device *ucb1400_gpio; }; struct ucb1400_pdata { int irq; int gpio_offset; int (*gpio_setup)(struct device *dev, int ngpio); int (*gpio_teardown)(struct device *dev, int ngpio); }; static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg) { return ac97->bus->ops->read(ac97, reg); } static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val) { ac97->bus->ops->write(ac97, reg, val); } static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio) { return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio); } static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio, u16 val) { ucb1400_reg_write(ac97, UCB_IO_DATA, val ? ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) : ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio)); } static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio) { return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio); } static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio, u16 dir) { ucb1400_reg_write(ac97, UCB_IO_DIR, dir ? ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) : ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio)); } static inline void ucb1400_adc_enable(struct snd_ac97 *ac97) { ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA); } static inline void ucb1400_adc_disable(struct snd_ac97 *ac97) { ucb1400_reg_write(ac97, UCB_ADC_CR, 0); } unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel, int adcsync); #endif PK ! �?� apm_bios.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Include file for the interface to an APM BIOS * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au) */ #ifndef _LINUX_APM_H #define _LINUX_APM_H #include <uapi/linux/apm_bios.h> #define APM_CS (GDT_ENTRY_APMBIOS_BASE * 8) #define APM_CS_16 (APM_CS + 8) #define APM_DS (APM_CS_16 + 8) /* Results of APM Installation Check */ #define APM_16_BIT_SUPPORT 0x0001 #define APM_32_BIT_SUPPORT 0x0002 #define APM_IDLE_SLOWS_CLOCK 0x0004 #define APM_BIOS_DISABLED 0x0008 #define APM_BIOS_DISENGAGED 0x0010 /* * Data for APM that is persistent across module unload/load */ struct apm_info { struct apm_bios_info bios; unsigned short connection_version; int get_power_status_broken; int get_power_status_swabinminutes; int allow_ints; int forbid_idle; int realmode_power_off; int disabled; }; /* * The APM function codes */ #define APM_FUNC_INST_CHECK 0x5300 #define APM_FUNC_REAL_CONN 0x5301 #define APM_FUNC_16BIT_CONN 0x5302 #define APM_FUNC_32BIT_CONN 0x5303 #define APM_FUNC_DISCONN 0x5304 #define APM_FUNC_IDLE 0x5305 #define APM_FUNC_BUSY 0x5306 #define APM_FUNC_SET_STATE 0x5307 #define APM_FUNC_ENABLE_PM 0x5308 #define APM_FUNC_RESTORE_BIOS 0x5309 #define APM_FUNC_GET_STATUS 0x530a #define APM_FUNC_GET_EVENT 0x530b #define APM_FUNC_GET_STATE 0x530c #define APM_FUNC_ENABLE_DEV_PM 0x530d #define APM_FUNC_VERSION 0x530e #define APM_FUNC_ENGAGE_PM 0x530f #define APM_FUNC_GET_CAP 0x5310 #define APM_FUNC_RESUME_TIMER 0x5311 #define APM_FUNC_RESUME_ON_RING 0x5312 #define APM_FUNC_TIMER 0x5313 /* * Function code for APM_FUNC_RESUME_TIMER */ #define APM_FUNC_DISABLE_TIMER 0 #define APM_FUNC_GET_TIMER 1 #define APM_FUNC_SET_TIMER 2 /* * Function code for APM_FUNC_RESUME_ON_RING */ #define APM_FUNC_DISABLE_RING 0 #define APM_FUNC_ENABLE_RING 1 #define APM_FUNC_GET_RING 2 /* * Function code for APM_FUNC_TIMER_STATUS */ #define APM_FUNC_TIMER_DISABLE 0 #define APM_FUNC_TIMER_ENABLE 1 #define APM_FUNC_TIMER_GET 2 /* * in arch/i386/kernel/setup.c */ extern struct apm_info apm_info; /* * This is the "All Devices" ID communicated to the BIOS */ #define APM_DEVICE_BALL ((apm_info.connection_version > 0x0100) ? \ APM_DEVICE_ALL : APM_DEVICE_OLD_ALL) #endif /* LINUX_APM_H */ PK ! �z�I I device_cgroup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #include <linux/fs.h> #define DEVCG_ACC_MKNOD 1 #define DEVCG_ACC_READ 2 #define DEVCG_ACC_WRITE 4 #define DEVCG_ACC_MASK (DEVCG_ACC_MKNOD | DEVCG_ACC_READ | DEVCG_ACC_WRITE) #define DEVCG_DEV_BLOCK 1 #define DEVCG_DEV_CHAR 2 #define DEVCG_DEV_ALL 4 /* this represents all devices */ #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) int devcgroup_check_permission(short type, u32 major, u32 minor, short access); static inline int devcgroup_inode_permission(struct inode *inode, int mask) { short type, access = 0; if (likely(!inode->i_rdev)) return 0; if (S_ISBLK(inode->i_mode)) type = DEVCG_DEV_BLOCK; else if (S_ISCHR(inode->i_mode)) type = DEVCG_DEV_CHAR; else return 0; if (mask & MAY_WRITE) access |= DEVCG_ACC_WRITE; if (mask & MAY_READ) access |= DEVCG_ACC_READ; return devcgroup_check_permission(type, imajor(inode), iminor(inode), access); } static inline int devcgroup_inode_mknod(int mode, dev_t dev) { short type; if (!S_ISBLK(mode) && !S_ISCHR(mode)) return 0; if (S_ISCHR(mode) && dev == WHITEOUT_DEV) return 0; if (S_ISBLK(mode)) type = DEVCG_DEV_BLOCK; else type = DEVCG_DEV_CHAR; return devcgroup_check_permission(type, MAJOR(dev), MINOR(dev), DEVCG_ACC_MKNOD); } #else static inline int devcgroup_check_permission(short type, u32 major, u32 minor, short access) { return 0; } static inline int devcgroup_inode_permission(struct inode *inode, int mask) { return 0; } static inline int devcgroup_inode_mknod(int mode, dev_t dev) { return 0; } #endif PK ! K�!� � dqblk_qtree.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions of structures and functions for quota formats using trie */ #ifndef _LINUX_DQBLK_QTREE_H #define _LINUX_DQBLK_QTREE_H #include <linux/types.h> /* Numbers of blocks needed for updates - we count with the smallest * possible block size (1024) */ #define QTREE_INIT_ALLOC 4 #define QTREE_INIT_REWRITE 2 #define QTREE_DEL_ALLOC 0 #define QTREE_DEL_REWRITE 6 struct dquot; struct kqid; /* Operations */ struct qtree_fmt_operations { void (*mem2disk_dqblk)(void *disk, struct dquot *dquot); /* Convert given entry from in memory format to disk one */ void (*disk2mem_dqblk)(struct dquot *dquot, void *disk); /* Convert given entry from disk format to in memory one */ int (*is_id)(void *disk, struct dquot *dquot); /* Is this structure for given id? */ }; /* Inmemory copy of version specific information */ struct qtree_mem_dqinfo { struct super_block *dqi_sb; /* Sb quota is on */ int dqi_type; /* Quota type */ unsigned int dqi_blocks; /* # of blocks in quota file */ unsigned int dqi_free_blk; /* First block in list of free blocks */ unsigned int dqi_free_entry; /* First block with free entry */ unsigned int dqi_blocksize_bits; /* Block size of quota file */ unsigned int dqi_entry_size; /* Size of quota entry in quota file */ unsigned int dqi_usable_bs; /* Space usable in block for quota data */ unsigned int dqi_qtree_depth; /* Precomputed depth of quota tree */ const struct qtree_fmt_operations *dqi_ops; /* Operations for entry manipulation */ }; int qtree_write_dquot(struct qtree_mem_dqinfo *info, struct dquot *dquot); int qtree_read_dquot(struct qtree_mem_dqinfo *info, struct dquot *dquot); int qtree_delete_dquot(struct qtree_mem_dqinfo *info, struct dquot *dquot); int qtree_release_dquot(struct qtree_mem_dqinfo *info, struct dquot *dquot); int qtree_entry_unused(struct qtree_mem_dqinfo *info, char *disk); static inline int qtree_depth(struct qtree_mem_dqinfo *info) { unsigned int epb = info->dqi_usable_bs >> 2; unsigned long long entries = epb; int i; for (i = 1; entries < (1ULL << 32); i++) entries *= epb; return i; } int qtree_get_next_id(struct qtree_mem_dqinfo *info, struct kqid *qid); #endif /* _LINUX_DQBLK_QTREE_H */ PK ! E�"zM zM blk-mq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef BLK_MQ_H #define BLK_MQ_H #include <linux/blkdev.h> #include <linux/sbitmap.h> #include <linux/srcu.h> #include <linux/lockdep.h> struct blk_mq_tags; struct blk_flush_queue; /** * struct blk_mq_hw_ctx - State for a hardware queue facing the hardware * block device */ struct blk_mq_hw_ctx { struct { /** @lock: Protects the dispatch list. */ spinlock_t lock; /** * @dispatch: Used for requests that are ready to be * dispatched to the hardware but for some reason (e.g. lack of * resources) could not be sent to the hardware. As soon as the * driver can send new requests, requests at this list will * be sent first for a fairer dispatch. */ struct list_head dispatch; /** * @state: BLK_MQ_S_* flags. Defines the state of the hw * queue (active, scheduled to restart, stopped). */ unsigned long state; } ____cacheline_aligned_in_smp; /** * @run_work: Used for scheduling a hardware queue run at a later time. */ struct delayed_work run_work; /** @cpumask: Map of available CPUs where this hctx can run. */ cpumask_var_t cpumask; /** * @next_cpu: Used by blk_mq_hctx_next_cpu() for round-robin CPU * selection from @cpumask. */ int next_cpu; /** * @next_cpu_batch: Counter of how many works left in the batch before * changing to the next CPU. */ int next_cpu_batch; /** @flags: BLK_MQ_F_* flags. Defines the behaviour of the queue. */ unsigned long flags; /** * @sched_data: Pointer owned by the IO scheduler attached to a request * queue. It's up to the IO scheduler how to use this pointer. */ void *sched_data; /** * @queue: Pointer to the request queue that owns this hardware context. */ struct request_queue *queue; /** @fq: Queue of requests that need to perform a flush operation. */ struct blk_flush_queue *fq; /** * @driver_data: Pointer to data owned by the block driver that created * this hctx */ void *driver_data; /** * @ctx_map: Bitmap for each software queue. If bit is on, there is a * pending request in that software queue. */ struct sbitmap ctx_map; /** * @dispatch_from: Software queue to be used when no scheduler was * selected. */ struct blk_mq_ctx *dispatch_from; /** * @dispatch_busy: Number used by blk_mq_update_dispatch_busy() to * decide if the hw_queue is busy using Exponential Weighted Moving * Average algorithm. */ unsigned int dispatch_busy; /** @type: HCTX_TYPE_* flags. Type of hardware queue. */ unsigned short type; /** @nr_ctx: Number of software queues. */ unsigned short nr_ctx; /** @ctxs: Array of software queues. */ struct blk_mq_ctx **ctxs; /** @dispatch_wait_lock: Lock for dispatch_wait queue. */ spinlock_t dispatch_wait_lock; /** * @dispatch_wait: Waitqueue to put requests when there is no tag * available at the moment, to wait for another try in the future. */ wait_queue_entry_t dispatch_wait; /** * @wait_index: Index of next available dispatch_wait queue to insert * requests. */ atomic_t wait_index; /** * @tags: Tags owned by the block driver. A tag at this set is only * assigned when a request is dispatched from a hardware queue. */ struct blk_mq_tags *tags; /** * @sched_tags: Tags owned by I/O scheduler. If there is an I/O * scheduler associated with a request queue, a tag is assigned when * that request is allocated. Else, this member is not used. */ struct blk_mq_tags *sched_tags; /** @queued: Number of queued requests. */ unsigned long queued; /** @run: Number of dispatched requests. */ unsigned long run; #define BLK_MQ_MAX_DISPATCH_ORDER 7 /** @dispatched: Number of dispatch requests by queue. */ unsigned long dispatched[BLK_MQ_MAX_DISPATCH_ORDER]; /** @numa_node: NUMA node the storage adapter has been connected to. */ unsigned int numa_node; /** @queue_num: Index of this hardware queue. */ unsigned int queue_num; /** * @nr_active: Number of active requests. Only used when a tag set is * shared across request queues. */ atomic_t nr_active; /** @cpuhp_online: List to store request if CPU is going to die */ struct hlist_node cpuhp_online; /** @cpuhp_dead: List to store request if some CPU die. */ struct hlist_node cpuhp_dead; /** @kobj: Kernel object for sysfs. */ struct kobject kobj; /** @poll_considered: Count times blk_poll() was called. */ unsigned long poll_considered; /** @poll_invoked: Count how many requests blk_poll() polled. */ unsigned long poll_invoked; /** @poll_success: Count how many polled requests were completed. */ unsigned long poll_success; #ifdef CONFIG_BLK_DEBUG_FS /** * @debugfs_dir: debugfs directory for this hardware queue. Named * as cpu<cpu_number>. */ struct dentry *debugfs_dir; /** @sched_debugfs_dir: debugfs directory for the scheduler. */ struct dentry *sched_debugfs_dir; #endif /** * @hctx_list: if this hctx is not in use, this is an entry in * q->unused_hctx_list. */ struct list_head hctx_list; /** * @srcu: Sleepable RCU. Use as lock when type of the hardware queue is * blocking (BLK_MQ_F_BLOCKING). Must be the last member - see also * blk_mq_hw_ctx_size(). */ struct srcu_struct srcu[]; }; /** * struct blk_mq_queue_map - Map software queues to hardware queues * @mq_map: CPU ID to hardware queue index map. This is an array * with nr_cpu_ids elements. Each element has a value in the range * [@queue_offset, @queue_offset + @nr_queues). * @nr_queues: Number of hardware queues to map CPU IDs onto. * @queue_offset: First hardware queue to map onto. Used by the PCIe NVMe * driver to map each hardware queue type (enum hctx_type) onto a distinct * set of hardware queues. */ struct blk_mq_queue_map { unsigned int *mq_map; unsigned int nr_queues; unsigned int queue_offset; }; /** * enum hctx_type - Type of hardware queue * @HCTX_TYPE_DEFAULT: All I/O not otherwise accounted for. * @HCTX_TYPE_READ: Just for READ I/O. * @HCTX_TYPE_POLL: Polled I/O of any kind. * @HCTX_MAX_TYPES: Number of types of hctx. */ enum hctx_type { HCTX_TYPE_DEFAULT, HCTX_TYPE_READ, HCTX_TYPE_POLL, HCTX_MAX_TYPES, }; /** * struct blk_mq_tag_set - tag set that can be shared between request queues * @map: One or more ctx -> hctx mappings. One map exists for each * hardware queue type (enum hctx_type) that the driver wishes * to support. There are no restrictions on maps being of the * same size, and it's perfectly legal to share maps between * types. * @nr_maps: Number of elements in the @map array. A number in the range * [1, HCTX_MAX_TYPES]. * @ops: Pointers to functions that implement block driver behavior. * @nr_hw_queues: Number of hardware queues supported by the block driver that * owns this data structure. * @queue_depth: Number of tags per hardware queue, reserved tags included. * @reserved_tags: Number of tags to set aside for BLK_MQ_REQ_RESERVED tag * allocations. * @cmd_size: Number of additional bytes to allocate per request. The block * driver owns these additional bytes. * @numa_node: NUMA node the storage adapter has been connected to. * @timeout: Request processing timeout in jiffies. * @flags: Zero or more BLK_MQ_F_* flags. * @driver_data: Pointer to data owned by the block driver that created this * tag set. * @active_queues_shared_sbitmap: * number of active request queues per tag set. * @__bitmap_tags: A shared tags sbitmap, used over all hctx's * @__breserved_tags: * A shared reserved tags sbitmap, used over all hctx's * @tags: Tag sets. One tag set per hardware queue. Has @nr_hw_queues * elements. * @tag_list_lock: Serializes tag_list accesses. * @tag_list: List of the request queues that use this tag set. See also * request_queue.tag_set_list. */ struct blk_mq_tag_set { struct blk_mq_queue_map map[HCTX_MAX_TYPES]; unsigned int nr_maps; const struct blk_mq_ops *ops; unsigned int nr_hw_queues; unsigned int queue_depth; unsigned int reserved_tags; unsigned int cmd_size; int numa_node; unsigned int timeout; unsigned int flags; void *driver_data; atomic_t active_queues_shared_sbitmap; struct sbitmap_queue __bitmap_tags; struct sbitmap_queue __breserved_tags; struct blk_mq_tags **tags; struct mutex tag_list_lock; struct list_head tag_list; }; /** * struct blk_mq_queue_data - Data about a request inserted in a queue * * @rq: Request pointer. * @last: If it is the last request in the queue. */ struct blk_mq_queue_data { struct request *rq; bool last; }; typedef bool (busy_iter_fn)(struct blk_mq_hw_ctx *, struct request *, void *, bool); typedef bool (busy_tag_iter_fn)(struct request *, void *, bool); /** * struct blk_mq_ops - Callback functions that implements block driver * behaviour. */ struct blk_mq_ops { /** * @queue_rq: Queue a new request from block IO. */ blk_status_t (*queue_rq)(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *); /** * @commit_rqs: If a driver uses bd->last to judge when to submit * requests to hardware, it must define this function. In case of errors * that make us stop issuing further requests, this hook serves the * purpose of kicking the hardware (which the last request otherwise * would have done). */ void (*commit_rqs)(struct blk_mq_hw_ctx *); /** * @get_budget: Reserve budget before queue request, once .queue_rq is * run, it is driver's responsibility to release the * reserved budget. Also we have to handle failure case * of .get_budget for avoiding I/O deadlock. */ int (*get_budget)(struct request_queue *); /** * @put_budget: Release the reserved budget. */ void (*put_budget)(struct request_queue *, int); /** * @set_rq_budget_token: store rq's budget token */ void (*set_rq_budget_token)(struct request *, int); /** * @get_rq_budget_token: retrieve rq's budget token */ int (*get_rq_budget_token)(struct request *); /** * @timeout: Called on request timeout. */ enum blk_eh_timer_return (*timeout)(struct request *, bool); /** * @poll: Called to poll for completion of a specific tag. */ int (*poll)(struct blk_mq_hw_ctx *); /** * @complete: Mark the request as complete. */ void (*complete)(struct request *); /** * @init_hctx: Called when the block layer side of a hardware queue has * been set up, allowing the driver to allocate/init matching * structures. */ int (*init_hctx)(struct blk_mq_hw_ctx *, void *, unsigned int); /** * @exit_hctx: Ditto for exit/teardown. */ void (*exit_hctx)(struct blk_mq_hw_ctx *, unsigned int); /** * @init_request: Called for every command allocated by the block layer * to allow the driver to set up driver specific data. * * Tag greater than or equal to queue_depth is for setting up * flush request. */ int (*init_request)(struct blk_mq_tag_set *set, struct request *, unsigned int, unsigned int); /** * @exit_request: Ditto for exit/teardown. */ void (*exit_request)(struct blk_mq_tag_set *set, struct request *, unsigned int); /** * @initialize_rq_fn: Called from inside blk_get_request(). */ void (*initialize_rq_fn)(struct request *rq); /** * @cleanup_rq: Called before freeing one request which isn't completed * yet, and usually for freeing the driver private data. */ void (*cleanup_rq)(struct request *); /** * @busy: If set, returns whether or not this queue currently is busy. */ bool (*busy)(struct request_queue *); /** * @map_queues: This allows drivers specify their own queue mapping by * overriding the setup-time function that builds the mq_map. */ int (*map_queues)(struct blk_mq_tag_set *set); #ifdef CONFIG_BLK_DEBUG_FS /** * @show_rq: Used by the debugfs implementation to show driver-specific * information about a request. */ void (*show_rq)(struct seq_file *m, struct request *rq); #endif }; enum { BLK_MQ_F_SHOULD_MERGE = 1 << 0, BLK_MQ_F_TAG_QUEUE_SHARED = 1 << 1, /* * Set when this device requires underlying blk-mq device for * completing IO: */ BLK_MQ_F_STACKING = 1 << 2, BLK_MQ_F_TAG_HCTX_SHARED = 1 << 3, BLK_MQ_F_BLOCKING = 1 << 5, /* Do not allow an I/O scheduler to be configured. */ BLK_MQ_F_NO_SCHED = 1 << 6, /* * Select 'none' during queue registration in case of a single hwq * or shared hwqs instead of 'mq-deadline'. */ BLK_MQ_F_NO_SCHED_BY_DEFAULT = 1 << 7, BLK_MQ_F_ALLOC_POLICY_START_BIT = 8, BLK_MQ_F_ALLOC_POLICY_BITS = 1, BLK_MQ_S_STOPPED = 0, BLK_MQ_S_TAG_ACTIVE = 1, BLK_MQ_S_SCHED_RESTART = 2, /* hw queue is inactive after all its CPUs become offline */ BLK_MQ_S_INACTIVE = 3, BLK_MQ_MAX_DEPTH = 10240, BLK_MQ_CPU_WORK_BATCH = 8, }; #define BLK_MQ_FLAG_TO_ALLOC_POLICY(flags) \ ((flags >> BLK_MQ_F_ALLOC_POLICY_START_BIT) & \ ((1 << BLK_MQ_F_ALLOC_POLICY_BITS) - 1)) #define BLK_ALLOC_POLICY_TO_MQ_FLAG(policy) \ ((policy & ((1 << BLK_MQ_F_ALLOC_POLICY_BITS) - 1)) \ << BLK_MQ_F_ALLOC_POLICY_START_BIT) struct gendisk *__blk_mq_alloc_disk(struct blk_mq_tag_set *set, void *queuedata, struct lock_class_key *lkclass); #define blk_mq_alloc_disk(set, queuedata) \ ({ \ static struct lock_class_key __key; \ \ __blk_mq_alloc_disk(set, queuedata, &__key); \ }) struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *); int blk_mq_init_allocated_queue(struct blk_mq_tag_set *set, struct request_queue *q); void blk_mq_unregister_dev(struct device *, struct request_queue *); int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set); int blk_mq_alloc_sq_tag_set(struct blk_mq_tag_set *set, const struct blk_mq_ops *ops, unsigned int queue_depth, unsigned int set_flags); void blk_mq_free_tag_set(struct blk_mq_tag_set *set); void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule); void blk_mq_free_request(struct request *rq); bool blk_mq_queue_inflight(struct request_queue *q); enum { /* return when out of requests */ BLK_MQ_REQ_NOWAIT = (__force blk_mq_req_flags_t)(1 << 0), /* allocate from reserved pool */ BLK_MQ_REQ_RESERVED = (__force blk_mq_req_flags_t)(1 << 1), /* set RQF_PM */ BLK_MQ_REQ_PM = (__force blk_mq_req_flags_t)(1 << 2), }; struct request *blk_mq_alloc_request(struct request_queue *q, unsigned int op, blk_mq_req_flags_t flags); struct request *blk_mq_alloc_request_hctx(struct request_queue *q, unsigned int op, blk_mq_req_flags_t flags, unsigned int hctx_idx); struct request *blk_mq_tag_to_rq(struct blk_mq_tags *tags, unsigned int tag); enum { BLK_MQ_UNIQUE_TAG_BITS = 16, BLK_MQ_UNIQUE_TAG_MASK = (1 << BLK_MQ_UNIQUE_TAG_BITS) - 1, }; u32 blk_mq_unique_tag(struct request *rq); static inline u16 blk_mq_unique_tag_to_hwq(u32 unique_tag) { return unique_tag >> BLK_MQ_UNIQUE_TAG_BITS; } static inline u16 blk_mq_unique_tag_to_tag(u32 unique_tag) { return unique_tag & BLK_MQ_UNIQUE_TAG_MASK; } /** * blk_mq_rq_state() - read the current MQ_RQ_* state of a request * @rq: target request. */ static inline enum mq_rq_state blk_mq_rq_state(struct request *rq) { return READ_ONCE(rq->state); } static inline int blk_mq_request_started(struct request *rq) { return blk_mq_rq_state(rq) != MQ_RQ_IDLE; } static inline int blk_mq_request_completed(struct request *rq) { return blk_mq_rq_state(rq) == MQ_RQ_COMPLETE; } /* * * Set the state to complete when completing a request from inside ->queue_rq. * This is used by drivers that want to ensure special complete actions that * need access to the request are called on failure, e.g. by nvme for * multipathing. */ static inline void blk_mq_set_request_complete(struct request *rq) { WRITE_ONCE(rq->state, MQ_RQ_COMPLETE); } void blk_mq_start_request(struct request *rq); void blk_mq_end_request(struct request *rq, blk_status_t error); void __blk_mq_end_request(struct request *rq, blk_status_t error); void blk_mq_requeue_request(struct request *rq, bool kick_requeue_list); void blk_mq_kick_requeue_list(struct request_queue *q); void blk_mq_delay_kick_requeue_list(struct request_queue *q, unsigned long msecs); void blk_mq_complete_request(struct request *rq); bool blk_mq_complete_request_remote(struct request *rq); bool blk_mq_queue_stopped(struct request_queue *q); void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx); void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx); void blk_mq_stop_hw_queues(struct request_queue *q); void blk_mq_start_hw_queues(struct request_queue *q); void blk_mq_start_stopped_hw_queue(struct blk_mq_hw_ctx *hctx, bool async); void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async); void blk_mq_quiesce_queue(struct request_queue *q); void blk_mq_unquiesce_queue(struct request_queue *q); void blk_mq_delay_run_hw_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs); void blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx, bool async); void blk_mq_run_hw_queues(struct request_queue *q, bool async); void blk_mq_delay_run_hw_queues(struct request_queue *q, unsigned long msecs); void blk_mq_tagset_busy_iter(struct blk_mq_tag_set *tagset, busy_tag_iter_fn *fn, void *priv); void blk_mq_tagset_wait_completed_request(struct blk_mq_tag_set *tagset); void blk_mq_freeze_queue(struct request_queue *q); void blk_mq_unfreeze_queue(struct request_queue *q); void blk_freeze_queue_start(struct request_queue *q); void blk_mq_freeze_queue_wait(struct request_queue *q); int blk_mq_freeze_queue_wait_timeout(struct request_queue *q, unsigned long timeout); int blk_mq_map_queues(struct blk_mq_queue_map *qmap); void blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, int nr_hw_queues); void blk_mq_quiesce_queue_nowait(struct request_queue *q); unsigned int blk_mq_rq_cpu(struct request *rq); bool __blk_should_fake_timeout(struct request_queue *q); static inline bool blk_should_fake_timeout(struct request_queue *q) { if (IS_ENABLED(CONFIG_FAIL_IO_TIMEOUT) && test_bit(QUEUE_FLAG_FAIL_IO, &q->queue_flags)) return __blk_should_fake_timeout(q); return false; } /** * blk_mq_rq_from_pdu - cast a PDU to a request * @pdu: the PDU (Protocol Data Unit) to be casted * * Return: request * * Driver command data is immediately after the request. So subtract request * size to get back to the original request. */ static inline struct request *blk_mq_rq_from_pdu(void *pdu) { return pdu - sizeof(struct request); } /** * blk_mq_rq_to_pdu - cast a request to a PDU * @rq: the request to be casted * * Return: pointer to the PDU * * Driver command data is immediately after the request. So add request to get * the PDU. */ static inline void *blk_mq_rq_to_pdu(struct request *rq) { return rq + 1; } #define queue_for_each_hw_ctx(q, hctx, i) \ for ((i) = 0; (i) < (q)->nr_hw_queues && \ ({ hctx = (q)->queue_hw_ctx[i]; 1; }); (i)++) #define hctx_for_each_ctx(hctx, ctx, i) \ for ((i) = 0; (i) < (hctx)->nr_ctx && \ ({ ctx = (hctx)->ctxs[(i)]; 1; }); (i)++) static inline blk_qc_t request_to_qc_t(struct blk_mq_hw_ctx *hctx, struct request *rq) { if (rq->tag != -1) return rq->tag | (hctx->queue_num << BLK_QC_T_SHIFT); return rq->internal_tag | (hctx->queue_num << BLK_QC_T_SHIFT) | BLK_QC_T_INTERNAL; } static inline void blk_mq_cleanup_rq(struct request *rq) { if (rq->q->mq_ops->cleanup_rq) rq->q->mq_ops->cleanup_rq(rq); } static inline void blk_rq_bio_prep(struct request *rq, struct bio *bio, unsigned int nr_segs) { rq->nr_phys_segments = nr_segs; rq->__data_len = bio->bi_iter.bi_size; rq->bio = rq->biotail = bio; rq->ioprio = bio_prio(bio); if (bio->bi_bdev) rq->rq_disk = bio->bi_bdev->bd_disk; } blk_qc_t blk_mq_submit_bio(struct bio *bio); void blk_mq_hctx_set_fq_lock_class(struct blk_mq_hw_ctx *hctx, struct lock_class_key *key); #endif PK ! ���B B if_arp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * Global definitions for the ARP (RFC 826) protocol. * * Version: @(#)if_arp.h 1.0.1 04/16/93 * * Authors: Original taken from Berkeley UNIX 4.3, (c) UCB 1986-1988 * Portions taken from the KA9Q/NOS (v2.00m PA0GRI) source. * Ross Biro * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> * Florian La Roche, * Jonathan Layes <layes@loran.com> * Arnaldo Carvalho de Melo <acme@conectiva.com.br> ARPHRD_HWX25 */ #ifndef _LINUX_IF_ARP_H #define _LINUX_IF_ARP_H #include <linux/skbuff.h> #include <uapi/linux/if_arp.h> static inline struct arphdr *arp_hdr(const struct sk_buff *skb) { return (struct arphdr *)skb_network_header(skb); } static inline unsigned int arp_hdr_len(const struct net_device *dev) { switch (dev->type) { #if IS_ENABLED(CONFIG_FIREWIRE_NET) case ARPHRD_IEEE1394: /* ARP header, device address and 2 IP addresses */ return sizeof(struct arphdr) + dev->addr_len + sizeof(u32) * 2; #endif default: /* ARP header, plus 2 device addresses, plus 2 IP addresses. */ return sizeof(struct arphdr) + (dev->addr_len + sizeof(u32)) * 2; } } static inline bool dev_is_mac_header_xmit(const struct net_device *dev) { switch (dev->type) { case ARPHRD_TUNNEL: case ARPHRD_TUNNEL6: case ARPHRD_SIT: case ARPHRD_IPGRE: case ARPHRD_IP6GRE: case ARPHRD_VOID: case ARPHRD_NONE: case ARPHRD_RAWIP: case ARPHRD_PIMREG: /* PPP adds its l2 header automatically in ppp_start_xmit(). * This makes it look like an l3 device to __bpf_redirect() and tcf_mirred_init(). */ case ARPHRD_PPP: return false; default: return true; } } #endif /* _LINUX_IF_ARP_H */ PK ! y�Q�U �U lockdep.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Runtime locking correctness validator * * Copyright (C) 2006,2007 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> * Copyright (C) 2007 Red Hat, Inc., Peter Zijlstra * * see Documentation/locking/lockdep-design.rst for more details. */ #ifndef __LINUX_LOCKDEP_H #define __LINUX_LOCKDEP_H #include <linux/lockdep_types.h> #include <linux/smp.h> #include <asm/percpu.h> struct task_struct; /* for sysctl */ extern int prove_locking; extern int lock_stat; #ifdef CONFIG_LOCKDEP #include <linux/linkage.h> #include <linux/list.h> #include <linux/debug_locks.h> #include <linux/stacktrace.h> static inline void lockdep_copy_map(struct lockdep_map *to, struct lockdep_map *from) { int i; *to = *from; /* * Since the class cache can be modified concurrently we could observe * half pointers (64bit arch using 32bit copy insns). Therefore clear * the caches and take the performance hit. * * XXX it doesn't work well with lockdep_set_class_and_subclass(), since * that relies on cache abuse. */ for (i = 0; i < NR_LOCKDEP_CACHING_CLASSES; i++) to->class_cache[i] = NULL; } /* * Every lock has a list of other locks that were taken after it. * We only grow the list, never remove from it: */ struct lock_list { struct list_head entry; struct lock_class *class; struct lock_class *links_to; const struct lock_trace *trace; u16 distance; /* bitmap of different dependencies from head to this */ u8 dep; /* used by BFS to record whether "prev -> this" only has -(*R)-> */ u8 only_xr; /* * The parent field is used to implement breadth-first search, and the * bit 0 is reused to indicate if the lock has been accessed in BFS. */ struct lock_list *parent; }; /** * struct lock_chain - lock dependency chain record * * @irq_context: the same as irq_context in held_lock below * @depth: the number of held locks in this chain * @base: the index in chain_hlocks for this chain * @entry: the collided lock chains in lock_chain hash list * @chain_key: the hash key of this lock_chain */ struct lock_chain { /* see BUILD_BUG_ON()s in add_chain_cache() */ unsigned int irq_context : 2, depth : 6, base : 24; /* 4 byte hole */ struct hlist_node entry; u64 chain_key; }; #define MAX_LOCKDEP_KEYS_BITS 13 #define MAX_LOCKDEP_KEYS (1UL << MAX_LOCKDEP_KEYS_BITS) #define INITIAL_CHAIN_KEY -1 struct held_lock { /* * One-way hash of the dependency chain up to this point. We * hash the hashes step by step as the dependency chain grows. * * We use it for dependency-caching and we skip detection * passes and dependency-updates if there is a cache-hit, so * it is absolutely critical for 100% coverage of the validator * to have a unique key value for every unique dependency path * that can occur in the system, to make a unique hash value * as likely as possible - hence the 64-bit width. * * The task struct holds the current hash value (initialized * with zero), here we store the previous hash value: */ u64 prev_chain_key; unsigned long acquire_ip; struct lockdep_map *instance; struct lockdep_map *nest_lock; #ifdef CONFIG_LOCK_STAT u64 waittime_stamp; u64 holdtime_stamp; #endif /* * class_idx is zero-indexed; it points to the element in * lock_classes this held lock instance belongs to. class_idx is in * the range from 0 to (MAX_LOCKDEP_KEYS-1) inclusive. */ unsigned int class_idx:MAX_LOCKDEP_KEYS_BITS; /* * The lock-stack is unified in that the lock chains of interrupt * contexts nest ontop of process context chains, but we 'separate' * the hashes by starting with 0 if we cross into an interrupt * context, and we also keep do not add cross-context lock * dependencies - the lock usage graph walking covers that area * anyway, and we'd just unnecessarily increase the number of * dependencies otherwise. [Note: hardirq and softirq contexts * are separated from each other too.] * * The following field is used to detect when we cross into an * interrupt context: */ unsigned int irq_context:2; /* bit 0 - soft, bit 1 - hard */ unsigned int trylock:1; /* 16 bits */ unsigned int read:2; /* see lock_acquire() comment */ unsigned int check:1; /* see lock_acquire() comment */ unsigned int hardirqs_off:1; unsigned int references:12; /* 32 bits */ unsigned int pin_count; }; /* * Initialization, self-test and debugging-output methods: */ extern void lockdep_init(void); extern void lockdep_reset(void); extern void lockdep_reset_lock(struct lockdep_map *lock); extern void lockdep_free_key_range(void *start, unsigned long size); extern asmlinkage void lockdep_sys_exit(void); extern void lockdep_set_selftest_task(struct task_struct *task); extern void lockdep_init_task(struct task_struct *task); /* * Split the recursion counter in two to readily detect 'off' vs recursion. */ #define LOCKDEP_RECURSION_BITS 16 #define LOCKDEP_OFF (1U << LOCKDEP_RECURSION_BITS) #define LOCKDEP_RECURSION_MASK (LOCKDEP_OFF - 1) /* * lockdep_{off,on}() are macros to avoid tracing and kprobes; not inlines due * to header dependencies. */ #define lockdep_off() \ do { \ current->lockdep_recursion += LOCKDEP_OFF; \ } while (0) #define lockdep_on() \ do { \ current->lockdep_recursion -= LOCKDEP_OFF; \ } while (0) extern void lockdep_register_key(struct lock_class_key *key); extern void lockdep_unregister_key(struct lock_class_key *key); /* * These methods are used by specific locking variants (spinlocks, * rwlocks, mutexes and rwsems) to pass init/acquire/release events * to lockdep: */ extern void lockdep_init_map_type(struct lockdep_map *lock, const char *name, struct lock_class_key *key, int subclass, u8 inner, u8 outer, u8 lock_type); static inline void lockdep_init_map_waits(struct lockdep_map *lock, const char *name, struct lock_class_key *key, int subclass, u8 inner, u8 outer) { lockdep_init_map_type(lock, name, key, subclass, inner, outer, LD_LOCK_NORMAL); } static inline void lockdep_init_map_wait(struct lockdep_map *lock, const char *name, struct lock_class_key *key, int subclass, u8 inner) { lockdep_init_map_waits(lock, name, key, subclass, inner, LD_WAIT_INV); } static inline void lockdep_init_map(struct lockdep_map *lock, const char *name, struct lock_class_key *key, int subclass) { lockdep_init_map_wait(lock, name, key, subclass, LD_WAIT_INV); } /* * Reinitialize a lock key - for cases where there is special locking or * special initialization of locks so that the validator gets the scope * of dependencies wrong: they are either too broad (they need a class-split) * or they are too narrow (they suffer from a false class-split): */ #define lockdep_set_class(lock, key) \ lockdep_init_map_type(&(lock)->dep_map, #key, key, 0, \ (lock)->dep_map.wait_type_inner, \ (lock)->dep_map.wait_type_outer, \ (lock)->dep_map.lock_type) #define lockdep_set_class_and_name(lock, key, name) \ lockdep_init_map_type(&(lock)->dep_map, name, key, 0, \ (lock)->dep_map.wait_type_inner, \ (lock)->dep_map.wait_type_outer, \ (lock)->dep_map.lock_type) #define lockdep_set_class_and_subclass(lock, key, sub) \ lockdep_init_map_type(&(lock)->dep_map, #key, key, sub, \ (lock)->dep_map.wait_type_inner, \ (lock)->dep_map.wait_type_outer, \ (lock)->dep_map.lock_type) #define lockdep_set_subclass(lock, sub) \ lockdep_init_map_type(&(lock)->dep_map, (lock)->dep_map.name, (lock)->dep_map.key, sub,\ (lock)->dep_map.wait_type_inner, \ (lock)->dep_map.wait_type_outer, \ (lock)->dep_map.lock_type) #define lockdep_set_novalidate_class(lock) \ lockdep_set_class_and_name(lock, &__lockdep_no_validate__, #lock) /* * Compare locking classes */ #define lockdep_match_class(lock, key) lockdep_match_key(&(lock)->dep_map, key) static inline int lockdep_match_key(struct lockdep_map *lock, struct lock_class_key *key) { return lock->key == key; } struct lock_class *lockdep_hlock_class(struct held_lock *hlock); /* * Acquire a lock. * * Values for "read": * * 0: exclusive (write) acquire * 1: read-acquire (no recursion allowed) * 2: read-acquire with same-instance recursion allowed * * Values for check: * * 0: simple checks (freeing, held-at-exit-time, etc.) * 1: full validation */ extern void lock_acquire(struct lockdep_map *lock, unsigned int subclass, int trylock, int read, int check, struct lockdep_map *nest_lock, unsigned long ip); extern void lock_release(struct lockdep_map *lock, unsigned long ip); /* lock_is_held_type() returns */ #define LOCK_STATE_UNKNOWN -1 #define LOCK_STATE_NOT_HELD 0 #define LOCK_STATE_HELD 1 /* * Same "read" as for lock_acquire(), except -1 means any. */ extern int lock_is_held_type(const struct lockdep_map *lock, int read); static inline int lock_is_held(const struct lockdep_map *lock) { return lock_is_held_type(lock, -1); } #define lockdep_is_held(lock) lock_is_held(&(lock)->dep_map) #define lockdep_is_held_type(lock, r) lock_is_held_type(&(lock)->dep_map, (r)) extern void lock_set_class(struct lockdep_map *lock, const char *name, struct lock_class_key *key, unsigned int subclass, unsigned long ip); static inline void lock_set_subclass(struct lockdep_map *lock, unsigned int subclass, unsigned long ip) { lock_set_class(lock, lock->name, lock->key, subclass, ip); } extern void lock_downgrade(struct lockdep_map *lock, unsigned long ip); #define NIL_COOKIE (struct pin_cookie){ .val = 0U, } extern struct pin_cookie lock_pin_lock(struct lockdep_map *lock); extern void lock_repin_lock(struct lockdep_map *lock, struct pin_cookie); extern void lock_unpin_lock(struct lockdep_map *lock, struct pin_cookie); #define lockdep_depth(tsk) (debug_locks ? (tsk)->lockdep_depth : 0) #define lockdep_assert(cond) \ do { WARN_ON(debug_locks && !(cond)); } while (0) #define lockdep_assert_once(cond) \ do { WARN_ON_ONCE(debug_locks && !(cond)); } while (0) #define lockdep_assert_held(l) \ lockdep_assert(lockdep_is_held(l) != LOCK_STATE_NOT_HELD) #define lockdep_assert_not_held(l) \ lockdep_assert(lockdep_is_held(l) != LOCK_STATE_HELD) #define lockdep_assert_held_write(l) \ lockdep_assert(lockdep_is_held_type(l, 0)) #define lockdep_assert_held_read(l) \ lockdep_assert(lockdep_is_held_type(l, 1)) #define lockdep_assert_held_once(l) \ lockdep_assert_once(lockdep_is_held(l) != LOCK_STATE_NOT_HELD) #define lockdep_assert_none_held_once() \ lockdep_assert_once(!current->lockdep_depth) #define lockdep_recursing(tsk) ((tsk)->lockdep_recursion) #define lockdep_pin_lock(l) lock_pin_lock(&(l)->dep_map) #define lockdep_repin_lock(l,c) lock_repin_lock(&(l)->dep_map, (c)) #define lockdep_unpin_lock(l,c) lock_unpin_lock(&(l)->dep_map, (c)) #else /* !CONFIG_LOCKDEP */ static inline void lockdep_init_task(struct task_struct *task) { } static inline void lockdep_off(void) { } static inline void lockdep_on(void) { } static inline void lockdep_set_selftest_task(struct task_struct *task) { } # define lock_acquire(l, s, t, r, c, n, i) do { } while (0) # define lock_release(l, i) do { } while (0) # define lock_downgrade(l, i) do { } while (0) # define lock_set_class(l, n, k, s, i) do { } while (0) # define lock_set_subclass(l, s, i) do { } while (0) # define lockdep_init() do { } while (0) # define lockdep_init_map_type(lock, name, key, sub, inner, outer, type) \ do { (void)(name); (void)(key); } while (0) # define lockdep_init_map_waits(lock, name, key, sub, inner, outer) \ do { (void)(name); (void)(key); } while (0) # define lockdep_init_map_wait(lock, name, key, sub, inner) \ do { (void)(name); (void)(key); } while (0) # define lockdep_init_map(lock, name, key, sub) \ do { (void)(name); (void)(key); } while (0) # define lockdep_set_class(lock, key) do { (void)(key); } while (0) # define lockdep_set_class_and_name(lock, key, name) \ do { (void)(key); (void)(name); } while (0) #define lockdep_set_class_and_subclass(lock, key, sub) \ do { (void)(key); } while (0) #define lockdep_set_subclass(lock, sub) do { } while (0) #define lockdep_set_novalidate_class(lock) do { } while (0) /* * We don't define lockdep_match_class() and lockdep_match_key() for !LOCKDEP * case since the result is not well defined and the caller should rather * #ifdef the call himself. */ # define lockdep_reset() do { debug_locks = 1; } while (0) # define lockdep_free_key_range(start, size) do { } while (0) # define lockdep_sys_exit() do { } while (0) static inline void lockdep_register_key(struct lock_class_key *key) { } static inline void lockdep_unregister_key(struct lock_class_key *key) { } #define lockdep_depth(tsk) (0) /* * Dummy forward declarations, allow users to write less ifdef-y code * and depend on dead code elimination. */ extern int lock_is_held(const void *); extern int lockdep_is_held(const void *); #define lockdep_is_held_type(l, r) (1) #define lockdep_assert(c) do { } while (0) #define lockdep_assert_once(c) do { } while (0) #define lockdep_assert_held(l) do { (void)(l); } while (0) #define lockdep_assert_not_held(l) do { (void)(l); } while (0) #define lockdep_assert_held_write(l) do { (void)(l); } while (0) #define lockdep_assert_held_read(l) do { (void)(l); } while (0) #define lockdep_assert_held_once(l) do { (void)(l); } while (0) #define lockdep_assert_none_held_once() do { } while (0) #define lockdep_recursing(tsk) (0) #define NIL_COOKIE (struct pin_cookie){ } #define lockdep_pin_lock(l) ({ struct pin_cookie cookie = { }; cookie; }) #define lockdep_repin_lock(l, c) do { (void)(l); (void)(c); } while (0) #define lockdep_unpin_lock(l, c) do { (void)(l); (void)(c); } while (0) #endif /* !LOCKDEP */ enum xhlock_context_t { XHLOCK_HARD, XHLOCK_SOFT, XHLOCK_CTX_NR, }; #define lockdep_init_map_crosslock(m, n, k, s) do {} while (0) /* * To initialize a lockdep_map statically use this macro. * Note that _name must not be NULL. */ #define STATIC_LOCKDEP_MAP_INIT(_name, _key) \ { .name = (_name), .key = (void *)(_key), } static inline void lockdep_invariant_state(bool force) {} static inline void lockdep_free_task(struct task_struct *task) {} #ifdef CONFIG_LOCK_STAT extern void lock_contended(struct lockdep_map *lock, unsigned long ip); extern void lock_acquired(struct lockdep_map *lock, unsigned long ip); #define LOCK_CONTENDED(_lock, try, lock) \ do { \ if (!try(_lock)) { \ lock_contended(&(_lock)->dep_map, _RET_IP_); \ lock(_lock); \ } \ lock_acquired(&(_lock)->dep_map, _RET_IP_); \ } while (0) #define LOCK_CONTENDED_RETURN(_lock, try, lock) \ ({ \ int ____err = 0; \ if (!try(_lock)) { \ lock_contended(&(_lock)->dep_map, _RET_IP_); \ ____err = lock(_lock); \ } \ if (!____err) \ lock_acquired(&(_lock)->dep_map, _RET_IP_); \ ____err; \ }) #else /* CONFIG_LOCK_STAT */ #define lock_contended(lockdep_map, ip) do {} while (0) #define lock_acquired(lockdep_map, ip) do {} while (0) #define LOCK_CONTENDED(_lock, try, lock) \ lock(_lock) #define LOCK_CONTENDED_RETURN(_lock, try, lock) \ lock(_lock) #endif /* CONFIG_LOCK_STAT */ #ifdef CONFIG_LOCKDEP /* * On lockdep we dont want the hand-coded irq-enable of * _raw_*_lock_flags() code, because lockdep assumes * that interrupts are not re-enabled during lock-acquire: */ #define LOCK_CONTENDED_FLAGS(_lock, try, lock, lockfl, flags) \ LOCK_CONTENDED((_lock), (try), (lock)) #else /* CONFIG_LOCKDEP */ #define LOCK_CONTENDED_FLAGS(_lock, try, lock, lockfl, flags) \ lockfl((_lock), (flags)) #endif /* CONFIG_LOCKDEP */ #ifdef CONFIG_PROVE_LOCKING extern void print_irqtrace_events(struct task_struct *curr); #else static inline void print_irqtrace_events(struct task_struct *curr) { } #endif /* Variable used to make lockdep treat read_lock() as recursive in selftests */ #ifdef CONFIG_DEBUG_LOCKING_API_SELFTESTS extern unsigned int force_read_lock_recursive; #else /* CONFIG_DEBUG_LOCKING_API_SELFTESTS */ #define force_read_lock_recursive 0 #endif /* CONFIG_DEBUG_LOCKING_API_SELFTESTS */ #ifdef CONFIG_LOCKDEP extern bool read_lock_is_recursive(void); #else /* CONFIG_LOCKDEP */ /* If !LOCKDEP, the value is meaningless */ #define read_lock_is_recursive() 0 #endif /* * For trivial one-depth nesting of a lock-class, the following * global define can be used. (Subsystems with multiple levels * of nesting should define their own lock-nesting subclasses.) */ #define SINGLE_DEPTH_NESTING 1 /* * Map the dependency ops to NOP or to real lockdep ops, depending * on the per lock-class debug mode: */ #define lock_acquire_exclusive(l, s, t, n, i) lock_acquire(l, s, t, 0, 1, n, i) #define lock_acquire_shared(l, s, t, n, i) lock_acquire(l, s, t, 1, 1, n, i) #define lock_acquire_shared_recursive(l, s, t, n, i) lock_acquire(l, s, t, 2, 1, n, i) #define spin_acquire(l, s, t, i) lock_acquire_exclusive(l, s, t, NULL, i) #define spin_acquire_nest(l, s, t, n, i) lock_acquire_exclusive(l, s, t, n, i) #define spin_release(l, i) lock_release(l, i) #define rwlock_acquire(l, s, t, i) lock_acquire_exclusive(l, s, t, NULL, i) #define rwlock_acquire_read(l, s, t, i) \ do { \ if (read_lock_is_recursive()) \ lock_acquire_shared_recursive(l, s, t, NULL, i); \ else \ lock_acquire_shared(l, s, t, NULL, i); \ } while (0) #define rwlock_release(l, i) lock_release(l, i) #define seqcount_acquire(l, s, t, i) lock_acquire_exclusive(l, s, t, NULL, i) #define seqcount_acquire_read(l, s, t, i) lock_acquire_shared_recursive(l, s, t, NULL, i) #define seqcount_release(l, i) lock_release(l, i) #define mutex_acquire(l, s, t, i) lock_acquire_exclusive(l, s, t, NULL, i) #define mutex_acquire_nest(l, s, t, n, i) lock_acquire_exclusive(l, s, t, n, i) #define mutex_release(l, i) lock_release(l, i) #define rwsem_acquire(l, s, t, i) lock_acquire_exclusive(l, s, t, NULL, i) #define rwsem_acquire_nest(l, s, t, n, i) lock_acquire_exclusive(l, s, t, n, i) #define rwsem_acquire_read(l, s, t, i) lock_acquire_shared(l, s, t, NULL, i) #define rwsem_release(l, i) lock_release(l, i) #define lock_map_acquire(l) lock_acquire_exclusive(l, 0, 0, NULL, _THIS_IP_) #define lock_map_acquire_read(l) lock_acquire_shared_recursive(l, 0, 0, NULL, _THIS_IP_) #define lock_map_acquire_tryread(l) lock_acquire_shared_recursive(l, 0, 1, NULL, _THIS_IP_) #define lock_map_release(l) lock_release(l, _THIS_IP_) #ifdef CONFIG_PROVE_LOCKING # define might_lock(lock) \ do { \ typecheck(struct lockdep_map *, &(lock)->dep_map); \ lock_acquire(&(lock)->dep_map, 0, 0, 0, 1, NULL, _THIS_IP_); \ lock_release(&(lock)->dep_map, _THIS_IP_); \ } while (0) # define might_lock_read(lock) \ do { \ typecheck(struct lockdep_map *, &(lock)->dep_map); \ lock_acquire(&(lock)->dep_map, 0, 0, 1, 1, NULL, _THIS_IP_); \ lock_release(&(lock)->dep_map, _THIS_IP_); \ } while (0) # define might_lock_nested(lock, subclass) \ do { \ typecheck(struct lockdep_map *, &(lock)->dep_map); \ lock_acquire(&(lock)->dep_map, subclass, 0, 1, 1, NULL, \ _THIS_IP_); \ lock_release(&(lock)->dep_map, _THIS_IP_); \ } while (0) DECLARE_PER_CPU(int, hardirqs_enabled); DECLARE_PER_CPU(int, hardirq_context); DECLARE_PER_CPU(unsigned int, lockdep_recursion); #define __lockdep_enabled (debug_locks && !this_cpu_read(lockdep_recursion)) #define lockdep_assert_irqs_enabled() \ do { \ WARN_ON_ONCE(__lockdep_enabled && !this_cpu_read(hardirqs_enabled)); \ } while (0) #define lockdep_assert_irqs_disabled() \ do { \ WARN_ON_ONCE(__lockdep_enabled && this_cpu_read(hardirqs_enabled)); \ } while (0) #define lockdep_assert_in_irq() \ do { \ WARN_ON_ONCE(__lockdep_enabled && !this_cpu_read(hardirq_context)); \ } while (0) #define lockdep_assert_preemption_enabled() \ do { \ WARN_ON_ONCE(IS_ENABLED(CONFIG_PREEMPT_COUNT) && \ __lockdep_enabled && \ (preempt_count() != 0 || \ !this_cpu_read(hardirqs_enabled))); \ } while (0) #define lockdep_assert_preemption_disabled() \ do { \ WARN_ON_ONCE(IS_ENABLED(CONFIG_PREEMPT_COUNT) && \ __lockdep_enabled && \ (preempt_count() == 0 && \ this_cpu_read(hardirqs_enabled))); \ } while (0) /* * Acceptable for protecting per-CPU resources accessed from BH. * Much like in_softirq() - semantics are ambiguous, use carefully. */ #define lockdep_assert_in_softirq() \ do { \ WARN_ON_ONCE(__lockdep_enabled && \ (!in_softirq() || in_irq() || in_nmi())); \ } while (0) #else # define might_lock(lock) do { } while (0) # define might_lock_read(lock) do { } while (0) # define might_lock_nested(lock, subclass) do { } while (0) # define lockdep_assert_irqs_enabled() do { } while (0) # define lockdep_assert_irqs_disabled() do { } while (0) # define lockdep_assert_in_irq() do { } while (0) # define lockdep_assert_preemption_enabled() do { } while (0) # define lockdep_assert_preemption_disabled() do { } while (0) # define lockdep_assert_in_softirq() do { } while (0) #endif #ifdef CONFIG_PROVE_RAW_LOCK_NESTING # define lockdep_assert_RT_in_threaded_ctx() do { \ WARN_ONCE(debug_locks && !current->lockdep_recursion && \ lockdep_hardirq_context() && \ !(current->hardirq_threaded || current->irq_config), \ "Not in threaded context on PREEMPT_RT as expected\n"); \ } while (0) #else # define lockdep_assert_RT_in_threaded_ctx() do { } while (0) #endif #ifdef CONFIG_LOCKDEP void lockdep_rcu_suspicious(const char *file, const int line, const char *s); #else static inline void lockdep_rcu_suspicious(const char *file, const int line, const char *s) { } #endif #endif /* __LINUX_LOCKDEP_H */ PK ! {q}� � nfs_common.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This file contains constants and methods used by both NFS client and server. */ #ifndef _LINUX_NFS_COMMON_H #define _LINUX_NFS_COMMON_H #include <linux/errno.h> #include <uapi/linux/nfs.h> /* Mapping from NFS error code to "errno" error code. */ #define errno_NFSERR_IO EIO int nfs_stat_to_errno(enum nfs_stat status); #endif /* _LINUX_NFS_COMMON_H */ PK ! �b�a a netfilter_bridge/ebtables.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * ebtables * * Authors: * Bart De Schuymer <bdschuym@pandora.be> * * ebtables.c,v 2.0, April, 2002 * * This code is strongly inspired by the iptables code which is * Copyright (C) 1999 Paul `Rusty' Russell & Michael J. Neuling */ #ifndef __LINUX_BRIDGE_EFF_H #define __LINUX_BRIDGE_EFF_H #include <linux/if.h> #include <linux/if_ether.h> #include <uapi/linux/netfilter_bridge/ebtables.h> struct ebt_match { struct list_head list; const char name[EBT_FUNCTION_MAXNAMELEN]; bool (*match)(const struct sk_buff *skb, const struct net_device *in, const struct net_device *out, const struct xt_match *match, const void *matchinfo, int offset, unsigned int protoff, bool *hotdrop); bool (*checkentry)(const char *table, const void *entry, const struct xt_match *match, void *matchinfo, unsigned int hook_mask); void (*destroy)(const struct xt_match *match, void *matchinfo); unsigned int matchsize; u_int8_t revision; u_int8_t family; struct module *me; }; struct ebt_watcher { struct list_head list; const char name[EBT_FUNCTION_MAXNAMELEN]; unsigned int (*target)(struct sk_buff *skb, const struct net_device *in, const struct net_device *out, unsigned int hook_num, const struct xt_target *target, const void *targinfo); bool (*checkentry)(const char *table, const void *entry, const struct xt_target *target, void *targinfo, unsigned int hook_mask); void (*destroy)(const struct xt_target *target, void *targinfo); unsigned int targetsize; u_int8_t revision; u_int8_t family; struct module *me; }; struct ebt_target { struct list_head list; const char name[EBT_FUNCTION_MAXNAMELEN]; /* returns one of the standard EBT_* verdicts */ unsigned int (*target)(struct sk_buff *skb, const struct net_device *in, const struct net_device *out, unsigned int hook_num, const struct xt_target *target, const void *targinfo); bool (*checkentry)(const char *table, const void *entry, const struct xt_target *target, void *targinfo, unsigned int hook_mask); void (*destroy)(const struct xt_target *target, void *targinfo); unsigned int targetsize; u_int8_t revision; u_int8_t family; struct module *me; }; /* used for jumping from and into user defined chains (udc) */ struct ebt_chainstack { struct ebt_entries *chaininfo; /* pointer to chain data */ struct ebt_entry *e; /* pointer to entry data */ unsigned int n; /* n'th entry */ }; struct ebt_table_info { /* total size of the entries */ unsigned int entries_size; unsigned int nentries; /* pointers to the start of the chains */ struct ebt_entries *hook_entry[NF_BR_NUMHOOKS]; /* room to maintain the stack used for jumping from and into udc */ struct ebt_chainstack **chainstack; char *entries; struct ebt_counter counters[] ____cacheline_aligned; }; struct ebt_table { struct list_head list; char name[EBT_TABLE_MAXNAMELEN]; struct ebt_replace_kernel *table; unsigned int valid_hooks; rwlock_t lock; /* the data used by the kernel */ struct ebt_table_info *private; struct nf_hook_ops *ops; struct module *me; }; #define EBT_ALIGN(s) (((s) + (__alignof__(struct _xt_align)-1)) & \ ~(__alignof__(struct _xt_align)-1)) extern int ebt_register_table(struct net *net, const struct ebt_table *table, const struct nf_hook_ops *ops); extern void ebt_unregister_table(struct net *net, const char *tablename); void ebt_unregister_table_pre_exit(struct net *net, const char *tablename); extern unsigned int ebt_do_table(struct sk_buff *skb, const struct nf_hook_state *state, struct ebt_table *table); /* True if the hook mask denotes that the rule is in a base chain, * used in the check() functions */ #define BASE_CHAIN (par->hook_mask & (1 << NF_BR_NUMHOOKS)) /* Clear the bit in the hook mask that tells if the rule is on a base chain */ #define CLEAR_BASE_CHAIN_BIT (par->hook_mask &= ~(1 << NF_BR_NUMHOOKS)) static inline bool ebt_invalid_target(int target) { return (target < -NUM_STANDARD_TARGETS || target >= 0); } int ebt_register_template(const struct ebt_table *t, int(*table_init)(struct net *net)); void ebt_unregister_template(const struct ebt_table *t); #endif PK ! �ޯ � bvec.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * bvec iterator * * Copyright (C) 2001 Ming Lei <ming.lei@canonical.com> */ #ifndef __LINUX_BVEC_H #define __LINUX_BVEC_H #include <linux/highmem.h> #include <linux/bug.h> #include <linux/errno.h> #include <linux/limits.h> #include <linux/minmax.h> #include <linux/mm.h> #include <linux/types.h> struct page; /** * struct bio_vec - a contiguous range of physical memory addresses * @bv_page: First page associated with the address range. * @bv_len: Number of bytes in the address range. * @bv_offset: Start of the address range relative to the start of @bv_page. * * The following holds for a bvec if n * PAGE_SIZE < bv_offset + bv_len: * * nth_page(@bv_page, n) == @bv_page + n * * This holds because page_is_mergeable() checks the above property. */ struct bio_vec { struct page *bv_page; unsigned int bv_len; unsigned int bv_offset; }; struct bvec_iter { sector_t bi_sector; /* device address in 512 byte sectors */ unsigned int bi_size; /* residual I/O count */ unsigned int bi_idx; /* current index into bvl_vec */ unsigned int bi_bvec_done; /* number of bytes completed in current bvec */ }; struct bvec_iter_all { struct bio_vec bv; int idx; unsigned done; }; /* * various member access, note that bio_data should of course not be used * on highmem page vectors */ #define __bvec_iter_bvec(bvec, iter) (&(bvec)[(iter).bi_idx]) /* multi-page (mp_bvec) helpers */ #define mp_bvec_iter_page(bvec, iter) \ (__bvec_iter_bvec((bvec), (iter))->bv_page) #define mp_bvec_iter_len(bvec, iter) \ min((iter).bi_size, \ __bvec_iter_bvec((bvec), (iter))->bv_len - (iter).bi_bvec_done) #define mp_bvec_iter_offset(bvec, iter) \ (__bvec_iter_bvec((bvec), (iter))->bv_offset + (iter).bi_bvec_done) #define mp_bvec_iter_page_idx(bvec, iter) \ (mp_bvec_iter_offset((bvec), (iter)) / PAGE_SIZE) #define mp_bvec_iter_bvec(bvec, iter) \ ((struct bio_vec) { \ .bv_page = mp_bvec_iter_page((bvec), (iter)), \ .bv_len = mp_bvec_iter_len((bvec), (iter)), \ .bv_offset = mp_bvec_iter_offset((bvec), (iter)), \ }) /* For building single-page bvec in flight */ #define bvec_iter_offset(bvec, iter) \ (mp_bvec_iter_offset((bvec), (iter)) % PAGE_SIZE) #define bvec_iter_len(bvec, iter) \ min_t(unsigned, mp_bvec_iter_len((bvec), (iter)), \ PAGE_SIZE - bvec_iter_offset((bvec), (iter))) #define bvec_iter_page(bvec, iter) \ (mp_bvec_iter_page((bvec), (iter)) + \ mp_bvec_iter_page_idx((bvec), (iter))) #define bvec_iter_bvec(bvec, iter) \ ((struct bio_vec) { \ .bv_page = bvec_iter_page((bvec), (iter)), \ .bv_len = bvec_iter_len((bvec), (iter)), \ .bv_offset = bvec_iter_offset((bvec), (iter)), \ }) static inline bool bvec_iter_advance(const struct bio_vec *bv, struct bvec_iter *iter, unsigned bytes) { unsigned int idx = iter->bi_idx; if (WARN_ONCE(bytes > iter->bi_size, "Attempted to advance past end of bvec iter\n")) { iter->bi_size = 0; return false; } iter->bi_size -= bytes; bytes += iter->bi_bvec_done; while (bytes && bytes >= bv[idx].bv_len) { bytes -= bv[idx].bv_len; idx++; } iter->bi_idx = idx; iter->bi_bvec_done = bytes; return true; } /* * A simpler version of bvec_iter_advance(), @bytes should not span * across multiple bvec entries, i.e. bytes <= bv[i->bi_idx].bv_len */ static inline void bvec_iter_advance_single(const struct bio_vec *bv, struct bvec_iter *iter, unsigned int bytes) { unsigned int done = iter->bi_bvec_done + bytes; if (done == bv[iter->bi_idx].bv_len) { done = 0; iter->bi_idx++; } iter->bi_bvec_done = done; iter->bi_size -= bytes; } #define for_each_bvec(bvl, bio_vec, iter, start) \ for (iter = (start); \ (iter).bi_size && \ ((bvl = bvec_iter_bvec((bio_vec), (iter))), 1); \ bvec_iter_advance_single((bio_vec), &(iter), (bvl).bv_len)) /* for iterating one bio from start to end */ #define BVEC_ITER_ALL_INIT (struct bvec_iter) \ { \ .bi_sector = 0, \ .bi_size = UINT_MAX, \ .bi_idx = 0, \ .bi_bvec_done = 0, \ } static inline struct bio_vec *bvec_init_iter_all(struct bvec_iter_all *iter_all) { iter_all->done = 0; iter_all->idx = 0; return &iter_all->bv; } static inline void bvec_advance(const struct bio_vec *bvec, struct bvec_iter_all *iter_all) { struct bio_vec *bv = &iter_all->bv; if (iter_all->done) { bv->bv_page++; bv->bv_offset = 0; } else { bv->bv_page = bvec->bv_page + (bvec->bv_offset >> PAGE_SHIFT); bv->bv_offset = bvec->bv_offset & ~PAGE_MASK; } bv->bv_len = min_t(unsigned int, PAGE_SIZE - bv->bv_offset, bvec->bv_len - iter_all->done); iter_all->done += bv->bv_len; if (iter_all->done == bvec->bv_len) { iter_all->idx++; iter_all->done = 0; } } /** * bvec_kmap_local - map a bvec into the kernel virtual address space * @bvec: bvec to map * * Must be called on single-page bvecs only. Call kunmap_local on the returned * address to unmap. */ static inline void *bvec_kmap_local(struct bio_vec *bvec) { return kmap_local_page(bvec->bv_page) + bvec->bv_offset; } /** * memcpy_from_bvec - copy data from a bvec * @bvec: bvec to copy from * * Must be called on single-page bvecs only. */ static inline void memcpy_from_bvec(char *to, struct bio_vec *bvec) { memcpy_from_page(to, bvec->bv_page, bvec->bv_offset, bvec->bv_len); } /** * memcpy_to_bvec - copy data to a bvec * @bvec: bvec to copy to * * Must be called on single-page bvecs only. */ static inline void memcpy_to_bvec(struct bio_vec *bvec, const char *from) { memcpy_to_page(bvec->bv_page, bvec->bv_offset, from, bvec->bv_len); } /** * memzero_bvec - zero all data in a bvec * @bvec: bvec to zero * * Must be called on single-page bvecs only. */ static inline void memzero_bvec(struct bio_vec *bvec) { memzero_page(bvec->bv_page, bvec->bv_offset, bvec->bv_len); } /** * bvec_virt - return the virtual address for a bvec * @bvec: bvec to return the virtual address for * * Note: the caller must ensure that @bvec->bv_page is not a highmem page. */ static inline void *bvec_virt(struct bio_vec *bvec) { WARN_ON_ONCE(PageHighMem(bvec->bv_page)); return page_address(bvec->bv_page) + bvec->bv_offset; } #endif /* __LINUX_BVEC_H */ PK ! �a�W60 60 kgdb.hnu �[��� /* * This provides the callbacks and functions that KGDB needs to share between * the core, I/O and arch-specific portions. * * Author: Amit Kale <amitkale@linsyssoft.com> and * Tom Rini <trini@kernel.crashing.org> * * 2001-2004 (c) Amit S. Kale and 2003-2005 (c) MontaVista Software, Inc. * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef _KGDB_H_ #define _KGDB_H_ #include <linux/linkage.h> #include <linux/init.h> #include <linux/atomic.h> #include <linux/kprobes.h> #ifdef CONFIG_HAVE_ARCH_KGDB #include <asm/kgdb.h> #endif #ifdef CONFIG_KGDB struct pt_regs; /** * kgdb_skipexception - (optional) exit kgdb_handle_exception early * @exception: Exception vector number * @regs: Current &struct pt_regs. * * On some architectures it is required to skip a breakpoint * exception when it occurs after a breakpoint has been removed. * This can be implemented in the architecture specific portion of kgdb. */ extern int kgdb_skipexception(int exception, struct pt_regs *regs); struct tasklet_struct; struct task_struct; struct uart_port; /** * kgdb_breakpoint - compiled in breakpoint * * This will be implemented as a static inline per architecture. This * function is called by the kgdb core to execute an architecture * specific trap to cause kgdb to enter the exception processing. * */ void kgdb_breakpoint(void); extern int kgdb_connected; extern int kgdb_io_module_registered; extern atomic_t kgdb_setting_breakpoint; extern atomic_t kgdb_cpu_doing_single_step; extern struct task_struct *kgdb_usethread; extern struct task_struct *kgdb_contthread; enum kgdb_bptype { BP_BREAKPOINT = 0, BP_HARDWARE_BREAKPOINT, BP_WRITE_WATCHPOINT, BP_READ_WATCHPOINT, BP_ACCESS_WATCHPOINT, BP_POKE_BREAKPOINT, }; enum kgdb_bpstate { BP_UNDEFINED = 0, BP_REMOVED, BP_SET, BP_ACTIVE }; struct kgdb_bkpt { unsigned long bpt_addr; unsigned char saved_instr[BREAK_INSTR_SIZE]; enum kgdb_bptype type; enum kgdb_bpstate state; }; struct dbg_reg_def_t { char *name; int size; int offset; }; #ifndef DBG_MAX_REG_NUM #define DBG_MAX_REG_NUM 0 #else extern struct dbg_reg_def_t dbg_reg_def[]; extern char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs); extern int dbg_set_reg(int regno, void *mem, struct pt_regs *regs); #endif #ifndef KGDB_MAX_BREAKPOINTS # define KGDB_MAX_BREAKPOINTS 1000 #endif #define KGDB_HW_BREAKPOINT 1 /* * Functions each KGDB-supporting architecture must provide: */ /** * kgdb_arch_init - Perform any architecture specific initialization. * * This function will handle the initialization of any architecture * specific callbacks. */ extern int kgdb_arch_init(void); /** * kgdb_arch_exit - Perform any architecture specific uninitalization. * * This function will handle the uninitalization of any architecture * specific callbacks, for dynamic registration and unregistration. */ extern void kgdb_arch_exit(void); /** * pt_regs_to_gdb_regs - Convert ptrace regs to GDB regs * @gdb_regs: A pointer to hold the registers in the order GDB wants. * @regs: The &struct pt_regs of the current process. * * Convert the pt_regs in @regs into the format for registers that * GDB expects, stored in @gdb_regs. */ extern void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs); /** * sleeping_thread_to_gdb_regs - Convert ptrace regs to GDB regs * @gdb_regs: A pointer to hold the registers in the order GDB wants. * @p: The &struct task_struct of the desired process. * * Convert the register values of the sleeping process in @p to * the format that GDB expects. * This function is called when kgdb does not have access to the * &struct pt_regs and therefore it should fill the gdb registers * @gdb_regs with what has been saved in &struct thread_struct * thread field during switch_to. */ extern void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p); /** * gdb_regs_to_pt_regs - Convert GDB regs to ptrace regs. * @gdb_regs: A pointer to hold the registers we've received from GDB. * @regs: A pointer to a &struct pt_regs to hold these values in. * * Convert the GDB regs in @gdb_regs into the pt_regs, and store them * in @regs. */ extern void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs); /** * kgdb_arch_handle_exception - Handle architecture specific GDB packets. * @vector: The error vector of the exception that happened. * @signo: The signal number of the exception that happened. * @err_code: The error code of the exception that happened. * @remcom_in_buffer: The buffer of the packet we have read. * @remcom_out_buffer: The buffer of %BUFMAX bytes to write a packet into. * @regs: The &struct pt_regs of the current process. * * This function MUST handle the 'c' and 's' command packets, * as well packets to set / remove a hardware breakpoint, if used. * If there are additional packets which the hardware needs to handle, * they are handled here. The code should return -1 if it wants to * process more packets, and a %0 or %1 if it wants to exit from the * kgdb callback. */ extern int kgdb_arch_handle_exception(int vector, int signo, int err_code, char *remcom_in_buffer, char *remcom_out_buffer, struct pt_regs *regs); /** * kgdb_arch_handle_qxfer_pkt - Handle architecture specific GDB XML * packets. * @remcom_in_buffer: The buffer of the packet we have read. * @remcom_out_buffer: The buffer of %BUFMAX bytes to write a packet into. */ extern void kgdb_arch_handle_qxfer_pkt(char *remcom_in_buffer, char *remcom_out_buffer); /** * kgdb_call_nmi_hook - Call kgdb_nmicallback() on the current CPU * @ignored: This parameter is only here to match the prototype. * * If you're using the default implementation of kgdb_roundup_cpus() * this function will be called per CPU. If you don't implement * kgdb_call_nmi_hook() a default will be used. */ extern void kgdb_call_nmi_hook(void *ignored); /** * kgdb_roundup_cpus - Get other CPUs into a holding pattern * * On SMP systems, we need to get the attention of the other CPUs * and get them into a known state. This should do what is needed * to get the other CPUs to call kgdb_wait(). Note that on some arches, * the NMI approach is not used for rounding up all the CPUs. Normally * those architectures can just not implement this and get the default. * * On non-SMP systems, this is not called. */ extern void kgdb_roundup_cpus(void); /** * kgdb_arch_set_pc - Generic call back to the program counter * @regs: Current &struct pt_regs. * @pc: The new value for the program counter * * This function handles updating the program counter and requires an * architecture specific implementation. */ extern void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc); /* Optional functions. */ extern int kgdb_validate_break_address(unsigned long addr); extern int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt); extern int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt); /** * kgdb_arch_late - Perform any architecture specific initialization. * * This function will handle the late initialization of any * architecture specific callbacks. This is an optional function for * handling things like late initialization of hw breakpoints. The * default implementation does nothing. */ extern void kgdb_arch_late(void); /** * struct kgdb_arch - Describe architecture specific values. * @gdb_bpt_instr: The instruction to trigger a breakpoint. * @flags: Flags for the breakpoint, currently just %KGDB_HW_BREAKPOINT. * @set_breakpoint: Allow an architecture to specify how to set a software * breakpoint. * @remove_breakpoint: Allow an architecture to specify how to remove a * software breakpoint. * @set_hw_breakpoint: Allow an architecture to specify how to set a hardware * breakpoint. * @remove_hw_breakpoint: Allow an architecture to specify how to remove a * hardware breakpoint. * @disable_hw_break: Allow an architecture to specify how to disable * hardware breakpoints for a single cpu. * @remove_all_hw_break: Allow an architecture to specify how to remove all * hardware breakpoints. * @correct_hw_break: Allow an architecture to specify how to correct the * hardware debug registers. * @enable_nmi: Manage NMI-triggered entry to KGDB */ struct kgdb_arch { unsigned char gdb_bpt_instr[BREAK_INSTR_SIZE]; unsigned long flags; int (*set_breakpoint)(unsigned long, char *); int (*remove_breakpoint)(unsigned long, char *); int (*set_hw_breakpoint)(unsigned long, int, enum kgdb_bptype); int (*remove_hw_breakpoint)(unsigned long, int, enum kgdb_bptype); void (*disable_hw_break)(struct pt_regs *regs); void (*remove_all_hw_break)(void); void (*correct_hw_break)(void); void (*enable_nmi)(bool on); }; /** * struct kgdb_io - Describe the interface for an I/O driver to talk with KGDB. * @name: Name of the I/O driver. * @read_char: Pointer to a function that will return one char. * @write_char: Pointer to a function that will write one char. * @flush: Pointer to a function that will flush any pending writes. * @init: Pointer to a function that will initialize the device. * @deinit: Pointer to a function that will deinit the device. Implies that * this I/O driver is temporary and expects to be replaced. Called when * an I/O driver is replaced or explicitly unregistered. * @pre_exception: Pointer to a function that will do any prep work for * the I/O driver. * @post_exception: Pointer to a function that will do any cleanup work * for the I/O driver. * @cons: valid if the I/O device is a console; else NULL. */ struct kgdb_io { const char *name; int (*read_char) (void); void (*write_char) (u8); void (*flush) (void); int (*init) (void); void (*deinit) (void); void (*pre_exception) (void); void (*post_exception) (void); struct console *cons; }; extern const struct kgdb_arch arch_kgdb_ops; extern unsigned long kgdb_arch_pc(int exception, struct pt_regs *regs); #ifdef CONFIG_SERIAL_KGDB_NMI extern int kgdb_register_nmi_console(void); extern int kgdb_unregister_nmi_console(void); extern bool kgdb_nmi_poll_knock(void); #else static inline int kgdb_register_nmi_console(void) { return 0; } static inline int kgdb_unregister_nmi_console(void) { return 0; } static inline bool kgdb_nmi_poll_knock(void) { return true; } #endif extern int kgdb_register_io_module(struct kgdb_io *local_kgdb_io_ops); extern void kgdb_unregister_io_module(struct kgdb_io *local_kgdb_io_ops); extern struct kgdb_io *dbg_io_ops; extern int kgdb_hex2long(char **ptr, unsigned long *long_val); extern char *kgdb_mem2hex(char *mem, char *buf, int count); extern int kgdb_hex2mem(char *buf, char *mem, int count); extern int kgdb_isremovedbreak(unsigned long addr); extern int kgdb_has_hit_break(unsigned long addr); extern int kgdb_handle_exception(int ex_vector, int signo, int err_code, struct pt_regs *regs); extern int kgdb_nmicallback(int cpu, void *regs); extern int kgdb_nmicallin(int cpu, int trapnr, void *regs, int err_code, atomic_t *snd_rdy); extern void gdbstub_exit(int status); /* * kgdb and kprobes both use the same (kprobe) blocklist (which makes sense * given they are both typically hooked up to the same trap meaning on most * architectures one cannot be used to debug the other) * * However on architectures where kprobes is not (yet) implemented we permit * breakpoints everywhere rather than blocking everything by default. */ static inline bool kgdb_within_blocklist(unsigned long addr) { #ifdef CONFIG_KGDB_HONOUR_BLOCKLIST return within_kprobe_blacklist(addr); #else return false; #endif } extern int kgdb_single_step; extern atomic_t kgdb_active; #define in_dbg_master() \ (irqs_disabled() && (smp_processor_id() == atomic_read(&kgdb_active))) extern bool dbg_is_early; extern void __init dbg_late_init(void); extern void kgdb_panic(const char *msg); extern void kgdb_free_init_mem(void); #else /* ! CONFIG_KGDB */ #define in_dbg_master() (0) #define dbg_late_init() static inline void kgdb_panic(const char *msg) {} static inline void kgdb_free_init_mem(void) { } #endif /* ! CONFIG_KGDB */ #endif /* _KGDB_H_ */ PK ! �F��, , irqhandler.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IRQHANDLER_H #define _LINUX_IRQHANDLER_H /* * Interrupt flow handler typedefs are defined here to avoid circular * include dependencies. */ struct irq_desc; struct irq_data; typedef void (*irq_flow_handler_t)(struct irq_desc *desc); #endif PK ! �)�_� � irqflags.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/irqflags.h * * IRQ flags tracing: follow the state of the hardirq and softirq flags and * provide callbacks for transitions between ON and OFF states. * * This file gets included from lowlevel asm headers too, to provide * wrapped versions of the local_irq_*() APIs, based on the * raw_local_irq_*() macros from the lowlevel headers. */ #ifndef _LINUX_TRACE_IRQFLAGS_H #define _LINUX_TRACE_IRQFLAGS_H #include <linux/typecheck.h> #include <linux/cleanup.h> #include <asm/irqflags.h> #include <asm/percpu.h> /* Currently lockdep_softirqs_on/off is used only by lockdep */ #ifdef CONFIG_PROVE_LOCKING extern void lockdep_softirqs_on(unsigned long ip); extern void lockdep_softirqs_off(unsigned long ip); extern void lockdep_hardirqs_on_prepare(void); extern void lockdep_hardirqs_on(unsigned long ip); extern void lockdep_hardirqs_off(unsigned long ip); #else static inline void lockdep_softirqs_on(unsigned long ip) { } static inline void lockdep_softirqs_off(unsigned long ip) { } static inline void lockdep_hardirqs_on_prepare(void) { } static inline void lockdep_hardirqs_on(unsigned long ip) { } static inline void lockdep_hardirqs_off(unsigned long ip) { } #endif #ifdef CONFIG_TRACE_IRQFLAGS /* Per-task IRQ trace events information. */ struct irqtrace_events { unsigned int irq_events; unsigned long hardirq_enable_ip; unsigned long hardirq_disable_ip; unsigned int hardirq_enable_event; unsigned int hardirq_disable_event; unsigned long softirq_disable_ip; unsigned long softirq_enable_ip; unsigned int softirq_disable_event; unsigned int softirq_enable_event; }; DECLARE_PER_CPU(int, hardirqs_enabled); DECLARE_PER_CPU(int, hardirq_context); extern void trace_hardirqs_on_prepare(void); extern void trace_hardirqs_off_finish(void); extern void trace_hardirqs_on(void); extern void trace_hardirqs_off(void); # define lockdep_hardirq_context() (raw_cpu_read(hardirq_context)) # define lockdep_softirq_context(p) ((p)->softirq_context) # define lockdep_hardirqs_enabled() (this_cpu_read(hardirqs_enabled)) # define lockdep_softirqs_enabled(p) ((p)->softirqs_enabled) # define lockdep_hardirq_enter() \ do { \ if (__this_cpu_inc_return(hardirq_context) == 1)\ current->hardirq_threaded = 0; \ } while (0) # define lockdep_hardirq_threaded() \ do { \ current->hardirq_threaded = 1; \ } while (0) # define lockdep_hardirq_exit() \ do { \ __this_cpu_dec(hardirq_context); \ } while (0) # define lockdep_softirq_enter() \ do { \ current->softirq_context++; \ } while (0) # define lockdep_softirq_exit() \ do { \ current->softirq_context--; \ } while (0) # define lockdep_hrtimer_enter(__hrtimer) \ ({ \ bool __expires_hardirq = true; \ \ if (!__hrtimer->is_hard) { \ current->irq_config = 1; \ __expires_hardirq = false; \ } \ __expires_hardirq; \ }) # define lockdep_hrtimer_exit(__expires_hardirq) \ do { \ if (!__expires_hardirq) \ current->irq_config = 0; \ } while (0) # define lockdep_posixtimer_enter() \ do { \ current->irq_config = 1; \ } while (0) # define lockdep_posixtimer_exit() \ do { \ current->irq_config = 0; \ } while (0) # define lockdep_irq_work_enter(_flags) \ do { \ if (!((_flags) & IRQ_WORK_HARD_IRQ)) \ current->irq_config = 1; \ } while (0) # define lockdep_irq_work_exit(_flags) \ do { \ if (!((_flags) & IRQ_WORK_HARD_IRQ)) \ current->irq_config = 0; \ } while (0) #else # define trace_hardirqs_on_prepare() do { } while (0) # define trace_hardirqs_off_finish() do { } while (0) # define trace_hardirqs_on() do { } while (0) # define trace_hardirqs_off() do { } while (0) # define lockdep_hardirq_context() 0 # define lockdep_softirq_context(p) 0 # define lockdep_hardirqs_enabled() 0 # define lockdep_softirqs_enabled(p) 0 # define lockdep_hardirq_enter() do { } while (0) # define lockdep_hardirq_threaded() do { } while (0) # define lockdep_hardirq_exit() do { } while (0) # define lockdep_softirq_enter() do { } while (0) # define lockdep_softirq_exit() do { } while (0) # define lockdep_hrtimer_enter(__hrtimer) false # define lockdep_hrtimer_exit(__context) do { (void)(__context); } while (0) # define lockdep_posixtimer_enter() do { } while (0) # define lockdep_posixtimer_exit() do { } while (0) # define lockdep_irq_work_enter(__work) do { } while (0) # define lockdep_irq_work_exit(__work) do { } while (0) #endif #if defined(CONFIG_IRQSOFF_TRACER) || \ defined(CONFIG_PREEMPT_TRACER) extern void stop_critical_timings(void); extern void start_critical_timings(void); #else # define stop_critical_timings() do { } while (0) # define start_critical_timings() do { } while (0) #endif #ifdef CONFIG_DEBUG_IRQFLAGS extern void warn_bogus_irq_restore(void); #define raw_check_bogus_irq_restore() \ do { \ if (unlikely(!arch_irqs_disabled())) \ warn_bogus_irq_restore(); \ } while (0) #else #define raw_check_bogus_irq_restore() do { } while (0) #endif /* * Wrap the arch provided IRQ routines to provide appropriate checks. */ #define raw_local_irq_disable() arch_local_irq_disable() #define raw_local_irq_enable() arch_local_irq_enable() #define raw_local_irq_save(flags) \ do { \ typecheck(unsigned long, flags); \ flags = arch_local_irq_save(); \ } while (0) #define raw_local_irq_restore(flags) \ do { \ typecheck(unsigned long, flags); \ raw_check_bogus_irq_restore(); \ arch_local_irq_restore(flags); \ } while (0) #define raw_local_save_flags(flags) \ do { \ typecheck(unsigned long, flags); \ flags = arch_local_save_flags(); \ } while (0) #define raw_irqs_disabled_flags(flags) \ ({ \ typecheck(unsigned long, flags); \ arch_irqs_disabled_flags(flags); \ }) #define raw_irqs_disabled() (arch_irqs_disabled()) #define raw_safe_halt() arch_safe_halt() /* * The local_irq_*() APIs are equal to the raw_local_irq*() * if !TRACE_IRQFLAGS. */ #ifdef CONFIG_TRACE_IRQFLAGS #define local_irq_enable() \ do { \ trace_hardirqs_on(); \ raw_local_irq_enable(); \ } while (0) #define local_irq_disable() \ do { \ bool was_disabled = raw_irqs_disabled();\ raw_local_irq_disable(); \ if (!was_disabled) \ trace_hardirqs_off(); \ } while (0) #define local_irq_save(flags) \ do { \ raw_local_irq_save(flags); \ if (!raw_irqs_disabled_flags(flags)) \ trace_hardirqs_off(); \ } while (0) #define local_irq_restore(flags) \ do { \ if (!raw_irqs_disabled_flags(flags)) \ trace_hardirqs_on(); \ raw_local_irq_restore(flags); \ } while (0) #define safe_halt() \ do { \ trace_hardirqs_on(); \ raw_safe_halt(); \ } while (0) #else /* !CONFIG_TRACE_IRQFLAGS */ #define local_irq_enable() do { raw_local_irq_enable(); } while (0) #define local_irq_disable() do { raw_local_irq_disable(); } while (0) #define local_irq_save(flags) do { raw_local_irq_save(flags); } while (0) #define local_irq_restore(flags) do { raw_local_irq_restore(flags); } while (0) #define safe_halt() do { raw_safe_halt(); } while (0) #endif /* CONFIG_TRACE_IRQFLAGS */ #define local_save_flags(flags) raw_local_save_flags(flags) /* * Some architectures don't define arch_irqs_disabled(), so even if either * definition would be fine we need to use different ones for the time being * to avoid build issues. */ #ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT #define irqs_disabled() \ ({ \ unsigned long _flags; \ raw_local_save_flags(_flags); \ raw_irqs_disabled_flags(_flags); \ }) #else /* !CONFIG_TRACE_IRQFLAGS_SUPPORT */ #define irqs_disabled() raw_irqs_disabled() #endif /* CONFIG_TRACE_IRQFLAGS_SUPPORT */ #define irqs_disabled_flags(flags) raw_irqs_disabled_flags(flags) DEFINE_LOCK_GUARD_0(irq, local_irq_disable(), local_irq_enable()) DEFINE_LOCK_GUARD_0(irqsave, local_irq_save(_T->flags), local_irq_restore(_T->flags), unsigned long flags) #endif PK ! �Z� � tracefs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * tracefs.h - a pseudo file system for activating tracing * * Based on debugfs by: 2004 Greg Kroah-Hartman <greg@kroah.com> * * Copyright (C) 2014 Red Hat Inc, author: Steven Rostedt <srostedt@redhat.com> * * tracefs is the file system that is used by the tracing infrastructure. */ #ifndef _TRACEFS_H_ #define _TRACEFS_H_ #include <linux/fs.h> #include <linux/seq_file.h> #include <linux/types.h> struct file_operations; #ifdef CONFIG_TRACING struct dentry *tracefs_create_file(const char *name, umode_t mode, struct dentry *parent, void *data, const struct file_operations *fops); struct dentry *tracefs_create_dir(const char *name, struct dentry *parent); void tracefs_remove(struct dentry *dentry); struct dentry *tracefs_create_instance_dir(const char *name, struct dentry *parent, int (*mkdir)(const char *name), int (*rmdir)(const char *name)); bool tracefs_initialized(void); #endif /* CONFIG_TRACING */ #endif PK ! �·��@ �@ hrtimer.hnu �[��� // SPDX-License-Identifier: GPL-2.0 /* * hrtimers - High-resolution kernel timers * * Copyright(C) 2005, Thomas Gleixner <tglx@linutronix.de> * Copyright(C) 2005, Red Hat, Inc., Ingo Molnar * * data type definitions, declarations, prototypes * * Started by: Thomas Gleixner and Ingo Molnar */ #ifndef _LINUX_HRTIMER_H #define _LINUX_HRTIMER_H #include <linux/hrtimer_defs.h> #include <linux/rbtree.h> #include <linux/init.h> #include <linux/list.h> #include <linux/percpu.h> #include <linux/seqlock.h> #include <linux/timer.h> #include <linux/timerqueue.h> struct hrtimer_clock_base; struct hrtimer_cpu_base; /* * Mode arguments of xxx_hrtimer functions: * * HRTIMER_MODE_ABS - Time value is absolute * HRTIMER_MODE_REL - Time value is relative to now * HRTIMER_MODE_PINNED - Timer is bound to CPU (is only considered * when starting the timer) * HRTIMER_MODE_SOFT - Timer callback function will be executed in * soft irq context * HRTIMER_MODE_HARD - Timer callback function will be executed in * hard irq context even on PREEMPT_RT. */ enum hrtimer_mode { HRTIMER_MODE_ABS = 0x00, HRTIMER_MODE_REL = 0x01, HRTIMER_MODE_PINNED = 0x02, HRTIMER_MODE_SOFT = 0x04, HRTIMER_MODE_HARD = 0x08, HRTIMER_MODE_ABS_PINNED = HRTIMER_MODE_ABS | HRTIMER_MODE_PINNED, HRTIMER_MODE_REL_PINNED = HRTIMER_MODE_REL | HRTIMER_MODE_PINNED, HRTIMER_MODE_ABS_SOFT = HRTIMER_MODE_ABS | HRTIMER_MODE_SOFT, HRTIMER_MODE_REL_SOFT = HRTIMER_MODE_REL | HRTIMER_MODE_SOFT, HRTIMER_MODE_ABS_PINNED_SOFT = HRTIMER_MODE_ABS_PINNED | HRTIMER_MODE_SOFT, HRTIMER_MODE_REL_PINNED_SOFT = HRTIMER_MODE_REL_PINNED | HRTIMER_MODE_SOFT, HRTIMER_MODE_ABS_HARD = HRTIMER_MODE_ABS | HRTIMER_MODE_HARD, HRTIMER_MODE_REL_HARD = HRTIMER_MODE_REL | HRTIMER_MODE_HARD, HRTIMER_MODE_ABS_PINNED_HARD = HRTIMER_MODE_ABS_PINNED | HRTIMER_MODE_HARD, HRTIMER_MODE_REL_PINNED_HARD = HRTIMER_MODE_REL_PINNED | HRTIMER_MODE_HARD, }; /* * Return values for the callback function */ enum hrtimer_restart { HRTIMER_NORESTART, /* Timer is not restarted */ HRTIMER_RESTART, /* Timer must be restarted */ }; /* * Values to track state of the timer * * Possible states: * * 0x00 inactive * 0x01 enqueued into rbtree * * The callback state is not part of the timer->state because clearing it would * mean touching the timer after the callback, this makes it impossible to free * the timer from the callback function. * * Therefore we track the callback state in: * * timer->base->cpu_base->running == timer * * On SMP it is possible to have a "callback function running and enqueued" * status. It happens for example when a posix timer expired and the callback * queued a signal. Between dropping the lock which protects the posix timer * and reacquiring the base lock of the hrtimer, another CPU can deliver the * signal and rearm the timer. * * All state transitions are protected by cpu_base->lock. */ #define HRTIMER_STATE_INACTIVE 0x00 #define HRTIMER_STATE_ENQUEUED 0x01 /** * struct hrtimer - the basic hrtimer structure * @node: timerqueue node, which also manages node.expires, * the absolute expiry time in the hrtimers internal * representation. The time is related to the clock on * which the timer is based. Is setup by adding * slack to the _softexpires value. For non range timers * identical to _softexpires. * @_softexpires: the absolute earliest expiry time of the hrtimer. * The time which was given as expiry time when the timer * was armed. * @function: timer expiry callback function * @base: pointer to the timer base (per cpu and per clock) * @state: state information (See bit values above) * @is_rel: Set if the timer was armed relative * @is_soft: Set if hrtimer will be expired in soft interrupt context. * @is_hard: Set if hrtimer will be expired in hard interrupt context * even on RT. * * The hrtimer structure must be initialized by hrtimer_init() */ struct hrtimer { struct timerqueue_node node; ktime_t _softexpires; enum hrtimer_restart (*function)(struct hrtimer *); struct hrtimer_clock_base *base; u8 state; u8 is_rel; u8 is_soft; u8 is_hard; }; /** * struct hrtimer_sleeper - simple sleeper structure * @timer: embedded timer structure * @task: task to wake up * * task is set to NULL, when the timer expires. */ struct hrtimer_sleeper { struct hrtimer timer; struct task_struct *task; }; #ifdef CONFIG_64BIT # define __hrtimer_clock_base_align ____cacheline_aligned #else # define __hrtimer_clock_base_align #endif /** * struct hrtimer_clock_base - the timer base for a specific clock * @cpu_base: per cpu clock base * @index: clock type index for per_cpu support when moving a * timer to a base on another cpu. * @clockid: clock id for per_cpu support * @seq: seqcount around __run_hrtimer * @running: pointer to the currently running hrtimer * @active: red black tree root node for the active timers * @get_time: function to retrieve the current time of the clock * @offset: offset of this clock to the monotonic base */ struct hrtimer_clock_base { struct hrtimer_cpu_base *cpu_base; unsigned int index; clockid_t clockid; seqcount_raw_spinlock_t seq; struct hrtimer *running; struct timerqueue_head active; ktime_t (*get_time)(void); ktime_t offset; } __hrtimer_clock_base_align; enum hrtimer_base_type { HRTIMER_BASE_MONOTONIC, HRTIMER_BASE_REALTIME, HRTIMER_BASE_BOOTTIME, HRTIMER_BASE_TAI, HRTIMER_BASE_MONOTONIC_SOFT, HRTIMER_BASE_REALTIME_SOFT, HRTIMER_BASE_BOOTTIME_SOFT, HRTIMER_BASE_TAI_SOFT, HRTIMER_MAX_CLOCK_BASES, }; /** * struct hrtimer_cpu_base - the per cpu clock bases * @lock: lock protecting the base and associated clock bases * and timers * @cpu: cpu number * @active_bases: Bitfield to mark bases with active timers * @clock_was_set_seq: Sequence counter of clock was set events * @hres_active: State of high resolution mode * @in_hrtirq: hrtimer_interrupt() is currently executing * @hang_detected: The last hrtimer interrupt detected a hang * @softirq_activated: displays, if the softirq is raised - update of softirq * related settings is not required then. * @nr_events: Total number of hrtimer interrupt events * @nr_retries: Total number of hrtimer interrupt retries * @nr_hangs: Total number of hrtimer interrupt hangs * @max_hang_time: Maximum time spent in hrtimer_interrupt * @softirq_expiry_lock: Lock which is taken while softirq based hrtimer are * expired * @online: CPU is online from an hrtimers point of view * @timer_waiters: A hrtimer_cancel() invocation waits for the timer * callback to finish. * @expires_next: absolute time of the next event, is required for remote * hrtimer enqueue; it is the total first expiry time (hard * and soft hrtimer are taken into account) * @next_timer: Pointer to the first expiring timer * @softirq_expires_next: Time to check, if soft queues needs also to be expired * @softirq_next_timer: Pointer to the first expiring softirq based timer * @clock_base: array of clock bases for this cpu * * Note: next_timer is just an optimization for __remove_hrtimer(). * Do not dereference the pointer because it is not reliable on * cross cpu removals. */ struct hrtimer_cpu_base { raw_spinlock_t lock; unsigned int cpu; unsigned int active_bases; unsigned int clock_was_set_seq; unsigned int hres_active : 1, in_hrtirq : 1, hang_detected : 1, softirq_activated : 1, online : 1; #ifdef CONFIG_HIGH_RES_TIMERS unsigned int nr_events; unsigned short nr_retries; unsigned short nr_hangs; unsigned int max_hang_time; #endif #ifdef CONFIG_PREEMPT_RT spinlock_t softirq_expiry_lock; atomic_t timer_waiters; #endif ktime_t expires_next; struct hrtimer *next_timer; ktime_t softirq_expires_next; struct hrtimer *softirq_next_timer; struct hrtimer_clock_base clock_base[HRTIMER_MAX_CLOCK_BASES]; } ____cacheline_aligned; static inline void hrtimer_set_expires(struct hrtimer *timer, ktime_t time) { timer->node.expires = time; timer->_softexpires = time; } static inline void hrtimer_set_expires_range(struct hrtimer *timer, ktime_t time, ktime_t delta) { timer->_softexpires = time; timer->node.expires = ktime_add_safe(time, delta); } static inline void hrtimer_set_expires_range_ns(struct hrtimer *timer, ktime_t time, u64 delta) { timer->_softexpires = time; timer->node.expires = ktime_add_safe(time, ns_to_ktime(delta)); } static inline void hrtimer_set_expires_tv64(struct hrtimer *timer, s64 tv64) { timer->node.expires = tv64; timer->_softexpires = tv64; } static inline void hrtimer_add_expires(struct hrtimer *timer, ktime_t time) { timer->node.expires = ktime_add_safe(timer->node.expires, time); timer->_softexpires = ktime_add_safe(timer->_softexpires, time); } static inline void hrtimer_add_expires_ns(struct hrtimer *timer, u64 ns) { timer->node.expires = ktime_add_ns(timer->node.expires, ns); timer->_softexpires = ktime_add_ns(timer->_softexpires, ns); } static inline ktime_t hrtimer_get_expires(const struct hrtimer *timer) { return timer->node.expires; } static inline ktime_t hrtimer_get_softexpires(const struct hrtimer *timer) { return timer->_softexpires; } static inline s64 hrtimer_get_expires_tv64(const struct hrtimer *timer) { return timer->node.expires; } static inline s64 hrtimer_get_softexpires_tv64(const struct hrtimer *timer) { return timer->_softexpires; } static inline s64 hrtimer_get_expires_ns(const struct hrtimer *timer) { return ktime_to_ns(timer->node.expires); } static inline ktime_t hrtimer_expires_remaining(const struct hrtimer *timer) { return ktime_sub(timer->node.expires, timer->base->get_time()); } static inline ktime_t hrtimer_cb_get_time(struct hrtimer *timer) { return timer->base->get_time(); } static inline int hrtimer_is_hres_active(struct hrtimer *timer) { return IS_ENABLED(CONFIG_HIGH_RES_TIMERS) ? timer->base->cpu_base->hres_active : 0; } #ifdef CONFIG_HIGH_RES_TIMERS struct clock_event_device; extern void hrtimer_interrupt(struct clock_event_device *dev); extern unsigned int hrtimer_resolution; #else #define hrtimer_resolution (unsigned int)LOW_RES_NSEC #endif static inline ktime_t __hrtimer_expires_remaining_adjusted(const struct hrtimer *timer, ktime_t now) { ktime_t rem = ktime_sub(timer->node.expires, now); /* * Adjust relative timers for the extra we added in * hrtimer_start_range_ns() to prevent short timeouts. */ if (IS_ENABLED(CONFIG_TIME_LOW_RES) && timer->is_rel) rem -= hrtimer_resolution; return rem; } static inline ktime_t hrtimer_expires_remaining_adjusted(const struct hrtimer *timer) { return __hrtimer_expires_remaining_adjusted(timer, timer->base->get_time()); } #ifdef CONFIG_TIMERFD extern void timerfd_clock_was_set(void); extern void timerfd_resume(void); #else static inline void timerfd_clock_was_set(void) { } static inline void timerfd_resume(void) { } #endif DECLARE_PER_CPU(struct tick_device, tick_cpu_device); #ifdef CONFIG_PREEMPT_RT void hrtimer_cancel_wait_running(const struct hrtimer *timer); #else static inline void hrtimer_cancel_wait_running(struct hrtimer *timer) { cpu_relax(); } #endif /* Exported timer functions: */ /* Initialize timers: */ extern void hrtimer_init(struct hrtimer *timer, clockid_t which_clock, enum hrtimer_mode mode); extern void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, clockid_t clock_id, enum hrtimer_mode mode); #ifdef CONFIG_DEBUG_OBJECTS_TIMERS extern void hrtimer_init_on_stack(struct hrtimer *timer, clockid_t which_clock, enum hrtimer_mode mode); extern void hrtimer_init_sleeper_on_stack(struct hrtimer_sleeper *sl, clockid_t clock_id, enum hrtimer_mode mode); extern void destroy_hrtimer_on_stack(struct hrtimer *timer); #else static inline void hrtimer_init_on_stack(struct hrtimer *timer, clockid_t which_clock, enum hrtimer_mode mode) { hrtimer_init(timer, which_clock, mode); } static inline void hrtimer_init_sleeper_on_stack(struct hrtimer_sleeper *sl, clockid_t clock_id, enum hrtimer_mode mode) { hrtimer_init_sleeper(sl, clock_id, mode); } static inline void destroy_hrtimer_on_stack(struct hrtimer *timer) { } #endif /* Basic timer operations: */ extern void hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, u64 range_ns, const enum hrtimer_mode mode); /** * hrtimer_start - (re)start an hrtimer * @timer: the timer to be added * @tim: expiry time * @mode: timer mode: absolute (HRTIMER_MODE_ABS) or * relative (HRTIMER_MODE_REL), and pinned (HRTIMER_MODE_PINNED); * softirq based mode is considered for debug purpose only! */ static inline void hrtimer_start(struct hrtimer *timer, ktime_t tim, const enum hrtimer_mode mode) { hrtimer_start_range_ns(timer, tim, 0, mode); } extern int hrtimer_cancel(struct hrtimer *timer); extern int hrtimer_try_to_cancel(struct hrtimer *timer); static inline void hrtimer_start_expires(struct hrtimer *timer, enum hrtimer_mode mode) { u64 delta; ktime_t soft, hard; soft = hrtimer_get_softexpires(timer); hard = hrtimer_get_expires(timer); delta = ktime_to_ns(ktime_sub(hard, soft)); hrtimer_start_range_ns(timer, soft, delta, mode); } void hrtimer_sleeper_start_expires(struct hrtimer_sleeper *sl, enum hrtimer_mode mode); static inline void hrtimer_restart(struct hrtimer *timer) { hrtimer_start_expires(timer, HRTIMER_MODE_ABS); } /* Query timers: */ extern ktime_t __hrtimer_get_remaining(const struct hrtimer *timer, bool adjust); /** * hrtimer_get_remaining - get remaining time for the timer * @timer: the timer to read */ static inline ktime_t hrtimer_get_remaining(const struct hrtimer *timer) { return __hrtimer_get_remaining(timer, false); } extern u64 hrtimer_get_next_event(void); extern u64 hrtimer_next_event_without(const struct hrtimer *exclude); extern bool hrtimer_active(const struct hrtimer *timer); /** * hrtimer_is_queued - check, whether the timer is on one of the queues * @timer: Timer to check * * Returns: True if the timer is queued, false otherwise * * The function can be used lockless, but it gives only a current snapshot. */ static inline bool hrtimer_is_queued(struct hrtimer *timer) { /* The READ_ONCE pairs with the update functions of timer->state */ return !!(READ_ONCE(timer->state) & HRTIMER_STATE_ENQUEUED); } /* * Helper function to check, whether the timer is running the callback * function */ static inline int hrtimer_callback_running(struct hrtimer *timer) { return timer->base->running == timer; } /* Forward a hrtimer so it expires after now: */ extern u64 hrtimer_forward(struct hrtimer *timer, ktime_t now, ktime_t interval); /** * hrtimer_forward_now - forward the timer expiry so it expires after now * @timer: hrtimer to forward * @interval: the interval to forward * * Forward the timer expiry so it will expire after the current time * of the hrtimer clock base. Returns the number of overruns. * * Can be safely called from the callback function of @timer. If * called from other contexts @timer must neither be enqueued nor * running the callback and the caller needs to take care of * serialization. * * Note: This only updates the timer expiry value and does not requeue * the timer. */ static inline u64 hrtimer_forward_now(struct hrtimer *timer, ktime_t interval) { return hrtimer_forward(timer, timer->base->get_time(), interval); } /* Precise sleep: */ extern int nanosleep_copyout(struct restart_block *, struct timespec64 *); extern long hrtimer_nanosleep(ktime_t rqtp, const enum hrtimer_mode mode, const clockid_t clockid); extern int schedule_hrtimeout_range(ktime_t *expires, u64 delta, const enum hrtimer_mode mode); extern int schedule_hrtimeout_range_clock(ktime_t *expires, u64 delta, const enum hrtimer_mode mode, clockid_t clock_id); extern int schedule_hrtimeout(ktime_t *expires, const enum hrtimer_mode mode); /* Soft interrupt function to run the hrtimer queues: */ extern void hrtimer_run_queues(void); /* Bootup initialization: */ extern void __init hrtimers_init(void); /* Show pending timers: */ extern void sysrq_timer_list_show(void); int hrtimers_prepare_cpu(unsigned int cpu); int hrtimers_cpu_starting(unsigned int cpu); #ifdef CONFIG_HOTPLUG_CPU int hrtimers_cpu_dying(unsigned int cpu); #else #define hrtimers_cpu_dying NULL #endif #endif PK ! APvT�9 �9 buffer_head.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * include/linux/buffer_head.h * * Everything to do with buffer_heads. */ #ifndef _LINUX_BUFFER_HEAD_H #define _LINUX_BUFFER_HEAD_H #include <linux/types.h> #include <linux/fs.h> #include <linux/linkage.h> #include <linux/pagemap.h> #include <linux/wait.h> #include <linux/atomic.h> #ifdef CONFIG_BLOCK enum bh_state_bits { BH_Uptodate, /* Contains valid data */ BH_Dirty, /* Is dirty */ BH_Lock, /* Is locked */ BH_Req, /* Has been submitted for I/O */ BH_Mapped, /* Has a disk mapping */ BH_New, /* Disk mapping was newly created by get_block */ BH_Async_Read, /* Is under end_buffer_async_read I/O */ BH_Async_Write, /* Is under end_buffer_async_write I/O */ BH_Delay, /* Buffer is not yet allocated on disk */ BH_Boundary, /* Block is followed by a discontiguity */ BH_Write_EIO, /* I/O error on write */ BH_Unwritten, /* Buffer is allocated on disk but not written */ BH_Quiet, /* Buffer Error Prinks to be quiet */ BH_Meta, /* Buffer contains metadata */ BH_Prio, /* Buffer should be submitted with REQ_PRIO */ BH_Defer_Completion, /* Defer AIO completion to workqueue */ BH_PrivateStart,/* not a state bit, but the first bit available * for private allocation by other entities */ }; #define MAX_BUF_PER_PAGE (PAGE_SIZE / 512) struct page; struct buffer_head; struct address_space; typedef void (bh_end_io_t)(struct buffer_head *bh, int uptodate); /* * Historically, a buffer_head was used to map a single block * within a page, and of course as the unit of I/O through the * filesystem and block layers. Nowadays the basic I/O unit * is the bio, and buffer_heads are used for extracting block * mappings (via a get_block_t call), for tracking state within * a page (via a page_mapping) and for wrapping bio submission * for backward compatibility reasons (e.g. submit_bh). */ struct buffer_head { unsigned long b_state; /* buffer state bitmap (see above) */ struct buffer_head *b_this_page;/* circular list of page's buffers */ struct page *b_page; /* the page this bh is mapped to */ sector_t b_blocknr; /* start block number */ size_t b_size; /* size of mapping */ char *b_data; /* pointer to data within the page */ struct block_device *b_bdev; bh_end_io_t *b_end_io; /* I/O completion */ void *b_private; /* reserved for b_end_io */ struct list_head b_assoc_buffers; /* associated with another mapping */ struct address_space *b_assoc_map; /* mapping this buffer is associated with */ atomic_t b_count; /* users using this buffer_head */ spinlock_t b_uptodate_lock; /* Used by the first bh in a page, to * serialise IO completion of other * buffers in the page */ }; /* * macro tricks to expand the set_buffer_foo(), clear_buffer_foo() * and buffer_foo() functions. * To avoid reset buffer flags that are already set, because that causes * a costly cache line transition, check the flag first. */ #define BUFFER_FNS(bit, name) \ static __always_inline void set_buffer_##name(struct buffer_head *bh) \ { \ if (!test_bit(BH_##bit, &(bh)->b_state)) \ set_bit(BH_##bit, &(bh)->b_state); \ } \ static __always_inline void clear_buffer_##name(struct buffer_head *bh) \ { \ clear_bit(BH_##bit, &(bh)->b_state); \ } \ static __always_inline int buffer_##name(const struct buffer_head *bh) \ { \ return test_bit(BH_##bit, &(bh)->b_state); \ } /* * test_set_buffer_foo() and test_clear_buffer_foo() */ #define TAS_BUFFER_FNS(bit, name) \ static __always_inline int test_set_buffer_##name(struct buffer_head *bh) \ { \ return test_and_set_bit(BH_##bit, &(bh)->b_state); \ } \ static __always_inline int test_clear_buffer_##name(struct buffer_head *bh) \ { \ return test_and_clear_bit(BH_##bit, &(bh)->b_state); \ } \ /* * Emit the buffer bitops functions. Note that there are also functions * of the form "mark_buffer_foo()". These are higher-level functions which * do something in addition to setting a b_state bit. */ BUFFER_FNS(Dirty, dirty) TAS_BUFFER_FNS(Dirty, dirty) BUFFER_FNS(Lock, locked) BUFFER_FNS(Req, req) TAS_BUFFER_FNS(Req, req) BUFFER_FNS(Mapped, mapped) BUFFER_FNS(New, new) BUFFER_FNS(Async_Read, async_read) BUFFER_FNS(Async_Write, async_write) BUFFER_FNS(Delay, delay) BUFFER_FNS(Boundary, boundary) BUFFER_FNS(Write_EIO, write_io_error) BUFFER_FNS(Unwritten, unwritten) BUFFER_FNS(Meta, meta) BUFFER_FNS(Prio, prio) BUFFER_FNS(Defer_Completion, defer_completion) static __always_inline void set_buffer_uptodate(struct buffer_head *bh) { /* * If somebody else already set this uptodate, they will * have done the memory barrier, and a reader will thus * see *some* valid buffer state. * * Any other serialization (with IO errors or whatever that * might clear the bit) has to come from other state (eg BH_Lock). */ if (test_bit(BH_Uptodate, &bh->b_state)) return; /* * make it consistent with folio_mark_uptodate * pairs with smp_load_acquire in buffer_uptodate */ smp_mb__before_atomic(); set_bit(BH_Uptodate, &bh->b_state); } static __always_inline void clear_buffer_uptodate(struct buffer_head *bh) { clear_bit(BH_Uptodate, &bh->b_state); } static __always_inline int buffer_uptodate(const struct buffer_head *bh) { /* * make it consistent with folio_test_uptodate * pairs with smp_mb__before_atomic in set_buffer_uptodate */ return (smp_load_acquire(&bh->b_state) & (1UL << BH_Uptodate)) != 0; } #define bh_offset(bh) ((unsigned long)(bh)->b_data & ~PAGE_MASK) /* If we *know* page->private refers to buffer_heads */ #define page_buffers(page) \ ({ \ BUG_ON(!PagePrivate(page)); \ ((struct buffer_head *)page_private(page)); \ }) #define page_has_buffers(page) PagePrivate(page) void buffer_check_dirty_writeback(struct page *page, bool *dirty, bool *writeback); /* * Declarations */ void mark_buffer_dirty(struct buffer_head *bh); void mark_buffer_write_io_error(struct buffer_head *bh); void touch_buffer(struct buffer_head *bh); void set_bh_page(struct buffer_head *bh, struct page *page, unsigned long offset); int try_to_free_buffers(struct page *); struct buffer_head *alloc_page_buffers(struct page *page, unsigned long size, bool retry); void create_empty_buffers(struct page *, unsigned long, unsigned long b_state); void end_buffer_read_sync(struct buffer_head *bh, int uptodate); void end_buffer_write_sync(struct buffer_head *bh, int uptodate); void end_buffer_async_write(struct buffer_head *bh, int uptodate); /* Things to do with buffers at mapping->private_list */ void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode); int inode_has_buffers(struct inode *); void invalidate_inode_buffers(struct inode *); int remove_inode_buffers(struct inode *inode); int sync_mapping_buffers(struct address_space *mapping); void clean_bdev_aliases(struct block_device *bdev, sector_t block, sector_t len); static inline void clean_bdev_bh_alias(struct buffer_head *bh) { clean_bdev_aliases(bh->b_bdev, bh->b_blocknr, 1); } void mark_buffer_async_write(struct buffer_head *bh); void __wait_on_buffer(struct buffer_head *); wait_queue_head_t *bh_waitq_head(struct buffer_head *bh); struct buffer_head *__find_get_block(struct block_device *bdev, sector_t block, unsigned size); struct buffer_head *__getblk_gfp(struct block_device *bdev, sector_t block, unsigned size, gfp_t gfp); void __brelse(struct buffer_head *); void __bforget(struct buffer_head *); void __breadahead(struct block_device *, sector_t block, unsigned int size); void __breadahead_gfp(struct block_device *, sector_t block, unsigned int size, gfp_t gfp); struct buffer_head *__bread_gfp(struct block_device *, sector_t block, unsigned size, gfp_t gfp); void invalidate_bh_lrus(void); void invalidate_bh_lrus_cpu(void); bool has_bh_in_lru(int cpu, void *dummy); struct buffer_head *alloc_buffer_head(gfp_t gfp_flags); void free_buffer_head(struct buffer_head * bh); void unlock_buffer(struct buffer_head *bh); void __lock_buffer(struct buffer_head *bh); void ll_rw_block(int, int, int, struct buffer_head * bh[]); int sync_dirty_buffer(struct buffer_head *bh); int __sync_dirty_buffer(struct buffer_head *bh, int op_flags); void write_dirty_buffer(struct buffer_head *bh, int op_flags); int submit_bh(int, int, struct buffer_head *); void write_boundary_block(struct block_device *bdev, sector_t bblock, unsigned blocksize); int bh_uptodate_or_lock(struct buffer_head *bh); int bh_submit_read(struct buffer_head *bh); extern int buffer_heads_over_limit; /* * Generic address_space_operations implementations for buffer_head-backed * address_spaces. */ void block_invalidatepage(struct page *page, unsigned int offset, unsigned int length); int block_write_full_page(struct page *page, get_block_t *get_block, struct writeback_control *wbc); int __block_write_full_page(struct inode *inode, struct page *page, get_block_t *get_block, struct writeback_control *wbc, bh_end_io_t *handler); int block_read_full_page(struct page*, get_block_t*); int block_is_partially_uptodate(struct page *page, unsigned long from, unsigned long count); int block_write_begin(struct address_space *mapping, loff_t pos, unsigned len, unsigned flags, struct page **pagep, get_block_t *get_block); int __block_write_begin(struct page *page, loff_t pos, unsigned len, get_block_t *get_block); int block_write_end(struct file *, struct address_space *, loff_t, unsigned, unsigned, struct page *, void *); int generic_write_end(struct file *, struct address_space *, loff_t, unsigned, unsigned, struct page *, void *); void page_zero_new_buffers(struct page *page, unsigned from, unsigned to); void clean_page_buffers(struct page *page); int cont_write_begin(struct file *, struct address_space *, loff_t, unsigned, unsigned, struct page **, void **, get_block_t *, loff_t *); int generic_cont_expand_simple(struct inode *inode, loff_t size); int block_commit_write(struct page *page, unsigned from, unsigned to); int block_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf, get_block_t get_block); /* Convert errno to return value from ->page_mkwrite() call */ static inline vm_fault_t block_page_mkwrite_return(int err) { if (err == 0) return VM_FAULT_LOCKED; if (err == -EFAULT || err == -EAGAIN) return VM_FAULT_NOPAGE; if (err == -ENOMEM) return VM_FAULT_OOM; /* -ENOSPC, -EDQUOT, -EIO ... */ return VM_FAULT_SIGBUS; } sector_t generic_block_bmap(struct address_space *, sector_t, get_block_t *); int block_truncate_page(struct address_space *, loff_t, get_block_t *); int nobh_write_begin(struct address_space *, loff_t, unsigned, unsigned, struct page **, void **, get_block_t*); int nobh_write_end(struct file *, struct address_space *, loff_t, unsigned, unsigned, struct page *, void *); int nobh_truncate_page(struct address_space *, loff_t, get_block_t *); int nobh_writepage(struct page *page, get_block_t *get_block, struct writeback_control *wbc); void buffer_init(void); /* * inline definitions */ static inline void get_bh(struct buffer_head *bh) { atomic_inc(&bh->b_count); } static inline void put_bh(struct buffer_head *bh) { smp_mb__before_atomic(); atomic_dec(&bh->b_count); } static inline void brelse(struct buffer_head *bh) { if (bh) __brelse(bh); } static inline void bforget(struct buffer_head *bh) { if (bh) __bforget(bh); } static inline struct buffer_head * sb_bread(struct super_block *sb, sector_t block) { return __bread_gfp(sb->s_bdev, block, sb->s_blocksize, __GFP_MOVABLE); } static inline struct buffer_head * sb_bread_unmovable(struct super_block *sb, sector_t block) { return __bread_gfp(sb->s_bdev, block, sb->s_blocksize, 0); } static inline void sb_breadahead(struct super_block *sb, sector_t block) { __breadahead(sb->s_bdev, block, sb->s_blocksize); } static inline void sb_breadahead_unmovable(struct super_block *sb, sector_t block) { __breadahead_gfp(sb->s_bdev, block, sb->s_blocksize, 0); } static inline struct buffer_head * sb_getblk(struct super_block *sb, sector_t block) { return __getblk_gfp(sb->s_bdev, block, sb->s_blocksize, __GFP_MOVABLE); } static inline struct buffer_head * sb_getblk_gfp(struct super_block *sb, sector_t block, gfp_t gfp) { return __getblk_gfp(sb->s_bdev, block, sb->s_blocksize, gfp); } static inline struct buffer_head * sb_find_get_block(struct super_block *sb, sector_t block) { return __find_get_block(sb->s_bdev, block, sb->s_blocksize); } static inline void map_bh(struct buffer_head *bh, struct super_block *sb, sector_t block) { set_buffer_mapped(bh); bh->b_bdev = sb->s_bdev; bh->b_blocknr = block; bh->b_size = sb->s_blocksize; } static inline void wait_on_buffer(struct buffer_head *bh) { might_sleep(); if (buffer_locked(bh)) __wait_on_buffer(bh); } static inline int trylock_buffer(struct buffer_head *bh) { return likely(!test_and_set_bit_lock(BH_Lock, &bh->b_state)); } static inline void lock_buffer(struct buffer_head *bh) { might_sleep(); if (!trylock_buffer(bh)) __lock_buffer(bh); } static inline struct buffer_head *getblk_unmovable(struct block_device *bdev, sector_t block, unsigned size) { return __getblk_gfp(bdev, block, size, 0); } static inline struct buffer_head *__getblk(struct block_device *bdev, sector_t block, unsigned size) { return __getblk_gfp(bdev, block, size, __GFP_MOVABLE); } /** * __bread() - reads a specified block and returns the bh * @bdev: the block_device to read from * @block: number of block * @size: size (in bytes) to read * * Reads a specified block, and returns buffer head that contains it. * The page cache is allocated from movable area so that it can be migrated. * It returns NULL if the block was unreadable. */ static inline struct buffer_head * __bread(struct block_device *bdev, sector_t block, unsigned size) { return __bread_gfp(bdev, block, size, __GFP_MOVABLE); } extern int __set_page_dirty_buffers(struct page *page); #else /* CONFIG_BLOCK */ static inline void buffer_init(void) {} static inline int try_to_free_buffers(struct page *page) { return 1; } static inline int inode_has_buffers(struct inode *inode) { return 0; } static inline void invalidate_inode_buffers(struct inode *inode) {} static inline int remove_inode_buffers(struct inode *inode) { return 1; } static inline int sync_mapping_buffers(struct address_space *mapping) { return 0; } static inline void invalidate_bh_lrus_cpu(void) {} static inline bool has_bh_in_lru(int cpu, void *dummy) { return false; } #define buffer_heads_over_limit 0 #endif /* CONFIG_BLOCK */ #endif /* _LINUX_BUFFER_HEAD_H */ PK ! Ssj�� � isapnp.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * ISA Plug & Play support * Copyright (c) by Jaroslav Kysela <perex@suse.cz> */ #ifndef LINUX_ISAPNP_H #define LINUX_ISAPNP_H #include <linux/errno.h> #include <linux/pnp.h> /* * */ #define ISAPNP_VENDOR(a,b,c) (((((a)-'A'+1)&0x3f)<<2)|\ ((((b)-'A'+1)&0x18)>>3)|((((b)-'A'+1)&7)<<13)|\ ((((c)-'A'+1)&0x1f)<<8)) #define ISAPNP_DEVICE(x) ((((x)&0xf000)>>8)|\ (((x)&0x0f00)>>8)|\ (((x)&0x00f0)<<8)|\ (((x)&0x000f)<<8)) #define ISAPNP_FUNCTION(x) ISAPNP_DEVICE(x) /* * */ #ifdef __KERNEL__ #include <linux/mod_devicetable.h> #define DEVICE_COUNT_COMPATIBLE 4 #define ISAPNP_CARD_DEVS 8 #define ISAPNP_CARD_ID(_va, _vb, _vc, _device) \ .card_vendor = ISAPNP_VENDOR(_va, _vb, _vc), .card_device = ISAPNP_DEVICE(_device) #define ISAPNP_CARD_END \ .card_vendor = 0, .card_device = 0 #define ISAPNP_DEVICE_ID(_va, _vb, _vc, _function) \ { .vendor = ISAPNP_VENDOR(_va, _vb, _vc), .function = ISAPNP_FUNCTION(_function) } struct isapnp_card_id { unsigned long driver_data; /* data private to the driver */ unsigned short card_vendor, card_device; struct { unsigned short vendor, function; } devs[ISAPNP_CARD_DEVS]; /* logical devices */ }; #define ISAPNP_DEVICE_SINGLE(_cva, _cvb, _cvc, _cdevice, _dva, _dvb, _dvc, _dfunction) \ .card_vendor = ISAPNP_VENDOR(_cva, _cvb, _cvc), .card_device = ISAPNP_DEVICE(_cdevice), \ .vendor = ISAPNP_VENDOR(_dva, _dvb, _dvc), .function = ISAPNP_FUNCTION(_dfunction) #define ISAPNP_DEVICE_SINGLE_END \ .card_vendor = 0, .card_device = 0 #if defined(CONFIG_ISAPNP) || (defined(CONFIG_ISAPNP_MODULE) && defined(MODULE)) #define __ISAPNP__ /* lowlevel configuration */ int isapnp_present(void); int isapnp_cfg_begin(int csn, int device); int isapnp_cfg_end(void); unsigned char isapnp_read_byte(unsigned char idx); void isapnp_write_byte(unsigned char idx, unsigned char val); #ifdef CONFIG_PROC_FS int isapnp_proc_init(void); int isapnp_proc_done(void); #else static inline int isapnp_proc_init(void) { return 0; } static inline int isapnp_proc_done(void) { return 0; } #endif /* compat */ struct pnp_dev *pnp_find_dev(struct pnp_card *card, unsigned short vendor, unsigned short function, struct pnp_dev *from); #else /* !CONFIG_ISAPNP */ /* lowlevel configuration */ static inline int isapnp_present(void) { return 0; } static inline int isapnp_cfg_begin(int csn, int device) { return -ENODEV; } static inline int isapnp_cfg_end(void) { return -ENODEV; } static inline unsigned char isapnp_read_byte(unsigned char idx) { return 0xff; } static inline void isapnp_write_byte(unsigned char idx, unsigned char val) { ; } static inline struct pnp_dev *pnp_find_dev(struct pnp_card *card, unsigned short vendor, unsigned short function, struct pnp_dev *from) { return NULL; } #endif /* CONFIG_ISAPNP */ #endif /* __KERNEL__ */ #endif /* LINUX_ISAPNP_H */ PK ! ?cƋ � of_pdt.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Definitions for building a device tree by calling into the * Open Firmware PROM. * * Copyright (C) 2010 Andres Salomon <dilinger@queued.net> */ #ifndef _LINUX_OF_PDT_H #define _LINUX_OF_PDT_H /* overridable operations for calling into the PROM */ struct of_pdt_ops { /* * buf should be 32 bytes; return 0 on success. * If prev is NULL, the first property will be returned. */ int (*nextprop)(phandle node, char *prev, char *buf); /* for both functions, return proplen on success; -1 on error */ int (*getproplen)(phandle node, const char *prop); int (*getproperty)(phandle node, const char *prop, char *buf, int bufsize); /* phandles are 0 if no child or sibling exists */ phandle (*getchild)(phandle parent); phandle (*getsibling)(phandle node); /* return 0 on success; fill in 'len' with number of bytes in path */ int (*pkg2path)(phandle node, char *buf, const int buflen, int *len); }; extern void *prom_early_alloc(unsigned long size); /* for building the device tree */ extern void of_pdt_build_devicetree(phandle root_node, struct of_pdt_ops *ops); #endif /* _LINUX_OF_PDT_H */ PK ! ;��9�D �D nodemask.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_NODEMASK_H #define __LINUX_NODEMASK_H /* * Nodemasks provide a bitmap suitable for representing the * set of Node's in a system, one bit position per Node number. * * See detailed comments in the file linux/bitmap.h describing the * data type on which these nodemasks are based. * * For details of nodemask_parse_user(), see bitmap_parse_user() in * lib/bitmap.c. For details of nodelist_parse(), see bitmap_parselist(), * also in bitmap.c. For details of node_remap(), see bitmap_bitremap in * lib/bitmap.c. For details of nodes_remap(), see bitmap_remap in * lib/bitmap.c. For details of nodes_onto(), see bitmap_onto in * lib/bitmap.c. For details of nodes_fold(), see bitmap_fold in * lib/bitmap.c. * * The available nodemask operations are: * * void node_set(node, mask) turn on bit 'node' in mask * void node_clear(node, mask) turn off bit 'node' in mask * void nodes_setall(mask) set all bits * void nodes_clear(mask) clear all bits * int node_isset(node, mask) true iff bit 'node' set in mask * int node_test_and_set(node, mask) test and set bit 'node' in mask * * void nodes_and(dst, src1, src2) dst = src1 & src2 [intersection] * void nodes_or(dst, src1, src2) dst = src1 | src2 [union] * void nodes_xor(dst, src1, src2) dst = src1 ^ src2 * void nodes_andnot(dst, src1, src2) dst = src1 & ~src2 * void nodes_complement(dst, src) dst = ~src * * int nodes_equal(mask1, mask2) Does mask1 == mask2? * int nodes_intersects(mask1, mask2) Do mask1 and mask2 intersect? * int nodes_subset(mask1, mask2) Is mask1 a subset of mask2? * int nodes_empty(mask) Is mask empty (no bits sets)? * int nodes_full(mask) Is mask full (all bits sets)? * int nodes_weight(mask) Hamming weight - number of set bits * * void nodes_shift_right(dst, src, n) Shift right * void nodes_shift_left(dst, src, n) Shift left * * unsigned int first_node(mask) Number lowest set bit, or MAX_NUMNODES * unsigend int next_node(node, mask) Next node past 'node', or MAX_NUMNODES * unsigned int next_node_in(node, mask) Next node past 'node', or wrap to first, * or MAX_NUMNODES * unsigned int first_unset_node(mask) First node not set in mask, or * MAX_NUMNODES * * nodemask_t nodemask_of_node(node) Return nodemask with bit 'node' set * NODE_MASK_ALL Initializer - all bits set * NODE_MASK_NONE Initializer - no bits set * unsigned long *nodes_addr(mask) Array of unsigned long's in mask * * int nodemask_parse_user(ubuf, ulen, mask) Parse ascii string as nodemask * int nodelist_parse(buf, map) Parse ascii string as nodelist * int node_remap(oldbit, old, new) newbit = map(old, new)(oldbit) * void nodes_remap(dst, src, old, new) *dst = map(old, new)(src) * void nodes_onto(dst, orig, relmap) *dst = orig relative to relmap * void nodes_fold(dst, orig, sz) dst bits = orig bits mod sz * * for_each_node_mask(node, mask) for-loop node over mask * * int num_online_nodes() Number of online Nodes * int num_possible_nodes() Number of all possible Nodes * * int node_random(mask) Random node with set bit in mask * * int node_online(node) Is some node online? * int node_possible(node) Is some node possible? * * node_set_online(node) set bit 'node' in node_online_map * node_set_offline(node) clear bit 'node' in node_online_map * * for_each_node(node) for-loop node over node_possible_map * for_each_online_node(node) for-loop node over node_online_map * * Subtlety: * 1) The 'type-checked' form of node_isset() causes gcc (3.3.2, anyway) * to generate slightly worse code. So use a simple one-line #define * for node_isset(), instead of wrapping an inline inside a macro, the * way we do the other calls. * * NODEMASK_SCRATCH * When doing above logical AND, OR, XOR, Remap operations the callers tend to * need temporary nodemask_t's on the stack. But if NODES_SHIFT is large, * nodemask_t's consume too much stack space. NODEMASK_SCRATCH is a helper * for such situations. See below and CPUMASK_ALLOC also. */ #include <linux/threads.h> #include <linux/bitmap.h> #include <linux/minmax.h> #include <linux/numa.h> typedef struct { DECLARE_BITMAP(bits, MAX_NUMNODES); } nodemask_t; extern nodemask_t _unused_nodemask_arg_; /** * nodemask_pr_args - printf args to output a nodemask * @maskp: nodemask to be printed * * Can be used to provide arguments for '%*pb[l]' when printing a nodemask. */ #define nodemask_pr_args(maskp) __nodemask_pr_numnodes(maskp), \ __nodemask_pr_bits(maskp) static inline unsigned int __nodemask_pr_numnodes(const nodemask_t *m) { return m ? MAX_NUMNODES : 0; } static inline const unsigned long *__nodemask_pr_bits(const nodemask_t *m) { return m ? m->bits : NULL; } /* * The inline keyword gives the compiler room to decide to inline, or * not inline a function as it sees best. However, as these functions * are called in both __init and non-__init functions, if they are not * inlined we will end up with a section mismatch error (of the type of * freeable items not being freed). So we must use __always_inline here * to fix the problem. If other functions in the future also end up in * this situation they will also need to be annotated as __always_inline */ #define node_set(node, dst) __node_set((node), &(dst)) static __always_inline void __node_set(int node, volatile nodemask_t *dstp) { set_bit(node, dstp->bits); } #define node_clear(node, dst) __node_clear((node), &(dst)) static inline void __node_clear(int node, volatile nodemask_t *dstp) { clear_bit(node, dstp->bits); } #define nodes_setall(dst) __nodes_setall(&(dst), MAX_NUMNODES) static inline void __nodes_setall(nodemask_t *dstp, unsigned int nbits) { bitmap_fill(dstp->bits, nbits); } #define nodes_clear(dst) __nodes_clear(&(dst), MAX_NUMNODES) static inline void __nodes_clear(nodemask_t *dstp, unsigned int nbits) { bitmap_zero(dstp->bits, nbits); } /* No static inline type checking - see Subtlety (1) above. */ #define node_isset(node, nodemask) test_bit((node), (nodemask).bits) #define node_test_and_set(node, nodemask) \ __node_test_and_set((node), &(nodemask)) static inline bool __node_test_and_set(int node, nodemask_t *addr) { return test_and_set_bit(node, addr->bits); } #define nodes_and(dst, src1, src2) \ __nodes_and(&(dst), &(src1), &(src2), MAX_NUMNODES) static inline void __nodes_and(nodemask_t *dstp, const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { bitmap_and(dstp->bits, src1p->bits, src2p->bits, nbits); } #define nodes_or(dst, src1, src2) \ __nodes_or(&(dst), &(src1), &(src2), MAX_NUMNODES) static inline void __nodes_or(nodemask_t *dstp, const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { bitmap_or(dstp->bits, src1p->bits, src2p->bits, nbits); } #define nodes_xor(dst, src1, src2) \ __nodes_xor(&(dst), &(src1), &(src2), MAX_NUMNODES) static inline void __nodes_xor(nodemask_t *dstp, const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { bitmap_xor(dstp->bits, src1p->bits, src2p->bits, nbits); } #define nodes_andnot(dst, src1, src2) \ __nodes_andnot(&(dst), &(src1), &(src2), MAX_NUMNODES) static inline void __nodes_andnot(nodemask_t *dstp, const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { bitmap_andnot(dstp->bits, src1p->bits, src2p->bits, nbits); } #define nodes_complement(dst, src) \ __nodes_complement(&(dst), &(src), MAX_NUMNODES) static inline void __nodes_complement(nodemask_t *dstp, const nodemask_t *srcp, unsigned int nbits) { bitmap_complement(dstp->bits, srcp->bits, nbits); } #define nodes_equal(src1, src2) \ __nodes_equal(&(src1), &(src2), MAX_NUMNODES) static inline bool __nodes_equal(const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { return bitmap_equal(src1p->bits, src2p->bits, nbits); } #define nodes_intersects(src1, src2) \ __nodes_intersects(&(src1), &(src2), MAX_NUMNODES) static inline bool __nodes_intersects(const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { return bitmap_intersects(src1p->bits, src2p->bits, nbits); } #define nodes_subset(src1, src2) \ __nodes_subset(&(src1), &(src2), MAX_NUMNODES) static inline bool __nodes_subset(const nodemask_t *src1p, const nodemask_t *src2p, unsigned int nbits) { return bitmap_subset(src1p->bits, src2p->bits, nbits); } #define nodes_empty(src) __nodes_empty(&(src), MAX_NUMNODES) static inline bool __nodes_empty(const nodemask_t *srcp, unsigned int nbits) { return bitmap_empty(srcp->bits, nbits); } #define nodes_full(nodemask) __nodes_full(&(nodemask), MAX_NUMNODES) static inline bool __nodes_full(const nodemask_t *srcp, unsigned int nbits) { return bitmap_full(srcp->bits, nbits); } #define nodes_weight(nodemask) __nodes_weight(&(nodemask), MAX_NUMNODES) static inline int __nodes_weight(const nodemask_t *srcp, unsigned int nbits) { return bitmap_weight(srcp->bits, nbits); } #define nodes_shift_right(dst, src, n) \ __nodes_shift_right(&(dst), &(src), (n), MAX_NUMNODES) static inline void __nodes_shift_right(nodemask_t *dstp, const nodemask_t *srcp, int n, int nbits) { bitmap_shift_right(dstp->bits, srcp->bits, n, nbits); } #define nodes_shift_left(dst, src, n) \ __nodes_shift_left(&(dst), &(src), (n), MAX_NUMNODES) static inline void __nodes_shift_left(nodemask_t *dstp, const nodemask_t *srcp, int n, int nbits) { bitmap_shift_left(dstp->bits, srcp->bits, n, nbits); } /* FIXME: better would be to fix all architectures to never return > MAX_NUMNODES, then the silly min_ts could be dropped. */ #define first_node(src) __first_node(&(src)) static inline unsigned int __first_node(const nodemask_t *srcp) { return min_t(unsigned int, MAX_NUMNODES, find_first_bit(srcp->bits, MAX_NUMNODES)); } #define next_node(n, src) __next_node((n), &(src)) static inline unsigned int __next_node(int n, const nodemask_t *srcp) { return min_t(unsigned int, MAX_NUMNODES, find_next_bit(srcp->bits, MAX_NUMNODES, n+1)); } /* * Find the next present node in src, starting after node n, wrapping around to * the first node in src if needed. Returns MAX_NUMNODES if src is empty. */ #define next_node_in(n, src) __next_node_in((n), &(src)) unsigned int __next_node_in(int node, const nodemask_t *srcp); static inline void init_nodemask_of_node(nodemask_t *mask, int node) { nodes_clear(*mask); node_set(node, *mask); } #define nodemask_of_node(node) \ ({ \ typeof(_unused_nodemask_arg_) m; \ if (sizeof(m) == sizeof(unsigned long)) { \ m.bits[0] = 1UL << (node); \ } else { \ init_nodemask_of_node(&m, (node)); \ } \ m; \ }) #define first_unset_node(mask) __first_unset_node(&(mask)) static inline unsigned int __first_unset_node(const nodemask_t *maskp) { return min_t(unsigned int, MAX_NUMNODES, find_first_zero_bit(maskp->bits, MAX_NUMNODES)); } #define NODE_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(MAX_NUMNODES) #if MAX_NUMNODES <= BITS_PER_LONG #define NODE_MASK_ALL \ ((nodemask_t) { { \ [BITS_TO_LONGS(MAX_NUMNODES)-1] = NODE_MASK_LAST_WORD \ } }) #else #define NODE_MASK_ALL \ ((nodemask_t) { { \ [0 ... BITS_TO_LONGS(MAX_NUMNODES)-2] = ~0UL, \ [BITS_TO_LONGS(MAX_NUMNODES)-1] = NODE_MASK_LAST_WORD \ } }) #endif #define NODE_MASK_NONE \ ((nodemask_t) { { \ [0 ... BITS_TO_LONGS(MAX_NUMNODES)-1] = 0UL \ } }) #define nodes_addr(src) ((src).bits) #define nodemask_parse_user(ubuf, ulen, dst) \ __nodemask_parse_user((ubuf), (ulen), &(dst), MAX_NUMNODES) static inline int __nodemask_parse_user(const char __user *buf, int len, nodemask_t *dstp, int nbits) { return bitmap_parse_user(buf, len, dstp->bits, nbits); } #define nodelist_parse(buf, dst) __nodelist_parse((buf), &(dst), MAX_NUMNODES) static inline int __nodelist_parse(const char *buf, nodemask_t *dstp, int nbits) { return bitmap_parselist(buf, dstp->bits, nbits); } #define node_remap(oldbit, old, new) \ __node_remap((oldbit), &(old), &(new), MAX_NUMNODES) static inline int __node_remap(int oldbit, const nodemask_t *oldp, const nodemask_t *newp, int nbits) { return bitmap_bitremap(oldbit, oldp->bits, newp->bits, nbits); } #define nodes_remap(dst, src, old, new) \ __nodes_remap(&(dst), &(src), &(old), &(new), MAX_NUMNODES) static inline void __nodes_remap(nodemask_t *dstp, const nodemask_t *srcp, const nodemask_t *oldp, const nodemask_t *newp, int nbits) { bitmap_remap(dstp->bits, srcp->bits, oldp->bits, newp->bits, nbits); } #define nodes_onto(dst, orig, relmap) \ __nodes_onto(&(dst), &(orig), &(relmap), MAX_NUMNODES) static inline void __nodes_onto(nodemask_t *dstp, const nodemask_t *origp, const nodemask_t *relmapp, int nbits) { bitmap_onto(dstp->bits, origp->bits, relmapp->bits, nbits); } #define nodes_fold(dst, orig, sz) \ __nodes_fold(&(dst), &(orig), sz, MAX_NUMNODES) static inline void __nodes_fold(nodemask_t *dstp, const nodemask_t *origp, int sz, int nbits) { bitmap_fold(dstp->bits, origp->bits, sz, nbits); } #if MAX_NUMNODES > 1 #define for_each_node_mask(node, mask) \ for ((node) = first_node(mask); \ (node >= 0) && (node) < MAX_NUMNODES; \ (node) = next_node((node), (mask))) #else /* MAX_NUMNODES == 1 */ #define for_each_node_mask(node, mask) \ for ((node) = 0; (node) < 1 && !nodes_empty(mask); (node)++) #endif /* MAX_NUMNODES */ /* * Bitmasks that are kept for all the nodes. */ enum node_states { N_POSSIBLE, /* The node could become online at some point */ N_ONLINE, /* The node is online */ N_NORMAL_MEMORY, /* The node has regular memory */ #ifdef CONFIG_HIGHMEM N_HIGH_MEMORY, /* The node has regular or high memory */ #else N_HIGH_MEMORY = N_NORMAL_MEMORY, #endif N_MEMORY, /* The node has memory(regular, high, movable) */ N_CPU, /* The node has one or more cpus */ N_GENERIC_INITIATOR, /* The node has one or more Generic Initiators */ NR_NODE_STATES }; /* * The following particular system nodemasks and operations * on them manage all possible and online nodes. */ extern nodemask_t node_states[NR_NODE_STATES]; #if MAX_NUMNODES > 1 static inline int node_state(int node, enum node_states state) { return node_isset(node, node_states[state]); } static inline void node_set_state(int node, enum node_states state) { __node_set(node, &node_states[state]); } static inline void node_clear_state(int node, enum node_states state) { __node_clear(node, &node_states[state]); } static inline int num_node_state(enum node_states state) { return nodes_weight(node_states[state]); } #define for_each_node_state(__node, __state) \ for_each_node_mask((__node), node_states[__state]) #define first_online_node first_node(node_states[N_ONLINE]) #define first_memory_node first_node(node_states[N_MEMORY]) static inline unsigned int next_online_node(int nid) { return next_node(nid, node_states[N_ONLINE]); } static inline unsigned int next_memory_node(int nid) { return next_node(nid, node_states[N_MEMORY]); } extern unsigned int nr_node_ids; extern unsigned int nr_online_nodes; static inline void node_set_online(int nid) { node_set_state(nid, N_ONLINE); nr_online_nodes = num_node_state(N_ONLINE); } static inline void node_set_offline(int nid) { node_clear_state(nid, N_ONLINE); nr_online_nodes = num_node_state(N_ONLINE); } #else static inline int node_state(int node, enum node_states state) { return node == 0; } static inline void node_set_state(int node, enum node_states state) { } static inline void node_clear_state(int node, enum node_states state) { } static inline int num_node_state(enum node_states state) { return 1; } #define for_each_node_state(node, __state) \ for ( (node) = 0; (node) == 0; (node) = 1) #define first_online_node 0 #define first_memory_node 0 #define next_online_node(nid) (MAX_NUMNODES) #define nr_node_ids 1U #define nr_online_nodes 1U #define node_set_online(node) node_set_state((node), N_ONLINE) #define node_set_offline(node) node_clear_state((node), N_ONLINE) #endif #if defined(CONFIG_NUMA) && (MAX_NUMNODES > 1) extern int node_random(const nodemask_t *maskp); #else static inline int node_random(const nodemask_t *mask) { return 0; } #endif #define node_online_map node_states[N_ONLINE] #define node_possible_map node_states[N_POSSIBLE] #define num_online_nodes() num_node_state(N_ONLINE) #define num_possible_nodes() num_node_state(N_POSSIBLE) #define node_online(node) node_state((node), N_ONLINE) #define node_possible(node) node_state((node), N_POSSIBLE) #define for_each_node(node) for_each_node_state(node, N_POSSIBLE) #define for_each_online_node(node) for_each_node_state(node, N_ONLINE) /* * For nodemask scratch area. * NODEMASK_ALLOC(type, name) allocates an object with a specified type and * name. */ #if NODES_SHIFT > 8 /* nodemask_t > 32 bytes */ #define NODEMASK_ALLOC(type, name, gfp_flags) \ type *name = kmalloc(sizeof(*name), gfp_flags) #define NODEMASK_FREE(m) kfree(m) #else #define NODEMASK_ALLOC(type, name, gfp_flags) type _##name, *name = &_##name #define NODEMASK_FREE(m) do {} while (0) #endif /* Example structure for using NODEMASK_ALLOC, used in mempolicy. */ struct nodemask_scratch { nodemask_t mask1; nodemask_t mask2; }; #define NODEMASK_SCRATCH(x) \ NODEMASK_ALLOC(struct nodemask_scratch, x, \ GFP_KERNEL | __GFP_NORETRY) #define NODEMASK_SCRATCH_FREE(x) NODEMASK_FREE(x) #endif /* __LINUX_NODEMASK_H */ PK ! d��n �n trace_events.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_TRACE_EVENT_H #define _LINUX_TRACE_EVENT_H #include <linux/ring_buffer.h> #include <linux/trace_seq.h> #include <linux/percpu.h> #include <linux/hardirq.h> #include <linux/perf_event.h> #include <linux/tracepoint.h> struct trace_array; struct array_buffer; struct tracer; struct dentry; struct bpf_prog; const char *trace_print_flags_seq(struct trace_seq *p, const char *delim, unsigned long flags, const struct trace_print_flags *flag_array); const char *trace_print_symbols_seq(struct trace_seq *p, unsigned long val, const struct trace_print_flags *symbol_array); #if BITS_PER_LONG == 32 const char *trace_print_flags_seq_u64(struct trace_seq *p, const char *delim, unsigned long long flags, const struct trace_print_flags_u64 *flag_array); const char *trace_print_symbols_seq_u64(struct trace_seq *p, unsigned long long val, const struct trace_print_flags_u64 *symbol_array); #endif const char *trace_print_bitmask_seq(struct trace_seq *p, void *bitmask_ptr, unsigned int bitmask_size); const char *trace_print_hex_seq(struct trace_seq *p, const unsigned char *buf, int len, bool concatenate); const char *trace_print_array_seq(struct trace_seq *p, const void *buf, int count, size_t el_size); const char * trace_print_hex_dump_seq(struct trace_seq *p, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii); struct trace_iterator; struct trace_event; int trace_raw_output_prep(struct trace_iterator *iter, struct trace_event *event); extern __printf(2, 3) void trace_event_printf(struct trace_iterator *iter, const char *fmt, ...); /* * The trace entry - the most basic unit of tracing. This is what * is printed in the end as a single line in the trace output, such as: * * bash-15816 [01] 235.197585: idle_cpu <- irq_enter */ struct trace_entry { unsigned short type; unsigned char flags; unsigned char preempt_count; int pid; }; #define TRACE_EVENT_TYPE_MAX \ ((1 << (sizeof(((struct trace_entry *)0)->type) * 8)) - 1) /* * Trace iterator - used by printout routines who present trace * results to users and which routines might sleep, etc: */ struct trace_iterator { struct trace_array *tr; struct tracer *trace; struct array_buffer *array_buffer; void *private; int cpu_file; struct mutex mutex; struct ring_buffer_iter **buffer_iter; unsigned long iter_flags; void *temp; /* temp holder */ unsigned int temp_size; char *fmt; /* modified format holder */ unsigned int fmt_size; long wait_index; /* trace_seq for __print_flags() and __print_symbolic() etc. */ struct trace_seq tmp_seq; cpumask_var_t started; /* it's true when current open file is snapshot */ bool snapshot; /* The below is zeroed out in pipe_read */ struct trace_seq seq; struct trace_entry *ent; unsigned long lost_events; int leftover; int ent_size; int cpu; u64 ts; loff_t pos; long idx; /* All new field here will be zeroed out in pipe_read */ }; enum trace_iter_flags { TRACE_FILE_LAT_FMT = 1, TRACE_FILE_ANNOTATE = 2, TRACE_FILE_TIME_IN_NS = 4, }; typedef enum print_line_t (*trace_print_func)(struct trace_iterator *iter, int flags, struct trace_event *event); struct trace_event_functions { trace_print_func trace; trace_print_func raw; trace_print_func hex; trace_print_func binary; }; struct trace_event { struct hlist_node node; struct list_head list; int type; struct trace_event_functions *funcs; }; extern int register_trace_event(struct trace_event *event); extern int unregister_trace_event(struct trace_event *event); /* Return values for print_line callback */ enum print_line_t { TRACE_TYPE_PARTIAL_LINE = 0, /* Retry after flushing the seq */ TRACE_TYPE_HANDLED = 1, TRACE_TYPE_UNHANDLED = 2, /* Relay to other output functions */ TRACE_TYPE_NO_CONSUME = 3 /* Handled but ask to not consume */ }; enum print_line_t trace_handle_return(struct trace_seq *s); static inline void tracing_generic_entry_update(struct trace_entry *entry, unsigned short type, unsigned int trace_ctx) { entry->preempt_count = trace_ctx & 0xff; entry->pid = current->pid; entry->type = type; entry->flags = trace_ctx >> 16; } unsigned int tracing_gen_ctx_irq_test(unsigned int irqs_status); enum trace_flag_type { TRACE_FLAG_IRQS_OFF = 0x01, TRACE_FLAG_IRQS_NOSUPPORT = 0x02, TRACE_FLAG_NEED_RESCHED = 0x04, TRACE_FLAG_HARDIRQ = 0x08, TRACE_FLAG_SOFTIRQ = 0x10, TRACE_FLAG_PREEMPT_RESCHED = 0x20, TRACE_FLAG_NMI = 0x40, }; #ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT static inline unsigned int tracing_gen_ctx_flags(unsigned long irqflags) { unsigned int irq_status = irqs_disabled_flags(irqflags) ? TRACE_FLAG_IRQS_OFF : 0; return tracing_gen_ctx_irq_test(irq_status); } static inline unsigned int tracing_gen_ctx(void) { unsigned long irqflags; local_save_flags(irqflags); return tracing_gen_ctx_flags(irqflags); } #else static inline unsigned int tracing_gen_ctx_flags(unsigned long irqflags) { return tracing_gen_ctx_irq_test(TRACE_FLAG_IRQS_NOSUPPORT); } static inline unsigned int tracing_gen_ctx(void) { return tracing_gen_ctx_irq_test(TRACE_FLAG_IRQS_NOSUPPORT); } #endif static inline unsigned int tracing_gen_ctx_dec(void) { unsigned int trace_ctx; trace_ctx = tracing_gen_ctx(); /* * Subtract one from the preemption counter if preemption is enabled, * see trace_event_buffer_reserve()for details. */ if (IS_ENABLED(CONFIG_PREEMPTION)) trace_ctx--; return trace_ctx; } struct trace_event_file; struct ring_buffer_event * trace_event_buffer_lock_reserve(struct trace_buffer **current_buffer, struct trace_event_file *trace_file, int type, unsigned long len, unsigned int trace_ctx); #define TRACE_RECORD_CMDLINE BIT(0) #define TRACE_RECORD_TGID BIT(1) void tracing_record_taskinfo(struct task_struct *task, int flags); void tracing_record_taskinfo_sched_switch(struct task_struct *prev, struct task_struct *next, int flags); void tracing_record_cmdline(struct task_struct *task); void tracing_record_tgid(struct task_struct *task); int trace_output_call(struct trace_iterator *iter, char *name, char *fmt, ...); struct event_filter; enum trace_reg { TRACE_REG_REGISTER, TRACE_REG_UNREGISTER, #ifdef CONFIG_PERF_EVENTS TRACE_REG_PERF_REGISTER, TRACE_REG_PERF_UNREGISTER, TRACE_REG_PERF_OPEN, TRACE_REG_PERF_CLOSE, /* * These (ADD/DEL) use a 'boolean' return value, where 1 (true) means a * custom action was taken and the default action is not to be * performed. */ TRACE_REG_PERF_ADD, TRACE_REG_PERF_DEL, #endif }; struct trace_event_call; #define TRACE_FUNCTION_TYPE ((const char *)~0UL) struct trace_event_fields { const char *type; union { struct { const char *name; const int size; const int align; const int is_signed; const int filter_type; }; int (*define_fields)(struct trace_event_call *); }; }; struct trace_event_class { const char *system; void *probe; #ifdef CONFIG_PERF_EVENTS void *perf_probe; #endif int (*reg)(struct trace_event_call *event, enum trace_reg type, void *data); struct trace_event_fields *fields_array; struct list_head *(*get_fields)(struct trace_event_call *); struct list_head fields; int (*raw_init)(struct trace_event_call *); }; extern int trace_event_reg(struct trace_event_call *event, enum trace_reg type, void *data); struct trace_event_buffer { struct trace_buffer *buffer; struct ring_buffer_event *event; struct trace_event_file *trace_file; void *entry; unsigned int trace_ctx; struct pt_regs *regs; }; void *trace_event_buffer_reserve(struct trace_event_buffer *fbuffer, struct trace_event_file *trace_file, unsigned long len); void trace_event_buffer_commit(struct trace_event_buffer *fbuffer); enum { TRACE_EVENT_FL_FILTERED_BIT, TRACE_EVENT_FL_CAP_ANY_BIT, TRACE_EVENT_FL_NO_SET_FILTER_BIT, TRACE_EVENT_FL_IGNORE_ENABLE_BIT, TRACE_EVENT_FL_TRACEPOINT_BIT, TRACE_EVENT_FL_DYNAMIC_BIT, TRACE_EVENT_FL_KPROBE_BIT, TRACE_EVENT_FL_UPROBE_BIT, TRACE_EVENT_FL_EPROBE_BIT, }; /* * Event flags: * FILTERED - The event has a filter attached * CAP_ANY - Any user can enable for perf * NO_SET_FILTER - Set when filter has error and is to be ignored * IGNORE_ENABLE - For trace internal events, do not enable with debugfs file * TRACEPOINT - Event is a tracepoint * DYNAMIC - Event is a dynamic event (created at run time) * KPROBE - Event is a kprobe * UPROBE - Event is a uprobe * EPROBE - Event is an event probe */ enum { TRACE_EVENT_FL_FILTERED = (1 << TRACE_EVENT_FL_FILTERED_BIT), TRACE_EVENT_FL_CAP_ANY = (1 << TRACE_EVENT_FL_CAP_ANY_BIT), TRACE_EVENT_FL_NO_SET_FILTER = (1 << TRACE_EVENT_FL_NO_SET_FILTER_BIT), TRACE_EVENT_FL_IGNORE_ENABLE = (1 << TRACE_EVENT_FL_IGNORE_ENABLE_BIT), TRACE_EVENT_FL_TRACEPOINT = (1 << TRACE_EVENT_FL_TRACEPOINT_BIT), TRACE_EVENT_FL_DYNAMIC = (1 << TRACE_EVENT_FL_DYNAMIC_BIT), TRACE_EVENT_FL_KPROBE = (1 << TRACE_EVENT_FL_KPROBE_BIT), TRACE_EVENT_FL_UPROBE = (1 << TRACE_EVENT_FL_UPROBE_BIT), TRACE_EVENT_FL_EPROBE = (1 << TRACE_EVENT_FL_EPROBE_BIT), }; #define TRACE_EVENT_FL_UKPROBE (TRACE_EVENT_FL_KPROBE | TRACE_EVENT_FL_UPROBE) struct trace_event_call { struct list_head list; struct trace_event_class *class; union { const char *name; /* Set TRACE_EVENT_FL_TRACEPOINT flag when using "tp" */ struct tracepoint *tp; }; struct trace_event event; char *print_fmt; struct event_filter *filter; /* * Static events can disappear with modules, * where as dynamic ones need their own ref count. */ union { void *module; atomic_t refcnt; }; void *data; /* See the TRACE_EVENT_FL_* flags above */ int flags; /* static flags of different events */ #ifdef CONFIG_PERF_EVENTS int perf_refcount; struct hlist_head __percpu *perf_events; struct bpf_prog_array __rcu *prog_array; int (*perf_perm)(struct trace_event_call *, struct perf_event *); #endif }; #ifdef CONFIG_DYNAMIC_EVENTS bool trace_event_dyn_try_get_ref(struct trace_event_call *call); void trace_event_dyn_put_ref(struct trace_event_call *call); bool trace_event_dyn_busy(struct trace_event_call *call); #else static inline bool trace_event_dyn_try_get_ref(struct trace_event_call *call) { /* Without DYNAMIC_EVENTS configured, nothing should be calling this */ return false; } static inline void trace_event_dyn_put_ref(struct trace_event_call *call) { } static inline bool trace_event_dyn_busy(struct trace_event_call *call) { /* Nothing should call this without DYNAIMIC_EVENTS configured. */ return true; } #endif static inline bool trace_event_try_get_ref(struct trace_event_call *call) { if (call->flags & TRACE_EVENT_FL_DYNAMIC) return trace_event_dyn_try_get_ref(call); else return try_module_get(call->module); } static inline void trace_event_put_ref(struct trace_event_call *call) { if (call->flags & TRACE_EVENT_FL_DYNAMIC) trace_event_dyn_put_ref(call); else module_put(call->module); } #ifdef CONFIG_PERF_EVENTS static inline bool bpf_prog_array_valid(struct trace_event_call *call) { /* * This inline function checks whether call->prog_array * is valid or not. The function is called in various places, * outside rcu_read_lock/unlock, as a heuristic to speed up execution. * * If this function returns true, and later call->prog_array * becomes false inside rcu_read_lock/unlock region, * we bail out then. If this function return false, * there is a risk that we might miss a few events if the checking * were delayed until inside rcu_read_lock/unlock region and * call->prog_array happened to become non-NULL then. * * Here, READ_ONCE() is used instead of rcu_access_pointer(). * rcu_access_pointer() requires the actual definition of * "struct bpf_prog_array" while READ_ONCE() only needs * a declaration of the same type. */ return !!READ_ONCE(call->prog_array); } #endif static inline const char * trace_event_name(struct trace_event_call *call) { if (call->flags & TRACE_EVENT_FL_TRACEPOINT) return call->tp ? call->tp->name : NULL; else return call->name; } static inline struct list_head * trace_get_fields(struct trace_event_call *event_call) { if (!event_call->class->get_fields) return &event_call->class->fields; return event_call->class->get_fields(event_call); } struct trace_subsystem_dir; enum { EVENT_FILE_FL_ENABLED_BIT, EVENT_FILE_FL_RECORDED_CMD_BIT, EVENT_FILE_FL_RECORDED_TGID_BIT, EVENT_FILE_FL_FILTERED_BIT, EVENT_FILE_FL_NO_SET_FILTER_BIT, EVENT_FILE_FL_SOFT_MODE_BIT, EVENT_FILE_FL_SOFT_DISABLED_BIT, EVENT_FILE_FL_TRIGGER_MODE_BIT, EVENT_FILE_FL_TRIGGER_COND_BIT, EVENT_FILE_FL_PID_FILTER_BIT, EVENT_FILE_FL_WAS_ENABLED_BIT, EVENT_FILE_FL_FREED_BIT, }; extern struct trace_event_file *trace_get_event_file(const char *instance, const char *system, const char *event); extern void trace_put_event_file(struct trace_event_file *file); #define MAX_DYNEVENT_CMD_LEN (2048) enum dynevent_type { DYNEVENT_TYPE_SYNTH = 1, DYNEVENT_TYPE_KPROBE, DYNEVENT_TYPE_NONE, }; struct dynevent_cmd; typedef int (*dynevent_create_fn_t)(struct dynevent_cmd *cmd); struct dynevent_cmd { struct seq_buf seq; const char *event_name; unsigned int n_fields; enum dynevent_type type; dynevent_create_fn_t run_command; void *private_data; }; extern int dynevent_create(struct dynevent_cmd *cmd); extern int synth_event_delete(const char *name); extern void synth_event_cmd_init(struct dynevent_cmd *cmd, char *buf, int maxlen); extern int __synth_event_gen_cmd_start(struct dynevent_cmd *cmd, const char *name, struct module *mod, ...); #define synth_event_gen_cmd_start(cmd, name, mod, ...) \ __synth_event_gen_cmd_start(cmd, name, mod, ## __VA_ARGS__, NULL) struct synth_field_desc { const char *type; const char *name; }; extern int synth_event_gen_cmd_array_start(struct dynevent_cmd *cmd, const char *name, struct module *mod, struct synth_field_desc *fields, unsigned int n_fields); extern int synth_event_create(const char *name, struct synth_field_desc *fields, unsigned int n_fields, struct module *mod); extern int synth_event_add_field(struct dynevent_cmd *cmd, const char *type, const char *name); extern int synth_event_add_field_str(struct dynevent_cmd *cmd, const char *type_name); extern int synth_event_add_fields(struct dynevent_cmd *cmd, struct synth_field_desc *fields, unsigned int n_fields); #define synth_event_gen_cmd_end(cmd) \ dynevent_create(cmd) struct synth_event; struct synth_event_trace_state { struct trace_event_buffer fbuffer; struct synth_trace_event *entry; struct trace_buffer *buffer; struct synth_event *event; unsigned int cur_field; unsigned int n_u64; bool disabled; bool add_next; bool add_name; }; extern int synth_event_trace(struct trace_event_file *file, unsigned int n_vals, ...); extern int synth_event_trace_array(struct trace_event_file *file, u64 *vals, unsigned int n_vals); extern int synth_event_trace_start(struct trace_event_file *file, struct synth_event_trace_state *trace_state); extern int synth_event_add_next_val(u64 val, struct synth_event_trace_state *trace_state); extern int synth_event_add_val(const char *field_name, u64 val, struct synth_event_trace_state *trace_state); extern int synth_event_trace_end(struct synth_event_trace_state *trace_state); extern int kprobe_event_delete(const char *name); extern void kprobe_event_cmd_init(struct dynevent_cmd *cmd, char *buf, int maxlen); #define kprobe_event_gen_cmd_start(cmd, name, loc, ...) \ __kprobe_event_gen_cmd_start(cmd, false, name, loc, ## __VA_ARGS__, NULL) #define kretprobe_event_gen_cmd_start(cmd, name, loc, ...) \ __kprobe_event_gen_cmd_start(cmd, true, name, loc, ## __VA_ARGS__, NULL) extern int __kprobe_event_gen_cmd_start(struct dynevent_cmd *cmd, bool kretprobe, const char *name, const char *loc, ...); #define kprobe_event_add_fields(cmd, ...) \ __kprobe_event_add_fields(cmd, ## __VA_ARGS__, NULL) #define kprobe_event_add_field(cmd, field) \ __kprobe_event_add_fields(cmd, field, NULL) extern int __kprobe_event_add_fields(struct dynevent_cmd *cmd, ...); #define kprobe_event_gen_cmd_end(cmd) \ dynevent_create(cmd) #define kretprobe_event_gen_cmd_end(cmd) \ dynevent_create(cmd) /* * Event file flags: * ENABLED - The event is enabled * RECORDED_CMD - The comms should be recorded at sched_switch * RECORDED_TGID - The tgids should be recorded at sched_switch * FILTERED - The event has a filter attached * NO_SET_FILTER - Set when filter has error and is to be ignored * SOFT_MODE - The event is enabled/disabled by SOFT_DISABLED * SOFT_DISABLED - When set, do not trace the event (even though its * tracepoint may be enabled) * TRIGGER_MODE - When set, invoke the triggers associated with the event * TRIGGER_COND - When set, one or more triggers has an associated filter * PID_FILTER - When set, the event is filtered based on pid * WAS_ENABLED - Set when enabled to know to clear trace on module removal * FREED - File descriptor is freed, all fields should be considered invalid */ enum { EVENT_FILE_FL_ENABLED = (1 << EVENT_FILE_FL_ENABLED_BIT), EVENT_FILE_FL_RECORDED_CMD = (1 << EVENT_FILE_FL_RECORDED_CMD_BIT), EVENT_FILE_FL_RECORDED_TGID = (1 << EVENT_FILE_FL_RECORDED_TGID_BIT), EVENT_FILE_FL_FILTERED = (1 << EVENT_FILE_FL_FILTERED_BIT), EVENT_FILE_FL_NO_SET_FILTER = (1 << EVENT_FILE_FL_NO_SET_FILTER_BIT), EVENT_FILE_FL_SOFT_MODE = (1 << EVENT_FILE_FL_SOFT_MODE_BIT), EVENT_FILE_FL_SOFT_DISABLED = (1 << EVENT_FILE_FL_SOFT_DISABLED_BIT), EVENT_FILE_FL_TRIGGER_MODE = (1 << EVENT_FILE_FL_TRIGGER_MODE_BIT), EVENT_FILE_FL_TRIGGER_COND = (1 << EVENT_FILE_FL_TRIGGER_COND_BIT), EVENT_FILE_FL_PID_FILTER = (1 << EVENT_FILE_FL_PID_FILTER_BIT), EVENT_FILE_FL_WAS_ENABLED = (1 << EVENT_FILE_FL_WAS_ENABLED_BIT), EVENT_FILE_FL_FREED = (1 << EVENT_FILE_FL_FREED_BIT), }; struct trace_event_file { struct list_head list; struct trace_event_call *event_call; struct event_filter __rcu *filter; struct dentry *dir; struct trace_array *tr; struct trace_subsystem_dir *system; struct list_head triggers; /* * 32 bit flags: * bit 0: enabled * bit 1: enabled cmd record * bit 2: enable/disable with the soft disable bit * bit 3: soft disabled * bit 4: trigger enabled * * Note: The bits must be set atomically to prevent races * from other writers. Reads of flags do not need to be in * sync as they occur in critical sections. But the way flags * is currently used, these changes do not affect the code * except that when a change is made, it may have a slight * delay in propagating the changes to other CPUs due to * caching and such. Which is mostly OK ;-) */ unsigned long flags; atomic_t ref; /* ref count for opened files */ atomic_t sm_ref; /* soft-mode reference counter */ atomic_t tm_ref; /* trigger-mode reference counter */ }; #define __TRACE_EVENT_FLAGS(name, value) \ static int __init trace_init_flags_##name(void) \ { \ event_##name.flags |= value; \ return 0; \ } \ early_initcall(trace_init_flags_##name); #define __TRACE_EVENT_PERF_PERM(name, expr...) \ static int perf_perm_##name(struct trace_event_call *tp_event, \ struct perf_event *p_event) \ { \ return ({ expr; }); \ } \ static int __init trace_init_perf_perm_##name(void) \ { \ event_##name.perf_perm = &perf_perm_##name; \ return 0; \ } \ early_initcall(trace_init_perf_perm_##name); #define PERF_MAX_TRACE_SIZE 8192 #define MAX_FILTER_STR_VAL 256U /* Should handle KSYM_SYMBOL_LEN */ enum event_trigger_type { ETT_NONE = (0), ETT_TRACE_ONOFF = (1 << 0), ETT_SNAPSHOT = (1 << 1), ETT_STACKTRACE = (1 << 2), ETT_EVENT_ENABLE = (1 << 3), ETT_EVENT_HIST = (1 << 4), ETT_HIST_ENABLE = (1 << 5), ETT_EVENT_EPROBE = (1 << 6), }; extern int filter_match_preds(struct event_filter *filter, void *rec); extern enum event_trigger_type event_triggers_call(struct trace_event_file *file, struct trace_buffer *buffer, void *rec, struct ring_buffer_event *event); extern void event_triggers_post_call(struct trace_event_file *file, enum event_trigger_type tt); bool trace_event_ignore_this_pid(struct trace_event_file *trace_file); /** * trace_trigger_soft_disabled - do triggers and test if soft disabled * @file: The file pointer of the event to test * * If any triggers without filters are attached to this event, they * will be called here. If the event is soft disabled and has no * triggers that require testing the fields, it will return true, * otherwise false. */ static inline bool trace_trigger_soft_disabled(struct trace_event_file *file) { unsigned long eflags = file->flags; if (!(eflags & EVENT_FILE_FL_TRIGGER_COND)) { if (eflags & EVENT_FILE_FL_TRIGGER_MODE) event_triggers_call(file, NULL, NULL, NULL); if (eflags & EVENT_FILE_FL_SOFT_DISABLED) return true; if (eflags & EVENT_FILE_FL_PID_FILTER) return trace_event_ignore_this_pid(file); } return false; } #ifdef CONFIG_BPF_EVENTS unsigned int trace_call_bpf(struct trace_event_call *call, void *ctx); int perf_event_attach_bpf_prog(struct perf_event *event, struct bpf_prog *prog, u64 bpf_cookie); void perf_event_detach_bpf_prog(struct perf_event *event); int perf_event_query_prog_array(struct perf_event *event, void __user *info); int bpf_probe_register(struct bpf_raw_event_map *btp, struct bpf_prog *prog); int bpf_probe_unregister(struct bpf_raw_event_map *btp, struct bpf_prog *prog); struct bpf_raw_event_map *bpf_get_raw_tracepoint(const char *name); void bpf_put_raw_tracepoint(struct bpf_raw_event_map *btp); int bpf_get_perf_event_info(const struct perf_event *event, u32 *prog_id, u32 *fd_type, const char **buf, u64 *probe_offset, u64 *probe_addr); #else static inline unsigned int trace_call_bpf(struct trace_event_call *call, void *ctx) { return 1; } static inline int perf_event_attach_bpf_prog(struct perf_event *event, struct bpf_prog *prog, u64 bpf_cookie) { return -EOPNOTSUPP; } static inline void perf_event_detach_bpf_prog(struct perf_event *event) { } static inline int perf_event_query_prog_array(struct perf_event *event, void __user *info) { return -EOPNOTSUPP; } static inline int bpf_probe_register(struct bpf_raw_event_map *btp, struct bpf_prog *p) { return -EOPNOTSUPP; } static inline int bpf_probe_unregister(struct bpf_raw_event_map *btp, struct bpf_prog *p) { return -EOPNOTSUPP; } static inline struct bpf_raw_event_map *bpf_get_raw_tracepoint(const char *name) { return NULL; } static inline void bpf_put_raw_tracepoint(struct bpf_raw_event_map *btp) { } static inline int bpf_get_perf_event_info(const struct perf_event *event, u32 *prog_id, u32 *fd_type, const char **buf, u64 *probe_offset, u64 *probe_addr) { return -EOPNOTSUPP; } #endif enum { FILTER_OTHER = 0, FILTER_STATIC_STRING, FILTER_DYN_STRING, FILTER_PTR_STRING, FILTER_TRACE_FN, FILTER_COMM, FILTER_CPU, }; extern int trace_event_raw_init(struct trace_event_call *call); extern int trace_define_field(struct trace_event_call *call, const char *type, const char *name, int offset, int size, int is_signed, int filter_type); extern int trace_add_event_call(struct trace_event_call *call); extern int trace_remove_event_call(struct trace_event_call *call); extern int trace_event_get_offsets(struct trace_event_call *call); int ftrace_set_clr_event(struct trace_array *tr, char *buf, int set); int trace_set_clr_event(const char *system, const char *event, int set); int trace_array_set_clr_event(struct trace_array *tr, const char *system, const char *event, bool enable); /* * The double __builtin_constant_p is because gcc will give us an error * if we try to allocate the static variable to fmt if it is not a * constant. Even with the outer if statement optimizing out. */ #define event_trace_printk(ip, fmt, args...) \ do { \ __trace_printk_check_format(fmt, ##args); \ tracing_record_cmdline(current); \ if (__builtin_constant_p(fmt)) { \ static const char *trace_printk_fmt \ __section("__trace_printk_fmt") = \ __builtin_constant_p(fmt) ? fmt : NULL; \ \ __trace_bprintk(ip, trace_printk_fmt, ##args); \ } else \ __trace_printk(ip, fmt, ##args); \ } while (0) #ifdef CONFIG_PERF_EVENTS struct perf_event; DECLARE_PER_CPU(struct pt_regs, perf_trace_regs); extern int perf_trace_init(struct perf_event *event); extern void perf_trace_destroy(struct perf_event *event); extern int perf_trace_add(struct perf_event *event, int flags); extern void perf_trace_del(struct perf_event *event, int flags); #ifdef CONFIG_KPROBE_EVENTS extern int perf_kprobe_init(struct perf_event *event, bool is_retprobe); extern void perf_kprobe_destroy(struct perf_event *event); extern int bpf_get_kprobe_info(const struct perf_event *event, u32 *fd_type, const char **symbol, u64 *probe_offset, u64 *probe_addr, bool perf_type_tracepoint); #endif #ifdef CONFIG_UPROBE_EVENTS extern int perf_uprobe_init(struct perf_event *event, unsigned long ref_ctr_offset, bool is_retprobe); extern void perf_uprobe_destroy(struct perf_event *event); extern int bpf_get_uprobe_info(const struct perf_event *event, u32 *fd_type, const char **filename, u64 *probe_offset, u64 *probe_addr, bool perf_type_tracepoint); #endif extern int ftrace_profile_set_filter(struct perf_event *event, int event_id, char *filter_str); extern void ftrace_profile_free_filter(struct perf_event *event); void perf_trace_buf_update(void *record, u16 type); void *perf_trace_buf_alloc(int size, struct pt_regs **regs, int *rctxp); int perf_event_set_bpf_prog(struct perf_event *event, struct bpf_prog *prog, u64 bpf_cookie); void perf_event_free_bpf_prog(struct perf_event *event); void bpf_trace_run1(struct bpf_prog *prog, u64 arg1); void bpf_trace_run2(struct bpf_prog *prog, u64 arg1, u64 arg2); void bpf_trace_run3(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3); void bpf_trace_run4(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4); void bpf_trace_run5(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5); void bpf_trace_run6(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6); void bpf_trace_run7(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7); void bpf_trace_run8(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8); void bpf_trace_run9(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8, u64 arg9); void bpf_trace_run10(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8, u64 arg9, u64 arg10); void bpf_trace_run11(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8, u64 arg9, u64 arg10, u64 arg11); void bpf_trace_run12(struct bpf_prog *prog, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8, u64 arg9, u64 arg10, u64 arg11, u64 arg12); void perf_trace_run_bpf_submit(void *raw_data, int size, int rctx, struct trace_event_call *call, u64 count, struct pt_regs *regs, struct hlist_head *head, struct task_struct *task); static inline void perf_trace_buf_submit(void *raw_data, int size, int rctx, u16 type, u64 count, struct pt_regs *regs, void *head, struct task_struct *task) { perf_tp_event(type, count, raw_data, size, regs, head, rctx, task); } #endif #endif /* _LINUX_TRACE_EVENT_H */ PK ! ���Q� � async_tx.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright © 2006, Intel Corporation. */ #ifndef _ASYNC_TX_H_ #define _ASYNC_TX_H_ #include <linux/dmaengine.h> #include <linux/spinlock.h> #include <linux/interrupt.h> /* on architectures without dma-mapping capabilities we need to ensure * that the asynchronous path compiles away */ #ifdef CONFIG_HAS_DMA #define __async_inline #else #define __async_inline __always_inline #endif /** * dma_chan_ref - object used to manage dma channels received from the * dmaengine core. * @chan - the channel being tracked * @node - node for the channel to be placed on async_tx_master_list * @rcu - for list_del_rcu * @count - number of times this channel is listed in the pool * (for channels with multiple capabiities) */ struct dma_chan_ref { struct dma_chan *chan; struct list_head node; struct rcu_head rcu; atomic_t count; }; /** * async_tx_flags - modifiers for the async_* calls * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the * destination address is not a source. The asynchronous case handles this * implicitly, the synchronous case needs to zero the destination block. * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is * also one of the source addresses. In the synchronous case the destination * address is an implied source, whereas the asynchronous case it must be listed * as a source. The destination address must be the first address in the source * array. * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a * dependency chain * @ASYNC_TX_FENCE: specify that the next operation in the dependency * chain uses this operation's result as an input * @ASYNC_TX_PQ_XOR_DST: do not overwrite the syndrome but XOR it with the * input data. Required for rmw case. */ enum async_tx_flags { ASYNC_TX_XOR_ZERO_DST = (1 << 0), ASYNC_TX_XOR_DROP_DST = (1 << 1), ASYNC_TX_ACK = (1 << 2), ASYNC_TX_FENCE = (1 << 3), ASYNC_TX_PQ_XOR_DST = (1 << 4), }; /** * struct async_submit_ctl - async_tx submission/completion modifiers * @flags: submission modifiers * @depend_tx: parent dependency of the current operation being submitted * @cb_fn: callback routine to run at operation completion * @cb_param: parameter for the callback routine * @scribble: caller provided space for dma/page address conversions */ struct async_submit_ctl { enum async_tx_flags flags; struct dma_async_tx_descriptor *depend_tx; dma_async_tx_callback cb_fn; void *cb_param; void *scribble; }; #if defined(CONFIG_DMA_ENGINE) && !defined(CONFIG_ASYNC_TX_CHANNEL_SWITCH) #define async_tx_issue_pending_all dma_issue_pending_all /** * async_tx_issue_pending - send pending descriptor to the hardware channel * @tx: descriptor handle to retrieve hardware context * * Note: any dependent operations will have already been issued by * async_tx_channel_switch, or (in the case of no channel switch) will * be already pending on this channel. */ static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx) { if (likely(tx)) { struct dma_chan *chan = tx->chan; struct dma_device *dma = chan->device; dma->device_issue_pending(chan); } } #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL #include <asm/async_tx.h> #else #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \ __async_tx_find_channel(dep, type) struct dma_chan * __async_tx_find_channel(struct async_submit_ctl *submit, enum dma_transaction_type tx_type); #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */ #else static inline void async_tx_issue_pending_all(void) { do { } while (0); } static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx) { do { } while (0); } static inline struct dma_chan * async_tx_find_channel(struct async_submit_ctl *submit, enum dma_transaction_type tx_type, struct page **dst, int dst_count, struct page **src, int src_count, size_t len) { return NULL; } #endif /** * async_tx_sync_epilog - actions to take if an operation is run synchronously * @cb_fn: function to call when the transaction completes * @cb_fn_param: parameter to pass to the callback routine */ static inline void async_tx_sync_epilog(struct async_submit_ctl *submit) { if (submit->cb_fn) submit->cb_fn(submit->cb_param); } typedef union { unsigned long addr; struct page *page; dma_addr_t dma; } addr_conv_t; static inline void init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags, struct dma_async_tx_descriptor *tx, dma_async_tx_callback cb_fn, void *cb_param, addr_conv_t *scribble) { args->flags = flags; args->depend_tx = tx; args->cb_fn = cb_fn; args->cb_param = cb_param; args->scribble = scribble; } void async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_xor(struct page *dest, struct page **src_list, unsigned int offset, int src_cnt, size_t len, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_xor_offs(struct page *dest, unsigned int offset, struct page **src_list, unsigned int *src_offset, int src_cnt, size_t len, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_xor_val(struct page *dest, struct page **src_list, unsigned int offset, int src_cnt, size_t len, enum sum_check_flags *result, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_xor_val_offs(struct page *dest, unsigned int offset, struct page **src_list, unsigned int *src_offset, int src_cnt, size_t len, enum sum_check_flags *result, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, unsigned int src_offset, size_t len, struct async_submit_ctl *submit); struct dma_async_tx_descriptor *async_trigger_callback(struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_gen_syndrome(struct page **blocks, unsigned int *offsets, int src_cnt, size_t len, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_syndrome_val(struct page **blocks, unsigned int *offsets, int src_cnt, size_t len, enum sum_check_flags *pqres, struct page *spare, unsigned int s_off, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_raid6_2data_recov(int src_num, size_t bytes, int faila, int failb, struct page **ptrs, unsigned int *offs, struct async_submit_ctl *submit); struct dma_async_tx_descriptor * async_raid6_datap_recov(int src_num, size_t bytes, int faila, struct page **ptrs, unsigned int *offs, struct async_submit_ctl *submit); void async_tx_quiesce(struct dma_async_tx_descriptor **tx); #endif /* _ASYNC_TX_H_ */ PK ! �o�c c pseudo_fs.hnu �[��� #ifndef __LINUX_PSEUDO_FS__ #define __LINUX_PSEUDO_FS__ #include <linux/fs_context.h> struct pseudo_fs_context { const struct super_operations *ops; const struct xattr_handler **xattr; const struct dentry_operations *dops; unsigned long magic; }; struct pseudo_fs_context *init_pseudo(struct fs_context *fc, unsigned long magic); #endif PK ! �NXT� � bpf_trace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_BPF_TRACE_H__ #define __LINUX_BPF_TRACE_H__ #include <trace/events/xdp.h> #endif /* __LINUX_BPF_TRACE_H__ */ PK ! ����*� *� hyperv.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * * Copyright (c) 2011, Microsoft Corporation. * * Authors: * Haiyang Zhang <haiyangz@microsoft.com> * Hank Janssen <hjanssen@microsoft.com> * K. Y. Srinivasan <kys@microsoft.com> */ #ifndef _HYPERV_H #define _HYPERV_H #include <uapi/linux/hyperv.h> #include <linux/mm.h> #include <linux/types.h> #include <linux/scatterlist.h> #include <linux/list.h> #include <linux/timer.h> #include <linux/completion.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #include <linux/interrupt.h> #include <linux/reciprocal_div.h> #include <asm/hyperv-tlfs.h> #define MAX_PAGE_BUFFER_COUNT 32 #define MAX_MULTIPAGE_BUFFER_COUNT 32 /* 128K */ #pragma pack(push, 1) /* * Types for GPADL, decides is how GPADL header is created. * * It doesn't make much difference between BUFFER and RING if PAGE_SIZE is the * same as HV_HYP_PAGE_SIZE. * * If PAGE_SIZE is bigger than HV_HYP_PAGE_SIZE, the headers of ring buffers * will be of PAGE_SIZE, however, only the first HV_HYP_PAGE will be put * into gpadl, therefore the number for HV_HYP_PAGE and the indexes of each * HV_HYP_PAGE will be different between different types of GPADL, for example * if PAGE_SIZE is 64K: * * BUFFER: * * gva: |-- 64k --|-- 64k --| ... | * gpa: | 4k | 4k | ... | 4k | 4k | 4k | ... | 4k | * index: 0 1 2 15 16 17 18 .. 31 32 ... * | | ... | | | ... | ... * v V V V V V * gpadl: | 4k | 4k | ... | 4k | 4k | 4k | ... | 4k | ... | * index: 0 1 2 ... 15 16 17 18 .. 31 32 ... * * RING: * * | header | data | header | data | * gva: |-- 64k --|-- 64k --| ... |-- 64k --|-- 64k --| ... | * gpa: | 4k | .. | 4k | 4k | ... | 4k | ... | 4k | .. | 4k | .. | ... | * index: 0 1 16 17 18 31 ... n n+1 n+16 ... 2n * | / / / | / / * | / / / | / / * | / / ... / ... | / ... / * | / / / | / / * | / / / | / / * V V V V V V v * gpadl: | 4k | 4k | ... | ... | 4k | 4k | ... | * index: 0 1 2 ... 16 ... n-15 n-14 n-13 ... 2n-30 */ enum hv_gpadl_type { HV_GPADL_BUFFER, HV_GPADL_RING }; /* Single-page buffer */ struct hv_page_buffer { u32 len; u32 offset; u64 pfn; }; /* Multiple-page buffer */ struct hv_multipage_buffer { /* Length and Offset determines the # of pfns in the array */ u32 len; u32 offset; u64 pfn_array[MAX_MULTIPAGE_BUFFER_COUNT]; }; /* * Multiple-page buffer array; the pfn array is variable size: * The number of entries in the PFN array is determined by * "len" and "offset". */ struct hv_mpb_array { /* Length and Offset determines the # of pfns in the array */ u32 len; u32 offset; u64 pfn_array[]; }; /* 0x18 includes the proprietary packet header */ #define MAX_PAGE_BUFFER_PACKET (0x18 + \ (sizeof(struct hv_page_buffer) * \ MAX_PAGE_BUFFER_COUNT)) #define MAX_MULTIPAGE_BUFFER_PACKET (0x18 + \ sizeof(struct hv_multipage_buffer)) #pragma pack(pop) struct hv_ring_buffer { /* Offset in bytes from the start of ring data below */ u32 write_index; /* Offset in bytes from the start of ring data below */ u32 read_index; u32 interrupt_mask; /* * WS2012/Win8 and later versions of Hyper-V implement interrupt * driven flow management. The feature bit feat_pending_send_sz * is set by the host on the host->guest ring buffer, and by the * guest on the guest->host ring buffer. * * The meaning of the feature bit is a bit complex in that it has * semantics that apply to both ring buffers. If the guest sets * the feature bit in the guest->host ring buffer, the guest is * telling the host that: * 1) It will set the pending_send_sz field in the guest->host ring * buffer when it is waiting for space to become available, and * 2) It will read the pending_send_sz field in the host->guest * ring buffer and interrupt the host when it frees enough space * * Similarly, if the host sets the feature bit in the host->guest * ring buffer, the host is telling the guest that: * 1) It will set the pending_send_sz field in the host->guest ring * buffer when it is waiting for space to become available, and * 2) It will read the pending_send_sz field in the guest->host * ring buffer and interrupt the guest when it frees enough space * * If either the guest or host does not set the feature bit that it * owns, that guest or host must do polling if it encounters a full * ring buffer, and not signal the other end with an interrupt. */ u32 pending_send_sz; u32 reserved1[12]; union { struct { u32 feat_pending_send_sz:1; }; u32 value; } feature_bits; /* Pad it to PAGE_SIZE so that data starts on page boundary */ u8 reserved2[PAGE_SIZE - 68]; /* * Ring data starts here + RingDataStartOffset * !!! DO NOT place any fields below this !!! */ u8 buffer[]; } __packed; /* * If the requested ring buffer size is at least 8 times the size of the * header, steal space from the ring buffer for the header. Otherwise, add * space for the header so that is doesn't take too much of the ring buffer * space. * * The factor of 8 is somewhat arbitrary. The goal is to prevent adding a * relatively small header (4 Kbytes on x86) to a large-ish power-of-2 ring * buffer size (such as 128 Kbytes) and so end up making a nearly twice as * large allocation that will be almost half wasted. As a contrasting example, * on ARM64 with 64 Kbyte page size, we don't want to take 64 Kbytes for the * header from a 128 Kbyte allocation, leaving only 64 Kbytes for the ring. * In this latter case, we must add 64 Kbytes for the header and not worry * about what's wasted. */ #define VMBUS_HEADER_ADJ(payload_sz) \ ((payload_sz) >= 8 * sizeof(struct hv_ring_buffer) ? \ 0 : sizeof(struct hv_ring_buffer)) /* Calculate the proper size of a ringbuffer, it must be page-aligned */ #define VMBUS_RING_SIZE(payload_sz) PAGE_ALIGN(VMBUS_HEADER_ADJ(payload_sz) + \ (payload_sz)) struct hv_ring_buffer_info { struct hv_ring_buffer *ring_buffer; u32 ring_size; /* Include the shared header */ struct reciprocal_value ring_size_div10_reciprocal; spinlock_t ring_lock; u32 ring_datasize; /* < ring_size */ u32 priv_read_index; /* * The ring buffer mutex lock. This lock prevents the ring buffer from * being freed while the ring buffer is being accessed. */ struct mutex ring_buffer_mutex; /* Buffer that holds a copy of an incoming host packet */ void *pkt_buffer; u32 pkt_buffer_size; }; static inline u32 hv_get_bytes_to_read(const struct hv_ring_buffer_info *rbi) { u32 read_loc, write_loc, dsize, read; dsize = rbi->ring_datasize; read_loc = rbi->ring_buffer->read_index; write_loc = READ_ONCE(rbi->ring_buffer->write_index); read = write_loc >= read_loc ? (write_loc - read_loc) : (dsize - read_loc) + write_loc; return read; } static inline u32 hv_get_bytes_to_write(const struct hv_ring_buffer_info *rbi) { u32 read_loc, write_loc, dsize, write; dsize = rbi->ring_datasize; read_loc = READ_ONCE(rbi->ring_buffer->read_index); write_loc = rbi->ring_buffer->write_index; write = write_loc >= read_loc ? dsize - (write_loc - read_loc) : read_loc - write_loc; return write; } static inline u32 hv_get_avail_to_write_percent( const struct hv_ring_buffer_info *rbi) { u32 avail_write = hv_get_bytes_to_write(rbi); return reciprocal_divide( (avail_write << 3) + (avail_write << 1), rbi->ring_size_div10_reciprocal); } /* * VMBUS version is 32 bit entity broken up into * two 16 bit quantities: major_number. minor_number. * * 0 . 13 (Windows Server 2008) * 1 . 1 (Windows 7) * 2 . 4 (Windows 8) * 3 . 0 (Windows 8 R2) * 4 . 0 (Windows 10) * 4 . 1 (Windows 10 RS3) * 5 . 0 (Newer Windows 10) * 5 . 1 (Windows 10 RS4) * 5 . 2 (Windows Server 2019, RS5) * 5 . 3 (Windows Server 2022) */ #define VERSION_WS2008 ((0 << 16) | (13)) #define VERSION_WIN7 ((1 << 16) | (1)) #define VERSION_WIN8 ((2 << 16) | (4)) #define VERSION_WIN8_1 ((3 << 16) | (0)) #define VERSION_WIN10 ((4 << 16) | (0)) #define VERSION_WIN10_V4_1 ((4 << 16) | (1)) #define VERSION_WIN10_V5 ((5 << 16) | (0)) #define VERSION_WIN10_V5_1 ((5 << 16) | (1)) #define VERSION_WIN10_V5_2 ((5 << 16) | (2)) #define VERSION_WIN10_V5_3 ((5 << 16) | (3)) /* Make maximum size of pipe payload of 16K */ #define MAX_PIPE_DATA_PAYLOAD (sizeof(u8) * 16384) /* Define PipeMode values. */ #define VMBUS_PIPE_TYPE_BYTE 0x00000000 #define VMBUS_PIPE_TYPE_MESSAGE 0x00000004 /* The size of the user defined data buffer for non-pipe offers. */ #define MAX_USER_DEFINED_BYTES 120 /* The size of the user defined data buffer for pipe offers. */ #define MAX_PIPE_USER_DEFINED_BYTES 116 /* * At the center of the Channel Management library is the Channel Offer. This * struct contains the fundamental information about an offer. */ struct vmbus_channel_offer { guid_t if_type; guid_t if_instance; /* * These two fields are not currently used. */ u64 reserved1; u64 reserved2; u16 chn_flags; u16 mmio_megabytes; /* in bytes * 1024 * 1024 */ union { /* Non-pipes: The user has MAX_USER_DEFINED_BYTES bytes. */ struct { unsigned char user_def[MAX_USER_DEFINED_BYTES]; } std; /* * Pipes: * The following structure is an integrated pipe protocol, which * is implemented on top of standard user-defined data. Pipe * clients have MAX_PIPE_USER_DEFINED_BYTES left for their own * use. */ struct { u32 pipe_mode; unsigned char user_def[MAX_PIPE_USER_DEFINED_BYTES]; } pipe; } u; /* * The sub_channel_index is defined in Win8: a value of zero means a * primary channel and a value of non-zero means a sub-channel. * * Before Win8, the field is reserved, meaning it's always zero. */ u16 sub_channel_index; u16 reserved3; } __packed; /* Server Flags */ #define VMBUS_CHANNEL_ENUMERATE_DEVICE_INTERFACE 1 #define VMBUS_CHANNEL_SERVER_SUPPORTS_TRANSFER_PAGES 2 #define VMBUS_CHANNEL_SERVER_SUPPORTS_GPADLS 4 #define VMBUS_CHANNEL_NAMED_PIPE_MODE 0x10 #define VMBUS_CHANNEL_LOOPBACK_OFFER 0x100 #define VMBUS_CHANNEL_PARENT_OFFER 0x200 #define VMBUS_CHANNEL_REQUEST_MONITORED_NOTIFICATION 0x400 #define VMBUS_CHANNEL_TLNPI_PROVIDER_OFFER 0x2000 struct vmpacket_descriptor { u16 type; u16 offset8; u16 len8; u16 flags; u64 trans_id; } __packed; struct vmpacket_header { u32 prev_pkt_start_offset; struct vmpacket_descriptor descriptor; } __packed; struct vmtransfer_page_range { u32 byte_count; u32 byte_offset; } __packed; struct vmtransfer_page_packet_header { struct vmpacket_descriptor d; u16 xfer_pageset_id; u8 sender_owns_set; u8 reserved; u32 range_cnt; struct vmtransfer_page_range ranges[]; } __packed; struct vmgpadl_packet_header { struct vmpacket_descriptor d; u32 gpadl; u32 reserved; } __packed; struct vmadd_remove_transfer_page_set { struct vmpacket_descriptor d; u32 gpadl; u16 xfer_pageset_id; u16 reserved; } __packed; /* * This structure defines a range in guest physical space that can be made to * look virtually contiguous. */ struct gpa_range { u32 byte_count; u32 byte_offset; u64 pfn_array[]; }; /* * This is the format for an Establish Gpadl packet, which contains a handle by * which this GPADL will be known and a set of GPA ranges associated with it. * This can be converted to a MDL by the guest OS. If there are multiple GPA * ranges, then the resulting MDL will be "chained," representing multiple VA * ranges. */ struct vmestablish_gpadl { struct vmpacket_descriptor d; u32 gpadl; u32 range_cnt; struct gpa_range range[1]; } __packed; /* * This is the format for a Teardown Gpadl packet, which indicates that the * GPADL handle in the Establish Gpadl packet will never be referenced again. */ struct vmteardown_gpadl { struct vmpacket_descriptor d; u32 gpadl; u32 reserved; /* for alignment to a 8-byte boundary */ } __packed; /* * This is the format for a GPA-Direct packet, which contains a set of GPA * ranges, in addition to commands and/or data. */ struct vmdata_gpa_direct { struct vmpacket_descriptor d; u32 reserved; u32 range_cnt; struct gpa_range range[1]; } __packed; /* This is the format for a Additional Data Packet. */ struct vmadditional_data { struct vmpacket_descriptor d; u64 total_bytes; u32 offset; u32 byte_cnt; unsigned char data[1]; } __packed; union vmpacket_largest_possible_header { struct vmpacket_descriptor simple_hdr; struct vmtransfer_page_packet_header xfer_page_hdr; struct vmgpadl_packet_header gpadl_hdr; struct vmadd_remove_transfer_page_set add_rm_xfer_page_hdr; struct vmestablish_gpadl establish_gpadl_hdr; struct vmteardown_gpadl teardown_gpadl_hdr; struct vmdata_gpa_direct data_gpa_direct_hdr; }; #define VMPACKET_DATA_START_ADDRESS(__packet) \ (void *)(((unsigned char *)__packet) + \ ((struct vmpacket_descriptor)__packet)->offset8 * 8) #define VMPACKET_DATA_LENGTH(__packet) \ ((((struct vmpacket_descriptor)__packet)->len8 - \ ((struct vmpacket_descriptor)__packet)->offset8) * 8) #define VMPACKET_TRANSFER_MODE(__packet) \ (((struct IMPACT)__packet)->type) enum vmbus_packet_type { VM_PKT_INVALID = 0x0, VM_PKT_SYNCH = 0x1, VM_PKT_ADD_XFER_PAGESET = 0x2, VM_PKT_RM_XFER_PAGESET = 0x3, VM_PKT_ESTABLISH_GPADL = 0x4, VM_PKT_TEARDOWN_GPADL = 0x5, VM_PKT_DATA_INBAND = 0x6, VM_PKT_DATA_USING_XFER_PAGES = 0x7, VM_PKT_DATA_USING_GPADL = 0x8, VM_PKT_DATA_USING_GPA_DIRECT = 0x9, VM_PKT_CANCEL_REQUEST = 0xa, VM_PKT_COMP = 0xb, VM_PKT_DATA_USING_ADDITIONAL_PKT = 0xc, VM_PKT_ADDITIONAL_DATA = 0xd }; #define VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED 1 /* Version 1 messages */ enum vmbus_channel_message_type { CHANNELMSG_INVALID = 0, CHANNELMSG_OFFERCHANNEL = 1, CHANNELMSG_RESCIND_CHANNELOFFER = 2, CHANNELMSG_REQUESTOFFERS = 3, CHANNELMSG_ALLOFFERS_DELIVERED = 4, CHANNELMSG_OPENCHANNEL = 5, CHANNELMSG_OPENCHANNEL_RESULT = 6, CHANNELMSG_CLOSECHANNEL = 7, CHANNELMSG_GPADL_HEADER = 8, CHANNELMSG_GPADL_BODY = 9, CHANNELMSG_GPADL_CREATED = 10, CHANNELMSG_GPADL_TEARDOWN = 11, CHANNELMSG_GPADL_TORNDOWN = 12, CHANNELMSG_RELID_RELEASED = 13, CHANNELMSG_INITIATE_CONTACT = 14, CHANNELMSG_VERSION_RESPONSE = 15, CHANNELMSG_UNLOAD = 16, CHANNELMSG_UNLOAD_RESPONSE = 17, CHANNELMSG_18 = 18, CHANNELMSG_19 = 19, CHANNELMSG_20 = 20, CHANNELMSG_TL_CONNECT_REQUEST = 21, CHANNELMSG_MODIFYCHANNEL = 22, CHANNELMSG_TL_CONNECT_RESULT = 23, CHANNELMSG_MODIFYCHANNEL_RESPONSE = 24, CHANNELMSG_COUNT }; /* Hyper-V supports about 2048 channels, and the RELIDs start with 1. */ #define INVALID_RELID U32_MAX struct vmbus_channel_message_header { enum vmbus_channel_message_type msgtype; u32 padding; } __packed; /* Query VMBus Version parameters */ struct vmbus_channel_query_vmbus_version { struct vmbus_channel_message_header header; u32 version; } __packed; /* VMBus Version Supported parameters */ struct vmbus_channel_version_supported { struct vmbus_channel_message_header header; u8 version_supported; } __packed; /* Offer Channel parameters */ struct vmbus_channel_offer_channel { struct vmbus_channel_message_header header; struct vmbus_channel_offer offer; u32 child_relid; u8 monitorid; /* * win7 and beyond splits this field into a bit field. */ u8 monitor_allocated:1; u8 reserved:7; /* * These are new fields added in win7 and later. * Do not access these fields without checking the * negotiated protocol. * * If "is_dedicated_interrupt" is set, we must not set the * associated bit in the channel bitmap while sending the * interrupt to the host. * * connection_id is to be used in signaling the host. */ u16 is_dedicated_interrupt:1; u16 reserved1:15; u32 connection_id; } __packed; /* Rescind Offer parameters */ struct vmbus_channel_rescind_offer { struct vmbus_channel_message_header header; u32 child_relid; } __packed; /* * Request Offer -- no parameters, SynIC message contains the partition ID * Set Snoop -- no parameters, SynIC message contains the partition ID * Clear Snoop -- no parameters, SynIC message contains the partition ID * All Offers Delivered -- no parameters, SynIC message contains the partition * ID * Flush Client -- no parameters, SynIC message contains the partition ID */ /* Open Channel parameters */ struct vmbus_channel_open_channel { struct vmbus_channel_message_header header; /* Identifies the specific VMBus channel that is being opened. */ u32 child_relid; /* ID making a particular open request at a channel offer unique. */ u32 openid; /* GPADL for the channel's ring buffer. */ u32 ringbuffer_gpadlhandle; /* * Starting with win8, this field will be used to specify * the target virtual processor on which to deliver the interrupt for * the host to guest communication. * Prior to win8, incoming channel interrupts would only * be delivered on cpu 0. Setting this value to 0 would * preserve the earlier behavior. */ u32 target_vp; /* * The upstream ring buffer begins at offset zero in the memory * described by RingBufferGpadlHandle. The downstream ring buffer * follows it at this offset (in pages). */ u32 downstream_ringbuffer_pageoffset; /* User-specific data to be passed along to the server endpoint. */ unsigned char userdata[MAX_USER_DEFINED_BYTES]; } __packed; /* Open Channel Result parameters */ struct vmbus_channel_open_result { struct vmbus_channel_message_header header; u32 child_relid; u32 openid; u32 status; } __packed; /* Modify Channel Result parameters */ struct vmbus_channel_modifychannel_response { struct vmbus_channel_message_header header; u32 child_relid; u32 status; } __packed; /* Close channel parameters; */ struct vmbus_channel_close_channel { struct vmbus_channel_message_header header; u32 child_relid; } __packed; /* Channel Message GPADL */ #define GPADL_TYPE_RING_BUFFER 1 #define GPADL_TYPE_SERVER_SAVE_AREA 2 #define GPADL_TYPE_TRANSACTION 8 /* * The number of PFNs in a GPADL message is defined by the number of * pages that would be spanned by ByteCount and ByteOffset. If the * implied number of PFNs won't fit in this packet, there will be a * follow-up packet that contains more. */ struct vmbus_channel_gpadl_header { struct vmbus_channel_message_header header; u32 child_relid; u32 gpadl; u16 range_buflen; u16 rangecount; struct gpa_range range[]; } __packed; /* This is the followup packet that contains more PFNs. */ struct vmbus_channel_gpadl_body { struct vmbus_channel_message_header header; u32 msgnumber; u32 gpadl; u64 pfn[]; } __packed; struct vmbus_channel_gpadl_created { struct vmbus_channel_message_header header; u32 child_relid; u32 gpadl; u32 creation_status; } __packed; struct vmbus_channel_gpadl_teardown { struct vmbus_channel_message_header header; u32 child_relid; u32 gpadl; } __packed; struct vmbus_channel_gpadl_torndown { struct vmbus_channel_message_header header; u32 gpadl; } __packed; struct vmbus_channel_relid_released { struct vmbus_channel_message_header header; u32 child_relid; } __packed; struct vmbus_channel_initiate_contact { struct vmbus_channel_message_header header; u32 vmbus_version_requested; u32 target_vcpu; /* The VCPU the host should respond to */ union { u64 interrupt_page; struct { u8 msg_sint; u8 padding1[3]; u32 padding2; }; }; u64 monitor_page1; u64 monitor_page2; } __packed; /* Hyper-V socket: guest's connect()-ing to host */ struct vmbus_channel_tl_connect_request { struct vmbus_channel_message_header header; guid_t guest_endpoint_id; guid_t host_service_id; } __packed; /* Modify Channel parameters, cf. vmbus_send_modifychannel() */ struct vmbus_channel_modifychannel { struct vmbus_channel_message_header header; u32 child_relid; u32 target_vp; } __packed; struct vmbus_channel_version_response { struct vmbus_channel_message_header header; u8 version_supported; u8 connection_state; u16 padding; /* * On new hosts that support VMBus protocol 5.0, we must use * VMBUS_MESSAGE_CONNECTION_ID_4 for the Initiate Contact Message, * and for subsequent messages, we must use the Message Connection ID * field in the host-returned Version Response Message. * * On old hosts, we should always use VMBUS_MESSAGE_CONNECTION_ID (1). */ u32 msg_conn_id; } __packed; enum vmbus_channel_state { CHANNEL_OFFER_STATE, CHANNEL_OPENING_STATE, CHANNEL_OPEN_STATE, CHANNEL_OPENED_STATE, }; /* * Represents each channel msg on the vmbus connection This is a * variable-size data structure depending on the msg type itself */ struct vmbus_channel_msginfo { /* Bookkeeping stuff */ struct list_head msglistentry; /* So far, this is only used to handle gpadl body message */ struct list_head submsglist; /* Synchronize the request/response if needed */ struct completion waitevent; struct vmbus_channel *waiting_channel; union { struct vmbus_channel_version_supported version_supported; struct vmbus_channel_open_result open_result; struct vmbus_channel_gpadl_torndown gpadl_torndown; struct vmbus_channel_gpadl_created gpadl_created; struct vmbus_channel_version_response version_response; struct vmbus_channel_modifychannel_response modify_response; } response; u32 msgsize; /* * The channel message that goes out on the "wire". * It will contain at minimum the VMBUS_CHANNEL_MESSAGE_HEADER header */ unsigned char msg[]; }; struct vmbus_close_msg { struct vmbus_channel_msginfo info; struct vmbus_channel_close_channel msg; }; /* Define connection identifier type. */ union hv_connection_id { u32 asu32; struct { u32 id:24; u32 reserved:8; } u; }; enum vmbus_device_type { HV_IDE = 0, HV_SCSI, HV_FC, HV_NIC, HV_ND, HV_PCIE, HV_FB, HV_KBD, HV_MOUSE, HV_KVP, HV_TS, HV_HB, HV_SHUTDOWN, HV_FCOPY, HV_BACKUP, HV_DM, HV_UNKNOWN, }; /* * Provides request ids for VMBus. Encapsulates guest memory * addresses and stores the next available slot in req_arr * to generate new ids in constant time. */ struct vmbus_requestor { u64 *req_arr; unsigned long *req_bitmap; /* is a given slot available? */ u32 size; u64 next_request_id; spinlock_t req_lock; /* provides atomicity */ }; #define VMBUS_NO_RQSTOR U64_MAX #define VMBUS_RQST_ERROR (U64_MAX - 1) /* NetVSC-specific */ #define VMBUS_RQST_ID_NO_RESPONSE (U64_MAX - 2) /* StorVSC-specific */ #define VMBUS_RQST_INIT (U64_MAX - 2) #define VMBUS_RQST_RESET (U64_MAX - 3) struct vmbus_device { /* preferred ring buffer size in KB, 0 means no preferred size for this device */ size_t pref_ring_size; u16 dev_type; guid_t guid; bool perf_device; bool allowed_in_isolated; }; #define VMBUS_DEFAULT_MAX_PKT_SIZE 4096 struct vmbus_channel { struct list_head listentry; struct hv_device *device_obj; enum vmbus_channel_state state; struct vmbus_channel_offer_channel offermsg; /* * These are based on the OfferMsg.MonitorId. * Save it here for easy access. */ u8 monitor_grp; u8 monitor_bit; bool rescind; /* got rescind msg */ bool rescind_ref; /* got rescind msg, got channel reference */ struct completion rescind_event; u32 ringbuffer_gpadlhandle; /* Allocated memory for ring buffer */ struct page *ringbuffer_page; u32 ringbuffer_pagecount; u32 ringbuffer_send_offset; struct hv_ring_buffer_info outbound; /* send to parent */ struct hv_ring_buffer_info inbound; /* receive from parent */ struct vmbus_close_msg close_msg; /* Statistics */ u64 interrupts; /* Host to Guest interrupts */ u64 sig_events; /* Guest to Host events */ /* * Guest to host interrupts caused by the outbound ring buffer changing * from empty to not empty. */ u64 intr_out_empty; /* * Indicates that a full outbound ring buffer was encountered. The flag * is set to true when a full outbound ring buffer is encountered and * set to false when a write to the outbound ring buffer is completed. */ bool out_full_flag; /* Channel callback's invoked in softirq context */ struct tasklet_struct callback_event; void (*onchannel_callback)(void *context); void *channel_callback_context; void (*change_target_cpu_callback)(struct vmbus_channel *channel, u32 old, u32 new); /* * Synchronize channel scheduling and channel removal; see the inline * comments in vmbus_chan_sched() and vmbus_reset_channel_cb(). */ spinlock_t sched_lock; /* * A channel can be marked for one of three modes of reading: * BATCHED - callback called from taslket and should read * channel until empty. Interrupts from the host * are masked while read is in process (default). * DIRECT - callback called from tasklet (softirq). * ISR - callback called in interrupt context and must * invoke its own deferred processing. * Host interrupts are disabled and must be re-enabled * when ring is empty. */ enum hv_callback_mode { HV_CALL_BATCHED, HV_CALL_DIRECT, HV_CALL_ISR } callback_mode; bool is_dedicated_interrupt; u64 sig_event; /* * Starting with win8, this field will be used to specify the * target CPU on which to deliver the interrupt for the host * to guest communication. * * Prior to win8, incoming channel interrupts would only be * delivered on CPU 0. Setting this value to 0 would preserve * the earlier behavior. */ u32 target_cpu; /* * Support for sub-channels. For high performance devices, * it will be useful to have multiple sub-channels to support * a scalable communication infrastructure with the host. * The support for sub-channels is implemented as an extension * to the current infrastructure. * The initial offer is considered the primary channel and this * offer message will indicate if the host supports sub-channels. * The guest is free to ask for sub-channels to be offered and can * open these sub-channels as a normal "primary" channel. However, * all sub-channels will have the same type and instance guids as the * primary channel. Requests sent on a given channel will result in a * response on the same channel. */ /* * Sub-channel creation callback. This callback will be called in * process context when a sub-channel offer is received from the host. * The guest can open the sub-channel in the context of this callback. */ void (*sc_creation_callback)(struct vmbus_channel *new_sc); /* * Channel rescind callback. Some channels (the hvsock ones), need to * register a callback which is invoked in vmbus_onoffer_rescind(). */ void (*chn_rescind_callback)(struct vmbus_channel *channel); /* * All Sub-channels of a primary channel are linked here. */ struct list_head sc_list; /* * The primary channel this sub-channel belongs to. * This will be NULL for the primary channel. */ struct vmbus_channel *primary_channel; /* * Support per-channel state for use by vmbus drivers. */ void *per_channel_state; /* * Defer freeing channel until after all cpu's have * gone through grace period. */ struct rcu_head rcu; /* * For sysfs per-channel properties. */ struct kobject kobj; /* * For performance critical channels (storage, networking * etc,), Hyper-V has a mechanism to enhance the throughput * at the expense of latency: * When the host is to be signaled, we just set a bit in a shared page * and this bit will be inspected by the hypervisor within a certain * window and if the bit is set, the host will be signaled. The window * of time is the monitor latency - currently around 100 usecs. This * mechanism improves throughput by: * * A) Making the host more efficient - each time it wakes up, * potentially it will process morev number of packets. The * monitor latency allows a batch to build up. * B) By deferring the hypercall to signal, we will also minimize * the interrupts. * * Clearly, these optimizations improve throughput at the expense of * latency. Furthermore, since the channel is shared for both * control and data messages, control messages currently suffer * unnecessary latency adversely impacting performance and boot * time. To fix this issue, permit tagging the channel as being * in "low latency" mode. In this mode, we will bypass the monitor * mechanism. */ bool low_latency; bool probe_done; /* * Cache the device ID here for easy access; this is useful, in * particular, in situations where the channel's device_obj has * not been allocated/initialized yet. */ u16 device_id; /* * We must offload the handling of the primary/sub channels * from the single-threaded vmbus_connection.work_queue to * two different workqueue, otherwise we can block * vmbus_connection.work_queue and hang: see vmbus_process_offer(). */ struct work_struct add_channel_work; /* * Guest to host interrupts caused by the inbound ring buffer changing * from full to not full while a packet is waiting. */ u64 intr_in_full; /* * The total number of write operations that encountered a full * outbound ring buffer. */ u64 out_full_total; /* * The number of write operations that were the first to encounter a * full outbound ring buffer. */ u64 out_full_first; /* enabling/disabling fuzz testing on the channel (default is false)*/ bool fuzz_testing_state; /* * Interrupt delay will delay the guest from emptying the ring buffer * for a specific amount of time. The delay is in microseconds and will * be between 1 to a maximum of 1000, its default is 0 (no delay). * The Message delay will delay guest reading on a per message basis * in microseconds between 1 to 1000 with the default being 0 * (no delay). */ u32 fuzz_testing_interrupt_delay; u32 fuzz_testing_message_delay; /* callback to generate a request ID from a request address */ u64 (*next_request_id_callback)(struct vmbus_channel *channel, u64 rqst_addr); /* callback to retrieve a request address from a request ID */ u64 (*request_addr_callback)(struct vmbus_channel *channel, u64 rqst_id); /* request/transaction ids for VMBus */ struct vmbus_requestor requestor; u32 rqstor_size; /* The max size of a packet on this channel */ u32 max_pkt_size; }; u64 vmbus_next_request_id(struct vmbus_channel *channel, u64 rqst_addr); u64 vmbus_request_addr(struct vmbus_channel *channel, u64 trans_id); static inline bool is_hvsock_channel(const struct vmbus_channel *c) { return !!(c->offermsg.offer.chn_flags & VMBUS_CHANNEL_TLNPI_PROVIDER_OFFER); } static inline bool is_sub_channel(const struct vmbus_channel *c) { return c->offermsg.offer.sub_channel_index != 0; } static inline void set_channel_read_mode(struct vmbus_channel *c, enum hv_callback_mode mode) { c->callback_mode = mode; } static inline void set_per_channel_state(struct vmbus_channel *c, void *s) { c->per_channel_state = s; } static inline void *get_per_channel_state(struct vmbus_channel *c) { return c->per_channel_state; } static inline void set_channel_pending_send_size(struct vmbus_channel *c, u32 size) { unsigned long flags; if (size) { spin_lock_irqsave(&c->outbound.ring_lock, flags); ++c->out_full_total; if (!c->out_full_flag) { ++c->out_full_first; c->out_full_flag = true; } spin_unlock_irqrestore(&c->outbound.ring_lock, flags); } else { c->out_full_flag = false; } c->outbound.ring_buffer->pending_send_sz = size; } void vmbus_onmessage(struct vmbus_channel_message_header *hdr); int vmbus_request_offers(void); /* * APIs for managing sub-channels. */ void vmbus_set_sc_create_callback(struct vmbus_channel *primary_channel, void (*sc_cr_cb)(struct vmbus_channel *new_sc)); void vmbus_set_chn_rescind_callback(struct vmbus_channel *channel, void (*chn_rescind_cb)(struct vmbus_channel *)); /* * Check if sub-channels have already been offerred. This API will be useful * when the driver is unloaded after establishing sub-channels. In this case, * when the driver is re-loaded, the driver would have to check if the * subchannels have already been established before attempting to request * the creation of sub-channels. * This function returns TRUE to indicate that subchannels have already been * created. * This function should be invoked after setting the callback function for * sub-channel creation. */ bool vmbus_are_subchannels_present(struct vmbus_channel *primary); /* The format must be the same as struct vmdata_gpa_direct */ struct vmbus_channel_packet_page_buffer { u16 type; u16 dataoffset8; u16 length8; u16 flags; u64 transactionid; u32 reserved; u32 rangecount; struct hv_page_buffer range[MAX_PAGE_BUFFER_COUNT]; } __packed; /* The format must be the same as struct vmdata_gpa_direct */ struct vmbus_channel_packet_multipage_buffer { u16 type; u16 dataoffset8; u16 length8; u16 flags; u64 transactionid; u32 reserved; u32 rangecount; /* Always 1 in this case */ struct hv_multipage_buffer range; } __packed; /* The format must be the same as struct vmdata_gpa_direct */ struct vmbus_packet_mpb_array { u16 type; u16 dataoffset8; u16 length8; u16 flags; u64 transactionid; u32 reserved; u32 rangecount; /* Always 1 in this case */ struct hv_mpb_array range; } __packed; int vmbus_alloc_ring(struct vmbus_channel *channel, u32 send_size, u32 recv_size); void vmbus_free_ring(struct vmbus_channel *channel); int vmbus_connect_ring(struct vmbus_channel *channel, void (*onchannel_callback)(void *context), void *context); int vmbus_disconnect_ring(struct vmbus_channel *channel); extern int vmbus_open(struct vmbus_channel *channel, u32 send_ringbuffersize, u32 recv_ringbuffersize, void *userdata, u32 userdatalen, void (*onchannel_callback)(void *context), void *context); extern void vmbus_close(struct vmbus_channel *channel); extern int vmbus_sendpacket(struct vmbus_channel *channel, void *buffer, u32 bufferLen, u64 requestid, enum vmbus_packet_type type, u32 flags); extern int vmbus_sendpacket_pagebuffer(struct vmbus_channel *channel, struct hv_page_buffer pagebuffers[], u32 pagecount, void *buffer, u32 bufferlen, u64 requestid); extern int vmbus_sendpacket_mpb_desc(struct vmbus_channel *channel, struct vmbus_packet_mpb_array *mpb, u32 desc_size, void *buffer, u32 bufferlen, u64 requestid); extern int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer, u32 size, u32 *gpadl_handle); extern int vmbus_teardown_gpadl(struct vmbus_channel *channel, u32 gpadl_handle); void vmbus_reset_channel_cb(struct vmbus_channel *channel); extern int vmbus_recvpacket(struct vmbus_channel *channel, void *buffer, u32 bufferlen, u32 *buffer_actual_len, u64 *requestid); extern int vmbus_recvpacket_raw(struct vmbus_channel *channel, void *buffer, u32 bufferlen, u32 *buffer_actual_len, u64 *requestid); extern void vmbus_ontimer(unsigned long data); /* Base driver object */ struct hv_driver { const char *name; /* * A hvsock offer, which has a VMBUS_CHANNEL_TLNPI_PROVIDER_OFFER * channel flag, actually doesn't mean a synthetic device because the * offer's if_type/if_instance can change for every new hvsock * connection. * * However, to facilitate the notification of new-offer/rescind-offer * from vmbus driver to hvsock driver, we can handle hvsock offer as * a special vmbus device, and hence we need the below flag to * indicate if the driver is the hvsock driver or not: we need to * specially treat the hvosck offer & driver in vmbus_match(). */ bool hvsock; /* the device type supported by this driver */ guid_t dev_type; const struct hv_vmbus_device_id *id_table; struct device_driver driver; /* dynamic device GUID's */ struct { spinlock_t lock; struct list_head list; } dynids; int (*probe)(struct hv_device *, const struct hv_vmbus_device_id *); int (*remove)(struct hv_device *); void (*shutdown)(struct hv_device *); int (*suspend)(struct hv_device *); int (*resume)(struct hv_device *); }; /* Base device object */ struct hv_device { /* the device type id of this device */ guid_t dev_type; /* the device instance id of this device */ guid_t dev_instance; u16 vendor_id; u16 device_id; struct device device; char *driver_override; /* Driver name to force a match */ struct vmbus_channel *channel; struct kset *channels_kset; /* place holder to keep track of the dir for hv device in debugfs */ struct dentry *debug_dir; }; static inline struct hv_device *device_to_hv_device(struct device *d) { return container_of(d, struct hv_device, device); } static inline struct hv_driver *drv_to_hv_drv(struct device_driver *d) { return container_of(d, struct hv_driver, driver); } static inline void hv_set_drvdata(struct hv_device *dev, void *data) { dev_set_drvdata(&dev->device, data); } static inline void *hv_get_drvdata(struct hv_device *dev) { return dev_get_drvdata(&dev->device); } struct hv_ring_buffer_debug_info { u32 current_interrupt_mask; u32 current_read_index; u32 current_write_index; u32 bytes_avail_toread; u32 bytes_avail_towrite; }; int hv_ringbuffer_get_debuginfo(struct hv_ring_buffer_info *ring_info, struct hv_ring_buffer_debug_info *debug_info); bool hv_ringbuffer_spinlock_busy(struct vmbus_channel *channel); /* Vmbus interface */ #define vmbus_driver_register(driver) \ __vmbus_driver_register(driver, THIS_MODULE, KBUILD_MODNAME) int __must_check __vmbus_driver_register(struct hv_driver *hv_driver, struct module *owner, const char *mod_name); void vmbus_driver_unregister(struct hv_driver *hv_driver); void vmbus_hvsock_device_unregister(struct vmbus_channel *channel); int vmbus_allocate_mmio(struct resource **new, struct hv_device *device_obj, resource_size_t min, resource_size_t max, resource_size_t size, resource_size_t align, bool fb_overlap_ok); void vmbus_free_mmio(resource_size_t start, resource_size_t size); /* * GUID definitions of various offer types - services offered to the guest. */ /* * Network GUID * {f8615163-df3e-46c5-913f-f2d2f965ed0e} */ #define HV_NIC_GUID \ .guid = GUID_INIT(0xf8615163, 0xdf3e, 0x46c5, 0x91, 0x3f, \ 0xf2, 0xd2, 0xf9, 0x65, 0xed, 0x0e) /* * IDE GUID * {32412632-86cb-44a2-9b5c-50d1417354f5} */ #define HV_IDE_GUID \ .guid = GUID_INIT(0x32412632, 0x86cb, 0x44a2, 0x9b, 0x5c, \ 0x50, 0xd1, 0x41, 0x73, 0x54, 0xf5) /* * SCSI GUID * {ba6163d9-04a1-4d29-b605-72e2ffb1dc7f} */ #define HV_SCSI_GUID \ .guid = GUID_INIT(0xba6163d9, 0x04a1, 0x4d29, 0xb6, 0x05, \ 0x72, 0xe2, 0xff, 0xb1, 0xdc, 0x7f) /* * Shutdown GUID * {0e0b6031-5213-4934-818b-38d90ced39db} */ #define HV_SHUTDOWN_GUID \ .guid = GUID_INIT(0x0e0b6031, 0x5213, 0x4934, 0x81, 0x8b, \ 0x38, 0xd9, 0x0c, 0xed, 0x39, 0xdb) /* * Time Synch GUID * {9527E630-D0AE-497b-ADCE-E80AB0175CAF} */ #define HV_TS_GUID \ .guid = GUID_INIT(0x9527e630, 0xd0ae, 0x497b, 0xad, 0xce, \ 0xe8, 0x0a, 0xb0, 0x17, 0x5c, 0xaf) /* * Heartbeat GUID * {57164f39-9115-4e78-ab55-382f3bd5422d} */ #define HV_HEART_BEAT_GUID \ .guid = GUID_INIT(0x57164f39, 0x9115, 0x4e78, 0xab, 0x55, \ 0x38, 0x2f, 0x3b, 0xd5, 0x42, 0x2d) /* * KVP GUID * {a9a0f4e7-5a45-4d96-b827-8a841e8c03e6} */ #define HV_KVP_GUID \ .guid = GUID_INIT(0xa9a0f4e7, 0x5a45, 0x4d96, 0xb8, 0x27, \ 0x8a, 0x84, 0x1e, 0x8c, 0x03, 0xe6) /* * Dynamic memory GUID * {525074dc-8985-46e2-8057-a307dc18a502} */ #define HV_DM_GUID \ .guid = GUID_INIT(0x525074dc, 0x8985, 0x46e2, 0x80, 0x57, \ 0xa3, 0x07, 0xdc, 0x18, 0xa5, 0x02) /* * Mouse GUID * {cfa8b69e-5b4a-4cc0-b98b-8ba1a1f3f95a} */ #define HV_MOUSE_GUID \ .guid = GUID_INIT(0xcfa8b69e, 0x5b4a, 0x4cc0, 0xb9, 0x8b, \ 0x8b, 0xa1, 0xa1, 0xf3, 0xf9, 0x5a) /* * Keyboard GUID * {f912ad6d-2b17-48ea-bd65-f927a61c7684} */ #define HV_KBD_GUID \ .guid = GUID_INIT(0xf912ad6d, 0x2b17, 0x48ea, 0xbd, 0x65, \ 0xf9, 0x27, 0xa6, 0x1c, 0x76, 0x84) /* * VSS (Backup/Restore) GUID */ #define HV_VSS_GUID \ .guid = GUID_INIT(0x35fa2e29, 0xea23, 0x4236, 0x96, 0xae, \ 0x3a, 0x6e, 0xba, 0xcb, 0xa4, 0x40) /* * Synthetic Video GUID * {DA0A7802-E377-4aac-8E77-0558EB1073F8} */ #define HV_SYNTHVID_GUID \ .guid = GUID_INIT(0xda0a7802, 0xe377, 0x4aac, 0x8e, 0x77, \ 0x05, 0x58, 0xeb, 0x10, 0x73, 0xf8) /* * Synthetic FC GUID * {2f9bcc4a-0069-4af3-b76b-6fd0be528cda} */ #define HV_SYNTHFC_GUID \ .guid = GUID_INIT(0x2f9bcc4a, 0x0069, 0x4af3, 0xb7, 0x6b, \ 0x6f, 0xd0, 0xbe, 0x52, 0x8c, 0xda) /* * Guest File Copy Service * {34D14BE3-DEE4-41c8-9AE7-6B174977C192} */ #define HV_FCOPY_GUID \ .guid = GUID_INIT(0x34d14be3, 0xdee4, 0x41c8, 0x9a, 0xe7, \ 0x6b, 0x17, 0x49, 0x77, 0xc1, 0x92) /* * NetworkDirect. This is the guest RDMA service. * {8c2eaf3d-32a7-4b09-ab99-bd1f1c86b501} */ #define HV_ND_GUID \ .guid = GUID_INIT(0x8c2eaf3d, 0x32a7, 0x4b09, 0xab, 0x99, \ 0xbd, 0x1f, 0x1c, 0x86, 0xb5, 0x01) /* * PCI Express Pass Through * {44C4F61D-4444-4400-9D52-802E27EDE19F} */ #define HV_PCIE_GUID \ .guid = GUID_INIT(0x44c4f61d, 0x4444, 0x4400, 0x9d, 0x52, \ 0x80, 0x2e, 0x27, 0xed, 0xe1, 0x9f) /* * Linux doesn't support the 3 devices: the first two are for * Automatic Virtual Machine Activation, and the third is for * Remote Desktop Virtualization. * {f8e65716-3cb3-4a06-9a60-1889c5cccab5} * {3375baf4-9e15-4b30-b765-67acb10d607b} * {276aacf4-ac15-426c-98dd-7521ad3f01fe} */ #define HV_AVMA1_GUID \ .guid = GUID_INIT(0xf8e65716, 0x3cb3, 0x4a06, 0x9a, 0x60, \ 0x18, 0x89, 0xc5, 0xcc, 0xca, 0xb5) #define HV_AVMA2_GUID \ .guid = GUID_INIT(0x3375baf4, 0x9e15, 0x4b30, 0xb7, 0x65, \ 0x67, 0xac, 0xb1, 0x0d, 0x60, 0x7b) #define HV_RDV_GUID \ .guid = GUID_INIT(0x276aacf4, 0xac15, 0x426c, 0x98, 0xdd, \ 0x75, 0x21, 0xad, 0x3f, 0x01, 0xfe) /* * Common header for Hyper-V ICs */ #define ICMSGTYPE_NEGOTIATE 0 #define ICMSGTYPE_HEARTBEAT 1 #define ICMSGTYPE_KVPEXCHANGE 2 #define ICMSGTYPE_SHUTDOWN 3 #define ICMSGTYPE_TIMESYNC 4 #define ICMSGTYPE_VSS 5 #define ICMSGTYPE_FCOPY 7 #define ICMSGHDRFLAG_TRANSACTION 1 #define ICMSGHDRFLAG_REQUEST 2 #define ICMSGHDRFLAG_RESPONSE 4 /* * While we want to handle util services as regular devices, * there is only one instance of each of these services; so * we statically allocate the service specific state. */ struct hv_util_service { u8 *recv_buffer; void *channel; void (*util_cb)(void *); int (*util_init)(struct hv_util_service *); int (*util_init_transport)(void); void (*util_deinit)(void); int (*util_pre_suspend)(void); int (*util_pre_resume)(void); }; struct vmbuspipe_hdr { u32 flags; u32 msgsize; } __packed; struct ic_version { u16 major; u16 minor; } __packed; struct icmsg_hdr { struct ic_version icverframe; u16 icmsgtype; struct ic_version icvermsg; u16 icmsgsize; u32 status; u8 ictransaction_id; u8 icflags; u8 reserved[2]; } __packed; #define IC_VERSION_NEGOTIATION_MAX_VER_COUNT 100 #define ICMSG_HDR (sizeof(struct vmbuspipe_hdr) + sizeof(struct icmsg_hdr)) #define ICMSG_NEGOTIATE_PKT_SIZE(icframe_vercnt, icmsg_vercnt) \ (ICMSG_HDR + sizeof(struct icmsg_negotiate) + \ (((icframe_vercnt) + (icmsg_vercnt)) * sizeof(struct ic_version))) struct icmsg_negotiate { u16 icframe_vercnt; u16 icmsg_vercnt; u32 reserved; struct ic_version icversion_data[]; /* any size array */ } __packed; struct shutdown_msg_data { u32 reason_code; u32 timeout_seconds; u32 flags; u8 display_message[2048]; } __packed; struct heartbeat_msg_data { u64 seq_num; u32 reserved[8]; } __packed; /* Time Sync IC defs */ #define ICTIMESYNCFLAG_PROBE 0 #define ICTIMESYNCFLAG_SYNC 1 #define ICTIMESYNCFLAG_SAMPLE 2 #ifdef __x86_64__ #define WLTIMEDELTA 116444736000000000L /* in 100ns unit */ #else #define WLTIMEDELTA 116444736000000000LL #endif struct ictimesync_data { u64 parenttime; u64 childtime; u64 roundtriptime; u8 flags; } __packed; struct ictimesync_ref_data { u64 parenttime; u64 vmreferencetime; u8 flags; char leapflags; char stratum; u8 reserved[3]; } __packed; struct hyperv_service_callback { u8 msg_type; char *log_msg; guid_t data; struct vmbus_channel *channel; void (*callback)(void *context); }; #define MAX_SRV_VER 0x7ffffff extern bool vmbus_prep_negotiate_resp(struct icmsg_hdr *icmsghdrp, u8 *buf, u32 buflen, const int *fw_version, int fw_vercnt, const int *srv_version, int srv_vercnt, int *nego_fw_version, int *nego_srv_version); void hv_process_channel_removal(struct vmbus_channel *channel); void vmbus_setevent(struct vmbus_channel *channel); /* * Negotiated version with the Host. */ extern __u32 vmbus_proto_version; int vmbus_send_tl_connect_request(const guid_t *shv_guest_servie_id, const guid_t *shv_host_servie_id); int vmbus_send_modifychannel(struct vmbus_channel *channel, u32 target_vp); void vmbus_set_event(struct vmbus_channel *channel); /* Get the start of the ring buffer. */ static inline void * hv_get_ring_buffer(const struct hv_ring_buffer_info *ring_info) { return ring_info->ring_buffer->buffer; } /* * Mask off host interrupt callback notifications */ static inline void hv_begin_read(struct hv_ring_buffer_info *rbi) { rbi->ring_buffer->interrupt_mask = 1; /* make sure mask update is not reordered */ virt_mb(); } /* * Re-enable host callback and return number of outstanding bytes */ static inline u32 hv_end_read(struct hv_ring_buffer_info *rbi) { rbi->ring_buffer->interrupt_mask = 0; /* make sure mask update is not reordered */ virt_mb(); /* * Now check to see if the ring buffer is still empty. * If it is not, we raced and we need to process new * incoming messages. */ return hv_get_bytes_to_read(rbi); } /* * An API to support in-place processing of incoming VMBUS packets. */ /* Get data payload associated with descriptor */ static inline void *hv_pkt_data(const struct vmpacket_descriptor *desc) { return (void *)((unsigned long)desc + (desc->offset8 << 3)); } /* Get data size associated with descriptor */ static inline u32 hv_pkt_datalen(const struct vmpacket_descriptor *desc) { return (desc->len8 << 3) - (desc->offset8 << 3); } struct vmpacket_descriptor * hv_pkt_iter_first_raw(struct vmbus_channel *channel); struct vmpacket_descriptor * hv_pkt_iter_first(struct vmbus_channel *channel); struct vmpacket_descriptor * __hv_pkt_iter_next(struct vmbus_channel *channel, const struct vmpacket_descriptor *pkt, bool copy); void hv_pkt_iter_close(struct vmbus_channel *channel); static inline struct vmpacket_descriptor * hv_pkt_iter_next_pkt(struct vmbus_channel *channel, const struct vmpacket_descriptor *pkt, bool copy) { struct vmpacket_descriptor *nxt; nxt = __hv_pkt_iter_next(channel, pkt, copy); if (!nxt) hv_pkt_iter_close(channel); return nxt; } /* * Get next packet descriptor without copying it out of the ring buffer * If at end of list, return NULL and update host. */ static inline struct vmpacket_descriptor * hv_pkt_iter_next_raw(struct vmbus_channel *channel, const struct vmpacket_descriptor *pkt) { return hv_pkt_iter_next_pkt(channel, pkt, false); } /* * Get next packet descriptor from iterator * If at end of list, return NULL and update host. */ static inline struct vmpacket_descriptor * hv_pkt_iter_next(struct vmbus_channel *channel, const struct vmpacket_descriptor *pkt) { return hv_pkt_iter_next_pkt(channel, pkt, true); } #define foreach_vmbus_pkt(pkt, channel) \ for (pkt = hv_pkt_iter_first(channel); pkt; \ pkt = hv_pkt_iter_next(channel, pkt)) /* * Interface for passing data between SR-IOV PF and VF drivers. The VF driver * sends requests to read and write blocks. Each block must be 128 bytes or * smaller. Optionally, the VF driver can register a callback function which * will be invoked when the host says that one or more of the first 64 block * IDs is "invalid" which means that the VF driver should reread them. */ #define HV_CONFIG_BLOCK_SIZE_MAX 128 int hyperv_read_cfg_blk(struct pci_dev *dev, void *buf, unsigned int buf_len, unsigned int block_id, unsigned int *bytes_returned); int hyperv_write_cfg_blk(struct pci_dev *dev, void *buf, unsigned int len, unsigned int block_id); int hyperv_reg_block_invalidate(struct pci_dev *dev, void *context, void (*block_invalidate)(void *context, u64 block_mask)); struct hyperv_pci_block_ops { int (*read_block)(struct pci_dev *dev, void *buf, unsigned int buf_len, unsigned int block_id, unsigned int *bytes_returned); int (*write_block)(struct pci_dev *dev, void *buf, unsigned int len, unsigned int block_id); int (*reg_blk_invalidate)(struct pci_dev *dev, void *context, void (*block_invalidate)(void *context, u64 block_mask)); }; extern struct hyperv_pci_block_ops hvpci_block_ops; static inline unsigned long virt_to_hvpfn(void *addr) { phys_addr_t paddr; if (is_vmalloc_addr(addr)) paddr = page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr); else paddr = __pa(addr); return paddr >> HV_HYP_PAGE_SHIFT; } #define NR_HV_HYP_PAGES_IN_PAGE (PAGE_SIZE / HV_HYP_PAGE_SIZE) #define offset_in_hvpage(ptr) ((unsigned long)(ptr) & ~HV_HYP_PAGE_MASK) #define HVPFN_UP(x) (((x) + HV_HYP_PAGE_SIZE-1) >> HV_HYP_PAGE_SHIFT) #define HVPFN_DOWN(x) ((x) >> HV_HYP_PAGE_SHIFT) #define page_to_hvpfn(page) (page_to_pfn(page) * NR_HV_HYP_PAGES_IN_PAGE) #endif /* _HYPERV_H */ PK ! ~<��� � page-isolation.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PAGEISOLATION_H #define __LINUX_PAGEISOLATION_H #ifdef CONFIG_MEMORY_ISOLATION static inline bool has_isolate_pageblock(struct zone *zone) { return zone->nr_isolate_pageblock; } static inline bool is_migrate_isolate_page(struct page *page) { return get_pageblock_migratetype(page) == MIGRATE_ISOLATE; } static inline bool is_migrate_isolate(int migratetype) { return migratetype == MIGRATE_ISOLATE; } #else static inline bool has_isolate_pageblock(struct zone *zone) { return false; } static inline bool is_migrate_isolate_page(struct page *page) { return false; } static inline bool is_migrate_isolate(int migratetype) { return false; } #endif #define MEMORY_OFFLINE 0x1 #define REPORT_FAILURE 0x2 struct page *has_unmovable_pages(struct zone *zone, struct page *page, int migratetype, int flags); void set_pageblock_migratetype(struct page *page, int migratetype); int move_freepages_block(struct zone *zone, struct page *page, int migratetype, int *num_movable); /* * Changes migrate type in [start_pfn, end_pfn) to be MIGRATE_ISOLATE. */ int start_isolate_page_range(unsigned long start_pfn, unsigned long end_pfn, unsigned migratetype, int flags); /* * Changes MIGRATE_ISOLATE to MIGRATE_MOVABLE. * target range is [start_pfn, end_pfn) */ void undo_isolate_page_range(unsigned long start_pfn, unsigned long end_pfn, unsigned migratetype); /* * Test all pages in [start_pfn, end_pfn) are isolated or not. */ int test_pages_isolated(unsigned long start_pfn, unsigned long end_pfn, int isol_flags); struct page *alloc_migrate_target(struct page *page, unsigned long private); #endif PK ! �V� time32.hnu �[��� #ifndef _LINUX_TIME32_H #define _LINUX_TIME32_H /* * These are all interfaces based on the old time_t definition * that overflows in 2038 on 32-bit architectures. New code * should use the replacements based on time64_t and timespec64. * * Any interfaces in here that become unused as we migrate * code to time64_t should get removed. */ #include <linux/time64.h> #include <linux/timex.h> #include <vdso/time32.h> struct old_itimerspec32 { struct old_timespec32 it_interval; struct old_timespec32 it_value; }; struct old_utimbuf32 { old_time32_t actime; old_time32_t modtime; }; struct old_timex32 { u32 modes; s32 offset; s32 freq; s32 maxerror; s32 esterror; s32 status; s32 constant; s32 precision; s32 tolerance; struct old_timeval32 time; s32 tick; s32 ppsfreq; s32 jitter; s32 shift; s32 stabil; s32 jitcnt; s32 calcnt; s32 errcnt; s32 stbcnt; s32 tai; s32:32; s32:32; s32:32; s32:32; s32:32; s32:32; s32:32; s32:32; s32:32; s32:32; s32:32; }; extern int get_old_timespec32(struct timespec64 *, const void __user *); extern int put_old_timespec32(const struct timespec64 *, void __user *); extern int get_old_itimerspec32(struct itimerspec64 *its, const struct old_itimerspec32 __user *uits); extern int put_old_itimerspec32(const struct itimerspec64 *its, struct old_itimerspec32 __user *uits); struct __kernel_timex; int get_old_timex32(struct __kernel_timex *, const struct old_timex32 __user *); int put_old_timex32(struct old_timex32 __user *, const struct __kernel_timex *); /** * ns_to_kernel_old_timeval - Convert nanoseconds to timeval * @nsec: the nanoseconds value to be converted * * Returns the timeval representation of the nsec parameter. */ extern struct __kernel_old_timeval ns_to_kernel_old_timeval(s64 nsec); #endif PK ! ���P� � devfreq_cooling.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * devfreq_cooling: Thermal cooling device implementation for devices using * devfreq * * Copyright (C) 2014-2015 ARM Limited * */ #ifndef __DEVFREQ_COOLING_H__ #define __DEVFREQ_COOLING_H__ #include <linux/devfreq.h> #include <linux/thermal.h> /** * struct devfreq_cooling_power - Devfreq cooling power ops * @get_real_power: When this is set, the framework uses it to ask the * device driver for the actual power. * Some devices have more sophisticated methods * (like power counters) to approximate the actual power * that they use. * This function provides more accurate data to the * thermal governor. When the driver does not provide * such function, framework just uses pre-calculated * table and scale the power by 'utilization' * (based on 'busy_time' and 'total_time' taken from * devfreq 'last_status'). * The value returned by this function must be lower * or equal than the maximum power value * for the current state * (which can be found in power_table[state]). * When this interface is used, the power_table holds * max total (static + dynamic) power value for each OPP. */ struct devfreq_cooling_power { int (*get_real_power)(struct devfreq *df, u32 *power, unsigned long freq, unsigned long voltage); }; #ifdef CONFIG_DEVFREQ_THERMAL struct thermal_cooling_device * of_devfreq_cooling_register_power(struct device_node *np, struct devfreq *df, struct devfreq_cooling_power *dfc_power); struct thermal_cooling_device * of_devfreq_cooling_register(struct device_node *np, struct devfreq *df); struct thermal_cooling_device *devfreq_cooling_register(struct devfreq *df); void devfreq_cooling_unregister(struct thermal_cooling_device *dfc); struct thermal_cooling_device * devfreq_cooling_em_register(struct devfreq *df, struct devfreq_cooling_power *dfc_power); #else /* !CONFIG_DEVFREQ_THERMAL */ static inline struct thermal_cooling_device * of_devfreq_cooling_register_power(struct device_node *np, struct devfreq *df, struct devfreq_cooling_power *dfc_power) { return ERR_PTR(-EINVAL); } static inline struct thermal_cooling_device * of_devfreq_cooling_register(struct device_node *np, struct devfreq *df) { return ERR_PTR(-EINVAL); } static inline struct thermal_cooling_device * devfreq_cooling_register(struct devfreq *df) { return ERR_PTR(-EINVAL); } static inline struct thermal_cooling_device * devfreq_cooling_em_register(struct devfreq *df, struct devfreq_cooling_power *dfc_power) { return ERR_PTR(-EINVAL); } static inline void devfreq_cooling_unregister(struct thermal_cooling_device *dfc) { } #endif /* CONFIG_DEVFREQ_THERMAL */ #endif /* __DEVFREQ_COOLING_H__ */ PK ! �I;� � sys.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SYS_H #define _LINUX_SYS_H /* * This file is no longer used or needed */ /* * These are system calls that will be removed at some time * due to newer versions existing.. * (please be careful - ibcs2 may need some of these). */ #ifdef notdef #define _sys_waitpid _sys_old_syscall /* _sys_wait4 */ #define _sys_olduname _sys_old_syscall /* _sys_newuname */ #define _sys_uname _sys_old_syscall /* _sys_newuname */ #define _sys_stat _sys_old_syscall /* _sys_newstat */ #define _sys_fstat _sys_old_syscall /* _sys_newfstat */ #define _sys_lstat _sys_old_syscall /* _sys_newlstat */ #define _sys_signal _sys_old_syscall /* _sys_sigaction */ #define _sys_sgetmask _sys_old_syscall /* _sys_sigprocmask */ #define _sys_ssetmask _sys_old_syscall /* _sys_sigprocmask */ #endif /* * These are system calls that haven't been implemented yet * but have an entry in the table for future expansion.. */ #endif PK ! "�ǎ � cleancache.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_CLEANCACHE_H #define _LINUX_CLEANCACHE_H #include <linux/fs.h> #include <linux/exportfs.h> #include <linux/mm.h> #define CLEANCACHE_NO_POOL -1 #define CLEANCACHE_NO_BACKEND -2 #define CLEANCACHE_NO_BACKEND_SHARED -3 #define CLEANCACHE_KEY_MAX 6 /* * cleancache requires every file with a page in cleancache to have a * unique key unless/until the file is removed/truncated. For some * filesystems, the inode number is unique, but for "modern" filesystems * an exportable filehandle is required (see exportfs.h) */ struct cleancache_filekey { union { ino_t ino; __u32 fh[CLEANCACHE_KEY_MAX]; u32 key[CLEANCACHE_KEY_MAX]; } u; }; struct cleancache_ops { int (*init_fs)(size_t); int (*init_shared_fs)(uuid_t *uuid, size_t); int (*get_page)(int, struct cleancache_filekey, pgoff_t, struct page *); void (*put_page)(int, struct cleancache_filekey, pgoff_t, struct page *); void (*invalidate_page)(int, struct cleancache_filekey, pgoff_t); void (*invalidate_inode)(int, struct cleancache_filekey); void (*invalidate_fs)(int); }; extern int cleancache_register_ops(const struct cleancache_ops *ops); extern void __cleancache_init_fs(struct super_block *); extern void __cleancache_init_shared_fs(struct super_block *); extern int __cleancache_get_page(struct page *); extern void __cleancache_put_page(struct page *); extern void __cleancache_invalidate_page(struct address_space *, struct page *); extern void __cleancache_invalidate_inode(struct address_space *); extern void __cleancache_invalidate_fs(struct super_block *); #ifdef CONFIG_CLEANCACHE #define cleancache_enabled (1) static inline bool cleancache_fs_enabled_mapping(struct address_space *mapping) { return mapping->host->i_sb->cleancache_poolid >= 0; } static inline bool cleancache_fs_enabled(struct page *page) { return cleancache_fs_enabled_mapping(page->mapping); } #else #define cleancache_enabled (0) #define cleancache_fs_enabled(_page) (0) #define cleancache_fs_enabled_mapping(_page) (0) #endif /* * The shim layer provided by these inline functions allows the compiler * to reduce all cleancache hooks to nothingness if CONFIG_CLEANCACHE * is disabled, to a single global variable check if CONFIG_CLEANCACHE * is enabled but no cleancache "backend" has dynamically enabled it, * and, for the most frequent cleancache ops, to a single global variable * check plus a superblock element comparison if CONFIG_CLEANCACHE is enabled * and a cleancache backend has dynamically enabled cleancache, but the * filesystem referenced by that cleancache op has not enabled cleancache. * As a result, CONFIG_CLEANCACHE can be enabled by default with essentially * no measurable performance impact. */ static inline void cleancache_init_fs(struct super_block *sb) { if (cleancache_enabled) __cleancache_init_fs(sb); } static inline void cleancache_init_shared_fs(struct super_block *sb) { if (cleancache_enabled) __cleancache_init_shared_fs(sb); } static inline int cleancache_get_page(struct page *page) { if (cleancache_enabled && cleancache_fs_enabled(page)) return __cleancache_get_page(page); return -1; } static inline void cleancache_put_page(struct page *page) { if (cleancache_enabled && cleancache_fs_enabled(page)) __cleancache_put_page(page); } static inline void cleancache_invalidate_page(struct address_space *mapping, struct page *page) { /* careful... page->mapping is NULL sometimes when this is called */ if (cleancache_enabled && cleancache_fs_enabled_mapping(mapping)) __cleancache_invalidate_page(mapping, page); } static inline void cleancache_invalidate_inode(struct address_space *mapping) { if (cleancache_enabled && cleancache_fs_enabled_mapping(mapping)) __cleancache_invalidate_inode(mapping); } static inline void cleancache_invalidate_fs(struct super_block *sb) { if (cleancache_enabled) __cleancache_invalidate_fs(sb); } #endif /* _LINUX_CLEANCACHE_H */ PK ! ��9 pldmfw.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (C) 2018-2019, Intel Corporation. */ #ifndef _PLDMFW_H_ #define _PLDMFW_H_ #include <linux/list.h> #include <linux/firmware.h> #define PLDM_DEVICE_UPDATE_CONTINUE_AFTER_FAIL BIT(0) #define PLDM_STRING_TYPE_UNKNOWN 0 #define PLDM_STRING_TYPE_ASCII 1 #define PLDM_STRING_TYPE_UTF8 2 #define PLDM_STRING_TYPE_UTF16 3 #define PLDM_STRING_TYPE_UTF16LE 4 #define PLDM_STRING_TYPE_UTF16BE 5 struct pldmfw_record { struct list_head entry; /* List of descriptor TLVs */ struct list_head descs; /* Component Set version string*/ const u8 *version_string; u8 version_type; u8 version_len; /* Package Data length */ u16 package_data_len; /* Bitfield of Device Update Flags */ u32 device_update_flags; /* Package Data block */ const u8 *package_data; /* Bitmap of components applicable to this record */ unsigned long *component_bitmap; u16 component_bitmap_len; }; /* Standard descriptor TLV identifiers */ #define PLDM_DESC_ID_PCI_VENDOR_ID 0x0000 #define PLDM_DESC_ID_IANA_ENTERPRISE_ID 0x0001 #define PLDM_DESC_ID_UUID 0x0002 #define PLDM_DESC_ID_PNP_VENDOR_ID 0x0003 #define PLDM_DESC_ID_ACPI_VENDOR_ID 0x0004 #define PLDM_DESC_ID_PCI_DEVICE_ID 0x0100 #define PLDM_DESC_ID_PCI_SUBVENDOR_ID 0x0101 #define PLDM_DESC_ID_PCI_SUBDEV_ID 0x0102 #define PLDM_DESC_ID_PCI_REVISION_ID 0x0103 #define PLDM_DESC_ID_PNP_PRODUCT_ID 0x0104 #define PLDM_DESC_ID_ACPI_PRODUCT_ID 0x0105 #define PLDM_DESC_ID_VENDOR_DEFINED 0xFFFF struct pldmfw_desc_tlv { struct list_head entry; const u8 *data; u16 type; u16 size; }; #define PLDM_CLASSIFICATION_UNKNOWN 0x0000 #define PLDM_CLASSIFICATION_OTHER 0x0001 #define PLDM_CLASSIFICATION_DRIVER 0x0002 #define PLDM_CLASSIFICATION_CONFIG_SW 0x0003 #define PLDM_CLASSIFICATION_APP_SW 0x0004 #define PLDM_CLASSIFICATION_INSTRUMENTATION 0x0005 #define PLDM_CLASSIFICATION_BIOS 0x0006 #define PLDM_CLASSIFICATION_DIAGNOSTIC_SW 0x0007 #define PLDM_CLASSIFICATION_OS 0x0008 #define PLDM_CLASSIFICATION_MIDDLEWARE 0x0009 #define PLDM_CLASSIFICATION_FIRMWARE 0x000A #define PLDM_CLASSIFICATION_CODE 0x000B #define PLDM_CLASSIFICATION_SERVICE_PACK 0x000C #define PLDM_CLASSIFICATION_SOFTWARE_BUNDLE 0x000D #define PLDM_ACTIVATION_METHOD_AUTO BIT(0) #define PLDM_ACTIVATION_METHOD_SELF_CONTAINED BIT(1) #define PLDM_ACTIVATION_METHOD_MEDIUM_SPECIFIC BIT(2) #define PLDM_ACTIVATION_METHOD_REBOOT BIT(3) #define PLDM_ACTIVATION_METHOD_DC_CYCLE BIT(4) #define PLDM_ACTIVATION_METHOD_AC_CYCLE BIT(5) #define PLDMFW_COMPONENT_OPTION_FORCE_UPDATE BIT(0) #define PLDMFW_COMPONENT_OPTION_USE_COMPARISON_STAMP BIT(1) struct pldmfw_component { struct list_head entry; /* component identifier */ u16 classification; u16 identifier; u16 options; u16 activation_method; u32 comparison_stamp; u32 component_size; const u8 *component_data; /* Component version string */ const u8 *version_string; u8 version_type; u8 version_len; /* component index */ u8 index; }; /* Transfer flag used for sending components to the firmware */ #define PLDM_TRANSFER_FLAG_START BIT(0) #define PLDM_TRANSFER_FLAG_MIDDLE BIT(1) #define PLDM_TRANSFER_FLAG_END BIT(2) struct pldmfw_ops; /* Main entry point to the PLDM firmware update engine. Device drivers * should embed this in a private structure and use container_of to obtain * a pointer to their own data, used to implement the device specific * operations. */ struct pldmfw { const struct pldmfw_ops *ops; struct device *dev; }; bool pldmfw_op_pci_match_record(struct pldmfw *context, struct pldmfw_record *record); /* Operations invoked by the generic PLDM firmware update engine. Used to * implement device specific logic. * * @match_record: check if the device matches the given record. For * convenience, a standard implementation is provided for PCI devices. * * @send_package_data: send the package data associated with the matching * record to firmware. * * @send_component_table: send the component data associated with a given * component to firmware. Called once for each applicable component. * * @flash_component: Flash the data for a given component to the device. * Called once for each applicable component, after all component tables have * been sent. * * @finalize_update: (optional) Finish the update. Called after all components * have been flashed. */ struct pldmfw_ops { bool (*match_record)(struct pldmfw *context, struct pldmfw_record *record); int (*send_package_data)(struct pldmfw *context, const u8 *data, u16 length); int (*send_component_table)(struct pldmfw *context, struct pldmfw_component *component, u8 transfer_flag); int (*flash_component)(struct pldmfw *context, struct pldmfw_component *component); int (*finalize_update)(struct pldmfw *context); }; int pldmfw_flash_image(struct pldmfw *context, const struct firmware *fw); #endif PK ! V��;9 9 stdarg.hnu �[��� // SPDX-License-Identifier: GPL-2.0-or-later #ifndef _LINUX_STDARG_H #define _LINUX_STDARG_H typedef __builtin_va_list va_list; #define va_start(v, l) __builtin_va_start(v, l) #define va_end(v) __builtin_va_end(v) #define va_arg(v, T) __builtin_va_arg(v, T) #define va_copy(d, s) __builtin_va_copy(d, s) #endif PK ! d00� � btrfs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BTRFS_H #define _LINUX_BTRFS_H #include <uapi/linux/btrfs.h> #endif /* _LINUX_BTRFS_H */ PK ! �c�� � attribute_container.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * attribute_container.h - a generic container for all classes * * Copyright (c) 2005 - James Bottomley <James.Bottomley@steeleye.com> */ #ifndef _ATTRIBUTE_CONTAINER_H_ #define _ATTRIBUTE_CONTAINER_H_ #include <linux/list.h> #include <linux/klist.h> struct device; struct attribute_container { struct list_head node; struct klist containers; struct class *class; const struct attribute_group *grp; struct device_attribute **attrs; int (*match)(struct attribute_container *, struct device *); #define ATTRIBUTE_CONTAINER_NO_CLASSDEVS 0x01 unsigned long flags; }; static inline int attribute_container_no_classdevs(struct attribute_container *atc) { return atc->flags & ATTRIBUTE_CONTAINER_NO_CLASSDEVS; } static inline void attribute_container_set_no_classdevs(struct attribute_container *atc) { atc->flags |= ATTRIBUTE_CONTAINER_NO_CLASSDEVS; } int attribute_container_register(struct attribute_container *cont); int __must_check attribute_container_unregister(struct attribute_container *cont); void attribute_container_create_device(struct device *dev, int (*fn)(struct attribute_container *, struct device *, struct device *)); void attribute_container_add_device(struct device *dev, int (*fn)(struct attribute_container *, struct device *, struct device *)); void attribute_container_remove_device(struct device *dev, void (*fn)(struct attribute_container *, struct device *, struct device *)); void attribute_container_device_trigger(struct device *dev, int (*fn)(struct attribute_container *, struct device *, struct device *)); int attribute_container_device_trigger_safe(struct device *dev, int (*fn)(struct attribute_container *, struct device *, struct device *), int (*undo)(struct attribute_container *, struct device *, struct device *)); void attribute_container_trigger(struct device *dev, int (*fn)(struct attribute_container *, struct device *)); int attribute_container_add_attrs(struct device *classdev); int attribute_container_add_class_device(struct device *classdev); int attribute_container_add_class_device_adapter(struct attribute_container *cont, struct device *dev, struct device *classdev); void attribute_container_remove_attrs(struct device *classdev); void attribute_container_class_device_del(struct device *classdev); struct attribute_container *attribute_container_classdev_to_container(struct device *); struct device *attribute_container_find_class_device(struct attribute_container *, struct device *); struct device_attribute **attribute_container_classdev_to_attrs(const struct device *classdev); #endif PK ! it( ( dmapool.hnu �[��� /* * include/linux/dmapool.h * * Allocation pools for DMAable (coherent) memory. * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef LINUX_DMAPOOL_H #define LINUX_DMAPOOL_H #include <linux/scatterlist.h> #include <asm/io.h> struct device; #ifdef CONFIG_HAS_DMA struct dma_pool *dma_pool_create(const char *name, struct device *dev, size_t size, size_t align, size_t allocation); void dma_pool_destroy(struct dma_pool *pool); void *dma_pool_alloc(struct dma_pool *pool, gfp_t mem_flags, dma_addr_t *handle); void dma_pool_free(struct dma_pool *pool, void *vaddr, dma_addr_t addr); /* * Managed DMA pool */ struct dma_pool *dmam_pool_create(const char *name, struct device *dev, size_t size, size_t align, size_t allocation); void dmam_pool_destroy(struct dma_pool *pool); #else /* !CONFIG_HAS_DMA */ static inline struct dma_pool *dma_pool_create(const char *name, struct device *dev, size_t size, size_t align, size_t allocation) { return NULL; } static inline void dma_pool_destroy(struct dma_pool *pool) { } static inline void *dma_pool_alloc(struct dma_pool *pool, gfp_t mem_flags, dma_addr_t *handle) { return NULL; } static inline void dma_pool_free(struct dma_pool *pool, void *vaddr, dma_addr_t addr) { } static inline struct dma_pool *dmam_pool_create(const char *name, struct device *dev, size_t size, size_t align, size_t allocation) { return NULL; } static inline void dmam_pool_destroy(struct dma_pool *pool) { } #endif /* !CONFIG_HAS_DMA */ static inline void *dma_pool_zalloc(struct dma_pool *pool, gfp_t mem_flags, dma_addr_t *handle) { return dma_pool_alloc(pool, mem_flags | __GFP_ZERO, handle); } #endif PK ! {R�?C� C� dmaengine.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. */ #ifndef LINUX_DMAENGINE_H #define LINUX_DMAENGINE_H #include <linux/device.h> #include <linux/err.h> #include <linux/uio.h> #include <linux/bug.h> #include <linux/scatterlist.h> #include <linux/bitmap.h> #include <linux/types.h> #include <asm/page.h> /** * typedef dma_cookie_t - an opaque DMA cookie * * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code */ typedef s32 dma_cookie_t; #define DMA_MIN_COOKIE 1 static inline int dma_submit_error(dma_cookie_t cookie) { return cookie < 0 ? cookie : 0; } /** * enum dma_status - DMA transaction status * @DMA_COMPLETE: transaction completed * @DMA_IN_PROGRESS: transaction not yet processed * @DMA_PAUSED: transaction is paused * @DMA_ERROR: transaction failed */ enum dma_status { DMA_COMPLETE, DMA_IN_PROGRESS, DMA_PAUSED, DMA_ERROR, DMA_OUT_OF_ORDER, }; /** * enum dma_transaction_type - DMA transaction types/indexes * * Note: The DMA_ASYNC_TX capability is not to be set by drivers. It is * automatically set as dma devices are registered. */ enum dma_transaction_type { DMA_MEMCPY, DMA_XOR, DMA_PQ, DMA_XOR_VAL, DMA_PQ_VAL, DMA_MEMSET, DMA_MEMSET_SG, DMA_INTERRUPT, DMA_PRIVATE, DMA_ASYNC_TX, DMA_SLAVE, DMA_CYCLIC, DMA_INTERLEAVE, DMA_COMPLETION_NO_ORDER, DMA_REPEAT, DMA_LOAD_EOT, /* last transaction type for creation of the capabilities mask */ DMA_TX_TYPE_END, }; /** * enum dma_transfer_direction - dma transfer mode and direction indicator * @DMA_MEM_TO_MEM: Async/Memcpy mode * @DMA_MEM_TO_DEV: Slave mode & From Memory to Device * @DMA_DEV_TO_MEM: Slave mode & From Device to Memory * @DMA_DEV_TO_DEV: Slave mode & From Device to Device */ enum dma_transfer_direction { DMA_MEM_TO_MEM, DMA_MEM_TO_DEV, DMA_DEV_TO_MEM, DMA_DEV_TO_DEV, DMA_TRANS_NONE, }; /** * Interleaved Transfer Request * ---------------------------- * A chunk is collection of contiguous bytes to be transferred. * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). * ICGs may or may not change between chunks. * A FRAME is the smallest series of contiguous {chunk,icg} pairs, * that when repeated an integral number of times, specifies the transfer. * A transfer template is specification of a Frame, the number of times * it is to be repeated and other per-transfer attributes. * * Practically, a client driver would have ready a template for each * type of transfer it is going to need during its lifetime and * set only 'src_start' and 'dst_start' before submitting the requests. * * * | Frame-1 | Frame-2 | ~ | Frame-'numf' | * |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...| * * == Chunk size * ... ICG */ /** * struct data_chunk - Element of scatter-gather list that makes a frame. * @size: Number of bytes to read from source. * size_dst := fn(op, size_src), so doesn't mean much for destination. * @icg: Number of bytes to jump after last src/dst address of this * chunk and before first src/dst address for next chunk. * Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false. * Ignored for src(assumed 0), if src_inc is true and src_sgl is false. * @dst_icg: Number of bytes to jump after last dst address of this * chunk and before the first dst address for next chunk. * Ignored if dst_inc is true and dst_sgl is false. * @src_icg: Number of bytes to jump after last src address of this * chunk and before the first src address for next chunk. * Ignored if src_inc is true and src_sgl is false. */ struct data_chunk { size_t size; size_t icg; size_t dst_icg; size_t src_icg; }; /** * struct dma_interleaved_template - Template to convey DMAC the transfer pattern * and attributes. * @src_start: Bus address of source for the first chunk. * @dst_start: Bus address of destination for the first chunk. * @dir: Specifies the type of Source and Destination. * @src_inc: If the source address increments after reading from it. * @dst_inc: If the destination address increments after writing to it. * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read). * Otherwise, source is read contiguously (icg ignored). * Ignored if src_inc is false. * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write). * Otherwise, destination is filled contiguously (icg ignored). * Ignored if dst_inc is false. * @numf: Number of frames in this template. * @frame_size: Number of chunks in a frame i.e, size of sgl[]. * @sgl: Array of {chunk,icg} pairs that make up a frame. */ struct dma_interleaved_template { dma_addr_t src_start; dma_addr_t dst_start; enum dma_transfer_direction dir; bool src_inc; bool dst_inc; bool src_sgl; bool dst_sgl; size_t numf; size_t frame_size; struct data_chunk sgl[]; }; /** * enum dma_ctrl_flags - DMA flags to augment operation preparation, * control completion, and communicate status. * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of * this transaction * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client * acknowledges receipt, i.e. has a chance to establish any dependency * chains * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as * sources that were the result of a previous operation, in the case of a PQ * operation it continues the calculation with new sources * @DMA_PREP_FENCE - tell the driver that subsequent operations depend * on the result of this operation * @DMA_CTRL_REUSE: client can reuse the descriptor and submit again till * cleared or freed * @DMA_PREP_CMD: tell the driver that the data passed to DMA API is command * data and the descriptor should be in different format from normal * data descriptors. * @DMA_PREP_REPEAT: tell the driver that the transaction shall be automatically * repeated when it ends until a transaction is issued on the same channel * with the DMA_PREP_LOAD_EOT flag set. This flag is only applicable to * interleaved transactions and is ignored for all other transaction types. * @DMA_PREP_LOAD_EOT: tell the driver that the transaction shall replace any * active repeated (as indicated by DMA_PREP_REPEAT) transaction when the * repeated transaction ends. Not setting this flag when the previously queued * transaction is marked with DMA_PREP_REPEAT will cause the new transaction * to never be processed and stay in the issued queue forever. The flag is * ignored if the previous transaction is not a repeated transaction. */ enum dma_ctrl_flags { DMA_PREP_INTERRUPT = (1 << 0), DMA_CTRL_ACK = (1 << 1), DMA_PREP_PQ_DISABLE_P = (1 << 2), DMA_PREP_PQ_DISABLE_Q = (1 << 3), DMA_PREP_CONTINUE = (1 << 4), DMA_PREP_FENCE = (1 << 5), DMA_CTRL_REUSE = (1 << 6), DMA_PREP_CMD = (1 << 7), DMA_PREP_REPEAT = (1 << 8), DMA_PREP_LOAD_EOT = (1 << 9), }; /** * enum sum_check_bits - bit position of pq_check_flags */ enum sum_check_bits { SUM_CHECK_P = 0, SUM_CHECK_Q = 1, }; /** * enum pq_check_flags - result of async_{xor,pq}_zero_sum operations * @SUM_CHECK_P_RESULT - 1 if xor zero sum error, 0 otherwise * @SUM_CHECK_Q_RESULT - 1 if reed-solomon zero sum error, 0 otherwise */ enum sum_check_flags { SUM_CHECK_P_RESULT = (1 << SUM_CHECK_P), SUM_CHECK_Q_RESULT = (1 << SUM_CHECK_Q), }; /** * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t. * See linux/cpumask.h */ typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; /** * enum dma_desc_metadata_mode - per descriptor metadata mode types supported * @DESC_METADATA_CLIENT - the metadata buffer is allocated/provided by the * client driver and it is attached (via the dmaengine_desc_attach_metadata() * helper) to the descriptor. * * Client drivers interested to use this mode can follow: * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: * 1. prepare the descriptor (dmaengine_prep_*) * construct the metadata in the client's buffer * 2. use dmaengine_desc_attach_metadata() to attach the buffer to the * descriptor * 3. submit the transfer * - DMA_DEV_TO_MEM: * 1. prepare the descriptor (dmaengine_prep_*) * 2. use dmaengine_desc_attach_metadata() to attach the buffer to the * descriptor * 3. submit the transfer * 4. when the transfer is completed, the metadata should be available in the * attached buffer * * @DESC_METADATA_ENGINE - the metadata buffer is allocated/managed by the DMA * driver. The client driver can ask for the pointer, maximum size and the * currently used size of the metadata and can directly update or read it. * dmaengine_desc_get_metadata_ptr() and dmaengine_desc_set_metadata_len() is * provided as helper functions. * * Note: the metadata area for the descriptor is no longer valid after the * transfer has been completed (valid up to the point when the completion * callback returns if used). * * Client drivers interested to use this mode can follow: * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: * 1. prepare the descriptor (dmaengine_prep_*) * 2. use dmaengine_desc_get_metadata_ptr() to get the pointer to the engine's * metadata area * 3. update the metadata at the pointer * 4. use dmaengine_desc_set_metadata_len() to tell the DMA engine the amount * of data the client has placed into the metadata buffer * 5. submit the transfer * - DMA_DEV_TO_MEM: * 1. prepare the descriptor (dmaengine_prep_*) * 2. submit the transfer * 3. on transfer completion, use dmaengine_desc_get_metadata_ptr() to get the * pointer to the engine's metadata area * 4. Read out the metadata from the pointer * * Note: the two mode is not compatible and clients must use one mode for a * descriptor. */ enum dma_desc_metadata_mode { DESC_METADATA_NONE = 0, DESC_METADATA_CLIENT = BIT(0), DESC_METADATA_ENGINE = BIT(1), }; /** * struct dma_chan_percpu - the per-CPU part of struct dma_chan * @memcpy_count: transaction counter * @bytes_transferred: byte counter */ struct dma_chan_percpu { /* stats */ unsigned long memcpy_count; unsigned long bytes_transferred; }; /** * struct dma_router - DMA router structure * @dev: pointer to the DMA router device * @route_free: function to be called when the route can be disconnected */ struct dma_router { struct device *dev; void (*route_free)(struct device *dev, void *route_data); }; /** * struct dma_chan - devices supply DMA channels, clients use them * @device: ptr to the dma device who supplies this channel, always !%NULL * @slave: ptr to the device using this channel * @cookie: last cookie value returned to client * @completed_cookie: last completed cookie for this channel * @chan_id: channel ID for sysfs * @dev: class device for sysfs * @name: backlink name for sysfs * @dbg_client_name: slave name for debugfs in format: * dev_name(requester's dev):channel name, for example: "2b00000.mcasp:tx" * @device_node: used to add this to the device chan list * @local: per-cpu pointer to a struct dma_chan_percpu * @client_count: how many clients are using this channel * @table_count: number of appearances in the mem-to-mem allocation table * @router: pointer to the DMA router structure * @route_data: channel specific data for the router * @private: private data for certain client-channel associations */ struct dma_chan { struct dma_device *device; struct device *slave; dma_cookie_t cookie; dma_cookie_t completed_cookie; /* sysfs */ int chan_id; struct dma_chan_dev *dev; const char *name; #ifdef CONFIG_DEBUG_FS char *dbg_client_name; #endif struct list_head device_node; struct dma_chan_percpu __percpu *local; int client_count; int table_count; /* DMA router */ struct dma_router *router; void *route_data; void *private; }; /** * struct dma_chan_dev - relate sysfs device node to backing channel device * @chan: driver channel device * @device: sysfs device * @dev_id: parent dma_device dev_id * @chan_dma_dev: The channel is using custom/different dma-mapping * compared to the parent dma_device */ struct dma_chan_dev { struct dma_chan *chan; struct device device; int dev_id; bool chan_dma_dev; }; /** * enum dma_slave_buswidth - defines bus width of the DMA slave * device, source or target buses */ enum dma_slave_buswidth { DMA_SLAVE_BUSWIDTH_UNDEFINED = 0, DMA_SLAVE_BUSWIDTH_1_BYTE = 1, DMA_SLAVE_BUSWIDTH_2_BYTES = 2, DMA_SLAVE_BUSWIDTH_3_BYTES = 3, DMA_SLAVE_BUSWIDTH_4_BYTES = 4, DMA_SLAVE_BUSWIDTH_8_BYTES = 8, DMA_SLAVE_BUSWIDTH_16_BYTES = 16, DMA_SLAVE_BUSWIDTH_32_BYTES = 32, DMA_SLAVE_BUSWIDTH_64_BYTES = 64, DMA_SLAVE_BUSWIDTH_128_BYTES = 128, }; /** * struct dma_slave_config - dma slave channel runtime config * @direction: whether the data shall go in or out on this slave * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are * legal values. DEPRECATED, drivers should use the direction argument * to the device_prep_slave_sg and device_prep_dma_cyclic functions or * the dir field in the dma_interleaved_template structure. * @src_addr: this is the physical address where DMA slave data * should be read (RX), if the source is memory this argument is * ignored. * @dst_addr: this is the physical address where DMA slave data * should be written (TX), if the source is memory this argument * is ignored. * @src_addr_width: this is the width in bytes of the source (RX) * register where DMA data shall be read. If the source * is memory this may be ignored depending on architecture. * Legal values: 1, 2, 3, 4, 8, 16, 32, 64, 128. * @dst_addr_width: same as src_addr_width but for destination * target (TX) mutatis mutandis. * @src_maxburst: the maximum number of words (note: words, as in * units of the src_addr_width member, not bytes) that can be sent * in one burst to the device. Typically something like half the * FIFO depth on I/O peripherals so you don't overflow it. This * may or may not be applicable on memory sources. * @dst_maxburst: same as src_maxburst but for destination target * mutatis mutandis. * @src_port_window_size: The length of the register area in words the data need * to be accessed on the device side. It is only used for devices which is using * an area instead of a single register to receive the data. Typically the DMA * loops in this area in order to transfer the data. * @dst_port_window_size: same as src_port_window_size but for the destination * port. * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill * with 'true' if peripheral should be flow controller. Direction will be * selected at Runtime. * @slave_id: Slave requester id. Only valid for slave channels. The dma * slave peripheral will have unique id as dma requester which need to be * pass as slave config. * @peripheral_config: peripheral configuration for programming peripheral * for dmaengine transfer * @peripheral_size: peripheral configuration buffer size * * This struct is passed in as configuration data to a DMA engine * in order to set up a certain channel for DMA transport at runtime. * The DMA device/engine has to provide support for an additional * callback in the dma_device structure, device_config and this struct * will then be passed in as an argument to the function. * * The rationale for adding configuration information to this struct is as * follows: if it is likely that more than one DMA slave controllers in * the world will support the configuration option, then make it generic. * If not: if it is fixed so that it be sent in static from the platform * data, then prefer to do that. */ struct dma_slave_config { enum dma_transfer_direction direction; phys_addr_t src_addr; phys_addr_t dst_addr; enum dma_slave_buswidth src_addr_width; enum dma_slave_buswidth dst_addr_width; u32 src_maxburst; u32 dst_maxburst; u32 src_port_window_size; u32 dst_port_window_size; bool device_fc; unsigned int slave_id; void *peripheral_config; size_t peripheral_size; }; /** * enum dma_residue_granularity - Granularity of the reported transfer residue * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The * DMA channel is only able to tell whether a descriptor has been completed or * not, which means residue reporting is not supported by this channel. The * residue field of the dma_tx_state field will always be 0. * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully * completed segment of the transfer (For cyclic transfers this is after each * period). This is typically implemented by having the hardware generate an * interrupt after each transferred segment and then the drivers updates the * outstanding residue by the size of the segment. Another possibility is if * the hardware supports scatter-gather and the segment descriptor has a field * which gets set after the segment has been completed. The driver then counts * the number of segments without the flag set to compute the residue. * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred * burst. This is typically only supported if the hardware has a progress * register of some sort (E.g. a register with the current read/write address * or a register with the amount of bursts/beats/bytes that have been * transferred or still need to be transferred). */ enum dma_residue_granularity { DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0, DMA_RESIDUE_GRANULARITY_SEGMENT = 1, DMA_RESIDUE_GRANULARITY_BURST = 2, }; /** * struct dma_slave_caps - expose capabilities of a slave channel only * @src_addr_widths: bit mask of src addr widths the channel supports. * Width is specified in bytes, e.g. for a channel supporting * a width of 4 the mask should have BIT(4) set. * @dst_addr_widths: bit mask of dst addr widths the channel supports * @directions: bit mask of slave directions the channel supports. * Since the enum dma_transfer_direction is not defined as bit flag for * each type, the dma controller should set BIT(<TYPE>) and same * should be checked by controller as well * @min_burst: min burst capability per-transfer * @max_burst: max burst capability per-transfer * @max_sg_burst: max number of SG list entries executed in a single burst * DMA tansaction with no software intervention for reinitialization. * Zero value means unlimited number of entries. * @cmd_pause: true, if pause is supported (i.e. for reading residue or * for resume later) * @cmd_resume: true, if resume is supported * @cmd_terminate: true, if terminate cmd is supported * @residue_granularity: granularity of the reported transfer residue * @descriptor_reuse: if a descriptor can be reused by client and * resubmitted multiple times */ struct dma_slave_caps { u32 src_addr_widths; u32 dst_addr_widths; u32 directions; u32 min_burst; u32 max_burst; u32 max_sg_burst; bool cmd_pause; bool cmd_resume; bool cmd_terminate; enum dma_residue_granularity residue_granularity; bool descriptor_reuse; }; static inline const char *dma_chan_name(struct dma_chan *chan) { return dev_name(&chan->dev->device); } void dma_chan_cleanup(struct kref *kref); /** * typedef dma_filter_fn - callback filter for dma_request_channel * @chan: channel to be reviewed * @filter_param: opaque parameter passed through dma_request_channel * * When this optional parameter is specified in a call to dma_request_channel a * suitable channel is passed to this routine for further dispositioning before * being returned. Where 'suitable' indicates a non-busy channel that * satisfies the given capability mask. It returns 'true' to indicate that the * channel is suitable. */ typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); typedef void (*dma_async_tx_callback)(void *dma_async_param); enum dmaengine_tx_result { DMA_TRANS_NOERROR = 0, /* SUCCESS */ DMA_TRANS_READ_FAILED, /* Source DMA read failed */ DMA_TRANS_WRITE_FAILED, /* Destination DMA write failed */ DMA_TRANS_ABORTED, /* Op never submitted / aborted */ }; struct dmaengine_result { enum dmaengine_tx_result result; u32 residue; }; typedef void (*dma_async_tx_callback_result)(void *dma_async_param, const struct dmaengine_result *result); struct dmaengine_unmap_data { #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) u16 map_cnt; #else u8 map_cnt; #endif u8 to_cnt; u8 from_cnt; u8 bidi_cnt; struct device *dev; struct kref kref; size_t len; dma_addr_t addr[]; }; struct dma_async_tx_descriptor; struct dma_descriptor_metadata_ops { int (*attach)(struct dma_async_tx_descriptor *desc, void *data, size_t len); void *(*get_ptr)(struct dma_async_tx_descriptor *desc, size_t *payload_len, size_t *max_len); int (*set_len)(struct dma_async_tx_descriptor *desc, size_t payload_len); }; /** * struct dma_async_tx_descriptor - async transaction descriptor * ---dma generic offload fields--- * @cookie: tracking cookie for this transaction, set to -EBUSY if * this tx is sitting on a dependency list * @flags: flags to augment operation preparation, control completion, and * communicate status * @phys: physical address of the descriptor * @chan: target channel for this operation * @tx_submit: accept the descriptor, assign ordered cookie and mark the * descriptor pending. To be pushed on .issue_pending() call * @callback: routine to call after this operation is complete * @callback_param: general parameter to pass to the callback routine * @desc_metadata_mode: core managed metadata mode to protect mixed use of * DESC_METADATA_CLIENT or DESC_METADATA_ENGINE. Otherwise * DESC_METADATA_NONE * @metadata_ops: DMA driver provided metadata mode ops, need to be set by the * DMA driver if metadata mode is supported with the descriptor * ---async_tx api specific fields--- * @next: at completion submit this descriptor * @parent: pointer to the next level up in the dependency chain * @lock: protect the parent and next pointers */ struct dma_async_tx_descriptor { dma_cookie_t cookie; enum dma_ctrl_flags flags; /* not a 'long' to pack with cookie */ dma_addr_t phys; struct dma_chan *chan; dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx); int (*desc_free)(struct dma_async_tx_descriptor *tx); dma_async_tx_callback callback; dma_async_tx_callback_result callback_result; void *callback_param; struct dmaengine_unmap_data *unmap; enum dma_desc_metadata_mode desc_metadata_mode; struct dma_descriptor_metadata_ops *metadata_ops; #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH struct dma_async_tx_descriptor *next; struct dma_async_tx_descriptor *parent; spinlock_t lock; #endif }; #ifdef CONFIG_DMA_ENGINE static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx, struct dmaengine_unmap_data *unmap) { kref_get(&unmap->kref); tx->unmap = unmap; } struct dmaengine_unmap_data * dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags); void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap); #else static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx, struct dmaengine_unmap_data *unmap) { } static inline struct dmaengine_unmap_data * dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) { return NULL; } static inline void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) { } #endif static inline void dma_descriptor_unmap(struct dma_async_tx_descriptor *tx) { if (!tx->unmap) return; dmaengine_unmap_put(tx->unmap); tx->unmap = NULL; } #ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH static inline void txd_lock(struct dma_async_tx_descriptor *txd) { } static inline void txd_unlock(struct dma_async_tx_descriptor *txd) { } static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next) { BUG(); } static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd) { } static inline void txd_clear_next(struct dma_async_tx_descriptor *txd) { } static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd) { return NULL; } static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd) { return NULL; } #else static inline void txd_lock(struct dma_async_tx_descriptor *txd) { spin_lock_bh(&txd->lock); } static inline void txd_unlock(struct dma_async_tx_descriptor *txd) { spin_unlock_bh(&txd->lock); } static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next) { txd->next = next; next->parent = txd; } static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd) { txd->parent = NULL; } static inline void txd_clear_next(struct dma_async_tx_descriptor *txd) { txd->next = NULL; } static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd) { return txd->parent; } static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd) { return txd->next; } #endif /** * struct dma_tx_state - filled in to report the status of * a transfer. * @last: last completed DMA cookie * @used: last issued DMA cookie (i.e. the one in progress) * @residue: the remaining number of bytes left to transmit * on the selected transfer for states DMA_IN_PROGRESS and * DMA_PAUSED if this is implemented in the driver, else 0 * @in_flight_bytes: amount of data in bytes cached by the DMA. */ struct dma_tx_state { dma_cookie_t last; dma_cookie_t used; u32 residue; u32 in_flight_bytes; }; /** * enum dmaengine_alignment - defines alignment of the DMA async tx * buffers */ enum dmaengine_alignment { DMAENGINE_ALIGN_1_BYTE = 0, DMAENGINE_ALIGN_2_BYTES = 1, DMAENGINE_ALIGN_4_BYTES = 2, DMAENGINE_ALIGN_8_BYTES = 3, DMAENGINE_ALIGN_16_BYTES = 4, DMAENGINE_ALIGN_32_BYTES = 5, DMAENGINE_ALIGN_64_BYTES = 6, DMAENGINE_ALIGN_128_BYTES = 7, DMAENGINE_ALIGN_256_BYTES = 8, }; /** * struct dma_slave_map - associates slave device and it's slave channel with * parameter to be used by a filter function * @devname: name of the device * @slave: slave channel name * @param: opaque parameter to pass to struct dma_filter.fn */ struct dma_slave_map { const char *devname; const char *slave; void *param; }; /** * struct dma_filter - information for slave device/channel to filter_fn/param * mapping * @fn: filter function callback * @mapcnt: number of slave device/channel in the map * @map: array of channel to filter mapping data */ struct dma_filter { dma_filter_fn fn; int mapcnt; const struct dma_slave_map *map; }; /** * struct dma_device - info on the entity supplying DMA services * @chancnt: how many DMA channels are supported * @privatecnt: how many DMA channels are requested by dma_request_channel * @channels: the list of struct dma_chan * @global_node: list_head for global dma_device_list * @filter: information for device/slave to filter function/param mapping * @cap_mask: one or more dma_capability flags * @desc_metadata_modes: supported metadata modes by the DMA device * @max_xor: maximum number of xor sources, 0 if no capability * @max_pq: maximum number of PQ sources and PQ-continue capability * @copy_align: alignment shift for memcpy operations * @xor_align: alignment shift for xor operations * @pq_align: alignment shift for pq operations * @fill_align: alignment shift for memset operations * @dev_id: unique device ID * @dev: struct device reference for dma mapping api * @owner: owner module (automatically set based on the provided dev) * @src_addr_widths: bit mask of src addr widths the device supports * Width is specified in bytes, e.g. for a device supporting * a width of 4 the mask should have BIT(4) set. * @dst_addr_widths: bit mask of dst addr widths the device supports * @directions: bit mask of slave directions the device supports. * Since the enum dma_transfer_direction is not defined as bit flag for * each type, the dma controller should set BIT(<TYPE>) and same * should be checked by controller as well * @min_burst: min burst capability per-transfer * @max_burst: max burst capability per-transfer * @max_sg_burst: max number of SG list entries executed in a single burst * DMA tansaction with no software intervention for reinitialization. * Zero value means unlimited number of entries. * @residue_granularity: granularity of the transfer residue reported * by tx_status * @device_alloc_chan_resources: allocate resources and return the * number of allocated descriptors * @device_router_config: optional callback for DMA router configuration * @device_free_chan_resources: release DMA channel's resources * @device_prep_dma_memcpy: prepares a memcpy operation * @device_prep_dma_xor: prepares a xor operation * @device_prep_dma_xor_val: prepares a xor validation operation * @device_prep_dma_pq: prepares a pq operation * @device_prep_dma_pq_val: prepares a pqzero_sum operation * @device_prep_dma_memset: prepares a memset operation * @device_prep_dma_memset_sg: prepares a memset operation over a scatter list * @device_prep_dma_interrupt: prepares an end of chain interrupt operation * @device_prep_slave_sg: prepares a slave dma operation * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. * The function takes a buffer of size buf_len. The callback function will * be called after period_len bytes have been transferred. * @device_prep_interleaved_dma: Transfer expression in a generic way. * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address * @device_caps: May be used to override the generic DMA slave capabilities * with per-channel specific ones * @device_config: Pushes a new configuration to a channel, return 0 or an error * code * @device_pause: Pauses any transfer happening on a channel. Returns * 0 or an error code * @device_resume: Resumes any transfer on a channel previously * paused. Returns 0 or an error code * @device_terminate_all: Aborts all transfers on a channel. Returns 0 * or an error code * @device_synchronize: Synchronizes the termination of a transfers to the * current context. * @device_tx_status: poll for transaction completion, the optional * txstate parameter can be supplied with a pointer to get a * struct with auxiliary transfer status information, otherwise the call * will just return a simple status code * @device_issue_pending: push pending transactions to hardware * @descriptor_reuse: a submitted transfer can be resubmitted after completion * @device_release: called sometime atfer dma_async_device_unregister() is * called and there are no further references to this structure. This * must be implemented to free resources however many existing drivers * do not and are therefore not safe to unbind while in use. * @dbg_summary_show: optional routine to show contents in debugfs; default code * will be used when this is omitted, but custom code can show extra, * controller specific information. */ struct dma_device { struct kref ref; unsigned int chancnt; unsigned int privatecnt; struct list_head channels; struct list_head global_node; struct dma_filter filter; dma_cap_mask_t cap_mask; enum dma_desc_metadata_mode desc_metadata_modes; unsigned short max_xor; unsigned short max_pq; enum dmaengine_alignment copy_align; enum dmaengine_alignment xor_align; enum dmaengine_alignment pq_align; enum dmaengine_alignment fill_align; #define DMA_HAS_PQ_CONTINUE (1 << 15) int dev_id; struct device *dev; struct module *owner; struct ida chan_ida; struct mutex chan_mutex; /* to protect chan_ida */ u32 src_addr_widths; u32 dst_addr_widths; u32 directions; u32 min_burst; u32 max_burst; u32 max_sg_burst; bool descriptor_reuse; enum dma_residue_granularity residue_granularity; int (*device_alloc_chan_resources)(struct dma_chan *chan); int (*device_router_config)(struct dma_chan *chan); void (*device_free_chan_resources)(struct dma_chan *chan); struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( struct dma_chan *chan, dma_addr_t dst, dma_addr_t src, size_t len, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_xor)( struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, unsigned int src_cnt, size_t len, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)( struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, size_t len, enum sum_check_flags *result, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_pq)( struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_pq_val)( struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, enum sum_check_flags *pqres, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_memset)( struct dma_chan *chan, dma_addr_t dest, int value, size_t len, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_memset_sg)( struct dma_chan *chan, struct scatterlist *sg, unsigned int nents, int value, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( struct dma_chan *chan, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_slave_sg)( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context); struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)( struct dma_chan *chan, dma_addr_t dst, u64 data, unsigned long flags); void (*device_caps)(struct dma_chan *chan, struct dma_slave_caps *caps); int (*device_config)(struct dma_chan *chan, struct dma_slave_config *config); int (*device_pause)(struct dma_chan *chan); int (*device_resume)(struct dma_chan *chan); int (*device_terminate_all)(struct dma_chan *chan); void (*device_synchronize)(struct dma_chan *chan); enum dma_status (*device_tx_status)(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate); void (*device_issue_pending)(struct dma_chan *chan); void (*device_release)(struct dma_device *dev); /* debugfs support */ void (*dbg_summary_show)(struct seq_file *s, struct dma_device *dev); struct dentry *dbg_dev_root; }; static inline int dmaengine_slave_config(struct dma_chan *chan, struct dma_slave_config *config) { if (chan->device->device_config) return chan->device->device_config(chan, config); return -ENOSYS; } static inline bool is_slave_direction(enum dma_transfer_direction direction) { return (direction == DMA_MEM_TO_DEV) || (direction == DMA_DEV_TO_MEM) || (direction == DMA_DEV_TO_DEV); } static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single( struct dma_chan *chan, dma_addr_t buf, size_t len, enum dma_transfer_direction dir, unsigned long flags) { struct scatterlist sg; sg_init_table(&sg, 1); sg_dma_address(&sg) = buf; sg_dma_len(&sg) = len; if (!chan || !chan->device || !chan->device->device_prep_slave_sg) return NULL; return chan->device->device_prep_slave_sg(chan, &sg, 1, dir, flags, NULL); } static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long flags) { if (!chan || !chan->device || !chan->device->device_prep_slave_sg) return NULL; return chan->device->device_prep_slave_sg(chan, sgl, sg_len, dir, flags, NULL); } #ifdef CONFIG_RAPIDIO_DMA_ENGINE struct rio_dma_ext; static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long flags, struct rio_dma_ext *rio_ext) { if (!chan || !chan->device || !chan->device->device_prep_slave_sg) return NULL; return chan->device->device_prep_slave_sg(chan, sgl, sg_len, dir, flags, rio_ext); } #endif static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction dir, unsigned long flags) { if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic) return NULL; return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len, period_len, dir, flags); } static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma( struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags) { if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma) return NULL; if (flags & DMA_PREP_REPEAT && !test_bit(DMA_REPEAT, chan->device->cap_mask.bits)) return NULL; return chan->device->device_prep_interleaved_dma(chan, xt, flags); } static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset( struct dma_chan *chan, dma_addr_t dest, int value, size_t len, unsigned long flags) { if (!chan || !chan->device || !chan->device->device_prep_dma_memset) return NULL; return chan->device->device_prep_dma_memset(chan, dest, value, len, flags); } static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) { if (!chan || !chan->device || !chan->device->device_prep_dma_memcpy) return NULL; return chan->device->device_prep_dma_memcpy(chan, dest, src, len, flags); } static inline bool dmaengine_is_metadata_mode_supported(struct dma_chan *chan, enum dma_desc_metadata_mode mode) { if (!chan) return false; return !!(chan->device->desc_metadata_modes & mode); } #ifdef CONFIG_DMA_ENGINE int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc, void *data, size_t len); void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc, size_t *payload_len, size_t *max_len); int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc, size_t payload_len); #else /* CONFIG_DMA_ENGINE */ static inline int dmaengine_desc_attach_metadata( struct dma_async_tx_descriptor *desc, void *data, size_t len) { return -EINVAL; } static inline void *dmaengine_desc_get_metadata_ptr( struct dma_async_tx_descriptor *desc, size_t *payload_len, size_t *max_len) { return NULL; } static inline int dmaengine_desc_set_metadata_len( struct dma_async_tx_descriptor *desc, size_t payload_len) { return -EINVAL; } #endif /* CONFIG_DMA_ENGINE */ /** * dmaengine_terminate_all() - Terminate all active DMA transfers * @chan: The channel for which to terminate the transfers * * This function is DEPRECATED use either dmaengine_terminate_sync() or * dmaengine_terminate_async() instead. */ static inline int dmaengine_terminate_all(struct dma_chan *chan) { if (chan->device->device_terminate_all) return chan->device->device_terminate_all(chan); return -ENOSYS; } /** * dmaengine_terminate_async() - Terminate all active DMA transfers * @chan: The channel for which to terminate the transfers * * Calling this function will terminate all active and pending descriptors * that have previously been submitted to the channel. It is not guaranteed * though that the transfer for the active descriptor has stopped when the * function returns. Furthermore it is possible the complete callback of a * submitted transfer is still running when this function returns. * * dmaengine_synchronize() needs to be called before it is safe to free * any memory that is accessed by previously submitted descriptors or before * freeing any resources accessed from within the completion callback of any * previously submitted descriptors. * * This function can be called from atomic context as well as from within a * complete callback of a descriptor submitted on the same channel. * * If none of the two conditions above apply consider using * dmaengine_terminate_sync() instead. */ static inline int dmaengine_terminate_async(struct dma_chan *chan) { if (chan->device->device_terminate_all) return chan->device->device_terminate_all(chan); return -EINVAL; } /** * dmaengine_synchronize() - Synchronize DMA channel termination * @chan: The channel to synchronize * * Synchronizes to the DMA channel termination to the current context. When this * function returns it is guaranteed that all transfers for previously issued * descriptors have stopped and it is safe to free the memory associated * with them. Furthermore it is guaranteed that all complete callback functions * for a previously submitted descriptor have finished running and it is safe to * free resources accessed from within the complete callbacks. * * The behavior of this function is undefined if dma_async_issue_pending() has * been called between dmaengine_terminate_async() and this function. * * This function must only be called from non-atomic context and must not be * called from within a complete callback of a descriptor submitted on the same * channel. */ static inline void dmaengine_synchronize(struct dma_chan *chan) { might_sleep(); if (chan->device->device_synchronize) chan->device->device_synchronize(chan); } /** * dmaengine_terminate_sync() - Terminate all active DMA transfers * @chan: The channel for which to terminate the transfers * * Calling this function will terminate all active and pending transfers * that have previously been submitted to the channel. It is similar to * dmaengine_terminate_async() but guarantees that the DMA transfer has actually * stopped and that all complete callbacks have finished running when the * function returns. * * This function must only be called from non-atomic context and must not be * called from within a complete callback of a descriptor submitted on the same * channel. */ static inline int dmaengine_terminate_sync(struct dma_chan *chan) { int ret; ret = dmaengine_terminate_async(chan); if (ret) return ret; dmaengine_synchronize(chan); return 0; } static inline int dmaengine_pause(struct dma_chan *chan) { if (chan->device->device_pause) return chan->device->device_pause(chan); return -ENOSYS; } static inline int dmaengine_resume(struct dma_chan *chan) { if (chan->device->device_resume) return chan->device->device_resume(chan); return -ENOSYS; } static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *state) { return chan->device->device_tx_status(chan, cookie, state); } static inline dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) { return desc->tx_submit(desc); } static inline bool dmaengine_check_align(enum dmaengine_alignment align, size_t off1, size_t off2, size_t len) { return !(((1 << align) - 1) & (off1 | off2 | len)); } static inline bool is_dma_copy_aligned(struct dma_device *dev, size_t off1, size_t off2, size_t len) { return dmaengine_check_align(dev->copy_align, off1, off2, len); } static inline bool is_dma_xor_aligned(struct dma_device *dev, size_t off1, size_t off2, size_t len) { return dmaengine_check_align(dev->xor_align, off1, off2, len); } static inline bool is_dma_pq_aligned(struct dma_device *dev, size_t off1, size_t off2, size_t len) { return dmaengine_check_align(dev->pq_align, off1, off2, len); } static inline bool is_dma_fill_aligned(struct dma_device *dev, size_t off1, size_t off2, size_t len) { return dmaengine_check_align(dev->fill_align, off1, off2, len); } static inline void dma_set_maxpq(struct dma_device *dma, int maxpq, int has_pq_continue) { dma->max_pq = maxpq; if (has_pq_continue) dma->max_pq |= DMA_HAS_PQ_CONTINUE; } static inline bool dmaf_continue(enum dma_ctrl_flags flags) { return (flags & DMA_PREP_CONTINUE) == DMA_PREP_CONTINUE; } static inline bool dmaf_p_disabled_continue(enum dma_ctrl_flags flags) { enum dma_ctrl_flags mask = DMA_PREP_CONTINUE | DMA_PREP_PQ_DISABLE_P; return (flags & mask) == mask; } static inline bool dma_dev_has_pq_continue(struct dma_device *dma) { return (dma->max_pq & DMA_HAS_PQ_CONTINUE) == DMA_HAS_PQ_CONTINUE; } static inline unsigned short dma_dev_to_maxpq(struct dma_device *dma) { return dma->max_pq & ~DMA_HAS_PQ_CONTINUE; } /* dma_maxpq - reduce maxpq in the face of continued operations * @dma - dma device with PQ capability * @flags - to check if DMA_PREP_CONTINUE and DMA_PREP_PQ_DISABLE_P are set * * When an engine does not support native continuation we need 3 extra * source slots to reuse P and Q with the following coefficients: * 1/ {00} * P : remove P from Q', but use it as a source for P' * 2/ {01} * Q : use Q to continue Q' calculation * 3/ {00} * Q : subtract Q from P' to cancel (2) * * In the case where P is disabled we only need 1 extra source: * 1/ {01} * Q : use Q to continue Q' calculation */ static inline int dma_maxpq(struct dma_device *dma, enum dma_ctrl_flags flags) { if (dma_dev_has_pq_continue(dma) || !dmaf_continue(flags)) return dma_dev_to_maxpq(dma); if (dmaf_p_disabled_continue(flags)) return dma_dev_to_maxpq(dma) - 1; if (dmaf_continue(flags)) return dma_dev_to_maxpq(dma) - 3; BUG(); } static inline size_t dmaengine_get_icg(bool inc, bool sgl, size_t icg, size_t dir_icg) { if (inc) { if (dir_icg) return dir_icg; if (sgl) return icg; } return 0; } static inline size_t dmaengine_get_dst_icg(struct dma_interleaved_template *xt, struct data_chunk *chunk) { return dmaengine_get_icg(xt->dst_inc, xt->dst_sgl, chunk->icg, chunk->dst_icg); } static inline size_t dmaengine_get_src_icg(struct dma_interleaved_template *xt, struct data_chunk *chunk) { return dmaengine_get_icg(xt->src_inc, xt->src_sgl, chunk->icg, chunk->src_icg); } /* --- public DMA engine API --- */ #ifdef CONFIG_DMA_ENGINE void dmaengine_get(void); void dmaengine_put(void); #else static inline void dmaengine_get(void) { } static inline void dmaengine_put(void) { } #endif #ifdef CONFIG_ASYNC_TX_DMA #define async_dmaengine_get() dmaengine_get() #define async_dmaengine_put() dmaengine_put() #ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH #define async_dma_find_channel(type) dma_find_channel(DMA_ASYNC_TX) #else #define async_dma_find_channel(type) dma_find_channel(type) #endif /* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH */ #else static inline void async_dmaengine_get(void) { } static inline void async_dmaengine_put(void) { } static inline struct dma_chan * async_dma_find_channel(enum dma_transaction_type type) { return NULL; } #endif /* CONFIG_ASYNC_TX_DMA */ void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, struct dma_chan *chan); static inline void async_tx_ack(struct dma_async_tx_descriptor *tx) { tx->flags |= DMA_CTRL_ACK; } static inline void async_tx_clear_ack(struct dma_async_tx_descriptor *tx) { tx->flags &= ~DMA_CTRL_ACK; } static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx) { return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; } #define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask)) static inline void __dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) { set_bit(tx_type, dstp->bits); } #define dma_cap_clear(tx, mask) __dma_cap_clear((tx), &(mask)) static inline void __dma_cap_clear(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) { clear_bit(tx_type, dstp->bits); } #define dma_cap_zero(mask) __dma_cap_zero(&(mask)) static inline void __dma_cap_zero(dma_cap_mask_t *dstp) { bitmap_zero(dstp->bits, DMA_TX_TYPE_END); } #define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask)) static inline int __dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp) { return test_bit(tx_type, srcp->bits); } #define for_each_dma_cap_mask(cap, mask) \ for_each_set_bit(cap, mask.bits, DMA_TX_TYPE_END) /** * dma_async_issue_pending - flush pending transactions to HW * @chan: target DMA channel * * This allows drivers to push copies to HW in batches, * reducing MMIO writes where possible. */ static inline void dma_async_issue_pending(struct dma_chan *chan) { chan->device->device_issue_pending(chan); } /** * dma_async_is_tx_complete - poll for transaction completion * @chan: DMA channel * @cookie: transaction identifier to check status of * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * * If @last and @used are passed in, upon return they reflect the driver * internal state and can be used with dma_async_is_complete() to check * the status of multiple cookies without re-checking hardware state. */ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) { struct dma_tx_state state; enum dma_status status; status = chan->device->device_tx_status(chan, cookie, &state); if (last) *last = state.last; if (used) *used = state.used; return status; } /** * dma_async_is_complete - test a cookie against chan state * @cookie: transaction identifier to test status of * @last_complete: last know completed transaction * @last_used: last cookie value handed out * * dma_async_is_complete() is used in dma_async_is_tx_complete() * the test logic is separated for lightweight testing of multiple cookies */ static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, dma_cookie_t last_complete, dma_cookie_t last_used) { if (last_complete <= last_used) { if ((cookie <= last_complete) || (cookie > last_used)) return DMA_COMPLETE; } else { if ((cookie <= last_complete) && (cookie > last_used)) return DMA_COMPLETE; } return DMA_IN_PROGRESS; } static inline void dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) { if (!st) return; st->last = last; st->used = used; st->residue = residue; } #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); void dma_issue_pending_all(void); struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param, struct device_node *np); struct dma_chan *dma_request_chan(struct device *dev, const char *name); struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask); void dma_release_channel(struct dma_chan *chan); int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps); #else static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) { return NULL; } static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) { return DMA_COMPLETE; } static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) { return DMA_COMPLETE; } static inline void dma_issue_pending_all(void) { } static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param, struct device_node *np) { return NULL; } static inline struct dma_chan *dma_request_chan(struct device *dev, const char *name) { return ERR_PTR(-ENODEV); } static inline struct dma_chan *dma_request_chan_by_mask( const dma_cap_mask_t *mask) { return ERR_PTR(-ENODEV); } static inline void dma_release_channel(struct dma_chan *chan) { } static inline int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) { return -ENXIO; } #endif static inline int dmaengine_desc_set_reuse(struct dma_async_tx_descriptor *tx) { struct dma_slave_caps caps; int ret; ret = dma_get_slave_caps(tx->chan, &caps); if (ret) return ret; if (!caps.descriptor_reuse) return -EPERM; tx->flags |= DMA_CTRL_REUSE; return 0; } static inline void dmaengine_desc_clear_reuse(struct dma_async_tx_descriptor *tx) { tx->flags &= ~DMA_CTRL_REUSE; } static inline bool dmaengine_desc_test_reuse(struct dma_async_tx_descriptor *tx) { return (tx->flags & DMA_CTRL_REUSE) == DMA_CTRL_REUSE; } static inline int dmaengine_desc_free(struct dma_async_tx_descriptor *desc) { /* this is supported for reusable desc, so check that */ if (!dmaengine_desc_test_reuse(desc)) return -EPERM; return desc->desc_free(desc); } /* --- DMA device --- */ int dma_async_device_register(struct dma_device *device); int dmaenginem_async_device_register(struct dma_device *device); void dma_async_device_unregister(struct dma_device *device); int dma_async_device_channel_register(struct dma_device *device, struct dma_chan *chan); void dma_async_device_channel_unregister(struct dma_device *device, struct dma_chan *chan); void dma_run_dependencies(struct dma_async_tx_descriptor *tx); #define dma_request_channel(mask, x, y) \ __dma_request_channel(&(mask), x, y, NULL) /* Deprecated, please use dma_request_chan() directly */ static inline struct dma_chan * __deprecated dma_request_slave_channel(struct device *dev, const char *name) { struct dma_chan *ch = dma_request_chan(dev, name); return IS_ERR(ch) ? NULL : ch; } static inline struct dma_chan *dma_request_slave_channel_compat(const dma_cap_mask_t mask, dma_filter_fn fn, void *fn_param, struct device *dev, const char *name) { struct dma_chan *chan; chan = dma_request_slave_channel(dev, name); if (chan) return chan; if (!fn || !fn_param) return NULL; return __dma_request_channel(&mask, fn, fn_param, NULL); } static inline char * dmaengine_get_direction_text(enum dma_transfer_direction dir) { switch (dir) { case DMA_DEV_TO_MEM: return "DEV_TO_MEM"; case DMA_MEM_TO_DEV: return "MEM_TO_DEV"; case DMA_MEM_TO_MEM: return "MEM_TO_MEM"; case DMA_DEV_TO_DEV: return "DEV_TO_DEV"; default: return "invalid"; } } static inline struct device *dmaengine_get_dma_device(struct dma_chan *chan) { if (chan->dev->chan_dma_dev) return &chan->dev->device; return chan->device->dev; } #endif /* DMAENGINE_H */ PK ! �E'T T kdb.hnu �[��� #ifndef _KDB_H #define _KDB_H /* * Kernel Debugger Architecture Independent Global Headers * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. * Copyright (C) 2000 Stephane Eranian <eranian@hpl.hp.com> * Copyright (C) 2009 Jason Wessel <jason.wessel@windriver.com> */ #include <linux/list.h> /* Shifted versions of the command enable bits are be used if the command * has no arguments (see kdb_check_flags). This allows commands, such as * go, to have different permissions depending upon whether it is called * with an argument. */ #define KDB_ENABLE_NO_ARGS_SHIFT 10 typedef enum { KDB_ENABLE_ALL = (1 << 0), /* Enable everything */ KDB_ENABLE_MEM_READ = (1 << 1), KDB_ENABLE_MEM_WRITE = (1 << 2), KDB_ENABLE_REG_READ = (1 << 3), KDB_ENABLE_REG_WRITE = (1 << 4), KDB_ENABLE_INSPECT = (1 << 5), KDB_ENABLE_FLOW_CTRL = (1 << 6), KDB_ENABLE_SIGNAL = (1 << 7), KDB_ENABLE_REBOOT = (1 << 8), /* User exposed values stop here, all remaining flags are * exclusively used to describe a commands behaviour. */ KDB_ENABLE_ALWAYS_SAFE = (1 << 9), KDB_ENABLE_MASK = (1 << KDB_ENABLE_NO_ARGS_SHIFT) - 1, KDB_ENABLE_ALL_NO_ARGS = KDB_ENABLE_ALL << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_MEM_READ_NO_ARGS = KDB_ENABLE_MEM_READ << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_MEM_WRITE_NO_ARGS = KDB_ENABLE_MEM_WRITE << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_REG_READ_NO_ARGS = KDB_ENABLE_REG_READ << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_REG_WRITE_NO_ARGS = KDB_ENABLE_REG_WRITE << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_INSPECT_NO_ARGS = KDB_ENABLE_INSPECT << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_FLOW_CTRL_NO_ARGS = KDB_ENABLE_FLOW_CTRL << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_SIGNAL_NO_ARGS = KDB_ENABLE_SIGNAL << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_REBOOT_NO_ARGS = KDB_ENABLE_REBOOT << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_ALWAYS_SAFE_NO_ARGS = KDB_ENABLE_ALWAYS_SAFE << KDB_ENABLE_NO_ARGS_SHIFT, KDB_ENABLE_MASK_NO_ARGS = KDB_ENABLE_MASK << KDB_ENABLE_NO_ARGS_SHIFT, KDB_REPEAT_NO_ARGS = 0x40000000, /* Repeat the command w/o arguments */ KDB_REPEAT_WITH_ARGS = 0x80000000, /* Repeat the command with args */ } kdb_cmdflags_t; typedef int (*kdb_func_t)(int, const char **); /* The KDB shell command table */ typedef struct _kdbtab { char *name; /* Command name */ kdb_func_t func; /* Function to execute command */ char *usage; /* Usage String for this command */ char *help; /* Help message for this command */ short minlen; /* Minimum legal # cmd chars required */ kdb_cmdflags_t flags; /* Command behaviour flags */ struct list_head list_node; /* Command list */ } kdbtab_t; #ifdef CONFIG_KGDB_KDB #include <linux/init.h> #include <linux/sched.h> #include <linux/atomic.h> #define KDB_POLL_FUNC_MAX 5 extern int kdb_poll_idx; /* * kdb_initial_cpu is initialized to -1, and is set to the cpu * number whenever the kernel debugger is entered. */ extern int kdb_initial_cpu; /* Types and messages used for dynamically added kdb shell commands */ #define KDB_MAXARGS 16 /* Maximum number of arguments to a function */ /* KDB return codes from a command or internal kdb function */ #define KDB_NOTFOUND (-1) #define KDB_ARGCOUNT (-2) #define KDB_BADWIDTH (-3) #define KDB_BADRADIX (-4) #define KDB_NOTENV (-5) #define KDB_NOENVVALUE (-6) #define KDB_NOTIMP (-7) #define KDB_ENVFULL (-8) #define KDB_ENVBUFFULL (-9) #define KDB_TOOMANYBPT (-10) #define KDB_TOOMANYDBREGS (-11) #define KDB_DUPBPT (-12) #define KDB_BPTNOTFOUND (-13) #define KDB_BADMODE (-14) #define KDB_BADINT (-15) #define KDB_INVADDRFMT (-16) #define KDB_BADREG (-17) #define KDB_BADCPUNUM (-18) #define KDB_BADLENGTH (-19) #define KDB_NOBP (-20) #define KDB_BADADDR (-21) #define KDB_NOPERM (-22) /* * kdb_diemsg * * Contains a pointer to the last string supplied to the * kernel 'die' panic function. */ extern const char *kdb_diemsg; #define KDB_FLAG_EARLYKDB (1 << 0) /* set from boot parameter kdb=early */ #define KDB_FLAG_CATASTROPHIC (1 << 1) /* A catastrophic event has occurred */ #define KDB_FLAG_CMD_INTERRUPT (1 << 2) /* Previous command was interrupted */ #define KDB_FLAG_NOIPI (1 << 3) /* Do not send IPIs */ #define KDB_FLAG_NO_CONSOLE (1 << 5) /* No console is available, * kdb is disabled */ #define KDB_FLAG_NO_VT_CONSOLE (1 << 6) /* No VT console is available, do * not use keyboard */ #define KDB_FLAG_NO_I8042 (1 << 7) /* No i8042 chip is available, do * not use keyboard */ extern unsigned int kdb_flags; /* Global flags, see kdb_state for per cpu state */ extern void kdb_save_flags(void); extern void kdb_restore_flags(void); #define KDB_FLAG(flag) (kdb_flags & KDB_FLAG_##flag) #define KDB_FLAG_SET(flag) ((void)(kdb_flags |= KDB_FLAG_##flag)) #define KDB_FLAG_CLEAR(flag) ((void)(kdb_flags &= ~KDB_FLAG_##flag)) /* * External entry point for the kernel debugger. The pt_regs * at the time of entry are supplied along with the reason for * entry to the kernel debugger. */ typedef enum { KDB_REASON_ENTER = 1, /* KDB_ENTER() trap/fault - regs valid */ KDB_REASON_ENTER_SLAVE, /* KDB_ENTER_SLAVE() trap/fault - regs valid */ KDB_REASON_BREAK, /* Breakpoint inst. - regs valid */ KDB_REASON_DEBUG, /* Debug Fault - regs valid */ KDB_REASON_OOPS, /* Kernel Oops - regs valid */ KDB_REASON_SWITCH, /* CPU switch - regs valid*/ KDB_REASON_KEYBOARD, /* Keyboard entry - regs valid */ KDB_REASON_NMI, /* Non-maskable interrupt; regs valid */ KDB_REASON_RECURSE, /* Recursive entry to kdb; * regs probably valid */ KDB_REASON_SSTEP, /* Single Step trap. - regs valid */ KDB_REASON_SYSTEM_NMI, /* In NMI due to SYSTEM cmd; regs valid */ } kdb_reason_t; enum kdb_msgsrc { KDB_MSGSRC_INTERNAL, /* direct call to kdb_printf() */ KDB_MSGSRC_PRINTK, /* trapped from printk() */ }; extern int kdb_trap_printk; extern int kdb_printf_cpu; extern __printf(2, 0) int vkdb_printf(enum kdb_msgsrc src, const char *fmt, va_list args); extern __printf(1, 2) int kdb_printf(const char *, ...); typedef __printf(1, 2) int (*kdb_printf_t)(const char *, ...); extern void kdb_init(int level); /* Access to kdb specific polling devices */ typedef int (*get_char_func)(void); extern get_char_func kdb_poll_funcs[]; extern int kdb_get_kbd_char(void); static inline int kdb_process_cpu(const struct task_struct *p) { unsigned int cpu = task_cpu(p); if (cpu > num_possible_cpus()) cpu = 0; return cpu; } #ifdef CONFIG_KALLSYMS extern const char *kdb_walk_kallsyms(loff_t *pos); #else /* ! CONFIG_KALLSYMS */ static inline const char *kdb_walk_kallsyms(loff_t *pos) { return NULL; } #endif /* ! CONFIG_KALLSYMS */ /* Dynamic kdb shell command registration */ extern int kdb_register(kdbtab_t *cmd); extern void kdb_unregister(kdbtab_t *cmd); #else /* ! CONFIG_KGDB_KDB */ static inline __printf(1, 2) int kdb_printf(const char *fmt, ...) { return 0; } static inline void kdb_init(int level) {} static inline int kdb_register(kdbtab_t *cmd) { return 0; } static inline void kdb_unregister(kdbtab_t *cmd) {} #endif /* CONFIG_KGDB_KDB */ enum { KDB_NOT_INITIALIZED, KDB_INIT_EARLY, KDB_INIT_FULL, }; extern int kdbgetintenv(const char *, int *); extern int kdb_set(int, const char **); #endif /* !_KDB_H */ PK ! � Ў� � stacktrace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_STACKTRACE_H #define __LINUX_STACKTRACE_H #include <linux/types.h> #include <asm/errno.h> struct task_struct; struct pt_regs; #ifdef CONFIG_STACKTRACE void stack_trace_print(const unsigned long *trace, unsigned int nr_entries, int spaces); int stack_trace_snprint(char *buf, size_t size, const unsigned long *entries, unsigned int nr_entries, int spaces); unsigned int stack_trace_save(unsigned long *store, unsigned int size, unsigned int skipnr); unsigned int stack_trace_save_tsk(struct task_struct *task, unsigned long *store, unsigned int size, unsigned int skipnr); unsigned int stack_trace_save_regs(struct pt_regs *regs, unsigned long *store, unsigned int size, unsigned int skipnr); unsigned int stack_trace_save_user(unsigned long *store, unsigned int size); unsigned int filter_irq_stacks(unsigned long *entries, unsigned int nr_entries); /* Internal interfaces. Do not use in generic code */ #ifdef CONFIG_ARCH_STACKWALK /** * stack_trace_consume_fn - Callback for arch_stack_walk() * @cookie: Caller supplied pointer handed back by arch_stack_walk() * @addr: The stack entry address to consume * * Return: True, if the entry was consumed or skipped * False, if there is no space left to store */ typedef bool (*stack_trace_consume_fn)(void *cookie, unsigned long addr); /** * arch_stack_walk - Architecture specific function to walk the stack * @consume_entry: Callback which is invoked by the architecture code for * each entry. * @cookie: Caller supplied pointer which is handed back to * @consume_entry * @task: Pointer to a task struct, can be NULL * @regs: Pointer to registers, can be NULL * * ============ ======= ============================================ * task regs * ============ ======= ============================================ * task NULL Stack trace from task (can be current) * current regs Stack trace starting on regs->stackpointer * ============ ======= ============================================ */ void arch_stack_walk(stack_trace_consume_fn consume_entry, void *cookie, struct task_struct *task, struct pt_regs *regs); /** * arch_stack_walk_reliable - Architecture specific function to walk the * stack reliably * * @consume_entry: Callback which is invoked by the architecture code for * each entry. * @cookie: Caller supplied pointer which is handed back to * @consume_entry * @task: Pointer to a task struct, can be NULL * * This function returns an error if it detects any unreliable * features of the stack. Otherwise it guarantees that the stack * trace is reliable. * * If the task is not 'current', the caller *must* ensure the task is * inactive and its stack is pinned. */ int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry, void *cookie, struct task_struct *task); void arch_stack_walk_user(stack_trace_consume_fn consume_entry, void *cookie, const struct pt_regs *regs); #else /* CONFIG_ARCH_STACKWALK */ struct stack_trace { unsigned int nr_entries, max_entries; unsigned long *entries; unsigned int skip; /* input argument: How many entries to skip */ }; extern void save_stack_trace(struct stack_trace *trace); extern void save_stack_trace_regs(struct pt_regs *regs, struct stack_trace *trace); extern void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace); extern int save_stack_trace_tsk_reliable(struct task_struct *tsk, struct stack_trace *trace); extern void save_stack_trace_user(struct stack_trace *trace); #endif /* !CONFIG_ARCH_STACKWALK */ #endif /* CONFIG_STACKTRACE */ #if defined(CONFIG_STACKTRACE) && defined(CONFIG_HAVE_RELIABLE_STACKTRACE) int stack_trace_save_tsk_reliable(struct task_struct *tsk, unsigned long *store, unsigned int size); #else static inline int stack_trace_save_tsk_reliable(struct task_struct *tsk, unsigned long *store, unsigned int size) { return -ENOSYS; } #endif #endif /* __LINUX_STACKTRACE_H */ PK ! �8��� � netfilter_ingress.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _NETFILTER_INGRESS_H_ #define _NETFILTER_INGRESS_H_ #include <linux/netfilter.h> #include <linux/netdevice.h> #ifdef CONFIG_NETFILTER_INGRESS static inline bool nf_hook_ingress_active(const struct sk_buff *skb) { #ifdef CONFIG_JUMP_LABEL if (!static_key_false(&nf_hooks_needed[NFPROTO_NETDEV][NF_NETDEV_INGRESS])) return false; #endif return rcu_access_pointer(skb->dev->nf_hooks_ingress); } /* caller must hold rcu_read_lock */ static inline int nf_hook_ingress(struct sk_buff *skb) { struct nf_hook_entries *e = rcu_dereference(skb->dev->nf_hooks_ingress); struct nf_hook_state state; int ret; /* Must recheck the ingress hook head, in the event it became NULL * after the check in nf_hook_ingress_active evaluated to true. */ if (unlikely(!e)) return 0; nf_hook_state_init(&state, NF_NETDEV_INGRESS, NFPROTO_NETDEV, skb->dev, NULL, NULL, dev_net(skb->dev), NULL); ret = nf_hook_slow(skb, &state, e, 0); if (ret == 0) return -1; return ret; } static inline void nf_hook_ingress_init(struct net_device *dev) { RCU_INIT_POINTER(dev->nf_hooks_ingress, NULL); } #else /* CONFIG_NETFILTER_INGRESS */ static inline int nf_hook_ingress_active(struct sk_buff *skb) { return 0; } static inline int nf_hook_ingress(struct sk_buff *skb) { return 0; } static inline void nf_hook_ingress_init(struct net_device *dev) {} #endif /* CONFIG_NETFILTER_INGRESS */ #endif /* _NETFILTER_INGRESS_H_ */ PK ! ) z z cleanup.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_GUARDS_H #define __LINUX_GUARDS_H #include <linux/compiler.h> /* * DEFINE_FREE(name, type, free): * simple helper macro that defines the required wrapper for a __free() * based cleanup function. @free is an expression using '_T' to access * the variable. * * __free(name): * variable attribute to add a scoped based cleanup to the variable. * * no_free_ptr(var): * like a non-atomic xchg(var, NULL), such that the cleanup function will * be inhibited -- provided it sanely deals with a NULL value. * * return_ptr(p): * returns p while inhibiting the __free(). * * Ex. * * DEFINE_FREE(kfree, void *, if (_T) kfree(_T)) * * struct obj *p __free(kfree) = kmalloc(...); * if (!p) * return NULL; * * if (!init_obj(p)) * return NULL; * * return_ptr(p); */ #define DEFINE_FREE(_name, _type, _free) \ static inline void __free_##_name(void *p) { _type _T = *(_type *)p; _free; } #define __free(_name) __cleanup(__free_##_name) #define no_free_ptr(p) \ ({ __auto_type __ptr = (p); (p) = NULL; __ptr; }) #define return_ptr(p) return no_free_ptr(p) /* * DEFINE_CLASS(name, type, exit, init, init_args...): * helper to define the destructor and constructor for a type. * @exit is an expression using '_T' -- similar to FREE above. * @init is an expression in @init_args resulting in @type * * EXTEND_CLASS(name, ext, init, init_args...): * extends class @name to @name@ext with the new constructor * * CLASS(name, var)(args...): * declare the variable @var as an instance of the named class * * Ex. * * DEFINE_CLASS(fdget, struct fd, fdput(_T), fdget(fd), int fd) * * CLASS(fdget, f)(fd); * if (!f.file) * return -EBADF; * * // use 'f' without concern */ #define DEFINE_CLASS(_name, _type, _exit, _init, _init_args...) \ typedef _type class_##_name##_t; \ static inline void class_##_name##_destructor(_type *p) \ { _type _T = *p; _exit; } \ static inline _type class_##_name##_constructor(_init_args) \ { _type t = _init; return t; } #define EXTEND_CLASS(_name, ext, _init, _init_args...) \ typedef class_##_name##_t class_##_name##ext##_t; \ static inline void class_##_name##ext##_destructor(class_##_name##_t *p)\ { class_##_name##_destructor(p); } \ static inline class_##_name##_t class_##_name##ext##_constructor(_init_args) \ { class_##_name##_t t = _init; return t; } #define CLASS(_name, var) \ class_##_name##_t var __cleanup(class_##_name##_destructor) = \ class_##_name##_constructor /* * DEFINE_GUARD(name, type, lock, unlock): * trivial wrapper around DEFINE_CLASS() above specifically * for locks. * * guard(name): * an anonymous instance of the (guard) class * * scoped_guard (name, args...) { }: * similar to CLASS(name, scope)(args), except the variable (with the * explicit name 'scope') is declard in a for-loop such that its scope is * bound to the next (compound) statement. * */ #define DEFINE_GUARD(_name, _type, _lock, _unlock) \ DEFINE_CLASS(_name, _type, _unlock, ({ _lock; _T; }), _type _T) #define guard(_name) \ CLASS(_name, __UNIQUE_ID(guard)) #define scoped_guard(_name, args...) \ for (CLASS(_name, scope)(args), \ *done = NULL; !done; done = (void *)1) /* * Additional helper macros for generating lock guards with types, either for * locks that don't have a native type (eg. RCU, preempt) or those that need a * 'fat' pointer (eg. spin_lock_irqsave). * * DEFINE_LOCK_GUARD_0(name, lock, unlock, ...) * DEFINE_LOCK_GUARD_1(name, type, lock, unlock, ...) * * will result in the following type: * * typedef struct { * type *lock; // 'type := void' for the _0 variant * __VA_ARGS__; * } class_##name##_t; * * As above, both _lock and _unlock are statements, except this time '_T' will * be a pointer to the above struct. */ #define __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, ...) \ typedef struct { \ _type *lock; \ __VA_ARGS__; \ } class_##_name##_t; \ \ static inline void class_##_name##_destructor(class_##_name##_t *_T) \ { \ if (_T->lock) { _unlock; } \ } #define __DEFINE_LOCK_GUARD_1(_name, _type, _lock) \ static inline class_##_name##_t class_##_name##_constructor(_type *l) \ { \ class_##_name##_t _t = { .lock = l }, *_T = &_t; \ _lock; \ return _t; \ } #define __DEFINE_LOCK_GUARD_0(_name, _lock) \ static inline class_##_name##_t class_##_name##_constructor(void) \ { \ class_##_name##_t _t = { .lock = (void*)1 }, \ *_T __maybe_unused = &_t; \ _lock; \ return _t; \ } #define DEFINE_LOCK_GUARD_1(_name, _type, _lock, _unlock, ...) \ __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, __VA_ARGS__) \ __DEFINE_LOCK_GUARD_1(_name, _type, _lock) #define DEFINE_LOCK_GUARD_0(_name, _lock, _unlock, ...) \ __DEFINE_UNLOCK_GUARD(_name, void, _unlock, __VA_ARGS__) \ __DEFINE_LOCK_GUARD_0(_name, _lock) #endif /* __LINUX_GUARDS_H */ PK ! �u�t� � io-64-nonatomic-hi-lo.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_IO_64_NONATOMIC_HI_LO_H_ #define _LINUX_IO_64_NONATOMIC_HI_LO_H_ #include <linux/io.h> #include <asm-generic/int-ll64.h> static inline __u64 hi_lo_readq(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; u32 low, high; high = readl(p + 1); low = readl(p); return low + ((u64)high << 32); } static inline void hi_lo_writeq(__u64 val, volatile void __iomem *addr) { writel(val >> 32, addr + 4); writel(val, addr); } static inline __u64 hi_lo_readq_relaxed(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; u32 low, high; high = readl_relaxed(p + 1); low = readl_relaxed(p); return low + ((u64)high << 32); } static inline void hi_lo_writeq_relaxed(__u64 val, volatile void __iomem *addr) { writel_relaxed(val >> 32, addr + 4); writel_relaxed(val, addr); } #ifndef readq #define readq hi_lo_readq #endif #ifndef writeq #define writeq hi_lo_writeq #endif #ifndef readq_relaxed #define readq_relaxed hi_lo_readq_relaxed #endif #ifndef writeq_relaxed #define writeq_relaxed hi_lo_writeq_relaxed #endif #ifndef ioread64_hi_lo #define ioread64_hi_lo ioread64_hi_lo static inline u64 ioread64_hi_lo(const void __iomem *addr) { u32 low, high; high = ioread32(addr + sizeof(u32)); low = ioread32(addr); return low + ((u64)high << 32); } #endif #ifndef iowrite64_hi_lo #define iowrite64_hi_lo iowrite64_hi_lo static inline void iowrite64_hi_lo(u64 val, void __iomem *addr) { iowrite32(val >> 32, addr + sizeof(u32)); iowrite32(val, addr); } #endif #ifndef ioread64be_hi_lo #define ioread64be_hi_lo ioread64be_hi_lo static inline u64 ioread64be_hi_lo(const void __iomem *addr) { u32 low, high; high = ioread32be(addr); low = ioread32be(addr + sizeof(u32)); return low + ((u64)high << 32); } #endif #ifndef iowrite64be_hi_lo #define iowrite64be_hi_lo iowrite64be_hi_lo static inline void iowrite64be_hi_lo(u64 val, void __iomem *addr) { iowrite32be(val >> 32, addr); iowrite32be(val, addr + sizeof(u32)); } #endif #ifndef ioread64 #define ioread64_is_nonatomic #define ioread64 ioread64_hi_lo #endif #ifndef iowrite64 #define iowrite64_is_nonatomic #define iowrite64 iowrite64_hi_lo #endif #ifndef ioread64be #define ioread64be_is_nonatomic #define ioread64be ioread64be_hi_lo #endif #ifndef iowrite64be #define iowrite64be_is_nonatomic #define iowrite64be iowrite64be_hi_lo #endif #endif /* _LINUX_IO_64_NONATOMIC_HI_LO_H_ */ PK ! ��en<H <H leds.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Driver model for leds and led triggers * * Copyright (C) 2005 John Lenz <lenz@cs.wisc.edu> * Copyright (C) 2005 Richard Purdie <rpurdie@openedhand.com> */ #ifndef __LINUX_LEDS_H_INCLUDED #define __LINUX_LEDS_H_INCLUDED #include <dt-bindings/leds/common.h> #include <linux/device.h> #include <linux/kernfs.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/rwsem.h> #include <linux/spinlock.h> #include <linux/timer.h> #include <linux/workqueue.h> struct device; struct led_pattern; struct device_node; /* * LED Core */ /* This is obsolete/useless. We now support variable maximum brightness. */ enum led_brightness { LED_OFF = 0, LED_ON = 1, LED_HALF = 127, LED_FULL = 255, }; enum led_default_state { LEDS_DEFSTATE_OFF = 0, LEDS_DEFSTATE_ON = 1, LEDS_DEFSTATE_KEEP = 2, }; struct led_init_data { /* device fwnode handle */ struct fwnode_handle *fwnode; /* * default <color:function> tuple, for backward compatibility * with in-driver hard-coded LED names used as a fallback when * DT "label" property is absent; it should be set to NULL * in new LED class drivers. */ const char *default_label; /* * string to be used for devicename section of LED class device * either for label based LED name composition path or for fwnode * based when devname_mandatory is true */ const char *devicename; /* * indicates if LED name should always comprise devicename section; * only LEDs exposed by drivers of hot-pluggable devices should * set it to true */ bool devname_mandatory; }; struct led_hw_trigger_type { int dummy; }; struct led_classdev { const char *name; unsigned int brightness; unsigned int max_brightness; int flags; /* Lower 16 bits reflect status */ #define LED_SUSPENDED BIT(0) #define LED_UNREGISTERING BIT(1) /* Upper 16 bits reflect control information */ #define LED_CORE_SUSPENDRESUME BIT(16) #define LED_SYSFS_DISABLE BIT(17) #define LED_DEV_CAP_FLASH BIT(18) #define LED_HW_PLUGGABLE BIT(19) #define LED_PANIC_INDICATOR BIT(20) #define LED_BRIGHT_HW_CHANGED BIT(21) #define LED_RETAIN_AT_SHUTDOWN BIT(22) #define LED_INIT_DEFAULT_TRIGGER BIT(23) /* set_brightness_work / blink_timer flags, atomic, private. */ unsigned long work_flags; #define LED_BLINK_SW 0 #define LED_BLINK_ONESHOT 1 #define LED_BLINK_ONESHOT_STOP 2 #define LED_BLINK_INVERT 3 #define LED_BLINK_BRIGHTNESS_CHANGE 4 #define LED_BLINK_DISABLE 5 /* Set LED brightness level * Must not sleep. Use brightness_set_blocking for drivers * that can sleep while setting brightness. */ void (*brightness_set)(struct led_classdev *led_cdev, enum led_brightness brightness); /* * Set LED brightness level immediately - it can block the caller for * the time required for accessing a LED device register. */ int (*brightness_set_blocking)(struct led_classdev *led_cdev, enum led_brightness brightness); /* Get LED brightness level */ enum led_brightness (*brightness_get)(struct led_classdev *led_cdev); /* * Activate hardware accelerated blink, delays are in milliseconds * and if both are zero then a sensible default should be chosen. * The call should adjust the timings in that case and if it can't * match the values specified exactly. * Deactivate blinking again when the brightness is set to LED_OFF * via the brightness_set() callback. */ int (*blink_set)(struct led_classdev *led_cdev, unsigned long *delay_on, unsigned long *delay_off); int (*pattern_set)(struct led_classdev *led_cdev, struct led_pattern *pattern, u32 len, int repeat); int (*pattern_clear)(struct led_classdev *led_cdev); struct device *dev; const struct attribute_group **groups; struct list_head node; /* LED Device list */ const char *default_trigger; /* Trigger to use */ unsigned long blink_delay_on, blink_delay_off; struct timer_list blink_timer; int blink_brightness; int new_blink_brightness; void (*flash_resume)(struct led_classdev *led_cdev); struct work_struct set_brightness_work; int delayed_set_value; #ifdef CONFIG_LEDS_TRIGGERS /* Protects the trigger data below */ struct rw_semaphore trigger_lock; struct led_trigger *trigger; struct list_head trig_list; void *trigger_data; /* true if activated - deactivate routine uses it to do cleanup */ bool activated; /* LEDs that have private triggers have this set */ struct led_hw_trigger_type *trigger_type; #endif #ifdef CONFIG_LEDS_BRIGHTNESS_HW_CHANGED int brightness_hw_changed; struct kernfs_node *brightness_hw_changed_kn; #endif /* Ensures consistent access to the LED class device */ struct mutex led_access; }; /** * led_classdev_register_ext - register a new object of LED class with * init data * @parent: LED controller device this LED is driven by * @led_cdev: the led_classdev structure for this device * @init_data: the LED class device initialization data * * Register a new object of LED class, with name derived from init_data. * * Returns: 0 on success or negative error value on failure */ int led_classdev_register_ext(struct device *parent, struct led_classdev *led_cdev, struct led_init_data *init_data); /** * led_classdev_register - register a new object of LED class * @parent: LED controller device this LED is driven by * @led_cdev: the led_classdev structure for this device * * Register a new object of LED class, with name derived from the name property * of passed led_cdev argument. * * Returns: 0 on success or negative error value on failure */ static inline int led_classdev_register(struct device *parent, struct led_classdev *led_cdev) { return led_classdev_register_ext(parent, led_cdev, NULL); } int devm_led_classdev_register_ext(struct device *parent, struct led_classdev *led_cdev, struct led_init_data *init_data); static inline int devm_led_classdev_register(struct device *parent, struct led_classdev *led_cdev) { return devm_led_classdev_register_ext(parent, led_cdev, NULL); } void led_classdev_unregister(struct led_classdev *led_cdev); void devm_led_classdev_unregister(struct device *parent, struct led_classdev *led_cdev); void led_classdev_suspend(struct led_classdev *led_cdev); void led_classdev_resume(struct led_classdev *led_cdev); extern struct led_classdev *of_led_get(struct device_node *np, int index); extern void led_put(struct led_classdev *led_cdev); struct led_classdev *__must_check devm_of_led_get(struct device *dev, int index); /** * led_blink_set - set blinking with software fallback * @led_cdev: the LED to start blinking * @delay_on: the time it should be on (in ms) * @delay_off: the time it should ble off (in ms) * * This function makes the LED blink, attempting to use the * hardware acceleration if possible, but falling back to * software blinking if there is no hardware blinking or if * the LED refuses the passed values. * * Note that if software blinking is active, simply calling * led_cdev->brightness_set() will not stop the blinking, * use led_classdev_brightness_set() instead. */ void led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, unsigned long *delay_off); /** * led_blink_set_oneshot - do a oneshot software blink * @led_cdev: the LED to start blinking * @delay_on: the time it should be on (in ms) * @delay_off: the time it should ble off (in ms) * @invert: blink off, then on, leaving the led on * * This function makes the LED blink one time for delay_on + * delay_off time, ignoring the request if another one-shot * blink is already in progress. * * If invert is set, led blinks for delay_off first, then for * delay_on and leave the led on after the on-off cycle. */ void led_blink_set_oneshot(struct led_classdev *led_cdev, unsigned long *delay_on, unsigned long *delay_off, int invert); /** * led_set_brightness - set LED brightness * @led_cdev: the LED to set * @brightness: the brightness to set it to * * Set an LED's brightness, and, if necessary, cancel the * software blink timer that implements blinking when the * hardware doesn't. This function is guaranteed not to sleep. */ void led_set_brightness(struct led_classdev *led_cdev, unsigned int brightness); /** * led_set_brightness_sync - set LED brightness synchronously * @led_cdev: the LED to set * @value: the brightness to set it to * * Set an LED's brightness immediately. This function will block * the caller for the time required for accessing device registers, * and it can sleep. * * Returns: 0 on success or negative error value on failure */ int led_set_brightness_sync(struct led_classdev *led_cdev, unsigned int value); /** * led_update_brightness - update LED brightness * @led_cdev: the LED to query * * Get an LED's current brightness and update led_cdev->brightness * member with the obtained value. * * Returns: 0 on success or negative error value on failure */ int led_update_brightness(struct led_classdev *led_cdev); /** * led_get_default_pattern - return default pattern * * @led_cdev: the LED to get default pattern for * @size: pointer for storing the number of elements in returned array, * modified only if return != NULL * * Return: Allocated array of integers with default pattern from device tree * or NULL. Caller is responsible for kfree(). */ u32 *led_get_default_pattern(struct led_classdev *led_cdev, unsigned int *size); /** * led_sysfs_disable - disable LED sysfs interface * @led_cdev: the LED to set * * Disable the led_cdev's sysfs interface. */ void led_sysfs_disable(struct led_classdev *led_cdev); /** * led_sysfs_enable - enable LED sysfs interface * @led_cdev: the LED to set * * Enable the led_cdev's sysfs interface. */ void led_sysfs_enable(struct led_classdev *led_cdev); /** * led_compose_name - compose LED class device name * @dev: LED controller device object * @init_data: the LED class device initialization data * @led_classdev_name: composed LED class device name * * Create LED class device name basing on the provided init_data argument. * The name can have <devicename:color:function> or <color:function>. * form, depending on the init_data configuration. * * Returns: 0 on success or negative error value on failure */ int led_compose_name(struct device *dev, struct led_init_data *init_data, char *led_classdev_name); /** * led_sysfs_is_disabled - check if LED sysfs interface is disabled * @led_cdev: the LED to query * * Returns: true if the led_cdev's sysfs interface is disabled. */ static inline bool led_sysfs_is_disabled(struct led_classdev *led_cdev) { return led_cdev->flags & LED_SYSFS_DISABLE; } /* * LED Triggers */ /* Registration functions for simple triggers */ #define DEFINE_LED_TRIGGER(x) static struct led_trigger *x; #define DEFINE_LED_TRIGGER_GLOBAL(x) struct led_trigger *x; #ifdef CONFIG_LEDS_TRIGGERS #define TRIG_NAME_MAX 50 struct led_trigger { /* Trigger Properties */ const char *name; int (*activate)(struct led_classdev *led_cdev); void (*deactivate)(struct led_classdev *led_cdev); /* Brightness set by led_trigger_event */ enum led_brightness brightness; /* LED-private triggers have this set */ struct led_hw_trigger_type *trigger_type; /* LEDs under control by this trigger (for simple triggers) */ spinlock_t leddev_list_lock; struct list_head led_cdevs; /* Link to next registered trigger */ struct list_head next_trig; const struct attribute_group **groups; }; /* * Currently the attributes in struct led_trigger::groups are added directly to * the LED device. As this might change in the future, the following * macros abstract getting the LED device and its trigger_data from the dev * parameter passed to the attribute accessor functions. */ #define led_trigger_get_led(dev) ((struct led_classdev *)dev_get_drvdata((dev))) #define led_trigger_get_drvdata(dev) (led_get_trigger_data(led_trigger_get_led(dev))) /* Registration functions for complex triggers */ int led_trigger_register(struct led_trigger *trigger); void led_trigger_unregister(struct led_trigger *trigger); int devm_led_trigger_register(struct device *dev, struct led_trigger *trigger); void led_trigger_register_simple(const char *name, struct led_trigger **trigger); void led_trigger_unregister_simple(struct led_trigger *trigger); void led_trigger_event(struct led_trigger *trigger, enum led_brightness event); void led_trigger_blink(struct led_trigger *trigger, unsigned long *delay_on, unsigned long *delay_off); void led_trigger_blink_oneshot(struct led_trigger *trigger, unsigned long *delay_on, unsigned long *delay_off, int invert); void led_trigger_set_default(struct led_classdev *led_cdev); int led_trigger_set(struct led_classdev *led_cdev, struct led_trigger *trigger); void led_trigger_remove(struct led_classdev *led_cdev); static inline void led_set_trigger_data(struct led_classdev *led_cdev, void *trigger_data) { led_cdev->trigger_data = trigger_data; } static inline void *led_get_trigger_data(struct led_classdev *led_cdev) { return led_cdev->trigger_data; } static inline enum led_brightness led_trigger_get_brightness(const struct led_trigger *trigger) { return trigger ? trigger->brightness : LED_OFF; } #define module_led_trigger(__led_trigger) \ module_driver(__led_trigger, led_trigger_register, \ led_trigger_unregister) #else /* Trigger has no members */ struct led_trigger {}; /* Trigger inline empty functions */ static inline void led_trigger_register_simple(const char *name, struct led_trigger **trigger) {} static inline void led_trigger_unregister_simple(struct led_trigger *trigger) {} static inline void led_trigger_event(struct led_trigger *trigger, enum led_brightness event) {} static inline void led_trigger_blink(struct led_trigger *trigger, unsigned long *delay_on, unsigned long *delay_off) {} static inline void led_trigger_blink_oneshot(struct led_trigger *trigger, unsigned long *delay_on, unsigned long *delay_off, int invert) {} static inline void led_trigger_set_default(struct led_classdev *led_cdev) {} static inline int led_trigger_set(struct led_classdev *led_cdev, struct led_trigger *trigger) { return 0; } static inline void led_trigger_remove(struct led_classdev *led_cdev) {} static inline void led_set_trigger_data(struct led_classdev *led_cdev) {} static inline void *led_get_trigger_data(struct led_classdev *led_cdev) { return NULL; } static inline enum led_brightness led_trigger_get_brightness(const struct led_trigger *trigger) { return LED_OFF; } #endif /* CONFIG_LEDS_TRIGGERS */ /* Trigger specific functions */ #ifdef CONFIG_LEDS_TRIGGER_DISK void ledtrig_disk_activity(bool write); #else static inline void ledtrig_disk_activity(bool write) {} #endif #ifdef CONFIG_LEDS_TRIGGER_MTD void ledtrig_mtd_activity(void); #else static inline void ledtrig_mtd_activity(void) {} #endif #if defined(CONFIG_LEDS_TRIGGER_CAMERA) || defined(CONFIG_LEDS_TRIGGER_CAMERA_MODULE) void ledtrig_flash_ctrl(bool on); void ledtrig_torch_ctrl(bool on); #else static inline void ledtrig_flash_ctrl(bool on) {} static inline void ledtrig_torch_ctrl(bool on) {} #endif /* * Generic LED platform data for describing LED names and default triggers. */ struct led_info { const char *name; const char *default_trigger; int flags; }; struct led_platform_data { int num_leds; struct led_info *leds; }; struct led_properties { u32 color; bool color_present; const char *function; u32 func_enum; bool func_enum_present; const char *label; }; struct gpio_desc; typedef int (*gpio_blink_set_t)(struct gpio_desc *desc, int state, unsigned long *delay_on, unsigned long *delay_off); /* For the leds-gpio driver */ struct gpio_led { const char *name; const char *default_trigger; unsigned gpio; unsigned active_low : 1; unsigned retain_state_suspended : 1; unsigned panic_indicator : 1; unsigned default_state : 2; unsigned retain_state_shutdown : 1; /* default_state should be one of LEDS_GPIO_DEFSTATE_(ON|OFF|KEEP) */ struct gpio_desc *gpiod; }; #define LEDS_GPIO_DEFSTATE_OFF LEDS_DEFSTATE_OFF #define LEDS_GPIO_DEFSTATE_ON LEDS_DEFSTATE_ON #define LEDS_GPIO_DEFSTATE_KEEP LEDS_DEFSTATE_KEEP struct gpio_led_platform_data { int num_leds; const struct gpio_led *leds; #define GPIO_LED_NO_BLINK_LOW 0 /* No blink GPIO state low */ #define GPIO_LED_NO_BLINK_HIGH 1 /* No blink GPIO state high */ #define GPIO_LED_BLINK 2 /* Please, blink */ gpio_blink_set_t gpio_blink_set; }; #ifdef CONFIG_NEW_LEDS struct platform_device *gpio_led_register_device( int id, const struct gpio_led_platform_data *pdata); #else static inline struct platform_device *gpio_led_register_device( int id, const struct gpio_led_platform_data *pdata) { return 0; } #endif enum cpu_led_event { CPU_LED_IDLE_START, /* CPU enters idle */ CPU_LED_IDLE_END, /* CPU idle ends */ CPU_LED_START, /* Machine starts, especially resume */ CPU_LED_STOP, /* Machine stops, especially suspend */ CPU_LED_HALTED, /* Machine shutdown */ }; #ifdef CONFIG_LEDS_TRIGGER_CPU void ledtrig_cpu(enum cpu_led_event evt); #else static inline void ledtrig_cpu(enum cpu_led_event evt) { return; } #endif #ifdef CONFIG_LEDS_BRIGHTNESS_HW_CHANGED void led_classdev_notify_brightness_hw_changed( struct led_classdev *led_cdev, unsigned int brightness); #else static inline void led_classdev_notify_brightness_hw_changed( struct led_classdev *led_cdev, enum led_brightness brightness) { } #endif /** * struct led_pattern - pattern interval settings * @delta_t: pattern interval delay, in milliseconds * @brightness: pattern interval brightness */ struct led_pattern { u32 delta_t; int brightness; }; enum led_audio { LED_AUDIO_MUTE, /* master mute LED */ LED_AUDIO_MICMUTE, /* mic mute LED */ NUM_AUDIO_LEDS }; #if IS_ENABLED(CONFIG_LEDS_TRIGGER_AUDIO) enum led_brightness ledtrig_audio_get(enum led_audio type); void ledtrig_audio_set(enum led_audio type, enum led_brightness state); #else static inline enum led_brightness ledtrig_audio_get(enum led_audio type) { return LED_OFF; } static inline void ledtrig_audio_set(enum led_audio type, enum led_brightness state) { } #endif #endif /* __LINUX_LEDS_H_INCLUDED */ PK ! ����� � agp_backend.hnu �[��� /* * AGPGART backend specific includes. Not for userspace consumption. * * Copyright (C) 2004 Silicon Graphics, Inc. * Copyright (C) 2002-2003 Dave Jones * Copyright (C) 1999 Jeff Hartmann * Copyright (C) 1999 Precision Insight, Inc. * Copyright (C) 1999 Xi Graphics, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef _AGP_BACKEND_H #define _AGP_BACKEND_H 1 #include <linux/list.h> enum chipset_type { NOT_SUPPORTED, SUPPORTED, }; struct agp_version { u16 major; u16 minor; }; struct agp_kern_info { struct agp_version version; struct pci_dev *device; enum chipset_type chipset; unsigned long mode; unsigned long aper_base; size_t aper_size; int max_memory; /* In pages */ int current_memory; bool cant_use_aperture; unsigned long page_mask; const struct vm_operations_struct *vm_ops; }; /* * The agp_memory structure has information about the block of agp memory * allocated. A caller may manipulate the next and prev pointers to link * each allocated item into a list. These pointers are ignored by the backend. * Everything else should never be written to, but the caller may read any of * the items to determine the status of this block of agp memory. */ struct agp_bridge_data; struct agp_memory { struct agp_memory *next; struct agp_memory *prev; struct agp_bridge_data *bridge; struct page **pages; size_t page_count; int key; int num_scratch_pages; off_t pg_start; u32 type; u32 physical; bool is_bound; bool is_flushed; /* list of agp_memory mapped to the aperture */ struct list_head mapped_list; /* DMA-mapped addresses */ struct scatterlist *sg_list; int num_sg; }; #define AGP_NORMAL_MEMORY 0 #define AGP_USER_TYPES (1 << 16) #define AGP_USER_MEMORY (AGP_USER_TYPES) #define AGP_USER_CACHED_MEMORY (AGP_USER_TYPES + 1) extern struct agp_bridge_data *agp_bridge; extern struct list_head agp_bridges; extern struct agp_bridge_data *(*agp_find_bridge)(struct pci_dev *); extern void agp_free_memory(struct agp_memory *); extern struct agp_memory *agp_allocate_memory(struct agp_bridge_data *, size_t, u32); extern int agp_copy_info(struct agp_bridge_data *, struct agp_kern_info *); extern int agp_bind_memory(struct agp_memory *, off_t); extern int agp_unbind_memory(struct agp_memory *); extern void agp_enable(struct agp_bridge_data *, u32); extern struct agp_bridge_data *agp_backend_acquire(struct pci_dev *); extern void agp_backend_release(struct agp_bridge_data *); #endif /* _AGP_BACKEND_H */ PK ! �њы � aio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX__AIO_H #define __LINUX__AIO_H #include <linux/aio_abi.h> struct kioctx; struct kiocb; struct mm_struct; typedef int (kiocb_cancel_fn)(struct kiocb *); /* prototypes */ #ifdef CONFIG_AIO extern void exit_aio(struct mm_struct *mm); void kiocb_set_cancel_fn(struct kiocb *req, kiocb_cancel_fn *cancel); #else static inline void exit_aio(struct mm_struct *mm) { } static inline void kiocb_set_cancel_fn(struct kiocb *req, kiocb_cancel_fn *cancel) { } #endif /* CONFIG_AIO */ /* for sysctl: */ extern unsigned long aio_nr; extern unsigned long aio_max_nr; #endif /* __LINUX__AIO_H */ PK ! %��7� � sysrq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* -*- linux-c -*- * * $Id: sysrq.h,v 1.3 1997/07/17 11:54:33 mj Exp $ * * Linux Magic System Request Key Hacks * * (c) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz> * * (c) 2000 Crutcher Dunnavant <crutcher+kernel@datastacks.com> * overhauled to use key registration * based upon discusions in irc://irc.openprojects.net/#kernelnewbies */ #ifndef _LINUX_SYSRQ_H #define _LINUX_SYSRQ_H #include <linux/errno.h> #include <linux/types.h> /* Possible values of bitmask for enabling sysrq functions */ /* 0x0001 is reserved for enable everything */ #define SYSRQ_ENABLE_LOG 0x0002 #define SYSRQ_ENABLE_KEYBOARD 0x0004 #define SYSRQ_ENABLE_DUMP 0x0008 #define SYSRQ_ENABLE_SYNC 0x0010 #define SYSRQ_ENABLE_REMOUNT 0x0020 #define SYSRQ_ENABLE_SIGNAL 0x0040 #define SYSRQ_ENABLE_BOOT 0x0080 #define SYSRQ_ENABLE_RTNICE 0x0100 struct sysrq_key_op { void (* const handler)(int); const char * const help_msg; const char * const action_msg; const int enable_mask; }; #ifdef CONFIG_MAGIC_SYSRQ /* Generic SysRq interface -- you may call it from any device driver, supplying * ASCII code of the key, pointer to registers and kbd/tty structs (if they * are available -- else NULL's). */ void handle_sysrq(int key); void __handle_sysrq(int key, bool check_mask); int register_sysrq_key(int key, const struct sysrq_key_op *op); int unregister_sysrq_key(int key, const struct sysrq_key_op *op); extern const struct sysrq_key_op *__sysrq_reboot_op; int sysrq_toggle_support(int enable_mask); int sysrq_mask(void); #else static inline void handle_sysrq(int key) { } static inline void __handle_sysrq(int key, bool check_mask) { } static inline int register_sysrq_key(int key, const struct sysrq_key_op *op) { return -EINVAL; } static inline int unregister_sysrq_key(int key, const struct sysrq_key_op *op) { return -EINVAL; } static inline int sysrq_mask(void) { /* Magic SysRq disabled mask */ return 0; } #endif #endif /* _LINUX_SYSRQ_H */ PK ! � R�� � spinlock_api_smp.hnu �[��� #ifndef __LINUX_SPINLOCK_API_SMP_H #define __LINUX_SPINLOCK_API_SMP_H #ifndef __LINUX_SPINLOCK_H # error "please don't include this file directly" #endif /* * include/linux/spinlock_api_smp.h * * spinlock API declarations on SMP (and debug) * (implemented in kernel/spinlock.c) * * portions Copyright 2005, Red Hat, Inc., Ingo Molnar * Released under the General Public License (GPL). */ int in_lock_functions(unsigned long addr); #define assert_raw_spin_locked(x) BUG_ON(!raw_spin_is_locked(x)) void __lockfunc _raw_spin_lock(raw_spinlock_t *lock) __acquires(lock); void __lockfunc _raw_spin_lock_nested(raw_spinlock_t *lock, int subclass) __acquires(lock); void __lockfunc _raw_spin_lock_nest_lock(raw_spinlock_t *lock, struct lockdep_map *map) __acquires(lock); void __lockfunc _raw_spin_lock_bh(raw_spinlock_t *lock) __acquires(lock); void __lockfunc _raw_spin_lock_irq(raw_spinlock_t *lock) __acquires(lock); unsigned long __lockfunc _raw_spin_lock_irqsave(raw_spinlock_t *lock) __acquires(lock); unsigned long __lockfunc _raw_spin_lock_irqsave_nested(raw_spinlock_t *lock, int subclass) __acquires(lock); int __lockfunc _raw_spin_trylock(raw_spinlock_t *lock); int __lockfunc _raw_spin_trylock_bh(raw_spinlock_t *lock); void __lockfunc _raw_spin_unlock(raw_spinlock_t *lock) __releases(lock); void __lockfunc _raw_spin_unlock_bh(raw_spinlock_t *lock) __releases(lock); void __lockfunc _raw_spin_unlock_irq(raw_spinlock_t *lock) __releases(lock); void __lockfunc _raw_spin_unlock_irqrestore(raw_spinlock_t *lock, unsigned long flags) __releases(lock); #ifdef CONFIG_INLINE_SPIN_LOCK #define _raw_spin_lock(lock) __raw_spin_lock(lock) #endif #ifdef CONFIG_INLINE_SPIN_LOCK_BH #define _raw_spin_lock_bh(lock) __raw_spin_lock_bh(lock) #endif #ifdef CONFIG_INLINE_SPIN_LOCK_IRQ #define _raw_spin_lock_irq(lock) __raw_spin_lock_irq(lock) #endif #ifdef CONFIG_INLINE_SPIN_LOCK_IRQSAVE #define _raw_spin_lock_irqsave(lock) __raw_spin_lock_irqsave(lock) #endif #ifdef CONFIG_INLINE_SPIN_TRYLOCK #define _raw_spin_trylock(lock) __raw_spin_trylock(lock) #endif #ifdef CONFIG_INLINE_SPIN_TRYLOCK_BH #define _raw_spin_trylock_bh(lock) __raw_spin_trylock_bh(lock) #endif #ifndef CONFIG_UNINLINE_SPIN_UNLOCK #define _raw_spin_unlock(lock) __raw_spin_unlock(lock) #endif #ifdef CONFIG_INLINE_SPIN_UNLOCK_BH #define _raw_spin_unlock_bh(lock) __raw_spin_unlock_bh(lock) #endif #ifdef CONFIG_INLINE_SPIN_UNLOCK_IRQ #define _raw_spin_unlock_irq(lock) __raw_spin_unlock_irq(lock) #endif #ifdef CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE #define _raw_spin_unlock_irqrestore(lock, flags) __raw_spin_unlock_irqrestore(lock, flags) #endif static inline int __raw_spin_trylock(raw_spinlock_t *lock) { preempt_disable(); if (do_raw_spin_trylock(lock)) { spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); return 1; } preempt_enable(); return 0; } /* * If lockdep is enabled then we use the non-preemption spin-ops * even on CONFIG_PREEMPTION, because lockdep assumes that interrupts are * not re-enabled during lock-acquire (which the preempt-spin-ops do): */ #if !defined(CONFIG_GENERIC_LOCKBREAK) || defined(CONFIG_DEBUG_LOCK_ALLOC) static inline unsigned long __raw_spin_lock_irqsave(raw_spinlock_t *lock) { unsigned long flags; local_irq_save(flags); preempt_disable(); spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); /* * On lockdep we dont want the hand-coded irq-enable of * do_raw_spin_lock_flags() code, because lockdep assumes * that interrupts are not re-enabled during lock-acquire: */ #ifdef CONFIG_LOCKDEP LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock); #else do_raw_spin_lock_flags(lock, &flags); #endif return flags; } static inline void __raw_spin_lock_irq(raw_spinlock_t *lock) { local_irq_disable(); preempt_disable(); spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock); } static inline void __raw_spin_lock_bh(raw_spinlock_t *lock) { __local_bh_disable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock); } static inline void __raw_spin_lock(raw_spinlock_t *lock) { preempt_disable(); spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock); } #endif /* !CONFIG_GENERIC_LOCKBREAK || CONFIG_DEBUG_LOCK_ALLOC */ static inline void __raw_spin_unlock(raw_spinlock_t *lock) { spin_release(&lock->dep_map, _RET_IP_); do_raw_spin_unlock(lock); preempt_enable(); } static inline void __raw_spin_unlock_irqrestore(raw_spinlock_t *lock, unsigned long flags) { spin_release(&lock->dep_map, _RET_IP_); do_raw_spin_unlock(lock); local_irq_restore(flags); preempt_enable(); } static inline void __raw_spin_unlock_irq(raw_spinlock_t *lock) { spin_release(&lock->dep_map, _RET_IP_); do_raw_spin_unlock(lock); local_irq_enable(); preempt_enable(); } static inline void __raw_spin_unlock_bh(raw_spinlock_t *lock) { spin_release(&lock->dep_map, _RET_IP_); do_raw_spin_unlock(lock); __local_bh_enable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); } static inline int __raw_spin_trylock_bh(raw_spinlock_t *lock) { __local_bh_disable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); if (do_raw_spin_trylock(lock)) { spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); return 1; } __local_bh_enable_ip(_RET_IP_, SOFTIRQ_LOCK_OFFSET); return 0; } /* PREEMPT_RT has its own rwlock implementation */ #ifndef CONFIG_PREEMPT_RT #include <linux/rwlock_api_smp.h> #endif #endif /* __LINUX_SPINLOCK_API_SMP_H */ PK ! � k phy_led_triggers.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* Copyright (C) 2016 National Instruments Corp. */ #ifndef __PHY_LED_TRIGGERS #define __PHY_LED_TRIGGERS struct phy_device; #ifdef CONFIG_LED_TRIGGER_PHY #include <linux/leds.h> #include <linux/phy.h> #define PHY_LED_TRIGGER_SPEED_SUFFIX_SIZE 11 #define PHY_LINK_LED_TRIGGER_NAME_SIZE (MII_BUS_ID_SIZE + \ sizeof_field(struct mdio_device, addr)+\ PHY_LED_TRIGGER_SPEED_SUFFIX_SIZE) struct phy_led_trigger { struct led_trigger trigger; char name[PHY_LINK_LED_TRIGGER_NAME_SIZE]; unsigned int speed; }; extern int phy_led_triggers_register(struct phy_device *phy); extern void phy_led_triggers_unregister(struct phy_device *phy); extern void phy_led_trigger_change_speed(struct phy_device *phy); #else static inline int phy_led_triggers_register(struct phy_device *phy) { return 0; } static inline void phy_led_triggers_unregister(struct phy_device *phy) { } static inline void phy_led_trigger_change_speed(struct phy_device *phy) { } #endif #endif PK ! �?�E� � bug.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BUG_H #define _LINUX_BUG_H #include <asm/bug.h> #include <linux/compiler.h> #include <linux/build_bug.h> enum bug_trap_type { BUG_TRAP_TYPE_NONE = 0, BUG_TRAP_TYPE_WARN = 1, BUG_TRAP_TYPE_BUG = 2, }; struct pt_regs; #ifdef __CHECKER__ #define MAYBE_BUILD_BUG_ON(cond) (0) #else /* __CHECKER__ */ #define MAYBE_BUILD_BUG_ON(cond) \ do { \ if (__builtin_constant_p((cond))) \ BUILD_BUG_ON(cond); \ else \ BUG_ON(cond); \ } while (0) #endif /* __CHECKER__ */ #ifdef CONFIG_GENERIC_BUG #include <asm-generic/bug.h> static inline int is_warning_bug(const struct bug_entry *bug) { return bug->flags & BUGFLAG_WARNING; } void bug_get_file_line(struct bug_entry *bug, const char **file, unsigned int *line); struct bug_entry *find_bug(unsigned long bugaddr); enum bug_trap_type report_bug(unsigned long bug_addr, struct pt_regs *regs); /* These are defined by the architecture */ int is_valid_bugaddr(unsigned long addr); void generic_bug_clear_once(void); #else /* !CONFIG_GENERIC_BUG */ static inline void *find_bug(unsigned long bugaddr) { return NULL; } static inline enum bug_trap_type report_bug(unsigned long bug_addr, struct pt_regs *regs) { return BUG_TRAP_TYPE_BUG; } struct bug_entry; static inline void bug_get_file_line(struct bug_entry *bug, const char **file, unsigned int *line) { *file = NULL; *line = 0; } static inline void generic_bug_clear_once(void) {} #endif /* CONFIG_GENERIC_BUG */ /* * Since detected data corruption should stop operation on the affected * structures. Return value must be checked and sanely acted on by caller. */ static inline __must_check bool check_data_corruption(bool v) { return v; } #define CHECK_DATA_CORRUPTION(condition, fmt, ...) \ check_data_corruption(({ \ bool corruption = unlikely(condition); \ if (corruption) { \ if (IS_ENABLED(CONFIG_BUG_ON_DATA_CORRUPTION)) { \ pr_err(fmt, ##__VA_ARGS__); \ BUG(); \ } else \ WARN(1, fmt, ##__VA_ARGS__); \ } \ corruption; \ })) #endif /* _LINUX_BUG_H */ PK ! �x��k k root_dev.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ROOT_DEV_H_ #define _ROOT_DEV_H_ #include <linux/major.h> #include <linux/types.h> #include <linux/kdev_t.h> enum { Root_NFS = MKDEV(UNNAMED_MAJOR, 255), Root_CIFS = MKDEV(UNNAMED_MAJOR, 254), Root_RAM0 = MKDEV(RAMDISK_MAJOR, 0), Root_RAM1 = MKDEV(RAMDISK_MAJOR, 1), Root_FD0 = MKDEV(FLOPPY_MAJOR, 0), Root_HDA1 = MKDEV(IDE0_MAJOR, 1), Root_HDA2 = MKDEV(IDE0_MAJOR, 2), Root_SDA1 = MKDEV(SCSI_DISK0_MAJOR, 1), Root_SDA2 = MKDEV(SCSI_DISK0_MAJOR, 2), Root_HDC1 = MKDEV(IDE1_MAJOR, 1), Root_SR0 = MKDEV(SCSI_CDROM_MAJOR, 0), }; extern dev_t ROOT_DEV; #endif PK ! Ȫ4 (h (h mhi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. * */ #ifndef _MHI_H_ #define _MHI_H_ #include <linux/device.h> #include <linux/dma-direction.h> #include <linux/mutex.h> #include <linux/skbuff.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/workqueue.h> #define MHI_MAX_OEM_PK_HASH_SEGMENTS 16 struct mhi_chan; struct mhi_event; struct mhi_ctxt; struct mhi_cmd; struct mhi_buf_info; /** * enum mhi_callback - MHI callback * @MHI_CB_IDLE: MHI entered idle state * @MHI_CB_PENDING_DATA: New data available for client to process * @MHI_CB_LPM_ENTER: MHI host entered low power mode * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state * @MHI_CB_BW_REQ: Received a bandwidth switch request from device */ enum mhi_callback { MHI_CB_IDLE, MHI_CB_PENDING_DATA, MHI_CB_LPM_ENTER, MHI_CB_LPM_EXIT, MHI_CB_EE_RDDM, MHI_CB_EE_MISSION_MODE, MHI_CB_SYS_ERROR, MHI_CB_FATAL_ERROR, MHI_CB_BW_REQ, }; /** * enum mhi_flags - Transfer flags * @MHI_EOB: End of buffer for bulk transfer * @MHI_EOT: End of transfer * @MHI_CHAIN: Linked transfer */ enum mhi_flags { MHI_EOB = BIT(0), MHI_EOT = BIT(1), MHI_CHAIN = BIT(2), }; /** * enum mhi_device_type - Device types * @MHI_DEVICE_XFER: Handles data transfer * @MHI_DEVICE_CONTROLLER: Control device */ enum mhi_device_type { MHI_DEVICE_XFER, MHI_DEVICE_CONTROLLER, }; /** * enum mhi_ch_type - Channel types * @MHI_CH_TYPE_INVALID: Invalid channel type * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device * @MHI_CH_TYPE_INBOUND: Inbound channel from the device * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine * multiple packets and send them as a single * large packet to reduce CPU consumption */ enum mhi_ch_type { MHI_CH_TYPE_INVALID = 0, MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, MHI_CH_TYPE_INBOUND_COALESCED = 3, }; /** * struct image_info - Firmware and RDDM table * @mhi_buf: Buffer for firmware and RDDM table * @entries: # of entries in table */ struct image_info { struct mhi_buf *mhi_buf; /* private: from internal.h */ struct bhi_vec_entry *bhi_vec; /* public: */ u32 entries; }; /** * struct mhi_link_info - BW requirement * target_link_speed - Link speed as defined by TLS bits in LinkControl reg * target_link_width - Link width as defined by NLW bits in LinkStatus reg */ struct mhi_link_info { unsigned int target_link_speed; unsigned int target_link_width; }; /** * enum mhi_ee_type - Execution environment types * @MHI_EE_PBL: Primary Bootloader * @MHI_EE_SBL: Secondary Bootloader * @MHI_EE_AMSS: Modem, aka the primary runtime EE * @MHI_EE_RDDM: Ram dump download mode * @MHI_EE_WFW: WLAN firmware mode * @MHI_EE_PTHRU: Passthrough * @MHI_EE_EDL: Embedded downloader * @MHI_EE_FP: Flash Programmer Environment */ enum mhi_ee_type { MHI_EE_PBL, MHI_EE_SBL, MHI_EE_AMSS, MHI_EE_RDDM, MHI_EE_WFW, MHI_EE_PTHRU, MHI_EE_EDL, MHI_EE_FP, MHI_EE_MAX_SUPPORTED = MHI_EE_FP, MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ MHI_EE_NOT_SUPPORTED, MHI_EE_MAX, }; /** * enum mhi_state - MHI states * @MHI_STATE_RESET: Reset state * @MHI_STATE_READY: Ready state * @MHI_STATE_M0: M0 state * @MHI_STATE_M1: M1 state * @MHI_STATE_M2: M2 state * @MHI_STATE_M3: M3 state * @MHI_STATE_M3_FAST: M3 Fast state * @MHI_STATE_BHI: BHI state * @MHI_STATE_SYS_ERR: System Error state */ enum mhi_state { MHI_STATE_RESET = 0x0, MHI_STATE_READY = 0x1, MHI_STATE_M0 = 0x2, MHI_STATE_M1 = 0x3, MHI_STATE_M2 = 0x4, MHI_STATE_M3 = 0x5, MHI_STATE_M3_FAST = 0x6, MHI_STATE_BHI = 0x7, MHI_STATE_SYS_ERR = 0xFF, MHI_STATE_MAX, }; /** * enum mhi_ch_ee_mask - Execution environment mask for channel * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE */ enum mhi_ch_ee_mask { MHI_CH_EE_PBL = BIT(MHI_EE_PBL), MHI_CH_EE_SBL = BIT(MHI_EE_SBL), MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), MHI_CH_EE_WFW = BIT(MHI_EE_WFW), MHI_CH_EE_EDL = BIT(MHI_EE_EDL), }; /** * enum mhi_er_data_type - Event ring data types * @MHI_ER_DATA: Only client data over this ring * @MHI_ER_CTRL: MHI control data and client data */ enum mhi_er_data_type { MHI_ER_DATA, MHI_ER_CTRL, }; /** * enum mhi_db_brst_mode - Doorbell mode * @MHI_DB_BRST_DISABLE: Burst mode disable * @MHI_DB_BRST_ENABLE: Burst mode enable */ enum mhi_db_brst_mode { MHI_DB_BRST_DISABLE = 0x2, MHI_DB_BRST_ENABLE = 0x3, }; /** * struct mhi_channel_config - Channel configuration structure for controller * @name: The name of this channel * @num: The number assigned to this channel * @num_elements: The number of elements that can be queued to this channel * @local_elements: The local ring length of the channel * @event_ring: The event ring index that services this channel * @dir: Direction that data may flow on this channel * @type: Channel type * @ee_mask: Execution Environment mask for this channel * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds for UL channels, multiple of 8 ring elements for DL channels * @doorbell: Doorbell mode * @lpm_notify: The channel master requires low power mode notifications * @offload_channel: The client manages the channel completely * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition * @auto_queue: Framework will automatically queue buffers for DL traffic * @wake-capable: Channel capable of waking up the system */ struct mhi_channel_config { char *name; u32 num; u32 num_elements; u32 local_elements; u32 event_ring; enum dma_data_direction dir; enum mhi_ch_type type; u32 ee_mask; u32 pollcfg; enum mhi_db_brst_mode doorbell; bool lpm_notify; bool offload_channel; bool doorbell_mode_switch; bool auto_queue; bool wake_capable; }; /** * struct mhi_event_config - Event ring configuration structure for controller * @num_elements: The number of elements that can be queued to this ring * @irq_moderation_ms: Delay irq for additional events to be aggregated * @irq: IRQ associated with this ring * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring * @priority: Priority of this ring. Use 1 for now * @mode: Doorbell mode * @data_type: Type of data this ring will process * @hardware_event: This ring is associated with hardware channels * @client_managed: This ring is client managed * @offload_channel: This ring is associated with an offloaded channel */ struct mhi_event_config { u32 num_elements; u32 irq_moderation_ms; u32 irq; u32 channel; u32 priority; enum mhi_db_brst_mode mode; enum mhi_er_data_type data_type; bool hardware_event; bool client_managed; bool offload_channel; }; /** * struct mhi_controller_config - Root MHI controller configuration * @max_channels: Maximum number of channels supported * @timeout_ms: Timeout value for operations. 0 means use default * @buf_len: Size of automatically allocated buffers. 0 means use default * @num_channels: Number of channels defined in @ch_cfg * @ch_cfg: Array of defined channels * @num_events: Number of event rings defined in @event_cfg * @event_cfg: Array of defined event rings * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access * @m2_no_db: Host is not allowed to ring DB in M2 state */ struct mhi_controller_config { u32 max_channels; u32 timeout_ms; u32 buf_len; u32 num_channels; const struct mhi_channel_config *ch_cfg; u32 num_events; struct mhi_event_config *event_cfg; bool use_bounce_buf; bool m2_no_db; }; /** * struct mhi_controller - Master MHI controller structure * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI * controller (required) * @mhi_dev: MHI device instance for the controller * @debugfs_dentry: MHI controller debugfs directory * @regs: Base address of MHI MMIO register space (required) * @bhi: Points to base of MHI BHI register space * @bhie: Points to base of MHI BHIe register space * @wake_db: MHI WAKE doorbell register address * @iova_start: IOMMU starting address for data (required) * @iova_stop: IOMMU stop address for data (required) * @fw_image: Firmware image name for normal booting (optional) * @edl_image: Firmware image name for emergency download mode (optional) * @rddm_size: RAM dump size that host should allocate for debugging purpose * @sbl_size: SBL image size downloaded through BHIe (optional) * @seg_len: BHIe vector size (optional) * @reg_len: Length of the MHI MMIO region (required) * @fbc_image: Points to firmware image buffer * @rddm_image: Points to RAM dump buffer * @mhi_chan: Points to the channel configuration table * @lpm_chans: List of channels that require LPM notifications * @irq: base irq # to request (required) * @max_chan: Maximum number of channels the controller supports * @total_ev_rings: Total # of event rings allocated * @hw_ev_rings: Number of hardware event rings * @sw_ev_rings: Number of software event rings * @nr_irqs: Number of IRQ allocated by bus master (required) * @family_number: MHI controller family number * @device_number: MHI controller device number * @major_version: MHI controller major revision number * @minor_version: MHI controller minor revision number * @serial_number: MHI controller serial number obtained from BHI * @oem_pk_hash: MHI controller OEM PK Hash obtained from BHI * @mhi_event: MHI event ring configurations table * @mhi_cmd: MHI command ring configurations table * @mhi_ctxt: MHI device context, shared memory between host and device * @pm_mutex: Mutex for suspend/resume operation * @pm_lock: Lock for protecting MHI power management state * @timeout_ms: Timeout in ms for state transitions * @pm_state: MHI power management state * @db_access: DB access states * @ee: MHI device execution environment * @dev_state: MHI device state * @dev_wake: Device wakeup count * @pending_pkts: Pending packets for the controller * @M0, M2, M3: Counters to track number of device MHI state changes * @transition_list: List of MHI state transitions * @transition_lock: Lock for protecting MHI state transition list * @wlock: Lock for protecting device wakeup * @mhi_link_info: Device bandwidth info * @st_worker: State transition worker * @hiprio_wq: High priority workqueue for MHI work such as state transitions * @state_event: State change event * @status_cb: CB function to notify power states of the device (required) * @wake_get: CB function to assert device wake (optional) * @wake_put: CB function to de-assert device wake (optional) * @wake_toggle: CB function to assert and de-assert device wake (optional) * @runtime_get: CB function to controller runtime resume (required) * @runtime_put: CB function to decrement pm usage (required) * @map_single: CB function to create TRE buffer * @unmap_single: CB function to destroy TRE buffer * @read_reg: Read a MHI register via the physical link (required) * @write_reg: Write a MHI register via the physical link (required) * @reset: Controller specific reset function (optional) * @buffer_len: Bounce buffer length * @index: Index of the MHI controller instance * @bounce_buf: Use of bounce buffer * @fbc_download: MHI host needs to do complete image transfer (optional) * @wake_set: Device wakeup set flag * @irq_flags: irq flags passed to request_irq (optional) * @mru: the default MRU for the MHI device * * Fields marked as (required) need to be populated by the controller driver * before calling mhi_register_controller(). For the fields marked as (optional) * they can be populated depending on the usecase. * * The following fields are present for the purpose of implementing any device * specific quirks or customizations for specific MHI revisions used in device * by the controller drivers. The MHI stack will just populate these fields * during mhi_register_controller(): * family_number * device_number * major_version * minor_version */ struct mhi_controller { struct device *cntrl_dev; struct mhi_device *mhi_dev; struct dentry *debugfs_dentry; void __iomem *regs; void __iomem *bhi; void __iomem *bhie; void __iomem *wake_db; dma_addr_t iova_start; dma_addr_t iova_stop; const char *fw_image; const char *edl_image; size_t rddm_size; size_t sbl_size; size_t seg_len; size_t reg_len; struct image_info *fbc_image; struct image_info *rddm_image; struct mhi_chan *mhi_chan; struct list_head lpm_chans; int *irq; u32 max_chan; u32 total_ev_rings; u32 hw_ev_rings; u32 sw_ev_rings; u32 nr_irqs; u32 family_number; u32 device_number; u32 major_version; u32 minor_version; u32 serial_number; u32 oem_pk_hash[MHI_MAX_OEM_PK_HASH_SEGMENTS]; struct mhi_event *mhi_event; struct mhi_cmd *mhi_cmd; struct mhi_ctxt *mhi_ctxt; struct mutex pm_mutex; rwlock_t pm_lock; u32 timeout_ms; u32 pm_state; u32 db_access; enum mhi_ee_type ee; enum mhi_state dev_state; atomic_t dev_wake; atomic_t pending_pkts; u32 M0, M2, M3; struct list_head transition_list; spinlock_t transition_lock; spinlock_t wlock; struct mhi_link_info mhi_link_info; struct work_struct st_worker; struct workqueue_struct *hiprio_wq; wait_queue_head_t state_event; void (*status_cb)(struct mhi_controller *mhi_cntrl, enum mhi_callback cb); void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); void (*wake_toggle)(struct mhi_controller *mhi_cntrl); int (*runtime_get)(struct mhi_controller *mhi_cntrl); void (*runtime_put)(struct mhi_controller *mhi_cntrl); int (*map_single)(struct mhi_controller *mhi_cntrl, struct mhi_buf_info *buf); void (*unmap_single)(struct mhi_controller *mhi_cntrl, struct mhi_buf_info *buf); int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out); void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 val); void (*reset)(struct mhi_controller *mhi_cntrl); size_t buffer_len; int index; bool bounce_buf; bool fbc_download; bool wake_set; unsigned long irq_flags; u32 mru; }; /** * struct mhi_device - Structure representing an MHI device which binds * to channels or is associated with controllers * @id: Pointer to MHI device ID struct * @name: Name of the associated MHI device * @mhi_cntrl: Controller the device belongs to * @ul_chan: UL channel for the device * @dl_chan: DL channel for the device * @dev: Driver model device node for the MHI device * @dev_type: MHI device type * @ul_chan_id: MHI channel id for UL transfer * @dl_chan_id: MHI channel id for DL transfer * @dev_wake: Device wakeup counter */ struct mhi_device { const struct mhi_device_id *id; const char *name; struct mhi_controller *mhi_cntrl; struct mhi_chan *ul_chan; struct mhi_chan *dl_chan; struct device dev; enum mhi_device_type dev_type; int ul_chan_id; int dl_chan_id; u32 dev_wake; }; /** * struct mhi_result - Completed buffer information * @buf_addr: Address of data buffer * @bytes_xferd: # of bytes transferred * @dir: Channel direction * @transaction_status: Status of last transaction */ struct mhi_result { void *buf_addr; size_t bytes_xferd; enum dma_data_direction dir; int transaction_status; }; /** * struct mhi_buf - MHI Buffer description * @buf: Virtual address of the buffer * @name: Buffer label. For offload channel, configurations name must be: * ECA - Event context array data * CCA - Channel context array data * @dma_addr: IOMMU address of the buffer * @len: # of bytes */ struct mhi_buf { void *buf; const char *name; dma_addr_t dma_addr; size_t len; }; /** * struct mhi_driver - Structure representing a MHI client driver * @probe: CB function for client driver probe function * @remove: CB function for client driver remove function * @ul_xfer_cb: CB function for UL data transfer * @dl_xfer_cb: CB function for DL data transfer * @status_cb: CB functions for asynchronous status * @driver: Device driver model driver */ struct mhi_driver { const struct mhi_device_id *id_table; int (*probe)(struct mhi_device *mhi_dev, const struct mhi_device_id *id); void (*remove)(struct mhi_device *mhi_dev); void (*ul_xfer_cb)(struct mhi_device *mhi_dev, struct mhi_result *result); void (*dl_xfer_cb)(struct mhi_device *mhi_dev, struct mhi_result *result); void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); struct device_driver driver; }; #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver) #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) /** * mhi_alloc_controller - Allocate the MHI Controller structure * Allocate the mhi_controller structure using zero initialized memory */ struct mhi_controller *mhi_alloc_controller(void); /** * mhi_free_controller - Free the MHI Controller structure * Free the mhi_controller structure which was previously allocated */ void mhi_free_controller(struct mhi_controller *mhi_cntrl); /** * mhi_register_controller - Register MHI controller * @mhi_cntrl: MHI controller to register * @config: Configuration to use for the controller */ int mhi_register_controller(struct mhi_controller *mhi_cntrl, const struct mhi_controller_config *config); /** * mhi_unregister_controller - Unregister MHI controller * @mhi_cntrl: MHI controller to unregister */ void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); /* * module_mhi_driver() - Helper macro for drivers that don't do * anything special other than using default mhi_driver_register() and * mhi_driver_unregister(). This eliminates a lot of boilerplate. * Each module may only use this macro once. */ #define module_mhi_driver(mhi_drv) \ module_driver(mhi_drv, mhi_driver_register, \ mhi_driver_unregister) /* * Macro to avoid include chaining to get THIS_MODULE */ #define mhi_driver_register(mhi_drv) \ __mhi_driver_register(mhi_drv, THIS_MODULE) /** * __mhi_driver_register - Register driver with MHI framework * @mhi_drv: Driver associated with the device * @owner: The module owner */ int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner); /** * mhi_driver_unregister - Unregister a driver for mhi_devices * @mhi_drv: Driver associated with the device */ void mhi_driver_unregister(struct mhi_driver *mhi_drv); /** * mhi_set_mhi_state - Set MHI device state * @mhi_cntrl: MHI controller * @state: State to set */ void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, enum mhi_state state); /** * mhi_notify - Notify the MHI client driver about client device status * @mhi_dev: MHI device instance * @cb_reason: MHI callback reason */ void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason); /** * mhi_get_free_desc_count - Get transfer ring length * Get # of TD available to queue buffers * @mhi_dev: Device associated with the channels * @dir: Direction of the channel */ int mhi_get_free_desc_count(struct mhi_device *mhi_dev, enum dma_data_direction dir); /** * mhi_prepare_for_power_up - Do pre-initialization before power up. * This is optional, call this before power up if * the controller does not want bus framework to * automatically free any allocated memory during * shutdown process. * @mhi_cntrl: MHI controller */ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl); /** * mhi_async_power_up - Start MHI power up sequence * @mhi_cntrl: MHI controller */ int mhi_async_power_up(struct mhi_controller *mhi_cntrl); /** * mhi_sync_power_up - Start MHI power up sequence and wait till the device * enters valid EE state * @mhi_cntrl: MHI controller */ int mhi_sync_power_up(struct mhi_controller *mhi_cntrl); /** * mhi_power_down - Start MHI power down sequence * @mhi_cntrl: MHI controller * @graceful: Link is still accessible, so do a graceful shutdown process */ void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful); /** * mhi_unprepare_after_power_down - Free any allocated memory after power down * @mhi_cntrl: MHI controller */ void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl); /** * mhi_pm_suspend - Move MHI into a suspended state * @mhi_cntrl: MHI controller */ int mhi_pm_suspend(struct mhi_controller *mhi_cntrl); /** * mhi_pm_resume - Resume MHI from suspended state * @mhi_cntrl: MHI controller */ int mhi_pm_resume(struct mhi_controller *mhi_cntrl); /** * mhi_pm_resume_force - Force resume MHI from suspended state * @mhi_cntrl: MHI controller * * Resume the device irrespective of its MHI state. As per the MHI spec, devices * has to be in M3 state during resume. But some devices seem to be in a * different MHI state other than M3 but they continue working fine if allowed. * This API is intented to be used for such devices. * * Return: 0 if the resume succeeds, a negative error code otherwise */ int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl); /** * mhi_download_rddm_image - Download ramdump image from device for * debugging purpose. * @mhi_cntrl: MHI controller * @in_panic: Download rddm image during kernel panic */ int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic); /** * mhi_force_rddm_mode - Force device into rddm mode * @mhi_cntrl: MHI controller */ int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl); /** * mhi_get_exec_env - Get BHI execution environment of the device * @mhi_cntrl: MHI controller */ enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); /** * mhi_get_mhi_state - Get MHI state of the device * @mhi_cntrl: MHI controller */ enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); /** * mhi_soc_reset - Trigger a device reset. This can be used as a last resort * to reset and recover a device. * @mhi_cntrl: MHI controller */ void mhi_soc_reset(struct mhi_controller *mhi_cntrl); /** * mhi_device_get - Disable device low power mode * @mhi_dev: Device associated with the channel */ void mhi_device_get(struct mhi_device *mhi_dev); /** * mhi_device_get_sync - Disable device low power mode. Synchronously * take the controller out of suspended state * @mhi_dev: Device associated with the channel */ int mhi_device_get_sync(struct mhi_device *mhi_dev); /** * mhi_device_put - Re-enable device low power mode * @mhi_dev: Device associated with the channel */ void mhi_device_put(struct mhi_device *mhi_dev); /** * mhi_prepare_for_transfer - Setup UL and DL channels for data transfer. * Allocate and initialize the channel context and * also issue the START channel command to both * channels. Channels can be started only if both * host and device execution environments match and * channels are in a DISABLED state. * @mhi_dev: Device associated with the channels */ int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); /** * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer. * Issue the RESET channel command and let the * device clean-up the context so no incoming * transfers are seen on the host. Free memory * associated with the context on host. If device * is unresponsive, only perform a host side * clean-up. Channels can be reset only if both * host and device execution environments match * and channels are in an ENABLED, STOPPED or * SUSPENDED state. * @mhi_dev: Device associated with the channels */ void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev); /** * mhi_poll - Poll for any available data in DL direction * @mhi_dev: Device associated with the channels * @budget: # of events to process */ int mhi_poll(struct mhi_device *mhi_dev, u32 budget); /** * mhi_queue_dma - Send or receive DMA mapped buffers from client device * over MHI channel * @mhi_dev: Device associated with the channels * @dir: DMA direction for the channel * @mhi_buf: Buffer for holding the DMA mapped data * @len: Buffer length * @mflags: MHI transfer flags used for the transfer */ int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir, struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags); /** * mhi_queue_buf - Send or receive raw buffers from client device over MHI * channel * @mhi_dev: Device associated with the channels * @dir: DMA direction for the channel * @buf: Buffer for holding the data * @len: Buffer length * @mflags: MHI transfer flags used for the transfer */ int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir, void *buf, size_t len, enum mhi_flags mflags); /** * mhi_queue_skb - Send or receive SKBs from client device over MHI channel * @mhi_dev: Device associated with the channels * @dir: DMA direction for the channel * @skb: Buffer for holding SKBs * @len: Buffer length * @mflags: MHI transfer flags used for the transfer */ int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir, struct sk_buff *skb, size_t len, enum mhi_flags mflags); /** * mhi_queue_is_full - Determine whether queueing new elements is possible * @mhi_dev: Device associated with the channels * @dir: DMA direction for the channel */ bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir); #endif /* _MHI_H_ */ PK ! ��\m� � greybus.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus driver and device API * * Copyright 2014-2015 Google Inc. * Copyright 2014-2015 Linaro Ltd. */ #ifndef __LINUX_GREYBUS_H #define __LINUX_GREYBUS_H #ifdef __KERNEL__ #include <linux/kernel.h> #include <linux/types.h> #include <linux/list.h> #include <linux/slab.h> #include <linux/device.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/idr.h> #include <linux/greybus/greybus_id.h> #include <linux/greybus/greybus_manifest.h> #include <linux/greybus/greybus_protocols.h> #include <linux/greybus/manifest.h> #include <linux/greybus/hd.h> #include <linux/greybus/svc.h> #include <linux/greybus/control.h> #include <linux/greybus/module.h> #include <linux/greybus/interface.h> #include <linux/greybus/bundle.h> #include <linux/greybus/connection.h> #include <linux/greybus/operation.h> /* Matches up with the Greybus Protocol specification document */ #define GREYBUS_VERSION_MAJOR 0x00 #define GREYBUS_VERSION_MINOR 0x01 #define GREYBUS_ID_MATCH_DEVICE \ (GREYBUS_ID_MATCH_VENDOR | GREYBUS_ID_MATCH_PRODUCT) #define GREYBUS_DEVICE(v, p) \ .match_flags = GREYBUS_ID_MATCH_DEVICE, \ .vendor = (v), \ .product = (p), #define GREYBUS_DEVICE_CLASS(c) \ .match_flags = GREYBUS_ID_MATCH_CLASS, \ .class = (c), /* Maximum number of CPorts */ #define CPORT_ID_MAX 4095 /* UniPro max id is 4095 */ #define CPORT_ID_BAD U16_MAX struct greybus_driver { const char *name; int (*probe)(struct gb_bundle *bundle, const struct greybus_bundle_id *id); void (*disconnect)(struct gb_bundle *bundle); const struct greybus_bundle_id *id_table; struct device_driver driver; }; #define to_greybus_driver(d) container_of(d, struct greybus_driver, driver) static inline void greybus_set_drvdata(struct gb_bundle *bundle, void *data) { dev_set_drvdata(&bundle->dev, data); } static inline void *greybus_get_drvdata(struct gb_bundle *bundle) { return dev_get_drvdata(&bundle->dev); } /* Don't call these directly, use the module_greybus_driver() macro instead */ int greybus_register_driver(struct greybus_driver *driver, struct module *module, const char *mod_name); void greybus_deregister_driver(struct greybus_driver *driver); /* define to get proper THIS_MODULE and KBUILD_MODNAME values */ #define greybus_register(driver) \ greybus_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) #define greybus_deregister(driver) \ greybus_deregister_driver(driver) /** * module_greybus_driver() - Helper macro for registering a Greybus driver * @__greybus_driver: greybus_driver structure * * Helper macro for Greybus drivers to set up proper module init / exit * functions. Replaces module_init() and module_exit() and keeps people from * printing pointless things to the kernel log when their driver is loaded. */ #define module_greybus_driver(__greybus_driver) \ module_driver(__greybus_driver, greybus_register, greybus_deregister) int greybus_disabled(void); void gb_debugfs_init(void); void gb_debugfs_cleanup(void); struct dentry *gb_debugfs_get(void); extern struct bus_type greybus_bus_type; extern struct device_type greybus_hd_type; extern struct device_type greybus_module_type; extern struct device_type greybus_interface_type; extern struct device_type greybus_control_type; extern struct device_type greybus_bundle_type; extern struct device_type greybus_svc_type; static inline int is_gb_host_device(const struct device *dev) { return dev->type == &greybus_hd_type; } static inline int is_gb_module(const struct device *dev) { return dev->type == &greybus_module_type; } static inline int is_gb_interface(const struct device *dev) { return dev->type == &greybus_interface_type; } static inline int is_gb_control(const struct device *dev) { return dev->type == &greybus_control_type; } static inline int is_gb_bundle(const struct device *dev) { return dev->type == &greybus_bundle_type; } static inline int is_gb_svc(const struct device *dev) { return dev->type == &greybus_svc_type; } static inline bool cport_id_valid(struct gb_host_device *hd, u16 cport_id) { return cport_id != CPORT_ID_BAD && cport_id < hd->num_cports; } #endif /* __KERNEL__ */ #endif /* __LINUX_GREYBUS_H */ PK ! �3� ts-nbus.hnu �[��� /* * Copyright (c) 2016 - Savoir-faire Linux * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #ifndef _TS_NBUS_H #define _TS_NBUS_H struct ts_nbus; extern int ts_nbus_read(struct ts_nbus *ts_nbus, u8 adr, u16 *val); extern int ts_nbus_write(struct ts_nbus *ts_nbus, u8 adr, u16 val); #endif /* _TS_NBUS_H */ PK ! ֜�� � patchkey.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * <linux/patchkey.h> -- definition of _PATCHKEY macro * * Copyright (C) 2005 Stuart Brady * * This exists because awe_voice.h defined its own _PATCHKEY and it wasn't * clear whether removing this would break anything in userspace. * * Do not include this file directly. Please use <sys/soundcard.h> instead. * For kernel code, use <linux/soundcard.h> */ #ifndef _LINUX_PATCHKEY_H #define _LINUX_PATCHKEY_H # include <asm/byteorder.h> #include <uapi/linux/patchkey.h> # if defined(__BIG_ENDIAN) # define _PATCHKEY(id) (0xfd00|id) # elif defined(__LITTLE_ENDIAN) # define _PATCHKEY(id) ((id<<8)|0x00fd) # else # error "could not determine byte order" # endif #endif /* _LINUX_PATCHKEY_H */ PK ! �ڵ�C C atmel-isc-media.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries * * Author: Eugen Hristev <eugen.hristev@microchip.com> */ #ifndef __LINUX_ATMEL_ISC_MEDIA_H__ #define __LINUX_ATMEL_ISC_MEDIA_H__ /* * There are 8 controls available: * 4 gain controls, sliders, for each of the BAYER components: R, B, GR, GB. * These gains are multipliers for each component, in format unsigned 0:4:9 with * a default value of 512 (1.0 multiplier). * 4 offset controls, sliders, for each of the BAYER components: R, B, GR, GB. * These offsets are added/substracted from each component, in format signed * 1:12:0 with a default value of 0 (+/- 0) * * To expose this to userspace, added 8 custom controls, in an auto cluster. * * To summarize the functionality: * The auto cluster switch is the auto white balance control, and it works * like this: * AWB == 1: autowhitebalance is on, the do_white_balance button is inactive, * the gains/offsets are inactive, but volatile and readable. * Thus, the results of the whitebalance algorithm are available to userspace to * read at any time. * AWB == 0: autowhitebalance is off, cluster is in manual mode, user can * configure the gain/offsets directly. * More than that, if the do_white_balance button is * pressed, the driver will perform one-time-adjustment, (preferably with color * checker card) and the userspace can read again the new values. * * With this feature, the userspace can save the coefficients and reinstall them * for example after reboot or reprobing the driver. */ enum atmel_isc_ctrl_id { /* Red component gain control */ ISC_CID_R_GAIN = (V4L2_CID_USER_ATMEL_ISC_BASE + 0), /* Blue component gain control */ ISC_CID_B_GAIN, /* Green Red component gain control */ ISC_CID_GR_GAIN, /* Green Blue gain control */ ISC_CID_GB_GAIN, /* Red component offset control */ ISC_CID_R_OFFSET, /* Blue component offset control */ ISC_CID_B_OFFSET, /* Green Red component offset control */ ISC_CID_GR_OFFSET, /* Green Blue component offset control */ ISC_CID_GB_OFFSET, }; #endif PK ! �h)> > superhyway.hnu �[��� /* * include/linux/superhyway.h * * SuperHyway Bus definitions * * Copyright (C) 2004, 2005 Paul Mundt <lethal@linux-sh.org> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef __LINUX_SUPERHYWAY_H #define __LINUX_SUPERHYWAY_H #include <linux/device.h> /* * SuperHyway IDs */ #define SUPERHYWAY_DEVICE_ID_SH5_DMAC 0x0183 struct superhyway_vcr_info { u8 perr_flags; /* P-port Error flags */ u8 merr_flags; /* Module Error flags */ u16 mod_vers; /* Module Version */ u16 mod_id; /* Module ID */ u8 bot_mb; /* Bottom Memory block */ u8 top_mb; /* Top Memory block */ }; struct superhyway_ops { int (*read_vcr)(unsigned long base, struct superhyway_vcr_info *vcr); int (*write_vcr)(unsigned long base, struct superhyway_vcr_info vcr); }; struct superhyway_bus { struct superhyway_ops *ops; }; extern struct superhyway_bus superhyway_channels[]; struct superhyway_device_id { unsigned int id; unsigned long driver_data; }; struct superhyway_device; extern struct bus_type superhyway_bus_type; struct superhyway_driver { char *name; const struct superhyway_device_id *id_table; struct device_driver drv; int (*probe)(struct superhyway_device *dev, const struct superhyway_device_id *id); void (*remove)(struct superhyway_device *dev); }; #define to_superhyway_driver(d) container_of((d), struct superhyway_driver, drv) struct superhyway_device { char name[32]; struct device dev; struct superhyway_device_id id; struct superhyway_driver *drv; struct superhyway_bus *bus; int num_resources; struct resource *resource; struct superhyway_vcr_info vcr; }; #define to_superhyway_device(d) container_of((d), struct superhyway_device, dev) #define superhyway_get_drvdata(d) dev_get_drvdata(&(d)->dev) #define superhyway_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p)) static inline int superhyway_read_vcr(struct superhyway_device *dev, unsigned long base, struct superhyway_vcr_info *vcr) { return dev->bus->ops->read_vcr(base, vcr); } static inline int superhyway_write_vcr(struct superhyway_device *dev, unsigned long base, struct superhyway_vcr_info vcr) { return dev->bus->ops->write_vcr(base, vcr); } extern int superhyway_scan_bus(struct superhyway_bus *); /* drivers/sh/superhyway/superhyway.c */ int superhyway_register_driver(struct superhyway_driver *); void superhyway_unregister_driver(struct superhyway_driver *); int superhyway_add_device(unsigned long base, struct superhyway_device *, struct superhyway_bus *); int superhyway_add_devices(struct superhyway_bus *bus, struct superhyway_device **devices, int nr_devices); /* drivers/sh/superhyway/superhyway-sysfs.c */ extern const struct attribute_group *superhyway_dev_groups[]; #endif /* __LINUX_SUPERHYWAY_H */ PK ! c 9<� � lockdep_types.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Runtime locking correctness validator * * Copyright (C) 2006,2007 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> * Copyright (C) 2007 Red Hat, Inc., Peter Zijlstra * * see Documentation/locking/lockdep-design.rst for more details. */ #ifndef __LINUX_LOCKDEP_TYPES_H #define __LINUX_LOCKDEP_TYPES_H #include <linux/types.h> #define MAX_LOCKDEP_SUBCLASSES 8UL enum lockdep_wait_type { LD_WAIT_INV = 0, /* not checked, catch all */ LD_WAIT_FREE, /* wait free, rcu etc.. */ LD_WAIT_SPIN, /* spin loops, raw_spinlock_t etc.. */ #ifdef CONFIG_PROVE_RAW_LOCK_NESTING LD_WAIT_CONFIG, /* CONFIG_PREEMPT_LOCK, spinlock_t etc.. */ #else LD_WAIT_CONFIG = LD_WAIT_SPIN, #endif LD_WAIT_SLEEP, /* sleeping locks, mutex_t etc.. */ LD_WAIT_MAX, /* must be last */ }; enum lockdep_lock_type { LD_LOCK_NORMAL = 0, /* normal, catch all */ LD_LOCK_PERCPU, /* percpu */ LD_LOCK_MAX, }; #ifdef CONFIG_LOCKDEP /* * We'd rather not expose kernel/lockdep_states.h this wide, but we do need * the total number of states... :-( * * XXX_LOCK_USAGE_STATES is the number of lines in lockdep_states.h, for each * of those we generates 4 states, Additionally we report on USED and USED_READ. */ #define XXX_LOCK_USAGE_STATES 2 #define LOCK_TRACE_STATES (XXX_LOCK_USAGE_STATES*4 + 2) /* * NR_LOCKDEP_CACHING_CLASSES ... Number of classes * cached in the instance of lockdep_map * * Currently main class (subclass == 0) and single depth subclass * are cached in lockdep_map. This optimization is mainly targeting * on rq->lock. double_rq_lock() acquires this highly competitive with * single depth. */ #define NR_LOCKDEP_CACHING_CLASSES 2 /* * A lockdep key is associated with each lock object. For static locks we use * the lock address itself as the key. Dynamically allocated lock objects can * have a statically or dynamically allocated key. Dynamically allocated lock * keys must be registered before being used and must be unregistered before * the key memory is freed. */ struct lockdep_subclass_key { char __one_byte; } __attribute__ ((__packed__)); /* hash_entry is used to keep track of dynamically allocated keys. */ struct lock_class_key { union { struct hlist_node hash_entry; struct lockdep_subclass_key subkeys[MAX_LOCKDEP_SUBCLASSES]; }; }; extern struct lock_class_key __lockdep_no_validate__; struct lock_trace; #define LOCKSTAT_POINTS 4 /* * The lock-class itself. The order of the structure members matters. * reinit_class() zeroes the key member and all subsequent members. */ struct lock_class { /* * class-hash: */ struct hlist_node hash_entry; /* * Entry in all_lock_classes when in use. Entry in free_lock_classes * when not in use. Instances that are being freed are on one of the * zapped_classes lists. */ struct list_head lock_entry; /* * These fields represent a directed graph of lock dependencies, * to every node we attach a list of "forward" and a list of * "backward" graph nodes. */ struct list_head locks_after, locks_before; const struct lockdep_subclass_key *key; unsigned int subclass; unsigned int dep_gen_id; /* * IRQ/softirq usage tracking bits: */ unsigned long usage_mask; const struct lock_trace *usage_traces[LOCK_TRACE_STATES]; /* * Generation counter, when doing certain classes of graph walking, * to ensure that we check one node only once: */ int name_version; const char *name; u8 wait_type_inner; u8 wait_type_outer; u8 lock_type; /* u8 hole; */ #ifdef CONFIG_LOCK_STAT unsigned long contention_point[LOCKSTAT_POINTS]; unsigned long contending_point[LOCKSTAT_POINTS]; #endif } __no_randomize_layout; #ifdef CONFIG_LOCK_STAT struct lock_time { s64 min; s64 max; s64 total; unsigned long nr; }; enum bounce_type { bounce_acquired_write, bounce_acquired_read, bounce_contended_write, bounce_contended_read, nr_bounce_types, bounce_acquired = bounce_acquired_write, bounce_contended = bounce_contended_write, }; struct lock_class_stats { unsigned long contention_point[LOCKSTAT_POINTS]; unsigned long contending_point[LOCKSTAT_POINTS]; struct lock_time read_waittime; struct lock_time write_waittime; struct lock_time read_holdtime; struct lock_time write_holdtime; unsigned long bounces[nr_bounce_types]; }; struct lock_class_stats lock_stats(struct lock_class *class); void clear_lock_stats(struct lock_class *class); #endif /* * Map the lock object (the lock instance) to the lock-class object. * This is embedded into specific lock instances: */ struct lockdep_map { struct lock_class_key *key; struct lock_class *class_cache[NR_LOCKDEP_CACHING_CLASSES]; const char *name; u8 wait_type_outer; /* can be taken in this context */ u8 wait_type_inner; /* presents this context */ u8 lock_type; /* u8 hole; */ #ifdef CONFIG_LOCK_STAT int cpu; unsigned long ip; #endif }; struct pin_cookie { unsigned int val; }; #else /* !CONFIG_LOCKDEP */ /* * The class key takes no space if lockdep is disabled: */ struct lock_class_key { }; /* * The lockdep_map takes no space if lockdep is disabled: */ struct lockdep_map { }; struct pin_cookie { }; #endif /* !LOCKDEP */ #endif /* __LINUX_LOCKDEP_TYPES_H */ PK ! ��i} serio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 1999-2002 Vojtech Pavlik */ #ifndef _SERIO_H #define _SERIO_H #include <linux/types.h> #include <linux/interrupt.h> #include <linux/list.h> #include <linux/spinlock.h> #include <linux/mutex.h> #include <linux/device.h> #include <linux/mod_devicetable.h> #include <uapi/linux/serio.h> extern struct bus_type serio_bus; struct serio { void *port_data; char name[32]; char phys[32]; char firmware_id[128]; bool manual_bind; struct serio_device_id id; /* Protects critical sections from port's interrupt handler */ spinlock_t lock; int (*write)(struct serio *, unsigned char); int (*open)(struct serio *); void (*close)(struct serio *); int (*start)(struct serio *); void (*stop)(struct serio *); struct serio *parent; /* Entry in parent->children list */ struct list_head child_node; struct list_head children; /* Level of nesting in serio hierarchy */ unsigned int depth; /* * serio->drv is accessed from interrupt handlers; when modifying * caller should acquire serio->drv_mutex and serio->lock. */ struct serio_driver *drv; /* Protects serio->drv so attributes can pin current driver */ struct mutex drv_mutex; struct device dev; struct list_head node; /* * For use by PS/2 layer when several ports share hardware and * may get indigestion when exposed to concurrent access (i8042). */ struct mutex *ps2_cmd_mutex; }; #define to_serio_port(d) container_of(d, struct serio, dev) struct serio_driver { const char *description; const struct serio_device_id *id_table; bool manual_bind; void (*write_wakeup)(struct serio *); irqreturn_t (*interrupt)(struct serio *, unsigned char, unsigned int); int (*connect)(struct serio *, struct serio_driver *drv); int (*reconnect)(struct serio *); int (*fast_reconnect)(struct serio *); void (*disconnect)(struct serio *); void (*cleanup)(struct serio *); struct device_driver driver; }; #define to_serio_driver(d) container_of(d, struct serio_driver, driver) int serio_open(struct serio *serio, struct serio_driver *drv); void serio_close(struct serio *serio); void serio_rescan(struct serio *serio); void serio_reconnect(struct serio *serio); irqreturn_t serio_interrupt(struct serio *serio, unsigned char data, unsigned int flags); void __serio_register_port(struct serio *serio, struct module *owner); /* use a define to avoid include chaining to get THIS_MODULE */ #define serio_register_port(serio) \ __serio_register_port(serio, THIS_MODULE) void serio_unregister_port(struct serio *serio); void serio_unregister_child_port(struct serio *serio); int __must_check __serio_register_driver(struct serio_driver *drv, struct module *owner, const char *mod_name); /* use a define to avoid include chaining to get THIS_MODULE & friends */ #define serio_register_driver(drv) \ __serio_register_driver(drv, THIS_MODULE, KBUILD_MODNAME) void serio_unregister_driver(struct serio_driver *drv); /** * module_serio_driver() - Helper macro for registering a serio driver * @__serio_driver: serio_driver struct * * Helper macro for serio drivers which do not do anything special in * module init/exit. This eliminates a lot of boilerplate. Each module * may only use this macro once, and calling it replaces module_init() * and module_exit(). */ #define module_serio_driver(__serio_driver) \ module_driver(__serio_driver, serio_register_driver, \ serio_unregister_driver) static inline int serio_write(struct serio *serio, unsigned char data) { if (serio->write) return serio->write(serio, data); else return -1; } static inline void serio_drv_write_wakeup(struct serio *serio) { if (serio->drv && serio->drv->write_wakeup) serio->drv->write_wakeup(serio); } /* * Use the following functions to manipulate serio's per-port * driver-specific data. */ static inline void *serio_get_drvdata(struct serio *serio) { return dev_get_drvdata(&serio->dev); } static inline void serio_set_drvdata(struct serio *serio, void *data) { dev_set_drvdata(&serio->dev, data); } /* * Use the following functions to protect critical sections in * driver code from port's interrupt handler */ static inline void serio_pause_rx(struct serio *serio) { spin_lock_irq(&serio->lock); } static inline void serio_continue_rx(struct serio *serio) { spin_unlock_irq(&serio->lock); } #endif PK ! Y�o� � delay.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_DELAY_H #define _LINUX_DELAY_H /* * Copyright (C) 1993 Linus Torvalds * * Delay routines, using a pre-computed "loops_per_jiffy" value. * * Please note that ndelay(), udelay() and mdelay() may return early for * several reasons: * 1. computed loops_per_jiffy too low (due to the time taken to * execute the timer interrupt.) * 2. cache behaviour affecting the time it takes to execute the * loop function. * 3. CPU clock rate changes. * * Please see this thread: * https://lists.openwall.net/linux-kernel/2011/01/09/56 */ #include <linux/kernel.h> #include <linux/sched.h> extern unsigned long loops_per_jiffy; #include <asm/delay.h> /* * Using udelay() for intervals greater than a few milliseconds can * risk overflow for high loops_per_jiffy (high bogomips) machines. The * mdelay() provides a wrapper to prevent this. For delays greater * than MAX_UDELAY_MS milliseconds, the wrapper is used. Architecture * specific values can be defined in asm-???/delay.h as an override. * The 2nd mdelay() definition ensures GCC will optimize away the * while loop for the common cases where n <= MAX_UDELAY_MS -- Paul G. */ #ifndef MAX_UDELAY_MS #define MAX_UDELAY_MS 5 #endif #ifndef mdelay #define mdelay(n) (\ (__builtin_constant_p(n) && (n)<=MAX_UDELAY_MS) ? udelay((n)*1000) : \ ({unsigned long __ms=(n); while (__ms--) udelay(1000);})) #endif #ifndef ndelay static inline void ndelay(unsigned long x) { udelay(DIV_ROUND_UP(x, 1000)); } #define ndelay(x) ndelay(x) #endif extern unsigned long lpj_fine; void calibrate_delay(void); void __attribute__((weak)) calibration_delay_done(void); void msleep(unsigned int msecs); unsigned long msleep_interruptible(unsigned int msecs); void usleep_range_state(unsigned long min, unsigned long max, unsigned int state); static inline void usleep_range(unsigned long min, unsigned long max) { usleep_range_state(min, max, TASK_UNINTERRUPTIBLE); } static inline void usleep_idle_range(unsigned long min, unsigned long max) { usleep_range_state(min, max, TASK_IDLE); } static inline void ssleep(unsigned int seconds) { msleep(seconds * 1000); } /* see Documentation/timers/timers-howto.rst for the thresholds */ static inline void fsleep(unsigned long usecs) { if (usecs <= 10) udelay(usecs); else if (usecs <= 20000) usleep_range(usecs, 2 * usecs); else msleep(DIV_ROUND_UP(usecs, 1000)); } #endif /* defined(_LINUX_DELAY_H) */ PK ! �e t10-pi.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_T10_PI_H #define _LINUX_T10_PI_H #include <linux/types.h> #include <linux/blkdev.h> /* * A T10 PI-capable target device can be formatted with different * protection schemes. Currently 0 through 3 are defined: * * Type 0 is regular (unprotected) I/O * * Type 1 defines the contents of the guard and reference tags * * Type 2 defines the contents of the guard and reference tags and * uses 32-byte commands to seed the latter * * Type 3 defines the contents of the guard tag only */ enum t10_dif_type { T10_PI_TYPE0_PROTECTION = 0x0, T10_PI_TYPE1_PROTECTION = 0x1, T10_PI_TYPE2_PROTECTION = 0x2, T10_PI_TYPE3_PROTECTION = 0x3, }; /* * T10 Protection Information tuple. */ struct t10_pi_tuple { __be16 guard_tag; /* Checksum */ __be16 app_tag; /* Opaque storage */ __be32 ref_tag; /* Target LBA or indirect LBA */ }; #define T10_PI_APP_ESCAPE cpu_to_be16(0xffff) #define T10_PI_REF_ESCAPE cpu_to_be32(0xffffffff) static inline u32 t10_pi_ref_tag(struct request *rq) { unsigned int shift = ilog2(queue_logical_block_size(rq->q)); #ifdef CONFIG_BLK_DEV_INTEGRITY if (rq->q->integrity.interval_exp) shift = rq->q->integrity.interval_exp; #endif return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff; } extern const struct blk_integrity_profile t10_pi_type1_crc; extern const struct blk_integrity_profile t10_pi_type1_ip; extern const struct blk_integrity_profile t10_pi_type3_crc; extern const struct blk_integrity_profile t10_pi_type3_ip; #endif PK ! ۞ ��$ �$ dim.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ /* Copyright (c) 2019 Mellanox Technologies. */ #ifndef DIM_H #define DIM_H #include <linux/bits.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/types.h> #include <linux/workqueue.h> /* * Number of events between DIM iterations. * Causes a moderation of the algorithm run. */ #define DIM_NEVENTS 64 /* * Is a difference between values justifies taking an action. * We consider 10% difference as significant. */ #define IS_SIGNIFICANT_DIFF(val, ref) \ ((ref) && (((100UL * abs((val) - (ref))) / (ref)) > 10)) /* * Calculate the gap between two values. * Take wrap-around and variable size into consideration. */ #define BIT_GAP(bits, end, start) ((((end) - (start)) + BIT_ULL(bits)) \ & (BIT_ULL(bits) - 1)) /** * struct dim_cq_moder - Structure for CQ moderation values. * Used for communications between DIM and its consumer. * * @usec: CQ timer suggestion (by DIM) * @pkts: CQ packet counter suggestion (by DIM) * @comps: Completion counter * @cq_period_mode: CQ period count mode (from CQE/EQE) */ struct dim_cq_moder { u16 usec; u16 pkts; u16 comps; u8 cq_period_mode; }; /** * struct dim_sample - Structure for DIM sample data. * Used for communications between DIM and its consumer. * * @time: Sample timestamp * @pkt_ctr: Number of packets * @byte_ctr: Number of bytes * @event_ctr: Number of events * @comp_ctr: Current completion counter */ struct dim_sample { ktime_t time; u32 pkt_ctr; u32 byte_ctr; u16 event_ctr; u32 comp_ctr; }; /** * struct dim_stats - Structure for DIM stats. * Used for holding current measured rates. * * @ppms: Packets per msec * @bpms: Bytes per msec * @epms: Events per msec * @cpms: Completions per msec * @cpe_ratio: Ratio of completions to events */ struct dim_stats { int ppms; /* packets per msec */ int bpms; /* bytes per msec */ int epms; /* events per msec */ int cpms; /* completions per msec */ int cpe_ratio; /* ratio of completions to events */ }; /** * struct dim - Main structure for dynamic interrupt moderation (DIM). * Used for holding all information about a specific DIM instance. * * @state: Algorithm state (see below) * @prev_stats: Measured rates from previous iteration (for comparison) * @start_sample: Sampled data at start of current iteration * @measuring_sample: A &dim_sample that is used to update the current events * @work: Work to perform on action required * @priv: A pointer to the struct that points to dim * @profile_ix: Current moderation profile * @mode: CQ period count mode * @tune_state: Algorithm tuning state (see below) * @steps_right: Number of steps taken towards higher moderation * @steps_left: Number of steps taken towards lower moderation * @tired: Parking depth counter */ struct dim { u8 state; struct dim_stats prev_stats; struct dim_sample start_sample; struct dim_sample measuring_sample; struct work_struct work; void *priv; u8 profile_ix; u8 mode; u8 tune_state; u8 steps_right; u8 steps_left; u8 tired; }; /** * enum dim_cq_period_mode - Modes for CQ period count * * @DIM_CQ_PERIOD_MODE_START_FROM_EQE: Start counting from EQE * @DIM_CQ_PERIOD_MODE_START_FROM_CQE: Start counting from CQE (implies timer reset) * @DIM_CQ_PERIOD_NUM_MODES: Number of modes */ enum dim_cq_period_mode { DIM_CQ_PERIOD_MODE_START_FROM_EQE = 0x0, DIM_CQ_PERIOD_MODE_START_FROM_CQE = 0x1, DIM_CQ_PERIOD_NUM_MODES }; /** * enum dim_state - DIM algorithm states * * These will determine if the algorithm is in a valid state to start an iteration. * * @DIM_START_MEASURE: This is the first iteration (also after applying a new profile) * @DIM_MEASURE_IN_PROGRESS: Algorithm is already in progress - check if * need to perform an action * @DIM_APPLY_NEW_PROFILE: DIM consumer is currently applying a profile - no need to measure */ enum dim_state { DIM_START_MEASURE, DIM_MEASURE_IN_PROGRESS, DIM_APPLY_NEW_PROFILE, }; /** * enum dim_tune_state - DIM algorithm tune states * * These will determine which action the algorithm should perform. * * @DIM_PARKING_ON_TOP: Algorithm found a local top point - exit on significant difference * @DIM_PARKING_TIRED: Algorithm found a deep top point - don't exit if tired > 0 * @DIM_GOING_RIGHT: Algorithm is currently trying higher moderation levels * @DIM_GOING_LEFT: Algorithm is currently trying lower moderation levels */ enum dim_tune_state { DIM_PARKING_ON_TOP, DIM_PARKING_TIRED, DIM_GOING_RIGHT, DIM_GOING_LEFT, }; /** * enum dim_stats_state - DIM algorithm statistics states * * These will determine the verdict of current iteration. * * @DIM_STATS_WORSE: Current iteration shows worse performance than before * @DIM_STATS_SAME: Current iteration shows same performance than before * @DIM_STATS_BETTER: Current iteration shows better performance than before */ enum dim_stats_state { DIM_STATS_WORSE, DIM_STATS_SAME, DIM_STATS_BETTER, }; /** * enum dim_step_result - DIM algorithm step results * * These describe the result of a step. * * @DIM_STEPPED: Performed a regular step * @DIM_TOO_TIRED: Same kind of step was done multiple times - should go to * tired parking * @DIM_ON_EDGE: Stepped to the most left/right profile */ enum dim_step_result { DIM_STEPPED, DIM_TOO_TIRED, DIM_ON_EDGE, }; /** * dim_on_top - check if current state is a good place to stop (top location) * @dim: DIM context * * Check if current profile is a good place to park at. * This will result in reducing the DIM checks frequency as we assume we * shouldn't probably change profiles, unless traffic pattern wasn't changed. */ bool dim_on_top(struct dim *dim); /** * dim_turn - change profile altering direction * @dim: DIM context * * Go left if we were going right and vice-versa. * Do nothing if currently parking. */ void dim_turn(struct dim *dim); /** * dim_park_on_top - enter a parking state on a top location * @dim: DIM context * * Enter parking state. * Clear all movement history. */ void dim_park_on_top(struct dim *dim); /** * dim_park_tired - enter a tired parking state * @dim: DIM context * * Enter parking state. * Clear all movement history and cause DIM checks frequency to reduce. */ void dim_park_tired(struct dim *dim); /** * dim_calc_stats - calculate the difference between two samples * @start: start sample * @end: end sample * @curr_stats: delta between samples * * Calculate the delta between two samples (in data rates). * Takes into consideration counter wrap-around. * Returned boolean indicates whether curr_stats are reliable. */ bool dim_calc_stats(struct dim_sample *start, struct dim_sample *end, struct dim_stats *curr_stats); /** * dim_update_sample - set a sample's fields with given values * @event_ctr: number of events to set * @packets: number of packets to set * @bytes: number of bytes to set * @s: DIM sample */ static inline void dim_update_sample(u16 event_ctr, u64 packets, u64 bytes, struct dim_sample *s) { s->time = ktime_get(); s->pkt_ctr = packets; s->byte_ctr = bytes; s->event_ctr = event_ctr; } /** * dim_update_sample_with_comps - set a sample's fields with given * values including the completion parameter * @event_ctr: number of events to set * @packets: number of packets to set * @bytes: number of bytes to set * @comps: number of completions to set * @s: DIM sample */ static inline void dim_update_sample_with_comps(u16 event_ctr, u64 packets, u64 bytes, u64 comps, struct dim_sample *s) { dim_update_sample(event_ctr, packets, bytes, s); s->comp_ctr = comps; } /* Net DIM */ /** * net_dim_get_rx_moderation - provide a CQ moderation object for the given RX profile * @cq_period_mode: CQ period mode * @ix: Profile index */ struct dim_cq_moder net_dim_get_rx_moderation(u8 cq_period_mode, int ix); /** * net_dim_get_def_rx_moderation - provide the default RX moderation * @cq_period_mode: CQ period mode */ struct dim_cq_moder net_dim_get_def_rx_moderation(u8 cq_period_mode); /** * net_dim_get_tx_moderation - provide a CQ moderation object for the given TX profile * @cq_period_mode: CQ period mode * @ix: Profile index */ struct dim_cq_moder net_dim_get_tx_moderation(u8 cq_period_mode, int ix); /** * net_dim_get_def_tx_moderation - provide the default TX moderation * @cq_period_mode: CQ period mode */ struct dim_cq_moder net_dim_get_def_tx_moderation(u8 cq_period_mode); /** * net_dim - main DIM algorithm entry point * @dim: DIM instance information * @end_sample: Current data measurement * * Called by the consumer. * This is the main logic of the algorithm, where data is processed in order * to decide on next required action. */ void net_dim(struct dim *dim, struct dim_sample end_sample); /* RDMA DIM */ /* * RDMA DIM profile: * profile size must be of RDMA_DIM_PARAMS_NUM_PROFILES. */ #define RDMA_DIM_PARAMS_NUM_PROFILES 9 #define RDMA_DIM_START_PROFILE 0 /** * rdma_dim - Runs the adaptive moderation. * @dim: The moderation struct. * @completions: The number of completions collected in this round. * * Each call to rdma_dim takes the latest amount of completions that * have been collected and counts them as a new event. * Once enough events have been collected the algorithm decides a new * moderation level. */ void rdma_dim(struct dim *dim, u64 completions); #endif /* DIM_H */ PK ! V�s�j- j- regset.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * User-mode machine state access * * Copyright (C) 2007 Red Hat, Inc. All rights reserved. * * Red Hat Author: Roland McGrath. */ #ifndef _LINUX_REGSET_H #define _LINUX_REGSET_H 1 #include <linux/compiler.h> #include <linux/types.h> #include <linux/bug.h> #include <linux/uaccess.h> struct task_struct; struct user_regset; struct membuf { void *p; size_t left; }; static inline int membuf_zero(struct membuf *s, size_t size) { if (s->left) { if (size > s->left) size = s->left; memset(s->p, 0, size); s->p += size; s->left -= size; } return s->left; } static inline int membuf_write(struct membuf *s, const void *v, size_t size) { if (s->left) { if (size > s->left) size = s->left; memcpy(s->p, v, size); s->p += size; s->left -= size; } return s->left; } static inline struct membuf membuf_at(const struct membuf *s, size_t offs) { struct membuf n = *s; if (offs > n.left) offs = n.left; n.p += offs; n.left -= offs; return n; } /* current s->p must be aligned for v; v must be a scalar */ #define membuf_store(s, v) \ ({ \ struct membuf *__s = (s); \ if (__s->left) { \ typeof(v) __v = (v); \ size_t __size = sizeof(__v); \ if (unlikely(__size > __s->left)) { \ __size = __s->left; \ memcpy(__s->p, &__v, __size); \ } else { \ *(typeof(__v + 0) *)__s->p = __v; \ } \ __s->p += __size; \ __s->left -= __size; \ } \ __s->left;}) /** * user_regset_active_fn - type of @active function in &struct user_regset * @target: thread being examined * @regset: regset being examined * * Return -%ENODEV if not available on the hardware found. * Return %0 if no interesting state in this thread. * Return >%0 number of @size units of interesting state. * Any get call fetching state beyond that number will * see the default initialization state for this data, * so a caller that knows what the default state is need * not copy it all out. * This call is optional; the pointer is %NULL if there * is no inexpensive check to yield a value < @n. */ typedef int user_regset_active_fn(struct task_struct *target, const struct user_regset *regset); typedef int user_regset_get2_fn(struct task_struct *target, const struct user_regset *regset, struct membuf to); /** * user_regset_set_fn - type of @set function in &struct user_regset * @target: thread being examined * @regset: regset being examined * @pos: offset into the regset data to access, in bytes * @count: amount of data to copy, in bytes * @kbuf: if not %NULL, a kernel-space pointer to copy from * @ubuf: if @kbuf is %NULL, a user-space pointer to copy from * * Store register values. Return %0 on success; -%EIO or -%ENODEV * are usual failure returns. The @pos and @count values are in * bytes, but must be properly aligned. If @kbuf is non-null, that * buffer is used and @ubuf is ignored. If @kbuf is %NULL, then * ubuf gives a userland pointer to access directly, and an -%EFAULT * return value is possible. */ typedef int user_regset_set_fn(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, const void *kbuf, const void __user *ubuf); /** * user_regset_writeback_fn - type of @writeback function in &struct user_regset * @target: thread being examined * @regset: regset being examined * @immediate: zero if writeback at completion of next context switch is OK * * This call is optional; usually the pointer is %NULL. When * provided, there is some user memory associated with this regset's * hardware, such as memory backing cached register data on register * window machines; the regset's data controls what user memory is * used (e.g. via the stack pointer value). * * Write register data back to user memory. If the @immediate flag * is nonzero, it must be written to the user memory so uaccess or * access_process_vm() can see it when this call returns; if zero, * then it must be written back by the time the task completes a * context switch (as synchronized with wait_task_inactive()). * Return %0 on success or if there was nothing to do, -%EFAULT for * a memory problem (bad stack pointer or whatever), or -%EIO for a * hardware problem. */ typedef int user_regset_writeback_fn(struct task_struct *target, const struct user_regset *regset, int immediate); /** * struct user_regset - accessible thread CPU state * @n: Number of slots (registers). * @size: Size in bytes of a slot (register). * @align: Required alignment, in bytes. * @bias: Bias from natural indexing. * @core_note_type: ELF note @n_type value used in core dumps. * @get: Function to fetch values. * @set: Function to store values. * @active: Function to report if regset is active, or %NULL. * @writeback: Function to write data back to user memory, or %NULL. * * This data structure describes a machine resource we call a register set. * This is part of the state of an individual thread, not necessarily * actual CPU registers per se. A register set consists of a number of * similar slots, given by @n. Each slot is @size bytes, and aligned to * @align bytes (which is at least @size). For dynamically-sized * regsets, @n must contain the maximum possible number of slots for the * regset. * * For backward compatibility, the @get and @set methods must pad to, or * accept, @n * @size bytes, even if the current regset size is smaller. * The precise semantics of these operations depend on the regset being * accessed. * * The functions to which &struct user_regset members point must be * called only on the current thread or on a thread that is in * %TASK_STOPPED or %TASK_TRACED state, that we are guaranteed will not * be woken up and return to user mode, and that we have called * wait_task_inactive() on. (The target thread always might wake up for * SIGKILL while these functions are working, in which case that * thread's user_regset state might be scrambled.) * * The @pos argument must be aligned according to @align; the @count * argument must be a multiple of @size. These functions are not * responsible for checking for invalid arguments. * * When there is a natural value to use as an index, @bias gives the * difference between the natural index and the slot index for the * register set. For example, x86 GDT segment descriptors form a regset; * the segment selector produces a natural index, but only a subset of * that index space is available as a regset (the TLS slots); subtracting * @bias from a segment selector index value computes the regset slot. * * If nonzero, @core_note_type gives the n_type field (NT_* value) * of the core file note in which this regset's data appears. * NT_PRSTATUS is a special case in that the regset data starts at * offsetof(struct elf_prstatus, pr_reg) into the note data; that is * part of the per-machine ELF formats userland knows about. In * other cases, the core file note contains exactly the whole regset * (@n * @size) and nothing else. The core file note is normally * omitted when there is an @active function and it returns zero. */ struct user_regset { user_regset_get2_fn *regset_get; user_regset_set_fn *set; user_regset_active_fn *active; user_regset_writeback_fn *writeback; unsigned int n; unsigned int size; unsigned int align; unsigned int bias; unsigned int core_note_type; }; /** * struct user_regset_view - available regsets * @name: Identifier, e.g. UTS_MACHINE string. * @regsets: Array of @n regsets available in this view. * @n: Number of elements in @regsets. * @e_machine: ELF header @e_machine %EM_* value written in core dumps. * @e_flags: ELF header @e_flags value written in core dumps. * @ei_osabi: ELF header @e_ident[%EI_OSABI] value written in core dumps. * * A regset view is a collection of regsets (&struct user_regset, * above). This describes all the state of a thread that can be seen * from a given architecture/ABI environment. More than one view might * refer to the same &struct user_regset, or more than one regset * might refer to the same machine-specific state in the thread. For * example, a 32-bit thread's state could be examined from the 32-bit * view or from the 64-bit view. Either method reaches the same thread * register state, doing appropriate widening or truncation. */ struct user_regset_view { const char *name; const struct user_regset *regsets; unsigned int n; u32 e_flags; u16 e_machine; u8 ei_osabi; }; /* * This is documented here rather than at the definition sites because its * implementation is machine-dependent but its interface is universal. */ /** * task_user_regset_view - Return the process's native regset view. * @tsk: a thread of the process in question * * Return the &struct user_regset_view that is native for the given process. * For example, what it would access when it called ptrace(). * Throughout the life of the process, this only changes at exec. */ const struct user_regset_view *task_user_regset_view(struct task_struct *tsk); static inline int user_regset_copyin(unsigned int *pos, unsigned int *count, const void **kbuf, const void __user **ubuf, void *data, const int start_pos, const int end_pos) { if (*count == 0) return 0; BUG_ON(*pos < start_pos); if (end_pos < 0 || *pos < end_pos) { unsigned int copy = (end_pos < 0 ? *count : min(*count, end_pos - *pos)); data += *pos - start_pos; if (*kbuf) { memcpy(data, *kbuf, copy); *kbuf += copy; } else if (__copy_from_user(data, *ubuf, copy)) return -EFAULT; else *ubuf += copy; *pos += copy; *count -= copy; } return 0; } static inline int user_regset_copyin_ignore(unsigned int *pos, unsigned int *count, const void **kbuf, const void __user **ubuf, const int start_pos, const int end_pos) { if (*count == 0) return 0; BUG_ON(*pos < start_pos); if (end_pos < 0 || *pos < end_pos) { unsigned int copy = (end_pos < 0 ? *count : min(*count, end_pos - *pos)); if (*kbuf) *kbuf += copy; else *ubuf += copy; *pos += copy; *count -= copy; } return 0; } extern int regset_get(struct task_struct *target, const struct user_regset *regset, unsigned int size, void *data); extern int regset_get_alloc(struct task_struct *target, const struct user_regset *regset, unsigned int size, void **data); extern int copy_regset_to_user(struct task_struct *target, const struct user_regset_view *view, unsigned int setno, unsigned int offset, unsigned int size, void __user *data); /** * copy_regset_from_user - store into thread's user_regset data from user memory * @target: thread to be examined * @view: &struct user_regset_view describing user thread machine state * @setno: index in @view->regsets * @offset: offset into the regset data, in bytes * @size: amount of data to copy, in bytes * @data: user-mode pointer to copy from */ static inline int copy_regset_from_user(struct task_struct *target, const struct user_regset_view *view, unsigned int setno, unsigned int offset, unsigned int size, const void __user *data) { const struct user_regset *regset = &view->regsets[setno]; if (!regset->set) return -EOPNOTSUPP; if (!access_ok(data, size)) return -EFAULT; return regset->set(target, regset, offset, size, NULL, data); } #endif /* <linux/regset.h> */ PK ! l�C� � tifm.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * tifm.h - TI FlashMedia driver * * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com> */ #ifndef _TIFM_H #define _TIFM_H #include <linux/spinlock.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/pci.h> #include <linux/workqueue.h> /* Host registers (relative to pci base address): */ enum { FM_SET_INTERRUPT_ENABLE = 0x008, FM_CLEAR_INTERRUPT_ENABLE = 0x00c, FM_INTERRUPT_STATUS = 0x014 }; /* Socket registers (relative to socket base address): */ enum { SOCK_CONTROL = 0x004, SOCK_PRESENT_STATE = 0x008, SOCK_DMA_ADDRESS = 0x00c, SOCK_DMA_CONTROL = 0x010, SOCK_DMA_FIFO_INT_ENABLE_SET = 0x014, SOCK_DMA_FIFO_INT_ENABLE_CLEAR = 0x018, SOCK_DMA_FIFO_STATUS = 0x020, SOCK_FIFO_CONTROL = 0x024, SOCK_FIFO_PAGE_SIZE = 0x028, SOCK_MMCSD_COMMAND = 0x104, SOCK_MMCSD_ARG_LOW = 0x108, SOCK_MMCSD_ARG_HIGH = 0x10c, SOCK_MMCSD_CONFIG = 0x110, SOCK_MMCSD_STATUS = 0x114, SOCK_MMCSD_INT_ENABLE = 0x118, SOCK_MMCSD_COMMAND_TO = 0x11c, SOCK_MMCSD_DATA_TO = 0x120, SOCK_MMCSD_DATA = 0x124, SOCK_MMCSD_BLOCK_LEN = 0x128, SOCK_MMCSD_NUM_BLOCKS = 0x12c, SOCK_MMCSD_BUFFER_CONFIG = 0x130, SOCK_MMCSD_SPI_CONFIG = 0x134, SOCK_MMCSD_SDIO_MODE_CONFIG = 0x138, SOCK_MMCSD_RESPONSE = 0x144, SOCK_MMCSD_SDIO_SR = 0x164, SOCK_MMCSD_SYSTEM_CONTROL = 0x168, SOCK_MMCSD_SYSTEM_STATUS = 0x16c, SOCK_MS_COMMAND = 0x184, SOCK_MS_DATA = 0x188, SOCK_MS_STATUS = 0x18c, SOCK_MS_SYSTEM = 0x190, SOCK_FIFO_ACCESS = 0x200 }; #define TIFM_CTRL_LED 0x00000040 #define TIFM_CTRL_FAST_CLK 0x00000100 #define TIFM_CTRL_POWER_MASK 0x00000007 #define TIFM_SOCK_STATE_OCCUPIED 0x00000008 #define TIFM_SOCK_STATE_POWERED 0x00000080 #define TIFM_FIFO_ENABLE 0x00000001 #define TIFM_FIFO_READY 0x00000001 #define TIFM_FIFO_MORE 0x00000008 #define TIFM_FIFO_INT_SETALL 0x0000ffff #define TIFM_FIFO_INTMASK 0x00000005 #define TIFM_DMA_RESET 0x00000002 #define TIFM_DMA_TX 0x00008000 #define TIFM_DMA_EN 0x00000001 #define TIFM_DMA_TSIZE 0x0000007f #define TIFM_TYPE_XD 1 #define TIFM_TYPE_MS 2 #define TIFM_TYPE_SD 3 struct tifm_device_id { unsigned char type; }; struct tifm_driver; struct tifm_dev { char __iomem *addr; spinlock_t lock; unsigned char type; unsigned int socket_id; void (*card_event)(struct tifm_dev *sock); void (*data_event)(struct tifm_dev *sock); struct device dev; }; struct tifm_driver { struct tifm_device_id *id_table; int (*probe)(struct tifm_dev *dev); void (*remove)(struct tifm_dev *dev); int (*suspend)(struct tifm_dev *dev, pm_message_t state); int (*resume)(struct tifm_dev *dev); struct device_driver driver; }; struct tifm_adapter { char __iomem *addr; spinlock_t lock; unsigned int irq_status; unsigned int socket_change_set; unsigned int id; unsigned int num_sockets; struct completion *finish_me; struct work_struct media_switcher; struct device dev; void (*eject)(struct tifm_adapter *fm, struct tifm_dev *sock); int (*has_ms_pif)(struct tifm_adapter *fm, struct tifm_dev *sock); struct tifm_dev *sockets[]; }; struct tifm_adapter *tifm_alloc_adapter(unsigned int num_sockets, struct device *dev); int tifm_add_adapter(struct tifm_adapter *fm); void tifm_remove_adapter(struct tifm_adapter *fm); void tifm_free_adapter(struct tifm_adapter *fm); void tifm_free_device(struct device *dev); struct tifm_dev *tifm_alloc_device(struct tifm_adapter *fm, unsigned int id, unsigned char type); int tifm_register_driver(struct tifm_driver *drv); void tifm_unregister_driver(struct tifm_driver *drv); void tifm_eject(struct tifm_dev *sock); int tifm_has_ms_pif(struct tifm_dev *sock); int tifm_map_sg(struct tifm_dev *sock, struct scatterlist *sg, int nents, int direction); void tifm_unmap_sg(struct tifm_dev *sock, struct scatterlist *sg, int nents, int direction); void tifm_queue_work(struct work_struct *work); static inline void *tifm_get_drvdata(struct tifm_dev *dev) { return dev_get_drvdata(&dev->dev); } static inline void tifm_set_drvdata(struct tifm_dev *dev, void *data) { dev_set_drvdata(&dev->dev, data); } #endif PK ! ��Ҟf f mempool.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * memory buffer pool support */ #ifndef _LINUX_MEMPOOL_H #define _LINUX_MEMPOOL_H #include <linux/wait.h> #include <linux/compiler.h> struct kmem_cache; typedef void * (mempool_alloc_t)(gfp_t gfp_mask, void *pool_data); typedef void (mempool_free_t)(void *element, void *pool_data); typedef struct mempool_s { spinlock_t lock; int min_nr; /* nr of elements at *elements */ int curr_nr; /* Current nr of elements at *elements */ void **elements; void *pool_data; mempool_alloc_t *alloc; mempool_free_t *free; wait_queue_head_t wait; } mempool_t; static inline bool mempool_initialized(mempool_t *pool) { return pool->elements != NULL; } void mempool_exit(mempool_t *pool); int mempool_init_node(mempool_t *pool, int min_nr, mempool_alloc_t *alloc_fn, mempool_free_t *free_fn, void *pool_data, gfp_t gfp_mask, int node_id); int mempool_init(mempool_t *pool, int min_nr, mempool_alloc_t *alloc_fn, mempool_free_t *free_fn, void *pool_data); extern mempool_t *mempool_create(int min_nr, mempool_alloc_t *alloc_fn, mempool_free_t *free_fn, void *pool_data); extern mempool_t *mempool_create_node(int min_nr, mempool_alloc_t *alloc_fn, mempool_free_t *free_fn, void *pool_data, gfp_t gfp_mask, int nid); extern int mempool_resize(mempool_t *pool, int new_min_nr); extern void mempool_destroy(mempool_t *pool); extern void *mempool_alloc(mempool_t *pool, gfp_t gfp_mask) __malloc; extern void mempool_free(void *element, mempool_t *pool); /* * A mempool_alloc_t and mempool_free_t that get the memory from * a slab cache that is passed in through pool_data. * Note: the slab cache may not have a ctor function. */ void *mempool_alloc_slab(gfp_t gfp_mask, void *pool_data); void mempool_free_slab(void *element, void *pool_data); static inline int mempool_init_slab_pool(mempool_t *pool, int min_nr, struct kmem_cache *kc) { return mempool_init(pool, min_nr, mempool_alloc_slab, mempool_free_slab, (void *) kc); } static inline mempool_t * mempool_create_slab_pool(int min_nr, struct kmem_cache *kc) { return mempool_create(min_nr, mempool_alloc_slab, mempool_free_slab, (void *) kc); } /* * a mempool_alloc_t and a mempool_free_t to kmalloc and kfree the * amount of memory specified by pool_data */ void *mempool_kmalloc(gfp_t gfp_mask, void *pool_data); void mempool_kfree(void *element, void *pool_data); static inline int mempool_init_kmalloc_pool(mempool_t *pool, int min_nr, size_t size) { return mempool_init(pool, min_nr, mempool_kmalloc, mempool_kfree, (void *) size); } static inline mempool_t *mempool_create_kmalloc_pool(int min_nr, size_t size) { return mempool_create(min_nr, mempool_kmalloc, mempool_kfree, (void *) size); } /* * A mempool_alloc_t and mempool_free_t for a simple page allocator that * allocates pages of the order specified by pool_data */ void *mempool_alloc_pages(gfp_t gfp_mask, void *pool_data); void mempool_free_pages(void *element, void *pool_data); static inline int mempool_init_page_pool(mempool_t *pool, int min_nr, int order) { return mempool_init(pool, min_nr, mempool_alloc_pages, mempool_free_pages, (void *)(long)order); } static inline mempool_t *mempool_create_page_pool(int min_nr, int order) { return mempool_create(min_nr, mempool_alloc_pages, mempool_free_pages, (void *)(long)order); } #endif /* _LINUX_MEMPOOL_H */ PK ! �ʶ� � � ftrace.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Ftrace header. For implementation details beyond the random comments * scattered below, see: Documentation/trace/ftrace-design.rst */ #ifndef _LINUX_FTRACE_H #define _LINUX_FTRACE_H #include <linux/trace_recursion.h> #include <linux/trace_clock.h> #include <linux/kallsyms.h> #include <linux/linkage.h> #include <linux/bitops.h> #include <linux/ptrace.h> #include <linux/ktime.h> #include <linux/sched.h> #include <linux/types.h> #include <linux/init.h> #include <linux/fs.h> #include <asm/ftrace.h> /* * If the arch supports passing the variable contents of * function_trace_op as the third parameter back from the * mcount call, then the arch should define this as 1. */ #ifndef ARCH_SUPPORTS_FTRACE_OPS #define ARCH_SUPPORTS_FTRACE_OPS 0 #endif /* * If the arch's mcount caller does not support all of ftrace's * features, then it must call an indirect function that * does. Or at least does enough to prevent any unwelcome side effects. */ #if !ARCH_SUPPORTS_FTRACE_OPS # define FTRACE_FORCE_LIST_FUNC 1 #else # define FTRACE_FORCE_LIST_FUNC 0 #endif /* Main tracing buffer and events set up */ #ifdef CONFIG_TRACING void trace_init(void); void early_trace_init(void); #else static inline void trace_init(void) { } static inline void early_trace_init(void) { } #endif struct module; struct ftrace_hash; struct ftrace_direct_func; #if defined(CONFIG_FUNCTION_TRACER) && defined(CONFIG_MODULES) && \ defined(CONFIG_DYNAMIC_FTRACE) const char * ftrace_mod_address_lookup(unsigned long addr, unsigned long *size, unsigned long *off, char **modname, char *sym); #else static inline const char * ftrace_mod_address_lookup(unsigned long addr, unsigned long *size, unsigned long *off, char **modname, char *sym) { return NULL; } #endif #if defined(CONFIG_FUNCTION_TRACER) && defined(CONFIG_DYNAMIC_FTRACE) int ftrace_mod_get_kallsym(unsigned int symnum, unsigned long *value, char *type, char *name, char *module_name, int *exported); #else static inline int ftrace_mod_get_kallsym(unsigned int symnum, unsigned long *value, char *type, char *name, char *module_name, int *exported) { return -1; } #endif #ifdef CONFIG_FUNCTION_TRACER extern int ftrace_enabled; extern int ftrace_enable_sysctl(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); struct ftrace_ops; #ifndef CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS struct ftrace_regs { struct pt_regs regs; }; #define arch_ftrace_get_regs(fregs) (&(fregs)->regs) /* * ftrace_instruction_pointer_set() is to be defined by the architecture * if to allow setting of the instruction pointer from the ftrace_regs * when HAVE_DYNAMIC_FTRACE_WITH_ARGS is set and it supports * live kernel patching. */ #define ftrace_instruction_pointer_set(fregs, ip) do { } while (0) #endif /* CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS */ static __always_inline struct pt_regs *ftrace_get_regs(struct ftrace_regs *fregs) { if (!fregs) return NULL; return arch_ftrace_get_regs(fregs); } typedef void (*ftrace_func_t)(unsigned long ip, unsigned long parent_ip, struct ftrace_ops *op, struct ftrace_regs *fregs); ftrace_func_t ftrace_ops_get_func(struct ftrace_ops *ops); /* * FTRACE_OPS_FL_* bits denote the state of ftrace_ops struct and are * set in the flags member. * CONTROL, SAVE_REGS, SAVE_REGS_IF_SUPPORTED, RECURSION, STUB and * IPMODIFY are a kind of attribute flags which can be set only before * registering the ftrace_ops, and can not be modified while registered. * Changing those attribute flags after registering ftrace_ops will * cause unexpected results. * * ENABLED - set/unset when ftrace_ops is registered/unregistered * DYNAMIC - set when ftrace_ops is registered to denote dynamically * allocated ftrace_ops which need special care * SAVE_REGS - The ftrace_ops wants regs saved at each function called * and passed to the callback. If this flag is set, but the * architecture does not support passing regs * (CONFIG_DYNAMIC_FTRACE_WITH_REGS is not defined), then the * ftrace_ops will fail to register, unless the next flag * is set. * SAVE_REGS_IF_SUPPORTED - This is the same as SAVE_REGS, but if the * handler can handle an arch that does not save regs * (the handler tests if regs == NULL), then it can set * this flag instead. It will not fail registering the ftrace_ops * but, the regs field will be NULL if the arch does not support * passing regs to the handler. * Note, if this flag is set, the SAVE_REGS flag will automatically * get set upon registering the ftrace_ops, if the arch supports it. * RECURSION - The ftrace_ops can set this to tell the ftrace infrastructure * that the call back needs recursion protection. If it does * not set this, then the ftrace infrastructure will assume * that the callback can handle recursion on its own. * STUB - The ftrace_ops is just a place holder. * INITIALIZED - The ftrace_ops has already been initialized (first use time * register_ftrace_function() is called, it will initialized the ops) * DELETED - The ops are being deleted, do not let them be registered again. * ADDING - The ops is in the process of being added. * REMOVING - The ops is in the process of being removed. * MODIFYING - The ops is in the process of changing its filter functions. * ALLOC_TRAMP - A dynamic trampoline was allocated by the core code. * The arch specific code sets this flag when it allocated a * trampoline. This lets the arch know that it can update the * trampoline in case the callback function changes. * The ftrace_ops trampoline can be set by the ftrace users, and * in such cases the arch must not modify it. Only the arch ftrace * core code should set this flag. * IPMODIFY - The ops can modify the IP register. This can only be set with * SAVE_REGS. If another ops with this flag set is already registered * for any of the functions that this ops will be registered for, then * this ops will fail to register or set_filter_ip. * PID - Is affected by set_ftrace_pid (allows filtering on those pids) * RCU - Set when the ops can only be called when RCU is watching. * TRACE_ARRAY - The ops->private points to a trace_array descriptor. * PERMANENT - Set when the ops is permanent and should not be affected by * ftrace_enabled. * DIRECT - Used by the direct ftrace_ops helper for direct functions * (internal ftrace only, should not be used by others) */ enum { FTRACE_OPS_FL_ENABLED = BIT(0), FTRACE_OPS_FL_DYNAMIC = BIT(1), FTRACE_OPS_FL_SAVE_REGS = BIT(2), FTRACE_OPS_FL_SAVE_REGS_IF_SUPPORTED = BIT(3), FTRACE_OPS_FL_RECURSION = BIT(4), FTRACE_OPS_FL_STUB = BIT(5), FTRACE_OPS_FL_INITIALIZED = BIT(6), FTRACE_OPS_FL_DELETED = BIT(7), FTRACE_OPS_FL_ADDING = BIT(8), FTRACE_OPS_FL_REMOVING = BIT(9), FTRACE_OPS_FL_MODIFYING = BIT(10), FTRACE_OPS_FL_ALLOC_TRAMP = BIT(11), FTRACE_OPS_FL_IPMODIFY = BIT(12), FTRACE_OPS_FL_PID = BIT(13), FTRACE_OPS_FL_RCU = BIT(14), FTRACE_OPS_FL_TRACE_ARRAY = BIT(15), FTRACE_OPS_FL_PERMANENT = BIT(16), FTRACE_OPS_FL_DIRECT = BIT(17), }; #ifdef CONFIG_DYNAMIC_FTRACE /* The hash used to know what functions callbacks trace */ struct ftrace_ops_hash { struct ftrace_hash __rcu *notrace_hash; struct ftrace_hash __rcu *filter_hash; struct mutex regex_lock; }; void ftrace_free_init_mem(void); void ftrace_free_mem(struct module *mod, void *start, void *end); #else static inline void ftrace_free_init_mem(void) { } static inline void ftrace_free_mem(struct module *mod, void *start, void *end) { } #endif /* * Note, ftrace_ops can be referenced outside of RCU protection, unless * the RCU flag is set. If ftrace_ops is allocated and not part of kernel * core data, the unregistering of it will perform a scheduling on all CPUs * to make sure that there are no more users. Depending on the load of the * system that may take a bit of time. * * Any private data added must also take care not to be freed and if private * data is added to a ftrace_ops that is in core code, the user of the * ftrace_ops must perform a schedule_on_each_cpu() before freeing it. */ struct ftrace_ops { ftrace_func_t func; struct ftrace_ops __rcu *next; unsigned long flags; void *private; ftrace_func_t saved_func; #ifdef CONFIG_DYNAMIC_FTRACE struct ftrace_ops_hash local_hash; struct ftrace_ops_hash *func_hash; struct ftrace_ops_hash old_hash; unsigned long trampoline; unsigned long trampoline_size; struct list_head list; #endif }; extern struct ftrace_ops __rcu *ftrace_ops_list; extern struct ftrace_ops ftrace_list_end; /* * Traverse the ftrace_ops_list, invoking all entries. The reason that we * can use rcu_dereference_raw_check() is that elements removed from this list * are simply leaked, so there is no need to interact with a grace-period * mechanism. The rcu_dereference_raw_check() calls are needed to handle * concurrent insertions into the ftrace_ops_list. * * Silly Alpha and silly pointer-speculation compiler optimizations! */ #define do_for_each_ftrace_op(op, list) \ op = rcu_dereference_raw_check(list); \ do /* * Optimized for just a single item in the list (as that is the normal case). */ #define while_for_each_ftrace_op(op) \ while (likely(op = rcu_dereference_raw_check((op)->next)) && \ unlikely((op) != &ftrace_list_end)) /* * Type of the current tracing. */ enum ftrace_tracing_type_t { FTRACE_TYPE_ENTER = 0, /* Hook the call of the function */ FTRACE_TYPE_RETURN, /* Hook the return of the function */ }; /* Current tracing type, default is FTRACE_TYPE_ENTER */ extern enum ftrace_tracing_type_t ftrace_tracing_type; /* * The ftrace_ops must be a static and should also * be read_mostly. These functions do modify read_mostly variables * so use them sparely. Never free an ftrace_op or modify the * next pointer after it has been registered. Even after unregistering * it, the next pointer may still be used internally. */ int register_ftrace_function(struct ftrace_ops *ops); int unregister_ftrace_function(struct ftrace_ops *ops); extern void ftrace_stub(unsigned long a0, unsigned long a1, struct ftrace_ops *op, struct ftrace_regs *fregs); #else /* !CONFIG_FUNCTION_TRACER */ /* * (un)register_ftrace_function must be a macro since the ops parameter * must not be evaluated. */ #define register_ftrace_function(ops) ({ 0; }) #define unregister_ftrace_function(ops) ({ 0; }) static inline void ftrace_kill(void) { } static inline void ftrace_free_init_mem(void) { } static inline void ftrace_free_mem(struct module *mod, void *start, void *end) { } #endif /* CONFIG_FUNCTION_TRACER */ struct ftrace_func_entry { struct hlist_node hlist; unsigned long ip; unsigned long direct; /* for direct lookup only */ }; struct dyn_ftrace; #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS extern int ftrace_direct_func_count; int register_ftrace_direct(unsigned long ip, unsigned long addr); int unregister_ftrace_direct(unsigned long ip, unsigned long addr); int modify_ftrace_direct(unsigned long ip, unsigned long old_addr, unsigned long new_addr); struct ftrace_direct_func *ftrace_find_direct_func(unsigned long addr); int ftrace_modify_direct_caller(struct ftrace_func_entry *entry, struct dyn_ftrace *rec, unsigned long old_addr, unsigned long new_addr); unsigned long ftrace_find_rec_direct(unsigned long ip); #else # define ftrace_direct_func_count 0 static inline int register_ftrace_direct(unsigned long ip, unsigned long addr) { return -ENOTSUPP; } static inline int unregister_ftrace_direct(unsigned long ip, unsigned long addr) { return -ENOTSUPP; } static inline int modify_ftrace_direct(unsigned long ip, unsigned long old_addr, unsigned long new_addr) { return -ENOTSUPP; } static inline struct ftrace_direct_func *ftrace_find_direct_func(unsigned long addr) { return NULL; } static inline int ftrace_modify_direct_caller(struct ftrace_func_entry *entry, struct dyn_ftrace *rec, unsigned long old_addr, unsigned long new_addr) { return -ENODEV; } static inline unsigned long ftrace_find_rec_direct(unsigned long ip) { return 0; } #endif /* CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */ #ifndef CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS /* * This must be implemented by the architecture. * It is the way the ftrace direct_ops helper, when called * via ftrace (because there's other callbacks besides the * direct call), can inform the architecture's trampoline that this * routine has a direct caller, and what the caller is. * * For example, in x86, it returns the direct caller * callback function via the regs->orig_ax parameter. * Then in the ftrace trampoline, if this is set, it makes * the return from the trampoline jump to the direct caller * instead of going back to the function it just traced. */ static inline void arch_ftrace_set_direct_caller(struct pt_regs *regs, unsigned long addr) { } #endif /* CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */ #ifdef CONFIG_STACK_TRACER extern int stack_tracer_enabled; int stack_trace_sysctl(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); /* DO NOT MODIFY THIS VARIABLE DIRECTLY! */ DECLARE_PER_CPU(int, disable_stack_tracer); /** * stack_tracer_disable - temporarily disable the stack tracer * * There's a few locations (namely in RCU) where stack tracing * cannot be executed. This function is used to disable stack * tracing during those critical sections. * * This function must be called with preemption or interrupts * disabled and stack_tracer_enable() must be called shortly after * while preemption or interrupts are still disabled. */ static inline void stack_tracer_disable(void) { /* Preemption or interrupts must be disabled */ if (IS_ENABLED(CONFIG_DEBUG_PREEMPT)) WARN_ON_ONCE(!preempt_count() || !irqs_disabled()); this_cpu_inc(disable_stack_tracer); } /** * stack_tracer_enable - re-enable the stack tracer * * After stack_tracer_disable() is called, stack_tracer_enable() * must be called shortly afterward. */ static inline void stack_tracer_enable(void) { if (IS_ENABLED(CONFIG_DEBUG_PREEMPT)) WARN_ON_ONCE(!preempt_count() || !irqs_disabled()); this_cpu_dec(disable_stack_tracer); } #else static inline void stack_tracer_disable(void) { } static inline void stack_tracer_enable(void) { } #endif #ifdef CONFIG_DYNAMIC_FTRACE int ftrace_arch_code_modify_prepare(void); int ftrace_arch_code_modify_post_process(void); enum ftrace_bug_type { FTRACE_BUG_UNKNOWN, FTRACE_BUG_INIT, FTRACE_BUG_NOP, FTRACE_BUG_CALL, FTRACE_BUG_UPDATE, }; extern enum ftrace_bug_type ftrace_bug_type; /* * Archs can set this to point to a variable that holds the value that was * expected at the call site before calling ftrace_bug(). */ extern const void *ftrace_expected; void ftrace_bug(int err, struct dyn_ftrace *rec); struct seq_file; extern int ftrace_text_reserved(const void *start, const void *end); struct ftrace_ops *ftrace_ops_trampoline(unsigned long addr); bool is_ftrace_trampoline(unsigned long addr); /* * The dyn_ftrace record's flags field is split into two parts. * the first part which is '0-FTRACE_REF_MAX' is a counter of * the number of callbacks that have registered the function that * the dyn_ftrace descriptor represents. * * The second part is a mask: * ENABLED - the function is being traced * REGS - the record wants the function to save regs * REGS_EN - the function is set up to save regs. * IPMODIFY - the record allows for the IP address to be changed. * DISABLED - the record is not ready to be touched yet * DIRECT - there is a direct function to call * * When a new ftrace_ops is registered and wants a function to save * pt_regs, the rec->flags REGS is set. When the function has been * set up to save regs, the REG_EN flag is set. Once a function * starts saving regs it will do so until all ftrace_ops are removed * from tracing that function. */ enum { FTRACE_FL_ENABLED = (1UL << 31), FTRACE_FL_REGS = (1UL << 30), FTRACE_FL_REGS_EN = (1UL << 29), FTRACE_FL_TRAMP = (1UL << 28), FTRACE_FL_TRAMP_EN = (1UL << 27), FTRACE_FL_IPMODIFY = (1UL << 26), FTRACE_FL_DISABLED = (1UL << 25), FTRACE_FL_DIRECT = (1UL << 24), FTRACE_FL_DIRECT_EN = (1UL << 23), }; #define FTRACE_REF_MAX_SHIFT 23 #define FTRACE_REF_MAX ((1UL << FTRACE_REF_MAX_SHIFT) - 1) #define ftrace_rec_count(rec) ((rec)->flags & FTRACE_REF_MAX) struct dyn_ftrace { unsigned long ip; /* address of mcount call-site */ unsigned long flags; struct dyn_arch_ftrace arch; }; int ftrace_set_filter_ip(struct ftrace_ops *ops, unsigned long ip, int remove, int reset); int ftrace_set_filter(struct ftrace_ops *ops, unsigned char *buf, int len, int reset); int ftrace_set_notrace(struct ftrace_ops *ops, unsigned char *buf, int len, int reset); void ftrace_set_global_filter(unsigned char *buf, int len, int reset); void ftrace_set_global_notrace(unsigned char *buf, int len, int reset); void ftrace_free_filter(struct ftrace_ops *ops); void ftrace_ops_set_global_filter(struct ftrace_ops *ops); enum { FTRACE_UPDATE_CALLS = (1 << 0), FTRACE_DISABLE_CALLS = (1 << 1), FTRACE_UPDATE_TRACE_FUNC = (1 << 2), FTRACE_START_FUNC_RET = (1 << 3), FTRACE_STOP_FUNC_RET = (1 << 4), FTRACE_MAY_SLEEP = (1 << 5), }; /* * The FTRACE_UPDATE_* enum is used to pass information back * from the ftrace_update_record() and ftrace_test_record() * functions. These are called by the code update routines * to find out what is to be done for a given function. * * IGNORE - The function is already what we want it to be * MAKE_CALL - Start tracing the function * MODIFY_CALL - Stop saving regs for the function * MAKE_NOP - Stop tracing the function */ enum { FTRACE_UPDATE_IGNORE, FTRACE_UPDATE_MAKE_CALL, FTRACE_UPDATE_MODIFY_CALL, FTRACE_UPDATE_MAKE_NOP, }; enum { FTRACE_ITER_FILTER = (1 << 0), FTRACE_ITER_NOTRACE = (1 << 1), FTRACE_ITER_PRINTALL = (1 << 2), FTRACE_ITER_DO_PROBES = (1 << 3), FTRACE_ITER_PROBE = (1 << 4), FTRACE_ITER_MOD = (1 << 5), FTRACE_ITER_ENABLED = (1 << 6), }; void arch_ftrace_update_code(int command); void arch_ftrace_update_trampoline(struct ftrace_ops *ops); void *arch_ftrace_trampoline_func(struct ftrace_ops *ops, struct dyn_ftrace *rec); void arch_ftrace_trampoline_free(struct ftrace_ops *ops); struct ftrace_rec_iter; struct ftrace_rec_iter *ftrace_rec_iter_start(void); struct ftrace_rec_iter *ftrace_rec_iter_next(struct ftrace_rec_iter *iter); struct dyn_ftrace *ftrace_rec_iter_record(struct ftrace_rec_iter *iter); #define for_ftrace_rec_iter(iter) \ for (iter = ftrace_rec_iter_start(); \ iter; \ iter = ftrace_rec_iter_next(iter)) int ftrace_update_record(struct dyn_ftrace *rec, bool enable); int ftrace_test_record(struct dyn_ftrace *rec, bool enable); void ftrace_run_stop_machine(int command); unsigned long ftrace_location(unsigned long ip); unsigned long ftrace_location_range(unsigned long start, unsigned long end); unsigned long ftrace_get_addr_new(struct dyn_ftrace *rec); unsigned long ftrace_get_addr_curr(struct dyn_ftrace *rec); extern ftrace_func_t ftrace_trace_function; int ftrace_regex_open(struct ftrace_ops *ops, int flag, struct inode *inode, struct file *file); ssize_t ftrace_filter_write(struct file *file, const char __user *ubuf, size_t cnt, loff_t *ppos); ssize_t ftrace_notrace_write(struct file *file, const char __user *ubuf, size_t cnt, loff_t *ppos); int ftrace_regex_release(struct inode *inode, struct file *file); void __init ftrace_set_early_filter(struct ftrace_ops *ops, char *buf, int enable); /* defined in arch */ extern int ftrace_ip_converted(unsigned long ip); extern int ftrace_dyn_arch_init(void); extern void ftrace_replace_code(int enable); extern int ftrace_update_ftrace_func(ftrace_func_t func); extern void ftrace_caller(void); extern void ftrace_regs_caller(void); extern void ftrace_call(void); extern void ftrace_regs_call(void); extern void mcount_call(void); void ftrace_modify_all_code(int command); #ifndef FTRACE_ADDR #define FTRACE_ADDR ((unsigned long)ftrace_caller) #endif #ifndef FTRACE_GRAPH_ADDR #define FTRACE_GRAPH_ADDR ((unsigned long)ftrace_graph_caller) #endif #ifndef FTRACE_REGS_ADDR #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS # define FTRACE_REGS_ADDR ((unsigned long)ftrace_regs_caller) #else # define FTRACE_REGS_ADDR FTRACE_ADDR #endif #endif /* * If an arch would like functions that are only traced * by the function graph tracer to jump directly to its own * trampoline, then they can define FTRACE_GRAPH_TRAMP_ADDR * to be that address to jump to. */ #ifndef FTRACE_GRAPH_TRAMP_ADDR #define FTRACE_GRAPH_TRAMP_ADDR ((unsigned long) 0) #endif #ifdef CONFIG_FUNCTION_GRAPH_TRACER extern void ftrace_graph_caller(void); extern int ftrace_enable_ftrace_graph_caller(void); extern int ftrace_disable_ftrace_graph_caller(void); #else static inline int ftrace_enable_ftrace_graph_caller(void) { return 0; } static inline int ftrace_disable_ftrace_graph_caller(void) { return 0; } #endif /** * ftrace_make_nop - convert code into nop * @mod: module structure if called by module load initialization * @rec: the call site record (e.g. mcount/fentry) * @addr: the address that the call site should be calling * * This is a very sensitive operation and great care needs * to be taken by the arch. The operation should carefully * read the location, check to see if what is read is indeed * what we expect it to be, and then on success of the compare, * it should write to the location. * * The code segment at @rec->ip should be a caller to @addr * * Return must be: * 0 on success * -EFAULT on error reading the location * -EINVAL on a failed compare of the contents * -EPERM on error writing to the location * Any other value will be considered a failure. */ extern int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, unsigned long addr); /** * ftrace_need_init_nop - return whether nop call sites should be initialized * * Normally the compiler's -mnop-mcount generates suitable nops, so we don't * need to call ftrace_init_nop() if the code is built with that flag. * Architectures where this is not always the case may define their own * condition. * * Return must be: * 0 if ftrace_init_nop() should be called * Nonzero if ftrace_init_nop() should not be called */ #ifndef ftrace_need_init_nop #define ftrace_need_init_nop() (!__is_defined(CC_USING_NOP_MCOUNT)) #endif /** * ftrace_init_nop - initialize a nop call site * @mod: module structure if called by module load initialization * @rec: the call site record (e.g. mcount/fentry) * * This is a very sensitive operation and great care needs * to be taken by the arch. The operation should carefully * read the location, check to see if what is read is indeed * what we expect it to be, and then on success of the compare, * it should write to the location. * * The code segment at @rec->ip should contain the contents created by * the compiler * * Return must be: * 0 on success * -EFAULT on error reading the location * -EINVAL on a failed compare of the contents * -EPERM on error writing to the location * Any other value will be considered a failure. */ #ifndef ftrace_init_nop static inline int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec) { return ftrace_make_nop(mod, rec, MCOUNT_ADDR); } #endif /** * ftrace_make_call - convert a nop call site into a call to addr * @rec: the call site record (e.g. mcount/fentry) * @addr: the address that the call site should call * * This is a very sensitive operation and great care needs * to be taken by the arch. The operation should carefully * read the location, check to see if what is read is indeed * what we expect it to be, and then on success of the compare, * it should write to the location. * * The code segment at @rec->ip should be a nop * * Return must be: * 0 on success * -EFAULT on error reading the location * -EINVAL on a failed compare of the contents * -EPERM on error writing to the location * Any other value will be considered a failure. */ extern int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr); #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS /** * ftrace_modify_call - convert from one addr to another (no nop) * @rec: the call site record (e.g. mcount/fentry) * @old_addr: the address expected to be currently called to * @addr: the address to change to * * This is a very sensitive operation and great care needs * to be taken by the arch. The operation should carefully * read the location, check to see if what is read is indeed * what we expect it to be, and then on success of the compare, * it should write to the location. * * The code segment at @rec->ip should be a caller to @old_addr * * Return must be: * 0 on success * -EFAULT on error reading the location * -EINVAL on a failed compare of the contents * -EPERM on error writing to the location * Any other value will be considered a failure. */ extern int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, unsigned long addr); #else /* Should never be called */ static inline int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, unsigned long addr) { return -EINVAL; } #endif /* May be defined in arch */ extern int ftrace_arch_read_dyn_info(char *buf, int size); extern int skip_trace(unsigned long ip); extern void ftrace_module_init(struct module *mod); extern void ftrace_module_enable(struct module *mod); extern void ftrace_release_mod(struct module *mod); extern void ftrace_disable_daemon(void); extern void ftrace_enable_daemon(void); #else /* CONFIG_DYNAMIC_FTRACE */ static inline int skip_trace(unsigned long ip) { return 0; } static inline void ftrace_disable_daemon(void) { } static inline void ftrace_enable_daemon(void) { } static inline void ftrace_module_init(struct module *mod) { } static inline void ftrace_module_enable(struct module *mod) { } static inline void ftrace_release_mod(struct module *mod) { } static inline int ftrace_text_reserved(const void *start, const void *end) { return 0; } static inline unsigned long ftrace_location(unsigned long ip) { return 0; } /* * Again users of functions that have ftrace_ops may not * have them defined when ftrace is not enabled, but these * functions may still be called. Use a macro instead of inline. */ #define ftrace_regex_open(ops, flag, inod, file) ({ -ENODEV; }) #define ftrace_set_early_filter(ops, buf, enable) do { } while (0) #define ftrace_set_filter_ip(ops, ip, remove, reset) ({ -ENODEV; }) #define ftrace_set_filter(ops, buf, len, reset) ({ -ENODEV; }) #define ftrace_set_notrace(ops, buf, len, reset) ({ -ENODEV; }) #define ftrace_free_filter(ops) do { } while (0) #define ftrace_ops_set_global_filter(ops) do { } while (0) static inline ssize_t ftrace_filter_write(struct file *file, const char __user *ubuf, size_t cnt, loff_t *ppos) { return -ENODEV; } static inline ssize_t ftrace_notrace_write(struct file *file, const char __user *ubuf, size_t cnt, loff_t *ppos) { return -ENODEV; } static inline int ftrace_regex_release(struct inode *inode, struct file *file) { return -ENODEV; } static inline bool is_ftrace_trampoline(unsigned long addr) { return false; } #endif /* CONFIG_DYNAMIC_FTRACE */ /* totally disable ftrace - can not re-enable after this */ void ftrace_kill(void); static inline void tracer_disable(void) { #ifdef CONFIG_FUNCTION_TRACER ftrace_enabled = 0; #endif } /* * Ftrace disable/restore without lock. Some synchronization mechanism * must be used to prevent ftrace_enabled to be changed between * disable/restore. */ static inline int __ftrace_enabled_save(void) { #ifdef CONFIG_FUNCTION_TRACER int saved_ftrace_enabled = ftrace_enabled; ftrace_enabled = 0; return saved_ftrace_enabled; #else return 0; #endif } static inline void __ftrace_enabled_restore(int enabled) { #ifdef CONFIG_FUNCTION_TRACER ftrace_enabled = enabled; #endif } /* All archs should have this, but we define it for consistency */ #ifndef ftrace_return_address0 # define ftrace_return_address0 __builtin_return_address(0) #endif /* Archs may use other ways for ADDR1 and beyond */ #ifndef ftrace_return_address # ifdef CONFIG_FRAME_POINTER # define ftrace_return_address(n) __builtin_return_address(n) # else # define ftrace_return_address(n) 0UL # endif #endif #define CALLER_ADDR0 ((unsigned long)ftrace_return_address0) #define CALLER_ADDR1 ((unsigned long)ftrace_return_address(1)) #define CALLER_ADDR2 ((unsigned long)ftrace_return_address(2)) #define CALLER_ADDR3 ((unsigned long)ftrace_return_address(3)) #define CALLER_ADDR4 ((unsigned long)ftrace_return_address(4)) #define CALLER_ADDR5 ((unsigned long)ftrace_return_address(5)) #define CALLER_ADDR6 ((unsigned long)ftrace_return_address(6)) static __always_inline unsigned long get_lock_parent_ip(void) { unsigned long addr = CALLER_ADDR0; if (!in_lock_functions(addr)) return addr; addr = CALLER_ADDR1; if (!in_lock_functions(addr)) return addr; return CALLER_ADDR2; } #ifdef CONFIG_TRACE_PREEMPT_TOGGLE extern void trace_preempt_on(unsigned long a0, unsigned long a1); extern void trace_preempt_off(unsigned long a0, unsigned long a1); #else /* * Use defines instead of static inlines because some arches will make code out * of the CALLER_ADDR, when we really want these to be a real nop. */ # define trace_preempt_on(a0, a1) do { } while (0) # define trace_preempt_off(a0, a1) do { } while (0) #endif #ifdef CONFIG_FTRACE_MCOUNT_RECORD extern void ftrace_init(void); #ifdef CC_USING_PATCHABLE_FUNCTION_ENTRY #define FTRACE_CALLSITE_SECTION "__patchable_function_entries" #else #define FTRACE_CALLSITE_SECTION "__mcount_loc" #endif #else static inline void ftrace_init(void) { } #endif /* * Structure that defines an entry function trace. * It's already packed but the attribute "packed" is needed * to remove extra padding at the end. */ struct ftrace_graph_ent { unsigned long func; /* Current function */ int depth; } __packed; /* * Structure that defines a return function trace. * It's already packed but the attribute "packed" is needed * to remove extra padding at the end. */ struct ftrace_graph_ret { unsigned long func; /* Current function */ int depth; /* Number of functions that overran the depth limit for current task */ unsigned int overrun; unsigned long long calltime; unsigned long long rettime; } __packed; /* Type of the callback handlers for tracing function graph*/ typedef void (*trace_func_graph_ret_t)(struct ftrace_graph_ret *); /* return */ typedef int (*trace_func_graph_ent_t)(struct ftrace_graph_ent *); /* entry */ extern int ftrace_graph_entry_stub(struct ftrace_graph_ent *trace); #ifdef CONFIG_FUNCTION_GRAPH_TRACER struct fgraph_ops { trace_func_graph_ent_t entryfunc; trace_func_graph_ret_t retfunc; }; /* * Stack of return addresses for functions * of a thread. * Used in struct thread_info */ struct ftrace_ret_stack { unsigned long ret; unsigned long func; unsigned long long calltime; #ifdef CONFIG_FUNCTION_PROFILER unsigned long long subtime; #endif #ifdef HAVE_FUNCTION_GRAPH_FP_TEST unsigned long fp; #endif #ifdef HAVE_FUNCTION_GRAPH_RET_ADDR_PTR unsigned long *retp; #endif }; /* * Primary handler of a function return. * It relays on ftrace_return_to_handler. * Defined in entry_32/64.S */ extern void return_to_handler(void); extern int function_graph_enter(unsigned long ret, unsigned long func, unsigned long frame_pointer, unsigned long *retp); struct ftrace_ret_stack * ftrace_graph_get_ret_stack(struct task_struct *task, int idx); unsigned long ftrace_graph_ret_addr(struct task_struct *task, int *idx, unsigned long ret, unsigned long *retp); /* * Sometimes we don't want to trace a function with the function * graph tracer but we want them to keep traced by the usual function * tracer if the function graph tracer is not configured. */ #define __notrace_funcgraph notrace #define FTRACE_RETFUNC_DEPTH 50 #define FTRACE_RETSTACK_ALLOC_SIZE 32 extern int register_ftrace_graph(struct fgraph_ops *ops); extern void unregister_ftrace_graph(struct fgraph_ops *ops); extern bool ftrace_graph_is_dead(void); extern void ftrace_graph_stop(void); /* The current handlers in use */ extern trace_func_graph_ret_t ftrace_graph_return; extern trace_func_graph_ent_t ftrace_graph_entry; extern void ftrace_graph_init_task(struct task_struct *t); extern void ftrace_graph_exit_task(struct task_struct *t); extern void ftrace_graph_init_idle_task(struct task_struct *t, int cpu); static inline void pause_graph_tracing(void) { atomic_inc(¤t->tracing_graph_pause); } static inline void unpause_graph_tracing(void) { atomic_dec(¤t->tracing_graph_pause); } #else /* !CONFIG_FUNCTION_GRAPH_TRACER */ #define __notrace_funcgraph static inline void ftrace_graph_init_task(struct task_struct *t) { } static inline void ftrace_graph_exit_task(struct task_struct *t) { } static inline void ftrace_graph_init_idle_task(struct task_struct *t, int cpu) { } /* Define as macros as fgraph_ops may not be defined */ #define register_ftrace_graph(ops) ({ -1; }) #define unregister_ftrace_graph(ops) do { } while (0) static inline unsigned long ftrace_graph_ret_addr(struct task_struct *task, int *idx, unsigned long ret, unsigned long *retp) { return ret; } static inline void pause_graph_tracing(void) { } static inline void unpause_graph_tracing(void) { } #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ #ifdef CONFIG_TRACING /* flags for current->trace */ enum { TSK_TRACE_FL_TRACE_BIT = 0, TSK_TRACE_FL_GRAPH_BIT = 1, }; enum { TSK_TRACE_FL_TRACE = 1 << TSK_TRACE_FL_TRACE_BIT, TSK_TRACE_FL_GRAPH = 1 << TSK_TRACE_FL_GRAPH_BIT, }; static inline void set_tsk_trace_trace(struct task_struct *tsk) { set_bit(TSK_TRACE_FL_TRACE_BIT, &tsk->trace); } static inline void clear_tsk_trace_trace(struct task_struct *tsk) { clear_bit(TSK_TRACE_FL_TRACE_BIT, &tsk->trace); } static inline int test_tsk_trace_trace(struct task_struct *tsk) { return tsk->trace & TSK_TRACE_FL_TRACE; } static inline void set_tsk_trace_graph(struct task_struct *tsk) { set_bit(TSK_TRACE_FL_GRAPH_BIT, &tsk->trace); } static inline void clear_tsk_trace_graph(struct task_struct *tsk) { clear_bit(TSK_TRACE_FL_GRAPH_BIT, &tsk->trace); } static inline int test_tsk_trace_graph(struct task_struct *tsk) { return tsk->trace & TSK_TRACE_FL_GRAPH; } enum ftrace_dump_mode; extern enum ftrace_dump_mode ftrace_dump_on_oops; extern int tracepoint_printk; extern void disable_trace_on_warning(void); extern int __disable_trace_on_warning; int tracepoint_printk_sysctl(struct ctl_table *table, int write, void *buffer, size_t *lenp, loff_t *ppos); #else /* CONFIG_TRACING */ static inline void disable_trace_on_warning(void) { } #endif /* CONFIG_TRACING */ #ifdef CONFIG_FTRACE_SYSCALLS unsigned long arch_syscall_addr(int nr); #endif /* CONFIG_FTRACE_SYSCALLS */ #endif /* _LINUX_FTRACE_H */ PK ! �� �C C surface_acpi_notify.hnu �[��� /* SPDX-License-Identifier: GPL-2.0+ */ /* * Interface for Surface ACPI Notify (SAN) driver. * * Provides access to discrete GPU notifications sent from ACPI via the SAN * driver, which are not handled by this driver directly. * * Copyright (C) 2019-2020 Maximilian Luz <luzmaximilian@gmail.com> */ #ifndef _LINUX_SURFACE_ACPI_NOTIFY_H #define _LINUX_SURFACE_ACPI_NOTIFY_H #include <linux/notifier.h> #include <linux/types.h> /** * struct san_dgpu_event - Discrete GPU ACPI event. * @category: Category of the event. * @target: Target ID of the event source. * @command: Command ID of the event. * @instance: Instance ID of the event source. * @length: Length of the event's payload data (in bytes). * @payload: Pointer to the event's payload data. */ struct san_dgpu_event { u8 category; u8 target; u8 command; u8 instance; u16 length; u8 *payload; }; int san_client_link(struct device *client); int san_dgpu_notifier_register(struct notifier_block *nb); int san_dgpu_notifier_unregister(struct notifier_block *nb); #endif /* _LINUX_SURFACE_ACPI_NOTIFY_H */ PK ! ��[ [ tracepoint-defs.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef TRACEPOINT_DEFS_H #define TRACEPOINT_DEFS_H 1 /* * File can be included directly by headers who only want to access * tracepoint->key to guard out of line trace calls, or the definition of * trace_print_flags{_u64}. Otherwise linux/tracepoint.h should be used. */ #include <linux/atomic.h> #include <linux/static_key.h> struct static_call_key; struct trace_print_flags { unsigned long mask; const char *name; }; struct trace_print_flags_u64 { unsigned long long mask; const char *name; }; struct tracepoint_func { void *func; void *data; int prio; }; struct tracepoint { const char *name; /* Tracepoint name */ struct static_key key; struct static_call_key *static_call_key; void *static_call_tramp; void *iterator; int (*regfunc)(void); void (*unregfunc)(void); struct tracepoint_func __rcu *funcs; }; #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS typedef const int tracepoint_ptr_t; #else typedef struct tracepoint * const tracepoint_ptr_t; #endif struct bpf_raw_event_map { struct tracepoint *tp; void *bpf_func; u32 num_args; u32 writable_size; } __aligned(32); /* * If a tracepoint needs to be called from a header file, it is not * recommended to call it directly, as tracepoints in header files * may cause side-effects and bloat the kernel. Instead, use * tracepoint_enabled() to test if the tracepoint is enabled, then if * it is, call a wrapper function defined in a C file that will then * call the tracepoint. * * For "trace_foo_bar()", you would need to create a wrapper function * in a C file to call trace_foo_bar(): * void do_trace_foo_bar(args) { trace_foo_bar(args); } * Then in the header file, declare the tracepoint: * DECLARE_TRACEPOINT(foo_bar); * And call your wrapper: * static inline void some_inlined_function() { * [..] * if (tracepoint_enabled(foo_bar)) * do_trace_foo_bar(args); * [..] * } * * Note: tracepoint_enabled(foo_bar) is equivalent to trace_foo_bar_enabled() * but is safe to have in headers, where trace_foo_bar_enabled() is not. */ #define DECLARE_TRACEPOINT(tp) \ extern struct tracepoint __tracepoint_##tp #ifdef CONFIG_TRACEPOINTS # define tracepoint_enabled(tp) \ static_key_false(&(__tracepoint_##tp).key) #else # define tracepoint_enabled(tracepoint) false #endif #endif PK ! ��� slab_def.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_SLAB_DEF_H #define _LINUX_SLAB_DEF_H #include <linux/kfence.h> #include <linux/reciprocal_div.h> /* * Definitions unique to the original Linux SLAB allocator. */ struct kmem_cache { struct array_cache __percpu *cpu_cache; /* 1) Cache tunables. Protected by slab_mutex */ unsigned int batchcount; unsigned int limit; unsigned int shared; unsigned int size; struct reciprocal_value reciprocal_buffer_size; /* 2) touched by every alloc & free from the backend */ slab_flags_t flags; /* constant flags */ unsigned int num; /* # of objs per slab */ /* 3) cache_grow/shrink */ /* order of pgs per slab (2^n) */ unsigned int gfporder; /* force GFP flags, e.g. GFP_DMA */ gfp_t allocflags; size_t colour; /* cache colouring range */ unsigned int colour_off; /* colour offset */ struct kmem_cache *freelist_cache; unsigned int freelist_size; /* constructor func */ void (*ctor)(void *obj); /* 4) cache creation/removal */ const char *name; struct list_head list; int refcount; int object_size; int align; /* 5) statistics */ #ifdef CONFIG_DEBUG_SLAB unsigned long num_active; unsigned long num_allocations; unsigned long high_mark; unsigned long grown; unsigned long reaped; unsigned long errors; unsigned long max_freeable; unsigned long node_allocs; unsigned long node_frees; unsigned long node_overflow; atomic_t allochit; atomic_t allocmiss; atomic_t freehit; atomic_t freemiss; /* * If debugging is enabled, then the allocator can add additional * fields and/or padding to every object. 'size' contains the total * object size including these internal fields, while 'obj_offset' * and 'object_size' contain the offset to the user object and its * size. */ int obj_offset; #endif /* CONFIG_DEBUG_SLAB */ #ifdef CONFIG_KASAN struct kasan_cache kasan_info; #endif #ifdef CONFIG_SLAB_FREELIST_RANDOM unsigned int *random_seq; #endif unsigned int useroffset; /* Usercopy region offset */ unsigned int usersize; /* Usercopy region size */ struct kmem_cache_node *node[MAX_NUMNODES]; }; static inline void *nearest_obj(struct kmem_cache *cache, struct page *page, void *x) { void *object = x - (x - page->s_mem) % cache->size; void *last_object = page->s_mem + (cache->num - 1) * cache->size; if (unlikely(object > last_object)) return last_object; else return object; } /* * We want to avoid an expensive divide : (offset / cache->size) * Using the fact that size is a constant for a particular cache, * we can replace (offset / cache->size) by * reciprocal_divide(offset, cache->reciprocal_buffer_size) */ static inline unsigned int obj_to_index(const struct kmem_cache *cache, const struct page *page, void *obj) { u32 offset = (obj - page->s_mem); return reciprocal_divide(offset, cache->reciprocal_buffer_size); } static inline int objs_per_slab_page(const struct kmem_cache *cache, const struct page *page) { if (is_kfence_address(page_address(page))) return 1; return cache->num; } #endif /* _LINUX_SLAB_DEF_H */ PK ! ���h� � of_mdio.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * OF helpers for the MDIO (Ethernet PHY) API * * Copyright (c) 2009 Secret Lab Technologies, Ltd. */ #ifndef __LINUX_OF_MDIO_H #define __LINUX_OF_MDIO_H #include <linux/device.h> #include <linux/phy.h> #include <linux/of.h> #if IS_ENABLED(CONFIG_OF_MDIO) bool of_mdiobus_child_is_phy(struct device_node *child); int __of_mdiobus_register(struct mii_bus *mdio, struct device_node *np, struct module *owner); static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np) { return __of_mdiobus_register(mdio, np, THIS_MODULE); } int __devm_of_mdiobus_register(struct device *dev, struct mii_bus *mdio, struct device_node *np, struct module *owner); static inline int devm_of_mdiobus_register(struct device *dev, struct mii_bus *mdio, struct device_node *np) { return __devm_of_mdiobus_register(dev, mdio, np, THIS_MODULE); } struct mdio_device *of_mdio_find_device(struct device_node *np); struct phy_device *of_phy_find_device(struct device_node *phy_np); struct phy_device * of_phy_connect(struct net_device *dev, struct device_node *phy_np, void (*hndlr)(struct net_device *), u32 flags, phy_interface_t iface); struct phy_device * of_phy_get_and_connect(struct net_device *dev, struct device_node *np, void (*hndlr)(struct net_device *)); struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np); int of_phy_register_fixed_link(struct device_node *np); void of_phy_deregister_fixed_link(struct device_node *np); bool of_phy_is_fixed_link(struct device_node *np); int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, struct device_node *child, u32 addr); static inline int of_mdio_parse_addr(struct device *dev, const struct device_node *np) { u32 addr; int ret; ret = of_property_read_u32(np, "reg", &addr); if (ret < 0) { dev_err(dev, "%s has invalid PHY address\n", np->full_name); return ret; } /* A PHY must have a reg property in the range [0-31] */ if (addr >= PHY_MAX_ADDR) { dev_err(dev, "%s PHY address %i is too large\n", np->full_name, addr); return -EINVAL; } return addr; } #else /* CONFIG_OF_MDIO */ static inline bool of_mdiobus_child_is_phy(struct device_node *child) { return false; } static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np) { /* * Fall back to the non-DT function to register a bus. * This way, we don't have to keep compat bits around in drivers. */ return mdiobus_register(mdio); } static inline int devm_of_mdiobus_register(struct device *dev, struct mii_bus *mdio, struct device_node *np) { return devm_mdiobus_register(dev, mdio); } static inline struct mdio_device *of_mdio_find_device(struct device_node *np) { return NULL; } static inline struct phy_device *of_phy_find_device(struct device_node *phy_np) { return NULL; } static inline struct phy_device *of_phy_connect(struct net_device *dev, struct device_node *phy_np, void (*hndlr)(struct net_device *), u32 flags, phy_interface_t iface) { return NULL; } static inline struct phy_device * of_phy_get_and_connect(struct net_device *dev, struct device_node *np, void (*hndlr)(struct net_device *)) { return NULL; } static inline struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np) { return NULL; } static inline int of_mdio_parse_addr(struct device *dev, const struct device_node *np) { return -ENOSYS; } static inline int of_phy_register_fixed_link(struct device_node *np) { return -ENOSYS; } static inline void of_phy_deregister_fixed_link(struct device_node *np) { } static inline bool of_phy_is_fixed_link(struct device_node *np) { return false; } static inline int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, struct device_node *child, u32 addr) { return -ENOSYS; } #endif #endif /* __LINUX_OF_MDIO_H */ PK ! |�jw w highmem-internal.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_HIGHMEM_INTERNAL_H #define _LINUX_HIGHMEM_INTERNAL_H /* * Outside of CONFIG_HIGHMEM to support X86 32bit iomap_atomic() cruft. */ #ifdef CONFIG_KMAP_LOCAL void *__kmap_local_pfn_prot(unsigned long pfn, pgprot_t prot); void *__kmap_local_page_prot(struct page *page, pgprot_t prot); void kunmap_local_indexed(void *vaddr); void kmap_local_fork(struct task_struct *tsk); void __kmap_local_sched_out(void); void __kmap_local_sched_in(void); static inline void kmap_assert_nomap(void) { DEBUG_LOCKS_WARN_ON(current->kmap_ctrl.idx); } #else static inline void kmap_local_fork(struct task_struct *tsk) { } static inline void kmap_assert_nomap(void) { } #endif #ifdef CONFIG_HIGHMEM #include <asm/highmem.h> #ifndef ARCH_HAS_KMAP_FLUSH_TLB static inline void kmap_flush_tlb(unsigned long addr) { } #endif #ifndef kmap_prot #define kmap_prot PAGE_KERNEL #endif void *kmap_high(struct page *page); void kunmap_high(struct page *page); void __kmap_flush_unused(void); struct page *__kmap_to_page(void *addr); static inline void *kmap(struct page *page) { void *addr; might_sleep(); if (!PageHighMem(page)) addr = page_address(page); else addr = kmap_high(page); kmap_flush_tlb((unsigned long)addr); return addr; } static inline void kunmap(struct page *page) { might_sleep(); if (!PageHighMem(page)) return; kunmap_high(page); } static inline struct page *kmap_to_page(void *addr) { return __kmap_to_page(addr); } static inline void kmap_flush_unused(void) { __kmap_flush_unused(); } static inline void *kmap_local_page(struct page *page) { return __kmap_local_page_prot(page, kmap_prot); } static inline void *kmap_local_page_prot(struct page *page, pgprot_t prot) { return __kmap_local_page_prot(page, prot); } static inline void *kmap_local_pfn(unsigned long pfn) { return __kmap_local_pfn_prot(pfn, kmap_prot); } static inline void __kunmap_local(void *vaddr) { kunmap_local_indexed(vaddr); } static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot) { if (IS_ENABLED(CONFIG_PREEMPT_RT)) migrate_disable(); else preempt_disable(); pagefault_disable(); return __kmap_local_page_prot(page, prot); } static inline void *kmap_atomic(struct page *page) { return kmap_atomic_prot(page, kmap_prot); } static inline void *kmap_atomic_pfn(unsigned long pfn) { if (IS_ENABLED(CONFIG_PREEMPT_RT)) migrate_disable(); else preempt_disable(); pagefault_disable(); return __kmap_local_pfn_prot(pfn, kmap_prot); } static inline void __kunmap_atomic(void *addr) { kunmap_local_indexed(addr); pagefault_enable(); if (IS_ENABLED(CONFIG_PREEMPT_RT)) migrate_enable(); else preempt_enable(); } unsigned int __nr_free_highpages(void); extern atomic_long_t _totalhigh_pages; static inline unsigned int nr_free_highpages(void) { return __nr_free_highpages(); } static inline unsigned long totalhigh_pages(void) { return (unsigned long)atomic_long_read(&_totalhigh_pages); } static inline void totalhigh_pages_add(long count) { atomic_long_add(count, &_totalhigh_pages); } #else /* CONFIG_HIGHMEM */ static inline struct page *kmap_to_page(void *addr) { return virt_to_page(addr); } static inline void *kmap(struct page *page) { might_sleep(); return page_address(page); } static inline void kunmap_high(struct page *page) { } static inline void kmap_flush_unused(void) { } static inline void kunmap(struct page *page) { #ifdef ARCH_HAS_FLUSH_ON_KUNMAP kunmap_flush_on_unmap(page_address(page)); #endif } static inline void *kmap_local_page(struct page *page) { return page_address(page); } static inline void *kmap_local_page_prot(struct page *page, pgprot_t prot) { return kmap_local_page(page); } static inline void *kmap_local_pfn(unsigned long pfn) { return kmap_local_page(pfn_to_page(pfn)); } static inline void __kunmap_local(void *addr) { #ifdef ARCH_HAS_FLUSH_ON_KUNMAP kunmap_flush_on_unmap(PTR_ALIGN_DOWN(addr, PAGE_SIZE)); #endif } static inline void *kmap_atomic(struct page *page) { if (IS_ENABLED(CONFIG_PREEMPT_RT)) migrate_disable(); else preempt_disable(); pagefault_disable(); return page_address(page); } static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot) { return kmap_atomic(page); } static inline void *kmap_atomic_pfn(unsigned long pfn) { return kmap_atomic(pfn_to_page(pfn)); } static inline void __kunmap_atomic(void *addr) { #ifdef ARCH_HAS_FLUSH_ON_KUNMAP kunmap_flush_on_unmap(PTR_ALIGN_DOWN(addr, PAGE_SIZE)); #endif pagefault_enable(); if (IS_ENABLED(CONFIG_PREEMPT_RT)) migrate_enable(); else preempt_enable(); } static inline unsigned int nr_free_highpages(void) { return 0; } static inline unsigned long totalhigh_pages(void) { return 0UL; } #endif /* CONFIG_HIGHMEM */ /* * Prevent people trying to call kunmap_atomic() as if it were kunmap() * kunmap_atomic() should get the return value of kmap_atomic, not the page. */ #define kunmap_atomic(__addr) \ do { \ BUILD_BUG_ON(__same_type((__addr), struct page *)); \ __kunmap_atomic(__addr); \ } while (0) #define kunmap_local(__addr) \ do { \ BUILD_BUG_ON(__same_type((__addr), struct page *)); \ __kunmap_local(__addr); \ } while (0) #endif PK ! �-�Rs s iopoll.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved. */ #ifndef _LINUX_IOPOLL_H #define _LINUX_IOPOLL_H #include <linux/kernel.h> #include <linux/types.h> #include <linux/ktime.h> #include <linux/delay.h> #include <linux/errno.h> #include <linux/io.h> /** * read_poll_timeout - Periodically poll an address until a condition is * met or a timeout occurs * @op: accessor function (takes @args as its arguments) * @val: Variable to read the value into * @cond: Break condition (usually involving @val) * @sleep_us: Maximum time to sleep between reads in us (0 * tight-loops). Should be less than ~20ms since usleep_range * is used (see Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * @sleep_before_read: if it is true, sleep @sleep_us before read. * @args: arguments for @op poll * * Returns 0 on success and -ETIMEDOUT upon a timeout. In either * case, the last read value at @args is stored in @val. Must not * be called from atomic context if sleep_us or timeout_us are used. * * When available, you'll probably want to use one of the specialized * macros defined below rather than this macro directly. */ #define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ sleep_before_read, args...) \ ({ \ u64 __timeout_us = (timeout_us); \ unsigned long __sleep_us = (sleep_us); \ ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ might_sleep_if((__sleep_us) != 0); \ if (sleep_before_read && __sleep_us) \ usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ for (;;) { \ (val) = op(args); \ if (cond) \ break; \ if (__timeout_us && \ ktime_compare(ktime_get(), __timeout) > 0) { \ (val) = op(args); \ break; \ } \ if (__sleep_us) \ usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ cpu_relax(); \ } \ (cond) ? 0 : -ETIMEDOUT; \ }) /** * read_poll_timeout_atomic - Periodically poll an address until a condition is * met or a timeout occurs * @op: accessor function (takes @args as its arguments) * @val: Variable to read the value into * @cond: Break condition (usually involving @val) * @delay_us: Time to udelay between reads in us (0 tight-loops). Should * be less than ~10us since udelay is used (see * Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * @delay_before_read: if it is true, delay @delay_us before read. * @args: arguments for @op poll * * Returns 0 on success and -ETIMEDOUT upon a timeout. In either * case, the last read value at @args is stored in @val. * * When available, you'll probably want to use one of the specialized * macros defined below rather than this macro directly. */ #define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \ delay_before_read, args...) \ ({ \ u64 __timeout_us = (timeout_us); \ unsigned long __delay_us = (delay_us); \ ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ if (delay_before_read && __delay_us) \ udelay(__delay_us); \ for (;;) { \ (val) = op(args); \ if (cond) \ break; \ if (__timeout_us && \ ktime_compare(ktime_get(), __timeout) > 0) { \ (val) = op(args); \ break; \ } \ if (__delay_us) \ udelay(__delay_us); \ cpu_relax(); \ } \ (cond) ? 0 : -ETIMEDOUT; \ }) /** * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs * @op: accessor function (takes @addr as its only argument) * @addr: Address to poll * @val: Variable to read the value into * @cond: Break condition (usually involving @val) * @sleep_us: Maximum time to sleep between reads in us (0 * tight-loops). Should be less than ~20ms since usleep_range * is used (see Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * * Returns 0 on success and -ETIMEDOUT upon a timeout. In either * case, the last read value at @addr is stored in @val. Must not * be called from atomic context if sleep_us or timeout_us are used. * * When available, you'll probably want to use one of the specialized * macros defined below rather than this macro directly. */ #define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ read_poll_timeout(op, val, cond, sleep_us, timeout_us, false, addr) /** * readx_poll_timeout_atomic - Periodically poll an address until a condition is met or a timeout occurs * @op: accessor function (takes @addr as its only argument) * @addr: Address to poll * @val: Variable to read the value into * @cond: Break condition (usually involving @val) * @delay_us: Time to udelay between reads in us (0 tight-loops). Should * be less than ~10us since udelay is used (see * Documentation/timers/timers-howto.rst). * @timeout_us: Timeout in us, 0 means never timeout * * Returns 0 on success and -ETIMEDOUT upon a timeout. In either * case, the last read value at @addr is stored in @val. * * When available, you'll probably want to use one of the specialized * macros defined below rather than this macro directly. */ #define readx_poll_timeout_atomic(op, addr, val, cond, delay_us, timeout_us) \ read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, false, addr) #define readb_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readb, addr, val, cond, delay_us, timeout_us) #define readb_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readb, addr, val, cond, delay_us, timeout_us) #define readw_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readw, addr, val, cond, delay_us, timeout_us) #define readw_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readw, addr, val, cond, delay_us, timeout_us) #define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readl, addr, val, cond, delay_us, timeout_us) #define readl_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readl, addr, val, cond, delay_us, timeout_us) #define readq_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readq, addr, val, cond, delay_us, timeout_us) #define readq_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readq, addr, val, cond, delay_us, timeout_us) #define readb_relaxed_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readb_relaxed, addr, val, cond, delay_us, timeout_us) #define readb_relaxed_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readb_relaxed, addr, val, cond, delay_us, timeout_us) #define readw_relaxed_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readw_relaxed, addr, val, cond, delay_us, timeout_us) #define readw_relaxed_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readw_relaxed, addr, val, cond, delay_us, timeout_us) #define readl_relaxed_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readl_relaxed, addr, val, cond, delay_us, timeout_us) #define readl_relaxed_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readl_relaxed, addr, val, cond, delay_us, timeout_us) #define readq_relaxed_poll_timeout(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout(readq_relaxed, addr, val, cond, delay_us, timeout_us) #define readq_relaxed_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ readx_poll_timeout_atomic(readq_relaxed, addr, val, cond, delay_us, timeout_us) #endif /* _LINUX_IOPOLL_H */ PK ! Sy��� � hardirq.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_HARDIRQ_H #define LINUX_HARDIRQ_H #include <linux/context_tracking_state.h> #include <linux/preempt.h> #include <linux/lockdep.h> #include <linux/ftrace_irq.h> #include <linux/sched.h> #include <linux/vtime.h> #include <asm/hardirq.h> extern void synchronize_irq(unsigned int irq); extern bool synchronize_hardirq(unsigned int irq); #ifdef CONFIG_NO_HZ_FULL void __rcu_irq_enter_check_tick(void); #else static inline void __rcu_irq_enter_check_tick(void) { } #endif static __always_inline void rcu_irq_enter_check_tick(void) { if (context_tracking_enabled()) __rcu_irq_enter_check_tick(); } /* * It is safe to do non-atomic ops on ->hardirq_context, * because NMI handlers may not preempt and the ops are * always balanced, so the interrupted value of ->hardirq_context * will always be restored. */ #define __irq_enter() \ do { \ preempt_count_add(HARDIRQ_OFFSET); \ lockdep_hardirq_enter(); \ account_hardirq_enter(current); \ } while (0) /* * Like __irq_enter() without time accounting for fast * interrupts, e.g. reschedule IPI where time accounting * is more expensive than the actual interrupt. */ #define __irq_enter_raw() \ do { \ preempt_count_add(HARDIRQ_OFFSET); \ lockdep_hardirq_enter(); \ } while (0) /* * Enter irq context (on NO_HZ, update jiffies): */ void irq_enter(void); /* * Like irq_enter(), but RCU is already watching. */ void irq_enter_rcu(void); /* * Exit irq context without processing softirqs: */ #define __irq_exit() \ do { \ account_hardirq_exit(current); \ lockdep_hardirq_exit(); \ preempt_count_sub(HARDIRQ_OFFSET); \ } while (0) /* * Like __irq_exit() without time accounting */ #define __irq_exit_raw() \ do { \ lockdep_hardirq_exit(); \ preempt_count_sub(HARDIRQ_OFFSET); \ } while (0) /* * Exit irq context and process softirqs if needed: */ void irq_exit(void); /* * Like irq_exit(), but return with RCU watching. */ void irq_exit_rcu(void); #ifndef arch_nmi_enter #define arch_nmi_enter() do { } while (0) #define arch_nmi_exit() do { } while (0) #endif #ifdef CONFIG_TINY_RCU static inline void rcu_nmi_enter(void) { } static inline void rcu_nmi_exit(void) { } #else extern void rcu_nmi_enter(void); extern void rcu_nmi_exit(void); #endif /* * NMI vs Tracing * -------------- * * We must not land in a tracer until (or after) we've changed preempt_count * such that in_nmi() becomes true. To that effect all NMI C entry points must * be marked 'notrace' and call nmi_enter() as soon as possible. */ /* * nmi_enter() can nest up to 15 times; see NMI_BITS. */ #define __nmi_enter() \ do { \ lockdep_off(); \ arch_nmi_enter(); \ BUG_ON(in_nmi() == NMI_MASK); \ __preempt_count_add(NMI_OFFSET + HARDIRQ_OFFSET); \ } while (0) #define nmi_enter() \ do { \ __nmi_enter(); \ lockdep_hardirq_enter(); \ rcu_nmi_enter(); \ instrumentation_begin(); \ ftrace_nmi_enter(); \ instrumentation_end(); \ } while (0) #define __nmi_exit() \ do { \ BUG_ON(!in_nmi()); \ __preempt_count_sub(NMI_OFFSET + HARDIRQ_OFFSET); \ arch_nmi_exit(); \ lockdep_on(); \ } while (0) #define nmi_exit() \ do { \ instrumentation_begin(); \ ftrace_nmi_exit(); \ instrumentation_end(); \ rcu_nmi_exit(); \ lockdep_hardirq_exit(); \ __nmi_exit(); \ } while (0) #endif /* LINUX_HARDIRQ_H */ PK ! �A�H� � mm_inline.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_MM_INLINE_H #define LINUX_MM_INLINE_H #include <linux/huge_mm.h> #include <linux/swap.h> /** * page_is_file_lru - should the page be on a file LRU or anon LRU? * @page: the page to test * * Returns 1 if @page is a regular filesystem backed page cache page or a lazily * freed anonymous page (e.g. via MADV_FREE). Returns 0 if @page is a normal * anonymous page, a tmpfs page or otherwise ram or swap backed page. Used by * functions that manipulate the LRU lists, to sort a page onto the right LRU * list. * * We would like to get this info without a page flag, but the state * needs to survive until the page is last deleted from the LRU, which * could be as far down as __page_cache_release. */ static inline int page_is_file_lru(struct page *page) { return !PageSwapBacked(page); } static __always_inline void update_lru_size(struct lruvec *lruvec, enum lru_list lru, enum zone_type zid, int nr_pages) { struct pglist_data *pgdat = lruvec_pgdat(lruvec); __mod_lruvec_state(lruvec, NR_LRU_BASE + lru, nr_pages); __mod_zone_page_state(&pgdat->node_zones[zid], NR_ZONE_LRU_BASE + lru, nr_pages); #ifdef CONFIG_MEMCG mem_cgroup_update_lru_size(lruvec, lru, zid, nr_pages); #endif } /** * __clear_page_lru_flags - clear page lru flags before releasing a page * @page: the page that was on lru and now has a zero reference */ static __always_inline void __clear_page_lru_flags(struct page *page) { VM_BUG_ON_PAGE(!PageLRU(page), page); __ClearPageLRU(page); /* this shouldn't happen, so leave the flags to bad_page() */ if (PageActive(page) && PageUnevictable(page)) return; __ClearPageActive(page); __ClearPageUnevictable(page); } /** * page_lru - which LRU list should a page be on? * @page: the page to test * * Returns the LRU list a page should be on, as an index * into the array of LRU lists. */ static __always_inline enum lru_list page_lru(struct page *page) { enum lru_list lru; VM_BUG_ON_PAGE(PageActive(page) && PageUnevictable(page), page); if (PageUnevictable(page)) return LRU_UNEVICTABLE; lru = page_is_file_lru(page) ? LRU_INACTIVE_FILE : LRU_INACTIVE_ANON; if (PageActive(page)) lru += LRU_ACTIVE; return lru; } static __always_inline void add_page_to_lru_list(struct page *page, struct lruvec *lruvec) { enum lru_list lru = page_lru(page); update_lru_size(lruvec, lru, page_zonenum(page), thp_nr_pages(page)); list_add(&page->lru, &lruvec->lists[lru]); } static __always_inline void add_page_to_lru_list_tail(struct page *page, struct lruvec *lruvec) { enum lru_list lru = page_lru(page); update_lru_size(lruvec, lru, page_zonenum(page), thp_nr_pages(page)); list_add_tail(&page->lru, &lruvec->lists[lru]); } static __always_inline void del_page_from_lru_list(struct page *page, struct lruvec *lruvec) { list_del(&page->lru); update_lru_size(lruvec, page_lru(page), page_zonenum(page), -thp_nr_pages(page)); } #endif PK ! �qoE E flat.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2002-2003 David McCullough <davidm@snapgear.com> * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com> * The Silver Hammer Group, Ltd. * * This file provides the definitions and structures needed to * support uClinux flat-format executables. */ #ifndef _LINUX_FLAT_H #define _LINUX_FLAT_H #define FLAT_VERSION 0x00000004L /* * To make everything easier to port and manage cross platform * development, all fields are in network byte order. */ struct flat_hdr { char magic[4]; __be32 rev; /* version (as above) */ __be32 entry; /* Offset of first executable instruction with text segment from beginning of file */ __be32 data_start; /* Offset of data segment from beginning of file */ __be32 data_end; /* Offset of end of data segment from beginning of file */ __be32 bss_end; /* Offset of end of bss segment from beginning of file */ /* (It is assumed that data_end through bss_end forms the bss segment.) */ __be32 stack_size; /* Size of stack, in bytes */ __be32 reloc_start; /* Offset of relocation records from beginning of file */ __be32 reloc_count; /* Number of relocation records */ __be32 flags; __be32 build_date; /* When the program/library was built */ __u32 filler[5]; /* Reservered, set to zero */ }; #define FLAT_FLAG_RAM 0x0001 /* load program entirely into RAM */ #define FLAT_FLAG_GOTPIC 0x0002 /* program is PIC with GOT */ #define FLAT_FLAG_GZIP 0x0004 /* all but the header is compressed */ #define FLAT_FLAG_GZDATA 0x0008 /* only data/relocs are compressed (for XIP) */ #define FLAT_FLAG_KTRACE 0x0010 /* output useful kernel trace for debugging */ /* * While it would be nice to keep this header clean, users of older * tools still need this support in the kernel. So this section is * purely for compatibility with old tool chains. * * DO NOT make changes or enhancements to the old format please, just work * with the format above, except to fix bugs with old format support. */ #define OLD_FLAT_VERSION 0x00000002L #define OLD_FLAT_RELOC_TYPE_TEXT 0 #define OLD_FLAT_RELOC_TYPE_DATA 1 #define OLD_FLAT_RELOC_TYPE_BSS 2 typedef union { u32 value; struct { #if defined(__LITTLE_ENDIAN_BITFIELD) || \ (defined(mc68000) && !defined(CONFIG_COLDFIRE)) s32 offset : 30; u32 type : 2; # elif defined(__BIG_ENDIAN_BITFIELD) u32 type : 2; s32 offset : 30; # else # error "Unknown bitfield order for flat files." # endif } reloc; } flat_v2_reloc_t; #endif /* _LINUX_FLAT_H */ PK ! ���� � llc.hnu �[��� /* * IEEE 802.2 User Interface SAPs for Linux, data structures and indicators. * * Copyright (c) 2001 by Jay Schulist <jschlst@samba.org> * * This program can be redistributed or modified under the terms of the * GNU General Public License as published by the Free Software Foundation. * This program is distributed without any warranty or implied warranty * of merchantability or fitness for a particular purpose. * * See the GNU General Public License for more details. */ #ifndef __LINUX_LLC_H #define __LINUX_LLC_H #include <uapi/linux/llc.h> #define LLC_SAP_DYN_START 0xC0 #define LLC_SAP_DYN_STOP 0xDE #define LLC_SAP_DYN_TRIES 4 #define llc_ui_skb_cb(__skb) ((struct sockaddr_llc *)&((__skb)->cb[0])) #endif /* __LINUX_LLC_H */ PK ! �b) B4 B4 uaccess.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_UACCESS_H__ #define __LINUX_UACCESS_H__ #include <linux/fault-inject-usercopy.h> #include <linux/instrumented.h> #include <linux/minmax.h> #include <linux/sched.h> #include <linux/thread_info.h> #include <asm/uaccess.h> #ifdef CONFIG_SET_FS /* * Force the uaccess routines to be wired up for actual userspace access, * overriding any possible set_fs(KERNEL_DS) still lingering around. Undone * using force_uaccess_end below. */ static inline mm_segment_t force_uaccess_begin(void) { mm_segment_t fs = get_fs(); set_fs(USER_DS); return fs; } static inline void force_uaccess_end(mm_segment_t oldfs) { set_fs(oldfs); } #else /* CONFIG_SET_FS */ typedef struct { /* empty dummy */ } mm_segment_t; #ifndef TASK_SIZE_MAX #define TASK_SIZE_MAX TASK_SIZE #endif #define uaccess_kernel() (false) #define user_addr_max() (TASK_SIZE_MAX) static inline mm_segment_t force_uaccess_begin(void) { return (mm_segment_t) { }; } static inline void force_uaccess_end(mm_segment_t oldfs) { } #endif /* CONFIG_SET_FS */ /* * Architectures should provide two primitives (raw_copy_{to,from}_user()) * and get rid of their private instances of copy_{to,from}_user() and * __copy_{to,from}_user{,_inatomic}(). * * raw_copy_{to,from}_user(to, from, size) should copy up to size bytes and * return the amount left to copy. They should assume that access_ok() has * already been checked (and succeeded); they should *not* zero-pad anything. * No KASAN or object size checks either - those belong here. * * Both of these functions should attempt to copy size bytes starting at from * into the area starting at to. They must not fetch or store anything * outside of those areas. Return value must be between 0 (everything * copied successfully) and size (nothing copied). * * If raw_copy_{to,from}_user(to, from, size) returns N, size - N bytes starting * at to must become equal to the bytes fetched from the corresponding area * starting at from. All data past to + size - N must be left unmodified. * * If copying succeeds, the return value must be 0. If some data cannot be * fetched, it is permitted to copy less than had been fetched; the only * hard requirement is that not storing anything at all (i.e. returning size) * should happen only when nothing could be copied. In other words, you don't * have to squeeze as much as possible - it is allowed, but not necessary. * * For raw_copy_from_user() to always points to kernel memory and no faults * on store should happen. Interpretation of from is affected by set_fs(). * For raw_copy_to_user() it's the other way round. * * Both can be inlined - it's up to architectures whether it wants to bother * with that. They should not be used directly; they are used to implement * the 6 functions (copy_{to,from}_user(), __copy_{to,from}_user_inatomic()) * that are used instead. Out of those, __... ones are inlined. Plain * copy_{to,from}_user() might or might not be inlined. If you want them * inlined, have asm/uaccess.h define INLINE_COPY_{TO,FROM}_USER. * * NOTE: only copy_from_user() zero-pads the destination in case of short copy. * Neither __copy_from_user() nor __copy_from_user_inatomic() zero anything * at all; their callers absolutely must check the return value. * * Biarch ones should also provide raw_copy_in_user() - similar to the above, * but both source and destination are __user pointers (affected by set_fs() * as usual) and both source and destination can trigger faults. */ static __always_inline __must_check unsigned long __copy_from_user_inatomic(void *to, const void __user *from, unsigned long n) { instrument_copy_from_user(to, from, n); check_object_size(to, n, false); return raw_copy_from_user(to, from, n); } static __always_inline __must_check unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n) { might_fault(); if (should_fail_usercopy()) return n; instrument_copy_from_user(to, from, n); check_object_size(to, n, false); return raw_copy_from_user(to, from, n); } /** * __copy_to_user_inatomic: - Copy a block of data into user space, with less checking. * @to: Destination address, in user space. * @from: Source address, in kernel space. * @n: Number of bytes to copy. * * Context: User context only. * * Copy data from kernel space to user space. Caller must check * the specified block with access_ok() before calling this function. * The caller should also make sure he pins the user space address * so that we don't result in page fault and sleep. */ static __always_inline __must_check unsigned long __copy_to_user_inatomic(void __user *to, const void *from, unsigned long n) { if (should_fail_usercopy()) return n; instrument_copy_to_user(to, from, n); check_object_size(from, n, true); return raw_copy_to_user(to, from, n); } static __always_inline __must_check unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n) { might_fault(); if (should_fail_usercopy()) return n; instrument_copy_to_user(to, from, n); check_object_size(from, n, true); return raw_copy_to_user(to, from, n); } #ifdef INLINE_COPY_FROM_USER static inline __must_check unsigned long _copy_from_user(void *to, const void __user *from, unsigned long n) { unsigned long res = n; might_fault(); if (!should_fail_usercopy() && likely(access_ok(from, n))) { instrument_copy_from_user(to, from, n); res = raw_copy_from_user(to, from, n); } if (unlikely(res)) memset(to + (n - res), 0, res); return res; } #else extern __must_check unsigned long _copy_from_user(void *, const void __user *, unsigned long); #endif #ifdef INLINE_COPY_TO_USER static inline __must_check unsigned long _copy_to_user(void __user *to, const void *from, unsigned long n) { might_fault(); if (should_fail_usercopy()) return n; if (access_ok(to, n)) { instrument_copy_to_user(to, from, n); n = raw_copy_to_user(to, from, n); } return n; } #else extern __must_check unsigned long _copy_to_user(void __user *, const void *, unsigned long); #endif static __always_inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) { if (likely(check_copy_size(to, n, false))) n = _copy_from_user(to, from, n); return n; } static __always_inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n) { if (likely(check_copy_size(from, n, true))) n = _copy_to_user(to, from, n); return n; } #ifndef copy_mc_to_kernel /* * Without arch opt-in this generic copy_mc_to_kernel() will not handle * #MC (or arch equivalent) during source read. */ static inline unsigned long __must_check copy_mc_to_kernel(void *dst, const void *src, size_t cnt) { memcpy(dst, src, cnt); return 0; } #endif static __always_inline void pagefault_disabled_inc(void) { current->pagefault_disabled++; } static __always_inline void pagefault_disabled_dec(void) { current->pagefault_disabled--; } /* * These routines enable/disable the pagefault handler. If disabled, it will * not take any locks and go straight to the fixup table. * * User access methods will not sleep when called from a pagefault_disabled() * environment. */ static inline void pagefault_disable(void) { pagefault_disabled_inc(); /* * make sure to have issued the store before a pagefault * can hit. */ barrier(); } static inline void pagefault_enable(void) { /* * make sure to issue those last loads/stores before enabling * the pagefault handler again. */ barrier(); pagefault_disabled_dec(); } /* * Is the pagefault handler disabled? If so, user access methods will not sleep. */ static inline bool pagefault_disabled(void) { return current->pagefault_disabled != 0; } /* * The pagefault handler is in general disabled by pagefault_disable() or * when in irq context (via in_atomic()). * * This function should only be used by the fault handlers. Other users should * stick to pagefault_disabled(). * Please NEVER use preempt_disable() to disable the fault handler. With * !CONFIG_PREEMPT_COUNT, this is like a NOP. So the handler won't be disabled. * in_atomic() will report different values based on !CONFIG_PREEMPT_COUNT. */ #define faulthandler_disabled() (pagefault_disabled() || in_atomic()) #ifndef ARCH_HAS_NOCACHE_UACCESS static inline __must_check unsigned long __copy_from_user_inatomic_nocache(void *to, const void __user *from, unsigned long n) { return __copy_from_user_inatomic(to, from, n); } #endif /* ARCH_HAS_NOCACHE_UACCESS */ extern __must_check int check_zeroed_user(const void __user *from, size_t size); /** * copy_struct_from_user: copy a struct from userspace * @dst: Destination address, in kernel space. This buffer must be @ksize * bytes long. * @ksize: Size of @dst struct. * @src: Source address, in userspace. * @usize: (Alleged) size of @src struct. * * Copies a struct from userspace to kernel space, in a way that guarantees * backwards-compatibility for struct syscall arguments (as long as future * struct extensions are made such that all new fields are *appended* to the * old struct, and zeroed-out new fields have the same meaning as the old * struct). * * @ksize is just sizeof(*dst), and @usize should've been passed by userspace. * The recommended usage is something like the following: * * SYSCALL_DEFINE2(foobar, const struct foo __user *, uarg, size_t, usize) * { * int err; * struct foo karg = {}; * * if (usize > PAGE_SIZE) * return -E2BIG; * if (usize < FOO_SIZE_VER0) * return -EINVAL; * * err = copy_struct_from_user(&karg, sizeof(karg), uarg, usize); * if (err) * return err; * * // ... * } * * There are three cases to consider: * * If @usize == @ksize, then it's copied verbatim. * * If @usize < @ksize, then the userspace has passed an old struct to a * newer kernel. The rest of the trailing bytes in @dst (@ksize - @usize) * are to be zero-filled. * * If @usize > @ksize, then the userspace has passed a new struct to an * older kernel. The trailing bytes unknown to the kernel (@usize - @ksize) * are checked to ensure they are zeroed, otherwise -E2BIG is returned. * * Returns (in all cases, some data may have been copied): * * -E2BIG: (@usize > @ksize) and there are non-zero trailing bytes in @src. * * -EFAULT: access to userspace failed. */ static __always_inline __must_check int copy_struct_from_user(void *dst, size_t ksize, const void __user *src, size_t usize) { size_t size = min(ksize, usize); size_t rest = max(ksize, usize) - size; /* Double check if ksize is larger than a known object size. */ if (WARN_ON_ONCE(ksize > __builtin_object_size(dst, 1))) return -E2BIG; /* Deal with trailing bytes. */ if (usize < ksize) { memset(dst + size, 0, rest); } else if (usize > ksize) { int ret = check_zeroed_user(src + size, rest); if (ret <= 0) return ret ?: -E2BIG; } /* Copy the interoperable parts of the struct. */ if (copy_from_user(dst, src, size)) return -EFAULT; return 0; } bool copy_from_kernel_nofault_allowed(const void *unsafe_src, size_t size); long copy_from_kernel_nofault(void *dst, const void *src, size_t size); long notrace copy_to_kernel_nofault(void *dst, const void *src, size_t size); long copy_from_user_nofault(void *dst, const void __user *src, size_t size); long notrace copy_to_user_nofault(void __user *dst, const void *src, size_t size); long strncpy_from_kernel_nofault(char *dst, const void *unsafe_addr, long count); long strncpy_from_user_nofault(char *dst, const void __user *unsafe_addr, long count); long strnlen_user_nofault(const void __user *unsafe_addr, long count); /** * get_kernel_nofault(): safely attempt to read from a location * @val: read into this variable * @ptr: address to read from * * Returns 0 on success, or -EFAULT. */ #define get_kernel_nofault(val, ptr) ({ \ const typeof(val) *__gk_ptr = (ptr); \ copy_from_kernel_nofault(&(val), __gk_ptr, sizeof(val));\ }) #ifndef user_access_begin #define user_access_begin(ptr,len) access_ok(ptr, len) #define user_access_end() do { } while (0) #define unsafe_op_wrap(op, err) do { if (unlikely(op)) goto err; } while (0) #define unsafe_get_user(x,p,e) unsafe_op_wrap(__get_user(x,p),e) #define unsafe_put_user(x,p,e) unsafe_op_wrap(__put_user(x,p),e) #define unsafe_copy_to_user(d,s,l,e) unsafe_op_wrap(__copy_to_user(d,s,l),e) #define unsafe_copy_from_user(d,s,l,e) unsafe_op_wrap(__copy_from_user(d,s,l),e) static inline unsigned long user_access_save(void) { return 0UL; } static inline void user_access_restore(unsigned long flags) { } #endif #ifndef user_write_access_begin #define user_write_access_begin user_access_begin #define user_write_access_end user_access_end #endif #ifndef user_read_access_begin #define user_read_access_begin user_access_begin #define user_read_access_end user_access_end #endif #ifdef CONFIG_HARDENED_USERCOPY void usercopy_warn(const char *name, const char *detail, bool to_user, unsigned long offset, unsigned long len); void __noreturn usercopy_abort(const char *name, const char *detail, bool to_user, unsigned long offset, unsigned long len); #endif #endif /* __LINUX_UACCESS_H__ */ PK ! ��e e instrumented.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * This header provides generic wrappers for memory access instrumentation that * the compiler cannot emit for: KASAN, KCSAN. */ #ifndef _LINUX_INSTRUMENTED_H #define _LINUX_INSTRUMENTED_H #include <linux/compiler.h> #include <linux/kasan-checks.h> #include <linux/kcsan-checks.h> #include <linux/types.h> /** * instrument_read - instrument regular read access * * Instrument a regular read access. The instrumentation should be inserted * before the actual read happens. * * @ptr address of access * @size size of access */ static __always_inline void instrument_read(const volatile void *v, size_t size) { kasan_check_read(v, size); kcsan_check_read(v, size); } /** * instrument_write - instrument regular write access * * Instrument a regular write access. The instrumentation should be inserted * before the actual write happens. * * @ptr address of access * @size size of access */ static __always_inline void instrument_write(const volatile void *v, size_t size) { kasan_check_write(v, size); kcsan_check_write(v, size); } /** * instrument_read_write - instrument regular read-write access * * Instrument a regular write access. The instrumentation should be inserted * before the actual write happens. * * @ptr address of access * @size size of access */ static __always_inline void instrument_read_write(const volatile void *v, size_t size) { kasan_check_write(v, size); kcsan_check_read_write(v, size); } /** * instrument_atomic_read - instrument atomic read access * * Instrument an atomic read access. The instrumentation should be inserted * before the actual read happens. * * @ptr address of access * @size size of access */ static __always_inline void instrument_atomic_read(const volatile void *v, size_t size) { kasan_check_read(v, size); kcsan_check_atomic_read(v, size); } /** * instrument_atomic_write - instrument atomic write access * * Instrument an atomic write access. The instrumentation should be inserted * before the actual write happens. * * @ptr address of access * @size size of access */ static __always_inline void instrument_atomic_write(const volatile void *v, size_t size) { kasan_check_write(v, size); kcsan_check_atomic_write(v, size); } /** * instrument_atomic_read_write - instrument atomic read-write access * * Instrument an atomic read-write access. The instrumentation should be * inserted before the actual write happens. * * @ptr address of access * @size size of access */ static __always_inline void instrument_atomic_read_write(const volatile void *v, size_t size) { kasan_check_write(v, size); kcsan_check_atomic_read_write(v, size); } /** * instrument_copy_to_user - instrument reads of copy_to_user * * Instrument reads from kernel memory, that are due to copy_to_user (and * variants). The instrumentation must be inserted before the accesses. * * @to destination address * @from source address * @n number of bytes to copy */ static __always_inline void instrument_copy_to_user(void __user *to, const void *from, unsigned long n) { kasan_check_read(from, n); kcsan_check_read(from, n); } /** * instrument_copy_from_user - instrument writes of copy_from_user * * Instrument writes to kernel memory, that are due to copy_from_user (and * variants). The instrumentation should be inserted before the accesses. * * @to destination address * @from source address * @n number of bytes to copy */ static __always_inline void instrument_copy_from_user(const void *to, const void __user *from, unsigned long n) { kasan_check_write(to, n); kcsan_check_write(to, n); } #endif /* _LINUX_INSTRUMENTED_H */ PK ! ����V V file.hnu �[��� /* SPDX-License-Identifier: GPL-2.0 */ /* * Wrapper functions for accessing the file_struct fd array. */ #ifndef __LINUX_FILE_H #define __LINUX_FILE_H #include <linux/compiler.h> #include <linux/types.h> #include <linux/posix_types.h> #include <linux/errno.h> #include <linux/cleanup.h> struct file; extern void fput(struct file *); extern void fput_many(struct file *, unsigned int); struct file_operations; struct task_struct; struct vfsmount; struct dentry; struct inode; struct path; extern struct file *alloc_file_pseudo(struct inode *, struct vfsmount *, const char *, int flags, const struct file_operations *); extern struct file *alloc_file_clone(struct file *, int flags, const struct file_operations *); static inline void fput_light(struct file *file, int fput_needed) { if (fput_needed) fput(file); } struct fd { struct file *file; unsigned int flags; }; #define FDPUT_FPUT 1 #define FDPUT_POS_UNLOCK 2 static inline void fdput(struct fd fd) { if (fd.flags & FDPUT_FPUT) fput(fd.file); } extern struct file *fget(unsigned int fd); extern struct file *fget_many(unsigned int fd, unsigned int refs); extern struct file *fget_raw(unsigned int fd); extern struct file *fget_task(struct task_struct *task, unsigned int fd); extern unsigned long __fdget(unsigned int fd); extern unsigned long __fdget_raw(unsigned int fd); extern unsigned long __fdget_pos(unsigned int fd); extern void __f_unlock_pos(struct file *); static inline struct fd __to_fd(unsigned long v) { return (struct fd){(struct file *)(v & ~3),v & 3}; } static inline struct fd fdget(unsigned int fd) { return __to_fd(__fdget(fd)); } static inline struct fd fdget_raw(unsigned int fd) { return __to_fd(__fdget_raw(fd)); } static inline struct fd fdget_pos(int fd) { return __to_fd(__fdget_pos(fd)); } static inline void fdput_pos(struct fd f) { if (f.flags & FDPUT_POS_UNLOCK) __f_unlock_pos(f.file); fdput(f); } DEFINE_CLASS(fd, struct fd, fdput(_T), fdget(fd), int fd) extern int f_dupfd(unsigned int from, struct file *file, unsigned flags); extern int replace_fd(unsigned fd, struct file *file, unsigned flags); extern void set_close_on_exec(unsigned int fd, int flag); extern bool get_close_on_exec(unsigned int fd); extern int __get_unused_fd_flags(unsigned flags, unsigned long nofile); extern int get_unused_fd_flags(unsigned flags); extern void put_unused_fd(unsigned int fd); DEFINE_CLASS(get_unused_fd, int, if (_T >= 0) put_unused_fd(_T), get_unused_fd_flags(flags), unsigned flags) extern void fd_install(unsigned int fd, struct file *file); extern int __receive_fd(struct file *file, int __user *ufd, unsigned int o_flags); extern int receive_fd(struct file *file, unsigned int o_flags); static inline int receive_fd_user(struct file *file, int __user *ufd, unsigned int o_flags) { if (ufd == NULL) return -EFAULT; return __receive_fd(file, ufd, o_flags); } int receive_fd_replace(int new_fd, struct file *file, unsigned int o_flags); extern void flush_delayed_fput(void); extern void __fput_sync(struct file *); extern unsigned int sysctl_nr_open_min, sysctl_nr_open_max; #endif /* __LINUX_FILE_H */ PK ! �?�>S >S mfd/palmas.hnu �[��� /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * TI Palmas * * Copyright 2011-2013 Texas Instruments Inc. * * Author: Graeme Gregory <gg@slimlogic.co.uk> * Author: Ian Lartey <ian@slimlogic.co.uk> */ #ifndef __LINUX_MFD_PALMAS_H #define __LINUX_MFD_PALMAS_H #include <linux/usb/otg.h> #include <linux/leds.h> #include <linux/regmap.h> #include <linux/regulator/driver.h> #include <linux/extcon-provider.h> #include <linux/of_gpio.h> #include <linux/usb/phy_companion.h> #define PALMAS_NUM_CLIENTS 3 /* The ID_REVISION NUMBERS */ #define PALMAS_CHIP_OLD_ID 0x0000 #define PALMAS_CHIP_ID 0xC035 #define PALMAS_CHIP_CHARGER_ID 0xC036 #define TPS65917_RESERVED -1 #define is_palmas(a) (((a) == PALMAS_CHIP_OLD_ID) || \ ((a) == PALMAS_CHIP_ID)) #define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID) /** * Palmas PMIC feature types * * PALMAS_PMIC_FEATURE_SMPS10_BOOST - used when the PMIC provides SMPS10_BOOST * regulator. * * PALMAS_PMIC_HAS(b, f) - macro to check if a bandgap device is capable of a * specific feature (above) or not. Return non-zero, if yes. */ #define PALMAS_PMIC_FEATURE_SMPS10_BOOST BIT(0) #define PALMAS_PMIC_HAS(b, f) \ ((b)->features & PALMAS_PMIC_FEATURE_ ## f) struct palmas_pmic; struct palmas_gpadc; struct palmas_resource; struct palmas_usb; struct palmas_pmic_driver_data; struct palmas_pmic_platform_data; enum palmas_usb_state { PALMAS_USB_STATE_DISCONNECT, PALMAS_USB_STATE_VBUS, PALMAS_USB_STATE_ID, }; struct palmas { struct device *dev; struct i2c_client *i2c_clients[PALMAS_NUM_CLIENTS]; struct regmap *regmap[PALMAS_NUM_CLIENTS]; /* Stored chip id */ int id; unsigned int features; /* IRQ Data */ int irq; u32 irq_mask; struct mutex irq_lock; struct regmap_irq_chip_data *irq_data; struct palmas_pmic_driver_data *pmic_ddata; /* Child Devices */ struct palmas_pmic *pmic; struct palmas_gpadc *gpadc; struct palmas_resource *resource; struct palmas_usb *usb; /* GPIO MUXing */ u8 gpio_muxed; u8 led_muxed; u8 pwm_muxed; }; #define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 | \ PALMAS_EXT_CONTROL_ENABLE2 | \ PALMAS_EXT_CONTROL_NSLEEP) struct palmas_sleep_requestor_info { int id; int reg_offset; int bit_pos; }; struct palmas_regs_info { char *name; char *sname; u8 vsel_addr; u8 ctrl_addr; u8 tstep_addr; int sleep_id; }; struct palmas_pmic_driver_data { int smps_start; int smps_end; int ldo_begin; int ldo_end; int max_reg; bool has_regen3; struct palmas_regs_info *palmas_regs_info; struct of_regulator_match *palmas_matches; struct palmas_sleep_requestor_info *sleep_req_info; int (*smps_register)(struct palmas_pmic *pmic, struct palmas_pmic_driver_data *ddata, struct palmas_pmic_platform_data *pdata, const char *pdev_name, struct regulator_config config); int (*ldo_register)(struct palmas_pmic *pmic, struct palmas_pmic_driver_data *ddata, struct palmas_pmic_platform_data *pdata, const char *pdev_name, struct regulator_config config); }; struct palmas_adc_wakeup_property { int adc_channel_number; int adc_high_threshold; int adc_low_threshold; }; struct palmas_gpadc_platform_data { /* Channel 3 current source is only enabled during conversion */ int ch3_current; /* 0: off; 1: 10uA; 2: 400uA; 3: 800 uA */ /* Channel 0 current source can be used for battery detection. * If used for battery detection this will cause a permanent current * consumption depending on current level set here. */ int ch0_current; /* 0: off; 1: 5uA; 2: 15uA; 3: 20 uA */ bool extended_delay; /* use extended delay for conversion */ /* default BAT_REMOVAL_DAT setting on device probe */ int bat_removal; /* Sets the START_POLARITY bit in the RT_CTRL register */ int start_polarity; int auto_conversion_period_ms; struct palmas_adc_wakeup_property *adc_wakeup1_data; struct palmas_adc_wakeup_property *adc_wakeup2_data; }; struct palmas_reg_init { /* warm_rest controls the voltage levels after a warm reset * * 0: reload default values from OTP on warm reset * 1: maintain voltage from VSEL on warm reset */ int warm_reset; /* roof_floor controls whether the regulator uses the i2c style * of DVS or uses the method where a GPIO or other control method is * attached to the NSLEEP/ENABLE1/ENABLE2 pins * * For SMPS * * 0: i2c selection of voltage * 1: pin selection of voltage. * * For LDO unused */ int roof_floor; /* sleep_mode is the mode loaded to MODE_SLEEP bits as defined in * the data sheet. * * For SMPS * * 0: Off * 1: AUTO * 2: ECO * 3: Forced PWM * * For LDO * * 0: Off * 1: On */ int mode_sleep; /* voltage_sel is the bitfield loaded onto the SMPSX_VOLTAGE * register. Set this is the default voltage set in OTP needs * to be overridden. */ u8 vsel; }; enum palmas_regulators { /* SMPS regulators */ PALMAS_REG_SMPS12, PALMAS_REG_SMPS123, PALMAS_REG_SMPS3, PALMAS_REG_SMPS45, PALMAS_REG_SMPS457, PALMAS_REG_SMPS6, PALMAS_REG_SMPS7, PALMAS_REG_SMPS8, PALMAS_REG_SMPS9, PALMAS_REG_SMPS10_OUT2, PALMAS_REG_SMPS10_OUT1, /* LDO regulators */ PALMAS_REG_LDO1, PALMAS_REG_LDO2, PALMAS_REG_LDO3, PALMAS_REG_LDO4, PALMAS_REG_LDO5, PALMAS_REG_LDO6, PALMAS_REG_LDO7, PALMAS_REG_LDO8, PALMAS_REG_LDO9, PALMAS_REG_LDOLN, PALMAS_REG_LDOUSB, /* External regulators */ PALMAS_REG_REGEN1, PALMAS_REG_REGEN2, PALMAS_REG_REGEN3, PALMAS_REG_SYSEN1, PALMAS_REG_SYSEN2, /* Total number of regulators */ PALMAS_NUM_REGS, }; enum tps65917_regulators { /* SMPS regulators */ TPS65917_REG_SMPS1, TPS65917_REG_SMPS2, TPS65917_REG_SMPS3, TPS65917_REG_SMPS4, TPS65917_REG_SMPS5, TPS65917_REG_SMPS12, /* LDO regulators */ TPS65917_REG_LDO1, TPS65917_REG_LDO2, TPS65917_REG_LDO3, TPS65917_REG_LDO4, TPS65917_REG_LDO5, TPS65917_REG_REGEN1, TPS65917_REG_REGEN2, TPS65917_REG_REGEN3, /* Total number of regulators */ TPS65917_NUM_REGS, }; /* External controll signal name */ enum { PALMAS_EXT_CONTROL_ENABLE1 = 0x1, PALMAS_EXT_CONTROL_ENABLE2 = 0x2, PALMAS_EXT_CONTROL_NSLEEP = 0x4, }; /* * Palmas device resources can be controlled externally for * enabling/disabling it rather than register write through i2c. * Add the external controlled requestor ID for different resources. */ enum palmas_external_requestor_id { PALMAS_EXTERNAL_REQSTR_ID_REGEN1, PALMAS_EXTERNAL_REQSTR_ID_REGEN2, PALMAS_EXTERNAL_REQSTR_ID_SYSEN1, PALMAS_EXTERNAL_REQSTR_ID_SYSEN2, PALMAS_EXTERNAL_REQSTR_ID_CLK32KG, PALMAS_EXTERNAL_REQSTR_ID_CLK32KGAUDIO, PALMAS_EXTERNAL_REQSTR_ID_REGEN3, PALMAS_EXTERNAL_REQSTR_ID_SMPS12, PALMAS_EXTERNAL_REQSTR_ID_SMPS3, PALMAS_EXTERNAL_REQSTR_ID_SMPS45, PALMAS_EXTERNAL_REQSTR_ID_SMPS6, PALMAS_EXTERNAL_REQSTR_ID_SMPS7, PALMAS_EXTERNAL_REQSTR_ID_SMPS8, PALMAS_EXTERNAL_REQSTR_ID_SMPS9, PALMAS_EXTERNAL_REQSTR_ID_SMPS10, PALMAS_EXTERNAL_REQSTR_ID_LDO1, PALMAS_EXTERNAL_REQSTR_ID_LDO2, PALMAS_EXTERNAL_REQSTR_ID_LDO3, PALMAS_EXTERNAL_REQSTR_ID_LDO4, PALMAS_EXTERNAL_REQSTR_ID_LDO5, PALMAS_EXTERNAL_REQSTR_ID_LDO6, PALMAS_EXTERNAL_REQSTR_ID_LDO7, PALMAS_EXTERNAL_REQSTR_ID_LDO8, PALMAS_EXTERNAL_REQSTR_ID_LDO9, PALMAS_EXTERNAL_REQSTR_ID_LDOLN, PALMAS_EXTERNAL_REQSTR_ID_LDOUSB, /* Last entry */ PALMAS_EXTERNAL_REQSTR_ID_MAX, }; enum tps65917_external_requestor_id { TPS65917_EXTERNAL_REQSTR_ID_REGEN1, TPS65917_EXTERNAL_REQSTR_ID_REGEN2, TPS65917_EXTERNAL_REQSTR_ID_REGEN3, TPS65917_EXTERNAL_REQSTR_ID_SMPS1, TPS65917_EXTERNAL_REQSTR_ID_SMPS2, TPS65917_EXTERNAL_REQSTR_ID_SMPS3, TPS65917_EXTERNAL_REQSTR_ID_SMPS4, TPS65917_EXTERNAL_REQSTR_ID_SMPS5, TPS65917_EXTERNAL_REQSTR_ID_SMPS12, TPS65917_EXTERNAL_REQSTR_ID_LDO1, TPS65917_EXTERNAL_REQSTR_ID_LDO2, TPS65917_EXTERNAL_REQSTR_ID_LDO3, TPS65917_EXTERNAL_REQSTR_ID_LDO4, TPS65917_EXTERNAL_REQSTR_ID_LDO5, /* Last entry */ TPS65917_EXTERNAL_REQSTR_ID_MAX, }; struct palmas_pmic_platform_data { /* An array of pointers to regulator init data indexed by regulator * ID */ struct regulator_init_data *reg_data[PALMAS_NUM_REGS]; /* An array of pointers to structures containing sleep mode and DVS * configuration for regulators indexed by ID */ struct palmas_reg_init *reg_init[PALMAS_NUM_REGS]; /* use LDO6 for vibrator control */ int ldo6_vibrator; /* Enable tracking mode of LDO8 */ bool enable_ldo8_tracking; }; struct palmas_usb_platform_data { /* Do we enable the wakeup comparator on probe */ int wakeup; }; struct palmas_resource_platform_data { int regen1_mode_sleep; int regen2_mode_sleep; int sysen1_mode_sleep; int sysen2_mode_sleep; /* bitfield to be loaded to NSLEEP_RES_ASSIGN */ u8 nsleep_res; /* bitfield to be loaded to NSLEEP_SMPS_ASSIGN */ u8 nsleep_smps; /* bitfield to be loaded to NSLEEP_LDO_ASSIGN1 */ u8 nsleep_ldo1; /* bitfield to be loaded to NSLEEP_LDO_ASSIGN2 */ u8 nsleep_ldo2; /* bitfield to be loaded to ENABLE1_RES_ASSIGN */ u8 enable1_res; /* bitfield to be loaded to ENABLE1_SMPS_ASSIGN */ u8 enable1_smps; /* bitfield to be loaded to ENABLE1_LDO_ASSIGN1 */ u8 enable1_ldo1; /* bitfield to be loaded to ENABLE1_LDO_ASSIGN2 */ u8 enable1_ldo2; /* bitfield to be loaded to ENABLE2_RES_ASSIGN */ u8 enable2_res; /* bitfield to be loaded to ENABLE2_SMPS_ASSIGN */ u8 enable2_smps; /* bitfield to be loaded to ENABLE2_LDO_ASSIGN1 */ u8 enable2_ldo1; /* bitfield to be loaded to ENABLE2_LDO_ASSIGN2 */ u8 enable2_ldo2; }; struct palmas_clk_platform_data { int clk32kg_mode_sleep; int clk32kgaudio_mode_sleep; }; struct palmas_platform_data { int irq_flags; int gpio_base; /* bit value to be loaded to the POWER_CTRL register */ u8 power_ctrl; /* * boolean to select if we want to configure muxing here * then the two value to load into the registers if true */ int mux_from_pdata; u8 pad1, pad2; bool pm_off; struct palmas_pmic_platform_data *pmic_pdata; struct palmas_gpadc_platform_data *gpadc_pdata; struct palmas_usb_platform_data *usb_pdata; struct palmas_resource_platform_data *resource_pdata; struct palmas_clk_platform_data *clk_pdata; }; struct palmas_gpadc_calibration { s32 gain; s32 gain_error; s32 offset_error; }; #define PALMAS_DATASHEET_NAME(_name) "palmas-gpadc-chan-"#_name struct palmas_gpadc_result { s32 raw_code; s32 corrected_code; s32 result; }; #define PALMAS_MAX_CHANNELS 16 /* Define the tps65917 IRQ numbers */ enum tps65917_irqs { /* INT1 registers */ TPS65917_RESERVED1, TPS65917_PWRON_IRQ, TPS65917_LONG_PRESS_KEY_IRQ, TPS65917_RESERVED2, TPS65917_PWRDOWN_IRQ, TPS65917_HOTDIE_IRQ, TPS65917_VSYS_MON_IRQ, TPS65917_RESERVED3, /* INT2 registers */ TPS65917_RESERVED4, TPS65917_OTP_ERROR_IRQ, TPS65917_WDT_IRQ, TPS65917_RESERVED5, TPS65917_RESET_IN_IRQ, TPS65917_FSD_IRQ, TPS65917_SHORT_IRQ, TPS65917_RESERVED6, /* INT3 registers */ TPS65917_GPADC_AUTO_0_IRQ, TPS65917_GPADC_AUTO_1_IRQ, TPS65917_GPADC_EOC_SW_IRQ, TPS65917_RESREVED6, TPS65917_RESERVED7, TPS65917_RESERVED8, TPS65917_RESERVED9, TPS65917_VBUS_IRQ, /* INT4 registers */ TPS65917_GPIO_0_IRQ, TPS65917_GPIO_1_IRQ, TPS65917_GPIO_2_IRQ, TPS65917_GPIO_3_IRQ, TPS65917_GPIO_4_IRQ, TPS65917_GPIO_5_IRQ, TPS65917_GPIO_6_IRQ, TPS65917_RESERVED10, /* Total Number IRQs */ TPS65917_NUM_IRQ, }; /* Define the palmas IRQ numbers */ enum palmas_irqs { /* INT1 registers */ PALMAS_CHARG_DET_N_VBUS_OVV_IRQ, PALMAS_PWRON_IRQ, PALMAS_LONG_PRESS_KEY_IRQ, PALMAS_RPWRON_IRQ, PALMAS_PWRDOWN_IRQ, PALMAS_HOTDIE_IRQ, PALMAS_VSYS_MON_IRQ, PALMAS_VBAT_MON_IRQ, /* INT2 registers */ PALMAS_RTC_ALARM_IRQ, PALMAS_RTC_TIMER_IRQ, PALMAS_WDT_IRQ, PALMAS_BATREMOVAL_IRQ, PALMAS_RESET_IN_IRQ, PALMAS_FBI_BB_IRQ, PALMAS_SHORT_IRQ, PALMAS_VAC_ACOK_IRQ, /* INT3 registers */ PALMAS_GPADC_AUTO_0_IRQ, PALMAS_GPADC_AUTO_1_IRQ, PALMAS_GPADC_EOC_SW_IRQ, PALMAS_GPADC_EOC_RT_IRQ, PALMAS_ID_OTG_IRQ, PALMAS_ID_IRQ, PALMAS_VBUS_OTG_IRQ, PALMAS_VBUS_IRQ, /* INT4 registers */ PALMAS_GPIO_0_IRQ, PALMAS_GPIO_1_IRQ, PALMAS_GPIO_2_IRQ, PALMAS_GPIO_3_IRQ, PALMAS_GPIO_4_IRQ, PALMAS_GPIO_5_IRQ, PALMAS_GPIO_6_IRQ, PALMAS_GPIO_7_IRQ, /* Total Number IRQs */ PALMAS_NUM_IRQ, }; /* Palmas GPADC Channels */ enum { PALMAS_ADC_CH_IN0, PALMAS_ADC_CH_IN1, PALMAS_ADC_CH_IN2, PALMAS_ADC_CH_IN3, PALMAS_ADC_CH_IN4, PALMAS_ADC_CH_IN5, PALMAS_ADC_CH_IN6, PALMAS_ADC_CH_IN7, PALMAS_ADC_CH_IN8, PALMAS_ADC_CH_IN9, PALMAS_ADC_CH_IN10, PALMAS_ADC_CH_IN11, PALMAS_ADC_CH_IN12, PALMAS_ADC_CH_IN13, PALMAS_ADC_CH_IN14, PALMAS_ADC_CH_IN15, PALMAS_ADC_CH_MAX, }; /* Palmas GPADC Channel0 Current Source */ enum { PALMAS_ADC_CH0_CURRENT_SRC_0, PALMAS_ADC_CH0_CURRENT_SRC_5, PALMAS_ADC_CH0_CURRENT_SRC_15, PALMAS_ADC_CH0_CURRENT_SRC_20, }; /* Palmas GPADC Channel3 Current Source */ enum { PALMAS_ADC_CH3_CURRENT_SRC_0, PALMAS_ADC_CH3_CURRENT_SRC_10, PALMAS_ADC_CH3_CURRENT_SRC_400, PALMAS_ADC_CH3_CURRENT_SRC_800, }; struct palmas_pmic { struct palmas *palmas; struct device *dev; struct regulator_desc desc[PALMAS_NUM_REGS]; struct mutex mutex; int smps123; int smps457; int smps12; int range[PALMAS_REG_SMPS10_OUT1]; unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1]; unsigned int current_reg_mode[PALMAS_REG_SMPS10_OUT1]; }; struct palmas_resource { struct palmas *palmas; struct device *dev; }; struct palmas_usb { struct palmas *palmas; struct device *dev; struct extcon_dev *edev; int id_otg_irq; int id_irq; int vbus_otg_irq; int vbus_irq; int gpio_id_irq; int gpio_vbus_irq; struct gpio_desc *id_gpiod; struct gpio_desc *vbus_gpiod; unsigned long sw_debounce_jiffies; struct delayed_work wq_detectid; enum palmas_usb_state linkstat; int wakeup; bool enable_vbus_detection; bool enable_id_detection; bool enable_gpio_id_detection; bool enable_gpio_vbus_detection; }; #define comparator_to_palmas(x) container_of((x), struct palmas_usb, comparator) enum usb_irq_events { /* Wakeup events from INT3 */ PALMAS_USB_ID_WAKEPUP, PALMAS_USB_VBUS_WAKEUP, /* ID_OTG_EVENTS */ PALMAS_USB_ID_GND, N_PALMAS_USB_ID_GND, PALMAS_USB_ID_C, N_PALMAS_USB_ID_C, PALMAS_USB_ID_B, N_PALMAS_USB_ID_B, PALMAS_USB_ID_A, N_PALMAS_USB_ID_A, PALMAS_USB_ID_FLOAT, N_PALMAS_USB_ID_FLOAT, /* VBUS_OTG_EVENTS */ PALMAS_USB_VB_SESS_END, N_PALMAS_USB_VB_SESS_END, PALMAS_USB_VB_SESS_VLD, N_PALMAS_USB_VB_SESS_VLD, PALMAS_USB_VA_SESS_VLD, N_PALMAS_USB_VA_SESS_VLD, PALMAS_USB_VA_VBUS_VLD, N_PALMAS_USB_VA_VBUS_VLD, PALMAS_USB_VADP_SNS, N_PALMAS_USB_VADP_SNS, PALMAS_USB_VADP_PRB, N_PALMAS_USB_VADP_PRB, PALMAS_USB_VOTG_SESS_VLD, N_PALMAS_USB_VOTG_SESS_VLD, }; /* defines so we can store the mux settings */ #define PALMAS_GPIO_0_MUXED (1 << 0) #define PALMAS_GPIO_1_MUXED (1 << 1) #define PALMAS_GPIO_2_MUXED (1 << 2) #define PALMAS_GPIO_3_MUXED (1 << 3) #define PALMAS_GPIO_4_MUXED (1 << 4) #define PALMAS_GPIO_5_MUXED (1 << 5) #define PALMAS_GPIO_6_MUXED (1 << 6) #define PALMAS_GPIO_7_MUXED (1 << 7) #define PALMAS_LED1_MUXED (1 << 0) #define PALMAS_LED2_MUXED (1 << 1) #define PALMAS_PWM1_MUXED (1 << 0) #define PALMAS_PWM2_MUXED (1 << 1) /* helper macro to get correct slave number */ #define PALMAS_BASE_TO_SLAVE(x) ((x >> 8) - 1) #define PALMAS_BASE_TO_REG(x, y) ((x &